Add more AArch64 vrnd intrinsics.
LLVM can't select float64x1_t variants, but float64x2_t variants work.
This commit is contained in:
Jacob Bramley
Amanieu d'Antras
parent
a9fecd8456
commit
0459405ea9
3 changed files with 102 additions and 9 deletions
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@ -15297,6 +15297,21 @@ pub unsafe fn vrnd32xq_f32(a: float32x4_t) -> float32x4_t {
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vrnd32xq_f32_(a)
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}
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/// Floating-point round to 32-bit integer, using current rounding mode
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrnd32xq_f64)
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#[inline]
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#[target_feature(enable = "neon,frintts")]
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#[cfg_attr(test, assert_instr(frint32x))]
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pub unsafe fn vrnd32xq_f64(a: float64x2_t) -> float64x2_t {
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#[allow(improper_ctypes)]
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extern "unadjusted" {
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.frint32x.v2f64")]
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fn vrnd32xq_f64_(a: float64x2_t) -> float64x2_t;
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}
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vrnd32xq_f64_(a)
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}
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/// Floating-point round to 32-bit integer toward zero
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrnd32z_f32)
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@ -15327,6 +15342,21 @@ pub unsafe fn vrnd32zq_f32(a: float32x4_t) -> float32x4_t {
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vrnd32zq_f32_(a)
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}
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/// Floating-point round to 32-bit integer toward zero
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrnd32zq_f64)
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#[inline]
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#[target_feature(enable = "neon,frintts")]
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#[cfg_attr(test, assert_instr(frint32z))]
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pub unsafe fn vrnd32zq_f64(a: float64x2_t) -> float64x2_t {
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#[allow(improper_ctypes)]
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extern "unadjusted" {
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.frint32z.v2f64")]
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fn vrnd32zq_f64_(a: float64x2_t) -> float64x2_t;
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}
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vrnd32zq_f64_(a)
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}
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/// Floating-point round to 64-bit integer, using current rounding mode
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrnd64x_f32)
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@ -15357,6 +15387,21 @@ pub unsafe fn vrnd64xq_f32(a: float32x4_t) -> float32x4_t {
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vrnd64xq_f32_(a)
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}
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/// Floating-point round to 64-bit integer, using current rounding mode
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrnd64xq_f64)
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#[inline]
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#[target_feature(enable = "neon,frintts")]
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#[cfg_attr(test, assert_instr(frint64x))]
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pub unsafe fn vrnd64xq_f64(a: float64x2_t) -> float64x2_t {
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#[allow(improper_ctypes)]
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extern "unadjusted" {
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.frint64x.v2f64")]
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fn vrnd64xq_f64_(a: float64x2_t) -> float64x2_t;
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}
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vrnd64xq_f64_(a)
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}
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/// Floating-point round to 64-bit integer toward zero
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrnd64z_f32)
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@ -15387,6 +15432,21 @@ pub unsafe fn vrnd64zq_f32(a: float32x4_t) -> float32x4_t {
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vrnd64zq_f32_(a)
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}
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/// Floating-point round to 64-bit integer toward zero
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrnd64zq_f64)
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#[inline]
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#[target_feature(enable = "neon,frintts")]
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#[cfg_attr(test, assert_instr(frint64z))]
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pub unsafe fn vrnd64zq_f64(a: float64x2_t) -> float64x2_t {
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#[allow(improper_ctypes)]
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extern "unadjusted" {
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.frint64z.v2f64")]
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fn vrnd64zq_f64_(a: float64x2_t) -> float64x2_t;
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}
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vrnd64zq_f64_(a)
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}
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/// Transpose vectors
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vtrn1_s8)
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@ -26810,6 +26870,14 @@ mod test {
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon,frintts")]
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unsafe fn test_vrnd32xq_f64() {
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let a: f64x2 = f64x2::new(1.1, 1.9);
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let e: f64x2 = f64x2::new(1.0, 2.0);
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let r: f64x2 = transmute(vrnd32xq_f64(transmute(a)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon,frintts")]
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unsafe fn test_vrnd32z_f32() {
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let a: f32x2 = f32x2::new(1.1, 1.9);
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@ -26826,6 +26894,14 @@ mod test {
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon,frintts")]
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unsafe fn test_vrnd32zq_f64() {
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let a: f64x2 = f64x2::new(1.1, 1.9);
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let e: f64x2 = f64x2::new(1.0, 1.0);
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let r: f64x2 = transmute(vrnd32zq_f64(transmute(a)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon,frintts")]
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unsafe fn test_vrnd64x_f32() {
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let a: f32x2 = f32x2::new(1.1, 1.9);
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@ -26842,6 +26918,14 @@ mod test {
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon,frintts")]
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unsafe fn test_vrnd64xq_f64() {
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let a: f64x2 = f64x2::new(1.1, 1.9);
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let e: f64x2 = f64x2::new(1.0, 2.0);
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let r: f64x2 = transmute(vrnd64xq_f64(transmute(a)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon,frintts")]
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unsafe fn test_vrnd64z_f32() {
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let a: f32x2 = f32x2::new(1.1, 1.9);
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@ -26858,6 +26942,14 @@ mod test {
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon,frintts")]
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unsafe fn test_vrnd64zq_f64() {
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let a: f64x2 = f64x2::new(1.1, 1.9);
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let e: f64x2 = f64x2::new(1.0, 1.0);
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let r: f64x2 = transmute(vrnd64zq_f64(transmute(a)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vtrn1_s8() {
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let a: i8x8 = i8x8::new(0, 2, 4, 6, 8, 10, 12, 14);
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@ -14,15 +14,16 @@ vbfmlaltq_laneq_f32
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vbfmmlaq_f32
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# Missing from both Clang and stdarch
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vrnd32x_f64
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# Implemented in stdarch, but missing in Clang.
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vrnd32xq_f64
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vrnd32z_f64
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vrnd32zq_f64
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vrnd64x_f64
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vrnd64xq_f64
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vrnd64z_f64
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vrnd64zq_f64
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# LLVM select error, and missing in Clang.
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vrnd32x_f64
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vrnd32z_f64
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vrnd64x_f64
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vrnd64z_f64
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# LLVM select error in debug builds
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#vqshlu_n_s16
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@ -7218,7 +7218,7 @@ target = frintts
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aarch64 = frint32x
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link-aarch64 = frint32x._EXT_
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generate float32x2_t, float32x4_t
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generate float32x2_t, float32x4_t, float64x2_t
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/// Floating-point round to 32-bit integer toward zero
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name = vrnd32z
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@ -7228,7 +7228,7 @@ target = frintts
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aarch64 = frint32z
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link-aarch64 = frint32z._EXT_
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generate float32x2_t, float32x4_t
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generate float32x2_t, float32x4_t, float64x2_t
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/// Floating-point round to 64-bit integer, using current rounding mode
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name = vrnd64x
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@ -7238,7 +7238,7 @@ target = frintts
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aarch64 = frint64x
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link-aarch64 = frint64x._EXT_
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generate float32x2_t, float32x4_t
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generate float32x2_t, float32x4_t, float64x2_t
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/// Floating-point round to 64-bit integer toward zero
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name = vrnd64z
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@ -7248,7 +7248,7 @@ target = frintts
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aarch64 = frint64z
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link-aarch64 = frint64z._EXT_
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generate float32x2_t, float32x4_t
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generate float32x2_t, float32x4_t, float64x2_t
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/// Transpose elements
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name = vtrn
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