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core_arch: Fix ARMv6 CP15 barrier

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This commit is contained in:
Taiki Endo 2023-09-27 03:44:36 +09:00 • committed by Amanieu d'Antras
parent 73a820bc6b
commit 059b848b8a
1 changed files with 6 additions and 3 deletions
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9
library/stdarch/crates/core_arch/src/arm_shared/barrier/cp15.rs
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@ -11,7 +11,8 @@ impl super::super::sealed::Dmb for SY {
#[inline(always)]
unsafe fn __dmb(&self) {
asm!(
"mcr p15, 0, r0, c7, c10, 5",
"mcr p15, 0, {}, c7, c10, 5",
in(reg) 0_u32,
options(preserves_flags, nostack)
)
}
@ -21,7 +22,8 @@ impl super::super::sealed::Dsb for SY {
#[inline(always)]
unsafe fn __dsb(&self) {
asm!(
"mcr p15, 0, r0, c7, c10, 4",
"mcr p15, 0, {}, c7, c10, 4",
in(reg) 0_u32,
options(preserves_flags, nostack)
)
}
@ -31,7 +33,8 @@ impl super::super::sealed::Isb for SY {
#[inline(always)]
unsafe fn __isb(&self) {
asm!(
"mcr p15, 0, r0, c7, c5, 4",
"mcr p15, 0, {}, c7, c5, 4",
in(reg) 0_u32,
options(preserves_flags, nostack)
)
}