Convert _mm256_mpsadbw_epu8 to const generics
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1 changed files with 6 additions and 13 deletions
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@ -2246,19 +2246,12 @@ pub unsafe fn _mm256_movemask_epi8(a: __m256i) -> i32 {
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mpsadbw_epu8)
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#[inline]
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#[target_feature(enable = "avx2")]
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#[cfg_attr(test, assert_instr(vmpsadbw, imm8 = 0))]
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#[rustc_args_required_const(2)]
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#[cfg_attr(test, assert_instr(vmpsadbw, IMM8 = 0))]
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#[rustc_legacy_const_generics(2)]
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#[stable(feature = "simd_x86", since = "1.27.0")]
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pub unsafe fn _mm256_mpsadbw_epu8(a: __m256i, b: __m256i, imm8: i32) -> __m256i {
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let a = a.as_u8x32();
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let b = b.as_u8x32();
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macro_rules! call {
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($imm8:expr) => {
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mpsadbw(a, b, $imm8)
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};
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}
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let r = constify_imm8!(imm8, call);
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transmute(r)
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pub unsafe fn _mm256_mpsadbw_epu8<const IMM8: i32>(a: __m256i, b: __m256i) -> __m256i {
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static_assert_imm8!(IMM8);
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transmute(mpsadbw(a.as_u8x32(), b.as_u8x32(), IMM8))
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}
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/// Multiplies the low 32-bit integers from each packed 64-bit element in
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@ -4997,7 +4990,7 @@ mod tests {
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unsafe fn test_mm256_mpsadbw_epu8() {
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let a = _mm256_set1_epi8(2);
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let b = _mm256_set1_epi8(4);
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let r = _mm256_mpsadbw_epu8(a, b, 0);
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let r = _mm256_mpsadbw_epu8::<0>(a, b);
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let e = _mm256_set1_epi16(8);
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assert_eq_m256i(r, e);
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}
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