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Add Altivec vec_addc

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Luca Barbato 2019-05-14 08:56:49 +00:00 • committed by gnzlbg
parent 06f87317ba
commit 12ff9fea16
1 changed files with 15 additions and 1 deletions
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16
library/stdarch/crates/core_arch/src/powerpc/altivec.rs
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@ -175,6 +175,9 @@ extern "C" {
fn vsubuhs(a: vector_unsigned_short, b: vector_unsigned_short) -> vector_unsigned_short;
#[link_name = "llvm.ppc.altivec.vsubuws"]
fn vsubuws(a: vector_unsigned_int, b: vector_unsigned_int) -> vector_unsigned_int;
#[link_name = "llvm.ppc.altivec.vaddcuw"]
fn vaddcuw(a: vector_unsigned_int, b: vector_unsigned_int) -> vector_unsigned_int;
}
macro_rules! s_t_l {
@ -247,7 +250,7 @@ mod sealed {
#[inline]
#[target_feature(enable = "altivec")]
#[cfg_attr(test, assert_instr($instr))]
unsafe fn $fun ($($v : $ty),*) -> $r {
pub unsafe fn $fun ($($v : $ty),*) -> $r {
$call ($($v),*)
}
};
@ -317,6 +320,8 @@ mod sealed {
}
}
test_impl! { vec_vaddcuw(a: vector_unsigned_int, b: vector_unsigned_int) -> vector_unsigned_int [vaddcuw, vaddcuw] }
test_impl! { vec_vsubsbs(a: vector_signed_char, b: vector_signed_char) -> vector_signed_char [ vsubsbs, vsubsbs ] }
test_impl! { vec_vsubshs(a: vector_signed_short, b: vector_signed_short) -> vector_signed_short [ vsubshs, vsubshs ] }
test_impl! { vec_vsubsws(a: vector_signed_int, b: vector_signed_int) -> vector_signed_int [ vsubsws, vsubsws ] }
@ -1157,6 +1162,13 @@ mod sealed {
vector_mladd! { vector_signed_short, vector_signed_short, vector_signed_short }
}
/// Vector addc.
#[inline]
#[target_feature(enable = "altivec")]
pub unsafe fn vec_addc(a: vector_unsigned_int, b: vector_unsigned_int) -> vector_unsigned_int {
sealed::vec_vaddcuw(a, b)
}
/// Vector abs.
#[inline]
#[target_feature(enable = "altivec")]
@ -1444,6 +1456,8 @@ mod tests {
}
}
test_vec_2! { test_vec_addc, vec_addc, u32x4, [u32::max_value(), 0, 0, 0], [1, 1, 1, 1], [1, 0, 0, 0] }
macro_rules! test_vec_abs {
{ $name: ident, $ty: ident, $a: expr, $d: expr } => {
#[simd_test(enable = "altivec")]