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Move entirely to array-based SIMD

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See MCP#621

This tries to make as few changes as possible -- it keeps the `new` functions taking all the parameters, for example.
This commit is contained in:
Scott McMurray 2024-08-07 00:49:51 -07:00 • committed by Amanieu d'Antras
parent 0c304072bc
commit 1bf1eff5cc
22 changed files with 635 additions and 713 deletions
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20
library/stdarch/crates/core_arch/src/aarch64/neon/mod.rs
View file

@ -23,10 +23,10 @@ use stdarch_test::assert_instr;
types! {
/// ARM-specific 64-bit wide vector of one packed `f64`.
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub struct float64x1_t(f64); // FIXME: check this!
pub struct float64x1_t(1 x f64); // FIXME: check this!
/// ARM-specific 128-bit wide vector of two packed `f64`.
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub struct float64x2_t(f64, f64);
pub struct float64x2_t(2 x f64);
}
/// ARM-specific type containing two `float64x1_t` vectors.
@ -1061,7 +1061,7 @@ pub unsafe fn vabsq_s64(a: int64x2_t) -> int64x2_t {
#[cfg_attr(test, assert_instr(bsl))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vbsl_f64(a: uint64x1_t, b: float64x1_t, c: float64x1_t) -> float64x1_t {
let not = int64x1_t(-1);
let not = int64x1_t::splat(-1);
transmute(simd_or(
simd_and(a, transmute(b)),
simd_and(simd_xor(a, transmute(not)), transmute(c)),
@ -1073,7 +1073,7 @@ pub unsafe fn vbsl_f64(a: uint64x1_t, b: float64x1_t, c: float64x1_t) -> float64
#[cfg_attr(test, assert_instr(bsl))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vbsl_p64(a: poly64x1_t, b: poly64x1_t, c: poly64x1_t) -> poly64x1_t {
let not = int64x1_t(-1);
let not = int64x1_t::splat(-1);
simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c))
}
/// Bitwise Select. (128-bit)
@ -1082,7 +1082,7 @@ pub unsafe fn vbsl_p64(a: poly64x1_t, b: poly64x1_t, c: poly64x1_t) -> poly64x1_
#[cfg_attr(test, assert_instr(bsl))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vbslq_f64(a: uint64x2_t, b: float64x2_t, c: float64x2_t) -> float64x2_t {
let not = int64x2_t(-1, -1);
let not = int64x2_t::splat(-1);
transmute(simd_or(
simd_and(a, transmute(b)),
simd_and(simd_xor(a, transmute(not)), transmute(c)),
@ -1094,7 +1094,7 @@ pub unsafe fn vbslq_f64(a: uint64x2_t, b: float64x2_t, c: float64x2_t) -> float6
#[cfg_attr(test, assert_instr(bsl))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vbslq_p64(a: poly64x2_t, b: poly64x2_t, c: poly64x2_t) -> poly64x2_t {
let not = int64x2_t(-1, -1);
let not = int64x2_t::splat(-1);
simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c))
}
@ -1976,7 +1976,7 @@ pub unsafe fn vdup_n_p64(value: p64) -> poly64x1_t {
#[cfg_attr(test, assert_instr(nop))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vdup_n_f64(value: f64) -> float64x1_t {
float64x1_t(value)
float64x1_t::splat(value)
}
/// Duplicate vector element to vector or scalar
@ -1994,7 +1994,7 @@ pub unsafe fn vdupq_n_p64(value: p64) -> poly64x2_t {
#[cfg_attr(test, assert_instr(dup))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vdupq_n_f64(value: f64) -> float64x2_t {
float64x2_t(value, value)
float64x2_t::splat(value)
}
/// Duplicate vector element to vector or scalar
@ -2040,7 +2040,7 @@ pub unsafe fn vmovq_n_f64(value: f64) -> float64x2_t {
#[cfg_attr(all(test, target_env = "msvc"), assert_instr(dup))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vget_high_f64(a: float64x2_t) -> float64x1_t {
float64x1_t(simd_extract!(a, 1))
float64x1_t([simd_extract!(a, 1)])
}
/// Duplicate vector element to vector or scalar
@ -2058,7 +2058,7 @@ pub unsafe fn vget_high_p64(a: poly64x2_t) -> poly64x1_t {
#[cfg_attr(test, assert_instr(nop))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vget_low_f64(a: float64x2_t) -> float64x1_t {
float64x1_t(simd_extract!(a, 0))
float64x1_t([simd_extract!(a, 0)])
}
/// Duplicate vector element to vector or scalar

5
library/stdarch/crates/core_arch/src/arm/dsp.rs
View file

@ -23,15 +23,16 @@
#[cfg(test)]
use stdarch_test::assert_instr;
use crate::intrinsics::simd::simd_shuffle;
use crate::mem::transmute;
types! {
/// ARM-specific 32-bit wide vector of two packed `i16`.
#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
pub struct int16x2_t(i16, i16);
pub struct int16x2_t(2 x i16);
/// ARM-specific 32-bit wide vector of two packed `u16`.
#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
pub struct uint16x2_t(u16, u16);
pub struct uint16x2_t(2 x u16);
}
extern "unadjusted" {

100
library/stdarch/crates/core_arch/src/arm/neon.rs
View file

@ -844,7 +844,7 @@ pub unsafe fn vtbx4_p8(a: poly8x8_t, b: poly8x8x4_t, c: uint8x8_t) -> poly8x8_t
pub unsafe fn vsli_n_s8<const N: i32>(a: int8x8_t, b: int8x8_t) -> int8x8_t {
static_assert_uimm_bits!(N, 3);
let n = N as i8;
vshiftins_v8i8(a, b, int8x8_t(n, n, n, n, n, n, n, n))
vshiftins_v8i8(a, b, int8x8_t::splat(n))
}
/// Shift Left and Insert (immediate)
#[inline]
@ -855,11 +855,7 @@ pub unsafe fn vsli_n_s8<const N: i32>(a: int8x8_t, b: int8x8_t) -> int8x8_t {
pub unsafe fn vsliq_n_s8<const N: i32>(a: int8x16_t, b: int8x16_t) -> int8x16_t {
static_assert_uimm_bits!(N, 3);
let n = N as i8;
vshiftins_v16i8(
a,
b,
int8x16_t(n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n),
)
vshiftins_v16i8(a, b, int8x16_t::splat(n))
}
/// Shift Left and Insert (immediate)
#[inline]
@ -870,7 +866,7 @@ pub unsafe fn vsliq_n_s8<const N: i32>(a: int8x16_t, b: int8x16_t) -> int8x16_t
pub unsafe fn vsli_n_s16<const N: i32>(a: int16x4_t, b: int16x4_t) -> int16x4_t {
static_assert_uimm_bits!(N, 4);
let n = N as i16;
vshiftins_v4i16(a, b, int16x4_t(n, n, n, n))
vshiftins_v4i16(a, b, int16x4_t::splat(n))
}
/// Shift Left and Insert (immediate)
#[inline]
@ -881,7 +877,7 @@ pub unsafe fn vsli_n_s16<const N: i32>(a: int16x4_t, b: int16x4_t) -> int16x4_t
pub unsafe fn vsliq_n_s16<const N: i32>(a: int16x8_t, b: int16x8_t) -> int16x8_t {
static_assert_uimm_bits!(N, 4);
let n = N as i16;
vshiftins_v8i16(a, b, int16x8_t(n, n, n, n, n, n, n, n))
vshiftins_v8i16(a, b, int16x8_t::splat(n))
}
/// Shift Left and Insert (immediate)
#[inline]
@ -891,7 +887,7 @@ pub unsafe fn vsliq_n_s16<const N: i32>(a: int16x8_t, b: int16x8_t) -> int16x8_t
#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
pub unsafe fn vsli_n_s32<const N: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t {
static_assert!(N >= 0 && N <= 31);
vshiftins_v2i32(a, b, int32x2_t(N, N))
vshiftins_v2i32(a, b, int32x2_t::splat(N))
}
/// Shift Left and Insert (immediate)
#[inline]
@ -901,7 +897,7 @@ pub unsafe fn vsli_n_s32<const N: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t
#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
pub unsafe fn vsliq_n_s32<const N: i32>(a: int32x4_t, b: int32x4_t) -> int32x4_t {
static_assert!(N >= 0 && N <= 31);
vshiftins_v4i32(a, b, int32x4_t(N, N, N, N))
vshiftins_v4i32(a, b, int32x4_t::splat(N))
}
/// Shift Left and Insert (immediate)
#[inline]
@ -911,7 +907,7 @@ pub unsafe fn vsliq_n_s32<const N: i32>(a: int32x4_t, b: int32x4_t) -> int32x4_t
#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
pub unsafe fn vsli_n_s64<const N: i32>(a: int64x1_t, b: int64x1_t) -> int64x1_t {
static_assert!(0 <= N && N <= 63);
vshiftins_v1i64(a, b, int64x1_t(N as i64))
vshiftins_v1i64(a, b, int64x1_t::splat(N as i64))
}
/// Shift Left and Insert (immediate)
#[inline]
@ -921,7 +917,7 @@ pub unsafe fn vsli_n_s64<const N: i32>(a: int64x1_t, b: int64x1_t) -> int64x1_t
#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
pub unsafe fn vsliq_n_s64<const N: i32>(a: int64x2_t, b: int64x2_t) -> int64x2_t {
static_assert!(0 <= N && N <= 63);
vshiftins_v2i64(a, b, int64x2_t(N as i64, N as i64))
vshiftins_v2i64(a, b, int64x2_t::splat(N as i64))
}
/// Shift Left and Insert (immediate)
#[inline]
@ -935,7 +931,7 @@ pub unsafe fn vsli_n_u8<const N: i32>(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
transmute(vshiftins_v8i8(
transmute(a),
transmute(b),
int8x8_t(n, n, n, n, n, n, n, n),
int8x8_t::splat(n),
))
}
/// Shift Left and Insert (immediate)
@ -950,7 +946,7 @@ pub unsafe fn vsliq_n_u8<const N: i32>(a: uint8x16_t, b: uint8x16_t) -> uint8x16
transmute(vshiftins_v16i8(
transmute(a),
transmute(b),
int8x16_t(n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n),
int8x16_t::splat(n),
))
}
/// Shift Left and Insert (immediate)
@ -965,7 +961,7 @@ pub unsafe fn vsli_n_u16<const N: i32>(a: uint16x4_t, b: uint16x4_t) -> uint16x4
transmute(vshiftins_v4i16(
transmute(a),
transmute(b),
int16x4_t(n, n, n, n),
int16x4_t::splat(n),
))
}
/// Shift Left and Insert (immediate)
@ -980,7 +976,7 @@ pub unsafe fn vsliq_n_u16<const N: i32>(a: uint16x8_t, b: uint16x8_t) -> uint16x
transmute(vshiftins_v8i16(
transmute(a),
transmute(b),
int16x8_t(n, n, n, n, n, n, n, n),
int16x8_t::splat(n),
))
}
/// Shift Left and Insert (immediate)
@ -991,7 +987,11 @@ pub unsafe fn vsliq_n_u16<const N: i32>(a: uint16x8_t, b: uint16x8_t) -> uint16x
#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
pub unsafe fn vsli_n_u32<const N: i32>(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
static_assert!(N >= 0 && N <= 31);
transmute(vshiftins_v2i32(transmute(a), transmute(b), int32x2_t(N, N)))
transmute(vshiftins_v2i32(
transmute(a),
transmute(b),
int32x2_t::splat(N),
))
}
/// Shift Left and Insert (immediate)
#[inline]
@ -1004,7 +1004,7 @@ pub unsafe fn vsliq_n_u32<const N: i32>(a: uint32x4_t, b: uint32x4_t) -> uint32x
transmute(vshiftins_v4i32(
transmute(a),
transmute(b),
int32x4_t(N, N, N, N),
int32x4_t::splat(N),
))
}
/// Shift Left and Insert (immediate)
@ -1018,7 +1018,7 @@ pub unsafe fn vsli_n_u64<const N: i32>(a: uint64x1_t, b: uint64x1_t) -> uint64x1
transmute(vshiftins_v1i64(
transmute(a),
transmute(b),
int64x1_t(N as i64),
int64x1_t::splat(N as i64),
))
}
/// Shift Left and Insert (immediate)
@ -1032,7 +1032,7 @@ pub unsafe fn vsliq_n_u64<const N: i32>(a: uint64x2_t, b: uint64x2_t) -> uint64x
transmute(vshiftins_v2i64(
transmute(a),
transmute(b),
int64x2_t(N as i64, N as i64),
int64x2_t::splat(N as i64),
))
}
/// Shift Left and Insert (immediate)
@ -1047,7 +1047,7 @@ pub unsafe fn vsli_n_p8<const N: i32>(a: poly8x8_t, b: poly8x8_t) -> poly8x8_t {
transmute(vshiftins_v8i8(
transmute(a),
transmute(b),
int8x8_t(n, n, n, n, n, n, n, n),
int8x8_t::splat(n),
))
}
/// Shift Left and Insert (immediate)
@ -1062,7 +1062,7 @@ pub unsafe fn vsliq_n_p8<const N: i32>(a: poly8x16_t, b: poly8x16_t) -> poly8x16
transmute(vshiftins_v16i8(
transmute(a),
transmute(b),
int8x16_t(n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n),
int8x16_t::splat(n),
))
}
/// Shift Left and Insert (immediate)
@ -1077,7 +1077,7 @@ pub unsafe fn vsli_n_p16<const N: i32>(a: poly16x4_t, b: poly16x4_t) -> poly16x4
transmute(vshiftins_v4i16(
transmute(a),
transmute(b),
int16x4_t(n, n, n, n),
int16x4_t::splat(n),
))
}
@ -1093,7 +1093,7 @@ pub unsafe fn vsliq_n_p16<const N: i32>(a: poly16x8_t, b: poly16x8_t) -> poly16x
transmute(vshiftins_v8i16(
transmute(a),
transmute(b),
int16x8_t(n, n, n, n, n, n, n, n),
int16x8_t::splat(n),
))
}
@ -1110,7 +1110,7 @@ pub unsafe fn vsli_n_p64<const N: i32>(a: poly64x1_t, b: poly64x1_t) -> poly64x1
transmute(vshiftins_v1i64(
transmute(a),
transmute(b),
int64x1_t(N as i64),
int64x1_t::splat(N as i64),
))
}
@ -1127,7 +1127,7 @@ pub unsafe fn vsliq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x
transmute(vshiftins_v2i64(
transmute(a),
transmute(b),
int64x2_t(N as i64, N as i64),
int64x2_t::splat(N as i64),
))
}
/// Shift Right and Insert (immediate)
@ -1139,7 +1139,7 @@ pub unsafe fn vsliq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x
pub unsafe fn vsri_n_s8<const N: i32>(a: int8x8_t, b: int8x8_t) -> int8x8_t {
static_assert!(1 <= N && N <= 8);
let n = -N as i8;
vshiftins_v8i8(a, b, int8x8_t(n, n, n, n, n, n, n, n))
vshiftins_v8i8(a, b, int8x8_t::splat(n))
}
/// Shift Right and Insert (immediate)
#[inline]
@ -1150,11 +1150,7 @@ pub unsafe fn vsri_n_s8<const N: i32>(a: int8x8_t, b: int8x8_t) -> int8x8_t {
pub unsafe fn vsriq_n_s8<const N: i32>(a: int8x16_t, b: int8x16_t) -> int8x16_t {
static_assert!(1 <= N && N <= 8);
let n = -N as i8;
vshiftins_v16i8(
a,
b,
int8x16_t(n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n),
)
vshiftins_v16i8(a, b, int8x16_t::splat(n))
}
/// Shift Right and Insert (immediate)
#[inline]
@ -1165,7 +1161,7 @@ pub unsafe fn vsriq_n_s8<const N: i32>(a: int8x16_t, b: int8x16_t) -> int8x16_t
pub unsafe fn vsri_n_s16<const N: i32>(a: int16x4_t, b: int16x4_t) -> int16x4_t {
static_assert!(1 <= N && N <= 16);
let n = -N as i16;
vshiftins_v4i16(a, b, int16x4_t(n, n, n, n))
vshiftins_v4i16(a, b, int16x4_t::splat(n))
}
/// Shift Right and Insert (immediate)
#[inline]
@ -1176,7 +1172,7 @@ pub unsafe fn vsri_n_s16<const N: i32>(a: int16x4_t, b: int16x4_t) -> int16x4_t
pub unsafe fn vsriq_n_s16<const N: i32>(a: int16x8_t, b: int16x8_t) -> int16x8_t {
static_assert!(1 <= N && N <= 16);
let n = -N as i16;
vshiftins_v8i16(a, b, int16x8_t(n, n, n, n, n, n, n, n))
vshiftins_v8i16(a, b, int16x8_t::splat(n))
}
/// Shift Right and Insert (immediate)
#[inline]
@ -1186,7 +1182,7 @@ pub unsafe fn vsriq_n_s16<const N: i32>(a: int16x8_t, b: int16x8_t) -> int16x8_t
#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
pub unsafe fn vsri_n_s32<const N: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t {
static_assert!(1 <= N && N <= 32);
vshiftins_v2i32(a, b, int32x2_t(-N, -N))
vshiftins_v2i32(a, b, int32x2_t::splat(-N))
}
/// Shift Right and Insert (immediate)
#[inline]
@ -1196,7 +1192,7 @@ pub unsafe fn vsri_n_s32<const N: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t
#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
pub unsafe fn vsriq_n_s32<const N: i32>(a: int32x4_t, b: int32x4_t) -> int32x4_t {
static_assert!(1 <= N && N <= 32);
vshiftins_v4i32(a, b, int32x4_t(-N, -N, -N, -N))
vshiftins_v4i32(a, b, int32x4_t::splat(-N))
}
/// Shift Right and Insert (immediate)
#[inline]
@ -1206,7 +1202,7 @@ pub unsafe fn vsriq_n_s32<const N: i32>(a: int32x4_t, b: int32x4_t) -> int32x4_t
#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
pub unsafe fn vsri_n_s64<const N: i32>(a: int64x1_t, b: int64x1_t) -> int64x1_t {
static_assert!(1 <= N && N <= 64);
vshiftins_v1i64(a, b, int64x1_t(-N as i64))
vshiftins_v1i64(a, b, int64x1_t::splat(-N as i64))
}
/// Shift Right and Insert (immediate)
#[inline]
@ -1216,7 +1212,7 @@ pub unsafe fn vsri_n_s64<const N: i32>(a: int64x1_t, b: int64x1_t) -> int64x1_t
#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
pub unsafe fn vsriq_n_s64<const N: i32>(a: int64x2_t, b: int64x2_t) -> int64x2_t {
static_assert!(1 <= N && N <= 64);
vshiftins_v2i64(a, b, int64x2_t(-N as i64, -N as i64))
vshiftins_v2i64(a, b, int64x2_t::splat(-N as i64))
}
/// Shift Right and Insert (immediate)
#[inline]
@ -1230,7 +1226,7 @@ pub unsafe fn vsri_n_u8<const N: i32>(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
transmute(vshiftins_v8i8(
transmute(a),
transmute(b),
int8x8_t(n, n, n, n, n, n, n, n),
int8x8_t::splat(n),
))
}
/// Shift Right and Insert (immediate)
@ -1245,7 +1241,7 @@ pub unsafe fn vsriq_n_u8<const N: i32>(a: uint8x16_t, b: uint8x16_t) -> uint8x16
transmute(vshiftins_v16i8(
transmute(a),
transmute(b),
int8x16_t(n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n),
int8x16_t::splat(n),
))
}
/// Shift Right and Insert (immediate)
@ -1260,7 +1256,7 @@ pub unsafe fn vsri_n_u16<const N: i32>(a: uint16x4_t, b: uint16x4_t) -> uint16x4
transmute(vshiftins_v4i16(
transmute(a),
transmute(b),
int16x4_t(n, n, n, n),
int16x4_t::splat(n),
))
}
/// Shift Right and Insert (immediate)
@ -1275,7 +1271,7 @@ pub unsafe fn vsriq_n_u16<const N: i32>(a: uint16x8_t, b: uint16x8_t) -> uint16x
transmute(vshiftins_v8i16(
transmute(a),
transmute(b),
int16x8_t(n, n, n, n, n, n, n, n),
int16x8_t::splat(n),
))
}
/// Shift Right and Insert (immediate)
@ -1289,7 +1285,7 @@ pub unsafe fn vsri_n_u32<const N: i32>(a: uint32x2_t, b: uint32x2_t) -> uint32x2
transmute(vshiftins_v2i32(
transmute(a),
transmute(b),
int32x2_t(-N, -N),
int32x2_t::splat(-N),
))
}
/// Shift Right and Insert (immediate)
@ -1303,7 +1299,7 @@ pub unsafe fn vsriq_n_u32<const N: i32>(a: uint32x4_t, b: uint32x4_t) -> uint32x
transmute(vshiftins_v4i32(
transmute(a),
transmute(b),
int32x4_t(-N, -N, -N, -N),
int32x4_t::splat(-N),
))
}
/// Shift Right and Insert (immediate)
@ -1317,7 +1313,7 @@ pub unsafe fn vsri_n_u64<const N: i32>(a: uint64x1_t, b: uint64x1_t) -> uint64x1
transmute(vshiftins_v1i64(
transmute(a),
transmute(b),
int64x1_t(-N as i64),
int64x1_t::splat(-N as i64),
))
}
/// Shift Right and Insert (immediate)
@ -1331,7 +1327,7 @@ pub unsafe fn vsriq_n_u64<const N: i32>(a: uint64x2_t, b: uint64x2_t) -> uint64x
transmute(vshiftins_v2i64(
transmute(a),
transmute(b),
int64x2_t(-N as i64, -N as i64),
int64x2_t::splat(-N as i64),
))
}
/// Shift Right and Insert (immediate)
@ -1346,7 +1342,7 @@ pub unsafe fn vsri_n_p8<const N: i32>(a: poly8x8_t, b: poly8x8_t) -> poly8x8_t {
transmute(vshiftins_v8i8(
transmute(a),
transmute(b),
int8x8_t(n, n, n, n, n, n, n, n),
int8x8_t::splat(n),
))
}
/// Shift Right and Insert (immediate)
@ -1361,7 +1357,7 @@ pub unsafe fn vsriq_n_p8<const N: i32>(a: poly8x16_t, b: poly8x16_t) -> poly8x16
transmute(vshiftins_v16i8(
transmute(a),
transmute(b),
int8x16_t(n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n),
int8x16_t::splat(n),
))
}
/// Shift Right and Insert (immediate)
@ -1376,7 +1372,7 @@ pub unsafe fn vsri_n_p16<const N: i32>(a: poly16x4_t, b: poly16x4_t) -> poly16x4
transmute(vshiftins_v4i16(
transmute(a),
transmute(b),
int16x4_t(n, n, n, n),
int16x4_t::splat(n),
))
}
/// Shift Right and Insert (immediate)
@ -1391,7 +1387,7 @@ pub unsafe fn vsriq_n_p16<const N: i32>(a: poly16x8_t, b: poly16x8_t) -> poly16x
transmute(vshiftins_v8i16(
transmute(a),
transmute(b),
int16x8_t(n, n, n, n, n, n, n, n),
int16x8_t::splat(n),
))
}
@ -1408,7 +1404,7 @@ pub unsafe fn vsri_n_p64<const N: i32>(a: poly64x1_t, b: poly64x1_t) -> poly64x1
transmute(vshiftins_v1i64(
transmute(a),
transmute(b),
int64x1_t(-N as i64),
int64x1_t::splat(-N as i64),
))
}
@ -1425,7 +1421,7 @@ pub unsafe fn vsriq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x
transmute(vshiftins_v2i64(
transmute(a),
transmute(b),
int64x2_t(-N as i64, -N as i64),
int64x2_t::splat(-N as i64),
))
}

5
library/stdarch/crates/core_arch/src/arm/simd32.rs
View file

@ -65,15 +65,16 @@
#[cfg(test)]
use stdarch_test::assert_instr;
use crate::intrinsics::simd::simd_shuffle;
use crate::{core_arch::arm::dsp::int16x2_t, mem::transmute};
types! {
/// ARM-specific 32-bit wide vector of four packed `i8`.
#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
pub struct int8x4_t(i8, i8, i8, i8);
pub struct int8x4_t(4 x i8);
/// ARM-specific 32-bit wide vector of four packed `u8`.
#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
pub struct uint8x4_t(u8, u8, u8, u8);
pub struct uint8x4_t(4 x u8);
}
macro_rules! dsp_call {

74
library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs
View file

@ -21990,7 +21990,7 @@ pub unsafe fn vqrshrn_n_s16<const N: i32>(a: int16x8_t) -> int8x8_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftns.v8i8")]
fn vqrshrn_n_s16_(a: int16x8_t, n: int16x8_t) -> int8x8_t;
}
vqrshrn_n_s16_(a, int16x8_t(-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16))
vqrshrn_n_s16_(a, int16x8_t([-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16]))
}
/// Signed saturating rounded shift right narrow
@ -22028,7 +22028,7 @@ pub unsafe fn vqrshrn_n_s32<const N: i32>(a: int32x4_t) -> int16x4_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftns.v4i16")]
fn vqrshrn_n_s32_(a: int32x4_t, n: int32x4_t) -> int16x4_t;
}
vqrshrn_n_s32_(a, int32x4_t(-N as i32, -N as i32, -N as i32, -N as i32))
vqrshrn_n_s32_(a, int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]))
}
/// Signed saturating rounded shift right narrow
@ -22066,7 +22066,7 @@ pub unsafe fn vqrshrn_n_s64<const N: i32>(a: int64x2_t) -> int32x2_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftns.v2i32")]
fn vqrshrn_n_s64_(a: int64x2_t, n: int64x2_t) -> int32x2_t;
}
vqrshrn_n_s64_(a, int64x2_t(-N as i64, -N as i64))
vqrshrn_n_s64_(a, int64x2_t([-N as i64, -N as i64]))
}
/// Signed saturating rounded shift right narrow
@ -22104,7 +22104,7 @@ pub unsafe fn vqrshrn_n_u16<const N: i32>(a: uint16x8_t) -> uint8x8_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnu.v8i8")]
fn vqrshrn_n_u16_(a: uint16x8_t, n: uint16x8_t) -> uint8x8_t;
}
vqrshrn_n_u16_(a, uint16x8_t(-N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16))
vqrshrn_n_u16_(a, uint16x8_t([-N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16]))
}
/// Unsigned signed saturating rounded shift right narrow
@ -22142,7 +22142,7 @@ pub unsafe fn vqrshrn_n_u32<const N: i32>(a: uint32x4_t) -> uint16x4_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnu.v4i16")]
fn vqrshrn_n_u32_(a: uint32x4_t, n: uint32x4_t) -> uint16x4_t;
}
vqrshrn_n_u32_(a, uint32x4_t(-N as u32, -N as u32, -N as u32, -N as u32))
vqrshrn_n_u32_(a, uint32x4_t([-N as u32, -N as u32, -N as u32, -N as u32]))
}
/// Unsigned signed saturating rounded shift right narrow
@ -22180,7 +22180,7 @@ pub unsafe fn vqrshrn_n_u64<const N: i32>(a: uint64x2_t) -> uint32x2_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnu.v2i32")]
fn vqrshrn_n_u64_(a: uint64x2_t, n: uint64x2_t) -> uint32x2_t;
}
vqrshrn_n_u64_(a, uint64x2_t(-N as u64, -N as u64))
vqrshrn_n_u64_(a, uint64x2_t([-N as u64, -N as u64]))
}
/// Unsigned signed saturating rounded shift right narrow
@ -22218,7 +22218,7 @@ pub unsafe fn vqrshrun_n_s16<const N: i32>(a: int16x8_t) -> uint8x8_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnsu.v8i8")]
fn vqrshrun_n_s16_(a: int16x8_t, n: int16x8_t) -> uint8x8_t;
}
vqrshrun_n_s16_(a, int16x8_t(-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16))
vqrshrun_n_s16_(a, int16x8_t([-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16]))
}
/// Signed saturating rounded shift right unsigned narrow
@ -22256,7 +22256,7 @@ pub unsafe fn vqrshrun_n_s32<const N: i32>(a: int32x4_t) -> uint16x4_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnsu.v4i16")]
fn vqrshrun_n_s32_(a: int32x4_t, n: int32x4_t) -> uint16x4_t;
}
vqrshrun_n_s32_(a, int32x4_t(-N as i32, -N as i32, -N as i32, -N as i32))
vqrshrun_n_s32_(a, int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]))
}
/// Signed saturating rounded shift right unsigned narrow
@ -22294,7 +22294,7 @@ pub unsafe fn vqrshrun_n_s64<const N: i32>(a: int64x2_t) -> uint32x2_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnsu.v2i32")]
fn vqrshrun_n_s64_(a: int64x2_t, n: int64x2_t) -> uint32x2_t;
}
vqrshrun_n_s64_(a, int64x2_t(-N as i64, -N as i64))
vqrshrun_n_s64_(a, int64x2_t([-N as i64, -N as i64]))
}
/// Signed saturating rounded shift right unsigned narrow
@ -22908,7 +22908,7 @@ pub unsafe fn vqshlu_n_s8<const N: i32>(a: int8x8_t) -> uint8x8_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v8i8")]
fn vqshlu_n_s8_(a: int8x8_t, n: int8x8_t) -> uint8x8_t;
}
vqshlu_n_s8_(a, int8x8_t(N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8))
vqshlu_n_s8_(a, int8x8_t([N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8]))
}
/// Signed saturating shift left unsigned
@ -22927,7 +22927,7 @@ pub unsafe fn vqshlu_n_s8<const N: i32>(a: int8x8_t) -> uint8x8_t {
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v8i8")]
fn vqshlu_n_s8_(a: int8x8_t, n: int8x8_t) -> uint8x8_t;
}
vqshlu_n_s8_(a, int8x8_t(N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8))
vqshlu_n_s8_(a, int8x8_t([N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8]))
}
/// Signed saturating shift left unsigned
@ -22946,7 +22946,7 @@ pub unsafe fn vqshlu_n_s16<const N: i32>(a: int16x4_t) -> uint16x4_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v4i16")]
fn vqshlu_n_s16_(a: int16x4_t, n: int16x4_t) -> uint16x4_t;
}
vqshlu_n_s16_(a, int16x4_t(N as i16, N as i16, N as i16, N as i16))
vqshlu_n_s16_(a, int16x4_t([N as i16, N as i16, N as i16, N as i16]))
}
/// Signed saturating shift left unsigned
@ -22965,7 +22965,7 @@ pub unsafe fn vqshlu_n_s16<const N: i32>(a: int16x4_t) -> uint16x4_t {
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v4i16")]
fn vqshlu_n_s16_(a: int16x4_t, n: int16x4_t) -> uint16x4_t;
}
vqshlu_n_s16_(a, int16x4_t(N as i16, N as i16, N as i16, N as i16))
vqshlu_n_s16_(a, int16x4_t([N as i16, N as i16, N as i16, N as i16]))
}
/// Signed saturating shift left unsigned
@ -22984,7 +22984,7 @@ pub unsafe fn vqshlu_n_s32<const N: i32>(a: int32x2_t) -> uint32x2_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v2i32")]
fn vqshlu_n_s32_(a: int32x2_t, n: int32x2_t) -> uint32x2_t;
}
vqshlu_n_s32_(a, int32x2_t(N as i32, N as i32))
vqshlu_n_s32_(a, int32x2_t([N as i32, N as i32]))
}
/// Signed saturating shift left unsigned
@ -23003,7 +23003,7 @@ pub unsafe fn vqshlu_n_s32<const N: i32>(a: int32x2_t) -> uint32x2_t {
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v2i32")]
fn vqshlu_n_s32_(a: int32x2_t, n: int32x2_t) -> uint32x2_t;
}
vqshlu_n_s32_(a, int32x2_t(N as i32, N as i32))
vqshlu_n_s32_(a, int32x2_t([N as i32, N as i32]))
}
/// Signed saturating shift left unsigned
@ -23022,7 +23022,7 @@ pub unsafe fn vqshlu_n_s64<const N: i32>(a: int64x1_t) -> uint64x1_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v1i64")]
fn vqshlu_n_s64_(a: int64x1_t, n: int64x1_t) -> uint64x1_t;
}
vqshlu_n_s64_(a, int64x1_t(N as i64))
vqshlu_n_s64_(a, int64x1_t([N as i64]))
}
/// Signed saturating shift left unsigned
@ -23041,7 +23041,7 @@ pub unsafe fn vqshlu_n_s64<const N: i32>(a: int64x1_t) -> uint64x1_t {
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v1i64")]
fn vqshlu_n_s64_(a: int64x1_t, n: int64x1_t) -> uint64x1_t;
}
vqshlu_n_s64_(a, int64x1_t(N as i64))
vqshlu_n_s64_(a, int64x1_t([N as i64]))
}
/// Signed saturating shift left unsigned
@ -23060,7 +23060,7 @@ pub unsafe fn vqshluq_n_s8<const N: i32>(a: int8x16_t) -> uint8x16_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v16i8")]
fn vqshluq_n_s8_(a: int8x16_t, n: int8x16_t) -> uint8x16_t;
}
vqshluq_n_s8_(a, int8x16_t(N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8))
vqshluq_n_s8_(a, int8x16_t([N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8]))
}
/// Signed saturating shift left unsigned
@ -23079,7 +23079,7 @@ pub unsafe fn vqshluq_n_s8<const N: i32>(a: int8x16_t) -> uint8x16_t {
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v16i8")]
fn vqshluq_n_s8_(a: int8x16_t, n: int8x16_t) -> uint8x16_t;
}
vqshluq_n_s8_(a, int8x16_t(N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8))
vqshluq_n_s8_(a, int8x16_t([N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8]))
}
/// Signed saturating shift left unsigned
@ -23098,7 +23098,7 @@ pub unsafe fn vqshluq_n_s16<const N: i32>(a: int16x8_t) -> uint16x8_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v8i16")]
fn vqshluq_n_s16_(a: int16x8_t, n: int16x8_t) -> uint16x8_t;
}
vqshluq_n_s16_(a, int16x8_t(N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16))
vqshluq_n_s16_(a, int16x8_t([N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16]))
}
/// Signed saturating shift left unsigned
@ -23117,7 +23117,7 @@ pub unsafe fn vqshluq_n_s16<const N: i32>(a: int16x8_t) -> uint16x8_t {
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v8i16")]
fn vqshluq_n_s16_(a: int16x8_t, n: int16x8_t) -> uint16x8_t;
}
vqshluq_n_s16_(a, int16x8_t(N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16))
vqshluq_n_s16_(a, int16x8_t([N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16]))
}
/// Signed saturating shift left unsigned
@ -23136,7 +23136,7 @@ pub unsafe fn vqshluq_n_s32<const N: i32>(a: int32x4_t) -> uint32x4_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v4i32")]
fn vqshluq_n_s32_(a: int32x4_t, n: int32x4_t) -> uint32x4_t;
}
vqshluq_n_s32_(a, int32x4_t(N as i32, N as i32, N as i32, N as i32))
vqshluq_n_s32_(a, int32x4_t([N as i32, N as i32, N as i32, N as i32]))
}
/// Signed saturating shift left unsigned
@ -23155,7 +23155,7 @@ pub unsafe fn vqshluq_n_s32<const N: i32>(a: int32x4_t) -> uint32x4_t {
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v4i32")]
fn vqshluq_n_s32_(a: int32x4_t, n: int32x4_t) -> uint32x4_t;
}
vqshluq_n_s32_(a, int32x4_t(N as i32, N as i32, N as i32, N as i32))
vqshluq_n_s32_(a, int32x4_t([N as i32, N as i32, N as i32, N as i32]))
}
/// Signed saturating shift left unsigned
@ -23174,7 +23174,7 @@ pub unsafe fn vqshluq_n_s64<const N: i32>(a: int64x2_t) -> uint64x2_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v2i64")]
fn vqshluq_n_s64_(a: int64x2_t, n: int64x2_t) -> uint64x2_t;
}
vqshluq_n_s64_(a, int64x2_t(N as i64, N as i64))
vqshluq_n_s64_(a, int64x2_t([N as i64, N as i64]))
}
/// Signed saturating shift left unsigned
@ -23193,7 +23193,7 @@ pub unsafe fn vqshluq_n_s64<const N: i32>(a: int64x2_t) -> uint64x2_t {
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v2i64")]
fn vqshluq_n_s64_(a: int64x2_t, n: int64x2_t) -> uint64x2_t;
}
vqshluq_n_s64_(a, int64x2_t(N as i64, N as i64))
vqshluq_n_s64_(a, int64x2_t([N as i64, N as i64]))
}
/// Signed saturating shift right narrow
@ -23212,7 +23212,7 @@ pub unsafe fn vqshrn_n_s16<const N: i32>(a: int16x8_t) -> int8x8_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftns.v8i8")]
fn vqshrn_n_s16_(a: int16x8_t, n: int16x8_t) -> int8x8_t;
}
vqshrn_n_s16_(a, int16x8_t(-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16))
vqshrn_n_s16_(a, int16x8_t([-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16]))
}
/// Signed saturating shift right narrow
@ -23250,7 +23250,7 @@ pub unsafe fn vqshrn_n_s32<const N: i32>(a: int32x4_t) -> int16x4_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftns.v4i16")]
fn vqshrn_n_s32_(a: int32x4_t, n: int32x4_t) -> int16x4_t;
}
vqshrn_n_s32_(a, int32x4_t(-N as i32, -N as i32, -N as i32, -N as i32))
vqshrn_n_s32_(a, int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]))
}
/// Signed saturating shift right narrow
@ -23288,7 +23288,7 @@ pub unsafe fn vqshrn_n_s64<const N: i32>(a: int64x2_t) -> int32x2_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftns.v2i32")]
fn vqshrn_n_s64_(a: int64x2_t, n: int64x2_t) -> int32x2_t;
}
vqshrn_n_s64_(a, int64x2_t(-N as i64, -N as i64))
vqshrn_n_s64_(a, int64x2_t([-N as i64, -N as i64]))
}
/// Signed saturating shift right narrow
@ -23326,7 +23326,7 @@ pub unsafe fn vqshrn_n_u16<const N: i32>(a: uint16x8_t) -> uint8x8_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnu.v8i8")]
fn vqshrn_n_u16_(a: uint16x8_t, n: uint16x8_t) -> uint8x8_t;
}
vqshrn_n_u16_(a, uint16x8_t(-N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16))
vqshrn_n_u16_(a, uint16x8_t([-N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16]))
}
/// Unsigned saturating shift right narrow
@ -23364,7 +23364,7 @@ pub unsafe fn vqshrn_n_u32<const N: i32>(a: uint32x4_t) -> uint16x4_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnu.v4i16")]
fn vqshrn_n_u32_(a: uint32x4_t, n: uint32x4_t) -> uint16x4_t;
}
vqshrn_n_u32_(a, uint32x4_t(-N as u32, -N as u32, -N as u32, -N as u32))
vqshrn_n_u32_(a, uint32x4_t([-N as u32, -N as u32, -N as u32, -N as u32]))
}
/// Unsigned saturating shift right narrow
@ -23402,7 +23402,7 @@ pub unsafe fn vqshrn_n_u64<const N: i32>(a: uint64x2_t) -> uint32x2_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnu.v2i32")]
fn vqshrn_n_u64_(a: uint64x2_t, n: uint64x2_t) -> uint32x2_t;
}
vqshrn_n_u64_(a, uint64x2_t(-N as u64, -N as u64))
vqshrn_n_u64_(a, uint64x2_t([-N as u64, -N as u64]))
}
/// Unsigned saturating shift right narrow
@ -23440,7 +23440,7 @@ pub unsafe fn vqshrun_n_s16<const N: i32>(a: int16x8_t) -> uint8x8_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnsu.v8i8")]
fn vqshrun_n_s16_(a: int16x8_t, n: int16x8_t) -> uint8x8_t;
}
vqshrun_n_s16_(a, int16x8_t(-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16))
vqshrun_n_s16_(a, int16x8_t([-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16]))
}
/// Signed saturating shift right unsigned narrow
@ -23478,7 +23478,7 @@ pub unsafe fn vqshrun_n_s32<const N: i32>(a: int32x4_t) -> uint16x4_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnsu.v4i16")]
fn vqshrun_n_s32_(a: int32x4_t, n: int32x4_t) -> uint16x4_t;
}
vqshrun_n_s32_(a, int32x4_t(-N as i32, -N as i32, -N as i32, -N as i32))
vqshrun_n_s32_(a, int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]))
}
/// Signed saturating shift right unsigned narrow
@ -23516,7 +23516,7 @@ pub unsafe fn vqshrun_n_s64<const N: i32>(a: int64x2_t) -> uint32x2_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnsu.v2i32")]
fn vqshrun_n_s64_(a: int64x2_t, n: int64x2_t) -> uint32x2_t;
}
vqshrun_n_s64_(a, int64x2_t(-N as i64, -N as i64))
vqshrun_n_s64_(a, int64x2_t([-N as i64, -N as i64]))
}
/// Signed saturating shift right unsigned narrow
@ -28234,7 +28234,7 @@ pub unsafe fn vrshrn_n_s16<const N: i32>(a: int16x8_t) -> int8x8_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrshiftn.v8i8")]
fn vrshrn_n_s16_(a: int16x8_t, n: int16x8_t) -> int8x8_t;
}
vrshrn_n_s16_(a, int16x8_t(-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16))
vrshrn_n_s16_(a, int16x8_t([-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16]))
}
/// Rounding shift right narrow
@ -28272,7 +28272,7 @@ pub unsafe fn vrshrn_n_s32<const N: i32>(a: int32x4_t) -> int16x4_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrshiftn.v4i16")]
fn vrshrn_n_s32_(a: int32x4_t, n: int32x4_t) -> int16x4_t;
}
vrshrn_n_s32_(a, int32x4_t(-N as i32, -N as i32, -N as i32, -N as i32))
vrshrn_n_s32_(a, int32x4_t([-N as i32, -N as i32, -N as i32, -N as i32]))
}
/// Rounding shift right narrow
@ -28310,7 +28310,7 @@ pub unsafe fn vrshrn_n_s64<const N: i32>(a: int64x2_t) -> int32x2_t {
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrshiftn.v2i32")]
fn vrshrn_n_s64_(a: int64x2_t, n: int64x2_t) -> int32x2_t;
}
vrshrn_n_s64_(a, int64x2_t(-N as i64, -N as i64))
vrshrn_n_s64_(a, int64x2_t([-N as i64, -N as i64]))
}
/// Rounding shift right narrow

304
library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs
View file

File diff suppressed because it is too large Load diff

36
library/stdarch/crates/core_arch/src/loongarch64/lasx/types.rs
View file

@ -1,57 +1,41 @@
types! {
/// LOONGARCH-specific 256-bit wide vector of 32 packed `i8`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v32i8(
pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8,
pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8,
pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8,
pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8,
);
pub struct v32i8(32 x pub(crate) i8);
/// LOONGARCH-specific 256-bit wide vector of 16 packed `i16`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v16i16(
pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16,
pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16,
);
pub struct v16i16(16 x pub(crate) i16);
/// LOONGARCH-specific 256-bit wide vector of 8 packed `i32`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v8i32(pub(crate) i32, pub(crate) i32, pub(crate) i32, pub(crate) i32, pub(crate) i32, pub(crate) i32, pub(crate) i32, pub(crate) i32);
pub struct v8i32(8 x pub(crate) i32);
/// LOONGARCH-specific 256-bit wide vector of 4 packed `i64`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v4i64(pub(crate) i64, pub(crate) i64, pub(crate) i64, pub(crate) i64);
pub struct v4i64(4 x pub(crate) i64);
/// LOONGARCH-specific 256-bit wide vector of 32 packed `u8`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v32u8(
pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8,
pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8,
pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8,
pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8,
);
pub struct v32u8(32 x pub(crate) u8);
/// LOONGARCH-specific 256-bit wide vector of 16 packed `u16`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v16u16(
pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16,
pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16,
);
pub struct v16u16(16 x pub(crate) u16);
/// LOONGARCH-specific 256-bit wide vector of 8 packed `u32`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v8u32(pub(crate) u32, pub(crate) u32, pub(crate) u32, pub(crate) u32, pub(crate) u32, pub(crate) u32, pub(crate) u32, pub(crate) u32);
pub struct v8u32(8 x pub(crate) u32);
/// LOONGARCH-specific 256-bit wide vector of 4 packed `u64`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v4u64(pub(crate) u64, pub(crate) u64, pub(crate) u64, pub(crate) u64);
pub struct v4u64(4 x pub(crate) u64);
/// LOONGARCH-specific 128-bit wide vector of 8 packed `f32`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v8f32(pub(crate) f32, pub(crate) f32, pub(crate) f32, pub(crate) f32, pub(crate) f32, pub(crate) f32, pub(crate) f32, pub(crate) f32);
pub struct v8f32(8 x pub(crate) f32);
/// LOONGARCH-specific 256-bit wide vector of 4 packed `f64`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v4f64(pub(crate) f64, pub(crate) f64, pub(crate) f64, pub(crate) f64);
pub struct v4f64(4 x pub(crate) f64);
}

20
library/stdarch/crates/core_arch/src/loongarch64/lsx/types.rs
View file

@ -1,41 +1,41 @@
types! {
/// LOONGARCH-specific 128-bit wide vector of 16 packed `i8`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v16i8(pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8, pub(crate) i8);
pub struct v16i8(16 x pub(crate) i8);
/// LOONGARCH-specific 128-bit wide vector of 8 packed `i16`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v8i16(pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16, pub(crate) i16);
pub struct v8i16(8 x pub(crate) i16);
/// LOONGARCH-specific 128-bit wide vector of 4 packed `i32`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v4i32(pub(crate) i32, pub(crate) i32, pub(crate) i32, pub(crate) i32);
pub struct v4i32(4 x pub(crate) i32);
/// LOONGARCH-specific 128-bit wide vector of 2 packed `i64`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v2i64(pub(crate) i64, pub(crate) i64);
pub struct v2i64(2 x pub(crate) i64);
/// LOONGARCH-specific 128-bit wide vector of 16 packed `u8`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v16u8(pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8, pub(crate) u8);
pub struct v16u8(16 x pub(crate) u8);
/// LOONGARCH-specific 128-bit wide vector of 8 packed `u16`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v8u16(pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16, pub(crate) u16);
pub struct v8u16(8 x pub(crate) u16);
/// LOONGARCH-specific 128-bit wide vector of 4 packed `u32`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v4u32(pub(crate) u32, pub(crate) u32, pub(crate) u32, pub(crate) u32);
pub struct v4u32(4 x pub(crate) u32);
/// LOONGARCH-specific 128-bit wide vector of 2 packed `u64`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v2u64(pub(crate) u64, pub(crate) u64);
pub struct v2u64(2 x pub(crate) u64);
/// LOONGARCH-specific 128-bit wide vector of 4 packed `f32`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v4f32(pub(crate) f32, pub(crate) f32, pub(crate) f32, pub(crate) f32);
pub struct v4f32(4 x pub(crate) f32);
/// LOONGARCH-specific 128-bit wide vector of 2 packed `f64`.
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub struct v2f64(pub(crate) f64, pub(crate) f64);
pub struct v2f64(2 x pub(crate) f64);
}

19
library/stdarch/crates/core_arch/src/macros.rs
View file

@ -52,14 +52,29 @@ macro_rules! static_assert_simm_bits {
macro_rules! types {
($(
$(#[$doc:meta])*
pub struct $name:ident($($fields:tt)*);
pub struct $name:ident($len:literal x $v:vis $elem_type:ty);
)*) => ($(
$(#[$doc])*
#[derive(Copy, Clone, Debug)]
#[allow(non_camel_case_types)]
#[repr(simd)]
#[allow(clippy::missing_inline_in_public_items)]
pub struct $name($($fields)*);
pub struct $name($v [$elem_type; $len]);
impl $name {
/// Using `my_simd([x; N])` seemingly fails tests,
/// so use this internal helper for it instead.
#[inline(always)]
$v fn splat(value: $elem_type) -> $name {
#[derive(Copy, Clone)]
#[repr(simd)]
struct JustOne([$elem_type; 1]);
let one = JustOne([value]);
// SAFETY: 0 is always in-bounds because we're shuffling
// a simd type with exactly one element.
unsafe { simd_shuffle!(one, one, [0; $len]) }
}
}
)*)
}

392
library/stdarch/crates/core_arch/src/mips/msa.rs
View file

@ -13,65 +13,43 @@ use crate::mem;
types! {
/// MIPS-specific 128-bit wide vector of 16 packed `i8`.
#[unstable(feature = "stdarch_mips", issue = "111198")]
pub struct v16i8(
i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
);
pub struct v16i8(16 x i8);
/// MIPS-specific 128-bit wide vector of 8 packed `i16`.
#[unstable(feature = "stdarch_mips", issue = "111198")]
pub struct v8i16(
i16, i16, i16, i16, i16, i16, i16, i16,
);
pub struct v8i16(8 x i16);
/// MIPS-specific 128-bit wide vector of 4 packed `i32`.
#[unstable(feature = "stdarch_mips", issue = "111198")]
pub struct v4i32(
i32, i32, i32, i32,
);
pub struct v4i32(4 x i32);
/// MIPS-specific 128-bit wide vector of 2 packed `i64`.
#[unstable(feature = "stdarch_mips", issue = "111198")]
pub struct v2i64(
i64, i64,
);
pub struct v2i64(2 x i64);
/// MIPS-specific 128-bit wide vector of 16 packed `u8`.
#[unstable(feature = "stdarch_mips", issue = "111198")]
pub struct v16u8(
u8, u8, u8, u8, u8, u8, u8, u8,
u8, u8, u8, u8, u8, u8, u8, u8,
);
pub struct v16u8(16 x u8);
/// MIPS-specific 128-bit wide vector of 8 packed `u16`.
#[unstable(feature = "stdarch_mips", issue = "111198")]
pub struct v8u16(
u16, u16, u16, u16, u16, u16, u16, u16,
);
pub struct v8u16(8 x u16);
/// MIPS-specific 128-bit wide vector of 4 packed `u32`.
#[unstable(feature = "stdarch_mips", issue = "111198")]
pub struct v4u32(
u32, u32, u32, u32,
);
pub struct v4u32(4 x u32);
/// MIPS-specific 128-bit wide vector of 2 packed `u64`.
#[unstable(feature = "stdarch_mips", issue = "111198")]
pub struct v2u64(
u64, u64,
);
pub struct v2u64(2 x u64);
// / MIPS-specific 128-bit wide vector of 4 packed `f32`.
#[unstable(feature = "stdarch_mips", issue = "111198")]
pub struct v4f32(
f32, f32, f32, f32,
);
pub struct v4f32(4 x f32);
/// MIPS-specific 128-bit wide vector of 2 packed `f64`.
#[unstable(feature = "stdarch_mips", issue = "111198")]
pub struct v2f64(
f64, f64,
);
pub struct v2f64(2 x f64);
}
#[allow(improper_ctypes)]
@ -9239,8 +9217,8 @@ mod tests {
#[rustfmt::skip]
let r = i8x16::new(
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5
);
@ -9313,9 +9291,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
104, 127, 102, 127,
104, 127, 102, 127,
104, 127, 102, 127,
104, 127, 102, 127,
104, 127, 102, 127,
104, 127, 102, 127,
104, 127, 102, 127
);
@ -9329,7 +9307,7 @@ mod tests {
unsafe fn test_msa_adds_a_h() {
#[rustfmt::skip]
let a = i16x8::new(
100, i16::MAX, 100, i16::MAX,
100, i16::MAX, 100, i16::MAX,
100, i16::MAX, 100, i16::MAX
);
#[rustfmt::skip]
@ -9394,9 +9372,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
96, i8::MIN, 98, i8::MAX,
96, i8::MIN, 98, i8::MAX,
96, i8::MIN, 98, i8::MAX,
96, i8::MIN, 98, i8::MAX,
96, i8::MIN, 98, i8::MAX,
96, i8::MIN, 98, i8::MAX,
96, i8::MIN, 98, i8::MAX
);
@ -9410,14 +9388,14 @@ mod tests {
unsafe fn test_msa_adds_s_h() {
#[rustfmt::skip]
let a = i16x8::new(
100, i16::MIN, 100, i16::MAX,
100, i16::MIN, 100, i16::MAX,
100, i16::MIN, 100, i16::MAX
);
#[rustfmt::skip]
let b = i16x8::new(-4, -3, -2, 1, -4, -3, -2, 1);
#[rustfmt::skip]
let r = i16x8::new(
96, i16::MIN, 98, i16::MAX,
96, i16::MIN, 98, i16::MAX,
96, i16::MIN, 98, i16::MAX
);
@ -9475,9 +9453,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
104, u8::MAX, 102, u8::MAX,
104, u8::MAX, 102, u8::MAX,
104, u8::MAX, 102, u8::MAX,
104, u8::MAX, 102, u8::MAX,
104, u8::MAX, 102, u8::MAX,
104, u8::MAX, 102, u8::MAX,
104, u8::MAX, 102, u8::MAX
);
@ -9491,14 +9469,14 @@ mod tests {
unsafe fn test_msa_adds_u_h() {
#[rustfmt::skip]
let a = u16x8::new(
100, u16::MAX, 100, u16::MAX,
100, u16::MAX, 100, u16::MAX,
100, u16::MAX, 100, u16::MAX
);
#[rustfmt::skip]
let b = u16x8::new(4, 3, 2, 1, 4, 3, 2, 1);
#[rustfmt::skip]
let r = u16x8::new(
104, u16::MAX, 102, u16::MAX,
104, u16::MAX, 102, u16::MAX,
104, u16::MAX, 102, u16::MAX
);
@ -9556,9 +9534,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
96, 125, 98, -29,
96, 125, 98, -29,
96, 125, 98, -29,
96, 125, 98, -29,
96, 125, 98, -29,
96, 125, 98, -29,
96, 125, 98, -29
);
@ -9572,7 +9550,7 @@ mod tests {
unsafe fn test_msa_addv_h() {
#[rustfmt::skip]
let a = i16x8::new(
100, i16::MIN, 100, i16::MAX,
100, i16::MIN, 100, i16::MAX,
100, i16::MIN, 100, i16::MAX
);
#[rustfmt::skip]
@ -9627,9 +9605,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
103, -126, 103, -126,
103, -126, 103, -126,
103, -126, 103, -126,
103, -126, 103, -126,
103, -126, 103, -126,
103, -126, 103, -126,
103, -126, 103, -126
);
@ -9640,12 +9618,12 @@ mod tests {
unsafe fn test_msa_addvi_h() {
#[rustfmt::skip]
let a = i16x8::new(
i16::MAX, 3276, -100, -127,
i16::MAX, 3276, -100, -127,
i16::MAX, 3276, -100, -127
);
#[rustfmt::skip]
let r = i16x8::new(
-32766, 3279, -97, -124,
-32766, 3279, -97, -124,
-32766, 3279, -97, -124
);
@ -9690,9 +9668,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
4, 3, 0, 100,
4, 3, 0, 100,
4, 3, 0, 100,
4, 3, 0, 100,
4, 3, 0, 100,
4, 3, 0, 100,
4, 3, 0, 100
);
@ -9713,9 +9691,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
4, 5, 4, 5,
4, 5, 4, 5,
4, 5, 4, 5,
4, 5, 4, 5,
4, 5, 4, 5,
4, 5, 4, 5,
4, 5, 4, 5
);
@ -9740,9 +9718,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5
);
@ -9815,9 +9793,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5,
5, 5, 5, 5
);
@ -9890,9 +9868,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
2, -5, 2, -7,
2, -5, 2, -7,
2, -5, 2, -7,
2, -5, 2, -7,
2, -5, 2, -7,
2, -5, 2, -7,
2, -5, 2, -7
);
@ -9965,9 +9943,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
3, 4, 5, 6,
3, 4, 5, 6,
3, 4, 5, 6,
3, 4, 5, 6,
3, 4, 5, 6,
3, 4, 5, 6,
3, 4, 5, 6
);
@ -10040,9 +10018,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
-3, 3, -2, -6,
-3, 3, -2, -6,
-3, 3, -2, -6,
-3, 3, -2, -6,
-3, 3, -2, -6,
-3, 3, -2, -6,
-3, 3, -2, -6
);
@ -10115,9 +10093,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
4, 5, 6, 7,
4, 5, 6, 7,
4, 5, 6, 7,
4, 5, 6, 7,
4, 5, 6, 7,
4, 5, 6, 7,
4, 5, 6, 7
);
@ -10190,9 +10168,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
191, 27, 54, 1,
191, 27, 54, 1,
191, 27, 54, 1,
191, 27, 54, 1,
191, 27, 54, 1,
191, 27, 54, 1,
191, 27, 54, 1
);
@ -10258,9 +10236,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
247, 147, 55, 1,
247, 147, 55, 1,
247, 147, 55, 1,
247, 147, 55, 1,
247, 147, 55, 1,
247, 147, 55, 1,
247, 147, 55, 1
);
@ -10322,9 +10300,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
63, 11, 11, 1,
63, 11, 11, 1,
63, 11, 11, 1,
63, 11, 11, 1,
63, 11, 11, 1,
63, 11, 11, 1,
63, 11, 11, 1
);
@ -10342,22 +10320,22 @@ mod tests {
unsafe fn test_msa_binsl_h() {
#[rustfmt::skip]
let a = u16x8::new(
32767, 16384, 8192, 4096,
32767, 16384, 8192, 4096,
32767, 16384, 8192, 4096
);
#[rustfmt::skip]
let b = u16x8::new(
21656, 5273, 7081, 2985,
21656, 5273, 7081, 2985,
21656, 5273, 7081, 2985
);
#[rustfmt::skip]
let c = u16x8::new(
3, 7, 9, 13,
3, 7, 9, 13,
15, 17, 21, 23
);
#[rustfmt::skip]
let r = u16x8::new(
24575, 5120, 7040, 2984,
24575, 5120, 7040, 2984,
21656, 0, 6144, 2816
);
@ -10431,9 +10409,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
7, 7, 11, 9,
7, 7, 11, 9,
7, 7, 11, 9,
7, 7, 11, 9,
7, 7, 11, 9,
7, 7, 11, 9,
7, 7, 11, 9
);
@ -10447,17 +10425,17 @@ mod tests {
unsafe fn test_msa_binsli_h() {
#[rustfmt::skip]
let a = u16x8::new(
32767, 16384, 8192, 4096,
32767, 16384, 8192, 4096,
32767, 16384, 8192, 4096
);
#[rustfmt::skip]
let b = u16x8::new(
21656, 5273, 7081, 2985,
21656, 5273, 7081, 2985,
21656, 5273, 7081, 2985
);
#[rustfmt::skip]
let r = u16x8::new(
21659, 5272, 7080, 2984,
21659, 5272, 7080, 2984,
21659, 5272, 7080, 2984
);
@ -10522,9 +10500,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
254, 151, 8, 1,
254, 151, 8, 1,
254, 151, 8, 1,
254, 151, 8, 1,
254, 151, 8, 1,
254, 151, 8, 1,
254, 151, 8, 1
);
@ -10542,22 +10520,22 @@ mod tests {
unsafe fn test_msa_binsr_h() {
#[rustfmt::skip]
let a = u16x8::new(
32767, 16384, 8192, 4096,
32767, 16384, 8192, 4096,
32767, 16384, 8192, 4096
);
#[rustfmt::skip]
let b = u16x8::new(
21656, 5273, 7081, 2985,
21656, 5273, 7081, 2985,
21656, 5273, 7081, 2985
);
#[rustfmt::skip]
let c = u16x8::new(
3, 7, 9, 13,
3, 7, 9, 13,
15, 17, 21, 23
);
#[rustfmt::skip]
let r = u16x8::new(
32760, 16537, 9129, 2985,
32760, 16537, 9129, 2985,
21656, 16385, 8233, 4265
);
@ -10631,9 +10609,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
198, 135, 8, 9,
198, 135, 8, 9,
198, 135, 8, 9,
198, 135, 8, 9,
198, 135, 8, 9,
198, 135, 8, 9,
198, 135, 8, 9
);
@ -10647,17 +10625,17 @@ mod tests {
unsafe fn test_msa_binsri_h() {
#[rustfmt::skip]
let a = u16x8::new(
32767, 16384, 8192, 4096,
32767, 16384, 8192, 4096,
32767, 16384, 8192, 4096
);
#[rustfmt::skip]
let b = u16x8::new(
21656, 5273, 7081, 2985,
21656, 5273, 7081, 2985,
21656, 5273, 7081, 2985
);
#[rustfmt::skip]
let r = u16x8::new(
21656, 21657, 7081, 2985,
21656, 21657, 7081, 2985,
21656, 21657, 7081, 2985
);
@ -10722,9 +10700,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
254, 159, 48, 1,
254, 159, 48, 1,
254, 159, 48, 1,
254, 159, 48, 1,
254, 159, 48, 1,
254, 159, 48, 1,
254, 159, 48, 1
);
@ -10756,9 +10734,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
249, 159, 51, 7,
249, 159, 51, 7,
249, 159, 51, 7,
249, 159, 51, 7,
249, 159, 51, 7,
249, 159, 51, 7,
249, 159, 51, 7
);
@ -10793,9 +10771,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
7, 3, 15, 9,
7, 3, 15, 9,
7, 3, 15, 9,
7, 3, 15, 9,
7, 3, 15, 9,
7, 3, 15, 9,
7, 3, 15, 9
);
@ -10827,9 +10805,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
7, 251, 159, 49,
7, 251, 159, 49,
7, 251, 159, 49,
7, 251, 159, 49,
7, 251, 159, 49,
7, 251, 159, 49,
7, 251, 159, 49
);
@ -10857,9 +10835,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
191, 27, 54, 3,
191, 27, 54, 3,
191, 27, 54, 3,
191, 27, 54, 3,
191, 27, 54, 3,
191, 27, 54, 3,
191, 27, 54, 3
);
@ -10925,9 +10903,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
34, 116, 111, 239,
34, 116, 111, 239,
34, 116, 111, 239,
34, 116, 111, 239,
34, 116, 111, 239,
34, 116, 111, 239,
34, 116, 111, 239
);
@ -10943,7 +10921,7 @@ mod tests {
);
#[rustfmt::skip]
let r = u16x8::new(
30719, 1228, 2148, 2175,
30719, 1228, 2148, 2175,
30719, 1228, 2148, 2175
);
@ -11054,9 +11032,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
7, 3, 15, 9,
7, 3, 15, 9,
7, 3, 15, 9,
7, 3, 15, 9,
7, 3, 15, 9,
7, 3, 15, 9,
7, 3, 15, 9
);
@ -11088,9 +11066,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
121, 29, 57, 9,
121, 29, 57, 9,
121, 29, 57, 9,
121, 29, 57, 9,
121, 29, 57, 9,
121, 29, 57, 9,
121, 29, 57, 9
);
@ -11118,9 +11096,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
255, 155, 55, 3,
255, 155, 55, 3,
255, 155, 55, 3,
255, 155, 55, 3,
255, 155, 55, 3,
255, 155, 55, 3,
255, 155, 55, 3
);
@ -11186,9 +11164,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
255, 159, 55, 5,
255, 159, 55, 5,
255, 159, 55, 5,
255, 159, 55, 5,
255, 159, 55, 5,
255, 159, 55, 5,
255, 159, 55, 5
);
@ -11298,9 +11276,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
-1, 0, -1, -1,
-1, 0, -1, -1,
-1, 0, -1, -1,
-1, 0, -1, -1,
-1, 0, -1, -1,
-1, 0, -1, -1,
-1, 0, -1, -1
);
@ -11437,9 +11415,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
-1, 0, -1, 0,
-1, 0, -1, 0,
-1, 0, -1, 0,
-1, 0, -1, 0,
-1, 0, -1, 0,
-1, 0, -1, 0,
-1, 0, -1, 0
);
@ -11523,12 +11501,12 @@ mod tests {
unsafe fn test_msa_cle_u_h() {
#[rustfmt::skip]
let a = u16x8::new(
u16::MAX, 155, 55, 2,
u16::MAX, 155, 55, 2,
u16::MAX, 155, 55, 2
);
#[rustfmt::skip]
let b = u16x8::new(
u16::MAX, 155, 56, 1,
u16::MAX, 155, 56, 1,
u16::MAX, 155, 56, 1
);
#[rustfmt::skip]
@ -11632,9 +11610,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
-1, 0, 0, 0,
-1, 0, 0, 0,
-1, 0, 0, 0,
-1, 0, 0, 0,
-1, 0, 0, 0,
-1, 0, 0, 0,
-1, 0, 0, 0
);
@ -11692,9 +11670,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
-1, 0, -1, 0,
-1, 0, -1, 0,
-1, 0, -1, 0,
-1, 0, -1, 0,
-1, 0, -1, 0,
-1, 0, -1, 0,
-1, 0, -1, 0
);
@ -11767,9 +11745,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
0, 0, -1, 0,
0, 0, -1, 0,
0, 0, -1, 0,
0, 0, -1, 0,
0, 0, -1, 0,
0, 0, -1, 0,
0, 0, -1, 0
);
@ -11835,9 +11813,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
0, -1, 0, 0,
0, -1, 0, 0,
0, -1, 0, 0,
0, -1, 0, 0,
0, -1, 0, 0,
0, -1, 0, 0,
0, -1, 0, 0
);
@ -12051,9 +12029,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
6, 3, 2, 2,
6, 3, 2, 2,
6, 3, 2, 2,
6, 3, 2, 2,
6, 3, 2, 2,
6, 3, 2, 2,
6, 3, 2, 2
);
@ -12126,9 +12104,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
6, 3, 2, 2,
6, 3, 2, 2,
6, 3, 2, 2,
6, 3, 2, 2,
6, 3, 2, 2,
6, 3, 2, 2,
6, 3, 2, 2
);
@ -12539,14 +12517,14 @@ mod tests {
1, 2, 3, 4,
1, 2, 3, 4,
1, 2, 3, 4,
1, 2, 3, 4
1, 2, 3, 4
);
#[rustfmt::skip]
let c = u8x16::new(
6, 7, 8, 9,
6, 7, 8, 9,
6, 7, 8, 9,
6, 7, 8, 9
6, 7, 8, 9
);
#[rustfmt::skip]
let r = i16x8::new(-19, -62, -17, -64, -21, -58, -23, -56);
@ -13043,7 +13021,7 @@ mod tests {
let b = f64x2::new(1235689784512.1, 2147483649998.5);
#[rustfmt::skip]
let r = f32x4::new(
1235689800000.0, 2147483600000.0,
1235689800000.0, 2147483600000.0,
2000005.5, 2.3
);
@ -13197,7 +13175,7 @@ mod tests {
let a = i16x8::new(12, 26, 34, 48, 11, 25, 33, 47);
#[rustfmt::skip]
let r = f32x4::new(
0.00036621094, 0.00079345703,
0.00036621094, 0.00079345703,
0.0010375977, 0.0014648438
);
@ -13210,7 +13188,7 @@ mod tests {
let a = i32x4::new(1111, 2555, 3333, 475);
#[rustfmt::skip]
let r = f64x2::new(
0.0000005173496901988983,
0.0000005173496901988983,
0.0000011897645890712738
);
@ -13534,7 +13512,7 @@ mod tests {
let a = f32x4::new(2.6, -2.7, 1.3, -1.7);
#[rustfmt::skip]
let r = f32x4::new(
0.3846154, -0.37037036,
0.3846154, -0.37037036,
0.7692308, -0.58823526
);
@ -13557,7 +13535,7 @@ mod tests {
let a = f32x4::new(2.6, 2.7, 1.3, 1.7);
#[rustfmt::skip]
let r = f32x4::new(
0.6201737, 0.6085806,
0.6201737, 0.6085806,
0.87705797, 0.766965
);
@ -14784,9 +14762,9 @@ mod tests {
let p = &mut a[4] as *mut _ as *mut u8;
#[rustfmt::skip]
let r = i8x16::new(
13, 14, 15, 16,
17, 18, 19, 20,
21, 22, 23, 24,
13, 14, 15, 16,
17, 18, 19, 20,
21, 22, 23, 24,
25, 26, 27, 28
);
@ -14797,7 +14775,7 @@ mod tests {
unsafe fn test_msa_ld_h() {
#[rustfmt::skip]
let mut a : [i16; 16] = [
0, 1, 2, 3, 4, 5, 6, 7,
0, 1, 2, 3, 4, 5, 6, 7,
8, 9, 10, 11, 12, 13, 14, 15
];
let p = &mut a[4] as *mut _ as *mut u8;
@ -15963,7 +15941,7 @@ mod tests {
);
#[rustfmt::skip]
let b = i16x8::new(
1025, 1025, 1025, 1025,
1025, 1025, 1025, 1025,
1025, 1025, 1025, 1025
);
#[rustfmt::skip]
@ -17082,7 +17060,7 @@ mod tests {
#[rustfmt::skip]
let a = i16x8::new(
1, 2, 3, 4,
1, 2, 3, 4
1, 2, 3, 4
);
#[rustfmt::skip]
let r = i16x8::new(4, 8, 12, 16, 4, 8, 12, 16);
@ -17324,7 +17302,7 @@ mod tests {
unsafe fn test_msa_srai_h() {
#[rustfmt::skip]
let a = i16x8::new(
i16::MAX, 125, 55, 1,
i16::MAX, 125, 55, 1,
i16::MAX, 125, 55, 1
);
#[rustfmt::skip]
@ -17396,7 +17374,7 @@ mod tests {
);
#[rustfmt::skip]
let r = i16x8::new(
-2048, -2048, -2048, -2048,
-2048, -2048, -2048, -2048,
75, 13, 3, 1
);
@ -17579,8 +17557,8 @@ mod tests {
#[rustfmt::skip]
let r = i8x16::new(
6, 12, 25, 31,
6, 12, 25, 31,
6, 12, 25, 31,
6, 12, 25, 31,
6, 12, 25, 31,
6, 12, 25, 31
);
@ -17714,9 +17692,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
6, 13, 25, 32,
6, 13, 25, 32,
6, 13, 25, 32,
6, 13, 25, 32,
6, 13, 25, 32,
6, 13, 25, 32,
6, 13, 25, 32
);
@ -17759,9 +17737,9 @@ mod tests {
unsafe fn test_msa_st_b() {
#[rustfmt::skip]
let a = i8x16::new(
13, 14, 15, 16,
17, 18, 19, 20,
21, 22, 23, 24,
13, 14, 15, 16,
17, 18, 19, 20,
21, 22, 23, 24,
25, 26, 27, 28
);
#[rustfmt::skip]
@ -17773,9 +17751,9 @@ mod tests {
];
#[rustfmt::skip]
let r : [i8; 16] = [
13, 14, 15, 16,
17, 18, 19, 20,
21, 22, 23, 24,
13, 14, 15, 16,
17, 18, 19, 20,
21, 22, 23, 24,
25, 26, 27, 28
];
__msa_st_b(mem::transmute(a), arr.as_mut_ptr() as *mut u8, 0);
@ -17930,7 +17908,7 @@ mod tests {
unsafe fn test_msa_subs_u_h() {
#[rustfmt::skip]
let a = u16x8::new(
u16::MAX, 2, 3, 4,
u16::MAX, 2, 3, 4,
u16::MAX, 2, 3, 4
);
#[rustfmt::skip]
@ -18086,7 +18064,7 @@ mod tests {
unsafe fn test_msa_subsuu_s_h() {
#[rustfmt::skip]
let a = u16x8::new(
u16::MAX, 2, 3,
u16::MAX, 2, 3,
4, u16::MAX, 2, 3, 4
);
#[rustfmt::skip]
@ -18289,9 +18267,9 @@ mod tests {
);
#[rustfmt::skip]
let r = i8x16::new(
3, 2, 1, 4,
3, 2, 1, 4,
3, 2, 1, 4,
3, 2, 1, 4,
3, 2, 1, 4,
3, 2, 1, 4,
3, 2, 1, 4
);
@ -18394,9 +18372,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
17, 13, 13, 9,
9, 13, 13, 1,
1, 13, 13, 9,
17, 13, 13, 9,
9, 13, 13, 1,
1, 13, 13, 9,
9, 13, 13, 17
);
@ -18417,9 +18395,9 @@ mod tests {
);
#[rustfmt::skip]
let r = u8x16::new(
5, 6, 7, 0,
1, 2, 3, 12,
13, 14, 15, 8,
5, 6, 7, 0,
1, 2, 3, 12,
13, 14, 15, 8,
9, 10, 11, 20
);

23
library/stdarch/crates/core_arch/src/powerpc/altivec.rs
View file

@ -23,39 +23,36 @@ use super::macros::*;
types! {
/// PowerPC-specific 128-bit wide vector of sixteen packed `i8`
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_signed_char(i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8);
pub struct vector_signed_char(16 x i8);
/// PowerPC-specific 128-bit wide vector of sixteen packed `u8`
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_unsigned_char(u8, u8, u8, u8, u8, u8, u8, u8,
u8, u8, u8, u8, u8, u8, u8, u8);
pub struct vector_unsigned_char(16 x u8);
/// PowerPC-specific 128-bit wide vector mask of sixteen packed elements
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_bool_char(i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8);
pub struct vector_bool_char(16 x i8);
/// PowerPC-specific 128-bit wide vector of eight packed `i16`
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_signed_short(i16, i16, i16, i16, i16, i16, i16, i16);
pub struct vector_signed_short(8 x i16);
/// PowerPC-specific 128-bit wide vector of eight packed `u16`
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_unsigned_short(u16, u16, u16, u16, u16, u16, u16, u16);
pub struct vector_unsigned_short(8 x u16);
/// PowerPC-specific 128-bit wide vector mask of eight packed elements
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_bool_short(i16, i16, i16, i16, i16, i16, i16, i16);
pub struct vector_bool_short(8 x i16);
// pub struct vector_pixel(???);
/// PowerPC-specific 128-bit wide vector of four packed `i32`
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_signed_int(i32, i32, i32, i32);
pub struct vector_signed_int(4 x i32);
/// PowerPC-specific 128-bit wide vector of four packed `u32`
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_unsigned_int(u32, u32, u32, u32);
pub struct vector_unsigned_int(4 x u32);
/// PowerPC-specific 128-bit wide vector mask of four packed elements
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_bool_int(i32, i32, i32, i32);
pub struct vector_bool_int(4 x i32);
/// PowerPC-specific 128-bit wide vector of four packed `f32`
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_float(f32, f32, f32, f32);
pub struct vector_float(4 x f32);
}
#[allow(improper_ctypes)]

8
library/stdarch/crates/core_arch/src/powerpc/vsx.rs
View file

@ -20,16 +20,16 @@ types! {
// pub struct vector_Float16 = f16x8;
/// PowerPC-specific 128-bit wide vector of two packed `i64`
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_signed_long(i64, i64);
pub struct vector_signed_long(2 x i64);
/// PowerPC-specific 128-bit wide vector of two packed `u64`
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_unsigned_long(u64, u64);
pub struct vector_unsigned_long(2 x u64);
/// PowerPC-specific 128-bit wide vector mask of two `i64`
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_bool_long(i64, i64);
pub struct vector_bool_long(2 x i64);
/// PowerPC-specific 128-bit wide vector of two packed `f64`
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
pub struct vector_double(f64, f64);
pub struct vector_double(2 x f64);
// pub struct vector_signed_long_long = vector_signed_long;
// pub struct vector_unsigned_long_long = vector_unsigned_long;
// pub struct vector_bool_long_long = vector_bool_long;

172
library/stdarch/crates/core_arch/src/simd.rs
View file

@ -2,24 +2,30 @@
#![allow(non_camel_case_types)]
use crate::intrinsics::simd::simd_shuffle;
macro_rules! simd_ty {
($id:ident [$ety:ident]: $($elem_name:ident),*) => {
($id:ident [$elem_type:ty ; $len:literal]: $($param_name:ident),*) => {
#[repr(simd)]
#[derive(Copy, Clone, Debug, PartialEq)]
pub(crate) struct $id { $(pub $elem_name: $ety),* }
pub(crate) struct $id([$elem_type; $len]);
#[allow(clippy::use_self)]
impl $id {
#[inline(always)]
pub(crate) const fn new($($elem_name: $ety),*) -> Self {
$id { $($elem_name),* }
pub(crate) const fn new($($param_name: $elem_type),*) -> Self {
$id([$($param_name),*])
}
// FIXME: Workaround rust@60637
#[inline(always)]
pub(crate) const fn splat(value: $ety) -> Self {
$id { $(
$elem_name: value
),* }
pub(crate) fn splat(value: $elem_type) -> Self {
#[derive(Copy, Clone)]
#[repr(simd)]
struct JustOne([$elem_type; 1]);
let one = JustOne([value]);
// SAFETY: 0 is always in-bounds because we're shuffling
// a simd type with exactly one element.
unsafe { simd_shuffle!(one, one, [0; $len]) }
}
/// Extract the element at position `index`.
@ -27,12 +33,10 @@ macro_rules! simd_ty {
/// Use for testing only.
// FIXME: Workaround rust@60637
#[inline(always)]
pub(crate) fn extract(self, index: usize) -> $ety {
// Here we assume that there is no padding.
let len = crate::mem::size_of::<Self>() / crate::mem::size_of::<$ety>();
assert!(index < len);
pub(crate) fn extract(self, index: usize) -> $elem_type {
assert!(index < $len);
// Now that we know this is in-bounds, use pointer arithmetic to access the right element.
let self_ptr = &self as *const Self as *const $ety;
let self_ptr = &self as *const Self as *const $elem_type;
unsafe {
self_ptr.add(index).read()
}
@ -42,29 +46,33 @@ macro_rules! simd_ty {
}
macro_rules! simd_m_ty {
($id:ident [$ety:ident]: $($elem_name:ident),*) => {
($id:ident [$elem_type:ident ; $len:literal]: $($param_name:ident),*) => {
#[repr(simd)]
#[derive(Copy, Clone, Debug, PartialEq)]
pub(crate) struct $id { $(pub $elem_name: $ety),* }
pub(crate) struct $id([$elem_type; $len]);
#[allow(clippy::use_self)]
impl $id {
#[inline(always)]
const fn bool_to_internal(x: bool) -> $ety {
[0 as $ety, !(0 as $ety)][x as usize]
const fn bool_to_internal(x: bool) -> $elem_type {
[0 as $elem_type, !(0 as $elem_type)][x as usize]
}
#[inline(always)]
pub(crate) const fn new($($elem_name: bool),*) -> Self {
$id { $($elem_name: Self::bool_to_internal($elem_name)),* }
pub(crate) const fn new($($param_name: bool),*) -> Self {
$id([$(Self::bool_to_internal($param_name)),*])
}
// FIXME: Workaround rust@60637
#[inline(always)]
pub(crate) const fn splat(value: bool) -> Self {
$id { $(
$elem_name: Self::bool_to_internal(value)
),* }
pub(crate) fn splat(value: bool) -> Self {
#[derive(Copy, Clone)]
#[repr(simd)]
struct JustOne([$elem_type; 1]);
let one = JustOne([Self::bool_to_internal(value)]);
// SAFETY: 0 is always in-bounds because we're shuffling
// a simd type with exactly one element.
unsafe { simd_shuffle!(one, one, [0; $len]) }
}
}
}
@ -72,21 +80,21 @@ macro_rules! simd_m_ty {
// 16-bit wide types:
simd_ty!(u8x2[u8]: x0, x1);
simd_ty!(i8x2[i8]: x0, x1);
simd_ty!(u8x2[u8;2]: x0, x1);
simd_ty!(i8x2[i8;2]: x0, x1);
// 32-bit wide types:
simd_ty!(u8x4[u8]: x0, x1, x2, x3);
simd_ty!(u16x2[u16]: x0, x1);
simd_ty!(u8x4[u8;4]: x0, x1, x2, x3);
simd_ty!(u16x2[u16;2]: x0, x1);
simd_ty!(i8x4[i8]: x0, x1, x2, x3);
simd_ty!(i16x2[i16]: x0, x1);
simd_ty!(i8x4[i8;4]: x0, x1, x2, x3);
simd_ty!(i16x2[i16;2]: x0, x1);
// 64-bit wide types:
simd_ty!(
u8x8[u8]:
u8x8[u8;8]:
x0,
x1,
x2,
@ -96,12 +104,12 @@ simd_ty!(
x6,
x7
);
simd_ty!(u16x4[u16]: x0, x1, x2, x3);
simd_ty!(u32x2[u32]: x0, x1);
simd_ty!(u64x1[u64]: x1);
simd_ty!(u16x4[u16;4]: x0, x1, x2, x3);
simd_ty!(u32x2[u32;2]: x0, x1);
simd_ty!(u64x1[u64;1]: x1);
simd_ty!(
i8x8[i8]:
i8x8[i8;8]:
x0,
x1,
x2,
@ -111,17 +119,17 @@ simd_ty!(
x6,
x7
);
simd_ty!(i16x4[i16]: x0, x1, x2, x3);
simd_ty!(i32x2[i32]: x0, x1);
simd_ty!(i64x1[i64]: x1);
simd_ty!(i16x4[i16;4]: x0, x1, x2, x3);
simd_ty!(i32x2[i32;2]: x0, x1);
simd_ty!(i64x1[i64;1]: x1);
simd_ty!(f32x2[f32]: x0, x1);
simd_ty!(f64x1[f64]: x1);
simd_ty!(f32x2[f32;2]: x0, x1);
simd_ty!(f64x1[f64;1]: x1);
// 128-bit wide types:
simd_ty!(
u8x16[u8]:
u8x16[u8;16]:
x0,
x1,
x2,
@ -140,7 +148,7 @@ simd_ty!(
x15
);
simd_ty!(
u16x8[u16]:
u16x8[u16;8]:
x0,
x1,
x2,
@ -150,11 +158,11 @@ simd_ty!(
x6,
x7
);
simd_ty!(u32x4[u32]: x0, x1, x2, x3);
simd_ty!(u64x2[u64]: x0, x1);
simd_ty!(u32x4[u32;4]: x0, x1, x2, x3);
simd_ty!(u64x2[u64;2]: x0, x1);
simd_ty!(
i8x16[i8]:
i8x16[i8;16]:
x0,
x1,
x2,
@ -173,7 +181,7 @@ simd_ty!(
x15
);
simd_ty!(
i16x8[i16]:
i16x8[i16;8]:
x0,
x1,
x2,
@ -183,11 +191,11 @@ simd_ty!(
x6,
x7
);
simd_ty!(i32x4[i32]: x0, x1, x2, x3);
simd_ty!(i64x2[i64]: x0, x1);
simd_ty!(i32x4[i32;4]: x0, x1, x2, x3);
simd_ty!(i64x2[i64;2]: x0, x1);
simd_ty!(
f16x8[f16]:
f16x8[f16;8]:
x0,
x1,
x2,
@ -197,11 +205,11 @@ simd_ty!(
x6,
x7
);
simd_ty!(f32x4[f32]: x0, x1, x2, x3);
simd_ty!(f64x2[f64]: x0, x1);
simd_ty!(f32x4[f32;4]: x0, x1, x2, x3);
simd_ty!(f64x2[f64;2]: x0, x1);
simd_m_ty!(
m8x16[i8]:
m8x16[i8;16]:
x0,
x1,
x2,
@ -220,7 +228,7 @@ simd_m_ty!(
x15
);
simd_m_ty!(
m16x8[i16]:
m16x8[i16;8]:
x0,
x1,
x2,
@ -230,13 +238,13 @@ simd_m_ty!(
x6,
x7
);
simd_m_ty!(m32x4[i32]: x0, x1, x2, x3);
simd_m_ty!(m64x2[i64]: x0, x1);
simd_m_ty!(m32x4[i32;4]: x0, x1, x2, x3);
simd_m_ty!(m64x2[i64;2]: x0, x1);
// 256-bit wide types:
simd_ty!(
u8x32[u8]:
u8x32[u8;32]:
x0,
x1,
x2,
@ -271,7 +279,7 @@ simd_ty!(
x31
);
simd_ty!(
u16x16[u16]:
u16x16[u16;16]:
x0,
x1,
x2,
@ -290,7 +298,7 @@ simd_ty!(
x15
);
simd_ty!(
u32x8[u32]:
u32x8[u32;8]:
x0,
x1,
x2,
@ -300,10 +308,10 @@ simd_ty!(
x6,
x7
);
simd_ty!(u64x4[u64]: x0, x1, x2, x3);
simd_ty!(u64x4[u64;4]: x0, x1, x2, x3);
simd_ty!(
i8x32[i8]:
i8x32[i8;32]:
x0,
x1,
x2,
@ -338,7 +346,7 @@ simd_ty!(
x31
);
simd_ty!(
i16x16[i16]:
i16x16[i16;16]:
x0,
x1,
x2,
@ -357,7 +365,7 @@ simd_ty!(
x15
);
simd_ty!(
i32x8[i32]:
i32x8[i32;8]:
x0,
x1,
x2,
@ -367,10 +375,10 @@ simd_ty!(
x6,
x7
);
simd_ty!(i64x4[i64]: x0, x1, x2, x3);
simd_ty!(i64x4[i64;4]: x0, x1, x2, x3);
simd_ty!(
f16x16[f16]:
f16x16[f16;16]:
x0,
x1,
x2,
@ -389,7 +397,7 @@ simd_ty!(
x15
);
simd_ty!(
f32x8[f32]:
f32x8[f32;8]:
x0,
x1,
x2,
@ -399,10 +407,10 @@ simd_ty!(
x6,
x7
);
simd_ty!(f64x4[f64]: x0, x1, x2, x3);
simd_ty!(f64x4[f64;4]: x0, x1, x2, x3);
simd_m_ty!(
m8x32[i8]:
m8x32[i8;32]:
x0,
x1,
x2,
@ -437,7 +445,7 @@ simd_m_ty!(
x31
);
simd_m_ty!(
m16x16[i16]:
m16x16[i16;16]:
x0,
x1,
x2,
@ -456,7 +464,7 @@ simd_m_ty!(
x15
);
simd_m_ty!(
m32x8[i32]:
m32x8[i32;8]:
x0,
x1,
x2,
@ -471,7 +479,7 @@ simd_m_ty!(
// 512-bit wide types:
simd_ty!(
i8x64[i8]:
i8x64[i8;64]:
x0,
x1,
x2,
@ -539,7 +547,7 @@ simd_ty!(
);
simd_ty!(
u8x64[u8]:
u8x64[u8;64]:
x0,
x1,
x2,
@ -607,7 +615,7 @@ simd_ty!(
);
simd_ty!(
i16x32[i16]:
i16x32[i16;32]:
x0,
x1,
x2,
@ -643,7 +651,7 @@ simd_ty!(
);
simd_ty!(
u16x32[u16]:
u16x32[u16;32]:
x0,
x1,
x2,
@ -679,7 +687,7 @@ simd_ty!(
);
simd_ty!(
i32x16[i32]:
i32x16[i32;16]:
x0,
x1,
x2,
@ -699,7 +707,7 @@ simd_ty!(
);
simd_ty!(
u32x16[u32]:
u32x16[u32;16]:
x0,
x1,
x2,
@ -719,7 +727,7 @@ simd_ty!(
);
simd_ty!(
f16x32[f16]:
f16x32[f16;32]:
x0,
x1,
x2,
@ -754,7 +762,7 @@ simd_ty!(
x31
);
simd_ty!(
f32x16[f32]:
f32x16[f32;16]:
x0,
x1,
x2,
@ -774,7 +782,7 @@ simd_ty!(
);
simd_ty!(
i64x8[i64]:
i64x8[i64;8]:
x0,
x1,
x2,
@ -786,7 +794,7 @@ simd_ty!(
);
simd_ty!(
u64x8[u64]:
u64x8[u64;8]:
x0,
x1,
x2,
@ -798,7 +806,7 @@ simd_ty!(
);
simd_ty!(
f64x8[f64]:
f64x8[f64;8]:
x0,
x1,
x2,
@ -811,7 +819,7 @@ simd_ty!(
// 1024-bit wide types:
simd_ty!(
u16x64[u16]:
u16x64[u16;64]:
x0,
x1,
x2,
@ -878,7 +886,7 @@ simd_ty!(
x63
);
simd_ty!(
i32x32[i32]:
i32x32[i32;32]:
x0,
x1,
x2,
@ -913,7 +921,7 @@ simd_ty!(
x31
);
simd_ty!(
u32x32[u32]:
u32x32[u32;32]:
x0,
x1,
x2,

2
library/stdarch/crates/core_arch/src/wasm32/simd128.rs
View file

@ -34,7 +34,7 @@ types! {
/// functions in this module.
// N.B., internals here are arbitrary.
#[stable(feature = "wasm_simd", since = "1.54.0")]
pub struct v128(i32, i32, i32, i32);
pub struct v128(4 x i32);
}
macro_rules! conversions {

6
library/stdarch/crates/core_arch/src/x86/avx.rs
View file

@ -2350,7 +2350,7 @@ pub unsafe fn _mm256_set_epi64x(a: i64, b: i64, c: i64, d: i64) -> __m256i {
// This intrinsic has no corresponding instruction.
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_setr_pd(a: f64, b: f64, c: f64, d: f64) -> __m256d {
__m256d(a, b, c, d)
__m256d([a, b, c, d])
}
/// Sets packed single-precision (32-bit) floating-point elements in returned
@ -2371,7 +2371,7 @@ pub unsafe fn _mm256_setr_ps(
g: f32,
h: f32,
) -> __m256 {
__m256(a, b, c, d, e, f, g, h)
__m256([a, b, c, d, e, f, g, h])
}
/// Sets packed 8-bit integers in returned vector with the supplied values in
@ -2808,7 +2808,7 @@ pub unsafe fn _mm256_undefined_pd() -> __m256d {
// This intrinsic has no corresponding instruction.
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_undefined_si256() -> __m256i {
__m256i(0, 0, 0, 0)
__m256i([0, 0, 0, 0])
}
/// Sets packed __m256 returned vector with the supplied values.

34
library/stdarch/crates/core_arch/src/x86/avx512bf16.rs
View file

@ -115,7 +115,7 @@ pub unsafe fn _mm256_maskz_cvtne2ps_pbh(k: __mmask16, a: __m256, b: __m256) -> _
}
/// Convert packed single-precision (32-bit) floating-point elements in two 512-bit vectors
/// a and b to packed BF16 (16-bit) floating-point elements, and store the results in a
/// a and b to packed BF16 (16-bit) floating-point elements, and store the results in a
/// 512-bit wide vector.
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=1769,1651,1654,1657&avx512techs=AVX512_BF16&text=_mm512_cvtne2ps_pbh)
#[inline]
@ -1807,10 +1807,10 @@ mod tests {
#[simd_test(enable = "avx512bf16")]
unsafe fn test_mm512_cvtpbh_ps() {
let a = __m256bh(
let a = __m256bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
);
]);
let r = _mm512_cvtpbh_ps(a);
let e = _mm512_setr_ps(
1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0,
@ -1820,10 +1820,10 @@ mod tests {
#[simd_test(enable = "avx512bf16")]
unsafe fn test_mm512_mask_cvtpbh_ps() {
let a = __m256bh(
let a = __m256bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
);
]);
let src = _mm512_setr_ps(
9., 10., 11., 12., 13., 14., 15., 16., 9., 10., 11., 12., 13., 14., 15., 16.,
);
@ -1837,10 +1837,10 @@ mod tests {
#[simd_test(enable = "avx512bf16")]
unsafe fn test_mm512_maskz_cvtpbh_ps() {
let a = __m256bh(
let a = __m256bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
);
]);
let k = 0b1010_1010_1010_1010;
let r = _mm512_maskz_cvtpbh_ps(k, a);
let e = _mm512_setr_ps(
@ -1851,9 +1851,9 @@ mod tests {
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm256_cvtpbh_ps() {
let a = __m128bh(
let a = __m128bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
);
]);
let r = _mm256_cvtpbh_ps(a);
let e = _mm256_setr_ps(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
assert_eq_m256(r, e);
@ -1861,9 +1861,9 @@ mod tests {
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm256_mask_cvtpbh_ps() {
let a = __m128bh(
let a = __m128bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
);
]);
let src = _mm256_setr_ps(9., 10., 11., 12., 13., 14., 15., 16.);
let k = 0b1010_1010;
let r = _mm256_mask_cvtpbh_ps(src, k, a);
@ -1873,9 +1873,9 @@ mod tests {
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm256_maskz_cvtpbh_ps() {
let a = __m128bh(
let a = __m128bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
);
]);
let k = 0b1010_1010;
let r = _mm256_maskz_cvtpbh_ps(k, a);
let e = _mm256_setr_ps(0., 2., 0., 4., 0., 6., 0., 8.);
@ -1884,7 +1884,7 @@ mod tests {
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm_cvtpbh_ps() {
let a = __m128bh(BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0);
let a = __m128bh([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
let r = _mm_cvtpbh_ps(a);
let e = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
assert_eq_m128(r, e);
@ -1892,7 +1892,7 @@ mod tests {
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm_mask_cvtpbh_ps() {
let a = __m128bh(BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0);
let a = __m128bh([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
let src = _mm_setr_ps(9., 10., 11., 12.);
let k = 0b1010;
let r = _mm_mask_cvtpbh_ps(src, k, a);
@ -1902,7 +1902,7 @@ mod tests {
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm_maskz_cvtpbh_ps() {
let a = __m128bh(BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0);
let a = __m128bh([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
let k = 0b1010;
let r = _mm_maskz_cvtpbh_ps(k, a);
let e = _mm_setr_ps(0., 2., 0., 4.);
@ -1926,7 +1926,7 @@ mod tests {
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm_mask_cvtneps_pbh() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let src = __m128bh(5, 6, 7, 8, !0, !0, !0, !0);
let src = __m128bh([5, 6, 7, 8, !0, !0, !0, !0]);
let k = 0b1010;
let r: u16x4 = transmute_copy(&_mm_mask_cvtneps_pbh(src, k, a));
let e = u16x4::new(5, BF16_TWO, 7, BF16_FOUR);

22
library/stdarch/crates/core_arch/src/x86/avx512fp16.rs
View file

@ -19,7 +19,7 @@ pub unsafe fn _mm_set_ph(
e1: f16,
e0: f16,
) -> __m128h {
__m128h(e0, e1, e2, e3, e4, e5, e6, e7)
__m128h([e0, e1, e2, e3, e4, e5, e6, e7])
}
/// Set packed half-precision (16-bit) floating-point elements in dst with the supplied values.
@ -46,9 +46,9 @@ pub unsafe fn _mm256_set_ph(
e1: f16,
e0: f16,
) -> __m256h {
__m256h(
__m256h([
e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15,
)
])
}
/// Set packed half-precision (16-bit) floating-point elements in dst with the supplied values.
@ -91,10 +91,10 @@ pub unsafe fn _mm512_set_ph(
e1: f16,
e0: f16,
) -> __m512h {
__m512h(
__m512h([
e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15, e16, e17, e18, e19,
e20, e21, e22, e23, e24, e25, e26, e27, e28, e29, e30, e31,
)
])
}
/// Copy half-precision (16-bit) floating-point elements from a to the lower element of dst and zero
@ -105,7 +105,7 @@ pub unsafe fn _mm512_set_ph(
#[target_feature(enable = "avx512fp16")]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
pub unsafe fn _mm_set_sh(a: f16) -> __m128h {
__m128h(a, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0)
__m128h([a, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
}
/// Broadcast the half-precision (16-bit) floating-point value a to all elements of dst.
@ -154,7 +154,7 @@ pub unsafe fn _mm_setr_ph(
e6: f16,
e7: f16,
) -> __m128h {
__m128h(e0, e1, e2, e3, e4, e5, e6, e7)
__m128h([e0, e1, e2, e3, e4, e5, e6, e7])
}
/// Set packed half-precision (16-bit) floating-point elements in dst with the supplied values in reverse order.
@ -181,9 +181,9 @@ pub unsafe fn _mm256_setr_ph(
e14: f16,
e15: f16,
) -> __m256h {
__m256h(
__m256h([
e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15,
)
])
}
/// Set packed half-precision (16-bit) floating-point elements in dst with the supplied values in reverse order.
@ -226,10 +226,10 @@ pub unsafe fn _mm512_setr_ph(
e30: f16,
e31: f16,
) -> __m512h {
__m512h(
__m512h([
e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15, e16, e17, e18, e19,
e20, e21, e22, e23, e24, e25, e26, e27, e28, e29, e30, e31,
)
])
}
/// Return vector of type __m128h with all elements set to zero.

28
library/stdarch/crates/core_arch/src/x86/avxneconvert.rs
View file

@ -313,9 +313,9 @@ mod tests {
#[simd_test(enable = "avxneconvert")]
unsafe fn test_mm_cvtneebf16_ps() {
let a = __m128bh(
let a = __m128bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
);
]);
let r = _mm_cvtneebf16_ps(addr_of!(a));
let e = _mm_setr_ps(1., 3., 5., 7.);
assert_eq_m128(r, e);
@ -323,10 +323,10 @@ mod tests {
#[simd_test(enable = "avxneconvert")]
unsafe fn test_mm256_cvtneebf16_ps() {
let a = __m256bh(
let a = __m256bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
);
]);
let r = _mm256_cvtneebf16_ps(addr_of!(a));
let e = _mm256_setr_ps(1., 3., 5., 7., 1., 3., 5., 7.);
assert_eq_m256(r, e);
@ -334,7 +334,7 @@ mod tests {
#[simd_test(enable = "avxneconvert")]
unsafe fn test_mm_cvtneeph_ps() {
let a = __m128h(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let a = __m128h([1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]);
let r = _mm_cvtneeph_ps(addr_of!(a));
let e = _mm_setr_ps(1., 3., 5., 7.);
assert_eq_m128(r, e);
@ -342,9 +342,9 @@ mod tests {
#[simd_test(enable = "avxneconvert")]
unsafe fn test_mm256_cvtneeph_ps() {
let a = __m256h(
let a = __m256h([
1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0,
);
]);
let r = _mm256_cvtneeph_ps(addr_of!(a));
let e = _mm256_setr_ps(1., 3., 5., 7., 9., 11., 13., 15.);
assert_eq_m256(r, e);
@ -352,9 +352,9 @@ mod tests {
#[simd_test(enable = "avxneconvert")]
unsafe fn test_mm_cvtneobf16_ps() {
let a = __m128bh(
let a = __m128bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
);
]);
let r = _mm_cvtneobf16_ps(addr_of!(a));
let e = _mm_setr_ps(2., 4., 6., 8.);
assert_eq_m128(r, e);
@ -362,10 +362,10 @@ mod tests {
#[simd_test(enable = "avxneconvert")]
unsafe fn test_mm256_cvtneobf16_ps() {
let a = __m256bh(
let a = __m256bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
);
]);
let r = _mm256_cvtneobf16_ps(addr_of!(a));
let e = _mm256_setr_ps(2., 4., 6., 8., 2., 4., 6., 8.);
assert_eq_m256(r, e);
@ -373,7 +373,7 @@ mod tests {
#[simd_test(enable = "avxneconvert")]
unsafe fn test_mm_cvtneoph_ps() {
let a = __m128h(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let a = __m128h([1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]);
let r = _mm_cvtneoph_ps(addr_of!(a));
let e = _mm_setr_ps(2., 4., 6., 8.);
assert_eq_m128(r, e);
@ -381,9 +381,9 @@ mod tests {
#[simd_test(enable = "avxneconvert")]
unsafe fn test_mm256_cvtneoph_ps() {
let a = __m256h(
let a = __m256h([
1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0,
);
]);
let r = _mm256_cvtneoph_ps(addr_of!(a));
let e = _mm256_setr_ps(2., 4., 6., 8., 10., 12., 14., 16.);
assert_eq_m256(r, e);

50
library/stdarch/crates/core_arch/src/x86/mod.rs
View file

@ -1,5 +1,6 @@
//! `x86` and `x86_64` intrinsics.
use crate::intrinsics::simd::simd_shuffle;
#[allow(unused_imports)]
use crate::marker::Sized;
use crate::mem::transmute;
@ -50,7 +51,7 @@ types! {
/// # }
/// ```
#[stable(feature = "simd_x86", since = "1.27.0")]
pub struct __m128i(i64, i64);
pub struct __m128i(2 x i64);
/// 128-bit wide set of four `f32` types, x86-specific
///
@ -87,7 +88,7 @@ types! {
/// # }
/// ```
#[stable(feature = "simd_x86", since = "1.27.0")]
pub struct __m128(f32, f32, f32, f32);
pub struct __m128(4 x f32);
/// 128-bit wide set of two `f64` types, x86-specific
///
@ -124,7 +125,7 @@ types! {
/// # }
/// ```
#[stable(feature = "simd_x86", since = "1.27.0")]
pub struct __m128d(f64, f64);
pub struct __m128d(2 x f64);
/// 256-bit wide integer vector type, x86-specific
///
@ -165,7 +166,7 @@ types! {
/// # }
/// ```
#[stable(feature = "simd_x86", since = "1.27.0")]
pub struct __m256i(i64, i64, i64, i64);
pub struct __m256i(4 x i64);
/// 256-bit wide set of eight `f32` types, x86-specific
///
@ -202,7 +203,7 @@ types! {
/// # }
/// ```
#[stable(feature = "simd_x86", since = "1.27.0")]
pub struct __m256(f32, f32, f32, f32, f32, f32, f32, f32);
pub struct __m256(8 x f32);
/// 256-bit wide set of four `f64` types, x86-specific
///
@ -239,7 +240,7 @@ types! {
/// # }
/// ```
#[stable(feature = "simd_x86", since = "1.27.0")]
pub struct __m256d(f64, f64, f64, f64);
pub struct __m256d(4 x f64);
/// 512-bit wide integer vector type, x86-specific
///
@ -261,7 +262,7 @@ types! {
/// Note that this means that an instance of `__m512i` typically just means
/// a "bag of bits" which is left up to interpretation at the point of use.
#[stable(feature = "simd_avx512_types", since = "1.72.0")]
pub struct __m512i(i64, i64, i64, i64, i64, i64, i64, i64);
pub struct __m512i(8 x i64);
/// 512-bit wide set of sixteen `f32` types, x86-specific
///
@ -279,10 +280,7 @@ types! {
/// suffixed with "ps" (or otherwise contain "ps"). Not to be confused with
/// "pd" which is used for `__m512d`.
#[stable(feature = "simd_avx512_types", since = "1.72.0")]
pub struct __m512(
f32, f32, f32, f32, f32, f32, f32, f32,
f32, f32, f32, f32, f32, f32, f32, f32,
);
pub struct __m512(16 x f32);
/// 512-bit wide set of eight `f64` types, x86-specific
///
@ -300,7 +298,7 @@ types! {
/// suffixed with "pd" (or otherwise contain "pd"). Not to be confused with
/// "ps" which is used for `__m512`.
#[stable(feature = "simd_avx512_types", since = "1.72.0")]
pub struct __m512d(f64, f64, f64, f64, f64, f64, f64, f64);
pub struct __m512d(8 x f64);
/// 128-bit wide set of eight `u16` types, x86-specific
///
@ -308,7 +306,7 @@ types! {
/// eight packed `u16` instances. Its purpose is for bf16 related intrinsic
/// implementations.
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
pub struct __m128bh(u16, u16, u16, u16, u16, u16, u16, u16);
pub struct __m128bh(8 x u16);
/// 256-bit wide set of 16 `u16` types, x86-specific
///
@ -317,10 +315,7 @@ types! {
/// 16 packed `u16` instances. Its purpose is for bf16 related intrinsic
/// implementations.
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
pub struct __m256bh(
u16, u16, u16, u16, u16, u16, u16, u16,
u16, u16, u16, u16, u16, u16, u16, u16
);
pub struct __m256bh(16 x u16);
/// 512-bit wide set of 32 `u16` types, x86-specific
///
@ -329,12 +324,7 @@ types! {
/// 32 packed `u16` instances. Its purpose is for bf16 related intrinsic
/// implementations.
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
pub struct __m512bh(
u16, u16, u16, u16, u16, u16, u16, u16,
u16, u16, u16, u16, u16, u16, u16, u16,
u16, u16, u16, u16, u16, u16, u16, u16,
u16, u16, u16, u16, u16, u16, u16, u16
);
pub struct __m512bh(32 x u16);
/// 128-bit wide set of 8 `f16` types, x86-specific
///
@ -343,7 +333,7 @@ types! {
/// 8 packed `f16` instances. its purpose is for f16 related intrinsic
/// implementations.
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
pub struct __m128h(f16, f16, f16, f16, f16, f16, f16, f16);
pub struct __m128h(8 x f16);
/// 256-bit wide set of 16 `f16` types, x86-specific
///
@ -352,10 +342,7 @@ types! {
/// 16 packed `f16` instances. its purpose is for f16 related intrinsic
/// implementations.
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
pub struct __m256h(
f16, f16, f16, f16, f16, f16, f16, f16,
f16, f16, f16, f16, f16, f16, f16, f16
);
pub struct __m256h(16 x f16);
/// 512-bit wide set of 32 `f16` types, x86-specific
///
@ -364,12 +351,7 @@ types! {
/// 32 packed `f16` instances. its purpose is for f16 related intrinsic
/// implementations.
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
pub struct __m512h(
f16, f16, f16, f16, f16, f16, f16, f16,
f16, f16, f16, f16, f16, f16, f16, f16,
f16, f16, f16, f16, f16, f16, f16, f16,
f16, f16, f16, f16, f16, f16, f16, f16
);
pub struct __m512h(32 x f16);
}
/// The BFloat16 type used in AVX-512 intrinsics.

14
library/stdarch/crates/core_arch/src/x86/sse.rs
View file

@ -893,7 +893,7 @@ pub unsafe fn _mm_cvt_si2ss(a: __m128, b: i32) -> __m128 {
#[cfg_attr(test, assert_instr(movss))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_set_ss(a: f32) -> __m128 {
__m128(a, 0.0, 0.0, 0.0)
__m128([a, 0.0, 0.0, 0.0])
}
/// Construct a `__m128` with all element set to `a`.
@ -904,7 +904,7 @@ pub unsafe fn _mm_set_ss(a: f32) -> __m128 {
#[cfg_attr(test, assert_instr(shufps))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_set1_ps(a: f32) -> __m128 {
__m128(a, a, a, a)
__m128([a, a, a, a])
}
/// Alias for [`_mm_set1_ps`](fn._mm_set1_ps.html)
@ -942,7 +942,7 @@ pub unsafe fn _mm_set_ps1(a: f32) -> __m128 {
#[cfg_attr(test, assert_instr(unpcklps))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_set_ps(a: f32, b: f32, c: f32, d: f32) -> __m128 {
__m128(d, c, b, a)
__m128([d, c, b, a])
}
/// Construct a `__m128` from four floating point values lowest to highest.
@ -968,7 +968,7 @@ pub unsafe fn _mm_set_ps(a: f32, b: f32, c: f32, d: f32) -> __m128 {
)]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_setr_ps(a: f32, b: f32, c: f32, d: f32) -> __m128 {
__m128(a, b, c, d)
__m128([a, b, c, d])
}
/// Construct a `__m128` with all elements initialized to zero.
@ -979,7 +979,7 @@ pub unsafe fn _mm_setr_ps(a: f32, b: f32, c: f32, d: f32) -> __m128 {
#[cfg_attr(test, assert_instr(xorps))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_setzero_ps() -> __m128 {
__m128(0.0, 0.0, 0.0, 0.0)
__m128([0.0, 0.0, 0.0, 0.0])
}
/// A utility function for creating masks to use with Intel shuffle and
@ -1100,7 +1100,7 @@ pub unsafe fn _mm_movemask_ps(a: __m128) -> i32 {
#[cfg_attr(test, assert_instr(movss))]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_load_ss(p: *const f32) -> __m128 {
__m128(*p, 0.0, 0.0, 0.0)
__m128([*p, 0.0, 0.0, 0.0])
}
/// Construct a `__m128` by duplicating the value read from `p` into all
@ -1116,7 +1116,7 @@ pub unsafe fn _mm_load_ss(p: *const f32) -> __m128 {
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_load1_ps(p: *const f32) -> __m128 {
let a = *p;
__m128(a, a, a, a)
__m128([a, a, a, a])
}
/// Alias for [`_mm_load1_ps`](fn._mm_load1_ps.html)

6
library/stdarch/crates/core_arch/src/x86/sse2.rs
View file

@ -2424,7 +2424,7 @@ pub unsafe fn _mm_set_pd1(a: f64) -> __m128d {
#[target_feature(enable = "sse2")]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_set_pd(a: f64, b: f64) -> __m128d {
__m128d(b, a)
__m128d([b, a])
}
/// Sets packed double-precision (64-bit) floating-point elements in the return
@ -2902,7 +2902,7 @@ pub unsafe fn _mm_castsi128_ps(a: __m128i) -> __m128 {
#[target_feature(enable = "sse2")]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_undefined_pd() -> __m128d {
__m128d(0.0, 0.0)
__m128d([0.0, 0.0])
}
/// Returns vector of type __m128i with indeterminate elements.
@ -2914,7 +2914,7 @@ pub unsafe fn _mm_undefined_pd() -> __m128d {
#[target_feature(enable = "sse2")]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm_undefined_si128() -> __m128i {
__m128i(0, 0)
__m128i([0, 0])
}
/// The resulting `__m128d` element is composed by the low-order values of

8
library/stdarch/crates/stdarch-gen-arm/src/main.rs
View file

@ -2393,14 +2393,14 @@ fn gen_arm(
} else {
let const_arm = const_arm.replace("ttn", &type_to_native_type(in_t[1]));
let mut cnt = String::from(in_t[1]);
cnt.push('(');
cnt.push_str("([");
for i in 0..type_len(in_t[1]) {
if i != 0 {
cnt.push_str(", ");
}
cnt.push_str(&const_arm);
}
cnt.push(')');
cnt.push_str("])");
cnt
};
match para_num {
@ -2467,14 +2467,14 @@ fn gen_arm(
} else if const_aarch64.contains("dup-in_len-N as ttn") {
let const_aarch64 = format!("N as {}", type_to_native_type(in_t[1]));
let mut cnt = String::from(in_t[1]);
cnt.push('(');
cnt.push_str("([");
for i in 0..type_len(in_t[1]) {
if i != 0 {
cnt.push_str(", ");
}
cnt.push_str(&const_aarch64);
}
cnt.push(')');
cnt.push_str("])");
format!("{current_fn}(a, {cnt})")
} else {
match para_num {