Convert _mm256_permute2f128_ps to const generics
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1 changed files with 6 additions and 10 deletions
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@ -1326,16 +1326,12 @@ pub unsafe fn _mm_permute_pd(a: __m128d, imm8: i32) -> __m128d {
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_permute2f128_ps)
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#[inline]
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#[target_feature(enable = "avx")]
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#[cfg_attr(test, assert_instr(vperm2f128, imm8 = 0x5))]
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#[rustc_args_required_const(2)]
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#[cfg_attr(test, assert_instr(vperm2f128, IMM8 = 0x5))]
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#[rustc_legacy_const_generics(2)]
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#[stable(feature = "simd_x86", since = "1.27.0")]
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pub unsafe fn _mm256_permute2f128_ps(a: __m256, b: __m256, imm8: i32) -> __m256 {
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macro_rules! call {
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($imm8:expr) => {
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vperm2f128ps256(a, b, $imm8)
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};
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}
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constify_imm8!(imm8, call)
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pub unsafe fn _mm256_permute2f128_ps<const IMM8: i32>(a: __m256, b: __m256) -> __m256 {
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static_assert_imm8!(IMM8);
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vperm2f128ps256(a, b, IMM8 as i8)
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}
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/// Shuffles 256 bits (composed of 4 packed double-precision (64-bit)
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@ -3884,7 +3880,7 @@ mod tests {
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unsafe fn test_mm256_permute2f128_ps() {
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let a = _mm256_setr_ps(1., 2., 3., 4., 1., 2., 3., 4.);
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let b = _mm256_setr_ps(5., 6., 7., 8., 5., 6., 7., 8.);
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let r = _mm256_permute2f128_ps(a, b, 0x13);
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let r = _mm256_permute2f128_ps::<0x13>(a, b);
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let e = _mm256_setr_ps(5., 6., 7., 8., 1., 2., 3., 4.);
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assert_eq_m256(r, e);
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}
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