diff --git a/library/stdarch/src/lib.rs b/library/stdarch/src/lib.rs
index e8f2bd160ba5..e8dfc558d64a 100644
--- a/library/stdarch/src/lib.rs
+++ b/library/stdarch/src/lib.rs
@@ -163,6 +163,7 @@ mod v256;
 mod v512;
 mod v64;
 
+/// 32-bit wide vector tpyes
 mod v32 {
     use simd_llvm::*;
 
@@ -172,21 +173,17 @@ mod v32 {
     define_ty! { i8x4, i8, i8, i8, i8 }
     define_impl! { i8x4, i8, 4, i8x4, x0, x1, x2, x3 }
 
-    define_casts!(
-        (i8x4, i32x4, as_i32x4),
-        (i16x2, i64x2, as_i64x2)
-    );
+    define_casts!((i8x4, i32x4, as_i32x4), (i16x2, i64x2, as_i64x2));
 }
 
+/// 16-bit wide vector tpyes
 mod v16 {
     use simd_llvm::*;
 
     define_ty! { i8x2, i8, i8 }
     define_impl! { i8x2, i8, 2, i8x2, x0, x1 }
 
-    define_casts!(
-        (i8x2, i64x2, as_i64x2)
-    );
+    define_casts!((i8x2, i64x2, as_i64x2));
 }
 
 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
diff --git a/library/stdarch/src/x86/sse2.rs b/library/stdarch/src/x86/sse2.rs
index 9d2ee6f47e7e..104f43cf16f3 100644
--- a/library/stdarch/src/x86/sse2.rs
+++ b/library/stdarch/src/x86/sse2.rs
@@ -1792,7 +1792,9 @@ pub unsafe fn _mm_cvtsd_si64(a: f64x2) -> i64 {
 #[inline(always)]
 #[target_feature = "+sse2"]
 #[cfg_attr(test, assert_instr(cvtsd2si))]
-pub unsafe fn _mm_cvtsd_si64x(a: f64x2) -> i64 { _mm_cvtsd_si64(a) }
+pub unsafe fn _mm_cvtsd_si64x(a: f64x2) -> i64 {
+    _mm_cvtsd_si64(a)
+}
 
 /// Convert the lower double-precision (64-bit) floating-point element in `b`
 /// to a single-precision (32-bit) floating-point element, store the result in
@@ -1857,7 +1859,9 @@ pub unsafe fn _mm_cvttsd_si64(a: f64x2) -> i64 {
 #[inline(always)]
 #[target_feature = "+sse2"]
 #[cfg_attr(test, assert_instr(cvttsd2si))]
-pub unsafe fn _mm_cvttsd_si64x(a: f64x2) -> i64 { _mm_cvttsd_si64(a) }
+pub unsafe fn _mm_cvttsd_si64x(a: f64x2) -> i64 {
+    _mm_cvttsd_si64(a)
+}
 
 /// Convert packed single-precision (32-bit) floating-point elements in `a` to
 /// packed 32-bit integers with truncation.
diff --git a/library/stdarch/src/x86/sse41.rs b/library/stdarch/src/x86/sse41.rs
index 2c680f5efc41..8039e00612d4 100644
--- a/library/stdarch/src/x86/sse41.rs
+++ b/library/stdarch/src/x86/sse41.rs
@@ -244,7 +244,8 @@ pub unsafe fn _mm_max_epu32(a: u32x4, b: u32x4) -> u32x4 {
     pmaxud(a, b)
 }
 
-/// Convert packed 32-bit integers from `a` and `b` to packed 16-bit integers using unsigned saturation
+/// Convert packed 32-bit integers from `a` and `b` to packed 16-bit integers
+/// using unsigned saturation
 #[inline(always)]
 #[target_feature = "+sse4.1"]
 #[cfg_attr(test, assert_instr(packusdw))]
@@ -276,7 +277,8 @@ pub unsafe fn _mm_cvtepi8_epi32(a: i8x16) -> i32x4 {
     simd_shuffle4::<_, ::v32::i8x4>(a, a, [0, 1, 2, 3]).as_i32x4()
 }
 
-/// Sign extend packed 8-bit integers in the low 8 bytes of `a` to packed 64-bit integers
+/// Sign extend packed 8-bit integers in the low 8 bytes of `a` to packed
+/// 64-bit integers
 #[inline(always)]
 #[target_feature = "+sse4.1"]
 #[cfg_attr(test, assert_instr(pmovsxbq))]
@@ -800,7 +802,7 @@ mod tests {
         assert_eq!(r, e);
     }
 
-     #[simd_test = "sse4.1"]
+    #[simd_test = "sse4.1"]
     unsafe fn _mm_cvtepi8_epi16() {
         let a = i8x16::splat(10);
         let r = sse41::_mm_cvtepi8_epi16(a);
@@ -842,7 +844,7 @@ mod tests {
         let r = sse41::_mm_cvtepi16_epi32(a);
         let e = i32x4::splat(10);
         assert_eq!(r, e);
-        let a =  i16x8::splat(-10);
+        let a = i16x8::splat(-10);
         let r = sse41::_mm_cvtepi16_epi32(a);
         let e = i32x4::splat(-10);
         assert_eq!(r, e);
@@ -854,7 +856,7 @@ mod tests {
         let r = sse41::_mm_cvtepi16_epi64(a);
         let e = i64x2::splat(10);
         assert_eq!(r, e);
-        let a =  i16x8::splat(-10);
+        let a = i16x8::splat(-10);
         let r = sse41::_mm_cvtepi16_epi64(a);
         let e = i64x2::splat(-10);
         assert_eq!(r, e);