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rustc_target: introduce Arch

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Improve type safety by using an enum rather than strings.
This commit is contained in:
Tamir Duberstein 2025-10-13 12:41:24 -04:00
parent cf053b3774
commit 270e49b307
No known key found for this signature in database
322 changed files with 1209 additions and 1030 deletions
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4
compiler/rustc_attr_parsing/src/attributes/link_attrs.rs
View file

@ -4,7 +4,7 @@ use rustc_hir::attrs::*;
use rustc_session::Session;
use rustc_session::parse::feature_err;
use rustc_span::kw;
use rustc_target::spec::BinaryFormat;
use rustc_target::spec::{Arch, BinaryFormat};
use super::prelude::*;
use super::util::parse_single_integer;
@ -438,7 +438,7 @@ impl LinkParser {
cx.expected_name_value(item.span(), Some(sym::import_name_type));
return true;
};
if cx.sess().target.arch != "x86" {
if cx.sess().target.arch != Arch::X86 {
cx.emit_err(ImportNameTypeX86 { span: item.span() });
return true;
}

17
compiler/rustc_codegen_cranelift/src/abi/mod.rs
View file

@ -20,6 +20,7 @@ use rustc_middle::ty::print::with_no_trimmed_paths;
use rustc_session::Session;
use rustc_span::source_map::Spanned;
use rustc_target::callconv::{FnAbi, PassMode};
use rustc_target::spec::Arch;
use smallvec::SmallVec;
use self::pass_mode::*;
@ -155,7 +156,7 @@ impl<'tcx> FunctionCx<'_, '_, 'tcx> {
let ret = self.lib_call_unadjusted(name, params, returns, &args)[0];
Cow::Owned(vec![codegen_bitcast(self, types::I128, ret)])
} else if ret_single_i128 && self.tcx.sess.target.arch == "s390x" {
} else if ret_single_i128 && self.tcx.sess.target.arch == Arch::S390x {
// Return i128 using a return area pointer on s390x.
let mut params = params;
let mut args = args.to_vec();
@ -641,7 +642,7 @@ pub(crate) fn codegen_terminator_call<'tcx>(
.flat_map(|arg_abi| arg_abi.get_abi_param(fx.tcx).into_iter()),
);
if fx.tcx.sess.target.is_like_darwin && fx.tcx.sess.target.arch == "aarch64" {
if fx.tcx.sess.target.is_like_darwin && fx.tcx.sess.target.arch == Arch::AArch64 {
// Add any padding arguments needed for Apple AArch64.
// There's no need to pad the argument list unless variadic arguments are actually being
// passed.
@ -787,25 +788,25 @@ pub(crate) fn codegen_drop<'tcx>(
pub(crate) fn lib_call_arg_param(tcx: TyCtxt<'_>, ty: Type, is_signed: bool) -> AbiParam {
let param = AbiParam::new(ty);
if ty.is_int() && u64::from(ty.bits()) < tcx.data_layout.pointer_size().bits() {
match (&*tcx.sess.target.arch, &*tcx.sess.target.vendor) {
("x86_64", _) | ("aarch64", "apple") => match (ty, is_signed) {
match (tcx.sess.target.arch, tcx.sess.target.vendor.as_ref()) {
(Arch::X86_64, _) | (Arch::AArch64, "apple") => match (ty, is_signed) {
(types::I8 | types::I16, true) => param.sext(),
(types::I8 | types::I16, false) => param.uext(),
_ => param,
},
("aarch64", _) => param,
("riscv64", _) => match (ty, is_signed) {
(Arch::AArch64, _) => param,
(Arch::RiscV64, _) => match (ty, is_signed) {
(types::I32, _) | (_, true) => param.sext(),
_ => param.uext(),
},
("s390x", _) => {
(Arch::S390x, _) => {
if is_signed {
param.sext()
} else {
param.uext()
}
}
_ => unimplemented!("{:?}", tcx.sess.target.arch),
(arch, _) => unimplemented!("{arch:?}"),
}
} else {
param

10
compiler/rustc_codegen_cranelift/src/codegen_f16_f128.rs
View file

@ -1,8 +1,10 @@
use rustc_target::spec::Arch;
use crate::prelude::*;
pub(crate) fn f16_to_f32(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value {
let (value, arg_ty) =
if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == "x86_64" {
if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == Arch::X86_64 {
(
fx.bcx.ins().bitcast(types::I16, MemFlags::new(), value),
lib_call_arg_param(fx.tcx, types::I16, false),
@ -19,7 +21,8 @@ fn f16_to_f64(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value {
}
pub(crate) fn f32_to_f16(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value {
let ret_ty = if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == "x86_64" {
let ret_ty = if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == Arch::X86_64
{
types::I16
} else {
types::F16
@ -34,7 +37,8 @@ pub(crate) fn f32_to_f16(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value
}
fn f64_to_f16(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value {
let ret_ty = if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == "x86_64" {
let ret_ty = if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == Arch::X86_64
{
types::I16
} else {
types::F16

4
compiler/rustc_codegen_cranelift/src/common.rs
View file

@ -8,7 +8,7 @@ use rustc_middle::ty::layout::{
};
use rustc_span::source_map::Spanned;
use rustc_target::callconv::FnAbi;
use rustc_target::spec::{HasTargetSpec, Target};
use rustc_target::spec::{Arch, HasTargetSpec, Target};
use crate::constant::ConstantCx;
use crate::debuginfo::FunctionDebugContext;
@ -373,7 +373,7 @@ impl<'tcx> FunctionCx<'_, '_, 'tcx> {
"size must be a multiple of alignment (size={size}, align={align})"
);
let abi_align = if self.tcx.sess.target.arch == "s390x" { 8 } else { 16 };
let abi_align = if self.tcx.sess.target.arch == Arch::S390x { 8 } else { 16 };
if align <= abi_align {
let stack_slot = self.bcx.create_sized_stack_slot(StackSlotData {
kind: StackSlotKind::ExplicitSlot,

23
compiler/rustc_codegen_cranelift/src/lib.rs
View file

@ -50,6 +50,7 @@ use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
use rustc_session::Session;
use rustc_session::config::OutputFilenames;
use rustc_span::{Symbol, sym};
use rustc_target::spec::Arch;
pub use crate::config::*;
use crate::prelude::*;
@ -186,20 +187,20 @@ impl CodegenBackend for CraneliftCodegenBackend {
fn target_config(&self, sess: &Session) -> TargetConfig {
// FIXME return the actually used target features. this is necessary for #[cfg(target_feature)]
let target_features = if sess.target.arch == "x86_64" && sess.target.os != "none" {
// x86_64 mandates SSE2 support and rustc requires the x87 feature to be enabled
vec![sym::fxsr, sym::sse, sym::sse2, Symbol::intern("x87")]
} else if sess.target.arch == "aarch64" {
match &*sess.target.os {
let target_features = match sess.target.arch {
Arch::X86_64 if sess.target.os != "none" => {
// x86_64 mandates SSE2 support and rustc requires the x87 feature to be enabled
vec![sym::fxsr, sym::sse, sym::sse2, Symbol::intern("x87")]
}
Arch::AArch64 => match &*sess.target.os {
"none" => vec![],
// On macOS the aes, sha2 and sha3 features are enabled by default and ring
// fails to compile on macOS when they are not present.
"macos" => vec![sym::neon, sym::aes, sym::sha2, sym::sha3],
// AArch64 mandates Neon support
_ => vec![sym::neon],
}
} else {
vec![]
},
_ => vec![],
};
// FIXME do `unstable_target_features` properly
let unstable_target_features = target_features.clone();
@ -208,14 +209,14 @@ impl CodegenBackend for CraneliftCodegenBackend {
// Windows, whereas LLVM 21+ and Cranelift pass it indirectly. This means that `f128` won't
// work when linking against a LLVM-built sysroot.
let has_reliable_f128 = !sess.target.is_like_windows;
let has_reliable_f16 = match &*sess.target.arch {
let has_reliable_f16 = match sess.target.arch {
// FIXME(f16_f128): LLVM 20 does not support `f16` on s390x, meaning the required
// builtins are not available in `compiler-builtins`.
"s390x" => false,
Arch::S390x => false,
// FIXME(f16_f128): `rustc_codegen_llvm` currently disables support on Windows GNU
// targets due to GCC using a different ABI than LLVM. Therefore `f16` won't be
// available when using a LLVM-built sysroot.
"x86_64"
Arch::X86_64
if sess.target.os == "windows"
&& sess.target.env == "gnu"
&& sess.target.abi != "llvm" =>

20
compiler/rustc_codegen_gcc/src/abi.rs
View file

@ -12,6 +12,8 @@ use rustc_middle::ty::layout::LayoutOf;
#[cfg(feature = "master")]
use rustc_session::config;
use rustc_target::callconv::{ArgAttributes, CastTarget, FnAbi, PassMode};
#[cfg(feature = "master")]
use rustc_target::spec::Arch;
use crate::builder::Builder;
use crate::context::CodegenCx;
@ -233,12 +235,12 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
#[cfg(feature = "master")]
fn gcc_cconv(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Option<FnAttribute<'gcc>> {
conv_to_fn_attribute(self.conv, &cx.tcx.sess.target.arch)
conv_to_fn_attribute(self.conv, cx.tcx.sess.target.arch)
}
}
#[cfg(feature = "master")]
pub fn conv_to_fn_attribute<'gcc>(conv: CanonAbi, arch: &str) -> Option<FnAttribute<'gcc>> {
pub fn conv_to_fn_attribute<'gcc>(conv: CanonAbi, arch: Arch) -> Option<FnAttribute<'gcc>> {
let attribute = match conv {
CanonAbi::C | CanonAbi::Rust => return None,
CanonAbi::RustCold => FnAttribute::Cold,
@ -251,15 +253,11 @@ pub fn conv_to_fn_attribute<'gcc>(conv: CanonAbi, arch: &str) -> Option<FnAttrib
ArmCall::CCmseNonSecureEntry => FnAttribute::ArmCmseNonsecureEntry,
ArmCall::Aapcs => FnAttribute::ArmPcs("aapcs"),
},
CanonAbi::GpuKernel => {
if arch == "amdgpu" {
FnAttribute::GcnAmdGpuHsaKernel
} else if arch == "nvptx64" {
FnAttribute::NvptxKernel
} else {
panic!("Architecture {} does not support GpuKernel calling convention", arch);
}
}
CanonAbi::GpuKernel => match arch {
Arch::AmdGpu => FnAttribute::GcnAmdGpuHsaKernel,
Arch::Nvptx64 => FnAttribute::NvptxKernel,
arch => panic!("Arch {arch} does not support GpuKernel calling convention"),
},
// TODO(antoyo): check if those AVR attributes are mapped correctly.
CanonAbi::Interrupt(interrupt_kind) => match interrupt_kind {
InterruptKind::Avr => FnAttribute::AvrSignal,

8
compiler/rustc_codegen_gcc/src/attributes.rs
View file

@ -9,6 +9,8 @@ use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
#[cfg(feature = "master")]
use rustc_middle::mir::TerminatorKind;
use rustc_middle::ty;
#[cfg(feature = "master")]
use rustc_target::spec::Arch;
use crate::context::CodegenCx;
use crate::gcc_util::to_gcc_features;
@ -70,7 +72,7 @@ fn inline_attr<'gcc, 'tcx>(
InlineAttr::Hint => Some(FnAttribute::Inline),
InlineAttr::Force { .. } => Some(FnAttribute::AlwaysInline),
InlineAttr::Never => {
if cx.sess().target.arch != "amdgpu" {
if cx.sess().target.arch != Arch::AmdGpu {
Some(FnAttribute::NoInline)
} else {
None
@ -153,8 +155,8 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
.join(",");
if !target_features.is_empty() {
#[cfg(feature = "master")]
match cx.sess().target.arch.as_ref() {
"x86" | "x86_64" | "powerpc" => {
match cx.sess().target.arch {
Arch::X86 | Arch::X86_64 | Arch::PowerPC => {
func.add_attribute(FnAttribute::Target(&target_features))
}
// The target attribute is not supported on other targets in GCC.

4
compiler/rustc_codegen_gcc/src/base.rs
View file

@ -15,9 +15,9 @@ use rustc_middle::mir::mono::Visibility;
use rustc_middle::ty::TyCtxt;
use rustc_session::config::DebugInfo;
use rustc_span::Symbol;
use rustc_target::spec::RelocModel;
#[cfg(feature = "master")]
use rustc_target::spec::SymbolVisibility;
use rustc_target::spec::{Arch, RelocModel};
use crate::builder::Builder;
use crate::context::CodegenCx;
@ -116,7 +116,7 @@ pub fn compile_codegen_unit(
.map(|string| &string[1..])
.collect();
if !disabled_features.contains("avx") && tcx.sess.target.arch == "x86_64" {
if !disabled_features.contains("avx") && tcx.sess.target.arch == Arch::X86_64 {
// NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for
// SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead.
// FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar.

2
compiler/rustc_codegen_gcc/src/context.rs
View file

@ -487,7 +487,7 @@ impl<'gcc, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
let entry_name = self.sess().target.entry_name.as_ref();
if !self.functions.borrow().contains_key(entry_name) {
#[cfg(feature = "master")]
let conv = conv_to_fn_attribute(self.sess().target.entry_abi, &self.sess().target.arch);
let conv = conv_to_fn_attribute(self.sess().target.entry_abi, self.sess().target.arch);
#[cfg(not(feature = "master"))]
let conv = None;
Some(self.declare_entry_fn(entry_name, fn_type, conv))

68
compiler/rustc_codegen_gcc/src/gcc_util.rs
View file

@ -3,6 +3,7 @@ use gccjit::Context;
use rustc_codegen_ssa::target_features;
use rustc_data_structures::smallvec::{SmallVec, smallvec};
use rustc_session::Session;
use rustc_target::spec::Arch;
fn gcc_features_by_flags(sess: &Session, features: &mut Vec<String>) {
target_features::retpoline_features_by_flags(sess, features);
@ -65,44 +66,47 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
// To find a list of GCC's names, check https://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html
pub fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]> {
let arch = if sess.target.arch == "x86_64" { "x86" } else { &*sess.target.arch };
// cSpell:disable
match (arch, s) {
match (sess.target.arch, s) {
// FIXME: seems like x87 does not exist?
("x86", "x87") => smallvec![],
("x86", "sse4.2") => smallvec!["sse4.2", "crc32"],
("x86", "pclmulqdq") => smallvec!["pclmul"],
("x86", "rdrand") => smallvec!["rdrnd"],
("x86", "bmi1") => smallvec!["bmi"],
("x86", "cmpxchg16b") => smallvec!["cx16"],
("x86", "avx512vaes") => smallvec!["vaes"],
("x86", "avx512gfni") => smallvec!["gfni"],
("x86", "avx512vpclmulqdq") => smallvec!["vpclmulqdq"],
(Arch::X86 | Arch::X86_64, "x87") => smallvec![],
(Arch::X86 | Arch::X86_64, "sse4.2") => smallvec!["sse4.2", "crc32"],
(Arch::X86 | Arch::X86_64, "pclmulqdq") => smallvec!["pclmul"],
(Arch::X86 | Arch::X86_64, "rdrand") => smallvec!["rdrnd"],
(Arch::X86 | Arch::X86_64, "bmi1") => smallvec!["bmi"],
(Arch::X86 | Arch::X86_64, "cmpxchg16b") => smallvec!["cx16"],
(Arch::X86 | Arch::X86_64, "avx512vaes") => smallvec!["vaes"],
(Arch::X86 | Arch::X86_64, "avx512gfni") => smallvec!["gfni"],
(Arch::X86 | Arch::X86_64, "avx512vpclmulqdq") => smallvec!["vpclmulqdq"],
// NOTE: seems like GCC requires 'avx512bw' for 'avx512vbmi2'.
("x86", "avx512vbmi2") => smallvec!["avx512vbmi2", "avx512bw"],
(Arch::X86 | Arch::X86_64, "avx512vbmi2") => {
smallvec!["avx512vbmi2", "avx512bw"]
}
// NOTE: seems like GCC requires 'avx512bw' for 'avx512bitalg'.
("x86", "avx512bitalg") => smallvec!["avx512bitalg", "avx512bw"],
("aarch64", "rcpc2") => smallvec!["rcpc-immo"],
("aarch64", "dpb") => smallvec!["ccpp"],
("aarch64", "dpb2") => smallvec!["ccdp"],
("aarch64", "frintts") => smallvec!["fptoint"],
("aarch64", "fcma") => smallvec!["complxnum"],
("aarch64", "pmuv3") => smallvec!["perfmon"],
("aarch64", "paca") => smallvec!["pauth"],
("aarch64", "pacg") => smallvec!["pauth"],
(Arch::X86 | Arch::X86_64, "avx512bitalg") => {
smallvec!["avx512bitalg", "avx512bw"]
}
(Arch::AArch64, "rcpc2") => smallvec!["rcpc-immo"],
(Arch::AArch64, "dpb") => smallvec!["ccpp"],
(Arch::AArch64, "dpb2") => smallvec!["ccdp"],
(Arch::AArch64, "frintts") => smallvec!["fptoint"],
(Arch::AArch64, "fcma") => smallvec!["complxnum"],
(Arch::AArch64, "pmuv3") => smallvec!["perfmon"],
(Arch::AArch64, "paca") => smallvec!["pauth"],
(Arch::AArch64, "pacg") => smallvec!["pauth"],
// Rust ties fp and neon together. In GCC neon implicitly enables fp,
// but we manually enable neon when a feature only implicitly enables fp
("aarch64", "f32mm") => smallvec!["f32mm", "neon"],
("aarch64", "f64mm") => smallvec!["f64mm", "neon"],
("aarch64", "fhm") => smallvec!["fp16fml", "neon"],
("aarch64", "fp16") => smallvec!["fullfp16", "neon"],
("aarch64", "jsconv") => smallvec!["jsconv", "neon"],
("aarch64", "sve") => smallvec!["sve", "neon"],
("aarch64", "sve2") => smallvec!["sve2", "neon"],
("aarch64", "sve2-aes") => smallvec!["sve2-aes", "neon"],
("aarch64", "sve2-sm4") => smallvec!["sve2-sm4", "neon"],
("aarch64", "sve2-sha3") => smallvec!["sve2-sha3", "neon"],
("aarch64", "sve2-bitperm") => smallvec!["sve2-bitperm", "neon"],
(Arch::AArch64, "f32mm") => smallvec!["f32mm", "neon"],
(Arch::AArch64, "f64mm") => smallvec!["f64mm", "neon"],
(Arch::AArch64, "fhm") => smallvec!["fp16fml", "neon"],
(Arch::AArch64, "fp16") => smallvec!["fullfp16", "neon"],
(Arch::AArch64, "jsconv") => smallvec!["jsconv", "neon"],
(Arch::AArch64, "sve") => smallvec!["sve", "neon"],
(Arch::AArch64, "sve2") => smallvec!["sve2", "neon"],
(Arch::AArch64, "sve2-aes") => smallvec!["sve2-aes", "neon"],
(Arch::AArch64, "sve2-sm4") => smallvec!["sve2-sm4", "neon"],
(Arch::AArch64, "sve2-sha3") => smallvec!["sve2-sha3", "neon"],
(Arch::AArch64, "sve2-bitperm") => smallvec!["sve2-bitperm", "neon"],
(_, s) => smallvec![s],
}
// cSpell:enable

4
compiler/rustc_codegen_gcc/src/lib.rs
View file

@ -103,7 +103,7 @@ use rustc_middle::util::Providers;
use rustc_session::Session;
use rustc_session::config::{OptLevel, OutputFilenames};
use rustc_span::Symbol;
use rustc_target::spec::RelocModel;
use rustc_target::spec::{Arch, RelocModel};
use tempfile::TempDir;
use crate::back::lto::ModuleBuffer;
@ -249,7 +249,7 @@ impl CodegenBackend for GccCodegenBackend {
fn new_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
let context = Context::default();
if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" {
if matches!(tcx.sess.target.arch, Arch::X86 | Arch::X86_64) {
context.add_command_line_option("-masm=intel");
}
#[cfg(feature = "master")]

17
compiler/rustc_codegen_llvm/src/abi.rs
View file

@ -16,7 +16,7 @@ use rustc_session::{Session, config};
use rustc_target::callconv::{
ArgAbi, ArgAttribute, ArgAttributes, ArgExtension, CastTarget, FnAbi, PassMode,
};
use rustc_target::spec::SanitizerSet;
use rustc_target::spec::{Arch, SanitizerSet};
use smallvec::SmallVec;
use crate::attributes::{self, llfn_attrs_from_instance};
@ -698,16 +698,11 @@ pub(crate) fn to_llvm_calling_convention(sess: &Session, abi: CanonAbi) -> llvm:
// possible to declare an `extern "custom"` block, so the backend still needs a calling
// convention for declaring foreign functions.
CanonAbi::Custom => llvm::CCallConv,
CanonAbi::GpuKernel => {
let arch = sess.target.arch.as_ref();
if arch == "amdgpu" {
llvm::AmdgpuKernel
} else if arch == "nvptx64" {
llvm::PtxKernel
} else {
panic!("Architecture {arch} does not support GpuKernel calling convention");
}
}
CanonAbi::GpuKernel => match sess.target.arch {
Arch::AmdGpu => llvm::AmdgpuKernel,
Arch::Nvptx64 => llvm::PtxKernel,
arch => panic!("Architecture {arch} does not support GpuKernel calling convention"),
},
CanonAbi::Interrupt(interrupt_kind) => match interrupt_kind {
InterruptKind::Avr => llvm::AvrInterrupt,
InterruptKind::AvrNonBlocking => llvm::AvrNonBlockingInterrupt,

8
compiler/rustc_codegen_llvm/src/attributes.rs
View file

@ -7,7 +7,7 @@ use rustc_middle::middle::codegen_fn_attrs::{
use rustc_middle::ty::{self, TyCtxt};
use rustc_session::config::{BranchProtection, FunctionReturn, OptLevel, PAuthKey, PacRet};
use rustc_symbol_mangling::mangle_internal_symbol;
use rustc_target::spec::{FramePointer, SanitizerSet, StackProbeType, StackProtector};
use rustc_target::spec::{Arch, FramePointer, SanitizerSet, StackProbeType, StackProtector};
use smallvec::SmallVec;
use crate::context::SimpleCx;
@ -54,7 +54,7 @@ pub(crate) fn inline_attr<'ll, 'tcx>(
Some(AttributeKind::AlwaysInline.create_attr(cx.llcx))
}
InlineAttr::Never => {
if tcx.sess.target.arch != "amdgpu" {
if tcx.sess.target.arch != Arch::AmdGpu {
Some(AttributeKind::NoInline.create_attr(cx.llcx))
} else {
None
@ -287,7 +287,7 @@ fn stackprotector_attr<'ll>(cx: &SimpleCx<'ll>, sess: &Session) -> Option<&'ll A
}
fn backchain_attr<'ll>(cx: &SimpleCx<'ll>, sess: &Session) -> Option<&'ll Attribute> {
if sess.target.arch != "s390x" {
if sess.target.arch != Arch::S390x {
return None;
}
@ -423,7 +423,7 @@ pub(crate) fn llfn_attrs_from_instance<'ll, 'tcx>(
if let Some(BranchProtection { bti, pac_ret, gcs }) =
sess.opts.unstable_opts.branch_protection
{
assert!(sess.target.arch == "aarch64");
assert!(sess.target.arch == Arch::AArch64);
if bti {
to_add.push(llvm::CreateAttrString(cx.llcx, "branch-target-enforcement"));
}

6
compiler/rustc_codegen_llvm/src/back/write.rs
View file

@ -25,7 +25,9 @@ use rustc_session::config::{
self, Lto, OutputType, Passes, RemapPathScopeComponents, SplitDwarfKind, SwitchWithOptPath,
};
use rustc_span::{BytePos, InnerSpan, Pos, SpanData, SyntaxContext, sym};
use rustc_target::spec::{CodeModel, FloatAbi, RelocModel, SanitizerSet, SplitDebuginfo, TlsModel};
use rustc_target::spec::{
Arch, CodeModel, FloatAbi, RelocModel, SanitizerSet, SplitDebuginfo, TlsModel,
};
use tracing::{debug, trace};
use crate::back::lto::ThinBuffer;
@ -206,7 +208,7 @@ pub(crate) fn target_machine_factory(
let reloc_model = to_llvm_relocation_model(sess.relocation_model());
let (opt_level, _) = to_llvm_opt_settings(optlvl);
let float_abi = if sess.target.arch == "arm" && sess.opts.cg.soft_float {
let float_abi = if sess.target.arch == Arch::Arm && sess.opts.cg.soft_float {
llvm::FloatAbi::Soft
} else {
// `validate_commandline_args_with_session_available` has already warned about this being

11
compiler/rustc_codegen_llvm/src/builder.rs
View file

@ -26,7 +26,7 @@ use rustc_sanitizers::{cfi, kcfi};
use rustc_session::config::OptLevel;
use rustc_span::Span;
use rustc_target::callconv::{FnAbi, PassMode};
use rustc_target::spec::{HasTargetSpec, SanitizerSet, Target};
use rustc_target::spec::{Arch, HasTargetSpec, SanitizerSet, Target};
use smallvec::SmallVec;
use tracing::{debug, instrument};
@ -839,11 +839,10 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
// operation. But it's not clear how to do that with LLVM.)
// For more context, see <https://github.com/rust-lang/rust/issues/114582> and
// <https://github.com/llvm/llvm-project/issues/64521>.
const WELL_BEHAVED_NONTEMPORAL_ARCHS: &[&str] =
&["aarch64", "arm", "riscv32", "riscv64"];
let use_nontemporal =
WELL_BEHAVED_NONTEMPORAL_ARCHS.contains(&&*self.cx.tcx.sess.target.arch);
let use_nontemporal = matches!(
self.cx.tcx.sess.target.arch,
Arch::AArch64 | Arch::Arm | Arch::RiscV32 | Arch::RiscV64
);
if use_nontemporal {
// According to LLVM [1] building a nontemporal store must
// *always* point to a metadata value of the integer 1.

3
compiler/rustc_codegen_llvm/src/callee.rs
View file

@ -7,6 +7,7 @@
use rustc_codegen_ssa::common;
use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt, HasTypingEnv};
use rustc_middle::ty::{self, Instance, TypeVisitableExt};
use rustc_target::spec::Arch;
use tracing::debug;
use crate::context::CodegenCx;
@ -35,7 +36,7 @@ pub(crate) fn get_fn<'ll, 'tcx>(cx: &CodegenCx<'ll, 'tcx>, instance: Instance<'t
llfn
} else {
let instance_def_id = instance.def_id();
let llfn = if tcx.sess.target.arch == "x86"
let llfn = if tcx.sess.target.arch == Arch::X86
&& let Some(dllimport) = crate::common::get_dllimport(tcx, instance_def_id, sym)
{
// When calling functions in generated import libraries, MSVC needs

3
compiler/rustc_codegen_llvm/src/consts.rs
View file

@ -17,6 +17,7 @@ use rustc_middle::ty::layout::{HasTypingEnv, LayoutOf};
use rustc_middle::ty::{self, Instance};
use rustc_middle::{bug, span_bug};
use rustc_span::Symbol;
use rustc_target::spec::Arch;
use tracing::{debug, instrument, trace};
use crate::common::CodegenCx;
@ -203,7 +204,7 @@ fn check_and_apply_linkage<'ll, 'tcx>(
llvm::set_linkage(g2, llvm::Linkage::InternalLinkage);
llvm::set_initializer(g2, g1);
g2
} else if cx.tcx.sess.target.arch == "x86"
} else if cx.tcx.sess.target.arch == Arch::X86
&& common::is_mingw_gnu_toolchain(&cx.tcx.sess.target)
&& let Some(dllimport) = crate::common::get_dllimport(cx.tcx, def_id, sym)
{

18
compiler/rustc_codegen_llvm/src/context.rs
View file

@ -28,7 +28,9 @@ use rustc_session::config::{
use rustc_span::source_map::Spanned;
use rustc_span::{DUMMY_SP, Span, Symbol};
use rustc_symbol_mangling::mangle_internal_symbol;
use rustc_target::spec::{HasTargetSpec, RelocModel, SmallDataThresholdSupport, Target, TlsModel};
use rustc_target::spec::{
Arch, HasTargetSpec, RelocModel, SmallDataThresholdSupport, Target, TlsModel,
};
use smallvec::SmallVec;
use crate::abi::to_llvm_calling_convention;
@ -181,22 +183,22 @@ pub(crate) unsafe fn create_module<'ll>(
let llvm_version = llvm_util::get_version();
if llvm_version < (21, 0, 0) {
if sess.target.arch == "nvptx64" {
if sess.target.arch == Arch::Nvptx64 {
// LLVM 21 updated the default layout on nvptx: https://github.com/llvm/llvm-project/pull/124961
target_data_layout = target_data_layout.replace("e-p6:32:32-i64", "e-i64");
}
if sess.target.arch == "amdgpu" {
if sess.target.arch == Arch::AmdGpu {
// LLVM 21 adds the address width for address space 8.
// See https://github.com/llvm/llvm-project/pull/139419
target_data_layout = target_data_layout.replace("p8:128:128:128:48", "p8:128:128")
}
}
if llvm_version < (22, 0, 0) {
if sess.target.arch == "avr" {
if sess.target.arch == Arch::Avr {
// LLVM 22.0 updated the default layout on avr: https://github.com/llvm/llvm-project/pull/153010
target_data_layout = target_data_layout.replace("n8:16", "n8")
}
if sess.target.arch == "nvptx64" {
if sess.target.arch == Arch::Nvptx64 {
// LLVM 22 updated the NVPTX layout to indicate 256-bit vector load/store: https://github.com/llvm/llvm-project/pull/155198
target_data_layout = target_data_layout.replace("-i256:256", "");
}
@ -371,7 +373,7 @@ pub(crate) unsafe fn create_module<'ll>(
if let Some(BranchProtection { bti, pac_ret, gcs }) = sess.opts.unstable_opts.branch_protection
{
if sess.target.arch == "aarch64" {
if sess.target.arch == Arch::AArch64 {
llvm::add_module_flag_u32(
llmod,
llvm::ModuleFlagMergeBehavior::Min,
@ -502,7 +504,7 @@ pub(crate) unsafe fn create_module<'ll>(
// FIXME: https://github.com/llvm/llvm-project/issues/50591
// If llvm_abiname is empty, emit nothing.
let llvm_abiname = &sess.target.options.llvm_abiname;
if matches!(sess.target.arch.as_ref(), "riscv32" | "riscv64") && !llvm_abiname.is_empty() {
if matches!(sess.target.arch, Arch::RiscV32 | Arch::RiscV64) && !llvm_abiname.is_empty() {
llvm::add_module_flag_str(
llmod,
llvm::ModuleFlagMergeBehavior::Error,
@ -667,7 +669,7 @@ impl<'ll, 'tcx> CodegenCx<'ll, 'tcx> {
/// This corresponds to the `-fobjc-abi-version=` flag in Clang / GCC.
pub(crate) fn objc_abi_version(&self) -> u32 {
assert!(self.tcx.sess.target.is_like_darwin);
if self.tcx.sess.target.arch == "x86" && self.tcx.sess.target.os == "macos" {
if self.tcx.sess.target.arch == Arch::X86 && self.tcx.sess.target.os == "macos" {
// 32-bit x86 macOS uses ABI version 1 (a.k.a. the "fragile ABI").
1
} else {

183
compiler/rustc_codegen_llvm/src/llvm_util.rs
View file

@ -15,7 +15,7 @@ use rustc_fs_util::path_to_c_string;
use rustc_middle::bug;
use rustc_session::Session;
use rustc_session::config::{PrintKind, PrintRequest};
use rustc_target::spec::{MergeFunctions, PanicStrategy, SmallDataThresholdSupport};
use rustc_target::spec::{Arch, MergeFunctions, PanicStrategy, SmallDataThresholdSupport};
use smallvec::{SmallVec, smallvec};
use crate::back::write::create_informational_target_machine;
@ -217,70 +217,85 @@ impl<'a> IntoIterator for LLVMFeature<'a> {
/// Rust can also be build with an external precompiled version of LLVM which might lead to failures
/// if the oldest tested / supported LLVM version doesn't yet support the relevant intrinsics.
pub(crate) fn to_llvm_features<'a>(sess: &Session, s: &'a str) -> Option<LLVMFeature<'a>> {
let raw_arch = &*sess.target.arch;
let arch = match raw_arch {
"x86_64" => "x86",
"arm64ec" => "aarch64",
"sparc64" => "sparc",
"powerpc64" => "powerpc",
_ => raw_arch,
};
let (major, _, _) = get_version();
match (arch, s) {
("aarch64", "rcpc2") => Some(LLVMFeature::new("rcpc-immo")),
("aarch64", "dpb") => Some(LLVMFeature::new("ccpp")),
("aarch64", "dpb2") => Some(LLVMFeature::new("ccdp")),
("aarch64", "frintts") => Some(LLVMFeature::new("fptoint")),
("aarch64", "fcma") => Some(LLVMFeature::new("complxnum")),
("aarch64", "pmuv3") => Some(LLVMFeature::new("perfmon")),
("aarch64", "paca") => Some(LLVMFeature::new("pauth")),
("aarch64", "pacg") => Some(LLVMFeature::new("pauth")),
("aarch64", "flagm2") => Some(LLVMFeature::new("altnzcv")),
// Rust ties fp and neon together.
("aarch64", "neon") => Some(LLVMFeature::with_dependencies(
"neon",
smallvec![TargetFeatureFoldStrength::Both("fp-armv8")],
)),
// In LLVM neon implicitly enables fp, but we manually enable
// neon when a feature only implicitly enables fp
("aarch64", "fhm") => Some(LLVMFeature::new("fp16fml")),
("aarch64", "fp16") => Some(LLVMFeature::new("fullfp16")),
match sess.target.arch {
Arch::AArch64 | Arch::Arm64EC => {
match s {
"rcpc2" => Some(LLVMFeature::new("rcpc-immo")),
"dpb" => Some(LLVMFeature::new("ccpp")),
"dpb2" => Some(LLVMFeature::new("ccdp")),
"frintts" => Some(LLVMFeature::new("fptoint")),
"fcma" => Some(LLVMFeature::new("complxnum")),
"pmuv3" => Some(LLVMFeature::new("perfmon")),
"paca" => Some(LLVMFeature::new("pauth")),
"pacg" => Some(LLVMFeature::new("pauth")),
"flagm2" => Some(LLVMFeature::new("altnzcv")),
// Rust ties fp and neon together.
"neon" => Some(LLVMFeature::with_dependencies(
"neon",
smallvec![TargetFeatureFoldStrength::Both("fp-armv8")],
)),
// In LLVM neon implicitly enables fp, but we manually enable
// neon when a feature only implicitly enables fp
"fhm" => Some(LLVMFeature::new("fp16fml")),
"fp16" => Some(LLVMFeature::new("fullfp16")),
// Filter out features that are not supported by the current LLVM version
"fpmr" => None, // only existed in 18
s => Some(LLVMFeature::new(s)),
}
}
Arch::Arm => match s {
"fp16" => Some(LLVMFeature::new("fullfp16")),
s => Some(LLVMFeature::new(s)),
},
// Filter out features that are not supported by the current LLVM version
("aarch64", "fpmr") => None, // only existed in 18
("arm", "fp16") => Some(LLVMFeature::new("fullfp16")),
// Filter out features that are not supported by the current LLVM version
("loongarch32" | "loongarch64", "32s") if major < 21 => None,
("powerpc", "power8-crypto") => Some(LLVMFeature::new("crypto")),
("sparc", "leoncasa") => Some(LLVMFeature::new("hasleoncasa")),
("x86", "sse4.2") => Some(LLVMFeature::with_dependencies(
"sse4.2",
smallvec![TargetFeatureFoldStrength::EnableOnly("crc32")],
)),
("x86", "pclmulqdq") => Some(LLVMFeature::new("pclmul")),
("x86", "rdrand") => Some(LLVMFeature::new("rdrnd")),
("x86", "bmi1") => Some(LLVMFeature::new("bmi")),
("x86", "cmpxchg16b") => Some(LLVMFeature::new("cx16")),
("x86", "lahfsahf") => Some(LLVMFeature::new("sahf")),
// Enable the evex512 target feature if an avx512 target feature is enabled.
("x86", s) if s.starts_with("avx512") => Some(LLVMFeature::with_dependencies(
s,
smallvec![TargetFeatureFoldStrength::EnableOnly("evex512")],
)),
("x86", "avx10.1") => Some(LLVMFeature::new("avx10.1-512")),
("x86", "avx10.2") => Some(LLVMFeature::new("avx10.2-512")),
("x86", "apxf") => Some(LLVMFeature::with_dependencies(
"egpr",
smallvec![
TargetFeatureFoldStrength::Both("push2pop2"),
TargetFeatureFoldStrength::Both("ppx"),
TargetFeatureFoldStrength::Both("ndd"),
TargetFeatureFoldStrength::Both("ccmp"),
TargetFeatureFoldStrength::Both("cf"),
TargetFeatureFoldStrength::Both("nf"),
TargetFeatureFoldStrength::Both("zu"),
],
)),
(_, s) => Some(LLVMFeature::new(s)),
Arch::LoongArch32 | Arch::LoongArch64 => match s {
"32s" if major < 21 => None,
s => Some(LLVMFeature::new(s)),
},
Arch::PowerPC | Arch::PowerPC64 => match s {
"power8-crypto" => Some(LLVMFeature::new("crypto")),
s => Some(LLVMFeature::new(s)),
},
Arch::Sparc | Arch::Sparc64 => match s {
"leoncasa" => Some(LLVMFeature::new("hasleoncasa")),
s => Some(LLVMFeature::new(s)),
},
Arch::X86 | Arch::X86_64 => {
match s {
"sse4.2" => Some(LLVMFeature::with_dependencies(
"sse4.2",
smallvec![TargetFeatureFoldStrength::EnableOnly("crc32")],
)),
"pclmulqdq" => Some(LLVMFeature::new("pclmul")),
"rdrand" => Some(LLVMFeature::new("rdrnd")),
"bmi1" => Some(LLVMFeature::new("bmi")),
"cmpxchg16b" => Some(LLVMFeature::new("cx16")),
"lahfsahf" => Some(LLVMFeature::new("sahf")),
// Enable the evex512 target feature if an avx512 target feature is enabled.
s if s.starts_with("avx512") => Some(LLVMFeature::with_dependencies(
s,
smallvec![TargetFeatureFoldStrength::EnableOnly("evex512")],
)),
"avx10.1" => Some(LLVMFeature::new("avx10.1-512")),
"avx10.2" => Some(LLVMFeature::new("avx10.2-512")),
"apxf" => Some(LLVMFeature::with_dependencies(
"egpr",
smallvec![
TargetFeatureFoldStrength::Both("push2pop2"),
TargetFeatureFoldStrength::Both("ppx"),
TargetFeatureFoldStrength::Both("ndd"),
TargetFeatureFoldStrength::Both("ccmp"),
TargetFeatureFoldStrength::Both("cf"),
TargetFeatureFoldStrength::Both("nf"),
TargetFeatureFoldStrength::Both("zu"),
],
)),
s => Some(LLVMFeature::new(s)),
}
}
_ => Some(LLVMFeature::new(s)),
}
}
@ -327,7 +342,7 @@ pub(crate) fn target_config(sess: &Session) -> TargetConfig {
/// Determine whether or not experimental float types are reliable based on known bugs.
fn update_target_reliable_float_cfg(sess: &Session, cfg: &mut TargetConfig) {
let target_arch = sess.target.arch.as_ref();
let target_arch = sess.target.arch;
let target_os = sess.target.options.os.as_ref();
let target_env = sess.target.options.env.as_ref();
let target_abi = sess.target.options.abi.as_ref();
@ -338,23 +353,23 @@ fn update_target_reliable_float_cfg(sess: &Session, cfg: &mut TargetConfig) {
cfg.has_reliable_f16 = match (target_arch, target_os) {
// LLVM crash without neon <https://github.com/llvm/llvm-project/issues/129394> (fixed in llvm20)
("aarch64", _)
(Arch::AArch64, _)
if !cfg.target_features.iter().any(|f| f.as_str() == "neon") && lt_20_1_1 =>
{
false
}
// Unsupported <https://github.com/llvm/llvm-project/issues/94434>
("arm64ec", _) => false,
(Arch::Arm64EC, _) => false,
// Selection failure <https://github.com/llvm/llvm-project/issues/50374> (fixed in llvm21)
("s390x", _) if lt_21_0_0 => false,
(Arch::S390x, _) if lt_21_0_0 => false,
// MinGW ABI bugs <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115054>
("x86_64", "windows") if target_env == "gnu" && target_abi != "llvm" => false,
(Arch::X86_64, "windows") if target_env == "gnu" && target_abi != "llvm" => false,
// Infinite recursion <https://github.com/llvm/llvm-project/issues/97981>
("csky", _) => false,
("hexagon", _) if lt_21_0_0 => false, // (fixed in llvm21)
("powerpc" | "powerpc64", _) => false,
("sparc" | "sparc64", _) => false,
("wasm32" | "wasm64", _) => false,
(Arch::CSky, _) => false,
(Arch::Hexagon, _) if lt_21_0_0 => false, // (fixed in llvm21)
(Arch::PowerPC | Arch::PowerPC64, _) => false,
(Arch::Sparc | Arch::Sparc64, _) => false,
(Arch::Wasm32 | Arch::Wasm64, _) => false,
// `f16` support only requires that symbols converting to and from `f32` are available. We
// provide these in `compiler-builtins`, so `f16` should be available on all platforms that
// do not have other ABI issues or LLVM crashes.
@ -363,24 +378,24 @@ fn update_target_reliable_float_cfg(sess: &Session, cfg: &mut TargetConfig) {
cfg.has_reliable_f128 = match (target_arch, target_os) {
// Unsupported <https://github.com/llvm/llvm-project/issues/94434>
("arm64ec", _) => false,
(Arch::Arm64EC, _) => false,
// Selection bug <https://github.com/llvm/llvm-project/issues/96432> (fixed in llvm20)
("mips64" | "mips64r6", _) if lt_20_1_1 => false,
(Arch::Mips64 | Arch::Mips64r6, _) if lt_20_1_1 => false,
// Selection bug <https://github.com/llvm/llvm-project/issues/95471>. This issue is closed
// but basic math still does not work.
("nvptx64", _) => false,
(Arch::Nvptx64, _) => false,
// Unsupported https://github.com/llvm/llvm-project/issues/121122
("amdgpu", _) => false,
(Arch::AmdGpu, _) => false,
// ABI bugs <https://github.com/rust-lang/rust/issues/125109> et al. (full
// list at <https://github.com/rust-lang/rust/issues/116909>)
("powerpc" | "powerpc64", _) => false,
(Arch::PowerPC | Arch::PowerPC64, _) => false,
// ABI unsupported <https://github.com/llvm/llvm-project/issues/41838>
("sparc", _) => false,
(Arch::Sparc, _) => false,
// Stack alignment bug <https://github.com/llvm/llvm-project/issues/77401>. NB: tests may
// not fail if our compiler-builtins is linked. (fixed in llvm21)
("x86", _) if lt_21_0_0 => false,
(Arch::X86, _) if lt_21_0_0 => false,
// MinGW ABI bugs <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115054>
("x86_64", "windows") if target_env == "gnu" && target_abi != "llvm" => false,
(Arch::X86_64, "windows") if target_env == "gnu" && target_abi != "llvm" => false,
// There are no known problems on other platforms, so the only requirement is that symbols
// are available. `compiler-builtins` provides all symbols required for core `f128`
// support, so this should work for everything else.
@ -402,7 +417,7 @@ fn update_target_reliable_float_cfg(sess: &Session, cfg: &mut TargetConfig) {
//
// musl does not implement the symbols required for f128 math at all.
_ if target_env == "musl" => false,
("x86_64", _) => false,
(Arch::X86_64, _) => false,
(_, "linux") if target_pointer_width == 64 => true,
_ => false,
} && cfg.has_reliable_f128;
@ -605,8 +620,8 @@ fn llvm_features_by_flags(sess: &Session, features: &mut Vec<String>) {
// -Zfixed-x18
if sess.opts.unstable_opts.fixed_x18 {
if sess.target.arch != "aarch64" {
sess.dcx().emit_fatal(errors::FixedX18InvalidArch { arch: &sess.target.arch });
if sess.target.arch != Arch::AArch64 {
sess.dcx().emit_fatal(errors::FixedX18InvalidArch { arch: sess.target.arch.desc() });
} else {
features.push("+reserve-x18".into());
}

4
compiler/rustc_codegen_llvm/src/mono_item.rs
View file

@ -7,7 +7,7 @@ use rustc_middle::mir::mono::Visibility;
use rustc_middle::ty::layout::{FnAbiOf, HasTypingEnv, LayoutOf};
use rustc_middle::ty::{self, Instance, TypeVisitableExt};
use rustc_session::config::CrateType;
use rustc_target::spec::RelocModel;
use rustc_target::spec::{Arch, RelocModel};
use tracing::debug;
use crate::context::CodegenCx;
@ -116,7 +116,7 @@ impl CodegenCx<'_, '_> {
}
// PowerPC64 prefers TOC indirection to avoid copy relocations.
if matches!(&*self.tcx.sess.target.arch, "powerpc64" | "powerpc64le") {
if matches!(self.tcx.sess.target.arch, Arch::PowerPC64 | Arch::PowerPC64LE) {
return false;
}

37
compiler/rustc_codegen_llvm/src/va_arg.rs
View file

@ -7,6 +7,7 @@ use rustc_codegen_ssa::traits::{
};
use rustc_middle::ty::Ty;
use rustc_middle::ty::layout::{HasTyCtxt, LayoutOf};
use rustc_target::spec::Arch;
use crate::builder::Builder;
use crate::llvm::{Type, Value};
@ -886,8 +887,8 @@ pub(super) fn emit_va_arg<'ll, 'tcx>(
// is lacking in some instances, so we should only use it as a fallback.
let target = &bx.cx.tcx.sess.target;
match &*target.arch {
"x86" => emit_ptr_va_arg(
match target.arch {
Arch::X86 => emit_ptr_va_arg(
bx,
addr,
target_ty,
@ -896,7 +897,7 @@ pub(super) fn emit_va_arg<'ll, 'tcx>(
if target.is_like_windows { AllowHigherAlign::No } else { AllowHigherAlign::Yes },
ForceRightAdjust::No,
),
"aarch64" | "arm64ec" if target.is_like_windows || target.is_like_darwin => {
Arch::AArch64 | Arch::Arm64EC if target.is_like_windows || target.is_like_darwin => {
emit_ptr_va_arg(
bx,
addr,
@ -907,8 +908,8 @@ pub(super) fn emit_va_arg<'ll, 'tcx>(
ForceRightAdjust::No,
)
}
"aarch64" => emit_aapcs_va_arg(bx, addr, target_ty),
"arm" => {
Arch::AArch64 => emit_aapcs_va_arg(bx, addr, target_ty),
Arch::Arm => {
// Types wider than 16 bytes are not currently supported. Clang has special logic for
// such types, but `VaArgSafe` is not implemented for any type that is this large.
assert!(bx.cx.size_of(target_ty).bytes() <= 16);
@ -923,22 +924,28 @@ pub(super) fn emit_va_arg<'ll, 'tcx>(
ForceRightAdjust::No,
)
}
"s390x" => emit_s390x_va_arg(bx, addr, target_ty),
"powerpc" => emit_powerpc_va_arg(bx, addr, target_ty),
"powerpc64" | "powerpc64le" => emit_ptr_va_arg(
Arch::S390x => emit_s390x_va_arg(bx, addr, target_ty),
Arch::PowerPC => emit_powerpc_va_arg(bx, addr, target_ty),
Arch::PowerPC64 => emit_ptr_va_arg(
bx,
addr,
target_ty,
PassMode::Direct,
SlotSize::Bytes8,
AllowHigherAlign::Yes,
match &*target.arch {
"powerpc64" => ForceRightAdjust::Yes,
_ => ForceRightAdjust::No,
},
ForceRightAdjust::Yes,
),
Arch::PowerPC64LE => emit_ptr_va_arg(
bx,
addr,
target_ty,
PassMode::Direct,
SlotSize::Bytes8,
AllowHigherAlign::Yes,
ForceRightAdjust::No,
),
// Windows x86_64
"x86_64" if target.is_like_windows => {
Arch::X86_64 if target.is_like_windows => {
let target_ty_size = bx.cx.size_of(target_ty).bytes();
emit_ptr_va_arg(
bx,
@ -955,8 +962,8 @@ pub(super) fn emit_va_arg<'ll, 'tcx>(
)
}
// This includes `target.is_like_darwin`, which on x86_64 targets is like sysv64.
"x86_64" => emit_x86_64_sysv64_va_arg(bx, addr, target_ty),
"xtensa" => emit_xtensa_va_arg(bx, addr, target_ty),
Arch::X86_64 => emit_x86_64_sysv64_va_arg(bx, addr, target_ty),
Arch::Xtensa => emit_xtensa_va_arg(bx, addr, target_ty),
// For all other architecture/OS combinations fall back to using
// the LLVM va_arg instruction.
// https://llvm.org/docs/LangRef.html#va-arg-instruction

6
compiler/rustc_codegen_ssa/src/back/apple.rs
View file

@ -5,8 +5,8 @@ use std::process::Command;
use itertools::Itertools;
use rustc_middle::middle::exported_symbols::SymbolExportKind;
use rustc_session::Session;
use rustc_target::spec::Target;
pub(super) use rustc_target::spec::apple::OSVersion;
use rustc_target::spec::{Arch, Target};
use tracing::debug;
use crate::errors::{XcrunError, XcrunSdkPathWarning};
@ -95,7 +95,7 @@ pub(super) fn add_data_and_relocation(
pointer_width => unimplemented!("unsupported Apple pointer width {pointer_width:?}"),
};
if target.arch == "x86_64" {
if target.arch == Arch::X86_64 {
// Force alignment for the entire section to be 16 on x86_64.
file.section_mut(section).append_data(&[], 16);
} else {
@ -111,7 +111,7 @@ pub(super) fn add_data_and_relocation(
r_pcrel: false,
r_length: 3,
}
} else if target.arch == "arm" {
} else if target.arch == Arch::Arm {
// FIXME(madsmtm): Remove once `object` supports 32-bit ARM relocations:
// https://github.com/gimli-rs/object/pull/757
object::write::RelocationFlags::MachO {

43
compiler/rustc_codegen_ssa/src/back/archive.rs
View file

@ -17,6 +17,7 @@ use rustc_fs_util::TempDirBuilder;
use rustc_metadata::EncodedMetadata;
use rustc_session::Session;
use rustc_span::Symbol;
use rustc_target::spec::Arch;
use tracing::trace;
use super::metadata::{create_compressed_metadata_file, search_for_section};
@ -42,7 +43,7 @@ pub struct ImportLibraryItem {
impl ImportLibraryItem {
fn into_coff_short_export(self, sess: &Session) -> COFFShortExport {
let import_name = (sess.target.arch == "arm64ec").then(|| self.name.clone());
let import_name = (sess.target.arch == Arch::Arm64EC).then(|| self.name.clone());
COFFShortExport {
name: self.name,
ext_name: None,
@ -117,12 +118,12 @@ pub trait ArchiveBuilderBuilder {
let exports =
items.into_iter().map(|item| item.into_coff_short_export(sess)).collect::<Vec<_>>();
let machine = match &*sess.target.arch {
"x86_64" => MachineTypes::AMD64,
"x86" => MachineTypes::I386,
"aarch64" => MachineTypes::ARM64,
"arm64ec" => MachineTypes::ARM64EC,
"arm" => MachineTypes::ARMNT,
let machine = match sess.target.arch {
Arch::X86_64 => MachineTypes::AMD64,
Arch::X86 => MachineTypes::I386,
Arch::AArch64 => MachineTypes::ARM64,
Arch::Arm64EC => MachineTypes::ARM64EC,
Arch::Arm => MachineTypes::ARMNT,
cpu => panic!("unsupported cpu type {cpu}"),
};
@ -223,12 +224,12 @@ fn create_mingw_dll_import_lib(
};
// dlltool target architecture args from:
// https://github.com/llvm/llvm-project-release-prs/blob/llvmorg-15.0.6/llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp#L69
let (dlltool_target_arch, dlltool_target_bitness) = match sess.target.arch.as_ref() {
"x86_64" => ("i386:x86-64", "--64"),
"x86" => ("i386", "--32"),
"aarch64" => ("arm64", "--64"),
"arm" => ("arm", "--32"),
_ => panic!("unsupported arch {}", sess.target.arch),
let (dlltool_target_arch, dlltool_target_bitness) = match sess.target.arch {
Arch::X86_64 => ("i386:x86-64", "--64"),
Arch::X86 => ("i386", "--32"),
Arch::AArch64 => ("arm64", "--64"),
Arch::Arm => ("arm", "--32"),
arch => panic!("unsupported arch {arch}"),
};
let mut dlltool_cmd = std::process::Command::new(&dlltool);
dlltool_cmd
@ -281,10 +282,10 @@ fn find_binutils_dlltool(sess: &Session) -> OsString {
"dlltool.exe"
} else {
// On other platforms, use the architecture-specific name.
match sess.target.arch.as_ref() {
"x86_64" => "x86_64-w64-mingw32-dlltool",
"x86" => "i686-w64-mingw32-dlltool",
"aarch64" => "aarch64-w64-mingw32-dlltool",
match sess.target.arch {
Arch::X86_64 => "x86_64-w64-mingw32-dlltool",
Arch::X86 => "i686-w64-mingw32-dlltool",
Arch::AArch64 => "aarch64-w64-mingw32-dlltool",
// For non-standard architectures (e.g., aarch32) fallback to "dlltool".
_ => "dlltool",
@ -378,9 +379,9 @@ pub fn try_extract_macho_fat_archive(
archive_path: &Path,
) -> io::Result<Option<PathBuf>> {
let archive_map = unsafe { Mmap::map(File::open(&archive_path)?)? };
let target_arch = match sess.target.arch.as_ref() {
"aarch64" => object::Architecture::Aarch64,
"x86_64" => object::Architecture::X86_64,
let target_arch = match sess.target.arch {
Arch::AArch64 => object::Architecture::Aarch64,
Arch::X86_64 => object::Architecture::X86_64,
_ => return Ok(None),
};
@ -531,7 +532,7 @@ impl<'a> ArArchiveBuilder<'a> {
&entries,
archive_kind,
false,
/* is_ec = */ Some(self.sess.target.arch == "arm64ec"),
/* is_ec = */ Some(self.sess.target.arch == Arch::Arm64EC),
)?;
archive_tmpfile.flush()?;
drop(archive_tmpfile);

3
compiler/rustc_codegen_ssa/src/back/link.rs
View file

@ -883,7 +883,8 @@ fn link_natively(
if is_msvc_link_exe && (code < 1000 || code > 9999) {
let is_vs_installed = find_msvc_tools::find_vs_version().is_ok();
let has_linker =
find_msvc_tools::find_tool(&sess.target.arch, "link.exe").is_some();
find_msvc_tools::find_tool(sess.target.arch.desc(), "link.exe")
.is_some();
sess.dcx().emit_note(errors::LinkExeUnexpectedError);

3
compiler/rustc_codegen_ssa/src/back/link/raw_dylib.rs
View file

@ -11,6 +11,7 @@ use rustc_hir::attrs::NativeLibKind;
use rustc_session::Session;
use rustc_session::cstore::DllImport;
use rustc_span::Symbol;
use rustc_target::spec::Arch;
use crate::back::archive::ImportLibraryItem;
use crate::back::link::ArchiveBuilderBuilder;
@ -77,7 +78,7 @@ pub(super) fn create_raw_dylib_dll_import_libs<'a>(
let items: Vec<ImportLibraryItem> = raw_dylib_imports
.iter()
.map(|import: &DllImport| {
if sess.target.arch == "x86" {
if sess.target.arch == Arch::X86 {
ImportLibraryItem {
name: common::i686_decorated_name(
import,

16
compiler/rustc_codegen_ssa/src/back/linker.rs
View file

@ -17,7 +17,7 @@ use rustc_middle::middle::exported_symbols::{
use rustc_middle::ty::TyCtxt;
use rustc_session::Session;
use rustc_session::config::{self, CrateType, DebugInfo, LinkerPluginLto, Lto, OptLevel, Strip};
use rustc_target::spec::{Cc, LinkOutputKind, LinkerFlavor, Lld};
use rustc_target::spec::{Arch, Cc, LinkOutputKind, LinkerFlavor, Lld};
use tracing::{debug, warn};
use super::command::Command;
@ -53,7 +53,7 @@ pub(crate) fn get_linker<'a>(
target_cpu: &'a str,
codegen_backend: &'static str,
) -> Box<dyn Linker + 'a> {
let msvc_tool = find_msvc_tools::find_tool(&sess.target.arch, "link.exe");
let msvc_tool = find_msvc_tools::find_tool(sess.target.arch.desc(), "link.exe");
// If our linker looks like a batch script on Windows then to execute this
// we'll need to spawn `cmd` explicitly. This is primarily done to handle
@ -87,11 +87,11 @@ pub(crate) fn get_linker<'a>(
if let Some(ref tool) = msvc_tool {
let original_path = tool.path();
if let Some(root_lib_path) = original_path.ancestors().nth(4) {
let arch = match t.arch.as_ref() {
"x86_64" => Some("x64"),
"x86" => Some("x86"),
"aarch64" => Some("arm64"),
"arm" => Some("arm"),
let arch = match t.arch {
Arch::X86_64 => Some("x64"),
Arch::X86 => Some("x86"),
Arch::AArch64 => Some("arm64"),
Arch::Arm => Some("arm"),
_ => None,
};
if let Some(ref a) = arch {
@ -589,7 +589,7 @@ impl<'a> Linker for GccLinker<'a> {
//
// Currently this makes sense only when using avr-gcc as a linker, since
// it brings a couple of hand-written important intrinsics from libgcc.
if self.sess.target.arch == "avr" && !self.uses_lld {
if self.sess.target.arch == Arch::Avr && !self.uses_lld {
self.verbatim_arg(format!("-mmcu={}", self.target_cpu));
}
}

10
compiler/rustc_codegen_ssa/src/back/symbol_export.rs
View file

@ -17,7 +17,7 @@ use rustc_middle::ty::{self, GenericArgKind, GenericArgsRef, Instance, SymbolNam
use rustc_middle::util::Providers;
use rustc_session::config::{CrateType, OomStrategy};
use rustc_symbol_mangling::mangle_internal_symbol;
use rustc_target::spec::TlsModel;
use rustc_target::spec::{Arch, TlsModel};
use tracing::debug;
use crate::back::symbol_export;
@ -659,11 +659,11 @@ pub(crate) fn linking_symbol_name_for_instance_in_crate<'tcx>(
return undecorated;
}
let prefix = match &target.arch[..] {
"x86" => Some('_'),
"x86_64" => None,
let prefix = match target.arch {
Arch::X86 => Some('_'),
Arch::X86_64 => None,
// Only functions are decorated for arm64ec.
"arm64ec" if export_kind == SymbolExportKind::Text => Some('#'),
Arch::Arm64EC if export_kind == SymbolExportKind::Text => Some('#'),
// Only x86/64 and arm64ec use symbol decorations.
_ => return undecorated,
};

7
compiler/rustc_codegen_ssa/src/base.rs
View file

@ -33,6 +33,7 @@ use rustc_session::Session;
use rustc_session::config::{self, CrateType, EntryFnType};
use rustc_span::{DUMMY_SP, Symbol, sym};
use rustc_symbol_mangling::mangle_internal_symbol;
use rustc_target::spec::Arch;
use rustc_trait_selection::infer::{BoundRegionConversionTime, TyCtxtInferExt};
use rustc_trait_selection::traits::{ObligationCause, ObligationCtxt};
use tracing::{debug, info};
@ -982,9 +983,9 @@ impl CrateInfo {
// by the compiler, but that's ok because all this stuff is unstable anyway.
let target = &tcx.sess.target;
if !are_upstream_rust_objects_already_included(tcx.sess) {
let add_prefix = match (target.is_like_windows, target.arch.as_ref()) {
(true, "x86") => |name: String, _: SymbolExportKind| format!("_{name}"),
(true, "arm64ec") => {
let add_prefix = match (target.is_like_windows, target.arch) {
(true, Arch::X86) => |name: String, _: SymbolExportKind| format!("_{name}"),
(true, Arch::Arm64EC) => {
// Only functions are decorated for arm64ec.
|name: String, export_kind: SymbolExportKind| match export_kind {
SymbolExportKind::Text => format!("#{name}"),

3
compiler/rustc_codegen_ssa/src/mir/intrinsic.rs
View file

@ -4,6 +4,7 @@ use rustc_middle::ty::{self, Ty, TyCtxt};
use rustc_middle::{bug, span_bug};
use rustc_session::config::OptLevel;
use rustc_span::sym;
use rustc_target::spec::Arch;
use super::FunctionCx;
use super::operand::OperandRef;
@ -79,7 +80,7 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
// reinterpretation of values as (chunkable) byte arrays, and the loop in the
// block optimization in `ptr::swap_nonoverlapping` is hard to rewrite back
// into the (unoptimized) direct swapping implementation, so we disable it.
|| bx.sess().target.arch == "spirv"
|| bx.sess().target.arch == Arch::SpirV
{
let align = pointee_layout.align.abi;
let x_place = args[0].val.deref(align);

4
compiler/rustc_codegen_ssa/src/mir/naked_asm.rs
View file

@ -7,7 +7,7 @@ use rustc_middle::ty::{Instance, Ty, TyCtxt, TypeVisitableExt};
use rustc_middle::{bug, ty};
use rustc_span::sym;
use rustc_target::callconv::{ArgAbi, FnAbi, PassMode};
use rustc_target::spec::BinaryFormat;
use rustc_target::spec::{Arch, BinaryFormat};
use crate::common;
use crate::mir::AsmCodegenMethods;
@ -125,7 +125,7 @@ fn prefix_and_suffix<'tcx>(
let asm_binary_format = &tcx.sess.target.binary_format;
let is_arm = tcx.sess.target.arch == "arm";
let is_arm = tcx.sess.target.arch == Arch::Arm;
let is_thumb = tcx.sess.unstable_target_features.contains(&sym::thumb_mode);
let attrs = tcx.codegen_instance_attrs(instance.def);

3
compiler/rustc_codegen_ssa/src/target_features.rs
View file

@ -10,6 +10,7 @@ use rustc_session::Session;
use rustc_session::lint::builtin::AARCH64_SOFTFLOAT_NEON;
use rustc_session::parse::feature_err;
use rustc_span::{Span, Symbol, sym};
use rustc_target::spec::Arch;
use rustc_target::target_features::{RUSTC_SPECIFIC_FEATURES, Stability};
use smallvec::SmallVec;
@ -73,7 +74,7 @@ pub(crate) fn from_target_feature_attr(
if abi_feature_constraints.incompatible.contains(&name.as_str()) {
// For "neon" specifically, we emit an FCW instead of a hard error.
// See <https://github.com/rust-lang/rust/issues/134375>.
if tcx.sess.target.arch == "aarch64" && name.as_str() == "neon" {
if tcx.sess.target.arch == Arch::AArch64 && name.as_str() == "neon" {
tcx.emit_node_span_lint(
AARCH64_SOFTFLOAT_NEON,
tcx.local_def_id_to_hir_id(did),

4
compiler/rustc_metadata/src/native_libs.rs
View file

@ -15,7 +15,7 @@ use rustc_session::cstore::{DllCallingConvention, DllImport, ForeignModule, Nati
use rustc_session::search_paths::PathKind;
use rustc_span::Symbol;
use rustc_span::def_id::{DefId, LOCAL_CRATE};
use rustc_target::spec::{BinaryFormat, LinkSelfContainedComponents};
use rustc_target::spec::{Arch, BinaryFormat, LinkSelfContainedComponents};
use crate::errors;
@ -393,7 +393,7 @@ impl<'tcx> Collector<'tcx> {
// This logic is similar to `AbiMap::canonize_abi` (in rustc_target/src/spec/abi_map.rs) but
// we need more detail than those adjustments, and we can't support all ABIs that are
// generally supported.
let calling_convention = if self.tcx.sess.target.arch == "x86" {
let calling_convention = if self.tcx.sess.target.arch == Arch::X86 {
match abi {
ExternAbi::C { .. } | ExternAbi::Cdecl { .. } => DllCallingConvention::C,
ExternAbi::Stdcall { .. } => {

2
compiler/rustc_middle/src/ty/context.rs
View file

@ -2388,7 +2388,7 @@ impl<'tcx> TyCtxt<'tcx> {
/// Determines whether identifiers in the assembly have strict naming rules.
/// Currently, only NVPTX* targets need it.
pub fn has_strict_asm_symbol_naming(self) -> bool {
self.sess.target.arch.contains("nvptx")
self.sess.target.llvm_target.starts_with("nvptx")
}
/// Returns `&'static core::panic::Location<'static>`.

4
compiler/rustc_session/src/config/cfg.rs
View file

@ -240,7 +240,7 @@ pub(crate) fn default_configuration(sess: &Session) -> Cfg {
}
ins_str!(sym::target_abi, &sess.target.abi);
ins_str!(sym::target_arch, &sess.target.arch);
ins_str!(sym::target_arch, sess.target.arch.desc());
ins_str!(sym::target_endian, sess.target.endian.as_str());
ins_str!(sym::target_env, &sess.target.env);
@ -448,7 +448,7 @@ impl CheckCfg {
for target in Target::builtins().chain(iter::once(current_target.clone())) {
values_target_abi.insert(Symbol::intern(&target.options.abi));
values_target_arch.insert(Symbol::intern(&target.arch));
values_target_arch.insert(Symbol::intern(target.arch.desc()));
values_target_endian.insert(Symbol::intern(target.options.endian.as_str()));
values_target_env.insert(Symbol::intern(&target.options.env));
values_target_family.extend(

18
compiler/rustc_session/src/session.rs
View file

@ -32,7 +32,7 @@ use rustc_span::source_map::{FilePathMapping, SourceMap};
use rustc_span::{FileNameDisplayPreference, RealFileName, Span, Symbol};
use rustc_target::asm::InlineAsmArch;
use rustc_target::spec::{
CodeModel, DebuginfoKind, PanicStrategy, RelocModel, RelroLevel, SanitizerSet,
Arch, CodeModel, DebuginfoKind, PanicStrategy, RelocModel, RelroLevel, SanitizerSet,
SmallDataThresholdSupport, SplitDebuginfo, StackProtector, SymbolVisibility, Target,
TargetTuple, TlsModel, apple,
};
@ -1112,7 +1112,7 @@ pub fn build_session(
_ => CtfeBacktrace::Disabled,
});
let asm_arch = if target.allow_asm { InlineAsmArch::from_str(&target.arch).ok() } else { None };
let asm_arch = if target.allow_asm { InlineAsmArch::from_arch(target.arch) } else { None };
let target_filesearch =
filesearch::FileSearch::new(&sopts.search_paths, &target_tlib_path, &target);
let host_filesearch = filesearch::FileSearch::new(&sopts.search_paths, &host_tlib_path, &host);
@ -1202,7 +1202,7 @@ fn validate_commandline_args_with_session_available(sess: &Session) {
let mut unsupported_sanitizers = sess.opts.unstable_opts.sanitizer - supported_sanitizers;
// Niche: if `fixed-x18`, or effectively switching on `reserved-x18` flag, is enabled
// we should allow Shadow Call Stack sanitizer.
if sess.opts.unstable_opts.fixed_x18 && sess.target.arch == "aarch64" {
if sess.opts.unstable_opts.fixed_x18 && sess.target.arch == Arch::AArch64 {
unsupported_sanitizers -= SanitizerSet::SHADOWCALLSTACK;
}
match unsupported_sanitizers.into_iter().count() {
@ -1313,7 +1313,7 @@ fn validate_commandline_args_with_session_available(sess: &Session) {
}
}
if sess.opts.unstable_opts.branch_protection.is_some() && sess.target.arch != "aarch64" {
if sess.opts.unstable_opts.branch_protection.is_some() && sess.target.arch != Arch::AArch64 {
sess.dcx().emit_err(errors::BranchProtectionRequiresAArch64);
}
@ -1357,13 +1357,13 @@ fn validate_commandline_args_with_session_available(sess: &Session) {
}
if sess.opts.unstable_opts.function_return != FunctionReturn::default() {
if sess.target.arch != "x86" && sess.target.arch != "x86_64" {
if !matches!(sess.target.arch, Arch::X86 | Arch::X86_64) {
sess.dcx().emit_err(errors::FunctionReturnRequiresX86OrX8664);
}
}
if sess.opts.unstable_opts.indirect_branch_cs_prefix {
if sess.target.arch != "x86" && sess.target.arch != "x86_64" {
if !matches!(sess.target.arch, Arch::X86 | Arch::X86_64) {
sess.dcx().emit_err(errors::IndirectBranchCsPrefixRequiresX86OrX8664);
}
}
@ -1372,12 +1372,12 @@ fn validate_commandline_args_with_session_available(sess: &Session) {
if regparm > 3 {
sess.dcx().emit_err(errors::UnsupportedRegparm { regparm });
}
if sess.target.arch != "x86" {
if sess.target.arch != Arch::X86 {
sess.dcx().emit_err(errors::UnsupportedRegparmArch);
}
}
if sess.opts.unstable_opts.reg_struct_return {
if sess.target.arch != "x86" {
if sess.target.arch != Arch::X86 {
sess.dcx().emit_err(errors::UnsupportedRegStructReturnArch);
}
}
@ -1399,7 +1399,7 @@ fn validate_commandline_args_with_session_available(sess: &Session) {
}
if sess.opts.cg.soft_float {
if sess.target.arch == "arm" {
if sess.target.arch == Arch::Arm {
sess.dcx().emit_warn(errors::SoftFloatDeprecated);
} else {
// All `use_softfp` does is the equivalent of `-mfloat-abi` in GCC/clang, which only exists on ARM targets.

65
compiler/rustc_target/src/asm/mod.rs
View file

@ -1,12 +1,11 @@
use std::fmt;
use std::str::FromStr;
use rustc_abi::Size;
use rustc_data_structures::fx::{FxHashMap, FxIndexSet};
use rustc_macros::{Decodable, Encodable, HashStable_Generic};
use rustc_span::Symbol;
use crate::spec::{RelocModel, Target};
use crate::spec::{Arch, RelocModel, Target};
pub struct ModifierInfo {
pub modifier: char,
@ -245,38 +244,36 @@ pub enum InlineAsmArch {
CSKY,
}
impl FromStr for InlineAsmArch {
type Err = ();
fn from_str(s: &str) -> Result<InlineAsmArch, ()> {
match s {
"x86" => Ok(Self::X86),
"x86_64" => Ok(Self::X86_64),
"arm" => Ok(Self::Arm),
"aarch64" => Ok(Self::AArch64),
"arm64ec" => Ok(Self::Arm64EC),
"riscv32" => Ok(Self::RiscV32),
"riscv64" => Ok(Self::RiscV64),
"nvptx64" => Ok(Self::Nvptx64),
"powerpc" => Ok(Self::PowerPC),
"powerpc64" => Ok(Self::PowerPC64),
"hexagon" => Ok(Self::Hexagon),
"loongarch32" => Ok(Self::LoongArch32),
"loongarch64" => Ok(Self::LoongArch64),
"mips" | "mips32r6" => Ok(Self::Mips),
"mips64" | "mips64r6" => Ok(Self::Mips64),
"s390x" => Ok(Self::S390x),
"sparc" => Ok(Self::Sparc),
"sparc64" => Ok(Self::Sparc64),
"spirv" => Ok(Self::SpirV),
"wasm32" => Ok(Self::Wasm32),
"wasm64" => Ok(Self::Wasm64),
"bpf" => Ok(Self::Bpf),
"avr" => Ok(Self::Avr),
"msp430" => Ok(Self::Msp430),
"m68k" => Ok(Self::M68k),
"csky" => Ok(Self::CSKY),
_ => Err(()),
impl InlineAsmArch {
pub fn from_arch(arch: Arch) -> Option<Self> {
match arch {
Arch::X86 => Some(Self::X86),
Arch::X86_64 => Some(Self::X86_64),
Arch::Arm => Some(Self::Arm),
Arch::Arm64EC => Some(Self::Arm64EC),
Arch::AArch64 => Some(Self::AArch64),
Arch::RiscV32 => Some(Self::RiscV32),
Arch::RiscV64 => Some(Self::RiscV64),
Arch::Nvptx64 => Some(Self::Nvptx64),
Arch::Hexagon => Some(Self::Hexagon),
Arch::LoongArch32 => Some(Self::LoongArch32),
Arch::LoongArch64 => Some(Self::LoongArch64),
Arch::Mips | Arch::Mips32r6 => Some(Self::Mips),
Arch::Mips64 | Arch::Mips64r6 => Some(Self::Mips64),
Arch::PowerPC => Some(Self::PowerPC),
Arch::PowerPC64 | Arch::PowerPC64LE => Some(Self::PowerPC64),
Arch::S390x => Some(Self::S390x),
Arch::Sparc => Some(Self::Sparc),
Arch::Sparc64 => Some(Self::Sparc64),
Arch::SpirV => Some(Self::SpirV),
Arch::Wasm32 => Some(Self::Wasm32),
Arch::Wasm64 => Some(Self::Wasm64),
Arch::Bpf => Some(Self::Bpf),
Arch::Avr => Some(Self::Avr),
Arch::Msp430 => Some(Self::Msp430),
Arch::M68k => Some(Self::M68k),
Arch::CSky => Some(Self::CSKY),
Arch::AmdGpu | Arch::Xtensa => None,
}
}
}

66
compiler/rustc_target/src/callconv/mod.rs
View file

@ -7,7 +7,7 @@ use rustc_abi::{
use rustc_macros::HashStable_Generic;
pub use crate::spec::AbiMap;
use crate::spec::{HasTargetSpec, HasX86AbiOpt};
use crate::spec::{Arch, HasTargetSpec, HasX86AbiOpt};
mod aarch64;
mod amdgpu;
@ -633,8 +633,8 @@ impl<'a, Ty> FnAbi<'a, Ty> {
}
let spec = cx.target_spec();
match &spec.arch[..] {
"x86" => {
match spec.arch {
Arch::X86 => {
let (flavor, regparm) = match abi {
ExternAbi::Fastcall { .. } | ExternAbi::Vectorcall { .. } => {
(x86::Flavor::FastcallOrVectorcall, None)
@ -652,7 +652,7 @@ impl<'a, Ty> FnAbi<'a, Ty> {
x86::compute_abi_info(cx, self, opts);
}
}
"x86_64" => match abi {
Arch::X86_64 => match abi {
ExternAbi::SysV64 { .. } => x86_64::compute_abi_info(cx, self),
ExternAbi::Win64 { .. } | ExternAbi::Vectorcall { .. } => {
x86_win64::compute_abi_info(cx, self)
@ -665,7 +665,7 @@ impl<'a, Ty> FnAbi<'a, Ty> {
}
}
},
"aarch64" | "arm64ec" => {
Arch::AArch64 | Arch::Arm64EC => {
let kind = if cx.target_spec().is_like_darwin {
aarch64::AbiKind::DarwinPCS
} else if cx.target_spec().is_like_windows {
@ -675,33 +675,35 @@ impl<'a, Ty> FnAbi<'a, Ty> {
};
aarch64::compute_abi_info(cx, self, kind)
}
"amdgpu" => amdgpu::compute_abi_info(cx, self),
"arm" => arm::compute_abi_info(cx, self),
"avr" => avr::compute_abi_info(cx, self),
"loongarch32" | "loongarch64" => loongarch::compute_abi_info(cx, self),
"m68k" => m68k::compute_abi_info(cx, self),
"csky" => csky::compute_abi_info(cx, self),
"mips" | "mips32r6" => mips::compute_abi_info(cx, self),
"mips64" | "mips64r6" => mips64::compute_abi_info(cx, self),
"powerpc" => powerpc::compute_abi_info(cx, self),
"powerpc64" => powerpc64::compute_abi_info(cx, self),
"s390x" => s390x::compute_abi_info(cx, self),
"msp430" => msp430::compute_abi_info(cx, self),
"sparc" => sparc::compute_abi_info(cx, self),
"sparc64" => sparc64::compute_abi_info(cx, self),
"nvptx64" => {
Arch::AmdGpu => amdgpu::compute_abi_info(cx, self),
Arch::Arm => arm::compute_abi_info(cx, self),
Arch::Avr => avr::compute_abi_info(cx, self),
Arch::LoongArch32 | Arch::LoongArch64 => loongarch::compute_abi_info(cx, self),
Arch::M68k => m68k::compute_abi_info(cx, self),
Arch::CSky => csky::compute_abi_info(cx, self),
Arch::Mips | Arch::Mips32r6 => mips::compute_abi_info(cx, self),
Arch::Mips64 | Arch::Mips64r6 => mips64::compute_abi_info(cx, self),
Arch::PowerPC => powerpc::compute_abi_info(cx, self),
Arch::PowerPC64 => powerpc64::compute_abi_info(cx, self),
Arch::S390x => s390x::compute_abi_info(cx, self),
Arch::Msp430 => msp430::compute_abi_info(cx, self),
Arch::Sparc => sparc::compute_abi_info(cx, self),
Arch::Sparc64 => sparc64::compute_abi_info(cx, self),
Arch::Nvptx64 => {
if abi == ExternAbi::PtxKernel || abi == ExternAbi::GpuKernel {
nvptx64::compute_ptx_kernel_abi_info(cx, self)
} else {
nvptx64::compute_abi_info(cx, self)
}
}
"hexagon" => hexagon::compute_abi_info(cx, self),
"xtensa" => xtensa::compute_abi_info(cx, self),
"riscv32" | "riscv64" => riscv::compute_abi_info(cx, self),
"wasm32" | "wasm64" => wasm::compute_abi_info(cx, self),
"bpf" => bpf::compute_abi_info(cx, self),
arch => panic!("no lowering implemented for {arch}"),
Arch::Hexagon => hexagon::compute_abi_info(cx, self),
Arch::Xtensa => xtensa::compute_abi_info(cx, self),
Arch::RiscV32 | Arch::RiscV64 => riscv::compute_abi_info(cx, self),
Arch::Wasm32 | Arch::Wasm64 => wasm::compute_abi_info(cx, self),
Arch::Bpf => bpf::compute_abi_info(cx, self),
arch @ (Arch::PowerPC64LE | Arch::SpirV) => {
panic!("no lowering implemented for {arch}")
}
}
}
@ -711,12 +713,12 @@ impl<'a, Ty> FnAbi<'a, Ty> {
C: HasDataLayout + HasTargetSpec,
{
let spec = cx.target_spec();
match &*spec.arch {
"x86" => x86::compute_rust_abi_info(cx, self),
"riscv32" | "riscv64" => riscv::compute_rust_abi_info(cx, self),
"loongarch32" | "loongarch64" => loongarch::compute_rust_abi_info(cx, self),
"aarch64" => aarch64::compute_rust_abi_info(cx, self),
"bpf" => bpf::compute_rust_abi_info(self),
match spec.arch {
Arch::X86 => x86::compute_rust_abi_info(cx, self),
Arch::RiscV32 | Arch::RiscV64 => riscv::compute_rust_abi_info(cx, self),
Arch::LoongArch32 | Arch::LoongArch64 => loongarch::compute_rust_abi_info(cx, self),
Arch::AArch64 => aarch64::compute_rust_abi_info(cx, self),
Arch::Bpf => bpf::compute_rust_abi_info(self),
_ => {}
};

27
compiler/rustc_target/src/spec/abi_map.rs
View file

@ -1,6 +1,6 @@
use rustc_abi::{ArmCall, CanonAbi, ExternAbi, InterruptKind, X86Call};
use crate::spec::Target;
use crate::spec::{Arch, Target};
/// Mapping for ExternAbi to CanonAbi according to a Target
///
@ -47,17 +47,20 @@ impl AbiMap {
/// create an AbiMap according to arbitrary fields on the [Target]
pub fn from_target(target: &Target) -> Self {
// the purpose of this little exercise is to force listing what affects these mappings
let arch = match &*target.arch {
"aarch64" => ArchKind::Aarch64,
"amdgpu" => ArchKind::Amdgpu,
"arm" if target.llvm_target.starts_with("thumbv8m") => ArchKind::Arm(ArmVer::ThumbV8M),
"arm" => ArchKind::Arm(ArmVer::Other),
"avr" => ArchKind::Avr,
"msp430" => ArchKind::Msp430,
"nvptx64" => ArchKind::Nvptx,
"riscv32" | "riscv64" => ArchKind::Riscv,
"x86" => ArchKind::X86,
"x86_64" => ArchKind::X86_64,
let arch = match target.arch {
Arch::AArch64 => ArchKind::Aarch64,
Arch::AmdGpu => ArchKind::Amdgpu,
Arch::Arm => ArchKind::Arm(if target.llvm_target.starts_with("thumbv8m") {
ArmVer::ThumbV8M
} else {
ArmVer::Other
}),
Arch::Avr => ArchKind::Avr,
Arch::Msp430 => ArchKind::Msp430,
Arch::Nvptx64 => ArchKind::Nvptx,
Arch::RiscV32 | Arch::RiscV64 => ArchKind::Riscv,
Arch::X86 => ArchKind::X86,
Arch::X86_64 => ArchKind::X86_64,
_ => ArchKind::Other,
};

34
compiler/rustc_target/src/spec/base/apple/mod.rs
View file

@ -40,13 +40,13 @@ impl Arch {
}
}
pub(crate) fn target_arch(self) -> Cow<'static, str> {
Cow::Borrowed(match self {
Self::Armv7k | Self::Armv7s => "arm",
Self::Arm64 | Self::Arm64e | Self::Arm64_32 => "aarch64",
Self::I386 | Self::I686 => "x86",
Self::X86_64 | Self::X86_64h => "x86_64",
})
pub(crate) fn target_arch(self) -> crate::spec::Arch {
match self {
Self::Armv7k | Self::Armv7s => crate::spec::Arch::Arm,
Self::Arm64 | Self::Arm64e | Self::Arm64_32 => crate::spec::Arch::AArch64,
Self::I386 | Self::I686 => crate::spec::Arch::X86,
Self::X86_64 | Self::X86_64h => crate::spec::Arch::X86_64,
}
}
fn target_cpu(self, env: TargetEnv) -> &'static str {
@ -109,7 +109,7 @@ pub(crate) fn base(
os: &'static str,
arch: Arch,
env: TargetEnv,
) -> (TargetOptions, StaticCow<str>, StaticCow<str>) {
) -> (TargetOptions, StaticCow<str>, crate::spec::Arch) {
let mut opts = TargetOptions {
llvm_floatabi: Some(FloatAbi::Hard),
os: os.into(),
@ -311,18 +311,22 @@ impl OSVersion {
/// This matches what LLVM does, see in part:
/// <https://github.com/llvm/llvm-project/blob/llvmorg-21.1.3/llvm/lib/TargetParser/Triple.cpp#L2140-L2175>
pub fn minimum_deployment_target(target: &Target) -> Self {
let (major, minor, patch) = match (&*target.os, &*target.arch, &*target.env) {
("macos", "aarch64", _) => (11, 0, 0),
("ios", "aarch64", "macabi") => (14, 0, 0),
("ios", "aarch64", "sim") => (14, 0, 0),
let (major, minor, patch) = match (&*target.os, target.arch, &*target.env) {
("macos", crate::spec::Arch::AArch64, _) => (11, 0, 0),
("ios", crate::spec::Arch::AArch64, "macabi") => (14, 0, 0),
("ios", crate::spec::Arch::AArch64, "sim") => (14, 0, 0),
("ios", _, _) if target.llvm_target.starts_with("arm64e") => (14, 0, 0),
// Mac Catalyst defaults to 13.1 in Clang.
("ios", _, "macabi") => (13, 1, 0),
("tvos", "aarch64", "sim") => (14, 0, 0),
("watchos", "aarch64", "sim") => (7, 0, 0),
("tvos", crate::spec::Arch::AArch64, "sim") => (14, 0, 0),
("watchos", crate::spec::Arch::AArch64, "sim") => (7, 0, 0),
// True Aarch64 on watchOS (instead of their Aarch64 Ilp32 called `arm64_32`) has been
// available since Xcode 14, but it's only actually used more recently in watchOS 26.
("watchos", "aarch64", "") if !target.llvm_target.starts_with("arm64_32") => (26, 0, 0),
("watchos", crate::spec::Arch::AArch64, "")
if !target.llvm_target.starts_with("arm64_32") =>
{
(26, 0, 0)
}
(os, _, _) => return Self::os_minimum_deployment_target(os),
};
Self { major, minor, patch }

4
compiler/rustc_target/src/spec/base/nto_qnx.rs
View file

@ -41,7 +41,7 @@ pub(crate) fn aarch64() -> Target {
// n32:64 = 32 and 64 are native integer widths; Elements of this set are considered to support most general arithmetic operations efficiently.
// S128 = 128 bits are the natural alignment of the stack in bits.
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: crate::spec::Arch::AArch64,
options: TargetOptions {
features: "+v8a".into(),
max_atomic_width: Some(128),
@ -57,7 +57,7 @@ pub(crate) fn x86_64() -> Target {
pointer_width: 64,
data_layout:
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128".into(),
arch: "x86_64".into(),
arch: crate::spec::Arch::X86_64,
options: TargetOptions {
cpu: "x86-64".into(),
plt_by_default: false,

4
compiler/rustc_target/src/spec/json.rs
View file

@ -5,7 +5,7 @@ use rustc_abi::{Align, AlignFromBytesError};
use super::crt_objects::CrtObjects;
use super::{
BinaryFormat, CodeModel, DebuginfoKind, FloatAbi, FramePointer, LinkArgsCli,
Arch, BinaryFormat, CodeModel, DebuginfoKind, FloatAbi, FramePointer, LinkArgsCli,
LinkSelfContainedComponents, LinkSelfContainedDefault, LinkerFlavorCli, LldFlavor,
MergeFunctions, PanicStrategy, RelocModel, RelroLevel, RustcAbi, SanitizerSet,
SmallDataThresholdSupport, SplitDebuginfo, StackProbeType, StaticCow, SymbolVisibility, Target,
@ -486,7 +486,7 @@ struct TargetSpecJson {
llvm_target: StaticCow<str>,
target_pointer_width: u16,
data_layout: StaticCow<str>,
arch: StaticCow<str>,
arch: Arch,
metadata: Option<TargetSpecJsonMetadata>,

137
compiler/rustc_target/src/spec/mod.rs
View file

@ -1847,6 +1847,44 @@ enum TargetKind {
Builtin,
}
crate::target_spec_enum! {
pub enum Arch {
AArch64 = "aarch64",
AmdGpu = "amdgpu",
Arm = "arm",
Arm64EC = "arm64ec",
Avr = "avr",
Bpf = "bpf",
CSky = "csky",
Hexagon = "hexagon",
LoongArch32 = "loongarch32",
LoongArch64 = "loongarch64",
M68k = "m68k",
Mips = "mips",
Mips32r6 = "mips32r6",
Mips64 = "mips64",
Mips64r6 = "mips64r6",
Msp430 = "msp430",
Nvptx64 = "nvptx64",
PowerPC = "powerpc",
PowerPC64 = "powerpc64",
PowerPC64LE = "powerpc64le",
RiscV32 = "riscv32",
RiscV64 = "riscv64",
S390x = "s390x",
Sparc = "sparc",
Sparc64 = "sparc64",
SpirV = "spirv",
Wasm32 = "wasm32",
Wasm64 = "wasm64",
X86 = "x86",
X86_64 = "x86_64",
Xtensa = "xtensa",
}
parse_error_type = "architecture";
}
/// Everything `rustc` knows about how to compile for a specific target.
///
/// Every field here must be specified, and has no default value.
@ -1866,7 +1904,7 @@ pub struct Target {
pub pointer_width: u16,
/// Architecture to use for ABI considerations. Valid options include: "x86",
/// "x86_64", "arm", "aarch64", "mips", "powerpc", "powerpc64", and others.
pub arch: StaticCow<str>,
pub arch: Arch,
/// [Data layout](https://llvm.org/docs/LangRef.html#data-layout) to pass to LLVM.
pub data_layout: StaticCow<str>,
/// Optional settings with defaults.
@ -2672,7 +2710,7 @@ impl Target {
);
check_eq!(
self.is_like_wasm,
self.arch == "wasm32" || self.arch == "wasm64",
matches!(self.arch, Arch::Wasm32 | Arch::Wasm64),
"`is_like_wasm` must be set if and only if `arch` is `wasm32` or `wasm64`"
);
if self.is_like_msvc {
@ -2704,12 +2742,12 @@ impl Target {
"`linker_flavor` must be `em-cc` if and only if `os` is `emscripten`"
);
check_eq!(
self.arch == "bpf",
self.arch == Arch::Bpf,
matches!(self.linker_flavor, LinkerFlavor::Bpf),
"`linker_flavor` must be `bpf` if and only if `arch` is `bpf`"
);
check_eq!(
self.arch == "nvptx64",
self.arch == Arch::Nvptx64,
matches!(self.linker_flavor, LinkerFlavor::Ptx),
"`linker_flavor` must be `ptc` if and only if `arch` is `nvptx64`"
);
@ -2723,7 +2761,7 @@ impl Target {
] {
for (&flavor, flavor_args) in args {
check!(
!flavor_args.is_empty() || self.arch == "avr",
!flavor_args.is_empty() || self.arch == Arch::Avr,
"linker flavor args must not be empty"
);
// Check that flavors mentioned in link args are compatible with the default flavor.
@ -2846,10 +2884,7 @@ impl Target {
// hexagon: when targeting QuRT, that OS can load dynamic libraries.
// wasm{32,64}: dynamic linking is inherent in the definition of the VM.
if self.os == "none"
&& (self.arch != "bpf"
&& self.arch != "hexagon"
&& self.arch != "wasm32"
&& self.arch != "wasm64")
&& !matches!(self.arch, Arch::Bpf | Arch::Hexagon | Arch::Wasm32 | Arch::Wasm64)
{
check!(
!self.dynamic_linking,
@ -2912,8 +2947,8 @@ impl Target {
// Check that RISC-V targets always specify which ABI they use,
// and that ARM targets specify their float ABI.
match &*self.arch {
"riscv32" => {
match self.arch {
Arch::RiscV32 => {
check_matches!(
&*self.llvm_abiname,
"ilp32" | "ilp32f" | "ilp32d" | "ilp32e",
@ -2921,7 +2956,7 @@ impl Target {
self.llvm_abiname,
);
}
"riscv64" => {
Arch::RiscV64 => {
// Note that the `lp64e` is still unstable as it's not (yet) part of the ELF psABI.
check_matches!(
&*self.llvm_abiname,
@ -2930,7 +2965,7 @@ impl Target {
self.llvm_abiname,
);
}
"arm" => {
Arch::Arm => {
check!(
self.llvm_floatabi.is_some(),
"ARM targets must set `llvm-floatabi` to `hard` or `soft`",
@ -2943,13 +2978,13 @@ impl Target {
if let Some(rust_abi) = self.rustc_abi {
match rust_abi {
RustcAbi::X86Sse2 => check_matches!(
&*self.arch,
"x86",
self.arch,
Arch::X86,
"`x86-sse2` ABI is only valid for x86-32 targets"
),
RustcAbi::X86Softfloat => check_matches!(
&*self.arch,
"x86" | "x86_64",
self.arch,
Arch::X86 | Arch::X86_64,
"`x86-softfloat` ABI is only valid for x86 targets"
),
}
@ -3116,15 +3151,15 @@ impl Target {
// Avoid having to duplicate the small data support in every
// target file by supporting a default value for each
// architecture.
SmallDataThresholdSupport::DefaultForArch => match self.arch.as_ref() {
"mips" | "mips64" | "mips32r6" => {
SmallDataThresholdSupport::DefaultForArch => match self.arch {
Arch::Mips | Arch::Mips64 | Arch::Mips32r6 => {
SmallDataThresholdSupport::LlvmArg("mips-ssection-threshold".into())
}
"hexagon" => {
Arch::Hexagon => {
SmallDataThresholdSupport::LlvmArg("hexagon-small-data-threshold".into())
}
"m68k" => SmallDataThresholdSupport::LlvmArg("m68k-ssection-threshold".into()),
"riscv32" | "riscv64" => {
Arch::M68k => SmallDataThresholdSupport::LlvmArg("m68k-ssection-threshold".into()),
Arch::RiscV32 | Arch::RiscV64 => {
SmallDataThresholdSupport::LlvmModuleFlag("SmallDataLimit".into())
}
_ => SmallDataThresholdSupport::None,
@ -3138,9 +3173,9 @@ impl Target {
unstable_target_features: &FxIndexSet<Symbol>,
) -> Option<(object::Architecture, Option<object::SubArchitecture>)> {
use object::Architecture;
Some(match self.arch.as_ref() {
"arm" => (Architecture::Arm, None),
"aarch64" => (
Some(match self.arch {
Arch::Arm => (Architecture::Arm, None),
Arch::AArch64 => (
if self.pointer_width == 32 {
Architecture::Aarch64_Ilp32
} else {
@ -3148,11 +3183,11 @@ impl Target {
},
None,
),
"x86" => (Architecture::I386, None),
"s390x" => (Architecture::S390x, None),
"m68k" => (Architecture::M68k, None),
"mips" | "mips32r6" => (Architecture::Mips, None),
"mips64" | "mips64r6" => (
Arch::X86 => (Architecture::I386, None),
Arch::S390x => (Architecture::S390x, None),
Arch::M68k => (Architecture::M68k, None),
Arch::Mips | Arch::Mips32r6 => (Architecture::Mips, None),
Arch::Mips64 | Arch::Mips64r6 => (
// While there are currently no builtin targets
// using the N32 ABI, it is possible to specify
// it using a custom target specification. N32
@ -3165,7 +3200,7 @@ impl Target {
},
None,
),
"x86_64" => (
Arch::X86_64 => (
if self.pointer_width == 32 {
Architecture::X86_64_X32
} else {
@ -3173,11 +3208,11 @@ impl Target {
},
None,
),
"powerpc" => (Architecture::PowerPc, None),
"powerpc64" => (Architecture::PowerPc64, None),
"riscv32" => (Architecture::Riscv32, None),
"riscv64" => (Architecture::Riscv64, None),
"sparc" => {
Arch::PowerPC => (Architecture::PowerPc, None),
Arch::PowerPC64 => (Architecture::PowerPc64, None),
Arch::RiscV32 => (Architecture::Riscv32, None),
Arch::RiscV64 => (Architecture::Riscv64, None),
Arch::Sparc => {
if unstable_target_features.contains(&sym::v8plus) {
// Target uses V8+, aka EM_SPARC32PLUS, aka 64-bit V9 but in 32-bit mode
(Architecture::Sparc32Plus, None)
@ -3186,18 +3221,22 @@ impl Target {
(Architecture::Sparc, None)
}
}
"sparc64" => (Architecture::Sparc64, None),
"avr" => (Architecture::Avr, None),
"msp430" => (Architecture::Msp430, None),
"hexagon" => (Architecture::Hexagon, None),
"xtensa" => (Architecture::Xtensa, None),
"bpf" => (Architecture::Bpf, None),
"loongarch32" => (Architecture::LoongArch32, None),
"loongarch64" => (Architecture::LoongArch64, None),
"csky" => (Architecture::Csky, None),
"arm64ec" => (Architecture::Aarch64, Some(object::SubArchitecture::Arm64EC)),
// Unsupported architecture.
_ => return None,
Arch::Sparc64 => (Architecture::Sparc64, None),
Arch::Avr => (Architecture::Avr, None),
Arch::Msp430 => (Architecture::Msp430, None),
Arch::Hexagon => (Architecture::Hexagon, None),
Arch::Xtensa => (Architecture::Xtensa, None),
Arch::Bpf => (Architecture::Bpf, None),
Arch::LoongArch32 => (Architecture::LoongArch32, None),
Arch::LoongArch64 => (Architecture::LoongArch64, None),
Arch::CSky => (Architecture::Csky, None),
Arch::Arm64EC => (Architecture::Aarch64, Some(object::SubArchitecture::Arm64EC)),
Arch::AmdGpu
| Arch::Nvptx64
| Arch::PowerPC64LE
| Arch::SpirV
| Arch::Wasm32
| Arch::Wasm64 => return None,
})
}
@ -3213,7 +3252,7 @@ impl Target {
// FIXME(#112480) MSVC on x86-32 is unsound and fails to properly align many types with
// more-than-4-byte-alignment on the stack. This makes alignments larger than 4 generally
// unreliable on 32bit Windows.
if self.is_like_windows && self.arch == "x86" {
if self.is_like_windows && self.arch == Arch::X86 {
Align::from_bytes(4).unwrap()
} else {
Align::MAX

4
compiler/rustc_target/src/spec/targets/aarch64_be_unknown_hermit.rs
View file

@ -1,6 +1,6 @@
use rustc_abi::Endian;
use crate::spec::{StackProbeType, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, StackProbeType, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -12,7 +12,7 @@ pub(crate) fn target() -> Target {
std: Some(true),
},
pointer_width: 64,
arch: "aarch64".into(),
arch: Arch::AArch64,
data_layout: "E-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
options: TargetOptions {
features: "+v8a,+strict-align,+neon,+fp-armv8".into(),

6
compiler/rustc_target/src/spec/targets/aarch64_be_unknown_linux_gnu.rs
View file

@ -1,6 +1,8 @@
use rustc_abi::Endian;
use crate::spec::{FramePointer, StackProbeType, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{
Arch, FramePointer, StackProbeType, Target, TargetMetadata, TargetOptions, base,
};
pub(crate) fn target() -> Target {
Target {
@ -13,7 +15,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "E-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
features: "+v8a,+outline-atomics".into(),
// the AAPCS64 expects use of non-leaf frame pointers per

6
compiler/rustc_target/src/spec/targets/aarch64_be_unknown_linux_gnu_ilp32.rs
View file

@ -1,6 +1,8 @@
use rustc_abi::Endian;
use crate::spec::{FramePointer, StackProbeType, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{
Arch, FramePointer, StackProbeType, Target, TargetMetadata, TargetOptions, base,
};
pub(crate) fn target() -> Target {
let mut base = base::linux_gnu::opts();
@ -16,7 +18,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "E-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
abi: "ilp32".into(),
features: "+v8a,+outline-atomics".into(),

4
compiler/rustc_target/src/spec/targets/aarch64_be_unknown_linux_musl.rs
View file

@ -1,7 +1,7 @@
use rustc_abi::Endian;
use crate::spec::{
FramePointer, SanitizerSet, StackProbeType, Target, TargetMetadata, TargetOptions, base,
Arch, FramePointer, SanitizerSet, StackProbeType, Target, TargetMetadata, TargetOptions, base,
};
pub(crate) fn target() -> Target {
@ -26,7 +26,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "E-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
// the AAPCS64 expects use of non-leaf frame pointers per
// https://github.com/ARM-software/abi-aa/blob/4492d1570eb70c8fd146623e0db65b2d241f12e7/aapcs64/aapcs64.rst#the-frame-pointer

4
compiler/rustc_target/src/spec/targets/aarch64_be_unknown_netbsd.rs
View file

@ -1,6 +1,6 @@
use rustc_abi::Endian;
use crate::spec::{StackProbeType, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, StackProbeType, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -13,7 +13,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "E-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
mcount: "__mcount".into(),
max_atomic_width: Some(128),

4
compiler/rustc_target/src/spec/targets/aarch64_be_unknown_none_softfloat.rs
View file

@ -8,7 +8,7 @@
use rustc_abi::Endian;
use crate::spec::{
Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, StackProbeType, Target,
Arch, Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, StackProbeType, Target,
TargetMetadata, TargetOptions,
};
@ -37,7 +37,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "E-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: opts,
}
}

4
compiler/rustc_target/src/spec/targets/aarch64_kmc_solid_asp3.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{RelocModel, StackProbeType, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, RelocModel, StackProbeType, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
let base = base::solid::opts("asp3");
@ -12,7 +12,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
linker: Some("aarch64-kmc-elf-gcc".into()),
features: "+v8a,+neon,+fp-armv8".into(),

4
compiler/rustc_target/src/spec/targets/aarch64_linux_android.rs
View file

@ -1,5 +1,5 @@
use crate::spec::{
FramePointer, SanitizerSet, StackProbeType, Target, TargetMetadata, TargetOptions, base,
Arch, FramePointer, SanitizerSet, StackProbeType, Target, TargetMetadata, TargetOptions, base,
};
// See https://developer.android.com/ndk/guides/abis.html#arm64-v8a
@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
max_atomic_width: Some(128),
// As documented in https://developer.android.com/ndk/guides/cpu-features.html

4
compiler/rustc_target/src/spec/targets/aarch64_nintendo_switch_freestanding.rs
View file

@ -1,5 +1,5 @@
use crate::spec::{
Cc, LinkerFlavor, Lld, PanicStrategy, RelroLevel, StackProbeType, Target, TargetMetadata,
Arch, Cc, LinkerFlavor, Lld, PanicStrategy, RelroLevel, StackProbeType, Target, TargetMetadata,
TargetOptions,
};
@ -17,7 +17,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
features: "+v8a,+neon,+crypto,+crc".into(),
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),

4
compiler/rustc_target/src/spec/targets/aarch64_pc_windows_gnullvm.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FramePointer, Target, TargetMetadata, base};
use crate::spec::{Arch, FramePointer, Target, TargetMetadata, base};
pub(crate) fn target() -> Target {
let mut base = base::windows_gnullvm::opts();
@ -24,7 +24,7 @@ pub(crate) fn target() -> Target {
data_layout:
"e-m:w-p270:32:32-p271:32:32-p272:64:64-p:64:64-i32:32-i64:64-i128:128-n32:64-S128-Fn32"
.into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: base,
}
}

4
compiler/rustc_target/src/spec/targets/aarch64_pc_windows_msvc.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FramePointer, Target, TargetMetadata, base};
use crate::spec::{Arch, FramePointer, Target, TargetMetadata, base};
pub(crate) fn target() -> Target {
let mut base = base::windows_msvc::opts();
@ -23,7 +23,7 @@ pub(crate) fn target() -> Target {
data_layout:
"e-m:w-p270:32:32-p271:32:32-p272:64:64-p:64:64-i32:32-i64:64-i128:128-n32:64-S128-Fn32"
.into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: base,
}
}

6
compiler/rustc_target/src/spec/targets/aarch64_unknown_freebsd.rs
View file

@ -1,4 +1,6 @@
use crate::spec::{SanitizerSet, StackProbeType, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{
Arch, SanitizerSet, StackProbeType, Target, TargetMetadata, TargetOptions, base,
};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +13,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
features: "+v8a".into(),
max_atomic_width: Some(128),

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_fuchsia.rs
View file

@ -1,5 +1,5 @@
use crate::spec::{
Cc, LinkerFlavor, Lld, SanitizerSet, StackProbeType, Target, TargetMetadata, base,
Arch, Cc, LinkerFlavor, Lld, SanitizerSet, StackProbeType, Target, TargetMetadata, base,
};
pub(crate) fn target() -> Target {
@ -33,7 +33,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: base,
}
}

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_helenos.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{Target, base};
use crate::spec::{Arch, Target, base};
pub(crate) fn target() -> Target {
let mut base = base::helenos::opts();
@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: base,
}
}

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_hermit.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{StackProbeType, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, StackProbeType, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -10,7 +10,7 @@ pub(crate) fn target() -> Target {
std: Some(true),
},
pointer_width: 64,
arch: "aarch64".into(),
arch: Arch::AArch64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
options: TargetOptions {
features: "+v8a,+strict-align,+neon,+fp-armv8".into(),

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_illumos.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{Cc, LinkerFlavor, SanitizerSet, Target, TargetMetadata, base};
use crate::spec::{Arch, Cc, LinkerFlavor, SanitizerSet, Target, TargetMetadata, base};
pub(crate) fn target() -> Target {
let mut base = base::illumos::opts();
@ -19,7 +19,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: base,
}
}

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_gnu.rs
View file

@ -1,5 +1,5 @@
use crate::spec::{
FramePointer, SanitizerSet, StackProbeType, Target, TargetMetadata, TargetOptions, base,
Arch, FramePointer, SanitizerSet, StackProbeType, Target, TargetMetadata, TargetOptions, base,
};
pub(crate) fn target() -> Target {
@ -13,7 +13,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
features: "+v8a,+outline-atomics".into(),
// the AAPCS64 expects use of non-leaf frame pointers per

6
compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_gnu_ilp32.rs
View file

@ -1,4 +1,6 @@
use crate::spec::{FramePointer, StackProbeType, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{
Arch, FramePointer, StackProbeType, Target, TargetMetadata, TargetOptions, base,
};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +13,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
abi: "ilp32".into(),
features: "+v8a,+outline-atomics".into(),

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_musl.rs
View file

@ -1,5 +1,5 @@
use crate::spec::{
FramePointer, SanitizerSet, StackProbeType, Target, TargetMetadata, TargetOptions, base,
Arch, FramePointer, SanitizerSet, StackProbeType, Target, TargetMetadata, TargetOptions, base,
};
pub(crate) fn target() -> Target {
@ -27,7 +27,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
// the AAPCS64 expects use of non-leaf frame pointers per
// https://github.com/ARM-software/abi-aa/blob/4492d1570eb70c8fd146623e0db65b2d241f12e7/aapcs64/aapcs64.rst#the-frame-pointer

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_ohos.rs
View file

@ -1,5 +1,5 @@
use crate::spec::{
FramePointer, SanitizerSet, StackProbeType, Target, TargetMetadata, TargetOptions, base,
Arch, FramePointer, SanitizerSet, StackProbeType, Target, TargetMetadata, TargetOptions, base,
};
pub(crate) fn target() -> Target {
@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
// the AAPCS64 expects use of non-leaf frame pointers per
// https://github.com/ARM-software/abi-aa/blob/4492d1570eb70c8fd146623e0db65b2d241f12e7/aapcs64/aapcs64.rst#the-frame-pointer

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_managarm_mlibc.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{StackProbeType, Target, base};
use crate::spec::{Arch, StackProbeType, Target, base};
pub(crate) fn target() -> Target {
let mut base = base::managarm_mlibc::opts();
@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: base
}
}

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_netbsd.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{StackProbeType, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, StackProbeType, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
features: "+v8a".into(),
mcount: "__mcount".into(),

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_none.rs
View file

@ -7,7 +7,7 @@
// For example, `-C target-cpu=cortex-a53`.
use crate::spec::{
Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, StackProbeType, Target,
Arch, Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, StackProbeType, Target,
TargetMetadata, TargetOptions,
};
@ -39,7 +39,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: opts,
}
}

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_none_softfloat.rs
View file

@ -7,7 +7,7 @@
// For example, `-C target-cpu=cortex-a53`.
use crate::spec::{
Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, StackProbeType, Target,
Arch, Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, StackProbeType, Target,
TargetMetadata, TargetOptions,
};
@ -35,7 +35,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: opts,
}
}

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_nuttx.rs
View file

@ -7,7 +7,7 @@
// For example, `-C target-cpu=cortex-a53`.
use crate::spec::{
Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, StackProbeType, Target,
Arch, Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, StackProbeType, Target,
TargetMetadata, TargetOptions, cvs,
};
@ -41,7 +41,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: opts,
}
}

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_openbsd.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{StackProbeType, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, StackProbeType, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
features: "+v8a".into(),
max_atomic_width: Some(128),

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_redox.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{StackProbeType, Target, TargetMetadata, base};
use crate::spec::{Arch, StackProbeType, Target, TargetMetadata, base};
pub(crate) fn target() -> Target {
let mut base = base::redox::opts();
@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: base,
}
}

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_teeos.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{StackProbeType, Target, TargetMetadata, base};
use crate::spec::{Arch, StackProbeType, Target, TargetMetadata, base};
pub(crate) fn target() -> Target {
let mut base = base::teeos::opts();
@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: base,
}
}

5
compiler/rustc_target/src/spec/targets/aarch64_unknown_trusty.rs
View file

@ -1,7 +1,8 @@
// Trusty OS target for AArch64.
use crate::spec::{
LinkSelfContainedDefault, PanicStrategy, RelroLevel, Target, TargetMetadata, TargetOptions,
Arch, LinkSelfContainedDefault, PanicStrategy, RelroLevel, Target, TargetMetadata,
TargetOptions,
};
pub(crate) fn target() -> Target {
@ -15,7 +16,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
features: "+neon,+fp-armv8,+reserve-x18".into(),
executables: true,

4
compiler/rustc_target/src/spec/targets/aarch64_unknown_uefi.rs
View file

@ -1,7 +1,7 @@
// This defines the aarch64 target for UEFI systems as described in the UEFI specification. See the
// uefi-base module for generic UEFI options.
use crate::spec::{LinkerFlavor, Lld, Target, TargetMetadata, base};
use crate::spec::{Arch, LinkerFlavor, Lld, Target, TargetMetadata, base};
pub(crate) fn target() -> Target {
let mut base = base::uefi_msvc::opts();
@ -22,7 +22,7 @@ pub(crate) fn target() -> Target {
data_layout:
"e-m:w-p270:32:32-p271:32:32-p272:64:64-p:64:64-i32:32-i64:64-i128:128-n32:64-S128-Fn32"
.into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: base,
}
}

4
compiler/rustc_target/src/spec/targets/aarch64_uwp_windows_msvc.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{Target, TargetMetadata, base};
use crate::spec::{Arch, Target, TargetMetadata, base};
pub(crate) fn target() -> Target {
let mut base = base::windows_uwp_msvc::opts();
@ -17,7 +17,7 @@ pub(crate) fn target() -> Target {
data_layout:
"e-m:w-p270:32:32-p271:32:32-p272:64:64-p:64:64-i32:32-i64:64-i128:128-n32:64-S128-Fn32"
.into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: base,
}
}

4
compiler/rustc_target/src/spec/targets/aarch64_wrs_vxworks.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{StackProbeType, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, StackProbeType, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: "aarch64".into(),
arch: Arch::AArch64,
options: TargetOptions {
features: "+v8a,+reserve-x18".into(),
max_atomic_width: Some(128),

6
compiler/rustc_target/src/spec/targets/amdgcn_amd_amdhsa.rs
View file

@ -1,8 +1,10 @@
use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, Target, TargetMetadata, TargetOptions};
use crate::spec::{
Arch, Cc, LinkerFlavor, Lld, PanicStrategy, Target, TargetMetadata, TargetOptions,
};
pub(crate) fn target() -> Target {
Target {
arch: "amdgpu".into(),
arch: Arch::AmdGpu,
data_layout: "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9".into(),
llvm_target: "amdgcn-amd-amdhsa".into(),
metadata: TargetMetadata {

6
compiler/rustc_target/src/spec/targets/arm64ec_pc_windows_msvc.rs
View file

@ -1,4 +1,6 @@
use crate::spec::{FramePointer, LinkerFlavor, Lld, Target, TargetMetadata, add_link_args, base};
use crate::spec::{
Arch, FramePointer, LinkerFlavor, Lld, Target, TargetMetadata, add_link_args, base,
};
pub(crate) fn target() -> Target {
let mut base = base::windows_msvc::opts();
@ -28,7 +30,7 @@ pub(crate) fn target() -> Target {
data_layout:
"e-m:w-p270:32:32-p271:32:32-p272:64:64-p:64:64-i32:32-i64:64-i128:128-n32:64-S128-Fn32"
.into(),
arch: "arm64ec".into(),
arch: Arch::Arm64EC,
options: base,
}
}

4
compiler/rustc_target/src/spec/targets/arm_linux_androideabi.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, SanitizerSet, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, SanitizerSet, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabi".into(),
llvm_floatabi: Some(FloatAbi::Soft),

4
compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabi.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabi".into(),
llvm_floatabi: Some(FloatAbi::Soft),

4
compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabihf.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabihf".into(),
llvm_floatabi: Some(FloatAbi::Hard),

4
compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabi.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabi".into(),
llvm_floatabi: Some(FloatAbi::Soft),

4
compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabihf.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabihf".into(),
llvm_floatabi: Some(FloatAbi::Hard),

4
compiler/rustc_target/src/spec/targets/armeb_unknown_linux_gnueabi.rs
View file

@ -1,6 +1,6 @@
use rustc_abi::Endian;
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -13,7 +13,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabi".into(),
llvm_floatabi: Some(FloatAbi::Soft),

4
compiler/rustc_target/src/spec/targets/armebv7r_none_eabi.rs
View file

@ -3,7 +3,7 @@
use rustc_abi::Endian;
use crate::spec::{
Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetMetadata,
Arch, Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetMetadata,
TargetOptions,
};
@ -18,7 +18,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabi".into(),
llvm_floatabi: Some(FloatAbi::Soft),

4
compiler/rustc_target/src/spec/targets/armebv7r_none_eabihf.rs
View file

@ -3,7 +3,7 @@
use rustc_abi::Endian;
use crate::spec::{
Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetMetadata,
Arch, Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetMetadata,
TargetOptions,
};
@ -18,7 +18,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabihf".into(),
llvm_floatabi: Some(FloatAbi::Hard),

4
compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs
View file

@ -10,7 +10,7 @@
//! `-Clink-arg=-Tmy_script.ld` to override that with a correct linker script.
use crate::spec::{
Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetMetadata,
Arch, Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetMetadata,
TargetOptions, cvs,
};
@ -24,7 +24,7 @@ pub(crate) fn target() -> Target {
std: Some(false),
},
pointer_width: 32,
arch: "arm".into(),
arch: Arch::Arm,
/* Data layout args are '-' separated:
* little endian
* stack is 64-bit aligned (EABI)

4
compiler/rustc_target/src/spec/targets/armv4t_unknown_linux_gnueabi.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabi".into(),
llvm_floatabi: Some(FloatAbi::Soft),

4
compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs
View file

@ -1,6 +1,6 @@
//! Targets the ARMv5TE, with code as `a32` code by default.
use crate::spec::{FloatAbi, FramePointer, Target, TargetMetadata, TargetOptions, base, cvs};
use crate::spec::{Arch, FloatAbi, FramePointer, Target, TargetMetadata, TargetOptions, base, cvs};
pub(crate) fn target() -> Target {
Target {
@ -12,7 +12,7 @@ pub(crate) fn target() -> Target {
std: Some(false),
},
pointer_width: 32,
arch: "arm".into(),
arch: Arch::Arm,
/* Data layout args are '-' separated:
* little endian
* stack is 64-bit aligned (EABI)

4
compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_gnueabi.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabi".into(),
llvm_floatabi: Some(FloatAbi::Soft),

4
compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_musleabi.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabi".into(),
llvm_floatabi: Some(FloatAbi::Soft),

4
compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_uclibceabi.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabi".into(),
llvm_floatabi: Some(FloatAbi::Soft),

4
compiler/rustc_target/src/spec/targets/armv6_unknown_freebsd.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabihf".into(),
llvm_floatabi: Some(FloatAbi::Hard),

4
compiler/rustc_target/src/spec/targets/armv6_unknown_netbsd_eabihf.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabihf".into(),
llvm_floatabi: Some(FloatAbi::Hard),

4
compiler/rustc_target/src/spec/targets/armv6k_nintendo_3ds.rs
View file

@ -1,5 +1,5 @@
use crate::spec::{
Cc, FloatAbi, LinkerFlavor, Lld, RelocModel, Target, TargetMetadata, TargetOptions, cvs,
Arch, Cc, FloatAbi, LinkerFlavor, Lld, RelocModel, Target, TargetMetadata, TargetOptions, cvs,
};
/// A base target for Nintendo 3DS devices using the devkitARM toolchain.
@ -22,7 +22,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
os: "horizon".into(),

5
compiler/rustc_target/src/spec/targets/armv7_linux_androideabi.rs
View file

@ -1,5 +1,6 @@
use crate::spec::{
Cc, FloatAbi, LinkerFlavor, Lld, SanitizerSet, Target, TargetMetadata, TargetOptions, base,
Arch, Cc, FloatAbi, LinkerFlavor, Lld, SanitizerSet, Target, TargetMetadata, TargetOptions,
base,
};
// This target if is for the baseline of the Android v7a ABI
@ -23,7 +24,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabi".into(),
llvm_floatabi: Some(FloatAbi::Soft),

4
compiler/rustc_target/src/spec/targets/armv7_rtems_eabihf.rs
View file

@ -1,5 +1,5 @@
use crate::spec::{
Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetMetadata,
Arch, Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetMetadata,
TargetOptions, cvs,
};
@ -14,7 +14,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
os: "rtems".into(),

4
compiler/rustc_target/src/spec/targets/armv7_sony_vita_newlibeabihf.rs
View file

@ -1,7 +1,7 @@
use rustc_abi::Endian;
use crate::spec::{
Cc, FloatAbi, LinkerFlavor, Lld, RelocModel, Target, TargetMetadata, TargetOptions, cvs,
Arch, Cc, FloatAbi, LinkerFlavor, Lld, RelocModel, Target, TargetMetadata, TargetOptions, cvs,
};
/// A base target for PlayStation Vita devices using the VITASDK toolchain (using newlib).
@ -26,7 +26,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
os: "vita".into(),

4
compiler/rustc_target/src/spec/targets/armv7_unknown_freebsd.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -11,7 +11,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabihf".into(),
llvm_floatabi: Some(FloatAbi::Hard),

4
compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabi.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
// This target is for glibc Linux on ARMv7 without thumb-mode, NEON or
// hardfloat.
@ -14,7 +14,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabi".into(),
llvm_floatabi: Some(FloatAbi::Soft),

4
compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabihf.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
// This target is for glibc Linux on ARMv7 without NEON or
// thumb-mode. See the thumbv7neon variant for enabling both.
@ -14,7 +14,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabihf".into(),
llvm_floatabi: Some(FloatAbi::Hard),

4
compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabi.rs
View file

@ -1,4 +1,4 @@
use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
use crate::spec::{Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base};
// This target is for musl Linux on ARMv7 without thumb-mode, NEON or
// hardfloat.
@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
arch: Arch::Arm,
options: TargetOptions {
abi: "eabi".into(),

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