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convert _mm512_mask_alignr_epi8 to const generics

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Rémy Rakic 2021-03-05 01:04:24 +01:00 • committed by Amanieu d'Antras
parent 4b9a812619
commit 2789905cc6
1 changed files with 7 additions and 13 deletions
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20
library/stdarch/crates/core_arch/src/x86/avx512bw.rs
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@ -9056,21 +9056,16 @@ pub unsafe fn _mm512_alignr_epi8(a: __m512i, b: __m512i, imm8: i32) -> __m512i {
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_alignr_epi8&expand=264)
#[inline]
#[target_feature(enable = "avx512bw")]
#[cfg_attr(test, assert_instr(vpalignr, imm8 = 1))]
#[rustc_args_required_const(4)]
pub unsafe fn _mm512_mask_alignr_epi8(
#[cfg_attr(test, assert_instr(vpalignr, IMM8 = 1))]
#[rustc_legacy_const_generics(4)]
pub unsafe fn _mm512_mask_alignr_epi8<const IMM8: i32>(
src: __m512i,
k: __mmask64,
a: __m512i,
b: __m512i,
imm8: i32,
) -> __m512i {
macro_rules! call {
($imm8:expr) => {
_mm512_alignr_epi8(a, b, $imm8)
};
}
let r = constify_imm8_sae!(imm8, call);
static_assert_imm8!(IMM8);
let r = _mm512_alignr_epi8(a, b, IMM8);
transmute(simd_select_bitmask(k, r.as_i8x64(), src.as_i8x64()))
}
@ -17705,14 +17700,13 @@ mod tests {
1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0,
);
let b = _mm512_set1_epi8(1);
let r = _mm512_mask_alignr_epi8(a, 0, a, b, 14);
let r = _mm512_mask_alignr_epi8::<14>(a, 0, a, b);
assert_eq_m512i(r, a);
let r = _mm512_mask_alignr_epi8(
let r = _mm512_mask_alignr_epi8::<14>(
a,
0b11111111_11111111_11111111_11111111_11111111_11111111_11111111_11111111,
a,
b,
14,
);
#[rustfmt::skip]
let e = _mm512_set_epi8(