avx512bw (#1014)
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2 changed files with 223 additions and 9 deletions
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@ -296,9 +296,9 @@
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* [x] [`_mm512_cvtepi16_epi8`]
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* [x] [`_mm512_mask_cvtepi16_epi8`]
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* [x] [`_mm512_maskz_cvtepi16_epi8`]
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* [_] [`_mm512_mask_cvtepi16_storeu_epi8`]
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* [_] [`_mm_mask_cvtepi16_storeu_epi8`]
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* [_] [`_mm256_mask_cvtepi16_storeu_epi8`]
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* [x] [`_mm512_mask_cvtepi16_storeu_epi8`]
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* [x] [`_mm_mask_cvtepi16_storeu_epi8`]
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* [x] [`_mm256_mask_cvtepi16_storeu_epi8`]
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* [x] [`_mm_cvtepi16_epi8`]
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* [x] [`_mm_mask_cvtepi16_epi8`]
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* [x] [`_mm_maskz_cvtepi16_epi8`]
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@ -315,15 +315,15 @@
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* [x] [`_mm512_cvtsepi16_epi8`]
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* [x] [`_mm512_mask_cvtsepi16_epi8`]
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* [x] [`_mm512_maskz_cvtsepi16_epi8`]
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* [_] [`_mm512_mask_cvtsepi16_storeu_epi8`]
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* [x] [`_mm_cvtsepi16_epi8`]
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* [x] [`_mm_mask_cvtsepi16_epi8`]
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* [x] [`_mm_maskz_cvtsepi16_epi8`]
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* [x] [`_mm256_cvtsepi16_epi8`]
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* [x] [`_mm256_mask_cvtsepi16_epi8`]
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* [x] [`_mm256_maskz_cvtsepi16_epi8`]
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* [_] [`_mm_mask_cvtsepi16_storeu_epi8`]
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* [_] [`_mm256_mask_cvtsepi16_storeu_epi8`]
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* [x] [`_mm512_mask_cvtsepi16_storeu_epi8`]
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* [x] [`_mm_mask_cvtsepi16_storeu_epi8`]
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* [x] [`_mm256_mask_cvtsepi16_storeu_epi8`]
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* [x] [`_mm512_cvtepu8_epi16`]
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* [x] [`_mm512_mask_cvtepu8_epi16`]
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* [x] [`_mm512_maskz_cvtepu8_epi16`]
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@ -338,15 +338,15 @@
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* [x] [`_mm512_cvtusepi16_epi8`]
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* [x] [`_mm512_mask_cvtusepi16_epi8`]
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* [x] [`_mm512_maskz_cvtusepi16_epi8`]
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* [_] [`_mm512_mask_cvtusepi16_storeu_epi8`]
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* [x] [`_mm_cvtusepi16_epi8`]
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* [x] [`_mm_mask_cvtusepi16_epi8`]
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* [x] [`_mm_maskz_cvtusepi16_epi8`]
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* [x] [`_mm256_cvtusepi16_epi8`]
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* [x] [`_mm256_mask_cvtusepi16_epi8`]
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* [x] [`_mm256_maskz_cvtusepi16_epi8`]
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* [_] [`_mm_mask_cvtusepi16_storeu_epi8`]
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* [_] [`_mm256_mask_cvtusepi16_storeu_epi8`]
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* [x] [`_mm512_mask_cvtusepi16_storeu_epi8`]
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* [x] [`_mm_mask_cvtusepi16_storeu_epi8`]
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* [x] [`_mm256_mask_cvtusepi16_storeu_epi8`]
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* [x] [`_mm512_dbsad_epu8`]
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* [x] [`_mm512_mask_dbsad_epu8`]
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* [x] [`_mm512_maskz_dbsad_epu8`]
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@ -9388,6 +9388,96 @@ pub unsafe fn _mm_maskz_alignr_epi8(k: __mmask16, a: __m128i, b: __m128i, imm8:
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transmute(simd_select_bitmask(k, r.as_i8x16(), zero))
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}
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/// Convert packed signed 16-bit integers in a to packed 8-bit integers with signed saturation, and store the active results (those with their respective bit set in writemask k) to unaligned memory at base_addr.
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_cvtsepi16_storeu_epi8&expand=1812)
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#[inline]
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#[target_feature(enable = "avx512bw")]
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#[cfg_attr(test, assert_instr(vpmovswb))]
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pub unsafe fn _mm512_mask_cvtsepi16_storeu_epi8(mem_addr: *mut i8, k: __mmask32, a: __m512i) {
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vpmovswbmem(mem_addr as *mut i8, a.as_i16x32(), k);
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}
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/// Convert packed signed 16-bit integers in a to packed 8-bit integers with signed saturation, and store the active results (those with their respective bit set in writemask k) to unaligned memory at base_addr.
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_cvtsepi16_storeu_epi8&expand=1811)
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#[inline]
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#[target_feature(enable = "avx512bw,avx512vl")]
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#[cfg_attr(test, assert_instr(vpmovswb))]
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pub unsafe fn _mm256_mask_cvtsepi16_storeu_epi8(mem_addr: *mut i8, k: __mmask16, a: __m256i) {
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vpmovswbmem256(mem_addr as *mut i8, a.as_i16x16(), k);
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}
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/// Convert packed signed 16-bit integers in a to packed 8-bit integers with signed saturation, and store the active results (those with their respective bit set in writemask k) to unaligned memory at base_addr.
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_cvtsepi16_storeu_epi8&expand=1810)
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#[inline]
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#[target_feature(enable = "avx512bw,avx512vl")]
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#[cfg_attr(test, assert_instr(vpmovswb))]
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pub unsafe fn _mm_mask_cvtsepi16_storeu_epi8(mem_addr: *mut i8, k: __mmask8, a: __m128i) {
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vpmovswbmem128(mem_addr as *mut i8, a.as_i16x8(), k);
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}
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/// Convert packed 16-bit integers in a to packed 8-bit integers with truncation, and store the active results (those with their respective bit set in writemask k) to unaligned memory at base_addr.
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_cvtepi16_storeu_epi8&expand=1412)
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#[inline]
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#[target_feature(enable = "avx512bw")]
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#[cfg_attr(test, assert_instr(vpmovwb))]
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pub unsafe fn _mm512_mask_cvtepi16_storeu_epi8(mem_addr: *mut i8, k: __mmask32, a: __m512i) {
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vpmovwbmem(mem_addr as *mut i8, a.as_i16x32(), k);
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}
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/// Convert packed 16-bit integers in a to packed 8-bit integers with truncation, and store the active results (those with their respective bit set in writemask k) to unaligned memory at base_addr.
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_cvtepi16_storeu_epi8&expand=1411)
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#[inline]
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#[target_feature(enable = "avx512bw,avx512vl")]
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#[cfg_attr(test, assert_instr(vpmovwb))]
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pub unsafe fn _mm256_mask_cvtepi16_storeu_epi8(mem_addr: *mut i8, k: __mmask16, a: __m256i) {
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vpmovwbmem256(mem_addr as *mut i8, a.as_i16x16(), k);
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}
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/// Convert packed 16-bit integers in a to packed 8-bit integers with truncation, and store the active results (those with their respective bit set in writemask k) to unaligned memory at base_addr.
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_cvtepi16_storeu_epi8&expand=1410)
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#[inline]
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#[target_feature(enable = "avx512bw,avx512vl")]
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#[cfg_attr(test, assert_instr(vpmovwb))]
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pub unsafe fn _mm_mask_cvtepi16_storeu_epi8(mem_addr: *mut i8, k: __mmask8, a: __m128i) {
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vpmovwbmem128(mem_addr as *mut i8, a.as_i16x8(), k);
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}
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/// Convert packed unsigned 16-bit integers in a to packed unsigned 8-bit integers with unsigned saturation, and store the active results (those with their respective bit set in writemask k) to unaligned memory at base_addr.
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_cvtusepi16_storeu_epi8&expand=2047)
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#[inline]
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#[target_feature(enable = "avx512bw")]
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#[cfg_attr(test, assert_instr(vpmovuswb))]
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pub unsafe fn _mm512_mask_cvtusepi16_storeu_epi8(mem_addr: *mut i8, k: __mmask32, a: __m512i) {
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vpmovuswbmem(mem_addr as *mut i8, a.as_i16x32(), k);
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}
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/// Convert packed unsigned 16-bit integers in a to packed unsigned 8-bit integers with unsigned saturation, and store the active results (those with their respective bit set in writemask k) to unaligned memory at base_addr.
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_cvtusepi16_storeu_epi8&expand=2046)
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#[inline]
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#[target_feature(enable = "avx512bw,avx512vl")]
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#[cfg_attr(test, assert_instr(vpmovuswb))]
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pub unsafe fn _mm256_mask_cvtusepi16_storeu_epi8(mem_addr: *mut i8, k: __mmask16, a: __m256i) {
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vpmovuswbmem256(mem_addr as *mut i8, a.as_i16x16(), k);
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}
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/// Convert packed unsigned 16-bit integers in a to packed unsigned 8-bit integers with unsigned saturation, and store the active results (those with their respective bit set in writemask k) to unaligned memory at base_addr.
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_cvtusepi16_storeu_epi8&expand=2045)
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#[inline]
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#[target_feature(enable = "avx512bw,avx512vl")]
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#[cfg_attr(test, assert_instr(vpmovuswb))]
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pub unsafe fn _mm_mask_cvtusepi16_storeu_epi8(mem_addr: *mut i8, k: __mmask8, a: __m128i) {
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vpmovuswbmem128(mem_addr as *mut i8, a.as_i16x8(), k);
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}
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#[allow(improper_ctypes)]
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extern "C" {
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#[link_name = "llvm.x86.avx512.mask.paddus.w.512"]
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@ -9594,6 +9684,27 @@ extern "C" {
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fn vpmovuswb256(a: u16x16, src: u8x16, mask: u16) -> u8x16;
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#[link_name = "llvm.x86.avx512.mask.pmovus.wb.128"]
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fn vpmovuswb128(a: u16x8, src: u8x16, mask: u8) -> u8x16;
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#[link_name = "llvm.x86.avx512.mask.pmovs.wb.mem.512"]
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fn vpmovswbmem(mem_addr: *mut i8, a: i16x32, mask: u32);
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#[link_name = "llvm.x86.avx512.mask.pmovs.wb.mem.256"]
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fn vpmovswbmem256(mem_addr: *mut i8, a: i16x16, mask: u16);
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#[link_name = "llvm.x86.avx512.mask.pmovs.wb.mem.128"]
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fn vpmovswbmem128(mem_addr: *mut i8, a: i16x8, mask: u8);
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#[link_name = "llvm.x86.avx512.mask.pmov.wb.mem.512"]
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fn vpmovwbmem(mem_addr: *mut i8, a: i16x32, mask: u32);
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#[link_name = "llvm.x86.avx512.mask.pmov.wb.mem.256"]
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fn vpmovwbmem256(mem_addr: *mut i8, a: i16x16, mask: u16);
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#[link_name = "llvm.x86.avx512.mask.pmov.wb.mem.128"]
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fn vpmovwbmem128(mem_addr: *mut i8, a: i16x8, mask: u8);
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#[link_name = "llvm.x86.avx512.mask.pmovus.wb.mem.512"]
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fn vpmovuswbmem(mem_addr: *mut i8, a: i16x32, mask: u32);
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#[link_name = "llvm.x86.avx512.mask.pmovus.wb.mem.256"]
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fn vpmovuswbmem256(mem_addr: *mut i8, a: i16x16, mask: u16);
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#[link_name = "llvm.x86.avx512.mask.pmovus.wb.mem.128"]
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fn vpmovuswbmem128(mem_addr: *mut i8, a: i16x8, mask: u8);
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}
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#[cfg(test)]
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@ -17905,4 +18016,107 @@ mod tests {
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let e = _mm_set_epi8(0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 1);
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assert_eq_m128i(r, e);
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}
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#[simd_test(enable = "avx512bw")]
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unsafe fn test_mm512_mask_cvtsepi16_storeu_epi8() {
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let a = _mm512_set1_epi16(i16::MAX);
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let mut r = _mm256_undefined_si256();
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_mm512_mask_cvtsepi16_storeu_epi8(
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&mut r as *mut _ as *mut i8,
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0b11111111_11111111_11111111_11111111,
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a,
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);
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let e = _mm256_set1_epi8(i8::MAX);
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assert_eq_m256i(r, e);
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}
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#[simd_test(enable = "avx512bw,avx512vl")]
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unsafe fn test_mm256_mask_cvtsepi16_storeu_epi8() {
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let a = _mm256_set1_epi16(i16::MAX);
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let mut r = _mm_undefined_si128();
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_mm256_mask_cvtsepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a);
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let e = _mm_set1_epi8(i8::MAX);
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assert_eq_m128i(r, e);
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}
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#[simd_test(enable = "avx512bw,avx512vl")]
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unsafe fn test_mm_mask_cvtsepi16_storeu_epi8() {
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let a = _mm_set1_epi16(i16::MAX);
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let mut r = _mm_set1_epi8(0);
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_mm_mask_cvtsepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a);
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#[rustfmt::skip]
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let e = _mm_set_epi8(
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0, 0, 0, 0, 0, 0, 0, 0,
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i8::MAX, i8::MAX, i8::MAX, i8::MAX, i8::MAX, i8::MAX, i8::MAX, i8::MAX,
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);
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assert_eq_m128i(r, e);
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}
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#[simd_test(enable = "avx512bw")]
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unsafe fn test_mm512_mask_cvtepi16_storeu_epi8() {
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let a = _mm512_set1_epi16(8);
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let mut r = _mm256_undefined_si256();
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_mm512_mask_cvtepi16_storeu_epi8(
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&mut r as *mut _ as *mut i8,
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0b11111111_11111111_11111111_11111111,
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a,
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);
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let e = _mm256_set1_epi8(8);
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assert_eq_m256i(r, e);
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}
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#[simd_test(enable = "avx512bw,avx512vl")]
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unsafe fn test_mm256_mask_cvtepi16_storeu_epi8() {
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let a = _mm256_set1_epi16(8);
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let mut r = _mm_undefined_si128();
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_mm256_mask_cvtepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a);
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let e = _mm_set1_epi8(8);
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assert_eq_m128i(r, e);
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}
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#[simd_test(enable = "avx512bw,avx512vl")]
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unsafe fn test_mm_mask_cvtepi16_storeu_epi8() {
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let a = _mm_set1_epi16(8);
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let mut r = _mm_set1_epi8(0);
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_mm_mask_cvtepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a);
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let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 8, 8, 8, 8, 8, 8, 8, 8);
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assert_eq_m128i(r, e);
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}
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#[simd_test(enable = "avx512bw")]
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unsafe fn test_mm512_mask_cvtusepi16_storeu_epi8() {
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let a = _mm512_set1_epi16(i16::MAX);
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let mut r = _mm256_undefined_si256();
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_mm512_mask_cvtusepi16_storeu_epi8(
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&mut r as *mut _ as *mut i8,
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0b11111111_11111111_11111111_11111111,
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a,
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);
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let e = _mm256_set1_epi8(u8::MAX as i8);
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assert_eq_m256i(r, e);
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}
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#[simd_test(enable = "avx512bw,avx512vl")]
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unsafe fn test_mm256_mask_cvtusepi16_storeu_epi8() {
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let a = _mm256_set1_epi16(i16::MAX);
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let mut r = _mm_undefined_si128();
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_mm256_mask_cvtusepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111_11111111, a);
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let e = _mm_set1_epi8(u8::MAX as i8);
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assert_eq_m128i(r, e);
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}
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#[simd_test(enable = "avx512bw,avx512vl")]
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unsafe fn test_mm_mask_cvtusepi16_storeu_epi8() {
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let a = _mm_set1_epi16(i16::MAX);
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let mut r = _mm_set1_epi8(0);
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_mm_mask_cvtusepi16_storeu_epi8(&mut r as *mut _ as *mut i8, 0b11111111, a);
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#[rustfmt::skip]
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let e = _mm_set_epi8(
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0, 0, 0, 0,
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0, 0, 0, 0,
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u8::MAX as i8, u8::MAX as i8, u8::MAX as i8, u8::MAX as i8,
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u8::MAX as i8, u8::MAX as i8, u8::MAX as i8, u8::MAX as i8,
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);
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assert_eq_m128i(r, e);
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}
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}
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