stdarch-gen: Add LoongArch frecipe intrinsics

This commit is contained in:
WANG Rui 2024-10-14 19:55:48 +08:00 committed by Amanieu d'Antras
parent 07d24af3ac
commit 2d56d53f81
6 changed files with 135 additions and 17 deletions

View file

@ -11,10 +11,11 @@ LSX:
# Generate bindings
OUT_DIR=`pwd`/crates/stdarch-gen-loongarch cargo run -p stdarch-gen-loongarch -- crates/stdarch-gen-loongarch/lsxintrin.h
OUT_DIR=`pwd`/crates/core_arch cargo run -p stdarch-gen-loongarch -- crates/stdarch-gen-loongarch/lsx.spec
rustfmt crates/core_arch/src/loongarch64/lsx/generated.rs
# Generate tests
OUT_DIR=`pwd`/crates/stdarch-gen-loongarch cargo run -p stdarch-gen-loongarch -- crates/stdarch-gen-loongarch/lsx.spec test
loongarch64-unknown-linux-gnu-gcc -static -o lsx crates/stdarch-gen-loongarch/lsx.c -mlasx
loongarch64-unknown-linux-gnu-gcc -static -o lsx crates/stdarch-gen-loongarch/lsx.c -mlasx -mfrecipe
qemu-loongarch64 ./lsx > crates/core_arch/src/loongarch64/lsx/tests.rs
rustfmt crates/core_arch/src/loongarch64/lsx/tests.rs
```
@ -24,10 +25,11 @@ LASX:
# Generate bindings
OUT_DIR=`pwd`/crates/stdarch-gen-loongarch cargo run -p stdarch-gen-loongarch -- crates/stdarch-gen-loongarch/lasxintrin.h
OUT_DIR=`pwd`/crates/core_arch cargo run -p stdarch-gen-loongarch -- crates/stdarch-gen-loongarch/lasx.spec
rustfmt crates/core_arch/src/loongarch64/lasx/generated.rs
# Generate tests
OUT_DIR=`pwd`/crates/stdarch-gen-loongarch cargo run -p stdarch-gen-loongarch -- crates/stdarch-gen-loongarch/lasx.spec test
loongarch64-unknown-linux-gnu-gcc -static -o lasx crates/stdarch-gen-loongarch/lasx.c -mlasx
loongarch64-unknown-linux-gnu-gcc -static -o lasx crates/stdarch-gen-loongarch/lasx.c -mlasx -mfrecipe
qemu-loongarch64 ./lasx > crates/core_arch/src/loongarch64/lasx/tests.rs
rustfmt crates/core_arch/src/loongarch64/lasx/tests.rs
```

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@ -1648,6 +1648,26 @@ name = lasx_xvfrecip_d
asm-fmts = xd, xj
data-types = V4DF, V4DF
/// lasx_xvfrecipe_s
name = lasx_xvfrecipe_s
asm-fmts = xd, xj
data-types = V8SF, V8SF
/// lasx_xvfrecipe_d
name = lasx_xvfrecipe_d
asm-fmts = xd, xj
data-types = V4DF, V4DF
/// lasx_xvfrsqrte_s
name = lasx_xvfrsqrte_s
asm-fmts = xd, xj
data-types = V8SF, V8SF
/// lasx_xvfrsqrte_d
name = lasx_xvfrsqrte_d
asm-fmts = xd, xj
data-types = V4DF, V4DF
/// lasx_xvfrint_s
name = lasx_xvfrint_s
asm-fmts = xd, xj

View file

@ -1,10 +1,10 @@
/*
* https://gcc.gnu.org/git/?p=gcc.git;a=blob_plain;f=gcc/config/loongarch/lasxintrin.h;hb=4912418dc1b51d49aca5982c6a2061bb912b92b7
* https://gcc.gnu.org/git/?p=gcc.git;a=blob_plain;f=gcc/config/loongarch/lasxintrin.h;hb=61f1001f2f4ab9128e5eb6e9a4adbbb0f9f0bc75
*/
/* LARCH Loongson ASX intrinsics include file.
Copyright (C) 2018 Free Software Foundation, Inc.
Copyright (C) 2018-2024 Free Software Foundation, Inc.
This file is part of GCC.
@ -2403,6 +2403,40 @@ __m256d __lasx_xvfrecip_d (__m256d _1)
return (__m256d)__builtin_lasx_xvfrecip_d ((v4f64)_1);
}
#if defined(__loongarch_frecipe)
/* Assembly instruction format: xd, xj. */
/* Data types in instruction templates: V8SF, V8SF. */
extern __inline __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__m256 __lasx_xvfrecipe_s (__m256 _1)
{
return (__m256)__builtin_lasx_xvfrecipe_s ((v8f32)_1);
}
/* Assembly instruction format: xd, xj. */
/* Data types in instruction templates: V4DF, V4DF. */
extern __inline __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__m256d __lasx_xvfrecipe_d (__m256d _1)
{
return (__m256d)__builtin_lasx_xvfrecipe_d ((v4f64)_1);
}
/* Assembly instruction format: xd, xj. */
/* Data types in instruction templates: V8SF, V8SF. */
extern __inline __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__m256 __lasx_xvfrsqrte_s (__m256 _1)
{
return (__m256)__builtin_lasx_xvfrsqrte_s ((v8f32)_1);
}
/* Assembly instruction format: xd, xj. */
/* Data types in instruction templates: V4DF, V4DF. */
extern __inline __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__m256d __lasx_xvfrsqrte_d (__m256d _1)
{
return (__m256d)__builtin_lasx_xvfrsqrte_d ((v4f64)_1);
}
#endif
/* Assembly instruction format: xd, xj. */
/* Data types in instruction templates: V8SF, V8SF. */
extern __inline __attribute__((__gnu_inline__, __always_inline__, __artificial__))

View file

@ -1723,6 +1723,26 @@ name = lsx_vfrecip_d
asm-fmts = vd, vj
data-types = V2DF, V2DF
/// lsx_vfrecipe_s
name = lsx_vfrecipe_s
asm-fmts = vd, vj
data-types = V4SF, V4SF
/// lsx_vfrecipe_d
name = lsx_vfrecipe_d
asm-fmts = vd, vj
data-types = V2DF, V2DF
/// lsx_vfrsqrte_s
name = lsx_vfrsqrte_s
asm-fmts = vd, vj
data-types = V4SF, V4SF
/// lsx_vfrsqrte_d
name = lsx_vfrsqrte_d
asm-fmts = vd, vj
data-types = V2DF, V2DF
/// lsx_vfrint_s
name = lsx_vfrint_s
asm-fmts = vd, vj

View file

@ -1,10 +1,10 @@
/*
* https://gcc.gnu.org/git/?p=gcc.git;a=blob_plain;f=gcc/config/loongarch/lsxintrin.h;hb=4912418dc1b51d49aca5982c6a2061bb912b92b7
* https://gcc.gnu.org/git/?p=gcc.git;a=blob_plain;f=gcc/config/loongarch/lsxintrin.h;hb=61f1001f2f4ab9128e5eb6e9a4adbbb0f9f0bc75
*/
/* LARCH Loongson SX intrinsics include file.
Copyright (C) 2018 Free Software Foundation, Inc.
Copyright (C) 2018-2024 Free Software Foundation, Inc.
This file is part of GCC.
@ -2484,6 +2484,40 @@ __m128d __lsx_vfrecip_d (__m128d _1)
return (__m128d)__builtin_lsx_vfrecip_d ((v2f64)_1);
}
#if defined(__loongarch_frecipe)
/* Assembly instruction format: vd, vj. */
/* Data types in instruction templates: V4SF, V4SF. */
extern __inline __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__m128 __lsx_vfrecipe_s (__m128 _1)
{
return (__m128)__builtin_lsx_vfrecipe_s ((v4f32)_1);
}
/* Assembly instruction format: vd, vj. */
/* Data types in instruction templates: V2DF, V2DF. */
extern __inline __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__m128d __lsx_vfrecipe_d (__m128d _1)
{
return (__m128d)__builtin_lsx_vfrecipe_d ((v2f64)_1);
}
/* Assembly instruction format: vd, vj. */
/* Data types in instruction templates: V4SF, V4SF. */
extern __inline __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__m128 __lsx_vfrsqrte_s (__m128 _1)
{
return (__m128)__builtin_lsx_vfrsqrte_s ((v4f32)_1);
}
/* Assembly instruction format: vd, vj. */
/* Data types in instruction templates: V2DF, V2DF. */
extern __inline __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__m128d __lsx_vfrsqrte_d (__m128d _1)
{
return (__m128d)__builtin_lsx_vfrsqrte_d ((v2f64)_1);
}
#endif
/* Assembly instruction format: vd, vj. */
/* Data types in instruction templates: V4SF, V4SF. */
extern __inline __attribute__((__gnu_inline__, __always_inline__, __artificial__))

View file

@ -53,28 +53,36 @@ impl TargetFeature {
}
/// A string for use with `#[target_feature(...)]`.
fn as_target_feature_arg_loongarch64(&self) -> &str {
match *self {
fn as_target_feature_arg(&self, ins: &str) -> String {
let vec = match *self {
// Features included with LoongArch64 LSX and LASX.
Self::Lsx => "lsx",
Self::Lasx => "lasx",
}
};
let frecipe = match ins {
"lsx_vfrecipe_s" | "lsx_vfrecipe_d" | "lsx_vfrsqrte_s" | "lsx_vfrsqrte_d"
| "lasx_xvfrecipe_s" | "lasx_xvfrecipe_d" | "lasx_xvfrsqrte_s" | "lasx_xvfrsqrte_d" => {
",frecipe"
}
_ => "",
};
format!("{vec}{frecipe}")
}
fn attr(name: &str, value: impl fmt::Display) -> String {
format!(r#"#[{name}(enable = "{value}")]"#)
}
/// Generate a target_feature attribute for a test that will compile only for "loongarch64".
fn to_target_feature_attr_loongarch64(self) -> Lines {
/// Generate a target_feature attribute
fn to_target_feature_attr(&self, ins: &str) -> Lines {
Lines::single(Self::attr(
"target_feature",
self.as_target_feature_arg_loongarch64(),
self.as_target_feature_arg(ins),
))
}
fn bytes(self) -> u8 {
match self {
fn bytes(&self) -> u8 {
match *self {
// Features included with LoongArch64 LSX and LASX.
Self::Lsx => 16,
Self::Lasx => 32,
@ -531,7 +539,7 @@ fn gen_bind_body(
{call_params}
}}
"#,
target_feature = target.to_target_feature_attr_loongarch64()
target_feature = target.to_target_feature_attr(current_name)
)
} else {
format!(
@ -542,7 +550,7 @@ fn gen_bind_body(
{call_params}
}}
"#,
target_feature = target.to_target_feature_attr_loongarch64()
target_feature = target.to_target_feature_attr(current_name)
)
};
(link_function, function)
@ -1491,7 +1499,7 @@ static void {current_name}(void)
printf("}}\n");
}}
"#,
target.as_target_feature_arg_loongarch64()
target.as_target_feature_arg(current_name)
)
};
let call_function = format!(" {current_name}();\n");