From 2d7479844ab76cf1921b07b13e53dadea34f2b1c Mon Sep 17 00:00:00 2001
From: Paolo Teti <paolo.teti@gmail.com>
Date: Mon, 25 Feb 2019 19:26:32 +0100
Subject: [PATCH] The GE bits of the APSR are set also by USUB8

---
 library/stdarch/crates/core_arch/src/acle/simd32.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/library/stdarch/crates/core_arch/src/acle/simd32.rs b/library/stdarch/crates/core_arch/src/acle/simd32.rs
index e5d00e145156..1c64edee9238 100644
--- a/library/stdarch/crates/core_arch/src/acle/simd32.rs
+++ b/library/stdarch/crates/core_arch/src/acle/simd32.rs
@@ -353,6 +353,7 @@ pub unsafe fn __shsub8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
 /// res\[3\] = a\[3\] - a\[3\]
 ///
 /// where [0] is the lower 8 bits and [3] is the upper 8 bits.
+/// The GE bits of the APSR are set.
 #[inline]
 #[cfg_attr(test, assert_instr(usub8))]
 pub unsafe fn __usub8(a: uint8x4_t, b: uint8x4_t) -> uint8x4_t {