From 318f4ef207dd1bfef26fd79b63b5be65cdb599b0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?R=C3=A9my=20Rakic?= <remy.rakic+github@gmail.com>
Date: Thu, 4 Mar 2021 21:15:59 +0100
Subject: [PATCH] convert `_mm_insert_epi64` to const generics

---
 .../stdarch/crates/core_arch/src/x86/avx2.rs  |  2 +-
 .../stdarch/crates/core_arch/src/x86/test.rs  |  6 ++++--
 .../crates/core_arch/src/x86_64/sse41.rs      | 20 +++++++++----------
 3 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/library/stdarch/crates/core_arch/src/x86/avx2.rs b/library/stdarch/crates/core_arch/src/x86/avx2.rs
index b6952d03a1b3..138f7ce292cf 100644
--- a/library/stdarch/crates/core_arch/src/x86/avx2.rs
+++ b/library/stdarch/crates/core_arch/src/x86/avx2.rs
@@ -5184,7 +5184,7 @@ mod tests {
     #[simd_test(enable = "avx2")]
     unsafe fn test_mm256_sll_epi64() {
         let a = _mm256_set1_epi64x(0xFFFFFFFF);
-        let b = _mm_insert_epi64(_mm_set1_epi64x(0), 4, 0);
+        let b = _mm_insert_epi64::<0>(_mm_set1_epi64x(0), 4);
         let r = _mm256_sll_epi64(a, b);
         assert_eq_m256i(r, _mm256_set1_epi64x(0xFFFFFFFF0));
     }
diff --git a/library/stdarch/crates/core_arch/src/x86/test.rs b/library/stdarch/crates/core_arch/src/x86/test.rs
index 9f577972fa8b..9f8b96930130 100644
--- a/library/stdarch/crates/core_arch/src/x86/test.rs
+++ b/library/stdarch/crates/core_arch/src/x86/test.rs
@@ -92,14 +92,16 @@ pub unsafe fn get_m512i(a: __m512i, idx: usize) -> i64 {
 mod x86_polyfill {
     use crate::core_arch::x86::*;
 
-    pub unsafe fn _mm_insert_epi64(a: __m128i, val: i64, idx: i32) -> __m128i {
+    #[rustc_legacy_const_generics(2)]
+    pub unsafe fn _mm_insert_epi64<const INDEX: i32>(a: __m128i, val: i64) -> __m128i {
+        static_assert_imm1!(INDEX);
         #[repr(C)]
         union A {
             a: __m128i,
             b: [i64; 2],
         }
         let mut a = A { a };
-        a.b[idx as usize] = val;
+        a.b[INDEX as usize] = val;
         a.a
     }
 
diff --git a/library/stdarch/crates/core_arch/src/x86_64/sse41.rs b/library/stdarch/crates/core_arch/src/x86_64/sse41.rs
index d0fd68d5f5f4..3d1ea0cf65da 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/sse41.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/sse41.rs
@@ -22,20 +22,17 @@ pub unsafe fn _mm_extract_epi64<const IMM1: i32>(a: __m128i) -> i64 {
 }
 
 /// Returns a copy of `a` with the 64-bit integer from `i` inserted at a
-/// location specified by `imm8`.
+/// location specified by `IMM1`.
 ///
 /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_insert_epi64)
 #[inline]
 #[target_feature(enable = "sse4.1")]
-#[cfg_attr(test, assert_instr(pinsrq, imm8 = 0))]
-#[rustc_args_required_const(2)]
+#[cfg_attr(test, assert_instr(pinsrq, IMM1 = 0))]
+#[rustc_legacy_const_generics(2)]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _mm_insert_epi64(a: __m128i, i: i64, imm8: i32) -> __m128i {
-    let a = a.as_i64x2();
-    match imm8 & 1 {
-        0 => transmute(simd_insert(a, 0, i)),
-        _ => transmute(simd_insert(a, 1, i)),
-    }
+pub unsafe fn _mm_insert_epi64<const IMM1: i32>(a: __m128i, i: i64) -> __m128i {
+    static_assert_imm1!(IMM1);
+    transmute(simd_insert(a.as_i64x2(), IMM1 as u32, i))
 }
 
 #[cfg(test)]
@@ -56,9 +53,10 @@ mod tests {
     unsafe fn test_mm_insert_epi64() {
         let a = _mm_set1_epi64x(0);
         let e = _mm_setr_epi64x(0, 32);
-        let r = _mm_insert_epi64(a, 32, 1);
+        let r = _mm_insert_epi64::<1>(a, 32);
         assert_eq_m128i(r, e);
-        let r = _mm_insert_epi64(a, 32, 3);
+        let e = _mm_setr_epi64x(32, 0);
+        let r = _mm_insert_epi64::<0>(a, 32);
         assert_eq_m128i(r, e);
     }
 }