adjust testcase for new logic
This commit is contained in:
Manuel Drehwald
parent
7eae36f017
commit
35ce8ab120
2 changed files with 59 additions and 61 deletions
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@ -12,8 +12,7 @@
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// CHECK: define{{( dso_local)?}} void @main()
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// CHECK-NOT: define
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// CHECK: %EmptyDesc = alloca %struct.__tgt_bin_desc, align 8
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// CHECK-NEXT: %.offload_baseptrs = alloca [1 x ptr], align 8
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// CHECK: %.offload_baseptrs = alloca [1 x ptr], align 8
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// CHECK-NEXT: %.offload_ptrs = alloca [1 x ptr], align 8
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// CHECK-NEXT: %.offload_sizes = alloca [1 x i64], align 8
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// CHECK-NEXT: %kernel_args = alloca %struct.__tgt_kernel_arguments, align 8
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@ -2,9 +2,10 @@
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//@ no-prefer-dynamic
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//@ needs-offload
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// This test is verifying that we generate __tgt_target_data_*_mapper before and after a call to the
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// kernel_1. Better documentation to what each global or variable means is available in the gpu
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// offload code, or the LLVM offload documentation.
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// This test is verifying that we generate __tgt_target_data_*_mapper before and after a call to
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// __tgt_target_kernel, and initialize all needed variables. It also verifies some related globals.
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// Better documentation to what each global or variable means is available in the gpu offload code,
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// or the LLVM offload documentation.
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#![feature(rustc_attrs)]
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#![feature(core_intrinsics)]
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@ -17,10 +18,8 @@ fn main() {
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core::hint::black_box(&x);
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}
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#[unsafe(no_mangle)]
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#[inline(never)]
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pub fn kernel_1(x: &mut [f32; 256]) {
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core::intrinsics::offload(_kernel_1, [256, 1, 1], [32, 1, 1], (x,))
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core::intrinsics::offload(kernel_1, [256, 1, 1], [32, 1, 1], (x,))
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}
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#[unsafe(no_mangle)]
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@ -33,75 +32,75 @@ pub fn _kernel_1(x: &mut [f32; 256]) {
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// CHECK: %struct.ident_t = type { i32, i32, i32, i32, ptr }
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// CHECK: %struct.__tgt_offload_entry = type { i64, i16, i16, i32, ptr, ptr, i64, i64, ptr }
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// CHECK: %struct.__tgt_bin_desc = type { i32, ptr, ptr, ptr }
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// CHECK: %struct.__tgt_kernel_arguments = type { i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, i64, i64, [3 x i32], [3 x i32], i32 }
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// CHECK: @anon.{{.*}}.0 = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00", align 1
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// CHECK: @anon.{{.*}}.1 = private unnamed_addr constant %struct.ident_t { i32 0, i32 2, i32 0, i32 22, ptr @anon.{{.*}}.0 }, align 8
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// CHECK: @anon.[[ID:.*]].0 = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00", align 1
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// CHECK: @anon.{{.*}}.1 = private unnamed_addr constant %struct.ident_t { i32 0, i32 2, i32 0, i32 22, ptr @anon.[[ID]].0 }, align 8
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// CHECK: @.offload_sizes._kernel_1 = private unnamed_addr constant [1 x i64] [i64 1024]
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// CHECK: @.offload_maptypes._kernel_1 = private unnamed_addr constant [1 x i64] [i64 35]
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// CHECK: @._kernel_1.region_id = internal constant i8 0
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// CHECK: @.offloading.entry_name._kernel_1 = internal unnamed_addr constant [10 x i8] c"_kernel_1\00", section ".llvm.rodata.offloading", align 1
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// CHECK: @.offloading.entry._kernel_1 = internal constant %struct.__tgt_offload_entry { i64 0, i16 1, i16 1, i32 0, ptr @._kernel_1.region_id, ptr @.offloading.entry_name._kernel_1, i64 0, i64 0, ptr null }, section "llvm_offload_entries", align 8
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// CHECK-DAG: @.omp_offloading.descriptor = internal constant { i32, ptr, ptr, ptr } zeroinitializer
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// CHECK-DAG: @llvm.global_ctors = appending constant [1 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 101, ptr @.omp_offloading.descriptor_reg, ptr null }]
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// CHECK-DAG: @.offload_sizes.[[K:[^ ]*kernel_1]] = private unnamed_addr constant [1 x i64] [i64 1024]
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// CHECK-DAG: @.offload_maptypes.[[K]] = private unnamed_addr constant [1 x i64] [i64 35]
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// CHECK-DAG: @.[[K]].region_id = internal constant i8 0
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// CHECK-DAG: @.offloading.entry_name.[[K]] = internal unnamed_addr constant [{{[0-9]+}} x i8] c"[[K]]{{\\00}}", section ".llvm.rodata.offloading", align 1
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// CHECK-DAG: @.offloading.entry.[[K]] = internal constant %struct.__tgt_offload_entry { i64 0, i16 1, i16 1, i32 0, ptr @.[[K]].region_id, ptr @.offloading.entry_name.[[K]], i64 0, i64 0, ptr null }, section "llvm_offload_entries", align 8
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// CHECK: declare i32 @__tgt_target_kernel(ptr, i64, i32, i32, ptr, ptr)
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// CHECK: declare void @__tgt_register_lib(ptr) local_unnamed_addr
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// CHECK: declare void @__tgt_unregister_lib(ptr) local_unnamed_addr
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// CHECK: define{{( dso_local)?}} void @main()
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// CHECK-LABEL: define{{( dso_local)?}} void @main()
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// CHECK-NEXT: start:
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// CHECK-NEXT: %0 = alloca [8 x i8], align 8
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// CHECK-NEXT: %x = alloca [1024 x i8], align 16
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// CHECK: call void @kernel_1(ptr noalias noundef nonnull align 4 dereferenceable(1024) %x)
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// CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %0)
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// CHECK-NEXT: store ptr %x, ptr %0, align 8
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// CHECK-NEXT: call void asm sideeffect "", "r,~{memory}"(ptr nonnull %0)
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// CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %0)
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// CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 1024, ptr nonnull %x)
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// CHECK-NEXT: ret void
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// CHECK-NEXT: }
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// CHECK: define{{( dso_local)?}} void @kernel_1(ptr noalias noundef align 4 dereferenceable(1024) %x)
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// CHECK-NEXT: start:
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// CHECK-NEXT: %EmptyDesc = alloca %struct.__tgt_bin_desc, align 8
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// CHECK-NEXT: %0 = alloca [8 x i8], align 8
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// CHECK-NEXT: %x = alloca [1024 x i8], align 16
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// CHECK-NEXT: %.offload_baseptrs = alloca [1 x ptr], align 8
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// CHECK-NEXT: %.offload_ptrs = alloca [1 x ptr], align 8
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// CHECK-NEXT: %.offload_sizes = alloca [1 x i64], align 8
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// CHECK-NEXT: %kernel_args = alloca %struct.__tgt_kernel_arguments, align 8
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// CHECK-NEXT: %dummy = load volatile ptr, ptr @.offload_sizes._kernel_1, align 8
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// CHECK-NEXT: %dummy1 = load volatile ptr, ptr @.offloading.entry._kernel_1, align 8
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// CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %EmptyDesc, i8 0, i64 32, i1 false)
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// CHECK-NEXT: call void @__tgt_register_lib(ptr nonnull %EmptyDesc)
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// CHECK: %dummy = load volatile ptr, ptr @.offload_sizes.[[K]], align 8
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// CHECK-NEXT: %dummy1 = load volatile ptr, ptr @.offloading.entry.[[K]], align 8
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// CHECK-NEXT: call void @__tgt_init_all_rtls()
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// CHECK-NEXT: store ptr %x, ptr %.offload_baseptrs, align 8
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// CHECK-NEXT: store ptr %x, ptr %.offload_ptrs, align 8
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// CHECK-NEXT: store i64 1024, ptr %.offload_sizes, align 8
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// CHECK-NEXT: call void @__tgt_target_data_begin_mapper(ptr nonnull @anon.{{.*}}.1, i64 -1, i32 1, ptr nonnull %.offload_baseptrs, ptr nonnull %.offload_ptrs, ptr nonnull %.offload_sizes, ptr nonnull @.offload_maptypes._kernel_1, ptr null, ptr null)
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// CHECK-NEXT: call void @__tgt_target_data_begin_mapper(ptr nonnull @anon.{{.*}}.1, i64 -1, i32 1, ptr nonnull %.offload_baseptrs, ptr nonnull %.offload_ptrs, ptr nonnull %.offload_sizes, ptr nonnull @.offload_maptypes.[[K]], ptr null, ptr null)
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// CHECK-NEXT: store i32 3, ptr %kernel_args, align 8
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// CHECK-NEXT: %0 = getelementptr inbounds nuw i8, ptr %kernel_args, i64 4
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// CHECK-NEXT: store i32 1, ptr %0, align 4
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// CHECK-NEXT: %1 = getelementptr inbounds nuw i8, ptr %kernel_args, i64 8
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// CHECK-NEXT: store ptr %.offload_baseptrs, ptr %1, align 8
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// CHECK-NEXT: %2 = getelementptr inbounds nuw i8, ptr %kernel_args, i64 16
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// CHECK-NEXT: store ptr %.offload_ptrs, ptr %2, align 8
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// CHECK-NEXT: %3 = getelementptr inbounds nuw i8, ptr %kernel_args, i64 24
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// CHECK-NEXT: store ptr %.offload_sizes, ptr %3, align 8
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// CHECK-NEXT: %4 = getelementptr inbounds nuw i8, ptr %kernel_args, i64 32
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// CHECK-NEXT: store ptr @.offload_maptypes._kernel_1, ptr %4, align 8
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// CHECK-NEXT: %5 = getelementptr inbounds nuw i8, ptr %kernel_args, i64 40
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// CHECK-NEXT: %6 = getelementptr inbounds nuw i8, ptr %kernel_args, i64 72
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// CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %5, i8 0, i64 32, i1 false)
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// CHECK-NEXT: store <4 x i32> <i32 256, i32 1, i32 1, i32 32>, ptr %6, align 8
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// CHECK-NEXT: %.fca.1.gep5 = getelementptr inbounds nuw i8, ptr %kernel_args, i64 88
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// CHECK-NEXT: store i32 1, ptr %.fca.1.gep5, align 8
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// CHECK-NEXT: %.fca.2.gep7 = getelementptr inbounds nuw i8, ptr %kernel_args, i64 92
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// CHECK-NEXT: store i32 1, ptr %.fca.2.gep7, align 4
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// CHECK-NEXT: %7 = getelementptr inbounds nuw i8, ptr %kernel_args, i64 96
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// CHECK-NEXT: store i32 0, ptr %7, align 8
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// CHECK-NEXT: %8 = call i32 @__tgt_target_kernel(ptr nonnull @anon.{{.*}}.1, i64 -1, i32 256, i32 32, ptr nonnull @._kernel_1.region_id, ptr nonnull %kernel_args)
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// CHECK-NEXT: call void @__tgt_target_data_end_mapper(ptr nonnull @anon.{{.*}}.1, i64 -1, i32 1, ptr nonnull %.offload_baseptrs, ptr nonnull %.offload_ptrs, ptr nonnull %.offload_sizes, ptr nonnull @.offload_maptypes._kernel_1, ptr null, ptr null)
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// CHECK-NEXT: call void @__tgt_unregister_lib(ptr nonnull %EmptyDesc)
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// CHECK-NEXT: [[P4:%[^ ]+]] = getelementptr inbounds nuw i8, ptr %kernel_args, i64 4
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// CHECK-NEXT: store i32 1, ptr [[P4]], align 4
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// CHECK-NEXT: [[P8:%[^ ]+]] = getelementptr inbounds nuw i8, ptr %kernel_args, i64 8
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// CHECK-NEXT: store ptr %.offload_baseptrs, ptr [[P8]], align 8
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// CHECK-NEXT: [[P16:%[^ ]+]] = getelementptr inbounds nuw i8, ptr %kernel_args, i64 16
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// CHECK-NEXT: store ptr %.offload_ptrs, ptr [[P16]], align 8
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// CHECK-NEXT: [[P24:%[^ ]+]] = getelementptr inbounds nuw i8, ptr %kernel_args, i64 24
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// CHECK-NEXT: store ptr %.offload_sizes, ptr [[P24]], align 8
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// CHECK-NEXT: [[P32:%[^ ]+]] = getelementptr inbounds nuw i8, ptr %kernel_args, i64 32
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// CHECK-NEXT: store ptr @.offload_maptypes.[[K]], ptr [[P32]], align 8
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// CHECK-NEXT: [[P40:%[^ ]+]] = getelementptr inbounds nuw i8, ptr %kernel_args, i64 40
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// CHECK-NEXT: [[P72:%[^ ]+]] = getelementptr inbounds nuw i8, ptr %kernel_args, i64 72
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// CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) [[P40]], i8 0, i64 32, i1 false)
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// CHECK-NEXT: store <4 x i32> <i32 256, i32 1, i32 1, i32 32>, ptr [[P72]], align 8
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// CHECK-NEXT: [[P88:%[^ ]+]] = getelementptr inbounds nuw i8, ptr %kernel_args, i64 88
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// CHECK-NEXT: store i32 1, ptr [[P88]], align 8
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// CHECK-NEXT: [[P92:%[^ ]+]] = getelementptr inbounds nuw i8, ptr %kernel_args, i64 92
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// CHECK-NEXT: store i32 1, ptr [[P92]], align 4
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// CHECK-NEXT: [[P96:%[^ ]+]] = getelementptr inbounds nuw i8, ptr %kernel_args, i64 96
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// CHECK-NEXT: store i32 0, ptr [[P96]], align 8
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// CHECK-NEXT: {{%[^ ]+}} = call i32 @__tgt_target_kernel(ptr nonnull @anon.{{.*}}.1, i64 -1, i32 256, i32 32, ptr nonnull @.[[K]].region_id, ptr nonnull %kernel_args)
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// CHECK-NEXT: call void @__tgt_target_data_end_mapper(ptr nonnull @anon.{{.*}}.1, i64 -1, i32 1, ptr nonnull %.offload_baseptrs, ptr nonnull %.offload_ptrs, ptr nonnull %.offload_sizes, ptr nonnull @.offload_maptypes.[[K]], ptr null, ptr null)
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// CHECK: ret void
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// CHECK-NEXT: }
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// CHECK: declare void @__tgt_register_lib(ptr) local_unnamed_addr
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// CHECK: declare void @__tgt_unregister_lib(ptr) local_unnamed_addr
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// CHECK-LABEL: define internal void @.omp_offloading.descriptor_reg() section ".text.startup" {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: call void @__tgt_register_lib(ptr nonnull @.omp_offloading.descriptor)
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// CHECK-NEXT: %0 = {{tail }}call i32 @atexit(ptr nonnull @.omp_offloading.descriptor_unreg)
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// CHECK-NEXT: ret void
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// CHECK-NEXT: }
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// CHECK-LABEL: define internal void @.omp_offloading.descriptor_unreg() section ".text.startup" {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: call void @__tgt_unregister_lib(ptr nonnull @.omp_offloading.descriptor)
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// CHECK-NEXT: ret void
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// CHECK-NEXT: }
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