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Merge pull request #2004 from folkertdev/arm-ld1-read

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aarch64: use `read_unaligned` for `vld1_*`
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Sayantan Chakraborty 2026-02-10 14:18:57 +00:00 • committed by GitHub
commit 3e0724784b
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2 changed files with 266 additions and 560 deletions
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734
library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs
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92
library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml
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@ -2603,8 +2603,8 @@ intrinsics:
return_type: "{neon_type[1]}"
attr:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld1]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1]]}]]
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld]]}]]
- *neon-not-arm-stable
- *neon-cfg-arm-unstable
safety:
@ -2617,13 +2617,12 @@ intrinsics:
- ["*const f32", float32x2x4_t]
- ["*const f32", float32x4x4_t]
compose:
- LLVMLink:
name: "vld1x{neon_type[1].tuple}.{neon_type[1]}"
links:
- link: "llvm.aarch64.neon.ld1x{neon_type[1].tuple}.v{neon_type[1].lane}f{neon_type[1].base}.p0"
arch: aarch64,arm64ec
- link: "llvm.arm.neon.vld1x{neon_type[1].tuple}.v{neon_type[1].lane}f{neon_type[1].base}.p0"
arch: arm
- FnCall:
- 'crate::ptr::read_unaligned'
- - MethodCall:
- a
- cast
- []
- name: "vld1{neon_type[1].no}"
doc: "Load multiple single-element structures to one, two, three, or four registers"
@ -2631,8 +2630,8 @@ intrinsics:
return_type: "{neon_type[1]}"
attr:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld1]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1]]}]]
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld]]}]]
- *neon-not-arm-stable
- *neon-cfg-arm-unstable
safety:
@ -2663,13 +2662,12 @@ intrinsics:
- ["*const i64", int64x2x3_t]
- ["*const i64", int64x2x4_t]
compose:
- LLVMLink:
name: "ld1x{neon_type[1].tuple}.{neon_type[1]}"
links:
- link: "llvm.aarch64.neon.ld1x{neon_type[1].tuple}.v{neon_type[1].lane}i{neon_type[1].base}.p0"
arch: aarch64,arm64ec
- link: "llvm.arm.neon.vld1x{neon_type[1].tuple}.v{neon_type[1].lane}i{neon_type[1].base}.p0"
arch: arm
- FnCall:
- 'crate::ptr::read_unaligned'
- - MethodCall:
- a
- cast
- []
- name: "vld1{neon_type[1].no}"
doc: "Load multiple single-element structures to one, two, three, or four registers"
@ -2677,8 +2675,8 @@ intrinsics:
return_type: "{neon_type[1]}"
attr:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld1]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1]]}]]
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld]]}]]
- *neon-not-arm-stable
- *neon-cfg-arm-unstable
big_endian_inverse: false
@ -2723,12 +2721,11 @@ intrinsics:
- ["*const p16", poly16x8x4_t, int16x8x4_t]
compose:
- FnCall:
- transmute
- - FnCall:
- "vld1{neon_type[2].no}"
- - FnCall:
- transmute
- - a
- 'crate::ptr::read_unaligned'
- - MethodCall:
- a
- cast
- []
- name: "vld1{neon_type[1].no}"
doc: "Load multiple single-element structures to one, two, three, or four registers"
@ -2738,7 +2735,7 @@ intrinsics:
- *neon-aes
- *neon-v8
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld]]}]]
- *neon-not-arm-stable
- *neon-cfg-arm-unstable
big_endian_inverse: false
@ -2752,12 +2749,11 @@ intrinsics:
- ["*const p64", poly64x2x4_t, int64x2x4_t]
compose:
- FnCall:
- transmute
- - FnCall:
- "vld1{neon_type[2].no}"
- - FnCall:
- transmute
- - a
- 'crate::ptr::read_unaligned'
- - MethodCall:
- a
- cast
- []
- name: "vld1{neon_type[1].no}"
doc: "Load multiple single-element structures to one, two, three, or four registers"
@ -2766,8 +2762,8 @@ intrinsics:
attr:
- *neon-aes
- *neon-v8
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld1]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1]]}]]
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld]]}]]
- *neon-not-arm-stable
- *neon-cfg-arm-unstable
safety:
@ -2776,12 +2772,11 @@ intrinsics:
- ["*const p64", poly64x1x2_t, int64x1x2_t]
compose:
- FnCall:
- transmute
- - FnCall:
- "vld1{neon_type[2].no}"
- - FnCall:
- transmute
- - a
- 'crate::ptr::read_unaligned'
- - MethodCall:
- a
- cast
- []
- name: "vld1{neon_type[1].no}"
doc: "Load multiple single-element structures to one, two, three, or four registers"
@ -2790,7 +2785,7 @@ intrinsics:
attr:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld1]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld]]}]]
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
@ -2804,13 +2799,12 @@ intrinsics:
- ["*const f16", float16x4x4_t]
- ["*const f16", float16x8x4_t]
compose:
- LLVMLink:
name: "vld1x{neon_type[1].tuple}.{neon_type[1]}"
links:
- link: "llvm.aarch64.neon.ld1x{neon_type[1].tuple}.v{neon_type[1].lane}f{neon_type[1].base}.p0"
arch: aarch64,arm64ec
- link: "llvm.arm.neon.vld1x{neon_type[1].tuple}.v{neon_type[1].lane}f{neon_type[1].base}.p0"
arch: arm
- FnCall:
- 'crate::ptr::read_unaligned'
- - MethodCall:
- a
- cast
- []
- name: "vld1{type[2]}_{neon_type[1]}"
doc: "Load one single-element structure to one lane of one register"