From 669359530ec3dcfa5c1cc8d9afd80813a246f09b Mon Sep 17 00:00:00 2001
From: antoyo <antoyo@users.noreply.github.com>
Date: Mon, 11 Oct 2021 10:56:08 -0400
Subject: [PATCH 001/997] Add missing cast and change some bitcasts to casts to
 avoid a gimple verification failure (#100)

---
 Readme.md            |  2 ++
 src/back/write.rs    | 24 ++++++++++++------------
 src/intrinsic/mod.rs | 32 +++++++++++++++++++++-----------
 3 files changed, 35 insertions(+), 23 deletions(-)

diff --git a/Readme.md b/Readme.md
index 709d93c6edb0..1fcfb5f6e20a 100644
--- a/Readme.md
+++ b/Readme.md
@@ -111,6 +111,8 @@ Or add a breakpoint to `add_error` in gdb and print the line number using:
 p loc->m_line
 ```
 
+To get the `rustc` command to run in `gdb`, add the `--verbose` flag to `cargo build`.
+
 ### How to use a custom-build rustc
 
  * Build the stage2 compiler (`rustup toolchain link debug-current build/x86_64-unknown-linux-gnu/stage2`).
diff --git a/src/back/write.rs b/src/back/write.rs
index c3e3847823d9..6cbce3c76dd2 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -1,4 +1,4 @@
-use std::fs;
+use std::{env, fs};
 
 use gccjit::OutputKind;
 use rustc_codegen_ssa::{CompiledModule, ModuleCodegen};
@@ -42,17 +42,17 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, _diag_han
                 let _timer = cgcx
                     .prof
                     .generic_activity_with_arg("LLVM_module_codegen_emit_obj", &module.name[..]);
-                match &*module.name {
-                    "std_example.7rcbfp3g-cgu.15" => {
-                        println!("Dumping reproducer {}", module.name);
-                        let _ = fs::create_dir("/tmp/reproducers");
-                        // FIXME(antoyo): segfault in dump_reproducer_to_file() might be caused by
-                        // transmuting an rvalue to an lvalue.
-                        // Segfault is actually in gcc::jit::reproducer::get_identifier_as_lvalue
-                        context.dump_reproducer_to_file(&format!("/tmp/reproducers/{}.c", module.name));
-                        println!("Dumped reproducer {}", module.name);
-                    },
-                    _ => (),
+                if env::var("CG_GCCJIT_DUMP_MODULE_NAMES").as_deref() == Ok("1") {
+                    println!("Module {}", module.name);
+                }
+                if env::var("CG_GCCJIT_DUMP_MODULE").as_deref() == Ok(&module.name) {
+                    println!("Dumping reproducer {}", module.name);
+                    let _ = fs::create_dir("/tmp/reproducers");
+                    // FIXME(antoyo): segfault in dump_reproducer_to_file() might be caused by
+                    // transmuting an rvalue to an lvalue.
+                    // Segfault is actually in gcc::jit::reproducer::get_identifier_as_lvalue
+                    context.dump_reproducer_to_file(&format!("/tmp/reproducers/{}.c", module.name));
+                    println!("Dumped reproducer {}", module.name);
                 }
                 context.compile_to_file(OutputKind::ObjectFile, obj_out.to_str().expect("path to str"));
             }
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 375d422cb25c..1034eb75991e 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -525,7 +525,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         let value =
             if result_type.is_signed(self.cx) {
-                self.context.new_bitcast(None, value, typ)
+                self.context.new_cast(None, value, typ)
             }
             else {
                 value
@@ -689,7 +689,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 },
             };
 
-        self.context.new_bitcast(None, result, result_type)
+        self.context.new_cast(None, result, result_type)
     }
 
     fn count_leading_zeroes(&self, width: u64, arg: RValue<'gcc>) -> RValue<'gcc> {
@@ -740,6 +740,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let not_low = self.context.new_unary_op(None, UnaryOp::LogicalNegate, self.u64_type, low);
                 let not_low_and_not_high = not_low & not_high;
                 let index = not_high + not_low_and_not_high;
+                // NOTE: the following cast is necessary to avoid a GIMPLE verification failure in
+                // gcc.
+                // TODO(antoyo): do the correct verification in libgccjit to avoid an error at the
+                // compilation stage.
+                let index = self.context.new_cast(None, index, self.i32_type);
 
                 let res = self.context.new_array_access(None, result, index);
 
@@ -763,7 +768,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let arg =
             if result_type.is_signed(self.cx) {
                 let new_type = result_type.to_unsigned(self.cx);
-                self.context.new_bitcast(None, arg, new_type)
+                self.context.new_cast(None, arg, new_type)
             }
             else {
                 arg
@@ -815,10 +820,15 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let not_high = self.context.new_unary_op(None, UnaryOp::LogicalNegate, self.u64_type, high);
                 let not_low_and_not_high = not_low & not_high;
                 let index = not_low + not_low_and_not_high;
+                // NOTE: the following cast is necessary to avoid a GIMPLE verification failure in
+                // gcc.
+                // TODO(antoyo): do the correct verification in libgccjit to avoid an error at the
+                // compilation stage.
+                let index = self.context.new_cast(None, index, self.i32_type);
 
                 let res = self.context.new_array_access(None, result, index);
 
-                return self.context.new_bitcast(None, res, result_type);
+                return self.context.new_cast(None, res, result_type);
             }
             else {
                 unimplemented!("count_trailing_zeroes for {:?}", arg_type);
@@ -832,7 +842,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 arg
             };
         let res = self.context.new_call(None, count_trailing_zeroes, &[arg]);
-        self.context.new_bitcast(None, res, result_type)
+        self.context.new_cast(None, res, result_type)
     }
 
     fn int_width(&self, typ: Type<'gcc>) -> i64 {
@@ -846,7 +856,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         let value =
             if result_type.is_signed(self.cx) {
-                self.context.new_bitcast(None, value, value_type)
+                self.context.new_cast(None, value, value_type)
             }
             else {
                 value
@@ -862,7 +872,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let low = self.context.new_cast(None, value, self.cx.ulonglong_type);
             let low = self.context.new_call(None, popcount, &[low]);
             let res = high + low;
-            return self.context.new_bitcast(None, res, result_type);
+            return self.context.new_cast(None, res, result_type);
         }
 
         // First step.
@@ -887,7 +897,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let value = left + right;
 
         if value_type.is_u8(&self.cx) {
-            return self.context.new_bitcast(None, value, result_type);
+            return self.context.new_cast(None, value, result_type);
         }
 
         // Fourth step.
@@ -898,7 +908,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let value = left + right;
 
         if value_type.is_u16(&self.cx) {
-            return self.context.new_bitcast(None, value, result_type);
+            return self.context.new_cast(None, value, result_type);
         }
 
         // Fifth step.
@@ -909,7 +919,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let value = left + right;
 
         if value_type.is_u32(&self.cx) {
-            return self.context.new_bitcast(None, value, result_type);
+            return self.context.new_cast(None, value, result_type);
         }
 
         // Sixth step.
@@ -919,7 +929,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let right = shifted & mask;
         let value = left + right;
 
-        self.context.new_bitcast(None, value, result_type)
+        self.context.new_cast(None, value, result_type)
     }
 
     // Algorithm from: https://blog.regehr.org/archives/1063

From 863cfb2d635188a42114a3f7578acbfa645f48ae Mon Sep 17 00:00:00 2001
From: Fisher Darling <fdarlingco@gmail.com>
Date: Tue, 12 Oct 2021 09:39:14 -0700
Subject: [PATCH 002/997] Fix FIXME in `Builder::and` and `Builder::or` impls
 (#101)

* impl bitwise and & or
---
 src/builder.rs | 17 ++++++-----------
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index ac908418ee4b..0ccb38b8047a 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -605,22 +605,17 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn and(&mut self, a: RValue<'gcc>, mut b: RValue<'gcc>) -> RValue<'gcc> {
-        // FIXME(antoyo): hack by putting the result in a variable to workaround this bug:
-        // https://gcc.gnu.org/bugzilla//show_bug.cgi?id=95498
         if a.get_type() != b.get_type() {
             b = self.context.new_cast(None, b, a.get_type());
         }
-        let res = self.current_func().new_local(None, b.get_type(), "andResult");
-        self.llbb().add_assignment(None, res, a & b);
-        res.to_rvalue()
+        a & b
     }
 
-    fn or(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        // FIXME(antoyo): hack by putting the result in a variable to workaround this bug:
-        // https://gcc.gnu.org/bugzilla//show_bug.cgi?id=95498
-        let res = self.current_func().new_local(None, b.get_type(), "orResult");
-        self.llbb().add_assignment(None, res, a | b);
-        res.to_rvalue()
+    fn or(&mut self, a: RValue<'gcc>, mut b: RValue<'gcc>) -> RValue<'gcc> {
+        if a.get_type() != b.get_type() {
+            b = self.context.new_cast(None, b, a.get_type());
+        }
+        a | b
     }
 
     fn xor(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {

From 1d064f1741641ef66f8fe03965349a26b6939545 Mon Sep 17 00:00:00 2001
From: antoyo <antoyo@users.noreply.github.com>
Date: Mon, 25 Oct 2021 17:48:15 -0400
Subject: [PATCH 003/997] Disable strict aliasing (#104)

---
 src/base.rs | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/base.rs b/src/base.rs
index 9fd043607fc7..bb0f325faaa3 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -77,7 +77,10 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol) -> (Modul
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
         }
+        // NOTE: an optimization (https://github.com/rust-lang/rustc_codegen_gcc/issues/53).
         context.add_command_line_option("-fno-semantic-interposition");
+        // NOTE: Rust relies on LLVM not doing TBAA (https://github.com/rust-lang/unsafe-code-guidelines/issues/292).
+        context.add_command_line_option("-fno-strict-aliasing");
         if env::var("CG_GCCJIT_DUMP_CODE").as_deref() == Ok("1") {
             context.set_dump_code_on_compile(true);
         }

From fc8e79fea9d0eef9b8c945d86cd4313a5438cd19 Mon Sep 17 00:00:00 2001
From: antoyo <antoyo@users.noreply.github.com>
Date: Sat, 30 Oct 2021 18:21:33 -0400
Subject: [PATCH 004/997] Sync from rust (#107)

* Rebase fallout.

* Move rustc_middle::middle::cstore to rustc_session.

* Create more accurate debuginfo for vtables.

Before this commit all vtables would have the same name "vtable" in
debuginfo. Now they get a name that identifies the implementing type
and the trait that is being implemented.

* Remove alloc::prelude

As per the libs team decision in #58935.

Closes #58935

* Make hash_result an Option.

* Properly check `target_features` not to trigger an assertion

* Add LLVM CFI support to the Rust compiler

This commit adds LLVM Control Flow Integrity (CFI) support to the Rust
compiler. It initially provides forward-edge control flow protection for
Rust-compiled code only by aggregating function pointers in groups
identified by their number of arguments.

Forward-edge control flow protection for C or C++ and Rust -compiled
code "mixed binaries" (i.e., for when C or C++ and Rust -compiled code
share the same virtual address space) will be provided in later work as
part of this project by defining and using compatible type identifiers
(see Type metadata in the design document in the tracking issue #89653).

LLVM CFI can be enabled with -Zsanitizer=cfi and requires LTO (i.e.,
-Clto).

* Update to nightly-2021-10-30

* Add deduplication of constant values as rustc relies on LLVM doing that

Co-authored-by: Camille GILLOT <gillot.camille@gmail.com>
Co-authored-by: Michael Woerister <michaelwoerister@posteo>
Co-authored-by: Amanieu d'Antras <amanieu@gmail.com>
Co-authored-by: Yuki Okushi <yuki.okushi@huawei.com>
Co-authored-by: Ramon de C Valle <rcvalle@users.noreply.github.com>
---
 example/alloc_example.rs |  4 ++--
 rust-toolchain           |  2 +-
 src/archive.rs           |  5 ++---
 src/asm.rs               |  2 +-
 src/base.rs              | 12 +++++++++---
 src/builder.rs           | 10 ++++++++++
 src/consts.rs            | 10 +++++++---
 src/debuginfo.rs         |  4 ++--
 src/intrinsic/mod.rs     |  5 +++++
 src/lib.rs               |  2 +-
 10 files changed, 40 insertions(+), 16 deletions(-)

diff --git a/example/alloc_example.rs b/example/alloc_example.rs
index bc6dd007ba01..74ea7ec4ede6 100644
--- a/example/alloc_example.rs
+++ b/example/alloc_example.rs
@@ -1,10 +1,10 @@
-#![feature(start, box_syntax, core_intrinsics, alloc_prelude, alloc_error_handler)]
+#![feature(start, box_syntax, core_intrinsics, alloc_error_handler)]
 #![no_std]
 
 extern crate alloc;
 extern crate alloc_system;
 
-use alloc::prelude::v1::*;
+use alloc::boxed::Box;
 
 use alloc_system::System;
 
diff --git a/rust-toolchain b/rust-toolchain
index d311a33f807b..3f315e099762 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1 +1 @@
-nightly-2021-09-28
+nightly-2021-10-30
diff --git a/src/archive.rs b/src/archive.rs
index d749d763402b..11dd6d49aa76 100644
--- a/src/archive.rs
+++ b/src/archive.rs
@@ -1,12 +1,11 @@
 use std::fs::File;
 use std::path::{Path, PathBuf};
 
-use rustc_session::Session;
 use rustc_codegen_ssa::back::archive::ArchiveBuilder;
+use rustc_session::Session;
 
 use rustc_data_structures::temp_dir::MaybeTempDir;
-use rustc_middle::middle::cstore::DllImport;
-
+use rustc_session::cstore::DllImport;
 
 struct ArchiveConfig<'a> {
     sess: &'a Session,
diff --git a/src/asm.rs b/src/asm.rs
index 3b77097e9ad0..7c3ed3c5ee9d 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -118,7 +118,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         true
     }
 
-    fn codegen_inline_asm(&mut self, template: &[InlineAsmTemplatePiece], rust_operands: &[InlineAsmOperandRef<'tcx, Self>], options: InlineAsmOptions, _span: &[Span]) {
+    fn codegen_inline_asm(&mut self, template: &[InlineAsmTemplatePiece], rust_operands: &[InlineAsmOperandRef<'tcx, Self>], options: InlineAsmOptions, _span: &[Span], _instance: Instance<'_>) {
         let asm_arch = self.tcx.sess.asm_arch.unwrap();
         let is_x86 = matches!(asm_arch, InlineAsmArch::X86 | InlineAsmArch::X86_64);
         let att_dialect = is_x86 && options.contains(InlineAsmOptions::ATT_SYNTAX);
diff --git a/src/base.rs b/src/base.rs
index bb0f325faaa3..e861658a0946 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -7,7 +7,6 @@ use gccjit::{
     GlobalKind,
 };
 use rustc_middle::dep_graph;
-use rustc_middle::middle::cstore::EncodedMetadata;
 use rustc_middle::middle::exported_symbols;
 use rustc_middle::ty::TyCtxt;
 use rustc_middle::mir::mono::Linkage;
@@ -15,6 +14,7 @@ use rustc_codegen_ssa::{ModuleCodegen, ModuleKind};
 use rustc_codegen_ssa::base::maybe_create_entry_wrapper;
 use rustc_codegen_ssa::mono_item::MonoItemExt;
 use rustc_codegen_ssa::traits::DebugInfoMethods;
+use rustc_metadata::EncodedMetadata;
 use rustc_session::config::DebugInfo;
 use rustc_span::Symbol;
 
@@ -59,7 +59,13 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol) -> (Modul
     let start_time = Instant::now();
 
     let dep_node = tcx.codegen_unit(cgu_name).codegen_dep_node(tcx);
-    let (module, _) = tcx.dep_graph.with_task(dep_node, tcx, cgu_name, module_codegen, dep_graph::hash_result);
+    let (module, _) = tcx.dep_graph.with_task(
+        dep_node,
+        tcx,
+        cgu_name,
+        module_codegen,
+        Some(dep_graph::hash_result),
+    );
     let time_to_codegen = start_time.elapsed();
     drop(prof_timer);
 
@@ -152,7 +158,7 @@ pub fn write_compressed_metadata<'tcx>(tcx: TyCtxt<'tcx>, metadata: &EncodedMeta
 
     let context = &gcc_module.context;
     let mut compressed = rustc_metadata::METADATA_HEADER.to_vec();
-    FrameEncoder::new(&mut compressed).write_all(&metadata.raw_data).unwrap();
+    FrameEncoder::new(&mut compressed).write_all(&metadata.raw_data()).unwrap();
 
     let name = exported_symbols::metadata_symbol_name(tcx);
     let typ = context.new_array_type(None, context.new_type::<u8>(), compressed.len() as i32);
diff --git a/src/builder.rs b/src/builder.rs
index 0ccb38b8047a..58b7f8cb8e97 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -910,6 +910,16 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // TODO(antoyo)
     }
 
+    fn type_metadata(&mut self, _function: RValue<'gcc>, _typeid: String) {
+        // Unsupported.
+    }
+
+    fn typeid_metadata(&mut self, _typeid: String) -> RValue<'gcc> {
+        // Unsupported.
+        self.context.new_rvalue_from_int(self.int_type, 0)
+    }
+
+
     fn store(&mut self, val: RValue<'gcc>, ptr: RValue<'gcc>, align: Align) -> RValue<'gcc> {
         self.store_with_flags(val, ptr, align, MemFlags::empty())
     }
diff --git a/src/consts.rs b/src/consts.rs
index 205498acc318..628901269655 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -31,9 +31,13 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
 impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
     fn static_addr_of(&self, cv: RValue<'gcc>, align: Align, kind: Option<&str>) -> RValue<'gcc> {
-        if let Some(global_value) = self.const_globals.borrow().get(&cv) {
-            // TODO(antoyo): upgrade alignment.
-            return *global_value;
+        // TODO(antoyo): implement a proper rvalue comparison in libgccjit instead of doing the
+        // following:
+        for (value, variable) in &*self.const_globals.borrow() {
+            if format!("{:?}", value) == format!("{:?}", cv) {
+                // TODO(antoyo): upgrade alignment.
+                return *variable;
+            }
         }
         let global_value = self.static_addr_of_mut(cv, align, kind);
         // TODO(antoyo): set global constant.
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index 4d3b4f04bade..31959fa19c58 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -2,7 +2,7 @@ use gccjit::RValue;
 use rustc_codegen_ssa::mir::debuginfo::{FunctionDebugContext, VariableKind};
 use rustc_codegen_ssa::traits::{DebugInfoBuilderMethods, DebugInfoMethods};
 use rustc_middle::mir;
-use rustc_middle::ty::{Instance, Ty};
+use rustc_middle::ty::{Instance, PolyExistentialTraitRef, Ty};
 use rustc_span::{SourceFile, Span, Symbol};
 use rustc_target::abi::Size;
 use rustc_target::abi::call::FnAbi;
@@ -31,7 +31,7 @@ impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods for Builder<'a, 'gcc, 'tcx> {
 }
 
 impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
-    fn create_vtable_metadata(&self, _ty: Ty<'tcx>, _vtable: Self::Value) {
+    fn create_vtable_metadata(&self, _ty: Ty<'tcx>, _trait_ref: Option<PolyExistentialTraitRef<'tcx>>, _vtable: Self::Value) {
         // TODO(antoyo)
     }
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 1034eb75991e..5c7ec711ad71 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -367,6 +367,11 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         // TODO(antoyo)
     }
 
+    fn type_test(&mut self, _pointer: Self::Value, _typeid: Self::Value) -> Self::Value {
+        // Unsupported.
+        self.context.new_rvalue_from_int(self.int_type, 0)
+    }
+
     fn va_start(&mut self, _va_list: RValue<'gcc>) -> RValue<'gcc> {
         unimplemented!();
     }
diff --git a/src/lib.rs b/src/lib.rs
index f3c02e2634ff..629003d7982b 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -60,8 +60,8 @@ use rustc_codegen_ssa::target_features::supported_target_features;
 use rustc_codegen_ssa::traits::{CodegenBackend, ExtraBackendMethods, ModuleBufferMethods, ThinBufferMethods, WriteBackendMethods};
 use rustc_data_structures::fx::FxHashMap;
 use rustc_errors::{ErrorReported, Handler};
+use rustc_metadata::EncodedMetadata;
 use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
-use rustc_middle::middle::cstore::EncodedMetadata;
 use rustc_middle::ty::TyCtxt;
 use rustc_session::config::{Lto, OptLevel, OutputFilenames};
 use rustc_session::Session;

From 08183f9f2d6b438faf5771ee6a7e87dff03b4723 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sun, 31 Oct 2021 17:17:13 +0100
Subject: [PATCH 005/997] Remove unused dependency on object (#102)

---
 Cargo.lock | 43 -------------------------------------------
 Cargo.toml |  5 -----
 2 files changed, 48 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 60a2101c689c..e794bc621140 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -17,12 +17,6 @@ version = "0.8.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "450575f58f7bee32816abbff470cbc47797397c2a81e0eaced4b98436daf52e1"
 
-[[package]]
-name = "autocfg"
-version = "1.0.1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "cdb031dd78e28731d87d56cc8ffef4a8f36ca26c38fe2de700543e627f8a464a"
-
 [[package]]
 name = "bitflags"
 version = "1.3.2"
@@ -35,15 +29,6 @@ version = "1.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd"
 
-[[package]]
-name = "crc32fast"
-version = "1.2.1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "81156fece84ab6a9f2afdb109ce3ae577e42b1228441eded99bd77f627953b1a"
-dependencies = [
- "cfg-if",
-]
-
 [[package]]
 name = "fm"
 version = "0.1.4"
@@ -89,12 +74,6 @@ dependencies = [
  "wasi",
 ]
 
-[[package]]
-name = "hashbrown"
-version = "0.11.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ab5ef0d4909ef3724cc8cce6ccc8572c5c817592e9285f5464f8e86f8bd3726e"
-
 [[package]]
 name = "hermit-abi"
 version = "0.1.19"
@@ -104,16 +83,6 @@ dependencies = [
  "libc 0.2.102",
 ]
 
-[[package]]
-name = "indexmap"
-version = "1.7.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bc633605454125dec4b66843673f01c7df2b89479b32e0ed634e43a91cff62a5"
-dependencies = [
- "autocfg",
- "hashbrown",
-]
-
 [[package]]
 name = "lang_tester"
 version = "0.3.13"
@@ -158,17 +127,6 @@ dependencies = [
  "libc 0.2.102",
 ]
 
-[[package]]
-name = "object"
-version = "0.25.3"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a38f2be3697a57b4060074ff41b44c16870d916ad7877c17696e063257482bc7"
-dependencies = [
- "crc32fast",
- "indexmap",
- "memchr",
-]
-
 [[package]]
 name = "ppv-lite86"
 version = "0.2.10"
@@ -257,7 +215,6 @@ dependencies = [
  "ar",
  "gccjit",
  "lang_tester",
- "object",
  "target-lexicon",
  "tempfile",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 9e8c195c15f6..21f0bfbf69d7 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -23,11 +23,6 @@ target-lexicon = "0.10.0"
 
 ar = "0.8.0"
 
-[dependencies.object]
-version = "0.25.0"
-default-features = false
-features = ["read", "std", "write"] # We don't need WASM support.
-
 [dev-dependencies]
 lang_tester = "0.3.9"
 tempfile = "3.1.0"

From ebe6f6785c5f3ba6c2a18876829774bc215476f5 Mon Sep 17 00:00:00 2001
From: antoyo <antoyo@users.noreply.github.com>
Date: Sun, 31 Oct 2021 14:27:52 -0400
Subject: [PATCH 006/997] Fix negation operation (#108)

---
 src/builder.rs | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 58b7f8cb8e97..17a8a4acc242 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -623,8 +623,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn neg(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        // TODO(antoyo): use new_unary_op()?
-        self.cx.context.new_rvalue_from_long(a.get_type(), 0) - a
+        self.cx.context.new_unary_op(None, UnaryOp::Minus, a.get_type(), a)
     }
 
     fn fneg(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {

From ddb015a09e9512a035b5c2017feb65d8b9a44bd8 Mon Sep 17 00:00:00 2001
From: antoyo <antoyo@users.noreply.github.com>
Date: Wed, 15 Dec 2021 22:06:16 -0500
Subject: [PATCH 007/997] Fix discarded in-out constraint in inline asm (#110)

Fixes #109
---
 src/asm.rs       | 111 ++++++++++++++++++++++-------------------------
 tests/run/asm.rs |  27 +++++++++---
 2 files changed, 73 insertions(+), 65 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 7c3ed3c5ee9d..2d3cde7b69e4 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -18,30 +18,30 @@ use crate::type_of::LayoutGccExt;
 
 // Rust asm! and GCC Extended Asm semantics differ substantially.
 //
-// 1. Rust asm operands go along as one list of operands. Operands themselves indicate 
-//    if they're "in" or "out". "In" and "out" operands can interleave. One operand can be 
+// 1. Rust asm operands go along as one list of operands. Operands themselves indicate
+//    if they're "in" or "out". "In" and "out" operands can interleave. One operand can be
 //    both "in" and "out" (`inout(reg)`).
 //
-//    GCC asm has two different lists for "in" and "out" operands. In terms of gccjit, 
-//    this means that all "out" operands must go before "in" operands. "In" and "out" operands 
+//    GCC asm has two different lists for "in" and "out" operands. In terms of gccjit,
+//    this means that all "out" operands must go before "in" operands. "In" and "out" operands
 //    cannot interleave.
 //
-// 2. Operand lists in both Rust and GCC are indexed. Index starts from 0. Indexes are important 
+// 2. Operand lists in both Rust and GCC are indexed. Index starts from 0. Indexes are important
 //    because the asm template refers to operands by index.
 //
 //    Mapping from Rust to GCC index would be 1-1 if it wasn't for...
 //
-// 3. Clobbers. GCC has a separate list of clobbers, and clobbers don't have indexes. 
-//    Contrary, Rust expresses clobbers through "out" operands that aren't tied to 
+// 3. Clobbers. GCC has a separate list of clobbers, and clobbers don't have indexes.
+//    Contrary, Rust expresses clobbers through "out" operands that aren't tied to
 //    a variable (`_`),  and such "clobbers" do have index.
 //
-// 4. Furthermore, GCC Extended Asm does not support explicit register constraints 
-//    (like `out("eax")`) directly, offering so-called "local register variables" 
-//    as a workaround. These variables need to be declared and initialized *before* 
-//    the Extended Asm block but *after* normal local variables 
+// 4. Furthermore, GCC Extended Asm does not support explicit register constraints
+//    (like `out("eax")`) directly, offering so-called "local register variables"
+//    as a workaround. These variables need to be declared and initialized *before*
+//    the Extended Asm block but *after* normal local variables
 //    (see comment in `codegen_inline_asm` for explanation).
 //
-// With that in mind, let's see how we translate Rust syntax to GCC 
+// With that in mind, let's see how we translate Rust syntax to GCC
 // (from now on, `CC` stands for "constraint code"):
 //
 // * `out(reg_class) var`   -> translated to output operand: `"=CC"(var)`
@@ -52,18 +52,17 @@ use crate::type_of::LayoutGccExt;
 //
 // * `out("explicit register") _` -> not translated to any operands, register is simply added to clobbers list
 //
-// * `inout(reg_class) in_var => out_var` -> translated to two operands: 
+// * `inout(reg_class) in_var => out_var` -> translated to two operands:
 //                              output: `"=CC"(in_var)`
-//                              input:  `"num"(out_var)` where num is the GCC index 
+//                              input:  `"num"(out_var)` where num is the GCC index
 //                                       of the corresponding output operand
 //
-// * `inout(reg_class) in_var => _` -> same as `inout(reg_class) in_var => tmp`, 
+// * `inout(reg_class) in_var => _` -> same as `inout(reg_class) in_var => tmp`,
 //                                      where "tmp" is a temporary unused variable
 //
-// * `out/in/inout("explicit register") var` -> translated to one or two operands as described above 
-//                                              with `"r"(var)` constraint, 
+// * `out/in/inout("explicit register") var` -> translated to one or two operands as described above
+//                                              with `"r"(var)` constraint,
 //                                              and one register variable assigned to the desired register.
-// 
 
 const ATT_SYNTAX_INS: &str = ".att_syntax noprefix\n\t";
 const INTEL_SYNTAX_INS: &str = "\n\t.intel_syntax noprefix";
@@ -124,7 +123,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         let att_dialect = is_x86 && options.contains(InlineAsmOptions::ATT_SYNTAX);
         let intel_dialect = is_x86 && !options.contains(InlineAsmOptions::ATT_SYNTAX);
 
-        // GCC index of an output operand equals its position in the array 
+        // GCC index of an output operand equals its position in the array
         let mut outputs = vec![];
 
         // GCC index of an input operand equals its position in the array
@@ -138,9 +137,9 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         let mut constants_len = 0;
 
         // There are rules we must adhere to if we want GCC to do the right thing:
-        // 
+        //
         // * Every local variable that the asm block uses as an output must be declared *before*
-        //   the asm block. 
+        //   the asm block.
         // * There must be no instructions whatsoever between the register variables and the asm.
         //
         // Therefore, the backend must generate the instructions strictly in this order:
@@ -152,7 +151,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         // We also must make sure that no input operands are emitted before output operands.
         //
         // This is why we work in passes, first emitting local vars, then local register vars.
-        // Also, we don't emit any asm operands immediately; we save them to 
+        // Also, we don't emit any asm operands immediately; we save them to
         // the one of the buffers to be emitted later.
 
         // 1. Normal variables (and saving operands to buffers).
@@ -165,7 +164,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         (Constraint(constraint), Some(place)) => (constraint, place.layout.gcc_type(self.cx, false)),
                         // When `reg` is a class and not an explicit register but the out place is not specified,
                         // we need to create an unused output variable to assign the output to. This var
-                        // needs to be of a type that's "compatible" with the register class, but specific type 
+                        // needs to be of a type that's "compatible" with the register class, but specific type
                         // doesn't matter.
                         (Constraint(constraint), None) => (constraint, dummy_output_type(self.cx, reg.reg_class())),
                         (Register(_), Some(_)) => {
@@ -193,7 +192,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
 
                     let tmp_var = self.current_func().new_local(None, ty, "output_register");
                     outputs.push(AsmOutOperand {
-                        constraint, 
+                        constraint,
                         rust_idx,
                         late,
                         readwrite: false,
@@ -204,12 +203,12 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
 
                 InlineAsmOperandRef::In { reg, value } => {
                     if let ConstraintOrRegister::Constraint(constraint) = reg_to_gcc(reg) {
-                        inputs.push(AsmInOperand { 
-                            constraint: Cow::Borrowed(constraint), 
-                            rust_idx, 
+                        inputs.push(AsmInOperand {
+                            constraint: Cow::Borrowed(constraint),
+                            rust_idx,
                             val: value.immediate()
                         });
-                    } 
+                    }
                     else {
                         // left for the next pass
                         continue
@@ -219,7 +218,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 InlineAsmOperandRef::InOut { reg, late, in_value, out_place } => {
                     let constraint = if let ConstraintOrRegister::Constraint(constraint) = reg_to_gcc(reg) {
                         constraint
-                    } 
+                    }
                     else {
                         // left for the next pass
                         continue
@@ -228,22 +227,22 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     // Rustc frontend guarantees that input and output types are "compatible",
                     // so we can just use input var's type for the output variable.
                     //
-                    // This decision is also backed by the fact that LLVM needs in and out 
-                    // values to be of *exactly the same type*, not just "compatible". 
+                    // This decision is also backed by the fact that LLVM needs in and out
+                    // values to be of *exactly the same type*, not just "compatible".
                     // I'm not sure if GCC is so picky too, but better safe than sorry.
                     let ty = in_value.layout.gcc_type(self.cx, false);
                     let tmp_var = self.current_func().new_local(None, ty, "output_register");
 
                     // If the out_place is None (i.e `inout(reg) _` syntax was used), we translate
-                    // it to one "readwrite (+) output variable", otherwise we translate it to two 
+                    // it to one "readwrite (+) output variable", otherwise we translate it to two
                     // "out and tied in" vars as described above.
                     let readwrite = out_place.is_none();
                     outputs.push(AsmOutOperand {
-                        constraint, 
+                        constraint,
                         rust_idx,
                         late,
                         readwrite,
-                        tmp_var, 
+                        tmp_var,
                         out_place,
                     });
 
@@ -252,8 +251,8 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         let constraint = Cow::Owned(out_gcc_idx.to_string());
 
                         inputs.push(AsmInOperand {
-                            constraint, 
-                            rust_idx, 
+                            constraint,
+                            rust_idx,
                             val: in_value.immediate()
                         });
                     }
@@ -280,7 +279,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     if let ConstraintOrRegister::Register(reg_name) = reg_to_gcc(reg) {
                         let out_place = if let Some(place) = place {
                             place
-                        } 
+                        }
                         else {
                             // processed in the previous pass
                             continue
@@ -291,7 +290,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         tmp_var.set_register_name(reg_name);
 
                         outputs.push(AsmOutOperand {
-                            constraint: "r".into(), 
+                            constraint: "r".into(),
                             rust_idx,
                             late,
                             readwrite: false,
@@ -311,9 +310,9 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         reg_var.set_register_name(reg_name);
                         self.llbb().add_assignment(None, reg_var, value.immediate());
 
-                        inputs.push(AsmInOperand { 
-                            constraint: "r".into(), 
-                            rust_idx, 
+                        inputs.push(AsmInOperand {
+                            constraint: "r".into(),
+                            rust_idx,
                             val: reg_var.to_rvalue()
                         });
                     }
@@ -324,31 +323,23 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 // `inout("explicit register") in_var => out_var`
                 InlineAsmOperandRef::InOut { reg, late, in_value, out_place } => {
                     if let ConstraintOrRegister::Register(reg_name) = reg_to_gcc(reg) {
-                        let out_place = if let Some(place) = out_place {
-                            place
-                        } 
-                        else {
-                            // processed in the previous pass
-                            continue
-                        };
-
                         // See explanation in the first pass.
                         let ty = in_value.layout.gcc_type(self.cx, false);
                         let tmp_var = self.current_func().new_local(None, ty, "output_register");
                         tmp_var.set_register_name(reg_name);
 
                         outputs.push(AsmOutOperand {
-                            constraint: "r".into(), 
+                            constraint: "r".into(),
                             rust_idx,
                             late,
                             readwrite: false,
                             tmp_var,
-                            out_place: Some(out_place)
+                            out_place,
                         });
 
                         let constraint = Cow::Owned((outputs.len() - 1).to_string());
-                        inputs.push(AsmInOperand { 
-                            constraint, 
+                        inputs.push(AsmInOperand {
+                            constraint,
                             rust_idx,
                             val: in_value.immediate()
                         });
@@ -357,8 +348,8 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     // processed in the previous pass
                 }
 
-                InlineAsmOperandRef::Const { .. } 
-                | InlineAsmOperandRef::SymFn { .. } 
+                InlineAsmOperandRef::Const { .. }
+                | InlineAsmOperandRef::SymFn { .. }
                 | InlineAsmOperandRef::SymStatic { .. } => {
                     // processed in the previous pass
                 }
@@ -453,7 +444,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         if !intel_dialect {
             template_str.push_str(INTEL_SYNTAX_INS);
         }
-        
+
         // 4. Generate Extended Asm block
 
         let block = self.llbb();
@@ -472,7 +463,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         }
 
         if !options.contains(InlineAsmOptions::PRESERVES_FLAGS) {
-            // TODO(@Commeownist): I'm not 100% sure this one clobber is sufficient 
+            // TODO(@Commeownist): I'm not 100% sure this one clobber is sufficient
             // on all architectures. For instance, what about FP stack?
             extended_asm.add_clobber("cc");
         }
@@ -491,10 +482,10 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
             self.call(self.type_void(), builtin_unreachable, &[], None);
         }
 
-        // Write results to outputs. 
+        // Write results to outputs.
         //
         // We need to do this because:
-        //  1. Turning `PlaceRef` into `RValue` is error-prone and has nasty edge cases 
+        //  1. Turning `PlaceRef` into `RValue` is error-prone and has nasty edge cases
         //     (especially with current `rustc_backend_ssa` API).
         //  2. Not every output operand has an `out_place`, and it's required by `add_output_operand`.
         //
@@ -502,7 +493,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         // generates `out_place = tmp_var;` assignments if out_place exists.
         for op in &outputs {
             if let Some(place) = op.out_place {
-                OperandValue::Immediate(op.tmp_var.to_rvalue()).store(self, place);                
+                OperandValue::Immediate(op.tmp_var.to_rvalue()).store(self, place);
             }
         }
 
diff --git a/tests/run/asm.rs b/tests/run/asm.rs
index 9c0055b0b6b5..254d946e5276 100644
--- a/tests/run/asm.rs
+++ b/tests/run/asm.rs
@@ -17,6 +17,16 @@ extern "C" {
     fn add_asm(a: i64, b: i64) -> i64;
 }
 
+pub unsafe fn mem_cpy(dst: *mut u8, src: *const u8, len: usize) {
+    asm!(
+        "rep movsb",
+        inout("rdi") dst => _,
+        inout("rsi") src => _,
+        inout("rcx") len => _,
+        options(preserves_flags, nostack)
+    );
+}
+
 fn main() {
     unsafe {
         asm!("nop");
@@ -62,11 +72,11 @@ fn main() {
     }
     assert_eq!(x, 43);
 
-    // check inout(reg_class) x 
+    // check inout(reg_class) x
     let mut x: u64 = 42;
     unsafe {
         asm!("add {0}, {0}",
-            inout(reg) x 
+            inout(reg) x
         );
     }
     assert_eq!(x, 84);
@@ -75,7 +85,7 @@ fn main() {
     let mut x: u64 = 42;
     unsafe {
         asm!("add r11, r11",
-            inout("r11") x 
+            inout("r11") x
         );
     }
     assert_eq!(x, 84);
@@ -98,12 +108,12 @@ fn main() {
     assert_eq!(res, 7);
     assert_eq!(rem, 2);
 
-    // check const 
+    // check const
     let mut x: u64 = 42;
     unsafe {
         asm!("add {}, {}",
             inout(reg) x,
-            const 1 
+            const 1
         );
     }
     assert_eq!(x, 43);
@@ -150,4 +160,11 @@ fn main() {
     assert_eq!(x, 42);
 
     assert_eq!(unsafe { add_asm(40, 2) }, 42);
+
+    let array1 = [1u8, 2, 3];
+    let mut array2 = [0u8, 0, 0];
+    unsafe {
+        mem_cpy(array2.as_mut_ptr(), array1.as_ptr(), 3);
+    }
+    assert_eq!(array1, array2);
 }

From 2989a25273013dd90c2704b4c0a484c6455b78aa Mon Sep 17 00:00:00 2001
From: antoyo <antoyo@users.noreply.github.com>
Date: Wed, 15 Dec 2021 23:48:10 -0500
Subject: [PATCH 008/997] Feature/global rvalue initialization petter tomner
 (#111)

* Use new initialization functions

* Fix for new reflection patch

* Fix for new TLS patch
---
 Cargo.lock     | 26 +++++++++++++-------------
 src/builder.rs | 29 +++++++++++++++++------------
 src/common.rs  | 14 +++-----------
 src/consts.rs  |  8 ++++----
 src/context.rs | 12 +-----------
 src/type_.rs   |  6 +++---
 6 files changed, 41 insertions(+), 54 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index e794bc621140..47925f72c2cb 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#2d4fea7319f80531b2e5d264fca9f1c498a3a62e"
+source = "git+https://github.com/antoyo/gccjit.rs#0672b78d162d65b6f36ea4062947253affe9fdef"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#2d4fea7319f80531b2e5d264fca9f1c498a3a62e"
+source = "git+https://github.com/antoyo/gccjit.rs#0672b78d162d65b6f36ea4062947253affe9fdef"
 dependencies = [
  "libc 0.1.12",
 ]
@@ -70,7 +70,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "7fcd999463524c52659517fe2cea98493cfe485d10565e7b0fb07dbba7ad2753"
 dependencies = [
  "cfg-if",
- "libc 0.2.102",
+ "libc 0.2.112",
  "wasi",
 ]
 
@@ -80,7 +80,7 @@ version = "0.1.19"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "62b467343b94ba476dcb2500d242dadbb39557df889310ac77c5d99100aaac33"
 dependencies = [
- "libc 0.2.102",
+ "libc 0.2.112",
 ]
 
 [[package]]
@@ -91,7 +91,7 @@ checksum = "96bd995a092cac79868250589869b5a5d656b02a02bd74c8ebdc566dc7203090"
 dependencies = [
  "fm",
  "getopts",
- "libc 0.2.102",
+ "libc 0.2.112",
  "num_cpus",
  "termcolor",
  "threadpool",
@@ -107,9 +107,9 @@ checksum = "e32a70cf75e5846d53a673923498228bbec6a8624708a9ea5645f075d6276122"
 
 [[package]]
 name = "libc"
-version = "0.2.102"
+version = "0.2.112"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a2a5ac8f984bfcf3a823267e5fde638acc3325f6496633a5da6bb6eb2171e103"
+checksum = "1b03d17f364a3a042d5e5d46b053bbbf82c92c9430c592dd4c064dc6ee997125"
 
 [[package]]
 name = "memchr"
@@ -124,14 +124,14 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "05499f3756671c15885fee9034446956fff3f243d6077b91e5767df161f766b3"
 dependencies = [
  "hermit-abi",
- "libc 0.2.102",
+ "libc 0.2.112",
 ]
 
 [[package]]
 name = "ppv-lite86"
-version = "0.2.10"
+version = "0.2.15"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ac74c624d6b2d21f425f752262f42188365d7b8ff1aff74c82e45136510a4857"
+checksum = "ed0cfbc8191465bed66e1718596ee0b0b35d5ee1f41c5df2189d0fe8bde535ba"
 
 [[package]]
 name = "rand"
@@ -139,7 +139,7 @@ version = "0.8.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "2e7573632e6454cf6b99d7aac4ccca54be06da05aca2ef7423d22d27d4d4bcd8"
 dependencies = [
- "libc 0.2.102",
+ "libc 0.2.112",
  "rand_chacha",
  "rand_core",
  "rand_hc",
@@ -241,7 +241,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "dac1c663cfc93810f88aed9b8941d48cabf856a1b111c29a40439018d870eb22"
 dependencies = [
  "cfg-if",
- "libc 0.2.102",
+ "libc 0.2.112",
  "rand",
  "redox_syscall",
  "remove_dir_all",
@@ -278,7 +278,7 @@ version = "0.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "9f200f5b12eb75f8c1ed65abd4b2db8a6e1b138a20de009dacee265a2498f3f6"
 dependencies = [
- "libc 0.2.102",
+ "libc 0.2.112",
 ]
 
 [[package]]
diff --git a/src/builder.rs b/src/builder.rs
index 17a8a4acc242..ccf8123000cf 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -200,7 +200,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     fn check_ptr_call<'b>(&mut self, _typ: &str, func_ptr: RValue<'gcc>, args: &'b [RValue<'gcc>]) -> Cow<'b, [RValue<'gcc>]> {
         let mut all_args_match = true;
         let mut param_types = vec![];
-        let gcc_func = func_ptr.get_type().is_function_ptr_type().expect("function ptr");
+        let gcc_func = func_ptr.get_type().dyncast_function_ptr_type().expect("function ptr");
         for (index, arg) in args.iter().enumerate().take(gcc_func.get_param_count()) {
             let param = gcc_func.get_param_type(index);
             if param != arg.get_type() {
@@ -277,7 +277,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         // gccjit requires to use the result of functions, even when it's not used.
         // That's why we assign the result to a local or call add_eval().
-        let gcc_func = func_ptr.get_type().is_function_ptr_type().expect("function ptr");
+        let gcc_func = func_ptr.get_type().dyncast_function_ptr_type().expect("function ptr");
         let mut return_type = gcc_func.get_return_type();
         let current_block = self.current_block.borrow().expect("block");
         let void_type = self.context.new_type::<()>();
@@ -810,7 +810,10 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let atomic_load = self.context.get_builtin_function(&format!("__atomic_load_{}", size.bytes()));
         let ordering = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
 
-        let volatile_const_void_ptr_type = self.context.new_type::<*mut ()>().make_const().make_volatile();
+        let volatile_const_void_ptr_type = self.context.new_type::<()>()
+            .make_const()
+            .make_volatile()
+            .make_pointer();
         let ptr = self.context.new_cast(None, ptr, volatile_const_void_ptr_type);
         self.context.new_call(None, atomic_load, &[ptr, ordering])
     }
@@ -935,7 +938,9 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // TODO(antoyo): handle alignment.
         let atomic_store = self.context.get_builtin_function(&format!("__atomic_store_{}", size.bytes()));
         let ordering = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
-        let volatile_const_void_ptr_type = self.context.new_type::<*mut ()>().make_const().make_volatile();
+        let volatile_const_void_ptr_type = self.context.new_type::<()>()
+            .make_volatile()
+            .make_pointer();
         let ptr = self.context.new_cast(None, ptr, volatile_const_void_ptr_type);
 
         // FIXME(antoyo): fix libgccjit to allow comparing an integer type with an aligned integer type because
@@ -975,12 +980,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         assert_eq!(idx as usize as u64, idx);
         let value = ptr.dereference(None).to_rvalue();
 
-        if value_type.is_array().is_some() {
+        if value_type.dyncast_array().is_some() {
             let index = self.context.new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
             let element = self.context.new_array_access(None, value, index);
             element.get_address(None)
         }
-        else if let Some(vector_type) = value_type.is_vector() {
+        else if let Some(vector_type) = value_type.dyncast_vector() {
             let array_type = vector_type.get_element_type().make_pointer();
             let array = self.bitcast(ptr, array_type);
             let index = self.context.new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
@@ -1003,7 +1008,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn sext(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): check that it indeed sign extend the value.
-        if dest_ty.is_vector().is_some() {
+        if dest_ty.dyncast_vector().is_some() {
             // TODO(antoyo): nothing to do as it is only for LLVM?
             return value;
         }
@@ -1075,7 +1080,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let right_type = rhs.get_type();
         if left_type != right_type {
             // NOTE: because libgccjit cannot compare function pointers.
-            if left_type.is_function_ptr_type().is_some() && right_type.is_function_ptr_type().is_some() {
+            if left_type.dyncast_function_ptr_type().is_some() && right_type.dyncast_function_ptr_type().is_some() {
                 lhs = self.context.new_cast(None, lhs, self.usize_type.make_pointer());
                 rhs = self.context.new_cast(None, rhs, self.usize_type.make_pointer());
             }
@@ -1183,12 +1188,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         assert_eq!(idx as usize as u64, idx);
         let value_type = aggregate_value.get_type();
 
-        if value_type.is_array().is_some() {
+        if value_type.dyncast_array().is_some() {
             let index = self.context.new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
             let element = self.context.new_array_access(None, aggregate_value, index);
             element.get_address(None)
         }
-        else if value_type.is_vector().is_some() {
+        else if value_type.dyncast_vector().is_some() {
             panic!();
         }
         else if let Some(pointer_type) = value_type.get_pointee() {
@@ -1215,11 +1220,11 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let value_type = aggregate_value.get_type();
 
         let lvalue =
-            if value_type.is_array().is_some() {
+            if value_type.dyncast_array().is_some() {
                 let index = self.context.new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
                 self.context.new_array_access(None, aggregate_value, index)
             }
-            else if value_type.is_vector().is_some() {
+            else if value_type.dyncast_vector().is_some() {
                 panic!();
             }
             else if let Some(pointer_type) = value_type.get_pointee() {
diff --git a/src/common.rs b/src/common.rs
index bda08b653f05..e972a91acede 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -1,5 +1,4 @@
 use std::convert::TryFrom;
-use std::convert::TryInto;
 
 use gccjit::LValue;
 use gccjit::{Block, CType, RValue, Type, ToRValue};
@@ -44,7 +43,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let string = self.context.new_string_literal(&*string);
         let sym = self.generate_local_symbol_name("str");
         let global = self.declare_private_global(&sym, self.val_ty(string));
-        global.global_set_initializer_value(string);
+        global.global_set_initializer_rvalue(string);
         global
         // TODO(antoyo): set linkage.
     }
@@ -79,7 +78,7 @@ pub fn bytes_in_context<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, bytes: &[u8]) ->
         bytes.iter()
         .map(|&byte| context.new_rvalue_from_int(byte_type, byte as i32))
         .collect();
-    context.new_rvalue_from_array(None, typ, &elements)
+    context.new_array_constructor(None, typ, &elements)
 }
 
 pub fn type_is_pointer<'gcc>(typ: Type<'gcc>) -> bool {
@@ -120,13 +119,6 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn const_uint_big(&self, typ: Type<'gcc>, num: u128) -> RValue<'gcc> {
-        let num64: Result<i64, _> = num.try_into();
-        if let Ok(num) = num64 {
-            // FIXME(antoyo): workaround for a bug where libgccjit is expecting a constant.
-            // The operations >> 64 and | low are making the normal case a non-constant.
-            return self.context.new_rvalue_from_long(typ, num as i64);
-        }
-
         if num >> 64 != 0 {
             // FIXME(antoyo): use a new function new_rvalue_from_unsigned_long()?
             let low = self.context.new_rvalue_from_long(self.u64_type, num as u64 as i64);
@@ -193,7 +185,7 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         // TODO(antoyo): cache the type? It's anonymous, so probably not.
         let typ = self.type_struct(&fields, packed);
         let struct_type = typ.is_struct().expect("struct type");
-        self.context.new_rvalue_from_struct(None, struct_type, values)
+        self.context.new_struct_constructor(None, struct_type.as_type(), None, values)
     }
 
     fn const_to_opt_uint(&self, _v: RValue<'gcc>) -> Option<u64> {
diff --git a/src/consts.rs b/src/consts.rs
index 628901269655..ba4589bd8102 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -20,7 +20,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     pub fn const_bitcast(&self, value: RValue<'gcc>, typ: Type<'gcc>) -> RValue<'gcc> {
         if value.get_type() == self.bool_type.make_pointer() {
             if let Some(pointee) = typ.get_pointee() {
-                if pointee.is_vector().is_some() {
+                if pointee.dyncast_vector().is_some() {
                     panic!()
                 }
             }
@@ -81,7 +81,7 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
             else {
                 value
             };
-        global.global_set_initializer_value(value);
+        global.global_set_initializer_rvalue(value);
 
         // As an optimization, all shared statics which do not have interior
         // mutability are placed into read-only memory.
@@ -180,7 +180,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             };
         // FIXME(antoyo): I think the name coming from generate_local_symbol_name() above cannot be used
         // globally.
-        global.global_set_initializer_value(cv);
+        global.global_set_initializer_rvalue(cv);
         // TODO(antoyo): set unnamed address.
         global.get_address(None)
     }
@@ -375,7 +375,7 @@ fn check_and_apply_linkage<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, attrs: &Codeg
         real_name.push_str(&sym);
         let global2 = cx.define_global(&real_name, llty, is_tls, attrs.link_section);
         // TODO(antoyo): set linkage.
-        global2.global_set_initializer_value(global1.get_address(None));
+        global2.global_set_initializer_rvalue(global1.get_address(None));
         // TODO(antoyo): use global_set_initializer() when it will work.
         global2
     }
diff --git a/src/context.rs b/src/context.rs
index 7677ade7314e..dfcd1b623121 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -1,16 +1,6 @@
 use std::cell::{Cell, RefCell};
 
-use gccjit::{
-    Block,
-    Context,
-    CType,
-    Function,
-    FunctionType,
-    LValue,
-    RValue,
-    Struct,
-    Type,
-};
+use gccjit::{Block, CType, Context, Function, FunctionType, LValue, RValue, Struct, Type};
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::traits::{
     BackendTypes,
diff --git a/src/type_.rs b/src/type_.rs
index 3545e1b62810..28e2adc492bb 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -122,7 +122,7 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         if typ.is_integral() {
             TypeKind::Integer
         }
-        else if typ.is_vector().is_some() {
+        else if typ.dyncast_vector().is_some() {
             TypeKind::Vector
         }
         else {
@@ -141,10 +141,10 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn element_type(&self, ty: Type<'gcc>) -> Type<'gcc> {
-        if let Some(typ) = ty.is_array() {
+        if let Some(typ) = ty.dyncast_array() {
             typ
         }
-        else if let Some(vector_type) = ty.is_vector() {
+        else if let Some(vector_type) = ty.dyncast_vector() {
             vector_type.get_element_type()
         }
         else if let Some(typ) = ty.get_pointee() {

From 049b6aeba4e9b89dd5ed6990609d50926af8db86 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Thu, 30 Dec 2021 15:26:08 +0100
Subject: [PATCH 009/997] Rustup to rustc 1.59.0-nightly (78fd0f633 2021-12-29)

---
 rust-toolchain | 2 +-
 src/base.rs    | 2 --
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/rust-toolchain b/rust-toolchain
index 3f315e099762..ee0822f6c314 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1 +1 @@
-nightly-2021-10-30
+nightly-2021-12-30
diff --git a/src/base.rs b/src/base.rs
index c6df250d2fd2..8b23e96066ee 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -7,14 +7,12 @@ use gccjit::{
     GlobalKind,
 };
 use rustc_middle::dep_graph;
-use rustc_middle::middle::exported_symbols;
 use rustc_middle::ty::TyCtxt;
 use rustc_middle::mir::mono::Linkage;
 use rustc_codegen_ssa::{ModuleCodegen, ModuleKind};
 use rustc_codegen_ssa::base::maybe_create_entry_wrapper;
 use rustc_codegen_ssa::mono_item::MonoItemExt;
 use rustc_codegen_ssa::traits::DebugInfoMethods;
-use rustc_metadata::EncodedMetadata;
 use rustc_session::config::DebugInfo;
 use rustc_span::Symbol;
 

From 31482a94a0694f829023e31471d53e3821ccabf5 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Thu, 30 Dec 2021 15:36:30 +0100
Subject: [PATCH 010/997] Import std::arch::asm

---
 tests/run/asm.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tests/run/asm.rs b/tests/run/asm.rs
index 42572bdedf00..9a24915edcd1 100644
--- a/tests/run/asm.rs
+++ b/tests/run/asm.rs
@@ -3,6 +3,8 @@
 // Run-time:
 //   status: 0
 
+use std::arch::{asm, global_asm};
+
 global_asm!("
     .global add_asm
 add_asm:

From a2c5d29fc95c23be146ddb3858ecef2c2ce0eecc Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Thu, 30 Dec 2021 16:28:53 +0100
Subject: [PATCH 011/997] Add missing feature gate

---
 tests/run/asm.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tests/run/asm.rs b/tests/run/asm.rs
index 9a24915edcd1..46abbb553bf2 100644
--- a/tests/run/asm.rs
+++ b/tests/run/asm.rs
@@ -3,6 +3,8 @@
 // Run-time:
 //   status: 0
 
+#![feature(asm_const, asm_sym)]
+
 use std::arch::{asm, global_asm};
 
 global_asm!("

From d7fb7aa76dce64e71e4d37285901654bb898c754 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Thu, 30 Dec 2021 16:57:11 +0100
Subject: [PATCH 012/997] Disable portable-simd test

Support for portable-simd isn't implemented yet
---
 ...0024-core-Disable-portable-simd-test.patch | 24 +++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 patches/0024-core-Disable-portable-simd-test.patch

diff --git a/patches/0024-core-Disable-portable-simd-test.patch b/patches/0024-core-Disable-portable-simd-test.patch
new file mode 100644
index 000000000000..8954f91021f4
--- /dev/null
+++ b/patches/0024-core-Disable-portable-simd-test.patch
@@ -0,0 +1,24 @@
+From b1ae000f6da1abd3b8e9b80c40bc11c89b8ae93c Mon Sep 17 00:00:00 2001
+From: bjorn3 <bjorn3@users.noreply.github.com>
+Date: Thu, 30 Dec 2021 16:54:40 +0100
+Subject: [PATCH] [core] Disable portable-simd test
+
+---
+ library/core/tests/lib.rs | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
+index ec70034..7cd9e21 100644
+--- a/library/core/tests/lib.rs
++++ b/library/core/tests/lib.rs
+@@ -121,7 +121,6 @@ mod pattern;
+ mod pin;
+ mod ptr;
+ mod result;
+-mod simd;
+ mod slice;
+ mod str;
+ mod str_lossy;
+-- 
+2.26.2.7.g19db9cfb68
+

From 0afd01283784c42906462fd0aee3ba116766983e Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Thu, 30 Dec 2021 17:50:52 +0100
Subject: [PATCH 013/997] Disable long running libcore tests

These only finish in reasonable time with optimizations enabled.

This patch file is copied from cg_clif.
---
 ...0028-core-Disable-long-running-tests.patch | 30 +++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100644 patches/0028-core-Disable-long-running-tests.patch

diff --git a/patches/0028-core-Disable-long-running-tests.patch b/patches/0028-core-Disable-long-running-tests.patch
new file mode 100644
index 000000000000..bf74a74c7c4b
--- /dev/null
+++ b/patches/0028-core-Disable-long-running-tests.patch
@@ -0,0 +1,30 @@
+From 0ffdd8eda8df364391c8ac6e1ce92c73ba9254d4 Mon Sep 17 00:00:00 2001
+From: bjorn3 <bjorn3@users.noreply.github.com>
+Date: Fri, 3 Dec 2021 12:16:30 +0100
+Subject: [PATCH] Disable long running tests
+
+---
+ library/core/tests/slice.rs | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/library/core/tests/slice.rs b/library/core/tests/slice.rs
+index 2c8f00a..44847ee 100644
+--- a/library/core/tests/slice.rs
++++ b/library/core/tests/slice.rs
+@@ -2332,7 +2332,8 @@ macro_rules! empty_max_mut {
+     };
+ }
+ 
++/*
+ #[cfg(not(miri))] // Comparing usize::MAX many elements takes forever in Miri (and in rustc without optimizations)
+ take_tests! {
+     slice: &[(); usize::MAX], method: take,
+     (take_in_bounds_max_range_to, (..usize::MAX), Some(EMPTY_MAX), &[(); 0]),
+@@ -2345,3 +2347,4 @@ take_tests! {
+     (take_mut_oob_max_range_to_inclusive, (..=usize::MAX), None, empty_max_mut!()),
+     (take_mut_in_bounds_max_range_from, (usize::MAX..), Some(&mut [] as _), empty_max_mut!()),
+ }
++*/
+-- 
+2.26.2.7.g19db9cfb68
+

From 92fbc8f591c5c3869c207e499d2341301fc46078 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Thu, 30 Dec 2021 18:16:04 +0100
Subject: [PATCH 014/997] Ignore new failing test_is_sorted test

---
 patches/0023-core-Ignore-failing-tests.patch | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/patches/0023-core-Ignore-failing-tests.patch b/patches/0023-core-Ignore-failing-tests.patch
index ee5ba449fb8e..73e9c858caf2 100644
--- a/patches/0023-core-Ignore-failing-tests.patch
+++ b/patches/0023-core-Ignore-failing-tests.patch
@@ -46,4 +46,24 @@ index 4bc44e9..8e3c7a4 100644
  
  #[test]
  fn cell_allows_array_cycle() {
+diff --git a/library/core/tests/slice.rs b/library/core/tests/slice.rs
+index 3e00e0a..8e5663b 100644
+--- a/library/core/tests/slice.rs
++++ b/library/core/tests/slice.rs
+@@ -2108,6 +2108,7 @@ fn test_copy_within_panics_src_out_of_bounds() {
+     bytes.copy_within(usize::MAX..=usize::MAX, 0);
+ }
+ 
++/*
+ #[test]
+ fn test_is_sorted() {
+     let empty: [i32; 0] = [];
+@@ -2122,6 +2123,7 @@ fn test_is_sorted() {
+     assert!(!["c", "bb", "aaa"].is_sorted());
+     assert!(["c", "bb", "aaa"].is_sorted_by_key(|s| s.len()));
+ }
++*/
+ 
+ #[test]
+ fn test_slice_run_destructors() {
 -- 2.21.0 (Apple Git-122)

From 1411a98352ba6bee8ba3b0131c9243e5db1e6a2e Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Thu, 30 Dec 2021 19:27:11 +0100
Subject: [PATCH 015/997] Remove unnecessary report_symbol_names call (#113)

rustc_interface already calls it for you
---
 src/lib.rs | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/lib.rs b/src/lib.rs
index 30a33b99e505..034558a879db 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -91,8 +91,6 @@ impl CodegenBackend for GccCodegenBackend {
         let target_cpu = target_cpu(tcx.sess);
         let res = codegen_crate(self.clone(), tcx, target_cpu.to_string(), metadata, need_metadata_module);
 
-        rustc_symbol_mangling::test::report_symbol_names(tcx);
-
         Box::new(res)
     }
 

From e690fb12731eb5f86d4c88400a344f65607af385 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 15 Jan 2022 08:57:34 -0500
Subject: [PATCH 016/997] Add comment

---
 src/lib.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/lib.rs b/src/lib.rs
index 20347f187868..9b62bf418377 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -1,6 +1,6 @@
 /*
  * TODO(antoyo): support #[inline] attributes.
- * TODO(antoyo): support LTO.
+ * TODO(antoyo): support LTO (gcc's equivalent to Thin LTO is enabled by -fwhopr: https://stackoverflow.com/questions/64954525/does-gcc-have-thin-lto).
  *
  * TODO(antoyo): remove the patches.
  */

From cd5d42aad743d49a368d9e65d678be72387808c7 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sun, 23 Jan 2022 19:39:55 +0100
Subject: [PATCH 017/997] Correctly import foreign statics

Previously foreign statics would actually cause a local static to be
defined and exported. This issue was found because std::env::vars() was
found to return no env vars despite many being defined. This was caused
by libstd importing environ as foreign static. The accidental definition
of environ caused libstd to read a null pointer which was interpreted as
there being no environment variables at all.

Also fix tests. STDOUT is not defined by libc. The correct name is stdout.
This previously worked as STDOUT was incorrectly defined as null pointer
during codegen.
---
 src/consts.rs             | 12 +++++++++---
 src/declare.rs            |  6 +++---
 tests/run/assign.rs       |  4 ++--
 tests/run/int_overflow.rs |  4 ++--
 tests/run/mut_ref.rs      |  4 ++--
 tests/run/operations.rs   |  4 ++--
 6 files changed, 20 insertions(+), 14 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index ba4589bd8102..e55da7952e75 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -1,4 +1,4 @@
-use gccjit::{LValue, RValue, ToRValue, Type};
+use gccjit::{GlobalKind, LValue, RValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{BaseTypeMethods, ConstMethods, DerivedTypeMethods, StaticMethods};
 use rustc_hir as hir;
 use rustc_hir::Node;
@@ -218,7 +218,13 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
                         }
 
                         let is_tls = fn_attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-                        let global = self.declare_global(&sym, llty, is_tls, fn_attrs.link_section);
+                        let global = self.declare_global(
+                            &sym,
+                            llty,
+                            GlobalKind::Exported,
+                            is_tls,
+                            fn_attrs.link_section,
+                        );
 
                         if !self.tcx.is_reachable_non_generic(def_id) {
                             // TODO(antoyo): set visibility.
@@ -389,6 +395,6 @@ fn check_and_apply_linkage<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, attrs: &Codeg
         // don't do this then linker errors can be generated where the linker
         // complains that one object files has a thread local version of the
         // symbol and another one doesn't.
-        cx.declare_global(&sym, llty, is_tls, attrs.link_section)
+        cx.declare_global(&sym, llty, GlobalKind::Imported, is_tls, attrs.link_section)
     }
 }
diff --git a/src/declare.rs b/src/declare.rs
index dbee505a4977..ec6f8ea4dde0 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -22,7 +22,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             global
         }
         else {
-            self.declare_global(name, ty, is_tls, link_section)
+            self.declare_global(name, ty, GlobalKind::Exported, is_tls, link_section)
         }
     }
 
@@ -47,8 +47,8 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         unsafe { std::mem::transmute(func) }
     }*/
 
-    pub fn declare_global(&self, name: &str, ty: Type<'gcc>, is_tls: bool, link_section: Option<Symbol>) -> LValue<'gcc> {
-        let global = self.context.new_global(None, GlobalKind::Exported, ty, name);
+    pub fn declare_global(&self, name: &str, ty: Type<'gcc>, global_kind: GlobalKind, is_tls: bool, link_section: Option<Symbol>) -> LValue<'gcc> {
+        let global = self.context.new_global(None, global_kind, ty, name);
         if is_tls {
             global.set_tls_model(self.tls_model);
         }
diff --git a/tests/run/assign.rs b/tests/run/assign.rs
index cc8647006ca6..eb38a8a38357 100644
--- a/tests/run/assign.rs
+++ b/tests/run/assign.rs
@@ -51,7 +51,7 @@ mod libc {
         pub fn fflush(stream: *mut i32) -> i32;
         pub fn printf(format: *const i8, ...) -> i32;
 
-        pub static STDOUT: *mut i32;
+        pub static stdout: *mut i32;
     }
 }
 
@@ -67,7 +67,7 @@ mod intrinsics {
 pub fn panic(_msg: &str) -> ! {
     unsafe {
         libc::puts("Panicking\0" as *const str as *const u8);
-        libc::fflush(libc::STDOUT);
+        libc::fflush(libc::stdout);
         intrinsics::abort();
     }
 }
diff --git a/tests/run/int_overflow.rs b/tests/run/int_overflow.rs
index 7111703ca253..6477b8398280 100644
--- a/tests/run/int_overflow.rs
+++ b/tests/run/int_overflow.rs
@@ -49,7 +49,7 @@ mod libc {
         pub fn puts(s: *const u8) -> i32;
         pub fn fflush(stream: *mut i32) -> i32;
 
-        pub static STDOUT: *mut i32;
+        pub static stdout: *mut i32;
     }
 }
 
@@ -65,7 +65,7 @@ mod intrinsics {
 pub fn panic(_msg: &str) -> ! {
     unsafe {
         libc::puts("Panicking\0" as *const str as *const u8);
-        libc::fflush(libc::STDOUT);
+        libc::fflush(libc::stdout);
         intrinsics::abort();
     }
 }
diff --git a/tests/run/mut_ref.rs b/tests/run/mut_ref.rs
index e8876009cc61..52de20021f3e 100644
--- a/tests/run/mut_ref.rs
+++ b/tests/run/mut_ref.rs
@@ -53,7 +53,7 @@ mod libc {
         pub fn fflush(stream: *mut i32) -> i32;
         pub fn printf(format: *const i8, ...) -> i32;
 
-        pub static STDOUT: *mut i32;
+        pub static stdout: *mut i32;
     }
 }
 
@@ -69,7 +69,7 @@ mod intrinsics {
 pub fn panic(_msg: &str) -> ! {
     unsafe {
         libc::puts("Panicking\0" as *const str as *const u8);
-        libc::fflush(libc::STDOUT);
+        libc::fflush(libc::stdout);
         intrinsics::abort();
     }
 }
diff --git a/tests/run/operations.rs b/tests/run/operations.rs
index 4dc375309e42..e078b37b4aba 100644
--- a/tests/run/operations.rs
+++ b/tests/run/operations.rs
@@ -59,7 +59,7 @@ mod libc {
         pub fn puts(s: *const u8) -> i32;
         pub fn fflush(stream: *mut i32) -> i32;
 
-        pub static STDOUT: *mut i32;
+        pub static stdout: *mut i32;
     }
 }
 
@@ -75,7 +75,7 @@ mod intrinsics {
 pub fn panic(_msg: &str) -> ! {
     unsafe {
         libc::puts("Panicking\0" as *const str as *const u8);
-        libc::fflush(libc::STDOUT);
+        libc::fflush(libc::stdout);
         intrinsics::abort();
     }
 }

From 6663f4e78e001fe711011ea9df7a0692a73a7695 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Mon, 24 Jan 2022 19:45:38 +0100
Subject: [PATCH 018/997] Move rustup component installation to rust-toolchain

This allows cargo check to function correctly without having to first
run prepare_build.sh. cg_clif has been using rust-toolchain too for a
while now.
---
 cargo.sh         | 2 +-
 prepare_build.sh | 1 -
 rust-toolchain   | 4 +++-
 test.sh          | 2 +-
 4 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/cargo.sh b/cargo.sh
index 1001c522052c..332f365ce0ce 100755
--- a/cargo.sh
+++ b/cargo.sh
@@ -8,7 +8,7 @@ pushd $(dirname "$0") >/dev/null
 source config.sh
 
 # read nightly compiler from rust-toolchain file
-TOOLCHAIN=$(cat rust-toolchain)
+TOOLCHAIN=$(cat rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
 
 popd >/dev/null
 
diff --git a/prepare_build.sh b/prepare_build.sh
index ccf535098301..3896775a0b9d 100755
--- a/prepare_build.sh
+++ b/prepare_build.sh
@@ -1,5 +1,4 @@
 #!/bin/bash --verbose
 set -e
 
-rustup component add rust-src rustc-dev llvm-tools-preview
 ./build_sysroot/prepare_sysroot_src.sh
diff --git a/rust-toolchain b/rust-toolchain
index ee0822f6c314..cab94c0b8cfa 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1 +1,3 @@
-nightly-2021-12-30
+[toolchain]
+channel = "nightly-2021-12-30"
+components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
diff --git a/test.sh b/test.sh
index 944d0ce516e0..70bd86edcbe2 100755
--- a/test.sh
+++ b/test.sh
@@ -145,7 +145,7 @@ function test_rustc() {
     echo
     echo "[TEST] rust-lang/rust"
 
-    rust_toolchain=$(cat rust-toolchain)
+    rust_toolchain=$(cat rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
 
     git clone https://github.com/rust-lang/rust.git || true
     cd rust

From 5dc660b10647823842dfe3d8865b4802c7ab90f9 Mon Sep 17 00:00:00 2001
From: antoyo <antoyo@users.noreply.github.com>
Date: Wed, 26 Jan 2022 08:57:17 -0500
Subject: [PATCH 019/997] Support upgrading the alignment of a global variable
 (#121)

* Renable failing test
* Update to newest gccjit.rs
---
 Cargo.lock                                   |  4 ++--
 patches/0023-core-Ignore-failing-tests.patch | 20 --------------------
 src/consts.rs                                | 11 +++++++++--
 src/context.rs                               |  4 ++++
 4 files changed, 15 insertions(+), 24 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 47925f72c2cb..2688ea4a4e14 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#0672b78d162d65b6f36ea4062947253affe9fdef"
+source = "git+https://github.com/antoyo/gccjit.rs#e68fce53af18dce4d40e6b7090f881ff86a2e892"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#0672b78d162d65b6f36ea4062947253affe9fdef"
+source = "git+https://github.com/antoyo/gccjit.rs#e68fce53af18dce4d40e6b7090f881ff86a2e892"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/patches/0023-core-Ignore-failing-tests.patch b/patches/0023-core-Ignore-failing-tests.patch
index 73e9c858caf2..ee5ba449fb8e 100644
--- a/patches/0023-core-Ignore-failing-tests.patch
+++ b/patches/0023-core-Ignore-failing-tests.patch
@@ -46,24 +46,4 @@ index 4bc44e9..8e3c7a4 100644
  
  #[test]
  fn cell_allows_array_cycle() {
-diff --git a/library/core/tests/slice.rs b/library/core/tests/slice.rs
-index 3e00e0a..8e5663b 100644
---- a/library/core/tests/slice.rs
-+++ b/library/core/tests/slice.rs
-@@ -2108,6 +2108,7 @@ fn test_copy_within_panics_src_out_of_bounds() {
-     bytes.copy_within(usize::MAX..=usize::MAX, 0);
- }
- 
-+/*
- #[test]
- fn test_is_sorted() {
-     let empty: [i32; 0] = [];
-@@ -2122,6 +2123,7 @@ fn test_is_sorted() {
-     assert!(!["c", "bb", "aaa"].is_sorted());
-     assert!(["c", "bb", "aaa"].is_sorted_by_key(|s| s.len()));
- }
-+*/
- 
- #[test]
- fn test_slice_run_destructors() {
 -- 2.21.0 (Apple Git-122)
diff --git a/src/consts.rs b/src/consts.rs
index e55da7952e75..af00539f89b5 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -35,7 +35,12 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
         // following:
         for (value, variable) in &*self.const_globals.borrow() {
             if format!("{:?}", value) == format!("{:?}", cv) {
-                // TODO(antoyo): upgrade alignment.
+                if let Some(global_variable) = self.global_lvalues.borrow().get(variable) {
+                    let alignment = align.bits() as i32;
+                    if alignment > global_variable.get_alignment() {
+                        global_variable.set_alignment(alignment);
+                    }
+                }
                 return *variable;
             }
         }
@@ -182,7 +187,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         // globally.
         global.global_set_initializer_rvalue(cv);
         // TODO(antoyo): set unnamed address.
-        global.get_address(None)
+        let rvalue = global.get_address(None);
+        self.global_lvalues.borrow_mut().insert(rvalue, global);
+        rvalue
     }
 
     pub fn get_static(&self, def_id: DefId) -> LValue<'gcc> {
diff --git a/src/context.rs b/src/context.rs
index dfcd1b623121..d260a9833470 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -83,6 +83,9 @@ pub struct CodegenCx<'gcc, 'tcx> {
 
     /// Cache of emitted const globals (value -> global)
     pub const_globals: RefCell<FxHashMap<RValue<'gcc>, RValue<'gcc>>>,
+    /// Map from the address of a global variable (rvalue) to the global variable itself (lvalue).
+    /// TODO(antoyo): remove when the rustc API is fixed.
+    pub global_lvalues: RefCell<FxHashMap<RValue<'gcc>, LValue<'gcc>>>,
 
     /// Cache of constant strings,
     pub const_cstr_cache: RefCell<FxHashMap<Symbol, LValue<'gcc>>>,
@@ -195,6 +198,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             function_instances: Default::default(),
             vtables: Default::default(),
             const_globals: Default::default(),
+            global_lvalues: Default::default(),
             const_cstr_cache: Default::default(),
             globals: Default::default(),
             scalar_types: Default::default(),

From 99941cd9d26c3ef2d53ecdb4f7563367d66ca3c1 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Tue, 25 Jan 2022 18:16:17 +0100
Subject: [PATCH 020/997] Support -Zfunction-sections

This puts every function and data object in their own section. This
allows the linker to omit unused functions and data objects with
--gc-sections.

On linux this shrinks a hello world binary without optimizations
(neither sysroot nor binary) from 17MB to 13MB. It shrinks a hello world
binary with only sysroot optimizations from 14MB to 13MB. For comparison
cg_llvm produces a 3.5MB debug mode hello world binary with an optimized
sysroot. Cg_clif produces a 10MB debug mode hello world binary without
an optimized sysroot.
---
 src/base.rs | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/base.rs b/src/base.rs
index 8b23e96066ee..45e791a99d60 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -85,6 +85,12 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol) -> (Modul
         context.add_command_line_option("-fno-semantic-interposition");
         // NOTE: Rust relies on LLVM not doing TBAA (https://github.com/rust-lang/unsafe-code-guidelines/issues/292).
         context.add_command_line_option("-fno-strict-aliasing");
+
+        if tcx.sess.opts.debugging_opts.function_sections.unwrap_or(tcx.sess.target.function_sections) {
+            context.add_command_line_option("-ffunction-sections");
+            context.add_command_line_option("-fdata-sections");
+        }
+
         if env::var("CG_GCCJIT_DUMP_CODE").as_deref() == Ok("1") {
             context.set_dump_code_on_compile(true);
         }

From 41f20fa3a5c0cce3c9e56a1d05ed1c22ccfa8818 Mon Sep 17 00:00:00 2001
From: antoyo <antoyo@users.noreply.github.com>
Date: Sun, 30 Jan 2022 21:45:14 -0500
Subject: [PATCH 021/997] Support 128-bit integers on platforms without native
 support (#103)

* Use sized integer types

* Add support for integer types not supported on some platforms

* Add feature to test non-native integers in CI
---
 .github/workflows/{main.yml => ci.yml} |  17 +-
 .gitignore                             |   1 +
 Cargo.lock                             |   4 +-
 Readme.md                              |   8 +
 build.sh                               |  14 +-
 build_sysroot/build_sysroot.sh         |   2 +-
 src/back/write.rs                      |   7 +-
 src/base.rs                            |   8 +-
 src/builder.rs                         | 228 ++------
 src/common.rs                          |  28 +-
 src/context.rs                         |  85 ++-
 src/int.rs                             | 737 +++++++++++++++++++++++++
 src/intrinsic/mod.rs                   | 194 ++++---
 src/lib.rs                             |  27 +-
 src/type_.rs                           |  28 +-
 test.sh                                |  26 +-
 tests/run/int.rs                       | 151 +++++
 17 files changed, 1215 insertions(+), 350 deletions(-)
 rename .github/workflows/{main.yml => ci.yml} (77%)
 create mode 100644 src/int.rs
 create mode 100644 tests/run/int.rs

diff --git a/.github/workflows/main.yml b/.github/workflows/ci.yml
similarity index 77%
rename from .github/workflows/main.yml
rename to .github/workflows/ci.yml
index 98bed8ef387f..337837c40bfb 100644
--- a/.github/workflows/main.yml
+++ b/.github/workflows/ci.yml
@@ -10,10 +10,17 @@ jobs:
 
     strategy:
       fail-fast: false
+      matrix:
+        libgccjit_version: ["libgccjit.so", "libgccjit_without_int128.so"]
 
     steps:
     - uses: actions/checkout@v2
 
+    - uses: actions/checkout@v2
+      with:
+        repository: llvm/llvm-project
+        path: llvm
+
     - name: Install packages
       run: sudo apt-get install ninja-build ripgrep
 
@@ -21,19 +28,25 @@ jobs:
       uses: dawidd6/action-download-artifact@v2
       with:
           workflow: main.yml
-          name: libgccjit.so
+          name: ${{ matrix.libgccjit_version }}
           path: gcc-build
           repo: antoyo/gcc
+          search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
 
     - name: Setup path to libgccjit
       run: |
           echo $(readlink -f gcc-build) > gcc_path
+          # NOTE: the filename is still libgccjit.so even when the artifact name is different.
           ln gcc-build/libgccjit.so gcc-build/libgccjit.so.0
 
-    - name: Set LIBRARY_PATH
+    - name: Set env
       run: |
         echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
+        echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+
+    - name: Set RUST_COMPILER_RT_ROOT
+      run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
 
     # https://github.com/actions/cache/issues/133
     - name: Fixup owner of ~/.cargo/
diff --git a/.gitignore b/.gitignore
index 1e2f9e3aebb2..efda74b2633a 100644
--- a/.gitignore
+++ b/.gitignore
@@ -18,3 +18,4 @@ gimple*
 res
 test-backend
 gcc_path
+benchmarks
diff --git a/Cargo.lock b/Cargo.lock
index 2688ea4a4e14..d4c407b0974f 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#e68fce53af18dce4d40e6b7090f881ff86a2e892"
+source = "git+https://github.com/antoyo/gccjit.rs#cbb07c6601ba4246fc2967c4d770403c57192ca2"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#e68fce53af18dce4d40e6b7090f881ff86a2e892"
+source = "git+https://github.com/antoyo/gccjit.rs#cbb07c6601ba4246fc2967c4d770403c57192ca2"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/Readme.md b/Readme.md
index 1fcfb5f6e20a..6e333f1b641a 100644
--- a/Readme.md
+++ b/Readme.md
@@ -109,6 +109,13 @@ Or add a breakpoint to `add_error` in gdb and print the line number using:
 
 ```
 p loc->m_line
+p loc->m_filename->m_buffer
+```
+
+To print a debug representation of a tree:
+
+```c
+debug_tree(expr);
 ```
 
 To get the `rustc` command to run in `gdb`, add the `--verbose` flag to `cargo build`.
@@ -134,4 +141,5 @@ To get the `rustc` command to run in `gdb`, add the `--verbose` flag to `cargo b
  * Set `linker='-Clinker=m68k-linux-gcc'`.
  * Set the path to the cross-compiling libgccjit in `gcc_path`.
  * Disable the 128-bit integer types if the target doesn't support them by using `let i128_type = context.new_type::<i64>();` in `context.rs` (same for u128_type).
+ * Comment the line: `context.add_command_line_option("-masm=intel");` in src/base.rs.
  * (might not be necessary) Disable the compilation of libstd.so (and possibly libcore.so?).
diff --git a/build.sh b/build.sh
index 17a0d2ab3f06..8a621e12b04e 100755
--- a/build.sh
+++ b/build.sh
@@ -3,7 +3,7 @@
 #set -x
 set -e
 
-if [ -f ./gcc_path ]; then 
+if [ -f ./gcc_path ]; then
     export GCC_PATH=$(cat gcc_path)
 else
     echo 'Please put the path to your custom build of libgccjit in the file `gcc_path`, see Readme.md for details'
@@ -13,13 +13,21 @@ fi
 export LD_LIBRARY_PATH="$GCC_PATH"
 export LIBRARY_PATH="$GCC_PATH"
 
+features=
+
+if [[ "$1" == "--features" ]]; then
+    shift
+    features="--features $1"
+    shift
+fi
+
 if [[ "$1" == "--release" ]]; then
     export CHANNEL='release'
-    CARGO_INCREMENTAL=1 cargo rustc --release
+    CARGO_INCREMENTAL=1 cargo rustc --release $features
 else
     echo $LD_LIBRARY_PATH
     export CHANNEL='debug'
-    cargo rustc
+    cargo rustc $features
 fi
 
 source config.sh
diff --git a/build_sysroot/build_sysroot.sh b/build_sysroot/build_sysroot.sh
index d1dcf495db8a..a965ca971a07 100755
--- a/build_sysroot/build_sysroot.sh
+++ b/build_sysroot/build_sysroot.sh
@@ -22,7 +22,7 @@ if [[ "$1" == "--release" ]]; then
     RUSTFLAGS="$RUSTFLAGS -Zmir-opt-level=3" cargo build --target $TARGET_TRIPLE --release
 else
     sysroot_channel='debug'
-    cargo build --target $TARGET_TRIPLE
+    cargo build --target $TARGET_TRIPLE --features compiler_builtins/c
 fi
 
 # Copy files to sysroot
diff --git a/src/back/write.rs b/src/back/write.rs
index 334ef32f1d1d..b503bd020f6b 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -45,7 +45,7 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, _diag_han
                 if env::var("CG_GCCJIT_DUMP_MODULE_NAMES").as_deref() == Ok("1") {
                     println!("Module {}", module.name);
                 }
-                if env::var("CG_GCCJIT_DUMP_MODULE").as_deref() == Ok(&module.name) {
+                if env::var("CG_GCCJIT_DUMP_ALL_MODULES").as_deref() == Ok("1") || env::var("CG_GCCJIT_DUMP_MODULE").as_deref() == Ok(&module.name) {
                     println!("Dumping reproducer {}", module.name);
                     let _ = fs::create_dir("/tmp/reproducers");
                     // FIXME(antoyo): segfault in dump_reproducer_to_file() might be caused by
@@ -54,6 +54,11 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, _diag_han
                     context.dump_reproducer_to_file(&format!("/tmp/reproducers/{}.c", module.name));
                     println!("Dumped reproducer {}", module.name);
                 }
+                if env::var("CG_GCCJIT_DUMP_TO_FILE").as_deref() == Ok("1") {
+                    let _ = fs::create_dir("/tmp/gccjit_dumps");
+                    let path = &format!("/tmp/gccjit_dumps/{}.c", module.name);
+                    context.dump_to_file(path, true);
+                }
                 context.compile_to_file(OutputKind::ObjectFile, obj_out.to_str().expect("path to str"));
             }
 
diff --git a/src/base.rs b/src/base.rs
index 45e791a99d60..6808993182a0 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -52,7 +52,7 @@ pub fn linkage_to_gcc(linkage: Linkage) -> FunctionType {
     }
 }
 
-pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol) -> (ModuleCodegen<GccContext>, u64) {
+pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_128bit_integers: bool) -> (ModuleCodegen<GccContext>, u64) {
     let prof_timer = tcx.prof.generic_activity("codegen_module");
     let start_time = Instant::now();
 
@@ -60,7 +60,7 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol) -> (Modul
     let (module, _) = tcx.dep_graph.with_task(
         dep_node,
         tcx,
-        cgu_name,
+        (cgu_name, supports_128bit_integers),
         module_codegen,
         Some(dep_graph::hash_result),
     );
@@ -71,7 +71,7 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol) -> (Modul
     // the time we needed for codegenning it.
     let cost = time_to_codegen.as_secs() * 1_000_000_000 + time_to_codegen.subsec_nanos() as u64;
 
-    fn module_codegen(tcx: TyCtxt<'_>, cgu_name: Symbol) -> ModuleCodegen<GccContext> {
+    fn module_codegen(tcx: TyCtxt<'_>, (cgu_name, supports_128bit_integers): (Symbol, bool)) -> ModuleCodegen<GccContext> {
         let cgu = tcx.codegen_unit(cgu_name);
         // Instantiate monomorphizations without filling out definitions yet...
         //let llvm_module = ModuleLlvm::new(tcx, &cgu_name.as_str());
@@ -106,7 +106,7 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol) -> (Modul
         }
 
         {
-            let cx = CodegenCx::new(&context, cgu, tcx);
+            let cx = CodegenCx::new(&context, cgu, tcx, supports_128bit_integers);
 
             let mono_items = cgu.items_in_deterministic_order(tcx);
             for &(mono_item, (linkage, visibility)) in &mono_items {
diff --git a/src/builder.rs b/src/builder.rs
index ccf8123000cf..2969eda2d532 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -94,7 +94,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     fn atomic_extremum(&mut self, operation: ExtremumOperation, dst: RValue<'gcc>, src: RValue<'gcc>, order: AtomicOrdering) -> RValue<'gcc> {
-        let size = self.cx.int_width(src.get_type()) / 8;
+        let size = src.get_type().get_size();
 
         let func = self.current_func();
 
@@ -141,8 +141,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     fn compare_exchange(&self, dst: RValue<'gcc>, cmp: LValue<'gcc>, src: RValue<'gcc>, order: AtomicOrdering, failure_order: AtomicOrdering, weak: bool) -> RValue<'gcc> {
-        let size = self.cx.int_width(src.get_type());
-        let compare_exchange = self.context.get_builtin_function(&format!("__atomic_compare_exchange_{}", size / 8));
+        let size = src.get_type().get_size();
+        let compare_exchange = self.context.get_builtin_function(&format!("__atomic_compare_exchange_{}", size));
         let order = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
         let failure_order = self.context.new_rvalue_from_int(self.i32_type, failure_order.to_gcc());
         let weak = self.context.new_rvalue_from_int(self.bool_type, weak as i32);
@@ -290,7 +290,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
-            let result = current_func.new_local(None, return_type, &format!("returnValue{}", unsafe { RETURN_VALUE_COUNT }));
+            let result = current_func.new_local(None, return_type, &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
             current_block.add_assignment(None, result, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
             result.to_rvalue()
         }
@@ -309,7 +309,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         }
     }
 
-    pub fn overflow_call(&mut self, func: Function<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
+    pub fn overflow_call(&self, func: Function<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
         // gccjit requires to use the result of functions, even when it's not used.
         // That's why we assign the result to a local.
         let return_type = self.context.new_type::<bool>();
@@ -317,7 +317,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let current_func = current_block.get_function();
         // TODO(antoyo): return the new_call() directly? Since the overflow function has no side-effects.
         unsafe { RETURN_VALUE_COUNT += 1 };
-        let result = current_func.new_local(None, return_type, &format!("returnValue{}", unsafe { RETURN_VALUE_COUNT }));
+        let result = current_func.new_local(None, return_type, &format!("overflowReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
         current_block.add_assignment(None, result, self.cx.context.new_call(None, func, &args));
         result.to_rvalue()
     }
@@ -468,23 +468,16 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         }
     }
 
-    fn add(&mut self, a: RValue<'gcc>, mut b: RValue<'gcc>) -> RValue<'gcc> {
-        // FIXME(antoyo): this should not be required.
-        if format!("{:?}", a.get_type()) != format!("{:?}", b.get_type()) {
-            b = self.context.new_cast(None, b, a.get_type());
-        }
-        a + b
+    fn add(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        self.gcc_add(a, b)
     }
 
     fn fadd(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
         a + b
     }
 
-    fn sub(&mut self, a: RValue<'gcc>, mut b: RValue<'gcc>) -> RValue<'gcc> {
-        if a.get_type() != b.get_type() {
-            b = self.context.new_cast(None, b, a.get_type());
-        }
-        a - b
+    fn sub(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        self.gcc_sub(a, b)
     }
 
     fn fsub(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -492,7 +485,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn mul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        a * b
+        self.gcc_mul(a, b)
     }
 
     fn fmul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -500,8 +493,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn udiv(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        // TODO(antoyo): convert the arguments to unsigned?
-        a / b
+        self.gcc_udiv(a, b)
     }
 
     fn exactudiv(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -511,8 +503,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn sdiv(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        // TODO(antoyo): convert the arguments to signed?
-        a / b
+        self.gcc_sdiv(a, b)
     }
 
     fn exactsdiv(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -529,11 +520,11 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn urem(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        a % b
+        self.gcc_urem(a, b)
     }
 
     fn srem(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        a % b
+        self.gcc_srem(a, b)
     }
 
     fn frem(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -549,81 +540,33 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn shl(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        // FIXME(antoyo): remove the casts when libgccjit can shift an unsigned number by an unsigned number.
-        let a_type = a.get_type();
-        let b_type = b.get_type();
-        if a_type.is_unsigned(self) && b_type.is_signed(self) {
-            let a = self.context.new_cast(None, a, b_type);
-            let result = a << b;
-            self.context.new_cast(None, result, a_type)
-        }
-        else if a_type.is_signed(self) && b_type.is_unsigned(self) {
-            let b = self.context.new_cast(None, b, a_type);
-            a << b
-        }
-        else {
-            a << b
-        }
+        self.gcc_shl(a, b)
     }
 
     fn lshr(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        // FIXME(antoyo): remove the casts when libgccjit can shift an unsigned number by an unsigned number.
-        // TODO(antoyo): cast to unsigned to do a logical shift if that does not work.
-        let a_type = a.get_type();
-        let b_type = b.get_type();
-        if a_type.is_unsigned(self) && b_type.is_signed(self) {
-            let a = self.context.new_cast(None, a, b_type);
-            let result = a >> b;
-            self.context.new_cast(None, result, a_type)
-        }
-        else if a_type.is_signed(self) && b_type.is_unsigned(self) {
-            let b = self.context.new_cast(None, b, a_type);
-            a >> b
-        }
-        else {
-            a >> b
-        }
+        self.gcc_lshr(a, b)
     }
 
     fn ashr(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): check whether behavior is an arithmetic shift for >> .
-        // FIXME(antoyo): remove the casts when libgccjit can shift an unsigned number by an unsigned number.
-        let a_type = a.get_type();
-        let b_type = b.get_type();
-        if a_type.is_unsigned(self) && b_type.is_signed(self) {
-            let a = self.context.new_cast(None, a, b_type);
-            let result = a >> b;
-            self.context.new_cast(None, result, a_type)
-        }
-        else if a_type.is_signed(self) && b_type.is_unsigned(self) {
-            let b = self.context.new_cast(None, b, a_type);
-            a >> b
-        }
-        else {
-            a >> b
-        }
+        // It seems to be if the value is signed.
+        self.gcc_lshr(a, b)
     }
 
-    fn and(&mut self, a: RValue<'gcc>, mut b: RValue<'gcc>) -> RValue<'gcc> {
-        if a.get_type() != b.get_type() {
-            b = self.context.new_cast(None, b, a.get_type());
-        }
-        a & b
+    fn and(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        self.gcc_and(a, b)
     }
 
-    fn or(&mut self, a: RValue<'gcc>, mut b: RValue<'gcc>) -> RValue<'gcc> {
-        if a.get_type() != b.get_type() {
-            b = self.context.new_cast(None, b, a.get_type());
-        }
-        a | b
+    fn or(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        self.cx.gcc_or(a, b)
     }
 
     fn xor(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        a ^ b
+        self.gcc_xor(a, b)
     }
 
     fn neg(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        self.cx.context.new_unary_op(None, UnaryOp::Minus, a.get_type(), a)
+        self.gcc_neg(a)
     }
 
     fn fneg(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
@@ -631,14 +574,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn not(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        let operation =
-            if a.get_type().is_bool() {
-                UnaryOp::LogicalNegate
-            }
-            else {
-                UnaryOp::BitwiseNegate
-            };
-        self.cx.context.new_unary_op(None, operation, a.get_type(), a)
+        self.gcc_not(a)
     }
 
     fn unchecked_sadd(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -646,7 +582,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn unchecked_uadd(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        a + b
+        self.gcc_add(a, b)
     }
 
     fn unchecked_ssub(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -655,7 +591,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn unchecked_usub(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): should generate poison value?
-        a - b
+        self.gcc_sub(a, b)
     }
 
     fn unchecked_smul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -687,76 +623,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn checked_binop(&mut self, oop: OverflowOp, typ: Ty<'_>, lhs: Self::Value, rhs: Self::Value) -> (Self::Value, Self::Value) {
-        use rustc_middle::ty::{Int, IntTy::*, Uint, UintTy::*};
-
-        let new_kind =
-            match typ.kind() {
-                Int(t @ Isize) => Int(t.normalize(self.tcx.sess.target.pointer_width)),
-                Uint(t @ Usize) => Uint(t.normalize(self.tcx.sess.target.pointer_width)),
-                t @ (Uint(_) | Int(_)) => t.clone(),
-                _ => panic!("tried to get overflow intrinsic for op applied to non-int type"),
-            };
-
-        // TODO(antoyo): remove duplication with intrinsic?
-        let name =
-            match oop {
-                OverflowOp::Add =>
-                    match new_kind {
-                        Int(I8) => "__builtin_add_overflow",
-                        Int(I16) => "__builtin_add_overflow",
-                        Int(I32) => "__builtin_sadd_overflow",
-                        Int(I64) => "__builtin_saddll_overflow",
-                        Int(I128) => "__builtin_add_overflow",
-
-                        Uint(U8) => "__builtin_add_overflow",
-                        Uint(U16) => "__builtin_add_overflow",
-                        Uint(U32) => "__builtin_uadd_overflow",
-                        Uint(U64) => "__builtin_uaddll_overflow",
-                        Uint(U128) => "__builtin_add_overflow",
-
-                        _ => unreachable!(),
-                    },
-                OverflowOp::Sub =>
-                    match new_kind {
-                        Int(I8) => "__builtin_sub_overflow",
-                        Int(I16) => "__builtin_sub_overflow",
-                        Int(I32) => "__builtin_ssub_overflow",
-                        Int(I64) => "__builtin_ssubll_overflow",
-                        Int(I128) => "__builtin_sub_overflow",
-
-                        Uint(U8) => "__builtin_sub_overflow",
-                        Uint(U16) => "__builtin_sub_overflow",
-                        Uint(U32) => "__builtin_usub_overflow",
-                        Uint(U64) => "__builtin_usubll_overflow",
-                        Uint(U128) => "__builtin_sub_overflow",
-
-                        _ => unreachable!(),
-                    },
-                OverflowOp::Mul =>
-                    match new_kind {
-                        Int(I8) => "__builtin_mul_overflow",
-                        Int(I16) => "__builtin_mul_overflow",
-                        Int(I32) => "__builtin_smul_overflow",
-                        Int(I64) => "__builtin_smulll_overflow",
-                        Int(I128) => "__builtin_mul_overflow",
-
-                        Uint(U8) => "__builtin_mul_overflow",
-                        Uint(U16) => "__builtin_mul_overflow",
-                        Uint(U32) => "__builtin_umul_overflow",
-                        Uint(U64) => "__builtin_umulll_overflow",
-                        Uint(U128) => "__builtin_mul_overflow",
-
-                        _ => unreachable!(),
-                    },
-            };
-
-        let intrinsic = self.context.get_builtin_function(&name);
-        let res = self.current_func()
-            // TODO(antoyo): is it correct to use rhs type instead of the parameter typ?
-            .new_local(None, rhs.get_type(), "binopResult")
-            .get_address(None);
-        let overflow = self.overflow_call(intrinsic, &[lhs, rhs, res], None);
-        (res.dereference(None).to_rvalue(), overflow)
+        self.gcc_checked_binop(oop, typ, lhs, rhs)
     }
 
     fn alloca(&mut self, ty: Type<'gcc>, align: Align) -> RValue<'gcc> {
@@ -1003,7 +870,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     /* Casts */
     fn trunc(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): check that it indeed truncate the value.
-        self.context.new_cast(None, value, dest_ty)
+        self.gcc_int_cast(value, dest_ty)
     }
 
     fn sext(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
@@ -1016,19 +883,19 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn fptoui(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.context.new_cast(None, value, dest_ty)
+        self.gcc_float_to_uint_cast(value, dest_ty)
     }
 
     fn fptosi(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.context.new_cast(None, value, dest_ty)
+        self.gcc_float_to_int_cast(value, dest_ty)
     }
 
     fn uitofp(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.context.new_cast(None, value, dest_ty)
+        self.gcc_uint_to_float_cast(value, dest_ty)
     }
 
     fn sitofp(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.context.new_cast(None, value, dest_ty)
+        self.gcc_int_to_float_cast(value, dest_ty)
     }
 
     fn fptrunc(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
@@ -1054,7 +921,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn intcast(&mut self, value: RValue<'gcc>, dest_typ: Type<'gcc>, _is_signed: bool) -> RValue<'gcc> {
         // NOTE: is_signed is for value, not dest_typ.
-        self.cx.context.new_cast(None, value, dest_typ)
+        self.gcc_int_cast(value, dest_typ)
     }
 
     fn pointercast(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
@@ -1075,21 +942,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     /* Comparisons */
-    fn icmp(&mut self, op: IntPredicate, mut lhs: RValue<'gcc>, mut rhs: RValue<'gcc>) -> RValue<'gcc> {
-        let left_type = lhs.get_type();
-        let right_type = rhs.get_type();
-        if left_type != right_type {
-            // NOTE: because libgccjit cannot compare function pointers.
-            if left_type.dyncast_function_ptr_type().is_some() && right_type.dyncast_function_ptr_type().is_some() {
-                lhs = self.context.new_cast(None, lhs, self.usize_type.make_pointer());
-                rhs = self.context.new_cast(None, rhs, self.usize_type.make_pointer());
-            }
-            // NOTE: hack because we try to cast a vector type to the same vector type.
-            else if format!("{:?}", left_type) != format!("{:?}", right_type) {
-                rhs = self.context.new_cast(None, rhs, left_type);
-            }
-        }
-        self.context.new_comparison(None, op.to_gcc_comparison(), lhs, rhs)
+    fn icmp(&mut self, op: IntPredicate, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
+        self.gcc_icmp(op, lhs, rhs)
     }
 
     fn fcmp(&mut self, op: RealPredicate, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
@@ -1156,7 +1010,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         then_block.add_assignment(None, variable, then_val);
         then_block.end_with_jump(None, after_block);
 
-        if then_val.get_type() != else_val.get_type() {
+        if !then_val.get_type().is_compatible_with(else_val.get_type()) {
             else_val = self.context.new_cast(None, else_val, then_val.get_type());
         }
         else_block.add_assignment(None, variable, else_val);
@@ -1322,7 +1176,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn atomic_rmw(&mut self, op: AtomicRmwBinOp, dst: RValue<'gcc>, src: RValue<'gcc>, order: AtomicOrdering) -> RValue<'gcc> {
-        let size = self.cx.int_width(src.get_type()) / 8;
+        let size = src.get_type().get_size();
         let name =
             match op {
                 AtomicRmwBinOp::AtomicXchg => format!("__atomic_exchange_{}", size),
@@ -1396,7 +1250,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             // Fix the code in codegen_ssa::base::from_immediate.
             return value;
         }
-        self.context.new_cast(None, value, dest_typ)
+        self.gcc_int_cast(value, dest_typ)
     }
 
     fn cx(&self) -> &CodegenCx<'gcc, 'tcx> {
@@ -1470,7 +1324,7 @@ impl<'tcx> HasTargetSpec for Builder<'_, '_, 'tcx> {
     }
 }
 
-trait ToGccComp {
+pub trait ToGccComp {
     fn to_gcc_comparison(&self) -> ComparisonOp;
 }
 
diff --git a/src/common.rs b/src/common.rs
index 5851826147df..89a3dc052d83 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -1,7 +1,5 @@
-use std::convert::TryFrom;
-
 use gccjit::LValue;
-use gccjit::{Block, CType, RValue, Type, ToRValue};
+use gccjit::{Block, RValue, Type, ToRValue};
 use rustc_codegen_ssa::mir::place::PlaceRef;
 use rustc_codegen_ssa::traits::{
     BaseTypeMethods,
@@ -111,29 +109,15 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn const_int(&self, typ: Type<'gcc>, int: i64) -> RValue<'gcc> {
-        self.context.new_rvalue_from_long(typ, i64::try_from(int).expect("i64::try_from"))
+        self.gcc_int(typ, int)
     }
 
     fn const_uint(&self, typ: Type<'gcc>, int: u64) -> RValue<'gcc> {
-        self.context.new_rvalue_from_long(typ, u64::try_from(int).expect("u64::try_from") as i64)
+        self.gcc_uint(typ, int)
     }
 
     fn const_uint_big(&self, typ: Type<'gcc>, num: u128) -> RValue<'gcc> {
-        if num >> 64 != 0 {
-            // FIXME(antoyo): use a new function new_rvalue_from_unsigned_long()?
-            let low = self.context.new_rvalue_from_long(self.u64_type, num as u64 as i64);
-            let high = self.context.new_rvalue_from_long(typ, (num >> 64) as u64 as i64);
-
-            let sixty_four = self.context.new_rvalue_from_long(typ, 64);
-            (high << sixty_four) | self.context.new_cast(None, low, typ)
-        }
-        else if typ.is_i128(self) {
-            let num = self.context.new_rvalue_from_long(self.u64_type, num as u64 as i64);
-            self.context.new_cast(None, num, typ)
-        }
-        else {
-            self.context.new_rvalue_from_long(typ, num as u64 as i64)
-        }
+        self.gcc_uint_big(typ, num)
     }
 
     fn const_bool(&self, val: bool) -> RValue<'gcc> {
@@ -425,11 +409,11 @@ impl<'gcc, 'tcx> TypeReflection<'gcc, 'tcx> for Type<'gcc> {
     }
 
     fn is_i128(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
-        self.unqualified() == cx.context.new_c_type(CType::Int128t)
+        self.unqualified() == cx.i128_type.unqualified()
     }
 
     fn is_u128(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
-        self.unqualified() == cx.context.new_c_type(CType::UInt128t)
+        self.unqualified() == cx.u128_type.unqualified()
     }
 
     fn is_f32(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
diff --git a/src/context.rs b/src/context.rs
index d260a9833470..795966d81830 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -62,6 +62,8 @@ pub struct CodegenCx<'gcc, 'tcx> {
     pub ulonglong_type: Type<'gcc>,
     pub sizet_type: Type<'gcc>,
 
+    pub supports_128bit_integers: bool,
+
     pub float_type: Type<'gcc>,
     pub double_type: Type<'gcc>,
 
@@ -110,22 +112,29 @@ pub struct CodegenCx<'gcc, 'tcx> {
 }
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
-    pub fn new(context: &'gcc Context<'gcc>, codegen_unit: &'tcx CodegenUnit<'tcx>, tcx: TyCtxt<'tcx>) -> Self {
+    pub fn new(context: &'gcc Context<'gcc>, codegen_unit: &'tcx CodegenUnit<'tcx>, tcx: TyCtxt<'tcx>, supports_128bit_integers: bool) -> Self {
         let check_overflow = tcx.sess.overflow_checks();
-        // TODO(antoyo): fix this mess. libgccjit seems to return random type when using new_int_type().
-        let isize_type = context.new_c_type(CType::LongLong);
-        let usize_type = context.new_c_type(CType::ULongLong);
-        let bool_type = context.new_type::<bool>();
-        let i8_type = context.new_type::<i8>();
-        let i16_type = context.new_type::<i16>();
-        let i32_type = context.new_type::<i32>();
-        let i64_type = context.new_c_type(CType::LongLong);
-        let i128_type = context.new_c_type(CType::Int128t).get_aligned(8); // TODO(antoyo): should the alignment be hard-coded?
-        let u8_type = context.new_type::<u8>();
-        let u16_type = context.new_type::<u16>();
-        let u32_type = context.new_type::<u32>();
-        let u64_type = context.new_c_type(CType::ULongLong);
-        let u128_type = context.new_c_type(CType::UInt128t).get_aligned(8); // TODO(antoyo): should the alignment be hard-coded?
+
+        let i8_type = context.new_c_type(CType::Int8t);
+        let i16_type = context.new_c_type(CType::Int16t);
+        let i32_type = context.new_c_type(CType::Int32t);
+        let i64_type = context.new_c_type(CType::Int64t);
+        let u8_type = context.new_c_type(CType::UInt8t);
+        let u16_type = context.new_c_type(CType::UInt16t);
+        let u32_type = context.new_c_type(CType::UInt32t);
+        let u64_type = context.new_c_type(CType::UInt64t);
+
+        let (i128_type, u128_type) =
+            if supports_128bit_integers {
+                let i128_type = context.new_c_type(CType::Int128t).get_aligned(8); // TODO(antoyo): should the alignment be hard-coded?;
+                let u128_type = context.new_c_type(CType::UInt128t).get_aligned(8); // TODO(antoyo): should the alignment be hard-coded?;
+                (i128_type, u128_type)
+            }
+            else {
+                let i128_type = context.new_array_type(None, i64_type, 2);
+                let u128_type = context.new_array_type(None, u64_type, 2);
+                (i128_type, u128_type)
+            };
 
         let tls_model = to_gcc_tls_mode(tcx.sess.tls_model());
 
@@ -139,8 +148,13 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let ulonglong_type = context.new_c_type(CType::ULongLong);
         let sizet_type = context.new_c_type(CType::SizeT);
 
-        assert_eq!(isize_type, i64_type);
-        assert_eq!(usize_type, u64_type);
+        let isize_type = context.new_c_type(CType::LongLong);
+        let usize_type = context.new_c_type(CType::ULongLong);
+        let bool_type = context.new_type::<bool>();
+
+        // TODO(antoyo): only have those assertions on x86_64.
+        assert_eq!(isize_type.get_size(), i64_type.get_size());
+        assert_eq!(usize_type.get_size(), u64_type.get_size());
 
         let mut functions = FxHashMap::default();
         let builtins = [
@@ -190,6 +204,8 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             ulonglong_type,
             sizet_type,
 
+            supports_128bit_integers,
+
             float_type,
             double_type,
 
@@ -221,6 +237,41 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         function
     }
 
+    pub fn is_native_int_type(&self, typ: Type<'gcc>) -> bool {
+        let types = [
+            self.u8_type,
+            self.u16_type,
+            self.u32_type,
+            self.u64_type,
+            self.i8_type,
+            self.i16_type,
+            self.i32_type,
+            self.i64_type,
+        ];
+
+        for native_type in types {
+            if native_type.is_compatible_with(typ) {
+                return true;
+            }
+        }
+
+        self.supports_128bit_integers &&
+            (self.u128_type.is_compatible_with(typ) || self.i128_type.is_compatible_with(typ))
+    }
+
+    pub fn is_non_native_int_type(&self, typ: Type<'gcc>) -> bool {
+        !self.supports_128bit_integers &&
+            (self.u128_type.is_compatible_with(typ) || self.i128_type.is_compatible_with(typ))
+    }
+
+    pub fn is_native_int_type_or_bool(&self, typ: Type<'gcc>) -> bool {
+        self.is_native_int_type(typ) || typ == self.bool_type
+    }
+
+    pub fn is_int_type_or_bool(&self, typ: Type<'gcc>) -> bool {
+        self.is_native_int_type(typ) || self.is_non_native_int_type(typ) || typ == self.bool_type
+    }
+
     pub fn sess(&self) -> &Session {
         &self.tcx.sess
     }
diff --git a/src/int.rs b/src/int.rs
new file mode 100644
index 000000000000..a1f28f3f8812
--- /dev/null
+++ b/src/int.rs
@@ -0,0 +1,737 @@
+//! Module to handle integer operations.
+//! This module exists because some integer types are not supported on some gcc platforms, e.g.
+//! 128-bit integers on 32-bit platforms and thus require to be handled manually.
+
+use std::convert::TryFrom;
+
+use gccjit::{ComparisonOp, FunctionType, RValue, ToRValue, Type, UnaryOp, BinaryOp};
+use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
+use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeMethods, BuilderMethods, OverflowOp};
+use rustc_middle::ty::Ty;
+
+use crate::builder::ToGccComp;
+use crate::{builder::Builder, common::{SignType, TypeReflection}, context::CodegenCx};
+
+impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
+    pub fn gcc_urem(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        // 128-bit unsigned %: __umodti3
+        self.multiplicative_operation(BinaryOp::Modulo, "mod", false, a, b)
+    }
+
+    pub fn gcc_srem(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        // 128-bit signed %:   __modti3
+        self.multiplicative_operation(BinaryOp::Modulo, "mod", true, a, b)
+    }
+
+    pub fn gcc_not(&self, a: RValue<'gcc>) -> RValue<'gcc> {
+        let typ = a.get_type();
+        if self.is_native_int_type_or_bool(typ) {
+            let operation =
+                if typ.is_bool() {
+                    UnaryOp::LogicalNegate
+                }
+                else {
+                    UnaryOp::BitwiseNegate
+                };
+            self.cx.context.new_unary_op(None, operation, typ, a)
+        }
+        else {
+            // TODO(antoyo): use __negdi2 and __negti2 instead?
+            let element_type = typ.dyncast_array().expect("element type");
+            let values = [
+                self.cx.context.new_unary_op(None, UnaryOp::BitwiseNegate, element_type, self.low(a)),
+                self.cx.context.new_unary_op(None, UnaryOp::BitwiseNegate, element_type, self.high(a)),
+            ];
+            self.cx.context.new_array_constructor(None, typ, &values)
+        }
+    }
+
+    pub fn gcc_neg(&self, a: RValue<'gcc>) -> RValue<'gcc> {
+        let a_type = a.get_type();
+        if self.is_native_int_type(a_type) {
+            self.cx.context.new_unary_op(None, UnaryOp::Minus, a.get_type(), a)
+        }
+        else {
+            let param_a = self.context.new_parameter(None, a_type, "a");
+            let func = self.context.new_function(None, FunctionType::Extern, a_type, &[param_a], "__negti2", false);
+            self.context.new_call(None, func, &[a])
+        }
+    }
+
+    pub fn gcc_and(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        self.cx.bitwise_operation(BinaryOp::BitwiseAnd, a, b)
+    }
+
+    pub fn gcc_lshr(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        let a_type = a.get_type();
+        let b_type = b.get_type();
+        let a_native = self.is_native_int_type(a_type);
+        let b_native = self.is_native_int_type(b_type);
+        if a_native && b_native {
+            // FIXME(antoyo): remove the casts when libgccjit can shift an unsigned number by an unsigned number.
+            // TODO(antoyo): cast to unsigned to do a logical shift if that does not work.
+            if a_type.is_unsigned(self) && b_type.is_signed(self) {
+                let a = self.context.new_cast(None, a, b_type);
+                let result = a >> b;
+                self.context.new_cast(None, result, a_type)
+            }
+            else if a_type.is_signed(self) && b_type.is_unsigned(self) {
+                let b = self.context.new_cast(None, b, a_type);
+                a >> b
+            }
+            else {
+                a >> b
+            }
+        }
+        else if a_native && !b_native {
+            self.gcc_lshr(a, self.gcc_int_cast(b, a_type))
+        }
+        else {
+            // NOTE: we cannot use the lshr builtin because it's calling hi() (to get the most
+            // significant half of the number) which uses lshr.
+
+            let native_int_type = a_type.dyncast_array().expect("get element type");
+
+            let func = self.current_func();
+            let then_block = func.new_block("then");
+            let else_block = func.new_block("else");
+            let after_block = func.new_block("after");
+            let b0_block = func.new_block("b0");
+            let actual_else_block = func.new_block("actual_else");
+
+            let result = func.new_local(None, a_type, "shiftResult");
+
+            let sixty_four = self.gcc_int(native_int_type, 64);
+            let sixty_three = self.gcc_int(native_int_type, 63);
+            let zero = self.gcc_zero(native_int_type);
+            let b = self.gcc_int_cast(b, native_int_type);
+            let condition = self.gcc_icmp(IntPredicate::IntNE, self.gcc_and(b, sixty_four), zero);
+            self.llbb().end_with_conditional(None, condition, then_block, else_block);
+
+            // TODO(antoyo): take endianness into account.
+            let shift_value = self.gcc_sub(b, sixty_four);
+            let high = self.high(a);
+            let sign =
+                if a_type.is_signed(self) {
+                    high >> sixty_three
+                }
+                else {
+                    zero
+                };
+            let values = [
+                high >> shift_value,
+                sign,
+            ];
+            let array_value = self.context.new_array_constructor(None, a_type, &values);
+            then_block.add_assignment(None, result, array_value);
+            then_block.end_with_jump(None, after_block);
+
+            let condition = self.gcc_icmp(IntPredicate::IntEQ, b, zero);
+            else_block.end_with_conditional(None, condition, b0_block, actual_else_block);
+
+            b0_block.add_assignment(None, result, a);
+            b0_block.end_with_jump(None, after_block);
+
+            let shift_value = self.gcc_sub(sixty_four, b);
+            // NOTE: cast low to its unsigned type in order to perform a logical right shift.
+            let unsigned_type = native_int_type.to_unsigned(&self.cx);
+            let casted_low = self.context.new_cast(None, self.low(a), unsigned_type);
+            let shifted_low = casted_low >> self.context.new_cast(None, b, unsigned_type);
+            let shifted_low = self.context.new_cast(None, shifted_low, native_int_type);
+            let values = [
+                (high << shift_value) | shifted_low,
+                high >> b,
+            ];
+            let array_value = self.context.new_array_constructor(None, a_type, &values);
+            actual_else_block.add_assignment(None, result, array_value);
+            actual_else_block.end_with_jump(None, after_block);
+
+            // NOTE: since jumps were added in a place rustc does not expect, the current block in the
+            // state need to be updated.
+            self.block = Some(after_block);
+            *self.cx.current_block.borrow_mut() = Some(after_block);
+
+            result.to_rvalue()
+        }
+    }
+
+    fn additive_operation(&self, operation: BinaryOp, a: RValue<'gcc>, mut b: RValue<'gcc>) -> RValue<'gcc> {
+        let a_type = a.get_type();
+        let b_type = b.get_type();
+        if self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type) {
+            if a.get_type() != b.get_type() {
+                b = self.context.new_cast(None, b, a.get_type());
+            }
+            self.context.new_binary_op(None, operation, a_type, a, b)
+        }
+        else {
+            let signed = a_type.is_compatible_with(self.i128_type);
+            let func_name =
+                match (operation, signed) {
+                    (BinaryOp::Plus, true) => "__rust_i128_add",
+                    (BinaryOp::Plus, false) => "__rust_u128_add",
+                    (BinaryOp::Minus, true) => "__rust_i128_sub",
+                    (BinaryOp::Minus, false) => "__rust_u128_sub",
+                    _ => unreachable!("unexpected additive operation {:?}", operation),
+                };
+            let param_a = self.context.new_parameter(None, a_type, "a");
+            let param_b = self.context.new_parameter(None, b_type, "b");
+            let func = self.context.new_function(None, FunctionType::Extern, a_type, &[param_a, param_b], func_name, false);
+            self.context.new_call(None, func, &[a, b])
+        }
+    }
+
+    pub fn gcc_add(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        self.additive_operation(BinaryOp::Plus, a, b)
+    }
+
+    pub fn gcc_mul(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        self.multiplicative_operation(BinaryOp::Mult, "mul", true, a, b)
+    }
+
+    pub fn gcc_sub(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        self.additive_operation(BinaryOp::Minus, a, b)
+    }
+
+    fn multiplicative_operation(&self, operation: BinaryOp, operation_name: &str, signed: bool, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        let a_type = a.get_type();
+        let b_type = b.get_type();
+        if self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type) {
+            self.context.new_binary_op(None, operation, a_type, a, b)
+        }
+        else {
+            let sign =
+                if signed {
+                    ""
+                }
+                else {
+                    "u"
+                };
+            let func_name = format!("__{}{}ti3", sign, operation_name);
+            let param_a = self.context.new_parameter(None, a_type, "a");
+            let param_b = self.context.new_parameter(None, b_type, "b");
+            let func = self.context.new_function(None, FunctionType::Extern, a_type, &[param_a, param_b], func_name, false);
+            self.context.new_call(None, func, &[a, b])
+        }
+    }
+
+    pub fn gcc_sdiv(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        // TODO(antoyo): check if the types are signed?
+        // 128-bit, signed: __divti3
+        // TODO(antoyo): convert the arguments to signed?
+        self.multiplicative_operation(BinaryOp::Divide, "div", true, a, b)
+    }
+
+    pub fn gcc_udiv(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        // 128-bit, unsigned: __udivti3
+        self.multiplicative_operation(BinaryOp::Divide, "div", false, a, b)
+    }
+
+    pub fn gcc_checked_binop(&self, oop: OverflowOp, typ: Ty<'_>, lhs: <Self as BackendTypes>::Value, rhs: <Self as BackendTypes>::Value) -> (<Self as BackendTypes>::Value, <Self as BackendTypes>::Value) {
+        use rustc_middle::ty::{Int, IntTy::*, Uint, UintTy::*};
+
+        let new_kind =
+            match typ.kind() {
+                Int(t @ Isize) => Int(t.normalize(self.tcx.sess.target.pointer_width)),
+                Uint(t @ Usize) => Uint(t.normalize(self.tcx.sess.target.pointer_width)),
+                t @ (Uint(_) | Int(_)) => t.clone(),
+                _ => panic!("tried to get overflow intrinsic for op applied to non-int type"),
+            };
+
+        // TODO(antoyo): remove duplication with intrinsic?
+        let name =
+            if self.is_native_int_type(lhs.get_type()) {
+                match oop {
+                    OverflowOp::Add =>
+                        match new_kind {
+                            Int(I8) => "__builtin_add_overflow",
+                            Int(I16) => "__builtin_add_overflow",
+                            Int(I32) => "__builtin_sadd_overflow",
+                            Int(I64) => "__builtin_saddll_overflow",
+                            Int(I128) => "__builtin_add_overflow",
+
+                            Uint(U8) => "__builtin_add_overflow",
+                            Uint(U16) => "__builtin_add_overflow",
+                            Uint(U32) => "__builtin_uadd_overflow",
+                            Uint(U64) => "__builtin_uaddll_overflow",
+                            Uint(U128) => "__builtin_add_overflow",
+
+                            _ => unreachable!(),
+                        },
+                    OverflowOp::Sub =>
+                        match new_kind {
+                            Int(I8) => "__builtin_sub_overflow",
+                            Int(I16) => "__builtin_sub_overflow",
+                            Int(I32) => "__builtin_ssub_overflow",
+                            Int(I64) => "__builtin_ssubll_overflow",
+                            Int(I128) => "__builtin_sub_overflow",
+
+                            Uint(U8) => "__builtin_sub_overflow",
+                            Uint(U16) => "__builtin_sub_overflow",
+                            Uint(U32) => "__builtin_usub_overflow",
+                            Uint(U64) => "__builtin_usubll_overflow",
+                            Uint(U128) => "__builtin_sub_overflow",
+
+                            _ => unreachable!(),
+                        },
+                    OverflowOp::Mul =>
+                        match new_kind {
+                            Int(I8) => "__builtin_mul_overflow",
+                            Int(I16) => "__builtin_mul_overflow",
+                            Int(I32) => "__builtin_smul_overflow",
+                            Int(I64) => "__builtin_smulll_overflow",
+                            Int(I128) => "__builtin_mul_overflow",
+
+                            Uint(U8) => "__builtin_mul_overflow",
+                            Uint(U16) => "__builtin_mul_overflow",
+                            Uint(U32) => "__builtin_umul_overflow",
+                            Uint(U64) => "__builtin_umulll_overflow",
+                            Uint(U128) => "__builtin_mul_overflow",
+
+                            _ => unreachable!(),
+                        },
+                }
+            }
+            else {
+                match new_kind {
+                    Int(I128) | Uint(U128) => {
+                        let func_name =
+                            match oop {
+                                OverflowOp::Add =>
+                                    match new_kind {
+                                        Int(I128) => "__rust_i128_addo",
+                                        Uint(U128) => "__rust_u128_addo",
+                                        _ => unreachable!(),
+                                    },
+                                OverflowOp::Sub =>
+                                    match new_kind {
+                                        Int(I128) => "__rust_i128_subo",
+                                        Uint(U128) => "__rust_u128_subo",
+                                        _ => unreachable!(),
+                                    },
+                                OverflowOp::Mul =>
+                                    match new_kind {
+                                        Int(I128) => "__rust_i128_mulo", // TODO(antoyo): use __muloti4d instead?
+                                        Uint(U128) => "__rust_u128_mulo",
+                                        _ => unreachable!(),
+                                    },
+                            };
+                        let a_type = lhs.get_type();
+                        let b_type = rhs.get_type();
+                        let param_a = self.context.new_parameter(None, a_type, "a");
+                        let param_b = self.context.new_parameter(None, b_type, "b");
+                        let result_field = self.context.new_field(None, a_type, "result");
+                        let overflow_field = self.context.new_field(None, self.bool_type, "overflow");
+                        let return_type = self.context.new_struct_type(None, "result_overflow", &[result_field, overflow_field]);
+                        let func = self.context.new_function(None, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false);
+                        let result = self.context.new_call(None, func, &[lhs, rhs]);
+                        let overflow = result.access_field(None, overflow_field);
+                        let int_result = result.access_field(None, result_field);
+                        return (int_result, overflow);
+                    },
+                    _ => {
+                        match oop {
+                            OverflowOp::Mul =>
+                                match new_kind {
+                                    Int(I32) => "__mulosi4",
+                                    Int(I64) => "__mulodi4",
+                                    _ => unreachable!(),
+                                },
+                            _ => unimplemented!("overflow operation for {:?}", new_kind),
+                        }
+                    }
+                }
+            };
+
+        let intrinsic = self.context.get_builtin_function(&name);
+        let res = self.current_func()
+            // TODO(antoyo): is it correct to use rhs type instead of the parameter typ?
+            .new_local(None, rhs.get_type(), "binopResult")
+            .get_address(None);
+        let overflow = self.overflow_call(intrinsic, &[lhs, rhs, res], None);
+        (res.dereference(None).to_rvalue(), overflow)
+    }
+
+    pub fn gcc_icmp(&self, op: IntPredicate, mut lhs: RValue<'gcc>, mut rhs: RValue<'gcc>) -> RValue<'gcc> {
+        let a_type = lhs.get_type();
+        let b_type = rhs.get_type();
+        if self.is_non_native_int_type(a_type) || self.is_non_native_int_type(b_type) {
+            let signed = a_type.is_compatible_with(self.i128_type);
+            let sign =
+                if signed {
+                    ""
+                }
+                else {
+                    "u"
+                };
+            let func_name = format!("__{}cmpti2", sign);
+            let param_a = self.context.new_parameter(None, a_type, "a");
+            let param_b = self.context.new_parameter(None, b_type, "b");
+            let func = self.context.new_function(None, FunctionType::Extern, self.int_type, &[param_a, param_b], func_name, false);
+            let cmp = self.context.new_call(None, func, &[lhs, rhs]);
+            let (op, limit) =
+                match op {
+                    IntPredicate::IntEQ => {
+                        return self.context.new_comparison(None, ComparisonOp::Equals, cmp, self.context.new_rvalue_one(self.int_type));
+                    },
+                    IntPredicate::IntNE => {
+                        return self.context.new_comparison(None, ComparisonOp::NotEquals, cmp, self.context.new_rvalue_one(self.int_type));
+                    },
+                    IntPredicate::IntUGT => (ComparisonOp::Equals, 2),
+                    IntPredicate::IntUGE => (ComparisonOp::GreaterThanEquals, 1),
+                    IntPredicate::IntULT => (ComparisonOp::Equals, 0),
+                    IntPredicate::IntULE => (ComparisonOp::LessThanEquals, 1),
+                    IntPredicate::IntSGT => (ComparisonOp::Equals, 2),
+                    IntPredicate::IntSGE => (ComparisonOp::GreaterThanEquals, 1),
+                    IntPredicate::IntSLT => (ComparisonOp::Equals, 0),
+                    IntPredicate::IntSLE => (ComparisonOp::LessThanEquals, 1),
+                };
+            self.context.new_comparison(None, op, cmp, self.context.new_rvalue_from_int(self.int_type, limit))
+        }
+        else {
+            let left_type = lhs.get_type();
+            let right_type = rhs.get_type();
+            if left_type != right_type {
+                // NOTE: because libgccjit cannot compare function pointers.
+                if left_type.dyncast_function_ptr_type().is_some() && right_type.dyncast_function_ptr_type().is_some() {
+                    lhs = self.context.new_cast(None, lhs, self.usize_type.make_pointer());
+                    rhs = self.context.new_cast(None, rhs, self.usize_type.make_pointer());
+                }
+                // NOTE: hack because we try to cast a vector type to the same vector type.
+                else if format!("{:?}", left_type) != format!("{:?}", right_type) {
+                    rhs = self.context.new_cast(None, rhs, left_type);
+                }
+            }
+            self.context.new_comparison(None, op.to_gcc_comparison(), lhs, rhs)
+        }
+    }
+
+    pub fn gcc_xor(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        let a_type = a.get_type();
+        let b_type = b.get_type();
+        if self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type) {
+            a ^ b
+        }
+        else {
+            let values = [
+                self.low(a) ^ self.low(b),
+                self.high(a) ^ self.high(b),
+            ];
+            self.context.new_array_constructor(None, a_type, &values)
+        }
+    }
+
+    pub fn gcc_shl(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        let a_type = a.get_type();
+        let b_type = b.get_type();
+        let a_native = self.is_native_int_type(a_type);
+        let b_native = self.is_native_int_type(b_type);
+        if a_native && b_native {
+            // FIXME(antoyo): remove the casts when libgccjit can shift an unsigned number by an unsigned number.
+            if a_type.is_unsigned(self) && b_type.is_signed(self) {
+                let a = self.context.new_cast(None, a, b_type);
+                let result = a << b;
+                self.context.new_cast(None, result, a_type)
+            }
+            else if a_type.is_signed(self) && b_type.is_unsigned(self) {
+                let b = self.context.new_cast(None, b, a_type);
+                a << b
+            }
+            else {
+                a << b
+            }
+        }
+        else if a_native && !b_native {
+            self.gcc_shl(a, self.gcc_int_cast(b, a_type))
+        }
+        else {
+            // NOTE: we cannot use the ashl builtin because it's calling widen_hi() which uses ashl.
+            let native_int_type = a_type.dyncast_array().expect("get element type");
+
+            let func = self.current_func();
+            let then_block = func.new_block("then");
+            let else_block = func.new_block("else");
+            let after_block = func.new_block("after");
+            let b0_block = func.new_block("b0");
+            let actual_else_block = func.new_block("actual_else");
+
+            let result = func.new_local(None, a_type, "shiftResult");
+
+            let b = self.gcc_int_cast(b, native_int_type);
+            let sixty_four = self.gcc_int(native_int_type, 64);
+            let zero = self.gcc_zero(native_int_type);
+            let condition = self.gcc_icmp(IntPredicate::IntNE, self.gcc_and(b, sixty_four), zero);
+            self.llbb().end_with_conditional(None, condition, then_block, else_block);
+
+            // TODO(antoyo): take endianness into account.
+            let values = [
+                zero,
+                self.low(a) << (b - sixty_four),
+            ];
+            let array_value = self.context.new_array_constructor(None, a_type, &values);
+            then_block.add_assignment(None, result, array_value);
+            then_block.end_with_jump(None, after_block);
+
+            let condition = self.gcc_icmp(IntPredicate::IntEQ, b, zero);
+            else_block.end_with_conditional(None, condition, b0_block, actual_else_block);
+
+            b0_block.add_assignment(None, result, a);
+            b0_block.end_with_jump(None, after_block);
+
+            // NOTE: cast low to its unsigned type in order to perform a logical right shift.
+            let unsigned_type = native_int_type.to_unsigned(&self.cx);
+            let casted_low = self.context.new_cast(None, self.low(a), unsigned_type);
+            let shift_value = self.context.new_cast(None, sixty_four - b, unsigned_type);
+            let high_low = self.context.new_cast(None, casted_low >> shift_value, native_int_type);
+            let values = [
+                self.low(a) << b,
+                (self.high(a) << b) | high_low,
+            ];
+
+            let array_value = self.context.new_array_constructor(None, a_type, &values);
+            actual_else_block.add_assignment(None, result, array_value);
+            actual_else_block.end_with_jump(None, after_block);
+
+            // NOTE: since jumps were added in a place rustc does not expect, the current block in the
+            // state need to be updated.
+            self.block = Some(after_block);
+            *self.cx.current_block.borrow_mut() = Some(after_block);
+
+            result.to_rvalue()
+        }
+    }
+
+    pub fn gcc_bswap(&mut self, mut arg: RValue<'gcc>, width: u64) -> RValue<'gcc> {
+        let arg_type = arg.get_type();
+        if !self.is_native_int_type(arg_type) {
+            let native_int_type = arg_type.dyncast_array().expect("get element type");
+            let lsb = self.context.new_array_access(None, arg, self.context.new_rvalue_from_int(self.int_type, 0)).to_rvalue();
+            let swapped_lsb = self.gcc_bswap(lsb, width / 2);
+            let swapped_lsb = self.context.new_cast(None, swapped_lsb, native_int_type);
+            let msb = self.context.new_array_access(None, arg, self.context.new_rvalue_from_int(self.int_type, 1)).to_rvalue();
+            let swapped_msb = self.gcc_bswap(msb, width / 2);
+            let swapped_msb = self.context.new_cast(None, swapped_msb, native_int_type);
+
+            // NOTE: we also need to swap the two elements here, in addition to swapping inside
+            // the elements themselves like done above.
+            return self.context.new_array_constructor(None, arg_type, &[swapped_msb, swapped_lsb]);
+        }
+
+        // TODO(antoyo): check if it's faster to use string literals and a
+        // match instead of format!.
+        let bswap = self.cx.context.get_builtin_function(&format!("__builtin_bswap{}", width));
+        // FIXME(antoyo): this cast should not be necessary. Remove
+        // when having proper sized integer types.
+        let param_type = bswap.get_param(0).to_rvalue().get_type();
+        if param_type != arg_type {
+            arg = self.bitcast(arg, param_type);
+        }
+        self.cx.context.new_call(None, bswap, &[arg])
+    }
+}
+
+impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
+    pub fn gcc_int(&self, typ: Type<'gcc>, int: i64) -> RValue<'gcc> {
+        if self.is_native_int_type_or_bool(typ) {
+            self.context.new_rvalue_from_long(typ, i64::try_from(int).expect("i64::try_from"))
+        }
+        else {
+            // NOTE: set the sign in high.
+            self.from_low_high(typ, int, -(int.is_negative() as i64))
+        }
+    }
+
+    pub fn gcc_uint(&self, typ: Type<'gcc>, int: u64) -> RValue<'gcc> {
+        if self.is_native_int_type_or_bool(typ) {
+            self.context.new_rvalue_from_long(typ, u64::try_from(int).expect("u64::try_from") as i64)
+        }
+        else {
+            self.from_low_high(typ, int as i64, 0)
+        }
+    }
+
+    pub fn gcc_uint_big(&self, typ: Type<'gcc>, num: u128) -> RValue<'gcc> {
+        let low = num as u64;
+        let high = (num >> 64) as u64;
+        if num >> 64 != 0 {
+            // FIXME(antoyo): use a new function new_rvalue_from_unsigned_long()?
+            if self.is_native_int_type(typ) {
+                let low = self.context.new_rvalue_from_long(self.u64_type, low as i64);
+                let high = self.context.new_rvalue_from_long(typ, high as i64);
+
+                let sixty_four = self.context.new_rvalue_from_long(typ, 64);
+                let shift = high << sixty_four;
+                shift | self.context.new_cast(None, low, typ)
+            }
+            else {
+                self.from_low_high(typ, low as i64, high as i64)
+            }
+        }
+        else if typ.is_i128(self) {
+            let num = self.context.new_rvalue_from_long(self.u64_type, num as u64 as i64);
+            self.gcc_int_cast(num, typ)
+        }
+        else {
+            self.gcc_uint(typ, num as u64)
+        }
+    }
+
+    pub fn gcc_zero(&self, typ: Type<'gcc>) -> RValue<'gcc> {
+        if self.is_native_int_type_or_bool(typ) {
+            self.context.new_rvalue_zero(typ)
+        }
+        else {
+            self.from_low_high(typ, 0, 0)
+        }
+    }
+
+    pub fn gcc_int_width(&self, typ: Type<'gcc>) -> u64 {
+        if self.is_native_int_type_or_bool(typ) {
+            typ.get_size() as u64 * 8
+        }
+        else {
+            // NOTE: the only unsupported types are u128 and i128.
+            128
+        }
+    }
+
+    fn bitwise_operation(&self, operation: BinaryOp, a: RValue<'gcc>, mut b: RValue<'gcc>) -> RValue<'gcc> {
+        let a_type = a.get_type();
+        let b_type = b.get_type();
+        let a_native = self.is_native_int_type_or_bool(a_type);
+        let b_native = self.is_native_int_type_or_bool(b_type);
+        if a_native && b_native {
+            if a_type != b_type {
+                b = self.context.new_cast(None, b, a_type);
+            }
+            self.context.new_binary_op(None, operation, a_type, a, b)
+        }
+        else {
+            assert!(!a_native && !b_native, "both types should either be native or non-native for or operation");
+            let native_int_type = a_type.dyncast_array().expect("get element type");
+            let values = [
+                self.context.new_binary_op(None, operation, native_int_type, self.low(a), self.low(b)),
+                self.context.new_binary_op(None, operation, native_int_type, self.high(a), self.high(b)),
+            ];
+            self.context.new_array_constructor(None, a_type, &values)
+        }
+    }
+
+    pub fn gcc_or(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        self.bitwise_operation(BinaryOp::BitwiseOr, a, b)
+    }
+
+    // TODO(antoyo): can we use https://github.com/rust-lang/compiler-builtins/blob/master/src/int/mod.rs#L379 instead?
+    pub fn gcc_int_cast(&self, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
+        let value_type = value.get_type();
+        if self.is_native_int_type_or_bool(dest_typ) && self.is_native_int_type_or_bool(value_type) {
+            self.context.new_cast(None, value, dest_typ)
+        }
+        else if self.is_native_int_type_or_bool(dest_typ) {
+            self.context.new_cast(None, self.low(value), dest_typ)
+        }
+        else if self.is_native_int_type_or_bool(value_type) {
+            let dest_element_type = dest_typ.dyncast_array().expect("get element type");
+
+            // NOTE: set the sign of the value.
+            let zero = self.context.new_rvalue_zero(value_type);
+            let is_negative = self.context.new_comparison(None, ComparisonOp::LessThan, value, zero);
+            let is_negative = self.gcc_int_cast(is_negative, dest_element_type);
+            let values = [
+                self.context.new_cast(None, value, dest_element_type),
+                self.context.new_unary_op(None, UnaryOp::Minus, dest_element_type, is_negative),
+            ];
+            self.context.new_array_constructor(None, dest_typ, &values)
+        }
+        else {
+            // Since u128 and i128 are the only types that can be unsupported, we know the type of
+            // value and the destination type have the same size, so a bitcast is fine.
+            self.context.new_bitcast(None, value, dest_typ)
+        }
+    }
+
+    fn int_to_float_cast(&self, signed: bool, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
+        let value_type = value.get_type();
+        if self.is_native_int_type_or_bool(value_type) {
+            return self.context.new_cast(None, value, dest_typ);
+        }
+
+        let name_suffix =
+            match self.type_kind(dest_typ) {
+                TypeKind::Float => "tisf",
+                TypeKind::Double => "tidf",
+                kind => panic!("cannot cast a non-native integer to type {:?}", kind),
+            };
+        let sign =
+            if signed {
+                ""
+            }
+            else {
+                "un"
+            };
+        let func_name = format!("__float{}{}", sign, name_suffix);
+        let param = self.context.new_parameter(None, value_type, "n");
+        let func = self.context.new_function(None, FunctionType::Extern, dest_typ, &[param], func_name, false);
+        self.context.new_call(None, func, &[value])
+    }
+
+    pub fn gcc_int_to_float_cast(&self, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
+        self.int_to_float_cast(true, value, dest_typ)
+    }
+
+    pub fn gcc_uint_to_float_cast(&self, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
+        self.int_to_float_cast(false, value, dest_typ)
+    }
+
+    fn float_to_int_cast(&self, signed: bool, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
+        let value_type = value.get_type();
+        if self.is_native_int_type_or_bool(dest_typ) {
+            return self.context.new_cast(None, value, dest_typ);
+        }
+
+        let name_suffix =
+            match self.type_kind(value_type) {
+                TypeKind::Float => "sfti",
+                TypeKind::Double => "dfti",
+                kind => panic!("cannot cast a {:?} to non-native integer", kind),
+            };
+        let sign =
+            if signed {
+                ""
+            }
+            else {
+                "uns"
+            };
+        let func_name = format!("__fix{}{}", sign, name_suffix);
+        let param = self.context.new_parameter(None, value_type, "n");
+        let func = self.context.new_function(None, FunctionType::Extern, dest_typ, &[param], func_name, false);
+        self.context.new_call(None, func, &[value])
+    }
+
+    pub fn gcc_float_to_int_cast(&self, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
+        self.float_to_int_cast(true, value, dest_typ)
+    }
+
+    pub fn gcc_float_to_uint_cast(&self, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
+        self.float_to_int_cast(false, value, dest_typ)
+    }
+
+    fn high(&self, value: RValue<'gcc>) -> RValue<'gcc> {
+        self.context.new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, 1))
+            .to_rvalue()
+    }
+
+    fn low(&self, value: RValue<'gcc>) -> RValue<'gcc> {
+        self.context.new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, 0))
+            .to_rvalue()
+    }
+
+    fn from_low_high(&self, typ: Type<'gcc>, low: i64, high: i64) -> RValue<'gcc> {
+        let native_int_type = typ.dyncast_array().expect("get element type");
+        let values = [
+            self.context.new_rvalue_from_long(native_int_type, low),
+            self.context.new_rvalue_from_long(native_int_type, high),
+        ];
+        self.context.new_array_constructor(None, typ, &values)
+    }
+}
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 572ac559d09d..7cd0f944f2f9 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1,7 +1,7 @@
 pub mod llvm;
 mod simd;
 
-use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp};
+use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp, FunctionType};
 use rustc_codegen_ssa::MemFlags;
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::common::{IntPredicate, span_invalid_monomorphization_error};
@@ -175,11 +175,11 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
 
                                     let arg = args[0].immediate();
                                     let result = func.new_local(None, arg.get_type(), "zeros");
-                                    let zero = self.cx.context.new_rvalue_zero(arg.get_type());
-                                    let cond = self.cx.context.new_comparison(None, ComparisonOp::Equals, arg, zero);
+                                    let zero = self.cx.gcc_zero(arg.get_type());
+                                    let cond = self.gcc_icmp(IntPredicate::IntEQ, arg, zero);
                                     self.llbb().end_with_conditional(None, cond, then_block, else_block);
 
-                                    let zero_result = self.cx.context.new_rvalue_from_long(arg.get_type(), width as i64);
+                                    let zero_result = self.cx.gcc_uint(arg.get_type(), width);
                                     then_block.add_assignment(None, result, zero_result);
                                     then_block.end_with_jump(None, after_block);
 
@@ -195,8 +195,8 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                                             sym::cttz => self.count_trailing_zeroes(width, arg),
                                             _ => unreachable!(),
                                         };
-                                    else_block.add_assignment(None, result, zeros);
-                                    else_block.end_with_jump(None, after_block);
+                                    self.llbb().add_assignment(None, result, zeros);
+                                    self.llbb().end_with_jump(None, after_block);
 
                                     // NOTE: since jumps were added in a place rustc does not
                                     // expect, the current blocks in the state need to be updated.
@@ -217,17 +217,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                                         args[0].immediate() // byte swap a u8/i8 is just a no-op
                                     }
                                     else {
-                                        // TODO(antoyo): check if it's faster to use string literals and a
-                                        // match instead of format!.
-                                        let bswap = self.cx.context.get_builtin_function(&format!("__builtin_bswap{}", width));
-                                        let mut arg = args[0].immediate();
-                                        // FIXME(antoyo): this cast should not be necessary. Remove
-                                        // when having proper sized integer types.
-                                        let param_type = bswap.get_param(0).to_rvalue().get_type();
-                                        if param_type != arg.get_type() {
-                                            arg = self.bitcast(arg, param_type);
-                                        }
-                                        self.cx.context.new_call(None, bswap, &[arg])
+                                        self.gcc_bswap(args[0].immediate(), width)
                                     }
                                 },
                                 sym::bitreverse => self.bit_reverse(width, args[0].immediate()),
@@ -526,7 +516,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         let value =
             if result_type.is_signed(self.cx) {
-                self.context.new_cast(None, value, typ)
+                self.gcc_int_cast(value, typ)
             }
             else {
                 value
@@ -673,30 +663,33 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 },
                 128 => {
                     // TODO(antoyo): find a more efficient implementation?
-                    let sixty_four = self.context.new_rvalue_from_long(typ, 64);
-                    let high = self.context.new_cast(None, value >> sixty_four, self.u64_type);
-                    let low = self.context.new_cast(None, value, self.u64_type);
+                    let sixty_four = self.gcc_int(typ, 64);
+                    let right_shift = self.gcc_lshr(value, sixty_four);
+                    let high = self.gcc_int_cast(right_shift, self.u64_type);
+                    let low = self.gcc_int_cast(value, self.u64_type);
 
                     let reversed_high = self.bit_reverse(64, high);
                     let reversed_low = self.bit_reverse(64, low);
 
-                    let new_low = self.context.new_cast(None, reversed_high, typ);
-                    let new_high = self.context.new_cast(None, reversed_low, typ) << sixty_four;
+                    let new_low = self.gcc_int_cast(reversed_high, typ);
+                    let new_high = self.shl(self.gcc_int_cast(reversed_low, typ), sixty_four);
 
-                    new_low | new_high
+                    self.gcc_or(new_low, new_high)
                 },
                 _ => {
                     panic!("cannot bit reverse with width = {}", width);
                 },
             };
 
-        self.context.new_cast(None, result, result_type)
+        self.gcc_int_cast(result, result_type)
     }
 
-    fn count_leading_zeroes(&self, width: u64, arg: RValue<'gcc>) -> RValue<'gcc> {
+    fn count_leading_zeroes(&mut self, width: u64, arg: RValue<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): use width?
         let arg_type = arg.get_type();
         let count_leading_zeroes =
+            // TODO(antoyo): write a new function Type::is_compatible_with(&Type) and use it here
+            // instead of using is_uint().
             if arg_type.is_uint(&self.cx) {
                 "__builtin_clz"
             }
@@ -712,9 +705,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let result = self.current_func()
                     .new_local(None, array_type, "count_loading_zeroes_results");
 
-                let sixty_four = self.context.new_rvalue_from_long(arg_type, 64);
-                let high = self.context.new_cast(None, arg >> sixty_four, self.u64_type);
-                let low = self.context.new_cast(None, arg, self.u64_type);
+                let sixty_four = self.const_uint(arg_type, 64);
+                let shift = self.lshr(arg, sixty_four);
+                let high = self.gcc_int_cast(shift, self.u64_type);
+                let low = self.gcc_int_cast(arg, self.u64_type);
 
                 let zero = self.context.new_rvalue_zero(self.usize_type);
                 let one = self.context.new_rvalue_one(self.usize_type);
@@ -723,17 +717,18 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let clzll = self.context.get_builtin_function("__builtin_clzll");
 
                 let first_elem = self.context.new_array_access(None, result, zero);
-                let first_value = self.context.new_cast(None, self.context.new_call(None, clzll, &[high]), arg_type);
+                let first_value = self.gcc_int_cast(self.context.new_call(None, clzll, &[high]), arg_type);
                 self.llbb()
                     .add_assignment(None, first_elem, first_value);
 
                 let second_elem = self.context.new_array_access(None, result, one);
-                let second_value = self.context.new_cast(None, self.context.new_call(None, clzll, &[low]), arg_type) + sixty_four;
+                let cast = self.gcc_int_cast(self.context.new_call(None, clzll, &[low]), arg_type);
+                let second_value = self.add(cast, sixty_four);
                 self.llbb()
                     .add_assignment(None, second_elem, second_value);
 
                 let third_elem = self.context.new_array_access(None, result, two);
-                let third_value = self.context.new_rvalue_from_long(arg_type, 128);
+                let third_value = self.const_uint(arg_type, 128);
                 self.llbb()
                     .add_assignment(None, third_elem, third_value);
 
@@ -749,13 +744,13 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
                 let res = self.context.new_array_access(None, result, index);
 
-                return self.context.new_cast(None, res, arg_type);
+                return self.gcc_int_cast(res.to_rvalue(), arg_type);
             }
             else {
-                let count_leading_zeroes = self.context.get_builtin_function("__builtin_clz");
-                let arg = self.context.new_cast(None, arg, self.uint_type);
-                let diff = self.int_width(self.uint_type) - self.int_width(arg_type);
-                let diff = self.context.new_rvalue_from_long(self.int_type, diff);
+                let count_leading_zeroes = self.context.get_builtin_function("__builtin_clzll");
+                let arg = self.context.new_cast(None, arg, self.ulonglong_type);
+                let diff = self.ulonglong_type.get_size() as i64 - arg_type.get_size() as i64;
+                let diff = self.context.new_rvalue_from_long(self.int_type, diff * 8);
                 let res = self.context.new_call(None, count_leading_zeroes, &[arg]) - diff;
                 return self.context.new_cast(None, res, arg_type);
             };
@@ -764,18 +759,20 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         self.context.new_cast(None, res, arg_type)
     }
 
-    fn count_trailing_zeroes(&self, _width: u64, arg: RValue<'gcc>) -> RValue<'gcc> {
+    fn count_trailing_zeroes(&mut self, _width: u64, arg: RValue<'gcc>) -> RValue<'gcc> {
         let result_type = arg.get_type();
         let arg =
             if result_type.is_signed(self.cx) {
                 let new_type = result_type.to_unsigned(self.cx);
-                self.context.new_cast(None, arg, new_type)
+                self.gcc_int_cast(arg, new_type)
             }
             else {
                 arg
             };
         let arg_type = arg.get_type();
         let (count_trailing_zeroes, expected_type) =
+            // TODO(antoyo): write a new function Type::is_compatible_with(&Type) and use it here
+            // instead of using is_uint().
             if arg_type.is_uchar(&self.cx) || arg_type.is_ushort(&self.cx) || arg_type.is_uint(&self.cx) {
                 // NOTE: we don't need to & 0xFF for uchar because the result is undefined on zero.
                 ("__builtin_ctz", self.cx.uint_type)
@@ -792,9 +789,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let result = self.current_func()
                     .new_local(None, array_type, "count_loading_zeroes_results");
 
-                let sixty_four = self.context.new_rvalue_from_long(arg_type, 64);
-                let high = self.context.new_cast(None, arg >> sixty_four, self.u64_type);
-                let low = self.context.new_cast(None, arg, self.u64_type);
+                let sixty_four = self.gcc_int(arg_type, 64);
+                let shift = self.gcc_lshr(arg, sixty_four);
+                let high = self.gcc_int_cast(shift, self.u64_type);
+                let low = self.gcc_int_cast(arg, self.u64_type);
 
                 let zero = self.context.new_rvalue_zero(self.usize_type);
                 let one = self.context.new_rvalue_one(self.usize_type);
@@ -803,17 +801,17 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let ctzll = self.context.get_builtin_function("__builtin_ctzll");
 
                 let first_elem = self.context.new_array_access(None, result, zero);
-                let first_value = self.context.new_cast(None, self.context.new_call(None, ctzll, &[low]), arg_type);
+                let first_value = self.gcc_int_cast(self.context.new_call(None, ctzll, &[low]), arg_type);
                 self.llbb()
                     .add_assignment(None, first_elem, first_value);
 
                 let second_elem = self.context.new_array_access(None, result, one);
-                let second_value = self.context.new_cast(None, self.context.new_call(None, ctzll, &[high]), arg_type) + sixty_four;
+                let second_value = self.gcc_add(self.gcc_int_cast(self.context.new_call(None, ctzll, &[high]), arg_type), sixty_four);
                 self.llbb()
                     .add_assignment(None, second_elem, second_value);
 
                 let third_elem = self.context.new_array_access(None, result, two);
-                let third_value = self.context.new_rvalue_from_long(arg_type, 128);
+                let third_value = self.gcc_int(arg_type, 128);
                 self.llbb()
                     .add_assignment(None, third_elem, third_value);
 
@@ -829,10 +827,20 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
                 let res = self.context.new_array_access(None, result, index);
 
-                return self.context.new_cast(None, res, result_type);
+                return self.gcc_int_cast(res.to_rvalue(), result_type);
             }
             else {
-                unimplemented!("count_trailing_zeroes for {:?}", arg_type);
+                let count_trailing_zeroes = self.context.get_builtin_function("__builtin_ctzll");
+                let arg_size = arg_type.get_size();
+                let casted_arg = self.context.new_cast(None, arg, self.ulonglong_type);
+                let byte_diff = self.ulonglong_type.get_size() as i64 - arg_size as i64;
+                let diff = self.context.new_rvalue_from_long(self.int_type, byte_diff * 8);
+                let mask = self.context.new_rvalue_from_long(arg_type, -1); // To get the value with all bits set.
+                let masked = mask & self.context.new_unary_op(None, UnaryOp::BitwiseNegate, arg_type, arg);
+                let cond = self.context.new_comparison(None, ComparisonOp::Equals, masked, mask);
+                let diff = diff * self.context.new_cast(None, cond, self.int_type);
+                let res = self.context.new_call(None, count_trailing_zeroes, &[casted_arg]) - diff;
+                return self.context.new_cast(None, res, result_type);
             };
         let count_trailing_zeroes = self.context.get_builtin_function(count_trailing_zeroes);
         let arg =
@@ -846,18 +854,14 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         self.context.new_cast(None, res, result_type)
     }
 
-    fn int_width(&self, typ: Type<'gcc>) -> i64 {
-        self.cx.int_width(typ) as i64
-    }
-
-    fn pop_count(&self, value: RValue<'gcc>) -> RValue<'gcc> {
+    fn pop_count(&mut self, value: RValue<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): use the optimized version with fewer operations.
         let result_type = value.get_type();
         let value_type = result_type.to_unsigned(self.cx);
 
         let value =
             if result_type.is_signed(self.cx) {
-                self.context.new_cast(None, value, value_type)
+                self.gcc_int_cast(value, value_type)
             }
             else {
                 value
@@ -867,13 +871,14 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             // TODO(antoyo): implement in the normal algorithm below to have a more efficient
             // implementation (that does not require a call to __popcountdi2).
             let popcount = self.context.get_builtin_function("__builtin_popcountll");
-            let sixty_four = self.context.new_rvalue_from_long(value_type, 64);
-            let high = self.context.new_cast(None, value >> sixty_four, self.cx.ulonglong_type);
+            let sixty_four = self.gcc_int(value_type, 64);
+            let right_shift = self.gcc_lshr(value, sixty_four);
+            let high = self.gcc_int_cast(right_shift, self.cx.ulonglong_type);
             let high = self.context.new_call(None, popcount, &[high]);
-            let low = self.context.new_cast(None, value, self.cx.ulonglong_type);
+            let low = self.gcc_int_cast(value, self.cx.ulonglong_type);
             let low = self.context.new_call(None, popcount, &[low]);
             let res = high + low;
-            return self.context.new_cast(None, res, result_type);
+            return self.gcc_int_cast(res, result_type);
         }
 
         // First step.
@@ -935,13 +940,14 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
     // Algorithm from: https://blog.regehr.org/archives/1063
     fn rotate_left(&mut self, value: RValue<'gcc>, shift: RValue<'gcc>, width: u64) -> RValue<'gcc> {
-        let max = self.context.new_rvalue_from_long(shift.get_type(), width as i64);
-        let shift = shift % max;
+        let max = self.const_uint(shift.get_type(), width);
+        let shift = self.urem(shift, max);
         let lhs = self.shl(value, shift);
+        let result_neg = self.neg(shift);
         let result_and =
             self.and(
-                self.context.new_unary_op(None, UnaryOp::Minus, shift.get_type(), shift),
-                self.context.new_rvalue_from_long(shift.get_type(), width as i64 - 1),
+                result_neg,
+                self.const_uint(shift.get_type(), width - 1),
             );
         let rhs = self.lshr(value, result_and);
         self.or(lhs, rhs)
@@ -949,13 +955,14 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
     // Algorithm from: https://blog.regehr.org/archives/1063
     fn rotate_right(&mut self, value: RValue<'gcc>, shift: RValue<'gcc>, width: u64) -> RValue<'gcc> {
-        let max = self.context.new_rvalue_from_long(shift.get_type(), width as i64);
-        let shift = shift % max;
+        let max = self.const_uint(shift.get_type(), width);
+        let shift = self.urem(shift, max);
         let lhs = self.lshr(value, shift);
+        let result_neg = self.neg(shift);
         let result_and =
             self.and(
-                self.context.new_unary_op(None, UnaryOp::Minus, shift.get_type(), shift),
-                self.context.new_rvalue_from_long(shift.get_type(), width as i64 - 1),
+                result_neg,
+                self.const_uint(shift.get_type(), width - 1),
             );
         let rhs = self.shl(value, result_and);
         self.or(lhs, rhs)
@@ -1015,31 +1022,52 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     fn saturating_sub(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>, signed: bool, width: u64) -> RValue<'gcc> {
         if signed {
             // Also based on algorithm from: https://stackoverflow.com/a/56531252/389119
-            let func_name =
-                match width {
-                    8 => "__builtin_sub_overflow",
-                    16 => "__builtin_sub_overflow",
-                    32 => "__builtin_ssub_overflow",
-                    64 => "__builtin_ssubll_overflow",
-                    128 => "__builtin_sub_overflow",
-                    _ => unreachable!(),
-                };
-            let overflow_func = self.context.get_builtin_function(func_name);
             let result_type = lhs.get_type();
             let func = self.current_func.borrow().expect("func");
             let res = func.new_local(None, result_type, "saturating_diff");
-            let overflow = self.overflow_call(overflow_func, &[lhs, rhs, res.get_address(None)], None);
+            let supports_native_type = self.is_native_int_type(result_type);
+            let overflow =
+                if supports_native_type {
+                    let func_name =
+                        match width {
+                            8 => "__builtin_sub_overflow",
+                            16 => "__builtin_sub_overflow",
+                            32 => "__builtin_ssub_overflow",
+                            64 => "__builtin_ssubll_overflow",
+                            128 => "__builtin_sub_overflow",
+                            _ => unreachable!(),
+                        };
+                    let overflow_func = self.context.get_builtin_function(func_name);
+                    self.overflow_call(overflow_func, &[lhs, rhs, res.get_address(None)], None)
+                }
+                else {
+                    let func_name =
+                        match width {
+                            128 => "__rust_i128_subo",
+                            _ => unreachable!(),
+                        };
+                    let param_a = self.context.new_parameter(None, result_type, "a");
+                    let param_b = self.context.new_parameter(None, result_type, "b");
+                    let result_field = self.context.new_field(None, result_type, "result");
+                    let overflow_field = self.context.new_field(None, self.bool_type, "overflow");
+                    let return_type = self.context.new_struct_type(None, "result_overflow", &[result_field, overflow_field]);
+                    let func = self.context.new_function(None, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false);
+                    let result = self.context.new_call(None, func, &[lhs, rhs]);
+                    let overflow = result.access_field(None, overflow_field);
+                    let int_result = result.access_field(None, result_field);
+                    self.llbb().add_assignment(None, res, int_result);
+                    overflow
+                };
 
             let then_block = func.new_block("then");
             let after_block = func.new_block("after");
 
-            let unsigned_type = self.context.new_int_type(width as i32 / 8, false);
-            let shifted = self.context.new_cast(None, lhs, unsigned_type) >> self.context.new_rvalue_from_int(unsigned_type, width as i32 - 1);
-            let uint_max = self.context.new_unary_op(None, UnaryOp::BitwiseNegate, unsigned_type,
-                self.context.new_rvalue_from_int(unsigned_type, 0)
-            );
-            let int_max = uint_max >> self.context.new_rvalue_one(unsigned_type);
-            then_block.add_assignment(None, res, self.context.new_cast(None, shifted + int_max, result_type));
+            // NOTE: convert the type to unsigned to have an unsigned shift.
+            let unsigned_type = result_type.to_unsigned(&self.cx);
+            let shifted = self.gcc_lshr(self.gcc_int_cast(lhs, unsigned_type), self.gcc_int(unsigned_type, width as i64 - 1));
+            let uint_max = self.gcc_not(self.gcc_int(unsigned_type, 0));
+            let int_max = self.gcc_lshr(uint_max, self.gcc_int(unsigned_type, 1));
+            then_block.add_assignment(None, res, self.gcc_int_cast(self.gcc_add(shifted, int_max), result_type));
             then_block.end_with_jump(None, after_block);
 
             self.llbb().end_with_conditional(None, overflow, then_block, after_block);
diff --git a/src/lib.rs b/src/lib.rs
index 9b62bf418377..ca283e1380c4 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -1,4 +1,5 @@
 /*
+ * TODO(antoyo): implement equality in libgccjit based on https://zpz.github.io/blog/overloading-equality-operator-in-cpp-class-hierarchy/ (for type equality?)
  * TODO(antoyo): support #[inline] attributes.
  * TODO(antoyo): support LTO (gcc's equivalent to Thin LTO is enabled by -fwhopr: https://stackoverflow.com/questions/64954525/does-gcc-have-thin-lto).
  *
@@ -21,6 +22,7 @@ extern crate rustc_middle;
 extern crate rustc_session;
 extern crate rustc_span;
 extern crate rustc_target;
+extern crate tempfile;
 
 // This prevents duplicating functions and statics that are already part of the host rustc process.
 #[allow(unused_extern_crates)]
@@ -40,15 +42,16 @@ mod context;
 mod coverageinfo;
 mod debuginfo;
 mod declare;
+mod int;
 mod intrinsic;
 mod mono_item;
 mod type_;
 mod type_of;
 
 use std::any::Any;
-use std::sync::Arc;
+use std::sync::{Arc, Mutex};
 
-use gccjit::{Context, OptimizationLevel};
+use gccjit::{Context, OptimizationLevel, CType};
 use rustc_ast::expand::allocator::AllocatorKind;
 use rustc_codegen_ssa::{CodegenResults, CompiledModule, ModuleCodegen};
 use rustc_codegen_ssa::base::codegen_crate;
@@ -65,6 +68,7 @@ use rustc_session::config::{Lto, OptLevel, OutputFilenames};
 use rustc_session::Session;
 use rustc_span::Symbol;
 use rustc_span::fatal_error::FatalError;
+use tempfile::TempDir;
 
 pub struct PrintOnPanic<F: Fn() -> String>(pub F);
 
@@ -77,13 +81,24 @@ impl<F: Fn() -> String> Drop for PrintOnPanic<F> {
 }
 
 #[derive(Clone)]
-pub struct GccCodegenBackend;
+pub struct GccCodegenBackend {
+    supports_128bit_integers: Arc<Mutex<bool>>,
+}
 
 impl CodegenBackend for GccCodegenBackend {
     fn init(&self, sess: &Session) {
         if sess.lto() != Lto::No {
             sess.warn("LTO is not supported. You may get a linker error.");
         }
+
+        let temp_dir = TempDir::new().expect("cannot create temporary directory");
+        let temp_file = temp_dir.into_path().join("result.asm");
+        let check_context = Context::default();
+        check_context.set_print_errors_to_stderr(false);
+        let _int128_ty = check_context.new_c_type(CType::UInt128t);
+        // NOTE: we cannot just call compile() as this would require other files than libgccjit.so.
+        check_context.compile_to_file(gccjit::OutputKind::Assembler, temp_file.to_str().expect("path to str"));
+        *self.supports_128bit_integers.lock().expect("lock") = check_context.get_last_error() == Ok(None);
     }
 
     fn codegen_crate<'tcx>(&self, tcx: TyCtxt<'tcx>, metadata: EncodedMetadata, need_metadata_module: bool) -> Box<dyn Any> {
@@ -129,7 +144,7 @@ impl ExtraBackendMethods for GccCodegenBackend {
     }
 
     fn compile_codegen_unit<'tcx>(&self, tcx: TyCtxt<'tcx>, cgu_name: Symbol) -> (ModuleCodegen<Self::Module>, u64) {
-        base::compile_codegen_unit(tcx, cgu_name)
+        base::compile_codegen_unit(tcx, cgu_name, *self.supports_128bit_integers.lock().expect("lock"))
     }
 
     fn target_machine_factory(&self, _sess: &Session, _opt_level: OptLevel) -> TargetMachineFactoryFn<Self> {
@@ -237,7 +252,9 @@ impl WriteBackendMethods for GccCodegenBackend {
 /// This is the entrypoint for a hot plugged rustc_codegen_gccjit
 #[no_mangle]
 pub fn __rustc_codegen_backend() -> Box<dyn CodegenBackend> {
-    Box::new(GccCodegenBackend)
+    Box::new(GccCodegenBackend {
+        supports_128bit_integers: Arc::new(Mutex::new(false)),
+    })
 }
 
 fn to_gcc_opt_level(optlevel: Option<OptLevel>) -> OptimizationLevel {
diff --git a/src/type_.rs b/src/type_.rs
index 28e2adc492bb..3c96cd6afc25 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -7,7 +7,6 @@ use rustc_middle::bug;
 use rustc_middle::ty::layout::TyAndLayout;
 use rustc_target::abi::{AddressSpace, Align, Integer, Size};
 
-use crate::common::TypeReflection;
 use crate::context::CodegenCx;
 use crate::type_of::LayoutGccExt;
 
@@ -119,9 +118,15 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn type_kind(&self, typ: Type<'gcc>) -> TypeKind {
-        if typ.is_integral() {
+        if self.is_int_type_or_bool(typ) {
             TypeKind::Integer
         }
+        else if typ == self.float_type {
+            TypeKind::Float
+        }
+        else if typ == self.double_type {
+            TypeKind::Double
+        }
         else if typ.dyncast_vector().is_some() {
             TypeKind::Vector
         }
@@ -175,24 +180,7 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn int_width(&self, typ: Type<'gcc>) -> u64 {
-        if typ.is_i8(self) || typ.is_u8(self) {
-            8
-        }
-        else if typ.is_i16(self) || typ.is_u16(self) {
-            16
-        }
-        else if typ.is_i32(self) || typ.is_u32(self) {
-            32
-        }
-        else if typ.is_i64(self) || typ.is_u64(self) {
-            64
-        }
-        else if typ.is_i128(self) || typ.is_u128(self) {
-            128
-        }
-        else {
-            panic!("Cannot get width of int type {:?}", typ);
-        }
+        self.gcc_int_width(typ)
     }
 
     fn val_ty(&self, value: RValue<'gcc>) -> Type<'gcc> {
diff --git a/test.sh b/test.sh
index 70bd86edcbe2..4f05013440b4 100755
--- a/test.sh
+++ b/test.sh
@@ -4,7 +4,7 @@
 
 set -e
 
-if [ -f ./gcc_path ]; then 
+if [ -f ./gcc_path ]; then
     export GCC_PATH=$(cat gcc_path)
 else
     echo 'Please put the path to your custom build of libgccjit in the file `gcc_path`, see Readme.md for details'
@@ -14,14 +14,26 @@ fi
 export LD_LIBRARY_PATH="$GCC_PATH"
 export LIBRARY_PATH="$GCC_PATH"
 
+features=
+
+if [[ "$1" == "--features" ]]; then
+    shift
+    features="--features $1"
+    shift
+fi
+
 if [[ "$1" == "--release" ]]; then
     export CHANNEL='release'
-    CARGO_INCREMENTAL=1 cargo rustc --release
+    CARGO_INCREMENTAL=1 cargo rustc --release $features
     shift
 else
     echo $LD_LIBRARY_PATH
     export CHANNEL='debug'
-    cargo rustc
+    cargo rustc $features
+fi
+
+if [[ "$1" == "--build" ]]; then
+    exit
 fi
 
 source config.sh
@@ -206,6 +218,14 @@ case $1 in
         clean_ui_tests
         ;;
 
+    "--std-tests")
+        std_tests
+        ;;
+
+    "--build-sysroot")
+        build_sysroot
+        ;;
+
     *)
         clean
         mini_tests
diff --git a/tests/run/int.rs b/tests/run/int.rs
new file mode 100644
index 000000000000..7a62fc7d1f78
--- /dev/null
+++ b/tests/run/int.rs
@@ -0,0 +1,151 @@
+// Compiler:
+//
+// Run-time:
+//   status: 0
+
+#![feature(arbitrary_self_types, auto_traits, core_intrinsics, lang_items, start, intrinsics)]
+
+#![no_std]
+
+mod intrinsics {
+    extern "rust-intrinsic" {
+        pub fn abort() -> !;
+    }
+}
+
+/*
+ * Core
+ */
+
+mod libc {
+    #[link(name = "c")]
+    extern "C" {
+        pub fn puts(s: *const u8) -> i32;
+    }
+}
+
+#[panic_handler]
+fn panic_handler(_: &core::panic::PanicInfo) -> ! {
+    unsafe {
+        core::intrinsics::abort();
+    }
+}
+
+/*
+ * Code
+ */
+
+#[start]
+fn main(argc: isize, _argv: *const *const u8) -> isize {
+    let var = 134217856_u128;
+    let var2 = 10475372733397991552_u128;
+    let var3 = 193236519889708027473620326106273939584_u128;
+    let var4 = 123236519889708027473620326106273939584_u128;
+    let var5 = 153236519889708027473620326106273939584_u128;
+    let var6 = 18446744073709551616_i128;
+    let var7 = 170141183460469231731687303715884105728_u128;
+
+    // Shifts.
+    assert_eq!(var << (argc as u128 - 1), var);
+    assert_eq!(var << argc as u128, 268435712);
+    assert_eq!(var << (argc + 32) as u128, 1152922604118474752);
+    assert_eq!(var << (argc + 48) as u128, 75557935783508361347072);
+    assert_eq!(var << (argc + 60) as u128, 309485304969250248077606912);
+    assert_eq!(var << (argc + 62) as u128, 1237941219877000992310427648);
+    assert_eq!(var << (argc + 63) as u128, 2475882439754001984620855296);
+    assert_eq!(var << (argc + 80) as u128, 324518863143436548128224745357312);
+
+    assert_eq!(var2 << argc as u128, 20950745466795983104);
+    assert_eq!(var2 << (argc as u128 - 1), var2);
+    assert_eq!(var2 << (argc + 32) as u128, 89982766606709001335848566784);
+    assert_eq!(var2 << (argc + 48) as u128, 5897110592337281111546171672756224);
+    assert_eq!(var2 << (argc + 60) as u128, 24154564986213503432893119171609493504);
+    assert_eq!(var2 << (argc + 62) as u128, 96618259944854013731572476686437974016);
+    assert_eq!(var2 << (argc + 63) as u128, 193236519889708027463144953372875948032);
+
+    assert_eq!(var3 << argc as u128, 46190672858477591483866044780779667712);
+    assert_eq!(var3 << (argc as u128 - 1), var3);
+    assert_eq!(var3 << (argc + 32) as u128, 21267668304951024224840338247585366016);
+    assert_eq!(var3 << (argc + 48) as u128, 1335125106377253154015353231953100800);
+    assert_eq!(var3 << (argc + 60) as u128, 24154564986213503432893119171609493504);
+    assert_eq!(var3 << (argc + 62) as u128, 96618259944854013731572476686437974016);
+    assert_eq!(var3 << (argc + 63) as u128, 193236519889708027463144953372875948032);
+
+    assert_eq!(var >> (argc as u128 - 1), var);
+    assert_eq!(var >> argc as u128, 67108928);
+    assert_eq!(var >> (argc + 32) as u128, 0);
+    assert_eq!(var >> (argc + 48) as u128, 0);
+    assert_eq!(var >> (argc + 60) as u128, 0);
+    assert_eq!(var >> (argc + 62) as u128, 0);
+    assert_eq!(var >> (argc + 63) as u128, 0);
+
+    assert_eq!(var2 >> argc as u128, 5237686366698995776);
+    assert_eq!(var2 >> (argc as u128 - 1), var2);
+    assert_eq!(var2 >> (argc + 32) as u128, 1219493888);
+    assert_eq!(var2 >> (argc + 48) as u128, 18608);
+    assert_eq!(var2 >> (argc + 60) as u128, 4);
+    assert_eq!(var2 >> (argc + 62) as u128, 1);
+    assert_eq!(var2 >> (argc + 63) as u128, 0);
+
+    assert_eq!(var3 >> (argc as u128 - 1), var3);
+    assert_eq!(var3 >> argc as u128, 96618259944854013736810163053136969792);
+    assert_eq!(var3 >> (argc + 32) as u128, 22495691651677250335181635584);
+    assert_eq!(var3 >> (argc + 48) as u128, 343257013727985387194544);
+    assert_eq!(var3 >> (argc + 60) as u128, 83802981867183932420);
+    assert_eq!(var3 >> (argc + 62) as u128, 20950745466795983105);
+    assert_eq!(var3 >> (argc + 63) as u128, 10475372733397991552);
+    assert_eq!(var3 >> (argc + 80) as u128, 79920751444992);
+
+    assert_eq!(var6 >> argc as u128, 9223372036854775808);
+    assert_eq!((var6 - 1) >> argc as u128, 9223372036854775807);
+    assert_eq!(var7 >> argc as u128, 85070591730234615865843651857942052864);
+
+    // Casts
+    assert_eq!((var >> (argc + 32) as u128) as u64, 0);
+    assert_eq!((var >> argc as u128) as u64, 67108928);
+
+    // Addition.
+    assert_eq!(var + argc as u128, 134217857);
+
+    assert_eq!(var2 + argc as u128, 10475372733397991553);
+    assert_eq!(var2 + (var2 + argc as u128) as u128, 20950745466795983105);
+
+    assert_eq!(var3 + argc as u128, 193236519889708027473620326106273939585);
+
+    // Subtraction
+    assert_eq!(var - argc as u128, 134217855);
+
+    assert_eq!(var2 - argc as u128, 10475372733397991551);
+
+    assert_eq!(var3 - argc as u128, 193236519889708027473620326106273939583);
+
+    // Multiplication
+    assert_eq!(var * (argc + 1) as u128, 268435712);
+    assert_eq!(var * (argc as u128 + var2), 1405982069077538020949770368);
+
+    assert_eq!(var2 * (argc + 1) as u128, 20950745466795983104);
+    assert_eq!(var2 * (argc as u128 + var2), 109733433903618109003204073240861360256);
+
+    assert_eq!(var3 * argc as u128, 193236519889708027473620326106273939584);
+
+    assert_eq!(var4 * (argc + 1) as u128, 246473039779416054947240652212547879168);
+
+    assert_eq!(var5 * (argc + 1) as u128, 306473039779416054947240652212547879168);
+
+    // Division.
+    assert_eq!(var / (argc + 1) as u128, 67108928);
+    assert_eq!(var / (argc + 2) as u128, 44739285);
+
+    assert_eq!(var2 / (argc + 1) as u128, 5237686366698995776);
+    assert_eq!(var2 / (argc + 2) as u128, 3491790911132663850);
+
+    assert_eq!(var3 / (argc + 1) as u128, 96618259944854013736810163053136969792);
+    assert_eq!(var3 / (argc + 2) as u128, 64412173296569342491206775368757979861);
+    assert_eq!(var3 / (argc as u128 + var4), 1);
+    assert_eq!(var3 / (argc as u128 + var2), 18446744073709551615);
+
+    assert_eq!(var4 / (argc + 1) as u128, 61618259944854013736810163053136969792);
+    assert_eq!(var4 / (argc + 2) as u128, 41078839963236009157873442035424646528);
+
+    0
+}

From 9c3cce661f619e21534110755ece02e8d18d5d51 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 15 Jan 2022 11:13:35 -0500
Subject: [PATCH 022/997] Implement simd_neg

---
 src/intrinsic/simd.rs | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index aff27f71d91c..7d7811c87821 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -163,5 +163,26 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         simd_xor: Uint, Int => xor;
     }
 
+    macro_rules! arith_unary {
+        ($($name: ident: $($($p: ident),* => $call: ident),*;)*) => {
+            $(if name == sym::$name {
+                match in_elem.kind() {
+                    $($(ty::$p(_))|* => {
+                        return Ok(bx.$call(args[0].immediate()))
+                    })*
+                    _ => {},
+                }
+                require!(false,
+                         "unsupported operation on `{}` with element `{}`",
+                         in_ty,
+                         in_elem)
+            })*
+        }
+    }
+
+    arith_unary! {
+        simd_neg: Int => neg, Float => fneg;
+    }
+
     unimplemented!("simd {}", name);
 }

From 7aaa87bcd24d82cf9ee50912d71ac304aeef88dc Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sun, 30 Jan 2022 13:21:12 +0100
Subject: [PATCH 023/997] Rustup to rustc 1.60.0-nightly (a00e130da 2022-01-29)

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index cab94c0b8cfa..bf316efc324b 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2021-12-30"
+channel = "nightly-2022-01-30"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From 9c3a1235c5273e01b6e52ea5bbe5e047c7a97778 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sun, 30 Jan 2022 13:38:27 +0100
Subject: [PATCH 024/997] Fix type_kind implementation

---
 src/type_.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/type_.rs b/src/type_.rs
index 3c96cd6afc25..e95058085216 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -121,10 +121,10 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         if self.is_int_type_or_bool(typ) {
             TypeKind::Integer
         }
-        else if typ == self.float_type {
+        else if typ.is_compatible_with(self.float_type) {
             TypeKind::Float
         }
-        else if typ == self.double_type {
+        else if typ.is_compatible_with(self.double_type) {
             TypeKind::Double
         }
         else if typ.dyncast_vector().is_some() {

From 5067ad9edcec36b3aa7e55f4e97e2389eb715e59 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sun, 30 Jan 2022 13:39:41 +0100
Subject: [PATCH 025/997] Replace unimplemented with todo in
 apply_attrs_to_cleanup_callsite

---
 src/builder.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/builder.rs b/src/builder.rs
index f047417d1445..78e765fbc86d 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1255,7 +1255,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn apply_attrs_to_cleanup_callsite(&mut self, _llret: RValue<'gcc>) {
-        unimplemented!();
+        // TODO
     }
 
     fn set_span(&mut self, _span: Span) {}

From 477d102697654e45d1a89e087eb3e0127aeb539d Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Tue, 1 Feb 2022 16:46:48 +0100
Subject: [PATCH 026/997] Move coretests to the 2021 edition

---
 patches/0022-core-Disable-not-compiling-tests.patch | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/patches/0022-core-Disable-not-compiling-tests.patch b/patches/0022-core-Disable-not-compiling-tests.patch
index aae62a938b45..301b3f9bde4d 100644
--- a/patches/0022-core-Disable-not-compiling-tests.patch
+++ b/patches/0022-core-Disable-not-compiling-tests.patch
@@ -22,7 +22,7 @@ index 0000000..46fd999
 +[package]
 +name = "core"
 +version = "0.0.0"
-+edition = "2018"
++edition = "2021"
 +
 +[lib]
 +name = "coretests"

From 4cdcf035a60c4adc8602cd61484c19846d621a25 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jonah=20Br=C3=BCchert?= <jbb@kaidan.im>
Date: Fri, 4 Feb 2022 02:06:46 +0100
Subject: [PATCH 027/997] README: Add compiler-rt cloning step

---
 Readme.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Readme.md b/Readme.md
index 6e333f1b641a..27b30e0fd1b3 100644
--- a/Readme.md
+++ b/Readme.md
@@ -21,6 +21,8 @@ You can also use my [fork of gcc](https://github.com/antoyo/gcc) which already i
 ```bash
 $ git clone https://github.com/rust-lang/rustc_codegen_gcc.git
 $ cd rustc_codegen_gcc
+$ git clone https://github.com/llvm/llvm-project llvm --depth 1 --single-branch
+$ export RUST_COMPILER_RT_ROOT="$PWD/llvm/compiler-rt"
 $ ./prepare_build.sh # download and patch sysroot src
 $ ./build.sh --release
 ```

From d565f6005494532dc0907eb22b9217b139103ea2 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Fri, 25 Feb 2022 11:29:57 +0100
Subject: [PATCH 028/997] Rustup to rustc 1.61.0-nightly (4b043faba 2022-02-24)

---
 ...0024-core-Disable-portable-simd-test.patch | 220 +++++++++++++++++-
 rust-toolchain                                |   2 +-
 2 files changed, 217 insertions(+), 5 deletions(-)

diff --git a/patches/0024-core-Disable-portable-simd-test.patch b/patches/0024-core-Disable-portable-simd-test.patch
index 8954f91021f4..4ffb24cd9a7a 100644
--- a/patches/0024-core-Disable-portable-simd-test.patch
+++ b/patches/0024-core-Disable-portable-simd-test.patch
@@ -7,18 +7,230 @@ Subject: [PATCH] [core] Disable portable-simd test
  library/core/tests/lib.rs | 1 -
  1 file changed, 1 deletion(-)
 
+diff --git a/library/core/src/lib.rs b/library/core/src/lib.rs
+index aa1ad93..95fbf55 100644
+--- a/library/core/src/lib.rs
++++ b/library/core/src/lib.rs
+@@ -398,25 +398,4 @@ pub mod arch {
+     }
+ }
+ 
+-// Pull in the `core_simd` crate directly into libcore. The contents of
+-// `core_simd` are in a different repository: rust-lang/portable-simd.
+-//
+-// `core_simd` depends on libcore, but the contents of this module are
+-// set up in such a way that directly pulling it here works such that the
+-// crate uses this crate as its libcore.
+-#[path = "../../portable-simd/crates/core_simd/src/mod.rs"]
+-#[allow(missing_debug_implementations, dead_code, unsafe_op_in_unsafe_fn, unused_unsafe)]
+-#[allow(rustdoc::bare_urls)]
+-#[unstable(feature = "portable_simd", issue = "86656")]
+-#[cfg(not(all(miri, doctest)))] // Miri does not support all SIMD intrinsics
+-mod core_simd;
+-
+-#[doc = include_str!("../../portable-simd/crates/core_simd/src/core_simd_docs.md")]
+-#[unstable(feature = "portable_simd", issue = "86656")]
+-#[cfg(not(all(miri, doctest)))] // Miri does not support all SIMD intrinsics
+-pub mod simd {
+-    #[unstable(feature = "portable_simd", issue = "86656")]
+-    pub use crate::core_simd::simd::*;
+-}
+-
+ include!("primitive_docs.rs");
+diff --git a/library/core/src/slice/mod.rs b/library/core/src/slice/mod.rs
+index cd38c3a..ad632dc 100644
+--- a/library/core/src/slice/mod.rs
++++ b/library/core/src/slice/mod.rs
+@@ -17,7 +17,6 @@ use crate::ptr;
+ use crate::result::Result;
+ use crate::result::Result::{Err, Ok};
+ #[cfg(not(miri))] // Miri does not support all SIMD intrinsics
+-use crate::simd::{self, Simd};
+ use crate::slice;
+ 
+ #[unstable(
+@@ -3475,123 +3474,6 @@ impl<T> [T] {
+         }
+     }
+ 
+-    /// Split a slice into a prefix, a middle of aligned SIMD types, and a suffix.
+-    ///
+-    /// This is a safe wrapper around [`slice::align_to`], so has the same weak
+-    /// postconditions as that method.  You're only assured that
+-    /// `self.len() == prefix.len() + middle.len() * LANES + suffix.len()`.
+-    ///
+-    /// Notably, all of the following are possible:
+-    /// - `prefix.len() >= LANES`.
+-    /// - `middle.is_empty()` despite `self.len() >= 3 * LANES`.
+-    /// - `suffix.len() >= LANES`.
+-    ///
+-    /// That said, this is a safe method, so if you're only writing safe code,
+-    /// then this can at most cause incorrect logic, not unsoundness.
+-    ///
+-    /// # Panics
+-    ///
+-    /// This will panic if the size of the SIMD type is different from
+-    /// `LANES` times that of the scalar.
+-    ///
+-    /// At the time of writing, the trait restrictions on `Simd<T, LANES>` keeps
+-    /// that from ever happening, as only power-of-two numbers of lanes are
+-    /// supported.  It's possible that, in the future, those restrictions might
+-    /// be lifted in a way that would make it possible to see panics from this
+-    /// method for something like `LANES == 3`.
+-    ///
+-    /// # Examples
+-    ///
+-    /// ```
+-    /// #![feature(portable_simd)]
+-    ///
+-    /// let short = &[1, 2, 3];
+-    /// let (prefix, middle, suffix) = short.as_simd::<4>();
+-    /// assert_eq!(middle, []); // Not enough elements for anything in the middle
+-    ///
+-    /// // They might be split in any possible way between prefix and suffix
+-    /// let it = prefix.iter().chain(suffix).copied();
+-    /// assert_eq!(it.collect::<Vec<_>>(), vec![1, 2, 3]);
+-    ///
+-    /// fn basic_simd_sum(x: &[f32]) -> f32 {
+-    ///     use std::ops::Add;
+-    ///     use std::simd::f32x4;
+-    ///     let (prefix, middle, suffix) = x.as_simd();
+-    ///     let sums = f32x4::from_array([
+-    ///         prefix.iter().copied().sum(),
+-    ///         0.0,
+-    ///         0.0,
+-    ///         suffix.iter().copied().sum(),
+-    ///     ]);
+-    ///     let sums = middle.iter().copied().fold(sums, f32x4::add);
+-    ///     sums.horizontal_sum()
+-    /// }
+-    ///
+-    /// let numbers: Vec<f32> = (1..101).map(|x| x as _).collect();
+-    /// assert_eq!(basic_simd_sum(&numbers[1..99]), 4949.0);
+-    /// ```
+-    #[unstable(feature = "portable_simd", issue = "86656")]
+-    #[cfg(not(miri))] // Miri does not support all SIMD intrinsics
+-    pub fn as_simd<const LANES: usize>(&self) -> (&[T], &[Simd<T, LANES>], &[T])
+-    where
+-        Simd<T, LANES>: AsRef<[T; LANES]>,
+-        T: simd::SimdElement,
+-        simd::LaneCount<LANES>: simd::SupportedLaneCount,
+-    {
+-        // These are expected to always match, as vector types are laid out like
+-        // arrays per <https://llvm.org/docs/LangRef.html#vector-type>, but we
+-        // might as well double-check since it'll optimize away anyhow.
+-        assert_eq!(mem::size_of::<Simd<T, LANES>>(), mem::size_of::<[T; LANES]>());
+-
+-        // SAFETY: The simd types have the same layout as arrays, just with
+-        // potentially-higher alignment, so the de-facto transmutes are sound.
+-        unsafe { self.align_to() }
+-    }
+-
+-    /// Split a slice into a prefix, a middle of aligned SIMD types, and a suffix.
+-    ///
+-    /// This is a safe wrapper around [`slice::align_to_mut`], so has the same weak
+-    /// postconditions as that method.  You're only assured that
+-    /// `self.len() == prefix.len() + middle.len() * LANES + suffix.len()`.
+-    ///
+-    /// Notably, all of the following are possible:
+-    /// - `prefix.len() >= LANES`.
+-    /// - `middle.is_empty()` despite `self.len() >= 3 * LANES`.
+-    /// - `suffix.len() >= LANES`.
+-    ///
+-    /// That said, this is a safe method, so if you're only writing safe code,
+-    /// then this can at most cause incorrect logic, not unsoundness.
+-    ///
+-    /// This is the mutable version of [`slice::as_simd`]; see that for examples.
+-    ///
+-    /// # Panics
+-    ///
+-    /// This will panic if the size of the SIMD type is different from
+-    /// `LANES` times that of the scalar.
+-    ///
+-    /// At the time of writing, the trait restrictions on `Simd<T, LANES>` keeps
+-    /// that from ever happening, as only power-of-two numbers of lanes are
+-    /// supported.  It's possible that, in the future, those restrictions might
+-    /// be lifted in a way that would make it possible to see panics from this
+-    /// method for something like `LANES == 3`.
+-    #[unstable(feature = "portable_simd", issue = "86656")]
+-    #[cfg(not(miri))] // Miri does not support all SIMD intrinsics
+-    pub fn as_simd_mut<const LANES: usize>(&mut self) -> (&mut [T], &mut [Simd<T, LANES>], &mut [T])
+-    where
+-        Simd<T, LANES>: AsMut<[T; LANES]>,
+-        T: simd::SimdElement,
+-        simd::LaneCount<LANES>: simd::SupportedLaneCount,
+-    {
+-        // These are expected to always match, as vector types are laid out like
+-        // arrays per <https://llvm.org/docs/LangRef.html#vector-type>, but we
+-        // might as well double-check since it'll optimize away anyhow.
+-        assert_eq!(mem::size_of::<Simd<T, LANES>>(), mem::size_of::<[T; LANES]>());
+-
+-        // SAFETY: The simd types have the same layout as arrays, just with
+-        // potentially-higher alignment, so the de-facto transmutes are sound.
+-        unsafe { self.align_to_mut() }
+-    }
+-
+     /// Checks if the elements of this slice are sorted.
+     ///
+     /// That is, for each element `a` and its following element `b`, `a <= b` must hold. If the
 diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
-index ec70034..7cd9e21 100644
+index 06c7be0..359e2e7 100644
 --- a/library/core/tests/lib.rs
 +++ b/library/core/tests/lib.rs
-@@ -121,7 +121,6 @@ mod pattern;
- mod pin;
+@@ -75,7 +75,6 @@
+ #![feature(never_type)]
+ #![feature(unwrap_infallible)]
+ #![feature(result_into_ok_or_err)]
+-#![feature(portable_simd)]
+ #![feature(ptr_metadata)]
+ #![feature(once_cell)]
+ #![feature(option_result_contains)]
+@@ -127,7 +126,6 @@ mod pin;
+ mod pin_macro;
  mod ptr;
  mod result;
 -mod simd;
  mod slice;
  mod str;
  mod str_lossy;
--- 
+diff --git a/library/std/src/lib.rs b/library/std/src/lib.rs
+index 5dc586d..b6fc48f 100644
+--- a/library/std/src/lib.rs
++++ b/library/std/src/lib.rs
+@@ -312,7 +312,6 @@
+ #![feature(panic_can_unwind)]
+ #![feature(panic_unwind)]
+ #![feature(platform_intrinsics)]
+-#![feature(portable_simd)]
+ #![feature(prelude_import)]
+ #![feature(ptr_as_uninit)]
+ #![feature(ptr_internals)]
+@@ -508,25 +508,6 @@ pub mod time;
+ #[unstable(feature = "once_cell", issue = "74465")]
+ pub mod lazy;
+ 
+-// Pull in `std_float` crate  into libstd. The contents of
+-// `std_float` are in a different repository: rust-lang/portable-simd.
+-#[path = "../../portable-simd/crates/std_float/src/lib.rs"]
+-#[allow(missing_debug_implementations, dead_code, unsafe_op_in_unsafe_fn, unused_unsafe)]
+-#[allow(rustdoc::bare_urls)]
+-#[unstable(feature = "portable_simd", issue = "86656")]
+-#[cfg(not(all(miri, doctest)))] // Miri does not support all SIMD intrinsics
+-mod std_float;
+-
+-#[cfg(not(all(miri, doctest)))] // Miri does not support all SIMD intrinsics
+-#[doc = include_str!("../../portable-simd/crates/core_simd/src/core_simd_docs.md")]
+-#[unstable(feature = "portable_simd", issue = "86656")]
+-pub mod simd {
+-    #[doc(inline)]
+-    pub use crate::std_float::StdFloat;
+-    #[doc(inline)]
+-    pub use core::simd::*;
+-}
+-
+ #[stable(feature = "futures_api", since = "1.36.0")]
+ pub mod task {
+     //! Types and Traits for working with asynchronous tasks.
+--
 2.26.2.7.g19db9cfb68
 
diff --git a/rust-toolchain b/rust-toolchain
index bf316efc324b..f2d80b78313d 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2022-01-30"
+channel = "nightly-2022-02-25"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From ff6b398f1b8c4b09b716742d7050c6d3c1d7252f Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Fri, 25 Feb 2022 15:19:52 +0100
Subject: [PATCH 029/997] Use bx.switch_to_block where possible

---
 src/builder.rs       |  9 +++------
 src/int.rs           |  6 ++----
 src/intrinsic/mod.rs | 12 ++++--------
 3 files changed, 9 insertions(+), 18 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index c52ab12e56b2..f978ba3b7d05 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -116,8 +116,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         // NOTE: since jumps were added and compare_exchange doesn't expect this, the current blocks in the
         // state need to be updated.
-        self.block = Some(while_block);
-        *self.cx.current_block.borrow_mut() = Some(while_block);
+        self.switch_to_block(while_block);
 
         let comparison_operator =
             match operation {
@@ -134,8 +133,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         // NOTE: since jumps were added in a place rustc does not expect, the current blocks in the
         // state need to be updated.
-        self.block = Some(after_block);
-        *self.cx.current_block.borrow_mut() = Some(after_block);
+        self.switch_to_block(after_block);
 
         return_value.to_rvalue()
     }
@@ -1021,8 +1019,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         // NOTE: since jumps were added in a place rustc does not expect, the current blocks in the
         // state need to be updated.
-        self.block = Some(after_block);
-        *self.cx.current_block.borrow_mut() = Some(after_block);
+        self.switch_to_block(after_block);
 
         variable.to_rvalue()
     }
diff --git a/src/int.rs b/src/int.rs
index a1f28f3f8812..d2df9d2dcb62 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -148,8 +148,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
             // NOTE: since jumps were added in a place rustc does not expect, the current block in the
             // state need to be updated.
-            self.block = Some(after_block);
-            *self.cx.current_block.borrow_mut() = Some(after_block);
+            self.switch_to_block(after_block);
 
             result.to_rvalue()
         }
@@ -494,8 +493,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
             // NOTE: since jumps were added in a place rustc does not expect, the current block in the
             // state need to be updated.
-            self.block = Some(after_block);
-            *self.cx.current_block.borrow_mut() = Some(after_block);
+            self.switch_to_block(after_block);
 
             result.to_rvalue()
         }
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 7cd0f944f2f9..c91986a2b2c0 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -186,8 +186,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                                     // NOTE: since jumps were added in a place
                                     // count_leading_zeroes() does not expect, the current blocks
                                     // in the state need to be updated.
-                                    *self.current_block.borrow_mut() = Some(else_block);
-                                    self.block = Some(else_block);
+                                    self.switch_to_block(else_block);
 
                                     let zeros =
                                         match name {
@@ -200,8 +199,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
 
                                     // NOTE: since jumps were added in a place rustc does not
                                     // expect, the current blocks in the state need to be updated.
-                                    *self.current_block.borrow_mut() = Some(after_block);
-                                    self.block = Some(after_block);
+                                    self.switch_to_block(after_block);
 
                                     result.to_rvalue()
                                 }
@@ -1003,8 +1001,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
             // NOTE: since jumps were added in a place rustc does not
             // expect, the current blocks in the state need to be updated.
-            *self.current_block.borrow_mut() = Some(after_block);
-            self.block = Some(after_block);
+            self.switch_to_block(after_block);
 
             res.to_rvalue()
         }
@@ -1074,8 +1071,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
             // NOTE: since jumps were added in a place rustc does not
             // expect, the current blocks in the state need to be updated.
-            *self.current_block.borrow_mut() = Some(after_block);
-            self.block = Some(after_block);
+            self.switch_to_block(after_block);
 
             res.to_rvalue()
         }

From b48ed38482bc2c12edf10e134c24cf9e51481557 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Fri, 25 Feb 2022 15:27:19 +0100
Subject: [PATCH 030/997] Make bx.block non-optional

---
 src/builder.rs | 62 ++++++++++++++++++++++----------------------------
 1 file changed, 27 insertions(+), 35 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index f978ba3b7d05..0d5b534a1a22 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -80,15 +80,15 @@ impl EnumClone for AtomicOrdering {
 
 pub struct Builder<'a: 'gcc, 'gcc, 'tcx> {
     pub cx: &'a CodegenCx<'gcc, 'tcx>,
-    pub block: Option<Block<'gcc>>,
+    pub block: Block<'gcc>,
     stack_var_count: Cell<usize>,
 }
 
 impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
-    fn with_cx(cx: &'a CodegenCx<'gcc, 'tcx>) -> Self {
+    fn with_cx(cx: &'a CodegenCx<'gcc, 'tcx>, block: Block<'gcc>) -> Self {
         Builder {
             cx,
-            block: None,
+            block,
             stack_var_count: Cell::new(0),
         }
     }
@@ -243,7 +243,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     pub fn current_func(&self) -> Function<'gcc> {
-        self.block.expect("block").get_function()
+        self.block.get_function()
     }
 
     fn function_call(&mut self, func: RValue<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
@@ -254,17 +254,16 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         // gccjit requires to use the result of functions, even when it's not used.
         // That's why we assign the result to a local or call add_eval().
         let return_type = func.get_return_type();
-        let current_block = self.current_block.borrow().expect("block");
         let void_type = self.context.new_type::<()>();
-        let current_func = current_block.get_function();
+        let current_func = self.block.get_function();
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
             let result = current_func.new_local(None, return_type, &format!("returnValue{}", unsafe { RETURN_VALUE_COUNT }));
-            current_block.add_assignment(None, result, self.cx.context.new_call(None, func, &args));
+            self.block.add_assignment(None, result, self.cx.context.new_call(None, func, &args));
             result.to_rvalue()
         }
         else {
-            current_block.add_eval(None, self.cx.context.new_call(None, func, &args));
+            self.block.add_eval(None, self.cx.context.new_call(None, func, &args));
             // Return dummy value when not having return value.
             self.context.new_rvalue_from_long(self.isize_type, 0)
         }
@@ -277,9 +276,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         // That's why we assign the result to a local or call add_eval().
         let gcc_func = func_ptr.get_type().dyncast_function_ptr_type().expect("function ptr");
         let mut return_type = gcc_func.get_return_type();
-        let current_block = self.current_block.borrow().expect("block");
         let void_type = self.context.new_type::<()>();
-        let current_func = current_block.get_function();
+        let current_func = self.block.get_function();
 
         // FIXME(antoyo): As a temporary workaround for unsupported LLVM intrinsics.
         if gcc_func.get_param_count() == 0 && format!("{:?}", func_ptr) == "__builtin_ia32_pmovmskb128" {
@@ -289,20 +287,20 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
             let result = current_func.new_local(None, return_type, &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
-            current_block.add_assignment(None, result, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
+            self.block.add_assignment(None, result, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
             result.to_rvalue()
         }
         else {
             if gcc_func.get_param_count() == 0 {
                 // FIXME(antoyo): As a temporary workaround for unsupported LLVM intrinsics.
-                current_block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &[]));
+                self.block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &[]));
             }
             else {
-                current_block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
+                self.block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
             }
             // Return dummy value when not having return value.
             let result = current_func.new_local(None, self.isize_type, "dummyValueThatShouldNeverBeUsed");
-            current_block.add_assignment(None, result, self.context.new_rvalue_from_long(self.isize_type, 0));
+            self.block.add_assignment(None, result, self.context.new_rvalue_from_long(self.isize_type, 0));
             result.to_rvalue()
         }
     }
@@ -311,12 +309,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         // gccjit requires to use the result of functions, even when it's not used.
         // That's why we assign the result to a local.
         let return_type = self.context.new_type::<bool>();
-        let current_block = self.current_block.borrow().expect("block");
-        let current_func = current_block.get_function();
+        let current_func = self.block.get_function();
         // TODO(antoyo): return the new_call() directly? Since the overflow function has no side-effects.
         unsafe { RETURN_VALUE_COUNT += 1 };
         let result = current_func.new_local(None, return_type, &format!("overflowReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
-        current_block.add_assignment(None, result, self.cx.context.new_call(None, func, &args));
+        self.block.add_assignment(None, result, self.cx.context.new_call(None, func, &args));
         result.to_rvalue()
     }
 }
@@ -382,14 +379,13 @@ impl<'gcc, 'tcx> BackendTypes for Builder<'_, 'gcc, 'tcx> {
 
 impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn build(cx: &'a CodegenCx<'gcc, 'tcx>, block: Block<'gcc>) -> Self {
-        let mut bx = Builder::with_cx(cx);
+        let bx = Builder::with_cx(cx, block);
         *cx.current_block.borrow_mut() = Some(block);
-        bx.block = Some(block);
         bx
     }
 
     fn llbb(&self) -> Block<'gcc> {
-        self.block.expect("block")
+        self.block
     }
 
     fn append_block(cx: &'a CodegenCx<'gcc, 'tcx>, func: RValue<'gcc>, name: &str) -> Block<'gcc> {
@@ -404,7 +400,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn switch_to_block(&mut self, block: Self::BasicBlock) {
         *self.cx.current_block.borrow_mut() = Some(block);
-        self.block = Some(block);
+        self.block = block;
     }
 
     fn ret_void(&mut self) {
@@ -439,7 +435,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             let on_val = self.const_uint_big(typ, on_val);
             gcc_cases.push(self.context.new_case(on_val, on_val, dest));
         }
-        self.block.expect("block").end_with_switch(None, value, default_block, &gcc_cases);
+        self.block.end_with_switch(None, value, default_block, &gcc_cases);
     }
 
     fn invoke(&mut self, _typ: Type<'gcc>, _func: RValue<'gcc>, _args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
@@ -452,17 +448,16 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn unreachable(&mut self) {
         let func = self.context.get_builtin_function("__builtin_unreachable");
-        let block = self.block.expect("block");
-        block.add_eval(None, self.context.new_call(None, func, &[]));
-        let return_type = block.get_function().get_return_type();
+        self.block.add_eval(None, self.context.new_call(None, func, &[]));
+        let return_type = self.block.get_function().get_return_type();
         let void_type = self.context.new_type::<()>();
         if return_type == void_type {
-            block.end_with_void_return(None)
+            self.block.end_with_void_return(None)
         }
         else {
             let return_value = self.current_func()
                 .new_local(None, return_type, "unreachableReturn");
-            block.end_with_return(None, return_value)
+            self.block.end_with_return(None, return_value)
         }
     }
 
@@ -909,11 +904,11 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn ptrtoint(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.cx.ptrtoint(self.block.expect("block"), value, dest_ty)
+        self.cx.ptrtoint(self.block, value, dest_ty)
     }
 
     fn inttoptr(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.cx.inttoptr(self.block.expect("block"), value, dest_ty)
+        self.cx.inttoptr(self.block, value, dest_ty)
     }
 
     fn bitcast(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
@@ -965,9 +960,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let dst = self.pointercast(dst, self.type_i8p());
         let src = self.pointercast(src, self.type_ptr_to(self.type_void()));
         let memcpy = self.context.get_builtin_function("memcpy");
-        let block = self.block.expect("block");
         // TODO(antoyo): handle aligns and is_volatile.
-        block.add_eval(None, self.context.new_call(None, memcpy, &[dst, src, size]));
+        self.block.add_eval(None, self.context.new_call(None, memcpy, &[dst, src, size]));
     }
 
     fn memmove(&mut self, dst: RValue<'gcc>, dst_align: Align, src: RValue<'gcc>, src_align: Align, size: RValue<'gcc>, flags: MemFlags) {
@@ -984,20 +978,18 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let src = self.pointercast(src, self.type_ptr_to(self.type_void()));
 
         let memmove = self.context.get_builtin_function("memmove");
-        let block = self.block.expect("block");
         // TODO(antoyo): handle is_volatile.
-        block.add_eval(None, self.context.new_call(None, memmove, &[dst, src, size]));
+        self.block.add_eval(None, self.context.new_call(None, memmove, &[dst, src, size]));
     }
 
     fn memset(&mut self, ptr: RValue<'gcc>, fill_byte: RValue<'gcc>, size: RValue<'gcc>, _align: Align, flags: MemFlags) {
         let _is_volatile = flags.contains(MemFlags::VOLATILE);
         let ptr = self.pointercast(ptr, self.type_i8p());
         let memset = self.context.get_builtin_function("memset");
-        let block = self.block.expect("block");
         // TODO(antoyo): handle align and is_volatile.
         let fill_byte = self.context.new_cast(None, fill_byte, self.i32_type);
         let size = self.intcast(size, self.type_size_t(), false);
-        block.add_eval(None, self.context.new_call(None, memset, &[ptr, fill_byte, size]));
+        self.block.add_eval(None, self.context.new_call(None, memset, &[ptr, fill_byte, size]));
     }
 
     fn select(&mut self, cond: RValue<'gcc>, then_val: RValue<'gcc>, mut else_val: RValue<'gcc>) -> RValue<'gcc> {

From 07afdb8c0d78e1a83757b87332f6c55004d65189 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Fri, 25 Feb 2022 15:36:08 +0100
Subject: [PATCH 031/997] Use bitcast for ptrtoint and inttoptr

This works now
---
 src/builder.rs |  5 +++--
 src/common.rs  | 29 ++---------------------------
 2 files changed, 5 insertions(+), 29 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 0d5b534a1a22..f5ee9db80a02 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -904,11 +904,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn ptrtoint(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.cx.ptrtoint(self.block, value, dest_ty)
+        let usize_value = self.cx.const_bitcast(value, self.cx.type_isize());
+        self.intcast(usize_value, dest_ty, false)
     }
 
     fn inttoptr(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.cx.inttoptr(self.block, value, dest_ty)
+        self.cx.const_bitcast(value, dest_ty)
     }
 
     fn bitcast(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
diff --git a/src/common.rs b/src/common.rs
index 89a3dc052d83..840cbc70c340 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -1,5 +1,5 @@
 use gccjit::LValue;
-use gccjit::{Block, RValue, Type, ToRValue};
+use gccjit::{RValue, Type, ToRValue};
 use rustc_codegen_ssa::mir::place::PlaceRef;
 use rustc_codegen_ssa::traits::{
     BaseTypeMethods,
@@ -45,27 +45,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         global
         // TODO(antoyo): set linkage.
     }
-
-    pub fn inttoptr(&self, block: Block<'gcc>, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        let func = block.get_function();
-        let local = func.new_local(None, value.get_type(), "intLocal");
-        block.add_assignment(None, local, value);
-        let value_address = local.get_address(None);
-
-        let ptr = self.context.new_cast(None, value_address, dest_ty.make_pointer());
-        ptr.dereference(None).to_rvalue()
-    }
-
-    pub fn ptrtoint(&self, block: Block<'gcc>, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        // TODO(antoyo): when libgccjit allow casting from pointer to int, remove this.
-        let func = block.get_function();
-        let local = func.new_local(None, value.get_type(), "ptrLocal");
-        block.add_assignment(None, local, value);
-        let ptr_address = local.get_address(None);
-
-        let ptr = self.context.new_cast(None, ptr_address, dest_ty.make_pointer());
-        ptr.dereference(None).to_rvalue()
-    }
 }
 
 pub fn bytes_in_context<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, bytes: &[u8]) -> RValue<'gcc> {
@@ -202,11 +181,7 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 }
 
                 let value = self.const_uint_big(self.type_ix(bitsize), data);
-                if layout.value == Pointer {
-                    self.inttoptr(self.current_block.borrow().expect("block"), value, ty)
-                } else {
-                    self.const_bitcast(value, ty)
-                }
+                self.const_bitcast(value, ty)
             }
             Scalar::Ptr(ptr, _size) => {
                 let (alloc_id, offset) = ptr.into_parts();

From 62e9b50f8d894cad16bf514241e1f65bdf582022 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Fri, 25 Feb 2022 15:38:23 +0100
Subject: [PATCH 032/997] Remove current_block field of CodegenCx

This field often had the wrong value when using multiple builders at the
same time.
---
 src/builder.rs | 5 +----
 src/context.rs | 4 +---
 2 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index f5ee9db80a02..0b673f3e91be 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -379,9 +379,7 @@ impl<'gcc, 'tcx> BackendTypes for Builder<'_, 'gcc, 'tcx> {
 
 impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn build(cx: &'a CodegenCx<'gcc, 'tcx>, block: Block<'gcc>) -> Self {
-        let bx = Builder::with_cx(cx, block);
-        *cx.current_block.borrow_mut() = Some(block);
-        bx
+        Builder::with_cx(cx, block)
     }
 
     fn llbb(&self) -> Block<'gcc> {
@@ -399,7 +397,6 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn switch_to_block(&mut self, block: Self::BasicBlock) {
-        *self.cx.current_block.borrow_mut() = Some(block);
         self.block = block;
     }
 
diff --git a/src/context.rs b/src/context.rs
index 795966d81830..91259836f6d9 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -31,8 +31,7 @@ pub struct CodegenCx<'gcc, 'tcx> {
     pub codegen_unit: &'tcx CodegenUnit<'tcx>,
     pub context: &'gcc Context<'gcc>,
 
-    // TODO(antoyo): First set it to a dummy block to avoid using Option?
-    pub current_block: RefCell<Option<Block<'gcc>>>,
+    // TODO(bjorn3): First set it to a dummy function to avoid using Option?
     pub current_func: RefCell<Option<Function<'gcc>>>,
     pub normal_function_addresses: RefCell<FxHashSet<RValue<'gcc>>>,
 
@@ -177,7 +176,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             check_overflow,
             codegen_unit,
             context,
-            current_block: RefCell::new(None),
             current_func: RefCell::new(None),
             normal_function_addresses: Default::default(),
             functions: RefCell::new(functions),

From a7c1c47c8344d9d567968866db7232713b6b8902 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Fri, 25 Feb 2022 17:25:32 +0100
Subject: [PATCH 033/997] Fix review comments

---
 src/builder.rs       | 11 ++++++++---
 src/intrinsic/mod.rs |  8 ++++----
 2 files changed, 12 insertions(+), 7 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 0b673f3e91be..d3513ddde483 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -114,7 +114,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let after_block = func.new_block("after_while");
         self.llbb().end_with_jump(None, while_block);
 
-        // NOTE: since jumps were added and compare_exchange doesn't expect this, the current blocks in the
+        // NOTE: since jumps were added and compare_exchange doesn't expect this, the current block in the
         // state need to be updated.
         self.switch_to_block(while_block);
 
@@ -131,7 +131,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         while_block.end_with_conditional(None, cond, while_block, after_block);
 
-        // NOTE: since jumps were added in a place rustc does not expect, the current blocks in the
+        // NOTE: since jumps were added in a place rustc does not expect, the current block in the
         // state need to be updated.
         self.switch_to_block(after_block);
 
@@ -906,6 +906,11 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn inttoptr(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
+        assert_eq!(
+            value.get_type(),
+            self.cx.type_isize(),
+            "cg_ssa currently only calls this function with an isize argument",
+        );
         self.cx.const_bitcast(value, dest_ty)
     }
 
@@ -1007,7 +1012,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         else_block.add_assignment(None, variable, else_val);
         else_block.end_with_jump(None, after_block);
 
-        // NOTE: since jumps were added in a place rustc does not expect, the current blocks in the
+        // NOTE: since jumps were added in a place rustc does not expect, the current block in the
         // state need to be updated.
         self.switch_to_block(after_block);
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index c91986a2b2c0..81f841e72cf7 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -184,7 +184,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                                     then_block.end_with_jump(None, after_block);
 
                                     // NOTE: since jumps were added in a place
-                                    // count_leading_zeroes() does not expect, the current blocks
+                                    // count_leading_zeroes() does not expect, the current block
                                     // in the state need to be updated.
                                     self.switch_to_block(else_block);
 
@@ -198,7 +198,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                                     self.llbb().end_with_jump(None, after_block);
 
                                     // NOTE: since jumps were added in a place rustc does not
-                                    // expect, the current blocks in the state need to be updated.
+                                    // expect, the current block in the state need to be updated.
                                     self.switch_to_block(after_block);
 
                                     result.to_rvalue()
@@ -1000,7 +1000,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             self.llbb().end_with_conditional(None, overflow, then_block, after_block);
 
             // NOTE: since jumps were added in a place rustc does not
-            // expect, the current blocks in the state need to be updated.
+            // expect, the current block in the state need to be updated.
             self.switch_to_block(after_block);
 
             res.to_rvalue()
@@ -1070,7 +1070,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             self.llbb().end_with_conditional(None, overflow, then_block, after_block);
 
             // NOTE: since jumps were added in a place rustc does not
-            // expect, the current blocks in the state need to be updated.
+            // expect, the current block in the state need to be updated.
             self.switch_to_block(after_block);
 
             res.to_rvalue()

From 3e35fab71e5b4fe3cc1aa5330c1fd9208ace0dd9 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sat, 26 Feb 2022 09:41:37 +0100
Subject: [PATCH 034/997] Fix inttoptr

---
 src/builder.rs | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index d3513ddde483..580996fdefc8 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -906,12 +906,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn inttoptr(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        assert_eq!(
-            value.get_type(),
-            self.cx.type_isize(),
-            "cg_ssa currently only calls this function with an isize argument",
-        );
-        self.cx.const_bitcast(value, dest_ty)
+        let usize_value = self.intcast(value, self.cx.type_isize(), false);
+        self.cx.const_bitcast(usize_value, dest_ty)
     }
 
     fn bitcast(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {

From 9d098424cd772ab067b0f8ecb67a7eadbe9d028c Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sat, 26 Feb 2022 18:29:23 +0100
Subject: [PATCH 035/997] Add and change a TODO

---
 src/common.rs  | 1 +
 src/context.rs | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/common.rs b/src/common.rs
index 840cbc70c340..e36e5bb2382d 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -181,6 +181,7 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 }
 
                 let value = self.const_uint_big(self.type_ix(bitsize), data);
+                // TODO(bjorn3): assert size is correct
                 self.const_bitcast(value, ty)
             }
             Scalar::Ptr(ptr, _size) => {
diff --git a/src/context.rs b/src/context.rs
index 91259836f6d9..d20356b12664 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -31,7 +31,7 @@ pub struct CodegenCx<'gcc, 'tcx> {
     pub codegen_unit: &'tcx CodegenUnit<'tcx>,
     pub context: &'gcc Context<'gcc>,
 
-    // TODO(bjorn3): First set it to a dummy function to avoid using Option?
+    // TODO(bjorn3): Can this field be removed?
     pub current_func: RefCell<Option<Function<'gcc>>>,
     pub normal_function_addresses: RefCell<FxHashSet<RValue<'gcc>>>,
 

From f7063174a4681b8194d7e2e48305d59ccf98b795 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sat, 26 Feb 2022 10:13:56 +0100
Subject: [PATCH 036/997] Support -Cpanic=unwind without unwinding

---
 src/builder.rs       | 15 ++++++++-------
 src/intrinsic/mod.rs |  4 +++-
 2 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 580996fdefc8..f1c9d0a78170 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -435,12 +435,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.block.end_with_switch(None, value, default_block, &gcc_cases);
     }
 
-    fn invoke(&mut self, _typ: Type<'gcc>, _func: RValue<'gcc>, _args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
-        let condition = self.context.new_rvalue_from_int(self.bool_type, 0);
+    fn invoke(&mut self, typ: Type<'gcc>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
+        // TODO(bjorn3): Properly implement unwinding.
+        let call_site = self.call(typ, func, args, None);
+        let condition = self.context.new_rvalue_from_int(self.bool_type, 1);
         self.llbb().end_with_conditional(None, condition, then, catch);
-        self.context.new_rvalue_from_int(self.int_type, 0)
-
-        // TODO(antoyo)
+        call_site
     }
 
     fn unreachable(&mut self) {
@@ -1106,7 +1106,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn cleanup_landing_pad(&mut self, _ty: Type<'gcc>, _pers_fn: RValue<'gcc>) -> RValue<'gcc> {
-        let field1 = self.context.new_field(None, self.u8_type, "landing_pad_field_1");
+        let field1 = self.context.new_field(None, self.u8_type.make_pointer(), "landing_pad_field_1");
         let field2 = self.context.new_field(None, self.i32_type, "landing_pad_field_1");
         let struct_type = self.context.new_struct_type(None, "landing_pad", &[field1, field2]);
         self.current_func().new_local(None, struct_type.as_type(), "landing_pad")
@@ -1117,7 +1117,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn resume(&mut self, _exn: RValue<'gcc>) {
-        unimplemented!();
+        // TODO(bjorn3): Properly implement unwinding.
+        self.unreachable();
     }
 
     fn cleanup_pad(&mut self, _parent: Option<RValue<'gcc>>, _args: &[RValue<'gcc>]) -> Funclet {
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 81f841e72cf7..5e3eef67df5a 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1086,7 +1086,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 }
 
 fn try_intrinsic<'gcc, 'tcx>(bx: &mut Builder<'_, 'gcc, 'tcx>, try_func: RValue<'gcc>, data: RValue<'gcc>, _catch_func: RValue<'gcc>, dest: RValue<'gcc>) {
-    if bx.sess().panic_strategy() == PanicStrategy::Abort {
+    // NOTE: the `|| true` here is to use the panic=abort strategy with panic=unwind too
+    if bx.sess().panic_strategy() == PanicStrategy::Abort || true {
+        // TODO(bjorn3): Properly implement unwinding and remove the `|| true` once this is done.
         bx.call(bx.type_void(), try_func, &[data], None);
         // Return 0 unconditionally from the intrinsic call;
         // we can never unwind.

From ac4baf3fd632100e68b5f8830a5c077005eeac23 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sat, 26 Feb 2022 19:11:58 +0100
Subject: [PATCH 037/997] Allow unreachable blocks for now

The cleanup blocks normally executed when unwinding are unreachable for
now as unwinding is not yet implemented.
---
 Cargo.lock  | 4 ++--
 src/base.rs | 3 +++
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index d4c407b0974f..a4499d0ea8c6 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#cbb07c6601ba4246fc2967c4d770403c57192ca2"
+source = "git+https://github.com/antoyo/gccjit.rs#b9f188d2ce2c7b12211e90903f1b2cf309785b85"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#cbb07c6601ba4246fc2967c4d770403c57192ca2"
+source = "git+https://github.com/antoyo/gccjit.rs#b9f188d2ce2c7b12211e90903f1b2cf309785b85"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/src/base.rs b/src/base.rs
index 6808993182a0..f5aca35cdcbc 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -105,6 +105,9 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
             context.set_keep_intermediates(true);
         }
 
+        // TODO(bjorn3): Remove once unwinding is properly implemented
+        context.set_allow_unreachable_blocks(true);
+
         {
             let cx = CodegenCx::new(&context, cgu, tcx, supports_128bit_integers);
 

From beb1767842fd06b2c3231bfddbd2b8a2406ea66a Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sat, 26 Feb 2022 09:59:37 +0100
Subject: [PATCH 038/997] Don't export global allocs which are not statics

They aren't be referenced outside of the current cgu anyway. This should make
optimizations a bit more effective.
---
 src/consts.rs  | 8 ++------
 src/context.rs | 8 --------
 src/declare.rs | 8 +++-----
 3 files changed, 5 insertions(+), 19 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index 5275667b864f..598bcdc31b6f 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -170,11 +170,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             match kind {
                 Some(kind) if !self.tcx.sess.fewer_names() => {
                     let name = self.generate_local_symbol_name(kind);
-                    // TODO(antoyo): check if it's okay that TLS is off here.
-                    // TODO(antoyo): check if it's okay that link_section is None here.
+                    // TODO(antoyo): check if it's okay that no link_section is set.
                     // TODO(antoyo): set alignment here as well.
-                    let global = self.define_global(&name[..], self.val_ty(cv), false, None);
-                    // TODO(antoyo): set linkage.
+                    let global = self.declare_private_global(&name[..], self.val_ty(cv));
                     global
                 }
                 _ => {
@@ -183,8 +181,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
                     global
                 },
             };
-        // FIXME(antoyo): I think the name coming from generate_local_symbol_name() above cannot be used
-        // globally.
         global.global_set_initializer_rvalue(cv);
         // TODO(antoyo): set unnamed address.
         let rvalue = global.get_address(None);
diff --git a/src/context.rs b/src/context.rs
index d20356b12664..fa556b0b7f2f 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -18,7 +18,6 @@ use rustc_target::abi::{call::FnAbi, HasDataLayout, PointeeInfo, Size, TargetDat
 use rustc_target::spec::{HasTargetSpec, Target, TlsModel};
 
 use crate::callee::get_fn;
-use crate::declare::mangle_name;
 
 #[derive(Clone)]
 pub struct FuncSig<'gcc> {
@@ -96,7 +95,6 @@ pub struct CodegenCx<'gcc, 'tcx> {
 
     /// A counter that is used for generating local symbol names
     local_gen_sym_counter: Cell<usize>,
-    pub global_gen_sym_counter: Cell<usize>,
 
     eh_personality: Cell<Option<RValue<'gcc>>>,
 
@@ -221,7 +219,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             struct_types: Default::default(),
             types_with_fields_to_set: Default::default(),
             local_gen_sym_counter: Cell::new(0),
-            global_gen_sym_counter: Cell::new(0),
             eh_personality: Cell::new(None),
             pointee_infos: Default::default(),
             structs_as_pointer: Default::default(),
@@ -503,11 +500,6 @@ impl<'b, 'tcx> CodegenCx<'b, 'tcx> {
     }
 }
 
-pub fn unit_name<'tcx>(codegen_unit: &CodegenUnit<'tcx>) -> String {
-    let name = &codegen_unit.name().to_string();
-    mangle_name(&name.replace('-', "_"))
-}
-
 fn to_gcc_tls_mode(tls_model: TlsModel) -> gccjit::TlsModel {
     match tls_model {
         TlsModel::GeneralDynamic => gccjit::TlsModel::GlobalDynamic,
diff --git a/src/declare.rs b/src/declare.rs
index ec6f8ea4dde0..4bd7a17381d0 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -5,7 +5,7 @@ use rustc_span::Symbol;
 use rustc_target::abi::call::FnAbi;
 
 use crate::abi::FnAbiGccExt;
-use crate::context::{CodegenCx, unit_name};
+use crate::context::CodegenCx;
 use crate::intrinsic::llvm;
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
@@ -27,10 +27,8 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     pub fn declare_unnamed_global(&self, ty: Type<'gcc>) -> LValue<'gcc> {
-        let index = self.global_gen_sym_counter.get();
-        self.global_gen_sym_counter.set(index + 1);
-        let name = format!("global_{}_{}", index, unit_name(&self.codegen_unit));
-        self.context.new_global(None, GlobalKind::Exported, ty, &name)
+        let name = self.generate_local_symbol_name("global");
+        self.context.new_global(None, GlobalKind::Internal, ty, &name)
     }
 
     pub fn declare_global_with_linkage(&self, name: &str, ty: Type<'gcc>, linkage: GlobalKind) -> LValue<'gcc> {

From dcc0853a34325b0a928ce6cbbbf184423ceaff25 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 27 Feb 2022 13:46:57 -0500
Subject: [PATCH 039/997] Add support for on_stack parameters

---
 Cargo.lock           |  4 ++--
 src/abi.rs           | 37 ++++++++++++++++++++++++++++---------
 src/builder.rs       | 25 +++++++++++++++----------
 src/context.rs       | 10 +++++++++-
 src/declare.rs       |  3 ++-
 src/intrinsic/mod.rs | 10 +++++-----
 6 files changed, 61 insertions(+), 28 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index a4499d0ea8c6..a1d9f2f5e382 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#b9f188d2ce2c7b12211e90903f1b2cf309785b85"
+source = "git+https://github.com/antoyo/gccjit.rs#bdecdecfb8a02ec861a39a350f990faa33bd31c3"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#b9f188d2ce2c7b12211e90903f1b2cf309785b85"
+source = "git+https://github.com/antoyo/gccjit.rs#bdecdecfb8a02ec861a39a350f990faa33bd31c3"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/src/abi.rs b/src/abi.rs
index a8b1e70e2bb8..2c796d0f69e5 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -1,5 +1,6 @@
-use gccjit::{ToRValue, Type};
+use gccjit::{ToLValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{AbiBuilderMethods, BaseTypeMethods};
+use rustc_data_structures::stable_set::FxHashSet;
 use rustc_middle::bug;
 use rustc_middle::ty::Ty;
 use rustc_target::abi::call::{CastTarget, FnAbi, PassMode, Reg, RegKind};
@@ -15,9 +16,21 @@ impl<'a, 'gcc, 'tcx> AbiBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn get_param(&mut self, index: usize) -> Self::Value {
-        self.cx.current_func.borrow().expect("current func")
-            .get_param(index as i32)
-            .to_rvalue()
+        let func = self.current_func();
+        let param = func.get_param(index as i32);
+        let on_stack =
+            if let Some(on_stack_param_indices) = self.on_stack_function_params.borrow().get(&func) {
+                on_stack_param_indices.contains(&index)
+            }
+            else {
+                false
+            };
+        if on_stack {
+            param.to_lvalue().get_address(None)
+        }
+        else {
+            param.to_rvalue()
+        }
     }
 }
 
@@ -87,12 +100,13 @@ impl GccType for Reg {
 
 pub trait FnAbiGccExt<'gcc, 'tcx> {
     // TODO(antoyo): return a function pointer type instead?
-    fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool);
+    fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool, FxHashSet<usize>);
     fn ptr_to_gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc>;
 }
 
 impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
-    fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool) {
+    fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool, FxHashSet<usize>) {
+        let mut on_stack_param_indices = FxHashSet::default();
         let args_capacity: usize = self.args.iter().map(|arg|
             if arg.pad.is_some() {
                 1
@@ -144,17 +158,22 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
                     unimplemented!();
                 }
                 PassMode::Cast(cast) => cast.gcc_type(cx),
-                PassMode::Indirect { extra_attrs: None, .. } => cx.type_ptr_to(arg.memory_ty(cx)),
+                PassMode::Indirect { extra_attrs: None, on_stack: true, .. } => {
+                    on_stack_param_indices.insert(argument_tys.len());
+                    arg.memory_ty(cx)
+                },
+                PassMode::Indirect { extra_attrs: None, on_stack: false, .. } => cx.type_ptr_to(arg.memory_ty(cx)),
             };
             argument_tys.push(arg_ty);
         }
 
-        (return_ty, argument_tys, self.c_variadic)
+        (return_ty, argument_tys, self.c_variadic, on_stack_param_indices)
     }
 
     fn ptr_to_gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc> {
-        let (return_type, params, variadic) = self.gcc_type(cx);
+        let (return_type, params, variadic, on_stack_param_indices) = self.gcc_type(cx);
         let pointer_type = cx.context.new_function_pointer_type(None, return_type, &params, variadic);
+        cx.on_stack_params.borrow_mut().insert(pointer_type.dyncast_function_ptr_type().expect("function ptr type"), on_stack_param_indices);
         pointer_type
     }
 }
diff --git a/src/builder.rs b/src/builder.rs
index f1c9d0a78170..4aa9b5341fe6 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -30,6 +30,7 @@ use rustc_codegen_ssa::traits::{
     OverflowOp,
     StaticBuilderMethods,
 };
+use rustc_data_structures::stable_set::FxHashSet;
 use rustc_middle::ty::{ParamEnv, Ty, TyCtxt};
 use rustc_middle::ty::layout::{FnAbiError, FnAbiOfHelpers, FnAbiRequest, HasParamEnv, HasTyCtxt, LayoutError, LayoutOfHelpers, TyAndLayout};
 use rustc_span::Span;
@@ -207,6 +208,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             param_types.push(param);
         }
 
+        let mut on_stack_param_indices = FxHashSet::default();
+        if let Some(indices) = self.on_stack_params.borrow().get(&gcc_func) {
+            on_stack_param_indices = indices.clone();
+        }
+
         if all_args_match {
             return Cow::Borrowed(args);
         }
@@ -215,10 +221,15 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             .into_iter()
             .zip(args.iter())
             .enumerate()
-            .map(|(_i, (expected_ty, &actual_val))| {
+            .map(|(index, (expected_ty, &actual_val))| {
                 let actual_ty = actual_val.get_type();
                 if expected_ty != actual_ty {
-                    self.bitcast(actual_val, expected_ty)
+                    if on_stack_param_indices.contains(&index) {
+                        actual_val.dereference(None).to_rvalue()
+                    }
+                    else {
+                        self.bitcast(actual_val, expected_ty)
+                    }
                 }
                 else {
                     actual_val
@@ -946,14 +957,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     /* Miscellaneous instructions */
-    fn memcpy(&mut self, dst: RValue<'gcc>, dst_align: Align, src: RValue<'gcc>, src_align: Align, size: RValue<'gcc>, flags: MemFlags) {
-        if flags.contains(MemFlags::NONTEMPORAL) {
-            // HACK(nox): This is inefficient but there is no nontemporal memcpy.
-            let val = self.load(src.get_type(), src, src_align);
-            let ptr = self.pointercast(dst, self.type_ptr_to(self.val_ty(val)));
-            self.store_with_flags(val, ptr, dst_align, flags);
-            return;
-        }
+    fn memcpy(&mut self, dst: RValue<'gcc>, _dst_align: Align, src: RValue<'gcc>, _src_align: Align, size: RValue<'gcc>, flags: MemFlags) {
+        assert!(!flags.contains(MemFlags::NONTEMPORAL), "non-temporal memcpy not supported");
         let size = self.intcast(size, self.type_size_t(), false);
         let _is_volatile = flags.contains(MemFlags::VOLATILE);
         let dst = self.pointercast(dst, self.type_i8p());
diff --git a/src/context.rs b/src/context.rs
index fa556b0b7f2f..d411ccdb8212 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -1,6 +1,6 @@
 use std::cell::{Cell, RefCell};
 
-use gccjit::{Block, CType, Context, Function, FunctionType, LValue, RValue, Struct, Type};
+use gccjit::{Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, RValue, Struct, Type};
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::traits::{
     BackendTypes,
@@ -81,6 +81,12 @@ pub struct CodegenCx<'gcc, 'tcx> {
     /// Cache generated vtables
     pub vtables: RefCell<FxHashMap<(Ty<'tcx>, Option<ty::PolyExistentialTraitRef<'tcx>>), RValue<'gcc>>>,
 
+    // TODO(antoyo): improve the SSA API to not require those.
+    // Mapping from function pointer type to indexes of on stack parameters.
+    pub on_stack_params: RefCell<FxHashMap<FunctionPtrType<'gcc>, FxHashSet<usize>>>,
+    // Mapping from function to indexes of on stack parameters.
+    pub on_stack_function_params: RefCell<FxHashMap<Function<'gcc>, FxHashSet<usize>>>,
+
     /// Cache of emitted const globals (value -> global)
     pub const_globals: RefCell<FxHashMap<RValue<'gcc>, RValue<'gcc>>>,
     /// Map from the address of a global variable (rvalue) to the global variable itself (lvalue).
@@ -208,6 +214,8 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             linkage: Cell::new(FunctionType::Internal),
             instances: Default::default(),
             function_instances: Default::default(),
+            on_stack_params: Default::default(),
+            on_stack_function_params: Default::default(),
             vtables: Default::default(),
             const_globals: Default::default(),
             global_lvalues: Default::default(),
diff --git a/src/declare.rs b/src/declare.rs
index 4bd7a17381d0..43017376916d 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -80,8 +80,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     pub fn declare_fn(&self, name: &str, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> RValue<'gcc> {
-        let (return_type, params, variadic) = fn_abi.gcc_type(self);
+        let (return_type, params, variadic, on_stack_param_indices) = fn_abi.gcc_type(self);
         let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, &params, variadic);
+        self.on_stack_function_params.borrow_mut().insert(func, on_stack_param_indices);
         // FIXME(antoyo): this is a wrong cast. That requires changing the compiler API.
         unsafe { std::mem::transmute(func) }
     }
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 5e3eef67df5a..d4b1dd5ca16f 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -464,17 +464,17 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
             val.to_rvalue()
         };
         match self.mode {
-            PassMode::Ignore => {}
+            PassMode::Ignore => {},
             PassMode::Pair(..) => {
                 OperandValue::Pair(next(), next()).store(bx, dst);
-            }
+            },
             PassMode::Indirect { extra_attrs: Some(_), .. } => {
                 OperandValue::Ref(next(), Some(next()), self.layout.align.abi).store(bx, dst);
-            }
+            },
             PassMode::Direct(_) | PassMode::Indirect { extra_attrs: None, .. } | PassMode::Cast(_) => {
                 let next_arg = next();
-                self.store(bx, next_arg.to_rvalue(), dst);
-            }
+                self.store(bx, next_arg, dst);
+            },
         }
     }
 }

From 7c1f863d74cf8e2c1eb039a38e1d6e9d62b9f390 Mon Sep 17 00:00:00 2001
From: lightning1141 <lightning1141@gmail.com>
Date: Tue, 8 Mar 2022 11:40:28 +0800
Subject: [PATCH 040/997] Stop removing the llvm-asm tests in test.sh since
 they don't exist anymore

---
 test.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/test.sh b/test.sh
index ebe663a0b742..1a5b89d3704e 100755
--- a/test.sh
+++ b/test.sh
@@ -187,13 +187,12 @@ EOF
 
     git checkout -- src/test/ui/issues/auxiliary/issue-3136-a.rs # contains //~ERROR, but shouldn't be removed
 
-    rm -r src/test/ui/{abi*,extern/,llvm-asm/,panic-runtime/,panics/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,simd*,borrowck/,test*,*lto*.rs} || true
+    rm -r src/test/ui/{abi*,extern/,panic-runtime/,panics/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,simd*,borrowck/,test*,*lto*.rs} || true
     for test in $(rg --files-with-matches "catch_unwind|should_panic|thread|lto" src/test/ui); do
       rm $test
     done
     git checkout src/test/ui/type-alias-impl-trait/auxiliary/cross_crate_ice.rs
     git checkout src/test/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
-    rm src/test/ui/llvm-asm/llvm-asm-in-out-operand.rs || true # TODO(antoyo): Enable back this test if I ever implement the llvm_asm! macro.
 
     RUSTC_ARGS="-Zpanic-abort-tests -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot -Cpanic=abort"
 

From 12f782edfaccc3914aef3c92c1302161015356aa Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 18 Mar 2022 23:31:02 -0400
Subject: [PATCH 041/997] Fix version of compiler_builtins to fix compilation
 failure

---
 build_sysroot/Cargo.toml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build_sysroot/Cargo.toml b/build_sysroot/Cargo.toml
index cfadf47cc3f8..05863471cb1e 100644
--- a/build_sysroot/Cargo.toml
+++ b/build_sysroot/Cargo.toml
@@ -5,7 +5,7 @@ version = "0.0.0"
 
 [dependencies]
 core = { path = "./sysroot_src/library/core" }
-compiler_builtins = "0.1"
+compiler_builtins = "=0.1.70" # TODO: update back to "0.1" when updating to latest nightly.
 alloc = { path = "./sysroot_src/library/alloc" }
 std = { path = "./sysroot_src/library/std", features = ["panic_unwind", "backtrace"] }
 test = { path = "./sysroot_src/library/test" }

From be9789bf01b2f6b9a83a0b0b5817347426a69439 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 8 Mar 2022 17:05:32 -0500
Subject: [PATCH 042/997] Fix ice in box alloc

---
 example/mini_core.rs | 16 +++++++++++++---
 src/type_of.rs       |  4 +++-
 2 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/example/mini_core.rs b/example/mini_core.rs
index 1067cee88148..d70df9051609 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -443,12 +443,22 @@ pub trait Deref {
     fn deref(&self) -> &Self::Target;
 }
 
+pub trait Allocator {
+}
+
+pub struct Global;
+
+impl Allocator for Global {}
+
 #[lang = "owned_box"]
-pub struct Box<T: ?Sized>(*mut T);
+pub struct Box<
+    T: ?Sized,
+    A: Allocator = Global,
+>(*mut T, A);
 
 impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<Box<U>> for Box<T> {}
 
-impl<T: ?Sized> Drop for Box<T> {
+impl<T: ?Sized, A: Allocator> Drop for Box<T, A> {
     fn drop(&mut self) {
         // drop is currently performed by compiler.
     }
@@ -468,7 +478,7 @@ unsafe fn allocate(size: usize, _align: usize) -> *mut u8 {
 }
 
 #[lang = "box_free"]
-unsafe fn box_free<T: ?Sized>(ptr: *mut T) {
+unsafe fn box_free<T: ?Sized, A: Allocator>(ptr: *mut T, alloc: A) {
     libc::free(ptr as *mut u8);
 }
 
diff --git a/src/type_of.rs b/src/type_of.rs
index 0ada20cad2c3..76a98adbf3c2 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -251,7 +251,9 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
             ty::Ref(..) | ty::RawPtr(_) => {
                 return self.field(cx, index).gcc_type(cx, true);
             }
-            ty::Adt(def, _) if def.is_box() => {
+            // only wide pointer boxes are handled as pointers
+            // thin pointer boxes with scalar allocators are handled by the general logic below
+            ty::Adt(def, substs) if def.is_box() && cx.layout_of(substs.type_at(1)).is_zst() => {
                 let ptr_ty = cx.tcx.mk_mut_ptr(self.ty.boxed_ty());
                 return cx.layout_of(ptr_ty).scalar_pair_element_gcc_type(cx, index, immediate);
             }

From 0fb350f37c71fc0fb9537dd0736449d0fffb8653 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 19 Mar 2022 12:15:26 -0400
Subject: [PATCH 043/997] Fix shift of unsigned integer by signed integer

---
 src/int.rs       | 9 ++-------
 tests/run/int.rs | 2 ++
 2 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/src/int.rs b/src/int.rs
index d2df9d2dcb62..c3ed71ff7303 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -68,14 +68,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let a_native = self.is_native_int_type(a_type);
         let b_native = self.is_native_int_type(b_type);
         if a_native && b_native {
-            // FIXME(antoyo): remove the casts when libgccjit can shift an unsigned number by an unsigned number.
+            // FIXME(antoyo): remove the casts when libgccjit can shift an unsigned number by a signed number.
             // TODO(antoyo): cast to unsigned to do a logical shift if that does not work.
-            if a_type.is_unsigned(self) && b_type.is_signed(self) {
-                let a = self.context.new_cast(None, a, b_type);
-                let result = a >> b;
-                self.context.new_cast(None, result, a_type)
-            }
-            else if a_type.is_signed(self) && b_type.is_unsigned(self) {
+            if a_type.is_signed(self) != b_type.is_signed(self) {
                 let b = self.context.new_cast(None, b, a_type);
                 a >> b
             }
diff --git a/tests/run/int.rs b/tests/run/int.rs
index 7a62fc7d1f78..49376012c40e 100644
--- a/tests/run/int.rs
+++ b/tests/run/int.rs
@@ -71,6 +71,8 @@ fn main(argc: isize, _argv: *const *const u8) -> isize {
     assert_eq!(var3 << (argc + 62) as u128, 96618259944854013731572476686437974016);
     assert_eq!(var3 << (argc + 63) as u128, 193236519889708027463144953372875948032);
 
+    assert_eq!((2220326408_u32 + argc as u32) >> (32 - 6), 33);
+
     assert_eq!(var >> (argc as u128 - 1), var);
     assert_eq!(var >> argc as u128, 67108928);
     assert_eq!(var >> (argc + 32) as u128, 0);

From 72306608e0995f01e069f230ec55486c816e2600 Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Wed, 23 Mar 2022 23:16:45 +0900
Subject: [PATCH 044/997] Add a simple argument parser to `build.sh`

---
 build.sh | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/build.sh b/build.sh
index 8a621e12b04e..7e8a5ecd88ee 100755
--- a/build.sh
+++ b/build.sh
@@ -3,6 +3,21 @@
 #set -x
 set -e
 
+codegen_channel=debug
+
+while [[ $# -gt 0 ]]; do
+    case $1 in
+        --release)
+            codegen_channel=release
+            shift
+            ;;
+        *)
+            echo "Unknown option $1"
+            exit 1
+            ;;
+    esac
+done
+
 if [ -f ./gcc_path ]; then
     export GCC_PATH=$(cat gcc_path)
 else
@@ -21,7 +36,7 @@ if [[ "$1" == "--features" ]]; then
     shift
 fi
 
-if [[ "$1" == "--release" ]]; then
+if [[ "$codegen_channel" == "release" ]]; then
     export CHANNEL='release'
     CARGO_INCREMENTAL=1 cargo rustc --release $features
 else
@@ -37,3 +52,4 @@ mkdir -p target/out/gccjit
 
 echo "[BUILD] sysroot"
 time ./build_sysroot/build_sysroot.sh $CHANNEL
+

From 842a5fba1ce9c82389f529ca88bb586749308f5c Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Wed, 23 Mar 2022 23:18:33 +0900
Subject: [PATCH 045/997] Add `--release-sysroot` flag to `build.sh`

When this flag is present, `build.sh` will pass `--release` to
`build_sysroot.sh`.
---
 build.sh | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/build.sh b/build.sh
index 7e8a5ecd88ee..230ab7b6d42b 100755
--- a/build.sh
+++ b/build.sh
@@ -4,6 +4,7 @@
 set -e
 
 codegen_channel=debug
+sysroot_channel=debug
 
 while [[ $# -gt 0 ]]; do
     case $1 in
@@ -11,6 +12,10 @@ while [[ $# -gt 0 ]]; do
             codegen_channel=release
             shift
             ;;
+        --release-sysroot)
+            sysroot_channel=release
+            shift
+            ;;
         *)
             echo "Unknown option $1"
             exit 1
@@ -51,5 +56,9 @@ rm -r target/out || true
 mkdir -p target/out/gccjit
 
 echo "[BUILD] sysroot"
-time ./build_sysroot/build_sysroot.sh $CHANNEL
+if [[ "$sysroot_channel" == "release" ]]; then
+    time ./build_sysroot/build_sysroot.sh --release
+else
+    time ./build_sysroot/build_sysroot.sh
+fi
 

From 6faa6a28ba165ff225a4865604189f0b681cbd47 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sat, 26 Mar 2022 14:12:44 +0100
Subject: [PATCH 046/997] Rustup to rustc 1.61.0-nightly (d53246fed 2022-03-25)

---
 example/mini_core.rs                          |  4 +++
 ...0024-core-Disable-portable-simd-test.patch | 20 +++++---------
 ...0028-core-Disable-long-running-tests.patch | 26 ++++++++++---------
 rust-toolchain                                |  2 +-
 src/builder.rs                                |  2 +-
 src/lib.rs                                    |  6 +++++
 6 files changed, 32 insertions(+), 28 deletions(-)

diff --git a/example/mini_core.rs b/example/mini_core.rs
index d70df9051609..a8435287d9fd 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -14,6 +14,9 @@ unsafe extern "C" fn _Unwind_Resume() {
 #[lang = "sized"]
 pub trait Sized {}
 
+#[lang = "destruct"]
+pub trait Destruct {}
+
 #[lang = "unsize"]
 pub trait Unsize<T: ?Sized> {}
 
@@ -59,6 +62,7 @@ unsafe impl Copy for i16 {}
 unsafe impl Copy for i32 {}
 unsafe impl Copy for isize {}
 unsafe impl Copy for f32 {}
+unsafe impl Copy for f64 {}
 unsafe impl Copy for char {}
 unsafe impl<'a, T: ?Sized> Copy for &'a T {}
 unsafe impl<T: ?Sized> Copy for *const T {}
diff --git a/patches/0024-core-Disable-portable-simd-test.patch b/patches/0024-core-Disable-portable-simd-test.patch
index 4ffb24cd9a7a..03900ba101a9 100644
--- a/patches/0024-core-Disable-portable-simd-test.patch
+++ b/patches/0024-core-Disable-portable-simd-test.patch
@@ -11,7 +11,7 @@ diff --git a/library/core/src/lib.rs b/library/core/src/lib.rs
 index aa1ad93..95fbf55 100644
 --- a/library/core/src/lib.rs
 +++ b/library/core/src/lib.rs
-@@ -398,25 +398,4 @@ pub mod arch {
+@@ -398,23 +398,4 @@ pub mod arch {
      }
  }
  
@@ -25,12 +25,10 @@ index aa1ad93..95fbf55 100644
 -#[allow(missing_debug_implementations, dead_code, unsafe_op_in_unsafe_fn, unused_unsafe)]
 -#[allow(rustdoc::bare_urls)]
 -#[unstable(feature = "portable_simd", issue = "86656")]
--#[cfg(not(all(miri, doctest)))] // Miri does not support all SIMD intrinsics
 -mod core_simd;
 -
 -#[doc = include_str!("../../portable-simd/crates/core_simd/src/core_simd_docs.md")]
 -#[unstable(feature = "portable_simd", issue = "86656")]
--#[cfg(not(all(miri, doctest)))] // Miri does not support all SIMD intrinsics
 -pub mod simd {
 -    #[unstable(feature = "portable_simd", issue = "86656")]
 -    pub use crate::core_simd::simd::*;
@@ -41,15 +39,14 @@ diff --git a/library/core/src/slice/mod.rs b/library/core/src/slice/mod.rs
 index cd38c3a..ad632dc 100644
 --- a/library/core/src/slice/mod.rs
 +++ b/library/core/src/slice/mod.rs
-@@ -17,7 +17,6 @@ use crate::ptr;
+@@ -17,6 +17,5 @@ use crate::ptr;
  use crate::result::Result;
  use crate::result::Result::{Err, Ok};
- #[cfg(not(miri))] // Miri does not support all SIMD intrinsics
 -use crate::simd::{self, Simd};
  use crate::slice;
  
  #[unstable(
-@@ -3475,123 +3474,6 @@ impl<T> [T] {
+@@ -3475,121 +3474,6 @@ impl<T> [T] {
          }
      }
  
@@ -102,14 +99,13 @@ index cd38c3a..ad632dc 100644
 -    ///         suffix.iter().copied().sum(),
 -    ///     ]);
 -    ///     let sums = middle.iter().copied().fold(sums, f32x4::add);
--    ///     sums.horizontal_sum()
+-    ///     sums.reduce_sum()
 -    /// }
 -    ///
 -    /// let numbers: Vec<f32> = (1..101).map(|x| x as _).collect();
 -    /// assert_eq!(basic_simd_sum(&numbers[1..99]), 4949.0);
 -    /// ```
 -    #[unstable(feature = "portable_simd", issue = "86656")]
--    #[cfg(not(miri))] // Miri does not support all SIMD intrinsics
 -    pub fn as_simd<const LANES: usize>(&self) -> (&[T], &[Simd<T, LANES>], &[T])
 -    where
 -        Simd<T, LANES>: AsRef<[T; LANES]>,
@@ -153,7 +149,6 @@ index cd38c3a..ad632dc 100644
 -    /// be lifted in a way that would make it possible to see panics from this
 -    /// method for something like `LANES == 3`.
 -    #[unstable(feature = "portable_simd", issue = "86656")]
--    #[cfg(not(miri))] // Miri does not support all SIMD intrinsics
 -    pub fn as_simd_mut<const LANES: usize>(&mut self) -> (&mut [T], &mut [Simd<T, LANES>], &mut [T])
 -    where
 -        Simd<T, LANES>: AsMut<[T; LANES]>,
@@ -197,15 +192,14 @@ diff --git a/library/std/src/lib.rs b/library/std/src/lib.rs
 index 5dc586d..b6fc48f 100644
 --- a/library/std/src/lib.rs
 +++ b/library/std/src/lib.rs
-@@ -312,7 +312,6 @@
+@@ -312,6 +312,5 @@
  #![feature(panic_can_unwind)]
  #![feature(panic_unwind)]
  #![feature(platform_intrinsics)]
 -#![feature(portable_simd)]
  #![feature(prelude_import)]
  #![feature(ptr_as_uninit)]
- #![feature(ptr_internals)]
-@@ -508,25 +508,6 @@ pub mod time;
+@@ -508,23 +508,6 @@ pub mod time;
  #[unstable(feature = "once_cell", issue = "74465")]
  pub mod lazy;
  
@@ -215,10 +209,8 @@ index 5dc586d..b6fc48f 100644
 -#[allow(missing_debug_implementations, dead_code, unsafe_op_in_unsafe_fn, unused_unsafe)]
 -#[allow(rustdoc::bare_urls)]
 -#[unstable(feature = "portable_simd", issue = "86656")]
--#[cfg(not(all(miri, doctest)))] // Miri does not support all SIMD intrinsics
 -mod std_float;
 -
--#[cfg(not(all(miri, doctest)))] // Miri does not support all SIMD intrinsics
 -#[doc = include_str!("../../portable-simd/crates/core_simd/src/core_simd_docs.md")]
 -#[unstable(feature = "portable_simd", issue = "86656")]
 -pub mod simd {
diff --git a/patches/0028-core-Disable-long-running-tests.patch b/patches/0028-core-Disable-long-running-tests.patch
index bf74a74c7c4b..dc1beae6d2e7 100644
--- a/patches/0028-core-Disable-long-running-tests.patch
+++ b/patches/0028-core-Disable-long-running-tests.patch
@@ -1,30 +1,32 @@
-From 0ffdd8eda8df364391c8ac6e1ce92c73ba9254d4 Mon Sep 17 00:00:00 2001
+From eb703e627e7a84f1cd8d0d87f0f69da1f0acf765 Mon Sep 17 00:00:00 2001
 From: bjorn3 <bjorn3@users.noreply.github.com>
 Date: Fri, 3 Dec 2021 12:16:30 +0100
 Subject: [PATCH] Disable long running tests
 
 ---
- library/core/tests/slice.rs | 3 +++
- 1 file changed, 3 insertions(+)
+ library/core/tests/slice.rs | 2 ++
+ 1 file changed, 2 insertions(+)
 
 diff --git a/library/core/tests/slice.rs b/library/core/tests/slice.rs
-index 2c8f00a..44847ee 100644
+index 8402833..84592e0 100644
 --- a/library/core/tests/slice.rs
 +++ b/library/core/tests/slice.rs
-@@ -2332,7 +2332,8 @@ macro_rules! empty_max_mut {
-     };
- }
+@@ -2462,6 +2462,7 @@ take_tests! {
+ #[cfg(not(miri))] // unused in Miri
+ const EMPTY_MAX: &'static [()] = &[(); usize::MAX];
  
 +/*
- #[cfg(not(miri))] // Comparing usize::MAX many elements takes forever in Miri (and in rustc without optimizations)
- take_tests! {
-     slice: &[(); usize::MAX], method: take,
-     (take_in_bounds_max_range_to, (..usize::MAX), Some(EMPTY_MAX), &[(); 0]),
-@@ -2345,3 +2347,4 @@ take_tests! {
+ // can't be a constant due to const mutability rules
+ #[cfg(not(miri))] // unused in Miri
+ macro_rules! empty_max_mut {
+@@ -2485,6 +2486,7 @@ take_tests! {
      (take_mut_oob_max_range_to_inclusive, (..=usize::MAX), None, empty_max_mut!()),
      (take_mut_in_bounds_max_range_from, (usize::MAX..), Some(&mut [] as _), empty_max_mut!()),
  }
 +*/
+ 
+ #[test]
+ fn test_slice_from_ptr_range() {
 -- 
 2.26.2.7.g19db9cfb68
 
diff --git a/rust-toolchain b/rust-toolchain
index f2d80b78313d..db14ea2bebca 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2022-02-25"
+channel = "nightly-2022-03-26"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
diff --git a/src/builder.rs b/src/builder.rs
index 94b1e2ce13a8..b2f46e92eccb 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1252,7 +1252,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn do_not_inline(&mut self, _llret: RValue<'gcc>) {
-        unimplemented!();
+        // FIMXE(bjorn3): implement
     }
 
     fn set_span(&mut self, _span: Span) {}
diff --git a/src/lib.rs b/src/lib.rs
index 8e197ea31a8e..0647d8c28eea 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -64,6 +64,7 @@ use rustc_errors::{ErrorGuaranteed, Handler};
 use rustc_metadata::EncodedMetadata;
 use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
 use rustc_middle::ty::TyCtxt;
+use rustc_middle::ty::query::Providers;
 use rustc_session::config::{Lto, OptLevel, OutputFilenames};
 use rustc_session::Session;
 use rustc_span::Symbol;
@@ -101,6 +102,11 @@ impl CodegenBackend for GccCodegenBackend {
         *self.supports_128bit_integers.lock().expect("lock") = check_context.get_last_error() == Ok(None);
     }
 
+    fn provide(&self, providers: &mut Providers) {
+        // FIXME compute list of enabled features from cli flags
+        providers.global_backend_features = |_tcx, ()| vec![];
+    }
+
     fn codegen_crate<'tcx>(&self, tcx: TyCtxt<'tcx>, metadata: EncodedMetadata, need_metadata_module: bool) -> Box<dyn Any> {
         let target_cpu = target_cpu(tcx.sess);
         let res = codegen_crate(self.clone(), tcx, target_cpu.to_string(), metadata, need_metadata_module);

From edf33fe0a2fa322d1d372c22da75fc819f9049eb Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sat, 26 Mar 2022 14:25:37 +0100
Subject: [PATCH 047/997] Add Destruct and Drop traits to static.rs

---
 tests/run/static.rs | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/tests/run/static.rs b/tests/run/static.rs
index ab89f6aff4b5..294add968449 100644
--- a/tests/run/static.rs
+++ b/tests/run/static.rs
@@ -22,6 +22,12 @@
 #[lang = "sized"]
 pub trait Sized {}
 
+#[lang = "destruct"]
+pub trait Destruct {}
+
+#[lang = "drop"]
+pub trait Drop {}
+
 #[lang = "copy"]
 trait Copy {
 }

From 724473b330905771fb5950d3bd878e10d5a4fb63 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sat, 26 Mar 2022 16:14:39 +0100
Subject: [PATCH 048/997] Fix compiletest compilation

---
 test.sh | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/test.sh b/test.sh
index 1a5b89d3704e..1beeee136df3 100755
--- a/test.sh
+++ b/test.sh
@@ -165,6 +165,24 @@ function test_rustc() {
     git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(')
     export RUSTFLAGS=
 
+    git apply - <<EOF
+diff --git a/src/tools/compiletest/src/header.rs b/src/tools/compiletest/src/header.rs
+index 887d27fd6dca4..2c2239f2b83d1 100644
+--- a/src/tools/compiletest/src/header.rs
++++ b/src/tools/compiletest/src/header.rs
+@@ -806,8 +806,8 @@ pub fn make_test_description<R: Read>(
+     cfg: Option<&str>,
+ ) -> test::TestDesc {
+     let mut ignore = false;
+     #[cfg(not(bootstrap))]
+-    let ignore_message: Option<String> = None;
++    let ignore_message: Option<&str> = None;
+     let mut should_fail = false;
+
+     let rustc_has_profiler_support = env::var_os("RUSTC_PROFILER_SUPPORT").is_some();
+
+EOF
+
     rm config.toml || true
 
     cat > config.toml <<EOF

From fb9658d312adec8a036c9dc0fad1b60e285c4af6 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sat, 26 Mar 2022 17:27:06 +0100
Subject: [PATCH 049/997] Review comments

---
 build_sysroot/Cargo.toml | 2 +-
 src/lib.rs               | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/build_sysroot/Cargo.toml b/build_sysroot/Cargo.toml
index 05863471cb1e..cfadf47cc3f8 100644
--- a/build_sysroot/Cargo.toml
+++ b/build_sysroot/Cargo.toml
@@ -5,7 +5,7 @@ version = "0.0.0"
 
 [dependencies]
 core = { path = "./sysroot_src/library/core" }
-compiler_builtins = "=0.1.70" # TODO: update back to "0.1" when updating to latest nightly.
+compiler_builtins = "0.1"
 alloc = { path = "./sysroot_src/library/alloc" }
 std = { path = "./sysroot_src/library/std", features = ["panic_unwind", "backtrace"] }
 test = { path = "./sysroot_src/library/test" }
diff --git a/src/lib.rs b/src/lib.rs
index 0647d8c28eea..eac4a06226cf 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -103,7 +103,7 @@ impl CodegenBackend for GccCodegenBackend {
     }
 
     fn provide(&self, providers: &mut Providers) {
-        // FIXME compute list of enabled features from cli flags
+        // FIXME(antoyo) compute list of enabled features from cli flags
         providers.global_backend_features = |_tcx, ()| vec![];
     }
 

From 590bfc670a57973683d97eec104265a87363f418 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sat, 26 Mar 2022 14:21:03 +0100
Subject: [PATCH 050/997] Don't pass --target in cargo.sh

This was a workaround for compiling proc macros resulting in an abi
incompatibility. By passing --target proc macros will be built by the
llvm backend. This is no longer necessary as the abi incompatibility has
since been fixed.
---
 cargo.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cargo.sh b/cargo.sh
index 332f365ce0ce..e95564dccda0 100755
--- a/cargo.sh
+++ b/cargo.sh
@@ -20,4 +20,4 @@ fi
 cmd=$1
 shift
 
-RUSTDOCFLAGS="$RUSTFLAGS" cargo +${TOOLCHAIN} $cmd --target $TARGET_TRIPLE $@
+RUSTDOCFLAGS="$RUSTFLAGS" cargo +${TOOLCHAIN} $cmd $@

From 02970a6ca89e1288e823756ec992c9070b06baee Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 6 Feb 2022 17:04:24 -0500
Subject: [PATCH 051/997] Add support for target builtins

---
 .gitignore                                    |   1 +
 Cargo.lock                                    |   4 +-
 config.sh                                     |   4 +-
 .../0002-rand-Disable-failing-test.patch      |  32 ++
 example/std_example.rs                        |  46 +--
 ...0024-core-Disable-portable-simd-test.patch | 199 ----------
 prepare.sh                                    |   7 +
 rustc_patches/compile_test.patch              |  14 +
 src/base.rs                                   |   5 +
 src/builder.rs                                | 116 ++++--
 src/common.rs                                 |  19 +
 src/consts.rs                                 |  14 +-
 src/context.rs                                |   4 +-
 src/int.rs                                    |  18 +-
 src/intrinsic/llvm.rs                         | 122 +++++-
 src/intrinsic/simd.rs                         | 360 +++++++++++++++++-
 src/lib.rs                                    |  14 +-
 src/type_.rs                                  |  22 +-
 src/type_of.rs                                |  22 ++
 test.sh                                       |  91 ++---
 20 files changed, 778 insertions(+), 336 deletions(-)
 create mode 100644 crate_patches/0002-rand-Disable-failing-test.patch
 create mode 100644 rustc_patches/compile_test.patch

diff --git a/.gitignore b/.gitignore
index efda74b2633a..0b611d05b5c9 100644
--- a/.gitignore
+++ b/.gitignore
@@ -13,6 +13,7 @@ perf.data.old
 /rust
 /simple-raytracer
 /regex
+/rand
 gimple*
 *asm
 res
diff --git a/Cargo.lock b/Cargo.lock
index a1d9f2f5e382..f66c98742695 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#bdecdecfb8a02ec861a39a350f990faa33bd31c3"
+source = "git+https://github.com/antoyo/gccjit.rs#f24e1f49d99430941d8a747275b41c9a7930e049"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#bdecdecfb8a02ec861a39a350f990faa33bd31c3"
+source = "git+https://github.com/antoyo/gccjit.rs#f24e1f49d99430941d8a747275b41c9a7930e049"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/config.sh b/config.sh
index a932c1c8372b..b25e215fb9ee 100644
--- a/config.sh
+++ b/config.sh
@@ -2,7 +2,7 @@ set -e
 
 export CARGO_INCREMENTAL=0
 
-if [ -f ./gcc_path ]; then 
+if [ -f ./gcc_path ]; then
     export GCC_PATH=$(cat gcc_path)
 else
     echo 'Please put the path to your custom build of libgccjit in the file `gcc_path`, see Readme.md for details'
@@ -38,7 +38,7 @@ if [[ "$HOST_TRIPLE" != "$TARGET_TRIPLE" ]]; then
    fi
 fi
 
-export RUSTFLAGS="$linker -Cpanic=abort -Csymbol-mangling-version=v0 -Cdebuginfo=2 -Clto=off -Zpanic-abort-tests -Zcodegen-backend=$(pwd)/target/${CHANNEL:-debug}/librustc_codegen_gcc.$dylib_ext --sysroot $(pwd)/build_sysroot/sysroot"
+export RUSTFLAGS="$CG_RUSTFLAGS $linker -Cpanic=abort -Csymbol-mangling-version=v0 -Cdebuginfo=2 -Clto=off -Zpanic-abort-tests -Zcodegen-backend=$(pwd)/target/${CHANNEL:-debug}/librustc_codegen_gcc.$dylib_ext --sysroot $(pwd)/build_sysroot/sysroot"
 
 # FIXME(antoyo): remove once the atomic shim is gone
 if [[ `uname` == 'Darwin' ]]; then
diff --git a/crate_patches/0002-rand-Disable-failing-test.patch b/crate_patches/0002-rand-Disable-failing-test.patch
new file mode 100644
index 000000000000..449ca5f6e29c
--- /dev/null
+++ b/crate_patches/0002-rand-Disable-failing-test.patch
@@ -0,0 +1,32 @@
+From a8fb97120d71252538b6b026695df40d02696bdb Mon Sep 17 00:00:00 2001
+From: bjorn3 <bjorn3@users.noreply.github.com>
+Date: Sat, 15 Aug 2020 20:04:38 +0200
+Subject: [PATCH] [rand] Disable failing test
+
+---
+ src/distributions/uniform.rs | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/src/distributions/uniform.rs b/src/distributions/uniform.rs
+index 480b859..c80bb6f 100644
+--- a/src/distributions/uniform.rs
++++ b/src/distributions/uniform.rs
+@@ -1085,7 +1085,7 @@ mod tests {
+             _ => panic!("`UniformDurationMode` was not serialized/deserialized correctly")
+         }
+     }
+-    
++
+     #[test]
+     #[cfg(feature = "serde1")]
+     fn test_uniform_serialization() {
+@@ -1314,6 +1314,7 @@ mod tests {
+         not(target_arch = "wasm32"),
+         not(target_arch = "asmjs")
+     ))]
++    #[ignore] // FIXME
+     fn test_float_assertions() {
+         use super::SampleUniform;
+         use std::panic::catch_unwind;
+-- 
+2.20.1
diff --git a/example/std_example.rs b/example/std_example.rs
index eba0eb828960..722666f7e166 100644
--- a/example/std_example.rs
+++ b/example/std_example.rs
@@ -93,9 +93,9 @@ fn main() {
 
     println!("{:?}", std::intrinsics::caller_location());
 
-    /*unsafe {
+    unsafe {
         test_simd();
-    }*/
+    }
 
     Box::pin(move |mut _task_context| {
         yield ();
@@ -104,7 +104,7 @@ fn main() {
     println!("End");
 }
 
-/*#[target_feature(enable = "sse2")]
+#[target_feature(enable = "sse2")]
 unsafe fn test_simd() {
     let x = _mm_setzero_si128();
     let y = _mm_set1_epi16(7);
@@ -112,7 +112,7 @@ unsafe fn test_simd() {
     let cmp_eq = _mm_cmpeq_epi8(y, y);
     let cmp_lt = _mm_cmplt_epi8(y, y);
 
-    /*assert_eq!(std::mem::transmute::<_, [u16; 8]>(or), [7, 7, 7, 7, 7, 7, 7, 7]);
+    assert_eq!(std::mem::transmute::<_, [u16; 8]>(or), [7, 7, 7, 7, 7, 7, 7, 7]);
     assert_eq!(std::mem::transmute::<_, [u16; 8]>(cmp_eq), [0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff]);
     assert_eq!(std::mem::transmute::<_, [u16; 8]>(cmp_lt), [0, 0, 0, 0, 0, 0, 0, 0]);
 
@@ -124,14 +124,14 @@ unsafe fn test_simd() {
     test_mm_cvtepi8_epi16();
     test_mm_cvtsi128_si64();
 
-    // FIXME(#666) implement `#[rustc_arg_required_const(..)]` support
-    //test_mm_extract_epi8();
+    test_mm_extract_epi8();
+    test_mm_insert_epi16();
 
     let mask1 = _mm_movemask_epi8(dbg!(_mm_setr_epi8(255u8 as i8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)));
-    assert_eq!(mask1, 1);*/
-}*/
+    assert_eq!(mask1, 1);
+}
 
-/*#[target_feature(enable = "sse2")]
+#[target_feature(enable = "sse2")]
 unsafe fn test_mm_slli_si128() {
     #[rustfmt::skip]
     let a = _mm_setr_epi8(
@@ -155,22 +155,9 @@ unsafe fn test_mm_slli_si128() {
     );
     let r = _mm_slli_si128(a, 16);
     assert_eq_m128i(r, _mm_set1_epi8(0));
-
-    #[rustfmt::skip]
-    let a = _mm_setr_epi8(
-        1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
-    );
-    let r = _mm_slli_si128(a, -1);
-    assert_eq_m128i(_mm_set1_epi8(0), r);
-
-    #[rustfmt::skip]
-    let a = _mm_setr_epi8(
-        1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
-    );
-    let r = _mm_slli_si128(a, -0x80000000);
-    assert_eq_m128i(r, _mm_set1_epi8(0));
 }
 
+
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_movemask_epi8() {
     #[rustfmt::skip]
@@ -254,10 +241,19 @@ unsafe fn test_mm_extract_epi8() {
         8, 9, 10, 11, 12, 13, 14, 15
     );
     let r1 = _mm_extract_epi8(a, 0);
-    let r2 = _mm_extract_epi8(a, 19);
+    let r2 = _mm_extract_epi8(a, 3);
     assert_eq!(r1, 0xFF);
     assert_eq!(r2, 3);
-}*/
+}
+
+#[cfg(target_arch = "x86_64")]
+#[target_feature(enable = "sse2")]
+unsafe fn test_mm_insert_epi16() {
+    let a = _mm_setr_epi16(0, 1, 2, 3, 4, 5, 6, 7);
+    let r = _mm_insert_epi16(a, 9, 0);
+    let e = _mm_setr_epi16(9, 1, 2, 3, 4, 5, 6, 7);
+    assert_eq_m128i(r, e);
+}
 
 #[derive(PartialEq)]
 enum LoopState {
diff --git a/patches/0024-core-Disable-portable-simd-test.patch b/patches/0024-core-Disable-portable-simd-test.patch
index 03900ba101a9..d5fa1cec061d 100644
--- a/patches/0024-core-Disable-portable-simd-test.patch
+++ b/patches/0024-core-Disable-portable-simd-test.patch
@@ -7,167 +7,6 @@ Subject: [PATCH] [core] Disable portable-simd test
  library/core/tests/lib.rs | 1 -
  1 file changed, 1 deletion(-)
 
-diff --git a/library/core/src/lib.rs b/library/core/src/lib.rs
-index aa1ad93..95fbf55 100644
---- a/library/core/src/lib.rs
-+++ b/library/core/src/lib.rs
-@@ -398,23 +398,4 @@ pub mod arch {
-     }
- }
- 
--// Pull in the `core_simd` crate directly into libcore. The contents of
--// `core_simd` are in a different repository: rust-lang/portable-simd.
--//
--// `core_simd` depends on libcore, but the contents of this module are
--// set up in such a way that directly pulling it here works such that the
--// crate uses this crate as its libcore.
--#[path = "../../portable-simd/crates/core_simd/src/mod.rs"]
--#[allow(missing_debug_implementations, dead_code, unsafe_op_in_unsafe_fn, unused_unsafe)]
--#[allow(rustdoc::bare_urls)]
--#[unstable(feature = "portable_simd", issue = "86656")]
--mod core_simd;
--
--#[doc = include_str!("../../portable-simd/crates/core_simd/src/core_simd_docs.md")]
--#[unstable(feature = "portable_simd", issue = "86656")]
--pub mod simd {
--    #[unstable(feature = "portable_simd", issue = "86656")]
--    pub use crate::core_simd::simd::*;
--}
--
- include!("primitive_docs.rs");
-diff --git a/library/core/src/slice/mod.rs b/library/core/src/slice/mod.rs
-index cd38c3a..ad632dc 100644
---- a/library/core/src/slice/mod.rs
-+++ b/library/core/src/slice/mod.rs
-@@ -17,6 +17,5 @@ use crate::ptr;
- use crate::result::Result;
- use crate::result::Result::{Err, Ok};
--use crate::simd::{self, Simd};
- use crate::slice;
- 
- #[unstable(
-@@ -3475,121 +3474,6 @@ impl<T> [T] {
-         }
-     }
- 
--    /// Split a slice into a prefix, a middle of aligned SIMD types, and a suffix.
--    ///
--    /// This is a safe wrapper around [`slice::align_to`], so has the same weak
--    /// postconditions as that method.  You're only assured that
--    /// `self.len() == prefix.len() + middle.len() * LANES + suffix.len()`.
--    ///
--    /// Notably, all of the following are possible:
--    /// - `prefix.len() >= LANES`.
--    /// - `middle.is_empty()` despite `self.len() >= 3 * LANES`.
--    /// - `suffix.len() >= LANES`.
--    ///
--    /// That said, this is a safe method, so if you're only writing safe code,
--    /// then this can at most cause incorrect logic, not unsoundness.
--    ///
--    /// # Panics
--    ///
--    /// This will panic if the size of the SIMD type is different from
--    /// `LANES` times that of the scalar.
--    ///
--    /// At the time of writing, the trait restrictions on `Simd<T, LANES>` keeps
--    /// that from ever happening, as only power-of-two numbers of lanes are
--    /// supported.  It's possible that, in the future, those restrictions might
--    /// be lifted in a way that would make it possible to see panics from this
--    /// method for something like `LANES == 3`.
--    ///
--    /// # Examples
--    ///
--    /// ```
--    /// #![feature(portable_simd)]
--    ///
--    /// let short = &[1, 2, 3];
--    /// let (prefix, middle, suffix) = short.as_simd::<4>();
--    /// assert_eq!(middle, []); // Not enough elements for anything in the middle
--    ///
--    /// // They might be split in any possible way between prefix and suffix
--    /// let it = prefix.iter().chain(suffix).copied();
--    /// assert_eq!(it.collect::<Vec<_>>(), vec![1, 2, 3]);
--    ///
--    /// fn basic_simd_sum(x: &[f32]) -> f32 {
--    ///     use std::ops::Add;
--    ///     use std::simd::f32x4;
--    ///     let (prefix, middle, suffix) = x.as_simd();
--    ///     let sums = f32x4::from_array([
--    ///         prefix.iter().copied().sum(),
--    ///         0.0,
--    ///         0.0,
--    ///         suffix.iter().copied().sum(),
--    ///     ]);
--    ///     let sums = middle.iter().copied().fold(sums, f32x4::add);
--    ///     sums.reduce_sum()
--    /// }
--    ///
--    /// let numbers: Vec<f32> = (1..101).map(|x| x as _).collect();
--    /// assert_eq!(basic_simd_sum(&numbers[1..99]), 4949.0);
--    /// ```
--    #[unstable(feature = "portable_simd", issue = "86656")]
--    pub fn as_simd<const LANES: usize>(&self) -> (&[T], &[Simd<T, LANES>], &[T])
--    where
--        Simd<T, LANES>: AsRef<[T; LANES]>,
--        T: simd::SimdElement,
--        simd::LaneCount<LANES>: simd::SupportedLaneCount,
--    {
--        // These are expected to always match, as vector types are laid out like
--        // arrays per <https://llvm.org/docs/LangRef.html#vector-type>, but we
--        // might as well double-check since it'll optimize away anyhow.
--        assert_eq!(mem::size_of::<Simd<T, LANES>>(), mem::size_of::<[T; LANES]>());
--
--        // SAFETY: The simd types have the same layout as arrays, just with
--        // potentially-higher alignment, so the de-facto transmutes are sound.
--        unsafe { self.align_to() }
--    }
--
--    /// Split a slice into a prefix, a middle of aligned SIMD types, and a suffix.
--    ///
--    /// This is a safe wrapper around [`slice::align_to_mut`], so has the same weak
--    /// postconditions as that method.  You're only assured that
--    /// `self.len() == prefix.len() + middle.len() * LANES + suffix.len()`.
--    ///
--    /// Notably, all of the following are possible:
--    /// - `prefix.len() >= LANES`.
--    /// - `middle.is_empty()` despite `self.len() >= 3 * LANES`.
--    /// - `suffix.len() >= LANES`.
--    ///
--    /// That said, this is a safe method, so if you're only writing safe code,
--    /// then this can at most cause incorrect logic, not unsoundness.
--    ///
--    /// This is the mutable version of [`slice::as_simd`]; see that for examples.
--    ///
--    /// # Panics
--    ///
--    /// This will panic if the size of the SIMD type is different from
--    /// `LANES` times that of the scalar.
--    ///
--    /// At the time of writing, the trait restrictions on `Simd<T, LANES>` keeps
--    /// that from ever happening, as only power-of-two numbers of lanes are
--    /// supported.  It's possible that, in the future, those restrictions might
--    /// be lifted in a way that would make it possible to see panics from this
--    /// method for something like `LANES == 3`.
--    #[unstable(feature = "portable_simd", issue = "86656")]
--    pub fn as_simd_mut<const LANES: usize>(&mut self) -> (&mut [T], &mut [Simd<T, LANES>], &mut [T])
--    where
--        Simd<T, LANES>: AsMut<[T; LANES]>,
--        T: simd::SimdElement,
--        simd::LaneCount<LANES>: simd::SupportedLaneCount,
--    {
--        // These are expected to always match, as vector types are laid out like
--        // arrays per <https://llvm.org/docs/LangRef.html#vector-type>, but we
--        // might as well double-check since it'll optimize away anyhow.
--        assert_eq!(mem::size_of::<Simd<T, LANES>>(), mem::size_of::<[T; LANES]>());
--
--        // SAFETY: The simd types have the same layout as arrays, just with
--        // potentially-higher alignment, so the de-facto transmutes are sound.
--        unsafe { self.align_to_mut() }
--    }
--
-     /// Checks if the elements of this slice are sorted.
-     ///
-     /// That is, for each element `a` and its following element `b`, `a <= b` must hold. If the
 diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
 index 06c7be0..359e2e7 100644
 --- a/library/core/tests/lib.rs
@@ -188,41 +27,3 @@ index 06c7be0..359e2e7 100644
  mod slice;
  mod str;
  mod str_lossy;
-diff --git a/library/std/src/lib.rs b/library/std/src/lib.rs
-index 5dc586d..b6fc48f 100644
---- a/library/std/src/lib.rs
-+++ b/library/std/src/lib.rs
-@@ -312,6 +312,5 @@
- #![feature(panic_can_unwind)]
- #![feature(panic_unwind)]
- #![feature(platform_intrinsics)]
--#![feature(portable_simd)]
- #![feature(prelude_import)]
- #![feature(ptr_as_uninit)]
-@@ -508,23 +508,6 @@ pub mod time;
- #[unstable(feature = "once_cell", issue = "74465")]
- pub mod lazy;
- 
--// Pull in `std_float` crate  into libstd. The contents of
--// `std_float` are in a different repository: rust-lang/portable-simd.
--#[path = "../../portable-simd/crates/std_float/src/lib.rs"]
--#[allow(missing_debug_implementations, dead_code, unsafe_op_in_unsafe_fn, unused_unsafe)]
--#[allow(rustdoc::bare_urls)]
--#[unstable(feature = "portable_simd", issue = "86656")]
--mod std_float;
--
--#[doc = include_str!("../../portable-simd/crates/core_simd/src/core_simd_docs.md")]
--#[unstable(feature = "portable_simd", issue = "86656")]
--pub mod simd {
--    #[doc(inline)]
--    pub use crate::std_float::StdFloat;
--    #[doc(inline)]
--    pub use core::simd::*;
--}
--
- #[stable(feature = "futures_api", since = "1.36.0")]
- pub mod task {
-     //! Types and Traits for working with asynchronous tasks.
---
-2.26.2.7.g19db9cfb68
-
diff --git a/prepare.sh b/prepare.sh
index 503fa29b3626..d39f43f5e1b3 100755
--- a/prepare.sh
+++ b/prepare.sh
@@ -5,6 +5,13 @@ source prepare_build.sh
 
 cargo install hyperfine || echo "Skipping hyperfine install"
 
+git clone https://github.com/rust-random/rand.git || echo "rust-random/rand has already been cloned"
+pushd rand
+git checkout -- .
+git checkout 0f933f9c7176e53b2a3c7952ded484e1783f0bf1
+git am ../crate_patches/*-rand-*.patch
+popd
+
 git clone https://github.com/rust-lang/regex.git || echo "rust-lang/regex has already been cloned"
 pushd regex
 git checkout -- .
diff --git a/rustc_patches/compile_test.patch b/rustc_patches/compile_test.patch
new file mode 100644
index 000000000000..59143eac37b3
--- /dev/null
+++ b/rustc_patches/compile_test.patch
@@ -0,0 +1,14 @@
+diff --git a/src/tools/compiletest/src/header.rs b/src/tools/compiletest/src/header.rs
+index 887d27fd6dca4..2c2239f2b83d1 100644
+--- a/src/tools/compiletest/src/header.rs
++++ b/src/tools/compiletest/src/header.rs
+@@ -806,8 +806,8 @@ pub fn make_test_description<R: Read>(
+     cfg: Option<&str>,
+ ) -> test::TestDesc {
+     let mut ignore = false;
+     #[cfg(not(bootstrap))]
+-    let ignore_message: Option<String> = None;
++    let ignore_message: Option<&str> = None;
+     let mut should_fail = false;
+
+     let rustc_has_profiler_support = env::var_os("RUSTC_PROFILER_SUPPORT").is_some();
diff --git a/src/base.rs b/src/base.rs
index f5aca35cdcbc..4ce5cdaccd3a 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -78,6 +78,11 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         let context = Context::default();
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
+        // TODO(antoyo): only add the following cli argument if the feature is supported.
+        context.add_command_line_option("-mavx2");
+        // FIXME(antoyo): the following causes an illegal instruction on vmovdqu64 in std_example on my CPU.
+        // Only add if the CPU supports it.
+        //context.add_command_line_option("-mavx512f");
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
         }
diff --git a/src/builder.rs b/src/builder.rs
index b2f46e92eccb..d53e1712dc8f 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -3,7 +3,6 @@ use std::cell::Cell;
 use std::convert::TryFrom;
 use std::ops::Deref;
 
-use gccjit::FunctionType;
 use gccjit::{
     BinaryOp,
     Block,
@@ -224,10 +223,14 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             .map(|(index, (expected_ty, &actual_val))| {
                 let actual_ty = actual_val.get_type();
                 if expected_ty != actual_ty {
-                    if on_stack_param_indices.contains(&index) {
+                    if !actual_ty.is_vector() && !expected_ty.is_vector() && actual_ty.is_integral() && expected_ty.is_integral() && actual_ty.get_size() != expected_ty.get_size() {
+                        self.context.new_cast(None, actual_val, expected_ty)
+                    }
+                    else if on_stack_param_indices.contains(&index) {
                         actual_val.dereference(None).to_rvalue()
                     }
                     else {
+                        assert!(!((actual_ty.is_vector() && !expected_ty.is_vector()) || (!actual_ty.is_vector() && expected_ty.is_vector())), "{:?} ({}) -> {:?} ({}), index: {:?}[{}]", actual_ty, actual_ty.is_vector(), expected_ty, expected_ty.is_vector(), func_ptr, index);
                         self.bitcast(actual_val, expected_ty)
                     }
                 }
@@ -286,15 +289,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         // gccjit requires to use the result of functions, even when it's not used.
         // That's why we assign the result to a local or call add_eval().
         let gcc_func = func_ptr.get_type().dyncast_function_ptr_type().expect("function ptr");
-        let mut return_type = gcc_func.get_return_type();
+        let return_type = gcc_func.get_return_type();
         let void_type = self.context.new_type::<()>();
         let current_func = self.block.get_function();
 
-        // FIXME(antoyo): As a temporary workaround for unsupported LLVM intrinsics.
-        if gcc_func.get_param_count() == 0 && format!("{:?}", func_ptr) == "__builtin_ia32_pmovmskb128" {
-            return_type = self.int_type;
-        }
-
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
             let result = current_func.new_local(None, return_type, &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
@@ -302,13 +300,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             result.to_rvalue()
         }
         else {
-            if gcc_func.get_param_count() == 0 {
-                // FIXME(antoyo): As a temporary workaround for unsupported LLVM intrinsics.
-                self.block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &[]));
-            }
-            else {
-                self.block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
-            }
+            self.block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
             // Return dummy value when not having return value.
             let result = current_func.new_local(None, self.isize_type, "dummyValueThatShouldNeverBeUsed");
             self.block.add_assignment(None, result, self.context.new_rvalue_from_long(self.isize_type, 0));
@@ -529,12 +521,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn frem(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        if a.get_type() == self.cx.float_type {
+        if a.get_type().is_compatible_with(self.cx.float_type) {
             let fmodf = self.context.get_builtin_function("fmodf");
             // FIXME(antoyo): this seems to produce the wrong result.
             return self.context.new_call(None, fmodf, &[a, b]);
         }
-        assert_eq!(a.get_type(), self.cx.double_type);
+        assert_eq!(a.get_type().unqualified(), self.cx.double_type);
 
         let fmod = self.context.get_builtin_function("fmod");
         return self.context.new_call(None, fmod, &[a, b]);
@@ -657,7 +649,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // NOTE: instead of returning the dereference here, we have to assign it to a variable in
         // the current basic block. Otherwise, it could be used in another basic block, causing a
         // dereference after a drop, for instance.
-        // TODO(antoyo): handle align.
+        // TODO(antoyo): handle align of the load instruction.
         let deref = ptr.dereference(None).to_rvalue();
         let value_type = deref.get_type();
         unsafe { RETURN_VALUE_COUNT += 1 };
@@ -797,9 +789,16 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.store_with_flags(val, ptr, align, MemFlags::empty())
     }
 
-    fn store_with_flags(&mut self, val: RValue<'gcc>, ptr: RValue<'gcc>, _align: Align, _flags: MemFlags) -> RValue<'gcc> {
+    fn store_with_flags(&mut self, val: RValue<'gcc>, ptr: RValue<'gcc>, align: Align, _flags: MemFlags) -> RValue<'gcc> {
         let ptr = self.check_store(val, ptr);
-        self.llbb().add_assignment(None, ptr.dereference(None), val);
+        let destination = ptr.dereference(None);
+        // NOTE: libgccjit does not support specifying the alignment on the assignment, so we cast
+        // to type so it gets the proper alignment.
+        let destination_type = destination.to_rvalue().get_type().unqualified();
+        let aligned_type = destination_type.get_aligned(align.bytes()).make_pointer();
+        let aligned_destination = self.cx.context.new_bitcast(None, ptr, aligned_type);
+        let aligned_destination = aligned_destination.dereference(None);
+        self.llbb().add_assignment(None, aligned_destination, val);
         // TODO(antoyo): handle align and flags.
         // NOTE: dummy value here since it's never used. FIXME(antoyo): API should not return a value here?
         self.cx.context.new_rvalue_zero(self.type_i32())
@@ -1288,14 +1287,75 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
 impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     pub fn shuffle_vector(&mut self, v1: RValue<'gcc>, v2: RValue<'gcc>, mask: RValue<'gcc>) -> RValue<'gcc> {
-        let return_type = v1.get_type();
-        let params = [
-            self.context.new_parameter(None, return_type, "v1"),
-            self.context.new_parameter(None, return_type, "v2"),
-            self.context.new_parameter(None, mask.get_type(), "mask"),
-        ];
-        let shuffle = self.context.new_function(None, FunctionType::Extern, return_type, &params, "_mm_shuffle_epi8", false);
-        self.context.new_call(None, shuffle, &[v1, v2, mask])
+        let struct_type = mask.get_type().is_struct().expect("mask of struct type");
+
+        // TODO(antoyo): use a recursive unqualified() here.
+        let vector_type = v1.get_type().unqualified().dyncast_vector().expect("vector type");
+        let element_type = vector_type.get_element_type();
+        let vec_num_units = vector_type.get_num_units();
+
+        let mask_num_units = struct_type.get_field_count();
+        let mut vector_elements = vec![];
+        let mask_element_type =
+            if element_type.is_integral() {
+                element_type
+            }
+            else {
+                self.int_type
+            };
+        for i in 0..mask_num_units {
+            let field = struct_type.get_field(i as i32);
+            vector_elements.push(self.context.new_cast(None, mask.access_field(None, field).to_rvalue(), mask_element_type));
+        }
+
+        // NOTE: the mask needs to be the same length as the input vectors, so add the missing
+        // elements in the mask if needed.
+        for _ in mask_num_units..vec_num_units {
+            vector_elements.push(self.context.new_rvalue_zero(mask_element_type));
+        }
+
+        let array_type = self.context.new_array_type(None, element_type, vec_num_units as i32);
+        let result_type = self.context.new_vector_type(element_type, mask_num_units as u64);
+        let (v1, v2) =
+            if vec_num_units < mask_num_units {
+                // NOTE: the mask needs to be the same length as the input vectors, so join the 2
+                // vectors and create a dummy second vector.
+                let array = self.context.new_bitcast(None, v1, array_type);
+                let mut elements = vec![];
+                for i in 0..vec_num_units {
+                    elements.push(self.context.new_array_access(None, array, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
+                }
+                let array = self.context.new_bitcast(None, v2, array_type);
+                for i in 0..vec_num_units {
+                    elements.push(self.context.new_array_access(None, array, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
+                }
+                let v1 = self.context.new_rvalue_from_vector(None, result_type, &elements);
+                let zero = self.context.new_rvalue_zero(element_type);
+                let v2 = self.context.new_rvalue_from_vector(None, result_type, &vec![zero; mask_num_units]);
+                (v1, v2)
+            }
+            else {
+                (v1, v2)
+            };
+
+        let new_mask_num_units = std::cmp::max(mask_num_units, vec_num_units);
+        let mask_type = self.context.new_vector_type(mask_element_type, new_mask_num_units as u64);
+        let mask = self.context.new_rvalue_from_vector(None, mask_type, &vector_elements);
+        let result = self.context.new_rvalue_vector_perm(None, v1, v2, mask);
+
+        if vec_num_units != mask_num_units {
+            // NOTE: if padding was added, only select the number of elements of the masks to
+            // remove that padding in the result.
+            let mut elements = vec![];
+            let array = self.context.new_bitcast(None, result, array_type);
+            for i in 0..mask_num_units {
+                elements.push(self.context.new_array_access(None, array, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
+            }
+            self.context.new_rvalue_from_vector(None, result_type, &elements)
+        }
+        else {
+            result
+        }
     }
 }
 
diff --git a/src/common.rs b/src/common.rs
index 61709dd92de7..703e20947fe8 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -322,6 +322,8 @@ pub trait TypeReflection<'gcc, 'tcx>  {
 
     fn is_f32(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
     fn is_f64(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
+
+    fn is_vector(&self) -> bool;
 }
 
 impl<'gcc, 'tcx> TypeReflection<'gcc, 'tcx> for Type<'gcc> {
@@ -392,4 +394,21 @@ impl<'gcc, 'tcx> TypeReflection<'gcc, 'tcx> for Type<'gcc> {
     fn is_f64(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
         self.unqualified() == cx.context.new_type::<f64>()
     }
+
+    fn is_vector(&self) -> bool {
+        let mut typ = self.clone();
+        loop {
+            if typ.dyncast_vector().is_some() {
+                return true;
+            }
+
+            let old_type = typ;
+            typ = typ.unqualified();
+            if old_type == typ {
+                break;
+            }
+        }
+
+        false
+    }
 }
diff --git a/src/consts.rs b/src/consts.rs
index de52f3ea2255..4350c00e94a7 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -25,7 +25,14 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
                 }
             }
         }
-        self.context.new_bitcast(None, value, typ)
+        // NOTE: since bitcast makes a value non-constant, don't bitcast if not necessary as some
+        // SIMD builtins require a constant value.
+        if value.get_type() != typ {
+            self.context.new_bitcast(None, value, typ)
+        }
+        else {
+            value
+        }
     }
 }
 
@@ -171,8 +178,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
                 Some(kind) if !self.tcx.sess.fewer_names() => {
                     let name = self.generate_local_symbol_name(kind);
                     // TODO(antoyo): check if it's okay that no link_section is set.
-                    // TODO(antoyo): set alignment here as well.
-                    let global = self.declare_private_global(&name[..], self.val_ty(cv));
+
+                    let typ = self.val_ty(cv).get_aligned(align.bytes());
+                    let global = self.declare_private_global(&name[..], typ);
                     global
                 }
                 _ => {
diff --git a/src/context.rs b/src/context.rs
index 5e5b9e7e9b1b..83c4683a6683 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -269,11 +269,11 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     pub fn is_native_int_type_or_bool(&self, typ: Type<'gcc>) -> bool {
-        self.is_native_int_type(typ) || typ == self.bool_type
+        self.is_native_int_type(typ) || typ.is_compatible_with(self.bool_type)
     }
 
     pub fn is_int_type_or_bool(&self, typ: Type<'gcc>) -> bool {
-        self.is_native_int_type(typ) || self.is_non_native_int_type(typ) || typ == self.bool_type
+        self.is_native_int_type(typ) || self.is_non_native_int_type(typ) || typ.is_compatible_with(self.bool_type)
     }
 
     pub fn sess(&self) -> &Session {
diff --git a/src/int.rs b/src/int.rs
index c3ed71ff7303..ed779d5d888d 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -153,8 +153,14 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let a_type = a.get_type();
         let b_type = b.get_type();
         if self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type) {
-            if a.get_type() != b.get_type() {
-                b = self.context.new_cast(None, b, a.get_type());
+            if a_type != b_type {
+                if a_type.is_vector() {
+                    // Vector types need to be bitcast.
+                    b = self.context.new_bitcast(None, b, a.get_type());
+                }
+                else {
+                    b = self.context.new_cast(None, b, a.get_type());
+                }
             }
             self.context.new_binary_op(None, operation, a_type, a, b)
         }
@@ -593,7 +599,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let b_type = b.get_type();
         let a_native = self.is_native_int_type_or_bool(a_type);
         let b_native = self.is_native_int_type_or_bool(b_type);
-        if a_native && b_native {
+        if a_type.is_vector() && b_type.is_vector() {
+            self.context.new_binary_op(None, operation, a_type, a, b)
+        }
+        else if a_native && b_native {
             if a_type != b_type {
                 b = self.context.new_cast(None, b, a_type);
             }
@@ -639,6 +648,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         else {
             // Since u128 and i128 are the only types that can be unsupported, we know the type of
             // value and the destination type have the same size, so a bitcast is fine.
+
+            // TODO(antoyo): perhaps use __builtin_convertvector for vector casting. (This is elsewhere,
+            // though.)
             self.context.new_bitcast(None, value, dest_typ)
         }
     }
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index b074febc521e..1a2a352b5a3b 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -3,20 +3,122 @@ use gccjit::Function;
 use crate::context::CodegenCx;
 
 pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
-    let _gcc_name =
+    let gcc_name =
         match name {
-            "llvm.x86.xgetbv" => {
-                let gcc_name = "__builtin_trap";
-                let func = cx.context.get_builtin_function(gcc_name);
-                cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
-                return func;
-            },
+            "llvm.x86.xgetbv" => "__builtin_ia32_xgetbv",
             // NOTE: this doc specifies the equivalent GCC builtins: http://huonw.github.io/llvmint/llvmint/x86/index.html
+            "llvm.x86.sse2.pmovmskb.128" => "__builtin_ia32_pmovmskb128",
+            "llvm.x86.avx2.pmovmskb" => "__builtin_ia32_pmovmskb256",
             "llvm.x86.sse2.cmp.pd" => "__builtin_ia32_cmppd",
             "llvm.x86.sse2.movmsk.pd" => "__builtin_ia32_movmskpd",
-            "llvm.x86.sse2.pmovmskb.128" => "__builtin_ia32_pmovmskb128",
-            _ => unimplemented!("unsupported LLVM intrinsic {}", name)
+            "llvm.x86.ssse3.pshuf.b.128" => "__builtin_ia32_pshufb128",
+            "llvm.x86.sse2.pause" => "__builtin_ia32_pause",
+            "llvm.x86.avx2.pshuf.b" => "__builtin_ia32_pshufb256",
+            "llvm.x86.avx2.pslli.d" => "__builtin_ia32_pslldi256",
+            "llvm.x86.avx2.psrli.d" => "__builtin_ia32_psrldi256",
+            "llvm.x86.avx.vzeroupper" => "__builtin_ia32_vzeroupper",
+            "llvm.x86.avx2.vperm2i128" => "__builtin_ia32_permti256",
+            "llvm.x86.avx2.psrli.w" => "__builtin_ia32_psrlwi256",
+            "llvm.x86.sse2.storeu.dq" => "__builtin_ia32_storedqu",
+            "llvm.x86.sse2.psrli.w" => "__builtin_ia32_psrlwi128",
+            "llvm.x86.avx2.pabs.d" => "__builtin_ia32_pabsd256",
+            "llvm.x86.sse2.psrli.q" => "__builtin_ia32_psrlqi128",
+            "llvm.x86.avx2.pabs.w" => "__builtin_ia32_pabsw256",
+            "llvm.x86.avx2.pblendvb" => "__builtin_ia32_pblendvb256",
+            "llvm.x86.avx2.pabs.b" => "__builtin_ia32_pabsb256",
+            "llvm.x86.avx2.psrli.q" => "__builtin_ia32_psrlqi256",
+            "llvm.x86.sse41.pblendvb" => "__builtin_ia32_pblendvb128",
+            "llvm.x86.avx2.pavg.w" => "__builtin_ia32_pavgw256",
+            "llvm.x86.avx2.pavg.b" => "__builtin_ia32_pavgb256",
+            "llvm.x86.avx2.phadd.w" => "__builtin_ia32_phaddw256",
+            "llvm.x86.avx2.phadd.d" => "__builtin_ia32_phaddd256",
+            "llvm.x86.avx2.phadd.sw" => "__builtin_ia32_phaddsw256",
+            "llvm.x86.avx2.phsub.w" => "__builtin_ia32_phsubw256",
+            "llvm.x86.avx2.phsub.d" => "__builtin_ia32_phsubd256",
+            "llvm.x86.avx2.phsub.sw" => "__builtin_ia32_phsubsw256",
+            "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gatherd_d",
+            "llvm.x86.avx2.gather.d.d.256" => "__builtin_ia32_gatherd_d256",
+            "llvm.x86.avx2.gather.d.ps" => "__builtin_ia32_gatherd_ps",
+            "llvm.x86.avx2.gather.d.ps.256" => "__builtin_ia32_gatherd_ps256",
+            "llvm.x86.avx2.gather.d.q" => "__builtin_ia32_gatherd_q",
+            "llvm.x86.avx2.gather.d.q.256" => "__builtin_ia32_gatherd_q256",
+            "llvm.x86.avx2.gather.d.pd" => "__builtin_ia32_gatherd_pd",
+            "llvm.x86.avx2.gather.d.pd.256" => "__builtin_ia32_gatherd_pd256",
+            "llvm.x86.avx2.gather.q.d" => "__builtin_ia32_gatherq_d",
+            "llvm.x86.avx2.gather.q.d.256" => "__builtin_ia32_gatherq_d256",
+            "llvm.x86.avx2.gather.q.ps" => "__builtin_ia32_gatherq_ps",
+            "llvm.x86.avx2.gather.q.ps.256" => "__builtin_ia32_gatherq_ps256",
+            "llvm.x86.avx2.gather.q.q" => "__builtin_ia32_gatherq_q",
+            "llvm.x86.avx2.gather.q.q.256" => "__builtin_ia32_gatherq_q256",
+            "llvm.x86.avx2.gather.q.pd" => "__builtin_ia32_gatherq_pd",
+            "llvm.x86.avx2.gather.q.pd.256" => "__builtin_ia32_gatherq_pd256",
+            "llvm.x86.avx2.pmadd.wd" => "__builtin_ia32_pmaddwd256",
+            "llvm.x86.avx2.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw256",
+            "llvm.x86.avx2.maskload.d" => "__builtin_ia32_maskloadd",
+            "llvm.x86.avx2.maskload.d.256" => "__builtin_ia32_maskloadd256",
+            "llvm.x86.avx2.maskload.q" => "__builtin_ia32_maskloadq",
+            "llvm.x86.avx2.maskload.q.256" => "__builtin_ia32_maskloadq256",
+            "llvm.x86.avx2.maskstore.d" => "__builtin_ia32_maskstored",
+            "llvm.x86.avx2.maskstore.d.256" => "__builtin_ia32_maskstored256",
+            "llvm.x86.avx2.maskstore.q" => "__builtin_ia32_maskstoreq",
+            "llvm.x86.avx2.maskstore.q.256" => "__builtin_ia32_maskstoreq256",
+            "llvm.x86.avx2.pmaxs.w" => "__builtin_ia32_pmaxsw256",
+            "llvm.x86.avx2.pmaxs.d" => "__builtin_ia32_pmaxsd256",
+            "llvm.x86.avx2.pmaxs.b" => "__builtin_ia32_pmaxsb256",
+            "llvm.x86.avx2.pmaxu.w" => "__builtin_ia32_pmaxuw256",
+            "llvm.x86.avx2.pmaxu.d" => "__builtin_ia32_pmaxud256",
+            "llvm.x86.avx2.pmaxu.b" => "__builtin_ia32_pmaxub256",
+            "llvm.x86.avx2.pmins.w" => "__builtin_ia32_pminsw256",
+            "llvm.x86.avx2.pmins.d" => "__builtin_ia32_pminsd256",
+            "llvm.x86.avx2.pmins.b" => "__builtin_ia32_pminsb256",
+            "llvm.x86.avx2.pminu.w" => "__builtin_ia32_pminuw256",
+            "llvm.x86.avx2.pminu.d" => "__builtin_ia32_pminud256",
+            "llvm.x86.avx2.pminu.b" => "__builtin_ia32_pminub256",
+            "llvm.x86.avx2.mpsadbw" => "__builtin_ia32_mpsadbw256",
+            "llvm.x86.avx2.pmul.dq" => "__builtin_ia32_pmuldq256",
+            "llvm.x86.avx2.pmulu.dq" => "__builtin_ia32_pmuludq256",
+            "llvm.x86.avx2.pmulh.w" => "__builtin_ia32_pmulhw256",
+            "llvm.x86.avx2.pmulhu.w" => "__builtin_ia32_pmulhuw256",
+            "llvm.x86.avx2.pmul.hr.sw" => "__builtin_ia32_pmulhrsw256",
+            "llvm.x86.avx2.packsswb" => "__builtin_ia32_packsswb256",
+            "llvm.x86.avx2.packssdw" => "__builtin_ia32_packssdw256",
+            "llvm.x86.avx2.packuswb" => "__builtin_ia32_packuswb256",
+            "llvm.x86.avx2.packusdw" => "__builtin_ia32_packusdw256",
+            "llvm.x86.avx2.permd" => "__builtin_ia32_permvarsi256",
+            "llvm.x86.avx2.permps" => "__builtin_ia32_permvarsf256",
+            "llvm.x86.avx2.psad.bw" => "__builtin_ia32_psadbw256",
+            "llvm.x86.avx2.psign.w" => "__builtin_ia32_psignw256",
+            "llvm.x86.avx2.psign.d" => "__builtin_ia32_psignd256",
+            "llvm.x86.avx2.psign.b" => "__builtin_ia32_psignb256",
+            "llvm.x86.avx2.psll.w" => "__builtin_ia32_psllw256",
+            "llvm.x86.avx2.psll.d" => "__builtin_ia32_pslld256",
+            "llvm.x86.avx2.psll.q" => "__builtin_ia32_psllq256",
+            "llvm.x86.avx2.pslli.w" => "__builtin_ia32_psllwi256",
+            "llvm.x86.avx2.pslli.q" => "__builtin_ia32_psllqi256",
+            "llvm.x86.avx2.psllv.d" => "__builtin_ia32_psllv4si",
+            "llvm.x86.avx2.psllv.d.256" => "__builtin_ia32_psllv8si",
+            "llvm.x86.avx2.psllv.q" => "__builtin_ia32_psllv2di",
+            "llvm.x86.avx2.psllv.q.256" => "__builtin_ia32_psllv4di",
+            "llvm.x86.avx2.psra.w" => "__builtin_ia32_psraw256",
+            "llvm.x86.avx2.psra.d" => "__builtin_ia32_psrad256",
+            "llvm.x86.avx2.psrai.w" => "__builtin_ia32_psrawi256",
+            "llvm.x86.avx2.psrai.d" => "__builtin_ia32_psradi256",
+            "llvm.x86.avx2.psrav.d" => "__builtin_ia32_psrav4si",
+            "llvm.x86.avx2.psrav.d.256" => "__builtin_ia32_psrav8si",
+            "llvm.x86.avx2.psrl.w" => "__builtin_ia32_psrlw256",
+            "llvm.x86.avx2.psrl.d" => "__builtin_ia32_psrld256",
+            "llvm.x86.avx2.psrl.q" => "__builtin_ia32_psrlq256",
+            "llvm.x86.avx2.psrlv.d" => "__builtin_ia32_psrlv4si",
+            "llvm.x86.avx2.psrlv.d.256" => "__builtin_ia32_psrlv8si",
+            "llvm.x86.avx2.psrlv.q" => "__builtin_ia32_psrlv2di",
+            "llvm.x86.avx2.psrlv.q.256" => "__builtin_ia32_psrlv4di",
+            "llvm.x86.sse.sqrt.ss" => "__builtin_ia32_sqrtss",
+
+            "llvm.sqrt.v2f64" => "__builtin_ia32_sqrtpd",
+            _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
         };
 
-    unimplemented!();
+    let func = cx.context.get_target_builtin_function(gcc_name);
+    cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
+    func
 }
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 7d7811c87821..11f1e7dd9993 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -1,4 +1,6 @@
-use gccjit::{RValue, Type};
+use std::cmp::Ordering;
+
+use gccjit::{RValue, Type, ToRValue};
 use rustc_codegen_ssa::base::compare_simd_types;
 use rustc_codegen_ssa::common::{TypeKind, span_invalid_monomorphization_error};
 use rustc_codegen_ssa::mir::operand::OperandRef;
@@ -10,6 +12,7 @@ use rustc_middle::ty::{self, Ty};
 use rustc_span::{Span, Symbol, sym};
 
 use crate::builder::Builder;
+use crate::intrinsic;
 
 pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>, name: Symbol, callee_ty: Ty<'tcx>, args: &[OperandRef<'tcx, RValue<'gcc>>], ret_ty: Ty<'tcx>, llret_ty: Type<'gcc>, span: Span) -> Result<RValue<'gcc>, ()> {
     // macros for error handling:
@@ -100,9 +103,27 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
     }
 
     if let Some(stripped) = name_str.strip_prefix("simd_shuffle") {
-        let n: u64 = stripped.parse().unwrap_or_else(|_| {
-            span_bug!(span, "bad `simd_shuffle` instruction only caught in codegen?")
-        });
+        let n: u64 =
+            if stripped.is_empty() {
+                // Make sure this is actually an array, since typeck only checks the length-suffixed
+                // version of this intrinsic.
+                match args[2].layout.ty.kind() {
+                    ty::Array(ty, len) if matches!(ty.kind(), ty::Uint(ty::UintTy::U32)) => {
+                        len.try_eval_usize(bx.cx.tcx, ty::ParamEnv::reveal_all()).unwrap_or_else(|| {
+                            span_bug!(span, "could not evaluate shuffle index array length")
+                        })
+                    }
+                    _ => return_error!(
+                        "simd_shuffle index must be an array of `u32`, got `{}`",
+                        args[2].layout.ty
+                    ),
+                }
+            }
+            else {
+                stripped.parse().unwrap_or_else(|_| {
+                    span_bug!(span, "bad `simd_shuffle` instruction only caught in codegen?")
+                })
+            };
 
         require_simd!(ret_ty, "return");
 
@@ -133,6 +154,202 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         ));
     }
 
+    if name == sym::simd_insert {
+        require!(
+            in_elem == arg_tys[2],
+            "expected inserted type `{}` (element of input `{}`), found `{}`",
+            in_elem,
+            in_ty,
+            arg_tys[2]
+        );
+        let vector = args[0].immediate();
+        let index = args[1].immediate();
+        let value = args[2].immediate();
+        // TODO(antoyo): use a recursive unqualified() here.
+        let vector_type = vector.get_type().unqualified().dyncast_vector().expect("vector type");
+        let element_type = vector_type.get_element_type();
+        // NOTE: we cannot cast to an array and assign to its element here because the value might
+        // not be an l-value. So, call a builtin to set the element.
+        // TODO(antoyo): perhaps we could create a new vector or maybe there's a GIMPLE instruction for that?
+        let func_name =
+            match in_len {
+                2 => {
+                    if element_type == bx.i64_type {
+                        "__builtin_ia32_vec_set_v2di"
+                    }
+                    else {
+                        unimplemented!();
+                    }
+                },
+                4 => {
+                    if element_type == bx.i32_type {
+                        "__builtin_ia32_vec_set_v4si"
+                    }
+                    else {
+                        unimplemented!();
+                    }
+                },
+                8 => {
+                    if element_type == bx.i16_type {
+                        "__builtin_ia32_vec_set_v8hi"
+                    }
+                    else {
+                        unimplemented!();
+                    }
+                },
+                _ => unimplemented!("Len: {}", in_len),
+            };
+        let builtin = bx.context.get_target_builtin_function(func_name);
+        let param1_type = builtin.get_param(0).to_rvalue().get_type();
+        let vector =
+            if vector.get_type() != param1_type {
+                bx.context.new_bitcast(None, vector, param1_type)
+            }
+            else {
+                vector
+            };
+        let result = bx.context.new_call(None, builtin, &[vector, value, bx.context.new_cast(None, index, bx.int_type)]);
+        return Ok(bx.context.new_bitcast(None, result, vector.get_type()));
+    }
+    if name == sym::simd_extract {
+        require!(
+            ret_ty == in_elem,
+            "expected return type `{}` (element of input `{}`), found `{}`",
+            in_elem,
+            in_ty,
+            ret_ty
+        );
+        let vector = args[0].immediate();
+        return Ok(bx.context.new_vector_access(None, vector, args[1].immediate()).to_rvalue());
+    }
+
+    if name == sym::simd_cast {
+        require_simd!(ret_ty, "return");
+        let (out_len, out_elem) = ret_ty.simd_size_and_type(bx.tcx());
+        require!(
+            in_len == out_len,
+            "expected return type with length {} (same as input type `{}`), \
+                  found `{}` with length {}",
+            in_len,
+            in_ty,
+            ret_ty,
+            out_len
+        );
+        // casting cares about nominal type, not just structural type
+        if in_elem == out_elem {
+            return Ok(args[0].immediate());
+        }
+
+        enum Style {
+            Float,
+            Int(/* is signed? */ bool),
+            Unsupported,
+        }
+
+        let (in_style, in_width) = match in_elem.kind() {
+            // vectors of pointer-sized integers should've been
+            // disallowed before here, so this unwrap is safe.
+            ty::Int(i) => (
+                Style::Int(true),
+                i.normalize(bx.tcx().sess.target.pointer_width).bit_width().unwrap(),
+            ),
+            ty::Uint(u) => (
+                Style::Int(false),
+                u.normalize(bx.tcx().sess.target.pointer_width).bit_width().unwrap(),
+            ),
+            ty::Float(f) => (Style::Float, f.bit_width()),
+            _ => (Style::Unsupported, 0),
+        };
+        let (out_style, out_width) = match out_elem.kind() {
+            ty::Int(i) => (
+                Style::Int(true),
+                i.normalize(bx.tcx().sess.target.pointer_width).bit_width().unwrap(),
+            ),
+            ty::Uint(u) => (
+                Style::Int(false),
+                u.normalize(bx.tcx().sess.target.pointer_width).bit_width().unwrap(),
+            ),
+            ty::Float(f) => (Style::Float, f.bit_width()),
+            _ => (Style::Unsupported, 0),
+        };
+
+        let extend = |in_type, out_type| {
+            let vector_type = bx.context.new_vector_type(out_type, 8);
+            let vector = args[0].immediate();
+            let array_type = bx.context.new_array_type(None, in_type, 8);
+            let array = bx.context.new_bitcast(None, vector, array_type);
+
+            let cast_vec_element = |index| {
+                let index = bx.context.new_rvalue_from_int(bx.int_type, index);
+                bx.context.new_cast(None, bx.context.new_array_access(None, array, index).to_rvalue(), out_type)
+            };
+
+            bx.context.new_rvalue_from_vector(None, vector_type, &[
+                cast_vec_element(0),
+                cast_vec_element(1),
+                cast_vec_element(2),
+                cast_vec_element(3),
+                cast_vec_element(4),
+                cast_vec_element(5),
+                cast_vec_element(6),
+                cast_vec_element(7),
+            ])
+        };
+
+        match (in_style, out_style) {
+            (Style::Int(in_is_signed), Style::Int(_)) => {
+                return Ok(match in_width.cmp(&out_width) {
+                    Ordering::Greater => bx.trunc(args[0].immediate(), llret_ty),
+                    Ordering::Equal => args[0].immediate(),
+                    Ordering::Less => {
+                        if in_is_signed {
+                            match (in_width, out_width) {
+                                // FIXME(antoyo): the function _mm_cvtepi8_epi16 should directly
+                                // call an intrinsic equivalent to __builtin_ia32_pmovsxbw128 so that
+                                // we can generate a call to it.
+                                (8, 16) => extend(bx.i8_type, bx.i16_type),
+                                (8, 32) => extend(bx.i8_type, bx.i32_type),
+                                (8, 64) => extend(bx.i8_type, bx.i64_type),
+                                (16, 32) => extend(bx.i16_type, bx.i32_type),
+                                (32, 64) => extend(bx.i32_type, bx.i64_type),
+                                (16, 64) => extend(bx.i16_type, bx.i64_type),
+                                _ => unimplemented!("in: {}, out: {}", in_width, out_width),
+                            }
+                        } else {
+                            match (in_width, out_width) {
+                                (8, 16) => extend(bx.u8_type, bx.u16_type),
+                                (8, 32) => extend(bx.u8_type, bx.u32_type),
+                                (8, 64) => extend(bx.u8_type, bx.u64_type),
+                                (16, 32) => extend(bx.u16_type, bx.u32_type),
+                                (16, 64) => extend(bx.u16_type, bx.u64_type),
+                                (32, 64) => extend(bx.u32_type, bx.u64_type),
+                                _ => unimplemented!("in: {}, out: {}", in_width, out_width),
+                            }
+                        }
+                    }
+                });
+            }
+            (Style::Int(_), Style::Float) => {
+                unimplemented!();
+            }
+            (Style::Float, Style::Int(_)) => {
+                unimplemented!();
+            }
+            (Style::Float, Style::Float) => {
+                unimplemented!();
+            }
+            _ => { /* Unsupported. Fallthrough. */ }
+        }
+        require!(
+            false,
+            "unsupported cast from `{}` with element `{}` to `{}` with element `{}`",
+            in_ty,
+            in_elem,
+            ret_ty,
+            out_elem
+        );
+    }
+
     macro_rules! arith_binary {
         ($($name: ident: $($($p: ident),* => $call: ident),*;)*) => {
             $(if name == sym::$name {
@@ -150,6 +367,105 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         }
     }
 
+    fn simd_simple_float_intrinsic<'gcc, 'tcx>(
+        name: Symbol,
+        in_elem: Ty<'_>,
+        in_ty: Ty<'_>,
+        in_len: u64,
+        bx: &mut Builder<'_, 'gcc, 'tcx>,
+        span: Span,
+        args: &[OperandRef<'tcx, RValue<'gcc>>],
+    ) -> Result<RValue<'gcc>, ()> {
+        macro_rules! emit_error {
+            ($msg: tt) => {
+                emit_error!($msg, )
+            };
+            ($msg: tt, $($fmt: tt)*) => {
+                span_invalid_monomorphization_error(
+                    bx.sess(), span,
+                    &format!(concat!("invalid monomorphization of `{}` intrinsic: ", $msg),
+                             name, $($fmt)*));
+            }
+        }
+        macro_rules! return_error {
+            ($($fmt: tt)*) => {
+                {
+                    emit_error!($($fmt)*);
+                    return Err(());
+                }
+            }
+        }
+
+        let (elem_ty_str, elem_ty) =
+            if let ty::Float(f) = in_elem.kind() {
+                let elem_ty = bx.cx.type_float_from_ty(*f);
+                match f.bit_width() {
+                    32 => ("f32", elem_ty),
+                    64 => ("f64", elem_ty),
+                    _ => {
+                        return_error!(
+                            "unsupported element type `{}` of floating-point vector `{}`",
+                            f.name_str(),
+                            in_ty
+                        );
+                    }
+                }
+            }
+            else {
+                return_error!("`{}` is not a floating-point type", in_ty);
+            };
+
+        let vec_ty = bx.cx.type_vector(elem_ty, in_len);
+
+        let (intr_name, fn_ty) =
+            match name {
+                sym::simd_ceil => ("ceil", bx.type_func(&[vec_ty], vec_ty)),
+                sym::simd_fabs => ("fabs", bx.type_func(&[vec_ty], vec_ty)), // TODO(antoyo): pand with 170141183420855150465331762880109871103
+                sym::simd_fcos => ("cos", bx.type_func(&[vec_ty], vec_ty)),
+                sym::simd_fexp2 => ("exp2", bx.type_func(&[vec_ty], vec_ty)),
+                sym::simd_fexp => ("exp", bx.type_func(&[vec_ty], vec_ty)),
+                sym::simd_flog10 => ("log10", bx.type_func(&[vec_ty], vec_ty)),
+                sym::simd_flog2 => ("log2", bx.type_func(&[vec_ty], vec_ty)),
+                sym::simd_flog => ("log", bx.type_func(&[vec_ty], vec_ty)),
+                sym::simd_floor => ("floor", bx.type_func(&[vec_ty], vec_ty)),
+                sym::simd_fma => ("fma", bx.type_func(&[vec_ty, vec_ty, vec_ty], vec_ty)),
+                sym::simd_fpowi => ("powi", bx.type_func(&[vec_ty, bx.type_i32()], vec_ty)),
+                sym::simd_fpow => ("pow", bx.type_func(&[vec_ty, vec_ty], vec_ty)),
+                sym::simd_fsin => ("sin", bx.type_func(&[vec_ty], vec_ty)),
+                sym::simd_fsqrt => ("sqrt", bx.type_func(&[vec_ty], vec_ty)),
+                sym::simd_round => ("round", bx.type_func(&[vec_ty], vec_ty)),
+                sym::simd_trunc => ("trunc", bx.type_func(&[vec_ty], vec_ty)),
+                _ => return_error!("unrecognized intrinsic `{}`", name),
+            };
+        let llvm_name = &format!("llvm.{0}.v{1}{2}", intr_name, in_len, elem_ty_str);
+        let function = intrinsic::llvm::intrinsic(llvm_name, &bx.cx);
+        let function: RValue<'gcc> = unsafe { std::mem::transmute(function) };
+        let c = bx.call(fn_ty, function, &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(), None);
+        Ok(c)
+    }
+
+    if std::matches!(
+        name,
+        sym::simd_ceil
+            | sym::simd_fabs
+            | sym::simd_fcos
+            | sym::simd_fexp2
+            | sym::simd_fexp
+            | sym::simd_flog10
+            | sym::simd_flog2
+            | sym::simd_flog
+            | sym::simd_floor
+            | sym::simd_fma
+            | sym::simd_fpow
+            | sym::simd_fpowi
+            | sym::simd_fsin
+            | sym::simd_fsqrt
+            | sym::simd_round
+            | sym::simd_trunc
+    ) {
+        return simd_simple_float_intrinsic(name, in_elem, in_ty, in_len, bx, span, args);
+    }
+
     arith_binary! {
         simd_add: Uint, Int => add, Float => fadd;
         simd_sub: Uint, Int => sub, Float => fsub;
@@ -184,5 +500,41 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         simd_neg: Int => neg, Float => fneg;
     }
 
+    if name == sym::simd_saturating_add || name == sym::simd_saturating_sub {
+        let lhs = args[0].immediate();
+        let rhs = args[1].immediate();
+        let is_add = name == sym::simd_saturating_add;
+        let ptr_bits = bx.tcx().data_layout.pointer_size.bits() as _;
+        let (signed, elem_width, elem_ty) = match *in_elem.kind() {
+            ty::Int(i) => (true, i.bit_width().unwrap_or(ptr_bits), bx.cx.type_int_from_ty(i)),
+            ty::Uint(i) => (false, i.bit_width().unwrap_or(ptr_bits), bx.cx.type_uint_from_ty(i)),
+            _ => {
+                return_error!(
+                    "expected element type `{}` of vector type `{}` \
+                     to be a signed or unsigned integer type",
+                    arg_tys[0].simd_size_and_type(bx.tcx()).1,
+                    arg_tys[0]
+                );
+            }
+        };
+        let builtin_name =
+            match (signed, is_add, in_len, elem_width) {
+                (true, true, 32, 8) => "__builtin_ia32_paddsb256", // TODO(antoyo): cast arguments to unsigned.
+                (false, true, 32, 8) => "__builtin_ia32_paddusb256",
+                (true, true, 16, 16) => "__builtin_ia32_paddsw256",
+                (false, true, 16, 16) => "__builtin_ia32_paddusw256",
+                (true, false, 16, 16) => "__builtin_ia32_psubsw256",
+                (false, false, 16, 16) => "__builtin_ia32_psubusw256",
+                (true, false, 32, 8) => "__builtin_ia32_psubsb256",
+                (false, false, 32, 8) => "__builtin_ia32_psubusb256",
+                _ => unimplemented!("signed: {}, is_add: {}, in_len: {}, elem_width: {}", signed, is_add, in_len, elem_width),
+            };
+        let vec_ty = bx.cx.type_vector(elem_ty, in_len as u64);
+
+        let func = bx.context.get_target_builtin_function(builtin_name);
+        let result = bx.context.new_call(None, func, &[lhs, rhs]);
+        return Ok(bx.context.new_bitcast(None, result, vec_ty));
+    }
+
     unimplemented!("simd {}", name);
 }
diff --git a/src/lib.rs b/src/lib.rs
index eac4a06226cf..a8029f0425a4 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -205,7 +205,7 @@ impl WriteBackendMethods for GccCodegenBackend {
     fn run_fat_lto(_cgcx: &CodegenContext<Self>, mut modules: Vec<FatLTOInput<Self>>, _cached_modules: Vec<(SerializedModule<Self::ModuleBuffer>, WorkProduct)>) -> Result<LtoModuleCodegen<Self>, FatalError> {
         // TODO(antoyo): implement LTO by sending -flto to libgccjit and adding the appropriate gcc linker plugins.
         // NOTE: implemented elsewhere.
-        // TODO: what is implemented elsewhere ^ ?
+        // TODO(antoyo): what is implemented elsewhere ^ ?
         let module =
             match modules.remove(0) {
                 FatLTOInput::InMemory(module) => module,
@@ -299,9 +299,17 @@ pub fn target_features(sess: &Session) -> Vec<Symbol> {
                 if sess.is_nightly_build() || gate.is_none() { Some(feature) } else { None }
             },
         )
-        .filter(|_feature| {
+        .filter(|feature| {
             // TODO(antoyo): implement a way to get enabled feature in libgccjit.
-            false
+            // Probably using the equivalent of __builtin_cpu_supports.
+            feature.contains("sse") || feature.contains("avx")
+            /*
+               adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512gfni,
+               avx512ifma, avx512pf, avx512vaes, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpclmulqdq,
+               avx512vpopcntdq, bmi1, bmi2, cmpxchg16b, ermsb, f16c, fma, fxsr, lzcnt, movbe, pclmulqdq, popcnt, rdrand, rdseed, rtm,
+               sha, sse, sse2, sse3, sse4.1, sse4.2, sse4a, ssse3, tbm, xsave, xsavec, xsaveopt, xsaves
+             */
+            //false
         })
         .map(|feature| Symbol::intern(feature))
         .collect()
diff --git a/src/type_.rs b/src/type_.rs
index e95058085216..8a17d94da41f 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -3,10 +3,11 @@ use std::convert::TryInto;
 use gccjit::{RValue, Struct, Type};
 use rustc_codegen_ssa::traits::{BaseTypeMethods, DerivedTypeMethods};
 use rustc_codegen_ssa::common::TypeKind;
-use rustc_middle::bug;
+use rustc_middle::{bug, ty};
 use rustc_middle::ty::layout::TyAndLayout;
 use rustc_target::abi::{AddressSpace, Align, Integer, Size};
 
+use crate::common::TypeReflection;
 use crate::context::CodegenCx;
 use crate::type_of::LayoutGccExt;
 
@@ -60,6 +61,17 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let ity = Integer::approximate_align(self, align);
         self.type_from_integer(ity)
     }
+
+    pub fn type_vector(&self, ty: Type<'gcc>, len: u64) -> Type<'gcc> {
+        self.context.new_vector_type(ty, len)
+    }
+
+    pub fn type_float_from_ty(&self, t: ty::FloatTy) -> Type<'gcc> {
+        match t {
+            ty::FloatTy::F32 => self.type_f32(),
+            ty::FloatTy::F64 => self.type_f64(),
+        }
+    }
 }
 
 impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
@@ -127,7 +139,7 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         else if typ.is_compatible_with(self.double_type) {
             TypeKind::Double
         }
-        else if typ.dyncast_vector().is_some() {
+        else if typ.is_vector() {
             TypeKind::Vector
         }
         else {
@@ -141,7 +153,7 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn type_ptr_to_ext(&self, ty: Type<'gcc>, _address_space: AddressSpace) -> Type<'gcc> {
-        // TODO(antoyo): use address_space
+        // TODO(antoyo): use address_space, perhaps with TYPE_ADDR_SPACE?
         ty.make_pointer()
     }
 
@@ -167,10 +179,10 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn float_width(&self, typ: Type<'gcc>) -> usize {
         let f32 = self.context.new_type::<f32>();
         let f64 = self.context.new_type::<f64>();
-        if typ == f32 {
+        if typ.is_compatible_with(f32) {
             32
         }
-        else if typ == f64 {
+        else if typ.is_compatible_with(f64) {
             64
         }
         else {
diff --git a/src/type_of.rs b/src/type_of.rs
index ed8f0445ca3e..c6d6f91a7429 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -24,6 +24,28 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             I128 => self.type_u128(),
         }
     }
+
+    pub fn type_int_from_ty(&self, t: ty::IntTy) -> Type<'gcc> {
+        match t {
+            ty::IntTy::Isize => self.type_isize(),
+            ty::IntTy::I8 => self.type_i8(),
+            ty::IntTy::I16 => self.type_i16(),
+            ty::IntTy::I32 => self.type_i32(),
+            ty::IntTy::I64 => self.type_i64(),
+            ty::IntTy::I128 => self.type_i128(),
+        }
+    }
+
+    pub fn type_uint_from_ty(&self, t: ty::UintTy) -> Type<'gcc> {
+        match t {
+            ty::UintTy::Usize => self.type_isize(),
+            ty::UintTy::U8 => self.type_i8(),
+            ty::UintTy::U16 => self.type_i16(),
+            ty::UintTy::U32 => self.type_i32(),
+            ty::UintTy::U64 => self.type_i64(),
+            ty::UintTy::U128 => self.type_i128(),
+        }
+    }
 }
 
 pub fn uncached_gcc_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout<'tcx>, defer: &mut Option<(Struct<'gcc>, TyAndLayout<'tcx>)>) -> Type<'gcc> {
diff --git a/test.sh b/test.sh
index 1beeee136df3..1d2fbd0a24cf 100755
--- a/test.sh
+++ b/test.sh
@@ -97,25 +97,6 @@ function std_tests() {
 #echo "[BUILD] sysroot in release mode"
 #./build_sysroot/build_sysroot.sh --release
 
-# TODO(antoyo): uncomment when it works.
-#pushd simple-raytracer
-#if [[ "$HOST_TRIPLE" = "$TARGET_TRIPLE" ]]; then
-    #echo "[BENCH COMPILE] ebobby/simple-raytracer"
-    #hyperfine --runs ${RUN_RUNS:-10} --warmup 1 --prepare "rm -r target/*/debug || true" \
-    #"RUSTFLAGS='' cargo build --target $TARGET_TRIPLE" \
-    #"../cargo.sh build"
-
-    #echo "[BENCH RUN] ebobby/simple-raytracer"
-    #cp ./target/*/debug/main ./raytracer_cg_gccjit
-    #hyperfine --runs ${RUN_RUNS:-10} ./raytracer_cg_llvm ./raytracer_cg_gccjit
-#else
-    #echo "[BENCH COMPILE] ebobby/simple-raytracer (skipped)"
-    #echo "[COMPILE] ebobby/simple-raytracer"
-    #../cargo.sh build
-    #echo "[BENCH RUN] ebobby/simple-raytracer (skipped)"
-#fi
-#popd
-
 function test_libcore() {
     pushd build_sysroot/sysroot_src/library/core/tests
     echo "[TEST] libcore"
@@ -124,19 +105,6 @@ function test_libcore() {
     popd
 }
 
-# TODO(antoyo): uncomment when it works.
-#pushd regex
-#echo "[TEST] rust-lang/regex example shootout-regex-dna"
-#../cargo.sh clean
-## Make sure `[codegen mono items] start` doesn't poison the diff
-#../cargo.sh build --example shootout-regex-dna
-#cat examples/regexdna-input.txt | ../cargo.sh run --example shootout-regex-dna | grep -v "Spawned thread" > res.txt
-#diff -u res.txt examples/regexdna-output.txt
-
-#echo "[TEST] rust-lang/regex tests"
-#../cargo.sh test --tests -- --exclude-should-panic --test-threads 1 -Zunstable-options
-#popd
-
 #echo
 #echo "[BENCH COMPILE] mod_bench"
 
@@ -153,6 +121,40 @@ function test_libcore() {
 #echo "[BENCH RUN] mod_bench"
 #hyperfine --runs ${RUN_RUNS:-10} ./target/out/mod_bench{,_inline} ./target/out/mod_bench_llvm_*
 
+function extended_sysroot_tests() {
+    pushd rand
+    cargo clean
+    echo "[TEST] rust-random/rand"
+    ../cargo.sh test --workspace
+    popd
+
+    #pushd simple-raytracer
+    #echo "[BENCH COMPILE] ebobby/simple-raytracer"
+    #hyperfine --runs "${RUN_RUNS:-10}" --warmup 1 --prepare "cargo clean" \
+    #"RUSTC=rustc RUSTFLAGS='' cargo build" \
+    #"../cargo.sh build"
+
+    #echo "[BENCH RUN] ebobby/simple-raytracer"
+    #cp ./target/debug/main ./raytracer_cg_gcc
+    #hyperfine --runs "${RUN_RUNS:-10}" ./raytracer_cg_llvm ./raytracer_cg_gcc
+    #popd
+
+    pushd regex
+    echo "[TEST] rust-lang/regex example shootout-regex-dna"
+    cargo clean
+    export CG_RUSTFLAGS="--cap-lints warn" # newer aho_corasick versions throw a deprecation warning
+    # Make sure `[codegen mono items] start` doesn't poison the diff
+    ../cargo.sh build --example shootout-regex-dna
+    cat examples/regexdna-input.txt \
+        | ../cargo.sh run --example shootout-regex-dna \
+        | grep -v "Spawned thread" > res.txt
+    diff -u res.txt examples/regexdna-output.txt
+
+    echo "[TEST] rust-lang/regex tests"
+    ../cargo.sh test --tests -- --exclude-should-panic --test-threads 1 -Zunstable-options -q
+    popd
+}
+
 function test_rustc() {
     echo
     echo "[TEST] rust-lang/rust"
@@ -165,23 +167,7 @@ function test_rustc() {
     git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(')
     export RUSTFLAGS=
 
-    git apply - <<EOF
-diff --git a/src/tools/compiletest/src/header.rs b/src/tools/compiletest/src/header.rs
-index 887d27fd6dca4..2c2239f2b83d1 100644
---- a/src/tools/compiletest/src/header.rs
-+++ b/src/tools/compiletest/src/header.rs
-@@ -806,8 +806,8 @@ pub fn make_test_description<R: Read>(
-     cfg: Option<&str>,
- ) -> test::TestDesc {
-     let mut ignore = false;
-     #[cfg(not(bootstrap))]
--    let ignore_message: Option<String> = None;
-+    let ignore_message: Option<&str> = None;
-     let mut should_fail = false;
-
-     let rustc_has_profiler_support = env::var_os("RUSTC_PROFILER_SUPPORT").is_some();
-
-EOF
+    git apply ../rustc_patches/compile_test.patch || true
 
     rm config.toml || true
 
@@ -205,7 +191,7 @@ EOF
 
     git checkout -- src/test/ui/issues/auxiliary/issue-3136-a.rs # contains //~ERROR, but shouldn't be removed
 
-    rm -r src/test/ui/{abi*,extern/,panic-runtime/,panics/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,simd*,borrowck/,test*,*lto*.rs} || true
+    rm -r src/test/ui/{abi*,extern/,panic-runtime/,panics/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,test*,*lto*.rs} || true
     for test in $(rg --files-with-matches "catch_unwind|should_panic|thread|lto" src/test/ui); do
       rm $test
     done
@@ -239,6 +225,10 @@ case $1 in
         std_tests
         ;;
 
+    "--extended-tests")
+        extended_sysroot_tests
+        ;;
+
     "--build-sysroot")
         build_sysroot
         ;;
@@ -249,6 +239,7 @@ case $1 in
         build_sysroot
         std_tests
         test_libcore
+        extended_sysroot_tests
         test_rustc
         ;;
 esac

From 267e5e1ea78138543c99330b784a5b013ee03064 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 6 Feb 2022 17:04:24 -0500
Subject: [PATCH 052/997] Add support for target builtins

---
 src/builder.rs        | 4 ++++
 src/int.rs            | 4 ++--
 src/intrinsic/simd.rs | 4 ++++
 3 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index d53e1712dc8f..a4616d8673ec 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -231,6 +231,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                     }
                     else {
                         assert!(!((actual_ty.is_vector() && !expected_ty.is_vector()) || (!actual_ty.is_vector() && expected_ty.is_vector())), "{:?} ({}) -> {:?} ({}), index: {:?}[{}]", actual_ty, actual_ty.is_vector(), expected_ty, expected_ty.is_vector(), func_ptr, index);
+                        // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
                         self.bitcast(actual_val, expected_ty)
                     }
                 }
@@ -1320,11 +1321,13 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             if vec_num_units < mask_num_units {
                 // NOTE: the mask needs to be the same length as the input vectors, so join the 2
                 // vectors and create a dummy second vector.
+                // TODO(antoyo): switch to using new_vector_access.
                 let array = self.context.new_bitcast(None, v1, array_type);
                 let mut elements = vec![];
                 for i in 0..vec_num_units {
                     elements.push(self.context.new_array_access(None, array, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
                 }
+                // TODO(antoyo): switch to using new_vector_access.
                 let array = self.context.new_bitcast(None, v2, array_type);
                 for i in 0..vec_num_units {
                     elements.push(self.context.new_array_access(None, array, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
@@ -1347,6 +1350,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             // NOTE: if padding was added, only select the number of elements of the masks to
             // remove that padding in the result.
             let mut elements = vec![];
+            // TODO(antoyo): switch to using new_vector_access.
             let array = self.context.new_bitcast(None, result, array_type);
             for i in 0..mask_num_units {
                 elements.push(self.context.new_array_access(None, array, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
diff --git a/src/int.rs b/src/int.rs
index ed779d5d888d..0c5dab004668 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -156,6 +156,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             if a_type != b_type {
                 if a_type.is_vector() {
                     // Vector types need to be bitcast.
+                    // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
                     b = self.context.new_bitcast(None, b, a.get_type());
                 }
                 else {
@@ -649,8 +650,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             // Since u128 and i128 are the only types that can be unsupported, we know the type of
             // value and the destination type have the same size, so a bitcast is fine.
 
-            // TODO(antoyo): perhaps use __builtin_convertvector for vector casting. (This is elsewhere,
-            // though.)
+            // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
             self.context.new_bitcast(None, value, dest_typ)
         }
     }
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 11f1e7dd9993..b8c6038896d8 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -203,12 +203,14 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let param1_type = builtin.get_param(0).to_rvalue().get_type();
         let vector =
             if vector.get_type() != param1_type {
+                // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
                 bx.context.new_bitcast(None, vector, param1_type)
             }
             else {
                 vector
             };
         let result = bx.context.new_call(None, builtin, &[vector, value, bx.context.new_cast(None, index, bx.int_type)]);
+        // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
         return Ok(bx.context.new_bitcast(None, result, vector.get_type()));
     }
     if name == sym::simd_extract {
@@ -277,6 +279,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
             let vector_type = bx.context.new_vector_type(out_type, 8);
             let vector = args[0].immediate();
             let array_type = bx.context.new_array_type(None, in_type, 8);
+            // TODO(antoyo): switch to using new_vector_access or __builtin_convertvector for vector casting.
             let array = bx.context.new_bitcast(None, vector, array_type);
 
             let cast_vec_element = |index| {
@@ -533,6 +536,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
 
         let func = bx.context.get_target_builtin_function(builtin_name);
         let result = bx.context.new_call(None, func, &[lhs, rhs]);
+        // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
         return Ok(bx.context.new_bitcast(None, result, vec_ty));
     }
 

From 927eea3860330a52b4594bdad1a771499c8aee19 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 28 Mar 2022 21:23:17 -0400
Subject: [PATCH 053/997] Add support for packed struct

---
 src/type_.rs | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/type_.rs b/src/type_.rs
index 8a17d94da41f..d65649ecfa3e 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -115,7 +115,7 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         self.context.new_function_pointer_type(None, return_type, params, false)
     }
 
-    fn type_struct(&self, fields: &[Type<'gcc>], _packed: bool) -> Type<'gcc> {
+    fn type_struct(&self, fields: &[Type<'gcc>], packed: bool) -> Type<'gcc> {
         let types = fields.to_vec();
         if let Some(typ) = self.struct_types.borrow().get(fields) {
             return typ.clone();
@@ -123,8 +123,10 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let fields: Vec<_> = fields.iter().enumerate()
             .map(|(index, field)| self.context.new_field(None, *field, &format!("field{}_TODO", index)))
             .collect();
-        // TODO(antoyo): use packed.
         let typ = self.context.new_struct_type(None, "struct", &fields).as_type();
+        if packed {
+            typ.set_packed();
+        }
         self.struct_types.borrow_mut().insert(types, typ);
         typ
     }
@@ -209,12 +211,14 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         self.type_array(self.type_from_integer(unit), size / unit_size)
     }
 
-    pub fn set_struct_body(&self, typ: Struct<'gcc>, fields: &[Type<'gcc>], _packed: bool) {
-        // TODO(antoyo): use packed.
+    pub fn set_struct_body(&self, typ: Struct<'gcc>, fields: &[Type<'gcc>], packed: bool) {
         let fields: Vec<_> = fields.iter().enumerate()
             .map(|(index, field)| self.context.new_field(None, *field, &format!("field_{}", index)))
             .collect();
         typ.set_fields(None, &fields);
+        if packed {
+            typ.as_type().set_packed();
+        }
     }
 
     pub fn type_named_struct(&self, name: &str) -> Struct<'gcc> {

From 9bb797c2aef1a5175185f4c7d25fa23eaaeec326 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sun, 27 Mar 2022 18:05:23 +0200
Subject: [PATCH 054/997] Add missing vendor intrinsics

---
 src/base.rs           |  3 +++
 src/intrinsic/llvm.rs | 14 ++++++++++++++
 2 files changed, 17 insertions(+)

diff --git a/src/base.rs b/src/base.rs
index 4ce5cdaccd3a..d88fe9bca2ac 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -79,7 +79,10 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
         // TODO(antoyo): only add the following cli argument if the feature is supported.
+        context.add_command_line_option("-msse2");
         context.add_command_line_option("-mavx2");
+        context.add_command_line_option("-msha");
+        context.add_command_line_option("-mpclmul");
         // FIXME(antoyo): the following causes an illegal instruction on vmovdqu64 in std_example on my CPU.
         // Only add if the CPU supports it.
         //context.add_command_line_option("-mavx512f");
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 1a2a352b5a3b..7634c649bc34 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -16,6 +16,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
             "llvm.x86.avx2.pshuf.b" => "__builtin_ia32_pshufb256",
             "llvm.x86.avx2.pslli.d" => "__builtin_ia32_pslldi256",
             "llvm.x86.avx2.psrli.d" => "__builtin_ia32_psrldi256",
+            "llvm.x86.sse2.pslli.q" => "__builtin_ia32_psllqi128",
             "llvm.x86.avx.vzeroupper" => "__builtin_ia32_vzeroupper",
             "llvm.x86.avx2.vperm2i128" => "__builtin_ia32_permti256",
             "llvm.x86.avx2.psrli.w" => "__builtin_ia32_psrlwi256",
@@ -28,6 +29,11 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
             "llvm.x86.avx2.pabs.b" => "__builtin_ia32_pabsb256",
             "llvm.x86.avx2.psrli.q" => "__builtin_ia32_psrlqi256",
             "llvm.x86.sse41.pblendvb" => "__builtin_ia32_pblendvb128",
+            "llvm.x86.sse41.pblendw" => "__builtin_ia32_pblendw128",
+            "llvm.x86.sse42.crc32.32.8" => "__builtin_ia32_crc32qi",
+            "llvm.x86.sse42.crc32.32.16" => "__builtin_ia32_crc32hi",
+            "llvm.x86.sse42.crc32.32.32" => "__builtin_ia32_crc32si",
+            "llvm.x86.sse42.crc32.64.64" => "__builtin_ia32_crc32di",
             "llvm.x86.avx2.pavg.w" => "__builtin_ia32_pavgw256",
             "llvm.x86.avx2.pavg.b" => "__builtin_ia32_pavgb256",
             "llvm.x86.avx2.phadd.w" => "__builtin_ia32_phaddw256",
@@ -113,6 +119,14 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
             "llvm.x86.avx2.psrlv.q" => "__builtin_ia32_psrlv2di",
             "llvm.x86.avx2.psrlv.q.256" => "__builtin_ia32_psrlv4di",
             "llvm.x86.sse.sqrt.ss" => "__builtin_ia32_sqrtss",
+            "llvm.x86.pclmulqdq" => "__builtin_ia32_pclmulqdq128",
+            "llvm.x86.sha1msg1" => "__builtin_ia32_sha1msg1",
+            "llvm.x86.sha1msg2" => "__builtin_ia32_sha1msg2",
+            "llvm.x86.sha1nexte" => "__builtin_ia32_sha1nexte",
+            "llvm.x86.sha1rnds4" => "__builtin_ia32_sha1rnds4",
+            "llvm.x86.sha256msg1" => "__builtin_ia32_sha256msg1",
+            "llvm.x86.sha256msg2" => "__builtin_ia32_sha256msg2",
+            "llvm.x86.sha256rnds2" => "__builtin_ia32_sha256rnds2",
 
             "llvm.sqrt.v2f64" => "__builtin_ia32_sqrtpd",
             _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),

From 3970825b9272411c665bba95bc30894299c8520e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume.gomez@huawei.com>
Date: Wed, 30 Mar 2022 16:20:58 +0200
Subject: [PATCH 055/997] Add intrinsic translation for x86 arch

---
 src/intrinsic/llvm.rs | 135 +-------
 src/intrinsic/x86.rs  | 770 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 777 insertions(+), 128 deletions(-)
 create mode 100644 src/intrinsic/x86.rs

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 7634c649bc34..e6d8f78da603 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -3,134 +3,13 @@ use gccjit::Function;
 use crate::context::CodegenCx;
 
 pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
-    let gcc_name =
-        match name {
-            "llvm.x86.xgetbv" => "__builtin_ia32_xgetbv",
-            // NOTE: this doc specifies the equivalent GCC builtins: http://huonw.github.io/llvmint/llvmint/x86/index.html
-            "llvm.x86.sse2.pmovmskb.128" => "__builtin_ia32_pmovmskb128",
-            "llvm.x86.avx2.pmovmskb" => "__builtin_ia32_pmovmskb256",
-            "llvm.x86.sse2.cmp.pd" => "__builtin_ia32_cmppd",
-            "llvm.x86.sse2.movmsk.pd" => "__builtin_ia32_movmskpd",
-            "llvm.x86.ssse3.pshuf.b.128" => "__builtin_ia32_pshufb128",
-            "llvm.x86.sse2.pause" => "__builtin_ia32_pause",
-            "llvm.x86.avx2.pshuf.b" => "__builtin_ia32_pshufb256",
-            "llvm.x86.avx2.pslli.d" => "__builtin_ia32_pslldi256",
-            "llvm.x86.avx2.psrli.d" => "__builtin_ia32_psrldi256",
-            "llvm.x86.sse2.pslli.q" => "__builtin_ia32_psllqi128",
-            "llvm.x86.avx.vzeroupper" => "__builtin_ia32_vzeroupper",
-            "llvm.x86.avx2.vperm2i128" => "__builtin_ia32_permti256",
-            "llvm.x86.avx2.psrli.w" => "__builtin_ia32_psrlwi256",
-            "llvm.x86.sse2.storeu.dq" => "__builtin_ia32_storedqu",
-            "llvm.x86.sse2.psrli.w" => "__builtin_ia32_psrlwi128",
-            "llvm.x86.avx2.pabs.d" => "__builtin_ia32_pabsd256",
-            "llvm.x86.sse2.psrli.q" => "__builtin_ia32_psrlqi128",
-            "llvm.x86.avx2.pabs.w" => "__builtin_ia32_pabsw256",
-            "llvm.x86.avx2.pblendvb" => "__builtin_ia32_pblendvb256",
-            "llvm.x86.avx2.pabs.b" => "__builtin_ia32_pabsb256",
-            "llvm.x86.avx2.psrli.q" => "__builtin_ia32_psrlqi256",
-            "llvm.x86.sse41.pblendvb" => "__builtin_ia32_pblendvb128",
-            "llvm.x86.sse41.pblendw" => "__builtin_ia32_pblendw128",
-            "llvm.x86.sse42.crc32.32.8" => "__builtin_ia32_crc32qi",
-            "llvm.x86.sse42.crc32.32.16" => "__builtin_ia32_crc32hi",
-            "llvm.x86.sse42.crc32.32.32" => "__builtin_ia32_crc32si",
-            "llvm.x86.sse42.crc32.64.64" => "__builtin_ia32_crc32di",
-            "llvm.x86.avx2.pavg.w" => "__builtin_ia32_pavgw256",
-            "llvm.x86.avx2.pavg.b" => "__builtin_ia32_pavgb256",
-            "llvm.x86.avx2.phadd.w" => "__builtin_ia32_phaddw256",
-            "llvm.x86.avx2.phadd.d" => "__builtin_ia32_phaddd256",
-            "llvm.x86.avx2.phadd.sw" => "__builtin_ia32_phaddsw256",
-            "llvm.x86.avx2.phsub.w" => "__builtin_ia32_phsubw256",
-            "llvm.x86.avx2.phsub.d" => "__builtin_ia32_phsubd256",
-            "llvm.x86.avx2.phsub.sw" => "__builtin_ia32_phsubsw256",
-            "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gatherd_d",
-            "llvm.x86.avx2.gather.d.d.256" => "__builtin_ia32_gatherd_d256",
-            "llvm.x86.avx2.gather.d.ps" => "__builtin_ia32_gatherd_ps",
-            "llvm.x86.avx2.gather.d.ps.256" => "__builtin_ia32_gatherd_ps256",
-            "llvm.x86.avx2.gather.d.q" => "__builtin_ia32_gatherd_q",
-            "llvm.x86.avx2.gather.d.q.256" => "__builtin_ia32_gatherd_q256",
-            "llvm.x86.avx2.gather.d.pd" => "__builtin_ia32_gatherd_pd",
-            "llvm.x86.avx2.gather.d.pd.256" => "__builtin_ia32_gatherd_pd256",
-            "llvm.x86.avx2.gather.q.d" => "__builtin_ia32_gatherq_d",
-            "llvm.x86.avx2.gather.q.d.256" => "__builtin_ia32_gatherq_d256",
-            "llvm.x86.avx2.gather.q.ps" => "__builtin_ia32_gatherq_ps",
-            "llvm.x86.avx2.gather.q.ps.256" => "__builtin_ia32_gatherq_ps256",
-            "llvm.x86.avx2.gather.q.q" => "__builtin_ia32_gatherq_q",
-            "llvm.x86.avx2.gather.q.q.256" => "__builtin_ia32_gatherq_q256",
-            "llvm.x86.avx2.gather.q.pd" => "__builtin_ia32_gatherq_pd",
-            "llvm.x86.avx2.gather.q.pd.256" => "__builtin_ia32_gatherq_pd256",
-            "llvm.x86.avx2.pmadd.wd" => "__builtin_ia32_pmaddwd256",
-            "llvm.x86.avx2.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw256",
-            "llvm.x86.avx2.maskload.d" => "__builtin_ia32_maskloadd",
-            "llvm.x86.avx2.maskload.d.256" => "__builtin_ia32_maskloadd256",
-            "llvm.x86.avx2.maskload.q" => "__builtin_ia32_maskloadq",
-            "llvm.x86.avx2.maskload.q.256" => "__builtin_ia32_maskloadq256",
-            "llvm.x86.avx2.maskstore.d" => "__builtin_ia32_maskstored",
-            "llvm.x86.avx2.maskstore.d.256" => "__builtin_ia32_maskstored256",
-            "llvm.x86.avx2.maskstore.q" => "__builtin_ia32_maskstoreq",
-            "llvm.x86.avx2.maskstore.q.256" => "__builtin_ia32_maskstoreq256",
-            "llvm.x86.avx2.pmaxs.w" => "__builtin_ia32_pmaxsw256",
-            "llvm.x86.avx2.pmaxs.d" => "__builtin_ia32_pmaxsd256",
-            "llvm.x86.avx2.pmaxs.b" => "__builtin_ia32_pmaxsb256",
-            "llvm.x86.avx2.pmaxu.w" => "__builtin_ia32_pmaxuw256",
-            "llvm.x86.avx2.pmaxu.d" => "__builtin_ia32_pmaxud256",
-            "llvm.x86.avx2.pmaxu.b" => "__builtin_ia32_pmaxub256",
-            "llvm.x86.avx2.pmins.w" => "__builtin_ia32_pminsw256",
-            "llvm.x86.avx2.pmins.d" => "__builtin_ia32_pminsd256",
-            "llvm.x86.avx2.pmins.b" => "__builtin_ia32_pminsb256",
-            "llvm.x86.avx2.pminu.w" => "__builtin_ia32_pminuw256",
-            "llvm.x86.avx2.pminu.d" => "__builtin_ia32_pminud256",
-            "llvm.x86.avx2.pminu.b" => "__builtin_ia32_pminub256",
-            "llvm.x86.avx2.mpsadbw" => "__builtin_ia32_mpsadbw256",
-            "llvm.x86.avx2.pmul.dq" => "__builtin_ia32_pmuldq256",
-            "llvm.x86.avx2.pmulu.dq" => "__builtin_ia32_pmuludq256",
-            "llvm.x86.avx2.pmulh.w" => "__builtin_ia32_pmulhw256",
-            "llvm.x86.avx2.pmulhu.w" => "__builtin_ia32_pmulhuw256",
-            "llvm.x86.avx2.pmul.hr.sw" => "__builtin_ia32_pmulhrsw256",
-            "llvm.x86.avx2.packsswb" => "__builtin_ia32_packsswb256",
-            "llvm.x86.avx2.packssdw" => "__builtin_ia32_packssdw256",
-            "llvm.x86.avx2.packuswb" => "__builtin_ia32_packuswb256",
-            "llvm.x86.avx2.packusdw" => "__builtin_ia32_packusdw256",
-            "llvm.x86.avx2.permd" => "__builtin_ia32_permvarsi256",
-            "llvm.x86.avx2.permps" => "__builtin_ia32_permvarsf256",
-            "llvm.x86.avx2.psad.bw" => "__builtin_ia32_psadbw256",
-            "llvm.x86.avx2.psign.w" => "__builtin_ia32_psignw256",
-            "llvm.x86.avx2.psign.d" => "__builtin_ia32_psignd256",
-            "llvm.x86.avx2.psign.b" => "__builtin_ia32_psignb256",
-            "llvm.x86.avx2.psll.w" => "__builtin_ia32_psllw256",
-            "llvm.x86.avx2.psll.d" => "__builtin_ia32_pslld256",
-            "llvm.x86.avx2.psll.q" => "__builtin_ia32_psllq256",
-            "llvm.x86.avx2.pslli.w" => "__builtin_ia32_psllwi256",
-            "llvm.x86.avx2.pslli.q" => "__builtin_ia32_psllqi256",
-            "llvm.x86.avx2.psllv.d" => "__builtin_ia32_psllv4si",
-            "llvm.x86.avx2.psllv.d.256" => "__builtin_ia32_psllv8si",
-            "llvm.x86.avx2.psllv.q" => "__builtin_ia32_psllv2di",
-            "llvm.x86.avx2.psllv.q.256" => "__builtin_ia32_psllv4di",
-            "llvm.x86.avx2.psra.w" => "__builtin_ia32_psraw256",
-            "llvm.x86.avx2.psra.d" => "__builtin_ia32_psrad256",
-            "llvm.x86.avx2.psrai.w" => "__builtin_ia32_psrawi256",
-            "llvm.x86.avx2.psrai.d" => "__builtin_ia32_psradi256",
-            "llvm.x86.avx2.psrav.d" => "__builtin_ia32_psrav4si",
-            "llvm.x86.avx2.psrav.d.256" => "__builtin_ia32_psrav8si",
-            "llvm.x86.avx2.psrl.w" => "__builtin_ia32_psrlw256",
-            "llvm.x86.avx2.psrl.d" => "__builtin_ia32_psrld256",
-            "llvm.x86.avx2.psrl.q" => "__builtin_ia32_psrlq256",
-            "llvm.x86.avx2.psrlv.d" => "__builtin_ia32_psrlv4si",
-            "llvm.x86.avx2.psrlv.d.256" => "__builtin_ia32_psrlv8si",
-            "llvm.x86.avx2.psrlv.q" => "__builtin_ia32_psrlv2di",
-            "llvm.x86.avx2.psrlv.q.256" => "__builtin_ia32_psrlv4di",
-            "llvm.x86.sse.sqrt.ss" => "__builtin_ia32_sqrtss",
-            "llvm.x86.pclmulqdq" => "__builtin_ia32_pclmulqdq128",
-            "llvm.x86.sha1msg1" => "__builtin_ia32_sha1msg1",
-            "llvm.x86.sha1msg2" => "__builtin_ia32_sha1msg2",
-            "llvm.x86.sha1nexte" => "__builtin_ia32_sha1nexte",
-            "llvm.x86.sha1rnds4" => "__builtin_ia32_sha1rnds4",
-            "llvm.x86.sha256msg1" => "__builtin_ia32_sha256msg1",
-            "llvm.x86.sha256msg2" => "__builtin_ia32_sha256msg2",
-            "llvm.x86.sha256rnds2" => "__builtin_ia32_sha256rnds2",
-
-            "llvm.sqrt.v2f64" => "__builtin_ia32_sqrtpd",
-            _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
-        };
+    let gcc_name = match name {
+        "llvm.x86.xgetbv" => "__builtin_ia32_xgetbv",
+        // NOTE: this doc specifies the equivalent GCC builtins: http://huonw.github.io/llvmint/llvmint/x86/index.html
+        "llvm.sqrt.v2f64" => "__builtin_ia32_sqrtpd",
+        // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
+        _ => include!("x86.rs"),
+    };
 
     let func = cx.context.get_target_builtin_function(gcc_name);
     cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
diff --git a/src/intrinsic/x86.rs b/src/intrinsic/x86.rs
new file mode 100644
index 000000000000..4918325e74c8
--- /dev/null
+++ b/src/intrinsic/x86.rs
@@ -0,0 +1,770 @@
+match name {
+// x86
+"llvm.x86.addcarry.u32" => "__builtin_ia32_addcarry_u32",
+"llvm.x86.addcarry.u64" => "__builtin_ia32_addcarry_u64",
+"llvm.x86.addcarryx.u32" => "__builtin_ia32_addcarryx_u32",
+"llvm.x86.addcarryx.u64" => "__builtin_ia32_addcarryx_u64",
+"llvm.x86.aesni.aesdec" => "__builtin_ia32_aesdec128",
+"llvm.x86.aesni.aesdeclast" => "__builtin_ia32_aesdeclast128",
+"llvm.x86.aesni.aesenc" => "__builtin_ia32_aesenc128",
+"llvm.x86.aesni.aesenclast" => "__builtin_ia32_aesenclast128",
+"llvm.x86.aesni.aesimc" => "__builtin_ia32_aesimc128",
+"llvm.x86.aesni.aeskeygenassist" => "__builtin_ia32_aeskeygenassist128",
+"llvm.x86.avx.addsub.pd.256" => "__builtin_ia32_addsubpd256",
+"llvm.x86.avx.addsub.ps.256" => "__builtin_ia32_addsubps256",
+"llvm.x86.avx.blend.pd.256" => "__builtin_ia32_blendpd256",
+"llvm.x86.avx.blend.ps.256" => "__builtin_ia32_blendps256",
+"llvm.x86.avx.blendv.pd.256" => "__builtin_ia32_blendvpd256",
+"llvm.x86.avx.blendv.ps.256" => "__builtin_ia32_blendvps256",
+"llvm.x86.avx.cmp.pd.256" => "__builtin_ia32_cmppd256",
+"llvm.x86.avx.cmp.ps.256" => "__builtin_ia32_cmpps256",
+"llvm.x86.avx.cvt.pd2.ps.256" => "__builtin_ia32_cvtpd2ps256",
+"llvm.x86.avx.cvt.pd2dq.256" => "__builtin_ia32_cvtpd2dq256",
+"llvm.x86.avx.cvt.ps2.pd.256" => "__builtin_ia32_cvtps2pd256",
+"llvm.x86.avx.cvt.ps2dq.256" => "__builtin_ia32_cvtps2dq256",
+"llvm.x86.avx.cvtdq2.pd.256" => "__builtin_ia32_cvtdq2pd256",
+"llvm.x86.avx.cvtdq2.ps.256" => "__builtin_ia32_cvtdq2ps256",
+"llvm.x86.avx.cvtt.pd2dq.256" => "__builtin_ia32_cvttpd2dq256",
+"llvm.x86.avx.cvtt.ps2dq.256" => "__builtin_ia32_cvttps2dq256",
+"llvm.x86.avx.dp.ps.256" => "__builtin_ia32_dpps256",
+"llvm.x86.avx.hadd.pd.256" => "__builtin_ia32_haddpd256",
+"llvm.x86.avx.hadd.ps.256" => "__builtin_ia32_haddps256",
+"llvm.x86.avx.hsub.pd.256" => "__builtin_ia32_hsubpd256",
+"llvm.x86.avx.hsub.ps.256" => "__builtin_ia32_hsubps256",
+"llvm.x86.avx.ldu.dq.256" => "__builtin_ia32_lddqu256",
+"llvm.x86.avx.maskload.pd" => "__builtin_ia32_maskloadpd",
+"llvm.x86.avx.maskload.pd.256" => "__builtin_ia32_maskloadpd256",
+"llvm.x86.avx.maskload.ps" => "__builtin_ia32_maskloadps",
+"llvm.x86.avx.maskload.ps.256" => "__builtin_ia32_maskloadps256",
+"llvm.x86.avx.maskstore.pd" => "__builtin_ia32_maskstorepd",
+"llvm.x86.avx.maskstore.pd.256" => "__builtin_ia32_maskstorepd256",
+"llvm.x86.avx.maskstore.ps" => "__builtin_ia32_maskstoreps",
+"llvm.x86.avx.maskstore.ps.256" => "__builtin_ia32_maskstoreps256",
+"llvm.x86.avx.max.pd.256" => "__builtin_ia32_maxpd256",
+"llvm.x86.avx.max.ps.256" => "__builtin_ia32_maxps256",
+"llvm.x86.avx.min.pd.256" => "__builtin_ia32_minpd256",
+"llvm.x86.avx.min.ps.256" => "__builtin_ia32_minps256",
+"llvm.x86.avx.movmsk.pd.256" => "__builtin_ia32_movmskpd256",
+"llvm.x86.avx.movmsk.ps.256" => "__builtin_ia32_movmskps256",
+"llvm.x86.avx.ptestc.256" => "__builtin_ia32_ptestc256",
+"llvm.x86.avx.ptestnzc.256" => "__builtin_ia32_ptestnzc256",
+"llvm.x86.avx.ptestz.256" => "__builtin_ia32_ptestz256",
+"llvm.x86.avx.rcp.ps.256" => "__builtin_ia32_rcpps256",
+"llvm.x86.avx.round.pd.256" => "__builtin_ia32_roundpd256",
+"llvm.x86.avx.round.ps.256" => "__builtin_ia32_roundps256",
+"llvm.x86.avx.rsqrt.ps.256" => "__builtin_ia32_rsqrtps256",
+"llvm.x86.avx.sqrt.pd.256" => "__builtin_ia32_sqrtpd256",
+"llvm.x86.avx.sqrt.ps.256" => "__builtin_ia32_sqrtps256",
+"llvm.x86.avx.storeu.dq.256" => "__builtin_ia32_storedqu256",
+"llvm.x86.avx.storeu.pd.256" => "__builtin_ia32_storeupd256",
+"llvm.x86.avx.storeu.ps.256" => "__builtin_ia32_storeups256",
+"llvm.x86.avx.vbroadcastf128.pd.256" => "__builtin_ia32_vbroadcastf128_pd256",
+"llvm.x86.avx.vbroadcastf128.ps.256" => "__builtin_ia32_vbroadcastf128_ps256",
+"llvm.x86.avx.vextractf128.pd.256" => "__builtin_ia32_vextractf128_pd256",
+"llvm.x86.avx.vextractf128.ps.256" => "__builtin_ia32_vextractf128_ps256",
+"llvm.x86.avx.vextractf128.si.256" => "__builtin_ia32_vextractf128_si256",
+"llvm.x86.avx.vinsertf128.pd.256" => "__builtin_ia32_vinsertf128_pd256",
+"llvm.x86.avx.vinsertf128.ps.256" => "__builtin_ia32_vinsertf128_ps256",
+"llvm.x86.avx.vinsertf128.si.256" => "__builtin_ia32_vinsertf128_si256",
+"llvm.x86.avx.vperm2f128.pd.256" => "__builtin_ia32_vperm2f128_pd256",
+"llvm.x86.avx.vperm2f128.ps.256" => "__builtin_ia32_vperm2f128_ps256",
+"llvm.x86.avx.vperm2f128.si.256" => "__builtin_ia32_vperm2f128_si256",
+"llvm.x86.avx.vpermilvar.pd" => "__builtin_ia32_vpermilvarpd",
+"llvm.x86.avx.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256",
+"llvm.x86.avx.vpermilvar.ps" => "__builtin_ia32_vpermilvarps",
+"llvm.x86.avx.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256",
+"llvm.x86.avx.vtestc.pd" => "__builtin_ia32_vtestcpd",
+"llvm.x86.avx.vtestc.pd.256" => "__builtin_ia32_vtestcpd256",
+"llvm.x86.avx.vtestc.ps" => "__builtin_ia32_vtestcps",
+"llvm.x86.avx.vtestc.ps.256" => "__builtin_ia32_vtestcps256",
+"llvm.x86.avx.vtestnzc.pd" => "__builtin_ia32_vtestnzcpd",
+"llvm.x86.avx.vtestnzc.pd.256" => "__builtin_ia32_vtestnzcpd256",
+"llvm.x86.avx.vtestnzc.ps" => "__builtin_ia32_vtestnzcps",
+"llvm.x86.avx.vtestnzc.ps.256" => "__builtin_ia32_vtestnzcps256",
+"llvm.x86.avx.vtestz.pd" => "__builtin_ia32_vtestzpd",
+"llvm.x86.avx.vtestz.pd.256" => "__builtin_ia32_vtestzpd256",
+"llvm.x86.avx.vtestz.ps" => "__builtin_ia32_vtestzps",
+"llvm.x86.avx.vtestz.ps.256" => "__builtin_ia32_vtestzps256",
+"llvm.x86.avx.vzeroall" => "__builtin_ia32_vzeroall",
+"llvm.x86.avx.vzeroupper" => "__builtin_ia32_vzeroupper",
+"llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gatherd_d",
+"llvm.x86.avx2.gather.d.d.256" => "__builtin_ia32_gatherd_d256",
+"llvm.x86.avx2.gather.d.pd" => "__builtin_ia32_gatherd_pd",
+"llvm.x86.avx2.gather.d.pd.256" => "__builtin_ia32_gatherd_pd256",
+"llvm.x86.avx2.gather.d.ps" => "__builtin_ia32_gatherd_ps",
+"llvm.x86.avx2.gather.d.ps.256" => "__builtin_ia32_gatherd_ps256",
+"llvm.x86.avx2.gather.d.q" => "__builtin_ia32_gatherd_q",
+"llvm.x86.avx2.gather.d.q.256" => "__builtin_ia32_gatherd_q256",
+"llvm.x86.avx2.gather.q.d" => "__builtin_ia32_gatherq_d",
+"llvm.x86.avx2.gather.q.d.256" => "__builtin_ia32_gatherq_d256",
+"llvm.x86.avx2.gather.q.pd" => "__builtin_ia32_gatherq_pd",
+"llvm.x86.avx2.gather.q.pd.256" => "__builtin_ia32_gatherq_pd256",
+"llvm.x86.avx2.gather.q.ps" => "__builtin_ia32_gatherq_ps",
+"llvm.x86.avx2.gather.q.ps.256" => "__builtin_ia32_gatherq_ps256",
+"llvm.x86.avx2.gather.q.q" => "__builtin_ia32_gatherq_q",
+"llvm.x86.avx2.gather.q.q.256" => "__builtin_ia32_gatherq_q256",
+"llvm.x86.avx2.maskload.d" => "__builtin_ia32_maskloadd",
+"llvm.x86.avx2.maskload.d.256" => "__builtin_ia32_maskloadd256",
+"llvm.x86.avx2.maskload.q" => "__builtin_ia32_maskloadq",
+"llvm.x86.avx2.maskload.q.256" => "__builtin_ia32_maskloadq256",
+"llvm.x86.avx2.maskstore.d" => "__builtin_ia32_maskstored",
+"llvm.x86.avx2.maskstore.d.256" => "__builtin_ia32_maskstored256",
+"llvm.x86.avx2.maskstore.q" => "__builtin_ia32_maskstoreq",
+"llvm.x86.avx2.maskstore.q.256" => "__builtin_ia32_maskstoreq256",
+"llvm.x86.avx2.movntdqa" => "__builtin_ia32_movntdqa256",
+"llvm.x86.avx2.mpsadbw" => "__builtin_ia32_mpsadbw256",
+"llvm.x86.avx2.pabs.b" => "__builtin_ia32_pabsb256",
+"llvm.x86.avx2.pabs.d" => "__builtin_ia32_pabsd256",
+"llvm.x86.avx2.pabs.w" => "__builtin_ia32_pabsw256",
+"llvm.x86.avx2.packssdw" => "__builtin_ia32_packssdw256",
+"llvm.x86.avx2.packsswb" => "__builtin_ia32_packsswb256",
+"llvm.x86.avx2.packusdw" => "__builtin_ia32_packusdw256",
+"llvm.x86.avx2.packuswb" => "__builtin_ia32_packuswb256",
+"llvm.x86.avx2.padds.b" => "__builtin_ia32_paddsb256",
+"llvm.x86.avx2.padds.w" => "__builtin_ia32_paddsw256",
+"llvm.x86.avx2.paddus.b" => "__builtin_ia32_paddusb256",
+"llvm.x86.avx2.paddus.w" => "__builtin_ia32_paddusw256",
+"llvm.x86.avx2.pavg.b" => "__builtin_ia32_pavgb256",
+"llvm.x86.avx2.pavg.w" => "__builtin_ia32_pavgw256",
+"llvm.x86.avx2.pblendd.128" => "__builtin_ia32_pblendd128",
+"llvm.x86.avx2.pblendd.256" => "__builtin_ia32_pblendd256",
+"llvm.x86.avx2.pblendvb" => "__builtin_ia32_pblendvb256",
+"llvm.x86.avx2.pblendw" => "__builtin_ia32_pblendw256",
+"llvm.x86.avx2.pbroadcastb.128" => "__builtin_ia32_pbroadcastb128",
+"llvm.x86.avx2.pbroadcastb.256" => "__builtin_ia32_pbroadcastb256",
+"llvm.x86.avx2.pbroadcastd.128" => "__builtin_ia32_pbroadcastd128",
+"llvm.x86.avx2.pbroadcastd.256" => "__builtin_ia32_pbroadcastd256",
+"llvm.x86.avx2.pbroadcastq.128" => "__builtin_ia32_pbroadcastq128",
+"llvm.x86.avx2.pbroadcastq.256" => "__builtin_ia32_pbroadcastq256",
+"llvm.x86.avx2.pbroadcastw.128" => "__builtin_ia32_pbroadcastw128",
+"llvm.x86.avx2.pbroadcastw.256" => "__builtin_ia32_pbroadcastw256",
+"llvm.x86.avx2.permd" => "__builtin_ia32_permvarsi256",
+"llvm.x86.avx2.permps" => "__builtin_ia32_permvarsf256",
+"llvm.x86.avx2.phadd.d" => "__builtin_ia32_phaddd256",
+"llvm.x86.avx2.phadd.sw" => "__builtin_ia32_phaddsw256",
+"llvm.x86.avx2.phadd.w" => "__builtin_ia32_phaddw256",
+"llvm.x86.avx2.phsub.d" => "__builtin_ia32_phsubd256",
+"llvm.x86.avx2.phsub.sw" => "__builtin_ia32_phsubsw256",
+"llvm.x86.avx2.phsub.w" => "__builtin_ia32_phsubw256",
+"llvm.x86.avx2.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw256",
+"llvm.x86.avx2.pmadd.wd" => "__builtin_ia32_pmaddwd256",
+"llvm.x86.avx2.pmaxs.b" => "__builtin_ia32_pmaxsb256",
+"llvm.x86.avx2.pmaxs.d" => "__builtin_ia32_pmaxsd256",
+"llvm.x86.avx2.pmaxs.w" => "__builtin_ia32_pmaxsw256",
+"llvm.x86.avx2.pmaxu.b" => "__builtin_ia32_pmaxub256",
+"llvm.x86.avx2.pmaxu.d" => "__builtin_ia32_pmaxud256",
+"llvm.x86.avx2.pmaxu.w" => "__builtin_ia32_pmaxuw256",
+"llvm.x86.avx2.pmins.b" => "__builtin_ia32_pminsb256",
+"llvm.x86.avx2.pmins.d" => "__builtin_ia32_pminsd256",
+"llvm.x86.avx2.pmins.w" => "__builtin_ia32_pminsw256",
+"llvm.x86.avx2.pminu.b" => "__builtin_ia32_pminub256",
+"llvm.x86.avx2.pminu.d" => "__builtin_ia32_pminud256",
+"llvm.x86.avx2.pminu.w" => "__builtin_ia32_pminuw256",
+"llvm.x86.avx2.pmovmskb" => "__builtin_ia32_pmovmskb256",
+"llvm.x86.avx2.pmovsxbd" => "__builtin_ia32_pmovsxbd256",
+"llvm.x86.avx2.pmovsxbq" => "__builtin_ia32_pmovsxbq256",
+"llvm.x86.avx2.pmovsxbw" => "__builtin_ia32_pmovsxbw256",
+"llvm.x86.avx2.pmovsxdq" => "__builtin_ia32_pmovsxdq256",
+"llvm.x86.avx2.pmovsxwd" => "__builtin_ia32_pmovsxwd256",
+"llvm.x86.avx2.pmovsxwq" => "__builtin_ia32_pmovsxwq256",
+"llvm.x86.avx2.pmovzxbd" => "__builtin_ia32_pmovzxbd256",
+"llvm.x86.avx2.pmovzxbq" => "__builtin_ia32_pmovzxbq256",
+"llvm.x86.avx2.pmovzxbw" => "__builtin_ia32_pmovzxbw256",
+"llvm.x86.avx2.pmovzxdq" => "__builtin_ia32_pmovzxdq256",
+"llvm.x86.avx2.pmovzxwd" => "__builtin_ia32_pmovzxwd256",
+"llvm.x86.avx2.pmovzxwq" => "__builtin_ia32_pmovzxwq256",
+"llvm.x86.avx2.pmul.dq" => "__builtin_ia32_pmuldq256",
+"llvm.x86.avx2.pmul.hr.sw" => "__builtin_ia32_pmulhrsw256",
+"llvm.x86.avx2.pmulh.w" => "__builtin_ia32_pmulhw256",
+"llvm.x86.avx2.pmulhu.w" => "__builtin_ia32_pmulhuw256",
+"llvm.x86.avx2.pmulu.dq" => "__builtin_ia32_pmuludq256",
+"llvm.x86.avx2.psad.bw" => "__builtin_ia32_psadbw256",
+"llvm.x86.avx2.pshuf.b" => "__builtin_ia32_pshufb256",
+"llvm.x86.avx2.psign.b" => "__builtin_ia32_psignb256",
+"llvm.x86.avx2.psign.d" => "__builtin_ia32_psignd256",
+"llvm.x86.avx2.psign.w" => "__builtin_ia32_psignw256",
+"llvm.x86.avx2.psll.d" => "__builtin_ia32_pslld256",
+"llvm.x86.avx2.psll.dq" => "__builtin_ia32_pslldqi256",
+"llvm.x86.avx2.psll.dq.bs" => "__builtin_ia32_pslldqi256_byteshift",
+"llvm.x86.avx2.psll.q" => "__builtin_ia32_psllq256",
+"llvm.x86.avx2.psll.w" => "__builtin_ia32_psllw256",
+"llvm.x86.avx2.pslli.d" => "__builtin_ia32_pslldi256",
+"llvm.x86.avx2.pslli.q" => "__builtin_ia32_psllqi256",
+"llvm.x86.avx2.pslli.w" => "__builtin_ia32_psllwi256",
+"llvm.x86.avx2.psllv.d" => "__builtin_ia32_psllv4si",
+"llvm.x86.avx2.psllv.d.256" => "__builtin_ia32_psllv8si",
+"llvm.x86.avx2.psllv.q" => "__builtin_ia32_psllv2di",
+"llvm.x86.avx2.psllv.q.256" => "__builtin_ia32_psllv4di",
+"llvm.x86.avx2.psra.d" => "__builtin_ia32_psrad256",
+"llvm.x86.avx2.psra.w" => "__builtin_ia32_psraw256",
+"llvm.x86.avx2.psrai.d" => "__builtin_ia32_psradi256",
+"llvm.x86.avx2.psrai.w" => "__builtin_ia32_psrawi256",
+"llvm.x86.avx2.psrav.d" => "__builtin_ia32_psrav4si",
+"llvm.x86.avx2.psrav.d.256" => "__builtin_ia32_psrav8si",
+"llvm.x86.avx2.psrl.d" => "__builtin_ia32_psrld256",
+"llvm.x86.avx2.psrl.dq" => "__builtin_ia32_psrldqi256",
+"llvm.x86.avx2.psrl.dq.bs" => "__builtin_ia32_psrldqi256_byteshift",
+"llvm.x86.avx2.psrl.q" => "__builtin_ia32_psrlq256",
+"llvm.x86.avx2.psrl.w" => "__builtin_ia32_psrlw256",
+"llvm.x86.avx2.psrli.d" => "__builtin_ia32_psrldi256",
+"llvm.x86.avx2.psrli.q" => "__builtin_ia32_psrlqi256",
+"llvm.x86.avx2.psrli.w" => "__builtin_ia32_psrlwi256",
+"llvm.x86.avx2.psrlv.d" => "__builtin_ia32_psrlv4si",
+"llvm.x86.avx2.psrlv.d.256" => "__builtin_ia32_psrlv8si",
+"llvm.x86.avx2.psrlv.q" => "__builtin_ia32_psrlv2di",
+"llvm.x86.avx2.psrlv.q.256" => "__builtin_ia32_psrlv4di",
+"llvm.x86.avx2.psubs.b" => "__builtin_ia32_psubsb256",
+"llvm.x86.avx2.psubs.w" => "__builtin_ia32_psubsw256",
+"llvm.x86.avx2.psubus.b" => "__builtin_ia32_psubusb256",
+"llvm.x86.avx2.psubus.w" => "__builtin_ia32_psubusw256",
+"llvm.x86.avx2.vbroadcast.sd.pd.256" => "__builtin_ia32_vbroadcastsd_pd256",
+"llvm.x86.avx2.vbroadcast.ss.ps" => "__builtin_ia32_vbroadcastss_ps",
+"llvm.x86.avx2.vbroadcast.ss.ps.256" => "__builtin_ia32_vbroadcastss_ps256",
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+"llvm.x86.xop.vfrcz.sd" => "__builtin_ia32_vfrczsd",
+"llvm.x86.xop.vfrcz.ss" => "__builtin_ia32_vfrczss",
+"llvm.x86.xop.vpcmov" => "__builtin_ia32_vpcmov",
+"llvm.x86.xop.vpcmov.256" => "__builtin_ia32_vpcmov_256",
+"llvm.x86.xop.vpcomb" => "__builtin_ia32_vpcomb",
+"llvm.x86.xop.vpcomd" => "__builtin_ia32_vpcomd",
+"llvm.x86.xop.vpcomq" => "__builtin_ia32_vpcomq",
+"llvm.x86.xop.vpcomub" => "__builtin_ia32_vpcomub",
+"llvm.x86.xop.vpcomud" => "__builtin_ia32_vpcomud",
+"llvm.x86.xop.vpcomuq" => "__builtin_ia32_vpcomuq",
+"llvm.x86.xop.vpcomuw" => "__builtin_ia32_vpcomuw",
+"llvm.x86.xop.vpcomw" => "__builtin_ia32_vpcomw",
+"llvm.x86.xop.vpermil2pd" => "__builtin_ia32_vpermil2pd",
+"llvm.x86.xop.vpermil2pd.256" => "__builtin_ia32_vpermil2pd256",
+"llvm.x86.xop.vpermil2ps" => "__builtin_ia32_vpermil2ps",
+"llvm.x86.xop.vpermil2ps.256" => "__builtin_ia32_vpermil2ps256",
+"llvm.x86.xop.vphaddbd" => "__builtin_ia32_vphaddbd",
+"llvm.x86.xop.vphaddbq" => "__builtin_ia32_vphaddbq",
+"llvm.x86.xop.vphaddbw" => "__builtin_ia32_vphaddbw",
+"llvm.x86.xop.vphadddq" => "__builtin_ia32_vphadddq",
+"llvm.x86.xop.vphaddubd" => "__builtin_ia32_vphaddubd",
+"llvm.x86.xop.vphaddubq" => "__builtin_ia32_vphaddubq",
+"llvm.x86.xop.vphaddubw" => "__builtin_ia32_vphaddubw",
+"llvm.x86.xop.vphaddudq" => "__builtin_ia32_vphaddudq",
+"llvm.x86.xop.vphadduwd" => "__builtin_ia32_vphadduwd",
+"llvm.x86.xop.vphadduwq" => "__builtin_ia32_vphadduwq",
+"llvm.x86.xop.vphaddwd" => "__builtin_ia32_vphaddwd",
+"llvm.x86.xop.vphaddwq" => "__builtin_ia32_vphaddwq",
+"llvm.x86.xop.vphsubbw" => "__builtin_ia32_vphsubbw",
+"llvm.x86.xop.vphsubdq" => "__builtin_ia32_vphsubdq",
+"llvm.x86.xop.vphsubwd" => "__builtin_ia32_vphsubwd",
+"llvm.x86.xop.vpmacsdd" => "__builtin_ia32_vpmacsdd",
+"llvm.x86.xop.vpmacsdqh" => "__builtin_ia32_vpmacsdqh",
+"llvm.x86.xop.vpmacsdql" => "__builtin_ia32_vpmacsdql",
+"llvm.x86.xop.vpmacssdd" => "__builtin_ia32_vpmacssdd",
+"llvm.x86.xop.vpmacssdqh" => "__builtin_ia32_vpmacssdqh",
+"llvm.x86.xop.vpmacssdql" => "__builtin_ia32_vpmacssdql",
+"llvm.x86.xop.vpmacsswd" => "__builtin_ia32_vpmacsswd",
+"llvm.x86.xop.vpmacssww" => "__builtin_ia32_vpmacssww",
+"llvm.x86.xop.vpmacswd" => "__builtin_ia32_vpmacswd",
+"llvm.x86.xop.vpmacsww" => "__builtin_ia32_vpmacsww",
+"llvm.x86.xop.vpmadcsswd" => "__builtin_ia32_vpmadcsswd",
+"llvm.x86.xop.vpmadcswd" => "__builtin_ia32_vpmadcswd",
+"llvm.x86.xop.vpperm" => "__builtin_ia32_vpperm",
+"llvm.x86.xop.vprotb" => "__builtin_ia32_vprotb",
+"llvm.x86.xop.vprotbi" => "__builtin_ia32_vprotbi",
+"llvm.x86.xop.vprotd" => "__builtin_ia32_vprotd",
+"llvm.x86.xop.vprotdi" => "__builtin_ia32_vprotdi",
+"llvm.x86.xop.vprotq" => "__builtin_ia32_vprotq",
+"llvm.x86.xop.vprotqi" => "__builtin_ia32_vprotqi",
+"llvm.x86.xop.vprotw" => "__builtin_ia32_vprotw",
+"llvm.x86.xop.vprotwi" => "__builtin_ia32_vprotwi",
+"llvm.x86.xop.vpshab" => "__builtin_ia32_vpshab",
+"llvm.x86.xop.vpshad" => "__builtin_ia32_vpshad",
+"llvm.x86.xop.vpshaq" => "__builtin_ia32_vpshaq",
+"llvm.x86.xop.vpshaw" => "__builtin_ia32_vpshaw",
+"llvm.x86.xop.vpshlb" => "__builtin_ia32_vpshlb",
+"llvm.x86.xop.vpshld" => "__builtin_ia32_vpshld",
+"llvm.x86.xop.vpshlq" => "__builtin_ia32_vpshlq",
+"llvm.x86.xop.vpshlw" => "__builtin_ia32_vpshlw",
+"llvm.x86.xtest" => "__builtin_ia32_xtest",
+_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+}

From 68ac3a4b3b144fbea093dcafb9ed696fa65b6b18 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume.gomez@huawei.com>
Date: Wed, 30 Mar 2022 18:40:22 +0200
Subject: [PATCH 056/997] Generate all listed architectures from llvmint

---
 src/intrinsic/archs.rs | 2965 ++++++++++++++++++++++++++++++++++++++++
 src/intrinsic/llvm.rs  |    2 +-
 src/intrinsic/x86.rs   |  770 -----------
 3 files changed, 2966 insertions(+), 771 deletions(-)
 create mode 100644 src/intrinsic/archs.rs
 delete mode 100644 src/intrinsic/x86.rs

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
new file mode 100644
index 000000000000..0376e0afef95
--- /dev/null
+++ b/src/intrinsic/archs.rs
@@ -0,0 +1,2965 @@
+match name {
+    // ppc
+    "llvm.ppc.altivec.dss" => "__builtin_altivec_dss",
+    "llvm.ppc.altivec.dssall" => "__builtin_altivec_dssall",
+    "llvm.ppc.altivec.dst" => "__builtin_altivec_dst",
+    "llvm.ppc.altivec.dstst" => "__builtin_altivec_dstst",
+    "llvm.ppc.altivec.dststt" => "__builtin_altivec_dststt",
+    "llvm.ppc.altivec.dstt" => "__builtin_altivec_dstt",
+    "llvm.ppc.altivec.mfvscr" => "__builtin_altivec_mfvscr",
+    "llvm.ppc.altivec.mtvscr" => "__builtin_altivec_mtvscr",
+    "llvm.ppc.altivec.vaddcuw" => "__builtin_altivec_vaddcuw",
+    "llvm.ppc.altivec.vaddsbs" => "__builtin_altivec_vaddsbs",
+    "llvm.ppc.altivec.vaddshs" => "__builtin_altivec_vaddshs",
+    "llvm.ppc.altivec.vaddsws" => "__builtin_altivec_vaddsws",
+    "llvm.ppc.altivec.vaddubs" => "__builtin_altivec_vaddubs",
+    "llvm.ppc.altivec.vadduhs" => "__builtin_altivec_vadduhs",
+    "llvm.ppc.altivec.vadduws" => "__builtin_altivec_vadduws",
+    "llvm.ppc.altivec.vavgsb" => "__builtin_altivec_vavgsb",
+    "llvm.ppc.altivec.vavgsh" => "__builtin_altivec_vavgsh",
+    "llvm.ppc.altivec.vavgsw" => "__builtin_altivec_vavgsw",
+    "llvm.ppc.altivec.vavgub" => "__builtin_altivec_vavgub",
+    "llvm.ppc.altivec.vavguh" => "__builtin_altivec_vavguh",
+    "llvm.ppc.altivec.vavguw" => "__builtin_altivec_vavguw",
+    "llvm.ppc.altivec.vcfsx" => "__builtin_altivec_vcfsx",
+    "llvm.ppc.altivec.vcfux" => "__builtin_altivec_vcfux",
+    "llvm.ppc.altivec.vcmpbfp" => "__builtin_altivec_vcmpbfp",
+    "llvm.ppc.altivec.vcmpbfp.p" => "__builtin_altivec_vcmpbfp_p",
+    "llvm.ppc.altivec.vcmpeqfp" => "__builtin_altivec_vcmpeqfp",
+    "llvm.ppc.altivec.vcmpeqfp.p" => "__builtin_altivec_vcmpeqfp_p",
+    "llvm.ppc.altivec.vcmpequb" => "__builtin_altivec_vcmpequb",
+    "llvm.ppc.altivec.vcmpequb.p" => "__builtin_altivec_vcmpequb_p",
+    "llvm.ppc.altivec.vcmpequh" => "__builtin_altivec_vcmpequh",
+    "llvm.ppc.altivec.vcmpequh.p" => "__builtin_altivec_vcmpequh_p",
+    "llvm.ppc.altivec.vcmpequw" => "__builtin_altivec_vcmpequw",
+    "llvm.ppc.altivec.vcmpequw.p" => "__builtin_altivec_vcmpequw_p",
+    "llvm.ppc.altivec.vcmpgefp" => "__builtin_altivec_vcmpgefp",
+    "llvm.ppc.altivec.vcmpgefp.p" => "__builtin_altivec_vcmpgefp_p",
+    "llvm.ppc.altivec.vcmpgtfp" => "__builtin_altivec_vcmpgtfp",
+    "llvm.ppc.altivec.vcmpgtfp.p" => "__builtin_altivec_vcmpgtfp_p",
+    "llvm.ppc.altivec.vcmpgtsb" => "__builtin_altivec_vcmpgtsb",
+    "llvm.ppc.altivec.vcmpgtsb.p" => "__builtin_altivec_vcmpgtsb_p",
+    "llvm.ppc.altivec.vcmpgtsh" => "__builtin_altivec_vcmpgtsh",
+    "llvm.ppc.altivec.vcmpgtsh.p" => "__builtin_altivec_vcmpgtsh_p",
+    "llvm.ppc.altivec.vcmpgtsw" => "__builtin_altivec_vcmpgtsw",
+    "llvm.ppc.altivec.vcmpgtsw.p" => "__builtin_altivec_vcmpgtsw_p",
+    "llvm.ppc.altivec.vcmpgtub" => "__builtin_altivec_vcmpgtub",
+    "llvm.ppc.altivec.vcmpgtub.p" => "__builtin_altivec_vcmpgtub_p",
+    "llvm.ppc.altivec.vcmpgtuh" => "__builtin_altivec_vcmpgtuh",
+    "llvm.ppc.altivec.vcmpgtuh.p" => "__builtin_altivec_vcmpgtuh_p",
+    "llvm.ppc.altivec.vcmpgtuw" => "__builtin_altivec_vcmpgtuw",
+    "llvm.ppc.altivec.vcmpgtuw.p" => "__builtin_altivec_vcmpgtuw_p",
+    "llvm.ppc.altivec.vctsxs" => "__builtin_altivec_vctsxs",
+    "llvm.ppc.altivec.vctuxs" => "__builtin_altivec_vctuxs",
+    "llvm.ppc.altivec.vexptefp" => "__builtin_altivec_vexptefp",
+    "llvm.ppc.altivec.vlogefp" => "__builtin_altivec_vlogefp",
+    "llvm.ppc.altivec.vmaddfp" => "__builtin_altivec_vmaddfp",
+    "llvm.ppc.altivec.vmaxfp" => "__builtin_altivec_vmaxfp",
+    "llvm.ppc.altivec.vmaxsb" => "__builtin_altivec_vmaxsb",
+    "llvm.ppc.altivec.vmaxsh" => "__builtin_altivec_vmaxsh",
+    "llvm.ppc.altivec.vmaxsw" => "__builtin_altivec_vmaxsw",
+    "llvm.ppc.altivec.vmaxub" => "__builtin_altivec_vmaxub",
+    "llvm.ppc.altivec.vmaxuh" => "__builtin_altivec_vmaxuh",
+    "llvm.ppc.altivec.vmaxuw" => "__builtin_altivec_vmaxuw",
+    "llvm.ppc.altivec.vmhaddshs" => "__builtin_altivec_vmhaddshs",
+    "llvm.ppc.altivec.vmhraddshs" => "__builtin_altivec_vmhraddshs",
+    "llvm.ppc.altivec.vminfp" => "__builtin_altivec_vminfp",
+    "llvm.ppc.altivec.vminsb" => "__builtin_altivec_vminsb",
+    "llvm.ppc.altivec.vminsh" => "__builtin_altivec_vminsh",
+    "llvm.ppc.altivec.vminsw" => "__builtin_altivec_vminsw",
+    "llvm.ppc.altivec.vminub" => "__builtin_altivec_vminub",
+    "llvm.ppc.altivec.vminuh" => "__builtin_altivec_vminuh",
+    "llvm.ppc.altivec.vminuw" => "__builtin_altivec_vminuw",
+    "llvm.ppc.altivec.vmladduhm" => "__builtin_altivec_vmladduhm",
+    "llvm.ppc.altivec.vmsummbm" => "__builtin_altivec_vmsummbm",
+    "llvm.ppc.altivec.vmsumshm" => "__builtin_altivec_vmsumshm",
+    "llvm.ppc.altivec.vmsumshs" => "__builtin_altivec_vmsumshs",
+    "llvm.ppc.altivec.vmsumubm" => "__builtin_altivec_vmsumubm",
+    "llvm.ppc.altivec.vmsumuhm" => "__builtin_altivec_vmsumuhm",
+    "llvm.ppc.altivec.vmsumuhs" => "__builtin_altivec_vmsumuhs",
+    "llvm.ppc.altivec.vmulesb" => "__builtin_altivec_vmulesb",
+    "llvm.ppc.altivec.vmulesh" => "__builtin_altivec_vmulesh",
+    "llvm.ppc.altivec.vmuleub" => "__builtin_altivec_vmuleub",
+    "llvm.ppc.altivec.vmuleuh" => "__builtin_altivec_vmuleuh",
+    "llvm.ppc.altivec.vmulosb" => "__builtin_altivec_vmulosb",
+    "llvm.ppc.altivec.vmulosh" => "__builtin_altivec_vmulosh",
+    "llvm.ppc.altivec.vmuloub" => "__builtin_altivec_vmuloub",
+    "llvm.ppc.altivec.vmulouh" => "__builtin_altivec_vmulouh",
+    "llvm.ppc.altivec.vnmsubfp" => "__builtin_altivec_vnmsubfp",
+    "llvm.ppc.altivec.vperm" => "__builtin_altivec_vperm_4si",
+    "llvm.ppc.altivec.vpkpx" => "__builtin_altivec_vpkpx",
+    "llvm.ppc.altivec.vpkshss" => "__builtin_altivec_vpkshss",
+    "llvm.ppc.altivec.vpkshus" => "__builtin_altivec_vpkshus",
+    "llvm.ppc.altivec.vpkswss" => "__builtin_altivec_vpkswss",
+    "llvm.ppc.altivec.vpkswus" => "__builtin_altivec_vpkswus",
+    "llvm.ppc.altivec.vpkuhus" => "__builtin_altivec_vpkuhus",
+    "llvm.ppc.altivec.vpkuwus" => "__builtin_altivec_vpkuwus",
+    "llvm.ppc.altivec.vrefp" => "__builtin_altivec_vrefp",
+    "llvm.ppc.altivec.vrfim" => "__builtin_altivec_vrfim",
+    "llvm.ppc.altivec.vrfin" => "__builtin_altivec_vrfin",
+    "llvm.ppc.altivec.vrfip" => "__builtin_altivec_vrfip",
+    "llvm.ppc.altivec.vrfiz" => "__builtin_altivec_vrfiz",
+    "llvm.ppc.altivec.vrlb" => "__builtin_altivec_vrlb",
+    "llvm.ppc.altivec.vrlh" => "__builtin_altivec_vrlh",
+    "llvm.ppc.altivec.vrlw" => "__builtin_altivec_vrlw",
+    "llvm.ppc.altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
+    "llvm.ppc.altivec.vsel" => "__builtin_altivec_vsel_4si",
+    "llvm.ppc.altivec.vsl" => "__builtin_altivec_vsl",
+    "llvm.ppc.altivec.vslb" => "__builtin_altivec_vslb",
+    "llvm.ppc.altivec.vslh" => "__builtin_altivec_vslh",
+    "llvm.ppc.altivec.vslo" => "__builtin_altivec_vslo",
+    "llvm.ppc.altivec.vslw" => "__builtin_altivec_vslw",
+    "llvm.ppc.altivec.vsr" => "__builtin_altivec_vsr",
+    "llvm.ppc.altivec.vsrab" => "__builtin_altivec_vsrab",
+    "llvm.ppc.altivec.vsrah" => "__builtin_altivec_vsrah",
+    "llvm.ppc.altivec.vsraw" => "__builtin_altivec_vsraw",
+    "llvm.ppc.altivec.vsrb" => "__builtin_altivec_vsrb",
+    "llvm.ppc.altivec.vsrh" => "__builtin_altivec_vsrh",
+    "llvm.ppc.altivec.vsro" => "__builtin_altivec_vsro",
+    "llvm.ppc.altivec.vsrw" => "__builtin_altivec_vsrw",
+    "llvm.ppc.altivec.vsubcuw" => "__builtin_altivec_vsubcuw",
+    "llvm.ppc.altivec.vsubsbs" => "__builtin_altivec_vsubsbs",
+    "llvm.ppc.altivec.vsubshs" => "__builtin_altivec_vsubshs",
+    "llvm.ppc.altivec.vsubsws" => "__builtin_altivec_vsubsws",
+    "llvm.ppc.altivec.vsububs" => "__builtin_altivec_vsububs",
+    "llvm.ppc.altivec.vsubuhs" => "__builtin_altivec_vsubuhs",
+    "llvm.ppc.altivec.vsubuws" => "__builtin_altivec_vsubuws",
+    "llvm.ppc.altivec.vsum2sws" => "__builtin_altivec_vsum2sws",
+    "llvm.ppc.altivec.vsum4sbs" => "__builtin_altivec_vsum4sbs",
+    "llvm.ppc.altivec.vsum4shs" => "__builtin_altivec_vsum4shs",
+    "llvm.ppc.altivec.vsum4ubs" => "__builtin_altivec_vsum4ubs",
+    "llvm.ppc.altivec.vsumsws" => "__builtin_altivec_vsumsws",
+    "llvm.ppc.altivec.vupkhpx" => "__builtin_altivec_vupkhpx",
+    "llvm.ppc.altivec.vupkhsb" => "__builtin_altivec_vupkhsb",
+    "llvm.ppc.altivec.vupkhsh" => "__builtin_altivec_vupkhsh",
+    "llvm.ppc.altivec.vupklpx" => "__builtin_altivec_vupklpx",
+    "llvm.ppc.altivec.vupklsb" => "__builtin_altivec_vupklsb",
+    "llvm.ppc.altivec.vupklsh" => "__builtin_altivec_vupklsh",
+    // hexagon
+    "llvm.hexagon.A2.abs" => "__builtin_HEXAGON_A2_abs",
+    "llvm.hexagon.A2.absp" => "__builtin_HEXAGON_A2_absp",
+    "llvm.hexagon.A2.abssat" => "__builtin_HEXAGON_A2_abssat",
+    "llvm.hexagon.A2.add" => "__builtin_HEXAGON_A2_add",
+    "llvm.hexagon.A2.addh.h16.hh" => "__builtin_HEXAGON_A2_addh_h16_hh",
+    "llvm.hexagon.A2.addh.h16.hl" => "__builtin_HEXAGON_A2_addh_h16_hl",
+    "llvm.hexagon.A2.addh.h16.lh" => "__builtin_HEXAGON_A2_addh_h16_lh",
+    "llvm.hexagon.A2.addh.h16.ll" => "__builtin_HEXAGON_A2_addh_h16_ll",
+    "llvm.hexagon.A2.addh.h16.sat.hh" => "__builtin_HEXAGON_A2_addh_h16_sat_hh",
+    "llvm.hexagon.A2.addh.h16.sat.hl" => "__builtin_HEXAGON_A2_addh_h16_sat_hl",
+    "llvm.hexagon.A2.addh.h16.sat.lh" => "__builtin_HEXAGON_A2_addh_h16_sat_lh",
+    "llvm.hexagon.A2.addh.h16.sat.ll" => "__builtin_HEXAGON_A2_addh_h16_sat_ll",
+    "llvm.hexagon.A2.addh.l16.hl" => "__builtin_HEXAGON_A2_addh_l16_hl",
+    "llvm.hexagon.A2.addh.l16.ll" => "__builtin_HEXAGON_A2_addh_l16_ll",
+    "llvm.hexagon.A2.addh.l16.sat.hl" => "__builtin_HEXAGON_A2_addh_l16_sat_hl",
+    "llvm.hexagon.A2.addh.l16.sat.ll" => "__builtin_HEXAGON_A2_addh_l16_sat_ll",
+    "llvm.hexagon.A2.addi" => "__builtin_HEXAGON_A2_addi",
+    "llvm.hexagon.A2.addp" => "__builtin_HEXAGON_A2_addp",
+    "llvm.hexagon.A2.addpsat" => "__builtin_HEXAGON_A2_addpsat",
+    "llvm.hexagon.A2.addsat" => "__builtin_HEXAGON_A2_addsat",
+    "llvm.hexagon.A2.addsp" => "__builtin_HEXAGON_A2_addsp",
+    "llvm.hexagon.A2.and" => "__builtin_HEXAGON_A2_and",
+    "llvm.hexagon.A2.andir" => "__builtin_HEXAGON_A2_andir",
+    "llvm.hexagon.A2.andp" => "__builtin_HEXAGON_A2_andp",
+    "llvm.hexagon.A2.aslh" => "__builtin_HEXAGON_A2_aslh",
+    "llvm.hexagon.A2.asrh" => "__builtin_HEXAGON_A2_asrh",
+    "llvm.hexagon.A2.combine.hh" => "__builtin_HEXAGON_A2_combine_hh",
+    "llvm.hexagon.A2.combine.hl" => "__builtin_HEXAGON_A2_combine_hl",
+    "llvm.hexagon.A2.combine.lh" => "__builtin_HEXAGON_A2_combine_lh",
+    "llvm.hexagon.A2.combine.ll" => "__builtin_HEXAGON_A2_combine_ll",
+    "llvm.hexagon.A2.combineii" => "__builtin_HEXAGON_A2_combineii",
+    "llvm.hexagon.A2.combinew" => "__builtin_HEXAGON_A2_combinew",
+    "llvm.hexagon.A2.max" => "__builtin_HEXAGON_A2_max",
+    "llvm.hexagon.A2.maxp" => "__builtin_HEXAGON_A2_maxp",
+    "llvm.hexagon.A2.maxu" => "__builtin_HEXAGON_A2_maxu",
+    "llvm.hexagon.A2.maxup" => "__builtin_HEXAGON_A2_maxup",
+    "llvm.hexagon.A2.min" => "__builtin_HEXAGON_A2_min",
+    "llvm.hexagon.A2.minp" => "__builtin_HEXAGON_A2_minp",
+    "llvm.hexagon.A2.minu" => "__builtin_HEXAGON_A2_minu",
+    "llvm.hexagon.A2.minup" => "__builtin_HEXAGON_A2_minup",
+    "llvm.hexagon.A2.neg" => "__builtin_HEXAGON_A2_neg",
+    "llvm.hexagon.A2.negp" => "__builtin_HEXAGON_A2_negp",
+    "llvm.hexagon.A2.negsat" => "__builtin_HEXAGON_A2_negsat",
+    "llvm.hexagon.A2.not" => "__builtin_HEXAGON_A2_not",
+    "llvm.hexagon.A2.notp" => "__builtin_HEXAGON_A2_notp",
+    "llvm.hexagon.A2.or" => "__builtin_HEXAGON_A2_or",
+    "llvm.hexagon.A2.orir" => "__builtin_HEXAGON_A2_orir",
+    "llvm.hexagon.A2.orp" => "__builtin_HEXAGON_A2_orp",
+    "llvm.hexagon.A2.roundsat" => "__builtin_HEXAGON_A2_roundsat",
+    "llvm.hexagon.A2.sat" => "__builtin_HEXAGON_A2_sat",
+    "llvm.hexagon.A2.satb" => "__builtin_HEXAGON_A2_satb",
+    "llvm.hexagon.A2.sath" => "__builtin_HEXAGON_A2_sath",
+    "llvm.hexagon.A2.satub" => "__builtin_HEXAGON_A2_satub",
+    "llvm.hexagon.A2.satuh" => "__builtin_HEXAGON_A2_satuh",
+    "llvm.hexagon.A2.sub" => "__builtin_HEXAGON_A2_sub",
+    "llvm.hexagon.A2.subh.h16.hh" => "__builtin_HEXAGON_A2_subh_h16_hh",
+    "llvm.hexagon.A2.subh.h16.hl" => "__builtin_HEXAGON_A2_subh_h16_hl",
+    "llvm.hexagon.A2.subh.h16.lh" => "__builtin_HEXAGON_A2_subh_h16_lh",
+    "llvm.hexagon.A2.subh.h16.ll" => "__builtin_HEXAGON_A2_subh_h16_ll",
+    "llvm.hexagon.A2.subh.h16.sat.hh" => "__builtin_HEXAGON_A2_subh_h16_sat_hh",
+    "llvm.hexagon.A2.subh.h16.sat.hl" => "__builtin_HEXAGON_A2_subh_h16_sat_hl",
+    "llvm.hexagon.A2.subh.h16.sat.lh" => "__builtin_HEXAGON_A2_subh_h16_sat_lh",
+    "llvm.hexagon.A2.subh.h16.sat.ll" => "__builtin_HEXAGON_A2_subh_h16_sat_ll",
+    "llvm.hexagon.A2.subh.l16.hl" => "__builtin_HEXAGON_A2_subh_l16_hl",
+    "llvm.hexagon.A2.subh.l16.ll" => "__builtin_HEXAGON_A2_subh_l16_ll",
+    "llvm.hexagon.A2.subh.l16.sat.hl" => "__builtin_HEXAGON_A2_subh_l16_sat_hl",
+    "llvm.hexagon.A2.subh.l16.sat.ll" => "__builtin_HEXAGON_A2_subh_l16_sat_ll",
+    "llvm.hexagon.A2.subp" => "__builtin_HEXAGON_A2_subp",
+    "llvm.hexagon.A2.subri" => "__builtin_HEXAGON_A2_subri",
+    "llvm.hexagon.A2.subsat" => "__builtin_HEXAGON_A2_subsat",
+    "llvm.hexagon.A2.svaddh" => "__builtin_HEXAGON_A2_svaddh",
+    "llvm.hexagon.A2.svaddhs" => "__builtin_HEXAGON_A2_svaddhs",
+    "llvm.hexagon.A2.svadduhs" => "__builtin_HEXAGON_A2_svadduhs",
+    "llvm.hexagon.A2.svavgh" => "__builtin_HEXAGON_A2_svavgh",
+    "llvm.hexagon.A2.svavghs" => "__builtin_HEXAGON_A2_svavghs",
+    "llvm.hexagon.A2.svnavgh" => "__builtin_HEXAGON_A2_svnavgh",
+    "llvm.hexagon.A2.svsubh" => "__builtin_HEXAGON_A2_svsubh",
+    "llvm.hexagon.A2.svsubhs" => "__builtin_HEXAGON_A2_svsubhs",
+    "llvm.hexagon.A2.svsubuhs" => "__builtin_HEXAGON_A2_svsubuhs",
+    "llvm.hexagon.A2.swiz" => "__builtin_HEXAGON_A2_swiz",
+    "llvm.hexagon.A2.sxtb" => "__builtin_HEXAGON_A2_sxtb",
+    "llvm.hexagon.A2.sxth" => "__builtin_HEXAGON_A2_sxth",
+    "llvm.hexagon.A2.sxtw" => "__builtin_HEXAGON_A2_sxtw",
+    "llvm.hexagon.A2.tfr" => "__builtin_HEXAGON_A2_tfr",
+    "llvm.hexagon.A2.tfrih" => "__builtin_HEXAGON_A2_tfrih",
+    "llvm.hexagon.A2.tfril" => "__builtin_HEXAGON_A2_tfril",
+    "llvm.hexagon.A2.tfrp" => "__builtin_HEXAGON_A2_tfrp",
+    "llvm.hexagon.A2.tfrpi" => "__builtin_HEXAGON_A2_tfrpi",
+    "llvm.hexagon.A2.tfrsi" => "__builtin_HEXAGON_A2_tfrsi",
+    "llvm.hexagon.A2.vabsh" => "__builtin_HEXAGON_A2_vabsh",
+    "llvm.hexagon.A2.vabshsat" => "__builtin_HEXAGON_A2_vabshsat",
+    "llvm.hexagon.A2.vabsw" => "__builtin_HEXAGON_A2_vabsw",
+    "llvm.hexagon.A2.vabswsat" => "__builtin_HEXAGON_A2_vabswsat",
+    "llvm.hexagon.A2.vaddb.map" => "__builtin_HEXAGON_A2_vaddb_map",
+    "llvm.hexagon.A2.vaddh" => "__builtin_HEXAGON_A2_vaddh",
+    "llvm.hexagon.A2.vaddhs" => "__builtin_HEXAGON_A2_vaddhs",
+    "llvm.hexagon.A2.vaddub" => "__builtin_HEXAGON_A2_vaddub",
+    "llvm.hexagon.A2.vaddubs" => "__builtin_HEXAGON_A2_vaddubs",
+    "llvm.hexagon.A2.vadduhs" => "__builtin_HEXAGON_A2_vadduhs",
+    "llvm.hexagon.A2.vaddw" => "__builtin_HEXAGON_A2_vaddw",
+    "llvm.hexagon.A2.vaddws" => "__builtin_HEXAGON_A2_vaddws",
+    "llvm.hexagon.A2.vavgh" => "__builtin_HEXAGON_A2_vavgh",
+    "llvm.hexagon.A2.vavghcr" => "__builtin_HEXAGON_A2_vavghcr",
+    "llvm.hexagon.A2.vavghr" => "__builtin_HEXAGON_A2_vavghr",
+    "llvm.hexagon.A2.vavgub" => "__builtin_HEXAGON_A2_vavgub",
+    "llvm.hexagon.A2.vavgubr" => "__builtin_HEXAGON_A2_vavgubr",
+    "llvm.hexagon.A2.vavguh" => "__builtin_HEXAGON_A2_vavguh",
+    "llvm.hexagon.A2.vavguhr" => "__builtin_HEXAGON_A2_vavguhr",
+    "llvm.hexagon.A2.vavguw" => "__builtin_HEXAGON_A2_vavguw",
+    "llvm.hexagon.A2.vavguwr" => "__builtin_HEXAGON_A2_vavguwr",
+    "llvm.hexagon.A2.vavgw" => "__builtin_HEXAGON_A2_vavgw",
+    "llvm.hexagon.A2.vavgwcr" => "__builtin_HEXAGON_A2_vavgwcr",
+    "llvm.hexagon.A2.vavgwr" => "__builtin_HEXAGON_A2_vavgwr",
+    "llvm.hexagon.A2.vcmpbeq" => "__builtin_HEXAGON_A2_vcmpbeq",
+    "llvm.hexagon.A2.vcmpbgtu" => "__builtin_HEXAGON_A2_vcmpbgtu",
+    "llvm.hexagon.A2.vcmpheq" => "__builtin_HEXAGON_A2_vcmpheq",
+    "llvm.hexagon.A2.vcmphgt" => "__builtin_HEXAGON_A2_vcmphgt",
+    "llvm.hexagon.A2.vcmphgtu" => "__builtin_HEXAGON_A2_vcmphgtu",
+    "llvm.hexagon.A2.vcmpweq" => "__builtin_HEXAGON_A2_vcmpweq",
+    "llvm.hexagon.A2.vcmpwgt" => "__builtin_HEXAGON_A2_vcmpwgt",
+    "llvm.hexagon.A2.vcmpwgtu" => "__builtin_HEXAGON_A2_vcmpwgtu",
+    "llvm.hexagon.A2.vconj" => "__builtin_HEXAGON_A2_vconj",
+    "llvm.hexagon.A2.vmaxb" => "__builtin_HEXAGON_A2_vmaxb",
+    "llvm.hexagon.A2.vmaxh" => "__builtin_HEXAGON_A2_vmaxh",
+    "llvm.hexagon.A2.vmaxub" => "__builtin_HEXAGON_A2_vmaxub",
+    "llvm.hexagon.A2.vmaxuh" => "__builtin_HEXAGON_A2_vmaxuh",
+    "llvm.hexagon.A2.vmaxuw" => "__builtin_HEXAGON_A2_vmaxuw",
+    "llvm.hexagon.A2.vmaxw" => "__builtin_HEXAGON_A2_vmaxw",
+    "llvm.hexagon.A2.vminb" => "__builtin_HEXAGON_A2_vminb",
+    "llvm.hexagon.A2.vminh" => "__builtin_HEXAGON_A2_vminh",
+    "llvm.hexagon.A2.vminub" => "__builtin_HEXAGON_A2_vminub",
+    "llvm.hexagon.A2.vminuh" => "__builtin_HEXAGON_A2_vminuh",
+    "llvm.hexagon.A2.vminuw" => "__builtin_HEXAGON_A2_vminuw",
+    "llvm.hexagon.A2.vminw" => "__builtin_HEXAGON_A2_vminw",
+    "llvm.hexagon.A2.vnavgh" => "__builtin_HEXAGON_A2_vnavgh",
+    "llvm.hexagon.A2.vnavghcr" => "__builtin_HEXAGON_A2_vnavghcr",
+    "llvm.hexagon.A2.vnavghr" => "__builtin_HEXAGON_A2_vnavghr",
+    "llvm.hexagon.A2.vnavgw" => "__builtin_HEXAGON_A2_vnavgw",
+    "llvm.hexagon.A2.vnavgwcr" => "__builtin_HEXAGON_A2_vnavgwcr",
+    "llvm.hexagon.A2.vnavgwr" => "__builtin_HEXAGON_A2_vnavgwr",
+    "llvm.hexagon.A2.vraddub" => "__builtin_HEXAGON_A2_vraddub",
+    "llvm.hexagon.A2.vraddub.acc" => "__builtin_HEXAGON_A2_vraddub_acc",
+    "llvm.hexagon.A2.vrsadub" => "__builtin_HEXAGON_A2_vrsadub",
+    "llvm.hexagon.A2.vrsadub.acc" => "__builtin_HEXAGON_A2_vrsadub_acc",
+    "llvm.hexagon.A2.vsubb.map" => "__builtin_HEXAGON_A2_vsubb_map",
+    "llvm.hexagon.A2.vsubh" => "__builtin_HEXAGON_A2_vsubh",
+    "llvm.hexagon.A2.vsubhs" => "__builtin_HEXAGON_A2_vsubhs",
+    "llvm.hexagon.A2.vsubub" => "__builtin_HEXAGON_A2_vsubub",
+    "llvm.hexagon.A2.vsububs" => "__builtin_HEXAGON_A2_vsububs",
+    "llvm.hexagon.A2.vsubuhs" => "__builtin_HEXAGON_A2_vsubuhs",
+    "llvm.hexagon.A2.vsubw" => "__builtin_HEXAGON_A2_vsubw",
+    "llvm.hexagon.A2.vsubws" => "__builtin_HEXAGON_A2_vsubws",
+    "llvm.hexagon.A2.xor" => "__builtin_HEXAGON_A2_xor",
+    "llvm.hexagon.A2.xorp" => "__builtin_HEXAGON_A2_xorp",
+    "llvm.hexagon.A2.zxtb" => "__builtin_HEXAGON_A2_zxtb",
+    "llvm.hexagon.A2.zxth" => "__builtin_HEXAGON_A2_zxth",
+    "llvm.hexagon.A4.andn" => "__builtin_HEXAGON_A4_andn",
+    "llvm.hexagon.A4.andnp" => "__builtin_HEXAGON_A4_andnp",
+    "llvm.hexagon.A4.bitsplit" => "__builtin_HEXAGON_A4_bitsplit",
+    "llvm.hexagon.A4.bitspliti" => "__builtin_HEXAGON_A4_bitspliti",
+    "llvm.hexagon.A4.boundscheck" => "__builtin_HEXAGON_A4_boundscheck",
+    "llvm.hexagon.A4.cmpbeq" => "__builtin_HEXAGON_A4_cmpbeq",
+    "llvm.hexagon.A4.cmpbeqi" => "__builtin_HEXAGON_A4_cmpbeqi",
+    "llvm.hexagon.A4.cmpbgt" => "__builtin_HEXAGON_A4_cmpbgt",
+    "llvm.hexagon.A4.cmpbgti" => "__builtin_HEXAGON_A4_cmpbgti",
+    "llvm.hexagon.A4.cmpbgtu" => "__builtin_HEXAGON_A4_cmpbgtu",
+    "llvm.hexagon.A4.cmpbgtui" => "__builtin_HEXAGON_A4_cmpbgtui",
+    "llvm.hexagon.A4.cmpheq" => "__builtin_HEXAGON_A4_cmpheq",
+    "llvm.hexagon.A4.cmpheqi" => "__builtin_HEXAGON_A4_cmpheqi",
+    "llvm.hexagon.A4.cmphgt" => "__builtin_HEXAGON_A4_cmphgt",
+    "llvm.hexagon.A4.cmphgti" => "__builtin_HEXAGON_A4_cmphgti",
+    "llvm.hexagon.A4.cmphgtu" => "__builtin_HEXAGON_A4_cmphgtu",
+    "llvm.hexagon.A4.cmphgtui" => "__builtin_HEXAGON_A4_cmphgtui",
+    "llvm.hexagon.A4.combineir" => "__builtin_HEXAGON_A4_combineir",
+    "llvm.hexagon.A4.combineri" => "__builtin_HEXAGON_A4_combineri",
+    "llvm.hexagon.A4.cround.ri" => "__builtin_HEXAGON_A4_cround_ri",
+    "llvm.hexagon.A4.cround.rr" => "__builtin_HEXAGON_A4_cround_rr",
+    "llvm.hexagon.A4.modwrapu" => "__builtin_HEXAGON_A4_modwrapu",
+    "llvm.hexagon.A4.orn" => "__builtin_HEXAGON_A4_orn",
+    "llvm.hexagon.A4.ornp" => "__builtin_HEXAGON_A4_ornp",
+    "llvm.hexagon.A4.rcmpeq" => "__builtin_HEXAGON_A4_rcmpeq",
+    "llvm.hexagon.A4.rcmpeqi" => "__builtin_HEXAGON_A4_rcmpeqi",
+    "llvm.hexagon.A4.rcmpneq" => "__builtin_HEXAGON_A4_rcmpneq",
+    "llvm.hexagon.A4.rcmpneqi" => "__builtin_HEXAGON_A4_rcmpneqi",
+    "llvm.hexagon.A4.round.ri" => "__builtin_HEXAGON_A4_round_ri",
+    "llvm.hexagon.A4.round.ri.sat" => "__builtin_HEXAGON_A4_round_ri_sat",
+    "llvm.hexagon.A4.round.rr" => "__builtin_HEXAGON_A4_round_rr",
+    "llvm.hexagon.A4.round.rr.sat" => "__builtin_HEXAGON_A4_round_rr_sat",
+    "llvm.hexagon.A4.tlbmatch" => "__builtin_HEXAGON_A4_tlbmatch",
+    "llvm.hexagon.A4.vcmpbeq.any" => "__builtin_HEXAGON_A4_vcmpbeq_any",
+    "llvm.hexagon.A4.vcmpbeqi" => "__builtin_HEXAGON_A4_vcmpbeqi",
+    "llvm.hexagon.A4.vcmpbgt" => "__builtin_HEXAGON_A4_vcmpbgt",
+    "llvm.hexagon.A4.vcmpbgti" => "__builtin_HEXAGON_A4_vcmpbgti",
+    "llvm.hexagon.A4.vcmpbgtui" => "__builtin_HEXAGON_A4_vcmpbgtui",
+    "llvm.hexagon.A4.vcmpheqi" => "__builtin_HEXAGON_A4_vcmpheqi",
+    "llvm.hexagon.A4.vcmphgti" => "__builtin_HEXAGON_A4_vcmphgti",
+    "llvm.hexagon.A4.vcmphgtui" => "__builtin_HEXAGON_A4_vcmphgtui",
+    "llvm.hexagon.A4.vcmpweqi" => "__builtin_HEXAGON_A4_vcmpweqi",
+    "llvm.hexagon.A4.vcmpwgti" => "__builtin_HEXAGON_A4_vcmpwgti",
+    "llvm.hexagon.A4.vcmpwgtui" => "__builtin_HEXAGON_A4_vcmpwgtui",
+    "llvm.hexagon.A4.vrmaxh" => "__builtin_HEXAGON_A4_vrmaxh",
+    "llvm.hexagon.A4.vrmaxuh" => "__builtin_HEXAGON_A4_vrmaxuh",
+    "llvm.hexagon.A4.vrmaxuw" => "__builtin_HEXAGON_A4_vrmaxuw",
+    "llvm.hexagon.A4.vrmaxw" => "__builtin_HEXAGON_A4_vrmaxw",
+    "llvm.hexagon.A4.vrminh" => "__builtin_HEXAGON_A4_vrminh",
+    "llvm.hexagon.A4.vrminuh" => "__builtin_HEXAGON_A4_vrminuh",
+    "llvm.hexagon.A4.vrminuw" => "__builtin_HEXAGON_A4_vrminuw",
+    "llvm.hexagon.A4.vrminw" => "__builtin_HEXAGON_A4_vrminw",
+    "llvm.hexagon.A5.vaddhubs" => "__builtin_HEXAGON_A5_vaddhubs",
+    "llvm.hexagon.C2.all8" => "__builtin_HEXAGON_C2_all8",
+    "llvm.hexagon.C2.and" => "__builtin_HEXAGON_C2_and",
+    "llvm.hexagon.C2.andn" => "__builtin_HEXAGON_C2_andn",
+    "llvm.hexagon.C2.any8" => "__builtin_HEXAGON_C2_any8",
+    "llvm.hexagon.C2.bitsclr" => "__builtin_HEXAGON_C2_bitsclr",
+    "llvm.hexagon.C2.bitsclri" => "__builtin_HEXAGON_C2_bitsclri",
+    "llvm.hexagon.C2.bitsset" => "__builtin_HEXAGON_C2_bitsset",
+    "llvm.hexagon.C2.cmpeq" => "__builtin_HEXAGON_C2_cmpeq",
+    "llvm.hexagon.C2.cmpeqi" => "__builtin_HEXAGON_C2_cmpeqi",
+    "llvm.hexagon.C2.cmpeqp" => "__builtin_HEXAGON_C2_cmpeqp",
+    "llvm.hexagon.C2.cmpgei" => "__builtin_HEXAGON_C2_cmpgei",
+    "llvm.hexagon.C2.cmpgeui" => "__builtin_HEXAGON_C2_cmpgeui",
+    "llvm.hexagon.C2.cmpgt" => "__builtin_HEXAGON_C2_cmpgt",
+    "llvm.hexagon.C2.cmpgti" => "__builtin_HEXAGON_C2_cmpgti",
+    "llvm.hexagon.C2.cmpgtp" => "__builtin_HEXAGON_C2_cmpgtp",
+    "llvm.hexagon.C2.cmpgtu" => "__builtin_HEXAGON_C2_cmpgtu",
+    "llvm.hexagon.C2.cmpgtui" => "__builtin_HEXAGON_C2_cmpgtui",
+    "llvm.hexagon.C2.cmpgtup" => "__builtin_HEXAGON_C2_cmpgtup",
+    "llvm.hexagon.C2.cmplt" => "__builtin_HEXAGON_C2_cmplt",
+    "llvm.hexagon.C2.cmpltu" => "__builtin_HEXAGON_C2_cmpltu",
+    "llvm.hexagon.C2.mask" => "__builtin_HEXAGON_C2_mask",
+    "llvm.hexagon.C2.mux" => "__builtin_HEXAGON_C2_mux",
+    "llvm.hexagon.C2.muxii" => "__builtin_HEXAGON_C2_muxii",
+    "llvm.hexagon.C2.muxir" => "__builtin_HEXAGON_C2_muxir",
+    "llvm.hexagon.C2.muxri" => "__builtin_HEXAGON_C2_muxri",
+    "llvm.hexagon.C2.not" => "__builtin_HEXAGON_C2_not",
+    "llvm.hexagon.C2.or" => "__builtin_HEXAGON_C2_or",
+    "llvm.hexagon.C2.orn" => "__builtin_HEXAGON_C2_orn",
+    "llvm.hexagon.C2.pxfer.map" => "__builtin_HEXAGON_C2_pxfer_map",
+    "llvm.hexagon.C2.tfrpr" => "__builtin_HEXAGON_C2_tfrpr",
+    "llvm.hexagon.C2.tfrrp" => "__builtin_HEXAGON_C2_tfrrp",
+    "llvm.hexagon.C2.vitpack" => "__builtin_HEXAGON_C2_vitpack",
+    "llvm.hexagon.C2.vmux" => "__builtin_HEXAGON_C2_vmux",
+    "llvm.hexagon.C2.xor" => "__builtin_HEXAGON_C2_xor",
+    "llvm.hexagon.C4.and.and" => "__builtin_HEXAGON_C4_and_and",
+    "llvm.hexagon.C4.and.andn" => "__builtin_HEXAGON_C4_and_andn",
+    "llvm.hexagon.C4.and.or" => "__builtin_HEXAGON_C4_and_or",
+    "llvm.hexagon.C4.and.orn" => "__builtin_HEXAGON_C4_and_orn",
+    "llvm.hexagon.C4.cmplte" => "__builtin_HEXAGON_C4_cmplte",
+    "llvm.hexagon.C4.cmpltei" => "__builtin_HEXAGON_C4_cmpltei",
+    "llvm.hexagon.C4.cmplteu" => "__builtin_HEXAGON_C4_cmplteu",
+    "llvm.hexagon.C4.cmplteui" => "__builtin_HEXAGON_C4_cmplteui",
+    "llvm.hexagon.C4.cmpneq" => "__builtin_HEXAGON_C4_cmpneq",
+    "llvm.hexagon.C4.cmpneqi" => "__builtin_HEXAGON_C4_cmpneqi",
+    "llvm.hexagon.C4.fastcorner9" => "__builtin_HEXAGON_C4_fastcorner9",
+    "llvm.hexagon.C4.fastcorner9.not" => "__builtin_HEXAGON_C4_fastcorner9_not",
+    "llvm.hexagon.C4.nbitsclr" => "__builtin_HEXAGON_C4_nbitsclr",
+    "llvm.hexagon.C4.nbitsclri" => "__builtin_HEXAGON_C4_nbitsclri",
+    "llvm.hexagon.C4.nbitsset" => "__builtin_HEXAGON_C4_nbitsset",
+    "llvm.hexagon.C4.or.and" => "__builtin_HEXAGON_C4_or_and",
+    "llvm.hexagon.C4.or.andn" => "__builtin_HEXAGON_C4_or_andn",
+    "llvm.hexagon.C4.or.or" => "__builtin_HEXAGON_C4_or_or",
+    "llvm.hexagon.C4.or.orn" => "__builtin_HEXAGON_C4_or_orn",
+    "llvm.hexagon.F2.conv.d2df" => "__builtin_HEXAGON_F2_conv_d2df",
+    "llvm.hexagon.F2.conv.d2sf" => "__builtin_HEXAGON_F2_conv_d2sf",
+    "llvm.hexagon.F2.conv.df2d" => "__builtin_HEXAGON_F2_conv_df2d",
+    "llvm.hexagon.F2.conv.df2d.chop" => "__builtin_HEXAGON_F2_conv_df2d_chop",
+    "llvm.hexagon.F2.conv.df2sf" => "__builtin_HEXAGON_F2_conv_df2sf",
+    "llvm.hexagon.F2.conv.df2ud" => "__builtin_HEXAGON_F2_conv_df2ud",
+    "llvm.hexagon.F2.conv.df2ud.chop" => "__builtin_HEXAGON_F2_conv_df2ud_chop",
+    "llvm.hexagon.F2.conv.df2uw" => "__builtin_HEXAGON_F2_conv_df2uw",
+    "llvm.hexagon.F2.conv.df2uw.chop" => "__builtin_HEXAGON_F2_conv_df2uw_chop",
+    "llvm.hexagon.F2.conv.df2w" => "__builtin_HEXAGON_F2_conv_df2w",
+    "llvm.hexagon.F2.conv.df2w.chop" => "__builtin_HEXAGON_F2_conv_df2w_chop",
+    "llvm.hexagon.F2.conv.sf2d" => "__builtin_HEXAGON_F2_conv_sf2d",
+    "llvm.hexagon.F2.conv.sf2d.chop" => "__builtin_HEXAGON_F2_conv_sf2d_chop",
+    "llvm.hexagon.F2.conv.sf2df" => "__builtin_HEXAGON_F2_conv_sf2df",
+    "llvm.hexagon.F2.conv.sf2ud" => "__builtin_HEXAGON_F2_conv_sf2ud",
+    "llvm.hexagon.F2.conv.sf2ud.chop" => "__builtin_HEXAGON_F2_conv_sf2ud_chop",
+    "llvm.hexagon.F2.conv.sf2uw" => "__builtin_HEXAGON_F2_conv_sf2uw",
+    "llvm.hexagon.F2.conv.sf2uw.chop" => "__builtin_HEXAGON_F2_conv_sf2uw_chop",
+    "llvm.hexagon.F2.conv.sf2w" => "__builtin_HEXAGON_F2_conv_sf2w",
+    "llvm.hexagon.F2.conv.sf2w.chop" => "__builtin_HEXAGON_F2_conv_sf2w_chop",
+    "llvm.hexagon.F2.conv.ud2df" => "__builtin_HEXAGON_F2_conv_ud2df",
+    "llvm.hexagon.F2.conv.ud2sf" => "__builtin_HEXAGON_F2_conv_ud2sf",
+    "llvm.hexagon.F2.conv.uw2df" => "__builtin_HEXAGON_F2_conv_uw2df",
+    "llvm.hexagon.F2.conv.uw2sf" => "__builtin_HEXAGON_F2_conv_uw2sf",
+    "llvm.hexagon.F2.conv.w2df" => "__builtin_HEXAGON_F2_conv_w2df",
+    "llvm.hexagon.F2.conv.w2sf" => "__builtin_HEXAGON_F2_conv_w2sf",
+    "llvm.hexagon.F2.dfadd" => "__builtin_HEXAGON_F2_dfadd",
+    "llvm.hexagon.F2.dfclass" => "__builtin_HEXAGON_F2_dfclass",
+    "llvm.hexagon.F2.dfcmpeq" => "__builtin_HEXAGON_F2_dfcmpeq",
+    "llvm.hexagon.F2.dfcmpge" => "__builtin_HEXAGON_F2_dfcmpge",
+    "llvm.hexagon.F2.dfcmpgt" => "__builtin_HEXAGON_F2_dfcmpgt",
+    "llvm.hexagon.F2.dfcmpuo" => "__builtin_HEXAGON_F2_dfcmpuo",
+    "llvm.hexagon.F2.dffixupd" => "__builtin_HEXAGON_F2_dffixupd",
+    "llvm.hexagon.F2.dffixupn" => "__builtin_HEXAGON_F2_dffixupn",
+    "llvm.hexagon.F2.dffixupr" => "__builtin_HEXAGON_F2_dffixupr",
+    "llvm.hexagon.F2.dffma" => "__builtin_HEXAGON_F2_dffma",
+    "llvm.hexagon.F2.dffma.lib" => "__builtin_HEXAGON_F2_dffma_lib",
+    "llvm.hexagon.F2.dffma.sc" => "__builtin_HEXAGON_F2_dffma_sc",
+    "llvm.hexagon.F2.dffms" => "__builtin_HEXAGON_F2_dffms",
+    "llvm.hexagon.F2.dffms.lib" => "__builtin_HEXAGON_F2_dffms_lib",
+    "llvm.hexagon.F2.dfimm.n" => "__builtin_HEXAGON_F2_dfimm_n",
+    "llvm.hexagon.F2.dfimm.p" => "__builtin_HEXAGON_F2_dfimm_p",
+    "llvm.hexagon.F2.dfmax" => "__builtin_HEXAGON_F2_dfmax",
+    "llvm.hexagon.F2.dfmin" => "__builtin_HEXAGON_F2_dfmin",
+    "llvm.hexagon.F2.dfmpy" => "__builtin_HEXAGON_F2_dfmpy",
+    "llvm.hexagon.F2.dfsub" => "__builtin_HEXAGON_F2_dfsub",
+    "llvm.hexagon.F2.sfadd" => "__builtin_HEXAGON_F2_sfadd",
+    "llvm.hexagon.F2.sfclass" => "__builtin_HEXAGON_F2_sfclass",
+    "llvm.hexagon.F2.sfcmpeq" => "__builtin_HEXAGON_F2_sfcmpeq",
+    "llvm.hexagon.F2.sfcmpge" => "__builtin_HEXAGON_F2_sfcmpge",
+    "llvm.hexagon.F2.sfcmpgt" => "__builtin_HEXAGON_F2_sfcmpgt",
+    "llvm.hexagon.F2.sfcmpuo" => "__builtin_HEXAGON_F2_sfcmpuo",
+    "llvm.hexagon.F2.sffixupd" => "__builtin_HEXAGON_F2_sffixupd",
+    "llvm.hexagon.F2.sffixupn" => "__builtin_HEXAGON_F2_sffixupn",
+    "llvm.hexagon.F2.sffixupr" => "__builtin_HEXAGON_F2_sffixupr",
+    "llvm.hexagon.F2.sffma" => "__builtin_HEXAGON_F2_sffma",
+    "llvm.hexagon.F2.sffma.lib" => "__builtin_HEXAGON_F2_sffma_lib",
+    "llvm.hexagon.F2.sffma.sc" => "__builtin_HEXAGON_F2_sffma_sc",
+    "llvm.hexagon.F2.sffms" => "__builtin_HEXAGON_F2_sffms",
+    "llvm.hexagon.F2.sffms.lib" => "__builtin_HEXAGON_F2_sffms_lib",
+    "llvm.hexagon.F2.sfimm.n" => "__builtin_HEXAGON_F2_sfimm_n",
+    "llvm.hexagon.F2.sfimm.p" => "__builtin_HEXAGON_F2_sfimm_p",
+    "llvm.hexagon.F2.sfmax" => "__builtin_HEXAGON_F2_sfmax",
+    "llvm.hexagon.F2.sfmin" => "__builtin_HEXAGON_F2_sfmin",
+    "llvm.hexagon.F2.sfmpy" => "__builtin_HEXAGON_F2_sfmpy",
+    "llvm.hexagon.F2.sfsub" => "__builtin_HEXAGON_F2_sfsub",
+    "llvm.hexagon.M2.acci" => "__builtin_HEXAGON_M2_acci",
+    "llvm.hexagon.M2.accii" => "__builtin_HEXAGON_M2_accii",
+    "llvm.hexagon.M2.cmaci.s0" => "__builtin_HEXAGON_M2_cmaci_s0",
+    "llvm.hexagon.M2.cmacr.s0" => "__builtin_HEXAGON_M2_cmacr_s0",
+    "llvm.hexagon.M2.cmacs.s0" => "__builtin_HEXAGON_M2_cmacs_s0",
+    "llvm.hexagon.M2.cmacs.s1" => "__builtin_HEXAGON_M2_cmacs_s1",
+    "llvm.hexagon.M2.cmacsc.s0" => "__builtin_HEXAGON_M2_cmacsc_s0",
+    "llvm.hexagon.M2.cmacsc.s1" => "__builtin_HEXAGON_M2_cmacsc_s1",
+    "llvm.hexagon.M2.cmpyi.s0" => "__builtin_HEXAGON_M2_cmpyi_s0",
+    "llvm.hexagon.M2.cmpyr.s0" => "__builtin_HEXAGON_M2_cmpyr_s0",
+    "llvm.hexagon.M2.cmpyrs.s0" => "__builtin_HEXAGON_M2_cmpyrs_s0",
+    "llvm.hexagon.M2.cmpyrs.s1" => "__builtin_HEXAGON_M2_cmpyrs_s1",
+    "llvm.hexagon.M2.cmpyrsc.s0" => "__builtin_HEXAGON_M2_cmpyrsc_s0",
+    "llvm.hexagon.M2.cmpyrsc.s1" => "__builtin_HEXAGON_M2_cmpyrsc_s1",
+    "llvm.hexagon.M2.cmpys.s0" => "__builtin_HEXAGON_M2_cmpys_s0",
+    "llvm.hexagon.M2.cmpys.s1" => "__builtin_HEXAGON_M2_cmpys_s1",
+    "llvm.hexagon.M2.cmpysc.s0" => "__builtin_HEXAGON_M2_cmpysc_s0",
+    "llvm.hexagon.M2.cmpysc.s1" => "__builtin_HEXAGON_M2_cmpysc_s1",
+    "llvm.hexagon.M2.cnacs.s0" => "__builtin_HEXAGON_M2_cnacs_s0",
+    "llvm.hexagon.M2.cnacs.s1" => "__builtin_HEXAGON_M2_cnacs_s1",
+    "llvm.hexagon.M2.cnacsc.s0" => "__builtin_HEXAGON_M2_cnacsc_s0",
+    "llvm.hexagon.M2.cnacsc.s1" => "__builtin_HEXAGON_M2_cnacsc_s1",
+    "llvm.hexagon.M2.dpmpyss.acc.s0" => "__builtin_HEXAGON_M2_dpmpyss_acc_s0",
+    "llvm.hexagon.M2.dpmpyss.nac.s0" => "__builtin_HEXAGON_M2_dpmpyss_nac_s0",
+    "llvm.hexagon.M2.dpmpyss.rnd.s0" => "__builtin_HEXAGON_M2_dpmpyss_rnd_s0",
+    "llvm.hexagon.M2.dpmpyss.s0" => "__builtin_HEXAGON_M2_dpmpyss_s0",
+    "llvm.hexagon.M2.dpmpyuu.acc.s0" => "__builtin_HEXAGON_M2_dpmpyuu_acc_s0",
+    "llvm.hexagon.M2.dpmpyuu.nac.s0" => "__builtin_HEXAGON_M2_dpmpyuu_nac_s0",
+    "llvm.hexagon.M2.dpmpyuu.s0" => "__builtin_HEXAGON_M2_dpmpyuu_s0",
+    "llvm.hexagon.M2.hmmpyh.rs1" => "__builtin_HEXAGON_M2_hmmpyh_rs1",
+    "llvm.hexagon.M2.hmmpyh.s1" => "__builtin_HEXAGON_M2_hmmpyh_s1",
+    "llvm.hexagon.M2.hmmpyl.rs1" => "__builtin_HEXAGON_M2_hmmpyl_rs1",
+    "llvm.hexagon.M2.hmmpyl.s1" => "__builtin_HEXAGON_M2_hmmpyl_s1",
+    "llvm.hexagon.M2.maci" => "__builtin_HEXAGON_M2_maci",
+    "llvm.hexagon.M2.macsin" => "__builtin_HEXAGON_M2_macsin",
+    "llvm.hexagon.M2.macsip" => "__builtin_HEXAGON_M2_macsip",
+    "llvm.hexagon.M2.mmachs.rs0" => "__builtin_HEXAGON_M2_mmachs_rs0",
+    "llvm.hexagon.M2.mmachs.rs1" => "__builtin_HEXAGON_M2_mmachs_rs1",
+    "llvm.hexagon.M2.mmachs.s0" => "__builtin_HEXAGON_M2_mmachs_s0",
+    "llvm.hexagon.M2.mmachs.s1" => "__builtin_HEXAGON_M2_mmachs_s1",
+    "llvm.hexagon.M2.mmacls.rs0" => "__builtin_HEXAGON_M2_mmacls_rs0",
+    "llvm.hexagon.M2.mmacls.rs1" => "__builtin_HEXAGON_M2_mmacls_rs1",
+    "llvm.hexagon.M2.mmacls.s0" => "__builtin_HEXAGON_M2_mmacls_s0",
+    "llvm.hexagon.M2.mmacls.s1" => "__builtin_HEXAGON_M2_mmacls_s1",
+    "llvm.hexagon.M2.mmacuhs.rs0" => "__builtin_HEXAGON_M2_mmacuhs_rs0",
+    "llvm.hexagon.M2.mmacuhs.rs1" => "__builtin_HEXAGON_M2_mmacuhs_rs1",
+    "llvm.hexagon.M2.mmacuhs.s0" => "__builtin_HEXAGON_M2_mmacuhs_s0",
+    "llvm.hexagon.M2.mmacuhs.s1" => "__builtin_HEXAGON_M2_mmacuhs_s1",
+    "llvm.hexagon.M2.mmaculs.rs0" => "__builtin_HEXAGON_M2_mmaculs_rs0",
+    "llvm.hexagon.M2.mmaculs.rs1" => "__builtin_HEXAGON_M2_mmaculs_rs1",
+    "llvm.hexagon.M2.mmaculs.s0" => "__builtin_HEXAGON_M2_mmaculs_s0",
+    "llvm.hexagon.M2.mmaculs.s1" => "__builtin_HEXAGON_M2_mmaculs_s1",
+    "llvm.hexagon.M2.mmpyh.rs0" => "__builtin_HEXAGON_M2_mmpyh_rs0",
+    "llvm.hexagon.M2.mmpyh.rs1" => "__builtin_HEXAGON_M2_mmpyh_rs1",
+    "llvm.hexagon.M2.mmpyh.s0" => "__builtin_HEXAGON_M2_mmpyh_s0",
+    "llvm.hexagon.M2.mmpyh.s1" => "__builtin_HEXAGON_M2_mmpyh_s1",
+    "llvm.hexagon.M2.mmpyl.rs0" => "__builtin_HEXAGON_M2_mmpyl_rs0",
+    "llvm.hexagon.M2.mmpyl.rs1" => "__builtin_HEXAGON_M2_mmpyl_rs1",
+    "llvm.hexagon.M2.mmpyl.s0" => "__builtin_HEXAGON_M2_mmpyl_s0",
+    "llvm.hexagon.M2.mmpyl.s1" => "__builtin_HEXAGON_M2_mmpyl_s1",
+    "llvm.hexagon.M2.mmpyuh.rs0" => "__builtin_HEXAGON_M2_mmpyuh_rs0",
+    "llvm.hexagon.M2.mmpyuh.rs1" => "__builtin_HEXAGON_M2_mmpyuh_rs1",
+    "llvm.hexagon.M2.mmpyuh.s0" => "__builtin_HEXAGON_M2_mmpyuh_s0",
+    "llvm.hexagon.M2.mmpyuh.s1" => "__builtin_HEXAGON_M2_mmpyuh_s1",
+    "llvm.hexagon.M2.mmpyul.rs0" => "__builtin_HEXAGON_M2_mmpyul_rs0",
+    "llvm.hexagon.M2.mmpyul.rs1" => "__builtin_HEXAGON_M2_mmpyul_rs1",
+    "llvm.hexagon.M2.mmpyul.s0" => "__builtin_HEXAGON_M2_mmpyul_s0",
+    "llvm.hexagon.M2.mmpyul.s1" => "__builtin_HEXAGON_M2_mmpyul_s1",
+    "llvm.hexagon.M2.mpy.acc.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_hh_s0",
+    "llvm.hexagon.M2.mpy.acc.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_hh_s1",
+    "llvm.hexagon.M2.mpy.acc.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_hl_s0",
+    "llvm.hexagon.M2.mpy.acc.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_hl_s1",
+    "llvm.hexagon.M2.mpy.acc.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_lh_s0",
+    "llvm.hexagon.M2.mpy.acc.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_lh_s1",
+    "llvm.hexagon.M2.mpy.acc.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_ll_s0",
+    "llvm.hexagon.M2.mpy.acc.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_ll_s1",
+    "llvm.hexagon.M2.mpy.acc.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s0",
+    "llvm.hexagon.M2.mpy.acc.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s1",
+    "llvm.hexagon.M2.mpy.acc.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s0",
+    "llvm.hexagon.M2.mpy.acc.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s1",
+    "llvm.hexagon.M2.mpy.acc.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s0",
+    "llvm.hexagon.M2.mpy.acc.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s1",
+    "llvm.hexagon.M2.mpy.acc.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s0",
+    "llvm.hexagon.M2.mpy.acc.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s1",
+    "llvm.hexagon.M2.mpy.hh.s0" => "__builtin_HEXAGON_M2_mpy_hh_s0",
+    "llvm.hexagon.M2.mpy.hh.s1" => "__builtin_HEXAGON_M2_mpy_hh_s1",
+    "llvm.hexagon.M2.mpy.hl.s0" => "__builtin_HEXAGON_M2_mpy_hl_s0",
+    "llvm.hexagon.M2.mpy.hl.s1" => "__builtin_HEXAGON_M2_mpy_hl_s1",
+    "llvm.hexagon.M2.mpy.lh.s0" => "__builtin_HEXAGON_M2_mpy_lh_s0",
+    "llvm.hexagon.M2.mpy.lh.s1" => "__builtin_HEXAGON_M2_mpy_lh_s1",
+    "llvm.hexagon.M2.mpy.ll.s0" => "__builtin_HEXAGON_M2_mpy_ll_s0",
+    "llvm.hexagon.M2.mpy.ll.s1" => "__builtin_HEXAGON_M2_mpy_ll_s1",
+    "llvm.hexagon.M2.mpy.nac.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_hh_s0",
+    "llvm.hexagon.M2.mpy.nac.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_hh_s1",
+    "llvm.hexagon.M2.mpy.nac.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_hl_s0",
+    "llvm.hexagon.M2.mpy.nac.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_hl_s1",
+    "llvm.hexagon.M2.mpy.nac.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_lh_s0",
+    "llvm.hexagon.M2.mpy.nac.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_lh_s1",
+    "llvm.hexagon.M2.mpy.nac.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_ll_s0",
+    "llvm.hexagon.M2.mpy.nac.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_ll_s1",
+    "llvm.hexagon.M2.mpy.nac.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s0",
+    "llvm.hexagon.M2.mpy.nac.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s1",
+    "llvm.hexagon.M2.mpy.nac.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s0",
+    "llvm.hexagon.M2.mpy.nac.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s1",
+    "llvm.hexagon.M2.mpy.nac.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s0",
+    "llvm.hexagon.M2.mpy.nac.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s1",
+    "llvm.hexagon.M2.mpy.nac.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s0",
+    "llvm.hexagon.M2.mpy.nac.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s1",
+    "llvm.hexagon.M2.mpy.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s0",
+    "llvm.hexagon.M2.mpy.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s1",
+    "llvm.hexagon.M2.mpy.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s0",
+    "llvm.hexagon.M2.mpy.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s1",
+    "llvm.hexagon.M2.mpy.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s0",
+    "llvm.hexagon.M2.mpy.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s1",
+    "llvm.hexagon.M2.mpy.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s0",
+    "llvm.hexagon.M2.mpy.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s1",
+    "llvm.hexagon.M2.mpy.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_hh_s0",
+    "llvm.hexagon.M2.mpy.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_hh_s1",
+    "llvm.hexagon.M2.mpy.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_hl_s0",
+    "llvm.hexagon.M2.mpy.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_hl_s1",
+    "llvm.hexagon.M2.mpy.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_lh_s0",
+    "llvm.hexagon.M2.mpy.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_lh_s1",
+    "llvm.hexagon.M2.mpy.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_ll_s0",
+    "llvm.hexagon.M2.mpy.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_ll_s1",
+    "llvm.hexagon.M2.mpy.sat.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0",
+    "llvm.hexagon.M2.mpy.sat.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1",
+    "llvm.hexagon.M2.mpy.sat.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0",
+    "llvm.hexagon.M2.mpy.sat.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1",
+    "llvm.hexagon.M2.mpy.sat.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0",
+    "llvm.hexagon.M2.mpy.sat.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1",
+    "llvm.hexagon.M2.mpy.sat.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0",
+    "llvm.hexagon.M2.mpy.sat.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1",
+    "llvm.hexagon.M2.mpy.up" => "__builtin_HEXAGON_M2_mpy_up",
+    "llvm.hexagon.M2.mpy.up.s1" => "__builtin_HEXAGON_M2_mpy_up_s1",
+    "llvm.hexagon.M2.mpy.up.s1.sat" => "__builtin_HEXAGON_M2_mpy_up_s1_sat",
+    "llvm.hexagon.M2.mpyd.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s0",
+    "llvm.hexagon.M2.mpyd.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s1",
+    "llvm.hexagon.M2.mpyd.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s0",
+    "llvm.hexagon.M2.mpyd.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s1",
+    "llvm.hexagon.M2.mpyd.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s0",
+    "llvm.hexagon.M2.mpyd.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s1",
+    "llvm.hexagon.M2.mpyd.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s0",
+    "llvm.hexagon.M2.mpyd.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s1",
+    "llvm.hexagon.M2.mpyd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_hh_s0",
+    "llvm.hexagon.M2.mpyd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_hh_s1",
+    "llvm.hexagon.M2.mpyd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_hl_s0",
+    "llvm.hexagon.M2.mpyd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_hl_s1",
+    "llvm.hexagon.M2.mpyd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_lh_s0",
+    "llvm.hexagon.M2.mpyd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_lh_s1",
+    "llvm.hexagon.M2.mpyd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_ll_s0",
+    "llvm.hexagon.M2.mpyd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_ll_s1",
+    "llvm.hexagon.M2.mpyd.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s0",
+    "llvm.hexagon.M2.mpyd.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s1",
+    "llvm.hexagon.M2.mpyd.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s0",
+    "llvm.hexagon.M2.mpyd.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s1",
+    "llvm.hexagon.M2.mpyd.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s0",
+    "llvm.hexagon.M2.mpyd.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s1",
+    "llvm.hexagon.M2.mpyd.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s0",
+    "llvm.hexagon.M2.mpyd.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s1",
+    "llvm.hexagon.M2.mpyd.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s0",
+    "llvm.hexagon.M2.mpyd.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s1",
+    "llvm.hexagon.M2.mpyd.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s0",
+    "llvm.hexagon.M2.mpyd.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s1",
+    "llvm.hexagon.M2.mpyd.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s0",
+    "llvm.hexagon.M2.mpyd.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s1",
+    "llvm.hexagon.M2.mpyd.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s0",
+    "llvm.hexagon.M2.mpyd.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s1",
+    "llvm.hexagon.M2.mpyi" => "__builtin_HEXAGON_M2_mpyi",
+    "llvm.hexagon.M2.mpysmi" => "__builtin_HEXAGON_M2_mpysmi",
+    "llvm.hexagon.M2.mpysu.up" => "__builtin_HEXAGON_M2_mpysu_up",
+    "llvm.hexagon.M2.mpyu.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s0",
+    "llvm.hexagon.M2.mpyu.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s1",
+    "llvm.hexagon.M2.mpyu.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s0",
+    "llvm.hexagon.M2.mpyu.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s1",
+    "llvm.hexagon.M2.mpyu.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s0",
+    "llvm.hexagon.M2.mpyu.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s1",
+    "llvm.hexagon.M2.mpyu.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s0",
+    "llvm.hexagon.M2.mpyu.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s1",
+    "llvm.hexagon.M2.mpyu.hh.s0" => "__builtin_HEXAGON_M2_mpyu_hh_s0",
+    "llvm.hexagon.M2.mpyu.hh.s1" => "__builtin_HEXAGON_M2_mpyu_hh_s1",
+    "llvm.hexagon.M2.mpyu.hl.s0" => "__builtin_HEXAGON_M2_mpyu_hl_s0",
+    "llvm.hexagon.M2.mpyu.hl.s1" => "__builtin_HEXAGON_M2_mpyu_hl_s1",
+    "llvm.hexagon.M2.mpyu.lh.s0" => "__builtin_HEXAGON_M2_mpyu_lh_s0",
+    "llvm.hexagon.M2.mpyu.lh.s1" => "__builtin_HEXAGON_M2_mpyu_lh_s1",
+    "llvm.hexagon.M2.mpyu.ll.s0" => "__builtin_HEXAGON_M2_mpyu_ll_s0",
+    "llvm.hexagon.M2.mpyu.ll.s1" => "__builtin_HEXAGON_M2_mpyu_ll_s1",
+    "llvm.hexagon.M2.mpyu.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s0",
+    "llvm.hexagon.M2.mpyu.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s1",
+    "llvm.hexagon.M2.mpyu.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s0",
+    "llvm.hexagon.M2.mpyu.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s1",
+    "llvm.hexagon.M2.mpyu.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s0",
+    "llvm.hexagon.M2.mpyu.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s1",
+    "llvm.hexagon.M2.mpyu.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s0",
+    "llvm.hexagon.M2.mpyu.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s1",
+    "llvm.hexagon.M2.mpyu.up" => "__builtin_HEXAGON_M2_mpyu_up",
+    "llvm.hexagon.M2.mpyud.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s0",
+    "llvm.hexagon.M2.mpyud.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s1",
+    "llvm.hexagon.M2.mpyud.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s0",
+    "llvm.hexagon.M2.mpyud.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s1",
+    "llvm.hexagon.M2.mpyud.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s0",
+    "llvm.hexagon.M2.mpyud.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s1",
+    "llvm.hexagon.M2.mpyud.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s0",
+    "llvm.hexagon.M2.mpyud.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s1",
+    "llvm.hexagon.M2.mpyud.hh.s0" => "__builtin_HEXAGON_M2_mpyud_hh_s0",
+    "llvm.hexagon.M2.mpyud.hh.s1" => "__builtin_HEXAGON_M2_mpyud_hh_s1",
+    "llvm.hexagon.M2.mpyud.hl.s0" => "__builtin_HEXAGON_M2_mpyud_hl_s0",
+    "llvm.hexagon.M2.mpyud.hl.s1" => "__builtin_HEXAGON_M2_mpyud_hl_s1",
+    "llvm.hexagon.M2.mpyud.lh.s0" => "__builtin_HEXAGON_M2_mpyud_lh_s0",
+    "llvm.hexagon.M2.mpyud.lh.s1" => "__builtin_HEXAGON_M2_mpyud_lh_s1",
+    "llvm.hexagon.M2.mpyud.ll.s0" => "__builtin_HEXAGON_M2_mpyud_ll_s0",
+    "llvm.hexagon.M2.mpyud.ll.s1" => "__builtin_HEXAGON_M2_mpyud_ll_s1",
+    "llvm.hexagon.M2.mpyud.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s0",
+    "llvm.hexagon.M2.mpyud.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s1",
+    "llvm.hexagon.M2.mpyud.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s0",
+    "llvm.hexagon.M2.mpyud.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s1",
+    "llvm.hexagon.M2.mpyud.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s0",
+    "llvm.hexagon.M2.mpyud.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s1",
+    "llvm.hexagon.M2.mpyud.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s0",
+    "llvm.hexagon.M2.mpyud.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s1",
+    "llvm.hexagon.M2.mpyui" => "__builtin_HEXAGON_M2_mpyui",
+    "llvm.hexagon.M2.nacci" => "__builtin_HEXAGON_M2_nacci",
+    "llvm.hexagon.M2.naccii" => "__builtin_HEXAGON_M2_naccii",
+    "llvm.hexagon.M2.subacc" => "__builtin_HEXAGON_M2_subacc",
+    "llvm.hexagon.M2.vabsdiffh" => "__builtin_HEXAGON_M2_vabsdiffh",
+    "llvm.hexagon.M2.vabsdiffw" => "__builtin_HEXAGON_M2_vabsdiffw",
+    "llvm.hexagon.M2.vcmac.s0.sat.i" => "__builtin_HEXAGON_M2_vcmac_s0_sat_i",
+    "llvm.hexagon.M2.vcmac.s0.sat.r" => "__builtin_HEXAGON_M2_vcmac_s0_sat_r",
+    "llvm.hexagon.M2.vcmpy.s0.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_i",
+    "llvm.hexagon.M2.vcmpy.s0.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_r",
+    "llvm.hexagon.M2.vcmpy.s1.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_i",
+    "llvm.hexagon.M2.vcmpy.s1.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_r",
+    "llvm.hexagon.M2.vdmacs.s0" => "__builtin_HEXAGON_M2_vdmacs_s0",
+    "llvm.hexagon.M2.vdmacs.s1" => "__builtin_HEXAGON_M2_vdmacs_s1",
+    "llvm.hexagon.M2.vdmpyrs.s0" => "__builtin_HEXAGON_M2_vdmpyrs_s0",
+    "llvm.hexagon.M2.vdmpyrs.s1" => "__builtin_HEXAGON_M2_vdmpyrs_s1",
+    "llvm.hexagon.M2.vdmpys.s0" => "__builtin_HEXAGON_M2_vdmpys_s0",
+    "llvm.hexagon.M2.vdmpys.s1" => "__builtin_HEXAGON_M2_vdmpys_s1",
+    "llvm.hexagon.M2.vmac2" => "__builtin_HEXAGON_M2_vmac2",
+    "llvm.hexagon.M2.vmac2es" => "__builtin_HEXAGON_M2_vmac2es",
+    "llvm.hexagon.M2.vmac2es.s0" => "__builtin_HEXAGON_M2_vmac2es_s0",
+    "llvm.hexagon.M2.vmac2es.s1" => "__builtin_HEXAGON_M2_vmac2es_s1",
+    "llvm.hexagon.M2.vmac2s.s0" => "__builtin_HEXAGON_M2_vmac2s_s0",
+    "llvm.hexagon.M2.vmac2s.s1" => "__builtin_HEXAGON_M2_vmac2s_s1",
+    "llvm.hexagon.M2.vmac2su.s0" => "__builtin_HEXAGON_M2_vmac2su_s0",
+    "llvm.hexagon.M2.vmac2su.s1" => "__builtin_HEXAGON_M2_vmac2su_s1",
+    "llvm.hexagon.M2.vmpy2es.s0" => "__builtin_HEXAGON_M2_vmpy2es_s0",
+    "llvm.hexagon.M2.vmpy2es.s1" => "__builtin_HEXAGON_M2_vmpy2es_s1",
+    "llvm.hexagon.M2.vmpy2s.s0" => "__builtin_HEXAGON_M2_vmpy2s_s0",
+    "llvm.hexagon.M2.vmpy2s.s0pack" => "__builtin_HEXAGON_M2_vmpy2s_s0pack",
+    "llvm.hexagon.M2.vmpy2s.s1" => "__builtin_HEXAGON_M2_vmpy2s_s1",
+    "llvm.hexagon.M2.vmpy2s.s1pack" => "__builtin_HEXAGON_M2_vmpy2s_s1pack",
+    "llvm.hexagon.M2.vmpy2su.s0" => "__builtin_HEXAGON_M2_vmpy2su_s0",
+    "llvm.hexagon.M2.vmpy2su.s1" => "__builtin_HEXAGON_M2_vmpy2su_s1",
+    "llvm.hexagon.M2.vraddh" => "__builtin_HEXAGON_M2_vraddh",
+    "llvm.hexagon.M2.vradduh" => "__builtin_HEXAGON_M2_vradduh",
+    "llvm.hexagon.M2.vrcmaci.s0" => "__builtin_HEXAGON_M2_vrcmaci_s0",
+    "llvm.hexagon.M2.vrcmaci.s0c" => "__builtin_HEXAGON_M2_vrcmaci_s0c",
+    "llvm.hexagon.M2.vrcmacr.s0" => "__builtin_HEXAGON_M2_vrcmacr_s0",
+    "llvm.hexagon.M2.vrcmacr.s0c" => "__builtin_HEXAGON_M2_vrcmacr_s0c",
+    "llvm.hexagon.M2.vrcmpyi.s0" => "__builtin_HEXAGON_M2_vrcmpyi_s0",
+    "llvm.hexagon.M2.vrcmpyi.s0c" => "__builtin_HEXAGON_M2_vrcmpyi_s0c",
+    "llvm.hexagon.M2.vrcmpyr.s0" => "__builtin_HEXAGON_M2_vrcmpyr_s0",
+    "llvm.hexagon.M2.vrcmpyr.s0c" => "__builtin_HEXAGON_M2_vrcmpyr_s0c",
+    "llvm.hexagon.M2.vrcmpys.acc.s1" => "__builtin_HEXAGON_M2_vrcmpys_acc_s1",
+    "llvm.hexagon.M2.vrcmpys.s1" => "__builtin_HEXAGON_M2_vrcmpys_s1",
+    "llvm.hexagon.M2.vrcmpys.s1rp" => "__builtin_HEXAGON_M2_vrcmpys_s1rp",
+    "llvm.hexagon.M2.vrmac.s0" => "__builtin_HEXAGON_M2_vrmac_s0",
+    "llvm.hexagon.M2.vrmpy.s0" => "__builtin_HEXAGON_M2_vrmpy_s0",
+    "llvm.hexagon.M2.xor.xacc" => "__builtin_HEXAGON_M2_xor_xacc",
+    "llvm.hexagon.M4.and.and" => "__builtin_HEXAGON_M4_and_and",
+    "llvm.hexagon.M4.and.andn" => "__builtin_HEXAGON_M4_and_andn",
+    "llvm.hexagon.M4.and.or" => "__builtin_HEXAGON_M4_and_or",
+    "llvm.hexagon.M4.and.xor" => "__builtin_HEXAGON_M4_and_xor",
+    "llvm.hexagon.M4.cmpyi.wh" => "__builtin_HEXAGON_M4_cmpyi_wh",
+    "llvm.hexagon.M4.cmpyi.whc" => "__builtin_HEXAGON_M4_cmpyi_whc",
+    "llvm.hexagon.M4.cmpyr.wh" => "__builtin_HEXAGON_M4_cmpyr_wh",
+    "llvm.hexagon.M4.cmpyr.whc" => "__builtin_HEXAGON_M4_cmpyr_whc",
+    "llvm.hexagon.M4.mac.up.s1.sat" => "__builtin_HEXAGON_M4_mac_up_s1_sat",
+    "llvm.hexagon.M4.mpyri.addi" => "__builtin_HEXAGON_M4_mpyri_addi",
+    "llvm.hexagon.M4.mpyri.addr" => "__builtin_HEXAGON_M4_mpyri_addr",
+    "llvm.hexagon.M4.mpyri.addr.u2" => "__builtin_HEXAGON_M4_mpyri_addr_u2",
+    "llvm.hexagon.M4.mpyrr.addi" => "__builtin_HEXAGON_M4_mpyrr_addi",
+    "llvm.hexagon.M4.mpyrr.addr" => "__builtin_HEXAGON_M4_mpyrr_addr",
+    "llvm.hexagon.M4.nac.up.s1.sat" => "__builtin_HEXAGON_M4_nac_up_s1_sat",
+    "llvm.hexagon.M4.or.and" => "__builtin_HEXAGON_M4_or_and",
+    "llvm.hexagon.M4.or.andn" => "__builtin_HEXAGON_M4_or_andn",
+    "llvm.hexagon.M4.or.or" => "__builtin_HEXAGON_M4_or_or",
+    "llvm.hexagon.M4.or.xor" => "__builtin_HEXAGON_M4_or_xor",
+    "llvm.hexagon.M4.pmpyw" => "__builtin_HEXAGON_M4_pmpyw",
+    "llvm.hexagon.M4.pmpyw.acc" => "__builtin_HEXAGON_M4_pmpyw_acc",
+    "llvm.hexagon.M4.vpmpyh" => "__builtin_HEXAGON_M4_vpmpyh",
+    "llvm.hexagon.M4.vpmpyh.acc" => "__builtin_HEXAGON_M4_vpmpyh_acc",
+    "llvm.hexagon.M4.vrmpyeh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s0",
+    "llvm.hexagon.M4.vrmpyeh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s1",
+    "llvm.hexagon.M4.vrmpyeh.s0" => "__builtin_HEXAGON_M4_vrmpyeh_s0",
+    "llvm.hexagon.M4.vrmpyeh.s1" => "__builtin_HEXAGON_M4_vrmpyeh_s1",
+    "llvm.hexagon.M4.vrmpyoh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s0",
+    "llvm.hexagon.M4.vrmpyoh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s1",
+    "llvm.hexagon.M4.vrmpyoh.s0" => "__builtin_HEXAGON_M4_vrmpyoh_s0",
+    "llvm.hexagon.M4.vrmpyoh.s1" => "__builtin_HEXAGON_M4_vrmpyoh_s1",
+    "llvm.hexagon.M4.xor.and" => "__builtin_HEXAGON_M4_xor_and",
+    "llvm.hexagon.M4.xor.andn" => "__builtin_HEXAGON_M4_xor_andn",
+    "llvm.hexagon.M4.xor.or" => "__builtin_HEXAGON_M4_xor_or",
+    "llvm.hexagon.M4.xor.xacc" => "__builtin_HEXAGON_M4_xor_xacc",
+    "llvm.hexagon.M5.vdmacbsu" => "__builtin_HEXAGON_M5_vdmacbsu",
+    "llvm.hexagon.M5.vdmpybsu" => "__builtin_HEXAGON_M5_vdmpybsu",
+    "llvm.hexagon.M5.vmacbsu" => "__builtin_HEXAGON_M5_vmacbsu",
+    "llvm.hexagon.M5.vmacbuu" => "__builtin_HEXAGON_M5_vmacbuu",
+    "llvm.hexagon.M5.vmpybsu" => "__builtin_HEXAGON_M5_vmpybsu",
+    "llvm.hexagon.M5.vmpybuu" => "__builtin_HEXAGON_M5_vmpybuu",
+    "llvm.hexagon.M5.vrmacbsu" => "__builtin_HEXAGON_M5_vrmacbsu",
+    "llvm.hexagon.M5.vrmacbuu" => "__builtin_HEXAGON_M5_vrmacbuu",
+    "llvm.hexagon.M5.vrmpybsu" => "__builtin_HEXAGON_M5_vrmpybsu",
+    "llvm.hexagon.M5.vrmpybuu" => "__builtin_HEXAGON_M5_vrmpybuu",
+    "llvm.hexagon.S2.addasl.rrri" => "__builtin_HEXAGON_S2_addasl_rrri",
+    "llvm.hexagon.S2.asl.i.p" => "__builtin_HEXAGON_S2_asl_i_p",
+    "llvm.hexagon.S2.asl.i.p.acc" => "__builtin_HEXAGON_S2_asl_i_p_acc",
+    "llvm.hexagon.S2.asl.i.p.and" => "__builtin_HEXAGON_S2_asl_i_p_and",
+    "llvm.hexagon.S2.asl.i.p.nac" => "__builtin_HEXAGON_S2_asl_i_p_nac",
+    "llvm.hexagon.S2.asl.i.p.or" => "__builtin_HEXAGON_S2_asl_i_p_or",
+    "llvm.hexagon.S2.asl.i.p.xacc" => "__builtin_HEXAGON_S2_asl_i_p_xacc",
+    "llvm.hexagon.S2.asl.i.r" => "__builtin_HEXAGON_S2_asl_i_r",
+    "llvm.hexagon.S2.asl.i.r.acc" => "__builtin_HEXAGON_S2_asl_i_r_acc",
+    "llvm.hexagon.S2.asl.i.r.and" => "__builtin_HEXAGON_S2_asl_i_r_and",
+    "llvm.hexagon.S2.asl.i.r.nac" => "__builtin_HEXAGON_S2_asl_i_r_nac",
+    "llvm.hexagon.S2.asl.i.r.or" => "__builtin_HEXAGON_S2_asl_i_r_or",
+    "llvm.hexagon.S2.asl.i.r.sat" => "__builtin_HEXAGON_S2_asl_i_r_sat",
+    "llvm.hexagon.S2.asl.i.r.xacc" => "__builtin_HEXAGON_S2_asl_i_r_xacc",
+    "llvm.hexagon.S2.asl.i.vh" => "__builtin_HEXAGON_S2_asl_i_vh",
+    "llvm.hexagon.S2.asl.i.vw" => "__builtin_HEXAGON_S2_asl_i_vw",
+    "llvm.hexagon.S2.asl.r.p" => "__builtin_HEXAGON_S2_asl_r_p",
+    "llvm.hexagon.S2.asl.r.p.acc" => "__builtin_HEXAGON_S2_asl_r_p_acc",
+    "llvm.hexagon.S2.asl.r.p.and" => "__builtin_HEXAGON_S2_asl_r_p_and",
+    "llvm.hexagon.S2.asl.r.p.nac" => "__builtin_HEXAGON_S2_asl_r_p_nac",
+    "llvm.hexagon.S2.asl.r.p.or" => "__builtin_HEXAGON_S2_asl_r_p_or",
+    "llvm.hexagon.S2.asl.r.p.xor" => "__builtin_HEXAGON_S2_asl_r_p_xor",
+    "llvm.hexagon.S2.asl.r.r" => "__builtin_HEXAGON_S2_asl_r_r",
+    "llvm.hexagon.S2.asl.r.r.acc" => "__builtin_HEXAGON_S2_asl_r_r_acc",
+    "llvm.hexagon.S2.asl.r.r.and" => "__builtin_HEXAGON_S2_asl_r_r_and",
+    "llvm.hexagon.S2.asl.r.r.nac" => "__builtin_HEXAGON_S2_asl_r_r_nac",
+    "llvm.hexagon.S2.asl.r.r.or" => "__builtin_HEXAGON_S2_asl_r_r_or",
+    "llvm.hexagon.S2.asl.r.r.sat" => "__builtin_HEXAGON_S2_asl_r_r_sat",
+    "llvm.hexagon.S2.asl.r.vh" => "__builtin_HEXAGON_S2_asl_r_vh",
+    "llvm.hexagon.S2.asl.r.vw" => "__builtin_HEXAGON_S2_asl_r_vw",
+    "llvm.hexagon.S2.asr.i.p" => "__builtin_HEXAGON_S2_asr_i_p",
+    "llvm.hexagon.S2.asr.i.p.acc" => "__builtin_HEXAGON_S2_asr_i_p_acc",
+    "llvm.hexagon.S2.asr.i.p.and" => "__builtin_HEXAGON_S2_asr_i_p_and",
+    "llvm.hexagon.S2.asr.i.p.nac" => "__builtin_HEXAGON_S2_asr_i_p_nac",
+    "llvm.hexagon.S2.asr.i.p.or" => "__builtin_HEXAGON_S2_asr_i_p_or",
+    "llvm.hexagon.S2.asr.i.p.rnd" => "__builtin_HEXAGON_S2_asr_i_p_rnd",
+    "llvm.hexagon.S2.asr.i.p.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax",
+    "llvm.hexagon.S2.asr.i.r" => "__builtin_HEXAGON_S2_asr_i_r",
+    "llvm.hexagon.S2.asr.i.r.acc" => "__builtin_HEXAGON_S2_asr_i_r_acc",
+    "llvm.hexagon.S2.asr.i.r.and" => "__builtin_HEXAGON_S2_asr_i_r_and",
+    "llvm.hexagon.S2.asr.i.r.nac" => "__builtin_HEXAGON_S2_asr_i_r_nac",
+    "llvm.hexagon.S2.asr.i.r.or" => "__builtin_HEXAGON_S2_asr_i_r_or",
+    "llvm.hexagon.S2.asr.i.r.rnd" => "__builtin_HEXAGON_S2_asr_i_r_rnd",
+    "llvm.hexagon.S2.asr.i.r.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax",
+    "llvm.hexagon.S2.asr.i.svw.trun" => "__builtin_HEXAGON_S2_asr_i_svw_trun",
+    "llvm.hexagon.S2.asr.i.vh" => "__builtin_HEXAGON_S2_asr_i_vh",
+    "llvm.hexagon.S2.asr.i.vw" => "__builtin_HEXAGON_S2_asr_i_vw",
+    "llvm.hexagon.S2.asr.r.p" => "__builtin_HEXAGON_S2_asr_r_p",
+    "llvm.hexagon.S2.asr.r.p.acc" => "__builtin_HEXAGON_S2_asr_r_p_acc",
+    "llvm.hexagon.S2.asr.r.p.and" => "__builtin_HEXAGON_S2_asr_r_p_and",
+    "llvm.hexagon.S2.asr.r.p.nac" => "__builtin_HEXAGON_S2_asr_r_p_nac",
+    "llvm.hexagon.S2.asr.r.p.or" => "__builtin_HEXAGON_S2_asr_r_p_or",
+    "llvm.hexagon.S2.asr.r.p.xor" => "__builtin_HEXAGON_S2_asr_r_p_xor",
+    "llvm.hexagon.S2.asr.r.r" => "__builtin_HEXAGON_S2_asr_r_r",
+    "llvm.hexagon.S2.asr.r.r.acc" => "__builtin_HEXAGON_S2_asr_r_r_acc",
+    "llvm.hexagon.S2.asr.r.r.and" => "__builtin_HEXAGON_S2_asr_r_r_and",
+    "llvm.hexagon.S2.asr.r.r.nac" => "__builtin_HEXAGON_S2_asr_r_r_nac",
+    "llvm.hexagon.S2.asr.r.r.or" => "__builtin_HEXAGON_S2_asr_r_r_or",
+    "llvm.hexagon.S2.asr.r.r.sat" => "__builtin_HEXAGON_S2_asr_r_r_sat",
+    "llvm.hexagon.S2.asr.r.svw.trun" => "__builtin_HEXAGON_S2_asr_r_svw_trun",
+    "llvm.hexagon.S2.asr.r.vh" => "__builtin_HEXAGON_S2_asr_r_vh",
+    "llvm.hexagon.S2.asr.r.vw" => "__builtin_HEXAGON_S2_asr_r_vw",
+    "llvm.hexagon.S2.brev" => "__builtin_HEXAGON_S2_brev",
+    "llvm.hexagon.S2.brevp" => "__builtin_HEXAGON_S2_brevp",
+    "llvm.hexagon.S2.cl0" => "__builtin_HEXAGON_S2_cl0",
+    "llvm.hexagon.S2.cl0p" => "__builtin_HEXAGON_S2_cl0p",
+    "llvm.hexagon.S2.cl1" => "__builtin_HEXAGON_S2_cl1",
+    "llvm.hexagon.S2.cl1p" => "__builtin_HEXAGON_S2_cl1p",
+    "llvm.hexagon.S2.clb" => "__builtin_HEXAGON_S2_clb",
+    "llvm.hexagon.S2.clbnorm" => "__builtin_HEXAGON_S2_clbnorm",
+    "llvm.hexagon.S2.clbp" => "__builtin_HEXAGON_S2_clbp",
+    "llvm.hexagon.S2.clrbit.i" => "__builtin_HEXAGON_S2_clrbit_i",
+    "llvm.hexagon.S2.clrbit.r" => "__builtin_HEXAGON_S2_clrbit_r",
+    "llvm.hexagon.S2.ct0" => "__builtin_HEXAGON_S2_ct0",
+    "llvm.hexagon.S2.ct0p" => "__builtin_HEXAGON_S2_ct0p",
+    "llvm.hexagon.S2.ct1" => "__builtin_HEXAGON_S2_ct1",
+    "llvm.hexagon.S2.ct1p" => "__builtin_HEXAGON_S2_ct1p",
+    "llvm.hexagon.S2.deinterleave" => "__builtin_HEXAGON_S2_deinterleave",
+    "llvm.hexagon.S2.extractu" => "__builtin_HEXAGON_S2_extractu",
+    "llvm.hexagon.S2.extractu.rp" => "__builtin_HEXAGON_S2_extractu_rp",
+    "llvm.hexagon.S2.extractup" => "__builtin_HEXAGON_S2_extractup",
+    "llvm.hexagon.S2.extractup.rp" => "__builtin_HEXAGON_S2_extractup_rp",
+    "llvm.hexagon.S2.insert" => "__builtin_HEXAGON_S2_insert",
+    "llvm.hexagon.S2.insert.rp" => "__builtin_HEXAGON_S2_insert_rp",
+    "llvm.hexagon.S2.insertp" => "__builtin_HEXAGON_S2_insertp",
+    "llvm.hexagon.S2.insertp.rp" => "__builtin_HEXAGON_S2_insertp_rp",
+    "llvm.hexagon.S2.interleave" => "__builtin_HEXAGON_S2_interleave",
+    "llvm.hexagon.S2.lfsp" => "__builtin_HEXAGON_S2_lfsp",
+    "llvm.hexagon.S2.lsl.r.p" => "__builtin_HEXAGON_S2_lsl_r_p",
+    "llvm.hexagon.S2.lsl.r.p.acc" => "__builtin_HEXAGON_S2_lsl_r_p_acc",
+    "llvm.hexagon.S2.lsl.r.p.and" => "__builtin_HEXAGON_S2_lsl_r_p_and",
+    "llvm.hexagon.S2.lsl.r.p.nac" => "__builtin_HEXAGON_S2_lsl_r_p_nac",
+    "llvm.hexagon.S2.lsl.r.p.or" => "__builtin_HEXAGON_S2_lsl_r_p_or",
+    "llvm.hexagon.S2.lsl.r.p.xor" => "__builtin_HEXAGON_S2_lsl_r_p_xor",
+    "llvm.hexagon.S2.lsl.r.r" => "__builtin_HEXAGON_S2_lsl_r_r",
+    "llvm.hexagon.S2.lsl.r.r.acc" => "__builtin_HEXAGON_S2_lsl_r_r_acc",
+    "llvm.hexagon.S2.lsl.r.r.and" => "__builtin_HEXAGON_S2_lsl_r_r_and",
+    "llvm.hexagon.S2.lsl.r.r.nac" => "__builtin_HEXAGON_S2_lsl_r_r_nac",
+    "llvm.hexagon.S2.lsl.r.r.or" => "__builtin_HEXAGON_S2_lsl_r_r_or",
+    "llvm.hexagon.S2.lsl.r.vh" => "__builtin_HEXAGON_S2_lsl_r_vh",
+    "llvm.hexagon.S2.lsl.r.vw" => "__builtin_HEXAGON_S2_lsl_r_vw",
+    "llvm.hexagon.S2.lsr.i.p" => "__builtin_HEXAGON_S2_lsr_i_p",
+    "llvm.hexagon.S2.lsr.i.p.acc" => "__builtin_HEXAGON_S2_lsr_i_p_acc",
+    "llvm.hexagon.S2.lsr.i.p.and" => "__builtin_HEXAGON_S2_lsr_i_p_and",
+    "llvm.hexagon.S2.lsr.i.p.nac" => "__builtin_HEXAGON_S2_lsr_i_p_nac",
+    "llvm.hexagon.S2.lsr.i.p.or" => "__builtin_HEXAGON_S2_lsr_i_p_or",
+    "llvm.hexagon.S2.lsr.i.p.xacc" => "__builtin_HEXAGON_S2_lsr_i_p_xacc",
+    "llvm.hexagon.S2.lsr.i.r" => "__builtin_HEXAGON_S2_lsr_i_r",
+    "llvm.hexagon.S2.lsr.i.r.acc" => "__builtin_HEXAGON_S2_lsr_i_r_acc",
+    "llvm.hexagon.S2.lsr.i.r.and" => "__builtin_HEXAGON_S2_lsr_i_r_and",
+    "llvm.hexagon.S2.lsr.i.r.nac" => "__builtin_HEXAGON_S2_lsr_i_r_nac",
+    "llvm.hexagon.S2.lsr.i.r.or" => "__builtin_HEXAGON_S2_lsr_i_r_or",
+    "llvm.hexagon.S2.lsr.i.r.xacc" => "__builtin_HEXAGON_S2_lsr_i_r_xacc",
+    "llvm.hexagon.S2.lsr.i.vh" => "__builtin_HEXAGON_S2_lsr_i_vh",
+    "llvm.hexagon.S2.lsr.i.vw" => "__builtin_HEXAGON_S2_lsr_i_vw",
+    "llvm.hexagon.S2.lsr.r.p" => "__builtin_HEXAGON_S2_lsr_r_p",
+    "llvm.hexagon.S2.lsr.r.p.acc" => "__builtin_HEXAGON_S2_lsr_r_p_acc",
+    "llvm.hexagon.S2.lsr.r.p.and" => "__builtin_HEXAGON_S2_lsr_r_p_and",
+    "llvm.hexagon.S2.lsr.r.p.nac" => "__builtin_HEXAGON_S2_lsr_r_p_nac",
+    "llvm.hexagon.S2.lsr.r.p.or" => "__builtin_HEXAGON_S2_lsr_r_p_or",
+    "llvm.hexagon.S2.lsr.r.p.xor" => "__builtin_HEXAGON_S2_lsr_r_p_xor",
+    "llvm.hexagon.S2.lsr.r.r" => "__builtin_HEXAGON_S2_lsr_r_r",
+    "llvm.hexagon.S2.lsr.r.r.acc" => "__builtin_HEXAGON_S2_lsr_r_r_acc",
+    "llvm.hexagon.S2.lsr.r.r.and" => "__builtin_HEXAGON_S2_lsr_r_r_and",
+    "llvm.hexagon.S2.lsr.r.r.nac" => "__builtin_HEXAGON_S2_lsr_r_r_nac",
+    "llvm.hexagon.S2.lsr.r.r.or" => "__builtin_HEXAGON_S2_lsr_r_r_or",
+    "llvm.hexagon.S2.lsr.r.vh" => "__builtin_HEXAGON_S2_lsr_r_vh",
+    "llvm.hexagon.S2.lsr.r.vw" => "__builtin_HEXAGON_S2_lsr_r_vw",
+    "llvm.hexagon.S2.packhl" => "__builtin_HEXAGON_S2_packhl",
+    "llvm.hexagon.S2.parityp" => "__builtin_HEXAGON_S2_parityp",
+    "llvm.hexagon.S2.setbit.i" => "__builtin_HEXAGON_S2_setbit_i",
+    "llvm.hexagon.S2.setbit.r" => "__builtin_HEXAGON_S2_setbit_r",
+    "llvm.hexagon.S2.shuffeb" => "__builtin_HEXAGON_S2_shuffeb",
+    "llvm.hexagon.S2.shuffeh" => "__builtin_HEXAGON_S2_shuffeh",
+    "llvm.hexagon.S2.shuffob" => "__builtin_HEXAGON_S2_shuffob",
+    "llvm.hexagon.S2.shuffoh" => "__builtin_HEXAGON_S2_shuffoh",
+    "llvm.hexagon.S2.svsathb" => "__builtin_HEXAGON_S2_svsathb",
+    "llvm.hexagon.S2.svsathub" => "__builtin_HEXAGON_S2_svsathub",
+    "llvm.hexagon.S2.tableidxb.goodsyntax" => "__builtin_HEXAGON_S2_tableidxb_goodsyntax",
+    "llvm.hexagon.S2.tableidxd.goodsyntax" => "__builtin_HEXAGON_S2_tableidxd_goodsyntax",
+    "llvm.hexagon.S2.tableidxh.goodsyntax" => "__builtin_HEXAGON_S2_tableidxh_goodsyntax",
+    "llvm.hexagon.S2.tableidxw.goodsyntax" => "__builtin_HEXAGON_S2_tableidxw_goodsyntax",
+    "llvm.hexagon.S2.togglebit.i" => "__builtin_HEXAGON_S2_togglebit_i",
+    "llvm.hexagon.S2.togglebit.r" => "__builtin_HEXAGON_S2_togglebit_r",
+    "llvm.hexagon.S2.tstbit.i" => "__builtin_HEXAGON_S2_tstbit_i",
+    "llvm.hexagon.S2.tstbit.r" => "__builtin_HEXAGON_S2_tstbit_r",
+    "llvm.hexagon.S2.valignib" => "__builtin_HEXAGON_S2_valignib",
+    "llvm.hexagon.S2.valignrb" => "__builtin_HEXAGON_S2_valignrb",
+    "llvm.hexagon.S2.vcnegh" => "__builtin_HEXAGON_S2_vcnegh",
+    "llvm.hexagon.S2.vcrotate" => "__builtin_HEXAGON_S2_vcrotate",
+    "llvm.hexagon.S2.vrcnegh" => "__builtin_HEXAGON_S2_vrcnegh",
+    "llvm.hexagon.S2.vrndpackwh" => "__builtin_HEXAGON_S2_vrndpackwh",
+    "llvm.hexagon.S2.vrndpackwhs" => "__builtin_HEXAGON_S2_vrndpackwhs",
+    "llvm.hexagon.S2.vsathb" => "__builtin_HEXAGON_S2_vsathb",
+    "llvm.hexagon.S2.vsathb.nopack" => "__builtin_HEXAGON_S2_vsathb_nopack",
+    "llvm.hexagon.S2.vsathub" => "__builtin_HEXAGON_S2_vsathub",
+    "llvm.hexagon.S2.vsathub.nopack" => "__builtin_HEXAGON_S2_vsathub_nopack",
+    "llvm.hexagon.S2.vsatwh" => "__builtin_HEXAGON_S2_vsatwh",
+    "llvm.hexagon.S2.vsatwh.nopack" => "__builtin_HEXAGON_S2_vsatwh_nopack",
+    "llvm.hexagon.S2.vsatwuh" => "__builtin_HEXAGON_S2_vsatwuh",
+    "llvm.hexagon.S2.vsatwuh.nopack" => "__builtin_HEXAGON_S2_vsatwuh_nopack",
+    "llvm.hexagon.S2.vsplatrb" => "__builtin_HEXAGON_S2_vsplatrb",
+    "llvm.hexagon.S2.vsplatrh" => "__builtin_HEXAGON_S2_vsplatrh",
+    "llvm.hexagon.S2.vspliceib" => "__builtin_HEXAGON_S2_vspliceib",
+    "llvm.hexagon.S2.vsplicerb" => "__builtin_HEXAGON_S2_vsplicerb",
+    "llvm.hexagon.S2.vsxtbh" => "__builtin_HEXAGON_S2_vsxtbh",
+    "llvm.hexagon.S2.vsxthw" => "__builtin_HEXAGON_S2_vsxthw",
+    "llvm.hexagon.S2.vtrunehb" => "__builtin_HEXAGON_S2_vtrunehb",
+    "llvm.hexagon.S2.vtrunewh" => "__builtin_HEXAGON_S2_vtrunewh",
+    "llvm.hexagon.S2.vtrunohb" => "__builtin_HEXAGON_S2_vtrunohb",
+    "llvm.hexagon.S2.vtrunowh" => "__builtin_HEXAGON_S2_vtrunowh",
+    "llvm.hexagon.S2.vzxtbh" => "__builtin_HEXAGON_S2_vzxtbh",
+    "llvm.hexagon.S2.vzxthw" => "__builtin_HEXAGON_S2_vzxthw",
+    "llvm.hexagon.S4.addaddi" => "__builtin_HEXAGON_S4_addaddi",
+    "llvm.hexagon.S4.addi.asl.ri" => "__builtin_HEXAGON_S4_addi_asl_ri",
+    "llvm.hexagon.S4.addi.lsr.ri" => "__builtin_HEXAGON_S4_addi_lsr_ri",
+    "llvm.hexagon.S4.andi.asl.ri" => "__builtin_HEXAGON_S4_andi_asl_ri",
+    "llvm.hexagon.S4.andi.lsr.ri" => "__builtin_HEXAGON_S4_andi_lsr_ri",
+    "llvm.hexagon.S4.clbaddi" => "__builtin_HEXAGON_S4_clbaddi",
+    "llvm.hexagon.S4.clbpaddi" => "__builtin_HEXAGON_S4_clbpaddi",
+    "llvm.hexagon.S4.clbpnorm" => "__builtin_HEXAGON_S4_clbpnorm",
+    "llvm.hexagon.S4.extract" => "__builtin_HEXAGON_S4_extract",
+    "llvm.hexagon.S4.extract.rp" => "__builtin_HEXAGON_S4_extract_rp",
+    "llvm.hexagon.S4.extractp" => "__builtin_HEXAGON_S4_extractp",
+    "llvm.hexagon.S4.extractp.rp" => "__builtin_HEXAGON_S4_extractp_rp",
+    "llvm.hexagon.S4.lsli" => "__builtin_HEXAGON_S4_lsli",
+    "llvm.hexagon.S4.ntstbit.i" => "__builtin_HEXAGON_S4_ntstbit_i",
+    "llvm.hexagon.S4.ntstbit.r" => "__builtin_HEXAGON_S4_ntstbit_r",
+    "llvm.hexagon.S4.or.andi" => "__builtin_HEXAGON_S4_or_andi",
+    "llvm.hexagon.S4.or.andix" => "__builtin_HEXAGON_S4_or_andix",
+    "llvm.hexagon.S4.or.ori" => "__builtin_HEXAGON_S4_or_ori",
+    "llvm.hexagon.S4.ori.asl.ri" => "__builtin_HEXAGON_S4_ori_asl_ri",
+    "llvm.hexagon.S4.ori.lsr.ri" => "__builtin_HEXAGON_S4_ori_lsr_ri",
+    "llvm.hexagon.S4.parity" => "__builtin_HEXAGON_S4_parity",
+    "llvm.hexagon.S4.subaddi" => "__builtin_HEXAGON_S4_subaddi",
+    "llvm.hexagon.S4.subi.asl.ri" => "__builtin_HEXAGON_S4_subi_asl_ri",
+    "llvm.hexagon.S4.subi.lsr.ri" => "__builtin_HEXAGON_S4_subi_lsr_ri",
+    "llvm.hexagon.S4.vrcrotate" => "__builtin_HEXAGON_S4_vrcrotate",
+    "llvm.hexagon.S4.vrcrotate.acc" => "__builtin_HEXAGON_S4_vrcrotate_acc",
+    "llvm.hexagon.S4.vxaddsubh" => "__builtin_HEXAGON_S4_vxaddsubh",
+    "llvm.hexagon.S4.vxaddsubhr" => "__builtin_HEXAGON_S4_vxaddsubhr",
+    "llvm.hexagon.S4.vxaddsubw" => "__builtin_HEXAGON_S4_vxaddsubw",
+    "llvm.hexagon.S4.vxsubaddh" => "__builtin_HEXAGON_S4_vxsubaddh",
+    "llvm.hexagon.S4.vxsubaddhr" => "__builtin_HEXAGON_S4_vxsubaddhr",
+    "llvm.hexagon.S4.vxsubaddw" => "__builtin_HEXAGON_S4_vxsubaddw",
+    "llvm.hexagon.S5.asrhub.rnd.sat.goodsyntax" => "__builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax",
+    "llvm.hexagon.S5.asrhub.sat" => "__builtin_HEXAGON_S5_asrhub_sat",
+    "llvm.hexagon.S5.popcountp" => "__builtin_HEXAGON_S5_popcountp",
+    "llvm.hexagon.S5.vasrhrnd.goodsyntax" => "__builtin_HEXAGON_S5_vasrhrnd_goodsyntax",
+    "llvm.hexagon.SI.to.SXTHI.asrh" => "__builtin_SI_to_SXTHI_asrh",
+    "llvm.hexagon.circ.ldd" => "__builtin_circ_ldd",
+    // aarch64
+    "llvm.aarch64.dmb" => "__builtin_arm_dmb",
+    "llvm.aarch64.dsb" => "__builtin_arm_dsb",
+    "llvm.aarch64.isb" => "__builtin_arm_isb",
+    // nvvm
+    "llvm.nvvm.abs.i" => "__nvvm_abs_i",
+    "llvm.nvvm.abs.ll" => "__nvvm_abs_ll",
+    "llvm.nvvm.add.rm.d" => "__nvvm_add_rm_d",
+    "llvm.nvvm.add.rm.f" => "__nvvm_add_rm_f",
+    "llvm.nvvm.add.rm.ftz.f" => "__nvvm_add_rm_ftz_f",
+    "llvm.nvvm.add.rn.d" => "__nvvm_add_rn_d",
+    "llvm.nvvm.add.rn.f" => "__nvvm_add_rn_f",
+    "llvm.nvvm.add.rn.ftz.f" => "__nvvm_add_rn_ftz_f",
+    "llvm.nvvm.add.rp.d" => "__nvvm_add_rp_d",
+    "llvm.nvvm.add.rp.f" => "__nvvm_add_rp_f",
+    "llvm.nvvm.add.rp.ftz.f" => "__nvvm_add_rp_ftz_f",
+    "llvm.nvvm.add.rz.d" => "__nvvm_add_rz_d",
+    "llvm.nvvm.add.rz.f" => "__nvvm_add_rz_f",
+    "llvm.nvvm.add.rz.ftz.f" => "__nvvm_add_rz_ftz_f",
+    "llvm.nvvm.barrier0" => "__nvvm_bar0",
+    "llvm.nvvm.barrier0.and" => "__nvvm_bar0_and",
+    "llvm.nvvm.barrier0.or" => "__nvvm_bar0_or",
+    "llvm.nvvm.barrier0.popc" => "__nvvm_bar0_popc",
+    "llvm.nvvm.bitcast.d2ll" => "__nvvm_bitcast_d2ll",
+    "llvm.nvvm.bitcast.f2i" => "__nvvm_bitcast_f2i",
+    "llvm.nvvm.bitcast.i2f" => "__nvvm_bitcast_i2f",
+    "llvm.nvvm.bitcast.ll2d" => "__nvvm_bitcast_ll2d",
+    "llvm.nvvm.brev32" => "__nvvm_brev32",
+    "llvm.nvvm.brev64" => "__nvvm_brev64",
+    "llvm.nvvm.ceil.d" => "__nvvm_ceil_d",
+    "llvm.nvvm.ceil.f" => "__nvvm_ceil_f",
+    "llvm.nvvm.ceil.ftz.f" => "__nvvm_ceil_ftz_f",
+    "llvm.nvvm.clz.i" => "__nvvm_clz_i",
+    "llvm.nvvm.clz.ll" => "__nvvm_clz_ll",
+    "llvm.nvvm.cos.approx.f" => "__nvvm_cos_approx_f",
+    "llvm.nvvm.cos.approx.ftz.f" => "__nvvm_cos_approx_ftz_f",
+    "llvm.nvvm.d2f.rm" => "__nvvm_d2f_rm",
+    "llvm.nvvm.d2f.rm.ftz" => "__nvvm_d2f_rm_ftz",
+    "llvm.nvvm.d2f.rn" => "__nvvm_d2f_rn",
+    "llvm.nvvm.d2f.rn.ftz" => "__nvvm_d2f_rn_ftz",
+    "llvm.nvvm.d2f.rp" => "__nvvm_d2f_rp",
+    "llvm.nvvm.d2f.rp.ftz" => "__nvvm_d2f_rp_ftz",
+    "llvm.nvvm.d2f.rz" => "__nvvm_d2f_rz",
+    "llvm.nvvm.d2f.rz.ftz" => "__nvvm_d2f_rz_ftz",
+    "llvm.nvvm.d2i.hi" => "__nvvm_d2i_hi",
+    "llvm.nvvm.d2i.lo" => "__nvvm_d2i_lo",
+    "llvm.nvvm.d2i.rm" => "__nvvm_d2i_rm",
+    "llvm.nvvm.d2i.rn" => "__nvvm_d2i_rn",
+    "llvm.nvvm.d2i.rp" => "__nvvm_d2i_rp",
+    "llvm.nvvm.d2i.rz" => "__nvvm_d2i_rz",
+    "llvm.nvvm.d2ll.rm" => "__nvvm_d2ll_rm",
+    "llvm.nvvm.d2ll.rn" => "__nvvm_d2ll_rn",
+    "llvm.nvvm.d2ll.rp" => "__nvvm_d2ll_rp",
+    "llvm.nvvm.d2ll.rz" => "__nvvm_d2ll_rz",
+    "llvm.nvvm.d2ui.rm" => "__nvvm_d2ui_rm",
+    "llvm.nvvm.d2ui.rn" => "__nvvm_d2ui_rn",
+    "llvm.nvvm.d2ui.rp" => "__nvvm_d2ui_rp",
+    "llvm.nvvm.d2ui.rz" => "__nvvm_d2ui_rz",
+    "llvm.nvvm.d2ull.rm" => "__nvvm_d2ull_rm",
+    "llvm.nvvm.d2ull.rn" => "__nvvm_d2ull_rn",
+    "llvm.nvvm.d2ull.rp" => "__nvvm_d2ull_rp",
+    "llvm.nvvm.d2ull.rz" => "__nvvm_d2ull_rz",
+    "llvm.nvvm.div.approx.f" => "__nvvm_div_approx_f",
+    "llvm.nvvm.div.approx.ftz.f" => "__nvvm_div_approx_ftz_f",
+    "llvm.nvvm.div.rm.d" => "__nvvm_div_rm_d",
+    "llvm.nvvm.div.rm.f" => "__nvvm_div_rm_f",
+    "llvm.nvvm.div.rm.ftz.f" => "__nvvm_div_rm_ftz_f",
+    "llvm.nvvm.div.rn.d" => "__nvvm_div_rn_d",
+    "llvm.nvvm.div.rn.f" => "__nvvm_div_rn_f",
+    "llvm.nvvm.div.rn.ftz.f" => "__nvvm_div_rn_ftz_f",
+    "llvm.nvvm.div.rp.d" => "__nvvm_div_rp_d",
+    "llvm.nvvm.div.rp.f" => "__nvvm_div_rp_f",
+    "llvm.nvvm.div.rp.ftz.f" => "__nvvm_div_rp_ftz_f",
+    "llvm.nvvm.div.rz.d" => "__nvvm_div_rz_d",
+    "llvm.nvvm.div.rz.f" => "__nvvm_div_rz_f",
+    "llvm.nvvm.div.rz.ftz.f" => "__nvvm_div_rz_ftz_f",
+    "llvm.nvvm.ex2.approx.d" => "__nvvm_ex2_approx_d",
+    "llvm.nvvm.ex2.approx.f" => "__nvvm_ex2_approx_f",
+    "llvm.nvvm.ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f",
+    "llvm.nvvm.f2h.rn" => "__nvvm_f2h_rn",
+    "llvm.nvvm.f2h.rn.ftz" => "__nvvm_f2h_rn_ftz",
+    "llvm.nvvm.f2i.rm" => "__nvvm_f2i_rm",
+    "llvm.nvvm.f2i.rm.ftz" => "__nvvm_f2i_rm_ftz",
+    "llvm.nvvm.f2i.rn" => "__nvvm_f2i_rn",
+    "llvm.nvvm.f2i.rn.ftz" => "__nvvm_f2i_rn_ftz",
+    "llvm.nvvm.f2i.rp" => "__nvvm_f2i_rp",
+    "llvm.nvvm.f2i.rp.ftz" => "__nvvm_f2i_rp_ftz",
+    "llvm.nvvm.f2i.rz" => "__nvvm_f2i_rz",
+    "llvm.nvvm.f2i.rz.ftz" => "__nvvm_f2i_rz_ftz",
+    "llvm.nvvm.f2ll.rm" => "__nvvm_f2ll_rm",
+    "llvm.nvvm.f2ll.rm.ftz" => "__nvvm_f2ll_rm_ftz",
+    "llvm.nvvm.f2ll.rn" => "__nvvm_f2ll_rn",
+    "llvm.nvvm.f2ll.rn.ftz" => "__nvvm_f2ll_rn_ftz",
+    "llvm.nvvm.f2ll.rp" => "__nvvm_f2ll_rp",
+    "llvm.nvvm.f2ll.rp.ftz" => "__nvvm_f2ll_rp_ftz",
+    "llvm.nvvm.f2ll.rz" => "__nvvm_f2ll_rz",
+    "llvm.nvvm.f2ll.rz.ftz" => "__nvvm_f2ll_rz_ftz",
+    "llvm.nvvm.f2ui.rm" => "__nvvm_f2ui_rm",
+    "llvm.nvvm.f2ui.rm.ftz" => "__nvvm_f2ui_rm_ftz",
+    "llvm.nvvm.f2ui.rn" => "__nvvm_f2ui_rn",
+    "llvm.nvvm.f2ui.rn.ftz" => "__nvvm_f2ui_rn_ftz",
+    "llvm.nvvm.f2ui.rp" => "__nvvm_f2ui_rp",
+    "llvm.nvvm.f2ui.rp.ftz" => "__nvvm_f2ui_rp_ftz",
+    "llvm.nvvm.f2ui.rz" => "__nvvm_f2ui_rz",
+    "llvm.nvvm.f2ui.rz.ftz" => "__nvvm_f2ui_rz_ftz",
+    "llvm.nvvm.f2ull.rm" => "__nvvm_f2ull_rm",
+    "llvm.nvvm.f2ull.rm.ftz" => "__nvvm_f2ull_rm_ftz",
+    "llvm.nvvm.f2ull.rn" => "__nvvm_f2ull_rn",
+    "llvm.nvvm.f2ull.rn.ftz" => "__nvvm_f2ull_rn_ftz",
+    "llvm.nvvm.f2ull.rp" => "__nvvm_f2ull_rp",
+    "llvm.nvvm.f2ull.rp.ftz" => "__nvvm_f2ull_rp_ftz",
+    "llvm.nvvm.f2ull.rz" => "__nvvm_f2ull_rz",
+    "llvm.nvvm.f2ull.rz.ftz" => "__nvvm_f2ull_rz_ftz",
+    "llvm.nvvm.fabs.d" => "__nvvm_fabs_d",
+    "llvm.nvvm.fabs.f" => "__nvvm_fabs_f",
+    "llvm.nvvm.fabs.ftz.f" => "__nvvm_fabs_ftz_f",
+    "llvm.nvvm.floor.d" => "__nvvm_floor_d",
+    "llvm.nvvm.floor.f" => "__nvvm_floor_f",
+    "llvm.nvvm.floor.ftz.f" => "__nvvm_floor_ftz_f",
+    "llvm.nvvm.fma.rm.d" => "__nvvm_fma_rm_d",
+    "llvm.nvvm.fma.rm.f" => "__nvvm_fma_rm_f",
+    "llvm.nvvm.fma.rm.ftz.f" => "__nvvm_fma_rm_ftz_f",
+    "llvm.nvvm.fma.rn.d" => "__nvvm_fma_rn_d",
+    "llvm.nvvm.fma.rn.f" => "__nvvm_fma_rn_f",
+    "llvm.nvvm.fma.rn.ftz.f" => "__nvvm_fma_rn_ftz_f",
+    "llvm.nvvm.fma.rp.d" => "__nvvm_fma_rp_d",
+    "llvm.nvvm.fma.rp.f" => "__nvvm_fma_rp_f",
+    "llvm.nvvm.fma.rp.ftz.f" => "__nvvm_fma_rp_ftz_f",
+    "llvm.nvvm.fma.rz.d" => "__nvvm_fma_rz_d",
+    "llvm.nvvm.fma.rz.f" => "__nvvm_fma_rz_f",
+    "llvm.nvvm.fma.rz.ftz.f" => "__nvvm_fma_rz_ftz_f",
+    "llvm.nvvm.fmax.d" => "__nvvm_fmax_d",
+    "llvm.nvvm.fmax.f" => "__nvvm_fmax_f",
+    "llvm.nvvm.fmax.ftz.f" => "__nvvm_fmax_ftz_f",
+    "llvm.nvvm.fmin.d" => "__nvvm_fmin_d",
+    "llvm.nvvm.fmin.f" => "__nvvm_fmin_f",
+    "llvm.nvvm.fmin.ftz.f" => "__nvvm_fmin_ftz_f",
+    "llvm.nvvm.h2f" => "__nvvm_h2f",
+    "llvm.nvvm.i2d.rm" => "__nvvm_i2d_rm",
+    "llvm.nvvm.i2d.rn" => "__nvvm_i2d_rn",
+    "llvm.nvvm.i2d.rp" => "__nvvm_i2d_rp",
+    "llvm.nvvm.i2d.rz" => "__nvvm_i2d_rz",
+    "llvm.nvvm.i2f.rm" => "__nvvm_i2f_rm",
+    "llvm.nvvm.i2f.rn" => "__nvvm_i2f_rn",
+    "llvm.nvvm.i2f.rp" => "__nvvm_i2f_rp",
+    "llvm.nvvm.i2f.rz" => "__nvvm_i2f_rz",
+    "llvm.nvvm.isspacep.const" => "__nvvm_isspacep_const",
+    "llvm.nvvm.isspacep.global" => "__nvvm_isspacep_global",
+    "llvm.nvvm.isspacep.local" => "__nvvm_isspacep_local",
+    "llvm.nvvm.isspacep.shared" => "__nvvm_isspacep_shared",
+    "llvm.nvvm.istypep.sampler" => "__nvvm_istypep_sampler",
+    "llvm.nvvm.istypep.surface" => "__nvvm_istypep_surface",
+    "llvm.nvvm.istypep.texture" => "__nvvm_istypep_texture",
+    "llvm.nvvm.lg2.approx.d" => "__nvvm_lg2_approx_d",
+    "llvm.nvvm.lg2.approx.f" => "__nvvm_lg2_approx_f",
+    "llvm.nvvm.lg2.approx.ftz.f" => "__nvvm_lg2_approx_ftz_f",
+    "llvm.nvvm.ll2d.rm" => "__nvvm_ll2d_rm",
+    "llvm.nvvm.ll2d.rn" => "__nvvm_ll2d_rn",
+    "llvm.nvvm.ll2d.rp" => "__nvvm_ll2d_rp",
+    "llvm.nvvm.ll2d.rz" => "__nvvm_ll2d_rz",
+    "llvm.nvvm.ll2f.rm" => "__nvvm_ll2f_rm",
+    "llvm.nvvm.ll2f.rn" => "__nvvm_ll2f_rn",
+    "llvm.nvvm.ll2f.rp" => "__nvvm_ll2f_rp",
+    "llvm.nvvm.ll2f.rz" => "__nvvm_ll2f_rz",
+    "llvm.nvvm.lohi.i2d" => "__nvvm_lohi_i2d",
+    "llvm.nvvm.max.i" => "__nvvm_max_i",
+    "llvm.nvvm.max.ll" => "__nvvm_max_ll",
+    "llvm.nvvm.max.ui" => "__nvvm_max_ui",
+    "llvm.nvvm.max.ull" => "__nvvm_max_ull",
+    "llvm.nvvm.membar.cta" => "__nvvm_membar_cta",
+    "llvm.nvvm.membar.gl" => "__nvvm_membar_gl",
+    "llvm.nvvm.membar.sys" => "__nvvm_membar_sys",
+    "llvm.nvvm.min.i" => "__nvvm_min_i",
+    "llvm.nvvm.min.ll" => "__nvvm_min_ll",
+    "llvm.nvvm.min.ui" => "__nvvm_min_ui",
+    "llvm.nvvm.min.ull" => "__nvvm_min_ull",
+    "llvm.nvvm.mul.rm.d" => "__nvvm_mul_rm_d",
+    "llvm.nvvm.mul.rm.f" => "__nvvm_mul_rm_f",
+    "llvm.nvvm.mul.rm.ftz.f" => "__nvvm_mul_rm_ftz_f",
+    "llvm.nvvm.mul.rn.d" => "__nvvm_mul_rn_d",
+    "llvm.nvvm.mul.rn.f" => "__nvvm_mul_rn_f",
+    "llvm.nvvm.mul.rn.ftz.f" => "__nvvm_mul_rn_ftz_f",
+    "llvm.nvvm.mul.rp.d" => "__nvvm_mul_rp_d",
+    "llvm.nvvm.mul.rp.f" => "__nvvm_mul_rp_f",
+    "llvm.nvvm.mul.rp.ftz.f" => "__nvvm_mul_rp_ftz_f",
+    "llvm.nvvm.mul.rz.d" => "__nvvm_mul_rz_d",
+    "llvm.nvvm.mul.rz.f" => "__nvvm_mul_rz_f",
+    "llvm.nvvm.mul.rz.ftz.f" => "__nvvm_mul_rz_ftz_f",
+    "llvm.nvvm.mul24.i" => "__nvvm_mul24_i",
+    "llvm.nvvm.mul24.ui" => "__nvvm_mul24_ui",
+    "llvm.nvvm.mulhi.i" => "__nvvm_mulhi_i",
+    "llvm.nvvm.mulhi.ll" => "__nvvm_mulhi_ll",
+    "llvm.nvvm.mulhi.ui" => "__nvvm_mulhi_ui",
+    "llvm.nvvm.mulhi.ull" => "__nvvm_mulhi_ull",
+    "llvm.nvvm.popc.i" => "__nvvm_popc_i",
+    "llvm.nvvm.popc.ll" => "__nvvm_popc_ll",
+    "llvm.nvvm.prmt" => "__nvvm_prmt",
+    "llvm.nvvm.rcp.approx.ftz.d" => "__nvvm_rcp_approx_ftz_d",
+    "llvm.nvvm.rcp.rm.d" => "__nvvm_rcp_rm_d",
+    "llvm.nvvm.rcp.rm.f" => "__nvvm_rcp_rm_f",
+    "llvm.nvvm.rcp.rm.ftz.f" => "__nvvm_rcp_rm_ftz_f",
+    "llvm.nvvm.rcp.rn.d" => "__nvvm_rcp_rn_d",
+    "llvm.nvvm.rcp.rn.f" => "__nvvm_rcp_rn_f",
+    "llvm.nvvm.rcp.rn.ftz.f" => "__nvvm_rcp_rn_ftz_f",
+    "llvm.nvvm.rcp.rp.d" => "__nvvm_rcp_rp_d",
+    "llvm.nvvm.rcp.rp.f" => "__nvvm_rcp_rp_f",
+    "llvm.nvvm.rcp.rp.ftz.f" => "__nvvm_rcp_rp_ftz_f",
+    "llvm.nvvm.rcp.rz.d" => "__nvvm_rcp_rz_d",
+    "llvm.nvvm.rcp.rz.f" => "__nvvm_rcp_rz_f",
+    "llvm.nvvm.rcp.rz.ftz.f" => "__nvvm_rcp_rz_ftz_f",
+    "llvm.nvvm.read.ptx.sreg.ctaid.x" => "__nvvm_read_ptx_sreg_ctaid_x",
+    "llvm.nvvm.read.ptx.sreg.ctaid.y" => "__nvvm_read_ptx_sreg_ctaid_y",
+    "llvm.nvvm.read.ptx.sreg.ctaid.z" => "__nvvm_read_ptx_sreg_ctaid_z",
+    "llvm.nvvm.read.ptx.sreg.envreg0" => "__nvvm_read_ptx_sreg_envreg0",
+    "llvm.nvvm.read.ptx.sreg.envreg1" => "__nvvm_read_ptx_sreg_envreg1",
+    "llvm.nvvm.read.ptx.sreg.envreg10" => "__nvvm_read_ptx_sreg_envreg10",
+    "llvm.nvvm.read.ptx.sreg.envreg11" => "__nvvm_read_ptx_sreg_envreg11",
+    "llvm.nvvm.read.ptx.sreg.envreg12" => "__nvvm_read_ptx_sreg_envreg12",
+    "llvm.nvvm.read.ptx.sreg.envreg13" => "__nvvm_read_ptx_sreg_envreg13",
+    "llvm.nvvm.read.ptx.sreg.envreg14" => "__nvvm_read_ptx_sreg_envreg14",
+    "llvm.nvvm.read.ptx.sreg.envreg15" => "__nvvm_read_ptx_sreg_envreg15",
+    "llvm.nvvm.read.ptx.sreg.envreg16" => "__nvvm_read_ptx_sreg_envreg16",
+    "llvm.nvvm.read.ptx.sreg.envreg17" => "__nvvm_read_ptx_sreg_envreg17",
+    "llvm.nvvm.read.ptx.sreg.envreg18" => "__nvvm_read_ptx_sreg_envreg18",
+    "llvm.nvvm.read.ptx.sreg.envreg19" => "__nvvm_read_ptx_sreg_envreg19",
+    "llvm.nvvm.read.ptx.sreg.envreg2" => "__nvvm_read_ptx_sreg_envreg2",
+    "llvm.nvvm.read.ptx.sreg.envreg20" => "__nvvm_read_ptx_sreg_envreg20",
+    "llvm.nvvm.read.ptx.sreg.envreg21" => "__nvvm_read_ptx_sreg_envreg21",
+    "llvm.nvvm.read.ptx.sreg.envreg22" => "__nvvm_read_ptx_sreg_envreg22",
+    "llvm.nvvm.read.ptx.sreg.envreg23" => "__nvvm_read_ptx_sreg_envreg23",
+    "llvm.nvvm.read.ptx.sreg.envreg24" => "__nvvm_read_ptx_sreg_envreg24",
+    "llvm.nvvm.read.ptx.sreg.envreg25" => "__nvvm_read_ptx_sreg_envreg25",
+    "llvm.nvvm.read.ptx.sreg.envreg26" => "__nvvm_read_ptx_sreg_envreg26",
+    "llvm.nvvm.read.ptx.sreg.envreg27" => "__nvvm_read_ptx_sreg_envreg27",
+    "llvm.nvvm.read.ptx.sreg.envreg28" => "__nvvm_read_ptx_sreg_envreg28",
+    "llvm.nvvm.read.ptx.sreg.envreg29" => "__nvvm_read_ptx_sreg_envreg29",
+    "llvm.nvvm.read.ptx.sreg.envreg3" => "__nvvm_read_ptx_sreg_envreg3",
+    "llvm.nvvm.read.ptx.sreg.envreg30" => "__nvvm_read_ptx_sreg_envreg30",
+    "llvm.nvvm.read.ptx.sreg.envreg31" => "__nvvm_read_ptx_sreg_envreg31",
+    "llvm.nvvm.read.ptx.sreg.envreg4" => "__nvvm_read_ptx_sreg_envreg4",
+    "llvm.nvvm.read.ptx.sreg.envreg5" => "__nvvm_read_ptx_sreg_envreg5",
+    "llvm.nvvm.read.ptx.sreg.envreg6" => "__nvvm_read_ptx_sreg_envreg6",
+    "llvm.nvvm.read.ptx.sreg.envreg7" => "__nvvm_read_ptx_sreg_envreg7",
+    "llvm.nvvm.read.ptx.sreg.envreg8" => "__nvvm_read_ptx_sreg_envreg8",
+    "llvm.nvvm.read.ptx.sreg.envreg9" => "__nvvm_read_ptx_sreg_envreg9",
+    "llvm.nvvm.read.ptx.sreg.nctaid.x" => "__nvvm_read_ptx_sreg_nctaid_x",
+    "llvm.nvvm.read.ptx.sreg.nctaid.y" => "__nvvm_read_ptx_sreg_nctaid_y",
+    "llvm.nvvm.read.ptx.sreg.nctaid.z" => "__nvvm_read_ptx_sreg_nctaid_z",
+    "llvm.nvvm.read.ptx.sreg.ntid.x" => "__nvvm_read_ptx_sreg_ntid_x",
+    "llvm.nvvm.read.ptx.sreg.ntid.y" => "__nvvm_read_ptx_sreg_ntid_y",
+    "llvm.nvvm.read.ptx.sreg.ntid.z" => "__nvvm_read_ptx_sreg_ntid_z",
+    "llvm.nvvm.read.ptx.sreg.tid.x" => "__nvvm_read_ptx_sreg_tid_x",
+    "llvm.nvvm.read.ptx.sreg.tid.y" => "__nvvm_read_ptx_sreg_tid_y",
+    "llvm.nvvm.read.ptx.sreg.tid.z" => "__nvvm_read_ptx_sreg_tid_z",
+    "llvm.nvvm.read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_warpsize",
+    "llvm.nvvm.rotate.b32" => "__nvvm_rotate_b32",
+    "llvm.nvvm.rotate.b64" => "__nvvm_rotate_b64",
+    "llvm.nvvm.rotate.right.b64" => "__nvvm_rotate_right_b64",
+    "llvm.nvvm.round.d" => "__nvvm_round_d",
+    "llvm.nvvm.round.f" => "__nvvm_round_f",
+    "llvm.nvvm.round.ftz.f" => "__nvvm_round_ftz_f",
+    "llvm.nvvm.rsqrt.approx.d" => "__nvvm_rsqrt_approx_d",
+    "llvm.nvvm.rsqrt.approx.f" => "__nvvm_rsqrt_approx_f",
+    "llvm.nvvm.rsqrt.approx.ftz.f" => "__nvvm_rsqrt_approx_ftz_f",
+    "llvm.nvvm.sad.i" => "__nvvm_sad_i",
+    "llvm.nvvm.sad.ui" => "__nvvm_sad_ui",
+    "llvm.nvvm.saturate.d" => "__nvvm_saturate_d",
+    "llvm.nvvm.saturate.f" => "__nvvm_saturate_f",
+    "llvm.nvvm.saturate.ftz.f" => "__nvvm_saturate_ftz_f",
+    "llvm.nvvm.sin.approx.f" => "__nvvm_sin_approx_f",
+    "llvm.nvvm.sin.approx.ftz.f" => "__nvvm_sin_approx_ftz_f",
+    "llvm.nvvm.sqrt.approx.f" => "__nvvm_sqrt_approx_f",
+    "llvm.nvvm.sqrt.approx.ftz.f" => "__nvvm_sqrt_approx_ftz_f",
+    "llvm.nvvm.sqrt.f" => "__nvvm_sqrt_f",
+    "llvm.nvvm.sqrt.rm.d" => "__nvvm_sqrt_rm_d",
+    "llvm.nvvm.sqrt.rm.f" => "__nvvm_sqrt_rm_f",
+    "llvm.nvvm.sqrt.rm.ftz.f" => "__nvvm_sqrt_rm_ftz_f",
+    "llvm.nvvm.sqrt.rn.d" => "__nvvm_sqrt_rn_d",
+    "llvm.nvvm.sqrt.rn.f" => "__nvvm_sqrt_rn_f",
+    "llvm.nvvm.sqrt.rn.ftz.f" => "__nvvm_sqrt_rn_ftz_f",
+    "llvm.nvvm.sqrt.rp.d" => "__nvvm_sqrt_rp_d",
+    "llvm.nvvm.sqrt.rp.f" => "__nvvm_sqrt_rp_f",
+    "llvm.nvvm.sqrt.rp.ftz.f" => "__nvvm_sqrt_rp_ftz_f",
+    "llvm.nvvm.sqrt.rz.d" => "__nvvm_sqrt_rz_d",
+    "llvm.nvvm.sqrt.rz.f" => "__nvvm_sqrt_rz_f",
+    "llvm.nvvm.sqrt.rz.ftz.f" => "__nvvm_sqrt_rz_ftz_f",
+    "llvm.nvvm.suq.array.size" => "__nvvm_suq_array_size",
+    "llvm.nvvm.suq.channel.data.type" => "__nvvm_suq_channel_data_type",
+    "llvm.nvvm.suq.channel.order" => "__nvvm_suq_channel_order",
+    "llvm.nvvm.suq.depth" => "__nvvm_suq_depth",
+    "llvm.nvvm.suq.height" => "__nvvm_suq_height",
+    "llvm.nvvm.suq.width" => "__nvvm_suq_width",
+    "llvm.nvvm.sust.b.1d.array.i16.clamp" => "__nvvm_sust_b_1d_array_i16_clamp",
+    "llvm.nvvm.sust.b.1d.array.i16.trap" => "__nvvm_sust_b_1d_array_i16_trap",
+    "llvm.nvvm.sust.b.1d.array.i16.zero" => "__nvvm_sust_b_1d_array_i16_zero",
+    "llvm.nvvm.sust.b.1d.array.i32.clamp" => "__nvvm_sust_b_1d_array_i32_clamp",
+    "llvm.nvvm.sust.b.1d.array.i32.trap" => "__nvvm_sust_b_1d_array_i32_trap",
+    "llvm.nvvm.sust.b.1d.array.i32.zero" => "__nvvm_sust_b_1d_array_i32_zero",
+    "llvm.nvvm.sust.b.1d.array.i64.clamp" => "__nvvm_sust_b_1d_array_i64_clamp",
+    "llvm.nvvm.sust.b.1d.array.i64.trap" => "__nvvm_sust_b_1d_array_i64_trap",
+    "llvm.nvvm.sust.b.1d.array.i64.zero" => "__nvvm_sust_b_1d_array_i64_zero",
+    "llvm.nvvm.sust.b.1d.array.i8.clamp" => "__nvvm_sust_b_1d_array_i8_clamp",
+    "llvm.nvvm.sust.b.1d.array.i8.trap" => "__nvvm_sust_b_1d_array_i8_trap",
+    "llvm.nvvm.sust.b.1d.array.i8.zero" => "__nvvm_sust_b_1d_array_i8_zero",
+    "llvm.nvvm.sust.b.1d.array.v2i16.clamp" => "__nvvm_sust_b_1d_array_v2i16_clamp",
+    "llvm.nvvm.sust.b.1d.array.v2i16.trap" => "__nvvm_sust_b_1d_array_v2i16_trap",
+    "llvm.nvvm.sust.b.1d.array.v2i16.zero" => "__nvvm_sust_b_1d_array_v2i16_zero",
+    "llvm.nvvm.sust.b.1d.array.v2i32.clamp" => "__nvvm_sust_b_1d_array_v2i32_clamp",
+    "llvm.nvvm.sust.b.1d.array.v2i32.trap" => "__nvvm_sust_b_1d_array_v2i32_trap",
+    "llvm.nvvm.sust.b.1d.array.v2i32.zero" => "__nvvm_sust_b_1d_array_v2i32_zero",
+    "llvm.nvvm.sust.b.1d.array.v2i64.clamp" => "__nvvm_sust_b_1d_array_v2i64_clamp",
+    "llvm.nvvm.sust.b.1d.array.v2i64.trap" => "__nvvm_sust_b_1d_array_v2i64_trap",
+    "llvm.nvvm.sust.b.1d.array.v2i64.zero" => "__nvvm_sust_b_1d_array_v2i64_zero",
+    "llvm.nvvm.sust.b.1d.array.v2i8.clamp" => "__nvvm_sust_b_1d_array_v2i8_clamp",
+    "llvm.nvvm.sust.b.1d.array.v2i8.trap" => "__nvvm_sust_b_1d_array_v2i8_trap",
+    "llvm.nvvm.sust.b.1d.array.v2i8.zero" => "__nvvm_sust_b_1d_array_v2i8_zero",
+    "llvm.nvvm.sust.b.1d.array.v4i16.clamp" => "__nvvm_sust_b_1d_array_v4i16_clamp",
+    "llvm.nvvm.sust.b.1d.array.v4i16.trap" => "__nvvm_sust_b_1d_array_v4i16_trap",
+    "llvm.nvvm.sust.b.1d.array.v4i16.zero" => "__nvvm_sust_b_1d_array_v4i16_zero",
+    "llvm.nvvm.sust.b.1d.array.v4i32.clamp" => "__nvvm_sust_b_1d_array_v4i32_clamp",
+    "llvm.nvvm.sust.b.1d.array.v4i32.trap" => "__nvvm_sust_b_1d_array_v4i32_trap",
+    "llvm.nvvm.sust.b.1d.array.v4i32.zero" => "__nvvm_sust_b_1d_array_v4i32_zero",
+    "llvm.nvvm.sust.b.1d.array.v4i8.clamp" => "__nvvm_sust_b_1d_array_v4i8_clamp",
+    "llvm.nvvm.sust.b.1d.array.v4i8.trap" => "__nvvm_sust_b_1d_array_v4i8_trap",
+    "llvm.nvvm.sust.b.1d.array.v4i8.zero" => "__nvvm_sust_b_1d_array_v4i8_zero",
+    "llvm.nvvm.sust.b.1d.i16.clamp" => "__nvvm_sust_b_1d_i16_clamp",
+    "llvm.nvvm.sust.b.1d.i16.trap" => "__nvvm_sust_b_1d_i16_trap",
+    "llvm.nvvm.sust.b.1d.i16.zero" => "__nvvm_sust_b_1d_i16_zero",
+    "llvm.nvvm.sust.b.1d.i32.clamp" => "__nvvm_sust_b_1d_i32_clamp",
+    "llvm.nvvm.sust.b.1d.i32.trap" => "__nvvm_sust_b_1d_i32_trap",
+    "llvm.nvvm.sust.b.1d.i32.zero" => "__nvvm_sust_b_1d_i32_zero",
+    "llvm.nvvm.sust.b.1d.i64.clamp" => "__nvvm_sust_b_1d_i64_clamp",
+    "llvm.nvvm.sust.b.1d.i64.trap" => "__nvvm_sust_b_1d_i64_trap",
+    "llvm.nvvm.sust.b.1d.i64.zero" => "__nvvm_sust_b_1d_i64_zero",
+    "llvm.nvvm.sust.b.1d.i8.clamp" => "__nvvm_sust_b_1d_i8_clamp",
+    "llvm.nvvm.sust.b.1d.i8.trap" => "__nvvm_sust_b_1d_i8_trap",
+    "llvm.nvvm.sust.b.1d.i8.zero" => "__nvvm_sust_b_1d_i8_zero",
+    "llvm.nvvm.sust.b.1d.v2i16.clamp" => "__nvvm_sust_b_1d_v2i16_clamp",
+    "llvm.nvvm.sust.b.1d.v2i16.trap" => "__nvvm_sust_b_1d_v2i16_trap",
+    "llvm.nvvm.sust.b.1d.v2i16.zero" => "__nvvm_sust_b_1d_v2i16_zero",
+    "llvm.nvvm.sust.b.1d.v2i32.clamp" => "__nvvm_sust_b_1d_v2i32_clamp",
+    "llvm.nvvm.sust.b.1d.v2i32.trap" => "__nvvm_sust_b_1d_v2i32_trap",
+    "llvm.nvvm.sust.b.1d.v2i32.zero" => "__nvvm_sust_b_1d_v2i32_zero",
+    "llvm.nvvm.sust.b.1d.v2i64.clamp" => "__nvvm_sust_b_1d_v2i64_clamp",
+    "llvm.nvvm.sust.b.1d.v2i64.trap" => "__nvvm_sust_b_1d_v2i64_trap",
+    "llvm.nvvm.sust.b.1d.v2i64.zero" => "__nvvm_sust_b_1d_v2i64_zero",
+    "llvm.nvvm.sust.b.1d.v2i8.clamp" => "__nvvm_sust_b_1d_v2i8_clamp",
+    "llvm.nvvm.sust.b.1d.v2i8.trap" => "__nvvm_sust_b_1d_v2i8_trap",
+    "llvm.nvvm.sust.b.1d.v2i8.zero" => "__nvvm_sust_b_1d_v2i8_zero",
+    "llvm.nvvm.sust.b.1d.v4i16.clamp" => "__nvvm_sust_b_1d_v4i16_clamp",
+    "llvm.nvvm.sust.b.1d.v4i16.trap" => "__nvvm_sust_b_1d_v4i16_trap",
+    "llvm.nvvm.sust.b.1d.v4i16.zero" => "__nvvm_sust_b_1d_v4i16_zero",
+    "llvm.nvvm.sust.b.1d.v4i32.clamp" => "__nvvm_sust_b_1d_v4i32_clamp",
+    "llvm.nvvm.sust.b.1d.v4i32.trap" => "__nvvm_sust_b_1d_v4i32_trap",
+    "llvm.nvvm.sust.b.1d.v4i32.zero" => "__nvvm_sust_b_1d_v4i32_zero",
+    "llvm.nvvm.sust.b.1d.v4i8.clamp" => "__nvvm_sust_b_1d_v4i8_clamp",
+    "llvm.nvvm.sust.b.1d.v4i8.trap" => "__nvvm_sust_b_1d_v4i8_trap",
+    "llvm.nvvm.sust.b.1d.v4i8.zero" => "__nvvm_sust_b_1d_v4i8_zero",
+    "llvm.nvvm.sust.b.2d.array.i16.clamp" => "__nvvm_sust_b_2d_array_i16_clamp",
+    "llvm.nvvm.sust.b.2d.array.i16.trap" => "__nvvm_sust_b_2d_array_i16_trap",
+    "llvm.nvvm.sust.b.2d.array.i16.zero" => "__nvvm_sust_b_2d_array_i16_zero",
+    "llvm.nvvm.sust.b.2d.array.i32.clamp" => "__nvvm_sust_b_2d_array_i32_clamp",
+    "llvm.nvvm.sust.b.2d.array.i32.trap" => "__nvvm_sust_b_2d_array_i32_trap",
+    "llvm.nvvm.sust.b.2d.array.i32.zero" => "__nvvm_sust_b_2d_array_i32_zero",
+    "llvm.nvvm.sust.b.2d.array.i64.clamp" => "__nvvm_sust_b_2d_array_i64_clamp",
+    "llvm.nvvm.sust.b.2d.array.i64.trap" => "__nvvm_sust_b_2d_array_i64_trap",
+    "llvm.nvvm.sust.b.2d.array.i64.zero" => "__nvvm_sust_b_2d_array_i64_zero",
+    "llvm.nvvm.sust.b.2d.array.i8.clamp" => "__nvvm_sust_b_2d_array_i8_clamp",
+    "llvm.nvvm.sust.b.2d.array.i8.trap" => "__nvvm_sust_b_2d_array_i8_trap",
+    "llvm.nvvm.sust.b.2d.array.i8.zero" => "__nvvm_sust_b_2d_array_i8_zero",
+    "llvm.nvvm.sust.b.2d.array.v2i16.clamp" => "__nvvm_sust_b_2d_array_v2i16_clamp",
+    "llvm.nvvm.sust.b.2d.array.v2i16.trap" => "__nvvm_sust_b_2d_array_v2i16_trap",
+    "llvm.nvvm.sust.b.2d.array.v2i16.zero" => "__nvvm_sust_b_2d_array_v2i16_zero",
+    "llvm.nvvm.sust.b.2d.array.v2i32.clamp" => "__nvvm_sust_b_2d_array_v2i32_clamp",
+    "llvm.nvvm.sust.b.2d.array.v2i32.trap" => "__nvvm_sust_b_2d_array_v2i32_trap",
+    "llvm.nvvm.sust.b.2d.array.v2i32.zero" => "__nvvm_sust_b_2d_array_v2i32_zero",
+    "llvm.nvvm.sust.b.2d.array.v2i64.clamp" => "__nvvm_sust_b_2d_array_v2i64_clamp",
+    "llvm.nvvm.sust.b.2d.array.v2i64.trap" => "__nvvm_sust_b_2d_array_v2i64_trap",
+    "llvm.nvvm.sust.b.2d.array.v2i64.zero" => "__nvvm_sust_b_2d_array_v2i64_zero",
+    "llvm.nvvm.sust.b.2d.array.v2i8.clamp" => "__nvvm_sust_b_2d_array_v2i8_clamp",
+    "llvm.nvvm.sust.b.2d.array.v2i8.trap" => "__nvvm_sust_b_2d_array_v2i8_trap",
+    "llvm.nvvm.sust.b.2d.array.v2i8.zero" => "__nvvm_sust_b_2d_array_v2i8_zero",
+    "llvm.nvvm.sust.b.2d.array.v4i16.clamp" => "__nvvm_sust_b_2d_array_v4i16_clamp",
+    "llvm.nvvm.sust.b.2d.array.v4i16.trap" => "__nvvm_sust_b_2d_array_v4i16_trap",
+    "llvm.nvvm.sust.b.2d.array.v4i16.zero" => "__nvvm_sust_b_2d_array_v4i16_zero",
+    "llvm.nvvm.sust.b.2d.array.v4i32.clamp" => "__nvvm_sust_b_2d_array_v4i32_clamp",
+    "llvm.nvvm.sust.b.2d.array.v4i32.trap" => "__nvvm_sust_b_2d_array_v4i32_trap",
+    "llvm.nvvm.sust.b.2d.array.v4i32.zero" => "__nvvm_sust_b_2d_array_v4i32_zero",
+    "llvm.nvvm.sust.b.2d.array.v4i8.clamp" => "__nvvm_sust_b_2d_array_v4i8_clamp",
+    "llvm.nvvm.sust.b.2d.array.v4i8.trap" => "__nvvm_sust_b_2d_array_v4i8_trap",
+    "llvm.nvvm.sust.b.2d.array.v4i8.zero" => "__nvvm_sust_b_2d_array_v4i8_zero",
+    "llvm.nvvm.sust.b.2d.i16.clamp" => "__nvvm_sust_b_2d_i16_clamp",
+    "llvm.nvvm.sust.b.2d.i16.trap" => "__nvvm_sust_b_2d_i16_trap",
+    "llvm.nvvm.sust.b.2d.i16.zero" => "__nvvm_sust_b_2d_i16_zero",
+    "llvm.nvvm.sust.b.2d.i32.clamp" => "__nvvm_sust_b_2d_i32_clamp",
+    "llvm.nvvm.sust.b.2d.i32.trap" => "__nvvm_sust_b_2d_i32_trap",
+    "llvm.nvvm.sust.b.2d.i32.zero" => "__nvvm_sust_b_2d_i32_zero",
+    "llvm.nvvm.sust.b.2d.i64.clamp" => "__nvvm_sust_b_2d_i64_clamp",
+    "llvm.nvvm.sust.b.2d.i64.trap" => "__nvvm_sust_b_2d_i64_trap",
+    "llvm.nvvm.sust.b.2d.i64.zero" => "__nvvm_sust_b_2d_i64_zero",
+    "llvm.nvvm.sust.b.2d.i8.clamp" => "__nvvm_sust_b_2d_i8_clamp",
+    "llvm.nvvm.sust.b.2d.i8.trap" => "__nvvm_sust_b_2d_i8_trap",
+    "llvm.nvvm.sust.b.2d.i8.zero" => "__nvvm_sust_b_2d_i8_zero",
+    "llvm.nvvm.sust.b.2d.v2i16.clamp" => "__nvvm_sust_b_2d_v2i16_clamp",
+    "llvm.nvvm.sust.b.2d.v2i16.trap" => "__nvvm_sust_b_2d_v2i16_trap",
+    "llvm.nvvm.sust.b.2d.v2i16.zero" => "__nvvm_sust_b_2d_v2i16_zero",
+    "llvm.nvvm.sust.b.2d.v2i32.clamp" => "__nvvm_sust_b_2d_v2i32_clamp",
+    "llvm.nvvm.sust.b.2d.v2i32.trap" => "__nvvm_sust_b_2d_v2i32_trap",
+    "llvm.nvvm.sust.b.2d.v2i32.zero" => "__nvvm_sust_b_2d_v2i32_zero",
+    "llvm.nvvm.sust.b.2d.v2i64.clamp" => "__nvvm_sust_b_2d_v2i64_clamp",
+    "llvm.nvvm.sust.b.2d.v2i64.trap" => "__nvvm_sust_b_2d_v2i64_trap",
+    "llvm.nvvm.sust.b.2d.v2i64.zero" => "__nvvm_sust_b_2d_v2i64_zero",
+    "llvm.nvvm.sust.b.2d.v2i8.clamp" => "__nvvm_sust_b_2d_v2i8_clamp",
+    "llvm.nvvm.sust.b.2d.v2i8.trap" => "__nvvm_sust_b_2d_v2i8_trap",
+    "llvm.nvvm.sust.b.2d.v2i8.zero" => "__nvvm_sust_b_2d_v2i8_zero",
+    "llvm.nvvm.sust.b.2d.v4i16.clamp" => "__nvvm_sust_b_2d_v4i16_clamp",
+    "llvm.nvvm.sust.b.2d.v4i16.trap" => "__nvvm_sust_b_2d_v4i16_trap",
+    "llvm.nvvm.sust.b.2d.v4i16.zero" => "__nvvm_sust_b_2d_v4i16_zero",
+    "llvm.nvvm.sust.b.2d.v4i32.clamp" => "__nvvm_sust_b_2d_v4i32_clamp",
+    "llvm.nvvm.sust.b.2d.v4i32.trap" => "__nvvm_sust_b_2d_v4i32_trap",
+    "llvm.nvvm.sust.b.2d.v4i32.zero" => "__nvvm_sust_b_2d_v4i32_zero",
+    "llvm.nvvm.sust.b.2d.v4i8.clamp" => "__nvvm_sust_b_2d_v4i8_clamp",
+    "llvm.nvvm.sust.b.2d.v4i8.trap" => "__nvvm_sust_b_2d_v4i8_trap",
+    "llvm.nvvm.sust.b.2d.v4i8.zero" => "__nvvm_sust_b_2d_v4i8_zero",
+    "llvm.nvvm.sust.b.3d.i16.clamp" => "__nvvm_sust_b_3d_i16_clamp",
+    "llvm.nvvm.sust.b.3d.i16.trap" => "__nvvm_sust_b_3d_i16_trap",
+    "llvm.nvvm.sust.b.3d.i16.zero" => "__nvvm_sust_b_3d_i16_zero",
+    "llvm.nvvm.sust.b.3d.i32.clamp" => "__nvvm_sust_b_3d_i32_clamp",
+    "llvm.nvvm.sust.b.3d.i32.trap" => "__nvvm_sust_b_3d_i32_trap",
+    "llvm.nvvm.sust.b.3d.i32.zero" => "__nvvm_sust_b_3d_i32_zero",
+    "llvm.nvvm.sust.b.3d.i64.clamp" => "__nvvm_sust_b_3d_i64_clamp",
+    "llvm.nvvm.sust.b.3d.i64.trap" => "__nvvm_sust_b_3d_i64_trap",
+    "llvm.nvvm.sust.b.3d.i64.zero" => "__nvvm_sust_b_3d_i64_zero",
+    "llvm.nvvm.sust.b.3d.i8.clamp" => "__nvvm_sust_b_3d_i8_clamp",
+    "llvm.nvvm.sust.b.3d.i8.trap" => "__nvvm_sust_b_3d_i8_trap",
+    "llvm.nvvm.sust.b.3d.i8.zero" => "__nvvm_sust_b_3d_i8_zero",
+    "llvm.nvvm.sust.b.3d.v2i16.clamp" => "__nvvm_sust_b_3d_v2i16_clamp",
+    "llvm.nvvm.sust.b.3d.v2i16.trap" => "__nvvm_sust_b_3d_v2i16_trap",
+    "llvm.nvvm.sust.b.3d.v2i16.zero" => "__nvvm_sust_b_3d_v2i16_zero",
+    "llvm.nvvm.sust.b.3d.v2i32.clamp" => "__nvvm_sust_b_3d_v2i32_clamp",
+    "llvm.nvvm.sust.b.3d.v2i32.trap" => "__nvvm_sust_b_3d_v2i32_trap",
+    "llvm.nvvm.sust.b.3d.v2i32.zero" => "__nvvm_sust_b_3d_v2i32_zero",
+    "llvm.nvvm.sust.b.3d.v2i64.clamp" => "__nvvm_sust_b_3d_v2i64_clamp",
+    "llvm.nvvm.sust.b.3d.v2i64.trap" => "__nvvm_sust_b_3d_v2i64_trap",
+    "llvm.nvvm.sust.b.3d.v2i64.zero" => "__nvvm_sust_b_3d_v2i64_zero",
+    "llvm.nvvm.sust.b.3d.v2i8.clamp" => "__nvvm_sust_b_3d_v2i8_clamp",
+    "llvm.nvvm.sust.b.3d.v2i8.trap" => "__nvvm_sust_b_3d_v2i8_trap",
+    "llvm.nvvm.sust.b.3d.v2i8.zero" => "__nvvm_sust_b_3d_v2i8_zero",
+    "llvm.nvvm.sust.b.3d.v4i16.clamp" => "__nvvm_sust_b_3d_v4i16_clamp",
+    "llvm.nvvm.sust.b.3d.v4i16.trap" => "__nvvm_sust_b_3d_v4i16_trap",
+    "llvm.nvvm.sust.b.3d.v4i16.zero" => "__nvvm_sust_b_3d_v4i16_zero",
+    "llvm.nvvm.sust.b.3d.v4i32.clamp" => "__nvvm_sust_b_3d_v4i32_clamp",
+    "llvm.nvvm.sust.b.3d.v4i32.trap" => "__nvvm_sust_b_3d_v4i32_trap",
+    "llvm.nvvm.sust.b.3d.v4i32.zero" => "__nvvm_sust_b_3d_v4i32_zero",
+    "llvm.nvvm.sust.b.3d.v4i8.clamp" => "__nvvm_sust_b_3d_v4i8_clamp",
+    "llvm.nvvm.sust.b.3d.v4i8.trap" => "__nvvm_sust_b_3d_v4i8_trap",
+    "llvm.nvvm.sust.b.3d.v4i8.zero" => "__nvvm_sust_b_3d_v4i8_zero",
+    "llvm.nvvm.sust.p.1d.array.i16.trap" => "__nvvm_sust_p_1d_array_i16_trap",
+    "llvm.nvvm.sust.p.1d.array.i32.trap" => "__nvvm_sust_p_1d_array_i32_trap",
+    "llvm.nvvm.sust.p.1d.array.i8.trap" => "__nvvm_sust_p_1d_array_i8_trap",
+    "llvm.nvvm.sust.p.1d.array.v2i16.trap" => "__nvvm_sust_p_1d_array_v2i16_trap",
+    "llvm.nvvm.sust.p.1d.array.v2i32.trap" => "__nvvm_sust_p_1d_array_v2i32_trap",
+    "llvm.nvvm.sust.p.1d.array.v2i8.trap" => "__nvvm_sust_p_1d_array_v2i8_trap",
+    "llvm.nvvm.sust.p.1d.array.v4i16.trap" => "__nvvm_sust_p_1d_array_v4i16_trap",
+    "llvm.nvvm.sust.p.1d.array.v4i32.trap" => "__nvvm_sust_p_1d_array_v4i32_trap",
+    "llvm.nvvm.sust.p.1d.array.v4i8.trap" => "__nvvm_sust_p_1d_array_v4i8_trap",
+    "llvm.nvvm.sust.p.1d.i16.trap" => "__nvvm_sust_p_1d_i16_trap",
+    "llvm.nvvm.sust.p.1d.i32.trap" => "__nvvm_sust_p_1d_i32_trap",
+    "llvm.nvvm.sust.p.1d.i8.trap" => "__nvvm_sust_p_1d_i8_trap",
+    "llvm.nvvm.sust.p.1d.v2i16.trap" => "__nvvm_sust_p_1d_v2i16_trap",
+    "llvm.nvvm.sust.p.1d.v2i32.trap" => "__nvvm_sust_p_1d_v2i32_trap",
+    "llvm.nvvm.sust.p.1d.v2i8.trap" => "__nvvm_sust_p_1d_v2i8_trap",
+    "llvm.nvvm.sust.p.1d.v4i16.trap" => "__nvvm_sust_p_1d_v4i16_trap",
+    "llvm.nvvm.sust.p.1d.v4i32.trap" => "__nvvm_sust_p_1d_v4i32_trap",
+    "llvm.nvvm.sust.p.1d.v4i8.trap" => "__nvvm_sust_p_1d_v4i8_trap",
+    "llvm.nvvm.sust.p.2d.array.i16.trap" => "__nvvm_sust_p_2d_array_i16_trap",
+    "llvm.nvvm.sust.p.2d.array.i32.trap" => "__nvvm_sust_p_2d_array_i32_trap",
+    "llvm.nvvm.sust.p.2d.array.i8.trap" => "__nvvm_sust_p_2d_array_i8_trap",
+    "llvm.nvvm.sust.p.2d.array.v2i16.trap" => "__nvvm_sust_p_2d_array_v2i16_trap",
+    "llvm.nvvm.sust.p.2d.array.v2i32.trap" => "__nvvm_sust_p_2d_array_v2i32_trap",
+    "llvm.nvvm.sust.p.2d.array.v2i8.trap" => "__nvvm_sust_p_2d_array_v2i8_trap",
+    "llvm.nvvm.sust.p.2d.array.v4i16.trap" => "__nvvm_sust_p_2d_array_v4i16_trap",
+    "llvm.nvvm.sust.p.2d.array.v4i32.trap" => "__nvvm_sust_p_2d_array_v4i32_trap",
+    "llvm.nvvm.sust.p.2d.array.v4i8.trap" => "__nvvm_sust_p_2d_array_v4i8_trap",
+    "llvm.nvvm.sust.p.2d.i16.trap" => "__nvvm_sust_p_2d_i16_trap",
+    "llvm.nvvm.sust.p.2d.i32.trap" => "__nvvm_sust_p_2d_i32_trap",
+    "llvm.nvvm.sust.p.2d.i8.trap" => "__nvvm_sust_p_2d_i8_trap",
+    "llvm.nvvm.sust.p.2d.v2i16.trap" => "__nvvm_sust_p_2d_v2i16_trap",
+    "llvm.nvvm.sust.p.2d.v2i32.trap" => "__nvvm_sust_p_2d_v2i32_trap",
+    "llvm.nvvm.sust.p.2d.v2i8.trap" => "__nvvm_sust_p_2d_v2i8_trap",
+    "llvm.nvvm.sust.p.2d.v4i16.trap" => "__nvvm_sust_p_2d_v4i16_trap",
+    "llvm.nvvm.sust.p.2d.v4i32.trap" => "__nvvm_sust_p_2d_v4i32_trap",
+    "llvm.nvvm.sust.p.2d.v4i8.trap" => "__nvvm_sust_p_2d_v4i8_trap",
+    "llvm.nvvm.sust.p.3d.i16.trap" => "__nvvm_sust_p_3d_i16_trap",
+    "llvm.nvvm.sust.p.3d.i32.trap" => "__nvvm_sust_p_3d_i32_trap",
+    "llvm.nvvm.sust.p.3d.i8.trap" => "__nvvm_sust_p_3d_i8_trap",
+    "llvm.nvvm.sust.p.3d.v2i16.trap" => "__nvvm_sust_p_3d_v2i16_trap",
+    "llvm.nvvm.sust.p.3d.v2i32.trap" => "__nvvm_sust_p_3d_v2i32_trap",
+    "llvm.nvvm.sust.p.3d.v2i8.trap" => "__nvvm_sust_p_3d_v2i8_trap",
+    "llvm.nvvm.sust.p.3d.v4i16.trap" => "__nvvm_sust_p_3d_v4i16_trap",
+    "llvm.nvvm.sust.p.3d.v4i32.trap" => "__nvvm_sust_p_3d_v4i32_trap",
+    "llvm.nvvm.sust.p.3d.v4i8.trap" => "__nvvm_sust_p_3d_v4i8_trap",
+    "llvm.nvvm.swap.lo.hi.b64" => "__nvvm_swap_lo_hi_b64",
+    "llvm.nvvm.trunc.d" => "__nvvm_trunc_d",
+    "llvm.nvvm.trunc.f" => "__nvvm_trunc_f",
+    "llvm.nvvm.trunc.ftz.f" => "__nvvm_trunc_ftz_f",
+    "llvm.nvvm.txq.array.size" => "__nvvm_txq_array_size",
+    "llvm.nvvm.txq.channel.data.type" => "__nvvm_txq_channel_data_type",
+    "llvm.nvvm.txq.channel.order" => "__nvvm_txq_channel_order",
+    "llvm.nvvm.txq.depth" => "__nvvm_txq_depth",
+    "llvm.nvvm.txq.height" => "__nvvm_txq_height",
+    "llvm.nvvm.txq.num.mipmap.levels" => "__nvvm_txq_num_mipmap_levels",
+    "llvm.nvvm.txq.num.samples" => "__nvvm_txq_num_samples",
+    "llvm.nvvm.txq.width" => "__nvvm_txq_width",
+    "llvm.nvvm.ui2d.rm" => "__nvvm_ui2d_rm",
+    "llvm.nvvm.ui2d.rn" => "__nvvm_ui2d_rn",
+    "llvm.nvvm.ui2d.rp" => "__nvvm_ui2d_rp",
+    "llvm.nvvm.ui2d.rz" => "__nvvm_ui2d_rz",
+    "llvm.nvvm.ui2f.rm" => "__nvvm_ui2f_rm",
+    "llvm.nvvm.ui2f.rn" => "__nvvm_ui2f_rn",
+    "llvm.nvvm.ui2f.rp" => "__nvvm_ui2f_rp",
+    "llvm.nvvm.ui2f.rz" => "__nvvm_ui2f_rz",
+    "llvm.nvvm.ull2d.rm" => "__nvvm_ull2d_rm",
+    "llvm.nvvm.ull2d.rn" => "__nvvm_ull2d_rn",
+    "llvm.nvvm.ull2d.rp" => "__nvvm_ull2d_rp",
+    "llvm.nvvm.ull2d.rz" => "__nvvm_ull2d_rz",
+    "llvm.nvvm.ull2f.rm" => "__nvvm_ull2f_rm",
+    "llvm.nvvm.ull2f.rn" => "__nvvm_ull2f_rn",
+    "llvm.nvvm.ull2f.rp" => "__nvvm_ull2f_rp",
+    "llvm.nvvm.ull2f.rz" => "__nvvm_ull2f_rz",
+    // arm
+    "llvm.arm.cdp" => "__builtin_arm_cdp",
+    "llvm.arm.cdp2" => "__builtin_arm_cdp2",
+    "llvm.arm.dmb" => "__builtin_arm_dmb",
+    "llvm.arm.dsb" => "__builtin_arm_dsb",
+    "llvm.arm.get.fpscr" => "__builtin_arm_get_fpscr",
+    "llvm.arm.isb" => "__builtin_arm_isb",
+    "llvm.arm.mcr" => "__builtin_arm_mcr",
+    "llvm.arm.mcr2" => "__builtin_arm_mcr2",
+    "llvm.arm.mcrr" => "__builtin_arm_mcrr",
+    "llvm.arm.mcrr2" => "__builtin_arm_mcrr2",
+    "llvm.arm.mrc" => "__builtin_arm_mrc",
+    "llvm.arm.mrc2" => "__builtin_arm_mrc2",
+    "llvm.arm.qadd" => "__builtin_arm_qadd",
+    "llvm.arm.qsub" => "__builtin_arm_qsub",
+    "llvm.arm.set.fpscr" => "__builtin_arm_set_fpscr",
+    "llvm.arm.ssat" => "__builtin_arm_ssat",
+    "llvm.arm.thread.pointer" => "__builtin_thread_pointer",
+    "llvm.arm.usat" => "__builtin_arm_usat",
+    // x86
+    "llvm.x86.addcarry.u32" => "__builtin_ia32_addcarry_u32",
+    "llvm.x86.addcarry.u64" => "__builtin_ia32_addcarry_u64",
+    "llvm.x86.addcarryx.u32" => "__builtin_ia32_addcarryx_u32",
+    "llvm.x86.addcarryx.u64" => "__builtin_ia32_addcarryx_u64",
+    "llvm.x86.aesni.aesdec" => "__builtin_ia32_aesdec128",
+    "llvm.x86.aesni.aesdeclast" => "__builtin_ia32_aesdeclast128",
+    "llvm.x86.aesni.aesenc" => "__builtin_ia32_aesenc128",
+    "llvm.x86.aesni.aesenclast" => "__builtin_ia32_aesenclast128",
+    "llvm.x86.aesni.aesimc" => "__builtin_ia32_aesimc128",
+    "llvm.x86.aesni.aeskeygenassist" => "__builtin_ia32_aeskeygenassist128",
+    "llvm.x86.avx.addsub.pd.256" => "__builtin_ia32_addsubpd256",
+    "llvm.x86.avx.addsub.ps.256" => "__builtin_ia32_addsubps256",
+    "llvm.x86.avx.blend.pd.256" => "__builtin_ia32_blendpd256",
+    "llvm.x86.avx.blend.ps.256" => "__builtin_ia32_blendps256",
+    "llvm.x86.avx.blendv.pd.256" => "__builtin_ia32_blendvpd256",
+    "llvm.x86.avx.blendv.ps.256" => "__builtin_ia32_blendvps256",
+    "llvm.x86.avx.cmp.pd.256" => "__builtin_ia32_cmppd256",
+    "llvm.x86.avx.cmp.ps.256" => "__builtin_ia32_cmpps256",
+    "llvm.x86.avx.cvt.pd2.ps.256" => "__builtin_ia32_cvtpd2ps256",
+    "llvm.x86.avx.cvt.pd2dq.256" => "__builtin_ia32_cvtpd2dq256",
+    "llvm.x86.avx.cvt.ps2.pd.256" => "__builtin_ia32_cvtps2pd256",
+    "llvm.x86.avx.cvt.ps2dq.256" => "__builtin_ia32_cvtps2dq256",
+    "llvm.x86.avx.cvtdq2.pd.256" => "__builtin_ia32_cvtdq2pd256",
+    "llvm.x86.avx.cvtdq2.ps.256" => "__builtin_ia32_cvtdq2ps256",
+    "llvm.x86.avx.cvtt.pd2dq.256" => "__builtin_ia32_cvttpd2dq256",
+    "llvm.x86.avx.cvtt.ps2dq.256" => "__builtin_ia32_cvttps2dq256",
+    "llvm.x86.avx.dp.ps.256" => "__builtin_ia32_dpps256",
+    "llvm.x86.avx.hadd.pd.256" => "__builtin_ia32_haddpd256",
+    "llvm.x86.avx.hadd.ps.256" => "__builtin_ia32_haddps256",
+    "llvm.x86.avx.hsub.pd.256" => "__builtin_ia32_hsubpd256",
+    "llvm.x86.avx.hsub.ps.256" => "__builtin_ia32_hsubps256",
+    "llvm.x86.avx.ldu.dq.256" => "__builtin_ia32_lddqu256",
+    "llvm.x86.avx.maskload.pd" => "__builtin_ia32_maskloadpd",
+    "llvm.x86.avx.maskload.pd.256" => "__builtin_ia32_maskloadpd256",
+    "llvm.x86.avx.maskload.ps" => "__builtin_ia32_maskloadps",
+    "llvm.x86.avx.maskload.ps.256" => "__builtin_ia32_maskloadps256",
+    "llvm.x86.avx.maskstore.pd" => "__builtin_ia32_maskstorepd",
+    "llvm.x86.avx.maskstore.pd.256" => "__builtin_ia32_maskstorepd256",
+    "llvm.x86.avx.maskstore.ps" => "__builtin_ia32_maskstoreps",
+    "llvm.x86.avx.maskstore.ps.256" => "__builtin_ia32_maskstoreps256",
+    "llvm.x86.avx.max.pd.256" => "__builtin_ia32_maxpd256",
+    "llvm.x86.avx.max.ps.256" => "__builtin_ia32_maxps256",
+    "llvm.x86.avx.min.pd.256" => "__builtin_ia32_minpd256",
+    "llvm.x86.avx.min.ps.256" => "__builtin_ia32_minps256",
+    "llvm.x86.avx.movmsk.pd.256" => "__builtin_ia32_movmskpd256",
+    "llvm.x86.avx.movmsk.ps.256" => "__builtin_ia32_movmskps256",
+    "llvm.x86.avx.ptestc.256" => "__builtin_ia32_ptestc256",
+    "llvm.x86.avx.ptestnzc.256" => "__builtin_ia32_ptestnzc256",
+    "llvm.x86.avx.ptestz.256" => "__builtin_ia32_ptestz256",
+    "llvm.x86.avx.rcp.ps.256" => "__builtin_ia32_rcpps256",
+    "llvm.x86.avx.round.pd.256" => "__builtin_ia32_roundpd256",
+    "llvm.x86.avx.round.ps.256" => "__builtin_ia32_roundps256",
+    "llvm.x86.avx.rsqrt.ps.256" => "__builtin_ia32_rsqrtps256",
+    "llvm.x86.avx.sqrt.pd.256" => "__builtin_ia32_sqrtpd256",
+    "llvm.x86.avx.sqrt.ps.256" => "__builtin_ia32_sqrtps256",
+    "llvm.x86.avx.storeu.dq.256" => "__builtin_ia32_storedqu256",
+    "llvm.x86.avx.storeu.pd.256" => "__builtin_ia32_storeupd256",
+    "llvm.x86.avx.storeu.ps.256" => "__builtin_ia32_storeups256",
+    "llvm.x86.avx.vbroadcastf128.pd.256" => "__builtin_ia32_vbroadcastf128_pd256",
+    "llvm.x86.avx.vbroadcastf128.ps.256" => "__builtin_ia32_vbroadcastf128_ps256",
+    "llvm.x86.avx.vextractf128.pd.256" => "__builtin_ia32_vextractf128_pd256",
+    "llvm.x86.avx.vextractf128.ps.256" => "__builtin_ia32_vextractf128_ps256",
+    "llvm.x86.avx.vextractf128.si.256" => "__builtin_ia32_vextractf128_si256",
+    "llvm.x86.avx.vinsertf128.pd.256" => "__builtin_ia32_vinsertf128_pd256",
+    "llvm.x86.avx.vinsertf128.ps.256" => "__builtin_ia32_vinsertf128_ps256",
+    "llvm.x86.avx.vinsertf128.si.256" => "__builtin_ia32_vinsertf128_si256",
+    "llvm.x86.avx.vperm2f128.pd.256" => "__builtin_ia32_vperm2f128_pd256",
+    "llvm.x86.avx.vperm2f128.ps.256" => "__builtin_ia32_vperm2f128_ps256",
+    "llvm.x86.avx.vperm2f128.si.256" => "__builtin_ia32_vperm2f128_si256",
+    "llvm.x86.avx.vpermilvar.pd" => "__builtin_ia32_vpermilvarpd",
+    "llvm.x86.avx.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256",
+    "llvm.x86.avx.vpermilvar.ps" => "__builtin_ia32_vpermilvarps",
+    "llvm.x86.avx.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256",
+    "llvm.x86.avx.vtestc.pd" => "__builtin_ia32_vtestcpd",
+    "llvm.x86.avx.vtestc.pd.256" => "__builtin_ia32_vtestcpd256",
+    "llvm.x86.avx.vtestc.ps" => "__builtin_ia32_vtestcps",
+    "llvm.x86.avx.vtestc.ps.256" => "__builtin_ia32_vtestcps256",
+    "llvm.x86.avx.vtestnzc.pd" => "__builtin_ia32_vtestnzcpd",
+    "llvm.x86.avx.vtestnzc.pd.256" => "__builtin_ia32_vtestnzcpd256",
+    "llvm.x86.avx.vtestnzc.ps" => "__builtin_ia32_vtestnzcps",
+    "llvm.x86.avx.vtestnzc.ps.256" => "__builtin_ia32_vtestnzcps256",
+    "llvm.x86.avx.vtestz.pd" => "__builtin_ia32_vtestzpd",
+    "llvm.x86.avx.vtestz.pd.256" => "__builtin_ia32_vtestzpd256",
+    "llvm.x86.avx.vtestz.ps" => "__builtin_ia32_vtestzps",
+    "llvm.x86.avx.vtestz.ps.256" => "__builtin_ia32_vtestzps256",
+    "llvm.x86.avx.vzeroall" => "__builtin_ia32_vzeroall",
+    "llvm.x86.avx.vzeroupper" => "__builtin_ia32_vzeroupper",
+    "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gatherd_d",
+    "llvm.x86.avx2.gather.d.d.256" => "__builtin_ia32_gatherd_d256",
+    "llvm.x86.avx2.gather.d.pd" => "__builtin_ia32_gatherd_pd",
+    "llvm.x86.avx2.gather.d.pd.256" => "__builtin_ia32_gatherd_pd256",
+    "llvm.x86.avx2.gather.d.ps" => "__builtin_ia32_gatherd_ps",
+    "llvm.x86.avx2.gather.d.ps.256" => "__builtin_ia32_gatherd_ps256",
+    "llvm.x86.avx2.gather.d.q" => "__builtin_ia32_gatherd_q",
+    "llvm.x86.avx2.gather.d.q.256" => "__builtin_ia32_gatherd_q256",
+    "llvm.x86.avx2.gather.q.d" => "__builtin_ia32_gatherq_d",
+    "llvm.x86.avx2.gather.q.d.256" => "__builtin_ia32_gatherq_d256",
+    "llvm.x86.avx2.gather.q.pd" => "__builtin_ia32_gatherq_pd",
+    "llvm.x86.avx2.gather.q.pd.256" => "__builtin_ia32_gatherq_pd256",
+    "llvm.x86.avx2.gather.q.ps" => "__builtin_ia32_gatherq_ps",
+    "llvm.x86.avx2.gather.q.ps.256" => "__builtin_ia32_gatherq_ps256",
+    "llvm.x86.avx2.gather.q.q" => "__builtin_ia32_gatherq_q",
+    "llvm.x86.avx2.gather.q.q.256" => "__builtin_ia32_gatherq_q256",
+    "llvm.x86.avx2.maskload.d" => "__builtin_ia32_maskloadd",
+    "llvm.x86.avx2.maskload.d.256" => "__builtin_ia32_maskloadd256",
+    "llvm.x86.avx2.maskload.q" => "__builtin_ia32_maskloadq",
+    "llvm.x86.avx2.maskload.q.256" => "__builtin_ia32_maskloadq256",
+    "llvm.x86.avx2.maskstore.d" => "__builtin_ia32_maskstored",
+    "llvm.x86.avx2.maskstore.d.256" => "__builtin_ia32_maskstored256",
+    "llvm.x86.avx2.maskstore.q" => "__builtin_ia32_maskstoreq",
+    "llvm.x86.avx2.maskstore.q.256" => "__builtin_ia32_maskstoreq256",
+    "llvm.x86.avx2.movntdqa" => "__builtin_ia32_movntdqa256",
+    "llvm.x86.avx2.mpsadbw" => "__builtin_ia32_mpsadbw256",
+    "llvm.x86.avx2.pabs.b" => "__builtin_ia32_pabsb256",
+    "llvm.x86.avx2.pabs.d" => "__builtin_ia32_pabsd256",
+    "llvm.x86.avx2.pabs.w" => "__builtin_ia32_pabsw256",
+    "llvm.x86.avx2.packssdw" => "__builtin_ia32_packssdw256",
+    "llvm.x86.avx2.packsswb" => "__builtin_ia32_packsswb256",
+    "llvm.x86.avx2.packusdw" => "__builtin_ia32_packusdw256",
+    "llvm.x86.avx2.packuswb" => "__builtin_ia32_packuswb256",
+    "llvm.x86.avx2.padds.b" => "__builtin_ia32_paddsb256",
+    "llvm.x86.avx2.padds.w" => "__builtin_ia32_paddsw256",
+    "llvm.x86.avx2.paddus.b" => "__builtin_ia32_paddusb256",
+    "llvm.x86.avx2.paddus.w" => "__builtin_ia32_paddusw256",
+    "llvm.x86.avx2.pavg.b" => "__builtin_ia32_pavgb256",
+    "llvm.x86.avx2.pavg.w" => "__builtin_ia32_pavgw256",
+    "llvm.x86.avx2.pblendd.128" => "__builtin_ia32_pblendd128",
+    "llvm.x86.avx2.pblendd.256" => "__builtin_ia32_pblendd256",
+    "llvm.x86.avx2.pblendvb" => "__builtin_ia32_pblendvb256",
+    "llvm.x86.avx2.pblendw" => "__builtin_ia32_pblendw256",
+    "llvm.x86.avx2.pbroadcastb.128" => "__builtin_ia32_pbroadcastb128",
+    "llvm.x86.avx2.pbroadcastb.256" => "__builtin_ia32_pbroadcastb256",
+    "llvm.x86.avx2.pbroadcastd.128" => "__builtin_ia32_pbroadcastd128",
+    "llvm.x86.avx2.pbroadcastd.256" => "__builtin_ia32_pbroadcastd256",
+    "llvm.x86.avx2.pbroadcastq.128" => "__builtin_ia32_pbroadcastq128",
+    "llvm.x86.avx2.pbroadcastq.256" => "__builtin_ia32_pbroadcastq256",
+    "llvm.x86.avx2.pbroadcastw.128" => "__builtin_ia32_pbroadcastw128",
+    "llvm.x86.avx2.pbroadcastw.256" => "__builtin_ia32_pbroadcastw256",
+    "llvm.x86.avx2.permd" => "__builtin_ia32_permvarsi256",
+    "llvm.x86.avx2.permps" => "__builtin_ia32_permvarsf256",
+    "llvm.x86.avx2.phadd.d" => "__builtin_ia32_phaddd256",
+    "llvm.x86.avx2.phadd.sw" => "__builtin_ia32_phaddsw256",
+    "llvm.x86.avx2.phadd.w" => "__builtin_ia32_phaddw256",
+    "llvm.x86.avx2.phsub.d" => "__builtin_ia32_phsubd256",
+    "llvm.x86.avx2.phsub.sw" => "__builtin_ia32_phsubsw256",
+    "llvm.x86.avx2.phsub.w" => "__builtin_ia32_phsubw256",
+    "llvm.x86.avx2.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw256",
+    "llvm.x86.avx2.pmadd.wd" => "__builtin_ia32_pmaddwd256",
+    "llvm.x86.avx2.pmaxs.b" => "__builtin_ia32_pmaxsb256",
+    "llvm.x86.avx2.pmaxs.d" => "__builtin_ia32_pmaxsd256",
+    "llvm.x86.avx2.pmaxs.w" => "__builtin_ia32_pmaxsw256",
+    "llvm.x86.avx2.pmaxu.b" => "__builtin_ia32_pmaxub256",
+    "llvm.x86.avx2.pmaxu.d" => "__builtin_ia32_pmaxud256",
+    "llvm.x86.avx2.pmaxu.w" => "__builtin_ia32_pmaxuw256",
+    "llvm.x86.avx2.pmins.b" => "__builtin_ia32_pminsb256",
+    "llvm.x86.avx2.pmins.d" => "__builtin_ia32_pminsd256",
+    "llvm.x86.avx2.pmins.w" => "__builtin_ia32_pminsw256",
+    "llvm.x86.avx2.pminu.b" => "__builtin_ia32_pminub256",
+    "llvm.x86.avx2.pminu.d" => "__builtin_ia32_pminud256",
+    "llvm.x86.avx2.pminu.w" => "__builtin_ia32_pminuw256",
+    "llvm.x86.avx2.pmovmskb" => "__builtin_ia32_pmovmskb256",
+    "llvm.x86.avx2.pmovsxbd" => "__builtin_ia32_pmovsxbd256",
+    "llvm.x86.avx2.pmovsxbq" => "__builtin_ia32_pmovsxbq256",
+    "llvm.x86.avx2.pmovsxbw" => "__builtin_ia32_pmovsxbw256",
+    "llvm.x86.avx2.pmovsxdq" => "__builtin_ia32_pmovsxdq256",
+    "llvm.x86.avx2.pmovsxwd" => "__builtin_ia32_pmovsxwd256",
+    "llvm.x86.avx2.pmovsxwq" => "__builtin_ia32_pmovsxwq256",
+    "llvm.x86.avx2.pmovzxbd" => "__builtin_ia32_pmovzxbd256",
+    "llvm.x86.avx2.pmovzxbq" => "__builtin_ia32_pmovzxbq256",
+    "llvm.x86.avx2.pmovzxbw" => "__builtin_ia32_pmovzxbw256",
+    "llvm.x86.avx2.pmovzxdq" => "__builtin_ia32_pmovzxdq256",
+    "llvm.x86.avx2.pmovzxwd" => "__builtin_ia32_pmovzxwd256",
+    "llvm.x86.avx2.pmovzxwq" => "__builtin_ia32_pmovzxwq256",
+    "llvm.x86.avx2.pmul.dq" => "__builtin_ia32_pmuldq256",
+    "llvm.x86.avx2.pmul.hr.sw" => "__builtin_ia32_pmulhrsw256",
+    "llvm.x86.avx2.pmulh.w" => "__builtin_ia32_pmulhw256",
+    "llvm.x86.avx2.pmulhu.w" => "__builtin_ia32_pmulhuw256",
+    "llvm.x86.avx2.pmulu.dq" => "__builtin_ia32_pmuludq256",
+    "llvm.x86.avx2.psad.bw" => "__builtin_ia32_psadbw256",
+    "llvm.x86.avx2.pshuf.b" => "__builtin_ia32_pshufb256",
+    "llvm.x86.avx2.psign.b" => "__builtin_ia32_psignb256",
+    "llvm.x86.avx2.psign.d" => "__builtin_ia32_psignd256",
+    "llvm.x86.avx2.psign.w" => "__builtin_ia32_psignw256",
+    "llvm.x86.avx2.psll.d" => "__builtin_ia32_pslld256",
+    "llvm.x86.avx2.psll.dq" => "__builtin_ia32_pslldqi256",
+    "llvm.x86.avx2.psll.dq.bs" => "__builtin_ia32_pslldqi256_byteshift",
+    "llvm.x86.avx2.psll.q" => "__builtin_ia32_psllq256",
+    "llvm.x86.avx2.psll.w" => "__builtin_ia32_psllw256",
+    "llvm.x86.avx2.pslli.d" => "__builtin_ia32_pslldi256",
+    "llvm.x86.avx2.pslli.q" => "__builtin_ia32_psllqi256",
+    "llvm.x86.avx2.pslli.w" => "__builtin_ia32_psllwi256",
+    "llvm.x86.avx2.psllv.d" => "__builtin_ia32_psllv4si",
+    "llvm.x86.avx2.psllv.d.256" => "__builtin_ia32_psllv8si",
+    "llvm.x86.avx2.psllv.q" => "__builtin_ia32_psllv2di",
+    "llvm.x86.avx2.psllv.q.256" => "__builtin_ia32_psllv4di",
+    "llvm.x86.avx2.psra.d" => "__builtin_ia32_psrad256",
+    "llvm.x86.avx2.psra.w" => "__builtin_ia32_psraw256",
+    "llvm.x86.avx2.psrai.d" => "__builtin_ia32_psradi256",
+    "llvm.x86.avx2.psrai.w" => "__builtin_ia32_psrawi256",
+    "llvm.x86.avx2.psrav.d" => "__builtin_ia32_psrav4si",
+    "llvm.x86.avx2.psrav.d.256" => "__builtin_ia32_psrav8si",
+    "llvm.x86.avx2.psrl.d" => "__builtin_ia32_psrld256",
+    "llvm.x86.avx2.psrl.dq" => "__builtin_ia32_psrldqi256",
+    "llvm.x86.avx2.psrl.dq.bs" => "__builtin_ia32_psrldqi256_byteshift",
+    "llvm.x86.avx2.psrl.q" => "__builtin_ia32_psrlq256",
+    "llvm.x86.avx2.psrl.w" => "__builtin_ia32_psrlw256",
+    "llvm.x86.avx2.psrli.d" => "__builtin_ia32_psrldi256",
+    "llvm.x86.avx2.psrli.q" => "__builtin_ia32_psrlqi256",
+    "llvm.x86.avx2.psrli.w" => "__builtin_ia32_psrlwi256",
+    "llvm.x86.avx2.psrlv.d" => "__builtin_ia32_psrlv4si",
+    "llvm.x86.avx2.psrlv.d.256" => "__builtin_ia32_psrlv8si",
+    "llvm.x86.avx2.psrlv.q" => "__builtin_ia32_psrlv2di",
+    "llvm.x86.avx2.psrlv.q.256" => "__builtin_ia32_psrlv4di",
+    "llvm.x86.avx2.psubs.b" => "__builtin_ia32_psubsb256",
+    "llvm.x86.avx2.psubs.w" => "__builtin_ia32_psubsw256",
+    "llvm.x86.avx2.psubus.b" => "__builtin_ia32_psubusb256",
+    "llvm.x86.avx2.psubus.w" => "__builtin_ia32_psubusw256",
+    "llvm.x86.avx2.vbroadcast.sd.pd.256" => "__builtin_ia32_vbroadcastsd_pd256",
+    "llvm.x86.avx2.vbroadcast.ss.ps" => "__builtin_ia32_vbroadcastss_ps",
+    "llvm.x86.avx2.vbroadcast.ss.ps.256" => "__builtin_ia32_vbroadcastss_ps256",
+    "llvm.x86.avx2.vextracti128" => "__builtin_ia32_extract128i256",
+    "llvm.x86.avx2.vinserti128" => "__builtin_ia32_insert128i256",
+    "llvm.x86.avx2.vperm2i128" => "__builtin_ia32_permti256",
+    "llvm.x86.avx512.cvtsd2usi" => "__builtin_ia32_cvtsd2usi",
+    "llvm.x86.avx512.cvtsd2usi64" => "__builtin_ia32_cvtsd2usi64",
+    "llvm.x86.avx512.cvtss2usi" => "__builtin_ia32_cvtss2usi",
+    "llvm.x86.avx512.cvtss2usi64" => "__builtin_ia32_cvtss2usi64",
+    "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_cvttsd2usi",
+    "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_cvttsd2usi64",
+    "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_cvttss2usi",
+    "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_cvttss2usi64",
+    "llvm.x86.avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd",
+    "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss",
+    "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi642sd",
+    "llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi642ss",
+    "llvm.x86.avx512.gather.dpd.512" => "__builtin_ia32_gathersiv8df",
+    "llvm.x86.avx512.gather.dpi.512" => "__builtin_ia32_gathersiv16si",
+    "llvm.x86.avx512.gather.dpq.512" => "__builtin_ia32_gathersiv8di",
+    "llvm.x86.avx512.gather.dps.512" => "__builtin_ia32_gathersiv16sf",
+    "llvm.x86.avx512.gather.qpd.512" => "__builtin_ia32_gatherdiv8df",
+    "llvm.x86.avx512.gather.qpi.512" => "__builtin_ia32_gatherdiv16si",
+    "llvm.x86.avx512.gather.qpq.512" => "__builtin_ia32_gatherdiv8di",
+    "llvm.x86.avx512.gather.qps.512" => "__builtin_ia32_gatherdiv16sf",
+    "llvm.x86.avx512.gatherpf.dpd.512" => "__builtin_ia32_gatherpfdpd",
+    "llvm.x86.avx512.gatherpf.dps.512" => "__builtin_ia32_gatherpfdps",
+    "llvm.x86.avx512.gatherpf.qpd.512" => "__builtin_ia32_gatherpfqpd",
+    "llvm.x86.avx512.gatherpf.qps.512" => "__builtin_ia32_gatherpfqps",
+    "llvm.x86.avx512.kand.w" => "__builtin_ia32_kandhi",
+    "llvm.x86.avx512.kandn.w" => "__builtin_ia32_kandnhi",
+    "llvm.x86.avx512.knot.w" => "__builtin_ia32_knothi",
+    "llvm.x86.avx512.kor.w" => "__builtin_ia32_korhi",
+    "llvm.x86.avx512.kortestc.w" => "__builtin_ia32_kortestchi",
+    "llvm.x86.avx512.kortestz.w" => "__builtin_ia32_kortestzhi",
+    "llvm.x86.avx512.kunpck.bw" => "__builtin_ia32_kunpckhi",
+    "llvm.x86.avx512.kxnor.w" => "__builtin_ia32_kxnorhi",
+    "llvm.x86.avx512.kxor.w" => "__builtin_ia32_kxorhi",
+    "llvm.x86.avx512.mask.blend.d.512" => "__builtin_ia32_blendmd_512_mask",
+    "llvm.x86.avx512.mask.blend.pd.512" => "__builtin_ia32_blendmpd_512_mask",
+    "llvm.x86.avx512.mask.blend.ps.512" => "__builtin_ia32_blendmps_512_mask",
+    "llvm.x86.avx512.mask.blend.q.512" => "__builtin_ia32_blendmq_512_mask",
+    "llvm.x86.avx512.mask.cmp.pd.512" => "__builtin_ia32_cmppd512_mask",
+    "llvm.x86.avx512.mask.cmp.ps.512" => "__builtin_ia32_cmpps512_mask",
+    "llvm.x86.avx512.mask.conflict.d.512" => "__builtin_ia32_vpconflictsi_512_mask",
+    "llvm.x86.avx512.mask.conflict.q.512" => "__builtin_ia32_vpconflictdi_512_mask",
+    "llvm.x86.avx512.mask.cvtdq2pd.512" => "__builtin_ia32_cvtdq2pd512_mask",
+    "llvm.x86.avx512.mask.cvtdq2ps.512" => "__builtin_ia32_cvtdq2ps512_mask",
+    "llvm.x86.avx512.mask.cvtpd2dq.512" => "__builtin_ia32_cvtpd2dq512_mask",
+    "llvm.x86.avx512.mask.cvtpd2ps.512" => "__builtin_ia32_cvtpd2ps512_mask",
+    "llvm.x86.avx512.mask.cvtpd2udq.512" => "__builtin_ia32_cvtpd2udq512_mask",
+    "llvm.x86.avx512.mask.cvtps2dq.512" => "__builtin_ia32_cvtps2dq512_mask",
+    "llvm.x86.avx512.mask.cvtps2udq.512" => "__builtin_ia32_cvtps2udq512_mask",
+    "llvm.x86.avx512.mask.cvttpd2dq.512" => "__builtin_ia32_cvttpd2dq512_mask",
+    "llvm.x86.avx512.mask.cvttpd2udq.512" => "__builtin_ia32_cvttpd2udq512_mask",
+    "llvm.x86.avx512.mask.cvttps2dq.512" => "__builtin_ia32_cvttps2dq512_mask",
+    "llvm.x86.avx512.mask.cvttps2udq.512" => "__builtin_ia32_cvttps2udq512_mask",
+    "llvm.x86.avx512.mask.cvtudq2pd.512" => "__builtin_ia32_cvtudq2pd512_mask",
+    "llvm.x86.avx512.mask.cvtudq2ps.512" => "__builtin_ia32_cvtudq2ps512_mask",
+    "llvm.x86.avx512.mask.loadu.d.512" => "__builtin_ia32_loaddqusi512_mask",
+    "llvm.x86.avx512.mask.loadu.pd.512" => "__builtin_ia32_loadupd512_mask",
+    "llvm.x86.avx512.mask.loadu.ps.512" => "__builtin_ia32_loadups512_mask",
+    "llvm.x86.avx512.mask.loadu.q.512" => "__builtin_ia32_loaddqudi512_mask",
+    "llvm.x86.avx512.mask.lzcnt.d.512" => "__builtin_ia32_vplzcntd_512_mask",
+    "llvm.x86.avx512.mask.lzcnt.q.512" => "__builtin_ia32_vplzcntq_512_mask",
+    "llvm.x86.avx512.mask.max.pd.512" => "__builtin_ia32_maxpd512_mask",
+    "llvm.x86.avx512.mask.max.ps.512" => "__builtin_ia32_maxps512_mask",
+    "llvm.x86.avx512.mask.min.pd.512" => "__builtin_ia32_minpd512_mask",
+    "llvm.x86.avx512.mask.min.ps.512" => "__builtin_ia32_minps512_mask",
+    "llvm.x86.avx512.mask.pabs.d.512" => "__builtin_ia32_pabsd512_mask",
+    "llvm.x86.avx512.mask.pabs.q.512" => "__builtin_ia32_pabsq512_mask",
+    "llvm.x86.avx512.mask.pand.d.512" => "__builtin_ia32_pandd512_mask",
+    "llvm.x86.avx512.mask.pand.q.512" => "__builtin_ia32_pandq512_mask",
+    "llvm.x86.avx512.mask.pbroadcast.d.gpr.512" => "__builtin_ia32_pbroadcastd512_gpr_mask",
+    "llvm.x86.avx512.mask.pbroadcast.q.gpr.512" => "__builtin_ia32_pbroadcastq512_gpr_mask",
+    "llvm.x86.avx512.mask.pbroadcast.q.mem.512" => "__builtin_ia32_pbroadcastq512_mem_mask",
+    "llvm.x86.avx512.mask.pcmpeq.b.128" => "__builtin_ia32_pcmpeqb128_mask",
+    "llvm.x86.avx512.mask.pcmpeq.b.256" => "__builtin_ia32_pcmpeqb256_mask",
+    "llvm.x86.avx512.mask.pcmpeq.b.512" => "__builtin_ia32_pcmpeqb512_mask",
+    "llvm.x86.avx512.mask.pcmpeq.d.128" => "__builtin_ia32_pcmpeqd128_mask",
+    "llvm.x86.avx512.mask.pcmpeq.d.256" => "__builtin_ia32_pcmpeqd256_mask",
+    "llvm.x86.avx512.mask.pcmpeq.d.512" => "__builtin_ia32_pcmpeqd512_mask",
+    "llvm.x86.avx512.mask.pcmpeq.q.128" => "__builtin_ia32_pcmpeqq128_mask",
+    "llvm.x86.avx512.mask.pcmpeq.q.256" => "__builtin_ia32_pcmpeqq256_mask",
+    "llvm.x86.avx512.mask.pcmpeq.q.512" => "__builtin_ia32_pcmpeqq512_mask",
+    "llvm.x86.avx512.mask.pcmpeq.w.128" => "__builtin_ia32_pcmpeqw128_mask",
+    "llvm.x86.avx512.mask.pcmpeq.w.256" => "__builtin_ia32_pcmpeqw256_mask",
+    "llvm.x86.avx512.mask.pcmpeq.w.512" => "__builtin_ia32_pcmpeqw512_mask",
+    "llvm.x86.avx512.mask.pcmpgt.b.128" => "__builtin_ia32_pcmpgtb128_mask",
+    "llvm.x86.avx512.mask.pcmpgt.b.256" => "__builtin_ia32_pcmpgtb256_mask",
+    "llvm.x86.avx512.mask.pcmpgt.b.512" => "__builtin_ia32_pcmpgtb512_mask",
+    "llvm.x86.avx512.mask.pcmpgt.d.128" => "__builtin_ia32_pcmpgtd128_mask",
+    "llvm.x86.avx512.mask.pcmpgt.d.256" => "__builtin_ia32_pcmpgtd256_mask",
+    "llvm.x86.avx512.mask.pcmpgt.d.512" => "__builtin_ia32_pcmpgtd512_mask",
+    "llvm.x86.avx512.mask.pcmpgt.q.128" => "__builtin_ia32_pcmpgtq128_mask",
+    "llvm.x86.avx512.mask.pcmpgt.q.256" => "__builtin_ia32_pcmpgtq256_mask",
+    "llvm.x86.avx512.mask.pcmpgt.q.512" => "__builtin_ia32_pcmpgtq512_mask",
+    "llvm.x86.avx512.mask.pcmpgt.w.128" => "__builtin_ia32_pcmpgtw128_mask",
+    "llvm.x86.avx512.mask.pcmpgt.w.256" => "__builtin_ia32_pcmpgtw256_mask",
+    "llvm.x86.avx512.mask.pcmpgt.w.512" => "__builtin_ia32_pcmpgtw512_mask",
+    "llvm.x86.avx512.mask.pmaxs.d.512" => "__builtin_ia32_pmaxsd512_mask",
+    "llvm.x86.avx512.mask.pmaxs.q.512" => "__builtin_ia32_pmaxsq512_mask",
+    "llvm.x86.avx512.mask.pmaxu.d.512" => "__builtin_ia32_pmaxud512_mask",
+    "llvm.x86.avx512.mask.pmaxu.q.512" => "__builtin_ia32_pmaxuq512_mask",
+    "llvm.x86.avx512.mask.pmins.d.512" => "__builtin_ia32_pminsd512_mask",
+    "llvm.x86.avx512.mask.pmins.q.512" => "__builtin_ia32_pminsq512_mask",
+    "llvm.x86.avx512.mask.pminu.d.512" => "__builtin_ia32_pminud512_mask",
+    "llvm.x86.avx512.mask.pminu.q.512" => "__builtin_ia32_pminuq512_mask",
+    "llvm.x86.avx512.mask.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask",
+    "llvm.x86.avx512.mask.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask",
+    "llvm.x86.avx512.mask.ptestm.d.512" => "__builtin_ia32_ptestmd512",
+    "llvm.x86.avx512.mask.ptestm.q.512" => "__builtin_ia32_ptestmq512",
+    "llvm.x86.avx512.mask.rndscale.pd.512" => "__builtin_ia32_rndscalepd_mask",
+    "llvm.x86.avx512.mask.rndscale.ps.512" => "__builtin_ia32_rndscaleps_mask",
+    "llvm.x86.avx512.mask.store.ss" => "__builtin_ia32_storess_mask",
+    "llvm.x86.avx512.mask.storeu.d.512" => "__builtin_ia32_storedqusi512_mask",
+    "llvm.x86.avx512.mask.storeu.pd.512" => "__builtin_ia32_storeupd512_mask",
+    "llvm.x86.avx512.mask.storeu.ps.512" => "__builtin_ia32_storeups512_mask",
+    "llvm.x86.avx512.mask.storeu.q.512" => "__builtin_ia32_storedqudi512_mask",
+    "llvm.x86.avx512.mask.valign.d.512" => "__builtin_ia32_alignd512_mask",
+    "llvm.x86.avx512.mask.valign.q.512" => "__builtin_ia32_alignq512_mask",
+    "llvm.x86.avx512.mask.vcvtph2ps.512" => "__builtin_ia32_vcvtph2ps512_mask",
+    "llvm.x86.avx512.mask.vcvtps2ph.512" => "__builtin_ia32_vcvtps2ph512_mask",
+    "llvm.x86.avx512.mask.vpermt.d.512" => "__builtin_ia32_vpermt2vard512_mask",
+    "llvm.x86.avx512.mask.vpermt.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
+    "llvm.x86.avx512.mask.vpermt.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
+    "llvm.x86.avx512.mask.vpermt.q.512" => "__builtin_ia32_vpermt2varq512_mask",
+    "llvm.x86.avx512.movntdqa" => "__builtin_ia32_movntdqa512",
+    "llvm.x86.avx512.pbroadcastd.512" => "__builtin_ia32_pbroadcastd512",
+    "llvm.x86.avx512.pbroadcastq.512" => "__builtin_ia32_pbroadcastq512",
+    "llvm.x86.avx512.pmovzxbd" => "__builtin_ia32_pmovzxbd512",
+    "llvm.x86.avx512.pmovzxbq" => "__builtin_ia32_pmovzxbq512",
+    "llvm.x86.avx512.pmovzxdq" => "__builtin_ia32_pmovzxdq512",
+    "llvm.x86.avx512.pmovzxwd" => "__builtin_ia32_pmovzxwd512",
+    "llvm.x86.avx512.pmovzxwq" => "__builtin_ia32_pmovzxwq512",
+    "llvm.x86.avx512.psll.dq" => "__builtin_ia32_pslldqi512",
+    "llvm.x86.avx512.psll.dq.bs" => "__builtin_ia32_pslldqi512_byteshift",
+    "llvm.x86.avx512.psrl.dq" => "__builtin_ia32_psrldqi512",
+    "llvm.x86.avx512.psrl.dq.bs" => "__builtin_ia32_psrldqi512_byteshift",
+    "llvm.x86.avx512.rcp14.pd.512" => "__builtin_ia32_rcp14pd512_mask",
+    "llvm.x86.avx512.rcp14.ps.512" => "__builtin_ia32_rcp14ps512_mask",
+    "llvm.x86.avx512.rcp14.sd" => "__builtin_ia32_rcp14sd_mask",
+    "llvm.x86.avx512.rcp14.ss" => "__builtin_ia32_rcp14ss_mask",
+    "llvm.x86.avx512.rcp28.pd" => "__builtin_ia32_rcp28pd_mask",
+    "llvm.x86.avx512.rcp28.ps" => "__builtin_ia32_rcp28ps_mask",
+    "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
+    "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
+    "llvm.x86.avx512.rndscale.sd" => "__builtin_ia32_rndscalesd",
+    "llvm.x86.avx512.rndscale.ss" => "__builtin_ia32_rndscaless",
+    "llvm.x86.avx512.rsqrt14.pd.512" => "__builtin_ia32_rsqrt14pd512_mask",
+    "llvm.x86.avx512.rsqrt14.ps.512" => "__builtin_ia32_rsqrt14ps512_mask",
+    "llvm.x86.avx512.rsqrt14.sd" => "__builtin_ia32_rsqrt14sd_mask",
+    "llvm.x86.avx512.rsqrt14.ss" => "__builtin_ia32_rsqrt14ss_mask",
+    "llvm.x86.avx512.rsqrt28.pd" => "__builtin_ia32_rsqrt28pd_mask",
+    "llvm.x86.avx512.rsqrt28.ps" => "__builtin_ia32_rsqrt28ps_mask",
+    "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
+    "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
+    "llvm.x86.avx512.scatter.dpd.512" => "__builtin_ia32_scattersiv8df",
+    "llvm.x86.avx512.scatter.dpi.512" => "__builtin_ia32_scattersiv16si",
+    "llvm.x86.avx512.scatter.dpq.512" => "__builtin_ia32_scattersiv8di",
+    "llvm.x86.avx512.scatter.dps.512" => "__builtin_ia32_scattersiv16sf",
+    "llvm.x86.avx512.scatter.qpd.512" => "__builtin_ia32_scatterdiv8df",
+    "llvm.x86.avx512.scatter.qpi.512" => "__builtin_ia32_scatterdiv16si",
+    "llvm.x86.avx512.scatter.qpq.512" => "__builtin_ia32_scatterdiv8di",
+    "llvm.x86.avx512.scatter.qps.512" => "__builtin_ia32_scatterdiv16sf",
+    "llvm.x86.avx512.scatterpf.dpd.512" => "__builtin_ia32_scatterpfdpd",
+    "llvm.x86.avx512.scatterpf.dps.512" => "__builtin_ia32_scatterpfdps",
+    "llvm.x86.avx512.scatterpf.qpd.512" => "__builtin_ia32_scatterpfqpd",
+    "llvm.x86.avx512.scatterpf.qps.512" => "__builtin_ia32_scatterpfqps",
+    "llvm.x86.avx512.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
+    "llvm.x86.avx512.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
+    "llvm.x86.avx512.sqrt.sd" => "__builtin_ia32_sqrtrndsd",
+    "llvm.x86.avx512.sqrt.ss" => "__builtin_ia32_sqrtrndss",
+    "llvm.x86.avx512.vbroadcast.sd.512" => "__builtin_ia32_vbroadcastsd512",
+    "llvm.x86.avx512.vbroadcast.sd.pd.512" => "__builtin_ia32_vbroadcastsd_pd512",
+    "llvm.x86.avx512.vbroadcast.ss.512" => "__builtin_ia32_vbroadcastss512",
+    "llvm.x86.avx512.vbroadcast.ss.ps.512" => "__builtin_ia32_vbroadcastss_ps512",
+    "llvm.x86.bmi.bextr.32" => "__builtin_ia32_bextr_u32",
+    "llvm.x86.bmi.bextr.64" => "__builtin_ia32_bextr_u64",
+    "llvm.x86.bmi.bzhi.32" => "__builtin_ia32_bzhi_si",
+    "llvm.x86.bmi.bzhi.64" => "__builtin_ia32_bzhi_di",
+    "llvm.x86.bmi.pdep.32" => "__builtin_ia32_pdep_si",
+    "llvm.x86.bmi.pdep.64" => "__builtin_ia32_pdep_di",
+    "llvm.x86.bmi.pext.32" => "__builtin_ia32_pext_si",
+    "llvm.x86.bmi.pext.64" => "__builtin_ia32_pext_di",
+    "llvm.x86.fma.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
+    "llvm.x86.fma.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
+    "llvm.x86.fma.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
+    "llvm.x86.fma.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
+    "llvm.x86.fma.mask.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask",
+    "llvm.x86.fma.mask.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask",
+    "llvm.x86.fma.mask.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask",
+    "llvm.x86.fma.mask.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask",
+    "llvm.x86.fma.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
+    "llvm.x86.fma.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
+    "llvm.x86.fma.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
+    "llvm.x86.fma.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
+    "llvm.x86.fma.vfmadd.pd" => "__builtin_ia32_vfmaddpd",
+    "llvm.x86.fma.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256",
+    "llvm.x86.fma.vfmadd.ps" => "__builtin_ia32_vfmaddps",
+    "llvm.x86.fma.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256",
+    "llvm.x86.fma.vfmadd.sd" => "__builtin_ia32_vfmaddsd",
+    "llvm.x86.fma.vfmadd.ss" => "__builtin_ia32_vfmaddss",
+    "llvm.x86.fma.vfmaddsub.pd" => "__builtin_ia32_vfmaddsubpd",
+    "llvm.x86.fma.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256",
+    "llvm.x86.fma.vfmaddsub.ps" => "__builtin_ia32_vfmaddsubps",
+    "llvm.x86.fma.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256",
+    "llvm.x86.fma.vfmsub.pd" => "__builtin_ia32_vfmsubpd",
+    "llvm.x86.fma.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256",
+    "llvm.x86.fma.vfmsub.ps" => "__builtin_ia32_vfmsubps",
+    "llvm.x86.fma.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256",
+    "llvm.x86.fma.vfmsub.sd" => "__builtin_ia32_vfmsubsd",
+    "llvm.x86.fma.vfmsub.ss" => "__builtin_ia32_vfmsubss",
+    "llvm.x86.fma.vfmsubadd.pd" => "__builtin_ia32_vfmsubaddpd",
+    "llvm.x86.fma.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256",
+    "llvm.x86.fma.vfmsubadd.ps" => "__builtin_ia32_vfmsubaddps",
+    "llvm.x86.fma.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256",
+    "llvm.x86.fma.vfnmadd.pd" => "__builtin_ia32_vfnmaddpd",
+    "llvm.x86.fma.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256",
+    "llvm.x86.fma.vfnmadd.ps" => "__builtin_ia32_vfnmaddps",
+    "llvm.x86.fma.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256",
+    "llvm.x86.fma.vfnmadd.sd" => "__builtin_ia32_vfnmaddsd",
+    "llvm.x86.fma.vfnmadd.ss" => "__builtin_ia32_vfnmaddss",
+    "llvm.x86.fma.vfnmsub.pd" => "__builtin_ia32_vfnmsubpd",
+    "llvm.x86.fma.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256",
+    "llvm.x86.fma.vfnmsub.ps" => "__builtin_ia32_vfnmsubps",
+    "llvm.x86.fma.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256",
+    "llvm.x86.fma.vfnmsub.sd" => "__builtin_ia32_vfnmsubsd",
+    "llvm.x86.fma.vfnmsub.ss" => "__builtin_ia32_vfnmsubss",
+    "llvm.x86.mmx.emms" => "__builtin_ia32_emms",
+    "llvm.x86.mmx.femms" => "__builtin_ia32_femms",
+    "llvm.x86.pclmulqdq" => "__builtin_ia32_pclmulqdq128",
+    "llvm.x86.rdfsbase.32" => "__builtin_ia32_rdfsbase32",
+    "llvm.x86.rdfsbase.64" => "__builtin_ia32_rdfsbase64",
+    "llvm.x86.rdgsbase.32" => "__builtin_ia32_rdgsbase32",
+    "llvm.x86.rdgsbase.64" => "__builtin_ia32_rdgsbase64",
+    "llvm.x86.rdpmc" => "__builtin_ia32_rdpmc",
+    "llvm.x86.rdtsc" => "__builtin_ia32_rdtsc",
+    "llvm.x86.rdtscp" => "__builtin_ia32_rdtscp",
+    "llvm.x86.sha1msg1" => "__builtin_ia32_sha1msg1",
+    "llvm.x86.sha1msg2" => "__builtin_ia32_sha1msg2",
+    "llvm.x86.sha1nexte" => "__builtin_ia32_sha1nexte",
+    "llvm.x86.sha1rnds4" => "__builtin_ia32_sha1rnds4",
+    "llvm.x86.sha256msg1" => "__builtin_ia32_sha256msg1",
+    "llvm.x86.sha256msg2" => "__builtin_ia32_sha256msg2",
+    "llvm.x86.sha256rnds2" => "__builtin_ia32_sha256rnds2",
+    "llvm.x86.sse.add.ss" => "__builtin_ia32_addss",
+    "llvm.x86.sse.cmp.ps" => "__builtin_ia32_cmpps",
+    "llvm.x86.sse.cmp.ss" => "__builtin_ia32_cmpss",
+    "llvm.x86.sse.comieq.ss" => "__builtin_ia32_comieq",
+    "llvm.x86.sse.comige.ss" => "__builtin_ia32_comige",
+    "llvm.x86.sse.comigt.ss" => "__builtin_ia32_comigt",
+    "llvm.x86.sse.comile.ss" => "__builtin_ia32_comile",
+    "llvm.x86.sse.comilt.ss" => "__builtin_ia32_comilt",
+    "llvm.x86.sse.comineq.ss" => "__builtin_ia32_comineq",
+    "llvm.x86.sse.cvtsi2ss" => "__builtin_ia32_cvtsi2ss",
+    "llvm.x86.sse.cvtsi642ss" => "__builtin_ia32_cvtsi642ss",
+    "llvm.x86.sse.cvtss2si" => "__builtin_ia32_cvtss2si",
+    "llvm.x86.sse.cvtss2si64" => "__builtin_ia32_cvtss2si64",
+    "llvm.x86.sse.cvttss2si" => "__builtin_ia32_cvttss2si",
+    "llvm.x86.sse.cvttss2si64" => "__builtin_ia32_cvttss2si64",
+    "llvm.x86.sse.div.ss" => "__builtin_ia32_divss",
+    "llvm.x86.sse.max.ps" => "__builtin_ia32_maxps",
+    "llvm.x86.sse.max.ss" => "__builtin_ia32_maxss",
+    "llvm.x86.sse.min.ps" => "__builtin_ia32_minps",
+    "llvm.x86.sse.min.ss" => "__builtin_ia32_minss",
+    "llvm.x86.sse.movmsk.ps" => "__builtin_ia32_movmskps",
+    "llvm.x86.sse.mul.ss" => "__builtin_ia32_mulss",
+    "llvm.x86.sse.rcp.ps" => "__builtin_ia32_rcpps",
+    "llvm.x86.sse.rcp.ss" => "__builtin_ia32_rcpss",
+    "llvm.x86.sse.rsqrt.ps" => "__builtin_ia32_rsqrtps",
+    "llvm.x86.sse.rsqrt.ss" => "__builtin_ia32_rsqrtss",
+    "llvm.x86.sse.sfence" => "__builtin_ia32_sfence",
+    "llvm.x86.sse.sqrt.ps" => "__builtin_ia32_sqrtps",
+    "llvm.x86.sse.sqrt.ss" => "__builtin_ia32_sqrtss",
+    "llvm.x86.sse.storeu.ps" => "__builtin_ia32_storeups",
+    "llvm.x86.sse.sub.ss" => "__builtin_ia32_subss",
+    "llvm.x86.sse.ucomieq.ss" => "__builtin_ia32_ucomieq",
+    "llvm.x86.sse.ucomige.ss" => "__builtin_ia32_ucomige",
+    "llvm.x86.sse.ucomigt.ss" => "__builtin_ia32_ucomigt",
+    "llvm.x86.sse.ucomile.ss" => "__builtin_ia32_ucomile",
+    "llvm.x86.sse.ucomilt.ss" => "__builtin_ia32_ucomilt",
+    "llvm.x86.sse.ucomineq.ss" => "__builtin_ia32_ucomineq",
+    "llvm.x86.sse2.add.sd" => "__builtin_ia32_addsd",
+    "llvm.x86.sse2.clflush" => "__builtin_ia32_clflush",
+    "llvm.x86.sse2.cmp.pd" => "__builtin_ia32_cmppd",
+    "llvm.x86.sse2.cmp.sd" => "__builtin_ia32_cmpsd",
+    "llvm.x86.sse2.comieq.sd" => "__builtin_ia32_comisdeq",
+    "llvm.x86.sse2.comige.sd" => "__builtin_ia32_comisdge",
+    "llvm.x86.sse2.comigt.sd" => "__builtin_ia32_comisdgt",
+    "llvm.x86.sse2.comile.sd" => "__builtin_ia32_comisdle",
+    "llvm.x86.sse2.comilt.sd" => "__builtin_ia32_comisdlt",
+    "llvm.x86.sse2.comineq.sd" => "__builtin_ia32_comisdneq",
+    "llvm.x86.sse2.cvtdq2pd" => "__builtin_ia32_cvtdq2pd",
+    "llvm.x86.sse2.cvtdq2ps" => "__builtin_ia32_cvtdq2ps",
+    "llvm.x86.sse2.cvtpd2dq" => "__builtin_ia32_cvtpd2dq",
+    "llvm.x86.sse2.cvtpd2ps" => "__builtin_ia32_cvtpd2ps",
+    "llvm.x86.sse2.cvtps2dq" => "__builtin_ia32_cvtps2dq",
+    "llvm.x86.sse2.cvtps2pd" => "__builtin_ia32_cvtps2pd",
+    "llvm.x86.sse2.cvtsd2si" => "__builtin_ia32_cvtsd2si",
+    "llvm.x86.sse2.cvtsd2si64" => "__builtin_ia32_cvtsd2si64",
+    "llvm.x86.sse2.cvtsd2ss" => "__builtin_ia32_cvtsd2ss",
+    "llvm.x86.sse2.cvtsi2sd" => "__builtin_ia32_cvtsi2sd",
+    "llvm.x86.sse2.cvtsi642sd" => "__builtin_ia32_cvtsi642sd",
+    "llvm.x86.sse2.cvtss2sd" => "__builtin_ia32_cvtss2sd",
+    "llvm.x86.sse2.cvttpd2dq" => "__builtin_ia32_cvttpd2dq",
+    "llvm.x86.sse2.cvttps2dq" => "__builtin_ia32_cvttps2dq",
+    "llvm.x86.sse2.cvttsd2si" => "__builtin_ia32_cvttsd2si",
+    "llvm.x86.sse2.cvttsd2si64" => "__builtin_ia32_cvttsd2si64",
+    "llvm.x86.sse2.div.sd" => "__builtin_ia32_divsd",
+    "llvm.x86.sse2.lfence" => "__builtin_ia32_lfence",
+    "llvm.x86.sse2.maskmov.dqu" => "__builtin_ia32_maskmovdqu",
+    "llvm.x86.sse2.max.pd" => "__builtin_ia32_maxpd",
+    "llvm.x86.sse2.max.sd" => "__builtin_ia32_maxsd",
+    "llvm.x86.sse2.mfence" => "__builtin_ia32_mfence",
+    "llvm.x86.sse2.min.pd" => "__builtin_ia32_minpd",
+    "llvm.x86.sse2.min.sd" => "__builtin_ia32_minsd",
+    "llvm.x86.sse2.movmsk.pd" => "__builtin_ia32_movmskpd",
+    "llvm.x86.sse2.mul.sd" => "__builtin_ia32_mulsd",
+    "llvm.x86.sse2.packssdw.128" => "__builtin_ia32_packssdw128",
+    "llvm.x86.sse2.packsswb.128" => "__builtin_ia32_packsswb128",
+    "llvm.x86.sse2.packuswb.128" => "__builtin_ia32_packuswb128",
+    "llvm.x86.sse2.padds.b" => "__builtin_ia32_paddsb128",
+    "llvm.x86.sse2.padds.w" => "__builtin_ia32_paddsw128",
+    "llvm.x86.sse2.paddus.b" => "__builtin_ia32_paddusb128",
+    "llvm.x86.sse2.paddus.w" => "__builtin_ia32_paddusw128",
+    "llvm.x86.sse2.pause" => "__builtin_ia32_pause",
+    "llvm.x86.sse2.pavg.b" => "__builtin_ia32_pavgb128",
+    "llvm.x86.sse2.pavg.w" => "__builtin_ia32_pavgw128",
+    "llvm.x86.sse2.pmadd.wd" => "__builtin_ia32_pmaddwd128",
+    "llvm.x86.sse2.pmaxs.w" => "__builtin_ia32_pmaxsw128",
+    "llvm.x86.sse2.pmaxu.b" => "__builtin_ia32_pmaxub128",
+    "llvm.x86.sse2.pmins.w" => "__builtin_ia32_pminsw128",
+    "llvm.x86.sse2.pminu.b" => "__builtin_ia32_pminub128",
+    "llvm.x86.sse2.pmovmskb.128" => "__builtin_ia32_pmovmskb128",
+    "llvm.x86.sse2.pmulh.w" => "__builtin_ia32_pmulhw128",
+    "llvm.x86.sse2.pmulhu.w" => "__builtin_ia32_pmulhuw128",
+    "llvm.x86.sse2.pmulu.dq" => "__builtin_ia32_pmuludq128",
+    "llvm.x86.sse2.psad.bw" => "__builtin_ia32_psadbw128",
+    "llvm.x86.sse2.pshuf.d" => "__builtin_ia32_pshufd",
+    "llvm.x86.sse2.pshufh.w" => "__builtin_ia32_pshufhw",
+    "llvm.x86.sse2.pshufl.w" => "__builtin_ia32_pshuflw",
+    "llvm.x86.sse2.psll.d" => "__builtin_ia32_pslld128",
+    "llvm.x86.sse2.psll.dq" => "__builtin_ia32_pslldqi128",
+    "llvm.x86.sse2.psll.dq.bs" => "__builtin_ia32_pslldqi128_byteshift",
+    "llvm.x86.sse2.psll.q" => "__builtin_ia32_psllq128",
+    "llvm.x86.sse2.psll.w" => "__builtin_ia32_psllw128",
+    "llvm.x86.sse2.pslli.d" => "__builtin_ia32_pslldi128",
+    "llvm.x86.sse2.pslli.q" => "__builtin_ia32_psllqi128",
+    "llvm.x86.sse2.pslli.w" => "__builtin_ia32_psllwi128",
+    "llvm.x86.sse2.psra.d" => "__builtin_ia32_psrad128",
+    "llvm.x86.sse2.psra.w" => "__builtin_ia32_psraw128",
+    "llvm.x86.sse2.psrai.d" => "__builtin_ia32_psradi128",
+    "llvm.x86.sse2.psrai.w" => "__builtin_ia32_psrawi128",
+    "llvm.x86.sse2.psrl.d" => "__builtin_ia32_psrld128",
+    "llvm.x86.sse2.psrl.dq" => "__builtin_ia32_psrldqi128",
+    "llvm.x86.sse2.psrl.dq.bs" => "__builtin_ia32_psrldqi128_byteshift",
+    "llvm.x86.sse2.psrl.q" => "__builtin_ia32_psrlq128",
+    "llvm.x86.sse2.psrl.w" => "__builtin_ia32_psrlw128",
+    "llvm.x86.sse2.psrli.d" => "__builtin_ia32_psrldi128",
+    "llvm.x86.sse2.psrli.q" => "__builtin_ia32_psrlqi128",
+    "llvm.x86.sse2.psrli.w" => "__builtin_ia32_psrlwi128",
+    "llvm.x86.sse2.psubs.b" => "__builtin_ia32_psubsb128",
+    "llvm.x86.sse2.psubs.w" => "__builtin_ia32_psubsw128",
+    "llvm.x86.sse2.psubus.b" => "__builtin_ia32_psubusb128",
+    "llvm.x86.sse2.psubus.w" => "__builtin_ia32_psubusw128",
+    "llvm.x86.sse2.sqrt.pd" => "__builtin_ia32_sqrtpd",
+    "llvm.x86.sse2.sqrt.sd" => "__builtin_ia32_sqrtsd",
+    "llvm.x86.sse2.storel.dq" => "__builtin_ia32_storelv4si",
+    "llvm.x86.sse2.storeu.dq" => "__builtin_ia32_storedqu",
+    "llvm.x86.sse2.storeu.pd" => "__builtin_ia32_storeupd",
+    "llvm.x86.sse2.sub.sd" => "__builtin_ia32_subsd",
+    "llvm.x86.sse2.ucomieq.sd" => "__builtin_ia32_ucomisdeq",
+    "llvm.x86.sse2.ucomige.sd" => "__builtin_ia32_ucomisdge",
+    "llvm.x86.sse2.ucomigt.sd" => "__builtin_ia32_ucomisdgt",
+    "llvm.x86.sse2.ucomile.sd" => "__builtin_ia32_ucomisdle",
+    "llvm.x86.sse2.ucomilt.sd" => "__builtin_ia32_ucomisdlt",
+    "llvm.x86.sse2.ucomineq.sd" => "__builtin_ia32_ucomisdneq",
+    "llvm.x86.sse3.addsub.pd" => "__builtin_ia32_addsubpd",
+    "llvm.x86.sse3.addsub.ps" => "__builtin_ia32_addsubps",
+    "llvm.x86.sse3.hadd.pd" => "__builtin_ia32_haddpd",
+    "llvm.x86.sse3.hadd.ps" => "__builtin_ia32_haddps",
+    "llvm.x86.sse3.hsub.pd" => "__builtin_ia32_hsubpd",
+    "llvm.x86.sse3.hsub.ps" => "__builtin_ia32_hsubps",
+    "llvm.x86.sse3.ldu.dq" => "__builtin_ia32_lddqu",
+    "llvm.x86.sse3.monitor" => "__builtin_ia32_monitor",
+    "llvm.x86.sse3.mwait" => "__builtin_ia32_mwait",
+    "llvm.x86.sse41.blendpd" => "__builtin_ia32_blendpd",
+    "llvm.x86.sse41.blendps" => "__builtin_ia32_blendps",
+    "llvm.x86.sse41.blendvpd" => "__builtin_ia32_blendvpd",
+    "llvm.x86.sse41.blendvps" => "__builtin_ia32_blendvps",
+    "llvm.x86.sse41.dppd" => "__builtin_ia32_dppd",
+    "llvm.x86.sse41.dpps" => "__builtin_ia32_dpps",
+    "llvm.x86.sse41.extractps" => "__builtin_ia32_extractps128",
+    "llvm.x86.sse41.insertps" => "__builtin_ia32_insertps128",
+    "llvm.x86.sse41.movntdqa" => "__builtin_ia32_movntdqa",
+    "llvm.x86.sse41.mpsadbw" => "__builtin_ia32_mpsadbw128",
+    "llvm.x86.sse41.packusdw" => "__builtin_ia32_packusdw128",
+    "llvm.x86.sse41.pblendvb" => "__builtin_ia32_pblendvb128",
+    "llvm.x86.sse41.pblendw" => "__builtin_ia32_pblendw128",
+    "llvm.x86.sse41.phminposuw" => "__builtin_ia32_phminposuw128",
+    "llvm.x86.sse41.pmaxsb" => "__builtin_ia32_pmaxsb128",
+    "llvm.x86.sse41.pmaxsd" => "__builtin_ia32_pmaxsd128",
+    "llvm.x86.sse41.pmaxud" => "__builtin_ia32_pmaxud128",
+    "llvm.x86.sse41.pmaxuw" => "__builtin_ia32_pmaxuw128",
+    "llvm.x86.sse41.pminsb" => "__builtin_ia32_pminsb128",
+    "llvm.x86.sse41.pminsd" => "__builtin_ia32_pminsd128",
+    "llvm.x86.sse41.pminud" => "__builtin_ia32_pminud128",
+    "llvm.x86.sse41.pminuw" => "__builtin_ia32_pminuw128",
+    "llvm.x86.sse41.pmovsxbd" => "__builtin_ia32_pmovsxbd128",
+    "llvm.x86.sse41.pmovsxbq" => "__builtin_ia32_pmovsxbq128",
+    "llvm.x86.sse41.pmovsxbw" => "__builtin_ia32_pmovsxbw128",
+    "llvm.x86.sse41.pmovsxdq" => "__builtin_ia32_pmovsxdq128",
+    "llvm.x86.sse41.pmovsxwd" => "__builtin_ia32_pmovsxwd128",
+    "llvm.x86.sse41.pmovsxwq" => "__builtin_ia32_pmovsxwq128",
+    "llvm.x86.sse41.pmovzxbd" => "__builtin_ia32_pmovzxbd128",
+    "llvm.x86.sse41.pmovzxbq" => "__builtin_ia32_pmovzxbq128",
+    "llvm.x86.sse41.pmovzxbw" => "__builtin_ia32_pmovzxbw128",
+    "llvm.x86.sse41.pmovzxdq" => "__builtin_ia32_pmovzxdq128",
+    "llvm.x86.sse41.pmovzxwd" => "__builtin_ia32_pmovzxwd128",
+    "llvm.x86.sse41.pmovzxwq" => "__builtin_ia32_pmovzxwq128",
+    "llvm.x86.sse41.pmuldq" => "__builtin_ia32_pmuldq128",
+    "llvm.x86.sse41.ptestc" => "__builtin_ia32_ptestc128",
+    "llvm.x86.sse41.ptestnzc" => "__builtin_ia32_ptestnzc128",
+    "llvm.x86.sse41.ptestz" => "__builtin_ia32_ptestz128",
+    "llvm.x86.sse41.round.pd" => "__builtin_ia32_roundpd",
+    "llvm.x86.sse41.round.ps" => "__builtin_ia32_roundps",
+    "llvm.x86.sse41.round.sd" => "__builtin_ia32_roundsd",
+    "llvm.x86.sse41.round.ss" => "__builtin_ia32_roundss",
+    "llvm.x86.sse42.crc32.32.16" => "__builtin_ia32_crc32hi",
+    "llvm.x86.sse42.crc32.32.32" => "__builtin_ia32_crc32si",
+    "llvm.x86.sse42.crc32.32.8" => "__builtin_ia32_crc32qi",
+    "llvm.x86.sse42.crc32.64.64" => "__builtin_ia32_crc32di",
+    "llvm.x86.sse42.pcmpestri128" => "__builtin_ia32_pcmpestri128",
+    "llvm.x86.sse42.pcmpestria128" => "__builtin_ia32_pcmpestria128",
+    "llvm.x86.sse42.pcmpestric128" => "__builtin_ia32_pcmpestric128",
+    "llvm.x86.sse42.pcmpestrio128" => "__builtin_ia32_pcmpestrio128",
+    "llvm.x86.sse42.pcmpestris128" => "__builtin_ia32_pcmpestris128",
+    "llvm.x86.sse42.pcmpestriz128" => "__builtin_ia32_pcmpestriz128",
+    "llvm.x86.sse42.pcmpestrm128" => "__builtin_ia32_pcmpestrm128",
+    "llvm.x86.sse42.pcmpistri128" => "__builtin_ia32_pcmpistri128",
+    "llvm.x86.sse42.pcmpistria128" => "__builtin_ia32_pcmpistria128",
+    "llvm.x86.sse42.pcmpistric128" => "__builtin_ia32_pcmpistric128",
+    "llvm.x86.sse42.pcmpistrio128" => "__builtin_ia32_pcmpistrio128",
+    "llvm.x86.sse42.pcmpistris128" => "__builtin_ia32_pcmpistris128",
+    "llvm.x86.sse42.pcmpistriz128" => "__builtin_ia32_pcmpistriz128",
+    "llvm.x86.sse42.pcmpistrm128" => "__builtin_ia32_pcmpistrm128",
+    "llvm.x86.sse4a.extrq" => "__builtin_ia32_extrq",
+    "llvm.x86.sse4a.extrqi" => "__builtin_ia32_extrqi",
+    "llvm.x86.sse4a.insertq" => "__builtin_ia32_insertq",
+    "llvm.x86.sse4a.insertqi" => "__builtin_ia32_insertqi",
+    "llvm.x86.sse4a.movnt.sd" => "__builtin_ia32_movntsd",
+    "llvm.x86.sse4a.movnt.ss" => "__builtin_ia32_movntss",
+    "llvm.x86.ssse3.pabs.b.128" => "__builtin_ia32_pabsb128",
+    "llvm.x86.ssse3.pabs.d.128" => "__builtin_ia32_pabsd128",
+    "llvm.x86.ssse3.pabs.w.128" => "__builtin_ia32_pabsw128",
+    "llvm.x86.ssse3.phadd.d.128" => "__builtin_ia32_phaddd128",
+    "llvm.x86.ssse3.phadd.sw.128" => "__builtin_ia32_phaddsw128",
+    "llvm.x86.ssse3.phadd.w.128" => "__builtin_ia32_phaddw128",
+    "llvm.x86.ssse3.phsub.d.128" => "__builtin_ia32_phsubd128",
+    "llvm.x86.ssse3.phsub.sw.128" => "__builtin_ia32_phsubsw128",
+    "llvm.x86.ssse3.phsub.w.128" => "__builtin_ia32_phsubw128",
+    "llvm.x86.ssse3.pmadd.ub.sw.128" => "__builtin_ia32_pmaddubsw128",
+    "llvm.x86.ssse3.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128",
+    "llvm.x86.ssse3.pshuf.b.128" => "__builtin_ia32_pshufb128",
+    "llvm.x86.ssse3.psign.b.128" => "__builtin_ia32_psignb128",
+    "llvm.x86.ssse3.psign.d.128" => "__builtin_ia32_psignd128",
+    "llvm.x86.ssse3.psign.w.128" => "__builtin_ia32_psignw128",
+    "llvm.x86.subborrow.u32" => "__builtin_ia32_subborrow_u32",
+    "llvm.x86.subborrow.u64" => "__builtin_ia32_subborrow_u64",
+    "llvm.x86.tbm.bextri.u32" => "__builtin_ia32_bextri_u32",
+    "llvm.x86.tbm.bextri.u64" => "__builtin_ia32_bextri_u64",
+    "llvm.x86.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps",
+    "llvm.x86.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256",
+    "llvm.x86.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph",
+    "llvm.x86.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256",
+    "llvm.x86.wrfsbase.32" => "__builtin_ia32_wrfsbase32",
+    "llvm.x86.wrfsbase.64" => "__builtin_ia32_wrfsbase64",
+    "llvm.x86.wrgsbase.32" => "__builtin_ia32_wrgsbase32",
+    "llvm.x86.wrgsbase.64" => "__builtin_ia32_wrgsbase64",
+    "llvm.x86.xabort" => "__builtin_ia32_xabort",
+    "llvm.x86.xbegin" => "__builtin_ia32_xbegin",
+    "llvm.x86.xend" => "__builtin_ia32_xend",
+    "llvm.x86.xop.vfrcz.pd" => "__builtin_ia32_vfrczpd",
+    "llvm.x86.xop.vfrcz.pd.256" => "__builtin_ia32_vfrczpd256",
+    "llvm.x86.xop.vfrcz.ps" => "__builtin_ia32_vfrczps",
+    "llvm.x86.xop.vfrcz.ps.256" => "__builtin_ia32_vfrczps256",
+    "llvm.x86.xop.vfrcz.sd" => "__builtin_ia32_vfrczsd",
+    "llvm.x86.xop.vfrcz.ss" => "__builtin_ia32_vfrczss",
+    "llvm.x86.xop.vpcmov" => "__builtin_ia32_vpcmov",
+    "llvm.x86.xop.vpcmov.256" => "__builtin_ia32_vpcmov_256",
+    "llvm.x86.xop.vpcomb" => "__builtin_ia32_vpcomb",
+    "llvm.x86.xop.vpcomd" => "__builtin_ia32_vpcomd",
+    "llvm.x86.xop.vpcomq" => "__builtin_ia32_vpcomq",
+    "llvm.x86.xop.vpcomub" => "__builtin_ia32_vpcomub",
+    "llvm.x86.xop.vpcomud" => "__builtin_ia32_vpcomud",
+    "llvm.x86.xop.vpcomuq" => "__builtin_ia32_vpcomuq",
+    "llvm.x86.xop.vpcomuw" => "__builtin_ia32_vpcomuw",
+    "llvm.x86.xop.vpcomw" => "__builtin_ia32_vpcomw",
+    "llvm.x86.xop.vpermil2pd" => "__builtin_ia32_vpermil2pd",
+    "llvm.x86.xop.vpermil2pd.256" => "__builtin_ia32_vpermil2pd256",
+    "llvm.x86.xop.vpermil2ps" => "__builtin_ia32_vpermil2ps",
+    "llvm.x86.xop.vpermil2ps.256" => "__builtin_ia32_vpermil2ps256",
+    "llvm.x86.xop.vphaddbd" => "__builtin_ia32_vphaddbd",
+    "llvm.x86.xop.vphaddbq" => "__builtin_ia32_vphaddbq",
+    "llvm.x86.xop.vphaddbw" => "__builtin_ia32_vphaddbw",
+    "llvm.x86.xop.vphadddq" => "__builtin_ia32_vphadddq",
+    "llvm.x86.xop.vphaddubd" => "__builtin_ia32_vphaddubd",
+    "llvm.x86.xop.vphaddubq" => "__builtin_ia32_vphaddubq",
+    "llvm.x86.xop.vphaddubw" => "__builtin_ia32_vphaddubw",
+    "llvm.x86.xop.vphaddudq" => "__builtin_ia32_vphaddudq",
+    "llvm.x86.xop.vphadduwd" => "__builtin_ia32_vphadduwd",
+    "llvm.x86.xop.vphadduwq" => "__builtin_ia32_vphadduwq",
+    "llvm.x86.xop.vphaddwd" => "__builtin_ia32_vphaddwd",
+    "llvm.x86.xop.vphaddwq" => "__builtin_ia32_vphaddwq",
+    "llvm.x86.xop.vphsubbw" => "__builtin_ia32_vphsubbw",
+    "llvm.x86.xop.vphsubdq" => "__builtin_ia32_vphsubdq",
+    "llvm.x86.xop.vphsubwd" => "__builtin_ia32_vphsubwd",
+    "llvm.x86.xop.vpmacsdd" => "__builtin_ia32_vpmacsdd",
+    "llvm.x86.xop.vpmacsdqh" => "__builtin_ia32_vpmacsdqh",
+    "llvm.x86.xop.vpmacsdql" => "__builtin_ia32_vpmacsdql",
+    "llvm.x86.xop.vpmacssdd" => "__builtin_ia32_vpmacssdd",
+    "llvm.x86.xop.vpmacssdqh" => "__builtin_ia32_vpmacssdqh",
+    "llvm.x86.xop.vpmacssdql" => "__builtin_ia32_vpmacssdql",
+    "llvm.x86.xop.vpmacsswd" => "__builtin_ia32_vpmacsswd",
+    "llvm.x86.xop.vpmacssww" => "__builtin_ia32_vpmacssww",
+    "llvm.x86.xop.vpmacswd" => "__builtin_ia32_vpmacswd",
+    "llvm.x86.xop.vpmacsww" => "__builtin_ia32_vpmacsww",
+    "llvm.x86.xop.vpmadcsswd" => "__builtin_ia32_vpmadcsswd",
+    "llvm.x86.xop.vpmadcswd" => "__builtin_ia32_vpmadcswd",
+    "llvm.x86.xop.vpperm" => "__builtin_ia32_vpperm",
+    "llvm.x86.xop.vprotb" => "__builtin_ia32_vprotb",
+    "llvm.x86.xop.vprotbi" => "__builtin_ia32_vprotbi",
+    "llvm.x86.xop.vprotd" => "__builtin_ia32_vprotd",
+    "llvm.x86.xop.vprotdi" => "__builtin_ia32_vprotdi",
+    "llvm.x86.xop.vprotq" => "__builtin_ia32_vprotq",
+    "llvm.x86.xop.vprotqi" => "__builtin_ia32_vprotqi",
+    "llvm.x86.xop.vprotw" => "__builtin_ia32_vprotw",
+    "llvm.x86.xop.vprotwi" => "__builtin_ia32_vprotwi",
+    "llvm.x86.xop.vpshab" => "__builtin_ia32_vpshab",
+    "llvm.x86.xop.vpshad" => "__builtin_ia32_vpshad",
+    "llvm.x86.xop.vpshaq" => "__builtin_ia32_vpshaq",
+    "llvm.x86.xop.vpshaw" => "__builtin_ia32_vpshaw",
+    "llvm.x86.xop.vpshlb" => "__builtin_ia32_vpshlb",
+    "llvm.x86.xop.vpshld" => "__builtin_ia32_vpshld",
+    "llvm.x86.xop.vpshlq" => "__builtin_ia32_vpshlq",
+    "llvm.x86.xop.vpshlw" => "__builtin_ia32_vpshlw",
+    "llvm.x86.xtest" => "__builtin_ia32_xtest",
+    // AMDGPU
+    "llvm.AMDGPU.div.fixup.f32" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fixup.f64" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fixup.v2f64" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fixup.v4f32" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fmas.f32" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.div.fmas.f64" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.div.fmas.v2f64" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.div.fmas.v4f32" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.ldexp.f32" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.ldexp.f64" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.ldexp.v2f64" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.ldexp.v4f32" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.rcp.f32" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rcp.f64" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rcp.v2f64" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rcp.v4f32" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rsq.clamped.f32" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.clamped.f64" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.clamped.v2f64" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.clamped.v4f32" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.f32" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.rsq.f64" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.rsq.v2f64" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.rsq.v4f32" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.trig.preop.f32" => "__builtin_amdgpu_trig_preop",
+    "llvm.AMDGPU.trig.preop.f64" => "__builtin_amdgpu_trig_preop",
+    "llvm.AMDGPU.trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
+    "llvm.AMDGPU.trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
+    // mips
+    "llvm.mips.add.a.b" => "__builtin_msa_add_a_b",
+    "llvm.mips.add.a.d" => "__builtin_msa_add_a_d",
+    "llvm.mips.add.a.h" => "__builtin_msa_add_a_h",
+    "llvm.mips.add.a.w" => "__builtin_msa_add_a_w",
+    "llvm.mips.adds.a.b" => "__builtin_msa_adds_a_b",
+    "llvm.mips.adds.a.d" => "__builtin_msa_adds_a_d",
+    "llvm.mips.adds.a.h" => "__builtin_msa_adds_a_h",
+    "llvm.mips.adds.a.w" => "__builtin_msa_adds_a_w",
+    "llvm.mips.adds.s.b" => "__builtin_msa_adds_s_b",
+    "llvm.mips.adds.s.d" => "__builtin_msa_adds_s_d",
+    "llvm.mips.adds.s.h" => "__builtin_msa_adds_s_h",
+    "llvm.mips.adds.s.w" => "__builtin_msa_adds_s_w",
+    "llvm.mips.adds.u.b" => "__builtin_msa_adds_u_b",
+    "llvm.mips.adds.u.d" => "__builtin_msa_adds_u_d",
+    "llvm.mips.adds.u.h" => "__builtin_msa_adds_u_h",
+    "llvm.mips.adds.u.w" => "__builtin_msa_adds_u_w",
+    "llvm.mips.addsc" => "__builtin_mips_addsc",
+    "llvm.mips.addu.ph" => "__builtin_mips_addu_ph",
+    "llvm.mips.addu.qb" => "__builtin_mips_addu_qb",
+    "llvm.mips.addu.s.ph" => "__builtin_mips_addu_s_ph",
+    "llvm.mips.addu.s.qb" => "__builtin_mips_addu_s_qb",
+    "llvm.mips.adduh.qb" => "__builtin_mips_adduh_qb",
+    "llvm.mips.adduh.r.qb" => "__builtin_mips_adduh_r_qb",
+    "llvm.mips.addv.b" => "__builtin_msa_addv_b",
+    "llvm.mips.addv.d" => "__builtin_msa_addv_d",
+    "llvm.mips.addv.h" => "__builtin_msa_addv_h",
+    "llvm.mips.addv.w" => "__builtin_msa_addv_w",
+    "llvm.mips.addvi.b" => "__builtin_msa_addvi_b",
+    "llvm.mips.addvi.d" => "__builtin_msa_addvi_d",
+    "llvm.mips.addvi.h" => "__builtin_msa_addvi_h",
+    "llvm.mips.addvi.w" => "__builtin_msa_addvi_w",
+    "llvm.mips.addwc" => "__builtin_mips_addwc",
+    "llvm.mips.and.v" => "__builtin_msa_and_v",
+    "llvm.mips.andi.b" => "__builtin_msa_andi_b",
+    "llvm.mips.append" => "__builtin_mips_append",
+    "llvm.mips.asub.s.b" => "__builtin_msa_asub_s_b",
+    "llvm.mips.asub.s.d" => "__builtin_msa_asub_s_d",
+    "llvm.mips.asub.s.h" => "__builtin_msa_asub_s_h",
+    "llvm.mips.asub.s.w" => "__builtin_msa_asub_s_w",
+    "llvm.mips.asub.u.b" => "__builtin_msa_asub_u_b",
+    "llvm.mips.asub.u.d" => "__builtin_msa_asub_u_d",
+    "llvm.mips.asub.u.h" => "__builtin_msa_asub_u_h",
+    "llvm.mips.asub.u.w" => "__builtin_msa_asub_u_w",
+    "llvm.mips.ave.s.b" => "__builtin_msa_ave_s_b",
+    "llvm.mips.ave.s.d" => "__builtin_msa_ave_s_d",
+    "llvm.mips.ave.s.h" => "__builtin_msa_ave_s_h",
+    "llvm.mips.ave.s.w" => "__builtin_msa_ave_s_w",
+    "llvm.mips.ave.u.b" => "__builtin_msa_ave_u_b",
+    "llvm.mips.ave.u.d" => "__builtin_msa_ave_u_d",
+    "llvm.mips.ave.u.h" => "__builtin_msa_ave_u_h",
+    "llvm.mips.ave.u.w" => "__builtin_msa_ave_u_w",
+    "llvm.mips.aver.s.b" => "__builtin_msa_aver_s_b",
+    "llvm.mips.aver.s.d" => "__builtin_msa_aver_s_d",
+    "llvm.mips.aver.s.h" => "__builtin_msa_aver_s_h",
+    "llvm.mips.aver.s.w" => "__builtin_msa_aver_s_w",
+    "llvm.mips.aver.u.b" => "__builtin_msa_aver_u_b",
+    "llvm.mips.aver.u.d" => "__builtin_msa_aver_u_d",
+    "llvm.mips.aver.u.h" => "__builtin_msa_aver_u_h",
+    "llvm.mips.aver.u.w" => "__builtin_msa_aver_u_w",
+    "llvm.mips.balign" => "__builtin_mips_balign",
+    "llvm.mips.bclr.b" => "__builtin_msa_bclr_b",
+    "llvm.mips.bclr.d" => "__builtin_msa_bclr_d",
+    "llvm.mips.bclr.h" => "__builtin_msa_bclr_h",
+    "llvm.mips.bclr.w" => "__builtin_msa_bclr_w",
+    "llvm.mips.bclri.b" => "__builtin_msa_bclri_b",
+    "llvm.mips.bclri.d" => "__builtin_msa_bclri_d",
+    "llvm.mips.bclri.h" => "__builtin_msa_bclri_h",
+    "llvm.mips.bclri.w" => "__builtin_msa_bclri_w",
+    "llvm.mips.binsl.b" => "__builtin_msa_binsl_b",
+    "llvm.mips.binsl.d" => "__builtin_msa_binsl_d",
+    "llvm.mips.binsl.h" => "__builtin_msa_binsl_h",
+    "llvm.mips.binsl.w" => "__builtin_msa_binsl_w",
+    "llvm.mips.binsli.b" => "__builtin_msa_binsli_b",
+    "llvm.mips.binsli.d" => "__builtin_msa_binsli_d",
+    "llvm.mips.binsli.h" => "__builtin_msa_binsli_h",
+    "llvm.mips.binsli.w" => "__builtin_msa_binsli_w",
+    "llvm.mips.binsr.b" => "__builtin_msa_binsr_b",
+    "llvm.mips.binsr.d" => "__builtin_msa_binsr_d",
+    "llvm.mips.binsr.h" => "__builtin_msa_binsr_h",
+    "llvm.mips.binsr.w" => "__builtin_msa_binsr_w",
+    "llvm.mips.binsri.b" => "__builtin_msa_binsri_b",
+    "llvm.mips.binsri.d" => "__builtin_msa_binsri_d",
+    "llvm.mips.binsri.h" => "__builtin_msa_binsri_h",
+    "llvm.mips.binsri.w" => "__builtin_msa_binsri_w",
+    "llvm.mips.bitrev" => "__builtin_mips_bitrev",
+    "llvm.mips.bmnz.v" => "__builtin_msa_bmnz_v",
+    "llvm.mips.bmnzi.b" => "__builtin_msa_bmnzi_b",
+    "llvm.mips.bmz.v" => "__builtin_msa_bmz_v",
+    "llvm.mips.bmzi.b" => "__builtin_msa_bmzi_b",
+    "llvm.mips.bneg.b" => "__builtin_msa_bneg_b",
+    "llvm.mips.bneg.d" => "__builtin_msa_bneg_d",
+    "llvm.mips.bneg.h" => "__builtin_msa_bneg_h",
+    "llvm.mips.bneg.w" => "__builtin_msa_bneg_w",
+    "llvm.mips.bnegi.b" => "__builtin_msa_bnegi_b",
+    "llvm.mips.bnegi.d" => "__builtin_msa_bnegi_d",
+    "llvm.mips.bnegi.h" => "__builtin_msa_bnegi_h",
+    "llvm.mips.bnegi.w" => "__builtin_msa_bnegi_w",
+    "llvm.mips.bnz.b" => "__builtin_msa_bnz_b",
+    "llvm.mips.bnz.d" => "__builtin_msa_bnz_d",
+    "llvm.mips.bnz.h" => "__builtin_msa_bnz_h",
+    "llvm.mips.bnz.v" => "__builtin_msa_bnz_v",
+    "llvm.mips.bnz.w" => "__builtin_msa_bnz_w",
+    "llvm.mips.bposge32" => "__builtin_mips_bposge32",
+    "llvm.mips.bsel.v" => "__builtin_msa_bsel_v",
+    "llvm.mips.bseli.b" => "__builtin_msa_bseli_b",
+    "llvm.mips.bset.b" => "__builtin_msa_bset_b",
+    "llvm.mips.bset.d" => "__builtin_msa_bset_d",
+    "llvm.mips.bset.h" => "__builtin_msa_bset_h",
+    "llvm.mips.bset.w" => "__builtin_msa_bset_w",
+    "llvm.mips.bseti.b" => "__builtin_msa_bseti_b",
+    "llvm.mips.bseti.d" => "__builtin_msa_bseti_d",
+    "llvm.mips.bseti.h" => "__builtin_msa_bseti_h",
+    "llvm.mips.bseti.w" => "__builtin_msa_bseti_w",
+    "llvm.mips.bz.b" => "__builtin_msa_bz_b",
+    "llvm.mips.bz.d" => "__builtin_msa_bz_d",
+    "llvm.mips.bz.h" => "__builtin_msa_bz_h",
+    "llvm.mips.bz.v" => "__builtin_msa_bz_v",
+    "llvm.mips.bz.w" => "__builtin_msa_bz_w",
+    "llvm.mips.ceq.b" => "__builtin_msa_ceq_b",
+    "llvm.mips.ceq.d" => "__builtin_msa_ceq_d",
+    "llvm.mips.ceq.h" => "__builtin_msa_ceq_h",
+    "llvm.mips.ceq.w" => "__builtin_msa_ceq_w",
+    "llvm.mips.ceqi.b" => "__builtin_msa_ceqi_b",
+    "llvm.mips.ceqi.d" => "__builtin_msa_ceqi_d",
+    "llvm.mips.ceqi.h" => "__builtin_msa_ceqi_h",
+    "llvm.mips.ceqi.w" => "__builtin_msa_ceqi_w",
+    "llvm.mips.cfcmsa" => "__builtin_msa_cfcmsa",
+    "llvm.mips.cle.s.b" => "__builtin_msa_cle_s_b",
+    "llvm.mips.cle.s.d" => "__builtin_msa_cle_s_d",
+    "llvm.mips.cle.s.h" => "__builtin_msa_cle_s_h",
+    "llvm.mips.cle.s.w" => "__builtin_msa_cle_s_w",
+    "llvm.mips.cle.u.b" => "__builtin_msa_cle_u_b",
+    "llvm.mips.cle.u.d" => "__builtin_msa_cle_u_d",
+    "llvm.mips.cle.u.h" => "__builtin_msa_cle_u_h",
+    "llvm.mips.cle.u.w" => "__builtin_msa_cle_u_w",
+    "llvm.mips.clei.s.b" => "__builtin_msa_clei_s_b",
+    "llvm.mips.clei.s.d" => "__builtin_msa_clei_s_d",
+    "llvm.mips.clei.s.h" => "__builtin_msa_clei_s_h",
+    "llvm.mips.clei.s.w" => "__builtin_msa_clei_s_w",
+    "llvm.mips.clei.u.b" => "__builtin_msa_clei_u_b",
+    "llvm.mips.clei.u.d" => "__builtin_msa_clei_u_d",
+    "llvm.mips.clei.u.h" => "__builtin_msa_clei_u_h",
+    "llvm.mips.clei.u.w" => "__builtin_msa_clei_u_w",
+    "llvm.mips.clt.s.b" => "__builtin_msa_clt_s_b",
+    "llvm.mips.clt.s.d" => "__builtin_msa_clt_s_d",
+    "llvm.mips.clt.s.h" => "__builtin_msa_clt_s_h",
+    "llvm.mips.clt.s.w" => "__builtin_msa_clt_s_w",
+    "llvm.mips.clt.u.b" => "__builtin_msa_clt_u_b",
+    "llvm.mips.clt.u.d" => "__builtin_msa_clt_u_d",
+    "llvm.mips.clt.u.h" => "__builtin_msa_clt_u_h",
+    "llvm.mips.clt.u.w" => "__builtin_msa_clt_u_w",
+    "llvm.mips.clti.s.b" => "__builtin_msa_clti_s_b",
+    "llvm.mips.clti.s.d" => "__builtin_msa_clti_s_d",
+    "llvm.mips.clti.s.h" => "__builtin_msa_clti_s_h",
+    "llvm.mips.clti.s.w" => "__builtin_msa_clti_s_w",
+    "llvm.mips.clti.u.b" => "__builtin_msa_clti_u_b",
+    "llvm.mips.clti.u.d" => "__builtin_msa_clti_u_d",
+    "llvm.mips.clti.u.h" => "__builtin_msa_clti_u_h",
+    "llvm.mips.clti.u.w" => "__builtin_msa_clti_u_w",
+    "llvm.mips.cmpgdu.eq.qb" => "__builtin_mips_cmpgdu_eq_qb",
+    "llvm.mips.cmpgdu.le.qb" => "__builtin_mips_cmpgdu_le_qb",
+    "llvm.mips.cmpgdu.lt.qb" => "__builtin_mips_cmpgdu_lt_qb",
+    "llvm.mips.cmpgu.eq.qb" => "__builtin_mips_cmpgu_eq_qb",
+    "llvm.mips.cmpgu.le.qb" => "__builtin_mips_cmpgu_le_qb",
+    "llvm.mips.cmpgu.lt.qb" => "__builtin_mips_cmpgu_lt_qb",
+    "llvm.mips.cmpu.eq.qb" => "__builtin_mips_cmpu_eq_qb",
+    "llvm.mips.cmpu.le.qb" => "__builtin_mips_cmpu_le_qb",
+    "llvm.mips.cmpu.lt.qb" => "__builtin_mips_cmpu_lt_qb",
+    "llvm.mips.copy.s.b" => "__builtin_msa_copy_s_b",
+    "llvm.mips.copy.s.d" => "__builtin_msa_copy_s_d",
+    "llvm.mips.copy.s.h" => "__builtin_msa_copy_s_h",
+    "llvm.mips.copy.s.w" => "__builtin_msa_copy_s_w",
+    "llvm.mips.copy.u.b" => "__builtin_msa_copy_u_b",
+    "llvm.mips.copy.u.d" => "__builtin_msa_copy_u_d",
+    "llvm.mips.copy.u.h" => "__builtin_msa_copy_u_h",
+    "llvm.mips.copy.u.w" => "__builtin_msa_copy_u_w",
+    "llvm.mips.ctcmsa" => "__builtin_msa_ctcmsa",
+    "llvm.mips.div.s.b" => "__builtin_msa_div_s_b",
+    "llvm.mips.div.s.d" => "__builtin_msa_div_s_d",
+    "llvm.mips.div.s.h" => "__builtin_msa_div_s_h",
+    "llvm.mips.div.s.w" => "__builtin_msa_div_s_w",
+    "llvm.mips.div.u.b" => "__builtin_msa_div_u_b",
+    "llvm.mips.div.u.d" => "__builtin_msa_div_u_d",
+    "llvm.mips.div.u.h" => "__builtin_msa_div_u_h",
+    "llvm.mips.div.u.w" => "__builtin_msa_div_u_w",
+    "llvm.mips.dlsa" => "__builtin_mips_dlsa",
+    "llvm.mips.dotp.s.d" => "__builtin_msa_dotp_s_d",
+    "llvm.mips.dotp.s.h" => "__builtin_msa_dotp_s_h",
+    "llvm.mips.dotp.s.w" => "__builtin_msa_dotp_s_w",
+    "llvm.mips.dotp.u.d" => "__builtin_msa_dotp_u_d",
+    "llvm.mips.dotp.u.h" => "__builtin_msa_dotp_u_h",
+    "llvm.mips.dotp.u.w" => "__builtin_msa_dotp_u_w",
+    "llvm.mips.dpa.w.ph" => "__builtin_mips_dpa_w_ph",
+    "llvm.mips.dpadd.s.d" => "__builtin_msa_dpadd_s_d",
+    "llvm.mips.dpadd.s.h" => "__builtin_msa_dpadd_s_h",
+    "llvm.mips.dpadd.s.w" => "__builtin_msa_dpadd_s_w",
+    "llvm.mips.dpadd.u.d" => "__builtin_msa_dpadd_u_d",
+    "llvm.mips.dpadd.u.h" => "__builtin_msa_dpadd_u_h",
+    "llvm.mips.dpadd.u.w" => "__builtin_msa_dpadd_u_w",
+    "llvm.mips.dpau.h.qbl" => "__builtin_mips_dpau_h_qbl",
+    "llvm.mips.dpau.h.qbr" => "__builtin_mips_dpau_h_qbr",
+    "llvm.mips.dpax.w.ph" => "__builtin_mips_dpax_w_ph",
+    "llvm.mips.dps.w.ph" => "__builtin_mips_dps_w_ph",
+    "llvm.mips.dpsu.h.qbl" => "__builtin_mips_dpsu_h_qbl",
+    "llvm.mips.dpsu.h.qbr" => "__builtin_mips_dpsu_h_qbr",
+    "llvm.mips.dpsub.s.d" => "__builtin_msa_dpsub_s_d",
+    "llvm.mips.dpsub.s.h" => "__builtin_msa_dpsub_s_h",
+    "llvm.mips.dpsub.s.w" => "__builtin_msa_dpsub_s_w",
+    "llvm.mips.dpsub.u.d" => "__builtin_msa_dpsub_u_d",
+    "llvm.mips.dpsub.u.h" => "__builtin_msa_dpsub_u_h",
+    "llvm.mips.dpsub.u.w" => "__builtin_msa_dpsub_u_w",
+    "llvm.mips.dpsx.w.ph" => "__builtin_mips_dpsx_w_ph",
+    "llvm.mips.extp" => "__builtin_mips_extp",
+    "llvm.mips.extpdp" => "__builtin_mips_extpdp",
+    "llvm.mips.extr.r.w" => "__builtin_mips_extr_r_w",
+    "llvm.mips.extr.rs.w" => "__builtin_mips_extr_rs_w",
+    "llvm.mips.extr.s.h" => "__builtin_mips_extr_s_h",
+    "llvm.mips.extr.w" => "__builtin_mips_extr_w",
+    "llvm.mips.fadd.d" => "__builtin_msa_fadd_d",
+    "llvm.mips.fadd.w" => "__builtin_msa_fadd_w",
+    "llvm.mips.fcaf.d" => "__builtin_msa_fcaf_d",
+    "llvm.mips.fcaf.w" => "__builtin_msa_fcaf_w",
+    "llvm.mips.fceq.d" => "__builtin_msa_fceq_d",
+    "llvm.mips.fceq.w" => "__builtin_msa_fceq_w",
+    "llvm.mips.fclass.d" => "__builtin_msa_fclass_d",
+    "llvm.mips.fclass.w" => "__builtin_msa_fclass_w",
+    "llvm.mips.fcle.d" => "__builtin_msa_fcle_d",
+    "llvm.mips.fcle.w" => "__builtin_msa_fcle_w",
+    "llvm.mips.fclt.d" => "__builtin_msa_fclt_d",
+    "llvm.mips.fclt.w" => "__builtin_msa_fclt_w",
+    "llvm.mips.fcne.d" => "__builtin_msa_fcne_d",
+    "llvm.mips.fcne.w" => "__builtin_msa_fcne_w",
+    "llvm.mips.fcor.d" => "__builtin_msa_fcor_d",
+    "llvm.mips.fcor.w" => "__builtin_msa_fcor_w",
+    "llvm.mips.fcueq.d" => "__builtin_msa_fcueq_d",
+    "llvm.mips.fcueq.w" => "__builtin_msa_fcueq_w",
+    "llvm.mips.fcule.d" => "__builtin_msa_fcule_d",
+    "llvm.mips.fcule.w" => "__builtin_msa_fcule_w",
+    "llvm.mips.fcult.d" => "__builtin_msa_fcult_d",
+    "llvm.mips.fcult.w" => "__builtin_msa_fcult_w",
+    "llvm.mips.fcun.d" => "__builtin_msa_fcun_d",
+    "llvm.mips.fcun.w" => "__builtin_msa_fcun_w",
+    "llvm.mips.fcune.d" => "__builtin_msa_fcune_d",
+    "llvm.mips.fcune.w" => "__builtin_msa_fcune_w",
+    "llvm.mips.fdiv.d" => "__builtin_msa_fdiv_d",
+    "llvm.mips.fdiv.w" => "__builtin_msa_fdiv_w",
+    "llvm.mips.fexdo.w" => "__builtin_msa_fexdo_w",
+    "llvm.mips.fexp2.d" => "__builtin_msa_fexp2_d",
+    "llvm.mips.fexp2.w" => "__builtin_msa_fexp2_w",
+    "llvm.mips.fexupl.d" => "__builtin_msa_fexupl_d",
+    "llvm.mips.fexupr.d" => "__builtin_msa_fexupr_d",
+    "llvm.mips.ffint.s.d" => "__builtin_msa_ffint_s_d",
+    "llvm.mips.ffint.s.w" => "__builtin_msa_ffint_s_w",
+    "llvm.mips.ffint.u.d" => "__builtin_msa_ffint_u_d",
+    "llvm.mips.ffint.u.w" => "__builtin_msa_ffint_u_w",
+    "llvm.mips.ffql.d" => "__builtin_msa_ffql_d",
+    "llvm.mips.ffql.w" => "__builtin_msa_ffql_w",
+    "llvm.mips.ffqr.d" => "__builtin_msa_ffqr_d",
+    "llvm.mips.ffqr.w" => "__builtin_msa_ffqr_w",
+    "llvm.mips.fill.b" => "__builtin_msa_fill_b",
+    "llvm.mips.fill.d" => "__builtin_msa_fill_d",
+    "llvm.mips.fill.h" => "__builtin_msa_fill_h",
+    "llvm.mips.fill.w" => "__builtin_msa_fill_w",
+    "llvm.mips.flog2.d" => "__builtin_msa_flog2_d",
+    "llvm.mips.flog2.w" => "__builtin_msa_flog2_w",
+    "llvm.mips.fmadd.d" => "__builtin_msa_fmadd_d",
+    "llvm.mips.fmadd.w" => "__builtin_msa_fmadd_w",
+    "llvm.mips.fmax.a.d" => "__builtin_msa_fmax_a_d",
+    "llvm.mips.fmax.a.w" => "__builtin_msa_fmax_a_w",
+    "llvm.mips.fmax.d" => "__builtin_msa_fmax_d",
+    "llvm.mips.fmax.w" => "__builtin_msa_fmax_w",
+    "llvm.mips.fmin.a.d" => "__builtin_msa_fmin_a_d",
+    "llvm.mips.fmin.a.w" => "__builtin_msa_fmin_a_w",
+    "llvm.mips.fmin.d" => "__builtin_msa_fmin_d",
+    "llvm.mips.fmin.w" => "__builtin_msa_fmin_w",
+    "llvm.mips.fmsub.d" => "__builtin_msa_fmsub_d",
+    "llvm.mips.fmsub.w" => "__builtin_msa_fmsub_w",
+    "llvm.mips.fmul.d" => "__builtin_msa_fmul_d",
+    "llvm.mips.fmul.w" => "__builtin_msa_fmul_w",
+    "llvm.mips.frcp.d" => "__builtin_msa_frcp_d",
+    "llvm.mips.frcp.w" => "__builtin_msa_frcp_w",
+    "llvm.mips.frint.d" => "__builtin_msa_frint_d",
+    "llvm.mips.frint.w" => "__builtin_msa_frint_w",
+    "llvm.mips.frsqrt.d" => "__builtin_msa_frsqrt_d",
+    "llvm.mips.frsqrt.w" => "__builtin_msa_frsqrt_w",
+    "llvm.mips.fsaf.d" => "__builtin_msa_fsaf_d",
+    "llvm.mips.fsaf.w" => "__builtin_msa_fsaf_w",
+    "llvm.mips.fseq.d" => "__builtin_msa_fseq_d",
+    "llvm.mips.fseq.w" => "__builtin_msa_fseq_w",
+    "llvm.mips.fsle.d" => "__builtin_msa_fsle_d",
+    "llvm.mips.fsle.w" => "__builtin_msa_fsle_w",
+    "llvm.mips.fslt.d" => "__builtin_msa_fslt_d",
+    "llvm.mips.fslt.w" => "__builtin_msa_fslt_w",
+    "llvm.mips.fsne.d" => "__builtin_msa_fsne_d",
+    "llvm.mips.fsne.w" => "__builtin_msa_fsne_w",
+    "llvm.mips.fsor.d" => "__builtin_msa_fsor_d",
+    "llvm.mips.fsor.w" => "__builtin_msa_fsor_w",
+    "llvm.mips.fsqrt.d" => "__builtin_msa_fsqrt_d",
+    "llvm.mips.fsqrt.w" => "__builtin_msa_fsqrt_w",
+    "llvm.mips.fsub.d" => "__builtin_msa_fsub_d",
+    "llvm.mips.fsub.w" => "__builtin_msa_fsub_w",
+    "llvm.mips.fsueq.d" => "__builtin_msa_fsueq_d",
+    "llvm.mips.fsueq.w" => "__builtin_msa_fsueq_w",
+    "llvm.mips.fsule.d" => "__builtin_msa_fsule_d",
+    "llvm.mips.fsule.w" => "__builtin_msa_fsule_w",
+    "llvm.mips.fsult.d" => "__builtin_msa_fsult_d",
+    "llvm.mips.fsult.w" => "__builtin_msa_fsult_w",
+    "llvm.mips.fsun.d" => "__builtin_msa_fsun_d",
+    "llvm.mips.fsun.w" => "__builtin_msa_fsun_w",
+    "llvm.mips.fsune.d" => "__builtin_msa_fsune_d",
+    "llvm.mips.fsune.w" => "__builtin_msa_fsune_w",
+    "llvm.mips.ftint.s.d" => "__builtin_msa_ftint_s_d",
+    "llvm.mips.ftint.s.w" => "__builtin_msa_ftint_s_w",
+    "llvm.mips.ftint.u.d" => "__builtin_msa_ftint_u_d",
+    "llvm.mips.ftint.u.w" => "__builtin_msa_ftint_u_w",
+    "llvm.mips.ftq.h" => "__builtin_msa_ftq_h",
+    "llvm.mips.ftq.w" => "__builtin_msa_ftq_w",
+    "llvm.mips.ftrunc.s.d" => "__builtin_msa_ftrunc_s_d",
+    "llvm.mips.ftrunc.s.w" => "__builtin_msa_ftrunc_s_w",
+    "llvm.mips.ftrunc.u.d" => "__builtin_msa_ftrunc_u_d",
+    "llvm.mips.ftrunc.u.w" => "__builtin_msa_ftrunc_u_w",
+    "llvm.mips.hadd.s.d" => "__builtin_msa_hadd_s_d",
+    "llvm.mips.hadd.s.h" => "__builtin_msa_hadd_s_h",
+    "llvm.mips.hadd.s.w" => "__builtin_msa_hadd_s_w",
+    "llvm.mips.hadd.u.d" => "__builtin_msa_hadd_u_d",
+    "llvm.mips.hadd.u.h" => "__builtin_msa_hadd_u_h",
+    "llvm.mips.hadd.u.w" => "__builtin_msa_hadd_u_w",
+    "llvm.mips.hsub.s.d" => "__builtin_msa_hsub_s_d",
+    "llvm.mips.hsub.s.h" => "__builtin_msa_hsub_s_h",
+    "llvm.mips.hsub.s.w" => "__builtin_msa_hsub_s_w",
+    "llvm.mips.hsub.u.d" => "__builtin_msa_hsub_u_d",
+    "llvm.mips.hsub.u.h" => "__builtin_msa_hsub_u_h",
+    "llvm.mips.hsub.u.w" => "__builtin_msa_hsub_u_w",
+    "llvm.mips.ilvev.b" => "__builtin_msa_ilvev_b",
+    "llvm.mips.ilvev.d" => "__builtin_msa_ilvev_d",
+    "llvm.mips.ilvev.h" => "__builtin_msa_ilvev_h",
+    "llvm.mips.ilvev.w" => "__builtin_msa_ilvev_w",
+    "llvm.mips.ilvl.b" => "__builtin_msa_ilvl_b",
+    "llvm.mips.ilvl.d" => "__builtin_msa_ilvl_d",
+    "llvm.mips.ilvl.h" => "__builtin_msa_ilvl_h",
+    "llvm.mips.ilvl.w" => "__builtin_msa_ilvl_w",
+    "llvm.mips.ilvod.b" => "__builtin_msa_ilvod_b",
+    "llvm.mips.ilvod.d" => "__builtin_msa_ilvod_d",
+    "llvm.mips.ilvod.h" => "__builtin_msa_ilvod_h",
+    "llvm.mips.ilvod.w" => "__builtin_msa_ilvod_w",
+    "llvm.mips.ilvr.b" => "__builtin_msa_ilvr_b",
+    "llvm.mips.ilvr.d" => "__builtin_msa_ilvr_d",
+    "llvm.mips.ilvr.h" => "__builtin_msa_ilvr_h",
+    "llvm.mips.ilvr.w" => "__builtin_msa_ilvr_w",
+    "llvm.mips.insert.b" => "__builtin_msa_insert_b",
+    "llvm.mips.insert.d" => "__builtin_msa_insert_d",
+    "llvm.mips.insert.h" => "__builtin_msa_insert_h",
+    "llvm.mips.insert.w" => "__builtin_msa_insert_w",
+    "llvm.mips.insv" => "__builtin_mips_insv",
+    "llvm.mips.insve.b" => "__builtin_msa_insve_b",
+    "llvm.mips.insve.d" => "__builtin_msa_insve_d",
+    "llvm.mips.insve.h" => "__builtin_msa_insve_h",
+    "llvm.mips.insve.w" => "__builtin_msa_insve_w",
+    "llvm.mips.lbux" => "__builtin_mips_lbux",
+    "llvm.mips.ld.b" => "__builtin_msa_ld_b",
+    "llvm.mips.ld.d" => "__builtin_msa_ld_d",
+    "llvm.mips.ld.h" => "__builtin_msa_ld_h",
+    "llvm.mips.ld.w" => "__builtin_msa_ld_w",
+    "llvm.mips.ldi.b" => "__builtin_msa_ldi_b",
+    "llvm.mips.ldi.d" => "__builtin_msa_ldi_d",
+    "llvm.mips.ldi.h" => "__builtin_msa_ldi_h",
+    "llvm.mips.ldi.w" => "__builtin_msa_ldi_w",
+    "llvm.mips.lhx" => "__builtin_mips_lhx",
+    "llvm.mips.lsa" => "__builtin_mips_lsa",
+    "llvm.mips.lwx" => "__builtin_mips_lwx",
+    "llvm.mips.madd" => "__builtin_mips_madd",
+    "llvm.mips.madd.q.h" => "__builtin_msa_madd_q_h",
+    "llvm.mips.madd.q.w" => "__builtin_msa_madd_q_w",
+    "llvm.mips.maddr.q.h" => "__builtin_msa_maddr_q_h",
+    "llvm.mips.maddr.q.w" => "__builtin_msa_maddr_q_w",
+    "llvm.mips.maddu" => "__builtin_mips_maddu",
+    "llvm.mips.maddv.b" => "__builtin_msa_maddv_b",
+    "llvm.mips.maddv.d" => "__builtin_msa_maddv_d",
+    "llvm.mips.maddv.h" => "__builtin_msa_maddv_h",
+    "llvm.mips.maddv.w" => "__builtin_msa_maddv_w",
+    "llvm.mips.max.a.b" => "__builtin_msa_max_a_b",
+    "llvm.mips.max.a.d" => "__builtin_msa_max_a_d",
+    "llvm.mips.max.a.h" => "__builtin_msa_max_a_h",
+    "llvm.mips.max.a.w" => "__builtin_msa_max_a_w",
+    "llvm.mips.max.s.b" => "__builtin_msa_max_s_b",
+    "llvm.mips.max.s.d" => "__builtin_msa_max_s_d",
+    "llvm.mips.max.s.h" => "__builtin_msa_max_s_h",
+    "llvm.mips.max.s.w" => "__builtin_msa_max_s_w",
+    "llvm.mips.max.u.b" => "__builtin_msa_max_u_b",
+    "llvm.mips.max.u.d" => "__builtin_msa_max_u_d",
+    "llvm.mips.max.u.h" => "__builtin_msa_max_u_h",
+    "llvm.mips.max.u.w" => "__builtin_msa_max_u_w",
+    "llvm.mips.maxi.s.b" => "__builtin_msa_maxi_s_b",
+    "llvm.mips.maxi.s.d" => "__builtin_msa_maxi_s_d",
+    "llvm.mips.maxi.s.h" => "__builtin_msa_maxi_s_h",
+    "llvm.mips.maxi.s.w" => "__builtin_msa_maxi_s_w",
+    "llvm.mips.maxi.u.b" => "__builtin_msa_maxi_u_b",
+    "llvm.mips.maxi.u.d" => "__builtin_msa_maxi_u_d",
+    "llvm.mips.maxi.u.h" => "__builtin_msa_maxi_u_h",
+    "llvm.mips.maxi.u.w" => "__builtin_msa_maxi_u_w",
+    "llvm.mips.min.a.b" => "__builtin_msa_min_a_b",
+    "llvm.mips.min.a.d" => "__builtin_msa_min_a_d",
+    "llvm.mips.min.a.h" => "__builtin_msa_min_a_h",
+    "llvm.mips.min.a.w" => "__builtin_msa_min_a_w",
+    "llvm.mips.min.s.b" => "__builtin_msa_min_s_b",
+    "llvm.mips.min.s.d" => "__builtin_msa_min_s_d",
+    "llvm.mips.min.s.h" => "__builtin_msa_min_s_h",
+    "llvm.mips.min.s.w" => "__builtin_msa_min_s_w",
+    "llvm.mips.min.u.b" => "__builtin_msa_min_u_b",
+    "llvm.mips.min.u.d" => "__builtin_msa_min_u_d",
+    "llvm.mips.min.u.h" => "__builtin_msa_min_u_h",
+    "llvm.mips.min.u.w" => "__builtin_msa_min_u_w",
+    "llvm.mips.mini.s.b" => "__builtin_msa_mini_s_b",
+    "llvm.mips.mini.s.d" => "__builtin_msa_mini_s_d",
+    "llvm.mips.mini.s.h" => "__builtin_msa_mini_s_h",
+    "llvm.mips.mini.s.w" => "__builtin_msa_mini_s_w",
+    "llvm.mips.mini.u.b" => "__builtin_msa_mini_u_b",
+    "llvm.mips.mini.u.d" => "__builtin_msa_mini_u_d",
+    "llvm.mips.mini.u.h" => "__builtin_msa_mini_u_h",
+    "llvm.mips.mini.u.w" => "__builtin_msa_mini_u_w",
+    "llvm.mips.mod.s.b" => "__builtin_msa_mod_s_b",
+    "llvm.mips.mod.s.d" => "__builtin_msa_mod_s_d",
+    "llvm.mips.mod.s.h" => "__builtin_msa_mod_s_h",
+    "llvm.mips.mod.s.w" => "__builtin_msa_mod_s_w",
+    "llvm.mips.mod.u.b" => "__builtin_msa_mod_u_b",
+    "llvm.mips.mod.u.d" => "__builtin_msa_mod_u_d",
+    "llvm.mips.mod.u.h" => "__builtin_msa_mod_u_h",
+    "llvm.mips.mod.u.w" => "__builtin_msa_mod_u_w",
+    "llvm.mips.modsub" => "__builtin_mips_modsub",
+    "llvm.mips.move.v" => "__builtin_msa_move_v",
+    "llvm.mips.msub" => "__builtin_mips_msub",
+    "llvm.mips.msub.q.h" => "__builtin_msa_msub_q_h",
+    "llvm.mips.msub.q.w" => "__builtin_msa_msub_q_w",
+    "llvm.mips.msubr.q.h" => "__builtin_msa_msubr_q_h",
+    "llvm.mips.msubr.q.w" => "__builtin_msa_msubr_q_w",
+    "llvm.mips.msubu" => "__builtin_mips_msubu",
+    "llvm.mips.msubv.b" => "__builtin_msa_msubv_b",
+    "llvm.mips.msubv.d" => "__builtin_msa_msubv_d",
+    "llvm.mips.msubv.h" => "__builtin_msa_msubv_h",
+    "llvm.mips.msubv.w" => "__builtin_msa_msubv_w",
+    "llvm.mips.mthlip" => "__builtin_mips_mthlip",
+    "llvm.mips.mul.ph" => "__builtin_mips_mul_ph",
+    "llvm.mips.mul.q.h" => "__builtin_msa_mul_q_h",
+    "llvm.mips.mul.q.w" => "__builtin_msa_mul_q_w",
+    "llvm.mips.mul.s.ph" => "__builtin_mips_mul_s_ph",
+    "llvm.mips.mulr.q.h" => "__builtin_msa_mulr_q_h",
+    "llvm.mips.mulr.q.w" => "__builtin_msa_mulr_q_w",
+    "llvm.mips.mulsa.w.ph" => "__builtin_mips_mulsa_w_ph",
+    "llvm.mips.mult" => "__builtin_mips_mult",
+    "llvm.mips.multu" => "__builtin_mips_multu",
+    "llvm.mips.mulv.b" => "__builtin_msa_mulv_b",
+    "llvm.mips.mulv.d" => "__builtin_msa_mulv_d",
+    "llvm.mips.mulv.h" => "__builtin_msa_mulv_h",
+    "llvm.mips.mulv.w" => "__builtin_msa_mulv_w",
+    "llvm.mips.nloc.b" => "__builtin_msa_nloc_b",
+    "llvm.mips.nloc.d" => "__builtin_msa_nloc_d",
+    "llvm.mips.nloc.h" => "__builtin_msa_nloc_h",
+    "llvm.mips.nloc.w" => "__builtin_msa_nloc_w",
+    "llvm.mips.nlzc.b" => "__builtin_msa_nlzc_b",
+    "llvm.mips.nlzc.d" => "__builtin_msa_nlzc_d",
+    "llvm.mips.nlzc.h" => "__builtin_msa_nlzc_h",
+    "llvm.mips.nlzc.w" => "__builtin_msa_nlzc_w",
+    "llvm.mips.nor.v" => "__builtin_msa_nor_v",
+    "llvm.mips.nori.b" => "__builtin_msa_nori_b",
+    "llvm.mips.or.v" => "__builtin_msa_or_v",
+    "llvm.mips.ori.b" => "__builtin_msa_ori_b",
+    "llvm.mips.pckev.b" => "__builtin_msa_pckev_b",
+    "llvm.mips.pckev.d" => "__builtin_msa_pckev_d",
+    "llvm.mips.pckev.h" => "__builtin_msa_pckev_h",
+    "llvm.mips.pckev.w" => "__builtin_msa_pckev_w",
+    "llvm.mips.pckod.b" => "__builtin_msa_pckod_b",
+    "llvm.mips.pckod.d" => "__builtin_msa_pckod_d",
+    "llvm.mips.pckod.h" => "__builtin_msa_pckod_h",
+    "llvm.mips.pckod.w" => "__builtin_msa_pckod_w",
+    "llvm.mips.pcnt.b" => "__builtin_msa_pcnt_b",
+    "llvm.mips.pcnt.d" => "__builtin_msa_pcnt_d",
+    "llvm.mips.pcnt.h" => "__builtin_msa_pcnt_h",
+    "llvm.mips.pcnt.w" => "__builtin_msa_pcnt_w",
+    "llvm.mips.pick.qb" => "__builtin_mips_pick_qb",
+    "llvm.mips.precr.qb.ph" => "__builtin_mips_precr_qb_ph",
+    "llvm.mips.precr.sra.ph.w" => "__builtin_mips_precr_sra_ph_w",
+    "llvm.mips.precr.sra.r.ph.w" => "__builtin_mips_precr_sra_r_ph_w",
+    "llvm.mips.prepend" => "__builtin_mips_prepend",
+    "llvm.mips.raddu.w.qb" => "__builtin_mips_raddu_w_qb",
+    "llvm.mips.rddsp" => "__builtin_mips_rddsp",
+    "llvm.mips.repl.qb" => "__builtin_mips_repl_qb",
+    "llvm.mips.sat.s.b" => "__builtin_msa_sat_s_b",
+    "llvm.mips.sat.s.d" => "__builtin_msa_sat_s_d",
+    "llvm.mips.sat.s.h" => "__builtin_msa_sat_s_h",
+    "llvm.mips.sat.s.w" => "__builtin_msa_sat_s_w",
+    "llvm.mips.sat.u.b" => "__builtin_msa_sat_u_b",
+    "llvm.mips.sat.u.d" => "__builtin_msa_sat_u_d",
+    "llvm.mips.sat.u.h" => "__builtin_msa_sat_u_h",
+    "llvm.mips.sat.u.w" => "__builtin_msa_sat_u_w",
+    "llvm.mips.shf.b" => "__builtin_msa_shf_b",
+    "llvm.mips.shf.h" => "__builtin_msa_shf_h",
+    "llvm.mips.shf.w" => "__builtin_msa_shf_w",
+    "llvm.mips.shilo" => "__builtin_mips_shilo",
+    "llvm.mips.shll.qb" => "__builtin_mips_shll_qb",
+    "llvm.mips.shra.qb" => "__builtin_mips_shra_qb",
+    "llvm.mips.shra.r.qb" => "__builtin_mips_shra_r_qb",
+    "llvm.mips.shrl.ph" => "__builtin_mips_shrl_ph",
+    "llvm.mips.shrl.qb" => "__builtin_mips_shrl_qb",
+    "llvm.mips.sld.b" => "__builtin_msa_sld_b",
+    "llvm.mips.sld.d" => "__builtin_msa_sld_d",
+    "llvm.mips.sld.h" => "__builtin_msa_sld_h",
+    "llvm.mips.sld.w" => "__builtin_msa_sld_w",
+    "llvm.mips.sldi.b" => "__builtin_msa_sldi_b",
+    "llvm.mips.sldi.d" => "__builtin_msa_sldi_d",
+    "llvm.mips.sldi.h" => "__builtin_msa_sldi_h",
+    "llvm.mips.sldi.w" => "__builtin_msa_sldi_w",
+    "llvm.mips.sll.b" => "__builtin_msa_sll_b",
+    "llvm.mips.sll.d" => "__builtin_msa_sll_d",
+    "llvm.mips.sll.h" => "__builtin_msa_sll_h",
+    "llvm.mips.sll.w" => "__builtin_msa_sll_w",
+    "llvm.mips.slli.b" => "__builtin_msa_slli_b",
+    "llvm.mips.slli.d" => "__builtin_msa_slli_d",
+    "llvm.mips.slli.h" => "__builtin_msa_slli_h",
+    "llvm.mips.slli.w" => "__builtin_msa_slli_w",
+    "llvm.mips.splat.b" => "__builtin_msa_splat_b",
+    "llvm.mips.splat.d" => "__builtin_msa_splat_d",
+    "llvm.mips.splat.h" => "__builtin_msa_splat_h",
+    "llvm.mips.splat.w" => "__builtin_msa_splat_w",
+    "llvm.mips.splati.b" => "__builtin_msa_splati_b",
+    "llvm.mips.splati.d" => "__builtin_msa_splati_d",
+    "llvm.mips.splati.h" => "__builtin_msa_splati_h",
+    "llvm.mips.splati.w" => "__builtin_msa_splati_w",
+    "llvm.mips.sra.b" => "__builtin_msa_sra_b",
+    "llvm.mips.sra.d" => "__builtin_msa_sra_d",
+    "llvm.mips.sra.h" => "__builtin_msa_sra_h",
+    "llvm.mips.sra.w" => "__builtin_msa_sra_w",
+    "llvm.mips.srai.b" => "__builtin_msa_srai_b",
+    "llvm.mips.srai.d" => "__builtin_msa_srai_d",
+    "llvm.mips.srai.h" => "__builtin_msa_srai_h",
+    "llvm.mips.srai.w" => "__builtin_msa_srai_w",
+    "llvm.mips.srar.b" => "__builtin_msa_srar_b",
+    "llvm.mips.srar.d" => "__builtin_msa_srar_d",
+    "llvm.mips.srar.h" => "__builtin_msa_srar_h",
+    "llvm.mips.srar.w" => "__builtin_msa_srar_w",
+    "llvm.mips.srari.b" => "__builtin_msa_srari_b",
+    "llvm.mips.srari.d" => "__builtin_msa_srari_d",
+    "llvm.mips.srari.h" => "__builtin_msa_srari_h",
+    "llvm.mips.srari.w" => "__builtin_msa_srari_w",
+    "llvm.mips.srl.b" => "__builtin_msa_srl_b",
+    "llvm.mips.srl.d" => "__builtin_msa_srl_d",
+    "llvm.mips.srl.h" => "__builtin_msa_srl_h",
+    "llvm.mips.srl.w" => "__builtin_msa_srl_w",
+    "llvm.mips.srli.b" => "__builtin_msa_srli_b",
+    "llvm.mips.srli.d" => "__builtin_msa_srli_d",
+    "llvm.mips.srli.h" => "__builtin_msa_srli_h",
+    "llvm.mips.srli.w" => "__builtin_msa_srli_w",
+    "llvm.mips.srlr.b" => "__builtin_msa_srlr_b",
+    "llvm.mips.srlr.d" => "__builtin_msa_srlr_d",
+    "llvm.mips.srlr.h" => "__builtin_msa_srlr_h",
+    "llvm.mips.srlr.w" => "__builtin_msa_srlr_w",
+    "llvm.mips.srlri.b" => "__builtin_msa_srlri_b",
+    "llvm.mips.srlri.d" => "__builtin_msa_srlri_d",
+    "llvm.mips.srlri.h" => "__builtin_msa_srlri_h",
+    "llvm.mips.srlri.w" => "__builtin_msa_srlri_w",
+    "llvm.mips.st.b" => "__builtin_msa_st_b",
+    "llvm.mips.st.d" => "__builtin_msa_st_d",
+    "llvm.mips.st.h" => "__builtin_msa_st_h",
+    "llvm.mips.st.w" => "__builtin_msa_st_w",
+    "llvm.mips.subs.s.b" => "__builtin_msa_subs_s_b",
+    "llvm.mips.subs.s.d" => "__builtin_msa_subs_s_d",
+    "llvm.mips.subs.s.h" => "__builtin_msa_subs_s_h",
+    "llvm.mips.subs.s.w" => "__builtin_msa_subs_s_w",
+    "llvm.mips.subs.u.b" => "__builtin_msa_subs_u_b",
+    "llvm.mips.subs.u.d" => "__builtin_msa_subs_u_d",
+    "llvm.mips.subs.u.h" => "__builtin_msa_subs_u_h",
+    "llvm.mips.subs.u.w" => "__builtin_msa_subs_u_w",
+    "llvm.mips.subsus.u.b" => "__builtin_msa_subsus_u_b",
+    "llvm.mips.subsus.u.d" => "__builtin_msa_subsus_u_d",
+    "llvm.mips.subsus.u.h" => "__builtin_msa_subsus_u_h",
+    "llvm.mips.subsus.u.w" => "__builtin_msa_subsus_u_w",
+    "llvm.mips.subsuu.s.b" => "__builtin_msa_subsuu_s_b",
+    "llvm.mips.subsuu.s.d" => "__builtin_msa_subsuu_s_d",
+    "llvm.mips.subsuu.s.h" => "__builtin_msa_subsuu_s_h",
+    "llvm.mips.subsuu.s.w" => "__builtin_msa_subsuu_s_w",
+    "llvm.mips.subu.ph" => "__builtin_mips_subu_ph",
+    "llvm.mips.subu.qb" => "__builtin_mips_subu_qb",
+    "llvm.mips.subu.s.ph" => "__builtin_mips_subu_s_ph",
+    "llvm.mips.subu.s.qb" => "__builtin_mips_subu_s_qb",
+    "llvm.mips.subuh.qb" => "__builtin_mips_subuh_qb",
+    "llvm.mips.subuh.r.qb" => "__builtin_mips_subuh_r_qb",
+    "llvm.mips.subv.b" => "__builtin_msa_subv_b",
+    "llvm.mips.subv.d" => "__builtin_msa_subv_d",
+    "llvm.mips.subv.h" => "__builtin_msa_subv_h",
+    "llvm.mips.subv.w" => "__builtin_msa_subv_w",
+    "llvm.mips.subvi.b" => "__builtin_msa_subvi_b",
+    "llvm.mips.subvi.d" => "__builtin_msa_subvi_d",
+    "llvm.mips.subvi.h" => "__builtin_msa_subvi_h",
+    "llvm.mips.subvi.w" => "__builtin_msa_subvi_w",
+    "llvm.mips.vshf.b" => "__builtin_msa_vshf_b",
+    "llvm.mips.vshf.d" => "__builtin_msa_vshf_d",
+    "llvm.mips.vshf.h" => "__builtin_msa_vshf_h",
+    "llvm.mips.vshf.w" => "__builtin_msa_vshf_w",
+    "llvm.mips.wrdsp" => "__builtin_mips_wrdsp",
+    "llvm.mips.xor.v" => "__builtin_msa_xor_v",
+    "llvm.mips.xori.b" => "__builtin_msa_xori_b",
+    // xcore
+    "llvm.xcore.bitrev" => "__builtin_bitrev",
+    "llvm.xcore.getid" => "__builtin_getid",
+    "llvm.xcore.getps" => "__builtin_getps",
+    "llvm.xcore.setps" => "__builtin_setps",
+    // ptx
+    "llvm.ptx.bar.sync" => "__builtin_ptx_bar_sync",
+    "llvm.ptx.read.clock" => "__builtin_ptx_read_clock",
+    "llvm.ptx.read.clock64" => "__builtin_ptx_read_clock64",
+    "llvm.ptx.read.gridid" => "__builtin_ptx_read_gridid",
+    "llvm.ptx.read.laneid" => "__builtin_ptx_read_laneid",
+    "llvm.ptx.read.lanemask.eq" => "__builtin_ptx_read_lanemask_eq",
+    "llvm.ptx.read.lanemask.ge" => "__builtin_ptx_read_lanemask_ge",
+    "llvm.ptx.read.lanemask.gt" => "__builtin_ptx_read_lanemask_gt",
+    "llvm.ptx.read.lanemask.le" => "__builtin_ptx_read_lanemask_le",
+    "llvm.ptx.read.lanemask.lt" => "__builtin_ptx_read_lanemask_lt",
+    "llvm.ptx.read.nsmid" => "__builtin_ptx_read_nsmid",
+    "llvm.ptx.read.nwarpid" => "__builtin_ptx_read_nwarpid",
+    "llvm.ptx.read.pm0" => "__builtin_ptx_read_pm0",
+    "llvm.ptx.read.pm1" => "__builtin_ptx_read_pm1",
+    "llvm.ptx.read.pm2" => "__builtin_ptx_read_pm2",
+    "llvm.ptx.read.pm3" => "__builtin_ptx_read_pm3",
+    "llvm.ptx.read.smid" => "__builtin_ptx_read_smid",
+    "llvm.ptx.read.warpid" => "__builtin_ptx_read_warpid",
+    // cuda
+    "llvm.cuda.syncthreads" => "__syncthreads",
+_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+}
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index e6d8f78da603..bc8e99428eda 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -8,7 +8,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         // NOTE: this doc specifies the equivalent GCC builtins: http://huonw.github.io/llvmint/llvmint/x86/index.html
         "llvm.sqrt.v2f64" => "__builtin_ia32_sqrtpd",
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
-        _ => include!("x86.rs"),
+        _ => include!("archs.rs"),
     };
 
     let func = cx.context.get_target_builtin_function(gcc_name);
diff --git a/src/intrinsic/x86.rs b/src/intrinsic/x86.rs
deleted file mode 100644
index 4918325e74c8..000000000000
--- a/src/intrinsic/x86.rs
+++ /dev/null
@@ -1,770 +0,0 @@
-match name {
-// x86
-"llvm.x86.addcarry.u32" => "__builtin_ia32_addcarry_u32",
-"llvm.x86.addcarry.u64" => "__builtin_ia32_addcarry_u64",
-"llvm.x86.addcarryx.u32" => "__builtin_ia32_addcarryx_u32",
-"llvm.x86.addcarryx.u64" => "__builtin_ia32_addcarryx_u64",
-"llvm.x86.aesni.aesdec" => "__builtin_ia32_aesdec128",
-"llvm.x86.aesni.aesdeclast" => "__builtin_ia32_aesdeclast128",
-"llvm.x86.aesni.aesenc" => "__builtin_ia32_aesenc128",
-"llvm.x86.aesni.aesenclast" => "__builtin_ia32_aesenclast128",
-"llvm.x86.aesni.aesimc" => "__builtin_ia32_aesimc128",
-"llvm.x86.aesni.aeskeygenassist" => "__builtin_ia32_aeskeygenassist128",
-"llvm.x86.avx.addsub.pd.256" => "__builtin_ia32_addsubpd256",
-"llvm.x86.avx.addsub.ps.256" => "__builtin_ia32_addsubps256",
-"llvm.x86.avx.blend.pd.256" => "__builtin_ia32_blendpd256",
-"llvm.x86.avx.blend.ps.256" => "__builtin_ia32_blendps256",
-"llvm.x86.avx.blendv.pd.256" => "__builtin_ia32_blendvpd256",
-"llvm.x86.avx.blendv.ps.256" => "__builtin_ia32_blendvps256",
-"llvm.x86.avx.cmp.pd.256" => "__builtin_ia32_cmppd256",
-"llvm.x86.avx.cmp.ps.256" => "__builtin_ia32_cmpps256",
-"llvm.x86.avx.cvt.pd2.ps.256" => "__builtin_ia32_cvtpd2ps256",
-"llvm.x86.avx.cvt.pd2dq.256" => "__builtin_ia32_cvtpd2dq256",
-"llvm.x86.avx.cvt.ps2.pd.256" => "__builtin_ia32_cvtps2pd256",
-"llvm.x86.avx.cvt.ps2dq.256" => "__builtin_ia32_cvtps2dq256",
-"llvm.x86.avx.cvtdq2.pd.256" => "__builtin_ia32_cvtdq2pd256",
-"llvm.x86.avx.cvtdq2.ps.256" => "__builtin_ia32_cvtdq2ps256",
-"llvm.x86.avx.cvtt.pd2dq.256" => "__builtin_ia32_cvttpd2dq256",
-"llvm.x86.avx.cvtt.ps2dq.256" => "__builtin_ia32_cvttps2dq256",
-"llvm.x86.avx.dp.ps.256" => "__builtin_ia32_dpps256",
-"llvm.x86.avx.hadd.pd.256" => "__builtin_ia32_haddpd256",
-"llvm.x86.avx.hadd.ps.256" => "__builtin_ia32_haddps256",
-"llvm.x86.avx.hsub.pd.256" => "__builtin_ia32_hsubpd256",
-"llvm.x86.avx.hsub.ps.256" => "__builtin_ia32_hsubps256",
-"llvm.x86.avx.ldu.dq.256" => "__builtin_ia32_lddqu256",
-"llvm.x86.avx.maskload.pd" => "__builtin_ia32_maskloadpd",
-"llvm.x86.avx.maskload.pd.256" => "__builtin_ia32_maskloadpd256",
-"llvm.x86.avx.maskload.ps" => "__builtin_ia32_maskloadps",
-"llvm.x86.avx.maskload.ps.256" => "__builtin_ia32_maskloadps256",
-"llvm.x86.avx.maskstore.pd" => "__builtin_ia32_maskstorepd",
-"llvm.x86.avx.maskstore.pd.256" => "__builtin_ia32_maskstorepd256",
-"llvm.x86.avx.maskstore.ps" => "__builtin_ia32_maskstoreps",
-"llvm.x86.avx.maskstore.ps.256" => "__builtin_ia32_maskstoreps256",
-"llvm.x86.avx.max.pd.256" => "__builtin_ia32_maxpd256",
-"llvm.x86.avx.max.ps.256" => "__builtin_ia32_maxps256",
-"llvm.x86.avx.min.pd.256" => "__builtin_ia32_minpd256",
-"llvm.x86.avx.min.ps.256" => "__builtin_ia32_minps256",
-"llvm.x86.avx.movmsk.pd.256" => "__builtin_ia32_movmskpd256",
-"llvm.x86.avx.movmsk.ps.256" => "__builtin_ia32_movmskps256",
-"llvm.x86.avx.ptestc.256" => "__builtin_ia32_ptestc256",
-"llvm.x86.avx.ptestnzc.256" => "__builtin_ia32_ptestnzc256",
-"llvm.x86.avx.ptestz.256" => "__builtin_ia32_ptestz256",
-"llvm.x86.avx.rcp.ps.256" => "__builtin_ia32_rcpps256",
-"llvm.x86.avx.round.pd.256" => "__builtin_ia32_roundpd256",
-"llvm.x86.avx.round.ps.256" => "__builtin_ia32_roundps256",
-"llvm.x86.avx.rsqrt.ps.256" => "__builtin_ia32_rsqrtps256",
-"llvm.x86.avx.sqrt.pd.256" => "__builtin_ia32_sqrtpd256",
-"llvm.x86.avx.sqrt.ps.256" => "__builtin_ia32_sqrtps256",
-"llvm.x86.avx.storeu.dq.256" => "__builtin_ia32_storedqu256",
-"llvm.x86.avx.storeu.pd.256" => "__builtin_ia32_storeupd256",
-"llvm.x86.avx.storeu.ps.256" => "__builtin_ia32_storeups256",
-"llvm.x86.avx.vbroadcastf128.pd.256" => "__builtin_ia32_vbroadcastf128_pd256",
-"llvm.x86.avx.vbroadcastf128.ps.256" => "__builtin_ia32_vbroadcastf128_ps256",
-"llvm.x86.avx.vextractf128.pd.256" => "__builtin_ia32_vextractf128_pd256",
-"llvm.x86.avx.vextractf128.ps.256" => "__builtin_ia32_vextractf128_ps256",
-"llvm.x86.avx.vextractf128.si.256" => "__builtin_ia32_vextractf128_si256",
-"llvm.x86.avx.vinsertf128.pd.256" => "__builtin_ia32_vinsertf128_pd256",
-"llvm.x86.avx.vinsertf128.ps.256" => "__builtin_ia32_vinsertf128_ps256",
-"llvm.x86.avx.vinsertf128.si.256" => "__builtin_ia32_vinsertf128_si256",
-"llvm.x86.avx.vperm2f128.pd.256" => "__builtin_ia32_vperm2f128_pd256",
-"llvm.x86.avx.vperm2f128.ps.256" => "__builtin_ia32_vperm2f128_ps256",
-"llvm.x86.avx.vperm2f128.si.256" => "__builtin_ia32_vperm2f128_si256",
-"llvm.x86.avx.vpermilvar.pd" => "__builtin_ia32_vpermilvarpd",
-"llvm.x86.avx.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256",
-"llvm.x86.avx.vpermilvar.ps" => "__builtin_ia32_vpermilvarps",
-"llvm.x86.avx.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256",
-"llvm.x86.avx.vtestc.pd" => "__builtin_ia32_vtestcpd",
-"llvm.x86.avx.vtestc.pd.256" => "__builtin_ia32_vtestcpd256",
-"llvm.x86.avx.vtestc.ps" => "__builtin_ia32_vtestcps",
-"llvm.x86.avx.vtestc.ps.256" => "__builtin_ia32_vtestcps256",
-"llvm.x86.avx.vtestnzc.pd" => "__builtin_ia32_vtestnzcpd",
-"llvm.x86.avx.vtestnzc.pd.256" => "__builtin_ia32_vtestnzcpd256",
-"llvm.x86.avx.vtestnzc.ps" => "__builtin_ia32_vtestnzcps",
-"llvm.x86.avx.vtestnzc.ps.256" => "__builtin_ia32_vtestnzcps256",
-"llvm.x86.avx.vtestz.pd" => "__builtin_ia32_vtestzpd",
-"llvm.x86.avx.vtestz.pd.256" => "__builtin_ia32_vtestzpd256",
-"llvm.x86.avx.vtestz.ps" => "__builtin_ia32_vtestzps",
-"llvm.x86.avx.vtestz.ps.256" => "__builtin_ia32_vtestzps256",
-"llvm.x86.avx.vzeroall" => "__builtin_ia32_vzeroall",
-"llvm.x86.avx.vzeroupper" => "__builtin_ia32_vzeroupper",
-"llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gatherd_d",
-"llvm.x86.avx2.gather.d.d.256" => "__builtin_ia32_gatherd_d256",
-"llvm.x86.avx2.gather.d.pd" => "__builtin_ia32_gatherd_pd",
-"llvm.x86.avx2.gather.d.pd.256" => "__builtin_ia32_gatherd_pd256",
-"llvm.x86.avx2.gather.d.ps" => "__builtin_ia32_gatherd_ps",
-"llvm.x86.avx2.gather.d.ps.256" => "__builtin_ia32_gatherd_ps256",
-"llvm.x86.avx2.gather.d.q" => "__builtin_ia32_gatherd_q",
-"llvm.x86.avx2.gather.d.q.256" => "__builtin_ia32_gatherd_q256",
-"llvm.x86.avx2.gather.q.d" => "__builtin_ia32_gatherq_d",
-"llvm.x86.avx2.gather.q.d.256" => "__builtin_ia32_gatherq_d256",
-"llvm.x86.avx2.gather.q.pd" => "__builtin_ia32_gatherq_pd",
-"llvm.x86.avx2.gather.q.pd.256" => "__builtin_ia32_gatherq_pd256",
-"llvm.x86.avx2.gather.q.ps" => "__builtin_ia32_gatherq_ps",
-"llvm.x86.avx2.gather.q.ps.256" => "__builtin_ia32_gatherq_ps256",
-"llvm.x86.avx2.gather.q.q" => "__builtin_ia32_gatherq_q",
-"llvm.x86.avx2.gather.q.q.256" => "__builtin_ia32_gatherq_q256",
-"llvm.x86.avx2.maskload.d" => "__builtin_ia32_maskloadd",
-"llvm.x86.avx2.maskload.d.256" => "__builtin_ia32_maskloadd256",
-"llvm.x86.avx2.maskload.q" => "__builtin_ia32_maskloadq",
-"llvm.x86.avx2.maskload.q.256" => "__builtin_ia32_maskloadq256",
-"llvm.x86.avx2.maskstore.d" => "__builtin_ia32_maskstored",
-"llvm.x86.avx2.maskstore.d.256" => "__builtin_ia32_maskstored256",
-"llvm.x86.avx2.maskstore.q" => "__builtin_ia32_maskstoreq",
-"llvm.x86.avx2.maskstore.q.256" => "__builtin_ia32_maskstoreq256",
-"llvm.x86.avx2.movntdqa" => "__builtin_ia32_movntdqa256",
-"llvm.x86.avx2.mpsadbw" => "__builtin_ia32_mpsadbw256",
-"llvm.x86.avx2.pabs.b" => "__builtin_ia32_pabsb256",
-"llvm.x86.avx2.pabs.d" => "__builtin_ia32_pabsd256",
-"llvm.x86.avx2.pabs.w" => "__builtin_ia32_pabsw256",
-"llvm.x86.avx2.packssdw" => "__builtin_ia32_packssdw256",
-"llvm.x86.avx2.packsswb" => "__builtin_ia32_packsswb256",
-"llvm.x86.avx2.packusdw" => "__builtin_ia32_packusdw256",
-"llvm.x86.avx2.packuswb" => "__builtin_ia32_packuswb256",
-"llvm.x86.avx2.padds.b" => "__builtin_ia32_paddsb256",
-"llvm.x86.avx2.padds.w" => "__builtin_ia32_paddsw256",
-"llvm.x86.avx2.paddus.b" => "__builtin_ia32_paddusb256",
-"llvm.x86.avx2.paddus.w" => "__builtin_ia32_paddusw256",
-"llvm.x86.avx2.pavg.b" => "__builtin_ia32_pavgb256",
-"llvm.x86.avx2.pavg.w" => "__builtin_ia32_pavgw256",
-"llvm.x86.avx2.pblendd.128" => "__builtin_ia32_pblendd128",
-"llvm.x86.avx2.pblendd.256" => "__builtin_ia32_pblendd256",
-"llvm.x86.avx2.pblendvb" => "__builtin_ia32_pblendvb256",
-"llvm.x86.avx2.pblendw" => "__builtin_ia32_pblendw256",
-"llvm.x86.avx2.pbroadcastb.128" => "__builtin_ia32_pbroadcastb128",
-"llvm.x86.avx2.pbroadcastb.256" => "__builtin_ia32_pbroadcastb256",
-"llvm.x86.avx2.pbroadcastd.128" => "__builtin_ia32_pbroadcastd128",
-"llvm.x86.avx2.pbroadcastd.256" => "__builtin_ia32_pbroadcastd256",
-"llvm.x86.avx2.pbroadcastq.128" => "__builtin_ia32_pbroadcastq128",
-"llvm.x86.avx2.pbroadcastq.256" => "__builtin_ia32_pbroadcastq256",
-"llvm.x86.avx2.pbroadcastw.128" => "__builtin_ia32_pbroadcastw128",
-"llvm.x86.avx2.pbroadcastw.256" => "__builtin_ia32_pbroadcastw256",
-"llvm.x86.avx2.permd" => "__builtin_ia32_permvarsi256",
-"llvm.x86.avx2.permps" => "__builtin_ia32_permvarsf256",
-"llvm.x86.avx2.phadd.d" => "__builtin_ia32_phaddd256",
-"llvm.x86.avx2.phadd.sw" => "__builtin_ia32_phaddsw256",
-"llvm.x86.avx2.phadd.w" => "__builtin_ia32_phaddw256",
-"llvm.x86.avx2.phsub.d" => "__builtin_ia32_phsubd256",
-"llvm.x86.avx2.phsub.sw" => "__builtin_ia32_phsubsw256",
-"llvm.x86.avx2.phsub.w" => "__builtin_ia32_phsubw256",
-"llvm.x86.avx2.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw256",
-"llvm.x86.avx2.pmadd.wd" => "__builtin_ia32_pmaddwd256",
-"llvm.x86.avx2.pmaxs.b" => "__builtin_ia32_pmaxsb256",
-"llvm.x86.avx2.pmaxs.d" => "__builtin_ia32_pmaxsd256",
-"llvm.x86.avx2.pmaxs.w" => "__builtin_ia32_pmaxsw256",
-"llvm.x86.avx2.pmaxu.b" => "__builtin_ia32_pmaxub256",
-"llvm.x86.avx2.pmaxu.d" => "__builtin_ia32_pmaxud256",
-"llvm.x86.avx2.pmaxu.w" => "__builtin_ia32_pmaxuw256",
-"llvm.x86.avx2.pmins.b" => "__builtin_ia32_pminsb256",
-"llvm.x86.avx2.pmins.d" => "__builtin_ia32_pminsd256",
-"llvm.x86.avx2.pmins.w" => "__builtin_ia32_pminsw256",
-"llvm.x86.avx2.pminu.b" => "__builtin_ia32_pminub256",
-"llvm.x86.avx2.pminu.d" => "__builtin_ia32_pminud256",
-"llvm.x86.avx2.pminu.w" => "__builtin_ia32_pminuw256",
-"llvm.x86.avx2.pmovmskb" => "__builtin_ia32_pmovmskb256",
-"llvm.x86.avx2.pmovsxbd" => "__builtin_ia32_pmovsxbd256",
-"llvm.x86.avx2.pmovsxbq" => "__builtin_ia32_pmovsxbq256",
-"llvm.x86.avx2.pmovsxbw" => "__builtin_ia32_pmovsxbw256",
-"llvm.x86.avx2.pmovsxdq" => "__builtin_ia32_pmovsxdq256",
-"llvm.x86.avx2.pmovsxwd" => "__builtin_ia32_pmovsxwd256",
-"llvm.x86.avx2.pmovsxwq" => "__builtin_ia32_pmovsxwq256",
-"llvm.x86.avx2.pmovzxbd" => "__builtin_ia32_pmovzxbd256",
-"llvm.x86.avx2.pmovzxbq" => "__builtin_ia32_pmovzxbq256",
-"llvm.x86.avx2.pmovzxbw" => "__builtin_ia32_pmovzxbw256",
-"llvm.x86.avx2.pmovzxdq" => "__builtin_ia32_pmovzxdq256",
-"llvm.x86.avx2.pmovzxwd" => "__builtin_ia32_pmovzxwd256",
-"llvm.x86.avx2.pmovzxwq" => "__builtin_ia32_pmovzxwq256",
-"llvm.x86.avx2.pmul.dq" => "__builtin_ia32_pmuldq256",
-"llvm.x86.avx2.pmul.hr.sw" => "__builtin_ia32_pmulhrsw256",
-"llvm.x86.avx2.pmulh.w" => "__builtin_ia32_pmulhw256",
-"llvm.x86.avx2.pmulhu.w" => "__builtin_ia32_pmulhuw256",
-"llvm.x86.avx2.pmulu.dq" => "__builtin_ia32_pmuludq256",
-"llvm.x86.avx2.psad.bw" => "__builtin_ia32_psadbw256",
-"llvm.x86.avx2.pshuf.b" => "__builtin_ia32_pshufb256",
-"llvm.x86.avx2.psign.b" => "__builtin_ia32_psignb256",
-"llvm.x86.avx2.psign.d" => "__builtin_ia32_psignd256",
-"llvm.x86.avx2.psign.w" => "__builtin_ia32_psignw256",
-"llvm.x86.avx2.psll.d" => "__builtin_ia32_pslld256",
-"llvm.x86.avx2.psll.dq" => "__builtin_ia32_pslldqi256",
-"llvm.x86.avx2.psll.dq.bs" => "__builtin_ia32_pslldqi256_byteshift",
-"llvm.x86.avx2.psll.q" => "__builtin_ia32_psllq256",
-"llvm.x86.avx2.psll.w" => "__builtin_ia32_psllw256",
-"llvm.x86.avx2.pslli.d" => "__builtin_ia32_pslldi256",
-"llvm.x86.avx2.pslli.q" => "__builtin_ia32_psllqi256",
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-"llvm.x86.avx2.psllv.d.256" => "__builtin_ia32_psllv8si",
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-"llvm.x86.avx2.psllv.q.256" => "__builtin_ia32_psllv4di",
-"llvm.x86.avx2.psra.d" => "__builtin_ia32_psrad256",
-"llvm.x86.avx2.psra.w" => "__builtin_ia32_psraw256",
-"llvm.x86.avx2.psrai.d" => "__builtin_ia32_psradi256",
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-"llvm.x86.avx2.psrav.d" => "__builtin_ia32_psrav4si",
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-"llvm.x86.avx2.psubs.b" => "__builtin_ia32_psubsb256",
-"llvm.x86.avx2.psubs.w" => "__builtin_ia32_psubsw256",
-"llvm.x86.avx2.psubus.b" => "__builtin_ia32_psubusb256",
-"llvm.x86.avx2.psubus.w" => "__builtin_ia32_psubusw256",
-"llvm.x86.avx2.vbroadcast.sd.pd.256" => "__builtin_ia32_vbroadcastsd_pd256",
-"llvm.x86.avx2.vbroadcast.ss.ps" => "__builtin_ia32_vbroadcastss_ps",
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-"llvm.x86.avx2.vextracti128" => "__builtin_ia32_extract128i256",
-"llvm.x86.avx2.vinserti128" => "__builtin_ia32_insert128i256",
-"llvm.x86.avx2.vperm2i128" => "__builtin_ia32_permti256",
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-"llvm.x86.avx512.cvtsd2usi64" => "__builtin_ia32_cvtsd2usi64",
-"llvm.x86.avx512.cvtss2usi" => "__builtin_ia32_cvtss2usi",
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-"llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_cvttsd2usi",
-"llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_cvttsd2usi64",
-"llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_cvttss2usi",
-"llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_cvttss2usi64",
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-"llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss",
-"llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi642sd",
-"llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi642ss",
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-"llvm.x86.avx512.gather.qpq.512" => "__builtin_ia32_gatherdiv8di",
-"llvm.x86.avx512.gather.qps.512" => "__builtin_ia32_gatherdiv16sf",
-"llvm.x86.avx512.gatherpf.dpd.512" => "__builtin_ia32_gatherpfdpd",
-"llvm.x86.avx512.gatherpf.dps.512" => "__builtin_ia32_gatherpfdps",
-"llvm.x86.avx512.gatherpf.qpd.512" => "__builtin_ia32_gatherpfqpd",
-"llvm.x86.avx512.gatherpf.qps.512" => "__builtin_ia32_gatherpfqps",
-"llvm.x86.avx512.kand.w" => "__builtin_ia32_kandhi",
-"llvm.x86.avx512.kandn.w" => "__builtin_ia32_kandnhi",
-"llvm.x86.avx512.knot.w" => "__builtin_ia32_knothi",
-"llvm.x86.avx512.kor.w" => "__builtin_ia32_korhi",
-"llvm.x86.avx512.kortestc.w" => "__builtin_ia32_kortestchi",
-"llvm.x86.avx512.kortestz.w" => "__builtin_ia32_kortestzhi",
-"llvm.x86.avx512.kunpck.bw" => "__builtin_ia32_kunpckhi",
-"llvm.x86.avx512.kxnor.w" => "__builtin_ia32_kxnorhi",
-"llvm.x86.avx512.kxor.w" => "__builtin_ia32_kxorhi",
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-"llvm.x86.avx512.mask.blend.pd.512" => "__builtin_ia32_blendmpd_512_mask",
-"llvm.x86.avx512.mask.blend.ps.512" => "__builtin_ia32_blendmps_512_mask",
-"llvm.x86.avx512.mask.blend.q.512" => "__builtin_ia32_blendmq_512_mask",
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-"llvm.x86.avx512.mask.cmp.ps.512" => "__builtin_ia32_cmpps512_mask",
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-"llvm.x86.avx512.mask.conflict.q.512" => "__builtin_ia32_vpconflictdi_512_mask",
-"llvm.x86.avx512.mask.cvtdq2pd.512" => "__builtin_ia32_cvtdq2pd512_mask",
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-"llvm.x86.avx512.mask.cvtpd2ps.512" => "__builtin_ia32_cvtpd2ps512_mask",
-"llvm.x86.avx512.mask.cvtpd2udq.512" => "__builtin_ia32_cvtpd2udq512_mask",
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-"llvm.x86.avx512.mask.cvtps2udq.512" => "__builtin_ia32_cvtps2udq512_mask",
-"llvm.x86.avx512.mask.cvttpd2dq.512" => "__builtin_ia32_cvttpd2dq512_mask",
-"llvm.x86.avx512.mask.cvttpd2udq.512" => "__builtin_ia32_cvttpd2udq512_mask",
-"llvm.x86.avx512.mask.cvttps2dq.512" => "__builtin_ia32_cvttps2dq512_mask",
-"llvm.x86.avx512.mask.cvttps2udq.512" => "__builtin_ia32_cvttps2udq512_mask",
-"llvm.x86.avx512.mask.cvtudq2pd.512" => "__builtin_ia32_cvtudq2pd512_mask",
-"llvm.x86.avx512.mask.cvtudq2ps.512" => "__builtin_ia32_cvtudq2ps512_mask",
-"llvm.x86.avx512.mask.loadu.d.512" => "__builtin_ia32_loaddqusi512_mask",
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-"llvm.x86.avx512.mask.loadu.ps.512" => "__builtin_ia32_loadups512_mask",
-"llvm.x86.avx512.mask.loadu.q.512" => "__builtin_ia32_loaddqudi512_mask",
-"llvm.x86.avx512.mask.lzcnt.d.512" => "__builtin_ia32_vplzcntd_512_mask",
-"llvm.x86.avx512.mask.lzcnt.q.512" => "__builtin_ia32_vplzcntq_512_mask",
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-"llvm.x86.avx512.mask.min.ps.512" => "__builtin_ia32_minps512_mask",
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-"llvm.x86.avx512.mask.pabs.q.512" => "__builtin_ia32_pabsq512_mask",
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-"llvm.x86.avx512.mask.pand.q.512" => "__builtin_ia32_pandq512_mask",
-"llvm.x86.avx512.mask.pbroadcast.d.gpr.512" => "__builtin_ia32_pbroadcastd512_gpr_mask",
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-"llvm.x86.avx512.mask.pbroadcast.q.mem.512" => "__builtin_ia32_pbroadcastq512_mem_mask",
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-"llvm.x86.avx512.mask.pcmpeq.b.512" => "__builtin_ia32_pcmpeqb512_mask",
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-"llvm.x86.avx512.mask.pcmpeq.d.256" => "__builtin_ia32_pcmpeqd256_mask",
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-"llvm.x86.avx512.mask.pcmpeq.q.512" => "__builtin_ia32_pcmpeqq512_mask",
-"llvm.x86.avx512.mask.pcmpeq.w.128" => "__builtin_ia32_pcmpeqw128_mask",
-"llvm.x86.avx512.mask.pcmpeq.w.256" => "__builtin_ia32_pcmpeqw256_mask",
-"llvm.x86.avx512.mask.pcmpeq.w.512" => "__builtin_ia32_pcmpeqw512_mask",
-"llvm.x86.avx512.mask.pcmpgt.b.128" => "__builtin_ia32_pcmpgtb128_mask",
-"llvm.x86.avx512.mask.pcmpgt.b.256" => "__builtin_ia32_pcmpgtb256_mask",
-"llvm.x86.avx512.mask.pcmpgt.b.512" => "__builtin_ia32_pcmpgtb512_mask",
-"llvm.x86.avx512.mask.pcmpgt.d.128" => "__builtin_ia32_pcmpgtd128_mask",
-"llvm.x86.avx512.mask.pcmpgt.d.256" => "__builtin_ia32_pcmpgtd256_mask",
-"llvm.x86.avx512.mask.pcmpgt.d.512" => "__builtin_ia32_pcmpgtd512_mask",
-"llvm.x86.avx512.mask.pcmpgt.q.128" => "__builtin_ia32_pcmpgtq128_mask",
-"llvm.x86.avx512.mask.pcmpgt.q.256" => "__builtin_ia32_pcmpgtq256_mask",
-"llvm.x86.avx512.mask.pcmpgt.q.512" => "__builtin_ia32_pcmpgtq512_mask",
-"llvm.x86.avx512.mask.pcmpgt.w.128" => "__builtin_ia32_pcmpgtw128_mask",
-"llvm.x86.avx512.mask.pcmpgt.w.256" => "__builtin_ia32_pcmpgtw256_mask",
-"llvm.x86.avx512.mask.pcmpgt.w.512" => "__builtin_ia32_pcmpgtw512_mask",
-"llvm.x86.avx512.mask.pmaxs.d.512" => "__builtin_ia32_pmaxsd512_mask",
-"llvm.x86.avx512.mask.pmaxs.q.512" => "__builtin_ia32_pmaxsq512_mask",
-"llvm.x86.avx512.mask.pmaxu.d.512" => "__builtin_ia32_pmaxud512_mask",
-"llvm.x86.avx512.mask.pmaxu.q.512" => "__builtin_ia32_pmaxuq512_mask",
-"llvm.x86.avx512.mask.pmins.d.512" => "__builtin_ia32_pminsd512_mask",
-"llvm.x86.avx512.mask.pmins.q.512" => "__builtin_ia32_pminsq512_mask",
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-"llvm.x86.avx512.mask.pminu.q.512" => "__builtin_ia32_pminuq512_mask",
-"llvm.x86.avx512.mask.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask",
-"llvm.x86.avx512.mask.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask",
-"llvm.x86.avx512.mask.ptestm.d.512" => "__builtin_ia32_ptestmd512",
-"llvm.x86.avx512.mask.ptestm.q.512" => "__builtin_ia32_ptestmq512",
-"llvm.x86.avx512.mask.rndscale.pd.512" => "__builtin_ia32_rndscalepd_mask",
-"llvm.x86.avx512.mask.rndscale.ps.512" => "__builtin_ia32_rndscaleps_mask",
-"llvm.x86.avx512.mask.store.ss" => "__builtin_ia32_storess_mask",
-"llvm.x86.avx512.mask.storeu.d.512" => "__builtin_ia32_storedqusi512_mask",
-"llvm.x86.avx512.mask.storeu.pd.512" => "__builtin_ia32_storeupd512_mask",
-"llvm.x86.avx512.mask.storeu.ps.512" => "__builtin_ia32_storeups512_mask",
-"llvm.x86.avx512.mask.storeu.q.512" => "__builtin_ia32_storedqudi512_mask",
-"llvm.x86.avx512.mask.valign.d.512" => "__builtin_ia32_alignd512_mask",
-"llvm.x86.avx512.mask.valign.q.512" => "__builtin_ia32_alignq512_mask",
-"llvm.x86.avx512.mask.vcvtph2ps.512" => "__builtin_ia32_vcvtph2ps512_mask",
-"llvm.x86.avx512.mask.vcvtps2ph.512" => "__builtin_ia32_vcvtps2ph512_mask",
-"llvm.x86.avx512.mask.vpermt.d.512" => "__builtin_ia32_vpermt2vard512_mask",
-"llvm.x86.avx512.mask.vpermt.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
-"llvm.x86.avx512.mask.vpermt.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
-"llvm.x86.avx512.mask.vpermt.q.512" => "__builtin_ia32_vpermt2varq512_mask",
-"llvm.x86.avx512.movntdqa" => "__builtin_ia32_movntdqa512",
-"llvm.x86.avx512.pbroadcastd.512" => "__builtin_ia32_pbroadcastd512",
-"llvm.x86.avx512.pbroadcastq.512" => "__builtin_ia32_pbroadcastq512",
-"llvm.x86.avx512.pmovzxbd" => "__builtin_ia32_pmovzxbd512",
-"llvm.x86.avx512.pmovzxbq" => "__builtin_ia32_pmovzxbq512",
-"llvm.x86.avx512.pmovzxdq" => "__builtin_ia32_pmovzxdq512",
-"llvm.x86.avx512.pmovzxwd" => "__builtin_ia32_pmovzxwd512",
-"llvm.x86.avx512.pmovzxwq" => "__builtin_ia32_pmovzxwq512",
-"llvm.x86.avx512.psll.dq" => "__builtin_ia32_pslldqi512",
-"llvm.x86.avx512.psll.dq.bs" => "__builtin_ia32_pslldqi512_byteshift",
-"llvm.x86.avx512.psrl.dq" => "__builtin_ia32_psrldqi512",
-"llvm.x86.avx512.psrl.dq.bs" => "__builtin_ia32_psrldqi512_byteshift",
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-"llvm.x86.avx512.rcp14.ps.512" => "__builtin_ia32_rcp14ps512_mask",
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-"llvm.x86.avx512.rcp14.ss" => "__builtin_ia32_rcp14ss_mask",
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-"llvm.x86.avx512.rcp28.ps" => "__builtin_ia32_rcp28ps_mask",
-"llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
-"llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
-"llvm.x86.avx512.rndscale.sd" => "__builtin_ia32_rndscalesd",
-"llvm.x86.avx512.rndscale.ss" => "__builtin_ia32_rndscaless",
-"llvm.x86.avx512.rsqrt14.pd.512" => "__builtin_ia32_rsqrt14pd512_mask",
-"llvm.x86.avx512.rsqrt14.ps.512" => "__builtin_ia32_rsqrt14ps512_mask",
-"llvm.x86.avx512.rsqrt14.sd" => "__builtin_ia32_rsqrt14sd_mask",
-"llvm.x86.avx512.rsqrt14.ss" => "__builtin_ia32_rsqrt14ss_mask",
-"llvm.x86.avx512.rsqrt28.pd" => "__builtin_ia32_rsqrt28pd_mask",
-"llvm.x86.avx512.rsqrt28.ps" => "__builtin_ia32_rsqrt28ps_mask",
-"llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
-"llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
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-"llvm.x86.avx512.scatter.dpi.512" => "__builtin_ia32_scattersiv16si",
-"llvm.x86.avx512.scatter.dpq.512" => "__builtin_ia32_scattersiv8di",
-"llvm.x86.avx512.scatter.dps.512" => "__builtin_ia32_scattersiv16sf",
-"llvm.x86.avx512.scatter.qpd.512" => "__builtin_ia32_scatterdiv8df",
-"llvm.x86.avx512.scatter.qpi.512" => "__builtin_ia32_scatterdiv16si",
-"llvm.x86.avx512.scatter.qpq.512" => "__builtin_ia32_scatterdiv8di",
-"llvm.x86.avx512.scatter.qps.512" => "__builtin_ia32_scatterdiv16sf",
-"llvm.x86.avx512.scatterpf.dpd.512" => "__builtin_ia32_scatterpfdpd",
-"llvm.x86.avx512.scatterpf.dps.512" => "__builtin_ia32_scatterpfdps",
-"llvm.x86.avx512.scatterpf.qpd.512" => "__builtin_ia32_scatterpfqpd",
-"llvm.x86.avx512.scatterpf.qps.512" => "__builtin_ia32_scatterpfqps",
-"llvm.x86.avx512.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
-"llvm.x86.avx512.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
-"llvm.x86.avx512.sqrt.sd" => "__builtin_ia32_sqrtrndsd",
-"llvm.x86.avx512.sqrt.ss" => "__builtin_ia32_sqrtrndss",
-"llvm.x86.avx512.vbroadcast.sd.512" => "__builtin_ia32_vbroadcastsd512",
-"llvm.x86.avx512.vbroadcast.sd.pd.512" => "__builtin_ia32_vbroadcastsd_pd512",
-"llvm.x86.avx512.vbroadcast.ss.512" => "__builtin_ia32_vbroadcastss512",
-"llvm.x86.avx512.vbroadcast.ss.ps.512" => "__builtin_ia32_vbroadcastss_ps512",
-"llvm.x86.bmi.bextr.32" => "__builtin_ia32_bextr_u32",
-"llvm.x86.bmi.bextr.64" => "__builtin_ia32_bextr_u64",
-"llvm.x86.bmi.bzhi.32" => "__builtin_ia32_bzhi_si",
-"llvm.x86.bmi.bzhi.64" => "__builtin_ia32_bzhi_di",
-"llvm.x86.bmi.pdep.32" => "__builtin_ia32_pdep_si",
-"llvm.x86.bmi.pdep.64" => "__builtin_ia32_pdep_di",
-"llvm.x86.bmi.pext.32" => "__builtin_ia32_pext_si",
-"llvm.x86.bmi.pext.64" => "__builtin_ia32_pext_di",
-"llvm.x86.fma.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
-"llvm.x86.fma.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
-"llvm.x86.fma.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
-"llvm.x86.fma.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
-"llvm.x86.fma.mask.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask",
-"llvm.x86.fma.mask.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask",
-"llvm.x86.fma.mask.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask",
-"llvm.x86.fma.mask.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask",
-"llvm.x86.fma.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
-"llvm.x86.fma.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
-"llvm.x86.fma.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
-"llvm.x86.fma.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
-"llvm.x86.fma.vfmadd.pd" => "__builtin_ia32_vfmaddpd",
-"llvm.x86.fma.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256",
-"llvm.x86.fma.vfmadd.ps" => "__builtin_ia32_vfmaddps",
-"llvm.x86.fma.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256",
-"llvm.x86.fma.vfmadd.sd" => "__builtin_ia32_vfmaddsd",
-"llvm.x86.fma.vfmadd.ss" => "__builtin_ia32_vfmaddss",
-"llvm.x86.fma.vfmaddsub.pd" => "__builtin_ia32_vfmaddsubpd",
-"llvm.x86.fma.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256",
-"llvm.x86.fma.vfmaddsub.ps" => "__builtin_ia32_vfmaddsubps",
-"llvm.x86.fma.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256",
-"llvm.x86.fma.vfmsub.pd" => "__builtin_ia32_vfmsubpd",
-"llvm.x86.fma.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256",
-"llvm.x86.fma.vfmsub.ps" => "__builtin_ia32_vfmsubps",
-"llvm.x86.fma.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256",
-"llvm.x86.fma.vfmsub.sd" => "__builtin_ia32_vfmsubsd",
-"llvm.x86.fma.vfmsub.ss" => "__builtin_ia32_vfmsubss",
-"llvm.x86.fma.vfmsubadd.pd" => "__builtin_ia32_vfmsubaddpd",
-"llvm.x86.fma.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256",
-"llvm.x86.fma.vfmsubadd.ps" => "__builtin_ia32_vfmsubaddps",
-"llvm.x86.fma.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256",
-"llvm.x86.fma.vfnmadd.pd" => "__builtin_ia32_vfnmaddpd",
-"llvm.x86.fma.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256",
-"llvm.x86.fma.vfnmadd.ps" => "__builtin_ia32_vfnmaddps",
-"llvm.x86.fma.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256",
-"llvm.x86.fma.vfnmadd.sd" => "__builtin_ia32_vfnmaddsd",
-"llvm.x86.fma.vfnmadd.ss" => "__builtin_ia32_vfnmaddss",
-"llvm.x86.fma.vfnmsub.pd" => "__builtin_ia32_vfnmsubpd",
-"llvm.x86.fma.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256",
-"llvm.x86.fma.vfnmsub.ps" => "__builtin_ia32_vfnmsubps",
-"llvm.x86.fma.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256",
-"llvm.x86.fma.vfnmsub.sd" => "__builtin_ia32_vfnmsubsd",
-"llvm.x86.fma.vfnmsub.ss" => "__builtin_ia32_vfnmsubss",
-"llvm.x86.mmx.emms" => "__builtin_ia32_emms",
-"llvm.x86.mmx.femms" => "__builtin_ia32_femms",
-"llvm.x86.pclmulqdq" => "__builtin_ia32_pclmulqdq128",
-"llvm.x86.rdfsbase.32" => "__builtin_ia32_rdfsbase32",
-"llvm.x86.rdfsbase.64" => "__builtin_ia32_rdfsbase64",
-"llvm.x86.rdgsbase.32" => "__builtin_ia32_rdgsbase32",
-"llvm.x86.rdgsbase.64" => "__builtin_ia32_rdgsbase64",
-"llvm.x86.rdpmc" => "__builtin_ia32_rdpmc",
-"llvm.x86.rdtsc" => "__builtin_ia32_rdtsc",
-"llvm.x86.rdtscp" => "__builtin_ia32_rdtscp",
-"llvm.x86.sha1msg1" => "__builtin_ia32_sha1msg1",
-"llvm.x86.sha1msg2" => "__builtin_ia32_sha1msg2",
-"llvm.x86.sha1nexte" => "__builtin_ia32_sha1nexte",
-"llvm.x86.sha1rnds4" => "__builtin_ia32_sha1rnds4",
-"llvm.x86.sha256msg1" => "__builtin_ia32_sha256msg1",
-"llvm.x86.sha256msg2" => "__builtin_ia32_sha256msg2",
-"llvm.x86.sha256rnds2" => "__builtin_ia32_sha256rnds2",
-"llvm.x86.sse.add.ss" => "__builtin_ia32_addss",
-"llvm.x86.sse.cmp.ps" => "__builtin_ia32_cmpps",
-"llvm.x86.sse.cmp.ss" => "__builtin_ia32_cmpss",
-"llvm.x86.sse.comieq.ss" => "__builtin_ia32_comieq",
-"llvm.x86.sse.comige.ss" => "__builtin_ia32_comige",
-"llvm.x86.sse.comigt.ss" => "__builtin_ia32_comigt",
-"llvm.x86.sse.comile.ss" => "__builtin_ia32_comile",
-"llvm.x86.sse.comilt.ss" => "__builtin_ia32_comilt",
-"llvm.x86.sse.comineq.ss" => "__builtin_ia32_comineq",
-"llvm.x86.sse.cvtsi2ss" => "__builtin_ia32_cvtsi2ss",
-"llvm.x86.sse.cvtsi642ss" => "__builtin_ia32_cvtsi642ss",
-"llvm.x86.sse.cvtss2si" => "__builtin_ia32_cvtss2si",
-"llvm.x86.sse.cvtss2si64" => "__builtin_ia32_cvtss2si64",
-"llvm.x86.sse.cvttss2si" => "__builtin_ia32_cvttss2si",
-"llvm.x86.sse.cvttss2si64" => "__builtin_ia32_cvttss2si64",
-"llvm.x86.sse.div.ss" => "__builtin_ia32_divss",
-"llvm.x86.sse.max.ps" => "__builtin_ia32_maxps",
-"llvm.x86.sse.max.ss" => "__builtin_ia32_maxss",
-"llvm.x86.sse.min.ps" => "__builtin_ia32_minps",
-"llvm.x86.sse.min.ss" => "__builtin_ia32_minss",
-"llvm.x86.sse.movmsk.ps" => "__builtin_ia32_movmskps",
-"llvm.x86.sse.mul.ss" => "__builtin_ia32_mulss",
-"llvm.x86.sse.rcp.ps" => "__builtin_ia32_rcpps",
-"llvm.x86.sse.rcp.ss" => "__builtin_ia32_rcpss",
-"llvm.x86.sse.rsqrt.ps" => "__builtin_ia32_rsqrtps",
-"llvm.x86.sse.rsqrt.ss" => "__builtin_ia32_rsqrtss",
-"llvm.x86.sse.sfence" => "__builtin_ia32_sfence",
-"llvm.x86.sse.sqrt.ps" => "__builtin_ia32_sqrtps",
-"llvm.x86.sse.sqrt.ss" => "__builtin_ia32_sqrtss",
-"llvm.x86.sse.storeu.ps" => "__builtin_ia32_storeups",
-"llvm.x86.sse.sub.ss" => "__builtin_ia32_subss",
-"llvm.x86.sse.ucomieq.ss" => "__builtin_ia32_ucomieq",
-"llvm.x86.sse.ucomige.ss" => "__builtin_ia32_ucomige",
-"llvm.x86.sse.ucomigt.ss" => "__builtin_ia32_ucomigt",
-"llvm.x86.sse.ucomile.ss" => "__builtin_ia32_ucomile",
-"llvm.x86.sse.ucomilt.ss" => "__builtin_ia32_ucomilt",
-"llvm.x86.sse.ucomineq.ss" => "__builtin_ia32_ucomineq",
-"llvm.x86.sse2.add.sd" => "__builtin_ia32_addsd",
-"llvm.x86.sse2.clflush" => "__builtin_ia32_clflush",
-"llvm.x86.sse2.cmp.pd" => "__builtin_ia32_cmppd",
-"llvm.x86.sse2.cmp.sd" => "__builtin_ia32_cmpsd",
-"llvm.x86.sse2.comieq.sd" => "__builtin_ia32_comisdeq",
-"llvm.x86.sse2.comige.sd" => "__builtin_ia32_comisdge",
-"llvm.x86.sse2.comigt.sd" => "__builtin_ia32_comisdgt",
-"llvm.x86.sse2.comile.sd" => "__builtin_ia32_comisdle",
-"llvm.x86.sse2.comilt.sd" => "__builtin_ia32_comisdlt",
-"llvm.x86.sse2.comineq.sd" => "__builtin_ia32_comisdneq",
-"llvm.x86.sse2.cvtdq2pd" => "__builtin_ia32_cvtdq2pd",
-"llvm.x86.sse2.cvtdq2ps" => "__builtin_ia32_cvtdq2ps",
-"llvm.x86.sse2.cvtpd2dq" => "__builtin_ia32_cvtpd2dq",
-"llvm.x86.sse2.cvtpd2ps" => "__builtin_ia32_cvtpd2ps",
-"llvm.x86.sse2.cvtps2dq" => "__builtin_ia32_cvtps2dq",
-"llvm.x86.sse2.cvtps2pd" => "__builtin_ia32_cvtps2pd",
-"llvm.x86.sse2.cvtsd2si" => "__builtin_ia32_cvtsd2si",
-"llvm.x86.sse2.cvtsd2si64" => "__builtin_ia32_cvtsd2si64",
-"llvm.x86.sse2.cvtsd2ss" => "__builtin_ia32_cvtsd2ss",
-"llvm.x86.sse2.cvtsi2sd" => "__builtin_ia32_cvtsi2sd",
-"llvm.x86.sse2.cvtsi642sd" => "__builtin_ia32_cvtsi642sd",
-"llvm.x86.sse2.cvtss2sd" => "__builtin_ia32_cvtss2sd",
-"llvm.x86.sse2.cvttpd2dq" => "__builtin_ia32_cvttpd2dq",
-"llvm.x86.sse2.cvttps2dq" => "__builtin_ia32_cvttps2dq",
-"llvm.x86.sse2.cvttsd2si" => "__builtin_ia32_cvttsd2si",
-"llvm.x86.sse2.cvttsd2si64" => "__builtin_ia32_cvttsd2si64",
-"llvm.x86.sse2.div.sd" => "__builtin_ia32_divsd",
-"llvm.x86.sse2.lfence" => "__builtin_ia32_lfence",
-"llvm.x86.sse2.maskmov.dqu" => "__builtin_ia32_maskmovdqu",
-"llvm.x86.sse2.max.pd" => "__builtin_ia32_maxpd",
-"llvm.x86.sse2.max.sd" => "__builtin_ia32_maxsd",
-"llvm.x86.sse2.mfence" => "__builtin_ia32_mfence",
-"llvm.x86.sse2.min.pd" => "__builtin_ia32_minpd",
-"llvm.x86.sse2.min.sd" => "__builtin_ia32_minsd",
-"llvm.x86.sse2.movmsk.pd" => "__builtin_ia32_movmskpd",
-"llvm.x86.sse2.mul.sd" => "__builtin_ia32_mulsd",
-"llvm.x86.sse2.packssdw.128" => "__builtin_ia32_packssdw128",
-"llvm.x86.sse2.packsswb.128" => "__builtin_ia32_packsswb128",
-"llvm.x86.sse2.packuswb.128" => "__builtin_ia32_packuswb128",
-"llvm.x86.sse2.padds.b" => "__builtin_ia32_paddsb128",
-"llvm.x86.sse2.padds.w" => "__builtin_ia32_paddsw128",
-"llvm.x86.sse2.paddus.b" => "__builtin_ia32_paddusb128",
-"llvm.x86.sse2.paddus.w" => "__builtin_ia32_paddusw128",
-"llvm.x86.sse2.pause" => "__builtin_ia32_pause",
-"llvm.x86.sse2.pavg.b" => "__builtin_ia32_pavgb128",
-"llvm.x86.sse2.pavg.w" => "__builtin_ia32_pavgw128",
-"llvm.x86.sse2.pmadd.wd" => "__builtin_ia32_pmaddwd128",
-"llvm.x86.sse2.pmaxs.w" => "__builtin_ia32_pmaxsw128",
-"llvm.x86.sse2.pmaxu.b" => "__builtin_ia32_pmaxub128",
-"llvm.x86.sse2.pmins.w" => "__builtin_ia32_pminsw128",
-"llvm.x86.sse2.pminu.b" => "__builtin_ia32_pminub128",
-"llvm.x86.sse2.pmovmskb.128" => "__builtin_ia32_pmovmskb128",
-"llvm.x86.sse2.pmulh.w" => "__builtin_ia32_pmulhw128",
-"llvm.x86.sse2.pmulhu.w" => "__builtin_ia32_pmulhuw128",
-"llvm.x86.sse2.pmulu.dq" => "__builtin_ia32_pmuludq128",
-"llvm.x86.sse2.psad.bw" => "__builtin_ia32_psadbw128",
-"llvm.x86.sse2.pshuf.d" => "__builtin_ia32_pshufd",
-"llvm.x86.sse2.pshufh.w" => "__builtin_ia32_pshufhw",
-"llvm.x86.sse2.pshufl.w" => "__builtin_ia32_pshuflw",
-"llvm.x86.sse2.psll.d" => "__builtin_ia32_pslld128",
-"llvm.x86.sse2.psll.dq" => "__builtin_ia32_pslldqi128",
-"llvm.x86.sse2.psll.dq.bs" => "__builtin_ia32_pslldqi128_byteshift",
-"llvm.x86.sse2.psll.q" => "__builtin_ia32_psllq128",
-"llvm.x86.sse2.psll.w" => "__builtin_ia32_psllw128",
-"llvm.x86.sse2.pslli.d" => "__builtin_ia32_pslldi128",
-"llvm.x86.sse2.pslli.q" => "__builtin_ia32_psllqi128",
-"llvm.x86.sse2.pslli.w" => "__builtin_ia32_psllwi128",
-"llvm.x86.sse2.psra.d" => "__builtin_ia32_psrad128",
-"llvm.x86.sse2.psra.w" => "__builtin_ia32_psraw128",
-"llvm.x86.sse2.psrai.d" => "__builtin_ia32_psradi128",
-"llvm.x86.sse2.psrai.w" => "__builtin_ia32_psrawi128",
-"llvm.x86.sse2.psrl.d" => "__builtin_ia32_psrld128",
-"llvm.x86.sse2.psrl.dq" => "__builtin_ia32_psrldqi128",
-"llvm.x86.sse2.psrl.dq.bs" => "__builtin_ia32_psrldqi128_byteshift",
-"llvm.x86.sse2.psrl.q" => "__builtin_ia32_psrlq128",
-"llvm.x86.sse2.psrl.w" => "__builtin_ia32_psrlw128",
-"llvm.x86.sse2.psrli.d" => "__builtin_ia32_psrldi128",
-"llvm.x86.sse2.psrli.q" => "__builtin_ia32_psrlqi128",
-"llvm.x86.sse2.psrli.w" => "__builtin_ia32_psrlwi128",
-"llvm.x86.sse2.psubs.b" => "__builtin_ia32_psubsb128",
-"llvm.x86.sse2.psubs.w" => "__builtin_ia32_psubsw128",
-"llvm.x86.sse2.psubus.b" => "__builtin_ia32_psubusb128",
-"llvm.x86.sse2.psubus.w" => "__builtin_ia32_psubusw128",
-"llvm.x86.sse2.sqrt.pd" => "__builtin_ia32_sqrtpd",
-"llvm.x86.sse2.sqrt.sd" => "__builtin_ia32_sqrtsd",
-"llvm.x86.sse2.storel.dq" => "__builtin_ia32_storelv4si",
-"llvm.x86.sse2.storeu.dq" => "__builtin_ia32_storedqu",
-"llvm.x86.sse2.storeu.pd" => "__builtin_ia32_storeupd",
-"llvm.x86.sse2.sub.sd" => "__builtin_ia32_subsd",
-"llvm.x86.sse2.ucomieq.sd" => "__builtin_ia32_ucomisdeq",
-"llvm.x86.sse2.ucomige.sd" => "__builtin_ia32_ucomisdge",
-"llvm.x86.sse2.ucomigt.sd" => "__builtin_ia32_ucomisdgt",
-"llvm.x86.sse2.ucomile.sd" => "__builtin_ia32_ucomisdle",
-"llvm.x86.sse2.ucomilt.sd" => "__builtin_ia32_ucomisdlt",
-"llvm.x86.sse2.ucomineq.sd" => "__builtin_ia32_ucomisdneq",
-"llvm.x86.sse3.addsub.pd" => "__builtin_ia32_addsubpd",
-"llvm.x86.sse3.addsub.ps" => "__builtin_ia32_addsubps",
-"llvm.x86.sse3.hadd.pd" => "__builtin_ia32_haddpd",
-"llvm.x86.sse3.hadd.ps" => "__builtin_ia32_haddps",
-"llvm.x86.sse3.hsub.pd" => "__builtin_ia32_hsubpd",
-"llvm.x86.sse3.hsub.ps" => "__builtin_ia32_hsubps",
-"llvm.x86.sse3.ldu.dq" => "__builtin_ia32_lddqu",
-"llvm.x86.sse3.monitor" => "__builtin_ia32_monitor",
-"llvm.x86.sse3.mwait" => "__builtin_ia32_mwait",
-"llvm.x86.sse41.blendpd" => "__builtin_ia32_blendpd",
-"llvm.x86.sse41.blendps" => "__builtin_ia32_blendps",
-"llvm.x86.sse41.blendvpd" => "__builtin_ia32_blendvpd",
-"llvm.x86.sse41.blendvps" => "__builtin_ia32_blendvps",
-"llvm.x86.sse41.dppd" => "__builtin_ia32_dppd",
-"llvm.x86.sse41.dpps" => "__builtin_ia32_dpps",
-"llvm.x86.sse41.extractps" => "__builtin_ia32_extractps128",
-"llvm.x86.sse41.insertps" => "__builtin_ia32_insertps128",
-"llvm.x86.sse41.movntdqa" => "__builtin_ia32_movntdqa",
-"llvm.x86.sse41.mpsadbw" => "__builtin_ia32_mpsadbw128",
-"llvm.x86.sse41.packusdw" => "__builtin_ia32_packusdw128",
-"llvm.x86.sse41.pblendvb" => "__builtin_ia32_pblendvb128",
-"llvm.x86.sse41.pblendw" => "__builtin_ia32_pblendw128",
-"llvm.x86.sse41.phminposuw" => "__builtin_ia32_phminposuw128",
-"llvm.x86.sse41.pmaxsb" => "__builtin_ia32_pmaxsb128",
-"llvm.x86.sse41.pmaxsd" => "__builtin_ia32_pmaxsd128",
-"llvm.x86.sse41.pmaxud" => "__builtin_ia32_pmaxud128",
-"llvm.x86.sse41.pmaxuw" => "__builtin_ia32_pmaxuw128",
-"llvm.x86.sse41.pminsb" => "__builtin_ia32_pminsb128",
-"llvm.x86.sse41.pminsd" => "__builtin_ia32_pminsd128",
-"llvm.x86.sse41.pminud" => "__builtin_ia32_pminud128",
-"llvm.x86.sse41.pminuw" => "__builtin_ia32_pminuw128",
-"llvm.x86.sse41.pmovsxbd" => "__builtin_ia32_pmovsxbd128",
-"llvm.x86.sse41.pmovsxbq" => "__builtin_ia32_pmovsxbq128",
-"llvm.x86.sse41.pmovsxbw" => "__builtin_ia32_pmovsxbw128",
-"llvm.x86.sse41.pmovsxdq" => "__builtin_ia32_pmovsxdq128",
-"llvm.x86.sse41.pmovsxwd" => "__builtin_ia32_pmovsxwd128",
-"llvm.x86.sse41.pmovsxwq" => "__builtin_ia32_pmovsxwq128",
-"llvm.x86.sse41.pmovzxbd" => "__builtin_ia32_pmovzxbd128",
-"llvm.x86.sse41.pmovzxbq" => "__builtin_ia32_pmovzxbq128",
-"llvm.x86.sse41.pmovzxbw" => "__builtin_ia32_pmovzxbw128",
-"llvm.x86.sse41.pmovzxdq" => "__builtin_ia32_pmovzxdq128",
-"llvm.x86.sse41.pmovzxwd" => "__builtin_ia32_pmovzxwd128",
-"llvm.x86.sse41.pmovzxwq" => "__builtin_ia32_pmovzxwq128",
-"llvm.x86.sse41.pmuldq" => "__builtin_ia32_pmuldq128",
-"llvm.x86.sse41.ptestc" => "__builtin_ia32_ptestc128",
-"llvm.x86.sse41.ptestnzc" => "__builtin_ia32_ptestnzc128",
-"llvm.x86.sse41.ptestz" => "__builtin_ia32_ptestz128",
-"llvm.x86.sse41.round.pd" => "__builtin_ia32_roundpd",
-"llvm.x86.sse41.round.ps" => "__builtin_ia32_roundps",
-"llvm.x86.sse41.round.sd" => "__builtin_ia32_roundsd",
-"llvm.x86.sse41.round.ss" => "__builtin_ia32_roundss",
-"llvm.x86.sse42.crc32.32.16" => "__builtin_ia32_crc32hi",
-"llvm.x86.sse42.crc32.32.32" => "__builtin_ia32_crc32si",
-"llvm.x86.sse42.crc32.32.8" => "__builtin_ia32_crc32qi",
-"llvm.x86.sse42.crc32.64.64" => "__builtin_ia32_crc32di",
-"llvm.x86.sse42.pcmpestri128" => "__builtin_ia32_pcmpestri128",
-"llvm.x86.sse42.pcmpestria128" => "__builtin_ia32_pcmpestria128",
-"llvm.x86.sse42.pcmpestric128" => "__builtin_ia32_pcmpestric128",
-"llvm.x86.sse42.pcmpestrio128" => "__builtin_ia32_pcmpestrio128",
-"llvm.x86.sse42.pcmpestris128" => "__builtin_ia32_pcmpestris128",
-"llvm.x86.sse42.pcmpestriz128" => "__builtin_ia32_pcmpestriz128",
-"llvm.x86.sse42.pcmpestrm128" => "__builtin_ia32_pcmpestrm128",
-"llvm.x86.sse42.pcmpistri128" => "__builtin_ia32_pcmpistri128",
-"llvm.x86.sse42.pcmpistria128" => "__builtin_ia32_pcmpistria128",
-"llvm.x86.sse42.pcmpistric128" => "__builtin_ia32_pcmpistric128",
-"llvm.x86.sse42.pcmpistrio128" => "__builtin_ia32_pcmpistrio128",
-"llvm.x86.sse42.pcmpistris128" => "__builtin_ia32_pcmpistris128",
-"llvm.x86.sse42.pcmpistriz128" => "__builtin_ia32_pcmpistriz128",
-"llvm.x86.sse42.pcmpistrm128" => "__builtin_ia32_pcmpistrm128",
-"llvm.x86.sse4a.extrq" => "__builtin_ia32_extrq",
-"llvm.x86.sse4a.extrqi" => "__builtin_ia32_extrqi",
-"llvm.x86.sse4a.insertq" => "__builtin_ia32_insertq",
-"llvm.x86.sse4a.insertqi" => "__builtin_ia32_insertqi",
-"llvm.x86.sse4a.movnt.sd" => "__builtin_ia32_movntsd",
-"llvm.x86.sse4a.movnt.ss" => "__builtin_ia32_movntss",
-"llvm.x86.ssse3.pabs.b.128" => "__builtin_ia32_pabsb128",
-"llvm.x86.ssse3.pabs.d.128" => "__builtin_ia32_pabsd128",
-"llvm.x86.ssse3.pabs.w.128" => "__builtin_ia32_pabsw128",
-"llvm.x86.ssse3.phadd.d.128" => "__builtin_ia32_phaddd128",
-"llvm.x86.ssse3.phadd.sw.128" => "__builtin_ia32_phaddsw128",
-"llvm.x86.ssse3.phadd.w.128" => "__builtin_ia32_phaddw128",
-"llvm.x86.ssse3.phsub.d.128" => "__builtin_ia32_phsubd128",
-"llvm.x86.ssse3.phsub.sw.128" => "__builtin_ia32_phsubsw128",
-"llvm.x86.ssse3.phsub.w.128" => "__builtin_ia32_phsubw128",
-"llvm.x86.ssse3.pmadd.ub.sw.128" => "__builtin_ia32_pmaddubsw128",
-"llvm.x86.ssse3.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128",
-"llvm.x86.ssse3.pshuf.b.128" => "__builtin_ia32_pshufb128",
-"llvm.x86.ssse3.psign.b.128" => "__builtin_ia32_psignb128",
-"llvm.x86.ssse3.psign.d.128" => "__builtin_ia32_psignd128",
-"llvm.x86.ssse3.psign.w.128" => "__builtin_ia32_psignw128",
-"llvm.x86.subborrow.u32" => "__builtin_ia32_subborrow_u32",
-"llvm.x86.subborrow.u64" => "__builtin_ia32_subborrow_u64",
-"llvm.x86.tbm.bextri.u32" => "__builtin_ia32_bextri_u32",
-"llvm.x86.tbm.bextri.u64" => "__builtin_ia32_bextri_u64",
-"llvm.x86.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps",
-"llvm.x86.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256",
-"llvm.x86.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph",
-"llvm.x86.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256",
-"llvm.x86.wrfsbase.32" => "__builtin_ia32_wrfsbase32",
-"llvm.x86.wrfsbase.64" => "__builtin_ia32_wrfsbase64",
-"llvm.x86.wrgsbase.32" => "__builtin_ia32_wrgsbase32",
-"llvm.x86.wrgsbase.64" => "__builtin_ia32_wrgsbase64",
-"llvm.x86.xabort" => "__builtin_ia32_xabort",
-"llvm.x86.xbegin" => "__builtin_ia32_xbegin",
-"llvm.x86.xend" => "__builtin_ia32_xend",
-"llvm.x86.xop.vfrcz.pd" => "__builtin_ia32_vfrczpd",
-"llvm.x86.xop.vfrcz.pd.256" => "__builtin_ia32_vfrczpd256",
-"llvm.x86.xop.vfrcz.ps" => "__builtin_ia32_vfrczps",
-"llvm.x86.xop.vfrcz.ps.256" => "__builtin_ia32_vfrczps256",
-"llvm.x86.xop.vfrcz.sd" => "__builtin_ia32_vfrczsd",
-"llvm.x86.xop.vfrcz.ss" => "__builtin_ia32_vfrczss",
-"llvm.x86.xop.vpcmov" => "__builtin_ia32_vpcmov",
-"llvm.x86.xop.vpcmov.256" => "__builtin_ia32_vpcmov_256",
-"llvm.x86.xop.vpcomb" => "__builtin_ia32_vpcomb",
-"llvm.x86.xop.vpcomd" => "__builtin_ia32_vpcomd",
-"llvm.x86.xop.vpcomq" => "__builtin_ia32_vpcomq",
-"llvm.x86.xop.vpcomub" => "__builtin_ia32_vpcomub",
-"llvm.x86.xop.vpcomud" => "__builtin_ia32_vpcomud",
-"llvm.x86.xop.vpcomuq" => "__builtin_ia32_vpcomuq",
-"llvm.x86.xop.vpcomuw" => "__builtin_ia32_vpcomuw",
-"llvm.x86.xop.vpcomw" => "__builtin_ia32_vpcomw",
-"llvm.x86.xop.vpermil2pd" => "__builtin_ia32_vpermil2pd",
-"llvm.x86.xop.vpermil2pd.256" => "__builtin_ia32_vpermil2pd256",
-"llvm.x86.xop.vpermil2ps" => "__builtin_ia32_vpermil2ps",
-"llvm.x86.xop.vpermil2ps.256" => "__builtin_ia32_vpermil2ps256",
-"llvm.x86.xop.vphaddbd" => "__builtin_ia32_vphaddbd",
-"llvm.x86.xop.vphaddbq" => "__builtin_ia32_vphaddbq",
-"llvm.x86.xop.vphaddbw" => "__builtin_ia32_vphaddbw",
-"llvm.x86.xop.vphadddq" => "__builtin_ia32_vphadddq",
-"llvm.x86.xop.vphaddubd" => "__builtin_ia32_vphaddubd",
-"llvm.x86.xop.vphaddubq" => "__builtin_ia32_vphaddubq",
-"llvm.x86.xop.vphaddubw" => "__builtin_ia32_vphaddubw",
-"llvm.x86.xop.vphaddudq" => "__builtin_ia32_vphaddudq",
-"llvm.x86.xop.vphadduwd" => "__builtin_ia32_vphadduwd",
-"llvm.x86.xop.vphadduwq" => "__builtin_ia32_vphadduwq",
-"llvm.x86.xop.vphaddwd" => "__builtin_ia32_vphaddwd",
-"llvm.x86.xop.vphaddwq" => "__builtin_ia32_vphaddwq",
-"llvm.x86.xop.vphsubbw" => "__builtin_ia32_vphsubbw",
-"llvm.x86.xop.vphsubdq" => "__builtin_ia32_vphsubdq",
-"llvm.x86.xop.vphsubwd" => "__builtin_ia32_vphsubwd",
-"llvm.x86.xop.vpmacsdd" => "__builtin_ia32_vpmacsdd",
-"llvm.x86.xop.vpmacsdqh" => "__builtin_ia32_vpmacsdqh",
-"llvm.x86.xop.vpmacsdql" => "__builtin_ia32_vpmacsdql",
-"llvm.x86.xop.vpmacssdd" => "__builtin_ia32_vpmacssdd",
-"llvm.x86.xop.vpmacssdqh" => "__builtin_ia32_vpmacssdqh",
-"llvm.x86.xop.vpmacssdql" => "__builtin_ia32_vpmacssdql",
-"llvm.x86.xop.vpmacsswd" => "__builtin_ia32_vpmacsswd",
-"llvm.x86.xop.vpmacssww" => "__builtin_ia32_vpmacssww",
-"llvm.x86.xop.vpmacswd" => "__builtin_ia32_vpmacswd",
-"llvm.x86.xop.vpmacsww" => "__builtin_ia32_vpmacsww",
-"llvm.x86.xop.vpmadcsswd" => "__builtin_ia32_vpmadcsswd",
-"llvm.x86.xop.vpmadcswd" => "__builtin_ia32_vpmadcswd",
-"llvm.x86.xop.vpperm" => "__builtin_ia32_vpperm",
-"llvm.x86.xop.vprotb" => "__builtin_ia32_vprotb",
-"llvm.x86.xop.vprotbi" => "__builtin_ia32_vprotbi",
-"llvm.x86.xop.vprotd" => "__builtin_ia32_vprotd",
-"llvm.x86.xop.vprotdi" => "__builtin_ia32_vprotdi",
-"llvm.x86.xop.vprotq" => "__builtin_ia32_vprotq",
-"llvm.x86.xop.vprotqi" => "__builtin_ia32_vprotqi",
-"llvm.x86.xop.vprotw" => "__builtin_ia32_vprotw",
-"llvm.x86.xop.vprotwi" => "__builtin_ia32_vprotwi",
-"llvm.x86.xop.vpshab" => "__builtin_ia32_vpshab",
-"llvm.x86.xop.vpshad" => "__builtin_ia32_vpshad",
-"llvm.x86.xop.vpshaq" => "__builtin_ia32_vpshaq",
-"llvm.x86.xop.vpshaw" => "__builtin_ia32_vpshaw",
-"llvm.x86.xop.vpshlb" => "__builtin_ia32_vpshlb",
-"llvm.x86.xop.vpshld" => "__builtin_ia32_vpshld",
-"llvm.x86.xop.vpshlq" => "__builtin_ia32_vpshlq",
-"llvm.x86.xop.vpshlw" => "__builtin_ia32_vpshlw",
-"llvm.x86.xtest" => "__builtin_ia32_xtest",
-_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
-}

From ef1a6d7c23757fec36ee3b353710f56241bbd34b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 30 Mar 2022 23:34:05 -0400
Subject: [PATCH 057/997] Fix error related to var tracking assignments

---
 src/base.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/base.rs b/src/base.rs
index d88fe9bca2ac..e4ecbd46f0c4 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -89,6 +89,8 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
         }
+        // NOTE: This is needed to compile the file src/intrinsic/archs.rs during a bootstrap of rustc.
+        context.add_command_line_option("-fno-var-tracking-assignments");
         // NOTE: an optimization (https://github.com/rust-lang/rustc_codegen_gcc/issues/53).
         context.add_command_line_option("-fno-semantic-interposition");
         // NOTE: Rust relies on LLVM not doing TBAA (https://github.com/rust-lang/unsafe-code-guidelines/issues/292).

From 035ac03521cd65bd9b5daf1128a0a3f67b939478 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume.gomez@huawei.com>
Date: Wed, 30 Mar 2022 20:49:22 +0200
Subject: [PATCH 058/997] Add intrinsics not bound to a specific arch

---
 src/intrinsic/archs.rs | 1622 ++++++++++++++++++++--------------------
 1 file changed, 811 insertions(+), 811 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 0376e0afef95..ef8a54f3530b 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -1,140 +1,58 @@
 match name {
-    // ppc
-    "llvm.ppc.altivec.dss" => "__builtin_altivec_dss",
-    "llvm.ppc.altivec.dssall" => "__builtin_altivec_dssall",
-    "llvm.ppc.altivec.dst" => "__builtin_altivec_dst",
-    "llvm.ppc.altivec.dstst" => "__builtin_altivec_dstst",
-    "llvm.ppc.altivec.dststt" => "__builtin_altivec_dststt",
-    "llvm.ppc.altivec.dstt" => "__builtin_altivec_dstt",
-    "llvm.ppc.altivec.mfvscr" => "__builtin_altivec_mfvscr",
-    "llvm.ppc.altivec.mtvscr" => "__builtin_altivec_mtvscr",
-    "llvm.ppc.altivec.vaddcuw" => "__builtin_altivec_vaddcuw",
-    "llvm.ppc.altivec.vaddsbs" => "__builtin_altivec_vaddsbs",
-    "llvm.ppc.altivec.vaddshs" => "__builtin_altivec_vaddshs",
-    "llvm.ppc.altivec.vaddsws" => "__builtin_altivec_vaddsws",
-    "llvm.ppc.altivec.vaddubs" => "__builtin_altivec_vaddubs",
-    "llvm.ppc.altivec.vadduhs" => "__builtin_altivec_vadduhs",
-    "llvm.ppc.altivec.vadduws" => "__builtin_altivec_vadduws",
-    "llvm.ppc.altivec.vavgsb" => "__builtin_altivec_vavgsb",
-    "llvm.ppc.altivec.vavgsh" => "__builtin_altivec_vavgsh",
-    "llvm.ppc.altivec.vavgsw" => "__builtin_altivec_vavgsw",
-    "llvm.ppc.altivec.vavgub" => "__builtin_altivec_vavgub",
-    "llvm.ppc.altivec.vavguh" => "__builtin_altivec_vavguh",
-    "llvm.ppc.altivec.vavguw" => "__builtin_altivec_vavguw",
-    "llvm.ppc.altivec.vcfsx" => "__builtin_altivec_vcfsx",
-    "llvm.ppc.altivec.vcfux" => "__builtin_altivec_vcfux",
-    "llvm.ppc.altivec.vcmpbfp" => "__builtin_altivec_vcmpbfp",
-    "llvm.ppc.altivec.vcmpbfp.p" => "__builtin_altivec_vcmpbfp_p",
-    "llvm.ppc.altivec.vcmpeqfp" => "__builtin_altivec_vcmpeqfp",
-    "llvm.ppc.altivec.vcmpeqfp.p" => "__builtin_altivec_vcmpeqfp_p",
-    "llvm.ppc.altivec.vcmpequb" => "__builtin_altivec_vcmpequb",
-    "llvm.ppc.altivec.vcmpequb.p" => "__builtin_altivec_vcmpequb_p",
-    "llvm.ppc.altivec.vcmpequh" => "__builtin_altivec_vcmpequh",
-    "llvm.ppc.altivec.vcmpequh.p" => "__builtin_altivec_vcmpequh_p",
-    "llvm.ppc.altivec.vcmpequw" => "__builtin_altivec_vcmpequw",
-    "llvm.ppc.altivec.vcmpequw.p" => "__builtin_altivec_vcmpequw_p",
-    "llvm.ppc.altivec.vcmpgefp" => "__builtin_altivec_vcmpgefp",
-    "llvm.ppc.altivec.vcmpgefp.p" => "__builtin_altivec_vcmpgefp_p",
-    "llvm.ppc.altivec.vcmpgtfp" => "__builtin_altivec_vcmpgtfp",
-    "llvm.ppc.altivec.vcmpgtfp.p" => "__builtin_altivec_vcmpgtfp_p",
-    "llvm.ppc.altivec.vcmpgtsb" => "__builtin_altivec_vcmpgtsb",
-    "llvm.ppc.altivec.vcmpgtsb.p" => "__builtin_altivec_vcmpgtsb_p",
-    "llvm.ppc.altivec.vcmpgtsh" => "__builtin_altivec_vcmpgtsh",
-    "llvm.ppc.altivec.vcmpgtsh.p" => "__builtin_altivec_vcmpgtsh_p",
-    "llvm.ppc.altivec.vcmpgtsw" => "__builtin_altivec_vcmpgtsw",
-    "llvm.ppc.altivec.vcmpgtsw.p" => "__builtin_altivec_vcmpgtsw_p",
-    "llvm.ppc.altivec.vcmpgtub" => "__builtin_altivec_vcmpgtub",
-    "llvm.ppc.altivec.vcmpgtub.p" => "__builtin_altivec_vcmpgtub_p",
-    "llvm.ppc.altivec.vcmpgtuh" => "__builtin_altivec_vcmpgtuh",
-    "llvm.ppc.altivec.vcmpgtuh.p" => "__builtin_altivec_vcmpgtuh_p",
-    "llvm.ppc.altivec.vcmpgtuw" => "__builtin_altivec_vcmpgtuw",
-    "llvm.ppc.altivec.vcmpgtuw.p" => "__builtin_altivec_vcmpgtuw_p",
-    "llvm.ppc.altivec.vctsxs" => "__builtin_altivec_vctsxs",
-    "llvm.ppc.altivec.vctuxs" => "__builtin_altivec_vctuxs",
-    "llvm.ppc.altivec.vexptefp" => "__builtin_altivec_vexptefp",
-    "llvm.ppc.altivec.vlogefp" => "__builtin_altivec_vlogefp",
-    "llvm.ppc.altivec.vmaddfp" => "__builtin_altivec_vmaddfp",
-    "llvm.ppc.altivec.vmaxfp" => "__builtin_altivec_vmaxfp",
-    "llvm.ppc.altivec.vmaxsb" => "__builtin_altivec_vmaxsb",
-    "llvm.ppc.altivec.vmaxsh" => "__builtin_altivec_vmaxsh",
-    "llvm.ppc.altivec.vmaxsw" => "__builtin_altivec_vmaxsw",
-    "llvm.ppc.altivec.vmaxub" => "__builtin_altivec_vmaxub",
-    "llvm.ppc.altivec.vmaxuh" => "__builtin_altivec_vmaxuh",
-    "llvm.ppc.altivec.vmaxuw" => "__builtin_altivec_vmaxuw",
-    "llvm.ppc.altivec.vmhaddshs" => "__builtin_altivec_vmhaddshs",
-    "llvm.ppc.altivec.vmhraddshs" => "__builtin_altivec_vmhraddshs",
-    "llvm.ppc.altivec.vminfp" => "__builtin_altivec_vminfp",
-    "llvm.ppc.altivec.vminsb" => "__builtin_altivec_vminsb",
-    "llvm.ppc.altivec.vminsh" => "__builtin_altivec_vminsh",
-    "llvm.ppc.altivec.vminsw" => "__builtin_altivec_vminsw",
-    "llvm.ppc.altivec.vminub" => "__builtin_altivec_vminub",
-    "llvm.ppc.altivec.vminuh" => "__builtin_altivec_vminuh",
-    "llvm.ppc.altivec.vminuw" => "__builtin_altivec_vminuw",
-    "llvm.ppc.altivec.vmladduhm" => "__builtin_altivec_vmladduhm",
-    "llvm.ppc.altivec.vmsummbm" => "__builtin_altivec_vmsummbm",
-    "llvm.ppc.altivec.vmsumshm" => "__builtin_altivec_vmsumshm",
-    "llvm.ppc.altivec.vmsumshs" => "__builtin_altivec_vmsumshs",
-    "llvm.ppc.altivec.vmsumubm" => "__builtin_altivec_vmsumubm",
-    "llvm.ppc.altivec.vmsumuhm" => "__builtin_altivec_vmsumuhm",
-    "llvm.ppc.altivec.vmsumuhs" => "__builtin_altivec_vmsumuhs",
-    "llvm.ppc.altivec.vmulesb" => "__builtin_altivec_vmulesb",
-    "llvm.ppc.altivec.vmulesh" => "__builtin_altivec_vmulesh",
-    "llvm.ppc.altivec.vmuleub" => "__builtin_altivec_vmuleub",
-    "llvm.ppc.altivec.vmuleuh" => "__builtin_altivec_vmuleuh",
-    "llvm.ppc.altivec.vmulosb" => "__builtin_altivec_vmulosb",
-    "llvm.ppc.altivec.vmulosh" => "__builtin_altivec_vmulosh",
-    "llvm.ppc.altivec.vmuloub" => "__builtin_altivec_vmuloub",
-    "llvm.ppc.altivec.vmulouh" => "__builtin_altivec_vmulouh",
-    "llvm.ppc.altivec.vnmsubfp" => "__builtin_altivec_vnmsubfp",
-    "llvm.ppc.altivec.vperm" => "__builtin_altivec_vperm_4si",
-    "llvm.ppc.altivec.vpkpx" => "__builtin_altivec_vpkpx",
-    "llvm.ppc.altivec.vpkshss" => "__builtin_altivec_vpkshss",
-    "llvm.ppc.altivec.vpkshus" => "__builtin_altivec_vpkshus",
-    "llvm.ppc.altivec.vpkswss" => "__builtin_altivec_vpkswss",
-    "llvm.ppc.altivec.vpkswus" => "__builtin_altivec_vpkswus",
-    "llvm.ppc.altivec.vpkuhus" => "__builtin_altivec_vpkuhus",
-    "llvm.ppc.altivec.vpkuwus" => "__builtin_altivec_vpkuwus",
-    "llvm.ppc.altivec.vrefp" => "__builtin_altivec_vrefp",
-    "llvm.ppc.altivec.vrfim" => "__builtin_altivec_vrfim",
-    "llvm.ppc.altivec.vrfin" => "__builtin_altivec_vrfin",
-    "llvm.ppc.altivec.vrfip" => "__builtin_altivec_vrfip",
-    "llvm.ppc.altivec.vrfiz" => "__builtin_altivec_vrfiz",
-    "llvm.ppc.altivec.vrlb" => "__builtin_altivec_vrlb",
-    "llvm.ppc.altivec.vrlh" => "__builtin_altivec_vrlh",
-    "llvm.ppc.altivec.vrlw" => "__builtin_altivec_vrlw",
-    "llvm.ppc.altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
-    "llvm.ppc.altivec.vsel" => "__builtin_altivec_vsel_4si",
-    "llvm.ppc.altivec.vsl" => "__builtin_altivec_vsl",
-    "llvm.ppc.altivec.vslb" => "__builtin_altivec_vslb",
-    "llvm.ppc.altivec.vslh" => "__builtin_altivec_vslh",
-    "llvm.ppc.altivec.vslo" => "__builtin_altivec_vslo",
-    "llvm.ppc.altivec.vslw" => "__builtin_altivec_vslw",
-    "llvm.ppc.altivec.vsr" => "__builtin_altivec_vsr",
-    "llvm.ppc.altivec.vsrab" => "__builtin_altivec_vsrab",
-    "llvm.ppc.altivec.vsrah" => "__builtin_altivec_vsrah",
-    "llvm.ppc.altivec.vsraw" => "__builtin_altivec_vsraw",
-    "llvm.ppc.altivec.vsrb" => "__builtin_altivec_vsrb",
-    "llvm.ppc.altivec.vsrh" => "__builtin_altivec_vsrh",
-    "llvm.ppc.altivec.vsro" => "__builtin_altivec_vsro",
-    "llvm.ppc.altivec.vsrw" => "__builtin_altivec_vsrw",
-    "llvm.ppc.altivec.vsubcuw" => "__builtin_altivec_vsubcuw",
-    "llvm.ppc.altivec.vsubsbs" => "__builtin_altivec_vsubsbs",
-    "llvm.ppc.altivec.vsubshs" => "__builtin_altivec_vsubshs",
-    "llvm.ppc.altivec.vsubsws" => "__builtin_altivec_vsubsws",
-    "llvm.ppc.altivec.vsububs" => "__builtin_altivec_vsububs",
-    "llvm.ppc.altivec.vsubuhs" => "__builtin_altivec_vsubuhs",
-    "llvm.ppc.altivec.vsubuws" => "__builtin_altivec_vsubuws",
-    "llvm.ppc.altivec.vsum2sws" => "__builtin_altivec_vsum2sws",
-    "llvm.ppc.altivec.vsum4sbs" => "__builtin_altivec_vsum4sbs",
-    "llvm.ppc.altivec.vsum4shs" => "__builtin_altivec_vsum4shs",
-    "llvm.ppc.altivec.vsum4ubs" => "__builtin_altivec_vsum4ubs",
-    "llvm.ppc.altivec.vsumsws" => "__builtin_altivec_vsumsws",
-    "llvm.ppc.altivec.vupkhpx" => "__builtin_altivec_vupkhpx",
-    "llvm.ppc.altivec.vupkhsb" => "__builtin_altivec_vupkhsb",
-    "llvm.ppc.altivec.vupkhsh" => "__builtin_altivec_vupkhsh",
-    "llvm.ppc.altivec.vupklpx" => "__builtin_altivec_vupklpx",
-    "llvm.ppc.altivec.vupklsb" => "__builtin_altivec_vupklsb",
-    "llvm.ppc.altivec.vupklsh" => "__builtin_altivec_vupklsh",
+    // AMDGPU
+    "llvm.AMDGPU.div.fixup.f32" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fixup.f64" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fixup.v2f64" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fixup.v4f32" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fmas.f32" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.div.fmas.f64" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.div.fmas.v2f64" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.div.fmas.v4f32" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.ldexp.f32" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.ldexp.f64" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.ldexp.v2f64" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.ldexp.v4f32" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.rcp.f32" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rcp.f64" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rcp.v2f64" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rcp.v4f32" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rsq.clamped.f32" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.clamped.f64" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.clamped.v2f64" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.clamped.v4f32" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.f32" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.rsq.f64" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.rsq.v2f64" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.rsq.v4f32" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.trig.preop.f32" => "__builtin_amdgpu_trig_preop",
+    "llvm.AMDGPU.trig.preop.f64" => "__builtin_amdgpu_trig_preop",
+    "llvm.AMDGPU.trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
+    "llvm.AMDGPU.trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
+    // aarch64
+    "llvm.aarch64.dmb" => "__builtin_arm_dmb",
+    "llvm.aarch64.dsb" => "__builtin_arm_dsb",
+    "llvm.aarch64.isb" => "__builtin_arm_isb",
+    // arm
+    "llvm.arm.cdp" => "__builtin_arm_cdp",
+    "llvm.arm.cdp2" => "__builtin_arm_cdp2",
+    "llvm.arm.dmb" => "__builtin_arm_dmb",
+    "llvm.arm.dsb" => "__builtin_arm_dsb",
+    "llvm.arm.get.fpscr" => "__builtin_arm_get_fpscr",
+    "llvm.arm.isb" => "__builtin_arm_isb",
+    "llvm.arm.mcr" => "__builtin_arm_mcr",
+    "llvm.arm.mcr2" => "__builtin_arm_mcr2",
+    "llvm.arm.mcrr" => "__builtin_arm_mcrr",
+    "llvm.arm.mcrr2" => "__builtin_arm_mcrr2",
+    "llvm.arm.mrc" => "__builtin_arm_mrc",
+    "llvm.arm.mrc2" => "__builtin_arm_mrc2",
+    "llvm.arm.qadd" => "__builtin_arm_qadd",
+    "llvm.arm.qsub" => "__builtin_arm_qsub",
+    "llvm.arm.set.fpscr" => "__builtin_arm_set_fpscr",
+    "llvm.arm.ssat" => "__builtin_arm_ssat",
+    "llvm.arm.thread.pointer" => "__builtin_thread_pointer",
+    "llvm.arm.usat" => "__builtin_arm_usat",
+    // cuda
+    "llvm.cuda.syncthreads" => "__syncthreads",
     // hexagon
     "llvm.hexagon.A2.abs" => "__builtin_HEXAGON_A2_abs",
     "llvm.hexagon.A2.absp" => "__builtin_HEXAGON_A2_absp",
@@ -989,10 +907,607 @@ match name {
     "llvm.hexagon.S5.vasrhrnd.goodsyntax" => "__builtin_HEXAGON_S5_vasrhrnd_goodsyntax",
     "llvm.hexagon.SI.to.SXTHI.asrh" => "__builtin_SI_to_SXTHI_asrh",
     "llvm.hexagon.circ.ldd" => "__builtin_circ_ldd",
-    // aarch64
-    "llvm.aarch64.dmb" => "__builtin_arm_dmb",
-    "llvm.aarch64.dsb" => "__builtin_arm_dsb",
-    "llvm.aarch64.isb" => "__builtin_arm_isb",
+    // mips
+    "llvm.mips.add.a.b" => "__builtin_msa_add_a_b",
+    "llvm.mips.add.a.d" => "__builtin_msa_add_a_d",
+    "llvm.mips.add.a.h" => "__builtin_msa_add_a_h",
+    "llvm.mips.add.a.w" => "__builtin_msa_add_a_w",
+    "llvm.mips.adds.a.b" => "__builtin_msa_adds_a_b",
+    "llvm.mips.adds.a.d" => "__builtin_msa_adds_a_d",
+    "llvm.mips.adds.a.h" => "__builtin_msa_adds_a_h",
+    "llvm.mips.adds.a.w" => "__builtin_msa_adds_a_w",
+    "llvm.mips.adds.s.b" => "__builtin_msa_adds_s_b",
+    "llvm.mips.adds.s.d" => "__builtin_msa_adds_s_d",
+    "llvm.mips.adds.s.h" => "__builtin_msa_adds_s_h",
+    "llvm.mips.adds.s.w" => "__builtin_msa_adds_s_w",
+    "llvm.mips.adds.u.b" => "__builtin_msa_adds_u_b",
+    "llvm.mips.adds.u.d" => "__builtin_msa_adds_u_d",
+    "llvm.mips.adds.u.h" => "__builtin_msa_adds_u_h",
+    "llvm.mips.adds.u.w" => "__builtin_msa_adds_u_w",
+    "llvm.mips.addsc" => "__builtin_mips_addsc",
+    "llvm.mips.addu.ph" => "__builtin_mips_addu_ph",
+    "llvm.mips.addu.qb" => "__builtin_mips_addu_qb",
+    "llvm.mips.addu.s.ph" => "__builtin_mips_addu_s_ph",
+    "llvm.mips.addu.s.qb" => "__builtin_mips_addu_s_qb",
+    "llvm.mips.adduh.qb" => "__builtin_mips_adduh_qb",
+    "llvm.mips.adduh.r.qb" => "__builtin_mips_adduh_r_qb",
+    "llvm.mips.addv.b" => "__builtin_msa_addv_b",
+    "llvm.mips.addv.d" => "__builtin_msa_addv_d",
+    "llvm.mips.addv.h" => "__builtin_msa_addv_h",
+    "llvm.mips.addv.w" => "__builtin_msa_addv_w",
+    "llvm.mips.addvi.b" => "__builtin_msa_addvi_b",
+    "llvm.mips.addvi.d" => "__builtin_msa_addvi_d",
+    "llvm.mips.addvi.h" => "__builtin_msa_addvi_h",
+    "llvm.mips.addvi.w" => "__builtin_msa_addvi_w",
+    "llvm.mips.addwc" => "__builtin_mips_addwc",
+    "llvm.mips.and.v" => "__builtin_msa_and_v",
+    "llvm.mips.andi.b" => "__builtin_msa_andi_b",
+    "llvm.mips.append" => "__builtin_mips_append",
+    "llvm.mips.asub.s.b" => "__builtin_msa_asub_s_b",
+    "llvm.mips.asub.s.d" => "__builtin_msa_asub_s_d",
+    "llvm.mips.asub.s.h" => "__builtin_msa_asub_s_h",
+    "llvm.mips.asub.s.w" => "__builtin_msa_asub_s_w",
+    "llvm.mips.asub.u.b" => "__builtin_msa_asub_u_b",
+    "llvm.mips.asub.u.d" => "__builtin_msa_asub_u_d",
+    "llvm.mips.asub.u.h" => "__builtin_msa_asub_u_h",
+    "llvm.mips.asub.u.w" => "__builtin_msa_asub_u_w",
+    "llvm.mips.ave.s.b" => "__builtin_msa_ave_s_b",
+    "llvm.mips.ave.s.d" => "__builtin_msa_ave_s_d",
+    "llvm.mips.ave.s.h" => "__builtin_msa_ave_s_h",
+    "llvm.mips.ave.s.w" => "__builtin_msa_ave_s_w",
+    "llvm.mips.ave.u.b" => "__builtin_msa_ave_u_b",
+    "llvm.mips.ave.u.d" => "__builtin_msa_ave_u_d",
+    "llvm.mips.ave.u.h" => "__builtin_msa_ave_u_h",
+    "llvm.mips.ave.u.w" => "__builtin_msa_ave_u_w",
+    "llvm.mips.aver.s.b" => "__builtin_msa_aver_s_b",
+    "llvm.mips.aver.s.d" => "__builtin_msa_aver_s_d",
+    "llvm.mips.aver.s.h" => "__builtin_msa_aver_s_h",
+    "llvm.mips.aver.s.w" => "__builtin_msa_aver_s_w",
+    "llvm.mips.aver.u.b" => "__builtin_msa_aver_u_b",
+    "llvm.mips.aver.u.d" => "__builtin_msa_aver_u_d",
+    "llvm.mips.aver.u.h" => "__builtin_msa_aver_u_h",
+    "llvm.mips.aver.u.w" => "__builtin_msa_aver_u_w",
+    "llvm.mips.balign" => "__builtin_mips_balign",
+    "llvm.mips.bclr.b" => "__builtin_msa_bclr_b",
+    "llvm.mips.bclr.d" => "__builtin_msa_bclr_d",
+    "llvm.mips.bclr.h" => "__builtin_msa_bclr_h",
+    "llvm.mips.bclr.w" => "__builtin_msa_bclr_w",
+    "llvm.mips.bclri.b" => "__builtin_msa_bclri_b",
+    "llvm.mips.bclri.d" => "__builtin_msa_bclri_d",
+    "llvm.mips.bclri.h" => "__builtin_msa_bclri_h",
+    "llvm.mips.bclri.w" => "__builtin_msa_bclri_w",
+    "llvm.mips.binsl.b" => "__builtin_msa_binsl_b",
+    "llvm.mips.binsl.d" => "__builtin_msa_binsl_d",
+    "llvm.mips.binsl.h" => "__builtin_msa_binsl_h",
+    "llvm.mips.binsl.w" => "__builtin_msa_binsl_w",
+    "llvm.mips.binsli.b" => "__builtin_msa_binsli_b",
+    "llvm.mips.binsli.d" => "__builtin_msa_binsli_d",
+    "llvm.mips.binsli.h" => "__builtin_msa_binsli_h",
+    "llvm.mips.binsli.w" => "__builtin_msa_binsli_w",
+    "llvm.mips.binsr.b" => "__builtin_msa_binsr_b",
+    "llvm.mips.binsr.d" => "__builtin_msa_binsr_d",
+    "llvm.mips.binsr.h" => "__builtin_msa_binsr_h",
+    "llvm.mips.binsr.w" => "__builtin_msa_binsr_w",
+    "llvm.mips.binsri.b" => "__builtin_msa_binsri_b",
+    "llvm.mips.binsri.d" => "__builtin_msa_binsri_d",
+    "llvm.mips.binsri.h" => "__builtin_msa_binsri_h",
+    "llvm.mips.binsri.w" => "__builtin_msa_binsri_w",
+    "llvm.mips.bitrev" => "__builtin_mips_bitrev",
+    "llvm.mips.bmnz.v" => "__builtin_msa_bmnz_v",
+    "llvm.mips.bmnzi.b" => "__builtin_msa_bmnzi_b",
+    "llvm.mips.bmz.v" => "__builtin_msa_bmz_v",
+    "llvm.mips.bmzi.b" => "__builtin_msa_bmzi_b",
+    "llvm.mips.bneg.b" => "__builtin_msa_bneg_b",
+    "llvm.mips.bneg.d" => "__builtin_msa_bneg_d",
+    "llvm.mips.bneg.h" => "__builtin_msa_bneg_h",
+    "llvm.mips.bneg.w" => "__builtin_msa_bneg_w",
+    "llvm.mips.bnegi.b" => "__builtin_msa_bnegi_b",
+    "llvm.mips.bnegi.d" => "__builtin_msa_bnegi_d",
+    "llvm.mips.bnegi.h" => "__builtin_msa_bnegi_h",
+    "llvm.mips.bnegi.w" => "__builtin_msa_bnegi_w",
+    "llvm.mips.bnz.b" => "__builtin_msa_bnz_b",
+    "llvm.mips.bnz.d" => "__builtin_msa_bnz_d",
+    "llvm.mips.bnz.h" => "__builtin_msa_bnz_h",
+    "llvm.mips.bnz.v" => "__builtin_msa_bnz_v",
+    "llvm.mips.bnz.w" => "__builtin_msa_bnz_w",
+    "llvm.mips.bposge32" => "__builtin_mips_bposge32",
+    "llvm.mips.bsel.v" => "__builtin_msa_bsel_v",
+    "llvm.mips.bseli.b" => "__builtin_msa_bseli_b",
+    "llvm.mips.bset.b" => "__builtin_msa_bset_b",
+    "llvm.mips.bset.d" => "__builtin_msa_bset_d",
+    "llvm.mips.bset.h" => "__builtin_msa_bset_h",
+    "llvm.mips.bset.w" => "__builtin_msa_bset_w",
+    "llvm.mips.bseti.b" => "__builtin_msa_bseti_b",
+    "llvm.mips.bseti.d" => "__builtin_msa_bseti_d",
+    "llvm.mips.bseti.h" => "__builtin_msa_bseti_h",
+    "llvm.mips.bseti.w" => "__builtin_msa_bseti_w",
+    "llvm.mips.bz.b" => "__builtin_msa_bz_b",
+    "llvm.mips.bz.d" => "__builtin_msa_bz_d",
+    "llvm.mips.bz.h" => "__builtin_msa_bz_h",
+    "llvm.mips.bz.v" => "__builtin_msa_bz_v",
+    "llvm.mips.bz.w" => "__builtin_msa_bz_w",
+    "llvm.mips.ceq.b" => "__builtin_msa_ceq_b",
+    "llvm.mips.ceq.d" => "__builtin_msa_ceq_d",
+    "llvm.mips.ceq.h" => "__builtin_msa_ceq_h",
+    "llvm.mips.ceq.w" => "__builtin_msa_ceq_w",
+    "llvm.mips.ceqi.b" => "__builtin_msa_ceqi_b",
+    "llvm.mips.ceqi.d" => "__builtin_msa_ceqi_d",
+    "llvm.mips.ceqi.h" => "__builtin_msa_ceqi_h",
+    "llvm.mips.ceqi.w" => "__builtin_msa_ceqi_w",
+    "llvm.mips.cfcmsa" => "__builtin_msa_cfcmsa",
+    "llvm.mips.cle.s.b" => "__builtin_msa_cle_s_b",
+    "llvm.mips.cle.s.d" => "__builtin_msa_cle_s_d",
+    "llvm.mips.cle.s.h" => "__builtin_msa_cle_s_h",
+    "llvm.mips.cle.s.w" => "__builtin_msa_cle_s_w",
+    "llvm.mips.cle.u.b" => "__builtin_msa_cle_u_b",
+    "llvm.mips.cle.u.d" => "__builtin_msa_cle_u_d",
+    "llvm.mips.cle.u.h" => "__builtin_msa_cle_u_h",
+    "llvm.mips.cle.u.w" => "__builtin_msa_cle_u_w",
+    "llvm.mips.clei.s.b" => "__builtin_msa_clei_s_b",
+    "llvm.mips.clei.s.d" => "__builtin_msa_clei_s_d",
+    "llvm.mips.clei.s.h" => "__builtin_msa_clei_s_h",
+    "llvm.mips.clei.s.w" => "__builtin_msa_clei_s_w",
+    "llvm.mips.clei.u.b" => "__builtin_msa_clei_u_b",
+    "llvm.mips.clei.u.d" => "__builtin_msa_clei_u_d",
+    "llvm.mips.clei.u.h" => "__builtin_msa_clei_u_h",
+    "llvm.mips.clei.u.w" => "__builtin_msa_clei_u_w",
+    "llvm.mips.clt.s.b" => "__builtin_msa_clt_s_b",
+    "llvm.mips.clt.s.d" => "__builtin_msa_clt_s_d",
+    "llvm.mips.clt.s.h" => "__builtin_msa_clt_s_h",
+    "llvm.mips.clt.s.w" => "__builtin_msa_clt_s_w",
+    "llvm.mips.clt.u.b" => "__builtin_msa_clt_u_b",
+    "llvm.mips.clt.u.d" => "__builtin_msa_clt_u_d",
+    "llvm.mips.clt.u.h" => "__builtin_msa_clt_u_h",
+    "llvm.mips.clt.u.w" => "__builtin_msa_clt_u_w",
+    "llvm.mips.clti.s.b" => "__builtin_msa_clti_s_b",
+    "llvm.mips.clti.s.d" => "__builtin_msa_clti_s_d",
+    "llvm.mips.clti.s.h" => "__builtin_msa_clti_s_h",
+    "llvm.mips.clti.s.w" => "__builtin_msa_clti_s_w",
+    "llvm.mips.clti.u.b" => "__builtin_msa_clti_u_b",
+    "llvm.mips.clti.u.d" => "__builtin_msa_clti_u_d",
+    "llvm.mips.clti.u.h" => "__builtin_msa_clti_u_h",
+    "llvm.mips.clti.u.w" => "__builtin_msa_clti_u_w",
+    "llvm.mips.cmpgdu.eq.qb" => "__builtin_mips_cmpgdu_eq_qb",
+    "llvm.mips.cmpgdu.le.qb" => "__builtin_mips_cmpgdu_le_qb",
+    "llvm.mips.cmpgdu.lt.qb" => "__builtin_mips_cmpgdu_lt_qb",
+    "llvm.mips.cmpgu.eq.qb" => "__builtin_mips_cmpgu_eq_qb",
+    "llvm.mips.cmpgu.le.qb" => "__builtin_mips_cmpgu_le_qb",
+    "llvm.mips.cmpgu.lt.qb" => "__builtin_mips_cmpgu_lt_qb",
+    "llvm.mips.cmpu.eq.qb" => "__builtin_mips_cmpu_eq_qb",
+    "llvm.mips.cmpu.le.qb" => "__builtin_mips_cmpu_le_qb",
+    "llvm.mips.cmpu.lt.qb" => "__builtin_mips_cmpu_lt_qb",
+    "llvm.mips.copy.s.b" => "__builtin_msa_copy_s_b",
+    "llvm.mips.copy.s.d" => "__builtin_msa_copy_s_d",
+    "llvm.mips.copy.s.h" => "__builtin_msa_copy_s_h",
+    "llvm.mips.copy.s.w" => "__builtin_msa_copy_s_w",
+    "llvm.mips.copy.u.b" => "__builtin_msa_copy_u_b",
+    "llvm.mips.copy.u.d" => "__builtin_msa_copy_u_d",
+    "llvm.mips.copy.u.h" => "__builtin_msa_copy_u_h",
+    "llvm.mips.copy.u.w" => "__builtin_msa_copy_u_w",
+    "llvm.mips.ctcmsa" => "__builtin_msa_ctcmsa",
+    "llvm.mips.div.s.b" => "__builtin_msa_div_s_b",
+    "llvm.mips.div.s.d" => "__builtin_msa_div_s_d",
+    "llvm.mips.div.s.h" => "__builtin_msa_div_s_h",
+    "llvm.mips.div.s.w" => "__builtin_msa_div_s_w",
+    "llvm.mips.div.u.b" => "__builtin_msa_div_u_b",
+    "llvm.mips.div.u.d" => "__builtin_msa_div_u_d",
+    "llvm.mips.div.u.h" => "__builtin_msa_div_u_h",
+    "llvm.mips.div.u.w" => "__builtin_msa_div_u_w",
+    "llvm.mips.dlsa" => "__builtin_mips_dlsa",
+    "llvm.mips.dotp.s.d" => "__builtin_msa_dotp_s_d",
+    "llvm.mips.dotp.s.h" => "__builtin_msa_dotp_s_h",
+    "llvm.mips.dotp.s.w" => "__builtin_msa_dotp_s_w",
+    "llvm.mips.dotp.u.d" => "__builtin_msa_dotp_u_d",
+    "llvm.mips.dotp.u.h" => "__builtin_msa_dotp_u_h",
+    "llvm.mips.dotp.u.w" => "__builtin_msa_dotp_u_w",
+    "llvm.mips.dpa.w.ph" => "__builtin_mips_dpa_w_ph",
+    "llvm.mips.dpadd.s.d" => "__builtin_msa_dpadd_s_d",
+    "llvm.mips.dpadd.s.h" => "__builtin_msa_dpadd_s_h",
+    "llvm.mips.dpadd.s.w" => "__builtin_msa_dpadd_s_w",
+    "llvm.mips.dpadd.u.d" => "__builtin_msa_dpadd_u_d",
+    "llvm.mips.dpadd.u.h" => "__builtin_msa_dpadd_u_h",
+    "llvm.mips.dpadd.u.w" => "__builtin_msa_dpadd_u_w",
+    "llvm.mips.dpau.h.qbl" => "__builtin_mips_dpau_h_qbl",
+    "llvm.mips.dpau.h.qbr" => "__builtin_mips_dpau_h_qbr",
+    "llvm.mips.dpax.w.ph" => "__builtin_mips_dpax_w_ph",
+    "llvm.mips.dps.w.ph" => "__builtin_mips_dps_w_ph",
+    "llvm.mips.dpsu.h.qbl" => "__builtin_mips_dpsu_h_qbl",
+    "llvm.mips.dpsu.h.qbr" => "__builtin_mips_dpsu_h_qbr",
+    "llvm.mips.dpsub.s.d" => "__builtin_msa_dpsub_s_d",
+    "llvm.mips.dpsub.s.h" => "__builtin_msa_dpsub_s_h",
+    "llvm.mips.dpsub.s.w" => "__builtin_msa_dpsub_s_w",
+    "llvm.mips.dpsub.u.d" => "__builtin_msa_dpsub_u_d",
+    "llvm.mips.dpsub.u.h" => "__builtin_msa_dpsub_u_h",
+    "llvm.mips.dpsub.u.w" => "__builtin_msa_dpsub_u_w",
+    "llvm.mips.dpsx.w.ph" => "__builtin_mips_dpsx_w_ph",
+    "llvm.mips.extp" => "__builtin_mips_extp",
+    "llvm.mips.extpdp" => "__builtin_mips_extpdp",
+    "llvm.mips.extr.r.w" => "__builtin_mips_extr_r_w",
+    "llvm.mips.extr.rs.w" => "__builtin_mips_extr_rs_w",
+    "llvm.mips.extr.s.h" => "__builtin_mips_extr_s_h",
+    "llvm.mips.extr.w" => "__builtin_mips_extr_w",
+    "llvm.mips.fadd.d" => "__builtin_msa_fadd_d",
+    "llvm.mips.fadd.w" => "__builtin_msa_fadd_w",
+    "llvm.mips.fcaf.d" => "__builtin_msa_fcaf_d",
+    "llvm.mips.fcaf.w" => "__builtin_msa_fcaf_w",
+    "llvm.mips.fceq.d" => "__builtin_msa_fceq_d",
+    "llvm.mips.fceq.w" => "__builtin_msa_fceq_w",
+    "llvm.mips.fclass.d" => "__builtin_msa_fclass_d",
+    "llvm.mips.fclass.w" => "__builtin_msa_fclass_w",
+    "llvm.mips.fcle.d" => "__builtin_msa_fcle_d",
+    "llvm.mips.fcle.w" => "__builtin_msa_fcle_w",
+    "llvm.mips.fclt.d" => "__builtin_msa_fclt_d",
+    "llvm.mips.fclt.w" => "__builtin_msa_fclt_w",
+    "llvm.mips.fcne.d" => "__builtin_msa_fcne_d",
+    "llvm.mips.fcne.w" => "__builtin_msa_fcne_w",
+    "llvm.mips.fcor.d" => "__builtin_msa_fcor_d",
+    "llvm.mips.fcor.w" => "__builtin_msa_fcor_w",
+    "llvm.mips.fcueq.d" => "__builtin_msa_fcueq_d",
+    "llvm.mips.fcueq.w" => "__builtin_msa_fcueq_w",
+    "llvm.mips.fcule.d" => "__builtin_msa_fcule_d",
+    "llvm.mips.fcule.w" => "__builtin_msa_fcule_w",
+    "llvm.mips.fcult.d" => "__builtin_msa_fcult_d",
+    "llvm.mips.fcult.w" => "__builtin_msa_fcult_w",
+    "llvm.mips.fcun.d" => "__builtin_msa_fcun_d",
+    "llvm.mips.fcun.w" => "__builtin_msa_fcun_w",
+    "llvm.mips.fcune.d" => "__builtin_msa_fcune_d",
+    "llvm.mips.fcune.w" => "__builtin_msa_fcune_w",
+    "llvm.mips.fdiv.d" => "__builtin_msa_fdiv_d",
+    "llvm.mips.fdiv.w" => "__builtin_msa_fdiv_w",
+    "llvm.mips.fexdo.w" => "__builtin_msa_fexdo_w",
+    "llvm.mips.fexp2.d" => "__builtin_msa_fexp2_d",
+    "llvm.mips.fexp2.w" => "__builtin_msa_fexp2_w",
+    "llvm.mips.fexupl.d" => "__builtin_msa_fexupl_d",
+    "llvm.mips.fexupr.d" => "__builtin_msa_fexupr_d",
+    "llvm.mips.ffint.s.d" => "__builtin_msa_ffint_s_d",
+    "llvm.mips.ffint.s.w" => "__builtin_msa_ffint_s_w",
+    "llvm.mips.ffint.u.d" => "__builtin_msa_ffint_u_d",
+    "llvm.mips.ffint.u.w" => "__builtin_msa_ffint_u_w",
+    "llvm.mips.ffql.d" => "__builtin_msa_ffql_d",
+    "llvm.mips.ffql.w" => "__builtin_msa_ffql_w",
+    "llvm.mips.ffqr.d" => "__builtin_msa_ffqr_d",
+    "llvm.mips.ffqr.w" => "__builtin_msa_ffqr_w",
+    "llvm.mips.fill.b" => "__builtin_msa_fill_b",
+    "llvm.mips.fill.d" => "__builtin_msa_fill_d",
+    "llvm.mips.fill.h" => "__builtin_msa_fill_h",
+    "llvm.mips.fill.w" => "__builtin_msa_fill_w",
+    "llvm.mips.flog2.d" => "__builtin_msa_flog2_d",
+    "llvm.mips.flog2.w" => "__builtin_msa_flog2_w",
+    "llvm.mips.fmadd.d" => "__builtin_msa_fmadd_d",
+    "llvm.mips.fmadd.w" => "__builtin_msa_fmadd_w",
+    "llvm.mips.fmax.a.d" => "__builtin_msa_fmax_a_d",
+    "llvm.mips.fmax.a.w" => "__builtin_msa_fmax_a_w",
+    "llvm.mips.fmax.d" => "__builtin_msa_fmax_d",
+    "llvm.mips.fmax.w" => "__builtin_msa_fmax_w",
+    "llvm.mips.fmin.a.d" => "__builtin_msa_fmin_a_d",
+    "llvm.mips.fmin.a.w" => "__builtin_msa_fmin_a_w",
+    "llvm.mips.fmin.d" => "__builtin_msa_fmin_d",
+    "llvm.mips.fmin.w" => "__builtin_msa_fmin_w",
+    "llvm.mips.fmsub.d" => "__builtin_msa_fmsub_d",
+    "llvm.mips.fmsub.w" => "__builtin_msa_fmsub_w",
+    "llvm.mips.fmul.d" => "__builtin_msa_fmul_d",
+    "llvm.mips.fmul.w" => "__builtin_msa_fmul_w",
+    "llvm.mips.frcp.d" => "__builtin_msa_frcp_d",
+    "llvm.mips.frcp.w" => "__builtin_msa_frcp_w",
+    "llvm.mips.frint.d" => "__builtin_msa_frint_d",
+    "llvm.mips.frint.w" => "__builtin_msa_frint_w",
+    "llvm.mips.frsqrt.d" => "__builtin_msa_frsqrt_d",
+    "llvm.mips.frsqrt.w" => "__builtin_msa_frsqrt_w",
+    "llvm.mips.fsaf.d" => "__builtin_msa_fsaf_d",
+    "llvm.mips.fsaf.w" => "__builtin_msa_fsaf_w",
+    "llvm.mips.fseq.d" => "__builtin_msa_fseq_d",
+    "llvm.mips.fseq.w" => "__builtin_msa_fseq_w",
+    "llvm.mips.fsle.d" => "__builtin_msa_fsle_d",
+    "llvm.mips.fsle.w" => "__builtin_msa_fsle_w",
+    "llvm.mips.fslt.d" => "__builtin_msa_fslt_d",
+    "llvm.mips.fslt.w" => "__builtin_msa_fslt_w",
+    "llvm.mips.fsne.d" => "__builtin_msa_fsne_d",
+    "llvm.mips.fsne.w" => "__builtin_msa_fsne_w",
+    "llvm.mips.fsor.d" => "__builtin_msa_fsor_d",
+    "llvm.mips.fsor.w" => "__builtin_msa_fsor_w",
+    "llvm.mips.fsqrt.d" => "__builtin_msa_fsqrt_d",
+    "llvm.mips.fsqrt.w" => "__builtin_msa_fsqrt_w",
+    "llvm.mips.fsub.d" => "__builtin_msa_fsub_d",
+    "llvm.mips.fsub.w" => "__builtin_msa_fsub_w",
+    "llvm.mips.fsueq.d" => "__builtin_msa_fsueq_d",
+    "llvm.mips.fsueq.w" => "__builtin_msa_fsueq_w",
+    "llvm.mips.fsule.d" => "__builtin_msa_fsule_d",
+    "llvm.mips.fsule.w" => "__builtin_msa_fsule_w",
+    "llvm.mips.fsult.d" => "__builtin_msa_fsult_d",
+    "llvm.mips.fsult.w" => "__builtin_msa_fsult_w",
+    "llvm.mips.fsun.d" => "__builtin_msa_fsun_d",
+    "llvm.mips.fsun.w" => "__builtin_msa_fsun_w",
+    "llvm.mips.fsune.d" => "__builtin_msa_fsune_d",
+    "llvm.mips.fsune.w" => "__builtin_msa_fsune_w",
+    "llvm.mips.ftint.s.d" => "__builtin_msa_ftint_s_d",
+    "llvm.mips.ftint.s.w" => "__builtin_msa_ftint_s_w",
+    "llvm.mips.ftint.u.d" => "__builtin_msa_ftint_u_d",
+    "llvm.mips.ftint.u.w" => "__builtin_msa_ftint_u_w",
+    "llvm.mips.ftq.h" => "__builtin_msa_ftq_h",
+    "llvm.mips.ftq.w" => "__builtin_msa_ftq_w",
+    "llvm.mips.ftrunc.s.d" => "__builtin_msa_ftrunc_s_d",
+    "llvm.mips.ftrunc.s.w" => "__builtin_msa_ftrunc_s_w",
+    "llvm.mips.ftrunc.u.d" => "__builtin_msa_ftrunc_u_d",
+    "llvm.mips.ftrunc.u.w" => "__builtin_msa_ftrunc_u_w",
+    "llvm.mips.hadd.s.d" => "__builtin_msa_hadd_s_d",
+    "llvm.mips.hadd.s.h" => "__builtin_msa_hadd_s_h",
+    "llvm.mips.hadd.s.w" => "__builtin_msa_hadd_s_w",
+    "llvm.mips.hadd.u.d" => "__builtin_msa_hadd_u_d",
+    "llvm.mips.hadd.u.h" => "__builtin_msa_hadd_u_h",
+    "llvm.mips.hadd.u.w" => "__builtin_msa_hadd_u_w",
+    "llvm.mips.hsub.s.d" => "__builtin_msa_hsub_s_d",
+    "llvm.mips.hsub.s.h" => "__builtin_msa_hsub_s_h",
+    "llvm.mips.hsub.s.w" => "__builtin_msa_hsub_s_w",
+    "llvm.mips.hsub.u.d" => "__builtin_msa_hsub_u_d",
+    "llvm.mips.hsub.u.h" => "__builtin_msa_hsub_u_h",
+    "llvm.mips.hsub.u.w" => "__builtin_msa_hsub_u_w",
+    "llvm.mips.ilvev.b" => "__builtin_msa_ilvev_b",
+    "llvm.mips.ilvev.d" => "__builtin_msa_ilvev_d",
+    "llvm.mips.ilvev.h" => "__builtin_msa_ilvev_h",
+    "llvm.mips.ilvev.w" => "__builtin_msa_ilvev_w",
+    "llvm.mips.ilvl.b" => "__builtin_msa_ilvl_b",
+    "llvm.mips.ilvl.d" => "__builtin_msa_ilvl_d",
+    "llvm.mips.ilvl.h" => "__builtin_msa_ilvl_h",
+    "llvm.mips.ilvl.w" => "__builtin_msa_ilvl_w",
+    "llvm.mips.ilvod.b" => "__builtin_msa_ilvod_b",
+    "llvm.mips.ilvod.d" => "__builtin_msa_ilvod_d",
+    "llvm.mips.ilvod.h" => "__builtin_msa_ilvod_h",
+    "llvm.mips.ilvod.w" => "__builtin_msa_ilvod_w",
+    "llvm.mips.ilvr.b" => "__builtin_msa_ilvr_b",
+    "llvm.mips.ilvr.d" => "__builtin_msa_ilvr_d",
+    "llvm.mips.ilvr.h" => "__builtin_msa_ilvr_h",
+    "llvm.mips.ilvr.w" => "__builtin_msa_ilvr_w",
+    "llvm.mips.insert.b" => "__builtin_msa_insert_b",
+    "llvm.mips.insert.d" => "__builtin_msa_insert_d",
+    "llvm.mips.insert.h" => "__builtin_msa_insert_h",
+    "llvm.mips.insert.w" => "__builtin_msa_insert_w",
+    "llvm.mips.insv" => "__builtin_mips_insv",
+    "llvm.mips.insve.b" => "__builtin_msa_insve_b",
+    "llvm.mips.insve.d" => "__builtin_msa_insve_d",
+    "llvm.mips.insve.h" => "__builtin_msa_insve_h",
+    "llvm.mips.insve.w" => "__builtin_msa_insve_w",
+    "llvm.mips.lbux" => "__builtin_mips_lbux",
+    "llvm.mips.ld.b" => "__builtin_msa_ld_b",
+    "llvm.mips.ld.d" => "__builtin_msa_ld_d",
+    "llvm.mips.ld.h" => "__builtin_msa_ld_h",
+    "llvm.mips.ld.w" => "__builtin_msa_ld_w",
+    "llvm.mips.ldi.b" => "__builtin_msa_ldi_b",
+    "llvm.mips.ldi.d" => "__builtin_msa_ldi_d",
+    "llvm.mips.ldi.h" => "__builtin_msa_ldi_h",
+    "llvm.mips.ldi.w" => "__builtin_msa_ldi_w",
+    "llvm.mips.lhx" => "__builtin_mips_lhx",
+    "llvm.mips.lsa" => "__builtin_mips_lsa",
+    "llvm.mips.lwx" => "__builtin_mips_lwx",
+    "llvm.mips.madd" => "__builtin_mips_madd",
+    "llvm.mips.madd.q.h" => "__builtin_msa_madd_q_h",
+    "llvm.mips.madd.q.w" => "__builtin_msa_madd_q_w",
+    "llvm.mips.maddr.q.h" => "__builtin_msa_maddr_q_h",
+    "llvm.mips.maddr.q.w" => "__builtin_msa_maddr_q_w",
+    "llvm.mips.maddu" => "__builtin_mips_maddu",
+    "llvm.mips.maddv.b" => "__builtin_msa_maddv_b",
+    "llvm.mips.maddv.d" => "__builtin_msa_maddv_d",
+    "llvm.mips.maddv.h" => "__builtin_msa_maddv_h",
+    "llvm.mips.maddv.w" => "__builtin_msa_maddv_w",
+    "llvm.mips.max.a.b" => "__builtin_msa_max_a_b",
+    "llvm.mips.max.a.d" => "__builtin_msa_max_a_d",
+    "llvm.mips.max.a.h" => "__builtin_msa_max_a_h",
+    "llvm.mips.max.a.w" => "__builtin_msa_max_a_w",
+    "llvm.mips.max.s.b" => "__builtin_msa_max_s_b",
+    "llvm.mips.max.s.d" => "__builtin_msa_max_s_d",
+    "llvm.mips.max.s.h" => "__builtin_msa_max_s_h",
+    "llvm.mips.max.s.w" => "__builtin_msa_max_s_w",
+    "llvm.mips.max.u.b" => "__builtin_msa_max_u_b",
+    "llvm.mips.max.u.d" => "__builtin_msa_max_u_d",
+    "llvm.mips.max.u.h" => "__builtin_msa_max_u_h",
+    "llvm.mips.max.u.w" => "__builtin_msa_max_u_w",
+    "llvm.mips.maxi.s.b" => "__builtin_msa_maxi_s_b",
+    "llvm.mips.maxi.s.d" => "__builtin_msa_maxi_s_d",
+    "llvm.mips.maxi.s.h" => "__builtin_msa_maxi_s_h",
+    "llvm.mips.maxi.s.w" => "__builtin_msa_maxi_s_w",
+    "llvm.mips.maxi.u.b" => "__builtin_msa_maxi_u_b",
+    "llvm.mips.maxi.u.d" => "__builtin_msa_maxi_u_d",
+    "llvm.mips.maxi.u.h" => "__builtin_msa_maxi_u_h",
+    "llvm.mips.maxi.u.w" => "__builtin_msa_maxi_u_w",
+    "llvm.mips.min.a.b" => "__builtin_msa_min_a_b",
+    "llvm.mips.min.a.d" => "__builtin_msa_min_a_d",
+    "llvm.mips.min.a.h" => "__builtin_msa_min_a_h",
+    "llvm.mips.min.a.w" => "__builtin_msa_min_a_w",
+    "llvm.mips.min.s.b" => "__builtin_msa_min_s_b",
+    "llvm.mips.min.s.d" => "__builtin_msa_min_s_d",
+    "llvm.mips.min.s.h" => "__builtin_msa_min_s_h",
+    "llvm.mips.min.s.w" => "__builtin_msa_min_s_w",
+    "llvm.mips.min.u.b" => "__builtin_msa_min_u_b",
+    "llvm.mips.min.u.d" => "__builtin_msa_min_u_d",
+    "llvm.mips.min.u.h" => "__builtin_msa_min_u_h",
+    "llvm.mips.min.u.w" => "__builtin_msa_min_u_w",
+    "llvm.mips.mini.s.b" => "__builtin_msa_mini_s_b",
+    "llvm.mips.mini.s.d" => "__builtin_msa_mini_s_d",
+    "llvm.mips.mini.s.h" => "__builtin_msa_mini_s_h",
+    "llvm.mips.mini.s.w" => "__builtin_msa_mini_s_w",
+    "llvm.mips.mini.u.b" => "__builtin_msa_mini_u_b",
+    "llvm.mips.mini.u.d" => "__builtin_msa_mini_u_d",
+    "llvm.mips.mini.u.h" => "__builtin_msa_mini_u_h",
+    "llvm.mips.mini.u.w" => "__builtin_msa_mini_u_w",
+    "llvm.mips.mod.s.b" => "__builtin_msa_mod_s_b",
+    "llvm.mips.mod.s.d" => "__builtin_msa_mod_s_d",
+    "llvm.mips.mod.s.h" => "__builtin_msa_mod_s_h",
+    "llvm.mips.mod.s.w" => "__builtin_msa_mod_s_w",
+    "llvm.mips.mod.u.b" => "__builtin_msa_mod_u_b",
+    "llvm.mips.mod.u.d" => "__builtin_msa_mod_u_d",
+    "llvm.mips.mod.u.h" => "__builtin_msa_mod_u_h",
+    "llvm.mips.mod.u.w" => "__builtin_msa_mod_u_w",
+    "llvm.mips.modsub" => "__builtin_mips_modsub",
+    "llvm.mips.move.v" => "__builtin_msa_move_v",
+    "llvm.mips.msub" => "__builtin_mips_msub",
+    "llvm.mips.msub.q.h" => "__builtin_msa_msub_q_h",
+    "llvm.mips.msub.q.w" => "__builtin_msa_msub_q_w",
+    "llvm.mips.msubr.q.h" => "__builtin_msa_msubr_q_h",
+    "llvm.mips.msubr.q.w" => "__builtin_msa_msubr_q_w",
+    "llvm.mips.msubu" => "__builtin_mips_msubu",
+    "llvm.mips.msubv.b" => "__builtin_msa_msubv_b",
+    "llvm.mips.msubv.d" => "__builtin_msa_msubv_d",
+    "llvm.mips.msubv.h" => "__builtin_msa_msubv_h",
+    "llvm.mips.msubv.w" => "__builtin_msa_msubv_w",
+    "llvm.mips.mthlip" => "__builtin_mips_mthlip",
+    "llvm.mips.mul.ph" => "__builtin_mips_mul_ph",
+    "llvm.mips.mul.q.h" => "__builtin_msa_mul_q_h",
+    "llvm.mips.mul.q.w" => "__builtin_msa_mul_q_w",
+    "llvm.mips.mul.s.ph" => "__builtin_mips_mul_s_ph",
+    "llvm.mips.mulr.q.h" => "__builtin_msa_mulr_q_h",
+    "llvm.mips.mulr.q.w" => "__builtin_msa_mulr_q_w",
+    "llvm.mips.mulsa.w.ph" => "__builtin_mips_mulsa_w_ph",
+    "llvm.mips.mult" => "__builtin_mips_mult",
+    "llvm.mips.multu" => "__builtin_mips_multu",
+    "llvm.mips.mulv.b" => "__builtin_msa_mulv_b",
+    "llvm.mips.mulv.d" => "__builtin_msa_mulv_d",
+    "llvm.mips.mulv.h" => "__builtin_msa_mulv_h",
+    "llvm.mips.mulv.w" => "__builtin_msa_mulv_w",
+    "llvm.mips.nloc.b" => "__builtin_msa_nloc_b",
+    "llvm.mips.nloc.d" => "__builtin_msa_nloc_d",
+    "llvm.mips.nloc.h" => "__builtin_msa_nloc_h",
+    "llvm.mips.nloc.w" => "__builtin_msa_nloc_w",
+    "llvm.mips.nlzc.b" => "__builtin_msa_nlzc_b",
+    "llvm.mips.nlzc.d" => "__builtin_msa_nlzc_d",
+    "llvm.mips.nlzc.h" => "__builtin_msa_nlzc_h",
+    "llvm.mips.nlzc.w" => "__builtin_msa_nlzc_w",
+    "llvm.mips.nor.v" => "__builtin_msa_nor_v",
+    "llvm.mips.nori.b" => "__builtin_msa_nori_b",
+    "llvm.mips.or.v" => "__builtin_msa_or_v",
+    "llvm.mips.ori.b" => "__builtin_msa_ori_b",
+    "llvm.mips.pckev.b" => "__builtin_msa_pckev_b",
+    "llvm.mips.pckev.d" => "__builtin_msa_pckev_d",
+    "llvm.mips.pckev.h" => "__builtin_msa_pckev_h",
+    "llvm.mips.pckev.w" => "__builtin_msa_pckev_w",
+    "llvm.mips.pckod.b" => "__builtin_msa_pckod_b",
+    "llvm.mips.pckod.d" => "__builtin_msa_pckod_d",
+    "llvm.mips.pckod.h" => "__builtin_msa_pckod_h",
+    "llvm.mips.pckod.w" => "__builtin_msa_pckod_w",
+    "llvm.mips.pcnt.b" => "__builtin_msa_pcnt_b",
+    "llvm.mips.pcnt.d" => "__builtin_msa_pcnt_d",
+    "llvm.mips.pcnt.h" => "__builtin_msa_pcnt_h",
+    "llvm.mips.pcnt.w" => "__builtin_msa_pcnt_w",
+    "llvm.mips.pick.qb" => "__builtin_mips_pick_qb",
+    "llvm.mips.precr.qb.ph" => "__builtin_mips_precr_qb_ph",
+    "llvm.mips.precr.sra.ph.w" => "__builtin_mips_precr_sra_ph_w",
+    "llvm.mips.precr.sra.r.ph.w" => "__builtin_mips_precr_sra_r_ph_w",
+    "llvm.mips.prepend" => "__builtin_mips_prepend",
+    "llvm.mips.raddu.w.qb" => "__builtin_mips_raddu_w_qb",
+    "llvm.mips.rddsp" => "__builtin_mips_rddsp",
+    "llvm.mips.repl.qb" => "__builtin_mips_repl_qb",
+    "llvm.mips.sat.s.b" => "__builtin_msa_sat_s_b",
+    "llvm.mips.sat.s.d" => "__builtin_msa_sat_s_d",
+    "llvm.mips.sat.s.h" => "__builtin_msa_sat_s_h",
+    "llvm.mips.sat.s.w" => "__builtin_msa_sat_s_w",
+    "llvm.mips.sat.u.b" => "__builtin_msa_sat_u_b",
+    "llvm.mips.sat.u.d" => "__builtin_msa_sat_u_d",
+    "llvm.mips.sat.u.h" => "__builtin_msa_sat_u_h",
+    "llvm.mips.sat.u.w" => "__builtin_msa_sat_u_w",
+    "llvm.mips.shf.b" => "__builtin_msa_shf_b",
+    "llvm.mips.shf.h" => "__builtin_msa_shf_h",
+    "llvm.mips.shf.w" => "__builtin_msa_shf_w",
+    "llvm.mips.shilo" => "__builtin_mips_shilo",
+    "llvm.mips.shll.qb" => "__builtin_mips_shll_qb",
+    "llvm.mips.shra.qb" => "__builtin_mips_shra_qb",
+    "llvm.mips.shra.r.qb" => "__builtin_mips_shra_r_qb",
+    "llvm.mips.shrl.ph" => "__builtin_mips_shrl_ph",
+    "llvm.mips.shrl.qb" => "__builtin_mips_shrl_qb",
+    "llvm.mips.sld.b" => "__builtin_msa_sld_b",
+    "llvm.mips.sld.d" => "__builtin_msa_sld_d",
+    "llvm.mips.sld.h" => "__builtin_msa_sld_h",
+    "llvm.mips.sld.w" => "__builtin_msa_sld_w",
+    "llvm.mips.sldi.b" => "__builtin_msa_sldi_b",
+    "llvm.mips.sldi.d" => "__builtin_msa_sldi_d",
+    "llvm.mips.sldi.h" => "__builtin_msa_sldi_h",
+    "llvm.mips.sldi.w" => "__builtin_msa_sldi_w",
+    "llvm.mips.sll.b" => "__builtin_msa_sll_b",
+    "llvm.mips.sll.d" => "__builtin_msa_sll_d",
+    "llvm.mips.sll.h" => "__builtin_msa_sll_h",
+    "llvm.mips.sll.w" => "__builtin_msa_sll_w",
+    "llvm.mips.slli.b" => "__builtin_msa_slli_b",
+    "llvm.mips.slli.d" => "__builtin_msa_slli_d",
+    "llvm.mips.slli.h" => "__builtin_msa_slli_h",
+    "llvm.mips.slli.w" => "__builtin_msa_slli_w",
+    "llvm.mips.splat.b" => "__builtin_msa_splat_b",
+    "llvm.mips.splat.d" => "__builtin_msa_splat_d",
+    "llvm.mips.splat.h" => "__builtin_msa_splat_h",
+    "llvm.mips.splat.w" => "__builtin_msa_splat_w",
+    "llvm.mips.splati.b" => "__builtin_msa_splati_b",
+    "llvm.mips.splati.d" => "__builtin_msa_splati_d",
+    "llvm.mips.splati.h" => "__builtin_msa_splati_h",
+    "llvm.mips.splati.w" => "__builtin_msa_splati_w",
+    "llvm.mips.sra.b" => "__builtin_msa_sra_b",
+    "llvm.mips.sra.d" => "__builtin_msa_sra_d",
+    "llvm.mips.sra.h" => "__builtin_msa_sra_h",
+    "llvm.mips.sra.w" => "__builtin_msa_sra_w",
+    "llvm.mips.srai.b" => "__builtin_msa_srai_b",
+    "llvm.mips.srai.d" => "__builtin_msa_srai_d",
+    "llvm.mips.srai.h" => "__builtin_msa_srai_h",
+    "llvm.mips.srai.w" => "__builtin_msa_srai_w",
+    "llvm.mips.srar.b" => "__builtin_msa_srar_b",
+    "llvm.mips.srar.d" => "__builtin_msa_srar_d",
+    "llvm.mips.srar.h" => "__builtin_msa_srar_h",
+    "llvm.mips.srar.w" => "__builtin_msa_srar_w",
+    "llvm.mips.srari.b" => "__builtin_msa_srari_b",
+    "llvm.mips.srari.d" => "__builtin_msa_srari_d",
+    "llvm.mips.srari.h" => "__builtin_msa_srari_h",
+    "llvm.mips.srari.w" => "__builtin_msa_srari_w",
+    "llvm.mips.srl.b" => "__builtin_msa_srl_b",
+    "llvm.mips.srl.d" => "__builtin_msa_srl_d",
+    "llvm.mips.srl.h" => "__builtin_msa_srl_h",
+    "llvm.mips.srl.w" => "__builtin_msa_srl_w",
+    "llvm.mips.srli.b" => "__builtin_msa_srli_b",
+    "llvm.mips.srli.d" => "__builtin_msa_srli_d",
+    "llvm.mips.srli.h" => "__builtin_msa_srli_h",
+    "llvm.mips.srli.w" => "__builtin_msa_srli_w",
+    "llvm.mips.srlr.b" => "__builtin_msa_srlr_b",
+    "llvm.mips.srlr.d" => "__builtin_msa_srlr_d",
+    "llvm.mips.srlr.h" => "__builtin_msa_srlr_h",
+    "llvm.mips.srlr.w" => "__builtin_msa_srlr_w",
+    "llvm.mips.srlri.b" => "__builtin_msa_srlri_b",
+    "llvm.mips.srlri.d" => "__builtin_msa_srlri_d",
+    "llvm.mips.srlri.h" => "__builtin_msa_srlri_h",
+    "llvm.mips.srlri.w" => "__builtin_msa_srlri_w",
+    "llvm.mips.st.b" => "__builtin_msa_st_b",
+    "llvm.mips.st.d" => "__builtin_msa_st_d",
+    "llvm.mips.st.h" => "__builtin_msa_st_h",
+    "llvm.mips.st.w" => "__builtin_msa_st_w",
+    "llvm.mips.subs.s.b" => "__builtin_msa_subs_s_b",
+    "llvm.mips.subs.s.d" => "__builtin_msa_subs_s_d",
+    "llvm.mips.subs.s.h" => "__builtin_msa_subs_s_h",
+    "llvm.mips.subs.s.w" => "__builtin_msa_subs_s_w",
+    "llvm.mips.subs.u.b" => "__builtin_msa_subs_u_b",
+    "llvm.mips.subs.u.d" => "__builtin_msa_subs_u_d",
+    "llvm.mips.subs.u.h" => "__builtin_msa_subs_u_h",
+    "llvm.mips.subs.u.w" => "__builtin_msa_subs_u_w",
+    "llvm.mips.subsus.u.b" => "__builtin_msa_subsus_u_b",
+    "llvm.mips.subsus.u.d" => "__builtin_msa_subsus_u_d",
+    "llvm.mips.subsus.u.h" => "__builtin_msa_subsus_u_h",
+    "llvm.mips.subsus.u.w" => "__builtin_msa_subsus_u_w",
+    "llvm.mips.subsuu.s.b" => "__builtin_msa_subsuu_s_b",
+    "llvm.mips.subsuu.s.d" => "__builtin_msa_subsuu_s_d",
+    "llvm.mips.subsuu.s.h" => "__builtin_msa_subsuu_s_h",
+    "llvm.mips.subsuu.s.w" => "__builtin_msa_subsuu_s_w",
+    "llvm.mips.subu.ph" => "__builtin_mips_subu_ph",
+    "llvm.mips.subu.qb" => "__builtin_mips_subu_qb",
+    "llvm.mips.subu.s.ph" => "__builtin_mips_subu_s_ph",
+    "llvm.mips.subu.s.qb" => "__builtin_mips_subu_s_qb",
+    "llvm.mips.subuh.qb" => "__builtin_mips_subuh_qb",
+    "llvm.mips.subuh.r.qb" => "__builtin_mips_subuh_r_qb",
+    "llvm.mips.subv.b" => "__builtin_msa_subv_b",
+    "llvm.mips.subv.d" => "__builtin_msa_subv_d",
+    "llvm.mips.subv.h" => "__builtin_msa_subv_h",
+    "llvm.mips.subv.w" => "__builtin_msa_subv_w",
+    "llvm.mips.subvi.b" => "__builtin_msa_subvi_b",
+    "llvm.mips.subvi.d" => "__builtin_msa_subvi_d",
+    "llvm.mips.subvi.h" => "__builtin_msa_subvi_h",
+    "llvm.mips.subvi.w" => "__builtin_msa_subvi_w",
+    "llvm.mips.vshf.b" => "__builtin_msa_vshf_b",
+    "llvm.mips.vshf.d" => "__builtin_msa_vshf_d",
+    "llvm.mips.vshf.h" => "__builtin_msa_vshf_h",
+    "llvm.mips.vshf.w" => "__builtin_msa_vshf_w",
+    "llvm.mips.wrdsp" => "__builtin_mips_wrdsp",
+    "llvm.mips.xor.v" => "__builtin_msa_xor_v",
+    "llvm.mips.xori.b" => "__builtin_msa_xori_b",
     // nvvm
     "llvm.nvvm.abs.i" => "__nvvm_abs_i",
     "llvm.nvvm.abs.ll" => "__nvvm_abs_ll",
@@ -1519,25 +2034,161 @@ match name {
     "llvm.nvvm.ull2f.rn" => "__nvvm_ull2f_rn",
     "llvm.nvvm.ull2f.rp" => "__nvvm_ull2f_rp",
     "llvm.nvvm.ull2f.rz" => "__nvvm_ull2f_rz",
-    // arm
-    "llvm.arm.cdp" => "__builtin_arm_cdp",
-    "llvm.arm.cdp2" => "__builtin_arm_cdp2",
-    "llvm.arm.dmb" => "__builtin_arm_dmb",
-    "llvm.arm.dsb" => "__builtin_arm_dsb",
-    "llvm.arm.get.fpscr" => "__builtin_arm_get_fpscr",
-    "llvm.arm.isb" => "__builtin_arm_isb",
-    "llvm.arm.mcr" => "__builtin_arm_mcr",
-    "llvm.arm.mcr2" => "__builtin_arm_mcr2",
-    "llvm.arm.mcrr" => "__builtin_arm_mcrr",
-    "llvm.arm.mcrr2" => "__builtin_arm_mcrr2",
-    "llvm.arm.mrc" => "__builtin_arm_mrc",
-    "llvm.arm.mrc2" => "__builtin_arm_mrc2",
-    "llvm.arm.qadd" => "__builtin_arm_qadd",
-    "llvm.arm.qsub" => "__builtin_arm_qsub",
-    "llvm.arm.set.fpscr" => "__builtin_arm_set_fpscr",
-    "llvm.arm.ssat" => "__builtin_arm_ssat",
-    "llvm.arm.thread.pointer" => "__builtin_thread_pointer",
-    "llvm.arm.usat" => "__builtin_arm_usat",
+    // ppc
+    "llvm.ppc.altivec.dss" => "__builtin_altivec_dss",
+    "llvm.ppc.altivec.dssall" => "__builtin_altivec_dssall",
+    "llvm.ppc.altivec.dst" => "__builtin_altivec_dst",
+    "llvm.ppc.altivec.dstst" => "__builtin_altivec_dstst",
+    "llvm.ppc.altivec.dststt" => "__builtin_altivec_dststt",
+    "llvm.ppc.altivec.dstt" => "__builtin_altivec_dstt",
+    "llvm.ppc.altivec.mfvscr" => "__builtin_altivec_mfvscr",
+    "llvm.ppc.altivec.mtvscr" => "__builtin_altivec_mtvscr",
+    "llvm.ppc.altivec.vaddcuw" => "__builtin_altivec_vaddcuw",
+    "llvm.ppc.altivec.vaddsbs" => "__builtin_altivec_vaddsbs",
+    "llvm.ppc.altivec.vaddshs" => "__builtin_altivec_vaddshs",
+    "llvm.ppc.altivec.vaddsws" => "__builtin_altivec_vaddsws",
+    "llvm.ppc.altivec.vaddubs" => "__builtin_altivec_vaddubs",
+    "llvm.ppc.altivec.vadduhs" => "__builtin_altivec_vadduhs",
+    "llvm.ppc.altivec.vadduws" => "__builtin_altivec_vadduws",
+    "llvm.ppc.altivec.vavgsb" => "__builtin_altivec_vavgsb",
+    "llvm.ppc.altivec.vavgsh" => "__builtin_altivec_vavgsh",
+    "llvm.ppc.altivec.vavgsw" => "__builtin_altivec_vavgsw",
+    "llvm.ppc.altivec.vavgub" => "__builtin_altivec_vavgub",
+    "llvm.ppc.altivec.vavguh" => "__builtin_altivec_vavguh",
+    "llvm.ppc.altivec.vavguw" => "__builtin_altivec_vavguw",
+    "llvm.ppc.altivec.vcfsx" => "__builtin_altivec_vcfsx",
+    "llvm.ppc.altivec.vcfux" => "__builtin_altivec_vcfux",
+    "llvm.ppc.altivec.vcmpbfp" => "__builtin_altivec_vcmpbfp",
+    "llvm.ppc.altivec.vcmpbfp.p" => "__builtin_altivec_vcmpbfp_p",
+    "llvm.ppc.altivec.vcmpeqfp" => "__builtin_altivec_vcmpeqfp",
+    "llvm.ppc.altivec.vcmpeqfp.p" => "__builtin_altivec_vcmpeqfp_p",
+    "llvm.ppc.altivec.vcmpequb" => "__builtin_altivec_vcmpequb",
+    "llvm.ppc.altivec.vcmpequb.p" => "__builtin_altivec_vcmpequb_p",
+    "llvm.ppc.altivec.vcmpequh" => "__builtin_altivec_vcmpequh",
+    "llvm.ppc.altivec.vcmpequh.p" => "__builtin_altivec_vcmpequh_p",
+    "llvm.ppc.altivec.vcmpequw" => "__builtin_altivec_vcmpequw",
+    "llvm.ppc.altivec.vcmpequw.p" => "__builtin_altivec_vcmpequw_p",
+    "llvm.ppc.altivec.vcmpgefp" => "__builtin_altivec_vcmpgefp",
+    "llvm.ppc.altivec.vcmpgefp.p" => "__builtin_altivec_vcmpgefp_p",
+    "llvm.ppc.altivec.vcmpgtfp" => "__builtin_altivec_vcmpgtfp",
+    "llvm.ppc.altivec.vcmpgtfp.p" => "__builtin_altivec_vcmpgtfp_p",
+    "llvm.ppc.altivec.vcmpgtsb" => "__builtin_altivec_vcmpgtsb",
+    "llvm.ppc.altivec.vcmpgtsb.p" => "__builtin_altivec_vcmpgtsb_p",
+    "llvm.ppc.altivec.vcmpgtsh" => "__builtin_altivec_vcmpgtsh",
+    "llvm.ppc.altivec.vcmpgtsh.p" => "__builtin_altivec_vcmpgtsh_p",
+    "llvm.ppc.altivec.vcmpgtsw" => "__builtin_altivec_vcmpgtsw",
+    "llvm.ppc.altivec.vcmpgtsw.p" => "__builtin_altivec_vcmpgtsw_p",
+    "llvm.ppc.altivec.vcmpgtub" => "__builtin_altivec_vcmpgtub",
+    "llvm.ppc.altivec.vcmpgtub.p" => "__builtin_altivec_vcmpgtub_p",
+    "llvm.ppc.altivec.vcmpgtuh" => "__builtin_altivec_vcmpgtuh",
+    "llvm.ppc.altivec.vcmpgtuh.p" => "__builtin_altivec_vcmpgtuh_p",
+    "llvm.ppc.altivec.vcmpgtuw" => "__builtin_altivec_vcmpgtuw",
+    "llvm.ppc.altivec.vcmpgtuw.p" => "__builtin_altivec_vcmpgtuw_p",
+    "llvm.ppc.altivec.vctsxs" => "__builtin_altivec_vctsxs",
+    "llvm.ppc.altivec.vctuxs" => "__builtin_altivec_vctuxs",
+    "llvm.ppc.altivec.vexptefp" => "__builtin_altivec_vexptefp",
+    "llvm.ppc.altivec.vlogefp" => "__builtin_altivec_vlogefp",
+    "llvm.ppc.altivec.vmaddfp" => "__builtin_altivec_vmaddfp",
+    "llvm.ppc.altivec.vmaxfp" => "__builtin_altivec_vmaxfp",
+    "llvm.ppc.altivec.vmaxsb" => "__builtin_altivec_vmaxsb",
+    "llvm.ppc.altivec.vmaxsh" => "__builtin_altivec_vmaxsh",
+    "llvm.ppc.altivec.vmaxsw" => "__builtin_altivec_vmaxsw",
+    "llvm.ppc.altivec.vmaxub" => "__builtin_altivec_vmaxub",
+    "llvm.ppc.altivec.vmaxuh" => "__builtin_altivec_vmaxuh",
+    "llvm.ppc.altivec.vmaxuw" => "__builtin_altivec_vmaxuw",
+    "llvm.ppc.altivec.vmhaddshs" => "__builtin_altivec_vmhaddshs",
+    "llvm.ppc.altivec.vmhraddshs" => "__builtin_altivec_vmhraddshs",
+    "llvm.ppc.altivec.vminfp" => "__builtin_altivec_vminfp",
+    "llvm.ppc.altivec.vminsb" => "__builtin_altivec_vminsb",
+    "llvm.ppc.altivec.vminsh" => "__builtin_altivec_vminsh",
+    "llvm.ppc.altivec.vminsw" => "__builtin_altivec_vminsw",
+    "llvm.ppc.altivec.vminub" => "__builtin_altivec_vminub",
+    "llvm.ppc.altivec.vminuh" => "__builtin_altivec_vminuh",
+    "llvm.ppc.altivec.vminuw" => "__builtin_altivec_vminuw",
+    "llvm.ppc.altivec.vmladduhm" => "__builtin_altivec_vmladduhm",
+    "llvm.ppc.altivec.vmsummbm" => "__builtin_altivec_vmsummbm",
+    "llvm.ppc.altivec.vmsumshm" => "__builtin_altivec_vmsumshm",
+    "llvm.ppc.altivec.vmsumshs" => "__builtin_altivec_vmsumshs",
+    "llvm.ppc.altivec.vmsumubm" => "__builtin_altivec_vmsumubm",
+    "llvm.ppc.altivec.vmsumuhm" => "__builtin_altivec_vmsumuhm",
+    "llvm.ppc.altivec.vmsumuhs" => "__builtin_altivec_vmsumuhs",
+    "llvm.ppc.altivec.vmulesb" => "__builtin_altivec_vmulesb",
+    "llvm.ppc.altivec.vmulesh" => "__builtin_altivec_vmulesh",
+    "llvm.ppc.altivec.vmuleub" => "__builtin_altivec_vmuleub",
+    "llvm.ppc.altivec.vmuleuh" => "__builtin_altivec_vmuleuh",
+    "llvm.ppc.altivec.vmulosb" => "__builtin_altivec_vmulosb",
+    "llvm.ppc.altivec.vmulosh" => "__builtin_altivec_vmulosh",
+    "llvm.ppc.altivec.vmuloub" => "__builtin_altivec_vmuloub",
+    "llvm.ppc.altivec.vmulouh" => "__builtin_altivec_vmulouh",
+    "llvm.ppc.altivec.vnmsubfp" => "__builtin_altivec_vnmsubfp",
+    "llvm.ppc.altivec.vperm" => "__builtin_altivec_vperm_4si",
+    "llvm.ppc.altivec.vpkpx" => "__builtin_altivec_vpkpx",
+    "llvm.ppc.altivec.vpkshss" => "__builtin_altivec_vpkshss",
+    "llvm.ppc.altivec.vpkshus" => "__builtin_altivec_vpkshus",
+    "llvm.ppc.altivec.vpkswss" => "__builtin_altivec_vpkswss",
+    "llvm.ppc.altivec.vpkswus" => "__builtin_altivec_vpkswus",
+    "llvm.ppc.altivec.vpkuhus" => "__builtin_altivec_vpkuhus",
+    "llvm.ppc.altivec.vpkuwus" => "__builtin_altivec_vpkuwus",
+    "llvm.ppc.altivec.vrefp" => "__builtin_altivec_vrefp",
+    "llvm.ppc.altivec.vrfim" => "__builtin_altivec_vrfim",
+    "llvm.ppc.altivec.vrfin" => "__builtin_altivec_vrfin",
+    "llvm.ppc.altivec.vrfip" => "__builtin_altivec_vrfip",
+    "llvm.ppc.altivec.vrfiz" => "__builtin_altivec_vrfiz",
+    "llvm.ppc.altivec.vrlb" => "__builtin_altivec_vrlb",
+    "llvm.ppc.altivec.vrlh" => "__builtin_altivec_vrlh",
+    "llvm.ppc.altivec.vrlw" => "__builtin_altivec_vrlw",
+    "llvm.ppc.altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
+    "llvm.ppc.altivec.vsel" => "__builtin_altivec_vsel_4si",
+    "llvm.ppc.altivec.vsl" => "__builtin_altivec_vsl",
+    "llvm.ppc.altivec.vslb" => "__builtin_altivec_vslb",
+    "llvm.ppc.altivec.vslh" => "__builtin_altivec_vslh",
+    "llvm.ppc.altivec.vslo" => "__builtin_altivec_vslo",
+    "llvm.ppc.altivec.vslw" => "__builtin_altivec_vslw",
+    "llvm.ppc.altivec.vsr" => "__builtin_altivec_vsr",
+    "llvm.ppc.altivec.vsrab" => "__builtin_altivec_vsrab",
+    "llvm.ppc.altivec.vsrah" => "__builtin_altivec_vsrah",
+    "llvm.ppc.altivec.vsraw" => "__builtin_altivec_vsraw",
+    "llvm.ppc.altivec.vsrb" => "__builtin_altivec_vsrb",
+    "llvm.ppc.altivec.vsrh" => "__builtin_altivec_vsrh",
+    "llvm.ppc.altivec.vsro" => "__builtin_altivec_vsro",
+    "llvm.ppc.altivec.vsrw" => "__builtin_altivec_vsrw",
+    "llvm.ppc.altivec.vsubcuw" => "__builtin_altivec_vsubcuw",
+    "llvm.ppc.altivec.vsubsbs" => "__builtin_altivec_vsubsbs",
+    "llvm.ppc.altivec.vsubshs" => "__builtin_altivec_vsubshs",
+    "llvm.ppc.altivec.vsubsws" => "__builtin_altivec_vsubsws",
+    "llvm.ppc.altivec.vsububs" => "__builtin_altivec_vsububs",
+    "llvm.ppc.altivec.vsubuhs" => "__builtin_altivec_vsubuhs",
+    "llvm.ppc.altivec.vsubuws" => "__builtin_altivec_vsubuws",
+    "llvm.ppc.altivec.vsum2sws" => "__builtin_altivec_vsum2sws",
+    "llvm.ppc.altivec.vsum4sbs" => "__builtin_altivec_vsum4sbs",
+    "llvm.ppc.altivec.vsum4shs" => "__builtin_altivec_vsum4shs",
+    "llvm.ppc.altivec.vsum4ubs" => "__builtin_altivec_vsum4ubs",
+    "llvm.ppc.altivec.vsumsws" => "__builtin_altivec_vsumsws",
+    "llvm.ppc.altivec.vupkhpx" => "__builtin_altivec_vupkhpx",
+    "llvm.ppc.altivec.vupkhsb" => "__builtin_altivec_vupkhsb",
+    "llvm.ppc.altivec.vupkhsh" => "__builtin_altivec_vupkhsh",
+    "llvm.ppc.altivec.vupklpx" => "__builtin_altivec_vupklpx",
+    "llvm.ppc.altivec.vupklsb" => "__builtin_altivec_vupklsb",
+    "llvm.ppc.altivec.vupklsh" => "__builtin_altivec_vupklsh",
+    // ptx
+    "llvm.ptx.bar.sync" => "__builtin_ptx_bar_sync",
+    "llvm.ptx.read.clock" => "__builtin_ptx_read_clock",
+    "llvm.ptx.read.clock64" => "__builtin_ptx_read_clock64",
+    "llvm.ptx.read.gridid" => "__builtin_ptx_read_gridid",
+    "llvm.ptx.read.laneid" => "__builtin_ptx_read_laneid",
+    "llvm.ptx.read.lanemask.eq" => "__builtin_ptx_read_lanemask_eq",
+    "llvm.ptx.read.lanemask.ge" => "__builtin_ptx_read_lanemask_ge",
+    "llvm.ptx.read.lanemask.gt" => "__builtin_ptx_read_lanemask_gt",
+    "llvm.ptx.read.lanemask.le" => "__builtin_ptx_read_lanemask_le",
+    "llvm.ptx.read.lanemask.lt" => "__builtin_ptx_read_lanemask_lt",
+    "llvm.ptx.read.nsmid" => "__builtin_ptx_read_nsmid",
+    "llvm.ptx.read.nwarpid" => "__builtin_ptx_read_nwarpid",
+    "llvm.ptx.read.pm0" => "__builtin_ptx_read_pm0",
+    "llvm.ptx.read.pm1" => "__builtin_ptx_read_pm1",
+    "llvm.ptx.read.pm2" => "__builtin_ptx_read_pm2",
+    "llvm.ptx.read.pm3" => "__builtin_ptx_read_pm3",
+    "llvm.ptx.read.smid" => "__builtin_ptx_read_smid",
+    "llvm.ptx.read.warpid" => "__builtin_ptx_read_warpid",
     // x86
     "llvm.x86.addcarry.u32" => "__builtin_ia32_addcarry_u32",
     "llvm.x86.addcarry.u64" => "__builtin_ia32_addcarry_u64",
@@ -2305,661 +2956,10 @@ match name {
     "llvm.x86.xop.vpshlq" => "__builtin_ia32_vpshlq",
     "llvm.x86.xop.vpshlw" => "__builtin_ia32_vpshlw",
     "llvm.x86.xtest" => "__builtin_ia32_xtest",
-    // AMDGPU
-    "llvm.AMDGPU.div.fixup.f32" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.f64" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.v2f64" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.v4f32" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fmas.f32" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.f64" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.v2f64" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.v4f32" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.ldexp.f32" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.f64" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.v2f64" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.v4f32" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.rcp.f32" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.f64" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.v2f64" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.v4f32" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rsq.clamped.f32" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.f64" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.v2f64" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.v4f32" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.f32" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.f64" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.v2f64" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.v4f32" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.trig.preop.f32" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.f64" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
-    // mips
-    "llvm.mips.add.a.b" => "__builtin_msa_add_a_b",
-    "llvm.mips.add.a.d" => "__builtin_msa_add_a_d",
-    "llvm.mips.add.a.h" => "__builtin_msa_add_a_h",
-    "llvm.mips.add.a.w" => "__builtin_msa_add_a_w",
-    "llvm.mips.adds.a.b" => "__builtin_msa_adds_a_b",
-    "llvm.mips.adds.a.d" => "__builtin_msa_adds_a_d",
-    "llvm.mips.adds.a.h" => "__builtin_msa_adds_a_h",
-    "llvm.mips.adds.a.w" => "__builtin_msa_adds_a_w",
-    "llvm.mips.adds.s.b" => "__builtin_msa_adds_s_b",
-    "llvm.mips.adds.s.d" => "__builtin_msa_adds_s_d",
-    "llvm.mips.adds.s.h" => "__builtin_msa_adds_s_h",
-    "llvm.mips.adds.s.w" => "__builtin_msa_adds_s_w",
-    "llvm.mips.adds.u.b" => "__builtin_msa_adds_u_b",
-    "llvm.mips.adds.u.d" => "__builtin_msa_adds_u_d",
-    "llvm.mips.adds.u.h" => "__builtin_msa_adds_u_h",
-    "llvm.mips.adds.u.w" => "__builtin_msa_adds_u_w",
-    "llvm.mips.addsc" => "__builtin_mips_addsc",
-    "llvm.mips.addu.ph" => "__builtin_mips_addu_ph",
-    "llvm.mips.addu.qb" => "__builtin_mips_addu_qb",
-    "llvm.mips.addu.s.ph" => "__builtin_mips_addu_s_ph",
-    "llvm.mips.addu.s.qb" => "__builtin_mips_addu_s_qb",
-    "llvm.mips.adduh.qb" => "__builtin_mips_adduh_qb",
-    "llvm.mips.adduh.r.qb" => "__builtin_mips_adduh_r_qb",
-    "llvm.mips.addv.b" => "__builtin_msa_addv_b",
-    "llvm.mips.addv.d" => "__builtin_msa_addv_d",
-    "llvm.mips.addv.h" => "__builtin_msa_addv_h",
-    "llvm.mips.addv.w" => "__builtin_msa_addv_w",
-    "llvm.mips.addvi.b" => "__builtin_msa_addvi_b",
-    "llvm.mips.addvi.d" => "__builtin_msa_addvi_d",
-    "llvm.mips.addvi.h" => "__builtin_msa_addvi_h",
-    "llvm.mips.addvi.w" => "__builtin_msa_addvi_w",
-    "llvm.mips.addwc" => "__builtin_mips_addwc",
-    "llvm.mips.and.v" => "__builtin_msa_and_v",
-    "llvm.mips.andi.b" => "__builtin_msa_andi_b",
-    "llvm.mips.append" => "__builtin_mips_append",
-    "llvm.mips.asub.s.b" => "__builtin_msa_asub_s_b",
-    "llvm.mips.asub.s.d" => "__builtin_msa_asub_s_d",
-    "llvm.mips.asub.s.h" => "__builtin_msa_asub_s_h",
-    "llvm.mips.asub.s.w" => "__builtin_msa_asub_s_w",
-    "llvm.mips.asub.u.b" => "__builtin_msa_asub_u_b",
-    "llvm.mips.asub.u.d" => "__builtin_msa_asub_u_d",
-    "llvm.mips.asub.u.h" => "__builtin_msa_asub_u_h",
-    "llvm.mips.asub.u.w" => "__builtin_msa_asub_u_w",
-    "llvm.mips.ave.s.b" => "__builtin_msa_ave_s_b",
-    "llvm.mips.ave.s.d" => "__builtin_msa_ave_s_d",
-    "llvm.mips.ave.s.h" => "__builtin_msa_ave_s_h",
-    "llvm.mips.ave.s.w" => "__builtin_msa_ave_s_w",
-    "llvm.mips.ave.u.b" => "__builtin_msa_ave_u_b",
-    "llvm.mips.ave.u.d" => "__builtin_msa_ave_u_d",
-    "llvm.mips.ave.u.h" => "__builtin_msa_ave_u_h",
-    "llvm.mips.ave.u.w" => "__builtin_msa_ave_u_w",
-    "llvm.mips.aver.s.b" => "__builtin_msa_aver_s_b",
-    "llvm.mips.aver.s.d" => "__builtin_msa_aver_s_d",
-    "llvm.mips.aver.s.h" => "__builtin_msa_aver_s_h",
-    "llvm.mips.aver.s.w" => "__builtin_msa_aver_s_w",
-    "llvm.mips.aver.u.b" => "__builtin_msa_aver_u_b",
-    "llvm.mips.aver.u.d" => "__builtin_msa_aver_u_d",
-    "llvm.mips.aver.u.h" => "__builtin_msa_aver_u_h",
-    "llvm.mips.aver.u.w" => "__builtin_msa_aver_u_w",
-    "llvm.mips.balign" => "__builtin_mips_balign",
-    "llvm.mips.bclr.b" => "__builtin_msa_bclr_b",
-    "llvm.mips.bclr.d" => "__builtin_msa_bclr_d",
-    "llvm.mips.bclr.h" => "__builtin_msa_bclr_h",
-    "llvm.mips.bclr.w" => "__builtin_msa_bclr_w",
-    "llvm.mips.bclri.b" => "__builtin_msa_bclri_b",
-    "llvm.mips.bclri.d" => "__builtin_msa_bclri_d",
-    "llvm.mips.bclri.h" => "__builtin_msa_bclri_h",
-    "llvm.mips.bclri.w" => "__builtin_msa_bclri_w",
-    "llvm.mips.binsl.b" => "__builtin_msa_binsl_b",
-    "llvm.mips.binsl.d" => "__builtin_msa_binsl_d",
-    "llvm.mips.binsl.h" => "__builtin_msa_binsl_h",
-    "llvm.mips.binsl.w" => "__builtin_msa_binsl_w",
-    "llvm.mips.binsli.b" => "__builtin_msa_binsli_b",
-    "llvm.mips.binsli.d" => "__builtin_msa_binsli_d",
-    "llvm.mips.binsli.h" => "__builtin_msa_binsli_h",
-    "llvm.mips.binsli.w" => "__builtin_msa_binsli_w",
-    "llvm.mips.binsr.b" => "__builtin_msa_binsr_b",
-    "llvm.mips.binsr.d" => "__builtin_msa_binsr_d",
-    "llvm.mips.binsr.h" => "__builtin_msa_binsr_h",
-    "llvm.mips.binsr.w" => "__builtin_msa_binsr_w",
-    "llvm.mips.binsri.b" => "__builtin_msa_binsri_b",
-    "llvm.mips.binsri.d" => "__builtin_msa_binsri_d",
-    "llvm.mips.binsri.h" => "__builtin_msa_binsri_h",
-    "llvm.mips.binsri.w" => "__builtin_msa_binsri_w",
-    "llvm.mips.bitrev" => "__builtin_mips_bitrev",
-    "llvm.mips.bmnz.v" => "__builtin_msa_bmnz_v",
-    "llvm.mips.bmnzi.b" => "__builtin_msa_bmnzi_b",
-    "llvm.mips.bmz.v" => "__builtin_msa_bmz_v",
-    "llvm.mips.bmzi.b" => "__builtin_msa_bmzi_b",
-    "llvm.mips.bneg.b" => "__builtin_msa_bneg_b",
-    "llvm.mips.bneg.d" => "__builtin_msa_bneg_d",
-    "llvm.mips.bneg.h" => "__builtin_msa_bneg_h",
-    "llvm.mips.bneg.w" => "__builtin_msa_bneg_w",
-    "llvm.mips.bnegi.b" => "__builtin_msa_bnegi_b",
-    "llvm.mips.bnegi.d" => "__builtin_msa_bnegi_d",
-    "llvm.mips.bnegi.h" => "__builtin_msa_bnegi_h",
-    "llvm.mips.bnegi.w" => "__builtin_msa_bnegi_w",
-    "llvm.mips.bnz.b" => "__builtin_msa_bnz_b",
-    "llvm.mips.bnz.d" => "__builtin_msa_bnz_d",
-    "llvm.mips.bnz.h" => "__builtin_msa_bnz_h",
-    "llvm.mips.bnz.v" => "__builtin_msa_bnz_v",
-    "llvm.mips.bnz.w" => "__builtin_msa_bnz_w",
-    "llvm.mips.bposge32" => "__builtin_mips_bposge32",
-    "llvm.mips.bsel.v" => "__builtin_msa_bsel_v",
-    "llvm.mips.bseli.b" => "__builtin_msa_bseli_b",
-    "llvm.mips.bset.b" => "__builtin_msa_bset_b",
-    "llvm.mips.bset.d" => "__builtin_msa_bset_d",
-    "llvm.mips.bset.h" => "__builtin_msa_bset_h",
-    "llvm.mips.bset.w" => "__builtin_msa_bset_w",
-    "llvm.mips.bseti.b" => "__builtin_msa_bseti_b",
-    "llvm.mips.bseti.d" => "__builtin_msa_bseti_d",
-    "llvm.mips.bseti.h" => "__builtin_msa_bseti_h",
-    "llvm.mips.bseti.w" => "__builtin_msa_bseti_w",
-    "llvm.mips.bz.b" => "__builtin_msa_bz_b",
-    "llvm.mips.bz.d" => "__builtin_msa_bz_d",
-    "llvm.mips.bz.h" => "__builtin_msa_bz_h",
-    "llvm.mips.bz.v" => "__builtin_msa_bz_v",
-    "llvm.mips.bz.w" => "__builtin_msa_bz_w",
-    "llvm.mips.ceq.b" => "__builtin_msa_ceq_b",
-    "llvm.mips.ceq.d" => "__builtin_msa_ceq_d",
-    "llvm.mips.ceq.h" => "__builtin_msa_ceq_h",
-    "llvm.mips.ceq.w" => "__builtin_msa_ceq_w",
-    "llvm.mips.ceqi.b" => "__builtin_msa_ceqi_b",
-    "llvm.mips.ceqi.d" => "__builtin_msa_ceqi_d",
-    "llvm.mips.ceqi.h" => "__builtin_msa_ceqi_h",
-    "llvm.mips.ceqi.w" => "__builtin_msa_ceqi_w",
-    "llvm.mips.cfcmsa" => "__builtin_msa_cfcmsa",
-    "llvm.mips.cle.s.b" => "__builtin_msa_cle_s_b",
-    "llvm.mips.cle.s.d" => "__builtin_msa_cle_s_d",
-    "llvm.mips.cle.s.h" => "__builtin_msa_cle_s_h",
-    "llvm.mips.cle.s.w" => "__builtin_msa_cle_s_w",
-    "llvm.mips.cle.u.b" => "__builtin_msa_cle_u_b",
-    "llvm.mips.cle.u.d" => "__builtin_msa_cle_u_d",
-    "llvm.mips.cle.u.h" => "__builtin_msa_cle_u_h",
-    "llvm.mips.cle.u.w" => "__builtin_msa_cle_u_w",
-    "llvm.mips.clei.s.b" => "__builtin_msa_clei_s_b",
-    "llvm.mips.clei.s.d" => "__builtin_msa_clei_s_d",
-    "llvm.mips.clei.s.h" => "__builtin_msa_clei_s_h",
-    "llvm.mips.clei.s.w" => "__builtin_msa_clei_s_w",
-    "llvm.mips.clei.u.b" => "__builtin_msa_clei_u_b",
-    "llvm.mips.clei.u.d" => "__builtin_msa_clei_u_d",
-    "llvm.mips.clei.u.h" => "__builtin_msa_clei_u_h",
-    "llvm.mips.clei.u.w" => "__builtin_msa_clei_u_w",
-    "llvm.mips.clt.s.b" => "__builtin_msa_clt_s_b",
-    "llvm.mips.clt.s.d" => "__builtin_msa_clt_s_d",
-    "llvm.mips.clt.s.h" => "__builtin_msa_clt_s_h",
-    "llvm.mips.clt.s.w" => "__builtin_msa_clt_s_w",
-    "llvm.mips.clt.u.b" => "__builtin_msa_clt_u_b",
-    "llvm.mips.clt.u.d" => "__builtin_msa_clt_u_d",
-    "llvm.mips.clt.u.h" => "__builtin_msa_clt_u_h",
-    "llvm.mips.clt.u.w" => "__builtin_msa_clt_u_w",
-    "llvm.mips.clti.s.b" => "__builtin_msa_clti_s_b",
-    "llvm.mips.clti.s.d" => "__builtin_msa_clti_s_d",
-    "llvm.mips.clti.s.h" => "__builtin_msa_clti_s_h",
-    "llvm.mips.clti.s.w" => "__builtin_msa_clti_s_w",
-    "llvm.mips.clti.u.b" => "__builtin_msa_clti_u_b",
-    "llvm.mips.clti.u.d" => "__builtin_msa_clti_u_d",
-    "llvm.mips.clti.u.h" => "__builtin_msa_clti_u_h",
-    "llvm.mips.clti.u.w" => "__builtin_msa_clti_u_w",
-    "llvm.mips.cmpgdu.eq.qb" => "__builtin_mips_cmpgdu_eq_qb",
-    "llvm.mips.cmpgdu.le.qb" => "__builtin_mips_cmpgdu_le_qb",
-    "llvm.mips.cmpgdu.lt.qb" => "__builtin_mips_cmpgdu_lt_qb",
-    "llvm.mips.cmpgu.eq.qb" => "__builtin_mips_cmpgu_eq_qb",
-    "llvm.mips.cmpgu.le.qb" => "__builtin_mips_cmpgu_le_qb",
-    "llvm.mips.cmpgu.lt.qb" => "__builtin_mips_cmpgu_lt_qb",
-    "llvm.mips.cmpu.eq.qb" => "__builtin_mips_cmpu_eq_qb",
-    "llvm.mips.cmpu.le.qb" => "__builtin_mips_cmpu_le_qb",
-    "llvm.mips.cmpu.lt.qb" => "__builtin_mips_cmpu_lt_qb",
-    "llvm.mips.copy.s.b" => "__builtin_msa_copy_s_b",
-    "llvm.mips.copy.s.d" => "__builtin_msa_copy_s_d",
-    "llvm.mips.copy.s.h" => "__builtin_msa_copy_s_h",
-    "llvm.mips.copy.s.w" => "__builtin_msa_copy_s_w",
-    "llvm.mips.copy.u.b" => "__builtin_msa_copy_u_b",
-    "llvm.mips.copy.u.d" => "__builtin_msa_copy_u_d",
-    "llvm.mips.copy.u.h" => "__builtin_msa_copy_u_h",
-    "llvm.mips.copy.u.w" => "__builtin_msa_copy_u_w",
-    "llvm.mips.ctcmsa" => "__builtin_msa_ctcmsa",
-    "llvm.mips.div.s.b" => "__builtin_msa_div_s_b",
-    "llvm.mips.div.s.d" => "__builtin_msa_div_s_d",
-    "llvm.mips.div.s.h" => "__builtin_msa_div_s_h",
-    "llvm.mips.div.s.w" => "__builtin_msa_div_s_w",
-    "llvm.mips.div.u.b" => "__builtin_msa_div_u_b",
-    "llvm.mips.div.u.d" => "__builtin_msa_div_u_d",
-    "llvm.mips.div.u.h" => "__builtin_msa_div_u_h",
-    "llvm.mips.div.u.w" => "__builtin_msa_div_u_w",
-    "llvm.mips.dlsa" => "__builtin_mips_dlsa",
-    "llvm.mips.dotp.s.d" => "__builtin_msa_dotp_s_d",
-    "llvm.mips.dotp.s.h" => "__builtin_msa_dotp_s_h",
-    "llvm.mips.dotp.s.w" => "__builtin_msa_dotp_s_w",
-    "llvm.mips.dotp.u.d" => "__builtin_msa_dotp_u_d",
-    "llvm.mips.dotp.u.h" => "__builtin_msa_dotp_u_h",
-    "llvm.mips.dotp.u.w" => "__builtin_msa_dotp_u_w",
-    "llvm.mips.dpa.w.ph" => "__builtin_mips_dpa_w_ph",
-    "llvm.mips.dpadd.s.d" => "__builtin_msa_dpadd_s_d",
-    "llvm.mips.dpadd.s.h" => "__builtin_msa_dpadd_s_h",
-    "llvm.mips.dpadd.s.w" => "__builtin_msa_dpadd_s_w",
-    "llvm.mips.dpadd.u.d" => "__builtin_msa_dpadd_u_d",
-    "llvm.mips.dpadd.u.h" => "__builtin_msa_dpadd_u_h",
-    "llvm.mips.dpadd.u.w" => "__builtin_msa_dpadd_u_w",
-    "llvm.mips.dpau.h.qbl" => "__builtin_mips_dpau_h_qbl",
-    "llvm.mips.dpau.h.qbr" => "__builtin_mips_dpau_h_qbr",
-    "llvm.mips.dpax.w.ph" => "__builtin_mips_dpax_w_ph",
-    "llvm.mips.dps.w.ph" => "__builtin_mips_dps_w_ph",
-    "llvm.mips.dpsu.h.qbl" => "__builtin_mips_dpsu_h_qbl",
-    "llvm.mips.dpsu.h.qbr" => "__builtin_mips_dpsu_h_qbr",
-    "llvm.mips.dpsub.s.d" => "__builtin_msa_dpsub_s_d",
-    "llvm.mips.dpsub.s.h" => "__builtin_msa_dpsub_s_h",
-    "llvm.mips.dpsub.s.w" => "__builtin_msa_dpsub_s_w",
-    "llvm.mips.dpsub.u.d" => "__builtin_msa_dpsub_u_d",
-    "llvm.mips.dpsub.u.h" => "__builtin_msa_dpsub_u_h",
-    "llvm.mips.dpsub.u.w" => "__builtin_msa_dpsub_u_w",
-    "llvm.mips.dpsx.w.ph" => "__builtin_mips_dpsx_w_ph",
-    "llvm.mips.extp" => "__builtin_mips_extp",
-    "llvm.mips.extpdp" => "__builtin_mips_extpdp",
-    "llvm.mips.extr.r.w" => "__builtin_mips_extr_r_w",
-    "llvm.mips.extr.rs.w" => "__builtin_mips_extr_rs_w",
-    "llvm.mips.extr.s.h" => "__builtin_mips_extr_s_h",
-    "llvm.mips.extr.w" => "__builtin_mips_extr_w",
-    "llvm.mips.fadd.d" => "__builtin_msa_fadd_d",
-    "llvm.mips.fadd.w" => "__builtin_msa_fadd_w",
-    "llvm.mips.fcaf.d" => "__builtin_msa_fcaf_d",
-    "llvm.mips.fcaf.w" => "__builtin_msa_fcaf_w",
-    "llvm.mips.fceq.d" => "__builtin_msa_fceq_d",
-    "llvm.mips.fceq.w" => "__builtin_msa_fceq_w",
-    "llvm.mips.fclass.d" => "__builtin_msa_fclass_d",
-    "llvm.mips.fclass.w" => "__builtin_msa_fclass_w",
-    "llvm.mips.fcle.d" => "__builtin_msa_fcle_d",
-    "llvm.mips.fcle.w" => "__builtin_msa_fcle_w",
-    "llvm.mips.fclt.d" => "__builtin_msa_fclt_d",
-    "llvm.mips.fclt.w" => "__builtin_msa_fclt_w",
-    "llvm.mips.fcne.d" => "__builtin_msa_fcne_d",
-    "llvm.mips.fcne.w" => "__builtin_msa_fcne_w",
-    "llvm.mips.fcor.d" => "__builtin_msa_fcor_d",
-    "llvm.mips.fcor.w" => "__builtin_msa_fcor_w",
-    "llvm.mips.fcueq.d" => "__builtin_msa_fcueq_d",
-    "llvm.mips.fcueq.w" => "__builtin_msa_fcueq_w",
-    "llvm.mips.fcule.d" => "__builtin_msa_fcule_d",
-    "llvm.mips.fcule.w" => "__builtin_msa_fcule_w",
-    "llvm.mips.fcult.d" => "__builtin_msa_fcult_d",
-    "llvm.mips.fcult.w" => "__builtin_msa_fcult_w",
-    "llvm.mips.fcun.d" => "__builtin_msa_fcun_d",
-    "llvm.mips.fcun.w" => "__builtin_msa_fcun_w",
-    "llvm.mips.fcune.d" => "__builtin_msa_fcune_d",
-    "llvm.mips.fcune.w" => "__builtin_msa_fcune_w",
-    "llvm.mips.fdiv.d" => "__builtin_msa_fdiv_d",
-    "llvm.mips.fdiv.w" => "__builtin_msa_fdiv_w",
-    "llvm.mips.fexdo.w" => "__builtin_msa_fexdo_w",
-    "llvm.mips.fexp2.d" => "__builtin_msa_fexp2_d",
-    "llvm.mips.fexp2.w" => "__builtin_msa_fexp2_w",
-    "llvm.mips.fexupl.d" => "__builtin_msa_fexupl_d",
-    "llvm.mips.fexupr.d" => "__builtin_msa_fexupr_d",
-    "llvm.mips.ffint.s.d" => "__builtin_msa_ffint_s_d",
-    "llvm.mips.ffint.s.w" => "__builtin_msa_ffint_s_w",
-    "llvm.mips.ffint.u.d" => "__builtin_msa_ffint_u_d",
-    "llvm.mips.ffint.u.w" => "__builtin_msa_ffint_u_w",
-    "llvm.mips.ffql.d" => "__builtin_msa_ffql_d",
-    "llvm.mips.ffql.w" => "__builtin_msa_ffql_w",
-    "llvm.mips.ffqr.d" => "__builtin_msa_ffqr_d",
-    "llvm.mips.ffqr.w" => "__builtin_msa_ffqr_w",
-    "llvm.mips.fill.b" => "__builtin_msa_fill_b",
-    "llvm.mips.fill.d" => "__builtin_msa_fill_d",
-    "llvm.mips.fill.h" => "__builtin_msa_fill_h",
-    "llvm.mips.fill.w" => "__builtin_msa_fill_w",
-    "llvm.mips.flog2.d" => "__builtin_msa_flog2_d",
-    "llvm.mips.flog2.w" => "__builtin_msa_flog2_w",
-    "llvm.mips.fmadd.d" => "__builtin_msa_fmadd_d",
-    "llvm.mips.fmadd.w" => "__builtin_msa_fmadd_w",
-    "llvm.mips.fmax.a.d" => "__builtin_msa_fmax_a_d",
-    "llvm.mips.fmax.a.w" => "__builtin_msa_fmax_a_w",
-    "llvm.mips.fmax.d" => "__builtin_msa_fmax_d",
-    "llvm.mips.fmax.w" => "__builtin_msa_fmax_w",
-    "llvm.mips.fmin.a.d" => "__builtin_msa_fmin_a_d",
-    "llvm.mips.fmin.a.w" => "__builtin_msa_fmin_a_w",
-    "llvm.mips.fmin.d" => "__builtin_msa_fmin_d",
-    "llvm.mips.fmin.w" => "__builtin_msa_fmin_w",
-    "llvm.mips.fmsub.d" => "__builtin_msa_fmsub_d",
-    "llvm.mips.fmsub.w" => "__builtin_msa_fmsub_w",
-    "llvm.mips.fmul.d" => "__builtin_msa_fmul_d",
-    "llvm.mips.fmul.w" => "__builtin_msa_fmul_w",
-    "llvm.mips.frcp.d" => "__builtin_msa_frcp_d",
-    "llvm.mips.frcp.w" => "__builtin_msa_frcp_w",
-    "llvm.mips.frint.d" => "__builtin_msa_frint_d",
-    "llvm.mips.frint.w" => "__builtin_msa_frint_w",
-    "llvm.mips.frsqrt.d" => "__builtin_msa_frsqrt_d",
-    "llvm.mips.frsqrt.w" => "__builtin_msa_frsqrt_w",
-    "llvm.mips.fsaf.d" => "__builtin_msa_fsaf_d",
-    "llvm.mips.fsaf.w" => "__builtin_msa_fsaf_w",
-    "llvm.mips.fseq.d" => "__builtin_msa_fseq_d",
-    "llvm.mips.fseq.w" => "__builtin_msa_fseq_w",
-    "llvm.mips.fsle.d" => "__builtin_msa_fsle_d",
-    "llvm.mips.fsle.w" => "__builtin_msa_fsle_w",
-    "llvm.mips.fslt.d" => "__builtin_msa_fslt_d",
-    "llvm.mips.fslt.w" => "__builtin_msa_fslt_w",
-    "llvm.mips.fsne.d" => "__builtin_msa_fsne_d",
-    "llvm.mips.fsne.w" => "__builtin_msa_fsne_w",
-    "llvm.mips.fsor.d" => "__builtin_msa_fsor_d",
-    "llvm.mips.fsor.w" => "__builtin_msa_fsor_w",
-    "llvm.mips.fsqrt.d" => "__builtin_msa_fsqrt_d",
-    "llvm.mips.fsqrt.w" => "__builtin_msa_fsqrt_w",
-    "llvm.mips.fsub.d" => "__builtin_msa_fsub_d",
-    "llvm.mips.fsub.w" => "__builtin_msa_fsub_w",
-    "llvm.mips.fsueq.d" => "__builtin_msa_fsueq_d",
-    "llvm.mips.fsueq.w" => "__builtin_msa_fsueq_w",
-    "llvm.mips.fsule.d" => "__builtin_msa_fsule_d",
-    "llvm.mips.fsule.w" => "__builtin_msa_fsule_w",
-    "llvm.mips.fsult.d" => "__builtin_msa_fsult_d",
-    "llvm.mips.fsult.w" => "__builtin_msa_fsult_w",
-    "llvm.mips.fsun.d" => "__builtin_msa_fsun_d",
-    "llvm.mips.fsun.w" => "__builtin_msa_fsun_w",
-    "llvm.mips.fsune.d" => "__builtin_msa_fsune_d",
-    "llvm.mips.fsune.w" => "__builtin_msa_fsune_w",
-    "llvm.mips.ftint.s.d" => "__builtin_msa_ftint_s_d",
-    "llvm.mips.ftint.s.w" => "__builtin_msa_ftint_s_w",
-    "llvm.mips.ftint.u.d" => "__builtin_msa_ftint_u_d",
-    "llvm.mips.ftint.u.w" => "__builtin_msa_ftint_u_w",
-    "llvm.mips.ftq.h" => "__builtin_msa_ftq_h",
-    "llvm.mips.ftq.w" => "__builtin_msa_ftq_w",
-    "llvm.mips.ftrunc.s.d" => "__builtin_msa_ftrunc_s_d",
-    "llvm.mips.ftrunc.s.w" => "__builtin_msa_ftrunc_s_w",
-    "llvm.mips.ftrunc.u.d" => "__builtin_msa_ftrunc_u_d",
-    "llvm.mips.ftrunc.u.w" => "__builtin_msa_ftrunc_u_w",
-    "llvm.mips.hadd.s.d" => "__builtin_msa_hadd_s_d",
-    "llvm.mips.hadd.s.h" => "__builtin_msa_hadd_s_h",
-    "llvm.mips.hadd.s.w" => "__builtin_msa_hadd_s_w",
-    "llvm.mips.hadd.u.d" => "__builtin_msa_hadd_u_d",
-    "llvm.mips.hadd.u.h" => "__builtin_msa_hadd_u_h",
-    "llvm.mips.hadd.u.w" => "__builtin_msa_hadd_u_w",
-    "llvm.mips.hsub.s.d" => "__builtin_msa_hsub_s_d",
-    "llvm.mips.hsub.s.h" => "__builtin_msa_hsub_s_h",
-    "llvm.mips.hsub.s.w" => "__builtin_msa_hsub_s_w",
-    "llvm.mips.hsub.u.d" => "__builtin_msa_hsub_u_d",
-    "llvm.mips.hsub.u.h" => "__builtin_msa_hsub_u_h",
-    "llvm.mips.hsub.u.w" => "__builtin_msa_hsub_u_w",
-    "llvm.mips.ilvev.b" => "__builtin_msa_ilvev_b",
-    "llvm.mips.ilvev.d" => "__builtin_msa_ilvev_d",
-    "llvm.mips.ilvev.h" => "__builtin_msa_ilvev_h",
-    "llvm.mips.ilvev.w" => "__builtin_msa_ilvev_w",
-    "llvm.mips.ilvl.b" => "__builtin_msa_ilvl_b",
-    "llvm.mips.ilvl.d" => "__builtin_msa_ilvl_d",
-    "llvm.mips.ilvl.h" => "__builtin_msa_ilvl_h",
-    "llvm.mips.ilvl.w" => "__builtin_msa_ilvl_w",
-    "llvm.mips.ilvod.b" => "__builtin_msa_ilvod_b",
-    "llvm.mips.ilvod.d" => "__builtin_msa_ilvod_d",
-    "llvm.mips.ilvod.h" => "__builtin_msa_ilvod_h",
-    "llvm.mips.ilvod.w" => "__builtin_msa_ilvod_w",
-    "llvm.mips.ilvr.b" => "__builtin_msa_ilvr_b",
-    "llvm.mips.ilvr.d" => "__builtin_msa_ilvr_d",
-    "llvm.mips.ilvr.h" => "__builtin_msa_ilvr_h",
-    "llvm.mips.ilvr.w" => "__builtin_msa_ilvr_w",
-    "llvm.mips.insert.b" => "__builtin_msa_insert_b",
-    "llvm.mips.insert.d" => "__builtin_msa_insert_d",
-    "llvm.mips.insert.h" => "__builtin_msa_insert_h",
-    "llvm.mips.insert.w" => "__builtin_msa_insert_w",
-    "llvm.mips.insv" => "__builtin_mips_insv",
-    "llvm.mips.insve.b" => "__builtin_msa_insve_b",
-    "llvm.mips.insve.d" => "__builtin_msa_insve_d",
-    "llvm.mips.insve.h" => "__builtin_msa_insve_h",
-    "llvm.mips.insve.w" => "__builtin_msa_insve_w",
-    "llvm.mips.lbux" => "__builtin_mips_lbux",
-    "llvm.mips.ld.b" => "__builtin_msa_ld_b",
-    "llvm.mips.ld.d" => "__builtin_msa_ld_d",
-    "llvm.mips.ld.h" => "__builtin_msa_ld_h",
-    "llvm.mips.ld.w" => "__builtin_msa_ld_w",
-    "llvm.mips.ldi.b" => "__builtin_msa_ldi_b",
-    "llvm.mips.ldi.d" => "__builtin_msa_ldi_d",
-    "llvm.mips.ldi.h" => "__builtin_msa_ldi_h",
-    "llvm.mips.ldi.w" => "__builtin_msa_ldi_w",
-    "llvm.mips.lhx" => "__builtin_mips_lhx",
-    "llvm.mips.lsa" => "__builtin_mips_lsa",
-    "llvm.mips.lwx" => "__builtin_mips_lwx",
-    "llvm.mips.madd" => "__builtin_mips_madd",
-    "llvm.mips.madd.q.h" => "__builtin_msa_madd_q_h",
-    "llvm.mips.madd.q.w" => "__builtin_msa_madd_q_w",
-    "llvm.mips.maddr.q.h" => "__builtin_msa_maddr_q_h",
-    "llvm.mips.maddr.q.w" => "__builtin_msa_maddr_q_w",
-    "llvm.mips.maddu" => "__builtin_mips_maddu",
-    "llvm.mips.maddv.b" => "__builtin_msa_maddv_b",
-    "llvm.mips.maddv.d" => "__builtin_msa_maddv_d",
-    "llvm.mips.maddv.h" => "__builtin_msa_maddv_h",
-    "llvm.mips.maddv.w" => "__builtin_msa_maddv_w",
-    "llvm.mips.max.a.b" => "__builtin_msa_max_a_b",
-    "llvm.mips.max.a.d" => "__builtin_msa_max_a_d",
-    "llvm.mips.max.a.h" => "__builtin_msa_max_a_h",
-    "llvm.mips.max.a.w" => "__builtin_msa_max_a_w",
-    "llvm.mips.max.s.b" => "__builtin_msa_max_s_b",
-    "llvm.mips.max.s.d" => "__builtin_msa_max_s_d",
-    "llvm.mips.max.s.h" => "__builtin_msa_max_s_h",
-    "llvm.mips.max.s.w" => "__builtin_msa_max_s_w",
-    "llvm.mips.max.u.b" => "__builtin_msa_max_u_b",
-    "llvm.mips.max.u.d" => "__builtin_msa_max_u_d",
-    "llvm.mips.max.u.h" => "__builtin_msa_max_u_h",
-    "llvm.mips.max.u.w" => "__builtin_msa_max_u_w",
-    "llvm.mips.maxi.s.b" => "__builtin_msa_maxi_s_b",
-    "llvm.mips.maxi.s.d" => "__builtin_msa_maxi_s_d",
-    "llvm.mips.maxi.s.h" => "__builtin_msa_maxi_s_h",
-    "llvm.mips.maxi.s.w" => "__builtin_msa_maxi_s_w",
-    "llvm.mips.maxi.u.b" => "__builtin_msa_maxi_u_b",
-    "llvm.mips.maxi.u.d" => "__builtin_msa_maxi_u_d",
-    "llvm.mips.maxi.u.h" => "__builtin_msa_maxi_u_h",
-    "llvm.mips.maxi.u.w" => "__builtin_msa_maxi_u_w",
-    "llvm.mips.min.a.b" => "__builtin_msa_min_a_b",
-    "llvm.mips.min.a.d" => "__builtin_msa_min_a_d",
-    "llvm.mips.min.a.h" => "__builtin_msa_min_a_h",
-    "llvm.mips.min.a.w" => "__builtin_msa_min_a_w",
-    "llvm.mips.min.s.b" => "__builtin_msa_min_s_b",
-    "llvm.mips.min.s.d" => "__builtin_msa_min_s_d",
-    "llvm.mips.min.s.h" => "__builtin_msa_min_s_h",
-    "llvm.mips.min.s.w" => "__builtin_msa_min_s_w",
-    "llvm.mips.min.u.b" => "__builtin_msa_min_u_b",
-    "llvm.mips.min.u.d" => "__builtin_msa_min_u_d",
-    "llvm.mips.min.u.h" => "__builtin_msa_min_u_h",
-    "llvm.mips.min.u.w" => "__builtin_msa_min_u_w",
-    "llvm.mips.mini.s.b" => "__builtin_msa_mini_s_b",
-    "llvm.mips.mini.s.d" => "__builtin_msa_mini_s_d",
-    "llvm.mips.mini.s.h" => "__builtin_msa_mini_s_h",
-    "llvm.mips.mini.s.w" => "__builtin_msa_mini_s_w",
-    "llvm.mips.mini.u.b" => "__builtin_msa_mini_u_b",
-    "llvm.mips.mini.u.d" => "__builtin_msa_mini_u_d",
-    "llvm.mips.mini.u.h" => "__builtin_msa_mini_u_h",
-    "llvm.mips.mini.u.w" => "__builtin_msa_mini_u_w",
-    "llvm.mips.mod.s.b" => "__builtin_msa_mod_s_b",
-    "llvm.mips.mod.s.d" => "__builtin_msa_mod_s_d",
-    "llvm.mips.mod.s.h" => "__builtin_msa_mod_s_h",
-    "llvm.mips.mod.s.w" => "__builtin_msa_mod_s_w",
-    "llvm.mips.mod.u.b" => "__builtin_msa_mod_u_b",
-    "llvm.mips.mod.u.d" => "__builtin_msa_mod_u_d",
-    "llvm.mips.mod.u.h" => "__builtin_msa_mod_u_h",
-    "llvm.mips.mod.u.w" => "__builtin_msa_mod_u_w",
-    "llvm.mips.modsub" => "__builtin_mips_modsub",
-    "llvm.mips.move.v" => "__builtin_msa_move_v",
-    "llvm.mips.msub" => "__builtin_mips_msub",
-    "llvm.mips.msub.q.h" => "__builtin_msa_msub_q_h",
-    "llvm.mips.msub.q.w" => "__builtin_msa_msub_q_w",
-    "llvm.mips.msubr.q.h" => "__builtin_msa_msubr_q_h",
-    "llvm.mips.msubr.q.w" => "__builtin_msa_msubr_q_w",
-    "llvm.mips.msubu" => "__builtin_mips_msubu",
-    "llvm.mips.msubv.b" => "__builtin_msa_msubv_b",
-    "llvm.mips.msubv.d" => "__builtin_msa_msubv_d",
-    "llvm.mips.msubv.h" => "__builtin_msa_msubv_h",
-    "llvm.mips.msubv.w" => "__builtin_msa_msubv_w",
-    "llvm.mips.mthlip" => "__builtin_mips_mthlip",
-    "llvm.mips.mul.ph" => "__builtin_mips_mul_ph",
-    "llvm.mips.mul.q.h" => "__builtin_msa_mul_q_h",
-    "llvm.mips.mul.q.w" => "__builtin_msa_mul_q_w",
-    "llvm.mips.mul.s.ph" => "__builtin_mips_mul_s_ph",
-    "llvm.mips.mulr.q.h" => "__builtin_msa_mulr_q_h",
-    "llvm.mips.mulr.q.w" => "__builtin_msa_mulr_q_w",
-    "llvm.mips.mulsa.w.ph" => "__builtin_mips_mulsa_w_ph",
-    "llvm.mips.mult" => "__builtin_mips_mult",
-    "llvm.mips.multu" => "__builtin_mips_multu",
-    "llvm.mips.mulv.b" => "__builtin_msa_mulv_b",
-    "llvm.mips.mulv.d" => "__builtin_msa_mulv_d",
-    "llvm.mips.mulv.h" => "__builtin_msa_mulv_h",
-    "llvm.mips.mulv.w" => "__builtin_msa_mulv_w",
-    "llvm.mips.nloc.b" => "__builtin_msa_nloc_b",
-    "llvm.mips.nloc.d" => "__builtin_msa_nloc_d",
-    "llvm.mips.nloc.h" => "__builtin_msa_nloc_h",
-    "llvm.mips.nloc.w" => "__builtin_msa_nloc_w",
-    "llvm.mips.nlzc.b" => "__builtin_msa_nlzc_b",
-    "llvm.mips.nlzc.d" => "__builtin_msa_nlzc_d",
-    "llvm.mips.nlzc.h" => "__builtin_msa_nlzc_h",
-    "llvm.mips.nlzc.w" => "__builtin_msa_nlzc_w",
-    "llvm.mips.nor.v" => "__builtin_msa_nor_v",
-    "llvm.mips.nori.b" => "__builtin_msa_nori_b",
-    "llvm.mips.or.v" => "__builtin_msa_or_v",
-    "llvm.mips.ori.b" => "__builtin_msa_ori_b",
-    "llvm.mips.pckev.b" => "__builtin_msa_pckev_b",
-    "llvm.mips.pckev.d" => "__builtin_msa_pckev_d",
-    "llvm.mips.pckev.h" => "__builtin_msa_pckev_h",
-    "llvm.mips.pckev.w" => "__builtin_msa_pckev_w",
-    "llvm.mips.pckod.b" => "__builtin_msa_pckod_b",
-    "llvm.mips.pckod.d" => "__builtin_msa_pckod_d",
-    "llvm.mips.pckod.h" => "__builtin_msa_pckod_h",
-    "llvm.mips.pckod.w" => "__builtin_msa_pckod_w",
-    "llvm.mips.pcnt.b" => "__builtin_msa_pcnt_b",
-    "llvm.mips.pcnt.d" => "__builtin_msa_pcnt_d",
-    "llvm.mips.pcnt.h" => "__builtin_msa_pcnt_h",
-    "llvm.mips.pcnt.w" => "__builtin_msa_pcnt_w",
-    "llvm.mips.pick.qb" => "__builtin_mips_pick_qb",
-    "llvm.mips.precr.qb.ph" => "__builtin_mips_precr_qb_ph",
-    "llvm.mips.precr.sra.ph.w" => "__builtin_mips_precr_sra_ph_w",
-    "llvm.mips.precr.sra.r.ph.w" => "__builtin_mips_precr_sra_r_ph_w",
-    "llvm.mips.prepend" => "__builtin_mips_prepend",
-    "llvm.mips.raddu.w.qb" => "__builtin_mips_raddu_w_qb",
-    "llvm.mips.rddsp" => "__builtin_mips_rddsp",
-    "llvm.mips.repl.qb" => "__builtin_mips_repl_qb",
-    "llvm.mips.sat.s.b" => "__builtin_msa_sat_s_b",
-    "llvm.mips.sat.s.d" => "__builtin_msa_sat_s_d",
-    "llvm.mips.sat.s.h" => "__builtin_msa_sat_s_h",
-    "llvm.mips.sat.s.w" => "__builtin_msa_sat_s_w",
-    "llvm.mips.sat.u.b" => "__builtin_msa_sat_u_b",
-    "llvm.mips.sat.u.d" => "__builtin_msa_sat_u_d",
-    "llvm.mips.sat.u.h" => "__builtin_msa_sat_u_h",
-    "llvm.mips.sat.u.w" => "__builtin_msa_sat_u_w",
-    "llvm.mips.shf.b" => "__builtin_msa_shf_b",
-    "llvm.mips.shf.h" => "__builtin_msa_shf_h",
-    "llvm.mips.shf.w" => "__builtin_msa_shf_w",
-    "llvm.mips.shilo" => "__builtin_mips_shilo",
-    "llvm.mips.shll.qb" => "__builtin_mips_shll_qb",
-    "llvm.mips.shra.qb" => "__builtin_mips_shra_qb",
-    "llvm.mips.shra.r.qb" => "__builtin_mips_shra_r_qb",
-    "llvm.mips.shrl.ph" => "__builtin_mips_shrl_ph",
-    "llvm.mips.shrl.qb" => "__builtin_mips_shrl_qb",
-    "llvm.mips.sld.b" => "__builtin_msa_sld_b",
-    "llvm.mips.sld.d" => "__builtin_msa_sld_d",
-    "llvm.mips.sld.h" => "__builtin_msa_sld_h",
-    "llvm.mips.sld.w" => "__builtin_msa_sld_w",
-    "llvm.mips.sldi.b" => "__builtin_msa_sldi_b",
-    "llvm.mips.sldi.d" => "__builtin_msa_sldi_d",
-    "llvm.mips.sldi.h" => "__builtin_msa_sldi_h",
-    "llvm.mips.sldi.w" => "__builtin_msa_sldi_w",
-    "llvm.mips.sll.b" => "__builtin_msa_sll_b",
-    "llvm.mips.sll.d" => "__builtin_msa_sll_d",
-    "llvm.mips.sll.h" => "__builtin_msa_sll_h",
-    "llvm.mips.sll.w" => "__builtin_msa_sll_w",
-    "llvm.mips.slli.b" => "__builtin_msa_slli_b",
-    "llvm.mips.slli.d" => "__builtin_msa_slli_d",
-    "llvm.mips.slli.h" => "__builtin_msa_slli_h",
-    "llvm.mips.slli.w" => "__builtin_msa_slli_w",
-    "llvm.mips.splat.b" => "__builtin_msa_splat_b",
-    "llvm.mips.splat.d" => "__builtin_msa_splat_d",
-    "llvm.mips.splat.h" => "__builtin_msa_splat_h",
-    "llvm.mips.splat.w" => "__builtin_msa_splat_w",
-    "llvm.mips.splati.b" => "__builtin_msa_splati_b",
-    "llvm.mips.splati.d" => "__builtin_msa_splati_d",
-    "llvm.mips.splati.h" => "__builtin_msa_splati_h",
-    "llvm.mips.splati.w" => "__builtin_msa_splati_w",
-    "llvm.mips.sra.b" => "__builtin_msa_sra_b",
-    "llvm.mips.sra.d" => "__builtin_msa_sra_d",
-    "llvm.mips.sra.h" => "__builtin_msa_sra_h",
-    "llvm.mips.sra.w" => "__builtin_msa_sra_w",
-    "llvm.mips.srai.b" => "__builtin_msa_srai_b",
-    "llvm.mips.srai.d" => "__builtin_msa_srai_d",
-    "llvm.mips.srai.h" => "__builtin_msa_srai_h",
-    "llvm.mips.srai.w" => "__builtin_msa_srai_w",
-    "llvm.mips.srar.b" => "__builtin_msa_srar_b",
-    "llvm.mips.srar.d" => "__builtin_msa_srar_d",
-    "llvm.mips.srar.h" => "__builtin_msa_srar_h",
-    "llvm.mips.srar.w" => "__builtin_msa_srar_w",
-    "llvm.mips.srari.b" => "__builtin_msa_srari_b",
-    "llvm.mips.srari.d" => "__builtin_msa_srari_d",
-    "llvm.mips.srari.h" => "__builtin_msa_srari_h",
-    "llvm.mips.srari.w" => "__builtin_msa_srari_w",
-    "llvm.mips.srl.b" => "__builtin_msa_srl_b",
-    "llvm.mips.srl.d" => "__builtin_msa_srl_d",
-    "llvm.mips.srl.h" => "__builtin_msa_srl_h",
-    "llvm.mips.srl.w" => "__builtin_msa_srl_w",
-    "llvm.mips.srli.b" => "__builtin_msa_srli_b",
-    "llvm.mips.srli.d" => "__builtin_msa_srli_d",
-    "llvm.mips.srli.h" => "__builtin_msa_srli_h",
-    "llvm.mips.srli.w" => "__builtin_msa_srli_w",
-    "llvm.mips.srlr.b" => "__builtin_msa_srlr_b",
-    "llvm.mips.srlr.d" => "__builtin_msa_srlr_d",
-    "llvm.mips.srlr.h" => "__builtin_msa_srlr_h",
-    "llvm.mips.srlr.w" => "__builtin_msa_srlr_w",
-    "llvm.mips.srlri.b" => "__builtin_msa_srlri_b",
-    "llvm.mips.srlri.d" => "__builtin_msa_srlri_d",
-    "llvm.mips.srlri.h" => "__builtin_msa_srlri_h",
-    "llvm.mips.srlri.w" => "__builtin_msa_srlri_w",
-    "llvm.mips.st.b" => "__builtin_msa_st_b",
-    "llvm.mips.st.d" => "__builtin_msa_st_d",
-    "llvm.mips.st.h" => "__builtin_msa_st_h",
-    "llvm.mips.st.w" => "__builtin_msa_st_w",
-    "llvm.mips.subs.s.b" => "__builtin_msa_subs_s_b",
-    "llvm.mips.subs.s.d" => "__builtin_msa_subs_s_d",
-    "llvm.mips.subs.s.h" => "__builtin_msa_subs_s_h",
-    "llvm.mips.subs.s.w" => "__builtin_msa_subs_s_w",
-    "llvm.mips.subs.u.b" => "__builtin_msa_subs_u_b",
-    "llvm.mips.subs.u.d" => "__builtin_msa_subs_u_d",
-    "llvm.mips.subs.u.h" => "__builtin_msa_subs_u_h",
-    "llvm.mips.subs.u.w" => "__builtin_msa_subs_u_w",
-    "llvm.mips.subsus.u.b" => "__builtin_msa_subsus_u_b",
-    "llvm.mips.subsus.u.d" => "__builtin_msa_subsus_u_d",
-    "llvm.mips.subsus.u.h" => "__builtin_msa_subsus_u_h",
-    "llvm.mips.subsus.u.w" => "__builtin_msa_subsus_u_w",
-    "llvm.mips.subsuu.s.b" => "__builtin_msa_subsuu_s_b",
-    "llvm.mips.subsuu.s.d" => "__builtin_msa_subsuu_s_d",
-    "llvm.mips.subsuu.s.h" => "__builtin_msa_subsuu_s_h",
-    "llvm.mips.subsuu.s.w" => "__builtin_msa_subsuu_s_w",
-    "llvm.mips.subu.ph" => "__builtin_mips_subu_ph",
-    "llvm.mips.subu.qb" => "__builtin_mips_subu_qb",
-    "llvm.mips.subu.s.ph" => "__builtin_mips_subu_s_ph",
-    "llvm.mips.subu.s.qb" => "__builtin_mips_subu_s_qb",
-    "llvm.mips.subuh.qb" => "__builtin_mips_subuh_qb",
-    "llvm.mips.subuh.r.qb" => "__builtin_mips_subuh_r_qb",
-    "llvm.mips.subv.b" => "__builtin_msa_subv_b",
-    "llvm.mips.subv.d" => "__builtin_msa_subv_d",
-    "llvm.mips.subv.h" => "__builtin_msa_subv_h",
-    "llvm.mips.subv.w" => "__builtin_msa_subv_w",
-    "llvm.mips.subvi.b" => "__builtin_msa_subvi_b",
-    "llvm.mips.subvi.d" => "__builtin_msa_subvi_d",
-    "llvm.mips.subvi.h" => "__builtin_msa_subvi_h",
-    "llvm.mips.subvi.w" => "__builtin_msa_subvi_w",
-    "llvm.mips.vshf.b" => "__builtin_msa_vshf_b",
-    "llvm.mips.vshf.d" => "__builtin_msa_vshf_d",
-    "llvm.mips.vshf.h" => "__builtin_msa_vshf_h",
-    "llvm.mips.vshf.w" => "__builtin_msa_vshf_w",
-    "llvm.mips.wrdsp" => "__builtin_mips_wrdsp",
-    "llvm.mips.xor.v" => "__builtin_msa_xor_v",
-    "llvm.mips.xori.b" => "__builtin_msa_xori_b",
     // xcore
     "llvm.xcore.bitrev" => "__builtin_bitrev",
     "llvm.xcore.getid" => "__builtin_getid",
     "llvm.xcore.getps" => "__builtin_getps",
     "llvm.xcore.setps" => "__builtin_setps",
-    // ptx
-    "llvm.ptx.bar.sync" => "__builtin_ptx_bar_sync",
-    "llvm.ptx.read.clock" => "__builtin_ptx_read_clock",
-    "llvm.ptx.read.clock64" => "__builtin_ptx_read_clock64",
-    "llvm.ptx.read.gridid" => "__builtin_ptx_read_gridid",
-    "llvm.ptx.read.laneid" => "__builtin_ptx_read_laneid",
-    "llvm.ptx.read.lanemask.eq" => "__builtin_ptx_read_lanemask_eq",
-    "llvm.ptx.read.lanemask.ge" => "__builtin_ptx_read_lanemask_ge",
-    "llvm.ptx.read.lanemask.gt" => "__builtin_ptx_read_lanemask_gt",
-    "llvm.ptx.read.lanemask.le" => "__builtin_ptx_read_lanemask_le",
-    "llvm.ptx.read.lanemask.lt" => "__builtin_ptx_read_lanemask_lt",
-    "llvm.ptx.read.nsmid" => "__builtin_ptx_read_nsmid",
-    "llvm.ptx.read.nwarpid" => "__builtin_ptx_read_nwarpid",
-    "llvm.ptx.read.pm0" => "__builtin_ptx_read_pm0",
-    "llvm.ptx.read.pm1" => "__builtin_ptx_read_pm1",
-    "llvm.ptx.read.pm2" => "__builtin_ptx_read_pm2",
-    "llvm.ptx.read.pm3" => "__builtin_ptx_read_pm3",
-    "llvm.ptx.read.smid" => "__builtin_ptx_read_smid",
-    "llvm.ptx.read.warpid" => "__builtin_ptx_read_warpid",
-    // cuda
-    "llvm.cuda.syncthreads" => "__syncthreads",
-_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
 }

From 56983cf3c6367f13fb94f6ada05537156f513e6c Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Fri, 1 Apr 2022 12:55:00 +0900
Subject: [PATCH 059/997] test: Remove redundant code from `tests/run/int.rs`

---
 tests/run/int.rs | 23 ++---------------------
 1 file changed, 2 insertions(+), 21 deletions(-)

diff --git a/tests/run/int.rs b/tests/run/int.rs
index 49376012c40e..7139b8d4f5dc 100644
--- a/tests/run/int.rs
+++ b/tests/run/int.rs
@@ -3,32 +3,13 @@
 // Run-time:
 //   status: 0
 
-#![feature(arbitrary_self_types, auto_traits, core_intrinsics, lang_items, start, intrinsics)]
+#![feature(core_intrinsics, start)]
 
 #![no_std]
 
-mod intrinsics {
-    extern "rust-intrinsic" {
-        pub fn abort() -> !;
-    }
-}
-
-/*
- * Core
- */
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn puts(s: *const u8) -> i32;
-    }
-}
-
 #[panic_handler]
 fn panic_handler(_: &core::panic::PanicInfo) -> ! {
-    unsafe {
-        core::intrinsics::abort();
-    }
+    core::intrinsics::abort();
 }
 
 /*

From 837a4467bc98471d5619e76cc47eac3b9a471d28 Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Wed, 6 Apr 2022 01:25:13 +0900
Subject: [PATCH 060/997] test: Test more integer types and checked arithmetic
 in `tests/run/int.rs`

---
 tests/run/int.rs | 389 ++++++++++++++++++++++++++++++++++++-----------
 1 file changed, 300 insertions(+), 89 deletions(-)

diff --git a/tests/run/int.rs b/tests/run/int.rs
index 7139b8d4f5dc..8d2db9096f73 100644
--- a/tests/run/int.rs
+++ b/tests/run/int.rs
@@ -3,7 +3,7 @@
 // Run-time:
 //   status: 0
 
-#![feature(core_intrinsics, start)]
+#![feature(bench_black_box, core_intrinsics, start)]
 
 #![no_std]
 
@@ -17,118 +17,329 @@ fn panic_handler(_: &core::panic::PanicInfo) -> ! {
  */
 
 #[start]
-fn main(argc: isize, _argv: *const *const u8) -> isize {
-    let var = 134217856_u128;
-    let var2 = 10475372733397991552_u128;
-    let var3 = 193236519889708027473620326106273939584_u128;
-    let var4 = 123236519889708027473620326106273939584_u128;
-    let var5 = 153236519889708027473620326106273939584_u128;
-    let var6 = 18446744073709551616_i128;
-    let var7 = 170141183460469231731687303715884105728_u128;
+fn main(_argc: isize, _argv: *const *const u8) -> isize {
+    let one: isize = core::hint::black_box(1);
 
-    // Shifts.
-    assert_eq!(var << (argc as u128 - 1), var);
-    assert_eq!(var << argc as u128, 268435712);
-    assert_eq!(var << (argc + 32) as u128, 1152922604118474752);
-    assert_eq!(var << (argc + 48) as u128, 75557935783508361347072);
-    assert_eq!(var << (argc + 60) as u128, 309485304969250248077606912);
-    assert_eq!(var << (argc + 62) as u128, 1237941219877000992310427648);
-    assert_eq!(var << (argc + 63) as u128, 2475882439754001984620855296);
-    assert_eq!(var << (argc + 80) as u128, 324518863143436548128224745357312);
+    macro_rules! check {
+        ($ty:ty, $expr:expr) => {
+            {
+                const EXPECTED: $ty = {
+                    #[allow(non_upper_case_globals)]
+                    #[allow(dead_code)]
+                    const one: isize = 1;
+                    $expr
+                };
+                assert_eq!($expr, EXPECTED);
+            }
+        };
+    }
 
-    assert_eq!(var2 << argc as u128, 20950745466795983104);
-    assert_eq!(var2 << (argc as u128 - 1), var2);
-    assert_eq!(var2 << (argc + 32) as u128, 89982766606709001335848566784);
-    assert_eq!(var2 << (argc + 48) as u128, 5897110592337281111546171672756224);
-    assert_eq!(var2 << (argc + 60) as u128, 24154564986213503432893119171609493504);
-    assert_eq!(var2 << (argc + 62) as u128, 96618259944854013731572476686437974016);
-    assert_eq!(var2 << (argc + 63) as u128, 193236519889708027463144953372875948032);
+    check!(u32, (2220326408_u32 + one as u32) >> (32 - 6));
 
-    assert_eq!(var3 << argc as u128, 46190672858477591483866044780779667712);
-    assert_eq!(var3 << (argc as u128 - 1), var3);
-    assert_eq!(var3 << (argc + 32) as u128, 21267668304951024224840338247585366016);
-    assert_eq!(var3 << (argc + 48) as u128, 1335125106377253154015353231953100800);
-    assert_eq!(var3 << (argc + 60) as u128, 24154564986213503432893119171609493504);
-    assert_eq!(var3 << (argc + 62) as u128, 96618259944854013731572476686437974016);
-    assert_eq!(var3 << (argc + 63) as u128, 193236519889708027463144953372875948032);
+    /// Generate `check!` tests for integer types at least as wide as 128 bits.
+    macro_rules! check_ops128 {
+        () => {
+            check_ops64!();
 
-    assert_eq!((2220326408_u32 + argc as u32) >> (32 - 6), 33);
+            // Shifts.
+            check!(T, VAL1 << (one + 63) as T);
+            check!(T, VAL1 << (one + 80) as T);
+            check!(T, VAL3 << (one + 62) as T);
+            check!(T, VAL3 << (one + 63) as T);
 
-    assert_eq!(var >> (argc as u128 - 1), var);
-    assert_eq!(var >> argc as u128, 67108928);
-    assert_eq!(var >> (argc + 32) as u128, 0);
-    assert_eq!(var >> (argc + 48) as u128, 0);
-    assert_eq!(var >> (argc + 60) as u128, 0);
-    assert_eq!(var >> (argc + 62) as u128, 0);
-    assert_eq!(var >> (argc + 63) as u128, 0);
+            check!(T, VAL1 >> (one + 63) as T);
+            check!(T, VAL2 >> (one + 63) as T);
+            check!(T, VAL3 >> (one + 63) as T);
+            check!(T, VAL3 >> (one + 80) as T);
+        };
+    }
 
-    assert_eq!(var2 >> argc as u128, 5237686366698995776);
-    assert_eq!(var2 >> (argc as u128 - 1), var2);
-    assert_eq!(var2 >> (argc + 32) as u128, 1219493888);
-    assert_eq!(var2 >> (argc + 48) as u128, 18608);
-    assert_eq!(var2 >> (argc + 60) as u128, 4);
-    assert_eq!(var2 >> (argc + 62) as u128, 1);
-    assert_eq!(var2 >> (argc + 63) as u128, 0);
+    /// Generate `check!` tests for integer types at least as wide as 64 bits.
+    macro_rules! check_ops64 {
+        () => {
+            check_ops32!();
 
-    assert_eq!(var3 >> (argc as u128 - 1), var3);
-    assert_eq!(var3 >> argc as u128, 96618259944854013736810163053136969792);
-    assert_eq!(var3 >> (argc + 32) as u128, 22495691651677250335181635584);
-    assert_eq!(var3 >> (argc + 48) as u128, 343257013727985387194544);
-    assert_eq!(var3 >> (argc + 60) as u128, 83802981867183932420);
-    assert_eq!(var3 >> (argc + 62) as u128, 20950745466795983105);
-    assert_eq!(var3 >> (argc + 63) as u128, 10475372733397991552);
-    assert_eq!(var3 >> (argc + 80) as u128, 79920751444992);
+            // Shifts.
+            check!(T, VAL2 << (one + 32) as T);
+            check!(T, VAL2 << (one + 48) as T);
+            check!(T, VAL2 << (one + 60) as T);
+            check!(T, VAL2 << (one + 62) as T);
 
-    assert_eq!(var6 >> argc as u128, 9223372036854775808);
-    assert_eq!((var6 - 1) >> argc as u128, 9223372036854775807);
-    assert_eq!(var7 >> argc as u128, 85070591730234615865843651857942052864);
+            check!(T, VAL3 << (one + 32) as T);
+            check!(T, VAL3 << (one + 48) as T);
+            check!(T, VAL3 << (one + 60) as T);
 
-    // Casts
-    assert_eq!((var >> (argc + 32) as u128) as u64, 0);
-    assert_eq!((var >> argc as u128) as u64, 67108928);
+            check!(T, VAL1 >> (one + 32) as T);
+            check!(T, VAL1 >> (one + 48) as T);
+            check!(T, VAL1 >> (one + 60) as T);
+            check!(T, VAL1 >> (one + 62) as T);
 
-    // Addition.
-    assert_eq!(var + argc as u128, 134217857);
+            check!(T, VAL2 >> (one + 32) as T);
+            check!(T, VAL2 >> (one + 48) as T);
+            check!(T, VAL2 >> (one + 60) as T);
+            check!(T, VAL2 >> (one + 62) as T);
 
-    assert_eq!(var2 + argc as u128, 10475372733397991553);
-    assert_eq!(var2 + (var2 + argc as u128) as u128, 20950745466795983105);
+            check!(T, VAL3 >> (one + 32) as T);
+            check!(T, VAL3 >> (one + 48) as T);
+            check!(T, VAL3 >> (one + 60) as T);
+            check!(T, VAL3 >> (one + 62) as T);
+        };
+    }
 
-    assert_eq!(var3 + argc as u128, 193236519889708027473620326106273939585);
+    /// Generate `check!` tests for integer types at least as wide as 32 bits.
+    macro_rules! check_ops32 {
+        () => {
+            // Shifts.
+            check!(T, VAL2 << one as T);
+            check!(T, VAL2 << (one as T - 1));
 
-    // Subtraction
-    assert_eq!(var - argc as u128, 134217855);
+            check!(T, VAL3 << one as T);
+            check!(T, VAL3 << (one as T - 1));
 
-    assert_eq!(var2 - argc as u128, 10475372733397991551);
+            check!(T, VAL1.wrapping_shl(one as u32 - 1));
+            check!(T, VAL1.wrapping_shl(one as u32));
+            check!(T, VAL1.wrapping_shl((one + 32) as u32));
+            check!(T, VAL1.wrapping_shl((one + 48) as u32));
+            check!(T, VAL1.wrapping_shl((one + 60) as u32));
+            check!(T, VAL1.wrapping_shl((one + 62) as u32));
+            check!(T, VAL1.wrapping_shl((one + 63) as u32));
+            check!(T, VAL1.wrapping_shl((one + 80) as u32));
 
-    assert_eq!(var3 - argc as u128, 193236519889708027473620326106273939583);
+            check!(Option<T>, VAL1.checked_shl(one as u32 - 1));
+            check!(Option<T>, VAL1.checked_shl(one as u32));
+            check!(Option<T>, VAL1.checked_shl((one + 32) as u32));
+            check!(Option<T>, VAL1.checked_shl((one + 48) as u32));
+            check!(Option<T>, VAL1.checked_shl((one + 60) as u32));
+            check!(Option<T>, VAL1.checked_shl((one + 62) as u32));
+            check!(Option<T>, VAL1.checked_shl((one + 63) as u32));
+            check!(Option<T>, VAL1.checked_shl((one + 80) as u32));
 
-    // Multiplication
-    assert_eq!(var * (argc + 1) as u128, 268435712);
-    assert_eq!(var * (argc as u128 + var2), 1405982069077538020949770368);
+            check!(T, VAL1 >> (one as T - 1));
+            check!(T, VAL1 >> one as T);
 
-    assert_eq!(var2 * (argc + 1) as u128, 20950745466795983104);
-    assert_eq!(var2 * (argc as u128 + var2), 109733433903618109003204073240861360256);
+            check!(T, VAL2 >> one as T);
+            check!(T, VAL2 >> (one as T - 1));
 
-    assert_eq!(var3 * argc as u128, 193236519889708027473620326106273939584);
+            check!(T, VAL3 >> (one as T - 1));
+            check!(T, VAL3 >> one as T);
 
-    assert_eq!(var4 * (argc + 1) as u128, 246473039779416054947240652212547879168);
+            check!(T, VAL1.wrapping_shr(one as u32 - 1));
+            check!(T, VAL1.wrapping_shr(one as u32));
+            check!(T, VAL1.wrapping_shr((one + 32) as u32));
+            check!(T, VAL1.wrapping_shr((one + 48) as u32));
+            check!(T, VAL1.wrapping_shr((one + 60) as u32));
+            check!(T, VAL1.wrapping_shr((one + 62) as u32));
+            check!(T, VAL1.wrapping_shr((one + 63) as u32));
+            check!(T, VAL1.wrapping_shr((one + 80) as u32));
 
-    assert_eq!(var5 * (argc + 1) as u128, 306473039779416054947240652212547879168);
+            check!(Option<T>, VAL1.checked_shr(one as u32 - 1));
+            check!(Option<T>, VAL1.checked_shr(one as u32));
+            check!(Option<T>, VAL1.checked_shr((one + 32) as u32));
+            check!(Option<T>, VAL1.checked_shr((one + 48) as u32));
+            check!(Option<T>, VAL1.checked_shr((one + 60) as u32));
+            check!(Option<T>, VAL1.checked_shr((one + 62) as u32));
+            check!(Option<T>, VAL1.checked_shr((one + 63) as u32));
+            check!(Option<T>, VAL1.checked_shr((one + 80) as u32));
 
-    // Division.
-    assert_eq!(var / (argc + 1) as u128, 67108928);
-    assert_eq!(var / (argc + 2) as u128, 44739285);
+            // Casts
+            check!(u64, (VAL1 >> one as T) as u64);
 
-    assert_eq!(var2 / (argc + 1) as u128, 5237686366698995776);
-    assert_eq!(var2 / (argc + 2) as u128, 3491790911132663850);
+            // Addition.
+            check!(T, VAL1 + one as T);
+            check!(T, VAL2 + one as T);
+            check!(T, VAL2 + (VAL2 + one as T) as T);
+            check!(T, VAL3 + one as T);
 
-    assert_eq!(var3 / (argc + 1) as u128, 96618259944854013736810163053136969792);
-    assert_eq!(var3 / (argc + 2) as u128, 64412173296569342491206775368757979861);
-    assert_eq!(var3 / (argc as u128 + var4), 1);
-    assert_eq!(var3 / (argc as u128 + var2), 18446744073709551615);
+            check!(Option<T>, VAL1.checked_add(one as T));
+            check!(Option<T>, VAL2.checked_add(one as T));
+            check!(Option<T>, VAL2.checked_add((VAL2 + one as T) as T));
+            check!(Option<T>, VAL3.checked_add(T::MAX));
+            check!(Option<T>, VAL3.checked_add(T::MIN));
 
-    assert_eq!(var4 / (argc + 1) as u128, 61618259944854013736810163053136969792);
-    assert_eq!(var4 / (argc + 2) as u128, 41078839963236009157873442035424646528);
+            check!(T, VAL1.wrapping_add(one as T));
+            check!(T, VAL2.wrapping_add(one as T));
+            check!(T, VAL2.wrapping_add((VAL2 + one as T) as T));
+            check!(T, VAL3.wrapping_add(T::MAX));
+            check!(T, VAL3.wrapping_add(T::MIN));
+
+            check!((T, bool), VAL1.overflowing_add(one as T));
+            check!((T, bool), VAL2.overflowing_add(one as T));
+            check!((T, bool), VAL2.overflowing_add((VAL2 + one as T) as T));
+            check!((T, bool), VAL3.overflowing_add(T::MAX));
+            check!((T, bool), VAL3.overflowing_add(T::MIN));
+
+            check!(T, VAL1.saturating_add(one as T));
+            check!(T, VAL2.saturating_add(one as T));
+            check!(T, VAL2.saturating_add((VAL2 + one as T) as T));
+            check!(T, VAL3.saturating_add(T::MAX));
+            check!(T, VAL3.saturating_add(T::MIN));
+
+            // Subtraction
+            check!(T, VAL1 - one as T);
+            check!(T, VAL2 - one as T);
+            check!(T, VAL3 - one as T);
+
+            check!(Option<T>, VAL1.checked_sub(one as T));
+            check!(Option<T>, VAL2.checked_sub(one as T));
+            check!(Option<T>, VAL2.checked_sub((VAL2 + one as T) as T));
+            check!(Option<T>, VAL3.checked_sub(T::MAX));
+            check!(Option<T>, VAL3.checked_sub(T::MIN));
+
+            check!(T, VAL1.wrapping_sub(one as T));
+            check!(T, VAL2.wrapping_sub(one as T));
+            check!(T, VAL2.wrapping_sub((VAL2 + one as T) as T));
+            check!(T, VAL3.wrapping_sub(T::MAX));
+            check!(T, VAL3.wrapping_sub(T::MIN));
+
+            check!((T, bool), VAL1.overflowing_sub(one as T));
+            check!((T, bool), VAL2.overflowing_sub(one as T));
+            check!((T, bool), VAL2.overflowing_sub((VAL2 + one as T) as T));
+            check!((T, bool), VAL3.overflowing_sub(T::MAX));
+            check!((T, bool), VAL3.overflowing_sub(T::MIN));
+
+            check!(T, VAL1.saturating_sub(one as T));
+            check!(T, VAL2.saturating_sub(one as T));
+            check!(T, VAL2.saturating_sub((VAL2 + one as T) as T));
+            check!(T, VAL3.saturating_sub(T::MAX));
+            check!(T, VAL3.saturating_sub(T::MIN));
+
+            // Multiplication
+            check!(T, VAL1 * (one + 1) as T);
+            check!(T, VAL1 * (one as T + VAL2));
+            check!(T, VAL2 * (one + 1) as T);
+            check!(T, VAL2 * (one as T + VAL2));
+            check!(T, VAL3 * one as T);
+            check!(T, VAL4 * (one + 1) as T);
+            check!(T, VAL5 * (one + 1) as T);
+
+            check!(Option<T>, VAL1.checked_mul((one + 1) as T));
+            check!(Option<T>, VAL1.checked_mul((one as T + VAL2)));
+            check!(Option<T>, VAL3.checked_mul(VAL3));
+            check!(Option<T>, VAL4.checked_mul((one + 1) as T));
+            check!(Option<T>, VAL5.checked_mul((one + 1) as T));
+
+            check!(T, VAL1.wrapping_mul((one + 1) as T));
+            check!(T, VAL1.wrapping_mul((one as T + VAL2)));
+            check!(T, VAL3.wrapping_mul(VAL3));
+            check!(T, VAL4.wrapping_mul((one + 1) as T));
+            check!(T, VAL5.wrapping_mul((one + 1) as T));
+
+            check!((T, bool), VAL1.overflowing_mul((one + 1) as T));
+            check!((T, bool), VAL1.overflowing_mul((one as T + VAL2)));
+            check!((T, bool), VAL3.overflowing_mul(VAL3));
+            check!((T, bool), VAL4.overflowing_mul((one + 1) as T));
+            check!((T, bool), VAL5.overflowing_mul((one + 1) as T));
+
+            check!(T, VAL1.saturating_mul((one + 1) as T));
+            check!(T, VAL1.saturating_mul((one as T + VAL2)));
+            check!(T, VAL3.saturating_mul(VAL3));
+            check!(T, VAL4.saturating_mul((one + 1) as T));
+            check!(T, VAL5.saturating_mul((one + 1) as T));
+
+            // Division.
+            check!(T, VAL1 / (one + 1) as T);
+            check!(T, VAL1 / (one + 2) as T);
+
+            check!(T, VAL2 / (one + 1) as T);
+            check!(T, VAL2 / (one + 2) as T);
+
+            check!(T, VAL3 / (one + 1) as T);
+            check!(T, VAL3 / (one + 2) as T);
+            check!(T, VAL3 / (one as T + VAL4));
+            check!(T, VAL3 / (one as T + VAL2));
+
+            check!(T, VAL4 / (one + 1) as T);
+            check!(T, VAL4 / (one + 2) as T);
+
+            check!(Option<T>, VAL1.checked_div((one + 1) as T));
+            check!(Option<T>, VAL1.checked_div((one as T + VAL2)));
+            check!(Option<T>, VAL3.checked_div(VAL3));
+            check!(Option<T>, VAL4.checked_div((one + 1) as T));
+            check!(Option<T>, VAL5.checked_div((one + 1) as T));
+            check!(Option<T>, (T::MIN).checked_div((0 as T).wrapping_sub(one as T)));
+            check!(Option<T>, VAL5.checked_div((one - 1) as T)); // var5 / 0
+
+            check!(T, VAL1.wrapping_div((one + 1) as T));
+            check!(T, VAL1.wrapping_div((one as T + VAL2)));
+            check!(T, VAL3.wrapping_div(VAL3));
+            check!(T, VAL4.wrapping_div((one + 1) as T));
+            check!(T, VAL5.wrapping_div((one + 1) as T));
+            check!(T, (T::MIN).wrapping_div((0 as T).wrapping_sub(one as T)));
+
+            check!((T, bool), VAL1.overflowing_div((one + 1) as T));
+            check!((T, bool), VAL1.overflowing_div((one as T + VAL2)));
+            check!((T, bool), VAL3.overflowing_div(VAL3));
+            check!((T, bool), VAL4.overflowing_div((one + 1) as T));
+            check!((T, bool), VAL5.overflowing_div((one + 1) as T));
+            check!((T, bool), (T::MIN).overflowing_div((0 as T).wrapping_sub(one as T)));
+
+            check!(T, VAL1.saturating_div((one + 1) as T));
+            check!(T, VAL1.saturating_div((one as T + VAL2)));
+            check!(T, VAL3.saturating_div(VAL3));
+            check!(T, VAL4.saturating_div((one + 1) as T));
+            check!(T, VAL5.saturating_div((one + 1) as T));
+            check!(T, (T::MIN).saturating_div((0 as T).wrapping_sub(one as T)));
+        };
+    }
+
+    {
+        type T = u32;
+        const VAL1: T = 14162_u32;
+        const VAL2: T = 14556_u32;
+        const VAL3: T = 323656954_u32;
+        const VAL4: T = 2023651954_u32;
+        const VAL5: T = 1323651954_u32;
+        check_ops32!();
+    }
+
+    {
+        type T = i32;
+        const VAL1: T = 13456_i32;
+        const VAL2: T = 10475_i32;
+        const VAL3: T = 923653954_i32;
+        const VAL4: T = 993198738_i32;
+        const VAL5: T = 1023653954_i32;
+        check_ops32!();
+    }
+
+    {
+        type T = u64;
+        const VAL1: T = 134217856_u64;
+        const VAL2: T = 104753732_u64;
+        const VAL3: T = 12323651988970863954_u64;
+        const VAL4: T = 7323651988970863954_u64;
+        const VAL5: T = 8323651988970863954_u64;
+        check_ops64!();
+    }
+
+    {
+        type T = i64;
+        const VAL1: T = 134217856_i64;
+        const VAL2: T = 104753732_i64;
+        const VAL3: T = 6323651988970863954_i64;
+        const VAL4: T = 2323651988970863954_i64;
+        const VAL5: T = 3323651988970863954_i64;
+        check_ops64!();
+    }
+
+    {
+        type T = u128;
+        const VAL1: T = 134217856_u128;
+        const VAL2: T = 10475372733397991552_u128;
+        const VAL3: T = 193236519889708027473620326106273939584_u128;
+        const VAL4: T = 123236519889708027473620326106273939584_u128;
+        const VAL5: T = 153236519889708027473620326106273939584_u128;
+        check_ops128!();
+    }
+    {
+        type T = i128;
+        const VAL1: T = 134217856_i128;
+        const VAL2: T = 10475372733397991552_i128;
+        const VAL3: T = 83236519889708027473620326106273939584_i128;
+        const VAL4: T = 63236519889708027473620326106273939584_i128;
+        const VAL5: T = 73236519889708027473620326106273939584_i128;
+        check_ops128!();
+    }
 
     0
 }

From 00677e51596f89325551e99c2d30bd39ae381e0c Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Fri, 1 Apr 2022 13:54:51 +0900
Subject: [PATCH 061/997] Implement `saturating_{add, sub}` for non-native
 integer types

Updates their unsigned code paths to use the `Builder::gcc_` methods
that automatically lower non-native integer operations to native ones.

Also updates the signed code path of `saturating_add` to support non-
native integer types. That of `saturating_sub` already supports this,
so no major changes have been made.
---
 src/intrinsic/mod.rs | 92 +++++++++++++++++++++++++++-----------------
 1 file changed, 57 insertions(+), 35 deletions(-)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 08e584a46f33..84395e967636 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -967,34 +967,55 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     fn saturating_add(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>, signed: bool, width: u64) -> RValue<'gcc> {
-        let func = self.current_func.borrow().expect("func");
-
+        let result_type = lhs.get_type();
         if signed {
-            // Algorithm from: https://stackoverflow.com/a/56531252/389119
-            let after_block = func.new_block("after");
-            let func_name =
-                match width {
-                    8 => "__builtin_add_overflow",
-                    16 => "__builtin_add_overflow",
-                    32 => "__builtin_sadd_overflow",
-                    64 => "__builtin_saddll_overflow",
-                    128 => "__builtin_add_overflow",
-                    _ => unreachable!(),
-                };
-            let overflow_func = self.context.get_builtin_function(func_name);
-            let result_type = lhs.get_type();
+            // Based on algorithm from: https://stackoverflow.com/a/56531252/389119
+            let func = self.current_func.borrow().expect("func");
             let res = func.new_local(None, result_type, "saturating_sum");
-            let overflow = self.overflow_call(overflow_func, &[lhs, rhs, res.get_address(None)], None);
+            let supports_native_type = self.is_native_int_type(result_type);
+            let overflow =
+                if supports_native_type {
+                    let func_name =
+                        match width {
+                            8 => "__builtin_add_overflow",
+                            16 => "__builtin_add_overflow",
+                            32 => "__builtin_sadd_overflow",
+                            64 => "__builtin_saddll_overflow",
+                            128 => "__builtin_add_overflow",
+                            _ => unreachable!(),
+                        };
+                    let overflow_func = self.context.get_builtin_function(func_name);
+                    self.overflow_call(overflow_func, &[lhs, rhs, res.get_address(None)], None)
+                }
+                else {
+                    let func_name =
+                        match width {
+                            128 => "__rust_i128_addo",
+                            _ => unreachable!(),
+                        };
+                    let param_a = self.context.new_parameter(None, result_type, "a");
+                    let param_b = self.context.new_parameter(None, result_type, "b");
+                    let result_field = self.context.new_field(None, result_type, "result");
+                    let overflow_field = self.context.new_field(None, self.bool_type, "overflow");
+                    let return_type = self.context.new_struct_type(None, "result_overflow", &[result_field, overflow_field]);
+                    let func = self.context.new_function(None, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false);
+                    let result = self.context.new_call(None, func, &[lhs, rhs]);
+                    let overflow = result.access_field(None, overflow_field);
+                    let int_result = result.access_field(None, result_field);
+                    self.llbb().add_assignment(None, res, int_result);
+                    overflow
+                };
 
             let then_block = func.new_block("then");
+            let after_block = func.new_block("after");
 
-            let unsigned_type = self.context.new_int_type(width as i32 / 8, false);
-            let shifted = self.context.new_cast(None, lhs, unsigned_type) >> self.context.new_rvalue_from_int(unsigned_type, width as i32 - 1);
-            let uint_max = self.context.new_unary_op(None, UnaryOp::BitwiseNegate, unsigned_type,
-                self.context.new_rvalue_from_int(unsigned_type, 0)
-            );
-            let int_max = uint_max >> self.context.new_rvalue_one(unsigned_type);
-            then_block.add_assignment(None, res, self.context.new_cast(None, shifted + int_max, result_type));
+            // Return `result_type`'s maximum or minimum value on overflow
+            // NOTE: convert the type to unsigned to have an unsigned shift.
+            let unsigned_type = result_type.to_unsigned(&self.cx);
+            let shifted = self.gcc_lshr(self.gcc_int_cast(lhs, unsigned_type), self.gcc_int(unsigned_type, width as i64 - 1));
+            let uint_max = self.gcc_not(self.gcc_int(unsigned_type, 0));
+            let int_max = self.gcc_lshr(uint_max, self.gcc_int(unsigned_type, 1));
+            then_block.add_assignment(None, res, self.gcc_int_cast(self.gcc_add(shifted, int_max), result_type));
             then_block.end_with_jump(None, after_block);
 
             self.llbb().end_with_conditional(None, overflow, then_block, after_block);
@@ -1006,20 +1027,20 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             res.to_rvalue()
         }
         else {
+            assert!(!signed);
             // Algorithm from: http://locklessinc.com/articles/sat_arithmetic/
-            let res = lhs + rhs;
-            let res_type = res.get_type();
-            let cond = self.context.new_comparison(None, ComparisonOp::LessThan, res, lhs);
-            let value = self.context.new_unary_op(None, UnaryOp::Minus, res_type, self.context.new_cast(None, cond, res_type));
-            res | value
+            let res = self.gcc_add(lhs, rhs);
+            let cond = self.gcc_icmp(IntPredicate::IntULT, res, lhs);
+            let value = self.gcc_neg(self.gcc_int_cast(cond, result_type));
+            self.gcc_or(res, value)
         }
     }
 
     // Algorithm from: https://locklessinc.com/articles/sat_arithmetic/
     fn saturating_sub(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>, signed: bool, width: u64) -> RValue<'gcc> {
+        let result_type = lhs.get_type();
         if signed {
-            // Also based on algorithm from: https://stackoverflow.com/a/56531252/389119
-            let result_type = lhs.get_type();
+            // Based on algorithm from: https://stackoverflow.com/a/56531252/389119
             let func = self.current_func.borrow().expect("func");
             let res = func.new_local(None, result_type, "saturating_diff");
             let supports_native_type = self.is_native_int_type(result_type);
@@ -1059,6 +1080,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let then_block = func.new_block("then");
             let after_block = func.new_block("after");
 
+            // Return `result_type`'s maximum or minimum value on overflow
             // NOTE: convert the type to unsigned to have an unsigned shift.
             let unsigned_type = result_type.to_unsigned(&self.cx);
             let shifted = self.gcc_lshr(self.gcc_int_cast(lhs, unsigned_type), self.gcc_int(unsigned_type, width as i64 - 1));
@@ -1076,11 +1098,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             res.to_rvalue()
         }
         else {
-            let res = lhs - rhs;
-            let comparison = self.context.new_comparison(None, ComparisonOp::LessThanEquals, res, lhs);
-            let comparison = self.context.new_cast(None, comparison, lhs.get_type());
-            let unary_op = self.context.new_unary_op(None, UnaryOp::Minus, comparison.get_type(), comparison);
-            self.and(res, unary_op)
+            assert!(!signed);
+            let res = self.gcc_sub(lhs, rhs);
+            let comparison = self.gcc_icmp(IntPredicate::IntULE, res, lhs);
+            let value = self.gcc_neg(self.gcc_int_cast(comparison, result_type));
+            self.gcc_and(res, value)
         }
     }
 }

From 5061e3ad163a75e81ed7b69e2113b5db135bc51a Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Wed, 6 Apr 2022 21:49:54 +0900
Subject: [PATCH 062/997] Remove redundant assertions

---
 src/intrinsic/mod.rs | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 84395e967636..d885bc8bf1fe 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1027,7 +1027,6 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             res.to_rvalue()
         }
         else {
-            assert!(!signed);
             // Algorithm from: http://locklessinc.com/articles/sat_arithmetic/
             let res = self.gcc_add(lhs, rhs);
             let cond = self.gcc_icmp(IntPredicate::IntULT, res, lhs);
@@ -1098,7 +1097,6 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             res.to_rvalue()
         }
         else {
-            assert!(!signed);
             let res = self.gcc_sub(lhs, rhs);
             let comparison = self.gcc_icmp(IntPredicate::IntULE, res, lhs);
             let value = self.gcc_neg(self.gcc_int_cast(comparison, result_type));

From a7a09d556ab222f3b24d76defe1d2b2f99aa2c6f Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Wed, 6 Apr 2022 22:07:02 +0900
Subject: [PATCH 063/997] Wrap numbers with `black_box` in-line, remove `one`

---
 tests/run/int.rs | 323 +++++++++++++++++++++++------------------------
 1 file changed, 159 insertions(+), 164 deletions(-)

diff --git a/tests/run/int.rs b/tests/run/int.rs
index 8d2db9096f73..2b90e4ae8d82 100644
--- a/tests/run/int.rs
+++ b/tests/run/int.rs
@@ -3,7 +3,7 @@
 // Run-time:
 //   status: 0
 
-#![feature(bench_black_box, core_intrinsics, start)]
+#![feature(bench_black_box, const_black_box, core_intrinsics, start)]
 
 #![no_std]
 
@@ -18,23 +18,18 @@ fn panic_handler(_: &core::panic::PanicInfo) -> ! {
 
 #[start]
 fn main(_argc: isize, _argv: *const *const u8) -> isize {
-    let one: isize = core::hint::black_box(1);
+    use core::hint::black_box;
 
     macro_rules! check {
         ($ty:ty, $expr:expr) => {
             {
-                const EXPECTED: $ty = {
-                    #[allow(non_upper_case_globals)]
-                    #[allow(dead_code)]
-                    const one: isize = 1;
-                    $expr
-                };
+                const EXPECTED: $ty = $expr;
                 assert_eq!($expr, EXPECTED);
             }
         };
     }
 
-    check!(u32, (2220326408_u32 + one as u32) >> (32 - 6));
+    check!(u32, (2220326408_u32 + black_box(1)) >> (32 - 6));
 
     /// Generate `check!` tests for integer types at least as wide as 128 bits.
     macro_rules! check_ops128 {
@@ -42,15 +37,15 @@ fn main(_argc: isize, _argv: *const *const u8) -> isize {
             check_ops64!();
 
             // Shifts.
-            check!(T, VAL1 << (one + 63) as T);
-            check!(T, VAL1 << (one + 80) as T);
-            check!(T, VAL3 << (one + 62) as T);
-            check!(T, VAL3 << (one + 63) as T);
+            check!(T, VAL1 << black_box(64));
+            check!(T, VAL1 << black_box(81));
+            check!(T, VAL3 << black_box(63));
+            check!(T, VAL3 << black_box(64));
 
-            check!(T, VAL1 >> (one + 63) as T);
-            check!(T, VAL2 >> (one + 63) as T);
-            check!(T, VAL3 >> (one + 63) as T);
-            check!(T, VAL3 >> (one + 80) as T);
+            check!(T, VAL1 >> black_box(64));
+            check!(T, VAL2 >> black_box(64));
+            check!(T, VAL3 >> black_box(64));
+            check!(T, VAL3 >> black_box(81));
         };
     }
 
@@ -60,29 +55,29 @@ fn main(_argc: isize, _argv: *const *const u8) -> isize {
             check_ops32!();
 
             // Shifts.
-            check!(T, VAL2 << (one + 32) as T);
-            check!(T, VAL2 << (one + 48) as T);
-            check!(T, VAL2 << (one + 60) as T);
-            check!(T, VAL2 << (one + 62) as T);
+            check!(T, VAL2 << black_box(33));
+            check!(T, VAL2 << black_box(49));
+            check!(T, VAL2 << black_box(61));
+            check!(T, VAL2 << black_box(63));
 
-            check!(T, VAL3 << (one + 32) as T);
-            check!(T, VAL3 << (one + 48) as T);
-            check!(T, VAL3 << (one + 60) as T);
+            check!(T, VAL3 << black_box(33));
+            check!(T, VAL3 << black_box(49));
+            check!(T, VAL3 << black_box(61));
 
-            check!(T, VAL1 >> (one + 32) as T);
-            check!(T, VAL1 >> (one + 48) as T);
-            check!(T, VAL1 >> (one + 60) as T);
-            check!(T, VAL1 >> (one + 62) as T);
+            check!(T, VAL1 >> black_box(33));
+            check!(T, VAL1 >> black_box(49));
+            check!(T, VAL1 >> black_box(61));
+            check!(T, VAL1 >> black_box(63));
 
-            check!(T, VAL2 >> (one + 32) as T);
-            check!(T, VAL2 >> (one + 48) as T);
-            check!(T, VAL2 >> (one + 60) as T);
-            check!(T, VAL2 >> (one + 62) as T);
+            check!(T, VAL2 >> black_box(33));
+            check!(T, VAL2 >> black_box(49));
+            check!(T, VAL2 >> black_box(61));
+            check!(T, VAL2 >> black_box(63));
 
-            check!(T, VAL3 >> (one + 32) as T);
-            check!(T, VAL3 >> (one + 48) as T);
-            check!(T, VAL3 >> (one + 60) as T);
-            check!(T, VAL3 >> (one + 62) as T);
+            check!(T, VAL3 >> black_box(33));
+            check!(T, VAL3 >> black_box(49));
+            check!(T, VAL3 >> black_box(61));
+            check!(T, VAL3 >> black_box(63));
         };
     }
 
@@ -90,195 +85,195 @@ fn main(_argc: isize, _argv: *const *const u8) -> isize {
     macro_rules! check_ops32 {
         () => {
             // Shifts.
-            check!(T, VAL2 << one as T);
-            check!(T, VAL2 << (one as T - 1));
+            check!(T, VAL2 << black_box(1));
+            check!(T, VAL2 << black_box(0));
 
-            check!(T, VAL3 << one as T);
-            check!(T, VAL3 << (one as T - 1));
+            check!(T, VAL3 << black_box(1));
+            check!(T, VAL3 << black_box(0));
 
-            check!(T, VAL1.wrapping_shl(one as u32 - 1));
-            check!(T, VAL1.wrapping_shl(one as u32));
-            check!(T, VAL1.wrapping_shl((one + 32) as u32));
-            check!(T, VAL1.wrapping_shl((one + 48) as u32));
-            check!(T, VAL1.wrapping_shl((one + 60) as u32));
-            check!(T, VAL1.wrapping_shl((one + 62) as u32));
-            check!(T, VAL1.wrapping_shl((one + 63) as u32));
-            check!(T, VAL1.wrapping_shl((one + 80) as u32));
+            check!(T, VAL1.wrapping_shl(black_box(0)));
+            check!(T, VAL1.wrapping_shl(black_box(1)));
+            check!(T, VAL1.wrapping_shl(black_box(33)));
+            check!(T, VAL1.wrapping_shl(black_box(49)));
+            check!(T, VAL1.wrapping_shl(black_box(61)));
+            check!(T, VAL1.wrapping_shl(black_box(63)));
+            check!(T, VAL1.wrapping_shl(black_box(64)));
+            check!(T, VAL1.wrapping_shl(black_box(81)));
 
-            check!(Option<T>, VAL1.checked_shl(one as u32 - 1));
-            check!(Option<T>, VAL1.checked_shl(one as u32));
-            check!(Option<T>, VAL1.checked_shl((one + 32) as u32));
-            check!(Option<T>, VAL1.checked_shl((one + 48) as u32));
-            check!(Option<T>, VAL1.checked_shl((one + 60) as u32));
-            check!(Option<T>, VAL1.checked_shl((one + 62) as u32));
-            check!(Option<T>, VAL1.checked_shl((one + 63) as u32));
-            check!(Option<T>, VAL1.checked_shl((one + 80) as u32));
+            check!(Option<T>, VAL1.checked_shl(black_box(0)));
+            check!(Option<T>, VAL1.checked_shl(black_box(1)));
+            check!(Option<T>, VAL1.checked_shl(black_box(33)));
+            check!(Option<T>, VAL1.checked_shl(black_box(49)));
+            check!(Option<T>, VAL1.checked_shl(black_box(61)));
+            check!(Option<T>, VAL1.checked_shl(black_box(63)));
+            check!(Option<T>, VAL1.checked_shl(black_box(64)));
+            check!(Option<T>, VAL1.checked_shl(black_box(81)));
 
-            check!(T, VAL1 >> (one as T - 1));
-            check!(T, VAL1 >> one as T);
+            check!(T, VAL1 >> black_box(0));
+            check!(T, VAL1 >> black_box(1));
 
-            check!(T, VAL2 >> one as T);
-            check!(T, VAL2 >> (one as T - 1));
+            check!(T, VAL2 >> black_box(1));
+            check!(T, VAL2 >> black_box(0));
 
-            check!(T, VAL3 >> (one as T - 1));
-            check!(T, VAL3 >> one as T);
+            check!(T, VAL3 >> black_box(0));
+            check!(T, VAL3 >> black_box(1));
 
-            check!(T, VAL1.wrapping_shr(one as u32 - 1));
-            check!(T, VAL1.wrapping_shr(one as u32));
-            check!(T, VAL1.wrapping_shr((one + 32) as u32));
-            check!(T, VAL1.wrapping_shr((one + 48) as u32));
-            check!(T, VAL1.wrapping_shr((one + 60) as u32));
-            check!(T, VAL1.wrapping_shr((one + 62) as u32));
-            check!(T, VAL1.wrapping_shr((one + 63) as u32));
-            check!(T, VAL1.wrapping_shr((one + 80) as u32));
+            check!(T, VAL1.wrapping_shr(black_box(0)));
+            check!(T, VAL1.wrapping_shr(black_box(1)));
+            check!(T, VAL1.wrapping_shr(black_box(33)));
+            check!(T, VAL1.wrapping_shr(black_box(49)));
+            check!(T, VAL1.wrapping_shr(black_box(61)));
+            check!(T, VAL1.wrapping_shr(black_box(63)));
+            check!(T, VAL1.wrapping_shr(black_box(64)));
+            check!(T, VAL1.wrapping_shr(black_box(81)));
 
-            check!(Option<T>, VAL1.checked_shr(one as u32 - 1));
-            check!(Option<T>, VAL1.checked_shr(one as u32));
-            check!(Option<T>, VAL1.checked_shr((one + 32) as u32));
-            check!(Option<T>, VAL1.checked_shr((one + 48) as u32));
-            check!(Option<T>, VAL1.checked_shr((one + 60) as u32));
-            check!(Option<T>, VAL1.checked_shr((one + 62) as u32));
-            check!(Option<T>, VAL1.checked_shr((one + 63) as u32));
-            check!(Option<T>, VAL1.checked_shr((one + 80) as u32));
+            check!(Option<T>, VAL1.checked_shr(black_box(0)));
+            check!(Option<T>, VAL1.checked_shr(black_box(1)));
+            check!(Option<T>, VAL1.checked_shr(black_box(33)));
+            check!(Option<T>, VAL1.checked_shr(black_box(49)));
+            check!(Option<T>, VAL1.checked_shr(black_box(61)));
+            check!(Option<T>, VAL1.checked_shr(black_box(63)));
+            check!(Option<T>, VAL1.checked_shr(black_box(64)));
+            check!(Option<T>, VAL1.checked_shr(black_box(81)));
 
             // Casts
-            check!(u64, (VAL1 >> one as T) as u64);
+            check!(u64, (VAL1 >> black_box(1)) as u64);
 
             // Addition.
-            check!(T, VAL1 + one as T);
-            check!(T, VAL2 + one as T);
-            check!(T, VAL2 + (VAL2 + one as T) as T);
-            check!(T, VAL3 + one as T);
+            check!(T, VAL1 + black_box(1));
+            check!(T, VAL2 + black_box(1));
+            check!(T, VAL2 + (VAL2 + black_box(1)));
+            check!(T, VAL3 + black_box(1));
 
-            check!(Option<T>, VAL1.checked_add(one as T));
-            check!(Option<T>, VAL2.checked_add(one as T));
-            check!(Option<T>, VAL2.checked_add((VAL2 + one as T) as T));
+            check!(Option<T>, VAL1.checked_add(black_box(1)));
+            check!(Option<T>, VAL2.checked_add(black_box(1)));
+            check!(Option<T>, VAL2.checked_add(VAL2 + black_box(1)));
             check!(Option<T>, VAL3.checked_add(T::MAX));
             check!(Option<T>, VAL3.checked_add(T::MIN));
 
-            check!(T, VAL1.wrapping_add(one as T));
-            check!(T, VAL2.wrapping_add(one as T));
-            check!(T, VAL2.wrapping_add((VAL2 + one as T) as T));
+            check!(T, VAL1.wrapping_add(black_box(1)));
+            check!(T, VAL2.wrapping_add(black_box(1)));
+            check!(T, VAL2.wrapping_add(VAL2 + black_box(1)));
             check!(T, VAL3.wrapping_add(T::MAX));
             check!(T, VAL3.wrapping_add(T::MIN));
 
-            check!((T, bool), VAL1.overflowing_add(one as T));
-            check!((T, bool), VAL2.overflowing_add(one as T));
-            check!((T, bool), VAL2.overflowing_add((VAL2 + one as T) as T));
+            check!((T, bool), VAL1.overflowing_add(black_box(1)));
+            check!((T, bool), VAL2.overflowing_add(black_box(1)));
+            check!((T, bool), VAL2.overflowing_add(VAL2 + black_box(1)));
             check!((T, bool), VAL3.overflowing_add(T::MAX));
             check!((T, bool), VAL3.overflowing_add(T::MIN));
 
-            check!(T, VAL1.saturating_add(one as T));
-            check!(T, VAL2.saturating_add(one as T));
-            check!(T, VAL2.saturating_add((VAL2 + one as T) as T));
+            check!(T, VAL1.saturating_add(black_box(1)));
+            check!(T, VAL2.saturating_add(black_box(1)));
+            check!(T, VAL2.saturating_add(VAL2 + black_box(1)));
             check!(T, VAL3.saturating_add(T::MAX));
             check!(T, VAL3.saturating_add(T::MIN));
 
             // Subtraction
-            check!(T, VAL1 - one as T);
-            check!(T, VAL2 - one as T);
-            check!(T, VAL3 - one as T);
+            check!(T, VAL1 - black_box(1));
+            check!(T, VAL2 - black_box(1));
+            check!(T, VAL3 - black_box(1));
 
-            check!(Option<T>, VAL1.checked_sub(one as T));
-            check!(Option<T>, VAL2.checked_sub(one as T));
-            check!(Option<T>, VAL2.checked_sub((VAL2 + one as T) as T));
+            check!(Option<T>, VAL1.checked_sub(black_box(1)));
+            check!(Option<T>, VAL2.checked_sub(black_box(1)));
+            check!(Option<T>, VAL2.checked_sub(VAL2 + black_box(1)));
             check!(Option<T>, VAL3.checked_sub(T::MAX));
             check!(Option<T>, VAL3.checked_sub(T::MIN));
 
-            check!(T, VAL1.wrapping_sub(one as T));
-            check!(T, VAL2.wrapping_sub(one as T));
-            check!(T, VAL2.wrapping_sub((VAL2 + one as T) as T));
+            check!(T, VAL1.wrapping_sub(black_box(1)));
+            check!(T, VAL2.wrapping_sub(black_box(1)));
+            check!(T, VAL2.wrapping_sub(VAL2 + black_box(1)));
             check!(T, VAL3.wrapping_sub(T::MAX));
             check!(T, VAL3.wrapping_sub(T::MIN));
 
-            check!((T, bool), VAL1.overflowing_sub(one as T));
-            check!((T, bool), VAL2.overflowing_sub(one as T));
-            check!((T, bool), VAL2.overflowing_sub((VAL2 + one as T) as T));
+            check!((T, bool), VAL1.overflowing_sub(black_box(1)));
+            check!((T, bool), VAL2.overflowing_sub(black_box(1)));
+            check!((T, bool), VAL2.overflowing_sub(VAL2 + black_box(1)));
             check!((T, bool), VAL3.overflowing_sub(T::MAX));
             check!((T, bool), VAL3.overflowing_sub(T::MIN));
 
-            check!(T, VAL1.saturating_sub(one as T));
-            check!(T, VAL2.saturating_sub(one as T));
-            check!(T, VAL2.saturating_sub((VAL2 + one as T) as T));
+            check!(T, VAL1.saturating_sub(black_box(1)));
+            check!(T, VAL2.saturating_sub(black_box(1)));
+            check!(T, VAL2.saturating_sub(VAL2 + black_box(1)));
             check!(T, VAL3.saturating_sub(T::MAX));
             check!(T, VAL3.saturating_sub(T::MIN));
 
             // Multiplication
-            check!(T, VAL1 * (one + 1) as T);
-            check!(T, VAL1 * (one as T + VAL2));
-            check!(T, VAL2 * (one + 1) as T);
-            check!(T, VAL2 * (one as T + VAL2));
-            check!(T, VAL3 * one as T);
-            check!(T, VAL4 * (one + 1) as T);
-            check!(T, VAL5 * (one + 1) as T);
+            check!(T, VAL1 * black_box(2));
+            check!(T, VAL1 * (black_box(1) + VAL2));
+            check!(T, VAL2 * black_box(2));
+            check!(T, VAL2 * (black_box(1) + VAL2));
+            check!(T, VAL3 * black_box(1));
+            check!(T, VAL4 * black_box(2));
+            check!(T, VAL5 * black_box(2));
 
-            check!(Option<T>, VAL1.checked_mul((one + 1) as T));
-            check!(Option<T>, VAL1.checked_mul((one as T + VAL2)));
+            check!(Option<T>, VAL1.checked_mul(black_box(2)));
+            check!(Option<T>, VAL1.checked_mul(black_box(1) + VAL2));
             check!(Option<T>, VAL3.checked_mul(VAL3));
-            check!(Option<T>, VAL4.checked_mul((one + 1) as T));
-            check!(Option<T>, VAL5.checked_mul((one + 1) as T));
+            check!(Option<T>, VAL4.checked_mul(black_box(2)));
+            check!(Option<T>, VAL5.checked_mul(black_box(2)));
 
-            check!(T, VAL1.wrapping_mul((one + 1) as T));
-            check!(T, VAL1.wrapping_mul((one as T + VAL2)));
+            check!(T, VAL1.wrapping_mul(black_box(2)));
+            check!(T, VAL1.wrapping_mul((black_box(1) + VAL2)));
             check!(T, VAL3.wrapping_mul(VAL3));
-            check!(T, VAL4.wrapping_mul((one + 1) as T));
-            check!(T, VAL5.wrapping_mul((one + 1) as T));
+            check!(T, VAL4.wrapping_mul(black_box(2)));
+            check!(T, VAL5.wrapping_mul(black_box(2)));
 
-            check!((T, bool), VAL1.overflowing_mul((one + 1) as T));
-            check!((T, bool), VAL1.overflowing_mul((one as T + VAL2)));
+            check!((T, bool), VAL1.overflowing_mul(black_box(2)));
+            check!((T, bool), VAL1.overflowing_mul(black_box(1) + VAL2));
             check!((T, bool), VAL3.overflowing_mul(VAL3));
-            check!((T, bool), VAL4.overflowing_mul((one + 1) as T));
-            check!((T, bool), VAL5.overflowing_mul((one + 1) as T));
+            check!((T, bool), VAL4.overflowing_mul(black_box(2)));
+            check!((T, bool), VAL5.overflowing_mul(black_box(2)));
 
-            check!(T, VAL1.saturating_mul((one + 1) as T));
-            check!(T, VAL1.saturating_mul((one as T + VAL2)));
+            check!(T, VAL1.saturating_mul(black_box(2)));
+            check!(T, VAL1.saturating_mul(black_box(1) + VAL2));
             check!(T, VAL3.saturating_mul(VAL3));
-            check!(T, VAL4.saturating_mul((one + 1) as T));
-            check!(T, VAL5.saturating_mul((one + 1) as T));
+            check!(T, VAL4.saturating_mul(black_box(2)));
+            check!(T, VAL5.saturating_mul(black_box(2)));
 
             // Division.
-            check!(T, VAL1 / (one + 1) as T);
-            check!(T, VAL1 / (one + 2) as T);
+            check!(T, VAL1 / black_box(2));
+            check!(T, VAL1 / black_box(3));
 
-            check!(T, VAL2 / (one + 1) as T);
-            check!(T, VAL2 / (one + 2) as T);
+            check!(T, VAL2 / black_box(2));
+            check!(T, VAL2 / black_box(3));
 
-            check!(T, VAL3 / (one + 1) as T);
-            check!(T, VAL3 / (one + 2) as T);
-            check!(T, VAL3 / (one as T + VAL4));
-            check!(T, VAL3 / (one as T + VAL2));
+            check!(T, VAL3 / black_box(2));
+            check!(T, VAL3 / black_box(3));
+            check!(T, VAL3 / (black_box(1) + VAL4));
+            check!(T, VAL3 / (black_box(1) + VAL2));
 
-            check!(T, VAL4 / (one + 1) as T);
-            check!(T, VAL4 / (one + 2) as T);
+            check!(T, VAL4 / black_box(2));
+            check!(T, VAL4 / black_box(3));
 
-            check!(Option<T>, VAL1.checked_div((one + 1) as T));
-            check!(Option<T>, VAL1.checked_div((one as T + VAL2)));
+            check!(Option<T>, VAL1.checked_div(black_box(2)));
+            check!(Option<T>, VAL1.checked_div(black_box(1) + VAL2));
             check!(Option<T>, VAL3.checked_div(VAL3));
-            check!(Option<T>, VAL4.checked_div((one + 1) as T));
-            check!(Option<T>, VAL5.checked_div((one + 1) as T));
-            check!(Option<T>, (T::MIN).checked_div((0 as T).wrapping_sub(one as T)));
-            check!(Option<T>, VAL5.checked_div((one - 1) as T)); // var5 / 0
+            check!(Option<T>, VAL4.checked_div(black_box(2)));
+            check!(Option<T>, VAL5.checked_div(black_box(2)));
+            check!(Option<T>, (T::MIN).checked_div(black_box(0 as T).wrapping_sub(1)));
+            check!(Option<T>, VAL5.checked_div(black_box(0))); // var5 / 0
 
-            check!(T, VAL1.wrapping_div((one + 1) as T));
-            check!(T, VAL1.wrapping_div((one as T + VAL2)));
+            check!(T, VAL1.wrapping_div(black_box(2)));
+            check!(T, VAL1.wrapping_div(black_box(1) + VAL2));
             check!(T, VAL3.wrapping_div(VAL3));
-            check!(T, VAL4.wrapping_div((one + 1) as T));
-            check!(T, VAL5.wrapping_div((one + 1) as T));
-            check!(T, (T::MIN).wrapping_div((0 as T).wrapping_sub(one as T)));
+            check!(T, VAL4.wrapping_div(black_box(2)));
+            check!(T, VAL5.wrapping_div(black_box(2)));
+            check!(T, (T::MIN).wrapping_div(black_box(0 as T).wrapping_sub(1)));
 
-            check!((T, bool), VAL1.overflowing_div((one + 1) as T));
-            check!((T, bool), VAL1.overflowing_div((one as T + VAL2)));
+            check!((T, bool), VAL1.overflowing_div(black_box(2)));
+            check!((T, bool), VAL1.overflowing_div(black_box(1) + VAL2));
             check!((T, bool), VAL3.overflowing_div(VAL3));
-            check!((T, bool), VAL4.overflowing_div((one + 1) as T));
-            check!((T, bool), VAL5.overflowing_div((one + 1) as T));
-            check!((T, bool), (T::MIN).overflowing_div((0 as T).wrapping_sub(one as T)));
+            check!((T, bool), VAL4.overflowing_div(black_box(2)));
+            check!((T, bool), VAL5.overflowing_div(black_box(2)));
+            check!((T, bool), (T::MIN).overflowing_div(black_box(0 as T).wrapping_sub(1)));
 
-            check!(T, VAL1.saturating_div((one + 1) as T));
-            check!(T, VAL1.saturating_div((one as T + VAL2)));
+            check!(T, VAL1.saturating_div(black_box(2)));
+            check!(T, VAL1.saturating_div((black_box(1) + VAL2)));
             check!(T, VAL3.saturating_div(VAL3));
-            check!(T, VAL4.saturating_div((one + 1) as T));
-            check!(T, VAL5.saturating_div((one + 1) as T));
-            check!(T, (T::MIN).saturating_div((0 as T).wrapping_sub(one as T)));
+            check!(T, VAL4.saturating_div(black_box(2)));
+            check!(T, VAL5.saturating_div(black_box(2)));
+            check!(T, (T::MIN).saturating_div((0 as T).wrapping_sub(black_box(1))));
         };
     }
 

From 4d7de811991aef0484ac0c31fcdfef9a97d91fbb Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 13 Apr 2022 17:51:39 -0400
Subject: [PATCH 064/997] Add feature for future libgccjit 12 release

---
 .github/workflows/ci.yml |  24 +++++++-
 Cargo.lock               |   4 +-
 Cargo.toml               |   4 ++
 build.sh                 |  23 ++++---
 example/std_example.rs   |  14 ++++-
 src/builder.rs           |  15 +++++
 src/intrinsic/llvm.rs    |  14 +++++
 src/intrinsic/simd.rs    |   4 ++
 src/lib.rs               |  11 +++-
 src/type_.rs             |   2 +
 src/type_of.rs           |   2 +
 test.sh                  | 129 ++++++++++++++++++++++++++-------------
 12 files changed, 186 insertions(+), 60 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 337837c40bfb..8ebdabe82610 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -11,7 +11,7 @@ jobs:
     strategy:
       fail-fast: false
       matrix:
-        libgccjit_version: ["libgccjit.so", "libgccjit_without_int128.so"]
+        libgccjit_version: ["libgccjit.so", "libgccjit_without_int128.so", "libgccjit12.so"]
 
     steps:
     - uses: actions/checkout@v2
@@ -78,12 +78,21 @@ jobs:
         key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
 
     - name: Build
+      if: matrix.libgccjit_version != 'libgccjit12.so'
       run: |
         ./prepare_build.sh
         ./build.sh
         cargo test
         ./clean_all.sh
 
+    - name: Build
+      if: matrix.libgccjit_version == 'libgccjit12.so'
+      run: |
+        ./prepare_build.sh
+        ./build.sh --no-default-features
+        cargo test --no-default-features
+        ./clean_all.sh
+
     - name: Prepare dependencies
       run: |
         git config --global user.email "user@example.com"
@@ -98,6 +107,7 @@ jobs:
         args: --release
 
     - name: Test
+      if: matrix.libgccjit_version != 'libgccjit12.so'
       run: |
         # Enable backtraces for easier debugging
         export RUST_BACKTRACE=1
@@ -107,3 +117,15 @@ jobs:
         export RUN_RUNS=2
 
         ./test.sh --release
+
+    - name: Test
+      if: matrix.libgccjit_version == 'libgccjit12.so'
+      run: |
+        # Enable backtraces for easier debugging
+        export RUST_BACKTRACE=1
+
+        # Reduce amount of benchmark runs as they are slow
+        export COMPILE_RUNS=2
+        export RUN_RUNS=2
+
+        ./test.sh --release --no-default-features
diff --git a/Cargo.lock b/Cargo.lock
index f66c98742695..c5315e2392ef 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#f24e1f49d99430941d8a747275b41c9a7930e049"
+source = "git+https://github.com/antoyo/gccjit.rs#6c2af0cf733a26740f01a7c679afc20431165a54"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#f24e1f49d99430941d8a747275b41c9a7930e049"
+source = "git+https://github.com/antoyo/gccjit.rs#6c2af0cf733a26740f01a7c679afc20431165a54"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 21f0bfbf69d7..86278b469830 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -13,6 +13,10 @@ name = "lang_tests"
 path = "tests/lib.rs"
 harness = false
 
+[features]
+default = ["master"]
+master = ["gccjit/master"]
+
 [dependencies]
 gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
 
diff --git a/build.sh b/build.sh
index 230ab7b6d42b..44eb240715c7 100755
--- a/build.sh
+++ b/build.sh
@@ -6,6 +6,8 @@ set -e
 codegen_channel=debug
 sysroot_channel=debug
 
+flags=
+
 while [[ $# -gt 0 ]]; do
     case $1 in
         --release)
@@ -16,6 +18,15 @@ while [[ $# -gt 0 ]]; do
             sysroot_channel=release
             shift
             ;;
+        --no-default-features)
+            flags="$flags --no-default-features"
+            shift
+            ;;
+        --features)
+            shift
+            flags="$flags --features $1"
+            shift
+            ;;
         *)
             echo "Unknown option $1"
             exit 1
@@ -33,21 +44,13 @@ fi
 export LD_LIBRARY_PATH="$GCC_PATH"
 export LIBRARY_PATH="$GCC_PATH"
 
-features=
-
-if [[ "$1" == "--features" ]]; then
-    shift
-    features="--features $1"
-    shift
-fi
-
 if [[ "$codegen_channel" == "release" ]]; then
     export CHANNEL='release'
-    CARGO_INCREMENTAL=1 cargo rustc --release $features
+    CARGO_INCREMENTAL=1 cargo rustc --release $flags
 else
     echo $LD_LIBRARY_PATH
     export CHANNEL='debug'
-    cargo rustc $features
+    cargo rustc $flags
 fi
 
 source config.sh
diff --git a/example/std_example.rs b/example/std_example.rs
index 722666f7e166..31069058aea3 100644
--- a/example/std_example.rs
+++ b/example/std_example.rs
@@ -93,6 +93,7 @@ fn main() {
 
     println!("{:?}", std::intrinsics::caller_location());
 
+    #[cfg(feature="master")]
     unsafe {
         test_simd();
     }
@@ -104,6 +105,7 @@ fn main() {
     println!("End");
 }
 
+#[cfg(feature="master")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_simd() {
     let x = _mm_setzero_si128();
@@ -131,6 +133,7 @@ unsafe fn test_simd() {
     assert_eq!(mask1, 1);
 }
 
+#[cfg(feature="master")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_slli_si128() {
     #[rustfmt::skip]
@@ -158,6 +161,7 @@ unsafe fn test_mm_slli_si128() {
 }
 
 
+#[cfg(feature="master")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_movemask_epi8() {
     #[rustfmt::skip]
@@ -171,6 +175,7 @@ unsafe fn test_mm_movemask_epi8() {
     assert_eq!(r, 0b10100100_00100101);
 }
 
+#[cfg(feature="master")]
 #[target_feature(enable = "avx2")]
 unsafe fn test_mm256_movemask_epi8() {
     let a = _mm256_set1_epi8(-1);
@@ -179,6 +184,7 @@ unsafe fn test_mm256_movemask_epi8() {
     assert_eq!(r, e);
 }
 
+#[cfg(feature="master")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_add_epi8() {
     let a = _mm_setr_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
@@ -194,6 +200,7 @@ unsafe fn test_mm_add_epi8() {
     assert_eq_m128i(r, e);
 }
 
+#[cfg(feature="master")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_add_pd() {
     let a = _mm_setr_pd(1.0, 2.0);
@@ -202,12 +209,14 @@ unsafe fn test_mm_add_pd() {
     assert_eq_m128d(r, _mm_setr_pd(6.0, 12.0));
 }
 
+#[cfg(feature="master")]
 fn assert_eq_m128i(x: std::arch::x86_64::__m128i, y: std::arch::x86_64::__m128i) {
     unsafe {
         assert_eq!(std::mem::transmute::<_, [u8; 16]>(x), std::mem::transmute::<_, [u8; 16]>(y));
     }
 }
 
+#[cfg(feature="master")]
 #[target_feature(enable = "sse2")]
 pub unsafe fn assert_eq_m128d(a: __m128d, b: __m128d) {
     if _mm_movemask_pd(_mm_cmpeq_pd(a, b)) != 0b11 {
@@ -215,12 +224,14 @@ pub unsafe fn assert_eq_m128d(a: __m128d, b: __m128d) {
     }
 }
 
+#[cfg(feature="master")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_cvtsi128_si64() {
     let r = _mm_cvtsi128_si64(std::mem::transmute::<[i64; 2], _>([5, 0]));
     assert_eq!(r, 5);
 }
 
+#[cfg(feature="master")]
 #[target_feature(enable = "sse4.1")]
 unsafe fn test_mm_cvtepi8_epi16() {
     let a = _mm_set1_epi8(10);
@@ -233,6 +244,7 @@ unsafe fn test_mm_cvtepi8_epi16() {
     assert_eq_m128i(r, e);
 }
 
+#[cfg(feature="master")]
 #[target_feature(enable = "sse4.1")]
 unsafe fn test_mm_extract_epi8() {
     #[rustfmt::skip]
@@ -246,7 +258,7 @@ unsafe fn test_mm_extract_epi8() {
     assert_eq!(r2, 3);
 }
 
-#[cfg(target_arch = "x86_64")]
+#[cfg(all(feature="master", target_arch = "x86_64"))]
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_insert_epi16() {
     let a = _mm_setr_epi16(0, 1, 2, 3, 4, 5, 6, 7);
diff --git a/src/builder.rs b/src/builder.rs
index a4616d8673ec..6f24abaea8ae 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -301,6 +301,15 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             result.to_rvalue()
         }
         else {
+            #[cfg(not(feature="master"))]
+            if gcc_func.get_param_count() == 0 {
+                // FIXME(antoyo): As a temporary workaround for unsupported LLVM intrinsics.
+                self.block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &[]));
+            }
+            else {
+                self.block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
+            }
+            #[cfg(feature="master")]
             self.block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
             // Return dummy value when not having return value.
             let result = current_func.new_local(None, self.isize_type, "dummyValueThatShouldNeverBeUsed");
@@ -1287,6 +1296,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 }
 
 impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
+    #[cfg(feature="master")]
     pub fn shuffle_vector(&mut self, v1: RValue<'gcc>, v2: RValue<'gcc>, mask: RValue<'gcc>) -> RValue<'gcc> {
         let struct_type = mask.get_type().is_struct().expect("mask of struct type");
 
@@ -1361,6 +1371,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             result
         }
     }
+
+    #[cfg(not(feature="master"))]
+    pub fn shuffle_vector(&mut self, _v1: RValue<'gcc>, _v2: RValue<'gcc>, _mask: RValue<'gcc>) -> RValue<'gcc> {
+        unimplemented!();
+    }
 }
 
 impl<'a, 'gcc, 'tcx> StaticBuilderMethods for Builder<'a, 'gcc, 'tcx> {
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index bc8e99428eda..4b41b0ba6e78 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -2,6 +2,20 @@ use gccjit::Function;
 
 use crate::context::CodegenCx;
 
+#[cfg(not(feature="master"))]
+pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
+    match name {
+        "llvm.x86.xgetbv" => {
+            let gcc_name = "__builtin_trap";
+            let func = cx.context.get_builtin_function(gcc_name);
+            cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
+            return func;
+        },
+        _ => unimplemented!("unsupported LLVM intrinsic {}", name),
+    }
+}
+
+#[cfg(feature="master")]
 pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
     let gcc_name = match name {
         "llvm.x86.xgetbv" => "__builtin_ia32_xgetbv",
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index b8c6038896d8..f1167bc3a3b6 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -154,6 +154,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         ));
     }
 
+    #[cfg(feature="master")]
     if name == sym::simd_insert {
         require!(
             in_elem == arg_tys[2],
@@ -213,6 +214,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
         return Ok(bx.context.new_bitcast(None, result, vector.get_type()));
     }
+
+    #[cfg(feature="master")]
     if name == sym::simd_extract {
         require!(
             ret_ty == in_elem,
@@ -503,6 +506,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         simd_neg: Int => neg, Float => fneg;
     }
 
+    #[cfg(feature="master")]
     if name == sym::simd_saturating_add || name == sym::simd_saturating_sub {
         let lhs = args[0].immediate();
         let rhs = args[1].immediate();
diff --git a/src/lib.rs b/src/lib.rs
index a8029f0425a4..31d3a5ab299a 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -299,10 +299,17 @@ pub fn target_features(sess: &Session) -> Vec<Symbol> {
                 if sess.is_nightly_build() || gate.is_none() { Some(feature) } else { None }
             },
         )
-        .filter(|feature| {
+        .filter(|_feature| {
             // TODO(antoyo): implement a way to get enabled feature in libgccjit.
             // Probably using the equivalent of __builtin_cpu_supports.
-            feature.contains("sse") || feature.contains("avx")
+            #[cfg(feature="master")]
+            {
+                _feature.contains("sse") || _feature.contains("avx")
+            }
+            #[cfg(not(feature="master"))]
+            {
+                false
+            }
             /*
                adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512gfni,
                avx512ifma, avx512pf, avx512vaes, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpclmulqdq,
diff --git a/src/type_.rs b/src/type_.rs
index d65649ecfa3e..db2b5ea8ab20 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -125,6 +125,7 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
             .collect();
         let typ = self.context.new_struct_type(None, "struct", &fields).as_type();
         if packed {
+            #[cfg(feature="master")]
             typ.set_packed();
         }
         self.struct_types.borrow_mut().insert(types, typ);
@@ -217,6 +218,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             .collect();
         typ.set_fields(None, &fields);
         if packed {
+            #[cfg(feature="master")]
             typ.as_type().set_packed();
         }
     }
diff --git a/src/type_of.rs b/src/type_of.rs
index c6d6f91a7429..adcae9c16c37 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -25,6 +25,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         }
     }
 
+    #[cfg(feature="master")]
     pub fn type_int_from_ty(&self, t: ty::IntTy) -> Type<'gcc> {
         match t {
             ty::IntTy::Isize => self.type_isize(),
@@ -36,6 +37,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         }
     }
 
+    #[cfg(feature="master")]
     pub fn type_uint_from_ty(&self, t: ty::UintTy) -> Type<'gcc> {
         match t {
             ty::UintTy::Usize => self.type_isize(),
diff --git a/test.sh b/test.sh
index 1d2fbd0a24cf..5a8e4f9c0ad5 100755
--- a/test.sh
+++ b/test.sh
@@ -14,22 +14,79 @@ fi
 export LD_LIBRARY_PATH="$GCC_PATH"
 export LIBRARY_PATH="$GCC_PATH"
 
-features=
+flags=
+gcc_master_branch=1
+channel="debug"
+func=all
 
-if [[ "$1" == "--features" ]]; then
-    shift
-    features="--features $1"
-    shift
-fi
+while [[ $# -gt 0 ]]; do
+    case $1 in
+        --release)
+            codegen_channel=release
+            shift
+            ;;
+        --release-sysroot)
+            sysroot_channel=release
+            shift
+            ;;
+        --no-default-features)
+            gcc_master_branch=0
+            flags="$flags --no-default-features"
+            shift
+            ;;
+        --features)
+            shift
+            flags="$flags --features $1"
+            shift
+            ;;
+        --release)
+            channel="release"
+            shift
+            ;;
+        "--test-rustc")
+            func=test_rustc
+            shift
+            ;;
 
-if [[ "$1" == "--release" ]]; then
+        "--test-libcore")
+            func=test_libcore
+            shift
+            ;;
+
+        "--clean-ui-tests")
+            func=clean_ui_tests
+            shift
+            ;;
+
+        "--std-tests")
+            func=std_tests
+            shift
+            ;;
+
+        "--extended-tests")
+            func=extended_sysroot_tests
+            shift
+            ;;
+
+        "--build-sysroot")
+            func=build_sysroot
+            shift
+            ;;
+        *)
+            echo "Unknown option $1"
+            exit 1
+            ;;
+    esac
+done
+
+if [[ $channel == "release" ]]; then
     export CHANNEL='release'
-    CARGO_INCREMENTAL=1 cargo rustc --release $features
+    CARGO_INCREMENTAL=1 cargo rustc --release $flags
     shift
 else
     echo $LD_LIBRARY_PATH
     export CHANNEL='debug'
-    cargo rustc $features
+    cargo rustc $flags
 fi
 
 if [[ "$1" == "--build" ]]; then
@@ -78,7 +135,11 @@ function std_tests() {
     $RUN_WRAPPER ./target/out/dst_field_align || (echo $?; false)
 
     echo "[AOT] std_example"
-    $RUSTC example/std_example.rs --crate-type bin --target $TARGET_TRIPLE
+    std_flags="--cfg feature=\"master\""
+    if (( $gcc_master_branch == 0 )); then
+        std_flags=""
+    fi
+    $RUSTC example/std_example.rs --crate-type bin --target $TARGET_TRIPLE $std_flags
     $RUN_WRAPPER ./target/out/std_example --target $TARGET_TRIPLE
 
     echo "[AOT] subslice-patterns-const-eval"
@@ -122,6 +183,10 @@ function test_libcore() {
 #hyperfine --runs ${RUN_RUNS:-10} ./target/out/mod_bench{,_inline} ./target/out/mod_bench_llvm_*
 
 function extended_sysroot_tests() {
+    if (( $gcc_master_branch == 0 )); then
+        return
+    fi
+
     pushd rand
     cargo clean
     echo "[TEST] rust-random/rand"
@@ -208,38 +273,14 @@ function clean_ui_tests() {
     find rust/build/x86_64-unknown-linux-gnu/test/ui/ -name stamp -exec rm -rf {} \;
 }
 
-case $1 in
-    "--test-rustc")
-        test_rustc
-        ;;
+function all() {
+    clean
+    mini_tests
+    build_sysroot
+    std_tests
+    test_libcore
+    extended_sysroot_tests
+    test_rustc
+}
 
-    "--test-libcore")
-        test_libcore
-        ;;
-
-    "--clean-ui-tests")
-        clean_ui_tests
-        ;;
-
-    "--std-tests")
-        std_tests
-        ;;
-
-    "--extended-tests")
-        extended_sysroot_tests
-        ;;
-
-    "--build-sysroot")
-        build_sysroot
-        ;;
-
-    *)
-        clean
-        mini_tests
-        build_sysroot
-        std_tests
-        test_libcore
-        extended_sysroot_tests
-        test_rustc
-        ;;
-esac
+$func

From 330127599aae8e75c233bd360b472487ce127bac Mon Sep 17 00:00:00 2001
From: MikaelUrankar <mikael.urankar@gmail.com>
Date: Thu, 14 Apr 2022 14:12:06 +0200
Subject: [PATCH 065/997] Don't assume /bin/bash is available on every system.

---
 build.sh                             | 2 +-
 build_sysroot/build_sysroot.sh       | 2 +-
 build_sysroot/prepare_sysroot_src.sh | 2 +-
 cargo.sh                             | 2 +-
 clean_all.sh                         | 2 +-
 prepare.sh                           | 2 +-
 prepare_build.sh                     | 2 +-
 rustup.sh                            | 2 +-
 test.sh                              | 2 +-
 9 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/build.sh b/build.sh
index 230ab7b6d42b..ba48c2e41fa3 100755
--- a/build.sh
+++ b/build.sh
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 
 #set -x
 set -e
diff --git a/build_sysroot/build_sysroot.sh b/build_sysroot/build_sysroot.sh
index a965ca971a07..f293192a099d 100755
--- a/build_sysroot/build_sysroot.sh
+++ b/build_sysroot/build_sysroot.sh
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 
 # Requires the CHANNEL env var to be set to `debug` or `release.`
 
diff --git a/build_sysroot/prepare_sysroot_src.sh b/build_sysroot/prepare_sysroot_src.sh
index 071e7ed1f85d..56768bbf1d01 100755
--- a/build_sysroot/prepare_sysroot_src.sh
+++ b/build_sysroot/prepare_sysroot_src.sh
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 set -e
 cd $(dirname "$0")
 
diff --git a/cargo.sh b/cargo.sh
index e95564dccda0..16e49b20423c 100755
--- a/cargo.sh
+++ b/cargo.sh
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 
 if [ -z $CHANNEL ]; then
 export CHANNEL='debug'
diff --git a/clean_all.sh b/clean_all.sh
index a77d1486fe28..efa6454f26de 100755
--- a/clean_all.sh
+++ b/clean_all.sh
@@ -1,4 +1,4 @@
-#!/bin/bash --verbose
+#!/usr/bin/env bash --verbose
 set -e
 
 rm -rf target/ build_sysroot/{sysroot/,sysroot_src/,target/,Cargo.lock} perf.data{,.old}
diff --git a/prepare.sh b/prepare.sh
index d39f43f5e1b3..42bbc4f23b93 100755
--- a/prepare.sh
+++ b/prepare.sh
@@ -1,4 +1,4 @@
-#!/bin/bash --verbose
+#!/usr/bin/env bash --verbose
 set -e
 
 source prepare_build.sh
diff --git a/prepare_build.sh b/prepare_build.sh
index 3896775a0b9d..7bd13ef0175b 100755
--- a/prepare_build.sh
+++ b/prepare_build.sh
@@ -1,4 +1,4 @@
-#!/bin/bash --verbose
+#!/usr/bin/env bash --verbose
 set -e
 
 ./build_sysroot/prepare_sysroot_src.sh
diff --git a/rustup.sh b/rustup.sh
index 01ce5bb78be0..7edb5558604a 100755
--- a/rustup.sh
+++ b/rustup.sh
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 
 set -e
 
diff --git a/test.sh b/test.sh
index 1d2fbd0a24cf..5c5978b0bfc5 100755
--- a/test.sh
+++ b/test.sh
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 
 # TODO(antoyo): rewrite to cargo-make (or just) or something like that to only rebuild the sysroot when needed?
 

From f92779512dd3c4613a7e6d0c9eb578ba5a0ec91c Mon Sep 17 00:00:00 2001
From: Mikael Urankar <mikael@FreeBSD.org>
Date: Fri, 15 Apr 2022 09:58:09 +0200
Subject: [PATCH 066/997] Add set -v as we can't pass command line argument
 with /usr/bin/env

---
 clean_all.sh     | 3 ++-
 prepare.sh       | 3 ++-
 prepare_build.sh | 3 ++-
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/clean_all.sh b/clean_all.sh
index efa6454f26de..782bd3e5058c 100755
--- a/clean_all.sh
+++ b/clean_all.sh
@@ -1,5 +1,6 @@
-#!/usr/bin/env bash --verbose
+#!/usr/bin/env bash
 set -e
+set -v
 
 rm -rf target/ build_sysroot/{sysroot/,sysroot_src/,target/,Cargo.lock} perf.data{,.old}
 rm -rf regex/ simple-raytracer/
diff --git a/prepare.sh b/prepare.sh
index 42bbc4f23b93..e98f24c6e128 100755
--- a/prepare.sh
+++ b/prepare.sh
@@ -1,5 +1,6 @@
-#!/usr/bin/env bash --verbose
+#!/usr/bin/env bash
 set -e
+set -v
 
 source prepare_build.sh
 
diff --git a/prepare_build.sh b/prepare_build.sh
index 7bd13ef0175b..8194360da4ba 100755
--- a/prepare_build.sh
+++ b/prepare_build.sh
@@ -1,4 +1,5 @@
-#!/usr/bin/env bash --verbose
+#!/usr/bin/env bash
 set -e
+set -v
 
 ./build_sysroot/prepare_sysroot_src.sh

From 889c402258e063c6ad4db9a340cbd78f8e5d668c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 23 Apr 2022 10:48:12 -0400
Subject: [PATCH 067/997] Fix test.sh --build

---
 test.sh | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/test.sh b/test.sh
index 897649e7adb7..8b390f95a4b9 100755
--- a/test.sh
+++ b/test.sh
@@ -18,6 +18,7 @@ flags=
 gcc_master_branch=1
 channel="debug"
 func=all
+build_only=0
 
 while [[ $# -gt 0 ]]; do
     case $1 in
@@ -72,6 +73,10 @@ while [[ $# -gt 0 ]]; do
             func=build_sysroot
             shift
             ;;
+        "--build")
+            build_only=1
+            shift
+            ;;
         *)
             echo "Unknown option $1"
             exit 1
@@ -89,7 +94,7 @@ else
     cargo rustc $flags
 fi
 
-if [[ "$1" == "--build" ]]; then
+if (( $build_only == 1 )); then
     exit
 fi
 

From a0742bdd063192bb6af37d9bdcac4a43b09fb975 Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Sun, 27 Mar 2022 20:48:33 +0900
Subject: [PATCH 068/997] Don't emit `.intel_syntax` for non-x86 targets

---
 src/asm.rs | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 8a74c4c07e0c..2d41fe425844 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -116,7 +116,6 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         let asm_arch = self.tcx.sess.asm_arch.unwrap();
         let is_x86 = matches!(asm_arch, InlineAsmArch::X86 | InlineAsmArch::X86_64);
         let att_dialect = is_x86 && options.contains(InlineAsmOptions::ATT_SYNTAX);
-        let intel_dialect = is_x86 && !options.contains(InlineAsmOptions::ATT_SYNTAX);
 
         // GCC index of an output operand equals its position in the array
         let mut outputs = vec![];
@@ -354,7 +353,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         // 3. Build the template string
 
         let mut template_str = String::with_capacity(estimate_template_length(template, constants_len, att_dialect));
-        if !intel_dialect {
+        if att_dialect {
             template_str.push_str(ATT_SYNTAX_INS);
         }
 
@@ -436,7 +435,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
             }
         }
 
-        if !intel_dialect {
+        if att_dialect {
             template_str.push_str(INTEL_SYNTAX_INS);
         }
 
@@ -661,8 +660,8 @@ impl<'gcc, 'tcx> AsmMethods for CodegenCx<'gcc, 'tcx> {
         let asm_arch = self.tcx.sess.asm_arch.unwrap();
 
         // Default to Intel syntax on x86
-        let intel_syntax = matches!(asm_arch, InlineAsmArch::X86 | InlineAsmArch::X86_64)
-            && !options.contains(InlineAsmOptions::ATT_SYNTAX);
+        let att_dialect = matches!(asm_arch, InlineAsmArch::X86 | InlineAsmArch::X86_64)
+            && options.contains(InlineAsmOptions::ATT_SYNTAX);
 
         // Build the template string
         let mut template_str = String::new();
@@ -696,11 +695,11 @@ impl<'gcc, 'tcx> AsmMethods for CodegenCx<'gcc, 'tcx> {
         }
 
         let template_str =
-            if intel_syntax {
-                format!("{}\n\t.intel_syntax noprefix", template_str)
+            if att_dialect {
+                format!(".att_syntax\n\t{}\n\t.intel_syntax noprefix", template_str)
             }
             else {
-                format!(".att_syntax\n\t{}\n\t.intel_syntax noprefix", template_str)
+                template_str
             };
         // NOTE: seems like gcc will put the asm in the wrong section, so set it to .text manually.
         let template_str = format!(".pushsection .text\n{}\n.popsection", template_str);

From 5d25b8fc45f66cdd1b19c87cce38eda86141dcf8 Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Sat, 23 Apr 2022 23:39:27 +0900
Subject: [PATCH 069/997] Convert inline assembly `sym` operands into GCC input
 operands

This commit updates `<Builder as AsmBuilderMethods>::codegen_inline_asm`
to convert `sym` operands into `"X" (&func_or_static)` input operands
to indicate the dependency on the referenced symbols and prevent them
from being eliminated.

We follow the suit of the LLVM codegen with a mixture of its differing
techniques for `asm!` and `global_asm!`. The codegen module generates
input operands for the `sym` operands (as in `asm!` in cg_llvm).
However, the codegen module replaces all placeholders with mangled
symbol names before passing the assembly template string to the backend
(as in `global_asm!` in cg_llvm), which means these input operands are
never referenced in the final assembly template string.

Unlike the LLVM codegen, the input operand constraint must be `X`
instead of `s`. If the `s` constraint is used, GCC will employ checks to
make sure that the operand can really be represented by a simple
symbolic constant, thus rejecting symbols requiring GOT, etc. to
resolve. Such checks are unnecessary for Rust `sym` as it's up to
programmers to handle such complex cases, e.g., by manually appending
GOT addressing modifiers to the substituted symbol names.

Using the `X` constraint doesn't seem to generate any extra code, so
this will not compromise the property of naked functions.
---
 src/asm.rs | 22 +++++++++++++++++++---
 1 file changed, 19 insertions(+), 3 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 8a74c4c07e0c..053a6c595e97 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -13,6 +13,7 @@ use std::borrow::Cow;
 use crate::builder::Builder;
 use crate::context::CodegenCx;
 use crate::type_of::LayoutGccExt;
+use crate::callee::get_fn;
 
 
 // Rust asm! and GCC Extended Asm semantics differ substantially.
@@ -343,9 +344,24 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     // processed in the previous pass
                 }
 
-                InlineAsmOperandRef::Const { .. }
-                | InlineAsmOperandRef::SymFn { .. }
-                | InlineAsmOperandRef::SymStatic { .. } => {
+                InlineAsmOperandRef::SymFn { instance } => {
+                    inputs.push(AsmInOperand {
+                        constraint: "X".into(),
+                        rust_idx,
+                        val: self.cx.rvalue_as_function(get_fn(self.cx, instance))
+                            .get_address(None),
+                    });
+                }
+
+                InlineAsmOperandRef::SymStatic { def_id } => {
+                    inputs.push(AsmInOperand {
+                        constraint: "X".into(),
+                        rust_idx,
+                        val: self.cx.get_static(def_id).get_address(None),
+                    });
+                }
+
+                InlineAsmOperandRef::Const { .. } => {
                     // processed in the previous pass
                 }
             }

From 63ffdfdd1776afa2e82bbd3d2ff8ff7b7f0d5b67 Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Mon, 25 Apr 2022 21:19:42 +0900
Subject: [PATCH 070/997] Add compilation tests with optimization enabled

Introduces a new variant of `tests/lib.rs` that compiles the source
files in `tests/run` with `-Copt-level=3`.
---
 Cargo.toml                             |  8 ++++++--
 tests/{lib.rs => lang_tests_common.rs} | 20 +++++++++++++++++++-
 tests/lang_tests_debug.rs              |  5 +++++
 tests/lang_tests_release.rs            |  5 +++++
 tests/run/int_overflow.rs              | 17 ++++++++++++++---
 5 files changed, 49 insertions(+), 6 deletions(-)
 rename tests/{lib.rs => lang_tests_common.rs} (77%)
 create mode 100644 tests/lang_tests_debug.rs
 create mode 100644 tests/lang_tests_release.rs

diff --git a/Cargo.toml b/Cargo.toml
index 86278b469830..211d19a8dc89 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -9,8 +9,12 @@ license = "MIT OR Apache-2.0"
 crate-type = ["dylib"]
 
 [[test]]
-name = "lang_tests"
-path = "tests/lib.rs"
+name = "lang_tests_debug"
+path = "tests/lang_tests_debug.rs"
+harness = false
+[[test]]
+name = "lang_tests_release"
+path = "tests/lang_tests_release.rs"
 harness = false
 
 [features]
diff --git a/tests/lib.rs b/tests/lang_tests_common.rs
similarity index 77%
rename from tests/lib.rs
rename to tests/lang_tests_common.rs
index 8ee35b30bc8e..8e378177e245 100644
--- a/tests/lib.rs
+++ b/tests/lang_tests_common.rs
@@ -1,3 +1,4 @@
+//! The common code for `tests/lang_tests_*.rs`
 use std::{
     env::{self, current_dir},
     path::PathBuf,
@@ -7,7 +8,15 @@ use std::{
 use lang_tester::LangTester;
 use tempfile::TempDir;
 
-fn main() {
+/// Controls the compile options (e.g., optimization level) used to compile
+/// test code.
+#[allow(dead_code)] // Each test crate picks one variant
+pub enum Profile {
+    Debug,
+    Release,
+}
+
+pub fn main_inner(profile: Profile) {
     let tempdir = TempDir::new().expect("temp dir");
     let current_dir = current_dir().expect("current dir");
     let current_dir = current_dir.to_str().expect("current dir").to_string();
@@ -42,6 +51,15 @@ fn main() {
                 "-o", exe.to_str().expect("to_str"),
                 path.to_str().expect("to_str"),
             ]);
+            match profile {
+                Profile::Debug => {}
+                Profile::Release => {
+                    compiler.args(&[
+                        "-C", "opt-level=3",
+                        "-C", "lto=no",
+                    ]);
+                }
+            }
             // Test command 2: run `tempdir/x`.
             let runtime = Command::new(exe);
             vec![("Compiler", compiler), ("Run-time", runtime)]
diff --git a/tests/lang_tests_debug.rs b/tests/lang_tests_debug.rs
new file mode 100644
index 000000000000..96bd74883ff0
--- /dev/null
+++ b/tests/lang_tests_debug.rs
@@ -0,0 +1,5 @@
+mod lang_tests_common;
+
+fn main() {
+    lang_tests_common::main_inner(lang_tests_common::Profile::Debug);
+}
diff --git a/tests/lang_tests_release.rs b/tests/lang_tests_release.rs
new file mode 100644
index 000000000000..35d5d60c33ee
--- /dev/null
+++ b/tests/lang_tests_release.rs
@@ -0,0 +1,5 @@
+mod lang_tests_common;
+
+fn main() {
+    lang_tests_common::main_inner(lang_tests_common::Profile::Release);
+}
diff --git a/tests/run/int_overflow.rs b/tests/run/int_overflow.rs
index 6477b8398280..ea2c5add962a 100644
--- a/tests/run/int_overflow.rs
+++ b/tests/run/int_overflow.rs
@@ -1,7 +1,7 @@
 // Compiler:
 //
 // Run-time:
-//   stdout: Panicking
+//   stdout: Success
 //   status: signal
 
 #![allow(unused_attributes)]
@@ -64,7 +64,9 @@ mod intrinsics {
 #[no_mangle]
 pub fn panic(_msg: &str) -> ! {
     unsafe {
-        libc::puts("Panicking\0" as *const str as *const u8);
+        // Panicking is expected iff overflow checking is enabled.
+        #[cfg(debug_assertions)]
+        libc::puts("Success\0" as *const str as *const u8);
         libc::fflush(libc::stdout);
         intrinsics::abort();
     }
@@ -124,6 +126,15 @@ impl Add for isize {
 #[start]
 fn main(mut argc: isize, _argv: *const *const u8) -> isize {
     let int = 9223372036854775807isize;
-    let int = int + argc;
+    let int = int + argc;  // overflow
+
+    // If overflow checking is disabled, we should reach here.
+    #[cfg(not(debug_assertions))]
+    unsafe {
+        libc::puts("Success\0" as *const str as *const u8);
+        libc::fflush(libc::stdout);
+        intrinsics::abort();
+    }
+
     int
 }

From dc8da94d56435f95547ac02cf634dea223668a78 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 29 Apr 2022 23:17:44 -0400
Subject: [PATCH 071/997] Add rustfmt config to disable formatting

---
 .rustfmt.toml | 1 +
 1 file changed, 1 insertion(+)
 create mode 100644 .rustfmt.toml

diff --git a/.rustfmt.toml b/.rustfmt.toml
new file mode 100644
index 000000000000..c7ad93bafe36
--- /dev/null
+++ b/.rustfmt.toml
@@ -0,0 +1 @@
+disable_all_formatting = true

From a225f0a66b83b79e62d679568675adea284bfe21 Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Tue, 3 May 2022 13:53:10 +0900
Subject: [PATCH 072/997] Pass a pointee type to `<Builder as
 BuilderMethods>::load` when calling it ourselves

The parameter name isn't very descriptive, but it actually supposed to
take a pointee type. When calling it ourselves, we've been passing a
*pointer* type, which made it impossible to make any meaningful uses of
this parameter in the method implementation. This commit intends to
rectify that.
---
 src/builder.rs | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 6f24abaea8ae..4cc5eef9dad4 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -652,7 +652,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         unimplemented!();
     }
 
-    fn load(&mut self, _ty: Type<'gcc>, ptr: RValue<'gcc>, _align: Align) -> RValue<'gcc> {
+    fn load(&mut self, _pointee_ty: Type<'gcc>, ptr: RValue<'gcc>, _align: Align) -> RValue<'gcc> {
         // TODO(antoyo): use ty.
         let block = self.llbb();
         let function = block.get_function();
@@ -715,7 +715,11 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
                 OperandValue::Ref(place.llval, Some(llextra), place.align)
             }
             else if place.layout.is_gcc_immediate() {
-                let load = self.load(place.llval.get_type(), place.llval, place.align);
+                let load = self.load(
+                    place.layout.gcc_type(self, false),
+                    place.llval,
+                    place.align,
+                );
                 if let abi::Abi::Scalar(ref scalar) = place.layout.abi {
                     scalar_load_metadata(self, load, scalar);
                 }
@@ -727,7 +731,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
                 let mut load = |i, scalar: &abi::Scalar, align| {
                     let llptr = self.struct_gep(pair_type, place.llval, i as u64);
-                    let load = self.load(llptr.get_type(), llptr, align);
+                    let llty = place.layout.scalar_pair_element_gcc_type(self, i, false);
+                    let load = self.load(llty, llptr, align);
                     scalar_load_metadata(self, load, scalar);
                     if scalar.is_bool() { self.trunc(load, self.type_i1()) } else { load }
                 };
@@ -980,7 +985,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn memmove(&mut self, dst: RValue<'gcc>, dst_align: Align, src: RValue<'gcc>, src_align: Align, size: RValue<'gcc>, flags: MemFlags) {
         if flags.contains(MemFlags::NONTEMPORAL) {
             // HACK(nox): This is inefficient but there is no nontemporal memmove.
-            let val = self.load(src.get_type(), src, src_align);
+            let val = self.load(src.get_type().get_pointee().expect("get_pointee"), src, src_align);
             let ptr = self.pointercast(dst, self.type_ptr_to(self.val_ty(val)));
             self.store_with_flags(val, ptr, dst_align, flags);
             return;

From 351c68367425c4e292394ae5c7137b6e45de0916 Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Mon, 2 May 2022 11:00:07 +0900
Subject: [PATCH 073/997] Use the given pointee type in `<Builder as
 BuilderMethods>::load`

This commit updates this method implementation to return an `RValue` of
the given pointee type.

While this parameter does not seem to have much significance at the
moment, it will likely become important as cg_llvm and cg_ssa migrate to
LLVM opaque pointers and get rid of pointercasts.
---
 src/builder.rs | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 4cc5eef9dad4..9a5cf785a1f5 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -652,18 +652,17 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         unimplemented!();
     }
 
-    fn load(&mut self, _pointee_ty: Type<'gcc>, ptr: RValue<'gcc>, _align: Align) -> RValue<'gcc> {
-        // TODO(antoyo): use ty.
+    fn load(&mut self, pointee_ty: Type<'gcc>, ptr: RValue<'gcc>, _align: Align) -> RValue<'gcc> {
         let block = self.llbb();
         let function = block.get_function();
         // NOTE: instead of returning the dereference here, we have to assign it to a variable in
         // the current basic block. Otherwise, it could be used in another basic block, causing a
         // dereference after a drop, for instance.
         // TODO(antoyo): handle align of the load instruction.
+        let ptr = self.context.new_cast(None, ptr, pointee_ty.make_pointer());
         let deref = ptr.dereference(None).to_rvalue();
-        let value_type = deref.get_type();
         unsafe { RETURN_VALUE_COUNT += 1 };
-        let loaded_value = function.new_local(None, value_type, &format!("loadedValue{}", unsafe { RETURN_VALUE_COUNT }));
+        let loaded_value = function.new_local(None, pointee_ty, &format!("loadedValue{}", unsafe { RETURN_VALUE_COUNT }));
         block.add_assignment(None, loaded_value, deref);
         loaded_value.to_rvalue()
     }

From af9149a1c6b9f69137951fd385d912a8ddbb7c84 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 3 May 2022 18:59:04 +0200
Subject: [PATCH 074/997] Add tool to generate intrinsics conversion
 automatically

---
 .gitignore                   |   1 +
 tools/generate_intrinsics.py | 119 +++++++++++++++++++++++++++++++++++
 2 files changed, 120 insertions(+)
 create mode 100644 tools/generate_intrinsics.py

diff --git a/.gitignore b/.gitignore
index 0b611d05b5c9..ba11981a5e3c 100644
--- a/.gitignore
+++ b/.gitignore
@@ -20,3 +20,4 @@ res
 test-backend
 gcc_path
 benchmarks
+tools/llvm-project
diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
new file mode 100644
index 000000000000..587db3679ef4
--- /dev/null
+++ b/tools/generate_intrinsics.py
@@ -0,0 +1,119 @@
+import os
+import re
+import sys
+import subprocess
+from os import walk
+
+
+LLVM_PATH = llvm_path = os.path.join(
+    os.path.dirname(os.path.abspath(__file__)),
+    "llvm-project",
+)
+
+def run_command(command, cwd=None):
+    p = subprocess.Popen(command, cwd=cwd)
+    if p.wait() != 0:
+        print("command `{}` failed...".format(" ".join(command)))
+        sys.exit(1)
+
+
+def clone_llvm_repository():
+    if os.path.exists(LLVM_PATH):
+        while True:
+            choice = input("There is already a llvm-project folder, do you want to update it? [y/N]")
+            if choice == "" or choice.lower() == "n":
+                print("Skipping repository update.")
+                return
+            elif choice.lower() == "y":
+                print("Updating repository...")
+                run_command(["git", "pull", "origin"], cwd="llvm-project")
+                return
+            else:
+                print("Didn't understand answer...")
+    print("Cloning LLVM repository...")
+    run_command(["git", "clone", "https://github.com/llvm/llvm-project", "--depth", "1", LLVM_PATH])
+
+
+def extract_instrinsics(intrinsics, file):
+    print("Extracting intrinsics from `{}`...".format(file))
+    with open(file, "r", encoding="utf8") as f:
+        content = f.read()
+
+    lines = content.splitlines()
+    pos = 0
+    current_arch = None
+    while pos < len(lines):
+        line = lines[pos].strip()
+        if line.startswith("let TargetPrefix ="):
+            current_arch = line.split('"')[1].strip()
+            if len(current_arch) == 0:
+                current_arch = None
+        elif current_arch is None:
+            pass
+        elif line == "}":
+            current_arch = None
+        elif line.startswith("def "):
+            content = ""
+            while not content.endswith(";") and pos < len(lines):
+                line = lines[pos].split(" // ")[0].strip()
+                content += line
+                pos += 1
+            entries = re.findall('GCCBuiltin<"(\\w+)">', content)
+            if len(entries) > 0:
+                intrinsic = content.split(":")[0].split(" ")[1].strip()
+                intrinsic = intrinsic.split("_")
+                if len(intrinsic) < 2 or intrinsic[0] != "int":
+                    continue
+                intrinsic[0] = "llvm"
+                intrinsic = ".".join(intrinsic)
+                if current_arch not in intrinsics:
+                    intrinsics[current_arch] = []
+                for entry in entries:
+                    intrinsics[current_arch].append('"{}" => "{}",'.format(intrinsic, entry))
+            continue
+        pos += 1
+        continue
+    print("Done!")
+
+
+def update_intrinsics():
+    files = []
+    intrinsics_path = os.path.join(LLVM_PATH, "llvm/include/llvm/IR")
+    for (dirpath, dirnames, filenames) in walk(intrinsics_path):
+        files.extend([os.path.join(intrinsics_path, f) for f in filenames if f.endswith(".td")])
+
+    intrinsics = {}
+    for file in files:
+        extract_instrinsics(intrinsics, file)
+
+    archs = [arch for arch in intrinsics]
+    archs.sort()
+    output_file = os.path.join(
+        os.path.dirname(os.path.abspath(__file__)),
+        "../src/intrinsic/archs.rs",
+    )
+    print("Updating content of `{}`...".format(output_file))
+    with open(output_file, "w", encoding="utf8") as out:
+        out.write("// File generated by `rustc_codegen_gcc/tools/generate_intrinsics.py`\n")
+        out.write("// DO NOT EDIT IT!\n")
+        out.write("match name {\n")
+        for arch in archs:
+            if len(intrinsics[arch]) == 0:
+                continue
+            intrinsics[arch].sort()
+            out.write('    // {}\n'.format(arch))
+            out.write('\n'.join(['    {}'.format(x) for x in intrinsics[arch]]))
+            out.write('\n')
+        out.write('    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),\n')
+        out.write("}\n")
+    print("Done!")
+
+
+def main():
+    # First, we clone the LLVM repository if it's not already here.
+    clone_llvm_repository()
+    update_intrinsics()
+
+
+if __name__ == "__main__":
+    sys.exit(main())

From ed0ba311c5da68edfd132c2e4f40d25f0ec24768 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 3 May 2022 18:59:13 +0200
Subject: [PATCH 075/997] Update intrinsics

---
 src/intrinsic/archs.rs       | 3161 ++++++++++++++--------------------
 tools/generate_intrinsics.py |   40 +-
 2 files changed, 1335 insertions(+), 1866 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index ef8a54f3530b..026ed7c6c7ca 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -1,917 +1,234 @@
+// File generated by `rustc_codegen_gcc/tools/generate_intrinsics.py`
+// DO NOT EDIT IT!
 match name {
-    // AMDGPU
-    "llvm.AMDGPU.div.fixup.f32" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.f64" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.v2f64" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.v4f32" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fmas.f32" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.f64" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.v2f64" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.v4f32" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.ldexp.f32" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.f64" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.v2f64" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.v4f32" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.rcp.f32" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.f64" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.v2f64" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.v4f32" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rsq.clamped.f32" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.f64" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.v2f64" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.v4f32" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.f32" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.f64" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.v2f64" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.v4f32" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.trig.preop.f32" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.f64" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
     // aarch64
     "llvm.aarch64.dmb" => "__builtin_arm_dmb",
     "llvm.aarch64.dsb" => "__builtin_arm_dsb",
     "llvm.aarch64.isb" => "__builtin_arm_isb",
+    "llvm.aarch64.sve.aesd" => "__builtin_sve_svaesd_u8",
+    "llvm.aarch64.sve.aese" => "__builtin_sve_svaese_u8",
+    "llvm.aarch64.sve.aesimc" => "__builtin_sve_svaesimc_u8",
+    "llvm.aarch64.sve.aesmc" => "__builtin_sve_svaesmc_u8",
+    "llvm.aarch64.sve.rax1" => "__builtin_sve_svrax1_u64",
+    "llvm.aarch64.sve.rdffr" => "__builtin_sve_svrdffr",
+    "llvm.aarch64.sve.rdffr.z" => "__builtin_sve_svrdffr_z",
+    "llvm.aarch64.sve.setffr" => "__builtin_sve_svsetffr",
+    "llvm.aarch64.sve.sm4e" => "__builtin_sve_svsm4e_u32",
+    "llvm.aarch64.sve.sm4ekey" => "__builtin_sve_svsm4ekey_u32",
+    "llvm.aarch64.sve.wrffr" => "__builtin_sve_svwrffr",
+    "llvm.aarch64.tcancel" => "__builtin_arm_tcancel",
+    "llvm.aarch64.tcommit" => "__builtin_arm_tcommit",
+    "llvm.aarch64.tstart" => "__builtin_arm_tstart",
+    "llvm.aarch64.ttest" => "__builtin_arm_ttest",
+    // amdgcn
+    "llvm.amdgcn.alignbyte" => "__builtin_amdgcn_alignbyte",
+    "llvm.amdgcn.buffer.wbinvl1" => "__builtin_amdgcn_buffer_wbinvl1",
+    "llvm.amdgcn.buffer.wbinvl1.sc" => "__builtin_amdgcn_buffer_wbinvl1_sc",
+    "llvm.amdgcn.buffer.wbinvl1.vol" => "__builtin_amdgcn_buffer_wbinvl1_vol",
+    "llvm.amdgcn.cubeid" => "__builtin_amdgcn_cubeid",
+    "llvm.amdgcn.cubema" => "__builtin_amdgcn_cubema",
+    "llvm.amdgcn.cubesc" => "__builtin_amdgcn_cubesc",
+    "llvm.amdgcn.cubetc" => "__builtin_amdgcn_cubetc",
+    "llvm.amdgcn.cvt.pk.i16" => "__builtin_amdgcn_cvt_pk_i16",
+    "llvm.amdgcn.cvt.pk.u16" => "__builtin_amdgcn_cvt_pk_u16",
+    "llvm.amdgcn.cvt.pk.u8.f32" => "__builtin_amdgcn_cvt_pk_u8_f32",
+    "llvm.amdgcn.cvt.pknorm.i16" => "__builtin_amdgcn_cvt_pknorm_i16",
+    "llvm.amdgcn.cvt.pknorm.u16" => "__builtin_amdgcn_cvt_pknorm_u16",
+    "llvm.amdgcn.cvt.pkrtz" => "__builtin_amdgcn_cvt_pkrtz",
+    "llvm.amdgcn.dispatch.id" => "__builtin_amdgcn_dispatch_id",
+    "llvm.amdgcn.ds.bpermute" => "__builtin_amdgcn_ds_bpermute",
+    "llvm.amdgcn.ds.fadd.v2bf16" => "__builtin_amdgcn_ds_atomic_fadd_v2bf16",
+    "llvm.amdgcn.ds.gws.barrier" => "__builtin_amdgcn_ds_gws_barrier",
+    "llvm.amdgcn.ds.gws.init" => "__builtin_amdgcn_ds_gws_init",
+    "llvm.amdgcn.ds.gws.sema.br" => "__builtin_amdgcn_ds_gws_sema_br",
+    "llvm.amdgcn.ds.gws.sema.p" => "__builtin_amdgcn_ds_gws_sema_p",
+    "llvm.amdgcn.ds.gws.sema.release.all" => "__builtin_amdgcn_ds_gws_sema_release_all",
+    "llvm.amdgcn.ds.gws.sema.v" => "__builtin_amdgcn_ds_gws_sema_v",
+    "llvm.amdgcn.ds.permute" => "__builtin_amdgcn_ds_permute",
+    "llvm.amdgcn.ds.swizzle" => "__builtin_amdgcn_ds_swizzle",
+    "llvm.amdgcn.endpgm" => "__builtin_amdgcn_endpgm",
+    "llvm.amdgcn.fdot2" => "__builtin_amdgcn_fdot2",
+    "llvm.amdgcn.fmed3" => "__builtin_amdgcn_fmed3",
+    "llvm.amdgcn.fmul.legacy" => "__builtin_amdgcn_fmul_legacy",
+    "llvm.amdgcn.groupstaticsize" => "__builtin_amdgcn_groupstaticsize",
+    "llvm.amdgcn.implicit.buffer.ptr" => "__builtin_amdgcn_implicit_buffer_ptr",
+    "llvm.amdgcn.implicitarg.ptr" => "__builtin_amdgcn_implicitarg_ptr",
+    "llvm.amdgcn.interp.mov" => "__builtin_amdgcn_interp_mov",
+    "llvm.amdgcn.interp.p1" => "__builtin_amdgcn_interp_p1",
+    "llvm.amdgcn.interp.p1.f16" => "__builtin_amdgcn_interp_p1_f16",
+    "llvm.amdgcn.interp.p2" => "__builtin_amdgcn_interp_p2",
+    "llvm.amdgcn.interp.p2.f16" => "__builtin_amdgcn_interp_p2_f16",
+    "llvm.amdgcn.is.private" => "__builtin_amdgcn_is_private",
+    "llvm.amdgcn.is.shared" => "__builtin_amdgcn_is_shared",
+    "llvm.amdgcn.kernarg.segment.ptr" => "__builtin_amdgcn_kernarg_segment_ptr",
+    "llvm.amdgcn.lerp" => "__builtin_amdgcn_lerp",
+    "llvm.amdgcn.mbcnt.hi" => "__builtin_amdgcn_mbcnt_hi",
+    "llvm.amdgcn.mbcnt.lo" => "__builtin_amdgcn_mbcnt_lo",
+    "llvm.amdgcn.mqsad.pk.u16.u8" => "__builtin_amdgcn_mqsad_pk_u16_u8",
+    "llvm.amdgcn.mqsad.u32.u8" => "__builtin_amdgcn_mqsad_u32_u8",
+    "llvm.amdgcn.msad.u8" => "__builtin_amdgcn_msad_u8",
+    "llvm.amdgcn.perm" => "__builtin_amdgcn_perm",
+    "llvm.amdgcn.permlane16" => "__builtin_amdgcn_permlane16",
+    "llvm.amdgcn.permlanex16" => "__builtin_amdgcn_permlanex16",
+    "llvm.amdgcn.qsad.pk.u16.u8" => "__builtin_amdgcn_qsad_pk_u16_u8",
+    "llvm.amdgcn.queue.ptr" => "__builtin_amdgcn_queue_ptr",
+    "llvm.amdgcn.rcp.legacy" => "__builtin_amdgcn_rcp_legacy",
+    "llvm.amdgcn.readfirstlane" => "__builtin_amdgcn_readfirstlane",
+    "llvm.amdgcn.readlane" => "__builtin_amdgcn_readlane",
+    "llvm.amdgcn.rsq.legacy" => "__builtin_amdgcn_rsq_legacy",
+    "llvm.amdgcn.s.barrier" => "__builtin_amdgcn_s_barrier",
+    "llvm.amdgcn.s.dcache.inv" => "__builtin_amdgcn_s_dcache_inv",
+    "llvm.amdgcn.s.dcache.inv.vol" => "__builtin_amdgcn_s_dcache_inv_vol",
+    "llvm.amdgcn.s.dcache.wb" => "__builtin_amdgcn_s_dcache_wb",
+    "llvm.amdgcn.s.dcache.wb.vol" => "__builtin_amdgcn_s_dcache_wb_vol",
+    "llvm.amdgcn.s.get.waveid.in.workgroup" => "__builtin_amdgcn_s_get_waveid_in_workgroup",
+    "llvm.amdgcn.s.getpc" => "__builtin_amdgcn_s_getpc",
+    "llvm.amdgcn.s.getreg" => "__builtin_amdgcn_s_getreg",
+    "llvm.amdgcn.s.memrealtime" => "__builtin_amdgcn_s_memrealtime",
+    "llvm.amdgcn.s.memtime" => "__builtin_amdgcn_s_memtime",
+    "llvm.amdgcn.s.sendmsg" => "__builtin_amdgcn_s_sendmsg",
+    "llvm.amdgcn.s.sendmsghalt" => "__builtin_amdgcn_s_sendmsghalt",
+    "llvm.amdgcn.s.setprio" => "__builtin_amdgcn_s_setprio",
+    "llvm.amdgcn.s.setreg" => "__builtin_amdgcn_s_setreg",
+    "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_decperflevel",
+    "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_incperflevel",
+    "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_sleep",
+    "llvm.amdgcn.s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
+    "llvm.amdgcn.sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
+    "llvm.amdgcn.sad.u16" => "__builtin_amdgcn_sad_u16",
+    "llvm.amdgcn.sad.u8" => "__builtin_amdgcn_sad_u8",
+    "llvm.amdgcn.sdot2" => "__builtin_amdgcn_sdot2",
+    "llvm.amdgcn.sdot4" => "__builtin_amdgcn_sdot4",
+    "llvm.amdgcn.sdot8" => "__builtin_amdgcn_sdot8",
+    "llvm.amdgcn.udot2" => "__builtin_amdgcn_udot2",
+    "llvm.amdgcn.udot4" => "__builtin_amdgcn_udot4",
+    "llvm.amdgcn.udot8" => "__builtin_amdgcn_udot8",
+    "llvm.amdgcn.wave.barrier" => "__builtin_amdgcn_wave_barrier",
+    "llvm.amdgcn.wavefrontsize" => "__builtin_amdgcn_wavefrontsize",
+    "llvm.amdgcn.writelane" => "__builtin_amdgcn_writelane",
     // arm
     "llvm.arm.cdp" => "__builtin_arm_cdp",
     "llvm.arm.cdp2" => "__builtin_arm_cdp2",
+    "llvm.arm.cmse.tt" => "__builtin_arm_cmse_TT",
+    "llvm.arm.cmse.tta" => "__builtin_arm_cmse_TTA",
+    "llvm.arm.cmse.ttat" => "__builtin_arm_cmse_TTAT",
+    "llvm.arm.cmse.ttt" => "__builtin_arm_cmse_TTT",
     "llvm.arm.dmb" => "__builtin_arm_dmb",
     "llvm.arm.dsb" => "__builtin_arm_dsb",
     "llvm.arm.get.fpscr" => "__builtin_arm_get_fpscr",
     "llvm.arm.isb" => "__builtin_arm_isb",
+    "llvm.arm.ldc" => "__builtin_arm_ldc",
+    "llvm.arm.ldc2" => "__builtin_arm_ldc2",
+    "llvm.arm.ldc2l" => "__builtin_arm_ldc2l",
+    "llvm.arm.ldcl" => "__builtin_arm_ldcl",
     "llvm.arm.mcr" => "__builtin_arm_mcr",
     "llvm.arm.mcr2" => "__builtin_arm_mcr2",
-    "llvm.arm.mcrr" => "__builtin_arm_mcrr",
-    "llvm.arm.mcrr2" => "__builtin_arm_mcrr2",
     "llvm.arm.mrc" => "__builtin_arm_mrc",
     "llvm.arm.mrc2" => "__builtin_arm_mrc2",
     "llvm.arm.qadd" => "__builtin_arm_qadd",
+    "llvm.arm.qadd16" => "__builtin_arm_qadd16",
+    "llvm.arm.qadd8" => "__builtin_arm_qadd8",
+    "llvm.arm.qasx" => "__builtin_arm_qasx",
+    "llvm.arm.qsax" => "__builtin_arm_qsax",
     "llvm.arm.qsub" => "__builtin_arm_qsub",
+    "llvm.arm.qsub16" => "__builtin_arm_qsub16",
+    "llvm.arm.qsub8" => "__builtin_arm_qsub8",
+    "llvm.arm.sadd16" => "__builtin_arm_sadd16",
+    "llvm.arm.sadd8" => "__builtin_arm_sadd8",
+    "llvm.arm.sasx" => "__builtin_arm_sasx",
+    "llvm.arm.sel" => "__builtin_arm_sel",
     "llvm.arm.set.fpscr" => "__builtin_arm_set_fpscr",
+    "llvm.arm.shadd16" => "__builtin_arm_shadd16",
+    "llvm.arm.shadd8" => "__builtin_arm_shadd8",
+    "llvm.arm.shasx" => "__builtin_arm_shasx",
+    "llvm.arm.shsax" => "__builtin_arm_shsax",
+    "llvm.arm.shsub16" => "__builtin_arm_shsub16",
+    "llvm.arm.shsub8" => "__builtin_arm_shsub8",
+    "llvm.arm.smlabb" => "__builtin_arm_smlabb",
+    "llvm.arm.smlabt" => "__builtin_arm_smlabt",
+    "llvm.arm.smlad" => "__builtin_arm_smlad",
+    "llvm.arm.smladx" => "__builtin_arm_smladx",
+    "llvm.arm.smlald" => "__builtin_arm_smlald",
+    "llvm.arm.smlaldx" => "__builtin_arm_smlaldx",
+    "llvm.arm.smlatb" => "__builtin_arm_smlatb",
+    "llvm.arm.smlatt" => "__builtin_arm_smlatt",
+    "llvm.arm.smlawb" => "__builtin_arm_smlawb",
+    "llvm.arm.smlawt" => "__builtin_arm_smlawt",
+    "llvm.arm.smlsd" => "__builtin_arm_smlsd",
+    "llvm.arm.smlsdx" => "__builtin_arm_smlsdx",
+    "llvm.arm.smlsld" => "__builtin_arm_smlsld",
+    "llvm.arm.smlsldx" => "__builtin_arm_smlsldx",
+    "llvm.arm.smuad" => "__builtin_arm_smuad",
+    "llvm.arm.smuadx" => "__builtin_arm_smuadx",
+    "llvm.arm.smulbb" => "__builtin_arm_smulbb",
+    "llvm.arm.smulbt" => "__builtin_arm_smulbt",
+    "llvm.arm.smultb" => "__builtin_arm_smultb",
+    "llvm.arm.smultt" => "__builtin_arm_smultt",
+    "llvm.arm.smulwb" => "__builtin_arm_smulwb",
+    "llvm.arm.smulwt" => "__builtin_arm_smulwt",
+    "llvm.arm.smusd" => "__builtin_arm_smusd",
+    "llvm.arm.smusdx" => "__builtin_arm_smusdx",
     "llvm.arm.ssat" => "__builtin_arm_ssat",
-    "llvm.arm.thread.pointer" => "__builtin_thread_pointer",
+    "llvm.arm.ssat16" => "__builtin_arm_ssat16",
+    "llvm.arm.ssax" => "__builtin_arm_ssax",
+    "llvm.arm.ssub16" => "__builtin_arm_ssub16",
+    "llvm.arm.ssub8" => "__builtin_arm_ssub8",
+    "llvm.arm.stc" => "__builtin_arm_stc",
+    "llvm.arm.stc2" => "__builtin_arm_stc2",
+    "llvm.arm.stc2l" => "__builtin_arm_stc2l",
+    "llvm.arm.stcl" => "__builtin_arm_stcl",
+    "llvm.arm.sxtab16" => "__builtin_arm_sxtab16",
+    "llvm.arm.sxtb16" => "__builtin_arm_sxtb16",
+    "llvm.arm.uadd16" => "__builtin_arm_uadd16",
+    "llvm.arm.uadd8" => "__builtin_arm_uadd8",
+    "llvm.arm.uasx" => "__builtin_arm_uasx",
+    "llvm.arm.uhadd16" => "__builtin_arm_uhadd16",
+    "llvm.arm.uhadd8" => "__builtin_arm_uhadd8",
+    "llvm.arm.uhasx" => "__builtin_arm_uhasx",
+    "llvm.arm.uhsax" => "__builtin_arm_uhsax",
+    "llvm.arm.uhsub16" => "__builtin_arm_uhsub16",
+    "llvm.arm.uhsub8" => "__builtin_arm_uhsub8",
+    "llvm.arm.uqadd16" => "__builtin_arm_uqadd16",
+    "llvm.arm.uqadd8" => "__builtin_arm_uqadd8",
+    "llvm.arm.uqasx" => "__builtin_arm_uqasx",
+    "llvm.arm.uqsax" => "__builtin_arm_uqsax",
+    "llvm.arm.uqsub16" => "__builtin_arm_uqsub16",
+    "llvm.arm.uqsub8" => "__builtin_arm_uqsub8",
+    "llvm.arm.usad8" => "__builtin_arm_usad8",
+    "llvm.arm.usada8" => "__builtin_arm_usada8",
     "llvm.arm.usat" => "__builtin_arm_usat",
-    // cuda
-    "llvm.cuda.syncthreads" => "__syncthreads",
-    // hexagon
-    "llvm.hexagon.A2.abs" => "__builtin_HEXAGON_A2_abs",
-    "llvm.hexagon.A2.absp" => "__builtin_HEXAGON_A2_absp",
-    "llvm.hexagon.A2.abssat" => "__builtin_HEXAGON_A2_abssat",
-    "llvm.hexagon.A2.add" => "__builtin_HEXAGON_A2_add",
-    "llvm.hexagon.A2.addh.h16.hh" => "__builtin_HEXAGON_A2_addh_h16_hh",
-    "llvm.hexagon.A2.addh.h16.hl" => "__builtin_HEXAGON_A2_addh_h16_hl",
-    "llvm.hexagon.A2.addh.h16.lh" => "__builtin_HEXAGON_A2_addh_h16_lh",
-    "llvm.hexagon.A2.addh.h16.ll" => "__builtin_HEXAGON_A2_addh_h16_ll",
-    "llvm.hexagon.A2.addh.h16.sat.hh" => "__builtin_HEXAGON_A2_addh_h16_sat_hh",
-    "llvm.hexagon.A2.addh.h16.sat.hl" => "__builtin_HEXAGON_A2_addh_h16_sat_hl",
-    "llvm.hexagon.A2.addh.h16.sat.lh" => "__builtin_HEXAGON_A2_addh_h16_sat_lh",
-    "llvm.hexagon.A2.addh.h16.sat.ll" => "__builtin_HEXAGON_A2_addh_h16_sat_ll",
-    "llvm.hexagon.A2.addh.l16.hl" => "__builtin_HEXAGON_A2_addh_l16_hl",
-    "llvm.hexagon.A2.addh.l16.ll" => "__builtin_HEXAGON_A2_addh_l16_ll",
-    "llvm.hexagon.A2.addh.l16.sat.hl" => "__builtin_HEXAGON_A2_addh_l16_sat_hl",
-    "llvm.hexagon.A2.addh.l16.sat.ll" => "__builtin_HEXAGON_A2_addh_l16_sat_ll",
-    "llvm.hexagon.A2.addi" => "__builtin_HEXAGON_A2_addi",
-    "llvm.hexagon.A2.addp" => "__builtin_HEXAGON_A2_addp",
-    "llvm.hexagon.A2.addpsat" => "__builtin_HEXAGON_A2_addpsat",
-    "llvm.hexagon.A2.addsat" => "__builtin_HEXAGON_A2_addsat",
-    "llvm.hexagon.A2.addsp" => "__builtin_HEXAGON_A2_addsp",
-    "llvm.hexagon.A2.and" => "__builtin_HEXAGON_A2_and",
-    "llvm.hexagon.A2.andir" => "__builtin_HEXAGON_A2_andir",
-    "llvm.hexagon.A2.andp" => "__builtin_HEXAGON_A2_andp",
-    "llvm.hexagon.A2.aslh" => "__builtin_HEXAGON_A2_aslh",
-    "llvm.hexagon.A2.asrh" => "__builtin_HEXAGON_A2_asrh",
-    "llvm.hexagon.A2.combine.hh" => "__builtin_HEXAGON_A2_combine_hh",
-    "llvm.hexagon.A2.combine.hl" => "__builtin_HEXAGON_A2_combine_hl",
-    "llvm.hexagon.A2.combine.lh" => "__builtin_HEXAGON_A2_combine_lh",
-    "llvm.hexagon.A2.combine.ll" => "__builtin_HEXAGON_A2_combine_ll",
-    "llvm.hexagon.A2.combineii" => "__builtin_HEXAGON_A2_combineii",
-    "llvm.hexagon.A2.combinew" => "__builtin_HEXAGON_A2_combinew",
-    "llvm.hexagon.A2.max" => "__builtin_HEXAGON_A2_max",
-    "llvm.hexagon.A2.maxp" => "__builtin_HEXAGON_A2_maxp",
-    "llvm.hexagon.A2.maxu" => "__builtin_HEXAGON_A2_maxu",
-    "llvm.hexagon.A2.maxup" => "__builtin_HEXAGON_A2_maxup",
-    "llvm.hexagon.A2.min" => "__builtin_HEXAGON_A2_min",
-    "llvm.hexagon.A2.minp" => "__builtin_HEXAGON_A2_minp",
-    "llvm.hexagon.A2.minu" => "__builtin_HEXAGON_A2_minu",
-    "llvm.hexagon.A2.minup" => "__builtin_HEXAGON_A2_minup",
-    "llvm.hexagon.A2.neg" => "__builtin_HEXAGON_A2_neg",
-    "llvm.hexagon.A2.negp" => "__builtin_HEXAGON_A2_negp",
-    "llvm.hexagon.A2.negsat" => "__builtin_HEXAGON_A2_negsat",
-    "llvm.hexagon.A2.not" => "__builtin_HEXAGON_A2_not",
-    "llvm.hexagon.A2.notp" => "__builtin_HEXAGON_A2_notp",
-    "llvm.hexagon.A2.or" => "__builtin_HEXAGON_A2_or",
-    "llvm.hexagon.A2.orir" => "__builtin_HEXAGON_A2_orir",
-    "llvm.hexagon.A2.orp" => "__builtin_HEXAGON_A2_orp",
-    "llvm.hexagon.A2.roundsat" => "__builtin_HEXAGON_A2_roundsat",
-    "llvm.hexagon.A2.sat" => "__builtin_HEXAGON_A2_sat",
-    "llvm.hexagon.A2.satb" => "__builtin_HEXAGON_A2_satb",
-    "llvm.hexagon.A2.sath" => "__builtin_HEXAGON_A2_sath",
-    "llvm.hexagon.A2.satub" => "__builtin_HEXAGON_A2_satub",
-    "llvm.hexagon.A2.satuh" => "__builtin_HEXAGON_A2_satuh",
-    "llvm.hexagon.A2.sub" => "__builtin_HEXAGON_A2_sub",
-    "llvm.hexagon.A2.subh.h16.hh" => "__builtin_HEXAGON_A2_subh_h16_hh",
-    "llvm.hexagon.A2.subh.h16.hl" => "__builtin_HEXAGON_A2_subh_h16_hl",
-    "llvm.hexagon.A2.subh.h16.lh" => "__builtin_HEXAGON_A2_subh_h16_lh",
-    "llvm.hexagon.A2.subh.h16.ll" => "__builtin_HEXAGON_A2_subh_h16_ll",
-    "llvm.hexagon.A2.subh.h16.sat.hh" => "__builtin_HEXAGON_A2_subh_h16_sat_hh",
-    "llvm.hexagon.A2.subh.h16.sat.hl" => "__builtin_HEXAGON_A2_subh_h16_sat_hl",
-    "llvm.hexagon.A2.subh.h16.sat.lh" => "__builtin_HEXAGON_A2_subh_h16_sat_lh",
-    "llvm.hexagon.A2.subh.h16.sat.ll" => "__builtin_HEXAGON_A2_subh_h16_sat_ll",
-    "llvm.hexagon.A2.subh.l16.hl" => "__builtin_HEXAGON_A2_subh_l16_hl",
-    "llvm.hexagon.A2.subh.l16.ll" => "__builtin_HEXAGON_A2_subh_l16_ll",
-    "llvm.hexagon.A2.subh.l16.sat.hl" => "__builtin_HEXAGON_A2_subh_l16_sat_hl",
-    "llvm.hexagon.A2.subh.l16.sat.ll" => "__builtin_HEXAGON_A2_subh_l16_sat_ll",
-    "llvm.hexagon.A2.subp" => "__builtin_HEXAGON_A2_subp",
-    "llvm.hexagon.A2.subri" => "__builtin_HEXAGON_A2_subri",
-    "llvm.hexagon.A2.subsat" => "__builtin_HEXAGON_A2_subsat",
-    "llvm.hexagon.A2.svaddh" => "__builtin_HEXAGON_A2_svaddh",
-    "llvm.hexagon.A2.svaddhs" => "__builtin_HEXAGON_A2_svaddhs",
-    "llvm.hexagon.A2.svadduhs" => "__builtin_HEXAGON_A2_svadduhs",
-    "llvm.hexagon.A2.svavgh" => "__builtin_HEXAGON_A2_svavgh",
-    "llvm.hexagon.A2.svavghs" => "__builtin_HEXAGON_A2_svavghs",
-    "llvm.hexagon.A2.svnavgh" => "__builtin_HEXAGON_A2_svnavgh",
-    "llvm.hexagon.A2.svsubh" => "__builtin_HEXAGON_A2_svsubh",
-    "llvm.hexagon.A2.svsubhs" => "__builtin_HEXAGON_A2_svsubhs",
-    "llvm.hexagon.A2.svsubuhs" => "__builtin_HEXAGON_A2_svsubuhs",
-    "llvm.hexagon.A2.swiz" => "__builtin_HEXAGON_A2_swiz",
-    "llvm.hexagon.A2.sxtb" => "__builtin_HEXAGON_A2_sxtb",
-    "llvm.hexagon.A2.sxth" => "__builtin_HEXAGON_A2_sxth",
-    "llvm.hexagon.A2.sxtw" => "__builtin_HEXAGON_A2_sxtw",
-    "llvm.hexagon.A2.tfr" => "__builtin_HEXAGON_A2_tfr",
-    "llvm.hexagon.A2.tfrih" => "__builtin_HEXAGON_A2_tfrih",
-    "llvm.hexagon.A2.tfril" => "__builtin_HEXAGON_A2_tfril",
-    "llvm.hexagon.A2.tfrp" => "__builtin_HEXAGON_A2_tfrp",
-    "llvm.hexagon.A2.tfrpi" => "__builtin_HEXAGON_A2_tfrpi",
-    "llvm.hexagon.A2.tfrsi" => "__builtin_HEXAGON_A2_tfrsi",
-    "llvm.hexagon.A2.vabsh" => "__builtin_HEXAGON_A2_vabsh",
-    "llvm.hexagon.A2.vabshsat" => "__builtin_HEXAGON_A2_vabshsat",
-    "llvm.hexagon.A2.vabsw" => "__builtin_HEXAGON_A2_vabsw",
-    "llvm.hexagon.A2.vabswsat" => "__builtin_HEXAGON_A2_vabswsat",
-    "llvm.hexagon.A2.vaddb.map" => "__builtin_HEXAGON_A2_vaddb_map",
-    "llvm.hexagon.A2.vaddh" => "__builtin_HEXAGON_A2_vaddh",
-    "llvm.hexagon.A2.vaddhs" => "__builtin_HEXAGON_A2_vaddhs",
-    "llvm.hexagon.A2.vaddub" => "__builtin_HEXAGON_A2_vaddub",
-    "llvm.hexagon.A2.vaddubs" => "__builtin_HEXAGON_A2_vaddubs",
-    "llvm.hexagon.A2.vadduhs" => "__builtin_HEXAGON_A2_vadduhs",
-    "llvm.hexagon.A2.vaddw" => "__builtin_HEXAGON_A2_vaddw",
-    "llvm.hexagon.A2.vaddws" => "__builtin_HEXAGON_A2_vaddws",
-    "llvm.hexagon.A2.vavgh" => "__builtin_HEXAGON_A2_vavgh",
-    "llvm.hexagon.A2.vavghcr" => "__builtin_HEXAGON_A2_vavghcr",
-    "llvm.hexagon.A2.vavghr" => "__builtin_HEXAGON_A2_vavghr",
-    "llvm.hexagon.A2.vavgub" => "__builtin_HEXAGON_A2_vavgub",
-    "llvm.hexagon.A2.vavgubr" => "__builtin_HEXAGON_A2_vavgubr",
-    "llvm.hexagon.A2.vavguh" => "__builtin_HEXAGON_A2_vavguh",
-    "llvm.hexagon.A2.vavguhr" => "__builtin_HEXAGON_A2_vavguhr",
-    "llvm.hexagon.A2.vavguw" => "__builtin_HEXAGON_A2_vavguw",
-    "llvm.hexagon.A2.vavguwr" => "__builtin_HEXAGON_A2_vavguwr",
-    "llvm.hexagon.A2.vavgw" => "__builtin_HEXAGON_A2_vavgw",
-    "llvm.hexagon.A2.vavgwcr" => "__builtin_HEXAGON_A2_vavgwcr",
-    "llvm.hexagon.A2.vavgwr" => "__builtin_HEXAGON_A2_vavgwr",
-    "llvm.hexagon.A2.vcmpbeq" => "__builtin_HEXAGON_A2_vcmpbeq",
-    "llvm.hexagon.A2.vcmpbgtu" => "__builtin_HEXAGON_A2_vcmpbgtu",
-    "llvm.hexagon.A2.vcmpheq" => "__builtin_HEXAGON_A2_vcmpheq",
-    "llvm.hexagon.A2.vcmphgt" => "__builtin_HEXAGON_A2_vcmphgt",
-    "llvm.hexagon.A2.vcmphgtu" => "__builtin_HEXAGON_A2_vcmphgtu",
-    "llvm.hexagon.A2.vcmpweq" => "__builtin_HEXAGON_A2_vcmpweq",
-    "llvm.hexagon.A2.vcmpwgt" => "__builtin_HEXAGON_A2_vcmpwgt",
-    "llvm.hexagon.A2.vcmpwgtu" => "__builtin_HEXAGON_A2_vcmpwgtu",
-    "llvm.hexagon.A2.vconj" => "__builtin_HEXAGON_A2_vconj",
-    "llvm.hexagon.A2.vmaxb" => "__builtin_HEXAGON_A2_vmaxb",
-    "llvm.hexagon.A2.vmaxh" => "__builtin_HEXAGON_A2_vmaxh",
-    "llvm.hexagon.A2.vmaxub" => "__builtin_HEXAGON_A2_vmaxub",
-    "llvm.hexagon.A2.vmaxuh" => "__builtin_HEXAGON_A2_vmaxuh",
-    "llvm.hexagon.A2.vmaxuw" => "__builtin_HEXAGON_A2_vmaxuw",
-    "llvm.hexagon.A2.vmaxw" => "__builtin_HEXAGON_A2_vmaxw",
-    "llvm.hexagon.A2.vminb" => "__builtin_HEXAGON_A2_vminb",
-    "llvm.hexagon.A2.vminh" => "__builtin_HEXAGON_A2_vminh",
-    "llvm.hexagon.A2.vminub" => "__builtin_HEXAGON_A2_vminub",
-    "llvm.hexagon.A2.vminuh" => "__builtin_HEXAGON_A2_vminuh",
-    "llvm.hexagon.A2.vminuw" => "__builtin_HEXAGON_A2_vminuw",
-    "llvm.hexagon.A2.vminw" => "__builtin_HEXAGON_A2_vminw",
-    "llvm.hexagon.A2.vnavgh" => "__builtin_HEXAGON_A2_vnavgh",
-    "llvm.hexagon.A2.vnavghcr" => "__builtin_HEXAGON_A2_vnavghcr",
-    "llvm.hexagon.A2.vnavghr" => "__builtin_HEXAGON_A2_vnavghr",
-    "llvm.hexagon.A2.vnavgw" => "__builtin_HEXAGON_A2_vnavgw",
-    "llvm.hexagon.A2.vnavgwcr" => "__builtin_HEXAGON_A2_vnavgwcr",
-    "llvm.hexagon.A2.vnavgwr" => "__builtin_HEXAGON_A2_vnavgwr",
-    "llvm.hexagon.A2.vraddub" => "__builtin_HEXAGON_A2_vraddub",
-    "llvm.hexagon.A2.vraddub.acc" => "__builtin_HEXAGON_A2_vraddub_acc",
-    "llvm.hexagon.A2.vrsadub" => "__builtin_HEXAGON_A2_vrsadub",
-    "llvm.hexagon.A2.vrsadub.acc" => "__builtin_HEXAGON_A2_vrsadub_acc",
-    "llvm.hexagon.A2.vsubb.map" => "__builtin_HEXAGON_A2_vsubb_map",
-    "llvm.hexagon.A2.vsubh" => "__builtin_HEXAGON_A2_vsubh",
-    "llvm.hexagon.A2.vsubhs" => "__builtin_HEXAGON_A2_vsubhs",
-    "llvm.hexagon.A2.vsubub" => "__builtin_HEXAGON_A2_vsubub",
-    "llvm.hexagon.A2.vsububs" => "__builtin_HEXAGON_A2_vsububs",
-    "llvm.hexagon.A2.vsubuhs" => "__builtin_HEXAGON_A2_vsubuhs",
-    "llvm.hexagon.A2.vsubw" => "__builtin_HEXAGON_A2_vsubw",
-    "llvm.hexagon.A2.vsubws" => "__builtin_HEXAGON_A2_vsubws",
-    "llvm.hexagon.A2.xor" => "__builtin_HEXAGON_A2_xor",
-    "llvm.hexagon.A2.xorp" => "__builtin_HEXAGON_A2_xorp",
-    "llvm.hexagon.A2.zxtb" => "__builtin_HEXAGON_A2_zxtb",
-    "llvm.hexagon.A2.zxth" => "__builtin_HEXAGON_A2_zxth",
-    "llvm.hexagon.A4.andn" => "__builtin_HEXAGON_A4_andn",
-    "llvm.hexagon.A4.andnp" => "__builtin_HEXAGON_A4_andnp",
-    "llvm.hexagon.A4.bitsplit" => "__builtin_HEXAGON_A4_bitsplit",
-    "llvm.hexagon.A4.bitspliti" => "__builtin_HEXAGON_A4_bitspliti",
-    "llvm.hexagon.A4.boundscheck" => "__builtin_HEXAGON_A4_boundscheck",
-    "llvm.hexagon.A4.cmpbeq" => "__builtin_HEXAGON_A4_cmpbeq",
-    "llvm.hexagon.A4.cmpbeqi" => "__builtin_HEXAGON_A4_cmpbeqi",
-    "llvm.hexagon.A4.cmpbgt" => "__builtin_HEXAGON_A4_cmpbgt",
-    "llvm.hexagon.A4.cmpbgti" => "__builtin_HEXAGON_A4_cmpbgti",
-    "llvm.hexagon.A4.cmpbgtu" => "__builtin_HEXAGON_A4_cmpbgtu",
-    "llvm.hexagon.A4.cmpbgtui" => "__builtin_HEXAGON_A4_cmpbgtui",
-    "llvm.hexagon.A4.cmpheq" => "__builtin_HEXAGON_A4_cmpheq",
-    "llvm.hexagon.A4.cmpheqi" => "__builtin_HEXAGON_A4_cmpheqi",
-    "llvm.hexagon.A4.cmphgt" => "__builtin_HEXAGON_A4_cmphgt",
-    "llvm.hexagon.A4.cmphgti" => "__builtin_HEXAGON_A4_cmphgti",
-    "llvm.hexagon.A4.cmphgtu" => "__builtin_HEXAGON_A4_cmphgtu",
-    "llvm.hexagon.A4.cmphgtui" => "__builtin_HEXAGON_A4_cmphgtui",
-    "llvm.hexagon.A4.combineir" => "__builtin_HEXAGON_A4_combineir",
-    "llvm.hexagon.A4.combineri" => "__builtin_HEXAGON_A4_combineri",
-    "llvm.hexagon.A4.cround.ri" => "__builtin_HEXAGON_A4_cround_ri",
-    "llvm.hexagon.A4.cround.rr" => "__builtin_HEXAGON_A4_cround_rr",
-    "llvm.hexagon.A4.modwrapu" => "__builtin_HEXAGON_A4_modwrapu",
-    "llvm.hexagon.A4.orn" => "__builtin_HEXAGON_A4_orn",
-    "llvm.hexagon.A4.ornp" => "__builtin_HEXAGON_A4_ornp",
-    "llvm.hexagon.A4.rcmpeq" => "__builtin_HEXAGON_A4_rcmpeq",
-    "llvm.hexagon.A4.rcmpeqi" => "__builtin_HEXAGON_A4_rcmpeqi",
-    "llvm.hexagon.A4.rcmpneq" => "__builtin_HEXAGON_A4_rcmpneq",
-    "llvm.hexagon.A4.rcmpneqi" => "__builtin_HEXAGON_A4_rcmpneqi",
-    "llvm.hexagon.A4.round.ri" => "__builtin_HEXAGON_A4_round_ri",
-    "llvm.hexagon.A4.round.ri.sat" => "__builtin_HEXAGON_A4_round_ri_sat",
-    "llvm.hexagon.A4.round.rr" => "__builtin_HEXAGON_A4_round_rr",
-    "llvm.hexagon.A4.round.rr.sat" => "__builtin_HEXAGON_A4_round_rr_sat",
-    "llvm.hexagon.A4.tlbmatch" => "__builtin_HEXAGON_A4_tlbmatch",
-    "llvm.hexagon.A4.vcmpbeq.any" => "__builtin_HEXAGON_A4_vcmpbeq_any",
-    "llvm.hexagon.A4.vcmpbeqi" => "__builtin_HEXAGON_A4_vcmpbeqi",
-    "llvm.hexagon.A4.vcmpbgt" => "__builtin_HEXAGON_A4_vcmpbgt",
-    "llvm.hexagon.A4.vcmpbgti" => "__builtin_HEXAGON_A4_vcmpbgti",
-    "llvm.hexagon.A4.vcmpbgtui" => "__builtin_HEXAGON_A4_vcmpbgtui",
-    "llvm.hexagon.A4.vcmpheqi" => "__builtin_HEXAGON_A4_vcmpheqi",
-    "llvm.hexagon.A4.vcmphgti" => "__builtin_HEXAGON_A4_vcmphgti",
-    "llvm.hexagon.A4.vcmphgtui" => "__builtin_HEXAGON_A4_vcmphgtui",
-    "llvm.hexagon.A4.vcmpweqi" => "__builtin_HEXAGON_A4_vcmpweqi",
-    "llvm.hexagon.A4.vcmpwgti" => "__builtin_HEXAGON_A4_vcmpwgti",
-    "llvm.hexagon.A4.vcmpwgtui" => "__builtin_HEXAGON_A4_vcmpwgtui",
-    "llvm.hexagon.A4.vrmaxh" => "__builtin_HEXAGON_A4_vrmaxh",
-    "llvm.hexagon.A4.vrmaxuh" => "__builtin_HEXAGON_A4_vrmaxuh",
-    "llvm.hexagon.A4.vrmaxuw" => "__builtin_HEXAGON_A4_vrmaxuw",
-    "llvm.hexagon.A4.vrmaxw" => "__builtin_HEXAGON_A4_vrmaxw",
-    "llvm.hexagon.A4.vrminh" => "__builtin_HEXAGON_A4_vrminh",
-    "llvm.hexagon.A4.vrminuh" => "__builtin_HEXAGON_A4_vrminuh",
-    "llvm.hexagon.A4.vrminuw" => "__builtin_HEXAGON_A4_vrminuw",
-    "llvm.hexagon.A4.vrminw" => "__builtin_HEXAGON_A4_vrminw",
-    "llvm.hexagon.A5.vaddhubs" => "__builtin_HEXAGON_A5_vaddhubs",
-    "llvm.hexagon.C2.all8" => "__builtin_HEXAGON_C2_all8",
-    "llvm.hexagon.C2.and" => "__builtin_HEXAGON_C2_and",
-    "llvm.hexagon.C2.andn" => "__builtin_HEXAGON_C2_andn",
-    "llvm.hexagon.C2.any8" => "__builtin_HEXAGON_C2_any8",
-    "llvm.hexagon.C2.bitsclr" => "__builtin_HEXAGON_C2_bitsclr",
-    "llvm.hexagon.C2.bitsclri" => "__builtin_HEXAGON_C2_bitsclri",
-    "llvm.hexagon.C2.bitsset" => "__builtin_HEXAGON_C2_bitsset",
-    "llvm.hexagon.C2.cmpeq" => "__builtin_HEXAGON_C2_cmpeq",
-    "llvm.hexagon.C2.cmpeqi" => "__builtin_HEXAGON_C2_cmpeqi",
-    "llvm.hexagon.C2.cmpeqp" => "__builtin_HEXAGON_C2_cmpeqp",
-    "llvm.hexagon.C2.cmpgei" => "__builtin_HEXAGON_C2_cmpgei",
-    "llvm.hexagon.C2.cmpgeui" => "__builtin_HEXAGON_C2_cmpgeui",
-    "llvm.hexagon.C2.cmpgt" => "__builtin_HEXAGON_C2_cmpgt",
-    "llvm.hexagon.C2.cmpgti" => "__builtin_HEXAGON_C2_cmpgti",
-    "llvm.hexagon.C2.cmpgtp" => "__builtin_HEXAGON_C2_cmpgtp",
-    "llvm.hexagon.C2.cmpgtu" => "__builtin_HEXAGON_C2_cmpgtu",
-    "llvm.hexagon.C2.cmpgtui" => "__builtin_HEXAGON_C2_cmpgtui",
-    "llvm.hexagon.C2.cmpgtup" => "__builtin_HEXAGON_C2_cmpgtup",
-    "llvm.hexagon.C2.cmplt" => "__builtin_HEXAGON_C2_cmplt",
-    "llvm.hexagon.C2.cmpltu" => "__builtin_HEXAGON_C2_cmpltu",
-    "llvm.hexagon.C2.mask" => "__builtin_HEXAGON_C2_mask",
-    "llvm.hexagon.C2.mux" => "__builtin_HEXAGON_C2_mux",
-    "llvm.hexagon.C2.muxii" => "__builtin_HEXAGON_C2_muxii",
-    "llvm.hexagon.C2.muxir" => "__builtin_HEXAGON_C2_muxir",
-    "llvm.hexagon.C2.muxri" => "__builtin_HEXAGON_C2_muxri",
-    "llvm.hexagon.C2.not" => "__builtin_HEXAGON_C2_not",
-    "llvm.hexagon.C2.or" => "__builtin_HEXAGON_C2_or",
-    "llvm.hexagon.C2.orn" => "__builtin_HEXAGON_C2_orn",
-    "llvm.hexagon.C2.pxfer.map" => "__builtin_HEXAGON_C2_pxfer_map",
-    "llvm.hexagon.C2.tfrpr" => "__builtin_HEXAGON_C2_tfrpr",
-    "llvm.hexagon.C2.tfrrp" => "__builtin_HEXAGON_C2_tfrrp",
-    "llvm.hexagon.C2.vitpack" => "__builtin_HEXAGON_C2_vitpack",
-    "llvm.hexagon.C2.vmux" => "__builtin_HEXAGON_C2_vmux",
-    "llvm.hexagon.C2.xor" => "__builtin_HEXAGON_C2_xor",
-    "llvm.hexagon.C4.and.and" => "__builtin_HEXAGON_C4_and_and",
-    "llvm.hexagon.C4.and.andn" => "__builtin_HEXAGON_C4_and_andn",
-    "llvm.hexagon.C4.and.or" => "__builtin_HEXAGON_C4_and_or",
-    "llvm.hexagon.C4.and.orn" => "__builtin_HEXAGON_C4_and_orn",
-    "llvm.hexagon.C4.cmplte" => "__builtin_HEXAGON_C4_cmplte",
-    "llvm.hexagon.C4.cmpltei" => "__builtin_HEXAGON_C4_cmpltei",
-    "llvm.hexagon.C4.cmplteu" => "__builtin_HEXAGON_C4_cmplteu",
-    "llvm.hexagon.C4.cmplteui" => "__builtin_HEXAGON_C4_cmplteui",
-    "llvm.hexagon.C4.cmpneq" => "__builtin_HEXAGON_C4_cmpneq",
-    "llvm.hexagon.C4.cmpneqi" => "__builtin_HEXAGON_C4_cmpneqi",
-    "llvm.hexagon.C4.fastcorner9" => "__builtin_HEXAGON_C4_fastcorner9",
-    "llvm.hexagon.C4.fastcorner9.not" => "__builtin_HEXAGON_C4_fastcorner9_not",
-    "llvm.hexagon.C4.nbitsclr" => "__builtin_HEXAGON_C4_nbitsclr",
-    "llvm.hexagon.C4.nbitsclri" => "__builtin_HEXAGON_C4_nbitsclri",
-    "llvm.hexagon.C4.nbitsset" => "__builtin_HEXAGON_C4_nbitsset",
-    "llvm.hexagon.C4.or.and" => "__builtin_HEXAGON_C4_or_and",
-    "llvm.hexagon.C4.or.andn" => "__builtin_HEXAGON_C4_or_andn",
-    "llvm.hexagon.C4.or.or" => "__builtin_HEXAGON_C4_or_or",
-    "llvm.hexagon.C4.or.orn" => "__builtin_HEXAGON_C4_or_orn",
-    "llvm.hexagon.F2.conv.d2df" => "__builtin_HEXAGON_F2_conv_d2df",
-    "llvm.hexagon.F2.conv.d2sf" => "__builtin_HEXAGON_F2_conv_d2sf",
-    "llvm.hexagon.F2.conv.df2d" => "__builtin_HEXAGON_F2_conv_df2d",
-    "llvm.hexagon.F2.conv.df2d.chop" => "__builtin_HEXAGON_F2_conv_df2d_chop",
-    "llvm.hexagon.F2.conv.df2sf" => "__builtin_HEXAGON_F2_conv_df2sf",
-    "llvm.hexagon.F2.conv.df2ud" => "__builtin_HEXAGON_F2_conv_df2ud",
-    "llvm.hexagon.F2.conv.df2ud.chop" => "__builtin_HEXAGON_F2_conv_df2ud_chop",
-    "llvm.hexagon.F2.conv.df2uw" => "__builtin_HEXAGON_F2_conv_df2uw",
-    "llvm.hexagon.F2.conv.df2uw.chop" => "__builtin_HEXAGON_F2_conv_df2uw_chop",
-    "llvm.hexagon.F2.conv.df2w" => "__builtin_HEXAGON_F2_conv_df2w",
-    "llvm.hexagon.F2.conv.df2w.chop" => "__builtin_HEXAGON_F2_conv_df2w_chop",
-    "llvm.hexagon.F2.conv.sf2d" => "__builtin_HEXAGON_F2_conv_sf2d",
-    "llvm.hexagon.F2.conv.sf2d.chop" => "__builtin_HEXAGON_F2_conv_sf2d_chop",
-    "llvm.hexagon.F2.conv.sf2df" => "__builtin_HEXAGON_F2_conv_sf2df",
-    "llvm.hexagon.F2.conv.sf2ud" => "__builtin_HEXAGON_F2_conv_sf2ud",
-    "llvm.hexagon.F2.conv.sf2ud.chop" => "__builtin_HEXAGON_F2_conv_sf2ud_chop",
-    "llvm.hexagon.F2.conv.sf2uw" => "__builtin_HEXAGON_F2_conv_sf2uw",
-    "llvm.hexagon.F2.conv.sf2uw.chop" => "__builtin_HEXAGON_F2_conv_sf2uw_chop",
-    "llvm.hexagon.F2.conv.sf2w" => "__builtin_HEXAGON_F2_conv_sf2w",
-    "llvm.hexagon.F2.conv.sf2w.chop" => "__builtin_HEXAGON_F2_conv_sf2w_chop",
-    "llvm.hexagon.F2.conv.ud2df" => "__builtin_HEXAGON_F2_conv_ud2df",
-    "llvm.hexagon.F2.conv.ud2sf" => "__builtin_HEXAGON_F2_conv_ud2sf",
-    "llvm.hexagon.F2.conv.uw2df" => "__builtin_HEXAGON_F2_conv_uw2df",
-    "llvm.hexagon.F2.conv.uw2sf" => "__builtin_HEXAGON_F2_conv_uw2sf",
-    "llvm.hexagon.F2.conv.w2df" => "__builtin_HEXAGON_F2_conv_w2df",
-    "llvm.hexagon.F2.conv.w2sf" => "__builtin_HEXAGON_F2_conv_w2sf",
-    "llvm.hexagon.F2.dfadd" => "__builtin_HEXAGON_F2_dfadd",
-    "llvm.hexagon.F2.dfclass" => "__builtin_HEXAGON_F2_dfclass",
-    "llvm.hexagon.F2.dfcmpeq" => "__builtin_HEXAGON_F2_dfcmpeq",
-    "llvm.hexagon.F2.dfcmpge" => "__builtin_HEXAGON_F2_dfcmpge",
-    "llvm.hexagon.F2.dfcmpgt" => "__builtin_HEXAGON_F2_dfcmpgt",
-    "llvm.hexagon.F2.dfcmpuo" => "__builtin_HEXAGON_F2_dfcmpuo",
-    "llvm.hexagon.F2.dffixupd" => "__builtin_HEXAGON_F2_dffixupd",
-    "llvm.hexagon.F2.dffixupn" => "__builtin_HEXAGON_F2_dffixupn",
-    "llvm.hexagon.F2.dffixupr" => "__builtin_HEXAGON_F2_dffixupr",
-    "llvm.hexagon.F2.dffma" => "__builtin_HEXAGON_F2_dffma",
-    "llvm.hexagon.F2.dffma.lib" => "__builtin_HEXAGON_F2_dffma_lib",
-    "llvm.hexagon.F2.dffma.sc" => "__builtin_HEXAGON_F2_dffma_sc",
-    "llvm.hexagon.F2.dffms" => "__builtin_HEXAGON_F2_dffms",
-    "llvm.hexagon.F2.dffms.lib" => "__builtin_HEXAGON_F2_dffms_lib",
-    "llvm.hexagon.F2.dfimm.n" => "__builtin_HEXAGON_F2_dfimm_n",
-    "llvm.hexagon.F2.dfimm.p" => "__builtin_HEXAGON_F2_dfimm_p",
-    "llvm.hexagon.F2.dfmax" => "__builtin_HEXAGON_F2_dfmax",
-    "llvm.hexagon.F2.dfmin" => "__builtin_HEXAGON_F2_dfmin",
-    "llvm.hexagon.F2.dfmpy" => "__builtin_HEXAGON_F2_dfmpy",
-    "llvm.hexagon.F2.dfsub" => "__builtin_HEXAGON_F2_dfsub",
-    "llvm.hexagon.F2.sfadd" => "__builtin_HEXAGON_F2_sfadd",
-    "llvm.hexagon.F2.sfclass" => "__builtin_HEXAGON_F2_sfclass",
-    "llvm.hexagon.F2.sfcmpeq" => "__builtin_HEXAGON_F2_sfcmpeq",
-    "llvm.hexagon.F2.sfcmpge" => "__builtin_HEXAGON_F2_sfcmpge",
-    "llvm.hexagon.F2.sfcmpgt" => "__builtin_HEXAGON_F2_sfcmpgt",
-    "llvm.hexagon.F2.sfcmpuo" => "__builtin_HEXAGON_F2_sfcmpuo",
-    "llvm.hexagon.F2.sffixupd" => "__builtin_HEXAGON_F2_sffixupd",
-    "llvm.hexagon.F2.sffixupn" => "__builtin_HEXAGON_F2_sffixupn",
-    "llvm.hexagon.F2.sffixupr" => "__builtin_HEXAGON_F2_sffixupr",
-    "llvm.hexagon.F2.sffma" => "__builtin_HEXAGON_F2_sffma",
-    "llvm.hexagon.F2.sffma.lib" => "__builtin_HEXAGON_F2_sffma_lib",
-    "llvm.hexagon.F2.sffma.sc" => "__builtin_HEXAGON_F2_sffma_sc",
-    "llvm.hexagon.F2.sffms" => "__builtin_HEXAGON_F2_sffms",
-    "llvm.hexagon.F2.sffms.lib" => "__builtin_HEXAGON_F2_sffms_lib",
-    "llvm.hexagon.F2.sfimm.n" => "__builtin_HEXAGON_F2_sfimm_n",
-    "llvm.hexagon.F2.sfimm.p" => "__builtin_HEXAGON_F2_sfimm_p",
-    "llvm.hexagon.F2.sfmax" => "__builtin_HEXAGON_F2_sfmax",
-    "llvm.hexagon.F2.sfmin" => "__builtin_HEXAGON_F2_sfmin",
-    "llvm.hexagon.F2.sfmpy" => "__builtin_HEXAGON_F2_sfmpy",
-    "llvm.hexagon.F2.sfsub" => "__builtin_HEXAGON_F2_sfsub",
-    "llvm.hexagon.M2.acci" => "__builtin_HEXAGON_M2_acci",
-    "llvm.hexagon.M2.accii" => "__builtin_HEXAGON_M2_accii",
-    "llvm.hexagon.M2.cmaci.s0" => "__builtin_HEXAGON_M2_cmaci_s0",
-    "llvm.hexagon.M2.cmacr.s0" => "__builtin_HEXAGON_M2_cmacr_s0",
-    "llvm.hexagon.M2.cmacs.s0" => "__builtin_HEXAGON_M2_cmacs_s0",
-    "llvm.hexagon.M2.cmacs.s1" => "__builtin_HEXAGON_M2_cmacs_s1",
-    "llvm.hexagon.M2.cmacsc.s0" => "__builtin_HEXAGON_M2_cmacsc_s0",
-    "llvm.hexagon.M2.cmacsc.s1" => "__builtin_HEXAGON_M2_cmacsc_s1",
-    "llvm.hexagon.M2.cmpyi.s0" => "__builtin_HEXAGON_M2_cmpyi_s0",
-    "llvm.hexagon.M2.cmpyr.s0" => "__builtin_HEXAGON_M2_cmpyr_s0",
-    "llvm.hexagon.M2.cmpyrs.s0" => "__builtin_HEXAGON_M2_cmpyrs_s0",
-    "llvm.hexagon.M2.cmpyrs.s1" => "__builtin_HEXAGON_M2_cmpyrs_s1",
-    "llvm.hexagon.M2.cmpyrsc.s0" => "__builtin_HEXAGON_M2_cmpyrsc_s0",
-    "llvm.hexagon.M2.cmpyrsc.s1" => "__builtin_HEXAGON_M2_cmpyrsc_s1",
-    "llvm.hexagon.M2.cmpys.s0" => "__builtin_HEXAGON_M2_cmpys_s0",
-    "llvm.hexagon.M2.cmpys.s1" => "__builtin_HEXAGON_M2_cmpys_s1",
-    "llvm.hexagon.M2.cmpysc.s0" => "__builtin_HEXAGON_M2_cmpysc_s0",
-    "llvm.hexagon.M2.cmpysc.s1" => "__builtin_HEXAGON_M2_cmpysc_s1",
-    "llvm.hexagon.M2.cnacs.s0" => "__builtin_HEXAGON_M2_cnacs_s0",
-    "llvm.hexagon.M2.cnacs.s1" => "__builtin_HEXAGON_M2_cnacs_s1",
-    "llvm.hexagon.M2.cnacsc.s0" => "__builtin_HEXAGON_M2_cnacsc_s0",
-    "llvm.hexagon.M2.cnacsc.s1" => "__builtin_HEXAGON_M2_cnacsc_s1",
-    "llvm.hexagon.M2.dpmpyss.acc.s0" => "__builtin_HEXAGON_M2_dpmpyss_acc_s0",
-    "llvm.hexagon.M2.dpmpyss.nac.s0" => "__builtin_HEXAGON_M2_dpmpyss_nac_s0",
-    "llvm.hexagon.M2.dpmpyss.rnd.s0" => "__builtin_HEXAGON_M2_dpmpyss_rnd_s0",
-    "llvm.hexagon.M2.dpmpyss.s0" => "__builtin_HEXAGON_M2_dpmpyss_s0",
-    "llvm.hexagon.M2.dpmpyuu.acc.s0" => "__builtin_HEXAGON_M2_dpmpyuu_acc_s0",
-    "llvm.hexagon.M2.dpmpyuu.nac.s0" => "__builtin_HEXAGON_M2_dpmpyuu_nac_s0",
-    "llvm.hexagon.M2.dpmpyuu.s0" => "__builtin_HEXAGON_M2_dpmpyuu_s0",
-    "llvm.hexagon.M2.hmmpyh.rs1" => "__builtin_HEXAGON_M2_hmmpyh_rs1",
-    "llvm.hexagon.M2.hmmpyh.s1" => "__builtin_HEXAGON_M2_hmmpyh_s1",
-    "llvm.hexagon.M2.hmmpyl.rs1" => "__builtin_HEXAGON_M2_hmmpyl_rs1",
-    "llvm.hexagon.M2.hmmpyl.s1" => "__builtin_HEXAGON_M2_hmmpyl_s1",
-    "llvm.hexagon.M2.maci" => "__builtin_HEXAGON_M2_maci",
-    "llvm.hexagon.M2.macsin" => "__builtin_HEXAGON_M2_macsin",
-    "llvm.hexagon.M2.macsip" => "__builtin_HEXAGON_M2_macsip",
-    "llvm.hexagon.M2.mmachs.rs0" => "__builtin_HEXAGON_M2_mmachs_rs0",
-    "llvm.hexagon.M2.mmachs.rs1" => "__builtin_HEXAGON_M2_mmachs_rs1",
-    "llvm.hexagon.M2.mmachs.s0" => "__builtin_HEXAGON_M2_mmachs_s0",
-    "llvm.hexagon.M2.mmachs.s1" => "__builtin_HEXAGON_M2_mmachs_s1",
-    "llvm.hexagon.M2.mmacls.rs0" => "__builtin_HEXAGON_M2_mmacls_rs0",
-    "llvm.hexagon.M2.mmacls.rs1" => "__builtin_HEXAGON_M2_mmacls_rs1",
-    "llvm.hexagon.M2.mmacls.s0" => "__builtin_HEXAGON_M2_mmacls_s0",
-    "llvm.hexagon.M2.mmacls.s1" => "__builtin_HEXAGON_M2_mmacls_s1",
-    "llvm.hexagon.M2.mmacuhs.rs0" => "__builtin_HEXAGON_M2_mmacuhs_rs0",
-    "llvm.hexagon.M2.mmacuhs.rs1" => "__builtin_HEXAGON_M2_mmacuhs_rs1",
-    "llvm.hexagon.M2.mmacuhs.s0" => "__builtin_HEXAGON_M2_mmacuhs_s0",
-    "llvm.hexagon.M2.mmacuhs.s1" => "__builtin_HEXAGON_M2_mmacuhs_s1",
-    "llvm.hexagon.M2.mmaculs.rs0" => "__builtin_HEXAGON_M2_mmaculs_rs0",
-    "llvm.hexagon.M2.mmaculs.rs1" => "__builtin_HEXAGON_M2_mmaculs_rs1",
-    "llvm.hexagon.M2.mmaculs.s0" => "__builtin_HEXAGON_M2_mmaculs_s0",
-    "llvm.hexagon.M2.mmaculs.s1" => "__builtin_HEXAGON_M2_mmaculs_s1",
-    "llvm.hexagon.M2.mmpyh.rs0" => "__builtin_HEXAGON_M2_mmpyh_rs0",
-    "llvm.hexagon.M2.mmpyh.rs1" => "__builtin_HEXAGON_M2_mmpyh_rs1",
-    "llvm.hexagon.M2.mmpyh.s0" => "__builtin_HEXAGON_M2_mmpyh_s0",
-    "llvm.hexagon.M2.mmpyh.s1" => "__builtin_HEXAGON_M2_mmpyh_s1",
-    "llvm.hexagon.M2.mmpyl.rs0" => "__builtin_HEXAGON_M2_mmpyl_rs0",
-    "llvm.hexagon.M2.mmpyl.rs1" => "__builtin_HEXAGON_M2_mmpyl_rs1",
-    "llvm.hexagon.M2.mmpyl.s0" => "__builtin_HEXAGON_M2_mmpyl_s0",
-    "llvm.hexagon.M2.mmpyl.s1" => "__builtin_HEXAGON_M2_mmpyl_s1",
-    "llvm.hexagon.M2.mmpyuh.rs0" => "__builtin_HEXAGON_M2_mmpyuh_rs0",
-    "llvm.hexagon.M2.mmpyuh.rs1" => "__builtin_HEXAGON_M2_mmpyuh_rs1",
-    "llvm.hexagon.M2.mmpyuh.s0" => "__builtin_HEXAGON_M2_mmpyuh_s0",
-    "llvm.hexagon.M2.mmpyuh.s1" => "__builtin_HEXAGON_M2_mmpyuh_s1",
-    "llvm.hexagon.M2.mmpyul.rs0" => "__builtin_HEXAGON_M2_mmpyul_rs0",
-    "llvm.hexagon.M2.mmpyul.rs1" => "__builtin_HEXAGON_M2_mmpyul_rs1",
-    "llvm.hexagon.M2.mmpyul.s0" => "__builtin_HEXAGON_M2_mmpyul_s0",
-    "llvm.hexagon.M2.mmpyul.s1" => "__builtin_HEXAGON_M2_mmpyul_s1",
-    "llvm.hexagon.M2.mpy.acc.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_hh_s0",
-    "llvm.hexagon.M2.mpy.acc.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_hh_s1",
-    "llvm.hexagon.M2.mpy.acc.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_hl_s0",
-    "llvm.hexagon.M2.mpy.acc.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_hl_s1",
-    "llvm.hexagon.M2.mpy.acc.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_lh_s0",
-    "llvm.hexagon.M2.mpy.acc.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_lh_s1",
-    "llvm.hexagon.M2.mpy.acc.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_ll_s0",
-    "llvm.hexagon.M2.mpy.acc.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_ll_s1",
-    "llvm.hexagon.M2.mpy.acc.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s0",
-    "llvm.hexagon.M2.mpy.acc.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s1",
-    "llvm.hexagon.M2.mpy.acc.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s0",
-    "llvm.hexagon.M2.mpy.acc.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s1",
-    "llvm.hexagon.M2.mpy.acc.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s0",
-    "llvm.hexagon.M2.mpy.acc.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s1",
-    "llvm.hexagon.M2.mpy.acc.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s0",
-    "llvm.hexagon.M2.mpy.acc.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s1",
-    "llvm.hexagon.M2.mpy.hh.s0" => "__builtin_HEXAGON_M2_mpy_hh_s0",
-    "llvm.hexagon.M2.mpy.hh.s1" => "__builtin_HEXAGON_M2_mpy_hh_s1",
-    "llvm.hexagon.M2.mpy.hl.s0" => "__builtin_HEXAGON_M2_mpy_hl_s0",
-    "llvm.hexagon.M2.mpy.hl.s1" => "__builtin_HEXAGON_M2_mpy_hl_s1",
-    "llvm.hexagon.M2.mpy.lh.s0" => "__builtin_HEXAGON_M2_mpy_lh_s0",
-    "llvm.hexagon.M2.mpy.lh.s1" => "__builtin_HEXAGON_M2_mpy_lh_s1",
-    "llvm.hexagon.M2.mpy.ll.s0" => "__builtin_HEXAGON_M2_mpy_ll_s0",
-    "llvm.hexagon.M2.mpy.ll.s1" => "__builtin_HEXAGON_M2_mpy_ll_s1",
-    "llvm.hexagon.M2.mpy.nac.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_hh_s0",
-    "llvm.hexagon.M2.mpy.nac.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_hh_s1",
-    "llvm.hexagon.M2.mpy.nac.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_hl_s0",
-    "llvm.hexagon.M2.mpy.nac.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_hl_s1",
-    "llvm.hexagon.M2.mpy.nac.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_lh_s0",
-    "llvm.hexagon.M2.mpy.nac.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_lh_s1",
-    "llvm.hexagon.M2.mpy.nac.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_ll_s0",
-    "llvm.hexagon.M2.mpy.nac.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_ll_s1",
-    "llvm.hexagon.M2.mpy.nac.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s0",
-    "llvm.hexagon.M2.mpy.nac.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s1",
-    "llvm.hexagon.M2.mpy.nac.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s0",
-    "llvm.hexagon.M2.mpy.nac.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s1",
-    "llvm.hexagon.M2.mpy.nac.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s0",
-    "llvm.hexagon.M2.mpy.nac.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s1",
-    "llvm.hexagon.M2.mpy.nac.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s0",
-    "llvm.hexagon.M2.mpy.nac.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s1",
-    "llvm.hexagon.M2.mpy.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s0",
-    "llvm.hexagon.M2.mpy.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s1",
-    "llvm.hexagon.M2.mpy.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s0",
-    "llvm.hexagon.M2.mpy.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s1",
-    "llvm.hexagon.M2.mpy.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s0",
-    "llvm.hexagon.M2.mpy.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s1",
-    "llvm.hexagon.M2.mpy.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s0",
-    "llvm.hexagon.M2.mpy.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s1",
-    "llvm.hexagon.M2.mpy.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_hh_s0",
-    "llvm.hexagon.M2.mpy.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_hh_s1",
-    "llvm.hexagon.M2.mpy.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_hl_s0",
-    "llvm.hexagon.M2.mpy.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_hl_s1",
-    "llvm.hexagon.M2.mpy.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_lh_s0",
-    "llvm.hexagon.M2.mpy.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_lh_s1",
-    "llvm.hexagon.M2.mpy.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_ll_s0",
-    "llvm.hexagon.M2.mpy.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_ll_s1",
-    "llvm.hexagon.M2.mpy.sat.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0",
-    "llvm.hexagon.M2.mpy.sat.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1",
-    "llvm.hexagon.M2.mpy.sat.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0",
-    "llvm.hexagon.M2.mpy.sat.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1",
-    "llvm.hexagon.M2.mpy.sat.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0",
-    "llvm.hexagon.M2.mpy.sat.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1",
-    "llvm.hexagon.M2.mpy.sat.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0",
-    "llvm.hexagon.M2.mpy.sat.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1",
-    "llvm.hexagon.M2.mpy.up" => "__builtin_HEXAGON_M2_mpy_up",
-    "llvm.hexagon.M2.mpy.up.s1" => "__builtin_HEXAGON_M2_mpy_up_s1",
-    "llvm.hexagon.M2.mpy.up.s1.sat" => "__builtin_HEXAGON_M2_mpy_up_s1_sat",
-    "llvm.hexagon.M2.mpyd.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s0",
-    "llvm.hexagon.M2.mpyd.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s1",
-    "llvm.hexagon.M2.mpyd.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s0",
-    "llvm.hexagon.M2.mpyd.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s1",
-    "llvm.hexagon.M2.mpyd.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s0",
-    "llvm.hexagon.M2.mpyd.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s1",
-    "llvm.hexagon.M2.mpyd.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s0",
-    "llvm.hexagon.M2.mpyd.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s1",
-    "llvm.hexagon.M2.mpyd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_hh_s0",
-    "llvm.hexagon.M2.mpyd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_hh_s1",
-    "llvm.hexagon.M2.mpyd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_hl_s0",
-    "llvm.hexagon.M2.mpyd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_hl_s1",
-    "llvm.hexagon.M2.mpyd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_lh_s0",
-    "llvm.hexagon.M2.mpyd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_lh_s1",
-    "llvm.hexagon.M2.mpyd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_ll_s0",
-    "llvm.hexagon.M2.mpyd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_ll_s1",
-    "llvm.hexagon.M2.mpyd.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s0",
-    "llvm.hexagon.M2.mpyd.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s1",
-    "llvm.hexagon.M2.mpyd.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s0",
-    "llvm.hexagon.M2.mpyd.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s1",
-    "llvm.hexagon.M2.mpyd.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s0",
-    "llvm.hexagon.M2.mpyd.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s1",
-    "llvm.hexagon.M2.mpyd.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s0",
-    "llvm.hexagon.M2.mpyd.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s1",
-    "llvm.hexagon.M2.mpyd.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s0",
-    "llvm.hexagon.M2.mpyd.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s1",
-    "llvm.hexagon.M2.mpyd.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s0",
-    "llvm.hexagon.M2.mpyd.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s1",
-    "llvm.hexagon.M2.mpyd.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s0",
-    "llvm.hexagon.M2.mpyd.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s1",
-    "llvm.hexagon.M2.mpyd.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s0",
-    "llvm.hexagon.M2.mpyd.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s1",
-    "llvm.hexagon.M2.mpyi" => "__builtin_HEXAGON_M2_mpyi",
-    "llvm.hexagon.M2.mpysmi" => "__builtin_HEXAGON_M2_mpysmi",
-    "llvm.hexagon.M2.mpysu.up" => "__builtin_HEXAGON_M2_mpysu_up",
-    "llvm.hexagon.M2.mpyu.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s0",
-    "llvm.hexagon.M2.mpyu.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s1",
-    "llvm.hexagon.M2.mpyu.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s0",
-    "llvm.hexagon.M2.mpyu.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s1",
-    "llvm.hexagon.M2.mpyu.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s0",
-    "llvm.hexagon.M2.mpyu.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s1",
-    "llvm.hexagon.M2.mpyu.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s0",
-    "llvm.hexagon.M2.mpyu.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s1",
-    "llvm.hexagon.M2.mpyu.hh.s0" => "__builtin_HEXAGON_M2_mpyu_hh_s0",
-    "llvm.hexagon.M2.mpyu.hh.s1" => "__builtin_HEXAGON_M2_mpyu_hh_s1",
-    "llvm.hexagon.M2.mpyu.hl.s0" => "__builtin_HEXAGON_M2_mpyu_hl_s0",
-    "llvm.hexagon.M2.mpyu.hl.s1" => "__builtin_HEXAGON_M2_mpyu_hl_s1",
-    "llvm.hexagon.M2.mpyu.lh.s0" => "__builtin_HEXAGON_M2_mpyu_lh_s0",
-    "llvm.hexagon.M2.mpyu.lh.s1" => "__builtin_HEXAGON_M2_mpyu_lh_s1",
-    "llvm.hexagon.M2.mpyu.ll.s0" => "__builtin_HEXAGON_M2_mpyu_ll_s0",
-    "llvm.hexagon.M2.mpyu.ll.s1" => "__builtin_HEXAGON_M2_mpyu_ll_s1",
-    "llvm.hexagon.M2.mpyu.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s0",
-    "llvm.hexagon.M2.mpyu.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s1",
-    "llvm.hexagon.M2.mpyu.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s0",
-    "llvm.hexagon.M2.mpyu.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s1",
-    "llvm.hexagon.M2.mpyu.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s0",
-    "llvm.hexagon.M2.mpyu.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s1",
-    "llvm.hexagon.M2.mpyu.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s0",
-    "llvm.hexagon.M2.mpyu.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s1",
-    "llvm.hexagon.M2.mpyu.up" => "__builtin_HEXAGON_M2_mpyu_up",
-    "llvm.hexagon.M2.mpyud.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s0",
-    "llvm.hexagon.M2.mpyud.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s1",
-    "llvm.hexagon.M2.mpyud.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s0",
-    "llvm.hexagon.M2.mpyud.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s1",
-    "llvm.hexagon.M2.mpyud.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s0",
-    "llvm.hexagon.M2.mpyud.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s1",
-    "llvm.hexagon.M2.mpyud.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s0",
-    "llvm.hexagon.M2.mpyud.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s1",
-    "llvm.hexagon.M2.mpyud.hh.s0" => "__builtin_HEXAGON_M2_mpyud_hh_s0",
-    "llvm.hexagon.M2.mpyud.hh.s1" => "__builtin_HEXAGON_M2_mpyud_hh_s1",
-    "llvm.hexagon.M2.mpyud.hl.s0" => "__builtin_HEXAGON_M2_mpyud_hl_s0",
-    "llvm.hexagon.M2.mpyud.hl.s1" => "__builtin_HEXAGON_M2_mpyud_hl_s1",
-    "llvm.hexagon.M2.mpyud.lh.s0" => "__builtin_HEXAGON_M2_mpyud_lh_s0",
-    "llvm.hexagon.M2.mpyud.lh.s1" => "__builtin_HEXAGON_M2_mpyud_lh_s1",
-    "llvm.hexagon.M2.mpyud.ll.s0" => "__builtin_HEXAGON_M2_mpyud_ll_s0",
-    "llvm.hexagon.M2.mpyud.ll.s1" => "__builtin_HEXAGON_M2_mpyud_ll_s1",
-    "llvm.hexagon.M2.mpyud.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s0",
-    "llvm.hexagon.M2.mpyud.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s1",
-    "llvm.hexagon.M2.mpyud.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s0",
-    "llvm.hexagon.M2.mpyud.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s1",
-    "llvm.hexagon.M2.mpyud.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s0",
-    "llvm.hexagon.M2.mpyud.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s1",
-    "llvm.hexagon.M2.mpyud.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s0",
-    "llvm.hexagon.M2.mpyud.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s1",
-    "llvm.hexagon.M2.mpyui" => "__builtin_HEXAGON_M2_mpyui",
-    "llvm.hexagon.M2.nacci" => "__builtin_HEXAGON_M2_nacci",
-    "llvm.hexagon.M2.naccii" => "__builtin_HEXAGON_M2_naccii",
-    "llvm.hexagon.M2.subacc" => "__builtin_HEXAGON_M2_subacc",
-    "llvm.hexagon.M2.vabsdiffh" => "__builtin_HEXAGON_M2_vabsdiffh",
-    "llvm.hexagon.M2.vabsdiffw" => "__builtin_HEXAGON_M2_vabsdiffw",
-    "llvm.hexagon.M2.vcmac.s0.sat.i" => "__builtin_HEXAGON_M2_vcmac_s0_sat_i",
-    "llvm.hexagon.M2.vcmac.s0.sat.r" => "__builtin_HEXAGON_M2_vcmac_s0_sat_r",
-    "llvm.hexagon.M2.vcmpy.s0.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_i",
-    "llvm.hexagon.M2.vcmpy.s0.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_r",
-    "llvm.hexagon.M2.vcmpy.s1.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_i",
-    "llvm.hexagon.M2.vcmpy.s1.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_r",
-    "llvm.hexagon.M2.vdmacs.s0" => "__builtin_HEXAGON_M2_vdmacs_s0",
-    "llvm.hexagon.M2.vdmacs.s1" => "__builtin_HEXAGON_M2_vdmacs_s1",
-    "llvm.hexagon.M2.vdmpyrs.s0" => "__builtin_HEXAGON_M2_vdmpyrs_s0",
-    "llvm.hexagon.M2.vdmpyrs.s1" => "__builtin_HEXAGON_M2_vdmpyrs_s1",
-    "llvm.hexagon.M2.vdmpys.s0" => "__builtin_HEXAGON_M2_vdmpys_s0",
-    "llvm.hexagon.M2.vdmpys.s1" => "__builtin_HEXAGON_M2_vdmpys_s1",
-    "llvm.hexagon.M2.vmac2" => "__builtin_HEXAGON_M2_vmac2",
-    "llvm.hexagon.M2.vmac2es" => "__builtin_HEXAGON_M2_vmac2es",
-    "llvm.hexagon.M2.vmac2es.s0" => "__builtin_HEXAGON_M2_vmac2es_s0",
-    "llvm.hexagon.M2.vmac2es.s1" => "__builtin_HEXAGON_M2_vmac2es_s1",
-    "llvm.hexagon.M2.vmac2s.s0" => "__builtin_HEXAGON_M2_vmac2s_s0",
-    "llvm.hexagon.M2.vmac2s.s1" => "__builtin_HEXAGON_M2_vmac2s_s1",
-    "llvm.hexagon.M2.vmac2su.s0" => "__builtin_HEXAGON_M2_vmac2su_s0",
-    "llvm.hexagon.M2.vmac2su.s1" => "__builtin_HEXAGON_M2_vmac2su_s1",
-    "llvm.hexagon.M2.vmpy2es.s0" => "__builtin_HEXAGON_M2_vmpy2es_s0",
-    "llvm.hexagon.M2.vmpy2es.s1" => "__builtin_HEXAGON_M2_vmpy2es_s1",
-    "llvm.hexagon.M2.vmpy2s.s0" => "__builtin_HEXAGON_M2_vmpy2s_s0",
-    "llvm.hexagon.M2.vmpy2s.s0pack" => "__builtin_HEXAGON_M2_vmpy2s_s0pack",
-    "llvm.hexagon.M2.vmpy2s.s1" => "__builtin_HEXAGON_M2_vmpy2s_s1",
-    "llvm.hexagon.M2.vmpy2s.s1pack" => "__builtin_HEXAGON_M2_vmpy2s_s1pack",
-    "llvm.hexagon.M2.vmpy2su.s0" => "__builtin_HEXAGON_M2_vmpy2su_s0",
-    "llvm.hexagon.M2.vmpy2su.s1" => "__builtin_HEXAGON_M2_vmpy2su_s1",
-    "llvm.hexagon.M2.vraddh" => "__builtin_HEXAGON_M2_vraddh",
-    "llvm.hexagon.M2.vradduh" => "__builtin_HEXAGON_M2_vradduh",
-    "llvm.hexagon.M2.vrcmaci.s0" => "__builtin_HEXAGON_M2_vrcmaci_s0",
-    "llvm.hexagon.M2.vrcmaci.s0c" => "__builtin_HEXAGON_M2_vrcmaci_s0c",
-    "llvm.hexagon.M2.vrcmacr.s0" => "__builtin_HEXAGON_M2_vrcmacr_s0",
-    "llvm.hexagon.M2.vrcmacr.s0c" => "__builtin_HEXAGON_M2_vrcmacr_s0c",
-    "llvm.hexagon.M2.vrcmpyi.s0" => "__builtin_HEXAGON_M2_vrcmpyi_s0",
-    "llvm.hexagon.M2.vrcmpyi.s0c" => "__builtin_HEXAGON_M2_vrcmpyi_s0c",
-    "llvm.hexagon.M2.vrcmpyr.s0" => "__builtin_HEXAGON_M2_vrcmpyr_s0",
-    "llvm.hexagon.M2.vrcmpyr.s0c" => "__builtin_HEXAGON_M2_vrcmpyr_s0c",
-    "llvm.hexagon.M2.vrcmpys.acc.s1" => "__builtin_HEXAGON_M2_vrcmpys_acc_s1",
-    "llvm.hexagon.M2.vrcmpys.s1" => "__builtin_HEXAGON_M2_vrcmpys_s1",
-    "llvm.hexagon.M2.vrcmpys.s1rp" => "__builtin_HEXAGON_M2_vrcmpys_s1rp",
-    "llvm.hexagon.M2.vrmac.s0" => "__builtin_HEXAGON_M2_vrmac_s0",
-    "llvm.hexagon.M2.vrmpy.s0" => "__builtin_HEXAGON_M2_vrmpy_s0",
-    "llvm.hexagon.M2.xor.xacc" => "__builtin_HEXAGON_M2_xor_xacc",
-    "llvm.hexagon.M4.and.and" => "__builtin_HEXAGON_M4_and_and",
-    "llvm.hexagon.M4.and.andn" => "__builtin_HEXAGON_M4_and_andn",
-    "llvm.hexagon.M4.and.or" => "__builtin_HEXAGON_M4_and_or",
-    "llvm.hexagon.M4.and.xor" => "__builtin_HEXAGON_M4_and_xor",
-    "llvm.hexagon.M4.cmpyi.wh" => "__builtin_HEXAGON_M4_cmpyi_wh",
-    "llvm.hexagon.M4.cmpyi.whc" => "__builtin_HEXAGON_M4_cmpyi_whc",
-    "llvm.hexagon.M4.cmpyr.wh" => "__builtin_HEXAGON_M4_cmpyr_wh",
-    "llvm.hexagon.M4.cmpyr.whc" => "__builtin_HEXAGON_M4_cmpyr_whc",
-    "llvm.hexagon.M4.mac.up.s1.sat" => "__builtin_HEXAGON_M4_mac_up_s1_sat",
-    "llvm.hexagon.M4.mpyri.addi" => "__builtin_HEXAGON_M4_mpyri_addi",
-    "llvm.hexagon.M4.mpyri.addr" => "__builtin_HEXAGON_M4_mpyri_addr",
-    "llvm.hexagon.M4.mpyri.addr.u2" => "__builtin_HEXAGON_M4_mpyri_addr_u2",
-    "llvm.hexagon.M4.mpyrr.addi" => "__builtin_HEXAGON_M4_mpyrr_addi",
-    "llvm.hexagon.M4.mpyrr.addr" => "__builtin_HEXAGON_M4_mpyrr_addr",
-    "llvm.hexagon.M4.nac.up.s1.sat" => "__builtin_HEXAGON_M4_nac_up_s1_sat",
-    "llvm.hexagon.M4.or.and" => "__builtin_HEXAGON_M4_or_and",
-    "llvm.hexagon.M4.or.andn" => "__builtin_HEXAGON_M4_or_andn",
-    "llvm.hexagon.M4.or.or" => "__builtin_HEXAGON_M4_or_or",
-    "llvm.hexagon.M4.or.xor" => "__builtin_HEXAGON_M4_or_xor",
-    "llvm.hexagon.M4.pmpyw" => "__builtin_HEXAGON_M4_pmpyw",
-    "llvm.hexagon.M4.pmpyw.acc" => "__builtin_HEXAGON_M4_pmpyw_acc",
-    "llvm.hexagon.M4.vpmpyh" => "__builtin_HEXAGON_M4_vpmpyh",
-    "llvm.hexagon.M4.vpmpyh.acc" => "__builtin_HEXAGON_M4_vpmpyh_acc",
-    "llvm.hexagon.M4.vrmpyeh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s0",
-    "llvm.hexagon.M4.vrmpyeh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s1",
-    "llvm.hexagon.M4.vrmpyeh.s0" => "__builtin_HEXAGON_M4_vrmpyeh_s0",
-    "llvm.hexagon.M4.vrmpyeh.s1" => "__builtin_HEXAGON_M4_vrmpyeh_s1",
-    "llvm.hexagon.M4.vrmpyoh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s0",
-    "llvm.hexagon.M4.vrmpyoh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s1",
-    "llvm.hexagon.M4.vrmpyoh.s0" => "__builtin_HEXAGON_M4_vrmpyoh_s0",
-    "llvm.hexagon.M4.vrmpyoh.s1" => "__builtin_HEXAGON_M4_vrmpyoh_s1",
-    "llvm.hexagon.M4.xor.and" => "__builtin_HEXAGON_M4_xor_and",
-    "llvm.hexagon.M4.xor.andn" => "__builtin_HEXAGON_M4_xor_andn",
-    "llvm.hexagon.M4.xor.or" => "__builtin_HEXAGON_M4_xor_or",
-    "llvm.hexagon.M4.xor.xacc" => "__builtin_HEXAGON_M4_xor_xacc",
-    "llvm.hexagon.M5.vdmacbsu" => "__builtin_HEXAGON_M5_vdmacbsu",
-    "llvm.hexagon.M5.vdmpybsu" => "__builtin_HEXAGON_M5_vdmpybsu",
-    "llvm.hexagon.M5.vmacbsu" => "__builtin_HEXAGON_M5_vmacbsu",
-    "llvm.hexagon.M5.vmacbuu" => "__builtin_HEXAGON_M5_vmacbuu",
-    "llvm.hexagon.M5.vmpybsu" => "__builtin_HEXAGON_M5_vmpybsu",
-    "llvm.hexagon.M5.vmpybuu" => "__builtin_HEXAGON_M5_vmpybuu",
-    "llvm.hexagon.M5.vrmacbsu" => "__builtin_HEXAGON_M5_vrmacbsu",
-    "llvm.hexagon.M5.vrmacbuu" => "__builtin_HEXAGON_M5_vrmacbuu",
-    "llvm.hexagon.M5.vrmpybsu" => "__builtin_HEXAGON_M5_vrmpybsu",
-    "llvm.hexagon.M5.vrmpybuu" => "__builtin_HEXAGON_M5_vrmpybuu",
-    "llvm.hexagon.S2.addasl.rrri" => "__builtin_HEXAGON_S2_addasl_rrri",
-    "llvm.hexagon.S2.asl.i.p" => "__builtin_HEXAGON_S2_asl_i_p",
-    "llvm.hexagon.S2.asl.i.p.acc" => "__builtin_HEXAGON_S2_asl_i_p_acc",
-    "llvm.hexagon.S2.asl.i.p.and" => "__builtin_HEXAGON_S2_asl_i_p_and",
-    "llvm.hexagon.S2.asl.i.p.nac" => "__builtin_HEXAGON_S2_asl_i_p_nac",
-    "llvm.hexagon.S2.asl.i.p.or" => "__builtin_HEXAGON_S2_asl_i_p_or",
-    "llvm.hexagon.S2.asl.i.p.xacc" => "__builtin_HEXAGON_S2_asl_i_p_xacc",
-    "llvm.hexagon.S2.asl.i.r" => "__builtin_HEXAGON_S2_asl_i_r",
-    "llvm.hexagon.S2.asl.i.r.acc" => "__builtin_HEXAGON_S2_asl_i_r_acc",
-    "llvm.hexagon.S2.asl.i.r.and" => "__builtin_HEXAGON_S2_asl_i_r_and",
-    "llvm.hexagon.S2.asl.i.r.nac" => "__builtin_HEXAGON_S2_asl_i_r_nac",
-    "llvm.hexagon.S2.asl.i.r.or" => "__builtin_HEXAGON_S2_asl_i_r_or",
-    "llvm.hexagon.S2.asl.i.r.sat" => "__builtin_HEXAGON_S2_asl_i_r_sat",
-    "llvm.hexagon.S2.asl.i.r.xacc" => "__builtin_HEXAGON_S2_asl_i_r_xacc",
-    "llvm.hexagon.S2.asl.i.vh" => "__builtin_HEXAGON_S2_asl_i_vh",
-    "llvm.hexagon.S2.asl.i.vw" => "__builtin_HEXAGON_S2_asl_i_vw",
-    "llvm.hexagon.S2.asl.r.p" => "__builtin_HEXAGON_S2_asl_r_p",
-    "llvm.hexagon.S2.asl.r.p.acc" => "__builtin_HEXAGON_S2_asl_r_p_acc",
-    "llvm.hexagon.S2.asl.r.p.and" => "__builtin_HEXAGON_S2_asl_r_p_and",
-    "llvm.hexagon.S2.asl.r.p.nac" => "__builtin_HEXAGON_S2_asl_r_p_nac",
-    "llvm.hexagon.S2.asl.r.p.or" => "__builtin_HEXAGON_S2_asl_r_p_or",
-    "llvm.hexagon.S2.asl.r.p.xor" => "__builtin_HEXAGON_S2_asl_r_p_xor",
-    "llvm.hexagon.S2.asl.r.r" => "__builtin_HEXAGON_S2_asl_r_r",
-    "llvm.hexagon.S2.asl.r.r.acc" => "__builtin_HEXAGON_S2_asl_r_r_acc",
-    "llvm.hexagon.S2.asl.r.r.and" => "__builtin_HEXAGON_S2_asl_r_r_and",
-    "llvm.hexagon.S2.asl.r.r.nac" => "__builtin_HEXAGON_S2_asl_r_r_nac",
-    "llvm.hexagon.S2.asl.r.r.or" => "__builtin_HEXAGON_S2_asl_r_r_or",
-    "llvm.hexagon.S2.asl.r.r.sat" => "__builtin_HEXAGON_S2_asl_r_r_sat",
-    "llvm.hexagon.S2.asl.r.vh" => "__builtin_HEXAGON_S2_asl_r_vh",
-    "llvm.hexagon.S2.asl.r.vw" => "__builtin_HEXAGON_S2_asl_r_vw",
-    "llvm.hexagon.S2.asr.i.p" => "__builtin_HEXAGON_S2_asr_i_p",
-    "llvm.hexagon.S2.asr.i.p.acc" => "__builtin_HEXAGON_S2_asr_i_p_acc",
-    "llvm.hexagon.S2.asr.i.p.and" => "__builtin_HEXAGON_S2_asr_i_p_and",
-    "llvm.hexagon.S2.asr.i.p.nac" => "__builtin_HEXAGON_S2_asr_i_p_nac",
-    "llvm.hexagon.S2.asr.i.p.or" => "__builtin_HEXAGON_S2_asr_i_p_or",
-    "llvm.hexagon.S2.asr.i.p.rnd" => "__builtin_HEXAGON_S2_asr_i_p_rnd",
-    "llvm.hexagon.S2.asr.i.p.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax",
-    "llvm.hexagon.S2.asr.i.r" => "__builtin_HEXAGON_S2_asr_i_r",
-    "llvm.hexagon.S2.asr.i.r.acc" => "__builtin_HEXAGON_S2_asr_i_r_acc",
-    "llvm.hexagon.S2.asr.i.r.and" => "__builtin_HEXAGON_S2_asr_i_r_and",
-    "llvm.hexagon.S2.asr.i.r.nac" => "__builtin_HEXAGON_S2_asr_i_r_nac",
-    "llvm.hexagon.S2.asr.i.r.or" => "__builtin_HEXAGON_S2_asr_i_r_or",
-    "llvm.hexagon.S2.asr.i.r.rnd" => "__builtin_HEXAGON_S2_asr_i_r_rnd",
-    "llvm.hexagon.S2.asr.i.r.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax",
-    "llvm.hexagon.S2.asr.i.svw.trun" => "__builtin_HEXAGON_S2_asr_i_svw_trun",
-    "llvm.hexagon.S2.asr.i.vh" => "__builtin_HEXAGON_S2_asr_i_vh",
-    "llvm.hexagon.S2.asr.i.vw" => "__builtin_HEXAGON_S2_asr_i_vw",
-    "llvm.hexagon.S2.asr.r.p" => "__builtin_HEXAGON_S2_asr_r_p",
-    "llvm.hexagon.S2.asr.r.p.acc" => "__builtin_HEXAGON_S2_asr_r_p_acc",
-    "llvm.hexagon.S2.asr.r.p.and" => "__builtin_HEXAGON_S2_asr_r_p_and",
-    "llvm.hexagon.S2.asr.r.p.nac" => "__builtin_HEXAGON_S2_asr_r_p_nac",
-    "llvm.hexagon.S2.asr.r.p.or" => "__builtin_HEXAGON_S2_asr_r_p_or",
-    "llvm.hexagon.S2.asr.r.p.xor" => "__builtin_HEXAGON_S2_asr_r_p_xor",
-    "llvm.hexagon.S2.asr.r.r" => "__builtin_HEXAGON_S2_asr_r_r",
-    "llvm.hexagon.S2.asr.r.r.acc" => "__builtin_HEXAGON_S2_asr_r_r_acc",
-    "llvm.hexagon.S2.asr.r.r.and" => "__builtin_HEXAGON_S2_asr_r_r_and",
-    "llvm.hexagon.S2.asr.r.r.nac" => "__builtin_HEXAGON_S2_asr_r_r_nac",
-    "llvm.hexagon.S2.asr.r.r.or" => "__builtin_HEXAGON_S2_asr_r_r_or",
-    "llvm.hexagon.S2.asr.r.r.sat" => "__builtin_HEXAGON_S2_asr_r_r_sat",
-    "llvm.hexagon.S2.asr.r.svw.trun" => "__builtin_HEXAGON_S2_asr_r_svw_trun",
-    "llvm.hexagon.S2.asr.r.vh" => "__builtin_HEXAGON_S2_asr_r_vh",
-    "llvm.hexagon.S2.asr.r.vw" => "__builtin_HEXAGON_S2_asr_r_vw",
-    "llvm.hexagon.S2.brev" => "__builtin_HEXAGON_S2_brev",
-    "llvm.hexagon.S2.brevp" => "__builtin_HEXAGON_S2_brevp",
-    "llvm.hexagon.S2.cl0" => "__builtin_HEXAGON_S2_cl0",
-    "llvm.hexagon.S2.cl0p" => "__builtin_HEXAGON_S2_cl0p",
-    "llvm.hexagon.S2.cl1" => "__builtin_HEXAGON_S2_cl1",
-    "llvm.hexagon.S2.cl1p" => "__builtin_HEXAGON_S2_cl1p",
-    "llvm.hexagon.S2.clb" => "__builtin_HEXAGON_S2_clb",
-    "llvm.hexagon.S2.clbnorm" => "__builtin_HEXAGON_S2_clbnorm",
-    "llvm.hexagon.S2.clbp" => "__builtin_HEXAGON_S2_clbp",
-    "llvm.hexagon.S2.clrbit.i" => "__builtin_HEXAGON_S2_clrbit_i",
-    "llvm.hexagon.S2.clrbit.r" => "__builtin_HEXAGON_S2_clrbit_r",
-    "llvm.hexagon.S2.ct0" => "__builtin_HEXAGON_S2_ct0",
-    "llvm.hexagon.S2.ct0p" => "__builtin_HEXAGON_S2_ct0p",
-    "llvm.hexagon.S2.ct1" => "__builtin_HEXAGON_S2_ct1",
-    "llvm.hexagon.S2.ct1p" => "__builtin_HEXAGON_S2_ct1p",
-    "llvm.hexagon.S2.deinterleave" => "__builtin_HEXAGON_S2_deinterleave",
-    "llvm.hexagon.S2.extractu" => "__builtin_HEXAGON_S2_extractu",
-    "llvm.hexagon.S2.extractu.rp" => "__builtin_HEXAGON_S2_extractu_rp",
-    "llvm.hexagon.S2.extractup" => "__builtin_HEXAGON_S2_extractup",
-    "llvm.hexagon.S2.extractup.rp" => "__builtin_HEXAGON_S2_extractup_rp",
-    "llvm.hexagon.S2.insert" => "__builtin_HEXAGON_S2_insert",
-    "llvm.hexagon.S2.insert.rp" => "__builtin_HEXAGON_S2_insert_rp",
-    "llvm.hexagon.S2.insertp" => "__builtin_HEXAGON_S2_insertp",
-    "llvm.hexagon.S2.insertp.rp" => "__builtin_HEXAGON_S2_insertp_rp",
-    "llvm.hexagon.S2.interleave" => "__builtin_HEXAGON_S2_interleave",
-    "llvm.hexagon.S2.lfsp" => "__builtin_HEXAGON_S2_lfsp",
-    "llvm.hexagon.S2.lsl.r.p" => "__builtin_HEXAGON_S2_lsl_r_p",
-    "llvm.hexagon.S2.lsl.r.p.acc" => "__builtin_HEXAGON_S2_lsl_r_p_acc",
-    "llvm.hexagon.S2.lsl.r.p.and" => "__builtin_HEXAGON_S2_lsl_r_p_and",
-    "llvm.hexagon.S2.lsl.r.p.nac" => "__builtin_HEXAGON_S2_lsl_r_p_nac",
-    "llvm.hexagon.S2.lsl.r.p.or" => "__builtin_HEXAGON_S2_lsl_r_p_or",
-    "llvm.hexagon.S2.lsl.r.p.xor" => "__builtin_HEXAGON_S2_lsl_r_p_xor",
-    "llvm.hexagon.S2.lsl.r.r" => "__builtin_HEXAGON_S2_lsl_r_r",
-    "llvm.hexagon.S2.lsl.r.r.acc" => "__builtin_HEXAGON_S2_lsl_r_r_acc",
-    "llvm.hexagon.S2.lsl.r.r.and" => "__builtin_HEXAGON_S2_lsl_r_r_and",
-    "llvm.hexagon.S2.lsl.r.r.nac" => "__builtin_HEXAGON_S2_lsl_r_r_nac",
-    "llvm.hexagon.S2.lsl.r.r.or" => "__builtin_HEXAGON_S2_lsl_r_r_or",
-    "llvm.hexagon.S2.lsl.r.vh" => "__builtin_HEXAGON_S2_lsl_r_vh",
-    "llvm.hexagon.S2.lsl.r.vw" => "__builtin_HEXAGON_S2_lsl_r_vw",
-    "llvm.hexagon.S2.lsr.i.p" => "__builtin_HEXAGON_S2_lsr_i_p",
-    "llvm.hexagon.S2.lsr.i.p.acc" => "__builtin_HEXAGON_S2_lsr_i_p_acc",
-    "llvm.hexagon.S2.lsr.i.p.and" => "__builtin_HEXAGON_S2_lsr_i_p_and",
-    "llvm.hexagon.S2.lsr.i.p.nac" => "__builtin_HEXAGON_S2_lsr_i_p_nac",
-    "llvm.hexagon.S2.lsr.i.p.or" => "__builtin_HEXAGON_S2_lsr_i_p_or",
-    "llvm.hexagon.S2.lsr.i.p.xacc" => "__builtin_HEXAGON_S2_lsr_i_p_xacc",
-    "llvm.hexagon.S2.lsr.i.r" => "__builtin_HEXAGON_S2_lsr_i_r",
-    "llvm.hexagon.S2.lsr.i.r.acc" => "__builtin_HEXAGON_S2_lsr_i_r_acc",
-    "llvm.hexagon.S2.lsr.i.r.and" => "__builtin_HEXAGON_S2_lsr_i_r_and",
-    "llvm.hexagon.S2.lsr.i.r.nac" => "__builtin_HEXAGON_S2_lsr_i_r_nac",
-    "llvm.hexagon.S2.lsr.i.r.or" => "__builtin_HEXAGON_S2_lsr_i_r_or",
-    "llvm.hexagon.S2.lsr.i.r.xacc" => "__builtin_HEXAGON_S2_lsr_i_r_xacc",
-    "llvm.hexagon.S2.lsr.i.vh" => "__builtin_HEXAGON_S2_lsr_i_vh",
-    "llvm.hexagon.S2.lsr.i.vw" => "__builtin_HEXAGON_S2_lsr_i_vw",
-    "llvm.hexagon.S2.lsr.r.p" => "__builtin_HEXAGON_S2_lsr_r_p",
-    "llvm.hexagon.S2.lsr.r.p.acc" => "__builtin_HEXAGON_S2_lsr_r_p_acc",
-    "llvm.hexagon.S2.lsr.r.p.and" => "__builtin_HEXAGON_S2_lsr_r_p_and",
-    "llvm.hexagon.S2.lsr.r.p.nac" => "__builtin_HEXAGON_S2_lsr_r_p_nac",
-    "llvm.hexagon.S2.lsr.r.p.or" => "__builtin_HEXAGON_S2_lsr_r_p_or",
-    "llvm.hexagon.S2.lsr.r.p.xor" => "__builtin_HEXAGON_S2_lsr_r_p_xor",
-    "llvm.hexagon.S2.lsr.r.r" => "__builtin_HEXAGON_S2_lsr_r_r",
-    "llvm.hexagon.S2.lsr.r.r.acc" => "__builtin_HEXAGON_S2_lsr_r_r_acc",
-    "llvm.hexagon.S2.lsr.r.r.and" => "__builtin_HEXAGON_S2_lsr_r_r_and",
-    "llvm.hexagon.S2.lsr.r.r.nac" => "__builtin_HEXAGON_S2_lsr_r_r_nac",
-    "llvm.hexagon.S2.lsr.r.r.or" => "__builtin_HEXAGON_S2_lsr_r_r_or",
-    "llvm.hexagon.S2.lsr.r.vh" => "__builtin_HEXAGON_S2_lsr_r_vh",
-    "llvm.hexagon.S2.lsr.r.vw" => "__builtin_HEXAGON_S2_lsr_r_vw",
-    "llvm.hexagon.S2.packhl" => "__builtin_HEXAGON_S2_packhl",
-    "llvm.hexagon.S2.parityp" => "__builtin_HEXAGON_S2_parityp",
-    "llvm.hexagon.S2.setbit.i" => "__builtin_HEXAGON_S2_setbit_i",
-    "llvm.hexagon.S2.setbit.r" => "__builtin_HEXAGON_S2_setbit_r",
-    "llvm.hexagon.S2.shuffeb" => "__builtin_HEXAGON_S2_shuffeb",
-    "llvm.hexagon.S2.shuffeh" => "__builtin_HEXAGON_S2_shuffeh",
-    "llvm.hexagon.S2.shuffob" => "__builtin_HEXAGON_S2_shuffob",
-    "llvm.hexagon.S2.shuffoh" => "__builtin_HEXAGON_S2_shuffoh",
-    "llvm.hexagon.S2.svsathb" => "__builtin_HEXAGON_S2_svsathb",
-    "llvm.hexagon.S2.svsathub" => "__builtin_HEXAGON_S2_svsathub",
-    "llvm.hexagon.S2.tableidxb.goodsyntax" => "__builtin_HEXAGON_S2_tableidxb_goodsyntax",
-    "llvm.hexagon.S2.tableidxd.goodsyntax" => "__builtin_HEXAGON_S2_tableidxd_goodsyntax",
-    "llvm.hexagon.S2.tableidxh.goodsyntax" => "__builtin_HEXAGON_S2_tableidxh_goodsyntax",
-    "llvm.hexagon.S2.tableidxw.goodsyntax" => "__builtin_HEXAGON_S2_tableidxw_goodsyntax",
-    "llvm.hexagon.S2.togglebit.i" => "__builtin_HEXAGON_S2_togglebit_i",
-    "llvm.hexagon.S2.togglebit.r" => "__builtin_HEXAGON_S2_togglebit_r",
-    "llvm.hexagon.S2.tstbit.i" => "__builtin_HEXAGON_S2_tstbit_i",
-    "llvm.hexagon.S2.tstbit.r" => "__builtin_HEXAGON_S2_tstbit_r",
-    "llvm.hexagon.S2.valignib" => "__builtin_HEXAGON_S2_valignib",
-    "llvm.hexagon.S2.valignrb" => "__builtin_HEXAGON_S2_valignrb",
-    "llvm.hexagon.S2.vcnegh" => "__builtin_HEXAGON_S2_vcnegh",
-    "llvm.hexagon.S2.vcrotate" => "__builtin_HEXAGON_S2_vcrotate",
-    "llvm.hexagon.S2.vrcnegh" => "__builtin_HEXAGON_S2_vrcnegh",
-    "llvm.hexagon.S2.vrndpackwh" => "__builtin_HEXAGON_S2_vrndpackwh",
-    "llvm.hexagon.S2.vrndpackwhs" => "__builtin_HEXAGON_S2_vrndpackwhs",
-    "llvm.hexagon.S2.vsathb" => "__builtin_HEXAGON_S2_vsathb",
-    "llvm.hexagon.S2.vsathb.nopack" => "__builtin_HEXAGON_S2_vsathb_nopack",
-    "llvm.hexagon.S2.vsathub" => "__builtin_HEXAGON_S2_vsathub",
-    "llvm.hexagon.S2.vsathub.nopack" => "__builtin_HEXAGON_S2_vsathub_nopack",
-    "llvm.hexagon.S2.vsatwh" => "__builtin_HEXAGON_S2_vsatwh",
-    "llvm.hexagon.S2.vsatwh.nopack" => "__builtin_HEXAGON_S2_vsatwh_nopack",
-    "llvm.hexagon.S2.vsatwuh" => "__builtin_HEXAGON_S2_vsatwuh",
-    "llvm.hexagon.S2.vsatwuh.nopack" => "__builtin_HEXAGON_S2_vsatwuh_nopack",
-    "llvm.hexagon.S2.vsplatrb" => "__builtin_HEXAGON_S2_vsplatrb",
-    "llvm.hexagon.S2.vsplatrh" => "__builtin_HEXAGON_S2_vsplatrh",
-    "llvm.hexagon.S2.vspliceib" => "__builtin_HEXAGON_S2_vspliceib",
-    "llvm.hexagon.S2.vsplicerb" => "__builtin_HEXAGON_S2_vsplicerb",
-    "llvm.hexagon.S2.vsxtbh" => "__builtin_HEXAGON_S2_vsxtbh",
-    "llvm.hexagon.S2.vsxthw" => "__builtin_HEXAGON_S2_vsxthw",
-    "llvm.hexagon.S2.vtrunehb" => "__builtin_HEXAGON_S2_vtrunehb",
-    "llvm.hexagon.S2.vtrunewh" => "__builtin_HEXAGON_S2_vtrunewh",
-    "llvm.hexagon.S2.vtrunohb" => "__builtin_HEXAGON_S2_vtrunohb",
-    "llvm.hexagon.S2.vtrunowh" => "__builtin_HEXAGON_S2_vtrunowh",
-    "llvm.hexagon.S2.vzxtbh" => "__builtin_HEXAGON_S2_vzxtbh",
-    "llvm.hexagon.S2.vzxthw" => "__builtin_HEXAGON_S2_vzxthw",
-    "llvm.hexagon.S4.addaddi" => "__builtin_HEXAGON_S4_addaddi",
-    "llvm.hexagon.S4.addi.asl.ri" => "__builtin_HEXAGON_S4_addi_asl_ri",
-    "llvm.hexagon.S4.addi.lsr.ri" => "__builtin_HEXAGON_S4_addi_lsr_ri",
-    "llvm.hexagon.S4.andi.asl.ri" => "__builtin_HEXAGON_S4_andi_asl_ri",
-    "llvm.hexagon.S4.andi.lsr.ri" => "__builtin_HEXAGON_S4_andi_lsr_ri",
-    "llvm.hexagon.S4.clbaddi" => "__builtin_HEXAGON_S4_clbaddi",
-    "llvm.hexagon.S4.clbpaddi" => "__builtin_HEXAGON_S4_clbpaddi",
-    "llvm.hexagon.S4.clbpnorm" => "__builtin_HEXAGON_S4_clbpnorm",
-    "llvm.hexagon.S4.extract" => "__builtin_HEXAGON_S4_extract",
-    "llvm.hexagon.S4.extract.rp" => "__builtin_HEXAGON_S4_extract_rp",
-    "llvm.hexagon.S4.extractp" => "__builtin_HEXAGON_S4_extractp",
-    "llvm.hexagon.S4.extractp.rp" => "__builtin_HEXAGON_S4_extractp_rp",
-    "llvm.hexagon.S4.lsli" => "__builtin_HEXAGON_S4_lsli",
-    "llvm.hexagon.S4.ntstbit.i" => "__builtin_HEXAGON_S4_ntstbit_i",
-    "llvm.hexagon.S4.ntstbit.r" => "__builtin_HEXAGON_S4_ntstbit_r",
-    "llvm.hexagon.S4.or.andi" => "__builtin_HEXAGON_S4_or_andi",
-    "llvm.hexagon.S4.or.andix" => "__builtin_HEXAGON_S4_or_andix",
-    "llvm.hexagon.S4.or.ori" => "__builtin_HEXAGON_S4_or_ori",
-    "llvm.hexagon.S4.ori.asl.ri" => "__builtin_HEXAGON_S4_ori_asl_ri",
-    "llvm.hexagon.S4.ori.lsr.ri" => "__builtin_HEXAGON_S4_ori_lsr_ri",
-    "llvm.hexagon.S4.parity" => "__builtin_HEXAGON_S4_parity",
-    "llvm.hexagon.S4.subaddi" => "__builtin_HEXAGON_S4_subaddi",
-    "llvm.hexagon.S4.subi.asl.ri" => "__builtin_HEXAGON_S4_subi_asl_ri",
-    "llvm.hexagon.S4.subi.lsr.ri" => "__builtin_HEXAGON_S4_subi_lsr_ri",
-    "llvm.hexagon.S4.vrcrotate" => "__builtin_HEXAGON_S4_vrcrotate",
-    "llvm.hexagon.S4.vrcrotate.acc" => "__builtin_HEXAGON_S4_vrcrotate_acc",
-    "llvm.hexagon.S4.vxaddsubh" => "__builtin_HEXAGON_S4_vxaddsubh",
-    "llvm.hexagon.S4.vxaddsubhr" => "__builtin_HEXAGON_S4_vxaddsubhr",
-    "llvm.hexagon.S4.vxaddsubw" => "__builtin_HEXAGON_S4_vxaddsubw",
-    "llvm.hexagon.S4.vxsubaddh" => "__builtin_HEXAGON_S4_vxsubaddh",
-    "llvm.hexagon.S4.vxsubaddhr" => "__builtin_HEXAGON_S4_vxsubaddhr",
-    "llvm.hexagon.S4.vxsubaddw" => "__builtin_HEXAGON_S4_vxsubaddw",
-    "llvm.hexagon.S5.asrhub.rnd.sat.goodsyntax" => "__builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax",
-    "llvm.hexagon.S5.asrhub.sat" => "__builtin_HEXAGON_S5_asrhub_sat",
-    "llvm.hexagon.S5.popcountp" => "__builtin_HEXAGON_S5_popcountp",
-    "llvm.hexagon.S5.vasrhrnd.goodsyntax" => "__builtin_HEXAGON_S5_vasrhrnd_goodsyntax",
-    "llvm.hexagon.SI.to.SXTHI.asrh" => "__builtin_SI_to_SXTHI_asrh",
-    "llvm.hexagon.circ.ldd" => "__builtin_circ_ldd",
+    "llvm.arm.usat16" => "__builtin_arm_usat16",
+    "llvm.arm.usax" => "__builtin_arm_usax",
+    "llvm.arm.usub16" => "__builtin_arm_usub16",
+    "llvm.arm.usub8" => "__builtin_arm_usub8",
+    "llvm.arm.uxtab16" => "__builtin_arm_uxtab16",
+    "llvm.arm.uxtb16" => "__builtin_arm_uxtb16",
+    // bpf
+    "llvm.bpf.btf.type.id" => "__builtin_bpf_btf_type_id",
+    "llvm.bpf.compare" => "__builtin_bpf_compare",
+    "llvm.bpf.load.byte" => "__builtin_bpf_load_byte",
+    "llvm.bpf.load.half" => "__builtin_bpf_load_half",
+    "llvm.bpf.load.word" => "__builtin_bpf_load_word",
+    "llvm.bpf.passthrough" => "__builtin_bpf_passthrough",
+    "llvm.bpf.preserve.enum.value" => "__builtin_bpf_preserve_enum_value",
+    "llvm.bpf.preserve.field.info" => "__builtin_bpf_preserve_field_info",
+    "llvm.bpf.preserve.type.info" => "__builtin_bpf_preserve_type_info",
+    "llvm.bpf.pseudo" => "__builtin_bpf_pseudo",
     // mips
+    "llvm.mips.absq.s.ph" => "__builtin_mips_absq_s_ph",
+    "llvm.mips.absq.s.qb" => "__builtin_mips_absq_s_qb",
+    "llvm.mips.absq.s.w" => "__builtin_mips_absq_s_w",
     "llvm.mips.add.a.b" => "__builtin_msa_add_a_b",
     "llvm.mips.add.a.d" => "__builtin_msa_add_a_d",
     "llvm.mips.add.a.h" => "__builtin_msa_add_a_h",
     "llvm.mips.add.a.w" => "__builtin_msa_add_a_w",
+    "llvm.mips.addq.ph" => "__builtin_mips_addq_ph",
+    "llvm.mips.addq.s.ph" => "__builtin_mips_addq_s_ph",
+    "llvm.mips.addq.s.w" => "__builtin_mips_addq_s_w",
+    "llvm.mips.addqh.ph" => "__builtin_mips_addqh_ph",
+    "llvm.mips.addqh.r.ph" => "__builtin_mips_addqh_r_ph",
+    "llvm.mips.addqh.r.w" => "__builtin_mips_addqh_r_w",
+    "llvm.mips.addqh.w" => "__builtin_mips_addqh_w",
     "llvm.mips.adds.a.b" => "__builtin_msa_adds_a_b",
     "llvm.mips.adds.a.d" => "__builtin_msa_adds_a_d",
     "llvm.mips.adds.a.h" => "__builtin_msa_adds_a_h",
@@ -1067,6 +384,9 @@ match name {
     "llvm.mips.clti.u.d" => "__builtin_msa_clti_u_d",
     "llvm.mips.clti.u.h" => "__builtin_msa_clti_u_h",
     "llvm.mips.clti.u.w" => "__builtin_msa_clti_u_w",
+    "llvm.mips.cmp.eq.ph" => "__builtin_mips_cmp_eq_ph",
+    "llvm.mips.cmp.le.ph" => "__builtin_mips_cmp_le_ph",
+    "llvm.mips.cmp.lt.ph" => "__builtin_mips_cmp_lt_ph",
     "llvm.mips.cmpgdu.eq.qb" => "__builtin_mips_cmpgdu_eq_qb",
     "llvm.mips.cmpgdu.le.qb" => "__builtin_mips_cmpgdu_le_qb",
     "llvm.mips.cmpgdu.lt.qb" => "__builtin_mips_cmpgdu_lt_qb",
@@ -1107,10 +427,18 @@ match name {
     "llvm.mips.dpadd.u.d" => "__builtin_msa_dpadd_u_d",
     "llvm.mips.dpadd.u.h" => "__builtin_msa_dpadd_u_h",
     "llvm.mips.dpadd.u.w" => "__builtin_msa_dpadd_u_w",
+    "llvm.mips.dpaq.s.w.ph" => "__builtin_mips_dpaq_s_w_ph",
+    "llvm.mips.dpaq.sa.l.w" => "__builtin_mips_dpaq_sa_l_w",
+    "llvm.mips.dpaqx.s.w.ph" => "__builtin_mips_dpaqx_s_w_ph",
+    "llvm.mips.dpaqx.sa.w.ph" => "__builtin_mips_dpaqx_sa_w_ph",
     "llvm.mips.dpau.h.qbl" => "__builtin_mips_dpau_h_qbl",
     "llvm.mips.dpau.h.qbr" => "__builtin_mips_dpau_h_qbr",
     "llvm.mips.dpax.w.ph" => "__builtin_mips_dpax_w_ph",
     "llvm.mips.dps.w.ph" => "__builtin_mips_dps_w_ph",
+    "llvm.mips.dpsq.s.w.ph" => "__builtin_mips_dpsq_s_w_ph",
+    "llvm.mips.dpsq.sa.l.w" => "__builtin_mips_dpsq_sa_l_w",
+    "llvm.mips.dpsqx.s.w.ph" => "__builtin_mips_dpsqx_s_w_ph",
+    "llvm.mips.dpsqx.sa.w.ph" => "__builtin_mips_dpsqx_sa_w_ph",
     "llvm.mips.dpsu.h.qbl" => "__builtin_mips_dpsu_h_qbl",
     "llvm.mips.dpsu.h.qbr" => "__builtin_mips_dpsu_h_qbr",
     "llvm.mips.dpsub.s.d" => "__builtin_msa_dpsub_s_d",
@@ -1154,11 +482,14 @@ match name {
     "llvm.mips.fcune.w" => "__builtin_msa_fcune_w",
     "llvm.mips.fdiv.d" => "__builtin_msa_fdiv_d",
     "llvm.mips.fdiv.w" => "__builtin_msa_fdiv_w",
+    "llvm.mips.fexdo.h" => "__builtin_msa_fexdo_h",
     "llvm.mips.fexdo.w" => "__builtin_msa_fexdo_w",
     "llvm.mips.fexp2.d" => "__builtin_msa_fexp2_d",
     "llvm.mips.fexp2.w" => "__builtin_msa_fexp2_w",
     "llvm.mips.fexupl.d" => "__builtin_msa_fexupl_d",
+    "llvm.mips.fexupl.w" => "__builtin_msa_fexupl_w",
     "llvm.mips.fexupr.d" => "__builtin_msa_fexupr_d",
+    "llvm.mips.fexupr.w" => "__builtin_msa_fexupr_w",
     "llvm.mips.ffint.s.d" => "__builtin_msa_ffint_s_d",
     "llvm.mips.ffint.s.w" => "__builtin_msa_ffint_s_w",
     "llvm.mips.ffint.u.d" => "__builtin_msa_ffint_u_d",
@@ -1275,6 +606,8 @@ match name {
     "llvm.mips.ldi.d" => "__builtin_msa_ldi_d",
     "llvm.mips.ldi.h" => "__builtin_msa_ldi_h",
     "llvm.mips.ldi.w" => "__builtin_msa_ldi_w",
+    "llvm.mips.ldr.d" => "__builtin_msa_ldr_d",
+    "llvm.mips.ldr.w" => "__builtin_msa_ldr_w",
     "llvm.mips.lhx" => "__builtin_mips_lhx",
     "llvm.mips.lsa" => "__builtin_mips_lsa",
     "llvm.mips.lwx" => "__builtin_mips_lwx",
@@ -1288,6 +621,10 @@ match name {
     "llvm.mips.maddv.d" => "__builtin_msa_maddv_d",
     "llvm.mips.maddv.h" => "__builtin_msa_maddv_h",
     "llvm.mips.maddv.w" => "__builtin_msa_maddv_w",
+    "llvm.mips.maq.s.w.phl" => "__builtin_mips_maq_s_w_phl",
+    "llvm.mips.maq.s.w.phr" => "__builtin_mips_maq_s_w_phr",
+    "llvm.mips.maq.sa.w.phl" => "__builtin_mips_maq_sa_w_phl",
+    "llvm.mips.maq.sa.w.phr" => "__builtin_mips_maq_sa_w_phr",
     "llvm.mips.max.a.b" => "__builtin_msa_max_a_b",
     "llvm.mips.max.a.d" => "__builtin_msa_max_a_d",
     "llvm.mips.max.a.h" => "__builtin_msa_max_a_h",
@@ -1353,9 +690,18 @@ match name {
     "llvm.mips.mul.q.h" => "__builtin_msa_mul_q_h",
     "llvm.mips.mul.q.w" => "__builtin_msa_mul_q_w",
     "llvm.mips.mul.s.ph" => "__builtin_mips_mul_s_ph",
+    "llvm.mips.muleq.s.w.phl" => "__builtin_mips_muleq_s_w_phl",
+    "llvm.mips.muleq.s.w.phr" => "__builtin_mips_muleq_s_w_phr",
+    "llvm.mips.muleu.s.ph.qbl" => "__builtin_mips_muleu_s_ph_qbl",
+    "llvm.mips.muleu.s.ph.qbr" => "__builtin_mips_muleu_s_ph_qbr",
+    "llvm.mips.mulq.rs.ph" => "__builtin_mips_mulq_rs_ph",
+    "llvm.mips.mulq.rs.w" => "__builtin_mips_mulq_rs_w",
+    "llvm.mips.mulq.s.ph" => "__builtin_mips_mulq_s_ph",
+    "llvm.mips.mulq.s.w" => "__builtin_mips_mulq_s_w",
     "llvm.mips.mulr.q.h" => "__builtin_msa_mulr_q_h",
     "llvm.mips.mulr.q.w" => "__builtin_msa_mulr_q_w",
     "llvm.mips.mulsa.w.ph" => "__builtin_mips_mulsa_w_ph",
+    "llvm.mips.mulsaq.s.w.ph" => "__builtin_mips_mulsaq_s_w_ph",
     "llvm.mips.mult" => "__builtin_mips_mult",
     "llvm.mips.multu" => "__builtin_mips_multu",
     "llvm.mips.mulv.b" => "__builtin_msa_mulv_b",
@@ -1374,6 +720,7 @@ match name {
     "llvm.mips.nori.b" => "__builtin_msa_nori_b",
     "llvm.mips.or.v" => "__builtin_msa_or_v",
     "llvm.mips.ori.b" => "__builtin_msa_ori_b",
+    "llvm.mips.packrl.ph" => "__builtin_mips_packrl_ph",
     "llvm.mips.pckev.b" => "__builtin_msa_pckev_b",
     "llvm.mips.pckev.d" => "__builtin_msa_pckev_d",
     "llvm.mips.pckev.h" => "__builtin_msa_pckev_h",
@@ -1386,13 +733,29 @@ match name {
     "llvm.mips.pcnt.d" => "__builtin_msa_pcnt_d",
     "llvm.mips.pcnt.h" => "__builtin_msa_pcnt_h",
     "llvm.mips.pcnt.w" => "__builtin_msa_pcnt_w",
+    "llvm.mips.pick.ph" => "__builtin_mips_pick_ph",
     "llvm.mips.pick.qb" => "__builtin_mips_pick_qb",
+    "llvm.mips.preceq.w.phl" => "__builtin_mips_preceq_w_phl",
+    "llvm.mips.preceq.w.phr" => "__builtin_mips_preceq_w_phr",
+    "llvm.mips.precequ.ph.qbl" => "__builtin_mips_precequ_ph_qbl",
+    "llvm.mips.precequ.ph.qbla" => "__builtin_mips_precequ_ph_qbla",
+    "llvm.mips.precequ.ph.qbr" => "__builtin_mips_precequ_ph_qbr",
+    "llvm.mips.precequ.ph.qbra" => "__builtin_mips_precequ_ph_qbra",
+    "llvm.mips.preceu.ph.qbl" => "__builtin_mips_preceu_ph_qbl",
+    "llvm.mips.preceu.ph.qbla" => "__builtin_mips_preceu_ph_qbla",
+    "llvm.mips.preceu.ph.qbr" => "__builtin_mips_preceu_ph_qbr",
+    "llvm.mips.preceu.ph.qbra" => "__builtin_mips_preceu_ph_qbra",
     "llvm.mips.precr.qb.ph" => "__builtin_mips_precr_qb_ph",
     "llvm.mips.precr.sra.ph.w" => "__builtin_mips_precr_sra_ph_w",
     "llvm.mips.precr.sra.r.ph.w" => "__builtin_mips_precr_sra_r_ph_w",
+    "llvm.mips.precrq.ph.w" => "__builtin_mips_precrq_ph_w",
+    "llvm.mips.precrq.qb.ph" => "__builtin_mips_precrq_qb_ph",
+    "llvm.mips.precrq.rs.ph.w" => "__builtin_mips_precrq_rs_ph_w",
+    "llvm.mips.precrqu.s.qb.ph" => "__builtin_mips_precrqu_s_qb_ph",
     "llvm.mips.prepend" => "__builtin_mips_prepend",
     "llvm.mips.raddu.w.qb" => "__builtin_mips_raddu_w_qb",
     "llvm.mips.rddsp" => "__builtin_mips_rddsp",
+    "llvm.mips.repl.ph" => "__builtin_mips_repl_ph",
     "llvm.mips.repl.qb" => "__builtin_mips_repl_qb",
     "llvm.mips.sat.s.b" => "__builtin_msa_sat_s_b",
     "llvm.mips.sat.s.d" => "__builtin_msa_sat_s_d",
@@ -1406,9 +769,15 @@ match name {
     "llvm.mips.shf.h" => "__builtin_msa_shf_h",
     "llvm.mips.shf.w" => "__builtin_msa_shf_w",
     "llvm.mips.shilo" => "__builtin_mips_shilo",
+    "llvm.mips.shll.ph" => "__builtin_mips_shll_ph",
     "llvm.mips.shll.qb" => "__builtin_mips_shll_qb",
+    "llvm.mips.shll.s.ph" => "__builtin_mips_shll_s_ph",
+    "llvm.mips.shll.s.w" => "__builtin_mips_shll_s_w",
+    "llvm.mips.shra.ph" => "__builtin_mips_shra_ph",
     "llvm.mips.shra.qb" => "__builtin_mips_shra_qb",
+    "llvm.mips.shra.r.ph" => "__builtin_mips_shra_r_ph",
     "llvm.mips.shra.r.qb" => "__builtin_mips_shra_r_qb",
+    "llvm.mips.shra.r.w" => "__builtin_mips_shra_r_w",
     "llvm.mips.shrl.ph" => "__builtin_mips_shrl_ph",
     "llvm.mips.shrl.qb" => "__builtin_mips_shrl_qb",
     "llvm.mips.sld.b" => "__builtin_msa_sld_b",
@@ -1471,6 +840,15 @@ match name {
     "llvm.mips.st.d" => "__builtin_msa_st_d",
     "llvm.mips.st.h" => "__builtin_msa_st_h",
     "llvm.mips.st.w" => "__builtin_msa_st_w",
+    "llvm.mips.str.d" => "__builtin_msa_str_d",
+    "llvm.mips.str.w" => "__builtin_msa_str_w",
+    "llvm.mips.subq.ph" => "__builtin_mips_subq_ph",
+    "llvm.mips.subq.s.ph" => "__builtin_mips_subq_s_ph",
+    "llvm.mips.subq.s.w" => "__builtin_mips_subq_s_w",
+    "llvm.mips.subqh.ph" => "__builtin_mips_subqh_ph",
+    "llvm.mips.subqh.r.ph" => "__builtin_mips_subqh_r_ph",
+    "llvm.mips.subqh.r.w" => "__builtin_mips_subqh_r_w",
+    "llvm.mips.subqh.w" => "__builtin_mips_subqh_w",
     "llvm.mips.subs.s.b" => "__builtin_msa_subs_s_b",
     "llvm.mips.subs.s.d" => "__builtin_msa_subs_s_d",
     "llvm.mips.subs.s.h" => "__builtin_msa_subs_s_h",
@@ -1509,532 +887,15 @@ match name {
     "llvm.mips.xor.v" => "__builtin_msa_xor_v",
     "llvm.mips.xori.b" => "__builtin_msa_xori_b",
     // nvvm
-    "llvm.nvvm.abs.i" => "__nvvm_abs_i",
-    "llvm.nvvm.abs.ll" => "__nvvm_abs_ll",
-    "llvm.nvvm.add.rm.d" => "__nvvm_add_rm_d",
-    "llvm.nvvm.add.rm.f" => "__nvvm_add_rm_f",
-    "llvm.nvvm.add.rm.ftz.f" => "__nvvm_add_rm_ftz_f",
-    "llvm.nvvm.add.rn.d" => "__nvvm_add_rn_d",
-    "llvm.nvvm.add.rn.f" => "__nvvm_add_rn_f",
-    "llvm.nvvm.add.rn.ftz.f" => "__nvvm_add_rn_ftz_f",
-    "llvm.nvvm.add.rp.d" => "__nvvm_add_rp_d",
-    "llvm.nvvm.add.rp.f" => "__nvvm_add_rp_f",
-    "llvm.nvvm.add.rp.ftz.f" => "__nvvm_add_rp_ftz_f",
-    "llvm.nvvm.add.rz.d" => "__nvvm_add_rz_d",
-    "llvm.nvvm.add.rz.f" => "__nvvm_add_rz_f",
-    "llvm.nvvm.add.rz.ftz.f" => "__nvvm_add_rz_ftz_f",
-    "llvm.nvvm.barrier0" => "__nvvm_bar0",
-    "llvm.nvvm.barrier0.and" => "__nvvm_bar0_and",
-    "llvm.nvvm.barrier0.or" => "__nvvm_bar0_or",
-    "llvm.nvvm.barrier0.popc" => "__nvvm_bar0_popc",
-    "llvm.nvvm.bitcast.d2ll" => "__nvvm_bitcast_d2ll",
-    "llvm.nvvm.bitcast.f2i" => "__nvvm_bitcast_f2i",
-    "llvm.nvvm.bitcast.i2f" => "__nvvm_bitcast_i2f",
-    "llvm.nvvm.bitcast.ll2d" => "__nvvm_bitcast_ll2d",
-    "llvm.nvvm.brev32" => "__nvvm_brev32",
-    "llvm.nvvm.brev64" => "__nvvm_brev64",
-    "llvm.nvvm.ceil.d" => "__nvvm_ceil_d",
-    "llvm.nvvm.ceil.f" => "__nvvm_ceil_f",
-    "llvm.nvvm.ceil.ftz.f" => "__nvvm_ceil_ftz_f",
-    "llvm.nvvm.clz.i" => "__nvvm_clz_i",
-    "llvm.nvvm.clz.ll" => "__nvvm_clz_ll",
-    "llvm.nvvm.cos.approx.f" => "__nvvm_cos_approx_f",
-    "llvm.nvvm.cos.approx.ftz.f" => "__nvvm_cos_approx_ftz_f",
-    "llvm.nvvm.d2f.rm" => "__nvvm_d2f_rm",
-    "llvm.nvvm.d2f.rm.ftz" => "__nvvm_d2f_rm_ftz",
-    "llvm.nvvm.d2f.rn" => "__nvvm_d2f_rn",
-    "llvm.nvvm.d2f.rn.ftz" => "__nvvm_d2f_rn_ftz",
-    "llvm.nvvm.d2f.rp" => "__nvvm_d2f_rp",
-    "llvm.nvvm.d2f.rp.ftz" => "__nvvm_d2f_rp_ftz",
-    "llvm.nvvm.d2f.rz" => "__nvvm_d2f_rz",
-    "llvm.nvvm.d2f.rz.ftz" => "__nvvm_d2f_rz_ftz",
-    "llvm.nvvm.d2i.hi" => "__nvvm_d2i_hi",
-    "llvm.nvvm.d2i.lo" => "__nvvm_d2i_lo",
-    "llvm.nvvm.d2i.rm" => "__nvvm_d2i_rm",
-    "llvm.nvvm.d2i.rn" => "__nvvm_d2i_rn",
-    "llvm.nvvm.d2i.rp" => "__nvvm_d2i_rp",
-    "llvm.nvvm.d2i.rz" => "__nvvm_d2i_rz",
-    "llvm.nvvm.d2ll.rm" => "__nvvm_d2ll_rm",
-    "llvm.nvvm.d2ll.rn" => "__nvvm_d2ll_rn",
-    "llvm.nvvm.d2ll.rp" => "__nvvm_d2ll_rp",
-    "llvm.nvvm.d2ll.rz" => "__nvvm_d2ll_rz",
-    "llvm.nvvm.d2ui.rm" => "__nvvm_d2ui_rm",
-    "llvm.nvvm.d2ui.rn" => "__nvvm_d2ui_rn",
-    "llvm.nvvm.d2ui.rp" => "__nvvm_d2ui_rp",
-    "llvm.nvvm.d2ui.rz" => "__nvvm_d2ui_rz",
-    "llvm.nvvm.d2ull.rm" => "__nvvm_d2ull_rm",
-    "llvm.nvvm.d2ull.rn" => "__nvvm_d2ull_rn",
-    "llvm.nvvm.d2ull.rp" => "__nvvm_d2ull_rp",
-    "llvm.nvvm.d2ull.rz" => "__nvvm_d2ull_rz",
-    "llvm.nvvm.div.approx.f" => "__nvvm_div_approx_f",
-    "llvm.nvvm.div.approx.ftz.f" => "__nvvm_div_approx_ftz_f",
-    "llvm.nvvm.div.rm.d" => "__nvvm_div_rm_d",
-    "llvm.nvvm.div.rm.f" => "__nvvm_div_rm_f",
-    "llvm.nvvm.div.rm.ftz.f" => "__nvvm_div_rm_ftz_f",
-    "llvm.nvvm.div.rn.d" => "__nvvm_div_rn_d",
-    "llvm.nvvm.div.rn.f" => "__nvvm_div_rn_f",
-    "llvm.nvvm.div.rn.ftz.f" => "__nvvm_div_rn_ftz_f",
-    "llvm.nvvm.div.rp.d" => "__nvvm_div_rp_d",
-    "llvm.nvvm.div.rp.f" => "__nvvm_div_rp_f",
-    "llvm.nvvm.div.rp.ftz.f" => "__nvvm_div_rp_ftz_f",
-    "llvm.nvvm.div.rz.d" => "__nvvm_div_rz_d",
-    "llvm.nvvm.div.rz.f" => "__nvvm_div_rz_f",
-    "llvm.nvvm.div.rz.ftz.f" => "__nvvm_div_rz_ftz_f",
-    "llvm.nvvm.ex2.approx.d" => "__nvvm_ex2_approx_d",
-    "llvm.nvvm.ex2.approx.f" => "__nvvm_ex2_approx_f",
-    "llvm.nvvm.ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f",
-    "llvm.nvvm.f2h.rn" => "__nvvm_f2h_rn",
-    "llvm.nvvm.f2h.rn.ftz" => "__nvvm_f2h_rn_ftz",
-    "llvm.nvvm.f2i.rm" => "__nvvm_f2i_rm",
-    "llvm.nvvm.f2i.rm.ftz" => "__nvvm_f2i_rm_ftz",
-    "llvm.nvvm.f2i.rn" => "__nvvm_f2i_rn",
-    "llvm.nvvm.f2i.rn.ftz" => "__nvvm_f2i_rn_ftz",
-    "llvm.nvvm.f2i.rp" => "__nvvm_f2i_rp",
-    "llvm.nvvm.f2i.rp.ftz" => "__nvvm_f2i_rp_ftz",
-    "llvm.nvvm.f2i.rz" => "__nvvm_f2i_rz",
-    "llvm.nvvm.f2i.rz.ftz" => "__nvvm_f2i_rz_ftz",
-    "llvm.nvvm.f2ll.rm" => "__nvvm_f2ll_rm",
-    "llvm.nvvm.f2ll.rm.ftz" => "__nvvm_f2ll_rm_ftz",
-    "llvm.nvvm.f2ll.rn" => "__nvvm_f2ll_rn",
-    "llvm.nvvm.f2ll.rn.ftz" => "__nvvm_f2ll_rn_ftz",
-    "llvm.nvvm.f2ll.rp" => "__nvvm_f2ll_rp",
-    "llvm.nvvm.f2ll.rp.ftz" => "__nvvm_f2ll_rp_ftz",
-    "llvm.nvvm.f2ll.rz" => "__nvvm_f2ll_rz",
-    "llvm.nvvm.f2ll.rz.ftz" => "__nvvm_f2ll_rz_ftz",
-    "llvm.nvvm.f2ui.rm" => "__nvvm_f2ui_rm",
-    "llvm.nvvm.f2ui.rm.ftz" => "__nvvm_f2ui_rm_ftz",
-    "llvm.nvvm.f2ui.rn" => "__nvvm_f2ui_rn",
-    "llvm.nvvm.f2ui.rn.ftz" => "__nvvm_f2ui_rn_ftz",
-    "llvm.nvvm.f2ui.rp" => "__nvvm_f2ui_rp",
-    "llvm.nvvm.f2ui.rp.ftz" => "__nvvm_f2ui_rp_ftz",
-    "llvm.nvvm.f2ui.rz" => "__nvvm_f2ui_rz",
-    "llvm.nvvm.f2ui.rz.ftz" => "__nvvm_f2ui_rz_ftz",
-    "llvm.nvvm.f2ull.rm" => "__nvvm_f2ull_rm",
-    "llvm.nvvm.f2ull.rm.ftz" => "__nvvm_f2ull_rm_ftz",
-    "llvm.nvvm.f2ull.rn" => "__nvvm_f2ull_rn",
-    "llvm.nvvm.f2ull.rn.ftz" => "__nvvm_f2ull_rn_ftz",
-    "llvm.nvvm.f2ull.rp" => "__nvvm_f2ull_rp",
-    "llvm.nvvm.f2ull.rp.ftz" => "__nvvm_f2ull_rp_ftz",
-    "llvm.nvvm.f2ull.rz" => "__nvvm_f2ull_rz",
-    "llvm.nvvm.f2ull.rz.ftz" => "__nvvm_f2ull_rz_ftz",
-    "llvm.nvvm.fabs.d" => "__nvvm_fabs_d",
-    "llvm.nvvm.fabs.f" => "__nvvm_fabs_f",
-    "llvm.nvvm.fabs.ftz.f" => "__nvvm_fabs_ftz_f",
-    "llvm.nvvm.floor.d" => "__nvvm_floor_d",
-    "llvm.nvvm.floor.f" => "__nvvm_floor_f",
-    "llvm.nvvm.floor.ftz.f" => "__nvvm_floor_ftz_f",
-    "llvm.nvvm.fma.rm.d" => "__nvvm_fma_rm_d",
-    "llvm.nvvm.fma.rm.f" => "__nvvm_fma_rm_f",
-    "llvm.nvvm.fma.rm.ftz.f" => "__nvvm_fma_rm_ftz_f",
-    "llvm.nvvm.fma.rn.d" => "__nvvm_fma_rn_d",
-    "llvm.nvvm.fma.rn.f" => "__nvvm_fma_rn_f",
-    "llvm.nvvm.fma.rn.ftz.f" => "__nvvm_fma_rn_ftz_f",
-    "llvm.nvvm.fma.rp.d" => "__nvvm_fma_rp_d",
-    "llvm.nvvm.fma.rp.f" => "__nvvm_fma_rp_f",
-    "llvm.nvvm.fma.rp.ftz.f" => "__nvvm_fma_rp_ftz_f",
-    "llvm.nvvm.fma.rz.d" => "__nvvm_fma_rz_d",
-    "llvm.nvvm.fma.rz.f" => "__nvvm_fma_rz_f",
-    "llvm.nvvm.fma.rz.ftz.f" => "__nvvm_fma_rz_ftz_f",
-    "llvm.nvvm.fmax.d" => "__nvvm_fmax_d",
-    "llvm.nvvm.fmax.f" => "__nvvm_fmax_f",
-    "llvm.nvvm.fmax.ftz.f" => "__nvvm_fmax_ftz_f",
-    "llvm.nvvm.fmin.d" => "__nvvm_fmin_d",
-    "llvm.nvvm.fmin.f" => "__nvvm_fmin_f",
-    "llvm.nvvm.fmin.ftz.f" => "__nvvm_fmin_ftz_f",
-    "llvm.nvvm.h2f" => "__nvvm_h2f",
-    "llvm.nvvm.i2d.rm" => "__nvvm_i2d_rm",
-    "llvm.nvvm.i2d.rn" => "__nvvm_i2d_rn",
-    "llvm.nvvm.i2d.rp" => "__nvvm_i2d_rp",
-    "llvm.nvvm.i2d.rz" => "__nvvm_i2d_rz",
-    "llvm.nvvm.i2f.rm" => "__nvvm_i2f_rm",
-    "llvm.nvvm.i2f.rn" => "__nvvm_i2f_rn",
-    "llvm.nvvm.i2f.rp" => "__nvvm_i2f_rp",
-    "llvm.nvvm.i2f.rz" => "__nvvm_i2f_rz",
-    "llvm.nvvm.isspacep.const" => "__nvvm_isspacep_const",
-    "llvm.nvvm.isspacep.global" => "__nvvm_isspacep_global",
-    "llvm.nvvm.isspacep.local" => "__nvvm_isspacep_local",
-    "llvm.nvvm.isspacep.shared" => "__nvvm_isspacep_shared",
-    "llvm.nvvm.istypep.sampler" => "__nvvm_istypep_sampler",
-    "llvm.nvvm.istypep.surface" => "__nvvm_istypep_surface",
-    "llvm.nvvm.istypep.texture" => "__nvvm_istypep_texture",
-    "llvm.nvvm.lg2.approx.d" => "__nvvm_lg2_approx_d",
-    "llvm.nvvm.lg2.approx.f" => "__nvvm_lg2_approx_f",
-    "llvm.nvvm.lg2.approx.ftz.f" => "__nvvm_lg2_approx_ftz_f",
-    "llvm.nvvm.ll2d.rm" => "__nvvm_ll2d_rm",
-    "llvm.nvvm.ll2d.rn" => "__nvvm_ll2d_rn",
-    "llvm.nvvm.ll2d.rp" => "__nvvm_ll2d_rp",
-    "llvm.nvvm.ll2d.rz" => "__nvvm_ll2d_rz",
-    "llvm.nvvm.ll2f.rm" => "__nvvm_ll2f_rm",
-    "llvm.nvvm.ll2f.rn" => "__nvvm_ll2f_rn",
-    "llvm.nvvm.ll2f.rp" => "__nvvm_ll2f_rp",
-    "llvm.nvvm.ll2f.rz" => "__nvvm_ll2f_rz",
-    "llvm.nvvm.lohi.i2d" => "__nvvm_lohi_i2d",
-    "llvm.nvvm.max.i" => "__nvvm_max_i",
-    "llvm.nvvm.max.ll" => "__nvvm_max_ll",
-    "llvm.nvvm.max.ui" => "__nvvm_max_ui",
-    "llvm.nvvm.max.ull" => "__nvvm_max_ull",
-    "llvm.nvvm.membar.cta" => "__nvvm_membar_cta",
-    "llvm.nvvm.membar.gl" => "__nvvm_membar_gl",
-    "llvm.nvvm.membar.sys" => "__nvvm_membar_sys",
-    "llvm.nvvm.min.i" => "__nvvm_min_i",
-    "llvm.nvvm.min.ll" => "__nvvm_min_ll",
-    "llvm.nvvm.min.ui" => "__nvvm_min_ui",
-    "llvm.nvvm.min.ull" => "__nvvm_min_ull",
-    "llvm.nvvm.mul.rm.d" => "__nvvm_mul_rm_d",
-    "llvm.nvvm.mul.rm.f" => "__nvvm_mul_rm_f",
-    "llvm.nvvm.mul.rm.ftz.f" => "__nvvm_mul_rm_ftz_f",
-    "llvm.nvvm.mul.rn.d" => "__nvvm_mul_rn_d",
-    "llvm.nvvm.mul.rn.f" => "__nvvm_mul_rn_f",
-    "llvm.nvvm.mul.rn.ftz.f" => "__nvvm_mul_rn_ftz_f",
-    "llvm.nvvm.mul.rp.d" => "__nvvm_mul_rp_d",
-    "llvm.nvvm.mul.rp.f" => "__nvvm_mul_rp_f",
-    "llvm.nvvm.mul.rp.ftz.f" => "__nvvm_mul_rp_ftz_f",
-    "llvm.nvvm.mul.rz.d" => "__nvvm_mul_rz_d",
-    "llvm.nvvm.mul.rz.f" => "__nvvm_mul_rz_f",
-    "llvm.nvvm.mul.rz.ftz.f" => "__nvvm_mul_rz_ftz_f",
-    "llvm.nvvm.mul24.i" => "__nvvm_mul24_i",
-    "llvm.nvvm.mul24.ui" => "__nvvm_mul24_ui",
-    "llvm.nvvm.mulhi.i" => "__nvvm_mulhi_i",
-    "llvm.nvvm.mulhi.ll" => "__nvvm_mulhi_ll",
-    "llvm.nvvm.mulhi.ui" => "__nvvm_mulhi_ui",
-    "llvm.nvvm.mulhi.ull" => "__nvvm_mulhi_ull",
-    "llvm.nvvm.popc.i" => "__nvvm_popc_i",
-    "llvm.nvvm.popc.ll" => "__nvvm_popc_ll",
     "llvm.nvvm.prmt" => "__nvvm_prmt",
-    "llvm.nvvm.rcp.approx.ftz.d" => "__nvvm_rcp_approx_ftz_d",
-    "llvm.nvvm.rcp.rm.d" => "__nvvm_rcp_rm_d",
-    "llvm.nvvm.rcp.rm.f" => "__nvvm_rcp_rm_f",
-    "llvm.nvvm.rcp.rm.ftz.f" => "__nvvm_rcp_rm_ftz_f",
-    "llvm.nvvm.rcp.rn.d" => "__nvvm_rcp_rn_d",
-    "llvm.nvvm.rcp.rn.f" => "__nvvm_rcp_rn_f",
-    "llvm.nvvm.rcp.rn.ftz.f" => "__nvvm_rcp_rn_ftz_f",
-    "llvm.nvvm.rcp.rp.d" => "__nvvm_rcp_rp_d",
-    "llvm.nvvm.rcp.rp.f" => "__nvvm_rcp_rp_f",
-    "llvm.nvvm.rcp.rp.ftz.f" => "__nvvm_rcp_rp_ftz_f",
-    "llvm.nvvm.rcp.rz.d" => "__nvvm_rcp_rz_d",
-    "llvm.nvvm.rcp.rz.f" => "__nvvm_rcp_rz_f",
-    "llvm.nvvm.rcp.rz.ftz.f" => "__nvvm_rcp_rz_ftz_f",
-    "llvm.nvvm.read.ptx.sreg.ctaid.x" => "__nvvm_read_ptx_sreg_ctaid_x",
-    "llvm.nvvm.read.ptx.sreg.ctaid.y" => "__nvvm_read_ptx_sreg_ctaid_y",
-    "llvm.nvvm.read.ptx.sreg.ctaid.z" => "__nvvm_read_ptx_sreg_ctaid_z",
-    "llvm.nvvm.read.ptx.sreg.envreg0" => "__nvvm_read_ptx_sreg_envreg0",
-    "llvm.nvvm.read.ptx.sreg.envreg1" => "__nvvm_read_ptx_sreg_envreg1",
-    "llvm.nvvm.read.ptx.sreg.envreg10" => "__nvvm_read_ptx_sreg_envreg10",
-    "llvm.nvvm.read.ptx.sreg.envreg11" => "__nvvm_read_ptx_sreg_envreg11",
-    "llvm.nvvm.read.ptx.sreg.envreg12" => "__nvvm_read_ptx_sreg_envreg12",
-    "llvm.nvvm.read.ptx.sreg.envreg13" => "__nvvm_read_ptx_sreg_envreg13",
-    "llvm.nvvm.read.ptx.sreg.envreg14" => "__nvvm_read_ptx_sreg_envreg14",
-    "llvm.nvvm.read.ptx.sreg.envreg15" => "__nvvm_read_ptx_sreg_envreg15",
-    "llvm.nvvm.read.ptx.sreg.envreg16" => "__nvvm_read_ptx_sreg_envreg16",
-    "llvm.nvvm.read.ptx.sreg.envreg17" => "__nvvm_read_ptx_sreg_envreg17",
-    "llvm.nvvm.read.ptx.sreg.envreg18" => "__nvvm_read_ptx_sreg_envreg18",
-    "llvm.nvvm.read.ptx.sreg.envreg19" => "__nvvm_read_ptx_sreg_envreg19",
-    "llvm.nvvm.read.ptx.sreg.envreg2" => "__nvvm_read_ptx_sreg_envreg2",
-    "llvm.nvvm.read.ptx.sreg.envreg20" => "__nvvm_read_ptx_sreg_envreg20",
-    "llvm.nvvm.read.ptx.sreg.envreg21" => "__nvvm_read_ptx_sreg_envreg21",
-    "llvm.nvvm.read.ptx.sreg.envreg22" => "__nvvm_read_ptx_sreg_envreg22",
-    "llvm.nvvm.read.ptx.sreg.envreg23" => "__nvvm_read_ptx_sreg_envreg23",
-    "llvm.nvvm.read.ptx.sreg.envreg24" => "__nvvm_read_ptx_sreg_envreg24",
-    "llvm.nvvm.read.ptx.sreg.envreg25" => "__nvvm_read_ptx_sreg_envreg25",
-    "llvm.nvvm.read.ptx.sreg.envreg26" => "__nvvm_read_ptx_sreg_envreg26",
-    "llvm.nvvm.read.ptx.sreg.envreg27" => "__nvvm_read_ptx_sreg_envreg27",
-    "llvm.nvvm.read.ptx.sreg.envreg28" => "__nvvm_read_ptx_sreg_envreg28",
-    "llvm.nvvm.read.ptx.sreg.envreg29" => "__nvvm_read_ptx_sreg_envreg29",
-    "llvm.nvvm.read.ptx.sreg.envreg3" => "__nvvm_read_ptx_sreg_envreg3",
-    "llvm.nvvm.read.ptx.sreg.envreg30" => "__nvvm_read_ptx_sreg_envreg30",
-    "llvm.nvvm.read.ptx.sreg.envreg31" => "__nvvm_read_ptx_sreg_envreg31",
-    "llvm.nvvm.read.ptx.sreg.envreg4" => "__nvvm_read_ptx_sreg_envreg4",
-    "llvm.nvvm.read.ptx.sreg.envreg5" => "__nvvm_read_ptx_sreg_envreg5",
-    "llvm.nvvm.read.ptx.sreg.envreg6" => "__nvvm_read_ptx_sreg_envreg6",
-    "llvm.nvvm.read.ptx.sreg.envreg7" => "__nvvm_read_ptx_sreg_envreg7",
-    "llvm.nvvm.read.ptx.sreg.envreg8" => "__nvvm_read_ptx_sreg_envreg8",
-    "llvm.nvvm.read.ptx.sreg.envreg9" => "__nvvm_read_ptx_sreg_envreg9",
-    "llvm.nvvm.read.ptx.sreg.nctaid.x" => "__nvvm_read_ptx_sreg_nctaid_x",
-    "llvm.nvvm.read.ptx.sreg.nctaid.y" => "__nvvm_read_ptx_sreg_nctaid_y",
-    "llvm.nvvm.read.ptx.sreg.nctaid.z" => "__nvvm_read_ptx_sreg_nctaid_z",
-    "llvm.nvvm.read.ptx.sreg.ntid.x" => "__nvvm_read_ptx_sreg_ntid_x",
-    "llvm.nvvm.read.ptx.sreg.ntid.y" => "__nvvm_read_ptx_sreg_ntid_y",
-    "llvm.nvvm.read.ptx.sreg.ntid.z" => "__nvvm_read_ptx_sreg_ntid_z",
-    "llvm.nvvm.read.ptx.sreg.tid.x" => "__nvvm_read_ptx_sreg_tid_x",
-    "llvm.nvvm.read.ptx.sreg.tid.y" => "__nvvm_read_ptx_sreg_tid_y",
-    "llvm.nvvm.read.ptx.sreg.tid.z" => "__nvvm_read_ptx_sreg_tid_z",
-    "llvm.nvvm.read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_warpsize",
-    "llvm.nvvm.rotate.b32" => "__nvvm_rotate_b32",
-    "llvm.nvvm.rotate.b64" => "__nvvm_rotate_b64",
-    "llvm.nvvm.rotate.right.b64" => "__nvvm_rotate_right_b64",
-    "llvm.nvvm.round.d" => "__nvvm_round_d",
-    "llvm.nvvm.round.f" => "__nvvm_round_f",
-    "llvm.nvvm.round.ftz.f" => "__nvvm_round_ftz_f",
-    "llvm.nvvm.rsqrt.approx.d" => "__nvvm_rsqrt_approx_d",
-    "llvm.nvvm.rsqrt.approx.f" => "__nvvm_rsqrt_approx_f",
-    "llvm.nvvm.rsqrt.approx.ftz.f" => "__nvvm_rsqrt_approx_ftz_f",
-    "llvm.nvvm.sad.i" => "__nvvm_sad_i",
-    "llvm.nvvm.sad.ui" => "__nvvm_sad_ui",
-    "llvm.nvvm.saturate.d" => "__nvvm_saturate_d",
-    "llvm.nvvm.saturate.f" => "__nvvm_saturate_f",
-    "llvm.nvvm.saturate.ftz.f" => "__nvvm_saturate_ftz_f",
-    "llvm.nvvm.sin.approx.f" => "__nvvm_sin_approx_f",
-    "llvm.nvvm.sin.approx.ftz.f" => "__nvvm_sin_approx_ftz_f",
-    "llvm.nvvm.sqrt.approx.f" => "__nvvm_sqrt_approx_f",
-    "llvm.nvvm.sqrt.approx.ftz.f" => "__nvvm_sqrt_approx_ftz_f",
-    "llvm.nvvm.sqrt.f" => "__nvvm_sqrt_f",
-    "llvm.nvvm.sqrt.rm.d" => "__nvvm_sqrt_rm_d",
-    "llvm.nvvm.sqrt.rm.f" => "__nvvm_sqrt_rm_f",
-    "llvm.nvvm.sqrt.rm.ftz.f" => "__nvvm_sqrt_rm_ftz_f",
-    "llvm.nvvm.sqrt.rn.d" => "__nvvm_sqrt_rn_d",
-    "llvm.nvvm.sqrt.rn.f" => "__nvvm_sqrt_rn_f",
-    "llvm.nvvm.sqrt.rn.ftz.f" => "__nvvm_sqrt_rn_ftz_f",
-    "llvm.nvvm.sqrt.rp.d" => "__nvvm_sqrt_rp_d",
-    "llvm.nvvm.sqrt.rp.f" => "__nvvm_sqrt_rp_f",
-    "llvm.nvvm.sqrt.rp.ftz.f" => "__nvvm_sqrt_rp_ftz_f",
-    "llvm.nvvm.sqrt.rz.d" => "__nvvm_sqrt_rz_d",
-    "llvm.nvvm.sqrt.rz.f" => "__nvvm_sqrt_rz_f",
-    "llvm.nvvm.sqrt.rz.ftz.f" => "__nvvm_sqrt_rz_ftz_f",
-    "llvm.nvvm.suq.array.size" => "__nvvm_suq_array_size",
-    "llvm.nvvm.suq.channel.data.type" => "__nvvm_suq_channel_data_type",
-    "llvm.nvvm.suq.channel.order" => "__nvvm_suq_channel_order",
-    "llvm.nvvm.suq.depth" => "__nvvm_suq_depth",
-    "llvm.nvvm.suq.height" => "__nvvm_suq_height",
-    "llvm.nvvm.suq.width" => "__nvvm_suq_width",
-    "llvm.nvvm.sust.b.1d.array.i16.clamp" => "__nvvm_sust_b_1d_array_i16_clamp",
-    "llvm.nvvm.sust.b.1d.array.i16.trap" => "__nvvm_sust_b_1d_array_i16_trap",
-    "llvm.nvvm.sust.b.1d.array.i16.zero" => "__nvvm_sust_b_1d_array_i16_zero",
-    "llvm.nvvm.sust.b.1d.array.i32.clamp" => "__nvvm_sust_b_1d_array_i32_clamp",
-    "llvm.nvvm.sust.b.1d.array.i32.trap" => "__nvvm_sust_b_1d_array_i32_trap",
-    "llvm.nvvm.sust.b.1d.array.i32.zero" => "__nvvm_sust_b_1d_array_i32_zero",
-    "llvm.nvvm.sust.b.1d.array.i64.clamp" => "__nvvm_sust_b_1d_array_i64_clamp",
-    "llvm.nvvm.sust.b.1d.array.i64.trap" => "__nvvm_sust_b_1d_array_i64_trap",
-    "llvm.nvvm.sust.b.1d.array.i64.zero" => "__nvvm_sust_b_1d_array_i64_zero",
-    "llvm.nvvm.sust.b.1d.array.i8.clamp" => "__nvvm_sust_b_1d_array_i8_clamp",
-    "llvm.nvvm.sust.b.1d.array.i8.trap" => "__nvvm_sust_b_1d_array_i8_trap",
-    "llvm.nvvm.sust.b.1d.array.i8.zero" => "__nvvm_sust_b_1d_array_i8_zero",
-    "llvm.nvvm.sust.b.1d.array.v2i16.clamp" => "__nvvm_sust_b_1d_array_v2i16_clamp",
-    "llvm.nvvm.sust.b.1d.array.v2i16.trap" => "__nvvm_sust_b_1d_array_v2i16_trap",
-    "llvm.nvvm.sust.b.1d.array.v2i16.zero" => "__nvvm_sust_b_1d_array_v2i16_zero",
-    "llvm.nvvm.sust.b.1d.array.v2i32.clamp" => "__nvvm_sust_b_1d_array_v2i32_clamp",
-    "llvm.nvvm.sust.b.1d.array.v2i32.trap" => "__nvvm_sust_b_1d_array_v2i32_trap",
-    "llvm.nvvm.sust.b.1d.array.v2i32.zero" => "__nvvm_sust_b_1d_array_v2i32_zero",
-    "llvm.nvvm.sust.b.1d.array.v2i64.clamp" => "__nvvm_sust_b_1d_array_v2i64_clamp",
-    "llvm.nvvm.sust.b.1d.array.v2i64.trap" => "__nvvm_sust_b_1d_array_v2i64_trap",
-    "llvm.nvvm.sust.b.1d.array.v2i64.zero" => "__nvvm_sust_b_1d_array_v2i64_zero",
-    "llvm.nvvm.sust.b.1d.array.v2i8.clamp" => "__nvvm_sust_b_1d_array_v2i8_clamp",
-    "llvm.nvvm.sust.b.1d.array.v2i8.trap" => "__nvvm_sust_b_1d_array_v2i8_trap",
-    "llvm.nvvm.sust.b.1d.array.v2i8.zero" => "__nvvm_sust_b_1d_array_v2i8_zero",
-    "llvm.nvvm.sust.b.1d.array.v4i16.clamp" => "__nvvm_sust_b_1d_array_v4i16_clamp",
-    "llvm.nvvm.sust.b.1d.array.v4i16.trap" => "__nvvm_sust_b_1d_array_v4i16_trap",
-    "llvm.nvvm.sust.b.1d.array.v4i16.zero" => "__nvvm_sust_b_1d_array_v4i16_zero",
-    "llvm.nvvm.sust.b.1d.array.v4i32.clamp" => "__nvvm_sust_b_1d_array_v4i32_clamp",
-    "llvm.nvvm.sust.b.1d.array.v4i32.trap" => "__nvvm_sust_b_1d_array_v4i32_trap",
-    "llvm.nvvm.sust.b.1d.array.v4i32.zero" => "__nvvm_sust_b_1d_array_v4i32_zero",
-    "llvm.nvvm.sust.b.1d.array.v4i8.clamp" => "__nvvm_sust_b_1d_array_v4i8_clamp",
-    "llvm.nvvm.sust.b.1d.array.v4i8.trap" => "__nvvm_sust_b_1d_array_v4i8_trap",
-    "llvm.nvvm.sust.b.1d.array.v4i8.zero" => "__nvvm_sust_b_1d_array_v4i8_zero",
-    "llvm.nvvm.sust.b.1d.i16.clamp" => "__nvvm_sust_b_1d_i16_clamp",
-    "llvm.nvvm.sust.b.1d.i16.trap" => "__nvvm_sust_b_1d_i16_trap",
-    "llvm.nvvm.sust.b.1d.i16.zero" => "__nvvm_sust_b_1d_i16_zero",
-    "llvm.nvvm.sust.b.1d.i32.clamp" => "__nvvm_sust_b_1d_i32_clamp",
-    "llvm.nvvm.sust.b.1d.i32.trap" => "__nvvm_sust_b_1d_i32_trap",
-    "llvm.nvvm.sust.b.1d.i32.zero" => "__nvvm_sust_b_1d_i32_zero",
-    "llvm.nvvm.sust.b.1d.i64.clamp" => "__nvvm_sust_b_1d_i64_clamp",
-    "llvm.nvvm.sust.b.1d.i64.trap" => "__nvvm_sust_b_1d_i64_trap",
-    "llvm.nvvm.sust.b.1d.i64.zero" => "__nvvm_sust_b_1d_i64_zero",
-    "llvm.nvvm.sust.b.1d.i8.clamp" => "__nvvm_sust_b_1d_i8_clamp",
-    "llvm.nvvm.sust.b.1d.i8.trap" => "__nvvm_sust_b_1d_i8_trap",
-    "llvm.nvvm.sust.b.1d.i8.zero" => "__nvvm_sust_b_1d_i8_zero",
-    "llvm.nvvm.sust.b.1d.v2i16.clamp" => "__nvvm_sust_b_1d_v2i16_clamp",
-    "llvm.nvvm.sust.b.1d.v2i16.trap" => "__nvvm_sust_b_1d_v2i16_trap",
-    "llvm.nvvm.sust.b.1d.v2i16.zero" => "__nvvm_sust_b_1d_v2i16_zero",
-    "llvm.nvvm.sust.b.1d.v2i32.clamp" => "__nvvm_sust_b_1d_v2i32_clamp",
-    "llvm.nvvm.sust.b.1d.v2i32.trap" => "__nvvm_sust_b_1d_v2i32_trap",
-    "llvm.nvvm.sust.b.1d.v2i32.zero" => "__nvvm_sust_b_1d_v2i32_zero",
-    "llvm.nvvm.sust.b.1d.v2i64.clamp" => "__nvvm_sust_b_1d_v2i64_clamp",
-    "llvm.nvvm.sust.b.1d.v2i64.trap" => "__nvvm_sust_b_1d_v2i64_trap",
-    "llvm.nvvm.sust.b.1d.v2i64.zero" => "__nvvm_sust_b_1d_v2i64_zero",
-    "llvm.nvvm.sust.b.1d.v2i8.clamp" => "__nvvm_sust_b_1d_v2i8_clamp",
-    "llvm.nvvm.sust.b.1d.v2i8.trap" => "__nvvm_sust_b_1d_v2i8_trap",
-    "llvm.nvvm.sust.b.1d.v2i8.zero" => "__nvvm_sust_b_1d_v2i8_zero",
-    "llvm.nvvm.sust.b.1d.v4i16.clamp" => "__nvvm_sust_b_1d_v4i16_clamp",
-    "llvm.nvvm.sust.b.1d.v4i16.trap" => "__nvvm_sust_b_1d_v4i16_trap",
-    "llvm.nvvm.sust.b.1d.v4i16.zero" => "__nvvm_sust_b_1d_v4i16_zero",
-    "llvm.nvvm.sust.b.1d.v4i32.clamp" => "__nvvm_sust_b_1d_v4i32_clamp",
-    "llvm.nvvm.sust.b.1d.v4i32.trap" => "__nvvm_sust_b_1d_v4i32_trap",
-    "llvm.nvvm.sust.b.1d.v4i32.zero" => "__nvvm_sust_b_1d_v4i32_zero",
-    "llvm.nvvm.sust.b.1d.v4i8.clamp" => "__nvvm_sust_b_1d_v4i8_clamp",
-    "llvm.nvvm.sust.b.1d.v4i8.trap" => "__nvvm_sust_b_1d_v4i8_trap",
-    "llvm.nvvm.sust.b.1d.v4i8.zero" => "__nvvm_sust_b_1d_v4i8_zero",
-    "llvm.nvvm.sust.b.2d.array.i16.clamp" => "__nvvm_sust_b_2d_array_i16_clamp",
-    "llvm.nvvm.sust.b.2d.array.i16.trap" => "__nvvm_sust_b_2d_array_i16_trap",
-    "llvm.nvvm.sust.b.2d.array.i16.zero" => "__nvvm_sust_b_2d_array_i16_zero",
-    "llvm.nvvm.sust.b.2d.array.i32.clamp" => "__nvvm_sust_b_2d_array_i32_clamp",
-    "llvm.nvvm.sust.b.2d.array.i32.trap" => "__nvvm_sust_b_2d_array_i32_trap",
-    "llvm.nvvm.sust.b.2d.array.i32.zero" => "__nvvm_sust_b_2d_array_i32_zero",
-    "llvm.nvvm.sust.b.2d.array.i64.clamp" => "__nvvm_sust_b_2d_array_i64_clamp",
-    "llvm.nvvm.sust.b.2d.array.i64.trap" => "__nvvm_sust_b_2d_array_i64_trap",
-    "llvm.nvvm.sust.b.2d.array.i64.zero" => "__nvvm_sust_b_2d_array_i64_zero",
-    "llvm.nvvm.sust.b.2d.array.i8.clamp" => "__nvvm_sust_b_2d_array_i8_clamp",
-    "llvm.nvvm.sust.b.2d.array.i8.trap" => "__nvvm_sust_b_2d_array_i8_trap",
-    "llvm.nvvm.sust.b.2d.array.i8.zero" => "__nvvm_sust_b_2d_array_i8_zero",
-    "llvm.nvvm.sust.b.2d.array.v2i16.clamp" => "__nvvm_sust_b_2d_array_v2i16_clamp",
-    "llvm.nvvm.sust.b.2d.array.v2i16.trap" => "__nvvm_sust_b_2d_array_v2i16_trap",
-    "llvm.nvvm.sust.b.2d.array.v2i16.zero" => "__nvvm_sust_b_2d_array_v2i16_zero",
-    "llvm.nvvm.sust.b.2d.array.v2i32.clamp" => "__nvvm_sust_b_2d_array_v2i32_clamp",
-    "llvm.nvvm.sust.b.2d.array.v2i32.trap" => "__nvvm_sust_b_2d_array_v2i32_trap",
-    "llvm.nvvm.sust.b.2d.array.v2i32.zero" => "__nvvm_sust_b_2d_array_v2i32_zero",
-    "llvm.nvvm.sust.b.2d.array.v2i64.clamp" => "__nvvm_sust_b_2d_array_v2i64_clamp",
-    "llvm.nvvm.sust.b.2d.array.v2i64.trap" => "__nvvm_sust_b_2d_array_v2i64_trap",
-    "llvm.nvvm.sust.b.2d.array.v2i64.zero" => "__nvvm_sust_b_2d_array_v2i64_zero",
-    "llvm.nvvm.sust.b.2d.array.v2i8.clamp" => "__nvvm_sust_b_2d_array_v2i8_clamp",
-    "llvm.nvvm.sust.b.2d.array.v2i8.trap" => "__nvvm_sust_b_2d_array_v2i8_trap",
-    "llvm.nvvm.sust.b.2d.array.v2i8.zero" => "__nvvm_sust_b_2d_array_v2i8_zero",
-    "llvm.nvvm.sust.b.2d.array.v4i16.clamp" => "__nvvm_sust_b_2d_array_v4i16_clamp",
-    "llvm.nvvm.sust.b.2d.array.v4i16.trap" => "__nvvm_sust_b_2d_array_v4i16_trap",
-    "llvm.nvvm.sust.b.2d.array.v4i16.zero" => "__nvvm_sust_b_2d_array_v4i16_zero",
-    "llvm.nvvm.sust.b.2d.array.v4i32.clamp" => "__nvvm_sust_b_2d_array_v4i32_clamp",
-    "llvm.nvvm.sust.b.2d.array.v4i32.trap" => "__nvvm_sust_b_2d_array_v4i32_trap",
-    "llvm.nvvm.sust.b.2d.array.v4i32.zero" => "__nvvm_sust_b_2d_array_v4i32_zero",
-    "llvm.nvvm.sust.b.2d.array.v4i8.clamp" => "__nvvm_sust_b_2d_array_v4i8_clamp",
-    "llvm.nvvm.sust.b.2d.array.v4i8.trap" => "__nvvm_sust_b_2d_array_v4i8_trap",
-    "llvm.nvvm.sust.b.2d.array.v4i8.zero" => "__nvvm_sust_b_2d_array_v4i8_zero",
-    "llvm.nvvm.sust.b.2d.i16.clamp" => "__nvvm_sust_b_2d_i16_clamp",
-    "llvm.nvvm.sust.b.2d.i16.trap" => "__nvvm_sust_b_2d_i16_trap",
-    "llvm.nvvm.sust.b.2d.i16.zero" => "__nvvm_sust_b_2d_i16_zero",
-    "llvm.nvvm.sust.b.2d.i32.clamp" => "__nvvm_sust_b_2d_i32_clamp",
-    "llvm.nvvm.sust.b.2d.i32.trap" => "__nvvm_sust_b_2d_i32_trap",
-    "llvm.nvvm.sust.b.2d.i32.zero" => "__nvvm_sust_b_2d_i32_zero",
-    "llvm.nvvm.sust.b.2d.i64.clamp" => "__nvvm_sust_b_2d_i64_clamp",
-    "llvm.nvvm.sust.b.2d.i64.trap" => "__nvvm_sust_b_2d_i64_trap",
-    "llvm.nvvm.sust.b.2d.i64.zero" => "__nvvm_sust_b_2d_i64_zero",
-    "llvm.nvvm.sust.b.2d.i8.clamp" => "__nvvm_sust_b_2d_i8_clamp",
-    "llvm.nvvm.sust.b.2d.i8.trap" => "__nvvm_sust_b_2d_i8_trap",
-    "llvm.nvvm.sust.b.2d.i8.zero" => "__nvvm_sust_b_2d_i8_zero",
-    "llvm.nvvm.sust.b.2d.v2i16.clamp" => "__nvvm_sust_b_2d_v2i16_clamp",
-    "llvm.nvvm.sust.b.2d.v2i16.trap" => "__nvvm_sust_b_2d_v2i16_trap",
-    "llvm.nvvm.sust.b.2d.v2i16.zero" => "__nvvm_sust_b_2d_v2i16_zero",
-    "llvm.nvvm.sust.b.2d.v2i32.clamp" => "__nvvm_sust_b_2d_v2i32_clamp",
-    "llvm.nvvm.sust.b.2d.v2i32.trap" => "__nvvm_sust_b_2d_v2i32_trap",
-    "llvm.nvvm.sust.b.2d.v2i32.zero" => "__nvvm_sust_b_2d_v2i32_zero",
-    "llvm.nvvm.sust.b.2d.v2i64.clamp" => "__nvvm_sust_b_2d_v2i64_clamp",
-    "llvm.nvvm.sust.b.2d.v2i64.trap" => "__nvvm_sust_b_2d_v2i64_trap",
-    "llvm.nvvm.sust.b.2d.v2i64.zero" => "__nvvm_sust_b_2d_v2i64_zero",
-    "llvm.nvvm.sust.b.2d.v2i8.clamp" => "__nvvm_sust_b_2d_v2i8_clamp",
-    "llvm.nvvm.sust.b.2d.v2i8.trap" => "__nvvm_sust_b_2d_v2i8_trap",
-    "llvm.nvvm.sust.b.2d.v2i8.zero" => "__nvvm_sust_b_2d_v2i8_zero",
-    "llvm.nvvm.sust.b.2d.v4i16.clamp" => "__nvvm_sust_b_2d_v4i16_clamp",
-    "llvm.nvvm.sust.b.2d.v4i16.trap" => "__nvvm_sust_b_2d_v4i16_trap",
-    "llvm.nvvm.sust.b.2d.v4i16.zero" => "__nvvm_sust_b_2d_v4i16_zero",
-    "llvm.nvvm.sust.b.2d.v4i32.clamp" => "__nvvm_sust_b_2d_v4i32_clamp",
-    "llvm.nvvm.sust.b.2d.v4i32.trap" => "__nvvm_sust_b_2d_v4i32_trap",
-    "llvm.nvvm.sust.b.2d.v4i32.zero" => "__nvvm_sust_b_2d_v4i32_zero",
-    "llvm.nvvm.sust.b.2d.v4i8.clamp" => "__nvvm_sust_b_2d_v4i8_clamp",
-    "llvm.nvvm.sust.b.2d.v4i8.trap" => "__nvvm_sust_b_2d_v4i8_trap",
-    "llvm.nvvm.sust.b.2d.v4i8.zero" => "__nvvm_sust_b_2d_v4i8_zero",
-    "llvm.nvvm.sust.b.3d.i16.clamp" => "__nvvm_sust_b_3d_i16_clamp",
-    "llvm.nvvm.sust.b.3d.i16.trap" => "__nvvm_sust_b_3d_i16_trap",
-    "llvm.nvvm.sust.b.3d.i16.zero" => "__nvvm_sust_b_3d_i16_zero",
-    "llvm.nvvm.sust.b.3d.i32.clamp" => "__nvvm_sust_b_3d_i32_clamp",
-    "llvm.nvvm.sust.b.3d.i32.trap" => "__nvvm_sust_b_3d_i32_trap",
-    "llvm.nvvm.sust.b.3d.i32.zero" => "__nvvm_sust_b_3d_i32_zero",
-    "llvm.nvvm.sust.b.3d.i64.clamp" => "__nvvm_sust_b_3d_i64_clamp",
-    "llvm.nvvm.sust.b.3d.i64.trap" => "__nvvm_sust_b_3d_i64_trap",
-    "llvm.nvvm.sust.b.3d.i64.zero" => "__nvvm_sust_b_3d_i64_zero",
-    "llvm.nvvm.sust.b.3d.i8.clamp" => "__nvvm_sust_b_3d_i8_clamp",
-    "llvm.nvvm.sust.b.3d.i8.trap" => "__nvvm_sust_b_3d_i8_trap",
-    "llvm.nvvm.sust.b.3d.i8.zero" => "__nvvm_sust_b_3d_i8_zero",
-    "llvm.nvvm.sust.b.3d.v2i16.clamp" => "__nvvm_sust_b_3d_v2i16_clamp",
-    "llvm.nvvm.sust.b.3d.v2i16.trap" => "__nvvm_sust_b_3d_v2i16_trap",
-    "llvm.nvvm.sust.b.3d.v2i16.zero" => "__nvvm_sust_b_3d_v2i16_zero",
-    "llvm.nvvm.sust.b.3d.v2i32.clamp" => "__nvvm_sust_b_3d_v2i32_clamp",
-    "llvm.nvvm.sust.b.3d.v2i32.trap" => "__nvvm_sust_b_3d_v2i32_trap",
-    "llvm.nvvm.sust.b.3d.v2i32.zero" => "__nvvm_sust_b_3d_v2i32_zero",
-    "llvm.nvvm.sust.b.3d.v2i64.clamp" => "__nvvm_sust_b_3d_v2i64_clamp",
-    "llvm.nvvm.sust.b.3d.v2i64.trap" => "__nvvm_sust_b_3d_v2i64_trap",
-    "llvm.nvvm.sust.b.3d.v2i64.zero" => "__nvvm_sust_b_3d_v2i64_zero",
-    "llvm.nvvm.sust.b.3d.v2i8.clamp" => "__nvvm_sust_b_3d_v2i8_clamp",
-    "llvm.nvvm.sust.b.3d.v2i8.trap" => "__nvvm_sust_b_3d_v2i8_trap",
-    "llvm.nvvm.sust.b.3d.v2i8.zero" => "__nvvm_sust_b_3d_v2i8_zero",
-    "llvm.nvvm.sust.b.3d.v4i16.clamp" => "__nvvm_sust_b_3d_v4i16_clamp",
-    "llvm.nvvm.sust.b.3d.v4i16.trap" => "__nvvm_sust_b_3d_v4i16_trap",
-    "llvm.nvvm.sust.b.3d.v4i16.zero" => "__nvvm_sust_b_3d_v4i16_zero",
-    "llvm.nvvm.sust.b.3d.v4i32.clamp" => "__nvvm_sust_b_3d_v4i32_clamp",
-    "llvm.nvvm.sust.b.3d.v4i32.trap" => "__nvvm_sust_b_3d_v4i32_trap",
-    "llvm.nvvm.sust.b.3d.v4i32.zero" => "__nvvm_sust_b_3d_v4i32_zero",
-    "llvm.nvvm.sust.b.3d.v4i8.clamp" => "__nvvm_sust_b_3d_v4i8_clamp",
-    "llvm.nvvm.sust.b.3d.v4i8.trap" => "__nvvm_sust_b_3d_v4i8_trap",
-    "llvm.nvvm.sust.b.3d.v4i8.zero" => "__nvvm_sust_b_3d_v4i8_zero",
-    "llvm.nvvm.sust.p.1d.array.i16.trap" => "__nvvm_sust_p_1d_array_i16_trap",
-    "llvm.nvvm.sust.p.1d.array.i32.trap" => "__nvvm_sust_p_1d_array_i32_trap",
-    "llvm.nvvm.sust.p.1d.array.i8.trap" => "__nvvm_sust_p_1d_array_i8_trap",
-    "llvm.nvvm.sust.p.1d.array.v2i16.trap" => "__nvvm_sust_p_1d_array_v2i16_trap",
-    "llvm.nvvm.sust.p.1d.array.v2i32.trap" => "__nvvm_sust_p_1d_array_v2i32_trap",
-    "llvm.nvvm.sust.p.1d.array.v2i8.trap" => "__nvvm_sust_p_1d_array_v2i8_trap",
-    "llvm.nvvm.sust.p.1d.array.v4i16.trap" => "__nvvm_sust_p_1d_array_v4i16_trap",
-    "llvm.nvvm.sust.p.1d.array.v4i32.trap" => "__nvvm_sust_p_1d_array_v4i32_trap",
-    "llvm.nvvm.sust.p.1d.array.v4i8.trap" => "__nvvm_sust_p_1d_array_v4i8_trap",
-    "llvm.nvvm.sust.p.1d.i16.trap" => "__nvvm_sust_p_1d_i16_trap",
-    "llvm.nvvm.sust.p.1d.i32.trap" => "__nvvm_sust_p_1d_i32_trap",
-    "llvm.nvvm.sust.p.1d.i8.trap" => "__nvvm_sust_p_1d_i8_trap",
-    "llvm.nvvm.sust.p.1d.v2i16.trap" => "__nvvm_sust_p_1d_v2i16_trap",
-    "llvm.nvvm.sust.p.1d.v2i32.trap" => "__nvvm_sust_p_1d_v2i32_trap",
-    "llvm.nvvm.sust.p.1d.v2i8.trap" => "__nvvm_sust_p_1d_v2i8_trap",
-    "llvm.nvvm.sust.p.1d.v4i16.trap" => "__nvvm_sust_p_1d_v4i16_trap",
-    "llvm.nvvm.sust.p.1d.v4i32.trap" => "__nvvm_sust_p_1d_v4i32_trap",
-    "llvm.nvvm.sust.p.1d.v4i8.trap" => "__nvvm_sust_p_1d_v4i8_trap",
-    "llvm.nvvm.sust.p.2d.array.i16.trap" => "__nvvm_sust_p_2d_array_i16_trap",
-    "llvm.nvvm.sust.p.2d.array.i32.trap" => "__nvvm_sust_p_2d_array_i32_trap",
-    "llvm.nvvm.sust.p.2d.array.i8.trap" => "__nvvm_sust_p_2d_array_i8_trap",
-    "llvm.nvvm.sust.p.2d.array.v2i16.trap" => "__nvvm_sust_p_2d_array_v2i16_trap",
-    "llvm.nvvm.sust.p.2d.array.v2i32.trap" => "__nvvm_sust_p_2d_array_v2i32_trap",
-    "llvm.nvvm.sust.p.2d.array.v2i8.trap" => "__nvvm_sust_p_2d_array_v2i8_trap",
-    "llvm.nvvm.sust.p.2d.array.v4i16.trap" => "__nvvm_sust_p_2d_array_v4i16_trap",
-    "llvm.nvvm.sust.p.2d.array.v4i32.trap" => "__nvvm_sust_p_2d_array_v4i32_trap",
-    "llvm.nvvm.sust.p.2d.array.v4i8.trap" => "__nvvm_sust_p_2d_array_v4i8_trap",
-    "llvm.nvvm.sust.p.2d.i16.trap" => "__nvvm_sust_p_2d_i16_trap",
-    "llvm.nvvm.sust.p.2d.i32.trap" => "__nvvm_sust_p_2d_i32_trap",
-    "llvm.nvvm.sust.p.2d.i8.trap" => "__nvvm_sust_p_2d_i8_trap",
-    "llvm.nvvm.sust.p.2d.v2i16.trap" => "__nvvm_sust_p_2d_v2i16_trap",
-    "llvm.nvvm.sust.p.2d.v2i32.trap" => "__nvvm_sust_p_2d_v2i32_trap",
-    "llvm.nvvm.sust.p.2d.v2i8.trap" => "__nvvm_sust_p_2d_v2i8_trap",
-    "llvm.nvvm.sust.p.2d.v4i16.trap" => "__nvvm_sust_p_2d_v4i16_trap",
-    "llvm.nvvm.sust.p.2d.v4i32.trap" => "__nvvm_sust_p_2d_v4i32_trap",
-    "llvm.nvvm.sust.p.2d.v4i8.trap" => "__nvvm_sust_p_2d_v4i8_trap",
-    "llvm.nvvm.sust.p.3d.i16.trap" => "__nvvm_sust_p_3d_i16_trap",
-    "llvm.nvvm.sust.p.3d.i32.trap" => "__nvvm_sust_p_3d_i32_trap",
-    "llvm.nvvm.sust.p.3d.i8.trap" => "__nvvm_sust_p_3d_i8_trap",
-    "llvm.nvvm.sust.p.3d.v2i16.trap" => "__nvvm_sust_p_3d_v2i16_trap",
-    "llvm.nvvm.sust.p.3d.v2i32.trap" => "__nvvm_sust_p_3d_v2i32_trap",
-    "llvm.nvvm.sust.p.3d.v2i8.trap" => "__nvvm_sust_p_3d_v2i8_trap",
-    "llvm.nvvm.sust.p.3d.v4i16.trap" => "__nvvm_sust_p_3d_v4i16_trap",
-    "llvm.nvvm.sust.p.3d.v4i32.trap" => "__nvvm_sust_p_3d_v4i32_trap",
-    "llvm.nvvm.sust.p.3d.v4i8.trap" => "__nvvm_sust_p_3d_v4i8_trap",
-    "llvm.nvvm.swap.lo.hi.b64" => "__nvvm_swap_lo_hi_b64",
-    "llvm.nvvm.trunc.d" => "__nvvm_trunc_d",
-    "llvm.nvvm.trunc.f" => "__nvvm_trunc_f",
-    "llvm.nvvm.trunc.ftz.f" => "__nvvm_trunc_ftz_f",
-    "llvm.nvvm.txq.array.size" => "__nvvm_txq_array_size",
-    "llvm.nvvm.txq.channel.data.type" => "__nvvm_txq_channel_data_type",
-    "llvm.nvvm.txq.channel.order" => "__nvvm_txq_channel_order",
-    "llvm.nvvm.txq.depth" => "__nvvm_txq_depth",
-    "llvm.nvvm.txq.height" => "__nvvm_txq_height",
-    "llvm.nvvm.txq.num.mipmap.levels" => "__nvvm_txq_num_mipmap_levels",
-    "llvm.nvvm.txq.num.samples" => "__nvvm_txq_num_samples",
-    "llvm.nvvm.txq.width" => "__nvvm_txq_width",
-    "llvm.nvvm.ui2d.rm" => "__nvvm_ui2d_rm",
-    "llvm.nvvm.ui2d.rn" => "__nvvm_ui2d_rn",
-    "llvm.nvvm.ui2d.rp" => "__nvvm_ui2d_rp",
-    "llvm.nvvm.ui2d.rz" => "__nvvm_ui2d_rz",
-    "llvm.nvvm.ui2f.rm" => "__nvvm_ui2f_rm",
-    "llvm.nvvm.ui2f.rn" => "__nvvm_ui2f_rn",
-    "llvm.nvvm.ui2f.rp" => "__nvvm_ui2f_rp",
-    "llvm.nvvm.ui2f.rz" => "__nvvm_ui2f_rz",
-    "llvm.nvvm.ull2d.rm" => "__nvvm_ull2d_rm",
-    "llvm.nvvm.ull2d.rn" => "__nvvm_ull2d_rn",
-    "llvm.nvvm.ull2d.rp" => "__nvvm_ull2d_rp",
-    "llvm.nvvm.ull2d.rz" => "__nvvm_ull2d_rz",
-    "llvm.nvvm.ull2f.rm" => "__nvvm_ull2f_rm",
-    "llvm.nvvm.ull2f.rn" => "__nvvm_ull2f_rn",
-    "llvm.nvvm.ull2f.rp" => "__nvvm_ull2f_rp",
-    "llvm.nvvm.ull2f.rz" => "__nvvm_ull2f_rz",
     // ppc
+    "llvm.ppc.addex" => "__builtin_ppc_addex",
+    "llvm.ppc.addf128.round.to.odd" => "__builtin_addf128_round_to_odd",
+    "llvm.ppc.altivec.crypto.vpermxor" => "__builtin_altivec_crypto_vpermxor",
+    "llvm.ppc.altivec.crypto.vpermxor.be" => "__builtin_altivec_crypto_vpermxor_be",
+    "llvm.ppc.altivec.crypto.vsbox" => "__builtin_altivec_crypto_vsbox",
+    "llvm.ppc.altivec.crypto.vshasigmad" => "__builtin_altivec_crypto_vshasigmad",
+    "llvm.ppc.altivec.crypto.vshasigmaw" => "__builtin_altivec_crypto_vshasigmaw",
     "llvm.ppc.altivec.dss" => "__builtin_altivec_dss",
     "llvm.ppc.altivec.dssall" => "__builtin_altivec_dssall",
     "llvm.ppc.altivec.dst" => "__builtin_altivec_dst",
@@ -2043,29 +904,34 @@ match name {
     "llvm.ppc.altivec.dstt" => "__builtin_altivec_dstt",
     "llvm.ppc.altivec.mfvscr" => "__builtin_altivec_mfvscr",
     "llvm.ppc.altivec.mtvscr" => "__builtin_altivec_mtvscr",
-    "llvm.ppc.altivec.vaddcuw" => "__builtin_altivec_vaddcuw",
-    "llvm.ppc.altivec.vaddsbs" => "__builtin_altivec_vaddsbs",
-    "llvm.ppc.altivec.vaddshs" => "__builtin_altivec_vaddshs",
-    "llvm.ppc.altivec.vaddsws" => "__builtin_altivec_vaddsws",
-    "llvm.ppc.altivec.vaddubs" => "__builtin_altivec_vaddubs",
-    "llvm.ppc.altivec.vadduhs" => "__builtin_altivec_vadduhs",
-    "llvm.ppc.altivec.vadduws" => "__builtin_altivec_vadduws",
-    "llvm.ppc.altivec.vavgsb" => "__builtin_altivec_vavgsb",
-    "llvm.ppc.altivec.vavgsh" => "__builtin_altivec_vavgsh",
-    "llvm.ppc.altivec.vavgsw" => "__builtin_altivec_vavgsw",
-    "llvm.ppc.altivec.vavgub" => "__builtin_altivec_vavgub",
-    "llvm.ppc.altivec.vavguh" => "__builtin_altivec_vavguh",
-    "llvm.ppc.altivec.vavguw" => "__builtin_altivec_vavguw",
+    "llvm.ppc.altivec.mtvsrbm" => "__builtin_altivec_mtvsrbm",
+    "llvm.ppc.altivec.mtvsrdm" => "__builtin_altivec_mtvsrdm",
+    "llvm.ppc.altivec.mtvsrhm" => "__builtin_altivec_mtvsrhm",
+    "llvm.ppc.altivec.mtvsrqm" => "__builtin_altivec_mtvsrqm",
+    "llvm.ppc.altivec.mtvsrwm" => "__builtin_altivec_mtvsrwm",
+    "llvm.ppc.altivec.vaddecuq" => "__builtin_altivec_vaddecuq",
+    "llvm.ppc.altivec.vaddeuqm" => "__builtin_altivec_vaddeuqm",
+    "llvm.ppc.altivec.vbpermd" => "__builtin_altivec_vbpermd",
+    "llvm.ppc.altivec.vbpermq" => "__builtin_altivec_vbpermq",
     "llvm.ppc.altivec.vcfsx" => "__builtin_altivec_vcfsx",
+    "llvm.ppc.altivec.vcfuged" => "__builtin_altivec_vcfuged",
     "llvm.ppc.altivec.vcfux" => "__builtin_altivec_vcfux",
+    "llvm.ppc.altivec.vclrlb" => "__builtin_altivec_vclrlb",
+    "llvm.ppc.altivec.vclrrb" => "__builtin_altivec_vclrrb",
+    "llvm.ppc.altivec.vclzdm" => "__builtin_altivec_vclzdm",
+    "llvm.ppc.altivec.vclzlsbb" => "__builtin_altivec_vclzlsbb",
     "llvm.ppc.altivec.vcmpbfp" => "__builtin_altivec_vcmpbfp",
     "llvm.ppc.altivec.vcmpbfp.p" => "__builtin_altivec_vcmpbfp_p",
     "llvm.ppc.altivec.vcmpeqfp" => "__builtin_altivec_vcmpeqfp",
     "llvm.ppc.altivec.vcmpeqfp.p" => "__builtin_altivec_vcmpeqfp_p",
     "llvm.ppc.altivec.vcmpequb" => "__builtin_altivec_vcmpequb",
     "llvm.ppc.altivec.vcmpequb.p" => "__builtin_altivec_vcmpequb_p",
+    "llvm.ppc.altivec.vcmpequd" => "__builtin_altivec_vcmpequd",
+    "llvm.ppc.altivec.vcmpequd.p" => "__builtin_altivec_vcmpequd_p",
     "llvm.ppc.altivec.vcmpequh" => "__builtin_altivec_vcmpequh",
     "llvm.ppc.altivec.vcmpequh.p" => "__builtin_altivec_vcmpequh_p",
+    "llvm.ppc.altivec.vcmpequq" => "__builtin_altivec_vcmpequq",
+    "llvm.ppc.altivec.vcmpequq.p" => "__builtin_altivec_vcmpequq_p",
     "llvm.ppc.altivec.vcmpequw" => "__builtin_altivec_vcmpequw",
     "llvm.ppc.altivec.vcmpequw.p" => "__builtin_altivec_vcmpequw_p",
     "llvm.ppc.altivec.vcmpgefp" => "__builtin_altivec_vcmpgefp",
@@ -2074,91 +940,142 @@ match name {
     "llvm.ppc.altivec.vcmpgtfp.p" => "__builtin_altivec_vcmpgtfp_p",
     "llvm.ppc.altivec.vcmpgtsb" => "__builtin_altivec_vcmpgtsb",
     "llvm.ppc.altivec.vcmpgtsb.p" => "__builtin_altivec_vcmpgtsb_p",
+    "llvm.ppc.altivec.vcmpgtsd" => "__builtin_altivec_vcmpgtsd",
+    "llvm.ppc.altivec.vcmpgtsd.p" => "__builtin_altivec_vcmpgtsd_p",
     "llvm.ppc.altivec.vcmpgtsh" => "__builtin_altivec_vcmpgtsh",
     "llvm.ppc.altivec.vcmpgtsh.p" => "__builtin_altivec_vcmpgtsh_p",
+    "llvm.ppc.altivec.vcmpgtsq" => "__builtin_altivec_vcmpgtsq",
+    "llvm.ppc.altivec.vcmpgtsq.p" => "__builtin_altivec_vcmpgtsq_p",
     "llvm.ppc.altivec.vcmpgtsw" => "__builtin_altivec_vcmpgtsw",
     "llvm.ppc.altivec.vcmpgtsw.p" => "__builtin_altivec_vcmpgtsw_p",
     "llvm.ppc.altivec.vcmpgtub" => "__builtin_altivec_vcmpgtub",
     "llvm.ppc.altivec.vcmpgtub.p" => "__builtin_altivec_vcmpgtub_p",
+    "llvm.ppc.altivec.vcmpgtud" => "__builtin_altivec_vcmpgtud",
+    "llvm.ppc.altivec.vcmpgtud.p" => "__builtin_altivec_vcmpgtud_p",
     "llvm.ppc.altivec.vcmpgtuh" => "__builtin_altivec_vcmpgtuh",
     "llvm.ppc.altivec.vcmpgtuh.p" => "__builtin_altivec_vcmpgtuh_p",
+    "llvm.ppc.altivec.vcmpgtuq" => "__builtin_altivec_vcmpgtuq",
+    "llvm.ppc.altivec.vcmpgtuq.p" => "__builtin_altivec_vcmpgtuq_p",
     "llvm.ppc.altivec.vcmpgtuw" => "__builtin_altivec_vcmpgtuw",
     "llvm.ppc.altivec.vcmpgtuw.p" => "__builtin_altivec_vcmpgtuw_p",
+    "llvm.ppc.altivec.vcmpneb" => "__builtin_altivec_vcmpneb",
+    "llvm.ppc.altivec.vcmpneb.p" => "__builtin_altivec_vcmpneb_p",
+    "llvm.ppc.altivec.vcmpneh" => "__builtin_altivec_vcmpneh",
+    "llvm.ppc.altivec.vcmpneh.p" => "__builtin_altivec_vcmpneh_p",
+    "llvm.ppc.altivec.vcmpnew" => "__builtin_altivec_vcmpnew",
+    "llvm.ppc.altivec.vcmpnew.p" => "__builtin_altivec_vcmpnew_p",
+    "llvm.ppc.altivec.vcmpnezb" => "__builtin_altivec_vcmpnezb",
+    "llvm.ppc.altivec.vcmpnezb.p" => "__builtin_altivec_vcmpnezb_p",
+    "llvm.ppc.altivec.vcmpnezh" => "__builtin_altivec_vcmpnezh",
+    "llvm.ppc.altivec.vcmpnezh.p" => "__builtin_altivec_vcmpnezh_p",
+    "llvm.ppc.altivec.vcmpnezw" => "__builtin_altivec_vcmpnezw",
+    "llvm.ppc.altivec.vcmpnezw.p" => "__builtin_altivec_vcmpnezw_p",
+    "llvm.ppc.altivec.vcntmbb" => "__builtin_altivec_vcntmbb",
+    "llvm.ppc.altivec.vcntmbd" => "__builtin_altivec_vcntmbd",
+    "llvm.ppc.altivec.vcntmbh" => "__builtin_altivec_vcntmbh",
+    "llvm.ppc.altivec.vcntmbw" => "__builtin_altivec_vcntmbw",
     "llvm.ppc.altivec.vctsxs" => "__builtin_altivec_vctsxs",
     "llvm.ppc.altivec.vctuxs" => "__builtin_altivec_vctuxs",
-    "llvm.ppc.altivec.vexptefp" => "__builtin_altivec_vexptefp",
-    "llvm.ppc.altivec.vlogefp" => "__builtin_altivec_vlogefp",
+    "llvm.ppc.altivec.vctzdm" => "__builtin_altivec_vctzdm",
+    "llvm.ppc.altivec.vctzlsbb" => "__builtin_altivec_vctzlsbb",
+    "llvm.ppc.altivec.vexpandbm" => "__builtin_altivec_vexpandbm",
+    "llvm.ppc.altivec.vexpanddm" => "__builtin_altivec_vexpanddm",
+    "llvm.ppc.altivec.vexpandhm" => "__builtin_altivec_vexpandhm",
+    "llvm.ppc.altivec.vexpandqm" => "__builtin_altivec_vexpandqm",
+    "llvm.ppc.altivec.vexpandwm" => "__builtin_altivec_vexpandwm",
+    "llvm.ppc.altivec.vextddvlx" => "__builtin_altivec_vextddvlx",
+    "llvm.ppc.altivec.vextddvrx" => "__builtin_altivec_vextddvrx",
+    "llvm.ppc.altivec.vextdubvlx" => "__builtin_altivec_vextdubvlx",
+    "llvm.ppc.altivec.vextdubvrx" => "__builtin_altivec_vextdubvrx",
+    "llvm.ppc.altivec.vextduhvlx" => "__builtin_altivec_vextduhvlx",
+    "llvm.ppc.altivec.vextduhvrx" => "__builtin_altivec_vextduhvrx",
+    "llvm.ppc.altivec.vextduwvlx" => "__builtin_altivec_vextduwvlx",
+    "llvm.ppc.altivec.vextduwvrx" => "__builtin_altivec_vextduwvrx",
+    "llvm.ppc.altivec.vextractbm" => "__builtin_altivec_vextractbm",
+    "llvm.ppc.altivec.vextractdm" => "__builtin_altivec_vextractdm",
+    "llvm.ppc.altivec.vextracthm" => "__builtin_altivec_vextracthm",
+    "llvm.ppc.altivec.vextractqm" => "__builtin_altivec_vextractqm",
+    "llvm.ppc.altivec.vextractwm" => "__builtin_altivec_vextractwm",
+    "llvm.ppc.altivec.vextsb2d" => "__builtin_altivec_vextsb2d",
+    "llvm.ppc.altivec.vextsb2w" => "__builtin_altivec_vextsb2w",
+    "llvm.ppc.altivec.vextsd2q" => "__builtin_altivec_vextsd2q",
+    "llvm.ppc.altivec.vextsh2d" => "__builtin_altivec_vextsh2d",
+    "llvm.ppc.altivec.vextsh2w" => "__builtin_altivec_vextsh2w",
+    "llvm.ppc.altivec.vextsw2d" => "__builtin_altivec_vextsw2d",
+    "llvm.ppc.altivec.vgbbd" => "__builtin_altivec_vgbbd",
+    "llvm.ppc.altivec.vgnb" => "__builtin_altivec_vgnb",
+    "llvm.ppc.altivec.vinsblx" => "__builtin_altivec_vinsblx",
+    "llvm.ppc.altivec.vinsbrx" => "__builtin_altivec_vinsbrx",
+    "llvm.ppc.altivec.vinsbvlx" => "__builtin_altivec_vinsbvlx",
+    "llvm.ppc.altivec.vinsbvrx" => "__builtin_altivec_vinsbvrx",
+    "llvm.ppc.altivec.vinsdlx" => "__builtin_altivec_vinsdlx",
+    "llvm.ppc.altivec.vinsdrx" => "__builtin_altivec_vinsdrx",
+    "llvm.ppc.altivec.vinshlx" => "__builtin_altivec_vinshlx",
+    "llvm.ppc.altivec.vinshrx" => "__builtin_altivec_vinshrx",
+    "llvm.ppc.altivec.vinshvlx" => "__builtin_altivec_vinshvlx",
+    "llvm.ppc.altivec.vinshvrx" => "__builtin_altivec_vinshvrx",
+    "llvm.ppc.altivec.vinswlx" => "__builtin_altivec_vinswlx",
+    "llvm.ppc.altivec.vinswrx" => "__builtin_altivec_vinswrx",
+    "llvm.ppc.altivec.vinswvlx" => "__builtin_altivec_vinswvlx",
+    "llvm.ppc.altivec.vinswvrx" => "__builtin_altivec_vinswvrx",
     "llvm.ppc.altivec.vmaddfp" => "__builtin_altivec_vmaddfp",
-    "llvm.ppc.altivec.vmaxfp" => "__builtin_altivec_vmaxfp",
-    "llvm.ppc.altivec.vmaxsb" => "__builtin_altivec_vmaxsb",
-    "llvm.ppc.altivec.vmaxsh" => "__builtin_altivec_vmaxsh",
-    "llvm.ppc.altivec.vmaxsw" => "__builtin_altivec_vmaxsw",
-    "llvm.ppc.altivec.vmaxub" => "__builtin_altivec_vmaxub",
-    "llvm.ppc.altivec.vmaxuh" => "__builtin_altivec_vmaxuh",
-    "llvm.ppc.altivec.vmaxuw" => "__builtin_altivec_vmaxuw",
     "llvm.ppc.altivec.vmhaddshs" => "__builtin_altivec_vmhaddshs",
     "llvm.ppc.altivec.vmhraddshs" => "__builtin_altivec_vmhraddshs",
-    "llvm.ppc.altivec.vminfp" => "__builtin_altivec_vminfp",
-    "llvm.ppc.altivec.vminsb" => "__builtin_altivec_vminsb",
-    "llvm.ppc.altivec.vminsh" => "__builtin_altivec_vminsh",
-    "llvm.ppc.altivec.vminsw" => "__builtin_altivec_vminsw",
-    "llvm.ppc.altivec.vminub" => "__builtin_altivec_vminub",
-    "llvm.ppc.altivec.vminuh" => "__builtin_altivec_vminuh",
-    "llvm.ppc.altivec.vminuw" => "__builtin_altivec_vminuw",
     "llvm.ppc.altivec.vmladduhm" => "__builtin_altivec_vmladduhm",
+    "llvm.ppc.altivec.vmsumcud" => "__builtin_altivec_vmsumcud",
     "llvm.ppc.altivec.vmsummbm" => "__builtin_altivec_vmsummbm",
     "llvm.ppc.altivec.vmsumshm" => "__builtin_altivec_vmsumshm",
     "llvm.ppc.altivec.vmsumshs" => "__builtin_altivec_vmsumshs",
     "llvm.ppc.altivec.vmsumubm" => "__builtin_altivec_vmsumubm",
+    "llvm.ppc.altivec.vmsumudm" => "__builtin_altivec_vmsumudm",
     "llvm.ppc.altivec.vmsumuhm" => "__builtin_altivec_vmsumuhm",
     "llvm.ppc.altivec.vmsumuhs" => "__builtin_altivec_vmsumuhs",
     "llvm.ppc.altivec.vmulesb" => "__builtin_altivec_vmulesb",
     "llvm.ppc.altivec.vmulesh" => "__builtin_altivec_vmulesh",
+    "llvm.ppc.altivec.vmulesw" => "__builtin_altivec_vmulesw",
     "llvm.ppc.altivec.vmuleub" => "__builtin_altivec_vmuleub",
     "llvm.ppc.altivec.vmuleuh" => "__builtin_altivec_vmuleuh",
+    "llvm.ppc.altivec.vmuleuw" => "__builtin_altivec_vmuleuw",
     "llvm.ppc.altivec.vmulosb" => "__builtin_altivec_vmulosb",
     "llvm.ppc.altivec.vmulosh" => "__builtin_altivec_vmulosh",
+    "llvm.ppc.altivec.vmulosw" => "__builtin_altivec_vmulosw",
     "llvm.ppc.altivec.vmuloub" => "__builtin_altivec_vmuloub",
     "llvm.ppc.altivec.vmulouh" => "__builtin_altivec_vmulouh",
+    "llvm.ppc.altivec.vmulouw" => "__builtin_altivec_vmulouw",
     "llvm.ppc.altivec.vnmsubfp" => "__builtin_altivec_vnmsubfp",
+    "llvm.ppc.altivec.vpdepd" => "__builtin_altivec_vpdepd",
     "llvm.ppc.altivec.vperm" => "__builtin_altivec_vperm_4si",
+    "llvm.ppc.altivec.vpextd" => "__builtin_altivec_vpextd",
     "llvm.ppc.altivec.vpkpx" => "__builtin_altivec_vpkpx",
+    "llvm.ppc.altivec.vpksdss" => "__builtin_altivec_vpksdss",
+    "llvm.ppc.altivec.vpksdus" => "__builtin_altivec_vpksdus",
     "llvm.ppc.altivec.vpkshss" => "__builtin_altivec_vpkshss",
     "llvm.ppc.altivec.vpkshus" => "__builtin_altivec_vpkshus",
     "llvm.ppc.altivec.vpkswss" => "__builtin_altivec_vpkswss",
     "llvm.ppc.altivec.vpkswus" => "__builtin_altivec_vpkswus",
+    "llvm.ppc.altivec.vpkudus" => "__builtin_altivec_vpkudus",
     "llvm.ppc.altivec.vpkuhus" => "__builtin_altivec_vpkuhus",
     "llvm.ppc.altivec.vpkuwus" => "__builtin_altivec_vpkuwus",
-    "llvm.ppc.altivec.vrefp" => "__builtin_altivec_vrefp",
+    "llvm.ppc.altivec.vprtybd" => "__builtin_altivec_vprtybd",
+    "llvm.ppc.altivec.vprtybq" => "__builtin_altivec_vprtybq",
+    "llvm.ppc.altivec.vprtybw" => "__builtin_altivec_vprtybw",
     "llvm.ppc.altivec.vrfim" => "__builtin_altivec_vrfim",
     "llvm.ppc.altivec.vrfin" => "__builtin_altivec_vrfin",
     "llvm.ppc.altivec.vrfip" => "__builtin_altivec_vrfip",
     "llvm.ppc.altivec.vrfiz" => "__builtin_altivec_vrfiz",
-    "llvm.ppc.altivec.vrlb" => "__builtin_altivec_vrlb",
-    "llvm.ppc.altivec.vrlh" => "__builtin_altivec_vrlh",
-    "llvm.ppc.altivec.vrlw" => "__builtin_altivec_vrlw",
-    "llvm.ppc.altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
     "llvm.ppc.altivec.vsel" => "__builtin_altivec_vsel_4si",
-    "llvm.ppc.altivec.vsl" => "__builtin_altivec_vsl",
-    "llvm.ppc.altivec.vslb" => "__builtin_altivec_vslb",
-    "llvm.ppc.altivec.vslh" => "__builtin_altivec_vslh",
-    "llvm.ppc.altivec.vslo" => "__builtin_altivec_vslo",
-    "llvm.ppc.altivec.vslw" => "__builtin_altivec_vslw",
-    "llvm.ppc.altivec.vsr" => "__builtin_altivec_vsr",
-    "llvm.ppc.altivec.vsrab" => "__builtin_altivec_vsrab",
-    "llvm.ppc.altivec.vsrah" => "__builtin_altivec_vsrah",
-    "llvm.ppc.altivec.vsraw" => "__builtin_altivec_vsraw",
-    "llvm.ppc.altivec.vsrb" => "__builtin_altivec_vsrb",
-    "llvm.ppc.altivec.vsrh" => "__builtin_altivec_vsrh",
-    "llvm.ppc.altivec.vsro" => "__builtin_altivec_vsro",
-    "llvm.ppc.altivec.vsrw" => "__builtin_altivec_vsrw",
-    "llvm.ppc.altivec.vsubcuw" => "__builtin_altivec_vsubcuw",
-    "llvm.ppc.altivec.vsubsbs" => "__builtin_altivec_vsubsbs",
-    "llvm.ppc.altivec.vsubshs" => "__builtin_altivec_vsubshs",
-    "llvm.ppc.altivec.vsubsws" => "__builtin_altivec_vsubsws",
-    "llvm.ppc.altivec.vsububs" => "__builtin_altivec_vsububs",
-    "llvm.ppc.altivec.vsubuhs" => "__builtin_altivec_vsubuhs",
-    "llvm.ppc.altivec.vsubuws" => "__builtin_altivec_vsubuws",
+    "llvm.ppc.altivec.vsldbi" => "__builtin_altivec_vsldbi",
+    "llvm.ppc.altivec.vsrdbi" => "__builtin_altivec_vsrdbi",
+    "llvm.ppc.altivec.vstribl" => "__builtin_altivec_vstribl",
+    "llvm.ppc.altivec.vstribl.p" => "__builtin_altivec_vstribl_p",
+    "llvm.ppc.altivec.vstribr" => "__builtin_altivec_vstribr",
+    "llvm.ppc.altivec.vstribr.p" => "__builtin_altivec_vstribr_p",
+    "llvm.ppc.altivec.vstrihl" => "__builtin_altivec_vstrihl",
+    "llvm.ppc.altivec.vstrihl.p" => "__builtin_altivec_vstrihl_p",
+    "llvm.ppc.altivec.vstrihr" => "__builtin_altivec_vstrihr",
+    "llvm.ppc.altivec.vstrihr.p" => "__builtin_altivec_vstrihr_p",
+    "llvm.ppc.altivec.vsubecuq" => "__builtin_altivec_vsubecuq",
+    "llvm.ppc.altivec.vsubeuqm" => "__builtin_altivec_vsubeuqm",
     "llvm.ppc.altivec.vsum2sws" => "__builtin_altivec_vsum2sws",
     "llvm.ppc.altivec.vsum4sbs" => "__builtin_altivec_vsum4sbs",
     "llvm.ppc.altivec.vsum4shs" => "__builtin_altivec_vsum4shs",
@@ -2167,53 +1084,221 @@ match name {
     "llvm.ppc.altivec.vupkhpx" => "__builtin_altivec_vupkhpx",
     "llvm.ppc.altivec.vupkhsb" => "__builtin_altivec_vupkhsb",
     "llvm.ppc.altivec.vupkhsh" => "__builtin_altivec_vupkhsh",
+    "llvm.ppc.altivec.vupkhsw" => "__builtin_altivec_vupkhsw",
     "llvm.ppc.altivec.vupklpx" => "__builtin_altivec_vupklpx",
     "llvm.ppc.altivec.vupklsb" => "__builtin_altivec_vupklsb",
     "llvm.ppc.altivec.vupklsh" => "__builtin_altivec_vupklsh",
-    // ptx
-    "llvm.ptx.bar.sync" => "__builtin_ptx_bar_sync",
-    "llvm.ptx.read.clock" => "__builtin_ptx_read_clock",
-    "llvm.ptx.read.clock64" => "__builtin_ptx_read_clock64",
-    "llvm.ptx.read.gridid" => "__builtin_ptx_read_gridid",
-    "llvm.ptx.read.laneid" => "__builtin_ptx_read_laneid",
-    "llvm.ptx.read.lanemask.eq" => "__builtin_ptx_read_lanemask_eq",
-    "llvm.ptx.read.lanemask.ge" => "__builtin_ptx_read_lanemask_ge",
-    "llvm.ptx.read.lanemask.gt" => "__builtin_ptx_read_lanemask_gt",
-    "llvm.ptx.read.lanemask.le" => "__builtin_ptx_read_lanemask_le",
-    "llvm.ptx.read.lanemask.lt" => "__builtin_ptx_read_lanemask_lt",
-    "llvm.ptx.read.nsmid" => "__builtin_ptx_read_nsmid",
-    "llvm.ptx.read.nwarpid" => "__builtin_ptx_read_nwarpid",
-    "llvm.ptx.read.pm0" => "__builtin_ptx_read_pm0",
-    "llvm.ptx.read.pm1" => "__builtin_ptx_read_pm1",
-    "llvm.ptx.read.pm2" => "__builtin_ptx_read_pm2",
-    "llvm.ptx.read.pm3" => "__builtin_ptx_read_pm3",
-    "llvm.ptx.read.smid" => "__builtin_ptx_read_smid",
-    "llvm.ptx.read.warpid" => "__builtin_ptx_read_warpid",
+    "llvm.ppc.altivec.vupklsw" => "__builtin_altivec_vupklsw",
+    "llvm.ppc.bcdadd" => "__builtin_ppc_bcdadd",
+    "llvm.ppc.bcdadd.p" => "__builtin_ppc_bcdadd_p",
+    "llvm.ppc.bcdsub" => "__builtin_ppc_bcdsub",
+    "llvm.ppc.bcdsub.p" => "__builtin_ppc_bcdsub_p",
+    "llvm.ppc.bpermd" => "__builtin_bpermd",
+    "llvm.ppc.cfuged" => "__builtin_cfuged",
+    "llvm.ppc.cmpeqb" => "__builtin_ppc_cmpeqb",
+    "llvm.ppc.cmprb" => "__builtin_ppc_cmprb",
+    "llvm.ppc.cntlzdm" => "__builtin_cntlzdm",
+    "llvm.ppc.cnttzdm" => "__builtin_cnttzdm",
+    "llvm.ppc.compare.exp.eq" => "__builtin_ppc_compare_exp_eq",
+    "llvm.ppc.compare.exp.gt" => "__builtin_ppc_compare_exp_gt",
+    "llvm.ppc.compare.exp.lt" => "__builtin_ppc_compare_exp_lt",
+    "llvm.ppc.compare.exp.uo" => "__builtin_ppc_compare_exp_uo",
+    "llvm.ppc.darn" => "__builtin_darn",
+    "llvm.ppc.darn32" => "__builtin_darn_32",
+    "llvm.ppc.darnraw" => "__builtin_darn_raw",
+    "llvm.ppc.dcbf" => "__builtin_dcbf",
+    "llvm.ppc.dcbfl" => "__builtin_ppc_dcbfl",
+    "llvm.ppc.dcbflp" => "__builtin_ppc_dcbflp",
+    "llvm.ppc.dcbst" => "__builtin_ppc_dcbst",
+    "llvm.ppc.dcbt" => "__builtin_ppc_dcbt",
+    "llvm.ppc.dcbtst" => "__builtin_ppc_dcbtst",
+    "llvm.ppc.dcbtstt" => "__builtin_ppc_dcbtstt",
+    "llvm.ppc.dcbtt" => "__builtin_ppc_dcbtt",
+    "llvm.ppc.dcbz" => "__builtin_ppc_dcbz",
+    "llvm.ppc.divde" => "__builtin_divde",
+    "llvm.ppc.divdeu" => "__builtin_divdeu",
+    "llvm.ppc.divf128.round.to.odd" => "__builtin_divf128_round_to_odd",
+    "llvm.ppc.divwe" => "__builtin_divwe",
+    "llvm.ppc.divweu" => "__builtin_divweu",
+    "llvm.ppc.eieio" => "__builtin_ppc_eieio",
+    "llvm.ppc.extract.exp" => "__builtin_ppc_extract_exp",
+    "llvm.ppc.extract.sig" => "__builtin_ppc_extract_sig",
+    "llvm.ppc.fcfid" => "__builtin_ppc_fcfid",
+    "llvm.ppc.fcfud" => "__builtin_ppc_fcfud",
+    "llvm.ppc.fctid" => "__builtin_ppc_fctid",
+    "llvm.ppc.fctidz" => "__builtin_ppc_fctidz",
+    "llvm.ppc.fctiw" => "__builtin_ppc_fctiw",
+    "llvm.ppc.fctiwz" => "__builtin_ppc_fctiwz",
+    "llvm.ppc.fctudz" => "__builtin_ppc_fctudz",
+    "llvm.ppc.fctuwz" => "__builtin_ppc_fctuwz",
+    "llvm.ppc.fmaf128.round.to.odd" => "__builtin_fmaf128_round_to_odd",
+    "llvm.ppc.fmsub" => "__builtin_ppc_fmsub",
+    "llvm.ppc.fmsubs" => "__builtin_ppc_fmsubs",
+    "llvm.ppc.fnmadd" => "__builtin_ppc_fnmadd",
+    "llvm.ppc.fnmadds" => "__builtin_ppc_fnmadds",
+    "llvm.ppc.fre" => "__builtin_ppc_fre",
+    "llvm.ppc.fres" => "__builtin_ppc_fres",
+    "llvm.ppc.frsqrte" => "__builtin_ppc_frsqrte",
+    "llvm.ppc.frsqrtes" => "__builtin_ppc_frsqrtes",
+    "llvm.ppc.fsel" => "__builtin_ppc_fsel",
+    "llvm.ppc.fsels" => "__builtin_ppc_fsels",
+    "llvm.ppc.get.texasr" => "__builtin_get_texasr",
+    "llvm.ppc.get.texasru" => "__builtin_get_texasru",
+    "llvm.ppc.get.tfhar" => "__builtin_get_tfhar",
+    "llvm.ppc.get.tfiar" => "__builtin_get_tfiar",
+    "llvm.ppc.icbt" => "__builtin_ppc_icbt",
+    "llvm.ppc.insert.exp" => "__builtin_ppc_insert_exp",
+    "llvm.ppc.iospace.eieio" => "__builtin_ppc_iospace_eieio",
+    "llvm.ppc.iospace.lwsync" => "__builtin_ppc_iospace_lwsync",
+    "llvm.ppc.iospace.sync" => "__builtin_ppc_iospace_sync",
+    "llvm.ppc.isync" => "__builtin_ppc_isync",
+    "llvm.ppc.load4r" => "__builtin_ppc_load4r",
+    "llvm.ppc.load8r" => "__builtin_ppc_load8r",
+    "llvm.ppc.lwsync" => "__builtin_ppc_lwsync",
+    "llvm.ppc.maddhd" => "__builtin_ppc_maddhd",
+    "llvm.ppc.maddhdu" => "__builtin_ppc_maddhdu",
+    "llvm.ppc.maddld" => "__builtin_ppc_maddld",
+    "llvm.ppc.mfmsr" => "__builtin_ppc_mfmsr",
+    "llvm.ppc.mftbu" => "__builtin_ppc_mftbu",
+    "llvm.ppc.mtfsb0" => "__builtin_ppc_mtfsb0",
+    "llvm.ppc.mtfsb1" => "__builtin_ppc_mtfsb1",
+    "llvm.ppc.mtfsfi" => "__builtin_ppc_mtfsfi",
+    "llvm.ppc.mtmsr" => "__builtin_ppc_mtmsr",
+    "llvm.ppc.mulf128.round.to.odd" => "__builtin_mulf128_round_to_odd",
+    "llvm.ppc.mulhd" => "__builtin_ppc_mulhd",
+    "llvm.ppc.mulhdu" => "__builtin_ppc_mulhdu",
+    "llvm.ppc.mulhw" => "__builtin_ppc_mulhw",
+    "llvm.ppc.mulhwu" => "__builtin_ppc_mulhwu",
+    "llvm.ppc.pack.longdouble" => "__builtin_pack_longdouble",
+    "llvm.ppc.pdepd" => "__builtin_pdepd",
+    "llvm.ppc.pextd" => "__builtin_pextd",
+    "llvm.ppc.readflm" => "__builtin_readflm",
+    "llvm.ppc.scalar.extract.expq" => "__builtin_vsx_scalar_extract_expq",
+    "llvm.ppc.scalar.insert.exp.qp" => "__builtin_vsx_scalar_insert_exp_qp",
+    "llvm.ppc.set.texasr" => "__builtin_set_texasr",
+    "llvm.ppc.set.texasru" => "__builtin_set_texasru",
+    "llvm.ppc.set.tfhar" => "__builtin_set_tfhar",
+    "llvm.ppc.set.tfiar" => "__builtin_set_tfiar",
+    "llvm.ppc.setb" => "__builtin_ppc_setb",
+    "llvm.ppc.setflm" => "__builtin_setflm",
+    "llvm.ppc.setrnd" => "__builtin_setrnd",
+    "llvm.ppc.sqrtf128.round.to.odd" => "__builtin_sqrtf128_round_to_odd",
+    "llvm.ppc.stbcx" => "__builtin_ppc_stbcx",
+    "llvm.ppc.stdcx" => "__builtin_ppc_stdcx",
+    "llvm.ppc.stfiw" => "__builtin_ppc_stfiw",
+    "llvm.ppc.store2r" => "__builtin_ppc_store2r",
+    "llvm.ppc.store4r" => "__builtin_ppc_store4r",
+    "llvm.ppc.store8r" => "__builtin_ppc_store8r",
+    "llvm.ppc.stwcx" => "__builtin_ppc_stwcx",
+    "llvm.ppc.subf128.round.to.odd" => "__builtin_subf128_round_to_odd",
+    "llvm.ppc.sync" => "__builtin_ppc_sync",
+    "llvm.ppc.tabort" => "__builtin_tabort",
+    "llvm.ppc.tabortdc" => "__builtin_tabortdc",
+    "llvm.ppc.tabortdci" => "__builtin_tabortdci",
+    "llvm.ppc.tabortwc" => "__builtin_tabortwc",
+    "llvm.ppc.tabortwci" => "__builtin_tabortwci",
+    "llvm.ppc.tbegin" => "__builtin_tbegin",
+    "llvm.ppc.tcheck" => "__builtin_tcheck",
+    "llvm.ppc.tdw" => "__builtin_ppc_tdw",
+    "llvm.ppc.tend" => "__builtin_tend",
+    "llvm.ppc.tendall" => "__builtin_tendall",
+    "llvm.ppc.trap" => "__builtin_ppc_trap",
+    "llvm.ppc.trapd" => "__builtin_ppc_trapd",
+    "llvm.ppc.trechkpt" => "__builtin_trechkpt",
+    "llvm.ppc.treclaim" => "__builtin_treclaim",
+    "llvm.ppc.tresume" => "__builtin_tresume",
+    "llvm.ppc.truncf128.round.to.odd" => "__builtin_truncf128_round_to_odd",
+    "llvm.ppc.tsr" => "__builtin_tsr",
+    "llvm.ppc.tsuspend" => "__builtin_tsuspend",
+    "llvm.ppc.ttest" => "__builtin_ttest",
+    "llvm.ppc.tw" => "__builtin_ppc_tw",
+    "llvm.ppc.unpack.longdouble" => "__builtin_unpack_longdouble",
+    "llvm.ppc.vsx.xvcmpeqdp.p" => "__builtin_vsx_xvcmpeqdp_p",
+    "llvm.ppc.vsx.xvcmpeqsp.p" => "__builtin_vsx_xvcmpeqsp_p",
+    "llvm.ppc.vsx.xvcmpgedp.p" => "__builtin_vsx_xvcmpgedp_p",
+    "llvm.ppc.vsx.xvcmpgesp.p" => "__builtin_vsx_xvcmpgesp_p",
+    "llvm.ppc.vsx.xvcmpgtdp.p" => "__builtin_vsx_xvcmpgtdp_p",
+    "llvm.ppc.vsx.xvcmpgtsp.p" => "__builtin_vsx_xvcmpgtsp_p",
+    "llvm.ppc.vsx.xvredp" => "__builtin_vsx_xvredp",
+    "llvm.ppc.vsx.xvresp" => "__builtin_vsx_xvresp",
+    "llvm.ppc.vsx.xvrsqrtedp" => "__builtin_vsx_xvrsqrtedp",
+    "llvm.ppc.vsx.xvrsqrtesp" => "__builtin_vsx_xvrsqrtesp",
+    "llvm.ppc.vsx.xxpermx" => "__builtin_vsx_xxpermx",
+    // s390
+    "llvm.s390.efpc" => "__builtin_s390_efpc",
+    "llvm.s390.etnd" => "__builtin_tx_nesting_depth",
+    "llvm.s390.lcbb" => "__builtin_s390_lcbb",
+    "llvm.s390.ppa.txassist" => "__builtin_tx_assist",
+    "llvm.s390.sfpc" => "__builtin_s390_sfpc",
+    "llvm.s390.tend" => "__builtin_tend",
+    "llvm.s390.vcfn" => "__builtin_s390_vcfn",
+    "llvm.s390.vclfnhs" => "__builtin_s390_vclfnhs",
+    "llvm.s390.vclfnls" => "__builtin_s390_vclfnls",
+    "llvm.s390.vcnf" => "__builtin_s390_vcnf",
+    "llvm.s390.vcrnfs" => "__builtin_s390_vcrnfs",
+    "llvm.s390.vlbb" => "__builtin_s390_vlbb",
+    "llvm.s390.vll" => "__builtin_s390_vll",
+    "llvm.s390.vlrl" => "__builtin_s390_vlrl",
+    "llvm.s390.vmslg" => "__builtin_s390_vmslg",
+    "llvm.s390.vpdi" => "__builtin_s390_vpdi",
+    "llvm.s390.vperm" => "__builtin_s390_vperm",
+    "llvm.s390.vsld" => "__builtin_s390_vsld",
+    "llvm.s390.vsldb" => "__builtin_s390_vsldb",
+    "llvm.s390.vsrd" => "__builtin_s390_vsrd",
+    "llvm.s390.vstl" => "__builtin_s390_vstl",
+    "llvm.s390.vstrl" => "__builtin_s390_vstrl",
+    // ve
+    "llvm.ve.vl.extract.vm512l" => "__builtin_ve_vl_extract_vm512l",
+    "llvm.ve.vl.extract.vm512u" => "__builtin_ve_vl_extract_vm512u",
+    "llvm.ve.vl.insert.vm512l" => "__builtin_ve_vl_insert_vm512l",
+    "llvm.ve.vl.insert.vm512u" => "__builtin_ve_vl_insert_vm512u",
+    "llvm.ve.vl.pack.f32a" => "__builtin_ve_vl_pack_f32a",
+    "llvm.ve.vl.pack.f32p" => "__builtin_ve_vl_pack_f32p",
     // x86
-    "llvm.x86.addcarry.u32" => "__builtin_ia32_addcarry_u32",
-    "llvm.x86.addcarry.u64" => "__builtin_ia32_addcarry_u64",
-    "llvm.x86.addcarryx.u32" => "__builtin_ia32_addcarryx_u32",
-    "llvm.x86.addcarryx.u64" => "__builtin_ia32_addcarryx_u64",
+    "llvm.x86.3dnow.pavgusb" => "__builtin_ia32_pavgusb",
+    "llvm.x86.3dnow.pf2id" => "__builtin_ia32_pf2id",
+    "llvm.x86.3dnow.pfacc" => "__builtin_ia32_pfacc",
+    "llvm.x86.3dnow.pfadd" => "__builtin_ia32_pfadd",
+    "llvm.x86.3dnow.pfcmpeq" => "__builtin_ia32_pfcmpeq",
+    "llvm.x86.3dnow.pfcmpge" => "__builtin_ia32_pfcmpge",
+    "llvm.x86.3dnow.pfcmpgt" => "__builtin_ia32_pfcmpgt",
+    "llvm.x86.3dnow.pfmax" => "__builtin_ia32_pfmax",
+    "llvm.x86.3dnow.pfmin" => "__builtin_ia32_pfmin",
+    "llvm.x86.3dnow.pfmul" => "__builtin_ia32_pfmul",
+    "llvm.x86.3dnow.pfrcp" => "__builtin_ia32_pfrcp",
+    "llvm.x86.3dnow.pfrcpit1" => "__builtin_ia32_pfrcpit1",
+    "llvm.x86.3dnow.pfrcpit2" => "__builtin_ia32_pfrcpit2",
+    "llvm.x86.3dnow.pfrsqit1" => "__builtin_ia32_pfrsqit1",
+    "llvm.x86.3dnow.pfrsqrt" => "__builtin_ia32_pfrsqrt",
+    "llvm.x86.3dnow.pfsub" => "__builtin_ia32_pfsub",
+    "llvm.x86.3dnow.pfsubr" => "__builtin_ia32_pfsubr",
+    "llvm.x86.3dnow.pi2fd" => "__builtin_ia32_pi2fd",
+    "llvm.x86.3dnow.pmulhrw" => "__builtin_ia32_pmulhrw",
+    "llvm.x86.3dnowa.pf2iw" => "__builtin_ia32_pf2iw",
+    "llvm.x86.3dnowa.pfnacc" => "__builtin_ia32_pfnacc",
+    "llvm.x86.3dnowa.pfpnacc" => "__builtin_ia32_pfpnacc",
+    "llvm.x86.3dnowa.pi2fw" => "__builtin_ia32_pi2fw",
     "llvm.x86.aesni.aesdec" => "__builtin_ia32_aesdec128",
+    "llvm.x86.aesni.aesdec.256" => "__builtin_ia32_aesdec256",
+    "llvm.x86.aesni.aesdec.512" => "__builtin_ia32_aesdec512",
     "llvm.x86.aesni.aesdeclast" => "__builtin_ia32_aesdeclast128",
+    "llvm.x86.aesni.aesdeclast.256" => "__builtin_ia32_aesdeclast256",
+    "llvm.x86.aesni.aesdeclast.512" => "__builtin_ia32_aesdeclast512",
     "llvm.x86.aesni.aesenc" => "__builtin_ia32_aesenc128",
+    "llvm.x86.aesni.aesenc.256" => "__builtin_ia32_aesenc256",
+    "llvm.x86.aesni.aesenc.512" => "__builtin_ia32_aesenc512",
     "llvm.x86.aesni.aesenclast" => "__builtin_ia32_aesenclast128",
+    "llvm.x86.aesni.aesenclast.256" => "__builtin_ia32_aesenclast256",
+    "llvm.x86.aesni.aesenclast.512" => "__builtin_ia32_aesenclast512",
     "llvm.x86.aesni.aesimc" => "__builtin_ia32_aesimc128",
     "llvm.x86.aesni.aeskeygenassist" => "__builtin_ia32_aeskeygenassist128",
     "llvm.x86.avx.addsub.pd.256" => "__builtin_ia32_addsubpd256",
     "llvm.x86.avx.addsub.ps.256" => "__builtin_ia32_addsubps256",
-    "llvm.x86.avx.blend.pd.256" => "__builtin_ia32_blendpd256",
-    "llvm.x86.avx.blend.ps.256" => "__builtin_ia32_blendps256",
     "llvm.x86.avx.blendv.pd.256" => "__builtin_ia32_blendvpd256",
     "llvm.x86.avx.blendv.ps.256" => "__builtin_ia32_blendvps256",
-    "llvm.x86.avx.cmp.pd.256" => "__builtin_ia32_cmppd256",
-    "llvm.x86.avx.cmp.ps.256" => "__builtin_ia32_cmpps256",
     "llvm.x86.avx.cvt.pd2.ps.256" => "__builtin_ia32_cvtpd2ps256",
     "llvm.x86.avx.cvt.pd2dq.256" => "__builtin_ia32_cvtpd2dq256",
-    "llvm.x86.avx.cvt.ps2.pd.256" => "__builtin_ia32_cvtps2pd256",
     "llvm.x86.avx.cvt.ps2dq.256" => "__builtin_ia32_cvtps2dq256",
-    "llvm.x86.avx.cvtdq2.pd.256" => "__builtin_ia32_cvtdq2pd256",
-    "llvm.x86.avx.cvtdq2.ps.256" => "__builtin_ia32_cvtdq2ps256",
     "llvm.x86.avx.cvtt.pd2dq.256" => "__builtin_ia32_cvttpd2dq256",
     "llvm.x86.avx.cvtt.ps2dq.256" => "__builtin_ia32_cvttps2dq256",
     "llvm.x86.avx.dp.ps.256" => "__builtin_ia32_dpps256",
@@ -2243,22 +1328,6 @@ match name {
     "llvm.x86.avx.round.pd.256" => "__builtin_ia32_roundpd256",
     "llvm.x86.avx.round.ps.256" => "__builtin_ia32_roundps256",
     "llvm.x86.avx.rsqrt.ps.256" => "__builtin_ia32_rsqrtps256",
-    "llvm.x86.avx.sqrt.pd.256" => "__builtin_ia32_sqrtpd256",
-    "llvm.x86.avx.sqrt.ps.256" => "__builtin_ia32_sqrtps256",
-    "llvm.x86.avx.storeu.dq.256" => "__builtin_ia32_storedqu256",
-    "llvm.x86.avx.storeu.pd.256" => "__builtin_ia32_storeupd256",
-    "llvm.x86.avx.storeu.ps.256" => "__builtin_ia32_storeups256",
-    "llvm.x86.avx.vbroadcastf128.pd.256" => "__builtin_ia32_vbroadcastf128_pd256",
-    "llvm.x86.avx.vbroadcastf128.ps.256" => "__builtin_ia32_vbroadcastf128_ps256",
-    "llvm.x86.avx.vextractf128.pd.256" => "__builtin_ia32_vextractf128_pd256",
-    "llvm.x86.avx.vextractf128.ps.256" => "__builtin_ia32_vextractf128_ps256",
-    "llvm.x86.avx.vextractf128.si.256" => "__builtin_ia32_vextractf128_si256",
-    "llvm.x86.avx.vinsertf128.pd.256" => "__builtin_ia32_vinsertf128_pd256",
-    "llvm.x86.avx.vinsertf128.ps.256" => "__builtin_ia32_vinsertf128_ps256",
-    "llvm.x86.avx.vinsertf128.si.256" => "__builtin_ia32_vinsertf128_si256",
-    "llvm.x86.avx.vperm2f128.pd.256" => "__builtin_ia32_vperm2f128_pd256",
-    "llvm.x86.avx.vperm2f128.ps.256" => "__builtin_ia32_vperm2f128_ps256",
-    "llvm.x86.avx.vperm2f128.si.256" => "__builtin_ia32_vperm2f128_si256",
     "llvm.x86.avx.vpermilvar.pd" => "__builtin_ia32_vpermilvarpd",
     "llvm.x86.avx.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256",
     "llvm.x86.avx.vpermilvar.ps" => "__builtin_ia32_vpermilvarps",
@@ -2301,33 +1370,14 @@ match name {
     "llvm.x86.avx2.maskstore.d.256" => "__builtin_ia32_maskstored256",
     "llvm.x86.avx2.maskstore.q" => "__builtin_ia32_maskstoreq",
     "llvm.x86.avx2.maskstore.q.256" => "__builtin_ia32_maskstoreq256",
-    "llvm.x86.avx2.movntdqa" => "__builtin_ia32_movntdqa256",
     "llvm.x86.avx2.mpsadbw" => "__builtin_ia32_mpsadbw256",
-    "llvm.x86.avx2.pabs.b" => "__builtin_ia32_pabsb256",
-    "llvm.x86.avx2.pabs.d" => "__builtin_ia32_pabsd256",
-    "llvm.x86.avx2.pabs.w" => "__builtin_ia32_pabsw256",
     "llvm.x86.avx2.packssdw" => "__builtin_ia32_packssdw256",
     "llvm.x86.avx2.packsswb" => "__builtin_ia32_packsswb256",
     "llvm.x86.avx2.packusdw" => "__builtin_ia32_packusdw256",
     "llvm.x86.avx2.packuswb" => "__builtin_ia32_packuswb256",
-    "llvm.x86.avx2.padds.b" => "__builtin_ia32_paddsb256",
-    "llvm.x86.avx2.padds.w" => "__builtin_ia32_paddsw256",
-    "llvm.x86.avx2.paddus.b" => "__builtin_ia32_paddusb256",
-    "llvm.x86.avx2.paddus.w" => "__builtin_ia32_paddusw256",
     "llvm.x86.avx2.pavg.b" => "__builtin_ia32_pavgb256",
     "llvm.x86.avx2.pavg.w" => "__builtin_ia32_pavgw256",
-    "llvm.x86.avx2.pblendd.128" => "__builtin_ia32_pblendd128",
-    "llvm.x86.avx2.pblendd.256" => "__builtin_ia32_pblendd256",
     "llvm.x86.avx2.pblendvb" => "__builtin_ia32_pblendvb256",
-    "llvm.x86.avx2.pblendw" => "__builtin_ia32_pblendw256",
-    "llvm.x86.avx2.pbroadcastb.128" => "__builtin_ia32_pbroadcastb128",
-    "llvm.x86.avx2.pbroadcastb.256" => "__builtin_ia32_pbroadcastb256",
-    "llvm.x86.avx2.pbroadcastd.128" => "__builtin_ia32_pbroadcastd128",
-    "llvm.x86.avx2.pbroadcastd.256" => "__builtin_ia32_pbroadcastd256",
-    "llvm.x86.avx2.pbroadcastq.128" => "__builtin_ia32_pbroadcastq128",
-    "llvm.x86.avx2.pbroadcastq.256" => "__builtin_ia32_pbroadcastq256",
-    "llvm.x86.avx2.pbroadcastw.128" => "__builtin_ia32_pbroadcastw128",
-    "llvm.x86.avx2.pbroadcastw.256" => "__builtin_ia32_pbroadcastw256",
     "llvm.x86.avx2.permd" => "__builtin_ia32_permvarsi256",
     "llvm.x86.avx2.permps" => "__builtin_ia32_permvarsf256",
     "llvm.x86.avx2.phadd.d" => "__builtin_ia32_phaddd256",
@@ -2338,44 +1388,16 @@ match name {
     "llvm.x86.avx2.phsub.w" => "__builtin_ia32_phsubw256",
     "llvm.x86.avx2.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw256",
     "llvm.x86.avx2.pmadd.wd" => "__builtin_ia32_pmaddwd256",
-    "llvm.x86.avx2.pmaxs.b" => "__builtin_ia32_pmaxsb256",
-    "llvm.x86.avx2.pmaxs.d" => "__builtin_ia32_pmaxsd256",
-    "llvm.x86.avx2.pmaxs.w" => "__builtin_ia32_pmaxsw256",
-    "llvm.x86.avx2.pmaxu.b" => "__builtin_ia32_pmaxub256",
-    "llvm.x86.avx2.pmaxu.d" => "__builtin_ia32_pmaxud256",
-    "llvm.x86.avx2.pmaxu.w" => "__builtin_ia32_pmaxuw256",
-    "llvm.x86.avx2.pmins.b" => "__builtin_ia32_pminsb256",
-    "llvm.x86.avx2.pmins.d" => "__builtin_ia32_pminsd256",
-    "llvm.x86.avx2.pmins.w" => "__builtin_ia32_pminsw256",
-    "llvm.x86.avx2.pminu.b" => "__builtin_ia32_pminub256",
-    "llvm.x86.avx2.pminu.d" => "__builtin_ia32_pminud256",
-    "llvm.x86.avx2.pminu.w" => "__builtin_ia32_pminuw256",
     "llvm.x86.avx2.pmovmskb" => "__builtin_ia32_pmovmskb256",
-    "llvm.x86.avx2.pmovsxbd" => "__builtin_ia32_pmovsxbd256",
-    "llvm.x86.avx2.pmovsxbq" => "__builtin_ia32_pmovsxbq256",
-    "llvm.x86.avx2.pmovsxbw" => "__builtin_ia32_pmovsxbw256",
-    "llvm.x86.avx2.pmovsxdq" => "__builtin_ia32_pmovsxdq256",
-    "llvm.x86.avx2.pmovsxwd" => "__builtin_ia32_pmovsxwd256",
-    "llvm.x86.avx2.pmovsxwq" => "__builtin_ia32_pmovsxwq256",
-    "llvm.x86.avx2.pmovzxbd" => "__builtin_ia32_pmovzxbd256",
-    "llvm.x86.avx2.pmovzxbq" => "__builtin_ia32_pmovzxbq256",
-    "llvm.x86.avx2.pmovzxbw" => "__builtin_ia32_pmovzxbw256",
-    "llvm.x86.avx2.pmovzxdq" => "__builtin_ia32_pmovzxdq256",
-    "llvm.x86.avx2.pmovzxwd" => "__builtin_ia32_pmovzxwd256",
-    "llvm.x86.avx2.pmovzxwq" => "__builtin_ia32_pmovzxwq256",
-    "llvm.x86.avx2.pmul.dq" => "__builtin_ia32_pmuldq256",
     "llvm.x86.avx2.pmul.hr.sw" => "__builtin_ia32_pmulhrsw256",
     "llvm.x86.avx2.pmulh.w" => "__builtin_ia32_pmulhw256",
     "llvm.x86.avx2.pmulhu.w" => "__builtin_ia32_pmulhuw256",
-    "llvm.x86.avx2.pmulu.dq" => "__builtin_ia32_pmuludq256",
     "llvm.x86.avx2.psad.bw" => "__builtin_ia32_psadbw256",
     "llvm.x86.avx2.pshuf.b" => "__builtin_ia32_pshufb256",
     "llvm.x86.avx2.psign.b" => "__builtin_ia32_psignb256",
     "llvm.x86.avx2.psign.d" => "__builtin_ia32_psignd256",
     "llvm.x86.avx2.psign.w" => "__builtin_ia32_psignw256",
     "llvm.x86.avx2.psll.d" => "__builtin_ia32_pslld256",
-    "llvm.x86.avx2.psll.dq" => "__builtin_ia32_pslldqi256",
-    "llvm.x86.avx2.psll.dq.bs" => "__builtin_ia32_pslldqi256_byteshift",
     "llvm.x86.avx2.psll.q" => "__builtin_ia32_psllq256",
     "llvm.x86.avx2.psll.w" => "__builtin_ia32_psllw256",
     "llvm.x86.avx2.pslli.d" => "__builtin_ia32_pslldi256",
@@ -2392,8 +1414,6 @@ match name {
     "llvm.x86.avx2.psrav.d" => "__builtin_ia32_psrav4si",
     "llvm.x86.avx2.psrav.d.256" => "__builtin_ia32_psrav8si",
     "llvm.x86.avx2.psrl.d" => "__builtin_ia32_psrld256",
-    "llvm.x86.avx2.psrl.dq" => "__builtin_ia32_psrldqi256",
-    "llvm.x86.avx2.psrl.dq.bs" => "__builtin_ia32_psrldqi256_byteshift",
     "llvm.x86.avx2.psrl.q" => "__builtin_ia32_psrlq256",
     "llvm.x86.avx2.psrl.w" => "__builtin_ia32_psrlw256",
     "llvm.x86.avx2.psrli.d" => "__builtin_ia32_psrldi256",
@@ -2403,188 +1423,588 @@ match name {
     "llvm.x86.avx2.psrlv.d.256" => "__builtin_ia32_psrlv8si",
     "llvm.x86.avx2.psrlv.q" => "__builtin_ia32_psrlv2di",
     "llvm.x86.avx2.psrlv.q.256" => "__builtin_ia32_psrlv4di",
-    "llvm.x86.avx2.psubs.b" => "__builtin_ia32_psubsb256",
-    "llvm.x86.avx2.psubs.w" => "__builtin_ia32_psubsw256",
-    "llvm.x86.avx2.psubus.b" => "__builtin_ia32_psubusb256",
-    "llvm.x86.avx2.psubus.w" => "__builtin_ia32_psubusw256",
-    "llvm.x86.avx2.vbroadcast.sd.pd.256" => "__builtin_ia32_vbroadcastsd_pd256",
-    "llvm.x86.avx2.vbroadcast.ss.ps" => "__builtin_ia32_vbroadcastss_ps",
-    "llvm.x86.avx2.vbroadcast.ss.ps.256" => "__builtin_ia32_vbroadcastss_ps256",
-    "llvm.x86.avx2.vextracti128" => "__builtin_ia32_extract128i256",
-    "llvm.x86.avx2.vinserti128" => "__builtin_ia32_insert128i256",
-    "llvm.x86.avx2.vperm2i128" => "__builtin_ia32_permti256",
-    "llvm.x86.avx512.cvtsd2usi" => "__builtin_ia32_cvtsd2usi",
-    "llvm.x86.avx512.cvtsd2usi64" => "__builtin_ia32_cvtsd2usi64",
-    "llvm.x86.avx512.cvtss2usi" => "__builtin_ia32_cvtss2usi",
-    "llvm.x86.avx512.cvtss2usi64" => "__builtin_ia32_cvtss2usi64",
-    "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_cvttsd2usi",
-    "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_cvttsd2usi64",
-    "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_cvttss2usi",
-    "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_cvttss2usi64",
-    "llvm.x86.avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd",
-    "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss",
-    "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi642sd",
-    "llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi642ss",
-    "llvm.x86.avx512.gather.dpd.512" => "__builtin_ia32_gathersiv8df",
-    "llvm.x86.avx512.gather.dpi.512" => "__builtin_ia32_gathersiv16si",
-    "llvm.x86.avx512.gather.dpq.512" => "__builtin_ia32_gathersiv8di",
-    "llvm.x86.avx512.gather.dps.512" => "__builtin_ia32_gathersiv16sf",
-    "llvm.x86.avx512.gather.qpd.512" => "__builtin_ia32_gatherdiv8df",
-    "llvm.x86.avx512.gather.qpi.512" => "__builtin_ia32_gatherdiv16si",
-    "llvm.x86.avx512.gather.qpq.512" => "__builtin_ia32_gatherdiv8di",
-    "llvm.x86.avx512.gather.qps.512" => "__builtin_ia32_gatherdiv16sf",
+    "llvm.x86.avx512.add.pd.512" => "__builtin_ia32_addpd512",
+    "llvm.x86.avx512.add.ps.512" => "__builtin_ia32_addps512",
+    "llvm.x86.avx512.broadcastmb.128" => "__builtin_ia32_broadcastmb128",
+    "llvm.x86.avx512.broadcastmb.256" => "__builtin_ia32_broadcastmb256",
+    "llvm.x86.avx512.broadcastmb.512" => "__builtin_ia32_broadcastmb512",
+    "llvm.x86.avx512.broadcastmw.128" => "__builtin_ia32_broadcastmw128",
+    "llvm.x86.avx512.broadcastmw.256" => "__builtin_ia32_broadcastmw256",
+    "llvm.x86.avx512.broadcastmw.512" => "__builtin_ia32_broadcastmw512",
+    "llvm.x86.avx512.conflict.d.128" => "__builtin_ia32_vpconflictsi_128",
+    "llvm.x86.avx512.conflict.d.256" => "__builtin_ia32_vpconflictsi_256",
+    "llvm.x86.avx512.conflict.d.512" => "__builtin_ia32_vpconflictsi_512",
+    "llvm.x86.avx512.conflict.q.128" => "__builtin_ia32_vpconflictdi_128",
+    "llvm.x86.avx512.conflict.q.256" => "__builtin_ia32_vpconflictdi_256",
+    "llvm.x86.avx512.conflict.q.512" => "__builtin_ia32_vpconflictdi_512",
+    "llvm.x86.avx512.cvtsi2sd64" => "__builtin_ia32_cvtsi2sd64",
+    "llvm.x86.avx512.cvtsi2ss32" => "__builtin_ia32_cvtsi2ss32",
+    "llvm.x86.avx512.cvtsi2ss64" => "__builtin_ia32_cvtsi2ss64",
+    "llvm.x86.avx512.cvttsd2si" => "__builtin_ia32_vcvttsd2si32",
+    "llvm.x86.avx512.cvttsd2si64" => "__builtin_ia32_vcvttsd2si64",
+    "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_vcvttsd2usi32",
+    "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_vcvttsd2usi64",
+    "llvm.x86.avx512.cvttss2si" => "__builtin_ia32_vcvttss2si32",
+    "llvm.x86.avx512.cvttss2si64" => "__builtin_ia32_vcvttss2si64",
+    "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_vcvttss2usi32",
+    "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_vcvttss2usi64",
+    "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss32",
+    "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi2sd64",
+    "llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi2ss64",
+    "llvm.x86.avx512.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128",
+    "llvm.x86.avx512.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256",
+    "llvm.x86.avx512.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512",
+    "llvm.x86.avx512.div.pd.512" => "__builtin_ia32_divpd512",
+    "llvm.x86.avx512.div.ps.512" => "__builtin_ia32_divps512",
+    "llvm.x86.avx512.exp2.pd" => "__builtin_ia32_exp2pd_mask",
+    "llvm.x86.avx512.exp2.ps" => "__builtin_ia32_exp2ps_mask",
     "llvm.x86.avx512.gatherpf.dpd.512" => "__builtin_ia32_gatherpfdpd",
     "llvm.x86.avx512.gatherpf.dps.512" => "__builtin_ia32_gatherpfdps",
     "llvm.x86.avx512.gatherpf.qpd.512" => "__builtin_ia32_gatherpfqpd",
     "llvm.x86.avx512.gatherpf.qps.512" => "__builtin_ia32_gatherpfqps",
-    "llvm.x86.avx512.kand.w" => "__builtin_ia32_kandhi",
-    "llvm.x86.avx512.kandn.w" => "__builtin_ia32_kandnhi",
-    "llvm.x86.avx512.knot.w" => "__builtin_ia32_knothi",
-    "llvm.x86.avx512.kor.w" => "__builtin_ia32_korhi",
-    "llvm.x86.avx512.kortestc.w" => "__builtin_ia32_kortestchi",
-    "llvm.x86.avx512.kortestz.w" => "__builtin_ia32_kortestzhi",
-    "llvm.x86.avx512.kunpck.bw" => "__builtin_ia32_kunpckhi",
-    "llvm.x86.avx512.kxnor.w" => "__builtin_ia32_kxnorhi",
-    "llvm.x86.avx512.kxor.w" => "__builtin_ia32_kxorhi",
-    "llvm.x86.avx512.mask.blend.d.512" => "__builtin_ia32_blendmd_512_mask",
-    "llvm.x86.avx512.mask.blend.pd.512" => "__builtin_ia32_blendmpd_512_mask",
-    "llvm.x86.avx512.mask.blend.ps.512" => "__builtin_ia32_blendmps_512_mask",
-    "llvm.x86.avx512.mask.blend.q.512" => "__builtin_ia32_blendmq_512_mask",
-    "llvm.x86.avx512.mask.cmp.pd.512" => "__builtin_ia32_cmppd512_mask",
-    "llvm.x86.avx512.mask.cmp.ps.512" => "__builtin_ia32_cmpps512_mask",
-    "llvm.x86.avx512.mask.conflict.d.512" => "__builtin_ia32_vpconflictsi_512_mask",
-    "llvm.x86.avx512.mask.conflict.q.512" => "__builtin_ia32_vpconflictdi_512_mask",
-    "llvm.x86.avx512.mask.cvtdq2pd.512" => "__builtin_ia32_cvtdq2pd512_mask",
-    "llvm.x86.avx512.mask.cvtdq2ps.512" => "__builtin_ia32_cvtdq2ps512_mask",
+    "llvm.x86.avx512.mask.add.sd.round" => "__builtin_ia32_addsd_round_mask",
+    "llvm.x86.avx512.mask.add.ss.round" => "__builtin_ia32_addss_round_mask",
+    "llvm.x86.avx512.mask.cmp.sd" => "__builtin_ia32_cmpsd_mask",
+    "llvm.x86.avx512.mask.cmp.ss" => "__builtin_ia32_cmpss_mask",
+    "llvm.x86.avx512.mask.cvtpd2dq.128" => "__builtin_ia32_cvtpd2dq128_mask",
     "llvm.x86.avx512.mask.cvtpd2dq.512" => "__builtin_ia32_cvtpd2dq512_mask",
+    "llvm.x86.avx512.mask.cvtpd2ps" => "__builtin_ia32_cvtpd2ps_mask",
     "llvm.x86.avx512.mask.cvtpd2ps.512" => "__builtin_ia32_cvtpd2ps512_mask",
+    "llvm.x86.avx512.mask.cvtpd2qq.128" => "__builtin_ia32_cvtpd2qq128_mask",
+    "llvm.x86.avx512.mask.cvtpd2qq.256" => "__builtin_ia32_cvtpd2qq256_mask",
+    "llvm.x86.avx512.mask.cvtpd2qq.512" => "__builtin_ia32_cvtpd2qq512_mask",
+    "llvm.x86.avx512.mask.cvtpd2udq.128" => "__builtin_ia32_cvtpd2udq128_mask",
+    "llvm.x86.avx512.mask.cvtpd2udq.256" => "__builtin_ia32_cvtpd2udq256_mask",
     "llvm.x86.avx512.mask.cvtpd2udq.512" => "__builtin_ia32_cvtpd2udq512_mask",
+    "llvm.x86.avx512.mask.cvtpd2uqq.128" => "__builtin_ia32_cvtpd2uqq128_mask",
+    "llvm.x86.avx512.mask.cvtpd2uqq.256" => "__builtin_ia32_cvtpd2uqq256_mask",
+    "llvm.x86.avx512.mask.cvtpd2uqq.512" => "__builtin_ia32_cvtpd2uqq512_mask",
+    "llvm.x86.avx512.mask.cvtps2dq.128" => "__builtin_ia32_cvtps2dq128_mask",
+    "llvm.x86.avx512.mask.cvtps2dq.256" => "__builtin_ia32_cvtps2dq256_mask",
     "llvm.x86.avx512.mask.cvtps2dq.512" => "__builtin_ia32_cvtps2dq512_mask",
+    "llvm.x86.avx512.mask.cvtps2pd.512" => "__builtin_ia32_cvtps2pd512_mask",
+    "llvm.x86.avx512.mask.cvtps2qq.128" => "__builtin_ia32_cvtps2qq128_mask",
+    "llvm.x86.avx512.mask.cvtps2qq.256" => "__builtin_ia32_cvtps2qq256_mask",
+    "llvm.x86.avx512.mask.cvtps2qq.512" => "__builtin_ia32_cvtps2qq512_mask",
+    "llvm.x86.avx512.mask.cvtps2udq.128" => "__builtin_ia32_cvtps2udq128_mask",
+    "llvm.x86.avx512.mask.cvtps2udq.256" => "__builtin_ia32_cvtps2udq256_mask",
     "llvm.x86.avx512.mask.cvtps2udq.512" => "__builtin_ia32_cvtps2udq512_mask",
+    "llvm.x86.avx512.mask.cvtps2uqq.128" => "__builtin_ia32_cvtps2uqq128_mask",
+    "llvm.x86.avx512.mask.cvtps2uqq.256" => "__builtin_ia32_cvtps2uqq256_mask",
+    "llvm.x86.avx512.mask.cvtps2uqq.512" => "__builtin_ia32_cvtps2uqq512_mask",
+    "llvm.x86.avx512.mask.cvtqq2ps.128" => "__builtin_ia32_cvtqq2ps128_mask",
+    "llvm.x86.avx512.mask.cvtsd2ss.round" => "__builtin_ia32_cvtsd2ss_round_mask",
+    "llvm.x86.avx512.mask.cvtss2sd.round" => "__builtin_ia32_cvtss2sd_round_mask",
+    "llvm.x86.avx512.mask.cvttpd2dq.128" => "__builtin_ia32_cvttpd2dq128_mask",
     "llvm.x86.avx512.mask.cvttpd2dq.512" => "__builtin_ia32_cvttpd2dq512_mask",
+    "llvm.x86.avx512.mask.cvttpd2qq.128" => "__builtin_ia32_cvttpd2qq128_mask",
+    "llvm.x86.avx512.mask.cvttpd2qq.256" => "__builtin_ia32_cvttpd2qq256_mask",
+    "llvm.x86.avx512.mask.cvttpd2qq.512" => "__builtin_ia32_cvttpd2qq512_mask",
+    "llvm.x86.avx512.mask.cvttpd2udq.128" => "__builtin_ia32_cvttpd2udq128_mask",
+    "llvm.x86.avx512.mask.cvttpd2udq.256" => "__builtin_ia32_cvttpd2udq256_mask",
     "llvm.x86.avx512.mask.cvttpd2udq.512" => "__builtin_ia32_cvttpd2udq512_mask",
+    "llvm.x86.avx512.mask.cvttpd2uqq.128" => "__builtin_ia32_cvttpd2uqq128_mask",
+    "llvm.x86.avx512.mask.cvttpd2uqq.256" => "__builtin_ia32_cvttpd2uqq256_mask",
+    "llvm.x86.avx512.mask.cvttpd2uqq.512" => "__builtin_ia32_cvttpd2uqq512_mask",
     "llvm.x86.avx512.mask.cvttps2dq.512" => "__builtin_ia32_cvttps2dq512_mask",
+    "llvm.x86.avx512.mask.cvttps2qq.128" => "__builtin_ia32_cvttps2qq128_mask",
+    "llvm.x86.avx512.mask.cvttps2qq.256" => "__builtin_ia32_cvttps2qq256_mask",
+    "llvm.x86.avx512.mask.cvttps2qq.512" => "__builtin_ia32_cvttps2qq512_mask",
+    "llvm.x86.avx512.mask.cvttps2udq.128" => "__builtin_ia32_cvttps2udq128_mask",
+    "llvm.x86.avx512.mask.cvttps2udq.256" => "__builtin_ia32_cvttps2udq256_mask",
     "llvm.x86.avx512.mask.cvttps2udq.512" => "__builtin_ia32_cvttps2udq512_mask",
-    "llvm.x86.avx512.mask.cvtudq2pd.512" => "__builtin_ia32_cvtudq2pd512_mask",
-    "llvm.x86.avx512.mask.cvtudq2ps.512" => "__builtin_ia32_cvtudq2ps512_mask",
-    "llvm.x86.avx512.mask.loadu.d.512" => "__builtin_ia32_loaddqusi512_mask",
-    "llvm.x86.avx512.mask.loadu.pd.512" => "__builtin_ia32_loadupd512_mask",
-    "llvm.x86.avx512.mask.loadu.ps.512" => "__builtin_ia32_loadups512_mask",
-    "llvm.x86.avx512.mask.loadu.q.512" => "__builtin_ia32_loaddqudi512_mask",
-    "llvm.x86.avx512.mask.lzcnt.d.512" => "__builtin_ia32_vplzcntd_512_mask",
-    "llvm.x86.avx512.mask.lzcnt.q.512" => "__builtin_ia32_vplzcntq_512_mask",
-    "llvm.x86.avx512.mask.max.pd.512" => "__builtin_ia32_maxpd512_mask",
-    "llvm.x86.avx512.mask.max.ps.512" => "__builtin_ia32_maxps512_mask",
-    "llvm.x86.avx512.mask.min.pd.512" => "__builtin_ia32_minpd512_mask",
-    "llvm.x86.avx512.mask.min.ps.512" => "__builtin_ia32_minps512_mask",
-    "llvm.x86.avx512.mask.pabs.d.512" => "__builtin_ia32_pabsd512_mask",
-    "llvm.x86.avx512.mask.pabs.q.512" => "__builtin_ia32_pabsq512_mask",
-    "llvm.x86.avx512.mask.pand.d.512" => "__builtin_ia32_pandd512_mask",
-    "llvm.x86.avx512.mask.pand.q.512" => "__builtin_ia32_pandq512_mask",
-    "llvm.x86.avx512.mask.pbroadcast.d.gpr.512" => "__builtin_ia32_pbroadcastd512_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.q.gpr.512" => "__builtin_ia32_pbroadcastq512_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.q.mem.512" => "__builtin_ia32_pbroadcastq512_mem_mask",
-    "llvm.x86.avx512.mask.pcmpeq.b.128" => "__builtin_ia32_pcmpeqb128_mask",
-    "llvm.x86.avx512.mask.pcmpeq.b.256" => "__builtin_ia32_pcmpeqb256_mask",
-    "llvm.x86.avx512.mask.pcmpeq.b.512" => "__builtin_ia32_pcmpeqb512_mask",
-    "llvm.x86.avx512.mask.pcmpeq.d.128" => "__builtin_ia32_pcmpeqd128_mask",
-    "llvm.x86.avx512.mask.pcmpeq.d.256" => "__builtin_ia32_pcmpeqd256_mask",
-    "llvm.x86.avx512.mask.pcmpeq.d.512" => "__builtin_ia32_pcmpeqd512_mask",
-    "llvm.x86.avx512.mask.pcmpeq.q.128" => "__builtin_ia32_pcmpeqq128_mask",
-    "llvm.x86.avx512.mask.pcmpeq.q.256" => "__builtin_ia32_pcmpeqq256_mask",
-    "llvm.x86.avx512.mask.pcmpeq.q.512" => "__builtin_ia32_pcmpeqq512_mask",
-    "llvm.x86.avx512.mask.pcmpeq.w.128" => "__builtin_ia32_pcmpeqw128_mask",
-    "llvm.x86.avx512.mask.pcmpeq.w.256" => "__builtin_ia32_pcmpeqw256_mask",
-    "llvm.x86.avx512.mask.pcmpeq.w.512" => "__builtin_ia32_pcmpeqw512_mask",
-    "llvm.x86.avx512.mask.pcmpgt.b.128" => "__builtin_ia32_pcmpgtb128_mask",
-    "llvm.x86.avx512.mask.pcmpgt.b.256" => "__builtin_ia32_pcmpgtb256_mask",
-    "llvm.x86.avx512.mask.pcmpgt.b.512" => "__builtin_ia32_pcmpgtb512_mask",
-    "llvm.x86.avx512.mask.pcmpgt.d.128" => "__builtin_ia32_pcmpgtd128_mask",
-    "llvm.x86.avx512.mask.pcmpgt.d.256" => "__builtin_ia32_pcmpgtd256_mask",
-    "llvm.x86.avx512.mask.pcmpgt.d.512" => "__builtin_ia32_pcmpgtd512_mask",
-    "llvm.x86.avx512.mask.pcmpgt.q.128" => "__builtin_ia32_pcmpgtq128_mask",
-    "llvm.x86.avx512.mask.pcmpgt.q.256" => "__builtin_ia32_pcmpgtq256_mask",
-    "llvm.x86.avx512.mask.pcmpgt.q.512" => "__builtin_ia32_pcmpgtq512_mask",
-    "llvm.x86.avx512.mask.pcmpgt.w.128" => "__builtin_ia32_pcmpgtw128_mask",
-    "llvm.x86.avx512.mask.pcmpgt.w.256" => "__builtin_ia32_pcmpgtw256_mask",
-    "llvm.x86.avx512.mask.pcmpgt.w.512" => "__builtin_ia32_pcmpgtw512_mask",
-    "llvm.x86.avx512.mask.pmaxs.d.512" => "__builtin_ia32_pmaxsd512_mask",
-    "llvm.x86.avx512.mask.pmaxs.q.512" => "__builtin_ia32_pmaxsq512_mask",
-    "llvm.x86.avx512.mask.pmaxu.d.512" => "__builtin_ia32_pmaxud512_mask",
-    "llvm.x86.avx512.mask.pmaxu.q.512" => "__builtin_ia32_pmaxuq512_mask",
-    "llvm.x86.avx512.mask.pmins.d.512" => "__builtin_ia32_pminsd512_mask",
-    "llvm.x86.avx512.mask.pmins.q.512" => "__builtin_ia32_pminsq512_mask",
-    "llvm.x86.avx512.mask.pminu.d.512" => "__builtin_ia32_pminud512_mask",
-    "llvm.x86.avx512.mask.pminu.q.512" => "__builtin_ia32_pminuq512_mask",
-    "llvm.x86.avx512.mask.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask",
-    "llvm.x86.avx512.mask.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask",
-    "llvm.x86.avx512.mask.ptestm.d.512" => "__builtin_ia32_ptestmd512",
-    "llvm.x86.avx512.mask.ptestm.q.512" => "__builtin_ia32_ptestmq512",
+    "llvm.x86.avx512.mask.cvttps2uqq.128" => "__builtin_ia32_cvttps2uqq128_mask",
+    "llvm.x86.avx512.mask.cvttps2uqq.256" => "__builtin_ia32_cvttps2uqq256_mask",
+    "llvm.x86.avx512.mask.cvttps2uqq.512" => "__builtin_ia32_cvttps2uqq512_mask",
+    "llvm.x86.avx512.mask.cvtuqq2ps.128" => "__builtin_ia32_cvtuqq2ps128_mask",
+    "llvm.x86.avx512.mask.div.sd.round" => "__builtin_ia32_divsd_round_mask",
+    "llvm.x86.avx512.mask.div.ss.round" => "__builtin_ia32_divss_round_mask",
+    "llvm.x86.avx512.mask.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_mask",
+    "llvm.x86.avx512.mask.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_mask",
+    "llvm.x86.avx512.mask.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_mask",
+    "llvm.x86.avx512.mask.fixupimm.ps.128" => "__builtin_ia32_fixupimmps128_mask",
+    "llvm.x86.avx512.mask.fixupimm.ps.256" => "__builtin_ia32_fixupimmps256_mask",
+    "llvm.x86.avx512.mask.fixupimm.ps.512" => "__builtin_ia32_fixupimmps512_mask",
+    "llvm.x86.avx512.mask.fixupimm.sd" => "__builtin_ia32_fixupimmsd_mask",
+    "llvm.x86.avx512.mask.fixupimm.ss" => "__builtin_ia32_fixupimmss_mask",
+    "llvm.x86.avx512.mask.fpclass.sd" => "__builtin_ia32_fpclasssd_mask",
+    "llvm.x86.avx512.mask.fpclass.ss" => "__builtin_ia32_fpclassss_mask",
+    "llvm.x86.avx512.mask.getexp.pd.128" => "__builtin_ia32_getexppd128_mask",
+    "llvm.x86.avx512.mask.getexp.pd.256" => "__builtin_ia32_getexppd256_mask",
+    "llvm.x86.avx512.mask.getexp.pd.512" => "__builtin_ia32_getexppd512_mask",
+    "llvm.x86.avx512.mask.getexp.ps.128" => "__builtin_ia32_getexpps128_mask",
+    "llvm.x86.avx512.mask.getexp.ps.256" => "__builtin_ia32_getexpps256_mask",
+    "llvm.x86.avx512.mask.getexp.ps.512" => "__builtin_ia32_getexpps512_mask",
+    "llvm.x86.avx512.mask.getexp.sd" => "__builtin_ia32_getexpsd128_round_mask",
+    "llvm.x86.avx512.mask.getexp.ss" => "__builtin_ia32_getexpss128_round_mask",
+    "llvm.x86.avx512.mask.getmant.pd.128" => "__builtin_ia32_getmantpd128_mask",
+    "llvm.x86.avx512.mask.getmant.pd.256" => "__builtin_ia32_getmantpd256_mask",
+    "llvm.x86.avx512.mask.getmant.pd.512" => "__builtin_ia32_getmantpd512_mask",
+    "llvm.x86.avx512.mask.getmant.ps.128" => "__builtin_ia32_getmantps128_mask",
+    "llvm.x86.avx512.mask.getmant.ps.256" => "__builtin_ia32_getmantps256_mask",
+    "llvm.x86.avx512.mask.getmant.ps.512" => "__builtin_ia32_getmantps512_mask",
+    "llvm.x86.avx512.mask.getmant.sd" => "__builtin_ia32_getmantsd_round_mask",
+    "llvm.x86.avx512.mask.getmant.ss" => "__builtin_ia32_getmantss_round_mask",
+    "llvm.x86.avx512.mask.max.sd.round" => "__builtin_ia32_maxsd_round_mask",
+    "llvm.x86.avx512.mask.max.ss.round" => "__builtin_ia32_maxss_round_mask",
+    "llvm.x86.avx512.mask.min.sd.round" => "__builtin_ia32_minsd_round_mask",
+    "llvm.x86.avx512.mask.min.ss.round" => "__builtin_ia32_minss_round_mask",
+    "llvm.x86.avx512.mask.mul.sd.round" => "__builtin_ia32_mulsd_round_mask",
+    "llvm.x86.avx512.mask.mul.ss.round" => "__builtin_ia32_mulss_round_mask",
+    "llvm.x86.avx512.mask.pmov.db.128" => "__builtin_ia32_pmovdb128_mask",
+    "llvm.x86.avx512.mask.pmov.db.256" => "__builtin_ia32_pmovdb256_mask",
+    "llvm.x86.avx512.mask.pmov.db.mem.128" => "__builtin_ia32_pmovdb128mem_mask",
+    "llvm.x86.avx512.mask.pmov.db.mem.256" => "__builtin_ia32_pmovdb256mem_mask",
+    "llvm.x86.avx512.mask.pmov.db.mem.512" => "__builtin_ia32_pmovdb512mem_mask",
+    "llvm.x86.avx512.mask.pmov.dw.128" => "__builtin_ia32_pmovdw128_mask",
+    "llvm.x86.avx512.mask.pmov.dw.256" => "__builtin_ia32_pmovdw256_mask",
+    "llvm.x86.avx512.mask.pmov.dw.mem.128" => "__builtin_ia32_pmovdw128mem_mask",
+    "llvm.x86.avx512.mask.pmov.dw.mem.256" => "__builtin_ia32_pmovdw256mem_mask",
+    "llvm.x86.avx512.mask.pmov.dw.mem.512" => "__builtin_ia32_pmovdw512mem_mask",
+    "llvm.x86.avx512.mask.pmov.qb.128" => "__builtin_ia32_pmovqb128_mask",
+    "llvm.x86.avx512.mask.pmov.qb.256" => "__builtin_ia32_pmovqb256_mask",
+    "llvm.x86.avx512.mask.pmov.qb.512" => "__builtin_ia32_pmovqb512_mask",
+    "llvm.x86.avx512.mask.pmov.qb.mem.128" => "__builtin_ia32_pmovqb128mem_mask",
+    "llvm.x86.avx512.mask.pmov.qb.mem.256" => "__builtin_ia32_pmovqb256mem_mask",
+    "llvm.x86.avx512.mask.pmov.qb.mem.512" => "__builtin_ia32_pmovqb512mem_mask",
+    "llvm.x86.avx512.mask.pmov.qd.128" => "__builtin_ia32_pmovqd128_mask",
+    "llvm.x86.avx512.mask.pmov.qd.mem.128" => "__builtin_ia32_pmovqd128mem_mask",
+    "llvm.x86.avx512.mask.pmov.qd.mem.256" => "__builtin_ia32_pmovqd256mem_mask",
+    "llvm.x86.avx512.mask.pmov.qd.mem.512" => "__builtin_ia32_pmovqd512mem_mask",
+    "llvm.x86.avx512.mask.pmov.qw.128" => "__builtin_ia32_pmovqw128_mask",
+    "llvm.x86.avx512.mask.pmov.qw.256" => "__builtin_ia32_pmovqw256_mask",
+    "llvm.x86.avx512.mask.pmov.qw.mem.128" => "__builtin_ia32_pmovqw128mem_mask",
+    "llvm.x86.avx512.mask.pmov.qw.mem.256" => "__builtin_ia32_pmovqw256mem_mask",
+    "llvm.x86.avx512.mask.pmov.qw.mem.512" => "__builtin_ia32_pmovqw512mem_mask",
+    "llvm.x86.avx512.mask.pmov.wb.128" => "__builtin_ia32_pmovwb128_mask",
+    "llvm.x86.avx512.mask.pmov.wb.mem.128" => "__builtin_ia32_pmovwb128mem_mask",
+    "llvm.x86.avx512.mask.pmov.wb.mem.256" => "__builtin_ia32_pmovwb256mem_mask",
+    "llvm.x86.avx512.mask.pmov.wb.mem.512" => "__builtin_ia32_pmovwb512mem_mask",
+    "llvm.x86.avx512.mask.pmovs.db.128" => "__builtin_ia32_pmovsdb128_mask",
+    "llvm.x86.avx512.mask.pmovs.db.256" => "__builtin_ia32_pmovsdb256_mask",
+    "llvm.x86.avx512.mask.pmovs.db.512" => "__builtin_ia32_pmovsdb512_mask",
+    "llvm.x86.avx512.mask.pmovs.db.mem.128" => "__builtin_ia32_pmovsdb128mem_mask",
+    "llvm.x86.avx512.mask.pmovs.db.mem.256" => "__builtin_ia32_pmovsdb256mem_mask",
+    "llvm.x86.avx512.mask.pmovs.db.mem.512" => "__builtin_ia32_pmovsdb512mem_mask",
+    "llvm.x86.avx512.mask.pmovs.dw.128" => "__builtin_ia32_pmovsdw128_mask",
+    "llvm.x86.avx512.mask.pmovs.dw.256" => "__builtin_ia32_pmovsdw256_mask",
+    "llvm.x86.avx512.mask.pmovs.dw.512" => "__builtin_ia32_pmovsdw512_mask",
+    "llvm.x86.avx512.mask.pmovs.dw.mem.128" => "__builtin_ia32_pmovsdw128mem_mask",
+    "llvm.x86.avx512.mask.pmovs.dw.mem.256" => "__builtin_ia32_pmovsdw256mem_mask",
+    "llvm.x86.avx512.mask.pmovs.dw.mem.512" => "__builtin_ia32_pmovsdw512mem_mask",
+    "llvm.x86.avx512.mask.pmovs.qb.128" => "__builtin_ia32_pmovsqb128_mask",
+    "llvm.x86.avx512.mask.pmovs.qb.256" => "__builtin_ia32_pmovsqb256_mask",
+    "llvm.x86.avx512.mask.pmovs.qb.512" => "__builtin_ia32_pmovsqb512_mask",
+    "llvm.x86.avx512.mask.pmovs.qb.mem.128" => "__builtin_ia32_pmovsqb128mem_mask",
+    "llvm.x86.avx512.mask.pmovs.qb.mem.256" => "__builtin_ia32_pmovsqb256mem_mask",
+    "llvm.x86.avx512.mask.pmovs.qb.mem.512" => "__builtin_ia32_pmovsqb512mem_mask",
+    "llvm.x86.avx512.mask.pmovs.qd.128" => "__builtin_ia32_pmovsqd128_mask",
+    "llvm.x86.avx512.mask.pmovs.qd.256" => "__builtin_ia32_pmovsqd256_mask",
+    "llvm.x86.avx512.mask.pmovs.qd.512" => "__builtin_ia32_pmovsqd512_mask",
+    "llvm.x86.avx512.mask.pmovs.qd.mem.128" => "__builtin_ia32_pmovsqd128mem_mask",
+    "llvm.x86.avx512.mask.pmovs.qd.mem.256" => "__builtin_ia32_pmovsqd256mem_mask",
+    "llvm.x86.avx512.mask.pmovs.qd.mem.512" => "__builtin_ia32_pmovsqd512mem_mask",
+    "llvm.x86.avx512.mask.pmovs.qw.128" => "__builtin_ia32_pmovsqw128_mask",
+    "llvm.x86.avx512.mask.pmovs.qw.256" => "__builtin_ia32_pmovsqw256_mask",
+    "llvm.x86.avx512.mask.pmovs.qw.512" => "__builtin_ia32_pmovsqw512_mask",
+    "llvm.x86.avx512.mask.pmovs.qw.mem.128" => "__builtin_ia32_pmovsqw128mem_mask",
+    "llvm.x86.avx512.mask.pmovs.qw.mem.256" => "__builtin_ia32_pmovsqw256mem_mask",
+    "llvm.x86.avx512.mask.pmovs.qw.mem.512" => "__builtin_ia32_pmovsqw512mem_mask",
+    "llvm.x86.avx512.mask.pmovs.wb.128" => "__builtin_ia32_pmovswb128_mask",
+    "llvm.x86.avx512.mask.pmovs.wb.256" => "__builtin_ia32_pmovswb256_mask",
+    "llvm.x86.avx512.mask.pmovs.wb.512" => "__builtin_ia32_pmovswb512_mask",
+    "llvm.x86.avx512.mask.pmovs.wb.mem.128" => "__builtin_ia32_pmovswb128mem_mask",
+    "llvm.x86.avx512.mask.pmovs.wb.mem.256" => "__builtin_ia32_pmovswb256mem_mask",
+    "llvm.x86.avx512.mask.pmovs.wb.mem.512" => "__builtin_ia32_pmovswb512mem_mask",
+    "llvm.x86.avx512.mask.pmovus.db.128" => "__builtin_ia32_pmovusdb128_mask",
+    "llvm.x86.avx512.mask.pmovus.db.256" => "__builtin_ia32_pmovusdb256_mask",
+    "llvm.x86.avx512.mask.pmovus.db.512" => "__builtin_ia32_pmovusdb512_mask",
+    "llvm.x86.avx512.mask.pmovus.db.mem.128" => "__builtin_ia32_pmovusdb128mem_mask",
+    "llvm.x86.avx512.mask.pmovus.db.mem.256" => "__builtin_ia32_pmovusdb256mem_mask",
+    "llvm.x86.avx512.mask.pmovus.db.mem.512" => "__builtin_ia32_pmovusdb512mem_mask",
+    "llvm.x86.avx512.mask.pmovus.dw.128" => "__builtin_ia32_pmovusdw128_mask",
+    "llvm.x86.avx512.mask.pmovus.dw.256" => "__builtin_ia32_pmovusdw256_mask",
+    "llvm.x86.avx512.mask.pmovus.dw.512" => "__builtin_ia32_pmovusdw512_mask",
+    "llvm.x86.avx512.mask.pmovus.dw.mem.128" => "__builtin_ia32_pmovusdw128mem_mask",
+    "llvm.x86.avx512.mask.pmovus.dw.mem.256" => "__builtin_ia32_pmovusdw256mem_mask",
+    "llvm.x86.avx512.mask.pmovus.dw.mem.512" => "__builtin_ia32_pmovusdw512mem_mask",
+    "llvm.x86.avx512.mask.pmovus.qb.128" => "__builtin_ia32_pmovusqb128_mask",
+    "llvm.x86.avx512.mask.pmovus.qb.256" => "__builtin_ia32_pmovusqb256_mask",
+    "llvm.x86.avx512.mask.pmovus.qb.512" => "__builtin_ia32_pmovusqb512_mask",
+    "llvm.x86.avx512.mask.pmovus.qb.mem.128" => "__builtin_ia32_pmovusqb128mem_mask",
+    "llvm.x86.avx512.mask.pmovus.qb.mem.256" => "__builtin_ia32_pmovusqb256mem_mask",
+    "llvm.x86.avx512.mask.pmovus.qb.mem.512" => "__builtin_ia32_pmovusqb512mem_mask",
+    "llvm.x86.avx512.mask.pmovus.qd.128" => "__builtin_ia32_pmovusqd128_mask",
+    "llvm.x86.avx512.mask.pmovus.qd.256" => "__builtin_ia32_pmovusqd256_mask",
+    "llvm.x86.avx512.mask.pmovus.qd.512" => "__builtin_ia32_pmovusqd512_mask",
+    "llvm.x86.avx512.mask.pmovus.qd.mem.128" => "__builtin_ia32_pmovusqd128mem_mask",
+    "llvm.x86.avx512.mask.pmovus.qd.mem.256" => "__builtin_ia32_pmovusqd256mem_mask",
+    "llvm.x86.avx512.mask.pmovus.qd.mem.512" => "__builtin_ia32_pmovusqd512mem_mask",
+    "llvm.x86.avx512.mask.pmovus.qw.128" => "__builtin_ia32_pmovusqw128_mask",
+    "llvm.x86.avx512.mask.pmovus.qw.256" => "__builtin_ia32_pmovusqw256_mask",
+    "llvm.x86.avx512.mask.pmovus.qw.512" => "__builtin_ia32_pmovusqw512_mask",
+    "llvm.x86.avx512.mask.pmovus.qw.mem.128" => "__builtin_ia32_pmovusqw128mem_mask",
+    "llvm.x86.avx512.mask.pmovus.qw.mem.256" => "__builtin_ia32_pmovusqw256mem_mask",
+    "llvm.x86.avx512.mask.pmovus.qw.mem.512" => "__builtin_ia32_pmovusqw512mem_mask",
+    "llvm.x86.avx512.mask.pmovus.wb.128" => "__builtin_ia32_pmovuswb128_mask",
+    "llvm.x86.avx512.mask.pmovus.wb.256" => "__builtin_ia32_pmovuswb256_mask",
+    "llvm.x86.avx512.mask.pmovus.wb.512" => "__builtin_ia32_pmovuswb512_mask",
+    "llvm.x86.avx512.mask.pmovus.wb.mem.128" => "__builtin_ia32_pmovuswb128mem_mask",
+    "llvm.x86.avx512.mask.pmovus.wb.mem.256" => "__builtin_ia32_pmovuswb256mem_mask",
+    "llvm.x86.avx512.mask.pmovus.wb.mem.512" => "__builtin_ia32_pmovuswb512mem_mask",
+    "llvm.x86.avx512.mask.range.pd.128" => "__builtin_ia32_rangepd128_mask",
+    "llvm.x86.avx512.mask.range.pd.256" => "__builtin_ia32_rangepd256_mask",
+    "llvm.x86.avx512.mask.range.pd.512" => "__builtin_ia32_rangepd512_mask",
+    "llvm.x86.avx512.mask.range.ps.128" => "__builtin_ia32_rangeps128_mask",
+    "llvm.x86.avx512.mask.range.ps.256" => "__builtin_ia32_rangeps256_mask",
+    "llvm.x86.avx512.mask.range.ps.512" => "__builtin_ia32_rangeps512_mask",
+    "llvm.x86.avx512.mask.range.sd" => "__builtin_ia32_rangesd128_round_mask",
+    "llvm.x86.avx512.mask.range.ss" => "__builtin_ia32_rangess128_round_mask",
+    "llvm.x86.avx512.mask.reduce.pd.128" => "__builtin_ia32_reducepd128_mask",
+    "llvm.x86.avx512.mask.reduce.pd.256" => "__builtin_ia32_reducepd256_mask",
+    "llvm.x86.avx512.mask.reduce.pd.512" => "__builtin_ia32_reducepd512_mask",
+    "llvm.x86.avx512.mask.reduce.ps.128" => "__builtin_ia32_reduceps128_mask",
+    "llvm.x86.avx512.mask.reduce.ps.256" => "__builtin_ia32_reduceps256_mask",
+    "llvm.x86.avx512.mask.reduce.ps.512" => "__builtin_ia32_reduceps512_mask",
+    "llvm.x86.avx512.mask.reduce.sd" => "__builtin_ia32_reducesd_mask",
+    "llvm.x86.avx512.mask.reduce.ss" => "__builtin_ia32_reducess_mask",
+    "llvm.x86.avx512.mask.rndscale.pd.128" => "__builtin_ia32_rndscalepd_128_mask",
+    "llvm.x86.avx512.mask.rndscale.pd.256" => "__builtin_ia32_rndscalepd_256_mask",
     "llvm.x86.avx512.mask.rndscale.pd.512" => "__builtin_ia32_rndscalepd_mask",
+    "llvm.x86.avx512.mask.rndscale.ps.128" => "__builtin_ia32_rndscaleps_128_mask",
+    "llvm.x86.avx512.mask.rndscale.ps.256" => "__builtin_ia32_rndscaleps_256_mask",
     "llvm.x86.avx512.mask.rndscale.ps.512" => "__builtin_ia32_rndscaleps_mask",
-    "llvm.x86.avx512.mask.store.ss" => "__builtin_ia32_storess_mask",
-    "llvm.x86.avx512.mask.storeu.d.512" => "__builtin_ia32_storedqusi512_mask",
-    "llvm.x86.avx512.mask.storeu.pd.512" => "__builtin_ia32_storeupd512_mask",
-    "llvm.x86.avx512.mask.storeu.ps.512" => "__builtin_ia32_storeups512_mask",
-    "llvm.x86.avx512.mask.storeu.q.512" => "__builtin_ia32_storedqudi512_mask",
-    "llvm.x86.avx512.mask.valign.d.512" => "__builtin_ia32_alignd512_mask",
-    "llvm.x86.avx512.mask.valign.q.512" => "__builtin_ia32_alignq512_mask",
-    "llvm.x86.avx512.mask.vcvtph2ps.512" => "__builtin_ia32_vcvtph2ps512_mask",
+    "llvm.x86.avx512.mask.rndscale.sd" => "__builtin_ia32_rndscalesd_round_mask",
+    "llvm.x86.avx512.mask.rndscale.ss" => "__builtin_ia32_rndscaless_round_mask",
+    "llvm.x86.avx512.mask.scalef.pd.128" => "__builtin_ia32_scalefpd128_mask",
+    "llvm.x86.avx512.mask.scalef.pd.256" => "__builtin_ia32_scalefpd256_mask",
+    "llvm.x86.avx512.mask.scalef.pd.512" => "__builtin_ia32_scalefpd512_mask",
+    "llvm.x86.avx512.mask.scalef.ps.128" => "__builtin_ia32_scalefps128_mask",
+    "llvm.x86.avx512.mask.scalef.ps.256" => "__builtin_ia32_scalefps256_mask",
+    "llvm.x86.avx512.mask.scalef.ps.512" => "__builtin_ia32_scalefps512_mask",
+    "llvm.x86.avx512.mask.scalef.sd" => "__builtin_ia32_scalefsd_round_mask",
+    "llvm.x86.avx512.mask.scalef.ss" => "__builtin_ia32_scalefss_round_mask",
+    "llvm.x86.avx512.mask.sub.sd.round" => "__builtin_ia32_subsd_round_mask",
+    "llvm.x86.avx512.mask.sub.ss.round" => "__builtin_ia32_subss_round_mask",
+    "llvm.x86.avx512.mask.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph_mask",
+    "llvm.x86.avx512.mask.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256_mask",
     "llvm.x86.avx512.mask.vcvtps2ph.512" => "__builtin_ia32_vcvtps2ph512_mask",
-    "llvm.x86.avx512.mask.vpermt.d.512" => "__builtin_ia32_vpermt2vard512_mask",
-    "llvm.x86.avx512.mask.vpermt.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
-    "llvm.x86.avx512.mask.vpermt.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
-    "llvm.x86.avx512.mask.vpermt.q.512" => "__builtin_ia32_vpermt2varq512_mask",
-    "llvm.x86.avx512.movntdqa" => "__builtin_ia32_movntdqa512",
-    "llvm.x86.avx512.pbroadcastd.512" => "__builtin_ia32_pbroadcastd512",
-    "llvm.x86.avx512.pbroadcastq.512" => "__builtin_ia32_pbroadcastq512",
-    "llvm.x86.avx512.pmovzxbd" => "__builtin_ia32_pmovzxbd512",
-    "llvm.x86.avx512.pmovzxbq" => "__builtin_ia32_pmovzxbq512",
-    "llvm.x86.avx512.pmovzxdq" => "__builtin_ia32_pmovzxdq512",
-    "llvm.x86.avx512.pmovzxwd" => "__builtin_ia32_pmovzxwd512",
-    "llvm.x86.avx512.pmovzxwq" => "__builtin_ia32_pmovzxwq512",
-    "llvm.x86.avx512.psll.dq" => "__builtin_ia32_pslldqi512",
-    "llvm.x86.avx512.psll.dq.bs" => "__builtin_ia32_pslldqi512_byteshift",
-    "llvm.x86.avx512.psrl.dq" => "__builtin_ia32_psrldqi512",
-    "llvm.x86.avx512.psrl.dq.bs" => "__builtin_ia32_psrldqi512_byteshift",
+    "llvm.x86.avx512.maskz.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_maskz",
+    "llvm.x86.avx512.maskz.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_maskz",
+    "llvm.x86.avx512.maskz.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_maskz",
+    "llvm.x86.avx512.maskz.fixupimm.ps.128" => "__builtin_ia32_fixupimmps128_maskz",
+    "llvm.x86.avx512.maskz.fixupimm.ps.256" => "__builtin_ia32_fixupimmps256_maskz",
+    "llvm.x86.avx512.maskz.fixupimm.ps.512" => "__builtin_ia32_fixupimmps512_maskz",
+    "llvm.x86.avx512.maskz.fixupimm.sd" => "__builtin_ia32_fixupimmsd_maskz",
+    "llvm.x86.avx512.maskz.fixupimm.ss" => "__builtin_ia32_fixupimmss_maskz",
+    "llvm.x86.avx512.max.pd.512" => "__builtin_ia32_maxpd512",
+    "llvm.x86.avx512.max.ps.512" => "__builtin_ia32_maxps512",
+    "llvm.x86.avx512.min.pd.512" => "__builtin_ia32_minpd512",
+    "llvm.x86.avx512.min.ps.512" => "__builtin_ia32_minps512",
+    "llvm.x86.avx512.mul.pd.512" => "__builtin_ia32_mulpd512",
+    "llvm.x86.avx512.mul.ps.512" => "__builtin_ia32_mulps512",
+    "llvm.x86.avx512.packssdw.512" => "__builtin_ia32_packssdw512",
+    "llvm.x86.avx512.packsswb.512" => "__builtin_ia32_packsswb512",
+    "llvm.x86.avx512.packusdw.512" => "__builtin_ia32_packusdw512",
+    "llvm.x86.avx512.packuswb.512" => "__builtin_ia32_packuswb512",
+    "llvm.x86.avx512.pavg.b.512" => "__builtin_ia32_pavgb512",
+    "llvm.x86.avx512.pavg.w.512" => "__builtin_ia32_pavgw512",
+    "llvm.x86.avx512.permvar.df.256" => "__builtin_ia32_permvardf256",
+    "llvm.x86.avx512.permvar.df.512" => "__builtin_ia32_permvardf512",
+    "llvm.x86.avx512.permvar.di.256" => "__builtin_ia32_permvardi256",
+    "llvm.x86.avx512.permvar.di.512" => "__builtin_ia32_permvardi512",
+    "llvm.x86.avx512.permvar.hi.128" => "__builtin_ia32_permvarhi128",
+    "llvm.x86.avx512.permvar.hi.256" => "__builtin_ia32_permvarhi256",
+    "llvm.x86.avx512.permvar.hi.512" => "__builtin_ia32_permvarhi512",
+    "llvm.x86.avx512.permvar.qi.128" => "__builtin_ia32_permvarqi128",
+    "llvm.x86.avx512.permvar.qi.256" => "__builtin_ia32_permvarqi256",
+    "llvm.x86.avx512.permvar.qi.512" => "__builtin_ia32_permvarqi512",
+    "llvm.x86.avx512.permvar.sf.512" => "__builtin_ia32_permvarsf512",
+    "llvm.x86.avx512.permvar.si.512" => "__builtin_ia32_permvarsi512",
+    "llvm.x86.avx512.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512",
+    "llvm.x86.avx512.pmaddw.d.512" => "__builtin_ia32_pmaddwd512",
+    "llvm.x86.avx512.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512",
+    "llvm.x86.avx512.pmulh.w.512" => "__builtin_ia32_pmulhw512",
+    "llvm.x86.avx512.pmulhu.w.512" => "__builtin_ia32_pmulhuw512",
+    "llvm.x86.avx512.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128",
+    "llvm.x86.avx512.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256",
+    "llvm.x86.avx512.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512",
+    "llvm.x86.avx512.psad.bw.512" => "__builtin_ia32_psadbw512",
+    "llvm.x86.avx512.pshuf.b.512" => "__builtin_ia32_pshufb512",
+    "llvm.x86.avx512.psll.d.512" => "__builtin_ia32_pslld512",
+    "llvm.x86.avx512.psll.q.512" => "__builtin_ia32_psllq512",
+    "llvm.x86.avx512.psll.w.512" => "__builtin_ia32_psllw512",
+    "llvm.x86.avx512.pslli.d.512" => "__builtin_ia32_pslldi512",
+    "llvm.x86.avx512.pslli.q.512" => "__builtin_ia32_psllqi512",
+    "llvm.x86.avx512.pslli.w.512" => "__builtin_ia32_psllwi512",
+    "llvm.x86.avx512.psllv.d.512" => "__builtin_ia32_psllv16si",
+    "llvm.x86.avx512.psllv.q.512" => "__builtin_ia32_psllv8di",
+    "llvm.x86.avx512.psllv.w.128" => "__builtin_ia32_psllv8hi",
+    "llvm.x86.avx512.psllv.w.256" => "__builtin_ia32_psllv16hi",
+    "llvm.x86.avx512.psllv.w.512" => "__builtin_ia32_psllv32hi",
+    "llvm.x86.avx512.psra.d.512" => "__builtin_ia32_psrad512",
+    "llvm.x86.avx512.psra.q.128" => "__builtin_ia32_psraq128",
+    "llvm.x86.avx512.psra.q.256" => "__builtin_ia32_psraq256",
+    "llvm.x86.avx512.psra.q.512" => "__builtin_ia32_psraq512",
+    "llvm.x86.avx512.psra.w.512" => "__builtin_ia32_psraw512",
+    "llvm.x86.avx512.psrai.d.512" => "__builtin_ia32_psradi512",
+    "llvm.x86.avx512.psrai.q.128" => "__builtin_ia32_psraqi128",
+    "llvm.x86.avx512.psrai.q.256" => "__builtin_ia32_psraqi256",
+    "llvm.x86.avx512.psrai.q.512" => "__builtin_ia32_psraqi512",
+    "llvm.x86.avx512.psrai.w.512" => "__builtin_ia32_psrawi512",
+    "llvm.x86.avx512.psrav.d.512" => "__builtin_ia32_psrav16si",
+    "llvm.x86.avx512.psrav.q.128" => "__builtin_ia32_psravq128",
+    "llvm.x86.avx512.psrav.q.256" => "__builtin_ia32_psravq256",
+    "llvm.x86.avx512.psrav.q.512" => "__builtin_ia32_psrav8di",
+    "llvm.x86.avx512.psrav.w.128" => "__builtin_ia32_psrav8hi",
+    "llvm.x86.avx512.psrav.w.256" => "__builtin_ia32_psrav16hi",
+    "llvm.x86.avx512.psrav.w.512" => "__builtin_ia32_psrav32hi",
+    "llvm.x86.avx512.psrl.d.512" => "__builtin_ia32_psrld512",
+    "llvm.x86.avx512.psrl.q.512" => "__builtin_ia32_psrlq512",
+    "llvm.x86.avx512.psrl.w.512" => "__builtin_ia32_psrlw512",
+    "llvm.x86.avx512.psrli.d.512" => "__builtin_ia32_psrldi512",
+    "llvm.x86.avx512.psrli.q.512" => "__builtin_ia32_psrlqi512",
+    "llvm.x86.avx512.psrli.w.512" => "__builtin_ia32_psrlwi512",
+    "llvm.x86.avx512.psrlv.d.512" => "__builtin_ia32_psrlv16si",
+    "llvm.x86.avx512.psrlv.q.512" => "__builtin_ia32_psrlv8di",
+    "llvm.x86.avx512.psrlv.w.128" => "__builtin_ia32_psrlv8hi",
+    "llvm.x86.avx512.psrlv.w.256" => "__builtin_ia32_psrlv16hi",
+    "llvm.x86.avx512.psrlv.w.512" => "__builtin_ia32_psrlv32hi",
+    "llvm.x86.avx512.pternlog.d.128" => "__builtin_ia32_pternlogd128",
+    "llvm.x86.avx512.pternlog.d.256" => "__builtin_ia32_pternlogd256",
+    "llvm.x86.avx512.pternlog.d.512" => "__builtin_ia32_pternlogd512",
+    "llvm.x86.avx512.pternlog.q.128" => "__builtin_ia32_pternlogq128",
+    "llvm.x86.avx512.pternlog.q.256" => "__builtin_ia32_pternlogq256",
+    "llvm.x86.avx512.pternlog.q.512" => "__builtin_ia32_pternlogq512",
+    "llvm.x86.avx512.rcp14.pd.128" => "__builtin_ia32_rcp14pd128_mask",
+    "llvm.x86.avx512.rcp14.pd.256" => "__builtin_ia32_rcp14pd256_mask",
     "llvm.x86.avx512.rcp14.pd.512" => "__builtin_ia32_rcp14pd512_mask",
+    "llvm.x86.avx512.rcp14.ps.128" => "__builtin_ia32_rcp14ps128_mask",
+    "llvm.x86.avx512.rcp14.ps.256" => "__builtin_ia32_rcp14ps256_mask",
     "llvm.x86.avx512.rcp14.ps.512" => "__builtin_ia32_rcp14ps512_mask",
     "llvm.x86.avx512.rcp14.sd" => "__builtin_ia32_rcp14sd_mask",
     "llvm.x86.avx512.rcp14.ss" => "__builtin_ia32_rcp14ss_mask",
     "llvm.x86.avx512.rcp28.pd" => "__builtin_ia32_rcp28pd_mask",
     "llvm.x86.avx512.rcp28.ps" => "__builtin_ia32_rcp28ps_mask",
-    "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
-    "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
-    "llvm.x86.avx512.rndscale.sd" => "__builtin_ia32_rndscalesd",
-    "llvm.x86.avx512.rndscale.ss" => "__builtin_ia32_rndscaless",
+    "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
+    "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
+    "llvm.x86.avx512.rsqrt14.pd.128" => "__builtin_ia32_rsqrt14pd128_mask",
+    "llvm.x86.avx512.rsqrt14.pd.256" => "__builtin_ia32_rsqrt14pd256_mask",
     "llvm.x86.avx512.rsqrt14.pd.512" => "__builtin_ia32_rsqrt14pd512_mask",
+    "llvm.x86.avx512.rsqrt14.ps.128" => "__builtin_ia32_rsqrt14ps128_mask",
+    "llvm.x86.avx512.rsqrt14.ps.256" => "__builtin_ia32_rsqrt14ps256_mask",
     "llvm.x86.avx512.rsqrt14.ps.512" => "__builtin_ia32_rsqrt14ps512_mask",
     "llvm.x86.avx512.rsqrt14.sd" => "__builtin_ia32_rsqrt14sd_mask",
     "llvm.x86.avx512.rsqrt14.ss" => "__builtin_ia32_rsqrt14ss_mask",
     "llvm.x86.avx512.rsqrt28.pd" => "__builtin_ia32_rsqrt28pd_mask",
     "llvm.x86.avx512.rsqrt28.ps" => "__builtin_ia32_rsqrt28ps_mask",
-    "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
-    "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
-    "llvm.x86.avx512.scatter.dpd.512" => "__builtin_ia32_scattersiv8df",
-    "llvm.x86.avx512.scatter.dpi.512" => "__builtin_ia32_scattersiv16si",
-    "llvm.x86.avx512.scatter.dpq.512" => "__builtin_ia32_scattersiv8di",
-    "llvm.x86.avx512.scatter.dps.512" => "__builtin_ia32_scattersiv16sf",
-    "llvm.x86.avx512.scatter.qpd.512" => "__builtin_ia32_scatterdiv8df",
-    "llvm.x86.avx512.scatter.qpi.512" => "__builtin_ia32_scatterdiv16si",
-    "llvm.x86.avx512.scatter.qpq.512" => "__builtin_ia32_scatterdiv8di",
-    "llvm.x86.avx512.scatter.qps.512" => "__builtin_ia32_scatterdiv16sf",
+    "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
+    "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
     "llvm.x86.avx512.scatterpf.dpd.512" => "__builtin_ia32_scatterpfdpd",
     "llvm.x86.avx512.scatterpf.dps.512" => "__builtin_ia32_scatterpfdps",
     "llvm.x86.avx512.scatterpf.qpd.512" => "__builtin_ia32_scatterpfqpd",
     "llvm.x86.avx512.scatterpf.qps.512" => "__builtin_ia32_scatterpfqps",
-    "llvm.x86.avx512.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
-    "llvm.x86.avx512.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
-    "llvm.x86.avx512.sqrt.sd" => "__builtin_ia32_sqrtrndsd",
-    "llvm.x86.avx512.sqrt.ss" => "__builtin_ia32_sqrtrndss",
-    "llvm.x86.avx512.vbroadcast.sd.512" => "__builtin_ia32_vbroadcastsd512",
-    "llvm.x86.avx512.vbroadcast.sd.pd.512" => "__builtin_ia32_vbroadcastsd_pd512",
-    "llvm.x86.avx512.vbroadcast.ss.512" => "__builtin_ia32_vbroadcastss512",
-    "llvm.x86.avx512.vbroadcast.ss.ps.512" => "__builtin_ia32_vbroadcastss_ps512",
+    "llvm.x86.avx512.sub.pd.512" => "__builtin_ia32_subpd512",
+    "llvm.x86.avx512.sub.ps.512" => "__builtin_ia32_subps512",
+    "llvm.x86.avx512.vcomi.sd" => "__builtin_ia32_vcomisd",
+    "llvm.x86.avx512.vcomi.ss" => "__builtin_ia32_vcomiss",
+    "llvm.x86.avx512.vcvtsd2si32" => "__builtin_ia32_vcvtsd2si32",
+    "llvm.x86.avx512.vcvtsd2si64" => "__builtin_ia32_vcvtsd2si64",
+    "llvm.x86.avx512.vcvtsd2usi32" => "__builtin_ia32_vcvtsd2usi32",
+    "llvm.x86.avx512.vcvtsd2usi64" => "__builtin_ia32_vcvtsd2usi64",
+    "llvm.x86.avx512.vcvtss2si32" => "__builtin_ia32_vcvtss2si32",
+    "llvm.x86.avx512.vcvtss2si64" => "__builtin_ia32_vcvtss2si64",
+    "llvm.x86.avx512.vcvtss2usi32" => "__builtin_ia32_vcvtss2usi32",
+    "llvm.x86.avx512.vcvtss2usi64" => "__builtin_ia32_vcvtss2usi64",
+    "llvm.x86.avx512.vpdpbusd.128" => "__builtin_ia32_vpdpbusd128",
+    "llvm.x86.avx512.vpdpbusd.256" => "__builtin_ia32_vpdpbusd256",
+    "llvm.x86.avx512.vpdpbusd.512" => "__builtin_ia32_vpdpbusd512",
+    "llvm.x86.avx512.vpdpbusds.128" => "__builtin_ia32_vpdpbusds128",
+    "llvm.x86.avx512.vpdpbusds.256" => "__builtin_ia32_vpdpbusds256",
+    "llvm.x86.avx512.vpdpbusds.512" => "__builtin_ia32_vpdpbusds512",
+    "llvm.x86.avx512.vpdpwssd.128" => "__builtin_ia32_vpdpwssd128",
+    "llvm.x86.avx512.vpdpwssd.256" => "__builtin_ia32_vpdpwssd256",
+    "llvm.x86.avx512.vpdpwssd.512" => "__builtin_ia32_vpdpwssd512",
+    "llvm.x86.avx512.vpdpwssds.128" => "__builtin_ia32_vpdpwssds128",
+    "llvm.x86.avx512.vpdpwssds.256" => "__builtin_ia32_vpdpwssds256",
+    "llvm.x86.avx512.vpdpwssds.512" => "__builtin_ia32_vpdpwssds512",
+    "llvm.x86.avx512.vpermi2var.d.128" => "__builtin_ia32_vpermi2vard128",
+    "llvm.x86.avx512.vpermi2var.d.256" => "__builtin_ia32_vpermi2vard256",
+    "llvm.x86.avx512.vpermi2var.d.512" => "__builtin_ia32_vpermi2vard512",
+    "llvm.x86.avx512.vpermi2var.hi.128" => "__builtin_ia32_vpermi2varhi128",
+    "llvm.x86.avx512.vpermi2var.hi.256" => "__builtin_ia32_vpermi2varhi256",
+    "llvm.x86.avx512.vpermi2var.hi.512" => "__builtin_ia32_vpermi2varhi512",
+    "llvm.x86.avx512.vpermi2var.pd.128" => "__builtin_ia32_vpermi2varpd128",
+    "llvm.x86.avx512.vpermi2var.pd.256" => "__builtin_ia32_vpermi2varpd256",
+    "llvm.x86.avx512.vpermi2var.pd.512" => "__builtin_ia32_vpermi2varpd512",
+    "llvm.x86.avx512.vpermi2var.ps.128" => "__builtin_ia32_vpermi2varps128",
+    "llvm.x86.avx512.vpermi2var.ps.256" => "__builtin_ia32_vpermi2varps256",
+    "llvm.x86.avx512.vpermi2var.ps.512" => "__builtin_ia32_vpermi2varps512",
+    "llvm.x86.avx512.vpermi2var.q.128" => "__builtin_ia32_vpermi2varq128",
+    "llvm.x86.avx512.vpermi2var.q.256" => "__builtin_ia32_vpermi2varq256",
+    "llvm.x86.avx512.vpermi2var.q.512" => "__builtin_ia32_vpermi2varq512",
+    "llvm.x86.avx512.vpermi2var.qi.128" => "__builtin_ia32_vpermi2varqi128",
+    "llvm.x86.avx512.vpermi2var.qi.256" => "__builtin_ia32_vpermi2varqi256",
+    "llvm.x86.avx512.vpermi2var.qi.512" => "__builtin_ia32_vpermi2varqi512",
+    "llvm.x86.avx512.vpermilvar.pd.512" => "__builtin_ia32_vpermilvarpd512",
+    "llvm.x86.avx512.vpermilvar.ps.512" => "__builtin_ia32_vpermilvarps512",
+    "llvm.x86.avx512.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128",
+    "llvm.x86.avx512.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256",
+    "llvm.x86.avx512.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512",
+    "llvm.x86.avx512.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128",
+    "llvm.x86.avx512.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256",
+    "llvm.x86.avx512.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512",
+    "llvm.x86.avx512bf16.cvtne2ps2bf16.128" => "__builtin_ia32_cvtne2ps2bf16_128",
+    "llvm.x86.avx512bf16.cvtne2ps2bf16.256" => "__builtin_ia32_cvtne2ps2bf16_256",
+    "llvm.x86.avx512bf16.cvtne2ps2bf16.512" => "__builtin_ia32_cvtne2ps2bf16_512",
+    "llvm.x86.avx512bf16.cvtneps2bf16.256" => "__builtin_ia32_cvtneps2bf16_256",
+    "llvm.x86.avx512bf16.cvtneps2bf16.512" => "__builtin_ia32_cvtneps2bf16_512",
+    "llvm.x86.avx512bf16.dpbf16ps.128" => "__builtin_ia32_dpbf16ps_128",
+    "llvm.x86.avx512bf16.dpbf16ps.256" => "__builtin_ia32_dpbf16ps_256",
+    "llvm.x86.avx512bf16.dpbf16ps.512" => "__builtin_ia32_dpbf16ps_512",
+    "llvm.x86.avx512fp16.add.ph.512" => "__builtin_ia32_addph512",
+    "llvm.x86.avx512fp16.div.ph.512" => "__builtin_ia32_divph512",
+    "llvm.x86.avx512fp16.mask.add.sh.round" => "__builtin_ia32_addsh_round_mask",
+    "llvm.x86.avx512fp16.mask.cmp.sh" => "__builtin_ia32_cmpsh_mask",
+    "llvm.x86.avx512fp16.mask.div.sh.round" => "__builtin_ia32_divsh_round_mask",
+    "llvm.x86.avx512fp16.mask.fpclass.sh" => "__builtin_ia32_fpclasssh_mask",
+    "llvm.x86.avx512fp16.mask.getexp.ph.128" => "__builtin_ia32_getexpph128_mask",
+    "llvm.x86.avx512fp16.mask.getexp.ph.256" => "__builtin_ia32_getexpph256_mask",
+    "llvm.x86.avx512fp16.mask.getexp.ph.512" => "__builtin_ia32_getexpph512_mask",
+    "llvm.x86.avx512fp16.mask.getexp.sh" => "__builtin_ia32_getexpsh128_round_mask",
+    "llvm.x86.avx512fp16.mask.getmant.ph.128" => "__builtin_ia32_getmantph128_mask",
+    "llvm.x86.avx512fp16.mask.getmant.ph.256" => "__builtin_ia32_getmantph256_mask",
+    "llvm.x86.avx512fp16.mask.getmant.ph.512" => "__builtin_ia32_getmantph512_mask",
+    "llvm.x86.avx512fp16.mask.getmant.sh" => "__builtin_ia32_getmantsh_round_mask",
+    "llvm.x86.avx512fp16.mask.max.sh.round" => "__builtin_ia32_maxsh_round_mask",
+    "llvm.x86.avx512fp16.mask.min.sh.round" => "__builtin_ia32_minsh_round_mask",
+    "llvm.x86.avx512fp16.mask.mul.sh.round" => "__builtin_ia32_mulsh_round_mask",
+    "llvm.x86.avx512fp16.mask.rcp.ph.128" => "__builtin_ia32_rcpph128_mask",
+    "llvm.x86.avx512fp16.mask.rcp.ph.256" => "__builtin_ia32_rcpph256_mask",
+    "llvm.x86.avx512fp16.mask.rcp.ph.512" => "__builtin_ia32_rcpph512_mask",
+    "llvm.x86.avx512fp16.mask.rcp.sh" => "__builtin_ia32_rcpsh_mask",
+    "llvm.x86.avx512fp16.mask.reduce.ph.128" => "__builtin_ia32_reduceph128_mask",
+    "llvm.x86.avx512fp16.mask.reduce.ph.256" => "__builtin_ia32_reduceph256_mask",
+    "llvm.x86.avx512fp16.mask.reduce.ph.512" => "__builtin_ia32_reduceph512_mask",
+    "llvm.x86.avx512fp16.mask.reduce.sh" => "__builtin_ia32_reducesh_mask",
+    "llvm.x86.avx512fp16.mask.rndscale.ph.128" => "__builtin_ia32_rndscaleph_128_mask",
+    "llvm.x86.avx512fp16.mask.rndscale.ph.256" => "__builtin_ia32_rndscaleph_256_mask",
+    "llvm.x86.avx512fp16.mask.rndscale.ph.512" => "__builtin_ia32_rndscaleph_mask",
+    "llvm.x86.avx512fp16.mask.rndscale.sh" => "__builtin_ia32_rndscalesh_round_mask",
+    "llvm.x86.avx512fp16.mask.rsqrt.ph.128" => "__builtin_ia32_rsqrtph128_mask",
+    "llvm.x86.avx512fp16.mask.rsqrt.ph.256" => "__builtin_ia32_rsqrtph256_mask",
+    "llvm.x86.avx512fp16.mask.rsqrt.ph.512" => "__builtin_ia32_rsqrtph512_mask",
+    "llvm.x86.avx512fp16.mask.rsqrt.sh" => "__builtin_ia32_rsqrtsh_mask",
+    "llvm.x86.avx512fp16.mask.scalef.ph.128" => "__builtin_ia32_scalefph128_mask",
+    "llvm.x86.avx512fp16.mask.scalef.ph.256" => "__builtin_ia32_scalefph256_mask",
+    "llvm.x86.avx512fp16.mask.scalef.ph.512" => "__builtin_ia32_scalefph512_mask",
+    "llvm.x86.avx512fp16.mask.scalef.sh" => "__builtin_ia32_scalefsh_round_mask",
+    "llvm.x86.avx512fp16.mask.sub.sh.round" => "__builtin_ia32_subsh_round_mask",
+    "llvm.x86.avx512fp16.mask.vcvtdq2ph.128" => "__builtin_ia32_vcvtdq2ph128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtpd2ph.128" => "__builtin_ia32_vcvtpd2ph128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtpd2ph.256" => "__builtin_ia32_vcvtpd2ph256_mask",
+    "llvm.x86.avx512fp16.mask.vcvtpd2ph.512" => "__builtin_ia32_vcvtpd2ph512_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2dq.128" => "__builtin_ia32_vcvtph2dq128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2dq.256" => "__builtin_ia32_vcvtph2dq256_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2dq.512" => "__builtin_ia32_vcvtph2dq512_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2pd.128" => "__builtin_ia32_vcvtph2pd128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2pd.256" => "__builtin_ia32_vcvtph2pd256_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2pd.512" => "__builtin_ia32_vcvtph2pd512_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2psx.128" => "__builtin_ia32_vcvtph2psx128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2psx.256" => "__builtin_ia32_vcvtph2psx256_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2psx.512" => "__builtin_ia32_vcvtph2psx512_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2qq.128" => "__builtin_ia32_vcvtph2qq128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2qq.256" => "__builtin_ia32_vcvtph2qq256_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2qq.512" => "__builtin_ia32_vcvtph2qq512_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2udq.128" => "__builtin_ia32_vcvtph2udq128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2udq.256" => "__builtin_ia32_vcvtph2udq256_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2udq.512" => "__builtin_ia32_vcvtph2udq512_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2uqq.128" => "__builtin_ia32_vcvtph2uqq128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2uqq.256" => "__builtin_ia32_vcvtph2uqq256_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2uqq.512" => "__builtin_ia32_vcvtph2uqq512_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2uw.128" => "__builtin_ia32_vcvtph2uw128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2uw.256" => "__builtin_ia32_vcvtph2uw256_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2uw.512" => "__builtin_ia32_vcvtph2uw512_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2w.128" => "__builtin_ia32_vcvtph2w128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2w.256" => "__builtin_ia32_vcvtph2w256_mask",
+    "llvm.x86.avx512fp16.mask.vcvtph2w.512" => "__builtin_ia32_vcvtph2w512_mask",
+    "llvm.x86.avx512fp16.mask.vcvtps2phx.128" => "__builtin_ia32_vcvtps2phx128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtps2phx.256" => "__builtin_ia32_vcvtps2phx256_mask",
+    "llvm.x86.avx512fp16.mask.vcvtps2phx.512" => "__builtin_ia32_vcvtps2phx512_mask",
+    "llvm.x86.avx512fp16.mask.vcvtqq2ph.128" => "__builtin_ia32_vcvtqq2ph128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtqq2ph.256" => "__builtin_ia32_vcvtqq2ph256_mask",
+    "llvm.x86.avx512fp16.mask.vcvtsd2sh.round" => "__builtin_ia32_vcvtsd2sh_round_mask",
+    "llvm.x86.avx512fp16.mask.vcvtsh2sd.round" => "__builtin_ia32_vcvtsh2sd_round_mask",
+    "llvm.x86.avx512fp16.mask.vcvtsh2ss.round" => "__builtin_ia32_vcvtsh2ss_round_mask",
+    "llvm.x86.avx512fp16.mask.vcvtss2sh.round" => "__builtin_ia32_vcvtss2sh_round_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2dq.128" => "__builtin_ia32_vcvttph2dq128_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2dq.256" => "__builtin_ia32_vcvttph2dq256_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2dq.512" => "__builtin_ia32_vcvttph2dq512_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2qq.128" => "__builtin_ia32_vcvttph2qq128_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2qq.256" => "__builtin_ia32_vcvttph2qq256_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2qq.512" => "__builtin_ia32_vcvttph2qq512_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2udq.128" => "__builtin_ia32_vcvttph2udq128_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2udq.256" => "__builtin_ia32_vcvttph2udq256_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2udq.512" => "__builtin_ia32_vcvttph2udq512_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2uqq.128" => "__builtin_ia32_vcvttph2uqq128_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2uqq.256" => "__builtin_ia32_vcvttph2uqq256_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2uqq.512" => "__builtin_ia32_vcvttph2uqq512_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2uw.128" => "__builtin_ia32_vcvttph2uw128_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2uw.256" => "__builtin_ia32_vcvttph2uw256_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2uw.512" => "__builtin_ia32_vcvttph2uw512_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2w.128" => "__builtin_ia32_vcvttph2w128_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2w.256" => "__builtin_ia32_vcvttph2w256_mask",
+    "llvm.x86.avx512fp16.mask.vcvttph2w.512" => "__builtin_ia32_vcvttph2w512_mask",
+    "llvm.x86.avx512fp16.mask.vcvtudq2ph.128" => "__builtin_ia32_vcvtudq2ph128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtuqq2ph.128" => "__builtin_ia32_vcvtuqq2ph128_mask",
+    "llvm.x86.avx512fp16.mask.vcvtuqq2ph.256" => "__builtin_ia32_vcvtuqq2ph256_mask",
+    "llvm.x86.avx512fp16.mask.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_mask",
+    "llvm.x86.avx512fp16.mask.vfcmadd.cph.256" => "__builtin_ia32_vfcmaddcph256_mask",
+    "llvm.x86.avx512fp16.mask.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_mask3",
+    "llvm.x86.avx512fp16.mask.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_mask",
+    "llvm.x86.avx512fp16.mask.vfcmul.cph.128" => "__builtin_ia32_vfcmulcph128_mask",
+    "llvm.x86.avx512fp16.mask.vfcmul.cph.256" => "__builtin_ia32_vfcmulcph256_mask",
+    "llvm.x86.avx512fp16.mask.vfcmul.cph.512" => "__builtin_ia32_vfcmulcph512_mask",
+    "llvm.x86.avx512fp16.mask.vfcmul.csh" => "__builtin_ia32_vfcmulcsh_mask",
+    "llvm.x86.avx512fp16.mask.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_mask",
+    "llvm.x86.avx512fp16.mask.vfmadd.cph.256" => "__builtin_ia32_vfmaddcph256_mask",
+    "llvm.x86.avx512fp16.mask.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_mask3",
+    "llvm.x86.avx512fp16.mask.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_mask",
+    "llvm.x86.avx512fp16.mask.vfmul.cph.128" => "__builtin_ia32_vfmulcph128_mask",
+    "llvm.x86.avx512fp16.mask.vfmul.cph.256" => "__builtin_ia32_vfmulcph256_mask",
+    "llvm.x86.avx512fp16.mask.vfmul.cph.512" => "__builtin_ia32_vfmulcph512_mask",
+    "llvm.x86.avx512fp16.mask.vfmul.csh" => "__builtin_ia32_vfmulcsh_mask",
+    "llvm.x86.avx512fp16.maskz.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_maskz",
+    "llvm.x86.avx512fp16.maskz.vfcmadd.cph.256" => "__builtin_ia32_vfcmaddcph256_maskz",
+    "llvm.x86.avx512fp16.maskz.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_maskz",
+    "llvm.x86.avx512fp16.maskz.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_maskz",
+    "llvm.x86.avx512fp16.maskz.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_maskz",
+    "llvm.x86.avx512fp16.maskz.vfmadd.cph.256" => "__builtin_ia32_vfmaddcph256_maskz",
+    "llvm.x86.avx512fp16.maskz.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_maskz",
+    "llvm.x86.avx512fp16.maskz.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_maskz",
+    "llvm.x86.avx512fp16.max.ph.128" => "__builtin_ia32_maxph128",
+    "llvm.x86.avx512fp16.max.ph.256" => "__builtin_ia32_maxph256",
+    "llvm.x86.avx512fp16.max.ph.512" => "__builtin_ia32_maxph512",
+    "llvm.x86.avx512fp16.min.ph.128" => "__builtin_ia32_minph128",
+    "llvm.x86.avx512fp16.min.ph.256" => "__builtin_ia32_minph256",
+    "llvm.x86.avx512fp16.min.ph.512" => "__builtin_ia32_minph512",
+    "llvm.x86.avx512fp16.mul.ph.512" => "__builtin_ia32_mulph512",
+    "llvm.x86.avx512fp16.sub.ph.512" => "__builtin_ia32_subph512",
+    "llvm.x86.avx512fp16.vcomi.sh" => "__builtin_ia32_vcomish",
+    "llvm.x86.avx512fp16.vcvtsh2si32" => "__builtin_ia32_vcvtsh2si32",
+    "llvm.x86.avx512fp16.vcvtsh2si64" => "__builtin_ia32_vcvtsh2si64",
+    "llvm.x86.avx512fp16.vcvtsh2usi32" => "__builtin_ia32_vcvtsh2usi32",
+    "llvm.x86.avx512fp16.vcvtsh2usi64" => "__builtin_ia32_vcvtsh2usi64",
+    "llvm.x86.avx512fp16.vcvtsi2sh" => "__builtin_ia32_vcvtsi2sh",
+    "llvm.x86.avx512fp16.vcvtsi642sh" => "__builtin_ia32_vcvtsi642sh",
+    "llvm.x86.avx512fp16.vcvttsh2si32" => "__builtin_ia32_vcvttsh2si32",
+    "llvm.x86.avx512fp16.vcvttsh2si64" => "__builtin_ia32_vcvttsh2si64",
+    "llvm.x86.avx512fp16.vcvttsh2usi32" => "__builtin_ia32_vcvttsh2usi32",
+    "llvm.x86.avx512fp16.vcvttsh2usi64" => "__builtin_ia32_vcvttsh2usi64",
+    "llvm.x86.avx512fp16.vcvtusi2sh" => "__builtin_ia32_vcvtusi2sh",
+    "llvm.x86.avx512fp16.vcvtusi642sh" => "__builtin_ia32_vcvtusi642sh",
+    "llvm.x86.avx512fp16.vfmaddsub.ph.128" => "__builtin_ia32_vfmaddsubph",
+    "llvm.x86.avx512fp16.vfmaddsub.ph.256" => "__builtin_ia32_vfmaddsubph256",
     "llvm.x86.bmi.bextr.32" => "__builtin_ia32_bextr_u32",
     "llvm.x86.bmi.bextr.64" => "__builtin_ia32_bextr_u64",
     "llvm.x86.bmi.bzhi.32" => "__builtin_ia32_bzhi_si",
@@ -2593,60 +2013,132 @@ match name {
     "llvm.x86.bmi.pdep.64" => "__builtin_ia32_pdep_di",
     "llvm.x86.bmi.pext.32" => "__builtin_ia32_pext_si",
     "llvm.x86.bmi.pext.64" => "__builtin_ia32_pext_di",
-    "llvm.x86.fma.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
-    "llvm.x86.fma.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
-    "llvm.x86.fma.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
-    "llvm.x86.fma.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
-    "llvm.x86.fma.mask.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask",
-    "llvm.x86.fma.mask.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask",
-    "llvm.x86.fma.mask.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask",
-    "llvm.x86.fma.mask.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask",
-    "llvm.x86.fma.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
-    "llvm.x86.fma.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
-    "llvm.x86.fma.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
-    "llvm.x86.fma.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
-    "llvm.x86.fma.vfmadd.pd" => "__builtin_ia32_vfmaddpd",
-    "llvm.x86.fma.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256",
-    "llvm.x86.fma.vfmadd.ps" => "__builtin_ia32_vfmaddps",
-    "llvm.x86.fma.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256",
-    "llvm.x86.fma.vfmadd.sd" => "__builtin_ia32_vfmaddsd",
-    "llvm.x86.fma.vfmadd.ss" => "__builtin_ia32_vfmaddss",
+    "llvm.x86.cldemote" => "__builtin_ia32_cldemote",
+    "llvm.x86.clflushopt" => "__builtin_ia32_clflushopt",
+    "llvm.x86.clrssbsy" => "__builtin_ia32_clrssbsy",
+    "llvm.x86.clui" => "__builtin_ia32_clui",
+    "llvm.x86.clwb" => "__builtin_ia32_clwb",
+    "llvm.x86.clzero" => "__builtin_ia32_clzero",
+    "llvm.x86.directstore32" => "__builtin_ia32_directstore_u32",
+    "llvm.x86.directstore64" => "__builtin_ia32_directstore_u64",
+    "llvm.x86.enqcmd" => "__builtin_ia32_enqcmd",
+    "llvm.x86.enqcmds" => "__builtin_ia32_enqcmds",
+    "llvm.x86.flags.read.u32" => "__builtin_ia32_readeflags_u32",
+    "llvm.x86.flags.read.u64" => "__builtin_ia32_readeflags_u64",
+    "llvm.x86.flags.write.u32" => "__builtin_ia32_writeeflags_u32",
+    "llvm.x86.flags.write.u64" => "__builtin_ia32_writeeflags_u64",
     "llvm.x86.fma.vfmaddsub.pd" => "__builtin_ia32_vfmaddsubpd",
     "llvm.x86.fma.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256",
     "llvm.x86.fma.vfmaddsub.ps" => "__builtin_ia32_vfmaddsubps",
     "llvm.x86.fma.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256",
-    "llvm.x86.fma.vfmsub.pd" => "__builtin_ia32_vfmsubpd",
-    "llvm.x86.fma.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256",
-    "llvm.x86.fma.vfmsub.ps" => "__builtin_ia32_vfmsubps",
-    "llvm.x86.fma.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256",
-    "llvm.x86.fma.vfmsub.sd" => "__builtin_ia32_vfmsubsd",
-    "llvm.x86.fma.vfmsub.ss" => "__builtin_ia32_vfmsubss",
-    "llvm.x86.fma.vfmsubadd.pd" => "__builtin_ia32_vfmsubaddpd",
-    "llvm.x86.fma.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256",
-    "llvm.x86.fma.vfmsubadd.ps" => "__builtin_ia32_vfmsubaddps",
-    "llvm.x86.fma.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256",
-    "llvm.x86.fma.vfnmadd.pd" => "__builtin_ia32_vfnmaddpd",
-    "llvm.x86.fma.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256",
-    "llvm.x86.fma.vfnmadd.ps" => "__builtin_ia32_vfnmaddps",
-    "llvm.x86.fma.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256",
-    "llvm.x86.fma.vfnmadd.sd" => "__builtin_ia32_vfnmaddsd",
-    "llvm.x86.fma.vfnmadd.ss" => "__builtin_ia32_vfnmaddss",
-    "llvm.x86.fma.vfnmsub.pd" => "__builtin_ia32_vfnmsubpd",
-    "llvm.x86.fma.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256",
-    "llvm.x86.fma.vfnmsub.ps" => "__builtin_ia32_vfnmsubps",
-    "llvm.x86.fma.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256",
-    "llvm.x86.fma.vfnmsub.sd" => "__builtin_ia32_vfnmsubsd",
-    "llvm.x86.fma.vfnmsub.ss" => "__builtin_ia32_vfnmsubss",
+    "llvm.x86.fxrstor" => "__builtin_ia32_fxrstor",
+    "llvm.x86.fxrstor64" => "__builtin_ia32_fxrstor64",
+    "llvm.x86.fxsave" => "__builtin_ia32_fxsave",
+    "llvm.x86.fxsave64" => "__builtin_ia32_fxsave64",
+    "llvm.x86.incsspd" => "__builtin_ia32_incsspd",
+    "llvm.x86.incsspq" => "__builtin_ia32_incsspq",
+    "llvm.x86.invpcid" => "__builtin_ia32_invpcid",
+    "llvm.x86.ldtilecfg" => "__builtin_ia32_tile_loadconfig",
+    "llvm.x86.ldtilecfg.internal" => "__builtin_ia32_tile_loadconfig_internal",
+    "llvm.x86.llwpcb" => "__builtin_ia32_llwpcb",
+    "llvm.x86.loadiwkey" => "__builtin_ia32_loadiwkey",
+    "llvm.x86.lwpins32" => "__builtin_ia32_lwpins32",
+    "llvm.x86.lwpins64" => "__builtin_ia32_lwpins64",
+    "llvm.x86.lwpval32" => "__builtin_ia32_lwpval32",
+    "llvm.x86.lwpval64" => "__builtin_ia32_lwpval64",
     "llvm.x86.mmx.emms" => "__builtin_ia32_emms",
     "llvm.x86.mmx.femms" => "__builtin_ia32_femms",
+    "llvm.x86.mmx.maskmovq" => "__builtin_ia32_maskmovq",
+    "llvm.x86.mmx.movnt.dq" => "__builtin_ia32_movntq",
+    "llvm.x86.mmx.packssdw" => "__builtin_ia32_packssdw",
+    "llvm.x86.mmx.packsswb" => "__builtin_ia32_packsswb",
+    "llvm.x86.mmx.packuswb" => "__builtin_ia32_packuswb",
+    "llvm.x86.mmx.padd.b" => "__builtin_ia32_paddb",
+    "llvm.x86.mmx.padd.d" => "__builtin_ia32_paddd",
+    "llvm.x86.mmx.padd.q" => "__builtin_ia32_paddq",
+    "llvm.x86.mmx.padd.w" => "__builtin_ia32_paddw",
+    "llvm.x86.mmx.padds.b" => "__builtin_ia32_paddsb",
+    "llvm.x86.mmx.padds.w" => "__builtin_ia32_paddsw",
+    "llvm.x86.mmx.paddus.b" => "__builtin_ia32_paddusb",
+    "llvm.x86.mmx.paddus.w" => "__builtin_ia32_paddusw",
+    "llvm.x86.mmx.palignr.b" => "__builtin_ia32_palignr",
+    "llvm.x86.mmx.pand" => "__builtin_ia32_pand",
+    "llvm.x86.mmx.pandn" => "__builtin_ia32_pandn",
+    "llvm.x86.mmx.pavg.b" => "__builtin_ia32_pavgb",
+    "llvm.x86.mmx.pavg.w" => "__builtin_ia32_pavgw",
+    "llvm.x86.mmx.pcmpeq.b" => "__builtin_ia32_pcmpeqb",
+    "llvm.x86.mmx.pcmpeq.d" => "__builtin_ia32_pcmpeqd",
+    "llvm.x86.mmx.pcmpeq.w" => "__builtin_ia32_pcmpeqw",
+    "llvm.x86.mmx.pcmpgt.b" => "__builtin_ia32_pcmpgtb",
+    "llvm.x86.mmx.pcmpgt.d" => "__builtin_ia32_pcmpgtd",
+    "llvm.x86.mmx.pcmpgt.w" => "__builtin_ia32_pcmpgtw",
+    "llvm.x86.mmx.pextr.w" => "__builtin_ia32_vec_ext_v4hi",
+    "llvm.x86.mmx.pinsr.w" => "__builtin_ia32_vec_set_v4hi",
+    "llvm.x86.mmx.pmadd.wd" => "__builtin_ia32_pmaddwd",
+    "llvm.x86.mmx.pmaxs.w" => "__builtin_ia32_pmaxsw",
+    "llvm.x86.mmx.pmaxu.b" => "__builtin_ia32_pmaxub",
+    "llvm.x86.mmx.pmins.w" => "__builtin_ia32_pminsw",
+    "llvm.x86.mmx.pminu.b" => "__builtin_ia32_pminub",
+    "llvm.x86.mmx.pmovmskb" => "__builtin_ia32_pmovmskb",
+    "llvm.x86.mmx.pmulh.w" => "__builtin_ia32_pmulhw",
+    "llvm.x86.mmx.pmulhu.w" => "__builtin_ia32_pmulhuw",
+    "llvm.x86.mmx.pmull.w" => "__builtin_ia32_pmullw",
+    "llvm.x86.mmx.pmulu.dq" => "__builtin_ia32_pmuludq",
+    "llvm.x86.mmx.por" => "__builtin_ia32_por",
+    "llvm.x86.mmx.psad.bw" => "__builtin_ia32_psadbw",
+    "llvm.x86.mmx.psll.d" => "__builtin_ia32_pslld",
+    "llvm.x86.mmx.psll.q" => "__builtin_ia32_psllq",
+    "llvm.x86.mmx.psll.w" => "__builtin_ia32_psllw",
+    "llvm.x86.mmx.pslli.d" => "__builtin_ia32_pslldi",
+    "llvm.x86.mmx.pslli.q" => "__builtin_ia32_psllqi",
+    "llvm.x86.mmx.pslli.w" => "__builtin_ia32_psllwi",
+    "llvm.x86.mmx.psra.d" => "__builtin_ia32_psrad",
+    "llvm.x86.mmx.psra.w" => "__builtin_ia32_psraw",
+    "llvm.x86.mmx.psrai.d" => "__builtin_ia32_psradi",
+    "llvm.x86.mmx.psrai.w" => "__builtin_ia32_psrawi",
+    "llvm.x86.mmx.psrl.d" => "__builtin_ia32_psrld",
+    "llvm.x86.mmx.psrl.q" => "__builtin_ia32_psrlq",
+    "llvm.x86.mmx.psrl.w" => "__builtin_ia32_psrlw",
+    "llvm.x86.mmx.psrli.d" => "__builtin_ia32_psrldi",
+    "llvm.x86.mmx.psrli.q" => "__builtin_ia32_psrlqi",
+    "llvm.x86.mmx.psrli.w" => "__builtin_ia32_psrlwi",
+    "llvm.x86.mmx.psub.b" => "__builtin_ia32_psubb",
+    "llvm.x86.mmx.psub.d" => "__builtin_ia32_psubd",
+    "llvm.x86.mmx.psub.q" => "__builtin_ia32_psubq",
+    "llvm.x86.mmx.psub.w" => "__builtin_ia32_psubw",
+    "llvm.x86.mmx.psubs.b" => "__builtin_ia32_psubsb",
+    "llvm.x86.mmx.psubs.w" => "__builtin_ia32_psubsw",
+    "llvm.x86.mmx.psubus.b" => "__builtin_ia32_psubusb",
+    "llvm.x86.mmx.psubus.w" => "__builtin_ia32_psubusw",
+    "llvm.x86.mmx.punpckhbw" => "__builtin_ia32_punpckhbw",
+    "llvm.x86.mmx.punpckhdq" => "__builtin_ia32_punpckhdq",
+    "llvm.x86.mmx.punpckhwd" => "__builtin_ia32_punpckhwd",
+    "llvm.x86.mmx.punpcklbw" => "__builtin_ia32_punpcklbw",
+    "llvm.x86.mmx.punpckldq" => "__builtin_ia32_punpckldq",
+    "llvm.x86.mmx.punpcklwd" => "__builtin_ia32_punpcklwd",
+    "llvm.x86.mmx.pxor" => "__builtin_ia32_pxor",
+    "llvm.x86.monitorx" => "__builtin_ia32_monitorx",
+    "llvm.x86.movdir64b" => "__builtin_ia32_movdir64b",
+    "llvm.x86.mwaitx" => "__builtin_ia32_mwaitx",
     "llvm.x86.pclmulqdq" => "__builtin_ia32_pclmulqdq128",
+    "llvm.x86.pclmulqdq.256" => "__builtin_ia32_pclmulqdq256",
+    "llvm.x86.pclmulqdq.512" => "__builtin_ia32_pclmulqdq512",
+    "llvm.x86.ptwrite32" => "__builtin_ia32_ptwrite32",
+    "llvm.x86.ptwrite64" => "__builtin_ia32_ptwrite64",
     "llvm.x86.rdfsbase.32" => "__builtin_ia32_rdfsbase32",
     "llvm.x86.rdfsbase.64" => "__builtin_ia32_rdfsbase64",
     "llvm.x86.rdgsbase.32" => "__builtin_ia32_rdgsbase32",
     "llvm.x86.rdgsbase.64" => "__builtin_ia32_rdgsbase64",
+    "llvm.x86.rdpid" => "__builtin_ia32_rdpid",
     "llvm.x86.rdpmc" => "__builtin_ia32_rdpmc",
+    "llvm.x86.rdsspd" => "__builtin_ia32_rdsspd",
+    "llvm.x86.rdsspq" => "__builtin_ia32_rdsspq",
     "llvm.x86.rdtsc" => "__builtin_ia32_rdtsc",
-    "llvm.x86.rdtscp" => "__builtin_ia32_rdtscp",
+    "llvm.x86.rstorssp" => "__builtin_ia32_rstorssp",
+    "llvm.x86.saveprevssp" => "__builtin_ia32_saveprevssp",
+    "llvm.x86.senduipi" => "__builtin_ia32_senduipi",
+    "llvm.x86.serialize" => "__builtin_ia32_serialize",
+    "llvm.x86.setssbsy" => "__builtin_ia32_setssbsy",
     "llvm.x86.sha1msg1" => "__builtin_ia32_sha1msg1",
     "llvm.x86.sha1msg2" => "__builtin_ia32_sha1msg2",
     "llvm.x86.sha1nexte" => "__builtin_ia32_sha1nexte",
@@ -2654,8 +2146,7 @@ match name {
     "llvm.x86.sha256msg1" => "__builtin_ia32_sha256msg1",
     "llvm.x86.sha256msg2" => "__builtin_ia32_sha256msg2",
     "llvm.x86.sha256rnds2" => "__builtin_ia32_sha256rnds2",
-    "llvm.x86.sse.add.ss" => "__builtin_ia32_addss",
-    "llvm.x86.sse.cmp.ps" => "__builtin_ia32_cmpps",
+    "llvm.x86.slwpcb" => "__builtin_ia32_slwpcb",
     "llvm.x86.sse.cmp.ss" => "__builtin_ia32_cmpss",
     "llvm.x86.sse.comieq.ss" => "__builtin_ia32_comieq",
     "llvm.x86.sse.comige.ss" => "__builtin_ia32_comige",
@@ -2663,37 +2154,34 @@ match name {
     "llvm.x86.sse.comile.ss" => "__builtin_ia32_comile",
     "llvm.x86.sse.comilt.ss" => "__builtin_ia32_comilt",
     "llvm.x86.sse.comineq.ss" => "__builtin_ia32_comineq",
-    "llvm.x86.sse.cvtsi2ss" => "__builtin_ia32_cvtsi2ss",
-    "llvm.x86.sse.cvtsi642ss" => "__builtin_ia32_cvtsi642ss",
+    "llvm.x86.sse.cvtpd2pi" => "__builtin_ia32_cvtpd2pi",
+    "llvm.x86.sse.cvtpi2pd" => "__builtin_ia32_cvtpi2pd",
+    "llvm.x86.sse.cvtpi2ps" => "__builtin_ia32_cvtpi2ps",
+    "llvm.x86.sse.cvtps2pi" => "__builtin_ia32_cvtps2pi",
     "llvm.x86.sse.cvtss2si" => "__builtin_ia32_cvtss2si",
     "llvm.x86.sse.cvtss2si64" => "__builtin_ia32_cvtss2si64",
+    "llvm.x86.sse.cvttpd2pi" => "__builtin_ia32_cvttpd2pi",
+    "llvm.x86.sse.cvttps2pi" => "__builtin_ia32_cvttps2pi",
     "llvm.x86.sse.cvttss2si" => "__builtin_ia32_cvttss2si",
     "llvm.x86.sse.cvttss2si64" => "__builtin_ia32_cvttss2si64",
-    "llvm.x86.sse.div.ss" => "__builtin_ia32_divss",
     "llvm.x86.sse.max.ps" => "__builtin_ia32_maxps",
     "llvm.x86.sse.max.ss" => "__builtin_ia32_maxss",
     "llvm.x86.sse.min.ps" => "__builtin_ia32_minps",
     "llvm.x86.sse.min.ss" => "__builtin_ia32_minss",
     "llvm.x86.sse.movmsk.ps" => "__builtin_ia32_movmskps",
-    "llvm.x86.sse.mul.ss" => "__builtin_ia32_mulss",
+    "llvm.x86.sse.pshuf.w" => "__builtin_ia32_pshufw",
     "llvm.x86.sse.rcp.ps" => "__builtin_ia32_rcpps",
     "llvm.x86.sse.rcp.ss" => "__builtin_ia32_rcpss",
     "llvm.x86.sse.rsqrt.ps" => "__builtin_ia32_rsqrtps",
     "llvm.x86.sse.rsqrt.ss" => "__builtin_ia32_rsqrtss",
     "llvm.x86.sse.sfence" => "__builtin_ia32_sfence",
-    "llvm.x86.sse.sqrt.ps" => "__builtin_ia32_sqrtps",
-    "llvm.x86.sse.sqrt.ss" => "__builtin_ia32_sqrtss",
-    "llvm.x86.sse.storeu.ps" => "__builtin_ia32_storeups",
-    "llvm.x86.sse.sub.ss" => "__builtin_ia32_subss",
     "llvm.x86.sse.ucomieq.ss" => "__builtin_ia32_ucomieq",
     "llvm.x86.sse.ucomige.ss" => "__builtin_ia32_ucomige",
     "llvm.x86.sse.ucomigt.ss" => "__builtin_ia32_ucomigt",
     "llvm.x86.sse.ucomile.ss" => "__builtin_ia32_ucomile",
     "llvm.x86.sse.ucomilt.ss" => "__builtin_ia32_ucomilt",
     "llvm.x86.sse.ucomineq.ss" => "__builtin_ia32_ucomineq",
-    "llvm.x86.sse2.add.sd" => "__builtin_ia32_addsd",
     "llvm.x86.sse2.clflush" => "__builtin_ia32_clflush",
-    "llvm.x86.sse2.cmp.pd" => "__builtin_ia32_cmppd",
     "llvm.x86.sse2.cmp.sd" => "__builtin_ia32_cmpsd",
     "llvm.x86.sse2.comieq.sd" => "__builtin_ia32_comisdeq",
     "llvm.x86.sse2.comige.sd" => "__builtin_ia32_comisdge",
@@ -2701,23 +2189,16 @@ match name {
     "llvm.x86.sse2.comile.sd" => "__builtin_ia32_comisdle",
     "llvm.x86.sse2.comilt.sd" => "__builtin_ia32_comisdlt",
     "llvm.x86.sse2.comineq.sd" => "__builtin_ia32_comisdneq",
-    "llvm.x86.sse2.cvtdq2pd" => "__builtin_ia32_cvtdq2pd",
-    "llvm.x86.sse2.cvtdq2ps" => "__builtin_ia32_cvtdq2ps",
     "llvm.x86.sse2.cvtpd2dq" => "__builtin_ia32_cvtpd2dq",
     "llvm.x86.sse2.cvtpd2ps" => "__builtin_ia32_cvtpd2ps",
     "llvm.x86.sse2.cvtps2dq" => "__builtin_ia32_cvtps2dq",
-    "llvm.x86.sse2.cvtps2pd" => "__builtin_ia32_cvtps2pd",
     "llvm.x86.sse2.cvtsd2si" => "__builtin_ia32_cvtsd2si",
     "llvm.x86.sse2.cvtsd2si64" => "__builtin_ia32_cvtsd2si64",
     "llvm.x86.sse2.cvtsd2ss" => "__builtin_ia32_cvtsd2ss",
-    "llvm.x86.sse2.cvtsi2sd" => "__builtin_ia32_cvtsi2sd",
-    "llvm.x86.sse2.cvtsi642sd" => "__builtin_ia32_cvtsi642sd",
-    "llvm.x86.sse2.cvtss2sd" => "__builtin_ia32_cvtss2sd",
     "llvm.x86.sse2.cvttpd2dq" => "__builtin_ia32_cvttpd2dq",
     "llvm.x86.sse2.cvttps2dq" => "__builtin_ia32_cvttps2dq",
     "llvm.x86.sse2.cvttsd2si" => "__builtin_ia32_cvttsd2si",
     "llvm.x86.sse2.cvttsd2si64" => "__builtin_ia32_cvttsd2si64",
-    "llvm.x86.sse2.div.sd" => "__builtin_ia32_divsd",
     "llvm.x86.sse2.lfence" => "__builtin_ia32_lfence",
     "llvm.x86.sse2.maskmov.dqu" => "__builtin_ia32_maskmovdqu",
     "llvm.x86.sse2.max.pd" => "__builtin_ia32_maxpd",
@@ -2726,33 +2207,18 @@ match name {
     "llvm.x86.sse2.min.pd" => "__builtin_ia32_minpd",
     "llvm.x86.sse2.min.sd" => "__builtin_ia32_minsd",
     "llvm.x86.sse2.movmsk.pd" => "__builtin_ia32_movmskpd",
-    "llvm.x86.sse2.mul.sd" => "__builtin_ia32_mulsd",
     "llvm.x86.sse2.packssdw.128" => "__builtin_ia32_packssdw128",
     "llvm.x86.sse2.packsswb.128" => "__builtin_ia32_packsswb128",
     "llvm.x86.sse2.packuswb.128" => "__builtin_ia32_packuswb128",
-    "llvm.x86.sse2.padds.b" => "__builtin_ia32_paddsb128",
-    "llvm.x86.sse2.padds.w" => "__builtin_ia32_paddsw128",
-    "llvm.x86.sse2.paddus.b" => "__builtin_ia32_paddusb128",
-    "llvm.x86.sse2.paddus.w" => "__builtin_ia32_paddusw128",
     "llvm.x86.sse2.pause" => "__builtin_ia32_pause",
     "llvm.x86.sse2.pavg.b" => "__builtin_ia32_pavgb128",
     "llvm.x86.sse2.pavg.w" => "__builtin_ia32_pavgw128",
     "llvm.x86.sse2.pmadd.wd" => "__builtin_ia32_pmaddwd128",
-    "llvm.x86.sse2.pmaxs.w" => "__builtin_ia32_pmaxsw128",
-    "llvm.x86.sse2.pmaxu.b" => "__builtin_ia32_pmaxub128",
-    "llvm.x86.sse2.pmins.w" => "__builtin_ia32_pminsw128",
-    "llvm.x86.sse2.pminu.b" => "__builtin_ia32_pminub128",
     "llvm.x86.sse2.pmovmskb.128" => "__builtin_ia32_pmovmskb128",
     "llvm.x86.sse2.pmulh.w" => "__builtin_ia32_pmulhw128",
     "llvm.x86.sse2.pmulhu.w" => "__builtin_ia32_pmulhuw128",
-    "llvm.x86.sse2.pmulu.dq" => "__builtin_ia32_pmuludq128",
     "llvm.x86.sse2.psad.bw" => "__builtin_ia32_psadbw128",
-    "llvm.x86.sse2.pshuf.d" => "__builtin_ia32_pshufd",
-    "llvm.x86.sse2.pshufh.w" => "__builtin_ia32_pshufhw",
-    "llvm.x86.sse2.pshufl.w" => "__builtin_ia32_pshuflw",
     "llvm.x86.sse2.psll.d" => "__builtin_ia32_pslld128",
-    "llvm.x86.sse2.psll.dq" => "__builtin_ia32_pslldqi128",
-    "llvm.x86.sse2.psll.dq.bs" => "__builtin_ia32_pslldqi128_byteshift",
     "llvm.x86.sse2.psll.q" => "__builtin_ia32_psllq128",
     "llvm.x86.sse2.psll.w" => "__builtin_ia32_psllw128",
     "llvm.x86.sse2.pslli.d" => "__builtin_ia32_pslldi128",
@@ -2763,23 +2229,11 @@ match name {
     "llvm.x86.sse2.psrai.d" => "__builtin_ia32_psradi128",
     "llvm.x86.sse2.psrai.w" => "__builtin_ia32_psrawi128",
     "llvm.x86.sse2.psrl.d" => "__builtin_ia32_psrld128",
-    "llvm.x86.sse2.psrl.dq" => "__builtin_ia32_psrldqi128",
-    "llvm.x86.sse2.psrl.dq.bs" => "__builtin_ia32_psrldqi128_byteshift",
     "llvm.x86.sse2.psrl.q" => "__builtin_ia32_psrlq128",
     "llvm.x86.sse2.psrl.w" => "__builtin_ia32_psrlw128",
     "llvm.x86.sse2.psrli.d" => "__builtin_ia32_psrldi128",
     "llvm.x86.sse2.psrli.q" => "__builtin_ia32_psrlqi128",
     "llvm.x86.sse2.psrli.w" => "__builtin_ia32_psrlwi128",
-    "llvm.x86.sse2.psubs.b" => "__builtin_ia32_psubsb128",
-    "llvm.x86.sse2.psubs.w" => "__builtin_ia32_psubsw128",
-    "llvm.x86.sse2.psubus.b" => "__builtin_ia32_psubusb128",
-    "llvm.x86.sse2.psubus.w" => "__builtin_ia32_psubusw128",
-    "llvm.x86.sse2.sqrt.pd" => "__builtin_ia32_sqrtpd",
-    "llvm.x86.sse2.sqrt.sd" => "__builtin_ia32_sqrtsd",
-    "llvm.x86.sse2.storel.dq" => "__builtin_ia32_storelv4si",
-    "llvm.x86.sse2.storeu.dq" => "__builtin_ia32_storedqu",
-    "llvm.x86.sse2.storeu.pd" => "__builtin_ia32_storeupd",
-    "llvm.x86.sse2.sub.sd" => "__builtin_ia32_subsd",
     "llvm.x86.sse2.ucomieq.sd" => "__builtin_ia32_ucomisdeq",
     "llvm.x86.sse2.ucomige.sd" => "__builtin_ia32_ucomisdge",
     "llvm.x86.sse2.ucomigt.sd" => "__builtin_ia32_ucomisdgt",
@@ -2795,41 +2249,15 @@ match name {
     "llvm.x86.sse3.ldu.dq" => "__builtin_ia32_lddqu",
     "llvm.x86.sse3.monitor" => "__builtin_ia32_monitor",
     "llvm.x86.sse3.mwait" => "__builtin_ia32_mwait",
-    "llvm.x86.sse41.blendpd" => "__builtin_ia32_blendpd",
-    "llvm.x86.sse41.blendps" => "__builtin_ia32_blendps",
     "llvm.x86.sse41.blendvpd" => "__builtin_ia32_blendvpd",
     "llvm.x86.sse41.blendvps" => "__builtin_ia32_blendvps",
     "llvm.x86.sse41.dppd" => "__builtin_ia32_dppd",
     "llvm.x86.sse41.dpps" => "__builtin_ia32_dpps",
-    "llvm.x86.sse41.extractps" => "__builtin_ia32_extractps128",
     "llvm.x86.sse41.insertps" => "__builtin_ia32_insertps128",
-    "llvm.x86.sse41.movntdqa" => "__builtin_ia32_movntdqa",
     "llvm.x86.sse41.mpsadbw" => "__builtin_ia32_mpsadbw128",
     "llvm.x86.sse41.packusdw" => "__builtin_ia32_packusdw128",
     "llvm.x86.sse41.pblendvb" => "__builtin_ia32_pblendvb128",
-    "llvm.x86.sse41.pblendw" => "__builtin_ia32_pblendw128",
     "llvm.x86.sse41.phminposuw" => "__builtin_ia32_phminposuw128",
-    "llvm.x86.sse41.pmaxsb" => "__builtin_ia32_pmaxsb128",
-    "llvm.x86.sse41.pmaxsd" => "__builtin_ia32_pmaxsd128",
-    "llvm.x86.sse41.pmaxud" => "__builtin_ia32_pmaxud128",
-    "llvm.x86.sse41.pmaxuw" => "__builtin_ia32_pmaxuw128",
-    "llvm.x86.sse41.pminsb" => "__builtin_ia32_pminsb128",
-    "llvm.x86.sse41.pminsd" => "__builtin_ia32_pminsd128",
-    "llvm.x86.sse41.pminud" => "__builtin_ia32_pminud128",
-    "llvm.x86.sse41.pminuw" => "__builtin_ia32_pminuw128",
-    "llvm.x86.sse41.pmovsxbd" => "__builtin_ia32_pmovsxbd128",
-    "llvm.x86.sse41.pmovsxbq" => "__builtin_ia32_pmovsxbq128",
-    "llvm.x86.sse41.pmovsxbw" => "__builtin_ia32_pmovsxbw128",
-    "llvm.x86.sse41.pmovsxdq" => "__builtin_ia32_pmovsxdq128",
-    "llvm.x86.sse41.pmovsxwd" => "__builtin_ia32_pmovsxwd128",
-    "llvm.x86.sse41.pmovsxwq" => "__builtin_ia32_pmovsxwq128",
-    "llvm.x86.sse41.pmovzxbd" => "__builtin_ia32_pmovzxbd128",
-    "llvm.x86.sse41.pmovzxbq" => "__builtin_ia32_pmovzxbq128",
-    "llvm.x86.sse41.pmovzxbw" => "__builtin_ia32_pmovzxbw128",
-    "llvm.x86.sse41.pmovzxdq" => "__builtin_ia32_pmovzxdq128",
-    "llvm.x86.sse41.pmovzxwd" => "__builtin_ia32_pmovzxwd128",
-    "llvm.x86.sse41.pmovzxwq" => "__builtin_ia32_pmovzxwq128",
-    "llvm.x86.sse41.pmuldq" => "__builtin_ia32_pmuldq128",
     "llvm.x86.sse41.ptestc" => "__builtin_ia32_ptestc128",
     "llvm.x86.sse41.ptestnzc" => "__builtin_ia32_ptestnzc128",
     "llvm.x86.sse41.ptestz" => "__builtin_ia32_ptestz128",
@@ -2859,35 +2287,82 @@ match name {
     "llvm.x86.sse4a.extrqi" => "__builtin_ia32_extrqi",
     "llvm.x86.sse4a.insertq" => "__builtin_ia32_insertq",
     "llvm.x86.sse4a.insertqi" => "__builtin_ia32_insertqi",
-    "llvm.x86.sse4a.movnt.sd" => "__builtin_ia32_movntsd",
-    "llvm.x86.sse4a.movnt.ss" => "__builtin_ia32_movntss",
-    "llvm.x86.ssse3.pabs.b.128" => "__builtin_ia32_pabsb128",
-    "llvm.x86.ssse3.pabs.d.128" => "__builtin_ia32_pabsd128",
-    "llvm.x86.ssse3.pabs.w.128" => "__builtin_ia32_pabsw128",
+    "llvm.x86.ssse3.pabs.b" => "__builtin_ia32_pabsb",
+    "llvm.x86.ssse3.pabs.d" => "__builtin_ia32_pabsd",
+    "llvm.x86.ssse3.pabs.w" => "__builtin_ia32_pabsw",
+    "llvm.x86.ssse3.phadd.d" => "__builtin_ia32_phaddd",
     "llvm.x86.ssse3.phadd.d.128" => "__builtin_ia32_phaddd128",
+    "llvm.x86.ssse3.phadd.sw" => "__builtin_ia32_phaddsw",
     "llvm.x86.ssse3.phadd.sw.128" => "__builtin_ia32_phaddsw128",
+    "llvm.x86.ssse3.phadd.w" => "__builtin_ia32_phaddw",
     "llvm.x86.ssse3.phadd.w.128" => "__builtin_ia32_phaddw128",
+    "llvm.x86.ssse3.phsub.d" => "__builtin_ia32_phsubd",
     "llvm.x86.ssse3.phsub.d.128" => "__builtin_ia32_phsubd128",
+    "llvm.x86.ssse3.phsub.sw" => "__builtin_ia32_phsubsw",
     "llvm.x86.ssse3.phsub.sw.128" => "__builtin_ia32_phsubsw128",
+    "llvm.x86.ssse3.phsub.w" => "__builtin_ia32_phsubw",
     "llvm.x86.ssse3.phsub.w.128" => "__builtin_ia32_phsubw128",
+    "llvm.x86.ssse3.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw",
     "llvm.x86.ssse3.pmadd.ub.sw.128" => "__builtin_ia32_pmaddubsw128",
+    "llvm.x86.ssse3.pmul.hr.sw" => "__builtin_ia32_pmulhrsw",
     "llvm.x86.ssse3.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128",
+    "llvm.x86.ssse3.pshuf.b" => "__builtin_ia32_pshufb",
     "llvm.x86.ssse3.pshuf.b.128" => "__builtin_ia32_pshufb128",
+    "llvm.x86.ssse3.psign.b" => "__builtin_ia32_psignb",
     "llvm.x86.ssse3.psign.b.128" => "__builtin_ia32_psignb128",
+    "llvm.x86.ssse3.psign.d" => "__builtin_ia32_psignd",
     "llvm.x86.ssse3.psign.d.128" => "__builtin_ia32_psignd128",
+    "llvm.x86.ssse3.psign.w" => "__builtin_ia32_psignw",
     "llvm.x86.ssse3.psign.w.128" => "__builtin_ia32_psignw128",
-    "llvm.x86.subborrow.u32" => "__builtin_ia32_subborrow_u32",
-    "llvm.x86.subborrow.u64" => "__builtin_ia32_subborrow_u64",
+    "llvm.x86.sttilecfg" => "__builtin_ia32_tile_storeconfig",
+    "llvm.x86.stui" => "__builtin_ia32_stui",
     "llvm.x86.tbm.bextri.u32" => "__builtin_ia32_bextri_u32",
     "llvm.x86.tbm.bextri.u64" => "__builtin_ia32_bextri_u64",
-    "llvm.x86.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps",
-    "llvm.x86.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256",
+    "llvm.x86.tdpbf16ps" => "__builtin_ia32_tdpbf16ps",
+    "llvm.x86.tdpbf16ps.internal" => "__builtin_ia32_tdpbf16ps_internal",
+    "llvm.x86.tdpbssd" => "__builtin_ia32_tdpbssd",
+    "llvm.x86.tdpbssd.internal" => "__builtin_ia32_tdpbssd_internal",
+    "llvm.x86.tdpbsud" => "__builtin_ia32_tdpbsud",
+    "llvm.x86.tdpbsud.internal" => "__builtin_ia32_tdpbsud_internal",
+    "llvm.x86.tdpbusd" => "__builtin_ia32_tdpbusd",
+    "llvm.x86.tdpbusd.internal" => "__builtin_ia32_tdpbusd_internal",
+    "llvm.x86.tdpbuud" => "__builtin_ia32_tdpbuud",
+    "llvm.x86.tdpbuud.internal" => "__builtin_ia32_tdpbuud_internal",
+    "llvm.x86.testui" => "__builtin_ia32_testui",
+    "llvm.x86.tileloadd64" => "__builtin_ia32_tileloadd64",
+    "llvm.x86.tileloadd64.internal" => "__builtin_ia32_tileloadd64_internal",
+    "llvm.x86.tileloaddt164" => "__builtin_ia32_tileloaddt164",
+    "llvm.x86.tileloaddt164.internal" => "__builtin_ia32_tileloaddt164_internal",
+    "llvm.x86.tilerelease" => "__builtin_ia32_tilerelease",
+    "llvm.x86.tilestored64" => "__builtin_ia32_tilestored64",
+    "llvm.x86.tilestored64.internal" => "__builtin_ia32_tilestored64_internal",
+    "llvm.x86.tilezero" => "__builtin_ia32_tilezero",
+    "llvm.x86.tilezero.internal" => "__builtin_ia32_tilezero_internal",
+    "llvm.x86.tpause" => "__builtin_ia32_tpause",
+    "llvm.x86.umonitor" => "__builtin_ia32_umonitor",
+    "llvm.x86.umwait" => "__builtin_ia32_umwait",
     "llvm.x86.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph",
     "llvm.x86.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256",
+    "llvm.x86.vgf2p8affineinvqb.128" => "__builtin_ia32_vgf2p8affineinvqb_v16qi",
+    "llvm.x86.vgf2p8affineinvqb.256" => "__builtin_ia32_vgf2p8affineinvqb_v32qi",
+    "llvm.x86.vgf2p8affineinvqb.512" => "__builtin_ia32_vgf2p8affineinvqb_v64qi",
+    "llvm.x86.vgf2p8affineqb.128" => "__builtin_ia32_vgf2p8affineqb_v16qi",
+    "llvm.x86.vgf2p8affineqb.256" => "__builtin_ia32_vgf2p8affineqb_v32qi",
+    "llvm.x86.vgf2p8affineqb.512" => "__builtin_ia32_vgf2p8affineqb_v64qi",
+    "llvm.x86.vgf2p8mulb.128" => "__builtin_ia32_vgf2p8mulb_v16qi",
+    "llvm.x86.vgf2p8mulb.256" => "__builtin_ia32_vgf2p8mulb_v32qi",
+    "llvm.x86.vgf2p8mulb.512" => "__builtin_ia32_vgf2p8mulb_v64qi",
+    "llvm.x86.wbinvd" => "__builtin_ia32_wbinvd",
+    "llvm.x86.wbnoinvd" => "__builtin_ia32_wbnoinvd",
     "llvm.x86.wrfsbase.32" => "__builtin_ia32_wrfsbase32",
     "llvm.x86.wrfsbase.64" => "__builtin_ia32_wrfsbase64",
     "llvm.x86.wrgsbase.32" => "__builtin_ia32_wrgsbase32",
     "llvm.x86.wrgsbase.64" => "__builtin_ia32_wrgsbase64",
+    "llvm.x86.wrpkru" => "__builtin_ia32_wrpkru",
+    "llvm.x86.wrssd" => "__builtin_ia32_wrssd",
+    "llvm.x86.wrssq" => "__builtin_ia32_wrssq",
+    "llvm.x86.wrussd" => "__builtin_ia32_wrussd",
+    "llvm.x86.wrussq" => "__builtin_ia32_wrussq",
     "llvm.x86.xabort" => "__builtin_ia32_xabort",
     "llvm.x86.xbegin" => "__builtin_ia32_xbegin",
     "llvm.x86.xend" => "__builtin_ia32_xend",
@@ -2897,16 +2372,6 @@ match name {
     "llvm.x86.xop.vfrcz.ps.256" => "__builtin_ia32_vfrczps256",
     "llvm.x86.xop.vfrcz.sd" => "__builtin_ia32_vfrczsd",
     "llvm.x86.xop.vfrcz.ss" => "__builtin_ia32_vfrczss",
-    "llvm.x86.xop.vpcmov" => "__builtin_ia32_vpcmov",
-    "llvm.x86.xop.vpcmov.256" => "__builtin_ia32_vpcmov_256",
-    "llvm.x86.xop.vpcomb" => "__builtin_ia32_vpcomb",
-    "llvm.x86.xop.vpcomd" => "__builtin_ia32_vpcomd",
-    "llvm.x86.xop.vpcomq" => "__builtin_ia32_vpcomq",
-    "llvm.x86.xop.vpcomub" => "__builtin_ia32_vpcomub",
-    "llvm.x86.xop.vpcomud" => "__builtin_ia32_vpcomud",
-    "llvm.x86.xop.vpcomuq" => "__builtin_ia32_vpcomuq",
-    "llvm.x86.xop.vpcomuw" => "__builtin_ia32_vpcomuw",
-    "llvm.x86.xop.vpcomw" => "__builtin_ia32_vpcomw",
     "llvm.x86.xop.vpermil2pd" => "__builtin_ia32_vpermil2pd",
     "llvm.x86.xop.vpermil2pd.256" => "__builtin_ia32_vpermil2pd256",
     "llvm.x86.xop.vpermil2ps" => "__builtin_ia32_vpermil2ps",
@@ -2939,14 +2404,6 @@ match name {
     "llvm.x86.xop.vpmadcsswd" => "__builtin_ia32_vpmadcsswd",
     "llvm.x86.xop.vpmadcswd" => "__builtin_ia32_vpmadcswd",
     "llvm.x86.xop.vpperm" => "__builtin_ia32_vpperm",
-    "llvm.x86.xop.vprotb" => "__builtin_ia32_vprotb",
-    "llvm.x86.xop.vprotbi" => "__builtin_ia32_vprotbi",
-    "llvm.x86.xop.vprotd" => "__builtin_ia32_vprotd",
-    "llvm.x86.xop.vprotdi" => "__builtin_ia32_vprotdi",
-    "llvm.x86.xop.vprotq" => "__builtin_ia32_vprotq",
-    "llvm.x86.xop.vprotqi" => "__builtin_ia32_vprotqi",
-    "llvm.x86.xop.vprotw" => "__builtin_ia32_vprotw",
-    "llvm.x86.xop.vprotwi" => "__builtin_ia32_vprotwi",
     "llvm.x86.xop.vpshab" => "__builtin_ia32_vpshab",
     "llvm.x86.xop.vpshad" => "__builtin_ia32_vpshad",
     "llvm.x86.xop.vpshaq" => "__builtin_ia32_vpshaq",
@@ -2955,6 +2412,8 @@ match name {
     "llvm.x86.xop.vpshld" => "__builtin_ia32_vpshld",
     "llvm.x86.xop.vpshlq" => "__builtin_ia32_vpshlq",
     "llvm.x86.xop.vpshlw" => "__builtin_ia32_vpshlw",
+    "llvm.x86.xresldtrk" => "__builtin_ia32_xresldtrk",
+    "llvm.x86.xsusldtrk" => "__builtin_ia32_xsusldtrk",
     "llvm.x86.xtest" => "__builtin_ia32_xtest",
     // xcore
     "llvm.xcore.bitrev" => "__builtin_bitrev",
diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index 587db3679ef4..069611e60eb0 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -5,11 +5,6 @@ import subprocess
 from os import walk
 
 
-LLVM_PATH = llvm_path = os.path.join(
-    os.path.dirname(os.path.abspath(__file__)),
-    "llvm-project",
-)
-
 def run_command(command, cwd=None):
     p = subprocess.Popen(command, cwd=cwd)
     if p.wait() != 0:
@@ -17,21 +12,27 @@ def run_command(command, cwd=None):
         sys.exit(1)
 
 
-def clone_llvm_repository():
-    if os.path.exists(LLVM_PATH):
+def clone_repository(repo_name, path, repo_url, sub_path=None):
+    if os.path.exists(path):
         while True:
-            choice = input("There is already a llvm-project folder, do you want to update it? [y/N]")
+            choice = input("There is already a `{}` folder, do you want to update it? [y/N]".format(repo_name))
             if choice == "" or choice.lower() == "n":
                 print("Skipping repository update.")
                 return
             elif choice.lower() == "y":
                 print("Updating repository...")
-                run_command(["git", "pull", "origin"], cwd="llvm-project")
+                run_command(["git", "pull", "origin"], cwd=path)
                 return
             else:
                 print("Didn't understand answer...")
-    print("Cloning LLVM repository...")
-    run_command(["git", "clone", "https://github.com/llvm/llvm-project", "--depth", "1", LLVM_PATH])
+    print("Cloning {} repository...".format(repo_name))
+    if sub_path is None:
+        run_command(["git", "clone", repo_url, "--depth", "1", path])
+    else:
+        run_command(["git", "clone", repo_url, "--filter=tree:0", "--no-checkout", path])
+        run_command(["git", "sparse-checkout", "init"], cwd=path)
+        run_command(["git", "sparse-checkout", "set", "add", sub_path], cwd=path)
+        run_command(["git", "checkout"], cwd=path)
 
 
 def extract_instrinsics(intrinsics, file):
@@ -76,9 +77,9 @@ def extract_instrinsics(intrinsics, file):
     print("Done!")
 
 
-def update_intrinsics():
+def update_intrinsics(llvm_path):
     files = []
-    intrinsics_path = os.path.join(LLVM_PATH, "llvm/include/llvm/IR")
+    intrinsics_path = os.path.join(llvm_path, "llvm/include/llvm/IR")
     for (dirpath, dirnames, filenames) in walk(intrinsics_path):
         files.extend([os.path.join(intrinsics_path, f) for f in filenames if f.endswith(".td")])
 
@@ -110,9 +111,18 @@ def update_intrinsics():
 
 
 def main():
+    llvm_path = os.path.join(
+        os.path.dirname(os.path.abspath(__file__)),
+        "llvm-project",
+    )
+
     # First, we clone the LLVM repository if it's not already here.
-    clone_llvm_repository()
-    update_intrinsics()
+    clone_repository(
+        "llvm-project",
+        llvm_path,
+        "https://github.com/llvm/llvm-project",
+        sub_path="llvm/include/llvm/IR")
+    update_intrinsics(llvm_path)
 
 
 if __name__ == "__main__":

From 19d8617330a481dc2a0cea149f5d75c7ed3d3203 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 3 May 2022 21:24:14 +0200
Subject: [PATCH 076/997] Generate intrinsics translations from llvmint as well

---
 .gitignore                   |  1 +
 tools/generate_intrinsics.py | 97 +++++++++++++++++++++++++++++++++---
 2 files changed, 91 insertions(+), 7 deletions(-)

diff --git a/.gitignore b/.gitignore
index ba11981a5e3c..ffd36ddb7db0 100644
--- a/.gitignore
+++ b/.gitignore
@@ -21,3 +21,4 @@ test-backend
 gcc_path
 benchmarks
 tools/llvm-project
+tools/llvmint
diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index 069611e60eb0..88b8b54b6baa 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -1,3 +1,4 @@
+import json
 import os
 import re
 import sys
@@ -35,6 +36,10 @@ def clone_repository(repo_name, path, repo_url, sub_path=None):
         run_command(["git", "checkout"], cwd=path)
 
 
+def append_intrinsic(array, intrinsic_name, translation):
+    array.append((intrinsic_name, translation))
+
+
 def extract_instrinsics(intrinsics, file):
     print("Extracting intrinsics from `{}`...".format(file))
     with open(file, "r", encoding="utf8") as f:
@@ -70,25 +75,85 @@ def extract_instrinsics(intrinsics, file):
                 if current_arch not in intrinsics:
                     intrinsics[current_arch] = []
                 for entry in entries:
-                    intrinsics[current_arch].append('"{}" => "{}",'.format(intrinsic, entry))
+                    append_intrinsic(intrinsics[current_arch], intrinsic, entry)
             continue
         pos += 1
         continue
     print("Done!")
 
 
-def update_intrinsics(llvm_path):
+def extract_instrinsics_from_llvm(llvm_path, intrinsics):
     files = []
     intrinsics_path = os.path.join(llvm_path, "llvm/include/llvm/IR")
     for (dirpath, dirnames, filenames) in walk(intrinsics_path):
         files.extend([os.path.join(intrinsics_path, f) for f in filenames if f.endswith(".td")])
 
-    intrinsics = {}
     for file in files:
         extract_instrinsics(intrinsics, file)
 
+
+def append_translation(json_data, p, array):
+    it = json_data["index"][p]
+    content = it["docs"].split('`')
+    if len(content) != 5:
+        return
+    append_intrinsic(array, content[1], content[3])
+
+
+def extract_instrinsics_from_llvmint(llvmint, intrinsics):
+    archs = [
+        "AMDGPU",
+        "aarch64",
+        "arm",
+        "cuda",
+        "hexagon",
+        "mips",
+        "nvvm",
+        "ppc",
+        "ptx",
+        "x86",
+        "xcore",
+    ]
+
+    json_file = os.path.join(llvmint, "target/doc/llvmint.json")
+    if not os.path.exists(json_file):
+        # We need to regenerate the documentation!
+        run_command(
+            ["cargo", "rustdoc", "--", "-Zunstable-options", "--output-format", "json"],
+            cwd=llvmint,
+        )
+    with open(json_file, "r", encoding="utf8") as f:
+        json_data = json.loads(f.read())
+    for p in json_data["paths"]:
+        it = json_data["paths"][p]
+        if it["crate_id"] != 0:
+            # This is from an external crate.
+            continue
+        if it["kind"] != "function":
+            # We're only looking for functions.
+            continue
+        # if len(it["path"]) == 2:
+        #   # This is a "general" intrinsic, not bound to a specific arch.
+        #   append_translation(json_data, p, general)
+        #   continue
+        if len(it["path"]) != 3 or it["path"][1] not in archs:
+            continue
+        arch = it["path"][1]
+        if arch not in intrinsics:
+            intrinsics[arch] = []
+        append_translation(json_data, p, intrinsics[arch])
+
+
+def update_intrinsics(llvm_path, llvmint):
+    intrinsics = {}
+    all_intrinsics = {}
+
+    extract_instrinsics_from_llvm(llvm_path, intrinsics)
+    extract_instrinsics_from_llvmint(llvmint, intrinsics)
+
     archs = [arch for arch in intrinsics]
     archs.sort()
+
     output_file = os.path.join(
         os.path.dirname(os.path.abspath(__file__)),
         "../src/intrinsic/archs.rs",
@@ -103,8 +168,16 @@ def update_intrinsics(llvm_path):
                 continue
             intrinsics[arch].sort()
             out.write('    // {}\n'.format(arch))
-            out.write('\n'.join(['    {}'.format(x) for x in intrinsics[arch]]))
-            out.write('\n')
+            for entry in intrinsics[arch]:
+                if entry[0] in all_intrinsics:
+                    if all_intrinsics[entry[0]] == entry[1]:
+                        # This is a "full" duplicate, both the LLVM instruction and the GCC
+                        # translation are the same.
+                        continue
+                    out.write('    // [DUPLICATE]: "{}" => "{}",\n'.format(entry[0], entry[1]))
+                else:
+                    out.write('    "{}" => "{}",\n'.format(entry[0], entry[1]))
+                    all_intrinsics[entry[0]] = entry[1]
         out.write('    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),\n')
         out.write("}\n")
     print("Done!")
@@ -115,14 +188,24 @@ def main():
         os.path.dirname(os.path.abspath(__file__)),
         "llvm-project",
     )
+    llvmint_path = os.path.join(
+        os.path.dirname(os.path.abspath(__file__)),
+        "llvmint",
+    )
 
     # First, we clone the LLVM repository if it's not already here.
     clone_repository(
         "llvm-project",
         llvm_path,
         "https://github.com/llvm/llvm-project",
-        sub_path="llvm/include/llvm/IR")
-    update_intrinsics(llvm_path)
+        sub_path="llvm/include/llvm/IR",
+    )
+    clone_repository(
+        "llvmint",
+        llvmint_path,
+        "https://github.com/GuillaumeGomez/llvmint",
+    )
+    update_intrinsics(llvm_path, llvmint_path)
 
 
 if __name__ == "__main__":

From f402cfe561fa371483360c1559c9507667470304 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 3 May 2022 21:24:22 +0200
Subject: [PATCH 077/997] Update intrinsics

---
 src/intrinsic/archs.rs | 1873 +++++++++++++++++++++++++++++++++++++++-
 1 file changed, 1862 insertions(+), 11 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 026ed7c6c7ca..427ca77e9d0b 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -1,6 +1,35 @@
 // File generated by `rustc_codegen_gcc/tools/generate_intrinsics.py`
 // DO NOT EDIT IT!
 match name {
+    // AMDGPU
+    "llvm.AMDGPU.div.fixup.f32" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fixup.f64" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fixup.v2f64" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fixup.v4f32" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fmas.f32" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.div.fmas.f64" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.div.fmas.v2f64" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.div.fmas.v4f32" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.ldexp.f32" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.ldexp.f64" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.ldexp.v2f64" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.ldexp.v4f32" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.rcp.f32" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rcp.f64" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rcp.v2f64" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rcp.v4f32" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rsq.clamped.f32" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.clamped.f64" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.clamped.v2f64" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.clamped.v4f32" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.f32" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.rsq.f64" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.rsq.v2f64" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.rsq.v4f32" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.trig.preop.f32" => "__builtin_amdgpu_trig_preop",
+    "llvm.AMDGPU.trig.preop.f64" => "__builtin_amdgpu_trig_preop",
+    "llvm.AMDGPU.trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
+    "llvm.AMDGPU.trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
     // aarch64
     "llvm.aarch64.dmb" => "__builtin_arm_dmb",
     "llvm.aarch64.dsb" => "__builtin_arm_dsb",
@@ -91,8 +120,8 @@ match name {
     "llvm.amdgcn.s.setprio" => "__builtin_amdgcn_s_setprio",
     "llvm.amdgcn.s.setreg" => "__builtin_amdgcn_s_setreg",
     "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_decperflevel",
-    "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_incperflevel",
-    "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_sleep",
+    // [DUPLICATE]: "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_incperflevel",
+    // [DUPLICATE]: "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_sleep",
     "llvm.amdgcn.s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
     "llvm.amdgcn.sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
     "llvm.amdgcn.sad.u16" => "__builtin_amdgcn_sad_u16",
@@ -123,6 +152,8 @@ match name {
     "llvm.arm.ldcl" => "__builtin_arm_ldcl",
     "llvm.arm.mcr" => "__builtin_arm_mcr",
     "llvm.arm.mcr2" => "__builtin_arm_mcr2",
+    "llvm.arm.mcrr" => "__builtin_arm_mcrr",
+    "llvm.arm.mcrr2" => "__builtin_arm_mcrr2",
     "llvm.arm.mrc" => "__builtin_arm_mrc",
     "llvm.arm.mrc2" => "__builtin_arm_mrc2",
     "llvm.arm.qadd" => "__builtin_arm_qadd",
@@ -179,6 +210,7 @@ match name {
     "llvm.arm.stcl" => "__builtin_arm_stcl",
     "llvm.arm.sxtab16" => "__builtin_arm_sxtab16",
     "llvm.arm.sxtb16" => "__builtin_arm_sxtb16",
+    "llvm.arm.thread.pointer" => "__builtin_thread_pointer",
     "llvm.arm.uadd16" => "__builtin_arm_uadd16",
     "llvm.arm.uadd8" => "__builtin_arm_uadd8",
     "llvm.arm.uasx" => "__builtin_arm_uasx",
@@ -214,6 +246,862 @@ match name {
     "llvm.bpf.preserve.field.info" => "__builtin_bpf_preserve_field_info",
     "llvm.bpf.preserve.type.info" => "__builtin_bpf_preserve_type_info",
     "llvm.bpf.pseudo" => "__builtin_bpf_pseudo",
+    // cuda
+    "llvm.cuda.syncthreads" => "__syncthreads",
+    // hexagon
+    "llvm.hexagon.A2.abs" => "__builtin_HEXAGON_A2_abs",
+    "llvm.hexagon.A2.absp" => "__builtin_HEXAGON_A2_absp",
+    "llvm.hexagon.A2.abssat" => "__builtin_HEXAGON_A2_abssat",
+    "llvm.hexagon.A2.add" => "__builtin_HEXAGON_A2_add",
+    "llvm.hexagon.A2.addh.h16.hh" => "__builtin_HEXAGON_A2_addh_h16_hh",
+    "llvm.hexagon.A2.addh.h16.hl" => "__builtin_HEXAGON_A2_addh_h16_hl",
+    "llvm.hexagon.A2.addh.h16.lh" => "__builtin_HEXAGON_A2_addh_h16_lh",
+    "llvm.hexagon.A2.addh.h16.ll" => "__builtin_HEXAGON_A2_addh_h16_ll",
+    "llvm.hexagon.A2.addh.h16.sat.hh" => "__builtin_HEXAGON_A2_addh_h16_sat_hh",
+    "llvm.hexagon.A2.addh.h16.sat.hl" => "__builtin_HEXAGON_A2_addh_h16_sat_hl",
+    "llvm.hexagon.A2.addh.h16.sat.lh" => "__builtin_HEXAGON_A2_addh_h16_sat_lh",
+    "llvm.hexagon.A2.addh.h16.sat.ll" => "__builtin_HEXAGON_A2_addh_h16_sat_ll",
+    "llvm.hexagon.A2.addh.l16.hl" => "__builtin_HEXAGON_A2_addh_l16_hl",
+    "llvm.hexagon.A2.addh.l16.ll" => "__builtin_HEXAGON_A2_addh_l16_ll",
+    "llvm.hexagon.A2.addh.l16.sat.hl" => "__builtin_HEXAGON_A2_addh_l16_sat_hl",
+    "llvm.hexagon.A2.addh.l16.sat.ll" => "__builtin_HEXAGON_A2_addh_l16_sat_ll",
+    "llvm.hexagon.A2.addi" => "__builtin_HEXAGON_A2_addi",
+    "llvm.hexagon.A2.addp" => "__builtin_HEXAGON_A2_addp",
+    "llvm.hexagon.A2.addpsat" => "__builtin_HEXAGON_A2_addpsat",
+    "llvm.hexagon.A2.addsat" => "__builtin_HEXAGON_A2_addsat",
+    "llvm.hexagon.A2.addsp" => "__builtin_HEXAGON_A2_addsp",
+    "llvm.hexagon.A2.and" => "__builtin_HEXAGON_A2_and",
+    "llvm.hexagon.A2.andir" => "__builtin_HEXAGON_A2_andir",
+    "llvm.hexagon.A2.andp" => "__builtin_HEXAGON_A2_andp",
+    "llvm.hexagon.A2.aslh" => "__builtin_HEXAGON_A2_aslh",
+    "llvm.hexagon.A2.asrh" => "__builtin_HEXAGON_A2_asrh",
+    "llvm.hexagon.A2.combine.hh" => "__builtin_HEXAGON_A2_combine_hh",
+    "llvm.hexagon.A2.combine.hl" => "__builtin_HEXAGON_A2_combine_hl",
+    "llvm.hexagon.A2.combine.lh" => "__builtin_HEXAGON_A2_combine_lh",
+    "llvm.hexagon.A2.combine.ll" => "__builtin_HEXAGON_A2_combine_ll",
+    "llvm.hexagon.A2.combineii" => "__builtin_HEXAGON_A2_combineii",
+    "llvm.hexagon.A2.combinew" => "__builtin_HEXAGON_A2_combinew",
+    "llvm.hexagon.A2.max" => "__builtin_HEXAGON_A2_max",
+    "llvm.hexagon.A2.maxp" => "__builtin_HEXAGON_A2_maxp",
+    "llvm.hexagon.A2.maxu" => "__builtin_HEXAGON_A2_maxu",
+    "llvm.hexagon.A2.maxup" => "__builtin_HEXAGON_A2_maxup",
+    "llvm.hexagon.A2.min" => "__builtin_HEXAGON_A2_min",
+    "llvm.hexagon.A2.minp" => "__builtin_HEXAGON_A2_minp",
+    "llvm.hexagon.A2.minu" => "__builtin_HEXAGON_A2_minu",
+    "llvm.hexagon.A2.minup" => "__builtin_HEXAGON_A2_minup",
+    "llvm.hexagon.A2.neg" => "__builtin_HEXAGON_A2_neg",
+    "llvm.hexagon.A2.negp" => "__builtin_HEXAGON_A2_negp",
+    "llvm.hexagon.A2.negsat" => "__builtin_HEXAGON_A2_negsat",
+    "llvm.hexagon.A2.not" => "__builtin_HEXAGON_A2_not",
+    "llvm.hexagon.A2.notp" => "__builtin_HEXAGON_A2_notp",
+    "llvm.hexagon.A2.or" => "__builtin_HEXAGON_A2_or",
+    "llvm.hexagon.A2.orir" => "__builtin_HEXAGON_A2_orir",
+    "llvm.hexagon.A2.orp" => "__builtin_HEXAGON_A2_orp",
+    "llvm.hexagon.A2.roundsat" => "__builtin_HEXAGON_A2_roundsat",
+    "llvm.hexagon.A2.sat" => "__builtin_HEXAGON_A2_sat",
+    "llvm.hexagon.A2.satb" => "__builtin_HEXAGON_A2_satb",
+    "llvm.hexagon.A2.sath" => "__builtin_HEXAGON_A2_sath",
+    "llvm.hexagon.A2.satub" => "__builtin_HEXAGON_A2_satub",
+    "llvm.hexagon.A2.satuh" => "__builtin_HEXAGON_A2_satuh",
+    "llvm.hexagon.A2.sub" => "__builtin_HEXAGON_A2_sub",
+    "llvm.hexagon.A2.subh.h16.hh" => "__builtin_HEXAGON_A2_subh_h16_hh",
+    "llvm.hexagon.A2.subh.h16.hl" => "__builtin_HEXAGON_A2_subh_h16_hl",
+    "llvm.hexagon.A2.subh.h16.lh" => "__builtin_HEXAGON_A2_subh_h16_lh",
+    "llvm.hexagon.A2.subh.h16.ll" => "__builtin_HEXAGON_A2_subh_h16_ll",
+    "llvm.hexagon.A2.subh.h16.sat.hh" => "__builtin_HEXAGON_A2_subh_h16_sat_hh",
+    "llvm.hexagon.A2.subh.h16.sat.hl" => "__builtin_HEXAGON_A2_subh_h16_sat_hl",
+    "llvm.hexagon.A2.subh.h16.sat.lh" => "__builtin_HEXAGON_A2_subh_h16_sat_lh",
+    "llvm.hexagon.A2.subh.h16.sat.ll" => "__builtin_HEXAGON_A2_subh_h16_sat_ll",
+    "llvm.hexagon.A2.subh.l16.hl" => "__builtin_HEXAGON_A2_subh_l16_hl",
+    "llvm.hexagon.A2.subh.l16.ll" => "__builtin_HEXAGON_A2_subh_l16_ll",
+    "llvm.hexagon.A2.subh.l16.sat.hl" => "__builtin_HEXAGON_A2_subh_l16_sat_hl",
+    "llvm.hexagon.A2.subh.l16.sat.ll" => "__builtin_HEXAGON_A2_subh_l16_sat_ll",
+    "llvm.hexagon.A2.subp" => "__builtin_HEXAGON_A2_subp",
+    "llvm.hexagon.A2.subri" => "__builtin_HEXAGON_A2_subri",
+    "llvm.hexagon.A2.subsat" => "__builtin_HEXAGON_A2_subsat",
+    "llvm.hexagon.A2.svaddh" => "__builtin_HEXAGON_A2_svaddh",
+    "llvm.hexagon.A2.svaddhs" => "__builtin_HEXAGON_A2_svaddhs",
+    "llvm.hexagon.A2.svadduhs" => "__builtin_HEXAGON_A2_svadduhs",
+    "llvm.hexagon.A2.svavgh" => "__builtin_HEXAGON_A2_svavgh",
+    "llvm.hexagon.A2.svavghs" => "__builtin_HEXAGON_A2_svavghs",
+    "llvm.hexagon.A2.svnavgh" => "__builtin_HEXAGON_A2_svnavgh",
+    "llvm.hexagon.A2.svsubh" => "__builtin_HEXAGON_A2_svsubh",
+    "llvm.hexagon.A2.svsubhs" => "__builtin_HEXAGON_A2_svsubhs",
+    "llvm.hexagon.A2.svsubuhs" => "__builtin_HEXAGON_A2_svsubuhs",
+    "llvm.hexagon.A2.swiz" => "__builtin_HEXAGON_A2_swiz",
+    "llvm.hexagon.A2.sxtb" => "__builtin_HEXAGON_A2_sxtb",
+    "llvm.hexagon.A2.sxth" => "__builtin_HEXAGON_A2_sxth",
+    "llvm.hexagon.A2.sxtw" => "__builtin_HEXAGON_A2_sxtw",
+    "llvm.hexagon.A2.tfr" => "__builtin_HEXAGON_A2_tfr",
+    "llvm.hexagon.A2.tfrih" => "__builtin_HEXAGON_A2_tfrih",
+    "llvm.hexagon.A2.tfril" => "__builtin_HEXAGON_A2_tfril",
+    "llvm.hexagon.A2.tfrp" => "__builtin_HEXAGON_A2_tfrp",
+    "llvm.hexagon.A2.tfrpi" => "__builtin_HEXAGON_A2_tfrpi",
+    "llvm.hexagon.A2.tfrsi" => "__builtin_HEXAGON_A2_tfrsi",
+    "llvm.hexagon.A2.vabsh" => "__builtin_HEXAGON_A2_vabsh",
+    "llvm.hexagon.A2.vabshsat" => "__builtin_HEXAGON_A2_vabshsat",
+    "llvm.hexagon.A2.vabsw" => "__builtin_HEXAGON_A2_vabsw",
+    "llvm.hexagon.A2.vabswsat" => "__builtin_HEXAGON_A2_vabswsat",
+    "llvm.hexagon.A2.vaddb.map" => "__builtin_HEXAGON_A2_vaddb_map",
+    "llvm.hexagon.A2.vaddh" => "__builtin_HEXAGON_A2_vaddh",
+    "llvm.hexagon.A2.vaddhs" => "__builtin_HEXAGON_A2_vaddhs",
+    "llvm.hexagon.A2.vaddub" => "__builtin_HEXAGON_A2_vaddub",
+    "llvm.hexagon.A2.vaddubs" => "__builtin_HEXAGON_A2_vaddubs",
+    "llvm.hexagon.A2.vadduhs" => "__builtin_HEXAGON_A2_vadduhs",
+    "llvm.hexagon.A2.vaddw" => "__builtin_HEXAGON_A2_vaddw",
+    "llvm.hexagon.A2.vaddws" => "__builtin_HEXAGON_A2_vaddws",
+    "llvm.hexagon.A2.vavgh" => "__builtin_HEXAGON_A2_vavgh",
+    "llvm.hexagon.A2.vavghcr" => "__builtin_HEXAGON_A2_vavghcr",
+    "llvm.hexagon.A2.vavghr" => "__builtin_HEXAGON_A2_vavghr",
+    "llvm.hexagon.A2.vavgub" => "__builtin_HEXAGON_A2_vavgub",
+    "llvm.hexagon.A2.vavgubr" => "__builtin_HEXAGON_A2_vavgubr",
+    "llvm.hexagon.A2.vavguh" => "__builtin_HEXAGON_A2_vavguh",
+    "llvm.hexagon.A2.vavguhr" => "__builtin_HEXAGON_A2_vavguhr",
+    "llvm.hexagon.A2.vavguw" => "__builtin_HEXAGON_A2_vavguw",
+    "llvm.hexagon.A2.vavguwr" => "__builtin_HEXAGON_A2_vavguwr",
+    "llvm.hexagon.A2.vavgw" => "__builtin_HEXAGON_A2_vavgw",
+    "llvm.hexagon.A2.vavgwcr" => "__builtin_HEXAGON_A2_vavgwcr",
+    "llvm.hexagon.A2.vavgwr" => "__builtin_HEXAGON_A2_vavgwr",
+    "llvm.hexagon.A2.vcmpbeq" => "__builtin_HEXAGON_A2_vcmpbeq",
+    "llvm.hexagon.A2.vcmpbgtu" => "__builtin_HEXAGON_A2_vcmpbgtu",
+    "llvm.hexagon.A2.vcmpheq" => "__builtin_HEXAGON_A2_vcmpheq",
+    "llvm.hexagon.A2.vcmphgt" => "__builtin_HEXAGON_A2_vcmphgt",
+    "llvm.hexagon.A2.vcmphgtu" => "__builtin_HEXAGON_A2_vcmphgtu",
+    "llvm.hexagon.A2.vcmpweq" => "__builtin_HEXAGON_A2_vcmpweq",
+    "llvm.hexagon.A2.vcmpwgt" => "__builtin_HEXAGON_A2_vcmpwgt",
+    "llvm.hexagon.A2.vcmpwgtu" => "__builtin_HEXAGON_A2_vcmpwgtu",
+    "llvm.hexagon.A2.vconj" => "__builtin_HEXAGON_A2_vconj",
+    "llvm.hexagon.A2.vmaxb" => "__builtin_HEXAGON_A2_vmaxb",
+    "llvm.hexagon.A2.vmaxh" => "__builtin_HEXAGON_A2_vmaxh",
+    "llvm.hexagon.A2.vmaxub" => "__builtin_HEXAGON_A2_vmaxub",
+    "llvm.hexagon.A2.vmaxuh" => "__builtin_HEXAGON_A2_vmaxuh",
+    "llvm.hexagon.A2.vmaxuw" => "__builtin_HEXAGON_A2_vmaxuw",
+    "llvm.hexagon.A2.vmaxw" => "__builtin_HEXAGON_A2_vmaxw",
+    "llvm.hexagon.A2.vminb" => "__builtin_HEXAGON_A2_vminb",
+    "llvm.hexagon.A2.vminh" => "__builtin_HEXAGON_A2_vminh",
+    "llvm.hexagon.A2.vminub" => "__builtin_HEXAGON_A2_vminub",
+    "llvm.hexagon.A2.vminuh" => "__builtin_HEXAGON_A2_vminuh",
+    "llvm.hexagon.A2.vminuw" => "__builtin_HEXAGON_A2_vminuw",
+    "llvm.hexagon.A2.vminw" => "__builtin_HEXAGON_A2_vminw",
+    "llvm.hexagon.A2.vnavgh" => "__builtin_HEXAGON_A2_vnavgh",
+    "llvm.hexagon.A2.vnavghcr" => "__builtin_HEXAGON_A2_vnavghcr",
+    "llvm.hexagon.A2.vnavghr" => "__builtin_HEXAGON_A2_vnavghr",
+    "llvm.hexagon.A2.vnavgw" => "__builtin_HEXAGON_A2_vnavgw",
+    "llvm.hexagon.A2.vnavgwcr" => "__builtin_HEXAGON_A2_vnavgwcr",
+    "llvm.hexagon.A2.vnavgwr" => "__builtin_HEXAGON_A2_vnavgwr",
+    "llvm.hexagon.A2.vraddub" => "__builtin_HEXAGON_A2_vraddub",
+    "llvm.hexagon.A2.vraddub.acc" => "__builtin_HEXAGON_A2_vraddub_acc",
+    "llvm.hexagon.A2.vrsadub" => "__builtin_HEXAGON_A2_vrsadub",
+    "llvm.hexagon.A2.vrsadub.acc" => "__builtin_HEXAGON_A2_vrsadub_acc",
+    "llvm.hexagon.A2.vsubb.map" => "__builtin_HEXAGON_A2_vsubb_map",
+    "llvm.hexagon.A2.vsubh" => "__builtin_HEXAGON_A2_vsubh",
+    "llvm.hexagon.A2.vsubhs" => "__builtin_HEXAGON_A2_vsubhs",
+    "llvm.hexagon.A2.vsubub" => "__builtin_HEXAGON_A2_vsubub",
+    "llvm.hexagon.A2.vsububs" => "__builtin_HEXAGON_A2_vsububs",
+    "llvm.hexagon.A2.vsubuhs" => "__builtin_HEXAGON_A2_vsubuhs",
+    "llvm.hexagon.A2.vsubw" => "__builtin_HEXAGON_A2_vsubw",
+    "llvm.hexagon.A2.vsubws" => "__builtin_HEXAGON_A2_vsubws",
+    "llvm.hexagon.A2.xor" => "__builtin_HEXAGON_A2_xor",
+    "llvm.hexagon.A2.xorp" => "__builtin_HEXAGON_A2_xorp",
+    "llvm.hexagon.A2.zxtb" => "__builtin_HEXAGON_A2_zxtb",
+    "llvm.hexagon.A2.zxth" => "__builtin_HEXAGON_A2_zxth",
+    "llvm.hexagon.A4.andn" => "__builtin_HEXAGON_A4_andn",
+    "llvm.hexagon.A4.andnp" => "__builtin_HEXAGON_A4_andnp",
+    "llvm.hexagon.A4.bitsplit" => "__builtin_HEXAGON_A4_bitsplit",
+    "llvm.hexagon.A4.bitspliti" => "__builtin_HEXAGON_A4_bitspliti",
+    "llvm.hexagon.A4.boundscheck" => "__builtin_HEXAGON_A4_boundscheck",
+    "llvm.hexagon.A4.cmpbeq" => "__builtin_HEXAGON_A4_cmpbeq",
+    "llvm.hexagon.A4.cmpbeqi" => "__builtin_HEXAGON_A4_cmpbeqi",
+    "llvm.hexagon.A4.cmpbgt" => "__builtin_HEXAGON_A4_cmpbgt",
+    "llvm.hexagon.A4.cmpbgti" => "__builtin_HEXAGON_A4_cmpbgti",
+    "llvm.hexagon.A4.cmpbgtu" => "__builtin_HEXAGON_A4_cmpbgtu",
+    "llvm.hexagon.A4.cmpbgtui" => "__builtin_HEXAGON_A4_cmpbgtui",
+    "llvm.hexagon.A4.cmpheq" => "__builtin_HEXAGON_A4_cmpheq",
+    "llvm.hexagon.A4.cmpheqi" => "__builtin_HEXAGON_A4_cmpheqi",
+    "llvm.hexagon.A4.cmphgt" => "__builtin_HEXAGON_A4_cmphgt",
+    "llvm.hexagon.A4.cmphgti" => "__builtin_HEXAGON_A4_cmphgti",
+    "llvm.hexagon.A4.cmphgtu" => "__builtin_HEXAGON_A4_cmphgtu",
+    "llvm.hexagon.A4.cmphgtui" => "__builtin_HEXAGON_A4_cmphgtui",
+    "llvm.hexagon.A4.combineir" => "__builtin_HEXAGON_A4_combineir",
+    "llvm.hexagon.A4.combineri" => "__builtin_HEXAGON_A4_combineri",
+    "llvm.hexagon.A4.cround.ri" => "__builtin_HEXAGON_A4_cround_ri",
+    "llvm.hexagon.A4.cround.rr" => "__builtin_HEXAGON_A4_cround_rr",
+    "llvm.hexagon.A4.modwrapu" => "__builtin_HEXAGON_A4_modwrapu",
+    "llvm.hexagon.A4.orn" => "__builtin_HEXAGON_A4_orn",
+    "llvm.hexagon.A4.ornp" => "__builtin_HEXAGON_A4_ornp",
+    "llvm.hexagon.A4.rcmpeq" => "__builtin_HEXAGON_A4_rcmpeq",
+    "llvm.hexagon.A4.rcmpeqi" => "__builtin_HEXAGON_A4_rcmpeqi",
+    "llvm.hexagon.A4.rcmpneq" => "__builtin_HEXAGON_A4_rcmpneq",
+    "llvm.hexagon.A4.rcmpneqi" => "__builtin_HEXAGON_A4_rcmpneqi",
+    "llvm.hexagon.A4.round.ri" => "__builtin_HEXAGON_A4_round_ri",
+    "llvm.hexagon.A4.round.ri.sat" => "__builtin_HEXAGON_A4_round_ri_sat",
+    "llvm.hexagon.A4.round.rr" => "__builtin_HEXAGON_A4_round_rr",
+    "llvm.hexagon.A4.round.rr.sat" => "__builtin_HEXAGON_A4_round_rr_sat",
+    "llvm.hexagon.A4.tlbmatch" => "__builtin_HEXAGON_A4_tlbmatch",
+    "llvm.hexagon.A4.vcmpbeq.any" => "__builtin_HEXAGON_A4_vcmpbeq_any",
+    "llvm.hexagon.A4.vcmpbeqi" => "__builtin_HEXAGON_A4_vcmpbeqi",
+    "llvm.hexagon.A4.vcmpbgt" => "__builtin_HEXAGON_A4_vcmpbgt",
+    "llvm.hexagon.A4.vcmpbgti" => "__builtin_HEXAGON_A4_vcmpbgti",
+    "llvm.hexagon.A4.vcmpbgtui" => "__builtin_HEXAGON_A4_vcmpbgtui",
+    "llvm.hexagon.A4.vcmpheqi" => "__builtin_HEXAGON_A4_vcmpheqi",
+    "llvm.hexagon.A4.vcmphgti" => "__builtin_HEXAGON_A4_vcmphgti",
+    "llvm.hexagon.A4.vcmphgtui" => "__builtin_HEXAGON_A4_vcmphgtui",
+    "llvm.hexagon.A4.vcmpweqi" => "__builtin_HEXAGON_A4_vcmpweqi",
+    "llvm.hexagon.A4.vcmpwgti" => "__builtin_HEXAGON_A4_vcmpwgti",
+    "llvm.hexagon.A4.vcmpwgtui" => "__builtin_HEXAGON_A4_vcmpwgtui",
+    "llvm.hexagon.A4.vrmaxh" => "__builtin_HEXAGON_A4_vrmaxh",
+    "llvm.hexagon.A4.vrmaxuh" => "__builtin_HEXAGON_A4_vrmaxuh",
+    "llvm.hexagon.A4.vrmaxuw" => "__builtin_HEXAGON_A4_vrmaxuw",
+    "llvm.hexagon.A4.vrmaxw" => "__builtin_HEXAGON_A4_vrmaxw",
+    "llvm.hexagon.A4.vrminh" => "__builtin_HEXAGON_A4_vrminh",
+    "llvm.hexagon.A4.vrminuh" => "__builtin_HEXAGON_A4_vrminuh",
+    "llvm.hexagon.A4.vrminuw" => "__builtin_HEXAGON_A4_vrminuw",
+    "llvm.hexagon.A4.vrminw" => "__builtin_HEXAGON_A4_vrminw",
+    "llvm.hexagon.A5.vaddhubs" => "__builtin_HEXAGON_A5_vaddhubs",
+    "llvm.hexagon.C2.all8" => "__builtin_HEXAGON_C2_all8",
+    "llvm.hexagon.C2.and" => "__builtin_HEXAGON_C2_and",
+    "llvm.hexagon.C2.andn" => "__builtin_HEXAGON_C2_andn",
+    "llvm.hexagon.C2.any8" => "__builtin_HEXAGON_C2_any8",
+    "llvm.hexagon.C2.bitsclr" => "__builtin_HEXAGON_C2_bitsclr",
+    "llvm.hexagon.C2.bitsclri" => "__builtin_HEXAGON_C2_bitsclri",
+    "llvm.hexagon.C2.bitsset" => "__builtin_HEXAGON_C2_bitsset",
+    "llvm.hexagon.C2.cmpeq" => "__builtin_HEXAGON_C2_cmpeq",
+    "llvm.hexagon.C2.cmpeqi" => "__builtin_HEXAGON_C2_cmpeqi",
+    "llvm.hexagon.C2.cmpeqp" => "__builtin_HEXAGON_C2_cmpeqp",
+    "llvm.hexagon.C2.cmpgei" => "__builtin_HEXAGON_C2_cmpgei",
+    "llvm.hexagon.C2.cmpgeui" => "__builtin_HEXAGON_C2_cmpgeui",
+    "llvm.hexagon.C2.cmpgt" => "__builtin_HEXAGON_C2_cmpgt",
+    "llvm.hexagon.C2.cmpgti" => "__builtin_HEXAGON_C2_cmpgti",
+    "llvm.hexagon.C2.cmpgtp" => "__builtin_HEXAGON_C2_cmpgtp",
+    "llvm.hexagon.C2.cmpgtu" => "__builtin_HEXAGON_C2_cmpgtu",
+    "llvm.hexagon.C2.cmpgtui" => "__builtin_HEXAGON_C2_cmpgtui",
+    "llvm.hexagon.C2.cmpgtup" => "__builtin_HEXAGON_C2_cmpgtup",
+    "llvm.hexagon.C2.cmplt" => "__builtin_HEXAGON_C2_cmplt",
+    "llvm.hexagon.C2.cmpltu" => "__builtin_HEXAGON_C2_cmpltu",
+    "llvm.hexagon.C2.mask" => "__builtin_HEXAGON_C2_mask",
+    "llvm.hexagon.C2.mux" => "__builtin_HEXAGON_C2_mux",
+    "llvm.hexagon.C2.muxii" => "__builtin_HEXAGON_C2_muxii",
+    "llvm.hexagon.C2.muxir" => "__builtin_HEXAGON_C2_muxir",
+    "llvm.hexagon.C2.muxri" => "__builtin_HEXAGON_C2_muxri",
+    "llvm.hexagon.C2.not" => "__builtin_HEXAGON_C2_not",
+    "llvm.hexagon.C2.or" => "__builtin_HEXAGON_C2_or",
+    "llvm.hexagon.C2.orn" => "__builtin_HEXAGON_C2_orn",
+    "llvm.hexagon.C2.pxfer.map" => "__builtin_HEXAGON_C2_pxfer_map",
+    "llvm.hexagon.C2.tfrpr" => "__builtin_HEXAGON_C2_tfrpr",
+    "llvm.hexagon.C2.tfrrp" => "__builtin_HEXAGON_C2_tfrrp",
+    "llvm.hexagon.C2.vitpack" => "__builtin_HEXAGON_C2_vitpack",
+    "llvm.hexagon.C2.vmux" => "__builtin_HEXAGON_C2_vmux",
+    "llvm.hexagon.C2.xor" => "__builtin_HEXAGON_C2_xor",
+    "llvm.hexagon.C4.and.and" => "__builtin_HEXAGON_C4_and_and",
+    "llvm.hexagon.C4.and.andn" => "__builtin_HEXAGON_C4_and_andn",
+    "llvm.hexagon.C4.and.or" => "__builtin_HEXAGON_C4_and_or",
+    "llvm.hexagon.C4.and.orn" => "__builtin_HEXAGON_C4_and_orn",
+    "llvm.hexagon.C4.cmplte" => "__builtin_HEXAGON_C4_cmplte",
+    "llvm.hexagon.C4.cmpltei" => "__builtin_HEXAGON_C4_cmpltei",
+    "llvm.hexagon.C4.cmplteu" => "__builtin_HEXAGON_C4_cmplteu",
+    "llvm.hexagon.C4.cmplteui" => "__builtin_HEXAGON_C4_cmplteui",
+    "llvm.hexagon.C4.cmpneq" => "__builtin_HEXAGON_C4_cmpneq",
+    "llvm.hexagon.C4.cmpneqi" => "__builtin_HEXAGON_C4_cmpneqi",
+    "llvm.hexagon.C4.fastcorner9" => "__builtin_HEXAGON_C4_fastcorner9",
+    "llvm.hexagon.C4.fastcorner9.not" => "__builtin_HEXAGON_C4_fastcorner9_not",
+    "llvm.hexagon.C4.nbitsclr" => "__builtin_HEXAGON_C4_nbitsclr",
+    "llvm.hexagon.C4.nbitsclri" => "__builtin_HEXAGON_C4_nbitsclri",
+    "llvm.hexagon.C4.nbitsset" => "__builtin_HEXAGON_C4_nbitsset",
+    "llvm.hexagon.C4.or.and" => "__builtin_HEXAGON_C4_or_and",
+    "llvm.hexagon.C4.or.andn" => "__builtin_HEXAGON_C4_or_andn",
+    "llvm.hexagon.C4.or.or" => "__builtin_HEXAGON_C4_or_or",
+    "llvm.hexagon.C4.or.orn" => "__builtin_HEXAGON_C4_or_orn",
+    "llvm.hexagon.F2.conv.d2df" => "__builtin_HEXAGON_F2_conv_d2df",
+    "llvm.hexagon.F2.conv.d2sf" => "__builtin_HEXAGON_F2_conv_d2sf",
+    "llvm.hexagon.F2.conv.df2d" => "__builtin_HEXAGON_F2_conv_df2d",
+    "llvm.hexagon.F2.conv.df2d.chop" => "__builtin_HEXAGON_F2_conv_df2d_chop",
+    "llvm.hexagon.F2.conv.df2sf" => "__builtin_HEXAGON_F2_conv_df2sf",
+    "llvm.hexagon.F2.conv.df2ud" => "__builtin_HEXAGON_F2_conv_df2ud",
+    "llvm.hexagon.F2.conv.df2ud.chop" => "__builtin_HEXAGON_F2_conv_df2ud_chop",
+    "llvm.hexagon.F2.conv.df2uw" => "__builtin_HEXAGON_F2_conv_df2uw",
+    "llvm.hexagon.F2.conv.df2uw.chop" => "__builtin_HEXAGON_F2_conv_df2uw_chop",
+    "llvm.hexagon.F2.conv.df2w" => "__builtin_HEXAGON_F2_conv_df2w",
+    "llvm.hexagon.F2.conv.df2w.chop" => "__builtin_HEXAGON_F2_conv_df2w_chop",
+    "llvm.hexagon.F2.conv.sf2d" => "__builtin_HEXAGON_F2_conv_sf2d",
+    "llvm.hexagon.F2.conv.sf2d.chop" => "__builtin_HEXAGON_F2_conv_sf2d_chop",
+    "llvm.hexagon.F2.conv.sf2df" => "__builtin_HEXAGON_F2_conv_sf2df",
+    "llvm.hexagon.F2.conv.sf2ud" => "__builtin_HEXAGON_F2_conv_sf2ud",
+    "llvm.hexagon.F2.conv.sf2ud.chop" => "__builtin_HEXAGON_F2_conv_sf2ud_chop",
+    "llvm.hexagon.F2.conv.sf2uw" => "__builtin_HEXAGON_F2_conv_sf2uw",
+    "llvm.hexagon.F2.conv.sf2uw.chop" => "__builtin_HEXAGON_F2_conv_sf2uw_chop",
+    "llvm.hexagon.F2.conv.sf2w" => "__builtin_HEXAGON_F2_conv_sf2w",
+    "llvm.hexagon.F2.conv.sf2w.chop" => "__builtin_HEXAGON_F2_conv_sf2w_chop",
+    "llvm.hexagon.F2.conv.ud2df" => "__builtin_HEXAGON_F2_conv_ud2df",
+    "llvm.hexagon.F2.conv.ud2sf" => "__builtin_HEXAGON_F2_conv_ud2sf",
+    "llvm.hexagon.F2.conv.uw2df" => "__builtin_HEXAGON_F2_conv_uw2df",
+    "llvm.hexagon.F2.conv.uw2sf" => "__builtin_HEXAGON_F2_conv_uw2sf",
+    "llvm.hexagon.F2.conv.w2df" => "__builtin_HEXAGON_F2_conv_w2df",
+    "llvm.hexagon.F2.conv.w2sf" => "__builtin_HEXAGON_F2_conv_w2sf",
+    "llvm.hexagon.F2.dfadd" => "__builtin_HEXAGON_F2_dfadd",
+    "llvm.hexagon.F2.dfclass" => "__builtin_HEXAGON_F2_dfclass",
+    "llvm.hexagon.F2.dfcmpeq" => "__builtin_HEXAGON_F2_dfcmpeq",
+    "llvm.hexagon.F2.dfcmpge" => "__builtin_HEXAGON_F2_dfcmpge",
+    "llvm.hexagon.F2.dfcmpgt" => "__builtin_HEXAGON_F2_dfcmpgt",
+    "llvm.hexagon.F2.dfcmpuo" => "__builtin_HEXAGON_F2_dfcmpuo",
+    "llvm.hexagon.F2.dffixupd" => "__builtin_HEXAGON_F2_dffixupd",
+    "llvm.hexagon.F2.dffixupn" => "__builtin_HEXAGON_F2_dffixupn",
+    "llvm.hexagon.F2.dffixupr" => "__builtin_HEXAGON_F2_dffixupr",
+    "llvm.hexagon.F2.dffma" => "__builtin_HEXAGON_F2_dffma",
+    "llvm.hexagon.F2.dffma.lib" => "__builtin_HEXAGON_F2_dffma_lib",
+    "llvm.hexagon.F2.dffma.sc" => "__builtin_HEXAGON_F2_dffma_sc",
+    "llvm.hexagon.F2.dffms" => "__builtin_HEXAGON_F2_dffms",
+    "llvm.hexagon.F2.dffms.lib" => "__builtin_HEXAGON_F2_dffms_lib",
+    "llvm.hexagon.F2.dfimm.n" => "__builtin_HEXAGON_F2_dfimm_n",
+    "llvm.hexagon.F2.dfimm.p" => "__builtin_HEXAGON_F2_dfimm_p",
+    "llvm.hexagon.F2.dfmax" => "__builtin_HEXAGON_F2_dfmax",
+    "llvm.hexagon.F2.dfmin" => "__builtin_HEXAGON_F2_dfmin",
+    "llvm.hexagon.F2.dfmpy" => "__builtin_HEXAGON_F2_dfmpy",
+    "llvm.hexagon.F2.dfsub" => "__builtin_HEXAGON_F2_dfsub",
+    "llvm.hexagon.F2.sfadd" => "__builtin_HEXAGON_F2_sfadd",
+    "llvm.hexagon.F2.sfclass" => "__builtin_HEXAGON_F2_sfclass",
+    "llvm.hexagon.F2.sfcmpeq" => "__builtin_HEXAGON_F2_sfcmpeq",
+    "llvm.hexagon.F2.sfcmpge" => "__builtin_HEXAGON_F2_sfcmpge",
+    "llvm.hexagon.F2.sfcmpgt" => "__builtin_HEXAGON_F2_sfcmpgt",
+    "llvm.hexagon.F2.sfcmpuo" => "__builtin_HEXAGON_F2_sfcmpuo",
+    "llvm.hexagon.F2.sffixupd" => "__builtin_HEXAGON_F2_sffixupd",
+    "llvm.hexagon.F2.sffixupn" => "__builtin_HEXAGON_F2_sffixupn",
+    "llvm.hexagon.F2.sffixupr" => "__builtin_HEXAGON_F2_sffixupr",
+    "llvm.hexagon.F2.sffma" => "__builtin_HEXAGON_F2_sffma",
+    "llvm.hexagon.F2.sffma.lib" => "__builtin_HEXAGON_F2_sffma_lib",
+    "llvm.hexagon.F2.sffma.sc" => "__builtin_HEXAGON_F2_sffma_sc",
+    "llvm.hexagon.F2.sffms" => "__builtin_HEXAGON_F2_sffms",
+    "llvm.hexagon.F2.sffms.lib" => "__builtin_HEXAGON_F2_sffms_lib",
+    "llvm.hexagon.F2.sfimm.n" => "__builtin_HEXAGON_F2_sfimm_n",
+    "llvm.hexagon.F2.sfimm.p" => "__builtin_HEXAGON_F2_sfimm_p",
+    "llvm.hexagon.F2.sfmax" => "__builtin_HEXAGON_F2_sfmax",
+    "llvm.hexagon.F2.sfmin" => "__builtin_HEXAGON_F2_sfmin",
+    "llvm.hexagon.F2.sfmpy" => "__builtin_HEXAGON_F2_sfmpy",
+    "llvm.hexagon.F2.sfsub" => "__builtin_HEXAGON_F2_sfsub",
+    "llvm.hexagon.M2.acci" => "__builtin_HEXAGON_M2_acci",
+    "llvm.hexagon.M2.accii" => "__builtin_HEXAGON_M2_accii",
+    "llvm.hexagon.M2.cmaci.s0" => "__builtin_HEXAGON_M2_cmaci_s0",
+    "llvm.hexagon.M2.cmacr.s0" => "__builtin_HEXAGON_M2_cmacr_s0",
+    "llvm.hexagon.M2.cmacs.s0" => "__builtin_HEXAGON_M2_cmacs_s0",
+    "llvm.hexagon.M2.cmacs.s1" => "__builtin_HEXAGON_M2_cmacs_s1",
+    "llvm.hexagon.M2.cmacsc.s0" => "__builtin_HEXAGON_M2_cmacsc_s0",
+    "llvm.hexagon.M2.cmacsc.s1" => "__builtin_HEXAGON_M2_cmacsc_s1",
+    "llvm.hexagon.M2.cmpyi.s0" => "__builtin_HEXAGON_M2_cmpyi_s0",
+    "llvm.hexagon.M2.cmpyr.s0" => "__builtin_HEXAGON_M2_cmpyr_s0",
+    "llvm.hexagon.M2.cmpyrs.s0" => "__builtin_HEXAGON_M2_cmpyrs_s0",
+    "llvm.hexagon.M2.cmpyrs.s1" => "__builtin_HEXAGON_M2_cmpyrs_s1",
+    "llvm.hexagon.M2.cmpyrsc.s0" => "__builtin_HEXAGON_M2_cmpyrsc_s0",
+    "llvm.hexagon.M2.cmpyrsc.s1" => "__builtin_HEXAGON_M2_cmpyrsc_s1",
+    "llvm.hexagon.M2.cmpys.s0" => "__builtin_HEXAGON_M2_cmpys_s0",
+    "llvm.hexagon.M2.cmpys.s1" => "__builtin_HEXAGON_M2_cmpys_s1",
+    "llvm.hexagon.M2.cmpysc.s0" => "__builtin_HEXAGON_M2_cmpysc_s0",
+    "llvm.hexagon.M2.cmpysc.s1" => "__builtin_HEXAGON_M2_cmpysc_s1",
+    "llvm.hexagon.M2.cnacs.s0" => "__builtin_HEXAGON_M2_cnacs_s0",
+    "llvm.hexagon.M2.cnacs.s1" => "__builtin_HEXAGON_M2_cnacs_s1",
+    "llvm.hexagon.M2.cnacsc.s0" => "__builtin_HEXAGON_M2_cnacsc_s0",
+    "llvm.hexagon.M2.cnacsc.s1" => "__builtin_HEXAGON_M2_cnacsc_s1",
+    "llvm.hexagon.M2.dpmpyss.acc.s0" => "__builtin_HEXAGON_M2_dpmpyss_acc_s0",
+    "llvm.hexagon.M2.dpmpyss.nac.s0" => "__builtin_HEXAGON_M2_dpmpyss_nac_s0",
+    "llvm.hexagon.M2.dpmpyss.rnd.s0" => "__builtin_HEXAGON_M2_dpmpyss_rnd_s0",
+    "llvm.hexagon.M2.dpmpyss.s0" => "__builtin_HEXAGON_M2_dpmpyss_s0",
+    "llvm.hexagon.M2.dpmpyuu.acc.s0" => "__builtin_HEXAGON_M2_dpmpyuu_acc_s0",
+    "llvm.hexagon.M2.dpmpyuu.nac.s0" => "__builtin_HEXAGON_M2_dpmpyuu_nac_s0",
+    "llvm.hexagon.M2.dpmpyuu.s0" => "__builtin_HEXAGON_M2_dpmpyuu_s0",
+    "llvm.hexagon.M2.hmmpyh.rs1" => "__builtin_HEXAGON_M2_hmmpyh_rs1",
+    "llvm.hexagon.M2.hmmpyh.s1" => "__builtin_HEXAGON_M2_hmmpyh_s1",
+    "llvm.hexagon.M2.hmmpyl.rs1" => "__builtin_HEXAGON_M2_hmmpyl_rs1",
+    "llvm.hexagon.M2.hmmpyl.s1" => "__builtin_HEXAGON_M2_hmmpyl_s1",
+    "llvm.hexagon.M2.maci" => "__builtin_HEXAGON_M2_maci",
+    "llvm.hexagon.M2.macsin" => "__builtin_HEXAGON_M2_macsin",
+    "llvm.hexagon.M2.macsip" => "__builtin_HEXAGON_M2_macsip",
+    "llvm.hexagon.M2.mmachs.rs0" => "__builtin_HEXAGON_M2_mmachs_rs0",
+    "llvm.hexagon.M2.mmachs.rs1" => "__builtin_HEXAGON_M2_mmachs_rs1",
+    "llvm.hexagon.M2.mmachs.s0" => "__builtin_HEXAGON_M2_mmachs_s0",
+    "llvm.hexagon.M2.mmachs.s1" => "__builtin_HEXAGON_M2_mmachs_s1",
+    "llvm.hexagon.M2.mmacls.rs0" => "__builtin_HEXAGON_M2_mmacls_rs0",
+    "llvm.hexagon.M2.mmacls.rs1" => "__builtin_HEXAGON_M2_mmacls_rs1",
+    "llvm.hexagon.M2.mmacls.s0" => "__builtin_HEXAGON_M2_mmacls_s0",
+    "llvm.hexagon.M2.mmacls.s1" => "__builtin_HEXAGON_M2_mmacls_s1",
+    "llvm.hexagon.M2.mmacuhs.rs0" => "__builtin_HEXAGON_M2_mmacuhs_rs0",
+    "llvm.hexagon.M2.mmacuhs.rs1" => "__builtin_HEXAGON_M2_mmacuhs_rs1",
+    "llvm.hexagon.M2.mmacuhs.s0" => "__builtin_HEXAGON_M2_mmacuhs_s0",
+    "llvm.hexagon.M2.mmacuhs.s1" => "__builtin_HEXAGON_M2_mmacuhs_s1",
+    "llvm.hexagon.M2.mmaculs.rs0" => "__builtin_HEXAGON_M2_mmaculs_rs0",
+    "llvm.hexagon.M2.mmaculs.rs1" => "__builtin_HEXAGON_M2_mmaculs_rs1",
+    "llvm.hexagon.M2.mmaculs.s0" => "__builtin_HEXAGON_M2_mmaculs_s0",
+    "llvm.hexagon.M2.mmaculs.s1" => "__builtin_HEXAGON_M2_mmaculs_s1",
+    "llvm.hexagon.M2.mmpyh.rs0" => "__builtin_HEXAGON_M2_mmpyh_rs0",
+    "llvm.hexagon.M2.mmpyh.rs1" => "__builtin_HEXAGON_M2_mmpyh_rs1",
+    "llvm.hexagon.M2.mmpyh.s0" => "__builtin_HEXAGON_M2_mmpyh_s0",
+    "llvm.hexagon.M2.mmpyh.s1" => "__builtin_HEXAGON_M2_mmpyh_s1",
+    "llvm.hexagon.M2.mmpyl.rs0" => "__builtin_HEXAGON_M2_mmpyl_rs0",
+    "llvm.hexagon.M2.mmpyl.rs1" => "__builtin_HEXAGON_M2_mmpyl_rs1",
+    "llvm.hexagon.M2.mmpyl.s0" => "__builtin_HEXAGON_M2_mmpyl_s0",
+    "llvm.hexagon.M2.mmpyl.s1" => "__builtin_HEXAGON_M2_mmpyl_s1",
+    "llvm.hexagon.M2.mmpyuh.rs0" => "__builtin_HEXAGON_M2_mmpyuh_rs0",
+    "llvm.hexagon.M2.mmpyuh.rs1" => "__builtin_HEXAGON_M2_mmpyuh_rs1",
+    "llvm.hexagon.M2.mmpyuh.s0" => "__builtin_HEXAGON_M2_mmpyuh_s0",
+    "llvm.hexagon.M2.mmpyuh.s1" => "__builtin_HEXAGON_M2_mmpyuh_s1",
+    "llvm.hexagon.M2.mmpyul.rs0" => "__builtin_HEXAGON_M2_mmpyul_rs0",
+    "llvm.hexagon.M2.mmpyul.rs1" => "__builtin_HEXAGON_M2_mmpyul_rs1",
+    "llvm.hexagon.M2.mmpyul.s0" => "__builtin_HEXAGON_M2_mmpyul_s0",
+    "llvm.hexagon.M2.mmpyul.s1" => "__builtin_HEXAGON_M2_mmpyul_s1",
+    "llvm.hexagon.M2.mpy.acc.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_hh_s0",
+    "llvm.hexagon.M2.mpy.acc.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_hh_s1",
+    "llvm.hexagon.M2.mpy.acc.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_hl_s0",
+    "llvm.hexagon.M2.mpy.acc.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_hl_s1",
+    "llvm.hexagon.M2.mpy.acc.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_lh_s0",
+    "llvm.hexagon.M2.mpy.acc.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_lh_s1",
+    "llvm.hexagon.M2.mpy.acc.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_ll_s0",
+    "llvm.hexagon.M2.mpy.acc.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_ll_s1",
+    "llvm.hexagon.M2.mpy.acc.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s0",
+    "llvm.hexagon.M2.mpy.acc.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s1",
+    "llvm.hexagon.M2.mpy.acc.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s0",
+    "llvm.hexagon.M2.mpy.acc.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s1",
+    "llvm.hexagon.M2.mpy.acc.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s0",
+    "llvm.hexagon.M2.mpy.acc.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s1",
+    "llvm.hexagon.M2.mpy.acc.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s0",
+    "llvm.hexagon.M2.mpy.acc.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s1",
+    "llvm.hexagon.M2.mpy.hh.s0" => "__builtin_HEXAGON_M2_mpy_hh_s0",
+    "llvm.hexagon.M2.mpy.hh.s1" => "__builtin_HEXAGON_M2_mpy_hh_s1",
+    "llvm.hexagon.M2.mpy.hl.s0" => "__builtin_HEXAGON_M2_mpy_hl_s0",
+    "llvm.hexagon.M2.mpy.hl.s1" => "__builtin_HEXAGON_M2_mpy_hl_s1",
+    "llvm.hexagon.M2.mpy.lh.s0" => "__builtin_HEXAGON_M2_mpy_lh_s0",
+    "llvm.hexagon.M2.mpy.lh.s1" => "__builtin_HEXAGON_M2_mpy_lh_s1",
+    "llvm.hexagon.M2.mpy.ll.s0" => "__builtin_HEXAGON_M2_mpy_ll_s0",
+    "llvm.hexagon.M2.mpy.ll.s1" => "__builtin_HEXAGON_M2_mpy_ll_s1",
+    "llvm.hexagon.M2.mpy.nac.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_hh_s0",
+    "llvm.hexagon.M2.mpy.nac.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_hh_s1",
+    "llvm.hexagon.M2.mpy.nac.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_hl_s0",
+    "llvm.hexagon.M2.mpy.nac.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_hl_s1",
+    "llvm.hexagon.M2.mpy.nac.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_lh_s0",
+    "llvm.hexagon.M2.mpy.nac.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_lh_s1",
+    "llvm.hexagon.M2.mpy.nac.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_ll_s0",
+    "llvm.hexagon.M2.mpy.nac.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_ll_s1",
+    "llvm.hexagon.M2.mpy.nac.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s0",
+    "llvm.hexagon.M2.mpy.nac.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s1",
+    "llvm.hexagon.M2.mpy.nac.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s0",
+    "llvm.hexagon.M2.mpy.nac.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s1",
+    "llvm.hexagon.M2.mpy.nac.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s0",
+    "llvm.hexagon.M2.mpy.nac.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s1",
+    "llvm.hexagon.M2.mpy.nac.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s0",
+    "llvm.hexagon.M2.mpy.nac.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s1",
+    "llvm.hexagon.M2.mpy.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s0",
+    "llvm.hexagon.M2.mpy.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s1",
+    "llvm.hexagon.M2.mpy.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s0",
+    "llvm.hexagon.M2.mpy.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s1",
+    "llvm.hexagon.M2.mpy.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s0",
+    "llvm.hexagon.M2.mpy.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s1",
+    "llvm.hexagon.M2.mpy.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s0",
+    "llvm.hexagon.M2.mpy.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s1",
+    "llvm.hexagon.M2.mpy.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_hh_s0",
+    "llvm.hexagon.M2.mpy.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_hh_s1",
+    "llvm.hexagon.M2.mpy.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_hl_s0",
+    "llvm.hexagon.M2.mpy.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_hl_s1",
+    "llvm.hexagon.M2.mpy.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_lh_s0",
+    "llvm.hexagon.M2.mpy.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_lh_s1",
+    "llvm.hexagon.M2.mpy.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_ll_s0",
+    "llvm.hexagon.M2.mpy.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_ll_s1",
+    "llvm.hexagon.M2.mpy.sat.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0",
+    "llvm.hexagon.M2.mpy.sat.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1",
+    "llvm.hexagon.M2.mpy.sat.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0",
+    "llvm.hexagon.M2.mpy.sat.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1",
+    "llvm.hexagon.M2.mpy.sat.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0",
+    "llvm.hexagon.M2.mpy.sat.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1",
+    "llvm.hexagon.M2.mpy.sat.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0",
+    "llvm.hexagon.M2.mpy.sat.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1",
+    "llvm.hexagon.M2.mpy.up" => "__builtin_HEXAGON_M2_mpy_up",
+    "llvm.hexagon.M2.mpy.up.s1" => "__builtin_HEXAGON_M2_mpy_up_s1",
+    "llvm.hexagon.M2.mpy.up.s1.sat" => "__builtin_HEXAGON_M2_mpy_up_s1_sat",
+    "llvm.hexagon.M2.mpyd.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s0",
+    "llvm.hexagon.M2.mpyd.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s1",
+    "llvm.hexagon.M2.mpyd.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s0",
+    "llvm.hexagon.M2.mpyd.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s1",
+    "llvm.hexagon.M2.mpyd.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s0",
+    "llvm.hexagon.M2.mpyd.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s1",
+    "llvm.hexagon.M2.mpyd.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s0",
+    "llvm.hexagon.M2.mpyd.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s1",
+    "llvm.hexagon.M2.mpyd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_hh_s0",
+    "llvm.hexagon.M2.mpyd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_hh_s1",
+    "llvm.hexagon.M2.mpyd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_hl_s0",
+    "llvm.hexagon.M2.mpyd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_hl_s1",
+    "llvm.hexagon.M2.mpyd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_lh_s0",
+    "llvm.hexagon.M2.mpyd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_lh_s1",
+    "llvm.hexagon.M2.mpyd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_ll_s0",
+    "llvm.hexagon.M2.mpyd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_ll_s1",
+    "llvm.hexagon.M2.mpyd.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s0",
+    "llvm.hexagon.M2.mpyd.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s1",
+    "llvm.hexagon.M2.mpyd.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s0",
+    "llvm.hexagon.M2.mpyd.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s1",
+    "llvm.hexagon.M2.mpyd.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s0",
+    "llvm.hexagon.M2.mpyd.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s1",
+    "llvm.hexagon.M2.mpyd.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s0",
+    "llvm.hexagon.M2.mpyd.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s1",
+    "llvm.hexagon.M2.mpyd.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s0",
+    "llvm.hexagon.M2.mpyd.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s1",
+    "llvm.hexagon.M2.mpyd.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s0",
+    "llvm.hexagon.M2.mpyd.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s1",
+    "llvm.hexagon.M2.mpyd.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s0",
+    "llvm.hexagon.M2.mpyd.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s1",
+    "llvm.hexagon.M2.mpyd.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s0",
+    "llvm.hexagon.M2.mpyd.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s1",
+    "llvm.hexagon.M2.mpyi" => "__builtin_HEXAGON_M2_mpyi",
+    "llvm.hexagon.M2.mpysmi" => "__builtin_HEXAGON_M2_mpysmi",
+    "llvm.hexagon.M2.mpysu.up" => "__builtin_HEXAGON_M2_mpysu_up",
+    "llvm.hexagon.M2.mpyu.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s0",
+    "llvm.hexagon.M2.mpyu.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s1",
+    "llvm.hexagon.M2.mpyu.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s0",
+    "llvm.hexagon.M2.mpyu.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s1",
+    "llvm.hexagon.M2.mpyu.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s0",
+    "llvm.hexagon.M2.mpyu.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s1",
+    "llvm.hexagon.M2.mpyu.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s0",
+    "llvm.hexagon.M2.mpyu.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s1",
+    "llvm.hexagon.M2.mpyu.hh.s0" => "__builtin_HEXAGON_M2_mpyu_hh_s0",
+    "llvm.hexagon.M2.mpyu.hh.s1" => "__builtin_HEXAGON_M2_mpyu_hh_s1",
+    "llvm.hexagon.M2.mpyu.hl.s0" => "__builtin_HEXAGON_M2_mpyu_hl_s0",
+    "llvm.hexagon.M2.mpyu.hl.s1" => "__builtin_HEXAGON_M2_mpyu_hl_s1",
+    "llvm.hexagon.M2.mpyu.lh.s0" => "__builtin_HEXAGON_M2_mpyu_lh_s0",
+    "llvm.hexagon.M2.mpyu.lh.s1" => "__builtin_HEXAGON_M2_mpyu_lh_s1",
+    "llvm.hexagon.M2.mpyu.ll.s0" => "__builtin_HEXAGON_M2_mpyu_ll_s0",
+    "llvm.hexagon.M2.mpyu.ll.s1" => "__builtin_HEXAGON_M2_mpyu_ll_s1",
+    "llvm.hexagon.M2.mpyu.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s0",
+    "llvm.hexagon.M2.mpyu.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s1",
+    "llvm.hexagon.M2.mpyu.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s0",
+    "llvm.hexagon.M2.mpyu.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s1",
+    "llvm.hexagon.M2.mpyu.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s0",
+    "llvm.hexagon.M2.mpyu.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s1",
+    "llvm.hexagon.M2.mpyu.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s0",
+    "llvm.hexagon.M2.mpyu.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s1",
+    "llvm.hexagon.M2.mpyu.up" => "__builtin_HEXAGON_M2_mpyu_up",
+    "llvm.hexagon.M2.mpyud.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s0",
+    "llvm.hexagon.M2.mpyud.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s1",
+    "llvm.hexagon.M2.mpyud.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s0",
+    "llvm.hexagon.M2.mpyud.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s1",
+    "llvm.hexagon.M2.mpyud.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s0",
+    "llvm.hexagon.M2.mpyud.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s1",
+    "llvm.hexagon.M2.mpyud.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s0",
+    "llvm.hexagon.M2.mpyud.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s1",
+    "llvm.hexagon.M2.mpyud.hh.s0" => "__builtin_HEXAGON_M2_mpyud_hh_s0",
+    "llvm.hexagon.M2.mpyud.hh.s1" => "__builtin_HEXAGON_M2_mpyud_hh_s1",
+    "llvm.hexagon.M2.mpyud.hl.s0" => "__builtin_HEXAGON_M2_mpyud_hl_s0",
+    "llvm.hexagon.M2.mpyud.hl.s1" => "__builtin_HEXAGON_M2_mpyud_hl_s1",
+    "llvm.hexagon.M2.mpyud.lh.s0" => "__builtin_HEXAGON_M2_mpyud_lh_s0",
+    "llvm.hexagon.M2.mpyud.lh.s1" => "__builtin_HEXAGON_M2_mpyud_lh_s1",
+    "llvm.hexagon.M2.mpyud.ll.s0" => "__builtin_HEXAGON_M2_mpyud_ll_s0",
+    "llvm.hexagon.M2.mpyud.ll.s1" => "__builtin_HEXAGON_M2_mpyud_ll_s1",
+    "llvm.hexagon.M2.mpyud.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s0",
+    "llvm.hexagon.M2.mpyud.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s1",
+    "llvm.hexagon.M2.mpyud.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s0",
+    "llvm.hexagon.M2.mpyud.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s1",
+    "llvm.hexagon.M2.mpyud.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s0",
+    "llvm.hexagon.M2.mpyud.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s1",
+    "llvm.hexagon.M2.mpyud.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s0",
+    "llvm.hexagon.M2.mpyud.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s1",
+    "llvm.hexagon.M2.mpyui" => "__builtin_HEXAGON_M2_mpyui",
+    "llvm.hexagon.M2.nacci" => "__builtin_HEXAGON_M2_nacci",
+    "llvm.hexagon.M2.naccii" => "__builtin_HEXAGON_M2_naccii",
+    "llvm.hexagon.M2.subacc" => "__builtin_HEXAGON_M2_subacc",
+    "llvm.hexagon.M2.vabsdiffh" => "__builtin_HEXAGON_M2_vabsdiffh",
+    "llvm.hexagon.M2.vabsdiffw" => "__builtin_HEXAGON_M2_vabsdiffw",
+    "llvm.hexagon.M2.vcmac.s0.sat.i" => "__builtin_HEXAGON_M2_vcmac_s0_sat_i",
+    "llvm.hexagon.M2.vcmac.s0.sat.r" => "__builtin_HEXAGON_M2_vcmac_s0_sat_r",
+    "llvm.hexagon.M2.vcmpy.s0.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_i",
+    "llvm.hexagon.M2.vcmpy.s0.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_r",
+    "llvm.hexagon.M2.vcmpy.s1.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_i",
+    "llvm.hexagon.M2.vcmpy.s1.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_r",
+    "llvm.hexagon.M2.vdmacs.s0" => "__builtin_HEXAGON_M2_vdmacs_s0",
+    "llvm.hexagon.M2.vdmacs.s1" => "__builtin_HEXAGON_M2_vdmacs_s1",
+    "llvm.hexagon.M2.vdmpyrs.s0" => "__builtin_HEXAGON_M2_vdmpyrs_s0",
+    "llvm.hexagon.M2.vdmpyrs.s1" => "__builtin_HEXAGON_M2_vdmpyrs_s1",
+    "llvm.hexagon.M2.vdmpys.s0" => "__builtin_HEXAGON_M2_vdmpys_s0",
+    "llvm.hexagon.M2.vdmpys.s1" => "__builtin_HEXAGON_M2_vdmpys_s1",
+    "llvm.hexagon.M2.vmac2" => "__builtin_HEXAGON_M2_vmac2",
+    "llvm.hexagon.M2.vmac2es" => "__builtin_HEXAGON_M2_vmac2es",
+    "llvm.hexagon.M2.vmac2es.s0" => "__builtin_HEXAGON_M2_vmac2es_s0",
+    "llvm.hexagon.M2.vmac2es.s1" => "__builtin_HEXAGON_M2_vmac2es_s1",
+    "llvm.hexagon.M2.vmac2s.s0" => "__builtin_HEXAGON_M2_vmac2s_s0",
+    "llvm.hexagon.M2.vmac2s.s1" => "__builtin_HEXAGON_M2_vmac2s_s1",
+    "llvm.hexagon.M2.vmac2su.s0" => "__builtin_HEXAGON_M2_vmac2su_s0",
+    "llvm.hexagon.M2.vmac2su.s1" => "__builtin_HEXAGON_M2_vmac2su_s1",
+    "llvm.hexagon.M2.vmpy2es.s0" => "__builtin_HEXAGON_M2_vmpy2es_s0",
+    "llvm.hexagon.M2.vmpy2es.s1" => "__builtin_HEXAGON_M2_vmpy2es_s1",
+    "llvm.hexagon.M2.vmpy2s.s0" => "__builtin_HEXAGON_M2_vmpy2s_s0",
+    "llvm.hexagon.M2.vmpy2s.s0pack" => "__builtin_HEXAGON_M2_vmpy2s_s0pack",
+    "llvm.hexagon.M2.vmpy2s.s1" => "__builtin_HEXAGON_M2_vmpy2s_s1",
+    "llvm.hexagon.M2.vmpy2s.s1pack" => "__builtin_HEXAGON_M2_vmpy2s_s1pack",
+    "llvm.hexagon.M2.vmpy2su.s0" => "__builtin_HEXAGON_M2_vmpy2su_s0",
+    "llvm.hexagon.M2.vmpy2su.s1" => "__builtin_HEXAGON_M2_vmpy2su_s1",
+    "llvm.hexagon.M2.vraddh" => "__builtin_HEXAGON_M2_vraddh",
+    "llvm.hexagon.M2.vradduh" => "__builtin_HEXAGON_M2_vradduh",
+    "llvm.hexagon.M2.vrcmaci.s0" => "__builtin_HEXAGON_M2_vrcmaci_s0",
+    "llvm.hexagon.M2.vrcmaci.s0c" => "__builtin_HEXAGON_M2_vrcmaci_s0c",
+    "llvm.hexagon.M2.vrcmacr.s0" => "__builtin_HEXAGON_M2_vrcmacr_s0",
+    "llvm.hexagon.M2.vrcmacr.s0c" => "__builtin_HEXAGON_M2_vrcmacr_s0c",
+    "llvm.hexagon.M2.vrcmpyi.s0" => "__builtin_HEXAGON_M2_vrcmpyi_s0",
+    "llvm.hexagon.M2.vrcmpyi.s0c" => "__builtin_HEXAGON_M2_vrcmpyi_s0c",
+    "llvm.hexagon.M2.vrcmpyr.s0" => "__builtin_HEXAGON_M2_vrcmpyr_s0",
+    "llvm.hexagon.M2.vrcmpyr.s0c" => "__builtin_HEXAGON_M2_vrcmpyr_s0c",
+    "llvm.hexagon.M2.vrcmpys.acc.s1" => "__builtin_HEXAGON_M2_vrcmpys_acc_s1",
+    "llvm.hexagon.M2.vrcmpys.s1" => "__builtin_HEXAGON_M2_vrcmpys_s1",
+    "llvm.hexagon.M2.vrcmpys.s1rp" => "__builtin_HEXAGON_M2_vrcmpys_s1rp",
+    "llvm.hexagon.M2.vrmac.s0" => "__builtin_HEXAGON_M2_vrmac_s0",
+    "llvm.hexagon.M2.vrmpy.s0" => "__builtin_HEXAGON_M2_vrmpy_s0",
+    "llvm.hexagon.M2.xor.xacc" => "__builtin_HEXAGON_M2_xor_xacc",
+    "llvm.hexagon.M4.and.and" => "__builtin_HEXAGON_M4_and_and",
+    "llvm.hexagon.M4.and.andn" => "__builtin_HEXAGON_M4_and_andn",
+    "llvm.hexagon.M4.and.or" => "__builtin_HEXAGON_M4_and_or",
+    "llvm.hexagon.M4.and.xor" => "__builtin_HEXAGON_M4_and_xor",
+    "llvm.hexagon.M4.cmpyi.wh" => "__builtin_HEXAGON_M4_cmpyi_wh",
+    "llvm.hexagon.M4.cmpyi.whc" => "__builtin_HEXAGON_M4_cmpyi_whc",
+    "llvm.hexagon.M4.cmpyr.wh" => "__builtin_HEXAGON_M4_cmpyr_wh",
+    "llvm.hexagon.M4.cmpyr.whc" => "__builtin_HEXAGON_M4_cmpyr_whc",
+    "llvm.hexagon.M4.mac.up.s1.sat" => "__builtin_HEXAGON_M4_mac_up_s1_sat",
+    "llvm.hexagon.M4.mpyri.addi" => "__builtin_HEXAGON_M4_mpyri_addi",
+    "llvm.hexagon.M4.mpyri.addr" => "__builtin_HEXAGON_M4_mpyri_addr",
+    "llvm.hexagon.M4.mpyri.addr.u2" => "__builtin_HEXAGON_M4_mpyri_addr_u2",
+    "llvm.hexagon.M4.mpyrr.addi" => "__builtin_HEXAGON_M4_mpyrr_addi",
+    "llvm.hexagon.M4.mpyrr.addr" => "__builtin_HEXAGON_M4_mpyrr_addr",
+    "llvm.hexagon.M4.nac.up.s1.sat" => "__builtin_HEXAGON_M4_nac_up_s1_sat",
+    "llvm.hexagon.M4.or.and" => "__builtin_HEXAGON_M4_or_and",
+    "llvm.hexagon.M4.or.andn" => "__builtin_HEXAGON_M4_or_andn",
+    "llvm.hexagon.M4.or.or" => "__builtin_HEXAGON_M4_or_or",
+    "llvm.hexagon.M4.or.xor" => "__builtin_HEXAGON_M4_or_xor",
+    "llvm.hexagon.M4.pmpyw" => "__builtin_HEXAGON_M4_pmpyw",
+    "llvm.hexagon.M4.pmpyw.acc" => "__builtin_HEXAGON_M4_pmpyw_acc",
+    "llvm.hexagon.M4.vpmpyh" => "__builtin_HEXAGON_M4_vpmpyh",
+    "llvm.hexagon.M4.vpmpyh.acc" => "__builtin_HEXAGON_M4_vpmpyh_acc",
+    "llvm.hexagon.M4.vrmpyeh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s0",
+    "llvm.hexagon.M4.vrmpyeh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s1",
+    "llvm.hexagon.M4.vrmpyeh.s0" => "__builtin_HEXAGON_M4_vrmpyeh_s0",
+    "llvm.hexagon.M4.vrmpyeh.s1" => "__builtin_HEXAGON_M4_vrmpyeh_s1",
+    "llvm.hexagon.M4.vrmpyoh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s0",
+    "llvm.hexagon.M4.vrmpyoh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s1",
+    "llvm.hexagon.M4.vrmpyoh.s0" => "__builtin_HEXAGON_M4_vrmpyoh_s0",
+    "llvm.hexagon.M4.vrmpyoh.s1" => "__builtin_HEXAGON_M4_vrmpyoh_s1",
+    "llvm.hexagon.M4.xor.and" => "__builtin_HEXAGON_M4_xor_and",
+    "llvm.hexagon.M4.xor.andn" => "__builtin_HEXAGON_M4_xor_andn",
+    "llvm.hexagon.M4.xor.or" => "__builtin_HEXAGON_M4_xor_or",
+    "llvm.hexagon.M4.xor.xacc" => "__builtin_HEXAGON_M4_xor_xacc",
+    "llvm.hexagon.M5.vdmacbsu" => "__builtin_HEXAGON_M5_vdmacbsu",
+    "llvm.hexagon.M5.vdmpybsu" => "__builtin_HEXAGON_M5_vdmpybsu",
+    "llvm.hexagon.M5.vmacbsu" => "__builtin_HEXAGON_M5_vmacbsu",
+    "llvm.hexagon.M5.vmacbuu" => "__builtin_HEXAGON_M5_vmacbuu",
+    "llvm.hexagon.M5.vmpybsu" => "__builtin_HEXAGON_M5_vmpybsu",
+    "llvm.hexagon.M5.vmpybuu" => "__builtin_HEXAGON_M5_vmpybuu",
+    "llvm.hexagon.M5.vrmacbsu" => "__builtin_HEXAGON_M5_vrmacbsu",
+    "llvm.hexagon.M5.vrmacbuu" => "__builtin_HEXAGON_M5_vrmacbuu",
+    "llvm.hexagon.M5.vrmpybsu" => "__builtin_HEXAGON_M5_vrmpybsu",
+    "llvm.hexagon.M5.vrmpybuu" => "__builtin_HEXAGON_M5_vrmpybuu",
+    "llvm.hexagon.S2.addasl.rrri" => "__builtin_HEXAGON_S2_addasl_rrri",
+    "llvm.hexagon.S2.asl.i.p" => "__builtin_HEXAGON_S2_asl_i_p",
+    "llvm.hexagon.S2.asl.i.p.acc" => "__builtin_HEXAGON_S2_asl_i_p_acc",
+    "llvm.hexagon.S2.asl.i.p.and" => "__builtin_HEXAGON_S2_asl_i_p_and",
+    "llvm.hexagon.S2.asl.i.p.nac" => "__builtin_HEXAGON_S2_asl_i_p_nac",
+    "llvm.hexagon.S2.asl.i.p.or" => "__builtin_HEXAGON_S2_asl_i_p_or",
+    "llvm.hexagon.S2.asl.i.p.xacc" => "__builtin_HEXAGON_S2_asl_i_p_xacc",
+    "llvm.hexagon.S2.asl.i.r" => "__builtin_HEXAGON_S2_asl_i_r",
+    "llvm.hexagon.S2.asl.i.r.acc" => "__builtin_HEXAGON_S2_asl_i_r_acc",
+    "llvm.hexagon.S2.asl.i.r.and" => "__builtin_HEXAGON_S2_asl_i_r_and",
+    "llvm.hexagon.S2.asl.i.r.nac" => "__builtin_HEXAGON_S2_asl_i_r_nac",
+    "llvm.hexagon.S2.asl.i.r.or" => "__builtin_HEXAGON_S2_asl_i_r_or",
+    "llvm.hexagon.S2.asl.i.r.sat" => "__builtin_HEXAGON_S2_asl_i_r_sat",
+    "llvm.hexagon.S2.asl.i.r.xacc" => "__builtin_HEXAGON_S2_asl_i_r_xacc",
+    "llvm.hexagon.S2.asl.i.vh" => "__builtin_HEXAGON_S2_asl_i_vh",
+    "llvm.hexagon.S2.asl.i.vw" => "__builtin_HEXAGON_S2_asl_i_vw",
+    "llvm.hexagon.S2.asl.r.p" => "__builtin_HEXAGON_S2_asl_r_p",
+    "llvm.hexagon.S2.asl.r.p.acc" => "__builtin_HEXAGON_S2_asl_r_p_acc",
+    "llvm.hexagon.S2.asl.r.p.and" => "__builtin_HEXAGON_S2_asl_r_p_and",
+    "llvm.hexagon.S2.asl.r.p.nac" => "__builtin_HEXAGON_S2_asl_r_p_nac",
+    "llvm.hexagon.S2.asl.r.p.or" => "__builtin_HEXAGON_S2_asl_r_p_or",
+    "llvm.hexagon.S2.asl.r.p.xor" => "__builtin_HEXAGON_S2_asl_r_p_xor",
+    "llvm.hexagon.S2.asl.r.r" => "__builtin_HEXAGON_S2_asl_r_r",
+    "llvm.hexagon.S2.asl.r.r.acc" => "__builtin_HEXAGON_S2_asl_r_r_acc",
+    "llvm.hexagon.S2.asl.r.r.and" => "__builtin_HEXAGON_S2_asl_r_r_and",
+    "llvm.hexagon.S2.asl.r.r.nac" => "__builtin_HEXAGON_S2_asl_r_r_nac",
+    "llvm.hexagon.S2.asl.r.r.or" => "__builtin_HEXAGON_S2_asl_r_r_or",
+    "llvm.hexagon.S2.asl.r.r.sat" => "__builtin_HEXAGON_S2_asl_r_r_sat",
+    "llvm.hexagon.S2.asl.r.vh" => "__builtin_HEXAGON_S2_asl_r_vh",
+    "llvm.hexagon.S2.asl.r.vw" => "__builtin_HEXAGON_S2_asl_r_vw",
+    "llvm.hexagon.S2.asr.i.p" => "__builtin_HEXAGON_S2_asr_i_p",
+    "llvm.hexagon.S2.asr.i.p.acc" => "__builtin_HEXAGON_S2_asr_i_p_acc",
+    "llvm.hexagon.S2.asr.i.p.and" => "__builtin_HEXAGON_S2_asr_i_p_and",
+    "llvm.hexagon.S2.asr.i.p.nac" => "__builtin_HEXAGON_S2_asr_i_p_nac",
+    "llvm.hexagon.S2.asr.i.p.or" => "__builtin_HEXAGON_S2_asr_i_p_or",
+    "llvm.hexagon.S2.asr.i.p.rnd" => "__builtin_HEXAGON_S2_asr_i_p_rnd",
+    "llvm.hexagon.S2.asr.i.p.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax",
+    "llvm.hexagon.S2.asr.i.r" => "__builtin_HEXAGON_S2_asr_i_r",
+    "llvm.hexagon.S2.asr.i.r.acc" => "__builtin_HEXAGON_S2_asr_i_r_acc",
+    "llvm.hexagon.S2.asr.i.r.and" => "__builtin_HEXAGON_S2_asr_i_r_and",
+    "llvm.hexagon.S2.asr.i.r.nac" => "__builtin_HEXAGON_S2_asr_i_r_nac",
+    "llvm.hexagon.S2.asr.i.r.or" => "__builtin_HEXAGON_S2_asr_i_r_or",
+    "llvm.hexagon.S2.asr.i.r.rnd" => "__builtin_HEXAGON_S2_asr_i_r_rnd",
+    "llvm.hexagon.S2.asr.i.r.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax",
+    "llvm.hexagon.S2.asr.i.svw.trun" => "__builtin_HEXAGON_S2_asr_i_svw_trun",
+    "llvm.hexagon.S2.asr.i.vh" => "__builtin_HEXAGON_S2_asr_i_vh",
+    "llvm.hexagon.S2.asr.i.vw" => "__builtin_HEXAGON_S2_asr_i_vw",
+    "llvm.hexagon.S2.asr.r.p" => "__builtin_HEXAGON_S2_asr_r_p",
+    "llvm.hexagon.S2.asr.r.p.acc" => "__builtin_HEXAGON_S2_asr_r_p_acc",
+    "llvm.hexagon.S2.asr.r.p.and" => "__builtin_HEXAGON_S2_asr_r_p_and",
+    "llvm.hexagon.S2.asr.r.p.nac" => "__builtin_HEXAGON_S2_asr_r_p_nac",
+    "llvm.hexagon.S2.asr.r.p.or" => "__builtin_HEXAGON_S2_asr_r_p_or",
+    "llvm.hexagon.S2.asr.r.p.xor" => "__builtin_HEXAGON_S2_asr_r_p_xor",
+    "llvm.hexagon.S2.asr.r.r" => "__builtin_HEXAGON_S2_asr_r_r",
+    "llvm.hexagon.S2.asr.r.r.acc" => "__builtin_HEXAGON_S2_asr_r_r_acc",
+    "llvm.hexagon.S2.asr.r.r.and" => "__builtin_HEXAGON_S2_asr_r_r_and",
+    "llvm.hexagon.S2.asr.r.r.nac" => "__builtin_HEXAGON_S2_asr_r_r_nac",
+    "llvm.hexagon.S2.asr.r.r.or" => "__builtin_HEXAGON_S2_asr_r_r_or",
+    "llvm.hexagon.S2.asr.r.r.sat" => "__builtin_HEXAGON_S2_asr_r_r_sat",
+    "llvm.hexagon.S2.asr.r.svw.trun" => "__builtin_HEXAGON_S2_asr_r_svw_trun",
+    "llvm.hexagon.S2.asr.r.vh" => "__builtin_HEXAGON_S2_asr_r_vh",
+    "llvm.hexagon.S2.asr.r.vw" => "__builtin_HEXAGON_S2_asr_r_vw",
+    "llvm.hexagon.S2.brev" => "__builtin_HEXAGON_S2_brev",
+    "llvm.hexagon.S2.brevp" => "__builtin_HEXAGON_S2_brevp",
+    "llvm.hexagon.S2.cl0" => "__builtin_HEXAGON_S2_cl0",
+    "llvm.hexagon.S2.cl0p" => "__builtin_HEXAGON_S2_cl0p",
+    "llvm.hexagon.S2.cl1" => "__builtin_HEXAGON_S2_cl1",
+    "llvm.hexagon.S2.cl1p" => "__builtin_HEXAGON_S2_cl1p",
+    "llvm.hexagon.S2.clb" => "__builtin_HEXAGON_S2_clb",
+    "llvm.hexagon.S2.clbnorm" => "__builtin_HEXAGON_S2_clbnorm",
+    "llvm.hexagon.S2.clbp" => "__builtin_HEXAGON_S2_clbp",
+    "llvm.hexagon.S2.clrbit.i" => "__builtin_HEXAGON_S2_clrbit_i",
+    "llvm.hexagon.S2.clrbit.r" => "__builtin_HEXAGON_S2_clrbit_r",
+    "llvm.hexagon.S2.ct0" => "__builtin_HEXAGON_S2_ct0",
+    "llvm.hexagon.S2.ct0p" => "__builtin_HEXAGON_S2_ct0p",
+    "llvm.hexagon.S2.ct1" => "__builtin_HEXAGON_S2_ct1",
+    "llvm.hexagon.S2.ct1p" => "__builtin_HEXAGON_S2_ct1p",
+    "llvm.hexagon.S2.deinterleave" => "__builtin_HEXAGON_S2_deinterleave",
+    "llvm.hexagon.S2.extractu" => "__builtin_HEXAGON_S2_extractu",
+    "llvm.hexagon.S2.extractu.rp" => "__builtin_HEXAGON_S2_extractu_rp",
+    "llvm.hexagon.S2.extractup" => "__builtin_HEXAGON_S2_extractup",
+    "llvm.hexagon.S2.extractup.rp" => "__builtin_HEXAGON_S2_extractup_rp",
+    "llvm.hexagon.S2.insert" => "__builtin_HEXAGON_S2_insert",
+    "llvm.hexagon.S2.insert.rp" => "__builtin_HEXAGON_S2_insert_rp",
+    "llvm.hexagon.S2.insertp" => "__builtin_HEXAGON_S2_insertp",
+    "llvm.hexagon.S2.insertp.rp" => "__builtin_HEXAGON_S2_insertp_rp",
+    "llvm.hexagon.S2.interleave" => "__builtin_HEXAGON_S2_interleave",
+    "llvm.hexagon.S2.lfsp" => "__builtin_HEXAGON_S2_lfsp",
+    "llvm.hexagon.S2.lsl.r.p" => "__builtin_HEXAGON_S2_lsl_r_p",
+    "llvm.hexagon.S2.lsl.r.p.acc" => "__builtin_HEXAGON_S2_lsl_r_p_acc",
+    "llvm.hexagon.S2.lsl.r.p.and" => "__builtin_HEXAGON_S2_lsl_r_p_and",
+    "llvm.hexagon.S2.lsl.r.p.nac" => "__builtin_HEXAGON_S2_lsl_r_p_nac",
+    "llvm.hexagon.S2.lsl.r.p.or" => "__builtin_HEXAGON_S2_lsl_r_p_or",
+    "llvm.hexagon.S2.lsl.r.p.xor" => "__builtin_HEXAGON_S2_lsl_r_p_xor",
+    "llvm.hexagon.S2.lsl.r.r" => "__builtin_HEXAGON_S2_lsl_r_r",
+    "llvm.hexagon.S2.lsl.r.r.acc" => "__builtin_HEXAGON_S2_lsl_r_r_acc",
+    "llvm.hexagon.S2.lsl.r.r.and" => "__builtin_HEXAGON_S2_lsl_r_r_and",
+    "llvm.hexagon.S2.lsl.r.r.nac" => "__builtin_HEXAGON_S2_lsl_r_r_nac",
+    "llvm.hexagon.S2.lsl.r.r.or" => "__builtin_HEXAGON_S2_lsl_r_r_or",
+    "llvm.hexagon.S2.lsl.r.vh" => "__builtin_HEXAGON_S2_lsl_r_vh",
+    "llvm.hexagon.S2.lsl.r.vw" => "__builtin_HEXAGON_S2_lsl_r_vw",
+    "llvm.hexagon.S2.lsr.i.p" => "__builtin_HEXAGON_S2_lsr_i_p",
+    "llvm.hexagon.S2.lsr.i.p.acc" => "__builtin_HEXAGON_S2_lsr_i_p_acc",
+    "llvm.hexagon.S2.lsr.i.p.and" => "__builtin_HEXAGON_S2_lsr_i_p_and",
+    "llvm.hexagon.S2.lsr.i.p.nac" => "__builtin_HEXAGON_S2_lsr_i_p_nac",
+    "llvm.hexagon.S2.lsr.i.p.or" => "__builtin_HEXAGON_S2_lsr_i_p_or",
+    "llvm.hexagon.S2.lsr.i.p.xacc" => "__builtin_HEXAGON_S2_lsr_i_p_xacc",
+    "llvm.hexagon.S2.lsr.i.r" => "__builtin_HEXAGON_S2_lsr_i_r",
+    "llvm.hexagon.S2.lsr.i.r.acc" => "__builtin_HEXAGON_S2_lsr_i_r_acc",
+    "llvm.hexagon.S2.lsr.i.r.and" => "__builtin_HEXAGON_S2_lsr_i_r_and",
+    "llvm.hexagon.S2.lsr.i.r.nac" => "__builtin_HEXAGON_S2_lsr_i_r_nac",
+    "llvm.hexagon.S2.lsr.i.r.or" => "__builtin_HEXAGON_S2_lsr_i_r_or",
+    "llvm.hexagon.S2.lsr.i.r.xacc" => "__builtin_HEXAGON_S2_lsr_i_r_xacc",
+    "llvm.hexagon.S2.lsr.i.vh" => "__builtin_HEXAGON_S2_lsr_i_vh",
+    "llvm.hexagon.S2.lsr.i.vw" => "__builtin_HEXAGON_S2_lsr_i_vw",
+    "llvm.hexagon.S2.lsr.r.p" => "__builtin_HEXAGON_S2_lsr_r_p",
+    "llvm.hexagon.S2.lsr.r.p.acc" => "__builtin_HEXAGON_S2_lsr_r_p_acc",
+    "llvm.hexagon.S2.lsr.r.p.and" => "__builtin_HEXAGON_S2_lsr_r_p_and",
+    "llvm.hexagon.S2.lsr.r.p.nac" => "__builtin_HEXAGON_S2_lsr_r_p_nac",
+    "llvm.hexagon.S2.lsr.r.p.or" => "__builtin_HEXAGON_S2_lsr_r_p_or",
+    "llvm.hexagon.S2.lsr.r.p.xor" => "__builtin_HEXAGON_S2_lsr_r_p_xor",
+    "llvm.hexagon.S2.lsr.r.r" => "__builtin_HEXAGON_S2_lsr_r_r",
+    "llvm.hexagon.S2.lsr.r.r.acc" => "__builtin_HEXAGON_S2_lsr_r_r_acc",
+    "llvm.hexagon.S2.lsr.r.r.and" => "__builtin_HEXAGON_S2_lsr_r_r_and",
+    "llvm.hexagon.S2.lsr.r.r.nac" => "__builtin_HEXAGON_S2_lsr_r_r_nac",
+    "llvm.hexagon.S2.lsr.r.r.or" => "__builtin_HEXAGON_S2_lsr_r_r_or",
+    "llvm.hexagon.S2.lsr.r.vh" => "__builtin_HEXAGON_S2_lsr_r_vh",
+    "llvm.hexagon.S2.lsr.r.vw" => "__builtin_HEXAGON_S2_lsr_r_vw",
+    "llvm.hexagon.S2.packhl" => "__builtin_HEXAGON_S2_packhl",
+    "llvm.hexagon.S2.parityp" => "__builtin_HEXAGON_S2_parityp",
+    "llvm.hexagon.S2.setbit.i" => "__builtin_HEXAGON_S2_setbit_i",
+    "llvm.hexagon.S2.setbit.r" => "__builtin_HEXAGON_S2_setbit_r",
+    "llvm.hexagon.S2.shuffeb" => "__builtin_HEXAGON_S2_shuffeb",
+    "llvm.hexagon.S2.shuffeh" => "__builtin_HEXAGON_S2_shuffeh",
+    "llvm.hexagon.S2.shuffob" => "__builtin_HEXAGON_S2_shuffob",
+    "llvm.hexagon.S2.shuffoh" => "__builtin_HEXAGON_S2_shuffoh",
+    "llvm.hexagon.S2.svsathb" => "__builtin_HEXAGON_S2_svsathb",
+    "llvm.hexagon.S2.svsathub" => "__builtin_HEXAGON_S2_svsathub",
+    "llvm.hexagon.S2.tableidxb.goodsyntax" => "__builtin_HEXAGON_S2_tableidxb_goodsyntax",
+    "llvm.hexagon.S2.tableidxd.goodsyntax" => "__builtin_HEXAGON_S2_tableidxd_goodsyntax",
+    "llvm.hexagon.S2.tableidxh.goodsyntax" => "__builtin_HEXAGON_S2_tableidxh_goodsyntax",
+    "llvm.hexagon.S2.tableidxw.goodsyntax" => "__builtin_HEXAGON_S2_tableidxw_goodsyntax",
+    "llvm.hexagon.S2.togglebit.i" => "__builtin_HEXAGON_S2_togglebit_i",
+    "llvm.hexagon.S2.togglebit.r" => "__builtin_HEXAGON_S2_togglebit_r",
+    "llvm.hexagon.S2.tstbit.i" => "__builtin_HEXAGON_S2_tstbit_i",
+    "llvm.hexagon.S2.tstbit.r" => "__builtin_HEXAGON_S2_tstbit_r",
+    "llvm.hexagon.S2.valignib" => "__builtin_HEXAGON_S2_valignib",
+    "llvm.hexagon.S2.valignrb" => "__builtin_HEXAGON_S2_valignrb",
+    "llvm.hexagon.S2.vcnegh" => "__builtin_HEXAGON_S2_vcnegh",
+    "llvm.hexagon.S2.vcrotate" => "__builtin_HEXAGON_S2_vcrotate",
+    "llvm.hexagon.S2.vrcnegh" => "__builtin_HEXAGON_S2_vrcnegh",
+    "llvm.hexagon.S2.vrndpackwh" => "__builtin_HEXAGON_S2_vrndpackwh",
+    "llvm.hexagon.S2.vrndpackwhs" => "__builtin_HEXAGON_S2_vrndpackwhs",
+    "llvm.hexagon.S2.vsathb" => "__builtin_HEXAGON_S2_vsathb",
+    "llvm.hexagon.S2.vsathb.nopack" => "__builtin_HEXAGON_S2_vsathb_nopack",
+    "llvm.hexagon.S2.vsathub" => "__builtin_HEXAGON_S2_vsathub",
+    "llvm.hexagon.S2.vsathub.nopack" => "__builtin_HEXAGON_S2_vsathub_nopack",
+    "llvm.hexagon.S2.vsatwh" => "__builtin_HEXAGON_S2_vsatwh",
+    "llvm.hexagon.S2.vsatwh.nopack" => "__builtin_HEXAGON_S2_vsatwh_nopack",
+    "llvm.hexagon.S2.vsatwuh" => "__builtin_HEXAGON_S2_vsatwuh",
+    "llvm.hexagon.S2.vsatwuh.nopack" => "__builtin_HEXAGON_S2_vsatwuh_nopack",
+    "llvm.hexagon.S2.vsplatrb" => "__builtin_HEXAGON_S2_vsplatrb",
+    "llvm.hexagon.S2.vsplatrh" => "__builtin_HEXAGON_S2_vsplatrh",
+    "llvm.hexagon.S2.vspliceib" => "__builtin_HEXAGON_S2_vspliceib",
+    "llvm.hexagon.S2.vsplicerb" => "__builtin_HEXAGON_S2_vsplicerb",
+    "llvm.hexagon.S2.vsxtbh" => "__builtin_HEXAGON_S2_vsxtbh",
+    "llvm.hexagon.S2.vsxthw" => "__builtin_HEXAGON_S2_vsxthw",
+    "llvm.hexagon.S2.vtrunehb" => "__builtin_HEXAGON_S2_vtrunehb",
+    "llvm.hexagon.S2.vtrunewh" => "__builtin_HEXAGON_S2_vtrunewh",
+    "llvm.hexagon.S2.vtrunohb" => "__builtin_HEXAGON_S2_vtrunohb",
+    "llvm.hexagon.S2.vtrunowh" => "__builtin_HEXAGON_S2_vtrunowh",
+    "llvm.hexagon.S2.vzxtbh" => "__builtin_HEXAGON_S2_vzxtbh",
+    "llvm.hexagon.S2.vzxthw" => "__builtin_HEXAGON_S2_vzxthw",
+    "llvm.hexagon.S4.addaddi" => "__builtin_HEXAGON_S4_addaddi",
+    "llvm.hexagon.S4.addi.asl.ri" => "__builtin_HEXAGON_S4_addi_asl_ri",
+    "llvm.hexagon.S4.addi.lsr.ri" => "__builtin_HEXAGON_S4_addi_lsr_ri",
+    "llvm.hexagon.S4.andi.asl.ri" => "__builtin_HEXAGON_S4_andi_asl_ri",
+    "llvm.hexagon.S4.andi.lsr.ri" => "__builtin_HEXAGON_S4_andi_lsr_ri",
+    "llvm.hexagon.S4.clbaddi" => "__builtin_HEXAGON_S4_clbaddi",
+    "llvm.hexagon.S4.clbpaddi" => "__builtin_HEXAGON_S4_clbpaddi",
+    "llvm.hexagon.S4.clbpnorm" => "__builtin_HEXAGON_S4_clbpnorm",
+    "llvm.hexagon.S4.extract" => "__builtin_HEXAGON_S4_extract",
+    "llvm.hexagon.S4.extract.rp" => "__builtin_HEXAGON_S4_extract_rp",
+    "llvm.hexagon.S4.extractp" => "__builtin_HEXAGON_S4_extractp",
+    "llvm.hexagon.S4.extractp.rp" => "__builtin_HEXAGON_S4_extractp_rp",
+    "llvm.hexagon.S4.lsli" => "__builtin_HEXAGON_S4_lsli",
+    "llvm.hexagon.S4.ntstbit.i" => "__builtin_HEXAGON_S4_ntstbit_i",
+    "llvm.hexagon.S4.ntstbit.r" => "__builtin_HEXAGON_S4_ntstbit_r",
+    "llvm.hexagon.S4.or.andi" => "__builtin_HEXAGON_S4_or_andi",
+    "llvm.hexagon.S4.or.andix" => "__builtin_HEXAGON_S4_or_andix",
+    "llvm.hexagon.S4.or.ori" => "__builtin_HEXAGON_S4_or_ori",
+    "llvm.hexagon.S4.ori.asl.ri" => "__builtin_HEXAGON_S4_ori_asl_ri",
+    "llvm.hexagon.S4.ori.lsr.ri" => "__builtin_HEXAGON_S4_ori_lsr_ri",
+    "llvm.hexagon.S4.parity" => "__builtin_HEXAGON_S4_parity",
+    "llvm.hexagon.S4.subaddi" => "__builtin_HEXAGON_S4_subaddi",
+    "llvm.hexagon.S4.subi.asl.ri" => "__builtin_HEXAGON_S4_subi_asl_ri",
+    "llvm.hexagon.S4.subi.lsr.ri" => "__builtin_HEXAGON_S4_subi_lsr_ri",
+    "llvm.hexagon.S4.vrcrotate" => "__builtin_HEXAGON_S4_vrcrotate",
+    "llvm.hexagon.S4.vrcrotate.acc" => "__builtin_HEXAGON_S4_vrcrotate_acc",
+    "llvm.hexagon.S4.vxaddsubh" => "__builtin_HEXAGON_S4_vxaddsubh",
+    "llvm.hexagon.S4.vxaddsubhr" => "__builtin_HEXAGON_S4_vxaddsubhr",
+    "llvm.hexagon.S4.vxaddsubw" => "__builtin_HEXAGON_S4_vxaddsubw",
+    "llvm.hexagon.S4.vxsubaddh" => "__builtin_HEXAGON_S4_vxsubaddh",
+    "llvm.hexagon.S4.vxsubaddhr" => "__builtin_HEXAGON_S4_vxsubaddhr",
+    "llvm.hexagon.S4.vxsubaddw" => "__builtin_HEXAGON_S4_vxsubaddw",
+    "llvm.hexagon.S5.asrhub.rnd.sat.goodsyntax" => "__builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax",
+    "llvm.hexagon.S5.asrhub.sat" => "__builtin_HEXAGON_S5_asrhub_sat",
+    "llvm.hexagon.S5.popcountp" => "__builtin_HEXAGON_S5_popcountp",
+    "llvm.hexagon.S5.vasrhrnd.goodsyntax" => "__builtin_HEXAGON_S5_vasrhrnd_goodsyntax",
+    "llvm.hexagon.SI.to.SXTHI.asrh" => "__builtin_SI_to_SXTHI_asrh",
+    "llvm.hexagon.circ.ldd" => "__builtin_circ_ldd",
     // mips
     "llvm.mips.absq.s.ph" => "__builtin_mips_absq_s_ph",
     "llvm.mips.absq.s.qb" => "__builtin_mips_absq_s_qb",
@@ -887,7 +1775,531 @@ match name {
     "llvm.mips.xor.v" => "__builtin_msa_xor_v",
     "llvm.mips.xori.b" => "__builtin_msa_xori_b",
     // nvvm
+    "llvm.nvvm.abs.i" => "__nvvm_abs_i",
+    "llvm.nvvm.abs.ll" => "__nvvm_abs_ll",
+    "llvm.nvvm.add.rm.d" => "__nvvm_add_rm_d",
+    "llvm.nvvm.add.rm.f" => "__nvvm_add_rm_f",
+    "llvm.nvvm.add.rm.ftz.f" => "__nvvm_add_rm_ftz_f",
+    "llvm.nvvm.add.rn.d" => "__nvvm_add_rn_d",
+    "llvm.nvvm.add.rn.f" => "__nvvm_add_rn_f",
+    "llvm.nvvm.add.rn.ftz.f" => "__nvvm_add_rn_ftz_f",
+    "llvm.nvvm.add.rp.d" => "__nvvm_add_rp_d",
+    "llvm.nvvm.add.rp.f" => "__nvvm_add_rp_f",
+    "llvm.nvvm.add.rp.ftz.f" => "__nvvm_add_rp_ftz_f",
+    "llvm.nvvm.add.rz.d" => "__nvvm_add_rz_d",
+    "llvm.nvvm.add.rz.f" => "__nvvm_add_rz_f",
+    "llvm.nvvm.add.rz.ftz.f" => "__nvvm_add_rz_ftz_f",
+    "llvm.nvvm.barrier0" => "__nvvm_bar0",
+    "llvm.nvvm.barrier0.and" => "__nvvm_bar0_and",
+    "llvm.nvvm.barrier0.or" => "__nvvm_bar0_or",
+    "llvm.nvvm.barrier0.popc" => "__nvvm_bar0_popc",
+    "llvm.nvvm.bitcast.d2ll" => "__nvvm_bitcast_d2ll",
+    "llvm.nvvm.bitcast.f2i" => "__nvvm_bitcast_f2i",
+    "llvm.nvvm.bitcast.i2f" => "__nvvm_bitcast_i2f",
+    "llvm.nvvm.bitcast.ll2d" => "__nvvm_bitcast_ll2d",
+    "llvm.nvvm.brev32" => "__nvvm_brev32",
+    "llvm.nvvm.brev64" => "__nvvm_brev64",
+    "llvm.nvvm.ceil.d" => "__nvvm_ceil_d",
+    "llvm.nvvm.ceil.f" => "__nvvm_ceil_f",
+    "llvm.nvvm.ceil.ftz.f" => "__nvvm_ceil_ftz_f",
+    "llvm.nvvm.clz.i" => "__nvvm_clz_i",
+    "llvm.nvvm.clz.ll" => "__nvvm_clz_ll",
+    "llvm.nvvm.cos.approx.f" => "__nvvm_cos_approx_f",
+    "llvm.nvvm.cos.approx.ftz.f" => "__nvvm_cos_approx_ftz_f",
+    "llvm.nvvm.d2f.rm" => "__nvvm_d2f_rm",
+    "llvm.nvvm.d2f.rm.ftz" => "__nvvm_d2f_rm_ftz",
+    "llvm.nvvm.d2f.rn" => "__nvvm_d2f_rn",
+    "llvm.nvvm.d2f.rn.ftz" => "__nvvm_d2f_rn_ftz",
+    "llvm.nvvm.d2f.rp" => "__nvvm_d2f_rp",
+    "llvm.nvvm.d2f.rp.ftz" => "__nvvm_d2f_rp_ftz",
+    "llvm.nvvm.d2f.rz" => "__nvvm_d2f_rz",
+    "llvm.nvvm.d2f.rz.ftz" => "__nvvm_d2f_rz_ftz",
+    "llvm.nvvm.d2i.hi" => "__nvvm_d2i_hi",
+    "llvm.nvvm.d2i.lo" => "__nvvm_d2i_lo",
+    "llvm.nvvm.d2i.rm" => "__nvvm_d2i_rm",
+    "llvm.nvvm.d2i.rn" => "__nvvm_d2i_rn",
+    "llvm.nvvm.d2i.rp" => "__nvvm_d2i_rp",
+    "llvm.nvvm.d2i.rz" => "__nvvm_d2i_rz",
+    "llvm.nvvm.d2ll.rm" => "__nvvm_d2ll_rm",
+    "llvm.nvvm.d2ll.rn" => "__nvvm_d2ll_rn",
+    "llvm.nvvm.d2ll.rp" => "__nvvm_d2ll_rp",
+    "llvm.nvvm.d2ll.rz" => "__nvvm_d2ll_rz",
+    "llvm.nvvm.d2ui.rm" => "__nvvm_d2ui_rm",
+    "llvm.nvvm.d2ui.rn" => "__nvvm_d2ui_rn",
+    "llvm.nvvm.d2ui.rp" => "__nvvm_d2ui_rp",
+    "llvm.nvvm.d2ui.rz" => "__nvvm_d2ui_rz",
+    "llvm.nvvm.d2ull.rm" => "__nvvm_d2ull_rm",
+    "llvm.nvvm.d2ull.rn" => "__nvvm_d2ull_rn",
+    "llvm.nvvm.d2ull.rp" => "__nvvm_d2ull_rp",
+    "llvm.nvvm.d2ull.rz" => "__nvvm_d2ull_rz",
+    "llvm.nvvm.div.approx.f" => "__nvvm_div_approx_f",
+    "llvm.nvvm.div.approx.ftz.f" => "__nvvm_div_approx_ftz_f",
+    "llvm.nvvm.div.rm.d" => "__nvvm_div_rm_d",
+    "llvm.nvvm.div.rm.f" => "__nvvm_div_rm_f",
+    "llvm.nvvm.div.rm.ftz.f" => "__nvvm_div_rm_ftz_f",
+    "llvm.nvvm.div.rn.d" => "__nvvm_div_rn_d",
+    "llvm.nvvm.div.rn.f" => "__nvvm_div_rn_f",
+    "llvm.nvvm.div.rn.ftz.f" => "__nvvm_div_rn_ftz_f",
+    "llvm.nvvm.div.rp.d" => "__nvvm_div_rp_d",
+    "llvm.nvvm.div.rp.f" => "__nvvm_div_rp_f",
+    "llvm.nvvm.div.rp.ftz.f" => "__nvvm_div_rp_ftz_f",
+    "llvm.nvvm.div.rz.d" => "__nvvm_div_rz_d",
+    "llvm.nvvm.div.rz.f" => "__nvvm_div_rz_f",
+    "llvm.nvvm.div.rz.ftz.f" => "__nvvm_div_rz_ftz_f",
+    "llvm.nvvm.ex2.approx.d" => "__nvvm_ex2_approx_d",
+    "llvm.nvvm.ex2.approx.f" => "__nvvm_ex2_approx_f",
+    "llvm.nvvm.ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f",
+    "llvm.nvvm.f2h.rn" => "__nvvm_f2h_rn",
+    "llvm.nvvm.f2h.rn.ftz" => "__nvvm_f2h_rn_ftz",
+    "llvm.nvvm.f2i.rm" => "__nvvm_f2i_rm",
+    "llvm.nvvm.f2i.rm.ftz" => "__nvvm_f2i_rm_ftz",
+    "llvm.nvvm.f2i.rn" => "__nvvm_f2i_rn",
+    "llvm.nvvm.f2i.rn.ftz" => "__nvvm_f2i_rn_ftz",
+    "llvm.nvvm.f2i.rp" => "__nvvm_f2i_rp",
+    "llvm.nvvm.f2i.rp.ftz" => "__nvvm_f2i_rp_ftz",
+    "llvm.nvvm.f2i.rz" => "__nvvm_f2i_rz",
+    "llvm.nvvm.f2i.rz.ftz" => "__nvvm_f2i_rz_ftz",
+    "llvm.nvvm.f2ll.rm" => "__nvvm_f2ll_rm",
+    "llvm.nvvm.f2ll.rm.ftz" => "__nvvm_f2ll_rm_ftz",
+    "llvm.nvvm.f2ll.rn" => "__nvvm_f2ll_rn",
+    "llvm.nvvm.f2ll.rn.ftz" => "__nvvm_f2ll_rn_ftz",
+    "llvm.nvvm.f2ll.rp" => "__nvvm_f2ll_rp",
+    "llvm.nvvm.f2ll.rp.ftz" => "__nvvm_f2ll_rp_ftz",
+    "llvm.nvvm.f2ll.rz" => "__nvvm_f2ll_rz",
+    "llvm.nvvm.f2ll.rz.ftz" => "__nvvm_f2ll_rz_ftz",
+    "llvm.nvvm.f2ui.rm" => "__nvvm_f2ui_rm",
+    "llvm.nvvm.f2ui.rm.ftz" => "__nvvm_f2ui_rm_ftz",
+    "llvm.nvvm.f2ui.rn" => "__nvvm_f2ui_rn",
+    "llvm.nvvm.f2ui.rn.ftz" => "__nvvm_f2ui_rn_ftz",
+    "llvm.nvvm.f2ui.rp" => "__nvvm_f2ui_rp",
+    "llvm.nvvm.f2ui.rp.ftz" => "__nvvm_f2ui_rp_ftz",
+    "llvm.nvvm.f2ui.rz" => "__nvvm_f2ui_rz",
+    "llvm.nvvm.f2ui.rz.ftz" => "__nvvm_f2ui_rz_ftz",
+    "llvm.nvvm.f2ull.rm" => "__nvvm_f2ull_rm",
+    "llvm.nvvm.f2ull.rm.ftz" => "__nvvm_f2ull_rm_ftz",
+    "llvm.nvvm.f2ull.rn" => "__nvvm_f2ull_rn",
+    "llvm.nvvm.f2ull.rn.ftz" => "__nvvm_f2ull_rn_ftz",
+    "llvm.nvvm.f2ull.rp" => "__nvvm_f2ull_rp",
+    "llvm.nvvm.f2ull.rp.ftz" => "__nvvm_f2ull_rp_ftz",
+    "llvm.nvvm.f2ull.rz" => "__nvvm_f2ull_rz",
+    "llvm.nvvm.f2ull.rz.ftz" => "__nvvm_f2ull_rz_ftz",
+    "llvm.nvvm.fabs.d" => "__nvvm_fabs_d",
+    "llvm.nvvm.fabs.f" => "__nvvm_fabs_f",
+    "llvm.nvvm.fabs.ftz.f" => "__nvvm_fabs_ftz_f",
+    "llvm.nvvm.floor.d" => "__nvvm_floor_d",
+    "llvm.nvvm.floor.f" => "__nvvm_floor_f",
+    "llvm.nvvm.floor.ftz.f" => "__nvvm_floor_ftz_f",
+    "llvm.nvvm.fma.rm.d" => "__nvvm_fma_rm_d",
+    "llvm.nvvm.fma.rm.f" => "__nvvm_fma_rm_f",
+    "llvm.nvvm.fma.rm.ftz.f" => "__nvvm_fma_rm_ftz_f",
+    "llvm.nvvm.fma.rn.d" => "__nvvm_fma_rn_d",
+    "llvm.nvvm.fma.rn.f" => "__nvvm_fma_rn_f",
+    "llvm.nvvm.fma.rn.ftz.f" => "__nvvm_fma_rn_ftz_f",
+    "llvm.nvvm.fma.rp.d" => "__nvvm_fma_rp_d",
+    "llvm.nvvm.fma.rp.f" => "__nvvm_fma_rp_f",
+    "llvm.nvvm.fma.rp.ftz.f" => "__nvvm_fma_rp_ftz_f",
+    "llvm.nvvm.fma.rz.d" => "__nvvm_fma_rz_d",
+    "llvm.nvvm.fma.rz.f" => "__nvvm_fma_rz_f",
+    "llvm.nvvm.fma.rz.ftz.f" => "__nvvm_fma_rz_ftz_f",
+    "llvm.nvvm.fmax.d" => "__nvvm_fmax_d",
+    "llvm.nvvm.fmax.f" => "__nvvm_fmax_f",
+    "llvm.nvvm.fmax.ftz.f" => "__nvvm_fmax_ftz_f",
+    "llvm.nvvm.fmin.d" => "__nvvm_fmin_d",
+    "llvm.nvvm.fmin.f" => "__nvvm_fmin_f",
+    "llvm.nvvm.fmin.ftz.f" => "__nvvm_fmin_ftz_f",
+    "llvm.nvvm.h2f" => "__nvvm_h2f",
+    "llvm.nvvm.i2d.rm" => "__nvvm_i2d_rm",
+    "llvm.nvvm.i2d.rn" => "__nvvm_i2d_rn",
+    "llvm.nvvm.i2d.rp" => "__nvvm_i2d_rp",
+    "llvm.nvvm.i2d.rz" => "__nvvm_i2d_rz",
+    "llvm.nvvm.i2f.rm" => "__nvvm_i2f_rm",
+    "llvm.nvvm.i2f.rn" => "__nvvm_i2f_rn",
+    "llvm.nvvm.i2f.rp" => "__nvvm_i2f_rp",
+    "llvm.nvvm.i2f.rz" => "__nvvm_i2f_rz",
+    "llvm.nvvm.isspacep.const" => "__nvvm_isspacep_const",
+    "llvm.nvvm.isspacep.global" => "__nvvm_isspacep_global",
+    "llvm.nvvm.isspacep.local" => "__nvvm_isspacep_local",
+    "llvm.nvvm.isspacep.shared" => "__nvvm_isspacep_shared",
+    "llvm.nvvm.istypep.sampler" => "__nvvm_istypep_sampler",
+    "llvm.nvvm.istypep.surface" => "__nvvm_istypep_surface",
+    "llvm.nvvm.istypep.texture" => "__nvvm_istypep_texture",
+    "llvm.nvvm.lg2.approx.d" => "__nvvm_lg2_approx_d",
+    "llvm.nvvm.lg2.approx.f" => "__nvvm_lg2_approx_f",
+    "llvm.nvvm.lg2.approx.ftz.f" => "__nvvm_lg2_approx_ftz_f",
+    "llvm.nvvm.ll2d.rm" => "__nvvm_ll2d_rm",
+    "llvm.nvvm.ll2d.rn" => "__nvvm_ll2d_rn",
+    "llvm.nvvm.ll2d.rp" => "__nvvm_ll2d_rp",
+    "llvm.nvvm.ll2d.rz" => "__nvvm_ll2d_rz",
+    "llvm.nvvm.ll2f.rm" => "__nvvm_ll2f_rm",
+    "llvm.nvvm.ll2f.rn" => "__nvvm_ll2f_rn",
+    "llvm.nvvm.ll2f.rp" => "__nvvm_ll2f_rp",
+    "llvm.nvvm.ll2f.rz" => "__nvvm_ll2f_rz",
+    "llvm.nvvm.lohi.i2d" => "__nvvm_lohi_i2d",
+    "llvm.nvvm.max.i" => "__nvvm_max_i",
+    "llvm.nvvm.max.ll" => "__nvvm_max_ll",
+    "llvm.nvvm.max.ui" => "__nvvm_max_ui",
+    "llvm.nvvm.max.ull" => "__nvvm_max_ull",
+    "llvm.nvvm.membar.cta" => "__nvvm_membar_cta",
+    "llvm.nvvm.membar.gl" => "__nvvm_membar_gl",
+    "llvm.nvvm.membar.sys" => "__nvvm_membar_sys",
+    "llvm.nvvm.min.i" => "__nvvm_min_i",
+    "llvm.nvvm.min.ll" => "__nvvm_min_ll",
+    "llvm.nvvm.min.ui" => "__nvvm_min_ui",
+    "llvm.nvvm.min.ull" => "__nvvm_min_ull",
+    "llvm.nvvm.mul.rm.d" => "__nvvm_mul_rm_d",
+    "llvm.nvvm.mul.rm.f" => "__nvvm_mul_rm_f",
+    "llvm.nvvm.mul.rm.ftz.f" => "__nvvm_mul_rm_ftz_f",
+    "llvm.nvvm.mul.rn.d" => "__nvvm_mul_rn_d",
+    "llvm.nvvm.mul.rn.f" => "__nvvm_mul_rn_f",
+    "llvm.nvvm.mul.rn.ftz.f" => "__nvvm_mul_rn_ftz_f",
+    "llvm.nvvm.mul.rp.d" => "__nvvm_mul_rp_d",
+    "llvm.nvvm.mul.rp.f" => "__nvvm_mul_rp_f",
+    "llvm.nvvm.mul.rp.ftz.f" => "__nvvm_mul_rp_ftz_f",
+    "llvm.nvvm.mul.rz.d" => "__nvvm_mul_rz_d",
+    "llvm.nvvm.mul.rz.f" => "__nvvm_mul_rz_f",
+    "llvm.nvvm.mul.rz.ftz.f" => "__nvvm_mul_rz_ftz_f",
+    "llvm.nvvm.mul24.i" => "__nvvm_mul24_i",
+    "llvm.nvvm.mul24.ui" => "__nvvm_mul24_ui",
+    "llvm.nvvm.mulhi.i" => "__nvvm_mulhi_i",
+    "llvm.nvvm.mulhi.ll" => "__nvvm_mulhi_ll",
+    "llvm.nvvm.mulhi.ui" => "__nvvm_mulhi_ui",
+    "llvm.nvvm.mulhi.ull" => "__nvvm_mulhi_ull",
+    "llvm.nvvm.popc.i" => "__nvvm_popc_i",
+    "llvm.nvvm.popc.ll" => "__nvvm_popc_ll",
     "llvm.nvvm.prmt" => "__nvvm_prmt",
+    "llvm.nvvm.rcp.approx.ftz.d" => "__nvvm_rcp_approx_ftz_d",
+    "llvm.nvvm.rcp.rm.d" => "__nvvm_rcp_rm_d",
+    "llvm.nvvm.rcp.rm.f" => "__nvvm_rcp_rm_f",
+    "llvm.nvvm.rcp.rm.ftz.f" => "__nvvm_rcp_rm_ftz_f",
+    "llvm.nvvm.rcp.rn.d" => "__nvvm_rcp_rn_d",
+    "llvm.nvvm.rcp.rn.f" => "__nvvm_rcp_rn_f",
+    "llvm.nvvm.rcp.rn.ftz.f" => "__nvvm_rcp_rn_ftz_f",
+    "llvm.nvvm.rcp.rp.d" => "__nvvm_rcp_rp_d",
+    "llvm.nvvm.rcp.rp.f" => "__nvvm_rcp_rp_f",
+    "llvm.nvvm.rcp.rp.ftz.f" => "__nvvm_rcp_rp_ftz_f",
+    "llvm.nvvm.rcp.rz.d" => "__nvvm_rcp_rz_d",
+    "llvm.nvvm.rcp.rz.f" => "__nvvm_rcp_rz_f",
+    "llvm.nvvm.rcp.rz.ftz.f" => "__nvvm_rcp_rz_ftz_f",
+    "llvm.nvvm.read.ptx.sreg.ctaid.x" => "__nvvm_read_ptx_sreg_ctaid_x",
+    "llvm.nvvm.read.ptx.sreg.ctaid.y" => "__nvvm_read_ptx_sreg_ctaid_y",
+    "llvm.nvvm.read.ptx.sreg.ctaid.z" => "__nvvm_read_ptx_sreg_ctaid_z",
+    "llvm.nvvm.read.ptx.sreg.envreg0" => "__nvvm_read_ptx_sreg_envreg0",
+    "llvm.nvvm.read.ptx.sreg.envreg1" => "__nvvm_read_ptx_sreg_envreg1",
+    "llvm.nvvm.read.ptx.sreg.envreg10" => "__nvvm_read_ptx_sreg_envreg10",
+    "llvm.nvvm.read.ptx.sreg.envreg11" => "__nvvm_read_ptx_sreg_envreg11",
+    "llvm.nvvm.read.ptx.sreg.envreg12" => "__nvvm_read_ptx_sreg_envreg12",
+    "llvm.nvvm.read.ptx.sreg.envreg13" => "__nvvm_read_ptx_sreg_envreg13",
+    "llvm.nvvm.read.ptx.sreg.envreg14" => "__nvvm_read_ptx_sreg_envreg14",
+    "llvm.nvvm.read.ptx.sreg.envreg15" => "__nvvm_read_ptx_sreg_envreg15",
+    "llvm.nvvm.read.ptx.sreg.envreg16" => "__nvvm_read_ptx_sreg_envreg16",
+    "llvm.nvvm.read.ptx.sreg.envreg17" => "__nvvm_read_ptx_sreg_envreg17",
+    "llvm.nvvm.read.ptx.sreg.envreg18" => "__nvvm_read_ptx_sreg_envreg18",
+    "llvm.nvvm.read.ptx.sreg.envreg19" => "__nvvm_read_ptx_sreg_envreg19",
+    "llvm.nvvm.read.ptx.sreg.envreg2" => "__nvvm_read_ptx_sreg_envreg2",
+    "llvm.nvvm.read.ptx.sreg.envreg20" => "__nvvm_read_ptx_sreg_envreg20",
+    "llvm.nvvm.read.ptx.sreg.envreg21" => "__nvvm_read_ptx_sreg_envreg21",
+    "llvm.nvvm.read.ptx.sreg.envreg22" => "__nvvm_read_ptx_sreg_envreg22",
+    "llvm.nvvm.read.ptx.sreg.envreg23" => "__nvvm_read_ptx_sreg_envreg23",
+    "llvm.nvvm.read.ptx.sreg.envreg24" => "__nvvm_read_ptx_sreg_envreg24",
+    "llvm.nvvm.read.ptx.sreg.envreg25" => "__nvvm_read_ptx_sreg_envreg25",
+    "llvm.nvvm.read.ptx.sreg.envreg26" => "__nvvm_read_ptx_sreg_envreg26",
+    "llvm.nvvm.read.ptx.sreg.envreg27" => "__nvvm_read_ptx_sreg_envreg27",
+    "llvm.nvvm.read.ptx.sreg.envreg28" => "__nvvm_read_ptx_sreg_envreg28",
+    "llvm.nvvm.read.ptx.sreg.envreg29" => "__nvvm_read_ptx_sreg_envreg29",
+    "llvm.nvvm.read.ptx.sreg.envreg3" => "__nvvm_read_ptx_sreg_envreg3",
+    "llvm.nvvm.read.ptx.sreg.envreg30" => "__nvvm_read_ptx_sreg_envreg30",
+    "llvm.nvvm.read.ptx.sreg.envreg31" => "__nvvm_read_ptx_sreg_envreg31",
+    "llvm.nvvm.read.ptx.sreg.envreg4" => "__nvvm_read_ptx_sreg_envreg4",
+    "llvm.nvvm.read.ptx.sreg.envreg5" => "__nvvm_read_ptx_sreg_envreg5",
+    "llvm.nvvm.read.ptx.sreg.envreg6" => "__nvvm_read_ptx_sreg_envreg6",
+    "llvm.nvvm.read.ptx.sreg.envreg7" => "__nvvm_read_ptx_sreg_envreg7",
+    "llvm.nvvm.read.ptx.sreg.envreg8" => "__nvvm_read_ptx_sreg_envreg8",
+    "llvm.nvvm.read.ptx.sreg.envreg9" => "__nvvm_read_ptx_sreg_envreg9",
+    "llvm.nvvm.read.ptx.sreg.nctaid.x" => "__nvvm_read_ptx_sreg_nctaid_x",
+    "llvm.nvvm.read.ptx.sreg.nctaid.y" => "__nvvm_read_ptx_sreg_nctaid_y",
+    "llvm.nvvm.read.ptx.sreg.nctaid.z" => "__nvvm_read_ptx_sreg_nctaid_z",
+    "llvm.nvvm.read.ptx.sreg.ntid.x" => "__nvvm_read_ptx_sreg_ntid_x",
+    "llvm.nvvm.read.ptx.sreg.ntid.y" => "__nvvm_read_ptx_sreg_ntid_y",
+    "llvm.nvvm.read.ptx.sreg.ntid.z" => "__nvvm_read_ptx_sreg_ntid_z",
+    "llvm.nvvm.read.ptx.sreg.tid.x" => "__nvvm_read_ptx_sreg_tid_x",
+    "llvm.nvvm.read.ptx.sreg.tid.y" => "__nvvm_read_ptx_sreg_tid_y",
+    "llvm.nvvm.read.ptx.sreg.tid.z" => "__nvvm_read_ptx_sreg_tid_z",
+    "llvm.nvvm.read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_warpsize",
+    "llvm.nvvm.rotate.b32" => "__nvvm_rotate_b32",
+    "llvm.nvvm.rotate.b64" => "__nvvm_rotate_b64",
+    "llvm.nvvm.rotate.right.b64" => "__nvvm_rotate_right_b64",
+    "llvm.nvvm.round.d" => "__nvvm_round_d",
+    "llvm.nvvm.round.f" => "__nvvm_round_f",
+    "llvm.nvvm.round.ftz.f" => "__nvvm_round_ftz_f",
+    "llvm.nvvm.rsqrt.approx.d" => "__nvvm_rsqrt_approx_d",
+    "llvm.nvvm.rsqrt.approx.f" => "__nvvm_rsqrt_approx_f",
+    "llvm.nvvm.rsqrt.approx.ftz.f" => "__nvvm_rsqrt_approx_ftz_f",
+    "llvm.nvvm.sad.i" => "__nvvm_sad_i",
+    "llvm.nvvm.sad.ui" => "__nvvm_sad_ui",
+    "llvm.nvvm.saturate.d" => "__nvvm_saturate_d",
+    "llvm.nvvm.saturate.f" => "__nvvm_saturate_f",
+    "llvm.nvvm.saturate.ftz.f" => "__nvvm_saturate_ftz_f",
+    "llvm.nvvm.sin.approx.f" => "__nvvm_sin_approx_f",
+    "llvm.nvvm.sin.approx.ftz.f" => "__nvvm_sin_approx_ftz_f",
+    "llvm.nvvm.sqrt.approx.f" => "__nvvm_sqrt_approx_f",
+    "llvm.nvvm.sqrt.approx.ftz.f" => "__nvvm_sqrt_approx_ftz_f",
+    "llvm.nvvm.sqrt.f" => "__nvvm_sqrt_f",
+    "llvm.nvvm.sqrt.rm.d" => "__nvvm_sqrt_rm_d",
+    "llvm.nvvm.sqrt.rm.f" => "__nvvm_sqrt_rm_f",
+    "llvm.nvvm.sqrt.rm.ftz.f" => "__nvvm_sqrt_rm_ftz_f",
+    "llvm.nvvm.sqrt.rn.d" => "__nvvm_sqrt_rn_d",
+    "llvm.nvvm.sqrt.rn.f" => "__nvvm_sqrt_rn_f",
+    "llvm.nvvm.sqrt.rn.ftz.f" => "__nvvm_sqrt_rn_ftz_f",
+    "llvm.nvvm.sqrt.rp.d" => "__nvvm_sqrt_rp_d",
+    "llvm.nvvm.sqrt.rp.f" => "__nvvm_sqrt_rp_f",
+    "llvm.nvvm.sqrt.rp.ftz.f" => "__nvvm_sqrt_rp_ftz_f",
+    "llvm.nvvm.sqrt.rz.d" => "__nvvm_sqrt_rz_d",
+    "llvm.nvvm.sqrt.rz.f" => "__nvvm_sqrt_rz_f",
+    "llvm.nvvm.sqrt.rz.ftz.f" => "__nvvm_sqrt_rz_ftz_f",
+    "llvm.nvvm.suq.array.size" => "__nvvm_suq_array_size",
+    "llvm.nvvm.suq.channel.data.type" => "__nvvm_suq_channel_data_type",
+    "llvm.nvvm.suq.channel.order" => "__nvvm_suq_channel_order",
+    "llvm.nvvm.suq.depth" => "__nvvm_suq_depth",
+    "llvm.nvvm.suq.height" => "__nvvm_suq_height",
+    "llvm.nvvm.suq.width" => "__nvvm_suq_width",
+    "llvm.nvvm.sust.b.1d.array.i16.clamp" => "__nvvm_sust_b_1d_array_i16_clamp",
+    "llvm.nvvm.sust.b.1d.array.i16.trap" => "__nvvm_sust_b_1d_array_i16_trap",
+    "llvm.nvvm.sust.b.1d.array.i16.zero" => "__nvvm_sust_b_1d_array_i16_zero",
+    "llvm.nvvm.sust.b.1d.array.i32.clamp" => "__nvvm_sust_b_1d_array_i32_clamp",
+    "llvm.nvvm.sust.b.1d.array.i32.trap" => "__nvvm_sust_b_1d_array_i32_trap",
+    "llvm.nvvm.sust.b.1d.array.i32.zero" => "__nvvm_sust_b_1d_array_i32_zero",
+    "llvm.nvvm.sust.b.1d.array.i64.clamp" => "__nvvm_sust_b_1d_array_i64_clamp",
+    "llvm.nvvm.sust.b.1d.array.i64.trap" => "__nvvm_sust_b_1d_array_i64_trap",
+    "llvm.nvvm.sust.b.1d.array.i64.zero" => "__nvvm_sust_b_1d_array_i64_zero",
+    "llvm.nvvm.sust.b.1d.array.i8.clamp" => "__nvvm_sust_b_1d_array_i8_clamp",
+    "llvm.nvvm.sust.b.1d.array.i8.trap" => "__nvvm_sust_b_1d_array_i8_trap",
+    "llvm.nvvm.sust.b.1d.array.i8.zero" => "__nvvm_sust_b_1d_array_i8_zero",
+    "llvm.nvvm.sust.b.1d.array.v2i16.clamp" => "__nvvm_sust_b_1d_array_v2i16_clamp",
+    "llvm.nvvm.sust.b.1d.array.v2i16.trap" => "__nvvm_sust_b_1d_array_v2i16_trap",
+    "llvm.nvvm.sust.b.1d.array.v2i16.zero" => "__nvvm_sust_b_1d_array_v2i16_zero",
+    "llvm.nvvm.sust.b.1d.array.v2i32.clamp" => "__nvvm_sust_b_1d_array_v2i32_clamp",
+    "llvm.nvvm.sust.b.1d.array.v2i32.trap" => "__nvvm_sust_b_1d_array_v2i32_trap",
+    "llvm.nvvm.sust.b.1d.array.v2i32.zero" => "__nvvm_sust_b_1d_array_v2i32_zero",
+    "llvm.nvvm.sust.b.1d.array.v2i64.clamp" => "__nvvm_sust_b_1d_array_v2i64_clamp",
+    "llvm.nvvm.sust.b.1d.array.v2i64.trap" => "__nvvm_sust_b_1d_array_v2i64_trap",
+    "llvm.nvvm.sust.b.1d.array.v2i64.zero" => "__nvvm_sust_b_1d_array_v2i64_zero",
+    "llvm.nvvm.sust.b.1d.array.v2i8.clamp" => "__nvvm_sust_b_1d_array_v2i8_clamp",
+    "llvm.nvvm.sust.b.1d.array.v2i8.trap" => "__nvvm_sust_b_1d_array_v2i8_trap",
+    "llvm.nvvm.sust.b.1d.array.v2i8.zero" => "__nvvm_sust_b_1d_array_v2i8_zero",
+    "llvm.nvvm.sust.b.1d.array.v4i16.clamp" => "__nvvm_sust_b_1d_array_v4i16_clamp",
+    "llvm.nvvm.sust.b.1d.array.v4i16.trap" => "__nvvm_sust_b_1d_array_v4i16_trap",
+    "llvm.nvvm.sust.b.1d.array.v4i16.zero" => "__nvvm_sust_b_1d_array_v4i16_zero",
+    "llvm.nvvm.sust.b.1d.array.v4i32.clamp" => "__nvvm_sust_b_1d_array_v4i32_clamp",
+    "llvm.nvvm.sust.b.1d.array.v4i32.trap" => "__nvvm_sust_b_1d_array_v4i32_trap",
+    "llvm.nvvm.sust.b.1d.array.v4i32.zero" => "__nvvm_sust_b_1d_array_v4i32_zero",
+    "llvm.nvvm.sust.b.1d.array.v4i8.clamp" => "__nvvm_sust_b_1d_array_v4i8_clamp",
+    "llvm.nvvm.sust.b.1d.array.v4i8.trap" => "__nvvm_sust_b_1d_array_v4i8_trap",
+    "llvm.nvvm.sust.b.1d.array.v4i8.zero" => "__nvvm_sust_b_1d_array_v4i8_zero",
+    "llvm.nvvm.sust.b.1d.i16.clamp" => "__nvvm_sust_b_1d_i16_clamp",
+    "llvm.nvvm.sust.b.1d.i16.trap" => "__nvvm_sust_b_1d_i16_trap",
+    "llvm.nvvm.sust.b.1d.i16.zero" => "__nvvm_sust_b_1d_i16_zero",
+    "llvm.nvvm.sust.b.1d.i32.clamp" => "__nvvm_sust_b_1d_i32_clamp",
+    "llvm.nvvm.sust.b.1d.i32.trap" => "__nvvm_sust_b_1d_i32_trap",
+    "llvm.nvvm.sust.b.1d.i32.zero" => "__nvvm_sust_b_1d_i32_zero",
+    "llvm.nvvm.sust.b.1d.i64.clamp" => "__nvvm_sust_b_1d_i64_clamp",
+    "llvm.nvvm.sust.b.1d.i64.trap" => "__nvvm_sust_b_1d_i64_trap",
+    "llvm.nvvm.sust.b.1d.i64.zero" => "__nvvm_sust_b_1d_i64_zero",
+    "llvm.nvvm.sust.b.1d.i8.clamp" => "__nvvm_sust_b_1d_i8_clamp",
+    "llvm.nvvm.sust.b.1d.i8.trap" => "__nvvm_sust_b_1d_i8_trap",
+    "llvm.nvvm.sust.b.1d.i8.zero" => "__nvvm_sust_b_1d_i8_zero",
+    "llvm.nvvm.sust.b.1d.v2i16.clamp" => "__nvvm_sust_b_1d_v2i16_clamp",
+    "llvm.nvvm.sust.b.1d.v2i16.trap" => "__nvvm_sust_b_1d_v2i16_trap",
+    "llvm.nvvm.sust.b.1d.v2i16.zero" => "__nvvm_sust_b_1d_v2i16_zero",
+    "llvm.nvvm.sust.b.1d.v2i32.clamp" => "__nvvm_sust_b_1d_v2i32_clamp",
+    "llvm.nvvm.sust.b.1d.v2i32.trap" => "__nvvm_sust_b_1d_v2i32_trap",
+    "llvm.nvvm.sust.b.1d.v2i32.zero" => "__nvvm_sust_b_1d_v2i32_zero",
+    "llvm.nvvm.sust.b.1d.v2i64.clamp" => "__nvvm_sust_b_1d_v2i64_clamp",
+    "llvm.nvvm.sust.b.1d.v2i64.trap" => "__nvvm_sust_b_1d_v2i64_trap",
+    "llvm.nvvm.sust.b.1d.v2i64.zero" => "__nvvm_sust_b_1d_v2i64_zero",
+    "llvm.nvvm.sust.b.1d.v2i8.clamp" => "__nvvm_sust_b_1d_v2i8_clamp",
+    "llvm.nvvm.sust.b.1d.v2i8.trap" => "__nvvm_sust_b_1d_v2i8_trap",
+    "llvm.nvvm.sust.b.1d.v2i8.zero" => "__nvvm_sust_b_1d_v2i8_zero",
+    "llvm.nvvm.sust.b.1d.v4i16.clamp" => "__nvvm_sust_b_1d_v4i16_clamp",
+    "llvm.nvvm.sust.b.1d.v4i16.trap" => "__nvvm_sust_b_1d_v4i16_trap",
+    "llvm.nvvm.sust.b.1d.v4i16.zero" => "__nvvm_sust_b_1d_v4i16_zero",
+    "llvm.nvvm.sust.b.1d.v4i32.clamp" => "__nvvm_sust_b_1d_v4i32_clamp",
+    "llvm.nvvm.sust.b.1d.v4i32.trap" => "__nvvm_sust_b_1d_v4i32_trap",
+    "llvm.nvvm.sust.b.1d.v4i32.zero" => "__nvvm_sust_b_1d_v4i32_zero",
+    "llvm.nvvm.sust.b.1d.v4i8.clamp" => "__nvvm_sust_b_1d_v4i8_clamp",
+    "llvm.nvvm.sust.b.1d.v4i8.trap" => "__nvvm_sust_b_1d_v4i8_trap",
+    "llvm.nvvm.sust.b.1d.v4i8.zero" => "__nvvm_sust_b_1d_v4i8_zero",
+    "llvm.nvvm.sust.b.2d.array.i16.clamp" => "__nvvm_sust_b_2d_array_i16_clamp",
+    "llvm.nvvm.sust.b.2d.array.i16.trap" => "__nvvm_sust_b_2d_array_i16_trap",
+    "llvm.nvvm.sust.b.2d.array.i16.zero" => "__nvvm_sust_b_2d_array_i16_zero",
+    "llvm.nvvm.sust.b.2d.array.i32.clamp" => "__nvvm_sust_b_2d_array_i32_clamp",
+    "llvm.nvvm.sust.b.2d.array.i32.trap" => "__nvvm_sust_b_2d_array_i32_trap",
+    "llvm.nvvm.sust.b.2d.array.i32.zero" => "__nvvm_sust_b_2d_array_i32_zero",
+    "llvm.nvvm.sust.b.2d.array.i64.clamp" => "__nvvm_sust_b_2d_array_i64_clamp",
+    "llvm.nvvm.sust.b.2d.array.i64.trap" => "__nvvm_sust_b_2d_array_i64_trap",
+    "llvm.nvvm.sust.b.2d.array.i64.zero" => "__nvvm_sust_b_2d_array_i64_zero",
+    "llvm.nvvm.sust.b.2d.array.i8.clamp" => "__nvvm_sust_b_2d_array_i8_clamp",
+    "llvm.nvvm.sust.b.2d.array.i8.trap" => "__nvvm_sust_b_2d_array_i8_trap",
+    "llvm.nvvm.sust.b.2d.array.i8.zero" => "__nvvm_sust_b_2d_array_i8_zero",
+    "llvm.nvvm.sust.b.2d.array.v2i16.clamp" => "__nvvm_sust_b_2d_array_v2i16_clamp",
+    "llvm.nvvm.sust.b.2d.array.v2i16.trap" => "__nvvm_sust_b_2d_array_v2i16_trap",
+    "llvm.nvvm.sust.b.2d.array.v2i16.zero" => "__nvvm_sust_b_2d_array_v2i16_zero",
+    "llvm.nvvm.sust.b.2d.array.v2i32.clamp" => "__nvvm_sust_b_2d_array_v2i32_clamp",
+    "llvm.nvvm.sust.b.2d.array.v2i32.trap" => "__nvvm_sust_b_2d_array_v2i32_trap",
+    "llvm.nvvm.sust.b.2d.array.v2i32.zero" => "__nvvm_sust_b_2d_array_v2i32_zero",
+    "llvm.nvvm.sust.b.2d.array.v2i64.clamp" => "__nvvm_sust_b_2d_array_v2i64_clamp",
+    "llvm.nvvm.sust.b.2d.array.v2i64.trap" => "__nvvm_sust_b_2d_array_v2i64_trap",
+    "llvm.nvvm.sust.b.2d.array.v2i64.zero" => "__nvvm_sust_b_2d_array_v2i64_zero",
+    "llvm.nvvm.sust.b.2d.array.v2i8.clamp" => "__nvvm_sust_b_2d_array_v2i8_clamp",
+    "llvm.nvvm.sust.b.2d.array.v2i8.trap" => "__nvvm_sust_b_2d_array_v2i8_trap",
+    "llvm.nvvm.sust.b.2d.array.v2i8.zero" => "__nvvm_sust_b_2d_array_v2i8_zero",
+    "llvm.nvvm.sust.b.2d.array.v4i16.clamp" => "__nvvm_sust_b_2d_array_v4i16_clamp",
+    "llvm.nvvm.sust.b.2d.array.v4i16.trap" => "__nvvm_sust_b_2d_array_v4i16_trap",
+    "llvm.nvvm.sust.b.2d.array.v4i16.zero" => "__nvvm_sust_b_2d_array_v4i16_zero",
+    "llvm.nvvm.sust.b.2d.array.v4i32.clamp" => "__nvvm_sust_b_2d_array_v4i32_clamp",
+    "llvm.nvvm.sust.b.2d.array.v4i32.trap" => "__nvvm_sust_b_2d_array_v4i32_trap",
+    "llvm.nvvm.sust.b.2d.array.v4i32.zero" => "__nvvm_sust_b_2d_array_v4i32_zero",
+    "llvm.nvvm.sust.b.2d.array.v4i8.clamp" => "__nvvm_sust_b_2d_array_v4i8_clamp",
+    "llvm.nvvm.sust.b.2d.array.v4i8.trap" => "__nvvm_sust_b_2d_array_v4i8_trap",
+    "llvm.nvvm.sust.b.2d.array.v4i8.zero" => "__nvvm_sust_b_2d_array_v4i8_zero",
+    "llvm.nvvm.sust.b.2d.i16.clamp" => "__nvvm_sust_b_2d_i16_clamp",
+    "llvm.nvvm.sust.b.2d.i16.trap" => "__nvvm_sust_b_2d_i16_trap",
+    "llvm.nvvm.sust.b.2d.i16.zero" => "__nvvm_sust_b_2d_i16_zero",
+    "llvm.nvvm.sust.b.2d.i32.clamp" => "__nvvm_sust_b_2d_i32_clamp",
+    "llvm.nvvm.sust.b.2d.i32.trap" => "__nvvm_sust_b_2d_i32_trap",
+    "llvm.nvvm.sust.b.2d.i32.zero" => "__nvvm_sust_b_2d_i32_zero",
+    "llvm.nvvm.sust.b.2d.i64.clamp" => "__nvvm_sust_b_2d_i64_clamp",
+    "llvm.nvvm.sust.b.2d.i64.trap" => "__nvvm_sust_b_2d_i64_trap",
+    "llvm.nvvm.sust.b.2d.i64.zero" => "__nvvm_sust_b_2d_i64_zero",
+    "llvm.nvvm.sust.b.2d.i8.clamp" => "__nvvm_sust_b_2d_i8_clamp",
+    "llvm.nvvm.sust.b.2d.i8.trap" => "__nvvm_sust_b_2d_i8_trap",
+    "llvm.nvvm.sust.b.2d.i8.zero" => "__nvvm_sust_b_2d_i8_zero",
+    "llvm.nvvm.sust.b.2d.v2i16.clamp" => "__nvvm_sust_b_2d_v2i16_clamp",
+    "llvm.nvvm.sust.b.2d.v2i16.trap" => "__nvvm_sust_b_2d_v2i16_trap",
+    "llvm.nvvm.sust.b.2d.v2i16.zero" => "__nvvm_sust_b_2d_v2i16_zero",
+    "llvm.nvvm.sust.b.2d.v2i32.clamp" => "__nvvm_sust_b_2d_v2i32_clamp",
+    "llvm.nvvm.sust.b.2d.v2i32.trap" => "__nvvm_sust_b_2d_v2i32_trap",
+    "llvm.nvvm.sust.b.2d.v2i32.zero" => "__nvvm_sust_b_2d_v2i32_zero",
+    "llvm.nvvm.sust.b.2d.v2i64.clamp" => "__nvvm_sust_b_2d_v2i64_clamp",
+    "llvm.nvvm.sust.b.2d.v2i64.trap" => "__nvvm_sust_b_2d_v2i64_trap",
+    "llvm.nvvm.sust.b.2d.v2i64.zero" => "__nvvm_sust_b_2d_v2i64_zero",
+    "llvm.nvvm.sust.b.2d.v2i8.clamp" => "__nvvm_sust_b_2d_v2i8_clamp",
+    "llvm.nvvm.sust.b.2d.v2i8.trap" => "__nvvm_sust_b_2d_v2i8_trap",
+    "llvm.nvvm.sust.b.2d.v2i8.zero" => "__nvvm_sust_b_2d_v2i8_zero",
+    "llvm.nvvm.sust.b.2d.v4i16.clamp" => "__nvvm_sust_b_2d_v4i16_clamp",
+    "llvm.nvvm.sust.b.2d.v4i16.trap" => "__nvvm_sust_b_2d_v4i16_trap",
+    "llvm.nvvm.sust.b.2d.v4i16.zero" => "__nvvm_sust_b_2d_v4i16_zero",
+    "llvm.nvvm.sust.b.2d.v4i32.clamp" => "__nvvm_sust_b_2d_v4i32_clamp",
+    "llvm.nvvm.sust.b.2d.v4i32.trap" => "__nvvm_sust_b_2d_v4i32_trap",
+    "llvm.nvvm.sust.b.2d.v4i32.zero" => "__nvvm_sust_b_2d_v4i32_zero",
+    "llvm.nvvm.sust.b.2d.v4i8.clamp" => "__nvvm_sust_b_2d_v4i8_clamp",
+    "llvm.nvvm.sust.b.2d.v4i8.trap" => "__nvvm_sust_b_2d_v4i8_trap",
+    "llvm.nvvm.sust.b.2d.v4i8.zero" => "__nvvm_sust_b_2d_v4i8_zero",
+    "llvm.nvvm.sust.b.3d.i16.clamp" => "__nvvm_sust_b_3d_i16_clamp",
+    "llvm.nvvm.sust.b.3d.i16.trap" => "__nvvm_sust_b_3d_i16_trap",
+    "llvm.nvvm.sust.b.3d.i16.zero" => "__nvvm_sust_b_3d_i16_zero",
+    "llvm.nvvm.sust.b.3d.i32.clamp" => "__nvvm_sust_b_3d_i32_clamp",
+    "llvm.nvvm.sust.b.3d.i32.trap" => "__nvvm_sust_b_3d_i32_trap",
+    "llvm.nvvm.sust.b.3d.i32.zero" => "__nvvm_sust_b_3d_i32_zero",
+    "llvm.nvvm.sust.b.3d.i64.clamp" => "__nvvm_sust_b_3d_i64_clamp",
+    "llvm.nvvm.sust.b.3d.i64.trap" => "__nvvm_sust_b_3d_i64_trap",
+    "llvm.nvvm.sust.b.3d.i64.zero" => "__nvvm_sust_b_3d_i64_zero",
+    "llvm.nvvm.sust.b.3d.i8.clamp" => "__nvvm_sust_b_3d_i8_clamp",
+    "llvm.nvvm.sust.b.3d.i8.trap" => "__nvvm_sust_b_3d_i8_trap",
+    "llvm.nvvm.sust.b.3d.i8.zero" => "__nvvm_sust_b_3d_i8_zero",
+    "llvm.nvvm.sust.b.3d.v2i16.clamp" => "__nvvm_sust_b_3d_v2i16_clamp",
+    "llvm.nvvm.sust.b.3d.v2i16.trap" => "__nvvm_sust_b_3d_v2i16_trap",
+    "llvm.nvvm.sust.b.3d.v2i16.zero" => "__nvvm_sust_b_3d_v2i16_zero",
+    "llvm.nvvm.sust.b.3d.v2i32.clamp" => "__nvvm_sust_b_3d_v2i32_clamp",
+    "llvm.nvvm.sust.b.3d.v2i32.trap" => "__nvvm_sust_b_3d_v2i32_trap",
+    "llvm.nvvm.sust.b.3d.v2i32.zero" => "__nvvm_sust_b_3d_v2i32_zero",
+    "llvm.nvvm.sust.b.3d.v2i64.clamp" => "__nvvm_sust_b_3d_v2i64_clamp",
+    "llvm.nvvm.sust.b.3d.v2i64.trap" => "__nvvm_sust_b_3d_v2i64_trap",
+    "llvm.nvvm.sust.b.3d.v2i64.zero" => "__nvvm_sust_b_3d_v2i64_zero",
+    "llvm.nvvm.sust.b.3d.v2i8.clamp" => "__nvvm_sust_b_3d_v2i8_clamp",
+    "llvm.nvvm.sust.b.3d.v2i8.trap" => "__nvvm_sust_b_3d_v2i8_trap",
+    "llvm.nvvm.sust.b.3d.v2i8.zero" => "__nvvm_sust_b_3d_v2i8_zero",
+    "llvm.nvvm.sust.b.3d.v4i16.clamp" => "__nvvm_sust_b_3d_v4i16_clamp",
+    "llvm.nvvm.sust.b.3d.v4i16.trap" => "__nvvm_sust_b_3d_v4i16_trap",
+    "llvm.nvvm.sust.b.3d.v4i16.zero" => "__nvvm_sust_b_3d_v4i16_zero",
+    "llvm.nvvm.sust.b.3d.v4i32.clamp" => "__nvvm_sust_b_3d_v4i32_clamp",
+    "llvm.nvvm.sust.b.3d.v4i32.trap" => "__nvvm_sust_b_3d_v4i32_trap",
+    "llvm.nvvm.sust.b.3d.v4i32.zero" => "__nvvm_sust_b_3d_v4i32_zero",
+    "llvm.nvvm.sust.b.3d.v4i8.clamp" => "__nvvm_sust_b_3d_v4i8_clamp",
+    "llvm.nvvm.sust.b.3d.v4i8.trap" => "__nvvm_sust_b_3d_v4i8_trap",
+    "llvm.nvvm.sust.b.3d.v4i8.zero" => "__nvvm_sust_b_3d_v4i8_zero",
+    "llvm.nvvm.sust.p.1d.array.i16.trap" => "__nvvm_sust_p_1d_array_i16_trap",
+    "llvm.nvvm.sust.p.1d.array.i32.trap" => "__nvvm_sust_p_1d_array_i32_trap",
+    "llvm.nvvm.sust.p.1d.array.i8.trap" => "__nvvm_sust_p_1d_array_i8_trap",
+    "llvm.nvvm.sust.p.1d.array.v2i16.trap" => "__nvvm_sust_p_1d_array_v2i16_trap",
+    "llvm.nvvm.sust.p.1d.array.v2i32.trap" => "__nvvm_sust_p_1d_array_v2i32_trap",
+    "llvm.nvvm.sust.p.1d.array.v2i8.trap" => "__nvvm_sust_p_1d_array_v2i8_trap",
+    "llvm.nvvm.sust.p.1d.array.v4i16.trap" => "__nvvm_sust_p_1d_array_v4i16_trap",
+    "llvm.nvvm.sust.p.1d.array.v4i32.trap" => "__nvvm_sust_p_1d_array_v4i32_trap",
+    "llvm.nvvm.sust.p.1d.array.v4i8.trap" => "__nvvm_sust_p_1d_array_v4i8_trap",
+    "llvm.nvvm.sust.p.1d.i16.trap" => "__nvvm_sust_p_1d_i16_trap",
+    "llvm.nvvm.sust.p.1d.i32.trap" => "__nvvm_sust_p_1d_i32_trap",
+    "llvm.nvvm.sust.p.1d.i8.trap" => "__nvvm_sust_p_1d_i8_trap",
+    "llvm.nvvm.sust.p.1d.v2i16.trap" => "__nvvm_sust_p_1d_v2i16_trap",
+    "llvm.nvvm.sust.p.1d.v2i32.trap" => "__nvvm_sust_p_1d_v2i32_trap",
+    "llvm.nvvm.sust.p.1d.v2i8.trap" => "__nvvm_sust_p_1d_v2i8_trap",
+    "llvm.nvvm.sust.p.1d.v4i16.trap" => "__nvvm_sust_p_1d_v4i16_trap",
+    "llvm.nvvm.sust.p.1d.v4i32.trap" => "__nvvm_sust_p_1d_v4i32_trap",
+    "llvm.nvvm.sust.p.1d.v4i8.trap" => "__nvvm_sust_p_1d_v4i8_trap",
+    "llvm.nvvm.sust.p.2d.array.i16.trap" => "__nvvm_sust_p_2d_array_i16_trap",
+    "llvm.nvvm.sust.p.2d.array.i32.trap" => "__nvvm_sust_p_2d_array_i32_trap",
+    "llvm.nvvm.sust.p.2d.array.i8.trap" => "__nvvm_sust_p_2d_array_i8_trap",
+    "llvm.nvvm.sust.p.2d.array.v2i16.trap" => "__nvvm_sust_p_2d_array_v2i16_trap",
+    "llvm.nvvm.sust.p.2d.array.v2i32.trap" => "__nvvm_sust_p_2d_array_v2i32_trap",
+    "llvm.nvvm.sust.p.2d.array.v2i8.trap" => "__nvvm_sust_p_2d_array_v2i8_trap",
+    "llvm.nvvm.sust.p.2d.array.v4i16.trap" => "__nvvm_sust_p_2d_array_v4i16_trap",
+    "llvm.nvvm.sust.p.2d.array.v4i32.trap" => "__nvvm_sust_p_2d_array_v4i32_trap",
+    "llvm.nvvm.sust.p.2d.array.v4i8.trap" => "__nvvm_sust_p_2d_array_v4i8_trap",
+    "llvm.nvvm.sust.p.2d.i16.trap" => "__nvvm_sust_p_2d_i16_trap",
+    "llvm.nvvm.sust.p.2d.i32.trap" => "__nvvm_sust_p_2d_i32_trap",
+    "llvm.nvvm.sust.p.2d.i8.trap" => "__nvvm_sust_p_2d_i8_trap",
+    "llvm.nvvm.sust.p.2d.v2i16.trap" => "__nvvm_sust_p_2d_v2i16_trap",
+    "llvm.nvvm.sust.p.2d.v2i32.trap" => "__nvvm_sust_p_2d_v2i32_trap",
+    "llvm.nvvm.sust.p.2d.v2i8.trap" => "__nvvm_sust_p_2d_v2i8_trap",
+    "llvm.nvvm.sust.p.2d.v4i16.trap" => "__nvvm_sust_p_2d_v4i16_trap",
+    "llvm.nvvm.sust.p.2d.v4i32.trap" => "__nvvm_sust_p_2d_v4i32_trap",
+    "llvm.nvvm.sust.p.2d.v4i8.trap" => "__nvvm_sust_p_2d_v4i8_trap",
+    "llvm.nvvm.sust.p.3d.i16.trap" => "__nvvm_sust_p_3d_i16_trap",
+    "llvm.nvvm.sust.p.3d.i32.trap" => "__nvvm_sust_p_3d_i32_trap",
+    "llvm.nvvm.sust.p.3d.i8.trap" => "__nvvm_sust_p_3d_i8_trap",
+    "llvm.nvvm.sust.p.3d.v2i16.trap" => "__nvvm_sust_p_3d_v2i16_trap",
+    "llvm.nvvm.sust.p.3d.v2i32.trap" => "__nvvm_sust_p_3d_v2i32_trap",
+    "llvm.nvvm.sust.p.3d.v2i8.trap" => "__nvvm_sust_p_3d_v2i8_trap",
+    "llvm.nvvm.sust.p.3d.v4i16.trap" => "__nvvm_sust_p_3d_v4i16_trap",
+    "llvm.nvvm.sust.p.3d.v4i32.trap" => "__nvvm_sust_p_3d_v4i32_trap",
+    "llvm.nvvm.sust.p.3d.v4i8.trap" => "__nvvm_sust_p_3d_v4i8_trap",
+    "llvm.nvvm.swap.lo.hi.b64" => "__nvvm_swap_lo_hi_b64",
+    "llvm.nvvm.trunc.d" => "__nvvm_trunc_d",
+    "llvm.nvvm.trunc.f" => "__nvvm_trunc_f",
+    "llvm.nvvm.trunc.ftz.f" => "__nvvm_trunc_ftz_f",
+    "llvm.nvvm.txq.array.size" => "__nvvm_txq_array_size",
+    "llvm.nvvm.txq.channel.data.type" => "__nvvm_txq_channel_data_type",
+    "llvm.nvvm.txq.channel.order" => "__nvvm_txq_channel_order",
+    "llvm.nvvm.txq.depth" => "__nvvm_txq_depth",
+    "llvm.nvvm.txq.height" => "__nvvm_txq_height",
+    "llvm.nvvm.txq.num.mipmap.levels" => "__nvvm_txq_num_mipmap_levels",
+    "llvm.nvvm.txq.num.samples" => "__nvvm_txq_num_samples",
+    "llvm.nvvm.txq.width" => "__nvvm_txq_width",
+    "llvm.nvvm.ui2d.rm" => "__nvvm_ui2d_rm",
+    "llvm.nvvm.ui2d.rn" => "__nvvm_ui2d_rn",
+    "llvm.nvvm.ui2d.rp" => "__nvvm_ui2d_rp",
+    "llvm.nvvm.ui2d.rz" => "__nvvm_ui2d_rz",
+    "llvm.nvvm.ui2f.rm" => "__nvvm_ui2f_rm",
+    "llvm.nvvm.ui2f.rn" => "__nvvm_ui2f_rn",
+    "llvm.nvvm.ui2f.rp" => "__nvvm_ui2f_rp",
+    "llvm.nvvm.ui2f.rz" => "__nvvm_ui2f_rz",
+    "llvm.nvvm.ull2d.rm" => "__nvvm_ull2d_rm",
+    "llvm.nvvm.ull2d.rn" => "__nvvm_ull2d_rn",
+    "llvm.nvvm.ull2d.rp" => "__nvvm_ull2d_rp",
+    "llvm.nvvm.ull2d.rz" => "__nvvm_ull2d_rz",
+    "llvm.nvvm.ull2f.rm" => "__nvvm_ull2f_rm",
+    "llvm.nvvm.ull2f.rn" => "__nvvm_ull2f_rn",
+    "llvm.nvvm.ull2f.rp" => "__nvvm_ull2f_rp",
+    "llvm.nvvm.ull2f.rz" => "__nvvm_ull2f_rz",
     // ppc
     "llvm.ppc.addex" => "__builtin_ppc_addex",
     "llvm.ppc.addf128.round.to.odd" => "__builtin_addf128_round_to_odd",
@@ -909,8 +2321,21 @@ match name {
     "llvm.ppc.altivec.mtvsrhm" => "__builtin_altivec_mtvsrhm",
     "llvm.ppc.altivec.mtvsrqm" => "__builtin_altivec_mtvsrqm",
     "llvm.ppc.altivec.mtvsrwm" => "__builtin_altivec_mtvsrwm",
+    "llvm.ppc.altivec.vaddcuw" => "__builtin_altivec_vaddcuw",
     "llvm.ppc.altivec.vaddecuq" => "__builtin_altivec_vaddecuq",
     "llvm.ppc.altivec.vaddeuqm" => "__builtin_altivec_vaddeuqm",
+    "llvm.ppc.altivec.vaddsbs" => "__builtin_altivec_vaddsbs",
+    "llvm.ppc.altivec.vaddshs" => "__builtin_altivec_vaddshs",
+    "llvm.ppc.altivec.vaddsws" => "__builtin_altivec_vaddsws",
+    "llvm.ppc.altivec.vaddubs" => "__builtin_altivec_vaddubs",
+    "llvm.ppc.altivec.vadduhs" => "__builtin_altivec_vadduhs",
+    "llvm.ppc.altivec.vadduws" => "__builtin_altivec_vadduws",
+    "llvm.ppc.altivec.vavgsb" => "__builtin_altivec_vavgsb",
+    "llvm.ppc.altivec.vavgsh" => "__builtin_altivec_vavgsh",
+    "llvm.ppc.altivec.vavgsw" => "__builtin_altivec_vavgsw",
+    "llvm.ppc.altivec.vavgub" => "__builtin_altivec_vavgub",
+    "llvm.ppc.altivec.vavguh" => "__builtin_altivec_vavguh",
+    "llvm.ppc.altivec.vavguw" => "__builtin_altivec_vavguw",
     "llvm.ppc.altivec.vbpermd" => "__builtin_altivec_vbpermd",
     "llvm.ppc.altivec.vbpermq" => "__builtin_altivec_vbpermq",
     "llvm.ppc.altivec.vcfsx" => "__builtin_altivec_vcfsx",
@@ -983,6 +2408,7 @@ match name {
     "llvm.ppc.altivec.vexpandhm" => "__builtin_altivec_vexpandhm",
     "llvm.ppc.altivec.vexpandqm" => "__builtin_altivec_vexpandqm",
     "llvm.ppc.altivec.vexpandwm" => "__builtin_altivec_vexpandwm",
+    "llvm.ppc.altivec.vexptefp" => "__builtin_altivec_vexptefp",
     "llvm.ppc.altivec.vextddvlx" => "__builtin_altivec_vextddvlx",
     "llvm.ppc.altivec.vextddvrx" => "__builtin_altivec_vextddvrx",
     "llvm.ppc.altivec.vextdubvlx" => "__builtin_altivec_vextdubvlx",
@@ -1018,9 +2444,24 @@ match name {
     "llvm.ppc.altivec.vinswrx" => "__builtin_altivec_vinswrx",
     "llvm.ppc.altivec.vinswvlx" => "__builtin_altivec_vinswvlx",
     "llvm.ppc.altivec.vinswvrx" => "__builtin_altivec_vinswvrx",
+    "llvm.ppc.altivec.vlogefp" => "__builtin_altivec_vlogefp",
     "llvm.ppc.altivec.vmaddfp" => "__builtin_altivec_vmaddfp",
+    "llvm.ppc.altivec.vmaxfp" => "__builtin_altivec_vmaxfp",
+    "llvm.ppc.altivec.vmaxsb" => "__builtin_altivec_vmaxsb",
+    "llvm.ppc.altivec.vmaxsh" => "__builtin_altivec_vmaxsh",
+    "llvm.ppc.altivec.vmaxsw" => "__builtin_altivec_vmaxsw",
+    "llvm.ppc.altivec.vmaxub" => "__builtin_altivec_vmaxub",
+    "llvm.ppc.altivec.vmaxuh" => "__builtin_altivec_vmaxuh",
+    "llvm.ppc.altivec.vmaxuw" => "__builtin_altivec_vmaxuw",
     "llvm.ppc.altivec.vmhaddshs" => "__builtin_altivec_vmhaddshs",
     "llvm.ppc.altivec.vmhraddshs" => "__builtin_altivec_vmhraddshs",
+    "llvm.ppc.altivec.vminfp" => "__builtin_altivec_vminfp",
+    "llvm.ppc.altivec.vminsb" => "__builtin_altivec_vminsb",
+    "llvm.ppc.altivec.vminsh" => "__builtin_altivec_vminsh",
+    "llvm.ppc.altivec.vminsw" => "__builtin_altivec_vminsw",
+    "llvm.ppc.altivec.vminub" => "__builtin_altivec_vminub",
+    "llvm.ppc.altivec.vminuh" => "__builtin_altivec_vminuh",
+    "llvm.ppc.altivec.vminuw" => "__builtin_altivec_vminuw",
     "llvm.ppc.altivec.vmladduhm" => "__builtin_altivec_vmladduhm",
     "llvm.ppc.altivec.vmsumcud" => "__builtin_altivec_vmsumcud",
     "llvm.ppc.altivec.vmsummbm" => "__builtin_altivec_vmsummbm",
@@ -1059,13 +2500,31 @@ match name {
     "llvm.ppc.altivec.vprtybd" => "__builtin_altivec_vprtybd",
     "llvm.ppc.altivec.vprtybq" => "__builtin_altivec_vprtybq",
     "llvm.ppc.altivec.vprtybw" => "__builtin_altivec_vprtybw",
+    "llvm.ppc.altivec.vrefp" => "__builtin_altivec_vrefp",
     "llvm.ppc.altivec.vrfim" => "__builtin_altivec_vrfim",
     "llvm.ppc.altivec.vrfin" => "__builtin_altivec_vrfin",
     "llvm.ppc.altivec.vrfip" => "__builtin_altivec_vrfip",
     "llvm.ppc.altivec.vrfiz" => "__builtin_altivec_vrfiz",
+    "llvm.ppc.altivec.vrlb" => "__builtin_altivec_vrlb",
+    "llvm.ppc.altivec.vrlh" => "__builtin_altivec_vrlh",
+    "llvm.ppc.altivec.vrlw" => "__builtin_altivec_vrlw",
+    "llvm.ppc.altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
     "llvm.ppc.altivec.vsel" => "__builtin_altivec_vsel_4si",
+    "llvm.ppc.altivec.vsl" => "__builtin_altivec_vsl",
+    "llvm.ppc.altivec.vslb" => "__builtin_altivec_vslb",
     "llvm.ppc.altivec.vsldbi" => "__builtin_altivec_vsldbi",
+    "llvm.ppc.altivec.vslh" => "__builtin_altivec_vslh",
+    "llvm.ppc.altivec.vslo" => "__builtin_altivec_vslo",
+    "llvm.ppc.altivec.vslw" => "__builtin_altivec_vslw",
+    "llvm.ppc.altivec.vsr" => "__builtin_altivec_vsr",
+    "llvm.ppc.altivec.vsrab" => "__builtin_altivec_vsrab",
+    "llvm.ppc.altivec.vsrah" => "__builtin_altivec_vsrah",
+    "llvm.ppc.altivec.vsraw" => "__builtin_altivec_vsraw",
+    "llvm.ppc.altivec.vsrb" => "__builtin_altivec_vsrb",
     "llvm.ppc.altivec.vsrdbi" => "__builtin_altivec_vsrdbi",
+    "llvm.ppc.altivec.vsrh" => "__builtin_altivec_vsrh",
+    "llvm.ppc.altivec.vsro" => "__builtin_altivec_vsro",
+    "llvm.ppc.altivec.vsrw" => "__builtin_altivec_vsrw",
     "llvm.ppc.altivec.vstribl" => "__builtin_altivec_vstribl",
     "llvm.ppc.altivec.vstribl.p" => "__builtin_altivec_vstribl_p",
     "llvm.ppc.altivec.vstribr" => "__builtin_altivec_vstribr",
@@ -1074,8 +2533,15 @@ match name {
     "llvm.ppc.altivec.vstrihl.p" => "__builtin_altivec_vstrihl_p",
     "llvm.ppc.altivec.vstrihr" => "__builtin_altivec_vstrihr",
     "llvm.ppc.altivec.vstrihr.p" => "__builtin_altivec_vstrihr_p",
+    "llvm.ppc.altivec.vsubcuw" => "__builtin_altivec_vsubcuw",
     "llvm.ppc.altivec.vsubecuq" => "__builtin_altivec_vsubecuq",
     "llvm.ppc.altivec.vsubeuqm" => "__builtin_altivec_vsubeuqm",
+    "llvm.ppc.altivec.vsubsbs" => "__builtin_altivec_vsubsbs",
+    "llvm.ppc.altivec.vsubshs" => "__builtin_altivec_vsubshs",
+    "llvm.ppc.altivec.vsubsws" => "__builtin_altivec_vsubsws",
+    "llvm.ppc.altivec.vsububs" => "__builtin_altivec_vsububs",
+    "llvm.ppc.altivec.vsubuhs" => "__builtin_altivec_vsubuhs",
+    "llvm.ppc.altivec.vsubuws" => "__builtin_altivec_vsubuws",
     "llvm.ppc.altivec.vsum2sws" => "__builtin_altivec_vsum2sws",
     "llvm.ppc.altivec.vsum4sbs" => "__builtin_altivec_vsum4sbs",
     "llvm.ppc.altivec.vsum4shs" => "__builtin_altivec_vsum4shs",
@@ -1224,6 +2690,25 @@ match name {
     "llvm.ppc.vsx.xvrsqrtedp" => "__builtin_vsx_xvrsqrtedp",
     "llvm.ppc.vsx.xvrsqrtesp" => "__builtin_vsx_xvrsqrtesp",
     "llvm.ppc.vsx.xxpermx" => "__builtin_vsx_xxpermx",
+    // ptx
+    "llvm.ptx.bar.sync" => "__builtin_ptx_bar_sync",
+    "llvm.ptx.read.clock" => "__builtin_ptx_read_clock",
+    "llvm.ptx.read.clock64" => "__builtin_ptx_read_clock64",
+    "llvm.ptx.read.gridid" => "__builtin_ptx_read_gridid",
+    "llvm.ptx.read.laneid" => "__builtin_ptx_read_laneid",
+    "llvm.ptx.read.lanemask.eq" => "__builtin_ptx_read_lanemask_eq",
+    "llvm.ptx.read.lanemask.ge" => "__builtin_ptx_read_lanemask_ge",
+    "llvm.ptx.read.lanemask.gt" => "__builtin_ptx_read_lanemask_gt",
+    "llvm.ptx.read.lanemask.le" => "__builtin_ptx_read_lanemask_le",
+    "llvm.ptx.read.lanemask.lt" => "__builtin_ptx_read_lanemask_lt",
+    "llvm.ptx.read.nsmid" => "__builtin_ptx_read_nsmid",
+    "llvm.ptx.read.nwarpid" => "__builtin_ptx_read_nwarpid",
+    "llvm.ptx.read.pm0" => "__builtin_ptx_read_pm0",
+    "llvm.ptx.read.pm1" => "__builtin_ptx_read_pm1",
+    "llvm.ptx.read.pm2" => "__builtin_ptx_read_pm2",
+    "llvm.ptx.read.pm3" => "__builtin_ptx_read_pm3",
+    "llvm.ptx.read.smid" => "__builtin_ptx_read_smid",
+    "llvm.ptx.read.warpid" => "__builtin_ptx_read_warpid",
     // s390
     "llvm.s390.efpc" => "__builtin_s390_efpc",
     "llvm.s390.etnd" => "__builtin_tx_nesting_depth",
@@ -1278,6 +2763,10 @@ match name {
     "llvm.x86.3dnowa.pfnacc" => "__builtin_ia32_pfnacc",
     "llvm.x86.3dnowa.pfpnacc" => "__builtin_ia32_pfpnacc",
     "llvm.x86.3dnowa.pi2fw" => "__builtin_ia32_pi2fw",
+    "llvm.x86.addcarry.u32" => "__builtin_ia32_addcarry_u32",
+    "llvm.x86.addcarry.u64" => "__builtin_ia32_addcarry_u64",
+    "llvm.x86.addcarryx.u32" => "__builtin_ia32_addcarryx_u32",
+    "llvm.x86.addcarryx.u64" => "__builtin_ia32_addcarryx_u64",
     "llvm.x86.aesni.aesdec" => "__builtin_ia32_aesdec128",
     "llvm.x86.aesni.aesdec.256" => "__builtin_ia32_aesdec256",
     "llvm.x86.aesni.aesdec.512" => "__builtin_ia32_aesdec512",
@@ -1294,11 +2783,18 @@ match name {
     "llvm.x86.aesni.aeskeygenassist" => "__builtin_ia32_aeskeygenassist128",
     "llvm.x86.avx.addsub.pd.256" => "__builtin_ia32_addsubpd256",
     "llvm.x86.avx.addsub.ps.256" => "__builtin_ia32_addsubps256",
+    "llvm.x86.avx.blend.pd.256" => "__builtin_ia32_blendpd256",
+    "llvm.x86.avx.blend.ps.256" => "__builtin_ia32_blendps256",
     "llvm.x86.avx.blendv.pd.256" => "__builtin_ia32_blendvpd256",
     "llvm.x86.avx.blendv.ps.256" => "__builtin_ia32_blendvps256",
+    "llvm.x86.avx.cmp.pd.256" => "__builtin_ia32_cmppd256",
+    "llvm.x86.avx.cmp.ps.256" => "__builtin_ia32_cmpps256",
     "llvm.x86.avx.cvt.pd2.ps.256" => "__builtin_ia32_cvtpd2ps256",
     "llvm.x86.avx.cvt.pd2dq.256" => "__builtin_ia32_cvtpd2dq256",
+    "llvm.x86.avx.cvt.ps2.pd.256" => "__builtin_ia32_cvtps2pd256",
     "llvm.x86.avx.cvt.ps2dq.256" => "__builtin_ia32_cvtps2dq256",
+    "llvm.x86.avx.cvtdq2.pd.256" => "__builtin_ia32_cvtdq2pd256",
+    "llvm.x86.avx.cvtdq2.ps.256" => "__builtin_ia32_cvtdq2ps256",
     "llvm.x86.avx.cvtt.pd2dq.256" => "__builtin_ia32_cvttpd2dq256",
     "llvm.x86.avx.cvtt.ps2dq.256" => "__builtin_ia32_cvttps2dq256",
     "llvm.x86.avx.dp.ps.256" => "__builtin_ia32_dpps256",
@@ -1328,6 +2824,22 @@ match name {
     "llvm.x86.avx.round.pd.256" => "__builtin_ia32_roundpd256",
     "llvm.x86.avx.round.ps.256" => "__builtin_ia32_roundps256",
     "llvm.x86.avx.rsqrt.ps.256" => "__builtin_ia32_rsqrtps256",
+    "llvm.x86.avx.sqrt.pd.256" => "__builtin_ia32_sqrtpd256",
+    "llvm.x86.avx.sqrt.ps.256" => "__builtin_ia32_sqrtps256",
+    "llvm.x86.avx.storeu.dq.256" => "__builtin_ia32_storedqu256",
+    "llvm.x86.avx.storeu.pd.256" => "__builtin_ia32_storeupd256",
+    "llvm.x86.avx.storeu.ps.256" => "__builtin_ia32_storeups256",
+    "llvm.x86.avx.vbroadcastf128.pd.256" => "__builtin_ia32_vbroadcastf128_pd256",
+    "llvm.x86.avx.vbroadcastf128.ps.256" => "__builtin_ia32_vbroadcastf128_ps256",
+    "llvm.x86.avx.vextractf128.pd.256" => "__builtin_ia32_vextractf128_pd256",
+    "llvm.x86.avx.vextractf128.ps.256" => "__builtin_ia32_vextractf128_ps256",
+    "llvm.x86.avx.vextractf128.si.256" => "__builtin_ia32_vextractf128_si256",
+    "llvm.x86.avx.vinsertf128.pd.256" => "__builtin_ia32_vinsertf128_pd256",
+    "llvm.x86.avx.vinsertf128.ps.256" => "__builtin_ia32_vinsertf128_ps256",
+    "llvm.x86.avx.vinsertf128.si.256" => "__builtin_ia32_vinsertf128_si256",
+    "llvm.x86.avx.vperm2f128.pd.256" => "__builtin_ia32_vperm2f128_pd256",
+    "llvm.x86.avx.vperm2f128.ps.256" => "__builtin_ia32_vperm2f128_ps256",
+    "llvm.x86.avx.vperm2f128.si.256" => "__builtin_ia32_vperm2f128_si256",
     "llvm.x86.avx.vpermilvar.pd" => "__builtin_ia32_vpermilvarpd",
     "llvm.x86.avx.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256",
     "llvm.x86.avx.vpermilvar.ps" => "__builtin_ia32_vpermilvarps",
@@ -1370,14 +2882,33 @@ match name {
     "llvm.x86.avx2.maskstore.d.256" => "__builtin_ia32_maskstored256",
     "llvm.x86.avx2.maskstore.q" => "__builtin_ia32_maskstoreq",
     "llvm.x86.avx2.maskstore.q.256" => "__builtin_ia32_maskstoreq256",
+    "llvm.x86.avx2.movntdqa" => "__builtin_ia32_movntdqa256",
     "llvm.x86.avx2.mpsadbw" => "__builtin_ia32_mpsadbw256",
+    "llvm.x86.avx2.pabs.b" => "__builtin_ia32_pabsb256",
+    "llvm.x86.avx2.pabs.d" => "__builtin_ia32_pabsd256",
+    "llvm.x86.avx2.pabs.w" => "__builtin_ia32_pabsw256",
     "llvm.x86.avx2.packssdw" => "__builtin_ia32_packssdw256",
     "llvm.x86.avx2.packsswb" => "__builtin_ia32_packsswb256",
     "llvm.x86.avx2.packusdw" => "__builtin_ia32_packusdw256",
     "llvm.x86.avx2.packuswb" => "__builtin_ia32_packuswb256",
+    "llvm.x86.avx2.padds.b" => "__builtin_ia32_paddsb256",
+    "llvm.x86.avx2.padds.w" => "__builtin_ia32_paddsw256",
+    "llvm.x86.avx2.paddus.b" => "__builtin_ia32_paddusb256",
+    "llvm.x86.avx2.paddus.w" => "__builtin_ia32_paddusw256",
     "llvm.x86.avx2.pavg.b" => "__builtin_ia32_pavgb256",
     "llvm.x86.avx2.pavg.w" => "__builtin_ia32_pavgw256",
+    "llvm.x86.avx2.pblendd.128" => "__builtin_ia32_pblendd128",
+    "llvm.x86.avx2.pblendd.256" => "__builtin_ia32_pblendd256",
     "llvm.x86.avx2.pblendvb" => "__builtin_ia32_pblendvb256",
+    "llvm.x86.avx2.pblendw" => "__builtin_ia32_pblendw256",
+    "llvm.x86.avx2.pbroadcastb.128" => "__builtin_ia32_pbroadcastb128",
+    "llvm.x86.avx2.pbroadcastb.256" => "__builtin_ia32_pbroadcastb256",
+    "llvm.x86.avx2.pbroadcastd.128" => "__builtin_ia32_pbroadcastd128",
+    "llvm.x86.avx2.pbroadcastd.256" => "__builtin_ia32_pbroadcastd256",
+    "llvm.x86.avx2.pbroadcastq.128" => "__builtin_ia32_pbroadcastq128",
+    "llvm.x86.avx2.pbroadcastq.256" => "__builtin_ia32_pbroadcastq256",
+    "llvm.x86.avx2.pbroadcastw.128" => "__builtin_ia32_pbroadcastw128",
+    "llvm.x86.avx2.pbroadcastw.256" => "__builtin_ia32_pbroadcastw256",
     "llvm.x86.avx2.permd" => "__builtin_ia32_permvarsi256",
     "llvm.x86.avx2.permps" => "__builtin_ia32_permvarsf256",
     "llvm.x86.avx2.phadd.d" => "__builtin_ia32_phaddd256",
@@ -1388,16 +2919,44 @@ match name {
     "llvm.x86.avx2.phsub.w" => "__builtin_ia32_phsubw256",
     "llvm.x86.avx2.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw256",
     "llvm.x86.avx2.pmadd.wd" => "__builtin_ia32_pmaddwd256",
+    "llvm.x86.avx2.pmaxs.b" => "__builtin_ia32_pmaxsb256",
+    "llvm.x86.avx2.pmaxs.d" => "__builtin_ia32_pmaxsd256",
+    "llvm.x86.avx2.pmaxs.w" => "__builtin_ia32_pmaxsw256",
+    "llvm.x86.avx2.pmaxu.b" => "__builtin_ia32_pmaxub256",
+    "llvm.x86.avx2.pmaxu.d" => "__builtin_ia32_pmaxud256",
+    "llvm.x86.avx2.pmaxu.w" => "__builtin_ia32_pmaxuw256",
+    "llvm.x86.avx2.pmins.b" => "__builtin_ia32_pminsb256",
+    "llvm.x86.avx2.pmins.d" => "__builtin_ia32_pminsd256",
+    "llvm.x86.avx2.pmins.w" => "__builtin_ia32_pminsw256",
+    "llvm.x86.avx2.pminu.b" => "__builtin_ia32_pminub256",
+    "llvm.x86.avx2.pminu.d" => "__builtin_ia32_pminud256",
+    "llvm.x86.avx2.pminu.w" => "__builtin_ia32_pminuw256",
     "llvm.x86.avx2.pmovmskb" => "__builtin_ia32_pmovmskb256",
+    "llvm.x86.avx2.pmovsxbd" => "__builtin_ia32_pmovsxbd256",
+    "llvm.x86.avx2.pmovsxbq" => "__builtin_ia32_pmovsxbq256",
+    "llvm.x86.avx2.pmovsxbw" => "__builtin_ia32_pmovsxbw256",
+    "llvm.x86.avx2.pmovsxdq" => "__builtin_ia32_pmovsxdq256",
+    "llvm.x86.avx2.pmovsxwd" => "__builtin_ia32_pmovsxwd256",
+    "llvm.x86.avx2.pmovsxwq" => "__builtin_ia32_pmovsxwq256",
+    "llvm.x86.avx2.pmovzxbd" => "__builtin_ia32_pmovzxbd256",
+    "llvm.x86.avx2.pmovzxbq" => "__builtin_ia32_pmovzxbq256",
+    "llvm.x86.avx2.pmovzxbw" => "__builtin_ia32_pmovzxbw256",
+    "llvm.x86.avx2.pmovzxdq" => "__builtin_ia32_pmovzxdq256",
+    "llvm.x86.avx2.pmovzxwd" => "__builtin_ia32_pmovzxwd256",
+    "llvm.x86.avx2.pmovzxwq" => "__builtin_ia32_pmovzxwq256",
+    "llvm.x86.avx2.pmul.dq" => "__builtin_ia32_pmuldq256",
     "llvm.x86.avx2.pmul.hr.sw" => "__builtin_ia32_pmulhrsw256",
     "llvm.x86.avx2.pmulh.w" => "__builtin_ia32_pmulhw256",
     "llvm.x86.avx2.pmulhu.w" => "__builtin_ia32_pmulhuw256",
+    "llvm.x86.avx2.pmulu.dq" => "__builtin_ia32_pmuludq256",
     "llvm.x86.avx2.psad.bw" => "__builtin_ia32_psadbw256",
     "llvm.x86.avx2.pshuf.b" => "__builtin_ia32_pshufb256",
     "llvm.x86.avx2.psign.b" => "__builtin_ia32_psignb256",
     "llvm.x86.avx2.psign.d" => "__builtin_ia32_psignd256",
     "llvm.x86.avx2.psign.w" => "__builtin_ia32_psignw256",
     "llvm.x86.avx2.psll.d" => "__builtin_ia32_pslld256",
+    "llvm.x86.avx2.psll.dq" => "__builtin_ia32_pslldqi256",
+    "llvm.x86.avx2.psll.dq.bs" => "__builtin_ia32_pslldqi256_byteshift",
     "llvm.x86.avx2.psll.q" => "__builtin_ia32_psllq256",
     "llvm.x86.avx2.psll.w" => "__builtin_ia32_psllw256",
     "llvm.x86.avx2.pslli.d" => "__builtin_ia32_pslldi256",
@@ -1414,6 +2973,8 @@ match name {
     "llvm.x86.avx2.psrav.d" => "__builtin_ia32_psrav4si",
     "llvm.x86.avx2.psrav.d.256" => "__builtin_ia32_psrav8si",
     "llvm.x86.avx2.psrl.d" => "__builtin_ia32_psrld256",
+    "llvm.x86.avx2.psrl.dq" => "__builtin_ia32_psrldqi256",
+    "llvm.x86.avx2.psrl.dq.bs" => "__builtin_ia32_psrldqi256_byteshift",
     "llvm.x86.avx2.psrl.q" => "__builtin_ia32_psrlq256",
     "llvm.x86.avx2.psrl.w" => "__builtin_ia32_psrlw256",
     "llvm.x86.avx2.psrli.d" => "__builtin_ia32_psrldi256",
@@ -1423,6 +2984,16 @@ match name {
     "llvm.x86.avx2.psrlv.d.256" => "__builtin_ia32_psrlv8si",
     "llvm.x86.avx2.psrlv.q" => "__builtin_ia32_psrlv2di",
     "llvm.x86.avx2.psrlv.q.256" => "__builtin_ia32_psrlv4di",
+    "llvm.x86.avx2.psubs.b" => "__builtin_ia32_psubsb256",
+    "llvm.x86.avx2.psubs.w" => "__builtin_ia32_psubsw256",
+    "llvm.x86.avx2.psubus.b" => "__builtin_ia32_psubusb256",
+    "llvm.x86.avx2.psubus.w" => "__builtin_ia32_psubusw256",
+    "llvm.x86.avx2.vbroadcast.sd.pd.256" => "__builtin_ia32_vbroadcastsd_pd256",
+    "llvm.x86.avx2.vbroadcast.ss.ps" => "__builtin_ia32_vbroadcastss_ps",
+    "llvm.x86.avx2.vbroadcast.ss.ps.256" => "__builtin_ia32_vbroadcastss_ps256",
+    "llvm.x86.avx2.vextracti128" => "__builtin_ia32_extract128i256",
+    "llvm.x86.avx2.vinserti128" => "__builtin_ia32_insert128i256",
+    "llvm.x86.avx2.vperm2i128" => "__builtin_ia32_permti256",
     "llvm.x86.avx512.add.pd.512" => "__builtin_ia32_addpd512",
     "llvm.x86.avx512.add.ps.512" => "__builtin_ia32_addps512",
     "llvm.x86.avx512.broadcastmb.128" => "__builtin_ia32_broadcastmb128",
@@ -1437,20 +3008,32 @@ match name {
     "llvm.x86.avx512.conflict.q.128" => "__builtin_ia32_vpconflictdi_128",
     "llvm.x86.avx512.conflict.q.256" => "__builtin_ia32_vpconflictdi_256",
     "llvm.x86.avx512.conflict.q.512" => "__builtin_ia32_vpconflictdi_512",
+    "llvm.x86.avx512.cvtsd2usi" => "__builtin_ia32_cvtsd2usi",
+    "llvm.x86.avx512.cvtsd2usi64" => "__builtin_ia32_cvtsd2usi64",
     "llvm.x86.avx512.cvtsi2sd64" => "__builtin_ia32_cvtsi2sd64",
     "llvm.x86.avx512.cvtsi2ss32" => "__builtin_ia32_cvtsi2ss32",
     "llvm.x86.avx512.cvtsi2ss64" => "__builtin_ia32_cvtsi2ss64",
+    "llvm.x86.avx512.cvtss2usi" => "__builtin_ia32_cvtss2usi",
+    "llvm.x86.avx512.cvtss2usi64" => "__builtin_ia32_cvtss2usi64",
     "llvm.x86.avx512.cvttsd2si" => "__builtin_ia32_vcvttsd2si32",
     "llvm.x86.avx512.cvttsd2si64" => "__builtin_ia32_vcvttsd2si64",
-    "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_vcvttsd2usi32",
-    "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_vcvttsd2usi64",
+    "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_cvttsd2usi",
+    // [DUPLICATE]: "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_vcvttsd2usi32",
+    "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_cvttsd2usi64",
+    // [DUPLICATE]: "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_vcvttsd2usi64",
     "llvm.x86.avx512.cvttss2si" => "__builtin_ia32_vcvttss2si32",
     "llvm.x86.avx512.cvttss2si64" => "__builtin_ia32_vcvttss2si64",
-    "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_vcvttss2usi32",
-    "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_vcvttss2usi64",
-    "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss32",
+    "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_cvttss2usi",
+    // [DUPLICATE]: "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_vcvttss2usi32",
+    "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_cvttss2usi64",
+    // [DUPLICATE]: "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_vcvttss2usi64",
+    "llvm.x86.avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd",
+    "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss",
+    // [DUPLICATE]: "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss32",
     "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi2sd64",
+    // [DUPLICATE]: "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi642sd",
     "llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi2ss64",
+    // [DUPLICATE]: "llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi642ss",
     "llvm.x86.avx512.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128",
     "llvm.x86.avx512.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256",
     "llvm.x86.avx512.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512",
@@ -1458,14 +3041,41 @@ match name {
     "llvm.x86.avx512.div.ps.512" => "__builtin_ia32_divps512",
     "llvm.x86.avx512.exp2.pd" => "__builtin_ia32_exp2pd_mask",
     "llvm.x86.avx512.exp2.ps" => "__builtin_ia32_exp2ps_mask",
+    "llvm.x86.avx512.gather.dpd.512" => "__builtin_ia32_gathersiv8df",
+    "llvm.x86.avx512.gather.dpi.512" => "__builtin_ia32_gathersiv16si",
+    "llvm.x86.avx512.gather.dpq.512" => "__builtin_ia32_gathersiv8di",
+    "llvm.x86.avx512.gather.dps.512" => "__builtin_ia32_gathersiv16sf",
+    "llvm.x86.avx512.gather.qpd.512" => "__builtin_ia32_gatherdiv8df",
+    "llvm.x86.avx512.gather.qpi.512" => "__builtin_ia32_gatherdiv16si",
+    "llvm.x86.avx512.gather.qpq.512" => "__builtin_ia32_gatherdiv8di",
+    "llvm.x86.avx512.gather.qps.512" => "__builtin_ia32_gatherdiv16sf",
     "llvm.x86.avx512.gatherpf.dpd.512" => "__builtin_ia32_gatherpfdpd",
     "llvm.x86.avx512.gatherpf.dps.512" => "__builtin_ia32_gatherpfdps",
     "llvm.x86.avx512.gatherpf.qpd.512" => "__builtin_ia32_gatherpfqpd",
     "llvm.x86.avx512.gatherpf.qps.512" => "__builtin_ia32_gatherpfqps",
+    "llvm.x86.avx512.kand.w" => "__builtin_ia32_kandhi",
+    "llvm.x86.avx512.kandn.w" => "__builtin_ia32_kandnhi",
+    "llvm.x86.avx512.knot.w" => "__builtin_ia32_knothi",
+    "llvm.x86.avx512.kor.w" => "__builtin_ia32_korhi",
+    "llvm.x86.avx512.kortestc.w" => "__builtin_ia32_kortestchi",
+    "llvm.x86.avx512.kortestz.w" => "__builtin_ia32_kortestzhi",
+    "llvm.x86.avx512.kunpck.bw" => "__builtin_ia32_kunpckhi",
+    "llvm.x86.avx512.kxnor.w" => "__builtin_ia32_kxnorhi",
+    "llvm.x86.avx512.kxor.w" => "__builtin_ia32_kxorhi",
     "llvm.x86.avx512.mask.add.sd.round" => "__builtin_ia32_addsd_round_mask",
     "llvm.x86.avx512.mask.add.ss.round" => "__builtin_ia32_addss_round_mask",
+    "llvm.x86.avx512.mask.blend.d.512" => "__builtin_ia32_blendmd_512_mask",
+    "llvm.x86.avx512.mask.blend.pd.512" => "__builtin_ia32_blendmpd_512_mask",
+    "llvm.x86.avx512.mask.blend.ps.512" => "__builtin_ia32_blendmps_512_mask",
+    "llvm.x86.avx512.mask.blend.q.512" => "__builtin_ia32_blendmq_512_mask",
+    "llvm.x86.avx512.mask.cmp.pd.512" => "__builtin_ia32_cmppd512_mask",
+    "llvm.x86.avx512.mask.cmp.ps.512" => "__builtin_ia32_cmpps512_mask",
     "llvm.x86.avx512.mask.cmp.sd" => "__builtin_ia32_cmpsd_mask",
     "llvm.x86.avx512.mask.cmp.ss" => "__builtin_ia32_cmpss_mask",
+    "llvm.x86.avx512.mask.conflict.d.512" => "__builtin_ia32_vpconflictsi_512_mask",
+    "llvm.x86.avx512.mask.conflict.q.512" => "__builtin_ia32_vpconflictdi_512_mask",
+    "llvm.x86.avx512.mask.cvtdq2pd.512" => "__builtin_ia32_cvtdq2pd512_mask",
+    "llvm.x86.avx512.mask.cvtdq2ps.512" => "__builtin_ia32_cvtdq2ps512_mask",
     "llvm.x86.avx512.mask.cvtpd2dq.128" => "__builtin_ia32_cvtpd2dq128_mask",
     "llvm.x86.avx512.mask.cvtpd2dq.512" => "__builtin_ia32_cvtpd2dq512_mask",
     "llvm.x86.avx512.mask.cvtpd2ps" => "__builtin_ia32_cvtpd2ps_mask",
@@ -1516,6 +3126,8 @@ match name {
     "llvm.x86.avx512.mask.cvttps2uqq.128" => "__builtin_ia32_cvttps2uqq128_mask",
     "llvm.x86.avx512.mask.cvttps2uqq.256" => "__builtin_ia32_cvttps2uqq256_mask",
     "llvm.x86.avx512.mask.cvttps2uqq.512" => "__builtin_ia32_cvttps2uqq512_mask",
+    "llvm.x86.avx512.mask.cvtudq2pd.512" => "__builtin_ia32_cvtudq2pd512_mask",
+    "llvm.x86.avx512.mask.cvtudq2ps.512" => "__builtin_ia32_cvtudq2ps512_mask",
     "llvm.x86.avx512.mask.cvtuqq2ps.128" => "__builtin_ia32_cvtuqq2ps128_mask",
     "llvm.x86.avx512.mask.div.sd.round" => "__builtin_ia32_divsd_round_mask",
     "llvm.x86.avx512.mask.div.ss.round" => "__builtin_ia32_divss_round_mask",
@@ -1545,12 +3157,61 @@ match name {
     "llvm.x86.avx512.mask.getmant.ps.512" => "__builtin_ia32_getmantps512_mask",
     "llvm.x86.avx512.mask.getmant.sd" => "__builtin_ia32_getmantsd_round_mask",
     "llvm.x86.avx512.mask.getmant.ss" => "__builtin_ia32_getmantss_round_mask",
+    "llvm.x86.avx512.mask.loadu.d.512" => "__builtin_ia32_loaddqusi512_mask",
+    "llvm.x86.avx512.mask.loadu.pd.512" => "__builtin_ia32_loadupd512_mask",
+    "llvm.x86.avx512.mask.loadu.ps.512" => "__builtin_ia32_loadups512_mask",
+    "llvm.x86.avx512.mask.loadu.q.512" => "__builtin_ia32_loaddqudi512_mask",
+    "llvm.x86.avx512.mask.lzcnt.d.512" => "__builtin_ia32_vplzcntd_512_mask",
+    "llvm.x86.avx512.mask.lzcnt.q.512" => "__builtin_ia32_vplzcntq_512_mask",
+    "llvm.x86.avx512.mask.max.pd.512" => "__builtin_ia32_maxpd512_mask",
+    "llvm.x86.avx512.mask.max.ps.512" => "__builtin_ia32_maxps512_mask",
     "llvm.x86.avx512.mask.max.sd.round" => "__builtin_ia32_maxsd_round_mask",
     "llvm.x86.avx512.mask.max.ss.round" => "__builtin_ia32_maxss_round_mask",
+    "llvm.x86.avx512.mask.min.pd.512" => "__builtin_ia32_minpd512_mask",
+    "llvm.x86.avx512.mask.min.ps.512" => "__builtin_ia32_minps512_mask",
     "llvm.x86.avx512.mask.min.sd.round" => "__builtin_ia32_minsd_round_mask",
     "llvm.x86.avx512.mask.min.ss.round" => "__builtin_ia32_minss_round_mask",
     "llvm.x86.avx512.mask.mul.sd.round" => "__builtin_ia32_mulsd_round_mask",
     "llvm.x86.avx512.mask.mul.ss.round" => "__builtin_ia32_mulss_round_mask",
+    "llvm.x86.avx512.mask.pabs.d.512" => "__builtin_ia32_pabsd512_mask",
+    "llvm.x86.avx512.mask.pabs.q.512" => "__builtin_ia32_pabsq512_mask",
+    "llvm.x86.avx512.mask.pand.d.512" => "__builtin_ia32_pandd512_mask",
+    "llvm.x86.avx512.mask.pand.q.512" => "__builtin_ia32_pandq512_mask",
+    "llvm.x86.avx512.mask.pbroadcast.d.gpr.512" => "__builtin_ia32_pbroadcastd512_gpr_mask",
+    "llvm.x86.avx512.mask.pbroadcast.q.gpr.512" => "__builtin_ia32_pbroadcastq512_gpr_mask",
+    "llvm.x86.avx512.mask.pbroadcast.q.mem.512" => "__builtin_ia32_pbroadcastq512_mem_mask",
+    "llvm.x86.avx512.mask.pcmpeq.b.128" => "__builtin_ia32_pcmpeqb128_mask",
+    "llvm.x86.avx512.mask.pcmpeq.b.256" => "__builtin_ia32_pcmpeqb256_mask",
+    "llvm.x86.avx512.mask.pcmpeq.b.512" => "__builtin_ia32_pcmpeqb512_mask",
+    "llvm.x86.avx512.mask.pcmpeq.d.128" => "__builtin_ia32_pcmpeqd128_mask",
+    "llvm.x86.avx512.mask.pcmpeq.d.256" => "__builtin_ia32_pcmpeqd256_mask",
+    "llvm.x86.avx512.mask.pcmpeq.d.512" => "__builtin_ia32_pcmpeqd512_mask",
+    "llvm.x86.avx512.mask.pcmpeq.q.128" => "__builtin_ia32_pcmpeqq128_mask",
+    "llvm.x86.avx512.mask.pcmpeq.q.256" => "__builtin_ia32_pcmpeqq256_mask",
+    "llvm.x86.avx512.mask.pcmpeq.q.512" => "__builtin_ia32_pcmpeqq512_mask",
+    "llvm.x86.avx512.mask.pcmpeq.w.128" => "__builtin_ia32_pcmpeqw128_mask",
+    "llvm.x86.avx512.mask.pcmpeq.w.256" => "__builtin_ia32_pcmpeqw256_mask",
+    "llvm.x86.avx512.mask.pcmpeq.w.512" => "__builtin_ia32_pcmpeqw512_mask",
+    "llvm.x86.avx512.mask.pcmpgt.b.128" => "__builtin_ia32_pcmpgtb128_mask",
+    "llvm.x86.avx512.mask.pcmpgt.b.256" => "__builtin_ia32_pcmpgtb256_mask",
+    "llvm.x86.avx512.mask.pcmpgt.b.512" => "__builtin_ia32_pcmpgtb512_mask",
+    "llvm.x86.avx512.mask.pcmpgt.d.128" => "__builtin_ia32_pcmpgtd128_mask",
+    "llvm.x86.avx512.mask.pcmpgt.d.256" => "__builtin_ia32_pcmpgtd256_mask",
+    "llvm.x86.avx512.mask.pcmpgt.d.512" => "__builtin_ia32_pcmpgtd512_mask",
+    "llvm.x86.avx512.mask.pcmpgt.q.128" => "__builtin_ia32_pcmpgtq128_mask",
+    "llvm.x86.avx512.mask.pcmpgt.q.256" => "__builtin_ia32_pcmpgtq256_mask",
+    "llvm.x86.avx512.mask.pcmpgt.q.512" => "__builtin_ia32_pcmpgtq512_mask",
+    "llvm.x86.avx512.mask.pcmpgt.w.128" => "__builtin_ia32_pcmpgtw128_mask",
+    "llvm.x86.avx512.mask.pcmpgt.w.256" => "__builtin_ia32_pcmpgtw256_mask",
+    "llvm.x86.avx512.mask.pcmpgt.w.512" => "__builtin_ia32_pcmpgtw512_mask",
+    "llvm.x86.avx512.mask.pmaxs.d.512" => "__builtin_ia32_pmaxsd512_mask",
+    "llvm.x86.avx512.mask.pmaxs.q.512" => "__builtin_ia32_pmaxsq512_mask",
+    "llvm.x86.avx512.mask.pmaxu.d.512" => "__builtin_ia32_pmaxud512_mask",
+    "llvm.x86.avx512.mask.pmaxu.q.512" => "__builtin_ia32_pmaxuq512_mask",
+    "llvm.x86.avx512.mask.pmins.d.512" => "__builtin_ia32_pminsd512_mask",
+    "llvm.x86.avx512.mask.pmins.q.512" => "__builtin_ia32_pminsq512_mask",
+    "llvm.x86.avx512.mask.pminu.d.512" => "__builtin_ia32_pminud512_mask",
+    "llvm.x86.avx512.mask.pminu.q.512" => "__builtin_ia32_pminuq512_mask",
     "llvm.x86.avx512.mask.pmov.db.128" => "__builtin_ia32_pmovdb128_mask",
     "llvm.x86.avx512.mask.pmov.db.256" => "__builtin_ia32_pmovdb256_mask",
     "llvm.x86.avx512.mask.pmov.db.mem.128" => "__builtin_ia32_pmovdb128mem_mask",
@@ -1652,6 +3313,10 @@ match name {
     "llvm.x86.avx512.mask.pmovus.wb.mem.128" => "__builtin_ia32_pmovuswb128mem_mask",
     "llvm.x86.avx512.mask.pmovus.wb.mem.256" => "__builtin_ia32_pmovuswb256mem_mask",
     "llvm.x86.avx512.mask.pmovus.wb.mem.512" => "__builtin_ia32_pmovuswb512mem_mask",
+    "llvm.x86.avx512.mask.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask",
+    "llvm.x86.avx512.mask.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask",
+    "llvm.x86.avx512.mask.ptestm.d.512" => "__builtin_ia32_ptestmd512",
+    "llvm.x86.avx512.mask.ptestm.q.512" => "__builtin_ia32_ptestmq512",
     "llvm.x86.avx512.mask.range.pd.128" => "__builtin_ia32_rangepd128_mask",
     "llvm.x86.avx512.mask.range.pd.256" => "__builtin_ia32_rangepd256_mask",
     "llvm.x86.avx512.mask.range.pd.512" => "__builtin_ia32_rangepd512_mask",
@@ -1684,11 +3349,23 @@ match name {
     "llvm.x86.avx512.mask.scalef.ps.512" => "__builtin_ia32_scalefps512_mask",
     "llvm.x86.avx512.mask.scalef.sd" => "__builtin_ia32_scalefsd_round_mask",
     "llvm.x86.avx512.mask.scalef.ss" => "__builtin_ia32_scalefss_round_mask",
+    "llvm.x86.avx512.mask.store.ss" => "__builtin_ia32_storess_mask",
+    "llvm.x86.avx512.mask.storeu.d.512" => "__builtin_ia32_storedqusi512_mask",
+    "llvm.x86.avx512.mask.storeu.pd.512" => "__builtin_ia32_storeupd512_mask",
+    "llvm.x86.avx512.mask.storeu.ps.512" => "__builtin_ia32_storeups512_mask",
+    "llvm.x86.avx512.mask.storeu.q.512" => "__builtin_ia32_storedqudi512_mask",
     "llvm.x86.avx512.mask.sub.sd.round" => "__builtin_ia32_subsd_round_mask",
     "llvm.x86.avx512.mask.sub.ss.round" => "__builtin_ia32_subss_round_mask",
+    "llvm.x86.avx512.mask.valign.d.512" => "__builtin_ia32_alignd512_mask",
+    "llvm.x86.avx512.mask.valign.q.512" => "__builtin_ia32_alignq512_mask",
+    "llvm.x86.avx512.mask.vcvtph2ps.512" => "__builtin_ia32_vcvtph2ps512_mask",
     "llvm.x86.avx512.mask.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph_mask",
     "llvm.x86.avx512.mask.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256_mask",
     "llvm.x86.avx512.mask.vcvtps2ph.512" => "__builtin_ia32_vcvtps2ph512_mask",
+    "llvm.x86.avx512.mask.vpermt.d.512" => "__builtin_ia32_vpermt2vard512_mask",
+    "llvm.x86.avx512.mask.vpermt.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
+    "llvm.x86.avx512.mask.vpermt.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
+    "llvm.x86.avx512.mask.vpermt.q.512" => "__builtin_ia32_vpermt2varq512_mask",
     "llvm.x86.avx512.maskz.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_maskz",
     "llvm.x86.avx512.maskz.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_maskz",
     "llvm.x86.avx512.maskz.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_maskz",
@@ -1701,6 +3378,7 @@ match name {
     "llvm.x86.avx512.max.ps.512" => "__builtin_ia32_maxps512",
     "llvm.x86.avx512.min.pd.512" => "__builtin_ia32_minpd512",
     "llvm.x86.avx512.min.ps.512" => "__builtin_ia32_minps512",
+    "llvm.x86.avx512.movntdqa" => "__builtin_ia32_movntdqa512",
     "llvm.x86.avx512.mul.pd.512" => "__builtin_ia32_mulpd512",
     "llvm.x86.avx512.mul.ps.512" => "__builtin_ia32_mulps512",
     "llvm.x86.avx512.packssdw.512" => "__builtin_ia32_packssdw512",
@@ -1709,6 +3387,8 @@ match name {
     "llvm.x86.avx512.packuswb.512" => "__builtin_ia32_packuswb512",
     "llvm.x86.avx512.pavg.b.512" => "__builtin_ia32_pavgb512",
     "llvm.x86.avx512.pavg.w.512" => "__builtin_ia32_pavgw512",
+    "llvm.x86.avx512.pbroadcastd.512" => "__builtin_ia32_pbroadcastd512",
+    "llvm.x86.avx512.pbroadcastq.512" => "__builtin_ia32_pbroadcastq512",
     "llvm.x86.avx512.permvar.df.256" => "__builtin_ia32_permvardf256",
     "llvm.x86.avx512.permvar.df.512" => "__builtin_ia32_permvardf512",
     "llvm.x86.avx512.permvar.di.256" => "__builtin_ia32_permvardi256",
@@ -1723,6 +3403,11 @@ match name {
     "llvm.x86.avx512.permvar.si.512" => "__builtin_ia32_permvarsi512",
     "llvm.x86.avx512.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512",
     "llvm.x86.avx512.pmaddw.d.512" => "__builtin_ia32_pmaddwd512",
+    "llvm.x86.avx512.pmovzxbd" => "__builtin_ia32_pmovzxbd512",
+    "llvm.x86.avx512.pmovzxbq" => "__builtin_ia32_pmovzxbq512",
+    "llvm.x86.avx512.pmovzxdq" => "__builtin_ia32_pmovzxdq512",
+    "llvm.x86.avx512.pmovzxwd" => "__builtin_ia32_pmovzxwd512",
+    "llvm.x86.avx512.pmovzxwq" => "__builtin_ia32_pmovzxwq512",
     "llvm.x86.avx512.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512",
     "llvm.x86.avx512.pmulh.w.512" => "__builtin_ia32_pmulhw512",
     "llvm.x86.avx512.pmulhu.w.512" => "__builtin_ia32_pmulhuw512",
@@ -1732,6 +3417,8 @@ match name {
     "llvm.x86.avx512.psad.bw.512" => "__builtin_ia32_psadbw512",
     "llvm.x86.avx512.pshuf.b.512" => "__builtin_ia32_pshufb512",
     "llvm.x86.avx512.psll.d.512" => "__builtin_ia32_pslld512",
+    "llvm.x86.avx512.psll.dq" => "__builtin_ia32_pslldqi512",
+    "llvm.x86.avx512.psll.dq.bs" => "__builtin_ia32_pslldqi512_byteshift",
     "llvm.x86.avx512.psll.q.512" => "__builtin_ia32_psllq512",
     "llvm.x86.avx512.psll.w.512" => "__builtin_ia32_psllw512",
     "llvm.x86.avx512.pslli.d.512" => "__builtin_ia32_pslldi512",
@@ -1760,6 +3447,8 @@ match name {
     "llvm.x86.avx512.psrav.w.256" => "__builtin_ia32_psrav16hi",
     "llvm.x86.avx512.psrav.w.512" => "__builtin_ia32_psrav32hi",
     "llvm.x86.avx512.psrl.d.512" => "__builtin_ia32_psrld512",
+    "llvm.x86.avx512.psrl.dq" => "__builtin_ia32_psrldqi512",
+    "llvm.x86.avx512.psrl.dq.bs" => "__builtin_ia32_psrldqi512_byteshift",
     "llvm.x86.avx512.psrl.q.512" => "__builtin_ia32_psrlq512",
     "llvm.x86.avx512.psrl.w.512" => "__builtin_ia32_psrlw512",
     "llvm.x86.avx512.psrli.d.512" => "__builtin_ia32_psrldi512",
@@ -1786,8 +3475,12 @@ match name {
     "llvm.x86.avx512.rcp14.ss" => "__builtin_ia32_rcp14ss_mask",
     "llvm.x86.avx512.rcp28.pd" => "__builtin_ia32_rcp28pd_mask",
     "llvm.x86.avx512.rcp28.ps" => "__builtin_ia32_rcp28ps_mask",
-    "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
-    "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
+    "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
+    // [DUPLICATE]: "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
+    "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
+    // [DUPLICATE]: "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
+    "llvm.x86.avx512.rndscale.sd" => "__builtin_ia32_rndscalesd",
+    "llvm.x86.avx512.rndscale.ss" => "__builtin_ia32_rndscaless",
     "llvm.x86.avx512.rsqrt14.pd.128" => "__builtin_ia32_rsqrt14pd128_mask",
     "llvm.x86.avx512.rsqrt14.pd.256" => "__builtin_ia32_rsqrt14pd256_mask",
     "llvm.x86.avx512.rsqrt14.pd.512" => "__builtin_ia32_rsqrt14pd512_mask",
@@ -1798,14 +3491,32 @@ match name {
     "llvm.x86.avx512.rsqrt14.ss" => "__builtin_ia32_rsqrt14ss_mask",
     "llvm.x86.avx512.rsqrt28.pd" => "__builtin_ia32_rsqrt28pd_mask",
     "llvm.x86.avx512.rsqrt28.ps" => "__builtin_ia32_rsqrt28ps_mask",
-    "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
-    "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
+    "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
+    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
+    "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
+    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
+    "llvm.x86.avx512.scatter.dpd.512" => "__builtin_ia32_scattersiv8df",
+    "llvm.x86.avx512.scatter.dpi.512" => "__builtin_ia32_scattersiv16si",
+    "llvm.x86.avx512.scatter.dpq.512" => "__builtin_ia32_scattersiv8di",
+    "llvm.x86.avx512.scatter.dps.512" => "__builtin_ia32_scattersiv16sf",
+    "llvm.x86.avx512.scatter.qpd.512" => "__builtin_ia32_scatterdiv8df",
+    "llvm.x86.avx512.scatter.qpi.512" => "__builtin_ia32_scatterdiv16si",
+    "llvm.x86.avx512.scatter.qpq.512" => "__builtin_ia32_scatterdiv8di",
+    "llvm.x86.avx512.scatter.qps.512" => "__builtin_ia32_scatterdiv16sf",
     "llvm.x86.avx512.scatterpf.dpd.512" => "__builtin_ia32_scatterpfdpd",
     "llvm.x86.avx512.scatterpf.dps.512" => "__builtin_ia32_scatterpfdps",
     "llvm.x86.avx512.scatterpf.qpd.512" => "__builtin_ia32_scatterpfqpd",
     "llvm.x86.avx512.scatterpf.qps.512" => "__builtin_ia32_scatterpfqps",
+    "llvm.x86.avx512.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
+    "llvm.x86.avx512.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
+    "llvm.x86.avx512.sqrt.sd" => "__builtin_ia32_sqrtrndsd",
+    "llvm.x86.avx512.sqrt.ss" => "__builtin_ia32_sqrtrndss",
     "llvm.x86.avx512.sub.pd.512" => "__builtin_ia32_subpd512",
     "llvm.x86.avx512.sub.ps.512" => "__builtin_ia32_subps512",
+    "llvm.x86.avx512.vbroadcast.sd.512" => "__builtin_ia32_vbroadcastsd512",
+    "llvm.x86.avx512.vbroadcast.sd.pd.512" => "__builtin_ia32_vbroadcastsd_pd512",
+    "llvm.x86.avx512.vbroadcast.ss.512" => "__builtin_ia32_vbroadcastss512",
+    "llvm.x86.avx512.vbroadcast.ss.ps.512" => "__builtin_ia32_vbroadcastss_ps512",
     "llvm.x86.avx512.vcomi.sd" => "__builtin_ia32_vcomisd",
     "llvm.x86.avx512.vcomi.ss" => "__builtin_ia32_vcomiss",
     "llvm.x86.avx512.vcvtsd2si32" => "__builtin_ia32_vcvtsd2si32",
@@ -2027,10 +3738,50 @@ match name {
     "llvm.x86.flags.read.u64" => "__builtin_ia32_readeflags_u64",
     "llvm.x86.flags.write.u32" => "__builtin_ia32_writeeflags_u32",
     "llvm.x86.flags.write.u64" => "__builtin_ia32_writeeflags_u64",
+    "llvm.x86.fma.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
+    "llvm.x86.fma.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
+    "llvm.x86.fma.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
+    "llvm.x86.fma.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
+    "llvm.x86.fma.mask.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask",
+    "llvm.x86.fma.mask.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask",
+    "llvm.x86.fma.mask.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask",
+    "llvm.x86.fma.mask.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask",
+    "llvm.x86.fma.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
+    "llvm.x86.fma.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
+    "llvm.x86.fma.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
+    "llvm.x86.fma.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
+    "llvm.x86.fma.vfmadd.pd" => "__builtin_ia32_vfmaddpd",
+    "llvm.x86.fma.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256",
+    "llvm.x86.fma.vfmadd.ps" => "__builtin_ia32_vfmaddps",
+    "llvm.x86.fma.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256",
+    "llvm.x86.fma.vfmadd.sd" => "__builtin_ia32_vfmaddsd",
+    "llvm.x86.fma.vfmadd.ss" => "__builtin_ia32_vfmaddss",
     "llvm.x86.fma.vfmaddsub.pd" => "__builtin_ia32_vfmaddsubpd",
     "llvm.x86.fma.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256",
     "llvm.x86.fma.vfmaddsub.ps" => "__builtin_ia32_vfmaddsubps",
     "llvm.x86.fma.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256",
+    "llvm.x86.fma.vfmsub.pd" => "__builtin_ia32_vfmsubpd",
+    "llvm.x86.fma.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256",
+    "llvm.x86.fma.vfmsub.ps" => "__builtin_ia32_vfmsubps",
+    "llvm.x86.fma.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256",
+    "llvm.x86.fma.vfmsub.sd" => "__builtin_ia32_vfmsubsd",
+    "llvm.x86.fma.vfmsub.ss" => "__builtin_ia32_vfmsubss",
+    "llvm.x86.fma.vfmsubadd.pd" => "__builtin_ia32_vfmsubaddpd",
+    "llvm.x86.fma.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256",
+    "llvm.x86.fma.vfmsubadd.ps" => "__builtin_ia32_vfmsubaddps",
+    "llvm.x86.fma.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256",
+    "llvm.x86.fma.vfnmadd.pd" => "__builtin_ia32_vfnmaddpd",
+    "llvm.x86.fma.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256",
+    "llvm.x86.fma.vfnmadd.ps" => "__builtin_ia32_vfnmaddps",
+    "llvm.x86.fma.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256",
+    "llvm.x86.fma.vfnmadd.sd" => "__builtin_ia32_vfnmaddsd",
+    "llvm.x86.fma.vfnmadd.ss" => "__builtin_ia32_vfnmaddss",
+    "llvm.x86.fma.vfnmsub.pd" => "__builtin_ia32_vfnmsubpd",
+    "llvm.x86.fma.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256",
+    "llvm.x86.fma.vfnmsub.ps" => "__builtin_ia32_vfnmsubps",
+    "llvm.x86.fma.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256",
+    "llvm.x86.fma.vfnmsub.sd" => "__builtin_ia32_vfnmsubsd",
+    "llvm.x86.fma.vfnmsub.ss" => "__builtin_ia32_vfnmsubss",
     "llvm.x86.fxrstor" => "__builtin_ia32_fxrstor",
     "llvm.x86.fxrstor64" => "__builtin_ia32_fxrstor64",
     "llvm.x86.fxsave" => "__builtin_ia32_fxsave",
@@ -2134,6 +3885,7 @@ match name {
     "llvm.x86.rdsspd" => "__builtin_ia32_rdsspd",
     "llvm.x86.rdsspq" => "__builtin_ia32_rdsspq",
     "llvm.x86.rdtsc" => "__builtin_ia32_rdtsc",
+    "llvm.x86.rdtscp" => "__builtin_ia32_rdtscp",
     "llvm.x86.rstorssp" => "__builtin_ia32_rstorssp",
     "llvm.x86.saveprevssp" => "__builtin_ia32_saveprevssp",
     "llvm.x86.senduipi" => "__builtin_ia32_senduipi",
@@ -2147,6 +3899,8 @@ match name {
     "llvm.x86.sha256msg2" => "__builtin_ia32_sha256msg2",
     "llvm.x86.sha256rnds2" => "__builtin_ia32_sha256rnds2",
     "llvm.x86.slwpcb" => "__builtin_ia32_slwpcb",
+    "llvm.x86.sse.add.ss" => "__builtin_ia32_addss",
+    "llvm.x86.sse.cmp.ps" => "__builtin_ia32_cmpps",
     "llvm.x86.sse.cmp.ss" => "__builtin_ia32_cmpss",
     "llvm.x86.sse.comieq.ss" => "__builtin_ia32_comieq",
     "llvm.x86.sse.comige.ss" => "__builtin_ia32_comige",
@@ -2158,30 +3912,40 @@ match name {
     "llvm.x86.sse.cvtpi2pd" => "__builtin_ia32_cvtpi2pd",
     "llvm.x86.sse.cvtpi2ps" => "__builtin_ia32_cvtpi2ps",
     "llvm.x86.sse.cvtps2pi" => "__builtin_ia32_cvtps2pi",
+    "llvm.x86.sse.cvtsi2ss" => "__builtin_ia32_cvtsi2ss",
+    "llvm.x86.sse.cvtsi642ss" => "__builtin_ia32_cvtsi642ss",
     "llvm.x86.sse.cvtss2si" => "__builtin_ia32_cvtss2si",
     "llvm.x86.sse.cvtss2si64" => "__builtin_ia32_cvtss2si64",
     "llvm.x86.sse.cvttpd2pi" => "__builtin_ia32_cvttpd2pi",
     "llvm.x86.sse.cvttps2pi" => "__builtin_ia32_cvttps2pi",
     "llvm.x86.sse.cvttss2si" => "__builtin_ia32_cvttss2si",
     "llvm.x86.sse.cvttss2si64" => "__builtin_ia32_cvttss2si64",
+    "llvm.x86.sse.div.ss" => "__builtin_ia32_divss",
     "llvm.x86.sse.max.ps" => "__builtin_ia32_maxps",
     "llvm.x86.sse.max.ss" => "__builtin_ia32_maxss",
     "llvm.x86.sse.min.ps" => "__builtin_ia32_minps",
     "llvm.x86.sse.min.ss" => "__builtin_ia32_minss",
     "llvm.x86.sse.movmsk.ps" => "__builtin_ia32_movmskps",
+    "llvm.x86.sse.mul.ss" => "__builtin_ia32_mulss",
     "llvm.x86.sse.pshuf.w" => "__builtin_ia32_pshufw",
     "llvm.x86.sse.rcp.ps" => "__builtin_ia32_rcpps",
     "llvm.x86.sse.rcp.ss" => "__builtin_ia32_rcpss",
     "llvm.x86.sse.rsqrt.ps" => "__builtin_ia32_rsqrtps",
     "llvm.x86.sse.rsqrt.ss" => "__builtin_ia32_rsqrtss",
     "llvm.x86.sse.sfence" => "__builtin_ia32_sfence",
+    "llvm.x86.sse.sqrt.ps" => "__builtin_ia32_sqrtps",
+    "llvm.x86.sse.sqrt.ss" => "__builtin_ia32_sqrtss",
+    "llvm.x86.sse.storeu.ps" => "__builtin_ia32_storeups",
+    "llvm.x86.sse.sub.ss" => "__builtin_ia32_subss",
     "llvm.x86.sse.ucomieq.ss" => "__builtin_ia32_ucomieq",
     "llvm.x86.sse.ucomige.ss" => "__builtin_ia32_ucomige",
     "llvm.x86.sse.ucomigt.ss" => "__builtin_ia32_ucomigt",
     "llvm.x86.sse.ucomile.ss" => "__builtin_ia32_ucomile",
     "llvm.x86.sse.ucomilt.ss" => "__builtin_ia32_ucomilt",
     "llvm.x86.sse.ucomineq.ss" => "__builtin_ia32_ucomineq",
+    "llvm.x86.sse2.add.sd" => "__builtin_ia32_addsd",
     "llvm.x86.sse2.clflush" => "__builtin_ia32_clflush",
+    "llvm.x86.sse2.cmp.pd" => "__builtin_ia32_cmppd",
     "llvm.x86.sse2.cmp.sd" => "__builtin_ia32_cmpsd",
     "llvm.x86.sse2.comieq.sd" => "__builtin_ia32_comisdeq",
     "llvm.x86.sse2.comige.sd" => "__builtin_ia32_comisdge",
@@ -2189,16 +3953,23 @@ match name {
     "llvm.x86.sse2.comile.sd" => "__builtin_ia32_comisdle",
     "llvm.x86.sse2.comilt.sd" => "__builtin_ia32_comisdlt",
     "llvm.x86.sse2.comineq.sd" => "__builtin_ia32_comisdneq",
+    "llvm.x86.sse2.cvtdq2pd" => "__builtin_ia32_cvtdq2pd",
+    "llvm.x86.sse2.cvtdq2ps" => "__builtin_ia32_cvtdq2ps",
     "llvm.x86.sse2.cvtpd2dq" => "__builtin_ia32_cvtpd2dq",
     "llvm.x86.sse2.cvtpd2ps" => "__builtin_ia32_cvtpd2ps",
     "llvm.x86.sse2.cvtps2dq" => "__builtin_ia32_cvtps2dq",
+    "llvm.x86.sse2.cvtps2pd" => "__builtin_ia32_cvtps2pd",
     "llvm.x86.sse2.cvtsd2si" => "__builtin_ia32_cvtsd2si",
     "llvm.x86.sse2.cvtsd2si64" => "__builtin_ia32_cvtsd2si64",
     "llvm.x86.sse2.cvtsd2ss" => "__builtin_ia32_cvtsd2ss",
+    "llvm.x86.sse2.cvtsi2sd" => "__builtin_ia32_cvtsi2sd",
+    "llvm.x86.sse2.cvtsi642sd" => "__builtin_ia32_cvtsi642sd",
+    "llvm.x86.sse2.cvtss2sd" => "__builtin_ia32_cvtss2sd",
     "llvm.x86.sse2.cvttpd2dq" => "__builtin_ia32_cvttpd2dq",
     "llvm.x86.sse2.cvttps2dq" => "__builtin_ia32_cvttps2dq",
     "llvm.x86.sse2.cvttsd2si" => "__builtin_ia32_cvttsd2si",
     "llvm.x86.sse2.cvttsd2si64" => "__builtin_ia32_cvttsd2si64",
+    "llvm.x86.sse2.div.sd" => "__builtin_ia32_divsd",
     "llvm.x86.sse2.lfence" => "__builtin_ia32_lfence",
     "llvm.x86.sse2.maskmov.dqu" => "__builtin_ia32_maskmovdqu",
     "llvm.x86.sse2.max.pd" => "__builtin_ia32_maxpd",
@@ -2207,18 +3978,33 @@ match name {
     "llvm.x86.sse2.min.pd" => "__builtin_ia32_minpd",
     "llvm.x86.sse2.min.sd" => "__builtin_ia32_minsd",
     "llvm.x86.sse2.movmsk.pd" => "__builtin_ia32_movmskpd",
+    "llvm.x86.sse2.mul.sd" => "__builtin_ia32_mulsd",
     "llvm.x86.sse2.packssdw.128" => "__builtin_ia32_packssdw128",
     "llvm.x86.sse2.packsswb.128" => "__builtin_ia32_packsswb128",
     "llvm.x86.sse2.packuswb.128" => "__builtin_ia32_packuswb128",
+    "llvm.x86.sse2.padds.b" => "__builtin_ia32_paddsb128",
+    "llvm.x86.sse2.padds.w" => "__builtin_ia32_paddsw128",
+    "llvm.x86.sse2.paddus.b" => "__builtin_ia32_paddusb128",
+    "llvm.x86.sse2.paddus.w" => "__builtin_ia32_paddusw128",
     "llvm.x86.sse2.pause" => "__builtin_ia32_pause",
     "llvm.x86.sse2.pavg.b" => "__builtin_ia32_pavgb128",
     "llvm.x86.sse2.pavg.w" => "__builtin_ia32_pavgw128",
     "llvm.x86.sse2.pmadd.wd" => "__builtin_ia32_pmaddwd128",
+    "llvm.x86.sse2.pmaxs.w" => "__builtin_ia32_pmaxsw128",
+    "llvm.x86.sse2.pmaxu.b" => "__builtin_ia32_pmaxub128",
+    "llvm.x86.sse2.pmins.w" => "__builtin_ia32_pminsw128",
+    "llvm.x86.sse2.pminu.b" => "__builtin_ia32_pminub128",
     "llvm.x86.sse2.pmovmskb.128" => "__builtin_ia32_pmovmskb128",
     "llvm.x86.sse2.pmulh.w" => "__builtin_ia32_pmulhw128",
     "llvm.x86.sse2.pmulhu.w" => "__builtin_ia32_pmulhuw128",
+    "llvm.x86.sse2.pmulu.dq" => "__builtin_ia32_pmuludq128",
     "llvm.x86.sse2.psad.bw" => "__builtin_ia32_psadbw128",
+    "llvm.x86.sse2.pshuf.d" => "__builtin_ia32_pshufd",
+    "llvm.x86.sse2.pshufh.w" => "__builtin_ia32_pshufhw",
+    "llvm.x86.sse2.pshufl.w" => "__builtin_ia32_pshuflw",
     "llvm.x86.sse2.psll.d" => "__builtin_ia32_pslld128",
+    "llvm.x86.sse2.psll.dq" => "__builtin_ia32_pslldqi128",
+    "llvm.x86.sse2.psll.dq.bs" => "__builtin_ia32_pslldqi128_byteshift",
     "llvm.x86.sse2.psll.q" => "__builtin_ia32_psllq128",
     "llvm.x86.sse2.psll.w" => "__builtin_ia32_psllw128",
     "llvm.x86.sse2.pslli.d" => "__builtin_ia32_pslldi128",
@@ -2229,11 +4015,23 @@ match name {
     "llvm.x86.sse2.psrai.d" => "__builtin_ia32_psradi128",
     "llvm.x86.sse2.psrai.w" => "__builtin_ia32_psrawi128",
     "llvm.x86.sse2.psrl.d" => "__builtin_ia32_psrld128",
+    "llvm.x86.sse2.psrl.dq" => "__builtin_ia32_psrldqi128",
+    "llvm.x86.sse2.psrl.dq.bs" => "__builtin_ia32_psrldqi128_byteshift",
     "llvm.x86.sse2.psrl.q" => "__builtin_ia32_psrlq128",
     "llvm.x86.sse2.psrl.w" => "__builtin_ia32_psrlw128",
     "llvm.x86.sse2.psrli.d" => "__builtin_ia32_psrldi128",
     "llvm.x86.sse2.psrli.q" => "__builtin_ia32_psrlqi128",
     "llvm.x86.sse2.psrli.w" => "__builtin_ia32_psrlwi128",
+    "llvm.x86.sse2.psubs.b" => "__builtin_ia32_psubsb128",
+    "llvm.x86.sse2.psubs.w" => "__builtin_ia32_psubsw128",
+    "llvm.x86.sse2.psubus.b" => "__builtin_ia32_psubusb128",
+    "llvm.x86.sse2.psubus.w" => "__builtin_ia32_psubusw128",
+    "llvm.x86.sse2.sqrt.pd" => "__builtin_ia32_sqrtpd",
+    "llvm.x86.sse2.sqrt.sd" => "__builtin_ia32_sqrtsd",
+    "llvm.x86.sse2.storel.dq" => "__builtin_ia32_storelv4si",
+    "llvm.x86.sse2.storeu.dq" => "__builtin_ia32_storedqu",
+    "llvm.x86.sse2.storeu.pd" => "__builtin_ia32_storeupd",
+    "llvm.x86.sse2.sub.sd" => "__builtin_ia32_subsd",
     "llvm.x86.sse2.ucomieq.sd" => "__builtin_ia32_ucomisdeq",
     "llvm.x86.sse2.ucomige.sd" => "__builtin_ia32_ucomisdge",
     "llvm.x86.sse2.ucomigt.sd" => "__builtin_ia32_ucomisdgt",
@@ -2249,15 +4047,41 @@ match name {
     "llvm.x86.sse3.ldu.dq" => "__builtin_ia32_lddqu",
     "llvm.x86.sse3.monitor" => "__builtin_ia32_monitor",
     "llvm.x86.sse3.mwait" => "__builtin_ia32_mwait",
+    "llvm.x86.sse41.blendpd" => "__builtin_ia32_blendpd",
+    "llvm.x86.sse41.blendps" => "__builtin_ia32_blendps",
     "llvm.x86.sse41.blendvpd" => "__builtin_ia32_blendvpd",
     "llvm.x86.sse41.blendvps" => "__builtin_ia32_blendvps",
     "llvm.x86.sse41.dppd" => "__builtin_ia32_dppd",
     "llvm.x86.sse41.dpps" => "__builtin_ia32_dpps",
+    "llvm.x86.sse41.extractps" => "__builtin_ia32_extractps128",
     "llvm.x86.sse41.insertps" => "__builtin_ia32_insertps128",
+    "llvm.x86.sse41.movntdqa" => "__builtin_ia32_movntdqa",
     "llvm.x86.sse41.mpsadbw" => "__builtin_ia32_mpsadbw128",
     "llvm.x86.sse41.packusdw" => "__builtin_ia32_packusdw128",
     "llvm.x86.sse41.pblendvb" => "__builtin_ia32_pblendvb128",
+    "llvm.x86.sse41.pblendw" => "__builtin_ia32_pblendw128",
     "llvm.x86.sse41.phminposuw" => "__builtin_ia32_phminposuw128",
+    "llvm.x86.sse41.pmaxsb" => "__builtin_ia32_pmaxsb128",
+    "llvm.x86.sse41.pmaxsd" => "__builtin_ia32_pmaxsd128",
+    "llvm.x86.sse41.pmaxud" => "__builtin_ia32_pmaxud128",
+    "llvm.x86.sse41.pmaxuw" => "__builtin_ia32_pmaxuw128",
+    "llvm.x86.sse41.pminsb" => "__builtin_ia32_pminsb128",
+    "llvm.x86.sse41.pminsd" => "__builtin_ia32_pminsd128",
+    "llvm.x86.sse41.pminud" => "__builtin_ia32_pminud128",
+    "llvm.x86.sse41.pminuw" => "__builtin_ia32_pminuw128",
+    "llvm.x86.sse41.pmovsxbd" => "__builtin_ia32_pmovsxbd128",
+    "llvm.x86.sse41.pmovsxbq" => "__builtin_ia32_pmovsxbq128",
+    "llvm.x86.sse41.pmovsxbw" => "__builtin_ia32_pmovsxbw128",
+    "llvm.x86.sse41.pmovsxdq" => "__builtin_ia32_pmovsxdq128",
+    "llvm.x86.sse41.pmovsxwd" => "__builtin_ia32_pmovsxwd128",
+    "llvm.x86.sse41.pmovsxwq" => "__builtin_ia32_pmovsxwq128",
+    "llvm.x86.sse41.pmovzxbd" => "__builtin_ia32_pmovzxbd128",
+    "llvm.x86.sse41.pmovzxbq" => "__builtin_ia32_pmovzxbq128",
+    "llvm.x86.sse41.pmovzxbw" => "__builtin_ia32_pmovzxbw128",
+    "llvm.x86.sse41.pmovzxdq" => "__builtin_ia32_pmovzxdq128",
+    "llvm.x86.sse41.pmovzxwd" => "__builtin_ia32_pmovzxwd128",
+    "llvm.x86.sse41.pmovzxwq" => "__builtin_ia32_pmovzxwq128",
+    "llvm.x86.sse41.pmuldq" => "__builtin_ia32_pmuldq128",
     "llvm.x86.sse41.ptestc" => "__builtin_ia32_ptestc128",
     "llvm.x86.sse41.ptestnzc" => "__builtin_ia32_ptestnzc128",
     "llvm.x86.sse41.ptestz" => "__builtin_ia32_ptestz128",
@@ -2287,9 +4111,14 @@ match name {
     "llvm.x86.sse4a.extrqi" => "__builtin_ia32_extrqi",
     "llvm.x86.sse4a.insertq" => "__builtin_ia32_insertq",
     "llvm.x86.sse4a.insertqi" => "__builtin_ia32_insertqi",
+    "llvm.x86.sse4a.movnt.sd" => "__builtin_ia32_movntsd",
+    "llvm.x86.sse4a.movnt.ss" => "__builtin_ia32_movntss",
     "llvm.x86.ssse3.pabs.b" => "__builtin_ia32_pabsb",
+    "llvm.x86.ssse3.pabs.b.128" => "__builtin_ia32_pabsb128",
     "llvm.x86.ssse3.pabs.d" => "__builtin_ia32_pabsd",
+    "llvm.x86.ssse3.pabs.d.128" => "__builtin_ia32_pabsd128",
     "llvm.x86.ssse3.pabs.w" => "__builtin_ia32_pabsw",
+    "llvm.x86.ssse3.pabs.w.128" => "__builtin_ia32_pabsw128",
     "llvm.x86.ssse3.phadd.d" => "__builtin_ia32_phaddd",
     "llvm.x86.ssse3.phadd.d.128" => "__builtin_ia32_phaddd128",
     "llvm.x86.ssse3.phadd.sw" => "__builtin_ia32_phaddsw",
@@ -2316,6 +4145,8 @@ match name {
     "llvm.x86.ssse3.psign.w.128" => "__builtin_ia32_psignw128",
     "llvm.x86.sttilecfg" => "__builtin_ia32_tile_storeconfig",
     "llvm.x86.stui" => "__builtin_ia32_stui",
+    "llvm.x86.subborrow.u32" => "__builtin_ia32_subborrow_u32",
+    "llvm.x86.subborrow.u64" => "__builtin_ia32_subborrow_u64",
     "llvm.x86.tbm.bextri.u32" => "__builtin_ia32_bextri_u32",
     "llvm.x86.tbm.bextri.u64" => "__builtin_ia32_bextri_u64",
     "llvm.x86.tdpbf16ps" => "__builtin_ia32_tdpbf16ps",
@@ -2341,6 +4172,8 @@ match name {
     "llvm.x86.tpause" => "__builtin_ia32_tpause",
     "llvm.x86.umonitor" => "__builtin_ia32_umonitor",
     "llvm.x86.umwait" => "__builtin_ia32_umwait",
+    "llvm.x86.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps",
+    "llvm.x86.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256",
     "llvm.x86.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph",
     "llvm.x86.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256",
     "llvm.x86.vgf2p8affineinvqb.128" => "__builtin_ia32_vgf2p8affineinvqb_v16qi",
@@ -2372,6 +4205,16 @@ match name {
     "llvm.x86.xop.vfrcz.ps.256" => "__builtin_ia32_vfrczps256",
     "llvm.x86.xop.vfrcz.sd" => "__builtin_ia32_vfrczsd",
     "llvm.x86.xop.vfrcz.ss" => "__builtin_ia32_vfrczss",
+    "llvm.x86.xop.vpcmov" => "__builtin_ia32_vpcmov",
+    "llvm.x86.xop.vpcmov.256" => "__builtin_ia32_vpcmov_256",
+    "llvm.x86.xop.vpcomb" => "__builtin_ia32_vpcomb",
+    "llvm.x86.xop.vpcomd" => "__builtin_ia32_vpcomd",
+    "llvm.x86.xop.vpcomq" => "__builtin_ia32_vpcomq",
+    "llvm.x86.xop.vpcomub" => "__builtin_ia32_vpcomub",
+    "llvm.x86.xop.vpcomud" => "__builtin_ia32_vpcomud",
+    "llvm.x86.xop.vpcomuq" => "__builtin_ia32_vpcomuq",
+    "llvm.x86.xop.vpcomuw" => "__builtin_ia32_vpcomuw",
+    "llvm.x86.xop.vpcomw" => "__builtin_ia32_vpcomw",
     "llvm.x86.xop.vpermil2pd" => "__builtin_ia32_vpermil2pd",
     "llvm.x86.xop.vpermil2pd.256" => "__builtin_ia32_vpermil2pd256",
     "llvm.x86.xop.vpermil2ps" => "__builtin_ia32_vpermil2ps",
@@ -2404,6 +4247,14 @@ match name {
     "llvm.x86.xop.vpmadcsswd" => "__builtin_ia32_vpmadcsswd",
     "llvm.x86.xop.vpmadcswd" => "__builtin_ia32_vpmadcswd",
     "llvm.x86.xop.vpperm" => "__builtin_ia32_vpperm",
+    "llvm.x86.xop.vprotb" => "__builtin_ia32_vprotb",
+    "llvm.x86.xop.vprotbi" => "__builtin_ia32_vprotbi",
+    "llvm.x86.xop.vprotd" => "__builtin_ia32_vprotd",
+    "llvm.x86.xop.vprotdi" => "__builtin_ia32_vprotdi",
+    "llvm.x86.xop.vprotq" => "__builtin_ia32_vprotq",
+    "llvm.x86.xop.vprotqi" => "__builtin_ia32_vprotqi",
+    "llvm.x86.xop.vprotw" => "__builtin_ia32_vprotw",
+    "llvm.x86.xop.vprotwi" => "__builtin_ia32_vprotwi",
     "llvm.x86.xop.vpshab" => "__builtin_ia32_vpshab",
     "llvm.x86.xop.vpshad" => "__builtin_ia32_vpshad",
     "llvm.x86.xop.vpshaq" => "__builtin_ia32_vpshaq",

From 618ba484e9e66dece784753947e2ddec202d282a Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 3 May 2022 22:38:53 +0200
Subject: [PATCH 078/997] Handle a syntax corner case where a def does not end
 with a `;`

---
 src/intrinsic/archs.rs       | 10 +++++++---
 tools/generate_intrinsics.py |  4 ++--
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 427ca77e9d0b..2782332cc57d 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -110,18 +110,18 @@ match name {
     "llvm.amdgcn.s.dcache.inv.vol" => "__builtin_amdgcn_s_dcache_inv_vol",
     "llvm.amdgcn.s.dcache.wb" => "__builtin_amdgcn_s_dcache_wb",
     "llvm.amdgcn.s.dcache.wb.vol" => "__builtin_amdgcn_s_dcache_wb_vol",
+    "llvm.amdgcn.s.decperflevel" => "__builtin_amdgcn_s_decperflevel",
     "llvm.amdgcn.s.get.waveid.in.workgroup" => "__builtin_amdgcn_s_get_waveid_in_workgroup",
     "llvm.amdgcn.s.getpc" => "__builtin_amdgcn_s_getpc",
     "llvm.amdgcn.s.getreg" => "__builtin_amdgcn_s_getreg",
+    "llvm.amdgcn.s.incperflevel" => "__builtin_amdgcn_s_incperflevel",
     "llvm.amdgcn.s.memrealtime" => "__builtin_amdgcn_s_memrealtime",
     "llvm.amdgcn.s.memtime" => "__builtin_amdgcn_s_memtime",
     "llvm.amdgcn.s.sendmsg" => "__builtin_amdgcn_s_sendmsg",
     "llvm.amdgcn.s.sendmsghalt" => "__builtin_amdgcn_s_sendmsghalt",
     "llvm.amdgcn.s.setprio" => "__builtin_amdgcn_s_setprio",
     "llvm.amdgcn.s.setreg" => "__builtin_amdgcn_s_setreg",
-    "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_decperflevel",
-    // [DUPLICATE]: "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_incperflevel",
-    // [DUPLICATE]: "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_sleep",
+    "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_sleep",
     "llvm.amdgcn.s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
     "llvm.amdgcn.sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
     "llvm.amdgcn.sad.u16" => "__builtin_amdgcn_sad_u16",
@@ -2689,6 +2689,10 @@ match name {
     "llvm.ppc.vsx.xvresp" => "__builtin_vsx_xvresp",
     "llvm.ppc.vsx.xvrsqrtedp" => "__builtin_vsx_xvrsqrtedp",
     "llvm.ppc.vsx.xvrsqrtesp" => "__builtin_vsx_xvrsqrtesp",
+    "llvm.ppc.vsx.xxblendvb" => "__builtin_vsx_xxblendvb",
+    "llvm.ppc.vsx.xxblendvd" => "__builtin_vsx_xxblendvd",
+    "llvm.ppc.vsx.xxblendvh" => "__builtin_vsx_xxblendvh",
+    "llvm.ppc.vsx.xxblendvw" => "__builtin_vsx_xxblendvw",
     "llvm.ppc.vsx.xxpermx" => "__builtin_vsx_xxpermx",
     // ptx
     "llvm.ptx.bar.sync" => "__builtin_ptx_bar_sync",
diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index 88b8b54b6baa..64f14143381c 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -60,13 +60,13 @@ def extract_instrinsics(intrinsics, file):
             current_arch = None
         elif line.startswith("def "):
             content = ""
-            while not content.endswith(";") and pos < len(lines):
+            while not content.endswith(";") and not content.endswith("}") and pos < len(lines):
                 line = lines[pos].split(" // ")[0].strip()
                 content += line
                 pos += 1
             entries = re.findall('GCCBuiltin<"(\\w+)">', content)
             if len(entries) > 0:
-                intrinsic = content.split(":")[0].split(" ")[1].strip()
+                intrinsic = content.split("def ")[1].strip().split(":")[0].strip()
                 intrinsic = intrinsic.split("_")
                 if len(intrinsic) < 2 or intrinsic[0] != "int":
                     continue

From 6e1bf49273a2011aa3fb26e641e410ca42d924af Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 3 May 2022 23:00:09 +0200
Subject: [PATCH 079/997] Give priority to intrinsics translations from llvm

---
 src/intrinsic/archs.rs       | 36 +++++++++++++++++------------------
 tools/generate_intrinsics.py | 37 ++++++++++++++++++++++++++----------
 2 files changed, 45 insertions(+), 28 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 2782332cc57d..bfeb30f2913d 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -3021,19 +3021,19 @@ match name {
     "llvm.x86.avx512.cvtss2usi64" => "__builtin_ia32_cvtss2usi64",
     "llvm.x86.avx512.cvttsd2si" => "__builtin_ia32_vcvttsd2si32",
     "llvm.x86.avx512.cvttsd2si64" => "__builtin_ia32_vcvttsd2si64",
-    "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_cvttsd2usi",
-    // [DUPLICATE]: "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_vcvttsd2usi32",
-    "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_cvttsd2usi64",
-    // [DUPLICATE]: "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_vcvttsd2usi64",
+    "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_vcvttsd2usi32",
+    // [DUPLICATE]: "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_cvttsd2usi",
+    "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_vcvttsd2usi64",
+    // [DUPLICATE]: "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_cvttsd2usi64",
     "llvm.x86.avx512.cvttss2si" => "__builtin_ia32_vcvttss2si32",
     "llvm.x86.avx512.cvttss2si64" => "__builtin_ia32_vcvttss2si64",
-    "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_cvttss2usi",
-    // [DUPLICATE]: "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_vcvttss2usi32",
-    "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_cvttss2usi64",
-    // [DUPLICATE]: "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_vcvttss2usi64",
+    "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_vcvttss2usi32",
+    // [DUPLICATE]: "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_cvttss2usi",
+    "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_vcvttss2usi64",
+    // [DUPLICATE]: "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_cvttss2usi64",
     "llvm.x86.avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd",
-    "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss",
-    // [DUPLICATE]: "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss32",
+    "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss32",
+    // [DUPLICATE]: "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss",
     "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi2sd64",
     // [DUPLICATE]: "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi642sd",
     "llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi2ss64",
@@ -3479,10 +3479,10 @@ match name {
     "llvm.x86.avx512.rcp14.ss" => "__builtin_ia32_rcp14ss_mask",
     "llvm.x86.avx512.rcp28.pd" => "__builtin_ia32_rcp28pd_mask",
     "llvm.x86.avx512.rcp28.ps" => "__builtin_ia32_rcp28ps_mask",
-    "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
-    "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
+    "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
+    // [DUPLICATE]: "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
+    "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
+    // [DUPLICATE]: "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
     "llvm.x86.avx512.rndscale.sd" => "__builtin_ia32_rndscalesd",
     "llvm.x86.avx512.rndscale.ss" => "__builtin_ia32_rndscaless",
     "llvm.x86.avx512.rsqrt14.pd.128" => "__builtin_ia32_rsqrt14pd128_mask",
@@ -3495,10 +3495,10 @@ match name {
     "llvm.x86.avx512.rsqrt14.ss" => "__builtin_ia32_rsqrt14ss_mask",
     "llvm.x86.avx512.rsqrt28.pd" => "__builtin_ia32_rsqrt28pd_mask",
     "llvm.x86.avx512.rsqrt28.ps" => "__builtin_ia32_rsqrt28ps_mask",
-    "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
-    "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
+    "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
+    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
+    "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
+    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
     "llvm.x86.avx512.scatter.dpd.512" => "__builtin_ia32_scattersiv8df",
     "llvm.x86.avx512.scatter.dpi.512" => "__builtin_ia32_scattersiv16si",
     "llvm.x86.avx512.scatter.dpq.512" => "__builtin_ia32_scattersiv8di",
diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index 64f14143381c..a1e28c3181c9 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -144,12 +144,34 @@ def extract_instrinsics_from_llvmint(llvmint, intrinsics):
         append_translation(json_data, p, intrinsics[arch])
 
 
+def fill_intrinsics(intrinsics, from_intrinsics, all_intrinsics):
+    for arch in from_intrinsics:
+        if arch not in intrinsics:
+            intrinsics[arch] = []
+        for entry in from_intrinsics[arch]:
+            if entry[0] in all_intrinsics:
+                if all_intrinsics[entry[0]] == entry[1]:
+                    # This is a "full" duplicate, both the LLVM instruction and the GCC
+                    # translation are the same.
+                    continue
+                intrinsics[arch].append((entry[0], entry[1], True))
+            else:
+                intrinsics[arch].append((entry[0], entry[1], False))
+                all_intrinsics[entry[0]] = entry[1]
+
+
 def update_intrinsics(llvm_path, llvmint):
-    intrinsics = {}
+    intrinsics_llvm = {}
+    intrinsics_llvmint = {}
     all_intrinsics = {}
 
-    extract_instrinsics_from_llvm(llvm_path, intrinsics)
-    extract_instrinsics_from_llvmint(llvmint, intrinsics)
+    extract_instrinsics_from_llvm(llvm_path, intrinsics_llvm)
+    extract_instrinsics_from_llvmint(llvmint, intrinsics_llvmint)
+
+    intrinsics = {}
+    # We give priority to translations from LLVM over the ones from llvmint.
+    fill_intrinsics(intrinsics, intrinsics_llvm, all_intrinsics)
+    fill_intrinsics(intrinsics, intrinsics_llvmint, all_intrinsics)
 
     archs = [arch for arch in intrinsics]
     archs.sort()
@@ -166,18 +188,13 @@ def update_intrinsics(llvm_path, llvmint):
         for arch in archs:
             if len(intrinsics[arch]) == 0:
                 continue
-            intrinsics[arch].sort()
+            intrinsics[arch].sort(key=lambda x: (x[0], x[2]))
             out.write('    // {}\n'.format(arch))
             for entry in intrinsics[arch]:
-                if entry[0] in all_intrinsics:
-                    if all_intrinsics[entry[0]] == entry[1]:
-                        # This is a "full" duplicate, both the LLVM instruction and the GCC
-                        # translation are the same.
-                        continue
+                if entry[2] == True: # if it is a duplicate
                     out.write('    // [DUPLICATE]: "{}" => "{}",\n'.format(entry[0], entry[1]))
                 else:
                     out.write('    "{}" => "{}",\n'.format(entry[0], entry[1]))
-                    all_intrinsics[entry[0]] = entry[1]
         out.write('    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),\n')
         out.write("}\n")
     print("Done!")

From 5088fb3d3b20fa20a72425e1d214343c9ed7251a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 24 Apr 2022 12:02:16 -0400
Subject: [PATCH 080/997] Cast arguments in SIMD function

---
 src/intrinsic/simd.rs | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index f1167bc3a3b6..e5753e318c7f 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -539,6 +539,14 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let vec_ty = bx.cx.type_vector(elem_ty, in_len as u64);
 
         let func = bx.context.get_target_builtin_function(builtin_name);
+        let param1_type = func.get_parameter(0).get_type();
+        let lhs =
+            if lhs.get_type() != param1_type {
+                bx.context.new_bitcast(None, lhs, param1_type)
+            }
+            else {
+                lhs
+            };
         let result = bx.context.new_call(None, func, &[lhs, rhs]);
         // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
         return Ok(bx.context.new_bitcast(None, result, vec_ty));

From 4636c59df5a7be4e47758588ad188bcb1f666f7c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 29 Apr 2022 23:14:26 -0400
Subject: [PATCH 081/997] Add more SIMD

---
 src/builder.rs        |  2 +-
 src/consts.rs         | 15 +-------
 src/context.rs        |  9 +++++
 src/intrinsic/llvm.rs | 19 ++++++++++
 src/intrinsic/simd.rs | 87 +++++++++++++++++++++++++++++++++++--------
 5 files changed, 102 insertions(+), 30 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 9a5cf785a1f5..f0b93c3d5170 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1343,7 +1343,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 }
                 // TODO(antoyo): switch to using new_vector_access.
                 let array = self.context.new_bitcast(None, v2, array_type);
-                for i in 0..vec_num_units {
+                for i in 0..(mask_num_units - vec_num_units) {
                     elements.push(self.context.new_array_access(None, array, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
                 }
                 let v1 = self.context.new_rvalue_from_vector(None, result_type, &elements);
diff --git a/src/consts.rs b/src/consts.rs
index 4350c00e94a7..4b517fd85f05 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -27,12 +27,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         }
         // NOTE: since bitcast makes a value non-constant, don't bitcast if not necessary as some
         // SIMD builtins require a constant value.
-        if value.get_type() != typ {
-            self.context.new_bitcast(None, value, typ)
-        }
-        else {
-            value
-        }
+        self.bitcast_if_needed(value, typ)
     }
 }
 
@@ -86,13 +81,7 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
 
         // TODO(antoyo): set alignment.
 
-        let value =
-            if value.get_type() != gcc_type {
-                self.context.new_bitcast(None, value, gcc_type)
-            }
-            else {
-                value
-            };
+        let value = self.bitcast_if_needed(value, gcc_type);
         global.global_set_initializer_rvalue(value);
 
         // As an optimization, all shared statics which do not have interior
diff --git a/src/context.rs b/src/context.rs
index 83c4683a6683..92b30ef9b4d8 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -279,6 +279,15 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     pub fn sess(&self) -> &Session {
         &self.tcx.sess
     }
+
+    pub fn bitcast_if_needed(&self, value: RValue<'gcc>, expected_type: Type<'gcc>) -> RValue<'gcc> {
+        if value.get_type() != expected_type {
+            self.context.new_bitcast(None, value, expected_type)
+        }
+        else {
+            value
+        }
+    }
 }
 
 impl<'gcc, 'tcx> BackendTypes for CodegenCx<'gcc, 'tcx> {
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 4b41b0ba6e78..aab93b927558 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -21,6 +21,25 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.xgetbv" => "__builtin_ia32_xgetbv",
         // NOTE: this doc specifies the equivalent GCC builtins: http://huonw.github.io/llvmint/llvmint/x86/index.html
         "llvm.sqrt.v2f64" => "__builtin_ia32_sqrtpd",
+
+        // The above doc points to unknown builtins for the following, so override them:
+        "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",
+        "llvm.x86.avx2.gather.d.d.256" => "__builtin_ia32_gathersiv8si",
+        "llvm.x86.avx2.gather.d.ps" => "__builtin_ia32_gathersiv4sf",
+        "llvm.x86.avx2.gather.d.ps.256" => "__builtin_ia32_gathersiv8sf",
+        "llvm.x86.avx2.gather.d.q" => "__builtin_ia32_gathersiv2di",
+        "llvm.x86.avx2.gather.d.q.256" => "__builtin_ia32_gathersiv4di",
+        "llvm.x86.avx2.gather.d.pd" => "__builtin_ia32_gathersiv2df",
+        "llvm.x86.avx2.gather.d.pd.256" => "__builtin_ia32_gathersiv4df",
+        "llvm.x86.avx2.gather.q.d" => "__builtin_ia32_gatherdiv4si",
+        "llvm.x86.avx2.gather.q.d.256" => "__builtin_ia32_gatherdiv4si256",
+        "llvm.x86.avx2.gather.q.ps" => "__builtin_ia32_gatherdiv4sf",
+        "llvm.x86.avx2.gather.q.ps.256" => "__builtin_ia32_gatherdiv4sf256",
+        "llvm.x86.avx2.gather.q.q" => "__builtin_ia32_gatherdiv2di",
+        "llvm.x86.avx2.gather.q.q.256" => "__builtin_ia32_gatherdiv4di",
+        "llvm.x86.avx2.gather.q.pd" => "__builtin_ia32_gatherdiv2df",
+        "llvm.x86.avx2.gather.q.pd.256" => "__builtin_ia32_gatherdiv4df",
+        "" => "",
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),
     };
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index e5753e318c7f..9204fbdfaba7 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -202,14 +202,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
             };
         let builtin = bx.context.get_target_builtin_function(func_name);
         let param1_type = builtin.get_param(0).to_rvalue().get_type();
-        let vector =
-            if vector.get_type() != param1_type {
-                // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
-                bx.context.new_bitcast(None, vector, param1_type)
-            }
-            else {
-                vector
-            };
+        // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
+        let vector = bx.cx.bitcast_if_needed(vector, param1_type);
         let result = bx.context.new_call(None, builtin, &[vector, value, bx.context.new_cast(None, index, bx.int_type)]);
         // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
         return Ok(bx.context.new_bitcast(None, result, vector.get_type()));
@@ -539,18 +533,79 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let vec_ty = bx.cx.type_vector(elem_ty, in_len as u64);
 
         let func = bx.context.get_target_builtin_function(builtin_name);
-        let param1_type = func.get_parameter(0).get_type();
-        let lhs =
-            if lhs.get_type() != param1_type {
-                bx.context.new_bitcast(None, lhs, param1_type)
-            }
-            else {
-                lhs
-            };
+        let param1_type = func.get_param(0).to_rvalue().get_type();
+        let param2_type = func.get_param(1).to_rvalue().get_type();
+        let lhs = bx.cx.bitcast_if_needed(lhs, param1_type);
+        let rhs = bx.cx.bitcast_if_needed(rhs, param2_type);
         let result = bx.context.new_call(None, func, &[lhs, rhs]);
         // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
         return Ok(bx.context.new_bitcast(None, result, vec_ty));
     }
 
+    macro_rules! arith_red {
+        ($name:ident : $integer_reduce:ident, $float_reduce:ident, $ordered:expr, $op:ident,
+         $identity:expr) => {
+            if name == sym::$name {
+                require!(
+                    ret_ty == in_elem,
+                    "expected return type `{}` (element of input `{}`), found `{}`",
+                    in_elem,
+                    in_ty,
+                    ret_ty
+                );
+                return match in_elem.kind() {
+                    ty::Int(_) | ty::Uint(_) => {
+                        let r = bx.$integer_reduce(args[0].immediate());
+                        if $ordered {
+                            // if overflow occurs, the result is the
+                            // mathematical result modulo 2^n:
+                            Ok(bx.$op(args[1].immediate(), r))
+                        } else {
+                            Ok(bx.$integer_reduce(args[0].immediate()))
+                        }
+                    }
+                    ty::Float(f) => {
+                        let acc = if $ordered {
+                            // ordered arithmetic reductions take an accumulator
+                            args[1].immediate()
+                        } else {
+                            // unordered arithmetic reductions use the identity accumulator
+                            match f.bit_width() {
+                                32 => bx.const_real(bx.type_f32(), $identity),
+                                64 => bx.const_real(bx.type_f64(), $identity),
+                                v => return_error!(
+                                    r#"
+unsupported {} from `{}` with element `{}` of size `{}` to `{}`"#,
+                                    sym::$name,
+                                    in_ty,
+                                    in_elem,
+                                    v,
+                                    ret_ty
+                                ),
+                            }
+                        };
+                        Ok(bx.$float_reduce(acc, args[0].immediate()))
+                    }
+                    _ => return_error!(
+                        "unsupported {} from `{}` with element `{}` to `{}`",
+                        sym::$name,
+                        in_ty,
+                        in_elem,
+                        ret_ty
+                    ),
+                };
+            }
+        };
+    }
+
+    // TODO: use a recursive algorithm a-la Hacker's Delight.
+    arith_red!(
+        simd_reduce_add_unordered: vector_reduce_add,
+        vector_reduce_fadd_fast,
+        false,
+        add,
+        0.0
+    );
+
     unimplemented!("simd {}", name);
 }

From ddc152b04d202123270d7cbfb3f821a392297685 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 30 Apr 2022 20:52:00 -0400
Subject: [PATCH 082/997] Add more SIMD

---
 src/asm.rs            |   2 +-
 src/builder.rs        |  80 +++++++++++++++++++++++
 src/common.rs         |   4 +-
 src/intrinsic/simd.rs | 145 ++++++++++++++++++++++++++++++++++--------
 src/type_.rs          |   4 ++
 5 files changed, 204 insertions(+), 31 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 1cae78114c9d..738c990fa827 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -595,7 +595,7 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
             InlineAsmRegClass::X86(X86InlineAsmRegClass::xmm_reg)
             | InlineAsmRegClass::X86(X86InlineAsmRegClass::ymm_reg) => "x",
             InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => "v",
-            InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => unimplemented!(),
+            InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => "Yk",
             InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => unimplemented!(),
             InlineAsmRegClass::X86(
                 X86InlineAsmRegClass::x87_reg | X86InlineAsmRegClass::mmx_reg,
diff --git a/src/builder.rs b/src/builder.rs
index f0b93c3d5170..160a7df03158 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -7,6 +7,7 @@ use gccjit::{
     BinaryOp,
     Block,
     ComparisonOp,
+    Context,
     Function,
     LValue,
     RValue,
@@ -1380,6 +1381,85 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     pub fn shuffle_vector(&mut self, _v1: RValue<'gcc>, _v2: RValue<'gcc>, _mask: RValue<'gcc>) -> RValue<'gcc> {
         unimplemented!();
     }
+
+    pub fn vector_reduce<F>(&mut self, src: RValue<'gcc>, op: F) -> RValue<'gcc>
+    where F: Fn(RValue<'gcc>, RValue<'gcc>, &'gcc Context<'gcc>) -> RValue<'gcc>
+    {
+        let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
+        let element_count = vector_type.get_num_units();
+        let mut vector_elements = vec![];
+        for i in 0..element_count {
+            vector_elements.push(i);
+        }
+        let mask_type = self.context.new_vector_type(self.int_type, element_count as u64);
+        let mut shift = 1;
+        let mut res = src;
+        while shift < element_count {
+            let vector_elements: Vec<_> =
+                vector_elements.iter()
+                    .map(|i| self.context.new_rvalue_from_int(self.int_type, ((i + shift) % element_count) as i32))
+                    .collect();
+            let mask = self.context.new_rvalue_from_vector(None, mask_type, &vector_elements);
+            let shifted = self.context.new_rvalue_vector_perm(None, res, res, mask);
+            shift *= 2;
+            res = op(res, shifted, &self.context);
+        }
+        self.context.new_vector_access(None, res, self.context.new_rvalue_zero(self.int_type))
+            .to_rvalue()
+    }
+
+    pub fn vector_reduce_op(&mut self, src: RValue<'gcc>, op: BinaryOp) -> RValue<'gcc> {
+        self.vector_reduce(src, |a, b, context| context.new_binary_op(None, op, a.get_type(), a, b))
+    }
+
+    pub fn vector_reduce_fadd_fast(&mut self, acc: RValue<'gcc>, src: RValue<'gcc>) -> RValue<'gcc> {
+        unimplemented!();
+    }
+
+    pub fn vector_reduce_fmul_fast(&mut self, acc: RValue<'gcc>, src: RValue<'gcc>) -> RValue<'gcc> {
+        unimplemented!();
+    }
+
+    // Inspired by Hacker's Delight min implementation.
+    pub fn vector_reduce_min(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
+        self.vector_reduce(src, |a, b, context| {
+            let differences_or_zeros = difference_or_zero(a, b, context);
+            context.new_binary_op(None, BinaryOp::Minus, a.get_type(), a, differences_or_zeros)
+        })
+    }
+
+    // Inspired by Hacker's Delight max implementation.
+    pub fn vector_reduce_max(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
+        self.vector_reduce(src, |a, b, context| {
+            let differences_or_zeros = difference_or_zero(a, b, context);
+            context.new_binary_op(None, BinaryOp::Plus, b.get_type(), b, differences_or_zeros)
+        })
+    }
+
+    pub fn vector_select(&mut self, cond: RValue<'gcc>, then_val: RValue<'gcc>, else_val: RValue<'gcc>) -> RValue<'gcc> {
+        // cond is a vector of integers, not of bools.
+        let vector_type = cond.get_type().dyncast_vector().expect("vector type");
+        let num_units = vector_type.get_num_units();
+        let vector_type = self.context.new_vector_type(self.int_type, num_units as u64);
+        let zeros = vec![self.context.new_rvalue_zero(self.int_type); num_units];
+        let zeros = self.context.new_rvalue_from_vector(None, vector_type, &zeros);
+
+        let masks = self.context.new_comparison(None, ComparisonOp::NotEquals, cond, zeros);
+        let then_vals = masks & then_val;
+
+        let ones = vec![self.context.new_rvalue_one(self.int_type); num_units];
+        let ones = self.context.new_rvalue_from_vector(None, vector_type, &ones);
+        let inverted_masks = masks + ones;
+        let else_vals = inverted_masks & else_val;
+
+        then_vals | else_vals
+    }
+}
+
+fn difference_or_zero<'gcc>(a: RValue<'gcc>, b: RValue<'gcc>, context: &'gcc Context<'gcc>) -> RValue<'gcc> {
+    let difference = a - b;
+    let masks = context.new_comparison(None, ComparisonOp::GreaterThanEquals, b, a);
+    difference & masks
 }
 
 impl<'a, 'gcc, 'tcx> StaticBuilderMethods for Builder<'a, 'gcc, 'tcx> {
diff --git a/src/common.rs b/src/common.rs
index 703e20947fe8..e4a08da446bb 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -117,8 +117,8 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         unimplemented!();
     }
 
-    fn const_real(&self, _t: Type<'gcc>, _val: f64) -> RValue<'gcc> {
-        unimplemented!();
+    fn const_real(&self, typ: Type<'gcc>, val: f64) -> RValue<'gcc> {
+        self.context.new_rvalue_from_double(typ, val)
     }
 
     fn const_str(&self, s: Symbol) -> (RValue<'gcc>, RValue<'gcc>) {
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 9204fbdfaba7..dccfb89409de 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -1,6 +1,6 @@
 use std::cmp::Ordering;
 
-use gccjit::{RValue, Type, ToRValue};
+use gccjit::{BinaryOp, RValue, Type, ToRValue};
 use rustc_codegen_ssa::base::compare_simd_types;
 use rustc_codegen_ssa::common::{TypeKind, span_invalid_monomorphization_error};
 use rustc_codegen_ssa::mir::operand::OperandRef;
@@ -222,6 +222,24 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         return Ok(bx.context.new_vector_access(None, vector, args[1].immediate()).to_rvalue());
     }
 
+    if name == sym::simd_select {
+        let m_elem_ty = in_elem;
+        let m_len = in_len;
+        require_simd!(arg_tys[1], "argument");
+        let (v_len, _) = arg_tys[1].simd_size_and_type(bx.tcx());
+        require!(
+            m_len == v_len,
+            "mismatched lengths: mask length `{}` != other vector length `{}`",
+            m_len,
+            v_len
+        );
+        match m_elem_ty.kind() {
+            ty::Int(_) => {}
+            _ => return_error!("mask element type is `{}`, expected `i_`", m_elem_ty),
+        }
+        return Ok(bx.vector_select(args[0].immediate(), args[1].immediate(), args[2].immediate()));
+    }
+
     if name == sym::simd_cast {
         require_simd!(ret_ty, "return");
         let (out_len, out_elem) = ret_ty.simd_size_and_type(bx.tcx());
@@ -543,7 +561,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
     }
 
     macro_rules! arith_red {
-        ($name:ident : $integer_reduce:ident, $float_reduce:ident, $ordered:expr, $op:ident,
+        ($name:ident : $vec_op:expr, $float_reduce:ident, $ordered:expr, $op:ident,
          $identity:expr) => {
             if name == sym::$name {
                 require!(
@@ -555,36 +573,25 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                 );
                 return match in_elem.kind() {
                     ty::Int(_) | ty::Uint(_) => {
-                        let r = bx.$integer_reduce(args[0].immediate());
+                        let r = bx.vector_reduce_op(args[0].immediate(), $vec_op);
                         if $ordered {
                             // if overflow occurs, the result is the
                             // mathematical result modulo 2^n:
                             Ok(bx.$op(args[1].immediate(), r))
-                        } else {
-                            Ok(bx.$integer_reduce(args[0].immediate()))
+                        }
+                        else {
+                            Ok(bx.vector_reduce_op(args[0].immediate(), $vec_op))
                         }
                     }
-                    ty::Float(f) => {
-                        let acc = if $ordered {
+                    ty::Float(_) => {
+                        if $ordered {
                             // ordered arithmetic reductions take an accumulator
-                            args[1].immediate()
-                        } else {
-                            // unordered arithmetic reductions use the identity accumulator
-                            match f.bit_width() {
-                                32 => bx.const_real(bx.type_f32(), $identity),
-                                64 => bx.const_real(bx.type_f64(), $identity),
-                                v => return_error!(
-                                    r#"
-unsupported {} from `{}` with element `{}` of size `{}` to `{}`"#,
-                                    sym::$name,
-                                    in_ty,
-                                    in_elem,
-                                    v,
-                                    ret_ty
-                                ),
-                            }
-                        };
-                        Ok(bx.$float_reduce(acc, args[0].immediate()))
+                            let acc = args[1].immediate();
+                            Ok(bx.$float_reduce(acc, args[0].immediate()))
+                        }
+                        else {
+                            Ok(bx.vector_reduce_op(args[0].immediate(), $vec_op))
+                        }
                     }
                     _ => return_error!(
                         "unsupported {} from `{}` with element `{}` to `{}`",
@@ -598,14 +605,96 @@ unsupported {} from `{}` with element `{}` of size `{}` to `{}`"#,
         };
     }
 
-    // TODO: use a recursive algorithm a-la Hacker's Delight.
     arith_red!(
-        simd_reduce_add_unordered: vector_reduce_add,
+        simd_reduce_add_unordered: BinaryOp::Plus,
         vector_reduce_fadd_fast,
         false,
         add,
-        0.0
+        0.0 // TODO: Use this argument.
     );
+    arith_red!(
+        simd_reduce_mul_unordered: BinaryOp::Mult,
+        vector_reduce_fmul_fast,
+        false,
+        mul,
+        1.0
+    );
+
+    macro_rules! minmax_red {
+        ($name:ident: $reduction:ident) => {
+            if name == sym::$name {
+                require!(
+                    ret_ty == in_elem,
+                    "expected return type `{}` (element of input `{}`), found `{}`",
+                    in_elem,
+                    in_ty,
+                    ret_ty
+                );
+                return match in_elem.kind() {
+                    ty::Int(_) | ty::Uint(_) | ty::Float(_) => Ok(bx.$reduction(args[0].immediate())),
+                    _ => return_error!(
+                        "unsupported {} from `{}` with element `{}` to `{}`",
+                        sym::$name,
+                        in_ty,
+                        in_elem,
+                        ret_ty
+                    ),
+                };
+            }
+        };
+    }
+
+    minmax_red!(simd_reduce_min: vector_reduce_min);
+    minmax_red!(simd_reduce_max: vector_reduce_max);
+
+    macro_rules! bitwise_red {
+        ($name:ident : $op:expr, $boolean:expr) => {
+            if name == sym::$name {
+                let input = if !$boolean {
+                    require!(
+                        ret_ty == in_elem,
+                        "expected return type `{}` (element of input `{}`), found `{}`",
+                        in_elem,
+                        in_ty,
+                        ret_ty
+                    );
+                    args[0].immediate()
+                } else {
+                    match in_elem.kind() {
+                        ty::Int(_) | ty::Uint(_) => {}
+                        _ => return_error!(
+                            "unsupported {} from `{}` with element `{}` to `{}`",
+                            sym::$name,
+                            in_ty,
+                            in_elem,
+                            ret_ty
+                        ),
+                    }
+
+                    // boolean reductions operate on vectors of i1s:
+                    let i1 = bx.type_i1();
+                    let i1xn = bx.type_vector(i1, in_len as u64);
+                    bx.trunc(args[0].immediate(), i1xn)
+                };
+                return match in_elem.kind() {
+                    ty::Int(_) | ty::Uint(_) => {
+                        let r = bx.vector_reduce_op(input, $op);
+                        Ok(if !$boolean { r } else { bx.zext(r, bx.type_bool()) })
+                    }
+                    _ => return_error!(
+                        "unsupported {} from `{}` with element `{}` to `{}`",
+                        sym::$name,
+                        in_ty,
+                        in_elem,
+                        ret_ty
+                    ),
+                };
+            }
+        };
+    }
+
+    bitwise_red!(simd_reduce_and: BinaryOp::BitwiseAnd, false);
+    bitwise_red!(simd_reduce_or: BinaryOp::BitwiseOr, false);
 
     unimplemented!("simd {}", name);
 }
diff --git a/src/type_.rs b/src/type_.rs
index db2b5ea8ab20..002b95db36de 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -247,6 +247,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
         self.context.new_array_type(None, ty, len)
     }
+
+    pub fn type_bool(&self) -> Type<'gcc> {
+        self.context.new_type::<bool>()
+    }
 }
 
 pub fn struct_fields<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout<'tcx>) -> (Vec<Type<'gcc>>, bool) {

From a65418666f89629f1ec9acdf1e29b29e35344574 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 1 May 2022 12:39:47 -0400
Subject: [PATCH 083/997] Implement simd_select_bitmask

---
 src/builder.rs        | 13 ++++++-----
 src/intrinsic/simd.rs | 52 +++++++++++++++++++++++++++++++++++++++++--
 2 files changed, 57 insertions(+), 8 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 160a7df03158..71738b52eff4 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1438,17 +1438,18 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
     pub fn vector_select(&mut self, cond: RValue<'gcc>, then_val: RValue<'gcc>, else_val: RValue<'gcc>) -> RValue<'gcc> {
         // cond is a vector of integers, not of bools.
-        let vector_type = cond.get_type().dyncast_vector().expect("vector type");
+        let cond_type = cond.get_type();
+        let vector_type = cond_type.unqualified().dyncast_vector().expect("vector type");
         let num_units = vector_type.get_num_units();
-        let vector_type = self.context.new_vector_type(self.int_type, num_units as u64);
-        let zeros = vec![self.context.new_rvalue_zero(self.int_type); num_units];
-        let zeros = self.context.new_rvalue_from_vector(None, vector_type, &zeros);
+        let element_type = vector_type.get_element_type();
+        let zeros = vec![self.context.new_rvalue_zero(element_type); num_units];
+        let zeros = self.context.new_rvalue_from_vector(None, cond_type, &zeros);
 
         let masks = self.context.new_comparison(None, ComparisonOp::NotEquals, cond, zeros);
         let then_vals = masks & then_val;
 
-        let ones = vec![self.context.new_rvalue_one(self.int_type); num_units];
-        let ones = self.context.new_rvalue_from_vector(None, vector_type, &ones);
+        let ones = vec![self.context.new_rvalue_one(element_type); num_units];
+        let ones = self.context.new_rvalue_from_vector(None, cond_type, &ones);
         let inverted_masks = masks + ones;
         let else_vals = inverted_masks & else_val;
 
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index dccfb89409de..6e14f6d021e1 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -4,12 +4,14 @@ use gccjit::{BinaryOp, RValue, Type, ToRValue};
 use rustc_codegen_ssa::base::compare_simd_types;
 use rustc_codegen_ssa::common::{TypeKind, span_invalid_monomorphization_error};
 use rustc_codegen_ssa::mir::operand::OperandRef;
+use rustc_codegen_ssa::mir::place::PlaceRef;
 use rustc_codegen_ssa::traits::{BaseTypeMethods, BuilderMethods};
 use rustc_hir as hir;
 use rustc_middle::span_bug;
 use rustc_middle::ty::layout::HasTyCtxt;
 use rustc_middle::ty::{self, Ty};
 use rustc_span::{Span, Symbol, sym};
+use rustc_target::abi::Align;
 
 use crate::builder::Builder;
 use crate::intrinsic;
@@ -55,7 +57,53 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
     let sig =
         tcx.normalize_erasing_late_bound_regions(ty::ParamEnv::reveal_all(), callee_ty.fn_sig(tcx));
     let arg_tys = sig.inputs();
-    let name_str = name.as_str();
+
+    if name == sym::simd_select_bitmask {
+        require_simd!(arg_tys[1], "argument");
+        let (len, _) = arg_tys[1].simd_size_and_type(bx.tcx());
+
+        let expected_int_bits = (len.max(8) - 1).next_power_of_two();
+        let expected_bytes = len / 8 + ((len % 8 > 0) as u64);
+
+        let mask_ty = arg_tys[0];
+        let mut mask = match mask_ty.kind() {
+            ty::Int(i) if i.bit_width() == Some(expected_int_bits) => args[0].immediate(),
+            ty::Uint(i) if i.bit_width() == Some(expected_int_bits) => args[0].immediate(),
+            ty::Array(elem, len)
+                if matches!(elem.kind(), ty::Uint(ty::UintTy::U8))
+                    && len.try_eval_usize(bx.tcx, ty::ParamEnv::reveal_all())
+                        == Some(expected_bytes) =>
+            {
+                let place = PlaceRef::alloca(bx, args[0].layout);
+                args[0].val.store(bx, place);
+                let int_ty = bx.type_ix(expected_bytes * 8);
+                let ptr = bx.pointercast(place.llval, bx.cx.type_ptr_to(int_ty));
+                bx.load(int_ty, ptr, Align::ONE)
+            }
+            _ => return_error!(
+                "invalid bitmask `{}`, expected `u{}` or `[u8; {}]`",
+                mask_ty,
+                expected_int_bits,
+                expected_bytes
+            ),
+        };
+
+        let arg1 = args[1].immediate();
+        let arg1_type = arg1.get_type();
+        let arg1_vector_type = arg1_type.unqualified().dyncast_vector().expect("vector type");
+        let arg1_element_type = arg1_vector_type.get_element_type();
+
+        let mut elements = vec![];
+        let one = bx.context.new_rvalue_one(mask.get_type());
+        for _ in 0..len {
+            let element = bx.context.new_cast(None, mask & one, arg1_element_type);
+            elements.push(element);
+            mask = mask >> one;
+        }
+        let vector_mask = bx.context.new_rvalue_from_vector(None, arg1_type, &elements);
+
+        return Ok(bx.vector_select(vector_mask, arg1, args[2].immediate()));
+    }
 
     // every intrinsic below takes a SIMD vector as its first argument
     require_simd!(arg_tys[0], "input");
@@ -102,7 +150,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         ));
     }
 
-    if let Some(stripped) = name_str.strip_prefix("simd_shuffle") {
+    if let Some(stripped) = name.as_str().strip_prefix("simd_shuffle") {
         let n: u64 =
             if stripped.is_empty() {
                 // Make sure this is actually an array, since typeck only checks the length-suffixed

From ace3250da87542526952ce3177f6950410133d1e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 1 May 2022 12:52:59 -0400
Subject: [PATCH 084/997] Fix shuffle_vector

---
 src/builder.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/builder.rs b/src/builder.rs
index 71738b52eff4..a53115c578b2 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1317,7 +1317,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 element_type
             }
             else {
-                self.int_type
+                self.cx.type_ix(element_type.get_size() as u64 * 8)
             };
         for i in 0..mask_num_units {
             let field = struct_type.get_field(i as i32);

From 6bfe2b0b05837ae671d9206b81539f998965b017 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 2 May 2022 21:50:22 -0400
Subject: [PATCH 085/997] Support more SIMD intrinsics

---
 src/builder.rs         | 104 ++++++++++++++++++++++++++++++++++++++++-
 src/context.rs         |  14 +++++-
 src/declare.rs         |   5 +-
 src/intrinsic/archs.rs |   5 +-
 src/intrinsic/llvm.rs  |  18 +++++++
 5 files changed, 141 insertions(+), 5 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index a53115c578b2..82b0e64e582a 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -217,11 +217,27 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             return Cow::Borrowed(args);
         }
 
+        let func_name = format!("{:?}", func_ptr);
+
         let casted_args: Vec<_> = param_types
             .into_iter()
             .zip(args.iter())
             .enumerate()
             .map(|(index, (expected_ty, &actual_val))| {
+                // NOTE: these intrinsics have missing parameters before the last one, so ignore the
+                // last argument type check.
+                // FIXME(antoyo): find a way to refactor in order to avoid this hack.
+                match &*func_name {
+                    "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
+                    | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask" | "__builtin_ia32_sqrtps512_mask"
+                    | "__builtin_ia32_sqrtpd512_mask" => {
+                        if index == args.len() - 1 {
+                            return actual_val;
+                        }
+                    },
+                    _ => (),
+                }
+
                 let actual_ty = actual_val.get_type();
                 if expected_ty != actual_ty {
                     if !actual_ty.is_vector() && !expected_ty.is_vector() && actual_ty.is_integral() && expected_ty.is_integral() && actual_ty.get_size() != expected_ty.get_size() {
@@ -286,7 +302,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     fn function_ptr_call(&mut self, func_ptr: RValue<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
-        let args = self.check_ptr_call("call", func_ptr, args);
+        let mut args = self.check_ptr_call("call", func_ptr, args);
 
         // gccjit requires to use the result of functions, even when it's not used.
         // That's why we assign the result to a local or call add_eval().
@@ -298,6 +314,92 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
             let result = current_func.new_local(None, return_type, &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
+            // Some LLVM intrinsics do not map 1-to-1 to GCC intrinsics, so we add the missing
+            // arguments here.
+            if gcc_func.get_param_count() != args.len() {
+                let func_name = format!("{:?}", func_ptr);
+                match &*func_name {
+                    "__builtin_ia32_pmuldq512_mask" | "__builtin_ia32_pmuludq512_mask"
+                    // FIXME(antoyo): the following intrinsics has 4 (or 5) arguments according to the doc, but is defined with 2 (or 3) arguments in library/stdarch/crates/core_arch/src/x86/avx512f.rs.
+                    | "__builtin_ia32_pmaxsd512_mask" | "__builtin_ia32_pmaxsq512_mask" | "__builtin_ia32_pmaxsq256_mask"
+                    | "__builtin_ia32_pmaxsq128_mask" | "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
+                    | "__builtin_ia32_pmaxud512_mask" | "__builtin_ia32_pmaxuq512_mask" | "__builtin_ia32_pmaxuq256_mask"
+                    | "__builtin_ia32_pmaxuq128_mask"
+                    | "__builtin_ia32_pminsd512_mask" | "__builtin_ia32_pminsq512_mask" | "__builtin_ia32_pminsq256_mask"
+                    | "__builtin_ia32_pminsq128_mask" | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask"
+                    | "__builtin_ia32_pminud512_mask" | "__builtin_ia32_pminuq512_mask" | "__builtin_ia32_pminuq256_mask"
+                    | "__builtin_ia32_pminuq128_mask" | "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask"
+                    => {
+                        // TODO: refactor by separating those intrinsics outside of this branch.
+                        let add_before_last_arg =
+                            match &*func_name {
+                                "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
+                                | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask"
+                                | "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => true,
+                                _ => false,
+                            };
+                        let new_first_arg_is_zero =
+                            match &*func_name {
+                                "__builtin_ia32_pmaxuq256_mask" | "__builtin_ia32_pmaxuq128_mask"
+                                | "__builtin_ia32_pminuq256_mask" | "__builtin_ia32_pminuq128_mask" => true,
+                                _ => false
+                            };
+                        let arg3_index =
+                            match &*func_name {
+                                "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => 1,
+                                _ => 2,
+                            };
+                        let mut new_args = args.to_vec();
+                        let arg3_type = gcc_func.get_param_type(arg3_index);
+                        let first_arg =
+                            if new_first_arg_is_zero {
+                                let vector_type = arg3_type.dyncast_vector().expect("vector type");
+                                let zero = self.context.new_rvalue_zero(vector_type.get_element_type());
+                                let num_units = vector_type.get_num_units();
+                                self.context.new_rvalue_from_vector(None, arg3_type, &vec![zero; num_units])
+                            }
+                            else {
+                                self.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue()
+                            };
+                        if add_before_last_arg {
+                            new_args.insert(new_args.len() - 1, first_arg);
+                        }
+                        else {
+                            new_args.push(first_arg);
+                        }
+                        let arg4_index =
+                            match &*func_name {
+                                "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => 2,
+                                _ => 3,
+                            };
+                        let arg4_type = gcc_func.get_param_type(arg4_index);
+                        let minus_one = self.context.new_rvalue_from_int(arg4_type, -1);
+                        if add_before_last_arg {
+                            new_args.insert(new_args.len() - 1, minus_one);
+                        }
+                        else {
+                            new_args.push(minus_one);
+                        }
+                        args = new_args.into();
+                    },
+                    "__builtin_ia32_vfmaddps512_mask" | "__builtin_ia32_vfmaddpd512_mask" => {
+                        let mut new_args = args.to_vec();
+                        if args.len() == 3 {
+                            // Both llvm.fma.v16f32 and llvm.x86.avx512.vfmaddsub.ps.512 maps to
+                            // the same GCC intrinsic, but the former has 3 parameters and the
+                            // latter has 4 so it doesn't require this additional argument.
+                            let arg4_type = gcc_func.get_param_type(3);
+                            let minus_one = self.context.new_rvalue_from_int(arg4_type, -1);
+                            new_args.push(minus_one);
+                        }
+
+                        let arg5_type = gcc_func.get_param_type(4);
+                        new_args.push(self.context.new_rvalue_from_int(arg5_type, 4));
+                        args = new_args.into();
+                    },
+                    _ => (),
+                }
+            }
             self.block.add_assignment(None, result, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
             result.to_rvalue()
         }
diff --git a/src/context.rs b/src/context.rs
index 92b30ef9b4d8..4bc8c5a6760e 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -35,6 +35,7 @@ pub struct CodegenCx<'gcc, 'tcx> {
     pub normal_function_addresses: RefCell<FxHashSet<RValue<'gcc>>>,
 
     pub functions: RefCell<FxHashMap<String, Function<'gcc>>>,
+    pub intrinsics: RefCell<FxHashMap<String, Function<'gcc>>>,
 
     pub tls_model: gccjit::TlsModel,
 
@@ -184,6 +185,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             current_func: RefCell::new(None),
             normal_function_addresses: Default::default(),
             functions: RefCell::new(functions),
+            intrinsics: RefCell::new(FxHashMap::default()),
 
             tls_model,
 
@@ -315,8 +317,16 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn get_fn_addr(&self, instance: Instance<'tcx>) -> RValue<'gcc> {
-        let func = get_fn(self, instance);
-        let func = self.rvalue_as_function(func);
+        let func_name = self.tcx.symbol_name(instance).name;
+
+        let func =
+            if self.intrinsics.borrow().contains_key(func_name) {
+                self.intrinsics.borrow()[func_name].clone()
+            }
+            else {
+                let func = get_fn(self, instance);
+                self.rvalue_as_function(func)
+            };
         let ptr = func.get_address(None);
 
         // TODO(antoyo): don't do this twice: i.e. in declare_fn and here.
diff --git a/src/declare.rs b/src/declare.rs
index 43017376916d..8b2146c5aa84 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -11,6 +11,7 @@ use crate::intrinsic::llvm;
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     pub fn get_or_insert_global(&self, name: &str, ty: Type<'gcc>, is_tls: bool, link_section: Option<Symbol>) -> LValue<'gcc> {
         if self.globals.borrow().contains_key(name) {
+            // TODO: use [] instead of .get().expect()?
             let typ = self.globals.borrow().get(name).expect("global").get_type();
             let global = self.context.new_global(None, GlobalKind::Imported, typ, name);
             if is_tls {
@@ -103,7 +104,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 /// update the declaration and return existing Value instead.
 fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*llvm::CallConv*/, return_type: Type<'gcc>, param_types: &[Type<'gcc>], variadic: bool) -> Function<'gcc> {
     if name.starts_with("llvm.") {
-        return llvm::intrinsic(name, cx);
+        let intrinsic = llvm::intrinsic(name, cx);
+        cx.intrinsics.borrow_mut().insert(name.to_string(), intrinsic);
+        return intrinsic;
     }
     let func =
         if cx.functions.borrow().contains_key(name) {
diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index bfeb30f2913d..fbcfc8be8591 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -4275,5 +4275,8 @@ match name {
     "llvm.xcore.getid" => "__builtin_getid",
     "llvm.xcore.getps" => "__builtin_getps",
     "llvm.xcore.setps" => "__builtin_setps",
-    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+    _ => {
+        println!("***** unsupported LLVM intrinsic {}", name);
+        ""
+    },
 }
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index aab93b927558..16f0df8a2075 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -21,6 +21,24 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.xgetbv" => "__builtin_ia32_xgetbv",
         // NOTE: this doc specifies the equivalent GCC builtins: http://huonw.github.io/llvmint/llvmint/x86/index.html
         "llvm.sqrt.v2f64" => "__builtin_ia32_sqrtpd",
+        "llvm.x86.avx512.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask",
+        "llvm.x86.avx512.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask",
+        "llvm.x86.avx512.mask.pmaxs.q.256" => "__builtin_ia32_pmaxsq256_mask",
+        "llvm.x86.avx512.mask.pmaxs.q.128" => "__builtin_ia32_pmaxsq128_mask",
+        "llvm.x86.avx512.max.ps.512" => "__builtin_ia32_maxps512_mask",
+        "llvm.x86.avx512.max.pd.512" => "__builtin_ia32_maxpd512_mask",
+        "llvm.x86.avx512.mask.pmaxu.q.256" => "__builtin_ia32_pmaxuq256_mask",
+        "llvm.x86.avx512.mask.pmaxu.q.128" => "__builtin_ia32_pmaxuq128_mask",
+        "llvm.x86.avx512.mask.pmins.q.256" => "__builtin_ia32_pminsq256_mask",
+        "llvm.x86.avx512.mask.pmins.q.128" => "__builtin_ia32_pminsq128_mask",
+        "llvm.x86.avx512.min.ps.512" => "__builtin_ia32_minps512_mask",
+        "llvm.x86.avx512.min.pd.512" => "__builtin_ia32_minpd512_mask",
+        "llvm.x86.avx512.mask.pminu.q.256" => "__builtin_ia32_pminuq256_mask",
+        "llvm.x86.avx512.mask.pminu.q.128" => "__builtin_ia32_pminuq128_mask",
+        "llvm.fma.v16f32" => "__builtin_ia32_vfmaddps512_mask",
+        "llvm.fma.v8f64" => "__builtin_ia32_vfmaddpd512_mask",
+        "llvm.x86.avx512.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddps512_mask",
+        "llvm.x86.avx512.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",

From eba654c57ae2fe29ae963b128e5bf57ac2d08a6c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 3 May 2022 17:47:38 -0400
Subject: [PATCH 086/997] Support more SIMD intrinsics

---
 src/intrinsic/llvm.rs | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 16f0df8a2075..5c8367360838 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -39,6 +39,27 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.fma.v8f64" => "__builtin_ia32_vfmaddpd512_mask",
         "llvm.x86.avx512.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddps512_mask",
         "llvm.x86.avx512.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
+        "llvm.x86.avx512.rcp14.ps.256" => "__builtin_ia32_rcp14ps256_mask",
+        "llvm.x86.avx512.rcp14.ps.128" => "__builtin_ia32_rcp14ps128_mask",
+        "llvm.x86.avx512.rcp14.pd.256" => "__builtin_ia32_rcp14pd256_mask",
+        "llvm.x86.avx512.rcp14.pd.128" => "__builtin_ia32_rcp14pd128_mask",
+        "llvm.x86.avx512.rsqrt14.ps.256" => "__builtin_ia32_rsqrt14ps256_mask",
+        "llvm.x86.avx512.rsqrt14.ps.128" => "__builtin_ia32_rsqrt14ps128_mask",
+        "llvm.x86.avx512.rsqrt14.pd.256" => "__builtin_ia32_rsqrt14pd256_mask",
+        "llvm.x86.avx512.rsqrt14.pd.128" => "__builtin_ia32_rsqrt14pd128_mask",
+        "llvm.x86.avx512.mask.getexp.ps.512" => "__builtin_ia32_getexpps512_mask",
+        "llvm.x86.avx512.mask.getexp.ps.256" => "__builtin_ia32_getexpps256_mask",
+        "llvm.x86.avx512.mask.getexp.ps.128" => "__builtin_ia32_getexpps128_mask",
+        "llvm.x86.avx512.mask.getexp.pd.512" => "__builtin_ia32_getexppd512_mask",
+        "llvm.x86.avx512.mask.getexp.pd.256" => "__builtin_ia32_getexppd256_mask",
+        "llvm.x86.avx512.mask.getexp.pd.128" => "__builtin_ia32_getexppd128_mask",
+        "llvm.x86.avx512.mask.rndscale.ps.256" => "__builtin_ia32_rndscaleps_256_mask",
+        "llvm.x86.avx512.mask.rndscale.ps.128" => "__builtin_ia32_rndscaleps_128_mask",
+        "llvm.x86.avx512.mask.rndscale.pd.256" => "__builtin_ia32_rndscalepd_256_mask",
+        "llvm.x86.avx512.mask.rndscale.pd.128" => "__builtin_ia32_rndscalepd_128_mask",
+        "llvm.x86.avx512.mask.scalef.ps.512" => "__builtin_ia32_scalefps512_mask",
+        "llvm.x86.avx512.mask.scalef.ps.256" => "__builtin_ia32_scalefps256_mask",
+        "llvm.x86.avx512.mask.scalef.ps.128" => "__builtin_ia32_scalefps128_mask",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",

From 4b40ac790da69d99028324540fa84404096f04ab Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 3 May 2022 22:35:26 -0400
Subject: [PATCH 087/997] Support more SIMD intrinsics and refactor argument
 adjustment

---
 src/builder.rs        | 113 +++--------------------
 src/intrinsic/llvm.rs | 207 +++++++++++++++++++++++++++++++++++++-----
 2 files changed, 194 insertions(+), 126 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 82b0e64e582a..df5c29f625eb 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -48,6 +48,7 @@ use rustc_target::spec::{HasTargetSpec, Target};
 
 use crate::common::{SignType, TypeReflection, type_is_pointer};
 use crate::context::CodegenCx;
+use crate::intrinsic::llvm;
 use crate::type_of::LayoutGccExt;
 
 // TODO(antoyo)
@@ -224,18 +225,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             .zip(args.iter())
             .enumerate()
             .map(|(index, (expected_ty, &actual_val))| {
-                // NOTE: these intrinsics have missing parameters before the last one, so ignore the
-                // last argument type check.
-                // FIXME(antoyo): find a way to refactor in order to avoid this hack.
-                match &*func_name {
-                    "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
-                    | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask" | "__builtin_ia32_sqrtps512_mask"
-                    | "__builtin_ia32_sqrtpd512_mask" => {
-                        if index == args.len() - 1 {
-                            return actual_val;
-                        }
-                    },
-                    _ => (),
+                if llvm::ignore_arg_cast(&func_name, index, args.len()) {
+                    return actual_val;
                 }
 
                 let actual_ty = actual_val.get_type();
@@ -302,7 +293,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     fn function_ptr_call(&mut self, func_ptr: RValue<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
-        let mut args = self.check_ptr_call("call", func_ptr, args);
+        let args = self.check_ptr_call("call", func_ptr, args);
 
         // gccjit requires to use the result of functions, even when it's not used.
         // That's why we assign the result to a local or call add_eval().
@@ -314,92 +305,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
             let result = current_func.new_local(None, return_type, &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
-            // Some LLVM intrinsics do not map 1-to-1 to GCC intrinsics, so we add the missing
-            // arguments here.
-            if gcc_func.get_param_count() != args.len() {
-                let func_name = format!("{:?}", func_ptr);
-                match &*func_name {
-                    "__builtin_ia32_pmuldq512_mask" | "__builtin_ia32_pmuludq512_mask"
-                    // FIXME(antoyo): the following intrinsics has 4 (or 5) arguments according to the doc, but is defined with 2 (or 3) arguments in library/stdarch/crates/core_arch/src/x86/avx512f.rs.
-                    | "__builtin_ia32_pmaxsd512_mask" | "__builtin_ia32_pmaxsq512_mask" | "__builtin_ia32_pmaxsq256_mask"
-                    | "__builtin_ia32_pmaxsq128_mask" | "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
-                    | "__builtin_ia32_pmaxud512_mask" | "__builtin_ia32_pmaxuq512_mask" | "__builtin_ia32_pmaxuq256_mask"
-                    | "__builtin_ia32_pmaxuq128_mask"
-                    | "__builtin_ia32_pminsd512_mask" | "__builtin_ia32_pminsq512_mask" | "__builtin_ia32_pminsq256_mask"
-                    | "__builtin_ia32_pminsq128_mask" | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask"
-                    | "__builtin_ia32_pminud512_mask" | "__builtin_ia32_pminuq512_mask" | "__builtin_ia32_pminuq256_mask"
-                    | "__builtin_ia32_pminuq128_mask" | "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask"
-                    => {
-                        // TODO: refactor by separating those intrinsics outside of this branch.
-                        let add_before_last_arg =
-                            match &*func_name {
-                                "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
-                                | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask"
-                                | "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => true,
-                                _ => false,
-                            };
-                        let new_first_arg_is_zero =
-                            match &*func_name {
-                                "__builtin_ia32_pmaxuq256_mask" | "__builtin_ia32_pmaxuq128_mask"
-                                | "__builtin_ia32_pminuq256_mask" | "__builtin_ia32_pminuq128_mask" => true,
-                                _ => false
-                            };
-                        let arg3_index =
-                            match &*func_name {
-                                "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => 1,
-                                _ => 2,
-                            };
-                        let mut new_args = args.to_vec();
-                        let arg3_type = gcc_func.get_param_type(arg3_index);
-                        let first_arg =
-                            if new_first_arg_is_zero {
-                                let vector_type = arg3_type.dyncast_vector().expect("vector type");
-                                let zero = self.context.new_rvalue_zero(vector_type.get_element_type());
-                                let num_units = vector_type.get_num_units();
-                                self.context.new_rvalue_from_vector(None, arg3_type, &vec![zero; num_units])
-                            }
-                            else {
-                                self.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue()
-                            };
-                        if add_before_last_arg {
-                            new_args.insert(new_args.len() - 1, first_arg);
-                        }
-                        else {
-                            new_args.push(first_arg);
-                        }
-                        let arg4_index =
-                            match &*func_name {
-                                "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => 2,
-                                _ => 3,
-                            };
-                        let arg4_type = gcc_func.get_param_type(arg4_index);
-                        let minus_one = self.context.new_rvalue_from_int(arg4_type, -1);
-                        if add_before_last_arg {
-                            new_args.insert(new_args.len() - 1, minus_one);
-                        }
-                        else {
-                            new_args.push(minus_one);
-                        }
-                        args = new_args.into();
-                    },
-                    "__builtin_ia32_vfmaddps512_mask" | "__builtin_ia32_vfmaddpd512_mask" => {
-                        let mut new_args = args.to_vec();
-                        if args.len() == 3 {
-                            // Both llvm.fma.v16f32 and llvm.x86.avx512.vfmaddsub.ps.512 maps to
-                            // the same GCC intrinsic, but the former has 3 parameters and the
-                            // latter has 4 so it doesn't require this additional argument.
-                            let arg4_type = gcc_func.get_param_type(3);
-                            let minus_one = self.context.new_rvalue_from_int(arg4_type, -1);
-                            new_args.push(minus_one);
-                        }
-
-                        let arg5_type = gcc_func.get_param_type(4);
-                        new_args.push(self.context.new_rvalue_from_int(arg5_type, 4));
-                        args = new_args.into();
-                    },
-                    _ => (),
-                }
-            }
+            let func_name = format!("{:?}", func_ptr);
+            let args = llvm::adjust_intrinsic_arguments(&self, gcc_func, args, &func_name);
             self.block.add_assignment(None, result, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
             result.to_rvalue()
         }
@@ -1514,11 +1421,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         self.vector_reduce(src, |a, b, context| context.new_binary_op(None, op, a.get_type(), a, b))
     }
 
-    pub fn vector_reduce_fadd_fast(&mut self, acc: RValue<'gcc>, src: RValue<'gcc>) -> RValue<'gcc> {
+    pub fn vector_reduce_fadd_fast(&mut self, _acc: RValue<'gcc>, _src: RValue<'gcc>) -> RValue<'gcc> {
         unimplemented!();
     }
 
-    pub fn vector_reduce_fmul_fast(&mut self, acc: RValue<'gcc>, src: RValue<'gcc>) -> RValue<'gcc> {
+    pub fn vector_reduce_fmul_fast(&mut self, _acc: RValue<'gcc>, _src: RValue<'gcc>) -> RValue<'gcc> {
         unimplemented!();
     }
 
@@ -1553,6 +1460,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let ones = vec![self.context.new_rvalue_one(element_type); num_units];
         let ones = self.context.new_rvalue_from_vector(None, cond_type, &ones);
         let inverted_masks = masks + ones;
+        // NOTE: sometimes, the type of else_val can be different than the type of then_val in
+        // libgccjit (vector of int vs vector of int32_t), but they should be the same for the AND
+        // operation to work.
+        let else_val = self.context.new_bitcast(None, else_val, then_val.get_type());
         let else_vals = inverted_masks & else_val;
 
         then_vals | else_vals
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 5c8367360838..1175ea005472 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1,6 +1,169 @@
-use gccjit::Function;
+use std::borrow::Cow;
 
-use crate::context::CodegenCx;
+use gccjit::{Function, FunctionPtrType, RValue, ToRValue};
+
+use crate::{context::CodegenCx, builder::Builder};
+
+pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc, 'tcx>, gcc_func: FunctionPtrType<'gcc>, mut args: Cow<'b, [RValue<'gcc>]>, func_name: &str) -> Cow<'b, [RValue<'gcc>]> {
+    // Some LLVM intrinsics do not map 1-to-1 to GCC intrinsics, so we add the missing
+    // arguments here.
+    if gcc_func.get_param_count() != args.len() {
+        match &*func_name {
+            "__builtin_ia32_pmuldq512_mask" | "__builtin_ia32_pmuludq512_mask"
+                // FIXME(antoyo): the following intrinsics has 4 (or 5) arguments according to the doc, but is defined with 2 (or 3) arguments in library/stdarch/crates/core_arch/src/x86/avx512f.rs.
+                | "__builtin_ia32_pmaxsd512_mask" | "__builtin_ia32_pmaxsq512_mask" | "__builtin_ia32_pmaxsq256_mask"
+                | "__builtin_ia32_pmaxsq128_mask" | "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
+                | "__builtin_ia32_pmaxud512_mask" | "__builtin_ia32_pmaxuq512_mask" | "__builtin_ia32_pmaxuq256_mask"
+                | "__builtin_ia32_pmaxuq128_mask"
+                | "__builtin_ia32_pminsd512_mask" | "__builtin_ia32_pminsq512_mask" | "__builtin_ia32_pminsq256_mask"
+                | "__builtin_ia32_pminsq128_mask" | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask"
+                | "__builtin_ia32_pminud512_mask" | "__builtin_ia32_pminuq512_mask" | "__builtin_ia32_pminuq256_mask"
+                | "__builtin_ia32_pminuq128_mask" | "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask"
+                => {
+                    // TODO: refactor by separating those intrinsics outside of this branch.
+                    let add_before_last_arg =
+                        match &*func_name {
+                            "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
+                                | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask"
+                                | "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => true,
+                            _ => false,
+                        };
+                    let new_first_arg_is_zero =
+                        match &*func_name {
+                            "__builtin_ia32_pmaxuq256_mask" | "__builtin_ia32_pmaxuq128_mask"
+                                | "__builtin_ia32_pminuq256_mask" | "__builtin_ia32_pminuq128_mask" => true,
+                            _ => false
+                        };
+                    let arg3_index =
+                        match &*func_name {
+                            "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => 1,
+                            _ => 2,
+                        };
+                    let mut new_args = args.to_vec();
+                    let arg3_type = gcc_func.get_param_type(arg3_index);
+                    let first_arg =
+                        if new_first_arg_is_zero {
+                            let vector_type = arg3_type.dyncast_vector().expect("vector type");
+                            let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
+                            let num_units = vector_type.get_num_units();
+                            builder.context.new_rvalue_from_vector(None, arg3_type, &vec![zero; num_units])
+                        }
+                        else {
+                            builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue()
+                        };
+                    if add_before_last_arg {
+                        new_args.insert(new_args.len() - 1, first_arg);
+                    }
+                    else {
+                        new_args.push(first_arg);
+                    }
+                    let arg4_index =
+                        match &*func_name {
+                            "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => 2,
+                            _ => 3,
+                        };
+                    let arg4_type = gcc_func.get_param_type(arg4_index);
+                    let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                    if add_before_last_arg {
+                        new_args.insert(new_args.len() - 1, minus_one);
+                    }
+                    else {
+                        new_args.push(minus_one);
+                    }
+                    args = new_args.into();
+                },
+                "__builtin_ia32_pternlogd512_mask" | "__builtin_ia32_pternlogd256_mask"
+                    | "__builtin_ia32_pternlogd128_mask" | "__builtin_ia32_pternlogq512_mask"
+                    | "__builtin_ia32_pternlogq256_mask" | "__builtin_ia32_pternlogq128_mask" => {
+                        let mut new_args = args.to_vec();
+                        let arg5_type = gcc_func.get_param_type(4);
+                        let minus_one = builder.context.new_rvalue_from_int(arg5_type, -1);
+                        new_args.push(minus_one);
+                        args = new_args.into();
+                    },
+                    "__builtin_ia32_vfmaddps512_mask" | "__builtin_ia32_vfmaddpd512_mask" => {
+                        let mut new_args = args.to_vec();
+
+                        let mut last_arg = None;
+                        if args.len() == 4 {
+                            last_arg = new_args.pop();
+                        }
+
+                        let arg4_type = gcc_func.get_param_type(3);
+                        let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                        new_args.push(minus_one);
+
+                        if args.len() == 3 {
+                            // Both llvm.fma.v16f32 and llvm.x86.avx512.vfmadd.ps.512 maps to
+                            // the same GCC intrinsic, but the former has 3 parameters and the
+                            // latter has 4 so it doesn't require this additional argument.
+                            let arg5_type = gcc_func.get_param_type(4);
+                            new_args.push(builder.context.new_rvalue_from_int(arg5_type, 4));
+                        }
+
+                        if let Some(last_arg) = last_arg {
+                            new_args.push(last_arg);
+                        }
+
+                        args = new_args.into();
+                    },
+                    "__builtin_ia32_subps512_mask" | "__builtin_ia32_subpd512_mask"
+                        | "__builtin_ia32_mulps512_mask" | "__builtin_ia32_mulpd512_mask"
+                        | "__builtin_ia32_divps512_mask" | "__builtin_ia32_divpd512_mask"
+                        | "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
+                        let mut new_args = args.to_vec();
+                        let last_arg = new_args.pop().expect("last arg");
+                        let arg4_type = gcc_func.get_param_type(3);
+                        let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                        new_args.push(minus_one);
+                        new_args.push(last_arg);
+                        args = new_args.into();
+                    },
+                    "__builtin_ia32_addps512_mask" | "__builtin_ia32_addpd512_mask" => {
+                        let mut new_args = args.to_vec();
+                        let last_arg = new_args.pop().expect("last arg");
+                        let arg3_type = gcc_func.get_param_type(2);
+                        let undefined = builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue();
+                        new_args.push(undefined);
+                        let arg4_type = gcc_func.get_param_type(3);
+                        let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                        new_args.push(minus_one);
+                        new_args.push(last_arg);
+                        args = new_args.into();
+                    },
+                    _ => (),
+        }
+    }
+
+    args
+}
+
+pub fn ignore_arg_cast(func_name: &str, index: usize, args_len: usize) -> bool {
+    // NOTE: these intrinsics have missing parameters before the last one, so ignore the
+    // last argument type check.
+    // FIXME(antoyo): find a way to refactor in order to avoid this hack.
+    match func_name {
+        "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
+            | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask" | "__builtin_ia32_sqrtps512_mask"
+            | "__builtin_ia32_sqrtpd512_mask" | "__builtin_ia32_addps512_mask" | "__builtin_ia32_addpd512_mask"
+            | "__builtin_ia32_subps512_mask" | "__builtin_ia32_subpd512_mask"
+            | "__builtin_ia32_mulps512_mask" | "__builtin_ia32_mulpd512_mask"
+            | "__builtin_ia32_divps512_mask" | "__builtin_ia32_divpd512_mask"
+            | "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
+                if index == args_len - 1 {
+                    return true;
+                }
+            },
+        "__builtin_ia32_vfmaddps512_mask" => {
+            if args_len == 4 && index == args_len - 1 {
+                return true;
+            }
+        },
+        _ => (),
+    }
+
+    false
+}
 
 #[cfg(not(feature="master"))]
 pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
@@ -37,29 +200,23 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.mask.pminu.q.128" => "__builtin_ia32_pminuq128_mask",
         "llvm.fma.v16f32" => "__builtin_ia32_vfmaddps512_mask",
         "llvm.fma.v8f64" => "__builtin_ia32_vfmaddpd512_mask",
-        "llvm.x86.avx512.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddps512_mask",
-        "llvm.x86.avx512.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
-        "llvm.x86.avx512.rcp14.ps.256" => "__builtin_ia32_rcp14ps256_mask",
-        "llvm.x86.avx512.rcp14.ps.128" => "__builtin_ia32_rcp14ps128_mask",
-        "llvm.x86.avx512.rcp14.pd.256" => "__builtin_ia32_rcp14pd256_mask",
-        "llvm.x86.avx512.rcp14.pd.128" => "__builtin_ia32_rcp14pd128_mask",
-        "llvm.x86.avx512.rsqrt14.ps.256" => "__builtin_ia32_rsqrt14ps256_mask",
-        "llvm.x86.avx512.rsqrt14.ps.128" => "__builtin_ia32_rsqrt14ps128_mask",
-        "llvm.x86.avx512.rsqrt14.pd.256" => "__builtin_ia32_rsqrt14pd256_mask",
-        "llvm.x86.avx512.rsqrt14.pd.128" => "__builtin_ia32_rsqrt14pd128_mask",
-        "llvm.x86.avx512.mask.getexp.ps.512" => "__builtin_ia32_getexpps512_mask",
-        "llvm.x86.avx512.mask.getexp.ps.256" => "__builtin_ia32_getexpps256_mask",
-        "llvm.x86.avx512.mask.getexp.ps.128" => "__builtin_ia32_getexpps128_mask",
-        "llvm.x86.avx512.mask.getexp.pd.512" => "__builtin_ia32_getexppd512_mask",
-        "llvm.x86.avx512.mask.getexp.pd.256" => "__builtin_ia32_getexppd256_mask",
-        "llvm.x86.avx512.mask.getexp.pd.128" => "__builtin_ia32_getexppd128_mask",
-        "llvm.x86.avx512.mask.rndscale.ps.256" => "__builtin_ia32_rndscaleps_256_mask",
-        "llvm.x86.avx512.mask.rndscale.ps.128" => "__builtin_ia32_rndscaleps_128_mask",
-        "llvm.x86.avx512.mask.rndscale.pd.256" => "__builtin_ia32_rndscalepd_256_mask",
-        "llvm.x86.avx512.mask.rndscale.pd.128" => "__builtin_ia32_rndscalepd_128_mask",
-        "llvm.x86.avx512.mask.scalef.ps.512" => "__builtin_ia32_scalefps512_mask",
-        "llvm.x86.avx512.mask.scalef.ps.256" => "__builtin_ia32_scalefps256_mask",
-        "llvm.x86.avx512.mask.scalef.ps.128" => "__builtin_ia32_scalefps128_mask",
+        "llvm.x86.avx512.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
+        "llvm.x86.avx512.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
+        "llvm.x86.avx512.pternlog.d.512" => "__builtin_ia32_pternlogd512_mask",
+        "llvm.x86.avx512.pternlog.d.256" => "__builtin_ia32_pternlogd256_mask",
+        "llvm.x86.avx512.pternlog.d.128" => "__builtin_ia32_pternlogd128_mask",
+        "llvm.x86.avx512.pternlog.q.512" => "__builtin_ia32_pternlogq512_mask",
+        "llvm.x86.avx512.pternlog.q.256" => "__builtin_ia32_pternlogq256_mask",
+        "llvm.x86.avx512.pternlog.q.128" => "__builtin_ia32_pternlogq128_mask",
+        "llvm.x86.avx512.add.ps.512" => "__builtin_ia32_addps512_mask",
+        "llvm.x86.avx512.add.pd.512" => "__builtin_ia32_addpd512_mask",
+        "llvm.x86.avx512.sub.ps.512" => "__builtin_ia32_subps512_mask",
+        "llvm.x86.avx512.sub.pd.512" => "__builtin_ia32_subpd512_mask",
+        "llvm.x86.avx512.mul.ps.512" => "__builtin_ia32_mulps512_mask",
+        "llvm.x86.avx512.mul.pd.512" => "__builtin_ia32_mulpd512_mask",
+        "llvm.x86.avx512.div.ps.512" => "__builtin_ia32_divps512_mask",
+        "llvm.x86.avx512.div.pd.512" => "__builtin_ia32_divpd512_mask",
+        "llvm.x86.avx512.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",

From 41807a30943b2459c8a8e2accfbbead8959490d4 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 3 May 2022 22:46:40 -0400
Subject: [PATCH 088/997] Support more SIMD intrinsics

---
 src/intrinsic/llvm.rs | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 1175ea005472..1b089f08f764 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -107,24 +107,24 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
 
                         args = new_args.into();
                     },
-                    "__builtin_ia32_subps512_mask" | "__builtin_ia32_subpd512_mask"
+                    "__builtin_ia32_addps512_mask" | "__builtin_ia32_addpd512_mask"
+                        | "__builtin_ia32_subps512_mask" | "__builtin_ia32_subpd512_mask"
                         | "__builtin_ia32_mulps512_mask" | "__builtin_ia32_mulpd512_mask"
-                        | "__builtin_ia32_divps512_mask" | "__builtin_ia32_divpd512_mask"
-                        | "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
+                        | "__builtin_ia32_divps512_mask" | "__builtin_ia32_divpd512_mask" => {
                         let mut new_args = args.to_vec();
                         let last_arg = new_args.pop().expect("last arg");
+                        let arg3_type = gcc_func.get_param_type(2);
+                        let undefined = builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue();
+                        new_args.push(undefined);
                         let arg4_type = gcc_func.get_param_type(3);
                         let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
                         new_args.push(minus_one);
                         new_args.push(last_arg);
                         args = new_args.into();
                     },
-                    "__builtin_ia32_addps512_mask" | "__builtin_ia32_addpd512_mask" => {
+                    "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
                         let mut new_args = args.to_vec();
                         let last_arg = new_args.pop().expect("last arg");
-                        let arg3_type = gcc_func.get_param_type(2);
-                        let undefined = builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue();
-                        new_args.push(undefined);
                         let arg4_type = gcc_func.get_param_type(3);
                         let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
                         new_args.push(minus_one);
@@ -154,7 +154,10 @@ pub fn ignore_arg_cast(func_name: &str, index: usize, args_len: usize) -> bool {
                     return true;
                 }
             },
-        "__builtin_ia32_vfmaddps512_mask" => {
+        "__builtin_ia32_vfmaddps512_mask" | "__builtin_ia32_vfmaddpd512_mask" => {
+            // Since there are two LLVM intrinsics that map to each of these GCC builtins and only
+            // one of them has a missing parameter before the last one, we check the number of
+            // arguments to distinguish those cases.
             if args_len == 4 && index == args_len - 1 {
                 return true;
             }
@@ -217,6 +220,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.div.ps.512" => "__builtin_ia32_divps512_mask",
         "llvm.x86.avx512.div.pd.512" => "__builtin_ia32_divpd512_mask",
         "llvm.x86.avx512.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
+        "llvm.x86.avx512.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",

From d4ab681ebd3b22a071a02aad4005805dd13a41f2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 4 May 2022 21:17:58 -0400
Subject: [PATCH 089/997] Add comments

---
 src/intrinsic/simd.rs | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 6e14f6d021e1..6c2834fccf30 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -220,6 +220,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         // NOTE: we cannot cast to an array and assign to its element here because the value might
         // not be an l-value. So, call a builtin to set the element.
         // TODO(antoyo): perhaps we could create a new vector or maybe there's a GIMPLE instruction for that?
+        // TODO(antoyo): don't use target specific builtins here.
         let func_name =
             match in_len {
                 2 => {
@@ -396,6 +397,10 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                 });
             }
             (Style::Int(_), Style::Float) => {
+                // TODO: add support for internal functions in libgccjit to get access to IFN_VEC_CONVERT which is
+                // doing like __builtin_convertvector?
+                // Or maybe provide convert_vector as an API since it might not easy to get the
+                // types of internal functions.
                 unimplemented!();
             }
             (Style::Float, Style::Int(_)) => {

From 603d342e00719fdba6691d6bed65e66ae817d46e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 4 May 2022 21:26:25 -0400
Subject: [PATCH 090/997] Feature-gate for libgccjit 12

---
 src/builder.rs | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/builder.rs b/src/builder.rs
index df5c29f625eb..d4fd6a6877fe 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1391,6 +1391,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         unimplemented!();
     }
 
+    #[cfg(feature="master")]
     pub fn vector_reduce<F>(&mut self, src: RValue<'gcc>, op: F) -> RValue<'gcc>
     where F: Fn(RValue<'gcc>, RValue<'gcc>, &'gcc Context<'gcc>) -> RValue<'gcc>
     {
@@ -1417,6 +1418,13 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             .to_rvalue()
     }
 
+    #[cfg(not(feature="master"))]
+    pub fn vector_reduce<F>(&mut self, src: RValue<'gcc>, op: F) -> RValue<'gcc>
+    where F: Fn(RValue<'gcc>, RValue<'gcc>, &'gcc Context<'gcc>) -> RValue<'gcc>
+    {
+        unimplemented!();
+    }
+
     pub fn vector_reduce_op(&mut self, src: RValue<'gcc>, op: BinaryOp) -> RValue<'gcc> {
         self.vector_reduce(src, |a, b, context| context.new_binary_op(None, op, a.get_type(), a, b))
     }

From e7df0a4b549e5d3b4aec0cc79c4262c5a2dfef13 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 4 May 2022 21:53:22 -0400
Subject: [PATCH 091/997] Simplify get() after contains()

---
 src/declare.rs | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/src/declare.rs b/src/declare.rs
index 8b2146c5aa84..a619e2f77125 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -11,8 +11,7 @@ use crate::intrinsic::llvm;
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     pub fn get_or_insert_global(&self, name: &str, ty: Type<'gcc>, is_tls: bool, link_section: Option<Symbol>) -> LValue<'gcc> {
         if self.globals.borrow().contains_key(name) {
-            // TODO: use [] instead of .get().expect()?
-            let typ = self.globals.borrow().get(name).expect("global").get_type();
+            let typ = self.globals.borrow()[name].get_type();
             let global = self.context.new_global(None, GlobalKind::Imported, typ, name);
             if is_tls {
                 global.set_tls_model(self.tls_model);
@@ -110,7 +109,7 @@ fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*ll
     }
     let func =
         if cx.functions.borrow().contains_key(name) {
-            *cx.functions.borrow().get(name).expect("function")
+            cx.functions.borrow()[name]
         }
         else {
             let params: Vec<_> = param_types.into_iter().enumerate()

From 4a9744059f8617756c4ee981e033ad8b6f6e05d3 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 4 May 2022 22:20:38 -0400
Subject: [PATCH 092/997] Feature gate call to get_size() for libgccjit 12

---
 src/builder.rs         | 7 ++++++-
 src/intrinsic/archs.rs | 5 +----
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index d4fd6a6877fe..8fa78c7e189b 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1326,7 +1326,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 element_type
             }
             else {
-                self.cx.type_ix(element_type.get_size() as u64 * 8)
+                #[cfg(feature="master")]
+                {
+                    self.cx.type_ix(element_type.get_size() as u64 * 8)
+                }
+                #[cfg(not(feature="master"))]
+                self.int_type
             };
         for i in 0..mask_num_units {
             let field = struct_type.get_field(i as i32);
diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index fbcfc8be8591..bfeb30f2913d 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -4275,8 +4275,5 @@ match name {
     "llvm.xcore.getid" => "__builtin_getid",
     "llvm.xcore.getps" => "__builtin_getps",
     "llvm.xcore.setps" => "__builtin_setps",
-    _ => {
-        println!("***** unsupported LLVM intrinsic {}", name);
-        ""
-    },
+    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
 }

From be960e1747cbebdf8272a79f2e6a7b6891acb0a6 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 15 May 2022 14:07:19 +0200
Subject: [PATCH 093/997] Update llvmint

---
 src/intrinsic/archs.rs | 1443 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 1443 insertions(+)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index bfeb30f2913d..fb6c38fa0726 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -126,6 +126,7 @@ match name {
     "llvm.amdgcn.sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
     "llvm.amdgcn.sad.u16" => "__builtin_amdgcn_sad_u16",
     "llvm.amdgcn.sad.u8" => "__builtin_amdgcn_sad_u8",
+    "llvm.amdgcn.sched.barrier" => "__builtin_amdgcn_sched_barrier",
     "llvm.amdgcn.sdot2" => "__builtin_amdgcn_sdot2",
     "llvm.amdgcn.sdot4" => "__builtin_amdgcn_sdot4",
     "llvm.amdgcn.sdot8" => "__builtin_amdgcn_sdot8",
@@ -891,6 +892,8 @@ match name {
     "llvm.hexagon.M5.vrmacbuu" => "__builtin_HEXAGON_M5_vrmacbuu",
     "llvm.hexagon.M5.vrmpybsu" => "__builtin_HEXAGON_M5_vrmpybsu",
     "llvm.hexagon.M5.vrmpybuu" => "__builtin_HEXAGON_M5_vrmpybuu",
+    "llvm.hexagon.M6.vabsdiffb" => "__builtin_HEXAGON_M6_vabsdiffb",
+    "llvm.hexagon.M6.vabsdiffub" => "__builtin_HEXAGON_M6_vabsdiffub",
     "llvm.hexagon.S2.addasl.rrri" => "__builtin_HEXAGON_S2_addasl_rrri",
     "llvm.hexagon.S2.asl.i.p" => "__builtin_HEXAGON_S2_asl_i_p",
     "llvm.hexagon.S2.asl.i.p.acc" => "__builtin_HEXAGON_S2_asl_i_p_acc",
@@ -955,6 +958,7 @@ match name {
     "llvm.hexagon.S2.asr.r.vw" => "__builtin_HEXAGON_S2_asr_r_vw",
     "llvm.hexagon.S2.brev" => "__builtin_HEXAGON_S2_brev",
     "llvm.hexagon.S2.brevp" => "__builtin_HEXAGON_S2_brevp",
+    "llvm.hexagon.S2.cabacencbin" => "__builtin_HEXAGON_S2_cabacencbin",
     "llvm.hexagon.S2.cl0" => "__builtin_HEXAGON_S2_cl0",
     "llvm.hexagon.S2.cl0p" => "__builtin_HEXAGON_S2_cl0p",
     "llvm.hexagon.S2.cl1" => "__builtin_HEXAGON_S2_cl1",
@@ -1100,8 +1104,528 @@ match name {
     "llvm.hexagon.S5.asrhub.sat" => "__builtin_HEXAGON_S5_asrhub_sat",
     "llvm.hexagon.S5.popcountp" => "__builtin_HEXAGON_S5_popcountp",
     "llvm.hexagon.S5.vasrhrnd.goodsyntax" => "__builtin_HEXAGON_S5_vasrhrnd_goodsyntax",
+    "llvm.hexagon.S6.rol.i.p" => "__builtin_HEXAGON_S6_rol_i_p",
+    "llvm.hexagon.S6.rol.i.p.acc" => "__builtin_HEXAGON_S6_rol_i_p_acc",
+    "llvm.hexagon.S6.rol.i.p.and" => "__builtin_HEXAGON_S6_rol_i_p_and",
+    "llvm.hexagon.S6.rol.i.p.nac" => "__builtin_HEXAGON_S6_rol_i_p_nac",
+    "llvm.hexagon.S6.rol.i.p.or" => "__builtin_HEXAGON_S6_rol_i_p_or",
+    "llvm.hexagon.S6.rol.i.p.xacc" => "__builtin_HEXAGON_S6_rol_i_p_xacc",
+    "llvm.hexagon.S6.rol.i.r" => "__builtin_HEXAGON_S6_rol_i_r",
+    "llvm.hexagon.S6.rol.i.r.acc" => "__builtin_HEXAGON_S6_rol_i_r_acc",
+    "llvm.hexagon.S6.rol.i.r.and" => "__builtin_HEXAGON_S6_rol_i_r_and",
+    "llvm.hexagon.S6.rol.i.r.nac" => "__builtin_HEXAGON_S6_rol_i_r_nac",
+    "llvm.hexagon.S6.rol.i.r.or" => "__builtin_HEXAGON_S6_rol_i_r_or",
+    "llvm.hexagon.S6.rol.i.r.xacc" => "__builtin_HEXAGON_S6_rol_i_r_xacc",
+    "llvm.hexagon.S6.vsplatrbp" => "__builtin_HEXAGON_S6_vsplatrbp",
+    "llvm.hexagon.S6.vtrunehb.ppp" => "__builtin_HEXAGON_S6_vtrunehb_ppp",
+    "llvm.hexagon.S6.vtrunohb.ppp" => "__builtin_HEXAGON_S6_vtrunohb_ppp",
     "llvm.hexagon.SI.to.SXTHI.asrh" => "__builtin_SI_to_SXTHI_asrh",
+    "llvm.hexagon.V6.extractw" => "__builtin_HEXAGON_V6_extractw",
+    "llvm.hexagon.V6.extractw.128B" => "__builtin_HEXAGON_V6_extractw_128B",
+    "llvm.hexagon.V6.hi" => "__builtin_HEXAGON_V6_hi",
+    "llvm.hexagon.V6.hi.128B" => "__builtin_HEXAGON_V6_hi_128B",
+    "llvm.hexagon.V6.lo" => "__builtin_HEXAGON_V6_lo",
+    "llvm.hexagon.V6.lo.128B" => "__builtin_HEXAGON_V6_lo_128B",
+    "llvm.hexagon.V6.lvsplatw" => "__builtin_HEXAGON_V6_lvsplatw",
+    "llvm.hexagon.V6.lvsplatw.128B" => "__builtin_HEXAGON_V6_lvsplatw_128B",
+    "llvm.hexagon.V6.vabsdiffh" => "__builtin_HEXAGON_V6_vabsdiffh",
+    "llvm.hexagon.V6.vabsdiffh.128B" => "__builtin_HEXAGON_V6_vabsdiffh_128B",
+    "llvm.hexagon.V6.vabsdiffub" => "__builtin_HEXAGON_V6_vabsdiffub",
+    "llvm.hexagon.V6.vabsdiffub.128B" => "__builtin_HEXAGON_V6_vabsdiffub_128B",
+    "llvm.hexagon.V6.vabsdiffuh" => "__builtin_HEXAGON_V6_vabsdiffuh",
+    "llvm.hexagon.V6.vabsdiffuh.128B" => "__builtin_HEXAGON_V6_vabsdiffuh_128B",
+    "llvm.hexagon.V6.vabsdiffw" => "__builtin_HEXAGON_V6_vabsdiffw",
+    "llvm.hexagon.V6.vabsdiffw.128B" => "__builtin_HEXAGON_V6_vabsdiffw_128B",
+    "llvm.hexagon.V6.vabsh" => "__builtin_HEXAGON_V6_vabsh",
+    "llvm.hexagon.V6.vabsh.128B" => "__builtin_HEXAGON_V6_vabsh_128B",
+    "llvm.hexagon.V6.vabsh.sat" => "__builtin_HEXAGON_V6_vabsh_sat",
+    "llvm.hexagon.V6.vabsh.sat.128B" => "__builtin_HEXAGON_V6_vabsh_sat_128B",
+    "llvm.hexagon.V6.vabsw" => "__builtin_HEXAGON_V6_vabsw",
+    "llvm.hexagon.V6.vabsw.128B" => "__builtin_HEXAGON_V6_vabsw_128B",
+    "llvm.hexagon.V6.vabsw.sat" => "__builtin_HEXAGON_V6_vabsw_sat",
+    "llvm.hexagon.V6.vabsw.sat.128B" => "__builtin_HEXAGON_V6_vabsw_sat_128B",
+    "llvm.hexagon.V6.vaddb" => "__builtin_HEXAGON_V6_vaddb",
+    "llvm.hexagon.V6.vaddb.128B" => "__builtin_HEXAGON_V6_vaddb_128B",
+    "llvm.hexagon.V6.vaddb.dv" => "__builtin_HEXAGON_V6_vaddb_dv",
+    "llvm.hexagon.V6.vaddb.dv.128B" => "__builtin_HEXAGON_V6_vaddb_dv_128B",
+    "llvm.hexagon.V6.vaddh" => "__builtin_HEXAGON_V6_vaddh",
+    "llvm.hexagon.V6.vaddh.128B" => "__builtin_HEXAGON_V6_vaddh_128B",
+    "llvm.hexagon.V6.vaddh.dv" => "__builtin_HEXAGON_V6_vaddh_dv",
+    "llvm.hexagon.V6.vaddh.dv.128B" => "__builtin_HEXAGON_V6_vaddh_dv_128B",
+    "llvm.hexagon.V6.vaddhsat" => "__builtin_HEXAGON_V6_vaddhsat",
+    "llvm.hexagon.V6.vaddhsat.128B" => "__builtin_HEXAGON_V6_vaddhsat_128B",
+    "llvm.hexagon.V6.vaddhsat.dv" => "__builtin_HEXAGON_V6_vaddhsat_dv",
+    "llvm.hexagon.V6.vaddhsat.dv.128B" => "__builtin_HEXAGON_V6_vaddhsat_dv_128B",
+    "llvm.hexagon.V6.vaddhw" => "__builtin_HEXAGON_V6_vaddhw",
+    "llvm.hexagon.V6.vaddhw.128B" => "__builtin_HEXAGON_V6_vaddhw_128B",
+    "llvm.hexagon.V6.vaddubh" => "__builtin_HEXAGON_V6_vaddubh",
+    "llvm.hexagon.V6.vaddubh.128B" => "__builtin_HEXAGON_V6_vaddubh_128B",
+    "llvm.hexagon.V6.vaddubsat" => "__builtin_HEXAGON_V6_vaddubsat",
+    "llvm.hexagon.V6.vaddubsat.128B" => "__builtin_HEXAGON_V6_vaddubsat_128B",
+    "llvm.hexagon.V6.vaddubsat.dv" => "__builtin_HEXAGON_V6_vaddubsat_dv",
+    "llvm.hexagon.V6.vaddubsat.dv.128B" => "__builtin_HEXAGON_V6_vaddubsat_dv_128B",
+    "llvm.hexagon.V6.vadduhsat" => "__builtin_HEXAGON_V6_vadduhsat",
+    "llvm.hexagon.V6.vadduhsat.128B" => "__builtin_HEXAGON_V6_vadduhsat_128B",
+    "llvm.hexagon.V6.vadduhsat.dv" => "__builtin_HEXAGON_V6_vadduhsat_dv",
+    "llvm.hexagon.V6.vadduhsat.dv.128B" => "__builtin_HEXAGON_V6_vadduhsat_dv_128B",
+    "llvm.hexagon.V6.vadduhw" => "__builtin_HEXAGON_V6_vadduhw",
+    "llvm.hexagon.V6.vadduhw.128B" => "__builtin_HEXAGON_V6_vadduhw_128B",
+    "llvm.hexagon.V6.vaddw" => "__builtin_HEXAGON_V6_vaddw",
+    "llvm.hexagon.V6.vaddw.128B" => "__builtin_HEXAGON_V6_vaddw_128B",
+    "llvm.hexagon.V6.vaddw.dv" => "__builtin_HEXAGON_V6_vaddw_dv",
+    "llvm.hexagon.V6.vaddw.dv.128B" => "__builtin_HEXAGON_V6_vaddw_dv_128B",
+    "llvm.hexagon.V6.vaddwsat" => "__builtin_HEXAGON_V6_vaddwsat",
+    "llvm.hexagon.V6.vaddwsat.128B" => "__builtin_HEXAGON_V6_vaddwsat_128B",
+    "llvm.hexagon.V6.vaddwsat.dv" => "__builtin_HEXAGON_V6_vaddwsat_dv",
+    "llvm.hexagon.V6.vaddwsat.dv.128B" => "__builtin_HEXAGON_V6_vaddwsat_dv_128B",
+    "llvm.hexagon.V6.valignb" => "__builtin_HEXAGON_V6_valignb",
+    "llvm.hexagon.V6.valignb.128B" => "__builtin_HEXAGON_V6_valignb_128B",
+    "llvm.hexagon.V6.valignbi" => "__builtin_HEXAGON_V6_valignbi",
+    "llvm.hexagon.V6.valignbi.128B" => "__builtin_HEXAGON_V6_valignbi_128B",
+    "llvm.hexagon.V6.vand" => "__builtin_HEXAGON_V6_vand",
+    "llvm.hexagon.V6.vand.128B" => "__builtin_HEXAGON_V6_vand_128B",
+    "llvm.hexagon.V6.vaslh" => "__builtin_HEXAGON_V6_vaslh",
+    "llvm.hexagon.V6.vaslh.128B" => "__builtin_HEXAGON_V6_vaslh_128B",
+    "llvm.hexagon.V6.vaslhv" => "__builtin_HEXAGON_V6_vaslhv",
+    "llvm.hexagon.V6.vaslhv.128B" => "__builtin_HEXAGON_V6_vaslhv_128B",
+    "llvm.hexagon.V6.vaslw" => "__builtin_HEXAGON_V6_vaslw",
+    "llvm.hexagon.V6.vaslw.128B" => "__builtin_HEXAGON_V6_vaslw_128B",
+    "llvm.hexagon.V6.vaslw.acc" => "__builtin_HEXAGON_V6_vaslw_acc",
+    "llvm.hexagon.V6.vaslw.acc.128B" => "__builtin_HEXAGON_V6_vaslw_acc_128B",
+    "llvm.hexagon.V6.vaslwv" => "__builtin_HEXAGON_V6_vaslwv",
+    "llvm.hexagon.V6.vaslwv.128B" => "__builtin_HEXAGON_V6_vaslwv_128B",
+    "llvm.hexagon.V6.vasrh" => "__builtin_HEXAGON_V6_vasrh",
+    "llvm.hexagon.V6.vasrh.128B" => "__builtin_HEXAGON_V6_vasrh_128B",
+    "llvm.hexagon.V6.vasrhbrndsat" => "__builtin_HEXAGON_V6_vasrhbrndsat",
+    "llvm.hexagon.V6.vasrhbrndsat.128B" => "__builtin_HEXAGON_V6_vasrhbrndsat_128B",
+    "llvm.hexagon.V6.vasrhubrndsat" => "__builtin_HEXAGON_V6_vasrhubrndsat",
+    "llvm.hexagon.V6.vasrhubrndsat.128B" => "__builtin_HEXAGON_V6_vasrhubrndsat_128B",
+    "llvm.hexagon.V6.vasrhubsat" => "__builtin_HEXAGON_V6_vasrhubsat",
+    "llvm.hexagon.V6.vasrhubsat.128B" => "__builtin_HEXAGON_V6_vasrhubsat_128B",
+    "llvm.hexagon.V6.vasrhv" => "__builtin_HEXAGON_V6_vasrhv",
+    "llvm.hexagon.V6.vasrhv.128B" => "__builtin_HEXAGON_V6_vasrhv_128B",
+    "llvm.hexagon.V6.vasrw" => "__builtin_HEXAGON_V6_vasrw",
+    "llvm.hexagon.V6.vasrw.128B" => "__builtin_HEXAGON_V6_vasrw_128B",
+    "llvm.hexagon.V6.vasrw.acc" => "__builtin_HEXAGON_V6_vasrw_acc",
+    "llvm.hexagon.V6.vasrw.acc.128B" => "__builtin_HEXAGON_V6_vasrw_acc_128B",
+    "llvm.hexagon.V6.vasrwh" => "__builtin_HEXAGON_V6_vasrwh",
+    "llvm.hexagon.V6.vasrwh.128B" => "__builtin_HEXAGON_V6_vasrwh_128B",
+    "llvm.hexagon.V6.vasrwhrndsat" => "__builtin_HEXAGON_V6_vasrwhrndsat",
+    "llvm.hexagon.V6.vasrwhrndsat.128B" => "__builtin_HEXAGON_V6_vasrwhrndsat_128B",
+    "llvm.hexagon.V6.vasrwhsat" => "__builtin_HEXAGON_V6_vasrwhsat",
+    "llvm.hexagon.V6.vasrwhsat.128B" => "__builtin_HEXAGON_V6_vasrwhsat_128B",
+    "llvm.hexagon.V6.vasrwuhsat" => "__builtin_HEXAGON_V6_vasrwuhsat",
+    "llvm.hexagon.V6.vasrwuhsat.128B" => "__builtin_HEXAGON_V6_vasrwuhsat_128B",
+    "llvm.hexagon.V6.vasrwv" => "__builtin_HEXAGON_V6_vasrwv",
+    "llvm.hexagon.V6.vasrwv.128B" => "__builtin_HEXAGON_V6_vasrwv_128B",
+    "llvm.hexagon.V6.vassign" => "__builtin_HEXAGON_V6_vassign",
+    "llvm.hexagon.V6.vassign.128B" => "__builtin_HEXAGON_V6_vassign_128B",
+    "llvm.hexagon.V6.vassignp" => "__builtin_HEXAGON_V6_vassignp",
+    "llvm.hexagon.V6.vassignp.128B" => "__builtin_HEXAGON_V6_vassignp_128B",
+    "llvm.hexagon.V6.vavgh" => "__builtin_HEXAGON_V6_vavgh",
+    "llvm.hexagon.V6.vavgh.128B" => "__builtin_HEXAGON_V6_vavgh_128B",
+    "llvm.hexagon.V6.vavghrnd" => "__builtin_HEXAGON_V6_vavghrnd",
+    "llvm.hexagon.V6.vavghrnd.128B" => "__builtin_HEXAGON_V6_vavghrnd_128B",
+    "llvm.hexagon.V6.vavgub" => "__builtin_HEXAGON_V6_vavgub",
+    "llvm.hexagon.V6.vavgub.128B" => "__builtin_HEXAGON_V6_vavgub_128B",
+    "llvm.hexagon.V6.vavgubrnd" => "__builtin_HEXAGON_V6_vavgubrnd",
+    "llvm.hexagon.V6.vavgubrnd.128B" => "__builtin_HEXAGON_V6_vavgubrnd_128B",
+    "llvm.hexagon.V6.vavguh" => "__builtin_HEXAGON_V6_vavguh",
+    "llvm.hexagon.V6.vavguh.128B" => "__builtin_HEXAGON_V6_vavguh_128B",
+    "llvm.hexagon.V6.vavguhrnd" => "__builtin_HEXAGON_V6_vavguhrnd",
+    "llvm.hexagon.V6.vavguhrnd.128B" => "__builtin_HEXAGON_V6_vavguhrnd_128B",
+    "llvm.hexagon.V6.vavgw" => "__builtin_HEXAGON_V6_vavgw",
+    "llvm.hexagon.V6.vavgw.128B" => "__builtin_HEXAGON_V6_vavgw_128B",
+    "llvm.hexagon.V6.vavgwrnd" => "__builtin_HEXAGON_V6_vavgwrnd",
+    "llvm.hexagon.V6.vavgwrnd.128B" => "__builtin_HEXAGON_V6_vavgwrnd_128B",
+    "llvm.hexagon.V6.vcl0h" => "__builtin_HEXAGON_V6_vcl0h",
+    "llvm.hexagon.V6.vcl0h.128B" => "__builtin_HEXAGON_V6_vcl0h_128B",
+    "llvm.hexagon.V6.vcl0w" => "__builtin_HEXAGON_V6_vcl0w",
+    "llvm.hexagon.V6.vcl0w.128B" => "__builtin_HEXAGON_V6_vcl0w_128B",
+    "llvm.hexagon.V6.vcombine" => "__builtin_HEXAGON_V6_vcombine",
+    "llvm.hexagon.V6.vcombine.128B" => "__builtin_HEXAGON_V6_vcombine_128B",
+    "llvm.hexagon.V6.vd0" => "__builtin_HEXAGON_V6_vd0",
+    "llvm.hexagon.V6.vd0.128B" => "__builtin_HEXAGON_V6_vd0_128B",
+    "llvm.hexagon.V6.vdealb" => "__builtin_HEXAGON_V6_vdealb",
+    "llvm.hexagon.V6.vdealb.128B" => "__builtin_HEXAGON_V6_vdealb_128B",
+    "llvm.hexagon.V6.vdealb4w" => "__builtin_HEXAGON_V6_vdealb4w",
+    "llvm.hexagon.V6.vdealb4w.128B" => "__builtin_HEXAGON_V6_vdealb4w_128B",
+    "llvm.hexagon.V6.vdealh" => "__builtin_HEXAGON_V6_vdealh",
+    "llvm.hexagon.V6.vdealh.128B" => "__builtin_HEXAGON_V6_vdealh_128B",
+    "llvm.hexagon.V6.vdealvdd" => "__builtin_HEXAGON_V6_vdealvdd",
+    "llvm.hexagon.V6.vdealvdd.128B" => "__builtin_HEXAGON_V6_vdealvdd_128B",
+    "llvm.hexagon.V6.vdelta" => "__builtin_HEXAGON_V6_vdelta",
+    "llvm.hexagon.V6.vdelta.128B" => "__builtin_HEXAGON_V6_vdelta_128B",
+    "llvm.hexagon.V6.vdmpybus" => "__builtin_HEXAGON_V6_vdmpybus",
+    "llvm.hexagon.V6.vdmpybus.128B" => "__builtin_HEXAGON_V6_vdmpybus_128B",
+    "llvm.hexagon.V6.vdmpybus.acc" => "__builtin_HEXAGON_V6_vdmpybus_acc",
+    "llvm.hexagon.V6.vdmpybus.acc.128B" => "__builtin_HEXAGON_V6_vdmpybus_acc_128B",
+    "llvm.hexagon.V6.vdmpybus.dv" => "__builtin_HEXAGON_V6_vdmpybus_dv",
+    "llvm.hexagon.V6.vdmpybus.dv.128B" => "__builtin_HEXAGON_V6_vdmpybus_dv_128B",
+    "llvm.hexagon.V6.vdmpybus.dv.acc" => "__builtin_HEXAGON_V6_vdmpybus_dv_acc",
+    "llvm.hexagon.V6.vdmpybus.dv.acc.128B" => "__builtin_HEXAGON_V6_vdmpybus_dv_acc_128B",
+    "llvm.hexagon.V6.vdmpyhb" => "__builtin_HEXAGON_V6_vdmpyhb",
+    "llvm.hexagon.V6.vdmpyhb.128B" => "__builtin_HEXAGON_V6_vdmpyhb_128B",
+    "llvm.hexagon.V6.vdmpyhb.acc" => "__builtin_HEXAGON_V6_vdmpyhb_acc",
+    "llvm.hexagon.V6.vdmpyhb.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhb_acc_128B",
+    "llvm.hexagon.V6.vdmpyhb.dv" => "__builtin_HEXAGON_V6_vdmpyhb_dv",
+    "llvm.hexagon.V6.vdmpyhb.dv.128B" => "__builtin_HEXAGON_V6_vdmpyhb_dv_128B",
+    "llvm.hexagon.V6.vdmpyhb.dv.acc" => "__builtin_HEXAGON_V6_vdmpyhb_dv_acc",
+    "llvm.hexagon.V6.vdmpyhb.dv.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhb_dv_acc_128B",
+    "llvm.hexagon.V6.vdmpyhisat" => "__builtin_HEXAGON_V6_vdmpyhisat",
+    "llvm.hexagon.V6.vdmpyhisat.128B" => "__builtin_HEXAGON_V6_vdmpyhisat_128B",
+    "llvm.hexagon.V6.vdmpyhisat.acc" => "__builtin_HEXAGON_V6_vdmpyhisat_acc",
+    "llvm.hexagon.V6.vdmpyhisat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhisat_acc_128B",
+    "llvm.hexagon.V6.vdmpyhsat" => "__builtin_HEXAGON_V6_vdmpyhsat",
+    "llvm.hexagon.V6.vdmpyhsat.128B" => "__builtin_HEXAGON_V6_vdmpyhsat_128B",
+    "llvm.hexagon.V6.vdmpyhsat.acc" => "__builtin_HEXAGON_V6_vdmpyhsat_acc",
+    "llvm.hexagon.V6.vdmpyhsat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsat_acc_128B",
+    "llvm.hexagon.V6.vdmpyhsuisat" => "__builtin_HEXAGON_V6_vdmpyhsuisat",
+    "llvm.hexagon.V6.vdmpyhsuisat.128B" => "__builtin_HEXAGON_V6_vdmpyhsuisat_128B",
+    "llvm.hexagon.V6.vdmpyhsuisat.acc" => "__builtin_HEXAGON_V6_vdmpyhsuisat_acc",
+    "llvm.hexagon.V6.vdmpyhsuisat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsuisat_acc_128B",
+    "llvm.hexagon.V6.vdmpyhsusat" => "__builtin_HEXAGON_V6_vdmpyhsusat",
+    "llvm.hexagon.V6.vdmpyhsusat.128B" => "__builtin_HEXAGON_V6_vdmpyhsusat_128B",
+    "llvm.hexagon.V6.vdmpyhsusat.acc" => "__builtin_HEXAGON_V6_vdmpyhsusat_acc",
+    "llvm.hexagon.V6.vdmpyhsusat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsusat_acc_128B",
+    "llvm.hexagon.V6.vdmpyhvsat" => "__builtin_HEXAGON_V6_vdmpyhvsat",
+    "llvm.hexagon.V6.vdmpyhvsat.128B" => "__builtin_HEXAGON_V6_vdmpyhvsat_128B",
+    "llvm.hexagon.V6.vdmpyhvsat.acc" => "__builtin_HEXAGON_V6_vdmpyhvsat_acc",
+    "llvm.hexagon.V6.vdmpyhvsat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhvsat_acc_128B",
+    "llvm.hexagon.V6.vdsaduh" => "__builtin_HEXAGON_V6_vdsaduh",
+    "llvm.hexagon.V6.vdsaduh.128B" => "__builtin_HEXAGON_V6_vdsaduh_128B",
+    "llvm.hexagon.V6.vdsaduh.acc" => "__builtin_HEXAGON_V6_vdsaduh_acc",
+    "llvm.hexagon.V6.vdsaduh.acc.128B" => "__builtin_HEXAGON_V6_vdsaduh_acc_128B",
+    "llvm.hexagon.V6.vinsertwr" => "__builtin_HEXAGON_V6_vinsertwr",
+    "llvm.hexagon.V6.vinsertwr.128B" => "__builtin_HEXAGON_V6_vinsertwr_128B",
+    "llvm.hexagon.V6.vlalignb" => "__builtin_HEXAGON_V6_vlalignb",
+    "llvm.hexagon.V6.vlalignb.128B" => "__builtin_HEXAGON_V6_vlalignb_128B",
+    "llvm.hexagon.V6.vlalignbi" => "__builtin_HEXAGON_V6_vlalignbi",
+    "llvm.hexagon.V6.vlalignbi.128B" => "__builtin_HEXAGON_V6_vlalignbi_128B",
+    "llvm.hexagon.V6.vlsrh" => "__builtin_HEXAGON_V6_vlsrh",
+    "llvm.hexagon.V6.vlsrh.128B" => "__builtin_HEXAGON_V6_vlsrh_128B",
+    "llvm.hexagon.V6.vlsrhv" => "__builtin_HEXAGON_V6_vlsrhv",
+    "llvm.hexagon.V6.vlsrhv.128B" => "__builtin_HEXAGON_V6_vlsrhv_128B",
+    "llvm.hexagon.V6.vlsrw" => "__builtin_HEXAGON_V6_vlsrw",
+    "llvm.hexagon.V6.vlsrw.128B" => "__builtin_HEXAGON_V6_vlsrw_128B",
+    "llvm.hexagon.V6.vlsrwv" => "__builtin_HEXAGON_V6_vlsrwv",
+    "llvm.hexagon.V6.vlsrwv.128B" => "__builtin_HEXAGON_V6_vlsrwv_128B",
+    "llvm.hexagon.V6.vlutb" => "__builtin_HEXAGON_V6_vlutb",
+    "llvm.hexagon.V6.vlutb.128B" => "__builtin_HEXAGON_V6_vlutb_128B",
+    "llvm.hexagon.V6.vlutb.acc" => "__builtin_HEXAGON_V6_vlutb_acc",
+    "llvm.hexagon.V6.vlutb.acc.128B" => "__builtin_HEXAGON_V6_vlutb_acc_128B",
+    "llvm.hexagon.V6.vlutb.dv" => "__builtin_HEXAGON_V6_vlutb_dv",
+    "llvm.hexagon.V6.vlutb.dv.128B" => "__builtin_HEXAGON_V6_vlutb_dv_128B",
+    "llvm.hexagon.V6.vlutb.dv.acc" => "__builtin_HEXAGON_V6_vlutb_dv_acc",
+    "llvm.hexagon.V6.vlutb.dv.acc.128B" => "__builtin_HEXAGON_V6_vlutb_dv_acc_128B",
+    "llvm.hexagon.V6.vlutvvb" => "__builtin_HEXAGON_V6_vlutvvb",
+    "llvm.hexagon.V6.vlutvvb.128B" => "__builtin_HEXAGON_V6_vlutvvb_128B",
+    "llvm.hexagon.V6.vlutvvb.oracc" => "__builtin_HEXAGON_V6_vlutvvb_oracc",
+    "llvm.hexagon.V6.vlutvvb.oracc.128B" => "__builtin_HEXAGON_V6_vlutvvb_oracc_128B",
+    "llvm.hexagon.V6.vlutvwh" => "__builtin_HEXAGON_V6_vlutvwh",
+    "llvm.hexagon.V6.vlutvwh.128B" => "__builtin_HEXAGON_V6_vlutvwh_128B",
+    "llvm.hexagon.V6.vlutvwh.oracc" => "__builtin_HEXAGON_V6_vlutvwh_oracc",
+    "llvm.hexagon.V6.vlutvwh.oracc.128B" => "__builtin_HEXAGON_V6_vlutvwh_oracc_128B",
+    "llvm.hexagon.V6.vmaxh" => "__builtin_HEXAGON_V6_vmaxh",
+    "llvm.hexagon.V6.vmaxh.128B" => "__builtin_HEXAGON_V6_vmaxh_128B",
+    "llvm.hexagon.V6.vmaxub" => "__builtin_HEXAGON_V6_vmaxub",
+    "llvm.hexagon.V6.vmaxub.128B" => "__builtin_HEXAGON_V6_vmaxub_128B",
+    "llvm.hexagon.V6.vmaxuh" => "__builtin_HEXAGON_V6_vmaxuh",
+    "llvm.hexagon.V6.vmaxuh.128B" => "__builtin_HEXAGON_V6_vmaxuh_128B",
+    "llvm.hexagon.V6.vmaxw" => "__builtin_HEXAGON_V6_vmaxw",
+    "llvm.hexagon.V6.vmaxw.128B" => "__builtin_HEXAGON_V6_vmaxw_128B",
+    "llvm.hexagon.V6.vminh" => "__builtin_HEXAGON_V6_vminh",
+    "llvm.hexagon.V6.vminh.128B" => "__builtin_HEXAGON_V6_vminh_128B",
+    "llvm.hexagon.V6.vminub" => "__builtin_HEXAGON_V6_vminub",
+    "llvm.hexagon.V6.vminub.128B" => "__builtin_HEXAGON_V6_vminub_128B",
+    "llvm.hexagon.V6.vminuh" => "__builtin_HEXAGON_V6_vminuh",
+    "llvm.hexagon.V6.vminuh.128B" => "__builtin_HEXAGON_V6_vminuh_128B",
+    "llvm.hexagon.V6.vminw" => "__builtin_HEXAGON_V6_vminw",
+    "llvm.hexagon.V6.vminw.128B" => "__builtin_HEXAGON_V6_vminw_128B",
+    "llvm.hexagon.V6.vmpabus" => "__builtin_HEXAGON_V6_vmpabus",
+    "llvm.hexagon.V6.vmpabus.128B" => "__builtin_HEXAGON_V6_vmpabus_128B",
+    "llvm.hexagon.V6.vmpabus.acc" => "__builtin_HEXAGON_V6_vmpabus_acc",
+    "llvm.hexagon.V6.vmpabus.acc.128B" => "__builtin_HEXAGON_V6_vmpabus_acc_128B",
+    "llvm.hexagon.V6.vmpabusv" => "__builtin_HEXAGON_V6_vmpabusv",
+    "llvm.hexagon.V6.vmpabusv.128B" => "__builtin_HEXAGON_V6_vmpabusv_128B",
+    "llvm.hexagon.V6.vmpabuuv" => "__builtin_HEXAGON_V6_vmpabuuv",
+    "llvm.hexagon.V6.vmpabuuv.128B" => "__builtin_HEXAGON_V6_vmpabuuv_128B",
+    "llvm.hexagon.V6.vmpahb" => "__builtin_HEXAGON_V6_vmpahb",
+    "llvm.hexagon.V6.vmpahb.128B" => "__builtin_HEXAGON_V6_vmpahb_128B",
+    "llvm.hexagon.V6.vmpahb.acc" => "__builtin_HEXAGON_V6_vmpahb_acc",
+    "llvm.hexagon.V6.vmpahb.acc.128B" => "__builtin_HEXAGON_V6_vmpahb_acc_128B",
+    "llvm.hexagon.V6.vmpybus" => "__builtin_HEXAGON_V6_vmpybus",
+    "llvm.hexagon.V6.vmpybus.128B" => "__builtin_HEXAGON_V6_vmpybus_128B",
+    "llvm.hexagon.V6.vmpybus.acc" => "__builtin_HEXAGON_V6_vmpybus_acc",
+    "llvm.hexagon.V6.vmpybus.acc.128B" => "__builtin_HEXAGON_V6_vmpybus_acc_128B",
+    "llvm.hexagon.V6.vmpybusv" => "__builtin_HEXAGON_V6_vmpybusv",
+    "llvm.hexagon.V6.vmpybusv.128B" => "__builtin_HEXAGON_V6_vmpybusv_128B",
+    "llvm.hexagon.V6.vmpybusv.acc" => "__builtin_HEXAGON_V6_vmpybusv_acc",
+    "llvm.hexagon.V6.vmpybusv.acc.128B" => "__builtin_HEXAGON_V6_vmpybusv_acc_128B",
+    "llvm.hexagon.V6.vmpybv" => "__builtin_HEXAGON_V6_vmpybv",
+    "llvm.hexagon.V6.vmpybv.128B" => "__builtin_HEXAGON_V6_vmpybv_128B",
+    "llvm.hexagon.V6.vmpybv.acc" => "__builtin_HEXAGON_V6_vmpybv_acc",
+    "llvm.hexagon.V6.vmpybv.acc.128B" => "__builtin_HEXAGON_V6_vmpybv_acc_128B",
+    "llvm.hexagon.V6.vmpyewuh" => "__builtin_HEXAGON_V6_vmpyewuh",
+    "llvm.hexagon.V6.vmpyewuh.128B" => "__builtin_HEXAGON_V6_vmpyewuh_128B",
+    "llvm.hexagon.V6.vmpyh" => "__builtin_HEXAGON_V6_vmpyh",
+    "llvm.hexagon.V6.vmpyh.128B" => "__builtin_HEXAGON_V6_vmpyh_128B",
+    "llvm.hexagon.V6.vmpyhsat.acc" => "__builtin_HEXAGON_V6_vmpyhsat_acc",
+    "llvm.hexagon.V6.vmpyhsat.acc.128B" => "__builtin_HEXAGON_V6_vmpyhsat_acc_128B",
+    "llvm.hexagon.V6.vmpyhsrs" => "__builtin_HEXAGON_V6_vmpyhsrs",
+    "llvm.hexagon.V6.vmpyhsrs.128B" => "__builtin_HEXAGON_V6_vmpyhsrs_128B",
+    "llvm.hexagon.V6.vmpyhss" => "__builtin_HEXAGON_V6_vmpyhss",
+    "llvm.hexagon.V6.vmpyhss.128B" => "__builtin_HEXAGON_V6_vmpyhss_128B",
+    "llvm.hexagon.V6.vmpyhus" => "__builtin_HEXAGON_V6_vmpyhus",
+    "llvm.hexagon.V6.vmpyhus.128B" => "__builtin_HEXAGON_V6_vmpyhus_128B",
+    "llvm.hexagon.V6.vmpyhus.acc" => "__builtin_HEXAGON_V6_vmpyhus_acc",
+    "llvm.hexagon.V6.vmpyhus.acc.128B" => "__builtin_HEXAGON_V6_vmpyhus_acc_128B",
+    "llvm.hexagon.V6.vmpyhv" => "__builtin_HEXAGON_V6_vmpyhv",
+    "llvm.hexagon.V6.vmpyhv.128B" => "__builtin_HEXAGON_V6_vmpyhv_128B",
+    "llvm.hexagon.V6.vmpyhv.acc" => "__builtin_HEXAGON_V6_vmpyhv_acc",
+    "llvm.hexagon.V6.vmpyhv.acc.128B" => "__builtin_HEXAGON_V6_vmpyhv_acc_128B",
+    "llvm.hexagon.V6.vmpyhvsrs" => "__builtin_HEXAGON_V6_vmpyhvsrs",
+    "llvm.hexagon.V6.vmpyhvsrs.128B" => "__builtin_HEXAGON_V6_vmpyhvsrs_128B",
+    "llvm.hexagon.V6.vmpyieoh" => "__builtin_HEXAGON_V6_vmpyieoh",
+    "llvm.hexagon.V6.vmpyieoh.128B" => "__builtin_HEXAGON_V6_vmpyieoh_128B",
+    "llvm.hexagon.V6.vmpyiewh.acc" => "__builtin_HEXAGON_V6_vmpyiewh_acc",
+    "llvm.hexagon.V6.vmpyiewh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiewh_acc_128B",
+    "llvm.hexagon.V6.vmpyiewuh" => "__builtin_HEXAGON_V6_vmpyiewuh",
+    "llvm.hexagon.V6.vmpyiewuh.128B" => "__builtin_HEXAGON_V6_vmpyiewuh_128B",
+    "llvm.hexagon.V6.vmpyiewuh.acc" => "__builtin_HEXAGON_V6_vmpyiewuh_acc",
+    "llvm.hexagon.V6.vmpyiewuh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiewuh_acc_128B",
+    "llvm.hexagon.V6.vmpyih" => "__builtin_HEXAGON_V6_vmpyih",
+    "llvm.hexagon.V6.vmpyih.128B" => "__builtin_HEXAGON_V6_vmpyih_128B",
+    "llvm.hexagon.V6.vmpyih.acc" => "__builtin_HEXAGON_V6_vmpyih_acc",
+    "llvm.hexagon.V6.vmpyih.acc.128B" => "__builtin_HEXAGON_V6_vmpyih_acc_128B",
+    "llvm.hexagon.V6.vmpyihb" => "__builtin_HEXAGON_V6_vmpyihb",
+    "llvm.hexagon.V6.vmpyihb.128B" => "__builtin_HEXAGON_V6_vmpyihb_128B",
+    "llvm.hexagon.V6.vmpyihb.acc" => "__builtin_HEXAGON_V6_vmpyihb_acc",
+    "llvm.hexagon.V6.vmpyihb.acc.128B" => "__builtin_HEXAGON_V6_vmpyihb_acc_128B",
+    "llvm.hexagon.V6.vmpyiowh" => "__builtin_HEXAGON_V6_vmpyiowh",
+    "llvm.hexagon.V6.vmpyiowh.128B" => "__builtin_HEXAGON_V6_vmpyiowh_128B",
+    "llvm.hexagon.V6.vmpyiwb" => "__builtin_HEXAGON_V6_vmpyiwb",
+    "llvm.hexagon.V6.vmpyiwb.128B" => "__builtin_HEXAGON_V6_vmpyiwb_128B",
+    "llvm.hexagon.V6.vmpyiwb.acc" => "__builtin_HEXAGON_V6_vmpyiwb_acc",
+    "llvm.hexagon.V6.vmpyiwb.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwb_acc_128B",
+    "llvm.hexagon.V6.vmpyiwh" => "__builtin_HEXAGON_V6_vmpyiwh",
+    "llvm.hexagon.V6.vmpyiwh.128B" => "__builtin_HEXAGON_V6_vmpyiwh_128B",
+    "llvm.hexagon.V6.vmpyiwh.acc" => "__builtin_HEXAGON_V6_vmpyiwh_acc",
+    "llvm.hexagon.V6.vmpyiwh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwh_acc_128B",
+    "llvm.hexagon.V6.vmpyowh" => "__builtin_HEXAGON_V6_vmpyowh",
+    "llvm.hexagon.V6.vmpyowh.128B" => "__builtin_HEXAGON_V6_vmpyowh_128B",
+    "llvm.hexagon.V6.vmpyowh.rnd" => "__builtin_HEXAGON_V6_vmpyowh_rnd",
+    "llvm.hexagon.V6.vmpyowh.rnd.128B" => "__builtin_HEXAGON_V6_vmpyowh_rnd_128B",
+    "llvm.hexagon.V6.vmpyowh.rnd.sacc" => "__builtin_HEXAGON_V6_vmpyowh_rnd_sacc",
+    "llvm.hexagon.V6.vmpyowh.rnd.sacc.128B" => "__builtin_HEXAGON_V6_vmpyowh_rnd_sacc_128B",
+    "llvm.hexagon.V6.vmpyowh.sacc" => "__builtin_HEXAGON_V6_vmpyowh_sacc",
+    "llvm.hexagon.V6.vmpyowh.sacc.128B" => "__builtin_HEXAGON_V6_vmpyowh_sacc_128B",
+    "llvm.hexagon.V6.vmpyub" => "__builtin_HEXAGON_V6_vmpyub",
+    "llvm.hexagon.V6.vmpyub.128B" => "__builtin_HEXAGON_V6_vmpyub_128B",
+    "llvm.hexagon.V6.vmpyub.acc" => "__builtin_HEXAGON_V6_vmpyub_acc",
+    "llvm.hexagon.V6.vmpyub.acc.128B" => "__builtin_HEXAGON_V6_vmpyub_acc_128B",
+    "llvm.hexagon.V6.vmpyubv" => "__builtin_HEXAGON_V6_vmpyubv",
+    "llvm.hexagon.V6.vmpyubv.128B" => "__builtin_HEXAGON_V6_vmpyubv_128B",
+    "llvm.hexagon.V6.vmpyubv.acc" => "__builtin_HEXAGON_V6_vmpyubv_acc",
+    "llvm.hexagon.V6.vmpyubv.acc.128B" => "__builtin_HEXAGON_V6_vmpyubv_acc_128B",
+    "llvm.hexagon.V6.vmpyuh" => "__builtin_HEXAGON_V6_vmpyuh",
+    "llvm.hexagon.V6.vmpyuh.128B" => "__builtin_HEXAGON_V6_vmpyuh_128B",
+    "llvm.hexagon.V6.vmpyuh.acc" => "__builtin_HEXAGON_V6_vmpyuh_acc",
+    "llvm.hexagon.V6.vmpyuh.acc.128B" => "__builtin_HEXAGON_V6_vmpyuh_acc_128B",
+    "llvm.hexagon.V6.vmpyuhv" => "__builtin_HEXAGON_V6_vmpyuhv",
+    "llvm.hexagon.V6.vmpyuhv.128B" => "__builtin_HEXAGON_V6_vmpyuhv_128B",
+    "llvm.hexagon.V6.vmpyuhv.acc" => "__builtin_HEXAGON_V6_vmpyuhv_acc",
+    "llvm.hexagon.V6.vmpyuhv.acc.128B" => "__builtin_HEXAGON_V6_vmpyuhv_acc_128B",
+    "llvm.hexagon.V6.vnavgh" => "__builtin_HEXAGON_V6_vnavgh",
+    "llvm.hexagon.V6.vnavgh.128B" => "__builtin_HEXAGON_V6_vnavgh_128B",
+    "llvm.hexagon.V6.vnavgub" => "__builtin_HEXAGON_V6_vnavgub",
+    "llvm.hexagon.V6.vnavgub.128B" => "__builtin_HEXAGON_V6_vnavgub_128B",
+    "llvm.hexagon.V6.vnavgw" => "__builtin_HEXAGON_V6_vnavgw",
+    "llvm.hexagon.V6.vnavgw.128B" => "__builtin_HEXAGON_V6_vnavgw_128B",
+    "llvm.hexagon.V6.vnormamth" => "__builtin_HEXAGON_V6_vnormamth",
+    "llvm.hexagon.V6.vnormamth.128B" => "__builtin_HEXAGON_V6_vnormamth_128B",
+    "llvm.hexagon.V6.vnormamtw" => "__builtin_HEXAGON_V6_vnormamtw",
+    "llvm.hexagon.V6.vnormamtw.128B" => "__builtin_HEXAGON_V6_vnormamtw_128B",
+    "llvm.hexagon.V6.vnot" => "__builtin_HEXAGON_V6_vnot",
+    "llvm.hexagon.V6.vnot.128B" => "__builtin_HEXAGON_V6_vnot_128B",
+    "llvm.hexagon.V6.vor" => "__builtin_HEXAGON_V6_vor",
+    "llvm.hexagon.V6.vor.128B" => "__builtin_HEXAGON_V6_vor_128B",
+    "llvm.hexagon.V6.vpackeb" => "__builtin_HEXAGON_V6_vpackeb",
+    "llvm.hexagon.V6.vpackeb.128B" => "__builtin_HEXAGON_V6_vpackeb_128B",
+    "llvm.hexagon.V6.vpackeh" => "__builtin_HEXAGON_V6_vpackeh",
+    "llvm.hexagon.V6.vpackeh.128B" => "__builtin_HEXAGON_V6_vpackeh_128B",
+    "llvm.hexagon.V6.vpackhb.sat" => "__builtin_HEXAGON_V6_vpackhb_sat",
+    "llvm.hexagon.V6.vpackhb.sat.128B" => "__builtin_HEXAGON_V6_vpackhb_sat_128B",
+    "llvm.hexagon.V6.vpackhub.sat" => "__builtin_HEXAGON_V6_vpackhub_sat",
+    "llvm.hexagon.V6.vpackhub.sat.128B" => "__builtin_HEXAGON_V6_vpackhub_sat_128B",
+    "llvm.hexagon.V6.vpackob" => "__builtin_HEXAGON_V6_vpackob",
+    "llvm.hexagon.V6.vpackob.128B" => "__builtin_HEXAGON_V6_vpackob_128B",
+    "llvm.hexagon.V6.vpackoh" => "__builtin_HEXAGON_V6_vpackoh",
+    "llvm.hexagon.V6.vpackoh.128B" => "__builtin_HEXAGON_V6_vpackoh_128B",
+    "llvm.hexagon.V6.vpackwh.sat" => "__builtin_HEXAGON_V6_vpackwh_sat",
+    "llvm.hexagon.V6.vpackwh.sat.128B" => "__builtin_HEXAGON_V6_vpackwh_sat_128B",
+    "llvm.hexagon.V6.vpackwuh.sat" => "__builtin_HEXAGON_V6_vpackwuh_sat",
+    "llvm.hexagon.V6.vpackwuh.sat.128B" => "__builtin_HEXAGON_V6_vpackwuh_sat_128B",
+    "llvm.hexagon.V6.vpopcounth" => "__builtin_HEXAGON_V6_vpopcounth",
+    "llvm.hexagon.V6.vpopcounth.128B" => "__builtin_HEXAGON_V6_vpopcounth_128B",
+    "llvm.hexagon.V6.vrdelta" => "__builtin_HEXAGON_V6_vrdelta",
+    "llvm.hexagon.V6.vrdelta.128B" => "__builtin_HEXAGON_V6_vrdelta_128B",
+    "llvm.hexagon.V6.vrmpybus" => "__builtin_HEXAGON_V6_vrmpybus",
+    "llvm.hexagon.V6.vrmpybus.128B" => "__builtin_HEXAGON_V6_vrmpybus_128B",
+    "llvm.hexagon.V6.vrmpybus.acc" => "__builtin_HEXAGON_V6_vrmpybus_acc",
+    "llvm.hexagon.V6.vrmpybus.acc.128B" => "__builtin_HEXAGON_V6_vrmpybus_acc_128B",
+    "llvm.hexagon.V6.vrmpybusi" => "__builtin_HEXAGON_V6_vrmpybusi",
+    "llvm.hexagon.V6.vrmpybusi.128B" => "__builtin_HEXAGON_V6_vrmpybusi_128B",
+    "llvm.hexagon.V6.vrmpybusi.acc" => "__builtin_HEXAGON_V6_vrmpybusi_acc",
+    "llvm.hexagon.V6.vrmpybusi.acc.128B" => "__builtin_HEXAGON_V6_vrmpybusi_acc_128B",
+    "llvm.hexagon.V6.vrmpybusv" => "__builtin_HEXAGON_V6_vrmpybusv",
+    "llvm.hexagon.V6.vrmpybusv.128B" => "__builtin_HEXAGON_V6_vrmpybusv_128B",
+    "llvm.hexagon.V6.vrmpybusv.acc" => "__builtin_HEXAGON_V6_vrmpybusv_acc",
+    "llvm.hexagon.V6.vrmpybusv.acc.128B" => "__builtin_HEXAGON_V6_vrmpybusv_acc_128B",
+    "llvm.hexagon.V6.vrmpybv" => "__builtin_HEXAGON_V6_vrmpybv",
+    "llvm.hexagon.V6.vrmpybv.128B" => "__builtin_HEXAGON_V6_vrmpybv_128B",
+    "llvm.hexagon.V6.vrmpybv.acc" => "__builtin_HEXAGON_V6_vrmpybv_acc",
+    "llvm.hexagon.V6.vrmpybv.acc.128B" => "__builtin_HEXAGON_V6_vrmpybv_acc_128B",
+    "llvm.hexagon.V6.vrmpyub" => "__builtin_HEXAGON_V6_vrmpyub",
+    "llvm.hexagon.V6.vrmpyub.128B" => "__builtin_HEXAGON_V6_vrmpyub_128B",
+    "llvm.hexagon.V6.vrmpyub.acc" => "__builtin_HEXAGON_V6_vrmpyub_acc",
+    "llvm.hexagon.V6.vrmpyub.acc.128B" => "__builtin_HEXAGON_V6_vrmpyub_acc_128B",
+    "llvm.hexagon.V6.vrmpyubi" => "__builtin_HEXAGON_V6_vrmpyubi",
+    "llvm.hexagon.V6.vrmpyubi.128B" => "__builtin_HEXAGON_V6_vrmpyubi_128B",
+    "llvm.hexagon.V6.vrmpyubi.acc" => "__builtin_HEXAGON_V6_vrmpyubi_acc",
+    "llvm.hexagon.V6.vrmpyubi.acc.128B" => "__builtin_HEXAGON_V6_vrmpyubi_acc_128B",
+    "llvm.hexagon.V6.vrmpyubv" => "__builtin_HEXAGON_V6_vrmpyubv",
+    "llvm.hexagon.V6.vrmpyubv.128B" => "__builtin_HEXAGON_V6_vrmpyubv_128B",
+    "llvm.hexagon.V6.vrmpyubv.acc" => "__builtin_HEXAGON_V6_vrmpyubv_acc",
+    "llvm.hexagon.V6.vrmpyubv.acc.128B" => "__builtin_HEXAGON_V6_vrmpyubv_acc_128B",
+    "llvm.hexagon.V6.vror" => "__builtin_HEXAGON_V6_vror",
+    "llvm.hexagon.V6.vror.128B" => "__builtin_HEXAGON_V6_vror_128B",
+    "llvm.hexagon.V6.vroundhb" => "__builtin_HEXAGON_V6_vroundhb",
+    "llvm.hexagon.V6.vroundhb.128B" => "__builtin_HEXAGON_V6_vroundhb_128B",
+    "llvm.hexagon.V6.vroundhub" => "__builtin_HEXAGON_V6_vroundhub",
+    "llvm.hexagon.V6.vroundhub.128B" => "__builtin_HEXAGON_V6_vroundhub_128B",
+    "llvm.hexagon.V6.vroundwh" => "__builtin_HEXAGON_V6_vroundwh",
+    "llvm.hexagon.V6.vroundwh.128B" => "__builtin_HEXAGON_V6_vroundwh_128B",
+    "llvm.hexagon.V6.vroundwuh" => "__builtin_HEXAGON_V6_vroundwuh",
+    "llvm.hexagon.V6.vroundwuh.128B" => "__builtin_HEXAGON_V6_vroundwuh_128B",
+    "llvm.hexagon.V6.vrsadubi" => "__builtin_HEXAGON_V6_vrsadubi",
+    "llvm.hexagon.V6.vrsadubi.128B" => "__builtin_HEXAGON_V6_vrsadubi_128B",
+    "llvm.hexagon.V6.vrsadubi.acc" => "__builtin_HEXAGON_V6_vrsadubi_acc",
+    "llvm.hexagon.V6.vrsadubi.acc.128B" => "__builtin_HEXAGON_V6_vrsadubi_acc_128B",
+    "llvm.hexagon.V6.vsathub" => "__builtin_HEXAGON_V6_vsathub",
+    "llvm.hexagon.V6.vsathub.128B" => "__builtin_HEXAGON_V6_vsathub_128B",
+    "llvm.hexagon.V6.vsatwh" => "__builtin_HEXAGON_V6_vsatwh",
+    "llvm.hexagon.V6.vsatwh.128B" => "__builtin_HEXAGON_V6_vsatwh_128B",
+    "llvm.hexagon.V6.vsb" => "__builtin_HEXAGON_V6_vsb",
+    "llvm.hexagon.V6.vsb.128B" => "__builtin_HEXAGON_V6_vsb_128B",
+    "llvm.hexagon.V6.vsh" => "__builtin_HEXAGON_V6_vsh",
+    "llvm.hexagon.V6.vsh.128B" => "__builtin_HEXAGON_V6_vsh_128B",
+    "llvm.hexagon.V6.vshufeh" => "__builtin_HEXAGON_V6_vshufeh",
+    "llvm.hexagon.V6.vshufeh.128B" => "__builtin_HEXAGON_V6_vshufeh_128B",
+    "llvm.hexagon.V6.vshuffb" => "__builtin_HEXAGON_V6_vshuffb",
+    "llvm.hexagon.V6.vshuffb.128B" => "__builtin_HEXAGON_V6_vshuffb_128B",
+    "llvm.hexagon.V6.vshuffeb" => "__builtin_HEXAGON_V6_vshuffeb",
+    "llvm.hexagon.V6.vshuffeb.128B" => "__builtin_HEXAGON_V6_vshuffeb_128B",
+    "llvm.hexagon.V6.vshuffh" => "__builtin_HEXAGON_V6_vshuffh",
+    "llvm.hexagon.V6.vshuffh.128B" => "__builtin_HEXAGON_V6_vshuffh_128B",
+    "llvm.hexagon.V6.vshuffob" => "__builtin_HEXAGON_V6_vshuffob",
+    "llvm.hexagon.V6.vshuffob.128B" => "__builtin_HEXAGON_V6_vshuffob_128B",
+    "llvm.hexagon.V6.vshuffvdd" => "__builtin_HEXAGON_V6_vshuffvdd",
+    "llvm.hexagon.V6.vshuffvdd.128B" => "__builtin_HEXAGON_V6_vshuffvdd_128B",
+    "llvm.hexagon.V6.vshufoeb" => "__builtin_HEXAGON_V6_vshufoeb",
+    "llvm.hexagon.V6.vshufoeb.128B" => "__builtin_HEXAGON_V6_vshufoeb_128B",
+    "llvm.hexagon.V6.vshufoeh" => "__builtin_HEXAGON_V6_vshufoeh",
+    "llvm.hexagon.V6.vshufoeh.128B" => "__builtin_HEXAGON_V6_vshufoeh_128B",
+    "llvm.hexagon.V6.vshufoh" => "__builtin_HEXAGON_V6_vshufoh",
+    "llvm.hexagon.V6.vshufoh.128B" => "__builtin_HEXAGON_V6_vshufoh_128B",
+    "llvm.hexagon.V6.vsubb" => "__builtin_HEXAGON_V6_vsubb",
+    "llvm.hexagon.V6.vsubb.128B" => "__builtin_HEXAGON_V6_vsubb_128B",
+    "llvm.hexagon.V6.vsubb.dv" => "__builtin_HEXAGON_V6_vsubb_dv",
+    "llvm.hexagon.V6.vsubb.dv.128B" => "__builtin_HEXAGON_V6_vsubb_dv_128B",
+    "llvm.hexagon.V6.vsubh" => "__builtin_HEXAGON_V6_vsubh",
+    "llvm.hexagon.V6.vsubh.128B" => "__builtin_HEXAGON_V6_vsubh_128B",
+    "llvm.hexagon.V6.vsubh.dv" => "__builtin_HEXAGON_V6_vsubh_dv",
+    "llvm.hexagon.V6.vsubh.dv.128B" => "__builtin_HEXAGON_V6_vsubh_dv_128B",
+    "llvm.hexagon.V6.vsubhsat" => "__builtin_HEXAGON_V6_vsubhsat",
+    "llvm.hexagon.V6.vsubhsat.128B" => "__builtin_HEXAGON_V6_vsubhsat_128B",
+    "llvm.hexagon.V6.vsubhsat.dv" => "__builtin_HEXAGON_V6_vsubhsat_dv",
+    "llvm.hexagon.V6.vsubhsat.dv.128B" => "__builtin_HEXAGON_V6_vsubhsat_dv_128B",
+    "llvm.hexagon.V6.vsubhw" => "__builtin_HEXAGON_V6_vsubhw",
+    "llvm.hexagon.V6.vsubhw.128B" => "__builtin_HEXAGON_V6_vsubhw_128B",
+    "llvm.hexagon.V6.vsububh" => "__builtin_HEXAGON_V6_vsububh",
+    "llvm.hexagon.V6.vsububh.128B" => "__builtin_HEXAGON_V6_vsububh_128B",
+    "llvm.hexagon.V6.vsububsat" => "__builtin_HEXAGON_V6_vsububsat",
+    "llvm.hexagon.V6.vsububsat.128B" => "__builtin_HEXAGON_V6_vsububsat_128B",
+    "llvm.hexagon.V6.vsububsat.dv" => "__builtin_HEXAGON_V6_vsububsat_dv",
+    "llvm.hexagon.V6.vsububsat.dv.128B" => "__builtin_HEXAGON_V6_vsububsat_dv_128B",
+    "llvm.hexagon.V6.vsubuhsat" => "__builtin_HEXAGON_V6_vsubuhsat",
+    "llvm.hexagon.V6.vsubuhsat.128B" => "__builtin_HEXAGON_V6_vsubuhsat_128B",
+    "llvm.hexagon.V6.vsubuhsat.dv" => "__builtin_HEXAGON_V6_vsubuhsat_dv",
+    "llvm.hexagon.V6.vsubuhsat.dv.128B" => "__builtin_HEXAGON_V6_vsubuhsat_dv_128B",
+    "llvm.hexagon.V6.vsubuhw" => "__builtin_HEXAGON_V6_vsubuhw",
+    "llvm.hexagon.V6.vsubuhw.128B" => "__builtin_HEXAGON_V6_vsubuhw_128B",
+    "llvm.hexagon.V6.vsubw" => "__builtin_HEXAGON_V6_vsubw",
+    "llvm.hexagon.V6.vsubw.128B" => "__builtin_HEXAGON_V6_vsubw_128B",
+    "llvm.hexagon.V6.vsubw.dv" => "__builtin_HEXAGON_V6_vsubw_dv",
+    "llvm.hexagon.V6.vsubw.dv.128B" => "__builtin_HEXAGON_V6_vsubw_dv_128B",
+    "llvm.hexagon.V6.vsubwsat" => "__builtin_HEXAGON_V6_vsubwsat",
+    "llvm.hexagon.V6.vsubwsat.128B" => "__builtin_HEXAGON_V6_vsubwsat_128B",
+    "llvm.hexagon.V6.vsubwsat.dv" => "__builtin_HEXAGON_V6_vsubwsat_dv",
+    "llvm.hexagon.V6.vsubwsat.dv.128B" => "__builtin_HEXAGON_V6_vsubwsat_dv_128B",
+    "llvm.hexagon.V6.vtmpyb" => "__builtin_HEXAGON_V6_vtmpyb",
+    "llvm.hexagon.V6.vtmpyb.128B" => "__builtin_HEXAGON_V6_vtmpyb_128B",
+    "llvm.hexagon.V6.vtmpyb.acc" => "__builtin_HEXAGON_V6_vtmpyb_acc",
+    "llvm.hexagon.V6.vtmpyb.acc.128B" => "__builtin_HEXAGON_V6_vtmpyb_acc_128B",
+    "llvm.hexagon.V6.vtmpybus" => "__builtin_HEXAGON_V6_vtmpybus",
+    "llvm.hexagon.V6.vtmpybus.128B" => "__builtin_HEXAGON_V6_vtmpybus_128B",
+    "llvm.hexagon.V6.vtmpybus.acc" => "__builtin_HEXAGON_V6_vtmpybus_acc",
+    "llvm.hexagon.V6.vtmpybus.acc.128B" => "__builtin_HEXAGON_V6_vtmpybus_acc_128B",
+    "llvm.hexagon.V6.vtmpyhb" => "__builtin_HEXAGON_V6_vtmpyhb",
+    "llvm.hexagon.V6.vtmpyhb.128B" => "__builtin_HEXAGON_V6_vtmpyhb_128B",
+    "llvm.hexagon.V6.vtmpyhb.acc" => "__builtin_HEXAGON_V6_vtmpyhb_acc",
+    "llvm.hexagon.V6.vtmpyhb.acc.128B" => "__builtin_HEXAGON_V6_vtmpyhb_acc_128B",
+    "llvm.hexagon.V6.vunpackb" => "__builtin_HEXAGON_V6_vunpackb",
+    "llvm.hexagon.V6.vunpackb.128B" => "__builtin_HEXAGON_V6_vunpackb_128B",
+    "llvm.hexagon.V6.vunpackh" => "__builtin_HEXAGON_V6_vunpackh",
+    "llvm.hexagon.V6.vunpackh.128B" => "__builtin_HEXAGON_V6_vunpackh_128B",
+    "llvm.hexagon.V6.vunpackob" => "__builtin_HEXAGON_V6_vunpackob",
+    "llvm.hexagon.V6.vunpackob.128B" => "__builtin_HEXAGON_V6_vunpackob_128B",
+    "llvm.hexagon.V6.vunpackoh" => "__builtin_HEXAGON_V6_vunpackoh",
+    "llvm.hexagon.V6.vunpackoh.128B" => "__builtin_HEXAGON_V6_vunpackoh_128B",
+    "llvm.hexagon.V6.vunpackub" => "__builtin_HEXAGON_V6_vunpackub",
+    "llvm.hexagon.V6.vunpackub.128B" => "__builtin_HEXAGON_V6_vunpackub_128B",
+    "llvm.hexagon.V6.vunpackuh" => "__builtin_HEXAGON_V6_vunpackuh",
+    "llvm.hexagon.V6.vunpackuh.128B" => "__builtin_HEXAGON_V6_vunpackuh_128B",
+    "llvm.hexagon.V6.vxor" => "__builtin_HEXAGON_V6_vxor",
+    "llvm.hexagon.V6.vxor.128B" => "__builtin_HEXAGON_V6_vxor_128B",
+    "llvm.hexagon.V6.vzb" => "__builtin_HEXAGON_V6_vzb",
+    "llvm.hexagon.V6.vzb.128B" => "__builtin_HEXAGON_V6_vzb_128B",
+    "llvm.hexagon.V6.vzh" => "__builtin_HEXAGON_V6_vzh",
+    "llvm.hexagon.V6.vzh.128B" => "__builtin_HEXAGON_V6_vzh_128B",
+    "llvm.hexagon.brev.ldb" => "__builtin_brev_ldb",
+    "llvm.hexagon.brev.ldd" => "__builtin_brev_ldd",
+    "llvm.hexagon.brev.ldh" => "__builtin_brev_ldh",
+    "llvm.hexagon.brev.ldub" => "__builtin_brev_ldub",
+    "llvm.hexagon.brev.lduh" => "__builtin_brev_lduh",
+    "llvm.hexagon.brev.ldw" => "__builtin_brev_ldw",
+    "llvm.hexagon.brev.stb" => "__builtin_brev_stb",
+    "llvm.hexagon.brev.std" => "__builtin_brev_std",
+    "llvm.hexagon.brev.sth" => "__builtin_brev_sth",
+    "llvm.hexagon.brev.sthhi" => "__builtin_brev_sthhi",
+    "llvm.hexagon.brev.stw" => "__builtin_brev_stw",
+    "llvm.hexagon.circ.ldb" => "__builtin_circ_ldb",
     "llvm.hexagon.circ.ldd" => "__builtin_circ_ldd",
+    "llvm.hexagon.circ.ldh" => "__builtin_circ_ldh",
+    "llvm.hexagon.circ.ldub" => "__builtin_circ_ldub",
+    "llvm.hexagon.circ.lduh" => "__builtin_circ_lduh",
+    "llvm.hexagon.circ.ldw" => "__builtin_circ_ldw",
+    "llvm.hexagon.circ.stb" => "__builtin_circ_stb",
+    "llvm.hexagon.circ.std" => "__builtin_circ_std",
+    "llvm.hexagon.circ.sth" => "__builtin_circ_sth",
+    "llvm.hexagon.circ.sthhi" => "__builtin_circ_sthhi",
+    "llvm.hexagon.circ.stw" => "__builtin_circ_stw",
+    "llvm.hexagon.mm256i.vaddw" => "__builtin__mm256i_vaddw",
+    "llvm.hexagon.prefetch" => "__builtin_HEXAGON_prefetch",
     // mips
     "llvm.mips.absq.s.ph" => "__builtin_mips_absq_s_ph",
     "llvm.mips.absq.s.qb" => "__builtin_mips_absq_s_qb",
@@ -1789,7 +2313,9 @@ match name {
     "llvm.nvvm.add.rz.d" => "__nvvm_add_rz_d",
     "llvm.nvvm.add.rz.f" => "__nvvm_add_rz_f",
     "llvm.nvvm.add.rz.ftz.f" => "__nvvm_add_rz_ftz_f",
+    "llvm.nvvm.bar.sync" => "__nvvm_bar_sync",
     "llvm.nvvm.barrier0" => "__nvvm_bar0",
+    // [DUPLICATE]: "llvm.nvvm.barrier0" => "__syncthreads",
     "llvm.nvvm.barrier0.and" => "__nvvm_bar0_and",
     "llvm.nvvm.barrier0.or" => "__nvvm_bar0_or",
     "llvm.nvvm.barrier0.popc" => "__nvvm_bar0_popc",
@@ -1980,6 +2506,8 @@ match name {
     "llvm.nvvm.rcp.rz.d" => "__nvvm_rcp_rz_d",
     "llvm.nvvm.rcp.rz.f" => "__nvvm_rcp_rz_f",
     "llvm.nvvm.rcp.rz.ftz.f" => "__nvvm_rcp_rz_ftz_f",
+    "llvm.nvvm.read.ptx.sreg.clock" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.clock64" => "__nvvm_read_ptx_sreg_",
     "llvm.nvvm.read.ptx.sreg.ctaid.x" => "__nvvm_read_ptx_sreg_ctaid_x",
     "llvm.nvvm.read.ptx.sreg.ctaid.y" => "__nvvm_read_ptx_sreg_ctaid_y",
     "llvm.nvvm.read.ptx.sreg.ctaid.z" => "__nvvm_read_ptx_sreg_ctaid_z",
@@ -2015,16 +2543,32 @@ match name {
     "llvm.nvvm.read.ptx.sreg.envreg7" => "__nvvm_read_ptx_sreg_envreg7",
     "llvm.nvvm.read.ptx.sreg.envreg8" => "__nvvm_read_ptx_sreg_envreg8",
     "llvm.nvvm.read.ptx.sreg.envreg9" => "__nvvm_read_ptx_sreg_envreg9",
+    "llvm.nvvm.read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.lanemask.eq" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.lanemask.ge" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.lanemask.gt" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.lanemask.le" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.lanemask.lt" => "__nvvm_read_ptx_sreg_",
     "llvm.nvvm.read.ptx.sreg.nctaid.x" => "__nvvm_read_ptx_sreg_nctaid_x",
     "llvm.nvvm.read.ptx.sreg.nctaid.y" => "__nvvm_read_ptx_sreg_nctaid_y",
     "llvm.nvvm.read.ptx.sreg.nctaid.z" => "__nvvm_read_ptx_sreg_nctaid_z",
+    "llvm.nvvm.read.ptx.sreg.nsmid" => "__nvvm_read_ptx_sreg_",
     "llvm.nvvm.read.ptx.sreg.ntid.x" => "__nvvm_read_ptx_sreg_ntid_x",
     "llvm.nvvm.read.ptx.sreg.ntid.y" => "__nvvm_read_ptx_sreg_ntid_y",
     "llvm.nvvm.read.ptx.sreg.ntid.z" => "__nvvm_read_ptx_sreg_ntid_z",
+    "llvm.nvvm.read.ptx.sreg.nwarpid" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.pm0" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.pm1" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.pm2" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.pm3" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.smid" => "__nvvm_read_ptx_sreg_",
     "llvm.nvvm.read.ptx.sreg.tid.x" => "__nvvm_read_ptx_sreg_tid_x",
     "llvm.nvvm.read.ptx.sreg.tid.y" => "__nvvm_read_ptx_sreg_tid_y",
     "llvm.nvvm.read.ptx.sreg.tid.z" => "__nvvm_read_ptx_sreg_tid_z",
+    "llvm.nvvm.read.ptx.sreg.warpid" => "__nvvm_read_ptx_sreg_",
     "llvm.nvvm.read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_warpsize",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_",
     "llvm.nvvm.rotate.b32" => "__nvvm_rotate_b32",
     "llvm.nvvm.rotate.b64" => "__nvvm_rotate_b64",
     "llvm.nvvm.rotate.right.b64" => "__nvvm_rotate_right_b64",
@@ -2039,6 +2583,14 @@ match name {
     "llvm.nvvm.saturate.d" => "__nvvm_saturate_d",
     "llvm.nvvm.saturate.f" => "__nvvm_saturate_f",
     "llvm.nvvm.saturate.ftz.f" => "__nvvm_saturate_ftz_f",
+    "llvm.nvvm.shfl.bfly.f32" => "__nvvm_shfl_bfly_f32",
+    "llvm.nvvm.shfl.bfly.i32" => "__nvvm_shfl_bfly_i32",
+    "llvm.nvvm.shfl.down.f32" => "__nvvm_shfl_down_f32",
+    "llvm.nvvm.shfl.down.i32" => "__nvvm_shfl_down_i32",
+    "llvm.nvvm.shfl.idx.f32" => "__nvvm_shfl_idx_f32",
+    "llvm.nvvm.shfl.idx.i32" => "__nvvm_shfl_idx_i32",
+    "llvm.nvvm.shfl.up.f32" => "__nvvm_shfl_up_f32",
+    "llvm.nvvm.shfl.up.i32" => "__nvvm_shfl_up_i32",
     "llvm.nvvm.sin.approx.f" => "__nvvm_sin_approx_f",
     "llvm.nvvm.sin.approx.ftz.f" => "__nvvm_sin_approx_ftz_f",
     "llvm.nvvm.sqrt.approx.f" => "__nvvm_sqrt_approx_f",
@@ -2303,8 +2855,16 @@ match name {
     // ppc
     "llvm.ppc.addex" => "__builtin_ppc_addex",
     "llvm.ppc.addf128.round.to.odd" => "__builtin_addf128_round_to_odd",
+    "llvm.ppc.altivec.crypto.vcipher" => "__builtin_altivec_crypto_vcipher",
+    "llvm.ppc.altivec.crypto.vcipherlast" => "__builtin_altivec_crypto_vcipherlast",
+    "llvm.ppc.altivec.crypto.vncipher" => "__builtin_altivec_crypto_vncipher",
+    "llvm.ppc.altivec.crypto.vncipherlast" => "__builtin_altivec_crypto_vncipherlast",
     "llvm.ppc.altivec.crypto.vpermxor" => "__builtin_altivec_crypto_vpermxor",
     "llvm.ppc.altivec.crypto.vpermxor.be" => "__builtin_altivec_crypto_vpermxor_be",
+    "llvm.ppc.altivec.crypto.vpmsumb" => "__builtin_altivec_crypto_vpmsumb",
+    "llvm.ppc.altivec.crypto.vpmsumd" => "__builtin_altivec_crypto_vpmsumd",
+    "llvm.ppc.altivec.crypto.vpmsumh" => "__builtin_altivec_crypto_vpmsumh",
+    "llvm.ppc.altivec.crypto.vpmsumw" => "__builtin_altivec_crypto_vpmsumw",
     "llvm.ppc.altivec.crypto.vsbox" => "__builtin_altivec_crypto_vsbox",
     "llvm.ppc.altivec.crypto.vshasigmad" => "__builtin_altivec_crypto_vshasigmad",
     "llvm.ppc.altivec.crypto.vshasigmaw" => "__builtin_altivec_crypto_vshasigmaw",
@@ -2448,18 +3008,22 @@ match name {
     "llvm.ppc.altivec.vmaddfp" => "__builtin_altivec_vmaddfp",
     "llvm.ppc.altivec.vmaxfp" => "__builtin_altivec_vmaxfp",
     "llvm.ppc.altivec.vmaxsb" => "__builtin_altivec_vmaxsb",
+    "llvm.ppc.altivec.vmaxsd" => "__builtin_altivec_vmaxsd",
     "llvm.ppc.altivec.vmaxsh" => "__builtin_altivec_vmaxsh",
     "llvm.ppc.altivec.vmaxsw" => "__builtin_altivec_vmaxsw",
     "llvm.ppc.altivec.vmaxub" => "__builtin_altivec_vmaxub",
+    "llvm.ppc.altivec.vmaxud" => "__builtin_altivec_vmaxud",
     "llvm.ppc.altivec.vmaxuh" => "__builtin_altivec_vmaxuh",
     "llvm.ppc.altivec.vmaxuw" => "__builtin_altivec_vmaxuw",
     "llvm.ppc.altivec.vmhaddshs" => "__builtin_altivec_vmhaddshs",
     "llvm.ppc.altivec.vmhraddshs" => "__builtin_altivec_vmhraddshs",
     "llvm.ppc.altivec.vminfp" => "__builtin_altivec_vminfp",
     "llvm.ppc.altivec.vminsb" => "__builtin_altivec_vminsb",
+    "llvm.ppc.altivec.vminsd" => "__builtin_altivec_vminsd",
     "llvm.ppc.altivec.vminsh" => "__builtin_altivec_vminsh",
     "llvm.ppc.altivec.vminsw" => "__builtin_altivec_vminsw",
     "llvm.ppc.altivec.vminub" => "__builtin_altivec_vminub",
+    "llvm.ppc.altivec.vminud" => "__builtin_altivec_vminud",
     "llvm.ppc.altivec.vminuh" => "__builtin_altivec_vminuh",
     "llvm.ppc.altivec.vminuw" => "__builtin_altivec_vminuw",
     "llvm.ppc.altivec.vmladduhm" => "__builtin_altivec_vmladduhm",
@@ -2506,6 +3070,7 @@ match name {
     "llvm.ppc.altivec.vrfip" => "__builtin_altivec_vrfip",
     "llvm.ppc.altivec.vrfiz" => "__builtin_altivec_vrfiz",
     "llvm.ppc.altivec.vrlb" => "__builtin_altivec_vrlb",
+    "llvm.ppc.altivec.vrld" => "__builtin_altivec_vrld",
     "llvm.ppc.altivec.vrlh" => "__builtin_altivec_vrlh",
     "llvm.ppc.altivec.vrlw" => "__builtin_altivec_vrlw",
     "llvm.ppc.altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
@@ -2638,6 +3203,89 @@ match name {
     "llvm.ppc.pack.longdouble" => "__builtin_pack_longdouble",
     "llvm.ppc.pdepd" => "__builtin_pdepd",
     "llvm.ppc.pextd" => "__builtin_pextd",
+    "llvm.ppc.qpx.qvfabs" => "__builtin_qpx_qvfabs",
+    "llvm.ppc.qpx.qvfadd" => "__builtin_qpx_qvfadd",
+    "llvm.ppc.qpx.qvfadds" => "__builtin_qpx_qvfadds",
+    "llvm.ppc.qpx.qvfcfid" => "__builtin_qpx_qvfcfid",
+    "llvm.ppc.qpx.qvfcfids" => "__builtin_qpx_qvfcfids",
+    "llvm.ppc.qpx.qvfcfidu" => "__builtin_qpx_qvfcfidu",
+    "llvm.ppc.qpx.qvfcfidus" => "__builtin_qpx_qvfcfidus",
+    "llvm.ppc.qpx.qvfcmpeq" => "__builtin_qpx_qvfcmpeq",
+    "llvm.ppc.qpx.qvfcmpgt" => "__builtin_qpx_qvfcmpgt",
+    "llvm.ppc.qpx.qvfcmplt" => "__builtin_qpx_qvfcmplt",
+    "llvm.ppc.qpx.qvfcpsgn" => "__builtin_qpx_qvfcpsgn",
+    "llvm.ppc.qpx.qvfctid" => "__builtin_qpx_qvfctid",
+    "llvm.ppc.qpx.qvfctidu" => "__builtin_qpx_qvfctidu",
+    "llvm.ppc.qpx.qvfctiduz" => "__builtin_qpx_qvfctiduz",
+    "llvm.ppc.qpx.qvfctidz" => "__builtin_qpx_qvfctidz",
+    "llvm.ppc.qpx.qvfctiw" => "__builtin_qpx_qvfctiw",
+    "llvm.ppc.qpx.qvfctiwu" => "__builtin_qpx_qvfctiwu",
+    "llvm.ppc.qpx.qvfctiwuz" => "__builtin_qpx_qvfctiwuz",
+    "llvm.ppc.qpx.qvfctiwz" => "__builtin_qpx_qvfctiwz",
+    "llvm.ppc.qpx.qvflogical" => "__builtin_qpx_qvflogical",
+    "llvm.ppc.qpx.qvfmadd" => "__builtin_qpx_qvfmadd",
+    "llvm.ppc.qpx.qvfmadds" => "__builtin_qpx_qvfmadds",
+    "llvm.ppc.qpx.qvfmsub" => "__builtin_qpx_qvfmsub",
+    "llvm.ppc.qpx.qvfmsubs" => "__builtin_qpx_qvfmsubs",
+    "llvm.ppc.qpx.qvfmul" => "__builtin_qpx_qvfmul",
+    "llvm.ppc.qpx.qvfmuls" => "__builtin_qpx_qvfmuls",
+    "llvm.ppc.qpx.qvfnabs" => "__builtin_qpx_qvfnabs",
+    "llvm.ppc.qpx.qvfneg" => "__builtin_qpx_qvfneg",
+    "llvm.ppc.qpx.qvfnmadd" => "__builtin_qpx_qvfnmadd",
+    "llvm.ppc.qpx.qvfnmadds" => "__builtin_qpx_qvfnmadds",
+    "llvm.ppc.qpx.qvfnmsub" => "__builtin_qpx_qvfnmsub",
+    "llvm.ppc.qpx.qvfnmsubs" => "__builtin_qpx_qvfnmsubs",
+    "llvm.ppc.qpx.qvfperm" => "__builtin_qpx_qvfperm",
+    "llvm.ppc.qpx.qvfre" => "__builtin_qpx_qvfre",
+    "llvm.ppc.qpx.qvfres" => "__builtin_qpx_qvfres",
+    "llvm.ppc.qpx.qvfrim" => "__builtin_qpx_qvfrim",
+    "llvm.ppc.qpx.qvfrin" => "__builtin_qpx_qvfrin",
+    "llvm.ppc.qpx.qvfrip" => "__builtin_qpx_qvfrip",
+    "llvm.ppc.qpx.qvfriz" => "__builtin_qpx_qvfriz",
+    "llvm.ppc.qpx.qvfrsp" => "__builtin_qpx_qvfrsp",
+    "llvm.ppc.qpx.qvfrsqrte" => "__builtin_qpx_qvfrsqrte",
+    "llvm.ppc.qpx.qvfrsqrtes" => "__builtin_qpx_qvfrsqrtes",
+    "llvm.ppc.qpx.qvfsel" => "__builtin_qpx_qvfsel",
+    "llvm.ppc.qpx.qvfsub" => "__builtin_qpx_qvfsub",
+    "llvm.ppc.qpx.qvfsubs" => "__builtin_qpx_qvfsubs",
+    "llvm.ppc.qpx.qvftstnan" => "__builtin_qpx_qvftstnan",
+    "llvm.ppc.qpx.qvfxmadd" => "__builtin_qpx_qvfxmadd",
+    "llvm.ppc.qpx.qvfxmadds" => "__builtin_qpx_qvfxmadds",
+    "llvm.ppc.qpx.qvfxmul" => "__builtin_qpx_qvfxmul",
+    "llvm.ppc.qpx.qvfxmuls" => "__builtin_qpx_qvfxmuls",
+    "llvm.ppc.qpx.qvfxxcpnmadd" => "__builtin_qpx_qvfxxcpnmadd",
+    "llvm.ppc.qpx.qvfxxcpnmadds" => "__builtin_qpx_qvfxxcpnmadds",
+    "llvm.ppc.qpx.qvfxxmadd" => "__builtin_qpx_qvfxxmadd",
+    "llvm.ppc.qpx.qvfxxmadds" => "__builtin_qpx_qvfxxmadds",
+    "llvm.ppc.qpx.qvfxxnpmadd" => "__builtin_qpx_qvfxxnpmadd",
+    "llvm.ppc.qpx.qvfxxnpmadds" => "__builtin_qpx_qvfxxnpmadds",
+    "llvm.ppc.qpx.qvgpci" => "__builtin_qpx_qvgpci",
+    "llvm.ppc.qpx.qvlfcd" => "__builtin_qpx_qvlfcd",
+    "llvm.ppc.qpx.qvlfcda" => "__builtin_qpx_qvlfcda",
+    "llvm.ppc.qpx.qvlfcs" => "__builtin_qpx_qvlfcs",
+    "llvm.ppc.qpx.qvlfcsa" => "__builtin_qpx_qvlfcsa",
+    "llvm.ppc.qpx.qvlfd" => "__builtin_qpx_qvlfd",
+    "llvm.ppc.qpx.qvlfda" => "__builtin_qpx_qvlfda",
+    "llvm.ppc.qpx.qvlfiwa" => "__builtin_qpx_qvlfiwa",
+    "llvm.ppc.qpx.qvlfiwaa" => "__builtin_qpx_qvlfiwaa",
+    "llvm.ppc.qpx.qvlfiwz" => "__builtin_qpx_qvlfiwz",
+    "llvm.ppc.qpx.qvlfiwza" => "__builtin_qpx_qvlfiwza",
+    "llvm.ppc.qpx.qvlfs" => "__builtin_qpx_qvlfs",
+    "llvm.ppc.qpx.qvlfsa" => "__builtin_qpx_qvlfsa",
+    "llvm.ppc.qpx.qvlpcld" => "__builtin_qpx_qvlpcld",
+    "llvm.ppc.qpx.qvlpcls" => "__builtin_qpx_qvlpcls",
+    "llvm.ppc.qpx.qvlpcrd" => "__builtin_qpx_qvlpcrd",
+    "llvm.ppc.qpx.qvlpcrs" => "__builtin_qpx_qvlpcrs",
+    "llvm.ppc.qpx.qvstfcd" => "__builtin_qpx_qvstfcd",
+    "llvm.ppc.qpx.qvstfcda" => "__builtin_qpx_qvstfcda",
+    "llvm.ppc.qpx.qvstfcs" => "__builtin_qpx_qvstfcs",
+    "llvm.ppc.qpx.qvstfcsa" => "__builtin_qpx_qvstfcsa",
+    "llvm.ppc.qpx.qvstfd" => "__builtin_qpx_qvstfd",
+    "llvm.ppc.qpx.qvstfda" => "__builtin_qpx_qvstfda",
+    "llvm.ppc.qpx.qvstfiw" => "__builtin_qpx_qvstfiw",
+    "llvm.ppc.qpx.qvstfiwa" => "__builtin_qpx_qvstfiwa",
+    "llvm.ppc.qpx.qvstfs" => "__builtin_qpx_qvstfs",
+    "llvm.ppc.qpx.qvstfsa" => "__builtin_qpx_qvstfsa",
     "llvm.ppc.readflm" => "__builtin_readflm",
     "llvm.ppc.scalar.extract.expq" => "__builtin_vsx_scalar_extract_expq",
     "llvm.ppc.scalar.insert.exp.qp" => "__builtin_vsx_scalar_insert_exp_qp",
@@ -2679,12 +3327,26 @@ match name {
     "llvm.ppc.ttest" => "__builtin_ttest",
     "llvm.ppc.tw" => "__builtin_ppc_tw",
     "llvm.ppc.unpack.longdouble" => "__builtin_unpack_longdouble",
+    "llvm.ppc.vsx.xsmaxdp" => "__builtin_vsx_xsmaxdp",
+    "llvm.ppc.vsx.xsmindp" => "__builtin_vsx_xsmindp",
+    "llvm.ppc.vsx.xvcmpeqdp" => "__builtin_vsx_xvcmpeqdp",
     "llvm.ppc.vsx.xvcmpeqdp.p" => "__builtin_vsx_xvcmpeqdp_p",
+    "llvm.ppc.vsx.xvcmpeqsp" => "__builtin_vsx_xvcmpeqsp",
     "llvm.ppc.vsx.xvcmpeqsp.p" => "__builtin_vsx_xvcmpeqsp_p",
+    "llvm.ppc.vsx.xvcmpgedp" => "__builtin_vsx_xvcmpgedp",
     "llvm.ppc.vsx.xvcmpgedp.p" => "__builtin_vsx_xvcmpgedp_p",
+    "llvm.ppc.vsx.xvcmpgesp" => "__builtin_vsx_xvcmpgesp",
     "llvm.ppc.vsx.xvcmpgesp.p" => "__builtin_vsx_xvcmpgesp_p",
+    "llvm.ppc.vsx.xvcmpgtdp" => "__builtin_vsx_xvcmpgtdp",
     "llvm.ppc.vsx.xvcmpgtdp.p" => "__builtin_vsx_xvcmpgtdp_p",
+    "llvm.ppc.vsx.xvcmpgtsp" => "__builtin_vsx_xvcmpgtsp",
     "llvm.ppc.vsx.xvcmpgtsp.p" => "__builtin_vsx_xvcmpgtsp_p",
+    "llvm.ppc.vsx.xvdivdp" => "__builtin_vsx_xvdivdp",
+    "llvm.ppc.vsx.xvdivsp" => "__builtin_vsx_xvdivsp",
+    "llvm.ppc.vsx.xvmaxdp" => "__builtin_vsx_xvmaxdp",
+    "llvm.ppc.vsx.xvmaxsp" => "__builtin_vsx_xvmaxsp",
+    "llvm.ppc.vsx.xvmindp" => "__builtin_vsx_xvmindp",
+    "llvm.ppc.vsx.xvminsp" => "__builtin_vsx_xvminsp",
     "llvm.ppc.vsx.xvredp" => "__builtin_vsx_xvredp",
     "llvm.ppc.vsx.xvresp" => "__builtin_vsx_xvresp",
     "llvm.ppc.vsx.xvrsqrtedp" => "__builtin_vsx_xvrsqrtedp",
@@ -2693,6 +3355,7 @@ match name {
     "llvm.ppc.vsx.xxblendvd" => "__builtin_vsx_xxblendvd",
     "llvm.ppc.vsx.xxblendvh" => "__builtin_vsx_xxblendvh",
     "llvm.ppc.vsx.xxblendvw" => "__builtin_vsx_xxblendvw",
+    "llvm.ppc.vsx.xxleqv" => "__builtin_vsx_xxleqv",
     "llvm.ppc.vsx.xxpermx" => "__builtin_vsx_xxpermx",
     // ptx
     "llvm.ptx.bar.sync" => "__builtin_ptx_bar_sync",
@@ -3012,8 +3675,30 @@ match name {
     "llvm.x86.avx512.conflict.q.128" => "__builtin_ia32_vpconflictdi_128",
     "llvm.x86.avx512.conflict.q.256" => "__builtin_ia32_vpconflictdi_256",
     "llvm.x86.avx512.conflict.q.512" => "__builtin_ia32_vpconflictdi_512",
+    "llvm.x86.avx512.cvtb2mask.128" => "__builtin_ia32_cvtb2mask128",
+    "llvm.x86.avx512.cvtb2mask.256" => "__builtin_ia32_cvtb2mask256",
+    "llvm.x86.avx512.cvtb2mask.512" => "__builtin_ia32_cvtb2mask512",
+    "llvm.x86.avx512.cvtd2mask.128" => "__builtin_ia32_cvtd2mask128",
+    "llvm.x86.avx512.cvtd2mask.256" => "__builtin_ia32_cvtd2mask256",
+    "llvm.x86.avx512.cvtd2mask.512" => "__builtin_ia32_cvtd2mask512",
+    "llvm.x86.avx512.cvtmask2b.128" => "__builtin_ia32_cvtmask2b128",
+    "llvm.x86.avx512.cvtmask2b.256" => "__builtin_ia32_cvtmask2b256",
+    "llvm.x86.avx512.cvtmask2b.512" => "__builtin_ia32_cvtmask2b512",
+    "llvm.x86.avx512.cvtmask2d.128" => "__builtin_ia32_cvtmask2d128",
+    "llvm.x86.avx512.cvtmask2d.256" => "__builtin_ia32_cvtmask2d256",
+    "llvm.x86.avx512.cvtmask2d.512" => "__builtin_ia32_cvtmask2d512",
+    "llvm.x86.avx512.cvtmask2q.128" => "__builtin_ia32_cvtmask2q128",
+    "llvm.x86.avx512.cvtmask2q.256" => "__builtin_ia32_cvtmask2q256",
+    "llvm.x86.avx512.cvtmask2q.512" => "__builtin_ia32_cvtmask2q512",
+    "llvm.x86.avx512.cvtmask2w.128" => "__builtin_ia32_cvtmask2w128",
+    "llvm.x86.avx512.cvtmask2w.256" => "__builtin_ia32_cvtmask2w256",
+    "llvm.x86.avx512.cvtmask2w.512" => "__builtin_ia32_cvtmask2w512",
+    "llvm.x86.avx512.cvtq2mask.128" => "__builtin_ia32_cvtq2mask128",
+    "llvm.x86.avx512.cvtq2mask.256" => "__builtin_ia32_cvtq2mask256",
+    "llvm.x86.avx512.cvtq2mask.512" => "__builtin_ia32_cvtq2mask512",
     "llvm.x86.avx512.cvtsd2usi" => "__builtin_ia32_cvtsd2usi",
     "llvm.x86.avx512.cvtsd2usi64" => "__builtin_ia32_cvtsd2usi64",
+    "llvm.x86.avx512.cvtsi2sd32" => "__builtin_ia32_cvtsi2sd32",
     "llvm.x86.avx512.cvtsi2sd64" => "__builtin_ia32_cvtsi2sd64",
     "llvm.x86.avx512.cvtsi2ss32" => "__builtin_ia32_cvtsi2ss32",
     "llvm.x86.avx512.cvtsi2ss64" => "__builtin_ia32_cvtsi2ss64",
@@ -3032,12 +3717,16 @@ match name {
     "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_vcvttss2usi64",
     // [DUPLICATE]: "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_cvttss2usi64",
     "llvm.x86.avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd",
+    // [DUPLICATE]: "llvm.x86.avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd32",
     "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss32",
     // [DUPLICATE]: "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss",
     "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi2sd64",
     // [DUPLICATE]: "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi642sd",
     "llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi2ss64",
     // [DUPLICATE]: "llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi642ss",
+    "llvm.x86.avx512.cvtw2mask.128" => "__builtin_ia32_cvtw2mask128",
+    "llvm.x86.avx512.cvtw2mask.256" => "__builtin_ia32_cvtw2mask256",
+    "llvm.x86.avx512.cvtw2mask.512" => "__builtin_ia32_cvtw2mask512",
     "llvm.x86.avx512.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128",
     "llvm.x86.avx512.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256",
     "llvm.x86.avx512.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512",
@@ -3053,6 +3742,22 @@ match name {
     "llvm.x86.avx512.gather.qpi.512" => "__builtin_ia32_gatherdiv16si",
     "llvm.x86.avx512.gather.qpq.512" => "__builtin_ia32_gatherdiv8di",
     "llvm.x86.avx512.gather.qps.512" => "__builtin_ia32_gatherdiv16sf",
+    "llvm.x86.avx512.gather3div2.df" => "__builtin_ia32_gather3div2df",
+    "llvm.x86.avx512.gather3div2.di" => "__builtin_ia32_gather3div2di",
+    "llvm.x86.avx512.gather3div4.df" => "__builtin_ia32_gather3div4df",
+    "llvm.x86.avx512.gather3div4.di" => "__builtin_ia32_gather3div4di",
+    "llvm.x86.avx512.gather3div4.sf" => "__builtin_ia32_gather3div4sf",
+    "llvm.x86.avx512.gather3div4.si" => "__builtin_ia32_gather3div4si",
+    "llvm.x86.avx512.gather3div8.sf" => "__builtin_ia32_gather3div8sf",
+    "llvm.x86.avx512.gather3div8.si" => "__builtin_ia32_gather3div8si",
+    "llvm.x86.avx512.gather3siv2.df" => "__builtin_ia32_gather3siv2df",
+    "llvm.x86.avx512.gather3siv2.di" => "__builtin_ia32_gather3siv2di",
+    "llvm.x86.avx512.gather3siv4.df" => "__builtin_ia32_gather3siv4df",
+    "llvm.x86.avx512.gather3siv4.di" => "__builtin_ia32_gather3siv4di",
+    "llvm.x86.avx512.gather3siv4.sf" => "__builtin_ia32_gather3siv4sf",
+    "llvm.x86.avx512.gather3siv4.si" => "__builtin_ia32_gather3siv4si",
+    "llvm.x86.avx512.gather3siv8.sf" => "__builtin_ia32_gather3siv8sf",
+    "llvm.x86.avx512.gather3siv8.si" => "__builtin_ia32_gather3siv8si",
     "llvm.x86.avx512.gatherpf.dpd.512" => "__builtin_ia32_gatherpfdpd",
     "llvm.x86.avx512.gatherpf.dps.512" => "__builtin_ia32_gatherpfdps",
     "llvm.x86.avx512.gatherpf.qpd.512" => "__builtin_ia32_gatherpfqpd",
@@ -3064,25 +3769,100 @@ match name {
     "llvm.x86.avx512.kortestc.w" => "__builtin_ia32_kortestchi",
     "llvm.x86.avx512.kortestz.w" => "__builtin_ia32_kortestzhi",
     "llvm.x86.avx512.kunpck.bw" => "__builtin_ia32_kunpckhi",
+    "llvm.x86.avx512.kunpck.dq" => "__builtin_ia32_kunpckdi",
+    "llvm.x86.avx512.kunpck.wd" => "__builtin_ia32_kunpcksi",
     "llvm.x86.avx512.kxnor.w" => "__builtin_ia32_kxnorhi",
     "llvm.x86.avx512.kxor.w" => "__builtin_ia32_kxorhi",
+    "llvm.x86.avx512.mask.add.pd.128" => "__builtin_ia32_addpd128_mask",
+    "llvm.x86.avx512.mask.add.pd.256" => "__builtin_ia32_addpd256_mask",
+    "llvm.x86.avx512.mask.add.pd.512" => "__builtin_ia32_addpd512_mask",
+    "llvm.x86.avx512.mask.add.ps.128" => "__builtin_ia32_addps128_mask",
+    "llvm.x86.avx512.mask.add.ps.256" => "__builtin_ia32_addps256_mask",
+    "llvm.x86.avx512.mask.add.ps.512" => "__builtin_ia32_addps512_mask",
     "llvm.x86.avx512.mask.add.sd.round" => "__builtin_ia32_addsd_round_mask",
     "llvm.x86.avx512.mask.add.ss.round" => "__builtin_ia32_addss_round_mask",
+    "llvm.x86.avx512.mask.and.pd.128" => "__builtin_ia32_andpd128_mask",
+    "llvm.x86.avx512.mask.and.pd.256" => "__builtin_ia32_andpd256_mask",
+    "llvm.x86.avx512.mask.and.pd.512" => "__builtin_ia32_andpd512_mask",
+    "llvm.x86.avx512.mask.and.ps.128" => "__builtin_ia32_andps128_mask",
+    "llvm.x86.avx512.mask.and.ps.256" => "__builtin_ia32_andps256_mask",
+    "llvm.x86.avx512.mask.and.ps.512" => "__builtin_ia32_andps512_mask",
+    "llvm.x86.avx512.mask.andn.pd.128" => "__builtin_ia32_andnpd128_mask",
+    "llvm.x86.avx512.mask.andn.pd.256" => "__builtin_ia32_andnpd256_mask",
+    "llvm.x86.avx512.mask.andn.pd.512" => "__builtin_ia32_andnpd512_mask",
+    "llvm.x86.avx512.mask.andn.ps.128" => "__builtin_ia32_andnps128_mask",
+    "llvm.x86.avx512.mask.andn.ps.256" => "__builtin_ia32_andnps256_mask",
+    "llvm.x86.avx512.mask.andn.ps.512" => "__builtin_ia32_andnps512_mask",
     "llvm.x86.avx512.mask.blend.d.512" => "__builtin_ia32_blendmd_512_mask",
     "llvm.x86.avx512.mask.blend.pd.512" => "__builtin_ia32_blendmpd_512_mask",
     "llvm.x86.avx512.mask.blend.ps.512" => "__builtin_ia32_blendmps_512_mask",
     "llvm.x86.avx512.mask.blend.q.512" => "__builtin_ia32_blendmq_512_mask",
+    "llvm.x86.avx512.mask.broadcastf32x2.256" => "__builtin_ia32_broadcastf32x2_256_mask",
+    "llvm.x86.avx512.mask.broadcastf32x2.512" => "__builtin_ia32_broadcastf32x2_512_mask",
+    "llvm.x86.avx512.mask.broadcastf32x4.256" => "__builtin_ia32_broadcastf32x4_256_mask",
+    "llvm.x86.avx512.mask.broadcastf32x4.512" => "__builtin_ia32_broadcastf32x4_512",
+    "llvm.x86.avx512.mask.broadcastf32x8.512" => "__builtin_ia32_broadcastf32x8_512_mask",
+    "llvm.x86.avx512.mask.broadcastf64x2.256" => "__builtin_ia32_broadcastf64x2_256_mask",
+    "llvm.x86.avx512.mask.broadcastf64x2.512" => "__builtin_ia32_broadcastf64x2_512_mask",
+    "llvm.x86.avx512.mask.broadcastf64x4.512" => "__builtin_ia32_broadcastf64x4_512",
+    "llvm.x86.avx512.mask.broadcasti32x2.128" => "__builtin_ia32_broadcasti32x2_128_mask",
+    "llvm.x86.avx512.mask.broadcasti32x2.256" => "__builtin_ia32_broadcasti32x2_256_mask",
+    "llvm.x86.avx512.mask.broadcasti32x2.512" => "__builtin_ia32_broadcasti32x2_512_mask",
+    "llvm.x86.avx512.mask.broadcasti32x4.256" => "__builtin_ia32_broadcasti32x4_256_mask",
+    "llvm.x86.avx512.mask.broadcasti32x4.512" => "__builtin_ia32_broadcasti32x4_512",
+    "llvm.x86.avx512.mask.broadcasti32x8.512" => "__builtin_ia32_broadcasti32x8_512_mask",
+    "llvm.x86.avx512.mask.broadcasti64x2.256" => "__builtin_ia32_broadcasti64x2_256_mask",
+    "llvm.x86.avx512.mask.broadcasti64x2.512" => "__builtin_ia32_broadcasti64x2_512_mask",
+    "llvm.x86.avx512.mask.broadcasti64x4.512" => "__builtin_ia32_broadcasti64x4_512",
+    "llvm.x86.avx512.mask.cmp.pd.128" => "__builtin_ia32_cmppd128_mask",
+    "llvm.x86.avx512.mask.cmp.pd.256" => "__builtin_ia32_cmppd256_mask",
     "llvm.x86.avx512.mask.cmp.pd.512" => "__builtin_ia32_cmppd512_mask",
+    "llvm.x86.avx512.mask.cmp.ps.128" => "__builtin_ia32_cmpps128_mask",
+    "llvm.x86.avx512.mask.cmp.ps.256" => "__builtin_ia32_cmpps256_mask",
     "llvm.x86.avx512.mask.cmp.ps.512" => "__builtin_ia32_cmpps512_mask",
     "llvm.x86.avx512.mask.cmp.sd" => "__builtin_ia32_cmpsd_mask",
     "llvm.x86.avx512.mask.cmp.ss" => "__builtin_ia32_cmpss_mask",
+    "llvm.x86.avx512.mask.compress.d.128" => "__builtin_ia32_compresssi128_mask",
+    "llvm.x86.avx512.mask.compress.d.256" => "__builtin_ia32_compresssi256_mask",
+    "llvm.x86.avx512.mask.compress.d.512" => "__builtin_ia32_compresssi512_mask",
+    "llvm.x86.avx512.mask.compress.pd.128" => "__builtin_ia32_compressdf128_mask",
+    "llvm.x86.avx512.mask.compress.pd.256" => "__builtin_ia32_compressdf256_mask",
+    "llvm.x86.avx512.mask.compress.pd.512" => "__builtin_ia32_compressdf512_mask",
+    "llvm.x86.avx512.mask.compress.ps.128" => "__builtin_ia32_compresssf128_mask",
+    "llvm.x86.avx512.mask.compress.ps.256" => "__builtin_ia32_compresssf256_mask",
+    "llvm.x86.avx512.mask.compress.ps.512" => "__builtin_ia32_compresssf512_mask",
+    "llvm.x86.avx512.mask.compress.q.128" => "__builtin_ia32_compressdi128_mask",
+    "llvm.x86.avx512.mask.compress.q.256" => "__builtin_ia32_compressdi256_mask",
+    "llvm.x86.avx512.mask.compress.q.512" => "__builtin_ia32_compressdi512_mask",
+    "llvm.x86.avx512.mask.compress.store.d.128" => "__builtin_ia32_compressstoresi128_mask",
+    "llvm.x86.avx512.mask.compress.store.d.256" => "__builtin_ia32_compressstoresi256_mask",
+    "llvm.x86.avx512.mask.compress.store.d.512" => "__builtin_ia32_compressstoresi512_mask",
+    "llvm.x86.avx512.mask.compress.store.pd.128" => "__builtin_ia32_compressstoredf128_mask",
+    "llvm.x86.avx512.mask.compress.store.pd.256" => "__builtin_ia32_compressstoredf256_mask",
+    "llvm.x86.avx512.mask.compress.store.pd.512" => "__builtin_ia32_compressstoredf512_mask",
+    "llvm.x86.avx512.mask.compress.store.ps.128" => "__builtin_ia32_compressstoresf128_mask",
+    "llvm.x86.avx512.mask.compress.store.ps.256" => "__builtin_ia32_compressstoresf256_mask",
+    "llvm.x86.avx512.mask.compress.store.ps.512" => "__builtin_ia32_compressstoresf512_mask",
+    "llvm.x86.avx512.mask.compress.store.q.128" => "__builtin_ia32_compressstoredi128_mask",
+    "llvm.x86.avx512.mask.compress.store.q.256" => "__builtin_ia32_compressstoredi256_mask",
+    "llvm.x86.avx512.mask.compress.store.q.512" => "__builtin_ia32_compressstoredi512_mask",
+    "llvm.x86.avx512.mask.conflict.d.128" => "__builtin_ia32_vpconflictsi_128_mask",
+    "llvm.x86.avx512.mask.conflict.d.256" => "__builtin_ia32_vpconflictsi_256_mask",
     "llvm.x86.avx512.mask.conflict.d.512" => "__builtin_ia32_vpconflictsi_512_mask",
+    "llvm.x86.avx512.mask.conflict.q.128" => "__builtin_ia32_vpconflictdi_128_mask",
+    "llvm.x86.avx512.mask.conflict.q.256" => "__builtin_ia32_vpconflictdi_256_mask",
     "llvm.x86.avx512.mask.conflict.q.512" => "__builtin_ia32_vpconflictdi_512_mask",
+    "llvm.x86.avx512.mask.cvtdq2pd.128" => "__builtin_ia32_cvtdq2pd128_mask",
+    "llvm.x86.avx512.mask.cvtdq2pd.256" => "__builtin_ia32_cvtdq2pd256_mask",
     "llvm.x86.avx512.mask.cvtdq2pd.512" => "__builtin_ia32_cvtdq2pd512_mask",
+    "llvm.x86.avx512.mask.cvtdq2ps.128" => "__builtin_ia32_cvtdq2ps128_mask",
+    "llvm.x86.avx512.mask.cvtdq2ps.256" => "__builtin_ia32_cvtdq2ps256_mask",
     "llvm.x86.avx512.mask.cvtdq2ps.512" => "__builtin_ia32_cvtdq2ps512_mask",
     "llvm.x86.avx512.mask.cvtpd2dq.128" => "__builtin_ia32_cvtpd2dq128_mask",
+    "llvm.x86.avx512.mask.cvtpd2dq.256" => "__builtin_ia32_cvtpd2dq256_mask",
     "llvm.x86.avx512.mask.cvtpd2dq.512" => "__builtin_ia32_cvtpd2dq512_mask",
     "llvm.x86.avx512.mask.cvtpd2ps" => "__builtin_ia32_cvtpd2ps_mask",
+    "llvm.x86.avx512.mask.cvtpd2ps.256" => "__builtin_ia32_cvtpd2ps256_mask",
     "llvm.x86.avx512.mask.cvtpd2ps.512" => "__builtin_ia32_cvtpd2ps512_mask",
     "llvm.x86.avx512.mask.cvtpd2qq.128" => "__builtin_ia32_cvtpd2qq128_mask",
     "llvm.x86.avx512.mask.cvtpd2qq.256" => "__builtin_ia32_cvtpd2qq256_mask",
@@ -3096,6 +3876,8 @@ match name {
     "llvm.x86.avx512.mask.cvtps2dq.128" => "__builtin_ia32_cvtps2dq128_mask",
     "llvm.x86.avx512.mask.cvtps2dq.256" => "__builtin_ia32_cvtps2dq256_mask",
     "llvm.x86.avx512.mask.cvtps2dq.512" => "__builtin_ia32_cvtps2dq512_mask",
+    "llvm.x86.avx512.mask.cvtps2pd.128" => "__builtin_ia32_cvtps2pd128_mask",
+    "llvm.x86.avx512.mask.cvtps2pd.256" => "__builtin_ia32_cvtps2pd256_mask",
     "llvm.x86.avx512.mask.cvtps2pd.512" => "__builtin_ia32_cvtps2pd512_mask",
     "llvm.x86.avx512.mask.cvtps2qq.128" => "__builtin_ia32_cvtps2qq128_mask",
     "llvm.x86.avx512.mask.cvtps2qq.256" => "__builtin_ia32_cvtps2qq256_mask",
@@ -3106,10 +3888,16 @@ match name {
     "llvm.x86.avx512.mask.cvtps2uqq.128" => "__builtin_ia32_cvtps2uqq128_mask",
     "llvm.x86.avx512.mask.cvtps2uqq.256" => "__builtin_ia32_cvtps2uqq256_mask",
     "llvm.x86.avx512.mask.cvtps2uqq.512" => "__builtin_ia32_cvtps2uqq512_mask",
+    "llvm.x86.avx512.mask.cvtqq2pd.128" => "__builtin_ia32_cvtqq2pd128_mask",
+    "llvm.x86.avx512.mask.cvtqq2pd.256" => "__builtin_ia32_cvtqq2pd256_mask",
+    "llvm.x86.avx512.mask.cvtqq2pd.512" => "__builtin_ia32_cvtqq2pd512_mask",
     "llvm.x86.avx512.mask.cvtqq2ps.128" => "__builtin_ia32_cvtqq2ps128_mask",
+    "llvm.x86.avx512.mask.cvtqq2ps.256" => "__builtin_ia32_cvtqq2ps256_mask",
+    "llvm.x86.avx512.mask.cvtqq2ps.512" => "__builtin_ia32_cvtqq2ps512_mask",
     "llvm.x86.avx512.mask.cvtsd2ss.round" => "__builtin_ia32_cvtsd2ss_round_mask",
     "llvm.x86.avx512.mask.cvtss2sd.round" => "__builtin_ia32_cvtss2sd_round_mask",
     "llvm.x86.avx512.mask.cvttpd2dq.128" => "__builtin_ia32_cvttpd2dq128_mask",
+    "llvm.x86.avx512.mask.cvttpd2dq.256" => "__builtin_ia32_cvttpd2dq256_mask",
     "llvm.x86.avx512.mask.cvttpd2dq.512" => "__builtin_ia32_cvttpd2dq512_mask",
     "llvm.x86.avx512.mask.cvttpd2qq.128" => "__builtin_ia32_cvttpd2qq128_mask",
     "llvm.x86.avx512.mask.cvttpd2qq.256" => "__builtin_ia32_cvttpd2qq256_mask",
@@ -3120,6 +3908,8 @@ match name {
     "llvm.x86.avx512.mask.cvttpd2uqq.128" => "__builtin_ia32_cvttpd2uqq128_mask",
     "llvm.x86.avx512.mask.cvttpd2uqq.256" => "__builtin_ia32_cvttpd2uqq256_mask",
     "llvm.x86.avx512.mask.cvttpd2uqq.512" => "__builtin_ia32_cvttpd2uqq512_mask",
+    "llvm.x86.avx512.mask.cvttps2dq.128" => "__builtin_ia32_cvttps2dq128_mask",
+    "llvm.x86.avx512.mask.cvttps2dq.256" => "__builtin_ia32_cvttps2dq256_mask",
     "llvm.x86.avx512.mask.cvttps2dq.512" => "__builtin_ia32_cvttps2dq512_mask",
     "llvm.x86.avx512.mask.cvttps2qq.128" => "__builtin_ia32_cvttps2qq128_mask",
     "llvm.x86.avx512.mask.cvttps2qq.256" => "__builtin_ia32_cvttps2qq256_mask",
@@ -3130,11 +3920,53 @@ match name {
     "llvm.x86.avx512.mask.cvttps2uqq.128" => "__builtin_ia32_cvttps2uqq128_mask",
     "llvm.x86.avx512.mask.cvttps2uqq.256" => "__builtin_ia32_cvttps2uqq256_mask",
     "llvm.x86.avx512.mask.cvttps2uqq.512" => "__builtin_ia32_cvttps2uqq512_mask",
+    "llvm.x86.avx512.mask.cvtudq2pd.128" => "__builtin_ia32_cvtudq2pd128_mask",
+    "llvm.x86.avx512.mask.cvtudq2pd.256" => "__builtin_ia32_cvtudq2pd256_mask",
     "llvm.x86.avx512.mask.cvtudq2pd.512" => "__builtin_ia32_cvtudq2pd512_mask",
+    "llvm.x86.avx512.mask.cvtudq2ps.128" => "__builtin_ia32_cvtudq2ps128_mask",
+    "llvm.x86.avx512.mask.cvtudq2ps.256" => "__builtin_ia32_cvtudq2ps256_mask",
     "llvm.x86.avx512.mask.cvtudq2ps.512" => "__builtin_ia32_cvtudq2ps512_mask",
+    "llvm.x86.avx512.mask.cvtuqq2pd.128" => "__builtin_ia32_cvtuqq2pd128_mask",
+    "llvm.x86.avx512.mask.cvtuqq2pd.256" => "__builtin_ia32_cvtuqq2pd256_mask",
+    "llvm.x86.avx512.mask.cvtuqq2pd.512" => "__builtin_ia32_cvtuqq2pd512_mask",
     "llvm.x86.avx512.mask.cvtuqq2ps.128" => "__builtin_ia32_cvtuqq2ps128_mask",
+    "llvm.x86.avx512.mask.cvtuqq2ps.256" => "__builtin_ia32_cvtuqq2ps256_mask",
+    "llvm.x86.avx512.mask.cvtuqq2ps.512" => "__builtin_ia32_cvtuqq2ps512_mask",
+    "llvm.x86.avx512.mask.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128_mask",
+    "llvm.x86.avx512.mask.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256_mask",
+    "llvm.x86.avx512.mask.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512_mask",
+    "llvm.x86.avx512.mask.div.pd.128" => "__builtin_ia32_divpd_mask",
+    "llvm.x86.avx512.mask.div.pd.256" => "__builtin_ia32_divpd256_mask",
+    "llvm.x86.avx512.mask.div.pd.512" => "__builtin_ia32_divpd512_mask",
+    "llvm.x86.avx512.mask.div.ps.128" => "__builtin_ia32_divps_mask",
+    "llvm.x86.avx512.mask.div.ps.256" => "__builtin_ia32_divps256_mask",
+    "llvm.x86.avx512.mask.div.ps.512" => "__builtin_ia32_divps512_mask",
     "llvm.x86.avx512.mask.div.sd.round" => "__builtin_ia32_divsd_round_mask",
     "llvm.x86.avx512.mask.div.ss.round" => "__builtin_ia32_divss_round_mask",
+    "llvm.x86.avx512.mask.expand.d.128" => "__builtin_ia32_expandsi128_mask",
+    "llvm.x86.avx512.mask.expand.d.256" => "__builtin_ia32_expandsi256_mask",
+    "llvm.x86.avx512.mask.expand.d.512" => "__builtin_ia32_expandsi512_mask",
+    "llvm.x86.avx512.mask.expand.load.d.128" => "__builtin_ia32_expandloadsi128_mask",
+    "llvm.x86.avx512.mask.expand.load.d.256" => "__builtin_ia32_expandloadsi256_mask",
+    "llvm.x86.avx512.mask.expand.load.d.512" => "__builtin_ia32_expandloadsi512_mask",
+    "llvm.x86.avx512.mask.expand.load.pd.128" => "__builtin_ia32_expandloaddf128_mask",
+    "llvm.x86.avx512.mask.expand.load.pd.256" => "__builtin_ia32_expandloaddf256_mask",
+    "llvm.x86.avx512.mask.expand.load.pd.512" => "__builtin_ia32_expandloaddf512_mask",
+    "llvm.x86.avx512.mask.expand.load.ps.128" => "__builtin_ia32_expandloadsf128_mask",
+    "llvm.x86.avx512.mask.expand.load.ps.256" => "__builtin_ia32_expandloadsf256_mask",
+    "llvm.x86.avx512.mask.expand.load.ps.512" => "__builtin_ia32_expandloadsf512_mask",
+    "llvm.x86.avx512.mask.expand.load.q.128" => "__builtin_ia32_expandloaddi128_mask",
+    "llvm.x86.avx512.mask.expand.load.q.256" => "__builtin_ia32_expandloaddi256_mask",
+    "llvm.x86.avx512.mask.expand.load.q.512" => "__builtin_ia32_expandloaddi512_mask",
+    "llvm.x86.avx512.mask.expand.pd.128" => "__builtin_ia32_expanddf128_mask",
+    "llvm.x86.avx512.mask.expand.pd.256" => "__builtin_ia32_expanddf256_mask",
+    "llvm.x86.avx512.mask.expand.pd.512" => "__builtin_ia32_expanddf512_mask",
+    "llvm.x86.avx512.mask.expand.ps.128" => "__builtin_ia32_expandsf128_mask",
+    "llvm.x86.avx512.mask.expand.ps.256" => "__builtin_ia32_expandsf256_mask",
+    "llvm.x86.avx512.mask.expand.ps.512" => "__builtin_ia32_expandsf512_mask",
+    "llvm.x86.avx512.mask.expand.q.128" => "__builtin_ia32_expanddi128_mask",
+    "llvm.x86.avx512.mask.expand.q.256" => "__builtin_ia32_expanddi256_mask",
+    "llvm.x86.avx512.mask.expand.q.512" => "__builtin_ia32_expanddi512_mask",
     "llvm.x86.avx512.mask.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_mask",
     "llvm.x86.avx512.mask.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_mask",
     "llvm.x86.avx512.mask.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_mask",
@@ -3143,6 +3975,12 @@ match name {
     "llvm.x86.avx512.mask.fixupimm.ps.512" => "__builtin_ia32_fixupimmps512_mask",
     "llvm.x86.avx512.mask.fixupimm.sd" => "__builtin_ia32_fixupimmsd_mask",
     "llvm.x86.avx512.mask.fixupimm.ss" => "__builtin_ia32_fixupimmss_mask",
+    "llvm.x86.avx512.mask.fpclass.pd.128" => "__builtin_ia32_fpclasspd128_mask",
+    "llvm.x86.avx512.mask.fpclass.pd.256" => "__builtin_ia32_fpclasspd256_mask",
+    "llvm.x86.avx512.mask.fpclass.pd.512" => "__builtin_ia32_fpclasspd512_mask",
+    "llvm.x86.avx512.mask.fpclass.ps.128" => "__builtin_ia32_fpclassps128_mask",
+    "llvm.x86.avx512.mask.fpclass.ps.256" => "__builtin_ia32_fpclassps256_mask",
+    "llvm.x86.avx512.mask.fpclass.ps.512" => "__builtin_ia32_fpclassps512_mask",
     "llvm.x86.avx512.mask.fpclass.sd" => "__builtin_ia32_fpclasssd_mask",
     "llvm.x86.avx512.mask.fpclass.ss" => "__builtin_ia32_fpclassss_mask",
     "llvm.x86.avx512.mask.getexp.pd.128" => "__builtin_ia32_getexppd128_mask",
@@ -3161,29 +3999,125 @@ match name {
     "llvm.x86.avx512.mask.getmant.ps.512" => "__builtin_ia32_getmantps512_mask",
     "llvm.x86.avx512.mask.getmant.sd" => "__builtin_ia32_getmantsd_round_mask",
     "llvm.x86.avx512.mask.getmant.ss" => "__builtin_ia32_getmantss_round_mask",
+    "llvm.x86.avx512.mask.insertf32x4.256" => "__builtin_ia32_insertf32x4_256_mask",
+    "llvm.x86.avx512.mask.insertf32x4.512" => "__builtin_ia32_insertf32x4_mask",
+    "llvm.x86.avx512.mask.insertf32x8.512" => "__builtin_ia32_insertf32x8_mask",
+    "llvm.x86.avx512.mask.insertf64x2.256" => "__builtin_ia32_insertf64x2_256_mask",
+    "llvm.x86.avx512.mask.insertf64x2.512" => "__builtin_ia32_insertf64x2_512_mask",
+    "llvm.x86.avx512.mask.insertf64x4.512" => "__builtin_ia32_insertf64x4_mask",
+    "llvm.x86.avx512.mask.inserti32x4.256" => "__builtin_ia32_inserti32x4_256_mask",
+    "llvm.x86.avx512.mask.inserti32x4.512" => "__builtin_ia32_inserti32x4_mask",
+    "llvm.x86.avx512.mask.inserti32x8.512" => "__builtin_ia32_inserti32x8_mask",
+    "llvm.x86.avx512.mask.inserti64x2.256" => "__builtin_ia32_inserti64x2_256_mask",
+    "llvm.x86.avx512.mask.inserti64x2.512" => "__builtin_ia32_inserti64x2_512_mask",
+    "llvm.x86.avx512.mask.inserti64x4.512" => "__builtin_ia32_inserti64x4_mask",
     "llvm.x86.avx512.mask.loadu.d.512" => "__builtin_ia32_loaddqusi512_mask",
     "llvm.x86.avx512.mask.loadu.pd.512" => "__builtin_ia32_loadupd512_mask",
     "llvm.x86.avx512.mask.loadu.ps.512" => "__builtin_ia32_loadups512_mask",
     "llvm.x86.avx512.mask.loadu.q.512" => "__builtin_ia32_loaddqudi512_mask",
     "llvm.x86.avx512.mask.lzcnt.d.512" => "__builtin_ia32_vplzcntd_512_mask",
     "llvm.x86.avx512.mask.lzcnt.q.512" => "__builtin_ia32_vplzcntq_512_mask",
+    "llvm.x86.avx512.mask.max.pd.128" => "__builtin_ia32_maxpd_mask",
+    "llvm.x86.avx512.mask.max.pd.256" => "__builtin_ia32_maxpd256_mask",
     "llvm.x86.avx512.mask.max.pd.512" => "__builtin_ia32_maxpd512_mask",
+    "llvm.x86.avx512.mask.max.ps.128" => "__builtin_ia32_maxps_mask",
+    "llvm.x86.avx512.mask.max.ps.256" => "__builtin_ia32_maxps256_mask",
     "llvm.x86.avx512.mask.max.ps.512" => "__builtin_ia32_maxps512_mask",
     "llvm.x86.avx512.mask.max.sd.round" => "__builtin_ia32_maxsd_round_mask",
     "llvm.x86.avx512.mask.max.ss.round" => "__builtin_ia32_maxss_round_mask",
+    "llvm.x86.avx512.mask.min.pd.128" => "__builtin_ia32_minpd_mask",
+    "llvm.x86.avx512.mask.min.pd.256" => "__builtin_ia32_minpd256_mask",
     "llvm.x86.avx512.mask.min.pd.512" => "__builtin_ia32_minpd512_mask",
+    "llvm.x86.avx512.mask.min.ps.128" => "__builtin_ia32_minps_mask",
+    "llvm.x86.avx512.mask.min.ps.256" => "__builtin_ia32_minps256_mask",
     "llvm.x86.avx512.mask.min.ps.512" => "__builtin_ia32_minps512_mask",
     "llvm.x86.avx512.mask.min.sd.round" => "__builtin_ia32_minsd_round_mask",
     "llvm.x86.avx512.mask.min.ss.round" => "__builtin_ia32_minss_round_mask",
+    "llvm.x86.avx512.mask.move.sd" => "__builtin_ia32_movsd_mask",
+    "llvm.x86.avx512.mask.move.ss" => "__builtin_ia32_movss_mask",
+    "llvm.x86.avx512.mask.mul.pd.128" => "__builtin_ia32_mulpd_mask",
+    "llvm.x86.avx512.mask.mul.pd.256" => "__builtin_ia32_mulpd256_mask",
+    "llvm.x86.avx512.mask.mul.pd.512" => "__builtin_ia32_mulpd512_mask",
+    "llvm.x86.avx512.mask.mul.ps.128" => "__builtin_ia32_mulps_mask",
+    "llvm.x86.avx512.mask.mul.ps.256" => "__builtin_ia32_mulps256_mask",
+    "llvm.x86.avx512.mask.mul.ps.512" => "__builtin_ia32_mulps512_mask",
     "llvm.x86.avx512.mask.mul.sd.round" => "__builtin_ia32_mulsd_round_mask",
     "llvm.x86.avx512.mask.mul.ss.round" => "__builtin_ia32_mulss_round_mask",
+    "llvm.x86.avx512.mask.or.pd.128" => "__builtin_ia32_orpd128_mask",
+    "llvm.x86.avx512.mask.or.pd.256" => "__builtin_ia32_orpd256_mask",
+    "llvm.x86.avx512.mask.or.pd.512" => "__builtin_ia32_orpd512_mask",
+    "llvm.x86.avx512.mask.or.ps.128" => "__builtin_ia32_orps128_mask",
+    "llvm.x86.avx512.mask.or.ps.256" => "__builtin_ia32_orps256_mask",
+    "llvm.x86.avx512.mask.or.ps.512" => "__builtin_ia32_orps512_mask",
+    "llvm.x86.avx512.mask.pabs.b.128" => "__builtin_ia32_pabsb128_mask",
+    "llvm.x86.avx512.mask.pabs.b.256" => "__builtin_ia32_pabsb256_mask",
+    "llvm.x86.avx512.mask.pabs.b.512" => "__builtin_ia32_pabsb512_mask",
+    "llvm.x86.avx512.mask.pabs.d.128" => "__builtin_ia32_pabsd128_mask",
+    "llvm.x86.avx512.mask.pabs.d.256" => "__builtin_ia32_pabsd256_mask",
     "llvm.x86.avx512.mask.pabs.d.512" => "__builtin_ia32_pabsd512_mask",
+    "llvm.x86.avx512.mask.pabs.q.128" => "__builtin_ia32_pabsq128_mask",
+    "llvm.x86.avx512.mask.pabs.q.256" => "__builtin_ia32_pabsq256_mask",
     "llvm.x86.avx512.mask.pabs.q.512" => "__builtin_ia32_pabsq512_mask",
+    "llvm.x86.avx512.mask.pabs.w.128" => "__builtin_ia32_pabsw128_mask",
+    "llvm.x86.avx512.mask.pabs.w.256" => "__builtin_ia32_pabsw256_mask",
+    "llvm.x86.avx512.mask.pabs.w.512" => "__builtin_ia32_pabsw512_mask",
+    "llvm.x86.avx512.mask.packssdw.128" => "__builtin_ia32_packssdw128_mask",
+    "llvm.x86.avx512.mask.packssdw.256" => "__builtin_ia32_packssdw256_mask",
+    "llvm.x86.avx512.mask.packssdw.512" => "__builtin_ia32_packssdw512_mask",
+    "llvm.x86.avx512.mask.packsswb.128" => "__builtin_ia32_packsswb128_mask",
+    "llvm.x86.avx512.mask.packsswb.256" => "__builtin_ia32_packsswb256_mask",
+    "llvm.x86.avx512.mask.packsswb.512" => "__builtin_ia32_packsswb512_mask",
+    "llvm.x86.avx512.mask.packusdw.128" => "__builtin_ia32_packusdw128_mask",
+    "llvm.x86.avx512.mask.packusdw.256" => "__builtin_ia32_packusdw256_mask",
+    "llvm.x86.avx512.mask.packusdw.512" => "__builtin_ia32_packusdw512_mask",
+    "llvm.x86.avx512.mask.packuswb.128" => "__builtin_ia32_packuswb128_mask",
+    "llvm.x86.avx512.mask.packuswb.256" => "__builtin_ia32_packuswb256_mask",
+    "llvm.x86.avx512.mask.packuswb.512" => "__builtin_ia32_packuswb512_mask",
+    "llvm.x86.avx512.mask.padd.b.128" => "__builtin_ia32_paddb128_mask",
+    "llvm.x86.avx512.mask.padd.b.256" => "__builtin_ia32_paddb256_mask",
+    "llvm.x86.avx512.mask.padd.b.512" => "__builtin_ia32_paddb512_mask",
+    "llvm.x86.avx512.mask.padd.d.128" => "__builtin_ia32_paddd128_mask",
+    "llvm.x86.avx512.mask.padd.d.256" => "__builtin_ia32_paddd256_mask",
+    "llvm.x86.avx512.mask.padd.d.512" => "__builtin_ia32_paddd512_mask",
+    "llvm.x86.avx512.mask.padd.q.128" => "__builtin_ia32_paddq128_mask",
+    "llvm.x86.avx512.mask.padd.q.256" => "__builtin_ia32_paddq256_mask",
+    "llvm.x86.avx512.mask.padd.q.512" => "__builtin_ia32_paddq512_mask",
+    "llvm.x86.avx512.mask.padd.w.128" => "__builtin_ia32_paddw128_mask",
+    "llvm.x86.avx512.mask.padd.w.256" => "__builtin_ia32_paddw256_mask",
+    "llvm.x86.avx512.mask.padd.w.512" => "__builtin_ia32_paddw512_mask",
+    "llvm.x86.avx512.mask.padds.b.128" => "__builtin_ia32_paddsb128_mask",
+    "llvm.x86.avx512.mask.padds.b.256" => "__builtin_ia32_paddsb256_mask",
+    "llvm.x86.avx512.mask.padds.b.512" => "__builtin_ia32_paddsb512_mask",
+    "llvm.x86.avx512.mask.padds.w.128" => "__builtin_ia32_paddsw128_mask",
+    "llvm.x86.avx512.mask.padds.w.256" => "__builtin_ia32_paddsw256_mask",
+    "llvm.x86.avx512.mask.padds.w.512" => "__builtin_ia32_paddsw512_mask",
+    "llvm.x86.avx512.mask.paddus.b.128" => "__builtin_ia32_paddusb128_mask",
+    "llvm.x86.avx512.mask.paddus.b.256" => "__builtin_ia32_paddusb256_mask",
+    "llvm.x86.avx512.mask.paddus.b.512" => "__builtin_ia32_paddusb512_mask",
+    "llvm.x86.avx512.mask.paddus.w.128" => "__builtin_ia32_paddusw128_mask",
+    "llvm.x86.avx512.mask.paddus.w.256" => "__builtin_ia32_paddusw256_mask",
+    "llvm.x86.avx512.mask.paddus.w.512" => "__builtin_ia32_paddusw512_mask",
     "llvm.x86.avx512.mask.pand.d.512" => "__builtin_ia32_pandd512_mask",
     "llvm.x86.avx512.mask.pand.q.512" => "__builtin_ia32_pandq512_mask",
+    "llvm.x86.avx512.mask.pavg.b.128" => "__builtin_ia32_pavgb128_mask",
+    "llvm.x86.avx512.mask.pavg.b.256" => "__builtin_ia32_pavgb256_mask",
+    "llvm.x86.avx512.mask.pavg.b.512" => "__builtin_ia32_pavgb512_mask",
+    "llvm.x86.avx512.mask.pavg.w.128" => "__builtin_ia32_pavgw128_mask",
+    "llvm.x86.avx512.mask.pavg.w.256" => "__builtin_ia32_pavgw256_mask",
+    "llvm.x86.avx512.mask.pavg.w.512" => "__builtin_ia32_pavgw512_mask",
+    "llvm.x86.avx512.mask.pbroadcast.b.gpr.128" => "__builtin_ia32_pbroadcastb128_gpr_mask",
+    "llvm.x86.avx512.mask.pbroadcast.b.gpr.256" => "__builtin_ia32_pbroadcastb256_gpr_mask",
+    "llvm.x86.avx512.mask.pbroadcast.b.gpr.512" => "__builtin_ia32_pbroadcastb512_gpr_mask",
+    "llvm.x86.avx512.mask.pbroadcast.d.gpr.128" => "__builtin_ia32_pbroadcastd128_gpr_mask",
+    "llvm.x86.avx512.mask.pbroadcast.d.gpr.256" => "__builtin_ia32_pbroadcastd256_gpr_mask",
     "llvm.x86.avx512.mask.pbroadcast.d.gpr.512" => "__builtin_ia32_pbroadcastd512_gpr_mask",
+    "llvm.x86.avx512.mask.pbroadcast.q.gpr.128" => "__builtin_ia32_pbroadcastq128_gpr_mask",
+    "llvm.x86.avx512.mask.pbroadcast.q.gpr.256" => "__builtin_ia32_pbroadcastq256_gpr_mask",
     "llvm.x86.avx512.mask.pbroadcast.q.gpr.512" => "__builtin_ia32_pbroadcastq512_gpr_mask",
     "llvm.x86.avx512.mask.pbroadcast.q.mem.512" => "__builtin_ia32_pbroadcastq512_mem_mask",
+    "llvm.x86.avx512.mask.pbroadcast.w.gpr.128" => "__builtin_ia32_pbroadcastw128_gpr_mask",
+    "llvm.x86.avx512.mask.pbroadcast.w.gpr.256" => "__builtin_ia32_pbroadcastw256_gpr_mask",
+    "llvm.x86.avx512.mask.pbroadcast.w.gpr.512" => "__builtin_ia32_pbroadcastw512_gpr_mask",
     "llvm.x86.avx512.mask.pcmpeq.b.128" => "__builtin_ia32_pcmpeqb128_mask",
     "llvm.x86.avx512.mask.pcmpeq.b.256" => "__builtin_ia32_pcmpeqb256_mask",
     "llvm.x86.avx512.mask.pcmpeq.b.512" => "__builtin_ia32_pcmpeqb512_mask",
@@ -3208,21 +4142,83 @@ match name {
     "llvm.x86.avx512.mask.pcmpgt.w.128" => "__builtin_ia32_pcmpgtw128_mask",
     "llvm.x86.avx512.mask.pcmpgt.w.256" => "__builtin_ia32_pcmpgtw256_mask",
     "llvm.x86.avx512.mask.pcmpgt.w.512" => "__builtin_ia32_pcmpgtw512_mask",
+    "llvm.x86.avx512.mask.permvar.df.256" => "__builtin_ia32_permvardf256_mask",
+    "llvm.x86.avx512.mask.permvar.df.512" => "__builtin_ia32_permvardf512_mask",
+    "llvm.x86.avx512.mask.permvar.di.256" => "__builtin_ia32_permvardi256_mask",
+    "llvm.x86.avx512.mask.permvar.di.512" => "__builtin_ia32_permvardi512_mask",
+    "llvm.x86.avx512.mask.permvar.hi.128" => "__builtin_ia32_permvarhi128_mask",
+    "llvm.x86.avx512.mask.permvar.hi.256" => "__builtin_ia32_permvarhi256_mask",
+    "llvm.x86.avx512.mask.permvar.hi.512" => "__builtin_ia32_permvarhi512_mask",
+    "llvm.x86.avx512.mask.permvar.qi.128" => "__builtin_ia32_permvarqi128_mask",
+    "llvm.x86.avx512.mask.permvar.qi.256" => "__builtin_ia32_permvarqi256_mask",
+    "llvm.x86.avx512.mask.permvar.qi.512" => "__builtin_ia32_permvarqi512_mask",
+    "llvm.x86.avx512.mask.permvar.sf.256" => "__builtin_ia32_permvarsf256_mask",
+    "llvm.x86.avx512.mask.permvar.sf.512" => "__builtin_ia32_permvarsf512_mask",
+    "llvm.x86.avx512.mask.permvar.si.256" => "__builtin_ia32_permvarsi256_mask",
+    "llvm.x86.avx512.mask.permvar.si.512" => "__builtin_ia32_permvarsi512_mask",
+    "llvm.x86.avx512.mask.pmaddubs.w.128" => "__builtin_ia32_pmaddubsw128_mask",
+    "llvm.x86.avx512.mask.pmaddubs.w.256" => "__builtin_ia32_pmaddubsw256_mask",
+    "llvm.x86.avx512.mask.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512_mask",
+    "llvm.x86.avx512.mask.pmaddw.d.128" => "__builtin_ia32_pmaddwd128_mask",
+    "llvm.x86.avx512.mask.pmaddw.d.256" => "__builtin_ia32_pmaddwd256_mask",
+    "llvm.x86.avx512.mask.pmaddw.d.512" => "__builtin_ia32_pmaddwd512_mask",
+    "llvm.x86.avx512.mask.pmaxs.b.128" => "__builtin_ia32_pmaxsb128_mask",
+    "llvm.x86.avx512.mask.pmaxs.b.256" => "__builtin_ia32_pmaxsb256_mask",
+    "llvm.x86.avx512.mask.pmaxs.b.512" => "__builtin_ia32_pmaxsb512_mask",
+    "llvm.x86.avx512.mask.pmaxs.d.128" => "__builtin_ia32_pmaxsd128_mask",
+    "llvm.x86.avx512.mask.pmaxs.d.256" => "__builtin_ia32_pmaxsd256_mask",
     "llvm.x86.avx512.mask.pmaxs.d.512" => "__builtin_ia32_pmaxsd512_mask",
+    "llvm.x86.avx512.mask.pmaxs.q.128" => "__builtin_ia32_pmaxsq128_mask",
+    "llvm.x86.avx512.mask.pmaxs.q.256" => "__builtin_ia32_pmaxsq256_mask",
     "llvm.x86.avx512.mask.pmaxs.q.512" => "__builtin_ia32_pmaxsq512_mask",
+    "llvm.x86.avx512.mask.pmaxs.w.128" => "__builtin_ia32_pmaxsw128_mask",
+    "llvm.x86.avx512.mask.pmaxs.w.256" => "__builtin_ia32_pmaxsw256_mask",
+    "llvm.x86.avx512.mask.pmaxs.w.512" => "__builtin_ia32_pmaxsw512_mask",
+    "llvm.x86.avx512.mask.pmaxu.b.128" => "__builtin_ia32_pmaxub128_mask",
+    "llvm.x86.avx512.mask.pmaxu.b.256" => "__builtin_ia32_pmaxub256_mask",
+    "llvm.x86.avx512.mask.pmaxu.b.512" => "__builtin_ia32_pmaxub512_mask",
+    "llvm.x86.avx512.mask.pmaxu.d.128" => "__builtin_ia32_pmaxud128_mask",
+    "llvm.x86.avx512.mask.pmaxu.d.256" => "__builtin_ia32_pmaxud256_mask",
     "llvm.x86.avx512.mask.pmaxu.d.512" => "__builtin_ia32_pmaxud512_mask",
+    "llvm.x86.avx512.mask.pmaxu.q.128" => "__builtin_ia32_pmaxuq128_mask",
+    "llvm.x86.avx512.mask.pmaxu.q.256" => "__builtin_ia32_pmaxuq256_mask",
     "llvm.x86.avx512.mask.pmaxu.q.512" => "__builtin_ia32_pmaxuq512_mask",
+    "llvm.x86.avx512.mask.pmaxu.w.128" => "__builtin_ia32_pmaxuw128_mask",
+    "llvm.x86.avx512.mask.pmaxu.w.256" => "__builtin_ia32_pmaxuw256_mask",
+    "llvm.x86.avx512.mask.pmaxu.w.512" => "__builtin_ia32_pmaxuw512_mask",
+    "llvm.x86.avx512.mask.pmins.b.128" => "__builtin_ia32_pminsb128_mask",
+    "llvm.x86.avx512.mask.pmins.b.256" => "__builtin_ia32_pminsb256_mask",
+    "llvm.x86.avx512.mask.pmins.b.512" => "__builtin_ia32_pminsb512_mask",
+    "llvm.x86.avx512.mask.pmins.d.128" => "__builtin_ia32_pminsd128_mask",
+    "llvm.x86.avx512.mask.pmins.d.256" => "__builtin_ia32_pminsd256_mask",
     "llvm.x86.avx512.mask.pmins.d.512" => "__builtin_ia32_pminsd512_mask",
+    "llvm.x86.avx512.mask.pmins.q.128" => "__builtin_ia32_pminsq128_mask",
+    "llvm.x86.avx512.mask.pmins.q.256" => "__builtin_ia32_pminsq256_mask",
     "llvm.x86.avx512.mask.pmins.q.512" => "__builtin_ia32_pminsq512_mask",
+    "llvm.x86.avx512.mask.pmins.w.128" => "__builtin_ia32_pminsw128_mask",
+    "llvm.x86.avx512.mask.pmins.w.256" => "__builtin_ia32_pminsw256_mask",
+    "llvm.x86.avx512.mask.pmins.w.512" => "__builtin_ia32_pminsw512_mask",
+    "llvm.x86.avx512.mask.pminu.b.128" => "__builtin_ia32_pminub128_mask",
+    "llvm.x86.avx512.mask.pminu.b.256" => "__builtin_ia32_pminub256_mask",
+    "llvm.x86.avx512.mask.pminu.b.512" => "__builtin_ia32_pminub512_mask",
+    "llvm.x86.avx512.mask.pminu.d.128" => "__builtin_ia32_pminud128_mask",
+    "llvm.x86.avx512.mask.pminu.d.256" => "__builtin_ia32_pminud256_mask",
     "llvm.x86.avx512.mask.pminu.d.512" => "__builtin_ia32_pminud512_mask",
+    "llvm.x86.avx512.mask.pminu.q.128" => "__builtin_ia32_pminuq128_mask",
+    "llvm.x86.avx512.mask.pminu.q.256" => "__builtin_ia32_pminuq256_mask",
     "llvm.x86.avx512.mask.pminu.q.512" => "__builtin_ia32_pminuq512_mask",
+    "llvm.x86.avx512.mask.pminu.w.128" => "__builtin_ia32_pminuw128_mask",
+    "llvm.x86.avx512.mask.pminu.w.256" => "__builtin_ia32_pminuw256_mask",
+    "llvm.x86.avx512.mask.pminu.w.512" => "__builtin_ia32_pminuw512_mask",
     "llvm.x86.avx512.mask.pmov.db.128" => "__builtin_ia32_pmovdb128_mask",
     "llvm.x86.avx512.mask.pmov.db.256" => "__builtin_ia32_pmovdb256_mask",
+    "llvm.x86.avx512.mask.pmov.db.512" => "__builtin_ia32_pmovdb512_mask",
     "llvm.x86.avx512.mask.pmov.db.mem.128" => "__builtin_ia32_pmovdb128mem_mask",
     "llvm.x86.avx512.mask.pmov.db.mem.256" => "__builtin_ia32_pmovdb256mem_mask",
     "llvm.x86.avx512.mask.pmov.db.mem.512" => "__builtin_ia32_pmovdb512mem_mask",
     "llvm.x86.avx512.mask.pmov.dw.128" => "__builtin_ia32_pmovdw128_mask",
     "llvm.x86.avx512.mask.pmov.dw.256" => "__builtin_ia32_pmovdw256_mask",
+    "llvm.x86.avx512.mask.pmov.dw.512" => "__builtin_ia32_pmovdw512_mask",
     "llvm.x86.avx512.mask.pmov.dw.mem.128" => "__builtin_ia32_pmovdw128mem_mask",
     "llvm.x86.avx512.mask.pmov.dw.mem.256" => "__builtin_ia32_pmovdw256mem_mask",
     "llvm.x86.avx512.mask.pmov.dw.mem.512" => "__builtin_ia32_pmovdw512mem_mask",
@@ -3233,15 +4229,20 @@ match name {
     "llvm.x86.avx512.mask.pmov.qb.mem.256" => "__builtin_ia32_pmovqb256mem_mask",
     "llvm.x86.avx512.mask.pmov.qb.mem.512" => "__builtin_ia32_pmovqb512mem_mask",
     "llvm.x86.avx512.mask.pmov.qd.128" => "__builtin_ia32_pmovqd128_mask",
+    "llvm.x86.avx512.mask.pmov.qd.256" => "__builtin_ia32_pmovqd256_mask",
+    "llvm.x86.avx512.mask.pmov.qd.512" => "__builtin_ia32_pmovqd512_mask",
     "llvm.x86.avx512.mask.pmov.qd.mem.128" => "__builtin_ia32_pmovqd128mem_mask",
     "llvm.x86.avx512.mask.pmov.qd.mem.256" => "__builtin_ia32_pmovqd256mem_mask",
     "llvm.x86.avx512.mask.pmov.qd.mem.512" => "__builtin_ia32_pmovqd512mem_mask",
     "llvm.x86.avx512.mask.pmov.qw.128" => "__builtin_ia32_pmovqw128_mask",
     "llvm.x86.avx512.mask.pmov.qw.256" => "__builtin_ia32_pmovqw256_mask",
+    "llvm.x86.avx512.mask.pmov.qw.512" => "__builtin_ia32_pmovqw512_mask",
     "llvm.x86.avx512.mask.pmov.qw.mem.128" => "__builtin_ia32_pmovqw128mem_mask",
     "llvm.x86.avx512.mask.pmov.qw.mem.256" => "__builtin_ia32_pmovqw256mem_mask",
     "llvm.x86.avx512.mask.pmov.qw.mem.512" => "__builtin_ia32_pmovqw512mem_mask",
     "llvm.x86.avx512.mask.pmov.wb.128" => "__builtin_ia32_pmovwb128_mask",
+    "llvm.x86.avx512.mask.pmov.wb.256" => "__builtin_ia32_pmovwb256_mask",
+    "llvm.x86.avx512.mask.pmov.wb.512" => "__builtin_ia32_pmovwb512_mask",
     "llvm.x86.avx512.mask.pmov.wb.mem.128" => "__builtin_ia32_pmovwb128mem_mask",
     "llvm.x86.avx512.mask.pmov.wb.mem.256" => "__builtin_ia32_pmovwb256mem_mask",
     "llvm.x86.avx512.mask.pmov.wb.mem.512" => "__builtin_ia32_pmovwb512mem_mask",
@@ -3281,6 +4282,24 @@ match name {
     "llvm.x86.avx512.mask.pmovs.wb.mem.128" => "__builtin_ia32_pmovswb128mem_mask",
     "llvm.x86.avx512.mask.pmovs.wb.mem.256" => "__builtin_ia32_pmovswb256mem_mask",
     "llvm.x86.avx512.mask.pmovs.wb.mem.512" => "__builtin_ia32_pmovswb512mem_mask",
+    "llvm.x86.avx512.mask.pmovsxb.d.128" => "__builtin_ia32_pmovsxbd128_mask",
+    "llvm.x86.avx512.mask.pmovsxb.d.256" => "__builtin_ia32_pmovsxbd256_mask",
+    "llvm.x86.avx512.mask.pmovsxb.d.512" => "__builtin_ia32_pmovsxbd512_mask",
+    "llvm.x86.avx512.mask.pmovsxb.q.128" => "__builtin_ia32_pmovsxbq128_mask",
+    "llvm.x86.avx512.mask.pmovsxb.q.256" => "__builtin_ia32_pmovsxbq256_mask",
+    "llvm.x86.avx512.mask.pmovsxb.q.512" => "__builtin_ia32_pmovsxbq512_mask",
+    "llvm.x86.avx512.mask.pmovsxb.w.128" => "__builtin_ia32_pmovsxbw128_mask",
+    "llvm.x86.avx512.mask.pmovsxb.w.256" => "__builtin_ia32_pmovsxbw256_mask",
+    "llvm.x86.avx512.mask.pmovsxb.w.512" => "__builtin_ia32_pmovsxbw512_mask",
+    "llvm.x86.avx512.mask.pmovsxd.q.128" => "__builtin_ia32_pmovsxdq128_mask",
+    "llvm.x86.avx512.mask.pmovsxd.q.256" => "__builtin_ia32_pmovsxdq256_mask",
+    "llvm.x86.avx512.mask.pmovsxd.q.512" => "__builtin_ia32_pmovsxdq512_mask",
+    "llvm.x86.avx512.mask.pmovsxw.d.128" => "__builtin_ia32_pmovsxwd128_mask",
+    "llvm.x86.avx512.mask.pmovsxw.d.256" => "__builtin_ia32_pmovsxwd256_mask",
+    "llvm.x86.avx512.mask.pmovsxw.d.512" => "__builtin_ia32_pmovsxwd512_mask",
+    "llvm.x86.avx512.mask.pmovsxw.q.128" => "__builtin_ia32_pmovsxwq128_mask",
+    "llvm.x86.avx512.mask.pmovsxw.q.256" => "__builtin_ia32_pmovsxwq256_mask",
+    "llvm.x86.avx512.mask.pmovsxw.q.512" => "__builtin_ia32_pmovsxwq512_mask",
     "llvm.x86.avx512.mask.pmovus.db.128" => "__builtin_ia32_pmovusdb128_mask",
     "llvm.x86.avx512.mask.pmovus.db.256" => "__builtin_ia32_pmovusdb256_mask",
     "llvm.x86.avx512.mask.pmovus.db.512" => "__builtin_ia32_pmovusdb512_mask",
@@ -3317,8 +4336,189 @@ match name {
     "llvm.x86.avx512.mask.pmovus.wb.mem.128" => "__builtin_ia32_pmovuswb128mem_mask",
     "llvm.x86.avx512.mask.pmovus.wb.mem.256" => "__builtin_ia32_pmovuswb256mem_mask",
     "llvm.x86.avx512.mask.pmovus.wb.mem.512" => "__builtin_ia32_pmovuswb512mem_mask",
+    "llvm.x86.avx512.mask.pmovzxb.d.128" => "__builtin_ia32_pmovzxbd128_mask",
+    "llvm.x86.avx512.mask.pmovzxb.d.256" => "__builtin_ia32_pmovzxbd256_mask",
+    "llvm.x86.avx512.mask.pmovzxb.d.512" => "__builtin_ia32_pmovzxbd512_mask",
+    "llvm.x86.avx512.mask.pmovzxb.q.128" => "__builtin_ia32_pmovzxbq128_mask",
+    "llvm.x86.avx512.mask.pmovzxb.q.256" => "__builtin_ia32_pmovzxbq256_mask",
+    "llvm.x86.avx512.mask.pmovzxb.q.512" => "__builtin_ia32_pmovzxbq512_mask",
+    "llvm.x86.avx512.mask.pmovzxb.w.128" => "__builtin_ia32_pmovzxbw128_mask",
+    "llvm.x86.avx512.mask.pmovzxb.w.256" => "__builtin_ia32_pmovzxbw256_mask",
+    "llvm.x86.avx512.mask.pmovzxb.w.512" => "__builtin_ia32_pmovzxbw512_mask",
+    "llvm.x86.avx512.mask.pmovzxd.q.128" => "__builtin_ia32_pmovzxdq128_mask",
+    "llvm.x86.avx512.mask.pmovzxd.q.256" => "__builtin_ia32_pmovzxdq256_mask",
+    "llvm.x86.avx512.mask.pmovzxd.q.512" => "__builtin_ia32_pmovzxdq512_mask",
+    "llvm.x86.avx512.mask.pmovzxw.d.128" => "__builtin_ia32_pmovzxwd128_mask",
+    "llvm.x86.avx512.mask.pmovzxw.d.256" => "__builtin_ia32_pmovzxwd256_mask",
+    "llvm.x86.avx512.mask.pmovzxw.d.512" => "__builtin_ia32_pmovzxwd512_mask",
+    "llvm.x86.avx512.mask.pmovzxw.q.128" => "__builtin_ia32_pmovzxwq128_mask",
+    "llvm.x86.avx512.mask.pmovzxw.q.256" => "__builtin_ia32_pmovzxwq256_mask",
+    "llvm.x86.avx512.mask.pmovzxw.q.512" => "__builtin_ia32_pmovzxwq512_mask",
+    "llvm.x86.avx512.mask.pmul.dq.128" => "__builtin_ia32_pmuldq128_mask",
+    "llvm.x86.avx512.mask.pmul.dq.256" => "__builtin_ia32_pmuldq256_mask",
     "llvm.x86.avx512.mask.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask",
+    "llvm.x86.avx512.mask.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128_mask",
+    "llvm.x86.avx512.mask.pmul.hr.sw.256" => "__builtin_ia32_pmulhrsw256_mask",
+    "llvm.x86.avx512.mask.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512_mask",
+    "llvm.x86.avx512.mask.pmulh.w.128" => "__builtin_ia32_pmulhw128_mask",
+    "llvm.x86.avx512.mask.pmulh.w.256" => "__builtin_ia32_pmulhw256_mask",
+    "llvm.x86.avx512.mask.pmulh.w.512" => "__builtin_ia32_pmulhw512_mask",
+    "llvm.x86.avx512.mask.pmulhu.w.128" => "__builtin_ia32_pmulhuw128_mask",
+    "llvm.x86.avx512.mask.pmulhu.w.256" => "__builtin_ia32_pmulhuw256_mask",
+    "llvm.x86.avx512.mask.pmulhu.w.512" => "__builtin_ia32_pmulhuw512_mask",
+    "llvm.x86.avx512.mask.pmull.d.128" => "__builtin_ia32_pmulld128_mask",
+    "llvm.x86.avx512.mask.pmull.d.256" => "__builtin_ia32_pmulld256_mask",
+    "llvm.x86.avx512.mask.pmull.d.512" => "__builtin_ia32_pmulld512_mask",
+    "llvm.x86.avx512.mask.pmull.q.128" => "__builtin_ia32_pmullq128_mask",
+    "llvm.x86.avx512.mask.pmull.q.256" => "__builtin_ia32_pmullq256_mask",
+    "llvm.x86.avx512.mask.pmull.q.512" => "__builtin_ia32_pmullq512_mask",
+    "llvm.x86.avx512.mask.pmull.w.128" => "__builtin_ia32_pmullw128_mask",
+    "llvm.x86.avx512.mask.pmull.w.256" => "__builtin_ia32_pmullw256_mask",
+    "llvm.x86.avx512.mask.pmull.w.512" => "__builtin_ia32_pmullw512_mask",
+    "llvm.x86.avx512.mask.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128_mask",
+    "llvm.x86.avx512.mask.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256_mask",
+    "llvm.x86.avx512.mask.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512_mask",
+    "llvm.x86.avx512.mask.pmulu.dq.128" => "__builtin_ia32_pmuludq128_mask",
+    "llvm.x86.avx512.mask.pmulu.dq.256" => "__builtin_ia32_pmuludq256_mask",
     "llvm.x86.avx512.mask.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask",
+    "llvm.x86.avx512.mask.prol.d.128" => "__builtin_ia32_prold128_mask",
+    "llvm.x86.avx512.mask.prol.d.256" => "__builtin_ia32_prold256_mask",
+    "llvm.x86.avx512.mask.prol.d.512" => "__builtin_ia32_prold512_mask",
+    "llvm.x86.avx512.mask.prol.q.128" => "__builtin_ia32_prolq128_mask",
+    "llvm.x86.avx512.mask.prol.q.256" => "__builtin_ia32_prolq256_mask",
+    "llvm.x86.avx512.mask.prol.q.512" => "__builtin_ia32_prolq512_mask",
+    "llvm.x86.avx512.mask.prolv.d.128" => "__builtin_ia32_prolvd128_mask",
+    "llvm.x86.avx512.mask.prolv.d.256" => "__builtin_ia32_prolvd256_mask",
+    "llvm.x86.avx512.mask.prolv.d.512" => "__builtin_ia32_prolvd512_mask",
+    "llvm.x86.avx512.mask.prolv.q.128" => "__builtin_ia32_prolvq128_mask",
+    "llvm.x86.avx512.mask.prolv.q.256" => "__builtin_ia32_prolvq256_mask",
+    "llvm.x86.avx512.mask.prolv.q.512" => "__builtin_ia32_prolvq512_mask",
+    "llvm.x86.avx512.mask.pror.d.128" => "__builtin_ia32_prord128_mask",
+    "llvm.x86.avx512.mask.pror.d.256" => "__builtin_ia32_prord256_mask",
+    "llvm.x86.avx512.mask.pror.d.512" => "__builtin_ia32_prord512_mask",
+    "llvm.x86.avx512.mask.pror.q.128" => "__builtin_ia32_prorq128_mask",
+    "llvm.x86.avx512.mask.pror.q.256" => "__builtin_ia32_prorq256_mask",
+    "llvm.x86.avx512.mask.pror.q.512" => "__builtin_ia32_prorq512_mask",
+    "llvm.x86.avx512.mask.prorv.d.128" => "__builtin_ia32_prorvd128_mask",
+    "llvm.x86.avx512.mask.prorv.d.256" => "__builtin_ia32_prorvd256_mask",
+    "llvm.x86.avx512.mask.prorv.d.512" => "__builtin_ia32_prorvd512_mask",
+    "llvm.x86.avx512.mask.prorv.q.128" => "__builtin_ia32_prorvq128_mask",
+    "llvm.x86.avx512.mask.prorv.q.256" => "__builtin_ia32_prorvq256_mask",
+    "llvm.x86.avx512.mask.prorv.q.512" => "__builtin_ia32_prorvq512_mask",
+    "llvm.x86.avx512.mask.pshuf.b.128" => "__builtin_ia32_pshufb128_mask",
+    "llvm.x86.avx512.mask.pshuf.b.256" => "__builtin_ia32_pshufb256_mask",
+    "llvm.x86.avx512.mask.pshuf.b.512" => "__builtin_ia32_pshufb512_mask",
+    "llvm.x86.avx512.mask.psll.d" => "__builtin_ia32_pslld512_mask",
+    "llvm.x86.avx512.mask.psll.d.128" => "__builtin_ia32_pslld128_mask",
+    "llvm.x86.avx512.mask.psll.d.256" => "__builtin_ia32_pslld256_mask",
+    "llvm.x86.avx512.mask.psll.di.128" => "__builtin_ia32_pslldi128_mask",
+    "llvm.x86.avx512.mask.psll.di.256" => "__builtin_ia32_pslldi256_mask",
+    "llvm.x86.avx512.mask.psll.di.512" => "__builtin_ia32_pslldi512_mask",
+    "llvm.x86.avx512.mask.psll.q" => "__builtin_ia32_psllq512_mask",
+    "llvm.x86.avx512.mask.psll.q.128" => "__builtin_ia32_psllq128_mask",
+    "llvm.x86.avx512.mask.psll.q.256" => "__builtin_ia32_psllq256_mask",
+    "llvm.x86.avx512.mask.psll.qi.128" => "__builtin_ia32_psllqi128_mask",
+    "llvm.x86.avx512.mask.psll.qi.256" => "__builtin_ia32_psllqi256_mask",
+    "llvm.x86.avx512.mask.psll.qi.512" => "__builtin_ia32_psllqi512_mask",
+    "llvm.x86.avx512.mask.psll.w.128" => "__builtin_ia32_psllw128_mask",
+    "llvm.x86.avx512.mask.psll.w.256" => "__builtin_ia32_psllw256_mask",
+    "llvm.x86.avx512.mask.psll.w.512" => "__builtin_ia32_psllw512_mask",
+    "llvm.x86.avx512.mask.psll.wi.128" => "__builtin_ia32_psllwi128_mask",
+    "llvm.x86.avx512.mask.psll.wi.256" => "__builtin_ia32_psllwi256_mask",
+    "llvm.x86.avx512.mask.psll.wi.512" => "__builtin_ia32_psllwi512_mask",
+    "llvm.x86.avx512.mask.psllv.d" => "__builtin_ia32_psllv16si_mask",
+    "llvm.x86.avx512.mask.psllv.q" => "__builtin_ia32_psllv8di_mask",
+    "llvm.x86.avx512.mask.psllv16.hi" => "__builtin_ia32_psllv16hi_mask",
+    "llvm.x86.avx512.mask.psllv2.di" => "__builtin_ia32_psllv2di_mask",
+    "llvm.x86.avx512.mask.psllv32hi" => "__builtin_ia32_psllv32hi_mask",
+    "llvm.x86.avx512.mask.psllv4.di" => "__builtin_ia32_psllv4di_mask",
+    "llvm.x86.avx512.mask.psllv4.si" => "__builtin_ia32_psllv4si_mask",
+    "llvm.x86.avx512.mask.psllv8.hi" => "__builtin_ia32_psllv8hi_mask",
+    "llvm.x86.avx512.mask.psllv8.si" => "__builtin_ia32_psllv8si_mask",
+    "llvm.x86.avx512.mask.psra.d" => "__builtin_ia32_psrad512_mask",
+    "llvm.x86.avx512.mask.psra.d.128" => "__builtin_ia32_psrad128_mask",
+    "llvm.x86.avx512.mask.psra.d.256" => "__builtin_ia32_psrad256_mask",
+    "llvm.x86.avx512.mask.psra.di.128" => "__builtin_ia32_psradi128_mask",
+    "llvm.x86.avx512.mask.psra.di.256" => "__builtin_ia32_psradi256_mask",
+    "llvm.x86.avx512.mask.psra.di.512" => "__builtin_ia32_psradi512_mask",
+    "llvm.x86.avx512.mask.psra.q" => "__builtin_ia32_psraq512_mask",
+    "llvm.x86.avx512.mask.psra.q.128" => "__builtin_ia32_psraq128_mask",
+    "llvm.x86.avx512.mask.psra.q.256" => "__builtin_ia32_psraq256_mask",
+    "llvm.x86.avx512.mask.psra.qi.128" => "__builtin_ia32_psraqi128_mask",
+    "llvm.x86.avx512.mask.psra.qi.256" => "__builtin_ia32_psraqi256_mask",
+    "llvm.x86.avx512.mask.psra.qi.512" => "__builtin_ia32_psraqi512_mask",
+    "llvm.x86.avx512.mask.psra.w.128" => "__builtin_ia32_psraw128_mask",
+    "llvm.x86.avx512.mask.psra.w.256" => "__builtin_ia32_psraw256_mask",
+    "llvm.x86.avx512.mask.psra.w.512" => "__builtin_ia32_psraw512_mask",
+    "llvm.x86.avx512.mask.psra.wi.128" => "__builtin_ia32_psrawi128_mask",
+    "llvm.x86.avx512.mask.psra.wi.256" => "__builtin_ia32_psrawi256_mask",
+    "llvm.x86.avx512.mask.psra.wi.512" => "__builtin_ia32_psrawi512_mask",
+    "llvm.x86.avx512.mask.psrav.d" => "__builtin_ia32_psrav16si_mask",
+    "llvm.x86.avx512.mask.psrav.q" => "__builtin_ia32_psrav8di_mask",
+    "llvm.x86.avx512.mask.psrav.q.128" => "__builtin_ia32_psravq128_mask",
+    "llvm.x86.avx512.mask.psrav.q.256" => "__builtin_ia32_psravq256_mask",
+    "llvm.x86.avx512.mask.psrav16.hi" => "__builtin_ia32_psrav16hi_mask",
+    "llvm.x86.avx512.mask.psrav32.hi" => "__builtin_ia32_psrav32hi_mask",
+    "llvm.x86.avx512.mask.psrav4.si" => "__builtin_ia32_psrav4si_mask",
+    "llvm.x86.avx512.mask.psrav8.hi" => "__builtin_ia32_psrav8hi_mask",
+    "llvm.x86.avx512.mask.psrav8.si" => "__builtin_ia32_psrav8si_mask",
+    "llvm.x86.avx512.mask.psrl.d" => "__builtin_ia32_psrld512_mask",
+    "llvm.x86.avx512.mask.psrl.d.128" => "__builtin_ia32_psrld128_mask",
+    "llvm.x86.avx512.mask.psrl.d.256" => "__builtin_ia32_psrld256_mask",
+    "llvm.x86.avx512.mask.psrl.di.128" => "__builtin_ia32_psrldi128_mask",
+    "llvm.x86.avx512.mask.psrl.di.256" => "__builtin_ia32_psrldi256_mask",
+    "llvm.x86.avx512.mask.psrl.di.512" => "__builtin_ia32_psrldi512_mask",
+    "llvm.x86.avx512.mask.psrl.q" => "__builtin_ia32_psrlq512_mask",
+    "llvm.x86.avx512.mask.psrl.q.128" => "__builtin_ia32_psrlq128_mask",
+    "llvm.x86.avx512.mask.psrl.q.256" => "__builtin_ia32_psrlq256_mask",
+    "llvm.x86.avx512.mask.psrl.qi.128" => "__builtin_ia32_psrlqi128_mask",
+    "llvm.x86.avx512.mask.psrl.qi.256" => "__builtin_ia32_psrlqi256_mask",
+    "llvm.x86.avx512.mask.psrl.qi.512" => "__builtin_ia32_psrlqi512_mask",
+    "llvm.x86.avx512.mask.psrl.w.128" => "__builtin_ia32_psrlw128_mask",
+    "llvm.x86.avx512.mask.psrl.w.256" => "__builtin_ia32_psrlw256_mask",
+    "llvm.x86.avx512.mask.psrl.w.512" => "__builtin_ia32_psrlw512_mask",
+    "llvm.x86.avx512.mask.psrl.wi.128" => "__builtin_ia32_psrlwi128_mask",
+    "llvm.x86.avx512.mask.psrl.wi.256" => "__builtin_ia32_psrlwi256_mask",
+    "llvm.x86.avx512.mask.psrl.wi.512" => "__builtin_ia32_psrlwi512_mask",
+    "llvm.x86.avx512.mask.psrlv.d" => "__builtin_ia32_psrlv16si_mask",
+    "llvm.x86.avx512.mask.psrlv.q" => "__builtin_ia32_psrlv8di_mask",
+    "llvm.x86.avx512.mask.psrlv16.hi" => "__builtin_ia32_psrlv16hi_mask",
+    "llvm.x86.avx512.mask.psrlv2.di" => "__builtin_ia32_psrlv2di_mask",
+    "llvm.x86.avx512.mask.psrlv32hi" => "__builtin_ia32_psrlv32hi_mask",
+    "llvm.x86.avx512.mask.psrlv4.di" => "__builtin_ia32_psrlv4di_mask",
+    "llvm.x86.avx512.mask.psrlv4.si" => "__builtin_ia32_psrlv4si_mask",
+    "llvm.x86.avx512.mask.psrlv8.hi" => "__builtin_ia32_psrlv8hi_mask",
+    "llvm.x86.avx512.mask.psrlv8.si" => "__builtin_ia32_psrlv8si_mask",
+    "llvm.x86.avx512.mask.psub.b.128" => "__builtin_ia32_psubb128_mask",
+    "llvm.x86.avx512.mask.psub.b.256" => "__builtin_ia32_psubb256_mask",
+    "llvm.x86.avx512.mask.psub.b.512" => "__builtin_ia32_psubb512_mask",
+    "llvm.x86.avx512.mask.psub.d.128" => "__builtin_ia32_psubd128_mask",
+    "llvm.x86.avx512.mask.psub.d.256" => "__builtin_ia32_psubd256_mask",
+    "llvm.x86.avx512.mask.psub.d.512" => "__builtin_ia32_psubd512_mask",
+    "llvm.x86.avx512.mask.psub.q.128" => "__builtin_ia32_psubq128_mask",
+    "llvm.x86.avx512.mask.psub.q.256" => "__builtin_ia32_psubq256_mask",
+    "llvm.x86.avx512.mask.psub.q.512" => "__builtin_ia32_psubq512_mask",
+    "llvm.x86.avx512.mask.psub.w.128" => "__builtin_ia32_psubw128_mask",
+    "llvm.x86.avx512.mask.psub.w.256" => "__builtin_ia32_psubw256_mask",
+    "llvm.x86.avx512.mask.psub.w.512" => "__builtin_ia32_psubw512_mask",
+    "llvm.x86.avx512.mask.psubs.b.128" => "__builtin_ia32_psubsb128_mask",
+    "llvm.x86.avx512.mask.psubs.b.256" => "__builtin_ia32_psubsb256_mask",
+    "llvm.x86.avx512.mask.psubs.b.512" => "__builtin_ia32_psubsb512_mask",
+    "llvm.x86.avx512.mask.psubs.w.128" => "__builtin_ia32_psubsw128_mask",
+    "llvm.x86.avx512.mask.psubs.w.256" => "__builtin_ia32_psubsw256_mask",
+    "llvm.x86.avx512.mask.psubs.w.512" => "__builtin_ia32_psubsw512_mask",
+    "llvm.x86.avx512.mask.psubus.b.128" => "__builtin_ia32_psubusb128_mask",
+    "llvm.x86.avx512.mask.psubus.b.256" => "__builtin_ia32_psubusb256_mask",
+    "llvm.x86.avx512.mask.psubus.b.512" => "__builtin_ia32_psubusb512_mask",
+    "llvm.x86.avx512.mask.psubus.w.128" => "__builtin_ia32_psubusw128_mask",
+    "llvm.x86.avx512.mask.psubus.w.256" => "__builtin_ia32_psubusw256_mask",
+    "llvm.x86.avx512.mask.psubus.w.512" => "__builtin_ia32_psubusw512_mask",
+    "llvm.x86.avx512.mask.pternlog.d.128" => "__builtin_ia32_pternlogd128_mask",
+    "llvm.x86.avx512.mask.pternlog.d.256" => "__builtin_ia32_pternlogd256_mask",
+    "llvm.x86.avx512.mask.pternlog.d.512" => "__builtin_ia32_pternlogd512_mask",
+    "llvm.x86.avx512.mask.pternlog.q.128" => "__builtin_ia32_pternlogq128_mask",
+    "llvm.x86.avx512.mask.pternlog.q.256" => "__builtin_ia32_pternlogq256_mask",
+    "llvm.x86.avx512.mask.pternlog.q.512" => "__builtin_ia32_pternlogq512_mask",
     "llvm.x86.avx512.mask.ptestm.d.512" => "__builtin_ia32_ptestmd512",
     "llvm.x86.avx512.mask.ptestm.q.512" => "__builtin_ia32_ptestmq512",
     "llvm.x86.avx512.mask.range.pd.128" => "__builtin_ia32_rangepd128_mask",
@@ -3353,23 +4553,181 @@ match name {
     "llvm.x86.avx512.mask.scalef.ps.512" => "__builtin_ia32_scalefps512_mask",
     "llvm.x86.avx512.mask.scalef.sd" => "__builtin_ia32_scalefsd_round_mask",
     "llvm.x86.avx512.mask.scalef.ss" => "__builtin_ia32_scalefss_round_mask",
+    "llvm.x86.avx512.mask.shuf.f32x4" => "__builtin_ia32_shuf_f32x4_mask",
+    "llvm.x86.avx512.mask.shuf.f32x4.256" => "__builtin_ia32_shuf_f32x4_256_mask",
+    "llvm.x86.avx512.mask.shuf.f64x2" => "__builtin_ia32_shuf_f64x2_mask",
+    "llvm.x86.avx512.mask.shuf.f64x2.256" => "__builtin_ia32_shuf_f64x2_256_mask",
+    "llvm.x86.avx512.mask.shuf.i32x4" => "__builtin_ia32_shuf_i32x4_mask",
+    "llvm.x86.avx512.mask.shuf.i32x4.256" => "__builtin_ia32_shuf_i32x4_256_mask",
+    "llvm.x86.avx512.mask.shuf.i64x2" => "__builtin_ia32_shuf_i64x2_mask",
+    "llvm.x86.avx512.mask.shuf.i64x2.256" => "__builtin_ia32_shuf_i64x2_256_mask",
+    "llvm.x86.avx512.mask.shuf.pd.128" => "__builtin_ia32_shufpd128_mask",
+    "llvm.x86.avx512.mask.shuf.pd.256" => "__builtin_ia32_shufpd256_mask",
+    "llvm.x86.avx512.mask.shuf.pd.512" => "__builtin_ia32_shufpd512_mask",
+    "llvm.x86.avx512.mask.shuf.ps.128" => "__builtin_ia32_shufps128_mask",
+    "llvm.x86.avx512.mask.shuf.ps.256" => "__builtin_ia32_shufps256_mask",
+    "llvm.x86.avx512.mask.shuf.ps.512" => "__builtin_ia32_shufps512_mask",
+    "llvm.x86.avx512.mask.sqrt.pd.128" => "__builtin_ia32_sqrtpd128_mask",
+    "llvm.x86.avx512.mask.sqrt.pd.256" => "__builtin_ia32_sqrtpd256_mask",
+    "llvm.x86.avx512.mask.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
+    "llvm.x86.avx512.mask.sqrt.ps.128" => "__builtin_ia32_sqrtps128_mask",
+    "llvm.x86.avx512.mask.sqrt.ps.256" => "__builtin_ia32_sqrtps256_mask",
+    "llvm.x86.avx512.mask.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
+    "llvm.x86.avx512.mask.sqrt.sd" => "__builtin_ia32_sqrtsd_round_mask",
+    "llvm.x86.avx512.mask.sqrt.ss" => "__builtin_ia32_sqrtss_round_mask",
     "llvm.x86.avx512.mask.store.ss" => "__builtin_ia32_storess_mask",
     "llvm.x86.avx512.mask.storeu.d.512" => "__builtin_ia32_storedqusi512_mask",
     "llvm.x86.avx512.mask.storeu.pd.512" => "__builtin_ia32_storeupd512_mask",
     "llvm.x86.avx512.mask.storeu.ps.512" => "__builtin_ia32_storeups512_mask",
     "llvm.x86.avx512.mask.storeu.q.512" => "__builtin_ia32_storedqudi512_mask",
+    "llvm.x86.avx512.mask.sub.pd.128" => "__builtin_ia32_subpd128_mask",
+    "llvm.x86.avx512.mask.sub.pd.256" => "__builtin_ia32_subpd256_mask",
+    "llvm.x86.avx512.mask.sub.pd.512" => "__builtin_ia32_subpd512_mask",
+    "llvm.x86.avx512.mask.sub.ps.128" => "__builtin_ia32_subps128_mask",
+    "llvm.x86.avx512.mask.sub.ps.256" => "__builtin_ia32_subps256_mask",
+    "llvm.x86.avx512.mask.sub.ps.512" => "__builtin_ia32_subps512_mask",
     "llvm.x86.avx512.mask.sub.sd.round" => "__builtin_ia32_subsd_round_mask",
     "llvm.x86.avx512.mask.sub.ss.round" => "__builtin_ia32_subss_round_mask",
+    "llvm.x86.avx512.mask.valign.d.128" => "__builtin_ia32_alignd128_mask",
+    "llvm.x86.avx512.mask.valign.d.256" => "__builtin_ia32_alignd256_mask",
     "llvm.x86.avx512.mask.valign.d.512" => "__builtin_ia32_alignd512_mask",
+    "llvm.x86.avx512.mask.valign.q.128" => "__builtin_ia32_alignq128_mask",
+    "llvm.x86.avx512.mask.valign.q.256" => "__builtin_ia32_alignq256_mask",
     "llvm.x86.avx512.mask.valign.q.512" => "__builtin_ia32_alignq512_mask",
+    "llvm.x86.avx512.mask.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps_mask",
+    "llvm.x86.avx512.mask.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256_mask",
     "llvm.x86.avx512.mask.vcvtph2ps.512" => "__builtin_ia32_vcvtph2ps512_mask",
     "llvm.x86.avx512.mask.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph_mask",
     "llvm.x86.avx512.mask.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256_mask",
     "llvm.x86.avx512.mask.vcvtps2ph.512" => "__builtin_ia32_vcvtps2ph512_mask",
+    "llvm.x86.avx512.mask.vextractf32x4.256" => "__builtin_ia32_extractf32x4_256_mask",
+    "llvm.x86.avx512.mask.vextractf32x4.512" => "__builtin_ia32_extractf32x4_mask",
+    "llvm.x86.avx512.mask.vextractf32x8.512" => "__builtin_ia32_extractf32x8_mask",
+    "llvm.x86.avx512.mask.vextractf64x2.256" => "__builtin_ia32_extractf64x2_256_mask",
+    "llvm.x86.avx512.mask.vextractf64x2.512" => "__builtin_ia32_extractf64x2_512_mask",
+    "llvm.x86.avx512.mask.vextractf64x4.512" => "__builtin_ia32_extractf64x4_mask",
+    "llvm.x86.avx512.mask.vextracti32x4.256" => "__builtin_ia32_extracti32x4_256_mask",
+    "llvm.x86.avx512.mask.vextracti32x4.512" => "__builtin_ia32_extracti32x4_mask",
+    "llvm.x86.avx512.mask.vextracti32x8.512" => "__builtin_ia32_extracti32x8_mask",
+    "llvm.x86.avx512.mask.vextracti64x2.256" => "__builtin_ia32_extracti64x2_256_mask",
+    "llvm.x86.avx512.mask.vextracti64x2.512" => "__builtin_ia32_extracti64x2_512_mask",
+    "llvm.x86.avx512.mask.vextracti64x4.512" => "__builtin_ia32_extracti64x4_mask",
+    "llvm.x86.avx512.mask.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_mask",
+    "llvm.x86.avx512.mask.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_mask",
+    "llvm.x86.avx512.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
+    "llvm.x86.avx512.mask.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_mask",
+    "llvm.x86.avx512.mask.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_mask",
+    "llvm.x86.avx512.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
+    "llvm.x86.avx512.mask.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_mask",
+    "llvm.x86.avx512.mask.vfmadd.ss" => "__builtin_ia32_vfmaddss3_mask",
+    "llvm.x86.avx512.mask.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_mask",
+    "llvm.x86.avx512.mask.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_mask",
+    "llvm.x86.avx512.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
+    "llvm.x86.avx512.mask.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_mask",
+    "llvm.x86.avx512.mask.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_mask",
+    "llvm.x86.avx512.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
+    "llvm.x86.avx512.mask.vfnmadd.pd.128" => "__builtin_ia32_vfnmaddpd128_mask",
+    "llvm.x86.avx512.mask.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256_mask",
+    "llvm.x86.avx512.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
+    "llvm.x86.avx512.mask.vfnmadd.ps.128" => "__builtin_ia32_vfnmaddps128_mask",
+    "llvm.x86.avx512.mask.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256_mask",
+    "llvm.x86.avx512.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
+    "llvm.x86.avx512.mask.vfnmsub.pd.128" => "__builtin_ia32_vfnmsubpd128_mask",
+    "llvm.x86.avx512.mask.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256_mask",
+    "llvm.x86.avx512.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
+    "llvm.x86.avx512.mask.vfnmsub.ps.128" => "__builtin_ia32_vfnmsubps128_mask",
+    "llvm.x86.avx512.mask.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256_mask",
+    "llvm.x86.avx512.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
+    "llvm.x86.avx512.mask.vpermi2var.d.128" => "__builtin_ia32_vpermi2vard128_mask",
+    "llvm.x86.avx512.mask.vpermi2var.d.256" => "__builtin_ia32_vpermi2vard256_mask",
+    "llvm.x86.avx512.mask.vpermi2var.d.512" => "__builtin_ia32_vpermi2vard512_mask",
+    "llvm.x86.avx512.mask.vpermi2var.hi.128" => "__builtin_ia32_vpermi2varhi128_mask",
+    "llvm.x86.avx512.mask.vpermi2var.hi.256" => "__builtin_ia32_vpermi2varhi256_mask",
+    "llvm.x86.avx512.mask.vpermi2var.hi.512" => "__builtin_ia32_vpermi2varhi512_mask",
+    "llvm.x86.avx512.mask.vpermi2var.pd.128" => "__builtin_ia32_vpermi2varpd128_mask",
+    "llvm.x86.avx512.mask.vpermi2var.pd.256" => "__builtin_ia32_vpermi2varpd256_mask",
+    "llvm.x86.avx512.mask.vpermi2var.pd.512" => "__builtin_ia32_vpermi2varpd512_mask",
+    "llvm.x86.avx512.mask.vpermi2var.ps.128" => "__builtin_ia32_vpermi2varps128_mask",
+    "llvm.x86.avx512.mask.vpermi2var.ps.256" => "__builtin_ia32_vpermi2varps256_mask",
+    "llvm.x86.avx512.mask.vpermi2var.ps.512" => "__builtin_ia32_vpermi2varps512_mask",
+    "llvm.x86.avx512.mask.vpermi2var.q.128" => "__builtin_ia32_vpermi2varq128_mask",
+    "llvm.x86.avx512.mask.vpermi2var.q.256" => "__builtin_ia32_vpermi2varq256_mask",
+    "llvm.x86.avx512.mask.vpermi2var.q.512" => "__builtin_ia32_vpermi2varq512_mask",
+    "llvm.x86.avx512.mask.vpermi2var.qi.128" => "__builtin_ia32_vpermi2varqi128_mask",
+    "llvm.x86.avx512.mask.vpermi2var.qi.256" => "__builtin_ia32_vpermi2varqi256_mask",
+    "llvm.x86.avx512.mask.vpermi2var.qi.512" => "__builtin_ia32_vpermi2varqi512_mask",
+    "llvm.x86.avx512.mask.vpermilvar.pd.128" => "__builtin_ia32_vpermilvarpd_mask",
+    "llvm.x86.avx512.mask.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256_mask",
+    "llvm.x86.avx512.mask.vpermilvar.pd.512" => "__builtin_ia32_vpermilvarpd512_mask",
+    "llvm.x86.avx512.mask.vpermilvar.ps.128" => "__builtin_ia32_vpermilvarps_mask",
+    "llvm.x86.avx512.mask.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256_mask",
+    "llvm.x86.avx512.mask.vpermilvar.ps.512" => "__builtin_ia32_vpermilvarps512_mask",
     "llvm.x86.avx512.mask.vpermt.d.512" => "__builtin_ia32_vpermt2vard512_mask",
     "llvm.x86.avx512.mask.vpermt.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
     "llvm.x86.avx512.mask.vpermt.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
     "llvm.x86.avx512.mask.vpermt.q.512" => "__builtin_ia32_vpermt2varq512_mask",
+    "llvm.x86.avx512.mask.vpermt2var.d.128" => "__builtin_ia32_vpermt2vard128_mask",
+    "llvm.x86.avx512.mask.vpermt2var.d.256" => "__builtin_ia32_vpermt2vard256_mask",
+    "llvm.x86.avx512.mask.vpermt2var.d.512" => "__builtin_ia32_vpermt2vard512_mask",
+    "llvm.x86.avx512.mask.vpermt2var.hi.128" => "__builtin_ia32_vpermt2varhi128_mask",
+    "llvm.x86.avx512.mask.vpermt2var.hi.256" => "__builtin_ia32_vpermt2varhi256_mask",
+    "llvm.x86.avx512.mask.vpermt2var.hi.512" => "__builtin_ia32_vpermt2varhi512_mask",
+    "llvm.x86.avx512.mask.vpermt2var.pd.128" => "__builtin_ia32_vpermt2varpd128_mask",
+    "llvm.x86.avx512.mask.vpermt2var.pd.256" => "__builtin_ia32_vpermt2varpd256_mask",
+    "llvm.x86.avx512.mask.vpermt2var.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
+    "llvm.x86.avx512.mask.vpermt2var.ps.128" => "__builtin_ia32_vpermt2varps128_mask",
+    "llvm.x86.avx512.mask.vpermt2var.ps.256" => "__builtin_ia32_vpermt2varps256_mask",
+    "llvm.x86.avx512.mask.vpermt2var.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
+    "llvm.x86.avx512.mask.vpermt2var.q.128" => "__builtin_ia32_vpermt2varq128_mask",
+    "llvm.x86.avx512.mask.vpermt2var.q.256" => "__builtin_ia32_vpermt2varq256_mask",
+    "llvm.x86.avx512.mask.vpermt2var.q.512" => "__builtin_ia32_vpermt2varq512_mask",
+    "llvm.x86.avx512.mask.vpermt2var.qi.128" => "__builtin_ia32_vpermt2varqi128_mask",
+    "llvm.x86.avx512.mask.vpermt2var.qi.256" => "__builtin_ia32_vpermt2varqi256_mask",
+    "llvm.x86.avx512.mask.vpermt2var.qi.512" => "__builtin_ia32_vpermt2varqi512_mask",
+    "llvm.x86.avx512.mask.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_mask",
+    "llvm.x86.avx512.mask.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_mask",
+    "llvm.x86.avx512.mask.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_mask",
+    "llvm.x86.avx512.mask.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128_mask",
+    "llvm.x86.avx512.mask.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_mask",
+    "llvm.x86.avx512.mask.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_mask",
+    "llvm.x86.avx512.mask.xor.pd.128" => "__builtin_ia32_xorpd128_mask",
+    "llvm.x86.avx512.mask.xor.pd.256" => "__builtin_ia32_xorpd256_mask",
+    "llvm.x86.avx512.mask.xor.pd.512" => "__builtin_ia32_xorpd512_mask",
+    "llvm.x86.avx512.mask.xor.ps.128" => "__builtin_ia32_xorps128_mask",
+    "llvm.x86.avx512.mask.xor.ps.256" => "__builtin_ia32_xorps256_mask",
+    "llvm.x86.avx512.mask.xor.ps.512" => "__builtin_ia32_xorps512_mask",
+    "llvm.x86.avx512.mask3.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_mask3",
+    "llvm.x86.avx512.mask3.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_mask3",
+    "llvm.x86.avx512.mask3.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask3",
+    "llvm.x86.avx512.mask3.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_mask3",
+    "llvm.x86.avx512.mask3.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_mask3",
+    "llvm.x86.avx512.mask3.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask3",
+    "llvm.x86.avx512.mask3.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_mask3",
+    "llvm.x86.avx512.mask3.vfmadd.ss" => "__builtin_ia32_vfmaddss3_mask3",
+    "llvm.x86.avx512.mask3.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_mask3",
+    "llvm.x86.avx512.mask3.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_mask3",
+    "llvm.x86.avx512.mask3.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask3",
+    "llvm.x86.avx512.mask3.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_mask3",
+    "llvm.x86.avx512.mask3.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_mask3",
+    "llvm.x86.avx512.mask3.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask3",
+    "llvm.x86.avx512.mask3.vfmsub.pd.128" => "__builtin_ia32_vfmsubpd128_mask3",
+    "llvm.x86.avx512.mask3.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256_mask3",
+    "llvm.x86.avx512.mask3.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask3",
+    "llvm.x86.avx512.mask3.vfmsub.ps.128" => "__builtin_ia32_vfmsubps128_mask3",
+    "llvm.x86.avx512.mask3.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256_mask3",
+    "llvm.x86.avx512.mask3.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask3",
+    "llvm.x86.avx512.mask3.vfmsubadd.pd.128" => "__builtin_ia32_vfmsubaddpd128_mask3",
+    "llvm.x86.avx512.mask3.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256_mask3",
+    "llvm.x86.avx512.mask3.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask3",
+    "llvm.x86.avx512.mask3.vfmsubadd.ps.128" => "__builtin_ia32_vfmsubaddps128_mask3",
+    "llvm.x86.avx512.mask3.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256_mask3",
+    "llvm.x86.avx512.mask3.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask3",
+    "llvm.x86.avx512.mask3.vfnmsub.pd.128" => "__builtin_ia32_vfnmsubpd128_mask3",
+    "llvm.x86.avx512.mask3.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256_mask3",
+    "llvm.x86.avx512.mask3.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask3",
+    "llvm.x86.avx512.mask3.vfnmsub.ps.128" => "__builtin_ia32_vfnmsubps128_mask3",
+    "llvm.x86.avx512.mask3.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256_mask3",
+    "llvm.x86.avx512.mask3.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask3",
     "llvm.x86.avx512.maskz.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_maskz",
     "llvm.x86.avx512.maskz.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_maskz",
     "llvm.x86.avx512.maskz.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_maskz",
@@ -3378,6 +4736,50 @@ match name {
     "llvm.x86.avx512.maskz.fixupimm.ps.512" => "__builtin_ia32_fixupimmps512_maskz",
     "llvm.x86.avx512.maskz.fixupimm.sd" => "__builtin_ia32_fixupimmsd_maskz",
     "llvm.x86.avx512.maskz.fixupimm.ss" => "__builtin_ia32_fixupimmss_maskz",
+    "llvm.x86.avx512.maskz.pternlog.d.128" => "__builtin_ia32_pternlogd128_maskz",
+    "llvm.x86.avx512.maskz.pternlog.d.256" => "__builtin_ia32_pternlogd256_maskz",
+    "llvm.x86.avx512.maskz.pternlog.d.512" => "__builtin_ia32_pternlogd512_maskz",
+    "llvm.x86.avx512.maskz.pternlog.q.128" => "__builtin_ia32_pternlogq128_maskz",
+    "llvm.x86.avx512.maskz.pternlog.q.256" => "__builtin_ia32_pternlogq256_maskz",
+    "llvm.x86.avx512.maskz.pternlog.q.512" => "__builtin_ia32_pternlogq512_maskz",
+    "llvm.x86.avx512.maskz.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_maskz",
+    "llvm.x86.avx512.maskz.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_maskz",
+    "llvm.x86.avx512.maskz.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_maskz",
+    "llvm.x86.avx512.maskz.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_maskz",
+    "llvm.x86.avx512.maskz.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_maskz",
+    "llvm.x86.avx512.maskz.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_maskz",
+    "llvm.x86.avx512.maskz.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_maskz",
+    "llvm.x86.avx512.maskz.vfmadd.ss" => "__builtin_ia32_vfmaddss3_maskz",
+    "llvm.x86.avx512.maskz.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_maskz",
+    "llvm.x86.avx512.maskz.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_maskz",
+    "llvm.x86.avx512.maskz.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_maskz",
+    "llvm.x86.avx512.maskz.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_maskz",
+    "llvm.x86.avx512.maskz.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_maskz",
+    "llvm.x86.avx512.maskz.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.d.128" => "__builtin_ia32_vpermt2vard128_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.d.256" => "__builtin_ia32_vpermt2vard256_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.d.512" => "__builtin_ia32_vpermt2vard512_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.hi.128" => "__builtin_ia32_vpermt2varhi128_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.hi.256" => "__builtin_ia32_vpermt2varhi256_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.hi.512" => "__builtin_ia32_vpermt2varhi512_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.pd.128" => "__builtin_ia32_vpermt2varpd128_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.pd.256" => "__builtin_ia32_vpermt2varpd256_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.pd.512" => "__builtin_ia32_vpermt2varpd512_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.ps.128" => "__builtin_ia32_vpermt2varps128_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.ps.256" => "__builtin_ia32_vpermt2varps256_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.ps.512" => "__builtin_ia32_vpermt2varps512_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.q.128" => "__builtin_ia32_vpermt2varq128_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.q.256" => "__builtin_ia32_vpermt2varq256_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.q.512" => "__builtin_ia32_vpermt2varq512_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.qi.128" => "__builtin_ia32_vpermt2varqi128_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.qi.256" => "__builtin_ia32_vpermt2varqi256_maskz",
+    "llvm.x86.avx512.maskz.vpermt2var.qi.512" => "__builtin_ia32_vpermt2varqi512_maskz",
+    "llvm.x86.avx512.maskz.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_maskz",
+    "llvm.x86.avx512.maskz.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_maskz",
+    "llvm.x86.avx512.maskz.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_maskz",
+    "llvm.x86.avx512.maskz.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128_maskz",
+    "llvm.x86.avx512.maskz.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_maskz",
+    "llvm.x86.avx512.maskz.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_maskz",
     "llvm.x86.avx512.max.pd.512" => "__builtin_ia32_maxpd512",
     "llvm.x86.avx512.max.ps.512" => "__builtin_ia32_maxps512",
     "llvm.x86.avx512.min.pd.512" => "__builtin_ia32_minpd512",
@@ -3469,6 +4871,30 @@ match name {
     "llvm.x86.avx512.pternlog.q.128" => "__builtin_ia32_pternlogq128",
     "llvm.x86.avx512.pternlog.q.256" => "__builtin_ia32_pternlogq256",
     "llvm.x86.avx512.pternlog.q.512" => "__builtin_ia32_pternlogq512",
+    "llvm.x86.avx512.ptestm.b.128" => "__builtin_ia32_ptestmb128",
+    "llvm.x86.avx512.ptestm.b.256" => "__builtin_ia32_ptestmb256",
+    "llvm.x86.avx512.ptestm.b.512" => "__builtin_ia32_ptestmb512",
+    "llvm.x86.avx512.ptestm.d.128" => "__builtin_ia32_ptestmd128",
+    "llvm.x86.avx512.ptestm.d.256" => "__builtin_ia32_ptestmd256",
+    "llvm.x86.avx512.ptestm.d.512" => "__builtin_ia32_ptestmd512",
+    "llvm.x86.avx512.ptestm.q.128" => "__builtin_ia32_ptestmq128",
+    "llvm.x86.avx512.ptestm.q.256" => "__builtin_ia32_ptestmq256",
+    "llvm.x86.avx512.ptestm.q.512" => "__builtin_ia32_ptestmq512",
+    "llvm.x86.avx512.ptestm.w.128" => "__builtin_ia32_ptestmw128",
+    "llvm.x86.avx512.ptestm.w.256" => "__builtin_ia32_ptestmw256",
+    "llvm.x86.avx512.ptestm.w.512" => "__builtin_ia32_ptestmw512",
+    "llvm.x86.avx512.ptestnm.b.128" => "__builtin_ia32_ptestnmb128",
+    "llvm.x86.avx512.ptestnm.b.256" => "__builtin_ia32_ptestnmb256",
+    "llvm.x86.avx512.ptestnm.b.512" => "__builtin_ia32_ptestnmb512",
+    "llvm.x86.avx512.ptestnm.d.128" => "__builtin_ia32_ptestnmd128",
+    "llvm.x86.avx512.ptestnm.d.256" => "__builtin_ia32_ptestnmd256",
+    "llvm.x86.avx512.ptestnm.d.512" => "__builtin_ia32_ptestnmd512",
+    "llvm.x86.avx512.ptestnm.q.128" => "__builtin_ia32_ptestnmq128",
+    "llvm.x86.avx512.ptestnm.q.256" => "__builtin_ia32_ptestnmq256",
+    "llvm.x86.avx512.ptestnm.q.512" => "__builtin_ia32_ptestnmq512",
+    "llvm.x86.avx512.ptestnm.w.128" => "__builtin_ia32_ptestnmw128",
+    "llvm.x86.avx512.ptestnm.w.256" => "__builtin_ia32_ptestnmw256",
+    "llvm.x86.avx512.ptestnm.w.512" => "__builtin_ia32_ptestnmw512",
     "llvm.x86.avx512.rcp14.pd.128" => "__builtin_ia32_rcp14pd128_mask",
     "llvm.x86.avx512.rcp14.pd.256" => "__builtin_ia32_rcp14pd256_mask",
     "llvm.x86.avx512.rcp14.pd.512" => "__builtin_ia32_rcp14pd512_mask",
@@ -3507,10 +4933,26 @@ match name {
     "llvm.x86.avx512.scatter.qpi.512" => "__builtin_ia32_scatterdiv16si",
     "llvm.x86.avx512.scatter.qpq.512" => "__builtin_ia32_scatterdiv8di",
     "llvm.x86.avx512.scatter.qps.512" => "__builtin_ia32_scatterdiv16sf",
+    "llvm.x86.avx512.scatterdiv2.df" => "__builtin_ia32_scatterdiv2df",
+    "llvm.x86.avx512.scatterdiv2.di" => "__builtin_ia32_scatterdiv2di",
+    "llvm.x86.avx512.scatterdiv4.df" => "__builtin_ia32_scatterdiv4df",
+    "llvm.x86.avx512.scatterdiv4.di" => "__builtin_ia32_scatterdiv4di",
+    "llvm.x86.avx512.scatterdiv4.sf" => "__builtin_ia32_scatterdiv4sf",
+    "llvm.x86.avx512.scatterdiv4.si" => "__builtin_ia32_scatterdiv4si",
+    "llvm.x86.avx512.scatterdiv8.sf" => "__builtin_ia32_scatterdiv8sf",
+    "llvm.x86.avx512.scatterdiv8.si" => "__builtin_ia32_scatterdiv8si",
     "llvm.x86.avx512.scatterpf.dpd.512" => "__builtin_ia32_scatterpfdpd",
     "llvm.x86.avx512.scatterpf.dps.512" => "__builtin_ia32_scatterpfdps",
     "llvm.x86.avx512.scatterpf.qpd.512" => "__builtin_ia32_scatterpfqpd",
     "llvm.x86.avx512.scatterpf.qps.512" => "__builtin_ia32_scatterpfqps",
+    "llvm.x86.avx512.scattersiv2.df" => "__builtin_ia32_scattersiv2df",
+    "llvm.x86.avx512.scattersiv2.di" => "__builtin_ia32_scattersiv2di",
+    "llvm.x86.avx512.scattersiv4.df" => "__builtin_ia32_scattersiv4df",
+    "llvm.x86.avx512.scattersiv4.di" => "__builtin_ia32_scattersiv4di",
+    "llvm.x86.avx512.scattersiv4.sf" => "__builtin_ia32_scattersiv4sf",
+    "llvm.x86.avx512.scattersiv4.si" => "__builtin_ia32_scattersiv4si",
+    "llvm.x86.avx512.scattersiv8.sf" => "__builtin_ia32_scattersiv8sf",
+    "llvm.x86.avx512.scattersiv8.si" => "__builtin_ia32_scattersiv8si",
     "llvm.x86.avx512.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
     "llvm.x86.avx512.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
     "llvm.x86.avx512.sqrt.sd" => "__builtin_ia32_sqrtrndsd",
@@ -3885,6 +5327,7 @@ match name {
     "llvm.x86.rdgsbase.32" => "__builtin_ia32_rdgsbase32",
     "llvm.x86.rdgsbase.64" => "__builtin_ia32_rdgsbase64",
     "llvm.x86.rdpid" => "__builtin_ia32_rdpid",
+    "llvm.x86.rdpkru" => "__builtin_ia32_rdpkru",
     "llvm.x86.rdpmc" => "__builtin_ia32_rdpmc",
     "llvm.x86.rdsspd" => "__builtin_ia32_rdsspd",
     "llvm.x86.rdsspq" => "__builtin_ia32_rdsspq",

From e25e2c3b94e1f89fb1d38f77a8a58da5e8a2d581 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 15 May 2022 14:48:52 +0200
Subject: [PATCH 094/997] Regenerate JSON file for llvmint every time

---
 tools/generate_intrinsics.py | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index a1e28c3181c9..4129c8cb4475 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -116,12 +116,11 @@ def extract_instrinsics_from_llvmint(llvmint, intrinsics):
     ]
 
     json_file = os.path.join(llvmint, "target/doc/llvmint.json")
-    if not os.path.exists(json_file):
-        # We need to regenerate the documentation!
-        run_command(
-            ["cargo", "rustdoc", "--", "-Zunstable-options", "--output-format", "json"],
-            cwd=llvmint,
-        )
+    # We need to regenerate the documentation!
+    run_command(
+        ["cargo", "rustdoc", "--", "-Zunstable-options", "--output-format", "json"],
+        cwd=llvmint,
+    )
     with open(json_file, "r", encoding="utf8") as f:
         json_data = json.loads(f.read())
     for p in json_data["paths"]:

From bac878c9a334e60291f8c77cd02f24e35ac7b637 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 15 May 2022 15:13:48 +0200
Subject: [PATCH 095/997] Add instrinsics from aweinstock314's llvmint as well

---
 tools/generate_intrinsics.py | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index 4129c8cb4475..849c6e9c9816 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -16,7 +16,7 @@ def run_command(command, cwd=None):
 def clone_repository(repo_name, path, repo_url, sub_path=None):
     if os.path.exists(path):
         while True:
-            choice = input("There is already a `{}` folder, do you want to update it? [y/N]".format(repo_name))
+            choice = input("There is already a `{}` folder, do you want to update it? [y/N]".format(path))
             if choice == "" or choice.lower() == "n":
                 print("Skipping repository update.")
                 return
@@ -159,13 +159,14 @@ def fill_intrinsics(intrinsics, from_intrinsics, all_intrinsics):
                 all_intrinsics[entry[0]] = entry[1]
 
 
-def update_intrinsics(llvm_path, llvmint):
+def update_intrinsics(llvm_path, llvmint, llvmint2):
     intrinsics_llvm = {}
     intrinsics_llvmint = {}
     all_intrinsics = {}
 
     extract_instrinsics_from_llvm(llvm_path, intrinsics_llvm)
     extract_instrinsics_from_llvmint(llvmint, intrinsics_llvmint)
+    extract_instrinsics_from_llvmint(llvmint2, intrinsics_llvmint)
 
     intrinsics = {}
     # We give priority to translations from LLVM over the ones from llvmint.
@@ -208,6 +209,10 @@ def main():
         os.path.dirname(os.path.abspath(__file__)),
         "llvmint",
     )
+    llvmint2_path = os.path.join(
+        os.path.dirname(os.path.abspath(__file__)),
+        "llvmint-2",
+    )
 
     # First, we clone the LLVM repository if it's not already here.
     clone_repository(
@@ -221,7 +226,12 @@ def main():
         llvmint_path,
         "https://github.com/GuillaumeGomez/llvmint",
     )
-    update_intrinsics(llvm_path, llvmint_path)
+    clone_repository(
+        "llvmint2",
+        llvmint2_path,
+        "https://github.com/antoyo/llvmint",
+    )
+    update_intrinsics(llvm_path, llvmint_path, llvmint2_path)
 
 
 if __name__ == "__main__":

From cede91971a023e8f18ad2f69a21f15a7e0ee67e9 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 15 May 2022 15:31:25 +0200
Subject: [PATCH 096/997] Add tools/llvmint-2 to ignored entries

---
 .gitignore | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.gitignore b/.gitignore
index ffd36ddb7db0..12ed56675639 100644
--- a/.gitignore
+++ b/.gitignore
@@ -22,3 +22,4 @@ gcc_path
 benchmarks
 tools/llvm-project
 tools/llvmint
+tools/llvmint-2

From f26eb5a7a2b484ec7331722bd13dd283c7990212 Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Wed, 25 May 2022 23:09:18 +0900
Subject: [PATCH 097/997] Update `gccjit`

---
 Cargo.lock | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index c5315e2392ef..6df2102470fe 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#6c2af0cf733a26740f01a7c679afc20431165a54"
+source = "git+https://github.com/antoyo/gccjit.rs#bdb86fb5092895ff5589726b33250010c64d93f6"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#6c2af0cf733a26740f01a7c679afc20431165a54"
+source = "git+https://github.com/antoyo/gccjit.rs#bdb86fb5092895ff5589726b33250010c64d93f6"
 dependencies = [
  "libc 0.1.12",
 ]

From 10a9c0e57f888b56fd396b913e0b0eeca1eb0d0c Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Thu, 26 May 2022 00:08:50 +0900
Subject: [PATCH 098/997] Mark immutable globals as read-only with
 `LValue::global_set_readonly`

---
 src/consts.rs | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index 4b517fd85f05..9517cf8494b0 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -47,7 +47,10 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
             }
         }
         let global_value = self.static_addr_of_mut(cv, align, kind);
-        // TODO(antoyo): set global constant.
+        #[cfg(feature = "master")]
+        self.global_lvalues.borrow().get(&global_value)
+            .expect("`static_addr_of_mut` did not add the global to `self.global_lvalues`")
+            .global_set_readonly();
         self.const_globals.borrow_mut().insert(cv, global_value);
         global_value
     }
@@ -88,7 +91,8 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
         // mutability are placed into read-only memory.
         if !is_mutable {
             if self.type_is_freeze(ty) {
-                // TODO(antoyo): set global constant.
+                #[cfg(feature = "master")]
+                global.global_set_readonly();
             }
         }
 

From 8697dec5327c7bf103dd15756ad54a54f38a4f66 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 6 Jun 2022 20:57:49 -0400
Subject: [PATCH 099/997] Update toolchain

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index db14ea2bebca..b20aeb979ad7 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2022-03-26"
+channel = "nightly-2022-06-06"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From fb69f73d67337e740fad0cfd5a9221f7757ff5f2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 6 Jun 2022 21:17:14 -0400
Subject: [PATCH 100/997] Fix exactudiv

---
 src/builder.rs |  5 ++++-
 src/common.rs  | 59 ++++++++++++++++++++++++++++++++++++++++++++++++--
 src/context.rs | 15 +++++++++++++
 3 files changed, 76 insertions(+), 3 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 726ecd626a07..fa490fe3f222 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -492,8 +492,11 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn exactudiv(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        // TODO(antoyo): convert the arguments to unsigned?
         // TODO(antoyo): poison if not exact.
+        let a_type = a.get_type().to_unsigned(self);
+        let a = self.gcc_int_cast(a, a_type);
+        let b_type = b.get_type().to_unsigned(self);
+        let b = self.gcc_int_cast(b, b_type);
         a / b
     }
 
diff --git a/src/common.rs b/src/common.rs
index 478c6a611690..ce341406eaf4 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -279,6 +279,21 @@ impl<'gcc, 'tcx> SignType<'gcc, 'tcx> for Type<'gcc> {
         else if self.is_u128(cx) {
             cx.i128_type
         }
+        else if self.is_uchar(cx) {
+            cx.char_type
+        }
+        else if self.is_ushort(cx) {
+            cx.short_type
+        }
+        else if self.is_uint(cx) {
+            cx.int_type
+        }
+        else if self.is_ulong(cx) {
+            cx.long_type
+        }
+        else if self.is_ulonglong(cx) {
+            cx.longlong_type
+        }
         else {
             self.clone()
         }
@@ -300,6 +315,21 @@ impl<'gcc, 'tcx> SignType<'gcc, 'tcx> for Type<'gcc> {
         else if self.is_i128(cx) {
             cx.u128_type
         }
+        else if self.is_char(cx) {
+            cx.uchar_type
+        }
+        else if self.is_short(cx) {
+            cx.ushort_type
+        }
+        else if self.is_int(cx) {
+            cx.uint_type
+        }
+        else if self.is_long(cx) {
+            cx.ulong_type
+        }
+        else if self.is_longlong(cx) {
+            cx.ulonglong_type
+        }
         else {
             self.clone()
         }
@@ -312,6 +342,11 @@ pub trait TypeReflection<'gcc, 'tcx>  {
     fn is_uint(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
     fn is_ulong(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
     fn is_ulonglong(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
+    fn is_char(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
+    fn is_short(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
+    fn is_int(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
+    fn is_long(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
+    fn is_longlong(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
 
     fn is_i8(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
     fn is_u8(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
@@ -332,11 +367,11 @@ pub trait TypeReflection<'gcc, 'tcx>  {
 
 impl<'gcc, 'tcx> TypeReflection<'gcc, 'tcx> for Type<'gcc> {
     fn is_uchar(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
-        self.unqualified() == cx.u8_type
+        self.unqualified() == cx.uchar_type
     }
 
     fn is_ushort(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
-        self.unqualified() == cx.u16_type
+        self.unqualified() == cx.ushort_type
     }
 
     fn is_uint(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
@@ -351,6 +386,26 @@ impl<'gcc, 'tcx> TypeReflection<'gcc, 'tcx> for Type<'gcc> {
         self.unqualified() == cx.ulonglong_type
     }
 
+    fn is_char(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
+        self.unqualified() == cx.char_type
+    }
+
+    fn is_short(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
+        self.unqualified() == cx.short_type
+    }
+
+    fn is_int(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
+        self.unqualified() == cx.int_type
+    }
+
+    fn is_long(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
+        self.unqualified() == cx.long_type
+    }
+
+    fn is_longlong(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
+        self.unqualified() == cx.longlong_type
+    }
+
     fn is_i8(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
         self.unqualified() == cx.i8_type
     }
diff --git a/src/context.rs b/src/context.rs
index 76c1c1c4c357..44f36cfa4cad 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -54,10 +54,15 @@ pub struct CodegenCx<'gcc, 'tcx> {
     pub u128_type: Type<'gcc>,
     pub usize_type: Type<'gcc>,
 
+    pub char_type: Type<'gcc>,
+    pub uchar_type: Type<'gcc>,
+    pub short_type: Type<'gcc>,
+    pub ushort_type: Type<'gcc>,
     pub int_type: Type<'gcc>,
     pub uint_type: Type<'gcc>,
     pub long_type: Type<'gcc>,
     pub ulong_type: Type<'gcc>,
+    pub longlong_type: Type<'gcc>,
     pub ulonglong_type: Type<'gcc>,
     pub sizet_type: Type<'gcc>,
 
@@ -146,10 +151,15 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let float_type = context.new_type::<f32>();
         let double_type = context.new_type::<f64>();
 
+        let char_type = context.new_c_type(CType::Char);
+        let uchar_type = context.new_c_type(CType::UChar);
+        let short_type = context.new_c_type(CType::Short);
+        let ushort_type = context.new_c_type(CType::UShort);
         let int_type = context.new_c_type(CType::Int);
         let uint_type = context.new_c_type(CType::UInt);
         let long_type = context.new_c_type(CType::Long);
         let ulong_type = context.new_c_type(CType::ULong);
+        let longlong_type = context.new_c_type(CType::LongLong);
         let ulonglong_type = context.new_c_type(CType::ULongLong);
         let sizet_type = context.new_c_type(CType::SizeT);
 
@@ -202,10 +212,15 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             u32_type,
             u64_type,
             u128_type,
+            char_type,
+            uchar_type,
+            short_type,
+            ushort_type,
             int_type,
             uint_type,
             long_type,
             ulong_type,
+            longlong_type,
             ulonglong_type,
             sizet_type,
 

From 3b3594044327ea6a426e0b95dd3ffee725089430 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 14 May 2022 17:36:37 -0400
Subject: [PATCH 101/997] Implement more SIMD

---
 Cargo.toml            |   4 +-
 src/builder.rs        |   2 +-
 src/intrinsic/llvm.rs | 115 +++++++++++++++++++++++++++----------
 src/intrinsic/simd.rs | 130 ++++++++----------------------------------
 4 files changed, 113 insertions(+), 138 deletions(-)

diff --git a/Cargo.toml b/Cargo.toml
index 211d19a8dc89..0e41bec8b762 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,10 +22,10 @@ default = ["master"]
 master = ["gccjit/master"]
 
 [dependencies]
-gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
+#gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
 
 # Local copy.
-#gccjit = { path = "../gccjit.rs" }
+gccjit = { path = "../gccjit.rs" }
 
 target-lexicon = "0.10.0"
 
diff --git a/src/builder.rs b/src/builder.rs
index fa490fe3f222..e7adf29fed8e 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1409,7 +1409,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     #[cfg(not(feature="master"))]
-    pub fn vector_reduce<F>(&mut self, src: RValue<'gcc>, op: F) -> RValue<'gcc>
+    pub fn vector_reduce<F>(&mut self, _src: RValue<'gcc>, _op: F) -> RValue<'gcc>
     where F: Fn(RValue<'gcc>, RValue<'gcc>, &'gcc Context<'gcc>) -> RValue<'gcc>
     {
         unimplemented!();
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 1b089f08f764..6b78157410b0 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -75,38 +75,38 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 "__builtin_ia32_pternlogd512_mask" | "__builtin_ia32_pternlogd256_mask"
                     | "__builtin_ia32_pternlogd128_mask" | "__builtin_ia32_pternlogq512_mask"
                     | "__builtin_ia32_pternlogq256_mask" | "__builtin_ia32_pternlogq128_mask" => {
-                        let mut new_args = args.to_vec();
+                    let mut new_args = args.to_vec();
+                    let arg5_type = gcc_func.get_param_type(4);
+                    let minus_one = builder.context.new_rvalue_from_int(arg5_type, -1);
+                    new_args.push(minus_one);
+                    args = new_args.into();
+                },
+                "__builtin_ia32_vfmaddps512_mask" | "__builtin_ia32_vfmaddpd512_mask" => {
+                    let mut new_args = args.to_vec();
+
+                    let mut last_arg = None;
+                    if args.len() == 4 {
+                        last_arg = new_args.pop();
+                    }
+
+                    let arg4_type = gcc_func.get_param_type(3);
+                    let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                    new_args.push(minus_one);
+
+                    if args.len() == 3 {
+                        // Both llvm.fma.v16f32 and llvm.x86.avx512.vfmadd.ps.512 maps to
+                        // the same GCC intrinsic, but the former has 3 parameters and the
+                        // latter has 4 so it doesn't require this additional argument.
                         let arg5_type = gcc_func.get_param_type(4);
-                        let minus_one = builder.context.new_rvalue_from_int(arg5_type, -1);
-                        new_args.push(minus_one);
-                        args = new_args.into();
-                    },
-                    "__builtin_ia32_vfmaddps512_mask" | "__builtin_ia32_vfmaddpd512_mask" => {
-                        let mut new_args = args.to_vec();
+                        new_args.push(builder.context.new_rvalue_from_int(arg5_type, 4));
+                    }
 
-                        let mut last_arg = None;
-                        if args.len() == 4 {
-                            last_arg = new_args.pop();
-                        }
+                    if let Some(last_arg) = last_arg {
+                        new_args.push(last_arg);
+                    }
 
-                        let arg4_type = gcc_func.get_param_type(3);
-                        let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
-                        new_args.push(minus_one);
-
-                        if args.len() == 3 {
-                            // Both llvm.fma.v16f32 and llvm.x86.avx512.vfmadd.ps.512 maps to
-                            // the same GCC intrinsic, but the former has 3 parameters and the
-                            // latter has 4 so it doesn't require this additional argument.
-                            let arg5_type = gcc_func.get_param_type(4);
-                            new_args.push(builder.context.new_rvalue_from_int(arg5_type, 4));
-                        }
-
-                        if let Some(last_arg) = last_arg {
-                            new_args.push(last_arg);
-                        }
-
-                        args = new_args.into();
-                    },
+                    args = new_args.into();
+                },
                     "__builtin_ia32_addps512_mask" | "__builtin_ia32_addpd512_mask"
                         | "__builtin_ia32_subps512_mask" | "__builtin_ia32_subpd512_mask"
                         | "__builtin_ia32_mulps512_mask" | "__builtin_ia32_mulpd512_mask"
@@ -131,6 +131,18 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                         new_args.push(last_arg);
                         args = new_args.into();
                     },
+                    "__builtin_ia32_cvtdq2ps512_mask" | "__builtin_ia32_cvtudq2ps512_mask" => {
+                        let mut new_args = args.to_vec();
+                        let last_arg = new_args.pop().expect("last arg");
+                        let arg2_type = gcc_func.get_param_type(1);
+                        let undefined = builder.current_func().new_local(None, arg2_type, "undefined_for_intrinsic").to_rvalue();
+                        new_args.push(undefined);
+                        let arg3_type = gcc_func.get_param_type(2);
+                        let minus_one = builder.context.new_rvalue_from_int(arg3_type, -1);
+                        new_args.push(minus_one);
+                        new_args.push(last_arg);
+                        args = new_args.into();
+                    },
                     _ => (),
         }
     }
@@ -149,7 +161,8 @@ pub fn ignore_arg_cast(func_name: &str, index: usize, args_len: usize) -> bool {
             | "__builtin_ia32_subps512_mask" | "__builtin_ia32_subpd512_mask"
             | "__builtin_ia32_mulps512_mask" | "__builtin_ia32_mulpd512_mask"
             | "__builtin_ia32_divps512_mask" | "__builtin_ia32_divpd512_mask"
-            | "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
+            | "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask"
+            | "__builtin_ia32_cvtdq2ps512_mask" | "__builtin_ia32_cvtudq2ps512_mask" => {
                 if index == args_len - 1 {
                     return true;
                 }
@@ -221,6 +234,48 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.div.pd.512" => "__builtin_ia32_divpd512_mask",
         "llvm.x86.avx512.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
         "llvm.x86.avx512.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
+        "llvm.x86.avx512.sitofp.round.v16f32.v16i32" => "__builtin_ia32_cvtdq2ps512_mask",
+        "llvm.x86.avx512.uitofp.round.v16f32.v16i32" => "__builtin_ia32_cvtudq2ps512_mask",
+        "llvm.x86.avx512.mask.cvttps2dq.256" => "__builtin_ia32_cvttps2dq256_mask",
+        "llvm.x86.avx512.mask.cvttps2dq.128" => "__builtin_ia32_cvttps2dq128_mask",
+        "llvm.x86.avx512.mask.cvttpd2dq.256" => "__builtin_ia32_cvttpd2dq256_mask",
+        "llvm.x86.avx512.mask.compress.d.512" => "__builtin_ia32_compresssi512_mask",
+        "llvm.x86.avx512.mask.compress.d.256" => "__builtin_ia32_compresssi256_mask",
+        "llvm.x86.avx512.mask.compress.d.128" => "__builtin_ia32_compresssi128_mask",
+        "llvm.x86.avx512.mask.compress.q.512" => "__builtin_ia32_compressdi512_mask",
+        "llvm.x86.avx512.mask.compress.q.256" => "__builtin_ia32_compressdi256_mask",
+        "llvm.x86.avx512.mask.compress.q.128" => "__builtin_ia32_compressdi128_mask",
+        "llvm.x86.avx512.mask.compress.ps.512" => "__builtin_ia32_compresssf512_mask",
+        "llvm.x86.avx512.mask.compress.ps.256" => "__builtin_ia32_compresssf256_mask",
+        "llvm.x86.avx512.mask.compress.ps.128" => "__builtin_ia32_compresssf128_mask",
+        "llvm.x86.avx512.mask.compress.pd.512" => "__builtin_ia32_compressdf512_mask",
+        "llvm.x86.avx512.mask.compress.pd.256" => "__builtin_ia32_compressdf256_mask",
+        "llvm.x86.avx512.mask.compress.pd.128" => "__builtin_ia32_compressdf128_mask",
+        "llvm.x86.avx512.mask.compress.store.d.512" => "",
+        "llvm.x86.avx512.mask.compress.store.d.256" => "",
+        "llvm.x86.avx512.mask.compress.store.d.128" => "",
+        "llvm.x86.avx512.mask.compress.store.q.512" => "",
+        "llvm.x86.avx512.mask.compress.store.q.256" => "",
+        "llvm.x86.avx512.mask.compress.store.q.128" => "",
+        "llvm.x86.avx512.mask.compress.store.ps.512" => "",
+        "llvm.x86.avx512.mask.compress.store.ps.256" => "",
+        "llvm.x86.avx512.mask.compress.store.ps.128" => "",
+        "llvm.x86.avx512.mask.compress.store.pd.512" => "",
+        "llvm.x86.avx512.mask.compress.store.pd.256" => "",
+        "llvm.x86.avx512.mask.compress.store.pd.128" => "",
+        "llvm.x86.avx512.mask.expand.d.512" => "",
+        "llvm.x86.avx512.mask.expand.d.256" => "",
+        "llvm.x86.avx512.mask.expand.d.128" => "",
+        "llvm.x86.avx512.mask.expand.q.512" => "",
+        "" => "",
+        "" => "",
+        "" => "",
+        "" => "",
+        "" => "",
+        "" => "",
+        "" => "",
+        "" => "",
+        "" => "",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 870e9f776a4f..a6cf99c62fff 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -1,5 +1,3 @@
-use std::cmp::Ordering;
-
 use gccjit::{BinaryOp, RValue, Type, ToRValue};
 use rustc_codegen_ssa::base::compare_simd_types;
 use rustc_codegen_ssa::common::{TypeKind, span_invalid_monomorphization_error};
@@ -309,117 +307,37 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
 
         enum Style {
             Float,
-            Int(/* is signed? */ bool),
+            Int,
             Unsupported,
         }
 
-        let (in_style, in_width) = match in_elem.kind() {
-            // vectors of pointer-sized integers should've been
-            // disallowed before here, so this unwrap is safe.
-            ty::Int(i) => (
-                Style::Int(true),
-                i.normalize(bx.tcx().sess.target.pointer_width).bit_width().unwrap(),
-            ),
-            ty::Uint(u) => (
-                Style::Int(false),
-                u.normalize(bx.tcx().sess.target.pointer_width).bit_width().unwrap(),
-            ),
-            ty::Float(f) => (Style::Float, f.bit_width()),
-            _ => (Style::Unsupported, 0),
-        };
-        let (out_style, out_width) = match out_elem.kind() {
-            ty::Int(i) => (
-                Style::Int(true),
-                i.normalize(bx.tcx().sess.target.pointer_width).bit_width().unwrap(),
-            ),
-            ty::Uint(u) => (
-                Style::Int(false),
-                u.normalize(bx.tcx().sess.target.pointer_width).bit_width().unwrap(),
-            ),
-            ty::Float(f) => (Style::Float, f.bit_width()),
-            _ => (Style::Unsupported, 0),
-        };
-
-        let extend = |in_type, out_type| {
-            let vector_type = bx.context.new_vector_type(out_type, 8);
-            let vector = args[0].immediate();
-            let array_type = bx.context.new_array_type(None, in_type, 8);
-            // TODO(antoyo): switch to using new_vector_access or __builtin_convertvector for vector casting.
-            let array = bx.context.new_bitcast(None, vector, array_type);
-
-            let cast_vec_element = |index| {
-                let index = bx.context.new_rvalue_from_int(bx.int_type, index);
-                bx.context.new_cast(None, bx.context.new_array_access(None, array, index).to_rvalue(), out_type)
+        let in_style =
+            match in_elem.kind() {
+                ty::Int(_) | ty::Uint(_) => Style::Int,
+                ty::Float(_) => Style::Float,
+                 _ => Style::Unsupported,
             };
 
-            bx.context.new_rvalue_from_vector(None, vector_type, &[
-                cast_vec_element(0),
-                cast_vec_element(1),
-                cast_vec_element(2),
-                cast_vec_element(3),
-                cast_vec_element(4),
-                cast_vec_element(5),
-                cast_vec_element(6),
-                cast_vec_element(7),
-            ])
-        };
+        let out_style =
+            match out_elem.kind() {
+                ty::Int(_) | ty::Uint(_) => Style::Int,
+                ty::Float(_) => Style::Float,
+                 _ => Style::Unsupported,
+            };
 
         match (in_style, out_style) {
-            (Style::Int(in_is_signed), Style::Int(_)) => {
-                return Ok(match in_width.cmp(&out_width) {
-                    Ordering::Greater => bx.trunc(args[0].immediate(), llret_ty),
-                    Ordering::Equal => args[0].immediate(),
-                    Ordering::Less => {
-                        if in_is_signed {
-                            match (in_width, out_width) {
-                                // FIXME(antoyo): the function _mm_cvtepi8_epi16 should directly
-                                // call an intrinsic equivalent to __builtin_ia32_pmovsxbw128 so that
-                                // we can generate a call to it.
-                                (8, 16) => extend(bx.i8_type, bx.i16_type),
-                                (8, 32) => extend(bx.i8_type, bx.i32_type),
-                                (8, 64) => extend(bx.i8_type, bx.i64_type),
-                                (16, 32) => extend(bx.i16_type, bx.i32_type),
-                                (32, 64) => extend(bx.i32_type, bx.i64_type),
-                                (16, 64) => extend(bx.i16_type, bx.i64_type),
-                                _ => unimplemented!("in: {}, out: {}", in_width, out_width),
-                            }
-                        } else {
-                            match (in_width, out_width) {
-                                (8, 16) => extend(bx.u8_type, bx.u16_type),
-                                (8, 32) => extend(bx.u8_type, bx.u32_type),
-                                (8, 64) => extend(bx.u8_type, bx.u64_type),
-                                (16, 32) => extend(bx.u16_type, bx.u32_type),
-                                (16, 64) => extend(bx.u16_type, bx.u64_type),
-                                (32, 64) => extend(bx.u32_type, bx.u64_type),
-                                _ => unimplemented!("in: {}, out: {}", in_width, out_width),
-                            }
-                        }
-                    }
-                });
-            }
-            (Style::Int(_), Style::Float) => {
-                // TODO: add support for internal functions in libgccjit to get access to IFN_VEC_CONVERT which is
-                // doing like __builtin_convertvector?
-                // Or maybe provide convert_vector as an API since it might not easy to get the
-                // types of internal functions.
-                unimplemented!();
-            }
-            (Style::Float, Style::Int(_)) => {
-                unimplemented!();
-            }
-            (Style::Float, Style::Float) => {
-                unimplemented!();
-            }
-            _ => { /* Unsupported. Fallthrough. */ }
+            (Style::Unsupported, Style::Unsupported) => {
+                require!(
+                    false,
+                    "unsupported cast from `{}` with element `{}` to `{}` with element `{}`",
+                    in_ty,
+                    in_elem,
+                    ret_ty,
+                    out_elem
+                );
+            },
+            _ => return Ok(bx.context.convert_vector(None, args[0].immediate(), llret_ty)),
         }
-        require!(
-            false,
-            "unsupported cast from `{}` with element `{}` to `{}` with element `{}`",
-            in_ty,
-            in_elem,
-            ret_ty,
-            out_elem
-        );
     }
 
     macro_rules! arith_binary {
@@ -590,6 +508,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                 );
             }
         };
+        // TODO(antoyo): don't use target specific builtins here.
+        // Not sure how easy it would be to avoid theme here.
         let builtin_name =
             match (signed, is_add, in_len, elem_width) {
                 (true, true, 32, 8) => "__builtin_ia32_paddsb256", // TODO(antoyo): cast arguments to unsigned.

From 4e802c84c587bf0524fe672ed81ed97e33afea9d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 15 May 2022 10:49:09 -0400
Subject: [PATCH 102/997] Remove intrinsics that were adding by the updated
 script

---
 src/intrinsic/llvm.rs | 132 +++++++++++++++---------------------------
 1 file changed, 47 insertions(+), 85 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 6b78157410b0..a4cd05a13c70 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -107,43 +107,53 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
 
                     args = new_args.into();
                 },
-                    "__builtin_ia32_addps512_mask" | "__builtin_ia32_addpd512_mask"
-                        | "__builtin_ia32_subps512_mask" | "__builtin_ia32_subpd512_mask"
-                        | "__builtin_ia32_mulps512_mask" | "__builtin_ia32_mulpd512_mask"
-                        | "__builtin_ia32_divps512_mask" | "__builtin_ia32_divpd512_mask" => {
-                        let mut new_args = args.to_vec();
-                        let last_arg = new_args.pop().expect("last arg");
-                        let arg3_type = gcc_func.get_param_type(2);
-                        let undefined = builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue();
-                        new_args.push(undefined);
-                        let arg4_type = gcc_func.get_param_type(3);
-                        let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
-                        new_args.push(minus_one);
-                        new_args.push(last_arg);
-                        args = new_args.into();
-                    },
-                    "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
-                        let mut new_args = args.to_vec();
-                        let last_arg = new_args.pop().expect("last arg");
-                        let arg4_type = gcc_func.get_param_type(3);
-                        let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
-                        new_args.push(minus_one);
-                        new_args.push(last_arg);
-                        args = new_args.into();
-                    },
-                    "__builtin_ia32_cvtdq2ps512_mask" | "__builtin_ia32_cvtudq2ps512_mask" => {
-                        let mut new_args = args.to_vec();
-                        let last_arg = new_args.pop().expect("last arg");
-                        let arg2_type = gcc_func.get_param_type(1);
-                        let undefined = builder.current_func().new_local(None, arg2_type, "undefined_for_intrinsic").to_rvalue();
-                        new_args.push(undefined);
-                        let arg3_type = gcc_func.get_param_type(2);
-                        let minus_one = builder.context.new_rvalue_from_int(arg3_type, -1);
-                        new_args.push(minus_one);
-                        new_args.push(last_arg);
-                        args = new_args.into();
-                    },
-                    _ => (),
+                "__builtin_ia32_addps512_mask" | "__builtin_ia32_addpd512_mask"
+                    | "__builtin_ia32_subps512_mask" | "__builtin_ia32_subpd512_mask"
+                    | "__builtin_ia32_mulps512_mask" | "__builtin_ia32_mulpd512_mask"
+                    | "__builtin_ia32_divps512_mask" | "__builtin_ia32_divpd512_mask" => {
+                    let mut new_args = args.to_vec();
+                    let last_arg = new_args.pop().expect("last arg");
+                    let arg3_type = gcc_func.get_param_type(2);
+                    let undefined = builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue();
+                    new_args.push(undefined);
+                    let arg4_type = gcc_func.get_param_type(3);
+                    let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                    new_args.push(minus_one);
+                    new_args.push(last_arg);
+                    args = new_args.into();
+                },
+                "__builtin_ia32_prold512_mask" => {
+                    let mut new_args = args.to_vec();
+                    let arg3_type = gcc_func.get_param_type(2);
+                    let undefined = builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue();
+                    new_args.push(undefined);
+                    let arg4_type = gcc_func.get_param_type(3);
+                    let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                    new_args.push(minus_one);
+                    args = new_args.into();
+                },
+                "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
+                    let mut new_args = args.to_vec();
+                    let last_arg = new_args.pop().expect("last arg");
+                    let arg4_type = gcc_func.get_param_type(3);
+                    let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                    new_args.push(minus_one);
+                    new_args.push(last_arg);
+                    args = new_args.into();
+                },
+                "__builtin_ia32_cvtdq2ps512_mask" | "__builtin_ia32_cvtudq2ps512_mask" => {
+                    let mut new_args = args.to_vec();
+                    let last_arg = new_args.pop().expect("last arg");
+                    let arg2_type = gcc_func.get_param_type(1);
+                    let undefined = builder.current_func().new_local(None, arg2_type, "undefined_for_intrinsic").to_rvalue();
+                    new_args.push(undefined);
+                    let arg3_type = gcc_func.get_param_type(2);
+                    let minus_one = builder.context.new_rvalue_from_int(arg3_type, -1);
+                    new_args.push(minus_one);
+                    new_args.push(last_arg);
+                    args = new_args.into();
+                },
+                _ => (),
         }
     }
 
@@ -202,18 +212,10 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.sqrt.v2f64" => "__builtin_ia32_sqrtpd",
         "llvm.x86.avx512.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask",
         "llvm.x86.avx512.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask",
-        "llvm.x86.avx512.mask.pmaxs.q.256" => "__builtin_ia32_pmaxsq256_mask",
-        "llvm.x86.avx512.mask.pmaxs.q.128" => "__builtin_ia32_pmaxsq128_mask",
         "llvm.x86.avx512.max.ps.512" => "__builtin_ia32_maxps512_mask",
         "llvm.x86.avx512.max.pd.512" => "__builtin_ia32_maxpd512_mask",
-        "llvm.x86.avx512.mask.pmaxu.q.256" => "__builtin_ia32_pmaxuq256_mask",
-        "llvm.x86.avx512.mask.pmaxu.q.128" => "__builtin_ia32_pmaxuq128_mask",
-        "llvm.x86.avx512.mask.pmins.q.256" => "__builtin_ia32_pminsq256_mask",
-        "llvm.x86.avx512.mask.pmins.q.128" => "__builtin_ia32_pminsq128_mask",
         "llvm.x86.avx512.min.ps.512" => "__builtin_ia32_minps512_mask",
         "llvm.x86.avx512.min.pd.512" => "__builtin_ia32_minpd512_mask",
-        "llvm.x86.avx512.mask.pminu.q.256" => "__builtin_ia32_pminuq256_mask",
-        "llvm.x86.avx512.mask.pminu.q.128" => "__builtin_ia32_pminuq128_mask",
         "llvm.fma.v16f32" => "__builtin_ia32_vfmaddps512_mask",
         "llvm.fma.v8f64" => "__builtin_ia32_vfmaddpd512_mask",
         "llvm.x86.avx512.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
@@ -236,46 +238,6 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
         "llvm.x86.avx512.sitofp.round.v16f32.v16i32" => "__builtin_ia32_cvtdq2ps512_mask",
         "llvm.x86.avx512.uitofp.round.v16f32.v16i32" => "__builtin_ia32_cvtudq2ps512_mask",
-        "llvm.x86.avx512.mask.cvttps2dq.256" => "__builtin_ia32_cvttps2dq256_mask",
-        "llvm.x86.avx512.mask.cvttps2dq.128" => "__builtin_ia32_cvttps2dq128_mask",
-        "llvm.x86.avx512.mask.cvttpd2dq.256" => "__builtin_ia32_cvttpd2dq256_mask",
-        "llvm.x86.avx512.mask.compress.d.512" => "__builtin_ia32_compresssi512_mask",
-        "llvm.x86.avx512.mask.compress.d.256" => "__builtin_ia32_compresssi256_mask",
-        "llvm.x86.avx512.mask.compress.d.128" => "__builtin_ia32_compresssi128_mask",
-        "llvm.x86.avx512.mask.compress.q.512" => "__builtin_ia32_compressdi512_mask",
-        "llvm.x86.avx512.mask.compress.q.256" => "__builtin_ia32_compressdi256_mask",
-        "llvm.x86.avx512.mask.compress.q.128" => "__builtin_ia32_compressdi128_mask",
-        "llvm.x86.avx512.mask.compress.ps.512" => "__builtin_ia32_compresssf512_mask",
-        "llvm.x86.avx512.mask.compress.ps.256" => "__builtin_ia32_compresssf256_mask",
-        "llvm.x86.avx512.mask.compress.ps.128" => "__builtin_ia32_compresssf128_mask",
-        "llvm.x86.avx512.mask.compress.pd.512" => "__builtin_ia32_compressdf512_mask",
-        "llvm.x86.avx512.mask.compress.pd.256" => "__builtin_ia32_compressdf256_mask",
-        "llvm.x86.avx512.mask.compress.pd.128" => "__builtin_ia32_compressdf128_mask",
-        "llvm.x86.avx512.mask.compress.store.d.512" => "",
-        "llvm.x86.avx512.mask.compress.store.d.256" => "",
-        "llvm.x86.avx512.mask.compress.store.d.128" => "",
-        "llvm.x86.avx512.mask.compress.store.q.512" => "",
-        "llvm.x86.avx512.mask.compress.store.q.256" => "",
-        "llvm.x86.avx512.mask.compress.store.q.128" => "",
-        "llvm.x86.avx512.mask.compress.store.ps.512" => "",
-        "llvm.x86.avx512.mask.compress.store.ps.256" => "",
-        "llvm.x86.avx512.mask.compress.store.ps.128" => "",
-        "llvm.x86.avx512.mask.compress.store.pd.512" => "",
-        "llvm.x86.avx512.mask.compress.store.pd.256" => "",
-        "llvm.x86.avx512.mask.compress.store.pd.128" => "",
-        "llvm.x86.avx512.mask.expand.d.512" => "",
-        "llvm.x86.avx512.mask.expand.d.256" => "",
-        "llvm.x86.avx512.mask.expand.d.128" => "",
-        "llvm.x86.avx512.mask.expand.q.512" => "",
-        "" => "",
-        "" => "",
-        "" => "",
-        "" => "",
-        "" => "",
-        "" => "",
-        "" => "",
-        "" => "",
-        "" => "",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",

From f59d345fc1979ff0b9dc14f4ffcf6a3bd3c6368f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 15 May 2022 11:43:57 -0400
Subject: [PATCH 103/997] Refactor

---
 src/intrinsic/llvm.rs | 239 ++++++++++++++++++------------------------
 1 file changed, 100 insertions(+), 139 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index a4cd05a13c70..2a6739e74b00 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -9,151 +9,112 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
     // arguments here.
     if gcc_func.get_param_count() != args.len() {
         match &*func_name {
-            "__builtin_ia32_pmuldq512_mask" | "__builtin_ia32_pmuludq512_mask"
-                // FIXME(antoyo): the following intrinsics has 4 (or 5) arguments according to the doc, but is defined with 2 (or 3) arguments in library/stdarch/crates/core_arch/src/x86/avx512f.rs.
+            // NOTE: the following intrinsics have a different number of parameters in LLVM and GCC.
+            "__builtin_ia32_prold512_mask" | "__builtin_ia32_pmuldq512_mask" | "__builtin_ia32_pmuludq512_mask"
                 | "__builtin_ia32_pmaxsd512_mask" | "__builtin_ia32_pmaxsq512_mask" | "__builtin_ia32_pmaxsq256_mask"
-                | "__builtin_ia32_pmaxsq128_mask" | "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
-                | "__builtin_ia32_pmaxud512_mask" | "__builtin_ia32_pmaxuq512_mask" | "__builtin_ia32_pmaxuq256_mask"
-                | "__builtin_ia32_pmaxuq128_mask"
+                | "__builtin_ia32_pmaxsq128_mask" | "__builtin_ia32_pmaxud512_mask" | "__builtin_ia32_pmaxuq512_mask"
                 | "__builtin_ia32_pminsd512_mask" | "__builtin_ia32_pminsq512_mask" | "__builtin_ia32_pminsq256_mask"
-                | "__builtin_ia32_pminsq128_mask" | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask"
-                | "__builtin_ia32_pminud512_mask" | "__builtin_ia32_pminuq512_mask" | "__builtin_ia32_pminuq256_mask"
-                | "__builtin_ia32_pminuq128_mask" | "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask"
+                | "__builtin_ia32_pminsq128_mask" | "__builtin_ia32_pminud512_mask" | "__builtin_ia32_pminuq512_mask"
                 => {
-                    // TODO: refactor by separating those intrinsics outside of this branch.
-                    let add_before_last_arg =
-                        match &*func_name {
-                            "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
-                                | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask"
-                                | "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => true,
-                            _ => false,
-                        };
-                    let new_first_arg_is_zero =
-                        match &*func_name {
-                            "__builtin_ia32_pmaxuq256_mask" | "__builtin_ia32_pmaxuq128_mask"
-                                | "__builtin_ia32_pminuq256_mask" | "__builtin_ia32_pminuq128_mask" => true,
-                            _ => false
-                        };
-                    let arg3_index =
-                        match &*func_name {
-                            "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => 1,
-                            _ => 2,
-                        };
-                    let mut new_args = args.to_vec();
-                    let arg3_type = gcc_func.get_param_type(arg3_index);
-                    let first_arg =
-                        if new_first_arg_is_zero {
-                            let vector_type = arg3_type.dyncast_vector().expect("vector type");
-                            let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
-                            let num_units = vector_type.get_num_units();
-                            builder.context.new_rvalue_from_vector(None, arg3_type, &vec![zero; num_units])
-                        }
-                        else {
-                            builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue()
-                        };
-                    if add_before_last_arg {
-                        new_args.insert(new_args.len() - 1, first_arg);
-                    }
-                    else {
-                        new_args.push(first_arg);
-                    }
-                    let arg4_index =
-                        match &*func_name {
-                            "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => 2,
-                            _ => 3,
-                        };
-                    let arg4_type = gcc_func.get_param_type(arg4_index);
-                    let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
-                    if add_before_last_arg {
-                        new_args.insert(new_args.len() - 1, minus_one);
-                    }
-                    else {
-                        new_args.push(minus_one);
-                    }
-                    args = new_args.into();
-                },
-                "__builtin_ia32_pternlogd512_mask" | "__builtin_ia32_pternlogd256_mask"
-                    | "__builtin_ia32_pternlogd128_mask" | "__builtin_ia32_pternlogq512_mask"
-                    | "__builtin_ia32_pternlogq256_mask" | "__builtin_ia32_pternlogq128_mask" => {
-                    let mut new_args = args.to_vec();
+                let mut new_args = args.to_vec();
+                let arg3_type = gcc_func.get_param_type(2);
+                let first_arg = builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue();
+                new_args.push(first_arg);
+                let arg4_type = gcc_func.get_param_type(3);
+                let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                new_args.push(minus_one);
+                args = new_args.into();
+            },
+            "__builtin_ia32_pmaxuq256_mask" | "__builtin_ia32_pmaxuq128_mask"
+                | "__builtin_ia32_pminuq256_mask" | "__builtin_ia32_pminuq128_mask"
+                => {
+                let mut new_args = args.to_vec();
+                let arg3_type = gcc_func.get_param_type(2);
+                let vector_type = arg3_type.dyncast_vector().expect("vector type");
+                let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
+                let num_units = vector_type.get_num_units();
+                let first_arg = builder.context.new_rvalue_from_vector(None, arg3_type, &vec![zero; num_units]);
+                new_args.push(first_arg);
+                let arg4_type = gcc_func.get_param_type(3);
+                let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                new_args.push(minus_one);
+                args = new_args.into();
+            },
+            "__builtin_ia32_pternlogd512_mask" | "__builtin_ia32_pternlogd256_mask"
+                | "__builtin_ia32_pternlogd128_mask" | "__builtin_ia32_pternlogq512_mask"
+                | "__builtin_ia32_pternlogq256_mask" | "__builtin_ia32_pternlogq128_mask" => {
+                let mut new_args = args.to_vec();
+                let arg5_type = gcc_func.get_param_type(4);
+                let minus_one = builder.context.new_rvalue_from_int(arg5_type, -1);
+                new_args.push(minus_one);
+                args = new_args.into();
+            },
+            "__builtin_ia32_vfmaddps512_mask" | "__builtin_ia32_vfmaddpd512_mask" => {
+                let mut new_args = args.to_vec();
+
+                let mut last_arg = None;
+                if args.len() == 4 {
+                    last_arg = new_args.pop();
+                }
+
+                let arg4_type = gcc_func.get_param_type(3);
+                let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                new_args.push(minus_one);
+
+                if args.len() == 3 {
+                    // Both llvm.fma.v16f32 and llvm.x86.avx512.vfmadd.ps.512 maps to
+                    // the same GCC intrinsic, but the former has 3 parameters and the
+                    // latter has 4 so it doesn't require this additional argument.
                     let arg5_type = gcc_func.get_param_type(4);
-                    let minus_one = builder.context.new_rvalue_from_int(arg5_type, -1);
-                    new_args.push(minus_one);
-                    args = new_args.into();
-                },
-                "__builtin_ia32_vfmaddps512_mask" | "__builtin_ia32_vfmaddpd512_mask" => {
-                    let mut new_args = args.to_vec();
+                    new_args.push(builder.context.new_rvalue_from_int(arg5_type, 4));
+                }
 
-                    let mut last_arg = None;
-                    if args.len() == 4 {
-                        last_arg = new_args.pop();
-                    }
-
-                    let arg4_type = gcc_func.get_param_type(3);
-                    let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
-                    new_args.push(minus_one);
-
-                    if args.len() == 3 {
-                        // Both llvm.fma.v16f32 and llvm.x86.avx512.vfmadd.ps.512 maps to
-                        // the same GCC intrinsic, but the former has 3 parameters and the
-                        // latter has 4 so it doesn't require this additional argument.
-                        let arg5_type = gcc_func.get_param_type(4);
-                        new_args.push(builder.context.new_rvalue_from_int(arg5_type, 4));
-                    }
-
-                    if let Some(last_arg) = last_arg {
-                        new_args.push(last_arg);
-                    }
-
-                    args = new_args.into();
-                },
-                "__builtin_ia32_addps512_mask" | "__builtin_ia32_addpd512_mask"
-                    | "__builtin_ia32_subps512_mask" | "__builtin_ia32_subpd512_mask"
-                    | "__builtin_ia32_mulps512_mask" | "__builtin_ia32_mulpd512_mask"
-                    | "__builtin_ia32_divps512_mask" | "__builtin_ia32_divpd512_mask" => {
-                    let mut new_args = args.to_vec();
-                    let last_arg = new_args.pop().expect("last arg");
-                    let arg3_type = gcc_func.get_param_type(2);
-                    let undefined = builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue();
-                    new_args.push(undefined);
-                    let arg4_type = gcc_func.get_param_type(3);
-                    let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
-                    new_args.push(minus_one);
+                if let Some(last_arg) = last_arg {
                     new_args.push(last_arg);
-                    args = new_args.into();
-                },
-                "__builtin_ia32_prold512_mask" => {
-                    let mut new_args = args.to_vec();
-                    let arg3_type = gcc_func.get_param_type(2);
-                    let undefined = builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue();
-                    new_args.push(undefined);
-                    let arg4_type = gcc_func.get_param_type(3);
-                    let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
-                    new_args.push(minus_one);
-                    args = new_args.into();
-                },
-                "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
-                    let mut new_args = args.to_vec();
-                    let last_arg = new_args.pop().expect("last arg");
-                    let arg4_type = gcc_func.get_param_type(3);
-                    let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
-                    new_args.push(minus_one);
-                    new_args.push(last_arg);
-                    args = new_args.into();
-                },
-                "__builtin_ia32_cvtdq2ps512_mask" | "__builtin_ia32_cvtudq2ps512_mask" => {
-                    let mut new_args = args.to_vec();
-                    let last_arg = new_args.pop().expect("last arg");
-                    let arg2_type = gcc_func.get_param_type(1);
-                    let undefined = builder.current_func().new_local(None, arg2_type, "undefined_for_intrinsic").to_rvalue();
-                    new_args.push(undefined);
-                    let arg3_type = gcc_func.get_param_type(2);
-                    let minus_one = builder.context.new_rvalue_from_int(arg3_type, -1);
-                    new_args.push(minus_one);
-                    new_args.push(last_arg);
-                    args = new_args.into();
-                },
-                _ => (),
+                }
+
+                args = new_args.into();
+            },
+            "__builtin_ia32_addps512_mask" | "__builtin_ia32_addpd512_mask"
+                | "__builtin_ia32_subps512_mask" | "__builtin_ia32_subpd512_mask"
+                | "__builtin_ia32_mulps512_mask" | "__builtin_ia32_mulpd512_mask"
+                | "__builtin_ia32_divps512_mask" | "__builtin_ia32_divpd512_mask"
+                | "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
+                |  "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask" => {
+                let mut new_args = args.to_vec();
+                let last_arg = new_args.pop().expect("last arg");
+                let arg3_type = gcc_func.get_param_type(2);
+                let undefined = builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue();
+                new_args.push(undefined);
+                let arg4_type = gcc_func.get_param_type(3);
+                let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                new_args.push(minus_one);
+                new_args.push(last_arg);
+                args = new_args.into();
+            },
+            "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
+                let mut new_args = args.to_vec();
+                let last_arg = new_args.pop().expect("last arg");
+                let arg4_type = gcc_func.get_param_type(3);
+                let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                new_args.push(minus_one);
+                new_args.push(last_arg);
+                args = new_args.into();
+            },
+            "__builtin_ia32_cvtdq2ps512_mask" | "__builtin_ia32_cvtudq2ps512_mask"
+                | "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => {
+                let mut new_args = args.to_vec();
+                let last_arg = new_args.pop().expect("last arg");
+                let arg2_type = gcc_func.get_param_type(1);
+                let undefined = builder.current_func().new_local(None, arg2_type, "undefined_for_intrinsic").to_rvalue();
+                new_args.push(undefined);
+                let arg3_type = gcc_func.get_param_type(2);
+                let minus_one = builder.context.new_rvalue_from_int(arg3_type, -1);
+                new_args.push(minus_one);
+                new_args.push(last_arg);
+                args = new_args.into();
+            },
+            _ => (),
         }
     }
 

From 2fa6a9080b5c3bc963f649832f1fdf9fbcd8abd2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 15 May 2022 12:07:28 -0400
Subject: [PATCH 104/997] Add more SIMD

---
 src/intrinsic/llvm.rs | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 2a6739e74b00..241cff204590 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -15,6 +15,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 | "__builtin_ia32_pmaxsq128_mask" | "__builtin_ia32_pmaxud512_mask" | "__builtin_ia32_pmaxuq512_mask"
                 | "__builtin_ia32_pminsd512_mask" | "__builtin_ia32_pminsq512_mask" | "__builtin_ia32_pminsq256_mask"
                 | "__builtin_ia32_pminsq128_mask" | "__builtin_ia32_pminud512_mask" | "__builtin_ia32_pminuq512_mask"
+                | "__builtin_ia32_prolq512_mask" | "__builtin_ia32_prorq512_mask"
                 => {
                 let mut new_args = args.to_vec();
                 let arg3_type = gcc_func.get_param_type(2);
@@ -25,8 +26,11 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 new_args.push(minus_one);
                 args = new_args.into();
             },
-            "__builtin_ia32_pmaxuq256_mask" | "__builtin_ia32_pmaxuq128_mask"
-                | "__builtin_ia32_pminuq256_mask" | "__builtin_ia32_pminuq128_mask"
+            "__builtin_ia32_pmaxuq256_mask" | "__builtin_ia32_pmaxuq128_mask" | "__builtin_ia32_pminuq256_mask"
+                | "__builtin_ia32_pminuq128_mask" | "__builtin_ia32_prold256_mask" | "__builtin_ia32_prold128_mask"
+                | "__builtin_ia32_prord512_mask" | "__builtin_ia32_prord256_mask" | "__builtin_ia32_prord128_mask"
+                | "__builtin_ia32_prolq256_mask" | "__builtin_ia32_prolq128_mask" | "__builtin_ia32_prorq256_mask"
+                | "__builtin_ia32_prorq128_mask"
                 => {
                 let mut new_args = args.to_vec();
                 let arg3_type = gcc_func.get_param_type(2);

From 06073c9dfc15dd07b611e3497539dcab547ce185 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 15 May 2022 20:55:51 -0400
Subject: [PATCH 105/997] Add more SIMD

---
 src/builder.rs        |   6 +-
 src/intrinsic/llvm.rs | 213 ++++++++++++++++++++++++++++++++++++++-
 src/intrinsic/simd.rs | 226 ++++++++++++++++++++++++++++--------------
 3 files changed, 362 insertions(+), 83 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index e7adf29fed8e..b23d12cb0b6b 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -286,10 +286,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
-            let result = current_func.new_local(None, return_type, &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
             let func_name = format!("{:?}", func_ptr);
             let args = llvm::adjust_intrinsic_arguments(&self, gcc_func, args, &func_name);
-            self.block.add_assignment(None, result, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
+            let return_value = self.cx.context.new_call_through_ptr(None, func_ptr, &args);
+            let return_value = llvm::adjust_intrinsic_return_value(&self, return_value, &func_name, &args);
+            let result = current_func.new_local(None, return_value.get_type(), &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
+            self.block.add_assignment(None, result, return_value);
             result.to_rvalue()
         }
         else {
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 241cff204590..0e75724122cf 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -15,7 +15,17 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 | "__builtin_ia32_pmaxsq128_mask" | "__builtin_ia32_pmaxud512_mask" | "__builtin_ia32_pmaxuq512_mask"
                 | "__builtin_ia32_pminsd512_mask" | "__builtin_ia32_pminsq512_mask" | "__builtin_ia32_pminsq256_mask"
                 | "__builtin_ia32_pminsq128_mask" | "__builtin_ia32_pminud512_mask" | "__builtin_ia32_pminuq512_mask"
-                | "__builtin_ia32_prolq512_mask" | "__builtin_ia32_prorq512_mask"
+                | "__builtin_ia32_prolq512_mask" | "__builtin_ia32_prorq512_mask" | "__builtin_ia32_pslldi512_mask"
+                | "__builtin_ia32_psrldi512_mask" | "__builtin_ia32_psllqi512_mask" | "__builtin_ia32_psrlqi512_mask"
+                | "__builtin_ia32_pslld512_mask" | "__builtin_ia32_psrld512_mask" | "__builtin_ia32_psllq512_mask"
+                | "__builtin_ia32_psrlq512_mask" | "__builtin_ia32_psrad512_mask" | "__builtin_ia32_psraq512_mask"
+                | "__builtin_ia32_psradi512_mask" | "__builtin_ia32_psraqi512_mask" | "__builtin_ia32_psrav16si_mask"
+                | "__builtin_ia32_psrav8di_mask" | "__builtin_ia32_prolvd512_mask" | "__builtin_ia32_prorvd512_mask"
+                | "__builtin_ia32_prolvq512_mask" | "__builtin_ia32_prorvq512_mask" | "__builtin_ia32_psllv16si_mask"
+                | "__builtin_ia32_psrlv16si_mask" | "__builtin_ia32_psllv8di_mask" | "__builtin_ia32_psrlv8di_mask"
+                | "__builtin_ia32_permvarsi512_mask" | "__builtin_ia32_vpermilvarps512_mask"
+                | "__builtin_ia32_vpermilvarpd512_mask" | "__builtin_ia32_permvardi512_mask"
+                | "__builtin_ia32_permvarsf512_mask"
                 => {
                 let mut new_args = args.to_vec();
                 let arg3_type = gcc_func.get_param_type(2);
@@ -30,7 +40,12 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 | "__builtin_ia32_pminuq128_mask" | "__builtin_ia32_prold256_mask" | "__builtin_ia32_prold128_mask"
                 | "__builtin_ia32_prord512_mask" | "__builtin_ia32_prord256_mask" | "__builtin_ia32_prord128_mask"
                 | "__builtin_ia32_prolq256_mask" | "__builtin_ia32_prolq128_mask" | "__builtin_ia32_prorq256_mask"
-                | "__builtin_ia32_prorq128_mask"
+                | "__builtin_ia32_prorq128_mask" | "__builtin_ia32_psraq256_mask" | "__builtin_ia32_psraq128_mask"
+                | "__builtin_ia32_psraqi256_mask" | "__builtin_ia32_psraqi128_mask" | "__builtin_ia32_psravq256_mask"
+                | "__builtin_ia32_psravq128_mask" | "__builtin_ia32_prolvd256_mask" | "__builtin_ia32_prolvd128_mask"
+                | "__builtin_ia32_prorvd256_mask" | "__builtin_ia32_prorvd128_mask" | "__builtin_ia32_prolvq256_mask"
+                | "__builtin_ia32_prolvq128_mask" | "__builtin_ia32_prorvq256_mask" | "__builtin_ia32_prorvq128_mask"
+                | "__builtin_ia32_permvardi256_mask" | "__builtin_ia32_permvardf512_mask" | "__builtin_ia32_permvardf256_mask"
                 => {
                 let mut new_args = args.to_vec();
                 let arg3_type = gcc_func.get_param_type(2);
@@ -105,6 +120,18 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 new_args.push(last_arg);
                 args = new_args.into();
             },
+            "__builtin_ia32_vpermi2vard512_mask" | "__builtin_ia32_vpermi2vard256_mask"
+                | "__builtin_ia32_vpermi2vard128_mask" | "__builtin_ia32_vpermi2varq512_mask"
+                | "__builtin_ia32_vpermi2varq256_mask" | "__builtin_ia32_vpermi2varq128_mask"
+                | "__builtin_ia32_vpermi2varps512_mask" | "__builtin_ia32_vpermi2varps256_mask"
+                | "__builtin_ia32_vpermi2varps128_mask" | "__builtin_ia32_vpermi2varpd512_mask"
+                | "__builtin_ia32_vpermi2varpd256_mask" | "__builtin_ia32_vpermi2varpd128_mask" => {
+                let mut new_args = args.to_vec();
+                let arg4_type = gcc_func.get_param_type(3);
+                let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                new_args.push(minus_one);
+                args = new_args.into();
+            },
             "__builtin_ia32_cvtdq2ps512_mask" | "__builtin_ia32_cvtudq2ps512_mask"
                 | "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => {
                 let mut new_args = args.to_vec();
@@ -118,6 +145,52 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 new_args.push(last_arg);
                 args = new_args.into();
             },
+            "__builtin_ia32_stmxcsr" => {
+                args = vec![].into();
+            },
+            "__builtin_ia32_addcarryx_u64" => {
+                let mut new_args = args.to_vec();
+                let arg2_type = gcc_func.get_param_type(1);
+                let variable = builder.current_func().new_local(None, arg2_type, "addcarryResult");
+                new_args.push(variable.get_address(None));
+                args = new_args.into();
+            },
+            _ => (),
+        }
+    }
+    else {
+        match &*func_name {
+            "__builtin_ia32_rndscaless_mask_round" | "__builtin_ia32_rndscalesd_mask_round" => {
+                let new_args = args.to_vec();
+                let arg3_type = gcc_func.get_param_type(2);
+                let arg3 = builder.context.new_cast(None, new_args[4], arg3_type);
+                let arg4_type = gcc_func.get_param_type(3);
+                let arg4 = builder.context.new_bitcast(None, new_args[2], arg4_type);
+                args = vec![new_args[0], new_args[1], arg3, arg4, new_args[3], new_args[5]].into();
+            },
+            // NOTE: the LLVM intrinsic receives 3 floats, but the GCC builtin requires 3 vectors.
+            // FIXME: the intrinsics like _mm_mask_fmadd_sd should probably directly call the GCC
+            // instrinsic to avoid this.
+            "__builtin_ia32_vfmaddss3_round" => {
+                let new_args = args.to_vec();
+                let arg1_type = gcc_func.get_param_type(0);
+                let arg2_type = gcc_func.get_param_type(1);
+                let arg3_type = gcc_func.get_param_type(2);
+                let a = builder.context.new_rvalue_from_vector(None, arg1_type, &[new_args[0]; 4]);
+                let b = builder.context.new_rvalue_from_vector(None, arg2_type, &[new_args[1]; 4]);
+                let c = builder.context.new_rvalue_from_vector(None, arg3_type, &[new_args[2]; 4]);
+                args = vec![a, b, c, new_args[3]].into();
+            },
+            "__builtin_ia32_vfmaddsd3_round" => {
+                let new_args = args.to_vec();
+                let arg1_type = gcc_func.get_param_type(0);
+                let arg2_type = gcc_func.get_param_type(1);
+                let arg3_type = gcc_func.get_param_type(2);
+                let a = builder.context.new_rvalue_from_vector(None, arg1_type, &[new_args[0]; 2]);
+                let b = builder.context.new_rvalue_from_vector(None, arg2_type, &[new_args[1]; 2]);
+                let c = builder.context.new_rvalue_from_vector(None, arg3_type, &[new_args[2]; 2]);
+                args = vec![a, b, c, new_args[3]].into();
+            },
             _ => (),
         }
     }
@@ -125,11 +198,30 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
     args
 }
 
+pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc, 'tcx>, mut return_value: RValue<'gcc>, func_name: &str, args: &[RValue<'gcc>]) -> RValue<'gcc> {
+    match func_name {
+        "__builtin_ia32_vfmaddss3_round" | "__builtin_ia32_vfmaddsd3_round" => {
+            let zero = builder.context.new_rvalue_zero(builder.int_type);
+            return_value = builder.context.new_vector_access(None, return_value, zero).to_rvalue();
+        },
+        "__builtin_ia32_addcarryx_u64" => {
+            let last_arg = args.last().expect("last arg");
+            let field1 = builder.context.new_field(None, builder.u8_type, "carryFlag");
+            let field2 = builder.context.new_field(None, builder.ulonglong_type, "carryResult");
+            let struct_type = builder.context.new_struct_type(None, "addcarryResult", &[field1, field2]);
+            return_value = builder.context.new_struct_constructor(None, struct_type.as_type(), None, &[return_value, last_arg.dereference(None).to_rvalue()]);
+        },
+        _ => (),
+    }
+
+    return_value
+}
+
 pub fn ignore_arg_cast(func_name: &str, index: usize, args_len: usize) -> bool {
-    // NOTE: these intrinsics have missing parameters before the last one, so ignore the
-    // last argument type check.
     // FIXME(antoyo): find a way to refactor in order to avoid this hack.
     match func_name {
+        // NOTE: these intrinsics have missing parameters before the last one, so ignore the
+        // last argument type check.
         "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
             | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask" | "__builtin_ia32_sqrtps512_mask"
             | "__builtin_ia32_sqrtpd512_mask" | "__builtin_ia32_addps512_mask" | "__builtin_ia32_addpd512_mask"
@@ -142,6 +234,11 @@ pub fn ignore_arg_cast(func_name: &str, index: usize, args_len: usize) -> bool {
                     return true;
                 }
             },
+        "__builtin_ia32_rndscaless_mask_round" | "__builtin_ia32_rndscalesd_mask_round" => {
+            if index == 2 || index == 3 {
+                return true;
+            }
+        },
         "__builtin_ia32_vfmaddps512_mask" | "__builtin_ia32_vfmaddpd512_mask" => {
             // Since there are two LLVM intrinsics that map to each of these GCC builtins and only
             // one of them has a missing parameter before the last one, we check the number of
@@ -150,6 +247,8 @@ pub fn ignore_arg_cast(func_name: &str, index: usize, args_len: usize) -> bool {
                 return true;
             }
         },
+        // NOTE: the LLVM intrinsic receives 3 floats, but the GCC builtin requires 3 vectors.
+        "__builtin_ia32_vfmaddss3_round" | "__builtin_ia32_vfmaddsd3_round" => return true,
         _ => (),
     }
 
@@ -203,6 +302,47 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
         "llvm.x86.avx512.sitofp.round.v16f32.v16i32" => "__builtin_ia32_cvtdq2ps512_mask",
         "llvm.x86.avx512.uitofp.round.v16f32.v16i32" => "__builtin_ia32_cvtudq2ps512_mask",
+        "llvm.x86.avx512.mask.ucmp.d.512" => "__builtin_ia32_ucmpd512_mask",
+        "llvm.x86.avx512.mask.ucmp.d.256" => "__builtin_ia32_ucmpd256_mask",
+        "llvm.x86.avx512.mask.ucmp.d.128" => "__builtin_ia32_ucmpd128_mask",
+        "llvm.x86.avx512.mask.cmp.d.512" => "__builtin_ia32_cmpd512_mask",
+        "llvm.x86.avx512.mask.cmp.d.256" => "__builtin_ia32_cmpd256_mask",
+        "llvm.x86.avx512.mask.cmp.d.128" => "__builtin_ia32_cmpd128_mask",
+        "llvm.x86.avx512.mask.ucmp.q.512" => "__builtin_ia32_ucmpq512_mask",
+        "llvm.x86.avx512.mask.ucmp.q.256" => "__builtin_ia32_ucmpq256_mask",
+        "llvm.x86.avx512.mask.ucmp.q.128" => "__builtin_ia32_ucmpq128_mask",
+        "llvm.x86.avx512.mask.cmp.q.512" => "__builtin_ia32_cmpq512_mask",
+        "llvm.x86.avx512.mask.cmp.q.256" => "__builtin_ia32_cmpq256_mask",
+        "llvm.x86.avx512.mask.cmp.q.128" => "__builtin_ia32_cmpq128_mask",
+        "llvm.x86.avx512.mask.max.ss.round" => "__builtin_ia32_maxss_mask_round",
+        "llvm.x86.avx512.mask.max.sd.round" => "__builtin_ia32_maxsd_mask_round",
+        "llvm.x86.avx512.mask.min.ss.round" => "__builtin_ia32_minss_mask_round",
+        "llvm.x86.avx512.mask.min.sd.round" => "__builtin_ia32_minsd_mask_round",
+        "llvm.x86.avx512.mask.sqrt.ss" => "__builtin_ia32_sqrtss_mask_round",
+        "llvm.x86.avx512.mask.sqrt.sd" => "__builtin_ia32_sqrtsd_mask_round",
+        "llvm.x86.avx512.mask.getexp.ss" => "__builtin_ia32_getexpss_mask_round",
+        "llvm.x86.avx512.mask.getexp.sd" => "__builtin_ia32_getexpsd_mask_round",
+        "llvm.x86.avx512.mask.getmant.ss" => "__builtin_ia32_getmantss_mask_round",
+        "llvm.x86.avx512.mask.getmant.sd" => "__builtin_ia32_getmantsd_mask_round",
+        "llvm.x86.avx512.mask.rndscale.ss" => "__builtin_ia32_rndscaless_mask_round",
+        "llvm.x86.avx512.mask.rndscale.sd" => "__builtin_ia32_rndscalesd_mask_round",
+        "llvm.x86.avx512.mask.scalef.ss" => "__builtin_ia32_scalefss_mask_round",
+        "llvm.x86.avx512.mask.scalef.sd" => "__builtin_ia32_scalefsd_mask_round",
+        "llvm.x86.avx512.vfmadd.f32" => "__builtin_ia32_vfmaddss3_round",
+        "llvm.x86.avx512.vfmadd.f64" => "__builtin_ia32_vfmaddsd3_round",
+        "llvm.ceil.v4f64" => "__builtin_ia32_ceilpd256",
+        "llvm.ceil.v8f32" => "__builtin_ia32_ceilps256",
+        "llvm.floor.v4f64" => "__builtin_ia32_floorpd256",
+        "llvm.floor.v8f32" => "__builtin_ia32_floorps256",
+        "llvm.sqrt.v4f64" => "__builtin_ia32_sqrtpd256",
+        "llvm.x86.sse.stmxcsr" => "__builtin_ia32_stmxcsr",
+        "llvm.x86.sse.ldmxcsr" => "__builtin_ia32_ldmxcsr",
+        "llvm.ctpop.v16i32" => "__builtin_ia32_vpopcountd_v16si",
+        "llvm.ctpop.v8i32" => "__builtin_ia32_vpopcountd_v8si",
+        "llvm.ctpop.v4i32" => "__builtin_ia32_vpopcountd_v4si",
+        "llvm.ctpop.v8i64" => "__builtin_ia32_vpopcountq_v8di",
+        "llvm.ctpop.v4i64" => "__builtin_ia32_vpopcountq_v4di",
+        "llvm.ctpop.v2i64" => "__builtin_ia32_vpopcountq_v2di",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",
@@ -221,7 +361,70 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx2.gather.q.q.256" => "__builtin_ia32_gatherdiv4di",
         "llvm.x86.avx2.gather.q.pd" => "__builtin_ia32_gatherdiv2df",
         "llvm.x86.avx2.gather.q.pd.256" => "__builtin_ia32_gatherdiv4df",
-        "" => "",
+        "llvm.x86.avx512.pslli.d.512" => "__builtin_ia32_pslldi512_mask",
+        "llvm.x86.avx512.psrli.d.512" => "__builtin_ia32_psrldi512_mask",
+        "llvm.x86.avx512.pslli.q.512" => "__builtin_ia32_psllqi512_mask",
+        "llvm.x86.avx512.psrli.q.512" => "__builtin_ia32_psrlqi512_mask",
+        "llvm.x86.avx512.psll.d.512" => "__builtin_ia32_pslld512_mask",
+        "llvm.x86.avx512.psrl.d.512" => "__builtin_ia32_psrld512_mask",
+        "llvm.x86.avx512.psll.q.512" => "__builtin_ia32_psllq512_mask",
+        "llvm.x86.avx512.psrl.q.512" => "__builtin_ia32_psrlq512_mask",
+        "llvm.x86.avx512.psra.d.512" => "__builtin_ia32_psrad512_mask",
+        "llvm.x86.avx512.psra.q.512" => "__builtin_ia32_psraq512_mask",
+        "llvm.x86.avx512.psra.q.256" => "__builtin_ia32_psraq256_mask",
+        "llvm.x86.avx512.psra.q.128" => "__builtin_ia32_psraq128_mask",
+        "llvm.x86.avx512.psrai.d.512" => "__builtin_ia32_psradi512_mask",
+        "llvm.x86.avx512.psrai.q.512" => "__builtin_ia32_psraqi512_mask",
+        "llvm.x86.avx512.psrai.q.256" => "__builtin_ia32_psraqi256_mask",
+        "llvm.x86.avx512.psrai.q.128" => "__builtin_ia32_psraqi128_mask",
+        "llvm.x86.avx512.psrav.d.512" => "__builtin_ia32_psrav16si_mask",
+        "llvm.x86.avx512.psrav.q.512" => "__builtin_ia32_psrav8di_mask",
+        "llvm.x86.avx512.psrav.q.256" => "__builtin_ia32_psravq256_mask",
+        "llvm.x86.avx512.psrav.q.128" => "__builtin_ia32_psravq128_mask",
+        "llvm.x86.avx512.psllv.d.512" => "__builtin_ia32_psllv16si_mask",
+        "llvm.x86.avx512.psrlv.d.512" => "__builtin_ia32_psrlv16si_mask",
+        "llvm.x86.avx512.psllv.q.512" => "__builtin_ia32_psllv8di_mask",
+        "llvm.x86.avx512.psrlv.q.512" => "__builtin_ia32_psrlv8di_mask",
+        "llvm.x86.avx512.permvar.si.512" => "__builtin_ia32_permvarsi512_mask",
+        "llvm.x86.avx512.vpermilvar.ps.512" => "__builtin_ia32_vpermilvarps512_mask",
+        "llvm.x86.avx512.vpermilvar.pd.512" => "__builtin_ia32_vpermilvarpd512_mask",
+        "llvm.x86.avx512.permvar.di.512" => "__builtin_ia32_permvardi512_mask",
+        "llvm.x86.avx512.permvar.di.256" => "__builtin_ia32_permvardi256_mask",
+        "llvm.x86.avx512.permvar.sf.512" => "__builtin_ia32_permvarsf512_mask",
+        "llvm.x86.avx512.permvar.df.512" => "__builtin_ia32_permvardf512_mask",
+        "llvm.x86.avx512.permvar.df.256" => "__builtin_ia32_permvardf256_mask",
+        "llvm.x86.avx512.vpermi2var.d.512" => "__builtin_ia32_vpermi2vard512_mask",
+        "llvm.x86.avx512.vpermi2var.d.256" => "__builtin_ia32_vpermi2vard256_mask",
+        "llvm.x86.avx512.vpermi2var.d.128" => "__builtin_ia32_vpermi2vard128_mask",
+        "llvm.x86.avx512.vpermi2var.q.512" => "__builtin_ia32_vpermi2varq512_mask",
+        "llvm.x86.avx512.vpermi2var.q.256" => "__builtin_ia32_vpermi2varq256_mask",
+        "llvm.x86.avx512.vpermi2var.q.128" => "__builtin_ia32_vpermi2varq128_mask",
+        "llvm.x86.avx512.vpermi2var.ps.512" => "__builtin_ia32_vpermi2varps512_mask",
+        "llvm.x86.avx512.vpermi2var.ps.256" => "__builtin_ia32_vpermi2varps256_mask",
+        "llvm.x86.avx512.vpermi2var.ps.128" => "__builtin_ia32_vpermi2varps128_mask",
+        "llvm.x86.avx512.vpermi2var.pd.512" => "__builtin_ia32_vpermi2varpd512_mask",
+        "llvm.x86.avx512.vpermi2var.pd.256" => "__builtin_ia32_vpermi2varpd256_mask",
+        "llvm.x86.avx512.vpermi2var.pd.128" => "__builtin_ia32_vpermi2varpd128_mask",
+        "llvm.x86.avx512.mask.add.ss.round" => "__builtin_ia32_addss_mask_round",
+        "llvm.x86.avx512.mask.add.sd.round" => "__builtin_ia32_addsd_mask_round",
+        "llvm.x86.avx512.mask.sub.ss.round" => "__builtin_ia32_subss_mask_round",
+        "llvm.x86.avx512.mask.sub.sd.round" => "__builtin_ia32_subsd_mask_round",
+        "llvm.x86.avx512.mask.mul.ss.round" => "__builtin_ia32_mulss_mask_round",
+        "llvm.x86.avx512.mask.mul.sd.round" => "__builtin_ia32_mulsd_mask_round",
+        "llvm.x86.avx512.mask.div.ss.round" => "__builtin_ia32_divss_mask_round",
+        "llvm.x86.avx512.mask.div.sd.round" => "__builtin_ia32_divsd_mask_round",
+        "llvm.x86.avx512.mask.cvtss2sd.round" => "__builtin_ia32_cvtss2sd_mask_round",
+        "llvm.x86.avx512.mask.cvtsd2ss.round" => "__builtin_ia32_cvtsd2ss_mask_round",
+        "llvm.x86.aesni.aesenc.256" => "__builtin_ia32_vaesenc_v32qi",
+        "llvm.x86.aesni.aesenclast.256" => "__builtin_ia32_vaesenclast_v32qi",
+        "llvm.x86.aesni.aesdec.256" => "__builtin_ia32_vaesdec_v32qi",
+        "llvm.x86.aesni.aesdeclast.256" => "__builtin_ia32_vaesdeclast_v32qi",
+        "llvm.x86.aesni.aesenc.512" => "__builtin_ia32_vaesenc_v64qi",
+        "llvm.x86.aesni.aesenclast.512" => "__builtin_ia32_vaesenclast_v64qi",
+        "llvm.x86.aesni.aesdec.512" => "__builtin_ia32_vaesdec_v64qi",
+        "llvm.x86.aesni.aesdeclast.512" => "__builtin_ia32_vaesdeclast_v64qi",
+        "llvm.x86.addcarry.64" => "__builtin_ia32_addcarryx_u64",
+
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),
     };
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index a6cf99c62fff..bf5d555736ae 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -1,4 +1,4 @@
-use gccjit::{BinaryOp, RValue, Type, ToRValue};
+use gccjit::{BinaryOp, RValue, Type, ToRValue, ComparisonOp, UnaryOp};
 use rustc_codegen_ssa::base::compare_simd_types;
 use rustc_codegen_ssa::common::{TypeKind, span_invalid_monomorphization_error};
 use rustc_codegen_ssa::mir::operand::OperandRef;
@@ -213,48 +213,12 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let vector = args[0].immediate();
         let index = args[1].immediate();
         let value = args[2].immediate();
-        // TODO(antoyo): use a recursive unqualified() here.
-        let vector_type = vector.get_type().unqualified().dyncast_vector().expect("vector type");
-        let element_type = vector_type.get_element_type();
-        // NOTE: we cannot cast to an array and assign to its element here because the value might
-        // not be an l-value. So, call a builtin to set the element.
-        // TODO(antoyo): perhaps we could create a new vector or maybe there's a GIMPLE instruction for that?
-        // TODO(antoyo): don't use target specific builtins here.
-        let func_name =
-            match in_len {
-                2 => {
-                    if element_type == bx.i64_type {
-                        "__builtin_ia32_vec_set_v2di"
-                    }
-                    else {
-                        unimplemented!();
-                    }
-                },
-                4 => {
-                    if element_type == bx.i32_type {
-                        "__builtin_ia32_vec_set_v4si"
-                    }
-                    else {
-                        unimplemented!();
-                    }
-                },
-                8 => {
-                    if element_type == bx.i16_type {
-                        "__builtin_ia32_vec_set_v8hi"
-                    }
-                    else {
-                        unimplemented!();
-                    }
-                },
-                _ => unimplemented!("Len: {}", in_len),
-            };
-        let builtin = bx.context.get_target_builtin_function(func_name);
-        let param1_type = builtin.get_param(0).to_rvalue().get_type();
-        // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
-        let vector = bx.cx.bitcast_if_needed(vector, param1_type);
-        let result = bx.context.new_call(None, builtin, &[vector, value, bx.context.new_cast(None, index, bx.int_type)]);
-        // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
-        return Ok(bx.context.new_bitcast(None, result, vector.get_type()));
+        let variable = bx.current_func().new_local(None, vector.get_type(), "new_vector");
+        bx.llbb().add_assignment(None, variable, vector);
+        let lvalue = bx.context.new_vector_access(None, variable.to_rvalue(), index);
+        // TODO: si simd_insert est constant, utiliser BIT_REF…
+        bx.llbb().add_assignment(None, lvalue, value);
+        return Ok(variable.to_rvalue());
     }
 
     #[cfg(feature="master")]
@@ -357,6 +321,67 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         }
     }
 
+    if name == sym::simd_bitmask {
+        // The `fn simd_bitmask(vector) -> unsigned integer` intrinsic takes a
+        // vector mask and returns the most significant bit (MSB) of each lane in the form
+        // of either:
+        // * an unsigned integer
+        // * an array of `u8`
+        // If the vector has less than 8 lanes, a u8 is returned with zeroed trailing bits.
+        //
+        // The bit order of the result depends on the byte endianness, LSB-first for little
+        // endian and MSB-first for big endian.
+
+        let vector = args[0].immediate();
+        let vector_type = vector.get_type().dyncast_vector().expect("vector type");
+        let elem_type = vector_type.get_element_type();
+        let mut shifts = vec![];
+        let mut masks = vec![];
+        let mut mask = 1;
+        for i in 0..in_len {
+            shifts.push(bx.context.new_rvalue_from_int(elem_type, i as i32));
+            masks.push(bx.context.new_rvalue_from_int(elem_type, mask));
+            mask <<= 1;
+        }
+        masks.reverse();
+        let shifts = bx.context.new_rvalue_from_vector(None, vector.get_type(), &shifts);
+        let shifted = vector >> shifts;
+        let masks = bx.context.new_rvalue_from_vector(None, vector.get_type(), &masks);
+        let masked = shifted & masks;
+        let reduced = bx.vector_reduce_op(masked, BinaryOp::BitwiseOr);
+
+        let expected_int_bits = in_len.max(8);
+        let expected_bytes = expected_int_bits / 8 + ((expected_int_bits % 8 > 0) as u64);
+
+        match ret_ty.kind() {
+            ty::Uint(i) if i.bit_width() == Some(expected_int_bits) => {
+                // Zero-extend iN to the bitmask type:
+                return Ok(bx.zext(reduced, bx.type_ix(expected_int_bits)));
+            }
+            ty::Array(elem, len)
+                if matches!(elem.kind(), ty::Uint(ty::UintTy::U8))
+                    && len.try_eval_usize(bx.tcx, ty::ParamEnv::reveal_all())
+                        == Some(expected_bytes) =>
+            {
+                // Zero-extend iN to the array length:
+                let ze = bx.zext(reduced, bx.type_ix(expected_bytes * 8));
+
+                // Convert the integer to a byte array
+                let ptr = bx.alloca(bx.type_ix(expected_bytes * 8), Align::ONE);
+                bx.store(ze, ptr, Align::ONE);
+                let array_ty = bx.type_array(bx.type_i8(), expected_bytes);
+                let ptr = bx.pointercast(ptr, bx.cx.type_ptr_to(array_ty));
+                return Ok(bx.load(array_ty, ptr, Align::ONE));
+            }
+            _ => return_error!(
+                "cannot return `{}`, expected `u{}` or `[u8; {}]`",
+                ret_ty,
+                expected_int_bits,
+                expected_bytes
+            ),
+        }
+    }
+
     fn simd_simple_float_intrinsic<'gcc, 'tcx>(
         name: Symbol,
         in_elem: Ty<'_>,
@@ -496,42 +521,91 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let rhs = args[1].immediate();
         let is_add = name == sym::simd_saturating_add;
         let ptr_bits = bx.tcx().data_layout.pointer_size.bits() as _;
-        let (signed, elem_width, elem_ty) = match *in_elem.kind() {
-            ty::Int(i) => (true, i.bit_width().unwrap_or(ptr_bits), bx.cx.type_int_from_ty(i)),
-            ty::Uint(i) => (false, i.bit_width().unwrap_or(ptr_bits), bx.cx.type_uint_from_ty(i)),
-            _ => {
-                return_error!(
-                    "expected element type `{}` of vector type `{}` \
+        let (signed, elem_width, elem_ty) =
+            match *in_elem.kind() {
+                ty::Int(i) => (true, i.bit_width().unwrap_or(ptr_bits) / 8, bx.cx.type_int_from_ty(i)),
+                ty::Uint(i) => (false, i.bit_width().unwrap_or(ptr_bits) / 8, bx.cx.type_uint_from_ty(i)),
+                _ => {
+                    return_error!(
+                        "expected element type `{}` of vector type `{}` \
                      to be a signed or unsigned integer type",
-                    arg_tys[0].simd_size_and_type(bx.tcx()).1,
-                    arg_tys[0]
-                );
-            }
-        };
-        // TODO(antoyo): don't use target specific builtins here.
-        // Not sure how easy it would be to avoid theme here.
-        let builtin_name =
-            match (signed, is_add, in_len, elem_width) {
-                (true, true, 32, 8) => "__builtin_ia32_paddsb256", // TODO(antoyo): cast arguments to unsigned.
-                (false, true, 32, 8) => "__builtin_ia32_paddusb256",
-                (true, true, 16, 16) => "__builtin_ia32_paddsw256",
-                (false, true, 16, 16) => "__builtin_ia32_paddusw256",
-                (true, false, 16, 16) => "__builtin_ia32_psubsw256",
-                (false, false, 16, 16) => "__builtin_ia32_psubusw256",
-                (true, false, 32, 8) => "__builtin_ia32_psubsb256",
-                (false, false, 32, 8) => "__builtin_ia32_psubusb256",
-                _ => unimplemented!("signed: {}, is_add: {}, in_len: {}, elem_width: {}", signed, is_add, in_len, elem_width),
+                     arg_tys[0].simd_size_and_type(bx.tcx()).1,
+                     arg_tys[0]
+                    );
+                }
             };
-        let vec_ty = bx.cx.type_vector(elem_ty, in_len as u64);
 
-        let func = bx.context.get_target_builtin_function(builtin_name);
-        let param1_type = func.get_param(0).to_rvalue().get_type();
-        let param2_type = func.get_param(1).to_rvalue().get_type();
-        let lhs = bx.cx.bitcast_if_needed(lhs, param1_type);
-        let rhs = bx.cx.bitcast_if_needed(rhs, param2_type);
-        let result = bx.context.new_call(None, func, &[lhs, rhs]);
-        // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
-        return Ok(bx.context.new_bitcast(None, result, vec_ty));
+        let result =
+            match (signed, is_add) {
+                (false, true) => {
+                    let res = lhs + rhs;
+                    let cmp = bx.context.new_comparison(None, ComparisonOp::LessThan, res, lhs);
+                    res | cmp
+                },
+                (true, true) => {
+                    // Algorithm from: https://codereview.stackexchange.com/questions/115869/saturated-signed-addition
+                    // TODO: improve using conditional operators if possible.
+                    let arg_type = lhs.get_type();
+                    // TODO: convert lhs and rhs to unsigned.
+                    let sum = lhs + rhs;
+                    let vector_type = arg_type.dyncast_vector().expect("vector type");
+                    let unit = vector_type.get_num_units();
+                    let a = bx.context.new_rvalue_from_int(elem_ty, ((elem_width as i32) << 3) - 1);
+                    let width = bx.context.new_rvalue_from_vector(None, lhs.get_type(), &vec![a; unit]);
+
+                    let xor1 = lhs ^ rhs;
+                    let xor2 = lhs ^ sum;
+                    let and = bx.context.new_unary_op(None, UnaryOp::BitwiseNegate, arg_type, xor1) & xor2;
+                    let mask = and >> width;
+
+                    let one = bx.context.new_rvalue_one(elem_ty);
+                    let ones = bx.context.new_rvalue_from_vector(None, lhs.get_type(), &vec![one; unit]);
+                    let shift1 = ones << width;
+                    let shift2 = sum >> width;
+                    let mask_min = shift1 ^ shift2;
+
+                    let and1 = bx.context.new_unary_op(None, UnaryOp::BitwiseNegate, arg_type, mask) & sum;
+                    let and2 = mask & mask_min;
+
+                    and1 + and2
+                },
+                (false, false) => {
+                    let res = lhs - rhs;
+                    let cmp = bx.context.new_comparison(None, ComparisonOp::LessThanEquals, res, lhs);
+                    res & cmp
+                },
+                (true, false) => {
+                    let arg_type = lhs.get_type();
+                    // TODO(antoyo): this uses the same algorithm from saturating add, but add the
+                    // negative of the right operand. Find a proper subtraction algorithm.
+                    let rhs = bx.context.new_unary_op(None, UnaryOp::Minus, arg_type, rhs);
+
+                    // TODO: convert lhs and rhs to unsigned.
+                    let sum = lhs + rhs;
+                    let vector_type = arg_type.dyncast_vector().expect("vector type");
+                    let unit = vector_type.get_num_units();
+                    let a = bx.context.new_rvalue_from_int(elem_ty, ((elem_width as i32) << 3) - 1);
+                    let width = bx.context.new_rvalue_from_vector(None, lhs.get_type(), &vec![a; unit]);
+
+                    let xor1 = lhs ^ rhs;
+                    let xor2 = lhs ^ sum;
+                    let and = bx.context.new_unary_op(None, UnaryOp::BitwiseNegate, arg_type, xor1) & xor2;
+                    let mask = and >> width;
+
+                    let one = bx.context.new_rvalue_one(elem_ty);
+                    let ones = bx.context.new_rvalue_from_vector(None, lhs.get_type(), &vec![one; unit]);
+                    let shift1 = ones << width;
+                    let shift2 = sum >> width;
+                    let mask_min = shift1 ^ shift2;
+
+                    let and1 = bx.context.new_unary_op(None, UnaryOp::BitwiseNegate, arg_type, mask) & sum;
+                    let and2 = mask & mask_min;
+
+                    and1 + and2
+                }
+            };
+
+        return Ok(result);
     }
 
     macro_rules! arith_red {

From df85771b34b745d2f9228cd260da9002a4a6cb60 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 4 Jun 2022 00:32:01 -0400
Subject: [PATCH 106/997] Add more SIMD

---
 src/intrinsic/llvm.rs | 92 ++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 87 insertions(+), 5 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 0e75724122cf..7154a89543c2 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1,6 +1,6 @@
 use std::borrow::Cow;
 
-use gccjit::{Function, FunctionPtrType, RValue, ToRValue};
+use gccjit::{Function, FunctionPtrType, RValue, ToRValue, UnaryOp};
 
 use crate::{context::CodegenCx, builder::Builder};
 
@@ -25,7 +25,10 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 | "__builtin_ia32_psrlv16si_mask" | "__builtin_ia32_psllv8di_mask" | "__builtin_ia32_psrlv8di_mask"
                 | "__builtin_ia32_permvarsi512_mask" | "__builtin_ia32_vpermilvarps512_mask"
                 | "__builtin_ia32_vpermilvarpd512_mask" | "__builtin_ia32_permvardi512_mask"
-                | "__builtin_ia32_permvarsf512_mask"
+                | "__builtin_ia32_permvarsf512_mask" | "__builtin_ia32_permvarqi512_mask"
+                | "__builtin_ia32_permvarqi256_mask" | "__builtin_ia32_permvarqi128_mask"
+                | "__builtin_ia32_vpmultishiftqb512_mask" | "__builtin_ia32_vpmultishiftqb256_mask"
+                | "__builtin_ia32_vpmultishiftqb128_mask"
                 => {
                 let mut new_args = args.to_vec();
                 let arg3_type = gcc_func.get_param_type(2);
@@ -59,6 +62,23 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 new_args.push(minus_one);
                 args = new_args.into();
             },
+            "__builtin_ia32_vplzcntd_512_mask" | "__builtin_ia32_vplzcntd_256_mask" | "__builtin_ia32_vplzcntd_128_mask"
+                | "__builtin_ia32_vplzcntq_512_mask" | "__builtin_ia32_vplzcntq_256_mask" | "__builtin_ia32_vplzcntq_128_mask"
+                | "__builtin_ia32_vpconflictsi_512_mask" | "__builtin_ia32_vpconflictsi_256_mask"
+                | "__builtin_ia32_vpconflictsi_128_mask" | "__builtin_ia32_vpconflictdi_512_mask"
+                | "__builtin_ia32_vpconflictdi_256_mask" | "__builtin_ia32_vpconflictdi_128_mask" => {
+                let mut new_args = args.to_vec();
+                let arg2_type = gcc_func.get_param_type(1);
+                let vector_type = arg2_type.dyncast_vector().expect("vector type");
+                let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
+                let num_units = vector_type.get_num_units();
+                let first_arg = builder.context.new_rvalue_from_vector(None, arg2_type, &vec![zero; num_units]);
+                new_args.push(first_arg);
+                let arg3_type = gcc_func.get_param_type(2);
+                let minus_one = builder.context.new_rvalue_from_int(arg3_type, -1);
+                new_args.push(minus_one);
+                args = new_args.into();
+            },
             "__builtin_ia32_pternlogd512_mask" | "__builtin_ia32_pternlogd256_mask"
                 | "__builtin_ia32_pternlogd128_mask" | "__builtin_ia32_pternlogq512_mask"
                 | "__builtin_ia32_pternlogq256_mask" | "__builtin_ia32_pternlogq128_mask" => {
@@ -148,13 +168,20 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
             "__builtin_ia32_stmxcsr" => {
                 args = vec![].into();
             },
-            "__builtin_ia32_addcarryx_u64" => {
+            "__builtin_ia32_addcarryx_u64" | "__builtin_ia32_sbb_u64" => {
                 let mut new_args = args.to_vec();
                 let arg2_type = gcc_func.get_param_type(1);
                 let variable = builder.current_func().new_local(None, arg2_type, "addcarryResult");
                 new_args.push(variable.get_address(None));
                 args = new_args.into();
             },
+            "__builtin_ia32_vpermt2varqi512_mask" | "__builtin_ia32_vpermt2varqi256_mask"
+                | "__builtin_ia32_vpermt2varqi128_mask" => {
+                let mut new_args = args.to_vec();
+                let arg4_type = gcc_func.get_param_type(3);
+                let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                args = vec![new_args[1], new_args[0], new_args[2], minus_one].into();
+            },
             _ => (),
         }
     }
@@ -191,6 +218,12 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 let c = builder.context.new_rvalue_from_vector(None, arg3_type, &[new_args[2]; 2]);
                 args = vec![a, b, c, new_args[3]].into();
             },
+            "__builtin_ia32_vfmaddsubpd256" | "__builtin_ia32_vfmaddsubps" | "__builtin_ia32_vfmaddsubps256" => {
+                let mut new_args = args.to_vec();
+                let arg3 = &mut new_args[2];
+                *arg3 = builder.context.new_unary_op(None, UnaryOp::Minus, arg3.get_type(), *arg3);
+                args = new_args.into();
+            },
             _ => (),
         }
     }
@@ -204,7 +237,7 @@ pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc,
             let zero = builder.context.new_rvalue_zero(builder.int_type);
             return_value = builder.context.new_vector_access(None, return_value, zero).to_rvalue();
         },
-        "__builtin_ia32_addcarryx_u64" => {
+        "__builtin_ia32_addcarryx_u64" | "__builtin_ia32_sbb_u64" => {
             let last_arg = args.last().expect("last arg");
             let field1 = builder.context.new_field(None, builder.u8_type, "carryFlag");
             let field2 = builder.context.new_field(None, builder.ulonglong_type, "carryResult");
@@ -343,6 +376,48 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.ctpop.v8i64" => "__builtin_ia32_vpopcountq_v8di",
         "llvm.ctpop.v4i64" => "__builtin_ia32_vpopcountq_v4di",
         "llvm.ctpop.v2i64" => "__builtin_ia32_vpopcountq_v2di",
+        "llvm.x86.addcarry.64" => "__builtin_ia32_addcarryx_u64",
+        "llvm.x86.subborrow.64" => "__builtin_ia32_sbb_u64",
+        "llvm.floor.v2f64" => "__builtin_ia32_floorpd",
+        "llvm.floor.v4f32" => "__builtin_ia32_floorps",
+        "llvm.ceil.v2f64" => "__builtin_ia32_ceilpd",
+        "llvm.ceil.v4f32" => "__builtin_ia32_ceilps",
+        "llvm.fma.v2f64" => "__builtin_ia32_vfmaddpd",
+        "llvm.fma.v4f64" => "__builtin_ia32_vfmaddpd256",
+        "llvm.fma.v4f32" => "__builtin_ia32_vfmaddps",
+        "llvm.fma.v8f32" => "__builtin_ia32_vfmaddps256",
+        "llvm.ctlz.v16i32" => "__builtin_ia32_vplzcntd_512_mask",
+        "llvm.ctlz.v8i32" => "__builtin_ia32_vplzcntd_256_mask",
+        "llvm.ctlz.v4i32" => "__builtin_ia32_vplzcntd_128_mask",
+        "llvm.ctlz.v8i64" => "__builtin_ia32_vplzcntq_512_mask",
+        "llvm.ctlz.v4i64" => "__builtin_ia32_vplzcntq_256_mask",
+        "llvm.ctlz.v2i64" => "__builtin_ia32_vplzcntq_128_mask",
+        "llvm.ctpop.v32i16" => "__builtin_ia32_vpopcountw_v32hi",
+        "llvm.x86.fma.vfmsub.sd" => "__builtin_ia32_vfmsubsd3",
+        "llvm.x86.fma.vfmsub.ss" => "__builtin_ia32_vfmsubss3",
+        "llvm.x86.fma.vfmsubadd.pd" => "__builtin_ia32_vfmaddsubpd",
+        "llvm.x86.fma.vfmsubadd.pd.256" => "__builtin_ia32_vfmaddsubpd256",
+        "llvm.x86.fma.vfmsubadd.ps" => "__builtin_ia32_vfmaddsubps",
+        "llvm.x86.fma.vfmsubadd.ps.256" => "__builtin_ia32_vfmaddsubps256",
+        "llvm.x86.fma.vfnmadd.sd" => "__builtin_ia32_vfnmaddsd3",
+        "llvm.x86.fma.vfnmadd.ss" => "__builtin_ia32_vfnmaddss3",
+        "llvm.x86.fma.vfnmsub.sd" => "__builtin_ia32_vfnmsubsd3",
+        "llvm.x86.fma.vfnmsub.ss" => "__builtin_ia32_vfnmsubss3",
+        "llvm.x86.avx512.conflict.d.512" => "__builtin_ia32_vpconflictsi_512_mask",
+        "llvm.x86.avx512.conflict.d.256" => "__builtin_ia32_vpconflictsi_256_mask",
+        "llvm.x86.avx512.conflict.d.128" => "__builtin_ia32_vpconflictsi_128_mask",
+        "llvm.x86.avx512.conflict.q.512" => "__builtin_ia32_vpconflictdi_512_mask",
+        "llvm.x86.avx512.conflict.q.256" => "__builtin_ia32_vpconflictdi_256_mask",
+        "llvm.x86.avx512.conflict.q.128" => "__builtin_ia32_vpconflictdi_128_mask",
+        "llvm.x86.avx512.vpermi2var.qi.512" => "__builtin_ia32_vpermt2varqi512_mask",
+        "llvm.x86.avx512.vpermi2var.qi.256" => "__builtin_ia32_vpermt2varqi256_mask",
+        "llvm.x86.avx512.vpermi2var.qi.128" => "__builtin_ia32_vpermt2varqi128_mask",
+        "llvm.x86.avx512.permvar.qi.512" => "__builtin_ia32_permvarqi512_mask",
+        "llvm.x86.avx512.permvar.qi.256" => "__builtin_ia32_permvarqi256_mask",
+        "llvm.x86.avx512.permvar.qi.128" => "__builtin_ia32_permvarqi128_mask",
+        "llvm.x86.avx512.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512_mask",
+        "llvm.x86.avx512.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256_mask",
+        "llvm.x86.avx512.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128_mask",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",
@@ -423,7 +498,14 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.aesni.aesenclast.512" => "__builtin_ia32_vaesenclast_v64qi",
         "llvm.x86.aesni.aesdec.512" => "__builtin_ia32_vaesdec_v64qi",
         "llvm.x86.aesni.aesdeclast.512" => "__builtin_ia32_vaesdeclast_v64qi",
-        "llvm.x86.addcarry.64" => "__builtin_ia32_addcarryx_u64",
+        "llvm.x86.avx512bf16.cvtne2ps2bf16.128" => "__builtin_ia32_cvtne2ps2bf16_v8hi",
+        "llvm.x86.avx512bf16.cvtne2ps2bf16.256" => "__builtin_ia32_cvtne2ps2bf16_v16hi",
+        "llvm.x86.avx512bf16.cvtne2ps2bf16.512" => "__builtin_ia32_cvtne2ps2bf16_v32hi",
+        "llvm.x86.avx512bf16.cvtneps2bf16.256" => "__builtin_ia32_cvtneps2bf16_v8sf",
+        "llvm.x86.avx512bf16.cvtneps2bf16.512" => "__builtin_ia32_cvtneps2bf16_v16sf",
+        "llvm.x86.avx512bf16.dpbf16ps.128" => "__builtin_ia32_dpbf16ps_v4sf",
+        "llvm.x86.avx512bf16.dpbf16ps.256" => "__builtin_ia32_dpbf16ps_v8sf",
+        "llvm.x86.avx512bf16.dpbf16ps.512" => "__builtin_ia32_dpbf16ps_v16sf",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),

From fe606eb4449e07e21959a52ae07ca12be3955209 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 4 Jun 2022 23:03:03 -0400
Subject: [PATCH 107/997] Add more SIMD

---
 src/builder.rs        |  8 ++++----
 src/intrinsic/llvm.rs | 43 ++++++++++++++++++++++++++++++++++++++++---
 2 files changed, 44 insertions(+), 7 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index b23d12cb0b6b..aefd4eecc0a0 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -275,19 +275,19 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     fn function_ptr_call(&mut self, func_ptr: RValue<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
-        let args = self.check_ptr_call("call", func_ptr, args);
+        let gcc_func = func_ptr.get_type().dyncast_function_ptr_type().expect("function ptr");
+        let func_name = format!("{:?}", func_ptr);
+        let args = llvm::adjust_intrinsic_arguments(&self, gcc_func, args.into(), &func_name);
+        let args = self.check_ptr_call("call", func_ptr, &*args);
 
         // gccjit requires to use the result of functions, even when it's not used.
         // That's why we assign the result to a local or call add_eval().
-        let gcc_func = func_ptr.get_type().dyncast_function_ptr_type().expect("function ptr");
         let return_type = gcc_func.get_return_type();
         let void_type = self.context.new_type::<()>();
         let current_func = self.block.get_function();
 
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
-            let func_name = format!("{:?}", func_ptr);
-            let args = llvm::adjust_intrinsic_arguments(&self, gcc_func, args, &func_name);
             let return_value = self.cx.context.new_call_through_ptr(None, func_ptr, &args);
             let return_value = llvm::adjust_intrinsic_return_value(&self, return_value, &func_name, &args);
             let result = current_func.new_local(None, return_value.get_type(), &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 7154a89543c2..29387712dae3 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -49,6 +49,10 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 | "__builtin_ia32_prorvd256_mask" | "__builtin_ia32_prorvd128_mask" | "__builtin_ia32_prolvq256_mask"
                 | "__builtin_ia32_prolvq128_mask" | "__builtin_ia32_prorvq256_mask" | "__builtin_ia32_prorvq128_mask"
                 | "__builtin_ia32_permvardi256_mask" | "__builtin_ia32_permvardf512_mask" | "__builtin_ia32_permvardf256_mask"
+                | "__builtin_ia32_pmulhuw512_mask" | "__builtin_ia32_pmulhw512_mask" | "__builtin_ia32_pmulhrsw512_mask"
+                | "__builtin_ia32_pmaxuw512_mask" | "__builtin_ia32_pmaxub512_mask" | "__builtin_ia32_pmaxsw512_mask"
+                | "__builtin_ia32_pmaxsb512_mask" | "__builtin_ia32_pminuw512_mask" | "__builtin_ia32_pminub512_mask"
+                | "__builtin_ia32_pminsw512_mask" | "__builtin_ia32_pminsb512_mask"
                 => {
                 let mut new_args = args.to_vec();
                 let arg3_type = gcc_func.get_param_type(2);
@@ -63,8 +67,22 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 args = new_args.into();
             },
             "__builtin_ia32_vplzcntd_512_mask" | "__builtin_ia32_vplzcntd_256_mask" | "__builtin_ia32_vplzcntd_128_mask"
-                | "__builtin_ia32_vplzcntq_512_mask" | "__builtin_ia32_vplzcntq_256_mask" | "__builtin_ia32_vplzcntq_128_mask"
-                | "__builtin_ia32_vpconflictsi_512_mask" | "__builtin_ia32_vpconflictsi_256_mask"
+                | "__builtin_ia32_vplzcntq_512_mask" | "__builtin_ia32_vplzcntq_256_mask" | "__builtin_ia32_vplzcntq_128_mask" => {
+                let mut new_args = args.to_vec();
+                // Remove last arg as it doesn't seem to be used in GCC and is always false.
+                new_args.pop();
+                let arg2_type = gcc_func.get_param_type(1);
+                let vector_type = arg2_type.dyncast_vector().expect("vector type");
+                let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
+                let num_units = vector_type.get_num_units();
+                let first_arg = builder.context.new_rvalue_from_vector(None, arg2_type, &vec![zero; num_units]);
+                new_args.push(first_arg);
+                let arg3_type = gcc_func.get_param_type(2);
+                let minus_one = builder.context.new_rvalue_from_int(arg3_type, -1);
+                new_args.push(minus_one);
+                args = new_args.into();
+            },
+            "__builtin_ia32_vpconflictsi_512_mask" | "__builtin_ia32_vpconflictsi_256_mask"
                 | "__builtin_ia32_vpconflictsi_128_mask" | "__builtin_ia32_vpconflictdi_512_mask"
                 | "__builtin_ia32_vpconflictdi_256_mask" | "__builtin_ia32_vpconflictdi_128_mask" => {
                 let mut new_args = args.to_vec();
@@ -177,7 +195,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
             },
             "__builtin_ia32_vpermt2varqi512_mask" | "__builtin_ia32_vpermt2varqi256_mask"
                 | "__builtin_ia32_vpermt2varqi128_mask" => {
-                let mut new_args = args.to_vec();
+                let new_args = args.to_vec();
                 let arg4_type = gcc_func.get_param_type(3);
                 let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
                 args = vec![new_args[1], new_args[0], new_args[2], minus_one].into();
@@ -282,6 +300,12 @@ pub fn ignore_arg_cast(func_name: &str, index: usize, args_len: usize) -> bool {
         },
         // NOTE: the LLVM intrinsic receives 3 floats, but the GCC builtin requires 3 vectors.
         "__builtin_ia32_vfmaddss3_round" | "__builtin_ia32_vfmaddsd3_round" => return true,
+        "__builtin_ia32_vplzcntd_512_mask" | "__builtin_ia32_vplzcntd_256_mask" | "__builtin_ia32_vplzcntd_128_mask"
+            | "__builtin_ia32_vplzcntq_512_mask" | "__builtin_ia32_vplzcntq_256_mask" | "__builtin_ia32_vplzcntq_128_mask" => {
+            if index == args_len - 1 {
+                return true;
+            }
+        },
         _ => (),
     }
 
@@ -418,6 +442,14 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512_mask",
         "llvm.x86.avx512.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256_mask",
         "llvm.x86.avx512.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128_mask",
+        "llvm.ctpop.v16i16" => "__builtin_ia32_vpopcountw_v16hi",
+        "llvm.ctpop.v8i16" => "__builtin_ia32_vpopcountw_v8hi",
+        "llvm.ctpop.v64i8" => "__builtin_ia32_vpopcountb_v64qi",
+        "llvm.ctpop.v32i8" => "__builtin_ia32_vpopcountb_v32qi",
+        "llvm.ctpop.v16i8" => "__builtin_ia32_vpopcountb_v16qi",
+        "llvm.x86.avx512.mask.vpshufbitqmb.512" => "__builtin_ia32_vpshufbitqmb512_mask",
+        "llvm.x86.avx512.mask.vpshufbitqmb.256" => "__builtin_ia32_vpshufbitqmb256_mask",
+        "llvm.x86.avx512.mask.vpshufbitqmb.128" => "__builtin_ia32_vpshufbitqmb128_mask",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",
@@ -506,6 +538,11 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512bf16.dpbf16ps.128" => "__builtin_ia32_dpbf16ps_v4sf",
         "llvm.x86.avx512bf16.dpbf16ps.256" => "__builtin_ia32_dpbf16ps_v8sf",
         "llvm.x86.avx512bf16.dpbf16ps.512" => "__builtin_ia32_dpbf16ps_v16sf",
+        "llvm.x86.pclmulqdq.512" => "__builtin_ia32_vpclmulqdq_v8di",
+        "llvm.x86.pclmulqdq.256" => "__builtin_ia32_vpclmulqdq_v4di",
+        "llvm.x86.avx512.pmulhu.w.512" => "__builtin_ia32_pmulhuw512_mask",
+        "llvm.x86.avx512.pmulh.w.512" => "__builtin_ia32_pmulhw512_mask",
+        "llvm.x86.avx512.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512_mask",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),

From e5a1bb2f59c49a6a741b8ee5b20ad16b93f314c6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 5 Jun 2022 13:36:17 -0400
Subject: [PATCH 108/997] Add more SIMD

---
 src/builder.rs        |   4 +-
 src/intrinsic/llvm.rs | 105 ++++++++++++++++++++++++++++++++++++++----
 2 files changed, 99 insertions(+), 10 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index aefd4eecc0a0..3e1f56c183ac 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -277,7 +277,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     fn function_ptr_call(&mut self, func_ptr: RValue<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
         let gcc_func = func_ptr.get_type().dyncast_function_ptr_type().expect("function ptr");
         let func_name = format!("{:?}", func_ptr);
+        let previous_arg_count = args.len();
         let args = llvm::adjust_intrinsic_arguments(&self, gcc_func, args.into(), &func_name);
+        let args_adjusted = args.len() != previous_arg_count;
         let args = self.check_ptr_call("call", func_ptr, &*args);
 
         // gccjit requires to use the result of functions, even when it's not used.
@@ -289,7 +291,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
             let return_value = self.cx.context.new_call_through_ptr(None, func_ptr, &args);
-            let return_value = llvm::adjust_intrinsic_return_value(&self, return_value, &func_name, &args);
+            let return_value = llvm::adjust_intrinsic_return_value(&self, return_value, &func_name, &args, args_adjusted);
             let result = current_func.new_local(None, return_value.get_type(), &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
             self.block.add_assignment(None, result, return_value);
             result.to_rvalue()
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 29387712dae3..af6c121c337c 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -53,6 +53,15 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 | "__builtin_ia32_pmaxuw512_mask" | "__builtin_ia32_pmaxub512_mask" | "__builtin_ia32_pmaxsw512_mask"
                 | "__builtin_ia32_pmaxsb512_mask" | "__builtin_ia32_pminuw512_mask" | "__builtin_ia32_pminub512_mask"
                 | "__builtin_ia32_pminsw512_mask" | "__builtin_ia32_pminsb512_mask"
+                | "__builtin_ia32_pmaddwd512_mask" | "__builtin_ia32_pmaddubsw512_mask" | "__builtin_ia32_packssdw512_mask"
+                | "__builtin_ia32_packsswb512_mask" | "__builtin_ia32_packusdw512_mask" | "__builtin_ia32_packuswb512_mask"
+                | "__builtin_ia32_pavgw512_mask" | "__builtin_ia32_pavgb512_mask" | "__builtin_ia32_psllw512_mask"
+                | "__builtin_ia32_psllwi512_mask" | "__builtin_ia32_psllv32hi_mask" | "__builtin_ia32_psrlw512_mask"
+                | "__builtin_ia32_psrlwi512_mask" | "__builtin_ia32_psllv16hi_mask" | "__builtin_ia32_psllv8hi_mask"
+                | "__builtin_ia32_psrlv32hi_mask" | "__builtin_ia32_psraw512_mask" | "__builtin_ia32_psrawi512_mask"
+                | "__builtin_ia32_psrlv16hi_mask" | "__builtin_ia32_psrlv8hi_mask" | "__builtin_ia32_psrav32hi_mask"
+                | "__builtin_ia32_permvarhi512_mask" | "__builtin_ia32_pshufb512_mask" | "__builtin_ia32_psrav16hi_mask"
+                | "__builtin_ia32_psrav8hi_mask" | "__builtin_ia32_permvarhi256_mask" | "__builtin_ia32_permvarhi128_mask"
                 => {
                 let mut new_args = args.to_vec();
                 let arg3_type = gcc_func.get_param_type(2);
@@ -66,6 +75,19 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 new_args.push(minus_one);
                 args = new_args.into();
             },
+            "__builtin_ia32_dbpsadbw512_mask" | "__builtin_ia32_dbpsadbw256_mask" | "__builtin_ia32_dbpsadbw128_mask" => {
+                let mut new_args = args.to_vec();
+                let arg4_type = gcc_func.get_param_type(3);
+                let vector_type = arg4_type.dyncast_vector().expect("vector type");
+                let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
+                let num_units = vector_type.get_num_units();
+                let first_arg = builder.context.new_rvalue_from_vector(None, arg4_type, &vec![zero; num_units]);
+                new_args.push(first_arg);
+                let arg5_type = gcc_func.get_param_type(4);
+                let minus_one = builder.context.new_rvalue_from_int(arg5_type, -1);
+                new_args.push(minus_one);
+                args = new_args.into();
+            },
             "__builtin_ia32_vplzcntd_512_mask" | "__builtin_ia32_vplzcntd_256_mask" | "__builtin_ia32_vplzcntd_128_mask"
                 | "__builtin_ia32_vplzcntq_512_mask" | "__builtin_ia32_vplzcntq_256_mask" | "__builtin_ia32_vplzcntq_128_mask" => {
                 let mut new_args = args.to_vec();
@@ -186,7 +208,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
             "__builtin_ia32_stmxcsr" => {
                 args = vec![].into();
             },
-            "__builtin_ia32_addcarryx_u64" | "__builtin_ia32_sbb_u64" => {
+            "__builtin_ia32_addcarryx_u64" | "__builtin_ia32_sbb_u64" | "__builtin_ia32_addcarryx_u32" | "__builtin_ia32_sbb_u32" => {
                 let mut new_args = args.to_vec();
                 let arg2_type = gcc_func.get_param_type(1);
                 let variable = builder.current_func().new_local(None, arg2_type, "addcarryResult");
@@ -194,12 +216,22 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 args = new_args.into();
             },
             "__builtin_ia32_vpermt2varqi512_mask" | "__builtin_ia32_vpermt2varqi256_mask"
-                | "__builtin_ia32_vpermt2varqi128_mask" => {
+                | "__builtin_ia32_vpermt2varqi128_mask" | "__builtin_ia32_vpermt2varhi512_mask"
+                | "__builtin_ia32_vpermt2varhi256_mask" | "__builtin_ia32_vpermt2varhi128_mask"
+                => {
                 let new_args = args.to_vec();
                 let arg4_type = gcc_func.get_param_type(3);
                 let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
                 args = vec![new_args[1], new_args[0], new_args[2], minus_one].into();
             },
+            "__builtin_ia32_xrstor" | "__builtin_ia32_xsavec" => {
+                let new_args = args.to_vec();
+                let thirty_two = builder.context.new_rvalue_from_int(new_args[1].get_type(), 32);
+                let arg2 = new_args[1] << thirty_two | new_args[2];
+                let arg2_type = gcc_func.get_param_type(1);
+                let arg2 = builder.context.new_cast(None, arg2, arg2_type);
+                args = vec![new_args[0], arg2].into();
+            },
             _ => (),
         }
     }
@@ -249,18 +281,24 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
     args
 }
 
-pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc, 'tcx>, mut return_value: RValue<'gcc>, func_name: &str, args: &[RValue<'gcc>]) -> RValue<'gcc> {
+pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc, 'tcx>, mut return_value: RValue<'gcc>, func_name: &str, args: &[RValue<'gcc>], args_adjusted: bool) -> RValue<'gcc> {
     match func_name {
         "__builtin_ia32_vfmaddss3_round" | "__builtin_ia32_vfmaddsd3_round" => {
             let zero = builder.context.new_rvalue_zero(builder.int_type);
             return_value = builder.context.new_vector_access(None, return_value, zero).to_rvalue();
         },
-        "__builtin_ia32_addcarryx_u64" | "__builtin_ia32_sbb_u64" => {
-            let last_arg = args.last().expect("last arg");
-            let field1 = builder.context.new_field(None, builder.u8_type, "carryFlag");
-            let field2 = builder.context.new_field(None, builder.ulonglong_type, "carryResult");
-            let struct_type = builder.context.new_struct_type(None, "addcarryResult", &[field1, field2]);
-            return_value = builder.context.new_struct_constructor(None, struct_type.as_type(), None, &[return_value, last_arg.dereference(None).to_rvalue()]);
+        "__builtin_ia32_addcarryx_u64" | "__builtin_ia32_sbb_u64" | "__builtin_ia32_addcarryx_u32" | "__builtin_ia32_sbb_u32" => {
+            // Both llvm.x86.addcarry.32 and llvm.x86.addcarryx.u32 points to the same GCC builtin,
+            // but only the former requires adjusting the return value.
+            // Those 2 LLVM intrinsics differ by their argument count, that's why we check if the
+            // arguments were adjusted.
+            if args_adjusted {
+                let last_arg = args.last().expect("last arg");
+                let field1 = builder.context.new_field(None, builder.u8_type, "carryFlag");
+                let field2 = builder.context.new_field(None, args[1].get_type(), "carryResult");
+                let struct_type = builder.context.new_struct_type(None, "addcarryResult", &[field1, field2]);
+                return_value = builder.context.new_struct_constructor(None, struct_type.as_type(), None, &[return_value, last_arg.dereference(None).to_rvalue()]);
+            }
         },
         _ => (),
     }
@@ -450,6 +488,22 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.mask.vpshufbitqmb.512" => "__builtin_ia32_vpshufbitqmb512_mask",
         "llvm.x86.avx512.mask.vpshufbitqmb.256" => "__builtin_ia32_vpshufbitqmb256_mask",
         "llvm.x86.avx512.mask.vpshufbitqmb.128" => "__builtin_ia32_vpshufbitqmb128_mask",
+        "llvm.x86.avx512.mask.ucmp.w.512" => "__builtin_ia32_ucmpw512_mask",
+        "llvm.x86.avx512.mask.ucmp.w.256" => "__builtin_ia32_ucmpw256_mask",
+        "llvm.x86.avx512.mask.ucmp.w.128" => "__builtin_ia32_ucmpw128_mask",
+        "llvm.x86.avx512.mask.ucmp.b.512" => "__builtin_ia32_ucmpb512_mask",
+        "llvm.x86.avx512.mask.ucmp.b.256" => "__builtin_ia32_ucmpb256_mask",
+        "llvm.x86.avx512.mask.ucmp.b.128" => "__builtin_ia32_ucmpb128_mask",
+        "llvm.x86.avx512.mask.cmp.w.512" => "__builtin_ia32_cmpw512_mask",
+        "llvm.x86.avx512.mask.cmp.w.256" => "__builtin_ia32_cmpw256_mask",
+        "llvm.x86.avx512.mask.cmp.w.128" => "__builtin_ia32_cmpw128_mask",
+        "llvm.x86.avx512.mask.cmp.b.512" => "__builtin_ia32_cmpb512_mask",
+        "llvm.x86.avx512.mask.cmp.b.256" => "__builtin_ia32_cmpb256_mask",
+        "llvm.x86.avx512.mask.cmp.b.128" => "__builtin_ia32_cmpb128_mask",
+        "llvm.x86.xrstor" => "__builtin_ia32_xrstor",
+        "llvm.x86.xsavec" => "__builtin_ia32_xsavec",
+        "llvm.x86.addcarry.32" => "__builtin_ia32_addcarryx_u32",
+        "llvm.x86.subborrow.32" => "__builtin_ia32_sbb_u32",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",
@@ -543,6 +597,39 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.pmulhu.w.512" => "__builtin_ia32_pmulhuw512_mask",
         "llvm.x86.avx512.pmulh.w.512" => "__builtin_ia32_pmulhw512_mask",
         "llvm.x86.avx512.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512_mask",
+        "llvm.x86.avx512.pmaddw.d.512" => "__builtin_ia32_pmaddwd512_mask",
+        "llvm.x86.avx512.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512_mask",
+        "llvm.x86.avx512.packssdw.512" => "__builtin_ia32_packssdw512_mask",
+        "llvm.x86.avx512.packsswb.512" => "__builtin_ia32_packsswb512_mask",
+        "llvm.x86.avx512.packusdw.512" => "__builtin_ia32_packusdw512_mask",
+        "llvm.x86.avx512.packuswb.512" => "__builtin_ia32_packuswb512_mask",
+        "llvm.x86.avx512.pavg.w.512" => "__builtin_ia32_pavgw512_mask",
+        "llvm.x86.avx512.pavg.b.512" => "__builtin_ia32_pavgb512_mask",
+        "llvm.x86.avx512.psll.w.512" => "__builtin_ia32_psllw512_mask",
+        "llvm.x86.avx512.pslli.w.512" => "__builtin_ia32_psllwi512_mask",
+        "llvm.x86.avx512.psllv.w.512" => "__builtin_ia32_psllv32hi_mask",
+        "llvm.x86.avx512.psllv.w.256" => "__builtin_ia32_psllv16hi_mask",
+        "llvm.x86.avx512.psllv.w.128" => "__builtin_ia32_psllv8hi_mask",
+        "llvm.x86.avx512.psrl.w.512" => "__builtin_ia32_psrlw512_mask",
+        "llvm.x86.avx512.psrli.w.512" => "__builtin_ia32_psrlwi512_mask",
+        "llvm.x86.avx512.psrlv.w.512" => "__builtin_ia32_psrlv32hi_mask",
+        "llvm.x86.avx512.psrlv.w.256" => "__builtin_ia32_psrlv16hi_mask",
+        "llvm.x86.avx512.psrlv.w.128" => "__builtin_ia32_psrlv8hi_mask",
+        "llvm.x86.avx512.psra.w.512" => "__builtin_ia32_psraw512_mask",
+        "llvm.x86.avx512.psrai.w.512" => "__builtin_ia32_psrawi512_mask",
+        "llvm.x86.avx512.psrav.w.512" => "__builtin_ia32_psrav32hi_mask",
+        "llvm.x86.avx512.psrav.w.256" => "__builtin_ia32_psrav16hi_mask",
+        "llvm.x86.avx512.psrav.w.128" => "__builtin_ia32_psrav8hi_mask",
+        "llvm.x86.avx512.vpermi2var.hi.512" => "__builtin_ia32_vpermt2varhi512_mask",
+        "llvm.x86.avx512.vpermi2var.hi.256" => "__builtin_ia32_vpermt2varhi256_mask",
+        "llvm.x86.avx512.vpermi2var.hi.128" => "__builtin_ia32_vpermt2varhi128_mask",
+        "llvm.x86.avx512.permvar.hi.512" => "__builtin_ia32_permvarhi512_mask",
+        "llvm.x86.avx512.permvar.hi.256" => "__builtin_ia32_permvarhi256_mask",
+        "llvm.x86.avx512.permvar.hi.128" => "__builtin_ia32_permvarhi128_mask",
+        "llvm.x86.avx512.pshuf.b.512" => "__builtin_ia32_pshufb512_mask",
+        "llvm.x86.avx512.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512_mask",
+        "llvm.x86.avx512.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256_mask",
+        "llvm.x86.avx512.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128_mask",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),

From b55bd956dc2ad488b890892e4d336ff6cdf3b128 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 5 Jun 2022 17:16:27 -0400
Subject: [PATCH 109/997] Add more SIMD

---
 src/intrinsic/llvm.rs | 46 ++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 45 insertions(+), 1 deletion(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index af6c121c337c..14a7eaf49bbd 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -171,7 +171,10 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 new_args.push(last_arg);
                 args = new_args.into();
             },
-            "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
+            "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" | "__builtin_ia32_vpmadd52huq512_mask"
+                | "__builtin_ia32_vpmadd52luq512_mask" | "__builtin_ia32_vpmadd52huq256_mask" | "__builtin_ia32_vpmadd52luq256_mask"
+                | "__builtin_ia32_vpmadd52huq128_mask"
+                => {
                 let mut new_args = args.to_vec();
                 let last_arg = new_args.pop().expect("last arg");
                 let arg4_type = gcc_func.get_param_type(3);
@@ -504,6 +507,42 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.xsavec" => "__builtin_ia32_xsavec",
         "llvm.x86.addcarry.32" => "__builtin_ia32_addcarryx_u32",
         "llvm.x86.subborrow.32" => "__builtin_ia32_sbb_u32",
+        "llvm.x86.avx512.mask.compress.store.w.512" => "__builtin_ia32_compressstoreuhi512_mask",
+        "llvm.x86.avx512.mask.compress.store.w.256" => "__builtin_ia32_compressstoreuhi256_mask",
+        "llvm.x86.avx512.mask.compress.store.w.128" => "__builtin_ia32_compressstoreuhi128_mask",
+        "llvm.x86.avx512.mask.compress.store.b.512" => "__builtin_ia32_compressstoreuqi512_mask",
+        "llvm.x86.avx512.mask.compress.store.b.256" => "__builtin_ia32_compressstoreuqi256_mask",
+        "llvm.x86.avx512.mask.compress.store.b.128" => "__builtin_ia32_compressstoreuqi128_mask",
+        "llvm.x86.avx512.mask.compress.w.512" => "__builtin_ia32_compressstoreuhi512_mask",
+        "llvm.x86.avx512.mask.compress.w.256" => "__builtin_ia32_compresshi256_mask",
+        "llvm.x86.avx512.mask.compress.w.128" => "__builtin_ia32_compresshi128_mask",
+        "llvm.x86.avx512.mask.compress.b.512" => "__builtin_ia32_compressstoreuqi512_mask",
+        "llvm.x86.avx512.mask.compress.b.256" => "__builtin_ia32_compressqi256_mask",
+        "llvm.x86.avx512.mask.compress.b.128" => "__builtin_ia32_compressqi128_mask",
+        "llvm.x86.avx512.mask.expand.w.512" => "__builtin_ia32_expandhi512_mask",
+        "llvm.x86.avx512.mask.expand.w.256" => "__builtin_ia32_expandhi256_mask",
+        "llvm.x86.avx512.mask.expand.w.128" => "__builtin_ia32_expandhi128_mask",
+        "llvm.x86.avx512.mask.expand.b.512" => "__builtin_ia32_expandqi512_mask",
+        "llvm.x86.avx512.mask.expand.b.256" => "__builtin_ia32_expandqi256_mask",
+        "llvm.x86.avx512.mask.expand.b.128" => "__builtin_ia32_expandqi128_mask",
+        "llvm.fshl.v8i64" => "__builtin_ia32_vpshldv_v8di",
+        "llvm.fshl.v4i64" => "__builtin_ia32_vpshldv_v4di",
+        "llvm.fshl.v2i64" => "__builtin_ia32_vpshldv_v2di",
+        "llvm.fshl.v16i32" => "__builtin_ia32_vpshldv_v16si",
+        "llvm.fshl.v8i32" => "__builtin_ia32_vpshldv_v8si",
+        "llvm.fshl.v4i32" => "__builtin_ia32_vpshldv_v4si",
+        "llvm.fshl.v32i16" => "__builtin_ia32_vpshldv_v32hi",
+        "llvm.fshl.v16i16" => "__builtin_ia32_vpshldv_v16hi",
+        "llvm.fshl.v8i16" => "__builtin_ia32_vpshldv_v8hi",
+        "llvm.fshr.v8i64" => "__builtin_ia32_vpshrdv_v8di",
+        "llvm.fshr.v4i64" => "__builtin_ia32_vpshrdv_v4di",
+        "llvm.fshr.v2i64" => "__builtin_ia32_vpshrdv_v2di",
+        "llvm.fshr.v16i32" => "__builtin_ia32_vpshrdv_v16si",
+        "llvm.fshr.v8i32" => "__builtin_ia32_vpshrdv_v8si",
+        "llvm.fshr.v4i32" => "__builtin_ia32_vpshrdv_v4si",
+        "llvm.fshr.v32i16" => "__builtin_ia32_vpshrdv_v32hi",
+        "llvm.fshr.v16i16" => "__builtin_ia32_vpshrdv_v16hi",
+        "llvm.fshr.v8i16" => "__builtin_ia32_vpshrdv_v8hi",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",
@@ -630,6 +669,11 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512_mask",
         "llvm.x86.avx512.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256_mask",
         "llvm.x86.avx512.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128_mask",
+        "llvm.x86.avx512.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_mask",
+        "llvm.x86.avx512.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_mask",
+        "llvm.x86.avx512.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_mask",
+        "llvm.x86.avx512.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_mask",
+        "llvm.x86.avx512.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_mask",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),

From 13fa30c6c396a5ffe91423a028dc51547ec68d42 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 5 Jun 2022 18:53:30 -0400
Subject: [PATCH 110/997] Add more SIMD

---
 src/intrinsic/llvm.rs | 26 +++++++++++++++++++-------
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 14a7eaf49bbd..42cf06c8c7ab 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -171,10 +171,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 new_args.push(last_arg);
                 args = new_args.into();
             },
-            "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" | "__builtin_ia32_vpmadd52huq512_mask"
-                | "__builtin_ia32_vpmadd52luq512_mask" | "__builtin_ia32_vpmadd52huq256_mask" | "__builtin_ia32_vpmadd52luq256_mask"
-                | "__builtin_ia32_vpmadd52huq128_mask"
-                => {
+            "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
                 let mut new_args = args.to_vec();
                 let last_arg = new_args.pop().expect("last arg");
                 let arg4_type = gcc_func.get_param_type(3);
@@ -188,7 +185,10 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 | "__builtin_ia32_vpermi2varq256_mask" | "__builtin_ia32_vpermi2varq128_mask"
                 | "__builtin_ia32_vpermi2varps512_mask" | "__builtin_ia32_vpermi2varps256_mask"
                 | "__builtin_ia32_vpermi2varps128_mask" | "__builtin_ia32_vpermi2varpd512_mask"
-                | "__builtin_ia32_vpermi2varpd256_mask" | "__builtin_ia32_vpermi2varpd128_mask" => {
+                | "__builtin_ia32_vpermi2varpd256_mask" | "__builtin_ia32_vpermi2varpd128_mask" | "__builtin_ia32_vpmadd52huq512_mask"
+                | "__builtin_ia32_vpmadd52luq512_mask" | "__builtin_ia32_vpmadd52huq256_mask" | "__builtin_ia32_vpmadd52luq256_mask"
+                | "__builtin_ia32_vpmadd52huq128_mask"
+                => {
                 let mut new_args = args.to_vec();
                 let arg4_type = gcc_func.get_param_type(3);
                 let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
@@ -513,10 +513,10 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.mask.compress.store.b.512" => "__builtin_ia32_compressstoreuqi512_mask",
         "llvm.x86.avx512.mask.compress.store.b.256" => "__builtin_ia32_compressstoreuqi256_mask",
         "llvm.x86.avx512.mask.compress.store.b.128" => "__builtin_ia32_compressstoreuqi128_mask",
-        "llvm.x86.avx512.mask.compress.w.512" => "__builtin_ia32_compressstoreuhi512_mask",
+        "llvm.x86.avx512.mask.compress.w.512" => "__builtin_ia32_compresshi512_mask",
         "llvm.x86.avx512.mask.compress.w.256" => "__builtin_ia32_compresshi256_mask",
         "llvm.x86.avx512.mask.compress.w.128" => "__builtin_ia32_compresshi128_mask",
-        "llvm.x86.avx512.mask.compress.b.512" => "__builtin_ia32_compressstoreuqi512_mask",
+        "llvm.x86.avx512.mask.compress.b.512" => "__builtin_ia32_compressqi512_mask",
         "llvm.x86.avx512.mask.compress.b.256" => "__builtin_ia32_compressqi256_mask",
         "llvm.x86.avx512.mask.compress.b.128" => "__builtin_ia32_compressqi128_mask",
         "llvm.x86.avx512.mask.expand.w.512" => "__builtin_ia32_expandhi512_mask",
@@ -674,6 +674,18 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_mask",
         "llvm.x86.avx512.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_mask",
         "llvm.x86.avx512.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_mask",
+        "llvm.x86.avx512.vpdpwssd.512" => "__builtin_ia32_vpdpwssd_v16si",
+        "llvm.x86.avx512.vpdpwssd.256" => "__builtin_ia32_vpdpwssd_v8si",
+        "llvm.x86.avx512.vpdpwssd.128" => "__builtin_ia32_vpdpwssd_v4si",
+        "llvm.x86.avx512.vpdpwssds.512" => "__builtin_ia32_vpdpwssds_v16si",
+        "llvm.x86.avx512.vpdpwssds.256" => "__builtin_ia32_vpdpwssds_v8si",
+        "llvm.x86.avx512.vpdpwssds.128" => "__builtin_ia32_vpdpwssds_v4si",
+        "llvm.x86.avx512.vpdpbusd.512" => "__builtin_ia32_vpdpbusd_v16si",
+        "llvm.x86.avx512.vpdpbusd.256" => "__builtin_ia32_vpdpbusd_v8si",
+        "llvm.x86.avx512.vpdpbusd.128" => "__builtin_ia32_vpdpbusd_v4si",
+        "llvm.x86.avx512.vpdpbusds.512" => "__builtin_ia32_vpdpbusds_v16si",
+        "llvm.x86.avx512.vpdpbusds.256" => "__builtin_ia32_vpdpbusds_v8si",
+        "llvm.x86.avx512.vpdpbusds.128" => "__builtin_ia32_vpdpbusds_v4si",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),

From 2ba5845c520c3fe6558b7047097a89003284bf9a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 5 Jun 2022 19:00:34 -0400
Subject: [PATCH 111/997] Update Cargo files

---
 Cargo.toml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Cargo.toml b/Cargo.toml
index 0e41bec8b762..211d19a8dc89 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,10 +22,10 @@ default = ["master"]
 master = ["gccjit/master"]
 
 [dependencies]
-#gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
+gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
 
 # Local copy.
-gccjit = { path = "../gccjit.rs" }
+#gccjit = { path = "../gccjit.rs" }
 
 target-lexicon = "0.10.0"
 

From 558f124f96ab3e9bf2b5c4750bd88225712c27fe Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 9 Jun 2022 14:25:35 +0200
Subject: [PATCH 112/997] Use `llvm-tblgen` tool to generate more and better
 intrinsics output

---
 tools/generate_intrinsics.py | 91 ++++++++++++++++--------------------
 1 file changed, 40 insertions(+), 51 deletions(-)

diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index 849c6e9c9816..e13e8b146698 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -13,7 +13,7 @@ def run_command(command, cwd=None):
         sys.exit(1)
 
 
-def clone_repository(repo_name, path, repo_url, sub_path=None):
+def clone_repository(repo_name, path, repo_url, sub_paths=None):
     if os.path.exists(path):
         while True:
             choice = input("There is already a `{}` folder, do you want to update it? [y/N]".format(path))
@@ -27,12 +27,12 @@ def clone_repository(repo_name, path, repo_url, sub_path=None):
             else:
                 print("Didn't understand answer...")
     print("Cloning {} repository...".format(repo_name))
-    if sub_path is None:
+    if sub_paths is None:
         run_command(["git", "clone", repo_url, "--depth", "1", path])
     else:
         run_command(["git", "clone", repo_url, "--filter=tree:0", "--no-checkout", path])
         run_command(["git", "sparse-checkout", "init"], cwd=path)
-        run_command(["git", "sparse-checkout", "set", "add", sub_path], cwd=path)
+        run_command(["git", "sparse-checkout", "set", *sub_paths], cwd=path)
         run_command(["git", "checkout"], cwd=path)
 
 
@@ -40,56 +40,45 @@ def append_intrinsic(array, intrinsic_name, translation):
     array.append((intrinsic_name, translation))
 
 
-def extract_instrinsics(intrinsics, file):
-    print("Extracting intrinsics from `{}`...".format(file))
-    with open(file, "r", encoding="utf8") as f:
-        content = f.read()
-
-    lines = content.splitlines()
-    pos = 0
-    current_arch = None
-    while pos < len(lines):
-        line = lines[pos].strip()
-        if line.startswith("let TargetPrefix ="):
-            current_arch = line.split('"')[1].strip()
-            if len(current_arch) == 0:
-                current_arch = None
-        elif current_arch is None:
-            pass
-        elif line == "}":
-            current_arch = None
-        elif line.startswith("def "):
-            content = ""
-            while not content.endswith(";") and not content.endswith("}") and pos < len(lines):
-                line = lines[pos].split(" // ")[0].strip()
-                content += line
-                pos += 1
-            entries = re.findall('GCCBuiltin<"(\\w+)">', content)
-            if len(entries) > 0:
-                intrinsic = content.split("def ")[1].strip().split(":")[0].strip()
-                intrinsic = intrinsic.split("_")
-                if len(intrinsic) < 2 or intrinsic[0] != "int":
-                    continue
-                intrinsic[0] = "llvm"
-                intrinsic = ".".join(intrinsic)
-                if current_arch not in intrinsics:
-                    intrinsics[current_arch] = []
-                for entry in entries:
-                    append_intrinsic(intrinsics[current_arch], intrinsic, entry)
-            continue
-        pos += 1
-        continue
-    print("Done!")
+def convert_to_string(content):
+    if content.__class__.__name__ == 'bytes':
+        return content.decode('utf-8')
+    return content
 
 
 def extract_instrinsics_from_llvm(llvm_path, intrinsics):
-    files = []
-    intrinsics_path = os.path.join(llvm_path, "llvm/include/llvm/IR")
-    for (dirpath, dirnames, filenames) in walk(intrinsics_path):
-        files.extend([os.path.join(intrinsics_path, f) for f in filenames if f.endswith(".td")])
-
-    for file in files:
-        extract_instrinsics(intrinsics, file)
+    p = subprocess.Popen(
+        ["llvm-tblgen", "llvm/IR/Intrinsics.td"],
+        cwd=os.path.join(llvm_path, "llvm/include"),
+        stdout=subprocess.PIPE)
+    output, err = p.communicate()
+    lines = convert_to_string(output).splitlines()
+    pos = 0
+    while pos < len(lines):
+        line = lines[pos]
+        if not line.startswith("def "):
+            pos += 1
+            continue
+        intrinsic = line.split(" ")[1].strip()
+        content = line
+        while pos < len(lines):
+            line = lines[pos].split(" // ")[0].strip()
+            content += line
+            pos += 1
+            if line == "}":
+                break
+        entries = re.findall('string GCCBuiltinName = "(\\w+)";', content)
+        current_arch = re.findall('string TargetPrefix = "(\\w+)";', content)
+        if len(entries) == 1 and len(current_arch) == 1:
+            current_arch = current_arch[0]
+            intrinsic = intrinsic.split("_")
+            if len(intrinsic) < 2 or intrinsic[0] != "int":
+                continue
+            intrinsic[0] = "llvm"
+            intrinsic = ".".join(intrinsic)
+            if current_arch not in intrinsics:
+                intrinsics[current_arch] = []
+            append_intrinsic(intrinsics[current_arch], intrinsic, entries[0])
 
 
 def append_translation(json_data, p, array):
@@ -219,7 +208,7 @@ def main():
         "llvm-project",
         llvm_path,
         "https://github.com/llvm/llvm-project",
-        sub_path="llvm/include/llvm/IR",
+        sub_paths=["llvm/include/llvm/IR", "llvm/include/llvm/CodeGen/"],
     )
     clone_repository(
         "llvmint",

From c66055c193b0df2bbb5fbb21d17eca7c8d7ac5a5 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 9 Jun 2022 14:25:48 +0200
Subject: [PATCH 113/997] Generate new intrinsics

---
 src/intrinsic/archs.rs | 2247 +++++++++++++++++++++++++++++++++++++++-
 1 file changed, 2228 insertions(+), 19 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index fb6c38fa0726..9375f0fc1ad5 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -93,6 +93,37 @@ match name {
     "llvm.amdgcn.lerp" => "__builtin_amdgcn_lerp",
     "llvm.amdgcn.mbcnt.hi" => "__builtin_amdgcn_mbcnt_hi",
     "llvm.amdgcn.mbcnt.lo" => "__builtin_amdgcn_mbcnt_lo",
+    "llvm.amdgcn.mfma.f32.16x16x16bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x16bf16_1k",
+    "llvm.amdgcn.mfma.f32.16x16x16f16" => "__builtin_amdgcn_mfma_f32_16x16x16f16",
+    "llvm.amdgcn.mfma.f32.16x16x1f32" => "__builtin_amdgcn_mfma_f32_16x16x1f32",
+    "llvm.amdgcn.mfma.f32.16x16x2bf16" => "__builtin_amdgcn_mfma_f32_16x16x2bf16",
+    "llvm.amdgcn.mfma.f32.16x16x4bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x4bf16_1k",
+    "llvm.amdgcn.mfma.f32.16x16x4f16" => "__builtin_amdgcn_mfma_f32_16x16x4f16",
+    "llvm.amdgcn.mfma.f32.16x16x4f32" => "__builtin_amdgcn_mfma_f32_16x16x4f32",
+    "llvm.amdgcn.mfma.f32.16x16x8.xf32" => "__builtin_amdgcn_mfma_f32_16x16x8_xf32",
+    "llvm.amdgcn.mfma.f32.16x16x8bf16" => "__builtin_amdgcn_mfma_f32_16x16x8bf16",
+    "llvm.amdgcn.mfma.f32.32x32x1f32" => "__builtin_amdgcn_mfma_f32_32x32x1f32",
+    "llvm.amdgcn.mfma.f32.32x32x2bf16" => "__builtin_amdgcn_mfma_f32_32x32x2bf16",
+    "llvm.amdgcn.mfma.f32.32x32x2f32" => "__builtin_amdgcn_mfma_f32_32x32x2f32",
+    "llvm.amdgcn.mfma.f32.32x32x4.xf32" => "__builtin_amdgcn_mfma_f32_32x32x4_xf32",
+    "llvm.amdgcn.mfma.f32.32x32x4bf16" => "__builtin_amdgcn_mfma_f32_32x32x4bf16",
+    "llvm.amdgcn.mfma.f32.32x32x4bf16.1k" => "__builtin_amdgcn_mfma_f32_32x32x4bf16_1k",
+    "llvm.amdgcn.mfma.f32.32x32x4f16" => "__builtin_amdgcn_mfma_f32_32x32x4f16",
+    "llvm.amdgcn.mfma.f32.32x32x8bf16.1k" => "__builtin_amdgcn_mfma_f32_32x32x8bf16_1k",
+    "llvm.amdgcn.mfma.f32.32x32x8f16" => "__builtin_amdgcn_mfma_f32_32x32x8f16",
+    "llvm.amdgcn.mfma.f32.4x4x1f32" => "__builtin_amdgcn_mfma_f32_4x4x1f32",
+    "llvm.amdgcn.mfma.f32.4x4x2bf16" => "__builtin_amdgcn_mfma_f32_4x4x2bf16",
+    "llvm.amdgcn.mfma.f32.4x4x4bf16.1k" => "__builtin_amdgcn_mfma_f32_4x4x4bf16_1k",
+    "llvm.amdgcn.mfma.f32.4x4x4f16" => "__builtin_amdgcn_mfma_f32_4x4x4f16",
+    "llvm.amdgcn.mfma.f64.16x16x4f64" => "__builtin_amdgcn_mfma_f64_16x16x4f64",
+    "llvm.amdgcn.mfma.f64.4x4x4f64" => "__builtin_amdgcn_mfma_f64_4x4x4f64",
+    "llvm.amdgcn.mfma.i32.16x16x16i8" => "__builtin_amdgcn_mfma_i32_16x16x16i8",
+    "llvm.amdgcn.mfma.i32.16x16x32.i8" => "__builtin_amdgcn_mfma_i32_16x16x32_i8",
+    "llvm.amdgcn.mfma.i32.16x16x4i8" => "__builtin_amdgcn_mfma_i32_16x16x4i8",
+    "llvm.amdgcn.mfma.i32.32x32x16.i8" => "__builtin_amdgcn_mfma_i32_32x32x16_i8",
+    "llvm.amdgcn.mfma.i32.32x32x4i8" => "__builtin_amdgcn_mfma_i32_32x32x4i8",
+    "llvm.amdgcn.mfma.i32.32x32x8i8" => "__builtin_amdgcn_mfma_i32_32x32x8i8",
+    "llvm.amdgcn.mfma.i32.4x4x4i8" => "__builtin_amdgcn_mfma_i32_4x4x4i8",
     "llvm.amdgcn.mqsad.pk.u16.u8" => "__builtin_amdgcn_mqsad_pk_u16_u8",
     "llvm.amdgcn.mqsad.u32.u8" => "__builtin_amdgcn_mqsad_u32_u8",
     "llvm.amdgcn.msad.u8" => "__builtin_amdgcn_msad_u8",
@@ -130,11 +161,20 @@ match name {
     "llvm.amdgcn.sdot2" => "__builtin_amdgcn_sdot2",
     "llvm.amdgcn.sdot4" => "__builtin_amdgcn_sdot4",
     "llvm.amdgcn.sdot8" => "__builtin_amdgcn_sdot8",
+    "llvm.amdgcn.smfmac.f32.16x16x32.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x32_bf16",
+    "llvm.amdgcn.smfmac.f32.16x16x32.f16" => "__builtin_amdgcn_smfmac_f32_16x16x32_f16",
+    "llvm.amdgcn.smfmac.f32.32x32x16.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x16_bf16",
+    "llvm.amdgcn.smfmac.f32.32x32x16.f16" => "__builtin_amdgcn_smfmac_f32_32x32x16_f16",
+    "llvm.amdgcn.smfmac.i32.16x16x64.i8" => "__builtin_amdgcn_smfmac_i32_16x16x64_i8",
+    "llvm.amdgcn.smfmac.i32.32x32x32.i8" => "__builtin_amdgcn_smfmac_i32_32x32x32_i8",
     "llvm.amdgcn.udot2" => "__builtin_amdgcn_udot2",
     "llvm.amdgcn.udot4" => "__builtin_amdgcn_udot4",
     "llvm.amdgcn.udot8" => "__builtin_amdgcn_udot8",
     "llvm.amdgcn.wave.barrier" => "__builtin_amdgcn_wave_barrier",
     "llvm.amdgcn.wavefrontsize" => "__builtin_amdgcn_wavefrontsize",
+    "llvm.amdgcn.workgroup.id.x" => "__builtin_amdgcn_workgroup_id_x",
+    "llvm.amdgcn.workgroup.id.y" => "__builtin_amdgcn_workgroup_id_y",
+    "llvm.amdgcn.workgroup.id.z" => "__builtin_amdgcn_workgroup_id_z",
     "llvm.amdgcn.writelane" => "__builtin_amdgcn_writelane",
     // arm
     "llvm.arm.cdp" => "__builtin_arm_cdp",
@@ -459,6 +499,11 @@ match name {
     "llvm.hexagon.A4.vrminuw" => "__builtin_HEXAGON_A4_vrminuw",
     "llvm.hexagon.A4.vrminw" => "__builtin_HEXAGON_A4_vrminw",
     "llvm.hexagon.A5.vaddhubs" => "__builtin_HEXAGON_A5_vaddhubs",
+    "llvm.hexagon.A6.vcmpbeq.notany" => "__builtin_HEXAGON_A6_vcmpbeq_notany",
+    "llvm.hexagon.A7.clip" => "__builtin_HEXAGON_A7_clip",
+    "llvm.hexagon.A7.croundd.ri" => "__builtin_HEXAGON_A7_croundd_ri",
+    "llvm.hexagon.A7.croundd.rr" => "__builtin_HEXAGON_A7_croundd_rr",
+    "llvm.hexagon.A7.vclip" => "__builtin_HEXAGON_A7_vclip",
     "llvm.hexagon.C2.all8" => "__builtin_HEXAGON_C2_all8",
     "llvm.hexagon.C2.and" => "__builtin_HEXAGON_C2_and",
     "llvm.hexagon.C2.andn" => "__builtin_HEXAGON_C2_andn",
@@ -557,6 +602,10 @@ match name {
     "llvm.hexagon.F2.dfmax" => "__builtin_HEXAGON_F2_dfmax",
     "llvm.hexagon.F2.dfmin" => "__builtin_HEXAGON_F2_dfmin",
     "llvm.hexagon.F2.dfmpy" => "__builtin_HEXAGON_F2_dfmpy",
+    "llvm.hexagon.F2.dfmpyfix" => "__builtin_HEXAGON_F2_dfmpyfix",
+    "llvm.hexagon.F2.dfmpyhh" => "__builtin_HEXAGON_F2_dfmpyhh",
+    "llvm.hexagon.F2.dfmpylh" => "__builtin_HEXAGON_F2_dfmpylh",
+    "llvm.hexagon.F2.dfmpyll" => "__builtin_HEXAGON_F2_dfmpyll",
     "llvm.hexagon.F2.dfsub" => "__builtin_HEXAGON_F2_dfsub",
     "llvm.hexagon.F2.sfadd" => "__builtin_HEXAGON_F2_sfadd",
     "llvm.hexagon.F2.sfclass" => "__builtin_HEXAGON_F2_sfclass",
@@ -578,6 +627,8 @@ match name {
     "llvm.hexagon.F2.sfmin" => "__builtin_HEXAGON_F2_sfmin",
     "llvm.hexagon.F2.sfmpy" => "__builtin_HEXAGON_F2_sfmpy",
     "llvm.hexagon.F2.sfsub" => "__builtin_HEXAGON_F2_sfsub",
+    "llvm.hexagon.L2.loadw.locked" => "__builtin_HEXAGON_L2_loadw_locked",
+    "llvm.hexagon.L4.loadd.locked" => "__builtin_HEXAGON_L4_loadd_locked",
     "llvm.hexagon.M2.acci" => "__builtin_HEXAGON_M2_acci",
     "llvm.hexagon.M2.accii" => "__builtin_HEXAGON_M2_accii",
     "llvm.hexagon.M2.cmaci.s0" => "__builtin_HEXAGON_M2_cmaci_s0",
@@ -646,6 +697,7 @@ match name {
     "llvm.hexagon.M2.mmpyul.rs1" => "__builtin_HEXAGON_M2_mmpyul_rs1",
     "llvm.hexagon.M2.mmpyul.s0" => "__builtin_HEXAGON_M2_mmpyul_s0",
     "llvm.hexagon.M2.mmpyul.s1" => "__builtin_HEXAGON_M2_mmpyul_s1",
+    "llvm.hexagon.M2.mnaci" => "__builtin_HEXAGON_M2_mnaci",
     "llvm.hexagon.M2.mpy.acc.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_hh_s0",
     "llvm.hexagon.M2.mpy.acc.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_hh_s1",
     "llvm.hexagon.M2.mpy.acc.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_hl_s0",
@@ -894,6 +946,24 @@ match name {
     "llvm.hexagon.M5.vrmpybuu" => "__builtin_HEXAGON_M5_vrmpybuu",
     "llvm.hexagon.M6.vabsdiffb" => "__builtin_HEXAGON_M6_vabsdiffb",
     "llvm.hexagon.M6.vabsdiffub" => "__builtin_HEXAGON_M6_vabsdiffub",
+    "llvm.hexagon.M7.dcmpyiw" => "__builtin_HEXAGON_M7_dcmpyiw",
+    "llvm.hexagon.M7.dcmpyiw.acc" => "__builtin_HEXAGON_M7_dcmpyiw_acc",
+    "llvm.hexagon.M7.dcmpyiwc" => "__builtin_HEXAGON_M7_dcmpyiwc",
+    "llvm.hexagon.M7.dcmpyiwc.acc" => "__builtin_HEXAGON_M7_dcmpyiwc_acc",
+    "llvm.hexagon.M7.dcmpyrw" => "__builtin_HEXAGON_M7_dcmpyrw",
+    "llvm.hexagon.M7.dcmpyrw.acc" => "__builtin_HEXAGON_M7_dcmpyrw_acc",
+    "llvm.hexagon.M7.dcmpyrwc" => "__builtin_HEXAGON_M7_dcmpyrwc",
+    "llvm.hexagon.M7.dcmpyrwc.acc" => "__builtin_HEXAGON_M7_dcmpyrwc_acc",
+    "llvm.hexagon.M7.vdmpy" => "__builtin_HEXAGON_M7_vdmpy",
+    "llvm.hexagon.M7.vdmpy.acc" => "__builtin_HEXAGON_M7_vdmpy_acc",
+    "llvm.hexagon.M7.wcmpyiw" => "__builtin_HEXAGON_M7_wcmpyiw",
+    "llvm.hexagon.M7.wcmpyiw.rnd" => "__builtin_HEXAGON_M7_wcmpyiw_rnd",
+    "llvm.hexagon.M7.wcmpyiwc" => "__builtin_HEXAGON_M7_wcmpyiwc",
+    "llvm.hexagon.M7.wcmpyiwc.rnd" => "__builtin_HEXAGON_M7_wcmpyiwc_rnd",
+    "llvm.hexagon.M7.wcmpyrw" => "__builtin_HEXAGON_M7_wcmpyrw",
+    "llvm.hexagon.M7.wcmpyrw.rnd" => "__builtin_HEXAGON_M7_wcmpyrw_rnd",
+    "llvm.hexagon.M7.wcmpyrwc" => "__builtin_HEXAGON_M7_wcmpyrwc",
+    "llvm.hexagon.M7.wcmpyrwc.rnd" => "__builtin_HEXAGON_M7_wcmpyrwc_rnd",
     "llvm.hexagon.S2.addasl.rrri" => "__builtin_HEXAGON_S2_addasl_rrri",
     "llvm.hexagon.S2.asl.i.p" => "__builtin_HEXAGON_S2_asl_i_p",
     "llvm.hexagon.S2.asl.i.p.acc" => "__builtin_HEXAGON_S2_asl_i_p_acc",
@@ -1023,6 +1093,7 @@ match name {
     "llvm.hexagon.S2.lsr.r.r.or" => "__builtin_HEXAGON_S2_lsr_r_r_or",
     "llvm.hexagon.S2.lsr.r.vh" => "__builtin_HEXAGON_S2_lsr_r_vh",
     "llvm.hexagon.S2.lsr.r.vw" => "__builtin_HEXAGON_S2_lsr_r_vw",
+    "llvm.hexagon.S2.mask" => "__builtin_HEXAGON_S2_mask",
     "llvm.hexagon.S2.packhl" => "__builtin_HEXAGON_S2_packhl",
     "llvm.hexagon.S2.parityp" => "__builtin_HEXAGON_S2_parityp",
     "llvm.hexagon.S2.setbit.i" => "__builtin_HEXAGON_S2_setbit_i",
@@ -1031,6 +1102,12 @@ match name {
     "llvm.hexagon.S2.shuffeh" => "__builtin_HEXAGON_S2_shuffeh",
     "llvm.hexagon.S2.shuffob" => "__builtin_HEXAGON_S2_shuffob",
     "llvm.hexagon.S2.shuffoh" => "__builtin_HEXAGON_S2_shuffoh",
+    "llvm.hexagon.S2.storerb.pbr" => "__builtin_brev_stb",
+    "llvm.hexagon.S2.storerd.pbr" => "__builtin_brev_std",
+    "llvm.hexagon.S2.storerf.pbr" => "__builtin_brev_sthhi",
+    "llvm.hexagon.S2.storerh.pbr" => "__builtin_brev_sth",
+    "llvm.hexagon.S2.storeri.pbr" => "__builtin_brev_stw",
+    "llvm.hexagon.S2.storew.locked" => "__builtin_HEXAGON_S2_storew_locked",
     "llvm.hexagon.S2.svsathb" => "__builtin_HEXAGON_S2_svsathb",
     "llvm.hexagon.S2.svsathub" => "__builtin_HEXAGON_S2_svsathub",
     "llvm.hexagon.S2.tableidxb.goodsyntax" => "__builtin_HEXAGON_S2_tableidxb_goodsyntax",
@@ -1089,6 +1166,7 @@ match name {
     "llvm.hexagon.S4.ori.asl.ri" => "__builtin_HEXAGON_S4_ori_asl_ri",
     "llvm.hexagon.S4.ori.lsr.ri" => "__builtin_HEXAGON_S4_ori_lsr_ri",
     "llvm.hexagon.S4.parity" => "__builtin_HEXAGON_S4_parity",
+    "llvm.hexagon.S4.stored.locked" => "__builtin_HEXAGON_S4_stored_locked",
     "llvm.hexagon.S4.subaddi" => "__builtin_HEXAGON_S4_subaddi",
     "llvm.hexagon.S4.subi.asl.ri" => "__builtin_HEXAGON_S4_subi_asl_ri",
     "llvm.hexagon.S4.subi.lsr.ri" => "__builtin_HEXAGON_S4_subi_lsr_ri",
@@ -1126,8 +1204,56 @@ match name {
     "llvm.hexagon.V6.hi.128B" => "__builtin_HEXAGON_V6_hi_128B",
     "llvm.hexagon.V6.lo" => "__builtin_HEXAGON_V6_lo",
     "llvm.hexagon.V6.lo.128B" => "__builtin_HEXAGON_V6_lo_128B",
+    "llvm.hexagon.V6.lvsplatb" => "__builtin_HEXAGON_V6_lvsplatb",
+    "llvm.hexagon.V6.lvsplatb.128B" => "__builtin_HEXAGON_V6_lvsplatb_128B",
+    "llvm.hexagon.V6.lvsplath" => "__builtin_HEXAGON_V6_lvsplath",
+    "llvm.hexagon.V6.lvsplath.128B" => "__builtin_HEXAGON_V6_lvsplath_128B",
     "llvm.hexagon.V6.lvsplatw" => "__builtin_HEXAGON_V6_lvsplatw",
     "llvm.hexagon.V6.lvsplatw.128B" => "__builtin_HEXAGON_V6_lvsplatw_128B",
+    "llvm.hexagon.V6.pred.and" => "__builtin_HEXAGON_V6_pred_and",
+    "llvm.hexagon.V6.pred.and.128B" => "__builtin_HEXAGON_V6_pred_and_128B",
+    "llvm.hexagon.V6.pred.and.n" => "__builtin_HEXAGON_V6_pred_and_n",
+    "llvm.hexagon.V6.pred.and.n.128B" => "__builtin_HEXAGON_V6_pred_and_n_128B",
+    "llvm.hexagon.V6.pred.not" => "__builtin_HEXAGON_V6_pred_not",
+    "llvm.hexagon.V6.pred.not.128B" => "__builtin_HEXAGON_V6_pred_not_128B",
+    "llvm.hexagon.V6.pred.or" => "__builtin_HEXAGON_V6_pred_or",
+    "llvm.hexagon.V6.pred.or.128B" => "__builtin_HEXAGON_V6_pred_or_128B",
+    "llvm.hexagon.V6.pred.or.n" => "__builtin_HEXAGON_V6_pred_or_n",
+    "llvm.hexagon.V6.pred.or.n.128B" => "__builtin_HEXAGON_V6_pred_or_n_128B",
+    "llvm.hexagon.V6.pred.scalar2" => "__builtin_HEXAGON_V6_pred_scalar2",
+    "llvm.hexagon.V6.pred.scalar2.128B" => "__builtin_HEXAGON_V6_pred_scalar2_128B",
+    "llvm.hexagon.V6.pred.scalar2v2" => "__builtin_HEXAGON_V6_pred_scalar2v2",
+    "llvm.hexagon.V6.pred.scalar2v2.128B" => "__builtin_HEXAGON_V6_pred_scalar2v2_128B",
+    "llvm.hexagon.V6.pred.xor" => "__builtin_HEXAGON_V6_pred_xor",
+    "llvm.hexagon.V6.pred.xor.128B" => "__builtin_HEXAGON_V6_pred_xor_128B",
+    "llvm.hexagon.V6.shuffeqh" => "__builtin_HEXAGON_V6_shuffeqh",
+    "llvm.hexagon.V6.shuffeqh.128B" => "__builtin_HEXAGON_V6_shuffeqh_128B",
+    "llvm.hexagon.V6.shuffeqw" => "__builtin_HEXAGON_V6_shuffeqw",
+    "llvm.hexagon.V6.shuffeqw.128B" => "__builtin_HEXAGON_V6_shuffeqw_128B",
+    "llvm.hexagon.V6.v6mpyhubs10" => "__builtin_HEXAGON_V6_v6mpyhubs10",
+    "llvm.hexagon.V6.v6mpyhubs10.128B" => "__builtin_HEXAGON_V6_v6mpyhubs10_128B",
+    "llvm.hexagon.V6.v6mpyhubs10.vxx" => "__builtin_HEXAGON_V6_v6mpyhubs10_vxx",
+    "llvm.hexagon.V6.v6mpyhubs10.vxx.128B" => "__builtin_HEXAGON_V6_v6mpyhubs10_vxx_128B",
+    "llvm.hexagon.V6.v6mpyvubs10" => "__builtin_HEXAGON_V6_v6mpyvubs10",
+    "llvm.hexagon.V6.v6mpyvubs10.128B" => "__builtin_HEXAGON_V6_v6mpyvubs10_128B",
+    "llvm.hexagon.V6.v6mpyvubs10.vxx" => "__builtin_HEXAGON_V6_v6mpyvubs10_vxx",
+    "llvm.hexagon.V6.v6mpyvubs10.vxx.128B" => "__builtin_HEXAGON_V6_v6mpyvubs10_vxx_128B",
+    "llvm.hexagon.V6.vS32b.nqpred.ai" => "__builtin_HEXAGON_V6_vS32b_nqpred_ai",
+    "llvm.hexagon.V6.vS32b.nqpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nqpred_ai_128B",
+    "llvm.hexagon.V6.vS32b.nt.nqpred.ai" => "__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai",
+    "llvm.hexagon.V6.vS32b.nt.nqpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai_128B",
+    "llvm.hexagon.V6.vS32b.nt.qpred.ai" => "__builtin_HEXAGON_V6_vS32b_nt_qpred_ai",
+    "llvm.hexagon.V6.vS32b.nt.qpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nt_qpred_ai_128B",
+    "llvm.hexagon.V6.vS32b.qpred.ai" => "__builtin_HEXAGON_V6_vS32b_qpred_ai",
+    "llvm.hexagon.V6.vS32b.qpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_qpred_ai_128B",
+    "llvm.hexagon.V6.vabs.hf" => "__builtin_HEXAGON_V6_vabs_hf",
+    "llvm.hexagon.V6.vabs.hf.128B" => "__builtin_HEXAGON_V6_vabs_hf_128B",
+    "llvm.hexagon.V6.vabs.sf" => "__builtin_HEXAGON_V6_vabs_sf",
+    "llvm.hexagon.V6.vabs.sf.128B" => "__builtin_HEXAGON_V6_vabs_sf_128B",
+    "llvm.hexagon.V6.vabsb" => "__builtin_HEXAGON_V6_vabsb",
+    "llvm.hexagon.V6.vabsb.128B" => "__builtin_HEXAGON_V6_vabsb_128B",
+    "llvm.hexagon.V6.vabsb.sat" => "__builtin_HEXAGON_V6_vabsb_sat",
+    "llvm.hexagon.V6.vabsb.sat.128B" => "__builtin_HEXAGON_V6_vabsb_sat_128B",
     "llvm.hexagon.V6.vabsdiffh" => "__builtin_HEXAGON_V6_vabsdiffh",
     "llvm.hexagon.V6.vabsdiffh.128B" => "__builtin_HEXAGON_V6_vabsdiffh_128B",
     "llvm.hexagon.V6.vabsdiffub" => "__builtin_HEXAGON_V6_vabsdiffub",
@@ -1144,36 +1270,88 @@ match name {
     "llvm.hexagon.V6.vabsw.128B" => "__builtin_HEXAGON_V6_vabsw_128B",
     "llvm.hexagon.V6.vabsw.sat" => "__builtin_HEXAGON_V6_vabsw_sat",
     "llvm.hexagon.V6.vabsw.sat.128B" => "__builtin_HEXAGON_V6_vabsw_sat_128B",
+    "llvm.hexagon.V6.vadd.hf" => "__builtin_HEXAGON_V6_vadd_hf",
+    "llvm.hexagon.V6.vadd.hf.128B" => "__builtin_HEXAGON_V6_vadd_hf_128B",
+    "llvm.hexagon.V6.vadd.hf.hf" => "__builtin_HEXAGON_V6_vadd_hf_hf",
+    "llvm.hexagon.V6.vadd.hf.hf.128B" => "__builtin_HEXAGON_V6_vadd_hf_hf_128B",
+    "llvm.hexagon.V6.vadd.qf16" => "__builtin_HEXAGON_V6_vadd_qf16",
+    "llvm.hexagon.V6.vadd.qf16.128B" => "__builtin_HEXAGON_V6_vadd_qf16_128B",
+    "llvm.hexagon.V6.vadd.qf16.mix" => "__builtin_HEXAGON_V6_vadd_qf16_mix",
+    "llvm.hexagon.V6.vadd.qf16.mix.128B" => "__builtin_HEXAGON_V6_vadd_qf16_mix_128B",
+    "llvm.hexagon.V6.vadd.qf32" => "__builtin_HEXAGON_V6_vadd_qf32",
+    "llvm.hexagon.V6.vadd.qf32.128B" => "__builtin_HEXAGON_V6_vadd_qf32_128B",
+    "llvm.hexagon.V6.vadd.qf32.mix" => "__builtin_HEXAGON_V6_vadd_qf32_mix",
+    "llvm.hexagon.V6.vadd.qf32.mix.128B" => "__builtin_HEXAGON_V6_vadd_qf32_mix_128B",
+    "llvm.hexagon.V6.vadd.sf" => "__builtin_HEXAGON_V6_vadd_sf",
+    "llvm.hexagon.V6.vadd.sf.128B" => "__builtin_HEXAGON_V6_vadd_sf_128B",
+    "llvm.hexagon.V6.vadd.sf.hf" => "__builtin_HEXAGON_V6_vadd_sf_hf",
+    "llvm.hexagon.V6.vadd.sf.hf.128B" => "__builtin_HEXAGON_V6_vadd_sf_hf_128B",
+    "llvm.hexagon.V6.vadd.sf.sf" => "__builtin_HEXAGON_V6_vadd_sf_sf",
+    "llvm.hexagon.V6.vadd.sf.sf.128B" => "__builtin_HEXAGON_V6_vadd_sf_sf_128B",
     "llvm.hexagon.V6.vaddb" => "__builtin_HEXAGON_V6_vaddb",
     "llvm.hexagon.V6.vaddb.128B" => "__builtin_HEXAGON_V6_vaddb_128B",
     "llvm.hexagon.V6.vaddb.dv" => "__builtin_HEXAGON_V6_vaddb_dv",
     "llvm.hexagon.V6.vaddb.dv.128B" => "__builtin_HEXAGON_V6_vaddb_dv_128B",
+    "llvm.hexagon.V6.vaddbnq" => "__builtin_HEXAGON_V6_vaddbnq",
+    "llvm.hexagon.V6.vaddbnq.128B" => "__builtin_HEXAGON_V6_vaddbnq_128B",
+    "llvm.hexagon.V6.vaddbq" => "__builtin_HEXAGON_V6_vaddbq",
+    "llvm.hexagon.V6.vaddbq.128B" => "__builtin_HEXAGON_V6_vaddbq_128B",
+    "llvm.hexagon.V6.vaddbsat" => "__builtin_HEXAGON_V6_vaddbsat",
+    "llvm.hexagon.V6.vaddbsat.128B" => "__builtin_HEXAGON_V6_vaddbsat_128B",
+    "llvm.hexagon.V6.vaddbsat.dv" => "__builtin_HEXAGON_V6_vaddbsat_dv",
+    "llvm.hexagon.V6.vaddbsat.dv.128B" => "__builtin_HEXAGON_V6_vaddbsat_dv_128B",
+    "llvm.hexagon.V6.vaddcarrysat" => "__builtin_HEXAGON_V6_vaddcarrysat",
+    "llvm.hexagon.V6.vaddcarrysat.128B" => "__builtin_HEXAGON_V6_vaddcarrysat_128B",
+    "llvm.hexagon.V6.vaddclbh" => "__builtin_HEXAGON_V6_vaddclbh",
+    "llvm.hexagon.V6.vaddclbh.128B" => "__builtin_HEXAGON_V6_vaddclbh_128B",
+    "llvm.hexagon.V6.vaddclbw" => "__builtin_HEXAGON_V6_vaddclbw",
+    "llvm.hexagon.V6.vaddclbw.128B" => "__builtin_HEXAGON_V6_vaddclbw_128B",
     "llvm.hexagon.V6.vaddh" => "__builtin_HEXAGON_V6_vaddh",
     "llvm.hexagon.V6.vaddh.128B" => "__builtin_HEXAGON_V6_vaddh_128B",
     "llvm.hexagon.V6.vaddh.dv" => "__builtin_HEXAGON_V6_vaddh_dv",
     "llvm.hexagon.V6.vaddh.dv.128B" => "__builtin_HEXAGON_V6_vaddh_dv_128B",
+    "llvm.hexagon.V6.vaddhnq" => "__builtin_HEXAGON_V6_vaddhnq",
+    "llvm.hexagon.V6.vaddhnq.128B" => "__builtin_HEXAGON_V6_vaddhnq_128B",
+    "llvm.hexagon.V6.vaddhq" => "__builtin_HEXAGON_V6_vaddhq",
+    "llvm.hexagon.V6.vaddhq.128B" => "__builtin_HEXAGON_V6_vaddhq_128B",
     "llvm.hexagon.V6.vaddhsat" => "__builtin_HEXAGON_V6_vaddhsat",
     "llvm.hexagon.V6.vaddhsat.128B" => "__builtin_HEXAGON_V6_vaddhsat_128B",
     "llvm.hexagon.V6.vaddhsat.dv" => "__builtin_HEXAGON_V6_vaddhsat_dv",
     "llvm.hexagon.V6.vaddhsat.dv.128B" => "__builtin_HEXAGON_V6_vaddhsat_dv_128B",
     "llvm.hexagon.V6.vaddhw" => "__builtin_HEXAGON_V6_vaddhw",
     "llvm.hexagon.V6.vaddhw.128B" => "__builtin_HEXAGON_V6_vaddhw_128B",
+    "llvm.hexagon.V6.vaddhw.acc" => "__builtin_HEXAGON_V6_vaddhw_acc",
+    "llvm.hexagon.V6.vaddhw.acc.128B" => "__builtin_HEXAGON_V6_vaddhw_acc_128B",
     "llvm.hexagon.V6.vaddubh" => "__builtin_HEXAGON_V6_vaddubh",
     "llvm.hexagon.V6.vaddubh.128B" => "__builtin_HEXAGON_V6_vaddubh_128B",
+    "llvm.hexagon.V6.vaddubh.acc" => "__builtin_HEXAGON_V6_vaddubh_acc",
+    "llvm.hexagon.V6.vaddubh.acc.128B" => "__builtin_HEXAGON_V6_vaddubh_acc_128B",
     "llvm.hexagon.V6.vaddubsat" => "__builtin_HEXAGON_V6_vaddubsat",
     "llvm.hexagon.V6.vaddubsat.128B" => "__builtin_HEXAGON_V6_vaddubsat_128B",
     "llvm.hexagon.V6.vaddubsat.dv" => "__builtin_HEXAGON_V6_vaddubsat_dv",
     "llvm.hexagon.V6.vaddubsat.dv.128B" => "__builtin_HEXAGON_V6_vaddubsat_dv_128B",
+    "llvm.hexagon.V6.vaddububb.sat" => "__builtin_HEXAGON_V6_vaddububb_sat",
+    "llvm.hexagon.V6.vaddububb.sat.128B" => "__builtin_HEXAGON_V6_vaddububb_sat_128B",
     "llvm.hexagon.V6.vadduhsat" => "__builtin_HEXAGON_V6_vadduhsat",
     "llvm.hexagon.V6.vadduhsat.128B" => "__builtin_HEXAGON_V6_vadduhsat_128B",
     "llvm.hexagon.V6.vadduhsat.dv" => "__builtin_HEXAGON_V6_vadduhsat_dv",
     "llvm.hexagon.V6.vadduhsat.dv.128B" => "__builtin_HEXAGON_V6_vadduhsat_dv_128B",
     "llvm.hexagon.V6.vadduhw" => "__builtin_HEXAGON_V6_vadduhw",
     "llvm.hexagon.V6.vadduhw.128B" => "__builtin_HEXAGON_V6_vadduhw_128B",
+    "llvm.hexagon.V6.vadduhw.acc" => "__builtin_HEXAGON_V6_vadduhw_acc",
+    "llvm.hexagon.V6.vadduhw.acc.128B" => "__builtin_HEXAGON_V6_vadduhw_acc_128B",
+    "llvm.hexagon.V6.vadduwsat" => "__builtin_HEXAGON_V6_vadduwsat",
+    "llvm.hexagon.V6.vadduwsat.128B" => "__builtin_HEXAGON_V6_vadduwsat_128B",
+    "llvm.hexagon.V6.vadduwsat.dv" => "__builtin_HEXAGON_V6_vadduwsat_dv",
+    "llvm.hexagon.V6.vadduwsat.dv.128B" => "__builtin_HEXAGON_V6_vadduwsat_dv_128B",
     "llvm.hexagon.V6.vaddw" => "__builtin_HEXAGON_V6_vaddw",
     "llvm.hexagon.V6.vaddw.128B" => "__builtin_HEXAGON_V6_vaddw_128B",
     "llvm.hexagon.V6.vaddw.dv" => "__builtin_HEXAGON_V6_vaddw_dv",
     "llvm.hexagon.V6.vaddw.dv.128B" => "__builtin_HEXAGON_V6_vaddw_dv_128B",
+    "llvm.hexagon.V6.vaddwnq" => "__builtin_HEXAGON_V6_vaddwnq",
+    "llvm.hexagon.V6.vaddwnq.128B" => "__builtin_HEXAGON_V6_vaddwnq_128B",
+    "llvm.hexagon.V6.vaddwq" => "__builtin_HEXAGON_V6_vaddwq",
+    "llvm.hexagon.V6.vaddwq.128B" => "__builtin_HEXAGON_V6_vaddwq_128B",
     "llvm.hexagon.V6.vaddwsat" => "__builtin_HEXAGON_V6_vaddwsat",
     "llvm.hexagon.V6.vaddwsat.128B" => "__builtin_HEXAGON_V6_vaddwsat_128B",
     "llvm.hexagon.V6.vaddwsat.dv" => "__builtin_HEXAGON_V6_vaddwsat_dv",
@@ -1184,8 +1362,26 @@ match name {
     "llvm.hexagon.V6.valignbi.128B" => "__builtin_HEXAGON_V6_valignbi_128B",
     "llvm.hexagon.V6.vand" => "__builtin_HEXAGON_V6_vand",
     "llvm.hexagon.V6.vand.128B" => "__builtin_HEXAGON_V6_vand_128B",
+    "llvm.hexagon.V6.vandnqrt" => "__builtin_HEXAGON_V6_vandnqrt",
+    "llvm.hexagon.V6.vandnqrt.128B" => "__builtin_HEXAGON_V6_vandnqrt_128B",
+    "llvm.hexagon.V6.vandnqrt.acc" => "__builtin_HEXAGON_V6_vandnqrt_acc",
+    "llvm.hexagon.V6.vandnqrt.acc.128B" => "__builtin_HEXAGON_V6_vandnqrt_acc_128B",
+    "llvm.hexagon.V6.vandqrt" => "__builtin_HEXAGON_V6_vandqrt",
+    "llvm.hexagon.V6.vandqrt.128B" => "__builtin_HEXAGON_V6_vandqrt_128B",
+    "llvm.hexagon.V6.vandqrt.acc" => "__builtin_HEXAGON_V6_vandqrt_acc",
+    "llvm.hexagon.V6.vandqrt.acc.128B" => "__builtin_HEXAGON_V6_vandqrt_acc_128B",
+    "llvm.hexagon.V6.vandvnqv" => "__builtin_HEXAGON_V6_vandvnqv",
+    "llvm.hexagon.V6.vandvnqv.128B" => "__builtin_HEXAGON_V6_vandvnqv_128B",
+    "llvm.hexagon.V6.vandvqv" => "__builtin_HEXAGON_V6_vandvqv",
+    "llvm.hexagon.V6.vandvqv.128B" => "__builtin_HEXAGON_V6_vandvqv_128B",
+    "llvm.hexagon.V6.vandvrt" => "__builtin_HEXAGON_V6_vandvrt",
+    "llvm.hexagon.V6.vandvrt.128B" => "__builtin_HEXAGON_V6_vandvrt_128B",
+    "llvm.hexagon.V6.vandvrt.acc" => "__builtin_HEXAGON_V6_vandvrt_acc",
+    "llvm.hexagon.V6.vandvrt.acc.128B" => "__builtin_HEXAGON_V6_vandvrt_acc_128B",
     "llvm.hexagon.V6.vaslh" => "__builtin_HEXAGON_V6_vaslh",
     "llvm.hexagon.V6.vaslh.128B" => "__builtin_HEXAGON_V6_vaslh_128B",
+    "llvm.hexagon.V6.vaslh.acc" => "__builtin_HEXAGON_V6_vaslh_acc",
+    "llvm.hexagon.V6.vaslh.acc.128B" => "__builtin_HEXAGON_V6_vaslh_acc_128B",
     "llvm.hexagon.V6.vaslhv" => "__builtin_HEXAGON_V6_vaslhv",
     "llvm.hexagon.V6.vaslhv.128B" => "__builtin_HEXAGON_V6_vaslhv_128B",
     "llvm.hexagon.V6.vaslw" => "__builtin_HEXAGON_V6_vaslw",
@@ -1194,16 +1390,38 @@ match name {
     "llvm.hexagon.V6.vaslw.acc.128B" => "__builtin_HEXAGON_V6_vaslw_acc_128B",
     "llvm.hexagon.V6.vaslwv" => "__builtin_HEXAGON_V6_vaslwv",
     "llvm.hexagon.V6.vaslwv.128B" => "__builtin_HEXAGON_V6_vaslwv_128B",
+    "llvm.hexagon.V6.vasr.into" => "__builtin_HEXAGON_V6_vasr_into",
+    "llvm.hexagon.V6.vasr.into.128B" => "__builtin_HEXAGON_V6_vasr_into_128B",
     "llvm.hexagon.V6.vasrh" => "__builtin_HEXAGON_V6_vasrh",
     "llvm.hexagon.V6.vasrh.128B" => "__builtin_HEXAGON_V6_vasrh_128B",
+    "llvm.hexagon.V6.vasrh.acc" => "__builtin_HEXAGON_V6_vasrh_acc",
+    "llvm.hexagon.V6.vasrh.acc.128B" => "__builtin_HEXAGON_V6_vasrh_acc_128B",
     "llvm.hexagon.V6.vasrhbrndsat" => "__builtin_HEXAGON_V6_vasrhbrndsat",
     "llvm.hexagon.V6.vasrhbrndsat.128B" => "__builtin_HEXAGON_V6_vasrhbrndsat_128B",
+    "llvm.hexagon.V6.vasrhbsat" => "__builtin_HEXAGON_V6_vasrhbsat",
+    "llvm.hexagon.V6.vasrhbsat.128B" => "__builtin_HEXAGON_V6_vasrhbsat_128B",
     "llvm.hexagon.V6.vasrhubrndsat" => "__builtin_HEXAGON_V6_vasrhubrndsat",
     "llvm.hexagon.V6.vasrhubrndsat.128B" => "__builtin_HEXAGON_V6_vasrhubrndsat_128B",
     "llvm.hexagon.V6.vasrhubsat" => "__builtin_HEXAGON_V6_vasrhubsat",
     "llvm.hexagon.V6.vasrhubsat.128B" => "__builtin_HEXAGON_V6_vasrhubsat_128B",
     "llvm.hexagon.V6.vasrhv" => "__builtin_HEXAGON_V6_vasrhv",
     "llvm.hexagon.V6.vasrhv.128B" => "__builtin_HEXAGON_V6_vasrhv_128B",
+    "llvm.hexagon.V6.vasruhubrndsat" => "__builtin_HEXAGON_V6_vasruhubrndsat",
+    "llvm.hexagon.V6.vasruhubrndsat.128B" => "__builtin_HEXAGON_V6_vasruhubrndsat_128B",
+    "llvm.hexagon.V6.vasruhubsat" => "__builtin_HEXAGON_V6_vasruhubsat",
+    "llvm.hexagon.V6.vasruhubsat.128B" => "__builtin_HEXAGON_V6_vasruhubsat_128B",
+    "llvm.hexagon.V6.vasruwuhrndsat" => "__builtin_HEXAGON_V6_vasruwuhrndsat",
+    "llvm.hexagon.V6.vasruwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasruwuhrndsat_128B",
+    "llvm.hexagon.V6.vasruwuhsat" => "__builtin_HEXAGON_V6_vasruwuhsat",
+    "llvm.hexagon.V6.vasruwuhsat.128B" => "__builtin_HEXAGON_V6_vasruwuhsat_128B",
+    "llvm.hexagon.V6.vasrvuhubrndsat" => "__builtin_HEXAGON_V6_vasrvuhubrndsat",
+    "llvm.hexagon.V6.vasrvuhubrndsat.128B" => "__builtin_HEXAGON_V6_vasrvuhubrndsat_128B",
+    "llvm.hexagon.V6.vasrvuhubsat" => "__builtin_HEXAGON_V6_vasrvuhubsat",
+    "llvm.hexagon.V6.vasrvuhubsat.128B" => "__builtin_HEXAGON_V6_vasrvuhubsat_128B",
+    "llvm.hexagon.V6.vasrvwuhrndsat" => "__builtin_HEXAGON_V6_vasrvwuhrndsat",
+    "llvm.hexagon.V6.vasrvwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasrvwuhrndsat_128B",
+    "llvm.hexagon.V6.vasrvwuhsat" => "__builtin_HEXAGON_V6_vasrvwuhsat",
+    "llvm.hexagon.V6.vasrvwuhsat.128B" => "__builtin_HEXAGON_V6_vasrvwuhsat_128B",
     "llvm.hexagon.V6.vasrw" => "__builtin_HEXAGON_V6_vasrw",
     "llvm.hexagon.V6.vasrw.128B" => "__builtin_HEXAGON_V6_vasrw_128B",
     "llvm.hexagon.V6.vasrw.acc" => "__builtin_HEXAGON_V6_vasrw_acc",
@@ -1214,14 +1432,22 @@ match name {
     "llvm.hexagon.V6.vasrwhrndsat.128B" => "__builtin_HEXAGON_V6_vasrwhrndsat_128B",
     "llvm.hexagon.V6.vasrwhsat" => "__builtin_HEXAGON_V6_vasrwhsat",
     "llvm.hexagon.V6.vasrwhsat.128B" => "__builtin_HEXAGON_V6_vasrwhsat_128B",
+    "llvm.hexagon.V6.vasrwuhrndsat" => "__builtin_HEXAGON_V6_vasrwuhrndsat",
+    "llvm.hexagon.V6.vasrwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasrwuhrndsat_128B",
     "llvm.hexagon.V6.vasrwuhsat" => "__builtin_HEXAGON_V6_vasrwuhsat",
     "llvm.hexagon.V6.vasrwuhsat.128B" => "__builtin_HEXAGON_V6_vasrwuhsat_128B",
     "llvm.hexagon.V6.vasrwv" => "__builtin_HEXAGON_V6_vasrwv",
     "llvm.hexagon.V6.vasrwv.128B" => "__builtin_HEXAGON_V6_vasrwv_128B",
     "llvm.hexagon.V6.vassign" => "__builtin_HEXAGON_V6_vassign",
     "llvm.hexagon.V6.vassign.128B" => "__builtin_HEXAGON_V6_vassign_128B",
+    "llvm.hexagon.V6.vassign.fp" => "__builtin_HEXAGON_V6_vassign_fp",
+    "llvm.hexagon.V6.vassign.fp.128B" => "__builtin_HEXAGON_V6_vassign_fp_128B",
     "llvm.hexagon.V6.vassignp" => "__builtin_HEXAGON_V6_vassignp",
     "llvm.hexagon.V6.vassignp.128B" => "__builtin_HEXAGON_V6_vassignp_128B",
+    "llvm.hexagon.V6.vavgb" => "__builtin_HEXAGON_V6_vavgb",
+    "llvm.hexagon.V6.vavgb.128B" => "__builtin_HEXAGON_V6_vavgb_128B",
+    "llvm.hexagon.V6.vavgbrnd" => "__builtin_HEXAGON_V6_vavgbrnd",
+    "llvm.hexagon.V6.vavgbrnd.128B" => "__builtin_HEXAGON_V6_vavgbrnd_128B",
     "llvm.hexagon.V6.vavgh" => "__builtin_HEXAGON_V6_vavgh",
     "llvm.hexagon.V6.vavgh.128B" => "__builtin_HEXAGON_V6_vavgh_128B",
     "llvm.hexagon.V6.vavghrnd" => "__builtin_HEXAGON_V6_vavghrnd",
@@ -1234,6 +1460,10 @@ match name {
     "llvm.hexagon.V6.vavguh.128B" => "__builtin_HEXAGON_V6_vavguh_128B",
     "llvm.hexagon.V6.vavguhrnd" => "__builtin_HEXAGON_V6_vavguhrnd",
     "llvm.hexagon.V6.vavguhrnd.128B" => "__builtin_HEXAGON_V6_vavguhrnd_128B",
+    "llvm.hexagon.V6.vavguw" => "__builtin_HEXAGON_V6_vavguw",
+    "llvm.hexagon.V6.vavguw.128B" => "__builtin_HEXAGON_V6_vavguw_128B",
+    "llvm.hexagon.V6.vavguwrnd" => "__builtin_HEXAGON_V6_vavguwrnd",
+    "llvm.hexagon.V6.vavguwrnd.128B" => "__builtin_HEXAGON_V6_vavguwrnd_128B",
     "llvm.hexagon.V6.vavgw" => "__builtin_HEXAGON_V6_vavgw",
     "llvm.hexagon.V6.vavgw.128B" => "__builtin_HEXAGON_V6_vavgw_128B",
     "llvm.hexagon.V6.vavgwrnd" => "__builtin_HEXAGON_V6_vavgwrnd",
@@ -1244,8 +1474,36 @@ match name {
     "llvm.hexagon.V6.vcl0w.128B" => "__builtin_HEXAGON_V6_vcl0w_128B",
     "llvm.hexagon.V6.vcombine" => "__builtin_HEXAGON_V6_vcombine",
     "llvm.hexagon.V6.vcombine.128B" => "__builtin_HEXAGON_V6_vcombine_128B",
+    "llvm.hexagon.V6.vconv.hf.qf16" => "__builtin_HEXAGON_V6_vconv_hf_qf16",
+    "llvm.hexagon.V6.vconv.hf.qf16.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf16_128B",
+    "llvm.hexagon.V6.vconv.hf.qf32" => "__builtin_HEXAGON_V6_vconv_hf_qf32",
+    "llvm.hexagon.V6.vconv.hf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf32_128B",
+    "llvm.hexagon.V6.vconv.sf.qf32" => "__builtin_HEXAGON_V6_vconv_sf_qf32",
+    "llvm.hexagon.V6.vconv.sf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_sf_qf32_128B",
+    "llvm.hexagon.V6.vcvt.b.hf" => "__builtin_HEXAGON_V6_vcvt_b_hf",
+    "llvm.hexagon.V6.vcvt.b.hf.128B" => "__builtin_HEXAGON_V6_vcvt_b_hf_128B",
+    "llvm.hexagon.V6.vcvt.h.hf" => "__builtin_HEXAGON_V6_vcvt_h_hf",
+    "llvm.hexagon.V6.vcvt.h.hf.128B" => "__builtin_HEXAGON_V6_vcvt_h_hf_128B",
+    "llvm.hexagon.V6.vcvt.hf.b" => "__builtin_HEXAGON_V6_vcvt_hf_b",
+    "llvm.hexagon.V6.vcvt.hf.b.128B" => "__builtin_HEXAGON_V6_vcvt_hf_b_128B",
+    "llvm.hexagon.V6.vcvt.hf.h" => "__builtin_HEXAGON_V6_vcvt_hf_h",
+    "llvm.hexagon.V6.vcvt.hf.h.128B" => "__builtin_HEXAGON_V6_vcvt_hf_h_128B",
+    "llvm.hexagon.V6.vcvt.hf.sf" => "__builtin_HEXAGON_V6_vcvt_hf_sf",
+    "llvm.hexagon.V6.vcvt.hf.sf.128B" => "__builtin_HEXAGON_V6_vcvt_hf_sf_128B",
+    "llvm.hexagon.V6.vcvt.hf.ub" => "__builtin_HEXAGON_V6_vcvt_hf_ub",
+    "llvm.hexagon.V6.vcvt.hf.ub.128B" => "__builtin_HEXAGON_V6_vcvt_hf_ub_128B",
+    "llvm.hexagon.V6.vcvt.hf.uh" => "__builtin_HEXAGON_V6_vcvt_hf_uh",
+    "llvm.hexagon.V6.vcvt.hf.uh.128B" => "__builtin_HEXAGON_V6_vcvt_hf_uh_128B",
+    "llvm.hexagon.V6.vcvt.sf.hf" => "__builtin_HEXAGON_V6_vcvt_sf_hf",
+    "llvm.hexagon.V6.vcvt.sf.hf.128B" => "__builtin_HEXAGON_V6_vcvt_sf_hf_128B",
+    "llvm.hexagon.V6.vcvt.ub.hf" => "__builtin_HEXAGON_V6_vcvt_ub_hf",
+    "llvm.hexagon.V6.vcvt.ub.hf.128B" => "__builtin_HEXAGON_V6_vcvt_ub_hf_128B",
+    "llvm.hexagon.V6.vcvt.uh.hf" => "__builtin_HEXAGON_V6_vcvt_uh_hf",
+    "llvm.hexagon.V6.vcvt.uh.hf.128B" => "__builtin_HEXAGON_V6_vcvt_uh_hf_128B",
     "llvm.hexagon.V6.vd0" => "__builtin_HEXAGON_V6_vd0",
     "llvm.hexagon.V6.vd0.128B" => "__builtin_HEXAGON_V6_vd0_128B",
+    "llvm.hexagon.V6.vdd0" => "__builtin_HEXAGON_V6_vdd0",
+    "llvm.hexagon.V6.vdd0.128B" => "__builtin_HEXAGON_V6_vdd0_128B",
     "llvm.hexagon.V6.vdealb" => "__builtin_HEXAGON_V6_vdealb",
     "llvm.hexagon.V6.vdealb.128B" => "__builtin_HEXAGON_V6_vdealb_128B",
     "llvm.hexagon.V6.vdealb4w" => "__builtin_HEXAGON_V6_vdealb4w",
@@ -1256,6 +1514,10 @@ match name {
     "llvm.hexagon.V6.vdealvdd.128B" => "__builtin_HEXAGON_V6_vdealvdd_128B",
     "llvm.hexagon.V6.vdelta" => "__builtin_HEXAGON_V6_vdelta",
     "llvm.hexagon.V6.vdelta.128B" => "__builtin_HEXAGON_V6_vdelta_128B",
+    "llvm.hexagon.V6.vdmpy.sf.hf" => "__builtin_HEXAGON_V6_vdmpy_sf_hf",
+    "llvm.hexagon.V6.vdmpy.sf.hf.128B" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_128B",
+    "llvm.hexagon.V6.vdmpy.sf.hf.acc" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_acc",
+    "llvm.hexagon.V6.vdmpy.sf.hf.acc.128B" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_acc_128B",
     "llvm.hexagon.V6.vdmpybus" => "__builtin_HEXAGON_V6_vdmpybus",
     "llvm.hexagon.V6.vdmpybus.128B" => "__builtin_HEXAGON_V6_vdmpybus_128B",
     "llvm.hexagon.V6.vdmpybus.acc" => "__builtin_HEXAGON_V6_vdmpybus_acc",
@@ -1296,12 +1558,126 @@ match name {
     "llvm.hexagon.V6.vdsaduh.128B" => "__builtin_HEXAGON_V6_vdsaduh_128B",
     "llvm.hexagon.V6.vdsaduh.acc" => "__builtin_HEXAGON_V6_vdsaduh_acc",
     "llvm.hexagon.V6.vdsaduh.acc.128B" => "__builtin_HEXAGON_V6_vdsaduh_acc_128B",
+    "llvm.hexagon.V6.veqb" => "__builtin_HEXAGON_V6_veqb",
+    "llvm.hexagon.V6.veqb.128B" => "__builtin_HEXAGON_V6_veqb_128B",
+    "llvm.hexagon.V6.veqb.and" => "__builtin_HEXAGON_V6_veqb_and",
+    "llvm.hexagon.V6.veqb.and.128B" => "__builtin_HEXAGON_V6_veqb_and_128B",
+    "llvm.hexagon.V6.veqb.or" => "__builtin_HEXAGON_V6_veqb_or",
+    "llvm.hexagon.V6.veqb.or.128B" => "__builtin_HEXAGON_V6_veqb_or_128B",
+    "llvm.hexagon.V6.veqb.xor" => "__builtin_HEXAGON_V6_veqb_xor",
+    "llvm.hexagon.V6.veqb.xor.128B" => "__builtin_HEXAGON_V6_veqb_xor_128B",
+    "llvm.hexagon.V6.veqh" => "__builtin_HEXAGON_V6_veqh",
+    "llvm.hexagon.V6.veqh.128B" => "__builtin_HEXAGON_V6_veqh_128B",
+    "llvm.hexagon.V6.veqh.and" => "__builtin_HEXAGON_V6_veqh_and",
+    "llvm.hexagon.V6.veqh.and.128B" => "__builtin_HEXAGON_V6_veqh_and_128B",
+    "llvm.hexagon.V6.veqh.or" => "__builtin_HEXAGON_V6_veqh_or",
+    "llvm.hexagon.V6.veqh.or.128B" => "__builtin_HEXAGON_V6_veqh_or_128B",
+    "llvm.hexagon.V6.veqh.xor" => "__builtin_HEXAGON_V6_veqh_xor",
+    "llvm.hexagon.V6.veqh.xor.128B" => "__builtin_HEXAGON_V6_veqh_xor_128B",
+    "llvm.hexagon.V6.veqw" => "__builtin_HEXAGON_V6_veqw",
+    "llvm.hexagon.V6.veqw.128B" => "__builtin_HEXAGON_V6_veqw_128B",
+    "llvm.hexagon.V6.veqw.and" => "__builtin_HEXAGON_V6_veqw_and",
+    "llvm.hexagon.V6.veqw.and.128B" => "__builtin_HEXAGON_V6_veqw_and_128B",
+    "llvm.hexagon.V6.veqw.or" => "__builtin_HEXAGON_V6_veqw_or",
+    "llvm.hexagon.V6.veqw.or.128B" => "__builtin_HEXAGON_V6_veqw_or_128B",
+    "llvm.hexagon.V6.veqw.xor" => "__builtin_HEXAGON_V6_veqw_xor",
+    "llvm.hexagon.V6.veqw.xor.128B" => "__builtin_HEXAGON_V6_veqw_xor_128B",
+    "llvm.hexagon.V6.vfmax.hf" => "__builtin_HEXAGON_V6_vfmax_hf",
+    "llvm.hexagon.V6.vfmax.hf.128B" => "__builtin_HEXAGON_V6_vfmax_hf_128B",
+    "llvm.hexagon.V6.vfmax.sf" => "__builtin_HEXAGON_V6_vfmax_sf",
+    "llvm.hexagon.V6.vfmax.sf.128B" => "__builtin_HEXAGON_V6_vfmax_sf_128B",
+    "llvm.hexagon.V6.vfmin.hf" => "__builtin_HEXAGON_V6_vfmin_hf",
+    "llvm.hexagon.V6.vfmin.hf.128B" => "__builtin_HEXAGON_V6_vfmin_hf_128B",
+    "llvm.hexagon.V6.vfmin.sf" => "__builtin_HEXAGON_V6_vfmin_sf",
+    "llvm.hexagon.V6.vfmin.sf.128B" => "__builtin_HEXAGON_V6_vfmin_sf_128B",
+    "llvm.hexagon.V6.vfneg.hf" => "__builtin_HEXAGON_V6_vfneg_hf",
+    "llvm.hexagon.V6.vfneg.hf.128B" => "__builtin_HEXAGON_V6_vfneg_hf_128B",
+    "llvm.hexagon.V6.vfneg.sf" => "__builtin_HEXAGON_V6_vfneg_sf",
+    "llvm.hexagon.V6.vfneg.sf.128B" => "__builtin_HEXAGON_V6_vfneg_sf_128B",
+    "llvm.hexagon.V6.vgathermh" => "__builtin_HEXAGON_V6_vgathermh",
+    "llvm.hexagon.V6.vgathermh.128B" => "__builtin_HEXAGON_V6_vgathermh_128B",
+    "llvm.hexagon.V6.vgathermhq" => "__builtin_HEXAGON_V6_vgathermhq",
+    "llvm.hexagon.V6.vgathermhq.128B" => "__builtin_HEXAGON_V6_vgathermhq_128B",
+    "llvm.hexagon.V6.vgathermhw" => "__builtin_HEXAGON_V6_vgathermhw",
+    "llvm.hexagon.V6.vgathermhw.128B" => "__builtin_HEXAGON_V6_vgathermhw_128B",
+    "llvm.hexagon.V6.vgathermhwq" => "__builtin_HEXAGON_V6_vgathermhwq",
+    "llvm.hexagon.V6.vgathermhwq.128B" => "__builtin_HEXAGON_V6_vgathermhwq_128B",
+    "llvm.hexagon.V6.vgathermw" => "__builtin_HEXAGON_V6_vgathermw",
+    "llvm.hexagon.V6.vgathermw.128B" => "__builtin_HEXAGON_V6_vgathermw_128B",
+    "llvm.hexagon.V6.vgathermwq" => "__builtin_HEXAGON_V6_vgathermwq",
+    "llvm.hexagon.V6.vgathermwq.128B" => "__builtin_HEXAGON_V6_vgathermwq_128B",
+    "llvm.hexagon.V6.vgtb" => "__builtin_HEXAGON_V6_vgtb",
+    "llvm.hexagon.V6.vgtb.128B" => "__builtin_HEXAGON_V6_vgtb_128B",
+    "llvm.hexagon.V6.vgtb.and" => "__builtin_HEXAGON_V6_vgtb_and",
+    "llvm.hexagon.V6.vgtb.and.128B" => "__builtin_HEXAGON_V6_vgtb_and_128B",
+    "llvm.hexagon.V6.vgtb.or" => "__builtin_HEXAGON_V6_vgtb_or",
+    "llvm.hexagon.V6.vgtb.or.128B" => "__builtin_HEXAGON_V6_vgtb_or_128B",
+    "llvm.hexagon.V6.vgtb.xor" => "__builtin_HEXAGON_V6_vgtb_xor",
+    "llvm.hexagon.V6.vgtb.xor.128B" => "__builtin_HEXAGON_V6_vgtb_xor_128B",
+    "llvm.hexagon.V6.vgth" => "__builtin_HEXAGON_V6_vgth",
+    "llvm.hexagon.V6.vgth.128B" => "__builtin_HEXAGON_V6_vgth_128B",
+    "llvm.hexagon.V6.vgth.and" => "__builtin_HEXAGON_V6_vgth_and",
+    "llvm.hexagon.V6.vgth.and.128B" => "__builtin_HEXAGON_V6_vgth_and_128B",
+    "llvm.hexagon.V6.vgth.or" => "__builtin_HEXAGON_V6_vgth_or",
+    "llvm.hexagon.V6.vgth.or.128B" => "__builtin_HEXAGON_V6_vgth_or_128B",
+    "llvm.hexagon.V6.vgth.xor" => "__builtin_HEXAGON_V6_vgth_xor",
+    "llvm.hexagon.V6.vgth.xor.128B" => "__builtin_HEXAGON_V6_vgth_xor_128B",
+    "llvm.hexagon.V6.vgthf" => "__builtin_HEXAGON_V6_vgthf",
+    "llvm.hexagon.V6.vgthf.128B" => "__builtin_HEXAGON_V6_vgthf_128B",
+    "llvm.hexagon.V6.vgthf.and" => "__builtin_HEXAGON_V6_vgthf_and",
+    "llvm.hexagon.V6.vgthf.and.128B" => "__builtin_HEXAGON_V6_vgthf_and_128B",
+    "llvm.hexagon.V6.vgthf.or" => "__builtin_HEXAGON_V6_vgthf_or",
+    "llvm.hexagon.V6.vgthf.or.128B" => "__builtin_HEXAGON_V6_vgthf_or_128B",
+    "llvm.hexagon.V6.vgthf.xor" => "__builtin_HEXAGON_V6_vgthf_xor",
+    "llvm.hexagon.V6.vgthf.xor.128B" => "__builtin_HEXAGON_V6_vgthf_xor_128B",
+    "llvm.hexagon.V6.vgtsf" => "__builtin_HEXAGON_V6_vgtsf",
+    "llvm.hexagon.V6.vgtsf.128B" => "__builtin_HEXAGON_V6_vgtsf_128B",
+    "llvm.hexagon.V6.vgtsf.and" => "__builtin_HEXAGON_V6_vgtsf_and",
+    "llvm.hexagon.V6.vgtsf.and.128B" => "__builtin_HEXAGON_V6_vgtsf_and_128B",
+    "llvm.hexagon.V6.vgtsf.or" => "__builtin_HEXAGON_V6_vgtsf_or",
+    "llvm.hexagon.V6.vgtsf.or.128B" => "__builtin_HEXAGON_V6_vgtsf_or_128B",
+    "llvm.hexagon.V6.vgtsf.xor" => "__builtin_HEXAGON_V6_vgtsf_xor",
+    "llvm.hexagon.V6.vgtsf.xor.128B" => "__builtin_HEXAGON_V6_vgtsf_xor_128B",
+    "llvm.hexagon.V6.vgtub" => "__builtin_HEXAGON_V6_vgtub",
+    "llvm.hexagon.V6.vgtub.128B" => "__builtin_HEXAGON_V6_vgtub_128B",
+    "llvm.hexagon.V6.vgtub.and" => "__builtin_HEXAGON_V6_vgtub_and",
+    "llvm.hexagon.V6.vgtub.and.128B" => "__builtin_HEXAGON_V6_vgtub_and_128B",
+    "llvm.hexagon.V6.vgtub.or" => "__builtin_HEXAGON_V6_vgtub_or",
+    "llvm.hexagon.V6.vgtub.or.128B" => "__builtin_HEXAGON_V6_vgtub_or_128B",
+    "llvm.hexagon.V6.vgtub.xor" => "__builtin_HEXAGON_V6_vgtub_xor",
+    "llvm.hexagon.V6.vgtub.xor.128B" => "__builtin_HEXAGON_V6_vgtub_xor_128B",
+    "llvm.hexagon.V6.vgtuh" => "__builtin_HEXAGON_V6_vgtuh",
+    "llvm.hexagon.V6.vgtuh.128B" => "__builtin_HEXAGON_V6_vgtuh_128B",
+    "llvm.hexagon.V6.vgtuh.and" => "__builtin_HEXAGON_V6_vgtuh_and",
+    "llvm.hexagon.V6.vgtuh.and.128B" => "__builtin_HEXAGON_V6_vgtuh_and_128B",
+    "llvm.hexagon.V6.vgtuh.or" => "__builtin_HEXAGON_V6_vgtuh_or",
+    "llvm.hexagon.V6.vgtuh.or.128B" => "__builtin_HEXAGON_V6_vgtuh_or_128B",
+    "llvm.hexagon.V6.vgtuh.xor" => "__builtin_HEXAGON_V6_vgtuh_xor",
+    "llvm.hexagon.V6.vgtuh.xor.128B" => "__builtin_HEXAGON_V6_vgtuh_xor_128B",
+    "llvm.hexagon.V6.vgtuw" => "__builtin_HEXAGON_V6_vgtuw",
+    "llvm.hexagon.V6.vgtuw.128B" => "__builtin_HEXAGON_V6_vgtuw_128B",
+    "llvm.hexagon.V6.vgtuw.and" => "__builtin_HEXAGON_V6_vgtuw_and",
+    "llvm.hexagon.V6.vgtuw.and.128B" => "__builtin_HEXAGON_V6_vgtuw_and_128B",
+    "llvm.hexagon.V6.vgtuw.or" => "__builtin_HEXAGON_V6_vgtuw_or",
+    "llvm.hexagon.V6.vgtuw.or.128B" => "__builtin_HEXAGON_V6_vgtuw_or_128B",
+    "llvm.hexagon.V6.vgtuw.xor" => "__builtin_HEXAGON_V6_vgtuw_xor",
+    "llvm.hexagon.V6.vgtuw.xor.128B" => "__builtin_HEXAGON_V6_vgtuw_xor_128B",
+    "llvm.hexagon.V6.vgtw" => "__builtin_HEXAGON_V6_vgtw",
+    "llvm.hexagon.V6.vgtw.128B" => "__builtin_HEXAGON_V6_vgtw_128B",
+    "llvm.hexagon.V6.vgtw.and" => "__builtin_HEXAGON_V6_vgtw_and",
+    "llvm.hexagon.V6.vgtw.and.128B" => "__builtin_HEXAGON_V6_vgtw_and_128B",
+    "llvm.hexagon.V6.vgtw.or" => "__builtin_HEXAGON_V6_vgtw_or",
+    "llvm.hexagon.V6.vgtw.or.128B" => "__builtin_HEXAGON_V6_vgtw_or_128B",
+    "llvm.hexagon.V6.vgtw.xor" => "__builtin_HEXAGON_V6_vgtw_xor",
+    "llvm.hexagon.V6.vgtw.xor.128B" => "__builtin_HEXAGON_V6_vgtw_xor_128B",
     "llvm.hexagon.V6.vinsertwr" => "__builtin_HEXAGON_V6_vinsertwr",
     "llvm.hexagon.V6.vinsertwr.128B" => "__builtin_HEXAGON_V6_vinsertwr_128B",
     "llvm.hexagon.V6.vlalignb" => "__builtin_HEXAGON_V6_vlalignb",
     "llvm.hexagon.V6.vlalignb.128B" => "__builtin_HEXAGON_V6_vlalignb_128B",
     "llvm.hexagon.V6.vlalignbi" => "__builtin_HEXAGON_V6_vlalignbi",
     "llvm.hexagon.V6.vlalignbi.128B" => "__builtin_HEXAGON_V6_vlalignbi_128B",
+    "llvm.hexagon.V6.vlsrb" => "__builtin_HEXAGON_V6_vlsrb",
+    "llvm.hexagon.V6.vlsrb.128B" => "__builtin_HEXAGON_V6_vlsrb_128B",
     "llvm.hexagon.V6.vlsrh" => "__builtin_HEXAGON_V6_vlsrh",
     "llvm.hexagon.V6.vlsrh.128B" => "__builtin_HEXAGON_V6_vlsrh_128B",
     "llvm.hexagon.V6.vlsrhv" => "__builtin_HEXAGON_V6_vlsrhv",
@@ -1310,6 +1686,8 @@ match name {
     "llvm.hexagon.V6.vlsrw.128B" => "__builtin_HEXAGON_V6_vlsrw_128B",
     "llvm.hexagon.V6.vlsrwv" => "__builtin_HEXAGON_V6_vlsrwv",
     "llvm.hexagon.V6.vlsrwv.128B" => "__builtin_HEXAGON_V6_vlsrwv_128B",
+    "llvm.hexagon.V6.vlut4" => "__builtin_HEXAGON_V6_vlut4",
+    "llvm.hexagon.V6.vlut4.128B" => "__builtin_HEXAGON_V6_vlut4_128B",
     "llvm.hexagon.V6.vlutb" => "__builtin_HEXAGON_V6_vlutb",
     "llvm.hexagon.V6.vlutb.128B" => "__builtin_HEXAGON_V6_vlutb_128B",
     "llvm.hexagon.V6.vlutb.acc" => "__builtin_HEXAGON_V6_vlutb_acc",
@@ -1320,12 +1698,30 @@ match name {
     "llvm.hexagon.V6.vlutb.dv.acc.128B" => "__builtin_HEXAGON_V6_vlutb_dv_acc_128B",
     "llvm.hexagon.V6.vlutvvb" => "__builtin_HEXAGON_V6_vlutvvb",
     "llvm.hexagon.V6.vlutvvb.128B" => "__builtin_HEXAGON_V6_vlutvvb_128B",
+    "llvm.hexagon.V6.vlutvvb.nm" => "__builtin_HEXAGON_V6_vlutvvb_nm",
+    "llvm.hexagon.V6.vlutvvb.nm.128B" => "__builtin_HEXAGON_V6_vlutvvb_nm_128B",
     "llvm.hexagon.V6.vlutvvb.oracc" => "__builtin_HEXAGON_V6_vlutvvb_oracc",
     "llvm.hexagon.V6.vlutvvb.oracc.128B" => "__builtin_HEXAGON_V6_vlutvvb_oracc_128B",
+    "llvm.hexagon.V6.vlutvvb.oracci" => "__builtin_HEXAGON_V6_vlutvvb_oracci",
+    "llvm.hexagon.V6.vlutvvb.oracci.128B" => "__builtin_HEXAGON_V6_vlutvvb_oracci_128B",
+    "llvm.hexagon.V6.vlutvvbi" => "__builtin_HEXAGON_V6_vlutvvbi",
+    "llvm.hexagon.V6.vlutvvbi.128B" => "__builtin_HEXAGON_V6_vlutvvbi_128B",
     "llvm.hexagon.V6.vlutvwh" => "__builtin_HEXAGON_V6_vlutvwh",
     "llvm.hexagon.V6.vlutvwh.128B" => "__builtin_HEXAGON_V6_vlutvwh_128B",
+    "llvm.hexagon.V6.vlutvwh.nm" => "__builtin_HEXAGON_V6_vlutvwh_nm",
+    "llvm.hexagon.V6.vlutvwh.nm.128B" => "__builtin_HEXAGON_V6_vlutvwh_nm_128B",
     "llvm.hexagon.V6.vlutvwh.oracc" => "__builtin_HEXAGON_V6_vlutvwh_oracc",
     "llvm.hexagon.V6.vlutvwh.oracc.128B" => "__builtin_HEXAGON_V6_vlutvwh_oracc_128B",
+    "llvm.hexagon.V6.vlutvwh.oracci" => "__builtin_HEXAGON_V6_vlutvwh_oracci",
+    "llvm.hexagon.V6.vlutvwh.oracci.128B" => "__builtin_HEXAGON_V6_vlutvwh_oracci_128B",
+    "llvm.hexagon.V6.vlutvwhi" => "__builtin_HEXAGON_V6_vlutvwhi",
+    "llvm.hexagon.V6.vlutvwhi.128B" => "__builtin_HEXAGON_V6_vlutvwhi_128B",
+    "llvm.hexagon.V6.vmax.hf" => "__builtin_HEXAGON_V6_vmax_hf",
+    "llvm.hexagon.V6.vmax.hf.128B" => "__builtin_HEXAGON_V6_vmax_hf_128B",
+    "llvm.hexagon.V6.vmax.sf" => "__builtin_HEXAGON_V6_vmax_sf",
+    "llvm.hexagon.V6.vmax.sf.128B" => "__builtin_HEXAGON_V6_vmax_sf_128B",
+    "llvm.hexagon.V6.vmaxb" => "__builtin_HEXAGON_V6_vmaxb",
+    "llvm.hexagon.V6.vmaxb.128B" => "__builtin_HEXAGON_V6_vmaxb_128B",
     "llvm.hexagon.V6.vmaxh" => "__builtin_HEXAGON_V6_vmaxh",
     "llvm.hexagon.V6.vmaxh.128B" => "__builtin_HEXAGON_V6_vmaxh_128B",
     "llvm.hexagon.V6.vmaxub" => "__builtin_HEXAGON_V6_vmaxub",
@@ -1334,6 +1730,12 @@ match name {
     "llvm.hexagon.V6.vmaxuh.128B" => "__builtin_HEXAGON_V6_vmaxuh_128B",
     "llvm.hexagon.V6.vmaxw" => "__builtin_HEXAGON_V6_vmaxw",
     "llvm.hexagon.V6.vmaxw.128B" => "__builtin_HEXAGON_V6_vmaxw_128B",
+    "llvm.hexagon.V6.vmin.hf" => "__builtin_HEXAGON_V6_vmin_hf",
+    "llvm.hexagon.V6.vmin.hf.128B" => "__builtin_HEXAGON_V6_vmin_hf_128B",
+    "llvm.hexagon.V6.vmin.sf" => "__builtin_HEXAGON_V6_vmin_sf",
+    "llvm.hexagon.V6.vmin.sf.128B" => "__builtin_HEXAGON_V6_vmin_sf_128B",
+    "llvm.hexagon.V6.vminb" => "__builtin_HEXAGON_V6_vminb",
+    "llvm.hexagon.V6.vminb.128B" => "__builtin_HEXAGON_V6_vminb_128B",
     "llvm.hexagon.V6.vminh" => "__builtin_HEXAGON_V6_vminh",
     "llvm.hexagon.V6.vminh.128B" => "__builtin_HEXAGON_V6_vminh_128B",
     "llvm.hexagon.V6.vminub" => "__builtin_HEXAGON_V6_vminub",
@@ -1348,12 +1750,52 @@ match name {
     "llvm.hexagon.V6.vmpabus.acc.128B" => "__builtin_HEXAGON_V6_vmpabus_acc_128B",
     "llvm.hexagon.V6.vmpabusv" => "__builtin_HEXAGON_V6_vmpabusv",
     "llvm.hexagon.V6.vmpabusv.128B" => "__builtin_HEXAGON_V6_vmpabusv_128B",
+    "llvm.hexagon.V6.vmpabuu" => "__builtin_HEXAGON_V6_vmpabuu",
+    "llvm.hexagon.V6.vmpabuu.128B" => "__builtin_HEXAGON_V6_vmpabuu_128B",
+    "llvm.hexagon.V6.vmpabuu.acc" => "__builtin_HEXAGON_V6_vmpabuu_acc",
+    "llvm.hexagon.V6.vmpabuu.acc.128B" => "__builtin_HEXAGON_V6_vmpabuu_acc_128B",
     "llvm.hexagon.V6.vmpabuuv" => "__builtin_HEXAGON_V6_vmpabuuv",
     "llvm.hexagon.V6.vmpabuuv.128B" => "__builtin_HEXAGON_V6_vmpabuuv_128B",
     "llvm.hexagon.V6.vmpahb" => "__builtin_HEXAGON_V6_vmpahb",
     "llvm.hexagon.V6.vmpahb.128B" => "__builtin_HEXAGON_V6_vmpahb_128B",
     "llvm.hexagon.V6.vmpahb.acc" => "__builtin_HEXAGON_V6_vmpahb_acc",
     "llvm.hexagon.V6.vmpahb.acc.128B" => "__builtin_HEXAGON_V6_vmpahb_acc_128B",
+    "llvm.hexagon.V6.vmpahhsat" => "__builtin_HEXAGON_V6_vmpahhsat",
+    "llvm.hexagon.V6.vmpahhsat.128B" => "__builtin_HEXAGON_V6_vmpahhsat_128B",
+    "llvm.hexagon.V6.vmpauhb" => "__builtin_HEXAGON_V6_vmpauhb",
+    "llvm.hexagon.V6.vmpauhb.128B" => "__builtin_HEXAGON_V6_vmpauhb_128B",
+    "llvm.hexagon.V6.vmpauhb.acc" => "__builtin_HEXAGON_V6_vmpauhb_acc",
+    "llvm.hexagon.V6.vmpauhb.acc.128B" => "__builtin_HEXAGON_V6_vmpauhb_acc_128B",
+    "llvm.hexagon.V6.vmpauhuhsat" => "__builtin_HEXAGON_V6_vmpauhuhsat",
+    "llvm.hexagon.V6.vmpauhuhsat.128B" => "__builtin_HEXAGON_V6_vmpauhuhsat_128B",
+    "llvm.hexagon.V6.vmpsuhuhsat" => "__builtin_HEXAGON_V6_vmpsuhuhsat",
+    "llvm.hexagon.V6.vmpsuhuhsat.128B" => "__builtin_HEXAGON_V6_vmpsuhuhsat_128B",
+    "llvm.hexagon.V6.vmpy.hf.hf" => "__builtin_HEXAGON_V6_vmpy_hf_hf",
+    "llvm.hexagon.V6.vmpy.hf.hf.128B" => "__builtin_HEXAGON_V6_vmpy_hf_hf_128B",
+    "llvm.hexagon.V6.vmpy.hf.hf.acc" => "__builtin_HEXAGON_V6_vmpy_hf_hf_acc",
+    "llvm.hexagon.V6.vmpy.hf.hf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_hf_hf_acc_128B",
+    "llvm.hexagon.V6.vmpy.qf16" => "__builtin_HEXAGON_V6_vmpy_qf16",
+    "llvm.hexagon.V6.vmpy.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_128B",
+    "llvm.hexagon.V6.vmpy.qf16.hf" => "__builtin_HEXAGON_V6_vmpy_qf16_hf",
+    "llvm.hexagon.V6.vmpy.qf16.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_hf_128B",
+    "llvm.hexagon.V6.vmpy.qf16.mix.hf" => "__builtin_HEXAGON_V6_vmpy_qf16_mix_hf",
+    "llvm.hexagon.V6.vmpy.qf16.mix.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_mix_hf_128B",
+    "llvm.hexagon.V6.vmpy.qf32" => "__builtin_HEXAGON_V6_vmpy_qf32",
+    "llvm.hexagon.V6.vmpy.qf32.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_128B",
+    "llvm.hexagon.V6.vmpy.qf32.hf" => "__builtin_HEXAGON_V6_vmpy_qf32_hf",
+    "llvm.hexagon.V6.vmpy.qf32.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_hf_128B",
+    "llvm.hexagon.V6.vmpy.qf32.mix.hf" => "__builtin_HEXAGON_V6_vmpy_qf32_mix_hf",
+    "llvm.hexagon.V6.vmpy.qf32.mix.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_mix_hf_128B",
+    "llvm.hexagon.V6.vmpy.qf32.qf16" => "__builtin_HEXAGON_V6_vmpy_qf32_qf16",
+    "llvm.hexagon.V6.vmpy.qf32.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_qf16_128B",
+    "llvm.hexagon.V6.vmpy.qf32.sf" => "__builtin_HEXAGON_V6_vmpy_qf32_sf",
+    "llvm.hexagon.V6.vmpy.qf32.sf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_sf_128B",
+    "llvm.hexagon.V6.vmpy.sf.hf" => "__builtin_HEXAGON_V6_vmpy_sf_hf",
+    "llvm.hexagon.V6.vmpy.sf.hf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_hf_128B",
+    "llvm.hexagon.V6.vmpy.sf.hf.acc" => "__builtin_HEXAGON_V6_vmpy_sf_hf_acc",
+    "llvm.hexagon.V6.vmpy.sf.hf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_sf_hf_acc_128B",
+    "llvm.hexagon.V6.vmpy.sf.sf" => "__builtin_HEXAGON_V6_vmpy_sf_sf",
+    "llvm.hexagon.V6.vmpy.sf.sf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_sf_128B",
     "llvm.hexagon.V6.vmpybus" => "__builtin_HEXAGON_V6_vmpybus",
     "llvm.hexagon.V6.vmpybus.128B" => "__builtin_HEXAGON_V6_vmpybus_128B",
     "llvm.hexagon.V6.vmpybus.acc" => "__builtin_HEXAGON_V6_vmpybus_acc",
@@ -1368,8 +1810,12 @@ match name {
     "llvm.hexagon.V6.vmpybv.acc.128B" => "__builtin_HEXAGON_V6_vmpybv_acc_128B",
     "llvm.hexagon.V6.vmpyewuh" => "__builtin_HEXAGON_V6_vmpyewuh",
     "llvm.hexagon.V6.vmpyewuh.128B" => "__builtin_HEXAGON_V6_vmpyewuh_128B",
+    "llvm.hexagon.V6.vmpyewuh.64" => "__builtin_HEXAGON_V6_vmpyewuh_64",
+    "llvm.hexagon.V6.vmpyewuh.64.128B" => "__builtin_HEXAGON_V6_vmpyewuh_64_128B",
     "llvm.hexagon.V6.vmpyh" => "__builtin_HEXAGON_V6_vmpyh",
     "llvm.hexagon.V6.vmpyh.128B" => "__builtin_HEXAGON_V6_vmpyh_128B",
+    "llvm.hexagon.V6.vmpyh.acc" => "__builtin_HEXAGON_V6_vmpyh_acc",
+    "llvm.hexagon.V6.vmpyh.acc.128B" => "__builtin_HEXAGON_V6_vmpyh_acc_128B",
     "llvm.hexagon.V6.vmpyhsat.acc" => "__builtin_HEXAGON_V6_vmpyhsat_acc",
     "llvm.hexagon.V6.vmpyhsat.acc.128B" => "__builtin_HEXAGON_V6_vmpyhsat_acc_128B",
     "llvm.hexagon.V6.vmpyhsrs" => "__builtin_HEXAGON_V6_vmpyhsrs",
@@ -1412,8 +1858,14 @@ match name {
     "llvm.hexagon.V6.vmpyiwh.128B" => "__builtin_HEXAGON_V6_vmpyiwh_128B",
     "llvm.hexagon.V6.vmpyiwh.acc" => "__builtin_HEXAGON_V6_vmpyiwh_acc",
     "llvm.hexagon.V6.vmpyiwh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwh_acc_128B",
+    "llvm.hexagon.V6.vmpyiwub" => "__builtin_HEXAGON_V6_vmpyiwub",
+    "llvm.hexagon.V6.vmpyiwub.128B" => "__builtin_HEXAGON_V6_vmpyiwub_128B",
+    "llvm.hexagon.V6.vmpyiwub.acc" => "__builtin_HEXAGON_V6_vmpyiwub_acc",
+    "llvm.hexagon.V6.vmpyiwub.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwub_acc_128B",
     "llvm.hexagon.V6.vmpyowh" => "__builtin_HEXAGON_V6_vmpyowh",
     "llvm.hexagon.V6.vmpyowh.128B" => "__builtin_HEXAGON_V6_vmpyowh_128B",
+    "llvm.hexagon.V6.vmpyowh.64.acc" => "__builtin_HEXAGON_V6_vmpyowh_64_acc",
+    "llvm.hexagon.V6.vmpyowh.64.acc.128B" => "__builtin_HEXAGON_V6_vmpyowh_64_acc_128B",
     "llvm.hexagon.V6.vmpyowh.rnd" => "__builtin_HEXAGON_V6_vmpyowh_rnd",
     "llvm.hexagon.V6.vmpyowh.rnd.128B" => "__builtin_HEXAGON_V6_vmpyowh_rnd_128B",
     "llvm.hexagon.V6.vmpyowh.rnd.sacc" => "__builtin_HEXAGON_V6_vmpyowh_rnd_sacc",
@@ -1432,10 +1884,20 @@ match name {
     "llvm.hexagon.V6.vmpyuh.128B" => "__builtin_HEXAGON_V6_vmpyuh_128B",
     "llvm.hexagon.V6.vmpyuh.acc" => "__builtin_HEXAGON_V6_vmpyuh_acc",
     "llvm.hexagon.V6.vmpyuh.acc.128B" => "__builtin_HEXAGON_V6_vmpyuh_acc_128B",
+    "llvm.hexagon.V6.vmpyuhe" => "__builtin_HEXAGON_V6_vmpyuhe",
+    "llvm.hexagon.V6.vmpyuhe.128B" => "__builtin_HEXAGON_V6_vmpyuhe_128B",
+    "llvm.hexagon.V6.vmpyuhe.acc" => "__builtin_HEXAGON_V6_vmpyuhe_acc",
+    "llvm.hexagon.V6.vmpyuhe.acc.128B" => "__builtin_HEXAGON_V6_vmpyuhe_acc_128B",
     "llvm.hexagon.V6.vmpyuhv" => "__builtin_HEXAGON_V6_vmpyuhv",
     "llvm.hexagon.V6.vmpyuhv.128B" => "__builtin_HEXAGON_V6_vmpyuhv_128B",
     "llvm.hexagon.V6.vmpyuhv.acc" => "__builtin_HEXAGON_V6_vmpyuhv_acc",
     "llvm.hexagon.V6.vmpyuhv.acc.128B" => "__builtin_HEXAGON_V6_vmpyuhv_acc_128B",
+    "llvm.hexagon.V6.vmpyuhvs" => "__builtin_HEXAGON_V6_vmpyuhvs",
+    "llvm.hexagon.V6.vmpyuhvs.128B" => "__builtin_HEXAGON_V6_vmpyuhvs_128B",
+    "llvm.hexagon.V6.vmux" => "__builtin_HEXAGON_V6_vmux",
+    "llvm.hexagon.V6.vmux.128B" => "__builtin_HEXAGON_V6_vmux_128B",
+    "llvm.hexagon.V6.vnavgb" => "__builtin_HEXAGON_V6_vnavgb",
+    "llvm.hexagon.V6.vnavgb.128B" => "__builtin_HEXAGON_V6_vnavgb_128B",
     "llvm.hexagon.V6.vnavgh" => "__builtin_HEXAGON_V6_vnavgh",
     "llvm.hexagon.V6.vnavgh.128B" => "__builtin_HEXAGON_V6_vnavgh_128B",
     "llvm.hexagon.V6.vnavgub" => "__builtin_HEXAGON_V6_vnavgub",
@@ -1468,8 +1930,18 @@ match name {
     "llvm.hexagon.V6.vpackwuh.sat.128B" => "__builtin_HEXAGON_V6_vpackwuh_sat_128B",
     "llvm.hexagon.V6.vpopcounth" => "__builtin_HEXAGON_V6_vpopcounth",
     "llvm.hexagon.V6.vpopcounth.128B" => "__builtin_HEXAGON_V6_vpopcounth_128B",
+    "llvm.hexagon.V6.vprefixqb" => "__builtin_HEXAGON_V6_vprefixqb",
+    "llvm.hexagon.V6.vprefixqb.128B" => "__builtin_HEXAGON_V6_vprefixqb_128B",
+    "llvm.hexagon.V6.vprefixqh" => "__builtin_HEXAGON_V6_vprefixqh",
+    "llvm.hexagon.V6.vprefixqh.128B" => "__builtin_HEXAGON_V6_vprefixqh_128B",
+    "llvm.hexagon.V6.vprefixqw" => "__builtin_HEXAGON_V6_vprefixqw",
+    "llvm.hexagon.V6.vprefixqw.128B" => "__builtin_HEXAGON_V6_vprefixqw_128B",
     "llvm.hexagon.V6.vrdelta" => "__builtin_HEXAGON_V6_vrdelta",
     "llvm.hexagon.V6.vrdelta.128B" => "__builtin_HEXAGON_V6_vrdelta_128B",
+    "llvm.hexagon.V6.vrmpybub.rtt" => "__builtin_HEXAGON_V6_vrmpybub_rtt",
+    "llvm.hexagon.V6.vrmpybub.rtt.128B" => "__builtin_HEXAGON_V6_vrmpybub_rtt_128B",
+    "llvm.hexagon.V6.vrmpybub.rtt.acc" => "__builtin_HEXAGON_V6_vrmpybub_rtt_acc",
+    "llvm.hexagon.V6.vrmpybub.rtt.acc.128B" => "__builtin_HEXAGON_V6_vrmpybub_rtt_acc_128B",
     "llvm.hexagon.V6.vrmpybus" => "__builtin_HEXAGON_V6_vrmpybus",
     "llvm.hexagon.V6.vrmpybus.128B" => "__builtin_HEXAGON_V6_vrmpybus_128B",
     "llvm.hexagon.V6.vrmpybus.acc" => "__builtin_HEXAGON_V6_vrmpybus_acc",
@@ -1490,6 +1962,10 @@ match name {
     "llvm.hexagon.V6.vrmpyub.128B" => "__builtin_HEXAGON_V6_vrmpyub_128B",
     "llvm.hexagon.V6.vrmpyub.acc" => "__builtin_HEXAGON_V6_vrmpyub_acc",
     "llvm.hexagon.V6.vrmpyub.acc.128B" => "__builtin_HEXAGON_V6_vrmpyub_acc_128B",
+    "llvm.hexagon.V6.vrmpyub.rtt" => "__builtin_HEXAGON_V6_vrmpyub_rtt",
+    "llvm.hexagon.V6.vrmpyub.rtt.128B" => "__builtin_HEXAGON_V6_vrmpyub_rtt_128B",
+    "llvm.hexagon.V6.vrmpyub.rtt.acc" => "__builtin_HEXAGON_V6_vrmpyub_rtt_acc",
+    "llvm.hexagon.V6.vrmpyub.rtt.acc.128B" => "__builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B",
     "llvm.hexagon.V6.vrmpyubi" => "__builtin_HEXAGON_V6_vrmpyubi",
     "llvm.hexagon.V6.vrmpyubi.128B" => "__builtin_HEXAGON_V6_vrmpyubi_128B",
     "llvm.hexagon.V6.vrmpyubi.acc" => "__builtin_HEXAGON_V6_vrmpyubi_acc",
@@ -1500,10 +1976,16 @@ match name {
     "llvm.hexagon.V6.vrmpyubv.acc.128B" => "__builtin_HEXAGON_V6_vrmpyubv_acc_128B",
     "llvm.hexagon.V6.vror" => "__builtin_HEXAGON_V6_vror",
     "llvm.hexagon.V6.vror.128B" => "__builtin_HEXAGON_V6_vror_128B",
+    "llvm.hexagon.V6.vrotr" => "__builtin_HEXAGON_V6_vrotr",
+    "llvm.hexagon.V6.vrotr.128B" => "__builtin_HEXAGON_V6_vrotr_128B",
     "llvm.hexagon.V6.vroundhb" => "__builtin_HEXAGON_V6_vroundhb",
     "llvm.hexagon.V6.vroundhb.128B" => "__builtin_HEXAGON_V6_vroundhb_128B",
     "llvm.hexagon.V6.vroundhub" => "__builtin_HEXAGON_V6_vroundhub",
     "llvm.hexagon.V6.vroundhub.128B" => "__builtin_HEXAGON_V6_vroundhub_128B",
+    "llvm.hexagon.V6.vrounduhub" => "__builtin_HEXAGON_V6_vrounduhub",
+    "llvm.hexagon.V6.vrounduhub.128B" => "__builtin_HEXAGON_V6_vrounduhub_128B",
+    "llvm.hexagon.V6.vrounduwuh" => "__builtin_HEXAGON_V6_vrounduwuh",
+    "llvm.hexagon.V6.vrounduwuh.128B" => "__builtin_HEXAGON_V6_vrounduwuh_128B",
     "llvm.hexagon.V6.vroundwh" => "__builtin_HEXAGON_V6_vroundwh",
     "llvm.hexagon.V6.vroundwh.128B" => "__builtin_HEXAGON_V6_vroundwh_128B",
     "llvm.hexagon.V6.vroundwuh" => "__builtin_HEXAGON_V6_vroundwuh",
@@ -1512,12 +1994,34 @@ match name {
     "llvm.hexagon.V6.vrsadubi.128B" => "__builtin_HEXAGON_V6_vrsadubi_128B",
     "llvm.hexagon.V6.vrsadubi.acc" => "__builtin_HEXAGON_V6_vrsadubi_acc",
     "llvm.hexagon.V6.vrsadubi.acc.128B" => "__builtin_HEXAGON_V6_vrsadubi_acc_128B",
+    "llvm.hexagon.V6.vsatdw" => "__builtin_HEXAGON_V6_vsatdw",
+    "llvm.hexagon.V6.vsatdw.128B" => "__builtin_HEXAGON_V6_vsatdw_128B",
     "llvm.hexagon.V6.vsathub" => "__builtin_HEXAGON_V6_vsathub",
     "llvm.hexagon.V6.vsathub.128B" => "__builtin_HEXAGON_V6_vsathub_128B",
+    "llvm.hexagon.V6.vsatuwuh" => "__builtin_HEXAGON_V6_vsatuwuh",
+    "llvm.hexagon.V6.vsatuwuh.128B" => "__builtin_HEXAGON_V6_vsatuwuh_128B",
     "llvm.hexagon.V6.vsatwh" => "__builtin_HEXAGON_V6_vsatwh",
     "llvm.hexagon.V6.vsatwh.128B" => "__builtin_HEXAGON_V6_vsatwh_128B",
     "llvm.hexagon.V6.vsb" => "__builtin_HEXAGON_V6_vsb",
     "llvm.hexagon.V6.vsb.128B" => "__builtin_HEXAGON_V6_vsb_128B",
+    "llvm.hexagon.V6.vscattermh" => "__builtin_HEXAGON_V6_vscattermh",
+    "llvm.hexagon.V6.vscattermh.128B" => "__builtin_HEXAGON_V6_vscattermh_128B",
+    "llvm.hexagon.V6.vscattermh.add" => "__builtin_HEXAGON_V6_vscattermh_add",
+    "llvm.hexagon.V6.vscattermh.add.128B" => "__builtin_HEXAGON_V6_vscattermh_add_128B",
+    "llvm.hexagon.V6.vscattermhq" => "__builtin_HEXAGON_V6_vscattermhq",
+    "llvm.hexagon.V6.vscattermhq.128B" => "__builtin_HEXAGON_V6_vscattermhq_128B",
+    "llvm.hexagon.V6.vscattermhw" => "__builtin_HEXAGON_V6_vscattermhw",
+    "llvm.hexagon.V6.vscattermhw.128B" => "__builtin_HEXAGON_V6_vscattermhw_128B",
+    "llvm.hexagon.V6.vscattermhw.add" => "__builtin_HEXAGON_V6_vscattermhw_add",
+    "llvm.hexagon.V6.vscattermhw.add.128B" => "__builtin_HEXAGON_V6_vscattermhw_add_128B",
+    "llvm.hexagon.V6.vscattermhwq" => "__builtin_HEXAGON_V6_vscattermhwq",
+    "llvm.hexagon.V6.vscattermhwq.128B" => "__builtin_HEXAGON_V6_vscattermhwq_128B",
+    "llvm.hexagon.V6.vscattermw" => "__builtin_HEXAGON_V6_vscattermw",
+    "llvm.hexagon.V6.vscattermw.128B" => "__builtin_HEXAGON_V6_vscattermw_128B",
+    "llvm.hexagon.V6.vscattermw.add" => "__builtin_HEXAGON_V6_vscattermw_add",
+    "llvm.hexagon.V6.vscattermw.add.128B" => "__builtin_HEXAGON_V6_vscattermw_add_128B",
+    "llvm.hexagon.V6.vscattermwq" => "__builtin_HEXAGON_V6_vscattermwq",
+    "llvm.hexagon.V6.vscattermwq.128B" => "__builtin_HEXAGON_V6_vscattermwq_128B",
     "llvm.hexagon.V6.vsh" => "__builtin_HEXAGON_V6_vsh",
     "llvm.hexagon.V6.vsh.128B" => "__builtin_HEXAGON_V6_vsh_128B",
     "llvm.hexagon.V6.vshufeh" => "__builtin_HEXAGON_V6_vshufeh",
@@ -1538,14 +2042,44 @@ match name {
     "llvm.hexagon.V6.vshufoeh.128B" => "__builtin_HEXAGON_V6_vshufoeh_128B",
     "llvm.hexagon.V6.vshufoh" => "__builtin_HEXAGON_V6_vshufoh",
     "llvm.hexagon.V6.vshufoh.128B" => "__builtin_HEXAGON_V6_vshufoh_128B",
+    "llvm.hexagon.V6.vsub.hf" => "__builtin_HEXAGON_V6_vsub_hf",
+    "llvm.hexagon.V6.vsub.hf.128B" => "__builtin_HEXAGON_V6_vsub_hf_128B",
+    "llvm.hexagon.V6.vsub.hf.hf" => "__builtin_HEXAGON_V6_vsub_hf_hf",
+    "llvm.hexagon.V6.vsub.hf.hf.128B" => "__builtin_HEXAGON_V6_vsub_hf_hf_128B",
+    "llvm.hexagon.V6.vsub.qf16" => "__builtin_HEXAGON_V6_vsub_qf16",
+    "llvm.hexagon.V6.vsub.qf16.128B" => "__builtin_HEXAGON_V6_vsub_qf16_128B",
+    "llvm.hexagon.V6.vsub.qf16.mix" => "__builtin_HEXAGON_V6_vsub_qf16_mix",
+    "llvm.hexagon.V6.vsub.qf16.mix.128B" => "__builtin_HEXAGON_V6_vsub_qf16_mix_128B",
+    "llvm.hexagon.V6.vsub.qf32" => "__builtin_HEXAGON_V6_vsub_qf32",
+    "llvm.hexagon.V6.vsub.qf32.128B" => "__builtin_HEXAGON_V6_vsub_qf32_128B",
+    "llvm.hexagon.V6.vsub.qf32.mix" => "__builtin_HEXAGON_V6_vsub_qf32_mix",
+    "llvm.hexagon.V6.vsub.qf32.mix.128B" => "__builtin_HEXAGON_V6_vsub_qf32_mix_128B",
+    "llvm.hexagon.V6.vsub.sf" => "__builtin_HEXAGON_V6_vsub_sf",
+    "llvm.hexagon.V6.vsub.sf.128B" => "__builtin_HEXAGON_V6_vsub_sf_128B",
+    "llvm.hexagon.V6.vsub.sf.hf" => "__builtin_HEXAGON_V6_vsub_sf_hf",
+    "llvm.hexagon.V6.vsub.sf.hf.128B" => "__builtin_HEXAGON_V6_vsub_sf_hf_128B",
+    "llvm.hexagon.V6.vsub.sf.sf" => "__builtin_HEXAGON_V6_vsub_sf_sf",
+    "llvm.hexagon.V6.vsub.sf.sf.128B" => "__builtin_HEXAGON_V6_vsub_sf_sf_128B",
     "llvm.hexagon.V6.vsubb" => "__builtin_HEXAGON_V6_vsubb",
     "llvm.hexagon.V6.vsubb.128B" => "__builtin_HEXAGON_V6_vsubb_128B",
     "llvm.hexagon.V6.vsubb.dv" => "__builtin_HEXAGON_V6_vsubb_dv",
     "llvm.hexagon.V6.vsubb.dv.128B" => "__builtin_HEXAGON_V6_vsubb_dv_128B",
+    "llvm.hexagon.V6.vsubbnq" => "__builtin_HEXAGON_V6_vsubbnq",
+    "llvm.hexagon.V6.vsubbnq.128B" => "__builtin_HEXAGON_V6_vsubbnq_128B",
+    "llvm.hexagon.V6.vsubbq" => "__builtin_HEXAGON_V6_vsubbq",
+    "llvm.hexagon.V6.vsubbq.128B" => "__builtin_HEXAGON_V6_vsubbq_128B",
+    "llvm.hexagon.V6.vsubbsat" => "__builtin_HEXAGON_V6_vsubbsat",
+    "llvm.hexagon.V6.vsubbsat.128B" => "__builtin_HEXAGON_V6_vsubbsat_128B",
+    "llvm.hexagon.V6.vsubbsat.dv" => "__builtin_HEXAGON_V6_vsubbsat_dv",
+    "llvm.hexagon.V6.vsubbsat.dv.128B" => "__builtin_HEXAGON_V6_vsubbsat_dv_128B",
     "llvm.hexagon.V6.vsubh" => "__builtin_HEXAGON_V6_vsubh",
     "llvm.hexagon.V6.vsubh.128B" => "__builtin_HEXAGON_V6_vsubh_128B",
     "llvm.hexagon.V6.vsubh.dv" => "__builtin_HEXAGON_V6_vsubh_dv",
     "llvm.hexagon.V6.vsubh.dv.128B" => "__builtin_HEXAGON_V6_vsubh_dv_128B",
+    "llvm.hexagon.V6.vsubhnq" => "__builtin_HEXAGON_V6_vsubhnq",
+    "llvm.hexagon.V6.vsubhnq.128B" => "__builtin_HEXAGON_V6_vsubhnq_128B",
+    "llvm.hexagon.V6.vsubhq" => "__builtin_HEXAGON_V6_vsubhq",
+    "llvm.hexagon.V6.vsubhq.128B" => "__builtin_HEXAGON_V6_vsubhq_128B",
     "llvm.hexagon.V6.vsubhsat" => "__builtin_HEXAGON_V6_vsubhsat",
     "llvm.hexagon.V6.vsubhsat.128B" => "__builtin_HEXAGON_V6_vsubhsat_128B",
     "llvm.hexagon.V6.vsubhsat.dv" => "__builtin_HEXAGON_V6_vsubhsat_dv",
@@ -1558,20 +2092,32 @@ match name {
     "llvm.hexagon.V6.vsububsat.128B" => "__builtin_HEXAGON_V6_vsububsat_128B",
     "llvm.hexagon.V6.vsububsat.dv" => "__builtin_HEXAGON_V6_vsububsat_dv",
     "llvm.hexagon.V6.vsububsat.dv.128B" => "__builtin_HEXAGON_V6_vsububsat_dv_128B",
+    "llvm.hexagon.V6.vsubububb.sat" => "__builtin_HEXAGON_V6_vsubububb_sat",
+    "llvm.hexagon.V6.vsubububb.sat.128B" => "__builtin_HEXAGON_V6_vsubububb_sat_128B",
     "llvm.hexagon.V6.vsubuhsat" => "__builtin_HEXAGON_V6_vsubuhsat",
     "llvm.hexagon.V6.vsubuhsat.128B" => "__builtin_HEXAGON_V6_vsubuhsat_128B",
     "llvm.hexagon.V6.vsubuhsat.dv" => "__builtin_HEXAGON_V6_vsubuhsat_dv",
     "llvm.hexagon.V6.vsubuhsat.dv.128B" => "__builtin_HEXAGON_V6_vsubuhsat_dv_128B",
     "llvm.hexagon.V6.vsubuhw" => "__builtin_HEXAGON_V6_vsubuhw",
     "llvm.hexagon.V6.vsubuhw.128B" => "__builtin_HEXAGON_V6_vsubuhw_128B",
+    "llvm.hexagon.V6.vsubuwsat" => "__builtin_HEXAGON_V6_vsubuwsat",
+    "llvm.hexagon.V6.vsubuwsat.128B" => "__builtin_HEXAGON_V6_vsubuwsat_128B",
+    "llvm.hexagon.V6.vsubuwsat.dv" => "__builtin_HEXAGON_V6_vsubuwsat_dv",
+    "llvm.hexagon.V6.vsubuwsat.dv.128B" => "__builtin_HEXAGON_V6_vsubuwsat_dv_128B",
     "llvm.hexagon.V6.vsubw" => "__builtin_HEXAGON_V6_vsubw",
     "llvm.hexagon.V6.vsubw.128B" => "__builtin_HEXAGON_V6_vsubw_128B",
     "llvm.hexagon.V6.vsubw.dv" => "__builtin_HEXAGON_V6_vsubw_dv",
     "llvm.hexagon.V6.vsubw.dv.128B" => "__builtin_HEXAGON_V6_vsubw_dv_128B",
+    "llvm.hexagon.V6.vsubwnq" => "__builtin_HEXAGON_V6_vsubwnq",
+    "llvm.hexagon.V6.vsubwnq.128B" => "__builtin_HEXAGON_V6_vsubwnq_128B",
+    "llvm.hexagon.V6.vsubwq" => "__builtin_HEXAGON_V6_vsubwq",
+    "llvm.hexagon.V6.vsubwq.128B" => "__builtin_HEXAGON_V6_vsubwq_128B",
     "llvm.hexagon.V6.vsubwsat" => "__builtin_HEXAGON_V6_vsubwsat",
     "llvm.hexagon.V6.vsubwsat.128B" => "__builtin_HEXAGON_V6_vsubwsat_128B",
     "llvm.hexagon.V6.vsubwsat.dv" => "__builtin_HEXAGON_V6_vsubwsat_dv",
     "llvm.hexagon.V6.vsubwsat.dv.128B" => "__builtin_HEXAGON_V6_vsubwsat_dv_128B",
+    "llvm.hexagon.V6.vswap" => "__builtin_HEXAGON_V6_vswap",
+    "llvm.hexagon.V6.vswap.128B" => "__builtin_HEXAGON_V6_vswap_128B",
     "llvm.hexagon.V6.vtmpyb" => "__builtin_HEXAGON_V6_vtmpyb",
     "llvm.hexagon.V6.vtmpyb.128B" => "__builtin_HEXAGON_V6_vtmpyb_128B",
     "llvm.hexagon.V6.vtmpyb.acc" => "__builtin_HEXAGON_V6_vtmpyb_acc",
@@ -1602,6 +2148,19 @@ match name {
     "llvm.hexagon.V6.vzb.128B" => "__builtin_HEXAGON_V6_vzb_128B",
     "llvm.hexagon.V6.vzh" => "__builtin_HEXAGON_V6_vzh",
     "llvm.hexagon.V6.vzh.128B" => "__builtin_HEXAGON_V6_vzh_128B",
+    "llvm.hexagon.Y2.dccleana" => "__builtin_HEXAGON_Y2_dccleana",
+    "llvm.hexagon.Y2.dccleaninva" => "__builtin_HEXAGON_Y2_dccleaninva",
+    "llvm.hexagon.Y2.dcfetch" => "__builtin_HEXAGON_Y2_dcfetch",
+    "llvm.hexagon.Y2.dcinva" => "__builtin_HEXAGON_Y2_dcinva",
+    "llvm.hexagon.Y2.dczeroa" => "__builtin_HEXAGON_Y2_dczeroa",
+    "llvm.hexagon.Y4.l2fetch" => "__builtin_HEXAGON_Y4_l2fetch",
+    "llvm.hexagon.Y5.l2fetch" => "__builtin_HEXAGON_Y5_l2fetch",
+    "llvm.hexagon.Y6.dmlink" => "__builtin_HEXAGON_Y6_dmlink",
+    "llvm.hexagon.Y6.dmpause" => "__builtin_HEXAGON_Y6_dmpause",
+    "llvm.hexagon.Y6.dmpoll" => "__builtin_HEXAGON_Y6_dmpoll",
+    "llvm.hexagon.Y6.dmresume" => "__builtin_HEXAGON_Y6_dmresume",
+    "llvm.hexagon.Y6.dmstart" => "__builtin_HEXAGON_Y6_dmstart",
+    "llvm.hexagon.Y6.dmwait" => "__builtin_HEXAGON_Y6_dmwait",
     "llvm.hexagon.brev.ldb" => "__builtin_brev_ldb",
     "llvm.hexagon.brev.ldd" => "__builtin_brev_ldd",
     "llvm.hexagon.brev.ldh" => "__builtin_brev_ldh",
@@ -1626,6 +2185,8 @@ match name {
     "llvm.hexagon.circ.stw" => "__builtin_circ_stw",
     "llvm.hexagon.mm256i.vaddw" => "__builtin__mm256i_vaddw",
     "llvm.hexagon.prefetch" => "__builtin_HEXAGON_prefetch",
+    "llvm.hexagon.vmemcpy" => "__builtin_hexagon_vmemcpy",
+    "llvm.hexagon.vmemset" => "__builtin_hexagon_vmemset",
     // mips
     "llvm.mips.absq.s.ph" => "__builtin_mips_absq_s_ph",
     "llvm.mips.absq.s.qb" => "__builtin_mips_absq_s_qb",
@@ -2299,6 +2860,8 @@ match name {
     "llvm.mips.xor.v" => "__builtin_msa_xor_v",
     "llvm.mips.xori.b" => "__builtin_msa_xori_b",
     // nvvm
+    "llvm.nvvm.abs.bf16" => "__nvvm_abs_bf16",
+    "llvm.nvvm.abs.bf16x2" => "__nvvm_abs_bf16x2",
     "llvm.nvvm.abs.i" => "__nvvm_abs_i",
     "llvm.nvvm.abs.ll" => "__nvvm_abs_ll",
     "llvm.nvvm.add.rm.d" => "__nvvm_add_rm_d",
@@ -2314,8 +2877,13 @@ match name {
     "llvm.nvvm.add.rz.f" => "__nvvm_add_rz_f",
     "llvm.nvvm.add.rz.ftz.f" => "__nvvm_add_rz_ftz_f",
     "llvm.nvvm.bar.sync" => "__nvvm_bar_sync",
-    "llvm.nvvm.barrier0" => "__nvvm_bar0",
-    // [DUPLICATE]: "llvm.nvvm.barrier0" => "__syncthreads",
+    "llvm.nvvm.bar.warp.sync" => "__nvvm_bar_warp_sync",
+    "llvm.nvvm.barrier" => "__nvvm_bar",
+    "llvm.nvvm.barrier.n" => "__nvvm_bar_n",
+    "llvm.nvvm.barrier.sync" => "__nvvm_barrier_sync",
+    "llvm.nvvm.barrier.sync.cnt" => "__nvvm_barrier_sync_cnt",
+    "llvm.nvvm.barrier0" => "__syncthreads",
+    // [DUPLICATE]: "llvm.nvvm.barrier0" => "__nvvm_bar0",
     "llvm.nvvm.barrier0.and" => "__nvvm_bar0_and",
     "llvm.nvvm.barrier0.or" => "__nvvm_bar0_or",
     "llvm.nvvm.barrier0.popc" => "__nvvm_bar0_popc",
@@ -2332,6 +2900,17 @@ match name {
     "llvm.nvvm.clz.ll" => "__nvvm_clz_ll",
     "llvm.nvvm.cos.approx.f" => "__nvvm_cos_approx_f",
     "llvm.nvvm.cos.approx.ftz.f" => "__nvvm_cos_approx_ftz_f",
+    "llvm.nvvm.cp.async.ca.shared.global.16" => "__nvvm_cp_async_ca_shared_global_16",
+    "llvm.nvvm.cp.async.ca.shared.global.4" => "__nvvm_cp_async_ca_shared_global_4",
+    "llvm.nvvm.cp.async.ca.shared.global.8" => "__nvvm_cp_async_ca_shared_global_8",
+    "llvm.nvvm.cp.async.cg.shared.global.16" => "__nvvm_cp_async_cg_shared_global_16",
+    "llvm.nvvm.cp.async.commit.group" => "__nvvm_cp_async_commit_group",
+    "llvm.nvvm.cp.async.mbarrier.arrive" => "__nvvm_cp_async_mbarrier_arrive",
+    "llvm.nvvm.cp.async.mbarrier.arrive.noinc" => "__nvvm_cp_async_mbarrier_arrive_noinc",
+    "llvm.nvvm.cp.async.mbarrier.arrive.noinc.shared" => "__nvvm_cp_async_mbarrier_arrive_noinc_shared",
+    "llvm.nvvm.cp.async.mbarrier.arrive.shared" => "__nvvm_cp_async_mbarrier_arrive_shared",
+    "llvm.nvvm.cp.async.wait.all" => "__nvvm_cp_async_wait_all",
+    "llvm.nvvm.cp.async.wait.group" => "__nvvm_cp_async_wait_group",
     "llvm.nvvm.d2f.rm" => "__nvvm_d2f_rm",
     "llvm.nvvm.d2f.rm.ftz" => "__nvvm_d2f_rm_ftz",
     "llvm.nvvm.d2f.rn" => "__nvvm_d2f_rn",
@@ -2374,7 +2953,13 @@ match name {
     "llvm.nvvm.div.rz.ftz.f" => "__nvvm_div_rz_ftz_f",
     "llvm.nvvm.ex2.approx.d" => "__nvvm_ex2_approx_d",
     "llvm.nvvm.ex2.approx.f" => "__nvvm_ex2_approx_f",
+    "llvm.nvvm.ex2.approx.f16" => "__nvvm_ex2_approx_f16",
+    "llvm.nvvm.ex2.approx.f16x2" => "__nvvm_ex2_approx_f16x2",
     "llvm.nvvm.ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f",
+    "llvm.nvvm.f2bf16.rn" => "__nvvm_f2bf16_rn",
+    "llvm.nvvm.f2bf16.rn.relu" => "__nvvm_f2bf16_rn_relu",
+    "llvm.nvvm.f2bf16.rz" => "__nvvm_f2bf16_rz",
+    "llvm.nvvm.f2bf16.rz.relu" => "__nvvm_f2bf16_rz_relu",
     "llvm.nvvm.f2h.rn" => "__nvvm_f2h_rn",
     "llvm.nvvm.f2h.rn.ftz" => "__nvvm_f2h_rn_ftz",
     "llvm.nvvm.f2i.rm" => "__nvvm_f2i_rm",
@@ -2393,6 +2978,7 @@ match name {
     "llvm.nvvm.f2ll.rp.ftz" => "__nvvm_f2ll_rp_ftz",
     "llvm.nvvm.f2ll.rz" => "__nvvm_f2ll_rz",
     "llvm.nvvm.f2ll.rz.ftz" => "__nvvm_f2ll_rz_ftz",
+    "llvm.nvvm.f2tf32.rna" => "__nvvm_f2tf32_rna",
     "llvm.nvvm.f2ui.rm" => "__nvvm_f2ui_rm",
     "llvm.nvvm.f2ui.rm.ftz" => "__nvvm_f2ui_rm_ftz",
     "llvm.nvvm.f2ui.rn" => "__nvvm_f2ui_rn",
@@ -2412,27 +2998,112 @@ match name {
     "llvm.nvvm.fabs.d" => "__nvvm_fabs_d",
     "llvm.nvvm.fabs.f" => "__nvvm_fabs_f",
     "llvm.nvvm.fabs.ftz.f" => "__nvvm_fabs_ftz_f",
+    "llvm.nvvm.ff2bf16x2.rn" => "__nvvm_ff2bf16x2_rn",
+    "llvm.nvvm.ff2bf16x2.rn.relu" => "__nvvm_ff2bf16x2_rn_relu",
+    "llvm.nvvm.ff2bf16x2.rz" => "__nvvm_ff2bf16x2_rz",
+    "llvm.nvvm.ff2bf16x2.rz.relu" => "__nvvm_ff2bf16x2_rz_relu",
+    "llvm.nvvm.ff2f16x2.rn" => "__nvvm_ff2f16x2_rn",
+    "llvm.nvvm.ff2f16x2.rn.relu" => "__nvvm_ff2f16x2_rn_relu",
+    "llvm.nvvm.ff2f16x2.rz" => "__nvvm_ff2f16x2_rz",
+    "llvm.nvvm.ff2f16x2.rz.relu" => "__nvvm_ff2f16x2_rz_relu",
     "llvm.nvvm.floor.d" => "__nvvm_floor_d",
     "llvm.nvvm.floor.f" => "__nvvm_floor_f",
     "llvm.nvvm.floor.ftz.f" => "__nvvm_floor_ftz_f",
     "llvm.nvvm.fma.rm.d" => "__nvvm_fma_rm_d",
     "llvm.nvvm.fma.rm.f" => "__nvvm_fma_rm_f",
     "llvm.nvvm.fma.rm.ftz.f" => "__nvvm_fma_rm_ftz_f",
+    "llvm.nvvm.fma.rn.bf16" => "__nvvm_fma_rn_bf16",
+    "llvm.nvvm.fma.rn.bf16x2" => "__nvvm_fma_rn_bf16x2",
     "llvm.nvvm.fma.rn.d" => "__nvvm_fma_rn_d",
     "llvm.nvvm.fma.rn.f" => "__nvvm_fma_rn_f",
+    "llvm.nvvm.fma.rn.f16" => "__nvvm_fma_rn_f16",
+    "llvm.nvvm.fma.rn.f16x2" => "__nvvm_fma_rn_f16x2",
     "llvm.nvvm.fma.rn.ftz.f" => "__nvvm_fma_rn_ftz_f",
+    "llvm.nvvm.fma.rn.ftz.f16" => "__nvvm_fma_rn_ftz_f16",
+    "llvm.nvvm.fma.rn.ftz.f16x2" => "__nvvm_fma_rn_ftz_f16x2",
+    "llvm.nvvm.fma.rn.ftz.relu.f16" => "__nvvm_fma_rn_ftz_relu_f16",
+    "llvm.nvvm.fma.rn.ftz.relu.f16x2" => "__nvvm_fma_rn_ftz_relu_f16x2",
+    "llvm.nvvm.fma.rn.ftz.sat.f16" => "__nvvm_fma_rn_ftz_sat_f16",
+    "llvm.nvvm.fma.rn.ftz.sat.f16x2" => "__nvvm_fma_rn_ftz_sat_f16x2",
+    "llvm.nvvm.fma.rn.relu.bf16" => "__nvvm_fma_rn_relu_bf16",
+    "llvm.nvvm.fma.rn.relu.bf16x2" => "__nvvm_fma_rn_relu_bf16x2",
+    "llvm.nvvm.fma.rn.relu.f16" => "__nvvm_fma_rn_relu_f16",
+    "llvm.nvvm.fma.rn.relu.f16x2" => "__nvvm_fma_rn_relu_f16x2",
+    "llvm.nvvm.fma.rn.sat.f16" => "__nvvm_fma_rn_sat_f16",
+    "llvm.nvvm.fma.rn.sat.f16x2" => "__nvvm_fma_rn_sat_f16x2",
     "llvm.nvvm.fma.rp.d" => "__nvvm_fma_rp_d",
     "llvm.nvvm.fma.rp.f" => "__nvvm_fma_rp_f",
     "llvm.nvvm.fma.rp.ftz.f" => "__nvvm_fma_rp_ftz_f",
     "llvm.nvvm.fma.rz.d" => "__nvvm_fma_rz_d",
     "llvm.nvvm.fma.rz.f" => "__nvvm_fma_rz_f",
     "llvm.nvvm.fma.rz.ftz.f" => "__nvvm_fma_rz_ftz_f",
+    "llvm.nvvm.fmax.bf16" => "__nvvm_fmax_bf16",
+    "llvm.nvvm.fmax.bf16x2" => "__nvvm_fmax_bf16x2",
     "llvm.nvvm.fmax.d" => "__nvvm_fmax_d",
     "llvm.nvvm.fmax.f" => "__nvvm_fmax_f",
+    "llvm.nvvm.fmax.f16" => "__nvvm_fmax_f16",
+    "llvm.nvvm.fmax.f16x2" => "__nvvm_fmax_f16x2",
     "llvm.nvvm.fmax.ftz.f" => "__nvvm_fmax_ftz_f",
+    "llvm.nvvm.fmax.ftz.f16" => "__nvvm_fmax_ftz_f16",
+    "llvm.nvvm.fmax.ftz.f16x2" => "__nvvm_fmax_ftz_f16x2",
+    "llvm.nvvm.fmax.ftz.nan.f" => "__nvvm_fmax_ftz_nan_f",
+    "llvm.nvvm.fmax.ftz.nan.f16" => "__nvvm_fmax_ftz_nan_f16",
+    "llvm.nvvm.fmax.ftz.nan.f16x2" => "__nvvm_fmax_ftz_nan_f16x2",
+    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.f" => "__nvvm_fmax_ftz_nan_xorsign_abs_f",
+    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.f16" => "__nvvm_fmax_ftz_nan_xorsign_abs_f16",
+    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.f16x2" => "__nvvm_fmax_ftz_nan_xorsign_abs_f16x2",
+    "llvm.nvvm.fmax.ftz.xorsign.abs.f" => "__nvvm_fmax_ftz_xorsign_abs_f",
+    "llvm.nvvm.fmax.ftz.xorsign.abs.f16" => "__nvvm_fmax_ftz_xorsign_abs_f16",
+    "llvm.nvvm.fmax.ftz.xorsign.abs.f16x2" => "__nvvm_fmax_ftz_xorsign_abs_f16x2",
+    "llvm.nvvm.fmax.nan.bf16" => "__nvvm_fmax_nan_bf16",
+    "llvm.nvvm.fmax.nan.bf16x2" => "__nvvm_fmax_nan_bf16x2",
+    "llvm.nvvm.fmax.nan.f" => "__nvvm_fmax_nan_f",
+    "llvm.nvvm.fmax.nan.f16" => "__nvvm_fmax_nan_f16",
+    "llvm.nvvm.fmax.nan.f16x2" => "__nvvm_fmax_nan_f16x2",
+    "llvm.nvvm.fmax.nan.xorsign.abs.bf16" => "__nvvm_fmax_nan_xorsign_abs_bf16",
+    "llvm.nvvm.fmax.nan.xorsign.abs.bf16x2" => "__nvvm_fmax_nan_xorsign_abs_bf16x2",
+    "llvm.nvvm.fmax.nan.xorsign.abs.f" => "__nvvm_fmax_nan_xorsign_abs_f",
+    "llvm.nvvm.fmax.nan.xorsign.abs.f16" => "__nvvm_fmax_nan_xorsign_abs_f16",
+    "llvm.nvvm.fmax.nan.xorsign.abs.f16x2" => "__nvvm_fmax_nan_xorsign_abs_f16x2",
+    "llvm.nvvm.fmax.xorsign.abs.bf16" => "__nvvm_fmax_xorsign_abs_bf16",
+    "llvm.nvvm.fmax.xorsign.abs.bf16x2" => "__nvvm_fmax_xorsign_abs_bf16x2",
+    "llvm.nvvm.fmax.xorsign.abs.f" => "__nvvm_fmax_xorsign_abs_f",
+    "llvm.nvvm.fmax.xorsign.abs.f16" => "__nvvm_fmax_xorsign_abs_f16",
+    "llvm.nvvm.fmax.xorsign.abs.f16x2" => "__nvvm_fmax_xorsign_abs_f16x2",
+    "llvm.nvvm.fmin.bf16" => "__nvvm_fmin_bf16",
+    "llvm.nvvm.fmin.bf16x2" => "__nvvm_fmin_bf16x2",
     "llvm.nvvm.fmin.d" => "__nvvm_fmin_d",
     "llvm.nvvm.fmin.f" => "__nvvm_fmin_f",
+    "llvm.nvvm.fmin.f16" => "__nvvm_fmin_f16",
+    "llvm.nvvm.fmin.f16x2" => "__nvvm_fmin_f16x2",
     "llvm.nvvm.fmin.ftz.f" => "__nvvm_fmin_ftz_f",
+    "llvm.nvvm.fmin.ftz.f16" => "__nvvm_fmin_ftz_f16",
+    "llvm.nvvm.fmin.ftz.f16x2" => "__nvvm_fmin_ftz_f16x2",
+    "llvm.nvvm.fmin.ftz.nan.f" => "__nvvm_fmin_ftz_nan_f",
+    "llvm.nvvm.fmin.ftz.nan.f16" => "__nvvm_fmin_ftz_nan_f16",
+    "llvm.nvvm.fmin.ftz.nan.f16x2" => "__nvvm_fmin_ftz_nan_f16x2",
+    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.f" => "__nvvm_fmin_ftz_nan_xorsign_abs_f",
+    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.f16" => "__nvvm_fmin_ftz_nan_xorsign_abs_f16",
+    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.f16x2" => "__nvvm_fmin_ftz_nan_xorsign_abs_f16x2",
+    "llvm.nvvm.fmin.ftz.xorsign.abs.f" => "__nvvm_fmin_ftz_xorsign_abs_f",
+    "llvm.nvvm.fmin.ftz.xorsign.abs.f16" => "__nvvm_fmin_ftz_xorsign_abs_f16",
+    "llvm.nvvm.fmin.ftz.xorsign.abs.f16x2" => "__nvvm_fmin_ftz_xorsign_abs_f16x2",
+    "llvm.nvvm.fmin.nan.bf16" => "__nvvm_fmin_nan_bf16",
+    "llvm.nvvm.fmin.nan.bf16x2" => "__nvvm_fmin_nan_bf16x2",
+    "llvm.nvvm.fmin.nan.f" => "__nvvm_fmin_nan_f",
+    "llvm.nvvm.fmin.nan.f16" => "__nvvm_fmin_nan_f16",
+    "llvm.nvvm.fmin.nan.f16x2" => "__nvvm_fmin_nan_f16x2",
+    "llvm.nvvm.fmin.nan.xorsign.abs.bf16" => "__nvvm_fmin_nan_xorsign_abs_bf16",
+    "llvm.nvvm.fmin.nan.xorsign.abs.bf16x2" => "__nvvm_fmin_nan_xorsign_abs_bf16x2",
+    "llvm.nvvm.fmin.nan.xorsign.abs.f" => "__nvvm_fmin_nan_xorsign_abs_f",
+    "llvm.nvvm.fmin.nan.xorsign.abs.f16" => "__nvvm_fmin_nan_xorsign_abs_f16",
+    "llvm.nvvm.fmin.nan.xorsign.abs.f16x2" => "__nvvm_fmin_nan_xorsign_abs_f16x2",
+    "llvm.nvvm.fmin.xorsign.abs.bf16" => "__nvvm_fmin_xorsign_abs_bf16",
+    "llvm.nvvm.fmin.xorsign.abs.bf16x2" => "__nvvm_fmin_xorsign_abs_bf16x2",
+    "llvm.nvvm.fmin.xorsign.abs.f" => "__nvvm_fmin_xorsign_abs_f",
+    "llvm.nvvm.fmin.xorsign.abs.f16" => "__nvvm_fmin_xorsign_abs_f16",
+    "llvm.nvvm.fmin.xorsign.abs.f16x2" => "__nvvm_fmin_xorsign_abs_f16x2",
+    "llvm.nvvm.fns" => "__nvvm_fns",
     "llvm.nvvm.h2f" => "__nvvm_h2f",
     "llvm.nvvm.i2d.rm" => "__nvvm_i2d_rm",
     "llvm.nvvm.i2d.rn" => "__nvvm_i2d_rn",
@@ -2461,10 +3132,27 @@ match name {
     "llvm.nvvm.ll2f.rp" => "__nvvm_ll2f_rp",
     "llvm.nvvm.ll2f.rz" => "__nvvm_ll2f_rz",
     "llvm.nvvm.lohi.i2d" => "__nvvm_lohi_i2d",
+    "llvm.nvvm.match.any.sync.i32" => "__nvvm_match_any_sync_i32",
+    "llvm.nvvm.match.any.sync.i64" => "__nvvm_match_any_sync_i64",
     "llvm.nvvm.max.i" => "__nvvm_max_i",
     "llvm.nvvm.max.ll" => "__nvvm_max_ll",
     "llvm.nvvm.max.ui" => "__nvvm_max_ui",
     "llvm.nvvm.max.ull" => "__nvvm_max_ull",
+    "llvm.nvvm.mbarrier.arrive" => "__nvvm_mbarrier_arrive",
+    "llvm.nvvm.mbarrier.arrive.drop" => "__nvvm_mbarrier_arrive_drop",
+    "llvm.nvvm.mbarrier.arrive.drop.noComplete" => "__nvvm_mbarrier_arrive_drop_noComplete",
+    "llvm.nvvm.mbarrier.arrive.drop.noComplete.shared" => "__nvvm_mbarrier_arrive_drop_noComplete_shared",
+    "llvm.nvvm.mbarrier.arrive.drop.shared" => "__nvvm_mbarrier_arrive_drop_shared",
+    "llvm.nvvm.mbarrier.arrive.noComplete" => "__nvvm_mbarrier_arrive_noComplete",
+    "llvm.nvvm.mbarrier.arrive.noComplete.shared" => "__nvvm_mbarrier_arrive_noComplete_shared",
+    "llvm.nvvm.mbarrier.arrive.shared" => "__nvvm_mbarrier_arrive_shared",
+    "llvm.nvvm.mbarrier.init" => "__nvvm_mbarrier_init",
+    "llvm.nvvm.mbarrier.init.shared" => "__nvvm_mbarrier_init_shared",
+    "llvm.nvvm.mbarrier.inval" => "__nvvm_mbarrier_inval",
+    "llvm.nvvm.mbarrier.inval.shared" => "__nvvm_mbarrier_inval_shared",
+    "llvm.nvvm.mbarrier.pending.count" => "__nvvm_mbarrier_pending_count",
+    "llvm.nvvm.mbarrier.test.wait" => "__nvvm_mbarrier_test_wait",
+    "llvm.nvvm.mbarrier.test.wait.shared" => "__nvvm_mbarrier_test_wait_shared",
     "llvm.nvvm.membar.cta" => "__nvvm_membar_cta",
     "llvm.nvvm.membar.gl" => "__nvvm_membar_gl",
     "llvm.nvvm.membar.sys" => "__nvvm_membar_sys",
@@ -2490,10 +3178,13 @@ match name {
     "llvm.nvvm.mulhi.ll" => "__nvvm_mulhi_ll",
     "llvm.nvvm.mulhi.ui" => "__nvvm_mulhi_ui",
     "llvm.nvvm.mulhi.ull" => "__nvvm_mulhi_ull",
+    "llvm.nvvm.neg.bf16" => "__nvvm_neg_bf16",
+    "llvm.nvvm.neg.bf16x2" => "__nvvm_neg_bf16x2",
     "llvm.nvvm.popc.i" => "__nvvm_popc_i",
     "llvm.nvvm.popc.ll" => "__nvvm_popc_ll",
     "llvm.nvvm.prmt" => "__nvvm_prmt",
     "llvm.nvvm.rcp.approx.ftz.d" => "__nvvm_rcp_approx_ftz_d",
+    "llvm.nvvm.rcp.approx.ftz.f" => "__nvvm_rcp_approx_ftz_f",
     "llvm.nvvm.rcp.rm.d" => "__nvvm_rcp_rm_d",
     "llvm.nvvm.rcp.rm.f" => "__nvvm_rcp_rm_f",
     "llvm.nvvm.rcp.rm.ftz.f" => "__nvvm_rcp_rm_ftz_f",
@@ -2506,8 +3197,11 @@ match name {
     "llvm.nvvm.rcp.rz.d" => "__nvvm_rcp_rz_d",
     "llvm.nvvm.rcp.rz.f" => "__nvvm_rcp_rz_f",
     "llvm.nvvm.rcp.rz.ftz.f" => "__nvvm_rcp_rz_ftz_f",
-    "llvm.nvvm.read.ptx.sreg.clock" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.clock64" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.clock" => "__nvvm_read_ptx_sreg_clock",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.clock" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.clock64" => "__nvvm_read_ptx_sreg_clock64",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.clock64" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.ctaid.w" => "__nvvm_read_ptx_sreg_ctaid_w",
     "llvm.nvvm.read.ptx.sreg.ctaid.x" => "__nvvm_read_ptx_sreg_ctaid_x",
     "llvm.nvvm.read.ptx.sreg.ctaid.y" => "__nvvm_read_ptx_sreg_ctaid_y",
     "llvm.nvvm.read.ptx.sreg.ctaid.z" => "__nvvm_read_ptx_sreg_ctaid_z",
@@ -2543,32 +3237,58 @@ match name {
     "llvm.nvvm.read.ptx.sreg.envreg7" => "__nvvm_read_ptx_sreg_envreg7",
     "llvm.nvvm.read.ptx.sreg.envreg8" => "__nvvm_read_ptx_sreg_envreg8",
     "llvm.nvvm.read.ptx.sreg.envreg9" => "__nvvm_read_ptx_sreg_envreg9",
-    "llvm.nvvm.read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.eq" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.ge" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.gt" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.le" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.lt" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_gridid",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_laneid",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.lanemask.eq" => "__nvvm_read_ptx_sreg_lanemask_eq",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.eq" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.lanemask.ge" => "__nvvm_read_ptx_sreg_lanemask_ge",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.ge" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.lanemask.gt" => "__nvvm_read_ptx_sreg_lanemask_gt",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.gt" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.lanemask.le" => "__nvvm_read_ptx_sreg_lanemask_le",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.le" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.lanemask.lt" => "__nvvm_read_ptx_sreg_lanemask_lt",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.lt" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.nctaid.w" => "__nvvm_read_ptx_sreg_nctaid_w",
     "llvm.nvvm.read.ptx.sreg.nctaid.x" => "__nvvm_read_ptx_sreg_nctaid_x",
     "llvm.nvvm.read.ptx.sreg.nctaid.y" => "__nvvm_read_ptx_sreg_nctaid_y",
     "llvm.nvvm.read.ptx.sreg.nctaid.z" => "__nvvm_read_ptx_sreg_nctaid_z",
-    "llvm.nvvm.read.ptx.sreg.nsmid" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.nsmid" => "__nvvm_read_ptx_sreg_nsmid",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.nsmid" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.ntid.w" => "__nvvm_read_ptx_sreg_ntid_w",
     "llvm.nvvm.read.ptx.sreg.ntid.x" => "__nvvm_read_ptx_sreg_ntid_x",
     "llvm.nvvm.read.ptx.sreg.ntid.y" => "__nvvm_read_ptx_sreg_ntid_y",
     "llvm.nvvm.read.ptx.sreg.ntid.z" => "__nvvm_read_ptx_sreg_ntid_z",
-    "llvm.nvvm.read.ptx.sreg.nwarpid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.pm0" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.pm1" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.pm2" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.pm3" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.smid" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.nwarpid" => "__nvvm_read_ptx_sreg_nwarpid",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.nwarpid" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.pm0" => "__nvvm_read_ptx_sreg_pm0",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.pm0" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.pm1" => "__nvvm_read_ptx_sreg_pm1",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.pm1" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.pm2" => "__nvvm_read_ptx_sreg_pm2",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.pm2" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.pm3" => "__nvvm_read_ptx_sreg_pm3",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.pm3" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.smid" => "__nvvm_read_ptx_sreg_smid",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.smid" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.tid.w" => "__nvvm_read_ptx_sreg_tid_w",
     "llvm.nvvm.read.ptx.sreg.tid.x" => "__nvvm_read_ptx_sreg_tid_x",
     "llvm.nvvm.read.ptx.sreg.tid.y" => "__nvvm_read_ptx_sreg_tid_y",
     "llvm.nvvm.read.ptx.sreg.tid.z" => "__nvvm_read_ptx_sreg_tid_z",
-    "llvm.nvvm.read.ptx.sreg.warpid" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.read.ptx.sreg.warpid" => "__nvvm_read_ptx_sreg_warpid",
+    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.warpid" => "__nvvm_read_ptx_sreg_",
     "llvm.nvvm.read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_warpsize",
     // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_",
+    "llvm.nvvm.redux.sync.add" => "__nvvm_redux_sync_add",
+    "llvm.nvvm.redux.sync.and" => "__nvvm_redux_sync_and",
+    "llvm.nvvm.redux.sync.max" => "__nvvm_redux_sync_max",
+    "llvm.nvvm.redux.sync.min" => "__nvvm_redux_sync_min",
+    "llvm.nvvm.redux.sync.or" => "__nvvm_redux_sync_or",
+    "llvm.nvvm.redux.sync.umax" => "__nvvm_redux_sync_umax",
+    "llvm.nvvm.redux.sync.umin" => "__nvvm_redux_sync_umin",
+    "llvm.nvvm.redux.sync.xor" => "__nvvm_redux_sync_xor",
     "llvm.nvvm.rotate.b32" => "__nvvm_rotate_b32",
     "llvm.nvvm.rotate.b64" => "__nvvm_rotate_b64",
     "llvm.nvvm.rotate.right.b64" => "__nvvm_rotate_right_b64",
@@ -2589,6 +3309,14 @@ match name {
     "llvm.nvvm.shfl.down.i32" => "__nvvm_shfl_down_i32",
     "llvm.nvvm.shfl.idx.f32" => "__nvvm_shfl_idx_f32",
     "llvm.nvvm.shfl.idx.i32" => "__nvvm_shfl_idx_i32",
+    "llvm.nvvm.shfl.sync.bfly.f32" => "__nvvm_shfl_sync_bfly_f32",
+    "llvm.nvvm.shfl.sync.bfly.i32" => "__nvvm_shfl_sync_bfly_i32",
+    "llvm.nvvm.shfl.sync.down.f32" => "__nvvm_shfl_sync_down_f32",
+    "llvm.nvvm.shfl.sync.down.i32" => "__nvvm_shfl_sync_down_i32",
+    "llvm.nvvm.shfl.sync.idx.f32" => "__nvvm_shfl_sync_idx_f32",
+    "llvm.nvvm.shfl.sync.idx.i32" => "__nvvm_shfl_sync_idx_i32",
+    "llvm.nvvm.shfl.sync.up.f32" => "__nvvm_shfl_sync_up_f32",
+    "llvm.nvvm.shfl.sync.up.i32" => "__nvvm_shfl_sync_up_i32",
     "llvm.nvvm.shfl.up.f32" => "__nvvm_shfl_up_f32",
     "llvm.nvvm.shfl.up.i32" => "__nvvm_shfl_up_i32",
     "llvm.nvvm.sin.approx.f" => "__nvvm_sin_approx_f",
@@ -2852,6 +3580,14 @@ match name {
     "llvm.nvvm.ull2f.rn" => "__nvvm_ull2f_rn",
     "llvm.nvvm.ull2f.rp" => "__nvvm_ull2f_rp",
     "llvm.nvvm.ull2f.rz" => "__nvvm_ull2f_rz",
+    "llvm.nvvm.vote.all" => "__nvvm_vote_all",
+    "llvm.nvvm.vote.all.sync" => "__nvvm_vote_all_sync",
+    "llvm.nvvm.vote.any" => "__nvvm_vote_any",
+    "llvm.nvvm.vote.any.sync" => "__nvvm_vote_any_sync",
+    "llvm.nvvm.vote.ballot" => "__nvvm_vote_ballot",
+    "llvm.nvvm.vote.ballot.sync" => "__nvvm_vote_ballot_sync",
+    "llvm.nvvm.vote.uni" => "__nvvm_vote_uni",
+    "llvm.nvvm.vote.uni.sync" => "__nvvm_vote_uni_sync",
     // ppc
     "llvm.ppc.addex" => "__builtin_ppc_addex",
     "llvm.ppc.addf128.round.to.odd" => "__builtin_addf128_round_to_odd",
@@ -2881,6 +3617,10 @@ match name {
     "llvm.ppc.altivec.mtvsrhm" => "__builtin_altivec_mtvsrhm",
     "llvm.ppc.altivec.mtvsrqm" => "__builtin_altivec_mtvsrqm",
     "llvm.ppc.altivec.mtvsrwm" => "__builtin_altivec_mtvsrwm",
+    "llvm.ppc.altivec.vabsdub" => "__builtin_altivec_vabsdub",
+    "llvm.ppc.altivec.vabsduh" => "__builtin_altivec_vabsduh",
+    "llvm.ppc.altivec.vabsduw" => "__builtin_altivec_vabsduw",
+    "llvm.ppc.altivec.vaddcuq" => "__builtin_altivec_vaddcuq",
     "llvm.ppc.altivec.vaddcuw" => "__builtin_altivec_vaddcuw",
     "llvm.ppc.altivec.vaddecuq" => "__builtin_altivec_vaddecuq",
     "llvm.ppc.altivec.vaddeuqm" => "__builtin_altivec_vaddeuqm",
@@ -2963,6 +3703,12 @@ match name {
     "llvm.ppc.altivec.vctuxs" => "__builtin_altivec_vctuxs",
     "llvm.ppc.altivec.vctzdm" => "__builtin_altivec_vctzdm",
     "llvm.ppc.altivec.vctzlsbb" => "__builtin_altivec_vctzlsbb",
+    "llvm.ppc.altivec.vdivesd" => "__builtin_altivec_vdivesd",
+    "llvm.ppc.altivec.vdivesq" => "__builtin_altivec_vdivesq",
+    "llvm.ppc.altivec.vdivesw" => "__builtin_altivec_vdivesw",
+    "llvm.ppc.altivec.vdiveud" => "__builtin_altivec_vdiveud",
+    "llvm.ppc.altivec.vdiveuq" => "__builtin_altivec_vdiveuq",
+    "llvm.ppc.altivec.vdiveuw" => "__builtin_altivec_vdiveuw",
     "llvm.ppc.altivec.vexpandbm" => "__builtin_altivec_vexpandbm",
     "llvm.ppc.altivec.vexpanddm" => "__builtin_altivec_vexpanddm",
     "llvm.ppc.altivec.vexpandhm" => "__builtin_altivec_vexpandhm",
@@ -3036,15 +3782,23 @@ match name {
     "llvm.ppc.altivec.vmsumuhm" => "__builtin_altivec_vmsumuhm",
     "llvm.ppc.altivec.vmsumuhs" => "__builtin_altivec_vmsumuhs",
     "llvm.ppc.altivec.vmulesb" => "__builtin_altivec_vmulesb",
+    "llvm.ppc.altivec.vmulesd" => "__builtin_altivec_vmulesd",
     "llvm.ppc.altivec.vmulesh" => "__builtin_altivec_vmulesh",
     "llvm.ppc.altivec.vmulesw" => "__builtin_altivec_vmulesw",
     "llvm.ppc.altivec.vmuleub" => "__builtin_altivec_vmuleub",
+    "llvm.ppc.altivec.vmuleud" => "__builtin_altivec_vmuleud",
     "llvm.ppc.altivec.vmuleuh" => "__builtin_altivec_vmuleuh",
     "llvm.ppc.altivec.vmuleuw" => "__builtin_altivec_vmuleuw",
+    "llvm.ppc.altivec.vmulhsd" => "__builtin_altivec_vmulhsd",
+    "llvm.ppc.altivec.vmulhsw" => "__builtin_altivec_vmulhsw",
+    "llvm.ppc.altivec.vmulhud" => "__builtin_altivec_vmulhud",
+    "llvm.ppc.altivec.vmulhuw" => "__builtin_altivec_vmulhuw",
     "llvm.ppc.altivec.vmulosb" => "__builtin_altivec_vmulosb",
+    "llvm.ppc.altivec.vmulosd" => "__builtin_altivec_vmulosd",
     "llvm.ppc.altivec.vmulosh" => "__builtin_altivec_vmulosh",
     "llvm.ppc.altivec.vmulosw" => "__builtin_altivec_vmulosw",
     "llvm.ppc.altivec.vmuloub" => "__builtin_altivec_vmuloub",
+    "llvm.ppc.altivec.vmuloud" => "__builtin_altivec_vmuloud",
     "llvm.ppc.altivec.vmulouh" => "__builtin_altivec_vmulouh",
     "llvm.ppc.altivec.vmulouw" => "__builtin_altivec_vmulouw",
     "llvm.ppc.altivec.vnmsubfp" => "__builtin_altivec_vnmsubfp",
@@ -3071,8 +3825,14 @@ match name {
     "llvm.ppc.altivec.vrfiz" => "__builtin_altivec_vrfiz",
     "llvm.ppc.altivec.vrlb" => "__builtin_altivec_vrlb",
     "llvm.ppc.altivec.vrld" => "__builtin_altivec_vrld",
+    "llvm.ppc.altivec.vrldmi" => "__builtin_altivec_vrldmi",
+    "llvm.ppc.altivec.vrldnm" => "__builtin_altivec_vrldnm",
     "llvm.ppc.altivec.vrlh" => "__builtin_altivec_vrlh",
+    "llvm.ppc.altivec.vrlqmi" => "__builtin_altivec_vrlqmi",
+    "llvm.ppc.altivec.vrlqnm" => "__builtin_altivec_vrlqnm",
     "llvm.ppc.altivec.vrlw" => "__builtin_altivec_vrlw",
+    "llvm.ppc.altivec.vrlwmi" => "__builtin_altivec_vrlwmi",
+    "llvm.ppc.altivec.vrlwnm" => "__builtin_altivec_vrlwnm",
     "llvm.ppc.altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
     "llvm.ppc.altivec.vsel" => "__builtin_altivec_vsel_4si",
     "llvm.ppc.altivec.vsl" => "__builtin_altivec_vsl",
@@ -3080,6 +3840,7 @@ match name {
     "llvm.ppc.altivec.vsldbi" => "__builtin_altivec_vsldbi",
     "llvm.ppc.altivec.vslh" => "__builtin_altivec_vslh",
     "llvm.ppc.altivec.vslo" => "__builtin_altivec_vslo",
+    "llvm.ppc.altivec.vslv" => "__builtin_altivec_vslv",
     "llvm.ppc.altivec.vslw" => "__builtin_altivec_vslw",
     "llvm.ppc.altivec.vsr" => "__builtin_altivec_vsr",
     "llvm.ppc.altivec.vsrab" => "__builtin_altivec_vsrab",
@@ -3089,6 +3850,7 @@ match name {
     "llvm.ppc.altivec.vsrdbi" => "__builtin_altivec_vsrdbi",
     "llvm.ppc.altivec.vsrh" => "__builtin_altivec_vsrh",
     "llvm.ppc.altivec.vsro" => "__builtin_altivec_vsro",
+    "llvm.ppc.altivec.vsrv" => "__builtin_altivec_vsrv",
     "llvm.ppc.altivec.vsrw" => "__builtin_altivec_vsrw",
     "llvm.ppc.altivec.vstribl" => "__builtin_altivec_vstribl",
     "llvm.ppc.altivec.vstribl.p" => "__builtin_altivec_vstribl_p",
@@ -3098,6 +3860,7 @@ match name {
     "llvm.ppc.altivec.vstrihl.p" => "__builtin_altivec_vstrihl_p",
     "llvm.ppc.altivec.vstrihr" => "__builtin_altivec_vstrihr",
     "llvm.ppc.altivec.vstrihr.p" => "__builtin_altivec_vstrihr_p",
+    "llvm.ppc.altivec.vsubcuq" => "__builtin_altivec_vsubcuq",
     "llvm.ppc.altivec.vsubcuw" => "__builtin_altivec_vsubcuw",
     "llvm.ppc.altivec.vsubecuq" => "__builtin_altivec_vsubecuq",
     "llvm.ppc.altivec.vsubeuqm" => "__builtin_altivec_vsubeuqm",
@@ -3165,6 +3928,8 @@ match name {
     "llvm.ppc.fmaf128.round.to.odd" => "__builtin_fmaf128_round_to_odd",
     "llvm.ppc.fmsub" => "__builtin_ppc_fmsub",
     "llvm.ppc.fmsubs" => "__builtin_ppc_fmsubs",
+    "llvm.ppc.fnabs" => "__builtin_ppc_fnabs",
+    "llvm.ppc.fnabss" => "__builtin_ppc_fnabss",
     "llvm.ppc.fnmadd" => "__builtin_ppc_fnmadd",
     "llvm.ppc.fnmadds" => "__builtin_ppc_fnmadds",
     "llvm.ppc.fre" => "__builtin_ppc_fre",
@@ -3341,8 +4106,24 @@ match name {
     "llvm.ppc.vsx.xvcmpgtdp.p" => "__builtin_vsx_xvcmpgtdp_p",
     "llvm.ppc.vsx.xvcmpgtsp" => "__builtin_vsx_xvcmpgtsp",
     "llvm.ppc.vsx.xvcmpgtsp.p" => "__builtin_vsx_xvcmpgtsp_p",
+    "llvm.ppc.vsx.xvcvbf16spn" => "__builtin_vsx_xvcvbf16spn",
+    "llvm.ppc.vsx.xvcvdpsp" => "__builtin_vsx_xvcvdpsp",
+    "llvm.ppc.vsx.xvcvdpsxws" => "__builtin_vsx_xvcvdpsxws",
+    "llvm.ppc.vsx.xvcvdpuxws" => "__builtin_vsx_xvcvdpuxws",
+    "llvm.ppc.vsx.xvcvhpsp" => "__builtin_vsx_xvcvhpsp",
+    "llvm.ppc.vsx.xvcvspbf16" => "__builtin_vsx_xvcvspbf16",
+    "llvm.ppc.vsx.xvcvspdp" => "__builtin_vsx_xvcvspdp",
+    "llvm.ppc.vsx.xvcvsphp" => "__builtin_vsx_xvcvsphp",
+    "llvm.ppc.vsx.xvcvspsxds" => "__builtin_vsx_xvcvspsxds",
+    "llvm.ppc.vsx.xvcvspuxds" => "__builtin_vsx_xvcvspuxds",
+    "llvm.ppc.vsx.xvcvsxdsp" => "__builtin_vsx_xvcvsxdsp",
+    "llvm.ppc.vsx.xvcvsxwdp" => "__builtin_vsx_xvcvsxwdp",
+    "llvm.ppc.vsx.xvcvuxdsp" => "__builtin_vsx_xvcvuxdsp",
+    "llvm.ppc.vsx.xvcvuxwdp" => "__builtin_vsx_xvcvuxwdp",
     "llvm.ppc.vsx.xvdivdp" => "__builtin_vsx_xvdivdp",
     "llvm.ppc.vsx.xvdivsp" => "__builtin_vsx_xvdivsp",
+    "llvm.ppc.vsx.xviexpdp" => "__builtin_vsx_xviexpdp",
+    "llvm.ppc.vsx.xviexpsp" => "__builtin_vsx_xviexpsp",
     "llvm.ppc.vsx.xvmaxdp" => "__builtin_vsx_xvmaxdp",
     "llvm.ppc.vsx.xvmaxsp" => "__builtin_vsx_xvmaxsp",
     "llvm.ppc.vsx.xvmindp" => "__builtin_vsx_xvmindp",
@@ -3351,10 +4132,28 @@ match name {
     "llvm.ppc.vsx.xvresp" => "__builtin_vsx_xvresp",
     "llvm.ppc.vsx.xvrsqrtedp" => "__builtin_vsx_xvrsqrtedp",
     "llvm.ppc.vsx.xvrsqrtesp" => "__builtin_vsx_xvrsqrtesp",
+    "llvm.ppc.vsx.xvtdivdp" => "__builtin_vsx_xvtdivdp",
+    "llvm.ppc.vsx.xvtdivsp" => "__builtin_vsx_xvtdivsp",
+    "llvm.ppc.vsx.xvtlsbb" => "__builtin_vsx_xvtlsbb",
+    "llvm.ppc.vsx.xvtsqrtdp" => "__builtin_vsx_xvtsqrtdp",
+    "llvm.ppc.vsx.xvtsqrtsp" => "__builtin_vsx_xvtsqrtsp",
+    "llvm.ppc.vsx.xvtstdcdp" => "__builtin_vsx_xvtstdcdp",
+    "llvm.ppc.vsx.xvtstdcsp" => "__builtin_vsx_xvtstdcsp",
+    "llvm.ppc.vsx.xvxexpdp" => "__builtin_vsx_xvxexpdp",
+    "llvm.ppc.vsx.xvxexpsp" => "__builtin_vsx_xvxexpsp",
+    "llvm.ppc.vsx.xvxsigdp" => "__builtin_vsx_xvxsigdp",
+    "llvm.ppc.vsx.xvxsigsp" => "__builtin_vsx_xvxsigsp",
     "llvm.ppc.vsx.xxblendvb" => "__builtin_vsx_xxblendvb",
     "llvm.ppc.vsx.xxblendvd" => "__builtin_vsx_xxblendvd",
     "llvm.ppc.vsx.xxblendvh" => "__builtin_vsx_xxblendvh",
     "llvm.ppc.vsx.xxblendvw" => "__builtin_vsx_xxblendvw",
+    "llvm.ppc.vsx.xxeval" => "__builtin_vsx_xxeval",
+    "llvm.ppc.vsx.xxextractuw" => "__builtin_vsx_xxextractuw",
+    "llvm.ppc.vsx.xxgenpcvbm" => "__builtin_vsx_xxgenpcvbm",
+    "llvm.ppc.vsx.xxgenpcvdm" => "__builtin_vsx_xxgenpcvdm",
+    "llvm.ppc.vsx.xxgenpcvhm" => "__builtin_vsx_xxgenpcvhm",
+    "llvm.ppc.vsx.xxgenpcvwm" => "__builtin_vsx_xxgenpcvwm",
+    "llvm.ppc.vsx.xxinsertw" => "__builtin_vsx_xxinsertw",
     "llvm.ppc.vsx.xxleqv" => "__builtin_vsx_xxleqv",
     "llvm.ppc.vsx.xxpermx" => "__builtin_vsx_xxpermx",
     // ptx
@@ -3376,6 +4175,19 @@ match name {
     "llvm.ptx.read.pm3" => "__builtin_ptx_read_pm3",
     "llvm.ptx.read.smid" => "__builtin_ptx_read_smid",
     "llvm.ptx.read.warpid" => "__builtin_ptx_read_warpid",
+    // r600
+    "llvm.r600.group.barrier" => "__builtin_r600_group_barrier",
+    "llvm.r600.implicitarg.ptr" => "__builtin_r600_implicitarg_ptr",
+    "llvm.r600.rat.store.typed" => "__builtin_r600_rat_store_typed",
+    "llvm.r600.read.global.size.x" => "__builtin_r600_read_global_size_x",
+    "llvm.r600.read.global.size.y" => "__builtin_r600_read_global_size_y",
+    "llvm.r600.read.global.size.z" => "__builtin_r600_read_global_size_z",
+    "llvm.r600.read.ngroups.x" => "__builtin_r600_read_ngroups_x",
+    "llvm.r600.read.ngroups.y" => "__builtin_r600_read_ngroups_y",
+    "llvm.r600.read.ngroups.z" => "__builtin_r600_read_ngroups_z",
+    "llvm.r600.read.tgid.x" => "__builtin_r600_read_tgid_x",
+    "llvm.r600.read.tgid.y" => "__builtin_r600_read_tgid_y",
+    "llvm.r600.read.tgid.z" => "__builtin_r600_read_tgid_z",
     // s390
     "llvm.s390.efpc" => "__builtin_s390_efpc",
     "llvm.s390.etnd" => "__builtin_tx_nesting_depth",
@@ -3383,29 +4195,1426 @@ match name {
     "llvm.s390.ppa.txassist" => "__builtin_tx_assist",
     "llvm.s390.sfpc" => "__builtin_s390_sfpc",
     "llvm.s390.tend" => "__builtin_tend",
+    "llvm.s390.vaccb" => "__builtin_s390_vaccb",
+    "llvm.s390.vacccq" => "__builtin_s390_vacccq",
+    "llvm.s390.vaccf" => "__builtin_s390_vaccf",
+    "llvm.s390.vaccg" => "__builtin_s390_vaccg",
+    "llvm.s390.vacch" => "__builtin_s390_vacch",
+    "llvm.s390.vaccq" => "__builtin_s390_vaccq",
+    "llvm.s390.vacq" => "__builtin_s390_vacq",
+    "llvm.s390.vaq" => "__builtin_s390_vaq",
+    "llvm.s390.vavgb" => "__builtin_s390_vavgb",
+    "llvm.s390.vavgf" => "__builtin_s390_vavgf",
+    "llvm.s390.vavgg" => "__builtin_s390_vavgg",
+    "llvm.s390.vavgh" => "__builtin_s390_vavgh",
+    "llvm.s390.vavglb" => "__builtin_s390_vavglb",
+    "llvm.s390.vavglf" => "__builtin_s390_vavglf",
+    "llvm.s390.vavglg" => "__builtin_s390_vavglg",
+    "llvm.s390.vavglh" => "__builtin_s390_vavglh",
+    "llvm.s390.vbperm" => "__builtin_s390_vbperm",
     "llvm.s390.vcfn" => "__builtin_s390_vcfn",
+    "llvm.s390.vcksm" => "__builtin_s390_vcksm",
     "llvm.s390.vclfnhs" => "__builtin_s390_vclfnhs",
     "llvm.s390.vclfnls" => "__builtin_s390_vclfnls",
     "llvm.s390.vcnf" => "__builtin_s390_vcnf",
     "llvm.s390.vcrnfs" => "__builtin_s390_vcrnfs",
+    "llvm.s390.verimb" => "__builtin_s390_verimb",
+    "llvm.s390.verimf" => "__builtin_s390_verimf",
+    "llvm.s390.verimg" => "__builtin_s390_verimg",
+    "llvm.s390.verimh" => "__builtin_s390_verimh",
+    "llvm.s390.verllb" => "__builtin_s390_verllb",
+    "llvm.s390.verllf" => "__builtin_s390_verllf",
+    "llvm.s390.verllg" => "__builtin_s390_verllg",
+    "llvm.s390.verllh" => "__builtin_s390_verllh",
+    "llvm.s390.verllvb" => "__builtin_s390_verllvb",
+    "llvm.s390.verllvf" => "__builtin_s390_verllvf",
+    "llvm.s390.verllvg" => "__builtin_s390_verllvg",
+    "llvm.s390.verllvh" => "__builtin_s390_verllvh",
+    "llvm.s390.vfaeb" => "__builtin_s390_vfaeb",
+    "llvm.s390.vfaef" => "__builtin_s390_vfaef",
+    "llvm.s390.vfaeh" => "__builtin_s390_vfaeh",
+    "llvm.s390.vfaezb" => "__builtin_s390_vfaezb",
+    "llvm.s390.vfaezf" => "__builtin_s390_vfaezf",
+    "llvm.s390.vfaezh" => "__builtin_s390_vfaezh",
+    "llvm.s390.vfeeb" => "__builtin_s390_vfeeb",
+    "llvm.s390.vfeef" => "__builtin_s390_vfeef",
+    "llvm.s390.vfeeh" => "__builtin_s390_vfeeh",
+    "llvm.s390.vfeezb" => "__builtin_s390_vfeezb",
+    "llvm.s390.vfeezf" => "__builtin_s390_vfeezf",
+    "llvm.s390.vfeezh" => "__builtin_s390_vfeezh",
+    "llvm.s390.vfeneb" => "__builtin_s390_vfeneb",
+    "llvm.s390.vfenef" => "__builtin_s390_vfenef",
+    "llvm.s390.vfeneh" => "__builtin_s390_vfeneh",
+    "llvm.s390.vfenezb" => "__builtin_s390_vfenezb",
+    "llvm.s390.vfenezf" => "__builtin_s390_vfenezf",
+    "llvm.s390.vfenezh" => "__builtin_s390_vfenezh",
+    "llvm.s390.vgfmab" => "__builtin_s390_vgfmab",
+    "llvm.s390.vgfmaf" => "__builtin_s390_vgfmaf",
+    "llvm.s390.vgfmag" => "__builtin_s390_vgfmag",
+    "llvm.s390.vgfmah" => "__builtin_s390_vgfmah",
+    "llvm.s390.vgfmb" => "__builtin_s390_vgfmb",
+    "llvm.s390.vgfmf" => "__builtin_s390_vgfmf",
+    "llvm.s390.vgfmg" => "__builtin_s390_vgfmg",
+    "llvm.s390.vgfmh" => "__builtin_s390_vgfmh",
+    "llvm.s390.vistrb" => "__builtin_s390_vistrb",
+    "llvm.s390.vistrf" => "__builtin_s390_vistrf",
+    "llvm.s390.vistrh" => "__builtin_s390_vistrh",
     "llvm.s390.vlbb" => "__builtin_s390_vlbb",
     "llvm.s390.vll" => "__builtin_s390_vll",
     "llvm.s390.vlrl" => "__builtin_s390_vlrl",
+    "llvm.s390.vmaeb" => "__builtin_s390_vmaeb",
+    "llvm.s390.vmaef" => "__builtin_s390_vmaef",
+    "llvm.s390.vmaeh" => "__builtin_s390_vmaeh",
+    "llvm.s390.vmahb" => "__builtin_s390_vmahb",
+    "llvm.s390.vmahf" => "__builtin_s390_vmahf",
+    "llvm.s390.vmahh" => "__builtin_s390_vmahh",
+    "llvm.s390.vmaleb" => "__builtin_s390_vmaleb",
+    "llvm.s390.vmalef" => "__builtin_s390_vmalef",
+    "llvm.s390.vmaleh" => "__builtin_s390_vmaleh",
+    "llvm.s390.vmalhb" => "__builtin_s390_vmalhb",
+    "llvm.s390.vmalhf" => "__builtin_s390_vmalhf",
+    "llvm.s390.vmalhh" => "__builtin_s390_vmalhh",
+    "llvm.s390.vmalob" => "__builtin_s390_vmalob",
+    "llvm.s390.vmalof" => "__builtin_s390_vmalof",
+    "llvm.s390.vmaloh" => "__builtin_s390_vmaloh",
+    "llvm.s390.vmaob" => "__builtin_s390_vmaob",
+    "llvm.s390.vmaof" => "__builtin_s390_vmaof",
+    "llvm.s390.vmaoh" => "__builtin_s390_vmaoh",
+    "llvm.s390.vmeb" => "__builtin_s390_vmeb",
+    "llvm.s390.vmef" => "__builtin_s390_vmef",
+    "llvm.s390.vmeh" => "__builtin_s390_vmeh",
+    "llvm.s390.vmhb" => "__builtin_s390_vmhb",
+    "llvm.s390.vmhf" => "__builtin_s390_vmhf",
+    "llvm.s390.vmhh" => "__builtin_s390_vmhh",
+    "llvm.s390.vmleb" => "__builtin_s390_vmleb",
+    "llvm.s390.vmlef" => "__builtin_s390_vmlef",
+    "llvm.s390.vmleh" => "__builtin_s390_vmleh",
+    "llvm.s390.vmlhb" => "__builtin_s390_vmlhb",
+    "llvm.s390.vmlhf" => "__builtin_s390_vmlhf",
+    "llvm.s390.vmlhh" => "__builtin_s390_vmlhh",
+    "llvm.s390.vmlob" => "__builtin_s390_vmlob",
+    "llvm.s390.vmlof" => "__builtin_s390_vmlof",
+    "llvm.s390.vmloh" => "__builtin_s390_vmloh",
+    "llvm.s390.vmob" => "__builtin_s390_vmob",
+    "llvm.s390.vmof" => "__builtin_s390_vmof",
+    "llvm.s390.vmoh" => "__builtin_s390_vmoh",
     "llvm.s390.vmslg" => "__builtin_s390_vmslg",
     "llvm.s390.vpdi" => "__builtin_s390_vpdi",
     "llvm.s390.vperm" => "__builtin_s390_vperm",
+    "llvm.s390.vpklsf" => "__builtin_s390_vpklsf",
+    "llvm.s390.vpklsg" => "__builtin_s390_vpklsg",
+    "llvm.s390.vpklsh" => "__builtin_s390_vpklsh",
+    "llvm.s390.vpksf" => "__builtin_s390_vpksf",
+    "llvm.s390.vpksg" => "__builtin_s390_vpksg",
+    "llvm.s390.vpksh" => "__builtin_s390_vpksh",
+    "llvm.s390.vsbcbiq" => "__builtin_s390_vsbcbiq",
+    "llvm.s390.vsbiq" => "__builtin_s390_vsbiq",
+    "llvm.s390.vscbib" => "__builtin_s390_vscbib",
+    "llvm.s390.vscbif" => "__builtin_s390_vscbif",
+    "llvm.s390.vscbig" => "__builtin_s390_vscbig",
+    "llvm.s390.vscbih" => "__builtin_s390_vscbih",
+    "llvm.s390.vscbiq" => "__builtin_s390_vscbiq",
+    "llvm.s390.vsl" => "__builtin_s390_vsl",
+    "llvm.s390.vslb" => "__builtin_s390_vslb",
     "llvm.s390.vsld" => "__builtin_s390_vsld",
     "llvm.s390.vsldb" => "__builtin_s390_vsldb",
+    "llvm.s390.vsq" => "__builtin_s390_vsq",
+    "llvm.s390.vsra" => "__builtin_s390_vsra",
+    "llvm.s390.vsrab" => "__builtin_s390_vsrab",
     "llvm.s390.vsrd" => "__builtin_s390_vsrd",
+    "llvm.s390.vsrl" => "__builtin_s390_vsrl",
+    "llvm.s390.vsrlb" => "__builtin_s390_vsrlb",
     "llvm.s390.vstl" => "__builtin_s390_vstl",
+    "llvm.s390.vstrcb" => "__builtin_s390_vstrcb",
+    "llvm.s390.vstrcf" => "__builtin_s390_vstrcf",
+    "llvm.s390.vstrch" => "__builtin_s390_vstrch",
+    "llvm.s390.vstrczb" => "__builtin_s390_vstrczb",
+    "llvm.s390.vstrczf" => "__builtin_s390_vstrczf",
+    "llvm.s390.vstrczh" => "__builtin_s390_vstrczh",
     "llvm.s390.vstrl" => "__builtin_s390_vstrl",
+    "llvm.s390.vsumb" => "__builtin_s390_vsumb",
+    "llvm.s390.vsumgf" => "__builtin_s390_vsumgf",
+    "llvm.s390.vsumgh" => "__builtin_s390_vsumgh",
+    "llvm.s390.vsumh" => "__builtin_s390_vsumh",
+    "llvm.s390.vsumqf" => "__builtin_s390_vsumqf",
+    "llvm.s390.vsumqg" => "__builtin_s390_vsumqg",
+    "llvm.s390.vtm" => "__builtin_s390_vtm",
+    "llvm.s390.vuphb" => "__builtin_s390_vuphb",
+    "llvm.s390.vuphf" => "__builtin_s390_vuphf",
+    "llvm.s390.vuphh" => "__builtin_s390_vuphh",
+    "llvm.s390.vuplb" => "__builtin_s390_vuplb",
+    "llvm.s390.vuplf" => "__builtin_s390_vuplf",
+    "llvm.s390.vuplhb" => "__builtin_s390_vuplhb",
+    "llvm.s390.vuplhf" => "__builtin_s390_vuplhf",
+    "llvm.s390.vuplhh" => "__builtin_s390_vuplhh",
+    "llvm.s390.vuplhw" => "__builtin_s390_vuplhw",
+    "llvm.s390.vupllb" => "__builtin_s390_vupllb",
+    "llvm.s390.vupllf" => "__builtin_s390_vupllf",
+    "llvm.s390.vupllh" => "__builtin_s390_vupllh",
     // ve
+    "llvm.ve.vl.andm.MMM" => "__builtin_ve_vl_andm_MMM",
+    "llvm.ve.vl.andm.mmm" => "__builtin_ve_vl_andm_mmm",
+    "llvm.ve.vl.eqvm.MMM" => "__builtin_ve_vl_eqvm_MMM",
+    "llvm.ve.vl.eqvm.mmm" => "__builtin_ve_vl_eqvm_mmm",
     "llvm.ve.vl.extract.vm512l" => "__builtin_ve_vl_extract_vm512l",
     "llvm.ve.vl.extract.vm512u" => "__builtin_ve_vl_extract_vm512u",
+    "llvm.ve.vl.fencec.s" => "__builtin_ve_vl_fencec_s",
+    "llvm.ve.vl.fencei" => "__builtin_ve_vl_fencei",
+    "llvm.ve.vl.fencem.s" => "__builtin_ve_vl_fencem_s",
+    "llvm.ve.vl.fidcr.sss" => "__builtin_ve_vl_fidcr_sss",
     "llvm.ve.vl.insert.vm512l" => "__builtin_ve_vl_insert_vm512l",
     "llvm.ve.vl.insert.vm512u" => "__builtin_ve_vl_insert_vm512u",
+    "llvm.ve.vl.lcr.sss" => "__builtin_ve_vl_lcr_sss",
+    "llvm.ve.vl.lsv.vvss" => "__builtin_ve_vl_lsv_vvss",
+    "llvm.ve.vl.lvm.MMss" => "__builtin_ve_vl_lvm_MMss",
+    "llvm.ve.vl.lvm.mmss" => "__builtin_ve_vl_lvm_mmss",
+    "llvm.ve.vl.lvsd.svs" => "__builtin_ve_vl_lvsd_svs",
+    "llvm.ve.vl.lvsl.svs" => "__builtin_ve_vl_lvsl_svs",
+    "llvm.ve.vl.lvss.svs" => "__builtin_ve_vl_lvss_svs",
+    "llvm.ve.vl.lzvm.sml" => "__builtin_ve_vl_lzvm_sml",
+    "llvm.ve.vl.negm.MM" => "__builtin_ve_vl_negm_MM",
+    "llvm.ve.vl.negm.mm" => "__builtin_ve_vl_negm_mm",
+    "llvm.ve.vl.nndm.MMM" => "__builtin_ve_vl_nndm_MMM",
+    "llvm.ve.vl.nndm.mmm" => "__builtin_ve_vl_nndm_mmm",
+    "llvm.ve.vl.orm.MMM" => "__builtin_ve_vl_orm_MMM",
+    "llvm.ve.vl.orm.mmm" => "__builtin_ve_vl_orm_mmm",
     "llvm.ve.vl.pack.f32a" => "__builtin_ve_vl_pack_f32a",
     "llvm.ve.vl.pack.f32p" => "__builtin_ve_vl_pack_f32p",
+    "llvm.ve.vl.pcvm.sml" => "__builtin_ve_vl_pcvm_sml",
+    "llvm.ve.vl.pfchv.ssl" => "__builtin_ve_vl_pfchv_ssl",
+    "llvm.ve.vl.pfchvnc.ssl" => "__builtin_ve_vl_pfchvnc_ssl",
+    "llvm.ve.vl.pvadds.vsvMvl" => "__builtin_ve_vl_pvadds_vsvMvl",
+    "llvm.ve.vl.pvadds.vsvl" => "__builtin_ve_vl_pvadds_vsvl",
+    "llvm.ve.vl.pvadds.vsvvl" => "__builtin_ve_vl_pvadds_vsvvl",
+    "llvm.ve.vl.pvadds.vvvMvl" => "__builtin_ve_vl_pvadds_vvvMvl",
+    "llvm.ve.vl.pvadds.vvvl" => "__builtin_ve_vl_pvadds_vvvl",
+    "llvm.ve.vl.pvadds.vvvvl" => "__builtin_ve_vl_pvadds_vvvvl",
+    "llvm.ve.vl.pvaddu.vsvMvl" => "__builtin_ve_vl_pvaddu_vsvMvl",
+    "llvm.ve.vl.pvaddu.vsvl" => "__builtin_ve_vl_pvaddu_vsvl",
+    "llvm.ve.vl.pvaddu.vsvvl" => "__builtin_ve_vl_pvaddu_vsvvl",
+    "llvm.ve.vl.pvaddu.vvvMvl" => "__builtin_ve_vl_pvaddu_vvvMvl",
+    "llvm.ve.vl.pvaddu.vvvl" => "__builtin_ve_vl_pvaddu_vvvl",
+    "llvm.ve.vl.pvaddu.vvvvl" => "__builtin_ve_vl_pvaddu_vvvvl",
+    "llvm.ve.vl.pvand.vsvMvl" => "__builtin_ve_vl_pvand_vsvMvl",
+    "llvm.ve.vl.pvand.vsvl" => "__builtin_ve_vl_pvand_vsvl",
+    "llvm.ve.vl.pvand.vsvvl" => "__builtin_ve_vl_pvand_vsvvl",
+    "llvm.ve.vl.pvand.vvvMvl" => "__builtin_ve_vl_pvand_vvvMvl",
+    "llvm.ve.vl.pvand.vvvl" => "__builtin_ve_vl_pvand_vvvl",
+    "llvm.ve.vl.pvand.vvvvl" => "__builtin_ve_vl_pvand_vvvvl",
+    "llvm.ve.vl.pvbrd.vsMvl" => "__builtin_ve_vl_pvbrd_vsMvl",
+    "llvm.ve.vl.pvbrd.vsl" => "__builtin_ve_vl_pvbrd_vsl",
+    "llvm.ve.vl.pvbrd.vsvl" => "__builtin_ve_vl_pvbrd_vsvl",
+    "llvm.ve.vl.pvbrv.vvMvl" => "__builtin_ve_vl_pvbrv_vvMvl",
+    "llvm.ve.vl.pvbrv.vvl" => "__builtin_ve_vl_pvbrv_vvl",
+    "llvm.ve.vl.pvbrv.vvvl" => "__builtin_ve_vl_pvbrv_vvvl",
+    "llvm.ve.vl.pvbrvlo.vvl" => "__builtin_ve_vl_pvbrvlo_vvl",
+    "llvm.ve.vl.pvbrvlo.vvmvl" => "__builtin_ve_vl_pvbrvlo_vvmvl",
+    "llvm.ve.vl.pvbrvlo.vvvl" => "__builtin_ve_vl_pvbrvlo_vvvl",
+    "llvm.ve.vl.pvbrvup.vvl" => "__builtin_ve_vl_pvbrvup_vvl",
+    "llvm.ve.vl.pvbrvup.vvmvl" => "__builtin_ve_vl_pvbrvup_vvmvl",
+    "llvm.ve.vl.pvbrvup.vvvl" => "__builtin_ve_vl_pvbrvup_vvvl",
+    "llvm.ve.vl.pvcmps.vsvMvl" => "__builtin_ve_vl_pvcmps_vsvMvl",
+    "llvm.ve.vl.pvcmps.vsvl" => "__builtin_ve_vl_pvcmps_vsvl",
+    "llvm.ve.vl.pvcmps.vsvvl" => "__builtin_ve_vl_pvcmps_vsvvl",
+    "llvm.ve.vl.pvcmps.vvvMvl" => "__builtin_ve_vl_pvcmps_vvvMvl",
+    "llvm.ve.vl.pvcmps.vvvl" => "__builtin_ve_vl_pvcmps_vvvl",
+    "llvm.ve.vl.pvcmps.vvvvl" => "__builtin_ve_vl_pvcmps_vvvvl",
+    "llvm.ve.vl.pvcmpu.vsvMvl" => "__builtin_ve_vl_pvcmpu_vsvMvl",
+    "llvm.ve.vl.pvcmpu.vsvl" => "__builtin_ve_vl_pvcmpu_vsvl",
+    "llvm.ve.vl.pvcmpu.vsvvl" => "__builtin_ve_vl_pvcmpu_vsvvl",
+    "llvm.ve.vl.pvcmpu.vvvMvl" => "__builtin_ve_vl_pvcmpu_vvvMvl",
+    "llvm.ve.vl.pvcmpu.vvvl" => "__builtin_ve_vl_pvcmpu_vvvl",
+    "llvm.ve.vl.pvcmpu.vvvvl" => "__builtin_ve_vl_pvcmpu_vvvvl",
+    "llvm.ve.vl.pvcvtsw.vvl" => "__builtin_ve_vl_pvcvtsw_vvl",
+    "llvm.ve.vl.pvcvtsw.vvvl" => "__builtin_ve_vl_pvcvtsw_vvvl",
+    "llvm.ve.vl.pvcvtws.vvMvl" => "__builtin_ve_vl_pvcvtws_vvMvl",
+    "llvm.ve.vl.pvcvtws.vvl" => "__builtin_ve_vl_pvcvtws_vvl",
+    "llvm.ve.vl.pvcvtws.vvvl" => "__builtin_ve_vl_pvcvtws_vvvl",
+    "llvm.ve.vl.pvcvtwsrz.vvMvl" => "__builtin_ve_vl_pvcvtwsrz_vvMvl",
+    "llvm.ve.vl.pvcvtwsrz.vvl" => "__builtin_ve_vl_pvcvtwsrz_vvl",
+    "llvm.ve.vl.pvcvtwsrz.vvvl" => "__builtin_ve_vl_pvcvtwsrz_vvvl",
+    "llvm.ve.vl.pveqv.vsvMvl" => "__builtin_ve_vl_pveqv_vsvMvl",
+    "llvm.ve.vl.pveqv.vsvl" => "__builtin_ve_vl_pveqv_vsvl",
+    "llvm.ve.vl.pveqv.vsvvl" => "__builtin_ve_vl_pveqv_vsvvl",
+    "llvm.ve.vl.pveqv.vvvMvl" => "__builtin_ve_vl_pveqv_vvvMvl",
+    "llvm.ve.vl.pveqv.vvvl" => "__builtin_ve_vl_pveqv_vvvl",
+    "llvm.ve.vl.pveqv.vvvvl" => "__builtin_ve_vl_pveqv_vvvvl",
+    "llvm.ve.vl.pvfadd.vsvMvl" => "__builtin_ve_vl_pvfadd_vsvMvl",
+    "llvm.ve.vl.pvfadd.vsvl" => "__builtin_ve_vl_pvfadd_vsvl",
+    "llvm.ve.vl.pvfadd.vsvvl" => "__builtin_ve_vl_pvfadd_vsvvl",
+    "llvm.ve.vl.pvfadd.vvvMvl" => "__builtin_ve_vl_pvfadd_vvvMvl",
+    "llvm.ve.vl.pvfadd.vvvl" => "__builtin_ve_vl_pvfadd_vvvl",
+    "llvm.ve.vl.pvfadd.vvvvl" => "__builtin_ve_vl_pvfadd_vvvvl",
+    "llvm.ve.vl.pvfcmp.vsvMvl" => "__builtin_ve_vl_pvfcmp_vsvMvl",
+    "llvm.ve.vl.pvfcmp.vsvl" => "__builtin_ve_vl_pvfcmp_vsvl",
+    "llvm.ve.vl.pvfcmp.vsvvl" => "__builtin_ve_vl_pvfcmp_vsvvl",
+    "llvm.ve.vl.pvfcmp.vvvMvl" => "__builtin_ve_vl_pvfcmp_vvvMvl",
+    "llvm.ve.vl.pvfcmp.vvvl" => "__builtin_ve_vl_pvfcmp_vvvl",
+    "llvm.ve.vl.pvfcmp.vvvvl" => "__builtin_ve_vl_pvfcmp_vvvvl",
+    "llvm.ve.vl.pvfmad.vsvvMvl" => "__builtin_ve_vl_pvfmad_vsvvMvl",
+    "llvm.ve.vl.pvfmad.vsvvl" => "__builtin_ve_vl_pvfmad_vsvvl",
+    "llvm.ve.vl.pvfmad.vsvvvl" => "__builtin_ve_vl_pvfmad_vsvvvl",
+    "llvm.ve.vl.pvfmad.vvsvMvl" => "__builtin_ve_vl_pvfmad_vvsvMvl",
+    "llvm.ve.vl.pvfmad.vvsvl" => "__builtin_ve_vl_pvfmad_vvsvl",
+    "llvm.ve.vl.pvfmad.vvsvvl" => "__builtin_ve_vl_pvfmad_vvsvvl",
+    "llvm.ve.vl.pvfmad.vvvvMvl" => "__builtin_ve_vl_pvfmad_vvvvMvl",
+    "llvm.ve.vl.pvfmad.vvvvl" => "__builtin_ve_vl_pvfmad_vvvvl",
+    "llvm.ve.vl.pvfmad.vvvvvl" => "__builtin_ve_vl_pvfmad_vvvvvl",
+    "llvm.ve.vl.pvfmax.vsvMvl" => "__builtin_ve_vl_pvfmax_vsvMvl",
+    "llvm.ve.vl.pvfmax.vsvl" => "__builtin_ve_vl_pvfmax_vsvl",
+    "llvm.ve.vl.pvfmax.vsvvl" => "__builtin_ve_vl_pvfmax_vsvvl",
+    "llvm.ve.vl.pvfmax.vvvMvl" => "__builtin_ve_vl_pvfmax_vvvMvl",
+    "llvm.ve.vl.pvfmax.vvvl" => "__builtin_ve_vl_pvfmax_vvvl",
+    "llvm.ve.vl.pvfmax.vvvvl" => "__builtin_ve_vl_pvfmax_vvvvl",
+    "llvm.ve.vl.pvfmin.vsvMvl" => "__builtin_ve_vl_pvfmin_vsvMvl",
+    "llvm.ve.vl.pvfmin.vsvl" => "__builtin_ve_vl_pvfmin_vsvl",
+    "llvm.ve.vl.pvfmin.vsvvl" => "__builtin_ve_vl_pvfmin_vsvvl",
+    "llvm.ve.vl.pvfmin.vvvMvl" => "__builtin_ve_vl_pvfmin_vvvMvl",
+    "llvm.ve.vl.pvfmin.vvvl" => "__builtin_ve_vl_pvfmin_vvvl",
+    "llvm.ve.vl.pvfmin.vvvvl" => "__builtin_ve_vl_pvfmin_vvvvl",
+    "llvm.ve.vl.pvfmkaf.Ml" => "__builtin_ve_vl_pvfmkaf_Ml",
+    "llvm.ve.vl.pvfmkat.Ml" => "__builtin_ve_vl_pvfmkat_Ml",
+    "llvm.ve.vl.pvfmkseq.MvMl" => "__builtin_ve_vl_pvfmkseq_MvMl",
+    "llvm.ve.vl.pvfmkseq.Mvl" => "__builtin_ve_vl_pvfmkseq_Mvl",
+    "llvm.ve.vl.pvfmkseqnan.MvMl" => "__builtin_ve_vl_pvfmkseqnan_MvMl",
+    "llvm.ve.vl.pvfmkseqnan.Mvl" => "__builtin_ve_vl_pvfmkseqnan_Mvl",
+    "llvm.ve.vl.pvfmksge.MvMl" => "__builtin_ve_vl_pvfmksge_MvMl",
+    "llvm.ve.vl.pvfmksge.Mvl" => "__builtin_ve_vl_pvfmksge_Mvl",
+    "llvm.ve.vl.pvfmksgenan.MvMl" => "__builtin_ve_vl_pvfmksgenan_MvMl",
+    "llvm.ve.vl.pvfmksgenan.Mvl" => "__builtin_ve_vl_pvfmksgenan_Mvl",
+    "llvm.ve.vl.pvfmksgt.MvMl" => "__builtin_ve_vl_pvfmksgt_MvMl",
+    "llvm.ve.vl.pvfmksgt.Mvl" => "__builtin_ve_vl_pvfmksgt_Mvl",
+    "llvm.ve.vl.pvfmksgtnan.MvMl" => "__builtin_ve_vl_pvfmksgtnan_MvMl",
+    "llvm.ve.vl.pvfmksgtnan.Mvl" => "__builtin_ve_vl_pvfmksgtnan_Mvl",
+    "llvm.ve.vl.pvfmksle.MvMl" => "__builtin_ve_vl_pvfmksle_MvMl",
+    "llvm.ve.vl.pvfmksle.Mvl" => "__builtin_ve_vl_pvfmksle_Mvl",
+    "llvm.ve.vl.pvfmkslenan.MvMl" => "__builtin_ve_vl_pvfmkslenan_MvMl",
+    "llvm.ve.vl.pvfmkslenan.Mvl" => "__builtin_ve_vl_pvfmkslenan_Mvl",
+    "llvm.ve.vl.pvfmksloeq.mvl" => "__builtin_ve_vl_pvfmksloeq_mvl",
+    "llvm.ve.vl.pvfmksloeq.mvml" => "__builtin_ve_vl_pvfmksloeq_mvml",
+    "llvm.ve.vl.pvfmksloeqnan.mvl" => "__builtin_ve_vl_pvfmksloeqnan_mvl",
+    "llvm.ve.vl.pvfmksloeqnan.mvml" => "__builtin_ve_vl_pvfmksloeqnan_mvml",
+    "llvm.ve.vl.pvfmksloge.mvl" => "__builtin_ve_vl_pvfmksloge_mvl",
+    "llvm.ve.vl.pvfmksloge.mvml" => "__builtin_ve_vl_pvfmksloge_mvml",
+    "llvm.ve.vl.pvfmkslogenan.mvl" => "__builtin_ve_vl_pvfmkslogenan_mvl",
+    "llvm.ve.vl.pvfmkslogenan.mvml" => "__builtin_ve_vl_pvfmkslogenan_mvml",
+    "llvm.ve.vl.pvfmkslogt.mvl" => "__builtin_ve_vl_pvfmkslogt_mvl",
+    "llvm.ve.vl.pvfmkslogt.mvml" => "__builtin_ve_vl_pvfmkslogt_mvml",
+    "llvm.ve.vl.pvfmkslogtnan.mvl" => "__builtin_ve_vl_pvfmkslogtnan_mvl",
+    "llvm.ve.vl.pvfmkslogtnan.mvml" => "__builtin_ve_vl_pvfmkslogtnan_mvml",
+    "llvm.ve.vl.pvfmkslole.mvl" => "__builtin_ve_vl_pvfmkslole_mvl",
+    "llvm.ve.vl.pvfmkslole.mvml" => "__builtin_ve_vl_pvfmkslole_mvml",
+    "llvm.ve.vl.pvfmkslolenan.mvl" => "__builtin_ve_vl_pvfmkslolenan_mvl",
+    "llvm.ve.vl.pvfmkslolenan.mvml" => "__builtin_ve_vl_pvfmkslolenan_mvml",
+    "llvm.ve.vl.pvfmkslolt.mvl" => "__builtin_ve_vl_pvfmkslolt_mvl",
+    "llvm.ve.vl.pvfmkslolt.mvml" => "__builtin_ve_vl_pvfmkslolt_mvml",
+    "llvm.ve.vl.pvfmksloltnan.mvl" => "__builtin_ve_vl_pvfmksloltnan_mvl",
+    "llvm.ve.vl.pvfmksloltnan.mvml" => "__builtin_ve_vl_pvfmksloltnan_mvml",
+    "llvm.ve.vl.pvfmkslonan.mvl" => "__builtin_ve_vl_pvfmkslonan_mvl",
+    "llvm.ve.vl.pvfmkslonan.mvml" => "__builtin_ve_vl_pvfmkslonan_mvml",
+    "llvm.ve.vl.pvfmkslone.mvl" => "__builtin_ve_vl_pvfmkslone_mvl",
+    "llvm.ve.vl.pvfmkslone.mvml" => "__builtin_ve_vl_pvfmkslone_mvml",
+    "llvm.ve.vl.pvfmkslonenan.mvl" => "__builtin_ve_vl_pvfmkslonenan_mvl",
+    "llvm.ve.vl.pvfmkslonenan.mvml" => "__builtin_ve_vl_pvfmkslonenan_mvml",
+    "llvm.ve.vl.pvfmkslonum.mvl" => "__builtin_ve_vl_pvfmkslonum_mvl",
+    "llvm.ve.vl.pvfmkslonum.mvml" => "__builtin_ve_vl_pvfmkslonum_mvml",
+    "llvm.ve.vl.pvfmkslt.MvMl" => "__builtin_ve_vl_pvfmkslt_MvMl",
+    "llvm.ve.vl.pvfmkslt.Mvl" => "__builtin_ve_vl_pvfmkslt_Mvl",
+    "llvm.ve.vl.pvfmksltnan.MvMl" => "__builtin_ve_vl_pvfmksltnan_MvMl",
+    "llvm.ve.vl.pvfmksltnan.Mvl" => "__builtin_ve_vl_pvfmksltnan_Mvl",
+    "llvm.ve.vl.pvfmksnan.MvMl" => "__builtin_ve_vl_pvfmksnan_MvMl",
+    "llvm.ve.vl.pvfmksnan.Mvl" => "__builtin_ve_vl_pvfmksnan_Mvl",
+    "llvm.ve.vl.pvfmksne.MvMl" => "__builtin_ve_vl_pvfmksne_MvMl",
+    "llvm.ve.vl.pvfmksne.Mvl" => "__builtin_ve_vl_pvfmksne_Mvl",
+    "llvm.ve.vl.pvfmksnenan.MvMl" => "__builtin_ve_vl_pvfmksnenan_MvMl",
+    "llvm.ve.vl.pvfmksnenan.Mvl" => "__builtin_ve_vl_pvfmksnenan_Mvl",
+    "llvm.ve.vl.pvfmksnum.MvMl" => "__builtin_ve_vl_pvfmksnum_MvMl",
+    "llvm.ve.vl.pvfmksnum.Mvl" => "__builtin_ve_vl_pvfmksnum_Mvl",
+    "llvm.ve.vl.pvfmksupeq.mvl" => "__builtin_ve_vl_pvfmksupeq_mvl",
+    "llvm.ve.vl.pvfmksupeq.mvml" => "__builtin_ve_vl_pvfmksupeq_mvml",
+    "llvm.ve.vl.pvfmksupeqnan.mvl" => "__builtin_ve_vl_pvfmksupeqnan_mvl",
+    "llvm.ve.vl.pvfmksupeqnan.mvml" => "__builtin_ve_vl_pvfmksupeqnan_mvml",
+    "llvm.ve.vl.pvfmksupge.mvl" => "__builtin_ve_vl_pvfmksupge_mvl",
+    "llvm.ve.vl.pvfmksupge.mvml" => "__builtin_ve_vl_pvfmksupge_mvml",
+    "llvm.ve.vl.pvfmksupgenan.mvl" => "__builtin_ve_vl_pvfmksupgenan_mvl",
+    "llvm.ve.vl.pvfmksupgenan.mvml" => "__builtin_ve_vl_pvfmksupgenan_mvml",
+    "llvm.ve.vl.pvfmksupgt.mvl" => "__builtin_ve_vl_pvfmksupgt_mvl",
+    "llvm.ve.vl.pvfmksupgt.mvml" => "__builtin_ve_vl_pvfmksupgt_mvml",
+    "llvm.ve.vl.pvfmksupgtnan.mvl" => "__builtin_ve_vl_pvfmksupgtnan_mvl",
+    "llvm.ve.vl.pvfmksupgtnan.mvml" => "__builtin_ve_vl_pvfmksupgtnan_mvml",
+    "llvm.ve.vl.pvfmksuple.mvl" => "__builtin_ve_vl_pvfmksuple_mvl",
+    "llvm.ve.vl.pvfmksuple.mvml" => "__builtin_ve_vl_pvfmksuple_mvml",
+    "llvm.ve.vl.pvfmksuplenan.mvl" => "__builtin_ve_vl_pvfmksuplenan_mvl",
+    "llvm.ve.vl.pvfmksuplenan.mvml" => "__builtin_ve_vl_pvfmksuplenan_mvml",
+    "llvm.ve.vl.pvfmksuplt.mvl" => "__builtin_ve_vl_pvfmksuplt_mvl",
+    "llvm.ve.vl.pvfmksuplt.mvml" => "__builtin_ve_vl_pvfmksuplt_mvml",
+    "llvm.ve.vl.pvfmksupltnan.mvl" => "__builtin_ve_vl_pvfmksupltnan_mvl",
+    "llvm.ve.vl.pvfmksupltnan.mvml" => "__builtin_ve_vl_pvfmksupltnan_mvml",
+    "llvm.ve.vl.pvfmksupnan.mvl" => "__builtin_ve_vl_pvfmksupnan_mvl",
+    "llvm.ve.vl.pvfmksupnan.mvml" => "__builtin_ve_vl_pvfmksupnan_mvml",
+    "llvm.ve.vl.pvfmksupne.mvl" => "__builtin_ve_vl_pvfmksupne_mvl",
+    "llvm.ve.vl.pvfmksupne.mvml" => "__builtin_ve_vl_pvfmksupne_mvml",
+    "llvm.ve.vl.pvfmksupnenan.mvl" => "__builtin_ve_vl_pvfmksupnenan_mvl",
+    "llvm.ve.vl.pvfmksupnenan.mvml" => "__builtin_ve_vl_pvfmksupnenan_mvml",
+    "llvm.ve.vl.pvfmksupnum.mvl" => "__builtin_ve_vl_pvfmksupnum_mvl",
+    "llvm.ve.vl.pvfmksupnum.mvml" => "__builtin_ve_vl_pvfmksupnum_mvml",
+    "llvm.ve.vl.pvfmkweq.MvMl" => "__builtin_ve_vl_pvfmkweq_MvMl",
+    "llvm.ve.vl.pvfmkweq.Mvl" => "__builtin_ve_vl_pvfmkweq_Mvl",
+    "llvm.ve.vl.pvfmkweqnan.MvMl" => "__builtin_ve_vl_pvfmkweqnan_MvMl",
+    "llvm.ve.vl.pvfmkweqnan.Mvl" => "__builtin_ve_vl_pvfmkweqnan_Mvl",
+    "llvm.ve.vl.pvfmkwge.MvMl" => "__builtin_ve_vl_pvfmkwge_MvMl",
+    "llvm.ve.vl.pvfmkwge.Mvl" => "__builtin_ve_vl_pvfmkwge_Mvl",
+    "llvm.ve.vl.pvfmkwgenan.MvMl" => "__builtin_ve_vl_pvfmkwgenan_MvMl",
+    "llvm.ve.vl.pvfmkwgenan.Mvl" => "__builtin_ve_vl_pvfmkwgenan_Mvl",
+    "llvm.ve.vl.pvfmkwgt.MvMl" => "__builtin_ve_vl_pvfmkwgt_MvMl",
+    "llvm.ve.vl.pvfmkwgt.Mvl" => "__builtin_ve_vl_pvfmkwgt_Mvl",
+    "llvm.ve.vl.pvfmkwgtnan.MvMl" => "__builtin_ve_vl_pvfmkwgtnan_MvMl",
+    "llvm.ve.vl.pvfmkwgtnan.Mvl" => "__builtin_ve_vl_pvfmkwgtnan_Mvl",
+    "llvm.ve.vl.pvfmkwle.MvMl" => "__builtin_ve_vl_pvfmkwle_MvMl",
+    "llvm.ve.vl.pvfmkwle.Mvl" => "__builtin_ve_vl_pvfmkwle_Mvl",
+    "llvm.ve.vl.pvfmkwlenan.MvMl" => "__builtin_ve_vl_pvfmkwlenan_MvMl",
+    "llvm.ve.vl.pvfmkwlenan.Mvl" => "__builtin_ve_vl_pvfmkwlenan_Mvl",
+    "llvm.ve.vl.pvfmkwloeq.mvl" => "__builtin_ve_vl_pvfmkwloeq_mvl",
+    "llvm.ve.vl.pvfmkwloeq.mvml" => "__builtin_ve_vl_pvfmkwloeq_mvml",
+    "llvm.ve.vl.pvfmkwloeqnan.mvl" => "__builtin_ve_vl_pvfmkwloeqnan_mvl",
+    "llvm.ve.vl.pvfmkwloeqnan.mvml" => "__builtin_ve_vl_pvfmkwloeqnan_mvml",
+    "llvm.ve.vl.pvfmkwloge.mvl" => "__builtin_ve_vl_pvfmkwloge_mvl",
+    "llvm.ve.vl.pvfmkwloge.mvml" => "__builtin_ve_vl_pvfmkwloge_mvml",
+    "llvm.ve.vl.pvfmkwlogenan.mvl" => "__builtin_ve_vl_pvfmkwlogenan_mvl",
+    "llvm.ve.vl.pvfmkwlogenan.mvml" => "__builtin_ve_vl_pvfmkwlogenan_mvml",
+    "llvm.ve.vl.pvfmkwlogt.mvl" => "__builtin_ve_vl_pvfmkwlogt_mvl",
+    "llvm.ve.vl.pvfmkwlogt.mvml" => "__builtin_ve_vl_pvfmkwlogt_mvml",
+    "llvm.ve.vl.pvfmkwlogtnan.mvl" => "__builtin_ve_vl_pvfmkwlogtnan_mvl",
+    "llvm.ve.vl.pvfmkwlogtnan.mvml" => "__builtin_ve_vl_pvfmkwlogtnan_mvml",
+    "llvm.ve.vl.pvfmkwlole.mvl" => "__builtin_ve_vl_pvfmkwlole_mvl",
+    "llvm.ve.vl.pvfmkwlole.mvml" => "__builtin_ve_vl_pvfmkwlole_mvml",
+    "llvm.ve.vl.pvfmkwlolenan.mvl" => "__builtin_ve_vl_pvfmkwlolenan_mvl",
+    "llvm.ve.vl.pvfmkwlolenan.mvml" => "__builtin_ve_vl_pvfmkwlolenan_mvml",
+    "llvm.ve.vl.pvfmkwlolt.mvl" => "__builtin_ve_vl_pvfmkwlolt_mvl",
+    "llvm.ve.vl.pvfmkwlolt.mvml" => "__builtin_ve_vl_pvfmkwlolt_mvml",
+    "llvm.ve.vl.pvfmkwloltnan.mvl" => "__builtin_ve_vl_pvfmkwloltnan_mvl",
+    "llvm.ve.vl.pvfmkwloltnan.mvml" => "__builtin_ve_vl_pvfmkwloltnan_mvml",
+    "llvm.ve.vl.pvfmkwlonan.mvl" => "__builtin_ve_vl_pvfmkwlonan_mvl",
+    "llvm.ve.vl.pvfmkwlonan.mvml" => "__builtin_ve_vl_pvfmkwlonan_mvml",
+    "llvm.ve.vl.pvfmkwlone.mvl" => "__builtin_ve_vl_pvfmkwlone_mvl",
+    "llvm.ve.vl.pvfmkwlone.mvml" => "__builtin_ve_vl_pvfmkwlone_mvml",
+    "llvm.ve.vl.pvfmkwlonenan.mvl" => "__builtin_ve_vl_pvfmkwlonenan_mvl",
+    "llvm.ve.vl.pvfmkwlonenan.mvml" => "__builtin_ve_vl_pvfmkwlonenan_mvml",
+    "llvm.ve.vl.pvfmkwlonum.mvl" => "__builtin_ve_vl_pvfmkwlonum_mvl",
+    "llvm.ve.vl.pvfmkwlonum.mvml" => "__builtin_ve_vl_pvfmkwlonum_mvml",
+    "llvm.ve.vl.pvfmkwlt.MvMl" => "__builtin_ve_vl_pvfmkwlt_MvMl",
+    "llvm.ve.vl.pvfmkwlt.Mvl" => "__builtin_ve_vl_pvfmkwlt_Mvl",
+    "llvm.ve.vl.pvfmkwltnan.MvMl" => "__builtin_ve_vl_pvfmkwltnan_MvMl",
+    "llvm.ve.vl.pvfmkwltnan.Mvl" => "__builtin_ve_vl_pvfmkwltnan_Mvl",
+    "llvm.ve.vl.pvfmkwnan.MvMl" => "__builtin_ve_vl_pvfmkwnan_MvMl",
+    "llvm.ve.vl.pvfmkwnan.Mvl" => "__builtin_ve_vl_pvfmkwnan_Mvl",
+    "llvm.ve.vl.pvfmkwne.MvMl" => "__builtin_ve_vl_pvfmkwne_MvMl",
+    "llvm.ve.vl.pvfmkwne.Mvl" => "__builtin_ve_vl_pvfmkwne_Mvl",
+    "llvm.ve.vl.pvfmkwnenan.MvMl" => "__builtin_ve_vl_pvfmkwnenan_MvMl",
+    "llvm.ve.vl.pvfmkwnenan.Mvl" => "__builtin_ve_vl_pvfmkwnenan_Mvl",
+    "llvm.ve.vl.pvfmkwnum.MvMl" => "__builtin_ve_vl_pvfmkwnum_MvMl",
+    "llvm.ve.vl.pvfmkwnum.Mvl" => "__builtin_ve_vl_pvfmkwnum_Mvl",
+    "llvm.ve.vl.pvfmkwupeq.mvl" => "__builtin_ve_vl_pvfmkwupeq_mvl",
+    "llvm.ve.vl.pvfmkwupeq.mvml" => "__builtin_ve_vl_pvfmkwupeq_mvml",
+    "llvm.ve.vl.pvfmkwupeqnan.mvl" => "__builtin_ve_vl_pvfmkwupeqnan_mvl",
+    "llvm.ve.vl.pvfmkwupeqnan.mvml" => "__builtin_ve_vl_pvfmkwupeqnan_mvml",
+    "llvm.ve.vl.pvfmkwupge.mvl" => "__builtin_ve_vl_pvfmkwupge_mvl",
+    "llvm.ve.vl.pvfmkwupge.mvml" => "__builtin_ve_vl_pvfmkwupge_mvml",
+    "llvm.ve.vl.pvfmkwupgenan.mvl" => "__builtin_ve_vl_pvfmkwupgenan_mvl",
+    "llvm.ve.vl.pvfmkwupgenan.mvml" => "__builtin_ve_vl_pvfmkwupgenan_mvml",
+    "llvm.ve.vl.pvfmkwupgt.mvl" => "__builtin_ve_vl_pvfmkwupgt_mvl",
+    "llvm.ve.vl.pvfmkwupgt.mvml" => "__builtin_ve_vl_pvfmkwupgt_mvml",
+    "llvm.ve.vl.pvfmkwupgtnan.mvl" => "__builtin_ve_vl_pvfmkwupgtnan_mvl",
+    "llvm.ve.vl.pvfmkwupgtnan.mvml" => "__builtin_ve_vl_pvfmkwupgtnan_mvml",
+    "llvm.ve.vl.pvfmkwuple.mvl" => "__builtin_ve_vl_pvfmkwuple_mvl",
+    "llvm.ve.vl.pvfmkwuple.mvml" => "__builtin_ve_vl_pvfmkwuple_mvml",
+    "llvm.ve.vl.pvfmkwuplenan.mvl" => "__builtin_ve_vl_pvfmkwuplenan_mvl",
+    "llvm.ve.vl.pvfmkwuplenan.mvml" => "__builtin_ve_vl_pvfmkwuplenan_mvml",
+    "llvm.ve.vl.pvfmkwuplt.mvl" => "__builtin_ve_vl_pvfmkwuplt_mvl",
+    "llvm.ve.vl.pvfmkwuplt.mvml" => "__builtin_ve_vl_pvfmkwuplt_mvml",
+    "llvm.ve.vl.pvfmkwupltnan.mvl" => "__builtin_ve_vl_pvfmkwupltnan_mvl",
+    "llvm.ve.vl.pvfmkwupltnan.mvml" => "__builtin_ve_vl_pvfmkwupltnan_mvml",
+    "llvm.ve.vl.pvfmkwupnan.mvl" => "__builtin_ve_vl_pvfmkwupnan_mvl",
+    "llvm.ve.vl.pvfmkwupnan.mvml" => "__builtin_ve_vl_pvfmkwupnan_mvml",
+    "llvm.ve.vl.pvfmkwupne.mvl" => "__builtin_ve_vl_pvfmkwupne_mvl",
+    "llvm.ve.vl.pvfmkwupne.mvml" => "__builtin_ve_vl_pvfmkwupne_mvml",
+    "llvm.ve.vl.pvfmkwupnenan.mvl" => "__builtin_ve_vl_pvfmkwupnenan_mvl",
+    "llvm.ve.vl.pvfmkwupnenan.mvml" => "__builtin_ve_vl_pvfmkwupnenan_mvml",
+    "llvm.ve.vl.pvfmkwupnum.mvl" => "__builtin_ve_vl_pvfmkwupnum_mvl",
+    "llvm.ve.vl.pvfmkwupnum.mvml" => "__builtin_ve_vl_pvfmkwupnum_mvml",
+    "llvm.ve.vl.pvfmsb.vsvvMvl" => "__builtin_ve_vl_pvfmsb_vsvvMvl",
+    "llvm.ve.vl.pvfmsb.vsvvl" => "__builtin_ve_vl_pvfmsb_vsvvl",
+    "llvm.ve.vl.pvfmsb.vsvvvl" => "__builtin_ve_vl_pvfmsb_vsvvvl",
+    "llvm.ve.vl.pvfmsb.vvsvMvl" => "__builtin_ve_vl_pvfmsb_vvsvMvl",
+    "llvm.ve.vl.pvfmsb.vvsvl" => "__builtin_ve_vl_pvfmsb_vvsvl",
+    "llvm.ve.vl.pvfmsb.vvsvvl" => "__builtin_ve_vl_pvfmsb_vvsvvl",
+    "llvm.ve.vl.pvfmsb.vvvvMvl" => "__builtin_ve_vl_pvfmsb_vvvvMvl",
+    "llvm.ve.vl.pvfmsb.vvvvl" => "__builtin_ve_vl_pvfmsb_vvvvl",
+    "llvm.ve.vl.pvfmsb.vvvvvl" => "__builtin_ve_vl_pvfmsb_vvvvvl",
+    "llvm.ve.vl.pvfmul.vsvMvl" => "__builtin_ve_vl_pvfmul_vsvMvl",
+    "llvm.ve.vl.pvfmul.vsvl" => "__builtin_ve_vl_pvfmul_vsvl",
+    "llvm.ve.vl.pvfmul.vsvvl" => "__builtin_ve_vl_pvfmul_vsvvl",
+    "llvm.ve.vl.pvfmul.vvvMvl" => "__builtin_ve_vl_pvfmul_vvvMvl",
+    "llvm.ve.vl.pvfmul.vvvl" => "__builtin_ve_vl_pvfmul_vvvl",
+    "llvm.ve.vl.pvfmul.vvvvl" => "__builtin_ve_vl_pvfmul_vvvvl",
+    "llvm.ve.vl.pvfnmad.vsvvMvl" => "__builtin_ve_vl_pvfnmad_vsvvMvl",
+    "llvm.ve.vl.pvfnmad.vsvvl" => "__builtin_ve_vl_pvfnmad_vsvvl",
+    "llvm.ve.vl.pvfnmad.vsvvvl" => "__builtin_ve_vl_pvfnmad_vsvvvl",
+    "llvm.ve.vl.pvfnmad.vvsvMvl" => "__builtin_ve_vl_pvfnmad_vvsvMvl",
+    "llvm.ve.vl.pvfnmad.vvsvl" => "__builtin_ve_vl_pvfnmad_vvsvl",
+    "llvm.ve.vl.pvfnmad.vvsvvl" => "__builtin_ve_vl_pvfnmad_vvsvvl",
+    "llvm.ve.vl.pvfnmad.vvvvMvl" => "__builtin_ve_vl_pvfnmad_vvvvMvl",
+    "llvm.ve.vl.pvfnmad.vvvvl" => "__builtin_ve_vl_pvfnmad_vvvvl",
+    "llvm.ve.vl.pvfnmad.vvvvvl" => "__builtin_ve_vl_pvfnmad_vvvvvl",
+    "llvm.ve.vl.pvfnmsb.vsvvMvl" => "__builtin_ve_vl_pvfnmsb_vsvvMvl",
+    "llvm.ve.vl.pvfnmsb.vsvvl" => "__builtin_ve_vl_pvfnmsb_vsvvl",
+    "llvm.ve.vl.pvfnmsb.vsvvvl" => "__builtin_ve_vl_pvfnmsb_vsvvvl",
+    "llvm.ve.vl.pvfnmsb.vvsvMvl" => "__builtin_ve_vl_pvfnmsb_vvsvMvl",
+    "llvm.ve.vl.pvfnmsb.vvsvl" => "__builtin_ve_vl_pvfnmsb_vvsvl",
+    "llvm.ve.vl.pvfnmsb.vvsvvl" => "__builtin_ve_vl_pvfnmsb_vvsvvl",
+    "llvm.ve.vl.pvfnmsb.vvvvMvl" => "__builtin_ve_vl_pvfnmsb_vvvvMvl",
+    "llvm.ve.vl.pvfnmsb.vvvvl" => "__builtin_ve_vl_pvfnmsb_vvvvl",
+    "llvm.ve.vl.pvfnmsb.vvvvvl" => "__builtin_ve_vl_pvfnmsb_vvvvvl",
+    "llvm.ve.vl.pvfsub.vsvMvl" => "__builtin_ve_vl_pvfsub_vsvMvl",
+    "llvm.ve.vl.pvfsub.vsvl" => "__builtin_ve_vl_pvfsub_vsvl",
+    "llvm.ve.vl.pvfsub.vsvvl" => "__builtin_ve_vl_pvfsub_vsvvl",
+    "llvm.ve.vl.pvfsub.vvvMvl" => "__builtin_ve_vl_pvfsub_vvvMvl",
+    "llvm.ve.vl.pvfsub.vvvl" => "__builtin_ve_vl_pvfsub_vvvl",
+    "llvm.ve.vl.pvfsub.vvvvl" => "__builtin_ve_vl_pvfsub_vvvvl",
+    "llvm.ve.vl.pvldz.vvMvl" => "__builtin_ve_vl_pvldz_vvMvl",
+    "llvm.ve.vl.pvldz.vvl" => "__builtin_ve_vl_pvldz_vvl",
+    "llvm.ve.vl.pvldz.vvvl" => "__builtin_ve_vl_pvldz_vvvl",
+    "llvm.ve.vl.pvldzlo.vvl" => "__builtin_ve_vl_pvldzlo_vvl",
+    "llvm.ve.vl.pvldzlo.vvmvl" => "__builtin_ve_vl_pvldzlo_vvmvl",
+    "llvm.ve.vl.pvldzlo.vvvl" => "__builtin_ve_vl_pvldzlo_vvvl",
+    "llvm.ve.vl.pvldzup.vvl" => "__builtin_ve_vl_pvldzup_vvl",
+    "llvm.ve.vl.pvldzup.vvmvl" => "__builtin_ve_vl_pvldzup_vvmvl",
+    "llvm.ve.vl.pvldzup.vvvl" => "__builtin_ve_vl_pvldzup_vvvl",
+    "llvm.ve.vl.pvmaxs.vsvMvl" => "__builtin_ve_vl_pvmaxs_vsvMvl",
+    "llvm.ve.vl.pvmaxs.vsvl" => "__builtin_ve_vl_pvmaxs_vsvl",
+    "llvm.ve.vl.pvmaxs.vsvvl" => "__builtin_ve_vl_pvmaxs_vsvvl",
+    "llvm.ve.vl.pvmaxs.vvvMvl" => "__builtin_ve_vl_pvmaxs_vvvMvl",
+    "llvm.ve.vl.pvmaxs.vvvl" => "__builtin_ve_vl_pvmaxs_vvvl",
+    "llvm.ve.vl.pvmaxs.vvvvl" => "__builtin_ve_vl_pvmaxs_vvvvl",
+    "llvm.ve.vl.pvmins.vsvMvl" => "__builtin_ve_vl_pvmins_vsvMvl",
+    "llvm.ve.vl.pvmins.vsvl" => "__builtin_ve_vl_pvmins_vsvl",
+    "llvm.ve.vl.pvmins.vsvvl" => "__builtin_ve_vl_pvmins_vsvvl",
+    "llvm.ve.vl.pvmins.vvvMvl" => "__builtin_ve_vl_pvmins_vvvMvl",
+    "llvm.ve.vl.pvmins.vvvl" => "__builtin_ve_vl_pvmins_vvvl",
+    "llvm.ve.vl.pvmins.vvvvl" => "__builtin_ve_vl_pvmins_vvvvl",
+    "llvm.ve.vl.pvor.vsvMvl" => "__builtin_ve_vl_pvor_vsvMvl",
+    "llvm.ve.vl.pvor.vsvl" => "__builtin_ve_vl_pvor_vsvl",
+    "llvm.ve.vl.pvor.vsvvl" => "__builtin_ve_vl_pvor_vsvvl",
+    "llvm.ve.vl.pvor.vvvMvl" => "__builtin_ve_vl_pvor_vvvMvl",
+    "llvm.ve.vl.pvor.vvvl" => "__builtin_ve_vl_pvor_vvvl",
+    "llvm.ve.vl.pvor.vvvvl" => "__builtin_ve_vl_pvor_vvvvl",
+    "llvm.ve.vl.pvpcnt.vvMvl" => "__builtin_ve_vl_pvpcnt_vvMvl",
+    "llvm.ve.vl.pvpcnt.vvl" => "__builtin_ve_vl_pvpcnt_vvl",
+    "llvm.ve.vl.pvpcnt.vvvl" => "__builtin_ve_vl_pvpcnt_vvvl",
+    "llvm.ve.vl.pvpcntlo.vvl" => "__builtin_ve_vl_pvpcntlo_vvl",
+    "llvm.ve.vl.pvpcntlo.vvmvl" => "__builtin_ve_vl_pvpcntlo_vvmvl",
+    "llvm.ve.vl.pvpcntlo.vvvl" => "__builtin_ve_vl_pvpcntlo_vvvl",
+    "llvm.ve.vl.pvpcntup.vvl" => "__builtin_ve_vl_pvpcntup_vvl",
+    "llvm.ve.vl.pvpcntup.vvmvl" => "__builtin_ve_vl_pvpcntup_vvmvl",
+    "llvm.ve.vl.pvpcntup.vvvl" => "__builtin_ve_vl_pvpcntup_vvvl",
+    "llvm.ve.vl.pvrcp.vvl" => "__builtin_ve_vl_pvrcp_vvl",
+    "llvm.ve.vl.pvrcp.vvvl" => "__builtin_ve_vl_pvrcp_vvvl",
+    "llvm.ve.vl.pvrsqrt.vvl" => "__builtin_ve_vl_pvrsqrt_vvl",
+    "llvm.ve.vl.pvrsqrt.vvvl" => "__builtin_ve_vl_pvrsqrt_vvvl",
+    "llvm.ve.vl.pvrsqrtnex.vvl" => "__builtin_ve_vl_pvrsqrtnex_vvl",
+    "llvm.ve.vl.pvrsqrtnex.vvvl" => "__builtin_ve_vl_pvrsqrtnex_vvvl",
+    "llvm.ve.vl.pvseq.vl" => "__builtin_ve_vl_pvseq_vl",
+    "llvm.ve.vl.pvseq.vvl" => "__builtin_ve_vl_pvseq_vvl",
+    "llvm.ve.vl.pvseqlo.vl" => "__builtin_ve_vl_pvseqlo_vl",
+    "llvm.ve.vl.pvseqlo.vvl" => "__builtin_ve_vl_pvseqlo_vvl",
+    "llvm.ve.vl.pvsequp.vl" => "__builtin_ve_vl_pvsequp_vl",
+    "llvm.ve.vl.pvsequp.vvl" => "__builtin_ve_vl_pvsequp_vvl",
+    "llvm.ve.vl.pvsla.vvsMvl" => "__builtin_ve_vl_pvsla_vvsMvl",
+    "llvm.ve.vl.pvsla.vvsl" => "__builtin_ve_vl_pvsla_vvsl",
+    "llvm.ve.vl.pvsla.vvsvl" => "__builtin_ve_vl_pvsla_vvsvl",
+    "llvm.ve.vl.pvsla.vvvMvl" => "__builtin_ve_vl_pvsla_vvvMvl",
+    "llvm.ve.vl.pvsla.vvvl" => "__builtin_ve_vl_pvsla_vvvl",
+    "llvm.ve.vl.pvsla.vvvvl" => "__builtin_ve_vl_pvsla_vvvvl",
+    "llvm.ve.vl.pvsll.vvsMvl" => "__builtin_ve_vl_pvsll_vvsMvl",
+    "llvm.ve.vl.pvsll.vvsl" => "__builtin_ve_vl_pvsll_vvsl",
+    "llvm.ve.vl.pvsll.vvsvl" => "__builtin_ve_vl_pvsll_vvsvl",
+    "llvm.ve.vl.pvsll.vvvMvl" => "__builtin_ve_vl_pvsll_vvvMvl",
+    "llvm.ve.vl.pvsll.vvvl" => "__builtin_ve_vl_pvsll_vvvl",
+    "llvm.ve.vl.pvsll.vvvvl" => "__builtin_ve_vl_pvsll_vvvvl",
+    "llvm.ve.vl.pvsra.vvsMvl" => "__builtin_ve_vl_pvsra_vvsMvl",
+    "llvm.ve.vl.pvsra.vvsl" => "__builtin_ve_vl_pvsra_vvsl",
+    "llvm.ve.vl.pvsra.vvsvl" => "__builtin_ve_vl_pvsra_vvsvl",
+    "llvm.ve.vl.pvsra.vvvMvl" => "__builtin_ve_vl_pvsra_vvvMvl",
+    "llvm.ve.vl.pvsra.vvvl" => "__builtin_ve_vl_pvsra_vvvl",
+    "llvm.ve.vl.pvsra.vvvvl" => "__builtin_ve_vl_pvsra_vvvvl",
+    "llvm.ve.vl.pvsrl.vvsMvl" => "__builtin_ve_vl_pvsrl_vvsMvl",
+    "llvm.ve.vl.pvsrl.vvsl" => "__builtin_ve_vl_pvsrl_vvsl",
+    "llvm.ve.vl.pvsrl.vvsvl" => "__builtin_ve_vl_pvsrl_vvsvl",
+    "llvm.ve.vl.pvsrl.vvvMvl" => "__builtin_ve_vl_pvsrl_vvvMvl",
+    "llvm.ve.vl.pvsrl.vvvl" => "__builtin_ve_vl_pvsrl_vvvl",
+    "llvm.ve.vl.pvsrl.vvvvl" => "__builtin_ve_vl_pvsrl_vvvvl",
+    "llvm.ve.vl.pvsubs.vsvMvl" => "__builtin_ve_vl_pvsubs_vsvMvl",
+    "llvm.ve.vl.pvsubs.vsvl" => "__builtin_ve_vl_pvsubs_vsvl",
+    "llvm.ve.vl.pvsubs.vsvvl" => "__builtin_ve_vl_pvsubs_vsvvl",
+    "llvm.ve.vl.pvsubs.vvvMvl" => "__builtin_ve_vl_pvsubs_vvvMvl",
+    "llvm.ve.vl.pvsubs.vvvl" => "__builtin_ve_vl_pvsubs_vvvl",
+    "llvm.ve.vl.pvsubs.vvvvl" => "__builtin_ve_vl_pvsubs_vvvvl",
+    "llvm.ve.vl.pvsubu.vsvMvl" => "__builtin_ve_vl_pvsubu_vsvMvl",
+    "llvm.ve.vl.pvsubu.vsvl" => "__builtin_ve_vl_pvsubu_vsvl",
+    "llvm.ve.vl.pvsubu.vsvvl" => "__builtin_ve_vl_pvsubu_vsvvl",
+    "llvm.ve.vl.pvsubu.vvvMvl" => "__builtin_ve_vl_pvsubu_vvvMvl",
+    "llvm.ve.vl.pvsubu.vvvl" => "__builtin_ve_vl_pvsubu_vvvl",
+    "llvm.ve.vl.pvsubu.vvvvl" => "__builtin_ve_vl_pvsubu_vvvvl",
+    "llvm.ve.vl.pvxor.vsvMvl" => "__builtin_ve_vl_pvxor_vsvMvl",
+    "llvm.ve.vl.pvxor.vsvl" => "__builtin_ve_vl_pvxor_vsvl",
+    "llvm.ve.vl.pvxor.vsvvl" => "__builtin_ve_vl_pvxor_vsvvl",
+    "llvm.ve.vl.pvxor.vvvMvl" => "__builtin_ve_vl_pvxor_vvvMvl",
+    "llvm.ve.vl.pvxor.vvvl" => "__builtin_ve_vl_pvxor_vvvl",
+    "llvm.ve.vl.pvxor.vvvvl" => "__builtin_ve_vl_pvxor_vvvvl",
+    "llvm.ve.vl.scr.sss" => "__builtin_ve_vl_scr_sss",
+    "llvm.ve.vl.svm.sMs" => "__builtin_ve_vl_svm_sMs",
+    "llvm.ve.vl.svm.sms" => "__builtin_ve_vl_svm_sms",
+    "llvm.ve.vl.svob" => "__builtin_ve_vl_svob",
+    "llvm.ve.vl.tovm.sml" => "__builtin_ve_vl_tovm_sml",
+    "llvm.ve.vl.tscr.ssss" => "__builtin_ve_vl_tscr_ssss",
+    "llvm.ve.vl.vaddsl.vsvl" => "__builtin_ve_vl_vaddsl_vsvl",
+    "llvm.ve.vl.vaddsl.vsvmvl" => "__builtin_ve_vl_vaddsl_vsvmvl",
+    "llvm.ve.vl.vaddsl.vsvvl" => "__builtin_ve_vl_vaddsl_vsvvl",
+    "llvm.ve.vl.vaddsl.vvvl" => "__builtin_ve_vl_vaddsl_vvvl",
+    "llvm.ve.vl.vaddsl.vvvmvl" => "__builtin_ve_vl_vaddsl_vvvmvl",
+    "llvm.ve.vl.vaddsl.vvvvl" => "__builtin_ve_vl_vaddsl_vvvvl",
+    "llvm.ve.vl.vaddswsx.vsvl" => "__builtin_ve_vl_vaddswsx_vsvl",
+    "llvm.ve.vl.vaddswsx.vsvmvl" => "__builtin_ve_vl_vaddswsx_vsvmvl",
+    "llvm.ve.vl.vaddswsx.vsvvl" => "__builtin_ve_vl_vaddswsx_vsvvl",
+    "llvm.ve.vl.vaddswsx.vvvl" => "__builtin_ve_vl_vaddswsx_vvvl",
+    "llvm.ve.vl.vaddswsx.vvvmvl" => "__builtin_ve_vl_vaddswsx_vvvmvl",
+    "llvm.ve.vl.vaddswsx.vvvvl" => "__builtin_ve_vl_vaddswsx_vvvvl",
+    "llvm.ve.vl.vaddswzx.vsvl" => "__builtin_ve_vl_vaddswzx_vsvl",
+    "llvm.ve.vl.vaddswzx.vsvmvl" => "__builtin_ve_vl_vaddswzx_vsvmvl",
+    "llvm.ve.vl.vaddswzx.vsvvl" => "__builtin_ve_vl_vaddswzx_vsvvl",
+    "llvm.ve.vl.vaddswzx.vvvl" => "__builtin_ve_vl_vaddswzx_vvvl",
+    "llvm.ve.vl.vaddswzx.vvvmvl" => "__builtin_ve_vl_vaddswzx_vvvmvl",
+    "llvm.ve.vl.vaddswzx.vvvvl" => "__builtin_ve_vl_vaddswzx_vvvvl",
+    "llvm.ve.vl.vaddul.vsvl" => "__builtin_ve_vl_vaddul_vsvl",
+    "llvm.ve.vl.vaddul.vsvmvl" => "__builtin_ve_vl_vaddul_vsvmvl",
+    "llvm.ve.vl.vaddul.vsvvl" => "__builtin_ve_vl_vaddul_vsvvl",
+    "llvm.ve.vl.vaddul.vvvl" => "__builtin_ve_vl_vaddul_vvvl",
+    "llvm.ve.vl.vaddul.vvvmvl" => "__builtin_ve_vl_vaddul_vvvmvl",
+    "llvm.ve.vl.vaddul.vvvvl" => "__builtin_ve_vl_vaddul_vvvvl",
+    "llvm.ve.vl.vadduw.vsvl" => "__builtin_ve_vl_vadduw_vsvl",
+    "llvm.ve.vl.vadduw.vsvmvl" => "__builtin_ve_vl_vadduw_vsvmvl",
+    "llvm.ve.vl.vadduw.vsvvl" => "__builtin_ve_vl_vadduw_vsvvl",
+    "llvm.ve.vl.vadduw.vvvl" => "__builtin_ve_vl_vadduw_vvvl",
+    "llvm.ve.vl.vadduw.vvvmvl" => "__builtin_ve_vl_vadduw_vvvmvl",
+    "llvm.ve.vl.vadduw.vvvvl" => "__builtin_ve_vl_vadduw_vvvvl",
+    "llvm.ve.vl.vand.vsvl" => "__builtin_ve_vl_vand_vsvl",
+    "llvm.ve.vl.vand.vsvmvl" => "__builtin_ve_vl_vand_vsvmvl",
+    "llvm.ve.vl.vand.vsvvl" => "__builtin_ve_vl_vand_vsvvl",
+    "llvm.ve.vl.vand.vvvl" => "__builtin_ve_vl_vand_vvvl",
+    "llvm.ve.vl.vand.vvvmvl" => "__builtin_ve_vl_vand_vvvmvl",
+    "llvm.ve.vl.vand.vvvvl" => "__builtin_ve_vl_vand_vvvvl",
+    "llvm.ve.vl.vbrdd.vsl" => "__builtin_ve_vl_vbrdd_vsl",
+    "llvm.ve.vl.vbrdd.vsmvl" => "__builtin_ve_vl_vbrdd_vsmvl",
+    "llvm.ve.vl.vbrdd.vsvl" => "__builtin_ve_vl_vbrdd_vsvl",
+    "llvm.ve.vl.vbrdl.vsl" => "__builtin_ve_vl_vbrdl_vsl",
+    "llvm.ve.vl.vbrdl.vsmvl" => "__builtin_ve_vl_vbrdl_vsmvl",
+    "llvm.ve.vl.vbrdl.vsvl" => "__builtin_ve_vl_vbrdl_vsvl",
+    "llvm.ve.vl.vbrds.vsl" => "__builtin_ve_vl_vbrds_vsl",
+    "llvm.ve.vl.vbrds.vsmvl" => "__builtin_ve_vl_vbrds_vsmvl",
+    "llvm.ve.vl.vbrds.vsvl" => "__builtin_ve_vl_vbrds_vsvl",
+    "llvm.ve.vl.vbrdw.vsl" => "__builtin_ve_vl_vbrdw_vsl",
+    "llvm.ve.vl.vbrdw.vsmvl" => "__builtin_ve_vl_vbrdw_vsmvl",
+    "llvm.ve.vl.vbrdw.vsvl" => "__builtin_ve_vl_vbrdw_vsvl",
+    "llvm.ve.vl.vbrv.vvl" => "__builtin_ve_vl_vbrv_vvl",
+    "llvm.ve.vl.vbrv.vvmvl" => "__builtin_ve_vl_vbrv_vvmvl",
+    "llvm.ve.vl.vbrv.vvvl" => "__builtin_ve_vl_vbrv_vvvl",
+    "llvm.ve.vl.vcmpsl.vsvl" => "__builtin_ve_vl_vcmpsl_vsvl",
+    "llvm.ve.vl.vcmpsl.vsvmvl" => "__builtin_ve_vl_vcmpsl_vsvmvl",
+    "llvm.ve.vl.vcmpsl.vsvvl" => "__builtin_ve_vl_vcmpsl_vsvvl",
+    "llvm.ve.vl.vcmpsl.vvvl" => "__builtin_ve_vl_vcmpsl_vvvl",
+    "llvm.ve.vl.vcmpsl.vvvmvl" => "__builtin_ve_vl_vcmpsl_vvvmvl",
+    "llvm.ve.vl.vcmpsl.vvvvl" => "__builtin_ve_vl_vcmpsl_vvvvl",
+    "llvm.ve.vl.vcmpswsx.vsvl" => "__builtin_ve_vl_vcmpswsx_vsvl",
+    "llvm.ve.vl.vcmpswsx.vsvmvl" => "__builtin_ve_vl_vcmpswsx_vsvmvl",
+    "llvm.ve.vl.vcmpswsx.vsvvl" => "__builtin_ve_vl_vcmpswsx_vsvvl",
+    "llvm.ve.vl.vcmpswsx.vvvl" => "__builtin_ve_vl_vcmpswsx_vvvl",
+    "llvm.ve.vl.vcmpswsx.vvvmvl" => "__builtin_ve_vl_vcmpswsx_vvvmvl",
+    "llvm.ve.vl.vcmpswsx.vvvvl" => "__builtin_ve_vl_vcmpswsx_vvvvl",
+    "llvm.ve.vl.vcmpswzx.vsvl" => "__builtin_ve_vl_vcmpswzx_vsvl",
+    "llvm.ve.vl.vcmpswzx.vsvmvl" => "__builtin_ve_vl_vcmpswzx_vsvmvl",
+    "llvm.ve.vl.vcmpswzx.vsvvl" => "__builtin_ve_vl_vcmpswzx_vsvvl",
+    "llvm.ve.vl.vcmpswzx.vvvl" => "__builtin_ve_vl_vcmpswzx_vvvl",
+    "llvm.ve.vl.vcmpswzx.vvvmvl" => "__builtin_ve_vl_vcmpswzx_vvvmvl",
+    "llvm.ve.vl.vcmpswzx.vvvvl" => "__builtin_ve_vl_vcmpswzx_vvvvl",
+    "llvm.ve.vl.vcmpul.vsvl" => "__builtin_ve_vl_vcmpul_vsvl",
+    "llvm.ve.vl.vcmpul.vsvmvl" => "__builtin_ve_vl_vcmpul_vsvmvl",
+    "llvm.ve.vl.vcmpul.vsvvl" => "__builtin_ve_vl_vcmpul_vsvvl",
+    "llvm.ve.vl.vcmpul.vvvl" => "__builtin_ve_vl_vcmpul_vvvl",
+    "llvm.ve.vl.vcmpul.vvvmvl" => "__builtin_ve_vl_vcmpul_vvvmvl",
+    "llvm.ve.vl.vcmpul.vvvvl" => "__builtin_ve_vl_vcmpul_vvvvl",
+    "llvm.ve.vl.vcmpuw.vsvl" => "__builtin_ve_vl_vcmpuw_vsvl",
+    "llvm.ve.vl.vcmpuw.vsvmvl" => "__builtin_ve_vl_vcmpuw_vsvmvl",
+    "llvm.ve.vl.vcmpuw.vsvvl" => "__builtin_ve_vl_vcmpuw_vsvvl",
+    "llvm.ve.vl.vcmpuw.vvvl" => "__builtin_ve_vl_vcmpuw_vvvl",
+    "llvm.ve.vl.vcmpuw.vvvmvl" => "__builtin_ve_vl_vcmpuw_vvvmvl",
+    "llvm.ve.vl.vcmpuw.vvvvl" => "__builtin_ve_vl_vcmpuw_vvvvl",
+    "llvm.ve.vl.vcp.vvmvl" => "__builtin_ve_vl_vcp_vvmvl",
+    "llvm.ve.vl.vcvtdl.vvl" => "__builtin_ve_vl_vcvtdl_vvl",
+    "llvm.ve.vl.vcvtdl.vvvl" => "__builtin_ve_vl_vcvtdl_vvvl",
+    "llvm.ve.vl.vcvtds.vvl" => "__builtin_ve_vl_vcvtds_vvl",
+    "llvm.ve.vl.vcvtds.vvvl" => "__builtin_ve_vl_vcvtds_vvvl",
+    "llvm.ve.vl.vcvtdw.vvl" => "__builtin_ve_vl_vcvtdw_vvl",
+    "llvm.ve.vl.vcvtdw.vvvl" => "__builtin_ve_vl_vcvtdw_vvvl",
+    "llvm.ve.vl.vcvtld.vvl" => "__builtin_ve_vl_vcvtld_vvl",
+    "llvm.ve.vl.vcvtld.vvmvl" => "__builtin_ve_vl_vcvtld_vvmvl",
+    "llvm.ve.vl.vcvtld.vvvl" => "__builtin_ve_vl_vcvtld_vvvl",
+    "llvm.ve.vl.vcvtldrz.vvl" => "__builtin_ve_vl_vcvtldrz_vvl",
+    "llvm.ve.vl.vcvtldrz.vvmvl" => "__builtin_ve_vl_vcvtldrz_vvmvl",
+    "llvm.ve.vl.vcvtldrz.vvvl" => "__builtin_ve_vl_vcvtldrz_vvvl",
+    "llvm.ve.vl.vcvtsd.vvl" => "__builtin_ve_vl_vcvtsd_vvl",
+    "llvm.ve.vl.vcvtsd.vvvl" => "__builtin_ve_vl_vcvtsd_vvvl",
+    "llvm.ve.vl.vcvtsw.vvl" => "__builtin_ve_vl_vcvtsw_vvl",
+    "llvm.ve.vl.vcvtsw.vvvl" => "__builtin_ve_vl_vcvtsw_vvvl",
+    "llvm.ve.vl.vcvtwdsx.vvl" => "__builtin_ve_vl_vcvtwdsx_vvl",
+    "llvm.ve.vl.vcvtwdsx.vvmvl" => "__builtin_ve_vl_vcvtwdsx_vvmvl",
+    "llvm.ve.vl.vcvtwdsx.vvvl" => "__builtin_ve_vl_vcvtwdsx_vvvl",
+    "llvm.ve.vl.vcvtwdsxrz.vvl" => "__builtin_ve_vl_vcvtwdsxrz_vvl",
+    "llvm.ve.vl.vcvtwdsxrz.vvmvl" => "__builtin_ve_vl_vcvtwdsxrz_vvmvl",
+    "llvm.ve.vl.vcvtwdsxrz.vvvl" => "__builtin_ve_vl_vcvtwdsxrz_vvvl",
+    "llvm.ve.vl.vcvtwdzx.vvl" => "__builtin_ve_vl_vcvtwdzx_vvl",
+    "llvm.ve.vl.vcvtwdzx.vvmvl" => "__builtin_ve_vl_vcvtwdzx_vvmvl",
+    "llvm.ve.vl.vcvtwdzx.vvvl" => "__builtin_ve_vl_vcvtwdzx_vvvl",
+    "llvm.ve.vl.vcvtwdzxrz.vvl" => "__builtin_ve_vl_vcvtwdzxrz_vvl",
+    "llvm.ve.vl.vcvtwdzxrz.vvmvl" => "__builtin_ve_vl_vcvtwdzxrz_vvmvl",
+    "llvm.ve.vl.vcvtwdzxrz.vvvl" => "__builtin_ve_vl_vcvtwdzxrz_vvvl",
+    "llvm.ve.vl.vcvtwssx.vvl" => "__builtin_ve_vl_vcvtwssx_vvl",
+    "llvm.ve.vl.vcvtwssx.vvmvl" => "__builtin_ve_vl_vcvtwssx_vvmvl",
+    "llvm.ve.vl.vcvtwssx.vvvl" => "__builtin_ve_vl_vcvtwssx_vvvl",
+    "llvm.ve.vl.vcvtwssxrz.vvl" => "__builtin_ve_vl_vcvtwssxrz_vvl",
+    "llvm.ve.vl.vcvtwssxrz.vvmvl" => "__builtin_ve_vl_vcvtwssxrz_vvmvl",
+    "llvm.ve.vl.vcvtwssxrz.vvvl" => "__builtin_ve_vl_vcvtwssxrz_vvvl",
+    "llvm.ve.vl.vcvtwszx.vvl" => "__builtin_ve_vl_vcvtwszx_vvl",
+    "llvm.ve.vl.vcvtwszx.vvmvl" => "__builtin_ve_vl_vcvtwszx_vvmvl",
+    "llvm.ve.vl.vcvtwszx.vvvl" => "__builtin_ve_vl_vcvtwszx_vvvl",
+    "llvm.ve.vl.vcvtwszxrz.vvl" => "__builtin_ve_vl_vcvtwszxrz_vvl",
+    "llvm.ve.vl.vcvtwszxrz.vvmvl" => "__builtin_ve_vl_vcvtwszxrz_vvmvl",
+    "llvm.ve.vl.vcvtwszxrz.vvvl" => "__builtin_ve_vl_vcvtwszxrz_vvvl",
+    "llvm.ve.vl.vdivsl.vsvl" => "__builtin_ve_vl_vdivsl_vsvl",
+    "llvm.ve.vl.vdivsl.vsvmvl" => "__builtin_ve_vl_vdivsl_vsvmvl",
+    "llvm.ve.vl.vdivsl.vsvvl" => "__builtin_ve_vl_vdivsl_vsvvl",
+    "llvm.ve.vl.vdivsl.vvsl" => "__builtin_ve_vl_vdivsl_vvsl",
+    "llvm.ve.vl.vdivsl.vvsmvl" => "__builtin_ve_vl_vdivsl_vvsmvl",
+    "llvm.ve.vl.vdivsl.vvsvl" => "__builtin_ve_vl_vdivsl_vvsvl",
+    "llvm.ve.vl.vdivsl.vvvl" => "__builtin_ve_vl_vdivsl_vvvl",
+    "llvm.ve.vl.vdivsl.vvvmvl" => "__builtin_ve_vl_vdivsl_vvvmvl",
+    "llvm.ve.vl.vdivsl.vvvvl" => "__builtin_ve_vl_vdivsl_vvvvl",
+    "llvm.ve.vl.vdivswsx.vsvl" => "__builtin_ve_vl_vdivswsx_vsvl",
+    "llvm.ve.vl.vdivswsx.vsvmvl" => "__builtin_ve_vl_vdivswsx_vsvmvl",
+    "llvm.ve.vl.vdivswsx.vsvvl" => "__builtin_ve_vl_vdivswsx_vsvvl",
+    "llvm.ve.vl.vdivswsx.vvsl" => "__builtin_ve_vl_vdivswsx_vvsl",
+    "llvm.ve.vl.vdivswsx.vvsmvl" => "__builtin_ve_vl_vdivswsx_vvsmvl",
+    "llvm.ve.vl.vdivswsx.vvsvl" => "__builtin_ve_vl_vdivswsx_vvsvl",
+    "llvm.ve.vl.vdivswsx.vvvl" => "__builtin_ve_vl_vdivswsx_vvvl",
+    "llvm.ve.vl.vdivswsx.vvvmvl" => "__builtin_ve_vl_vdivswsx_vvvmvl",
+    "llvm.ve.vl.vdivswsx.vvvvl" => "__builtin_ve_vl_vdivswsx_vvvvl",
+    "llvm.ve.vl.vdivswzx.vsvl" => "__builtin_ve_vl_vdivswzx_vsvl",
+    "llvm.ve.vl.vdivswzx.vsvmvl" => "__builtin_ve_vl_vdivswzx_vsvmvl",
+    "llvm.ve.vl.vdivswzx.vsvvl" => "__builtin_ve_vl_vdivswzx_vsvvl",
+    "llvm.ve.vl.vdivswzx.vvsl" => "__builtin_ve_vl_vdivswzx_vvsl",
+    "llvm.ve.vl.vdivswzx.vvsmvl" => "__builtin_ve_vl_vdivswzx_vvsmvl",
+    "llvm.ve.vl.vdivswzx.vvsvl" => "__builtin_ve_vl_vdivswzx_vvsvl",
+    "llvm.ve.vl.vdivswzx.vvvl" => "__builtin_ve_vl_vdivswzx_vvvl",
+    "llvm.ve.vl.vdivswzx.vvvmvl" => "__builtin_ve_vl_vdivswzx_vvvmvl",
+    "llvm.ve.vl.vdivswzx.vvvvl" => "__builtin_ve_vl_vdivswzx_vvvvl",
+    "llvm.ve.vl.vdivul.vsvl" => "__builtin_ve_vl_vdivul_vsvl",
+    "llvm.ve.vl.vdivul.vsvmvl" => "__builtin_ve_vl_vdivul_vsvmvl",
+    "llvm.ve.vl.vdivul.vsvvl" => "__builtin_ve_vl_vdivul_vsvvl",
+    "llvm.ve.vl.vdivul.vvsl" => "__builtin_ve_vl_vdivul_vvsl",
+    "llvm.ve.vl.vdivul.vvsmvl" => "__builtin_ve_vl_vdivul_vvsmvl",
+    "llvm.ve.vl.vdivul.vvsvl" => "__builtin_ve_vl_vdivul_vvsvl",
+    "llvm.ve.vl.vdivul.vvvl" => "__builtin_ve_vl_vdivul_vvvl",
+    "llvm.ve.vl.vdivul.vvvmvl" => "__builtin_ve_vl_vdivul_vvvmvl",
+    "llvm.ve.vl.vdivul.vvvvl" => "__builtin_ve_vl_vdivul_vvvvl",
+    "llvm.ve.vl.vdivuw.vsvl" => "__builtin_ve_vl_vdivuw_vsvl",
+    "llvm.ve.vl.vdivuw.vsvmvl" => "__builtin_ve_vl_vdivuw_vsvmvl",
+    "llvm.ve.vl.vdivuw.vsvvl" => "__builtin_ve_vl_vdivuw_vsvvl",
+    "llvm.ve.vl.vdivuw.vvsl" => "__builtin_ve_vl_vdivuw_vvsl",
+    "llvm.ve.vl.vdivuw.vvsmvl" => "__builtin_ve_vl_vdivuw_vvsmvl",
+    "llvm.ve.vl.vdivuw.vvsvl" => "__builtin_ve_vl_vdivuw_vvsvl",
+    "llvm.ve.vl.vdivuw.vvvl" => "__builtin_ve_vl_vdivuw_vvvl",
+    "llvm.ve.vl.vdivuw.vvvmvl" => "__builtin_ve_vl_vdivuw_vvvmvl",
+    "llvm.ve.vl.vdivuw.vvvvl" => "__builtin_ve_vl_vdivuw_vvvvl",
+    "llvm.ve.vl.veqv.vsvl" => "__builtin_ve_vl_veqv_vsvl",
+    "llvm.ve.vl.veqv.vsvmvl" => "__builtin_ve_vl_veqv_vsvmvl",
+    "llvm.ve.vl.veqv.vsvvl" => "__builtin_ve_vl_veqv_vsvvl",
+    "llvm.ve.vl.veqv.vvvl" => "__builtin_ve_vl_veqv_vvvl",
+    "llvm.ve.vl.veqv.vvvmvl" => "__builtin_ve_vl_veqv_vvvmvl",
+    "llvm.ve.vl.veqv.vvvvl" => "__builtin_ve_vl_veqv_vvvvl",
+    "llvm.ve.vl.vex.vvmvl" => "__builtin_ve_vl_vex_vvmvl",
+    "llvm.ve.vl.vfaddd.vsvl" => "__builtin_ve_vl_vfaddd_vsvl",
+    "llvm.ve.vl.vfaddd.vsvmvl" => "__builtin_ve_vl_vfaddd_vsvmvl",
+    "llvm.ve.vl.vfaddd.vsvvl" => "__builtin_ve_vl_vfaddd_vsvvl",
+    "llvm.ve.vl.vfaddd.vvvl" => "__builtin_ve_vl_vfaddd_vvvl",
+    "llvm.ve.vl.vfaddd.vvvmvl" => "__builtin_ve_vl_vfaddd_vvvmvl",
+    "llvm.ve.vl.vfaddd.vvvvl" => "__builtin_ve_vl_vfaddd_vvvvl",
+    "llvm.ve.vl.vfadds.vsvl" => "__builtin_ve_vl_vfadds_vsvl",
+    "llvm.ve.vl.vfadds.vsvmvl" => "__builtin_ve_vl_vfadds_vsvmvl",
+    "llvm.ve.vl.vfadds.vsvvl" => "__builtin_ve_vl_vfadds_vsvvl",
+    "llvm.ve.vl.vfadds.vvvl" => "__builtin_ve_vl_vfadds_vvvl",
+    "llvm.ve.vl.vfadds.vvvmvl" => "__builtin_ve_vl_vfadds_vvvmvl",
+    "llvm.ve.vl.vfadds.vvvvl" => "__builtin_ve_vl_vfadds_vvvvl",
+    "llvm.ve.vl.vfcmpd.vsvl" => "__builtin_ve_vl_vfcmpd_vsvl",
+    "llvm.ve.vl.vfcmpd.vsvmvl" => "__builtin_ve_vl_vfcmpd_vsvmvl",
+    "llvm.ve.vl.vfcmpd.vsvvl" => "__builtin_ve_vl_vfcmpd_vsvvl",
+    "llvm.ve.vl.vfcmpd.vvvl" => "__builtin_ve_vl_vfcmpd_vvvl",
+    "llvm.ve.vl.vfcmpd.vvvmvl" => "__builtin_ve_vl_vfcmpd_vvvmvl",
+    "llvm.ve.vl.vfcmpd.vvvvl" => "__builtin_ve_vl_vfcmpd_vvvvl",
+    "llvm.ve.vl.vfcmps.vsvl" => "__builtin_ve_vl_vfcmps_vsvl",
+    "llvm.ve.vl.vfcmps.vsvmvl" => "__builtin_ve_vl_vfcmps_vsvmvl",
+    "llvm.ve.vl.vfcmps.vsvvl" => "__builtin_ve_vl_vfcmps_vsvvl",
+    "llvm.ve.vl.vfcmps.vvvl" => "__builtin_ve_vl_vfcmps_vvvl",
+    "llvm.ve.vl.vfcmps.vvvmvl" => "__builtin_ve_vl_vfcmps_vvvmvl",
+    "llvm.ve.vl.vfcmps.vvvvl" => "__builtin_ve_vl_vfcmps_vvvvl",
+    "llvm.ve.vl.vfdivd.vsvl" => "__builtin_ve_vl_vfdivd_vsvl",
+    "llvm.ve.vl.vfdivd.vsvmvl" => "__builtin_ve_vl_vfdivd_vsvmvl",
+    "llvm.ve.vl.vfdivd.vsvvl" => "__builtin_ve_vl_vfdivd_vsvvl",
+    "llvm.ve.vl.vfdivd.vvvl" => "__builtin_ve_vl_vfdivd_vvvl",
+    "llvm.ve.vl.vfdivd.vvvmvl" => "__builtin_ve_vl_vfdivd_vvvmvl",
+    "llvm.ve.vl.vfdivd.vvvvl" => "__builtin_ve_vl_vfdivd_vvvvl",
+    "llvm.ve.vl.vfdivs.vsvl" => "__builtin_ve_vl_vfdivs_vsvl",
+    "llvm.ve.vl.vfdivs.vsvmvl" => "__builtin_ve_vl_vfdivs_vsvmvl",
+    "llvm.ve.vl.vfdivs.vsvvl" => "__builtin_ve_vl_vfdivs_vsvvl",
+    "llvm.ve.vl.vfdivs.vvvl" => "__builtin_ve_vl_vfdivs_vvvl",
+    "llvm.ve.vl.vfdivs.vvvmvl" => "__builtin_ve_vl_vfdivs_vvvmvl",
+    "llvm.ve.vl.vfdivs.vvvvl" => "__builtin_ve_vl_vfdivs_vvvvl",
+    "llvm.ve.vl.vfmadd.vsvvl" => "__builtin_ve_vl_vfmadd_vsvvl",
+    "llvm.ve.vl.vfmadd.vsvvmvl" => "__builtin_ve_vl_vfmadd_vsvvmvl",
+    "llvm.ve.vl.vfmadd.vsvvvl" => "__builtin_ve_vl_vfmadd_vsvvvl",
+    "llvm.ve.vl.vfmadd.vvsvl" => "__builtin_ve_vl_vfmadd_vvsvl",
+    "llvm.ve.vl.vfmadd.vvsvmvl" => "__builtin_ve_vl_vfmadd_vvsvmvl",
+    "llvm.ve.vl.vfmadd.vvsvvl" => "__builtin_ve_vl_vfmadd_vvsvvl",
+    "llvm.ve.vl.vfmadd.vvvvl" => "__builtin_ve_vl_vfmadd_vvvvl",
+    "llvm.ve.vl.vfmadd.vvvvmvl" => "__builtin_ve_vl_vfmadd_vvvvmvl",
+    "llvm.ve.vl.vfmadd.vvvvvl" => "__builtin_ve_vl_vfmadd_vvvvvl",
+    "llvm.ve.vl.vfmads.vsvvl" => "__builtin_ve_vl_vfmads_vsvvl",
+    "llvm.ve.vl.vfmads.vsvvmvl" => "__builtin_ve_vl_vfmads_vsvvmvl",
+    "llvm.ve.vl.vfmads.vsvvvl" => "__builtin_ve_vl_vfmads_vsvvvl",
+    "llvm.ve.vl.vfmads.vvsvl" => "__builtin_ve_vl_vfmads_vvsvl",
+    "llvm.ve.vl.vfmads.vvsvmvl" => "__builtin_ve_vl_vfmads_vvsvmvl",
+    "llvm.ve.vl.vfmads.vvsvvl" => "__builtin_ve_vl_vfmads_vvsvvl",
+    "llvm.ve.vl.vfmads.vvvvl" => "__builtin_ve_vl_vfmads_vvvvl",
+    "llvm.ve.vl.vfmads.vvvvmvl" => "__builtin_ve_vl_vfmads_vvvvmvl",
+    "llvm.ve.vl.vfmads.vvvvvl" => "__builtin_ve_vl_vfmads_vvvvvl",
+    "llvm.ve.vl.vfmaxd.vsvl" => "__builtin_ve_vl_vfmaxd_vsvl",
+    "llvm.ve.vl.vfmaxd.vsvmvl" => "__builtin_ve_vl_vfmaxd_vsvmvl",
+    "llvm.ve.vl.vfmaxd.vsvvl" => "__builtin_ve_vl_vfmaxd_vsvvl",
+    "llvm.ve.vl.vfmaxd.vvvl" => "__builtin_ve_vl_vfmaxd_vvvl",
+    "llvm.ve.vl.vfmaxd.vvvmvl" => "__builtin_ve_vl_vfmaxd_vvvmvl",
+    "llvm.ve.vl.vfmaxd.vvvvl" => "__builtin_ve_vl_vfmaxd_vvvvl",
+    "llvm.ve.vl.vfmaxs.vsvl" => "__builtin_ve_vl_vfmaxs_vsvl",
+    "llvm.ve.vl.vfmaxs.vsvmvl" => "__builtin_ve_vl_vfmaxs_vsvmvl",
+    "llvm.ve.vl.vfmaxs.vsvvl" => "__builtin_ve_vl_vfmaxs_vsvvl",
+    "llvm.ve.vl.vfmaxs.vvvl" => "__builtin_ve_vl_vfmaxs_vvvl",
+    "llvm.ve.vl.vfmaxs.vvvmvl" => "__builtin_ve_vl_vfmaxs_vvvmvl",
+    "llvm.ve.vl.vfmaxs.vvvvl" => "__builtin_ve_vl_vfmaxs_vvvvl",
+    "llvm.ve.vl.vfmind.vsvl" => "__builtin_ve_vl_vfmind_vsvl",
+    "llvm.ve.vl.vfmind.vsvmvl" => "__builtin_ve_vl_vfmind_vsvmvl",
+    "llvm.ve.vl.vfmind.vsvvl" => "__builtin_ve_vl_vfmind_vsvvl",
+    "llvm.ve.vl.vfmind.vvvl" => "__builtin_ve_vl_vfmind_vvvl",
+    "llvm.ve.vl.vfmind.vvvmvl" => "__builtin_ve_vl_vfmind_vvvmvl",
+    "llvm.ve.vl.vfmind.vvvvl" => "__builtin_ve_vl_vfmind_vvvvl",
+    "llvm.ve.vl.vfmins.vsvl" => "__builtin_ve_vl_vfmins_vsvl",
+    "llvm.ve.vl.vfmins.vsvmvl" => "__builtin_ve_vl_vfmins_vsvmvl",
+    "llvm.ve.vl.vfmins.vsvvl" => "__builtin_ve_vl_vfmins_vsvvl",
+    "llvm.ve.vl.vfmins.vvvl" => "__builtin_ve_vl_vfmins_vvvl",
+    "llvm.ve.vl.vfmins.vvvmvl" => "__builtin_ve_vl_vfmins_vvvmvl",
+    "llvm.ve.vl.vfmins.vvvvl" => "__builtin_ve_vl_vfmins_vvvvl",
+    "llvm.ve.vl.vfmkdeq.mvl" => "__builtin_ve_vl_vfmkdeq_mvl",
+    "llvm.ve.vl.vfmkdeq.mvml" => "__builtin_ve_vl_vfmkdeq_mvml",
+    "llvm.ve.vl.vfmkdeqnan.mvl" => "__builtin_ve_vl_vfmkdeqnan_mvl",
+    "llvm.ve.vl.vfmkdeqnan.mvml" => "__builtin_ve_vl_vfmkdeqnan_mvml",
+    "llvm.ve.vl.vfmkdge.mvl" => "__builtin_ve_vl_vfmkdge_mvl",
+    "llvm.ve.vl.vfmkdge.mvml" => "__builtin_ve_vl_vfmkdge_mvml",
+    "llvm.ve.vl.vfmkdgenan.mvl" => "__builtin_ve_vl_vfmkdgenan_mvl",
+    "llvm.ve.vl.vfmkdgenan.mvml" => "__builtin_ve_vl_vfmkdgenan_mvml",
+    "llvm.ve.vl.vfmkdgt.mvl" => "__builtin_ve_vl_vfmkdgt_mvl",
+    "llvm.ve.vl.vfmkdgt.mvml" => "__builtin_ve_vl_vfmkdgt_mvml",
+    "llvm.ve.vl.vfmkdgtnan.mvl" => "__builtin_ve_vl_vfmkdgtnan_mvl",
+    "llvm.ve.vl.vfmkdgtnan.mvml" => "__builtin_ve_vl_vfmkdgtnan_mvml",
+    "llvm.ve.vl.vfmkdle.mvl" => "__builtin_ve_vl_vfmkdle_mvl",
+    "llvm.ve.vl.vfmkdle.mvml" => "__builtin_ve_vl_vfmkdle_mvml",
+    "llvm.ve.vl.vfmkdlenan.mvl" => "__builtin_ve_vl_vfmkdlenan_mvl",
+    "llvm.ve.vl.vfmkdlenan.mvml" => "__builtin_ve_vl_vfmkdlenan_mvml",
+    "llvm.ve.vl.vfmkdlt.mvl" => "__builtin_ve_vl_vfmkdlt_mvl",
+    "llvm.ve.vl.vfmkdlt.mvml" => "__builtin_ve_vl_vfmkdlt_mvml",
+    "llvm.ve.vl.vfmkdltnan.mvl" => "__builtin_ve_vl_vfmkdltnan_mvl",
+    "llvm.ve.vl.vfmkdltnan.mvml" => "__builtin_ve_vl_vfmkdltnan_mvml",
+    "llvm.ve.vl.vfmkdnan.mvl" => "__builtin_ve_vl_vfmkdnan_mvl",
+    "llvm.ve.vl.vfmkdnan.mvml" => "__builtin_ve_vl_vfmkdnan_mvml",
+    "llvm.ve.vl.vfmkdne.mvl" => "__builtin_ve_vl_vfmkdne_mvl",
+    "llvm.ve.vl.vfmkdne.mvml" => "__builtin_ve_vl_vfmkdne_mvml",
+    "llvm.ve.vl.vfmkdnenan.mvl" => "__builtin_ve_vl_vfmkdnenan_mvl",
+    "llvm.ve.vl.vfmkdnenan.mvml" => "__builtin_ve_vl_vfmkdnenan_mvml",
+    "llvm.ve.vl.vfmkdnum.mvl" => "__builtin_ve_vl_vfmkdnum_mvl",
+    "llvm.ve.vl.vfmkdnum.mvml" => "__builtin_ve_vl_vfmkdnum_mvml",
+    "llvm.ve.vl.vfmklaf.ml" => "__builtin_ve_vl_vfmklaf_ml",
+    "llvm.ve.vl.vfmklat.ml" => "__builtin_ve_vl_vfmklat_ml",
+    "llvm.ve.vl.vfmkleq.mvl" => "__builtin_ve_vl_vfmkleq_mvl",
+    "llvm.ve.vl.vfmkleq.mvml" => "__builtin_ve_vl_vfmkleq_mvml",
+    "llvm.ve.vl.vfmkleqnan.mvl" => "__builtin_ve_vl_vfmkleqnan_mvl",
+    "llvm.ve.vl.vfmkleqnan.mvml" => "__builtin_ve_vl_vfmkleqnan_mvml",
+    "llvm.ve.vl.vfmklge.mvl" => "__builtin_ve_vl_vfmklge_mvl",
+    "llvm.ve.vl.vfmklge.mvml" => "__builtin_ve_vl_vfmklge_mvml",
+    "llvm.ve.vl.vfmklgenan.mvl" => "__builtin_ve_vl_vfmklgenan_mvl",
+    "llvm.ve.vl.vfmklgenan.mvml" => "__builtin_ve_vl_vfmklgenan_mvml",
+    "llvm.ve.vl.vfmklgt.mvl" => "__builtin_ve_vl_vfmklgt_mvl",
+    "llvm.ve.vl.vfmklgt.mvml" => "__builtin_ve_vl_vfmklgt_mvml",
+    "llvm.ve.vl.vfmklgtnan.mvl" => "__builtin_ve_vl_vfmklgtnan_mvl",
+    "llvm.ve.vl.vfmklgtnan.mvml" => "__builtin_ve_vl_vfmklgtnan_mvml",
+    "llvm.ve.vl.vfmklle.mvl" => "__builtin_ve_vl_vfmklle_mvl",
+    "llvm.ve.vl.vfmklle.mvml" => "__builtin_ve_vl_vfmklle_mvml",
+    "llvm.ve.vl.vfmkllenan.mvl" => "__builtin_ve_vl_vfmkllenan_mvl",
+    "llvm.ve.vl.vfmkllenan.mvml" => "__builtin_ve_vl_vfmkllenan_mvml",
+    "llvm.ve.vl.vfmkllt.mvl" => "__builtin_ve_vl_vfmkllt_mvl",
+    "llvm.ve.vl.vfmkllt.mvml" => "__builtin_ve_vl_vfmkllt_mvml",
+    "llvm.ve.vl.vfmklltnan.mvl" => "__builtin_ve_vl_vfmklltnan_mvl",
+    "llvm.ve.vl.vfmklltnan.mvml" => "__builtin_ve_vl_vfmklltnan_mvml",
+    "llvm.ve.vl.vfmklnan.mvl" => "__builtin_ve_vl_vfmklnan_mvl",
+    "llvm.ve.vl.vfmklnan.mvml" => "__builtin_ve_vl_vfmklnan_mvml",
+    "llvm.ve.vl.vfmklne.mvl" => "__builtin_ve_vl_vfmklne_mvl",
+    "llvm.ve.vl.vfmklne.mvml" => "__builtin_ve_vl_vfmklne_mvml",
+    "llvm.ve.vl.vfmklnenan.mvl" => "__builtin_ve_vl_vfmklnenan_mvl",
+    "llvm.ve.vl.vfmklnenan.mvml" => "__builtin_ve_vl_vfmklnenan_mvml",
+    "llvm.ve.vl.vfmklnum.mvl" => "__builtin_ve_vl_vfmklnum_mvl",
+    "llvm.ve.vl.vfmklnum.mvml" => "__builtin_ve_vl_vfmklnum_mvml",
+    "llvm.ve.vl.vfmkseq.mvl" => "__builtin_ve_vl_vfmkseq_mvl",
+    "llvm.ve.vl.vfmkseq.mvml" => "__builtin_ve_vl_vfmkseq_mvml",
+    "llvm.ve.vl.vfmkseqnan.mvl" => "__builtin_ve_vl_vfmkseqnan_mvl",
+    "llvm.ve.vl.vfmkseqnan.mvml" => "__builtin_ve_vl_vfmkseqnan_mvml",
+    "llvm.ve.vl.vfmksge.mvl" => "__builtin_ve_vl_vfmksge_mvl",
+    "llvm.ve.vl.vfmksge.mvml" => "__builtin_ve_vl_vfmksge_mvml",
+    "llvm.ve.vl.vfmksgenan.mvl" => "__builtin_ve_vl_vfmksgenan_mvl",
+    "llvm.ve.vl.vfmksgenan.mvml" => "__builtin_ve_vl_vfmksgenan_mvml",
+    "llvm.ve.vl.vfmksgt.mvl" => "__builtin_ve_vl_vfmksgt_mvl",
+    "llvm.ve.vl.vfmksgt.mvml" => "__builtin_ve_vl_vfmksgt_mvml",
+    "llvm.ve.vl.vfmksgtnan.mvl" => "__builtin_ve_vl_vfmksgtnan_mvl",
+    "llvm.ve.vl.vfmksgtnan.mvml" => "__builtin_ve_vl_vfmksgtnan_mvml",
+    "llvm.ve.vl.vfmksle.mvl" => "__builtin_ve_vl_vfmksle_mvl",
+    "llvm.ve.vl.vfmksle.mvml" => "__builtin_ve_vl_vfmksle_mvml",
+    "llvm.ve.vl.vfmkslenan.mvl" => "__builtin_ve_vl_vfmkslenan_mvl",
+    "llvm.ve.vl.vfmkslenan.mvml" => "__builtin_ve_vl_vfmkslenan_mvml",
+    "llvm.ve.vl.vfmkslt.mvl" => "__builtin_ve_vl_vfmkslt_mvl",
+    "llvm.ve.vl.vfmkslt.mvml" => "__builtin_ve_vl_vfmkslt_mvml",
+    "llvm.ve.vl.vfmksltnan.mvl" => "__builtin_ve_vl_vfmksltnan_mvl",
+    "llvm.ve.vl.vfmksltnan.mvml" => "__builtin_ve_vl_vfmksltnan_mvml",
+    "llvm.ve.vl.vfmksnan.mvl" => "__builtin_ve_vl_vfmksnan_mvl",
+    "llvm.ve.vl.vfmksnan.mvml" => "__builtin_ve_vl_vfmksnan_mvml",
+    "llvm.ve.vl.vfmksne.mvl" => "__builtin_ve_vl_vfmksne_mvl",
+    "llvm.ve.vl.vfmksne.mvml" => "__builtin_ve_vl_vfmksne_mvml",
+    "llvm.ve.vl.vfmksnenan.mvl" => "__builtin_ve_vl_vfmksnenan_mvl",
+    "llvm.ve.vl.vfmksnenan.mvml" => "__builtin_ve_vl_vfmksnenan_mvml",
+    "llvm.ve.vl.vfmksnum.mvl" => "__builtin_ve_vl_vfmksnum_mvl",
+    "llvm.ve.vl.vfmksnum.mvml" => "__builtin_ve_vl_vfmksnum_mvml",
+    "llvm.ve.vl.vfmkweq.mvl" => "__builtin_ve_vl_vfmkweq_mvl",
+    "llvm.ve.vl.vfmkweq.mvml" => "__builtin_ve_vl_vfmkweq_mvml",
+    "llvm.ve.vl.vfmkweqnan.mvl" => "__builtin_ve_vl_vfmkweqnan_mvl",
+    "llvm.ve.vl.vfmkweqnan.mvml" => "__builtin_ve_vl_vfmkweqnan_mvml",
+    "llvm.ve.vl.vfmkwge.mvl" => "__builtin_ve_vl_vfmkwge_mvl",
+    "llvm.ve.vl.vfmkwge.mvml" => "__builtin_ve_vl_vfmkwge_mvml",
+    "llvm.ve.vl.vfmkwgenan.mvl" => "__builtin_ve_vl_vfmkwgenan_mvl",
+    "llvm.ve.vl.vfmkwgenan.mvml" => "__builtin_ve_vl_vfmkwgenan_mvml",
+    "llvm.ve.vl.vfmkwgt.mvl" => "__builtin_ve_vl_vfmkwgt_mvl",
+    "llvm.ve.vl.vfmkwgt.mvml" => "__builtin_ve_vl_vfmkwgt_mvml",
+    "llvm.ve.vl.vfmkwgtnan.mvl" => "__builtin_ve_vl_vfmkwgtnan_mvl",
+    "llvm.ve.vl.vfmkwgtnan.mvml" => "__builtin_ve_vl_vfmkwgtnan_mvml",
+    "llvm.ve.vl.vfmkwle.mvl" => "__builtin_ve_vl_vfmkwle_mvl",
+    "llvm.ve.vl.vfmkwle.mvml" => "__builtin_ve_vl_vfmkwle_mvml",
+    "llvm.ve.vl.vfmkwlenan.mvl" => "__builtin_ve_vl_vfmkwlenan_mvl",
+    "llvm.ve.vl.vfmkwlenan.mvml" => "__builtin_ve_vl_vfmkwlenan_mvml",
+    "llvm.ve.vl.vfmkwlt.mvl" => "__builtin_ve_vl_vfmkwlt_mvl",
+    "llvm.ve.vl.vfmkwlt.mvml" => "__builtin_ve_vl_vfmkwlt_mvml",
+    "llvm.ve.vl.vfmkwltnan.mvl" => "__builtin_ve_vl_vfmkwltnan_mvl",
+    "llvm.ve.vl.vfmkwltnan.mvml" => "__builtin_ve_vl_vfmkwltnan_mvml",
+    "llvm.ve.vl.vfmkwnan.mvl" => "__builtin_ve_vl_vfmkwnan_mvl",
+    "llvm.ve.vl.vfmkwnan.mvml" => "__builtin_ve_vl_vfmkwnan_mvml",
+    "llvm.ve.vl.vfmkwne.mvl" => "__builtin_ve_vl_vfmkwne_mvl",
+    "llvm.ve.vl.vfmkwne.mvml" => "__builtin_ve_vl_vfmkwne_mvml",
+    "llvm.ve.vl.vfmkwnenan.mvl" => "__builtin_ve_vl_vfmkwnenan_mvl",
+    "llvm.ve.vl.vfmkwnenan.mvml" => "__builtin_ve_vl_vfmkwnenan_mvml",
+    "llvm.ve.vl.vfmkwnum.mvl" => "__builtin_ve_vl_vfmkwnum_mvl",
+    "llvm.ve.vl.vfmkwnum.mvml" => "__builtin_ve_vl_vfmkwnum_mvml",
+    "llvm.ve.vl.vfmsbd.vsvvl" => "__builtin_ve_vl_vfmsbd_vsvvl",
+    "llvm.ve.vl.vfmsbd.vsvvmvl" => "__builtin_ve_vl_vfmsbd_vsvvmvl",
+    "llvm.ve.vl.vfmsbd.vsvvvl" => "__builtin_ve_vl_vfmsbd_vsvvvl",
+    "llvm.ve.vl.vfmsbd.vvsvl" => "__builtin_ve_vl_vfmsbd_vvsvl",
+    "llvm.ve.vl.vfmsbd.vvsvmvl" => "__builtin_ve_vl_vfmsbd_vvsvmvl",
+    "llvm.ve.vl.vfmsbd.vvsvvl" => "__builtin_ve_vl_vfmsbd_vvsvvl",
+    "llvm.ve.vl.vfmsbd.vvvvl" => "__builtin_ve_vl_vfmsbd_vvvvl",
+    "llvm.ve.vl.vfmsbd.vvvvmvl" => "__builtin_ve_vl_vfmsbd_vvvvmvl",
+    "llvm.ve.vl.vfmsbd.vvvvvl" => "__builtin_ve_vl_vfmsbd_vvvvvl",
+    "llvm.ve.vl.vfmsbs.vsvvl" => "__builtin_ve_vl_vfmsbs_vsvvl",
+    "llvm.ve.vl.vfmsbs.vsvvmvl" => "__builtin_ve_vl_vfmsbs_vsvvmvl",
+    "llvm.ve.vl.vfmsbs.vsvvvl" => "__builtin_ve_vl_vfmsbs_vsvvvl",
+    "llvm.ve.vl.vfmsbs.vvsvl" => "__builtin_ve_vl_vfmsbs_vvsvl",
+    "llvm.ve.vl.vfmsbs.vvsvmvl" => "__builtin_ve_vl_vfmsbs_vvsvmvl",
+    "llvm.ve.vl.vfmsbs.vvsvvl" => "__builtin_ve_vl_vfmsbs_vvsvvl",
+    "llvm.ve.vl.vfmsbs.vvvvl" => "__builtin_ve_vl_vfmsbs_vvvvl",
+    "llvm.ve.vl.vfmsbs.vvvvmvl" => "__builtin_ve_vl_vfmsbs_vvvvmvl",
+    "llvm.ve.vl.vfmsbs.vvvvvl" => "__builtin_ve_vl_vfmsbs_vvvvvl",
+    "llvm.ve.vl.vfmuld.vsvl" => "__builtin_ve_vl_vfmuld_vsvl",
+    "llvm.ve.vl.vfmuld.vsvmvl" => "__builtin_ve_vl_vfmuld_vsvmvl",
+    "llvm.ve.vl.vfmuld.vsvvl" => "__builtin_ve_vl_vfmuld_vsvvl",
+    "llvm.ve.vl.vfmuld.vvvl" => "__builtin_ve_vl_vfmuld_vvvl",
+    "llvm.ve.vl.vfmuld.vvvmvl" => "__builtin_ve_vl_vfmuld_vvvmvl",
+    "llvm.ve.vl.vfmuld.vvvvl" => "__builtin_ve_vl_vfmuld_vvvvl",
+    "llvm.ve.vl.vfmuls.vsvl" => "__builtin_ve_vl_vfmuls_vsvl",
+    "llvm.ve.vl.vfmuls.vsvmvl" => "__builtin_ve_vl_vfmuls_vsvmvl",
+    "llvm.ve.vl.vfmuls.vsvvl" => "__builtin_ve_vl_vfmuls_vsvvl",
+    "llvm.ve.vl.vfmuls.vvvl" => "__builtin_ve_vl_vfmuls_vvvl",
+    "llvm.ve.vl.vfmuls.vvvmvl" => "__builtin_ve_vl_vfmuls_vvvmvl",
+    "llvm.ve.vl.vfmuls.vvvvl" => "__builtin_ve_vl_vfmuls_vvvvl",
+    "llvm.ve.vl.vfnmadd.vsvvl" => "__builtin_ve_vl_vfnmadd_vsvvl",
+    "llvm.ve.vl.vfnmadd.vsvvmvl" => "__builtin_ve_vl_vfnmadd_vsvvmvl",
+    "llvm.ve.vl.vfnmadd.vsvvvl" => "__builtin_ve_vl_vfnmadd_vsvvvl",
+    "llvm.ve.vl.vfnmadd.vvsvl" => "__builtin_ve_vl_vfnmadd_vvsvl",
+    "llvm.ve.vl.vfnmadd.vvsvmvl" => "__builtin_ve_vl_vfnmadd_vvsvmvl",
+    "llvm.ve.vl.vfnmadd.vvsvvl" => "__builtin_ve_vl_vfnmadd_vvsvvl",
+    "llvm.ve.vl.vfnmadd.vvvvl" => "__builtin_ve_vl_vfnmadd_vvvvl",
+    "llvm.ve.vl.vfnmadd.vvvvmvl" => "__builtin_ve_vl_vfnmadd_vvvvmvl",
+    "llvm.ve.vl.vfnmadd.vvvvvl" => "__builtin_ve_vl_vfnmadd_vvvvvl",
+    "llvm.ve.vl.vfnmads.vsvvl" => "__builtin_ve_vl_vfnmads_vsvvl",
+    "llvm.ve.vl.vfnmads.vsvvmvl" => "__builtin_ve_vl_vfnmads_vsvvmvl",
+    "llvm.ve.vl.vfnmads.vsvvvl" => "__builtin_ve_vl_vfnmads_vsvvvl",
+    "llvm.ve.vl.vfnmads.vvsvl" => "__builtin_ve_vl_vfnmads_vvsvl",
+    "llvm.ve.vl.vfnmads.vvsvmvl" => "__builtin_ve_vl_vfnmads_vvsvmvl",
+    "llvm.ve.vl.vfnmads.vvsvvl" => "__builtin_ve_vl_vfnmads_vvsvvl",
+    "llvm.ve.vl.vfnmads.vvvvl" => "__builtin_ve_vl_vfnmads_vvvvl",
+    "llvm.ve.vl.vfnmads.vvvvmvl" => "__builtin_ve_vl_vfnmads_vvvvmvl",
+    "llvm.ve.vl.vfnmads.vvvvvl" => "__builtin_ve_vl_vfnmads_vvvvvl",
+    "llvm.ve.vl.vfnmsbd.vsvvl" => "__builtin_ve_vl_vfnmsbd_vsvvl",
+    "llvm.ve.vl.vfnmsbd.vsvvmvl" => "__builtin_ve_vl_vfnmsbd_vsvvmvl",
+    "llvm.ve.vl.vfnmsbd.vsvvvl" => "__builtin_ve_vl_vfnmsbd_vsvvvl",
+    "llvm.ve.vl.vfnmsbd.vvsvl" => "__builtin_ve_vl_vfnmsbd_vvsvl",
+    "llvm.ve.vl.vfnmsbd.vvsvmvl" => "__builtin_ve_vl_vfnmsbd_vvsvmvl",
+    "llvm.ve.vl.vfnmsbd.vvsvvl" => "__builtin_ve_vl_vfnmsbd_vvsvvl",
+    "llvm.ve.vl.vfnmsbd.vvvvl" => "__builtin_ve_vl_vfnmsbd_vvvvl",
+    "llvm.ve.vl.vfnmsbd.vvvvmvl" => "__builtin_ve_vl_vfnmsbd_vvvvmvl",
+    "llvm.ve.vl.vfnmsbd.vvvvvl" => "__builtin_ve_vl_vfnmsbd_vvvvvl",
+    "llvm.ve.vl.vfnmsbs.vsvvl" => "__builtin_ve_vl_vfnmsbs_vsvvl",
+    "llvm.ve.vl.vfnmsbs.vsvvmvl" => "__builtin_ve_vl_vfnmsbs_vsvvmvl",
+    "llvm.ve.vl.vfnmsbs.vsvvvl" => "__builtin_ve_vl_vfnmsbs_vsvvvl",
+    "llvm.ve.vl.vfnmsbs.vvsvl" => "__builtin_ve_vl_vfnmsbs_vvsvl",
+    "llvm.ve.vl.vfnmsbs.vvsvmvl" => "__builtin_ve_vl_vfnmsbs_vvsvmvl",
+    "llvm.ve.vl.vfnmsbs.vvsvvl" => "__builtin_ve_vl_vfnmsbs_vvsvvl",
+    "llvm.ve.vl.vfnmsbs.vvvvl" => "__builtin_ve_vl_vfnmsbs_vvvvl",
+    "llvm.ve.vl.vfnmsbs.vvvvmvl" => "__builtin_ve_vl_vfnmsbs_vvvvmvl",
+    "llvm.ve.vl.vfnmsbs.vvvvvl" => "__builtin_ve_vl_vfnmsbs_vvvvvl",
+    "llvm.ve.vl.vfrmaxdfst.vvl" => "__builtin_ve_vl_vfrmaxdfst_vvl",
+    "llvm.ve.vl.vfrmaxdfst.vvvl" => "__builtin_ve_vl_vfrmaxdfst_vvvl",
+    "llvm.ve.vl.vfrmaxdlst.vvl" => "__builtin_ve_vl_vfrmaxdlst_vvl",
+    "llvm.ve.vl.vfrmaxdlst.vvvl" => "__builtin_ve_vl_vfrmaxdlst_vvvl",
+    "llvm.ve.vl.vfrmaxsfst.vvl" => "__builtin_ve_vl_vfrmaxsfst_vvl",
+    "llvm.ve.vl.vfrmaxsfst.vvvl" => "__builtin_ve_vl_vfrmaxsfst_vvvl",
+    "llvm.ve.vl.vfrmaxslst.vvl" => "__builtin_ve_vl_vfrmaxslst_vvl",
+    "llvm.ve.vl.vfrmaxslst.vvvl" => "__builtin_ve_vl_vfrmaxslst_vvvl",
+    "llvm.ve.vl.vfrmindfst.vvl" => "__builtin_ve_vl_vfrmindfst_vvl",
+    "llvm.ve.vl.vfrmindfst.vvvl" => "__builtin_ve_vl_vfrmindfst_vvvl",
+    "llvm.ve.vl.vfrmindlst.vvl" => "__builtin_ve_vl_vfrmindlst_vvl",
+    "llvm.ve.vl.vfrmindlst.vvvl" => "__builtin_ve_vl_vfrmindlst_vvvl",
+    "llvm.ve.vl.vfrminsfst.vvl" => "__builtin_ve_vl_vfrminsfst_vvl",
+    "llvm.ve.vl.vfrminsfst.vvvl" => "__builtin_ve_vl_vfrminsfst_vvvl",
+    "llvm.ve.vl.vfrminslst.vvl" => "__builtin_ve_vl_vfrminslst_vvl",
+    "llvm.ve.vl.vfrminslst.vvvl" => "__builtin_ve_vl_vfrminslst_vvvl",
+    "llvm.ve.vl.vfsqrtd.vvl" => "__builtin_ve_vl_vfsqrtd_vvl",
+    "llvm.ve.vl.vfsqrtd.vvvl" => "__builtin_ve_vl_vfsqrtd_vvvl",
+    "llvm.ve.vl.vfsqrts.vvl" => "__builtin_ve_vl_vfsqrts_vvl",
+    "llvm.ve.vl.vfsqrts.vvvl" => "__builtin_ve_vl_vfsqrts_vvvl",
+    "llvm.ve.vl.vfsubd.vsvl" => "__builtin_ve_vl_vfsubd_vsvl",
+    "llvm.ve.vl.vfsubd.vsvmvl" => "__builtin_ve_vl_vfsubd_vsvmvl",
+    "llvm.ve.vl.vfsubd.vsvvl" => "__builtin_ve_vl_vfsubd_vsvvl",
+    "llvm.ve.vl.vfsubd.vvvl" => "__builtin_ve_vl_vfsubd_vvvl",
+    "llvm.ve.vl.vfsubd.vvvmvl" => "__builtin_ve_vl_vfsubd_vvvmvl",
+    "llvm.ve.vl.vfsubd.vvvvl" => "__builtin_ve_vl_vfsubd_vvvvl",
+    "llvm.ve.vl.vfsubs.vsvl" => "__builtin_ve_vl_vfsubs_vsvl",
+    "llvm.ve.vl.vfsubs.vsvmvl" => "__builtin_ve_vl_vfsubs_vsvmvl",
+    "llvm.ve.vl.vfsubs.vsvvl" => "__builtin_ve_vl_vfsubs_vsvvl",
+    "llvm.ve.vl.vfsubs.vvvl" => "__builtin_ve_vl_vfsubs_vvvl",
+    "llvm.ve.vl.vfsubs.vvvmvl" => "__builtin_ve_vl_vfsubs_vvvmvl",
+    "llvm.ve.vl.vfsubs.vvvvl" => "__builtin_ve_vl_vfsubs_vvvvl",
+    "llvm.ve.vl.vfsumd.vvl" => "__builtin_ve_vl_vfsumd_vvl",
+    "llvm.ve.vl.vfsumd.vvml" => "__builtin_ve_vl_vfsumd_vvml",
+    "llvm.ve.vl.vfsums.vvl" => "__builtin_ve_vl_vfsums_vvl",
+    "llvm.ve.vl.vfsums.vvml" => "__builtin_ve_vl_vfsums_vvml",
+    "llvm.ve.vl.vgt.vvssl" => "__builtin_ve_vl_vgt_vvssl",
+    "llvm.ve.vl.vgt.vvssml" => "__builtin_ve_vl_vgt_vvssml",
+    "llvm.ve.vl.vgt.vvssmvl" => "__builtin_ve_vl_vgt_vvssmvl",
+    "llvm.ve.vl.vgt.vvssvl" => "__builtin_ve_vl_vgt_vvssvl",
+    "llvm.ve.vl.vgtlsx.vvssl" => "__builtin_ve_vl_vgtlsx_vvssl",
+    "llvm.ve.vl.vgtlsx.vvssml" => "__builtin_ve_vl_vgtlsx_vvssml",
+    "llvm.ve.vl.vgtlsx.vvssmvl" => "__builtin_ve_vl_vgtlsx_vvssmvl",
+    "llvm.ve.vl.vgtlsx.vvssvl" => "__builtin_ve_vl_vgtlsx_vvssvl",
+    "llvm.ve.vl.vgtlsxnc.vvssl" => "__builtin_ve_vl_vgtlsxnc_vvssl",
+    "llvm.ve.vl.vgtlsxnc.vvssml" => "__builtin_ve_vl_vgtlsxnc_vvssml",
+    "llvm.ve.vl.vgtlsxnc.vvssmvl" => "__builtin_ve_vl_vgtlsxnc_vvssmvl",
+    "llvm.ve.vl.vgtlsxnc.vvssvl" => "__builtin_ve_vl_vgtlsxnc_vvssvl",
+    "llvm.ve.vl.vgtlzx.vvssl" => "__builtin_ve_vl_vgtlzx_vvssl",
+    "llvm.ve.vl.vgtlzx.vvssml" => "__builtin_ve_vl_vgtlzx_vvssml",
+    "llvm.ve.vl.vgtlzx.vvssmvl" => "__builtin_ve_vl_vgtlzx_vvssmvl",
+    "llvm.ve.vl.vgtlzx.vvssvl" => "__builtin_ve_vl_vgtlzx_vvssvl",
+    "llvm.ve.vl.vgtlzxnc.vvssl" => "__builtin_ve_vl_vgtlzxnc_vvssl",
+    "llvm.ve.vl.vgtlzxnc.vvssml" => "__builtin_ve_vl_vgtlzxnc_vvssml",
+    "llvm.ve.vl.vgtlzxnc.vvssmvl" => "__builtin_ve_vl_vgtlzxnc_vvssmvl",
+    "llvm.ve.vl.vgtlzxnc.vvssvl" => "__builtin_ve_vl_vgtlzxnc_vvssvl",
+    "llvm.ve.vl.vgtnc.vvssl" => "__builtin_ve_vl_vgtnc_vvssl",
+    "llvm.ve.vl.vgtnc.vvssml" => "__builtin_ve_vl_vgtnc_vvssml",
+    "llvm.ve.vl.vgtnc.vvssmvl" => "__builtin_ve_vl_vgtnc_vvssmvl",
+    "llvm.ve.vl.vgtnc.vvssvl" => "__builtin_ve_vl_vgtnc_vvssvl",
+    "llvm.ve.vl.vgtu.vvssl" => "__builtin_ve_vl_vgtu_vvssl",
+    "llvm.ve.vl.vgtu.vvssml" => "__builtin_ve_vl_vgtu_vvssml",
+    "llvm.ve.vl.vgtu.vvssmvl" => "__builtin_ve_vl_vgtu_vvssmvl",
+    "llvm.ve.vl.vgtu.vvssvl" => "__builtin_ve_vl_vgtu_vvssvl",
+    "llvm.ve.vl.vgtunc.vvssl" => "__builtin_ve_vl_vgtunc_vvssl",
+    "llvm.ve.vl.vgtunc.vvssml" => "__builtin_ve_vl_vgtunc_vvssml",
+    "llvm.ve.vl.vgtunc.vvssmvl" => "__builtin_ve_vl_vgtunc_vvssmvl",
+    "llvm.ve.vl.vgtunc.vvssvl" => "__builtin_ve_vl_vgtunc_vvssvl",
+    "llvm.ve.vl.vld.vssl" => "__builtin_ve_vl_vld_vssl",
+    "llvm.ve.vl.vld.vssvl" => "__builtin_ve_vl_vld_vssvl",
+    "llvm.ve.vl.vld2d.vssl" => "__builtin_ve_vl_vld2d_vssl",
+    "llvm.ve.vl.vld2d.vssvl" => "__builtin_ve_vl_vld2d_vssvl",
+    "llvm.ve.vl.vld2dnc.vssl" => "__builtin_ve_vl_vld2dnc_vssl",
+    "llvm.ve.vl.vld2dnc.vssvl" => "__builtin_ve_vl_vld2dnc_vssvl",
+    "llvm.ve.vl.vldl2dsx.vssl" => "__builtin_ve_vl_vldl2dsx_vssl",
+    "llvm.ve.vl.vldl2dsx.vssvl" => "__builtin_ve_vl_vldl2dsx_vssvl",
+    "llvm.ve.vl.vldl2dsxnc.vssl" => "__builtin_ve_vl_vldl2dsxnc_vssl",
+    "llvm.ve.vl.vldl2dsxnc.vssvl" => "__builtin_ve_vl_vldl2dsxnc_vssvl",
+    "llvm.ve.vl.vldl2dzx.vssl" => "__builtin_ve_vl_vldl2dzx_vssl",
+    "llvm.ve.vl.vldl2dzx.vssvl" => "__builtin_ve_vl_vldl2dzx_vssvl",
+    "llvm.ve.vl.vldl2dzxnc.vssl" => "__builtin_ve_vl_vldl2dzxnc_vssl",
+    "llvm.ve.vl.vldl2dzxnc.vssvl" => "__builtin_ve_vl_vldl2dzxnc_vssvl",
+    "llvm.ve.vl.vldlsx.vssl" => "__builtin_ve_vl_vldlsx_vssl",
+    "llvm.ve.vl.vldlsx.vssvl" => "__builtin_ve_vl_vldlsx_vssvl",
+    "llvm.ve.vl.vldlsxnc.vssl" => "__builtin_ve_vl_vldlsxnc_vssl",
+    "llvm.ve.vl.vldlsxnc.vssvl" => "__builtin_ve_vl_vldlsxnc_vssvl",
+    "llvm.ve.vl.vldlzx.vssl" => "__builtin_ve_vl_vldlzx_vssl",
+    "llvm.ve.vl.vldlzx.vssvl" => "__builtin_ve_vl_vldlzx_vssvl",
+    "llvm.ve.vl.vldlzxnc.vssl" => "__builtin_ve_vl_vldlzxnc_vssl",
+    "llvm.ve.vl.vldlzxnc.vssvl" => "__builtin_ve_vl_vldlzxnc_vssvl",
+    "llvm.ve.vl.vldnc.vssl" => "__builtin_ve_vl_vldnc_vssl",
+    "llvm.ve.vl.vldnc.vssvl" => "__builtin_ve_vl_vldnc_vssvl",
+    "llvm.ve.vl.vldu.vssl" => "__builtin_ve_vl_vldu_vssl",
+    "llvm.ve.vl.vldu.vssvl" => "__builtin_ve_vl_vldu_vssvl",
+    "llvm.ve.vl.vldu2d.vssl" => "__builtin_ve_vl_vldu2d_vssl",
+    "llvm.ve.vl.vldu2d.vssvl" => "__builtin_ve_vl_vldu2d_vssvl",
+    "llvm.ve.vl.vldu2dnc.vssl" => "__builtin_ve_vl_vldu2dnc_vssl",
+    "llvm.ve.vl.vldu2dnc.vssvl" => "__builtin_ve_vl_vldu2dnc_vssvl",
+    "llvm.ve.vl.vldunc.vssl" => "__builtin_ve_vl_vldunc_vssl",
+    "llvm.ve.vl.vldunc.vssvl" => "__builtin_ve_vl_vldunc_vssvl",
+    "llvm.ve.vl.vldz.vvl" => "__builtin_ve_vl_vldz_vvl",
+    "llvm.ve.vl.vldz.vvmvl" => "__builtin_ve_vl_vldz_vvmvl",
+    "llvm.ve.vl.vldz.vvvl" => "__builtin_ve_vl_vldz_vvvl",
+    "llvm.ve.vl.vmaxsl.vsvl" => "__builtin_ve_vl_vmaxsl_vsvl",
+    "llvm.ve.vl.vmaxsl.vsvmvl" => "__builtin_ve_vl_vmaxsl_vsvmvl",
+    "llvm.ve.vl.vmaxsl.vsvvl" => "__builtin_ve_vl_vmaxsl_vsvvl",
+    "llvm.ve.vl.vmaxsl.vvvl" => "__builtin_ve_vl_vmaxsl_vvvl",
+    "llvm.ve.vl.vmaxsl.vvvmvl" => "__builtin_ve_vl_vmaxsl_vvvmvl",
+    "llvm.ve.vl.vmaxsl.vvvvl" => "__builtin_ve_vl_vmaxsl_vvvvl",
+    "llvm.ve.vl.vmaxswsx.vsvl" => "__builtin_ve_vl_vmaxswsx_vsvl",
+    "llvm.ve.vl.vmaxswsx.vsvmvl" => "__builtin_ve_vl_vmaxswsx_vsvmvl",
+    "llvm.ve.vl.vmaxswsx.vsvvl" => "__builtin_ve_vl_vmaxswsx_vsvvl",
+    "llvm.ve.vl.vmaxswsx.vvvl" => "__builtin_ve_vl_vmaxswsx_vvvl",
+    "llvm.ve.vl.vmaxswsx.vvvmvl" => "__builtin_ve_vl_vmaxswsx_vvvmvl",
+    "llvm.ve.vl.vmaxswsx.vvvvl" => "__builtin_ve_vl_vmaxswsx_vvvvl",
+    "llvm.ve.vl.vmaxswzx.vsvl" => "__builtin_ve_vl_vmaxswzx_vsvl",
+    "llvm.ve.vl.vmaxswzx.vsvmvl" => "__builtin_ve_vl_vmaxswzx_vsvmvl",
+    "llvm.ve.vl.vmaxswzx.vsvvl" => "__builtin_ve_vl_vmaxswzx_vsvvl",
+    "llvm.ve.vl.vmaxswzx.vvvl" => "__builtin_ve_vl_vmaxswzx_vvvl",
+    "llvm.ve.vl.vmaxswzx.vvvmvl" => "__builtin_ve_vl_vmaxswzx_vvvmvl",
+    "llvm.ve.vl.vmaxswzx.vvvvl" => "__builtin_ve_vl_vmaxswzx_vvvvl",
+    "llvm.ve.vl.vminsl.vsvl" => "__builtin_ve_vl_vminsl_vsvl",
+    "llvm.ve.vl.vminsl.vsvmvl" => "__builtin_ve_vl_vminsl_vsvmvl",
+    "llvm.ve.vl.vminsl.vsvvl" => "__builtin_ve_vl_vminsl_vsvvl",
+    "llvm.ve.vl.vminsl.vvvl" => "__builtin_ve_vl_vminsl_vvvl",
+    "llvm.ve.vl.vminsl.vvvmvl" => "__builtin_ve_vl_vminsl_vvvmvl",
+    "llvm.ve.vl.vminsl.vvvvl" => "__builtin_ve_vl_vminsl_vvvvl",
+    "llvm.ve.vl.vminswsx.vsvl" => "__builtin_ve_vl_vminswsx_vsvl",
+    "llvm.ve.vl.vminswsx.vsvmvl" => "__builtin_ve_vl_vminswsx_vsvmvl",
+    "llvm.ve.vl.vminswsx.vsvvl" => "__builtin_ve_vl_vminswsx_vsvvl",
+    "llvm.ve.vl.vminswsx.vvvl" => "__builtin_ve_vl_vminswsx_vvvl",
+    "llvm.ve.vl.vminswsx.vvvmvl" => "__builtin_ve_vl_vminswsx_vvvmvl",
+    "llvm.ve.vl.vminswsx.vvvvl" => "__builtin_ve_vl_vminswsx_vvvvl",
+    "llvm.ve.vl.vminswzx.vsvl" => "__builtin_ve_vl_vminswzx_vsvl",
+    "llvm.ve.vl.vminswzx.vsvmvl" => "__builtin_ve_vl_vminswzx_vsvmvl",
+    "llvm.ve.vl.vminswzx.vsvvl" => "__builtin_ve_vl_vminswzx_vsvvl",
+    "llvm.ve.vl.vminswzx.vvvl" => "__builtin_ve_vl_vminswzx_vvvl",
+    "llvm.ve.vl.vminswzx.vvvmvl" => "__builtin_ve_vl_vminswzx_vvvmvl",
+    "llvm.ve.vl.vminswzx.vvvvl" => "__builtin_ve_vl_vminswzx_vvvvl",
+    "llvm.ve.vl.vmrg.vsvml" => "__builtin_ve_vl_vmrg_vsvml",
+    "llvm.ve.vl.vmrg.vsvmvl" => "__builtin_ve_vl_vmrg_vsvmvl",
+    "llvm.ve.vl.vmrg.vvvml" => "__builtin_ve_vl_vmrg_vvvml",
+    "llvm.ve.vl.vmrg.vvvmvl" => "__builtin_ve_vl_vmrg_vvvmvl",
+    "llvm.ve.vl.vmrgw.vsvMl" => "__builtin_ve_vl_vmrgw_vsvMl",
+    "llvm.ve.vl.vmrgw.vsvMvl" => "__builtin_ve_vl_vmrgw_vsvMvl",
+    "llvm.ve.vl.vmrgw.vvvMl" => "__builtin_ve_vl_vmrgw_vvvMl",
+    "llvm.ve.vl.vmrgw.vvvMvl" => "__builtin_ve_vl_vmrgw_vvvMvl",
+    "llvm.ve.vl.vmulsl.vsvl" => "__builtin_ve_vl_vmulsl_vsvl",
+    "llvm.ve.vl.vmulsl.vsvmvl" => "__builtin_ve_vl_vmulsl_vsvmvl",
+    "llvm.ve.vl.vmulsl.vsvvl" => "__builtin_ve_vl_vmulsl_vsvvl",
+    "llvm.ve.vl.vmulsl.vvvl" => "__builtin_ve_vl_vmulsl_vvvl",
+    "llvm.ve.vl.vmulsl.vvvmvl" => "__builtin_ve_vl_vmulsl_vvvmvl",
+    "llvm.ve.vl.vmulsl.vvvvl" => "__builtin_ve_vl_vmulsl_vvvvl",
+    "llvm.ve.vl.vmulslw.vsvl" => "__builtin_ve_vl_vmulslw_vsvl",
+    "llvm.ve.vl.vmulslw.vsvvl" => "__builtin_ve_vl_vmulslw_vsvvl",
+    "llvm.ve.vl.vmulslw.vvvl" => "__builtin_ve_vl_vmulslw_vvvl",
+    "llvm.ve.vl.vmulslw.vvvvl" => "__builtin_ve_vl_vmulslw_vvvvl",
+    "llvm.ve.vl.vmulswsx.vsvl" => "__builtin_ve_vl_vmulswsx_vsvl",
+    "llvm.ve.vl.vmulswsx.vsvmvl" => "__builtin_ve_vl_vmulswsx_vsvmvl",
+    "llvm.ve.vl.vmulswsx.vsvvl" => "__builtin_ve_vl_vmulswsx_vsvvl",
+    "llvm.ve.vl.vmulswsx.vvvl" => "__builtin_ve_vl_vmulswsx_vvvl",
+    "llvm.ve.vl.vmulswsx.vvvmvl" => "__builtin_ve_vl_vmulswsx_vvvmvl",
+    "llvm.ve.vl.vmulswsx.vvvvl" => "__builtin_ve_vl_vmulswsx_vvvvl",
+    "llvm.ve.vl.vmulswzx.vsvl" => "__builtin_ve_vl_vmulswzx_vsvl",
+    "llvm.ve.vl.vmulswzx.vsvmvl" => "__builtin_ve_vl_vmulswzx_vsvmvl",
+    "llvm.ve.vl.vmulswzx.vsvvl" => "__builtin_ve_vl_vmulswzx_vsvvl",
+    "llvm.ve.vl.vmulswzx.vvvl" => "__builtin_ve_vl_vmulswzx_vvvl",
+    "llvm.ve.vl.vmulswzx.vvvmvl" => "__builtin_ve_vl_vmulswzx_vvvmvl",
+    "llvm.ve.vl.vmulswzx.vvvvl" => "__builtin_ve_vl_vmulswzx_vvvvl",
+    "llvm.ve.vl.vmulul.vsvl" => "__builtin_ve_vl_vmulul_vsvl",
+    "llvm.ve.vl.vmulul.vsvmvl" => "__builtin_ve_vl_vmulul_vsvmvl",
+    "llvm.ve.vl.vmulul.vsvvl" => "__builtin_ve_vl_vmulul_vsvvl",
+    "llvm.ve.vl.vmulul.vvvl" => "__builtin_ve_vl_vmulul_vvvl",
+    "llvm.ve.vl.vmulul.vvvmvl" => "__builtin_ve_vl_vmulul_vvvmvl",
+    "llvm.ve.vl.vmulul.vvvvl" => "__builtin_ve_vl_vmulul_vvvvl",
+    "llvm.ve.vl.vmuluw.vsvl" => "__builtin_ve_vl_vmuluw_vsvl",
+    "llvm.ve.vl.vmuluw.vsvmvl" => "__builtin_ve_vl_vmuluw_vsvmvl",
+    "llvm.ve.vl.vmuluw.vsvvl" => "__builtin_ve_vl_vmuluw_vsvvl",
+    "llvm.ve.vl.vmuluw.vvvl" => "__builtin_ve_vl_vmuluw_vvvl",
+    "llvm.ve.vl.vmuluw.vvvmvl" => "__builtin_ve_vl_vmuluw_vvvmvl",
+    "llvm.ve.vl.vmuluw.vvvvl" => "__builtin_ve_vl_vmuluw_vvvvl",
+    "llvm.ve.vl.vmv.vsvl" => "__builtin_ve_vl_vmv_vsvl",
+    "llvm.ve.vl.vmv.vsvmvl" => "__builtin_ve_vl_vmv_vsvmvl",
+    "llvm.ve.vl.vmv.vsvvl" => "__builtin_ve_vl_vmv_vsvvl",
+    "llvm.ve.vl.vor.vsvl" => "__builtin_ve_vl_vor_vsvl",
+    "llvm.ve.vl.vor.vsvmvl" => "__builtin_ve_vl_vor_vsvmvl",
+    "llvm.ve.vl.vor.vsvvl" => "__builtin_ve_vl_vor_vsvvl",
+    "llvm.ve.vl.vor.vvvl" => "__builtin_ve_vl_vor_vvvl",
+    "llvm.ve.vl.vor.vvvmvl" => "__builtin_ve_vl_vor_vvvmvl",
+    "llvm.ve.vl.vor.vvvvl" => "__builtin_ve_vl_vor_vvvvl",
+    "llvm.ve.vl.vpcnt.vvl" => "__builtin_ve_vl_vpcnt_vvl",
+    "llvm.ve.vl.vpcnt.vvmvl" => "__builtin_ve_vl_vpcnt_vvmvl",
+    "llvm.ve.vl.vpcnt.vvvl" => "__builtin_ve_vl_vpcnt_vvvl",
+    "llvm.ve.vl.vrand.vvl" => "__builtin_ve_vl_vrand_vvl",
+    "llvm.ve.vl.vrand.vvml" => "__builtin_ve_vl_vrand_vvml",
+    "llvm.ve.vl.vrcpd.vvl" => "__builtin_ve_vl_vrcpd_vvl",
+    "llvm.ve.vl.vrcpd.vvvl" => "__builtin_ve_vl_vrcpd_vvvl",
+    "llvm.ve.vl.vrcps.vvl" => "__builtin_ve_vl_vrcps_vvl",
+    "llvm.ve.vl.vrcps.vvvl" => "__builtin_ve_vl_vrcps_vvvl",
+    "llvm.ve.vl.vrmaxslfst.vvl" => "__builtin_ve_vl_vrmaxslfst_vvl",
+    "llvm.ve.vl.vrmaxslfst.vvvl" => "__builtin_ve_vl_vrmaxslfst_vvvl",
+    "llvm.ve.vl.vrmaxsllst.vvl" => "__builtin_ve_vl_vrmaxsllst_vvl",
+    "llvm.ve.vl.vrmaxsllst.vvvl" => "__builtin_ve_vl_vrmaxsllst_vvvl",
+    "llvm.ve.vl.vrmaxswfstsx.vvl" => "__builtin_ve_vl_vrmaxswfstsx_vvl",
+    "llvm.ve.vl.vrmaxswfstsx.vvvl" => "__builtin_ve_vl_vrmaxswfstsx_vvvl",
+    "llvm.ve.vl.vrmaxswfstzx.vvl" => "__builtin_ve_vl_vrmaxswfstzx_vvl",
+    "llvm.ve.vl.vrmaxswfstzx.vvvl" => "__builtin_ve_vl_vrmaxswfstzx_vvvl",
+    "llvm.ve.vl.vrmaxswlstsx.vvl" => "__builtin_ve_vl_vrmaxswlstsx_vvl",
+    "llvm.ve.vl.vrmaxswlstsx.vvvl" => "__builtin_ve_vl_vrmaxswlstsx_vvvl",
+    "llvm.ve.vl.vrmaxswlstzx.vvl" => "__builtin_ve_vl_vrmaxswlstzx_vvl",
+    "llvm.ve.vl.vrmaxswlstzx.vvvl" => "__builtin_ve_vl_vrmaxswlstzx_vvvl",
+    "llvm.ve.vl.vrminslfst.vvl" => "__builtin_ve_vl_vrminslfst_vvl",
+    "llvm.ve.vl.vrminslfst.vvvl" => "__builtin_ve_vl_vrminslfst_vvvl",
+    "llvm.ve.vl.vrminsllst.vvl" => "__builtin_ve_vl_vrminsllst_vvl",
+    "llvm.ve.vl.vrminsllst.vvvl" => "__builtin_ve_vl_vrminsllst_vvvl",
+    "llvm.ve.vl.vrminswfstsx.vvl" => "__builtin_ve_vl_vrminswfstsx_vvl",
+    "llvm.ve.vl.vrminswfstsx.vvvl" => "__builtin_ve_vl_vrminswfstsx_vvvl",
+    "llvm.ve.vl.vrminswfstzx.vvl" => "__builtin_ve_vl_vrminswfstzx_vvl",
+    "llvm.ve.vl.vrminswfstzx.vvvl" => "__builtin_ve_vl_vrminswfstzx_vvvl",
+    "llvm.ve.vl.vrminswlstsx.vvl" => "__builtin_ve_vl_vrminswlstsx_vvl",
+    "llvm.ve.vl.vrminswlstsx.vvvl" => "__builtin_ve_vl_vrminswlstsx_vvvl",
+    "llvm.ve.vl.vrminswlstzx.vvl" => "__builtin_ve_vl_vrminswlstzx_vvl",
+    "llvm.ve.vl.vrminswlstzx.vvvl" => "__builtin_ve_vl_vrminswlstzx_vvvl",
+    "llvm.ve.vl.vror.vvl" => "__builtin_ve_vl_vror_vvl",
+    "llvm.ve.vl.vror.vvml" => "__builtin_ve_vl_vror_vvml",
+    "llvm.ve.vl.vrsqrtd.vvl" => "__builtin_ve_vl_vrsqrtd_vvl",
+    "llvm.ve.vl.vrsqrtd.vvvl" => "__builtin_ve_vl_vrsqrtd_vvvl",
+    "llvm.ve.vl.vrsqrtdnex.vvl" => "__builtin_ve_vl_vrsqrtdnex_vvl",
+    "llvm.ve.vl.vrsqrtdnex.vvvl" => "__builtin_ve_vl_vrsqrtdnex_vvvl",
+    "llvm.ve.vl.vrsqrts.vvl" => "__builtin_ve_vl_vrsqrts_vvl",
+    "llvm.ve.vl.vrsqrts.vvvl" => "__builtin_ve_vl_vrsqrts_vvvl",
+    "llvm.ve.vl.vrsqrtsnex.vvl" => "__builtin_ve_vl_vrsqrtsnex_vvl",
+    "llvm.ve.vl.vrsqrtsnex.vvvl" => "__builtin_ve_vl_vrsqrtsnex_vvvl",
+    "llvm.ve.vl.vrxor.vvl" => "__builtin_ve_vl_vrxor_vvl",
+    "llvm.ve.vl.vrxor.vvml" => "__builtin_ve_vl_vrxor_vvml",
+    "llvm.ve.vl.vsc.vvssl" => "__builtin_ve_vl_vsc_vvssl",
+    "llvm.ve.vl.vsc.vvssml" => "__builtin_ve_vl_vsc_vvssml",
+    "llvm.ve.vl.vscl.vvssl" => "__builtin_ve_vl_vscl_vvssl",
+    "llvm.ve.vl.vscl.vvssml" => "__builtin_ve_vl_vscl_vvssml",
+    "llvm.ve.vl.vsclnc.vvssl" => "__builtin_ve_vl_vsclnc_vvssl",
+    "llvm.ve.vl.vsclnc.vvssml" => "__builtin_ve_vl_vsclnc_vvssml",
+    "llvm.ve.vl.vsclncot.vvssl" => "__builtin_ve_vl_vsclncot_vvssl",
+    "llvm.ve.vl.vsclncot.vvssml" => "__builtin_ve_vl_vsclncot_vvssml",
+    "llvm.ve.vl.vsclot.vvssl" => "__builtin_ve_vl_vsclot_vvssl",
+    "llvm.ve.vl.vsclot.vvssml" => "__builtin_ve_vl_vsclot_vvssml",
+    "llvm.ve.vl.vscnc.vvssl" => "__builtin_ve_vl_vscnc_vvssl",
+    "llvm.ve.vl.vscnc.vvssml" => "__builtin_ve_vl_vscnc_vvssml",
+    "llvm.ve.vl.vscncot.vvssl" => "__builtin_ve_vl_vscncot_vvssl",
+    "llvm.ve.vl.vscncot.vvssml" => "__builtin_ve_vl_vscncot_vvssml",
+    "llvm.ve.vl.vscot.vvssl" => "__builtin_ve_vl_vscot_vvssl",
+    "llvm.ve.vl.vscot.vvssml" => "__builtin_ve_vl_vscot_vvssml",
+    "llvm.ve.vl.vscu.vvssl" => "__builtin_ve_vl_vscu_vvssl",
+    "llvm.ve.vl.vscu.vvssml" => "__builtin_ve_vl_vscu_vvssml",
+    "llvm.ve.vl.vscunc.vvssl" => "__builtin_ve_vl_vscunc_vvssl",
+    "llvm.ve.vl.vscunc.vvssml" => "__builtin_ve_vl_vscunc_vvssml",
+    "llvm.ve.vl.vscuncot.vvssl" => "__builtin_ve_vl_vscuncot_vvssl",
+    "llvm.ve.vl.vscuncot.vvssml" => "__builtin_ve_vl_vscuncot_vvssml",
+    "llvm.ve.vl.vscuot.vvssl" => "__builtin_ve_vl_vscuot_vvssl",
+    "llvm.ve.vl.vscuot.vvssml" => "__builtin_ve_vl_vscuot_vvssml",
+    "llvm.ve.vl.vseq.vl" => "__builtin_ve_vl_vseq_vl",
+    "llvm.ve.vl.vseq.vvl" => "__builtin_ve_vl_vseq_vvl",
+    "llvm.ve.vl.vsfa.vvssl" => "__builtin_ve_vl_vsfa_vvssl",
+    "llvm.ve.vl.vsfa.vvssmvl" => "__builtin_ve_vl_vsfa_vvssmvl",
+    "llvm.ve.vl.vsfa.vvssvl" => "__builtin_ve_vl_vsfa_vvssvl",
+    "llvm.ve.vl.vshf.vvvsl" => "__builtin_ve_vl_vshf_vvvsl",
+    "llvm.ve.vl.vshf.vvvsvl" => "__builtin_ve_vl_vshf_vvvsvl",
+    "llvm.ve.vl.vslal.vvsl" => "__builtin_ve_vl_vslal_vvsl",
+    "llvm.ve.vl.vslal.vvsmvl" => "__builtin_ve_vl_vslal_vvsmvl",
+    "llvm.ve.vl.vslal.vvsvl" => "__builtin_ve_vl_vslal_vvsvl",
+    "llvm.ve.vl.vslal.vvvl" => "__builtin_ve_vl_vslal_vvvl",
+    "llvm.ve.vl.vslal.vvvmvl" => "__builtin_ve_vl_vslal_vvvmvl",
+    "llvm.ve.vl.vslal.vvvvl" => "__builtin_ve_vl_vslal_vvvvl",
+    "llvm.ve.vl.vslawsx.vvsl" => "__builtin_ve_vl_vslawsx_vvsl",
+    "llvm.ve.vl.vslawsx.vvsmvl" => "__builtin_ve_vl_vslawsx_vvsmvl",
+    "llvm.ve.vl.vslawsx.vvsvl" => "__builtin_ve_vl_vslawsx_vvsvl",
+    "llvm.ve.vl.vslawsx.vvvl" => "__builtin_ve_vl_vslawsx_vvvl",
+    "llvm.ve.vl.vslawsx.vvvmvl" => "__builtin_ve_vl_vslawsx_vvvmvl",
+    "llvm.ve.vl.vslawsx.vvvvl" => "__builtin_ve_vl_vslawsx_vvvvl",
+    "llvm.ve.vl.vslawzx.vvsl" => "__builtin_ve_vl_vslawzx_vvsl",
+    "llvm.ve.vl.vslawzx.vvsmvl" => "__builtin_ve_vl_vslawzx_vvsmvl",
+    "llvm.ve.vl.vslawzx.vvsvl" => "__builtin_ve_vl_vslawzx_vvsvl",
+    "llvm.ve.vl.vslawzx.vvvl" => "__builtin_ve_vl_vslawzx_vvvl",
+    "llvm.ve.vl.vslawzx.vvvmvl" => "__builtin_ve_vl_vslawzx_vvvmvl",
+    "llvm.ve.vl.vslawzx.vvvvl" => "__builtin_ve_vl_vslawzx_vvvvl",
+    "llvm.ve.vl.vsll.vvsl" => "__builtin_ve_vl_vsll_vvsl",
+    "llvm.ve.vl.vsll.vvsmvl" => "__builtin_ve_vl_vsll_vvsmvl",
+    "llvm.ve.vl.vsll.vvsvl" => "__builtin_ve_vl_vsll_vvsvl",
+    "llvm.ve.vl.vsll.vvvl" => "__builtin_ve_vl_vsll_vvvl",
+    "llvm.ve.vl.vsll.vvvmvl" => "__builtin_ve_vl_vsll_vvvmvl",
+    "llvm.ve.vl.vsll.vvvvl" => "__builtin_ve_vl_vsll_vvvvl",
+    "llvm.ve.vl.vsral.vvsl" => "__builtin_ve_vl_vsral_vvsl",
+    "llvm.ve.vl.vsral.vvsmvl" => "__builtin_ve_vl_vsral_vvsmvl",
+    "llvm.ve.vl.vsral.vvsvl" => "__builtin_ve_vl_vsral_vvsvl",
+    "llvm.ve.vl.vsral.vvvl" => "__builtin_ve_vl_vsral_vvvl",
+    "llvm.ve.vl.vsral.vvvmvl" => "__builtin_ve_vl_vsral_vvvmvl",
+    "llvm.ve.vl.vsral.vvvvl" => "__builtin_ve_vl_vsral_vvvvl",
+    "llvm.ve.vl.vsrawsx.vvsl" => "__builtin_ve_vl_vsrawsx_vvsl",
+    "llvm.ve.vl.vsrawsx.vvsmvl" => "__builtin_ve_vl_vsrawsx_vvsmvl",
+    "llvm.ve.vl.vsrawsx.vvsvl" => "__builtin_ve_vl_vsrawsx_vvsvl",
+    "llvm.ve.vl.vsrawsx.vvvl" => "__builtin_ve_vl_vsrawsx_vvvl",
+    "llvm.ve.vl.vsrawsx.vvvmvl" => "__builtin_ve_vl_vsrawsx_vvvmvl",
+    "llvm.ve.vl.vsrawsx.vvvvl" => "__builtin_ve_vl_vsrawsx_vvvvl",
+    "llvm.ve.vl.vsrawzx.vvsl" => "__builtin_ve_vl_vsrawzx_vvsl",
+    "llvm.ve.vl.vsrawzx.vvsmvl" => "__builtin_ve_vl_vsrawzx_vvsmvl",
+    "llvm.ve.vl.vsrawzx.vvsvl" => "__builtin_ve_vl_vsrawzx_vvsvl",
+    "llvm.ve.vl.vsrawzx.vvvl" => "__builtin_ve_vl_vsrawzx_vvvl",
+    "llvm.ve.vl.vsrawzx.vvvmvl" => "__builtin_ve_vl_vsrawzx_vvvmvl",
+    "llvm.ve.vl.vsrawzx.vvvvl" => "__builtin_ve_vl_vsrawzx_vvvvl",
+    "llvm.ve.vl.vsrl.vvsl" => "__builtin_ve_vl_vsrl_vvsl",
+    "llvm.ve.vl.vsrl.vvsmvl" => "__builtin_ve_vl_vsrl_vvsmvl",
+    "llvm.ve.vl.vsrl.vvsvl" => "__builtin_ve_vl_vsrl_vvsvl",
+    "llvm.ve.vl.vsrl.vvvl" => "__builtin_ve_vl_vsrl_vvvl",
+    "llvm.ve.vl.vsrl.vvvmvl" => "__builtin_ve_vl_vsrl_vvvmvl",
+    "llvm.ve.vl.vsrl.vvvvl" => "__builtin_ve_vl_vsrl_vvvvl",
+    "llvm.ve.vl.vst.vssl" => "__builtin_ve_vl_vst_vssl",
+    "llvm.ve.vl.vst.vssml" => "__builtin_ve_vl_vst_vssml",
+    "llvm.ve.vl.vst2d.vssl" => "__builtin_ve_vl_vst2d_vssl",
+    "llvm.ve.vl.vst2d.vssml" => "__builtin_ve_vl_vst2d_vssml",
+    "llvm.ve.vl.vst2dnc.vssl" => "__builtin_ve_vl_vst2dnc_vssl",
+    "llvm.ve.vl.vst2dnc.vssml" => "__builtin_ve_vl_vst2dnc_vssml",
+    "llvm.ve.vl.vst2dncot.vssl" => "__builtin_ve_vl_vst2dncot_vssl",
+    "llvm.ve.vl.vst2dncot.vssml" => "__builtin_ve_vl_vst2dncot_vssml",
+    "llvm.ve.vl.vst2dot.vssl" => "__builtin_ve_vl_vst2dot_vssl",
+    "llvm.ve.vl.vst2dot.vssml" => "__builtin_ve_vl_vst2dot_vssml",
+    "llvm.ve.vl.vstl.vssl" => "__builtin_ve_vl_vstl_vssl",
+    "llvm.ve.vl.vstl.vssml" => "__builtin_ve_vl_vstl_vssml",
+    "llvm.ve.vl.vstl2d.vssl" => "__builtin_ve_vl_vstl2d_vssl",
+    "llvm.ve.vl.vstl2d.vssml" => "__builtin_ve_vl_vstl2d_vssml",
+    "llvm.ve.vl.vstl2dnc.vssl" => "__builtin_ve_vl_vstl2dnc_vssl",
+    "llvm.ve.vl.vstl2dnc.vssml" => "__builtin_ve_vl_vstl2dnc_vssml",
+    "llvm.ve.vl.vstl2dncot.vssl" => "__builtin_ve_vl_vstl2dncot_vssl",
+    "llvm.ve.vl.vstl2dncot.vssml" => "__builtin_ve_vl_vstl2dncot_vssml",
+    "llvm.ve.vl.vstl2dot.vssl" => "__builtin_ve_vl_vstl2dot_vssl",
+    "llvm.ve.vl.vstl2dot.vssml" => "__builtin_ve_vl_vstl2dot_vssml",
+    "llvm.ve.vl.vstlnc.vssl" => "__builtin_ve_vl_vstlnc_vssl",
+    "llvm.ve.vl.vstlnc.vssml" => "__builtin_ve_vl_vstlnc_vssml",
+    "llvm.ve.vl.vstlncot.vssl" => "__builtin_ve_vl_vstlncot_vssl",
+    "llvm.ve.vl.vstlncot.vssml" => "__builtin_ve_vl_vstlncot_vssml",
+    "llvm.ve.vl.vstlot.vssl" => "__builtin_ve_vl_vstlot_vssl",
+    "llvm.ve.vl.vstlot.vssml" => "__builtin_ve_vl_vstlot_vssml",
+    "llvm.ve.vl.vstnc.vssl" => "__builtin_ve_vl_vstnc_vssl",
+    "llvm.ve.vl.vstnc.vssml" => "__builtin_ve_vl_vstnc_vssml",
+    "llvm.ve.vl.vstncot.vssl" => "__builtin_ve_vl_vstncot_vssl",
+    "llvm.ve.vl.vstncot.vssml" => "__builtin_ve_vl_vstncot_vssml",
+    "llvm.ve.vl.vstot.vssl" => "__builtin_ve_vl_vstot_vssl",
+    "llvm.ve.vl.vstot.vssml" => "__builtin_ve_vl_vstot_vssml",
+    "llvm.ve.vl.vstu.vssl" => "__builtin_ve_vl_vstu_vssl",
+    "llvm.ve.vl.vstu.vssml" => "__builtin_ve_vl_vstu_vssml",
+    "llvm.ve.vl.vstu2d.vssl" => "__builtin_ve_vl_vstu2d_vssl",
+    "llvm.ve.vl.vstu2d.vssml" => "__builtin_ve_vl_vstu2d_vssml",
+    "llvm.ve.vl.vstu2dnc.vssl" => "__builtin_ve_vl_vstu2dnc_vssl",
+    "llvm.ve.vl.vstu2dnc.vssml" => "__builtin_ve_vl_vstu2dnc_vssml",
+    "llvm.ve.vl.vstu2dncot.vssl" => "__builtin_ve_vl_vstu2dncot_vssl",
+    "llvm.ve.vl.vstu2dncot.vssml" => "__builtin_ve_vl_vstu2dncot_vssml",
+    "llvm.ve.vl.vstu2dot.vssl" => "__builtin_ve_vl_vstu2dot_vssl",
+    "llvm.ve.vl.vstu2dot.vssml" => "__builtin_ve_vl_vstu2dot_vssml",
+    "llvm.ve.vl.vstunc.vssl" => "__builtin_ve_vl_vstunc_vssl",
+    "llvm.ve.vl.vstunc.vssml" => "__builtin_ve_vl_vstunc_vssml",
+    "llvm.ve.vl.vstuncot.vssl" => "__builtin_ve_vl_vstuncot_vssl",
+    "llvm.ve.vl.vstuncot.vssml" => "__builtin_ve_vl_vstuncot_vssml",
+    "llvm.ve.vl.vstuot.vssl" => "__builtin_ve_vl_vstuot_vssl",
+    "llvm.ve.vl.vstuot.vssml" => "__builtin_ve_vl_vstuot_vssml",
+    "llvm.ve.vl.vsubsl.vsvl" => "__builtin_ve_vl_vsubsl_vsvl",
+    "llvm.ve.vl.vsubsl.vsvmvl" => "__builtin_ve_vl_vsubsl_vsvmvl",
+    "llvm.ve.vl.vsubsl.vsvvl" => "__builtin_ve_vl_vsubsl_vsvvl",
+    "llvm.ve.vl.vsubsl.vvvl" => "__builtin_ve_vl_vsubsl_vvvl",
+    "llvm.ve.vl.vsubsl.vvvmvl" => "__builtin_ve_vl_vsubsl_vvvmvl",
+    "llvm.ve.vl.vsubsl.vvvvl" => "__builtin_ve_vl_vsubsl_vvvvl",
+    "llvm.ve.vl.vsubswsx.vsvl" => "__builtin_ve_vl_vsubswsx_vsvl",
+    "llvm.ve.vl.vsubswsx.vsvmvl" => "__builtin_ve_vl_vsubswsx_vsvmvl",
+    "llvm.ve.vl.vsubswsx.vsvvl" => "__builtin_ve_vl_vsubswsx_vsvvl",
+    "llvm.ve.vl.vsubswsx.vvvl" => "__builtin_ve_vl_vsubswsx_vvvl",
+    "llvm.ve.vl.vsubswsx.vvvmvl" => "__builtin_ve_vl_vsubswsx_vvvmvl",
+    "llvm.ve.vl.vsubswsx.vvvvl" => "__builtin_ve_vl_vsubswsx_vvvvl",
+    "llvm.ve.vl.vsubswzx.vsvl" => "__builtin_ve_vl_vsubswzx_vsvl",
+    "llvm.ve.vl.vsubswzx.vsvmvl" => "__builtin_ve_vl_vsubswzx_vsvmvl",
+    "llvm.ve.vl.vsubswzx.vsvvl" => "__builtin_ve_vl_vsubswzx_vsvvl",
+    "llvm.ve.vl.vsubswzx.vvvl" => "__builtin_ve_vl_vsubswzx_vvvl",
+    "llvm.ve.vl.vsubswzx.vvvmvl" => "__builtin_ve_vl_vsubswzx_vvvmvl",
+    "llvm.ve.vl.vsubswzx.vvvvl" => "__builtin_ve_vl_vsubswzx_vvvvl",
+    "llvm.ve.vl.vsubul.vsvl" => "__builtin_ve_vl_vsubul_vsvl",
+    "llvm.ve.vl.vsubul.vsvmvl" => "__builtin_ve_vl_vsubul_vsvmvl",
+    "llvm.ve.vl.vsubul.vsvvl" => "__builtin_ve_vl_vsubul_vsvvl",
+    "llvm.ve.vl.vsubul.vvvl" => "__builtin_ve_vl_vsubul_vvvl",
+    "llvm.ve.vl.vsubul.vvvmvl" => "__builtin_ve_vl_vsubul_vvvmvl",
+    "llvm.ve.vl.vsubul.vvvvl" => "__builtin_ve_vl_vsubul_vvvvl",
+    "llvm.ve.vl.vsubuw.vsvl" => "__builtin_ve_vl_vsubuw_vsvl",
+    "llvm.ve.vl.vsubuw.vsvmvl" => "__builtin_ve_vl_vsubuw_vsvmvl",
+    "llvm.ve.vl.vsubuw.vsvvl" => "__builtin_ve_vl_vsubuw_vsvvl",
+    "llvm.ve.vl.vsubuw.vvvl" => "__builtin_ve_vl_vsubuw_vvvl",
+    "llvm.ve.vl.vsubuw.vvvmvl" => "__builtin_ve_vl_vsubuw_vvvmvl",
+    "llvm.ve.vl.vsubuw.vvvvl" => "__builtin_ve_vl_vsubuw_vvvvl",
+    "llvm.ve.vl.vsuml.vvl" => "__builtin_ve_vl_vsuml_vvl",
+    "llvm.ve.vl.vsuml.vvml" => "__builtin_ve_vl_vsuml_vvml",
+    "llvm.ve.vl.vsumwsx.vvl" => "__builtin_ve_vl_vsumwsx_vvl",
+    "llvm.ve.vl.vsumwsx.vvml" => "__builtin_ve_vl_vsumwsx_vvml",
+    "llvm.ve.vl.vsumwzx.vvl" => "__builtin_ve_vl_vsumwzx_vvl",
+    "llvm.ve.vl.vsumwzx.vvml" => "__builtin_ve_vl_vsumwzx_vvml",
+    "llvm.ve.vl.vxor.vsvl" => "__builtin_ve_vl_vxor_vsvl",
+    "llvm.ve.vl.vxor.vsvmvl" => "__builtin_ve_vl_vxor_vsvmvl",
+    "llvm.ve.vl.vxor.vsvvl" => "__builtin_ve_vl_vxor_vsvvl",
+    "llvm.ve.vl.vxor.vvvl" => "__builtin_ve_vl_vxor_vvvl",
+    "llvm.ve.vl.vxor.vvvmvl" => "__builtin_ve_vl_vxor_vvvmvl",
+    "llvm.ve.vl.vxor.vvvvl" => "__builtin_ve_vl_vxor_vvvvl",
+    "llvm.ve.vl.xorm.MMM" => "__builtin_ve_vl_xorm_MMM",
+    "llvm.ve.vl.xorm.mmm" => "__builtin_ve_vl_xorm_mmm",
     // x86
     "llvm.x86.3dnow.pavgusb" => "__builtin_ia32_pavgusb",
     "llvm.x86.3dnow.pf2id" => "__builtin_ia32_pf2id",

From ee4755afdbd8123333513931747d295021561b97 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 9 Jun 2022 21:11:30 -0400
Subject: [PATCH 114/997] Add more SIMD

---
 Readme.md             |  4 ++++
 src/base.rs           | 12 +++++++++---
 src/builder.rs        |  8 +++++---
 src/intrinsic/llvm.rs |  5 ++++-
 src/intrinsic/simd.rs |  3 ++-
 5 files changed, 24 insertions(+), 8 deletions(-)

diff --git a/Readme.md b/Readme.md
index fe23a2676966..5bbd29fceba2 100644
--- a/Readme.md
+++ b/Readme.md
@@ -127,6 +127,10 @@ To get the `rustc` command to run in `gdb`, add the `--verbose` flag to `cargo b
  * Build the stage2 compiler (`rustup toolchain link debug-current build/x86_64-unknown-linux-gnu/stage2`).
  * Clean and rebuild the codegen with `debug-current` in the file `rust-toolchain`.
 
+### How to use [mem-trace](https://github.com/antoyo/mem-trace)
+
+`rustc` needs to be built without `jemalloc` so that `mem-trace` can overload `malloc` since `jemalloc` is linked statically, so a `LD_PRELOAD`-ed library won't a chance to intercept the calls to `malloc`.
+
 ### How to build a cross-compiling libgccjit
 
 #### Building libgccjit
diff --git a/src/base.rs b/src/base.rs
index e4ecbd46f0c4..19c981309d75 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -81,11 +81,17 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         // TODO(antoyo): only add the following cli argument if the feature is supported.
         context.add_command_line_option("-msse2");
         context.add_command_line_option("-mavx2");
-        context.add_command_line_option("-msha");
-        context.add_command_line_option("-mpclmul");
         // FIXME(antoyo): the following causes an illegal instruction on vmovdqu64 in std_example on my CPU.
         // Only add if the CPU supports it.
-        //context.add_command_line_option("-mavx512f");
+        /*context.add_command_line_option("-mavx512f");
+        context.add_command_line_option("-msha");
+        context.add_command_line_option("-mpclmul");
+        context.add_command_line_option("-mfma");
+        context.add_command_line_option("-mfma4");
+        context.add_command_line_option("-mavx512vpopcntdq");
+        context.add_command_line_option("-mavx512vl");
+        context.add_command_line_option("-m64");
+        context.add_command_line_option("-mbmi");*/
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
         }
diff --git a/src/builder.rs b/src/builder.rs
index 3e1f56c183ac..3804a958e691 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -213,7 +213,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
                 let actual_ty = actual_val.get_type();
                 if expected_ty != actual_ty {
-                    if !actual_ty.is_vector() && !expected_ty.is_vector() && actual_ty.is_integral() && expected_ty.is_integral() && actual_ty.get_size() != expected_ty.get_size() {
+                    if !actual_ty.is_vector() && !expected_ty.is_vector() && actual_ty.is_integral() && expected_ty.is_integral() {
                         self.context.new_cast(None, actual_val, expected_ty)
                     }
                     else if on_stack_param_indices.contains(&index) {
@@ -1390,18 +1390,20 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     where F: Fn(RValue<'gcc>, RValue<'gcc>, &'gcc Context<'gcc>) -> RValue<'gcc>
     {
         let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
+        let element_type = vector_type.get_element_type();
+        let mask_element_type = self.type_ix(element_type.get_size() as u64 * 8);
         let element_count = vector_type.get_num_units();
         let mut vector_elements = vec![];
         for i in 0..element_count {
             vector_elements.push(i);
         }
-        let mask_type = self.context.new_vector_type(self.int_type, element_count as u64);
+        let mask_type = self.context.new_vector_type(mask_element_type, element_count as u64);
         let mut shift = 1;
         let mut res = src;
         while shift < element_count {
             let vector_elements: Vec<_> =
                 vector_elements.iter()
-                    .map(|i| self.context.new_rvalue_from_int(self.int_type, ((i + shift) % element_count) as i32))
+                    .map(|i| self.context.new_rvalue_from_int(mask_element_type, ((i + shift) % element_count) as i32))
                     .collect();
             let mask = self.context.new_rvalue_from_vector(None, mask_type, &vector_elements);
             let shifted = self.context.new_rvalue_vector_perm(None, res, res, mask);
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 42cf06c8c7ab..f2faae070284 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -288,7 +288,10 @@ pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc,
     match func_name {
         "__builtin_ia32_vfmaddss3_round" | "__builtin_ia32_vfmaddsd3_round" => {
             let zero = builder.context.new_rvalue_zero(builder.int_type);
-            return_value = builder.context.new_vector_access(None, return_value, zero).to_rvalue();
+            #[cfg(feature="master")]
+            {
+                return_value = builder.context.new_vector_access(None, return_value, zero).to_rvalue();
+            }
         },
         "__builtin_ia32_addcarryx_u64" | "__builtin_ia32_sbb_u64" | "__builtin_ia32_addcarryx_u32" | "__builtin_ia32_sbb_u32" => {
             // Both llvm.x86.addcarry.32 and llvm.x86.addcarryx.u32 points to the same GCC builtin,
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index bf5d555736ae..8f9862414e60 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -216,7 +216,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let variable = bx.current_func().new_local(None, vector.get_type(), "new_vector");
         bx.llbb().add_assignment(None, variable, vector);
         let lvalue = bx.context.new_vector_access(None, variable.to_rvalue(), index);
-        // TODO: si simd_insert est constant, utiliser BIT_REF…
+        // TODO: if simd_insert is constant, use BIT_REF.
         bx.llbb().add_assignment(None, lvalue, value);
         return Ok(variable.to_rvalue());
     }
@@ -252,6 +252,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         return Ok(bx.vector_select(args[0].immediate(), args[1].immediate(), args[2].immediate()));
     }
 
+    #[cfg(feature="master")]
     if name == sym::simd_cast {
         require_simd!(ret_ty, "return");
         let (out_len, out_elem) = ret_ty.simd_size_and_type(bx.tcx());

From 8ac2af17cafa34cef317b20fa075e15e84bc96e1 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 10 Jun 2022 08:02:24 -0400
Subject: [PATCH 115/997] Update cross-compiling instructions

---
 Readme.md | 1 -
 1 file changed, 1 deletion(-)

diff --git a/Readme.md b/Readme.md
index 5bbd29fceba2..aa3626db4ef5 100644
--- a/Readme.md
+++ b/Readme.md
@@ -146,6 +146,5 @@ To get the `rustc` command to run in `gdb`, add the `--verbose` flag to `cargo b
  * Since rustc doesn't support this architecture yet, set it back to `TARGET_TRIPLE="mips-unknown-linux-gnu"` (or another target having the same attributes). Alternatively, create a [target specification file](https://book.avr-rust.com/005.1-the-target-specification-json-file.html) (note that the `arch` specified in this file must be supported by the rust compiler).
  * Set `linker='-Clinker=m68k-linux-gcc'`.
  * Set the path to the cross-compiling libgccjit in `gcc_path`.
- * Disable the 128-bit integer types if the target doesn't support them by using `let i128_type = context.new_type::<i64>();` in `context.rs` (same for u128_type).
  * Comment the line: `context.add_command_line_option("-masm=intel");` in src/base.rs.
  * (might not be necessary) Disable the compilation of libstd.so (and possibly libcore.so?).

From c297534d94e430315199446ab33f19b2692e948a Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 9 Jun 2022 17:19:09 +0200
Subject: [PATCH 116/997] Add tool to check duplicates between manual and auto
 code for intrinsics

---
 tools/check_intrinsics_duplicates.py | 67 ++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 tools/check_intrinsics_duplicates.py

diff --git a/tools/check_intrinsics_duplicates.py b/tools/check_intrinsics_duplicates.py
new file mode 100644
index 000000000000..c09fb3c759f3
--- /dev/null
+++ b/tools/check_intrinsics_duplicates.py
@@ -0,0 +1,67 @@
+import sys
+
+
+def check_duplicates():
+    auto_content = ""
+    manual_content = ""
+
+    with open("src/intrinsic/llvm.rs", "r", encoding="utf8") as f:
+        manual_content = f.read()
+    with open("src/intrinsic/archs.rs", "r", encoding="utf8") as f:
+        auto_content = f.read()
+
+    intrinsics_map = {}
+    for line in auto_content.splitlines():
+        line = line.strip()
+        if not line.startswith('"'):
+            continue
+        parts = line.split('"')
+        if len(parts) != 5:
+            continue
+        intrinsics_map[parts[1]] = parts[3]
+
+    if len(intrinsics_map) == 0:
+        print("No intrinsics found in auto code... Aborting.")
+        return 1
+    print("Found {} intrinsics in auto code".format(len(intrinsics_map)))
+    errors = []
+    lines = manual_content.splitlines()
+    pos = 0
+    found = 0
+    while pos < len(lines):
+        line = lines[pos].strip()
+        # This is our marker.
+        if line == "let gcc_name = match name {":
+            while pos < len(lines):
+                line = lines[pos].strip()
+                pos += 1
+                if line == "};":
+                    # We're done!
+                    if found == 0:
+                        print("No intrinsics found in manual code even though we found the "
+                            "marker... Aborting...")
+                        return 1
+                    for error in errors:
+                        print("ERROR => {}".format(error))
+                    return 1 if len(errors) != 0 else 0
+                parts = line.split('"')
+                if len(parts) != 5:
+                    continue
+                found += 1
+                if parts[1] in intrinsics_map:
+                    if parts[3] != intrinsics_map[parts[1]]:
+                        print("Same intrinsics (`{}` at line {}) but different GCC "
+                            "translations: `{}` != `{}`".format(
+                                parts[1], pos, intrinsics_map[parts[1]], parts[3]))
+                    else:
+                        errors.append("Duplicated intrinsics: `{}` at line {}. Please remove it "
+                            " from manual code".format(parts[1], pos))
+            # Weird but whatever...
+            return 1 if len(errors) != 0 else 0
+        pos += 1
+    print("No intrinsics found in manual code... Aborting")
+    return 1
+
+
+if __name__ == "__main__":
+    sys.exit(check_duplicates())

From 8d253b9f735ea8fa1b1574bbef09b59037d3970d Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 9 Jun 2022 17:33:13 +0200
Subject: [PATCH 117/997] Add new workflow to check for duplicated intrinsics

---
 .github/workflows/ci.yml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 8ebdabe82610..d62ac47dedb6 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -129,3 +129,9 @@ jobs:
         export RUN_RUNS=2
 
         ./test.sh --release --no-default-features
+
+  duplicates:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v2
+      - run: python tools/check_intrinsics_duplicates.py

From 08df4751b7439ad4598f4cc2429d323f0529cce5 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 23 Jun 2022 13:27:34 +0200
Subject: [PATCH 118/997] Update extraction of builtins from llvm-project

---
 tools/generate_intrinsics.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index e13e8b146698..49d5969470ef 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -67,7 +67,7 @@ def extract_instrinsics_from_llvm(llvm_path, intrinsics):
             pos += 1
             if line == "}":
                 break
-        entries = re.findall('string GCCBuiltinName = "(\\w+)";', content)
+        entries = re.findall('string ClangBuiltinName = "(\\w+)";', content)
         current_arch = re.findall('string TargetPrefix = "(\\w+)";', content)
         if len(entries) == 1 and len(current_arch) == 1:
             current_arch = current_arch[0]

From 48347715fb387916343494ef2c1a45b8c66f0da8 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 23 Jun 2022 13:28:38 +0200
Subject: [PATCH 119/997] Regen intrinsics

---
 src/intrinsic/archs.rs | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 9375f0fc1ad5..3f2db6431053 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -65,6 +65,7 @@ match name {
     "llvm.amdgcn.cvt.pknorm.u16" => "__builtin_amdgcn_cvt_pknorm_u16",
     "llvm.amdgcn.cvt.pkrtz" => "__builtin_amdgcn_cvt_pkrtz",
     "llvm.amdgcn.dispatch.id" => "__builtin_amdgcn_dispatch_id",
+    "llvm.amdgcn.ds.add.gs.reg.rtn" => "__builtin_amdgcn_ds_add_gs_reg_rtn",
     "llvm.amdgcn.ds.bpermute" => "__builtin_amdgcn_ds_bpermute",
     "llvm.amdgcn.ds.fadd.v2bf16" => "__builtin_amdgcn_ds_atomic_fadd_v2bf16",
     "llvm.amdgcn.ds.gws.barrier" => "__builtin_amdgcn_ds_gws_barrier",
@@ -74,9 +75,13 @@ match name {
     "llvm.amdgcn.ds.gws.sema.release.all" => "__builtin_amdgcn_ds_gws_sema_release_all",
     "llvm.amdgcn.ds.gws.sema.v" => "__builtin_amdgcn_ds_gws_sema_v",
     "llvm.amdgcn.ds.permute" => "__builtin_amdgcn_ds_permute",
+    "llvm.amdgcn.ds.sub.gs.reg.rtn" => "__builtin_amdgcn_ds_sub_gs_reg_rtn",
     "llvm.amdgcn.ds.swizzle" => "__builtin_amdgcn_ds_swizzle",
     "llvm.amdgcn.endpgm" => "__builtin_amdgcn_endpgm",
     "llvm.amdgcn.fdot2" => "__builtin_amdgcn_fdot2",
+    "llvm.amdgcn.fdot2.bf16.bf16" => "__builtin_amdgcn_fdot2_bf16_bf16",
+    "llvm.amdgcn.fdot2.f16.f16" => "__builtin_amdgcn_fdot2_f16_f16",
+    "llvm.amdgcn.fdot2.f32.bf16" => "__builtin_amdgcn_fdot2_f32_bf16",
     "llvm.amdgcn.fmed3" => "__builtin_amdgcn_fmed3",
     "llvm.amdgcn.fmul.legacy" => "__builtin_amdgcn_fmul_legacy",
     "llvm.amdgcn.groupstaticsize" => "__builtin_amdgcn_groupstaticsize",
@@ -167,6 +172,8 @@ match name {
     "llvm.amdgcn.smfmac.f32.32x32x16.f16" => "__builtin_amdgcn_smfmac_f32_32x32x16_f16",
     "llvm.amdgcn.smfmac.i32.16x16x64.i8" => "__builtin_amdgcn_smfmac_i32_16x16x64_i8",
     "llvm.amdgcn.smfmac.i32.32x32x32.i8" => "__builtin_amdgcn_smfmac_i32_32x32x32_i8",
+    "llvm.amdgcn.sudot4" => "__builtin_amdgcn_sudot4",
+    "llvm.amdgcn.sudot8" => "__builtin_amdgcn_sudot8",
     "llvm.amdgcn.udot2" => "__builtin_amdgcn_udot2",
     "llvm.amdgcn.udot4" => "__builtin_amdgcn_udot4",
     "llvm.amdgcn.udot8" => "__builtin_amdgcn_udot8",

From 2581f7e284a1c1ae484e00c6e5ecf5ba9d7c8e62 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 23 Jun 2022 13:38:52 +0200
Subject: [PATCH 120/997] Don't generate `*_round_mask*` intrinsics as the GCC
 equivalent is different

---
 tools/generate_intrinsics.py | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index e13e8b146698..e2fbee762045 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -182,6 +182,8 @@ def update_intrinsics(llvm_path, llvmint, llvmint2):
             for entry in intrinsics[arch]:
                 if entry[2] == True: # if it is a duplicate
                     out.write('    // [DUPLICATE]: "{}" => "{}",\n'.format(entry[0], entry[1]))
+                elif "_round_mask" in entry[1]:
+                    out.write('    // [INVALID CONVERSION]: "{}" => "{}",\n'.format(entry[0], entry[1]))
                 else:
                     out.write('    "{}" => "{}",\n'.format(entry[0], entry[1]))
         out.write('    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),\n')

From 94b345705ac48479ad92b736c0e0e1a56f7563d7 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 23 Jun 2022 13:39:24 +0200
Subject: [PATCH 121/997] Regen without invalid conversion intrinsics

---
 src/intrinsic/archs.rs | 88 +++++++++++++++++++++---------------------
 1 file changed, 44 insertions(+), 44 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 9375f0fc1ad5..21a21719e615 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -5988,8 +5988,8 @@ match name {
     "llvm.x86.avx512.mask.add.ps.128" => "__builtin_ia32_addps128_mask",
     "llvm.x86.avx512.mask.add.ps.256" => "__builtin_ia32_addps256_mask",
     "llvm.x86.avx512.mask.add.ps.512" => "__builtin_ia32_addps512_mask",
-    "llvm.x86.avx512.mask.add.sd.round" => "__builtin_ia32_addsd_round_mask",
-    "llvm.x86.avx512.mask.add.ss.round" => "__builtin_ia32_addss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.add.sd.round" => "__builtin_ia32_addsd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.add.ss.round" => "__builtin_ia32_addss_round_mask",
     "llvm.x86.avx512.mask.and.pd.128" => "__builtin_ia32_andpd128_mask",
     "llvm.x86.avx512.mask.and.pd.256" => "__builtin_ia32_andpd256_mask",
     "llvm.x86.avx512.mask.and.pd.512" => "__builtin_ia32_andpd512_mask",
@@ -6103,8 +6103,8 @@ match name {
     "llvm.x86.avx512.mask.cvtqq2ps.128" => "__builtin_ia32_cvtqq2ps128_mask",
     "llvm.x86.avx512.mask.cvtqq2ps.256" => "__builtin_ia32_cvtqq2ps256_mask",
     "llvm.x86.avx512.mask.cvtqq2ps.512" => "__builtin_ia32_cvtqq2ps512_mask",
-    "llvm.x86.avx512.mask.cvtsd2ss.round" => "__builtin_ia32_cvtsd2ss_round_mask",
-    "llvm.x86.avx512.mask.cvtss2sd.round" => "__builtin_ia32_cvtss2sd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.cvtsd2ss.round" => "__builtin_ia32_cvtsd2ss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.cvtss2sd.round" => "__builtin_ia32_cvtss2sd_round_mask",
     "llvm.x86.avx512.mask.cvttpd2dq.128" => "__builtin_ia32_cvttpd2dq128_mask",
     "llvm.x86.avx512.mask.cvttpd2dq.256" => "__builtin_ia32_cvttpd2dq256_mask",
     "llvm.x86.avx512.mask.cvttpd2dq.512" => "__builtin_ia32_cvttpd2dq512_mask",
@@ -6150,8 +6150,8 @@ match name {
     "llvm.x86.avx512.mask.div.ps.128" => "__builtin_ia32_divps_mask",
     "llvm.x86.avx512.mask.div.ps.256" => "__builtin_ia32_divps256_mask",
     "llvm.x86.avx512.mask.div.ps.512" => "__builtin_ia32_divps512_mask",
-    "llvm.x86.avx512.mask.div.sd.round" => "__builtin_ia32_divsd_round_mask",
-    "llvm.x86.avx512.mask.div.ss.round" => "__builtin_ia32_divss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.div.sd.round" => "__builtin_ia32_divsd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.div.ss.round" => "__builtin_ia32_divss_round_mask",
     "llvm.x86.avx512.mask.expand.d.128" => "__builtin_ia32_expandsi128_mask",
     "llvm.x86.avx512.mask.expand.d.256" => "__builtin_ia32_expandsi256_mask",
     "llvm.x86.avx512.mask.expand.d.512" => "__builtin_ia32_expandsi512_mask",
@@ -6198,16 +6198,16 @@ match name {
     "llvm.x86.avx512.mask.getexp.ps.128" => "__builtin_ia32_getexpps128_mask",
     "llvm.x86.avx512.mask.getexp.ps.256" => "__builtin_ia32_getexpps256_mask",
     "llvm.x86.avx512.mask.getexp.ps.512" => "__builtin_ia32_getexpps512_mask",
-    "llvm.x86.avx512.mask.getexp.sd" => "__builtin_ia32_getexpsd128_round_mask",
-    "llvm.x86.avx512.mask.getexp.ss" => "__builtin_ia32_getexpss128_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.getexp.sd" => "__builtin_ia32_getexpsd128_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.getexp.ss" => "__builtin_ia32_getexpss128_round_mask",
     "llvm.x86.avx512.mask.getmant.pd.128" => "__builtin_ia32_getmantpd128_mask",
     "llvm.x86.avx512.mask.getmant.pd.256" => "__builtin_ia32_getmantpd256_mask",
     "llvm.x86.avx512.mask.getmant.pd.512" => "__builtin_ia32_getmantpd512_mask",
     "llvm.x86.avx512.mask.getmant.ps.128" => "__builtin_ia32_getmantps128_mask",
     "llvm.x86.avx512.mask.getmant.ps.256" => "__builtin_ia32_getmantps256_mask",
     "llvm.x86.avx512.mask.getmant.ps.512" => "__builtin_ia32_getmantps512_mask",
-    "llvm.x86.avx512.mask.getmant.sd" => "__builtin_ia32_getmantsd_round_mask",
-    "llvm.x86.avx512.mask.getmant.ss" => "__builtin_ia32_getmantss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.getmant.sd" => "__builtin_ia32_getmantsd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.getmant.ss" => "__builtin_ia32_getmantss_round_mask",
     "llvm.x86.avx512.mask.insertf32x4.256" => "__builtin_ia32_insertf32x4_256_mask",
     "llvm.x86.avx512.mask.insertf32x4.512" => "__builtin_ia32_insertf32x4_mask",
     "llvm.x86.avx512.mask.insertf32x8.512" => "__builtin_ia32_insertf32x8_mask",
@@ -6232,16 +6232,16 @@ match name {
     "llvm.x86.avx512.mask.max.ps.128" => "__builtin_ia32_maxps_mask",
     "llvm.x86.avx512.mask.max.ps.256" => "__builtin_ia32_maxps256_mask",
     "llvm.x86.avx512.mask.max.ps.512" => "__builtin_ia32_maxps512_mask",
-    "llvm.x86.avx512.mask.max.sd.round" => "__builtin_ia32_maxsd_round_mask",
-    "llvm.x86.avx512.mask.max.ss.round" => "__builtin_ia32_maxss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.max.sd.round" => "__builtin_ia32_maxsd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.max.ss.round" => "__builtin_ia32_maxss_round_mask",
     "llvm.x86.avx512.mask.min.pd.128" => "__builtin_ia32_minpd_mask",
     "llvm.x86.avx512.mask.min.pd.256" => "__builtin_ia32_minpd256_mask",
     "llvm.x86.avx512.mask.min.pd.512" => "__builtin_ia32_minpd512_mask",
     "llvm.x86.avx512.mask.min.ps.128" => "__builtin_ia32_minps_mask",
     "llvm.x86.avx512.mask.min.ps.256" => "__builtin_ia32_minps256_mask",
     "llvm.x86.avx512.mask.min.ps.512" => "__builtin_ia32_minps512_mask",
-    "llvm.x86.avx512.mask.min.sd.round" => "__builtin_ia32_minsd_round_mask",
-    "llvm.x86.avx512.mask.min.ss.round" => "__builtin_ia32_minss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.min.sd.round" => "__builtin_ia32_minsd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.min.ss.round" => "__builtin_ia32_minss_round_mask",
     "llvm.x86.avx512.mask.move.sd" => "__builtin_ia32_movsd_mask",
     "llvm.x86.avx512.mask.move.ss" => "__builtin_ia32_movss_mask",
     "llvm.x86.avx512.mask.mul.pd.128" => "__builtin_ia32_mulpd_mask",
@@ -6250,8 +6250,8 @@ match name {
     "llvm.x86.avx512.mask.mul.ps.128" => "__builtin_ia32_mulps_mask",
     "llvm.x86.avx512.mask.mul.ps.256" => "__builtin_ia32_mulps256_mask",
     "llvm.x86.avx512.mask.mul.ps.512" => "__builtin_ia32_mulps512_mask",
-    "llvm.x86.avx512.mask.mul.sd.round" => "__builtin_ia32_mulsd_round_mask",
-    "llvm.x86.avx512.mask.mul.ss.round" => "__builtin_ia32_mulss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.mul.sd.round" => "__builtin_ia32_mulsd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.mul.ss.round" => "__builtin_ia32_mulss_round_mask",
     "llvm.x86.avx512.mask.or.pd.128" => "__builtin_ia32_orpd128_mask",
     "llvm.x86.avx512.mask.or.pd.256" => "__builtin_ia32_orpd256_mask",
     "llvm.x86.avx512.mask.or.pd.512" => "__builtin_ia32_orpd512_mask",
@@ -6736,8 +6736,8 @@ match name {
     "llvm.x86.avx512.mask.range.ps.128" => "__builtin_ia32_rangeps128_mask",
     "llvm.x86.avx512.mask.range.ps.256" => "__builtin_ia32_rangeps256_mask",
     "llvm.x86.avx512.mask.range.ps.512" => "__builtin_ia32_rangeps512_mask",
-    "llvm.x86.avx512.mask.range.sd" => "__builtin_ia32_rangesd128_round_mask",
-    "llvm.x86.avx512.mask.range.ss" => "__builtin_ia32_rangess128_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.range.sd" => "__builtin_ia32_rangesd128_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.range.ss" => "__builtin_ia32_rangess128_round_mask",
     "llvm.x86.avx512.mask.reduce.pd.128" => "__builtin_ia32_reducepd128_mask",
     "llvm.x86.avx512.mask.reduce.pd.256" => "__builtin_ia32_reducepd256_mask",
     "llvm.x86.avx512.mask.reduce.pd.512" => "__builtin_ia32_reducepd512_mask",
@@ -6752,16 +6752,16 @@ match name {
     "llvm.x86.avx512.mask.rndscale.ps.128" => "__builtin_ia32_rndscaleps_128_mask",
     "llvm.x86.avx512.mask.rndscale.ps.256" => "__builtin_ia32_rndscaleps_256_mask",
     "llvm.x86.avx512.mask.rndscale.ps.512" => "__builtin_ia32_rndscaleps_mask",
-    "llvm.x86.avx512.mask.rndscale.sd" => "__builtin_ia32_rndscalesd_round_mask",
-    "llvm.x86.avx512.mask.rndscale.ss" => "__builtin_ia32_rndscaless_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.rndscale.sd" => "__builtin_ia32_rndscalesd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.rndscale.ss" => "__builtin_ia32_rndscaless_round_mask",
     "llvm.x86.avx512.mask.scalef.pd.128" => "__builtin_ia32_scalefpd128_mask",
     "llvm.x86.avx512.mask.scalef.pd.256" => "__builtin_ia32_scalefpd256_mask",
     "llvm.x86.avx512.mask.scalef.pd.512" => "__builtin_ia32_scalefpd512_mask",
     "llvm.x86.avx512.mask.scalef.ps.128" => "__builtin_ia32_scalefps128_mask",
     "llvm.x86.avx512.mask.scalef.ps.256" => "__builtin_ia32_scalefps256_mask",
     "llvm.x86.avx512.mask.scalef.ps.512" => "__builtin_ia32_scalefps512_mask",
-    "llvm.x86.avx512.mask.scalef.sd" => "__builtin_ia32_scalefsd_round_mask",
-    "llvm.x86.avx512.mask.scalef.ss" => "__builtin_ia32_scalefss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.scalef.sd" => "__builtin_ia32_scalefsd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.scalef.ss" => "__builtin_ia32_scalefss_round_mask",
     "llvm.x86.avx512.mask.shuf.f32x4" => "__builtin_ia32_shuf_f32x4_mask",
     "llvm.x86.avx512.mask.shuf.f32x4.256" => "__builtin_ia32_shuf_f32x4_256_mask",
     "llvm.x86.avx512.mask.shuf.f64x2" => "__builtin_ia32_shuf_f64x2_mask",
@@ -6782,8 +6782,8 @@ match name {
     "llvm.x86.avx512.mask.sqrt.ps.128" => "__builtin_ia32_sqrtps128_mask",
     "llvm.x86.avx512.mask.sqrt.ps.256" => "__builtin_ia32_sqrtps256_mask",
     "llvm.x86.avx512.mask.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
-    "llvm.x86.avx512.mask.sqrt.sd" => "__builtin_ia32_sqrtsd_round_mask",
-    "llvm.x86.avx512.mask.sqrt.ss" => "__builtin_ia32_sqrtss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.sqrt.sd" => "__builtin_ia32_sqrtsd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.sqrt.ss" => "__builtin_ia32_sqrtss_round_mask",
     "llvm.x86.avx512.mask.store.ss" => "__builtin_ia32_storess_mask",
     "llvm.x86.avx512.mask.storeu.d.512" => "__builtin_ia32_storedqusi512_mask",
     "llvm.x86.avx512.mask.storeu.pd.512" => "__builtin_ia32_storeupd512_mask",
@@ -6795,8 +6795,8 @@ match name {
     "llvm.x86.avx512.mask.sub.ps.128" => "__builtin_ia32_subps128_mask",
     "llvm.x86.avx512.mask.sub.ps.256" => "__builtin_ia32_subps256_mask",
     "llvm.x86.avx512.mask.sub.ps.512" => "__builtin_ia32_subps512_mask",
-    "llvm.x86.avx512.mask.sub.sd.round" => "__builtin_ia32_subsd_round_mask",
-    "llvm.x86.avx512.mask.sub.ss.round" => "__builtin_ia32_subss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.sub.sd.round" => "__builtin_ia32_subsd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.sub.ss.round" => "__builtin_ia32_subss_round_mask",
     "llvm.x86.avx512.mask.valign.d.128" => "__builtin_ia32_alignd128_mask",
     "llvm.x86.avx512.mask.valign.d.256" => "__builtin_ia32_alignd256_mask",
     "llvm.x86.avx512.mask.valign.d.512" => "__builtin_ia32_alignd512_mask",
@@ -7114,9 +7114,9 @@ match name {
     "llvm.x86.avx512.rcp14.ss" => "__builtin_ia32_rcp14ss_mask",
     "llvm.x86.avx512.rcp28.pd" => "__builtin_ia32_rcp28pd_mask",
     "llvm.x86.avx512.rcp28.ps" => "__builtin_ia32_rcp28ps_mask",
-    "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
     // [DUPLICATE]: "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
-    "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
     // [DUPLICATE]: "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
     "llvm.x86.avx512.rndscale.sd" => "__builtin_ia32_rndscalesd",
     "llvm.x86.avx512.rndscale.ss" => "__builtin_ia32_rndscaless",
@@ -7130,9 +7130,9 @@ match name {
     "llvm.x86.avx512.rsqrt14.ss" => "__builtin_ia32_rsqrt14ss_mask",
     "llvm.x86.avx512.rsqrt28.pd" => "__builtin_ia32_rsqrt28pd_mask",
     "llvm.x86.avx512.rsqrt28.ps" => "__builtin_ia32_rsqrt28ps_mask",
-    "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
     // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
-    "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
     // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
     "llvm.x86.avx512.scatter.dpd.512" => "__builtin_ia32_scattersiv8df",
     "llvm.x86.avx512.scatter.dpi.512" => "__builtin_ia32_scattersiv16si",
@@ -7230,21 +7230,21 @@ match name {
     "llvm.x86.avx512bf16.dpbf16ps.512" => "__builtin_ia32_dpbf16ps_512",
     "llvm.x86.avx512fp16.add.ph.512" => "__builtin_ia32_addph512",
     "llvm.x86.avx512fp16.div.ph.512" => "__builtin_ia32_divph512",
-    "llvm.x86.avx512fp16.mask.add.sh.round" => "__builtin_ia32_addsh_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.add.sh.round" => "__builtin_ia32_addsh_round_mask",
     "llvm.x86.avx512fp16.mask.cmp.sh" => "__builtin_ia32_cmpsh_mask",
-    "llvm.x86.avx512fp16.mask.div.sh.round" => "__builtin_ia32_divsh_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.div.sh.round" => "__builtin_ia32_divsh_round_mask",
     "llvm.x86.avx512fp16.mask.fpclass.sh" => "__builtin_ia32_fpclasssh_mask",
     "llvm.x86.avx512fp16.mask.getexp.ph.128" => "__builtin_ia32_getexpph128_mask",
     "llvm.x86.avx512fp16.mask.getexp.ph.256" => "__builtin_ia32_getexpph256_mask",
     "llvm.x86.avx512fp16.mask.getexp.ph.512" => "__builtin_ia32_getexpph512_mask",
-    "llvm.x86.avx512fp16.mask.getexp.sh" => "__builtin_ia32_getexpsh128_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.getexp.sh" => "__builtin_ia32_getexpsh128_round_mask",
     "llvm.x86.avx512fp16.mask.getmant.ph.128" => "__builtin_ia32_getmantph128_mask",
     "llvm.x86.avx512fp16.mask.getmant.ph.256" => "__builtin_ia32_getmantph256_mask",
     "llvm.x86.avx512fp16.mask.getmant.ph.512" => "__builtin_ia32_getmantph512_mask",
-    "llvm.x86.avx512fp16.mask.getmant.sh" => "__builtin_ia32_getmantsh_round_mask",
-    "llvm.x86.avx512fp16.mask.max.sh.round" => "__builtin_ia32_maxsh_round_mask",
-    "llvm.x86.avx512fp16.mask.min.sh.round" => "__builtin_ia32_minsh_round_mask",
-    "llvm.x86.avx512fp16.mask.mul.sh.round" => "__builtin_ia32_mulsh_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.getmant.sh" => "__builtin_ia32_getmantsh_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.max.sh.round" => "__builtin_ia32_maxsh_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.min.sh.round" => "__builtin_ia32_minsh_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.mul.sh.round" => "__builtin_ia32_mulsh_round_mask",
     "llvm.x86.avx512fp16.mask.rcp.ph.128" => "__builtin_ia32_rcpph128_mask",
     "llvm.x86.avx512fp16.mask.rcp.ph.256" => "__builtin_ia32_rcpph256_mask",
     "llvm.x86.avx512fp16.mask.rcp.ph.512" => "__builtin_ia32_rcpph512_mask",
@@ -7256,7 +7256,7 @@ match name {
     "llvm.x86.avx512fp16.mask.rndscale.ph.128" => "__builtin_ia32_rndscaleph_128_mask",
     "llvm.x86.avx512fp16.mask.rndscale.ph.256" => "__builtin_ia32_rndscaleph_256_mask",
     "llvm.x86.avx512fp16.mask.rndscale.ph.512" => "__builtin_ia32_rndscaleph_mask",
-    "llvm.x86.avx512fp16.mask.rndscale.sh" => "__builtin_ia32_rndscalesh_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.rndscale.sh" => "__builtin_ia32_rndscalesh_round_mask",
     "llvm.x86.avx512fp16.mask.rsqrt.ph.128" => "__builtin_ia32_rsqrtph128_mask",
     "llvm.x86.avx512fp16.mask.rsqrt.ph.256" => "__builtin_ia32_rsqrtph256_mask",
     "llvm.x86.avx512fp16.mask.rsqrt.ph.512" => "__builtin_ia32_rsqrtph512_mask",
@@ -7264,8 +7264,8 @@ match name {
     "llvm.x86.avx512fp16.mask.scalef.ph.128" => "__builtin_ia32_scalefph128_mask",
     "llvm.x86.avx512fp16.mask.scalef.ph.256" => "__builtin_ia32_scalefph256_mask",
     "llvm.x86.avx512fp16.mask.scalef.ph.512" => "__builtin_ia32_scalefph512_mask",
-    "llvm.x86.avx512fp16.mask.scalef.sh" => "__builtin_ia32_scalefsh_round_mask",
-    "llvm.x86.avx512fp16.mask.sub.sh.round" => "__builtin_ia32_subsh_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.scalef.sh" => "__builtin_ia32_scalefsh_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.sub.sh.round" => "__builtin_ia32_subsh_round_mask",
     "llvm.x86.avx512fp16.mask.vcvtdq2ph.128" => "__builtin_ia32_vcvtdq2ph128_mask",
     "llvm.x86.avx512fp16.mask.vcvtpd2ph.128" => "__builtin_ia32_vcvtpd2ph128_mask",
     "llvm.x86.avx512fp16.mask.vcvtpd2ph.256" => "__builtin_ia32_vcvtpd2ph256_mask",
@@ -7299,10 +7299,10 @@ match name {
     "llvm.x86.avx512fp16.mask.vcvtps2phx.512" => "__builtin_ia32_vcvtps2phx512_mask",
     "llvm.x86.avx512fp16.mask.vcvtqq2ph.128" => "__builtin_ia32_vcvtqq2ph128_mask",
     "llvm.x86.avx512fp16.mask.vcvtqq2ph.256" => "__builtin_ia32_vcvtqq2ph256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtsd2sh.round" => "__builtin_ia32_vcvtsd2sh_round_mask",
-    "llvm.x86.avx512fp16.mask.vcvtsh2sd.round" => "__builtin_ia32_vcvtsh2sd_round_mask",
-    "llvm.x86.avx512fp16.mask.vcvtsh2ss.round" => "__builtin_ia32_vcvtsh2ss_round_mask",
-    "llvm.x86.avx512fp16.mask.vcvtss2sh.round" => "__builtin_ia32_vcvtss2sh_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.vcvtsd2sh.round" => "__builtin_ia32_vcvtsd2sh_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.vcvtsh2sd.round" => "__builtin_ia32_vcvtsh2sd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.vcvtsh2ss.round" => "__builtin_ia32_vcvtsh2ss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.vcvtss2sh.round" => "__builtin_ia32_vcvtss2sh_round_mask",
     "llvm.x86.avx512fp16.mask.vcvttph2dq.128" => "__builtin_ia32_vcvttph2dq128_mask",
     "llvm.x86.avx512fp16.mask.vcvttph2dq.256" => "__builtin_ia32_vcvttph2dq256_mask",
     "llvm.x86.avx512fp16.mask.vcvttph2dq.512" => "__builtin_ia32_vcvttph2dq512_mask",

From 4dc0bbf40ec60d895a1167257b2ea18d04a616ed Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 22 Jun 2022 21:10:47 -0400
Subject: [PATCH 122/997] Add dummy fast math implementation

---
 src/builder.rs | 50 ++++++++++++++++++++++++++++++++++++++++----------
 test.sh        |  1 +
 2 files changed, 41 insertions(+), 10 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 3804a958e691..9f6ffb9a610f 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -530,6 +530,31 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn frem(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        // TODO(antoyo): add check in libgccjit since using the binary operator % causes the following error:
+        // during RTL pass: expand
+        // libgccjit.so: error: in expmed_mode_index, at expmed.h:240
+        // 0x7f0101d58dc6 expmed_mode_index
+        //     ../../../gcc/gcc/expmed.h:240
+        // 0x7f0101d58e35 expmed_op_cost_ptr
+        //     ../../../gcc/gcc/expmed.h:262
+        // 0x7f0101d594a1 sdiv_cost_ptr
+        //     ../../../gcc/gcc/expmed.h:531
+        // 0x7f0101d594f3 sdiv_cost
+        //     ../../../gcc/gcc/expmed.h:549
+        // 0x7f0101d6af7e expand_divmod(int, tree_code, machine_mode, rtx_def*, rtx_def*, rtx_def*, int, optab_methods)
+        //     ../../../gcc/gcc/expmed.cc:4356
+        // 0x7f0101d94f9e expand_expr_divmod
+        //     ../../../gcc/gcc/expr.cc:8929
+        // 0x7f0101d97a26 expand_expr_real_2(separate_ops*, rtx_def*, machine_mode, expand_modifier)
+        //     ../../../gcc/gcc/expr.cc:9566
+        // 0x7f0101bef6ef expand_gimple_stmt_1
+        //     ../../../gcc/gcc/cfgexpand.cc:3967
+        // 0x7f0101bef910 expand_gimple_stmt
+        //     ../../../gcc/gcc/cfgexpand.cc:4028
+        // 0x7f0101bf6ee7 expand_gimple_basic_block
+        //     ../../../gcc/gcc/cfgexpand.cc:6069
+        // 0x7f0101bf9194 execute
+        //     ../../../gcc/gcc/cfgexpand.cc:6795
         if a.get_type().is_compatible_with(self.cx.float_type) {
             let fmodf = self.context.get_builtin_function("fmodf");
             // FIXME(antoyo): this seems to produce the wrong result.
@@ -604,24 +629,29 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         a * b
     }
 
-    fn fadd_fast(&mut self, _lhs: RValue<'gcc>, _rhs: RValue<'gcc>) -> RValue<'gcc> {
-        unimplemented!();
+    fn fadd_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
+        // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
+        lhs + rhs
     }
 
-    fn fsub_fast(&mut self, _lhs: RValue<'gcc>, _rhs: RValue<'gcc>) -> RValue<'gcc> {
-        unimplemented!();
+    fn fsub_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
+        // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
+        lhs - rhs
     }
 
-    fn fmul_fast(&mut self, _lhs: RValue<'gcc>, _rhs: RValue<'gcc>) -> RValue<'gcc> {
-        unimplemented!();
+    fn fmul_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
+        // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
+        lhs * rhs
     }
 
-    fn fdiv_fast(&mut self, _lhs: RValue<'gcc>, _rhs: RValue<'gcc>) -> RValue<'gcc> {
-        unimplemented!();
+    fn fdiv_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
+        // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
+        lhs / rhs
     }
 
-    fn frem_fast(&mut self, _lhs: RValue<'gcc>, _rhs: RValue<'gcc>) -> RValue<'gcc> {
-        unimplemented!();
+    fn frem_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
+        // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
+        self.frem(lhs, rhs)
     }
 
     fn checked_binop(&mut self, oop: OverflowOp, typ: Ty<'_>, lhs: Self::Value, rhs: Self::Value) -> (Self::Value, Self::Value) {
diff --git a/test.sh b/test.sh
index 8b390f95a4b9..f2721c9c92c6 100755
--- a/test.sh
+++ b/test.sh
@@ -265,6 +265,7 @@ EOF
     for test in $(rg --files-with-matches "catch_unwind|should_panic|thread|lto" src/test/ui); do
       rm $test
     done
+    git checkout src/test/ui/lto/auxiliary/dylib.rs
     git checkout src/test/ui/type-alias-impl-trait/auxiliary/cross_crate_ice.rs
     git checkout src/test/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
 

From f7a3dffc0b755c7e4791656238bb862c118747cb Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 24 Jun 2022 17:25:09 +0200
Subject: [PATCH 123/997] Add missing intrinsics conversions for ignored
 invalid LLVM intrinsics

---
 src/intrinsic/llvm.rs | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index f2faae070284..f623bc5fb10c 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -618,6 +618,25 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.mask.div.sd.round" => "__builtin_ia32_divsd_mask_round",
         "llvm.x86.avx512.mask.cvtss2sd.round" => "__builtin_ia32_cvtss2sd_mask_round",
         "llvm.x86.avx512.mask.cvtsd2ss.round" => "__builtin_ia32_cvtsd2ss_mask_round",
+        "llvm.x86.avx512.mask.range.ss" => "__builtin_ia32_rangess128_mask_round",
+        "llvm.x86.avx512.mask.range.sd" => "__builtin_ia32_rangesd128_mask_round",
+        "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask_round",
+        "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask_round",
+        "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask_round",
+        "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask_round",
+        "llvm.x86.avx512fp16.mask.add.sh.round" => "__builtin_ia32_addsh_mask_round",
+        "llvm.x86.avx512fp16.mask.div.sh.round" => "__builtin_ia32_divsh_mask_round",
+        "llvm.x86.avx512fp16.mask.getmant.sh" => "__builtin_ia32_getmantsh_mask_round",
+        "llvm.x86.avx512fp16.mask.max.sh.round" => "__builtin_ia32_maxsh_mask_round",
+        "llvm.x86.avx512fp16.mask.min.sh.round" => "__builtin_ia32_minsh_mask_round",
+        "llvm.x86.avx512fp16.mask.mul.sh.round" => "__builtin_ia32_mulsh_mask_round",
+        "llvm.x86.avx512fp16.mask.rndscale.sh" => "__builtin_ia32_rndscalesh_mask_round",
+        "llvm.x86.avx512fp16.mask.scalef.sh" => "__builtin_ia32_scalefsh_mask_round",
+        "llvm.x86.avx512fp16.mask.sub.sh.round" => "__builtin_ia32_subsh_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvtsd2sh.round" => "__builtin_ia32_vcvtsd2sh_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvtsh2sd.round" => "__builtin_ia32_vcvtsh2sd_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvtsh2ss.round" => "__builtin_ia32_vcvtsh2ss_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvtss2sh.round" => "__builtin_ia32_vcvtss2sh_mask_round",
         "llvm.x86.aesni.aesenc.256" => "__builtin_ia32_vaesenc_v32qi",
         "llvm.x86.aesni.aesenclast.256" => "__builtin_ia32_vaesenclast_v32qi",
         "llvm.x86.aesni.aesdec.256" => "__builtin_ia32_vaesdec_v32qi",

From 5e6a3be56c60935e31dc71a93e7166ea4d427a82 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 24 Jun 2022 21:47:37 +0200
Subject: [PATCH 124/997] Merge duplicated rules

---
 test.sh | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/test.sh b/test.sh
index 8b390f95a4b9..9e69d14c0626 100755
--- a/test.sh
+++ b/test.sh
@@ -24,6 +24,7 @@ while [[ $# -gt 0 ]]; do
     case $1 in
         --release)
             codegen_channel=release
+            channel="release"
             shift
             ;;
         --release-sysroot)
@@ -40,10 +41,6 @@ while [[ $# -gt 0 ]]; do
             flags="$flags --features $1"
             shift
             ;;
-        --release)
-            channel="release"
-            shift
-            ;;
         "--test-rustc")
             func=test_rustc
             shift

From 161ccb36b1c1c6a98af153637c7ea244635c8e90 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 24 Jun 2022 19:27:53 -0400
Subject: [PATCH 125/997] Disable UI tests that fail on the rustc side

---
 test.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test.sh b/test.sh
index f2721c9c92c6..635641980d74 100755
--- a/test.sh
+++ b/test.sh
@@ -261,7 +261,7 @@ EOF
 
     git checkout -- src/test/ui/issues/auxiliary/issue-3136-a.rs # contains //~ERROR, but shouldn't be removed
 
-    rm -r src/test/ui/{abi*,extern/,panic-runtime/,panics/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,test*,*lto*.rs} || true
+    rm -r src/test/ui/{abi*,extern/,panic-runtime/,panics/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,chalkify/bugs/,test*,*lto*.rs,consts/const-float-bits-reject-conv.rs,consts/issue-miri-1910.rs} || true
     for test in $(rg --files-with-matches "catch_unwind|should_panic|thread|lto" src/test/ui); do
       rm $test
     done

From ed37ed7cb8dcb2855cd95166d45b753ffab112dc Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 24 Jun 2022 21:47:55 +0200
Subject: [PATCH 126/997] Simplify github actions conf

---
 .github/workflows/ci.yml | 52 +++++++++++++++++++++++++---------------
 test.sh                  | 29 +++++++++++++++-------
 2 files changed, 53 insertions(+), 28 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index d62ac47dedb6..3dbf8d922152 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -11,7 +11,10 @@ jobs:
     strategy:
       fail-fast: false
       matrix:
-        libgccjit_version: ["libgccjit.so", "libgccjit_without_int128.so", "libgccjit12.so"]
+        libgccjit_version:
+          - { gcc: "libgccjit.so", extra: "" }
+          - { gcc: "libgccjit_without_int128.so", extra: "" }
+          - { gcc: "libgccjit12.so", extra: "--no-default-features" }
 
     steps:
     - uses: actions/checkout@v2
@@ -28,7 +31,7 @@ jobs:
       uses: dawidd6/action-download-artifact@v2
       with:
           workflow: main.yml
-          name: ${{ matrix.libgccjit_version }}
+          name: ${{ matrix.libgccjit_version.gcc }}
           path: gcc-build
           repo: antoyo/gcc
           search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
@@ -78,19 +81,10 @@ jobs:
         key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
 
     - name: Build
-      if: matrix.libgccjit_version != 'libgccjit12.so'
       run: |
         ./prepare_build.sh
-        ./build.sh
-        cargo test
-        ./clean_all.sh
-
-    - name: Build
-      if: matrix.libgccjit_version == 'libgccjit12.so'
-      run: |
-        ./prepare_build.sh
-        ./build.sh --no-default-features
-        cargo test --no-default-features
+        ./build.sh ${{ matrix.libgccjit_version.extra }}
+        cargo test ${{ matrix.libgccjit_version.extra }}
         ./clean_all.sh
 
     - name: Prepare dependencies
@@ -106,8 +100,7 @@ jobs:
         command: build
         args: --release
 
-    - name: Test
-      if: matrix.libgccjit_version != 'libgccjit12.so'
+    - name: Test std_tests
       run: |
         # Enable backtraces for easier debugging
         export RUST_BACKTRACE=1
@@ -116,10 +109,9 @@ jobs:
         export COMPILE_RUNS=2
         export RUN_RUNS=2
 
-        ./test.sh --release
+        ./test.sh --release --clean --build-sysroot --std-tests ${{ matrix.libgccjit_version.extra }}
 
-    - name: Test
-      if: matrix.libgccjit_version == 'libgccjit12.so'
+    - name: Test test_libcore
       run: |
         # Enable backtraces for easier debugging
         export RUST_BACKTRACE=1
@@ -128,7 +120,29 @@ jobs:
         export COMPILE_RUNS=2
         export RUN_RUNS=2
 
-        ./test.sh --release --no-default-features
+        ./test.sh --release --test-libcore ${{ matrix.libgccjit_version.extra }}
+
+    - name: Test extended_sysroot_tests
+      run: |
+        # Enable backtraces for easier debugging
+        export RUST_BACKTRACE=1
+
+        # Reduce amount of benchmark runs as they are slow
+        export COMPILE_RUNS=2
+        export RUN_RUNS=2
+
+        ./test.sh --release --extended-tests ${{ matrix.libgccjit_version.extra }}
+
+    - name: Test test_rustc
+      run: |
+        # Enable backtraces for easier debugging
+        export RUST_BACKTRACE=1
+
+        # Reduce amount of benchmark runs as they are slow
+        export COMPILE_RUNS=2
+        export RUN_RUNS=2
+
+        ./test.sh --release --test-rustc ${{ matrix.libgccjit_version.extra }}
 
   duplicates:
     runs-on: ubuntu-latest
diff --git a/test.sh b/test.sh
index 9e69d14c0626..b4d10fa6e4d2 100755
--- a/test.sh
+++ b/test.sh
@@ -17,7 +17,7 @@ export LIBRARY_PATH="$GCC_PATH"
 flags=
 gcc_master_branch=1
 channel="debug"
-func=all
+funcs=()
 build_only=0
 
 while [[ $# -gt 0 ]]; do
@@ -42,32 +42,36 @@ while [[ $# -gt 0 ]]; do
             shift
             ;;
         "--test-rustc")
-            func=test_rustc
+            funcs+=(test_rustc)
             shift
             ;;
 
         "--test-libcore")
-            func=test_libcore
+            funcs+=(test_libcore)
             shift
             ;;
 
         "--clean-ui-tests")
-            func=clean_ui_tests
+            funcs+=(clean_ui_tests)
+            shift
+            ;;
+        "--clean")
+            funcs+=(clean)
             shift
             ;;
 
         "--std-tests")
-            func=std_tests
+            funcs+=(std_tests)
             shift
             ;;
 
         "--extended-tests")
-            func=extended_sysroot_tests
+            funcs+=(extended_sysroot_tests)
             shift
             ;;
 
         "--build-sysroot")
-            func=build_sysroot
+            funcs+=(build_sysroot)
             shift
             ;;
         "--build")
@@ -84,7 +88,6 @@ done
 if [[ $channel == "release" ]]; then
     export CHANNEL='release'
     CARGO_INCREMENTAL=1 cargo rustc --release $flags
-    shift
 else
     echo $LD_LIBRARY_PATH
     export CHANNEL='debug'
@@ -92,6 +95,7 @@ else
 fi
 
 if (( $build_only == 1 )); then
+    echo "Since it's `build-only`, exiting..."
     exit
 fi
 
@@ -285,4 +289,11 @@ function all() {
     test_rustc
 }
 
-$func
+if [ ${#funcs[@]} -eq 0 ]; then
+    echo "No command passed, running `--all`..."
+    all
+else
+    for t in ${funcs[@]}; do
+        $t
+    done
+fi

From 9a42e6b47412d09faaab685ab0a0706fbe13ba2e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 29 Jun 2022 15:38:13 +0200
Subject: [PATCH 127/997] Clean up environment variables

---
 .github/workflows/ci.yml | 32 ++++----------------------------
 1 file changed, 4 insertions(+), 28 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 3dbf8d922152..97ce8e31f879 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -4,6 +4,10 @@ on:
   - push
   - pull_request
 
+env:
+  # Enable backtraces for easier debugging
+  RUST_BACKTRACE: 1
+
 jobs:
   build:
     runs-on: ubuntu-latest
@@ -102,46 +106,18 @@ jobs:
 
     - name: Test std_tests
       run: |
-        # Enable backtraces for easier debugging
-        export RUST_BACKTRACE=1
-
-        # Reduce amount of benchmark runs as they are slow
-        export COMPILE_RUNS=2
-        export RUN_RUNS=2
-
         ./test.sh --release --clean --build-sysroot --std-tests ${{ matrix.libgccjit_version.extra }}
 
     - name: Test test_libcore
       run: |
-        # Enable backtraces for easier debugging
-        export RUST_BACKTRACE=1
-
-        # Reduce amount of benchmark runs as they are slow
-        export COMPILE_RUNS=2
-        export RUN_RUNS=2
-
         ./test.sh --release --test-libcore ${{ matrix.libgccjit_version.extra }}
 
     - name: Test extended_sysroot_tests
       run: |
-        # Enable backtraces for easier debugging
-        export RUST_BACKTRACE=1
-
-        # Reduce amount of benchmark runs as they are slow
-        export COMPILE_RUNS=2
-        export RUN_RUNS=2
-
         ./test.sh --release --extended-tests ${{ matrix.libgccjit_version.extra }}
 
     - name: Test test_rustc
       run: |
-        # Enable backtraces for easier debugging
-        export RUST_BACKTRACE=1
-
-        # Reduce amount of benchmark runs as they are slow
-        export COMPILE_RUNS=2
-        export RUN_RUNS=2
-
         ./test.sh --release --test-rustc ${{ matrix.libgccjit_version.extra }}
 
   duplicates:

From 4ef0d19becccb2ae84e1971bb440b0fb74e0f8b5 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 29 Jun 2022 15:40:11 +0200
Subject: [PATCH 128/997] Add --mini-tests option and run mini-tests in CI

---
 .github/workflows/ci.yml | 6 +++++-
 test.sh                  | 4 ++++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 97ce8e31f879..4e2647dd4273 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -104,9 +104,13 @@ jobs:
         command: build
         args: --release
 
+    - name: Test mini_tests
+      run: |
+        ./test.sh --release --clean --build-sysroot --mini-tests ${{ matrix.libgccjit_version.extra }}
+
     - name: Test std_tests
       run: |
-        ./test.sh --release --clean --build-sysroot --std-tests ${{ matrix.libgccjit_version.extra }}
+        ./test.sh --release --std-tests ${{ matrix.libgccjit_version.extra }}
 
     - name: Test test_libcore
       run: |
diff --git a/test.sh b/test.sh
index b4d10fa6e4d2..904434807c46 100755
--- a/test.sh
+++ b/test.sh
@@ -69,6 +69,10 @@ while [[ $# -gt 0 ]]; do
             funcs+=(extended_sysroot_tests)
             shift
             ;;
+        "--mini-tests")
+            funcs+=(mini_tests)
+            shift
+            ;;
 
         "--build-sysroot")
             funcs+=(build_sysroot)

From 18350b70abdce808c611d5c1e68752c8302c55a3 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 29 Jun 2022 17:35:57 +0200
Subject: [PATCH 129/997] Parallelize CI tests

---
 .github/workflows/ci.yml | 27 +++++++++------------------
 1 file changed, 9 insertions(+), 18 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 4e2647dd4273..4867db02b3fd 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -19,6 +19,13 @@ jobs:
           - { gcc: "libgccjit.so", extra: "" }
           - { gcc: "libgccjit_without_int128.so", extra: "" }
           - { gcc: "libgccjit12.so", extra: "--no-default-features" }
+        commands: [
+          "--mini-tests",
+          "--std-tests",
+          "--test-libcore",
+          "--extended-tests",
+          "--test-rustc",
+        ]
 
     steps:
     - uses: actions/checkout@v2
@@ -104,25 +111,9 @@ jobs:
         command: build
         args: --release
 
-    - name: Test mini_tests
+    - name: Run tests
       run: |
-        ./test.sh --release --clean --build-sysroot --mini-tests ${{ matrix.libgccjit_version.extra }}
-
-    - name: Test std_tests
-      run: |
-        ./test.sh --release --std-tests ${{ matrix.libgccjit_version.extra }}
-
-    - name: Test test_libcore
-      run: |
-        ./test.sh --release --test-libcore ${{ matrix.libgccjit_version.extra }}
-
-    - name: Test extended_sysroot_tests
-      run: |
-        ./test.sh --release --extended-tests ${{ matrix.libgccjit_version.extra }}
-
-    - name: Test test_rustc
-      run: |
-        ./test.sh --release --test-rustc ${{ matrix.libgccjit_version.extra }}
+        ./test.sh --release --clean --build-sysroot ${{ matrix.commands }} ${{ matrix.libgccjit_version.extra }}
 
   duplicates:
     runs-on: ubuntu-latest

From 9edaf82a0389aa3465659c4d0769bf2269975e07 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 26 Jun 2022 10:28:44 -0400
Subject: [PATCH 130/997] Add comment

---
 src/builder.rs | 2 ++
 src/lib.rs     | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/builder.rs b/src/builder.rs
index 9f6ffb9a610f..4aad171cb78e 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -222,6 +222,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                     else {
                         assert!(!((actual_ty.is_vector() && !expected_ty.is_vector()) || (!actual_ty.is_vector() && expected_ty.is_vector())), "{:?} ({}) -> {:?} ({}), index: {:?}[{}]", actual_ty, actual_ty.is_vector(), expected_ty, expected_ty.is_vector(), func_ptr, index);
                         // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
+                        // TODO: remove bitcast now that vector types can be compared?
                         self.bitcast(actual_val, expected_ty)
                     }
                 }
@@ -1497,6 +1498,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         // NOTE: sometimes, the type of else_val can be different than the type of then_val in
         // libgccjit (vector of int vs vector of int32_t), but they should be the same for the AND
         // operation to work.
+        // TODO: remove bitcast now that vector types can be compared?
         let else_val = self.context.new_bitcast(None, else_val, then_val.get_type());
         let else_vals = inverted_masks & else_val;
 
diff --git a/src/lib.rs b/src/lib.rs
index 5bfdeb8b93a4..b8db4c9540b7 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -1,7 +1,7 @@
 /*
  * TODO(antoyo): implement equality in libgccjit based on https://zpz.github.io/blog/overloading-equality-operator-in-cpp-class-hierarchy/ (for type equality?)
  * TODO(antoyo): support #[inline] attributes.
- * TODO(antoyo): support LTO (gcc's equivalent to Thin LTO is enabled by -fwhopr: https://stackoverflow.com/questions/64954525/does-gcc-have-thin-lto).
+ * TODO(antoyo): support LTO (gcc's equivalent to Full LTO is -flto -flto-partition=one — https://documentation.suse.com/sbp/all/html/SBP-GCC-10/index.html).
  *
  * TODO(antoyo): remove the patches.
  */

From 0ba53c821127f2b05f77f1a35f70d757272f0b54 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 30 Jun 2022 16:35:53 +0200
Subject: [PATCH 131/997] Split rustc tests in two

---
 .github/workflows/ci.yml |  7 ++++-
 failing-ui-tests.txt     | 55 ++++++++++++++++++++++++++++++++++++++++
 failing-ui-tests12.txt   | 17 +++++++++++++
 test.sh                  | 31 +++++++++++++++++++++-
 4 files changed, 108 insertions(+), 2 deletions(-)
 create mode 100644 failing-ui-tests.txt
 create mode 100644 failing-ui-tests12.txt

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 4867db02b3fd..2e69168dda8c 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -24,7 +24,8 @@ jobs:
           "--std-tests",
           "--test-libcore",
           "--extended-tests",
-          "--test-rustc",
+          "--test-successful-rustc",
+          "--test-failing-rustc",
         ]
 
     steps:
@@ -111,6 +112,10 @@ jobs:
         command: build
         args: --release
 
+    - name: Add more failing tests for GCC 12
+      if: ${{ matrix.libgccjit_version.gcc == 'libgccjit12.so' }}
+      run: cat failing-ui-tests12.txt >> failing-ui-tests.txt
+
     - name: Run tests
       run: |
         ./test.sh --release --clean --build-sysroot ${{ matrix.commands }} ${{ matrix.libgccjit_version.extra }}
diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
new file mode 100644
index 000000000000..717d0d39331f
--- /dev/null
+++ b/failing-ui-tests.txt
@@ -0,0 +1,55 @@
+src/test/ui/alloc-error/default-alloc-error-hook.rs
+src/test/ui/allocator/custom-in-block.rs
+src/test/ui/allocator/custom-in-submodule.rs
+src/test/ui/allocator/custom.rs
+src/test/ui/allocator/hygiene.rs
+src/test/ui/allocator/no_std-alloc-error-handler-custom.rs
+src/test/ui/allocator/no_std-alloc-error-handler-default.rs
+src/test/ui/allocator/xcrate-use.rs
+src/test/ui/allocator/xcrate-use2.rs
+src/test/ui/asm/may_unwind.rs
+src/test/ui/asm/x86_64/const.rs
+src/test/ui/asm/x86_64/multiple-clobber-abi.rs
+src/test/ui/async-await/async-fn-size-moved-locals.rs
+src/test/ui/async-await/async-fn-size-uninit-locals.rs
+src/test/ui/backtrace.rs
+src/test/ui/cfg/cfg-panic.rs
+src/test/ui/debuginfo/debuginfo-emit-llvm-ir-and-split-debuginfo.rs
+src/test/ui/functions-closures/parallel-codegen-closures.rs
+src/test/ui/generator/size-moved-locals.rs
+src/test/ui/issues/issue-32518.rs
+src/test/ui/issues/issue-47364.rs
+src/test/ui/issues/issue-74564-if-expr-stack-overflow.rs
+src/test/ui/linkage-attr/linkage1.rs
+src/test/ui/lto/dylib-works.rs
+src/test/ui/mir/mir_heavy_promoted.rs
+src/test/ui/numbers-arithmetic/saturating-float-casts.rs
+src/test/ui/polymorphization/promoted-function.rs
+src/test/ui/runtime/rt-explody-panic-payloads.rs
+src/test/ui/sepcomp/sepcomp-cci.rs
+src/test/ui/sepcomp/sepcomp-extern.rs
+src/test/ui/sepcomp/sepcomp-fns-backwards.rs
+src/test/ui/sepcomp/sepcomp-fns.rs
+src/test/ui/sepcomp/sepcomp-lib.rs
+src/test/ui/sepcomp/sepcomp-statics.rs
+src/test/ui/simd/generics.rs
+src/test/ui/simd/intrinsic/float-math-pass.rs
+src/test/ui/simd/intrinsic/float-minmax-pass.rs
+src/test/ui/simd/intrinsic/generic-arithmetic-pass.rs
+src/test/ui/simd/intrinsic/generic-as.rs
+src/test/ui/simd/intrinsic/generic-bitmask-pass.rs
+src/test/ui/simd/intrinsic/generic-comparison-pass.rs
+src/test/ui/simd/intrinsic/generic-gather-pass.rs
+src/test/ui/simd/intrinsic/generic-reduction-pass.rs
+src/test/ui/simd/intrinsic/generic-select-pass.rs
+src/test/ui/simd/issue-17170.rs
+src/test/ui/simd/issue-39720.rs
+src/test/ui/simd/issue-85915-simd-ptrs.rs
+src/test/ui/simd/issue-89193.rs
+src/test/ui/simd/libm_std_can_float.rs
+src/test/ui/simd/simd-bitmask.rs
+src/test/ui/simd/type-generic-monomorphisation-extern-nonnull-ptr.rs
+src/test/ui/sse2.rs
+src/test/ui/statics/issue-91050-1.rs
+src/test/ui/statics/issue-91050-2.rs
+src/test/ui/target-feature/missing-plusminus.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
new file mode 100644
index 000000000000..0a50c0a2ce13
--- /dev/null
+++ b/failing-ui-tests12.txt
@@ -0,0 +1,17 @@
+src/test/ui/intrinsics/const-eval-select-x86_64.rs
+src/test/ui/packed/packed-struct-drop-aligned.rs
+src/test/ui/packed/packed-struct-generic-layout.rs
+src/test/ui/packed/packed-struct-layout.rs
+src/test/ui/packed/packed-struct-optimized-enum.rs
+src/test/ui/packed/packed-struct-size.rs
+src/test/ui/packed/packed-struct-vec.rs
+src/test/ui/packed/packed-tuple-struct-layout.rs
+src/test/ui/simd/array-type.rs
+src/test/ui/simd/intrinsic/generic-arithmetic-saturating-pass.rs
+src/test/ui/simd/intrinsic/generic-cast-pass.rs
+src/test/ui/simd/intrinsic/generic-cast-pointer-width.rs
+src/test/ui/simd/intrinsic/generic-elements-pass.rs
+src/test/ui/simd/intrinsic/inlining-issue67557-ice.rs
+src/test/ui/simd/intrinsic/inlining-issue67557.rs
+src/test/ui/simd/monomorphize-shuffle-index.rs
+src/test/ui/simd/shuffle.rs
diff --git a/test.sh b/test.sh
index 4815704f10b7..32fe8cf0586b 100755
--- a/test.sh
+++ b/test.sh
@@ -42,7 +42,15 @@ while [[ $# -gt 0 ]]; do
             shift
             ;;
         "--test-rustc")
-            funcs+=(test_rustc)
+            funcs=(test_rustc)
+            shift
+            ;;
+        "--test-successful-rustc")
+            funcs+=(test_successful_rustc)
+            shift
+            ;;
+        "--test-failing-rustc")
+            funcs+=(test_failing_rustc)
             shift
             ;;
 
@@ -276,10 +284,31 @@ EOF
 
     RUSTC_ARGS="-Zpanic-abort-tests -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot -Cpanic=abort"
 
+    if [ $# -eq 0 ]; then
+        # No argument supplied to the function. Doing nothing.
+        echo "No argument provided. Keeping all UI tests"
+    elif [ $1 = "0" ]; then
+        # Removing the failing tests.
+        xargs -a ../failing-ui-tests.txt -d'\n' rm
+    else
+        # Removing all tests.
+        find src/test/ui -type f -name '*.rs' -exec rm {} \;
+        # Putting back only the failing ones.
+        xargs -a ../failing-ui-tests.txt -d'\n' git checkout --
+    fi
+
     echo "[TEST] rustc test suite"
     COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 src/test/ui/ --rustc-args "$RUSTC_ARGS"
 }
 
+function test_failing_rustc() {
+    test_rustc "1"
+}
+
+function test_successful_rustc() {
+    test_rustc "0"
+}
+
 function clean_ui_tests() {
     find rust/build/x86_64-unknown-linux-gnu/test/ui/ -name stamp -exec rm -rf {} \;
 }

From a69770308c195c88c14c2e3ff98a1adeecb9990a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 9 Jun 2022 22:14:33 -0400
Subject: [PATCH 132/997] Add patch to allow testing stdarch

---
 ...1-Add-stdarch-Cargo.toml-for-testing.patch | 39 +++++++++++++++++++
 1 file changed, 39 insertions(+)
 create mode 100644 patches/0001-Add-stdarch-Cargo.toml-for-testing.patch

diff --git a/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch b/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch
new file mode 100644
index 000000000000..93c63b5dcacf
--- /dev/null
+++ b/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch
@@ -0,0 +1,39 @@
+From c3821e02fbd6cb5ad6e06d759fccdc9073712375 Mon Sep 17 00:00:00 2001
+From: Antoni Boucher <bouanto@zoho.com>
+Date: Tue, 7 Jun 2022 21:40:13 -0400
+Subject: [PATCH] Add stdarch Cargo.toml for testing
+
+---
+ library/stdarch/Cargo.toml | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+ create mode 100644 library/stdarch/Cargo.toml
+
+diff --git a/library/stdarch/Cargo.toml b/library/stdarch/Cargo.toml
+new file mode 100644
+index 0000000..fbe0a95
+--- /dev/null
++++ b/library/stdarch/Cargo.toml
+@@ -0,0 +1,20 @@
++[workspace]
++members = [
++  "crates/core_arch",
++  "crates/std_detect",
++  "crates/stdarch-gen",
++  "examples/"
++]
++exclude = [
++  "crates/wasm-assert-instr-tests"
++]
++
++[profile.release]
++debug = true
++opt-level = 3
++incremental = true
++
++[profile.bench]
++debug = 1
++opt-level = 3
++incremental = true
+-- 
+2.26.2.7.g19db9cfb68.dirty
+

From 1777cdd644c67d82f306142ef77cce6f33719f54 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 9 Jun 2022 22:15:24 -0400
Subject: [PATCH 133/997] Add antoyo in TODOs

---
 src/intrinsic/simd.rs | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 8f9862414e60..842b4a92080c 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -216,7 +216,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let variable = bx.current_func().new_local(None, vector.get_type(), "new_vector");
         bx.llbb().add_assignment(None, variable, vector);
         let lvalue = bx.context.new_vector_access(None, variable.to_rvalue(), index);
-        // TODO: if simd_insert is constant, use BIT_REF.
+        // TODO(antoyo): if simd_insert is constant, use BIT_REF.
         bx.llbb().add_assignment(None, lvalue, value);
         return Ok(variable.to_rvalue());
     }
@@ -545,9 +545,9 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                 },
                 (true, true) => {
                     // Algorithm from: https://codereview.stackexchange.com/questions/115869/saturated-signed-addition
-                    // TODO: improve using conditional operators if possible.
+                    // TODO(antoyo): improve using conditional operators if possible.
                     let arg_type = lhs.get_type();
-                    // TODO: convert lhs and rhs to unsigned.
+                    // TODO(antoyo): convert lhs and rhs to unsigned.
                     let sum = lhs + rhs;
                     let vector_type = arg_type.dyncast_vector().expect("vector type");
                     let unit = vector_type.get_num_units();
@@ -581,7 +581,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                     // negative of the right operand. Find a proper subtraction algorithm.
                     let rhs = bx.context.new_unary_op(None, UnaryOp::Minus, arg_type, rhs);
 
-                    // TODO: convert lhs and rhs to unsigned.
+                    // TODO(antoyo): convert lhs and rhs to unsigned.
                     let sum = lhs + rhs;
                     let vector_type = arg_type.dyncast_vector().expect("vector type");
                     let unit = vector_type.get_num_units();

From 910ec42566c08819de7732bea910fa53f99fd530 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 19 Jun 2022 18:58:08 -0400
Subject: [PATCH 134/997] Fixes to make stdarch tests compile

---
 src/base.rs    | 22 ++++++++++++++++++++--
 src/builder.rs |  2 +-
 src/common.rs  | 14 ++++++++++++--
 3 files changed, 33 insertions(+), 5 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index 19c981309d75..2f688fd66b2a 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -83,7 +83,7 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         context.add_command_line_option("-mavx2");
         // FIXME(antoyo): the following causes an illegal instruction on vmovdqu64 in std_example on my CPU.
         // Only add if the CPU supports it.
-        /*context.add_command_line_option("-mavx512f");
+        context.add_command_line_option("-mavx512f");
         context.add_command_line_option("-msha");
         context.add_command_line_option("-mpclmul");
         context.add_command_line_option("-mfma");
@@ -91,7 +91,25 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         context.add_command_line_option("-mavx512vpopcntdq");
         context.add_command_line_option("-mavx512vl");
         context.add_command_line_option("-m64");
-        context.add_command_line_option("-mbmi");*/
+        context.add_command_line_option("-mbmi");
+        context.add_command_line_option("-mgfni");
+        context.add_command_line_option("-mavxvnni");
+        context.add_command_line_option("-mavx512vnni");
+        context.add_command_line_option("-mavx512bw");
+        context.add_command_line_option("-mf16c");
+        context.add_command_line_option("-mavx512bitalg");
+        context.add_command_line_option("-maes");
+        context.add_command_line_option("-mxsavec");
+        context.add_command_line_option("-mbmi2");
+        context.add_command_line_option("-mavx512bf16");
+        context.add_command_line_option("-mrtm");
+        context.add_command_line_option("-mvaes");
+        context.add_command_line_option("-mvpclmulqdq");
+        context.add_command_line_option("-mavx");
+        context.add_command_line_option("-mavx512vbmi2");
+        context.add_command_line_option("-mavx512vbmi");
+        context.add_command_line_option("-mavx512ifma");
+        context.add_command_line_option("-mavx512cd");
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
         }
diff --git a/src/builder.rs b/src/builder.rs
index 4aad171cb78e..08930387ccb2 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -213,7 +213,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
                 let actual_ty = actual_val.get_type();
                 if expected_ty != actual_ty {
-                    if !actual_ty.is_vector() && !expected_ty.is_vector() && actual_ty.is_integral() && expected_ty.is_integral() {
+                    if !actual_ty.is_vector() && !expected_ty.is_vector() && (actual_ty.is_integral() && expected_ty.is_integral()) || (actual_ty.get_pointee().is_some() && expected_ty.get_pointee().is_some()) {
                         self.context.new_cast(None, actual_val, expected_ty)
                     }
                     else if on_stack_param_indices.contains(&index) {
diff --git a/src/common.rs b/src/common.rs
index ce341406eaf4..e0e35bea782b 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -177,8 +177,18 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 }
 
                 let value = self.const_uint_big(self.type_ix(bitsize), data);
-                // TODO(bjorn3): assert size is correct
-                self.const_bitcast(value, ty)
+                let bytesize = layout.size(self).bytes();
+                if bitsize > 1 && ty.is_integral() && bytesize as u32 == ty.get_size() {
+                    // NOTE: since the intrinsic _xabort is called with a bitcast, which
+                    // is non-const, but expects a constant, do a normal cast instead of a bitcast.
+                    // FIXME(antoyo): fix bitcast to work in constant contexts.
+                    // TODO: perhaps only use bitcast for pointers?
+                    self.context.new_cast(None, value, ty)
+                }
+                else {
+                    // TODO(bjorn3): assert size is correct
+                    self.const_bitcast(value, ty)
+                }
             }
             Scalar::Ptr(ptr, _size) => {
                 let (alloc_id, offset) = ptr.into_parts();

From 4094923789f99cc64b5a8c9353d232a22b820a93 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 19 Jun 2022 20:19:26 -0400
Subject: [PATCH 135/997] Disable avx512

---
 src/base.rs | 22 +++++++++++-----------
 src/lib.rs  |  2 +-
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index 2f688fd66b2a..943001423844 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -83,33 +83,33 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         context.add_command_line_option("-mavx2");
         // FIXME(antoyo): the following causes an illegal instruction on vmovdqu64 in std_example on my CPU.
         // Only add if the CPU supports it.
-        context.add_command_line_option("-mavx512f");
+        //context.add_command_line_option("-mavx512f");
         context.add_command_line_option("-msha");
         context.add_command_line_option("-mpclmul");
         context.add_command_line_option("-mfma");
         context.add_command_line_option("-mfma4");
-        context.add_command_line_option("-mavx512vpopcntdq");
-        context.add_command_line_option("-mavx512vl");
+        //context.add_command_line_option("-mavx512vpopcntdq");
+        //context.add_command_line_option("-mavx512vl");
         context.add_command_line_option("-m64");
         context.add_command_line_option("-mbmi");
         context.add_command_line_option("-mgfni");
         context.add_command_line_option("-mavxvnni");
-        context.add_command_line_option("-mavx512vnni");
-        context.add_command_line_option("-mavx512bw");
+        //context.add_command_line_option("-mavx512vnni");
+        //context.add_command_line_option("-mavx512bw");
         context.add_command_line_option("-mf16c");
-        context.add_command_line_option("-mavx512bitalg");
+        //context.add_command_line_option("-mavx512bitalg");
         context.add_command_line_option("-maes");
         context.add_command_line_option("-mxsavec");
         context.add_command_line_option("-mbmi2");
-        context.add_command_line_option("-mavx512bf16");
+        //context.add_command_line_option("-mavx512bf16");
         context.add_command_line_option("-mrtm");
         context.add_command_line_option("-mvaes");
         context.add_command_line_option("-mvpclmulqdq");
         context.add_command_line_option("-mavx");
-        context.add_command_line_option("-mavx512vbmi2");
-        context.add_command_line_option("-mavx512vbmi");
-        context.add_command_line_option("-mavx512ifma");
-        context.add_command_line_option("-mavx512cd");
+        //context.add_command_line_option("-mavx512vbmi2");
+        //context.add_command_line_option("-mavx512vbmi");
+        //context.add_command_line_option("-mavx512ifma");
+        //context.add_command_line_option("-mavx512cd");
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
         }
diff --git a/src/lib.rs b/src/lib.rs
index b8db4c9540b7..f83c1e536357 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -304,7 +304,7 @@ pub fn target_features(sess: &Session) -> Vec<Symbol> {
             // Probably using the equivalent of __builtin_cpu_supports.
             #[cfg(feature="master")]
             {
-                _feature.contains("sse") || _feature.contains("avx")
+                (_feature.contains("sse") || _feature.contains("avx")) && !_feature.contains("avx512")
             }
             #[cfg(not(feature="master"))]
             {

From 1c4ca283df4e918ce2fdba1c5826c957a8daad3d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 22 Jun 2022 17:48:54 -0400
Subject: [PATCH 136/997] Support #[target(enable)] function attribute

---
 Cargo.lock        |   9 +++-
 Cargo.toml        |   5 +-
 src/attributes.rs | 114 ++++++++++++++++++++++++++++++++++++++++++++++
 src/base.rs       |  28 +++++++-----
 src/callee.rs     |   7 ++-
 src/declare.rs    |   5 +-
 src/lib.rs        |  22 +++++++++
 src/mono_item.rs  |   5 +-
 8 files changed, 174 insertions(+), 21 deletions(-)
 create mode 100644 src/attributes.rs

diff --git a/Cargo.lock b/Cargo.lock
index 6df2102470fe..e52e742ec6ce 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,6 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#bdb86fb5092895ff5589726b33250010c64d93f6"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +48,6 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#bdb86fb5092895ff5589726b33250010c64d93f6"
 dependencies = [
  "libc 0.1.12",
 ]
@@ -215,6 +213,7 @@ dependencies = [
  "ar",
  "gccjit",
  "lang_tester",
+ "smallvec",
  "target-lexicon",
  "tempfile",
 ]
@@ -228,6 +227,12 @@ dependencies = [
  "winapi-util",
 ]
 
+[[package]]
+name = "smallvec"
+version = "1.8.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f2dd574626839106c320a323308629dcb1acfc96e32a8cba364ddc61ac23ee83"
+
 [[package]]
 name = "target-lexicon"
 version = "0.10.0"
diff --git a/Cargo.toml b/Cargo.toml
index 211d19a8dc89..26a0e92923d5 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,11 +22,12 @@ default = ["master"]
 master = ["gccjit/master"]
 
 [dependencies]
-gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
+#gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
 
 # Local copy.
-#gccjit = { path = "../gccjit.rs" }
+gccjit = { path = "../gccjit.rs" }
 
+smallvec = { version = "1.6.1", features = ["union", "may_dangle"] }
 target-lexicon = "0.10.0"
 
 ar = "0.8.0"
diff --git a/src/attributes.rs b/src/attributes.rs
new file mode 100644
index 000000000000..c52b10ee20a8
--- /dev/null
+++ b/src/attributes.rs
@@ -0,0 +1,114 @@
+use gccjit::{FnAttribute, Function};
+use rustc_attr::InstructionSetAttr;
+use rustc_codegen_ssa::target_features::tied_target_features;
+use rustc_data_structures::fx::FxHashMap;
+use rustc_middle::ty;
+use rustc_session::Session;
+use rustc_span::symbol::sym;
+use smallvec::{smallvec, SmallVec};
+
+use crate::context::CodegenCx;
+
+// Given a map from target_features to whether they are enabled or disabled,
+// ensure only valid combinations are allowed.
+pub fn check_tied_features(
+    sess: &Session,
+    features: &FxHashMap<&str, bool>,
+) -> Option<&'static [&'static str]> {
+    for tied in tied_target_features(sess) {
+        // Tied features must be set to the same value, or not set at all
+        let mut tied_iter = tied.iter();
+        let enabled = features.get(tied_iter.next().unwrap());
+        if tied_iter.any(|f| enabled != features.get(f)) {
+            return Some(tied);
+        }
+    }
+    None
+}
+
+// TODO: maybe move to a new module gcc_util.
+// To find a list of GCC's names, check https://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html
+fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]> {
+    let arch = if sess.target.arch == "x86_64" { "x86" } else { &*sess.target.arch };
+    match (arch, s) {
+        ("x86", "sse4.2") => smallvec!["sse4.2", "crc32"],
+        ("x86", "pclmulqdq") => smallvec!["pclmul"],
+        ("x86", "rdrand") => smallvec!["rdrnd"],
+        ("x86", "bmi1") => smallvec!["bmi"],
+        ("x86", "cmpxchg16b") => smallvec!["cx16"],
+        ("x86", "avx512vaes") => smallvec!["vaes"],
+        ("x86", "avx512gfni") => smallvec!["gfni"],
+        ("x86", "avx512vpclmulqdq") => smallvec!["vpclmulqdq"],
+        // NOTE: seems like GCC requires 'avx512bw' for 'avx512vbmi2'.
+        ("x86", "avx512vbmi2") => smallvec!["avx512vbmi2", "avx512bw"],
+        // NOTE: seems like GCC requires 'avx512bw' for 'avx512bitalg'.
+        ("x86", "avx512bitalg") => smallvec!["avx512bitalg", "avx512bw"],
+        ("aarch64", "rcpc2") => smallvec!["rcpc-immo"],
+        ("aarch64", "dpb") => smallvec!["ccpp"],
+        ("aarch64", "dpb2") => smallvec!["ccdp"],
+        ("aarch64", "frintts") => smallvec!["fptoint"],
+        ("aarch64", "fcma") => smallvec!["complxnum"],
+        ("aarch64", "pmuv3") => smallvec!["perfmon"],
+        ("aarch64", "paca") => smallvec!["pauth"],
+        ("aarch64", "pacg") => smallvec!["pauth"],
+        // Rust ties fp and neon together. In LLVM neon implicitly enables fp,
+        // but we manually enable neon when a feature only implicitly enables fp
+        ("aarch64", "f32mm") => smallvec!["f32mm", "neon"],
+        ("aarch64", "f64mm") => smallvec!["f64mm", "neon"],
+        ("aarch64", "fhm") => smallvec!["fp16fml", "neon"],
+        ("aarch64", "fp16") => smallvec!["fullfp16", "neon"],
+        ("aarch64", "jsconv") => smallvec!["jsconv", "neon"],
+        ("aarch64", "sve") => smallvec!["sve", "neon"],
+        ("aarch64", "sve2") => smallvec!["sve2", "neon"],
+        ("aarch64", "sve2-aes") => smallvec!["sve2-aes", "neon"],
+        ("aarch64", "sve2-sm4") => smallvec!["sve2-sm4", "neon"],
+        ("aarch64", "sve2-sha3") => smallvec!["sve2-sha3", "neon"],
+        ("aarch64", "sve2-bitperm") => smallvec!["sve2-bitperm", "neon"],
+        (_, s) => smallvec![s],
+    }
+}
+
+/// Composite function which sets GCC attributes for function depending on its AST (`#[attribute]`)
+/// attributes.
+pub fn from_fn_attrs<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    func: Function<'gcc>,
+    instance: ty::Instance<'tcx>,
+) {
+    let codegen_fn_attrs = cx.tcx.codegen_fn_attrs(instance.def_id());
+
+    let function_features =
+        codegen_fn_attrs.target_features.iter().map(|f| f.as_str()).collect::<Vec<&str>>();
+
+    if let Some(f) = check_tied_features(cx.tcx.sess, &function_features.iter().map(|f| (*f, true)).collect()) {
+        let span = cx.tcx
+            .get_attr(instance.def_id(), sym::target_feature)
+            .map_or_else(|| cx.tcx.def_span(instance.def_id()), |a| a.span);
+        let msg = format!(
+            "the target features {} must all be either enabled or disabled together",
+            f.join(", ")
+        );
+        let mut err = cx.tcx.sess.struct_span_err(span, &msg);
+        err.help("add the missing features in a `target_feature` attribute");
+        err.emit();
+        return;
+    }
+
+    let mut function_features = function_features
+        .iter()
+        .flat_map(|feat| to_gcc_features(cx.tcx.sess, feat).into_iter())
+        .chain(codegen_fn_attrs.instruction_set.iter().map(|x| match x {
+            InstructionSetAttr::ArmA32 => "-thumb-mode", // TODO: support removing feature.
+            InstructionSetAttr::ArmT32 => "thumb-mode",
+        }))
+        .collect::<Vec<_>>();
+
+    // TODO(antoyo): check if we really need global backend features. (Maybe they could be applied
+    // globally?)
+    let mut global_features = cx.tcx.global_backend_features(()).iter().map(|s| s.as_str());
+    function_features.extend(&mut global_features);
+    let target_features = function_features.join(",");
+    if !target_features.is_empty() {
+        func.add_attribute(FnAttribute::Target, &target_features);
+    }
+}
diff --git a/src/base.rs b/src/base.rs
index 943001423844..2f77978df1ed 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -79,37 +79,41 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
         // TODO(antoyo): only add the following cli argument if the feature is supported.
-        context.add_command_line_option("-msse2");
+        /*context.add_command_line_option("-msse2");
         context.add_command_line_option("-mavx2");
         // FIXME(antoyo): the following causes an illegal instruction on vmovdqu64 in std_example on my CPU.
         // Only add if the CPU supports it.
-        //context.add_command_line_option("-mavx512f");
         context.add_command_line_option("-msha");
         context.add_command_line_option("-mpclmul");
         context.add_command_line_option("-mfma");
         context.add_command_line_option("-mfma4");
-        //context.add_command_line_option("-mavx512vpopcntdq");
-        //context.add_command_line_option("-mavx512vl");
         context.add_command_line_option("-m64");
         context.add_command_line_option("-mbmi");
         context.add_command_line_option("-mgfni");
         context.add_command_line_option("-mavxvnni");
-        //context.add_command_line_option("-mavx512vnni");
-        //context.add_command_line_option("-mavx512bw");
         context.add_command_line_option("-mf16c");
-        //context.add_command_line_option("-mavx512bitalg");
         context.add_command_line_option("-maes");
         context.add_command_line_option("-mxsavec");
         context.add_command_line_option("-mbmi2");
-        //context.add_command_line_option("-mavx512bf16");
         context.add_command_line_option("-mrtm");
         context.add_command_line_option("-mvaes");
         context.add_command_line_option("-mvpclmulqdq");
         context.add_command_line_option("-mavx");
-        //context.add_command_line_option("-mavx512vbmi2");
-        //context.add_command_line_option("-mavx512vbmi");
-        //context.add_command_line_option("-mavx512ifma");
-        //context.add_command_line_option("-mavx512cd");
+
+        if env::var("CG_GCCJIT_ENABLE_AVX512").as_deref() == Ok("1") {
+            context.add_command_line_option("-mavx512f");
+            context.add_command_line_option("-mavx512vpopcntdq");
+            context.add_command_line_option("-mavx512vl");
+            context.add_command_line_option("-mavx512vnni");
+            context.add_command_line_option("-mavx512bw");
+            context.add_command_line_option("-mavx512bitalg");
+            context.add_command_line_option("-mavx512bf16");
+            context.add_command_line_option("-mavx512vbmi2");
+            context.add_command_line_option("-mavx512vbmi");
+            context.add_command_line_option("-mavx512ifma");
+            context.add_command_line_option("-mavx512cd");
+        }*/
+
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
         }
diff --git a/src/callee.rs b/src/callee.rs
index 76419b103d04..5557f886b287 100644
--- a/src/callee.rs
+++ b/src/callee.rs
@@ -4,6 +4,7 @@ use rustc_middle::ty::{self, Instance, TypeFoldable};
 use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt};
 
 use crate::abi::FnAbiGccExt;
+use crate::attributes;
 use crate::context::CodegenCx;
 
 /// Codegens a reference to a fn/method item, monomorphizing and
@@ -67,8 +68,12 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
             cx.linkage.set(FunctionType::Extern);
             let func = cx.declare_fn(&sym, &fn_abi);
 
+            attributes::from_fn_attrs(cx, func, instance);
+
             // TODO(antoyo): set linkage and attributes.
-            func
+
+            // FIXME(antoyo): this is a wrong cast. That requires changing the compiler API.
+            unsafe { std::mem::transmute(func) }
         };
 
     cx.function_instances.borrow_mut().insert(instance, func);
diff --git a/src/declare.rs b/src/declare.rs
index a619e2f77125..5f6360a7da53 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -79,12 +79,11 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         unsafe { std::mem::transmute(func) }
     }
 
-    pub fn declare_fn(&self, name: &str, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> RValue<'gcc> {
+    pub fn declare_fn(&self, name: &str, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Function<'gcc> {
         let (return_type, params, variadic, on_stack_param_indices) = fn_abi.gcc_type(self);
         let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, &params, variadic);
         self.on_stack_function_params.borrow_mut().insert(func, on_stack_param_indices);
-        // FIXME(antoyo): this is a wrong cast. That requires changing the compiler API.
-        unsafe { std::mem::transmute(func) }
+        func
     }
 
     pub fn define_global(&self, name: &str, ty: Type<'gcc>, is_tls: bool, link_section: Option<Symbol>) -> LValue<'gcc> {
diff --git a/src/lib.rs b/src/lib.rs
index f83c1e536357..1ca2394abdc2 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -13,6 +13,7 @@
 #![warn(unused_lifetimes)]
 
 extern crate rustc_ast;
+extern crate rustc_attr;
 extern crate rustc_codegen_ssa;
 extern crate rustc_data_structures;
 extern crate rustc_errors;
@@ -32,6 +33,7 @@ mod abi;
 mod allocator;
 mod archive;
 mod asm;
+mod attributes;
 mod back;
 mod base;
 mod builder;
@@ -188,6 +190,24 @@ pub struct GccContext {
     context: Context<'static>,
 }
 
+impl GccContext {
+    fn new<'tcx>(tcx: TyCtxt<'tcx>) -> Self {
+        let context = create_context(tcx);
+        Self {
+            context,
+        }
+    }
+}
+
+fn create_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
+    let context = Context::default();
+    if tcx.sess.target.is_builtin {
+        //let features = global_gcc_features(sess, false);
+        println!("Features: {:?}", tcx.sess.opts.cg.target_feature);
+    }
+    context
+}
+
 unsafe impl Send for GccContext {}
 // FIXME(antoyo): that shouldn't be Sync. Parallel compilation is currently disabled with "-Zno-parallel-llvm". Try to disable it here.
 unsafe impl Sync for GccContext {}
@@ -302,6 +322,8 @@ pub fn target_features(sess: &Session) -> Vec<Symbol> {
         .filter(|_feature| {
             // TODO(antoyo): implement a way to get enabled feature in libgccjit.
             // Probably using the equivalent of __builtin_cpu_supports.
+            // TODO: maybe use whatever outputs the following command:
+            // gcc -march=native -Q --help=target
             #[cfg(feature="master")]
             {
                 (_feature.contains("sse") || _feature.contains("avx")) && !_feature.contains("avx512")
diff --git a/src/mono_item.rs b/src/mono_item.rs
index e21d40b6c37e..60a42846bd3d 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -5,6 +5,7 @@ use rustc_middle::ty::{self, Instance, TypeFoldable};
 use rustc_middle::ty::layout::{FnAbiOf, LayoutOf};
 use rustc_span::def_id::DefId;
 
+use crate::attributes;
 use crate::base;
 use crate::context::CodegenCx;
 use crate::type_of::LayoutGccExt;
@@ -28,9 +29,11 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
         let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
         self.linkage.set(base::linkage_to_gcc(linkage));
-        let _decl = self.declare_fn(symbol_name, &fn_abi);
+        let decl = self.declare_fn(symbol_name, &fn_abi);
         //let attrs = self.tcx.codegen_fn_attrs(instance.def_id());
 
+        attributes::from_fn_attrs(self, decl, instance);
+
         // TODO(antoyo): call set_link_section() to allow initializing argc/argv.
         // TODO(antoyo): set unique comdat.
         // TODO(antoyo): use inline attribute from there in linkage.set() above.

From 6205f1a0c590381bef30a6faf6bd55ba13d9c05a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 26 Jun 2022 11:00:04 -0400
Subject: [PATCH 137/997] Reenable target flags

---
 src/base.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index 2f77978df1ed..84d48d8591a7 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -79,7 +79,7 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
         // TODO(antoyo): only add the following cli argument if the feature is supported.
-        /*context.add_command_line_option("-msse2");
+        context.add_command_line_option("-msse2");
         context.add_command_line_option("-mavx2");
         // FIXME(antoyo): the following causes an illegal instruction on vmovdqu64 in std_example on my CPU.
         // Only add if the CPU supports it.
@@ -112,7 +112,7 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
             context.add_command_line_option("-mavx512vbmi");
             context.add_command_line_option("-mavx512ifma");
             context.add_command_line_option("-mavx512cd");
-        }*/
+        }
 
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);

From 9db55d2f54e869be328c2f0926786f8fd0ec84a4 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 26 Jun 2022 14:28:06 -0400
Subject: [PATCH 138/997] Fix vector comparison now returning a vector of
 integers

---
 src/builder.rs | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/src/builder.rs b/src/builder.rs
index 08930387ccb2..867fd531f504 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1490,6 +1490,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let zeros = self.context.new_rvalue_from_vector(None, cond_type, &zeros);
 
         let masks = self.context.new_comparison(None, ComparisonOp::NotEquals, cond, zeros);
+        // NOTE: masks is a vector of integers, but the values can be vectors of floats, so use bitcast to make
+        // the & operation work.
+        let masks = self.bitcast_if_needed(masks, then_val.get_type());
         let then_vals = masks & then_val;
 
         let ones = vec![self.context.new_rvalue_one(element_type); num_units];
@@ -1509,6 +1512,16 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 fn difference_or_zero<'gcc>(a: RValue<'gcc>, b: RValue<'gcc>, context: &'gcc Context<'gcc>) -> RValue<'gcc> {
     let difference = a - b;
     let masks = context.new_comparison(None, ComparisonOp::GreaterThanEquals, b, a);
+    // NOTE: masks is a vector of integers, but the values can be vectors of floats, so use bitcast to make
+    // the & operation work.
+    let a_type = a.get_type();
+    let masks =
+        if masks.get_type() != a_type {
+            context.new_bitcast(None, masks, a_type)
+        }
+        else {
+            masks
+        };
     difference & masks
 }
 

From 85036a5afaa0fc7926c91e8d3f557661864833f1 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 29 Jun 2022 21:05:40 -0400
Subject: [PATCH 139/997] Use gccjit from repo

---
 Cargo.lock | 2 ++
 Cargo.toml | 4 ++--
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index e52e742ec6ce..ff09a08b5afe 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,6 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
+source = "git+https://github.com/antoyo/gccjit.rs#a8997afb665dc467c1bdbddf04877143683f0cce"
 dependencies = [
  "gccjit_sys",
 ]
@@ -48,6 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
+source = "git+https://github.com/antoyo/gccjit.rs#a8997afb665dc467c1bdbddf04877143683f0cce"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 26a0e92923d5..3ac354ea4942 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,10 +22,10 @@ default = ["master"]
 master = ["gccjit/master"]
 
 [dependencies]
-#gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
+gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
 
 # Local copy.
-gccjit = { path = "../gccjit.rs" }
+#gccjit = { path = "../gccjit.rs" }
 
 smallvec = { version = "1.6.1", features = ["union", "may_dangle"] }
 target-lexicon = "0.10.0"

From 16ca66d66439a29b38369e60ba7259b338fbedfc Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 29 Jun 2022 21:06:00 -0400
Subject: [PATCH 140/997] Fix build only

---
 test.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test.sh b/test.sh
index 32fe8cf0586b..5258775a6d51 100755
--- a/test.sh
+++ b/test.sh
@@ -107,7 +107,7 @@ else
 fi
 
 if (( $build_only == 1 )); then
-    echo "Since it's `build-only`, exiting..."
+    echo "Since it's 'build-only', exiting..."
     exit
 fi
 

From d19a5ea868968ddf1ad65fee1e7a85191388aa69 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 29 Jun 2022 21:10:20 -0400
Subject: [PATCH 141/997] Fix all command

---
 test.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test.sh b/test.sh
index 5258775a6d51..594b63dfd0d8 100755
--- a/test.sh
+++ b/test.sh
@@ -324,7 +324,7 @@ function all() {
 }
 
 if [ ${#funcs[@]} -eq 0 ]; then
-    echo "No command passed, running `--all`..."
+    echo "No command passed, running '--all'..."
     all
 else
     for t in ${funcs[@]}; do

From fea51f391ed91c487dda81d50389474b768441c7 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 29 Jun 2022 21:31:02 -0400
Subject: [PATCH 142/997] Fix warnings

---
 src/attributes.rs     |  6 +++++-
 src/base.rs           | 14 --------------
 src/intrinsic/llvm.rs |  2 +-
 src/intrinsic/simd.rs |  4 +++-
 src/lib.rs            | 18 ------------------
 5 files changed, 9 insertions(+), 35 deletions(-)

diff --git a/src/attributes.rs b/src/attributes.rs
index c52b10ee20a8..c9ba0ecb877a 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -1,4 +1,6 @@
-use gccjit::{FnAttribute, Function};
+#[cfg_attr(not(feature="master"), allow(unused_imports))]
+use gccjit::FnAttribute;
+use gccjit::Function;
 use rustc_attr::InstructionSetAttr;
 use rustc_codegen_ssa::target_features::tied_target_features;
 use rustc_data_structures::fx::FxHashMap;
@@ -72,6 +74,7 @@ fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]> {
 /// attributes.
 pub fn from_fn_attrs<'gcc, 'tcx>(
     cx: &CodegenCx<'gcc, 'tcx>,
+    #[cfg_attr(not(feature="master"), allow(unused_variables))]
     func: Function<'gcc>,
     instance: ty::Instance<'tcx>,
 ) {
@@ -109,6 +112,7 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
     function_features.extend(&mut global_features);
     let target_features = function_features.join(",");
     if !target_features.is_empty() {
+        #[cfg(feature="master")]
         func.add_attribute(FnAttribute::Target, &target_features);
     }
 }
diff --git a/src/base.rs b/src/base.rs
index 84d48d8591a7..9d81a01e7a61 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -100,20 +100,6 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         context.add_command_line_option("-mvpclmulqdq");
         context.add_command_line_option("-mavx");
 
-        if env::var("CG_GCCJIT_ENABLE_AVX512").as_deref() == Ok("1") {
-            context.add_command_line_option("-mavx512f");
-            context.add_command_line_option("-mavx512vpopcntdq");
-            context.add_command_line_option("-mavx512vl");
-            context.add_command_line_option("-mavx512vnni");
-            context.add_command_line_option("-mavx512bw");
-            context.add_command_line_option("-mavx512bitalg");
-            context.add_command_line_option("-mavx512bf16");
-            context.add_command_line_option("-mavx512vbmi2");
-            context.add_command_line_option("-mavx512vbmi");
-            context.add_command_line_option("-mavx512ifma");
-            context.add_command_line_option("-mavx512cd");
-        }
-
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
         }
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index f623bc5fb10c..f00c1b301097 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -287,9 +287,9 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
 pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc, 'tcx>, mut return_value: RValue<'gcc>, func_name: &str, args: &[RValue<'gcc>], args_adjusted: bool) -> RValue<'gcc> {
     match func_name {
         "__builtin_ia32_vfmaddss3_round" | "__builtin_ia32_vfmaddsd3_round" => {
-            let zero = builder.context.new_rvalue_zero(builder.int_type);
             #[cfg(feature="master")]
             {
+                let zero = builder.context.new_rvalue_zero(builder.int_type);
                 return_value = builder.context.new_vector_access(None, return_value, zero).to_rvalue();
             }
         },
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 842b4a92080c..9c2a1401a154 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -1,4 +1,6 @@
-use gccjit::{BinaryOp, RValue, Type, ToRValue, ComparisonOp, UnaryOp};
+#[cfg_attr(not(feature="master"), allow(unused_imports))]
+use gccjit::{ToRValue, ComparisonOp, UnaryOp};
+use gccjit::{BinaryOp, RValue, Type};
 use rustc_codegen_ssa::base::compare_simd_types;
 use rustc_codegen_ssa::common::{TypeKind, span_invalid_monomorphization_error};
 use rustc_codegen_ssa::mir::operand::OperandRef;
diff --git a/src/lib.rs b/src/lib.rs
index 1ca2394abdc2..cb1d848eb670 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -190,24 +190,6 @@ pub struct GccContext {
     context: Context<'static>,
 }
 
-impl GccContext {
-    fn new<'tcx>(tcx: TyCtxt<'tcx>) -> Self {
-        let context = create_context(tcx);
-        Self {
-            context,
-        }
-    }
-}
-
-fn create_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
-    let context = Context::default();
-    if tcx.sess.target.is_builtin {
-        //let features = global_gcc_features(sess, false);
-        println!("Features: {:?}", tcx.sess.opts.cg.target_feature);
-    }
-    context
-}
-
 unsafe impl Send for GccContext {}
 // FIXME(antoyo): that shouldn't be Sync. Parallel compilation is currently disabled with "-Zno-parallel-llvm". Try to disable it here.
 unsafe impl Sync for GccContext {}

From b14b440f3aa54eb4a58d803a28fe19cf9abf7734 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 30 Jun 2022 17:19:01 -0400
Subject: [PATCH 143/997] Format

---
 src/attributes.rs | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/src/attributes.rs b/src/attributes.rs
index c9ba0ecb877a..4937e475944c 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -13,15 +13,12 @@ use crate::context::CodegenCx;
 
 // Given a map from target_features to whether they are enabled or disabled,
 // ensure only valid combinations are allowed.
-pub fn check_tied_features(
-    sess: &Session,
-    features: &FxHashMap<&str, bool>,
-) -> Option<&'static [&'static str]> {
+pub fn check_tied_features(sess: &Session, features: &FxHashMap<&str, bool>) -> Option<&'static [&'static str]> {
     for tied in tied_target_features(sess) {
         // Tied features must be set to the same value, or not set at all
         let mut tied_iter = tied.iter();
         let enabled = features.get(tied_iter.next().unwrap());
-        if tied_iter.any(|f| enabled != features.get(f)) {
+        if tied_iter.any(|feature| enabled != features.get(feature)) {
             return Some(tied);
         }
     }
@@ -81,16 +78,13 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
     let codegen_fn_attrs = cx.tcx.codegen_fn_attrs(instance.def_id());
 
     let function_features =
-        codegen_fn_attrs.target_features.iter().map(|f| f.as_str()).collect::<Vec<&str>>();
+        codegen_fn_attrs.target_features.iter().map(|features| features.as_str()).collect::<Vec<&str>>();
 
-    if let Some(f) = check_tied_features(cx.tcx.sess, &function_features.iter().map(|f| (*f, true)).collect()) {
+    if let Some(features) = check_tied_features(cx.tcx.sess, &function_features.iter().map(|features| (*features, true)).collect()) {
         let span = cx.tcx
             .get_attr(instance.def_id(), sym::target_feature)
             .map_or_else(|| cx.tcx.def_span(instance.def_id()), |a| a.span);
-        let msg = format!(
-            "the target features {} must all be either enabled or disabled together",
-            f.join(", ")
-        );
+        let msg = format!("the target features {} must all be either enabled or disabled together", features.join(", "));
         let mut err = cx.tcx.sess.struct_span_err(span, &msg);
         err.help("add the missing features in a `target_feature` attribute");
         err.emit();

From 5f4777e55da380a97336d09ca61ea615ef1dd315 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 6 Jul 2022 23:05:14 -0400
Subject: [PATCH 144/997] Add name in TODO

---
 src/attributes.rs | 4 ++--
 src/common.rs     | 2 +-
 src/lib.rs        | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/attributes.rs b/src/attributes.rs
index 4937e475944c..e570b583decb 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -25,7 +25,7 @@ pub fn check_tied_features(sess: &Session, features: &FxHashMap<&str, bool>) ->
     None
 }
 
-// TODO: maybe move to a new module gcc_util.
+// TODO(antoyo): maybe move to a new module gcc_util.
 // To find a list of GCC's names, check https://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html
 fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]> {
     let arch = if sess.target.arch == "x86_64" { "x86" } else { &*sess.target.arch };
@@ -95,7 +95,7 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
         .iter()
         .flat_map(|feat| to_gcc_features(cx.tcx.sess, feat).into_iter())
         .chain(codegen_fn_attrs.instruction_set.iter().map(|x| match x {
-            InstructionSetAttr::ArmA32 => "-thumb-mode", // TODO: support removing feature.
+            InstructionSetAttr::ArmA32 => "-thumb-mode", // TODO(antoyo): support removing feature.
             InstructionSetAttr::ArmT32 => "thumb-mode",
         }))
         .collect::<Vec<_>>();
diff --git a/src/common.rs b/src/common.rs
index e0e35bea782b..d55ad87e19bf 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -182,7 +182,7 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                     // NOTE: since the intrinsic _xabort is called with a bitcast, which
                     // is non-const, but expects a constant, do a normal cast instead of a bitcast.
                     // FIXME(antoyo): fix bitcast to work in constant contexts.
-                    // TODO: perhaps only use bitcast for pointers?
+                    // TODO(antoyo): perhaps only use bitcast for pointers?
                     self.context.new_cast(None, value, ty)
                 }
                 else {
diff --git a/src/lib.rs b/src/lib.rs
index cb1d848eb670..b3cbf344ad13 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -304,7 +304,7 @@ pub fn target_features(sess: &Session) -> Vec<Symbol> {
         .filter(|_feature| {
             // TODO(antoyo): implement a way to get enabled feature in libgccjit.
             // Probably using the equivalent of __builtin_cpu_supports.
-            // TODO: maybe use whatever outputs the following command:
+            // TODO(antoyo): maybe use whatever outputs the following command:
             // gcc -march=native -Q --help=target
             #[cfg(feature="master")]
             {

From 50f359c8a189c55e6db5842cb7ec16e801912e68 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 7 Jul 2022 21:34:38 +0200
Subject: [PATCH 145/997] Split tests to have faster CI

---
 .github/workflows/ci.yml |  7 +++-
 test.sh                  | 82 ++++++++++++++++++++++++++++++++++------
 2 files changed, 76 insertions(+), 13 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 2e69168dda8c..22f67a04e0b8 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -23,8 +23,11 @@ jobs:
           "--mini-tests",
           "--std-tests",
           "--test-libcore",
-          "--extended-tests",
-          "--test-successful-rustc",
+          "--extended-rand-tests",
+          "--extended-regex-example-tests",
+          "--extended-regex-tests",
+          "--test-successful-rustc --nb-parts 2 --current-part 0",
+          "--test-successful-rustc --nb-parts 2 --current-part 1",
           "--test-failing-rustc",
         ]
 
diff --git a/test.sh b/test.sh
index 594b63dfd0d8..dea9fe412e9a 100755
--- a/test.sh
+++ b/test.sh
@@ -19,6 +19,8 @@ gcc_master_branch=1
 channel="debug"
 funcs=()
 build_only=0
+nb_parts=0
+current_part=0
 
 while [[ $# -gt 0 ]]; do
     case $1 in
@@ -77,6 +79,19 @@ while [[ $# -gt 0 ]]; do
             funcs+=(extended_sysroot_tests)
             shift
             ;;
+        "--extended-rand-tests")
+            funcs+=(extended_rand_tests)
+            shift
+            ;;
+        "--extended-regex-example-tests")
+            funcs+=(extended_regex_example_tests)
+            shift
+            ;;
+        "--extended-regex-tests")
+            funcs+=(extended_regex_tests)
+            shift
+            ;;
+
         "--mini-tests")
             funcs+=(mini_tests)
             shift
@@ -90,6 +105,16 @@ while [[ $# -gt 0 ]]; do
             build_only=1
             shift
             ;;
+        "--nb-parts")
+            shift
+            nb_parts=$1
+            shift
+            ;;
+        "--current-part")
+            shift
+            current_part=$1
+            shift
+            ;;
         *)
             echo "Unknown option $1"
             exit 1
@@ -200,7 +225,7 @@ function test_libcore() {
 #echo "[BENCH RUN] mod_bench"
 #hyperfine --runs ${RUN_RUNS:-10} ./target/out/mod_bench{,_inline} ./target/out/mod_bench_llvm_*
 
-function extended_sysroot_tests() {
+function extended_rand_tests() {
     if (( $gcc_master_branch == 0 )); then
         return
     fi
@@ -210,17 +235,12 @@ function extended_sysroot_tests() {
     echo "[TEST] rust-random/rand"
     ../cargo.sh test --workspace
     popd
+}
 
-    #pushd simple-raytracer
-    #echo "[BENCH COMPILE] ebobby/simple-raytracer"
-    #hyperfine --runs "${RUN_RUNS:-10}" --warmup 1 --prepare "cargo clean" \
-    #"RUSTC=rustc RUSTFLAGS='' cargo build" \
-    #"../cargo.sh build"
-
-    #echo "[BENCH RUN] ebobby/simple-raytracer"
-    #cp ./target/debug/main ./raytracer_cg_gcc
-    #hyperfine --runs "${RUN_RUNS:-10}" ./raytracer_cg_llvm ./raytracer_cg_gcc
-    #popd
+function extended_regex_example_tests() {
+    if (( $gcc_master_branch == 0 )); then
+        return
+    fi
 
     pushd regex
     echo "[TEST] rust-lang/regex example shootout-regex-dna"
@@ -232,12 +252,38 @@ function extended_sysroot_tests() {
         | ../cargo.sh run --example shootout-regex-dna \
         | grep -v "Spawned thread" > res.txt
     diff -u res.txt examples/regexdna-output.txt
+    popd
+}
 
+function extended_regex_tests() {
+    if (( $gcc_master_branch == 0 )); then
+        return
+    fi
+
+    pushd regex
     echo "[TEST] rust-lang/regex tests"
+    export CG_RUSTFLAGS="--cap-lints warn" # newer aho_corasick versions throw a deprecation warning
     ../cargo.sh test --tests -- --exclude-should-panic --test-threads 1 -Zunstable-options -q
     popd
 }
 
+function extended_sysroot_tests() {
+    #pushd simple-raytracer
+    #echo "[BENCH COMPILE] ebobby/simple-raytracer"
+    #hyperfine --runs "${RUN_RUNS:-10}" --warmup 1 --prepare "cargo clean" \
+    #"RUSTC=rustc RUSTFLAGS='' cargo build" \
+    #"../cargo.sh build"
+
+    #echo "[BENCH RUN] ebobby/simple-raytracer"
+    #cp ./target/debug/main ./raytracer_cg_gcc
+    #hyperfine --runs "${RUN_RUNS:-10}" ./raytracer_cg_llvm ./raytracer_cg_gcc
+    #popd
+
+    extended_rand_tests
+    extended_regex_example_tests
+    extended_regex_tests
+}
+
 function test_rustc() {
     echo
     echo "[TEST] rust-lang/rust"
@@ -297,6 +343,20 @@ EOF
         xargs -a ../failing-ui-tests.txt -d'\n' git checkout --
     fi
 
+    if [ $nb_parts -gt 0 ]; then
+        echo "Splitting ui_test into $nb_parts parts (and running part $current_part)"
+        find src/test/ui -type f -name '*.rs' -not -path "*/auxiliary/*" > ui_tests
+        count=$((`wc -l < ui_tests` / $nb_parts))
+        # We increment the number of tests by one because if this is an odd number, we would skip
+        # one test.
+        count=$((count + 1))
+        split -d -l $count -a 1 ui_tests ui_tests.split
+        # Removing all tests.
+        find src/test/ui -type f -name '*.rs' -not -path "*/auxiliary/*" -exec rm {} \;
+        # Putting back only the ones we want to test.
+        xargs -a "ui_tests.split$current_part" -d'\n' git checkout --
+    fi
+
     echo "[TEST] rustc test suite"
     COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 src/test/ui/ --rustc-args "$RUSTC_ARGS"
 }

From 96d103b9f9a597cde9128a9429bfc6d516c8e030 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 8 Jul 2022 16:19:48 +0200
Subject: [PATCH 146/997] Sort ui_tests to ensure they remain coherent across
 different jobs

---
 test.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/test.sh b/test.sh
index dea9fe412e9a..06f608ad422a 100755
--- a/test.sh
+++ b/test.sh
@@ -346,6 +346,8 @@ EOF
     if [ $nb_parts -gt 0 ]; then
         echo "Splitting ui_test into $nb_parts parts (and running part $current_part)"
         find src/test/ui -type f -name '*.rs' -not -path "*/auxiliary/*" > ui_tests
+        # To ensure it'll be always the same sub files, we sort the content.
+        sort ui_tests -o ui_tests
         count=$((`wc -l < ui_tests` / $nb_parts))
         # We increment the number of tests by one because if this is an odd number, we would skip
         # one test.

From 28b11119e720f1af0e9f3dd854ee2e4618ff185d Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 9 Jul 2022 21:36:23 +0200
Subject: [PATCH 147/997] Add cache for rust repository

---
 .github/workflows/ci.yml | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 22f67a04e0b8..8b36fa0c1c7c 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -95,6 +95,15 @@ jobs:
         path: target
         key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
 
+    - name: Cache rust repository
+      # We only clone the rust repository for rustc tests
+      if: ${{ contains(matrix.commands, 'rustc') }}
+      uses: actions/cache@v2
+      id: cache-rust-repository
+      with:
+        path: rust
+        key: ${{ runner.os }}-packages-${{ hashFiles('rust/.git/HEAD') }}
+
     - name: Build
       run: |
         ./prepare_build.sh

From 5f630f3c81583b7be15a230d47d48de0178b5da8 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 23 Jul 2022 19:12:35 -0400
Subject: [PATCH 148/997] Cleanup regarding handling of recursive types

---
 src/asm.rs           | 10 +++++-----
 src/builder.rs       |  4 ++--
 src/common.rs        |  4 ++--
 src/consts.rs        |  8 ++++----
 src/context.rs       |  5 +----
 src/intrinsic/mod.rs |  4 ++--
 src/mono_item.rs     |  2 +-
 src/type_.rs         |  2 +-
 src/type_of.rs       | 32 ++++++++++++--------------------
 9 files changed, 30 insertions(+), 41 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 52fd66af0659..fa40aa80804a 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -156,7 +156,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     use ConstraintOrRegister::*;
 
                     let (constraint, ty) = match (reg_to_gcc(reg), place) {
-                        (Constraint(constraint), Some(place)) => (constraint, place.layout.gcc_type(self.cx, false)),
+                        (Constraint(constraint), Some(place)) => (constraint, place.layout.gcc_type(self.cx)),
                         // When `reg` is a class and not an explicit register but the out place is not specified,
                         // we need to create an unused output variable to assign the output to. This var
                         // needs to be of a type that's "compatible" with the register class, but specific type
@@ -225,7 +225,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     // This decision is also backed by the fact that LLVM needs in and out
                     // values to be of *exactly the same type*, not just "compatible".
                     // I'm not sure if GCC is so picky too, but better safe than sorry.
-                    let ty = in_value.layout.gcc_type(self.cx, false);
+                    let ty = in_value.layout.gcc_type(self.cx);
                     let tmp_var = self.current_func().new_local(None, ty, "output_register");
 
                     // If the out_place is None (i.e `inout(reg) _` syntax was used), we translate
@@ -285,7 +285,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                             continue
                         };
 
-                        let ty = out_place.layout.gcc_type(self.cx, false);
+                        let ty = out_place.layout.gcc_type(self.cx);
                         let tmp_var = self.current_func().new_local(None, ty, "output_register");
                         tmp_var.set_register_name(reg_name);
 
@@ -305,7 +305,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 // `in("explicit register") var`
                 InlineAsmOperandRef::In { reg, value } => {
                     if let ConstraintOrRegister::Register(reg_name) = reg_to_gcc(reg) {
-                        let ty = value.layout.gcc_type(self.cx, false);
+                        let ty = value.layout.gcc_type(self.cx);
                         let reg_var = self.current_func().new_local(None, ty, "input_register");
                         reg_var.set_register_name(reg_name);
                         self.llbb().add_assignment(None, reg_var, value.immediate());
@@ -324,7 +324,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 InlineAsmOperandRef::InOut { reg, late, in_value, out_place } => {
                     if let ConstraintOrRegister::Register(reg_name) = reg_to_gcc(reg) {
                         // See explanation in the first pass.
-                        let ty = in_value.layout.gcc_type(self.cx, false);
+                        let ty = in_value.layout.gcc_type(self.cx);
                         let tmp_var = self.current_func().new_local(None, ty, "output_register");
                         tmp_var.set_register_name(reg_name);
 
diff --git a/src/builder.rs b/src/builder.rs
index 867fd531f504..616fc01b00c9 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -745,7 +745,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             }
             else if place.layout.is_gcc_immediate() {
                 let load = self.load(
-                    place.layout.gcc_type(self, false),
+                    place.layout.gcc_type(self),
                     place.llval,
                     place.align,
                 );
@@ -756,7 +756,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             }
             else if let abi::Abi::ScalarPair(ref a, ref b) = place.layout.abi {
                 let b_offset = a.size(self).align_to(b.align(self).abi);
-                let pair_type = place.layout.gcc_type(self, false);
+                let pair_type = place.layout.gcc_type(self);
 
                 let mut load = |i, scalar: &abi::Scalar, align| {
                     let llptr = self.struct_gep(pair_type, place.llval, i as u64);
diff --git a/src/common.rs b/src/common.rs
index d55ad87e19bf..9c55692dea12 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -132,7 +132,7 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         });
         let len = s_str.len();
         let cs = self.const_ptrcast(str_global.get_address(None),
-            self.type_ptr_to(self.layout_of(self.tcx.types.str_).gcc_type(self, true)),
+            self.type_ptr_to(self.layout_of(self.tcx.types.str_).gcc_type(self)),
         );
         (cs, self.const_usize(len as u64))
     }
@@ -235,7 +235,7 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
     fn from_const_alloc(&self, layout: TyAndLayout<'tcx>, alloc: ConstAllocation<'tcx>, offset: Size) -> PlaceRef<'tcx, RValue<'gcc>> {
         assert_eq!(alloc.inner().align, layout.align.abi);
-        let ty = self.type_ptr_to(layout.gcc_type(self, true));
+        let ty = self.type_ptr_to(layout.gcc_type(self));
         let value =
             if layout.size == Size::ZERO {
                 let value = self.const_usize(alloc.inner().align.bytes());
diff --git a/src/consts.rs b/src/consts.rs
index c0b8d21818f8..e83cf53f48ef 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -80,7 +80,7 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
 
         let instance = Instance::mono(self.tcx, def_id);
         let ty = instance.ty(self.tcx, ty::ParamEnv::reveal_all());
-        let gcc_type = self.layout_of(ty).gcc_type(self, true);
+        let gcc_type = self.layout_of(ty).gcc_type(self);
 
         // TODO(antoyo): set alignment.
 
@@ -211,7 +211,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let global =
             if let Some(def_id) = def_id.as_local() {
                 let id = self.tcx.hir().local_def_id_to_hir_id(def_id);
-                let llty = self.layout_of(ty).gcc_type(self, true);
+                let llty = self.layout_of(ty).gcc_type(self);
                 // FIXME: refactor this to work without accessing the HIR
                 let global = match self.tcx.hir().get(id) {
                     Node::Item(&hir::Item { span, kind: hir::ItemKind::Static(..), .. }) => {
@@ -356,7 +356,7 @@ pub fn codegen_static_initializer<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, def_id
 
 fn check_and_apply_linkage<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, attrs: &CodegenFnAttrs, ty: Ty<'tcx>, sym: &str, span: Span) -> LValue<'gcc> {
     let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-    let llty = cx.layout_of(ty).gcc_type(cx, true);
+    let llty = cx.layout_of(ty).gcc_type(cx);
     if let Some(linkage) = attrs.linkage {
         // If this is a static with a linkage specified, then we need to handle
         // it a little specially. The typesystem prevents things like &T and
@@ -365,7 +365,7 @@ fn check_and_apply_linkage<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, attrs: &Codeg
         // that the static actually has a null value.
         let llty2 =
             if let ty::RawPtr(ref mt) = ty.kind() {
-                cx.layout_of(mt.ty).gcc_type(cx, true)
+                cx.layout_of(mt.ty).gcc_type(cx)
             }
             else {
                 cx.sess().span_fatal(
diff --git a/src/context.rs b/src/context.rs
index 44f36cfa4cad..9879e31c2ea5 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -1,6 +1,6 @@
 use std::cell::{Cell, RefCell};
 
-use gccjit::{Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, RValue, Struct, Type};
+use gccjit::{Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, RValue, Type};
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::traits::{
     BackendTypes,
@@ -78,8 +78,6 @@ pub struct CodegenCx<'gcc, 'tcx> {
 
     pub struct_types: RefCell<FxHashMap<Vec<Type<'gcc>>, Type<'gcc>>>,
 
-    pub types_with_fields_to_set: RefCell<FxHashMap<Type<'gcc>, (Struct<'gcc>, TyAndLayout<'tcx>)>>,
-
     /// Cache instances of monomorphic and polymorphic items
     pub instances: RefCell<FxHashMap<Instance<'tcx>, LValue<'gcc>>>,
     /// Cache function instances of monomorphic and polymorphic items
@@ -243,7 +241,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             types: Default::default(),
             tcx,
             struct_types: Default::default(),
-            types_with_fields_to_set: Default::default(),
             local_gen_sym_counter: Cell::new(0),
             eh_personality: Cell::new(None),
             pointee_infos: Default::default(),
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index c6681de68e26..1315edf0891e 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -90,7 +90,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         let name = tcx.item_name(def_id);
         let name_str = name.as_str();
 
-        let llret_ty = self.layout_of(ret_ty).gcc_type(self, true);
+        let llret_ty = self.layout_of(ret_ty).gcc_type(self);
         let result = PlaceRef::new_sized(llresult, fn_abi.ret.layout);
 
         let simple = get_simple_intrinsic(self, name);
@@ -389,7 +389,7 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
     /// Gets the LLVM type for a place of the original Rust type of
     /// this argument/return, i.e., the result of `type_of::type_of`.
     fn memory_ty(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc> {
-        self.layout.gcc_type(cx, true)
+        self.layout.gcc_type(cx)
     }
 
     /// Stores a direct/indirect value described by this ArgAbi into a
diff --git a/src/mono_item.rs b/src/mono_item.rs
index 60a42846bd3d..454c7538edb9 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -15,7 +15,7 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let attrs = self.tcx.codegen_fn_attrs(def_id);
         let instance = Instance::mono(self.tcx, def_id);
         let ty = instance.ty(self.tcx, ty::ParamEnv::reveal_all());
-        let gcc_type = self.layout_of(ty).gcc_type(self, true);
+        let gcc_type = self.layout_of(ty).gcc_type(self);
 
         let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
         let global = self.define_global(symbol_name, gcc_type, is_tls, attrs.link_section);
diff --git a/src/type_.rs b/src/type_.rs
index 002b95db36de..b85aad7c00b3 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -273,7 +273,7 @@ pub fn struct_fields<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout
         assert_eq!(offset.align_to(padding_align) + padding, target_offset);
         result.push(cx.type_padding_filler(padding, padding_align));
 
-        result.push(field.gcc_type(cx, !field.ty.is_any_ptr())); // FIXME(antoyo): might need to check if the type is inside another, like Box<Type>.
+        result.push(field.gcc_type(cx));
         offset = target_offset + field.size;
         prev_effective_align = effective_field_align;
     }
diff --git a/src/type_of.rs b/src/type_of.rs
index 569ee2925b13..c7aa4239c7fa 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -50,7 +50,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 }
 
-pub fn uncached_gcc_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout<'tcx>, defer: &mut Option<(Struct<'gcc>, TyAndLayout<'tcx>)>) -> Type<'gcc> {
+fn uncached_gcc_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout<'tcx>, defer: &mut Option<(Struct<'gcc>, TyAndLayout<'tcx>)>) -> Type<'gcc> {
     match layout.abi {
         Abi::Scalar(_) => bug!("handled elsewhere"),
         Abi::Vector { ref element, count } => {
@@ -114,7 +114,7 @@ pub fn uncached_gcc_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLa
                 },
             }
         }
-        FieldsShape::Array { count, .. } => cx.type_array(layout.field(cx, 0).gcc_type(cx, true), count),
+        FieldsShape::Array { count, .. } => cx.type_array(layout.field(cx, 0).gcc_type(cx), count),
         FieldsShape::Arbitrary { .. } =>
             match name {
                 None => {
@@ -133,7 +133,7 @@ pub fn uncached_gcc_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLa
 pub trait LayoutGccExt<'tcx> {
     fn is_gcc_immediate(&self) -> bool;
     fn is_gcc_scalar_pair(&self) -> bool;
-    fn gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, set_fields: bool) -> Type<'gcc>;
+    fn gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc>;
     fn immediate_gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc>;
     fn scalar_gcc_type_at<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, scalar: &abi::Scalar, offset: Size) -> Type<'gcc>;
     fn scalar_pair_element_gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, index: usize, immediate: bool) -> Type<'gcc>;
@@ -168,8 +168,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
     /// with the inner-most trailing unsized field using the "minimal unit"
     /// of that field's type - this is useful for taking the address of
     /// that field and ensuring the struct has the right alignment.
-    //TODO(antoyo): do we still need the set_fields parameter?
-    fn gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, set_fields: bool) -> Type<'gcc> {
+    fn gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc> {
         if let Abi::Scalar(ref scalar) = self.abi {
             // Use a different cache for scalars because pointers to DSTs
             // can be either fat or thin (data pointers of fat pointers).
@@ -179,10 +178,10 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
             let ty =
                 match *self.ty.kind() {
                     ty::Ref(_, ty, _) | ty::RawPtr(ty::TypeAndMut { ty, .. }) => {
-                        cx.type_ptr_to(cx.layout_of(ty).gcc_type(cx, set_fields))
+                        cx.type_ptr_to(cx.layout_of(ty).gcc_type(cx))
                     }
                     ty::Adt(def, _) if def.is_box() => {
-                        cx.type_ptr_to(cx.layout_of(self.ty.boxed_ty()).gcc_type(cx, true))
+                        cx.type_ptr_to(cx.layout_of(self.ty.boxed_ty()).gcc_type(cx))
                     }
                     ty::FnPtr(sig) => cx.fn_ptr_backend_type(&cx.fn_abi_of_fn_ptr(sig, ty::List::empty())),
                     _ => self.scalar_gcc_type_at(cx, scalar, Size::ZERO),
@@ -199,13 +198,6 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
             };
         let cached_type = cx.types.borrow().get(&(self.ty, variant_index)).cloned();
         if let Some(ty) = cached_type {
-            let type_to_set_fields = cx.types_with_fields_to_set.borrow_mut().remove(&ty);
-            if let Some((struct_type, layout)) = type_to_set_fields {
-                // Since we might be trying to generate a type containing another type which is not
-                // completely generated yet, we deferred setting the fields until now.
-                let (fields, packed) = struct_fields(cx, layout);
-                cx.set_struct_body(struct_type, &fields, packed);
-            }
             return ty;
         }
 
@@ -222,7 +214,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
                 if let Some(v) = variant_index {
                     layout = layout.for_variant(cx, v);
                 }
-                layout.gcc_type(cx, true)
+                layout.gcc_type(cx)
             }
             else {
                 uncached_gcc_type(cx, *self, &mut defer)
@@ -230,9 +222,9 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
 
         cx.types.borrow_mut().insert((self.ty, variant_index), ty);
 
-        if let Some((ty, layout)) = defer {
+        if let Some((deferred_ty, layout)) = defer {
             let (fields, packed) = struct_fields(cx, layout);
-            cx.set_struct_body(ty, &fields, packed);
+            cx.set_struct_body(deferred_ty, &fields, packed);
         }
 
         ty
@@ -244,7 +236,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
                 return cx.type_i1();
             }
         }
-        self.gcc_type(cx, true)
+        self.gcc_type(cx)
     }
 
     fn scalar_gcc_type_at<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, scalar: &abi::Scalar, offset: Size) -> Type<'gcc> {
@@ -273,7 +265,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
         // pointee types, to avoid bitcasting every `OperandRef::deref`.
         match self.ty.kind() {
             ty::Ref(..) | ty::RawPtr(_) => {
-                return self.field(cx, index).gcc_type(cx, true);
+                return self.field(cx, index).gcc_type(cx);
             }
             // only wide pointer boxes are handled as pointers
             // thin pointer boxes with scalar allocators are handled by the general logic below
@@ -343,7 +335,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
 
 impl<'gcc, 'tcx> LayoutTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn backend_type(&self, layout: TyAndLayout<'tcx>) -> Type<'gcc> {
-        layout.gcc_type(self, true)
+        layout.gcc_type(self)
     }
 
     fn immediate_backend_type(&self, layout: TyAndLayout<'tcx>) -> Type<'gcc> {

From 672eec3055c9c96420987dba18cf12aafaf7e3d6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 24 Jul 2022 17:33:38 -0400
Subject: [PATCH 149/997] Support symbol visibility

---
 Cargo.lock        |  4 +--
 src/allocator.rs  | 16 +++++++--
 src/attributes.rs |  4 +--
 src/base.rs       | 11 ++++++
 src/callee.rs     | 91 +++++++++++++++++++++++++++++++++++++++++++++++
 src/mono_item.rs  | 30 +++++++++++++---
 6 files changed, 145 insertions(+), 11 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index ff09a08b5afe..3245f5843e54 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#a8997afb665dc467c1bdbddf04877143683f0cce"
+source = "git+https://github.com/antoyo/gccjit.rs#1a60fe3918a5b3b0983c1ea09f4b9445001a6468"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#a8997afb665dc467c1bdbddf04877143683f0cce"
+source = "git+https://github.com/antoyo/gccjit.rs#1a60fe3918a5b3b0983c1ea09f4b9445001a6468"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/src/allocator.rs b/src/allocator.rs
index c761e5aabd10..60985003a9e0 100644
--- a/src/allocator.rs
+++ b/src/allocator.rs
@@ -1,3 +1,5 @@
+#[cfg(feature="master")]
+use gccjit::FnAttribute;
 use gccjit::{FunctionType, GlobalKind, ToRValue};
 use rustc_ast::expand::allocator::{AllocatorKind, AllocatorTy, ALLOCATOR_METHODS};
 use rustc_middle::bug;
@@ -50,7 +52,8 @@ pub(crate) unsafe fn codegen(tcx: TyCtxt<'_>, mods: &mut GccContext, _module_nam
         let func = context.new_function(None, FunctionType::Exported, output.unwrap_or(void), &args, name, false);
 
         if tcx.sess.target.options.default_hidden_visibility {
-            // TODO(antoyo): set visibility.
+            #[cfg(feature="master")]
+            func.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
         }
         if tcx.sess.must_emit_unwind_tables() {
             // TODO(antoyo): emit unwind tables.
@@ -61,7 +64,8 @@ pub(crate) unsafe fn codegen(tcx: TyCtxt<'_>, mods: &mut GccContext, _module_nam
             .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
             .collect();
         let callee = context.new_function(None, FunctionType::Extern, output.unwrap_or(void), &args, callee, false);
-        // TODO(antoyo): set visibility.
+        #[cfg(feature="master")]
+        callee.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
 
         let block = func.new_block("entry");
 
@@ -90,6 +94,11 @@ pub(crate) unsafe fn codegen(tcx: TyCtxt<'_>, mods: &mut GccContext, _module_nam
         .collect();
     let func = context.new_function(None, FunctionType::Exported, void, &args, name, false);
 
+    if tcx.sess.target.default_hidden_visibility {
+        #[cfg(feature="master")]
+        func.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
+    }
+
     let kind =
         if has_alloc_error_handler {
             AllocatorKind::Global
@@ -102,7 +111,8 @@ pub(crate) unsafe fn codegen(tcx: TyCtxt<'_>, mods: &mut GccContext, _module_nam
         .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
         .collect();
     let callee = context.new_function(None, FunctionType::Extern, void, &args, callee, false);
-    //llvm::LLVMRustSetVisibility(callee, llvm::Visibility::Hidden);
+    #[cfg(feature="master")]
+    callee.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
 
     let block = func.new_block("entry");
 
diff --git a/src/attributes.rs b/src/attributes.rs
index e570b583decb..243a1a36dd09 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -1,4 +1,4 @@
-#[cfg_attr(not(feature="master"), allow(unused_imports))]
+#[cfg(feature="master")]
 use gccjit::FnAttribute;
 use gccjit::Function;
 use rustc_attr::InstructionSetAttr;
@@ -107,6 +107,6 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
     let target_features = function_features.join(",");
     if !target_features.is_empty() {
         #[cfg(feature="master")]
-        func.add_attribute(FnAttribute::Target, &target_features);
+        func.add_attribute(FnAttribute::Target(&target_features));
     }
 }
diff --git a/src/base.rs b/src/base.rs
index 9d81a01e7a61..42194b526e64 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -8,6 +8,8 @@ use gccjit::{
 };
 use rustc_middle::dep_graph;
 use rustc_middle::ty::TyCtxt;
+#[cfg(feature="master")]
+use rustc_middle::mir::mono::Visibility;
 use rustc_middle::mir::mono::Linkage;
 use rustc_codegen_ssa::{ModuleCodegen, ModuleKind};
 use rustc_codegen_ssa::base::maybe_create_entry_wrapper;
@@ -20,6 +22,15 @@ use crate::GccContext;
 use crate::builder::Builder;
 use crate::context::CodegenCx;
 
+#[cfg(feature="master")]
+pub fn visibility_to_gcc(linkage: Visibility) -> gccjit::Visibility {
+    match linkage {
+        Visibility::Default => gccjit::Visibility::Default,
+        Visibility::Hidden => gccjit::Visibility::Hidden,
+        Visibility::Protected => gccjit::Visibility::Protected,
+    }
+}
+
 pub fn global_linkage_to_gcc(linkage: Linkage) -> GlobalKind {
     match linkage {
         Linkage::External => GlobalKind::Imported,
diff --git a/src/callee.rs b/src/callee.rs
index 5557f886b287..d7bbf1d34ef1 100644
--- a/src/callee.rs
+++ b/src/callee.rs
@@ -1,3 +1,5 @@
+#[cfg(feature="master")]
+use gccjit::{FnAttribute, Visibility};
 use gccjit::{FunctionType, RValue};
 use rustc_codegen_ssa::traits::BaseTypeMethods;
 use rustc_middle::ty::{self, Instance, TypeFoldable};
@@ -70,8 +72,97 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
 
             attributes::from_fn_attrs(cx, func, instance);
 
+            let instance_def_id = instance.def_id();
+
             // TODO(antoyo): set linkage and attributes.
 
+            // Apply an appropriate linkage/visibility value to our item that we
+            // just declared.
+            //
+            // This is sort of subtle. Inside our codegen unit we started off
+            // compilation by predefining all our own `MonoItem` instances. That
+            // is, everything we're codegenning ourselves is already defined. That
+            // means that anything we're actually codegenning in this codegen unit
+            // will have hit the above branch in `get_declared_value`. As a result,
+            // we're guaranteed here that we're declaring a symbol that won't get
+            // defined, or in other words we're referencing a value from another
+            // codegen unit or even another crate.
+            //
+            // So because this is a foreign value we blanket apply an external
+            // linkage directive because it's coming from a different object file.
+            // The visibility here is where it gets tricky. This symbol could be
+            // referencing some foreign crate or foreign library (an `extern`
+            // block) in which case we want to leave the default visibility. We may
+            // also, though, have multiple codegen units. It could be a
+            // monomorphization, in which case its expected visibility depends on
+            // whether we are sharing generics or not. The important thing here is
+            // that the visibility we apply to the declaration is the same one that
+            // has been applied to the definition (wherever that definition may be).
+            let is_generic = instance.substs.non_erasable_generics().next().is_some();
+
+            if is_generic {
+                // This is a monomorphization. Its expected visibility depends
+                // on whether we are in share-generics mode.
+
+                if cx.tcx.sess.opts.share_generics() {
+                    // We are in share_generics mode.
+
+                    if let Some(instance_def_id) = instance_def_id.as_local() {
+                        // This is a definition from the current crate. If the
+                        // definition is unreachable for downstream crates or
+                        // the current crate does not re-export generics, the
+                        // definition of the instance will have been declared
+                        // as `hidden`.
+                        if cx.tcx.is_unreachable_local_definition(instance_def_id)
+                            || !cx.tcx.local_crate_exports_generics()
+                        {
+                            #[cfg(feature="master")]
+                            func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
+                        }
+                    } else {
+                        // This is a monomorphization of a generic function
+                        // defined in an upstream crate.
+                        if instance.upstream_monomorphization(tcx).is_some() {
+                            // This is instantiated in another crate. It cannot
+                            // be `hidden`.
+                        } else {
+                            // This is a local instantiation of an upstream definition.
+                            // If the current crate does not re-export it
+                            // (because it is a C library or an executable), it
+                            // will have been declared `hidden`.
+                            if !cx.tcx.local_crate_exports_generics() {
+                                #[cfg(feature="master")]
+                                func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
+                            }
+                        }
+                    }
+                } else {
+                    // When not sharing generics, all instances are in the same
+                    // crate and have hidden visibility
+                    #[cfg(feature="master")]
+                    func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
+                }
+            } else {
+                // This is a non-generic function
+                if cx.tcx.is_codegened_item(instance_def_id) {
+                    // This is a function that is instantiated in the local crate
+
+                    if instance_def_id.is_local() {
+                        // This is function that is defined in the local crate.
+                        // If it is not reachable, it is hidden.
+                        if !cx.tcx.is_reachable_non_generic(instance_def_id) {
+                            #[cfg(feature="master")]
+                            func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
+                        }
+                    } else {
+                        // This is a function from an upstream crate that has
+                        // been instantiated here. These are always hidden.
+                        #[cfg(feature="master")]
+                        func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
+                    }
+                }
+            }
+
             // FIXME(antoyo): this is a wrong cast. That requires changing the compiler API.
             unsafe { std::mem::transmute(func) }
         };
diff --git a/src/mono_item.rs b/src/mono_item.rs
index 454c7538edb9..d0d6b9b5bfe3 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -1,9 +1,11 @@
+#[cfg(feature="master")]
+use gccjit::{VarAttribute, FnAttribute};
 use rustc_codegen_ssa::traits::PreDefineMethods;
+use rustc_hir::def_id::{DefId, LOCAL_CRATE};
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
 use rustc_middle::mir::mono::{Linkage, Visibility};
 use rustc_middle::ty::{self, Instance, TypeFoldable};
 use rustc_middle::ty::layout::{FnAbiOf, LayoutOf};
-use rustc_span::def_id::DefId;
 
 use crate::attributes;
 use crate::base;
@@ -11,7 +13,8 @@ use crate::context::CodegenCx;
 use crate::type_of::LayoutGccExt;
 
 impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
-    fn predefine_static(&self, def_id: DefId, _linkage: Linkage, _visibility: Visibility, symbol_name: &str) {
+    #[cfg_attr(not(feature="master"), allow(unused_variables))]
+    fn predefine_static(&self, def_id: DefId, _linkage: Linkage, visibility: Visibility, symbol_name: &str) {
         let attrs = self.tcx.codegen_fn_attrs(def_id);
         let instance = Instance::mono(self.tcx, def_id);
         let ty = instance.ty(self.tcx, ty::ParamEnv::reveal_all());
@@ -19,12 +22,15 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
         let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
         let global = self.define_global(symbol_name, gcc_type, is_tls, attrs.link_section);
+        #[cfg(feature="master")]
+        global.add_attribute(VarAttribute::Visibility(base::visibility_to_gcc(visibility)));
 
-        // TODO(antoyo): set linkage and visibility.
+        // TODO(antoyo): set linkage.
         self.instances.borrow_mut().insert(instance, global);
     }
 
-    fn predefine_fn(&self, instance: Instance<'tcx>, linkage: Linkage, _visibility: Visibility, symbol_name: &str) {
+    #[cfg_attr(not(feature="master"), allow(unused_variables))]
+    fn predefine_fn(&self, instance: Instance<'tcx>, linkage: Linkage, visibility: Visibility, symbol_name: &str) {
         assert!(!instance.substs.needs_infer());
 
         let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
@@ -34,6 +40,22 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
         attributes::from_fn_attrs(self, decl, instance);
 
+        // If we're compiling the compiler-builtins crate, e.g., the equivalent of
+        // compiler-rt, then we want to implicitly compile everything with hidden
+        // visibility as we're going to link this object all over the place but
+        // don't want the symbols to get exported.
+        if linkage != Linkage::Internal
+            && linkage != Linkage::Private
+            && self.tcx.is_compiler_builtins(LOCAL_CRATE)
+        {
+            #[cfg(feature="master")]
+            decl.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
+        }
+        else {
+            #[cfg(feature="master")]
+            decl.add_attribute(FnAttribute::Visibility(base::visibility_to_gcc(visibility)));
+        }
+
         // TODO(antoyo): call set_link_section() to allow initializing argc/argv.
         // TODO(antoyo): set unique comdat.
         // TODO(antoyo): use inline attribute from there in linkage.set() above.

From deedd2888175224b48b00eec4c74f0ab8625eb1e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 4 Aug 2022 20:11:36 -0400
Subject: [PATCH 150/997] Fix the mxcsr builtins

---
 src/builder.rs        |  3 ++-
 src/intrinsic/llvm.rs | 24 +++++++++++++++++++++++-
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 616fc01b00c9..bcbaad39044d 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -279,6 +279,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let gcc_func = func_ptr.get_type().dyncast_function_ptr_type().expect("function ptr");
         let func_name = format!("{:?}", func_ptr);
         let previous_arg_count = args.len();
+        let orig_args = args;
         let args = llvm::adjust_intrinsic_arguments(&self, gcc_func, args.into(), &func_name);
         let args_adjusted = args.len() != previous_arg_count;
         let args = self.check_ptr_call("call", func_ptr, &*args);
@@ -292,7 +293,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
             let return_value = self.cx.context.new_call_through_ptr(None, func_ptr, &args);
-            let return_value = llvm::adjust_intrinsic_return_value(&self, return_value, &func_name, &args, args_adjusted);
+            let return_value = llvm::adjust_intrinsic_return_value(&self, return_value, &func_name, &args, args_adjusted, orig_args);
             let result = current_func.new_local(None, return_value.get_type(), &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
             self.block.add_assignment(None, result, return_value);
             result.to_rvalue()
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index f00c1b301097..20f500e34e90 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1,6 +1,7 @@
 use std::borrow::Cow;
 
 use gccjit::{Function, FunctionPtrType, RValue, ToRValue, UnaryOp};
+use rustc_codegen_ssa::traits::BuilderMethods;
 
 use crate::{context::CodegenCx, builder::Builder};
 
@@ -277,6 +278,15 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 *arg3 = builder.context.new_unary_op(None, UnaryOp::Minus, arg3.get_type(), *arg3);
                 args = new_args.into();
             },
+            "__builtin_ia32_ldmxcsr" => {
+                // The builtin __builtin_ia32_ldmxcsr takes an integer value while llvm.x86.sse.ldmxcsr takes a pointer,
+                // so dereference the pointer.
+                let mut new_args = args.to_vec();
+                let uint_ptr_type = builder.uint_type.make_pointer();
+                let arg1 = builder.context.new_cast(None, args[0], uint_ptr_type);
+                new_args[0] = arg1.dereference(None).to_rvalue();
+                args = new_args.into();
+            },
             _ => (),
         }
     }
@@ -284,7 +294,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
     args
 }
 
-pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc, 'tcx>, mut return_value: RValue<'gcc>, func_name: &str, args: &[RValue<'gcc>], args_adjusted: bool) -> RValue<'gcc> {
+pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc, 'tcx>, mut return_value: RValue<'gcc>, func_name: &str, args: &[RValue<'gcc>], args_adjusted: bool, orig_args: &[RValue<'gcc>]) -> RValue<'gcc> {
     match func_name {
         "__builtin_ia32_vfmaddss3_round" | "__builtin_ia32_vfmaddsd3_round" => {
             #[cfg(feature="master")]
@@ -306,6 +316,18 @@ pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc,
                 return_value = builder.context.new_struct_constructor(None, struct_type.as_type(), None, &[return_value, last_arg.dereference(None).to_rvalue()]);
             }
         },
+        "__builtin_ia32_stmxcsr" => {
+            // The builtin __builtin_ia32_stmxcsr returns a value while llvm.x86.sse.stmxcsr writes
+            // the result in its pointer argument.
+            // We removed the argument since __builtin_ia32_stmxcsr takes no arguments, so we need
+            // to get back the original argument to get the pointer we need to write the result to.
+            let uint_ptr_type = builder.uint_type.make_pointer();
+            let ptr = builder.context.new_cast(None, orig_args[0], uint_ptr_type);
+            builder.llbb().add_assignment(None, ptr.dereference(None), return_value);
+            // The return value was assigned to the result pointer above. In order to not call the
+            // builtin twice, we overwrite the return value with a dummy value.
+            return_value = builder.context.new_rvalue_zero(builder.int_type);
+        },
         _ => (),
     }
 

From 9a6b75515e64d943d0812c4ace5eab570dfded78 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 27 Aug 2022 09:22:17 -0400
Subject: [PATCH 151/997] Fix merge conflicts

---
 .github/workflows/ci.yml                      |  5 ++
 example/mini_core.rs                          | 57 +++++++++++++------
 ...0024-core-Disable-portable-simd-test.patch | 24 ++++----
 rust-toolchain                                |  2 +-
 src/builder.rs                                |  9 +++
 5 files changed, 70 insertions(+), 27 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 4be75efd73a4..8b36fa0c1c7c 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -56,11 +56,13 @@ jobs:
           echo $(readlink -f gcc-build) > gcc_path
           # NOTE: the filename is still libgccjit.so even when the artifact name is different.
           ln gcc-build/libgccjit.so gcc-build/libgccjit.so.0
+
     - name: Set env
       run: |
         echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+
     - name: Set RUST_COMPILER_RT_ROOT
       run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
 
@@ -108,11 +110,13 @@ jobs:
         ./build.sh ${{ matrix.libgccjit_version.extra }}
         cargo test ${{ matrix.libgccjit_version.extra }}
         ./clean_all.sh
+
     - name: Prepare dependencies
       run: |
         git config --global user.email "user@example.com"
         git config --global user.name "User"
         ./prepare.sh
+
     # Compile is a separate step, as the actions-rs/cargo action supports error annotations
     - name: Compile
       uses: actions-rs/cargo@v1.0.3
@@ -127,6 +131,7 @@ jobs:
     - name: Run tests
       run: |
         ./test.sh --release --clean --build-sysroot ${{ matrix.commands }} ${{ matrix.libgccjit_version.extra }}
+
   duplicates:
     runs-on: ubuntu-latest
     steps:
diff --git a/example/mini_core.rs b/example/mini_core.rs
index ddcbb0d9fc7e..b23ecda35d3e 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -1,6 +1,6 @@
 #![feature(
     no_core, lang_items, intrinsics, unboxed_closures, type_ascription, extern_types,
-    untagged_unions, decl_macro, rustc_attrs, transparent_unions, auto_traits,
+    decl_macro, rustc_attrs, transparent_unions, auto_traits,
     thread_local
 )]
 #![no_core]
@@ -39,14 +39,14 @@ impl<'a, T: ?Sized+Unsize<U>, U: ?Sized> DispatchFromDyn<&'a mut U> for &'a mut
 impl<T: ?Sized+Unsize<U>, U: ?Sized> DispatchFromDyn<*const U> for *const T {}
 // *mut T -> *mut U
 impl<T: ?Sized+Unsize<U>, U: ?Sized> DispatchFromDyn<*mut U> for *mut T {}
-impl<T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<Box<U>> for Box<T> {}
+impl<T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<Box<U, ()>> for Box<T, ()> {}
 
 #[lang = "receiver"]
 pub trait Receiver {}
 
 impl<T: ?Sized> Receiver for &T {}
 impl<T: ?Sized> Receiver for &mut T {}
-impl<T: ?Sized> Receiver for Box<T> {}
+impl<T: ?Sized, A: Allocator> Receiver for Box<T, A> {}
 
 #[lang = "copy"]
 pub unsafe trait Copy {}
@@ -411,7 +411,15 @@ pub trait FnMut<Args>: FnOnce<Args> {
 
 #[lang = "panic"]
 #[track_caller]
-pub fn panic(_msg: &str) -> ! {
+pub fn panic(_msg: &'static str) -> ! {
+    unsafe {
+        libc::puts("Panicking\n\0" as *const str as *const u8);
+        intrinsics::abort();
+    }
+}
+
+#[lang = "panic_no_unwind"]
+fn panic_no_unwind() -> ! {
     unsafe {
         libc::puts("Panicking\n\0" as *const str as *const u8);
         intrinsics::abort();
@@ -450,17 +458,32 @@ pub trait Deref {
 pub trait Allocator {
 }
 
+impl Allocator for () {}
+
 pub struct Global;
 
 impl Allocator for Global {}
 
-#[lang = "owned_box"]
-pub struct Box<
-    T: ?Sized,
-    A: Allocator = Global,
->(*mut T, A);
+#[repr(transparent)]
+#[rustc_layout_scalar_valid_range_start(1)]
+#[rustc_nonnull_optimization_guaranteed]
+pub struct NonNull<T: ?Sized>(pub *const T);
 
-impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<Box<U>> for Box<T> {}
+impl<T: ?Sized, U: ?Sized> CoerceUnsized<NonNull<U>> for NonNull<T> where T: Unsize<U> {}
+impl<T: ?Sized, U: ?Sized> DispatchFromDyn<NonNull<U>> for NonNull<T> where T: Unsize<U> {}
+
+pub struct Unique<T: ?Sized> {
+    pub pointer: NonNull<T>,
+    pub _marker: PhantomData<T>,
+}
+
+impl<T: ?Sized, U: ?Sized> CoerceUnsized<Unique<U>> for Unique<T> where T: Unsize<U> {}
+impl<T: ?Sized, U: ?Sized> DispatchFromDyn<Unique<U>> for Unique<T> where T: Unsize<U> {}
+
+#[lang = "owned_box"]
+pub struct Box<T: ?Sized, A: Allocator = Global>(Unique<T>, A);
+
+impl<T: ?Sized + Unsize<U>, U: ?Sized, A: Allocator> CoerceUnsized<Box<U, A>> for Box<T, A> {}
 
 impl<T: ?Sized, A: Allocator> Drop for Box<T, A> {
     fn drop(&mut self) {
@@ -468,7 +491,7 @@ impl<T: ?Sized, A: Allocator> Drop for Box<T, A> {
     }
 }
 
-impl<T> Deref for Box<T> {
+impl<T: ?Sized, A: Allocator> Deref for Box<T, A> {
     type Target = T;
 
     fn deref(&self) -> &Self::Target {
@@ -482,8 +505,8 @@ unsafe fn allocate(size: usize, _align: usize) -> *mut u8 {
 }
 
 #[lang = "box_free"]
-unsafe fn box_free<T: ?Sized, A: Allocator>(ptr: *mut T, alloc: A) {
-    libc::free(ptr as *mut u8);
+unsafe fn box_free<T: ?Sized>(ptr: Unique<T>, _alloc: ()) {
+    libc::free(ptr.pointer.0 as *mut u8);
 }
 
 #[lang = "drop"]
@@ -505,16 +528,18 @@ pub union MaybeUninit<T> {
 }
 
 pub mod intrinsics {
+    use crate::Sized;
+
     extern "rust-intrinsic" {
         pub fn abort() -> !;
         pub fn size_of<T>() -> usize;
-        pub fn size_of_val<T: ?::Sized>(val: *const T) -> usize;
+        pub fn size_of_val<T: ?Sized>(val: *const T) -> usize;
         pub fn min_align_of<T>() -> usize;
-        pub fn min_align_of_val<T: ?::Sized>(val: *const T) -> usize;
+        pub fn min_align_of_val<T: ?Sized>(val: *const T) -> usize;
         pub fn copy<T>(src: *const T, dst: *mut T, count: usize);
         pub fn transmute<T, U>(e: T) -> U;
         pub fn ctlz_nonzero<T>(x: T) -> T;
-        pub fn needs_drop<T: ?::Sized>() -> bool;
+        pub fn needs_drop<T: ?Sized>() -> bool;
         pub fn bitreverse<T>(x: T) -> T;
         pub fn bswap<T>(x: T) -> T;
         pub fn write_bytes<T>(dst: *mut T, val: u8, count: usize);
diff --git a/patches/0024-core-Disable-portable-simd-test.patch b/patches/0024-core-Disable-portable-simd-test.patch
index c59a40df0398..7ea0eebe6a12 100644
--- a/patches/0024-core-Disable-portable-simd-test.patch
+++ b/patches/0024-core-Disable-portable-simd-test.patch
@@ -1,24 +1,25 @@
-From b1ae000f6da1abd3b8e9b80c40bc11c89b8ae93c Mon Sep 17 00:00:00 2001
-From: bjorn3 <bjorn3@users.noreply.github.com>
-Date: Thu, 30 Dec 2021 16:54:40 +0100
-Subject: [PATCH] [core] Disable portable-simd test
+From f845df4056f5ba16b9f5bd703460c4ac40ea03b9 Mon Sep 17 00:00:00 2001
+From: Antoni Boucher <bouanto@zoho.com>
+Date: Fri, 26 Aug 2022 20:38:58 -0400
+Subject: [PATCH] Edit
 
 ---
- library/core/tests/lib.rs | 1 -
- 1 file changed, 1 deletion(-)
+ library/core/tests/lib.rs | 2 --
+ 1 file changed, 2 deletions(-)
 
 diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
-index 06c7be0..359e2e7 100644
+index 59510d3..179bf26 100644
 --- a/library/core/tests/lib.rs
 +++ b/library/core/tests/lib.rs
-@@ -75,7 +75,6 @@
- #![feature(never_type)]
+@@ -77,7 +77,6 @@
  #![feature(unwrap_infallible)]
+ #![feature(result_into_ok_or_err)]
+ #![feature(pointer_byte_offsets)]
 -#![feature(portable_simd)]
  #![feature(ptr_metadata)]
  #![feature(once_cell)]
  #![feature(option_result_contains)]
-@@ -127,7 +126,6 @@ mod pin;
+@@ -135,7 +134,6 @@ mod pin;
  mod pin_macro;
  mod ptr;
  mod result;
@@ -26,3 +27,6 @@ index 06c7be0..359e2e7 100644
  mod slice;
  mod str;
  mod str_lossy;
+-- 
+2.26.2.7.g19db9cfb68.dirty
+
diff --git a/rust-toolchain b/rust-toolchain
index b20aeb979ad7..775d9906bf41 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2022-06-06"
+channel = "nightly-2022-08-26"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
diff --git a/src/builder.rs b/src/builder.rs
index 3608b97fcf6e..41df7e647b5f 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1185,6 +1185,15 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn atomic_cmpxchg(&mut self, dst: RValue<'gcc>, cmp: RValue<'gcc>, src: RValue<'gcc>, order: AtomicOrdering, failure_order: AtomicOrdering, weak: bool) -> RValue<'gcc> {
         let expected = self.current_func().new_local(None, cmp.get_type(), "expected");
         self.llbb().add_assignment(None, expected, cmp);
+        // NOTE: gcc doesn't support a failure memory model that is stronger than the success
+        // memory model.
+        let order =
+            if failure_order as i32 > order as i32 {
+                failure_order
+            }
+            else {
+                order
+            };
         let success = self.compare_exchange(dst, expected, src, order, failure_order, weak);
 
         let pair_type = self.cx.type_struct(&[src.get_type(), self.bool_type], false);

From 7d01d51e9f77ce1416ff1268831c8a201492dae1 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 27 Aug 2022 09:32:45 -0400
Subject: [PATCH 152/997] Fix tests

---
 tests/run/array.rs        | 2 +-
 tests/run/assign.rs       | 2 +-
 tests/run/closure.rs      | 2 +-
 tests/run/condition.rs    | 2 +-
 tests/run/fun_ptr.rs      | 2 +-
 tests/run/int_overflow.rs | 2 +-
 tests/run/mut_ref.rs      | 2 +-
 tests/run/operations.rs   | 2 +-
 tests/run/ptr_cast.rs     | 2 +-
 9 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/tests/run/array.rs b/tests/run/array.rs
index 8b621d8a3530..c53d98340f04 100644
--- a/tests/run/array.rs
+++ b/tests/run/array.rs
@@ -79,7 +79,7 @@ pub unsafe fn drop_in_place<T: ?Sized>(to_drop: *mut T) {
 #[lang = "panic"]
 #[track_caller]
 #[no_mangle]
-pub fn panic(_msg: &str) -> ! {
+pub fn panic(_msg: &'static str) -> ! {
     unsafe {
         libc::puts("Panicking\0" as *const str as *const u8);
         intrinsics::abort();
diff --git a/tests/run/assign.rs b/tests/run/assign.rs
index eb38a8a38357..b95a7b714153 100644
--- a/tests/run/assign.rs
+++ b/tests/run/assign.rs
@@ -64,7 +64,7 @@ mod intrinsics {
 #[lang = "panic"]
 #[track_caller]
 #[no_mangle]
-pub fn panic(_msg: &str) -> ! {
+pub fn panic(_msg: &'static str) -> ! {
     unsafe {
         libc::puts("Panicking\0" as *const str as *const u8);
         libc::fflush(libc::stdout);
diff --git a/tests/run/closure.rs b/tests/run/closure.rs
index 7121a5f0d522..4d01d879dc1d 100644
--- a/tests/run/closure.rs
+++ b/tests/run/closure.rs
@@ -177,7 +177,7 @@ impl Add for isize {
 #[lang = "panic"]
 #[track_caller]
 #[no_mangle]
-pub fn panic(_msg: &str) -> ! {
+pub fn panic(_msg: &'static str) -> ! {
     unsafe {
         libc::puts("Panicking\0" as *const str as *const u8);
         intrinsics::abort();
diff --git a/tests/run/condition.rs b/tests/run/condition.rs
index 6a2e2d5bb11a..38b3084cb6c7 100644
--- a/tests/run/condition.rs
+++ b/tests/run/condition.rs
@@ -82,7 +82,7 @@ pub unsafe fn drop_in_place<T: ?Sized>(to_drop: *mut T) {
 #[lang = "panic"]
 #[track_caller]
 #[no_mangle]
-pub fn panic(_msg: &str) -> ! {
+pub fn panic(_msg: &'static str) -> ! {
     unsafe {
         libc::puts("Panicking\0" as *const str as *const u8);
         intrinsics::abort();
diff --git a/tests/run/fun_ptr.rs b/tests/run/fun_ptr.rs
index a226fff79e51..995fc5ca5d23 100644
--- a/tests/run/fun_ptr.rs
+++ b/tests/run/fun_ptr.rs
@@ -76,7 +76,7 @@ pub unsafe fn drop_in_place<T: ?Sized>(to_drop: *mut T) {
 #[lang = "panic"]
 #[track_caller]
 #[no_mangle]
-pub fn panic(_msg: &str) -> ! {
+pub fn panic(_msg: &'static str) -> ! {
     unsafe {
         libc::puts("Panicking\0" as *const str as *const u8);
         intrinsics::abort();
diff --git a/tests/run/int_overflow.rs b/tests/run/int_overflow.rs
index ea2c5add962a..4ca623625395 100644
--- a/tests/run/int_overflow.rs
+++ b/tests/run/int_overflow.rs
@@ -62,7 +62,7 @@ mod intrinsics {
 #[lang = "panic"]
 #[track_caller]
 #[no_mangle]
-pub fn panic(_msg: &str) -> ! {
+pub fn panic(_msg: &'static str) -> ! {
     unsafe {
         // Panicking is expected iff overflow checking is enabled.
         #[cfg(debug_assertions)]
diff --git a/tests/run/mut_ref.rs b/tests/run/mut_ref.rs
index 52de20021f3e..814bb1a612e4 100644
--- a/tests/run/mut_ref.rs
+++ b/tests/run/mut_ref.rs
@@ -66,7 +66,7 @@ mod intrinsics {
 #[lang = "panic"]
 #[track_caller]
 #[no_mangle]
-pub fn panic(_msg: &str) -> ! {
+pub fn panic(_msg: &'static str) -> ! {
     unsafe {
         libc::puts("Panicking\0" as *const str as *const u8);
         libc::fflush(libc::stdout);
diff --git a/tests/run/operations.rs b/tests/run/operations.rs
index e078b37b4aba..affe12067ffe 100644
--- a/tests/run/operations.rs
+++ b/tests/run/operations.rs
@@ -72,7 +72,7 @@ mod intrinsics {
 #[lang = "panic"]
 #[track_caller]
 #[no_mangle]
-pub fn panic(_msg: &str) -> ! {
+pub fn panic(_msg: &'static str) -> ! {
     unsafe {
         libc::puts("Panicking\0" as *const str as *const u8);
         libc::fflush(libc::stdout);
diff --git a/tests/run/ptr_cast.rs b/tests/run/ptr_cast.rs
index 6ac099ea145c..08481739a7f9 100644
--- a/tests/run/ptr_cast.rs
+++ b/tests/run/ptr_cast.rs
@@ -76,7 +76,7 @@ pub unsafe fn drop_in_place<T: ?Sized>(to_drop: *mut T) {
 #[lang = "panic"]
 #[track_caller]
 #[no_mangle]
-pub fn panic(_msg: &str) -> ! {
+pub fn panic(_msg: &'static str) -> ! {
     unsafe {
         libc::puts("Panicking\0" as *const str as *const u8);
         intrinsics::abort();

From eed6603c0ade362b00d129330c689ec27ca0a500 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 27 Aug 2022 11:10:34 -0400
Subject: [PATCH 153/997] Fix tests

---
 failing-ui-tests.txt | 10 +++++-----
 test.sh              |  7 ++++---
 2 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 717d0d39331f..0e34110a0603 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -9,28 +9,28 @@ src/test/ui/allocator/xcrate-use.rs
 src/test/ui/allocator/xcrate-use2.rs
 src/test/ui/asm/may_unwind.rs
 src/test/ui/asm/x86_64/const.rs
+src/test/ui/asm/x86_64/issue-96797.rs
 src/test/ui/asm/x86_64/multiple-clobber-abi.rs
 src/test/ui/async-await/async-fn-size-moved-locals.rs
 src/test/ui/async-await/async-fn-size-uninit-locals.rs
-src/test/ui/backtrace.rs
 src/test/ui/cfg/cfg-panic.rs
 src/test/ui/debuginfo/debuginfo-emit-llvm-ir-and-split-debuginfo.rs
 src/test/ui/functions-closures/parallel-codegen-closures.rs
 src/test/ui/generator/size-moved-locals.rs
-src/test/ui/issues/issue-32518.rs
+src/test/ui/issues/issue-40883.rs
 src/test/ui/issues/issue-47364.rs
-src/test/ui/issues/issue-74564-if-expr-stack-overflow.rs
 src/test/ui/linkage-attr/linkage1.rs
 src/test/ui/lto/dylib-works.rs
-src/test/ui/mir/mir_heavy_promoted.rs
+src/test/ui/macros/rfc-2011-nicer-assert-messages/all-not-available-cases.rs
+src/test/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
 src/test/ui/numbers-arithmetic/saturating-float-casts.rs
 src/test/ui/polymorphization/promoted-function.rs
+src/test/ui/process/nofile-limit.rs
 src/test/ui/runtime/rt-explody-panic-payloads.rs
 src/test/ui/sepcomp/sepcomp-cci.rs
 src/test/ui/sepcomp/sepcomp-extern.rs
 src/test/ui/sepcomp/sepcomp-fns-backwards.rs
 src/test/ui/sepcomp/sepcomp-fns.rs
-src/test/ui/sepcomp/sepcomp-lib.rs
 src/test/ui/sepcomp/sepcomp-statics.rs
 src/test/ui/simd/generics.rs
 src/test/ui/simd/intrinsic/float-math-pass.rs
diff --git a/test.sh b/test.sh
index 06f608ad422a..392c07f9f626 100755
--- a/test.sh
+++ b/test.sh
@@ -327,6 +327,7 @@ EOF
     git checkout src/test/ui/lto/auxiliary/dylib.rs
     git checkout src/test/ui/type-alias-impl-trait/auxiliary/cross_crate_ice.rs
     git checkout src/test/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
+    git checkout src/test/ui/macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs
 
     RUSTC_ARGS="-Zpanic-abort-tests -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot -Cpanic=abort"
 
@@ -338,7 +339,7 @@ EOF
         xargs -a ../failing-ui-tests.txt -d'\n' rm
     else
         # Removing all tests.
-        find src/test/ui -type f -name '*.rs' -exec rm {} \;
+        find src/test/ui -type f -name '*.rs' -not -path '*/auxiliary/*' -delete
         # Putting back only the failing ones.
         xargs -a ../failing-ui-tests.txt -d'\n' git checkout --
     fi
@@ -354,7 +355,7 @@ EOF
         count=$((count + 1))
         split -d -l $count -a 1 ui_tests ui_tests.split
         # Removing all tests.
-        find src/test/ui -type f -name '*.rs' -not -path "*/auxiliary/*" -exec rm {} \;
+        find src/test/ui -type f -name '*.rs' -not -path "*/auxiliary/*" -delete
         # Putting back only the ones we want to test.
         xargs -a "ui_tests.split$current_part" -d'\n' git checkout --
     fi
@@ -372,7 +373,7 @@ function test_successful_rustc() {
 }
 
 function clean_ui_tests() {
-    find rust/build/x86_64-unknown-linux-gnu/test/ui/ -name stamp -exec rm -rf {} \;
+    find rust/build/x86_64-unknown-linux-gnu/test/ui/ -name stamp -delete
 }
 
 function all() {

From 61a7b96c800c7f0a338b3f8f4b5b1e89f82b1668 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 27 Aug 2022 11:44:21 -0400
Subject: [PATCH 154/997] Disable test mir_heavy_promoted

---
 test.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/test.sh b/test.sh
index 392c07f9f626..ed43c645bd2d 100755
--- a/test.sh
+++ b/test.sh
@@ -321,6 +321,7 @@ EOF
     git checkout -- src/test/ui/issues/auxiliary/issue-3136-a.rs # contains //~ERROR, but shouldn't be removed
 
     rm -r src/test/ui/{abi*,extern/,panic-runtime/,panics/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,chalkify/bugs/,test*,*lto*.rs,consts/const-float-bits-reject-conv.rs,consts/issue-miri-1910.rs} || true
+    rm src/test/ui/mir/mir_heavy_promoted.rs # this tests is oom-killed in the CI.
     for test in $(rg --files-with-matches "catch_unwind|should_panic|thread|lto" src/test/ui); do
       rm $test
     done

From 4df874f73d329e2aa3ffa7800f26476499302ec6 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Sun, 12 Jun 2022 01:06:58 -0500
Subject: [PATCH 155/997] simd: Implement missing reduction intrinsics

Implements the following simd reduction intrinsics:
- simd_reduce_add_ordered
- simd_reduce_mul_ordered
- simd_reduce_min_nanless
- simd_reduce_max_nanless
- simd_reduce_xor
- simd_reduce_any
- simd_reduce_all

Also fixes the ordering of simd_reduce_min and simd_reduce_max,
which were tested to be flipped.

Both simd_reduce_min_nanless and simd_reduce_max_nanless are identical
to their non-nanless variants for the time being.  An attempt was made
at a more optimal codegen solution based on vector_reduce_op.  However,
this approach ran into masking issues for floating-point vector types,
which appears to be broken for the same reason that comparison
operations such as simd_lt are broken for floating-point vector types.
More investigation is required, however, to determine a root cause and
appropriate fix.

This should be enough to pass the generic-reduction-pass.rs ui tests
with the 'master' feature enabled.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 failing-ui-tests.txt   |  1 -
 failing-ui-tests12.txt |  1 +
 src/builder.rs         | 77 ++++++++++++++++++++++++++++++++++++++++--
 src/intrinsic/simd.rs  | 39 +++++++++++++++------
 src/type_.rs           |  4 ---
 5 files changed, 105 insertions(+), 17 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 0e34110a0603..6d36c9630134 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -40,7 +40,6 @@ src/test/ui/simd/intrinsic/generic-as.rs
 src/test/ui/simd/intrinsic/generic-bitmask-pass.rs
 src/test/ui/simd/intrinsic/generic-comparison-pass.rs
 src/test/ui/simd/intrinsic/generic-gather-pass.rs
-src/test/ui/simd/intrinsic/generic-reduction-pass.rs
 src/test/ui/simd/intrinsic/generic-select-pass.rs
 src/test/ui/simd/issue-17170.rs
 src/test/ui/simd/issue-39720.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 0a50c0a2ce13..d0d8a08421ac 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -11,6 +11,7 @@ src/test/ui/simd/intrinsic/generic-arithmetic-saturating-pass.rs
 src/test/ui/simd/intrinsic/generic-cast-pass.rs
 src/test/ui/simd/intrinsic/generic-cast-pointer-width.rs
 src/test/ui/simd/intrinsic/generic-elements-pass.rs
+src/test/ui/simd/intrinsic/generic-reduction-pass.rs
 src/test/ui/simd/intrinsic/inlining-issue67557-ice.rs
 src/test/ui/simd/intrinsic/inlining-issue67557.rs
 src/test/ui/simd/monomorphize-shuffle-index.rs
diff --git a/src/builder.rs b/src/builder.rs
index 41df7e647b5f..899eff064120 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1460,15 +1460,47 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         unimplemented!();
     }
 
+    #[cfg(feature="master")]
+    pub fn vector_reduce_fadd(&mut self, acc: RValue<'gcc>, src: RValue<'gcc>) -> RValue<'gcc> {
+        let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
+        let element_count = vector_type.get_num_units();
+        (0..element_count).into_iter()
+            .map(|i| self.context
+                .new_vector_access(None, src, self.context.new_rvalue_from_int(self.int_type, i as _))
+                .to_rvalue())
+            .fold(acc, |x, i| x + i)
+    }
+
+    #[cfg(not(feature="master"))]
+    pub fn vector_reduce_fadd(&mut self, _acc: RValue<'gcc>, _src: RValue<'gcc>) -> RValue<'gcc> {
+        unimplemented!();
+    }
+
     pub fn vector_reduce_fmul_fast(&mut self, _acc: RValue<'gcc>, _src: RValue<'gcc>) -> RValue<'gcc> {
         unimplemented!();
     }
 
+    #[cfg(feature="master")]
+    pub fn vector_reduce_fmul(&mut self, acc: RValue<'gcc>, src: RValue<'gcc>) -> RValue<'gcc> {
+        let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
+        let element_count = vector_type.get_num_units();
+        (0..element_count).into_iter()
+            .map(|i| self.context
+                .new_vector_access(None, src, self.context.new_rvalue_from_int(self.int_type, i as _))
+                .to_rvalue())
+            .fold(acc, |x, i| x * i)
+    }
+
+    #[cfg(not(feature="master"))]
+    pub fn vector_reduce_fmul(&mut self, _acc: RValue<'gcc>, _src: RValue<'gcc>) -> RValue<'gcc> {
+        unimplemented!()
+    }
+
     // Inspired by Hacker's Delight min implementation.
     pub fn vector_reduce_min(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
         self.vector_reduce(src, |a, b, context| {
             let differences_or_zeros = difference_or_zero(a, b, context);
-            context.new_binary_op(None, BinaryOp::Minus, a.get_type(), a, differences_or_zeros)
+            context.new_binary_op(None, BinaryOp::Plus, b.get_type(), b, differences_or_zeros)
         })
     }
 
@@ -1476,10 +1508,51 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     pub fn vector_reduce_max(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
         self.vector_reduce(src, |a, b, context| {
             let differences_or_zeros = difference_or_zero(a, b, context);
-            context.new_binary_op(None, BinaryOp::Plus, b.get_type(), b, differences_or_zeros)
+            context.new_binary_op(None, BinaryOp::Minus, a.get_type(), a, differences_or_zeros)
         })
     }
 
+    #[cfg(feature="master")]
+    pub fn vector_reduce_fmin(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
+        let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
+        let element_count = vector_type.get_num_units();
+        let mut acc = self.context.new_vector_access(None, src, self.context.new_rvalue_zero(self.int_type)).to_rvalue();
+        for i in 1..element_count {
+            let elem = self.context
+                .new_vector_access(None, src, self.context.new_rvalue_from_int(self.int_type, i as _))
+                .to_rvalue();
+            let cmp = self.context.new_comparison(None, ComparisonOp::LessThan, acc, elem);
+            acc = self.select(cmp, acc, elem);
+        }
+        acc
+    }
+
+    #[cfg(not(feature="master"))]
+    pub fn vector_reduce_fmin(&mut self, _src: RValue<'gcc>) -> RValue<'gcc> {
+        unimplemented!();
+    }
+
+    #[cfg(feature="master")]
+    pub fn vector_reduce_fmax(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
+        let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
+        let element_count = vector_type.get_num_units();
+        let mut acc = self.context.new_vector_access(None, src, self.context.new_rvalue_zero(self.int_type)).to_rvalue();
+        for i in 1..element_count {
+            let elem = self.context
+                .new_vector_access(None, src, self.context.new_rvalue_from_int(self.int_type, i as _))
+                .to_rvalue();
+            let cmp = self.context.new_comparison(None, ComparisonOp::GreaterThan, acc, elem);
+            acc = self.select(cmp, acc, elem);
+        }
+        acc
+    }
+
+    #[cfg(not(feature="master"))]
+    pub fn vector_reduce_fmax(&mut self, _src: RValue<'gcc>) -> RValue<'gcc> {
+        unimplemented!();
+    }
+
+
     pub fn vector_select(&mut self, cond: RValue<'gcc>, then_val: RValue<'gcc>, else_val: RValue<'gcc>) -> RValue<'gcc> {
         // cond is a vector of integers, not of bools.
         let cond_type = cond.get_type();
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index dbf6ee6d285d..8aed06869a90 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -2,7 +2,7 @@
 use gccjit::{ToRValue, ComparisonOp, UnaryOp};
 use gccjit::{BinaryOp, RValue, Type};
 use rustc_codegen_ssa::base::compare_simd_types;
-use rustc_codegen_ssa::common::{TypeKind, span_invalid_monomorphization_error};
+use rustc_codegen_ssa::common::{IntPredicate, TypeKind, span_invalid_monomorphization_error};
 use rustc_codegen_ssa::mir::operand::OperandRef;
 use rustc_codegen_ssa::mir::place::PlaceRef;
 use rustc_codegen_ssa::traits::{BaseTypeMethods, BuilderMethods};
@@ -667,9 +667,24 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         mul,
         1.0
     );
+    arith_red!(
+        simd_reduce_add_ordered: BinaryOp::Plus,
+        vector_reduce_fadd,
+        true,
+        add,
+        0.0
+    );
+    arith_red!(
+        simd_reduce_mul_ordered: BinaryOp::Mult,
+        vector_reduce_fmul,
+        true,
+        mul,
+        1.0
+    );
+
 
     macro_rules! minmax_red {
-        ($name:ident: $reduction:ident) => {
+        ($name:ident: $int_red:ident, $float_red:ident) => {
             if name == sym::$name {
                 require!(
                     ret_ty == in_elem,
@@ -679,7 +694,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                     ret_ty
                 );
                 return match in_elem.kind() {
-                    ty::Int(_) | ty::Uint(_) | ty::Float(_) => Ok(bx.$reduction(args[0].immediate())),
+                    ty::Int(_) | ty::Uint(_) => Ok(bx.$int_red(args[0].immediate())),
+                    ty::Float(_) => Ok(bx.$float_red(args[0].immediate())),
                     _ => return_error!(
                         "unsupported {} from `{}` with element `{}` to `{}`",
                         sym::$name,
@@ -692,8 +708,11 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         };
     }
 
-    minmax_red!(simd_reduce_min: vector_reduce_min);
-    minmax_red!(simd_reduce_max: vector_reduce_max);
+    minmax_red!(simd_reduce_min: vector_reduce_min, vector_reduce_fmin);
+    minmax_red!(simd_reduce_max: vector_reduce_max, vector_reduce_fmax);
+    // TODO(sadlerap): revisit these intrinsics to generate more optimal reductions
+    minmax_red!(simd_reduce_min_nanless: vector_reduce_min, vector_reduce_fmin);
+    minmax_red!(simd_reduce_max_nanless: vector_reduce_max, vector_reduce_fmax);
 
     macro_rules! bitwise_red {
         ($name:ident : $op:expr, $boolean:expr) => {
@@ -719,15 +738,12 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                         ),
                     }
 
-                    // boolean reductions operate on vectors of i1s:
-                    let i1 = bx.type_i1();
-                    let i1xn = bx.type_vector(i1, in_len as u64);
-                    bx.trunc(args[0].immediate(), i1xn)
+                    args[0].immediate()
                 };
                 return match in_elem.kind() {
                     ty::Int(_) | ty::Uint(_) => {
                         let r = bx.vector_reduce_op(input, $op);
-                        Ok(if !$boolean { r } else { bx.zext(r, bx.type_bool()) })
+                        Ok(if !$boolean { r } else { bx.icmp(IntPredicate::IntNE, r, bx.context.new_rvalue_zero(r.get_type())) })
                     }
                     _ => return_error!(
                         "unsupported {} from `{}` with element `{}` to `{}`",
@@ -743,6 +759,9 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
 
     bitwise_red!(simd_reduce_and: BinaryOp::BitwiseAnd, false);
     bitwise_red!(simd_reduce_or: BinaryOp::BitwiseOr, false);
+    bitwise_red!(simd_reduce_xor: BinaryOp::BitwiseXor, false);
+    bitwise_red!(simd_reduce_all: BinaryOp::BitwiseAnd, true);
+    bitwise_red!(simd_reduce_any: BinaryOp::BitwiseOr, true);
 
     unimplemented!("simd {}", name);
 }
diff --git a/src/type_.rs b/src/type_.rs
index c97e9586005b..d7eca2a33df7 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -247,10 +247,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
         self.context.new_array_type(None, ty, len)
     }
-
-    pub fn type_bool(&self) -> Type<'gcc> {
-        self.context.new_type::<bool>()
-    }
 }
 
 pub fn struct_fields<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout<'tcx>) -> (Vec<Type<'gcc>>, bool) {

From e82c6a07fff616ffa0661dd3a6cee3e018a21588 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 25 Aug 2022 16:19:10 +0200
Subject: [PATCH 156/997] Regen intrinsics

---
 src/intrinsic/archs.rs | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 9d674eb87eb3..3879fcb1d982 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -58,12 +58,20 @@ match name {
     "llvm.amdgcn.cubema" => "__builtin_amdgcn_cubema",
     "llvm.amdgcn.cubesc" => "__builtin_amdgcn_cubesc",
     "llvm.amdgcn.cubetc" => "__builtin_amdgcn_cubetc",
+    "llvm.amdgcn.cvt.f32.bf8" => "__builtin_amdgcn_cvt_f32_bf8",
+    "llvm.amdgcn.cvt.f32.fp8" => "__builtin_amdgcn_cvt_f32_fp8",
+    "llvm.amdgcn.cvt.pk.bf8.f32" => "__builtin_amdgcn_cvt_pk_bf8_f32",
+    "llvm.amdgcn.cvt.pk.f32.bf8" => "__builtin_amdgcn_cvt_pk_f32_bf8",
+    "llvm.amdgcn.cvt.pk.f32.fp8" => "__builtin_amdgcn_cvt_pk_f32_fp8",
+    "llvm.amdgcn.cvt.pk.fp8.f32" => "__builtin_amdgcn_cvt_pk_fp8_f32",
     "llvm.amdgcn.cvt.pk.i16" => "__builtin_amdgcn_cvt_pk_i16",
     "llvm.amdgcn.cvt.pk.u16" => "__builtin_amdgcn_cvt_pk_u16",
     "llvm.amdgcn.cvt.pk.u8.f32" => "__builtin_amdgcn_cvt_pk_u8_f32",
     "llvm.amdgcn.cvt.pknorm.i16" => "__builtin_amdgcn_cvt_pknorm_i16",
     "llvm.amdgcn.cvt.pknorm.u16" => "__builtin_amdgcn_cvt_pknorm_u16",
     "llvm.amdgcn.cvt.pkrtz" => "__builtin_amdgcn_cvt_pkrtz",
+    "llvm.amdgcn.cvt.sr.bf8.f32" => "__builtin_amdgcn_cvt_sr_bf8_f32",
+    "llvm.amdgcn.cvt.sr.fp8.f32" => "__builtin_amdgcn_cvt_sr_fp8_f32",
     "llvm.amdgcn.dispatch.id" => "__builtin_amdgcn_dispatch_id",
     "llvm.amdgcn.ds.add.gs.reg.rtn" => "__builtin_amdgcn_ds_add_gs_reg_rtn",
     "llvm.amdgcn.ds.bpermute" => "__builtin_amdgcn_ds_bpermute",
@@ -85,6 +93,7 @@ match name {
     "llvm.amdgcn.fmed3" => "__builtin_amdgcn_fmed3",
     "llvm.amdgcn.fmul.legacy" => "__builtin_amdgcn_fmul_legacy",
     "llvm.amdgcn.groupstaticsize" => "__builtin_amdgcn_groupstaticsize",
+    "llvm.amdgcn.iglp.opt" => "__builtin_amdgcn_iglp_opt",
     "llvm.amdgcn.implicit.buffer.ptr" => "__builtin_amdgcn_implicit_buffer_ptr",
     "llvm.amdgcn.implicitarg.ptr" => "__builtin_amdgcn_implicitarg_ptr",
     "llvm.amdgcn.interp.mov" => "__builtin_amdgcn_interp_mov",
@@ -102,11 +111,19 @@ match name {
     "llvm.amdgcn.mfma.f32.16x16x16f16" => "__builtin_amdgcn_mfma_f32_16x16x16f16",
     "llvm.amdgcn.mfma.f32.16x16x1f32" => "__builtin_amdgcn_mfma_f32_16x16x1f32",
     "llvm.amdgcn.mfma.f32.16x16x2bf16" => "__builtin_amdgcn_mfma_f32_16x16x2bf16",
+    "llvm.amdgcn.mfma.f32.16x16x32.bf8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_bf8",
+    "llvm.amdgcn.mfma.f32.16x16x32.bf8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_fp8",
+    "llvm.amdgcn.mfma.f32.16x16x32.fp8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_bf8",
+    "llvm.amdgcn.mfma.f32.16x16x32.fp8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_fp8",
     "llvm.amdgcn.mfma.f32.16x16x4bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x4bf16_1k",
     "llvm.amdgcn.mfma.f32.16x16x4f16" => "__builtin_amdgcn_mfma_f32_16x16x4f16",
     "llvm.amdgcn.mfma.f32.16x16x4f32" => "__builtin_amdgcn_mfma_f32_16x16x4f32",
     "llvm.amdgcn.mfma.f32.16x16x8.xf32" => "__builtin_amdgcn_mfma_f32_16x16x8_xf32",
     "llvm.amdgcn.mfma.f32.16x16x8bf16" => "__builtin_amdgcn_mfma_f32_16x16x8bf16",
+    "llvm.amdgcn.mfma.f32.32x32x16.bf8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_bf8",
+    "llvm.amdgcn.mfma.f32.32x32x16.bf8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_fp8",
+    "llvm.amdgcn.mfma.f32.32x32x16.fp8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_bf8",
+    "llvm.amdgcn.mfma.f32.32x32x16.fp8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_fp8",
     "llvm.amdgcn.mfma.f32.32x32x1f32" => "__builtin_amdgcn_mfma_f32_32x32x1f32",
     "llvm.amdgcn.mfma.f32.32x32x2bf16" => "__builtin_amdgcn_mfma_f32_32x32x2bf16",
     "llvm.amdgcn.mfma.f32.32x32x2f32" => "__builtin_amdgcn_mfma_f32_32x32x2f32",
@@ -163,13 +180,22 @@ match name {
     "llvm.amdgcn.sad.u16" => "__builtin_amdgcn_sad_u16",
     "llvm.amdgcn.sad.u8" => "__builtin_amdgcn_sad_u8",
     "llvm.amdgcn.sched.barrier" => "__builtin_amdgcn_sched_barrier",
+    "llvm.amdgcn.sched.group.barrier" => "__builtin_amdgcn_sched_group_barrier",
     "llvm.amdgcn.sdot2" => "__builtin_amdgcn_sdot2",
     "llvm.amdgcn.sdot4" => "__builtin_amdgcn_sdot4",
     "llvm.amdgcn.sdot8" => "__builtin_amdgcn_sdot8",
     "llvm.amdgcn.smfmac.f32.16x16x32.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x32_bf16",
     "llvm.amdgcn.smfmac.f32.16x16x32.f16" => "__builtin_amdgcn_smfmac_f32_16x16x32_f16",
+    "llvm.amdgcn.smfmac.f32.16x16x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_bf8",
+    "llvm.amdgcn.smfmac.f32.16x16x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_fp8",
+    "llvm.amdgcn.smfmac.f32.16x16x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_bf8",
+    "llvm.amdgcn.smfmac.f32.16x16x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_fp8",
     "llvm.amdgcn.smfmac.f32.32x32x16.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x16_bf16",
     "llvm.amdgcn.smfmac.f32.32x32x16.f16" => "__builtin_amdgcn_smfmac_f32_32x32x16_f16",
+    "llvm.amdgcn.smfmac.f32.32x32x32.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_bf8",
+    "llvm.amdgcn.smfmac.f32.32x32x32.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_fp8",
+    "llvm.amdgcn.smfmac.f32.32x32x32.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_bf8",
+    "llvm.amdgcn.smfmac.f32.32x32x32.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_fp8",
     "llvm.amdgcn.smfmac.i32.16x16x64.i8" => "__builtin_amdgcn_smfmac_i32_16x16x64_i8",
     "llvm.amdgcn.smfmac.i32.32x32x32.i8" => "__builtin_amdgcn_smfmac_i32_32x32x32_i8",
     "llvm.amdgcn.sudot4" => "__builtin_amdgcn_sudot4",
@@ -296,6 +322,8 @@ match name {
     "llvm.bpf.pseudo" => "__builtin_bpf_pseudo",
     // cuda
     "llvm.cuda.syncthreads" => "__syncthreads",
+    // dx
+    "llvm.dx.create.handle" => "__builtin_hlsl_create_handle",
     // hexagon
     "llvm.hexagon.A2.abs" => "__builtin_HEXAGON_A2_abs",
     "llvm.hexagon.A2.absp" => "__builtin_HEXAGON_A2_absp",
@@ -7545,6 +7573,7 @@ match name {
     "llvm.x86.rdpid" => "__builtin_ia32_rdpid",
     "llvm.x86.rdpkru" => "__builtin_ia32_rdpkru",
     "llvm.x86.rdpmc" => "__builtin_ia32_rdpmc",
+    "llvm.x86.rdpru" => "__builtin_ia32_rdpru",
     "llvm.x86.rdsspd" => "__builtin_ia32_rdsspd",
     "llvm.x86.rdsspq" => "__builtin_ia32_rdsspq",
     "llvm.x86.rdtsc" => "__builtin_ia32_rdtsc",

From 5c2dec038c21de940b6080203d8e4281a7f2c912 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 27 Aug 2022 15:39:23 -0400
Subject: [PATCH 157/997] Add used function attribute from inline asm

---
 Cargo.lock    |  4 ++--
 src/asm.rs    |  3 +++
 src/consts.rs | 15 ++++++++++++---
 3 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 3245f5843e54..10d2542f8b5a 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#1a60fe3918a5b3b0983c1ea09f4b9445001a6468"
+source = "git+https://github.com/antoyo/gccjit.rs#f30cc2bd330f4fda3d625f305bdfd7e523e2d8f8"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#1a60fe3918a5b3b0983c1ea09f4b9445001a6468"
+source = "git+https://github.com/antoyo/gccjit.rs#f30cc2bd330f4fda3d625f305bdfd7e523e2d8f8"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/src/asm.rs b/src/asm.rs
index fa40aa80804a..eb37488a6c5c 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -718,6 +718,8 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                         }
 
                         GlobalAsmOperandRef::SymFn { instance } => {
+                            let function = self.rvalue_as_function(get_fn(self, instance));
+                            self.add_used_function(function);
                             // TODO(@Amanieu): Additional mangling is needed on
                             // some targets to add a leading underscore (Mach-O)
                             // or byte count suffixes (x86 Windows).
@@ -726,6 +728,7 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                         }
 
                         GlobalAsmOperandRef::SymStatic { def_id } => {
+                            // TODO(antoyo): set the global variable as used.
                             // TODO(@Amanieu): Additional mangling is needed on
                             // some targets to add a leading underscore (Mach-O).
                             let instance = Instance::mono(self.tcx, def_id);
diff --git a/src/consts.rs b/src/consts.rs
index e83cf53f48ef..9307d280f61c 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -1,4 +1,6 @@
-use gccjit::{GlobalKind, LValue, RValue, ToRValue, Type};
+#[cfg(feature = "master")]
+use gccjit::FnAttribute;
+use gccjit::{Function, GlobalKind, LValue, RValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{BaseTypeMethods, ConstMethods, DerivedTypeMethods, StaticMethods};
 use rustc_hir as hir;
 use rustc_hir::Node;
@@ -159,12 +161,19 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
         // TODO(antoyo)
     }
 
-    fn add_compiler_used_global(&self, _global: RValue<'gcc>) {
-        // TODO(antoyo)
+    fn add_compiler_used_global(&self, global: RValue<'gcc>) {
+        // NOTE: seems like GCC does not make the distinction between compiler.used and used.
+        self.add_used_global(global);
     }
 }
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
+    #[cfg_attr(not(feature="master"), allow(unused_variables))]
+    pub fn add_used_function(&self, function: Function<'gcc>) {
+        #[cfg(feature = "master")]
+        function.add_attribute(FnAttribute::Used);
+    }
+
     pub fn static_addr_of_mut(&self, cv: RValue<'gcc>, align: Align, kind: Option<&str>) -> RValue<'gcc> {
         let global =
             match kind {

From fc56c544165d02e589369a97076ec64fe627a6b5 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 27 Aug 2022 12:12:06 -0400
Subject: [PATCH 158/997] Remove extra newline in asm

---
 failing-ui-tests.txt   |  2 --
 failing-ui-tests12.txt |  1 +
 src/asm.rs             | 19 +++++++++----------
 3 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 6d36c9630134..9e88859593d4 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -8,8 +8,6 @@ src/test/ui/allocator/no_std-alloc-error-handler-default.rs
 src/test/ui/allocator/xcrate-use.rs
 src/test/ui/allocator/xcrate-use2.rs
 src/test/ui/asm/may_unwind.rs
-src/test/ui/asm/x86_64/const.rs
-src/test/ui/asm/x86_64/issue-96797.rs
 src/test/ui/asm/x86_64/multiple-clobber-abi.rs
 src/test/ui/async-await/async-fn-size-moved-locals.rs
 src/test/ui/async-await/async-fn-size-uninit-locals.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index d0d8a08421ac..2aab9c80f8fb 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -1,3 +1,4 @@
+src/test/ui/asm/x86_64/issue-96797.rs
 src/test/ui/intrinsics/const-eval-select-x86_64.rs
 src/test/ui/packed/packed-struct-drop-aligned.rs
 src/test/ui/packed/packed-struct-generic-layout.rs
diff --git a/src/asm.rs b/src/asm.rs
index eb37488a6c5c..9d9b6a23d074 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -695,17 +695,16 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         for piece in template {
             match *piece {
                 InlineAsmTemplatePiece::String(ref string) => {
-                    for line in string.lines() {
+                    let mut index = 0;
+                    while index < string.len() {
                         // NOTE: gcc does not allow inline comment, so remove them.
-                        let line =
-                            if let Some(index) = line.rfind("//") {
-                                &line[..index]
-                            }
-                            else {
-                                line
-                            };
-                        template_str.push_str(line);
-                        template_str.push('\n');
+                        let comment_index = string[index..].find("//")
+                            .map(|comment_index| comment_index + index)
+                            .unwrap_or(string.len());
+                        template_str.push_str(&string[index..comment_index]);
+                        index = string[comment_index..].find('\n')
+                            .map(|index| index + comment_index)
+                            .unwrap_or(string.len());
                     }
                 },
                 InlineAsmTemplatePiece::Placeholder { operand_idx, modifier: _, span: _ } => {

From 45ec5f267689ad71677abde6403c98a9fd6a3e82 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 28 Aug 2022 20:58:11 -0400
Subject: [PATCH 159/997] Fix bitcast to a type of a different size

---
 src/builder.rs | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 899eff064120..d9b24b2dc350 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1364,22 +1364,17 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             vector_elements.push(self.context.new_rvalue_zero(mask_element_type));
         }
 
-        let array_type = self.context.new_array_type(None, element_type, vec_num_units as i32);
         let result_type = self.context.new_vector_type(element_type, mask_num_units as u64);
         let (v1, v2) =
             if vec_num_units < mask_num_units {
                 // NOTE: the mask needs to be the same length as the input vectors, so join the 2
                 // vectors and create a dummy second vector.
-                // TODO(antoyo): switch to using new_vector_access.
-                let array = self.context.new_bitcast(None, v1, array_type);
                 let mut elements = vec![];
                 for i in 0..vec_num_units {
-                    elements.push(self.context.new_array_access(None, array, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
+                    elements.push(self.context.new_vector_access(None, v1, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
                 }
-                // TODO(antoyo): switch to using new_vector_access.
-                let array = self.context.new_bitcast(None, v2, array_type);
                 for i in 0..(mask_num_units - vec_num_units) {
-                    elements.push(self.context.new_array_access(None, array, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
+                    elements.push(self.context.new_vector_access(None, v2, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
                 }
                 let v1 = self.context.new_rvalue_from_vector(None, result_type, &elements);
                 let zero = self.context.new_rvalue_zero(element_type);
@@ -1399,10 +1394,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             // NOTE: if padding was added, only select the number of elements of the masks to
             // remove that padding in the result.
             let mut elements = vec![];
-            // TODO(antoyo): switch to using new_vector_access.
-            let array = self.context.new_bitcast(None, result, array_type);
             for i in 0..mask_num_units {
-                elements.push(self.context.new_array_access(None, array, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
+                elements.push(self.context.new_vector_access(None, result, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
             }
             self.context.new_rvalue_from_vector(None, result_type, &elements)
         }

From 1d3ca135d055dbda6c255227084296f3552b99a9 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Tue, 30 Aug 2022 17:33:55 -0500
Subject: [PATCH 160/997] simd: implement simd_fmin/fmax

This implements simd_fmin/fmax in a largely-optimal method.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 failing-ui-tests.txt   |  1 -
 failing-ui-tests12.txt |  1 +
 src/builder.rs         | 32 ++++++++++++++++++++++++++++++++
 src/intrinsic/simd.rs  |  2 ++
 4 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 9e88859593d4..fc6dcfc7bc7b 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -32,7 +32,6 @@ src/test/ui/sepcomp/sepcomp-fns.rs
 src/test/ui/sepcomp/sepcomp-statics.rs
 src/test/ui/simd/generics.rs
 src/test/ui/simd/intrinsic/float-math-pass.rs
-src/test/ui/simd/intrinsic/float-minmax-pass.rs
 src/test/ui/simd/intrinsic/generic-arithmetic-pass.rs
 src/test/ui/simd/intrinsic/generic-as.rs
 src/test/ui/simd/intrinsic/generic-bitmask-pass.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 2aab9c80f8fb..e7952f524124 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -8,6 +8,7 @@ src/test/ui/packed/packed-struct-size.rs
 src/test/ui/packed/packed-struct-vec.rs
 src/test/ui/packed/packed-tuple-struct-layout.rs
 src/test/ui/simd/array-type.rs
+src/test/ui/simd/intrinsic/float-minmax-pass.rs
 src/test/ui/simd/intrinsic/generic-arithmetic-saturating-pass.rs
 src/test/ui/simd/intrinsic/generic-cast-pass.rs
 src/test/ui/simd/intrinsic/generic-cast-pointer-width.rs
diff --git a/src/builder.rs b/src/builder.rs
index d9b24b2dc350..52a4854aca3a 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1505,6 +1505,34 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         })
     }
 
+    fn vector_extremum(&mut self, a: RValue<'gcc>, b: RValue<'gcc>, direction: ExtremumOperation) -> RValue<'gcc> {
+        let vector_type = a.get_type();
+
+        // mask out the NaNs in b and replace them with the corresponding lane in a, so when a and
+        // b get compared & spliced together, we get the numeric values instead of NaNs.
+        let b_nan_mask = self.context.new_comparison(None, ComparisonOp::NotEquals, b, b);
+        let mask_type = b_nan_mask.get_type();
+        let b_nan_mask_inverted = self.context.new_unary_op(None, UnaryOp::BitwiseNegate, mask_type, b_nan_mask);
+        let a_cast = self.context.new_bitcast(None, a, mask_type);
+        let b_cast = self.context.new_bitcast(None, b, mask_type);
+        let res = (b_nan_mask & a_cast) | (b_nan_mask_inverted & b_cast);
+        let b = self.context.new_bitcast(None, res, vector_type);
+
+        // now do the actual comparison
+        let comparison_op = match direction {
+            ExtremumOperation::Min => ComparisonOp::LessThan,
+            ExtremumOperation::Max => ComparisonOp::GreaterThan,
+        };
+        let cmp = self.context.new_comparison(None, comparison_op, a, b);
+        let cmp_inverted = self.context.new_unary_op(None, UnaryOp::BitwiseNegate, cmp.get_type(), cmp);
+        let res = (cmp & a_cast) | (cmp_inverted & res);
+        self.context.new_bitcast(None, res, vector_type)
+    }
+
+    pub fn vector_fmin(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        self.vector_extremum(a, b, ExtremumOperation::Min)
+    }
+
     #[cfg(feature="master")]
     pub fn vector_reduce_fmin(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
         let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
@@ -1525,6 +1553,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         unimplemented!();
     }
 
+    pub fn vector_fmax(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+        self.vector_extremum(a, b, ExtremumOperation::Max)
+    }
+
     #[cfg(feature="master")]
     pub fn vector_reduce_fmax(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
         let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 8aed06869a90..36b5ab12b172 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -492,6 +492,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         simd_and: Uint, Int => and;
         simd_or: Uint, Int => or; // FIXME(antoyo): calling `or` might not work on vectors.
         simd_xor: Uint, Int => xor;
+        simd_fmin: Float => vector_fmin;
+        simd_fmax: Float => vector_fmax;
     }
 
     macro_rules! arith_unary {

From 9560cb13fe99f47b091e15bc03ae48a96044d833 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 4 Sep 2022 19:29:34 -0400
Subject: [PATCH 161/997] Add IRC channel in the readme

---
 Readme.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Readme.md b/Readme.md
index aa3626db4ef5..b6dc421e259f 100644
--- a/Readme.md
+++ b/Readme.md
@@ -1,5 +1,7 @@
 # WIP libgccjit codegen backend for rust
 
+[![IRC channel](https://img.shields.io/badge/irc.libera.chat-%23rustc__codegen__gcc-blue.svg)](irc://irc.libera.chat/rustc_codegen_gcc)
+
 This is a GCC codegen for rustc, which means it can be loaded by the existing rustc frontend, but benefits from GCC: more architectures are supported and GCC's optimizations are used.
 
 **Despite its name, libgccjit can be used for ahead-of-time compilation, as is used here.**

From 2ecd620acb56c1f834bc4b7c50b2ac4fe8fac0c5 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 4 Sep 2022 19:34:24 -0400
Subject: [PATCH 162/997] Fix IRC badge

---
 Readme.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Readme.md b/Readme.md
index b6dc421e259f..cdd7f55dcdec 100644
--- a/Readme.md
+++ b/Readme.md
@@ -1,6 +1,6 @@
 # WIP libgccjit codegen backend for rust
 
-[![IRC channel](https://img.shields.io/badge/irc.libera.chat-%23rustc__codegen__gcc-blue.svg)](irc://irc.libera.chat/rustc_codegen_gcc)
+[![Chat on IRC](https://img.shields.io/badge/irc.libera.chat-%23rustc__codegen__gcc-blue.svg)](https://web.libera.chat/#rustc_codegen_gcc)
 
 This is a GCC codegen for rustc, which means it can be loaded by the existing rustc frontend, but benefits from GCC: more architectures are supported and GCC's optimizations are used.
 

From d7d820fc47a5987566550ef9ede2ea18b0d1ff05 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Wed, 7 Sep 2022 21:32:34 -0500
Subject: [PATCH 163/997] simd: impl extract_element for vector types

This fixes some tests that needed vector element extraction.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 failing-ui-tests.txt   |  2 --
 failing-ui-tests12.txt |  1 +
 src/builder.rs         | 15 +++++++++++++--
 3 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index fc6dcfc7bc7b..7fe9e084940a 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -30,12 +30,10 @@ src/test/ui/sepcomp/sepcomp-extern.rs
 src/test/ui/sepcomp/sepcomp-fns-backwards.rs
 src/test/ui/sepcomp/sepcomp-fns.rs
 src/test/ui/sepcomp/sepcomp-statics.rs
-src/test/ui/simd/generics.rs
 src/test/ui/simd/intrinsic/float-math-pass.rs
 src/test/ui/simd/intrinsic/generic-arithmetic-pass.rs
 src/test/ui/simd/intrinsic/generic-as.rs
 src/test/ui/simd/intrinsic/generic-bitmask-pass.rs
-src/test/ui/simd/intrinsic/generic-comparison-pass.rs
 src/test/ui/simd/intrinsic/generic-gather-pass.rs
 src/test/ui/simd/intrinsic/generic-select-pass.rs
 src/test/ui/simd/issue-17170.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index e7952f524124..7826875f04ed 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -12,6 +12,7 @@ src/test/ui/simd/intrinsic/float-minmax-pass.rs
 src/test/ui/simd/intrinsic/generic-arithmetic-saturating-pass.rs
 src/test/ui/simd/intrinsic/generic-cast-pass.rs
 src/test/ui/simd/intrinsic/generic-cast-pointer-width.rs
+src/test/ui/simd/intrinsic/generic-comparison-pass.rs
 src/test/ui/simd/intrinsic/generic-elements-pass.rs
 src/test/ui/simd/intrinsic/generic-reduction-pass.rs
 src/test/ui/simd/intrinsic/inlining-issue67557-ice.rs
diff --git a/src/builder.rs b/src/builder.rs
index 52a4854aca3a..95080e024fc9 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1059,8 +1059,19 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         unimplemented!();
     }
 
-    fn extract_element(&mut self, _vec: RValue<'gcc>, _idx: RValue<'gcc>) -> RValue<'gcc> {
-        unimplemented!();
+    #[cfg(feature="master")]
+    fn extract_element(&mut self, vec: RValue<'gcc>, idx: RValue<'gcc>) -> RValue<'gcc> {
+        self.context.new_vector_access(None, vec, idx).to_rvalue()
+    }
+
+    #[cfg(not(feature="master"))]
+    fn extract_element(&mut self, vec: RValue<'gcc>, idx: RValue<'gcc>) -> RValue<'gcc> {
+        let vector_type = vec.get_type().unqualified().dyncast_vector().expect("Called extract_element on a non-vector type");
+        let element_type = vector_type.get_element_type();
+        let vec_num_units = vector_type.get_num_units();
+        let array_type = self.context.new_array_type(None, element_type, vec_num_units as i32);
+        let array = self.context.new_bitcast(None, vec, array_type).to_rvalue();
+        self.context.new_array_access(None, array, idx).to_rvalue()
     }
 
     fn vector_splat(&mut self, _num_elts: usize, _elt: RValue<'gcc>) -> RValue<'gcc> {

From 3e6710962e6cec6b64e71c9fe458bed17ba4ed78 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 14 Sep 2022 08:26:03 -0400
Subject: [PATCH 164/997] Fix build of release sysroot in test.sh

---
 test.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/test.sh b/test.sh
index ed43c645bd2d..2bdf362ab40d 100755
--- a/test.sh
+++ b/test.sh
@@ -30,7 +30,7 @@ while [[ $# -gt 0 ]]; do
             shift
             ;;
         --release-sysroot)
-            sysroot_channel=release
+            sysroot_channel="--release"
             shift
             ;;
         --no-default-features)
@@ -157,7 +157,7 @@ function mini_tests() {
 
 function build_sysroot() {
     echo "[BUILD] sysroot"
-    time ./build_sysroot/build_sysroot.sh
+    time ./build_sysroot/build_sysroot.sh $sysroot_channel
 }
 
 function std_tests() {

From d9edc8e8691d3b65665a9fb12d4dcd1a3fe4cab6 Mon Sep 17 00:00:00 2001
From: Pietro Albini <pietro.albini@ferrous-systems.com>
Date: Mon, 26 Sep 2022 12:21:51 +0200
Subject: [PATCH 165/997] harden ci configuration

---
 .github/workflows/ci.yml | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 8b36fa0c1c7c..412344cfa3da 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -4,6 +4,9 @@ on:
   - push
   - pull_request
 
+permissions:
+  contents: read
+
 env:
   # Enable backtraces for easier debugging
   RUST_BACKTRACE: 1
@@ -16,9 +19,9 @@ jobs:
       fail-fast: false
       matrix:
         libgccjit_version:
-          - { gcc: "libgccjit.so", extra: "" }
-          - { gcc: "libgccjit_without_int128.so", extra: "" }
-          - { gcc: "libgccjit12.so", extra: "--no-default-features" }
+          - { gcc: "libgccjit.so", extra: "", artifacts_branch: "master" }
+          - { gcc: "libgccjit_without_int128.so", extra: "", artifacts_branch: "master-without-128bit-integers" }
+          - { gcc: "libgccjit12.so", extra: "--no-default-features", artifacts_branch: "gcc12" }
         commands: [
           "--mini-tests",
           "--std-tests",
@@ -49,6 +52,8 @@ jobs:
           name: ${{ matrix.libgccjit_version.gcc }}
           path: gcc-build
           repo: antoyo/gcc
+          branch: ${{ matrix.libgccjit_version.artifacts_branch }}
+          event: push
           search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
 
     - name: Setup path to libgccjit

From 688f7426580d44ab4451c4d8eb3345f296e29e51 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Fri, 16 Sep 2022 16:49:56 -0500
Subject: [PATCH 166/997] simd: implement float math intrinsics

Implements the intrinsics required to pass float-math-pass and
libm_std_can_float ui tests.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 failing-ui-tests.txt  |  2 --
 src/intrinsic/simd.rs | 66 +++++++++++++++++++++++++++----------------
 2 files changed, 42 insertions(+), 26 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 7fe9e084940a..8b740cff4f58 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -30,7 +30,6 @@ src/test/ui/sepcomp/sepcomp-extern.rs
 src/test/ui/sepcomp/sepcomp-fns-backwards.rs
 src/test/ui/sepcomp/sepcomp-fns.rs
 src/test/ui/sepcomp/sepcomp-statics.rs
-src/test/ui/simd/intrinsic/float-math-pass.rs
 src/test/ui/simd/intrinsic/generic-arithmetic-pass.rs
 src/test/ui/simd/intrinsic/generic-as.rs
 src/test/ui/simd/intrinsic/generic-bitmask-pass.rs
@@ -40,7 +39,6 @@ src/test/ui/simd/issue-17170.rs
 src/test/ui/simd/issue-39720.rs
 src/test/ui/simd/issue-85915-simd-ptrs.rs
 src/test/ui/simd/issue-89193.rs
-src/test/ui/simd/libm_std_can_float.rs
 src/test/ui/simd/simd-bitmask.rs
 src/test/ui/simd/type-generic-monomorphisation-extern-nonnull-ptr.rs
 src/test/ui/sse2.rs
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 36b5ab12b172..6d6009972832 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -14,7 +14,6 @@ use rustc_span::{Span, Symbol, sym};
 use rustc_target::abi::Align;
 
 use crate::builder::Builder;
-use crate::intrinsic;
 
 pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>, name: Symbol, callee_ty: Ty<'tcx>, args: &[OperandRef<'tcx, RValue<'gcc>>], ret_ty: Ty<'tcx>, llret_ty: Type<'gcc>, span: Span) -> Result<RValue<'gcc>, ()> {
     // macros for error handling:
@@ -415,8 +414,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
             if let ty::Float(f) = in_elem.kind() {
                 let elem_ty = bx.cx.type_float_from_ty(*f);
                 match f.bit_width() {
-                    32 => ("f32", elem_ty),
-                    64 => ("f64", elem_ty),
+                    32 => ("f", elem_ty),
+                    64 => ("", elem_ty),
                     _ => {
                         return_error!(
                             "unsupported element type `{}` of floating-point vector `{}`",
@@ -432,30 +431,49 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
 
         let vec_ty = bx.cx.type_vector(elem_ty, in_len);
 
-        let (intr_name, fn_ty) =
+        let intr_name =
             match name {
-                sym::simd_ceil => ("ceil", bx.type_func(&[vec_ty], vec_ty)),
-                sym::simd_fabs => ("fabs", bx.type_func(&[vec_ty], vec_ty)), // TODO(antoyo): pand with 170141183420855150465331762880109871103
-                sym::simd_fcos => ("cos", bx.type_func(&[vec_ty], vec_ty)),
-                sym::simd_fexp2 => ("exp2", bx.type_func(&[vec_ty], vec_ty)),
-                sym::simd_fexp => ("exp", bx.type_func(&[vec_ty], vec_ty)),
-                sym::simd_flog10 => ("log10", bx.type_func(&[vec_ty], vec_ty)),
-                sym::simd_flog2 => ("log2", bx.type_func(&[vec_ty], vec_ty)),
-                sym::simd_flog => ("log", bx.type_func(&[vec_ty], vec_ty)),
-                sym::simd_floor => ("floor", bx.type_func(&[vec_ty], vec_ty)),
-                sym::simd_fma => ("fma", bx.type_func(&[vec_ty, vec_ty, vec_ty], vec_ty)),
-                sym::simd_fpowi => ("powi", bx.type_func(&[vec_ty, bx.type_i32()], vec_ty)),
-                sym::simd_fpow => ("pow", bx.type_func(&[vec_ty, vec_ty], vec_ty)),
-                sym::simd_fsin => ("sin", bx.type_func(&[vec_ty], vec_ty)),
-                sym::simd_fsqrt => ("sqrt", bx.type_func(&[vec_ty], vec_ty)),
-                sym::simd_round => ("round", bx.type_func(&[vec_ty], vec_ty)),
-                sym::simd_trunc => ("trunc", bx.type_func(&[vec_ty], vec_ty)),
+                sym::simd_ceil => "ceil",
+                sym::simd_fabs => "fabs", // TODO(antoyo): pand with 170141183420855150465331762880109871103
+                sym::simd_fcos => "cos",
+                sym::simd_fexp2 => "exp2",
+                sym::simd_fexp => "exp",
+                sym::simd_flog10 => "log10",
+                sym::simd_flog2 => "log2",
+                sym::simd_flog => "log",
+                sym::simd_floor => "floor",
+                sym::simd_fma => "fma",
+                sym::simd_fpowi => "__builtin_powi",
+                sym::simd_fpow => "pow",
+                sym::simd_fsin => "sin",
+                sym::simd_fsqrt => "sqrt",
+                sym::simd_round => "round",
+                sym::simd_trunc => "trunc",
                 _ => return_error!("unrecognized intrinsic `{}`", name),
             };
-        let llvm_name = &format!("llvm.{0}.v{1}{2}", intr_name, in_len, elem_ty_str);
-        let function = intrinsic::llvm::intrinsic(llvm_name, &bx.cx);
-        let function: RValue<'gcc> = unsafe { std::mem::transmute(function) };
-        let c = bx.call(fn_ty, function, &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(), None);
+        let builtin_name = format!("{}{}", intr_name, elem_ty_str);
+        let funcs = bx.cx.functions.borrow();
+        let function = funcs.get(&builtin_name).unwrap_or_else(|| panic!("unable to find builtin function {}", builtin_name));
+
+        // TODO(antoyo): add platform-specific behavior here for architectures that have these
+        // intrinsics as instructions (for instance, gpus)
+        let mut vector_elements = vec![];
+        for i in 0..in_len {
+            let index = bx.context.new_rvalue_from_long(bx.ulong_type, i as i64);
+            // we have to treat fpowi specially, since fpowi's second argument is always an i32
+            let arguments = if name == sym::simd_fpowi {
+                vec![
+                    bx.extract_element(args[0].immediate(), index).to_rvalue(),
+                    args[1].immediate(),
+                ]
+            } else {
+                args.iter()
+                    .map(|arg| bx.extract_element(arg.immediate(), index).to_rvalue())
+                    .collect()
+            };
+            vector_elements.push(bx.context.new_call(None, *function, &arguments));
+        }
+        let c = bx.context.new_rvalue_from_vector(None, vec_ty, &vector_elements);
         Ok(c)
     }
 

From af28dec7d151de3e0e00928ce66d51d8aaa3fbdb Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 30 Sep 2022 17:53:06 -0400
Subject: [PATCH 167/997] Add CI tests with a sysroot compiled in release mode

---
 .github/workflows/release.yml | 112 ++++++++++++++++++++++++++++++++++
 test.sh                       |   2 +-
 2 files changed, 113 insertions(+), 1 deletion(-)
 create mode 100644 .github/workflows/release.yml

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
new file mode 100644
index 000000000000..25db3779a9cb
--- /dev/null
+++ b/.github/workflows/release.yml
@@ -0,0 +1,112 @@
+name: CI with sysroot compiled in release mode
+
+on:
+  - push
+  - pull_request
+
+permissions:
+  contents: read
+
+env:
+  # Enable backtraces for easier debugging
+  RUST_BACKTRACE: 1
+
+jobs:
+  build:
+    runs-on: ubuntu-latest
+
+    strategy:
+      fail-fast: false
+      matrix:
+        libgccjit_version:
+          - { gcc: "libgccjit.so", artifacts_branch: "master" }
+
+    steps:
+    - uses: actions/checkout@v2
+
+    - uses: actions/checkout@v2
+      with:
+        repository: llvm/llvm-project
+        path: llvm
+
+    - name: Install packages
+      run: sudo apt-get install ninja-build ripgrep
+
+    - name: Download artifact
+      uses: dawidd6/action-download-artifact@v2
+      with:
+          workflow: main.yml
+          name: ${{ matrix.libgccjit_version.gcc }}
+          path: gcc-build
+          repo: antoyo/gcc
+          branch: ${{ matrix.libgccjit_version.artifacts_branch }}
+          event: push
+          search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
+
+    - name: Setup path to libgccjit
+      run: |
+          echo $(readlink -f gcc-build) > gcc_path
+          # NOTE: the filename is still libgccjit.so even when the artifact name is different.
+          ln gcc-build/libgccjit.so gcc-build/libgccjit.so.0
+
+    - name: Set env
+      run: |
+        echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
+        echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
+        echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+
+    - name: Set RUST_COMPILER_RT_ROOT
+      run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
+
+    # https://github.com/actions/cache/issues/133
+    - name: Fixup owner of ~/.cargo/
+      # Don't remove the trailing /. It is necessary to follow the symlink.
+      run: sudo chown -R $(whoami):$(id -ng) ~/.cargo/
+
+    - name: Cache cargo installed crates
+      uses: actions/cache@v1.1.2
+      with:
+        path: ~/.cargo/bin
+        key: cargo-installed-crates2-ubuntu-latest
+
+    - name: Cache cargo registry
+      uses: actions/cache@v1
+      with:
+        path: ~/.cargo/registry
+        key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
+
+    - name: Cache cargo index
+      uses: actions/cache@v1
+      with:
+        path: ~/.cargo/git
+        key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
+
+    - name: Cache cargo target dir
+      uses: actions/cache@v1.1.2
+      with:
+        path: target
+        key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
+
+    - name: Build
+      run: |
+        ./prepare_build.sh
+        ./build.sh --release --release-sysroot
+        cargo test
+        ./clean_all.sh
+
+    - name: Prepare dependencies
+      run: |
+        git config --global user.email "user@example.com"
+        git config --global user.name "User"
+        ./prepare.sh
+
+    # Compile is a separate step, as the actions-rs/cargo action supports error annotations
+    - name: Compile
+      uses: actions-rs/cargo@v1.0.3
+      with:
+        command: build
+        args: --release
+
+    - name: Run tests
+      run: |
+        ./test.sh --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore
diff --git a/test.sh b/test.sh
index 2bdf362ab40d..4841922416c7 100755
--- a/test.sh
+++ b/test.sh
@@ -44,7 +44,7 @@ while [[ $# -gt 0 ]]; do
             shift
             ;;
         "--test-rustc")
-            funcs=(test_rustc)
+            funcs+=(test_rustc)
             shift
             ;;
         "--test-successful-rustc")

From 12105bc0d7664998f8caa45252cf8e8d1c2b38fc Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 30 Sep 2022 17:45:31 -0400
Subject: [PATCH 168/997] Fix pointer comparison

---
 src/int.rs | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/src/int.rs b/src/int.rs
index 0c5dab004668..0cf1204791d3 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -389,18 +389,22 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 };
             self.context.new_comparison(None, op, cmp, self.context.new_rvalue_from_int(self.int_type, limit))
         }
+        else if a_type.get_pointee().is_some() && b_type.get_pointee().is_some() {
+            // NOTE: gcc cannot compare pointers to different objects, but rustc does that, so cast them to usize.
+            lhs = self.context.new_bitcast(None, lhs, self.usize_type);
+            rhs = self.context.new_bitcast(None, rhs, self.usize_type);
+            self.context.new_comparison(None, op.to_gcc_comparison(), lhs, rhs)
+        }
         else {
-            let left_type = lhs.get_type();
-            let right_type = rhs.get_type();
-            if left_type != right_type {
+            if a_type != b_type {
                 // NOTE: because libgccjit cannot compare function pointers.
-                if left_type.dyncast_function_ptr_type().is_some() && right_type.dyncast_function_ptr_type().is_some() {
+                if a_type.dyncast_function_ptr_type().is_some() && b_type.dyncast_function_ptr_type().is_some() {
                     lhs = self.context.new_cast(None, lhs, self.usize_type.make_pointer());
                     rhs = self.context.new_cast(None, rhs, self.usize_type.make_pointer());
                 }
                 // NOTE: hack because we try to cast a vector type to the same vector type.
-                else if format!("{:?}", left_type) != format!("{:?}", right_type) {
-                    rhs = self.context.new_cast(None, rhs, left_type);
+                else if format!("{:?}", a_type) != format!("{:?}", b_type) {
+                    rhs = self.context.new_cast(None, rhs, a_type);
                 }
             }
             self.context.new_comparison(None, op.to_gcc_comparison(), lhs, rhs)

From ed570f6678dbb9994dee0fd42b1432d86dbcc1a2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 30 Sep 2022 17:45:42 -0400
Subject: [PATCH 169/997] Fix gep

---
 src/builder.rs | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 95080e024fc9..aa4c6f2f8372 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -858,16 +858,25 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn gep(&mut self, _typ: Type<'gcc>, ptr: RValue<'gcc>, indices: &[RValue<'gcc>]) -> RValue<'gcc> {
-        let mut result = ptr;
+        let ptr_type = ptr.get_type();
+        let mut pointee_type = ptr.get_type();
+        // NOTE: we cannot use array indexing here like in inbounds_gep because array indexing is
+        // always considered in bounds in GCC (TODO(antoyo): to be verified).
+        // So, we have to cast to a number.
+        let mut result = self.context.new_bitcast(None, ptr, self.sizet_type);
+        // FIXME(antoyo): if there were more than 1 index, this code is probably wrong and would
+        // require dereferencing the pointer.
         for index in indices {
-            result = self.context.new_array_access(None, result, *index).get_address(None).to_rvalue();
+            pointee_type = pointee_type.get_pointee().expect("pointee type");
+            let pointee_size = self.context.new_rvalue_from_int(index.get_type(), pointee_type.get_size() as i32);
+            result = result + self.gcc_int_cast(*index * pointee_size, self.sizet_type);
         }
-        result
+        self.context.new_bitcast(None, result, ptr_type)
     }
 
     fn inbounds_gep(&mut self, _typ: Type<'gcc>, ptr: RValue<'gcc>, indices: &[RValue<'gcc>]) -> RValue<'gcc> {
-        // FIXME(antoyo): would be safer if doing the same thing (loop) as gep.
-        // TODO(antoyo): specify inbounds somehow.
+        // NOTE: array indexing is always considered in bounds in GCC (TODO(antoyo): to be verified).
+        // TODO: replace with a loop like gep.
         match indices.len() {
             1 => {
                 self.context.new_array_access(None, ptr, indices[0]).get_address(None)

From 6b7e16f87e2ea143d7c64cf101684b781385c23a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 30 Sep 2022 17:45:53 -0400
Subject: [PATCH 170/997] Add more debugging options

---
 src/back/write.rs | 1 +
 src/base.rs       | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/src/back/write.rs b/src/back/write.rs
index efcf18d31eb0..5f54ac4ebc69 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -57,6 +57,7 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, _diag_han
                 if env::var("CG_GCCJIT_DUMP_TO_FILE").as_deref() == Ok("1") {
                     let _ = fs::create_dir("/tmp/gccjit_dumps");
                     let path = &format!("/tmp/gccjit_dumps/{}.c", module.name);
+                    context.set_debug_info(true);
                     context.dump_to_file(path, true);
                 }
                 context.compile_to_file(OutputKind::ObjectFile, obj_out.to_str().expect("path to str"));
diff --git a/src/base.rs b/src/base.rs
index 8cc9581e842c..b60382496c2a 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -126,6 +126,9 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
             context.add_command_line_option("-fdata-sections");
         }
 
+        if env::var("CG_GCCJIT_DUMP_TREE_ALL").as_deref() == Ok("1") {
+            context.add_command_line_option("-fdump-tree-all");
+        }
         if env::var("CG_GCCJIT_DUMP_CODE").as_deref() == Ok("1") {
             context.set_dump_code_on_compile(true);
         }

From 090cde9811ff6d14e3af334109214e58356f7457 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 30 Sep 2022 21:10:37 -0400
Subject: [PATCH 171/997] Disable libcore tests because some fail

---
 .github/workflows/release.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 25db3779a9cb..26b26e3f8410 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -109,4 +109,4 @@ jobs:
 
     - name: Run tests
       run: |
-        ./test.sh --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore
+        ./test.sh --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests # --test-libcore # FIXME(antoyo): libcore tests fail.

From 908304e2571e5f58937a98fd9a5adc37f660c62a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 1 Oct 2022 11:55:24 -0400
Subject: [PATCH 172/997] Rewrite inbounds_gep with a loop

---
 src/builder.rs | 16 ++++++----------
 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index aa4c6f2f8372..f0582fdcef2d 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -876,17 +876,13 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn inbounds_gep(&mut self, _typ: Type<'gcc>, ptr: RValue<'gcc>, indices: &[RValue<'gcc>]) -> RValue<'gcc> {
         // NOTE: array indexing is always considered in bounds in GCC (TODO(antoyo): to be verified).
-        // TODO: replace with a loop like gep.
-        match indices.len() {
-            1 => {
-                self.context.new_array_access(None, ptr, indices[0]).get_address(None)
-            },
-            2 => {
-                let array = ptr.dereference(None); // TODO(antoyo): assert that first index is 0?
-                self.context.new_array_access(None, array, indices[1]).get_address(None)
-            },
-            _ => unimplemented!(),
+        let mut indices = indices.into_iter();
+        let index = indices.next().expect("first index in inbounds_gep");
+        let mut result = self.context.new_array_access(None, ptr, *index);
+        for index in indices {
+            result = self.context.new_array_access(None, result, *index);
         }
+        result.get_address(None)
     }
 
     fn struct_gep(&mut self, value_type: Type<'gcc>, ptr: RValue<'gcc>, idx: u64) -> RValue<'gcc> {

From a0654b398b7947ee4e7e632e219f98faf1a6c215 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 1 Oct 2022 15:18:30 -0400
Subject: [PATCH 173/997] Implement llvm.prefetch

---
 src/intrinsic/llvm.rs | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 20f500e34e90..5d10119e85e4 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -236,6 +236,11 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 let arg2 = builder.context.new_cast(None, arg2, arg2_type);
                 args = vec![new_args[0], arg2].into();
             },
+            "__builtin_prefetch" => {
+                let mut new_args = args.to_vec();
+                new_args.pop();
+                args = new_args.into();
+            },
             _ => (),
         }
     }
@@ -393,6 +398,16 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
 
 #[cfg(feature="master")]
 pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
+    match name {
+        "llvm.prefetch" => {
+            let gcc_name = "__builtin_prefetch";
+            let func = cx.context.get_builtin_function(gcc_name);
+            cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
+            return func
+        },
+        _ => (),
+    }
+
     let gcc_name = match name {
         "llvm.x86.xgetbv" => "__builtin_ia32_xgetbv",
         // NOTE: this doc specifies the equivalent GCC builtins: http://huonw.github.io/llvmint/llvmint/x86/index.html

From a28618d2efbbc903c66689e12d47f6f341c6c0f8 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 1 Oct 2022 19:53:14 -0400
Subject: [PATCH 174/997] Fix warnings

---
 example/alloc_example.rs         | 8 ++------
 example/mini_core_hello_world.rs | 1 +
 example/mod_bench.rs             | 6 ++----
 example/std_example.rs           | 1 +
 4 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/example/alloc_example.rs b/example/alloc_example.rs
index 74ea7ec4ede6..c327b93f1bbd 100644
--- a/example/alloc_example.rs
+++ b/example/alloc_example.rs
@@ -18,16 +18,12 @@ extern "C" {
 
 #[panic_handler]
 fn panic_handler(_: &core::panic::PanicInfo) -> ! {
-    unsafe {
-        core::intrinsics::abort();
-    }
+    core::intrinsics::abort();
 }
 
 #[alloc_error_handler]
 fn alloc_error_handler(_: alloc::alloc::Layout) -> ! {
-    unsafe {
-        core::intrinsics::abort();
-    }
+    core::intrinsics::abort();
 }
 
 #[start]
diff --git a/example/mini_core_hello_world.rs b/example/mini_core_hello_world.rs
index 14fd9eeffa6a..7b10425e800f 100644
--- a/example/mini_core_hello_world.rs
+++ b/example/mini_core_hello_world.rs
@@ -228,6 +228,7 @@ fn main() {
     } as Box<dyn SomeTrait>;
 
     const FUNC_REF: Option<fn()> = Some(main);
+    #[allow(unreachable_code)]
     match FUNC_REF {
         Some(_) => {},
         None => assert!(false),
diff --git a/example/mod_bench.rs b/example/mod_bench.rs
index 2e2b0052dee8..95bcad2cd173 100644
--- a/example/mod_bench.rs
+++ b/example/mod_bench.rs
@@ -6,9 +6,7 @@ extern {}
 
 #[panic_handler]
 fn panic_handler(_: &core::panic::PanicInfo) -> ! {
-    unsafe {
-        core::intrinsics::abort();
-    }
+    core::intrinsics::abort();
 }
 
 #[lang="eh_personality"]
@@ -32,6 +30,6 @@ fn main(_argc: isize, _argv: *const *const u8) -> isize {
 #[inline(never)]
 fn black_box(i: u32) {
     if i != 1 {
-        unsafe { core::intrinsics::abort(); }
+        core::intrinsics::abort();
     }
 }
diff --git a/example/std_example.rs b/example/std_example.rs
index 31069058aea3..5c171c49fd19 100644
--- a/example/std_example.rs
+++ b/example/std_example.rs
@@ -1,5 +1,6 @@
 #![feature(core_intrinsics, generators, generator_trait, is_sorted)]
 
+#[cfg(feature="master")]
 use std::arch::x86_64::*;
 use std::io::Write;
 use std::ops::Generator;

From 436710fa9bf5ea9a601705c2bd276e18751f2c24 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Sun, 2 Oct 2022 18:29:51 -0500
Subject: [PATCH 175/997] simd: enable simd_as intrinsic

The method context.convert_vector, added to libgccjit for simd_cast,
appears to give the correct behavior for simd_as.  Instead of
special-casing simd_as, re-use simd_cast's impl for simd_as.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 failing-ui-tests.txt   | 1 -
 failing-ui-tests12.txt | 1 +
 src/intrinsic/simd.rs  | 2 +-
 3 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 8b740cff4f58..6acd38084457 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -31,7 +31,6 @@ src/test/ui/sepcomp/sepcomp-fns-backwards.rs
 src/test/ui/sepcomp/sepcomp-fns.rs
 src/test/ui/sepcomp/sepcomp-statics.rs
 src/test/ui/simd/intrinsic/generic-arithmetic-pass.rs
-src/test/ui/simd/intrinsic/generic-as.rs
 src/test/ui/simd/intrinsic/generic-bitmask-pass.rs
 src/test/ui/simd/intrinsic/generic-gather-pass.rs
 src/test/ui/simd/intrinsic/generic-select-pass.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 7826875f04ed..027c929d2f3d 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -10,6 +10,7 @@ src/test/ui/packed/packed-tuple-struct-layout.rs
 src/test/ui/simd/array-type.rs
 src/test/ui/simd/intrinsic/float-minmax-pass.rs
 src/test/ui/simd/intrinsic/generic-arithmetic-saturating-pass.rs
+src/test/ui/simd/intrinsic/generic-as.rs
 src/test/ui/simd/intrinsic/generic-cast-pass.rs
 src/test/ui/simd/intrinsic/generic-cast-pointer-width.rs
 src/test/ui/simd/intrinsic/generic-comparison-pass.rs
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 6d6009972832..00c541a8af75 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -254,7 +254,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
     }
 
     #[cfg(feature="master")]
-    if name == sym::simd_cast {
+    if name == sym::simd_cast || name == sym::simd_as {
         require_simd!(ret_ty, "return");
         let (out_len, out_elem) = ret_ty.simd_size_and_type(bx.tcx());
         require!(

From 23a1a868350fb8cea1db26b68035e07144d041b0 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 8 Oct 2022 14:37:19 -0400
Subject: [PATCH 176/997] More debug options

---
 src/base.rs | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/base.rs b/src/base.rs
index b60382496c2a..6e1ad9f53151 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -126,6 +126,9 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
             context.add_command_line_option("-fdata-sections");
         }
 
+        if env::var("CG_GCCJIT_DUMP_RTL").as_deref() == Ok("1") {
+            context.add_command_line_option("-fdump-rtl-vregs");
+        }
         if env::var("CG_GCCJIT_DUMP_TREE_ALL").as_deref() == Ok("1") {
             context.add_command_line_option("-fdump-tree-all");
         }

From c5736218121542d6fedfe027c6438b8b80cf5a6f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 8 Oct 2022 14:37:36 -0400
Subject: [PATCH 177/997] Fix some vfmaddsub intrinsics

---
 src/builder.rs        |  6 +++++-
 src/context.rs        |  3 +++
 src/intrinsic/llvm.rs | 24 ++++++++++++++++++------
 3 files changed, 26 insertions(+), 7 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index f0582fdcef2d..f3933a2d7061 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -280,7 +280,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let func_name = format!("{:?}", func_ptr);
         let previous_arg_count = args.len();
         let orig_args = args;
-        let args = llvm::adjust_intrinsic_arguments(&self, gcc_func, args.into(), &func_name);
+        let args = {
+            let function_address_names = self.function_address_names.borrow();
+            let original_function_name = function_address_names.get(&func_ptr);
+            llvm::adjust_intrinsic_arguments(&self, gcc_func, args.into(), &func_name, original_function_name)
+        };
         let args_adjusted = args.len() != previous_arg_count;
         let args = self.check_ptr_call("call", func_ptr, &*args);
 
diff --git a/src/context.rs b/src/context.rs
index 2699559dc2ad..5f34ddd92bac 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -33,6 +33,7 @@ pub struct CodegenCx<'gcc, 'tcx> {
     // TODO(bjorn3): Can this field be removed?
     pub current_func: RefCell<Option<Function<'gcc>>>,
     pub normal_function_addresses: RefCell<FxHashSet<RValue<'gcc>>>,
+    pub function_address_names: RefCell<FxHashMap<RValue<'gcc>, String>>,
 
     pub functions: RefCell<FxHashMap<String, Function<'gcc>>>,
     pub intrinsics: RefCell<FxHashMap<String, Function<'gcc>>>,
@@ -192,6 +193,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             context,
             current_func: RefCell::new(None),
             normal_function_addresses: Default::default(),
+            function_address_names: Default::default(),
             functions: RefCell::new(functions),
             intrinsics: RefCell::new(FxHashMap::default()),
 
@@ -345,6 +347,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         // FIXME(antoyo): the rustc API seems to call get_fn_addr() when not needed (e.g. for FFI).
 
         self.normal_function_addresses.borrow_mut().insert(ptr);
+        self.function_address_names.borrow_mut().insert(ptr, func_name.to_string());
 
         ptr
     }
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 5d10119e85e4..3de018abf2eb 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -5,7 +5,7 @@ use rustc_codegen_ssa::traits::BuilderMethods;
 
 use crate::{context::CodegenCx, builder::Builder};
 
-pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc, 'tcx>, gcc_func: FunctionPtrType<'gcc>, mut args: Cow<'b, [RValue<'gcc>]>, func_name: &str) -> Cow<'b, [RValue<'gcc>]> {
+pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc, 'tcx>, gcc_func: FunctionPtrType<'gcc>, mut args: Cow<'b, [RValue<'gcc>]>, func_name: &str, original_function_name: Option<&String>) -> Cow<'b, [RValue<'gcc>]> {
     // Some LLVM intrinsics do not map 1-to-1 to GCC intrinsics, so we add the missing
     // arguments here.
     if gcc_func.get_param_count() != args.len() {
@@ -277,11 +277,23 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 let c = builder.context.new_rvalue_from_vector(None, arg3_type, &[new_args[2]; 2]);
                 args = vec![a, b, c, new_args[3]].into();
             },
-            "__builtin_ia32_vfmaddsubpd256" | "__builtin_ia32_vfmaddsubps" | "__builtin_ia32_vfmaddsubps256" => {
-                let mut new_args = args.to_vec();
-                let arg3 = &mut new_args[2];
-                *arg3 = builder.context.new_unary_op(None, UnaryOp::Minus, arg3.get_type(), *arg3);
-                args = new_args.into();
+            "__builtin_ia32_vfmaddsubpd256" | "__builtin_ia32_vfmaddsubps" | "__builtin_ia32_vfmaddsubps256"
+                | "__builtin_ia32_vfmaddsubpd" => {
+                if let Some(original_function_name) = original_function_name {
+                    match &**original_function_name {
+                        "llvm.x86.fma.vfmsubadd.pd.256" | "llvm.x86.fma.vfmsubadd.ps" | "llvm.x86.fma.vfmsubadd.ps.256"
+                            | "llvm.x86.fma.vfmsubadd.pd" => {
+                            // NOTE: since both llvm.x86.fma.vfmsubadd.ps and llvm.x86.fma.vfmaddsub.ps maps to
+                            // __builtin_ia32_vfmaddsubps, only add minus if this comes from a
+                            // subadd LLVM intrinsic, e.g. _mm256_fmsubadd_pd.
+                            let mut new_args = args.to_vec();
+                            let arg3 = &mut new_args[2];
+                            *arg3 = builder.context.new_unary_op(None, UnaryOp::Minus, arg3.get_type(), *arg3);
+                            args = new_args.into();
+                        },
+                        _ => (),
+                    }
+                }
             },
             "__builtin_ia32_ldmxcsr" => {
                 // The builtin __builtin_ia32_ldmxcsr takes an integer value while llvm.x86.sse.ldmxcsr takes a pointer,

From 74dac5d970fa3f5c070d7d656622068cadfb0feb Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 8 Oct 2022 15:05:23 -0400
Subject: [PATCH 178/997] Fix vfmadd

---
 src/intrinsic/llvm.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 3de018abf2eb..621ef328a8cf 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -595,6 +595,8 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.fshr.v32i16" => "__builtin_ia32_vpshrdv_v32hi",
         "llvm.fshr.v16i16" => "__builtin_ia32_vpshrdv_v16hi",
         "llvm.fshr.v8i16" => "__builtin_ia32_vpshrdv_v8hi",
+        "llvm.x86.fma.vfmadd.sd" => "__builtin_ia32_vfmaddsd3",
+        "llvm.x86.fma.vfmadd.ss" => "__builtin_ia32_vfmaddss3",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",

From 1fa8b264267abebce9ae991ac1f982d9c43b1721 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 9 Oct 2022 11:25:40 -0400
Subject: [PATCH 179/997] Fix vector_select

---
 src/builder.rs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index f3933a2d7061..ee9983830ff8 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1613,9 +1613,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let masks = self.bitcast_if_needed(masks, then_val.get_type());
         let then_vals = masks & then_val;
 
-        let ones = vec![self.context.new_rvalue_one(element_type); num_units];
-        let ones = self.context.new_rvalue_from_vector(None, cond_type, &ones);
-        let inverted_masks = masks + ones;
+        let minus_ones = vec![self.context.new_rvalue_from_int(element_type, -1); num_units];
+        let minus_ones = self.context.new_rvalue_from_vector(None, cond_type, &minus_ones);
+        let inverted_masks = masks ^ minus_ones;
         // NOTE: sometimes, the type of else_val can be different than the type of then_val in
         // libgccjit (vector of int vs vector of int32_t), but they should be the same for the AND
         // operation to work.

From f73dea7e55dcd14f36963f37a24dc9764c584252 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 9 Oct 2022 11:25:49 -0400
Subject: [PATCH 180/997] Fix simd_bitmask

---
 failing-ui-tests.txt   |  1 -
 failing-ui-tests12.txt |  1 +
 src/intrinsic/simd.rs  | 35 +++++++++++++++++++----------------
 3 files changed, 20 insertions(+), 17 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 6acd38084457..8a780e881478 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -38,7 +38,6 @@ src/test/ui/simd/issue-17170.rs
 src/test/ui/simd/issue-39720.rs
 src/test/ui/simd/issue-85915-simd-ptrs.rs
 src/test/ui/simd/issue-89193.rs
-src/test/ui/simd/simd-bitmask.rs
 src/test/ui/simd/type-generic-monomorphisation-extern-nonnull-ptr.rs
 src/test/ui/sse2.rs
 src/test/ui/statics/issue-91050-1.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 027c929d2f3d..00cd42d8e9dc 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -20,3 +20,4 @@ src/test/ui/simd/intrinsic/inlining-issue67557-ice.rs
 src/test/ui/simd/intrinsic/inlining-issue67557.rs
 src/test/ui/simd/monomorphize-shuffle-index.rs
 src/test/ui/simd/shuffle.rs
+src/test/ui/simd/simd-bitmask.rs
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 00c541a8af75..7d7890098265 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -337,28 +337,31 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let vector = args[0].immediate();
         let vector_type = vector.get_type().dyncast_vector().expect("vector type");
         let elem_type = vector_type.get_element_type();
-        let mut shifts = vec![];
-        let mut masks = vec![];
-        let mut mask = 1;
-        for i in 0..in_len {
-            shifts.push(bx.context.new_rvalue_from_int(elem_type, i as i32));
-            masks.push(bx.context.new_rvalue_from_int(elem_type, mask));
-            mask <<= 1;
-        }
-        masks.reverse();
-        let shifts = bx.context.new_rvalue_from_vector(None, vector.get_type(), &shifts);
-        let shifted = vector >> shifts;
-        let masks = bx.context.new_rvalue_from_vector(None, vector.get_type(), &masks);
-        let masked = shifted & masks;
-        let reduced = bx.vector_reduce_op(masked, BinaryOp::BitwiseOr);
 
         let expected_int_bits = in_len.max(8);
         let expected_bytes = expected_int_bits / 8 + ((expected_int_bits % 8 > 0) as u64);
 
+        // FIXME(antoyo): that's not going to work for masks bigger than 128 bits.
+        let result_type = bx.type_ix(expected_int_bits);
+        let mut result = bx.context.new_rvalue_zero(result_type);
+
+        let elem_size = elem_type.get_size() * 8;
+        let sign_shift = bx.context.new_rvalue_from_int(elem_type, elem_size as i32);
+        let one = bx.context.new_rvalue_one(elem_type);
+
+        let mut shift = 0;
+        for i in 0..in_len {
+            let elem = bx.extract_element(vector, bx.context.new_rvalue_from_int(bx.int_type, i as i32));
+            let shifted = elem >> sign_shift;
+            let masked = shifted & one;
+            result = result | (bx.context.new_cast(None, masked, result_type) << bx.context.new_rvalue_from_int(result_type, shift));
+            shift += 1;
+        }
+
         match ret_ty.kind() {
             ty::Uint(i) if i.bit_width() == Some(expected_int_bits) => {
                 // Zero-extend iN to the bitmask type:
-                return Ok(bx.zext(reduced, bx.type_ix(expected_int_bits)));
+                return Ok(result);
             }
             ty::Array(elem, len)
                 if matches!(elem.kind(), ty::Uint(ty::UintTy::U8))
@@ -366,7 +369,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                         == Some(expected_bytes) =>
             {
                 // Zero-extend iN to the array length:
-                let ze = bx.zext(reduced, bx.type_ix(expected_bytes * 8));
+                let ze = bx.zext(result, bx.type_ix(expected_bytes * 8));
 
                 // Convert the integer to a byte array
                 let ptr = bx.alloca(bx.type_ix(expected_bytes * 8), Align::ONE);

From e5ce7a9846ee9479549d153101351f917f858f02 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 9 Oct 2022 14:05:44 -0400
Subject: [PATCH 181/997] Fix simd_select_bitmask

---
 src/builder.rs        | 8 +++++---
 src/intrinsic/simd.rs | 9 +++++++--
 2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index ee9983830ff8..adcd6235b709 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1597,7 +1597,6 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         unimplemented!();
     }
 
-
     pub fn vector_select(&mut self, cond: RValue<'gcc>, then_val: RValue<'gcc>, else_val: RValue<'gcc>) -> RValue<'gcc> {
         // cond is a vector of integers, not of bools.
         let cond_type = cond.get_type();
@@ -1607,10 +1606,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let zeros = vec![self.context.new_rvalue_zero(element_type); num_units];
         let zeros = self.context.new_rvalue_from_vector(None, cond_type, &zeros);
 
+        let result_type = then_val.get_type();
+
         let masks = self.context.new_comparison(None, ComparisonOp::NotEquals, cond, zeros);
         // NOTE: masks is a vector of integers, but the values can be vectors of floats, so use bitcast to make
         // the & operation work.
-        let masks = self.bitcast_if_needed(masks, then_val.get_type());
+        let then_val = self.bitcast_if_needed(then_val, masks.get_type());
         let then_vals = masks & then_val;
 
         let minus_ones = vec![self.context.new_rvalue_from_int(element_type, -1); num_units];
@@ -1623,7 +1624,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let else_val = self.context.new_bitcast(None, else_val, then_val.get_type());
         let else_vals = inverted_masks & else_val;
 
-        then_vals | else_vals
+        let res = then_vals | else_vals;
+        self.bitcast_if_needed(res, result_type)
     }
 }
 
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 7d7890098265..fbfcebe46a13 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -93,14 +93,19 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let arg1_vector_type = arg1_type.unqualified().dyncast_vector().expect("vector type");
         let arg1_element_type = arg1_vector_type.get_element_type();
 
+        // NOTE: since the arguments can be vectors of floats, make sure the mask is a vector of
+        // integer.
+        let mask_element_type = bx.type_ix(arg1_element_type.get_size() as u64 * 8);
+        let vector_mask_type = bx.context.new_vector_type(mask_element_type, arg1_vector_type.get_num_units() as u64);
+
         let mut elements = vec![];
         let one = bx.context.new_rvalue_one(mask.get_type());
         for _ in 0..len {
-            let element = bx.context.new_cast(None, mask & one, arg1_element_type);
+            let element = bx.context.new_cast(None, mask & one, mask_element_type);
             elements.push(element);
             mask = mask >> one;
         }
-        let vector_mask = bx.context.new_rvalue_from_vector(None, arg1_type, &elements);
+        let vector_mask = bx.context.new_rvalue_from_vector(None, vector_mask_type, &elements);
 
         return Ok(bx.vector_select(vector_mask, arg1, args[2].immediate()));
     }

From 173db39f916a1ae33b15543cd42a88113cf3114f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 9 Oct 2022 14:15:45 -0400
Subject: [PATCH 182/997] Fix simd_select

---
 failing-ui-tests.txt   |  1 -
 failing-ui-tests12.txt |  1 +
 src/builder.rs         | 25 +++++++++++++++++++++++--
 3 files changed, 24 insertions(+), 3 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 8a780e881478..5b3166113e77 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -33,7 +33,6 @@ src/test/ui/sepcomp/sepcomp-statics.rs
 src/test/ui/simd/intrinsic/generic-arithmetic-pass.rs
 src/test/ui/simd/intrinsic/generic-bitmask-pass.rs
 src/test/ui/simd/intrinsic/generic-gather-pass.rs
-src/test/ui/simd/intrinsic/generic-select-pass.rs
 src/test/ui/simd/issue-17170.rs
 src/test/ui/simd/issue-39720.rs
 src/test/ui/simd/issue-85915-simd-ptrs.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 00cd42d8e9dc..32feb2c886b2 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -16,6 +16,7 @@ src/test/ui/simd/intrinsic/generic-cast-pointer-width.rs
 src/test/ui/simd/intrinsic/generic-comparison-pass.rs
 src/test/ui/simd/intrinsic/generic-elements-pass.rs
 src/test/ui/simd/intrinsic/generic-reduction-pass.rs
+src/test/ui/simd/intrinsic/generic-select-pass.rs
 src/test/ui/simd/intrinsic/inlining-issue67557-ice.rs
 src/test/ui/simd/intrinsic/inlining-issue67557.rs
 src/test/ui/simd/monomorphize-shuffle-index.rs
diff --git a/src/builder.rs b/src/builder.rs
index adcd6235b709..b7342f507168 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1599,10 +1599,31 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
     pub fn vector_select(&mut self, cond: RValue<'gcc>, then_val: RValue<'gcc>, else_val: RValue<'gcc>) -> RValue<'gcc> {
         // cond is a vector of integers, not of bools.
-        let cond_type = cond.get_type();
-        let vector_type = cond_type.unqualified().dyncast_vector().expect("vector type");
+        let vector_type = cond.get_type().unqualified().dyncast_vector().expect("vector type");
         let num_units = vector_type.get_num_units();
         let element_type = vector_type.get_element_type();
+
+        #[cfg(feature="master")]
+        let (cond, element_type) = {
+            let then_val_vector_type = then_val.get_type().dyncast_vector().expect("vector type");
+            let then_val_element_type = then_val_vector_type.get_element_type();
+            let then_val_element_size = then_val_element_type.get_size();
+
+            // NOTE: the mask needs to be of the same size as the other arguments in order for the &
+            // operation to work.
+            if then_val_element_size != element_type.get_size() {
+                let new_element_type = self.type_ix(then_val_element_size as u64 * 8);
+                let new_vector_type = self.context.new_vector_type(new_element_type, num_units as u64);
+                let cond = self.context.convert_vector(None, cond, new_vector_type);
+                (cond, new_element_type)
+            }
+            else {
+                (cond, element_type)
+            }
+        };
+
+        let cond_type = cond.get_type();
+
         let zeros = vec![self.context.new_rvalue_zero(element_type); num_units];
         let zeros = self.context.new_rvalue_from_vector(None, cond_type, &zeros);
 

From 12bfb01b91d94d51a92b49049cb8edc28f2818fd Mon Sep 17 00:00:00 2001
From: Paul Cacheux <paul.cacheux@datadoghq.com>
Date: Sat, 15 Oct 2022 14:39:43 +0200
Subject: [PATCH 183/997] bump actions for node16

---
 .github/workflows/ci.yml      | 16 ++++++++--------
 .github/workflows/release.yml | 12 ++++++------
 2 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 412344cfa3da..147b00ff72f7 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -35,9 +35,9 @@ jobs:
         ]
 
     steps:
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
 
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
       with:
         repository: llvm/llvm-project
         path: llvm
@@ -77,25 +77,25 @@ jobs:
       run: sudo chown -R $(whoami):$(id -ng) ~/.cargo/
 
     - name: Cache cargo installed crates
-      uses: actions/cache@v1.1.2
+      uses: actions/cache@v3
       with:
         path: ~/.cargo/bin
         key: cargo-installed-crates2-ubuntu-latest
 
     - name: Cache cargo registry
-      uses: actions/cache@v1
+      uses: actions/cache@v3
       with:
         path: ~/.cargo/registry
         key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
 
     - name: Cache cargo index
-      uses: actions/cache@v1
+      uses: actions/cache@v3
       with:
         path: ~/.cargo/git
         key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
 
     - name: Cache cargo target dir
-      uses: actions/cache@v1.1.2
+      uses: actions/cache@v3
       with:
         path: target
         key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
@@ -103,7 +103,7 @@ jobs:
     - name: Cache rust repository
       # We only clone the rust repository for rustc tests
       if: ${{ contains(matrix.commands, 'rustc') }}
-      uses: actions/cache@v2
+      uses: actions/cache@v3
       id: cache-rust-repository
       with:
         path: rust
@@ -140,5 +140,5 @@ jobs:
   duplicates:
     runs-on: ubuntu-latest
     steps:
-      - uses: actions/checkout@v2
+      - uses: actions/checkout@v3
       - run: python tools/check_intrinsics_duplicates.py
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 26b26e3f8410..0d9b93b53224 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -22,9 +22,9 @@ jobs:
           - { gcc: "libgccjit.so", artifacts_branch: "master" }
 
     steps:
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
 
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
       with:
         repository: llvm/llvm-project
         path: llvm
@@ -64,25 +64,25 @@ jobs:
       run: sudo chown -R $(whoami):$(id -ng) ~/.cargo/
 
     - name: Cache cargo installed crates
-      uses: actions/cache@v1.1.2
+      uses: actions/cache@v3
       with:
         path: ~/.cargo/bin
         key: cargo-installed-crates2-ubuntu-latest
 
     - name: Cache cargo registry
-      uses: actions/cache@v1
+      uses: actions/cache@v3
       with:
         path: ~/.cargo/registry
         key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
 
     - name: Cache cargo index
-      uses: actions/cache@v1
+      uses: actions/cache@v3
       with:
         path: ~/.cargo/git
         key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
 
     - name: Cache cargo target dir
-      uses: actions/cache@v1.1.2
+      uses: actions/cache@v3
       with:
         path: target
         key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}

From cd01e8db68ece972255b8ca283672de8510e5570 Mon Sep 17 00:00:00 2001
From: Paul Cacheux <paul.cacheux@datadoghq.com>
Date: Sat, 15 Oct 2022 14:40:01 +0200
Subject: [PATCH 184/997] remove cargo cache fixups

---
 .github/workflows/ci.yml      | 5 -----
 .github/workflows/release.yml | 5 -----
 2 files changed, 10 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 147b00ff72f7..a75a770550ce 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -71,11 +71,6 @@ jobs:
     - name: Set RUST_COMPILER_RT_ROOT
       run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
 
-    # https://github.com/actions/cache/issues/133
-    - name: Fixup owner of ~/.cargo/
-      # Don't remove the trailing /. It is necessary to follow the symlink.
-      run: sudo chown -R $(whoami):$(id -ng) ~/.cargo/
-
     - name: Cache cargo installed crates
       uses: actions/cache@v3
       with:
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 0d9b93b53224..dd24db5e7073 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -58,11 +58,6 @@ jobs:
     - name: Set RUST_COMPILER_RT_ROOT
       run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
 
-    # https://github.com/actions/cache/issues/133
-    - name: Fixup owner of ~/.cargo/
-      # Don't remove the trailing /. It is necessary to follow the symlink.
-      run: sudo chown -R $(whoami):$(id -ng) ~/.cargo/
-
     - name: Cache cargo installed crates
       uses: actions/cache@v3
       with:

From 94d58b1bd3c95cb465ed126990e3117f1c94b439 Mon Sep 17 00:00:00 2001
From: Paul Cacheux <paul.cacheux@datadoghq.com>
Date: Sat, 15 Oct 2022 15:24:06 +0200
Subject: [PATCH 185/997] remove not applicable rustc patch

---
 rustc_patches/.gitkeep           |  0
 rustc_patches/compile_test.patch | 14 --------------
 test.sh                          |  2 --
 3 files changed, 16 deletions(-)
 create mode 100644 rustc_patches/.gitkeep
 delete mode 100644 rustc_patches/compile_test.patch

diff --git a/rustc_patches/.gitkeep b/rustc_patches/.gitkeep
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/rustc_patches/compile_test.patch b/rustc_patches/compile_test.patch
deleted file mode 100644
index 59143eac37b3..000000000000
--- a/rustc_patches/compile_test.patch
+++ /dev/null
@@ -1,14 +0,0 @@
-diff --git a/src/tools/compiletest/src/header.rs b/src/tools/compiletest/src/header.rs
-index 887d27fd6dca4..2c2239f2b83d1 100644
---- a/src/tools/compiletest/src/header.rs
-+++ b/src/tools/compiletest/src/header.rs
-@@ -806,8 +806,8 @@ pub fn make_test_description<R: Read>(
-     cfg: Option<&str>,
- ) -> test::TestDesc {
-     let mut ignore = false;
-     #[cfg(not(bootstrap))]
--    let ignore_message: Option<String> = None;
-+    let ignore_message: Option<&str> = None;
-     let mut should_fail = false;
-
-     let rustc_has_profiler_support = env::var_os("RUSTC_PROFILER_SUPPORT").is_some();
diff --git a/test.sh b/test.sh
index 4841922416c7..612ded3e8720 100755
--- a/test.sh
+++ b/test.sh
@@ -296,8 +296,6 @@ function test_rustc() {
     git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(')
     export RUSTFLAGS=
 
-    git apply ../rustc_patches/compile_test.patch || true
-
     rm config.toml || true
 
     cat > config.toml <<EOF

From db489d06cff6371e9e244d0bf414819b4c5b1592 Mon Sep 17 00:00:00 2001
From: Paul Cacheux <paul.cacheux@datadoghq.com>
Date: Mon, 17 Oct 2022 09:42:33 +0200
Subject: [PATCH 186/997] remove empty directory

---
 rustc_patches/.gitkeep | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 delete mode 100644 rustc_patches/.gitkeep

diff --git a/rustc_patches/.gitkeep b/rustc_patches/.gitkeep
deleted file mode 100644
index e69de29bb2d1..000000000000

From 25d482856e3042b862d6741cfdac56f244fac04a Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 17 Oct 2022 23:47:18 +0200
Subject: [PATCH 187/997] Improve installation documentation

---
 Readme.md | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/Readme.md b/Readme.md
index cdd7f55dcdec..274538a0e638 100644
--- a/Readme.md
+++ b/Readme.md
@@ -18,6 +18,21 @@ The patches in [this repository](https://github.com/antoyo/libgccjit-patches) ne
 (Those patches should work when applied on master, but in case it doesn't work, they are known to work when applied on 079c23cfe079f203d5df83fea8e92a60c7d7e878.)
 You can also use my [fork of gcc](https://github.com/antoyo/gcc) which already includes these patches.**
 
+To build it (most of these instructions come from [here](https://gcc.gnu.org/onlinedocs/jit/internals/index.html), so don't hesitate to take a look there if you encounter an issue):
+
+```bash
+$ cd gcc
+$ ./contrib/download_prerequisites
+$ sudo apt install flex libmpfr-dev libgmp-dev libmpc3 libmpc-dev
+$ ./configure \
+   --enable-host-shared \
+   --enable-languages=jit \
+   --disable-bootstrap \
+   --enable-checking=release \
+   --prefix=$(pwd)/install \
+   --disable-multilib
+```
+
 **Put the path to your custom build of libgccjit in the file `gcc_path`.**
 
 ```bash

From b3198c72dbaa42fc1e238141ea68fcdf11041805 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 13 Oct 2022 21:43:07 +0200
Subject: [PATCH 188/997] Add missing register class conversion for inline asm

---
 src/asm.rs | 75 ++++++++++++++++++++++++++++++++----------------------
 1 file changed, 45 insertions(+), 30 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 9d9b6a23d074..3e1b54dcf3bd 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -564,39 +564,52 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
                 _ => unimplemented!(),
             }
         },
+        // They can be retrieved from https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html
         InlineAsmRegOrRegClass::RegClass(reg) => match reg {
-            InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => unimplemented!(),
-            InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => unimplemented!(),
-            InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg) => unimplemented!(),
-            InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => unimplemented!(),
-            InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => unimplemented!(),
+            InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => "r",
+            InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg) => "w",
+            InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => "x",
+            InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
+                unreachable!("clobber-only")
+            }
+            InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => "r",
             InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
             | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low16)
-            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low8) => unimplemented!(),
-            InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16)
+            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low8)
+            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16)
             | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low8)
-            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4) => unimplemented!(),
-            InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
-            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg) => unimplemented!(),
-            InlineAsmRegClass::Avr(_) => unimplemented!(),
-            InlineAsmRegClass::Bpf(_) => unimplemented!(),
-            InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => unimplemented!(),
-            InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => unimplemented!(),
-            InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => unimplemented!(),
-            InlineAsmRegClass::Msp430(_) => unimplemented!(),
-            InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => unimplemented!(),
-            InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => unimplemented!(),
-            InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => unimplemented!(),
-            InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg) => unimplemented!(),
-            InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => unimplemented!(),
-            InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => unimplemented!(),
+            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4)
+            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
+            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg) => "t",
+            InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg) => "r",
+            InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_upper) => "d",
+            InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair) => "r",
+            InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw) => "w",
+            InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => "e",
+            InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r",
+            InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w",
+            InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => "r",
+            InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => "d", // more specific than "r"
+            InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => "f",
+            InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r",
+            // https://github.com/gcc-mirror/gcc/blob/master/gcc/config/nvptx/nvptx.md -> look for
+            // "define_constraint".
+            InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => "h",
+            InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => "r",
+            InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => "l",
+
+            InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg) => "r",
+            InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => "b",
+            InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => "f",
             InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
             | InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
                 unreachable!("clobber-only")
             },
-            InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => unimplemented!(),
-            InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => unimplemented!(),
-            InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => unimplemented!(),
+            InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => "r",
+            InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => "f",
+            InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
+                unreachable!("clobber-only")
+            }
             InlineAsmRegClass::X86(X86InlineAsmRegClass::reg) => "r",
             InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => "Q",
             InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_byte) => "q",
@@ -604,16 +617,18 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
             | InlineAsmRegClass::X86(X86InlineAsmRegClass::ymm_reg) => "x",
             InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => "v",
             InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => "Yk",
-            InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg0) => unimplemented!(),
-            InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => unimplemented!(),
             InlineAsmRegClass::X86(
-                X86InlineAsmRegClass::x87_reg | X86InlineAsmRegClass::mmx_reg | X86InlineAsmRegClass::tmm_reg,
+                X86InlineAsmRegClass::kreg0
+                | X86InlineAsmRegClass::x87_reg
+                | X86InlineAsmRegClass::mmx_reg
+                | X86InlineAsmRegClass::tmm_reg,
             ) => unreachable!("clobber-only"),
             InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
                 bug!("GCC backend does not support SPIR-V")
             }
-            InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => unimplemented!(),
-            InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => unimplemented!(),
+            InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
+            InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
+            InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
             InlineAsmRegClass::Err => unreachable!(),
         }
     };

From ccfe7d889814cce1b24ad34097e0161b3436d30f Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 14 Oct 2022 16:38:09 +0200
Subject: [PATCH 189/997] Add asm test suite

---
 test.sh | 64 ++++++++++++++++++++++++++++++++++++---------------------
 1 file changed, 41 insertions(+), 23 deletions(-)

diff --git a/test.sh b/test.sh
index 612ded3e8720..737d87a90694 100755
--- a/test.sh
+++ b/test.sh
@@ -75,6 +75,11 @@ while [[ $# -gt 0 ]]; do
             shift
             ;;
 
+        "--asm-tests")
+            funcs+=(asm_tests)
+            shift
+            ;;
+
         "--extended-tests")
             funcs+=(extended_sysroot_tests)
             shift
@@ -197,6 +202,40 @@ function std_tests() {
     $RUSTC example/mod_bench.rs --crate-type bin --target $TARGET_TRIPLE
 }
 
+function setup_rustc() {
+    rust_toolchain=$(cat rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
+
+    git clone https://github.com/rust-lang/rust.git || true
+    cd rust
+    git fetch
+    git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(')
+    export RUSTFLAGS=
+
+    rm config.toml || true
+
+    cat > config.toml <<EOF
+[rust]
+codegen-backends = []
+deny-warnings = false
+
+[build]
+cargo = "$(which cargo)"
+local-rebuild = true
+rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
+EOF
+
+    rustc -V | cut -d' ' -f3 | tr -d '('
+    git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(') src/test
+}
+
+function asm_tests() {
+    setup_rustc
+
+    echo "[TEST] rustc test suite"
+    RUSTC_ARGS="-Zpanic-abort-tests -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot -Cpanic=abort"
+    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 src/test/assembly/asm --rustc-args "$RUSTC_ARGS"
+}
+
 # FIXME(antoyo): linker gives multiple definitions error on Linux
 #echo "[BUILD] sysroot in release mode"
 #./build_sysroot/build_sysroot.sh --release
@@ -288,29 +327,7 @@ function test_rustc() {
     echo
     echo "[TEST] rust-lang/rust"
 
-    rust_toolchain=$(cat rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
-
-    git clone https://github.com/rust-lang/rust.git || true
-    cd rust
-    git fetch
-    git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(')
-    export RUSTFLAGS=
-
-    rm config.toml || true
-
-    cat > config.toml <<EOF
-[rust]
-codegen-backends = []
-deny-warnings = false
-
-[build]
-cargo = "$(which cargo)"
-local-rebuild = true
-rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
-EOF
-
-    rustc -V | cut -d' ' -f3 | tr -d '('
-    git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(') src/test
+    setup_rustc
 
     for test in $(rg -i --files-with-matches "//(\[\w+\])?~|// error-pattern:|// build-fail|// run-fail|-Cllvm-args" src/test/ui); do
       rm $test
@@ -380,6 +397,7 @@ function all() {
     mini_tests
     build_sysroot
     std_tests
+    asm_tests
     test_libcore
     extended_sysroot_tests
     test_rustc

From d04e66fd0f0bf1250a02ff2b3562c7aceb75abd2 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 14 Oct 2022 16:38:49 +0200
Subject: [PATCH 190/997] Run assembly tests in the CI

---
 .github/workflows/ci.yml | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index a75a770550ce..347e170b3adf 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -13,7 +13,7 @@ env:
 
 jobs:
   build:
-    runs-on: ubuntu-latest
+    runs-on: ubuntu-20.04
 
     strategy:
       fail-fast: false
@@ -24,7 +24,7 @@ jobs:
           - { gcc: "libgccjit12.so", extra: "--no-default-features", artifacts_branch: "gcc12" }
         commands: [
           "--mini-tests",
-          "--std-tests",
+          "--std-tests --asm-tests",
           "--test-libcore",
           "--extended-rand-tests",
           "--extended-regex-example-tests",
@@ -43,7 +43,8 @@ jobs:
         path: llvm
 
     - name: Install packages
-      run: sudo apt-get install ninja-build ripgrep
+      # `llvm-10-tools` is needed to install the `FileCheck` binary which is used for asm tests.
+      run: sudo apt-get install ninja-build ripgrep llvm-10-tools
 
     - name: Download artifact
       uses: dawidd6/action-download-artifact@v2

From 94a4a4c350ad13a9c8b6ed7029310825b25935e2 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 14 Oct 2022 17:13:17 +0200
Subject: [PATCH 191/997] Convert llvm-arg `--x86-asm-syntax` into GCC arg
 `-masm`

---
 src/base.rs | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/base.rs b/src/base.rs
index 6e1ad9f53151..788d4d9ae362 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -112,7 +112,13 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         context.add_command_line_option("-mavx");
 
         for arg in &tcx.sess.opts.cg.llvm_args {
-            context.add_command_line_option(arg);
+            if arg.starts_with("--x86-asm-syntax=") {
+                // LLVM uses the two same arguments as GCC: `att` and `intel`.
+                let syntax = arg.splitn(2, '=').skip(1).next().expect("missing argument");
+                context.add_command_line_option(&format!("-masm={}", syntax));
+            } else {
+                context.add_command_line_option(arg);
+            }
         }
         // NOTE: This is needed to compile the file src/intrinsic/archs.rs during a bootstrap of rustc.
         context.add_command_line_option("-fno-var-tracking-assignments");

From 549fbe8ecb00543463e0c750bbfa32b61d206167 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 16 Oct 2022 20:26:32 +0200
Subject: [PATCH 192/997] Set llvm-filecheck binary path into rustc config

---
 test.sh | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/test.sh b/test.sh
index 737d87a90694..9cfb8eb0d078 100755
--- a/test.sh
+++ b/test.sh
@@ -222,6 +222,9 @@ deny-warnings = false
 cargo = "$(which cargo)"
 local-rebuild = true
 rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
+
+[target.x86_64-unknown-linux-gnu]
+llvm-filecheck = "`which FileCheck-10 || which FileCheck-11 || which FileCheck-12 || which FileCheck-13 || which FileCheck-14`"
 EOF
 
     rustc -V | cut -d' ' -f3 | tr -d '('

From 1b60286103affa47bc28b2c505c78a0b5d16e4dc Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 16 Oct 2022 21:22:23 +0200
Subject: [PATCH 193/997] Implement constraits modifiers

---
 src/asm.rs | 62 ++++++++++++++++++++++++++++++++++++------------------
 1 file changed, 41 insertions(+), 21 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 3e1b54dcf3bd..486c7a3f5cb7 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -768,34 +768,41 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 }
 
 fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option<char>) -> Option<char> {
+    // The modifiers can be retrieved from
+    // https://gcc.gnu.org/onlinedocs/gcc/Modifiers.html#Modifiers
     match reg {
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => modifier,
-        InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => modifier,
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg)
         | InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => {
-            unimplemented!()
+            if modifier == Some('v') { None } else { modifier }
         }
-        InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg)  => unimplemented!(),
+        InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
+            unreachable!("clobber-only")
+        }
+        InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => None,
         InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
-        | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16) => unimplemented!(),
+        | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16) => None,
         InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
         | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low16)
-        | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low8) => unimplemented!(),
+        | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low8) => Some('P'),
         InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg)
         | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low8)
         | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4) => {
-            unimplemented!()
+            if modifier.is_none() {
+                Some('q')
+            } else {
+                modifier
+            }
         }
-        InlineAsmRegClass::Avr(_) => unimplemented!(),
-        InlineAsmRegClass::Bpf(_) => unimplemented!(),
-        InlineAsmRegClass::Hexagon(_) => unimplemented!(),
-        InlineAsmRegClass::Mips(_) => unimplemented!(),
-        InlineAsmRegClass::Msp430(_) => unimplemented!(),
-        InlineAsmRegClass::Nvptx(_) => unimplemented!(),
-        InlineAsmRegClass::PowerPC(_) => unimplemented!(),
+        InlineAsmRegClass::Hexagon(_) => None,
+        InlineAsmRegClass::Mips(_) => None,
+        InlineAsmRegClass::Nvptx(_) => None,
+        InlineAsmRegClass::PowerPC(_) => None,
         InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg)
-        | InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => unimplemented!(),
-        InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => unimplemented!(),
+        | InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => None,
+        InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
+            unreachable!("clobber-only")
+        }
         InlineAsmRegClass::X86(X86InlineAsmRegClass::reg)
         | InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => match modifier {
             None => if arch == InlineAsmArch::X86_64 { Some('q') } else { Some('k') },
@@ -819,16 +826,29 @@ fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option
             _ => unreachable!(),
         },
         InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => None,
-        InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg0) => None,
-        InlineAsmRegClass::X86(X86InlineAsmRegClass::x87_reg | X86InlineAsmRegClass::mmx_reg | X86InlineAsmRegClass::tmm_reg) => {
+        InlineAsmRegClass::X86(
+            X86InlineAsmRegClass::x87_reg
+            | X86InlineAsmRegClass::mmx_reg
+            | X86InlineAsmRegClass::kreg0
+            | X86InlineAsmRegClass::tmm_reg,
+        ) => {
             unreachable!("clobber-only")
         }
-        InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => unimplemented!(),
+        InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => None,
+        InlineAsmRegClass::Bpf(_) => None,
+        InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair)
+        | InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw)
+        | InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => match modifier {
+            Some('h') => Some('B'),
+            Some('l') => Some('A'),
+            _ => None,
+        },
+        InlineAsmRegClass::Avr(_) => None,
+        InlineAsmRegClass::S390x(_) => None,
+        InlineAsmRegClass::Msp430(_) => None,
         InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
             bug!("LLVM backend does not support SPIR-V")
-        },
-        InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => unimplemented!(),
-        InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => unimplemented!(),
+        }
         InlineAsmRegClass::Err => unreachable!(),
     }
 }

From 5484c131a5edbaee9a88bb4c7e9f14cced5afc8d Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 18 Oct 2022 22:45:22 +0200
Subject: [PATCH 194/997] Don't override -masm option if set in the command
 arguments

---
 src/base.rs | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index 788d4d9ae362..c19a62a6cdc7 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -87,8 +87,6 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         // Instantiate monomorphizations without filling out definitions yet...
         //let llvm_module = ModuleLlvm::new(tcx, &cgu_name.as_str());
         let context = Context::default();
-        // TODO(antoyo): only set on x86 platforms.
-        context.add_command_line_option("-masm=intel");
         // TODO(antoyo): only add the following cli argument if the feature is supported.
         context.add_command_line_option("-msse2");
         context.add_command_line_option("-mavx2");
@@ -111,15 +109,21 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         context.add_command_line_option("-mvpclmulqdq");
         context.add_command_line_option("-mavx");
 
+        let mut has_set_asm_syntax = false;
         for arg in &tcx.sess.opts.cg.llvm_args {
             if arg.starts_with("--x86-asm-syntax=") {
                 // LLVM uses the two same arguments as GCC: `att` and `intel`.
                 let syntax = arg.splitn(2, '=').skip(1).next().expect("missing argument");
                 context.add_command_line_option(&format!("-masm={}", syntax));
+                has_set_asm_syntax = true;
             } else {
                 context.add_command_line_option(arg);
             }
         }
+        if !has_set_asm_syntax {
+            // TODO(antoyo): only set on x86 platforms.
+            context.add_command_line_option("-masm=intel");
+        }
         // NOTE: This is needed to compile the file src/intrinsic/archs.rs during a bootstrap of rustc.
         context.add_command_line_option("-fno-var-tracking-assignments");
         // NOTE: an optimization (https://github.com/rust-lang/rustc_codegen_gcc/issues/53).

From f150ab3277c5ce2b154201e2205cd2e10cb8eb36 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 18 Oct 2022 23:11:46 +0200
Subject: [PATCH 195/997] Improve code generating inline ASM

---
 src/asm.rs | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 486c7a3f5cb7..6dea20e40081 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -706,7 +706,10 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
             && options.contains(InlineAsmOptions::ATT_SYNTAX);
 
         // Build the template string
-        let mut template_str = String::new();
+        let mut template_str = ".pushsection .text\n".to_owned();
+        if att_dialect {
+            template_str.push_str(".att_syntax\n");
+        }
         for piece in template {
             match *piece {
                 InlineAsmTemplatePiece::String(ref string) => {
@@ -754,15 +757,11 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
             }
         }
 
-        let template_str =
-            if att_dialect {
-                format!(".att_syntax\n\t{}\n\t.intel_syntax noprefix", template_str)
-            }
-            else {
-                template_str
-            };
+        if att_dialect {
+            template_str.push_str("\n\t.intel_syntax noprefix");
+        }
         // NOTE: seems like gcc will put the asm in the wrong section, so set it to .text manually.
-        let template_str = format!(".pushsection .text\n{}\n.popsection", template_str);
+        template_str.push_str("\n.popsection");
         self.context.add_top_level_asm(None, &template_str);
     }
 }

From 994a669e264e635daded0ecd8deff6fede51b0a6 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 18 Oct 2022 23:35:47 +0200
Subject: [PATCH 196/997] Make the asm test suite run on its own

---
 .github/workflows/ci.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 347e170b3adf..ff9ea0454012 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -24,7 +24,8 @@ jobs:
           - { gcc: "libgccjit12.so", extra: "--no-default-features", artifacts_branch: "gcc12" }
         commands: [
           "--mini-tests",
-          "--std-tests --asm-tests",
+          "--std-tests",
+          "--asm-tests",
           "--test-libcore",
           "--extended-rand-tests",
           "--extended-regex-example-tests",

From c89e3e9b0c9e1566b88465b738dcc699993551e5 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 18 Oct 2022 17:29:15 +0200
Subject: [PATCH 197/997] Update Readme.md

---
 Readme.md | 22 ++++++++++++++++------
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/Readme.md b/Readme.md
index 274538a0e638..7a29986739aa 100644
--- a/Readme.md
+++ b/Readme.md
@@ -21,8 +21,8 @@ You can also use my [fork of gcc](https://github.com/antoyo/gcc) which already i
 To build it (most of these instructions come from [here](https://gcc.gnu.org/onlinedocs/jit/internals/index.html), so don't hesitate to take a look there if you encounter an issue):
 
 ```bash
+$ git clone https://github.com/antoyo/gcc
 $ cd gcc
-$ ./contrib/download_prerequisites
 $ sudo apt install flex libmpfr-dev libgmp-dev libmpc3 libmpc-dev
 $ ./configure \
    --enable-host-shared \
@@ -31,23 +31,33 @@ $ ./configure \
    --enable-checking=release \
    --prefix=$(pwd)/install \
    --disable-multilib
+$ make -j4 # You can replace `4` with another number depending on how many cores you have.
+$ cd ..
 ```
 
 **Put the path to your custom build of libgccjit in the file `gcc_path`.**
 
 ```bash
-$ git clone https://github.com/rust-lang/rustc_codegen_gcc.git
-$ cd rustc_codegen_gcc
+$ dirname $(readlink -f `find . -name libgccjit.so`) > gcc_path
+```
+
+You can set also set RUST_COMPILER_RT_ROOT:
+
+```bash
 $ git clone https://github.com/llvm/llvm-project llvm --depth 1 --single-branch
 $ export RUST_COMPILER_RT_ROOT="$PWD/llvm/compiler-rt"
-$ ./prepare_build.sh # download and patch sysroot src
-$ ./build.sh --release
+```
+
+Then you can run commands like this:
+
+```bash
+$ ./prepare.sh # download and patch sysroot src and install hyperfine for benchmarking
+$ LIBRARY_PATH=$(cat gcc_path) LD_LIBRARY_PATH=$(cat gcc_path) ./build.sh --release
 ```
 
 To run the tests:
 
 ```bash
-$ ./prepare.sh # download and patch sysroot src and install hyperfine for benchmarking
 $ ./test.sh --release
 ```
 

From ea52df463b8d826fcc2086485ed71d3d5eb1430e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 19 Oct 2022 23:47:42 +0200
Subject: [PATCH 198/997] Fix typo

---
 Readme.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Readme.md b/Readme.md
index 7a29986739aa..4d776b6c7a3f 100644
--- a/Readme.md
+++ b/Readme.md
@@ -41,7 +41,7 @@ $ cd ..
 $ dirname $(readlink -f `find . -name libgccjit.so`) > gcc_path
 ```
 
-You can set also set RUST_COMPILER_RT_ROOT:
+You also need to set RUST_COMPILER_RT_ROOT:
 
 ```bash
 $ git clone https://github.com/llvm/llvm-project llvm --depth 1 --single-branch

From 78f960be32d32414dabaf90bdb997cb3fd226ad5 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 24 Oct 2022 16:47:55 +0200
Subject: [PATCH 199/997] Disable asm tests in CI

---
 .github/workflows/ci.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index ff9ea0454012..915d4a9a8a7d 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -25,7 +25,8 @@ jobs:
         commands: [
           "--mini-tests",
           "--std-tests",
-          "--asm-tests",
+          # FIXME: re-enable asm tests when GCC can emit in the right syntax.
+          # "--asm-tests",
           "--test-libcore",
           "--extended-rand-tests",
           "--extended-regex-example-tests",

From 1a2c8b01cbc53322845607af8cc041133d37f36a Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 23 Oct 2022 21:43:00 +0200
Subject: [PATCH 200/997] Fix gcc build instructions

---
 Readme.md | 33 ++++++++++++++++++++++++---------
 1 file changed, 24 insertions(+), 9 deletions(-)

diff --git a/Readme.md b/Readme.md
index 4d776b6c7a3f..c681e3ca3bcd 100644
--- a/Readme.md
+++ b/Readme.md
@@ -22,17 +22,32 @@ To build it (most of these instructions come from [here](https://gcc.gnu.org/onl
 
 ```bash
 $ git clone https://github.com/antoyo/gcc
-$ cd gcc
 $ sudo apt install flex libmpfr-dev libgmp-dev libmpc3 libmpc-dev
-$ ./configure \
-   --enable-host-shared \
-   --enable-languages=jit \
-   --disable-bootstrap \
-   --enable-checking=release \
-   --prefix=$(pwd)/install \
-   --disable-multilib
+$ mkdir gcc-build gcc-install
+$ cd gcc-build
+$ ../gcc/configure \
+    --enable-host-shared \
+    --enable-languages=jit \
+    --enable-checking=release \ # it enables extra checks which allow to find bugs
+    --disable-bootstrap \
+    --disable-multilib \
+    --prefix=$(pwd)/../gcc-install
 $ make -j4 # You can replace `4` with another number depending on how many cores you have.
-$ cd ..
+```
+
+If you want to run libgccjit tests, you will need to also enable the C++ language in the `configure`:
+
+```bash
+--enable-languages=jit,c++
+```
+
+Then to run libgccjit tests:
+
+```bash
+$ cd gcc # from the `gcc-build` folder
+$ make check-jit
+# To run one specific test:
+$ make check-jit RUNTESTFLAGS="-v -v -v jit.exp=jit.dg/test-asm.cc"
 ```
 
 **Put the path to your custom build of libgccjit in the file `gcc_path`.**

From bf3ef4ce1ae3f9b015c530c29eea01aa7312a1ec Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 26 Oct 2022 17:04:58 +0200
Subject: [PATCH 201/997] Revert changes in argument parsing for setting asm
 syntax

---
 src/base.rs | 16 +++-------------
 1 file changed, 3 insertions(+), 13 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index c19a62a6cdc7..6e1ad9f53151 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -87,6 +87,8 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         // Instantiate monomorphizations without filling out definitions yet...
         //let llvm_module = ModuleLlvm::new(tcx, &cgu_name.as_str());
         let context = Context::default();
+        // TODO(antoyo): only set on x86 platforms.
+        context.add_command_line_option("-masm=intel");
         // TODO(antoyo): only add the following cli argument if the feature is supported.
         context.add_command_line_option("-msse2");
         context.add_command_line_option("-mavx2");
@@ -109,20 +111,8 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         context.add_command_line_option("-mvpclmulqdq");
         context.add_command_line_option("-mavx");
 
-        let mut has_set_asm_syntax = false;
         for arg in &tcx.sess.opts.cg.llvm_args {
-            if arg.starts_with("--x86-asm-syntax=") {
-                // LLVM uses the two same arguments as GCC: `att` and `intel`.
-                let syntax = arg.splitn(2, '=').skip(1).next().expect("missing argument");
-                context.add_command_line_option(&format!("-masm={}", syntax));
-                has_set_asm_syntax = true;
-            } else {
-                context.add_command_line_option(arg);
-            }
-        }
-        if !has_set_asm_syntax {
-            // TODO(antoyo): only set on x86 platforms.
-            context.add_command_line_option("-masm=intel");
+            context.add_command_line_option(arg);
         }
         // NOTE: This is needed to compile the file src/intrinsic/archs.rs during a bootstrap of rustc.
         context.add_command_line_option("-fno-var-tracking-assignments");

From 15fcca80a40e2e9bfc658b6a98bfb9856d122d14 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 24 Nov 2022 12:52:11 -0500
Subject: [PATCH 202/997] Escape { and } in inline asm

---
 src/asm.rs | 22 +++++++++++++---------
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 6dea20e40081..0d5c343ffe36 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -381,15 +381,19 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         for piece in template {
             match *piece {
                 InlineAsmTemplatePiece::String(ref string) => {
-                    // TODO(@Commeownist): switch to `Iterator::intersperse` once it's stable
-                    let mut iter = string.split('%');
-                    if let Some(s) = iter.next() {
-                        template_str.push_str(s);
-                    }
-
-                    for s in iter {
-                        template_str.push_str("%%");
-                        template_str.push_str(s);
+                    for char in string.chars() {
+                        // TODO(antoyo): might also need to escape | if rustc doesn't do it.
+                        let escaped_char =
+                            match char {
+                                '%' => "%%",
+                                '{' => "%{",
+                                '}' => "%}",
+                                _ => {
+                                    template_str.push(char);
+                                    continue;
+                                },
+                            };
+                        template_str.push_str(escaped_char);
                     }
                 }
                 InlineAsmTemplatePiece::Placeholder { operand_idx, modifier, span: _ } => {

From 76991ba26fb76bc7903a41865acac3162bbefa93 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 24 Nov 2022 16:30:21 -0500
Subject: [PATCH 203/997] Fix simd_bitmask

---
 failing-ui-tests.txt  | 1 -
 src/intrinsic/simd.rs | 2 +-
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 5b3166113e77..6182353599b2 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -31,7 +31,6 @@ src/test/ui/sepcomp/sepcomp-fns-backwards.rs
 src/test/ui/sepcomp/sepcomp-fns.rs
 src/test/ui/sepcomp/sepcomp-statics.rs
 src/test/ui/simd/intrinsic/generic-arithmetic-pass.rs
-src/test/ui/simd/intrinsic/generic-bitmask-pass.rs
 src/test/ui/simd/intrinsic/generic-gather-pass.rs
 src/test/ui/simd/issue-17170.rs
 src/test/ui/simd/issue-39720.rs
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index fbfcebe46a13..a4f35c061f0a 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -351,7 +351,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let mut result = bx.context.new_rvalue_zero(result_type);
 
         let elem_size = elem_type.get_size() * 8;
-        let sign_shift = bx.context.new_rvalue_from_int(elem_type, elem_size as i32);
+        let sign_shift = bx.context.new_rvalue_from_int(elem_type, elem_size as i32 - 1);
         let one = bx.context.new_rvalue_one(elem_type);
 
         let mut shift = 0;

From bbc0c2650842455eaca855b7082494c54eb0c411 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 13 May 2022 17:40:02 -0400
Subject: [PATCH 204/997] Download libgccjit-12-dev package in the CI

---
 .github/workflows/ci.yml | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 915d4a9a8a7d..2fd27654dc41 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -13,7 +13,7 @@ env:
 
 jobs:
   build:
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-22.04
 
     strategy:
       fail-fast: false
@@ -45,10 +45,15 @@ jobs:
         path: llvm
 
     - name: Install packages
-      # `llvm-10-tools` is needed to install the `FileCheck` binary which is used for asm tests.
-      run: sudo apt-get install ninja-build ripgrep llvm-10-tools
+      # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
+      run: sudo apt-get install ninja-build ripgrep llvm-14-tools
+
+    - name: Install libgccjit12
+      if: matrix.libgccjit_version.gcc == 'libgccjit12.so'
+      run: sudo apt-get install libgccjit-12-dev
 
     - name: Download artifact
+      if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       uses: dawidd6/action-download-artifact@v2
       with:
           workflow: main.yml
@@ -60,6 +65,11 @@ jobs:
           search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
 
     - name: Setup path to libgccjit
+      if: matrix.libgccjit_version.gcc == 'libgccjit12.so'
+      run: echo /usr/lib/gcc/x86_64-linux-gnu/12 > gcc_path
+
+    - name: Setup path to libgccjit
+      if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       run: |
           echo $(readlink -f gcc-build) > gcc_path
           # NOTE: the filename is still libgccjit.so even when the artifact name is different.

From 69341c44cced1fe7a8dac8ac7ffb2b9c3e63e48a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 24 Nov 2022 18:32:17 -0500
Subject: [PATCH 205/997] Fix the argument order for some AVX-512 intrinsics

---
 src/intrinsic/llvm.rs | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 621ef328a8cf..4552ab95e537 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -304,6 +304,15 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 new_args[0] = arg1.dereference(None).to_rvalue();
                 args = new_args.into();
             },
+            "__builtin_ia32_rcp14sd_mask" | "__builtin_ia32_rcp14ss_mask" | "__builtin_ia32_rsqrt14sd_mask"
+                | "__builtin_ia32_rsqrt14ss_mask" => {
+                let new_args = args.to_vec();
+                args = vec![new_args[1], new_args[0], new_args[2], new_args[3]].into();
+            },
+            "__builtin_ia32_sqrtsd_mask_round" | "__builtin_ia32_sqrtss_mask_round" => {
+                let new_args = args.to_vec();
+                args = vec![new_args[1], new_args[0], new_args[2], new_args[3], new_args[4]].into();
+            },
             _ => (),
         }
     }

From 3791646c0211f561fbcc52ac55a4b36ddb6d94e8 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 1 Oct 2022 13:08:16 -0400
Subject: [PATCH 206/997] Run stdarch tests in the CI

---
 .github/workflows/release.yml | 5 +++++
 src/base.rs                   | 2 +-
 src/lib.rs                    | 3 ++-
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index dd24db5e7073..2e81442298c6 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -105,3 +105,8 @@ jobs:
     - name: Run tests
       run: |
         ./test.sh --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests # --test-libcore # FIXME(antoyo): libcore tests fail.
+
+    - name: Run stdarch tests
+      run: |
+        cd build_sysroot/sysroot_src/library/stdarch/
+        CHANNEL=release TARGET=x86_64-unknown-linux-gnu ../../../../cargo.sh test
diff --git a/src/base.rs b/src/base.rs
index 6e1ad9f53151..ed3daddf43e9 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -101,7 +101,7 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         context.add_command_line_option("-m64");
         context.add_command_line_option("-mbmi");
         context.add_command_line_option("-mgfni");
-        context.add_command_line_option("-mavxvnni");
+        //context.add_command_line_option("-mavxvnni"); // The CI doesn't support this option.
         context.add_command_line_option("-mf16c");
         context.add_command_line_option("-maes");
         context.add_command_line_option("-mxsavec");
diff --git a/src/lib.rs b/src/lib.rs
index e43ee5cf21dc..e52ee4818f3e 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -316,7 +316,8 @@ pub fn target_features(sess: &Session, allow_unstable: bool) -> Vec<Symbol> {
             // gcc -march=native -Q --help=target
             #[cfg(feature="master")]
             {
-                (_feature.contains("sse") || _feature.contains("avx")) && !_feature.contains("avx512")
+                // NOTE: the CPU in the CI doesn't support sse4a, so disable it to make the stdarch tests pass in the CI.
+                (_feature.contains("sse") || _feature.contains("avx")) && !_feature.contains("avx512") && !_feature.contains("sse4a")
             }
             #[cfg(not(feature="master"))]
             {

From 054696e4a3c8e91ed5e880f41a0c42632d8b19b7 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 25 Nov 2022 11:20:17 -0500
Subject: [PATCH 207/997] Disable stdarch examples which require unwinding

---
 patches/0001-Disable-examples.patch | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 patches/0001-Disable-examples.patch

diff --git a/patches/0001-Disable-examples.patch b/patches/0001-Disable-examples.patch
new file mode 100644
index 000000000000..1b71df1ca8df
--- /dev/null
+++ b/patches/0001-Disable-examples.patch
@@ -0,0 +1,25 @@
+From a2d53a324a02c04b76c0e9d39dc15cd443a3b8b2 Mon Sep 17 00:00:00 2001
+From: Antoni Boucher <bouanto@zoho.com>
+Date: Fri, 25 Nov 2022 11:18:11 -0500
+Subject: [PATCH] Disable examples
+
+---
+ library/stdarch/Cargo.toml | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/library/stdarch/Cargo.toml b/library/stdarch/Cargo.toml
+index fbe0a95..748d72d 100644
+--- a/library/stdarch/Cargo.toml
++++ b/library/stdarch/Cargo.toml
+@@ -3,7 +3,7 @@ members = [
+   "crates/core_arch",
+   "crates/std_detect",
+   "crates/stdarch-gen",
+-  "examples/"
++  #"examples/"
+ ]
+ exclude = [
+   "crates/wasm-assert-instr-tests"
+-- 
+2.26.2.7.g19db9cfb68.dirty
+

From 889a33a500982cfc2c79ceff1b2caf86c0adbeaa Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 19 Oct 2022 09:23:23 -0400
Subject: [PATCH 208/997] WIP: Implement unwinding

---
 Cargo.lock                     |   2 -
 Cargo.toml                     |   4 +-
 Readme.md                      |   8 ++
 build_sysroot/build_sysroot.sh |   2 +-
 config.sh                      |   2 +-
 src/asm.rs                     |   5 +-
 src/base.rs                    |  11 +++
 src/builder.rs                 |  96 +++++++++++++++++----
 src/callee.rs                  |  32 +++++--
 src/context.rs                 | 108 +++++++++++++++--------
 src/declare.rs                 |  32 ++++---
 src/intrinsic/mod.rs           | 153 +++++++++++++++++++++++++++++++--
 src/mono_item.rs               |  11 ++-
 13 files changed, 379 insertions(+), 87 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 10d2542f8b5a..e52e742ec6ce 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,6 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#f30cc2bd330f4fda3d625f305bdfd7e523e2d8f8"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +48,6 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#f30cc2bd330f4fda3d625f305bdfd7e523e2d8f8"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 3ac354ea4942..26a0e92923d5 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,10 +22,10 @@ default = ["master"]
 master = ["gccjit/master"]
 
 [dependencies]
-gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
+#gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
 
 # Local copy.
-#gccjit = { path = "../gccjit.rs" }
+gccjit = { path = "../gccjit.rs" }
 
 smallvec = { version = "1.6.1", features = ["union", "may_dangle"] }
 target-lexicon = "0.10.0"
diff --git a/Readme.md b/Readme.md
index c681e3ca3bcd..a74750228ba0 100644
--- a/Readme.md
+++ b/Readme.md
@@ -162,6 +162,14 @@ To print a debug representation of a tree:
 debug_tree(expr);
 ```
 
+(defined in print-tree.h)
+
+To print a debug reprensentation of a gimple struct:
+
+```c
+debug_gimple_stmt(gimple_struct)
+```
+
 To get the `rustc` command to run in `gdb`, add the `--verbose` flag to `cargo build`.
 
 ### How to use a custom-build rustc
diff --git a/build_sysroot/build_sysroot.sh b/build_sysroot/build_sysroot.sh
index f293192a099d..9d692d599f6b 100755
--- a/build_sysroot/build_sysroot.sh
+++ b/build_sysroot/build_sysroot.sh
@@ -16,7 +16,7 @@ rm Cargo.lock test_target/Cargo.lock 2>/dev/null || true
 rm -r sysroot/ 2>/dev/null || true
 
 # Build libs
-export RUSTFLAGS="$RUSTFLAGS -Z force-unstable-if-unmarked -Cpanic=abort"
+export RUSTFLAGS="$RUSTFLAGS -Z force-unstable-if-unmarked"
 if [[ "$1" == "--release" ]]; then
     sysroot_channel='release'
     RUSTFLAGS="$RUSTFLAGS -Zmir-opt-level=3" cargo build --target $TARGET_TRIPLE --release
diff --git a/config.sh b/config.sh
index b25e215fb9ee..6bad0586c5ba 100644
--- a/config.sh
+++ b/config.sh
@@ -38,7 +38,7 @@ if [[ "$HOST_TRIPLE" != "$TARGET_TRIPLE" ]]; then
    fi
 fi
 
-export RUSTFLAGS="$CG_RUSTFLAGS $linker -Cpanic=abort -Csymbol-mangling-version=v0 -Cdebuginfo=2 -Clto=off -Zpanic-abort-tests -Zcodegen-backend=$(pwd)/target/${CHANNEL:-debug}/librustc_codegen_gcc.$dylib_ext --sysroot $(pwd)/build_sysroot/sysroot"
+export RUSTFLAGS="$CG_RUSTFLAGS $linker -Csymbol-mangling-version=v0 -Cdebuginfo=2 -Clto=off -Zcodegen-backend=$(pwd)/target/${CHANNEL:-debug}/librustc_codegen_gcc.$dylib_ext --sysroot $(pwd)/build_sysroot/sysroot"
 
 # FIXME(antoyo): remove once the atomic shim is gone
 if [[ `uname` == 'Darwin' ]]; then
diff --git a/src/asm.rs b/src/asm.rs
index 0d5c343ffe36..b937f7e69ace 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -352,8 +352,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     inputs.push(AsmInOperand {
                         constraint: "X".into(),
                         rust_idx,
-                        val: self.cx.rvalue_as_function(get_fn(self.cx, instance))
-                            .get_address(None),
+                        val: get_fn(self.cx, instance, false).get_address(None),
                     });
                 }
 
@@ -739,7 +738,7 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                         }
 
                         GlobalAsmOperandRef::SymFn { instance } => {
-                            let function = self.rvalue_as_function(get_fn(self, instance));
+                            let function = get_fn(self, instance, false);
                             self.add_used_function(function);
                             // TODO(@Amanieu): Additional mangling is needed on
                             // some targets to add a leading underscore (Mach-O)
diff --git a/src/base.rs b/src/base.rs
index ed3daddf43e9..0e98166a7cc8 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -87,6 +87,16 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         // Instantiate monomorphizations without filling out definitions yet...
         //let llvm_module = ModuleLlvm::new(tcx, &cgu_name.as_str());
         let context = Context::default();
+
+        context.add_command_line_option("-fexceptions");
+        context.add_driver_option("-fexceptions");
+
+        /*context.add_command_line_option("-fasynchronous-unwind-tables");
+        context.add_driver_option("-fasynchronous-unwind-tables");
+
+        context.add_command_line_option("-funwind-tables");
+        context.add_driver_option("-funwind-tables");*/
+
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
         // TODO(antoyo): only add the following cli argument if the feature is supported.
@@ -147,6 +157,7 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         }
 
         // TODO(bjorn3): Remove once unwinding is properly implemented
+        // TODO: remove.
         context.set_allow_unreachable_blocks(true);
 
         {
diff --git a/src/builder.rs b/src/builder.rs
index b7342f507168..68b664a3ba26 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -13,7 +13,7 @@ use gccjit::{
     RValue,
     ToRValue,
     Type,
-    UnaryOp,
+    UnaryOp, FunctionType,
 };
 use rustc_codegen_ssa::MemFlags;
 use rustc_codegen_ssa::common::{AtomicOrdering, AtomicRmwBinOp, IntPredicate, RealPredicate, SynchronizationScope};
@@ -372,10 +372,11 @@ impl<'tcx> FnAbiOfHelpers<'tcx> for Builder<'_, '_, 'tcx> {
     }
 }
 
-impl<'gcc, 'tcx> Deref for Builder<'_, 'gcc, 'tcx> {
+impl<'a, 'gcc, 'tcx> Deref for Builder<'a, 'gcc, 'tcx> {
     type Target = CodegenCx<'gcc, 'tcx>;
 
-    fn deref(&self) -> &Self::Target {
+    fn deref<'b>(&'b self) -> &'a Self::Target
+    {
         self.cx
     }
 }
@@ -393,7 +394,7 @@ impl<'gcc, 'tcx> BackendTypes for Builder<'_, 'gcc, 'tcx> {
 }
 
 impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
-    fn build(cx: &'a CodegenCx<'gcc, 'tcx>, block: Block<'gcc>) -> Self {
+    fn build(cx: &'a CodegenCx<'gcc, 'tcx>, block: Block<'gcc>) -> Builder<'a, 'gcc, 'tcx> {
         Builder::with_cx(cx, block)
     }
 
@@ -450,8 +451,36 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.block.end_with_switch(None, value, default_block, &gcc_cases);
     }
 
+    #[cfg(feature="master")]
+    fn invoke(&mut self, typ: Type<'gcc>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
+        let try_block = self.current_func().new_block("try");
+
+        let current_block = self.block.clone();
+        self.block = try_block;
+        let call = self.call(typ, func, args, None); // TODO: use funclet here?
+        self.block = current_block;
+
+        let return_value = self.current_func()
+            .new_local(None, call.get_type(), "invokeResult");
+
+        try_block.add_assignment(None, return_value, call);
+
+        try_block.end_with_jump(None, then);
+
+        self.block.add_try_catch(None, try_block, catch);
+
+        self.block.end_with_jump(None, then);
+
+        // NOTE: since jumps were added in a place rustc does not expect, the current blocks in the
+        // state need to be updated.
+        // FIXME: not sure it's actually needed.
+        self.switch_to_block(then);
+
+        return_value.to_rvalue()
+    }
+
+    #[cfg(not(feature="master"))]
     fn invoke(&mut self, typ: Type<'gcc>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
-        // TODO(bjorn3): Properly implement unwinding.
         let call_site = self.call(typ, func, args, None);
         let condition = self.context.new_rvalue_from_int(self.bool_type, 1);
         self.llbb().end_with_conditional(None, condition, then, catch);
@@ -1160,23 +1189,56 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         aggregate_value
     }
 
-    fn set_personality_fn(&mut self, _personality: RValue<'gcc>) {
-        // TODO(antoyo)
+    fn set_personality_fn(&mut self, personality: RValue<'gcc>) {
+        let personality = self.rvalue_as_function(personality); // FIXME: why calling
+        //rvalue_as_function doesn't work?
+        //let personality = unsafe { std::mem::transmute(personality) };
+        #[cfg(feature="master")]
+        self.current_func().set_personality_function(personality);
+        // FIXME: rustc manages to generate the symbol DW.ref.rust_eh_personality multiple times
+        // for the same asm file, which causes an assembler error.
     }
 
-    fn cleanup_landing_pad(&mut self, _ty: Type<'gcc>, _pers_fn: RValue<'gcc>) -> RValue<'gcc> {
-        let field1 = self.context.new_field(None, self.u8_type.make_pointer(), "landing_pad_field_1");
-        let field2 = self.context.new_field(None, self.i32_type, "landing_pad_field_1");
+    fn cleanup_landing_pad(&mut self, _ty: Type<'gcc>, pers_fn: RValue<'gcc>) -> RValue<'gcc> {
+        self.set_personality_fn(pers_fn);
+
+        // FIXME: we're probably not creating a real cleanup pad here.
+        // FIXME: FIXME: FIXME: It seems to be the actual problem:
+        // libunwind finds a catch, so returns _URC_HANDLER_FOUND instead of _URC_CONTINUE_UNWIND.
+        // TODO: can we generate a goto from the finally to the cleanup landing pad?
+        // TODO: TODO: TODO: add this block to a cleanup_blocks variable and generate a try/finally instead if
+        // the catch block for it is a cleanup block.
+        //
+        // TODO: look at TRY_CATCH_IS_CLEANUP, CLEANUP_POINT_EXPR, WITH_CLEANUP_EXPR, CLEANUP_EH_ONLY.
+        let eh_pointer_builtin = self.cx.context.get_target_builtin_function("__builtin_eh_pointer");
+        let zero = self.cx.context.new_rvalue_zero(self.int_type);
+        let ptr = self.cx.context.new_call(None, eh_pointer_builtin, &[zero]);
+
+        let field1_type = self.u8_type.make_pointer();
+        let field1 = self.context.new_field(None, field1_type, "landing_pad_field_1");
+        let field2 = self.context.new_field(None, self.i32_type, "landing_pad_field_2");
         let struct_type = self.context.new_struct_type(None, "landing_pad", &[field1, field2]);
-        self.current_func().new_local(None, struct_type.as_type(), "landing_pad")
-            .to_rvalue()
-        // TODO(antoyo): Properly implement unwinding.
-        // the above is just to make the compilation work as it seems
-        // rustc_codegen_ssa now calls the unwinding builder methods even on panic=abort.
+        let value = self.current_func().new_local(None, struct_type.as_type(), "landing_pad");
+        let ptr = self.cx.context.new_cast(None, ptr, field1_type);
+        self.block.add_assignment(None, value.access_field(None, field1), ptr);
+        self.block.add_assignment(None, value.access_field(None, field2), zero); // TODO: set the proper value here (the type of exception?).
+
+        // Resume.
+        let param = self.context.new_parameter(None, ptr.get_type(), "exn");
+        // TODO: should we call __builtin_unwind_resume instead?
+        // FIXME: should probably not called resume because it could be executed (I believe) in
+        // normal (no exception) cases
+        let unwind_resume = self.context.new_function(None, FunctionType::Extern, self.type_void(), &[param], "_Unwind_Resume", false);
+        self.block.add_eval(None, self.context.new_call(None, unwind_resume, &[ptr]));
+
+        value.to_rvalue()
     }
 
-    fn resume(&mut self, _exn: RValue<'gcc>) {
-        // TODO(bjorn3): Properly implement unwinding.
+    fn resume(&mut self, exn: RValue<'gcc>) {
+        let param = self.context.new_parameter(None, exn.get_type(), "exn");
+        // TODO: should we call __builtin_unwind_resume instead?
+        let unwind_resume = self.context.new_function(None, FunctionType::Extern, self.type_void(), &[param], "_Unwind_Resume", false);
+        self.llbb().add_eval(None, self.context.new_call(None, unwind_resume, &[exn]));
         self.unreachable();
     }
 
diff --git a/src/callee.rs b/src/callee.rs
index be7d48b2279a..fea5df9b9b0d 100644
--- a/src/callee.rs
+++ b/src/callee.rs
@@ -1,6 +1,6 @@
 #[cfg(feature="master")]
 use gccjit::{FnAttribute, Visibility};
-use gccjit::{FunctionType, RValue};
+use gccjit::{FunctionType, RValue, Function};
 use rustc_codegen_ssa::traits::BaseTypeMethods;
 use rustc_middle::ty::{self, Instance, TypeVisitable};
 use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt};
@@ -16,22 +16,31 @@ use crate::context::CodegenCx;
 ///
 /// - `cx`: the crate context
 /// - `instance`: the instance to be instantiated
-pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>) -> RValue<'gcc> {
+pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>, dont_cache: bool) -> Function<'gcc> {
     let tcx = cx.tcx();
 
     assert!(!instance.substs.needs_infer());
     assert!(!instance.substs.has_escaping_bound_vars());
 
+    let sym = tcx.symbol_name(instance).name;
+
     if let Some(&func) = cx.function_instances.borrow().get(&instance) {
+        if sym == "rust_eh_personality" {
+            println!("Cached");
+        }
         return func;
     }
 
-    let sym = tcx.symbol_name(instance).name;
+    if sym == "rust_eh_personality" {
+        println!("Not cached");
+    }
 
     let fn_abi = cx.fn_abi_of_instance(instance, ty::List::empty());
 
     let func =
         if let Some(func) = cx.get_declared_value(&sym) {
+            unreachable!();
+            /*
             // Create a fn pointer with the new signature.
             let ptrty = fn_abi.ptr_to_gcc_type(cx);
 
@@ -64,11 +73,14 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
             }
             else {
                 func
-            }
+            }*/
         }
         else {
             cx.linkage.set(FunctionType::Extern);
-            let func = cx.declare_fn(&sym, &fn_abi);
+            /*if sym == "rust_eh_personality" {
+                panic!();
+            }*/
+            let func = cx.declare_fn(&sym, &fn_abi, dont_cache);
 
             attributes::from_fn_attrs(cx, func, instance);
 
@@ -163,11 +175,15 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
                 }
             }
 
-            // FIXME(antoyo): this is a wrong cast. That requires changing the compiler API.
-            unsafe { std::mem::transmute(func) }
+            func
         };
 
-    cx.function_instances.borrow_mut().insert(instance, func);
+    //if !dont_cache {
+    if sym == "rust_eh_personality" {
+        println!("Caching here");
+    }
+        cx.function_instances.borrow_mut().insert(instance, func);
+    //}
 
     func
 }
diff --git a/src/context.rs b/src/context.rs
index 5f34ddd92bac..04371048380f 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -1,9 +1,10 @@
 use std::cell::{Cell, RefCell};
 
-use gccjit::{Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, RValue, Type};
+use gccjit::{Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, RValue, Type, FnAttribute};
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::traits::{
     BackendTypes,
+    BaseTypeMethods,
     MiscMethods,
 };
 use rustc_data_structures::base_n;
@@ -11,7 +12,7 @@ use rustc_data_structures::fx::{FxHashMap, FxHashSet};
 use rustc_middle::span_bug;
 use rustc_middle::mir::mono::CodegenUnit;
 use rustc_middle::ty::{self, Instance, ParamEnv, PolyExistentialTraitRef, Ty, TyCtxt};
-use rustc_middle::ty::layout::{FnAbiError, FnAbiOfHelpers, FnAbiRequest, HasParamEnv, HasTyCtxt, LayoutError, TyAndLayout, LayoutOfHelpers};
+use rustc_middle::ty::layout::{FnAbiError, FnAbiOf, FnAbiOfHelpers, FnAbiRequest, HasParamEnv, HasTyCtxt, LayoutError, TyAndLayout, LayoutOfHelpers};
 use rustc_session::Session;
 use rustc_span::Span;
 use rustc_target::abi::{call::FnAbi, HasDataLayout, PointeeInfo, Size, TargetDataLayout, VariantIdx};
@@ -82,7 +83,7 @@ pub struct CodegenCx<'gcc, 'tcx> {
     /// Cache instances of monomorphic and polymorphic items
     pub instances: RefCell<FxHashMap<Instance<'tcx>, LValue<'gcc>>>,
     /// Cache function instances of monomorphic and polymorphic items
-    pub function_instances: RefCell<FxHashMap<Instance<'tcx>, RValue<'gcc>>>,
+    pub function_instances: RefCell<FxHashMap<Instance<'tcx>, Function<'gcc>>>,
     /// Cache generated vtables
     pub vtables: RefCell<FxHashMap<(Ty<'tcx>, Option<ty::PolyExistentialTraitRef<'tcx>>), RValue<'gcc>>>,
 
@@ -109,6 +110,7 @@ pub struct CodegenCx<'gcc, 'tcx> {
     local_gen_sym_counter: Cell<usize>,
 
     eh_personality: Cell<Option<RValue<'gcc>>>,
+    pub rust_try_fn: Cell<Option<(Type<'gcc>, Function<'gcc>)>>,
 
     pub pointee_infos: RefCell<FxHashMap<(Ty<'tcx>, Size), Option<PointeeInfo>>>,
 
@@ -245,6 +247,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             struct_types: Default::default(),
             local_gen_sym_counter: Cell::new(0),
             eh_personality: Cell::new(None),
+            rust_try_fn: Cell::new(None),
             pointee_infos: Default::default(),
             structs_as_pointer: Default::default(),
         }
@@ -252,8 +255,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
     pub fn rvalue_as_function(&self, value: RValue<'gcc>) -> Function<'gcc> {
         let function: Function<'gcc> = unsafe { std::mem::transmute(value) };
-        debug_assert!(self.functions.borrow().values().find(|value| **value == function).is_some(),
-            "{:?} ({:?}) is not a function", value, value.get_type());
+        // FIXME: seems like self.functions get overwritten for rust_eh_personality.
+        /*debug_assert!(self.functions.borrow().values().find(|value| **value == function).is_some(),
+            "{:?} is not a function", function);*/
         function
     }
 
@@ -325,9 +329,9 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn get_fn(&self, instance: Instance<'tcx>) -> RValue<'gcc> {
-        let func = get_fn(self, instance);
-        *self.current_func.borrow_mut() = Some(self.rvalue_as_function(func));
-        func
+        let func = get_fn(self, instance, false);
+        *self.current_func.borrow_mut() = Some(func);
+        unsafe { std::mem::transmute(func) }
     }
 
     fn get_fn_addr(&self, instance: Instance<'tcx>) -> RValue<'gcc> {
@@ -338,8 +342,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 self.intrinsics.borrow()[func_name].clone()
             }
             else {
-                let func = get_fn(self, instance);
-                self.rvalue_as_function(func)
+                get_fn(self, instance, false)
             };
         let ptr = func.get_address(None);
 
@@ -377,31 +380,68 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
             return llpersonality;
         }
         let tcx = self.tcx;
-        let llfn = match tcx.lang_items().eh_personality() {
-            Some(def_id) if !wants_msvc_seh(self.sess()) => self.get_fn_addr(
-                ty::Instance::resolve(
-                    tcx,
-                    ty::ParamEnv::reveal_all(),
-                    def_id,
-                    tcx.intern_substs(&[]),
-                )
-                .unwrap().unwrap(),
-            ),
-            _ => {
-                let _name = if wants_msvc_seh(self.sess()) {
-                    "__CxxFrameHandler3"
-                } else {
-                    "rust_eh_personality"
-                };
-                //let func = self.declare_func(name, self.type_i32(), &[], true);
-                // FIXME(antoyo): this hack should not be needed. That will probably be removed when
-                // unwinding support is added.
-                self.context.new_rvalue_from_int(self.int_type, 0)
-            }
-        };
+        let func =
+            match tcx.lang_items().eh_personality() {
+                Some(def_id) if !wants_msvc_seh(self.sess()) => {
+                    // FIXME: this create an instance into self.functions and prevent the creating
+                    // of the function defined in std.
+                    let instance =
+                        ty::Instance::resolve(
+                            tcx,
+                            ty::ParamEnv::reveal_all(),
+                            def_id,
+                            tcx.intern_substs(&[]),
+                        )
+                        .unwrap().unwrap();
+
+                    let symbol_name = tcx.symbol_name(instance).name;
+                    let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
+                    self.linkage.set(FunctionType::Extern);
+                    let func = self.declare_fn(symbol_name, &fn_abi, false);
+                    //func.add_attribute(FnAttribute::Weak);
+
+                    /*let block = func.new_block("eh_personality_block");
+                    // NOTE: it seems this function is overwritten by the standard library, so just
+                    // return a dummy value in this version.
+                    let zero = self.context.new_rvalue_zero(self.type_u32());
+                    block.end_with_return(None, zero);*/
+
+                    //*self.current_func.borrow_mut() = Some(func);
+                    let func: RValue<'gcc> = unsafe { std::mem::transmute(func) };
+                    func
+                    /*self.get_fn(
+                        ty::Instance::resolve(
+                            tcx,
+                            ty::ParamEnv::reveal_all(),
+                            def_id,
+                            tcx.intern_substs(&[]),
+                        )
+                        .unwrap().unwrap(),
+                    )*/
+                },
+                _ => {
+                    let name = if wants_msvc_seh(self.sess()) {
+                        "__CxxFrameHandler3"
+                    } else {
+                        "rust_eh_personality"
+                    };
+                    let func = self.declare_func(name, self.type_i32(), &[], true);
+                    //*self.current_func.borrow_mut() = Some(func);
+                    // NOTE: this function is created multiple times and is overwritten by the
+                    // standard library, so mark it as weak.
+                    //func.add_attribute(FnAttribute::Weak);
+                    //self.functions.borrow_mut().insert(name.to_string(), func);
+                    /*let block = func.new_block("eh_personality_block");
+                    // NOTE: it seems this function is overwritten by the standard library, so just
+                    // return a dummy value in this version.
+                    let zero = self.context.new_rvalue_zero(self.type_i32());
+                    block.end_with_return(None, zero);*/
+                    unsafe { std::mem::transmute(func) }
+                }
+            };
         // TODO(antoyo): apply target cpu attributes.
-        self.eh_personality.set(Some(llfn));
-        llfn
+        self.eh_personality.set(Some(func));
+        func
     }
 
     fn sess(&self) -> &Session {
diff --git a/src/declare.rs b/src/declare.rs
index 5f6360a7da53..fdde82e8df77 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -38,12 +38,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         global
     }
 
-    /*pub fn declare_func(&self, name: &str, return_type: Type<'gcc>, params: &[Type<'gcc>], variadic: bool) -> RValue<'gcc> {
-        self.linkage.set(FunctionType::Exported);
-        let func = declare_raw_fn(self, name, () /*llvm::CCallConv*/, return_type, params, variadic);
-        // FIXME(antoyo): this is a wrong cast. That requires changing the compiler API.
-        unsafe { std::mem::transmute(func) }
-    }*/
+    pub fn declare_func(&self, name: &str, return_type: Type<'gcc>, params: &[Type<'gcc>], variadic: bool) -> Function<'gcc> {
+        self.linkage.set(FunctionType::Extern);
+        declare_raw_fn(self, name, () /*llvm::CCallConv*/, return_type, params, variadic, true)
+    }
 
     pub fn declare_global(&self, name: &str, ty: Type<'gcc>, global_kind: GlobalKind, is_tls: bool, link_section: Option<Symbol>) -> LValue<'gcc> {
         let global = self.context.new_global(None, global_kind, ty, name);
@@ -71,7 +69,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let return_type = self.type_i32();
         let variadic = false;
         self.linkage.set(FunctionType::Exported);
-        let func = declare_raw_fn(self, name, () /*llvm::CCallConv*/, return_type, &[self.type_i32(), const_string], variadic);
+        let func = declare_raw_fn(self, name, () /*llvm::CCallConv*/, return_type, &[self.type_i32(), const_string], variadic, false);
         // NOTE: it is needed to set the current_func here as well, because get_fn() is not called
         // for the main function.
         *self.current_func.borrow_mut() = Some(func);
@@ -79,9 +77,19 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         unsafe { std::mem::transmute(func) }
     }
 
-    pub fn declare_fn(&self, name: &str, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Function<'gcc> {
+    pub fn declare_fn(&self, name: &str, fn_abi: &FnAbi<'tcx, Ty<'tcx>>, dont_cache: bool) -> Function<'gcc> {
         let (return_type, params, variadic, on_stack_param_indices) = fn_abi.gcc_type(self);
-        let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, &params, variadic);
+        /*static mut COUNTER: i32 = 0;
+        if name.contains("personality") {
+            println!("{}: {}", name, skip_cache);
+            unsafe {
+                COUNTER += 1;
+                if COUNTER == 6 {
+                    panic!("{}", name);
+                }
+            }
+        }*/
+        let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, &params, variadic, dont_cache);
         self.on_stack_function_params.borrow_mut().insert(func, on_stack_param_indices);
         func
     }
@@ -100,7 +108,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 ///
 /// If there’s a value with the same name already declared, the function will
 /// update the declaration and return existing Value instead.
-fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*llvm::CallConv*/, return_type: Type<'gcc>, param_types: &[Type<'gcc>], variadic: bool) -> Function<'gcc> {
+fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*llvm::CallConv*/, return_type: Type<'gcc>, param_types: &[Type<'gcc>], variadic: bool, dont_cache: bool) -> Function<'gcc> {
     if name.starts_with("llvm.") {
         let intrinsic = llvm::intrinsic(name, cx);
         cx.intrinsics.borrow_mut().insert(name.to_string(), intrinsic);
@@ -115,7 +123,9 @@ fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*ll
                 .map(|(index, param)| cx.context.new_parameter(None, *param, &format!("param{}", index))) // TODO(antoyo): set name.
                 .collect();
             let func = cx.context.new_function(None, cx.linkage.get(), return_type, &params, mangle_name(name), variadic);
-            cx.functions.borrow_mut().insert(name.to_string(), func);
+            //if !dont_cache {
+                cx.functions.borrow_mut().insert(name.to_string(), func);
+            //}
             func
         };
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index e3461b97973e..511256e45a32 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1,22 +1,24 @@
 pub mod llvm;
 mod simd;
 
+use std::iter;
+
 use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp, FunctionType};
 use rustc_codegen_ssa::MemFlags;
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::common::{IntPredicate, span_invalid_monomorphization_error};
 use rustc_codegen_ssa::mir::operand::{OperandRef, OperandValue};
 use rustc_codegen_ssa::mir::place::PlaceRef;
-use rustc_codegen_ssa::traits::{ArgAbiMethods, BaseTypeMethods, BuilderMethods, ConstMethods, IntrinsicCallMethods};
+use rustc_codegen_ssa::traits::{ArgAbiMethods, BaseTypeMethods, BuilderMethods, ConstMethods, DerivedTypeMethods, IntrinsicCallMethods, MiscMethods};
 use rustc_middle::bug;
 use rustc_middle::ty::{self, Instance, Ty};
-use rustc_middle::ty::layout::LayoutOf;
+use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt, LayoutOf};
 use rustc_span::{Span, Symbol, symbol::kw, sym};
 use rustc_target::abi::HasDataLayout;
 use rustc_target::abi::call::{ArgAbi, FnAbi, PassMode};
-use rustc_target::spec::PanicStrategy;
+use rustc_target::spec::{abi::Abi, PanicStrategy};
 
-use crate::abi::GccType;
+use crate::abi::{FnAbiGccExt, GccType};
 use crate::builder::Builder;
 use crate::common::{SignType, TypeReflection};
 use crate::context::CodegenCx;
@@ -1115,9 +1117,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 }
 
-fn try_intrinsic<'gcc, 'tcx>(bx: &mut Builder<'_, 'gcc, 'tcx>, try_func: RValue<'gcc>, data: RValue<'gcc>, _catch_func: RValue<'gcc>, dest: RValue<'gcc>) {
+fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(bx: &'b mut Builder<'a, 'gcc, 'tcx>, try_func: RValue<'gcc>, data: RValue<'gcc>, catch_func: RValue<'gcc>, dest: RValue<'gcc>) {
     // NOTE: the `|| true` here is to use the panic=abort strategy with panic=unwind too
-    if bx.sess().panic_strategy() == PanicStrategy::Abort || true {
+    if bx.sess().panic_strategy() == PanicStrategy::Abort {
         // TODO(bjorn3): Properly implement unwinding and remove the `|| true` once this is done.
         bx.call(bx.type_void(), try_func, &[data], None);
         // Return 0 unconditionally from the intrinsic call;
@@ -1129,6 +1131,143 @@ fn try_intrinsic<'gcc, 'tcx>(bx: &mut Builder<'_, 'gcc, 'tcx>, try_func: RValue<
         unimplemented!();
     }
     else {
-        unimplemented!();
+        codegen_gnu_try(bx, try_func, data, catch_func, dest);
     }
 }
+
+// Definition of the standard `try` function for Rust using the GNU-like model
+// of exceptions (e.g., the normal semantics of LLVM's `landingpad` and `invoke`
+// instructions).
+//
+// This codegen is a little surprising because we always call a shim
+// function instead of inlining the call to `invoke` manually here. This is done
+// because in LLVM we're only allowed to have one personality per function
+// definition. The call to the `try` intrinsic is being inlined into the
+// function calling it, and that function may already have other personality
+// functions in play. By calling a shim we're guaranteed that our shim will have
+// the right personality function.
+fn codegen_gnu_try<'gcc>(bx: &mut Builder<'_, 'gcc, '_>, try_func: RValue<'gcc>, data: RValue<'gcc>, catch_func: RValue<'gcc>, dest: RValue<'gcc>) {
+    //use std::ops::Deref;
+    //let cx: &CodegenCx<'gcc, '_> = bx.deref();
+    let cx: &CodegenCx<'gcc, '_> = bx.cx;
+    let (llty, func) = get_rust_try_fn(cx, &mut |mut bx| {
+        // Codegens the shims described above:
+        //
+        //   bx:
+        //      invoke %try_func(%data) normal %normal unwind %catch
+        //
+        //   normal:
+        //      ret 0
+        //
+        //   catch:
+        //      (%ptr, _) = landingpad
+        //      call %catch_func(%data, %ptr)
+        //      ret 1
+        let then = bx.append_sibling_block("then");
+        let catch = bx.append_sibling_block("catch");
+
+        let func = bx.current_func();
+        let try_func = func.get_param(0).to_rvalue();
+        let data = func.get_param(1).to_rvalue();
+        let catch_func = func.get_param(2).to_rvalue();
+        let try_func_ty = bx.type_func(&[bx.type_i8p()], bx.type_void());
+
+        let current_block = bx.block.clone();
+
+        bx.switch_to_block(then);
+        bx.ret(bx.const_i32(0));
+
+        // Type indicator for the exception being thrown.
+        //
+        // The first value in this tuple is a pointer to the exception object
+        // being thrown.  The second value is a "selector" indicating which of
+        // the landing pad clauses the exception's type had been matched to.
+        // rust_try ignores the selector.
+        bx.switch_to_block(catch);
+        /*let lpad_ty = bx.type_struct(&[bx.type_i8p(), bx.type_i32()], false);
+        let vals = bx.landing_pad(lpad_ty, bx.eh_personality(), 1);
+        let tydesc = bx.const_null(bx.type_i8p());
+        bx.add_clause(vals, tydesc);
+        let ptr = bx.extract_value(vals, 0);*/
+
+        let eh_pointer_builtin = bx.cx.context.get_target_builtin_function("__builtin_eh_pointer");
+        let zero = bx.cx.context.new_rvalue_zero(bx.int_type);
+        let ptr = bx.cx.context.new_call(None, eh_pointer_builtin, &[zero]);
+        let catch_ty = bx.type_func(&[bx.type_i8p(), bx.type_i8p()], bx.type_void());
+        bx.call(catch_ty, catch_func, &[data, ptr], None);
+        bx.ret(bx.const_i32(1));
+
+        // NOTE: the blocks must be filled before adding the try/catch, otherwise gcc will not
+        // generate a try/catch.
+        // FIXME: add a check in the libgccjit API to prevent this.
+        bx.switch_to_block(current_block);
+        bx.invoke(try_func_ty, try_func, &[data], then, catch, None);
+    });
+
+    let func = unsafe { std::mem::transmute(func) };
+
+    // Note that no invoke is used here because by definition this function
+    // can't panic (that's what it's catching).
+    let ret = bx.call(llty, func, &[try_func, data, catch_func], None);
+    let i32_align = bx.tcx().data_layout.i32_align.abi;
+    bx.store(ret, dest, i32_align);
+}
+
+
+// Helper function used to get a handle to the `__rust_try` function used to
+// catch exceptions.
+//
+// This function is only generated once and is then cached.
+fn get_rust_try_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, codegen: &mut dyn FnMut(Builder<'a, 'gcc, 'tcx>)) -> (Type<'gcc>, Function<'gcc>) {
+    if let Some(llfn) = cx.rust_try_fn.get() {
+        return llfn;
+    }
+
+    // Define the type up front for the signature of the rust_try function.
+    let tcx = cx.tcx;
+    let i8p = tcx.mk_mut_ptr(tcx.types.i8);
+    // `unsafe fn(*mut i8) -> ()`
+    let try_fn_ty = tcx.mk_fn_ptr(ty::Binder::dummy(tcx.mk_fn_sig(
+        iter::once(i8p),
+        tcx.mk_unit(),
+        false,
+        rustc_hir::Unsafety::Unsafe,
+        Abi::Rust,
+    )));
+    // `unsafe fn(*mut i8, *mut i8) -> ()`
+    let catch_fn_ty = tcx.mk_fn_ptr(ty::Binder::dummy(tcx.mk_fn_sig(
+        [i8p, i8p].iter().cloned(),
+        tcx.mk_unit(),
+        false,
+        rustc_hir::Unsafety::Unsafe,
+        Abi::Rust,
+    )));
+    // `unsafe fn(unsafe fn(*mut i8) -> (), *mut i8, unsafe fn(*mut i8, *mut i8) -> ()) -> i32`
+    let rust_fn_sig = ty::Binder::dummy(cx.tcx.mk_fn_sig(
+        [try_fn_ty, i8p, catch_fn_ty].into_iter(),
+        &tcx.types.i32,
+        false,
+        rustc_hir::Unsafety::Unsafe,
+        Abi::Rust,
+    ));
+    let rust_try = gen_fn(cx, "__rust_try", rust_fn_sig, codegen);
+    cx.rust_try_fn.set(Some(rust_try));
+    rust_try
+}
+
+// Helper function to give a Block to a closure to codegen a shim function.
+// This is currently primarily used for the `try` intrinsic functions above.
+fn gen_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, name: &str, rust_fn_sig: ty::PolyFnSig<'tcx>, codegen: &mut dyn FnMut(Builder<'a, 'gcc, 'tcx>)) -> (Type<'gcc>, Function<'gcc>) {
+    let fn_abi = cx.fn_abi_of_fn_ptr(rust_fn_sig, ty::List::empty());
+    let (typ, _, _, _) = fn_abi.gcc_type(cx);
+    // FIXME(eddyb) find a nicer way to do this.
+    cx.linkage.set(FunctionType::Internal);
+    let func = cx.declare_fn(name, fn_abi, false);
+    let func_val = unsafe { std::mem::transmute(func) };
+    cx.set_frame_pointer_type(func_val);
+    cx.apply_target_cpu_attr(func_val);
+    let block = Builder::append_block(cx, func_val, "entry-block");
+    let bx = Builder::build(cx, block);
+    codegen(bx);
+    (typ, func)
+}
diff --git a/src/mono_item.rs b/src/mono_item.rs
index ce439d339b6b..09ffd8dc7983 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -35,7 +35,10 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
         let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
         self.linkage.set(base::linkage_to_gcc(linkage));
-        let decl = self.declare_fn(symbol_name, &fn_abi);
+        if symbol_name == "rust_eh_personality" {
+            println!("********************* Generating real rust_eh_personality: {:?}", base::linkage_to_gcc(linkage));
+        }
+        let decl = self.declare_fn(symbol_name, &fn_abi, false);
         //let attrs = self.tcx.codegen_fn_attrs(instance.def_id());
 
         attributes::from_fn_attrs(self, decl, instance);
@@ -59,5 +62,11 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         // TODO(antoyo): call set_link_section() to allow initializing argc/argv.
         // TODO(antoyo): set unique comdat.
         // TODO(antoyo): use inline attribute from there in linkage.set() above.
+
+        self.functions.borrow_mut().insert(symbol_name.to_string(), decl);
+        if symbol_name == "rust_eh_personality" {
+            println!("Caching here 2");
+        }
+        self.function_instances.borrow_mut().insert(instance, unsafe { std::mem::transmute(decl) });
     }
 }

From b0cf0e8c0653aab2c89de7b5e1ef34a24bf8ea80 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 20 Nov 2022 10:36:15 -0500
Subject: [PATCH 209/997] WIP

---
 src/builder.rs   | 20 ++++++++++++++++----
 src/callee.rs    | 10 ----------
 src/context.rs   |  3 +++
 src/mono_item.rs |  6 ------
 4 files changed, 19 insertions(+), 20 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 68b664a3ba26..082b7be8c4e3 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -467,7 +467,15 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         try_block.end_with_jump(None, then);
 
-        self.block.add_try_catch(None, try_block, catch);
+        if self.cleanup_blocks.borrow().contains(&catch) {
+            self.block.add_try_finally(None, try_block, catch);
+        }
+        else {
+            // FIXME: FIXME: FIXME: Seems like bad (_URC_NO_REASON) return code, perhaps because the cleanup pad was created properly.
+            // FIXME: Wrong personality function: __gcc_personality_v0
+            println!("Try/catch in {:?}", self.current_func());
+            self.block.add_try_catch(None, try_block, catch);
+        }
 
         self.block.end_with_jump(None, then);
 
@@ -1202,12 +1210,15 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn cleanup_landing_pad(&mut self, _ty: Type<'gcc>, pers_fn: RValue<'gcc>) -> RValue<'gcc> {
         self.set_personality_fn(pers_fn);
 
+        self.cleanup_blocks.borrow_mut().insert(self.block);
+
         // FIXME: we're probably not creating a real cleanup pad here.
-        // FIXME: FIXME: FIXME: It seems to be the actual problem:
+        // FIXME: It seems to be the actual problem:
         // libunwind finds a catch, so returns _URC_HANDLER_FOUND instead of _URC_CONTINUE_UNWIND.
         // TODO: can we generate a goto from the finally to the cleanup landing pad?
-        // TODO: TODO: TODO: add this block to a cleanup_blocks variable and generate a try/finally instead if
+        // TODO: add this block to a cleanup_blocks variable and generate a try/finally instead if
         // the catch block for it is a cleanup block.
+        // => NO, a cleanup is only called during unwinding.
         //
         // TODO: look at TRY_CATCH_IS_CLEANUP, CLEANUP_POINT_EXPR, WITH_CLEANUP_EXPR, CLEANUP_EH_ONLY.
         let eh_pointer_builtin = self.cx.context.get_target_builtin_function("__builtin_eh_pointer");
@@ -1223,13 +1234,14 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.block.add_assignment(None, value.access_field(None, field1), ptr);
         self.block.add_assignment(None, value.access_field(None, field2), zero); // TODO: set the proper value here (the type of exception?).
 
+        /*
         // Resume.
         let param = self.context.new_parameter(None, ptr.get_type(), "exn");
         // TODO: should we call __builtin_unwind_resume instead?
         // FIXME: should probably not called resume because it could be executed (I believe) in
         // normal (no exception) cases
         let unwind_resume = self.context.new_function(None, FunctionType::Extern, self.type_void(), &[param], "_Unwind_Resume", false);
-        self.block.add_eval(None, self.context.new_call(None, unwind_resume, &[ptr]));
+        self.block.add_eval(None, self.context.new_call(None, unwind_resume, &[ptr]));*/
 
         value.to_rvalue()
     }
diff --git a/src/callee.rs b/src/callee.rs
index fea5df9b9b0d..496b8578bc3d 100644
--- a/src/callee.rs
+++ b/src/callee.rs
@@ -25,16 +25,9 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>,
     let sym = tcx.symbol_name(instance).name;
 
     if let Some(&func) = cx.function_instances.borrow().get(&instance) {
-        if sym == "rust_eh_personality" {
-            println!("Cached");
-        }
         return func;
     }
 
-    if sym == "rust_eh_personality" {
-        println!("Not cached");
-    }
-
     let fn_abi = cx.fn_abi_of_instance(instance, ty::List::empty());
 
     let func =
@@ -179,9 +172,6 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>,
         };
 
     //if !dont_cache {
-    if sym == "rust_eh_personality" {
-        println!("Caching here");
-    }
         cx.function_instances.borrow_mut().insert(instance, func);
     //}
 
diff --git a/src/context.rs b/src/context.rs
index 04371048380f..62e30679efa5 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -120,6 +120,8 @@ pub struct CodegenCx<'gcc, 'tcx> {
     /// they can be dereferenced later.
     /// FIXME(antoyo): fix the rustc API to avoid having this hack.
     pub structs_as_pointer: RefCell<FxHashSet<RValue<'gcc>>>,
+
+    pub cleanup_blocks: RefCell<FxHashSet<Block<'gcc>>>,
 }
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
@@ -250,6 +252,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             rust_try_fn: Cell::new(None),
             pointee_infos: Default::default(),
             structs_as_pointer: Default::default(),
+            cleanup_blocks: Default::default(),
         }
     }
 
diff --git a/src/mono_item.rs b/src/mono_item.rs
index 09ffd8dc7983..3b7f9a0b6bc2 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -35,9 +35,6 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
         let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
         self.linkage.set(base::linkage_to_gcc(linkage));
-        if symbol_name == "rust_eh_personality" {
-            println!("********************* Generating real rust_eh_personality: {:?}", base::linkage_to_gcc(linkage));
-        }
         let decl = self.declare_fn(symbol_name, &fn_abi, false);
         //let attrs = self.tcx.codegen_fn_attrs(instance.def_id());
 
@@ -64,9 +61,6 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         // TODO(antoyo): use inline attribute from there in linkage.set() above.
 
         self.functions.borrow_mut().insert(symbol_name.to_string(), decl);
-        if symbol_name == "rust_eh_personality" {
-            println!("Caching here 2");
-        }
         self.function_instances.borrow_mut().insert(instance, unsafe { std::mem::transmute(decl) });
     }
 }

From 71d7e561bdc2e58cef7fedcec1970dafc852bb61 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 3 Jan 2023 08:56:00 -0500
Subject: [PATCH 210/997] Comment

---
 Readme.md      | 10 ++++++++++
 src/builder.rs |  8 ++++++++
 2 files changed, 18 insertions(+)

diff --git a/Readme.md b/Readme.md
index a74750228ba0..e9c719d84722 100644
--- a/Readme.md
+++ b/Readme.md
@@ -172,6 +172,16 @@ debug_gimple_stmt(gimple_struct)
 
 To get the `rustc` command to run in `gdb`, add the `--verbose` flag to `cargo build`.
 
+To have the correct file paths in `gdb` instead of `/usr/src/debug/gcc/libstdc++-v3/libsupc++/eh_personality.cc`, TODO
+
+Maybe by calling the following at the beginning of gdb:
+
+```
+set substitute-path /usr/src/debug/gcc /home/bouanto/Ordinateur/Programmation/Projets/gcc-repo/gcc
+```
+
+TODO: but that's not what I remember I was doing.
+
 ### How to use a custom-build rustc
 
  * Build the stage2 compiler (`rustup toolchain link debug-current build/x86_64-unknown-linux-gnu/stage2`).
diff --git a/src/builder.rs b/src/builder.rs
index 082b7be8c4e3..fd674ed0b871 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1210,6 +1210,14 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn cleanup_landing_pad(&mut self, _ty: Type<'gcc>, pers_fn: RValue<'gcc>) -> RValue<'gcc> {
         self.set_personality_fn(pers_fn);
 
+        /*
+         * Matching GCC exception handling with LLVM:
+         *
+         *    GCC                 LLVM
+         *    CATCH_EXPR          landing pad catch clause
+         *    TRY_FINALLY_EXPR    cleanup
+         */
+
         self.cleanup_blocks.borrow_mut().insert(self.block);
 
         // FIXME: we're probably not creating a real cleanup pad here.

From 7c1d21c3b91e33d5185228e98ec0eb01ed3f1cd5 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 3 Jan 2023 15:08:07 -0500
Subject: [PATCH 211/997] Don't automatically run asm_tests in test.sh

---
 test.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test.sh b/test.sh
index 9cfb8eb0d078..12a14190e497 100755
--- a/test.sh
+++ b/test.sh
@@ -400,7 +400,7 @@ function all() {
     mini_tests
     build_sysroot
     std_tests
-    asm_tests
+    #asm_tests
     test_libcore
     extended_sysroot_tests
     test_rustc

From a4b74e3adf214d985c541eb7d005bb77e59338f5 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 6 Jan 2023 10:42:38 -0500
Subject: [PATCH 212/997] Fix unwinding

---
 src/builder.rs       | 23 +++--------------------
 src/intrinsic/mod.rs | 12 +++---------
 2 files changed, 6 insertions(+), 29 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index fd674ed0b871..af77fa418c86 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -472,7 +472,6 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         }
         else {
             // FIXME: FIXME: FIXME: Seems like bad (_URC_NO_REASON) return code, perhaps because the cleanup pad was created properly.
-            // FIXME: Wrong personality function: __gcc_personality_v0
             println!("Try/catch in {:?}", self.current_func());
             self.block.add_try_catch(None, try_block, catch);
         }
@@ -1220,15 +1219,6 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         self.cleanup_blocks.borrow_mut().insert(self.block);
 
-        // FIXME: we're probably not creating a real cleanup pad here.
-        // FIXME: It seems to be the actual problem:
-        // libunwind finds a catch, so returns _URC_HANDLER_FOUND instead of _URC_CONTINUE_UNWIND.
-        // TODO: can we generate a goto from the finally to the cleanup landing pad?
-        // TODO: add this block to a cleanup_blocks variable and generate a try/finally instead if
-        // the catch block for it is a cleanup block.
-        // => NO, a cleanup is only called during unwinding.
-        //
-        // TODO: look at TRY_CATCH_IS_CLEANUP, CLEANUP_POINT_EXPR, WITH_CLEANUP_EXPR, CLEANUP_EH_ONLY.
         let eh_pointer_builtin = self.cx.context.get_target_builtin_function("__builtin_eh_pointer");
         let zero = self.cx.context.new_rvalue_zero(self.int_type);
         let ptr = self.cx.context.new_call(None, eh_pointer_builtin, &[zero]);
@@ -1242,21 +1232,14 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.block.add_assignment(None, value.access_field(None, field1), ptr);
         self.block.add_assignment(None, value.access_field(None, field2), zero); // TODO: set the proper value here (the type of exception?).
 
-        /*
-        // Resume.
-        let param = self.context.new_parameter(None, ptr.get_type(), "exn");
-        // TODO: should we call __builtin_unwind_resume instead?
-        // FIXME: should probably not called resume because it could be executed (I believe) in
-        // normal (no exception) cases
-        let unwind_resume = self.context.new_function(None, FunctionType::Extern, self.type_void(), &[param], "_Unwind_Resume", false);
-        self.block.add_eval(None, self.context.new_call(None, unwind_resume, &[ptr]));*/
-
         value.to_rvalue()
     }
 
     fn resume(&mut self, exn: RValue<'gcc>) {
+        // TODO: check if this is normal that we need to dereference the value.
+        let exn = exn.dereference(None).to_rvalue();
         let param = self.context.new_parameter(None, exn.get_type(), "exn");
-        // TODO: should we call __builtin_unwind_resume instead?
+        // TODO(antoyo): should we call __builtin_unwind_resume instead? This might actually be the same.
         let unwind_resume = self.context.new_function(None, FunctionType::Extern, self.type_void(), &[param], "_Unwind_Resume", false);
         self.llbb().add_eval(None, self.context.new_call(None, unwind_resume, &[exn]));
         self.unreachable();
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 511256e45a32..ce7874a3de47 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1179,16 +1179,10 @@ fn codegen_gnu_try<'gcc>(bx: &mut Builder<'_, 'gcc, '_>, try_func: RValue<'gcc>,
 
         // Type indicator for the exception being thrown.
         //
-        // The first value in this tuple is a pointer to the exception object
-        // being thrown.  The second value is a "selector" indicating which of
-        // the landing pad clauses the exception's type had been matched to.
-        // rust_try ignores the selector.
+        // The value is a pointer to the exception object
+        // being thrown.
         bx.switch_to_block(catch);
-        /*let lpad_ty = bx.type_struct(&[bx.type_i8p(), bx.type_i32()], false);
-        let vals = bx.landing_pad(lpad_ty, bx.eh_personality(), 1);
-        let tydesc = bx.const_null(bx.type_i8p());
-        bx.add_clause(vals, tydesc);
-        let ptr = bx.extract_value(vals, 0);*/
+        bx.set_personality_fn(bx.eh_personality());
 
         let eh_pointer_builtin = bx.cx.context.get_target_builtin_function("__builtin_eh_pointer");
         let zero = bx.cx.context.new_rvalue_zero(bx.int_type);

From 70659f7591b9ecc4a92df9d45c1d18e750a5339b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 8 Jan 2023 11:42:00 -0500
Subject: [PATCH 213/997] Cleanup

---
 Readme.md                |  2 +-
 example/alloc_example.rs | 12 ++++++++-
 src/asm.rs               |  4 +--
 src/base.rs              |  9 +------
 src/builder.rs           | 20 +++------------
 src/callee.rs            | 19 ++++++--------
 src/context.rs           | 54 ++++++++++------------------------------
 src/declare.rs           | 24 +++++-------------
 src/intrinsic/mod.rs     |  6 ++---
 src/mono_item.rs         |  2 +-
 test.sh                  |  9 ++++---
 11 files changed, 53 insertions(+), 108 deletions(-)

diff --git a/Readme.md b/Readme.md
index e9c719d84722..3201afbd7820 100644
--- a/Readme.md
+++ b/Readme.md
@@ -177,7 +177,7 @@ To have the correct file paths in `gdb` instead of `/usr/src/debug/gcc/libstdc++
 Maybe by calling the following at the beginning of gdb:
 
 ```
-set substitute-path /usr/src/debug/gcc /home/bouanto/Ordinateur/Programmation/Projets/gcc-repo/gcc
+set substitute-path /usr/src/debug/gcc /path/to/gcc-repo/gcc
 ```
 
 TODO: but that's not what I remember I was doing.
diff --git a/example/alloc_example.rs b/example/alloc_example.rs
index c327b93f1bbd..c80348ca5497 100644
--- a/example/alloc_example.rs
+++ b/example/alloc_example.rs
@@ -1,4 +1,4 @@
-#![feature(start, box_syntax, core_intrinsics, alloc_error_handler)]
+#![feature(start, box_syntax, core_intrinsics, alloc_error_handler, lang_items)]
 #![no_std]
 
 extern crate alloc;
@@ -26,6 +26,16 @@ fn alloc_error_handler(_: alloc::alloc::Layout) -> ! {
     core::intrinsics::abort();
 }
 
+#[lang = "eh_personality"]
+fn eh_personality() -> ! {
+    loop {}
+}
+
+#[no_mangle]
+unsafe extern "C" fn _Unwind_Resume() {
+    core::intrinsics::unreachable();
+}
+
 #[start]
 fn main(_argc: isize, _argv: *const *const u8) -> isize {
     let world: Box<&str> = box "Hello World!\0";
diff --git a/src/asm.rs b/src/asm.rs
index b937f7e69ace..19cd44f28193 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -352,7 +352,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     inputs.push(AsmInOperand {
                         constraint: "X".into(),
                         rust_idx,
-                        val: get_fn(self.cx, instance, false).get_address(None),
+                        val: get_fn(self.cx, instance).get_address(None),
                     });
                 }
 
@@ -738,7 +738,7 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                         }
 
                         GlobalAsmOperandRef::SymFn { instance } => {
-                            let function = get_fn(self, instance, false);
+                            let function = get_fn(self, instance);
                             self.add_used_function(function);
                             // TODO(@Amanieu): Additional mangling is needed on
                             // some targets to add a leading underscore (Mach-O)
diff --git a/src/base.rs b/src/base.rs
index 0e98166a7cc8..ea933c25b2f3 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -91,12 +91,6 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         context.add_command_line_option("-fexceptions");
         context.add_driver_option("-fexceptions");
 
-        /*context.add_command_line_option("-fasynchronous-unwind-tables");
-        context.add_driver_option("-fasynchronous-unwind-tables");
-
-        context.add_command_line_option("-funwind-tables");
-        context.add_driver_option("-funwind-tables");*/
-
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
         // TODO(antoyo): only add the following cli argument if the feature is supported.
@@ -156,8 +150,7 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
             context.set_keep_intermediates(true);
         }
 
-        // TODO(bjorn3): Remove once unwinding is properly implemented
-        // TODO: remove.
+        // NOTE: The codegen generates unrechable blocks.
         context.set_allow_unreachable_blocks(true);
 
         {
diff --git a/src/builder.rs b/src/builder.rs
index af77fa418c86..080a306e70eb 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -457,7 +457,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         let current_block = self.block.clone();
         self.block = try_block;
-        let call = self.call(typ, func, args, None); // TODO: use funclet here?
+        let call = self.call(typ, func, args, None); // TODO(antoyo): use funclet here?
         self.block = current_block;
 
         let return_value = self.current_func()
@@ -471,8 +471,6 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             self.block.add_try_finally(None, try_block, catch);
         }
         else {
-            // FIXME: FIXME: FIXME: Seems like bad (_URC_NO_REASON) return code, perhaps because the cleanup pad was created properly.
-            println!("Try/catch in {:?}", self.current_func());
             self.block.add_try_catch(None, try_block, catch);
         }
 
@@ -1197,26 +1195,16 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn set_personality_fn(&mut self, personality: RValue<'gcc>) {
-        let personality = self.rvalue_as_function(personality); // FIXME: why calling
-        //rvalue_as_function doesn't work?
-        //let personality = unsafe { std::mem::transmute(personality) };
+        let personality = self.rvalue_as_function(personality);
         #[cfg(feature="master")]
         self.current_func().set_personality_function(personality);
-        // FIXME: rustc manages to generate the symbol DW.ref.rust_eh_personality multiple times
-        // for the same asm file, which causes an assembler error.
     }
 
     fn cleanup_landing_pad(&mut self, _ty: Type<'gcc>, pers_fn: RValue<'gcc>) -> RValue<'gcc> {
         self.set_personality_fn(pers_fn);
 
-        /*
-         * Matching GCC exception handling with LLVM:
-         *
-         *    GCC                 LLVM
-         *    CATCH_EXPR          landing pad catch clause
-         *    TRY_FINALLY_EXPR    cleanup
-         */
-
+        // NOTE: insert the current block in a variable so that a later call to invoke knows to
+        // generate a try/finally instead of a try/catch for this block.
         self.cleanup_blocks.borrow_mut().insert(self.block);
 
         let eh_pointer_builtin = self.cx.context.get_target_builtin_function("__builtin_eh_pointer");
diff --git a/src/callee.rs b/src/callee.rs
index 496b8578bc3d..70cdece7f0af 100644
--- a/src/callee.rs
+++ b/src/callee.rs
@@ -1,11 +1,9 @@
 #[cfg(feature="master")]
 use gccjit::{FnAttribute, Visibility};
-use gccjit::{FunctionType, RValue, Function};
-use rustc_codegen_ssa::traits::BaseTypeMethods;
+use gccjit::{FunctionType, Function};
 use rustc_middle::ty::{self, Instance, TypeVisitable};
 use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt};
 
-use crate::abi::FnAbiGccExt;
 use crate::attributes;
 use crate::context::CodegenCx;
 
@@ -16,7 +14,7 @@ use crate::context::CodegenCx;
 ///
 /// - `cx`: the crate context
 /// - `instance`: the instance to be instantiated
-pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>, dont_cache: bool) -> Function<'gcc> {
+pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>) -> Function<'gcc> {
     let tcx = cx.tcx();
 
     assert!(!instance.substs.needs_infer());
@@ -31,7 +29,9 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>,
     let fn_abi = cx.fn_abi_of_instance(instance, ty::List::empty());
 
     let func =
-        if let Some(func) = cx.get_declared_value(&sym) {
+        if let Some(_func) = cx.get_declared_value(&sym) {
+            // FIXME: we never reach this because get_declared_value only returns global variables
+            // and here we try to get a function.
             unreachable!();
             /*
             // Create a fn pointer with the new signature.
@@ -70,10 +70,7 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>,
         }
         else {
             cx.linkage.set(FunctionType::Extern);
-            /*if sym == "rust_eh_personality" {
-                panic!();
-            }*/
-            let func = cx.declare_fn(&sym, &fn_abi, dont_cache);
+            let func = cx.declare_fn(&sym, &fn_abi);
 
             attributes::from_fn_attrs(cx, func, instance);
 
@@ -171,9 +168,7 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>,
             func
         };
 
-    //if !dont_cache {
-        cx.function_instances.borrow_mut().insert(instance, func);
-    //}
+    cx.function_instances.borrow_mut().insert(instance, func);
 
     func
 }
diff --git a/src/context.rs b/src/context.rs
index 62e30679efa5..a66e13b6008a 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -1,6 +1,6 @@
 use std::cell::{Cell, RefCell};
 
-use gccjit::{Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, RValue, Type, FnAttribute};
+use gccjit::{Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, RValue, Type};
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::traits::{
     BackendTypes,
@@ -259,8 +259,8 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     pub fn rvalue_as_function(&self, value: RValue<'gcc>) -> Function<'gcc> {
         let function: Function<'gcc> = unsafe { std::mem::transmute(value) };
         // FIXME: seems like self.functions get overwritten for rust_eh_personality.
-        /*debug_assert!(self.functions.borrow().values().find(|value| **value == function).is_some(),
-            "{:?} is not a function", function);*/
+        debug_assert!(self.functions.borrow().values().find(|value| **value == function).is_some(),
+            "{:?} is not a function", function);
         function
     }
 
@@ -332,7 +332,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn get_fn(&self, instance: Instance<'tcx>) -> RValue<'gcc> {
-        let func = get_fn(self, instance, false);
+        let func = get_fn(self, instance);
         *self.current_func.borrow_mut() = Some(func);
         unsafe { std::mem::transmute(func) }
     }
@@ -345,7 +345,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 self.intrinsics.borrow()[func_name].clone()
             }
             else {
-                get_fn(self, instance, false)
+                get_fn(self, instance)
             };
         let ptr = func.get_address(None);
 
@@ -386,8 +386,6 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let func =
             match tcx.lang_items().eh_personality() {
                 Some(def_id) if !wants_msvc_seh(self.sess()) => {
-                    // FIXME: this create an instance into self.functions and prevent the creating
-                    // of the function defined in std.
                     let instance =
                         ty::Instance::resolve(
                             tcx,
@@ -400,45 +398,19 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                     let symbol_name = tcx.symbol_name(instance).name;
                     let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
                     self.linkage.set(FunctionType::Extern);
-                    let func = self.declare_fn(symbol_name, &fn_abi, false);
-                    //func.add_attribute(FnAttribute::Weak);
-
-                    /*let block = func.new_block("eh_personality_block");
-                    // NOTE: it seems this function is overwritten by the standard library, so just
-                    // return a dummy value in this version.
-                    let zero = self.context.new_rvalue_zero(self.type_u32());
-                    block.end_with_return(None, zero);*/
-
-                    //*self.current_func.borrow_mut() = Some(func);
+                    let func = self.declare_fn(symbol_name, &fn_abi);
                     let func: RValue<'gcc> = unsafe { std::mem::transmute(func) };
                     func
-                    /*self.get_fn(
-                        ty::Instance::resolve(
-                            tcx,
-                            ty::ParamEnv::reveal_all(),
-                            def_id,
-                            tcx.intern_substs(&[]),
-                        )
-                        .unwrap().unwrap(),
-                    )*/
                 },
                 _ => {
-                    let name = if wants_msvc_seh(self.sess()) {
-                        "__CxxFrameHandler3"
-                    } else {
-                        "rust_eh_personality"
-                    };
+                    let name =
+                        if wants_msvc_seh(self.sess()) {
+                            "__CxxFrameHandler3"
+                        }
+                        else {
+                            "rust_eh_personality"
+                        };
                     let func = self.declare_func(name, self.type_i32(), &[], true);
-                    //*self.current_func.borrow_mut() = Some(func);
-                    // NOTE: this function is created multiple times and is overwritten by the
-                    // standard library, so mark it as weak.
-                    //func.add_attribute(FnAttribute::Weak);
-                    //self.functions.borrow_mut().insert(name.to_string(), func);
-                    /*let block = func.new_block("eh_personality_block");
-                    // NOTE: it seems this function is overwritten by the standard library, so just
-                    // return a dummy value in this version.
-                    let zero = self.context.new_rvalue_zero(self.type_i32());
-                    block.end_with_return(None, zero);*/
                     unsafe { std::mem::transmute(func) }
                 }
             };
diff --git a/src/declare.rs b/src/declare.rs
index fdde82e8df77..b4b7d1b011ea 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -40,7 +40,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
     pub fn declare_func(&self, name: &str, return_type: Type<'gcc>, params: &[Type<'gcc>], variadic: bool) -> Function<'gcc> {
         self.linkage.set(FunctionType::Extern);
-        declare_raw_fn(self, name, () /*llvm::CCallConv*/, return_type, params, variadic, true)
+        declare_raw_fn(self, name, () /*llvm::CCallConv*/, return_type, params, variadic)
     }
 
     pub fn declare_global(&self, name: &str, ty: Type<'gcc>, global_kind: GlobalKind, is_tls: bool, link_section: Option<Symbol>) -> LValue<'gcc> {
@@ -69,7 +69,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let return_type = self.type_i32();
         let variadic = false;
         self.linkage.set(FunctionType::Exported);
-        let func = declare_raw_fn(self, name, () /*llvm::CCallConv*/, return_type, &[self.type_i32(), const_string], variadic, false);
+        let func = declare_raw_fn(self, name, () /*llvm::CCallConv*/, return_type, &[self.type_i32(), const_string], variadic);
         // NOTE: it is needed to set the current_func here as well, because get_fn() is not called
         // for the main function.
         *self.current_func.borrow_mut() = Some(func);
@@ -77,19 +77,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         unsafe { std::mem::transmute(func) }
     }
 
-    pub fn declare_fn(&self, name: &str, fn_abi: &FnAbi<'tcx, Ty<'tcx>>, dont_cache: bool) -> Function<'gcc> {
+    pub fn declare_fn(&self, name: &str, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Function<'gcc> {
         let (return_type, params, variadic, on_stack_param_indices) = fn_abi.gcc_type(self);
-        /*static mut COUNTER: i32 = 0;
-        if name.contains("personality") {
-            println!("{}: {}", name, skip_cache);
-            unsafe {
-                COUNTER += 1;
-                if COUNTER == 6 {
-                    panic!("{}", name);
-                }
-            }
-        }*/
-        let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, &params, variadic, dont_cache);
+        let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, &params, variadic);
         self.on_stack_function_params.borrow_mut().insert(func, on_stack_param_indices);
         func
     }
@@ -108,7 +98,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 ///
 /// If there’s a value with the same name already declared, the function will
 /// update the declaration and return existing Value instead.
-fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*llvm::CallConv*/, return_type: Type<'gcc>, param_types: &[Type<'gcc>], variadic: bool, dont_cache: bool) -> Function<'gcc> {
+fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*llvm::CallConv*/, return_type: Type<'gcc>, param_types: &[Type<'gcc>], variadic: bool) -> Function<'gcc> {
     if name.starts_with("llvm.") {
         let intrinsic = llvm::intrinsic(name, cx);
         cx.intrinsics.borrow_mut().insert(name.to_string(), intrinsic);
@@ -123,9 +113,7 @@ fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*ll
                 .map(|(index, param)| cx.context.new_parameter(None, *param, &format!("param{}", index))) // TODO(antoyo): set name.
                 .collect();
             let func = cx.context.new_function(None, cx.linkage.get(), return_type, &params, mangle_name(name), variadic);
-            //if !dont_cache {
-                cx.functions.borrow_mut().insert(name.to_string(), func);
-            //}
+            cx.functions.borrow_mut().insert(name.to_string(), func);
             func
         };
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index ce7874a3de47..fa78325ec9d1 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1118,9 +1118,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 }
 
 fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(bx: &'b mut Builder<'a, 'gcc, 'tcx>, try_func: RValue<'gcc>, data: RValue<'gcc>, catch_func: RValue<'gcc>, dest: RValue<'gcc>) {
-    // NOTE: the `|| true` here is to use the panic=abort strategy with panic=unwind too
     if bx.sess().panic_strategy() == PanicStrategy::Abort {
-        // TODO(bjorn3): Properly implement unwinding and remove the `|| true` once this is done.
         bx.call(bx.type_void(), try_func, &[data], None);
         // Return 0 unconditionally from the intrinsic call;
         // we can never unwind.
@@ -1238,7 +1236,7 @@ fn get_rust_try_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, codegen: &mut
     )));
     // `unsafe fn(unsafe fn(*mut i8) -> (), *mut i8, unsafe fn(*mut i8, *mut i8) -> ()) -> i32`
     let rust_fn_sig = ty::Binder::dummy(cx.tcx.mk_fn_sig(
-        [try_fn_ty, i8p, catch_fn_ty].into_iter(),
+        [try_fn_ty, i8p, catch_fn_ty].iter(),
         &tcx.types.i32,
         false,
         rustc_hir::Unsafety::Unsafe,
@@ -1256,7 +1254,7 @@ fn gen_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, name: &str, rust_fn_sig
     let (typ, _, _, _) = fn_abi.gcc_type(cx);
     // FIXME(eddyb) find a nicer way to do this.
     cx.linkage.set(FunctionType::Internal);
-    let func = cx.declare_fn(name, fn_abi, false);
+    let func = cx.declare_fn(name, fn_abi);
     let func_val = unsafe { std::mem::transmute(func) };
     cx.set_frame_pointer_type(func_val);
     cx.apply_target_cpu_attr(func_val);
diff --git a/src/mono_item.rs b/src/mono_item.rs
index 3b7f9a0b6bc2..0491fffc8abf 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -35,7 +35,7 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
         let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
         self.linkage.set(base::linkage_to_gcc(linkage));
-        let decl = self.declare_fn(symbol_name, &fn_abi, false);
+        let decl = self.declare_fn(symbol_name, &fn_abi);
         //let attrs = self.tcx.codegen_fn_attrs(instance.def_id());
 
         attributes::from_fn_attrs(self, decl, instance);
diff --git a/test.sh b/test.sh
index 9cfb8eb0d078..5604fd4ff94b 100755
--- a/test.sh
+++ b/test.sh
@@ -191,11 +191,11 @@ function std_tests() {
     $RUN_WRAPPER ./target/out/std_example --target $TARGET_TRIPLE
 
     echo "[AOT] subslice-patterns-const-eval"
-    $RUSTC example/subslice-patterns-const-eval.rs --crate-type bin -Cpanic=abort --target $TARGET_TRIPLE
+    $RUSTC example/subslice-patterns-const-eval.rs --crate-type bin --target $TARGET_TRIPLE
     $RUN_WRAPPER ./target/out/subslice-patterns-const-eval
 
     echo "[AOT] track-caller-attribute"
-    $RUSTC example/track-caller-attribute.rs --crate-type bin -Cpanic=abort --target $TARGET_TRIPLE
+    $RUSTC example/track-caller-attribute.rs --crate-type bin --target $TARGET_TRIPLE
     $RUN_WRAPPER ./target/out/track-caller-attribute
 
     echo "[BUILD] mod_bench"
@@ -340,6 +340,7 @@ function test_rustc() {
 
     rm -r src/test/ui/{abi*,extern/,panic-runtime/,panics/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,chalkify/bugs/,test*,*lto*.rs,consts/const-float-bits-reject-conv.rs,consts/issue-miri-1910.rs} || true
     rm src/test/ui/mir/mir_heavy_promoted.rs # this tests is oom-killed in the CI.
+    # TODO: re-enable panics tests.
     for test in $(rg --files-with-matches "catch_unwind|should_panic|thread|lto" src/test/ui); do
       rm $test
     done
@@ -348,7 +349,7 @@ function test_rustc() {
     git checkout src/test/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
     git checkout src/test/ui/macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs
 
-    RUSTC_ARGS="-Zpanic-abort-tests -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot -Cpanic=abort"
+    RUSTC_ARGS="-Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot"
 
     if [ $# -eq 0 ]; then
         # No argument supplied to the function. Doing nothing.
@@ -400,7 +401,7 @@ function all() {
     mini_tests
     build_sysroot
     std_tests
-    asm_tests
+    #asm_tests
     test_libcore
     extended_sysroot_tests
     test_rustc

From af8db759be6e92e470a6af810f22b2ebc0cfc87f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Jan 2023 17:04:59 -0500
Subject: [PATCH 214/997] Support libgccjit12

---
 .github/workflows/ci.yml | 10 +++++-----
 config.sh                |  2 +-
 src/builder.rs           | 39 +++++++++++++++++++++++++++------------
 src/intrinsic/mod.rs     | 27 +++++++++++++++++++++------
 test.sh                  |  9 ++++-----
 5 files changed, 58 insertions(+), 29 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 2fd27654dc41..1c99e5e2bc28 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -19,9 +19,9 @@ jobs:
       fail-fast: false
       matrix:
         libgccjit_version:
-          - { gcc: "libgccjit.so", extra: "", artifacts_branch: "master" }
-          - { gcc: "libgccjit_without_int128.so", extra: "", artifacts_branch: "master-without-128bit-integers" }
-          - { gcc: "libgccjit12.so", extra: "--no-default-features", artifacts_branch: "gcc12" }
+          - { gcc: "libgccjit.so", extra: "", env_extra: "", artifacts_branch: "master" }
+          - { gcc: "libgccjit_without_int128.so", extra: "", env_extra: "", artifacts_branch: "master-without-128bit-integers" }
+          - { gcc: "libgccjit12.so", extra: "--no-default-features", env_extra: "TEST_FLAGS='-Cpanic=abort -Zpanic-abort-tests'", artifacts_branch: "gcc12" }
         commands: [
           "--mini-tests",
           "--std-tests",
@@ -120,7 +120,7 @@ jobs:
     - name: Build
       run: |
         ./prepare_build.sh
-        ./build.sh ${{ matrix.libgccjit_version.extra }}
+        ${{ matrix.libgccjit_version.env_extra }} ./build.sh ${{ matrix.libgccjit_version.extra }}
         cargo test ${{ matrix.libgccjit_version.extra }}
         ./clean_all.sh
 
@@ -143,7 +143,7 @@ jobs:
 
     - name: Run tests
       run: |
-        ./test.sh --release --clean --build-sysroot ${{ matrix.commands }} ${{ matrix.libgccjit_version.extra }}
+        ${{ matrix.libgccjit_version.env_extra }} ./test.sh --release --clean --build-sysroot ${{ matrix.commands }} ${{ matrix.libgccjit_version.extra }}
 
   duplicates:
     runs-on: ubuntu-latest
diff --git a/config.sh b/config.sh
index 6bad0586c5ba..166e83901c4f 100644
--- a/config.sh
+++ b/config.sh
@@ -38,7 +38,7 @@ if [[ "$HOST_TRIPLE" != "$TARGET_TRIPLE" ]]; then
    fi
 fi
 
-export RUSTFLAGS="$CG_RUSTFLAGS $linker -Csymbol-mangling-version=v0 -Cdebuginfo=2 -Clto=off -Zcodegen-backend=$(pwd)/target/${CHANNEL:-debug}/librustc_codegen_gcc.$dylib_ext --sysroot $(pwd)/build_sysroot/sysroot"
+export RUSTFLAGS="$CG_RUSTFLAGS $linker -Csymbol-mangling-version=v0 -Cdebuginfo=2 -Clto=off -Zcodegen-backend=$(pwd)/target/${CHANNEL:-debug}/librustc_codegen_gcc.$dylib_ext --sysroot $(pwd)/build_sysroot/sysroot $TEST_FLAGS"
 
 # FIXME(antoyo): remove once the atomic shim is gone
 if [[ `uname` == 'Darwin' ]]; then
diff --git a/src/builder.rs b/src/builder.rs
index 080a306e70eb..0150f5ba8c14 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -13,7 +13,7 @@ use gccjit::{
     RValue,
     ToRValue,
     Type,
-    UnaryOp, FunctionType,
+    UnaryOp,
 };
 use rustc_codegen_ssa::MemFlags;
 use rustc_codegen_ssa::common::{AtomicOrdering, AtomicRmwBinOp, IntPredicate, RealPredicate, SynchronizationScope};
@@ -476,11 +476,6 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         self.block.end_with_jump(None, then);
 
-        // NOTE: since jumps were added in a place rustc does not expect, the current blocks in the
-        // state need to be updated.
-        // FIXME: not sure it's actually needed.
-        self.switch_to_block(then);
-
         return_value.to_rvalue()
     }
 
@@ -1194,12 +1189,15 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         aggregate_value
     }
 
-    fn set_personality_fn(&mut self, personality: RValue<'gcc>) {
-        let personality = self.rvalue_as_function(personality);
+    fn set_personality_fn(&mut self, _personality: RValue<'gcc>) {
         #[cfg(feature="master")]
-        self.current_func().set_personality_function(personality);
+        {
+            let personality = self.rvalue_as_function(_personality);
+            self.current_func().set_personality_function(personality);
+        }
     }
 
+    #[cfg(feature="master")]
     fn cleanup_landing_pad(&mut self, _ty: Type<'gcc>, pers_fn: RValue<'gcc>) -> RValue<'gcc> {
         self.set_personality_fn(pers_fn);
 
@@ -1223,16 +1221,33 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         value.to_rvalue()
     }
 
+    #[cfg(not(feature="master"))]
+    fn cleanup_landing_pad(&mut self, _ty: Type<'gcc>, _pers_fn: RValue<'gcc>) -> RValue<'gcc> {
+        let field1 = self.context.new_field(None, self.u8_type.make_pointer(), "landing_pad_field_1");
+        let field2 = self.context.new_field(None, self.i32_type, "landing_pad_field_1");
+        let struct_type = self.context.new_struct_type(None, "landing_pad", &[field1, field2]);
+        self.current_func().new_local(None, struct_type.as_type(), "landing_pad")
+            .to_rvalue()
+    }
+
+    #[cfg(feature="master")]
     fn resume(&mut self, exn: RValue<'gcc>) {
         // TODO: check if this is normal that we need to dereference the value.
+        // NOTE: the type is wrong, so in order to get a pointer for parameter, cast it to a
+        // pointer of pointer that is later dereferenced.
+        let exn_type = exn.get_type().make_pointer();
+        let exn = self.context.new_cast(None, exn, exn_type);
         let exn = exn.dereference(None).to_rvalue();
-        let param = self.context.new_parameter(None, exn.get_type(), "exn");
-        // TODO(antoyo): should we call __builtin_unwind_resume instead? This might actually be the same.
-        let unwind_resume = self.context.new_function(None, FunctionType::Extern, self.type_void(), &[param], "_Unwind_Resume", false);
+        let unwind_resume = self.context.get_target_builtin_function("__builtin_unwind_resume");
         self.llbb().add_eval(None, self.context.new_call(None, unwind_resume, &[exn]));
         self.unreachable();
     }
 
+    #[cfg(not(feature="master"))]
+    fn resume(&mut self, _exn: RValue<'gcc>) {
+        self.unreachable();
+    }
+
     fn cleanup_pad(&mut self, _parent: Option<RValue<'gcc>>, _args: &[RValue<'gcc>]) -> Funclet {
         unimplemented!();
     }
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index fa78325ec9d1..46471096e910 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1,6 +1,7 @@
 pub mod llvm;
 mod simd;
 
+#[cfg(feature="master")]
 use std::iter;
 
 use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp, FunctionType};
@@ -9,16 +10,24 @@ use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::common::{IntPredicate, span_invalid_monomorphization_error};
 use rustc_codegen_ssa::mir::operand::{OperandRef, OperandValue};
 use rustc_codegen_ssa::mir::place::PlaceRef;
-use rustc_codegen_ssa::traits::{ArgAbiMethods, BaseTypeMethods, BuilderMethods, ConstMethods, DerivedTypeMethods, IntrinsicCallMethods, MiscMethods};
+use rustc_codegen_ssa::traits::{ArgAbiMethods, BaseTypeMethods, BuilderMethods, ConstMethods, IntrinsicCallMethods};
+#[cfg(feature="master")]
+use rustc_codegen_ssa::traits::{DerivedTypeMethods, MiscMethods};
 use rustc_middle::bug;
 use rustc_middle::ty::{self, Instance, Ty};
-use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt, LayoutOf};
+use rustc_middle::ty::layout::LayoutOf;
+#[cfg(feature="master")]
+use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt};
 use rustc_span::{Span, Symbol, symbol::kw, sym};
 use rustc_target::abi::HasDataLayout;
 use rustc_target::abi::call::{ArgAbi, FnAbi, PassMode};
-use rustc_target::spec::{abi::Abi, PanicStrategy};
+use rustc_target::spec::PanicStrategy;
+#[cfg(feature="master")]
+use rustc_target::spec::abi::Abi;
 
-use crate::abi::{FnAbiGccExt, GccType};
+use crate::abi::GccType;
+#[cfg(feature="master")]
+use crate::abi::FnAbiGccExt;
 use crate::builder::Builder;
 use crate::common::{SignType, TypeReflection};
 use crate::context::CodegenCx;
@@ -1117,7 +1126,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 }
 
-fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(bx: &'b mut Builder<'a, 'gcc, 'tcx>, try_func: RValue<'gcc>, data: RValue<'gcc>, catch_func: RValue<'gcc>, dest: RValue<'gcc>) {
+fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(bx: &'b mut Builder<'a, 'gcc, 'tcx>, try_func: RValue<'gcc>, data: RValue<'gcc>, _catch_func: RValue<'gcc>, dest: RValue<'gcc>) {
     if bx.sess().panic_strategy() == PanicStrategy::Abort {
         bx.call(bx.type_void(), try_func, &[data], None);
         // Return 0 unconditionally from the intrinsic call;
@@ -1129,7 +1138,10 @@ fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(bx: &'b mut Builder<'a, 'gcc, 'tcx>, try_fu
         unimplemented!();
     }
     else {
-        codegen_gnu_try(bx, try_func, data, catch_func, dest);
+        #[cfg(feature="master")]
+        codegen_gnu_try(bx, try_func, data, _catch_func, dest);
+        #[cfg(not(feature="master"))]
+        unimplemented!();
     }
 }
 
@@ -1144,6 +1156,7 @@ fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(bx: &'b mut Builder<'a, 'gcc, 'tcx>, try_fu
 // function calling it, and that function may already have other personality
 // functions in play. By calling a shim we're guaranteed that our shim will have
 // the right personality function.
+#[cfg(feature="master")]
 fn codegen_gnu_try<'gcc>(bx: &mut Builder<'_, 'gcc, '_>, try_func: RValue<'gcc>, data: RValue<'gcc>, catch_func: RValue<'gcc>, dest: RValue<'gcc>) {
     //use std::ops::Deref;
     //let cx: &CodegenCx<'gcc, '_> = bx.deref();
@@ -1210,6 +1223,7 @@ fn codegen_gnu_try<'gcc>(bx: &mut Builder<'_, 'gcc, '_>, try_func: RValue<'gcc>,
 // catch exceptions.
 //
 // This function is only generated once and is then cached.
+#[cfg(feature="master")]
 fn get_rust_try_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, codegen: &mut dyn FnMut(Builder<'a, 'gcc, 'tcx>)) -> (Type<'gcc>, Function<'gcc>) {
     if let Some(llfn) = cx.rust_try_fn.get() {
         return llfn;
@@ -1249,6 +1263,7 @@ fn get_rust_try_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, codegen: &mut
 
 // Helper function to give a Block to a closure to codegen a shim function.
 // This is currently primarily used for the `try` intrinsic functions above.
+#[cfg(feature="master")]
 fn gen_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, name: &str, rust_fn_sig: ty::PolyFnSig<'tcx>, codegen: &mut dyn FnMut(Builder<'a, 'gcc, 'tcx>)) -> (Type<'gcc>, Function<'gcc>) {
     let fn_abi = cx.fn_abi_of_fn_ptr(rust_fn_sig, ty::List::empty());
     let (typ, _, _, _) = fn_abi.gcc_type(cx);
diff --git a/test.sh b/test.sh
index 5604fd4ff94b..25f5a3a419ef 100755
--- a/test.sh
+++ b/test.sh
@@ -191,11 +191,11 @@ function std_tests() {
     $RUN_WRAPPER ./target/out/std_example --target $TARGET_TRIPLE
 
     echo "[AOT] subslice-patterns-const-eval"
-    $RUSTC example/subslice-patterns-const-eval.rs --crate-type bin --target $TARGET_TRIPLE
+    $RUSTC example/subslice-patterns-const-eval.rs --crate-type bin $TEST_FLAGS --target $TARGET_TRIPLE
     $RUN_WRAPPER ./target/out/subslice-patterns-const-eval
 
     echo "[AOT] track-caller-attribute"
-    $RUSTC example/track-caller-attribute.rs --crate-type bin --target $TARGET_TRIPLE
+    $RUSTC example/track-caller-attribute.rs --crate-type bin $TEST_FLAGS --target $TARGET_TRIPLE
     $RUN_WRAPPER ./target/out/track-caller-attribute
 
     echo "[BUILD] mod_bench"
@@ -338,10 +338,9 @@ function test_rustc() {
 
     git checkout -- src/test/ui/issues/auxiliary/issue-3136-a.rs # contains //~ERROR, but shouldn't be removed
 
-    rm -r src/test/ui/{abi*,extern/,panic-runtime/,panics/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,chalkify/bugs/,test*,*lto*.rs,consts/const-float-bits-reject-conv.rs,consts/issue-miri-1910.rs} || true
+    rm -r src/test/ui/{abi*,extern/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,chalkify/bugs/,test*,*lto*.rs,consts/const-float-bits-reject-conv.rs,consts/issue-miri-1910.rs} || true
     rm src/test/ui/mir/mir_heavy_promoted.rs # this tests is oom-killed in the CI.
-    # TODO: re-enable panics tests.
-    for test in $(rg --files-with-matches "catch_unwind|should_panic|thread|lto" src/test/ui); do
+    for test in $(rg --files-with-matches "thread|lto" src/test/ui); do
       rm $test
     done
     git checkout src/test/ui/lto/auxiliary/dylib.rs

From 2bf7fb402b88b0345847db65c0857f2d81ea54db Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Jan 2023 17:12:08 -0500
Subject: [PATCH 215/997] Use gccjit from repo

---
 Cargo.lock | 2 ++
 Cargo.toml | 4 ++--
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index e52e742ec6ce..e20980caee16 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,6 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
+source = "git+https://github.com/antoyo/gccjit.rs#1e6ecc67fe73ac995e511516eacf4fe3aec8974e"
 dependencies = [
  "gccjit_sys",
 ]
@@ -48,6 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
+source = "git+https://github.com/antoyo/gccjit.rs#1e6ecc67fe73ac995e511516eacf4fe3aec8974e"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 26a0e92923d5..3ac354ea4942 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,10 +22,10 @@ default = ["master"]
 master = ["gccjit/master"]
 
 [dependencies]
-#gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
+gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
 
 # Local copy.
-gccjit = { path = "../gccjit.rs" }
+#gccjit = { path = "../gccjit.rs" }
 
 smallvec = { version = "1.6.1", features = ["union", "may_dangle"] }
 target-lexicon = "0.10.0"

From f1f136bb661725dbf283280a793410b7abe2ad73 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Jan 2023 17:27:28 -0500
Subject: [PATCH 216/997] Fix tests

---
 tests/lang_tests_common.rs |  1 -
 tests/run/int.rs           | 16 +++-------------
 2 files changed, 3 insertions(+), 14 deletions(-)

diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index 8e378177e245..53d3266776d0 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -46,7 +46,6 @@ pub fn main_inner(profile: Profile) {
                 &format!("-Zcodegen-backend={}/target/debug/librustc_codegen_gcc.so", current_dir),
                 "--sysroot", &format!("{}/build_sysroot/sysroot/", current_dir),
                 "-Zno-parallel-llvm",
-                "-C", "panic=abort",
                 "-C", "link-arg=-lc",
                 "-o", exe.to_str().expect("to_str"),
                 path.to_str().expect("to_str"),
diff --git a/tests/run/int.rs b/tests/run/int.rs
index 2b90e4ae8d82..5693b6a215a6 100644
--- a/tests/run/int.rs
+++ b/tests/run/int.rs
@@ -3,22 +3,14 @@
 // Run-time:
 //   status: 0
 
-#![feature(bench_black_box, const_black_box, core_intrinsics, start)]
-
-#![no_std]
-
-#[panic_handler]
-fn panic_handler(_: &core::panic::PanicInfo) -> ! {
-    core::intrinsics::abort();
-}
+#![feature(bench_black_box, const_black_box)]
 
 /*
  * Code
  */
 
-#[start]
-fn main(_argc: isize, _argv: *const *const u8) -> isize {
-    use core::hint::black_box;
+fn main() {
+    use std::hint::black_box;
 
     macro_rules! check {
         ($ty:ty, $expr:expr) => {
@@ -335,6 +327,4 @@ fn main(_argc: isize, _argv: *const *const u8) -> isize {
         const VAL5: T = 73236519889708027473620326106273939584_i128;
         check_ops128!();
     }
-
-    0
 }

From 4b628e5334fdfab981dc29862d3a806482b493df Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Jan 2023 17:42:35 -0500
Subject: [PATCH 217/997] Fix tests

---
 .github/workflows/ci.yml   | 2 +-
 tests/lang_tests_common.rs | 5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 1c99e5e2bc28..927eb3077616 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -121,7 +121,7 @@ jobs:
       run: |
         ./prepare_build.sh
         ${{ matrix.libgccjit_version.env_extra }} ./build.sh ${{ matrix.libgccjit_version.extra }}
-        cargo test ${{ matrix.libgccjit_version.extra }}
+        ${{ matrix.libgccjit_version.env_extra }} cargo test ${{ matrix.libgccjit_version.extra }}
         ./clean_all.sh
 
     - name: Prepare dependencies
diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index 53d3266776d0..06de26f7efc9 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -50,6 +50,11 @@ pub fn main_inner(profile: Profile) {
                 "-o", exe.to_str().expect("to_str"),
                 path.to_str().expect("to_str"),
             ]);
+            if let Some(flags) = option_env!("TEST_FLAGS") {
+                for flag in flags.split_whitespace() {
+                    compiler.arg(&flag);
+                }
+            }
             match profile {
                 Profile::Debug => {}
                 Profile::Release => {

From e87b01447f05fdee6846a21520d5f7b059d39604 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Jan 2023 18:08:50 -0500
Subject: [PATCH 218/997] Add missing failing tests

---
 failing-ui-tests.txt | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 6182353599b2..1ba38498a75b 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -41,3 +41,18 @@ src/test/ui/sse2.rs
 src/test/ui/statics/issue-91050-1.rs
 src/test/ui/statics/issue-91050-2.rs
 src/test/ui/target-feature/missing-plusminus.rs
+src/test/ui/asm/x86_64/may_unwind.rs
+src/test/ui/backtrace.rs
+src/test/ui/catch-unwind-bang.rs
+src/test/ui/cfg/cfg-panic-abort.rs
+src/test/ui/drop/dynamic-drop-async.rs
+src/test/ui/drop/repeat-drop.rs
+src/test/ui/fmt/format-args-capture.rs
+src/test/ui/generator/panic-drops-resume.rs
+src/test/ui/generator/panic-drops.rs
+src/test/ui/generator/panic-safe.rs
+src/test/ui/intrinsics/panic-uninitialized-zeroed.rs#mir
+src/test/ui/intrinsics/panic-uninitialized-zeroed.rs#strict
+src/test/ui/intrinsics/panic-uninitialized-zeroed.rs#thir
+src/test/ui/issues/issue-14875.rs
+src/test/ui/issues/issue-29948.rs

From 5f8cdd2d3646da3a36e5794abbbe440f460034dc Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Jan 2023 18:27:16 -0500
Subject: [PATCH 219/997] Fix tests

---
 failing-ui-tests.txt | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 1ba38498a75b..13351fd0e7eb 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -51,8 +51,6 @@ src/test/ui/fmt/format-args-capture.rs
 src/test/ui/generator/panic-drops-resume.rs
 src/test/ui/generator/panic-drops.rs
 src/test/ui/generator/panic-safe.rs
-src/test/ui/intrinsics/panic-uninitialized-zeroed.rs#mir
-src/test/ui/intrinsics/panic-uninitialized-zeroed.rs#strict
-src/test/ui/intrinsics/panic-uninitialized-zeroed.rs#thir
+src/test/ui/intrinsics/panic-uninitialized-zeroed.rs
 src/test/ui/issues/issue-14875.rs
 src/test/ui/issues/issue-29948.rs

From ea75295180aeb8265bf5c5317206abc4c21ea33f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Jan 2023 19:30:28 -0500
Subject: [PATCH 220/997] Fix tests

---
 failing-ui-tests.txt | 13 +++++++++++++
 test.sh              |  2 +-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 13351fd0e7eb..2629144f1674 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -54,3 +54,16 @@ src/test/ui/generator/panic-safe.rs
 src/test/ui/intrinsics/panic-uninitialized-zeroed.rs
 src/test/ui/issues/issue-14875.rs
 src/test/ui/issues/issue-29948.rs
+src/test/ui/issues/issue-43853.rs
+src/test/ui/iterators/iter-sum-overflow-debug.rs
+src/test/ui/iterators/iter-sum-overflow-overflow-checks.rs
+src/test/ui/mir/mir_calls_to_shims.rs
+src/test/ui/mir/mir_drop_order.rs
+src/test/ui/mir/mir_let_chains_drop_order.rs
+src/test/ui/oom_unwind.rs
+src/test/ui/panic-runtime/abort-link-to-unwinding-crates.rs
+src/test/ui/panic-runtime/abort.rs
+src/test/ui/panic-runtime/link-to-abort.rs
+src/test/ui/rfc-2091-track-caller/std-panic-locations.rs
+src/test/ui/rfcs/rfc1857-drop-order.rs
+src/test/ui/unwind-no-uwtable.rs
diff --git a/test.sh b/test.sh
index 25f5a3a419ef..4c490f04ae9d 100755
--- a/test.sh
+++ b/test.sh
@@ -348,7 +348,7 @@ function test_rustc() {
     git checkout src/test/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
     git checkout src/test/ui/macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs
 
-    RUSTC_ARGS="-Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot"
+    RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot"
 
     if [ $# -eq 0 ]; then
         # No argument supplied to the function. Doing nothing.

From 246ba9b39394054751f29e92128706aa73775719 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Jan 2023 22:19:10 -0500
Subject: [PATCH 221/997] Add missing libgccjit 12 failing tests

---
 failing-ui-tests12.txt | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 32feb2c886b2..e52248b1d0b7 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -22,3 +22,12 @@ src/test/ui/simd/intrinsic/inlining-issue67557.rs
 src/test/ui/simd/monomorphize-shuffle-index.rs
 src/test/ui/simd/shuffle.rs
 src/test/ui/simd/simd-bitmask.rs
+src/test/ui/binding/fn-arg-incomplete-pattern-drop-order.rs
+src/test/ui/drop/dynamic-drop.rs
+src/test/ui/generator/resume-after-return.rs
+src/test/ui/iterators/iter-step-overflow-debug.rs
+src/test/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs
+src/test/ui/numbers-arithmetic/next-power-of-two-overflow-debug.rs
+src/test/ui/panic-while-printing.rs
+src/test/ui/privacy/reachable-unnameable-items.rs
+src/test/ui/rfc-1937-termination-trait/termination-trait-in-test.rs

From 8e77fbf0cce0fbbc780819ad81459bba2e0ba0c0 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 10 Jan 2023 18:38:50 -0500
Subject: [PATCH 222/997] Fix LLVM builtin mapping

---
 src/intrinsic/llvm.rs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 4552ab95e537..ee0ea6e993f9 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -705,9 +705,9 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.aesni.aesenclast.512" => "__builtin_ia32_vaesenclast_v64qi",
         "llvm.x86.aesni.aesdec.512" => "__builtin_ia32_vaesdec_v64qi",
         "llvm.x86.aesni.aesdeclast.512" => "__builtin_ia32_vaesdeclast_v64qi",
-        "llvm.x86.avx512bf16.cvtne2ps2bf16.128" => "__builtin_ia32_cvtne2ps2bf16_v8hi",
-        "llvm.x86.avx512bf16.cvtne2ps2bf16.256" => "__builtin_ia32_cvtne2ps2bf16_v16hi",
-        "llvm.x86.avx512bf16.cvtne2ps2bf16.512" => "__builtin_ia32_cvtne2ps2bf16_v32hi",
+        "llvm.x86.avx512bf16.cvtne2ps2bf16.128" => "__builtin_ia32_cvtne2ps2bf16_v8bf",
+        "llvm.x86.avx512bf16.cvtne2ps2bf16.256" => "__builtin_ia32_cvtne2ps2bf16_v16bf",
+        "llvm.x86.avx512bf16.cvtne2ps2bf16.512" => "__builtin_ia32_cvtne2ps2bf16_v32bf",
         "llvm.x86.avx512bf16.cvtneps2bf16.256" => "__builtin_ia32_cvtneps2bf16_v8sf",
         "llvm.x86.avx512bf16.cvtneps2bf16.512" => "__builtin_ia32_cvtneps2bf16_v16sf",
         "llvm.x86.avx512bf16.dpbf16ps.128" => "__builtin_ia32_dpbf16ps_v4sf",

From 7fa06f6b882bd0ee9366f31ccf4ae948a16494f9 Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Tue, 13 Dec 2022 17:26:17 +0100
Subject: [PATCH 223/997] Avoid a hir access inside get_static

---
 src/consts.rs | 133 ++++++++++++++++++++------------------------------
 1 file changed, 53 insertions(+), 80 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index 9307d280f61c..d70c9076897b 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -2,9 +2,7 @@
 use gccjit::FnAttribute;
 use gccjit::{Function, GlobalKind, LValue, RValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{BaseTypeMethods, ConstMethods, DerivedTypeMethods, StaticMethods};
-use rustc_hir as hir;
-use rustc_hir::Node;
-use rustc_middle::{bug, span_bug};
+use rustc_middle::span_bug;
 use rustc_middle::middle::codegen_fn_attrs::{CodegenFnAttrFlags, CodegenFnAttrs};
 use rustc_middle::mir::mono::MonoItem;
 use rustc_middle::ty::{self, Instance, Ty};
@@ -217,84 +215,59 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let ty = instance.ty(self.tcx, ty::ParamEnv::reveal_all());
         let sym = self.tcx.symbol_name(instance).name;
 
-        let global =
-            if let Some(def_id) = def_id.as_local() {
-                let id = self.tcx.hir().local_def_id_to_hir_id(def_id);
-                let llty = self.layout_of(ty).gcc_type(self);
-                // FIXME: refactor this to work without accessing the HIR
-                let global = match self.tcx.hir().get(id) {
-                    Node::Item(&hir::Item { span, kind: hir::ItemKind::Static(..), .. }) => {
-                        if let Some(global) = self.get_declared_value(&sym) {
-                            if self.val_ty(global) != self.type_ptr_to(llty) {
-                                span_bug!(span, "Conflicting types for static");
-                            }
-                        }
-
-                        let is_tls = fn_attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-                        let global = self.declare_global(
-                            &sym,
-                            llty,
-                            GlobalKind::Exported,
-                            is_tls,
-                            fn_attrs.link_section,
-                        );
-
-                        if !self.tcx.is_reachable_non_generic(def_id) {
-                            // TODO(antoyo): set visibility.
-                        }
-
-                        global
-                    }
-
-                    Node::ForeignItem(&hir::ForeignItem {
-                        span,
-                        kind: hir::ForeignItemKind::Static(..),
-                        ..
-                    }) => {
-                        let fn_attrs = self.tcx.codegen_fn_attrs(def_id);
-                        check_and_apply_linkage(&self, &fn_attrs, ty, sym, span)
-                    }
-
-                    item => bug!("get_static: expected static, found {:?}", item),
-                };
-
-                global
-            }
-            else {
-                // FIXME(nagisa): perhaps the map of externs could be offloaded to llvm somehow?
-                //debug!("get_static: sym={} item_attr={:?}", sym, self.tcx.item_attrs(def_id));
-
-                let attrs = self.tcx.codegen_fn_attrs(def_id);
-                let span = self.tcx.def_span(def_id);
-                let global = check_and_apply_linkage(&self, &attrs, ty, sym, span);
-
-                let needs_dll_storage_attr = false; // TODO(antoyo)
-
-                // If this assertion triggers, there's something wrong with commandline
-                // argument validation.
-                debug_assert!(
-                    !(self.tcx.sess.opts.cg.linker_plugin_lto.enabled()
-                        && self.tcx.sess.target.options.is_like_msvc
-                        && self.tcx.sess.opts.cg.prefer_dynamic)
-                );
-
-                if needs_dll_storage_attr {
-                    // This item is external but not foreign, i.e., it originates from an external Rust
-                    // crate. Since we don't know whether this crate will be linked dynamically or
-                    // statically in the final application, we always mark such symbols as 'dllimport'.
-                    // If final linkage happens to be static, we rely on compiler-emitted __imp_ stubs
-                    // to make things work.
-                    //
-                    // However, in some scenarios we defer emission of statics to downstream
-                    // crates, so there are cases where a static with an upstream DefId
-                    // is actually present in the current crate. We can find out via the
-                    // is_codegened_item query.
-                    if !self.tcx.is_codegened_item(def_id) {
-                        unimplemented!();
-                    }
+        let global = if def_id.is_local() && !self.tcx.is_foreign_item(def_id) {
+            let llty = self.layout_of(ty).gcc_type(self);
+            if let Some(global) = self.get_declared_value(sym) {
+                if self.val_ty(global) != self.type_ptr_to(llty) {
+                    span_bug!(self.tcx.def_span(def_id), "Conflicting types for static");
                 }
-                global
-            };
+            }
+
+            let is_tls = fn_attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
+            let global = self.declare_global(
+                &sym,
+                llty,
+                GlobalKind::Exported,
+                is_tls,
+                fn_attrs.link_section,
+            );
+
+            if !self.tcx.is_reachable_non_generic(def_id) {
+                // TODO(antoyo): set visibility.
+            }
+
+            global
+        } else {
+            check_and_apply_linkage(&self, &fn_attrs, ty, sym, self.tcx.def_span(def_id))
+        };
+
+        if !def_id.is_local() {
+            let needs_dll_storage_attr = false; // TODO(antoyo)
+
+            // If this assertion triggers, there's something wrong with commandline
+            // argument validation.
+            debug_assert!(
+                !(self.tcx.sess.opts.cg.linker_plugin_lto.enabled()
+                    && self.tcx.sess.target.options.is_like_msvc
+                    && self.tcx.sess.opts.cg.prefer_dynamic)
+            );
+
+            if needs_dll_storage_attr {
+                // This item is external but not foreign, i.e., it originates from an external Rust
+                // crate. Since we don't know whether this crate will be linked dynamically or
+                // statically in the final application, we always mark such symbols as 'dllimport'.
+                // If final linkage happens to be static, we rely on compiler-emitted __imp_ stubs
+                // to make things work.
+                //
+                // However, in some scenarios we defer emission of statics to downstream
+                // crates, so there are cases where a static with an upstream DefId
+                // is actually present in the current crate. We can find out via the
+                // is_codegened_item query.
+                if !self.tcx.is_codegened_item(def_id) {
+                    unimplemented!();
+                }
+            }
+        }
 
         // TODO(antoyo): set dll storage class.
 

From f5ced68a6688016e06464cf6dc942e5bf8f4620b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 22 Jan 2023 20:16:46 -0500
Subject: [PATCH 224/997] Adjust failing tests

---
 failing-ui-tests.txt   | 17 -----------------
 failing-ui-tests12.txt |  7 +++++++
 2 files changed, 7 insertions(+), 17 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 2629144f1674..f3784e65ce90 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -9,22 +9,14 @@ src/test/ui/allocator/xcrate-use.rs
 src/test/ui/allocator/xcrate-use2.rs
 src/test/ui/asm/may_unwind.rs
 src/test/ui/asm/x86_64/multiple-clobber-abi.rs
-src/test/ui/async-await/async-fn-size-moved-locals.rs
-src/test/ui/async-await/async-fn-size-uninit-locals.rs
-src/test/ui/cfg/cfg-panic.rs
 src/test/ui/debuginfo/debuginfo-emit-llvm-ir-and-split-debuginfo.rs
 src/test/ui/functions-closures/parallel-codegen-closures.rs
-src/test/ui/generator/size-moved-locals.rs
-src/test/ui/issues/issue-40883.rs
-src/test/ui/issues/issue-47364.rs
 src/test/ui/linkage-attr/linkage1.rs
 src/test/ui/lto/dylib-works.rs
-src/test/ui/macros/rfc-2011-nicer-assert-messages/all-not-available-cases.rs
 src/test/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
 src/test/ui/numbers-arithmetic/saturating-float-casts.rs
 src/test/ui/polymorphization/promoted-function.rs
 src/test/ui/process/nofile-limit.rs
-src/test/ui/runtime/rt-explody-panic-payloads.rs
 src/test/ui/sepcomp/sepcomp-cci.rs
 src/test/ui/sepcomp/sepcomp-extern.rs
 src/test/ui/sepcomp/sepcomp-fns-backwards.rs
@@ -32,14 +24,8 @@ src/test/ui/sepcomp/sepcomp-fns.rs
 src/test/ui/sepcomp/sepcomp-statics.rs
 src/test/ui/simd/intrinsic/generic-arithmetic-pass.rs
 src/test/ui/simd/intrinsic/generic-gather-pass.rs
-src/test/ui/simd/issue-17170.rs
-src/test/ui/simd/issue-39720.rs
-src/test/ui/simd/issue-85915-simd-ptrs.rs
-src/test/ui/simd/issue-89193.rs
 src/test/ui/simd/type-generic-monomorphisation-extern-nonnull-ptr.rs
 src/test/ui/sse2.rs
-src/test/ui/statics/issue-91050-1.rs
-src/test/ui/statics/issue-91050-2.rs
 src/test/ui/target-feature/missing-plusminus.rs
 src/test/ui/asm/x86_64/may_unwind.rs
 src/test/ui/backtrace.rs
@@ -52,9 +38,6 @@ src/test/ui/generator/panic-drops-resume.rs
 src/test/ui/generator/panic-drops.rs
 src/test/ui/generator/panic-safe.rs
 src/test/ui/intrinsics/panic-uninitialized-zeroed.rs
-src/test/ui/issues/issue-14875.rs
-src/test/ui/issues/issue-29948.rs
-src/test/ui/issues/issue-43853.rs
 src/test/ui/iterators/iter-sum-overflow-debug.rs
 src/test/ui/iterators/iter-sum-overflow-overflow-checks.rs
 src/test/ui/mir/mir_calls_to_shims.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index e52248b1d0b7..64c8bcdf5c2c 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -31,3 +31,10 @@ src/test/ui/numbers-arithmetic/next-power-of-two-overflow-debug.rs
 src/test/ui/panic-while-printing.rs
 src/test/ui/privacy/reachable-unnameable-items.rs
 src/test/ui/rfc-1937-termination-trait/termination-trait-in-test.rs
+src/test/ui/async-await/async-fn-size-moved-locals.rs
+src/test/ui/async-await/async-fn-size-uninit-locals.rs
+src/test/ui/cfg/cfg-panic.rs
+src/test/ui/generator/size-moved-locals.rs
+src/test/ui/macros/rfc-2011-nicer-assert-messages/all-not-available-cases.rs
+src/test/ui/runtime/rt-explody-panic-payloads.rs
+src/test/ui/simd/issue-17170.rs

From fa6ae3c8bbf8ae2351e548c09fb39745207e1e43 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 22 Jan 2023 20:22:09 -0500
Subject: [PATCH 225/997] Cleanup

---
 Readme.md              |  4 ++--
 failing-ui-tests.txt   | 15 +++++++++++++--
 failing-ui-tests12.txt |  1 -
 src/builder.rs         |  7 +++----
 src/callee.rs          |  2 +-
 src/context.rs         |  2 +-
 src/intrinsic/mod.rs   |  4 +---
 7 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/Readme.md b/Readme.md
index 3201afbd7820..b473f79a526b 100644
--- a/Readme.md
+++ b/Readme.md
@@ -172,7 +172,7 @@ debug_gimple_stmt(gimple_struct)
 
 To get the `rustc` command to run in `gdb`, add the `--verbose` flag to `cargo build`.
 
-To have the correct file paths in `gdb` instead of `/usr/src/debug/gcc/libstdc++-v3/libsupc++/eh_personality.cc`, TODO
+To have the correct file paths in `gdb` instead of `/usr/src/debug/gcc/libstdc++-v3/libsupc++/eh_personality.cc`:
 
 Maybe by calling the following at the beginning of gdb:
 
@@ -180,7 +180,7 @@ Maybe by calling the following at the beginning of gdb:
 set substitute-path /usr/src/debug/gcc /path/to/gcc-repo/gcc
 ```
 
-TODO: but that's not what I remember I was doing.
+TODO(antoyo): but that's not what I remember I was doing.
 
 ### How to use a custom-build rustc
 
diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index f3784e65ce90..a51a7f1428e3 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -13,7 +13,6 @@ src/test/ui/debuginfo/debuginfo-emit-llvm-ir-and-split-debuginfo.rs
 src/test/ui/functions-closures/parallel-codegen-closures.rs
 src/test/ui/linkage-attr/linkage1.rs
 src/test/ui/lto/dylib-works.rs
-src/test/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
 src/test/ui/numbers-arithmetic/saturating-float-casts.rs
 src/test/ui/polymorphization/promoted-function.rs
 src/test/ui/process/nofile-limit.rs
@@ -47,6 +46,18 @@ src/test/ui/oom_unwind.rs
 src/test/ui/panic-runtime/abort-link-to-unwinding-crates.rs
 src/test/ui/panic-runtime/abort.rs
 src/test/ui/panic-runtime/link-to-abort.rs
+src/test/ui/unwind-no-uwtable.rs
+src/test/ui/issues/issue-14875.rs
+src/test/ui/issues/issue-29948.rs
+src/test/ui/issues/issue-40883.rs
+src/test/ui/issues/issue-43853.rs
+src/test/ui/issues/issue-47364.rs
+src/test/ui/simd/issue-17170.rs
+src/test/ui/simd/issue-39720.rs
+src/test/ui/simd/issue-85915-simd-ptrs.rs
+src/test/ui/simd/issue-89193.rs
+src/test/ui/statics/issue-91050-1.rs
+src/test/ui/statics/issue-91050-2.rs
+src/test/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
 src/test/ui/rfc-2091-track-caller/std-panic-locations.rs
 src/test/ui/rfcs/rfc1857-drop-order.rs
-src/test/ui/unwind-no-uwtable.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 64c8bcdf5c2c..22441efeee9f 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -37,4 +37,3 @@ src/test/ui/cfg/cfg-panic.rs
 src/test/ui/generator/size-moved-locals.rs
 src/test/ui/macros/rfc-2011-nicer-assert-messages/all-not-available-cases.rs
 src/test/ui/runtime/rt-explody-panic-payloads.rs
-src/test/ui/simd/issue-17170.rs
diff --git a/src/builder.rs b/src/builder.rs
index 0150f5ba8c14..6ac1daeca5d9 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -375,8 +375,7 @@ impl<'tcx> FnAbiOfHelpers<'tcx> for Builder<'_, '_, 'tcx> {
 impl<'a, 'gcc, 'tcx> Deref for Builder<'a, 'gcc, 'tcx> {
     type Target = CodegenCx<'gcc, 'tcx>;
 
-    fn deref<'b>(&'b self) -> &'a Self::Target
-    {
+    fn deref<'b>(&'b self) -> &'a Self::Target {
         self.cx
     }
 }
@@ -1216,7 +1215,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let value = self.current_func().new_local(None, struct_type.as_type(), "landing_pad");
         let ptr = self.cx.context.new_cast(None, ptr, field1_type);
         self.block.add_assignment(None, value.access_field(None, field1), ptr);
-        self.block.add_assignment(None, value.access_field(None, field2), zero); // TODO: set the proper value here (the type of exception?).
+        self.block.add_assignment(None, value.access_field(None, field2), zero); // TODO(antoyo): set the proper value here (the type of exception?).
 
         value.to_rvalue()
     }
@@ -1232,7 +1231,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     #[cfg(feature="master")]
     fn resume(&mut self, exn: RValue<'gcc>) {
-        // TODO: check if this is normal that we need to dereference the value.
+        // TODO(antoyo): check if this is normal that we need to dereference the value.
         // NOTE: the type is wrong, so in order to get a pointer for parameter, cast it to a
         // pointer of pointer that is later dereferenced.
         let exn_type = exn.get_type().make_pointer();
diff --git a/src/callee.rs b/src/callee.rs
index 70cdece7f0af..bc68340e7a07 100644
--- a/src/callee.rs
+++ b/src/callee.rs
@@ -30,7 +30,7 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
 
     let func =
         if let Some(_func) = cx.get_declared_value(&sym) {
-            // FIXME: we never reach this because get_declared_value only returns global variables
+            // FIXME(antoyo): we never reach this because get_declared_value only returns global variables
             // and here we try to get a function.
             unreachable!();
             /*
diff --git a/src/context.rs b/src/context.rs
index a66e13b6008a..07222c534401 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -258,7 +258,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
     pub fn rvalue_as_function(&self, value: RValue<'gcc>) -> Function<'gcc> {
         let function: Function<'gcc> = unsafe { std::mem::transmute(value) };
-        // FIXME: seems like self.functions get overwritten for rust_eh_personality.
         debug_assert!(self.functions.borrow().values().find(|value| **value == function).is_some(),
             "{:?} is not a function", function);
         function
@@ -334,6 +333,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn get_fn(&self, instance: Instance<'tcx>) -> RValue<'gcc> {
         let func = get_fn(self, instance);
         *self.current_func.borrow_mut() = Some(func);
+        // FIXME(antoyo): this is a wrong cast. That requires changing the compiler API.
         unsafe { std::mem::transmute(func) }
     }
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 46471096e910..6ca171801159 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1158,8 +1158,6 @@ fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(bx: &'b mut Builder<'a, 'gcc, 'tcx>, try_fu
 // the right personality function.
 #[cfg(feature="master")]
 fn codegen_gnu_try<'gcc>(bx: &mut Builder<'_, 'gcc, '_>, try_func: RValue<'gcc>, data: RValue<'gcc>, catch_func: RValue<'gcc>, dest: RValue<'gcc>) {
-    //use std::ops::Deref;
-    //let cx: &CodegenCx<'gcc, '_> = bx.deref();
     let cx: &CodegenCx<'gcc, '_> = bx.cx;
     let (llty, func) = get_rust_try_fn(cx, &mut |mut bx| {
         // Codegens the shims described above:
@@ -1204,7 +1202,7 @@ fn codegen_gnu_try<'gcc>(bx: &mut Builder<'_, 'gcc, '_>, try_func: RValue<'gcc>,
 
         // NOTE: the blocks must be filled before adding the try/catch, otherwise gcc will not
         // generate a try/catch.
-        // FIXME: add a check in the libgccjit API to prevent this.
+        // FIXME(antoyo): add a check in the libgccjit API to prevent this.
         bx.switch_to_block(current_block);
         bx.invoke(try_func_ty, try_func, &[data], then, catch, None);
     });

From 41f5e701e69a164acae301574938c30e2fd605a5 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 22 Jan 2023 21:22:49 -0500
Subject: [PATCH 226/997] Fix signed integer overflow

---
 .github/workflows/release.yml | 3 ++-
 src/base.rs                   | 2 ++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 2e81442298c6..c60c96d2023e 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -104,7 +104,8 @@ jobs:
 
     - name: Run tests
       run: |
-        ./test.sh --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests # --test-libcore # FIXME(antoyo): libcore tests fail.
+        ./test.sh --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore
+        # TODO(antoyo): also run the rustc's test suite.
 
     - name: Run stdarch tests
       run: |
diff --git a/src/base.rs b/src/base.rs
index ea933c25b2f3..6102016b4345 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -124,6 +124,8 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
         context.add_command_line_option("-fno-semantic-interposition");
         // NOTE: Rust relies on LLVM not doing TBAA (https://github.com/rust-lang/unsafe-code-guidelines/issues/292).
         context.add_command_line_option("-fno-strict-aliasing");
+        // NOTE: Rust relies on LLVM doing wrapping on overflow.
+        context.add_command_line_option("-fwrapv");
 
         if tcx.sess.opts.unstable_opts.function_sections.unwrap_or(tcx.sess.target.function_sections) {
             context.add_command_line_option("-ffunction-sections");

From 2dc7dbc01219ac2d8a7543af7fa5ff7026786569 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 26 Jan 2023 17:31:49 -0500
Subject: [PATCH 227/997] Run rustc's testsuite in release mode

---
 .github/workflows/release.yml |  12 ++--
 .github/workflows/stdarch.yml | 116 ++++++++++++++++++++++++++++++++++
 2 files changed, 121 insertions(+), 7 deletions(-)
 create mode 100644 .github/workflows/stdarch.yml

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index c60c96d2023e..c4e99469bc20 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -20,6 +20,10 @@ jobs:
       matrix:
         libgccjit_version:
           - { gcc: "libgccjit.so", artifacts_branch: "master" }
+        commands: [
+          "--test-successful-rustc --nb-parts 2 --current-part 0",
+          "--test-successful-rustc --nb-parts 2 --current-part 1",
+        ]
 
     steps:
     - uses: actions/checkout@v3
@@ -104,10 +108,4 @@ jobs:
 
     - name: Run tests
       run: |
-        ./test.sh --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore
-        # TODO(antoyo): also run the rustc's test suite.
-
-    - name: Run stdarch tests
-      run: |
-        cd build_sysroot/sysroot_src/library/stdarch/
-        CHANNEL=release TARGET=x86_64-unknown-linux-gnu ../../../../cargo.sh test
+        ./test.sh --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }}
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
new file mode 100644
index 000000000000..42fb35e738ff
--- /dev/null
+++ b/.github/workflows/stdarch.yml
@@ -0,0 +1,116 @@
+name: stdarch tests with sysroot compiled in release mode
+
+on:
+  - push
+  - pull_request
+
+permissions:
+  contents: read
+
+env:
+  # Enable backtraces for easier debugging
+  RUST_BACKTRACE: 1
+
+jobs:
+  build:
+    runs-on: ubuntu-latest
+
+    strategy:
+      fail-fast: false
+      matrix:
+        libgccjit_version:
+          - { gcc: "libgccjit.so", artifacts_branch: "master" }
+        commands: [
+          "--test-successful-rustc --nb-parts 2 --current-part 0",
+          "--test-successful-rustc --nb-parts 2 --current-part 1",
+        ]
+
+    steps:
+    - uses: actions/checkout@v3
+
+    - uses: actions/checkout@v3
+      with:
+        repository: llvm/llvm-project
+        path: llvm
+
+    - name: Install packages
+      run: sudo apt-get install ninja-build ripgrep
+
+    - name: Download artifact
+      uses: dawidd6/action-download-artifact@v2
+      with:
+          workflow: main.yml
+          name: ${{ matrix.libgccjit_version.gcc }}
+          path: gcc-build
+          repo: antoyo/gcc
+          branch: ${{ matrix.libgccjit_version.artifacts_branch }}
+          event: push
+          search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
+
+    - name: Setup path to libgccjit
+      run: |
+          echo $(readlink -f gcc-build) > gcc_path
+          # NOTE: the filename is still libgccjit.so even when the artifact name is different.
+          ln gcc-build/libgccjit.so gcc-build/libgccjit.so.0
+
+    - name: Set env
+      run: |
+        echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
+        echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
+        echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+
+    - name: Set RUST_COMPILER_RT_ROOT
+      run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
+
+    - name: Cache cargo installed crates
+      uses: actions/cache@v3
+      with:
+        path: ~/.cargo/bin
+        key: cargo-installed-crates2-ubuntu-latest
+
+    - name: Cache cargo registry
+      uses: actions/cache@v3
+      with:
+        path: ~/.cargo/registry
+        key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
+
+    - name: Cache cargo index
+      uses: actions/cache@v3
+      with:
+        path: ~/.cargo/git
+        key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
+
+    - name: Cache cargo target dir
+      uses: actions/cache@v3
+      with:
+        path: target
+        key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
+
+    - name: Build
+      run: |
+        ./prepare_build.sh
+        ./build.sh --release --release-sysroot
+        cargo test
+        ./clean_all.sh
+
+    - name: Prepare dependencies
+      run: |
+        git config --global user.email "user@example.com"
+        git config --global user.name "User"
+        ./prepare.sh
+
+    # Compile is a separate step, as the actions-rs/cargo action supports error annotations
+    - name: Compile
+      uses: actions-rs/cargo@v1.0.3
+      with:
+        command: build
+        args: --release
+
+    - name: Run tests
+      run: |
+        ./test.sh --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore
+
+    - name: Run stdarch tests
+      run: |
+        cd build_sysroot/sysroot_src/library/stdarch/
+        CHANNEL=release TARGET=x86_64-unknown-linux-gnu ../../../../cargo.sh test

From 0898eab220ab0447a578ebaa3b5f08eabf480201 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 25 Feb 2023 17:24:16 -0500
Subject: [PATCH 228/997] Implement simd_gather

---
 Cargo.lock            |   4 +-
 src/builder.rs        |   2 +-
 src/intrinsic/simd.rs | 151 ++++++++++++++++++++++++++++++++++++++++++
 src/type_of.rs        |   8 +++
 4 files changed, 162 insertions(+), 3 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index e20980caee16..fba8c3db42e4 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -41,7 +41,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#1e6ecc67fe73ac995e511516eacf4fe3aec8974e"
+source = "git+https://github.com/antoyo/gccjit.rs#1bd270d0d130fe31807cfbe509ca095c082e5848"
 dependencies = [
  "gccjit_sys",
 ]
@@ -49,7 +49,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#1e6ecc67fe73ac995e511516eacf4fe3aec8974e"
+source = "git+https://github.com/antoyo/gccjit.rs#1bd270d0d130fe31807cfbe509ca095c082e5848"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/src/builder.rs b/src/builder.rs
index 6ac1daeca5d9..2d7860536c25 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1419,7 +1419,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     #[cfg(feature="master")]
     pub fn shuffle_vector(&mut self, v1: RValue<'gcc>, v2: RValue<'gcc>, mask: RValue<'gcc>) -> RValue<'gcc> {
-        let struct_type = mask.get_type().is_struct().expect("mask of struct type");
+        let struct_type = mask.get_type().is_struct().expect("mask should be of struct type");
 
         // TODO(antoyo): use a recursive unqualified() here.
         let vector_type = v1.get_type().unqualified().dyncast_vector().expect("vector type");
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index a4f35c061f0a..c7dc6860c8a6 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -14,6 +14,7 @@ use rustc_span::{Span, Symbol, sym};
 use rustc_target::abi::Align;
 
 use crate::builder::Builder;
+use crate::context::CodegenCx;
 
 pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>, name: Symbol, callee_ty: Ty<'tcx>, args: &[OperandRef<'tcx, RValue<'gcc>>], ret_ty: Ty<'tcx>, llret_ty: Type<'gcc>, span: Span) -> Result<RValue<'gcc>, ()> {
     // macros for error handling:
@@ -507,6 +508,156 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         return simd_simple_float_intrinsic(name, in_elem, in_ty, in_len, bx, span, args);
     }
 
+    fn vector_ty<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, elem_ty: Ty<'tcx>, vec_len: u64) -> Type<'gcc> {
+        // FIXME: use cx.layout_of(ty).llvm_type() ?
+        let elem_ty = match *elem_ty.kind() {
+            ty::Int(v) => cx.type_int_from_ty(v),
+            ty::Uint(v) => cx.type_uint_from_ty(v),
+            ty::Float(v) => cx.type_float_from_ty(v),
+            _ => unreachable!(),
+        };
+        cx.type_vector(elem_ty, vec_len)
+    }
+
+    if name == sym::simd_gather {
+        // simd_gather(values: <N x T>, pointers: <N x *_ T>,
+        //             mask: <N x i{M}>) -> <N x T>
+        // * N: number of elements in the input vectors
+        // * T: type of the element to load
+        // * M: any integer width is supported, will be truncated to i1
+
+        // All types must be simd vector types
+        require_simd!(in_ty, "first");
+        require_simd!(arg_tys[1], "second");
+        require_simd!(arg_tys[2], "third");
+        require_simd!(ret_ty, "return");
+
+        // Of the same length:
+        let (out_len, _) = arg_tys[1].simd_size_and_type(bx.tcx());
+        let (out_len2, _) = arg_tys[2].simd_size_and_type(bx.tcx());
+        require!(
+            in_len == out_len,
+            "expected {} argument with length {} (same as input type `{}`), \
+            found `{}` with length {}",
+            "second",
+            in_len,
+            in_ty,
+            arg_tys[1],
+            out_len
+        );
+        require!(
+            in_len == out_len2,
+            "expected {} argument with length {} (same as input type `{}`), \
+            found `{}` with length {}",
+            "third",
+            in_len,
+            in_ty,
+            arg_tys[2],
+            out_len2
+        );
+
+        // The return type must match the first argument type
+        require!(ret_ty == in_ty, "expected return type `{}`, found `{}`", in_ty, ret_ty);
+
+        // This counts how many pointers
+        fn ptr_count(t: Ty<'_>) -> usize {
+            match t.kind() {
+                ty::RawPtr(p) => 1 + ptr_count(p.ty),
+                _ => 0,
+            }
+        }
+
+        // Non-ptr type
+        fn non_ptr(t: Ty<'_>) -> Ty<'_> {
+            match t.kind() {
+                ty::RawPtr(p) => non_ptr(p.ty),
+                _ => t,
+            }
+        }
+
+        // The second argument must be a simd vector with an element type that's a pointer
+        // to the element type of the first argument
+        let (_, element_ty0) = arg_tys[0].simd_size_and_type(bx.tcx());
+        let (_, element_ty1) = arg_tys[1].simd_size_and_type(bx.tcx());
+        let (pointer_count, underlying_ty) = match element_ty1.kind() {
+            ty::RawPtr(p) if p.ty == in_elem => (ptr_count(element_ty1), non_ptr(element_ty1)),
+            _ => {
+                require!(
+                    false,
+                    "expected element type `{}` of second argument `{}` \
+                    to be a pointer to the element type `{}` of the first \
+                        argument `{}`, found `{}` != `*_ {}`",
+                        element_ty1,
+                        arg_tys[1],
+                        in_elem,
+                        in_ty,
+                        element_ty1,
+                        in_elem
+                );
+                unreachable!();
+            }
+        };
+        assert!(pointer_count > 0);
+        assert_eq!(pointer_count - 1, ptr_count(element_ty0));
+        assert_eq!(underlying_ty, non_ptr(element_ty0));
+
+        // The element type of the third argument must be a signed integer type of any width:
+        let (_, element_ty2) = arg_tys[2].simd_size_and_type(bx.tcx());
+        match element_ty2.kind() {
+            ty::Int(_) => (),
+            _ => {
+                require!(
+                    false,
+                    "expected element type `{}` of third argument `{}` \
+                    to be a signed integer type",
+                    element_ty2,
+                    arg_tys[2]
+                );
+            }
+        }
+
+        let vector_type =
+            if pointer_count > 1 {
+                bx.context.new_vector_type(bx.usize_type, in_len)
+            }
+            else {
+                vector_ty(bx, underlying_ty, in_len)
+            };
+        let elem_type = vector_type.dyncast_vector().expect("vector type").get_element_type();
+
+        let mut values = vec![];
+        let pointers = args[1].immediate();
+        for i in 0..in_len {
+            let index = bx.context.new_rvalue_from_long(bx.i32_type, i as i64);
+            let int = bx.context.new_vector_access(None, pointers, index).to_rvalue();
+
+            let ptr_type = elem_type.make_pointer();
+
+            let ptr = bx.context.new_bitcast(None, int, ptr_type);
+            let value = ptr.dereference(None).to_rvalue();
+            values.push(value);
+        }
+
+        let vector = bx.context.new_rvalue_from_vector(None, vector_type, &values);
+        let default = args[0].immediate();
+        let mask = args[2].immediate();
+
+        let mut mask_types = vec![];
+        let mut mask_values = vec![];
+        for i in 0..in_len {
+            let index = bx.context.new_rvalue_from_long(bx.i32_type, i as i64);
+            mask_types.push(bx.context.new_field(None, bx.i32_type, "m")); // TODO: choose an integer based on the size of the vector element type.
+            let mask_value = bx.context.new_vector_access(None, mask, index).to_rvalue();
+            let masked = bx.context.new_rvalue_from_int(bx.i32_type, in_len as i32) & mask_value;
+            let value = index + masked;
+            mask_values.push(value);
+        }
+        let mask_type = bx.context.new_struct_type(None, "mask_type", &mask_types);
+        let mask = bx.context.new_struct_constructor(None, mask_type.as_type(), None, &mask_values);
+
+        return Ok(bx.shuffle_vector(default, vector, mask));
+    }
+
     arith_binary! {
         simd_add: Uint, Int => add, Float => fadd;
         simd_sub: Uint, Int => sub, Float => fsub;
diff --git a/src/type_of.rs b/src/type_of.rs
index 29d394dbba4a..09c79b69ce3c 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -55,6 +55,14 @@ fn uncached_gcc_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout
         Abi::Scalar(_) => bug!("handled elsewhere"),
         Abi::Vector { ref element, count } => {
             let element = layout.scalar_gcc_type_at(cx, element, Size::ZERO);
+            let element =
+                // NOTE: gcc doesn't allow pointer types in vectors.
+                if element.get_pointee().is_some() {
+                    cx.usize_type
+                }
+                else {
+                    element
+                };
             return cx.context.new_vector_type(element, count);
         },
         Abi::ScalarPair(..) => {

From df72765646b7d90a8f3e37090d3cb24597896750 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 25 Feb 2023 19:37:51 -0500
Subject: [PATCH 229/997] Implement simd_scatter

---
 src/intrinsic/simd.rs | 176 ++++++++++++++++++++++++++++++++++++------
 1 file changed, 151 insertions(+), 25 deletions(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index c7dc6860c8a6..5ab1f9e4300e 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -519,6 +519,50 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         cx.type_vector(elem_ty, vec_len)
     }
 
+    fn gather<'a, 'gcc, 'tcx>(default: RValue<'gcc>, pointers: RValue<'gcc>, mask: RValue<'gcc>, pointer_count: usize, bx: &mut Builder<'a, 'gcc, 'tcx>, in_len: u64, underlying_ty: Ty<'tcx>, invert: bool) -> RValue<'gcc> {
+        let vector_type =
+            if pointer_count > 1 {
+                bx.context.new_vector_type(bx.usize_type, in_len)
+            }
+            else {
+                vector_ty(bx, underlying_ty, in_len)
+            };
+        let elem_type = vector_type.dyncast_vector().expect("vector type").get_element_type();
+
+        let mut values = vec![];
+        for i in 0..in_len {
+            let index = bx.context.new_rvalue_from_long(bx.i32_type, i as i64);
+            let int = bx.context.new_vector_access(None, pointers, index).to_rvalue();
+
+            let ptr_type = elem_type.make_pointer();
+            let ptr = bx.context.new_bitcast(None, int, ptr_type);
+            let value = ptr.dereference(None).to_rvalue();
+            values.push(value);
+        }
+
+        let vector = bx.context.new_rvalue_from_vector(None, vector_type, &values);
+
+        let mut mask_types = vec![];
+        let mut mask_values = vec![];
+        for i in 0..in_len {
+            let index = bx.context.new_rvalue_from_long(bx.i32_type, i as i64);
+            mask_types.push(bx.context.new_field(None, bx.i32_type, "m")); // TODO: choose an integer based on the size of the vector element type.
+            let mask_value = bx.context.new_vector_access(None, mask, index).to_rvalue();
+            let masked = bx.context.new_rvalue_from_int(bx.i32_type, in_len as i32) & mask_value;
+            let value = index + masked;
+            mask_values.push(value);
+        }
+        let mask_type = bx.context.new_struct_type(None, "mask_type", &mask_types);
+        let mask = bx.context.new_struct_constructor(None, mask_type.as_type(), None, &mask_values);
+
+        if invert {
+            bx.shuffle_vector(vector, default, mask)
+        }
+        else {
+            bx.shuffle_vector(default, vector, mask)
+        }
+    }
+
     if name == sym::simd_gather {
         // simd_gather(values: <N x T>, pointers: <N x *_ T>,
         //             mask: <N x i{M}>) -> <N x T>
@@ -616,6 +660,108 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
             }
         }
 
+        return Ok(gather(args[0].immediate(), args[1].immediate(), args[2].immediate(), pointer_count, bx, in_len, underlying_ty, false));
+    }
+
+    if name == sym::simd_scatter {
+        // simd_scatter(values: <N x T>, pointers: <N x *mut T>,
+        //             mask: <N x i{M}>) -> ()
+        // * N: number of elements in the input vectors
+        // * T: type of the element to load
+        // * M: any integer width is supported, will be truncated to i1
+
+        // All types must be simd vector types
+        require_simd!(in_ty, "first");
+        require_simd!(arg_tys[1], "second");
+        require_simd!(arg_tys[2], "third");
+
+        // Of the same length:
+        let (element_len1, _) = arg_tys[1].simd_size_and_type(bx.tcx());
+        let (element_len2, _) = arg_tys[2].simd_size_and_type(bx.tcx());
+        require!(
+            in_len == element_len1,
+            "expected {} argument with length {} (same as input type `{}`), \
+            found `{}` with length {}",
+            "second",
+            in_len,
+            in_ty,
+            arg_tys[1],
+            element_len1
+        );
+        require!(
+            in_len == element_len2,
+            "expected {} argument with length {} (same as input type `{}`), \
+            found `{}` with length {}",
+            "third",
+            in_len,
+            in_ty,
+            arg_tys[2],
+            element_len2
+        );
+
+        // This counts how many pointers
+        fn ptr_count(t: Ty<'_>) -> usize {
+            match t.kind() {
+                ty::RawPtr(p) => 1 + ptr_count(p.ty),
+                _ => 0,
+            }
+        }
+
+        // Non-ptr type
+        fn non_ptr(t: Ty<'_>) -> Ty<'_> {
+            match t.kind() {
+                ty::RawPtr(p) => non_ptr(p.ty),
+                _ => t,
+            }
+        }
+
+        // The second argument must be a simd vector with an element type that's a pointer
+        // to the element type of the first argument
+        let (_, element_ty0) = arg_tys[0].simd_size_and_type(bx.tcx());
+        let (_, element_ty1) = arg_tys[1].simd_size_and_type(bx.tcx());
+        let (_, element_ty2) = arg_tys[2].simd_size_and_type(bx.tcx());
+        let (pointer_count, underlying_ty) = match element_ty1.kind() {
+            ty::RawPtr(p) if p.ty == in_elem && p.mutbl == hir::Mutability::Mut => {
+                (ptr_count(element_ty1), non_ptr(element_ty1))
+            }
+            _ => {
+                require!(
+                    false,
+                    "expected element type `{}` of second argument `{}` \
+                    to be a pointer to the element type `{}` of the first \
+                        argument `{}`, found `{}` != `*mut {}`",
+                        element_ty1,
+                        arg_tys[1],
+                        in_elem,
+                        in_ty,
+                        element_ty1,
+                        in_elem
+                );
+                unreachable!();
+            }
+        };
+        assert!(pointer_count > 0);
+        assert_eq!(pointer_count - 1, ptr_count(element_ty0));
+        assert_eq!(underlying_ty, non_ptr(element_ty0));
+
+        // The element type of the third argument must be a signed integer type of any width:
+        match element_ty2.kind() {
+            ty::Int(_) => (),
+            _ => {
+                require!(
+                    false,
+                    "expected element type `{}` of third argument `{}` \
+                    be a signed integer type",
+                    element_ty2,
+                    arg_tys[2]
+                );
+            }
+        }
+
+        let result = gather(args[0].immediate(), args[1].immediate(), args[2].immediate(), pointer_count, bx, in_len, underlying_ty, true);
+
+        let pointers = args[1].immediate();
+
         let vector_type =
             if pointer_count > 1 {
                 bx.context.new_vector_type(bx.usize_type, in_len)
@@ -625,37 +771,17 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
             };
         let elem_type = vector_type.dyncast_vector().expect("vector type").get_element_type();
 
-        let mut values = vec![];
-        let pointers = args[1].immediate();
         for i in 0..in_len {
-            let index = bx.context.new_rvalue_from_long(bx.i32_type, i as i64);
+            let index = bx.context.new_rvalue_from_int(bx.int_type, i as i32);
+            let value = bx.context.new_vector_access(None, result, index);
+
             let int = bx.context.new_vector_access(None, pointers, index).to_rvalue();
-
             let ptr_type = elem_type.make_pointer();
-
             let ptr = bx.context.new_bitcast(None, int, ptr_type);
-            let value = ptr.dereference(None).to_rvalue();
-            values.push(value);
+            bx.llbb().add_assignment(None, ptr.dereference(None), value);
         }
 
-        let vector = bx.context.new_rvalue_from_vector(None, vector_type, &values);
-        let default = args[0].immediate();
-        let mask = args[2].immediate();
-
-        let mut mask_types = vec![];
-        let mut mask_values = vec![];
-        for i in 0..in_len {
-            let index = bx.context.new_rvalue_from_long(bx.i32_type, i as i64);
-            mask_types.push(bx.context.new_field(None, bx.i32_type, "m")); // TODO: choose an integer based on the size of the vector element type.
-            let mask_value = bx.context.new_vector_access(None, mask, index).to_rvalue();
-            let masked = bx.context.new_rvalue_from_int(bx.i32_type, in_len as i32) & mask_value;
-            let value = index + masked;
-            mask_values.push(value);
-        }
-        let mask_type = bx.context.new_struct_type(None, "mask_type", &mask_types);
-        let mask = bx.context.new_struct_constructor(None, mask_type.as_type(), None, &mask_values);
-
-        return Ok(bx.shuffle_vector(default, vector, mask));
+        return Ok(bx.context.new_rvalue_zero(bx.i32_type));
     }
 
     arith_binary! {

From 830a821b9b8fadd4ee1c779f1776ab38e18f09a2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 25 Feb 2023 19:54:34 -0500
Subject: [PATCH 230/997] Update failures

---
 failing-ui-tests.txt | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index a51a7f1428e3..f43116544ed2 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -22,8 +22,6 @@ src/test/ui/sepcomp/sepcomp-fns-backwards.rs
 src/test/ui/sepcomp/sepcomp-fns.rs
 src/test/ui/sepcomp/sepcomp-statics.rs
 src/test/ui/simd/intrinsic/generic-arithmetic-pass.rs
-src/test/ui/simd/intrinsic/generic-gather-pass.rs
-src/test/ui/simd/type-generic-monomorphisation-extern-nonnull-ptr.rs
 src/test/ui/sse2.rs
 src/test/ui/target-feature/missing-plusminus.rs
 src/test/ui/asm/x86_64/may_unwind.rs
@@ -54,7 +52,6 @@ src/test/ui/issues/issue-43853.rs
 src/test/ui/issues/issue-47364.rs
 src/test/ui/simd/issue-17170.rs
 src/test/ui/simd/issue-39720.rs
-src/test/ui/simd/issue-85915-simd-ptrs.rs
 src/test/ui/simd/issue-89193.rs
 src/test/ui/statics/issue-91050-1.rs
 src/test/ui/statics/issue-91050-2.rs

From 3e61492dc5196ea5806cacd56a87db3484e2495b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 25 Feb 2023 20:37:20 -0500
Subject: [PATCH 231/997] Add feature gate

---
 src/intrinsic/simd.rs | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 5ab1f9e4300e..0635ad2e0c7b 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -14,6 +14,7 @@ use rustc_span::{Span, Symbol, sym};
 use rustc_target::abi::Align;
 
 use crate::builder::Builder;
+#[cfg(feature="master")]
 use crate::context::CodegenCx;
 
 pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>, name: Symbol, callee_ty: Ty<'tcx>, args: &[OperandRef<'tcx, RValue<'gcc>>], ret_ty: Ty<'tcx>, llret_ty: Type<'gcc>, span: Span) -> Result<RValue<'gcc>, ()> {
@@ -508,6 +509,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         return simd_simple_float_intrinsic(name, in_elem, in_ty, in_len, bx, span, args);
     }
 
+    #[cfg(feature="master")]
     fn vector_ty<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, elem_ty: Ty<'tcx>, vec_len: u64) -> Type<'gcc> {
         // FIXME: use cx.layout_of(ty).llvm_type() ?
         let elem_ty = match *elem_ty.kind() {
@@ -519,6 +521,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         cx.type_vector(elem_ty, vec_len)
     }
 
+    #[cfg(feature="master")]
     fn gather<'a, 'gcc, 'tcx>(default: RValue<'gcc>, pointers: RValue<'gcc>, mask: RValue<'gcc>, pointer_count: usize, bx: &mut Builder<'a, 'gcc, 'tcx>, in_len: u64, underlying_ty: Ty<'tcx>, invert: bool) -> RValue<'gcc> {
         let vector_type =
             if pointer_count > 1 {
@@ -563,6 +566,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         }
     }
 
+    #[cfg(feature="master")]
     if name == sym::simd_gather {
         // simd_gather(values: <N x T>, pointers: <N x *_ T>,
         //             mask: <N x i{M}>) -> <N x T>
@@ -663,6 +667,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         return Ok(gather(args[0].immediate(), args[1].immediate(), args[2].immediate(), pointer_count, bx, in_len, underlying_ty, false));
     }
 
+    #[cfg(feature="master")]
     if name == sym::simd_scatter {
         // simd_scatter(values: <N x T>, pointers: <N x *mut T>,
         //             mask: <N x i{M}>) -> ()

From edee0973b24382d641c5b1c5ab43ee16e8d4ec36 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 25 Feb 2023 21:03:58 -0500
Subject: [PATCH 232/997] Update failures for libgccjit12

---
 failing-ui-tests12.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 22441efeee9f..2a9f39e88ccb 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -37,3 +37,5 @@ src/test/ui/cfg/cfg-panic.rs
 src/test/ui/generator/size-moved-locals.rs
 src/test/ui/macros/rfc-2011-nicer-assert-messages/all-not-available-cases.rs
 src/test/ui/runtime/rt-explody-panic-payloads.rs
+src/test/ui/simd/intrinsic/generic-gather-pass.rs
+src/test/ui/simd/issue-85915-simd-ptrs.rs

From 16b377efbd612c276a6800dbcecbb0fe9ad9a204 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 25 Feb 2023 21:48:44 -0500
Subject: [PATCH 233/997] Remove comment

---
 src/intrinsic/simd.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 0635ad2e0c7b..233d0b7f739d 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -549,7 +549,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let mut mask_values = vec![];
         for i in 0..in_len {
             let index = bx.context.new_rvalue_from_long(bx.i32_type, i as i64);
-            mask_types.push(bx.context.new_field(None, bx.i32_type, "m")); // TODO: choose an integer based on the size of the vector element type.
+            mask_types.push(bx.context.new_field(None, bx.i32_type, "m"));
             let mask_value = bx.context.new_vector_access(None, mask, index).to_rvalue();
             let masked = bx.context.new_rvalue_from_int(bx.i32_type, in_len as i32) & mask_value;
             let value = index + masked;

From 1fcf4373062d4648bfe0fb66ecff619544f36ae8 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 28 Feb 2023 17:39:01 -0500
Subject: [PATCH 234/997] Add instructions for a working git-subtree

---
 Readme.md | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/Readme.md b/Readme.md
index b473f79a526b..44b3c14fb9a7 100644
--- a/Readme.md
+++ b/Readme.md
@@ -187,6 +187,17 @@ TODO(antoyo): but that's not what I remember I was doing.
  * Build the stage2 compiler (`rustup toolchain link debug-current build/x86_64-unknown-linux-gnu/stage2`).
  * Clean and rebuild the codegen with `debug-current` in the file `rust-toolchain`.
 
+### How to install a forked git-subtree
+
+Using git-subtree with `rustc` requires a patched git to make it work.
+The PR that is needed is [here](https://github.com/gitgitgadget/git/pull/493).
+Compile it and copy those files to `/usr/local/bin`:
+
+```
+git-commit-tree  git-ls-tree        git-merge-tree  git-read-tree  git-write-tree
+git-diff-tree    git-merge-subtree  git-mktree      git-worktree
+```
+
 ### How to use [mem-trace](https://github.com/antoyo/mem-trace)
 
 `rustc` needs to be built without `jemalloc` so that `mem-trace` can overload `malloc` since `jemalloc` is linked statically, so a `LD_PRELOAD`-ed library won't a chance to intercept the calls to `malloc`.

From 32a2e378f4cc509718cba147b0d6588528cdd6e5 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 28 Feb 2023 18:25:09 -0500
Subject: [PATCH 235/997] Fix instructions for installing git-subtree

---
 Readme.md | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/Readme.md b/Readme.md
index 44b3c14fb9a7..bb7419438925 100644
--- a/Readme.md
+++ b/Readme.md
@@ -191,11 +191,17 @@ TODO(antoyo): but that's not what I remember I was doing.
 
 Using git-subtree with `rustc` requires a patched git to make it work.
 The PR that is needed is [here](https://github.com/gitgitgadget/git/pull/493).
-Compile it and copy those files to `/usr/local/bin`:
+Use the following instructions to install it:
 
 ```
-git-commit-tree  git-ls-tree        git-merge-tree  git-read-tree  git-write-tree
-git-diff-tree    git-merge-subtree  git-mktree      git-worktree
+git clone git@github.com:tqc/git.git
+cd git
+git checkout tqc/subtree
+make
+make install
+cd contrib/subtree
+make
+cp git-subtree ~/bin
 ```
 
 ### How to use [mem-trace](https://github.com/antoyo/mem-trace)

From d01d0d1f76a9ff51681d079916073ad33ba190d4 Mon Sep 17 00:00:00 2001
From: Nicholas Nethercote <n.nethercote@gmail.com>
Date: Thu, 25 Aug 2022 17:52:37 +1000
Subject: [PATCH 236/997] Box `CastTarget` within `PassMode`.

Because `PassMode::Cast` is by far the largest variant, but is
relatively rare.

This requires making `PassMode` not impl `Copy`, and `Clone` is no
longer necessary. This causes lots of sigil adjusting, but nothing very
notable.
---
 src/abi.rs           | 4 ++--
 src/intrinsic/mod.rs | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 0ed3e1fbe93f..9b55db6a5476 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -133,7 +133,7 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
             match self.ret.mode {
                 PassMode::Ignore => cx.type_void(),
                 PassMode::Direct(_) | PassMode::Pair(..) => self.ret.layout.immediate_gcc_type(cx),
-                PassMode::Cast(cast) => cast.gcc_type(cx),
+                PassMode::Cast(ref cast) => cast.gcc_type(cx),
                 PassMode::Indirect { .. } => {
                     argument_tys.push(cx.type_ptr_to(self.ret.memory_ty(cx)));
                     cx.type_void()
@@ -157,7 +157,7 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
                 PassMode::Indirect { extra_attrs: Some(_), .. } => {
                     unimplemented!();
                 }
-                PassMode::Cast(cast) => cast.gcc_type(cx),
+                PassMode::Cast(ref cast) => cast.gcc_type(cx),
                 PassMode::Indirect { extra_attrs: None, on_stack: true, .. } => {
                     on_stack_param_indices.insert(argument_tys.len());
                     arg.memory_ty(cx)
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 6ca171801159..90c49c627019 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -141,7 +141,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 sym::volatile_load | sym::unaligned_volatile_load => {
                     let tp_ty = substs.type_at(0);
                     let mut ptr = args[0].immediate();
-                    if let PassMode::Cast(ty) = fn_abi.ret.mode {
+                    if let PassMode::Cast(ty) = &fn_abi.ret.mode {
                         ptr = self.pointercast(ptr, self.type_ptr_to(ty.gcc_type(self)));
                     }
                     let load = self.volatile_load(ptr.get_type(), ptr);
@@ -331,7 +331,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
             };
 
         if !fn_abi.ret.is_ignore() {
-            if let PassMode::Cast(ty) = fn_abi.ret.mode {
+            if let PassMode::Cast(ty) = &fn_abi.ret.mode {
                 let ptr_llty = self.type_ptr_to(ty.gcc_type(self));
                 let ptr = self.pointercast(result.llval, ptr_llty);
                 self.store(llval, ptr, result.align);
@@ -427,7 +427,7 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
         else if self.is_unsized_indirect() {
             bug!("unsized `ArgAbi` must be handled through `store_fn_arg`");
         }
-        else if let PassMode::Cast(cast) = self.mode {
+        else if let PassMode::Cast(ref cast) = self.mode {
             // FIXME(eddyb): Figure out when the simpler Store is safe, clang
             // uses it for i16 -> {i8, i8}, but not for i24 -> {i8, i8, i8}.
             let can_store_through_cast_ptr = false;

From a283dedd44f5e426f01d24a447fbf4cb7d5dc41a Mon Sep 17 00:00:00 2001
From: Nicholas Nethercote <n.nethercote@gmail.com>
Date: Thu, 25 Aug 2022 19:08:04 +1000
Subject: [PATCH 237/997] Change `FnAbi::args` to a boxed slice.

---
 src/abi.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/abi.rs b/src/abi.rs
index 9b55db6a5476..7f313583c82c 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -140,7 +140,7 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
                 }
             };
 
-        for arg in &self.args {
+        for arg in self.args.iter() {
             // add padding
             if let Some(ty) = arg.pad {
                 argument_tys.push(ty.gcc_type(cx));

From 3c2d43265c1691647a9e2adc57c7239a4366a624 Mon Sep 17 00:00:00 2001
From: Nicholas Nethercote <n.nethercote@gmail.com>
Date: Fri, 26 Aug 2022 10:37:51 +1000
Subject: [PATCH 238/997] Simplify arg capacity calculations.

Currently they try to be very precise. But they are wrong, i.e. they
don't match what's happening in the loop below. This code isn't hot
enough for it to matter that much.
---
 src/abi.rs | 22 +++-------------------
 1 file changed, 3 insertions(+), 19 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 7f313583c82c..87b730d29cdf 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -107,26 +107,10 @@ pub trait FnAbiGccExt<'gcc, 'tcx> {
 impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
     fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool, FxHashSet<usize>) {
         let mut on_stack_param_indices = FxHashSet::default();
-        let args_capacity: usize = self.args.iter().map(|arg|
-            if arg.pad.is_some() {
-                1
-            }
-            else {
-                0
-            } +
-            if let PassMode::Pair(_, _) = arg.mode {
-                2
-            } else {
-                1
-            }
-        ).sum();
+
+        // This capacity calculation is approximate.
         let mut argument_tys = Vec::with_capacity(
-            if let PassMode::Indirect { .. } = self.ret.mode {
-                1
-            }
-            else {
-                0
-            } + args_capacity,
+            self.args.len() + if let PassMode::Indirect { .. } = self.ret.mode { 1 } else { 0 }
         );
 
         let return_ty =

From 8ebade29d6f45e51b8f72d410a04edd2a25d5bf8 Mon Sep 17 00:00:00 2001
From: Nicholas Nethercote <n.nethercote@gmail.com>
Date: Thu, 25 Aug 2022 19:18:01 +1000
Subject: [PATCH 239/997] Turn `ArgAbi::pad` into a `bool`.

Because it's only ever set to `None` or `Some(Reg::i32())`.
---
 src/abi.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 87b730d29cdf..3186b363e359 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -126,8 +126,8 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
 
         for arg in self.args.iter() {
             // add padding
-            if let Some(ty) = arg.pad {
-                argument_tys.push(ty.gcc_type(cx));
+            if arg.pad_i32 {
+                argument_tys.push(Reg::i32().gcc_type(cx));
             }
 
             let arg_ty = match arg.mode {

From b3f294215637c763b8a689705a01b6fd4428e371 Mon Sep 17 00:00:00 2001
From: Nicholas Nethercote <n.nethercote@gmail.com>
Date: Thu, 25 Aug 2022 22:19:38 +1000
Subject: [PATCH 240/997] Move `ArgAbi::pad_i32` into `PassMode::Cast`.

Because it's only needed for that variant. This shrinks the types and
clarifies the logic.
---
 src/abi.rs           | 15 ++++++++-------
 src/intrinsic/mod.rs |  8 ++++----
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 3186b363e359..848c34211ff6 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -117,7 +117,7 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
             match self.ret.mode {
                 PassMode::Ignore => cx.type_void(),
                 PassMode::Direct(_) | PassMode::Pair(..) => self.ret.layout.immediate_gcc_type(cx),
-                PassMode::Cast(ref cast) => cast.gcc_type(cx),
+                PassMode::Cast(ref cast, _) => cast.gcc_type(cx),
                 PassMode::Indirect { .. } => {
                     argument_tys.push(cx.type_ptr_to(self.ret.memory_ty(cx)));
                     cx.type_void()
@@ -125,11 +125,6 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
             };
 
         for arg in self.args.iter() {
-            // add padding
-            if arg.pad_i32 {
-                argument_tys.push(Reg::i32().gcc_type(cx));
-            }
-
             let arg_ty = match arg.mode {
                 PassMode::Ignore => continue,
                 PassMode::Direct(_) => arg.layout.immediate_gcc_type(cx),
@@ -141,7 +136,13 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
                 PassMode::Indirect { extra_attrs: Some(_), .. } => {
                     unimplemented!();
                 }
-                PassMode::Cast(ref cast) => cast.gcc_type(cx),
+                PassMode::Cast(ref cast, pad_i32) => {
+                    // add padding
+                    if pad_i32 {
+                        argument_tys.push(Reg::i32().gcc_type(cx));
+                    }
+                    cast.gcc_type(cx)
+                }
                 PassMode::Indirect { extra_attrs: None, on_stack: true, .. } => {
                     on_stack_param_indices.insert(argument_tys.len());
                     arg.memory_ty(cx)
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 90c49c627019..41361e17cb5f 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -141,7 +141,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 sym::volatile_load | sym::unaligned_volatile_load => {
                     let tp_ty = substs.type_at(0);
                     let mut ptr = args[0].immediate();
-                    if let PassMode::Cast(ty) = &fn_abi.ret.mode {
+                    if let PassMode::Cast(ty, _) = &fn_abi.ret.mode {
                         ptr = self.pointercast(ptr, self.type_ptr_to(ty.gcc_type(self)));
                     }
                     let load = self.volatile_load(ptr.get_type(), ptr);
@@ -331,7 +331,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
             };
 
         if !fn_abi.ret.is_ignore() {
-            if let PassMode::Cast(ty) = &fn_abi.ret.mode {
+            if let PassMode::Cast(ty, _) = &fn_abi.ret.mode {
                 let ptr_llty = self.type_ptr_to(ty.gcc_type(self));
                 let ptr = self.pointercast(result.llval, ptr_llty);
                 self.store(llval, ptr, result.align);
@@ -427,7 +427,7 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
         else if self.is_unsized_indirect() {
             bug!("unsized `ArgAbi` must be handled through `store_fn_arg`");
         }
-        else if let PassMode::Cast(ref cast) = self.mode {
+        else if let PassMode::Cast(ref cast, _) = self.mode {
             // FIXME(eddyb): Figure out when the simpler Store is safe, clang
             // uses it for i16 -> {i8, i8}, but not for i24 -> {i8, i8, i8}.
             let can_store_through_cast_ptr = false;
@@ -492,7 +492,7 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
             PassMode::Indirect { extra_attrs: Some(_), .. } => {
                 OperandValue::Ref(next(), Some(next()), self.layout.align.abi).store(bx, dst);
             },
-            PassMode::Direct(_) | PassMode::Indirect { extra_attrs: None, .. } | PassMode::Cast(_) => {
+            PassMode::Direct(_) | PassMode::Indirect { extra_attrs: None, .. } | PassMode::Cast(..) => {
                 let next_arg = next();
                 self.store(bx, next_arg, dst);
             },

From a7f6e7ebaf697f03d22374303aaaa09d9ed70237 Mon Sep 17 00:00:00 2001
From: Maybe Waffle <waffle.lapkin@gmail.com>
Date: Wed, 11 May 2022 22:01:53 +0400
Subject: [PATCH 241/997] Implement `ptr_mask` intrinsic in cg gcc

---
 src/intrinsic/mod.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 41361e17cb5f..ff7332478f3c 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -320,6 +320,8 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     return;
                 }
 
+                sym::ptr_mask => self.and(args[0].immediate(), args[1].immediate()),
+
                 _ if name_str.starts_with("simd_") => {
                     match generic_simd_intrinsic(self, name, callee_ty, args, ret_ty, llret_ty, span) {
                         Ok(llval) => llval,

From 5eedd541a962a36e86d3302856211248317f635c Mon Sep 17 00:00:00 2001
From: Maybe Waffle <waffle.lapkin@gmail.com>
Date: Fri, 13 May 2022 17:08:44 +0400
Subject: [PATCH 242/997] Fix `ptr_mask` impl in cg gcc

---
 src/intrinsic/mod.rs | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index ff7332478f3c..205f795ec58c 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -320,8 +320,18 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     return;
                 }
 
-                sym::ptr_mask => self.and(args[0].immediate(), args[1].immediate()),
+                sym::ptr_mask => {
+                    let usize_type = self.context.new_type::<usize>();
+                    let void_ptr_type = self.context.new_type::<*const ()>();
 
+                    let ptr = args[0].immediate();
+                    let mask = args[1].immediate();
+
+                    let addr = self.bitcast(ptr, usize_type);
+                    let masked = self.and(addr, mask);
+                    self.bitcast(masked, void_ptr_type)
+                },
+                
                 _ if name_str.starts_with("simd_") => {
                     match generic_simd_intrinsic(self, name, callee_ty, args, ret_ty, llret_ty, span) {
                         Ok(llval) => llval,

From 80b1c8dab5eb64826692051c963ff9c57baced76 Mon Sep 17 00:00:00 2001
From: Ralf Jung <post@ralfj.de>
Date: Sat, 27 Aug 2022 14:11:19 -0400
Subject: [PATCH 243/997] =?UTF-8?q?interpret:=20rename=20relocation=20?=
 =?UTF-8?q?=E2=86=92=20provenance?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

---
 src/consts.rs | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index d70c9076897b..b91fbfd6d94f 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -127,7 +127,7 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
             //
             // We could remove this hack whenever we decide to drop macOS 10.10 support.
             if self.tcx.sess.target.options.is_like_osx {
-                // The `inspect` method is okay here because we checked relocations, and
+                // The `inspect` method is okay here because we checked for provenance, and
                 // because we are doing this access to inspect the final interpreter state
                 // (not as part of the interpreter execution).
                 //
@@ -278,17 +278,17 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
 pub fn const_alloc_to_gcc<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, alloc: ConstAllocation<'tcx>) -> RValue<'gcc> {
     let alloc = alloc.inner();
-    let mut llvals = Vec::with_capacity(alloc.relocations().len() + 1);
+    let mut llvals = Vec::with_capacity(alloc.provenance().len() + 1);
     let dl = cx.data_layout();
     let pointer_size = dl.pointer_size.bytes() as usize;
 
     let mut next_offset = 0;
-    for &(offset, alloc_id) in alloc.relocations().iter() {
+    for &(offset, alloc_id) in alloc.provenance().iter() {
         let offset = offset.bytes();
         assert_eq!(offset as usize as u64, offset);
         let offset = offset as usize;
         if offset > next_offset {
-            // This `inspect` is okay since we have checked that it is not within a relocation, it
+            // This `inspect` is okay since we have checked that it is not within a pointer with provenance, it
             // is within the bounds of the allocation, and it doesn't affect interpreter execution
             // (we inspect the result after interpreter execution). Any undef byte is replaced with
             // some arbitrary byte value.
@@ -301,7 +301,7 @@ pub fn const_alloc_to_gcc<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, alloc: ConstAl
             read_target_uint( dl.endian,
                 // This `inspect` is okay since it is within the bounds of the allocation, it doesn't
                 // affect interpreter execution (we inspect the result after interpreter execution),
-                // and we properly interpret the relocation as a relocation pointer offset.
+                // and we properly interpret the provenance as a relocation pointer offset.
                 alloc.inspect_with_uninit_and_ptr_outside_interpreter(offset..(offset + pointer_size)),
             )
             .expect("const_alloc_to_llvm: could not read relocation pointer")
@@ -318,7 +318,7 @@ pub fn const_alloc_to_gcc<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, alloc: ConstAl
     }
     if alloc.len() >= next_offset {
         let range = next_offset..alloc.len();
-        // This `inspect` is okay since we have check that it is after all relocations, it is
+        // This `inspect` is okay since we have check that it is after all provenance, it is
         // within the bounds of the allocation, and it doesn't affect interpreter execution (we
         // inspect the result after interpreter execution). Any undef byte is replaced with some
         // arbitrary byte value.

From 91cf28428e7db791e248ef44e7dc55cd20429158 Mon Sep 17 00:00:00 2001
From: Josh Stone <jistone@redhat.com>
Date: Tue, 16 Aug 2022 15:46:17 -0700
Subject: [PATCH 244/997] Move the cast_float_to_int fallback code to GCC

Now that we require at least LLVM 13, that codegen backend is always
using its intrinsic `fptosi.sat` and `fptoui.sat` conversions, so it
doesn't need the manual implementation. However, the GCC backend still
needs it, so we can move all of that code down there.
---
 src/builder.rs | 174 +++++++++++++++++++++++++++++++++++++++++++++++--
 src/lib.rs     |   1 +
 2 files changed, 170 insertions(+), 5 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 2d7860536c25..a560539d6e1e 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -15,8 +15,11 @@ use gccjit::{
     Type,
     UnaryOp,
 };
+use rustc_apfloat::{ieee, Float, Round, Status};
 use rustc_codegen_ssa::MemFlags;
-use rustc_codegen_ssa::common::{AtomicOrdering, AtomicRmwBinOp, IntPredicate, RealPredicate, SynchronizationScope};
+use rustc_codegen_ssa::common::{
+    AtomicOrdering, AtomicRmwBinOp, IntPredicate, RealPredicate, SynchronizationScope, TypeKind,
+};
 use rustc_codegen_ssa::mir::operand::{OperandRef, OperandValue};
 use rustc_codegen_ssa::mir::place::PlaceRef;
 use rustc_codegen_ssa::traits::{
@@ -31,6 +34,7 @@ use rustc_codegen_ssa::traits::{
     StaticBuilderMethods,
 };
 use rustc_data_structures::fx::FxHashSet;
+use rustc_middle::bug;
 use rustc_middle::ty::{ParamEnv, Ty, TyCtxt};
 use rustc_middle::ty::layout::{FnAbiError, FnAbiOfHelpers, FnAbiRequest, HasParamEnv, HasTyCtxt, LayoutError, LayoutOfHelpers, TyAndLayout};
 use rustc_span::Span;
@@ -1403,12 +1407,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         val
     }
 
-    fn fptoui_sat(&mut self, _val: RValue<'gcc>, _dest_ty: Type<'gcc>) -> Option<RValue<'gcc>> {
-        None
+    fn fptoui_sat(&mut self, val: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
+        self.fptoint_sat(false, val, dest_ty)
     }
 
-    fn fptosi_sat(&mut self, _val: RValue<'gcc>, _dest_ty: Type<'gcc>) -> Option<RValue<'gcc>> {
-        None
+    fn fptosi_sat(&mut self, val: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
+        self.fptoint_sat(true, val, dest_ty)
     }
 
     fn instrprof_increment(&mut self, _fn_name: RValue<'gcc>, _hash: RValue<'gcc>, _num_counters: RValue<'gcc>, _index: RValue<'gcc>) {
@@ -1417,6 +1421,166 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 }
 
 impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
+    fn fptoint_sat(&mut self, signed: bool, val: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
+        let src_ty = self.cx.val_ty(val);
+        let (float_ty, int_ty) = if self.cx.type_kind(src_ty) == TypeKind::Vector {
+            assert_eq!(self.cx.vector_length(src_ty), self.cx.vector_length(dest_ty));
+            (self.cx.element_type(src_ty), self.cx.element_type(dest_ty))
+        } else {
+            (src_ty, dest_ty)
+        };
+
+        // FIXME(jistone): the following was originally the fallback SSA implementation, before LLVM 13
+        // added native `fptosi.sat` and `fptoui.sat` conversions, but it was used by GCC as well.
+        // Now that LLVM always relies on its own, the code has been moved to GCC, but the comments are
+        // still LLVM-specific. This should be updated, and use better GCC specifics if possible.
+
+        let int_width = self.cx.int_width(int_ty);
+        let float_width = self.cx.float_width(float_ty);
+        // LLVM's fpto[su]i returns undef when the input val is infinite, NaN, or does not fit into the
+        // destination integer type after rounding towards zero. This `undef` value can cause UB in
+        // safe code (see issue #10184), so we implement a saturating conversion on top of it:
+        // Semantically, the mathematical value of the input is rounded towards zero to the next
+        // mathematical integer, and then the result is clamped into the range of the destination
+        // integer type. Positive and negative infinity are mapped to the maximum and minimum value of
+        // the destination integer type. NaN is mapped to 0.
+        //
+        // Define f_min and f_max as the largest and smallest (finite) floats that are exactly equal to
+        // a value representable in int_ty.
+        // They are exactly equal to int_ty::{MIN,MAX} if float_ty has enough significand bits.
+        // Otherwise, int_ty::MAX must be rounded towards zero, as it is one less than a power of two.
+        // int_ty::MIN, however, is either zero or a negative power of two and is thus exactly
+        // representable. Note that this only works if float_ty's exponent range is sufficiently large.
+        // f16 or 256 bit integers would break this property. Right now the smallest float type is f32
+        // with exponents ranging up to 127, which is barely enough for i128::MIN = -2^127.
+        // On the other hand, f_max works even if int_ty::MAX is greater than float_ty::MAX. Because
+        // we're rounding towards zero, we just get float_ty::MAX (which is always an integer).
+        // This already happens today with u128::MAX = 2^128 - 1 > f32::MAX.
+        let int_max = |signed: bool, int_width: u64| -> u128 {
+            let shift_amount = 128 - int_width;
+            if signed { i128::MAX as u128 >> shift_amount } else { u128::MAX >> shift_amount }
+        };
+        let int_min = |signed: bool, int_width: u64| -> i128 {
+            if signed { i128::MIN >> (128 - int_width) } else { 0 }
+        };
+
+        let compute_clamp_bounds_single = |signed: bool, int_width: u64| -> (u128, u128) {
+            let rounded_min =
+                ieee::Single::from_i128_r(int_min(signed, int_width), Round::TowardZero);
+            assert_eq!(rounded_min.status, Status::OK);
+            let rounded_max =
+                ieee::Single::from_u128_r(int_max(signed, int_width), Round::TowardZero);
+            assert!(rounded_max.value.is_finite());
+            (rounded_min.value.to_bits(), rounded_max.value.to_bits())
+        };
+        let compute_clamp_bounds_double = |signed: bool, int_width: u64| -> (u128, u128) {
+            let rounded_min =
+                ieee::Double::from_i128_r(int_min(signed, int_width), Round::TowardZero);
+            assert_eq!(rounded_min.status, Status::OK);
+            let rounded_max =
+                ieee::Double::from_u128_r(int_max(signed, int_width), Round::TowardZero);
+            assert!(rounded_max.value.is_finite());
+            (rounded_min.value.to_bits(), rounded_max.value.to_bits())
+        };
+        // To implement saturation, we perform the following steps:
+        //
+        // 1. Cast val to an integer with fpto[su]i. This may result in undef.
+        // 2. Compare val to f_min and f_max, and use the comparison results to select:
+        //  a) int_ty::MIN if val < f_min or val is NaN
+        //  b) int_ty::MAX if val > f_max
+        //  c) the result of fpto[su]i otherwise
+        // 3. If val is NaN, return 0.0, otherwise return the result of step 2.
+        //
+        // This avoids resulting undef because values in range [f_min, f_max] by definition fit into the
+        // destination type. It creates an undef temporary, but *producing* undef is not UB. Our use of
+        // undef does not introduce any non-determinism either.
+        // More importantly, the above procedure correctly implements saturating conversion.
+        // Proof (sketch):
+        // If val is NaN, 0 is returned by definition.
+        // Otherwise, val is finite or infinite and thus can be compared with f_min and f_max.
+        // This yields three cases to consider:
+        // (1) if val in [f_min, f_max], the result of fpto[su]i is returned, which agrees with
+        //     saturating conversion for inputs in that range.
+        // (2) if val > f_max, then val is larger than int_ty::MAX. This holds even if f_max is rounded
+        //     (i.e., if f_max < int_ty::MAX) because in those cases, nextUp(f_max) is already larger
+        //     than int_ty::MAX. Because val is larger than int_ty::MAX, the return value of int_ty::MAX
+        //     is correct.
+        // (3) if val < f_min, then val is smaller than int_ty::MIN. As shown earlier, f_min exactly equals
+        //     int_ty::MIN and therefore the return value of int_ty::MIN is correct.
+        // QED.
+
+        let float_bits_to_llval = |bx: &mut Self, bits| {
+            let bits_llval = match float_width {
+                32 => bx.cx().const_u32(bits as u32),
+                64 => bx.cx().const_u64(bits as u64),
+                n => bug!("unsupported float width {}", n),
+            };
+            bx.bitcast(bits_llval, float_ty)
+        };
+        let (f_min, f_max) = match float_width {
+            32 => compute_clamp_bounds_single(signed, int_width),
+            64 => compute_clamp_bounds_double(signed, int_width),
+            n => bug!("unsupported float width {}", n),
+        };
+        let f_min = float_bits_to_llval(self, f_min);
+        let f_max = float_bits_to_llval(self, f_max);
+        let int_max = self.cx.const_uint_big(int_ty, int_max(signed, int_width));
+        let int_min = self.cx.const_uint_big(int_ty, int_min(signed, int_width) as u128);
+        let zero = self.cx.const_uint(int_ty, 0);
+
+        // If we're working with vectors, constants must be "splatted": the constant is duplicated
+        // into each lane of the vector.  The algorithm stays the same, we are just using the
+        // same constant across all lanes.
+        let maybe_splat = |bx: &mut Self, val| {
+            if bx.cx().type_kind(dest_ty) == TypeKind::Vector {
+                bx.vector_splat(bx.vector_length(dest_ty), val)
+            } else {
+                val
+            }
+        };
+        let f_min = maybe_splat(self, f_min);
+        let f_max = maybe_splat(self, f_max);
+        let int_max = maybe_splat(self, int_max);
+        let int_min = maybe_splat(self, int_min);
+        let zero = maybe_splat(self, zero);
+
+        // Step 1 ...
+        let fptosui_result = if signed { self.fptosi(val, dest_ty) } else { self.fptoui(val, dest_ty) };
+        let less_or_nan = self.fcmp(RealPredicate::RealULT, val, f_min);
+        let greater = self.fcmp(RealPredicate::RealOGT, val, f_max);
+
+        // Step 2: We use two comparisons and two selects, with %s1 being the
+        // result:
+        //     %less_or_nan = fcmp ult %val, %f_min
+        //     %greater = fcmp olt %val, %f_max
+        //     %s0 = select %less_or_nan, int_ty::MIN, %fptosi_result
+        //     %s1 = select %greater, int_ty::MAX, %s0
+        // Note that %less_or_nan uses an *unordered* comparison. This
+        // comparison is true if the operands are not comparable (i.e., if val is
+        // NaN). The unordered comparison ensures that s1 becomes int_ty::MIN if
+        // val is NaN.
+        //
+        // Performance note: Unordered comparison can be lowered to a "flipped"
+        // comparison and a negation, and the negation can be merged into the
+        // select. Therefore, it not necessarily any more expensive than an
+        // ordered ("normal") comparison. Whether these optimizations will be
+        // performed is ultimately up to the backend, but at least x86 does
+        // perform them.
+        let s0 = self.select(less_or_nan, int_min, fptosui_result);
+        let s1 = self.select(greater, int_max, s0);
+
+        // Step 3: NaN replacement.
+        // For unsigned types, the above step already yielded int_ty::MIN == 0 if val is NaN.
+        // Therefore we only need to execute this step for signed integer types.
+        if signed {
+            // LLVM has no isNaN predicate, so we use (val == val) instead
+            let cmp = self.fcmp(RealPredicate::RealOEQ, val, val);
+            self.select(cmp, s1, zero)
+        } else {
+            s1
+        }
+    }
+
     #[cfg(feature="master")]
     pub fn shuffle_vector(&mut self, v1: RValue<'gcc>, v2: RValue<'gcc>, mask: RValue<'gcc>) -> RValue<'gcc> {
         let struct_type = mask.get_type().is_struct().expect("mask should be of struct type");
diff --git a/src/lib.rs b/src/lib.rs
index e52ee4818f3e..36aa071fd0f8 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -19,6 +19,7 @@
 #![warn(rust_2018_idioms)]
 #![warn(unused_lifetimes)]
 
+extern crate rustc_apfloat;
 extern crate rustc_ast;
 extern crate rustc_attr;
 extern crate rustc_codegen_ssa;

From a50c15275f951d09f6f75c1503443424b5d71869 Mon Sep 17 00:00:00 2001
From: Oli Scherer <git-spam-no-reply9815368754983@oli-obk.de>
Date: Tue, 6 Sep 2022 14:09:49 +0000
Subject: [PATCH 245/997] Remove dead broken code from const zst handling in
 backends

---
 src/common.rs | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/src/common.rs b/src/common.rs
index 1d44dc486683..102d1e5a824d 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -158,10 +158,6 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         None
     }
 
-    fn zst_to_backend(&self, _ty: Type<'gcc>) -> RValue<'gcc> {
-        self.const_undef(self.type_ix(0))
-    }
-
     fn scalar_to_backend(&self, cv: Scalar, layout: abi::Scalar, ty: Type<'gcc>) -> RValue<'gcc> {
         let bitsize = if layout.is_bool() { 1 } else { layout.size(self).bits() };
         match cv {

From a900ba9163e7631ab2292c33aeac8e669f65d458 Mon Sep 17 00:00:00 2001
From: Urgau <urgau@numericable.fr>
Date: Sat, 24 Sep 2022 12:34:56 +0200
Subject: [PATCH 246/997] Stabilize bench_black_box

---
 tests/run/int.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/run/int.rs b/tests/run/int.rs
index 5693b6a215a6..bfe73c38435a 100644
--- a/tests/run/int.rs
+++ b/tests/run/int.rs
@@ -3,7 +3,7 @@
 // Run-time:
 //   status: 0
 
-#![feature(bench_black_box, const_black_box)]
+#![feature(const_black_box)]
 
 /*
  * Code

From c503d978dc78281dd0f93f1bbb55d378a6a97736 Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Fri, 26 Aug 2022 19:32:04 -0700
Subject: [PATCH 247/997] Add RanlibFailure

---
 src/archive.rs | 4 +++-
 src/errors.rs  | 7 +++++++
 src/lib.rs     | 2 ++
 3 files changed, 12 insertions(+), 1 deletion(-)
 create mode 100644 src/errors.rs

diff --git a/src/archive.rs b/src/archive.rs
index f863abdcc97e..14a69c194e4e 100644
--- a/src/archive.rs
+++ b/src/archive.rs
@@ -1,6 +1,8 @@
 use std::fs::File;
 use std::path::{Path, PathBuf};
 
+use crate::errors::RanlibFailure;
+
 use rustc_codegen_ssa::back::archive::{ArchiveBuilder, ArchiveBuilderBuilder};
 use rustc_session::Session;
 
@@ -181,7 +183,7 @@ impl<'a> ArchiveBuilder<'a> for ArArchiveBuilder<'a> {
             std::process::Command::new("ranlib").arg(output).status().expect("Couldn't run ranlib");
 
         if !status.success() {
-            self.config.sess.fatal(&format!("Ranlib exited with code {:?}", status.code()));
+            self.config.sess.emit_fatal(RanlibFailure { exit_code: status.code() });
         }
 
         any_members
diff --git a/src/errors.rs b/src/errors.rs
new file mode 100644
index 000000000000..1a0e38fc0bb2
--- /dev/null
+++ b/src/errors.rs
@@ -0,0 +1,7 @@
+use rustc_macros::SessionDiagnostic;
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::ranlib_failure)]
+pub(crate) struct RanlibFailure {
+    pub exit_code: Option<i32>
+}
diff --git a/src/lib.rs b/src/lib.rs
index 36aa071fd0f8..45e85034cc1c 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -26,6 +26,7 @@ extern crate rustc_codegen_ssa;
 extern crate rustc_data_structures;
 extern crate rustc_errors;
 extern crate rustc_hir;
+extern crate rustc_macros;
 extern crate rustc_metadata;
 extern crate rustc_middle;
 extern crate rustc_session;
@@ -52,6 +53,7 @@ mod context;
 mod coverageinfo;
 mod debuginfo;
 mod declare;
+mod errors;
 mod int;
 mod intrinsic;
 mod mono_item;

From 5a9ec83a177e01fc45bd2439148dd3d470424480 Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Fri, 26 Aug 2022 20:23:50 -0700
Subject: [PATCH 248/997] Add LinkageConstOrMutType

---
 src/consts.rs | 6 ++----
 src/errors.rs | 8 ++++++++
 2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index b91fbfd6d94f..be50850d82fc 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -14,6 +14,7 @@ use rustc_target::abi::{self, Align, HasDataLayout, Primitive, Size, WrappingRan
 
 use crate::base;
 use crate::context::CodegenCx;
+use crate::errors::LinkageConstOrMutType;
 use crate::type_of::LayoutGccExt;
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
@@ -350,10 +351,7 @@ fn check_and_apply_linkage<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, attrs: &Codeg
                 cx.layout_of(mt.ty).gcc_type(cx)
             }
             else {
-                cx.sess().span_fatal(
-                    span,
-                    "must have type `*const T` or `*mut T` due to `#[linkage]` attribute",
-                )
+                cx.sess().emit_fatal(LinkageConstOrMutType { span: span })
             };
         // Declare a symbol `foo` with the desired linkage.
         let global1 = cx.declare_global_with_linkage(&sym, llty2, base::global_linkage_to_gcc(linkage));
diff --git a/src/errors.rs b/src/errors.rs
index 1a0e38fc0bb2..456a60c6f90b 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -1,7 +1,15 @@
 use rustc_macros::SessionDiagnostic;
+use rustc_span::Span;
 
 #[derive(SessionDiagnostic)]
 #[diag(codegen_gcc::ranlib_failure)]
 pub(crate) struct RanlibFailure {
     pub exit_code: Option<i32>
 }
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::linkage_const_or_mut_type)]
+pub(crate) struct LinkageConstOrMutType {
+    #[primary_span]
+    pub span: Span
+}

From 2592befa7c5a10f179270621b002b49581fe6824 Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Fri, 26 Aug 2022 20:44:44 -0700
Subject: [PATCH 249/997] Add UnwindingInlineAsm

---
 src/asm.rs    | 3 ++-
 src/errors.rs | 7 +++++++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/asm.rs b/src/asm.rs
index 19cd44f28193..b8ca1c3fd612 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -12,6 +12,7 @@ use std::borrow::Cow;
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
+use crate::errors::UnwindingInlineAsm;
 use crate::type_of::LayoutGccExt;
 use crate::callee::get_fn;
 
@@ -109,7 +110,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn codegen_inline_asm(&mut self, template: &[InlineAsmTemplatePiece], rust_operands: &[InlineAsmOperandRef<'tcx, Self>], options: InlineAsmOptions, span: &[Span], _instance: Instance<'_>, _dest_catch_funclet: Option<(Self::BasicBlock, Self::BasicBlock, Option<&Self::Funclet>)>) {
         if options.contains(InlineAsmOptions::MAY_UNWIND) {
             self.sess()
-                .struct_span_err(span[0], "GCC backend does not support unwinding from inline asm")
+                .create_err(UnwindingInlineAsm { span: span[0] })
                 .emit();
             return;
         }
diff --git a/src/errors.rs b/src/errors.rs
index 456a60c6f90b..e0c7dca8e324 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -13,3 +13,10 @@ pub(crate) struct LinkageConstOrMutType {
     #[primary_span]
     pub span: Span
 }
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::unwinding_inline_asm)]
+pub(crate) struct UnwindingInlineAsm {
+    #[primary_span]
+    pub span: Span
+}

From 4a861c140a79bea5ef63b45a6f60141e6b0e0bfa Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Fri, 26 Aug 2022 20:50:37 -0700
Subject: [PATCH 250/997] Add LTONotSupported

---
 src/errors.rs | 4 ++++
 src/lib.rs    | 3 ++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/errors.rs b/src/errors.rs
index e0c7dca8e324..1b2953952ef7 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -14,6 +14,10 @@ pub(crate) struct LinkageConstOrMutType {
     pub span: Span
 }
 
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::lto_not_supported)]
+pub(crate) struct LTONotSupported {}
+
 #[derive(SessionDiagnostic)]
 #[diag(codegen_gcc::unwinding_inline_asm)]
 pub(crate) struct UnwindingInlineAsm {
diff --git a/src/lib.rs b/src/lib.rs
index 45e85034cc1c..0c0f5255fb8a 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -63,6 +63,7 @@ mod type_of;
 use std::any::Any;
 use std::sync::{Arc, Mutex};
 
+use crate::errors::LTONotSupported;
 use gccjit::{Context, OptimizationLevel, CType};
 use rustc_ast::expand::allocator::AllocatorKind;
 use rustc_codegen_ssa::{CodegenResults, CompiledModule, ModuleCodegen};
@@ -101,7 +102,7 @@ pub struct GccCodegenBackend {
 impl CodegenBackend for GccCodegenBackend {
     fn init(&self, sess: &Session) {
         if sess.lto() != Lto::No {
-            sess.warn("LTO is not supported. You may get a linker error.");
+            sess.emit_warning(LTONotSupported {});
         }
 
         let temp_dir = TempDir::new().expect("cannot create temporary directory");

From 1b5dd4bf5ebf987ad4d70975e466bf4d6b1f395c Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Sat, 27 Aug 2022 15:19:16 -0700
Subject: [PATCH 251/997] Add LayoutSizeOverflow

---
 src/context.rs | 5 +++--
 src/errors.rs  | 8 ++++++++
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/src/context.rs b/src/context.rs
index 07222c534401..f1f808caafe6 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -19,6 +19,7 @@ use rustc_target::abi::{call::FnAbi, HasDataLayout, PointeeInfo, Size, TargetDat
 use rustc_target::spec::{HasTargetSpec, Target, TlsModel};
 
 use crate::callee::get_fn;
+use crate::errors::LayoutSizeOverflow;
 
 #[derive(Clone)]
 pub struct FuncSig<'gcc> {
@@ -492,7 +493,7 @@ impl<'gcc, 'tcx> LayoutOfHelpers<'tcx> for CodegenCx<'gcc, 'tcx> {
     #[inline]
     fn handle_layout_err(&self, err: LayoutError<'tcx>, span: Span, ty: Ty<'tcx>) -> ! {
         if let LayoutError::SizeOverflow(_) = err {
-            self.sess().span_fatal(span, &err.to_string())
+            self.sess().emit_fatal(LayoutSizeOverflow { span, error: err.to_string() })
         } else {
             span_bug!(span, "failed to get layout for `{}`: {}", ty, err)
         }
@@ -510,7 +511,7 @@ impl<'gcc, 'tcx> FnAbiOfHelpers<'tcx> for CodegenCx<'gcc, 'tcx> {
         fn_abi_request: FnAbiRequest<'tcx>,
     ) -> ! {
         if let FnAbiError::Layout(LayoutError::SizeOverflow(_)) = err {
-            self.sess().span_fatal(span, &err.to_string())
+            self.sess().emit_fatal(LayoutSizeOverflow { span, error: err.to_string() })
         } else {
             match fn_abi_request {
                 FnAbiRequest::OfFnPtr { sig, extra_args } => {
diff --git a/src/errors.rs b/src/errors.rs
index 1b2953952ef7..490a209ead05 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -7,6 +7,14 @@ pub(crate) struct RanlibFailure {
     pub exit_code: Option<i32>
 }
 
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::layout_size_overflow)]
+pub(crate) struct LayoutSizeOverflow {
+    #[primary_span]
+    pub span: Span,
+    pub error: String,
+}
+
 #[derive(SessionDiagnostic)]
 #[diag(codegen_gcc::linkage_const_or_mut_type)]
 pub(crate) struct LinkageConstOrMutType {

From b4a051e3b342d62a52f1d204dafac5bea31f5360 Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Sat, 27 Aug 2022 15:21:46 -0700
Subject: [PATCH 252/997] Lint against untranslatable diagnostics in
 rustc_codegen_gcc

---
 src/lib.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/lib.rs b/src/lib.rs
index 0c0f5255fb8a..b660029a4af9 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -18,6 +18,8 @@
 #![recursion_limit="256"]
 #![warn(rust_2018_idioms)]
 #![warn(unused_lifetimes)]
+#![deny(rustc::untranslatable_diagnostic)]
+#![deny(rustc::diagnostic_outside_of_impl)]
 
 extern crate rustc_apfloat;
 extern crate rustc_ast;

From c4149da9fd52d93aecbdcb1aae5b2c830f3c0ab6 Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Mon, 29 Aug 2022 20:22:03 -0700
Subject: [PATCH 253/997] remove IntoDiagnosticArg impl for Option

---
 src/archive.rs | 2 +-
 src/errors.rs  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/archive.rs b/src/archive.rs
index 14a69c194e4e..77fbb2c500e8 100644
--- a/src/archive.rs
+++ b/src/archive.rs
@@ -183,7 +183,7 @@ impl<'a> ArchiveBuilder<'a> for ArArchiveBuilder<'a> {
             std::process::Command::new("ranlib").arg(output).status().expect("Couldn't run ranlib");
 
         if !status.success() {
-            self.config.sess.emit_fatal(RanlibFailure { exit_code: status.code() });
+            self.config.sess.emit_fatal(RanlibFailure { exit_code: format!("{:?}", status.code()) });
         }
 
         any_members
diff --git a/src/errors.rs b/src/errors.rs
index 490a209ead05..01de75976a32 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -4,7 +4,7 @@ use rustc_span::Span;
 #[derive(SessionDiagnostic)]
 #[diag(codegen_gcc::ranlib_failure)]
 pub(crate) struct RanlibFailure {
-    pub exit_code: Option<i32>
+    pub exit_code: String,
 }
 
 #[derive(SessionDiagnostic)]

From 4718beead66e1d234ff40d1621b84a2f3537fa91 Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Wed, 31 Aug 2022 22:02:35 -0700
Subject: [PATCH 254/997] Add wrapper type for ExitCode for use in
 RanlibFailure

---
 src/archive.rs |  2 +-
 src/errors.rs  | 24 +++++++++++++++++++++++-
 2 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/src/archive.rs b/src/archive.rs
index 77fbb2c500e8..ac0342f6b80a 100644
--- a/src/archive.rs
+++ b/src/archive.rs
@@ -183,7 +183,7 @@ impl<'a> ArchiveBuilder<'a> for ArArchiveBuilder<'a> {
             std::process::Command::new("ranlib").arg(output).status().expect("Couldn't run ranlib");
 
         if !status.success() {
-            self.config.sess.emit_fatal(RanlibFailure { exit_code: format!("{:?}", status.code()) });
+            self.config.sess.emit_fatal(RanlibFailure::new(status.code()));
         }
 
         any_members
diff --git a/src/errors.rs b/src/errors.rs
index 01de75976a32..b5fc789c2791 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -1,10 +1,32 @@
+use rustc_errors::{DiagnosticArgValue, IntoDiagnosticArg};
 use rustc_macros::SessionDiagnostic;
 use rustc_span::Span;
+use std::borrow::Cow;
+
+struct ExitCode {
+    pub exit_code: Option<i32>,
+}
+
+impl IntoDiagnosticArg for ExitCode {
+    fn into_diagnostic_arg(self) -> DiagnosticArgValue<'static> {
+        match self.exit_code {
+            Some(t) => t.into_diagnostic_arg(),
+            None => DiagnosticArgValue::Str(Cow::Borrowed("None")),
+        }
+    }
+}
 
 #[derive(SessionDiagnostic)]
 #[diag(codegen_gcc::ranlib_failure)]
 pub(crate) struct RanlibFailure {
-    pub exit_code: String,
+    exit_code: ExitCode,
+}
+
+impl RanlibFailure {
+    pub fn new(exit_code: Option<i32>) -> Self {
+        let exit_code = ExitCode{ exit_code };
+        RanlibFailure { exit_code }
+    }
 }
 
 #[derive(SessionDiagnostic)]

From f21041d7c3eb68ecbb3b06b4878071e30d387f9d Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Wed, 31 Aug 2022 22:03:05 -0700
Subject: [PATCH 255/997] lint type

---
 src/errors.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/errors.rs b/src/errors.rs
index b5fc789c2791..938c0a74af38 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -46,7 +46,7 @@ pub(crate) struct LinkageConstOrMutType {
 
 #[derive(SessionDiagnostic)]
 #[diag(codegen_gcc::lto_not_supported)]
-pub(crate) struct LTONotSupported {}
+pub(crate) struct LTONotSupported;
 
 #[derive(SessionDiagnostic)]
 #[diag(codegen_gcc::unwinding_inline_asm)]

From ef3aaa1f210b2e72c16a9a880ae3d1fd6061fc9f Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Sun, 11 Sep 2022 16:43:18 -0700
Subject: [PATCH 256/997] Add monomorphization errors

---
 src/errors.rs         | 198 +++++++++++++++++++++++++++++++++++++++-
 src/intrinsic/mod.rs  |  13 +--
 src/intrinsic/simd.rs | 207 +++++++++++++++---------------------------
 3 files changed, 271 insertions(+), 147 deletions(-)

diff --git a/src/errors.rs b/src/errors.rs
index 938c0a74af38..a70ebf62da3e 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -1,6 +1,7 @@
 use rustc_errors::{DiagnosticArgValue, IntoDiagnosticArg};
 use rustc_macros::SessionDiagnostic;
-use rustc_span::Span;
+use rustc_middle::ty::Ty;
+use rustc_span::{Span, Symbol};
 use std::borrow::Cow;
 
 struct ExitCode {
@@ -29,6 +30,201 @@ impl RanlibFailure {
     }
 }
 
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_basic_integer, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationBasicInteger<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub ty: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_invalid_float_vector, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationInvalidFloatVector<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub elem_ty: &'a str,
+    pub vec_ty: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_not_float, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationNotFloat<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub ty: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_unrecognized, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationUnrecognized {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_expected_signed_unsigned, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationExpectedSignedUnsigned<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub elem_ty: Ty<'a>,
+    pub vec_ty: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_unsupported_element, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationUnsupportedElement<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub in_ty: Ty<'a>,
+    pub elem_ty: Ty<'a>,
+    pub ret_ty: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_invalid_bitmask, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationInvalidBitmask<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub ty: Ty<'a>,
+    pub expected_int_bits: u64,
+    pub expected_bytes: u64,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_simd_shuffle, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationSimdShuffle<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub ty: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_expected_simd, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationExpectedSimd<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub position: &'a str,
+    pub found_ty: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_mask_type, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationMaskType<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub ty: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_return_length, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationReturnLength<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub in_len: u64,
+    pub ret_ty: Ty<'a>,
+    pub out_len: u64,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_return_length_input_type, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationReturnLengthInputType<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub in_len: u64,
+    pub in_ty: Ty<'a>,
+    pub ret_ty: Ty<'a>,
+    pub out_len: u64,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_return_element, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationReturnElement<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub in_elem: Ty<'a>,
+    pub in_ty: Ty<'a>,
+    pub ret_ty: Ty<'a>,
+    pub out_ty: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_return_type, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationReturnType<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub in_elem: Ty<'a>,
+    pub in_ty: Ty<'a>,
+    pub ret_ty: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_inserted_type, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationInsertedType<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub in_elem: Ty<'a>,
+    pub in_ty: Ty<'a>,
+    pub out_ty: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_return_integer_type, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationReturnIntegerType<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub ret_ty: Ty<'a>,
+    pub out_ty: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_mismatched_lengths, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationMismatchedLengths {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub m_len: u64,
+    pub v_len: u64,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_unsupported_cast, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationUnsupportedCast<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub in_ty: Ty<'a>,
+    pub in_elem: Ty<'a>,
+    pub ret_ty: Ty<'a>,
+    pub out_elem: Ty<'a>,
+}
+
+#[derive(SessionDiagnostic)]
+#[diag(codegen_gcc::invalid_monomorphization_unsupported_operation, code = "E0511")]
+pub(crate) struct InvalidMonomorphizationUnsupportedOperation<'a> {
+    #[primary_span]
+    pub span: Span,
+    pub name: Symbol,
+    pub in_ty: Ty<'a>,
+    pub in_elem: Ty<'a>,
+}
+
 #[derive(SessionDiagnostic)]
 #[diag(codegen_gcc::layout_size_overflow)]
 pub(crate) struct LayoutSizeOverflow {
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 205f795ec58c..bdeede2ab5e6 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -7,7 +7,7 @@ use std::iter;
 use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp, FunctionType};
 use rustc_codegen_ssa::MemFlags;
 use rustc_codegen_ssa::base::wants_msvc_seh;
-use rustc_codegen_ssa::common::{IntPredicate, span_invalid_monomorphization_error};
+use rustc_codegen_ssa::common::IntPredicate;
 use rustc_codegen_ssa::mir::operand::{OperandRef, OperandValue};
 use rustc_codegen_ssa::mir::place::PlaceRef;
 use rustc_codegen_ssa::traits::{ArgAbiMethods, BaseTypeMethods, BuilderMethods, ConstMethods, IntrinsicCallMethods};
@@ -31,6 +31,7 @@ use crate::abi::FnAbiGccExt;
 use crate::builder::Builder;
 use crate::common::{SignType, TypeReflection};
 use crate::context::CodegenCx;
+use crate::errors::InvalidMonomorphizationBasicInteger;
 use crate::type_of::LayoutGccExt;
 use crate::intrinsic::simd::generic_simd_intrinsic;
 
@@ -253,15 +254,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                                 _ => bug!(),
                             },
                             None => {
-                                span_invalid_monomorphization_error(
-                                    tcx.sess,
-                                    span,
-                                    &format!(
-                                        "invalid monomorphization of `{}` intrinsic: \
-                                      expected basic integer type, found `{}`",
-                                      name, ty
-                                    ),
-                                );
+                                tcx.sess.emit_err(InvalidMonomorphizationBasicInteger { span, name, ty });
                                 return;
                             }
                         }
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 233d0b7f739d..f95db2271b33 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -2,7 +2,7 @@
 use gccjit::{ToRValue, ComparisonOp, UnaryOp};
 use gccjit::{BinaryOp, RValue, Type};
 use rustc_codegen_ssa::base::compare_simd_types;
-use rustc_codegen_ssa::common::{IntPredicate, TypeKind, span_invalid_monomorphization_error};
+use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
 use rustc_codegen_ssa::mir::operand::OperandRef;
 use rustc_codegen_ssa::mir::place::PlaceRef;
 use rustc_codegen_ssa::traits::{BaseTypeMethods, BuilderMethods};
@@ -16,42 +16,46 @@ use rustc_target::abi::Align;
 use crate::builder::Builder;
 #[cfg(feature="master")]
 use crate::context::CodegenCx;
+use crate::errors::{
+    InvalidMonomorphizationInvalidFloatVector,
+    InvalidMonomorphizationNotFloat,
+    InvalidMonomorphizationUnrecognized,
+    InvalidMonomorphizationExpectedSignedUnsigned,
+    InvalidMonomorphizationUnsupportedElement,
+    InvalidMonomorphizationInvalidBitmask,
+    InvalidMonomorphizationSimdShuffle,
+    InvalidMonomorphizationExpectedSimd,
+    InvalidMonomorphizationMaskType,
+    InvalidMonomorphizationReturnLength,
+    InvalidMonomorphizationReturnLengthInputType,
+    InvalidMonomorphizationReturnElement,
+    InvalidMonomorphizationReturnType,
+    InvalidMonomorphizationInsertedType,
+    InvalidMonomorphizationReturnIntegerType,
+    InvalidMonomorphizationMismatchedLengths,
+    InvalidMonomorphizationUnsupportedOperation
+};
 
 pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>, name: Symbol, callee_ty: Ty<'tcx>, args: &[OperandRef<'tcx, RValue<'gcc>>], ret_ty: Ty<'tcx>, llret_ty: Type<'gcc>, span: Span) -> Result<RValue<'gcc>, ()> {
     // macros for error handling:
-    #[allow(unused_macro_rules)]
-    macro_rules! emit_error {
-        ($msg: tt) => {
-            emit_error!($msg, )
-        };
-        ($msg: tt, $($fmt: tt)*) => {
-            span_invalid_monomorphization_error(
-                bx.sess(), span,
-                &format!(concat!("invalid monomorphization of `{}` intrinsic: ", $msg),
-                         name, $($fmt)*));
-        }
-    }
-
     macro_rules! return_error {
-        ($($fmt: tt)*) => {
+        ($err:expr) => {
             {
-                emit_error!($($fmt)*);
+                bx.sess().emit_err($err);
                 return Err(());
             }
         }
     }
-
     macro_rules! require {
-        ($cond: expr, $($fmt: tt)*) => {
+        ($cond:expr, $err:expr) => {
             if !$cond {
-                return_error!($($fmt)*);
+                return_error!($err);
             }
-        };
+        }
     }
-
     macro_rules! require_simd {
         ($ty: expr, $position: expr) => {
-            require!($ty.is_simd(), "expected SIMD {} type, found non-SIMD `{}`", $position, $ty)
+            require!($ty.is_simd(), InvalidMonomorphizationExpectedSimd { span, name, position: $position, found_ty: $ty })
         };
     }
 
@@ -83,10 +87,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                 bx.load(int_ty, ptr, Align::ONE)
             }
             _ => return_error!(
-                "invalid bitmask `{}`, expected `u{}` or `[u8; {}]`",
-                mask_ty,
-                expected_int_bits,
-                expected_bytes
+                InvalidMonomorphizationInvalidBitmask { span, name, ty: mask_ty, expected_int_bits, expected_bytes }
             ),
         };
 
@@ -133,18 +134,11 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let (out_len, out_ty) = ret_ty.simd_size_and_type(bx.tcx());
         require!(
             in_len == out_len,
-            "expected return type with length {} (same as input type `{}`), \
-             found `{}` with length {}",
-            in_len,
-            in_ty,
-            ret_ty,
-            out_len
+            InvalidMonomorphizationReturnLengthInputType { span, name, in_len, in_ty, ret_ty, out_len }
         );
         require!(
             bx.type_kind(bx.element_type(llret_ty)) == TypeKind::Integer,
-            "expected return type with integer elements, found `{}` with non-integer `{}`",
-            ret_ty,
-            out_ty
+            InvalidMonomorphizationReturnIntegerType {span, name, ret_ty, out_ty}
         );
 
         return Ok(compare_simd_types(
@@ -169,8 +163,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                         })
                     }
                     _ => return_error!(
-                        "simd_shuffle index must be an array of `u32`, got `{}`",
-                        args[2].layout.ty
+                        InvalidMonomorphizationSimdShuffle { span, name, ty: args[2].layout.ty }
                     ),
                 }
             }
@@ -185,19 +178,11 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let (out_len, out_ty) = ret_ty.simd_size_and_type(bx.tcx());
         require!(
             out_len == n,
-            "expected return type of length {}, found `{}` with length {}",
-            n,
-            ret_ty,
-            out_len
+            InvalidMonomorphizationReturnLength { span, name, in_len: n, ret_ty, out_len }
         );
         require!(
             in_elem == out_ty,
-            "expected return element type `{}` (element of input `{}`), \
-             found `{}` with element type `{}`",
-            in_elem,
-            in_ty,
-            ret_ty,
-            out_ty
+            InvalidMonomorphizationReturnElement { span, name, in_elem, in_ty, ret_ty, out_ty }
         );
 
         let vector = args[2].immediate();
@@ -213,10 +198,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
     if name == sym::simd_insert {
         require!(
             in_elem == arg_tys[2],
-            "expected inserted type `{}` (element of input `{}`), found `{}`",
-            in_elem,
-            in_ty,
-            arg_tys[2]
+            InvalidMonomorphizationInsertedType { span, name, in_elem, in_ty, out_ty: arg_tys[2] }
         );
         let vector = args[0].immediate();
         let index = args[1].immediate();
@@ -233,10 +215,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
     if name == sym::simd_extract {
         require!(
             ret_ty == in_elem,
-            "expected return type `{}` (element of input `{}`), found `{}`",
-            in_elem,
-            in_ty,
-            ret_ty
+            InvalidMonomorphizationReturnType { span, name, in_elem, in_ty, ret_ty }
         );
         let vector = args[0].immediate();
         return Ok(bx.context.new_vector_access(None, vector, args[1].immediate()).to_rvalue());
@@ -249,13 +228,11 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let (v_len, _) = arg_tys[1].simd_size_and_type(bx.tcx());
         require!(
             m_len == v_len,
-            "mismatched lengths: mask length `{}` != other vector length `{}`",
-            m_len,
-            v_len
+            InvalidMonomorphizationMismatchedLengths { span, name, m_len, v_len }
         );
         match m_elem_ty.kind() {
             ty::Int(_) => {}
-            _ => return_error!("mask element type is `{}`, expected `i_`", m_elem_ty),
+            _ => return_error!(InvalidMonomorphizationMaskType { span, name, ty: m_elem_ty }),
         }
         return Ok(bx.vector_select(args[0].immediate(), args[1].immediate(), args[2].immediate()));
     }
@@ -266,12 +243,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let (out_len, out_elem) = ret_ty.simd_size_and_type(bx.tcx());
         require!(
             in_len == out_len,
-            "expected return type with length {} (same as input type `{}`), \
-                  found `{}` with length {}",
-            in_len,
-            in_ty,
-            ret_ty,
-            out_len
+            InvalidMonomorphizationReturnLengthInputType { span, name, in_len, in_ty, ret_ty, out_len }
         );
         // casting cares about nominal type, not just structural type
         if in_elem == out_elem {
@@ -322,10 +294,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                     })*
                     _ => {},
                 }
-                require!(false,
-                         "unsupported operation on `{}` with element `{}`",
-                         in_ty,
-                         in_elem)
+                return_error!(InvalidMonomorphizationUnsupportedOperation { span, name, in_ty, in_elem })
             })*
         }
     }
@@ -403,23 +372,14 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         span: Span,
         args: &[OperandRef<'tcx, RValue<'gcc>>],
     ) -> Result<RValue<'gcc>, ()> {
-        macro_rules! emit_error {
-            ($msg: tt, $($fmt: tt)*) => {
-                span_invalid_monomorphization_error(
-                    bx.sess(), span,
-                    &format!(concat!("invalid monomorphization of `{}` intrinsic: ", $msg),
-                             name, $($fmt)*));
-            }
-        }
         macro_rules! return_error {
-            ($($fmt: tt)*) => {
+            ($err:expr) => {
                 {
-                    emit_error!($($fmt)*);
+                    bx.sess().emit_err($err);
                     return Err(());
                 }
             }
         }
-
         let (elem_ty_str, elem_ty) =
             if let ty::Float(f) = in_elem.kind() {
                 let elem_ty = bx.cx.type_float_from_ty(*f);
@@ -427,16 +387,13 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                     32 => ("f", elem_ty),
                     64 => ("", elem_ty),
                     _ => {
-                        return_error!(
-                            "unsupported element type `{}` of floating-point vector `{}`",
-                            f.name_str(),
-                            in_ty
-                        );
+                        // Can we pass elem_ty directly?
+                        return_error!(InvalidMonomorphizationInvalidFloatVector { span, name, elem_ty: f.name_str(), vec_ty: in_ty });
                     }
                 }
             }
             else {
-                return_error!("`{}` is not a floating-point type", in_ty);
+                return_error!(InvalidMonomorphizationNotFloat { span, name, ty: in_ty });
             };
 
         let vec_ty = bx.cx.type_vector(elem_ty, in_len);
@@ -459,7 +416,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                 sym::simd_fsqrt => "sqrt",
                 sym::simd_round => "round",
                 sym::simd_trunc => "trunc",
-                _ => return_error!("unrecognized intrinsic `{}`", name),
+                _ => return_error!(InvalidMonomorphizationUnrecognized { span, name })
             };
         let builtin_name = format!("{}{}", intr_name, elem_ty_str);
         let funcs = bx.cx.functions.borrow();
@@ -813,10 +770,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                     })*
                     _ => {},
                 }
-                require!(false,
-                         "unsupported operation on `{}` with element `{}`",
-                         in_ty,
-                         in_elem)
+                return_error!(InvalidMonomorphizationUnsupportedOperation { span, name, in_ty, in_elem })
             })*
         }
     }
@@ -836,13 +790,25 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                 ty::Int(i) => (true, i.bit_width().unwrap_or(ptr_bits) / 8, bx.cx.type_int_from_ty(i)),
                 ty::Uint(i) => (false, i.bit_width().unwrap_or(ptr_bits) / 8, bx.cx.type_uint_from_ty(i)),
                 _ => {
-                    return_error!(
-                        "expected element type `{}` of vector type `{}` \
-                     to be a signed or unsigned integer type",
-                     arg_tys[0].simd_size_and_type(bx.tcx()).1,
-                     arg_tys[0]
-                    );
-                }
+                return_error!(InvalidMonomorphizationExpectedSignedUnsigned {
+                    span,
+                    name,
+                    elem_ty: arg_tys[0].simd_size_and_type(bx.tcx()).1,
+                    vec_ty: arg_tys[0],
+                });
+            }
+        };
+        let builtin_name =
+            match (signed, is_add, in_len, elem_width) {
+                (true, true, 32, 8) => "__builtin_ia32_paddsb256", // TODO(antoyo): cast arguments to unsigned.
+                (false, true, 32, 8) => "__builtin_ia32_paddusb256",
+                (true, true, 16, 16) => "__builtin_ia32_paddsw256",
+                (false, true, 16, 16) => "__builtin_ia32_paddusw256",
+                (true, false, 16, 16) => "__builtin_ia32_psubsw256",
+                (false, false, 16, 16) => "__builtin_ia32_psubusw256",
+                (true, false, 32, 8) => "__builtin_ia32_psubsb256",
+                (false, false, 32, 8) => "__builtin_ia32_psubusb256",
+                _ => unimplemented!("signed: {}, is_add: {}, in_len: {}, elem_width: {}", signed, is_add, in_len, elem_width),
             };
 
         let result =
@@ -924,10 +890,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
             if name == sym::$name {
                 require!(
                     ret_ty == in_elem,
-                    "expected return type `{}` (element of input `{}`), found `{}`",
-                    in_elem,
-                    in_ty,
-                    ret_ty
+                    InvalidMonomorphizationReturnType { span, name, in_elem, in_ty, ret_ty }
                 );
                 return match in_elem.kind() {
                     ty::Int(_) | ty::Uint(_) => {
@@ -951,13 +914,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                             Ok(bx.vector_reduce_op(args[0].immediate(), $vec_op))
                         }
                     }
-                    _ => return_error!(
-                        "unsupported {} from `{}` with element `{}` to `{}`",
-                        sym::$name,
-                        in_ty,
-                        in_elem,
-                        ret_ty
-                    ),
+                    _ => return_error!(InvalidMonomorphizationUnsupportedElement { span, name, in_ty, elem_ty: in_elem, ret_ty }),
                 };
             }
         };
@@ -998,21 +955,12 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
             if name == sym::$name {
                 require!(
                     ret_ty == in_elem,
-                    "expected return type `{}` (element of input `{}`), found `{}`",
-                    in_elem,
-                    in_ty,
-                    ret_ty
+                    InvalidMonomorphizationReturnType { span, name, in_elem, in_ty, ret_ty }
                 );
                 return match in_elem.kind() {
                     ty::Int(_) | ty::Uint(_) => Ok(bx.$int_red(args[0].immediate())),
                     ty::Float(_) => Ok(bx.$float_red(args[0].immediate())),
-                    _ => return_error!(
-                        "unsupported {} from `{}` with element `{}` to `{}`",
-                        sym::$name,
-                        in_ty,
-                        in_elem,
-                        ret_ty
-                    ),
+                    _ => return_error!(InvalidMonomorphizationUnsupportedElement { span, name, in_ty, elem_ty: in_elem, ret_ty }),
                 };
             }
         };
@@ -1030,22 +978,13 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                 let input = if !$boolean {
                     require!(
                         ret_ty == in_elem,
-                        "expected return type `{}` (element of input `{}`), found `{}`",
-                        in_elem,
-                        in_ty,
-                        ret_ty
+                        InvalidMonomorphizationReturnType { span, name, in_elem, in_ty, ret_ty }
                     );
                     args[0].immediate()
                 } else {
                     match in_elem.kind() {
                         ty::Int(_) | ty::Uint(_) => {}
-                        _ => return_error!(
-                            "unsupported {} from `{}` with element `{}` to `{}`",
-                            sym::$name,
-                            in_ty,
-                            in_elem,
-                            ret_ty
-                        ),
+                        _ => return_error!(InvalidMonomorphizationUnsupportedElement { span, name, in_ty, elem_ty: in_elem, ret_ty }),
                     }
 
                     args[0].immediate()
@@ -1056,11 +995,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                         Ok(if !$boolean { r } else { bx.icmp(IntPredicate::IntNE, r, bx.context.new_rvalue_zero(r.get_type())) })
                     }
                     _ => return_error!(
-                        "unsupported {} from `{}` with element `{}` to `{}`",
-                        sym::$name,
-                        in_ty,
-                        in_elem,
-                        ret_ty
+                        InvalidMonomorphizationUnsupportedElement { span, name, in_ty, elem_ty: in_elem, ret_ty }
                     ),
                 };
             }

From 2e46dc2cffaca41a17498a4392068dc51aa0349f Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Sun, 11 Sep 2022 17:34:51 -0700
Subject: [PATCH 257/997] impl SessionDiagnostic for LayoutError and Spanned<T>

---
 src/context.rs | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/src/context.rs b/src/context.rs
index f1f808caafe6..5341d0f75a66 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -14,7 +14,7 @@ use rustc_middle::mir::mono::CodegenUnit;
 use rustc_middle::ty::{self, Instance, ParamEnv, PolyExistentialTraitRef, Ty, TyCtxt};
 use rustc_middle::ty::layout::{FnAbiError, FnAbiOf, FnAbiOfHelpers, FnAbiRequest, HasParamEnv, HasTyCtxt, LayoutError, TyAndLayout, LayoutOfHelpers};
 use rustc_session::Session;
-use rustc_span::Span;
+use rustc_span::{Span, source_map::respan};
 use rustc_target::abi::{call::FnAbi, HasDataLayout, PointeeInfo, Size, TargetDataLayout, VariantIdx};
 use rustc_target::spec::{HasTargetSpec, Target, TlsModel};
 
@@ -493,6 +493,23 @@ impl<'gcc, 'tcx> LayoutOfHelpers<'tcx> for CodegenCx<'gcc, 'tcx> {
     #[inline]
     fn handle_layout_err(&self, err: LayoutError<'tcx>, span: Span, ty: Ty<'tcx>) -> ! {
         if let LayoutError::SizeOverflow(_) = err {
+            let _ = respan(span, err);
+            //             error: lifetime may not live long enough
+            //    --> src/context.rs:483:13
+            //     |
+            // 475 | impl<'gcc, 'tcx> LayoutOfHelpers<'tcx> for CodegenCx<'gcc, 'tcx> {
+            //     |      ----  ---- lifetime `'tcx` defined here
+            //     |      |
+            //     |      lifetime `'gcc` defined here
+            // ...
+            // 483 |             self.sess().emit_fatal(respan(span, err))
+            //     |             ^^^^^^^^^^^ argument requires that `'gcc` must outlive `'tcx`
+            //     |
+            //     = help: consider adding the following bound: `'gcc: 'tcx`
+            //     = note: requirement occurs because of the type `CodegenCx<'_, '_>`, which makes the generic argument `'_` invariant
+            //     = note: the struct `CodegenCx<'gcc, 'tcx>` is invariant over the parameter `'gcc`
+            //     = help: see <https://doc.rust-lang.org/nomicon/subtyping.html> for more information about variance
+            // self.sess().emit_fatal(respan(span, err))
             self.sess().emit_fatal(LayoutSizeOverflow { span, error: err.to_string() })
         } else {
             span_bug!(span, "failed to get layout for `{}`: {}", ty, err)

From 9bbb49150ace414bf0b10476de83fb5c2c4b6630 Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Sat, 24 Sep 2022 11:05:37 -0700
Subject: [PATCH 258/997] rebase and update trait names

---
 src/errors.rs | 50 +++++++++++++++++++++++++-------------------------
 1 file changed, 25 insertions(+), 25 deletions(-)

diff --git a/src/errors.rs b/src/errors.rs
index a70ebf62da3e..a1c95e7a7f45 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -1,5 +1,5 @@
 use rustc_errors::{DiagnosticArgValue, IntoDiagnosticArg};
-use rustc_macros::SessionDiagnostic;
+use rustc_macros::Diagnostic;
 use rustc_middle::ty::Ty;
 use rustc_span::{Span, Symbol};
 use std::borrow::Cow;
@@ -17,7 +17,7 @@ impl IntoDiagnosticArg for ExitCode {
     }
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::ranlib_failure)]
 pub(crate) struct RanlibFailure {
     exit_code: ExitCode,
@@ -30,7 +30,7 @@ impl RanlibFailure {
     }
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_basic_integer, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationBasicInteger<'a> {
     #[primary_span]
@@ -39,7 +39,7 @@ pub(crate) struct InvalidMonomorphizationBasicInteger<'a> {
     pub ty: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_invalid_float_vector, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationInvalidFloatVector<'a> {
     #[primary_span]
@@ -49,7 +49,7 @@ pub(crate) struct InvalidMonomorphizationInvalidFloatVector<'a> {
     pub vec_ty: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_not_float, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationNotFloat<'a> {
     #[primary_span]
@@ -58,7 +58,7 @@ pub(crate) struct InvalidMonomorphizationNotFloat<'a> {
     pub ty: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_unrecognized, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationUnrecognized {
     #[primary_span]
@@ -66,7 +66,7 @@ pub(crate) struct InvalidMonomorphizationUnrecognized {
     pub name: Symbol,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_expected_signed_unsigned, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationExpectedSignedUnsigned<'a> {
     #[primary_span]
@@ -76,7 +76,7 @@ pub(crate) struct InvalidMonomorphizationExpectedSignedUnsigned<'a> {
     pub vec_ty: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_unsupported_element, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationUnsupportedElement<'a> {
     #[primary_span]
@@ -87,7 +87,7 @@ pub(crate) struct InvalidMonomorphizationUnsupportedElement<'a> {
     pub ret_ty: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_invalid_bitmask, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationInvalidBitmask<'a> {
     #[primary_span]
@@ -98,7 +98,7 @@ pub(crate) struct InvalidMonomorphizationInvalidBitmask<'a> {
     pub expected_bytes: u64,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_simd_shuffle, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationSimdShuffle<'a> {
     #[primary_span]
@@ -107,7 +107,7 @@ pub(crate) struct InvalidMonomorphizationSimdShuffle<'a> {
     pub ty: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_expected_simd, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationExpectedSimd<'a> {
     #[primary_span]
@@ -117,7 +117,7 @@ pub(crate) struct InvalidMonomorphizationExpectedSimd<'a> {
     pub found_ty: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_mask_type, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationMaskType<'a> {
     #[primary_span]
@@ -126,7 +126,7 @@ pub(crate) struct InvalidMonomorphizationMaskType<'a> {
     pub ty: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_return_length, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationReturnLength<'a> {
     #[primary_span]
@@ -137,7 +137,7 @@ pub(crate) struct InvalidMonomorphizationReturnLength<'a> {
     pub out_len: u64,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_return_length_input_type, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationReturnLengthInputType<'a> {
     #[primary_span]
@@ -149,7 +149,7 @@ pub(crate) struct InvalidMonomorphizationReturnLengthInputType<'a> {
     pub out_len: u64,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_return_element, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationReturnElement<'a> {
     #[primary_span]
@@ -161,7 +161,7 @@ pub(crate) struct InvalidMonomorphizationReturnElement<'a> {
     pub out_ty: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_return_type, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationReturnType<'a> {
     #[primary_span]
@@ -172,7 +172,7 @@ pub(crate) struct InvalidMonomorphizationReturnType<'a> {
     pub ret_ty: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_inserted_type, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationInsertedType<'a> {
     #[primary_span]
@@ -183,7 +183,7 @@ pub(crate) struct InvalidMonomorphizationInsertedType<'a> {
     pub out_ty: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_return_integer_type, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationReturnIntegerType<'a> {
     #[primary_span]
@@ -193,7 +193,7 @@ pub(crate) struct InvalidMonomorphizationReturnIntegerType<'a> {
     pub out_ty: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_mismatched_lengths, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationMismatchedLengths {
     #[primary_span]
@@ -203,7 +203,7 @@ pub(crate) struct InvalidMonomorphizationMismatchedLengths {
     pub v_len: u64,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_unsupported_cast, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationUnsupportedCast<'a> {
     #[primary_span]
@@ -215,7 +215,7 @@ pub(crate) struct InvalidMonomorphizationUnsupportedCast<'a> {
     pub out_elem: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::invalid_monomorphization_unsupported_operation, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationUnsupportedOperation<'a> {
     #[primary_span]
@@ -225,7 +225,7 @@ pub(crate) struct InvalidMonomorphizationUnsupportedOperation<'a> {
     pub in_elem: Ty<'a>,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::layout_size_overflow)]
 pub(crate) struct LayoutSizeOverflow {
     #[primary_span]
@@ -233,18 +233,18 @@ pub(crate) struct LayoutSizeOverflow {
     pub error: String,
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::linkage_const_or_mut_type)]
 pub(crate) struct LinkageConstOrMutType {
     #[primary_span]
     pub span: Span
 }
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::lto_not_supported)]
 pub(crate) struct LTONotSupported;
 
-#[derive(SessionDiagnostic)]
+#[derive(Diagnostic)]
 #[diag(codegen_gcc::unwinding_inline_asm)]
 pub(crate) struct UnwindingInlineAsm {
     #[primary_span]

From 925b11ece042a545f848eabc3d990d461a890978 Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Sat, 24 Sep 2022 11:36:16 -0700
Subject: [PATCH 259/997] fix lifetime error

---
 src/context.rs | 24 +++---------------------
 src/errors.rs  |  8 --------
 2 files changed, 3 insertions(+), 29 deletions(-)

diff --git a/src/context.rs b/src/context.rs
index 5341d0f75a66..ec3c3a972503 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -19,7 +19,6 @@ use rustc_target::abi::{call::FnAbi, HasDataLayout, PointeeInfo, Size, TargetDat
 use rustc_target::spec::{HasTargetSpec, Target, TlsModel};
 
 use crate::callee::get_fn;
-use crate::errors::LayoutSizeOverflow;
 
 #[derive(Clone)]
 pub struct FuncSig<'gcc> {
@@ -299,7 +298,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         self.is_native_int_type(typ) || self.is_non_native_int_type(typ) || typ.is_compatible_with(self.bool_type)
     }
 
-    pub fn sess(&self) -> &Session {
+    pub fn sess(&self) -> &'tcx Session {
         &self.tcx.sess
     }
 
@@ -493,24 +492,7 @@ impl<'gcc, 'tcx> LayoutOfHelpers<'tcx> for CodegenCx<'gcc, 'tcx> {
     #[inline]
     fn handle_layout_err(&self, err: LayoutError<'tcx>, span: Span, ty: Ty<'tcx>) -> ! {
         if let LayoutError::SizeOverflow(_) = err {
-            let _ = respan(span, err);
-            //             error: lifetime may not live long enough
-            //    --> src/context.rs:483:13
-            //     |
-            // 475 | impl<'gcc, 'tcx> LayoutOfHelpers<'tcx> for CodegenCx<'gcc, 'tcx> {
-            //     |      ----  ---- lifetime `'tcx` defined here
-            //     |      |
-            //     |      lifetime `'gcc` defined here
-            // ...
-            // 483 |             self.sess().emit_fatal(respan(span, err))
-            //     |             ^^^^^^^^^^^ argument requires that `'gcc` must outlive `'tcx`
-            //     |
-            //     = help: consider adding the following bound: `'gcc: 'tcx`
-            //     = note: requirement occurs because of the type `CodegenCx<'_, '_>`, which makes the generic argument `'_` invariant
-            //     = note: the struct `CodegenCx<'gcc, 'tcx>` is invariant over the parameter `'gcc`
-            //     = help: see <https://doc.rust-lang.org/nomicon/subtyping.html> for more information about variance
-            // self.sess().emit_fatal(respan(span, err))
-            self.sess().emit_fatal(LayoutSizeOverflow { span, error: err.to_string() })
+            self.sess().emit_fatal(respan(span, err))
         } else {
             span_bug!(span, "failed to get layout for `{}`: {}", ty, err)
         }
@@ -528,7 +510,7 @@ impl<'gcc, 'tcx> FnAbiOfHelpers<'tcx> for CodegenCx<'gcc, 'tcx> {
         fn_abi_request: FnAbiRequest<'tcx>,
     ) -> ! {
         if let FnAbiError::Layout(LayoutError::SizeOverflow(_)) = err {
-            self.sess().emit_fatal(LayoutSizeOverflow { span, error: err.to_string() })
+            self.sess().emit_fatal(respan(span, err))
         } else {
             match fn_abi_request {
                 FnAbiRequest::OfFnPtr { sig, extra_args } => {
diff --git a/src/errors.rs b/src/errors.rs
index a1c95e7a7f45..eb8528104fac 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -225,14 +225,6 @@ pub(crate) struct InvalidMonomorphizationUnsupportedOperation<'a> {
     pub in_elem: Ty<'a>,
 }
 
-#[derive(Diagnostic)]
-#[diag(codegen_gcc::layout_size_overflow)]
-pub(crate) struct LayoutSizeOverflow {
-    #[primary_span]
-    pub span: Span,
-    pub error: String,
-}
-
 #[derive(Diagnostic)]
 #[diag(codegen_gcc::linkage_const_or_mut_type)]
 pub(crate) struct LinkageConstOrMutType {

From 70aeb9e2b316829398940194d949a1130842e9cc Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Sat, 24 Sep 2022 15:03:14 -0700
Subject: [PATCH 260/997] remove comment

---
 src/intrinsic/simd.rs | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index f95db2271b33..ff75543ecd1e 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -387,7 +387,6 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                     32 => ("f", elem_ty),
                     64 => ("", elem_ty),
                     _ => {
-                        // Can we pass elem_ty directly?
                         return_error!(InvalidMonomorphizationInvalidFloatVector { span, name, elem_ty: f.name_str(), vec_ty: in_ty });
                     }
                 }

From 9c67dcfe423cb08873a3c9cde1190ed9a607381a Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Mon, 26 Sep 2022 19:57:40 -0700
Subject: [PATCH 261/997] lint and remove unused diagnostic

---
 src/errors.rs | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/src/errors.rs b/src/errors.rs
index eb8528104fac..83f4af16612e 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -4,13 +4,12 @@ use rustc_middle::ty::Ty;
 use rustc_span::{Span, Symbol};
 use std::borrow::Cow;
 
-struct ExitCode {
-    pub exit_code: Option<i32>,
-}
+struct ExitCode(Option<i32>);
 
 impl IntoDiagnosticArg for ExitCode {
     fn into_diagnostic_arg(self) -> DiagnosticArgValue<'static> {
-        match self.exit_code {
+        let ExitCode(exit_code) = self;
+        match exit_code {
             Some(t) => t.into_diagnostic_arg(),
             None => DiagnosticArgValue::Str(Cow::Borrowed("None")),
         }
@@ -25,8 +24,7 @@ pub(crate) struct RanlibFailure {
 
 impl RanlibFailure {
     pub fn new(exit_code: Option<i32>) -> Self {
-        let exit_code = ExitCode{ exit_code };
-        RanlibFailure { exit_code }
+        RanlibFailure { exit_code: ExitCode(exit_code) }
     }
 }
 

From 5c30c25f07d1144ff1945e4ef1ee56aefd53bc9d Mon Sep 17 00:00:00 2001
From: Ellis Hoag <ellis.sparky.hoag@gmail.com>
Date: Wed, 28 Sep 2022 19:02:38 -0700
Subject: [PATCH 262/997] print <signal> when ranlib failed without an exit
 code

---
 src/errors.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/errors.rs b/src/errors.rs
index 83f4af16612e..d7816e395c8e 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -11,7 +11,7 @@ impl IntoDiagnosticArg for ExitCode {
         let ExitCode(exit_code) = self;
         match exit_code {
             Some(t) => t.into_diagnostic_arg(),
-            None => DiagnosticArgValue::Str(Cow::Borrowed("None")),
+            None => DiagnosticArgValue::Str(Cow::Borrowed("<signal>")),
         }
     }
 }

From 5943166b299ba66d26fa343b06d72b567e82ce1b Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Sat, 1 Oct 2022 16:34:45 +0000
Subject: [PATCH 263/997] Remove unused Context assoc type from
 WriteBackendMethods

---
 src/lib.rs | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/lib.rs b/src/lib.rs
index b660029a4af9..3b631e7e18d4 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -212,7 +212,6 @@ impl WriteBackendMethods for GccCodegenBackend {
     type Module = GccContext;
     type TargetMachine = ();
     type ModuleBuffer = ModuleBuffer;
-    type Context = ();
     type ThinData = ();
     type ThinBuffer = ThinBuffer;
 

From 5d5c5f92fbdfb6a513a679f397041f0a92e84e0f Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Sat, 1 Oct 2022 16:45:07 +0000
Subject: [PATCH 264/997] Remove several unused methods from MiscMethods

---
 src/context.rs | 16 ----------------
 1 file changed, 16 deletions(-)

diff --git a/src/context.rs b/src/context.rs
index ec3c3a972503..a4c63c0be1f9 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -431,10 +431,6 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         self.codegen_unit
     }
 
-    fn used_statics(&self) -> &RefCell<Vec<RValue<'gcc>>> {
-        unimplemented!();
-    }
-
     fn set_frame_pointer_type(&self, _llfn: RValue<'gcc>) {
         // TODO(antoyo)
     }
@@ -443,10 +439,6 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         // TODO(antoyo)
     }
 
-    fn create_used_variable(&self) {
-        unimplemented!();
-    }
-
     fn declare_c_main(&self, fn_type: Self::Type) -> Option<Self::Function> {
         if self.get_declared_value("main").is_none() {
             Some(self.declare_cfn("main", fn_type))
@@ -458,14 +450,6 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
             None
         }
     }
-
-    fn compiler_used_statics(&self) -> &RefCell<Vec<RValue<'gcc>>> {
-        unimplemented!()
-    }
-
-    fn create_compiler_used_variable(&self) {
-        unimplemented!()
-    }
 }
 
 impl<'gcc, 'tcx> HasTyCtxt<'tcx> for CodegenCx<'gcc, 'tcx> {

From 15b0747049300aca6e90c38b4a25f10cc2f89d29 Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Sat, 1 Oct 2022 16:45:33 +0000
Subject: [PATCH 265/997] Remove unused target_cpu and tune_cpu methods from
 ExtraBackendMethods

---
 src/lib.rs | 9 ---------
 1 file changed, 9 deletions(-)

diff --git a/src/lib.rs b/src/lib.rs
index 3b631e7e18d4..0d5272eb0074 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -173,15 +173,6 @@ impl ExtraBackendMethods for GccCodegenBackend {
             Ok(())
         })
     }
-
-    fn target_cpu<'b>(&self, _sess: &'b Session) -> &'b str {
-        unimplemented!();
-    }
-
-    fn tune_cpu<'b>(&self, _sess: &'b Session) -> Option<&'b str> {
-        None
-        // TODO(antoyo)
-    }
 }
 
 pub struct ModuleBuffer;

From d9933199cd1f85a51c6b9bb732c543419c188161 Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Sat, 1 Oct 2022 17:01:31 +0000
Subject: [PATCH 266/997] Merge apply_attrs_callsite into call and invoke

Some codegen backends are not able to apply callsite attrs after the fact.
---
 src/abi.rs           |  4 ----
 src/asm.rs           |  2 +-
 src/builder.rs       | 24 +++++++++++++++++++-----
 src/intrinsic/mod.rs |  6 +++---
 4 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 848c34211ff6..6fb1cbfad8cd 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -11,10 +11,6 @@ use crate::intrinsic::ArgAbiExt;
 use crate::type_of::LayoutGccExt;
 
 impl<'a, 'gcc, 'tcx> AbiBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
-    fn apply_attrs_callsite(&mut self, _fn_abi: &FnAbi<'tcx, Ty<'tcx>>, _callsite: Self::Value) {
-        // TODO(antoyo)
-    }
-
     fn get_param(&mut self, index: usize) -> Self::Value {
         let func = self.current_func();
         let param = func.get_param(index as i32);
diff --git a/src/asm.rs b/src/asm.rs
index b8ca1c3fd612..41e9d61a10e5 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -501,7 +501,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         if options.contains(InlineAsmOptions::NORETURN) {
             let builtin_unreachable = self.context.get_builtin_function("__builtin_unreachable");
             let builtin_unreachable: RValue<'gcc> = unsafe { std::mem::transmute(builtin_unreachable) };
-            self.call(self.type_void(), builtin_unreachable, &[], None);
+            self.call(self.type_void(), None, builtin_unreachable, &[], None);
         }
 
         // Write results to outputs.
diff --git a/src/builder.rs b/src/builder.rs
index a560539d6e1e..9cf2d6519015 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -455,7 +455,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     #[cfg(feature="master")]
-    fn invoke(&mut self, typ: Type<'gcc>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
+    fn invoke(&mut self, typ: Type<'gcc>, fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
         let try_block = self.current_func().new_block("try");
 
         let current_block = self.block.clone();
@@ -483,10 +483,13 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     #[cfg(not(feature="master"))]
-    fn invoke(&mut self, typ: Type<'gcc>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
-        let call_site = self.call(typ, func, args, None);
+    fn invoke(&mut self, typ: Type<'gcc>, fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
+        let call_site = self.call(typ, None, func, args, None);
         let condition = self.context.new_rvalue_from_int(self.bool_type, 1);
         self.llbb().end_with_conditional(None, condition, then, catch);
+        if let Some(_fn_abi) = fn_abi {
+            // TODO(bjorn3): Apply function attributes
+        }
         call_site
     }
 
@@ -1359,16 +1362,27 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // TODO(antoyo)
     }
 
-    fn call(&mut self, _typ: Type<'gcc>, func: RValue<'gcc>, args: &[RValue<'gcc>], funclet: Option<&Funclet>) -> RValue<'gcc> {
+    fn call(
+        &mut self,
+        _typ: Type<'gcc>,
+        fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>,
+        func: RValue<'gcc>,
+        args: &[RValue<'gcc>],
+        funclet: Option<&Funclet>,
+    ) -> RValue<'gcc> {
         // FIXME(antoyo): remove when having a proper API.
         let gcc_func = unsafe { std::mem::transmute(func) };
-        if self.functions.borrow().values().find(|value| **value == gcc_func).is_some() {
+        let call = if self.functions.borrow().values().find(|value| **value == gcc_func).is_some() {
             self.function_call(func, args, funclet)
         }
         else {
             // If it's a not function that was defined, it's a function pointer.
             self.function_ptr_call(func, args, funclet)
+        };
+        if let Some(_fn_abi) = fn_abi {
+            // TODO(bjorn3): Apply function attributes
         }
+        call
     }
 
     fn zext(&mut self, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index bdeede2ab5e6..b58381871a9c 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -111,7 +111,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 _ if simple.is_some() => {
                     // FIXME(antoyo): remove this cast when the API supports function.
                     let func = unsafe { std::mem::transmute(simple.expect("simple")) };
-                    self.call(self.type_void(), func, &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(), None)
+                    self.call(self.type_void(), None, func, &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(), None)
                 },
                 sym::likely => {
                     self.expect(args[0].immediate(), true)
@@ -352,7 +352,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn abort(&mut self) {
         let func = self.context.get_builtin_function("abort");
         let func: RValue<'gcc> = unsafe { std::mem::transmute(func) };
-        self.call(self.type_void(), func, &[], None);
+        self.call(self.type_void(), None, func, &[], None);
     }
 
     fn assume(&mut self, value: Self::Value) {
@@ -1133,7 +1133,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
 fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(bx: &'b mut Builder<'a, 'gcc, 'tcx>, try_func: RValue<'gcc>, data: RValue<'gcc>, _catch_func: RValue<'gcc>, dest: RValue<'gcc>) {
     if bx.sess().panic_strategy() == PanicStrategy::Abort {
-        bx.call(bx.type_void(), try_func, &[data], None);
+        bx.call(bx.type_void(), None, try_func, &[data], None);
         // Return 0 unconditionally from the intrinsic call;
         // we can never unwind.
         let ret_align = bx.tcx.data_layout.i32_align.abi;

From b909493151dbe517c9c897eb81de3346e0d451f9 Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Sat, 1 Oct 2022 17:34:21 +0000
Subject: [PATCH 267/997] Remove dynamic_alloca from BuilderMethods

---
 src/builder.rs | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 9cf2d6519015..e3d4462cb2b5 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -714,10 +714,6 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.current_func().new_local(None, aligned_type, &format!("stack_var_{}", self.stack_var_count.get())).get_address(None)
     }
 
-    fn dynamic_alloca(&mut self, _ty: Type<'gcc>, _align: Align) -> RValue<'gcc> {
-        unimplemented!();
-    }
-
     fn array_alloca(&mut self, _ty: Type<'gcc>, _len: RValue<'gcc>, _align: Align) -> RValue<'gcc> {
         unimplemented!();
     }

From 4310bbdfa6bdd2fa5ebbd9cd32c850ee12bcd0a2 Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Sat, 1 Oct 2022 18:22:46 +0000
Subject: [PATCH 268/997] Remove type argument of array_alloca and rename to
 byte_array_alloca

---
 src/builder.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/builder.rs b/src/builder.rs
index e3d4462cb2b5..c43895ee5650 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -714,7 +714,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.current_func().new_local(None, aligned_type, &format!("stack_var_{}", self.stack_var_count.get())).get_address(None)
     }
 
-    fn array_alloca(&mut self, _ty: Type<'gcc>, _len: RValue<'gcc>, _align: Align) -> RValue<'gcc> {
+    fn byte_array_alloca(&mut self, _len: RValue<'gcc>, _align: Align) -> RValue<'gcc> {
         unimplemented!();
     }
 

From affe23bc3bf80ab00e3b32fea628846455028f48 Mon Sep 17 00:00:00 2001
From: Amanieu d'Antras <amanieu@gmail.com>
Date: Mon, 17 Oct 2022 22:38:37 +0100
Subject: [PATCH 269/997] Stabilize asm_sym

---
 tests/run/asm.rs | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/tests/run/asm.rs b/tests/run/asm.rs
index 46abbb553bf2..38c1eac7adf6 100644
--- a/tests/run/asm.rs
+++ b/tests/run/asm.rs
@@ -3,11 +3,12 @@
 // Run-time:
 //   status: 0
 
-#![feature(asm_const, asm_sym)]
+#![feature(asm_const)]
 
 use std::arch::{asm, global_asm};
 
-global_asm!("
+global_asm!(
+    "
     .global add_asm
 add_asm:
      mov rax, rdi
@@ -132,7 +133,9 @@ fn main() {
     assert_eq!(x, 43);
 
     // check sym fn
-    extern "C" fn foo() -> u64 { 42 }
+    extern "C" fn foo() -> u64 {
+        42
+    }
     let x: u64;
     unsafe {
         asm!("call {}", sym foo, lateout("rax") x);

From dbe3df3d84450403802f036bbb7bb17bf7841937 Mon Sep 17 00:00:00 2001
From: Nilstrieb <48135649+Nilstrieb@users.noreply.github.com>
Date: Sat, 22 Oct 2022 11:07:54 +0200
Subject: [PATCH 270/997] Migrate all diagnostics

---
 src/errors.rs | 46 +++++++++++++++++++++++-----------------------
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/src/errors.rs b/src/errors.rs
index d7816e395c8e..15ad90f9043c 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -17,7 +17,7 @@ impl IntoDiagnosticArg for ExitCode {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::ranlib_failure)]
+#[diag(codegen_gcc_ranlib_failure)]
 pub(crate) struct RanlibFailure {
     exit_code: ExitCode,
 }
@@ -29,7 +29,7 @@ impl RanlibFailure {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_basic_integer, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_basic_integer, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationBasicInteger<'a> {
     #[primary_span]
     pub span: Span,
@@ -38,7 +38,7 @@ pub(crate) struct InvalidMonomorphizationBasicInteger<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_invalid_float_vector, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_invalid_float_vector, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationInvalidFloatVector<'a> {
     #[primary_span]
     pub span: Span,
@@ -48,7 +48,7 @@ pub(crate) struct InvalidMonomorphizationInvalidFloatVector<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_not_float, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_not_float, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationNotFloat<'a> {
     #[primary_span]
     pub span: Span,
@@ -57,7 +57,7 @@ pub(crate) struct InvalidMonomorphizationNotFloat<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_unrecognized, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_unrecognized, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationUnrecognized {
     #[primary_span]
     pub span: Span,
@@ -65,7 +65,7 @@ pub(crate) struct InvalidMonomorphizationUnrecognized {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_expected_signed_unsigned, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_expected_signed_unsigned, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationExpectedSignedUnsigned<'a> {
     #[primary_span]
     pub span: Span,
@@ -75,7 +75,7 @@ pub(crate) struct InvalidMonomorphizationExpectedSignedUnsigned<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_unsupported_element, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_unsupported_element, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationUnsupportedElement<'a> {
     #[primary_span]
     pub span: Span,
@@ -86,7 +86,7 @@ pub(crate) struct InvalidMonomorphizationUnsupportedElement<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_invalid_bitmask, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_invalid_bitmask, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationInvalidBitmask<'a> {
     #[primary_span]
     pub span: Span,
@@ -97,7 +97,7 @@ pub(crate) struct InvalidMonomorphizationInvalidBitmask<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_simd_shuffle, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_simd_shuffle, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationSimdShuffle<'a> {
     #[primary_span]
     pub span: Span,
@@ -106,7 +106,7 @@ pub(crate) struct InvalidMonomorphizationSimdShuffle<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_expected_simd, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_expected_simd, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationExpectedSimd<'a> {
     #[primary_span]
     pub span: Span,
@@ -116,7 +116,7 @@ pub(crate) struct InvalidMonomorphizationExpectedSimd<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_mask_type, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_mask_type, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationMaskType<'a> {
     #[primary_span]
     pub span: Span,
@@ -125,7 +125,7 @@ pub(crate) struct InvalidMonomorphizationMaskType<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_return_length, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_return_length, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationReturnLength<'a> {
     #[primary_span]
     pub span: Span,
@@ -136,7 +136,7 @@ pub(crate) struct InvalidMonomorphizationReturnLength<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_return_length_input_type, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_return_length_input_type, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationReturnLengthInputType<'a> {
     #[primary_span]
     pub span: Span,
@@ -148,7 +148,7 @@ pub(crate) struct InvalidMonomorphizationReturnLengthInputType<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_return_element, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_return_element, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationReturnElement<'a> {
     #[primary_span]
     pub span: Span,
@@ -160,7 +160,7 @@ pub(crate) struct InvalidMonomorphizationReturnElement<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_return_type, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_return_type, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationReturnType<'a> {
     #[primary_span]
     pub span: Span,
@@ -171,7 +171,7 @@ pub(crate) struct InvalidMonomorphizationReturnType<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_inserted_type, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_inserted_type, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationInsertedType<'a> {
     #[primary_span]
     pub span: Span,
@@ -182,7 +182,7 @@ pub(crate) struct InvalidMonomorphizationInsertedType<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_return_integer_type, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_return_integer_type, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationReturnIntegerType<'a> {
     #[primary_span]
     pub span: Span,
@@ -192,7 +192,7 @@ pub(crate) struct InvalidMonomorphizationReturnIntegerType<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_mismatched_lengths, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_mismatched_lengths, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationMismatchedLengths {
     #[primary_span]
     pub span: Span,
@@ -202,7 +202,7 @@ pub(crate) struct InvalidMonomorphizationMismatchedLengths {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_unsupported_cast, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_unsupported_cast, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationUnsupportedCast<'a> {
     #[primary_span]
     pub span: Span,
@@ -214,7 +214,7 @@ pub(crate) struct InvalidMonomorphizationUnsupportedCast<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::invalid_monomorphization_unsupported_operation, code = "E0511")]
+#[diag(codegen_gcc_invalid_monomorphization_unsupported_operation, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationUnsupportedOperation<'a> {
     #[primary_span]
     pub span: Span,
@@ -224,18 +224,18 @@ pub(crate) struct InvalidMonomorphizationUnsupportedOperation<'a> {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::linkage_const_or_mut_type)]
+#[diag(codegen_gcc_linkage_const_or_mut_type)]
 pub(crate) struct LinkageConstOrMutType {
     #[primary_span]
     pub span: Span
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::lto_not_supported)]
+#[diag(codegen_gcc_lto_not_supported)]
 pub(crate) struct LTONotSupported;
 
 #[derive(Diagnostic)]
-#[diag(codegen_gcc::unwinding_inline_asm)]
+#[diag(codegen_gcc_unwinding_inline_asm)]
 pub(crate) struct UnwindingInlineAsm {
     #[primary_span]
     pub span: Span

From 4c0a6e610e5ff15cc1a8c0e4d731083405b5da87 Mon Sep 17 00:00:00 2001
From: Daniel Paoliello <danpao@microsoft.com>
Date: Wed, 12 Oct 2022 14:44:01 -0700
Subject: [PATCH 271/997] Support raw-dylib functions being used inside inlined
 functions

---
 src/archive.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/archive.rs b/src/archive.rs
index ac0342f6b80a..f18ae7ea5e9b 100644
--- a/src/archive.rs
+++ b/src/archive.rs
@@ -47,6 +47,7 @@ impl ArchiveBuilderBuilder for ArArchiveBuilderBuilder {
         _lib_name: &str,
         _dll_imports: &[DllImport],
         _tmpdir: &Path,
+        _is_direct_dependency: bool,
     ) -> PathBuf {
         unimplemented!();
     }

From dd930a3b5cff68646f1fd4eff7256a9a25302ceb Mon Sep 17 00:00:00 2001
From: Amanieu d'Antras <amanieu@gmail.com>
Date: Fri, 14 Oct 2022 02:24:58 +0100
Subject: [PATCH 272/997] Rewrite implementation of `#[alloc_error_handler]`

The new implementation doesn't use weak lang items and instead changes
`#[alloc_error_handler]` to an attribute macro just like
`#[global_allocator]`.

The attribute will generate the `__rg_oom` function which is called by
the compiler-generated `__rust_alloc_error_handler`. If no `__rg_oom`
function is defined in any crate then the compiler shim will call
`__rdl_oom` in the alloc crate which will simply panic.

This also fixes link errors with `-C link-dead-code` with
`default_alloc_error_handler`: `__rg_oom` was previously defined in the
alloc crate and would attempt to reference the `oom` lang item, even if
it didn't exist. This worked as long as `__rg_oom` was excluded from
linking since it was not called.

This is a prerequisite for the stabilization of
`default_alloc_error_handler` (#102318).
---
 src/allocator.rs | 11 ++---------
 src/lib.rs       |  4 ++--
 2 files changed, 4 insertions(+), 11 deletions(-)

diff --git a/src/allocator.rs b/src/allocator.rs
index 11482c69d594..4bad33ee879e 100644
--- a/src/allocator.rs
+++ b/src/allocator.rs
@@ -9,7 +9,7 @@ use rustc_span::symbol::sym;
 
 use crate::GccContext;
 
-pub(crate) unsafe fn codegen(tcx: TyCtxt<'_>, mods: &mut GccContext, _module_name: &str, kind: AllocatorKind, has_alloc_error_handler: bool) {
+pub(crate) unsafe fn codegen(tcx: TyCtxt<'_>, mods: &mut GccContext, _module_name: &str, kind: AllocatorKind, alloc_error_handler_kind: AllocatorKind) {
     let context = &mods.context;
     let usize =
         match tcx.sess.target.pointer_width {
@@ -99,14 +99,7 @@ pub(crate) unsafe fn codegen(tcx: TyCtxt<'_>, mods: &mut GccContext, _module_nam
         func.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
     }
 
-    let kind =
-        if has_alloc_error_handler {
-            AllocatorKind::Global
-        }
-        else {
-            AllocatorKind::Default
-        };
-    let callee = kind.fn_name(sym::oom);
+    let callee = alloc_error_handler_kind.fn_name(sym::oom);
     let args: Vec<_> = types.iter().enumerate()
         .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
         .collect();
diff --git a/src/lib.rs b/src/lib.rs
index 0d5272eb0074..1261eb4aaa4a 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -155,11 +155,11 @@ impl CodegenBackend for GccCodegenBackend {
 }
 
 impl ExtraBackendMethods for GccCodegenBackend {
-    fn codegen_allocator<'tcx>(&self, tcx: TyCtxt<'tcx>, module_name: &str, kind: AllocatorKind, has_alloc_error_handler: bool) -> Self::Module {
+    fn codegen_allocator<'tcx>(&self, tcx: TyCtxt<'tcx>, module_name: &str, kind: AllocatorKind, alloc_error_handler_kind: AllocatorKind) -> Self::Module {
         let mut mods = GccContext {
             context: Context::default(),
         };
-        unsafe { allocator::codegen(tcx, &mut mods, module_name, kind, has_alloc_error_handler); }
+        unsafe { allocator::codegen(tcx, &mut mods, module_name, kind, alloc_error_handler_kind); }
         mods
     }
 

From a8978641504ba90aaaa41b2acb72578ea7bb328c Mon Sep 17 00:00:00 2001
From: Ayush Singh <ayushsingh1325@gmail.com>
Date: Sun, 6 Nov 2022 14:01:46 +0530
Subject: [PATCH 273/997] Add type_array to BaseTypeMethods

Moved type_array function to rustc_codegen_ssa::BaseTypeMethods trait.
This allows using normal alloca function to create arrays as suggested in
https://github.com/rust-lang/rust/pull/104022.

Signed-off-by: Ayush Singh <ayushsingh1325@gmail.com>
---
 src/type_.rs | 42 +++++++++++++++++++++++-------------------
 1 file changed, 23 insertions(+), 19 deletions(-)

diff --git a/src/type_.rs b/src/type_.rs
index d7eca2a33df7..58d4f2900600 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -201,6 +201,27 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn val_ty(&self, value: RValue<'gcc>) -> Type<'gcc> {
         value.get_type()
     }
+
+    fn type_array(&self, ty: Type<'gcc>, mut len: u64) -> Type<'gcc> {
+        if let Some(struct_type) = ty.is_struct() {
+            if struct_type.get_field_count() == 0 {
+                // NOTE: since gccjit only supports i32 for the array size and libcore's tests uses a
+                // size of usize::MAX in test_binary_search, we workaround this by setting the size to
+                // zero for ZSTs.
+                // FIXME(antoyo): fix gccjit API.
+                len = 0;
+            }
+        }
+
+        // NOTE: see note above. Some other test uses usize::MAX.
+        if len == u64::MAX {
+            len = 0;
+        }
+
+        let len: i32 = len.try_into().expect("array len");
+
+        self.context.new_array_type(None, ty, len)
+    }
 }
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
@@ -227,25 +248,8 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         self.context.new_opaque_struct_type(None, name)
     }
 
-    pub fn type_array(&self, ty: Type<'gcc>, mut len: u64) -> Type<'gcc> {
-        if let Some(struct_type) = ty.is_struct() {
-            if struct_type.get_field_count() == 0 {
-                // NOTE: since gccjit only supports i32 for the array size and libcore's tests uses a
-                // size of usize::MAX in test_binary_search, we workaround this by setting the size to
-                // zero for ZSTs.
-                // FIXME(antoyo): fix gccjit API.
-                len = 0;
-            }
-        }
-
-        // NOTE: see note above. Some other test uses usize::MAX.
-        if len == u64::MAX {
-            len = 0;
-        }
-
-        let len: i32 = len.try_into().expect("array len");
-
-        self.context.new_array_type(None, ty, len)
+    pub fn type_bool(&self) -> Type<'gcc> {
+        self.context.new_type::<bool>()
     }
 }
 

From fb747d0e24a38422d7b7f6b9372dd2ecfe6f408f Mon Sep 17 00:00:00 2001
From: Ralf Jung <post@ralfj.de>
Date: Sun, 13 Nov 2022 12:14:59 +0100
Subject: [PATCH 274/997] add is_sized method on Abi and Layout, and use it

---
 src/type_.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/type_.rs b/src/type_.rs
index 58d4f2900600..55e4d0c6289a 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -277,7 +277,7 @@ pub fn struct_fields<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout
         offset = target_offset + field.size;
         prev_effective_align = effective_field_align;
     }
-    if !layout.is_unsized() && field_count > 0 {
+    if layout.is_sized() && field_count > 0 {
         if offset > layout.size {
             bug!("layout: {:#?} stride: {:?} offset: {:?}", layout, layout.size, offset);
         }

From 5378b465f0fcb3c675950157cfc17c1ebf58295c Mon Sep 17 00:00:00 2001
From: Ralf Jung <post@ralfj.de>
Date: Sun, 6 Nov 2022 14:15:20 +0100
Subject: [PATCH 275/997] fix cranelift and gcc

---
 src/consts.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index be50850d82fc..7ffb345df9b6 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -279,12 +279,12 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
 pub fn const_alloc_to_gcc<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, alloc: ConstAllocation<'tcx>) -> RValue<'gcc> {
     let alloc = alloc.inner();
-    let mut llvals = Vec::with_capacity(alloc.provenance().len() + 1);
+    let mut llvals = Vec::with_capacity(alloc.provenance().ptrs().len() + 1);
     let dl = cx.data_layout();
     let pointer_size = dl.pointer_size.bytes() as usize;
 
     let mut next_offset = 0;
-    for &(offset, alloc_id) in alloc.provenance().iter() {
+    for &(offset, alloc_id) in alloc.provenance().ptrs().iter() {
         let offset = offset.bytes();
         assert_eq!(offset as usize as u64, offset);
         let offset = offset as usize;

From 4cbf5e6813d7c194aa9d2525a027b86e52e07f2f Mon Sep 17 00:00:00 2001
From: Camille GILLOT <gillot.camille@gmail.com>
Date: Sat, 1 Oct 2022 23:10:36 +0200
Subject: [PATCH 276/997] Introduce composite debuginfo.

---
 src/debuginfo.rs | 57 +++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 49 insertions(+), 8 deletions(-)

diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index 266759ed6cfa..a81585d41284 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -4,8 +4,9 @@ use rustc_codegen_ssa::traits::{DebugInfoBuilderMethods, DebugInfoMethods};
 use rustc_middle::mir;
 use rustc_middle::ty::{Instance, PolyExistentialTraitRef, Ty};
 use rustc_span::{SourceFile, Span, Symbol};
-use rustc_target::abi::Size;
 use rustc_target::abi::call::FnAbi;
+use rustc_target::abi::Size;
+use std::ops::Range;
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
@@ -13,7 +14,15 @@ use crate::context::CodegenCx;
 impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods for Builder<'a, 'gcc, 'tcx> {
     // FIXME(eddyb) find a common convention for all of the debuginfo-related
     // names (choose between `dbg`, `debug`, `debuginfo`, `debug_info` etc.).
-    fn dbg_var_addr(&mut self, _dbg_var: Self::DIVariable, _scope_metadata: Self::DIScope, _variable_alloca: Self::Value, _direct_offset: Size, _indirect_offsets: &[Size]) {
+    fn dbg_var_addr(
+        &mut self,
+        _dbg_var: Self::DIVariable,
+        _scope_metadata: Self::DIScope,
+        _variable_alloca: Self::Value,
+        _direct_offset: Size,
+        _indirect_offsets: &[Size],
+        _fragment: Option<Range<Size>>,
+    ) {
         unimplemented!();
     }
 
@@ -31,16 +40,31 @@ impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods for Builder<'a, 'gcc, 'tcx> {
 }
 
 impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
-    fn create_vtable_debuginfo(&self, _ty: Ty<'tcx>, _trait_ref: Option<PolyExistentialTraitRef<'tcx>>, _vtable: Self::Value) {
+    fn create_vtable_debuginfo(
+        &self,
+        _ty: Ty<'tcx>,
+        _trait_ref: Option<PolyExistentialTraitRef<'tcx>>,
+        _vtable: Self::Value,
+    ) {
         // TODO(antoyo)
     }
 
-    fn create_function_debug_context(&self, _instance: Instance<'tcx>, _fn_abi: &FnAbi<'tcx, Ty<'tcx>>, _llfn: RValue<'gcc>, _mir: &mir::Body<'tcx>) -> Option<FunctionDebugContext<Self::DIScope, Self::DILocation>> {
+    fn create_function_debug_context(
+        &self,
+        _instance: Instance<'tcx>,
+        _fn_abi: &FnAbi<'tcx, Ty<'tcx>>,
+        _llfn: RValue<'gcc>,
+        _mir: &mir::Body<'tcx>,
+    ) -> Option<FunctionDebugContext<Self::DIScope, Self::DILocation>> {
         // TODO(antoyo)
         None
     }
 
-    fn extend_scope_to_file(&self, _scope_metadata: Self::DIScope, _file: &SourceFile) -> Self::DIScope {
+    fn extend_scope_to_file(
+        &self,
+        _scope_metadata: Self::DIScope,
+        _file: &SourceFile,
+    ) -> Self::DIScope {
         unimplemented!();
     }
 
@@ -48,15 +72,32 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         // TODO(antoyo)
     }
 
-    fn create_dbg_var(&self, _variable_name: Symbol, _variable_type: Ty<'tcx>, _scope_metadata: Self::DIScope, _variable_kind: VariableKind, _span: Span) -> Self::DIVariable {
+    fn create_dbg_var(
+        &self,
+        _variable_name: Symbol,
+        _variable_type: Ty<'tcx>,
+        _scope_metadata: Self::DIScope,
+        _variable_kind: VariableKind,
+        _span: Span,
+    ) -> Self::DIVariable {
         unimplemented!();
     }
 
-    fn dbg_scope_fn(&self, _instance: Instance<'tcx>, _fn_abi: &FnAbi<'tcx, Ty<'tcx>>, _maybe_definition_llfn: Option<RValue<'gcc>>) -> Self::DIScope {
+    fn dbg_scope_fn(
+        &self,
+        _instance: Instance<'tcx>,
+        _fn_abi: &FnAbi<'tcx, Ty<'tcx>>,
+        _maybe_definition_llfn: Option<RValue<'gcc>>,
+    ) -> Self::DIScope {
         unimplemented!();
     }
 
-    fn dbg_loc(&self, _scope: Self::DIScope, _inlined_at: Option<Self::DILocation>, _span: Span) -> Self::DILocation {
+    fn dbg_loc(
+        &self,
+        _scope: Self::DIScope,
+        _inlined_at: Option<Self::DILocation>,
+        _span: Span,
+    ) -> Self::DILocation {
         unimplemented!();
     }
 }

From 5b9b849a1918636f55433e858ee6ce4847dd6ced Mon Sep 17 00:00:00 2001
From: Caleb Zulawski <caleb.zulawski@gmail.com>
Date: Sat, 29 Oct 2022 23:36:47 -0400
Subject: [PATCH 277/997] Allow actual AVX512-related feature names in the case
 of some misleading aliases

---
 src/lib.rs | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/lib.rs b/src/lib.rs
index 1261eb4aaa4a..0d99f4e2f335 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -320,10 +320,10 @@ pub fn target_features(sess: &Session, allow_unstable: bool) -> Vec<Symbol> {
                 false
             }
             /*
-               adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512gfni,
-               avx512ifma, avx512pf, avx512vaes, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpclmulqdq,
-               avx512vpopcntdq, bmi1, bmi2, cmpxchg16b, ermsb, f16c, fma, fxsr, lzcnt, movbe, pclmulqdq, popcnt, rdrand, rdseed, rtm,
-               sha, sse, sse2, sse3, sse4.1, sse4.2, sse4a, ssse3, tbm, xsave, xsavec, xsaveopt, xsaves
+               adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512ifma,
+               avx512pf, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpopcntdq,
+               bmi1, bmi2, cmpxchg16b, ermsb, f16c, fma, fxsr, gfni, lzcnt, movbe, pclmulqdq, popcnt, rdrand, rdseed, rtm,
+               sha, sse, sse2, sse3, sse4.1, sse4.2, sse4a, ssse3, tbm, vaes, vpclmulqdq, xsave, xsavec, xsaveopt, xsaves
              */
             //false
         })

From bf4e1e49ea80d52ec6662938ce859de17fd831f4 Mon Sep 17 00:00:00 2001
From: Nicholas Nethercote <n.nethercote@gmail.com>
Date: Wed, 9 Nov 2022 11:04:10 +1100
Subject: [PATCH 278/997] Use `&mut Bx` more.

For the next commit, `FunctionCx::codegen_*_terminator` need to take a
`&mut Bx` instead of consuming a `Bx`. This triggers a cascade of
similar changes across multiple functions. The resulting code is more
concise and replaces many `&mut bx` expressions with `bx`.
---
 src/builder.rs | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index c43895ee5650..1603e9bf6282 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -814,11 +814,11 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         OperandRef { val, layout: place.layout }
     }
 
-    fn write_operand_repeatedly(mut self, cg_elem: OperandRef<'tcx, RValue<'gcc>>, count: u64, dest: PlaceRef<'tcx, RValue<'gcc>>) -> Self {
+    fn write_operand_repeatedly(&mut self, cg_elem: OperandRef<'tcx, RValue<'gcc>>, count: u64, dest: PlaceRef<'tcx, RValue<'gcc>>) {
         let zero = self.const_usize(0);
         let count = self.const_usize(count);
-        let start = dest.project_index(&mut self, zero).llval;
-        let end = dest.project_index(&mut self, count).llval;
+        let start = dest.project_index(self, zero).llval;
+        let end = dest.project_index(self, count).llval;
 
         let header_bb = self.append_sibling_block("repeat_loop_header");
         let body_bb = self.append_sibling_block("repeat_loop_body");
@@ -837,14 +837,13 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         self.switch_to_block(body_bb);
         let align = dest.align.restrict_for_offset(dest.layout.field(self.cx(), 0).size);
-        cg_elem.val.store(&mut self, PlaceRef::new_sized_aligned(current_val, cg_elem.layout, align));
+        cg_elem.val.store(self, PlaceRef::new_sized_aligned(current_val, cg_elem.layout, align));
 
         let next = self.inbounds_gep(self.backend_type(cg_elem.layout), current.to_rvalue(), &[self.const_usize(1)]);
         self.llbb().add_assignment(None, current, next);
         self.br(header_bb);
 
         self.switch_to_block(next_bb);
-        self
     }
 
     fn range_metadata(&mut self, _load: RValue<'gcc>, _range: WrappingRange) {

From 21af0df1e5e7f501af1e4864f2d9b9b3fac76924 Mon Sep 17 00:00:00 2001
From: Ayush Singh <ayushsingh1325@gmail.com>
Date: Tue, 15 Nov 2022 22:15:55 +0530
Subject: [PATCH 279/997] Use custom entry name in gcc

This is a continuation of 9f0a8620bd7d325e6d42417b08daff3e55cb88f6 for
gcc.

Signed-off-by: Ayush Singh <ayushsingh1325@gmail.com>
---
 src/context.rs | 5 +++--
 src/declare.rs | 4 ++--
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/context.rs b/src/context.rs
index a4c63c0be1f9..29df1d2608a5 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -440,8 +440,9 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn declare_c_main(&self, fn_type: Self::Type) -> Option<Self::Function> {
-        if self.get_declared_value("main").is_none() {
-            Some(self.declare_cfn("main", fn_type))
+        let entry_name = self.sess().target.entry_name.as_ref();
+        if self.get_declared_value(entry_name).is_none() {
+            Some(self.declare_entry_fn(entry_name, fn_type, ()))
         }
         else {
             // If the symbol already exists, it is an error: for example, the user wrote
diff --git a/src/declare.rs b/src/declare.rs
index b4b7d1b011ea..4748e7e4be2a 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -63,13 +63,13 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         global
     }
 
-    pub fn declare_cfn(&self, name: &str, _fn_type: Type<'gcc>) -> RValue<'gcc> {
+    pub fn declare_entry_fn(&self, name: &str, _fn_type: Type<'gcc>, callconv: () /*llvm::CCallConv*/) -> RValue<'gcc> {
         // TODO(antoyo): use the fn_type parameter.
         let const_string = self.context.new_type::<u8>().make_pointer().make_pointer();
         let return_type = self.type_i32();
         let variadic = false;
         self.linkage.set(FunctionType::Exported);
-        let func = declare_raw_fn(self, name, () /*llvm::CCallConv*/, return_type, &[self.type_i32(), const_string], variadic);
+        let func = declare_raw_fn(self, name, callconv, return_type, &[self.type_i32(), const_string], variadic);
         // NOTE: it is needed to set the current_func here as well, because get_fn() is not called
         // for the main function.
         *self.current_func.borrow_mut() = Some(func);

From 6f7a01796dfde168c4b2d5163e17aa62e1f89f94 Mon Sep 17 00:00:00 2001
From: Chris Denton <christophersdenton@gmail.com>
Date: Sat, 26 Nov 2022 09:54:54 +0000
Subject: [PATCH 280/997] Remove more redundant `all`s

---
 example/alloc_system.rs | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/example/alloc_system.rs b/example/alloc_system.rs
index 89661918d05a..fd01fcf1fc82 100644
--- a/example/alloc_system.rs
+++ b/example/alloc_system.rs
@@ -13,17 +13,17 @@
 
 // The minimum alignment guaranteed by the architecture. This value is used to
 // add fast paths for low alignment values.
-#[cfg(all(any(target_arch = "x86",
+#[cfg(any(target_arch = "x86",
               target_arch = "arm",
               target_arch = "mips",
               target_arch = "powerpc",
-              target_arch = "powerpc64")))]
+              target_arch = "powerpc64"))]
 const MIN_ALIGN: usize = 8;
-#[cfg(all(any(target_arch = "x86_64",
+#[cfg(any(target_arch = "x86_64",
               target_arch = "aarch64",
               target_arch = "mips64",
               target_arch = "s390x",
-              target_arch = "sparc64")))]
+              target_arch = "sparc64"))]
 const MIN_ALIGN: usize = 16;
 
 pub struct System;

From 634a709549db03962700b24619253f9965ea864a Mon Sep 17 00:00:00 2001
From: Maybe Waffle <waffle.lapkin@gmail.com>
Date: Sun, 27 Nov 2022 11:15:06 +0000
Subject: [PATCH 281/997] Prefer doc comments over `//`-comments in compiler

---
 src/context.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/context.rs b/src/context.rs
index 29df1d2608a5..6391c4e9d836 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -88,9 +88,9 @@ pub struct CodegenCx<'gcc, 'tcx> {
     pub vtables: RefCell<FxHashMap<(Ty<'tcx>, Option<ty::PolyExistentialTraitRef<'tcx>>), RValue<'gcc>>>,
 
     // TODO(antoyo): improve the SSA API to not require those.
-    // Mapping from function pointer type to indexes of on stack parameters.
+    /// Mapping from function pointer type to indexes of on stack parameters.
     pub on_stack_params: RefCell<FxHashMap<FunctionPtrType<'gcc>, FxHashSet<usize>>>,
-    // Mapping from function to indexes of on stack parameters.
+    /// Mapping from function to indexes of on stack parameters.
     pub on_stack_function_params: RefCell<FxHashMap<Function<'gcc>, FxHashSet<usize>>>,
 
     /// Cache of emitted const globals (value -> global)

From d1eb38f5b5a3ed04f55189641b1d30ecd86b4a01 Mon Sep 17 00:00:00 2001
From: bjorn3 <bjorn3@users.noreply.github.com>
Date: Sat, 28 May 2022 10:43:51 +0000
Subject: [PATCH 282/997] Rewrite LLVM's archive writer in Rust

This allows it to be used by other codegen backends
---
 Cargo.lock     |  14 ----
 Cargo.toml     |   3 -
 src/archive.rs | 177 ++-----------------------------------------------
 src/errors.rs  |  16 +----
 4 files changed, 8 insertions(+), 202 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index fba8c3db42e4..b2013db3e3b3 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -11,12 +11,6 @@ dependencies = [
  "memchr",
 ]
 
-[[package]]
-name = "ar"
-version = "0.8.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "450575f58f7bee32816abbff470cbc47797397c2a81e0eaced4b98436daf52e1"
-
 [[package]]
 name = "bitflags"
 version = "1.3.2"
@@ -212,11 +206,9 @@ dependencies = [
 name = "rustc_codegen_gcc"
 version = "0.1.0"
 dependencies = [
- "ar",
  "gccjit",
  "lang_tester",
  "smallvec",
- "target-lexicon",
  "tempfile",
 ]
 
@@ -235,12 +227,6 @@ version = "1.8.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "f2dd574626839106c320a323308629dcb1acfc96e32a8cba364ddc61ac23ee83"
 
-[[package]]
-name = "target-lexicon"
-version = "0.10.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ab0e7238dcc7b40a7be719a25365910f6807bd864f4cce6b2e6b873658e2b19d"
-
 [[package]]
 name = "tempfile"
 version = "3.2.0"
diff --git a/Cargo.toml b/Cargo.toml
index 3ac354ea4942..81066d9ce1f0 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -28,9 +28,6 @@ gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
 #gccjit = { path = "../gccjit.rs" }
 
 smallvec = { version = "1.6.1", features = ["union", "may_dangle"] }
-target-lexicon = "0.10.0"
-
-ar = "0.8.0"
 
 [dev-dependencies]
 lang_tester = "0.3.9"
diff --git a/src/archive.rs b/src/archive.rs
index f18ae7ea5e9b..11fa074f5ac7 100644
--- a/src/archive.rs
+++ b/src/archive.rs
@@ -1,44 +1,17 @@
-use std::fs::File;
 use std::path::{Path, PathBuf};
 
-use crate::errors::RanlibFailure;
-
-use rustc_codegen_ssa::back::archive::{ArchiveBuilder, ArchiveBuilderBuilder};
+use rustc_codegen_ssa::back::archive::{
+    get_native_object_symbols, ArArchiveBuilder, ArchiveBuilder, ArchiveBuilderBuilder,
+};
 use rustc_session::Session;
 
 use rustc_session::cstore::DllImport;
 
-struct ArchiveConfig<'a> {
-    sess: &'a Session,
-    use_native_ar: bool,
-    use_gnu_style_archive: bool,
-}
-
-#[derive(Debug)]
-enum ArchiveEntry {
-    FromArchive {
-        archive_index: usize,
-        entry_index: usize,
-    },
-    File(PathBuf),
-}
-
-pub struct ArArchiveBuilderBuilder;
+pub(crate) struct ArArchiveBuilderBuilder;
 
 impl ArchiveBuilderBuilder for ArArchiveBuilderBuilder {
     fn new_archive_builder<'a>(&self, sess: &'a Session) -> Box<dyn ArchiveBuilder<'a> + 'a> {
-        let config = ArchiveConfig {
-            sess,
-            use_native_ar: false,
-            // FIXME test for linux and System V derivatives instead
-            use_gnu_style_archive: sess.target.options.archive_format == "gnu",
-        };
-
-        Box::new(ArArchiveBuilder {
-            config,
-            src_archives: vec![],
-            entries: vec![],
-        })
+        Box::new(ArArchiveBuilder::new(sess, get_native_object_symbols))
     }
 
     fn create_dll_import_lib(
@@ -49,144 +22,6 @@ impl ArchiveBuilderBuilder for ArArchiveBuilderBuilder {
         _tmpdir: &Path,
         _is_direct_dependency: bool,
     ) -> PathBuf {
-        unimplemented!();
-    }
-}
-
-pub struct ArArchiveBuilder<'a> {
-    config: ArchiveConfig<'a>,
-    src_archives: Vec<(PathBuf, ar::Archive<File>)>,
-    // Don't use `HashMap` here, as the order is important. `rust.metadata.bin` must always be at
-    // the end of an archive for linkers to not get confused.
-    entries: Vec<(String, ArchiveEntry)>,
-}
-
-impl<'a> ArchiveBuilder<'a> for ArArchiveBuilder<'a> {
-    fn add_file(&mut self, file: &Path) {
-        self.entries.push((
-            file.file_name().unwrap().to_str().unwrap().to_string(),
-            ArchiveEntry::File(file.to_owned()),
-        ));
-    }
-
-    fn add_archive(
-        &mut self,
-        archive_path: &Path,
-        mut skip: Box<dyn FnMut(&str) -> bool + 'static>,
-    ) -> std::io::Result<()> {
-        let mut archive = ar::Archive::new(std::fs::File::open(&archive_path)?);
-        let archive_index = self.src_archives.len();
-
-        let mut i = 0;
-        while let Some(entry) = archive.next_entry() {
-            let entry = entry?;
-            let file_name = String::from_utf8(entry.header().identifier().to_vec())
-                .map_err(|err| std::io::Error::new(std::io::ErrorKind::InvalidData, err))?;
-            if !skip(&file_name) {
-                self.entries
-                    .push((file_name, ArchiveEntry::FromArchive { archive_index, entry_index: i }));
-            }
-            i += 1;
-        }
-
-        self.src_archives.push((archive_path.to_owned(), archive));
-        Ok(())
-    }
-
-    fn build(mut self: Box<Self>, output: &Path) -> bool {
-        use std::process::Command;
-
-        fn add_file_using_ar(archive: &Path, file: &Path) {
-            Command::new("ar")
-                .arg("r") // add or replace file
-                .arg("-c") // silence created file message
-                .arg(archive)
-                .arg(&file)
-                .status()
-                .unwrap();
-        }
-
-        enum BuilderKind<'a> {
-            Bsd(ar::Builder<File>),
-            Gnu(ar::GnuBuilder<File>),
-            NativeAr(&'a Path),
-        }
-
-        let mut builder = if self.config.use_native_ar {
-            BuilderKind::NativeAr(output)
-        } else if self.config.use_gnu_style_archive {
-            BuilderKind::Gnu(ar::GnuBuilder::new(
-                File::create(output).unwrap(),
-                self.entries
-                    .iter()
-                    .map(|(name, _)| name.as_bytes().to_vec())
-                    .collect(),
-            ))
-        } else {
-            BuilderKind::Bsd(ar::Builder::new(File::create(output).unwrap()))
-        };
-
-        let any_members = !self.entries.is_empty();
-
-        // Add all files
-        for (entry_name, entry) in self.entries.into_iter() {
-            match entry {
-                ArchiveEntry::FromArchive {
-                    archive_index,
-                    entry_index,
-                } => {
-                    let (ref src_archive_path, ref mut src_archive) =
-                        self.src_archives[archive_index];
-                    let entry = src_archive.jump_to_entry(entry_index).unwrap();
-                    let header = entry.header().clone();
-
-                    match builder {
-                        BuilderKind::Bsd(ref mut builder) => {
-                            builder.append(&header, entry).unwrap()
-                        }
-                        BuilderKind::Gnu(ref mut builder) => {
-                            builder.append(&header, entry).unwrap()
-                        }
-                        BuilderKind::NativeAr(archive_file) => {
-                            Command::new("ar")
-                                .arg("x")
-                                .arg(src_archive_path)
-                                .arg(&entry_name)
-                                .status()
-                                .unwrap();
-                            add_file_using_ar(archive_file, Path::new(&entry_name));
-                            std::fs::remove_file(entry_name).unwrap();
-                        }
-                    }
-                }
-                ArchiveEntry::File(file) =>
-                    match builder {
-                        BuilderKind::Bsd(ref mut builder) => {
-                            builder
-                                .append_file(entry_name.as_bytes(), &mut File::open(file).expect("file for bsd builder"))
-                                .unwrap()
-                        },
-                        BuilderKind::Gnu(ref mut builder) => {
-                            builder
-                                .append_file(entry_name.as_bytes(), &mut File::open(&file).expect(&format!("file {:?} for gnu builder", file)))
-                                .unwrap()
-                        },
-                        BuilderKind::NativeAr(archive_file) => add_file_using_ar(archive_file, &file),
-                    },
-            }
-        }
-
-        // Finalize archive
-        std::mem::drop(builder);
-
-        // Run ranlib to be able to link the archive
-        let status =
-            std::process::Command::new("ranlib").arg(output).status().expect("Couldn't run ranlib");
-
-        if !status.success() {
-            self.config.sess.emit_fatal(RanlibFailure::new(status.code()));
-        }
-
-        any_members
+        unimplemented!("creating dll imports is not yet supported");
     }
 }
diff --git a/src/errors.rs b/src/errors.rs
index 15ad90f9043c..89fed7be1315 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -16,18 +16,6 @@ impl IntoDiagnosticArg for ExitCode {
     }
 }
 
-#[derive(Diagnostic)]
-#[diag(codegen_gcc_ranlib_failure)]
-pub(crate) struct RanlibFailure {
-    exit_code: ExitCode,
-}
-
-impl RanlibFailure {
-    pub fn new(exit_code: Option<i32>) -> Self {
-        RanlibFailure { exit_code: ExitCode(exit_code) }
-    }
-}
-
 #[derive(Diagnostic)]
 #[diag(codegen_gcc_invalid_monomorphization_basic_integer, code = "E0511")]
 pub(crate) struct InvalidMonomorphizationBasicInteger<'a> {
@@ -227,7 +215,7 @@ pub(crate) struct InvalidMonomorphizationUnsupportedOperation<'a> {
 #[diag(codegen_gcc_linkage_const_or_mut_type)]
 pub(crate) struct LinkageConstOrMutType {
     #[primary_span]
-    pub span: Span
+    pub span: Span,
 }
 
 #[derive(Diagnostic)]
@@ -238,5 +226,5 @@ pub(crate) struct LTONotSupported;
 #[diag(codegen_gcc_unwinding_inline_asm)]
 pub(crate) struct UnwindingInlineAsm {
     #[primary_span]
-    pub span: Span
+    pub span: Span,
 }

From 43f868b1c3efa4fcf2526e9600c0f047c19a3eb7 Mon Sep 17 00:00:00 2001
From: Peter Collingbourne <pcc@google.com>
Date: Wed, 23 Nov 2022 18:13:30 -0800
Subject: [PATCH 283/997] Move linkage type check to HIR analysis and fix
 semantics issues.

This ensures that the error is printed even for unused variables,
as well as unifying the handling between the LLVM and GCC backends.

This also fixes unusual behavior around exported Rust-defined variables
with linkage attributes. With the previous behavior, it appears to be
impossible to define such a variable such that it can actually be imported
and used by another crate. This is because on the importing side, the
variable is required to be a pointer, but on the exporting side, the
type checker rejects static variables of pointer type because they do
not implement `Sync`. Even if it were possible to import such a type, it
appears that code generation on the importing side would add an unexpected
additional level of pointer indirection, which would break type safety.

This highlighted that the semantics of linkage on Rust-defined variables
is different to linkage on foreign items. As such, we now model the
difference with two different codegen attributes: linkage for Rust-defined
variables, and import_linkage for foreign items.

This change gives semantics to the test
src/test/ui/linkage-attr/auxiliary/def_illtyped_external.rs which was
previously expected to fail to compile. Therefore, convert it into a
test that is expected to successfully compile.

The update to the GCC backend is speculative and untested.
---
 src/consts.rs | 25 ++++++-------------------
 src/errors.rs |  7 -------
 2 files changed, 6 insertions(+), 26 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index 7ffb345df9b6..eeb2b8f0d296 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -8,13 +8,11 @@ use rustc_middle::mir::mono::MonoItem;
 use rustc_middle::ty::{self, Instance, Ty};
 use rustc_middle::ty::layout::LayoutOf;
 use rustc_middle::mir::interpret::{self, ConstAllocation, ErrorHandled, Scalar as InterpScalar, read_target_uint};
-use rustc_span::Span;
 use rustc_span::def_id::DefId;
 use rustc_target::abi::{self, Align, HasDataLayout, Primitive, Size, WrappingRange};
 
 use crate::base;
 use crate::context::CodegenCx;
-use crate::errors::LinkageConstOrMutType;
 use crate::type_of::LayoutGccExt;
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
@@ -216,7 +214,8 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let ty = instance.ty(self.tcx, ty::ParamEnv::reveal_all());
         let sym = self.tcx.symbol_name(instance).name;
 
-        let global = if def_id.is_local() && !self.tcx.is_foreign_item(def_id) {
+        let global =
+            if def_id.is_local() && !self.tcx.is_foreign_item(def_id) {
             let llty = self.layout_of(ty).gcc_type(self);
             if let Some(global) = self.get_declared_value(sym) {
                 if self.val_ty(global) != self.type_ptr_to(llty) {
@@ -239,7 +238,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
             global
         } else {
-            check_and_apply_linkage(&self, &fn_attrs, ty, sym, self.tcx.def_span(def_id))
+            check_and_apply_linkage(&self, &fn_attrs, ty, sym)
         };
 
         if !def_id.is_local() {
@@ -337,24 +336,12 @@ pub fn codegen_static_initializer<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, def_id
     Ok((const_alloc_to_gcc(cx, alloc), alloc))
 }
 
-fn check_and_apply_linkage<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, attrs: &CodegenFnAttrs, ty: Ty<'tcx>, sym: &str, span: Span) -> LValue<'gcc> {
+fn check_and_apply_linkage<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, attrs: &CodegenFnAttrs, ty: Ty<'tcx>, sym: &str) -> LValue<'gcc> {
     let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
     let llty = cx.layout_of(ty).gcc_type(cx);
-    if let Some(linkage) = attrs.linkage {
-        // If this is a static with a linkage specified, then we need to handle
-        // it a little specially. The typesystem prevents things like &T and
-        // extern "C" fn() from being non-null, so we can't just declare a
-        // static and call it a day. Some linkages (like weak) will make it such
-        // that the static actually has a null value.
-        let llty2 =
-            if let ty::RawPtr(ref mt) = ty.kind() {
-                cx.layout_of(mt.ty).gcc_type(cx)
-            }
-            else {
-                cx.sess().emit_fatal(LinkageConstOrMutType { span: span })
-            };
+    if let Some(linkage) = attrs.import_linkage {
         // Declare a symbol `foo` with the desired linkage.
-        let global1 = cx.declare_global_with_linkage(&sym, llty2, base::global_linkage_to_gcc(linkage));
+        let global1 = cx.declare_global_with_linkage(&sym, cx.type_i8(), base::global_linkage_to_gcc(linkage));
 
         // Declare an internal global `extern_with_linkage_foo` which
         // is initialized with the address of `foo`.  If `foo` is
diff --git a/src/errors.rs b/src/errors.rs
index 89fed7be1315..d0ba7e247911 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -211,13 +211,6 @@ pub(crate) struct InvalidMonomorphizationUnsupportedOperation<'a> {
     pub in_elem: Ty<'a>,
 }
 
-#[derive(Diagnostic)]
-#[diag(codegen_gcc_linkage_const_or_mut_type)]
-pub(crate) struct LinkageConstOrMutType {
-    #[primary_span]
-    pub span: Span,
-}
-
 #[derive(Diagnostic)]
 #[diag(codegen_gcc_lto_not_supported)]
 pub(crate) struct LTONotSupported;

From 7c2db89ce4951014a7fbec62ae81bda9abcf3657 Mon Sep 17 00:00:00 2001
From: Ramon de C Valle <rcvalle@users.noreply.github.com>
Date: Mon, 21 Nov 2022 21:29:00 -0800
Subject: [PATCH 284/997] Add LLVM KCFI support to the Rust compiler

This commit adds LLVM Kernel Control Flow Integrity (KCFI) support to
the Rust compiler. It initially provides forward-edge control flow
protection for operating systems kernels for Rust-compiled code only by
aggregating function pointers in groups identified by their return and
parameter types. (See llvm/llvm-project@cff5bef.)

Forward-edge control flow protection for C or C++ and Rust -compiled
code "mixed binaries" (i.e., for when C or C++ and Rust -compiled code
share the same virtual address space) will be provided in later work as
part of this project by identifying C char and integer type uses at the
time types are encoded (see Type metadata in the design document in the
tracking issue #89653).

LLVM KCFI can be enabled with -Zsanitizer=kcfi.

Co-authored-by: bjorn3 <17426603+bjorn3@users.noreply.github.com>
---
 src/type_.rs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/type_.rs b/src/type_.rs
index 55e4d0c6289a..eacd76c6ea0e 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -300,4 +300,8 @@ impl<'gcc, 'tcx> TypeMembershipMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         // Unsupported.
         self.context.new_rvalue_from_int(self.int_type, 0)
     }
+
+    fn set_kcfi_type_metadata(&self, _function: RValue<'gcc>, _kcfi_typeid: u32) {
+        // Unsupported.
+    }
 }

From c2e83dce57c41363095cac253c5255070afcd667 Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Sat, 3 Dec 2022 18:27:18 +0000
Subject: [PATCH 285/997] Destruct landing_pad return value before passing it
 to cg_ssa

---
 src/builder.rs | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 1603e9bf6282..70a93cb06d13 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1199,7 +1199,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     #[cfg(feature="master")]
-    fn cleanup_landing_pad(&mut self, _ty: Type<'gcc>, pers_fn: RValue<'gcc>) -> RValue<'gcc> {
+    fn cleanup_landing_pad(&mut self, pers_fn: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
         self.set_personality_fn(pers_fn);
 
         // NOTE: insert the current block in a variable so that a later call to invoke knows to
@@ -1223,21 +1223,19 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     #[cfg(not(feature="master"))]
-    fn cleanup_landing_pad(&mut self, _ty: Type<'gcc>, _pers_fn: RValue<'gcc>) -> RValue<'gcc> {
+    fn cleanup_landing_pad(&mut self, _pers_fn: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
         let field1 = self.context.new_field(None, self.u8_type.make_pointer(), "landing_pad_field_1");
         let field2 = self.context.new_field(None, self.i32_type, "landing_pad_field_1");
-        let struct_type = self.context.new_struct_type(None, "landing_pad", &[field1, field2]);
-        self.current_func().new_local(None, struct_type.as_type(), "landing_pad")
-            .to_rvalue()
+        (field1, field2)
     }
 
     #[cfg(feature="master")]
-    fn resume(&mut self, exn: RValue<'gcc>) {
+    fn resume(&mut self, exn0: RValue<'gcc>, _exn1: RValue<'gcc>) {
         // TODO(antoyo): check if this is normal that we need to dereference the value.
         // NOTE: the type is wrong, so in order to get a pointer for parameter, cast it to a
         // pointer of pointer that is later dereferenced.
-        let exn_type = exn.get_type().make_pointer();
-        let exn = self.context.new_cast(None, exn, exn_type);
+        let exn_type = exn0.get_type().make_pointer();
+        let exn = self.context.new_cast(None, exn0, exn_type);
         let exn = exn.dereference(None).to_rvalue();
         let unwind_resume = self.context.get_target_builtin_function("__builtin_unwind_resume");
         self.llbb().add_eval(None, self.context.new_call(None, unwind_resume, &[exn]));
@@ -1245,7 +1243,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     #[cfg(not(feature="master"))]
-    fn resume(&mut self, _exn: RValue<'gcc>) {
+    fn resume(&mut self, _exn0: RValue<'gcc>, _exn1: RValue<'gcc>) {
         self.unreachable();
     }
 

From 888137d7d27405ce0d41ae134088f814a2ec92a2 Mon Sep 17 00:00:00 2001
From: Jeremy Stucki <dev@jeremystucki.ch>
Date: Tue, 20 Dec 2022 22:10:40 +0100
Subject: [PATCH 286/997] rustc: Remove needless lifetimes

---
 src/base.rs   | 2 +-
 src/common.rs | 2 +-
 src/lib.rs    | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index 6102016b4345..dcd560b3dcd9 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -63,7 +63,7 @@ pub fn linkage_to_gcc(linkage: Linkage) -> FunctionType {
     }
 }
 
-pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_128bit_integers: bool) -> (ModuleCodegen<GccContext>, u64) {
+pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, supports_128bit_integers: bool) -> (ModuleCodegen<GccContext>, u64) {
     let prof_timer = tcx.prof.generic_activity("codegen_module");
     let start_time = Instant::now();
 
diff --git a/src/common.rs b/src/common.rs
index 102d1e5a824d..ef857cbe5719 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -44,7 +44,7 @@ pub fn bytes_in_context<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, bytes: &[u8]) ->
     context.new_array_constructor(None, typ, &elements)
 }
 
-pub fn type_is_pointer<'gcc>(typ: Type<'gcc>) -> bool {
+pub fn type_is_pointer(typ: Type) -> bool {
     typ.get_pointee().is_some()
 }
 
diff --git a/src/lib.rs b/src/lib.rs
index 0d99f4e2f335..16db781a894a 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -163,7 +163,7 @@ impl ExtraBackendMethods for GccCodegenBackend {
         mods
     }
 
-    fn compile_codegen_unit<'tcx>(&self, tcx: TyCtxt<'tcx>, cgu_name: Symbol) -> (ModuleCodegen<Self::Module>, u64) {
+    fn compile_codegen_unit(&self, tcx: TyCtxt<'_>, cgu_name: Symbol) -> (ModuleCodegen<Self::Module>, u64) {
         base::compile_codegen_unit(tcx, cgu_name, *self.supports_128bit_integers.lock().expect("lock"))
     }
 

From 3a1d3241b4f998d136afe188072dc36f006d026c Mon Sep 17 00:00:00 2001
From: Jeremy Stucki <dev@jeremystucki.ch>
Date: Tue, 20 Dec 2022 22:34:42 +0100
Subject: [PATCH 287/997] Add missing anonymous lifetime

---
 src/common.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/common.rs b/src/common.rs
index ef857cbe5719..0c7d9697d399 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -44,7 +44,7 @@ pub fn bytes_in_context<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, bytes: &[u8]) ->
     context.new_array_constructor(None, typ, &elements)
 }
 
-pub fn type_is_pointer(typ: Type) -> bool {
+pub fn type_is_pointer(typ: Type<'_>) -> bool {
     typ.get_pointee().is_some()
 }
 

From fa874b03e43aa4f3e136e1920e6016060418bb9b Mon Sep 17 00:00:00 2001
From: Michael Goulet <michael@errs.io>
Date: Sat, 10 Dec 2022 20:31:01 +0000
Subject: [PATCH 288/997] Simplify some iterator combinators

---
 src/builder.rs | 2 +-
 src/context.rs | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 70a93cb06d13..f30362871528 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1365,7 +1365,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     ) -> RValue<'gcc> {
         // FIXME(antoyo): remove when having a proper API.
         let gcc_func = unsafe { std::mem::transmute(func) };
-        let call = if self.functions.borrow().values().find(|value| **value == gcc_func).is_some() {
+        let call = if self.functions.borrow().values().any(|value| *value == gcc_func) {
             self.function_call(func, args, funclet)
         }
         else {
diff --git a/src/context.rs b/src/context.rs
index 6391c4e9d836..9bd3710ac8ad 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -258,8 +258,8 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
     pub fn rvalue_as_function(&self, value: RValue<'gcc>) -> Function<'gcc> {
         let function: Function<'gcc> = unsafe { std::mem::transmute(value) };
-        debug_assert!(self.functions.borrow().values().find(|value| **value == function).is_some(),
-            "{:?} is not a function", function);
+        debug_assert!(self.functions.borrow().values().any(|value| *value == function),
+            "{:?} ({:?}) is not a function", value, value.get_type());
         function
     }
 

From 5dcda26aa6640ecf3d0d77d08ee37983b4ca1f4a Mon Sep 17 00:00:00 2001
From: Albert Larsan <74931857+albertlarsan68@users.noreply.github.com>
Date: Thu, 5 Jan 2023 09:45:44 +0100
Subject: [PATCH 289/997] Change `src/test` to `tests` in source files, fix
 tidy and tests

---
 test.sh | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/test.sh b/test.sh
index 4c490f04ae9d..97d5a8b006df 100755
--- a/test.sh
+++ b/test.sh
@@ -228,7 +228,7 @@ llvm-filecheck = "`which FileCheck-10 || which FileCheck-11 || which FileCheck-1
 EOF
 
     rustc -V | cut -d' ' -f3 | tr -d '('
-    git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(') src/test
+    git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(') tests
 }
 
 function asm_tests() {
@@ -236,7 +236,7 @@ function asm_tests() {
 
     echo "[TEST] rustc test suite"
     RUSTC_ARGS="-Zpanic-abort-tests -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot -Cpanic=abort"
-    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 src/test/assembly/asm --rustc-args "$RUSTC_ARGS"
+    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/assembly/asm --rustc-args "$RUSTC_ARGS"
 }
 
 # FIXME(antoyo): linker gives multiple definitions error on Linux
@@ -332,21 +332,21 @@ function test_rustc() {
 
     setup_rustc
 
-    for test in $(rg -i --files-with-matches "//(\[\w+\])?~|// error-pattern:|// build-fail|// run-fail|-Cllvm-args" src/test/ui); do
+    for test in $(rg -i --files-with-matches "//(\[\w+\])?~|// error-pattern:|// build-fail|// run-fail|-Cllvm-args" tests/ui); do
       rm $test
     done
 
-    git checkout -- src/test/ui/issues/auxiliary/issue-3136-a.rs # contains //~ERROR, but shouldn't be removed
+    git checkout -- tests/ui/issues/auxiliary/issue-3136-a.rs # contains //~ERROR, but shouldn't be removed
 
-    rm -r src/test/ui/{abi*,extern/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,chalkify/bugs/,test*,*lto*.rs,consts/const-float-bits-reject-conv.rs,consts/issue-miri-1910.rs} || true
-    rm src/test/ui/mir/mir_heavy_promoted.rs # this tests is oom-killed in the CI.
-    for test in $(rg --files-with-matches "thread|lto" src/test/ui); do
+    rm -r tests/ui/{abi*,extern/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,chalkify/bugs/,test*,*lto*.rs,consts/const-float-bits-reject-conv.rs,consts/issue-miri-1910.rs} || true
+    rm tests/ui/mir/mir_heavy_promoted.rs # this tests is oom-killed in the CI.
+    for test in $(rg --files-with-matches "thread|lto" tests/ui); do
       rm $test
     done
-    git checkout src/test/ui/lto/auxiliary/dylib.rs
-    git checkout src/test/ui/type-alias-impl-trait/auxiliary/cross_crate_ice.rs
-    git checkout src/test/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
-    git checkout src/test/ui/macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs
+    git checkout tests/ui/lto/auxiliary/dylib.rs
+    git checkout tests/ui/type-alias-impl-trait/auxiliary/cross_crate_ice.rs
+    git checkout tests/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
+    git checkout tests/ui/macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs
 
     RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot"
 
@@ -358,14 +358,14 @@ function test_rustc() {
         xargs -a ../failing-ui-tests.txt -d'\n' rm
     else
         # Removing all tests.
-        find src/test/ui -type f -name '*.rs' -not -path '*/auxiliary/*' -delete
+        find tests/ui -type f -name '*.rs' -not -path '*/auxiliary/*' -delete
         # Putting back only the failing ones.
         xargs -a ../failing-ui-tests.txt -d'\n' git checkout --
     fi
 
     if [ $nb_parts -gt 0 ]; then
         echo "Splitting ui_test into $nb_parts parts (and running part $current_part)"
-        find src/test/ui -type f -name '*.rs' -not -path "*/auxiliary/*" > ui_tests
+        find tests/ui -type f -name '*.rs' -not -path "*/auxiliary/*" > ui_tests
         # To ensure it'll be always the same sub files, we sort the content.
         sort ui_tests -o ui_tests
         count=$((`wc -l < ui_tests` / $nb_parts))
@@ -374,13 +374,13 @@ function test_rustc() {
         count=$((count + 1))
         split -d -l $count -a 1 ui_tests ui_tests.split
         # Removing all tests.
-        find src/test/ui -type f -name '*.rs' -not -path "*/auxiliary/*" -delete
+        find tests/ui -type f -name '*.rs' -not -path "*/auxiliary/*" -delete
         # Putting back only the ones we want to test.
         xargs -a "ui_tests.split$current_part" -d'\n' git checkout --
     fi
 
     echo "[TEST] rustc test suite"
-    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 src/test/ui/ --rustc-args "$RUSTC_ARGS"
+    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/ui/ --rustc-args "$RUSTC_ARGS"
 }
 
 function test_failing_rustc() {

From 7bf06701693934ded0774f0c17f45943cdbe44f3 Mon Sep 17 00:00:00 2001
From: Erik Desjardins <erikdesjardins@users.noreply.github.com>
Date: Sun, 22 Jan 2023 23:03:58 -0500
Subject: [PATCH 290/997] abi: add `AddressSpace` field to `Primitive::Pointer`

...and remove it from `PointeeInfo`, which isn't meant for this.

There are still various places (marked with FIXMEs) that assume all pointers
have the same size and alignment. Fixing this requires parsing non-default
address spaces in the data layout string, which will be done in a followup.
---
 src/builder.rs |  2 +-
 src/common.rs  |  2 +-
 src/consts.rs  | 16 ++++++++++++----
 src/type_of.rs |  4 ++--
 4 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index f30362871528..05b3bacfbf91 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -768,7 +768,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
                         bx.range_metadata(load, vr);
                     }
                 }
-                abi::Pointer if vr.start < vr.end && !vr.contains(0) => {
+                abi::Pointer(_) if vr.start < vr.end && !vr.contains(0) => {
                     bx.nonnull_metadata(load);
                 }
                 _ => {}
diff --git a/src/common.rs b/src/common.rs
index 0c7d9697d399..54325e1277b0 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -221,7 +221,7 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 let base_addr = self.const_bitcast(base_addr, self.usize_type);
                 let offset = self.context.new_rvalue_from_long(self.usize_type, offset.bytes() as i64);
                 let ptr = self.const_bitcast(base_addr + offset, ptr_type);
-                if layout.primitive() != Pointer {
+                if !matches!(layout.primitive(), Pointer(_)) {
                     self.const_bitcast(ptr.dereference(None).to_rvalue(), ty)
                 }
                 else {
diff --git a/src/consts.rs b/src/consts.rs
index eeb2b8f0d296..52e5ea777870 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -7,9 +7,9 @@ use rustc_middle::middle::codegen_fn_attrs::{CodegenFnAttrFlags, CodegenFnAttrs}
 use rustc_middle::mir::mono::MonoItem;
 use rustc_middle::ty::{self, Instance, Ty};
 use rustc_middle::ty::layout::LayoutOf;
-use rustc_middle::mir::interpret::{self, ConstAllocation, ErrorHandled, Scalar as InterpScalar, read_target_uint};
+use rustc_middle::mir::interpret::{self, ConstAllocation, ErrorHandled, GlobalAlloc, Scalar as InterpScalar, read_target_uint};
 use rustc_span::def_id::DefId;
-use rustc_target::abi::{self, Align, HasDataLayout, Primitive, Size, WrappingRange};
+use rustc_target::abi::{self, AddressSpace, Align, HasDataLayout, Primitive, Size, WrappingRange};
 
 use crate::base;
 use crate::context::CodegenCx;
@@ -306,13 +306,21 @@ pub fn const_alloc_to_gcc<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, alloc: ConstAl
             )
             .expect("const_alloc_to_llvm: could not read relocation pointer")
             as u64;
+
+        let address_space = match cx.tcx.global_alloc(alloc_id) {
+            GlobalAlloc::Function(..) => cx.data_layout().instruction_address_space,
+            GlobalAlloc::Static(..) | GlobalAlloc::Memory(..) | GlobalAlloc::VTable(..) => {
+                AddressSpace::DATA
+            }
+        };
+
         llvals.push(cx.scalar_to_backend(
             InterpScalar::from_pointer(
                 interpret::Pointer::new(alloc_id, Size::from_bytes(ptr_offset)),
                 &cx.tcx,
             ),
-            abi::Scalar::Initialized { value: Primitive::Pointer, valid_range: WrappingRange::full(dl.pointer_size) },
-            cx.type_i8p(),
+            abi::Scalar::Initialized { value: Primitive::Pointer(address_space), valid_range: WrappingRange::full(dl.pointer_size) },
+            cx.type_i8p_ext(address_space),
         ));
         next_offset = offset + pointer_size;
     }
diff --git a/src/type_of.rs b/src/type_of.rs
index 09c79b69ce3c..b01bd114656c 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -253,7 +253,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
             Int(i, false) => cx.type_from_unsigned_integer(i),
             F32 => cx.type_f32(),
             F64 => cx.type_f64(),
-            Pointer => {
+            Pointer(address_space) => {
                 // If we know the alignment, pick something better than i8.
                 let pointee =
                     if let Some(pointee) = self.pointee_info_at(cx, offset) {
@@ -262,7 +262,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
                     else {
                         cx.type_i8()
                     };
-                cx.type_ptr_to(pointee)
+                cx.type_ptr_to_ext(pointee, address_space)
             }
         }
     }

From bedaeda5084ab94fde088de0dba80e3bdc2363ef Mon Sep 17 00:00:00 2001
From: Erik Desjardins <erikdesjardins@users.noreply.github.com>
Date: Wed, 25 Jan 2023 01:46:19 -0500
Subject: [PATCH 291/997] create and use GlobalAlloc::address_space

---
 src/consts.rs | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index 52e5ea777870..b651b60924f7 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -7,9 +7,9 @@ use rustc_middle::middle::codegen_fn_attrs::{CodegenFnAttrFlags, CodegenFnAttrs}
 use rustc_middle::mir::mono::MonoItem;
 use rustc_middle::ty::{self, Instance, Ty};
 use rustc_middle::ty::layout::LayoutOf;
-use rustc_middle::mir::interpret::{self, ConstAllocation, ErrorHandled, GlobalAlloc, Scalar as InterpScalar, read_target_uint};
+use rustc_middle::mir::interpret::{self, ConstAllocation, ErrorHandled, Scalar as InterpScalar, read_target_uint};
 use rustc_span::def_id::DefId;
-use rustc_target::abi::{self, AddressSpace, Align, HasDataLayout, Primitive, Size, WrappingRange};
+use rustc_target::abi::{self, Align, HasDataLayout, Primitive, Size, WrappingRange};
 
 use crate::base;
 use crate::context::CodegenCx;
@@ -307,12 +307,7 @@ pub fn const_alloc_to_gcc<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, alloc: ConstAl
             .expect("const_alloc_to_llvm: could not read relocation pointer")
             as u64;
 
-        let address_space = match cx.tcx.global_alloc(alloc_id) {
-            GlobalAlloc::Function(..) => cx.data_layout().instruction_address_space,
-            GlobalAlloc::Static(..) | GlobalAlloc::Memory(..) | GlobalAlloc::VTable(..) => {
-                AddressSpace::DATA
-            }
-        };
+        let address_space = cx.tcx.global_alloc(alloc_id).address_space(cx);
 
         llvals.push(cx.scalar_to_backend(
             InterpScalar::from_pointer(

From 1640ccac4da37ae2095d6e9bec68ff90aa71aecf Mon Sep 17 00:00:00 2001
From: David Wood <david.wood@huawei.com>
Date: Fri, 19 Aug 2022 14:48:15 +0100
Subject: [PATCH 292/997] session: diagnostic migration lint on more fns

Apply the diagnostic migration lint to more functions on `Session`.

Signed-off-by: David Wood <david.wood@huawei.com>
---
 src/lib.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/lib.rs b/src/lib.rs
index 16db781a894a..48c16cba240c 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -202,6 +202,7 @@ unsafe impl Sync for GccContext {}
 impl WriteBackendMethods for GccCodegenBackend {
     type Module = GccContext;
     type TargetMachine = ();
+    type TargetMachineError = ();
     type ModuleBuffer = ModuleBuffer;
     type ThinData = ();
     type ThinBuffer = ThinBuffer;

From ae429e8cab135902df69135d8b4b4aca555f4ace Mon Sep 17 00:00:00 2001
From: Oli Scherer <git-spam-no-reply9815368754983@oli-obk.de>
Date: Tue, 14 Feb 2023 08:51:19 +0000
Subject: [PATCH 293/997] s/eval_usize/eval_target_usize/ for clarity

---
 src/intrinsic/simd.rs | 189 +++++++++++++++++++++++++-----------------
 1 file changed, 111 insertions(+), 78 deletions(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index ff75543ecd1e..b8c479970091 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -1,6 +1,7 @@
 #[cfg_attr(not(feature="master"), allow(unused_imports))]
 use gccjit::{ToRValue, ComparisonOp, UnaryOp};
 use gccjit::{BinaryOp, RValue, Type};
+
 use rustc_codegen_ssa::base::compare_simd_types;
 use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
 use rustc_codegen_ssa::mir::operand::OperandRef;
@@ -10,52 +11,58 @@ use rustc_hir as hir;
 use rustc_middle::span_bug;
 use rustc_middle::ty::layout::HasTyCtxt;
 use rustc_middle::ty::{self, Ty};
-use rustc_span::{Span, Symbol, sym};
+use rustc_span::{sym, Span, Symbol};
 use rustc_target::abi::Align;
 
 use crate::builder::Builder;
 #[cfg(feature="master")]
 use crate::context::CodegenCx;
 use crate::errors::{
-    InvalidMonomorphizationInvalidFloatVector,
-    InvalidMonomorphizationNotFloat,
-    InvalidMonomorphizationUnrecognized,
-    InvalidMonomorphizationExpectedSignedUnsigned,
-    InvalidMonomorphizationUnsupportedElement,
-    InvalidMonomorphizationInvalidBitmask,
-    InvalidMonomorphizationSimdShuffle,
-    InvalidMonomorphizationExpectedSimd,
-    InvalidMonomorphizationMaskType,
-    InvalidMonomorphizationReturnLength,
-    InvalidMonomorphizationReturnLengthInputType,
-    InvalidMonomorphizationReturnElement,
-    InvalidMonomorphizationReturnType,
-    InvalidMonomorphizationInsertedType,
-    InvalidMonomorphizationReturnIntegerType,
-    InvalidMonomorphizationMismatchedLengths,
-    InvalidMonomorphizationUnsupportedOperation
+    InvalidMonomorphizationExpectedSignedUnsigned, InvalidMonomorphizationExpectedSimd,
+    InvalidMonomorphizationInsertedType, InvalidMonomorphizationInvalidBitmask,
+    InvalidMonomorphizationInvalidFloatVector, InvalidMonomorphizationMaskType,
+    InvalidMonomorphizationMismatchedLengths, InvalidMonomorphizationNotFloat,
+    InvalidMonomorphizationReturnElement, InvalidMonomorphizationReturnIntegerType,
+    InvalidMonomorphizationReturnLength, InvalidMonomorphizationReturnLengthInputType,
+    InvalidMonomorphizationReturnType, InvalidMonomorphizationSimdShuffle,
+    InvalidMonomorphizationUnrecognized, InvalidMonomorphizationUnsupportedElement,
+    InvalidMonomorphizationUnsupportedOperation,
 };
 
-pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>, name: Symbol, callee_ty: Ty<'tcx>, args: &[OperandRef<'tcx, RValue<'gcc>>], ret_ty: Ty<'tcx>, llret_ty: Type<'gcc>, span: Span) -> Result<RValue<'gcc>, ()> {
+pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
+    bx: &mut Builder<'a, 'gcc, 'tcx>,
+    name: Symbol,
+    callee_ty: Ty<'tcx>,
+    args: &[OperandRef<'tcx, RValue<'gcc>>],
+    ret_ty: Ty<'tcx>,
+    llret_ty: Type<'gcc>,
+    span: Span,
+) -> Result<RValue<'gcc>, ()> {
     // macros for error handling:
     macro_rules! return_error {
-        ($err:expr) => {
-            {
-                bx.sess().emit_err($err);
-                return Err(());
-            }
-        }
+        ($err:expr) => {{
+            bx.sess().emit_err($err);
+            return Err(());
+        }};
     }
     macro_rules! require {
         ($cond:expr, $err:expr) => {
             if !$cond {
                 return_error!($err);
             }
-        }
+        };
     }
     macro_rules! require_simd {
         ($ty: expr, $position: expr) => {
-            require!($ty.is_simd(), InvalidMonomorphizationExpectedSimd { span, name, position: $position, found_ty: $ty })
+            require!(
+                $ty.is_simd(),
+                InvalidMonomorphizationExpectedSimd {
+                    span,
+                    name,
+                    position: $position,
+                    found_ty: $ty
+                }
+            )
         };
     }
 
@@ -77,7 +84,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
             ty::Uint(i) if i.bit_width() == Some(expected_int_bits) => args[0].immediate(),
             ty::Array(elem, len)
                 if matches!(elem.kind(), ty::Uint(ty::UintTy::U8))
-                    && len.try_eval_usize(bx.tcx, ty::ParamEnv::reveal_all())
+                    && len.try_eval_target_usize(bx.tcx, ty::ParamEnv::reveal_all())
                         == Some(expected_bytes) =>
             {
                 let place = PlaceRef::alloca(bx, args[0].layout);
@@ -86,9 +93,13 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                 let ptr = bx.pointercast(place.llval, bx.cx.type_ptr_to(int_ty));
                 bx.load(int_ty, ptr, Align::ONE)
             }
-            _ => return_error!(
-                InvalidMonomorphizationInvalidBitmask { span, name, ty: mask_ty, expected_int_bits, expected_bytes }
-            ),
+            _ => return_error!(InvalidMonomorphizationInvalidBitmask {
+                span,
+                name,
+                ty: mask_ty,
+                expected_int_bits,
+                expected_bytes
+            }),
         };
 
         let arg1 = args[1].immediate();
@@ -134,11 +145,18 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let (out_len, out_ty) = ret_ty.simd_size_and_type(bx.tcx());
         require!(
             in_len == out_len,
-            InvalidMonomorphizationReturnLengthInputType { span, name, in_len, in_ty, ret_ty, out_len }
+            InvalidMonomorphizationReturnLengthInputType {
+                span,
+                name,
+                in_len,
+                in_ty,
+                ret_ty,
+                out_len
+            }
         );
         require!(
             bx.type_kind(bx.element_type(llret_ty)) == TypeKind::Integer,
-            InvalidMonomorphizationReturnIntegerType {span, name, ret_ty, out_ty}
+            InvalidMonomorphizationReturnIntegerType { span, name, ret_ty, out_ty }
         );
 
         return Ok(compare_simd_types(
@@ -152,26 +170,26 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
     }
 
     if let Some(stripped) = name.as_str().strip_prefix("simd_shuffle") {
-        let n: u64 =
-            if stripped.is_empty() {
-                // Make sure this is actually an array, since typeck only checks the length-suffixed
-                // version of this intrinsic.
-                match args[2].layout.ty.kind() {
-                    ty::Array(ty, len) if matches!(ty.kind(), ty::Uint(ty::UintTy::U32)) => {
-                        len.try_eval_usize(bx.cx.tcx, ty::ParamEnv::reveal_all()).unwrap_or_else(|| {
-                            span_bug!(span, "could not evaluate shuffle index array length")
-                        })
-                    }
-                    _ => return_error!(
-                        InvalidMonomorphizationSimdShuffle { span, name, ty: args[2].layout.ty }
-                    ),
+        let n: u64 = if stripped.is_empty() {
+            // Make sure this is actually an array, since typeck only checks the length-suffixed
+            // version of this intrinsic.
+            match args[2].layout.ty.kind() {
+                ty::Array(ty, len) if matches!(ty.kind(), ty::Uint(ty::UintTy::U32)) => {
+                    len.try_eval_target_usize(bx.cx.tcx, ty::ParamEnv::reveal_all()).unwrap_or_else(
+                        || span_bug!(span, "could not evaluate shuffle index array length"),
+                    )
                 }
+                _ => return_error!(InvalidMonomorphizationSimdShuffle {
+                    span,
+                    name,
+                    ty: args[2].layout.ty
+                }),
             }
-            else {
-                stripped.parse().unwrap_or_else(|_| {
-                    span_bug!(span, "bad `simd_shuffle` instruction only caught in codegen?")
-                })
-            };
+        } else {
+            stripped.parse().unwrap_or_else(|_| {
+                span_bug!(span, "bad `simd_shuffle` instruction only caught in codegen?")
+            })
+        };
 
         require_simd!(ret_ty, "return");
 
@@ -187,14 +205,10 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
 
         let vector = args[2].immediate();
 
-        return Ok(bx.shuffle_vector(
-            args[0].immediate(),
-            args[1].immediate(),
-            vector,
-        ));
+        return Ok(bx.shuffle_vector(args[0].immediate(), args[1].immediate(), vector));
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     if name == sym::simd_insert {
         require!(
             in_elem == arg_tys[2],
@@ -211,7 +225,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         return Ok(variable.to_rvalue());
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     if name == sym::simd_extract {
         require!(
             ret_ty == in_elem,
@@ -243,7 +257,14 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         let (out_len, out_elem) = ret_ty.simd_size_and_type(bx.tcx());
         require!(
             in_len == out_len,
-            InvalidMonomorphizationReturnLengthInputType { span, name, in_len, in_ty, ret_ty, out_len }
+            InvalidMonomorphizationReturnLengthInputType {
+                span,
+                name,
+                in_len,
+                in_ty,
+                ret_ty,
+                out_len
+            }
         );
         // casting cares about nominal type, not just structural type
         if in_elem == out_elem {
@@ -373,12 +394,10 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         args: &[OperandRef<'tcx, RValue<'gcc>>],
     ) -> Result<RValue<'gcc>, ()> {
         macro_rules! return_error {
-            ($err:expr) => {
-                {
-                    bx.sess().emit_err($err);
-                    return Err(());
-                }
-            }
+            ($err:expr) => {{
+                bx.sess().emit_err($err);
+                return Err(());
+            }};
         }
         let (elem_ty_str, elem_ty) =
             if let ty::Float(f) = in_elem.kind() {
@@ -391,9 +410,9 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                     }
                 }
             }
-            else {
-                return_error!(InvalidMonomorphizationNotFloat { span, name, ty: in_ty });
-            };
+        } else {
+            return_error!(InvalidMonomorphizationNotFloat { span, name, ty: in_ty });
+        };
 
         let vec_ty = bx.cx.type_vector(elem_ty, in_len);
 
@@ -778,7 +797,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
         simd_neg: Int => neg, Float => fneg;
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     if name == sym::simd_saturating_add || name == sym::simd_saturating_sub {
         let lhs = args[0].immediate();
         let rhs = args[1].immediate();
@@ -898,8 +917,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                             // if overflow occurs, the result is the
                             // mathematical result modulo 2^n:
                             Ok(bx.$op(args[1].immediate(), r))
-                        }
-                        else {
+                        } else {
                             Ok(bx.vector_reduce_op(args[0].immediate(), $vec_op))
                         }
                     }
@@ -908,12 +926,17 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                             // ordered arithmetic reductions take an accumulator
                             let acc = args[1].immediate();
                             Ok(bx.$float_reduce(acc, args[0].immediate()))
-                        }
-                        else {
+                        } else {
                             Ok(bx.vector_reduce_op(args[0].immediate(), $vec_op))
                         }
                     }
-                    _ => return_error!(InvalidMonomorphizationUnsupportedElement { span, name, in_ty, elem_ty: in_elem, ret_ty }),
+                    _ => return_error!(InvalidMonomorphizationUnsupportedElement {
+                        span,
+                        name,
+                        in_ty,
+                        elem_ty: in_elem,
+                        ret_ty
+                    }),
                 };
             }
         };
@@ -983,7 +1006,13 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                 } else {
                     match in_elem.kind() {
                         ty::Int(_) | ty::Uint(_) => {}
-                        _ => return_error!(InvalidMonomorphizationUnsupportedElement { span, name, in_ty, elem_ty: in_elem, ret_ty }),
+                        _ => return_error!(InvalidMonomorphizationUnsupportedElement {
+                            span,
+                            name,
+                            in_ty,
+                            elem_ty: in_elem,
+                            ret_ty
+                        }),
                     }
 
                     args[0].immediate()
@@ -993,9 +1022,13 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>,
                         let r = bx.vector_reduce_op(input, $op);
                         Ok(if !$boolean { r } else { bx.icmp(IntPredicate::IntNE, r, bx.context.new_rvalue_zero(r.get_type())) })
                     }
-                    _ => return_error!(
-                        InvalidMonomorphizationUnsupportedElement { span, name, in_ty, elem_ty: in_elem, ret_ty }
-                    ),
+                    _ => return_error!(InvalidMonomorphizationUnsupportedElement {
+                        span,
+                        name,
+                        in_ty,
+                        elem_ty: in_elem,
+                        ret_ty
+                    }),
                 };
             }
         };

From 564ab10b9c6799063934ef7e6d82b8388f349047 Mon Sep 17 00:00:00 2001
From: David Wood <david.wood@huawei.com>
Date: Thu, 13 Oct 2022 10:13:02 +0100
Subject: [PATCH 294/997] errors: generate typed identifiers in each crate

Instead of loading the Fluent resources for every crate in
`rustc_error_messages`, each crate generates typed identifiers for its
own diagnostics and creates a static which are pulled together in the
`rustc_driver` crate and provided to the diagnostic emitter.

Signed-off-by: David Wood <david.wood@huawei.com>
---
 locales/en-US.ftl | 62 +++++++++++++++++++++++++++++++++++++++++++++++
 src/lib.rs        |  5 +++-
 2 files changed, 66 insertions(+), 1 deletion(-)
 create mode 100644 locales/en-US.ftl

diff --git a/locales/en-US.ftl b/locales/en-US.ftl
new file mode 100644
index 000000000000..6101b28ab0cd
--- /dev/null
+++ b/locales/en-US.ftl
@@ -0,0 +1,62 @@
+codegen_gcc_unwinding_inline_asm =
+    GCC backend does not support unwinding from inline asm
+
+codegen_gcc_lto_not_supported =
+    LTO is not supported. You may get a linker error.
+
+codegen_gcc_invalid_monomorphization_basic_integer =
+    invalid monomorphization of `{$name}` intrinsic: expected basic integer type, found `{$ty}`
+
+codegen_gcc_invalid_monomorphization_invalid_float_vector =
+    invalid monomorphization of `{$name}` intrinsic: unsupported element type `{$elem_ty}` of floating-point vector `{$vec_ty}`
+
+codegen_gcc_invalid_monomorphization_not_float =
+    invalid monomorphization of `{$name}` intrinsic: `{$ty}` is not a floating-point type
+
+codegen_gcc_invalid_monomorphization_unrecognized =
+    invalid monomorphization of `{$name}` intrinsic: unrecognized intrinsic `{$name}`
+
+codegen_gcc_invalid_monomorphization_expected_signed_unsigned =
+    invalid monomorphization of `{$name}` intrinsic: expected element type `{$elem_ty}` of vector type `{$vec_ty}` to be a signed or unsigned integer type
+
+codegen_gcc_invalid_monomorphization_unsupported_element =
+    invalid monomorphization of `{$name}` intrinsic: unsupported {$name} from `{$in_ty}` with element `{$elem_ty}` to `{$ret_ty}`
+
+codegen_gcc_invalid_monomorphization_invalid_bitmask =
+    invalid monomorphization of `{$name}` intrinsic: invalid bitmask `{$ty}`, expected `u{$expected_int_bits}` or `[u8; {$expected_bytes}]`
+
+codegen_gcc_invalid_monomorphization_simd_shuffle =
+    invalid monomorphization of `{$name}` intrinsic: simd_shuffle index must be an array of `u32`, got `{$ty}`
+
+codegen_gcc_invalid_monomorphization_expected_simd =
+    invalid monomorphization of `{$name}` intrinsic: expected SIMD {$expected_ty} type, found non-SIMD `{$found_ty}`
+
+codegen_gcc_invalid_monomorphization_mask_type =
+    invalid monomorphization of `{$name}` intrinsic: mask element type is `{$ty}`, expected `i_`
+
+codegen_gcc_invalid_monomorphization_return_length =
+    invalid monomorphization of `{$name}` intrinsic: expected return type of length {$in_len}, found `{$ret_ty}` with length {$out_len}
+
+codegen_gcc_invalid_monomorphization_return_length_input_type =
+    invalid monomorphization of `{$name}` intrinsic: expected return type with length {$in_len} (same as input type `{$in_ty}`), found `{$ret_ty}` with length {$out_len}
+
+codegen_gcc_invalid_monomorphization_return_element =
+    invalid monomorphization of `{$name}` intrinsic: expected return element type `{$in_elem}` (element of input `{$in_ty}`), found `{$ret_ty}` with element type `{$out_ty}`
+
+codegen_gcc_invalid_monomorphization_return_type =
+    invalid monomorphization of `{$name}` intrinsic: expected return type `{$in_elem}` (element of input `{$in_ty}`), found `{$ret_ty}`
+
+codegen_gcc_invalid_monomorphization_inserted_type =
+    invalid monomorphization of `{$name}` intrinsic: expected inserted type `{$in_elem}` (element of input `{$in_ty}`), found `{$out_ty}`
+
+codegen_gcc_invalid_monomorphization_return_integer_type =
+    invalid monomorphization of `{$name}` intrinsic: expected return type with integer elements, found `{$ret_ty}` with non-integer `{$out_ty}`
+
+codegen_gcc_invalid_monomorphization_mismatched_lengths =
+    invalid monomorphization of `{$name}` intrinsic: mismatched lengths: mask length `{$m_len}` != other vector length `{$v_len}`
+
+codegen_gcc_invalid_monomorphization_unsupported_cast =
+    invalid monomorphization of `{$name}` intrinsic: unsupported cast from `{$in_ty}` with element `{$in_elem}` to `{$ret_ty}` with element `{$out_elem}`
+
+codegen_gcc_invalid_monomorphization_unsupported_operation =
+    invalid monomorphization of `{$name}` intrinsic: unsupported operation on `{$in_ty}` with element `{$in_elem}`
diff --git a/src/lib.rs b/src/lib.rs
index 48c16cba240c..c32c837d83a8 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -75,7 +75,8 @@ use rustc_codegen_ssa::back::lto::{LtoModuleCodegen, SerializedModule, ThinModul
 use rustc_codegen_ssa::target_features::supported_target_features;
 use rustc_codegen_ssa::traits::{CodegenBackend, ExtraBackendMethods, ModuleBufferMethods, ThinBufferMethods, WriteBackendMethods};
 use rustc_data_structures::fx::FxHashMap;
-use rustc_errors::{ErrorGuaranteed, Handler};
+use rustc_errors::{DiagnosticMessage, ErrorGuaranteed, Handler, SubdiagnosticMessage};
+use rustc_macros::fluent_messages;
 use rustc_metadata::EncodedMetadata;
 use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
 use rustc_middle::ty::TyCtxt;
@@ -86,6 +87,8 @@ use rustc_span::Symbol;
 use rustc_span::fatal_error::FatalError;
 use tempfile::TempDir;
 
+fluent_messages! { "../locales/en-US.ftl" }
+
 pub struct PrintOnPanic<F: Fn() -> String>(pub F);
 
 impl<F: Fn() -> String> Drop for PrintOnPanic<F> {

From 7696f981ea8a19d4e1e261bef6ade31d4d902f38 Mon Sep 17 00:00:00 2001
From: David Wood <david.wood@huawei.com>
Date: Mon, 17 Oct 2022 14:11:26 +0100
Subject: [PATCH 295/997] various: translation resources from cg backend

Extend `CodegenBackend` trait with a function returning the translation
resources from the codegen backend, which can be added to the complete
list of resources provided to the emitter.

Signed-off-by: David Wood <david.wood@huawei.com>
---
 src/lib.rs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/lib.rs b/src/lib.rs
index c32c837d83a8..1b7feb5f8a18 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -105,6 +105,10 @@ pub struct GccCodegenBackend {
 }
 
 impl CodegenBackend for GccCodegenBackend {
+    fn locale_resource(&self) -> &'static str {
+        crate::DEFAULT_LOCALE_RESOURCE
+    }
+
     fn init(&self, sess: &Session) {
         if sess.lto() != Lto::No {
             sess.emit_warning(LTONotSupported {});

From 802e9026d93557e2d4ee03c7ab80aac4a665ead1 Mon Sep 17 00:00:00 2001
From: Alan Egerton <eggyal@gmail.com>
Date: Wed, 22 Feb 2023 02:18:40 +0000
Subject: [PATCH 296/997] Remove type-traversal trait aliases

---
 src/callee.rs    | 2 +-
 src/mono_item.rs | 2 +-
 src/type_of.rs   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/callee.rs b/src/callee.rs
index bc68340e7a07..ba1e86562089 100644
--- a/src/callee.rs
+++ b/src/callee.rs
@@ -1,7 +1,7 @@
 #[cfg(feature="master")]
 use gccjit::{FnAttribute, Visibility};
 use gccjit::{FunctionType, Function};
-use rustc_middle::ty::{self, Instance, TypeVisitable};
+use rustc_middle::ty::{self, Instance, TypeVisitableExt};
 use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt};
 
 use crate::attributes;
diff --git a/src/mono_item.rs b/src/mono_item.rs
index 0491fffc8abf..c1f6340866ca 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -4,7 +4,7 @@ use rustc_codegen_ssa::traits::PreDefineMethods;
 use rustc_hir::def_id::{DefId, LOCAL_CRATE};
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
 use rustc_middle::mir::mono::{Linkage, Visibility};
-use rustc_middle::ty::{self, Instance, TypeVisitable};
+use rustc_middle::ty::{self, Instance, TypeVisitableExt};
 use rustc_middle::ty::layout::{FnAbiOf, LayoutOf};
 
 use crate::attributes;
diff --git a/src/type_of.rs b/src/type_of.rs
index b01bd114656c..1a4fae666f22 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -3,7 +3,7 @@ use std::fmt::Write;
 use gccjit::{Struct, Type};
 use crate::rustc_codegen_ssa::traits::{BaseTypeMethods, DerivedTypeMethods, LayoutTypeMethods};
 use rustc_middle::bug;
-use rustc_middle::ty::{self, Ty, TypeVisitable};
+use rustc_middle::ty::{self, Ty, TypeVisitableExt};
 use rustc_middle::ty::layout::{FnAbiOf, LayoutOf, TyAndLayout};
 use rustc_middle::ty::print::with_no_trimmed_paths;
 use rustc_target::abi::{self, Abi, F32, F64, FieldsShape, Int, Integer, Pointer, PointeeInfo, Size, TyAbiInterface, Variants};

From 78f3a7ed1ffc2787205bf64fc70cfa15640fba1e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 28 Feb 2023 18:57:08 -0500
Subject: [PATCH 297/997] Update toolchain

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index 775d9906bf41..a6d506185dc6 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2022-08-26"
+channel = "nightly-2023-02-28"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From e74f6ff54fc6c0d266387a3f04730abd43d69901 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 28 Feb 2023 22:35:10 -0500
Subject: [PATCH 298/997] Fix rebase

---
 src/builder.rs        |  25 +++----
 src/context.rs        |   2 +-
 src/intrinsic/mod.rs  |  10 +--
 src/intrinsic/simd.rs | 154 ++++++++++++++++++++++--------------------
 src/type_.rs          |   4 --
 5 files changed, 96 insertions(+), 99 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 05b3bacfbf91..913f5734ff0d 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -455,12 +455,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     #[cfg(feature="master")]
-    fn invoke(&mut self, typ: Type<'gcc>, fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
+    fn invoke(&mut self, typ: Type<'gcc>, _fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
         let try_block = self.current_func().new_block("try");
 
         let current_block = self.block.clone();
         self.block = try_block;
-        let call = self.call(typ, func, args, None); // TODO(antoyo): use funclet here?
+        let call = self.call(typ, None, func, args, None); // TODO(antoyo): use funclet here?
         self.block = current_block;
 
         let return_value = self.current_func()
@@ -1210,23 +1210,20 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let zero = self.cx.context.new_rvalue_zero(self.int_type);
         let ptr = self.cx.context.new_call(None, eh_pointer_builtin, &[zero]);
 
-        let field1_type = self.u8_type.make_pointer();
-        let field1 = self.context.new_field(None, field1_type, "landing_pad_field_1");
-        let field2 = self.context.new_field(None, self.i32_type, "landing_pad_field_2");
-        let struct_type = self.context.new_struct_type(None, "landing_pad", &[field1, field2]);
-        let value = self.current_func().new_local(None, struct_type.as_type(), "landing_pad");
-        let ptr = self.cx.context.new_cast(None, ptr, field1_type);
-        self.block.add_assignment(None, value.access_field(None, field1), ptr);
-        self.block.add_assignment(None, value.access_field(None, field2), zero); // TODO(antoyo): set the proper value here (the type of exception?).
+        let value1_type = self.u8_type.make_pointer();
+        let ptr = self.cx.context.new_cast(None, ptr, value1_type);
+        let value1 = ptr;
+        let value2 = zero; // TODO(antoyo): set the proper value here (the type of exception?).
 
-        value.to_rvalue()
+        (value1, value2)
     }
 
     #[cfg(not(feature="master"))]
     fn cleanup_landing_pad(&mut self, _pers_fn: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
-        let field1 = self.context.new_field(None, self.u8_type.make_pointer(), "landing_pad_field_1");
-        let field2 = self.context.new_field(None, self.i32_type, "landing_pad_field_1");
-        (field1, field2)
+        let value1 = self.current_func().new_local(None, self.u8_type.make_pointer(), "landing_pad0")
+                .to_rvalue();
+        let value2 = self.current_func().new_local(None, self.i32_type, "landing_pad1").to_rvalue();
+        (value1, value2)
     }
 
     #[cfg(feature="master")]
diff --git a/src/context.rs b/src/context.rs
index 9bd3710ac8ad..661681bdb50f 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -391,7 +391,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                             tcx,
                             ty::ParamEnv::reveal_all(),
                             def_id,
-                            tcx.intern_substs(&[]),
+                            ty::List::empty(),
                         )
                         .unwrap().unwrap();
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index b58381871a9c..2590e0e3af44 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1202,21 +1202,21 @@ fn codegen_gnu_try<'gcc>(bx: &mut Builder<'_, 'gcc, '_>, try_func: RValue<'gcc>,
         let zero = bx.cx.context.new_rvalue_zero(bx.int_type);
         let ptr = bx.cx.context.new_call(None, eh_pointer_builtin, &[zero]);
         let catch_ty = bx.type_func(&[bx.type_i8p(), bx.type_i8p()], bx.type_void());
-        bx.call(catch_ty, catch_func, &[data, ptr], None);
+        bx.call(catch_ty, None, catch_func, &[data, ptr], None);
         bx.ret(bx.const_i32(1));
 
         // NOTE: the blocks must be filled before adding the try/catch, otherwise gcc will not
         // generate a try/catch.
         // FIXME(antoyo): add a check in the libgccjit API to prevent this.
         bx.switch_to_block(current_block);
-        bx.invoke(try_func_ty, try_func, &[data], then, catch, None);
+        bx.invoke(try_func_ty, None, try_func, &[data], then, catch, None);
     });
 
     let func = unsafe { std::mem::transmute(func) };
 
     // Note that no invoke is used here because by definition this function
     // can't panic (that's what it's catching).
-    let ret = bx.call(llty, func, &[try_func, data, catch_func], None);
+    let ret = bx.call(llty, None, func, &[try_func, data, catch_func], None);
     let i32_align = bx.tcx().data_layout.i32_align.abi;
     bx.store(ret, dest, i32_align);
 }
@@ -1253,8 +1253,8 @@ fn get_rust_try_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, codegen: &mut
     )));
     // `unsafe fn(unsafe fn(*mut i8) -> (), *mut i8, unsafe fn(*mut i8, *mut i8) -> ()) -> i32`
     let rust_fn_sig = ty::Binder::dummy(cx.tcx.mk_fn_sig(
-        [try_fn_ty, i8p, catch_fn_ty].iter(),
-        &tcx.types.i32,
+        [try_fn_ty, i8p, catch_fn_ty],
+        tcx.types.i32,
         false,
         rustc_hir::Unsafety::Unsafe,
         Abi::Rust,
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index b8c479970091..fca59d50974f 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -4,6 +4,7 @@ use gccjit::{BinaryOp, RValue, Type};
 
 use rustc_codegen_ssa::base::compare_simd_types;
 use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
+use rustc_codegen_ssa::errors::{ExpectedPointerMutability, InvalidMonomorphization};
 use rustc_codegen_ssa::mir::operand::OperandRef;
 use rustc_codegen_ssa::mir::place::PlaceRef;
 use rustc_codegen_ssa::traits::{BaseTypeMethods, BuilderMethods};
@@ -295,11 +296,14 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             (Style::Unsupported, Style::Unsupported) => {
                 require!(
                     false,
-                    "unsupported cast from `{}` with element `{}` to `{}` with element `{}`",
-                    in_ty,
-                    in_elem,
-                    ret_ty,
-                    out_elem
+                    InvalidMonomorphization::UnsupportedCast {
+                        span,
+                        name,
+                        in_ty,
+                        in_elem,
+                        ret_ty,
+                        out_elem
+                    }
                 );
             },
             _ => return Ok(bx.context.convert_vector(None, args[0].immediate(), llret_ty)),
@@ -362,7 +366,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             }
             ty::Array(elem, len)
                 if matches!(elem.kind(), ty::Uint(ty::UintTy::U8))
-                    && len.try_eval_usize(bx.tcx, ty::ParamEnv::reveal_all())
+                    && len.try_eval_target_usize(bx.tcx, ty::ParamEnv::reveal_all())
                         == Some(expected_bytes) =>
             {
                 // Zero-extend iN to the array length:
@@ -375,12 +379,13 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                 let ptr = bx.pointercast(ptr, bx.cx.type_ptr_to(array_ty));
                 return Ok(bx.load(array_ty, ptr, Align::ONE));
             }
-            _ => return_error!(
-                "cannot return `{}`, expected `u{}` or `[u8; {}]`",
+            _ => return_error!(InvalidMonomorphization::CannotReturn {
+                span,
+                name,
                 ret_ty,
                 expected_int_bits,
                 expected_bytes
-            ),
+            }),
         }
     }
 
@@ -410,9 +415,9 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                     }
                 }
             }
-        } else {
-            return_error!(InvalidMonomorphizationNotFloat { span, name, ty: in_ty });
-        };
+            else {
+                return_error!(InvalidMonomorphizationNotFloat { span, name, ty: in_ty });
+            };
 
         let vec_ty = bx.cx.type_vector(elem_ty, in_len);
 
@@ -560,27 +565,32 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         let (out_len2, _) = arg_tys[2].simd_size_and_type(bx.tcx());
         require!(
             in_len == out_len,
-            "expected {} argument with length {} (same as input type `{}`), \
-            found `{}` with length {}",
-            "second",
-            in_len,
-            in_ty,
-            arg_tys[1],
-            out_len
+            InvalidMonomorphization::SecondArgumentLength {
+                span,
+                name,
+                in_len,
+                in_ty,
+                arg_ty: arg_tys[1],
+                out_len
+            }
         );
         require!(
             in_len == out_len2,
-            "expected {} argument with length {} (same as input type `{}`), \
-            found `{}` with length {}",
-            "third",
-            in_len,
-            in_ty,
-            arg_tys[2],
-            out_len2
+            InvalidMonomorphization::ThirdArgumentLength {
+                span,
+                name,
+                in_len,
+                in_ty,
+                arg_ty: arg_tys[2],
+                out_len: out_len2
+            }
         );
 
         // The return type must match the first argument type
-        require!(ret_ty == in_ty, "expected return type `{}`, found `{}`", in_ty, ret_ty);
+        require!(
+            ret_ty == in_ty,
+            InvalidMonomorphization::ExpectedReturnType { span, name, in_ty, ret_ty }
+        );
 
         // This counts how many pointers
         fn ptr_count(t: Ty<'_>) -> usize {
@@ -607,15 +617,15 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             _ => {
                 require!(
                     false,
-                    "expected element type `{}` of second argument `{}` \
-                    to be a pointer to the element type `{}` of the first \
-                        argument `{}`, found `{}` != `*_ {}`",
-                        element_ty1,
-                        arg_tys[1],
+                    InvalidMonomorphization::ExpectedElementType {
+                        span,
+                        name,
+                        expected_element: element_ty1,
+                        second_arg: arg_tys[1],
                         in_elem,
                         in_ty,
-                        element_ty1,
-                        in_elem
+                        mutability: ExpectedPointerMutability::Not,
+                    }
                 );
                 unreachable!();
             }
@@ -631,10 +641,12 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             _ => {
                 require!(
                     false,
-                    "expected element type `{}` of third argument `{}` \
-                    to be a signed integer type",
-                    element_ty2,
-                    arg_tys[2]
+                    InvalidMonomorphization::ThirdArgElementType {
+                        span,
+                        name,
+                        expected_element: element_ty2,
+                        third_arg: arg_tys[2]
+                    }
                 );
             }
         }
@@ -660,23 +672,25 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         let (element_len2, _) = arg_tys[2].simd_size_and_type(bx.tcx());
         require!(
             in_len == element_len1,
-            "expected {} argument with length {} (same as input type `{}`), \
-            found `{}` with length {}",
-            "second",
-            in_len,
-            in_ty,
-            arg_tys[1],
-            element_len1
+            InvalidMonomorphization::SecondArgumentLength {
+                span,
+                name,
+                in_len,
+                in_ty,
+                arg_ty: arg_tys[1],
+                out_len: element_len1
+            }
         );
         require!(
             in_len == element_len2,
-            "expected {} argument with length {} (same as input type `{}`), \
-            found `{}` with length {}",
-            "third",
-            in_len,
-            in_ty,
-            arg_tys[2],
-            element_len2
+            InvalidMonomorphization::ThirdArgumentLength {
+                span,
+                name,
+                in_len,
+                in_ty,
+                arg_ty: arg_tys[2],
+                out_len: element_len2
+            }
         );
 
         // This counts how many pointers
@@ -707,15 +721,15 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             _ => {
                 require!(
                     false,
-                    "expected element type `{}` of second argument `{}` \
-                    to be a pointer to the element type `{}` of the first \
-                        argument `{}`, found `{}` != `*mut {}`",
-                        element_ty1,
-                        arg_tys[1],
+                    InvalidMonomorphization::ExpectedElementType {
+                        span,
+                        name,
+                        expected_element: element_ty1,
+                        second_arg: arg_tys[1],
                         in_elem,
                         in_ty,
-                        element_ty1,
-                        in_elem
+                        mutability: ExpectedPointerMutability::Mut,
+                    }
                 );
                 unreachable!();
             }
@@ -730,10 +744,12 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             _ => {
                 require!(
                     false,
-                    "expected element type `{}` of third argument `{}` \
-                    be a signed integer type",
-                    element_ty2,
-                    arg_tys[2]
+                    InvalidMonomorphization::ThirdArgElementType {
+                        span,
+                        name,
+                        expected_element: element_ty2,
+                        third_arg: arg_tys[2]
+                    }
                 );
             }
         }
@@ -816,18 +832,6 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                 });
             }
         };
-        let builtin_name =
-            match (signed, is_add, in_len, elem_width) {
-                (true, true, 32, 8) => "__builtin_ia32_paddsb256", // TODO(antoyo): cast arguments to unsigned.
-                (false, true, 32, 8) => "__builtin_ia32_paddusb256",
-                (true, true, 16, 16) => "__builtin_ia32_paddsw256",
-                (false, true, 16, 16) => "__builtin_ia32_paddusw256",
-                (true, false, 16, 16) => "__builtin_ia32_psubsw256",
-                (false, false, 16, 16) => "__builtin_ia32_psubusw256",
-                (true, false, 32, 8) => "__builtin_ia32_psubsb256",
-                (false, false, 32, 8) => "__builtin_ia32_psubusb256",
-                _ => unimplemented!("signed: {}, is_add: {}, in_len: {}, elem_width: {}", signed, is_add, in_len, elem_width),
-            };
 
         let result =
             match (signed, is_add) {
diff --git a/src/type_.rs b/src/type_.rs
index eacd76c6ea0e..929499666173 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -247,10 +247,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     pub fn type_named_struct(&self, name: &str) -> Struct<'gcc> {
         self.context.new_opaque_struct_type(None, name)
     }
-
-    pub fn type_bool(&self) -> Type<'gcc> {
-        self.context.new_type::<bool>()
-    }
 }
 
 pub fn struct_fields<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout<'tcx>) -> (Vec<Type<'gcc>>, bool) {

From d8b5a3eaa927c0b8730d3fb3e4cd0731bbe48813 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 28 Feb 2023 22:39:50 -0500
Subject: [PATCH 299/997] Fix to examples

---
 example/mini_core.rs             | 17 +++++++++++++----
 example/mini_core_hello_world.rs |  1 +
 src/common.rs                    |  4 ++--
 3 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/example/mini_core.rs b/example/mini_core.rs
index b23ecda35d3e..637b8dc53fef 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -17,6 +17,9 @@ pub trait Sized {}
 #[lang = "destruct"]
 pub trait Destruct {}
 
+#[lang = "tuple_trait"]
+pub trait Tuple {}
+
 #[lang = "unsize"]
 pub trait Unsize<T: ?Sized> {}
 
@@ -396,7 +399,7 @@ pub struct PhantomData<T: ?Sized>;
 
 #[lang = "fn_once"]
 #[rustc_paren_sugar]
-pub trait FnOnce<Args> {
+pub trait FnOnce<Args: Tuple> {
     #[lang = "fn_once_output"]
     type Output;
 
@@ -405,7 +408,7 @@ pub trait FnOnce<Args> {
 
 #[lang = "fn_mut"]
 #[rustc_paren_sugar]
-pub trait FnMut<Args>: FnOnce<Args> {
+pub trait FnMut<Args: Tuple>: FnOnce<Args> {
     extern "rust-call" fn call_mut(&mut self, args: Args) -> Self::Output;
 }
 
@@ -418,8 +421,8 @@ pub fn panic(_msg: &'static str) -> ! {
     }
 }
 
-#[lang = "panic_no_unwind"]
-fn panic_no_unwind() -> ! {
+#[lang = "panic_cannot_unwind"]
+fn panic_cannot_unwind() -> ! {
     unsafe {
         libc::puts("Panicking\n\0" as *const str as *const u8);
         intrinsics::abort();
@@ -531,16 +534,22 @@ pub mod intrinsics {
     use crate::Sized;
 
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
+        #[rustc_safe_intrinsic]
         pub fn size_of<T>() -> usize;
         pub fn size_of_val<T: ?Sized>(val: *const T) -> usize;
+        #[rustc_safe_intrinsic]
         pub fn min_align_of<T>() -> usize;
         pub fn min_align_of_val<T: ?Sized>(val: *const T) -> usize;
         pub fn copy<T>(src: *const T, dst: *mut T, count: usize);
         pub fn transmute<T, U>(e: T) -> U;
         pub fn ctlz_nonzero<T>(x: T) -> T;
+        #[rustc_safe_intrinsic]
         pub fn needs_drop<T: ?Sized>() -> bool;
+        #[rustc_safe_intrinsic]
         pub fn bitreverse<T>(x: T) -> T;
+        #[rustc_safe_intrinsic]
         pub fn bswap<T>(x: T) -> T;
         pub fn write_bytes<T>(dst: *mut T, val: u8, count: usize);
         pub fn unreachable() -> !;
diff --git a/example/mini_core_hello_world.rs b/example/mini_core_hello_world.rs
index 7b10425e800f..993a31e68eab 100644
--- a/example/mini_core_hello_world.rs
+++ b/example/mini_core_hello_world.rs
@@ -85,6 +85,7 @@ fn start<T: Termination + 'static>(
     main: fn() -> T,
     argc: isize,
     argv: *const *const u8,
+    _sigpipe: u8,
 ) -> isize {
     if argc == 3 {
         unsafe { puts(*argv); }
diff --git a/src/common.rs b/src/common.rs
index 54325e1277b0..12c0b3923234 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -115,8 +115,8 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         self.const_uint(self.usize_type, i)
     }
 
-    fn const_u8(&self, _i: u8) -> RValue<'gcc> {
-        unimplemented!();
+    fn const_u8(&self, i: u8) -> RValue<'gcc> {
+        self.const_uint(self.type_u8(), i as u64)
     }
 
     fn const_real(&self, typ: Type<'gcc>, val: f64) -> RValue<'gcc> {

From b4f83c6ed817bc42b1ea2e2c582488cfe5f6f1da Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 2 Mar 2023 17:15:57 -0500
Subject: [PATCH 300/997] Fix error

---
 ...0024-core-Disable-portable-simd-test.patch | 32 -------------------
 src/common.rs                                 |  2 +-
 src/consts.rs                                 |  9 +++---
 3 files changed, 6 insertions(+), 37 deletions(-)
 delete mode 100644 patches/0024-core-Disable-portable-simd-test.patch

diff --git a/patches/0024-core-Disable-portable-simd-test.patch b/patches/0024-core-Disable-portable-simd-test.patch
deleted file mode 100644
index 7ea0eebe6a12..000000000000
--- a/patches/0024-core-Disable-portable-simd-test.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From f845df4056f5ba16b9f5bd703460c4ac40ea03b9 Mon Sep 17 00:00:00 2001
-From: Antoni Boucher <bouanto@zoho.com>
-Date: Fri, 26 Aug 2022 20:38:58 -0400
-Subject: [PATCH] Edit
-
----
- library/core/tests/lib.rs | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
-index 59510d3..179bf26 100644
---- a/library/core/tests/lib.rs
-+++ b/library/core/tests/lib.rs
-@@ -77,7 +77,6 @@
- #![feature(unwrap_infallible)]
- #![feature(result_into_ok_or_err)]
- #![feature(pointer_byte_offsets)]
--#![feature(portable_simd)]
- #![feature(ptr_metadata)]
- #![feature(once_cell)]
- #![feature(option_result_contains)]
-@@ -135,7 +134,6 @@ mod pin;
- mod pin_macro;
- mod ptr;
- mod result;
--mod simd;
- mod slice;
- mod str;
- mod str_lossy;
--- 
-2.26.2.7.g19db9cfb68.dirty
-
diff --git a/src/common.rs b/src/common.rs
index 12c0b3923234..617c7e8640a9 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -241,7 +241,7 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let value =
             if layout.size == Size::ZERO {
                 let value = self.const_usize(alloc.inner().align.bytes());
-                self.context.new_cast(None, value, ty)
+                self.const_bitcast(value, ty)
             }
             else {
                 let init = const_alloc_to_gcc(self, alloc);
diff --git a/src/consts.rs b/src/consts.rs
index b651b60924f7..86a7f78de270 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -341,7 +341,7 @@ pub fn codegen_static_initializer<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, def_id
 
 fn check_and_apply_linkage<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, attrs: &CodegenFnAttrs, ty: Ty<'tcx>, sym: &str) -> LValue<'gcc> {
     let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-    let llty = cx.layout_of(ty).gcc_type(cx);
+    let gcc_type = cx.layout_of(ty).gcc_type(cx);
     if let Some(linkage) = attrs.import_linkage {
         // Declare a symbol `foo` with the desired linkage.
         let global1 = cx.declare_global_with_linkage(&sym, cx.type_i8(), base::global_linkage_to_gcc(linkage));
@@ -354,9 +354,10 @@ fn check_and_apply_linkage<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, attrs: &Codeg
         // zero.
         let mut real_name = "_rust_extern_with_linkage_".to_string();
         real_name.push_str(&sym);
-        let global2 = cx.define_global(&real_name, llty, is_tls, attrs.link_section);
+        let global2 = cx.define_global(&real_name, gcc_type, is_tls, attrs.link_section);
         // TODO(antoyo): set linkage.
-        global2.global_set_initializer_rvalue(global1.get_address(None));
+        let value = cx.const_ptrcast(global1.get_address(None), gcc_type);
+        global2.global_set_initializer_rvalue(value);
         // TODO(antoyo): use global_set_initializer() when it will work.
         global2
     }
@@ -370,6 +371,6 @@ fn check_and_apply_linkage<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, attrs: &Codeg
         // don't do this then linker errors can be generated where the linker
         // complains that one object files has a thread local version of the
         // symbol and another one doesn't.
-        cx.declare_global(&sym, llty, GlobalKind::Imported, is_tls, attrs.link_section)
+        cx.declare_global(&sym, gcc_type, GlobalKind::Imported, is_tls, attrs.link_section)
     }
 }

From 74506d3bb1b03ddad2637ceeb3e72b40bd803e26 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 2 Mar 2023 23:30:11 +0100
Subject: [PATCH 301/997] Regen intrinsics

---
 src/intrinsic/archs.rs | 74 ++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 72 insertions(+), 2 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 3879fcb1d982..8a4559355ea6 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -34,6 +34,7 @@ match name {
     "llvm.aarch64.dmb" => "__builtin_arm_dmb",
     "llvm.aarch64.dsb" => "__builtin_arm_dsb",
     "llvm.aarch64.isb" => "__builtin_arm_isb",
+    "llvm.aarch64.prefetch" => "__builtin_arm_prefetch",
     "llvm.aarch64.sve.aesd" => "__builtin_sve_svaesd_u8",
     "llvm.aarch64.sve.aese" => "__builtin_sve_svaese_u8",
     "llvm.aarch64.sve.aesimc" => "__builtin_sve_svaesimc_u8",
@@ -90,7 +91,6 @@ match name {
     "llvm.amdgcn.fdot2.bf16.bf16" => "__builtin_amdgcn_fdot2_bf16_bf16",
     "llvm.amdgcn.fdot2.f16.f16" => "__builtin_amdgcn_fdot2_f16_f16",
     "llvm.amdgcn.fdot2.f32.bf16" => "__builtin_amdgcn_fdot2_f32_bf16",
-    "llvm.amdgcn.fmed3" => "__builtin_amdgcn_fmed3",
     "llvm.amdgcn.fmul.legacy" => "__builtin_amdgcn_fmul_legacy",
     "llvm.amdgcn.groupstaticsize" => "__builtin_amdgcn_groupstaticsize",
     "llvm.amdgcn.iglp.opt" => "__builtin_amdgcn_iglp_opt",
@@ -151,6 +151,7 @@ match name {
     "llvm.amdgcn.msad.u8" => "__builtin_amdgcn_msad_u8",
     "llvm.amdgcn.perm" => "__builtin_amdgcn_perm",
     "llvm.amdgcn.permlane16" => "__builtin_amdgcn_permlane16",
+    "llvm.amdgcn.permlane64" => "__builtin_amdgcn_permlane64",
     "llvm.amdgcn.permlanex16" => "__builtin_amdgcn_permlanex16",
     "llvm.amdgcn.qsad.pk.u16.u8" => "__builtin_amdgcn_qsad_pk_u16_u8",
     "llvm.amdgcn.queue.ptr" => "__builtin_amdgcn_queue_ptr",
@@ -175,6 +176,7 @@ match name {
     "llvm.amdgcn.s.setprio" => "__builtin_amdgcn_s_setprio",
     "llvm.amdgcn.s.setreg" => "__builtin_amdgcn_s_setreg",
     "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_sleep",
+    "llvm.amdgcn.s.wait.event.export.ready" => "__builtin_amdgcn_s_wait_event_export_ready",
     "llvm.amdgcn.s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
     "llvm.amdgcn.sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
     "llvm.amdgcn.sad.u16" => "__builtin_amdgcn_sad_u16",
@@ -663,7 +665,7 @@ match name {
     "llvm.hexagon.F2.sfmpy" => "__builtin_HEXAGON_F2_sfmpy",
     "llvm.hexagon.F2.sfsub" => "__builtin_HEXAGON_F2_sfsub",
     "llvm.hexagon.L2.loadw.locked" => "__builtin_HEXAGON_L2_loadw_locked",
-    "llvm.hexagon.L4.loadd.locked" => "__builtin_HEXAGON_L4_loadd_locked",
+    "llvm.hexagon.L4.loadd.locked" => "__builtin__HEXAGON_L4_loadd_locked",
     "llvm.hexagon.M2.acci" => "__builtin_HEXAGON_M2_acci",
     "llvm.hexagon.M2.accii" => "__builtin_HEXAGON_M2_accii",
     "llvm.hexagon.M2.cmaci.s0" => "__builtin_HEXAGON_M2_cmaci_s0",
@@ -1319,6 +1321,8 @@ match name {
     "llvm.hexagon.V6.vadd.qf32.mix.128B" => "__builtin_HEXAGON_V6_vadd_qf32_mix_128B",
     "llvm.hexagon.V6.vadd.sf" => "__builtin_HEXAGON_V6_vadd_sf",
     "llvm.hexagon.V6.vadd.sf.128B" => "__builtin_HEXAGON_V6_vadd_sf_128B",
+    "llvm.hexagon.V6.vadd.sf.bf" => "__builtin_HEXAGON_V6_vadd_sf_bf",
+    "llvm.hexagon.V6.vadd.sf.bf.128B" => "__builtin_HEXAGON_V6_vadd_sf_bf_128B",
     "llvm.hexagon.V6.vadd.sf.hf" => "__builtin_HEXAGON_V6_vadd_sf_hf",
     "llvm.hexagon.V6.vadd.sf.hf.128B" => "__builtin_HEXAGON_V6_vadd_sf_hf_128B",
     "llvm.hexagon.V6.vadd.sf.sf" => "__builtin_HEXAGON_V6_vadd_sf_sf",
@@ -1509,14 +1513,24 @@ match name {
     "llvm.hexagon.V6.vcl0w.128B" => "__builtin_HEXAGON_V6_vcl0w_128B",
     "llvm.hexagon.V6.vcombine" => "__builtin_HEXAGON_V6_vcombine",
     "llvm.hexagon.V6.vcombine.128B" => "__builtin_HEXAGON_V6_vcombine_128B",
+    "llvm.hexagon.V6.vconv.h.hf" => "__builtin_HEXAGON_V6_vconv_h_hf",
+    "llvm.hexagon.V6.vconv.h.hf.128B" => "__builtin_HEXAGON_V6_vconv_h_hf_128B",
+    "llvm.hexagon.V6.vconv.hf.h" => "__builtin_HEXAGON_V6_vconv_hf_h",
+    "llvm.hexagon.V6.vconv.hf.h.128B" => "__builtin_HEXAGON_V6_vconv_hf_h_128B",
     "llvm.hexagon.V6.vconv.hf.qf16" => "__builtin_HEXAGON_V6_vconv_hf_qf16",
     "llvm.hexagon.V6.vconv.hf.qf16.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf16_128B",
     "llvm.hexagon.V6.vconv.hf.qf32" => "__builtin_HEXAGON_V6_vconv_hf_qf32",
     "llvm.hexagon.V6.vconv.hf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf32_128B",
     "llvm.hexagon.V6.vconv.sf.qf32" => "__builtin_HEXAGON_V6_vconv_sf_qf32",
     "llvm.hexagon.V6.vconv.sf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_sf_qf32_128B",
+    "llvm.hexagon.V6.vconv.sf.w" => "__builtin_HEXAGON_V6_vconv_sf_w",
+    "llvm.hexagon.V6.vconv.sf.w.128B" => "__builtin_HEXAGON_V6_vconv_sf_w_128B",
+    "llvm.hexagon.V6.vconv.w.sf" => "__builtin_HEXAGON_V6_vconv_w_sf",
+    "llvm.hexagon.V6.vconv.w.sf.128B" => "__builtin_HEXAGON_V6_vconv_w_sf_128B",
     "llvm.hexagon.V6.vcvt.b.hf" => "__builtin_HEXAGON_V6_vcvt_b_hf",
     "llvm.hexagon.V6.vcvt.b.hf.128B" => "__builtin_HEXAGON_V6_vcvt_b_hf_128B",
+    "llvm.hexagon.V6.vcvt.bf.sf" => "__builtin_HEXAGON_V6_vcvt_bf_sf",
+    "llvm.hexagon.V6.vcvt.bf.sf.128B" => "__builtin_HEXAGON_V6_vcvt_bf_sf_128B",
     "llvm.hexagon.V6.vcvt.h.hf" => "__builtin_HEXAGON_V6_vcvt_h_hf",
     "llvm.hexagon.V6.vcvt.h.hf.128B" => "__builtin_HEXAGON_V6_vcvt_h_hf_128B",
     "llvm.hexagon.V6.vcvt.hf.b" => "__builtin_HEXAGON_V6_vcvt_hf_b",
@@ -1649,6 +1663,14 @@ match name {
     "llvm.hexagon.V6.vgtb.or.128B" => "__builtin_HEXAGON_V6_vgtb_or_128B",
     "llvm.hexagon.V6.vgtb.xor" => "__builtin_HEXAGON_V6_vgtb_xor",
     "llvm.hexagon.V6.vgtb.xor.128B" => "__builtin_HEXAGON_V6_vgtb_xor_128B",
+    "llvm.hexagon.V6.vgtbf" => "__builtin_HEXAGON_V6_vgtbf",
+    "llvm.hexagon.V6.vgtbf.128B" => "__builtin_HEXAGON_V6_vgtbf_128B",
+    "llvm.hexagon.V6.vgtbf.and" => "__builtin_HEXAGON_V6_vgtbf_and",
+    "llvm.hexagon.V6.vgtbf.and.128B" => "__builtin_HEXAGON_V6_vgtbf_and_128B",
+    "llvm.hexagon.V6.vgtbf.or" => "__builtin_HEXAGON_V6_vgtbf_or",
+    "llvm.hexagon.V6.vgtbf.or.128B" => "__builtin_HEXAGON_V6_vgtbf_or_128B",
+    "llvm.hexagon.V6.vgtbf.xor" => "__builtin_HEXAGON_V6_vgtbf_xor",
+    "llvm.hexagon.V6.vgtbf.xor.128B" => "__builtin_HEXAGON_V6_vgtbf_xor_128B",
     "llvm.hexagon.V6.vgth" => "__builtin_HEXAGON_V6_vgth",
     "llvm.hexagon.V6.vgth.128B" => "__builtin_HEXAGON_V6_vgth_128B",
     "llvm.hexagon.V6.vgth.and" => "__builtin_HEXAGON_V6_vgth_and",
@@ -1751,6 +1773,8 @@ match name {
     "llvm.hexagon.V6.vlutvwh.oracci.128B" => "__builtin_HEXAGON_V6_vlutvwh_oracci_128B",
     "llvm.hexagon.V6.vlutvwhi" => "__builtin_HEXAGON_V6_vlutvwhi",
     "llvm.hexagon.V6.vlutvwhi.128B" => "__builtin_HEXAGON_V6_vlutvwhi_128B",
+    "llvm.hexagon.V6.vmax.bf" => "__builtin_HEXAGON_V6_vmax_bf",
+    "llvm.hexagon.V6.vmax.bf.128B" => "__builtin_HEXAGON_V6_vmax_bf_128B",
     "llvm.hexagon.V6.vmax.hf" => "__builtin_HEXAGON_V6_vmax_hf",
     "llvm.hexagon.V6.vmax.hf.128B" => "__builtin_HEXAGON_V6_vmax_hf_128B",
     "llvm.hexagon.V6.vmax.sf" => "__builtin_HEXAGON_V6_vmax_sf",
@@ -1765,6 +1789,8 @@ match name {
     "llvm.hexagon.V6.vmaxuh.128B" => "__builtin_HEXAGON_V6_vmaxuh_128B",
     "llvm.hexagon.V6.vmaxw" => "__builtin_HEXAGON_V6_vmaxw",
     "llvm.hexagon.V6.vmaxw.128B" => "__builtin_HEXAGON_V6_vmaxw_128B",
+    "llvm.hexagon.V6.vmin.bf" => "__builtin_HEXAGON_V6_vmin_bf",
+    "llvm.hexagon.V6.vmin.bf.128B" => "__builtin_HEXAGON_V6_vmin_bf_128B",
     "llvm.hexagon.V6.vmin.hf" => "__builtin_HEXAGON_V6_vmin_hf",
     "llvm.hexagon.V6.vmin.hf.128B" => "__builtin_HEXAGON_V6_vmin_hf_128B",
     "llvm.hexagon.V6.vmin.sf" => "__builtin_HEXAGON_V6_vmin_sf",
@@ -1825,6 +1851,10 @@ match name {
     "llvm.hexagon.V6.vmpy.qf32.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_qf16_128B",
     "llvm.hexagon.V6.vmpy.qf32.sf" => "__builtin_HEXAGON_V6_vmpy_qf32_sf",
     "llvm.hexagon.V6.vmpy.qf32.sf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_sf_128B",
+    "llvm.hexagon.V6.vmpy.sf.bf" => "__builtin_HEXAGON_V6_vmpy_sf_bf",
+    "llvm.hexagon.V6.vmpy.sf.bf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_bf_128B",
+    "llvm.hexagon.V6.vmpy.sf.bf.acc" => "__builtin_HEXAGON_V6_vmpy_sf_bf_acc",
+    "llvm.hexagon.V6.vmpy.sf.bf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_sf_bf_acc_128B",
     "llvm.hexagon.V6.vmpy.sf.hf" => "__builtin_HEXAGON_V6_vmpy_sf_hf",
     "llvm.hexagon.V6.vmpy.sf.hf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_hf_128B",
     "llvm.hexagon.V6.vmpy.sf.hf.acc" => "__builtin_HEXAGON_V6_vmpy_sf_hf_acc",
@@ -2091,6 +2121,8 @@ match name {
     "llvm.hexagon.V6.vsub.qf32.mix.128B" => "__builtin_HEXAGON_V6_vsub_qf32_mix_128B",
     "llvm.hexagon.V6.vsub.sf" => "__builtin_HEXAGON_V6_vsub_sf",
     "llvm.hexagon.V6.vsub.sf.128B" => "__builtin_HEXAGON_V6_vsub_sf_128B",
+    "llvm.hexagon.V6.vsub.sf.bf" => "__builtin_HEXAGON_V6_vsub_sf_bf",
+    "llvm.hexagon.V6.vsub.sf.bf.128B" => "__builtin_HEXAGON_V6_vsub_sf_bf_128B",
     "llvm.hexagon.V6.vsub.sf.hf" => "__builtin_HEXAGON_V6_vsub_sf_hf",
     "llvm.hexagon.V6.vsub.sf.hf.128B" => "__builtin_HEXAGON_V6_vsub_sf_hf_128B",
     "llvm.hexagon.V6.vsub.sf.sf" => "__builtin_HEXAGON_V6_vsub_sf_sf",
@@ -5674,6 +5706,10 @@ match name {
     "llvm.x86.3dnowa.pfnacc" => "__builtin_ia32_pfnacc",
     "llvm.x86.3dnowa.pfpnacc" => "__builtin_ia32_pfpnacc",
     "llvm.x86.3dnowa.pi2fw" => "__builtin_ia32_pi2fw",
+    "llvm.x86.aadd32" => "__builtin_ia32_aadd32",
+    "llvm.x86.aadd64" => "__builtin_ia32_aadd64",
+    "llvm.x86.aand32" => "__builtin_ia32_aand32",
+    "llvm.x86.aand64" => "__builtin_ia32_aand64",
     "llvm.x86.addcarry.u32" => "__builtin_ia32_addcarry_u32",
     "llvm.x86.addcarry.u64" => "__builtin_ia32_addcarry_u64",
     "llvm.x86.addcarryx.u32" => "__builtin_ia32_addcarryx_u32",
@@ -5692,6 +5728,8 @@ match name {
     "llvm.x86.aesni.aesenclast.512" => "__builtin_ia32_aesenclast512",
     "llvm.x86.aesni.aesimc" => "__builtin_ia32_aesimc128",
     "llvm.x86.aesni.aeskeygenassist" => "__builtin_ia32_aeskeygenassist128",
+    "llvm.x86.aor32" => "__builtin_ia32_aor32",
+    "llvm.x86.aor64" => "__builtin_ia32_aor64",
     "llvm.x86.avx.addsub.pd.256" => "__builtin_ia32_addsubpd256",
     "llvm.x86.avx.addsub.ps.256" => "__builtin_ia32_addsubps256",
     "llvm.x86.avx.blend.pd.256" => "__builtin_ia32_blendpd256",
@@ -5904,6 +5942,18 @@ match name {
     "llvm.x86.avx2.vbroadcast.ss.ps.256" => "__builtin_ia32_vbroadcastss_ps256",
     "llvm.x86.avx2.vextracti128" => "__builtin_ia32_extract128i256",
     "llvm.x86.avx2.vinserti128" => "__builtin_ia32_insert128i256",
+    "llvm.x86.avx2.vpdpbssd.128" => "__builtin_ia32_vpdpbssd128",
+    "llvm.x86.avx2.vpdpbssd.256" => "__builtin_ia32_vpdpbssd256",
+    "llvm.x86.avx2.vpdpbssds.128" => "__builtin_ia32_vpdpbssds128",
+    "llvm.x86.avx2.vpdpbssds.256" => "__builtin_ia32_vpdpbssds256",
+    "llvm.x86.avx2.vpdpbsud.128" => "__builtin_ia32_vpdpbsud128",
+    "llvm.x86.avx2.vpdpbsud.256" => "__builtin_ia32_vpdpbsud256",
+    "llvm.x86.avx2.vpdpbsuds.128" => "__builtin_ia32_vpdpbsuds128",
+    "llvm.x86.avx2.vpdpbsuds.256" => "__builtin_ia32_vpdpbsuds256",
+    "llvm.x86.avx2.vpdpbuud.128" => "__builtin_ia32_vpdpbuud128",
+    "llvm.x86.avx2.vpdpbuud.256" => "__builtin_ia32_vpdpbuud256",
+    "llvm.x86.avx2.vpdpbuuds.128" => "__builtin_ia32_vpdpbuuds128",
+    "llvm.x86.avx2.vpdpbuuds.256" => "__builtin_ia32_vpdpbuuds256",
     "llvm.x86.avx2.vperm2i128" => "__builtin_ia32_permti256",
     "llvm.x86.avx512.add.pd.512" => "__builtin_ia32_addpd512",
     "llvm.x86.avx512.add.ps.512" => "__builtin_ia32_addps512",
@@ -7406,6 +7456,8 @@ match name {
     "llvm.x86.avx512fp16.vcvtusi642sh" => "__builtin_ia32_vcvtusi642sh",
     "llvm.x86.avx512fp16.vfmaddsub.ph.128" => "__builtin_ia32_vfmaddsubph",
     "llvm.x86.avx512fp16.vfmaddsub.ph.256" => "__builtin_ia32_vfmaddsubph256",
+    "llvm.x86.axor32" => "__builtin_ia32_axor32",
+    "llvm.x86.axor64" => "__builtin_ia32_axor64",
     "llvm.x86.bmi.bextr.32" => "__builtin_ia32_bextr_u32",
     "llvm.x86.bmi.bextr.64" => "__builtin_ia32_bextr_u64",
     "llvm.x86.bmi.bzhi.32" => "__builtin_ia32_bzhi_si",
@@ -7420,6 +7472,8 @@ match name {
     "llvm.x86.clui" => "__builtin_ia32_clui",
     "llvm.x86.clwb" => "__builtin_ia32_clwb",
     "llvm.x86.clzero" => "__builtin_ia32_clzero",
+    "llvm.x86.cmpccxadd32" => "__builtin_ia32_cmpccxadd32",
+    "llvm.x86.cmpccxadd64" => "__builtin_ia32_cmpccxadd64",
     "llvm.x86.directstore32" => "__builtin_ia32_directstore_u32",
     "llvm.x86.directstore64" => "__builtin_ia32_directstore_u64",
     "llvm.x86.enqcmd" => "__builtin_ia32_enqcmd",
@@ -7851,6 +7905,8 @@ match name {
     "llvm.x86.tdpbusd.internal" => "__builtin_ia32_tdpbusd_internal",
     "llvm.x86.tdpbuud" => "__builtin_ia32_tdpbuud",
     "llvm.x86.tdpbuud.internal" => "__builtin_ia32_tdpbuud_internal",
+    "llvm.x86.tdpfp16ps" => "__builtin_ia32_tdpfp16ps",
+    "llvm.x86.tdpfp16ps.internal" => "__builtin_ia32_tdpfp16ps_internal",
     "llvm.x86.testui" => "__builtin_ia32_testui",
     "llvm.x86.tileloadd64" => "__builtin_ia32_tileloadd64",
     "llvm.x86.tileloadd64.internal" => "__builtin_ia32_tileloadd64_internal",
@@ -7864,6 +7920,20 @@ match name {
     "llvm.x86.tpause" => "__builtin_ia32_tpause",
     "llvm.x86.umonitor" => "__builtin_ia32_umonitor",
     "llvm.x86.umwait" => "__builtin_ia32_umwait",
+    "llvm.x86.vbcstnebf162ps128" => "__builtin_ia32_vbcstnebf162ps128",
+    "llvm.x86.vbcstnebf162ps256" => "__builtin_ia32_vbcstnebf162ps256",
+    "llvm.x86.vbcstnesh2ps128" => "__builtin_ia32_vbcstnesh2ps128",
+    "llvm.x86.vbcstnesh2ps256" => "__builtin_ia32_vbcstnesh2ps256",
+    "llvm.x86.vcvtneebf162ps128" => "__builtin_ia32_vcvtneebf162ps128",
+    "llvm.x86.vcvtneebf162ps256" => "__builtin_ia32_vcvtneebf162ps256",
+    "llvm.x86.vcvtneeph2ps128" => "__builtin_ia32_vcvtneeph2ps128",
+    "llvm.x86.vcvtneeph2ps256" => "__builtin_ia32_vcvtneeph2ps256",
+    "llvm.x86.vcvtneobf162ps128" => "__builtin_ia32_vcvtneobf162ps128",
+    "llvm.x86.vcvtneobf162ps256" => "__builtin_ia32_vcvtneobf162ps256",
+    "llvm.x86.vcvtneoph2ps128" => "__builtin_ia32_vcvtneoph2ps128",
+    "llvm.x86.vcvtneoph2ps256" => "__builtin_ia32_vcvtneoph2ps256",
+    "llvm.x86.vcvtneps2bf16128" => "__builtin_ia32_vcvtneps2bf16128",
+    "llvm.x86.vcvtneps2bf16256" => "__builtin_ia32_vcvtneps2bf16256",
     "llvm.x86.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps",
     "llvm.x86.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256",
     "llvm.x86.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph",

From a2f499f05f431d1aaeea605c396e55adb238d799 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 4 Mar 2023 14:26:00 -0500
Subject: [PATCH 302/997] Fix tests

---
 Cargo.lock                                    |  4 +-
 locales/en-US.ftl                             |  3 ++
 ...022-core-Disable-not-compiling-tests.patch | 47 ++++++-------------
 rust-toolchain                                |  2 +-
 src/builder.rs                                |  6 +--
 src/common.rs                                 |  2 +-
 src/consts.rs                                 | 18 ++++++-
 src/errors.rs                                 |  6 +++
 src/type_.rs                                  | 16 ++-----
 src/type_of.rs                                |  8 +++-
 test.sh                                       |  3 ++
 11 files changed, 59 insertions(+), 56 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index b2013db3e3b3..ac0fc0eeb7e9 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -35,7 +35,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#1bd270d0d130fe31807cfbe509ca095c082e5848"
+source = "git+https://github.com/antoyo/gccjit.rs#eefb8c662d61477f34b7c32d26bcda5f1ef08432"
 dependencies = [
  "gccjit_sys",
 ]
@@ -43,7 +43,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#1bd270d0d130fe31807cfbe509ca095c082e5848"
+source = "git+https://github.com/antoyo/gccjit.rs#eefb8c662d61477f34b7c32d26bcda5f1ef08432"
 dependencies = [
  "libc 0.1.12",
 ]
diff --git a/locales/en-US.ftl b/locales/en-US.ftl
index 6101b28ab0cd..2181d49eeef6 100644
--- a/locales/en-US.ftl
+++ b/locales/en-US.ftl
@@ -60,3 +60,6 @@ codegen_gcc_invalid_monomorphization_unsupported_cast =
 
 codegen_gcc_invalid_monomorphization_unsupported_operation =
     invalid monomorphization of `{$name}` intrinsic: unsupported operation on `{$in_ty}` with element `{$in_elem}`
+
+codegen_gcc_invalid_minimum_alignment =
+    invalid minimum global alignment: {$err}
diff --git a/patches/0022-core-Disable-not-compiling-tests.patch b/patches/0022-core-Disable-not-compiling-tests.patch
index 301b3f9bde4d..4db56fa3bd2c 100644
--- a/patches/0022-core-Disable-not-compiling-tests.patch
+++ b/patches/0022-core-Disable-not-compiling-tests.patch
@@ -18,7 +18,7 @@ new file mode 100644
 index 0000000..46fd999
 --- /dev/null
 +++ b/library/core/tests/Cargo.toml
-@@ -0,0 +1,8 @@
+@@ -0,0 +1,12 @@
 +[package]
 +name = "core"
 +version = "0.0.0"
@@ -27,37 +27,18 @@ index 0000000..46fd999
 +[lib]
 +name = "coretests"
 +path = "lib.rs"
-diff --git a/library/core/tests/num/flt2dec/mod.rs b/library/core/tests/num/flt2dec/mod.rs
-index a35897e..f0bf645 100644
---- a/library/core/tests/num/flt2dec/mod.rs
-+++ b/library/core/tests/num/flt2dec/mod.rs
-@@ -13,7 +13,6 @@ mod strategy {
-     mod dragon;
-     mod grisu;
- }
--mod random;
- 
- pub fn decode_finite<T: DecodableFloat>(v: T) -> Decoded {
-     match decode(v).1 {
-diff --git a/library/core/tests/slice.rs b/library/core/tests/slice.rs
-index 6609bc3..241b497 100644
---- a/library/core/tests/slice.rs
-+++ b/library/core/tests/slice.rs
-@@ -1209,6 +1209,7 @@ fn brute_force_rotate_test_1() {
-     }
- }
- 
-+/*
- #[test]
- #[cfg(not(target_arch = "wasm32"))]
- fn sort_unstable() {
-@@ -1394,6 +1395,7 @@ fn partition_at_index() {
-     v.select_nth_unstable(0);
-     assert!(v == [0xDEADBEEF]);
- }
-+*/
- 
- #[test]
- #[should_panic(expected = "index 0 greater than length of slice")]
++
++[dependencies]
++rand = { version = "0.8.5", default-features = false }
++rand_xorshift = { version = "0.3.0", default-features = false }
+diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
+index 42a26ae..5ac1042 100644
+--- a/library/core/tests/lib.rs
++++ b/library/core/tests/lib.rs
+@@ -1,3 +1,4 @@
++#![cfg(test)]
+ #![feature(alloc_layout_extra)]
+ #![feature(array_chunks)]
+ #![feature(array_methods)]
 --
 2.21.0 (Apple Git-122)
diff --git a/rust-toolchain b/rust-toolchain
index a6d506185dc6..933ecd45baad 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2023-02-28"
+channel = "nightly-2023-03-02"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
diff --git a/src/builder.rs b/src/builder.rs
index 913f5734ff0d..8f0208f6848e 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1228,12 +1228,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     #[cfg(feature="master")]
     fn resume(&mut self, exn0: RValue<'gcc>, _exn1: RValue<'gcc>) {
-        // TODO(antoyo): check if this is normal that we need to dereference the value.
-        // NOTE: the type is wrong, so in order to get a pointer for parameter, cast it to a
-        // pointer of pointer that is later dereferenced.
-        let exn_type = exn0.get_type().make_pointer();
+        let exn_type = exn0.get_type();
         let exn = self.context.new_cast(None, exn0, exn_type);
-        let exn = exn.dereference(None).to_rvalue();
         let unwind_resume = self.context.get_target_builtin_function("__builtin_unwind_resume");
         self.llbb().add_eval(None, self.context.new_call(None, unwind_resume, &[exn]));
         self.unreachable();
diff --git a/src/common.rs b/src/common.rs
index 617c7e8640a9..76fc7bd222e1 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -36,7 +36,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 pub fn bytes_in_context<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, bytes: &[u8]) -> RValue<'gcc> {
     let context = &cx.context;
     let byte_type = context.new_type::<u8>();
-    let typ = context.new_array_type(None, byte_type, bytes.len() as i32);
+    let typ = context.new_array_type(None, byte_type, bytes.len() as u64);
     let elements: Vec<_> =
         bytes.iter()
         .map(|&byte| context.new_rvalue_from_int(byte_type, byte as i32))
diff --git a/src/consts.rs b/src/consts.rs
index 86a7f78de270..792ab8f890d8 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -13,6 +13,7 @@ use rustc_target::abi::{self, Align, HasDataLayout, Primitive, Size, WrappingRan
 
 use crate::base;
 use crate::context::CodegenCx;
+use crate::errors::InvalidMinimumAlignment;
 use crate::type_of::LayoutGccExt;
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
@@ -30,6 +31,21 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 }
 
+fn set_global_alignment<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, gv: LValue<'gcc>, mut align: Align) {
+    // The target may require greater alignment for globals than the type does.
+    // Note: GCC and Clang also allow `__attribute__((aligned))` on variables,
+    // which can force it to be smaller. Rust doesn't support this yet.
+    if let Some(min) = cx.sess().target.min_global_align {
+        match Align::from_bits(min) {
+            Ok(min) => align = align.max(min),
+            Err(err) => {
+                cx.sess().emit_err(InvalidMinimumAlignment { err });
+            }
+        }
+    }
+    gv.set_alignment(align.bytes() as i32);
+}
+
 impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
     fn static_addr_of(&self, cv: RValue<'gcc>, align: Align, kind: Option<&str>) -> RValue<'gcc> {
         // TODO(antoyo): implement a proper rvalue comparison in libgccjit instead of doing the
@@ -81,7 +97,7 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
         let ty = instance.ty(self.tcx, ty::ParamEnv::reveal_all());
         let gcc_type = self.layout_of(ty).gcc_type(self);
 
-        // TODO(antoyo): set alignment.
+        set_global_alignment(self, global, self.align_of(ty));
 
         let value = self.bitcast_if_needed(value, gcc_type);
         global.global_set_initializer_rvalue(value);
diff --git a/src/errors.rs b/src/errors.rs
index d0ba7e247911..5ea39606c086 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -221,3 +221,9 @@ pub(crate) struct UnwindingInlineAsm {
     #[primary_span]
     pub span: Span,
 }
+
+#[derive(Diagnostic)]
+#[diag(codegen_gcc_invalid_minimum_alignment)]
+pub(crate) struct InvalidMinimumAlignment {
+    pub err: String,
+}
diff --git a/src/type_.rs b/src/type_.rs
index 929499666173..daa661f35c4c 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -1,5 +1,3 @@
-use std::convert::TryInto;
-
 use gccjit::{RValue, Struct, Type};
 use rustc_codegen_ssa::traits::{BaseTypeMethods, DerivedTypeMethods, TypeMembershipMethods};
 use rustc_codegen_ssa::common::TypeKind;
@@ -202,8 +200,9 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         value.get_type()
     }
 
-    fn type_array(&self, ty: Type<'gcc>, mut len: u64) -> Type<'gcc> {
-        if let Some(struct_type) = ty.is_struct() {
+    fn type_array(&self, ty: Type<'gcc>, len: u64) -> Type<'gcc> {
+        // TODO: remove this as well?
+        /*if let Some(struct_type) = ty.is_struct() {
             if struct_type.get_field_count() == 0 {
                 // NOTE: since gccjit only supports i32 for the array size and libcore's tests uses a
                 // size of usize::MAX in test_binary_search, we workaround this by setting the size to
@@ -211,14 +210,7 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 // FIXME(antoyo): fix gccjit API.
                 len = 0;
             }
-        }
-
-        // NOTE: see note above. Some other test uses usize::MAX.
-        if len == u64::MAX {
-            len = 0;
-        }
-
-        let len: i32 = len.try_into().expect("array len");
+        }*/
 
         self.context.new_array_type(None, ty, len)
     }
diff --git a/src/type_of.rs b/src/type_of.rs
index 1a4fae666f22..5df8c1a209db 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -6,7 +6,7 @@ use rustc_middle::bug;
 use rustc_middle::ty::{self, Ty, TypeVisitableExt};
 use rustc_middle::ty::layout::{FnAbiOf, LayoutOf, TyAndLayout};
 use rustc_middle::ty::print::with_no_trimmed_paths;
-use rustc_target::abi::{self, Abi, F32, F64, FieldsShape, Int, Integer, Pointer, PointeeInfo, Size, TyAbiInterface, Variants};
+use rustc_target::abi::{self, Abi, Align, F32, F64, FieldsShape, Int, Integer, Pointer, PointeeInfo, Size, TyAbiInterface, Variants};
 use rustc_target::abi::call::{CastTarget, FnAbi, Reg};
 
 use crate::abi::{FnAbiGccExt, GccType};
@@ -50,6 +50,12 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 }
 
+impl<'a, 'tcx> CodegenCx<'a, 'tcx> {
+    pub fn align_of(&self, ty: Ty<'tcx>) -> Align {
+        self.layout_of(ty).align.abi
+    }
+}
+
 fn uncached_gcc_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout<'tcx>, defer: &mut Option<(Struct<'gcc>, TyAndLayout<'tcx>)>) -> Type<'gcc> {
     match layout.abi {
         Abi::Scalar(_) => bug!("handled elsewhere"),
diff --git a/test.sh b/test.sh
index 97d5a8b006df..6139892aefca 100755
--- a/test.sh
+++ b/test.sh
@@ -225,6 +225,9 @@ rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
 
 [target.x86_64-unknown-linux-gnu]
 llvm-filecheck = "`which FileCheck-10 || which FileCheck-11 || which FileCheck-12 || which FileCheck-13 || which FileCheck-14`"
+
+[llvm]
+download-ci-llvm = false
 EOF
 
     rustc -V | cut -d' ' -f3 | tr -d '('

From 901e413a3f34379f0f7eab1c7178b303e1f499fb Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 4 Mar 2023 14:42:34 -0500
Subject: [PATCH 303/997] Fix tests

---
 tests/run/abort1.rs       | 1 +
 tests/run/abort2.rs       | 1 +
 tests/run/array.rs        | 1 +
 tests/run/assign.rs       | 1 +
 tests/run/closure.rs      | 8 ++++++--
 tests/run/condition.rs    | 1 +
 tests/run/fun_ptr.rs      | 1 +
 tests/run/int_overflow.rs | 1 +
 tests/run/mut_ref.rs      | 1 +
 tests/run/operations.rs   | 1 +
 tests/run/ptr_cast.rs     | 1 +
 tests/run/slice.rs        | 1 +
 tests/run/static.rs       | 1 +
 13 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/tests/run/abort1.rs b/tests/run/abort1.rs
index 291af5993aa2..25041d93e748 100644
--- a/tests/run/abort1.rs
+++ b/tests/run/abort1.rs
@@ -33,6 +33,7 @@ mod intrinsics {
     use super::Sized;
 
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }
diff --git a/tests/run/abort2.rs b/tests/run/abort2.rs
index 3c87c567892b..e7443c8dbe5b 100644
--- a/tests/run/abort2.rs
+++ b/tests/run/abort2.rs
@@ -33,6 +33,7 @@ mod intrinsics {
     use super::Sized;
 
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }
diff --git a/tests/run/array.rs b/tests/run/array.rs
index c53d98340f04..49b28d98f2fe 100644
--- a/tests/run/array.rs
+++ b/tests/run/array.rs
@@ -105,6 +105,7 @@ fn panic_bounds_check(index: usize, len: usize) -> ! {
 
 mod intrinsics {
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }
diff --git a/tests/run/assign.rs b/tests/run/assign.rs
index b95a7b714153..427c1a250339 100644
--- a/tests/run/assign.rs
+++ b/tests/run/assign.rs
@@ -57,6 +57,7 @@ mod libc {
 
 mod intrinsics {
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }
diff --git a/tests/run/closure.rs b/tests/run/closure.rs
index 4d01d879dc1d..8daa681abf7d 100644
--- a/tests/run/closure.rs
+++ b/tests/run/closure.rs
@@ -97,10 +97,14 @@ fn panic_bounds_check(index: usize, len: usize) -> ! {
 
 mod intrinsics {
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }
 
+#[lang = "tuple_trait"]
+pub trait Tuple {}
+
 #[lang = "unsize"]
 pub trait Unsize<T: ?Sized> {}
 
@@ -114,7 +118,7 @@ impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<*mut U> for *mut T {}
 
 #[lang = "fn_once"]
 #[rustc_paren_sugar]
-pub trait FnOnce<Args> {
+pub trait FnOnce<Args: Tuple> {
     #[lang = "fn_once_output"]
     type Output;
 
@@ -123,7 +127,7 @@ pub trait FnOnce<Args> {
 
 #[lang = "fn_mut"]
 #[rustc_paren_sugar]
-pub trait FnMut<Args>: FnOnce<Args> {
+pub trait FnMut<Args: Tuple>: FnOnce<Args> {
     extern "rust-call" fn call_mut(&mut self, args: Args) -> Self::Output;
 }
 
diff --git a/tests/run/condition.rs b/tests/run/condition.rs
index 38b3084cb6c7..b7a13081deae 100644
--- a/tests/run/condition.rs
+++ b/tests/run/condition.rs
@@ -108,6 +108,7 @@ fn panic_bounds_check(index: usize, len: usize) -> ! {
 
 mod intrinsics {
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }
diff --git a/tests/run/fun_ptr.rs b/tests/run/fun_ptr.rs
index 995fc5ca5d23..8a196f774c82 100644
--- a/tests/run/fun_ptr.rs
+++ b/tests/run/fun_ptr.rs
@@ -102,6 +102,7 @@ fn panic_bounds_check(index: usize, len: usize) -> ! {
 
 mod intrinsics {
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }
diff --git a/tests/run/int_overflow.rs b/tests/run/int_overflow.rs
index 4ca623625395..c3fcb3c0a2a0 100644
--- a/tests/run/int_overflow.rs
+++ b/tests/run/int_overflow.rs
@@ -55,6 +55,7 @@ mod libc {
 
 mod intrinsics {
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }
diff --git a/tests/run/mut_ref.rs b/tests/run/mut_ref.rs
index 814bb1a612e4..2a2ea8b8bf0a 100644
--- a/tests/run/mut_ref.rs
+++ b/tests/run/mut_ref.rs
@@ -59,6 +59,7 @@ mod libc {
 
 mod intrinsics {
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }
diff --git a/tests/run/operations.rs b/tests/run/operations.rs
index affe12067ffe..67b9f241dbbb 100644
--- a/tests/run/operations.rs
+++ b/tests/run/operations.rs
@@ -65,6 +65,7 @@ mod libc {
 
 mod intrinsics {
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }
diff --git a/tests/run/ptr_cast.rs b/tests/run/ptr_cast.rs
index 08481739a7f9..da8a8295d564 100644
--- a/tests/run/ptr_cast.rs
+++ b/tests/run/ptr_cast.rs
@@ -102,6 +102,7 @@ fn panic_bounds_check(index: usize, len: usize) -> ! {
 
 mod intrinsics {
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }
diff --git a/tests/run/slice.rs b/tests/run/slice.rs
index ad9258ed0bde..96f1c4792e58 100644
--- a/tests/run/slice.rs
+++ b/tests/run/slice.rs
@@ -102,6 +102,7 @@ mod intrinsics {
     use super::Sized;
 
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }
diff --git a/tests/run/static.rs b/tests/run/static.rs
index 294add968449..19201f1df266 100644
--- a/tests/run/static.rs
+++ b/tests/run/static.rs
@@ -45,6 +45,7 @@ mod intrinsics {
     use super::Sized;
 
     extern "rust-intrinsic" {
+        #[rustc_safe_intrinsic]
         pub fn abort() -> !;
     }
 }

From 6958188e101068fc825428c00ebe236db099d3d7 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 4 Mar 2023 15:02:49 -0500
Subject: [PATCH 304/997] Temporarily disable rust repo cache

---
 .github/workflows/ci.yml | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 927eb3077616..d2b7724a2215 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -108,14 +108,14 @@ jobs:
         path: target
         key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
 
-    - name: Cache rust repository
-      # We only clone the rust repository for rustc tests
-      if: ${{ contains(matrix.commands, 'rustc') }}
-      uses: actions/cache@v3
-      id: cache-rust-repository
-      with:
-        path: rust
-        key: ${{ runner.os }}-packages-${{ hashFiles('rust/.git/HEAD') }}
+    #- name: Cache rust repository
+      ## We only clone the rust repository for rustc tests
+      #if: ${{ contains(matrix.commands, 'rustc') }}
+      #uses: actions/cache@v3
+      #id: cache-rust-repository
+      #with:
+        #path: rust
+        #key: ${{ runner.os }}-packages-${{ hashFiles('rust/.git/HEAD') }}
 
     - name: Build
       run: |

From 08c75aee1b216bd1a4c07e1776fbced45a5e0ba0 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 4 Mar 2023 15:03:05 -0500
Subject: [PATCH 305/997] Fix error in libgccjit12 code path

---
 src/builder.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/builder.rs b/src/builder.rs
index 8f0208f6848e..a3c8142bea2d 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1108,7 +1108,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let vector_type = vec.get_type().unqualified().dyncast_vector().expect("Called extract_element on a non-vector type");
         let element_type = vector_type.get_element_type();
         let vec_num_units = vector_type.get_num_units();
-        let array_type = self.context.new_array_type(None, element_type, vec_num_units as i32);
+        let array_type = self.context.new_array_type(None, element_type, vec_num_units as u64);
         let array = self.context.new_bitcast(None, vec, array_type).to_rvalue();
         self.context.new_array_access(None, array, idx).to_rvalue()
     }

From 5c35dc067dd09327f129906a41fb524b6e8acead Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 4 Mar 2023 15:04:55 -0500
Subject: [PATCH 306/997] Fix warnings

---
 src/intrinsic/simd.rs | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index fca59d50974f..b59c3a64f572 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -1,10 +1,13 @@
-#[cfg_attr(not(feature="master"), allow(unused_imports))]
-use gccjit::{ToRValue, ComparisonOp, UnaryOp};
+#[cfg(feature="master")]
+use gccjit::{ComparisonOp, UnaryOp};
+use gccjit::ToRValue;
 use gccjit::{BinaryOp, RValue, Type};
 
 use rustc_codegen_ssa::base::compare_simd_types;
 use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
-use rustc_codegen_ssa::errors::{ExpectedPointerMutability, InvalidMonomorphization};
+#[cfg(feature="master")]
+use rustc_codegen_ssa::errors::ExpectedPointerMutability;
+use rustc_codegen_ssa::errors::InvalidMonomorphization;
 use rustc_codegen_ssa::mir::operand::OperandRef;
 use rustc_codegen_ssa::mir::place::PlaceRef;
 use rustc_codegen_ssa::traits::{BaseTypeMethods, BuilderMethods};
@@ -18,9 +21,11 @@ use rustc_target::abi::Align;
 use crate::builder::Builder;
 #[cfg(feature="master")]
 use crate::context::CodegenCx;
+#[cfg(feature="master")]
+use crate::errors::{InvalidMonomorphizationExpectedSignedUnsigned, InvalidMonomorphizationInsertedType};
 use crate::errors::{
-    InvalidMonomorphizationExpectedSignedUnsigned, InvalidMonomorphizationExpectedSimd,
-    InvalidMonomorphizationInsertedType, InvalidMonomorphizationInvalidBitmask,
+    InvalidMonomorphizationExpectedSimd,
+    InvalidMonomorphizationInvalidBitmask,
     InvalidMonomorphizationInvalidFloatVector, InvalidMonomorphizationMaskType,
     InvalidMonomorphizationMismatchedLengths, InvalidMonomorphizationNotFloat,
     InvalidMonomorphizationReturnElement, InvalidMonomorphizationReturnIntegerType,

From 9d5bc7c929c82e34300850537aa2840097f78d47 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 4 Mar 2023 15:25:34 -0500
Subject: [PATCH 307/997] Fix tests

---
 failing-ui-tests.txt   | 132 ++++++++++++++++++++++-------------------
 failing-ui-tests12.txt |  82 ++++++++++++-------------
 src/intrinsic/llvm.rs  |   2 +-
 3 files changed, 114 insertions(+), 102 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index f43116544ed2..b82e6e157e58 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -1,60 +1,72 @@
-src/test/ui/alloc-error/default-alloc-error-hook.rs
-src/test/ui/allocator/custom-in-block.rs
-src/test/ui/allocator/custom-in-submodule.rs
-src/test/ui/allocator/custom.rs
-src/test/ui/allocator/hygiene.rs
-src/test/ui/allocator/no_std-alloc-error-handler-custom.rs
-src/test/ui/allocator/no_std-alloc-error-handler-default.rs
-src/test/ui/allocator/xcrate-use.rs
-src/test/ui/allocator/xcrate-use2.rs
-src/test/ui/asm/may_unwind.rs
-src/test/ui/asm/x86_64/multiple-clobber-abi.rs
-src/test/ui/debuginfo/debuginfo-emit-llvm-ir-and-split-debuginfo.rs
-src/test/ui/functions-closures/parallel-codegen-closures.rs
-src/test/ui/linkage-attr/linkage1.rs
-src/test/ui/lto/dylib-works.rs
-src/test/ui/numbers-arithmetic/saturating-float-casts.rs
-src/test/ui/polymorphization/promoted-function.rs
-src/test/ui/process/nofile-limit.rs
-src/test/ui/sepcomp/sepcomp-cci.rs
-src/test/ui/sepcomp/sepcomp-extern.rs
-src/test/ui/sepcomp/sepcomp-fns-backwards.rs
-src/test/ui/sepcomp/sepcomp-fns.rs
-src/test/ui/sepcomp/sepcomp-statics.rs
-src/test/ui/simd/intrinsic/generic-arithmetic-pass.rs
-src/test/ui/sse2.rs
-src/test/ui/target-feature/missing-plusminus.rs
-src/test/ui/asm/x86_64/may_unwind.rs
-src/test/ui/backtrace.rs
-src/test/ui/catch-unwind-bang.rs
-src/test/ui/cfg/cfg-panic-abort.rs
-src/test/ui/drop/dynamic-drop-async.rs
-src/test/ui/drop/repeat-drop.rs
-src/test/ui/fmt/format-args-capture.rs
-src/test/ui/generator/panic-drops-resume.rs
-src/test/ui/generator/panic-drops.rs
-src/test/ui/generator/panic-safe.rs
-src/test/ui/intrinsics/panic-uninitialized-zeroed.rs
-src/test/ui/iterators/iter-sum-overflow-debug.rs
-src/test/ui/iterators/iter-sum-overflow-overflow-checks.rs
-src/test/ui/mir/mir_calls_to_shims.rs
-src/test/ui/mir/mir_drop_order.rs
-src/test/ui/mir/mir_let_chains_drop_order.rs
-src/test/ui/oom_unwind.rs
-src/test/ui/panic-runtime/abort-link-to-unwinding-crates.rs
-src/test/ui/panic-runtime/abort.rs
-src/test/ui/panic-runtime/link-to-abort.rs
-src/test/ui/unwind-no-uwtable.rs
-src/test/ui/issues/issue-14875.rs
-src/test/ui/issues/issue-29948.rs
-src/test/ui/issues/issue-40883.rs
-src/test/ui/issues/issue-43853.rs
-src/test/ui/issues/issue-47364.rs
-src/test/ui/simd/issue-17170.rs
-src/test/ui/simd/issue-39720.rs
-src/test/ui/simd/issue-89193.rs
-src/test/ui/statics/issue-91050-1.rs
-src/test/ui/statics/issue-91050-2.rs
-src/test/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
-src/test/ui/rfc-2091-track-caller/std-panic-locations.rs
-src/test/ui/rfcs/rfc1857-drop-order.rs
+tests/ui/alloc-error/default-alloc-error-hook.rs
+tests/ui/allocator/custom-in-block.rs
+tests/ui/allocator/custom-in-submodule.rs
+tests/ui/allocator/custom.rs
+tests/ui/allocator/hygiene.rs
+tests/ui/allocator/no_std-alloc-error-handler-custom.rs
+tests/ui/allocator/no_std-alloc-error-handler-default.rs
+tests/ui/allocator/xcrate-use.rs
+tests/ui/allocator/xcrate-use2.rs
+tests/ui/asm/may_unwind.rs
+tests/ui/asm/x86_64/multiple-clobber-abi.rs
+tests/ui/debuginfo/debuginfo-emit-llvm-ir-and-split-debuginfo.rs
+tests/ui/functions-closures/parallel-codegen-closures.rs
+tests/ui/linkage-attr/linkage1.rs
+tests/ui/lto/dylib-works.rs
+tests/ui/numbers-arithmetic/saturating-float-casts.rs
+tests/ui/polymorphization/promoted-function.rs
+tests/ui/process/nofile-limit.rs
+tests/ui/sepcomp/sepcomp-cci.rs
+tests/ui/sepcomp/sepcomp-extern.rs
+tests/ui/sepcomp/sepcomp-fns-backwards.rs
+tests/ui/sepcomp/sepcomp-fns.rs
+tests/ui/sepcomp/sepcomp-statics.rs
+tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
+tests/ui/sse2.rs
+tests/ui/target-feature/missing-plusminus.rs
+tests/ui/asm/x86_64/may_unwind.rs
+tests/ui/backtrace.rs
+tests/ui/catch-unwind-bang.rs
+tests/ui/cfg/cfg-panic-abort.rs
+tests/ui/drop/dynamic-drop-async.rs
+tests/ui/drop/repeat-drop.rs
+tests/ui/fmt/format-args-capture.rs
+tests/ui/generator/panic-drops-resume.rs
+tests/ui/generator/panic-drops.rs
+tests/ui/generator/panic-safe.rs
+tests/ui/intrinsics/panic-uninitialized-zeroed.rs
+tests/ui/iterators/iter-sum-overflow-debug.rs
+tests/ui/iterators/iter-sum-overflow-overflow-checks.rs
+tests/ui/mir/mir_calls_to_shims.rs
+tests/ui/mir/mir_drop_order.rs
+tests/ui/mir/mir_let_chains_drop_order.rs
+tests/ui/oom_unwind.rs
+tests/ui/panic-runtime/abort-link-to-unwinding-crates.rs
+tests/ui/panic-runtime/abort.rs
+tests/ui/panic-runtime/link-to-abort.rs
+tests/ui/unwind-no-uwtable.rs
+tests/ui/issues/issue-14875.rs
+tests/ui/issues/issue-29948.rs
+tests/ui/issues/issue-40883.rs
+tests/ui/issues/issue-43853.rs
+tests/ui/issues/issue-47364.rs
+tests/ui/simd/issue-17170.rs
+tests/ui/simd/issue-39720.rs
+tests/ui/simd/issue-89193.rs
+tests/ui/statics/issue-91050-1.rs
+tests/ui/statics/issue-91050-2.rs
+tests/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
+tests/ui/rfc-2091-track-caller/std-panic-locations.rs
+tests/ui/rfcs/rfc1857-drop-order.rs
+tests/ui/parser/unclosed-delimiter-in-dep.rs
+tests/ui/runtime/rt-explody-panic-payloads.rs
+tests/ui/simd/intrinsic/ptr-cast.rs
+tests/ui/binding/fn-arg-incomplete-pattern-drop-order.rs
+tests/ui/codegen/issue-55976.rs
+tests/ui/consts/missing_span_in_backtrace.rs
+tests/ui/drop/dynamic-drop.rs
+tests/ui/dyn-star/box.rs
+tests/ui/dyn-star/const.rs
+tests/ui/dyn-star/drop.rs
+tests/ui/dyn-star/make-dyn-star.rs
+tests/ui/dyn-star/method.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 2a9f39e88ccb..bda0f633bc72 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -1,41 +1,41 @@
-src/test/ui/asm/x86_64/issue-96797.rs
-src/test/ui/intrinsics/const-eval-select-x86_64.rs
-src/test/ui/packed/packed-struct-drop-aligned.rs
-src/test/ui/packed/packed-struct-generic-layout.rs
-src/test/ui/packed/packed-struct-layout.rs
-src/test/ui/packed/packed-struct-optimized-enum.rs
-src/test/ui/packed/packed-struct-size.rs
-src/test/ui/packed/packed-struct-vec.rs
-src/test/ui/packed/packed-tuple-struct-layout.rs
-src/test/ui/simd/array-type.rs
-src/test/ui/simd/intrinsic/float-minmax-pass.rs
-src/test/ui/simd/intrinsic/generic-arithmetic-saturating-pass.rs
-src/test/ui/simd/intrinsic/generic-as.rs
-src/test/ui/simd/intrinsic/generic-cast-pass.rs
-src/test/ui/simd/intrinsic/generic-cast-pointer-width.rs
-src/test/ui/simd/intrinsic/generic-comparison-pass.rs
-src/test/ui/simd/intrinsic/generic-elements-pass.rs
-src/test/ui/simd/intrinsic/generic-reduction-pass.rs
-src/test/ui/simd/intrinsic/generic-select-pass.rs
-src/test/ui/simd/intrinsic/inlining-issue67557-ice.rs
-src/test/ui/simd/intrinsic/inlining-issue67557.rs
-src/test/ui/simd/monomorphize-shuffle-index.rs
-src/test/ui/simd/shuffle.rs
-src/test/ui/simd/simd-bitmask.rs
-src/test/ui/binding/fn-arg-incomplete-pattern-drop-order.rs
-src/test/ui/drop/dynamic-drop.rs
-src/test/ui/generator/resume-after-return.rs
-src/test/ui/iterators/iter-step-overflow-debug.rs
-src/test/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs
-src/test/ui/numbers-arithmetic/next-power-of-two-overflow-debug.rs
-src/test/ui/panic-while-printing.rs
-src/test/ui/privacy/reachable-unnameable-items.rs
-src/test/ui/rfc-1937-termination-trait/termination-trait-in-test.rs
-src/test/ui/async-await/async-fn-size-moved-locals.rs
-src/test/ui/async-await/async-fn-size-uninit-locals.rs
-src/test/ui/cfg/cfg-panic.rs
-src/test/ui/generator/size-moved-locals.rs
-src/test/ui/macros/rfc-2011-nicer-assert-messages/all-not-available-cases.rs
-src/test/ui/runtime/rt-explody-panic-payloads.rs
-src/test/ui/simd/intrinsic/generic-gather-pass.rs
-src/test/ui/simd/issue-85915-simd-ptrs.rs
+tests/ui/asm/x86_64/issue-96797.rs
+tests/ui/intrinsics/const-eval-select-x86_64.rs
+tests/ui/packed/packed-struct-drop-aligned.rs
+tests/ui/packed/packed-struct-generic-layout.rs
+tests/ui/packed/packed-struct-layout.rs
+tests/ui/packed/packed-struct-optimized-enum.rs
+tests/ui/packed/packed-struct-size.rs
+tests/ui/packed/packed-struct-vec.rs
+tests/ui/packed/packed-tuple-struct-layout.rs
+tests/ui/simd/array-type.rs
+tests/ui/simd/intrinsic/float-minmax-pass.rs
+tests/ui/simd/intrinsic/generic-arithmetic-saturating-pass.rs
+tests/ui/simd/intrinsic/generic-as.rs
+tests/ui/simd/intrinsic/generic-cast-pass.rs
+tests/ui/simd/intrinsic/generic-cast-pointer-width.rs
+tests/ui/simd/intrinsic/generic-comparison-pass.rs
+tests/ui/simd/intrinsic/generic-elements-pass.rs
+tests/ui/simd/intrinsic/generic-reduction-pass.rs
+tests/ui/simd/intrinsic/generic-select-pass.rs
+tests/ui/simd/intrinsic/inlining-issue67557-ice.rs
+tests/ui/simd/intrinsic/inlining-issue67557.rs
+tests/ui/simd/monomorphize-shuffle-index.rs
+tests/ui/simd/shuffle.rs
+tests/ui/simd/simd-bitmask.rs
+tests/ui/binding/fn-arg-incomplete-pattern-drop-order.rs
+tests/ui/drop/dynamic-drop.rs
+tests/ui/generator/resume-after-return.rs
+tests/ui/iterators/iter-step-overflow-debug.rs
+tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs
+tests/ui/numbers-arithmetic/next-power-of-two-overflow-debug.rs
+tests/ui/panic-while-printing.rs
+tests/ui/privacy/reachable-unnameable-items.rs
+tests/ui/rfc-1937-termination-trait/termination-trait-in-test.rs
+tests/ui/async-await/async-fn-size-moved-locals.rs
+tests/ui/async-await/async-fn-size-uninit-locals.rs
+tests/ui/cfg/cfg-panic.rs
+tests/ui/generator/size-moved-locals.rs
+tests/ui/macros/rfc-2011-nicer-assert-messages/all-not-available-cases.rs
+tests/ui/runtime/rt-explody-panic-payloads.rs
+tests/ui/simd/intrinsic/generic-gather-pass.rs
+tests/ui/simd/issue-85915-simd-ptrs.rs
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index ee0ea6e993f9..0edec566be30 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -407,7 +407,7 @@ pub fn ignore_arg_cast(func_name: &str, index: usize, args_len: usize) -> bool {
 #[cfg(not(feature="master"))]
 pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
     match name {
-        "llvm.x86.xgetbv" => {
+        "llvm.x86.xgetbv" | "llvm.x86.sse2.pause" => {
             let gcc_name = "__builtin_trap";
             let func = cx.context.get_builtin_function(gcc_name);
             cx.functions.borrow_mut().insert(gcc_name.to_string(), func);

From 42a89bd87599106a6d3fca34fe64b43b377a4e80 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 4 Mar 2023 15:41:30 -0500
Subject: [PATCH 308/997] Fix tests

---
 failing-ui-tests12.txt | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index bda0f633bc72..d3a27aa945ca 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -22,8 +22,6 @@ tests/ui/simd/intrinsic/inlining-issue67557.rs
 tests/ui/simd/monomorphize-shuffle-index.rs
 tests/ui/simd/shuffle.rs
 tests/ui/simd/simd-bitmask.rs
-tests/ui/binding/fn-arg-incomplete-pattern-drop-order.rs
-tests/ui/drop/dynamic-drop.rs
 tests/ui/generator/resume-after-return.rs
 tests/ui/iterators/iter-step-overflow-debug.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs
@@ -36,6 +34,5 @@ tests/ui/async-await/async-fn-size-uninit-locals.rs
 tests/ui/cfg/cfg-panic.rs
 tests/ui/generator/size-moved-locals.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-not-available-cases.rs
-tests/ui/runtime/rt-explody-panic-payloads.rs
 tests/ui/simd/intrinsic/generic-gather-pass.rs
 tests/ui/simd/issue-85915-simd-ptrs.rs

From f83ede03f5632c4f41103d95f0495f023b6dc28a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 4 Mar 2023 18:52:25 -0500
Subject: [PATCH 309/997] Fix tests

---
 failing-ui-tests.txt   | 21 +--------------------
 failing-ui-tests12.txt |  2 ++
 2 files changed, 3 insertions(+), 20 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index b82e6e157e58..bd7b718f9d2d 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -1,4 +1,3 @@
-tests/ui/alloc-error/default-alloc-error-hook.rs
 tests/ui/allocator/custom-in-block.rs
 tests/ui/allocator/custom-in-submodule.rs
 tests/ui/allocator/custom.rs
@@ -33,7 +32,6 @@ tests/ui/drop/repeat-drop.rs
 tests/ui/fmt/format-args-capture.rs
 tests/ui/generator/panic-drops-resume.rs
 tests/ui/generator/panic-drops.rs
-tests/ui/generator/panic-safe.rs
 tests/ui/intrinsics/panic-uninitialized-zeroed.rs
 tests/ui/iterators/iter-sum-overflow-debug.rs
 tests/ui/iterators/iter-sum-overflow-overflow-checks.rs
@@ -45,28 +43,11 @@ tests/ui/panic-runtime/abort-link-to-unwinding-crates.rs
 tests/ui/panic-runtime/abort.rs
 tests/ui/panic-runtime/link-to-abort.rs
 tests/ui/unwind-no-uwtable.rs
-tests/ui/issues/issue-14875.rs
-tests/ui/issues/issue-29948.rs
-tests/ui/issues/issue-40883.rs
-tests/ui/issues/issue-43853.rs
-tests/ui/issues/issue-47364.rs
-tests/ui/simd/issue-17170.rs
-tests/ui/simd/issue-39720.rs
-tests/ui/simd/issue-89193.rs
-tests/ui/statics/issue-91050-1.rs
-tests/ui/statics/issue-91050-2.rs
-tests/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
-tests/ui/rfc-2091-track-caller/std-panic-locations.rs
-tests/ui/rfcs/rfc1857-drop-order.rs
 tests/ui/parser/unclosed-delimiter-in-dep.rs
 tests/ui/runtime/rt-explody-panic-payloads.rs
 tests/ui/simd/intrinsic/ptr-cast.rs
 tests/ui/binding/fn-arg-incomplete-pattern-drop-order.rs
-tests/ui/codegen/issue-55976.rs
 tests/ui/consts/missing_span_in_backtrace.rs
 tests/ui/drop/dynamic-drop.rs
 tests/ui/dyn-star/box.rs
-tests/ui/dyn-star/const.rs
-tests/ui/dyn-star/drop.rs
-tests/ui/dyn-star/make-dyn-star.rs
-tests/ui/dyn-star/method.rs
+tests/ui/panic-while-printing.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index d3a27aa945ca..4e3a64e9eb74 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -36,3 +36,5 @@ tests/ui/generator/size-moved-locals.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-not-available-cases.rs
 tests/ui/simd/intrinsic/generic-gather-pass.rs
 tests/ui/simd/issue-85915-simd-ptrs.rs
+tests/ui/issues/issue-68010-large-zst-consts.rs
+tests/ui/rust-2018/proc-macro-crate-in-paths.rs

From 3180da55292c1fb8448eecea6bf3106d05f1f9df Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 4 Mar 2023 19:18:31 -0500
Subject: [PATCH 310/997] Fix tests

---
 failing-ui-tests.txt   | 16 +++++++++++++++-
 failing-ui-tests12.txt |  2 +-
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index bd7b718f9d2d..286aff33eab6 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -50,4 +50,18 @@ tests/ui/binding/fn-arg-incomplete-pattern-drop-order.rs
 tests/ui/consts/missing_span_in_backtrace.rs
 tests/ui/drop/dynamic-drop.rs
 tests/ui/dyn-star/box.rs
-tests/ui/panic-while-printing.rs
+tests/ui/issues/issue-40883.rs
+tests/ui/issues/issue-43853.rs
+tests/ui/issues/issue-47364.rs
+tests/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
+tests/ui/rfc-2091-track-caller/std-panic-locations.rs
+tests/ui/rfcs/rfc1857-drop-order.rs
+tests/ui/simd/issue-17170.rs
+tests/ui/simd/issue-39720.rs
+tests/ui/simd/issue-89193.rs
+tests/ui/statics/issue-91050-1.rs
+tests/ui/statics/issue-91050-2.rs
+tests/ui/alloc-error/default-alloc-error-hook.rs
+tests/ui/generator/panic-safe.rs
+tests/ui/issues/issue-14875.rs
+tests/ui/issues/issue-29948.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 4e3a64e9eb74..e4bdcb36b5ef 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -26,7 +26,6 @@ tests/ui/generator/resume-after-return.rs
 tests/ui/iterators/iter-step-overflow-debug.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs
 tests/ui/numbers-arithmetic/next-power-of-two-overflow-debug.rs
-tests/ui/panic-while-printing.rs
 tests/ui/privacy/reachable-unnameable-items.rs
 tests/ui/rfc-1937-termination-trait/termination-trait-in-test.rs
 tests/ui/async-await/async-fn-size-moved-locals.rs
@@ -38,3 +37,4 @@ tests/ui/simd/intrinsic/generic-gather-pass.rs
 tests/ui/simd/issue-85915-simd-ptrs.rs
 tests/ui/issues/issue-68010-large-zst-consts.rs
 tests/ui/rust-2018/proc-macro-crate-in-paths.rs
+tests/ui/panic-while-printing.rs

From 4b878ccab4cc9e68119a30bc2227522e301c674c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 4 Mar 2023 19:49:03 -0500
Subject: [PATCH 311/997] Fix tests

---
 failing-ui-tests.txt   | 1 +
 failing-ui-tests12.txt | 1 -
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 286aff33eab6..8539e27ea6a5 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -65,3 +65,4 @@ tests/ui/alloc-error/default-alloc-error-hook.rs
 tests/ui/generator/panic-safe.rs
 tests/ui/issues/issue-14875.rs
 tests/ui/issues/issue-29948.rs
+tests/ui/panic-while-printing.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index e4bdcb36b5ef..8c27bd8b8ca8 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -37,4 +37,3 @@ tests/ui/simd/intrinsic/generic-gather-pass.rs
 tests/ui/simd/issue-85915-simd-ptrs.rs
 tests/ui/issues/issue-68010-large-zst-consts.rs
 tests/ui/rust-2018/proc-macro-crate-in-paths.rs
-tests/ui/panic-while-printing.rs

From 77a9effd3dde6eabcda086ccd36dd1bfb5fb88ab Mon Sep 17 00:00:00 2001
From: Arpan Kapoor <a@arpankapoor.com>
Date: Fri, 24 Mar 2023 13:06:20 +0530
Subject: [PATCH 312/997] Optimize bitreverse codegen

---
 example/mini_core_hello_world.rs |   5 +
 src/intrinsic/mod.rs             | 161 +++++++------------------------
 2 files changed, 41 insertions(+), 125 deletions(-)

diff --git a/example/mini_core_hello_world.rs b/example/mini_core_hello_world.rs
index 993a31e68eab..4dff341e67d0 100644
--- a/example/mini_core_hello_world.rs
+++ b/example/mini_core_hello_world.rs
@@ -168,6 +168,11 @@ fn main() {
         world as Box<dyn SomeTrait>;
 
         assert_eq!(intrinsics::bitreverse(0b10101000u8), 0b00010101u8);
+        assert_eq!(intrinsics::bitreverse(0xddccu16), 0x33bbu16);
+        assert_eq!(intrinsics::bitreverse(0xffee_ddccu32), 0x33bb77ffu32);
+        assert_eq!(intrinsics::bitreverse(0x1234_5678_ffee_ddccu64), 0x33bb77ff1e6a2c48u64);
+        // != cannot be applied to type u128?
+        // assert_eq!(intrinsics::bitreverse(0x1234_5678_ffee_ddcc_1234_5678_ffee_ddccu128), 0x33bb77ff1e6a2c4833bb77ff1e6a2c48u128);
 
         assert_eq!(intrinsics::bswap(0xabu8), 0xabu8);
         assert_eq!(intrinsics::bswap(0xddccu16), 0xccddu16);
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 2590e0e3af44..6f856e481bca 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -549,141 +549,52 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let context = &self.cx.context;
         let result =
             match width {
-                8 => {
+                8 | 16 | 32 | 64 => {
+                    let mask = ((1u128 << width) - 1) as u64;
+                    let (m0, m1, m2) = if width > 16 {
+                        (
+                            context.new_rvalue_from_long(typ, (0x5555555555555555u64 & mask) as i64),
+                            context.new_rvalue_from_long(typ, (0x3333333333333333u64 & mask) as i64),
+                            context.new_rvalue_from_long(typ, (0x0f0f0f0f0f0f0f0fu64 & mask) as i64),
+                        )
+                    } else {
+                        (
+                            context.new_rvalue_from_int(typ, (0x5555u64 & mask) as i32),
+                            context.new_rvalue_from_int(typ, (0x3333u64 & mask) as i32),
+                            context.new_rvalue_from_int(typ, (0x0f0fu64 & mask) as i32),
+                        )
+                    };
+                    let one = context.new_rvalue_from_int(typ, 1);
+                    let two = context.new_rvalue_from_int(typ, 2);
+                    let four = context.new_rvalue_from_int(typ, 4);
+
                     // First step.
-                    let left = self.and(value, context.new_rvalue_from_int(typ, 0xF0));
-                    let left = self.lshr(left, context.new_rvalue_from_int(typ, 4));
-                    let right = self.and(value, context.new_rvalue_from_int(typ, 0x0F));
-                    let right = self.shl(right, context.new_rvalue_from_int(typ, 4));
+                    let left = self.lshr(value, one);
+                    let left = self.and(left, m0);
+                    let right = self.and(value, m0);
+                    let right = self.shl(right, one);
                     let step1 = self.or(left, right);
 
                     // Second step.
-                    let left = self.and(step1, context.new_rvalue_from_int(typ, 0xCC));
-                    let left = self.lshr(left, context.new_rvalue_from_int(typ, 2));
-                    let right = self.and(step1, context.new_rvalue_from_int(typ, 0x33));
-                    let right = self.shl(right, context.new_rvalue_from_int(typ, 2));
+                    let left = self.lshr(step1, two);
+                    let left = self.and(left, m1);
+                    let right = self.and(step1, m1);
+                    let right = self.shl(right, two);
                     let step2 = self.or(left, right);
 
                     // Third step.
-                    let left = self.and(step2, context.new_rvalue_from_int(typ, 0xAA));
-                    let left = self.lshr(left, context.new_rvalue_from_int(typ, 1));
-                    let right = self.and(step2, context.new_rvalue_from_int(typ, 0x55));
-                    let right = self.shl(right, context.new_rvalue_from_int(typ, 1));
-                    let step3 = self.or(left, right);
-
-                    step3
-                },
-                16 => {
-                    // First step.
-                    let left = self.and(value, context.new_rvalue_from_int(typ, 0x5555));
-                    let left = self.shl(left, context.new_rvalue_from_int(typ, 1));
-                    let right = self.and(value, context.new_rvalue_from_int(typ, 0xAAAA));
-                    let right = self.lshr(right, context.new_rvalue_from_int(typ, 1));
-                    let step1 = self.or(left, right);
-
-                    // Second step.
-                    let left = self.and(step1, context.new_rvalue_from_int(typ, 0x3333));
-                    let left = self.shl(left, context.new_rvalue_from_int(typ, 2));
-                    let right = self.and(step1, context.new_rvalue_from_int(typ, 0xCCCC));
-                    let right = self.lshr(right, context.new_rvalue_from_int(typ, 2));
-                    let step2 = self.or(left, right);
-
-                    // Third step.
-                    let left = self.and(step2, context.new_rvalue_from_int(typ, 0x0F0F));
-                    let left = self.shl(left, context.new_rvalue_from_int(typ, 4));
-                    let right = self.and(step2, context.new_rvalue_from_int(typ, 0xF0F0));
-                    let right = self.lshr(right, context.new_rvalue_from_int(typ, 4));
+                    let left = self.lshr(step2, four);
+                    let left = self.and(left, m2);
+                    let right = self.and(step2, m2);
+                    let right = self.shl(right, four);
                     let step3 = self.or(left, right);
 
                     // Fourth step.
-                    let left = self.and(step3, context.new_rvalue_from_int(typ, 0x00FF));
-                    let left = self.shl(left, context.new_rvalue_from_int(typ, 8));
-                    let right = self.and(step3, context.new_rvalue_from_int(typ, 0xFF00));
-                    let right = self.lshr(right, context.new_rvalue_from_int(typ, 8));
-                    let step4 = self.or(left, right);
-
-                    step4
-                },
-                32 => {
-                    // TODO(antoyo): Refactor with other implementations.
-                    // First step.
-                    let left = self.and(value, context.new_rvalue_from_long(typ, 0x55555555));
-                    let left = self.shl(left, context.new_rvalue_from_long(typ, 1));
-                    let right = self.and(value, context.new_rvalue_from_long(typ, 0xAAAAAAAA));
-                    let right = self.lshr(right, context.new_rvalue_from_long(typ, 1));
-                    let step1 = self.or(left, right);
-
-                    // Second step.
-                    let left = self.and(step1, context.new_rvalue_from_long(typ, 0x33333333));
-                    let left = self.shl(left, context.new_rvalue_from_long(typ, 2));
-                    let right = self.and(step1, context.new_rvalue_from_long(typ, 0xCCCCCCCC));
-                    let right = self.lshr(right, context.new_rvalue_from_long(typ, 2));
-                    let step2 = self.or(left, right);
-
-                    // Third step.
-                    let left = self.and(step2, context.new_rvalue_from_long(typ, 0x0F0F0F0F));
-                    let left = self.shl(left, context.new_rvalue_from_long(typ, 4));
-                    let right = self.and(step2, context.new_rvalue_from_long(typ, 0xF0F0F0F0));
-                    let right = self.lshr(right, context.new_rvalue_from_long(typ, 4));
-                    let step3 = self.or(left, right);
-
-                    // Fourth step.
-                    let left = self.and(step3, context.new_rvalue_from_long(typ, 0x00FF00FF));
-                    let left = self.shl(left, context.new_rvalue_from_long(typ, 8));
-                    let right = self.and(step3, context.new_rvalue_from_long(typ, 0xFF00FF00));
-                    let right = self.lshr(right, context.new_rvalue_from_long(typ, 8));
-                    let step4 = self.or(left, right);
-
-                    // Fifth step.
-                    let left = self.and(step4, context.new_rvalue_from_long(typ, 0x0000FFFF));
-                    let left = self.shl(left, context.new_rvalue_from_long(typ, 16));
-                    let right = self.and(step4, context.new_rvalue_from_long(typ, 0xFFFF0000));
-                    let right = self.lshr(right, context.new_rvalue_from_long(typ, 16));
-                    let step5 = self.or(left, right);
-
-                    step5
-                },
-                64 => {
-                    // First step.
-                    let left = self.shl(value, context.new_rvalue_from_long(typ, 32));
-                    let right = self.lshr(value, context.new_rvalue_from_long(typ, 32));
-                    let step1 = self.or(left, right);
-
-                    // Second step.
-                    let left = self.and(step1, context.new_rvalue_from_long(typ, 0x0001FFFF0001FFFF));
-                    let left = self.shl(left, context.new_rvalue_from_long(typ, 15));
-                    let right = self.and(step1, context.new_rvalue_from_long(typ, 0xFFFE0000FFFE0000u64 as i64)); // TODO(antoyo): transmute the number instead?
-                    let right = self.lshr(right, context.new_rvalue_from_long(typ, 17));
-                    let step2 = self.or(left, right);
-
-                    // Third step.
-                    let left = self.lshr(step2, context.new_rvalue_from_long(typ, 10));
-                    let left = self.xor(step2, left);
-                    let temp = self.and(left, context.new_rvalue_from_long(typ, 0x003F801F003F801F));
-
-                    let left = self.shl(temp, context.new_rvalue_from_long(typ, 10));
-                    let left = self.or(temp, left);
-                    let step3 = self.xor(left, step2);
-
-                    // Fourth step.
-                    let left = self.lshr(step3, context.new_rvalue_from_long(typ, 4));
-                    let left = self.xor(step3, left);
-                    let temp = self.and(left, context.new_rvalue_from_long(typ, 0x0E0384210E038421));
-
-                    let left = self.shl(temp, context.new_rvalue_from_long(typ, 4));
-                    let left = self.or(temp, left);
-                    let step4 = self.xor(left, step3);
-
-                    // Fifth step.
-                    let left = self.lshr(step4, context.new_rvalue_from_long(typ, 2));
-                    let left = self.xor(step4, left);
-                    let temp = self.and(left, context.new_rvalue_from_long(typ, 0x2248884222488842));
-
-                    let left = self.shl(temp, context.new_rvalue_from_long(typ, 2));
-                    let left = self.or(temp, left);
-                    let step5 = self.xor(left, step4);
-
-                    step5
+                    if width == 8 {
+                        step3
+                    } else {
+                        self.gcc_bswap(step3, width)
+                    }
                 },
                 128 => {
                     // TODO(antoyo): find a more efficient implementation?

From 6e1a79c6a4630d1cd0bd143919ffac3c598f0e3d Mon Sep 17 00:00:00 2001
From: Arpan Kapoor <a@arpankapoor.com>
Date: Sun, 26 Mar 2023 13:19:57 +0530
Subject: [PATCH 313/997] Add u128 PartialEq impl in mini_core.rs

---
 example/mini_core.rs             | 11 +++++++++++
 example/mini_core_hello_world.rs |  3 +--
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/example/mini_core.rs b/example/mini_core.rs
index 637b8dc53fef..018bbaf025da 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -59,6 +59,7 @@ unsafe impl Copy for u8 {}
 unsafe impl Copy for u16 {}
 unsafe impl Copy for u32 {}
 unsafe impl Copy for u64 {}
+unsafe impl Copy for u128 {}
 unsafe impl Copy for usize {}
 unsafe impl Copy for i8 {}
 unsafe impl Copy for i16 {}
@@ -79,6 +80,7 @@ unsafe impl Sync for u8 {}
 unsafe impl Sync for u16 {}
 unsafe impl Sync for u32 {}
 unsafe impl Sync for u64 {}
+unsafe impl Sync for u128 {}
 unsafe impl Sync for usize {}
 unsafe impl Sync for i8 {}
 unsafe impl Sync for i16 {}
@@ -294,6 +296,15 @@ impl PartialEq for u64 {
     }
 }
 
+impl PartialEq for u128 {
+    fn eq(&self, other: &u128) -> bool {
+        (*self) == (*other)
+    }
+    fn ne(&self, other: &u128) -> bool {
+        (*self) != (*other)
+    }
+}
+
 impl PartialEq for usize {
     fn eq(&self, other: &usize) -> bool {
         (*self) == (*other)
diff --git a/example/mini_core_hello_world.rs b/example/mini_core_hello_world.rs
index 4dff341e67d0..ad244814208f 100644
--- a/example/mini_core_hello_world.rs
+++ b/example/mini_core_hello_world.rs
@@ -171,8 +171,7 @@ fn main() {
         assert_eq!(intrinsics::bitreverse(0xddccu16), 0x33bbu16);
         assert_eq!(intrinsics::bitreverse(0xffee_ddccu32), 0x33bb77ffu32);
         assert_eq!(intrinsics::bitreverse(0x1234_5678_ffee_ddccu64), 0x33bb77ff1e6a2c48u64);
-        // != cannot be applied to type u128?
-        // assert_eq!(intrinsics::bitreverse(0x1234_5678_ffee_ddcc_1234_5678_ffee_ddccu128), 0x33bb77ff1e6a2c4833bb77ff1e6a2c48u128);
+        assert_eq!(intrinsics::bitreverse(0x1234_5678_ffee_ddcc_1234_5678_ffee_ddccu128), 0x33bb77ff1e6a2c4833bb77ff1e6a2c48u128);
 
         assert_eq!(intrinsics::bswap(0xabu8), 0xabu8);
         assert_eq!(intrinsics::bswap(0xddccu16), 0xccddu16);

From 68b8500235fe2641afa6a36f1786a9d5d5105065 Mon Sep 17 00:00:00 2001
From: Arpan Kapoor <a@arpankapoor.com>
Date: Mon, 27 Mar 2023 20:33:05 +0530
Subject: [PATCH 314/997] move u128 test to std_example

---
 example/mini_core.rs             | 11 -----------
 example/mini_core_hello_world.rs |  1 -
 example/std_example.rs           |  1 +
 3 files changed, 1 insertion(+), 12 deletions(-)

diff --git a/example/mini_core.rs b/example/mini_core.rs
index 018bbaf025da..637b8dc53fef 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -59,7 +59,6 @@ unsafe impl Copy for u8 {}
 unsafe impl Copy for u16 {}
 unsafe impl Copy for u32 {}
 unsafe impl Copy for u64 {}
-unsafe impl Copy for u128 {}
 unsafe impl Copy for usize {}
 unsafe impl Copy for i8 {}
 unsafe impl Copy for i16 {}
@@ -80,7 +79,6 @@ unsafe impl Sync for u8 {}
 unsafe impl Sync for u16 {}
 unsafe impl Sync for u32 {}
 unsafe impl Sync for u64 {}
-unsafe impl Sync for u128 {}
 unsafe impl Sync for usize {}
 unsafe impl Sync for i8 {}
 unsafe impl Sync for i16 {}
@@ -296,15 +294,6 @@ impl PartialEq for u64 {
     }
 }
 
-impl PartialEq for u128 {
-    fn eq(&self, other: &u128) -> bool {
-        (*self) == (*other)
-    }
-    fn ne(&self, other: &u128) -> bool {
-        (*self) != (*other)
-    }
-}
-
 impl PartialEq for usize {
     fn eq(&self, other: &usize) -> bool {
         (*self) == (*other)
diff --git a/example/mini_core_hello_world.rs b/example/mini_core_hello_world.rs
index ad244814208f..1c8ca6b9d7c8 100644
--- a/example/mini_core_hello_world.rs
+++ b/example/mini_core_hello_world.rs
@@ -171,7 +171,6 @@ fn main() {
         assert_eq!(intrinsics::bitreverse(0xddccu16), 0x33bbu16);
         assert_eq!(intrinsics::bitreverse(0xffee_ddccu32), 0x33bb77ffu32);
         assert_eq!(intrinsics::bitreverse(0x1234_5678_ffee_ddccu64), 0x33bb77ff1e6a2c48u64);
-        assert_eq!(intrinsics::bitreverse(0x1234_5678_ffee_ddcc_1234_5678_ffee_ddccu128), 0x33bb77ff1e6a2c4833bb77ff1e6a2c48u128);
 
         assert_eq!(intrinsics::bswap(0xabu8), 0xabu8);
         assert_eq!(intrinsics::bswap(0xddccu16), 0xccddu16);
diff --git a/example/std_example.rs b/example/std_example.rs
index 5c171c49fd19..18f2ddcde126 100644
--- a/example/std_example.rs
+++ b/example/std_example.rs
@@ -58,6 +58,7 @@ fn main() {
 
     assert_eq!(0b0000000000000000000000000010000010000000000000000000000000000000_0000000000100000000000000000000000001000000000000100000000000000u128.leading_zeros(), 26);
     assert_eq!(0b0000000000000000000000000010000000000000000000000000000000000000_0000000000000000000000000000000000001000000000000000000010000000u128.trailing_zeros(), 7);
+    assert_eq!(0x1234_5678_ffee_ddcc_1234_5678_ffee_ddccu128.reverse_bits(), 0x33bb77ff1e6a2c4833bb77ff1e6a2c48u128);
 
     let _d = 0i128.checked_div(2i128);
     let _d = 0u128.checked_div(2u128);

From 7e2e5054a6dd0a4d40b6e28309919287ff48efbd Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 5 Apr 2023 16:30:21 +0200
Subject: [PATCH 315/997] Update gccjit dependency version

---
 Cargo.lock | 26 ++++++++++----------------
 1 file changed, 10 insertions(+), 16 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index ac0fc0eeb7e9..6e94c03a1540 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -35,7 +35,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#eefb8c662d61477f34b7c32d26bcda5f1ef08432"
+source = "git+https://github.com/antoyo/gccjit.rs#98a29ddd64f662beb5d11810434fbeaad4a1856c"
 dependencies = [
  "gccjit_sys",
 ]
@@ -43,9 +43,9 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#eefb8c662d61477f34b7c32d26bcda5f1ef08432"
+source = "git+https://github.com/antoyo/gccjit.rs#98a29ddd64f662beb5d11810434fbeaad4a1856c"
 dependencies = [
- "libc 0.1.12",
+ "libc",
 ]
 
 [[package]]
@@ -64,7 +64,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "7fcd999463524c52659517fe2cea98493cfe485d10565e7b0fb07dbba7ad2753"
 dependencies = [
  "cfg-if",
- "libc 0.2.112",
+ "libc",
  "wasi",
 ]
 
@@ -74,7 +74,7 @@ version = "0.1.19"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "62b467343b94ba476dcb2500d242dadbb39557df889310ac77c5d99100aaac33"
 dependencies = [
- "libc 0.2.112",
+ "libc",
 ]
 
 [[package]]
@@ -85,7 +85,7 @@ checksum = "96bd995a092cac79868250589869b5a5d656b02a02bd74c8ebdc566dc7203090"
 dependencies = [
  "fm",
  "getopts",
- "libc 0.2.112",
+ "libc",
  "num_cpus",
  "termcolor",
  "threadpool",
@@ -93,12 +93,6 @@ dependencies = [
  "walkdir",
 ]
 
-[[package]]
-name = "libc"
-version = "0.1.12"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e32a70cf75e5846d53a673923498228bbec6a8624708a9ea5645f075d6276122"
-
 [[package]]
 name = "libc"
 version = "0.2.112"
@@ -118,7 +112,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "05499f3756671c15885fee9034446956fff3f243d6077b91e5767df161f766b3"
 dependencies = [
  "hermit-abi",
- "libc 0.2.112",
+ "libc",
 ]
 
 [[package]]
@@ -133,7 +127,7 @@ version = "0.8.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "2e7573632e6454cf6b99d7aac4ccca54be06da05aca2ef7423d22d27d4d4bcd8"
 dependencies = [
- "libc 0.2.112",
+ "libc",
  "rand_chacha",
  "rand_core",
  "rand_hc",
@@ -234,7 +228,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "dac1c663cfc93810f88aed9b8941d48cabf856a1b111c29a40439018d870eb22"
 dependencies = [
  "cfg-if",
- "libc 0.2.112",
+ "libc",
  "rand",
  "redox_syscall",
  "remove_dir_all",
@@ -271,7 +265,7 @@ version = "0.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "9f200f5b12eb75f8c1ed65abd4b2db8a6e1b138a20de009dacee265a2498f3f6"
 dependencies = [
- "libc 0.2.112",
+ "libc",
 ]
 
 [[package]]

From b769ad26b08f65e9d741d8b720b9bfb8038a2808 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 5 Apr 2023 16:20:20 +0200
Subject: [PATCH 316/997] Add `llvm` folder to .gitignore file

---
 .gitignore | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/.gitignore b/.gitignore
index 12ed56675639..c5ed7de200c2 100644
--- a/.gitignore
+++ b/.gitignore
@@ -23,3 +23,5 @@ benchmarks
 tools/llvm-project
 tools/llvmint
 tools/llvmint-2
+# The `llvm` folder is generated by the `tools/generate_intrinsics.py` script to update intrinsics.
+llvm

From 98482ad1e4b690f349509460f2e05333a05822b1 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 5 Apr 2023 16:17:45 +0200
Subject: [PATCH 317/997] Regen intrinsics

---
 src/intrinsic/archs.rs | 50 ++++--------------------------------------
 1 file changed, 4 insertions(+), 46 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 8a4559355ea6..8cd8d1bfb429 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -3020,8 +3020,6 @@ match name {
     "llvm.nvvm.div.rz.ftz.f" => "__nvvm_div_rz_ftz_f",
     "llvm.nvvm.ex2.approx.d" => "__nvvm_ex2_approx_d",
     "llvm.nvvm.ex2.approx.f" => "__nvvm_ex2_approx_f",
-    "llvm.nvvm.ex2.approx.f16" => "__nvvm_ex2_approx_f16",
-    "llvm.nvvm.ex2.approx.f16x2" => "__nvvm_ex2_approx_f16x2",
     "llvm.nvvm.ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f",
     "llvm.nvvm.f2bf16.rn" => "__nvvm_f2bf16_rn",
     "llvm.nvvm.f2bf16.rn.relu" => "__nvvm_f2bf16_rn_relu",
@@ -3083,21 +3081,9 @@ match name {
     "llvm.nvvm.fma.rn.bf16x2" => "__nvvm_fma_rn_bf16x2",
     "llvm.nvvm.fma.rn.d" => "__nvvm_fma_rn_d",
     "llvm.nvvm.fma.rn.f" => "__nvvm_fma_rn_f",
-    "llvm.nvvm.fma.rn.f16" => "__nvvm_fma_rn_f16",
-    "llvm.nvvm.fma.rn.f16x2" => "__nvvm_fma_rn_f16x2",
     "llvm.nvvm.fma.rn.ftz.f" => "__nvvm_fma_rn_ftz_f",
-    "llvm.nvvm.fma.rn.ftz.f16" => "__nvvm_fma_rn_ftz_f16",
-    "llvm.nvvm.fma.rn.ftz.f16x2" => "__nvvm_fma_rn_ftz_f16x2",
-    "llvm.nvvm.fma.rn.ftz.relu.f16" => "__nvvm_fma_rn_ftz_relu_f16",
-    "llvm.nvvm.fma.rn.ftz.relu.f16x2" => "__nvvm_fma_rn_ftz_relu_f16x2",
-    "llvm.nvvm.fma.rn.ftz.sat.f16" => "__nvvm_fma_rn_ftz_sat_f16",
-    "llvm.nvvm.fma.rn.ftz.sat.f16x2" => "__nvvm_fma_rn_ftz_sat_f16x2",
     "llvm.nvvm.fma.rn.relu.bf16" => "__nvvm_fma_rn_relu_bf16",
     "llvm.nvvm.fma.rn.relu.bf16x2" => "__nvvm_fma_rn_relu_bf16x2",
-    "llvm.nvvm.fma.rn.relu.f16" => "__nvvm_fma_rn_relu_f16",
-    "llvm.nvvm.fma.rn.relu.f16x2" => "__nvvm_fma_rn_relu_f16x2",
-    "llvm.nvvm.fma.rn.sat.f16" => "__nvvm_fma_rn_sat_f16",
-    "llvm.nvvm.fma.rn.sat.f16x2" => "__nvvm_fma_rn_sat_f16x2",
     "llvm.nvvm.fma.rp.d" => "__nvvm_fma_rp_d",
     "llvm.nvvm.fma.rp.f" => "__nvvm_fma_rp_f",
     "llvm.nvvm.fma.rp.ftz.f" => "__nvvm_fma_rp_ftz_f",
@@ -3108,68 +3094,36 @@ match name {
     "llvm.nvvm.fmax.bf16x2" => "__nvvm_fmax_bf16x2",
     "llvm.nvvm.fmax.d" => "__nvvm_fmax_d",
     "llvm.nvvm.fmax.f" => "__nvvm_fmax_f",
-    "llvm.nvvm.fmax.f16" => "__nvvm_fmax_f16",
-    "llvm.nvvm.fmax.f16x2" => "__nvvm_fmax_f16x2",
     "llvm.nvvm.fmax.ftz.f" => "__nvvm_fmax_ftz_f",
-    "llvm.nvvm.fmax.ftz.f16" => "__nvvm_fmax_ftz_f16",
-    "llvm.nvvm.fmax.ftz.f16x2" => "__nvvm_fmax_ftz_f16x2",
     "llvm.nvvm.fmax.ftz.nan.f" => "__nvvm_fmax_ftz_nan_f",
-    "llvm.nvvm.fmax.ftz.nan.f16" => "__nvvm_fmax_ftz_nan_f16",
-    "llvm.nvvm.fmax.ftz.nan.f16x2" => "__nvvm_fmax_ftz_nan_f16x2",
     "llvm.nvvm.fmax.ftz.nan.xorsign.abs.f" => "__nvvm_fmax_ftz_nan_xorsign_abs_f",
-    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.f16" => "__nvvm_fmax_ftz_nan_xorsign_abs_f16",
-    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.f16x2" => "__nvvm_fmax_ftz_nan_xorsign_abs_f16x2",
     "llvm.nvvm.fmax.ftz.xorsign.abs.f" => "__nvvm_fmax_ftz_xorsign_abs_f",
-    "llvm.nvvm.fmax.ftz.xorsign.abs.f16" => "__nvvm_fmax_ftz_xorsign_abs_f16",
-    "llvm.nvvm.fmax.ftz.xorsign.abs.f16x2" => "__nvvm_fmax_ftz_xorsign_abs_f16x2",
     "llvm.nvvm.fmax.nan.bf16" => "__nvvm_fmax_nan_bf16",
     "llvm.nvvm.fmax.nan.bf16x2" => "__nvvm_fmax_nan_bf16x2",
     "llvm.nvvm.fmax.nan.f" => "__nvvm_fmax_nan_f",
-    "llvm.nvvm.fmax.nan.f16" => "__nvvm_fmax_nan_f16",
-    "llvm.nvvm.fmax.nan.f16x2" => "__nvvm_fmax_nan_f16x2",
     "llvm.nvvm.fmax.nan.xorsign.abs.bf16" => "__nvvm_fmax_nan_xorsign_abs_bf16",
     "llvm.nvvm.fmax.nan.xorsign.abs.bf16x2" => "__nvvm_fmax_nan_xorsign_abs_bf16x2",
     "llvm.nvvm.fmax.nan.xorsign.abs.f" => "__nvvm_fmax_nan_xorsign_abs_f",
-    "llvm.nvvm.fmax.nan.xorsign.abs.f16" => "__nvvm_fmax_nan_xorsign_abs_f16",
-    "llvm.nvvm.fmax.nan.xorsign.abs.f16x2" => "__nvvm_fmax_nan_xorsign_abs_f16x2",
     "llvm.nvvm.fmax.xorsign.abs.bf16" => "__nvvm_fmax_xorsign_abs_bf16",
     "llvm.nvvm.fmax.xorsign.abs.bf16x2" => "__nvvm_fmax_xorsign_abs_bf16x2",
     "llvm.nvvm.fmax.xorsign.abs.f" => "__nvvm_fmax_xorsign_abs_f",
-    "llvm.nvvm.fmax.xorsign.abs.f16" => "__nvvm_fmax_xorsign_abs_f16",
-    "llvm.nvvm.fmax.xorsign.abs.f16x2" => "__nvvm_fmax_xorsign_abs_f16x2",
     "llvm.nvvm.fmin.bf16" => "__nvvm_fmin_bf16",
     "llvm.nvvm.fmin.bf16x2" => "__nvvm_fmin_bf16x2",
     "llvm.nvvm.fmin.d" => "__nvvm_fmin_d",
     "llvm.nvvm.fmin.f" => "__nvvm_fmin_f",
-    "llvm.nvvm.fmin.f16" => "__nvvm_fmin_f16",
-    "llvm.nvvm.fmin.f16x2" => "__nvvm_fmin_f16x2",
     "llvm.nvvm.fmin.ftz.f" => "__nvvm_fmin_ftz_f",
-    "llvm.nvvm.fmin.ftz.f16" => "__nvvm_fmin_ftz_f16",
-    "llvm.nvvm.fmin.ftz.f16x2" => "__nvvm_fmin_ftz_f16x2",
     "llvm.nvvm.fmin.ftz.nan.f" => "__nvvm_fmin_ftz_nan_f",
-    "llvm.nvvm.fmin.ftz.nan.f16" => "__nvvm_fmin_ftz_nan_f16",
-    "llvm.nvvm.fmin.ftz.nan.f16x2" => "__nvvm_fmin_ftz_nan_f16x2",
     "llvm.nvvm.fmin.ftz.nan.xorsign.abs.f" => "__nvvm_fmin_ftz_nan_xorsign_abs_f",
-    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.f16" => "__nvvm_fmin_ftz_nan_xorsign_abs_f16",
-    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.f16x2" => "__nvvm_fmin_ftz_nan_xorsign_abs_f16x2",
     "llvm.nvvm.fmin.ftz.xorsign.abs.f" => "__nvvm_fmin_ftz_xorsign_abs_f",
-    "llvm.nvvm.fmin.ftz.xorsign.abs.f16" => "__nvvm_fmin_ftz_xorsign_abs_f16",
-    "llvm.nvvm.fmin.ftz.xorsign.abs.f16x2" => "__nvvm_fmin_ftz_xorsign_abs_f16x2",
     "llvm.nvvm.fmin.nan.bf16" => "__nvvm_fmin_nan_bf16",
     "llvm.nvvm.fmin.nan.bf16x2" => "__nvvm_fmin_nan_bf16x2",
     "llvm.nvvm.fmin.nan.f" => "__nvvm_fmin_nan_f",
-    "llvm.nvvm.fmin.nan.f16" => "__nvvm_fmin_nan_f16",
-    "llvm.nvvm.fmin.nan.f16x2" => "__nvvm_fmin_nan_f16x2",
     "llvm.nvvm.fmin.nan.xorsign.abs.bf16" => "__nvvm_fmin_nan_xorsign_abs_bf16",
     "llvm.nvvm.fmin.nan.xorsign.abs.bf16x2" => "__nvvm_fmin_nan_xorsign_abs_bf16x2",
     "llvm.nvvm.fmin.nan.xorsign.abs.f" => "__nvvm_fmin_nan_xorsign_abs_f",
-    "llvm.nvvm.fmin.nan.xorsign.abs.f16" => "__nvvm_fmin_nan_xorsign_abs_f16",
-    "llvm.nvvm.fmin.nan.xorsign.abs.f16x2" => "__nvvm_fmin_nan_xorsign_abs_f16x2",
     "llvm.nvvm.fmin.xorsign.abs.bf16" => "__nvvm_fmin_xorsign_abs_bf16",
     "llvm.nvvm.fmin.xorsign.abs.bf16x2" => "__nvvm_fmin_xorsign_abs_bf16x2",
     "llvm.nvvm.fmin.xorsign.abs.f" => "__nvvm_fmin_xorsign_abs_f",
-    "llvm.nvvm.fmin.xorsign.abs.f16" => "__nvvm_fmin_xorsign_abs_f16",
-    "llvm.nvvm.fmin.xorsign.abs.f16x2" => "__nvvm_fmin_xorsign_abs_f16x2",
     "llvm.nvvm.fns" => "__nvvm_fns",
     "llvm.nvvm.h2f" => "__nvvm_h2f",
     "llvm.nvvm.i2d.rm" => "__nvvm_i2d_rm",
@@ -7895,6 +7849,10 @@ match name {
     "llvm.x86.subborrow.u64" => "__builtin_ia32_subborrow_u64",
     "llvm.x86.tbm.bextri.u32" => "__builtin_ia32_bextri_u32",
     "llvm.x86.tbm.bextri.u64" => "__builtin_ia32_bextri_u64",
+    "llvm.x86.tcmmimfp16ps" => "__builtin_ia32_tcmmimfp16ps",
+    "llvm.x86.tcmmimfp16ps.internal" => "__builtin_ia32_tcmmimfp16ps_internal",
+    "llvm.x86.tcmmrlfp16ps" => "__builtin_ia32_tcmmrlfp16ps",
+    "llvm.x86.tcmmrlfp16ps.internal" => "__builtin_ia32_tcmmrlfp16ps_internal",
     "llvm.x86.tdpbf16ps" => "__builtin_ia32_tdpbf16ps",
     "llvm.x86.tdpbf16ps.internal" => "__builtin_ia32_tdpbf16ps_internal",
     "llvm.x86.tdpbssd" => "__builtin_ia32_tdpbssd",

From 65a20d3f711e8cb6ea418fb7948a9c4a054d5bc8 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 5 Apr 2023 22:22:42 -0400
Subject: [PATCH 318/997] Fix vpshrd llvm instrinsics

---
 src/intrinsic/llvm.rs | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 0edec566be30..f28348380d7b 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -313,6 +313,13 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 let new_args = args.to_vec();
                 args = vec![new_args[1], new_args[0], new_args[2], new_args[3], new_args[4]].into();
             },
+            "__builtin_ia32_vpshrdv_v8di" | "__builtin_ia32_vpshrdv_v4di" | "__builtin_ia32_vpshrdv_v2di" |
+                "__builtin_ia32_vpshrdv_v16si" | "__builtin_ia32_vpshrdv_v8si" | "__builtin_ia32_vpshrdv_v4si" |
+                "__builtin_ia32_vpshrdv_v32hi" | "__builtin_ia32_vpshrdv_v16hi" | "__builtin_ia32_vpshrdv_v8hi" => {
+                // The first two arguments are reversed, compared to LLVM.
+                let new_args = args.to_vec();
+                args = vec![new_args[1], new_args[0], new_args[2]].into();
+            },
             _ => (),
         }
     }

From a6d7ab5b00e1b74bf77cab783c23c805f144b43f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 8 Apr 2023 12:39:58 -0400
Subject: [PATCH 319/997] Run emulated stdarch tests in the CI

---
 .github/workflows/stdarch.yml | 32 +++++++++++++++++++++++++++++---
 1 file changed, 29 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 42fb35e738ff..556c64448332 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -20,9 +20,9 @@ jobs:
       matrix:
         libgccjit_version:
           - { gcc: "libgccjit.so", artifacts_branch: "master" }
-        commands: [
-          "--test-successful-rustc --nb-parts 2 --current-part 0",
-          "--test-successful-rustc --nb-parts 2 --current-part 1",
+        cargo_runner: [
+          "sde -future -rtm_mode full --",
+          "",
         ]
 
     steps:
@@ -36,6 +36,20 @@ jobs:
     - name: Install packages
       run: sudo apt-get install ninja-build ripgrep
 
+    - name: Install Intel Software Development Emulator
+      if: ${{ matrix.cargo_runner }}
+      run: |
+          mkdir intel-sde
+          cd intel-sde
+          dir=sde-external-9.14.0-2022-10-25-lin
+          file=$dir.tar.xz
+          wget https://downloadmirror.intel.com/751535/$file
+          tar xvf $file
+          sudo mkdir /usr/share/intel-sde
+          sudo cp -r $dir/* /usr/share/intel-sde
+          sudo ln -s /usr/share/intel-sde/sde /usr/bin/sde
+          sudo ln -s /usr/share/intel-sde/sde64 /usr/bin/sde64
+
     - name: Download artifact
       uses: dawidd6/action-download-artifact@v2
       with:
@@ -91,6 +105,10 @@ jobs:
         ./prepare_build.sh
         ./build.sh --release --release-sysroot
         cargo test
+
+    - name: Clean
+      if: ${{ !matrix.cargo_runner }}
+      run: |
         ./clean_all.sh
 
     - name: Prepare dependencies
@@ -107,10 +125,18 @@ jobs:
         args: --release
 
     - name: Run tests
+      if: ${{ !matrix.cargo_runner }}
       run: |
         ./test.sh --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore
 
     - name: Run stdarch tests
+      if: ${{ !matrix.cargo_runner }}
       run: |
         cd build_sysroot/sysroot_src/library/stdarch/
         CHANNEL=release TARGET=x86_64-unknown-linux-gnu ../../../../cargo.sh test
+
+    - name: Run stdarch tests
+      if: ${{ matrix.cargo_runner }}
+      run: |
+        cd build_sysroot/sysroot_src/library/stdarch/
+        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu ../../../../cargo.sh test -- --skip rtm --skip tbm --skip sse4a

From b93041af0a3100feb8785a6ff17b242c21d1a6f8 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 16 Apr 2023 14:12:42 -0400
Subject: [PATCH 320/997] Add support for inline attribute

---
 Cargo.lock        |  4 ++--
 Cargo.toml        |  2 +-
 src/attributes.rs | 39 +++++++++++++++++++++++++++++++++++++++
 src/lib.rs        |  2 ++
 4 files changed, 44 insertions(+), 3 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 6e94c03a1540..3c5357eec105 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -35,7 +35,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#98a29ddd64f662beb5d11810434fbeaad4a1856c"
+source = "git+https://github.com/antoyo/gccjit.rs#d6e52626cfc6f487094a5d5ac66302baf3439984"
 dependencies = [
  "gccjit_sys",
 ]
@@ -43,7 +43,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#98a29ddd64f662beb5d11810434fbeaad4a1856c"
+source = "git+https://github.com/antoyo/gccjit.rs#d6e52626cfc6f487094a5d5ac66302baf3439984"
 dependencies = [
  "libc",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 81066d9ce1f0..7285e3eaf519 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -25,7 +25,7 @@ master = ["gccjit/master"]
 gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
 
 # Local copy.
-#gccjit = { path = "../gccjit.rs" }
+# gccjit = { path = "../gccjit.rs" }
 
 smallvec = { version = "1.6.1", features = ["union", "may_dangle"] }
 
diff --git a/src/attributes.rs b/src/attributes.rs
index 243a1a36dd09..23c1f886e09e 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -2,9 +2,13 @@
 use gccjit::FnAttribute;
 use gccjit::Function;
 use rustc_attr::InstructionSetAttr;
+#[cfg(feature="master")]
+use rustc_attr::InlineAttr;
 use rustc_codegen_ssa::target_features::tied_target_features;
 use rustc_data_structures::fx::FxHashMap;
 use rustc_middle::ty;
+#[cfg(feature="master")]
+use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
 use rustc_session::Session;
 use rustc_span::symbol::sym;
 use smallvec::{smallvec, SmallVec};
@@ -67,6 +71,24 @@ fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]> {
     }
 }
 
+/// Get GCC attribute for the provided inline heuristic.
+#[cfg(feature="master")]
+#[inline]
+fn inline_attr<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, inline: InlineAttr) -> Option<FnAttribute<'gcc>> {
+    match inline {
+        InlineAttr::Hint => Some(FnAttribute::Inline),
+        InlineAttr::Always => Some(FnAttribute::AlwaysInline),
+        InlineAttr::Never => {
+            if cx.sess().target.arch != "amdgpu" {
+                Some(FnAttribute::NoInline)
+            } else {
+                None
+            }
+        }
+        InlineAttr::None => None,
+    }
+}
+
 /// Composite function which sets GCC attributes for function depending on its AST (`#[attribute]`)
 /// attributes.
 pub fn from_fn_attrs<'gcc, 'tcx>(
@@ -77,6 +99,23 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
 ) {
     let codegen_fn_attrs = cx.tcx.codegen_fn_attrs(instance.def_id());
 
+    #[cfg(feature="master")]
+    {
+        let inline =
+            if codegen_fn_attrs.flags.contains(CodegenFnAttrFlags::NAKED) {
+                InlineAttr::Never
+            }
+            else if codegen_fn_attrs.inline == InlineAttr::None && instance.def.requires_inline(cx.tcx) {
+                InlineAttr::Hint
+            }
+            else {
+                codegen_fn_attrs.inline
+            };
+        if let Some(attr) = inline_attr(cx, inline) {
+            func.add_attribute(attr);
+        }
+    }
+
     let function_features =
         codegen_fn_attrs.target_features.iter().map(|features| features.as_str()).collect::<Vec<&str>>();
 
diff --git a/src/lib.rs b/src/lib.rs
index 1b7feb5f8a18..3b26e248fc26 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -110,6 +110,8 @@ impl CodegenBackend for GccCodegenBackend {
     }
 
     fn init(&self, sess: &Session) {
+        #[cfg(feature="master")]
+        gccjit::set_global_personality_function_name(b"rust_eh_personality\0");
         if sess.lto() != Lto::No {
             sess.emit_warning(LTONotSupported {});
         }

From a512e98028bf830e1ebc0fa018d210801c86793c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 25 May 2023 09:17:59 -0400
Subject: [PATCH 321/997] Set visibility of global

---
 src/consts.rs | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index 792ab8f890d8..56513c29ce09 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -1,5 +1,5 @@
 #[cfg(feature = "master")]
-use gccjit::FnAttribute;
+use gccjit::{FnAttribute, VarAttribute, Visibility};
 use gccjit::{Function, GlobalKind, LValue, RValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{BaseTypeMethods, ConstMethods, DerivedTypeMethods, StaticMethods};
 use rustc_middle::span_bug;
@@ -249,7 +249,8 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             );
 
             if !self.tcx.is_reachable_non_generic(def_id) {
-                // TODO(antoyo): set visibility.
+                #[cfg(feature = "master")]
+                global.add_attribute(VarAttribute::Visibility(Visibility::Hidden));
             }
 
             global

From 2c6b9792955336ad25feb64cf040fd9be5dccb7c Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 2 Jun 2023 16:22:50 +0200
Subject: [PATCH 322/997] Regen intrinsics with latest LLVM version

---
 src/intrinsic/archs.rs | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 8cd8d1bfb429..3fc1dfdb4475 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -2967,10 +2967,6 @@ match name {
     "llvm.nvvm.clz.ll" => "__nvvm_clz_ll",
     "llvm.nvvm.cos.approx.f" => "__nvvm_cos_approx_f",
     "llvm.nvvm.cos.approx.ftz.f" => "__nvvm_cos_approx_ftz_f",
-    "llvm.nvvm.cp.async.ca.shared.global.16" => "__nvvm_cp_async_ca_shared_global_16",
-    "llvm.nvvm.cp.async.ca.shared.global.4" => "__nvvm_cp_async_ca_shared_global_4",
-    "llvm.nvvm.cp.async.ca.shared.global.8" => "__nvvm_cp_async_ca_shared_global_8",
-    "llvm.nvvm.cp.async.cg.shared.global.16" => "__nvvm_cp_async_cg_shared_global_16",
     "llvm.nvvm.cp.async.commit.group" => "__nvvm_cp_async_commit_group",
     "llvm.nvvm.cp.async.mbarrier.arrive" => "__nvvm_cp_async_mbarrier_arrive",
     "llvm.nvvm.cp.async.mbarrier.arrive.noinc" => "__nvvm_cp_async_mbarrier_arrive_noinc",

From 8c2b14f7088c31c442f1ebc5c0ad7d5e22011963 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 11 Jun 2023 11:41:06 -0400
Subject: [PATCH 323/997] Update to nightly-2023-06-11

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index 933ecd45baad..90f9a621077a 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2023-03-02"
+channel = "nightly-2023-06-11"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From c8376e4c78cfdc4d55b6c818fc888a6d62dc08fe Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 3 Jun 2023 09:04:12 -0400
Subject: [PATCH 324/997] Add usage of git subtree to readme

---
 Readme.md | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Readme.md b/Readme.md
index bb7419438925..593cd3f9bbf4 100644
--- a/Readme.md
+++ b/Readme.md
@@ -193,7 +193,7 @@ Using git-subtree with `rustc` requires a patched git to make it work.
 The PR that is needed is [here](https://github.com/gitgitgadget/git/pull/493).
 Use the following instructions to install it:
 
-```
+```bash
 git clone git@github.com:tqc/git.git
 cd git
 git checkout tqc/subtree
@@ -204,6 +204,12 @@ make
 cp git-subtree ~/bin
 ```
 
+Then, do a sync with this command:
+
+```bash
+PATH="$HOME/bin:$PATH" ~/bin/git-subtree push -P compiler/rustc_codegen_gcc/ ../rustc_codegen_gcc/ sync_branch_name
+```
+
 ### How to use [mem-trace](https://github.com/antoyo/mem-trace)
 
 `rustc` needs to be built without `jemalloc` so that `mem-trace` can overload `malloc` since `jemalloc` is linked statically, so a `LD_PRELOAD`-ed library won't a chance to intercept the calls to `malloc`.

From 94e5c2701228b6fc8d765136967ddc6d51dff6a9 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 3 Jun 2023 09:34:56 -0400
Subject: [PATCH 325/997] Update libgccjit and mini_core

---
 Cargo.lock           |  4 ++--
 example/mini_core.rs | 16 +++++++++++++++-
 2 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 0f2e152f8ce5..1c8754bf675e 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -35,7 +35,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#fe242b7eb26980e6c78859d51c8d4cc1e43381a3"
+source = "git+https://github.com/antoyo/gccjit.rs#d6e52626cfc6f487094a5d5ac66302baf3439984"
 dependencies = [
  "gccjit_sys",
 ]
@@ -43,7 +43,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#fe242b7eb26980e6c78859d51c8d4cc1e43381a3"
+source = "git+https://github.com/antoyo/gccjit.rs#d6e52626cfc6f487094a5d5ac66302baf3439984"
 dependencies = [
  "libc",
 ]
diff --git a/example/mini_core.rs b/example/mini_core.rs
index 637b8dc53fef..f0347db00cc2 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -451,6 +451,9 @@ pub unsafe fn drop_in_place<T: ?Sized>(to_drop: *mut T) {
     drop_in_place(to_drop);
 }
 
+#[lang = "unpin"]
+pub auto trait Unpin {}
+
 #[lang = "deref"]
 pub trait Deref {
     type Target: ?Sized;
@@ -486,7 +489,18 @@ impl<T: ?Sized, U: ?Sized> DispatchFromDyn<Unique<U>> for Unique<T> where T: Uns
 #[lang = "owned_box"]
 pub struct Box<T: ?Sized, A: Allocator = Global>(Unique<T>, A);
 
-impl<T: ?Sized + Unsize<U>, U: ?Sized, A: Allocator> CoerceUnsized<Box<U, A>> for Box<T, A> {}
+impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<Box<U>> for Box<T> {}
+
+impl<T> Box<T> {
+    pub fn new(val: T) -> Box<T> {
+        unsafe {
+            let size = intrinsics::size_of::<T>();
+            let ptr = libc::malloc(size);
+            intrinsics::copy(&val as *const T as *const u8, ptr, size);
+            Box(Unique { pointer: NonNull(ptr as *const T), _marker: PhantomData }, Global)
+        }
+    }
+}
 
 impl<T: ?Sized, A: Allocator> Drop for Box<T, A> {
     fn drop(&mut self) {

From 4115e09c13a975b42d506e2db6119d7c3ff1876e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 4 Jun 2023 13:14:55 -0400
Subject: [PATCH 326/997] Fix for opaque pointers

---
 Cargo.toml     |  2 +-
 src/builder.rs | 40 ++++++++++++++++++++++++++--------------
 src/type_of.rs |  6 +++---
 3 files changed, 30 insertions(+), 18 deletions(-)

diff --git a/Cargo.toml b/Cargo.toml
index 7285e3eaf519..81066d9ce1f0 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -25,7 +25,7 @@ master = ["gccjit/master"]
 gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
 
 # Local copy.
-# gccjit = { path = "../gccjit.rs" }
+#gccjit = { path = "../gccjit.rs" }
 
 smallvec = { version = "1.6.1", features = ["union", "may_dangle"] }
 
diff --git a/src/builder.rs b/src/builder.rs
index f9ea0f004564..d578a0df51d6 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -280,8 +280,17 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         }
     }
 
-    fn function_ptr_call(&mut self, func_ptr: RValue<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
-        let gcc_func = func_ptr.get_type().dyncast_function_ptr_type().expect("function ptr");
+    fn function_ptr_call(&mut self, typ: Type<'gcc>, mut func_ptr: RValue<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
+        let gcc_func =
+            match func_ptr.get_type().dyncast_function_ptr_type() {
+                Some(func) => func,
+                None => {
+                    // NOTE: due to opaque pointers now being used, we need to cast here.
+                    let new_func_type = typ.dyncast_function_ptr_type().expect("function ptr");
+                    func_ptr = self.context.new_cast(None, func_ptr, typ);
+                    new_func_type
+                },
+            };
         let func_name = format!("{:?}", func_ptr);
         let previous_arg_count = args.len();
         let orig_args = args;
@@ -424,16 +433,17 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.llbb().end_with_void_return(None)
     }
 
-    fn ret(&mut self, value: RValue<'gcc>) {
-        let value =
-            if self.structs_as_pointer.borrow().contains(&value) {
-                // NOTE: hack to workaround a limitation of the rustc API: see comment on
-                // CodegenCx.structs_as_pointer
-                value.dereference(None).to_rvalue()
-            }
-            else {
-                value
-            };
+    fn ret(&mut self, mut value: RValue<'gcc>) {
+        if self.structs_as_pointer.borrow().contains(&value) {
+            // NOTE: hack to workaround a limitation of the rustc API: see comment on
+            // CodegenCx.structs_as_pointer
+            value = value.dereference(None).to_rvalue();
+        }
+        let expected_return_type = self.current_func().get_return_type();
+        if !expected_return_type.is_compatible_with(value.get_type()) {
+            // NOTE: due to opaque pointers now being used, we need to cast here.
+            value = self.context.new_cast(None, value, expected_return_type);
+        }
         self.llbb().end_with_return(None, value);
     }
 
@@ -938,6 +948,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             element.get_address(None)
         }
         else if let Some(struct_type) = value_type.is_struct() {
+            // NOTE: due to opaque pointers now being used, we need to bitcast here.
+            let ptr = self.bitcast_if_needed(ptr, value_type.make_pointer());
             ptr.dereference_field(None, struct_type.get_field(idx as i32)).get_address(None)
         }
         else {
@@ -1356,7 +1368,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn call(
         &mut self,
-        _typ: Type<'gcc>,
+        typ: Type<'gcc>,
         _fn_attrs: Option<&CodegenFnAttrs>,
         fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>,
         func: RValue<'gcc>,
@@ -1370,7 +1382,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         }
         else {
             // If it's a not function that was defined, it's a function pointer.
-            self.function_ptr_call(func, args, funclet)
+            self.function_ptr_call(typ, func, args, funclet)
         };
         if let Some(_fn_abi) = fn_abi {
             // TODO(bjorn3): Apply function attributes
diff --git a/src/type_of.rs b/src/type_of.rs
index 30a3fe67b854..74f016cf90ae 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -383,8 +383,8 @@ impl<'gcc, 'tcx> LayoutTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         unimplemented!();
     }
 
-    fn fn_decl_backend_type(&self, _fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Type<'gcc> {
-        // FIXME(antoyo): return correct type.
-        self.type_void()
+    fn fn_decl_backend_type(&self, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Type<'gcc> {
+        let (return_type, param_types, variadic, _) = fn_abi.gcc_type(self);
+        self.context.new_function_pointer_type(None, return_type, &param_types, variadic)
     }
 }

From e74bc5113dac9f00b2eabcd1963d05e0f1a84ec2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 4 Jun 2023 18:21:44 -0400
Subject: [PATCH 327/997] Attempt to fix the tests

---
 build_sysroot/prepare_sysroot_src.sh |  8 ++++----
 src/intrinsic/simd.rs                |  9 +++++++--
 src/lib.rs                           |  2 ++
 test.sh                              | 15 ++++++++++++---
 4 files changed, 25 insertions(+), 9 deletions(-)

diff --git a/build_sysroot/prepare_sysroot_src.sh b/build_sysroot/prepare_sysroot_src.sh
index 56768bbf1d01..71b3876bac2c 100755
--- a/build_sysroot/prepare_sysroot_src.sh
+++ b/build_sysroot/prepare_sysroot_src.sh
@@ -29,10 +29,10 @@ git config user.name || git config user.name "None"
 
 git commit -m "Initial commit" -q
 for file in $(ls ../../patches/ | grep -v patcha); do
-echo "[GIT] apply" $file
-git apply ../../patches/$file
-git add -A
-git commit --no-gpg-sign -m "Patch $file"
+    echo "[GIT] apply" $file
+    git apply ../../patches/$file
+    git add -A
+    git commit --no-gpg-sign -m "Patch $file"
 done
 popd
 
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index b59c3a64f572..36b9c9b63641 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -165,10 +165,15 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             InvalidMonomorphizationReturnIntegerType { span, name, ret_ty, out_ty }
         );
 
+        let arg1 = args[0].immediate();
+        // NOTE: we get different vector types for the same vector type and libgccjit doesn't
+        // compare them as equal, so bitcast.
+        // FIXME(antoyo): allow comparing vector types as equal in libgccjit.
+        let arg2 = bx.context.new_bitcast(None, args[1].immediate(), arg1.get_type());
         return Ok(compare_simd_types(
             bx,
-            args[0].immediate(),
-            args[1].immediate(),
+            arg1,
+            arg2,
             in_elem,
             llret_ty,
             cmp_op,
diff --git a/src/lib.rs b/src/lib.rs
index 204741ca3c1b..3bf92c063022 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -1,3 +1,5 @@
+// FIXME: simple programs now segfault with a sysroot compile in release mode.
+
 /*
  * TODO(antoyo): implement equality in libgccjit based on https://zpz.github.io/blog/overloading-equality-operator-in-cpp-class-hierarchy/ (for type equality?)
  * TODO(antoyo): support #[inline] attributes.
diff --git a/test.sh b/test.sh
index 6139892aefca..c62c49cef994 100755
--- a/test.sh
+++ b/test.sh
@@ -214,12 +214,14 @@ function setup_rustc() {
     rm config.toml || true
 
     cat > config.toml <<EOF
+changelog-seen = 2
+
 [rust]
 codegen-backends = []
 deny-warnings = false
 
 [build]
-cargo = "$(which cargo)"
+cargo = "$(rustup which cargo)"
 local-rebuild = true
 rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
 
@@ -237,7 +239,7 @@ EOF
 function asm_tests() {
     setup_rustc
 
-    echo "[TEST] rustc test suite"
+    echo "[TEST] rustc asm test suite"
     RUSTC_ARGS="-Zpanic-abort-tests -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot -Cpanic=abort"
     COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/assembly/asm --rustc-args "$RUSTC_ARGS"
 }
@@ -351,7 +353,14 @@ function test_rustc() {
     git checkout tests/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
     git checkout tests/ui/macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs
 
-    RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot"
+    # We need to overwrite the sysroot in the tests, now.
+    # TODO(antoyo): find a faster way to do this.
+    # FIXME: this makes the stderr different since it changes the line numbers.
+    for file in $(find tests/ui -type f -name '*.rs'); do
+        sed -ie "1i // compile-flags: --sysroot "$(pwd)"/../build_sysroot/sysroot\n" $file
+    done
+
+    RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext""
 
     if [ $# -eq 0 ]; then
         # No argument supplied to the function. Doing nothing.

From 6f858a2b0f25a14709761853c8ce44b3c06d7f9c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 8 Jun 2023 20:51:29 -0400
Subject: [PATCH 328/997] Add missing cast to fix another issue caused by
 opaque pointers

---
 src/builder.rs | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/builder.rs b/src/builder.rs
index d578a0df51d6..f2775421ccd0 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -919,7 +919,9 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.context.new_bitcast(None, result, ptr_type)
     }
 
-    fn inbounds_gep(&mut self, _typ: Type<'gcc>, ptr: RValue<'gcc>, indices: &[RValue<'gcc>]) -> RValue<'gcc> {
+    fn inbounds_gep(&mut self, typ: Type<'gcc>, ptr: RValue<'gcc>, indices: &[RValue<'gcc>]) -> RValue<'gcc> {
+        // NOTE: due to opaque pointers now being used, we need to cast here.
+        let ptr = self.context.new_cast(None, ptr, typ.make_pointer());
         // NOTE: array indexing is always considered in bounds in GCC (TODO(antoyo): to be verified).
         let mut indices = indices.into_iter();
         let index = indices.next().expect("first index in inbounds_gep");

From 984b9c52ccc0d493d2215167ecb03d76e9cb30ec Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 9 Jun 2023 10:00:50 -0400
Subject: [PATCH 329/997] Improve sync instructions

---
 Readme.md | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/Readme.md b/Readme.md
index 593cd3f9bbf4..a93637d9038d 100644
--- a/Readme.md
+++ b/Readme.md
@@ -208,8 +208,17 @@ Then, do a sync with this command:
 
 ```bash
 PATH="$HOME/bin:$PATH" ~/bin/git-subtree push -P compiler/rustc_codegen_gcc/ ../rustc_codegen_gcc/ sync_branch_name
+cd ../rustc_codegen_gcc
+git checkout master
+git pull
+git checkout sync_branch_name
+git merge master
 ```
 
+TODO: write a script that does the above.
+
+https://rust-lang.zulipchat.com/#narrow/stream/301329-t-devtools/topic/subtree.20madness/near/258877725
+
 ### How to use [mem-trace](https://github.com/antoyo/mem-trace)
 
 `rustc` needs to be built without `jemalloc` so that `mem-trace` can overload `malloc` since `jemalloc` is linked statically, so a `LD_PRELOAD`-ed library won't a chance to intercept the calls to `malloc`.

From e9708ebcefe398d5d8669e80260a4c73415ddc1d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 10 Jun 2023 14:08:33 -0400
Subject: [PATCH 330/997] Add note

---
 test.sh | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/test.sh b/test.sh
index c62c49cef994..7c8fe55da14e 100755
--- a/test.sh
+++ b/test.sh
@@ -356,11 +356,12 @@ function test_rustc() {
     # We need to overwrite the sysroot in the tests, now.
     # TODO(antoyo): find a faster way to do this.
     # FIXME: this makes the stderr different since it changes the line numbers.
-    for file in $(find tests/ui -type f -name '*.rs'); do
-        sed -ie "1i // compile-flags: --sysroot "$(pwd)"/../build_sysroot/sysroot\n" $file
-    done
+    #for file in $(find tests/ui -type f -name '*.rs'); do
+        #sed -ie "1i // compile-flags: --sysroot "$(pwd)"/../build_sysroot/sysroot\n" $file
+    #done
 
-    RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext""
+    # TODO: copy the sysroot at the correct location to not have to use the --sysroot flag.
+    RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot"
 
     if [ $# -eq 0 ]; then
         # No argument supplied to the function. Doing nothing.

From a0edbfb2d3f163f899156a2f2050b227463ba659 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 11 Jun 2023 11:35:35 -0400
Subject: [PATCH 331/997] Test to fix UI tests

---
 test.sh | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/test.sh b/test.sh
index 7c8fe55da14e..5c5c26699b09 100755
--- a/test.sh
+++ b/test.sh
@@ -213,6 +213,13 @@ function setup_rustc() {
 
     rm config.toml || true
 
+    # TODO: copy in build_sysroot/build_sysroot.sh instead to avoid having to rebuild stage0 libraries everytime?
+    my_toolchain_dir=$HOME/.rustup/toolchains/my_toolchain
+    rm -rf $my_toolchain_dir
+    cp -r $HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE $my_toolchain_dir
+    rm -rf $my_toolchain_dir/lib/rustlib/x86_64-unknown-linux-gnu/
+    cp -r ../build_sysroot/sysroot/* $my_toolchain_dir
+
     cat > config.toml <<EOF
 changelog-seen = 2
 
@@ -221,9 +228,11 @@ codegen-backends = []
 deny-warnings = false
 
 [build]
-cargo = "$(rustup which cargo)"
+cargo = "$my_toolchain_dir/bin/cargo"
+#cargo = "$(rustup which cargo)"
 local-rebuild = true
-rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
+rustc = "$my_toolchain_dir/bin/rustc"
+#rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
 
 [target.x86_64-unknown-linux-gnu]
 llvm-filecheck = "`which FileCheck-10 || which FileCheck-11 || which FileCheck-12 || which FileCheck-13 || which FileCheck-14`"
@@ -361,7 +370,9 @@ function test_rustc() {
     #done
 
     # TODO: copy the sysroot at the correct location to not have to use the --sysroot flag.
-    RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot"
+    #RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext""
+    RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot $HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
+
 
     if [ $# -eq 0 ]; then
         # No argument supplied to the function. Doing nothing.
@@ -393,7 +404,8 @@ function test_rustc() {
     fi
 
     echo "[TEST] rustc test suite"
-    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/ui/ --rustc-args "$RUSTC_ARGS"
+    #COMPILETEST_FORCE_STAGE0=1 strace -f ./x.py test --run always --stage 0 tests/ui/ --rustc-args "$RUSTC_ARGS" &> ../trace
+    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/ui/zero-sized/zero-sized-linkedlist-push.rs --rustc-args "$RUSTC_ARGS"
 }
 
 function test_failing_rustc() {

From 90527b81c9c767adfef2c895fb8b776eb3ac3212 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 11 Jun 2023 16:04:00 -0400
Subject: [PATCH 332/997] Some fixes and cleanups

---
 rust-toolchain |  2 +-
 src/lib.rs     |  2 +-
 test.sh        | 17 ++++-------------
 3 files changed, 6 insertions(+), 15 deletions(-)

diff --git a/rust-toolchain b/rust-toolchain
index 90f9a621077a..2614fa081a86 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2023-06-11"
+channel = "nightly-2023-06-10"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
diff --git a/src/lib.rs b/src/lib.rs
index 3bf92c063022..7a89a449b692 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -79,7 +79,7 @@ use rustc_codegen_ssa::target_features::supported_target_features;
 use rustc_codegen_ssa::traits::{CodegenBackend, ExtraBackendMethods, ModuleBufferMethods, ThinBufferMethods, WriteBackendMethods};
 use rustc_data_structures::fx::FxIndexMap;
 use rustc_errors::{DiagnosticMessage, ErrorGuaranteed, Handler, SubdiagnosticMessage};
-use rustc_macros::fluent_messages;
+use rustc_fluent_macro::fluent_messages;
 use rustc_metadata::EncodedMetadata;
 use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
 use rustc_middle::query::Providers;
diff --git a/test.sh b/test.sh
index 5c5c26699b09..7c68e00771d6 100755
--- a/test.sh
+++ b/test.sh
@@ -213,7 +213,8 @@ function setup_rustc() {
 
     rm config.toml || true
 
-    # TODO: copy in build_sysroot/build_sysroot.sh instead to avoid having to rebuild stage0 libraries everytime?
+    # TODO: move these lines to build_sysroot/build_sysroot.sh instead to avoid having to rebuild stage0 libraries everytime?
+    # Since we can't override the sysroot anymore, we create a new toolchain and manually overwrite the sysroot directory.
     my_toolchain_dir=$HOME/.rustup/toolchains/my_toolchain
     rm -rf $my_toolchain_dir
     cp -r $HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE $my_toolchain_dir
@@ -362,16 +363,7 @@ function test_rustc() {
     git checkout tests/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
     git checkout tests/ui/macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs
 
-    # We need to overwrite the sysroot in the tests, now.
-    # TODO(antoyo): find a faster way to do this.
-    # FIXME: this makes the stderr different since it changes the line numbers.
-    #for file in $(find tests/ui -type f -name '*.rs'); do
-        #sed -ie "1i // compile-flags: --sysroot "$(pwd)"/../build_sysroot/sysroot\n" $file
-    #done
-
-    # TODO: copy the sysroot at the correct location to not have to use the --sysroot flag.
-    #RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext""
-    RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot $HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
+    RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext""
 
 
     if [ $# -eq 0 ]; then
@@ -404,8 +396,7 @@ function test_rustc() {
     fi
 
     echo "[TEST] rustc test suite"
-    #COMPILETEST_FORCE_STAGE0=1 strace -f ./x.py test --run always --stage 0 tests/ui/ --rustc-args "$RUSTC_ARGS" &> ../trace
-    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/ui/zero-sized/zero-sized-linkedlist-push.rs --rustc-args "$RUSTC_ARGS"
+    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/ui --rustc-args "$RUSTC_ARGS"
 }
 
 function test_failing_rustc() {

From 3371fce044f1f4aafe258d21f3e03774d30a1cab Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 11 Jun 2023 18:21:00 -0400
Subject: [PATCH 333/997] Fix tests

---
 failing-ui-tests.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 8539e27ea6a5..1b0e30c920a5 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -54,8 +54,8 @@ tests/ui/issues/issue-40883.rs
 tests/ui/issues/issue-43853.rs
 tests/ui/issues/issue-47364.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
-tests/ui/rfc-2091-track-caller/std-panic-locations.rs
-tests/ui/rfcs/rfc1857-drop-order.rs
+tests/ui/rfcs/rfc-2091-track-caller/std-panic-locations.rs
+tests/ui/rfcs/rfc-1857-stabilize-drop-order/drop-order.rs
 tests/ui/simd/issue-17170.rs
 tests/ui/simd/issue-39720.rs
 tests/ui/simd/issue-89193.rs

From ef037e6d30b21363c48c47045b325a780fdde6d3 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 11 Jun 2023 19:27:39 -0400
Subject: [PATCH 334/997] Fix tests

---
 build_sysroot/Cargo.toml | 1 +
 failing-ui-tests.txt     | 2 ++
 src/declare.rs           | 2 +-
 test.sh                  | 2 ++
 4 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/build_sysroot/Cargo.toml b/build_sysroot/Cargo.toml
index cfadf47cc3f8..a84f86a82189 100644
--- a/build_sysroot/Cargo.toml
+++ b/build_sysroot/Cargo.toml
@@ -9,6 +9,7 @@ compiler_builtins = "0.1"
 alloc = { path = "./sysroot_src/library/alloc" }
 std = { path = "./sysroot_src/library/std", features = ["panic_unwind", "backtrace"] }
 test = { path = "./sysroot_src/library/test" }
+proc_macro = { path = "./sysroot_src/library/proc_macro" }
 
 [patch.crates-io]
 rustc-std-workspace-core = { path = "./sysroot_src/library/rustc-std-workspace-core" }
diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 1b0e30c920a5..801464daae9a 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -66,3 +66,5 @@ tests/ui/generator/panic-safe.rs
 tests/ui/issues/issue-14875.rs
 tests/ui/issues/issue-29948.rs
 tests/ui/panic-while-printing.rs
+tests/ui/enum-discriminant/get_discr.rs
+tests/ui/panics/nested_panic_caught.rs
diff --git a/src/declare.rs b/src/declare.rs
index 4748e7e4be2a..493626c3cf5d 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -132,7 +132,7 @@ fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*ll
 pub fn mangle_name(name: &str) -> String {
     name.replace(|char: char| {
         if !char.is_alphanumeric() && char != '_' {
-            debug_assert!("$.".contains(char), "Unsupported char in function name: {}", char);
+            debug_assert!("$.*".contains(char), "Unsupported char in function name {}: {}", name, char);
             true
         }
         else {
diff --git a/test.sh b/test.sh
index 7c68e00771d6..72753e1d4666 100755
--- a/test.sh
+++ b/test.sh
@@ -350,6 +350,8 @@ function test_rustc() {
     for test in $(rg -i --files-with-matches "//(\[\w+\])?~|// error-pattern:|// build-fail|// run-fail|-Cllvm-args" tests/ui); do
       rm $test
     done
+    rm tests/ui/consts/const_cmp_type_id.rs
+    rm tests/ui/consts/issue-73976-monomorphic.rs
 
     git checkout -- tests/ui/issues/auxiliary/issue-3136-a.rs # contains //~ERROR, but shouldn't be removed
 

From 8bba64673c4fa7b19524efa563ae6233e0bda217 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 11 Jun 2023 20:01:24 -0400
Subject: [PATCH 335/997] Cleanup

---
 build_sysroot/build_sysroot.sh | 8 ++++++++
 src/lib.rs                     | 2 --
 test.sh                        | 8 --------
 3 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/build_sysroot/build_sysroot.sh b/build_sysroot/build_sysroot.sh
index 9d692d599f6b..dc80e4fff806 100755
--- a/build_sysroot/build_sysroot.sh
+++ b/build_sysroot/build_sysroot.sh
@@ -28,3 +28,11 @@ fi
 # Copy files to sysroot
 mkdir -p sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
 cp -r target/$TARGET_TRIPLE/$sysroot_channel/deps/* sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
+
+# Since we can't override the sysroot for the UI tests anymore, we create a new toolchain and manually overwrite the sysroot directory.
+my_toolchain_dir=$HOME/.rustup/toolchains/my_toolchain
+rm -rf $my_toolchain_dir
+rust_toolchain=$(cat ../rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
+cp -r $HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE $my_toolchain_dir
+rm -rf $my_toolchain_dir/lib/rustlib/$TARGET_TRIPLE/
+cp -r ../build_sysroot/sysroot/* $my_toolchain_dir
diff --git a/src/lib.rs b/src/lib.rs
index 7a89a449b692..2a6b642782df 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -1,5 +1,3 @@
-// FIXME: simple programs now segfault with a sysroot compile in release mode.
-
 /*
  * TODO(antoyo): implement equality in libgccjit based on https://zpz.github.io/blog/overloading-equality-operator-in-cpp-class-hierarchy/ (for type equality?)
  * TODO(antoyo): support #[inline] attributes.
diff --git a/test.sh b/test.sh
index 72753e1d4666..a6e87fca1623 100755
--- a/test.sh
+++ b/test.sh
@@ -213,13 +213,7 @@ function setup_rustc() {
 
     rm config.toml || true
 
-    # TODO: move these lines to build_sysroot/build_sysroot.sh instead to avoid having to rebuild stage0 libraries everytime?
-    # Since we can't override the sysroot anymore, we create a new toolchain and manually overwrite the sysroot directory.
     my_toolchain_dir=$HOME/.rustup/toolchains/my_toolchain
-    rm -rf $my_toolchain_dir
-    cp -r $HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE $my_toolchain_dir
-    rm -rf $my_toolchain_dir/lib/rustlib/x86_64-unknown-linux-gnu/
-    cp -r ../build_sysroot/sysroot/* $my_toolchain_dir
 
     cat > config.toml <<EOF
 changelog-seen = 2
@@ -230,10 +224,8 @@ deny-warnings = false
 
 [build]
 cargo = "$my_toolchain_dir/bin/cargo"
-#cargo = "$(rustup which cargo)"
 local-rebuild = true
 rustc = "$my_toolchain_dir/bin/rustc"
-#rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
 
 [target.x86_64-unknown-linux-gnu]
 llvm-filecheck = "`which FileCheck-10 || which FileCheck-11 || which FileCheck-12 || which FileCheck-13 || which FileCheck-14`"

From 9483008d71851eb9009d652f34c8dca4615cb737 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 12 Jun 2023 20:51:29 -0400
Subject: [PATCH 336/997] Tests for the CI

---
 build_sysroot/build_sysroot.sh | 2 +-
 test.sh                        | 4 +++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/build_sysroot/build_sysroot.sh b/build_sysroot/build_sysroot.sh
index dc80e4fff806..063219aabd27 100755
--- a/build_sysroot/build_sysroot.sh
+++ b/build_sysroot/build_sysroot.sh
@@ -30,7 +30,7 @@ mkdir -p sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
 cp -r target/$TARGET_TRIPLE/$sysroot_channel/deps/* sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
 
 # Since we can't override the sysroot for the UI tests anymore, we create a new toolchain and manually overwrite the sysroot directory.
-my_toolchain_dir=$HOME/.rustup/toolchains/my_toolchain
+my_toolchain_dir=$HOME/.rustup/toolchains/codegen_gcc_ui_tests
 rm -rf $my_toolchain_dir
 rust_toolchain=$(cat ../rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
 cp -r $HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE $my_toolchain_dir
diff --git a/test.sh b/test.sh
index a6e87fca1623..6213ed49183c 100755
--- a/test.sh
+++ b/test.sh
@@ -213,7 +213,7 @@ function setup_rustc() {
 
     rm config.toml || true
 
-    my_toolchain_dir=$HOME/.rustup/toolchains/my_toolchain
+    my_toolchain_dir=$HOME/.rustup/toolchains/codegen_gcc_ui_tests
 
     cat > config.toml <<EOF
 changelog-seen = 2
@@ -224,8 +224,10 @@ deny-warnings = false
 
 [build]
 cargo = "$my_toolchain_dir/bin/cargo"
+#cargo = "$(rustup which cargo)"
 local-rebuild = true
 rustc = "$my_toolchain_dir/bin/rustc"
+#rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
 
 [target.x86_64-unknown-linux-gnu]
 llvm-filecheck = "`which FileCheck-10 || which FileCheck-11 || which FileCheck-12 || which FileCheck-13 || which FileCheck-14`"

From 218575a8aebbe0aedcf127954644db24724a8e2f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 15 Jun 2023 20:45:20 -0400
Subject: [PATCH 337/997] Working, but requires a patched rustc

---
 build_sysroot/build_sysroot.sh |  4 ++--
 test.sh                        | 15 +++++++++------
 2 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/build_sysroot/build_sysroot.sh b/build_sysroot/build_sysroot.sh
index 063219aabd27..6aea9b94b48e 100755
--- a/build_sysroot/build_sysroot.sh
+++ b/build_sysroot/build_sysroot.sh
@@ -30,9 +30,9 @@ mkdir -p sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
 cp -r target/$TARGET_TRIPLE/$sysroot_channel/deps/* sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
 
 # Since we can't override the sysroot for the UI tests anymore, we create a new toolchain and manually overwrite the sysroot directory.
-my_toolchain_dir=$HOME/.rustup/toolchains/codegen_gcc_ui_tests
-rm -rf $my_toolchain_dir
 rust_toolchain=$(cat ../rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
+my_toolchain_dir=$HOME/.rustup/toolchains/codegen_gcc_ui_tests-$rust_toolchain-$TARGET_TRIPLE
+rm -rf $my_toolchain_dir
 cp -r $HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE $my_toolchain_dir
 rm -rf $my_toolchain_dir/lib/rustlib/$TARGET_TRIPLE/
 cp -r ../build_sysroot/sysroot/* $my_toolchain_dir
diff --git a/test.sh b/test.sh
index 6213ed49183c..2e485b927393 100755
--- a/test.sh
+++ b/test.sh
@@ -209,11 +209,12 @@ function setup_rustc() {
     cd rust
     git fetch
     git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(')
+    git am ../0001-Allow-overwriting-the-sysroot-compile-flag-via-rustc.patch
     export RUSTFLAGS=
 
     rm config.toml || true
 
-    my_toolchain_dir=$HOME/.rustup/toolchains/codegen_gcc_ui_tests
+    my_toolchain_dir=$HOME/.rustup/toolchains/codegen_gcc_ui_tests-$rust_toolchain-$TARGET_TRIPLE
 
     cat > config.toml <<EOF
 changelog-seen = 2
@@ -222,12 +223,13 @@ changelog-seen = 2
 codegen-backends = []
 deny-warnings = false
 
+# FIXME: it works with the original rustc and cargo.
 [build]
-cargo = "$my_toolchain_dir/bin/cargo"
-#cargo = "$(rustup which cargo)"
+#cargo = "$my_toolchain_dir/bin/cargo"
+cargo = "$(rustup which cargo)"
 local-rebuild = true
-rustc = "$my_toolchain_dir/bin/rustc"
-#rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
+#rustc = "$my_toolchain_dir/bin/rustc"
+rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
 
 [target.x86_64-unknown-linux-gnu]
 llvm-filecheck = "`which FileCheck-10 || which FileCheck-11 || which FileCheck-12 || which FileCheck-13 || which FileCheck-14`"
@@ -359,7 +361,7 @@ function test_rustc() {
     git checkout tests/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
     git checkout tests/ui/macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs
 
-    RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext""
+    RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot"
 
 
     if [ $# -eq 0 ]; then
@@ -392,6 +394,7 @@ function test_rustc() {
     fi
 
     echo "[TEST] rustc test suite"
+    # FIXME: the problem seems like an ABI incompatibility between cg_gcc sysroot and cg_llvm.
     COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/ui --rustc-args "$RUSTC_ARGS"
 }
 

From 45bca0052098ee2005857dcdeeed9fe00d554a51 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 15 Jun 2023 20:51:29 -0400
Subject: [PATCH 338/997] Handle alignment of the load instruction

---
 src/builder.rs        | 19 ++++++++++++++-----
 src/intrinsic/simd.rs |  9 ++++++---
 2 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index f2775421ccd0..bb23524d8af4 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -729,17 +729,25 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         unimplemented!();
     }
 
-    fn load(&mut self, pointee_ty: Type<'gcc>, ptr: RValue<'gcc>, _align: Align) -> RValue<'gcc> {
+    fn load(&mut self, pointee_ty: Type<'gcc>, ptr: RValue<'gcc>, align: Align) -> RValue<'gcc> {
         let block = self.llbb();
         let function = block.get_function();
         // NOTE: instead of returning the dereference here, we have to assign it to a variable in
         // the current basic block. Otherwise, it could be used in another basic block, causing a
         // dereference after a drop, for instance.
-        // TODO(antoyo): handle align of the load instruction.
-        let ptr = self.context.new_cast(None, ptr, pointee_ty.make_pointer());
+        // FIXME(antoyo): this check that we don't call get_aligned() a second time on a type.
+        // Ideally, we shouldn't need to do this check.
+        let aligned_type =
+            if pointee_ty == self.cx.u128_type || pointee_ty == self.cx.i128_type {
+                pointee_ty
+            }
+            else {
+                pointee_ty.get_aligned(align.bytes())
+            };
+        let ptr = self.context.new_cast(None, ptr, aligned_type.make_pointer());
         let deref = ptr.dereference(None).to_rvalue();
         unsafe { RETURN_VALUE_COUNT += 1 };
-        let loaded_value = function.new_local(None, pointee_ty, &format!("loadedValue{}", unsafe { RETURN_VALUE_COUNT }));
+        let loaded_value = function.new_local(None, aligned_type, &format!("loadedValue{}", unsafe { RETURN_VALUE_COUNT }));
         block.add_assignment(None, loaded_value, deref);
         loaded_value.to_rvalue()
     }
@@ -1857,7 +1865,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         #[cfg(feature="master")]
         let (cond, element_type) = {
-            let then_val_vector_type = then_val.get_type().dyncast_vector().expect("vector type");
+            // TODO(antoyo): dyncast_vector should not require a call to unqualified.
+            let then_val_vector_type = then_val.get_type().unqualified().dyncast_vector().expect("vector type");
             let then_val_element_type = then_val_vector_type.get_element_type();
             let then_val_element_size = then_val_element_type.get_size();
 
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 36b9c9b63641..9115cf971196 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -346,7 +346,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         // endian and MSB-first for big endian.
 
         let vector = args[0].immediate();
-        let vector_type = vector.get_type().dyncast_vector().expect("vector type");
+        // TODO(antoyo): dyncast_vector should not require a call to unqualified.
+        let vector_type = vector.get_type().unqualified().dyncast_vector().expect("vector type");
         let elem_type = vector_type.get_element_type();
 
         let expected_int_bits = in_len.max(8);
@@ -853,7 +854,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                 (true, true) => {
                     // Algorithm from: https://codereview.stackexchange.com/questions/115869/saturated-signed-addition
                     // TODO(antoyo): improve using conditional operators if possible.
-                    let arg_type = lhs.get_type();
+                    // TODO(antoyo): dyncast_vector should not require a call to unqualified.
+                    let arg_type = lhs.get_type().unqualified();
                     // TODO(antoyo): convert lhs and rhs to unsigned.
                     let sum = lhs + rhs;
                     let vector_type = arg_type.dyncast_vector().expect("vector type");
@@ -883,7 +885,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                     res & cmp
                 },
                 (true, false) => {
-                    let arg_type = lhs.get_type();
+                    // TODO(antoyo): dyncast_vector should not require a call to unqualified.
+                    let arg_type = lhs.get_type().unqualified();
                     // TODO(antoyo): this uses the same algorithm from saturating add, but add the
                     // negative of the right operand. Find a proper subtraction algorithm.
                     let rhs = bx.context.new_unary_op(None, UnaryOp::Minus, arg_type, rhs);

From 8560b07ebfe177049a3790f4452196250b1cfb06 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 15 Jun 2023 20:52:45 -0400
Subject: [PATCH 339/997] TO REVERT: temporarily add a patch for rustc

---
 ...g-the-sysroot-compile-flag-via-rustc.patch | 27 +++++++++++++++++++
 1 file changed, 27 insertions(+)
 create mode 100644 0001-Allow-overwriting-the-sysroot-compile-flag-via-rustc.patch

diff --git a/0001-Allow-overwriting-the-sysroot-compile-flag-via-rustc.patch b/0001-Allow-overwriting-the-sysroot-compile-flag-via-rustc.patch
new file mode 100644
index 000000000000..f7860bd9105b
--- /dev/null
+++ b/0001-Allow-overwriting-the-sysroot-compile-flag-via-rustc.patch
@@ -0,0 +1,27 @@
+From 8d5e85607d3d52f920990334ae1cfa9798ad9259 Mon Sep 17 00:00:00 2001
+From: Antoni Boucher <bouanto@zoho.com>
+Date: Thu, 8 Jun 2023 17:27:34 -0400
+Subject: [PATCH] Allow overwriting the sysroot compile flag via --rustc-args
+
+---
+ src/tools/compiletest/src/runtest.rs | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/src/tools/compiletest/src/runtest.rs b/src/tools/compiletest/src/runtest.rs
+index 6582b534488..d16a7d66154 100644
+--- a/src/tools/compiletest/src/runtest.rs
++++ b/src/tools/compiletest/src/runtest.rs
+@@ -1951,7 +1951,9 @@ fn make_compile_args(
+         rustc.arg("-Ztranslate-remapped-path-to-local-path=no");
+ 
+         // Optionally prevent default --sysroot if specified in test compile-flags.
+-        if !self.props.compile_flags.iter().any(|flag| flag.starts_with("--sysroot")) {
++        if !self.props.compile_flags.iter().any(|flag| flag.starts_with("--sysroot"))
++            && !self.config.host_rustcflags.iter().any(|flag| flag == "--sysroot")
++        {
+             // In stage 0, make sure we use `stage0-sysroot` instead of the bootstrap sysroot.
+             rustc.arg("--sysroot").arg(&self.config.sysroot_base);
+         }
+-- 
+2.41.0
+

From 3d7ec5923d2e4373a354e7aec879e09e48f21517 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 17 Jun 2023 13:19:41 -0400
Subject: [PATCH 340/997] Fix for check_ptr_call for variadic functions

---
 build_sysroot/build_sysroot.sh | 13 +++++++------
 src/builder.rs                 |  9 ++++++++-
 2 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/build_sysroot/build_sysroot.sh b/build_sysroot/build_sysroot.sh
index 6aea9b94b48e..7f2c8d6121d6 100755
--- a/build_sysroot/build_sysroot.sh
+++ b/build_sysroot/build_sysroot.sh
@@ -30,9 +30,10 @@ mkdir -p sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
 cp -r target/$TARGET_TRIPLE/$sysroot_channel/deps/* sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
 
 # Since we can't override the sysroot for the UI tests anymore, we create a new toolchain and manually overwrite the sysroot directory.
-rust_toolchain=$(cat ../rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
-my_toolchain_dir=$HOME/.rustup/toolchains/codegen_gcc_ui_tests-$rust_toolchain-$TARGET_TRIPLE
-rm -rf $my_toolchain_dir
-cp -r $HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE $my_toolchain_dir
-rm -rf $my_toolchain_dir/lib/rustlib/$TARGET_TRIPLE/
-cp -r ../build_sysroot/sysroot/* $my_toolchain_dir
+# TODO: to remove.
+#rust_toolchain=$(cat ../rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
+#my_toolchain_dir=$HOME/.rustup/toolchains/codegen_gcc_ui_tests-$rust_toolchain-$TARGET_TRIPLE
+#rm -rf $my_toolchain_dir
+#cp -r $HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE $my_toolchain_dir
+#rm -rf $my_toolchain_dir/lib/rustlib/$TARGET_TRIPLE/
+#cp -r ../build_sysroot/sysroot/* $my_toolchain_dir
diff --git a/src/builder.rs b/src/builder.rs
index bb23524d8af4..43d0aafbd50b 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -181,6 +181,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             })
             .collect();
 
+        debug_assert_eq!(casted_args.len(), args.len());
+
         Cow::Owned(casted_args)
     }
 
@@ -207,7 +209,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         let func_name = format!("{:?}", func_ptr);
 
-        let casted_args: Vec<_> = param_types
+        let mut casted_args: Vec<_> = param_types
             .into_iter()
             .zip(args.iter())
             .enumerate()
@@ -237,6 +239,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             })
             .collect();
 
+        // NOTE: to take into account variadic functions.
+        for i in casted_args.len()..args.len() {
+            casted_args.push(args[i]);
+        }
+
         Cow::Owned(casted_args)
     }
 

From 607cbfda14ab8a4292d34afdffdf817f81fe95ab Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 18 Jun 2023 19:40:12 -0400
Subject: [PATCH 341/997] Cleanup and update to rustc 2023-06-19

---
 ...g-the-sysroot-compile-flag-via-rustc.patch | 27 ----------
 build_sysroot/build_sysroot.sh                |  9 ----
 example/mini_core.rs                          | 10 ++--
 patches/0023-core-Ignore-failing-tests.patch  | 49 -------------------
 rust-toolchain                                |  2 +-
 src/common.rs                                 |  4 ++
 test.sh                                       |  7 ---
 7 files changed, 9 insertions(+), 99 deletions(-)
 delete mode 100644 0001-Allow-overwriting-the-sysroot-compile-flag-via-rustc.patch
 delete mode 100644 patches/0023-core-Ignore-failing-tests.patch

diff --git a/0001-Allow-overwriting-the-sysroot-compile-flag-via-rustc.patch b/0001-Allow-overwriting-the-sysroot-compile-flag-via-rustc.patch
deleted file mode 100644
index f7860bd9105b..000000000000
--- a/0001-Allow-overwriting-the-sysroot-compile-flag-via-rustc.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 8d5e85607d3d52f920990334ae1cfa9798ad9259 Mon Sep 17 00:00:00 2001
-From: Antoni Boucher <bouanto@zoho.com>
-Date: Thu, 8 Jun 2023 17:27:34 -0400
-Subject: [PATCH] Allow overwriting the sysroot compile flag via --rustc-args
-
----
- src/tools/compiletest/src/runtest.rs | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/src/tools/compiletest/src/runtest.rs b/src/tools/compiletest/src/runtest.rs
-index 6582b534488..d16a7d66154 100644
---- a/src/tools/compiletest/src/runtest.rs
-+++ b/src/tools/compiletest/src/runtest.rs
-@@ -1951,7 +1951,9 @@ fn make_compile_args(
-         rustc.arg("-Ztranslate-remapped-path-to-local-path=no");
- 
-         // Optionally prevent default --sysroot if specified in test compile-flags.
--        if !self.props.compile_flags.iter().any(|flag| flag.starts_with("--sysroot")) {
-+        if !self.props.compile_flags.iter().any(|flag| flag.starts_with("--sysroot"))
-+            && !self.config.host_rustcflags.iter().any(|flag| flag == "--sysroot")
-+        {
-             // In stage 0, make sure we use `stage0-sysroot` instead of the bootstrap sysroot.
-             rustc.arg("--sysroot").arg(&self.config.sysroot_base);
-         }
--- 
-2.41.0
-
diff --git a/build_sysroot/build_sysroot.sh b/build_sysroot/build_sysroot.sh
index 7f2c8d6121d6..9d692d599f6b 100755
--- a/build_sysroot/build_sysroot.sh
+++ b/build_sysroot/build_sysroot.sh
@@ -28,12 +28,3 @@ fi
 # Copy files to sysroot
 mkdir -p sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
 cp -r target/$TARGET_TRIPLE/$sysroot_channel/deps/* sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
-
-# Since we can't override the sysroot for the UI tests anymore, we create a new toolchain and manually overwrite the sysroot directory.
-# TODO: to remove.
-#rust_toolchain=$(cat ../rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
-#my_toolchain_dir=$HOME/.rustup/toolchains/codegen_gcc_ui_tests-$rust_toolchain-$TARGET_TRIPLE
-#rm -rf $my_toolchain_dir
-#cp -r $HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE $my_toolchain_dir
-#rm -rf $my_toolchain_dir/lib/rustlib/$TARGET_TRIPLE/
-#cp -r ../build_sysroot/sysroot/* $my_toolchain_dir
diff --git a/example/mini_core.rs b/example/mini_core.rs
index 835419efc3a0..0cd7e6047c20 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -504,7 +504,10 @@ impl<T> Box<T> {
 
 impl<T: ?Sized, A: Allocator> Drop for Box<T, A> {
     fn drop(&mut self) {
-        // drop is currently performed by compiler.
+        // inner value is dropped by compiler.
+        unsafe {
+            libc::free(self.0.pointer.0 as *mut u8);
+        }
     }
 }
 
@@ -521,11 +524,6 @@ unsafe fn allocate(size: usize, _align: usize) -> *mut u8 {
     libc::malloc(size)
 }
 
-#[lang = "box_free"]
-unsafe fn box_free<T: ?Sized>(ptr: Unique<T>, _alloc: ()) {
-    libc::free(ptr.pointer.0 as *mut u8);
-}
-
 #[lang = "drop"]
 pub trait Drop {
     fn drop(&mut self);
diff --git a/patches/0023-core-Ignore-failing-tests.patch b/patches/0023-core-Ignore-failing-tests.patch
deleted file mode 100644
index ee5ba449fb8e..000000000000
--- a/patches/0023-core-Ignore-failing-tests.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From dd82e95c9de212524e14fc60155de1ae40156dfc Mon Sep 17 00:00:00 2001
-From: bjorn3 <bjorn3@users.noreply.github.com>
-Date: Sun, 24 Nov 2019 15:34:06 +0100
-Subject: [PATCH] [core] Ignore failing tests
-
----
- library/core/tests/iter.rs       |  4 ++++
- library/core/tests/num/bignum.rs | 10 ++++++++++
- library/core/tests/num/mod.rs    |  5 +++--
- library/core/tests/time.rs       |  1 +
- 4 files changed, 18 insertions(+), 2 deletions(-)
-
-diff --git a/library/core/tests/array.rs b/library/core/tests/array.rs
-index 4bc44e9..8e3c7a4 100644
---- a/library/core/tests/array.rs
-+++ b/library/core/tests/array.rs
-@@ -242,6 +242,7 @@ fn iterator_drops() {
-     assert_eq!(i.get(), 5);
- }
- 
-+/*
- // This test does not work on targets without panic=unwind support.
- // To work around this problem, test is marked is should_panic, so it will
- // be automagically skipped on unsuitable targets, such as
-@@ -283,6 +284,7 @@ fn array_default_impl_avoids_leaks_on_panic() {
-     assert_eq!(COUNTER.load(Relaxed), 0);
-     panic!("test succeeded")
- }
-+*/
- 
- #[test]
- fn empty_array_is_always_default() {
-@@ -304,6 +304,7 @@ fn array_map() {
-     assert_eq!(b, [1, 2, 3]);
- }
- 
-+/*
- // See note on above test for why `should_panic` is used.
- #[test]
- #[should_panic(expected = "test succeeded")]
-@@ -332,6 +333,7 @@ fn array_map_drop_safety() {
-     assert_eq!(DROPPED.load(Ordering::SeqCst), num_to_create);
-     panic!("test succeeded")
- }
-+*/
- 
- #[test]
- fn cell_allows_array_cycle() {
--- 2.21.0 (Apple Git-122)
diff --git a/rust-toolchain b/rust-toolchain
index 2614fa081a86..ebb04d0069cf 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2023-06-10"
+channel = "nightly-2023-06-19"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
diff --git a/src/common.rs b/src/common.rs
index 7fa986e2737e..b62f4676f70b 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -108,6 +108,10 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         self.const_uint(self.type_u64(), i)
     }
 
+    fn const_u128(&self, i: u128) -> RValue<'gcc> {
+        self.const_uint_big(self.type_u128(), i)
+    }
+
     fn const_usize(&self, i: u64) -> RValue<'gcc> {
         let bit_size = self.data_layout().pointer_size.bits();
         if bit_size < 64 {
diff --git a/test.sh b/test.sh
index 2e485b927393..d12fe718a968 100755
--- a/test.sh
+++ b/test.sh
@@ -209,13 +209,10 @@ function setup_rustc() {
     cd rust
     git fetch
     git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(')
-    git am ../0001-Allow-overwriting-the-sysroot-compile-flag-via-rustc.patch
     export RUSTFLAGS=
 
     rm config.toml || true
 
-    my_toolchain_dir=$HOME/.rustup/toolchains/codegen_gcc_ui_tests-$rust_toolchain-$TARGET_TRIPLE
-
     cat > config.toml <<EOF
 changelog-seen = 2
 
@@ -223,12 +220,9 @@ changelog-seen = 2
 codegen-backends = []
 deny-warnings = false
 
-# FIXME: it works with the original rustc and cargo.
 [build]
-#cargo = "$my_toolchain_dir/bin/cargo"
 cargo = "$(rustup which cargo)"
 local-rebuild = true
-#rustc = "$my_toolchain_dir/bin/rustc"
 rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
 
 [target.x86_64-unknown-linux-gnu]
@@ -394,7 +388,6 @@ function test_rustc() {
     fi
 
     echo "[TEST] rustc test suite"
-    # FIXME: the problem seems like an ABI incompatibility between cg_gcc sysroot and cg_llvm.
     COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/ui --rustc-args "$RUSTC_ARGS"
 }
 

From 37413a2cea694f4a447f2268afc11fca1afe026a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 18 Jun 2023 19:42:20 -0400
Subject: [PATCH 342/997] Fix indent

---
 src/asm.rs | 69 +++++++++++++++++++++++++++---------------------------
 test.sh    |  3 +--
 2 files changed, 35 insertions(+), 37 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index be7ae603ca61..4c3b7f5036cc 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -502,49 +502,48 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
             let builtin_unreachable = self.context.get_builtin_function("__builtin_unreachable");
             let builtin_unreachable: RValue<'gcc> = unsafe { std::mem::transmute(builtin_unreachable) };
             self.call(self.type_void(), None, None, builtin_unreachable, &[], None);
-    }
+        }
 
-    // Write results to outputs.
-    //
-    // We need to do this because:
-    //  1. Turning `PlaceRef` into `RValue` is error-prone and has nasty edge cases
-    //     (especially with current `rustc_backend_ssa` API).
-    //  2. Not every output operand has an `out_place`, and it's required by `add_output_operand`.
-    //
-    // Instead, we generate a temporary output variable for each output operand, and then this loop,
-    // generates `out_place = tmp_var;` assignments if out_place exists.
-    for op in &outputs {
-        if let Some(place) = op.out_place {
-            OperandValue::Immediate(op.tmp_var.to_rvalue()).store(self, place);
+        // Write results to outputs.
+        //
+        // We need to do this because:
+        //  1. Turning `PlaceRef` into `RValue` is error-prone and has nasty edge cases
+        //     (especially with current `rustc_backend_ssa` API).
+        //  2. Not every output operand has an `out_place`, and it's required by `add_output_operand`.
+        //
+        // Instead, we generate a temporary output variable for each output operand, and then this loop,
+        // generates `out_place = tmp_var;` assignments if out_place exists.
+        for op in &outputs {
+            if let Some(place) = op.out_place {
+                OperandValue::Immediate(op.tmp_var.to_rvalue()).store(self, place);
+            }
         }
     }
-
-}
 }
 
 fn estimate_template_length(template: &[InlineAsmTemplatePiece], constants_len: usize, att_dialect: bool) -> usize {
-let len: usize = template.iter().map(|piece| {
-    match *piece {
-        InlineAsmTemplatePiece::String(ref string) => {
-            string.len()
-        }
-        InlineAsmTemplatePiece::Placeholder { .. } => {
-            // '%' + 1 char modifier + 1 char index
-            3
+    let len: usize = template.iter().map(|piece| {
+        match *piece {
+            InlineAsmTemplatePiece::String(ref string) => {
+                string.len()
+            }
+            InlineAsmTemplatePiece::Placeholder { .. } => {
+                // '%' + 1 char modifier + 1 char index
+                3
+            }
         }
+    })
+    .sum();
+
+    // increase it by 5% to account for possible '%' signs that'll be duplicated
+    // I pulled the number out of blue, but should be fair enough
+    // as the upper bound
+    let mut res = (len as f32 * 1.05) as usize + constants_len;
+
+    if att_dialect {
+        res += INTEL_SYNTAX_INS.len() + ATT_SYNTAX_INS.len();
     }
-})
-.sum();
-
-// increase it by 5% to account for possible '%' signs that'll be duplicated
-// I pulled the number out of blue, but should be fair enough
-// as the upper bound
-let mut res = (len as f32 * 1.05) as usize + constants_len;
-
-if att_dialect {
-    res += INTEL_SYNTAX_INS.len() + ATT_SYNTAX_INS.len();
-}
-res
+    res
 }
 
 /// Converts a register class to a GCC constraint code.
diff --git a/test.sh b/test.sh
index d12fe718a968..592997b8ab9d 100755
--- a/test.sh
+++ b/test.sh
@@ -357,7 +357,6 @@ function test_rustc() {
 
     RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot"
 
-
     if [ $# -eq 0 ]; then
         # No argument supplied to the function. Doing nothing.
         echo "No argument provided. Keeping all UI tests"
@@ -388,7 +387,7 @@ function test_rustc() {
     fi
 
     echo "[TEST] rustc test suite"
-    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/ui --rustc-args "$RUSTC_ARGS"
+    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/ui/ --rustc-args "$RUSTC_ARGS"
 }
 
 function test_failing_rustc() {

From afc6489394abd238fcfbe2c39ca35c4ce3e84234 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 30 Jun 2023 17:11:09 +0200
Subject: [PATCH 343/997] Add support for cold attribute

---
 src/attributes.rs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/attributes.rs b/src/attributes.rs
index eb0cce19b85c..fbafc981f664 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -114,6 +114,10 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
         if let Some(attr) = inline_attr(cx, inline) {
             func.add_attribute(attr);
         }
+
+        if codegen_fn_attrs.flags.contains(CodegenFnAttrFlags::COLD) {
+            func.add_attribute(FnAttribute::Cold);
+        }
     }
 
     let function_features =

From 5920bad104dd842a8b036a7f32c0ae5cf7737496 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 3 Jul 2023 16:56:34 +0200
Subject: [PATCH 344/997] Update dependencies

---
 Cargo.lock | 272 +++++++++++++++++++++++++++++++++--------------------
 1 file changed, 172 insertions(+), 100 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 3c5357eec105..92cb25b7d0be 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -4,25 +4,67 @@ version = 3
 
 [[package]]
 name = "aho-corasick"
-version = "0.7.18"
+version = "1.0.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "1e37cfd5e7657ada45f742d6e99ca5788580b5c529dc78faf11ece6dc702656f"
+checksum = "43f6cb1bf222025340178f382c426f13757b2960e89779dfcb319c32542a5a41"
 dependencies = [
  "memchr",
 ]
 
+[[package]]
+name = "autocfg"
+version = "1.1.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa"
+
 [[package]]
 name = "bitflags"
 version = "1.3.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a"
 
+[[package]]
+name = "cc"
+version = "1.0.79"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "50d30906286121d95be3d479533b458f87493b30a4b5f79a607db8f5d11aa91f"
+
 [[package]]
 name = "cfg-if"
 version = "1.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd"
 
+[[package]]
+name = "errno"
+version = "0.3.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "4bcfec3a70f97c962c307b2d2c56e358cf1d00b558d74262b5f929ee8cc7e73a"
+dependencies = [
+ "errno-dragonfly",
+ "libc",
+ "windows-sys",
+]
+
+[[package]]
+name = "errno-dragonfly"
+version = "0.1.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "aa68f1b12764fab894d2755d2518754e71b4fd80ecfb822714a1206c2aab39bf"
+dependencies = [
+ "cc",
+ "libc",
+]
+
+[[package]]
+name = "fastrand"
+version = "1.9.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e51093e27b0797c359783294ca4f0a911c270184cb10f85783b118614a1501be"
+dependencies = [
+ "instant",
+]
+
 [[package]]
 name = "fm"
 version = "0.1.4"
@@ -35,7 +77,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#d6e52626cfc6f487094a5d5ac66302baf3439984"
+source = "git+https://github.com/antoyo/gccjit.rs#2f6b60543d0f72003a2d19430d446dae27b06753"
 dependencies = [
  "gccjit_sys",
 ]
@@ -43,7 +85,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#d6e52626cfc6f487094a5d5ac66302baf3439984"
+source = "git+https://github.com/antoyo/gccjit.rs#2f6b60543d0f72003a2d19430d446dae27b06753"
 dependencies = [
  "libc",
 ]
@@ -58,23 +100,29 @@ dependencies = [
 ]
 
 [[package]]
-name = "getrandom"
-version = "0.2.3"
+name = "hermit-abi"
+version = "0.3.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7fcd999463524c52659517fe2cea98493cfe485d10565e7b0fb07dbba7ad2753"
+checksum = "fed44880c466736ef9a5c5b5facefb5ed0785676d0c02d612db14e54f0d84286"
+
+[[package]]
+name = "instant"
+version = "0.1.12"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "7a5bbe824c507c5da5956355e86a746d82e0e1464f65d862cc5e71da70e94b2c"
 dependencies = [
  "cfg-if",
- "libc",
- "wasi",
 ]
 
 [[package]]
-name = "hermit-abi"
-version = "0.1.19"
+name = "io-lifetimes"
+version = "1.0.11"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "62b467343b94ba476dcb2500d242dadbb39557df889310ac77c5d99100aaac33"
+checksum = "eae7b9aee968036d54dce06cebaefd919e4472e753296daccd6d344e3e2df0c2"
 dependencies = [
+ "hermit-abi",
  "libc",
+ "windows-sys",
 ]
 
 [[package]]
@@ -95,86 +143,46 @@ dependencies = [
 
 [[package]]
 name = "libc"
-version = "0.2.112"
+version = "0.2.147"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "1b03d17f364a3a042d5e5d46b053bbbf82c92c9430c592dd4c064dc6ee997125"
+checksum = "b4668fb0ea861c1df094127ac5f1da3409a82116a4ba74fca2e58ef927159bb3"
+
+[[package]]
+name = "linux-raw-sys"
+version = "0.3.8"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ef53942eb7bf7ff43a617b3e2c1c4a5ecf5944a7c1bc12d7ee39bbb15e5c1519"
 
 [[package]]
 name = "memchr"
-version = "2.4.1"
+version = "2.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "308cc39be01b73d0d18f82a0e7b2a3df85245f84af96fdddc5d202d27e47b86a"
+checksum = "2dffe52ecf27772e601905b7522cb4ef790d2cc203488bbd0e2fe85fcb74566d"
 
 [[package]]
 name = "num_cpus"
-version = "1.13.0"
+version = "1.16.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "05499f3756671c15885fee9034446956fff3f243d6077b91e5767df161f766b3"
+checksum = "4161fcb6d602d4d2081af7c3a45852d875a03dd337a6bfdd6e06407b61342a43"
 dependencies = [
  "hermit-abi",
  "libc",
 ]
 
-[[package]]
-name = "ppv-lite86"
-version = "0.2.15"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ed0cfbc8191465bed66e1718596ee0b0b35d5ee1f41c5df2189d0fe8bde535ba"
-
-[[package]]
-name = "rand"
-version = "0.8.4"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "2e7573632e6454cf6b99d7aac4ccca54be06da05aca2ef7423d22d27d4d4bcd8"
-dependencies = [
- "libc",
- "rand_chacha",
- "rand_core",
- "rand_hc",
-]
-
-[[package]]
-name = "rand_chacha"
-version = "0.3.1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e6c10a63a0fa32252be49d21e7709d4d4baf8d231c2dbce1eaa8141b9b127d88"
-dependencies = [
- "ppv-lite86",
- "rand_core",
-]
-
-[[package]]
-name = "rand_core"
-version = "0.6.3"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d34f1408f55294453790c48b2f1ebbb1c5b4b7563eb1f418bcfcfdbb06ebb4e7"
-dependencies = [
- "getrandom",
-]
-
-[[package]]
-name = "rand_hc"
-version = "0.3.1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d51e9f596de227fda2ea6c84607f5558e196eeaf43c986b724ba4fb8fdf497e7"
-dependencies = [
- "rand_core",
-]
-
 [[package]]
 name = "redox_syscall"
-version = "0.2.10"
+version = "0.3.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8383f39639269cde97d255a32bdb68c047337295414940c68bdd30c2e13203ff"
+checksum = "567664f262709473930a4bf9e51bf2ebf3348f2e748ccc50dea20646858f8f29"
 dependencies = [
  "bitflags",
 ]
 
 [[package]]
 name = "regex"
-version = "1.5.4"
+version = "1.8.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d07a8629359eb56f1e2fb1652bb04212c072a87ba68546a04065d525673ac461"
+checksum = "d0ab3ca65655bb1e41f2a8c8cd662eb4fb035e67c3f78da1d61dffe89d07300f"
 dependencies = [
  "aho-corasick",
  "memchr",
@@ -183,18 +191,9 @@ dependencies = [
 
 [[package]]
 name = "regex-syntax"
-version = "0.6.25"
+version = "0.7.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f497285884f3fcff424ffc933e56d7cbca511def0c9831a7f9b5f6153e3cc89b"
-
-[[package]]
-name = "remove_dir_all"
-version = "0.5.3"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3acd125665422973a33ac9d3dd2df85edad0f4ae9b00dafb1a05e43a9f5ef8e7"
-dependencies = [
- "winapi",
-]
+checksum = "436b050e76ed2903236f032a59761c1eb99e1b0aead2c257922771dab1fc8c78"
 
 [[package]]
 name = "rustc_codegen_gcc"
@@ -206,6 +205,20 @@ dependencies = [
  "tempfile",
 ]
 
+[[package]]
+name = "rustix"
+version = "0.37.22"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8818fa822adcc98b18fedbb3632a6a33213c070556b5aa7c4c8cc21cff565c4c"
+dependencies = [
+ "bitflags",
+ "errno",
+ "io-lifetimes",
+ "libc",
+ "linux-raw-sys",
+ "windows-sys",
+]
+
 [[package]]
 name = "same-file"
 version = "1.0.6"
@@ -217,29 +230,29 @@ dependencies = [
 
 [[package]]
 name = "smallvec"
-version = "1.8.0"
+version = "1.10.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f2dd574626839106c320a323308629dcb1acfc96e32a8cba364ddc61ac23ee83"
+checksum = "a507befe795404456341dfab10cef66ead4c041f62b8b11bbb92bffe5d0953e0"
 
 [[package]]
 name = "tempfile"
-version = "3.2.0"
+version = "3.6.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dac1c663cfc93810f88aed9b8941d48cabf856a1b111c29a40439018d870eb22"
+checksum = "31c0432476357e58790aaa47a8efb0c5138f137343f3b5f23bd36a27e3b0a6d6"
 dependencies = [
+ "autocfg",
  "cfg-if",
- "libc",
- "rand",
+ "fastrand",
  "redox_syscall",
- "remove_dir_all",
- "winapi",
+ "rustix",
+ "windows-sys",
 ]
 
 [[package]]
 name = "termcolor"
-version = "1.1.2"
+version = "1.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "2dfed899f0eb03f32ee8c6a0aabdb8a7949659e3466561fc0adf54e26d88c5f4"
+checksum = "be55cf8942feac5c765c2c993422806843c9a9a45d4d5c407ad6dd2ea95eb9b6"
 dependencies = [
  "winapi-util",
 ]
@@ -255,9 +268,9 @@ dependencies = [
 
 [[package]]
 name = "unicode-width"
-version = "0.1.9"
+version = "0.1.10"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3ed742d4ea2bd1176e236172c8429aaf54486e7ac098db29ffe6529e0ce50973"
+checksum = "c0edd1e5b14653f783770bce4a4dabb4a5108a5370a5f5d8cfe8710c361f6c8b"
 
 [[package]]
 name = "wait-timeout"
@@ -270,21 +283,14 @@ dependencies = [
 
 [[package]]
 name = "walkdir"
-version = "2.3.2"
+version = "2.3.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "808cf2735cd4b6866113f648b791c6adc5714537bc222d9347bb203386ffda56"
+checksum = "36df944cda56c7d8d8b7496af378e6b16de9284591917d307c9b4d313c44e698"
 dependencies = [
  "same-file",
- "winapi",
  "winapi-util",
 ]
 
-[[package]]
-name = "wasi"
-version = "0.10.2+wasi-snapshot-preview1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "fd6fbd9a79829dd1ad0cc20627bf1ed606756a7f77edff7b66b7064f9cb327c6"
-
 [[package]]
 name = "winapi"
 version = "0.3.9"
@@ -315,3 +321,69 @@ name = "winapi-x86_64-pc-windows-gnu"
 version = "0.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f"
+
+[[package]]
+name = "windows-sys"
+version = "0.48.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "677d2418bec65e3338edb076e806bc1ec15693c5d0104683f2efe857f61056a9"
+dependencies = [
+ "windows-targets",
+]
+
+[[package]]
+name = "windows-targets"
+version = "0.48.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "05d4b17490f70499f20b9e791dcf6a299785ce8af4d709018206dc5b4953e95f"
+dependencies = [
+ "windows_aarch64_gnullvm",
+ "windows_aarch64_msvc",
+ "windows_i686_gnu",
+ "windows_i686_msvc",
+ "windows_x86_64_gnu",
+ "windows_x86_64_gnullvm",
+ "windows_x86_64_msvc",
+]
+
+[[package]]
+name = "windows_aarch64_gnullvm"
+version = "0.48.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "91ae572e1b79dba883e0d315474df7305d12f569b400fcf90581b06062f7e1bc"
+
+[[package]]
+name = "windows_aarch64_msvc"
+version = "0.48.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "b2ef27e0d7bdfcfc7b868b317c1d32c641a6fe4629c171b8928c7b08d98d7cf3"
+
+[[package]]
+name = "windows_i686_gnu"
+version = "0.48.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "622a1962a7db830d6fd0a69683c80a18fda201879f0f447f065a3b7467daa241"
+
+[[package]]
+name = "windows_i686_msvc"
+version = "0.48.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "4542c6e364ce21bf45d69fdd2a8e455fa38d316158cfd43b3ac1c5b1b19f8e00"
+
+[[package]]
+name = "windows_x86_64_gnu"
+version = "0.48.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ca2b8a661f7628cbd23440e50b05d705db3686f894fc9580820623656af974b1"
+
+[[package]]
+name = "windows_x86_64_gnullvm"
+version = "0.48.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "7896dbc1f41e08872e9d5e8f8baa8fdd2677f29468c4e156210174edc7f7b953"
+
+[[package]]
+name = "windows_x86_64_msvc"
+version = "0.48.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1a515f5799fe4961cb532f983ce2b23082366b898e52ffbce459c86f67c8378a"

From 91e04000eab437a791d0b7e1fe19c2a2b2234281 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 4 Jul 2023 21:04:15 -0400
Subject: [PATCH 345/997] Add support for detecting CPU features

---
 Cargo.lock           |  4 ++--
 Readme.md            |  4 +---
 failing-ui-tests.txt |  1 -
 src/base.rs          | 51 ++++++++++++++++++++++++++------------------
 src/lib.rs           | 42 +++++++++++++++---------------------
 5 files changed, 50 insertions(+), 52 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 92cb25b7d0be..2800dc6ccd14 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -77,7 +77,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#2f6b60543d0f72003a2d19430d446dae27b06753"
+source = "git+https://github.com/antoyo/gccjit.rs#79c8bb49ff09b7f40a04055203a5f3894a266210"
 dependencies = [
  "gccjit_sys",
 ]
@@ -85,7 +85,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#2f6b60543d0f72003a2d19430d446dae27b06753"
+source = "git+https://github.com/antoyo/gccjit.rs#79c8bb49ff09b7f40a04055203a5f3894a266210"
 dependencies = [
  "libc",
 ]
diff --git a/Readme.md b/Readme.md
index a93637d9038d..c58662b9ce5d 100644
--- a/Readme.md
+++ b/Readme.md
@@ -14,9 +14,7 @@ A secondary goal is to check if using the gcc backend will provide any run-time
 ## Building
 
 **This requires a patched libgccjit in order to work.
-The patches in [this repository](https://github.com/antoyo/libgccjit-patches) need to be applied.
-(Those patches should work when applied on master, but in case it doesn't work, they are known to work when applied on 079c23cfe079f203d5df83fea8e92a60c7d7e878.)
-You can also use my [fork of gcc](https://github.com/antoyo/gcc) which already includes these patches.**
+You need to use my [fork of gcc](https://github.com/antoyo/gcc) which already includes these patches.**
 
 To build it (most of these instructions come from [here](https://gcc.gnu.org/onlinedocs/jit/internals/index.html), so don't hesitate to take a look there if you encounter an issue):
 
diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 801464daae9a..69f57036b01e 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -21,7 +21,6 @@ tests/ui/sepcomp/sepcomp-fns-backwards.rs
 tests/ui/sepcomp/sepcomp-fns.rs
 tests/ui/sepcomp/sepcomp-statics.rs
 tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
-tests/ui/sse2.rs
 tests/ui/target-feature/missing-plusminus.rs
 tests/ui/asm/x86_64/may_unwind.rs
 tests/ui/backtrace.rs
diff --git a/src/base.rs b/src/base.rs
index dcd560b3dcd9..82669aa99cf1 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -1,10 +1,12 @@
+use std::collections::HashSet;
 use std::env;
+use std::sync::Arc;
 use std::time::Instant;
 
 use gccjit::{
     Context,
     FunctionType,
-    GlobalKind,
+    GlobalKind, TargetInfo,
 };
 use rustc_middle::dep_graph;
 use rustc_middle::ty::TyCtxt;
@@ -63,7 +65,7 @@ pub fn linkage_to_gcc(linkage: Linkage) -> FunctionType {
     }
 }
 
-pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, supports_128bit_integers: bool) -> (ModuleCodegen<GccContext>, u64) {
+pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<TargetInfo>) -> (ModuleCodegen<GccContext>, u64) {
     let prof_timer = tcx.prof.generic_activity("codegen_module");
     let start_time = Instant::now();
 
@@ -71,7 +73,7 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, supports_128bit_i
     let (module, _) = tcx.dep_graph.with_task(
         dep_node,
         tcx,
-        (cgu_name, supports_128bit_integers),
+        (cgu_name, target_info),
         module_codegen,
         Some(dep_graph::hash_result),
     );
@@ -82,7 +84,7 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, supports_128bit_i
     // the time we needed for codegenning it.
     let cost = time_to_codegen.as_secs() * 1_000_000_000 + time_to_codegen.subsec_nanos() as u64;
 
-    fn module_codegen(tcx: TyCtxt<'_>, (cgu_name, supports_128bit_integers): (Symbol, bool)) -> ModuleCodegen<GccContext> {
+    fn module_codegen(tcx: TyCtxt<'_>, (cgu_name, target_info): (Symbol, Arc<TargetInfo>)) -> ModuleCodegen<GccContext> {
         let cgu = tcx.codegen_unit(cgu_name);
         // Instantiate monomorphizations without filling out definitions yet...
         //let llvm_module = ModuleLlvm::new(tcx, &cgu_name.as_str());
@@ -91,29 +93,36 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, supports_128bit_i
         context.add_command_line_option("-fexceptions");
         context.add_driver_option("-fexceptions");
 
+        let disabled_features: HashSet<_> = tcx.sess.opts.cg.target_feature.split(',')
+            .filter(|feature| feature.starts_with('-'))
+            .map(|string| &string[1..])
+            .collect();
+
+        let add_cpu_feature_flag = |feature: &str| {
+            // FIXME(antoyo): some tests cause a segfault in GCC when not enabling all these
+            // features.
+            if (true || target_info.cpu_supports(feature)) && !disabled_features.contains(feature) {
+                context.add_command_line_option(&format!("-m{}", feature));
+            }
+        };
+
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
-        // TODO(antoyo): only add the following cli argument if the feature is supported.
-        context.add_command_line_option("-msse2");
-        context.add_command_line_option("-mavx2");
-        // FIXME(antoyo): the following causes an illegal instruction on vmovdqu64 in std_example on my CPU.
-        // Only add if the CPU supports it.
-        context.add_command_line_option("-msha");
+
+        let features = ["sse2", "avx", "avx2", "sha", "fma", "gfni", "f16c", "aes", "bmi2", "rtm",
+            "vaes", "vpclmulqdq", "xsavec",
+        ];
+
+        for feature in &features {
+            add_cpu_feature_flag(feature);
+        }
+
+        // TODO(antoyo): only add the following cli arguments if the feature is supported.
         context.add_command_line_option("-mpclmul");
-        context.add_command_line_option("-mfma");
         context.add_command_line_option("-mfma4");
         context.add_command_line_option("-m64");
         context.add_command_line_option("-mbmi");
-        context.add_command_line_option("-mgfni");
         //context.add_command_line_option("-mavxvnni"); // The CI doesn't support this option.
-        context.add_command_line_option("-mf16c");
-        context.add_command_line_option("-maes");
-        context.add_command_line_option("-mxsavec");
-        context.add_command_line_option("-mbmi2");
-        context.add_command_line_option("-mrtm");
-        context.add_command_line_option("-mvaes");
-        context.add_command_line_option("-mvpclmulqdq");
-        context.add_command_line_option("-mavx");
 
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
@@ -156,7 +165,7 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, supports_128bit_i
         context.set_allow_unreachable_blocks(true);
 
         {
-            let cx = CodegenCx::new(&context, cgu, tcx, supports_128bit_integers);
+            let cx = CodegenCx::new(&context, cgu, tcx, target_info.supports_128bit_int());
 
             let mono_items = cgu.items_in_deterministic_order(tcx);
             for &(mono_item, (linkage, visibility)) in &mono_items {
diff --git a/src/lib.rs b/src/lib.rs
index 2a6b642782df..4e9c2f91be5e 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -35,7 +35,6 @@ extern crate rustc_middle;
 extern crate rustc_session;
 extern crate rustc_span;
 extern crate rustc_target;
-extern crate tempfile;
 
 // This prevents duplicating functions and statics that are already part of the host rustc process.
 #[allow(unused_extern_crates)]
@@ -64,10 +63,10 @@ mod type_;
 mod type_of;
 
 use std::any::Any;
-use std::sync::{Arc, Mutex};
+use std::sync::Arc;
 
 use crate::errors::LTONotSupported;
-use gccjit::{Context, OptimizationLevel, CType};
+use gccjit::{Context, OptimizationLevel, TargetInfo};
 use rustc_ast::expand::allocator::AllocatorKind;
 use rustc_codegen_ssa::{CodegenResults, CompiledModule, ModuleCodegen};
 use rustc_codegen_ssa::base::codegen_crate;
@@ -86,7 +85,6 @@ use rustc_session::config::{Lto, OptLevel, OutputFilenames};
 use rustc_session::Session;
 use rustc_span::Symbol;
 use rustc_span::fatal_error::FatalError;
-use tempfile::TempDir;
 
 fluent_messages! { "../messages.ftl" }
 
@@ -102,7 +100,7 @@ impl<F: Fn() -> String> Drop for PrintOnPanic<F> {
 
 #[derive(Clone)]
 pub struct GccCodegenBackend {
-    supports_128bit_integers: Arc<Mutex<bool>>,
+    target_info: Arc<TargetInfo>,
 }
 
 impl CodegenBackend for GccCodegenBackend {
@@ -116,15 +114,6 @@ impl CodegenBackend for GccCodegenBackend {
         if sess.lto() != Lto::No {
             sess.emit_warning(LTONotSupported {});
         }
-
-        let temp_dir = TempDir::new().expect("cannot create temporary directory");
-        let temp_file = temp_dir.into_path().join("result.asm");
-        let check_context = Context::default();
-        check_context.set_print_errors_to_stderr(false);
-        let _int128_ty = check_context.new_c_type(CType::UInt128t);
-        // NOTE: we cannot just call compile() as this would require other files than libgccjit.so.
-        check_context.compile_to_file(gccjit::OutputKind::Assembler, temp_file.to_str().expect("path to str"));
-        *self.supports_128bit_integers.lock().expect("lock") = check_context.get_last_error() == Ok(None);
     }
 
     fn provide(&self, providers: &mut Providers) {
@@ -160,7 +149,7 @@ impl CodegenBackend for GccCodegenBackend {
     }
 
     fn target_features(&self, sess: &Session, allow_unstable: bool) -> Vec<Symbol> {
-        target_features(sess, allow_unstable)
+        target_features(sess, allow_unstable, &self.target_info)
     }
 }
 
@@ -174,7 +163,7 @@ impl ExtraBackendMethods for GccCodegenBackend {
     }
 
     fn compile_codegen_unit(&self, tcx: TyCtxt<'_>, cgu_name: Symbol) -> (ModuleCodegen<Self::Module>, u64) {
-        base::compile_codegen_unit(tcx, cgu_name, *self.supports_128bit_integers.lock().expect("lock"))
+        base::compile_codegen_unit(tcx, cgu_name, Arc::clone(&self.target_info))
     }
 
     fn target_machine_factory(&self, _sess: &Session, _opt_level: OptLevel, _features: &[String]) -> TargetMachineFactoryFn<Self> {
@@ -273,8 +262,17 @@ impl WriteBackendMethods for GccCodegenBackend {
 /// This is the entrypoint for a hot plugged rustc_codegen_gccjit
 #[no_mangle]
 pub fn __rustc_codegen_backend() -> Box<dyn CodegenBackend> {
+    // Get the native arch and check whether the target supports 128-bit integers.
+    let context = Context::default();
+    let arch = context.get_target_info().arch().unwrap();
+
+    // Get the second TargetInfo with the correct CPU features by setting the arch.
+    let context = Context::default();
+    context.add_driver_option(&format!("-march={}", arch.to_str().unwrap()));
+    let target_info = Arc::new(context.get_target_info());
+
     Box::new(GccCodegenBackend {
-        supports_128bit_integers: Arc::new(Mutex::new(false)),
+        target_info,
     })
 }
 
@@ -308,7 +306,7 @@ pub fn target_cpu(sess: &Session) -> &str {
     }
 }
 
-pub fn target_features(sess: &Session, allow_unstable: bool) -> Vec<Symbol> {
+pub fn target_features(sess: &Session, allow_unstable: bool, target_info: &Arc<TargetInfo>) -> Vec<Symbol> {
     supported_target_features(sess)
         .iter()
         .filter_map(
@@ -317,14 +315,9 @@ pub fn target_features(sess: &Session, allow_unstable: bool) -> Vec<Symbol> {
             },
         )
         .filter(|_feature| {
-            // TODO(antoyo): implement a way to get enabled feature in libgccjit.
-            // Probably using the equivalent of __builtin_cpu_supports.
-            // TODO(antoyo): maybe use whatever outputs the following command:
-            // gcc -march=native -Q --help=target
             #[cfg(feature="master")]
             {
-                // NOTE: the CPU in the CI doesn't support sse4a, so disable it to make the stdarch tests pass in the CI.
-                (_feature.contains("sse") || _feature.contains("avx")) && !_feature.contains("avx512") && !_feature.contains("sse4a")
+                target_info.cpu_supports(_feature)
             }
             #[cfg(not(feature="master"))]
             {
@@ -336,7 +329,6 @@ pub fn target_features(sess: &Session, allow_unstable: bool) -> Vec<Symbol> {
                bmi1, bmi2, cmpxchg16b, ermsb, f16c, fma, fxsr, gfni, lzcnt, movbe, pclmulqdq, popcnt, rdrand, rdseed, rtm,
                sha, sse, sse2, sse3, sse4.1, sse4.2, sse4a, ssse3, tbm, vaes, vpclmulqdq, xsave, xsavec, xsaveopt, xsaves
              */
-            //false
         })
         .map(|feature| Symbol::intern(feature))
         .collect()

From e1092eb4d123f568f2f51c8ff4da54d7be89dc0c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 6 Jul 2023 17:44:15 -0400
Subject: [PATCH 346/997] Add license explanations

---
 Readme.md | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Readme.md b/Readme.md
index c58662b9ce5d..e05f8dae1c6f 100644
--- a/Readme.md
+++ b/Readme.md
@@ -105,6 +105,12 @@ $ rustc +$(cat $cg_gccjit_dir/rust-toolchain) -Cpanic=abort -Zcodegen-backend=$c
     <dd>Display the time it took to perform codegen for a crate</dd>
 </dl>
 
+## Licensing
+
+While this crate is licensed under a dual Apache/MIT license, it links to `libgccjit` which is under the GPLv3+ and thus, the resulting toolchain (rustc + GCC codegen) will need to be released under the GPL license.
+
+However, programs compiled with `rustc_codegen_gcc` do not need to be released under a GPL license.
+
 ## Debugging
 
 Sometimes, libgccjit will crash and output an error like this:

From 97a0d35a8c21b8aeed474a5fa856e89c1feeb5fb Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 6 Jul 2023 16:54:50 +0200
Subject: [PATCH 347/997] Add support for "returns_twice" function attribute

---
 src/attributes.rs | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/attributes.rs b/src/attributes.rs
index fbafc981f664..0fda9e7ae50b 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -118,6 +118,9 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
         if codegen_fn_attrs.flags.contains(CodegenFnAttrFlags::COLD) {
             func.add_attribute(FnAttribute::Cold);
         }
+        if codegen_fn_attrs.flags.contains(CodegenFnAttrFlags::FFI_RETURNS_TWICE) {
+            func.add_attribute(FnAttribute::ReturnsTwice);
+        }
     }
 
     let function_features =

From a6d1aa28101ca14c07aaf367b41cc4a13aaad82e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 12 Jul 2023 16:46:16 +0200
Subject: [PATCH 348/997] Update gccjit dependency

---
 Cargo.lock | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 2800dc6ccd14..3062b191f35a 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -77,7 +77,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#79c8bb49ff09b7f40a04055203a5f3894a266210"
+source = "git+https://github.com/antoyo/gccjit.rs#78ed1a380eb276e7443645a41b0e87222f291e82"
 dependencies = [
  "gccjit_sys",
 ]
@@ -85,7 +85,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#79c8bb49ff09b7f40a04055203a5f3894a266210"
+source = "git+https://github.com/antoyo/gccjit.rs#78ed1a380eb276e7443645a41b0e87222f291e82"
 dependencies = [
  "libc",
 ]

From c04a631ea651c76504f281994984f75971353735 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 13 Jul 2023 21:43:12 +0200
Subject: [PATCH 349/997] Add support for "pure" function attribute

---
 src/attributes.rs | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/attributes.rs b/src/attributes.rs
index 0fda9e7ae50b..6195de912d27 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -121,6 +121,9 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
         if codegen_fn_attrs.flags.contains(CodegenFnAttrFlags::FFI_RETURNS_TWICE) {
             func.add_attribute(FnAttribute::ReturnsTwice);
         }
+        if codegen_fn_attrs.flags.contains(CodegenFnAttrFlags::FFI_PURE) {
+            func.add_attribute(FnAttribute::Pure);
+        }
     }
 
     let function_features =

From 7ba60ecb538249a7ba23d3a4bcc96e468de03a50 Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Sat, 15 Jul 2023 12:37:47 +0000
Subject: [PATCH 350/997] Extract a create_wrapper_function for use in
 allocator shim writing

This deduplicates some logic and makes it easier to follow what wrappers
are produced. In the future it may allow moving the code to determine
which wrappers to create to cg_ssa.
---
 src/allocator.rs | 135 ++++++++++++++++++++++-------------------------
 1 file changed, 63 insertions(+), 72 deletions(-)

diff --git a/src/allocator.rs b/src/allocator.rs
index 13f88192bbc9..38309fa01539 100644
--- a/src/allocator.rs
+++ b/src/allocator.rs
@@ -1,6 +1,6 @@
 #[cfg(feature="master")]
 use gccjit::FnAttribute;
-use gccjit::{FunctionType, GlobalKind, ToRValue};
+use gccjit::{Context, FunctionType, GlobalKind, ToRValue, Type};
 use rustc_ast::expand::allocator::{
     alloc_error_handler_name, default_fn_name, global_fn_name, AllocatorKind, AllocatorTy,
     ALLOCATOR_METHODS, NO_ALLOC_SHIM_IS_UNSTABLE,
@@ -22,7 +22,6 @@ pub(crate) unsafe fn codegen(tcx: TyCtxt<'_>, mods: &mut GccContext, _module_nam
         };
     let i8 = context.new_type::<i8>();
     let i8p = i8.make_pointer();
-    let void = context.new_type::<()>();
 
     if kind == AllocatorKind::Default {
         for method in ALLOCATOR_METHODS {
@@ -47,80 +46,22 @@ pub(crate) unsafe fn codegen(tcx: TyCtxt<'_>, mods: &mut GccContext, _module_nam
                     panic!("invalid allocator output")
                 }
             };
-            let name = global_fn_name(method.name);
+            let from_name = global_fn_name(method.name);
+            let to_name = default_fn_name(method.name);
 
-            let args: Vec<_> = types.iter().enumerate()
-                .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
-                .collect();
-            let func = context.new_function(None, FunctionType::Exported, output.unwrap_or(void), &args, name, false);
-
-            if tcx.sess.target.options.default_hidden_visibility {
-                #[cfg(feature="master")]
-                func.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
-            }
-            if tcx.sess.must_emit_unwind_tables() {
-                // TODO(antoyo): emit unwind tables.
-            }
-
-            let callee = default_fn_name(method.name);
-            let args: Vec<_> = types.iter().enumerate()
-                .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
-                .collect();
-            let callee = context.new_function(None, FunctionType::Extern, output.unwrap_or(void), &args, callee, false);
-            #[cfg(feature="master")]
-            callee.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
-
-            let block = func.new_block("entry");
-
-            let args = args
-                .iter()
-                .enumerate()
-                .map(|(i, _)| func.get_param(i as i32).to_rvalue())
-                .collect::<Vec<_>>();
-            let ret = context.new_call(None, callee, &args);
-            //llvm::LLVMSetTailCall(ret, True);
-            if output.is_some() {
-                block.end_with_return(None, ret);
-            }
-            else {
-                block.end_with_void_return(None);
-            }
-
-            // TODO(@Commeownist): Check if we need to emit some extra debugging info in certain circumstances
-            // as described in https://github.com/rust-lang/rust/commit/77a96ed5646f7c3ee8897693decc4626fe380643
+            create_wrapper_function(tcx, context, &from_name, &to_name, &types, output);
         }
     }
 
-    let types = [usize, usize];
-    let name = "__rust_alloc_error_handler".to_string();
-    let args: Vec<_> = types.iter().enumerate()
-        .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
-        .collect();
-    let func = context.new_function(None, FunctionType::Exported, void, &args, name, false);
-
-    if tcx.sess.target.default_hidden_visibility {
-        #[cfg(feature="master")]
-        func.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
-    }
-
-    let callee = alloc_error_handler_name(alloc_error_handler_kind);
-    let args: Vec<_> = types.iter().enumerate()
-        .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
-        .collect();
-    let callee = context.new_function(None, FunctionType::Extern, void, &args, callee, false);
-    #[cfg(feature="master")]
-    callee.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
-
-    let block = func.new_block("entry");
-
-    let args = args
-        .iter()
-        .enumerate()
-        .map(|(i, _)| func.get_param(i as i32).to_rvalue())
-        .collect::<Vec<_>>();
-    let _ret = context.new_call(None, callee, &args);
-    //llvm::LLVMSetTailCall(ret, True);
-    block.end_with_void_return(None);
+    // FIXME(bjorn3): Add noreturn attribute
+    create_wrapper_function(
+        tcx,
+        context,
+        "__rust_alloc_error_handler",
+        &alloc_error_handler_name(alloc_error_handler_kind),
+        &[usize, usize],
+        None,
+    );
 
     let name = OomStrategy::SYMBOL.to_string();
     let global = context.new_global(None, GlobalKind::Exported, i8, name);
@@ -133,3 +74,53 @@ pub(crate) unsafe fn codegen(tcx: TyCtxt<'_>, mods: &mut GccContext, _module_nam
     let value = context.new_rvalue_from_int(i8, 0);
     global.global_set_initializer_rvalue(value);
 }
+
+fn create_wrapper_function(
+    tcx: TyCtxt<'_>,
+    context: &Context<'_>,
+    from_name: &str,
+    to_name: &str,
+    types: &[Type<'_>],
+    output: Option<Type<'_>>,
+) {
+    let void = context.new_type::<()>();
+
+    let args: Vec<_> = types.iter().enumerate()
+        .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
+        .collect();
+    let func = context.new_function(None, FunctionType::Exported, output.unwrap_or(void), &args, from_name, false);
+
+    if tcx.sess.target.options.default_hidden_visibility {
+        #[cfg(feature="master")]
+        func.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
+    }
+    if tcx.sess.must_emit_unwind_tables() {
+        // TODO(antoyo): emit unwind tables.
+    }
+
+    let args: Vec<_> = types.iter().enumerate()
+        .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
+        .collect();
+    let callee = context.new_function(None, FunctionType::Extern, output.unwrap_or(void), &args, to_name, false);
+    #[cfg(feature="master")]
+    callee.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
+
+    let block = func.new_block("entry");
+
+    let args = args
+        .iter()
+        .enumerate()
+        .map(|(i, _)| func.get_param(i as i32).to_rvalue())
+        .collect::<Vec<_>>();
+    let ret = context.new_call(None, callee, &args);
+    //llvm::LLVMSetTailCall(ret, True);
+    if output.is_some() {
+        block.end_with_return(None, ret);
+    }
+    else {
+        block.end_with_void_return(None);
+    }
+
+    // TODO(@Commeownist): Check if we need to emit some extra debugging info in certain circumstances
+    // as described in https://github.com/rust-lang/rust/commit/77a96ed5646f7c3ee8897693decc4626fe380643
+}

From 34922fc3ce1bd25fa2701c419a455d4dd4fe960e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 17 Jul 2023 23:22:45 +0200
Subject: [PATCH 351/997] Update gccjit-rs version

---
 Cargo.lock | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 3062b191f35a..488b51c9366b 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -77,7 +77,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#78ed1a380eb276e7443645a41b0e87222f291e82"
+source = "git+https://github.com/antoyo/gccjit.rs#de70a3bdc1908098ae4b10efc530bd695971a67c"
 dependencies = [
  "gccjit_sys",
 ]
@@ -85,7 +85,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#78ed1a380eb276e7443645a41b0e87222f291e82"
+source = "git+https://github.com/antoyo/gccjit.rs#de70a3bdc1908098ae4b10efc530bd695971a67c"
 dependencies = [
  "libc",
 ]

From 918332bea228e103fd2e81dc719a53e4c3122bac Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 21 Jul 2023 11:23:41 +0200
Subject: [PATCH 352/997] Add support for "ffi_const" function attribute

---
 src/attributes.rs | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/attributes.rs b/src/attributes.rs
index 6195de912d27..35682db9c785 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -124,6 +124,9 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
         if codegen_fn_attrs.flags.contains(CodegenFnAttrFlags::FFI_PURE) {
             func.add_attribute(FnAttribute::Pure);
         }
+        if codegen_fn_attrs.flags.contains(CodegenFnAttrFlags::FFI_CONST) {
+            func.add_attribute(FnAttribute::Const);
+        }
     }
 
     let function_features =

From 136548d3fe9d2c8ac993d7d1b0d2e20256f02750 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 22 Jul 2023 14:44:20 +0200
Subject: [PATCH 353/997] Update gccjit dependency

---
 Cargo.lock | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 488b51c9366b..60df0e60988b 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -77,7 +77,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#de70a3bdc1908098ae4b10efc530bd695971a67c"
+source = "git+https://github.com/antoyo/gccjit.rs#61d8d55c894bd462ee66c096cc31157a44a9f869"
 dependencies = [
  "gccjit_sys",
 ]
@@ -85,7 +85,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#de70a3bdc1908098ae4b10efc530bd695971a67c"
+source = "git+https://github.com/antoyo/gccjit.rs#61d8d55c894bd462ee66c096cc31157a44a9f869"
 dependencies = [
  "libc",
 ]

From cd57c6ea1c13db57a6ebd4423ddbf2ca8e28e765 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 21 Jul 2023 15:14:15 +0200
Subject: [PATCH 354/997] Add instructions on how to generate GIMPLE format

---
 Readme.md     |  5 ++++
 doc/gimple.md | 80 +++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 85 insertions(+)
 create mode 100644 doc/gimple.md

diff --git a/Readme.md b/Readme.md
index e05f8dae1c6f..b9a78b0277b7 100644
--- a/Readme.md
+++ b/Readme.md
@@ -227,6 +227,11 @@ https://rust-lang.zulipchat.com/#narrow/stream/301329-t-devtools/topic/subtree.2
 
 `rustc` needs to be built without `jemalloc` so that `mem-trace` can overload `malloc` since `jemalloc` is linked statically, so a `LD_PRELOAD`-ed library won't a chance to intercept the calls to `malloc`.
 
+### How to generate GIMPLE
+
+If you need to check what gccjit is generating (GIMPLE), then take a look at how to
+generate it in [gimple.md](./doc/gimple.md).
+
 ### How to build a cross-compiling libgccjit
 
 #### Building libgccjit
diff --git a/doc/gimple.md b/doc/gimple.md
new file mode 100644
index 000000000000..589cf3db7a68
--- /dev/null
+++ b/doc/gimple.md
@@ -0,0 +1,80 @@
+# GIMPLE
+
+You can see the full documentation about what GIMPLE is [here](https://gcc.gnu.org/onlinedocs/gccint/GIMPLE.html). In this document we will explain how to generate it.
+
+First, we'll copy the content from `gcc/gcc/testsuite/jit.dg/test-const-attribute.c` into a
+file named `local.c` and remove the content we're not interested into:
+
+```diff
+- /* { dg-do compile { target x86_64-*-* } } */
+...
+- /* We don't want set_options() in harness.h to set -O3 to see that the const
+-    attribute affects the optimizations. */
+- #define TEST_ESCHEWS_SET_OPTIONS
+- static void set_options (gcc_jit_context *ctxt, const char *argv0)
+- {
+-   // Set "-O3".
+-   gcc_jit_context_set_int_option(ctxt, GCC_JIT_INT_OPTION_OPTIMIZATION_LEVEL, 3);
+- }
+-
+- #define TEST_COMPILING_TO_FILE
+- #define OUTPUT_KIND      GCC_JIT_OUTPUT_KIND_ASSEMBLER
+- #define OUTPUT_FILENAME  "output-of-test-const-attribute.c.s"
+- #include "harness.h"
+...
+- /* { dg-final { jit-verify-output-file-was-created "" } } */
+- /* Check that the loop was optimized away */
+- /* { dg-final { jit-verify-assembler-output-not "jne" } } */
+```
+
+Then we'll add a `main` function which will call the `create_code` function but
+also add the calls we need to generate the GIMPLE:
+
+```C
+int main() {
+    gcc_jit_context *ctxt = gcc_jit_context_acquire();
+    create_code(ctxt, NULL);
+    gcc_jit_context_compile_to_file(ctxt, GCC_JIT_OUTPUT_KIND_DYNAMIC_LIBRARY, "tmp");
+    return 0;
+}
+```
+
+Then we can compile it by using:
+
+```console
+gcc const.c -I `pwd`/gcc/gcc/jit/ -L `pwd`/gcc-build/gcc -lgccjit -o out
+```
+
+And finally when you run it:
+
+```console
+LD_LIBRARY_PATH=`pwd`/gcc-build/gcc ./out
+```
+
+It should display:
+
+```c
+__attribute__((const))
+int xxx ()
+{
+  int D.3394;
+  int sum;
+  int x;
+
+  <D.3377>:
+  x = 45;
+  sum = 0;
+  goto loop_cond;
+  loop_cond:
+  x = x >> 1;
+  if (x != 0) goto after_loop; else goto loop_body;
+  loop_body:
+  _1 = foo (x);
+  _2 = _1 * 2;
+  x = x + _2;
+  goto loop_cond;
+  after_loop:
+  D.3394 = sum;
+  return D.3394;
+}
+```

From 14964ed2f6c8f19a444afe886d0c2ac68a831e45 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 24 Jul 2023 13:49:35 -0400
Subject: [PATCH 355/997] Update the IRC link to the link of the Matrix channel

---
 Readme.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Readme.md b/Readme.md
index b9a78b0277b7..fbe1a407733c 100644
--- a/Readme.md
+++ b/Readme.md
@@ -1,6 +1,6 @@
 # WIP libgccjit codegen backend for rust
 
-[![Chat on IRC](https://img.shields.io/badge/irc.libera.chat-%23rustc__codegen__gcc-blue.svg)](https://web.libera.chat/#rustc_codegen_gcc)
+[![Chat on IRC](https://img.shields.io/badge/matrix.org-%23rustc__codegen__gcc-blue.svg)](https://matrix.to/#/#rustc_codegen_gcc:matrix.org)
 
 This is a GCC codegen for rustc, which means it can be loaded by the existing rustc frontend, but benefits from GCC: more architectures are supported and GCC's optimizations are used.
 

From 52716d237cf00dab0d51b253bc080810570f47ef Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 27 Jul 2023 19:21:00 -0400
Subject: [PATCH 356/997] Add back link to IRC

---
 Readme.md | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Readme.md b/Readme.md
index fbe1a407733c..55daad6dcd01 100644
--- a/Readme.md
+++ b/Readme.md
@@ -1,6 +1,7 @@
 # WIP libgccjit codegen backend for rust
 
-[![Chat on IRC](https://img.shields.io/badge/matrix.org-%23rustc__codegen__gcc-blue.svg)](https://matrix.to/#/#rustc_codegen_gcc:matrix.org)
+[![Chat on IRC](https://img.shields.io/badge/irc.libera.chat-%23rustc__codegen__gcc-blue.svg)](https://web.libera.chat/#rustc_codegen_gcc)
+[![Chat on Matrix](https://img.shields.io/badge/matrix.org-%23rustc__codegen__gcc-blue.svg)](https://matrix.to/#/#rustc_codegen_gcc:matrix.org)
 
 This is a GCC codegen for rustc, which means it can be loaded by the existing rustc frontend, but benefits from GCC: more architectures are supported and GCC's optimizations are used.
 

From 43431e4db4d7e85f36dd7832a521b7b4d73e53ff Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 13 Aug 2023 09:37:32 -0400
Subject: [PATCH 357/997] Update to nightly-2023-08-12

---
 Cargo.lock                                          |  4 ++--
 build_sysroot/Cargo.toml                            |  1 +
 example/alloc_example.rs                            |  1 +
 .../arbitrary_self_types_pointers_and_wrappers.rs   |  1 +
 example/mini_core.rs                                |  2 +-
 example/mini_core_hello_world.rs                    |  2 +-
 example/mod_bench.rs                                |  1 +
 rust-toolchain                                      |  2 +-
 src/builder.rs                                      | 13 ++++---------
 9 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 1c8754bf675e..f537ab372662 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -35,7 +35,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#d6e52626cfc6f487094a5d5ac66302baf3439984"
+source = "git+https://github.com/antoyo/gccjit.rs#814eea1a0a098d08a113794225cad301622fd7b4"
 dependencies = [
  "gccjit_sys",
 ]
@@ -43,7 +43,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#d6e52626cfc6f487094a5d5ac66302baf3439984"
+source = "git+https://github.com/antoyo/gccjit.rs#814eea1a0a098d08a113794225cad301622fd7b4"
 dependencies = [
  "libc",
 ]
diff --git a/build_sysroot/Cargo.toml b/build_sysroot/Cargo.toml
index a84f86a82189..dca2ffdc24b6 100644
--- a/build_sysroot/Cargo.toml
+++ b/build_sysroot/Cargo.toml
@@ -2,6 +2,7 @@
 authors = ["bjorn3 <bjorn3@users.noreply.github.com>"]
 name = "sysroot"
 version = "0.0.0"
+resolver = "2"
 
 [dependencies]
 core = { path = "./sysroot_src/library/core" }
diff --git a/example/alloc_example.rs b/example/alloc_example.rs
index 754e7931412d..f1954a30cf86 100644
--- a/example/alloc_example.rs
+++ b/example/alloc_example.rs
@@ -1,5 +1,6 @@
 #![feature(start, core_intrinsics, alloc_error_handler, lang_items)]
 #![no_std]
+#![allow(internal_features)]
 
 extern crate alloc;
 extern crate alloc_system;
diff --git a/example/arbitrary_self_types_pointers_and_wrappers.rs b/example/arbitrary_self_types_pointers_and_wrappers.rs
index 3af0ba09e0ba..b299aa879740 100644
--- a/example/arbitrary_self_types_pointers_and_wrappers.rs
+++ b/example/arbitrary_self_types_pointers_and_wrappers.rs
@@ -2,6 +2,7 @@
 
 #![feature(arbitrary_self_types, unsize, coerce_unsized, dispatch_from_dyn)]
 #![feature(rustc_attrs)]
+#![allow(internal_features)]
 
 use std::{
     ops::{Deref, CoerceUnsized, DispatchFromDyn},
diff --git a/example/mini_core.rs b/example/mini_core.rs
index 0cd7e6047c20..58df29bb6255 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -4,7 +4,7 @@
     thread_local
 )]
 #![no_core]
-#![allow(dead_code)]
+#![allow(dead_code, internal_features)]
 
 #[no_mangle]
 unsafe extern "C" fn _Unwind_Resume() {
diff --git a/example/mini_core_hello_world.rs b/example/mini_core_hello_world.rs
index b93d68597063..c3aea5718154 100644
--- a/example/mini_core_hello_world.rs
+++ b/example/mini_core_hello_world.rs
@@ -5,7 +5,7 @@
     extern_types, thread_local
 )]
 #![no_core]
-#![allow(dead_code, non_camel_case_types)]
+#![allow(dead_code, internal_features, non_camel_case_types)]
 
 extern crate mini_core;
 
diff --git a/example/mod_bench.rs b/example/mod_bench.rs
index 5e2e7f25a2c0..c60bc7fb724e 100644
--- a/example/mod_bench.rs
+++ b/example/mod_bench.rs
@@ -1,5 +1,6 @@
 #![feature(start, core_intrinsics, lang_items)]
 #![no_std]
+#![allow(internal_features)]
 
 #[link(name = "c")]
 extern {}
diff --git a/rust-toolchain b/rust-toolchain
index ebb04d0069cf..1b60d7080077 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2023-06-19"
+channel = "nightly-2023-08-12"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
diff --git a/src/builder.rs b/src/builder.rs
index 0b1f2fe6a87d..05318be3e1bd 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -247,16 +247,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     fn check_store(&mut self, val: RValue<'gcc>, ptr: RValue<'gcc>) -> RValue<'gcc> {
-        let dest_ptr_ty = self.cx.val_ty(ptr).make_pointer(); // TODO(antoyo): make sure make_pointer() is okay here.
         let stored_ty = self.cx.val_ty(val);
         let stored_ptr_ty = self.cx.type_ptr_to(stored_ty);
-
-        if dest_ptr_ty == stored_ptr_ty {
-            ptr
-        }
-        else {
-            self.bitcast(ptr, stored_ptr_ty)
-        }
+        self.bitcast(ptr, stored_ptr_ty)
     }
 
     pub fn current_func(&self) -> Function<'gcc> {
@@ -916,7 +909,9 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             .add_eval(None, self.context.new_call(None, atomic_store, &[ptr, value, ordering]));
     }
 
-    fn gep(&mut self, _typ: Type<'gcc>, ptr: RValue<'gcc>, indices: &[RValue<'gcc>]) -> RValue<'gcc> {
+    fn gep(&mut self, typ: Type<'gcc>, ptr: RValue<'gcc>, indices: &[RValue<'gcc>]) -> RValue<'gcc> {
+        // NOTE: due to opaque pointers now being used, we need to cast here.
+        let ptr = self.context.new_cast(None, ptr, typ.make_pointer());
         let ptr_type = ptr.get_type();
         let mut pointee_type = ptr.get_type();
         // NOTE: we cannot use array indexing here like in inbounds_gep because array indexing is

From e3deac5c710b56846539635c4d986fd1875d7a9d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 13 Aug 2023 15:34:21 -0400
Subject: [PATCH 358/997] Fix tests

---
 src/base.rs               | 3 +++
 src/int.rs                | 8 +++++++-
 tests/run/abort1.rs       | 1 +
 tests/run/abort2.rs       | 1 +
 tests/run/array.rs        | 1 +
 tests/run/assign.rs       | 2 +-
 tests/run/closure.rs      | 1 +
 tests/run/condition.rs    | 1 +
 tests/run/empty_main.rs   | 1 +
 tests/run/exit.rs         | 1 +
 tests/run/exit_code.rs    | 1 +
 tests/run/fun_ptr.rs      | 1 +
 tests/run/int_overflow.rs | 2 +-
 tests/run/mut_ref.rs      | 2 +-
 tests/run/operations.rs   | 2 +-
 tests/run/ptr_cast.rs     | 1 +
 tests/run/return-tuple.rs | 1 +
 tests/run/slice.rs        | 1 +
 tests/run/static.rs       | 1 +
 tests/run/structs.rs      | 1 +
 tests/run/tuple.rs        | 1 +
 21 files changed, 29 insertions(+), 5 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index ac17d23555d6..17a08a636eab 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -144,6 +144,9 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
         if env::var("CG_GCCJIT_DUMP_RTL").as_deref() == Ok("1") {
             context.add_command_line_option("-fdump-rtl-vregs");
         }
+        if env::var("CG_GCCJIT_DUMP_RTL_ALL").as_deref() == Ok("1") {
+            context.add_command_line_option("-fdump-rtl-all");
+        }
         if env::var("CG_GCCJIT_DUMP_TREE_ALL").as_deref() == Ok("1") {
             context.add_command_line_option("-fdump-tree-all");
         }
diff --git a/src/int.rs b/src/int.rs
index 0cf1204791d3..2a6b1d17a3e5 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -546,7 +546,12 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     pub fn gcc_uint(&self, typ: Type<'gcc>, int: u64) -> RValue<'gcc> {
-        if self.is_native_int_type_or_bool(typ) {
+        if typ.is_u128(self) {
+            // FIXME(antoyo): libgccjit cannot create 128-bit values yet.
+            let num = self.context.new_rvalue_from_long(self.u64_type, int as i64);
+            self.gcc_int_cast(num, typ)
+        }
+        else if self.is_native_int_type_or_bool(typ) {
             self.context.new_rvalue_from_long(typ, u64::try_from(int).expect("u64::try_from") as i64)
         }
         else {
@@ -572,6 +577,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             }
         }
         else if typ.is_i128(self) {
+            // FIXME(antoyo): libgccjit cannot create 128-bit values yet.
             let num = self.context.new_rvalue_from_long(self.u64_type, num as u64 as i64);
             self.gcc_int_cast(num, typ)
         }
diff --git a/tests/run/abort1.rs b/tests/run/abort1.rs
index 25041d93e748..6cb3dd902030 100644
--- a/tests/run/abort1.rs
+++ b/tests/run/abort1.rs
@@ -4,6 +4,7 @@
 //   status: signal
 
 #![feature(auto_traits, lang_items, no_core, start, intrinsics)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/abort2.rs b/tests/run/abort2.rs
index e7443c8dbe5b..b7a928166b8e 100644
--- a/tests/run/abort2.rs
+++ b/tests/run/abort2.rs
@@ -4,6 +4,7 @@
 //   status: signal
 
 #![feature(auto_traits, lang_items, no_core, start, intrinsics)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/array.rs b/tests/run/array.rs
index 49b28d98f2fe..d2d60b75e63a 100644
--- a/tests/run/array.rs
+++ b/tests/run/array.rs
@@ -8,6 +8,7 @@
 //     10
 
 #![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/assign.rs b/tests/run/assign.rs
index 427c1a250339..241acea5e49c 100644
--- a/tests/run/assign.rs
+++ b/tests/run/assign.rs
@@ -5,7 +5,7 @@
 //     7 8
 //     10
 
-#![allow(unused_attributes)]
+#![allow(internal_features, unused_attributes)]
 #![feature(auto_traits, lang_items, no_core, start, intrinsics, track_caller)]
 
 #![no_std]
diff --git a/tests/run/closure.rs b/tests/run/closure.rs
index 8daa681abf7d..764c5b34426b 100644
--- a/tests/run/closure.rs
+++ b/tests/run/closure.rs
@@ -10,6 +10,7 @@
 
 #![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics,
     unboxed_closures)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/condition.rs b/tests/run/condition.rs
index b7a13081deae..ed17c19409ee 100644
--- a/tests/run/condition.rs
+++ b/tests/run/condition.rs
@@ -6,6 +6,7 @@
 //     1
 
 #![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/empty_main.rs b/tests/run/empty_main.rs
index c02cfd2a85f0..2d78ef12aa72 100644
--- a/tests/run/empty_main.rs
+++ b/tests/run/empty_main.rs
@@ -4,6 +4,7 @@
 //   status: 0
 
 #![feature(auto_traits, lang_items, no_core, start)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/exit.rs b/tests/run/exit.rs
index 956e53dd4aa6..bf1cbeef3020 100644
--- a/tests/run/exit.rs
+++ b/tests/run/exit.rs
@@ -4,6 +4,7 @@
 //   status: 2
 
 #![feature(auto_traits, lang_items, no_core, start, intrinsics)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/exit_code.rs b/tests/run/exit_code.rs
index eeab35209512..be7a233efdaa 100644
--- a/tests/run/exit_code.rs
+++ b/tests/run/exit_code.rs
@@ -4,6 +4,7 @@
 //   status: 1
 
 #![feature(auto_traits, lang_items, no_core, start)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/fun_ptr.rs b/tests/run/fun_ptr.rs
index 8a196f774c82..e0c30cada6be 100644
--- a/tests/run/fun_ptr.rs
+++ b/tests/run/fun_ptr.rs
@@ -5,6 +5,7 @@
 //   stdout: 1
 
 #![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/int_overflow.rs b/tests/run/int_overflow.rs
index c3fcb3c0a2a0..badcc0f76997 100644
--- a/tests/run/int_overflow.rs
+++ b/tests/run/int_overflow.rs
@@ -4,7 +4,7 @@
 //   stdout: Success
 //   status: signal
 
-#![allow(unused_attributes)]
+#![allow(internal_features, unused_attributes)]
 #![feature(auto_traits, lang_items, no_core, start, intrinsics)]
 
 #![no_std]
diff --git a/tests/run/mut_ref.rs b/tests/run/mut_ref.rs
index 2a2ea8b8bf0a..e843e2985373 100644
--- a/tests/run/mut_ref.rs
+++ b/tests/run/mut_ref.rs
@@ -7,7 +7,7 @@
 //     6
 //     11
 
-#![allow(unused_attributes)]
+#![allow(internal_features, unused_attributes)]
 #![feature(auto_traits, lang_items, no_core, start, intrinsics, track_caller)]
 
 #![no_std]
diff --git a/tests/run/operations.rs b/tests/run/operations.rs
index 67b9f241dbbb..cac6fdfca4a1 100644
--- a/tests/run/operations.rs
+++ b/tests/run/operations.rs
@@ -5,7 +5,7 @@
 //     39
 //     10
 
-#![allow(unused_attributes)]
+#![allow(internal_features, unused_attributes)]
 #![feature(auto_traits, lang_items, no_core, start, intrinsics, arbitrary_self_types)]
 
 #![no_std]
diff --git a/tests/run/ptr_cast.rs b/tests/run/ptr_cast.rs
index da8a8295d564..418661798286 100644
--- a/tests/run/ptr_cast.rs
+++ b/tests/run/ptr_cast.rs
@@ -5,6 +5,7 @@
 //   stdout: 1
 
 #![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/return-tuple.rs b/tests/run/return-tuple.rs
index 6fa10dca06f6..8d40deb8c85e 100644
--- a/tests/run/return-tuple.rs
+++ b/tests/run/return-tuple.rs
@@ -7,6 +7,7 @@
 //     42
 
 #![feature(auto_traits, lang_items, no_core, start, intrinsics)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/slice.rs b/tests/run/slice.rs
index 96f1c4792e58..25ff72549d49 100644
--- a/tests/run/slice.rs
+++ b/tests/run/slice.rs
@@ -5,6 +5,7 @@
 //   stdout: 5
 
 #![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/static.rs b/tests/run/static.rs
index 19201f1df266..2457bb1f4430 100644
--- a/tests/run/static.rs
+++ b/tests/run/static.rs
@@ -10,6 +10,7 @@
 //      1
 
 #![feature(auto_traits, lang_items, no_core, start, intrinsics)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/structs.rs b/tests/run/structs.rs
index 6c8884855ac3..d6455667400c 100644
--- a/tests/run/structs.rs
+++ b/tests/run/structs.rs
@@ -6,6 +6,7 @@
 //     2
 
 #![feature(auto_traits, lang_items, no_core, start, intrinsics)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/tuple.rs b/tests/run/tuple.rs
index 0b670bf26742..8a7d85ae867e 100644
--- a/tests/run/tuple.rs
+++ b/tests/run/tuple.rs
@@ -5,6 +5,7 @@
 //   stdout: 3
 
 #![feature(auto_traits, lang_items, no_core, start, intrinsics)]
+#![allow(internal_features)]
 
 #![no_std]
 #![no_core]

From 542c82ec37593a63eec9f8f25559f6fee641c833 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 15 Aug 2023 11:25:38 -0400
Subject: [PATCH 359/997] Fix for libgccjit 12

---
 Cargo.lock           | 57 ++++++++++--------------------------
 Cargo.toml           |  2 ++
 src/base.rs          |  6 +++-
 src/builder.rs       |  2 +-
 src/intrinsic/mod.rs |  4 +--
 src/lib.rs           | 69 ++++++++++++++++++++++++++++++++++----------
 6 files changed, 79 insertions(+), 61 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 9f007c569da8..7fcb124927a1 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -11,18 +11,18 @@ dependencies = [
  "memchr",
 ]
 
-[[package]]
-name = "autocfg"
-version = "1.1.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa"
-
 [[package]]
 name = "bitflags"
 version = "1.3.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a"
 
+[[package]]
+name = "bitflags"
+version = "2.4.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "b4682ae6287fcf752ecaabbfcc7b6f9b72aa33933dc23a554d853aea8eea8635"
+
 [[package]]
 name = "cc"
 version = "1.0.79"
@@ -58,12 +58,9 @@ dependencies = [
 
 [[package]]
 name = "fastrand"
-version = "1.9.0"
+version = "2.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e51093e27b0797c359783294ca4f0a911c270184cb10f85783b118614a1501be"
-dependencies = [
- "instant",
-]
+checksum = "6999dc1837253364c2ebb0704ba97994bd874e8f195d665c50b7548f6ea92764"
 
 [[package]]
 name = "fm"
@@ -105,26 +102,6 @@ version = "0.3.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "fed44880c466736ef9a5c5b5facefb5ed0785676d0c02d612db14e54f0d84286"
 
-[[package]]
-name = "instant"
-version = "0.1.12"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7a5bbe824c507c5da5956355e86a746d82e0e1464f65d862cc5e71da70e94b2c"
-dependencies = [
- "cfg-if",
-]
-
-[[package]]
-name = "io-lifetimes"
-version = "1.0.11"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "eae7b9aee968036d54dce06cebaefd919e4472e753296daccd6d344e3e2df0c2"
-dependencies = [
- "hermit-abi",
- "libc",
- "windows-sys",
-]
-
 [[package]]
 name = "lang_tester"
 version = "0.3.13"
@@ -149,9 +126,9 @@ checksum = "b4668fb0ea861c1df094127ac5f1da3409a82116a4ba74fca2e58ef927159bb3"
 
 [[package]]
 name = "linux-raw-sys"
-version = "0.3.8"
+version = "0.4.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ef53942eb7bf7ff43a617b3e2c1c4a5ecf5944a7c1bc12d7ee39bbb15e5c1519"
+checksum = "57bcfdad1b858c2db7c38303a6d2ad4dfaf5eb53dfeb0910128b2c26d6158503"
 
 [[package]]
 name = "memchr"
@@ -175,7 +152,7 @@ version = "0.3.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "567664f262709473930a4bf9e51bf2ebf3348f2e748ccc50dea20646858f8f29"
 dependencies = [
- "bitflags",
+ "bitflags 1.3.2",
 ]
 
 [[package]]
@@ -207,13 +184,12 @@ dependencies = [
 
 [[package]]
 name = "rustix"
-version = "0.37.22"
+version = "0.38.8"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8818fa822adcc98b18fedbb3632a6a33213c070556b5aa7c4c8cc21cff565c4c"
+checksum = "19ed4fa021d81c8392ce04db050a3da9a60299050b7ae1cf482d862b54a7218f"
 dependencies = [
- "bitflags",
+ "bitflags 2.4.0",
  "errno",
- "io-lifetimes",
  "libc",
  "linux-raw-sys",
  "windows-sys",
@@ -236,11 +212,10 @@ checksum = "a507befe795404456341dfab10cef66ead4c041f62b8b11bbb92bffe5d0953e0"
 
 [[package]]
 name = "tempfile"
-version = "3.6.0"
+version = "3.7.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "31c0432476357e58790aaa47a8efb0c5138f137343f3b5f23bd36a27e3b0a6d6"
+checksum = "dc02fddf48964c42031a0b3fe0428320ecf3a73c401040fc0096f97794310651"
 dependencies = [
- "autocfg",
  "cfg-if",
  "fastrand",
  "redox_syscall",
diff --git a/Cargo.toml b/Cargo.toml
index 81066d9ce1f0..3bf629fc6621 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -28,6 +28,8 @@ gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
 #gccjit = { path = "../gccjit.rs" }
 
 smallvec = { version = "1.6.1", features = ["union", "may_dangle"] }
+# TODO(antoyo): make tempfile optional.
+tempfile = "3.7.1"
 
 [dev-dependencies]
 lang_tester = "0.3.9"
diff --git a/src/base.rs b/src/base.rs
index 17a08a636eab..bf0309fea148 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -6,8 +6,10 @@ use std::time::Instant;
 use gccjit::{
     Context,
     FunctionType,
-    GlobalKind, TargetInfo,
+    GlobalKind,
 };
+#[cfg(feature="master")]
+use gccjit::TargetInfo;
 use rustc_middle::dep_graph;
 use rustc_middle::ty::TyCtxt;
 #[cfg(feature="master")]
@@ -20,6 +22,8 @@ use rustc_codegen_ssa::traits::DebugInfoMethods;
 use rustc_session::config::DebugInfo;
 use rustc_span::Symbol;
 
+#[cfg(not(feature="master"))]
+use crate::TargetInfo;
 use crate::GccContext;
 use crate::builder::Builder;
 use crate::context::CodegenCx;
diff --git a/src/builder.rs b/src/builder.rs
index 05318be3e1bd..b0feb99e3c6f 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -493,7 +493,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     #[cfg(not(feature="master"))]
-    fn invoke(&mut self, typ: Type<'gcc>, fn_attrs: &CodegenFnAttrs, fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
+    fn invoke(&mut self, typ: Type<'gcc>, fn_attrs: Option<&CodegenFnAttrs>, fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
         let call_site = self.call(typ, fn_attrs, None, func, args, None);
         let condition = self.context.new_rvalue_from_int(self.bool_type, 1);
         self.llbb().end_with_conditional(None, condition, then, catch);
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index f8c32c6dbbb5..fab5cba6476e 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -10,9 +10,9 @@ use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::common::IntPredicate;
 use rustc_codegen_ssa::mir::operand::{OperandRef, OperandValue};
 use rustc_codegen_ssa::mir::place::PlaceRef;
-use rustc_codegen_ssa::traits::{ArgAbiMethods, BaseTypeMethods, BuilderMethods, ConstMethods, IntrinsicCallMethods};
+use rustc_codegen_ssa::traits::{ArgAbiMethods, BuilderMethods, ConstMethods, IntrinsicCallMethods};
 #[cfg(feature="master")]
-use rustc_codegen_ssa::traits::MiscMethods;
+use rustc_codegen_ssa::traits::{BaseTypeMethods, MiscMethods};
 use rustc_codegen_ssa::errors::InvalidMonomorphization;
 use rustc_middle::bug;
 use rustc_middle::ty::{self, Instance, Ty};
diff --git a/src/lib.rs b/src/lib.rs
index a74d503d8c83..7b55a4e4082e 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -64,9 +64,15 @@ mod type_of;
 
 use std::any::Any;
 use std::sync::Arc;
+#[cfg(not(feature="master"))]
+use std::sync::atomic::{AtomicBool, Ordering};
 
 use crate::errors::LTONotSupported;
-use gccjit::{Context, OptimizationLevel, TargetInfo};
+use gccjit::{Context, OptimizationLevel};
+#[cfg(feature="master")]
+use gccjit::TargetInfo;
+#[cfg(not(feature="master"))]
+use gccjit::CType;
 use rustc_ast::expand::allocator::AllocatorKind;
 use rustc_codegen_ssa::{CodegenResults, CompiledModule, ModuleCodegen};
 use rustc_codegen_ssa::base::codegen_crate;
@@ -85,6 +91,8 @@ use rustc_session::config::{Lto, OptLevel, OutputFilenames};
 use rustc_session::Session;
 use rustc_span::Symbol;
 use rustc_span::fatal_error::FatalError;
+#[cfg(not(feature="master"))]
+use tempfile::TempDir;
 
 fluent_messages! { "../messages.ftl" }
 
@@ -98,6 +106,23 @@ impl<F: Fn() -> String> Drop for PrintOnPanic<F> {
     }
 }
 
+#[cfg(not(feature="master"))]
+#[derive(Debug)]
+pub struct TargetInfo {
+    supports_128bit_integers: AtomicBool,
+}
+
+#[cfg(not(feature="master"))]
+impl TargetInfo {
+    fn cpu_supports(&self, _feature: &str) -> bool {
+        false
+    }
+
+    fn supports_128bit_int(&self) -> bool {
+        self.supports_128bit_integers.load(Ordering::SeqCst)
+    }
+}
+
 #[derive(Clone)]
 pub struct GccCodegenBackend {
     target_info: Arc<TargetInfo>,
@@ -114,6 +139,18 @@ impl CodegenBackend for GccCodegenBackend {
         if sess.lto() != Lto::No {
             sess.emit_warning(LTONotSupported {});
         }
+
+        #[cfg(not(feature="master"))]
+        {
+            let temp_dir = TempDir::new().expect("cannot create temporary directory");
+            let temp_file = temp_dir.into_path().join("result.asm");
+            let check_context = Context::default();
+            check_context.set_print_errors_to_stderr(false);
+            let _int128_ty = check_context.new_c_type(CType::UInt128t);
+            // NOTE: we cannot just call compile() as this would require other files than libgccjit.so.
+            check_context.compile_to_file(gccjit::OutputKind::Assembler, temp_file.to_str().expect("path to str"));
+            self.target_info.supports_128bit_integers.store(check_context.get_last_error() == Ok(None), Ordering::SeqCst);
+        }
     }
 
     fn provide(&self, providers: &mut Providers) {
@@ -266,14 +303,21 @@ impl WriteBackendMethods for GccCodegenBackend {
 /// This is the entrypoint for a hot plugged rustc_codegen_gccjit
 #[no_mangle]
 pub fn __rustc_codegen_backend() -> Box<dyn CodegenBackend> {
-    // Get the native arch and check whether the target supports 128-bit integers.
-    let context = Context::default();
-    let arch = context.get_target_info().arch().unwrap();
+    #[cfg(feature="master")]
+    let target_info = {
+        // Get the native arch and check whether the target supports 128-bit integers.
+        let context = Context::default();
+        let arch = context.get_target_info().arch().unwrap();
 
-    // Get the second TargetInfo with the correct CPU features by setting the arch.
-    let context = Context::default();
-    context.add_driver_option(&format!("-march={}", arch.to_str().unwrap()));
-    let target_info = Arc::new(context.get_target_info());
+        // Get the second TargetInfo with the correct CPU features by setting the arch.
+        let context = Context::default();
+        context.add_driver_option(&format!("-march={}", arch.to_str().unwrap()));
+        Arc::new(context.get_target_info())
+    };
+    #[cfg(not(feature="master"))]
+    let target_info = Arc::new(TargetInfo {
+        supports_128bit_integers: AtomicBool::new(false),
+    });
 
     Box::new(GccCodegenBackend {
         target_info,
@@ -319,14 +363,7 @@ pub fn target_features(sess: &Session, allow_unstable: bool, target_info: &Arc<T
             },
         )
         .filter(|_feature| {
-            #[cfg(feature="master")]
-            {
-                target_info.cpu_supports(_feature)
-            }
-            #[cfg(not(feature="master"))]
-            {
-                false
-            }
+            target_info.cpu_supports(_feature)
             /*
                adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512ifma,
                avx512pf, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpopcntdq,

From 53d89e891836e901c6e8845cc064a4beda5090bd Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 15 Aug 2023 12:41:35 -0400
Subject: [PATCH 360/997] Fix tests

---
 .github/workflows/stdarch.yml | 4 ++--
 failing-ui-tests.txt          | 3 +++
 test.sh                       | 6 +++++-
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 556c64448332..21b6a0d3a935 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -133,10 +133,10 @@ jobs:
       if: ${{ !matrix.cargo_runner }}
       run: |
         cd build_sysroot/sysroot_src/library/stdarch/
-        CHANNEL=release TARGET=x86_64-unknown-linux-gnu ../../../../cargo.sh test
+        CHANNEL=release TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../cargo.sh test
 
     - name: Run stdarch tests
       if: ${{ matrix.cargo_runner }}
       run: |
         cd build_sysroot/sysroot_src/library/stdarch/
-        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu ../../../../cargo.sh test -- --skip rtm --skip tbm --skip sse4a
+        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../cargo.sh test -- --skip rtm --skip tbm --skip sse4a
diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 69f57036b01e..fe0df3347bbf 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -67,3 +67,6 @@ tests/ui/issues/issue-29948.rs
 tests/ui/panic-while-printing.rs
 tests/ui/enum-discriminant/get_discr.rs
 tests/ui/panics/nested_panic_caught.rs
+tests/ui/simd/intrinsic/generic-bswap-byte.rs
+tests/ui/const_prop/ice-issue-111353.rs
+tests/ui/process/println-with-broken-pipe.rs
diff --git a/test.sh b/test.sh
index 592997b8ab9d..1054fdf7ea11 100755
--- a/test.sh
+++ b/test.sh
@@ -346,7 +346,9 @@ function test_rustc() {
     git checkout -- tests/ui/issues/auxiliary/issue-3136-a.rs # contains //~ERROR, but shouldn't be removed
 
     rm -r tests/ui/{abi*,extern/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,chalkify/bugs/,test*,*lto*.rs,consts/const-float-bits-reject-conv.rs,consts/issue-miri-1910.rs} || true
-    rm tests/ui/mir/mir_heavy_promoted.rs # this tests is oom-killed in the CI.
+    rm tests/ui/mir/mir_heavy_promoted.rs # this test is oom-killed in the CI.
+    # Tests generating errors.
+    rm tests/ui/consts/const-eval/nonnull_as_ref_ub.rs tests/ui/consts/issue-94675.rs
     for test in $(rg --files-with-matches "thread|lto" tests/ui); do
       rm $test
     done
@@ -354,6 +356,8 @@ function test_rustc() {
     git checkout tests/ui/type-alias-impl-trait/auxiliary/cross_crate_ice.rs
     git checkout tests/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
     git checkout tests/ui/macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs
+    git checkout tests/ui/imports/ambiguous-1.rs
+    git checkout tests/ui/imports/ambiguous-4-extern.rs
 
     RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot"
 

From 033dc1f2080551c0f27d24550444d79d8d945ee2 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 11 Aug 2023 15:39:01 +0200
Subject: [PATCH 361/997] Regenerate intrinsics

---
 src/intrinsic/archs.rs | 114 ++++++++++++++++++++++++++++++++++++++---
 1 file changed, 106 insertions(+), 8 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 438eab78943a..e01299d32fda 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -2254,6 +2254,42 @@ match name {
     "llvm.hexagon.prefetch" => "__builtin_HEXAGON_prefetch",
     "llvm.hexagon.vmemcpy" => "__builtin_hexagon_vmemcpy",
     "llvm.hexagon.vmemset" => "__builtin_hexagon_vmemset",
+    // loongarch
+    "llvm.loongarch.asrtgt.d" => "__builtin_loongarch_asrtgt_d",
+    "llvm.loongarch.asrtle.d" => "__builtin_loongarch_asrtle_d",
+    "llvm.loongarch.break" => "__builtin_loongarch_break",
+    "llvm.loongarch.cacop.d" => "__builtin_loongarch_cacop_d",
+    "llvm.loongarch.cacop.w" => "__builtin_loongarch_cacop_w",
+    "llvm.loongarch.cpucfg" => "__builtin_loongarch_cpucfg",
+    "llvm.loongarch.crc.w.b.w" => "__builtin_loongarch_crc_w_b_w",
+    "llvm.loongarch.crc.w.d.w" => "__builtin_loongarch_crc_w_d_w",
+    "llvm.loongarch.crc.w.h.w" => "__builtin_loongarch_crc_w_h_w",
+    "llvm.loongarch.crc.w.w.w" => "__builtin_loongarch_crc_w_w_w",
+    "llvm.loongarch.crcc.w.b.w" => "__builtin_loongarch_crcc_w_b_w",
+    "llvm.loongarch.crcc.w.d.w" => "__builtin_loongarch_crcc_w_d_w",
+    "llvm.loongarch.crcc.w.h.w" => "__builtin_loongarch_crcc_w_h_w",
+    "llvm.loongarch.crcc.w.w.w" => "__builtin_loongarch_crcc_w_w_w",
+    "llvm.loongarch.csrrd.d" => "__builtin_loongarch_csrrd_d",
+    "llvm.loongarch.csrrd.w" => "__builtin_loongarch_csrrd_w",
+    "llvm.loongarch.csrwr.d" => "__builtin_loongarch_csrwr_d",
+    "llvm.loongarch.csrwr.w" => "__builtin_loongarch_csrwr_w",
+    "llvm.loongarch.csrxchg.d" => "__builtin_loongarch_csrxchg_d",
+    "llvm.loongarch.csrxchg.w" => "__builtin_loongarch_csrxchg_w",
+    "llvm.loongarch.dbar" => "__builtin_loongarch_dbar",
+    "llvm.loongarch.ibar" => "__builtin_loongarch_ibar",
+    "llvm.loongarch.iocsrrd.b" => "__builtin_loongarch_iocsrrd_b",
+    "llvm.loongarch.iocsrrd.d" => "__builtin_loongarch_iocsrrd_d",
+    "llvm.loongarch.iocsrrd.h" => "__builtin_loongarch_iocsrrd_h",
+    "llvm.loongarch.iocsrrd.w" => "__builtin_loongarch_iocsrrd_w",
+    "llvm.loongarch.iocsrwr.b" => "__builtin_loongarch_iocsrwr_b",
+    "llvm.loongarch.iocsrwr.d" => "__builtin_loongarch_iocsrwr_d",
+    "llvm.loongarch.iocsrwr.h" => "__builtin_loongarch_iocsrwr_h",
+    "llvm.loongarch.iocsrwr.w" => "__builtin_loongarch_iocsrwr_w",
+    "llvm.loongarch.lddir.d" => "__builtin_loongarch_lddir_d",
+    "llvm.loongarch.ldpte.d" => "__builtin_loongarch_ldpte_d",
+    "llvm.loongarch.movfcsr2gr" => "__builtin_loongarch_movfcsr2gr",
+    "llvm.loongarch.movgr2fcsr" => "__builtin_loongarch_movgr2fcsr",
+    "llvm.loongarch.syscall" => "__builtin_loongarch_syscall",
     // mips
     "llvm.mips.absq.s.ph" => "__builtin_mips_absq_s_ph",
     "llvm.mips.absq.s.qb" => "__builtin_mips_absq_s_qb",
@@ -2954,6 +2990,8 @@ match name {
     "llvm.nvvm.barrier0.and" => "__nvvm_bar0_and",
     "llvm.nvvm.barrier0.or" => "__nvvm_bar0_or",
     "llvm.nvvm.barrier0.popc" => "__nvvm_bar0_popc",
+    "llvm.nvvm.bf2h.rn" => "__nvvm_bf2h_rn",
+    "llvm.nvvm.bf2h.rn.ftz" => "__nvvm_bf2h_rn_ftz",
     "llvm.nvvm.bitcast.d2ll" => "__nvvm_bitcast_d2ll",
     "llvm.nvvm.bitcast.f2i" => "__nvvm_bitcast_f2i",
     "llvm.nvvm.bitcast.i2f" => "__nvvm_bitcast_i2f",
@@ -3016,8 +3054,6 @@ match name {
     "llvm.nvvm.div.rz.ftz.f" => "__nvvm_div_rz_ftz_f",
     "llvm.nvvm.ex2.approx.d" => "__nvvm_ex2_approx_d",
     "llvm.nvvm.ex2.approx.f" => "__nvvm_ex2_approx_f",
-    "llvm.nvvm.ex2.approx.f16" => "__nvvm_ex2_approx_f16",
-    "llvm.nvvm.ex2.approx.f16x2" => "__nvvm_ex2_approx_f16x2",
     "llvm.nvvm.ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f",
     "llvm.nvvm.f2bf16.rn" => "__nvvm_f2bf16_rn",
     "llvm.nvvm.f2bf16.rn.relu" => "__nvvm_f2bf16_rn_relu",
@@ -3079,11 +3115,17 @@ match name {
     "llvm.nvvm.fma.rn.bf16x2" => "__nvvm_fma_rn_bf16x2",
     "llvm.nvvm.fma.rn.d" => "__nvvm_fma_rn_d",
     "llvm.nvvm.fma.rn.f" => "__nvvm_fma_rn_f",
-    "llvm.nvvm.fma.rn.f16" => "__nvvm_fma_rn_f16",
-    "llvm.nvvm.fma.rn.f16x2" => "__nvvm_fma_rn_f16x2",
+    "llvm.nvvm.fma.rn.ftz.bf16" => "__nvvm_fma_rn_ftz_bf16",
+    "llvm.nvvm.fma.rn.ftz.bf16x2" => "__nvvm_fma_rn_ftz_bf16x2",
     "llvm.nvvm.fma.rn.ftz.f" => "__nvvm_fma_rn_ftz_f",
+    "llvm.nvvm.fma.rn.ftz.relu.bf16" => "__nvvm_fma_rn_ftz_relu_bf16",
+    "llvm.nvvm.fma.rn.ftz.relu.bf16x2" => "__nvvm_fma_rn_ftz_relu_bf16x2",
+    "llvm.nvvm.fma.rn.ftz.sat.bf16" => "__nvvm_fma_rn_ftz_sat_bf16",
+    "llvm.nvvm.fma.rn.ftz.sat.bf16x2" => "__nvvm_fma_rn_ftz_sat_bf16x2",
     "llvm.nvvm.fma.rn.relu.bf16" => "__nvvm_fma_rn_relu_bf16",
     "llvm.nvvm.fma.rn.relu.bf16x2" => "__nvvm_fma_rn_relu_bf16x2",
+    "llvm.nvvm.fma.rn.sat.bf16" => "__nvvm_fma_rn_sat_bf16",
+    "llvm.nvvm.fma.rn.sat.bf16x2" => "__nvvm_fma_rn_sat_bf16x2",
     "llvm.nvvm.fma.rp.d" => "__nvvm_fma_rp_d",
     "llvm.nvvm.fma.rp.f" => "__nvvm_fma_rp_f",
     "llvm.nvvm.fma.rp.ftz.f" => "__nvvm_fma_rp_ftz_f",
@@ -3094,11 +3136,17 @@ match name {
     "llvm.nvvm.fmax.bf16x2" => "__nvvm_fmax_bf16x2",
     "llvm.nvvm.fmax.d" => "__nvvm_fmax_d",
     "llvm.nvvm.fmax.f" => "__nvvm_fmax_f",
-    "llvm.nvvm.fmax.f16" => "__nvvm_fmax_f16",
-    "llvm.nvvm.fmax.f16x2" => "__nvvm_fmax_f16x2",
+    "llvm.nvvm.fmax.ftz.bf16" => "__nvvm_fmax_ftz_bf16",
+    "llvm.nvvm.fmax.ftz.bf16x2" => "__nvvm_fmax_ftz_bf16x2",
     "llvm.nvvm.fmax.ftz.f" => "__nvvm_fmax_ftz_f",
+    "llvm.nvvm.fmax.ftz.nan.bf16" => "__nvvm_fmax_ftz_nan_bf16",
+    "llvm.nvvm.fmax.ftz.nan.bf16x2" => "__nvvm_fmax_ftz_nan_bf16x2",
     "llvm.nvvm.fmax.ftz.nan.f" => "__nvvm_fmax_ftz_nan_f",
+    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.bf16" => "__nvvm_fmax_ftz_nan_xorsign_abs_bf16",
+    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.bf16x2" => "__nvvm_fmax_ftz_nan_xorsign_abs_bf16x2",
     "llvm.nvvm.fmax.ftz.nan.xorsign.abs.f" => "__nvvm_fmax_ftz_nan_xorsign_abs_f",
+    "llvm.nvvm.fmax.ftz.xorsign.abs.bf16" => "__nvvm_fmax_ftz_xorsign_abs_bf16",
+    "llvm.nvvm.fmax.ftz.xorsign.abs.bf16x2" => "__nvvm_fmax_ftz_xorsign_abs_bf16x2",
     "llvm.nvvm.fmax.ftz.xorsign.abs.f" => "__nvvm_fmax_ftz_xorsign_abs_f",
     "llvm.nvvm.fmax.nan.bf16" => "__nvvm_fmax_nan_bf16",
     "llvm.nvvm.fmax.nan.bf16x2" => "__nvvm_fmax_nan_bf16x2",
@@ -3113,11 +3161,17 @@ match name {
     "llvm.nvvm.fmin.bf16x2" => "__nvvm_fmin_bf16x2",
     "llvm.nvvm.fmin.d" => "__nvvm_fmin_d",
     "llvm.nvvm.fmin.f" => "__nvvm_fmin_f",
-    "llvm.nvvm.fmin.f16" => "__nvvm_fmin_f16",
-    "llvm.nvvm.fmin.f16x2" => "__nvvm_fmin_f16x2",
+    "llvm.nvvm.fmin.ftz.bf16" => "__nvvm_fmin_ftz_bf16",
+    "llvm.nvvm.fmin.ftz.bf16x2" => "__nvvm_fmin_ftz_bf16x2",
     "llvm.nvvm.fmin.ftz.f" => "__nvvm_fmin_ftz_f",
+    "llvm.nvvm.fmin.ftz.nan.bf16" => "__nvvm_fmin_ftz_nan_bf16",
+    "llvm.nvvm.fmin.ftz.nan.bf16x2" => "__nvvm_fmin_ftz_nan_bf16x2",
     "llvm.nvvm.fmin.ftz.nan.f" => "__nvvm_fmin_ftz_nan_f",
+    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.bf16" => "__nvvm_fmin_ftz_nan_xorsign_abs_bf16",
+    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.bf16x2" => "__nvvm_fmin_ftz_nan_xorsign_abs_bf16x2",
     "llvm.nvvm.fmin.ftz.nan.xorsign.abs.f" => "__nvvm_fmin_ftz_nan_xorsign_abs_f",
+    "llvm.nvvm.fmin.ftz.xorsign.abs.bf16" => "__nvvm_fmin_ftz_xorsign_abs_bf16",
+    "llvm.nvvm.fmin.ftz.xorsign.abs.bf16x2" => "__nvvm_fmin_ftz_xorsign_abs_bf16x2",
     "llvm.nvvm.fmin.ftz.xorsign.abs.f" => "__nvvm_fmin_ftz_xorsign_abs_f",
     "llvm.nvvm.fmin.nan.bf16" => "__nvvm_fmin_nan_bf16",
     "llvm.nvvm.fmin.nan.bf16x2" => "__nvvm_fmin_nan_bf16x2",
@@ -4213,6 +4267,28 @@ match name {
     "llvm.r600.read.tgid.x" => "__builtin_r600_read_tgid_x",
     "llvm.r600.read.tgid.y" => "__builtin_r600_read_tgid_y",
     "llvm.r600.read.tgid.z" => "__builtin_r600_read_tgid_z",
+    // riscv
+    "llvm.riscv.aes32dsi" => "__builtin_riscv_aes32dsi",
+    "llvm.riscv.aes32dsmi" => "__builtin_riscv_aes32dsmi",
+    "llvm.riscv.aes32esi" => "__builtin_riscv_aes32esi",
+    "llvm.riscv.aes32esmi" => "__builtin_riscv_aes32esmi",
+    "llvm.riscv.aes64ds" => "__builtin_riscv_aes64ds",
+    "llvm.riscv.aes64dsm" => "__builtin_riscv_aes64dsm",
+    "llvm.riscv.aes64es" => "__builtin_riscv_aes64es",
+    "llvm.riscv.aes64esm" => "__builtin_riscv_aes64esm",
+    "llvm.riscv.aes64im" => "__builtin_riscv_aes64im",
+    "llvm.riscv.aes64ks1i" => "__builtin_riscv_aes64ks1i",
+    "llvm.riscv.aes64ks2" => "__builtin_riscv_aes64ks2",
+    "llvm.riscv.sha512sig0" => "__builtin_riscv_sha512sig0",
+    "llvm.riscv.sha512sig0h" => "__builtin_riscv_sha512sig0h",
+    "llvm.riscv.sha512sig0l" => "__builtin_riscv_sha512sig0l",
+    "llvm.riscv.sha512sig1" => "__builtin_riscv_sha512sig1",
+    "llvm.riscv.sha512sig1h" => "__builtin_riscv_sha512sig1h",
+    "llvm.riscv.sha512sig1l" => "__builtin_riscv_sha512sig1l",
+    "llvm.riscv.sha512sum0" => "__builtin_riscv_sha512sum0",
+    "llvm.riscv.sha512sum0r" => "__builtin_riscv_sha512sum0r",
+    "llvm.riscv.sha512sum1" => "__builtin_riscv_sha512sum1",
+    "llvm.riscv.sha512sum1r" => "__builtin_riscv_sha512sum1r",
     // s390
     "llvm.s390.efpc" => "__builtin_s390_efpc",
     "llvm.s390.etnd" => "__builtin_tx_nesting_depth",
@@ -5912,6 +5988,18 @@ match name {
     "llvm.x86.avx2.vpdpbuud.256" => "__builtin_ia32_vpdpbuud256",
     "llvm.x86.avx2.vpdpbuuds.128" => "__builtin_ia32_vpdpbuuds128",
     "llvm.x86.avx2.vpdpbuuds.256" => "__builtin_ia32_vpdpbuuds256",
+    "llvm.x86.avx2.vpdpwsud.128" => "__builtin_ia32_vpdpwsud128",
+    "llvm.x86.avx2.vpdpwsud.256" => "__builtin_ia32_vpdpwsud256",
+    "llvm.x86.avx2.vpdpwsuds.128" => "__builtin_ia32_vpdpwsuds128",
+    "llvm.x86.avx2.vpdpwsuds.256" => "__builtin_ia32_vpdpwsuds256",
+    "llvm.x86.avx2.vpdpwusd.128" => "__builtin_ia32_vpdpwusd128",
+    "llvm.x86.avx2.vpdpwusd.256" => "__builtin_ia32_vpdpwusd256",
+    "llvm.x86.avx2.vpdpwusds.128" => "__builtin_ia32_vpdpwusds128",
+    "llvm.x86.avx2.vpdpwusds.256" => "__builtin_ia32_vpdpwusds256",
+    "llvm.x86.avx2.vpdpwuud.128" => "__builtin_ia32_vpdpwuud128",
+    "llvm.x86.avx2.vpdpwuud.256" => "__builtin_ia32_vpdpwuud256",
+    "llvm.x86.avx2.vpdpwuuds.128" => "__builtin_ia32_vpdpwuuds128",
+    "llvm.x86.avx2.vpdpwuuds.256" => "__builtin_ia32_vpdpwuuds256",
     "llvm.x86.avx2.vperm2i128" => "__builtin_ia32_permti256",
     "llvm.x86.avx512.add.pd.512" => "__builtin_ia32_addpd512",
     "llvm.x86.avx512.add.ps.512" => "__builtin_ia32_addps512",
@@ -7909,6 +7997,16 @@ match name {
     "llvm.x86.vgf2p8mulb.128" => "__builtin_ia32_vgf2p8mulb_v16qi",
     "llvm.x86.vgf2p8mulb.256" => "__builtin_ia32_vgf2p8mulb_v32qi",
     "llvm.x86.vgf2p8mulb.512" => "__builtin_ia32_vgf2p8mulb_v64qi",
+    "llvm.x86.vsha512msg1" => "__builtin_ia32_vsha512msg1",
+    "llvm.x86.vsha512msg2" => "__builtin_ia32_vsha512msg2",
+    "llvm.x86.vsha512rnds2" => "__builtin_ia32_vsha512rnds2",
+    "llvm.x86.vsm3msg1" => "__builtin_ia32_vsm3msg1",
+    "llvm.x86.vsm3msg2" => "__builtin_ia32_vsm3msg2",
+    "llvm.x86.vsm3rnds2" => "__builtin_ia32_vsm3rnds2",
+    "llvm.x86.vsm4key4128" => "__builtin_ia32_vsm4key4128",
+    "llvm.x86.vsm4key4256" => "__builtin_ia32_vsm4key4256",
+    "llvm.x86.vsm4rnds4128" => "__builtin_ia32_vsm4rnds4128",
+    "llvm.x86.vsm4rnds4256" => "__builtin_ia32_vsm4rnds4256",
     "llvm.x86.wbinvd" => "__builtin_ia32_wbinvd",
     "llvm.x86.wbnoinvd" => "__builtin_ia32_wbnoinvd",
     "llvm.x86.wrfsbase.32" => "__builtin_ia32_wrfsbase32",

From d929cf8ef16cce18b9446a718c6f13e735c2f290 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 11 Aug 2023 15:40:36 +0200
Subject: [PATCH 362/997] Display run commands when using `llvm-tblgen`

---
 tools/generate_intrinsics.py | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index 83abe145e64f..90fb7bfad27c 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -46,10 +46,10 @@ def convert_to_string(content):
 
 
 def extract_instrinsics_from_llvm(llvm_path, intrinsics):
-    p = subprocess.Popen(
-        ["llvm-tblgen", "llvm/IR/Intrinsics.td"],
-        cwd=os.path.join(llvm_path, "llvm/include"),
-        stdout=subprocess.PIPE)
+    command = ["llvm-tblgen", "llvm/IR/Intrinsics.td"]
+    cwd = os.path.join(llvm_path, "llvm/include")
+    print("=> Running command `{}` from `{}`".format(command, cwd))
+    p = subprocess.Popen(command, cwd=cwd, stdout=subprocess.PIPE)
     output, err = p.communicate()
     lines = convert_to_string(output).splitlines()
     pos = 0

From 4cbf1c76ff0d8b35c08a841aadee52f26be564d1 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 15 Aug 2023 22:28:52 +0200
Subject: [PATCH 363/997] Fix command to run custom rustc

---
 Readme.md | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/Readme.md b/Readme.md
index 55daad6dcd01..254aad611238 100644
--- a/Readme.md
+++ b/Readme.md
@@ -77,12 +77,16 @@ $ ./test.sh --release
 
 ## Usage
 
-`$cg_gccjit_dir` is the directory you cloned this repo into in the following instructions.
+`$CG_GCCJIT_DIR` is the directory you cloned this repo into in the following instructions:
+
+```bash
+export CG_GCCJIT_DIR=[the full path to rustc_codegen_gcc]
+```
 
 ### Cargo
 
 ```bash
-$ CHANNEL="release" $cg_gccjit_dir/cargo.sh run
+$ CHANNEL="release" $CG_GCCJIT_DIR/cargo.sh run
 ```
 
 If you compiled cg_gccjit in debug mode (aka you didn't pass `--release` to `./test.sh`) you should use `CHANNEL="debug"` instead or omit `CHANNEL="release"` completely.
@@ -92,7 +96,7 @@ If you compiled cg_gccjit in debug mode (aka you didn't pass `--release` to `./t
 > You should prefer using the Cargo method.
 
 ```bash
-$ rustc +$(cat $cg_gccjit_dir/rust-toolchain) -Cpanic=abort -Zcodegen-backend=$cg_gccjit_dir/target/release/librustc_codegen_gcc.so --sysroot $cg_gccjit_dir/build_sysroot/sysroot my_crate.rs
+$ LIBRARY_PATH=$(cat gcc_path) LD_LIBRARY_PATH=$(cat gcc_path) rustc +$(cat $CG_GCCJIT_DIR/rust-toolchain | grep 'channel' | cut -d '=' -f 2 | sed 's/"//g' | sed 's/ //g') -Cpanic=abort -Zcodegen-backend=$CG_GCCJIT_DIR/target/release/librustc_codegen_gcc.so --sysroot $CG_GCCJIT_DIR/build_sysroot/sysroot my_crate.rs
 ```
 
 ## Env vars

From 4748fdcbabfc8f24d8aa7492ec36767a7b9db278 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 16 Aug 2023 22:24:28 +0200
Subject: [PATCH 364/997] Add doc for sending patches to GCC

---
 doc/sending-gcc-patch.md | 44 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)
 create mode 100644 doc/sending-gcc-patch.md

diff --git a/doc/sending-gcc-patch.md b/doc/sending-gcc-patch.md
new file mode 100644
index 000000000000..7a47ef29f3c2
--- /dev/null
+++ b/doc/sending-gcc-patch.md
@@ -0,0 +1,44 @@
+This guide explains what to do to send a GCC patch for review.
+
+All the commands are supposed to be run in the folder where you cloned GCC.
+
+```bash
+./contrib/gcc-changelog/git_check_commit.py
+```
+
+You can provide a specific commit hash:
+
+```bash
+./contrib/gcc-changelog/git_check_commit.py abdef78989
+```
+
+a range:
+
+```bash
+./contrib/gcc-changelog/git_check_commit.py HEAD~2
+```
+
+or even a comparison with a remote branch:
+
+```bash
+./contrib/gcc-changelog/git_check_commit.py upstream/master..HEAD
+```
+
+When there is no more errors, generate the git patch:
+
+```bash
+git format-patch -1 `git rev-parse --short HEAD`
+```
+
+Then you can run the remaining checks using:
+
+```bash
+contrib/check_GNU_style.sh 0001-your-patch.patch
+```
+
+When you have no more errors, you can send the `.patch` file to GCC by sending an
+email to `gcc-patches@gcc.gnu.org` and to the relevant GCC mailing lists
+depending on what your patch changes. You can find the list of the mailing lists
+[here](https://gcc.gnu.org/lists.html).
+
+You can find more information about "contributing to GCC" [here](https://gcc.gnu.org/contribute.html).

From 6b588cc0077d9bdee81c8896d238c9107830b752 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 18 Aug 2023 16:06:20 +0200
Subject: [PATCH 365/997] Rustify prepare.sh command

---
 .github/workflows/ci.yml             |   4 +-
 .github/workflows/release.yml        |   4 +-
 .github/workflows/stdarch.yml        |   4 +-
 .gitignore                           |   1 +
 Readme.md                            |   2 +-
 build_sysroot/prepare_sysroot_src.sh |  39 -------
 build_system/Cargo.lock              |   7 ++
 build_system/Cargo.toml              |  11 ++
 build_system/src/build.rs            |   3 +
 build_system/src/main.rs             |  49 +++++++++
 build_system/src/prepare.rs          | 157 +++++++++++++++++++++++++++
 build_system/src/rustc_info.rs       |  12 ++
 build_system/src/utils.rs            |  87 +++++++++++++++
 prepare.sh                           |  30 -----
 prepare_build.sh                     |   5 -
 rustup.sh                            |   2 +-
 y.sh                                 |   7 ++
 17 files changed, 342 insertions(+), 82 deletions(-)
 delete mode 100755 build_sysroot/prepare_sysroot_src.sh
 create mode 100644 build_system/Cargo.lock
 create mode 100644 build_system/Cargo.toml
 create mode 100644 build_system/src/build.rs
 create mode 100644 build_system/src/main.rs
 create mode 100644 build_system/src/prepare.rs
 create mode 100644 build_system/src/rustc_info.rs
 create mode 100644 build_system/src/utils.rs
 delete mode 100755 prepare.sh
 delete mode 100755 prepare_build.sh
 create mode 100755 y.sh

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index d2b7724a2215..419468209ef7 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -119,7 +119,7 @@ jobs:
 
     - name: Build
       run: |
-        ./prepare_build.sh
+        ./y.sh prepare --only-libcore
         ${{ matrix.libgccjit_version.env_extra }} ./build.sh ${{ matrix.libgccjit_version.extra }}
         ${{ matrix.libgccjit_version.env_extra }} cargo test ${{ matrix.libgccjit_version.extra }}
         ./clean_all.sh
@@ -128,7 +128,7 @@ jobs:
       run: |
         git config --global user.email "user@example.com"
         git config --global user.name "User"
-        ./prepare.sh
+        ./y.sh prepare
 
     # Compile is a separate step, as the actions-rs/cargo action supports error annotations
     - name: Compile
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index c4e99469bc20..655a94cbafd7 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -88,7 +88,7 @@ jobs:
 
     - name: Build
       run: |
-        ./prepare_build.sh
+        ./y.sh prepare --only-libcore
         ./build.sh --release --release-sysroot
         cargo test
         ./clean_all.sh
@@ -97,7 +97,7 @@ jobs:
       run: |
         git config --global user.email "user@example.com"
         git config --global user.name "User"
-        ./prepare.sh
+        ./y.sh prepare
 
     # Compile is a separate step, as the actions-rs/cargo action supports error annotations
     - name: Compile
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 21b6a0d3a935..193c77f33c4d 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -102,7 +102,7 @@ jobs:
 
     - name: Build
       run: |
-        ./prepare_build.sh
+        ./y.sh prepare --only-libcore
         ./build.sh --release --release-sysroot
         cargo test
 
@@ -115,7 +115,7 @@ jobs:
       run: |
         git config --global user.email "user@example.com"
         git config --global user.name "User"
-        ./prepare.sh
+        ./y.sh prepare
 
     # Compile is a separate step, as the actions-rs/cargo action supports error annotations
     - name: Compile
diff --git a/.gitignore b/.gitignore
index c5ed7de200c2..b44d1aa78c2e 100644
--- a/.gitignore
+++ b/.gitignore
@@ -25,3 +25,4 @@ tools/llvmint
 tools/llvmint-2
 # The `llvm` folder is generated by the `tools/generate_intrinsics.py` script to update intrinsics.
 llvm
+build_system/target
diff --git a/Readme.md b/Readme.md
index 55daad6dcd01..d26c2688991a 100644
--- a/Readme.md
+++ b/Readme.md
@@ -65,7 +65,7 @@ $ export RUST_COMPILER_RT_ROOT="$PWD/llvm/compiler-rt"
 Then you can run commands like this:
 
 ```bash
-$ ./prepare.sh # download and patch sysroot src and install hyperfine for benchmarking
+$ ./y.sh prepare # download and patch sysroot src and install hyperfine for benchmarking
 $ LIBRARY_PATH=$(cat gcc_path) LD_LIBRARY_PATH=$(cat gcc_path) ./build.sh --release
 ```
 
diff --git a/build_sysroot/prepare_sysroot_src.sh b/build_sysroot/prepare_sysroot_src.sh
deleted file mode 100755
index 71b3876bac2c..000000000000
--- a/build_sysroot/prepare_sysroot_src.sh
+++ /dev/null
@@ -1,39 +0,0 @@
-#!/usr/bin/env bash
-set -e
-cd $(dirname "$0")
-
-SRC_DIR=$(dirname $(rustup which rustc))"/../lib/rustlib/src/rust/"
-DST_DIR="sysroot_src"
-
-if [ ! -e $SRC_DIR ]; then
-    echo "Please install rust-src component"
-    exit 1
-fi
-
-rm -rf $DST_DIR
-mkdir -p $DST_DIR/library
-cp -r $SRC_DIR/library $DST_DIR/
-
-pushd $DST_DIR
-echo "[GIT] init"
-git init
-echo "[GIT] add"
-git add .
-echo "[GIT] commit"
-
-# This is needed on systems where nothing is configured.
-# git really needs something here, or it will fail.
-# Even using --author is not enough.
-git config user.email || git config user.email "none@example.com"
-git config user.name || git config user.name "None"
-
-git commit -m "Initial commit" -q
-for file in $(ls ../../patches/ | grep -v patcha); do
-    echo "[GIT] apply" $file
-    git apply ../../patches/$file
-    git add -A
-    git commit --no-gpg-sign -m "Patch $file"
-done
-popd
-
-echo "Successfully prepared libcore for building"
diff --git a/build_system/Cargo.lock b/build_system/Cargo.lock
new file mode 100644
index 000000000000..86268e191603
--- /dev/null
+++ b/build_system/Cargo.lock
@@ -0,0 +1,7 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "y"
+version = "0.1.0"
diff --git a/build_system/Cargo.toml b/build_system/Cargo.toml
new file mode 100644
index 000000000000..b7487e38e630
--- /dev/null
+++ b/build_system/Cargo.toml
@@ -0,0 +1,11 @@
+[package]
+name = "y"
+version = "0.1.0"
+edition = "2021"
+
+[[bin]]
+name = "y"
+path = "src/main.rs"
+
+[features]
+unstable-features = [] # for rust-analyzer
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
new file mode 100644
index 000000000000..7384557d805c
--- /dev/null
+++ b/build_system/src/build.rs
@@ -0,0 +1,3 @@
+pub fn run() -> Result<(), String> {
+    Ok(())
+}
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
new file mode 100644
index 000000000000..c76418da5794
--- /dev/null
+++ b/build_system/src/main.rs
@@ -0,0 +1,49 @@
+use std::env;
+use std::process;
+
+mod build;
+mod prepare;
+mod rustc_info;
+mod utils;
+
+macro_rules! arg_error {
+    ($($err:tt)*) => {{
+        eprintln!($($err)*);
+        usage();
+        std::process::exit(1);
+    }};
+}
+
+fn usage() {
+    // println!("{}", include_str!("usage.txt"));
+}
+
+pub enum Command {
+    Prepare,
+    Build,
+}
+
+fn main() {
+    if env::var("RUST_BACKTRACE").is_err() {
+        env::set_var("RUST_BACKTRACE", "1");
+    }
+
+    let command = match env::args().nth(1).as_deref() {
+        Some("prepare") => Command::Prepare,
+        Some("build") => Command::Build,
+        Some(flag) if flag.starts_with('-') => arg_error!("Expected command found flag {}", flag),
+        Some(command) => arg_error!("Unknown command {}", command),
+        None => {
+            usage();
+            process::exit(0);
+        }
+    };
+
+    if let Err(e) = match command {
+        Command::Prepare => prepare::run(),
+        Command::Build => build::run(),
+    } {
+        eprintln!("Command failed to run: {e:?}");
+        process::exit(1);
+    }
+}
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
new file mode 100644
index 000000000000..74d0c2a2a062
--- /dev/null
+++ b/build_system/src/prepare.rs
@@ -0,0 +1,157 @@
+use crate::rustc_info::get_rustc_path;
+use crate::utils::{cargo_install, git_clone, run_command, walk_dir};
+
+use std::fs;
+use std::path::Path;
+
+fn prepare_libcore() -> Result<(), String> {
+    let rustc_path = match get_rustc_path() {
+        Some(path) => path,
+        None => return Err("`rustc` path not found".to_owned()),
+    };
+
+    let parent = match rustc_path.parent() {
+        Some(path) => path,
+        None => return Err(format!("No parent for `{}`", rustc_path.display())),
+    };
+
+    let rustlib_dir = parent.join("../lib/rustlib/src/rust");
+    if !rustlib_dir.is_dir() {
+        return Err("Please install `rust-src` component".to_owned());
+    }
+
+    let sysroot_dir = Path::new("build_sysroot/sysroot_src");
+    if sysroot_dir.is_dir() {
+        if let Err(e) = fs::remove_dir_all(sysroot_dir) {
+            return Err(format!("Failed to remove `{}`: {:?}", sysroot_dir.display(), e));
+        }
+    }
+
+    let sysroot_library_dir = sysroot_dir.join("library");
+    fs::create_dir_all(&sysroot_library_dir)
+        .map_err(|e| format!(
+            "Failed to create folder `{}`: {e:?}",
+            sysroot_library_dir.display(),
+        ))?;
+
+    run_command(&[&"cp", &"-r", &rustlib_dir, &sysroot_library_dir], None)?;
+
+    println!("[GIT] init (cwd): `{}`", sysroot_dir.display());
+    run_command(&[&"git", &"init"], Some(&sysroot_dir))?;
+    println!("[GIT] add (cwd): `{}`", sysroot_dir.display());
+    run_command(&[&"git", &"add", &"."], Some(&sysroot_dir))?;
+    println!("[GIT] commit (cwd): `{}`", sysroot_dir.display());
+
+    // This is needed on systems where nothing is configured.
+    // git really needs something here, or it will fail.
+    // Even using --author is not enough.
+    run_command(&[&"git", &"config", &"user.email", &"none@example.com"], Some(&sysroot_dir))?;
+    run_command(&[&"git", &"config", &"user.name", &"None"], Some(&sysroot_dir))?;
+    run_command(&[&"git", &"config", &"core.autocrlf=false"], Some(&sysroot_dir))?;
+    run_command(&[&"git", &"config", &"commit.gpgSign=false"], Some(&sysroot_dir))?;
+    run_command(&[&"git", &"commit", &"-m", &"Initial commit", &"-q"], Some(&sysroot_dir))?;
+
+    walk_dir("patches", |_| Ok(()), |file_path: &Path| {
+        println!("[GIT] apply `{}`", file_path.display());
+        let path = Path::new("../..").join(file_path);
+        run_command(&[&"git", &"apply", &path], Some(&sysroot_dir))?;
+        run_command(&[&"git", &"add", &"-A"], Some(&sysroot_dir))?;
+        run_command(
+            &[&"git", &"commit", &"--no-gpg-sign", &"-m", &format!("Patch {}", path.display())],
+            Some(&sysroot_dir),
+        )?;
+        Ok(())
+    })?;
+    println!("Successfully prepared libcore for building");
+    Ok(())
+}
+
+// build with cg_llvm for perf comparison
+fn build_raytracer(repo_dir: &Path) -> Result<(), String> {
+    run_command(&[&"cargo", &"build"], Some(repo_dir))?;
+    run_command(&[&"mv", &"target/debug/main", &"raytracer_cg_llvm"], Some(repo_dir))?;
+    Ok(())
+}
+
+fn clone_and_setup<F>(repo_url: &str, checkout_commit: &str, extra: Option<F>) -> Result<(), String>
+where
+    F: Fn(&Path) -> Result<(), String>,
+{
+    let clone_result = git_clone(repo_url, None)?;
+    if !clone_result.ran_clone {
+        println!("`{}` has already been cloned", clone_result.repo_name);
+    }
+    let repo_path = Path::new(&clone_result.repo_name);
+    run_command(&[&"git", &"checkout", &"--", &"."], Some(repo_path))?;
+    run_command(&[&"git", &"checkout", &checkout_commit], Some(repo_path))?;
+    let filter = format!("-{}-", clone_result.repo_name);
+    walk_dir("crate_patches", |_| Ok(()), |file_path| {
+        let s = file_path.as_os_str().to_str().unwrap();
+        if s.contains(&filter) && s.ends_with(".patch") {
+            run_command(&[&"git", &"am", &s], Some(repo_path))?;
+        }
+        Ok(())
+    })?;
+    if let Some(extra) = extra {
+        extra(repo_path)?;
+    }
+    Ok(())
+}
+
+struct PrepareArg {
+    only_libcore: bool,
+}
+
+impl PrepareArg {
+    fn new() -> Result<Option<Self>, String> {
+        let mut only_libcore = false;
+
+        for arg in std::env::args().skip(2) {
+            match arg.as_str() {
+                "--only-libcore" => only_libcore = true,
+                "--help" => {
+                    Self::usage();
+                    return Ok(None)
+                }
+                a => return Err(format!("Unknown argument `{a}`")),
+            }
+        }
+        Ok(Some(Self {
+            only_libcore,
+        }))
+    }
+
+    fn usage() {
+        println!(r#"
+`prepare` command help:
+
+    --only-libcore  : Only setup libcore and don't clone other repositories
+    --help          : Show this help
+"#)
+    }
+}
+
+pub fn run() -> Result<(), String> {
+    let args = match PrepareArg::new()? {
+        Some(a) => a,
+        None => return Ok(()),
+    };
+    prepare_libcore()?;
+
+    if !args.only_libcore {
+        cargo_install("hyperfine")?;
+
+        let to_clone = &[
+            ("https://github.com/rust-random/rand.git", "0f933f9c7176e53b2a3c7952ded484e1783f0bf1", None),
+            ("https://github.com/rust-lang/regex.git", "341f207c1071f7290e3f228c710817c280c8dca1", None),
+            ("https://github.com/ebobby/simple-raytracer", "804a7a21b9e673a482797aa289a18ed480e4d813", Some(build_raytracer)),
+        ];
+
+        for (repo_url, checkout_commit, cb) in to_clone {
+            clone_and_setup(repo_url, checkout_commit, *cb)?;
+        }
+    }
+
+    println!("Successfully ran `prepare`");
+    Ok(())
+}
diff --git a/build_system/src/rustc_info.rs b/build_system/src/rustc_info.rs
new file mode 100644
index 000000000000..38c0045c7b30
--- /dev/null
+++ b/build_system/src/rustc_info.rs
@@ -0,0 +1,12 @@
+use std::path::{Path, PathBuf};
+
+use crate::utils::run_command;
+
+pub fn get_rustc_path() -> Option<PathBuf> {
+    if let Ok(rustc) = std::env::var("RUSTC") {
+        return Some(PathBuf::from(rustc));
+    }
+    run_command(&[&"rustup", &"which", &"rustc"], None)
+        .ok()
+        .map(|out| Path::new(String::from_utf8(out.stdout).unwrap().trim()).to_owned())
+}
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
new file mode 100644
index 000000000000..f3c2571c28f5
--- /dev/null
+++ b/build_system/src/utils.rs
@@ -0,0 +1,87 @@
+use std::ffi::OsStr;
+use std::fs;
+use std::path::Path;
+use std::process::{Command, Output};
+
+pub fn run_command(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Result<Output, String> {
+    let (cmd, args) = match input {
+        [] => panic!("empty command"),
+        [cmd, args @ ..] => (cmd, args),
+    };
+    let mut command = Command::new(cmd);
+    command.args(args);
+    if let Some(cwd) = cwd {
+        command.current_dir(cwd);
+    }
+    command.output()
+        .map_err(|e| format!(
+            "Command `{}` failed to run: {e:?}",
+            input.iter()
+                .map(|s| s.as_ref().to_str().unwrap())
+                .collect::<Vec<_>>()
+                .join(" "),
+        ))
+}
+
+pub fn cargo_install(to_install: &str) -> Result<(), String> {
+    let output = run_command(&[&"cargo", &"install", &"--list"], None)?;
+
+    let to_install = format!("{to_install} ");
+    // cargo install --list returns something like this:
+    //
+    // mdbook-toc v0.8.0:
+    //     mdbook-toc
+    // rust-reduce v0.1.0:
+    //     rust-reduce
+    //
+    // We are only interested into the command name so we only look for lines ending with `:`.
+    if String::from_utf8(output.stdout)
+        .unwrap()
+        .lines()
+        .any(|line| line.ends_with(':') && line.starts_with(&to_install))
+    {
+        return Ok(());
+    }
+    run_command(&[&"cargo", &"install", &to_install], None)?;
+    Ok(())
+}
+
+pub struct CloneResult {
+    pub ran_clone: bool,
+    pub repo_name: String,
+}
+
+pub fn git_clone(to_clone: &str, dest: Option<&Path>) -> Result<CloneResult, String> {
+    let repo_name = to_clone.split('/').last().unwrap();
+    let repo_name = match repo_name.strip_suffix(".git") {
+        Some(n) => n.to_owned(),
+        None => repo_name.to_owned(),
+    };
+
+    let dest = dest.unwrap_or_else(|| Path::new(&repo_name));
+    if dest.is_dir() {
+        return Ok(CloneResult { ran_clone: false, repo_name });
+    }
+
+    run_command(&[&"git", &"clone", &to_clone, &dest], None)?;
+    Ok(CloneResult { ran_clone: true, repo_name })
+}
+
+pub fn walk_dir<P, D, F>(dir: P, dir_cb: D, file_cb: F) -> Result<(), String>
+where
+    P: AsRef<Path>,
+    D: Fn(&Path) -> Result<(), String>,
+    F: Fn(&Path) -> Result<(), String>,
+{
+    let dir = dir.as_ref();
+    for entry in fs::read_dir(dir).map_err(|e| format!("Failed to read dir `{}`: {e:?}", dir.display()))? {
+        let entry = entry.map_err(|e| format!("Failed to read entry in `{}`: {e:?}", dir.display()))?;
+        let entry_path = entry.path();
+        if entry_path.is_dir() {
+            dir_cb(&entry_path)?;
+        } else {
+            file_cb(&entry_path)?;
+        }
+    }
+    Ok(())
+}
diff --git a/prepare.sh b/prepare.sh
deleted file mode 100755
index e98f24c6e128..000000000000
--- a/prepare.sh
+++ /dev/null
@@ -1,30 +0,0 @@
-#!/usr/bin/env bash
-set -e
-set -v
-
-source prepare_build.sh
-
-cargo install hyperfine || echo "Skipping hyperfine install"
-
-git clone https://github.com/rust-random/rand.git || echo "rust-random/rand has already been cloned"
-pushd rand
-git checkout -- .
-git checkout 0f933f9c7176e53b2a3c7952ded484e1783f0bf1
-git am ../crate_patches/*-rand-*.patch
-popd
-
-git clone https://github.com/rust-lang/regex.git || echo "rust-lang/regex has already been cloned"
-pushd regex
-git checkout -- .
-git checkout 341f207c1071f7290e3f228c710817c280c8dca1
-popd
-
-git clone https://github.com/ebobby/simple-raytracer || echo "ebobby/simple-raytracer has already been cloned"
-pushd simple-raytracer
-git checkout -- .
-git checkout 804a7a21b9e673a482797aa289a18ed480e4d813
-
-# build with cg_llvm for perf comparison
-cargo build
-mv target/debug/main raytracer_cg_llvm
-popd
diff --git a/prepare_build.sh b/prepare_build.sh
deleted file mode 100755
index 8194360da4ba..000000000000
--- a/prepare_build.sh
+++ /dev/null
@@ -1,5 +0,0 @@
-#!/usr/bin/env bash
-set -e
-set -v
-
-./build_sysroot/prepare_sysroot_src.sh
diff --git a/rustup.sh b/rustup.sh
index 041079bc9c6f..a4f938e4b5b7 100755
--- a/rustup.sh
+++ b/rustup.sh
@@ -16,7 +16,7 @@ case $1 in
         done
 
         ./clean_all.sh
-        ./prepare.sh
+        ./y.sh prepare
         ;;
     "commit")
         git add rust-toolchain
diff --git a/y.sh b/y.sh
new file mode 100755
index 000000000000..481b909c92a0
--- /dev/null
+++ b/y.sh
@@ -0,0 +1,7 @@
+#!/usr/bin/env bash
+
+set -e
+echo "[BUILD] build system" 1>&2
+mkdir -p build_system/target
+rustc build_system/src/main.rs -o build_system/target/y -Cdebuginfo=1 --edition 2021
+exec ./build_system/target/y "$@"

From 18d22d56989db6590872cc6791b68cefc8695eab Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 19 Aug 2023 18:24:01 +0200
Subject: [PATCH 366/997] Don't capture output on git commands

---
 build_system/src/prepare.rs | 12 ++++++------
 build_system/src/utils.rs   | 31 +++++++++++++++++++++++++++++--
 2 files changed, 35 insertions(+), 8 deletions(-)

diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 74d0c2a2a062..8e6183be6291 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -1,5 +1,5 @@
 use crate::rustc_info::get_rustc_path;
-use crate::utils::{cargo_install, git_clone, run_command, walk_dir};
+use crate::utils::{cargo_install, git_clone, run_command, run_command_with_output, walk_dir};
 
 use std::fs;
 use std::path::Path;
@@ -37,9 +37,9 @@ fn prepare_libcore() -> Result<(), String> {
     run_command(&[&"cp", &"-r", &rustlib_dir, &sysroot_library_dir], None)?;
 
     println!("[GIT] init (cwd): `{}`", sysroot_dir.display());
-    run_command(&[&"git", &"init"], Some(&sysroot_dir))?;
+    run_command_with_output(&[&"git", &"init"], Some(&sysroot_dir))?;
     println!("[GIT] add (cwd): `{}`", sysroot_dir.display());
-    run_command(&[&"git", &"add", &"."], Some(&sysroot_dir))?;
+    run_command_with_output(&[&"git", &"add", &"."], Some(&sysroot_dir))?;
     println!("[GIT] commit (cwd): `{}`", sysroot_dir.display());
 
     // This is needed on systems where nothing is configured.
@@ -54,9 +54,9 @@ fn prepare_libcore() -> Result<(), String> {
     walk_dir("patches", |_| Ok(()), |file_path: &Path| {
         println!("[GIT] apply `{}`", file_path.display());
         let path = Path::new("../..").join(file_path);
-        run_command(&[&"git", &"apply", &path], Some(&sysroot_dir))?;
-        run_command(&[&"git", &"add", &"-A"], Some(&sysroot_dir))?;
-        run_command(
+        run_command_with_output(&[&"git", &"apply", &path], Some(&sysroot_dir))?;
+        run_command_with_output(&[&"git", &"add", &"-A"], Some(&sysroot_dir))?;
+        run_command_with_output(
             &[&"git", &"commit", &"--no-gpg-sign", &"-m", &format!("Patch {}", path.display())],
             Some(&sysroot_dir),
         )?;
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index f3c2571c28f5..145f40ec8aef 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -3,7 +3,7 @@ use std::fs;
 use std::path::Path;
 use std::process::{Command, Output};
 
-pub fn run_command(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Result<Output, String> {
+fn run_command_inner(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Command {
     let (cmd, args) = match input {
         [] => panic!("empty command"),
         [cmd, args @ ..] => (cmd, args),
@@ -13,7 +13,11 @@ pub fn run_command(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Result<Ou
     if let Some(cwd) = cwd {
         command.current_dir(cwd);
     }
-    command.output()
+    command
+}
+
+pub fn run_command(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Result<Output, String> {
+    run_command_inner(input, cwd).output()
         .map_err(|e| format!(
             "Command `{}` failed to run: {e:?}",
             input.iter()
@@ -23,6 +27,29 @@ pub fn run_command(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Result<Ou
         ))
 }
 
+pub fn run_command_with_output(
+    input: &[&dyn AsRef<OsStr>],
+    cwd: Option<&Path>,
+) -> Result<(), String> {
+    run_command_inner(input, cwd).spawn()
+        .map_err(|e| format!(
+            "Command `{}` failed to run: {e:?}",
+            input.iter()
+                .map(|s| s.as_ref().to_str().unwrap())
+                .collect::<Vec<_>>()
+                .join(" "),
+        ))?
+        .wait()
+        .map_err(|e| format!(
+            "Failed to wait for command `{}` to run: {e:?}",
+            input.iter()
+                .map(|s| s.as_ref().to_str().unwrap())
+                .collect::<Vec<_>>()
+                .join(" "),
+        ))?;
+    Ok(())
+}
+
 pub fn cargo_install(to_install: &str) -> Result<(), String> {
     let output = run_command(&[&"cargo", &"install", &"--list"], None)?;
 

From c682e9ca94e3b7d4c1dfcf4686360e7760e8ef9f Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 19 Aug 2023 20:53:47 +0200
Subject: [PATCH 367/997] Correctly set path

---
 build_system/src/prepare.rs | 50 ++++++++++++++-------
 build_system/src/utils.rs   | 87 ++++++++++++++++++++++++-------------
 2 files changed, 92 insertions(+), 45 deletions(-)

diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 8e6183be6291..9c31b5cb8b3c 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -4,7 +4,7 @@ use crate::utils::{cargo_install, git_clone, run_command, run_command_with_outpu
 use std::fs;
 use std::path::Path;
 
-fn prepare_libcore() -> Result<(), String> {
+fn prepare_libcore(sysroot_path: &Path) -> Result<(), String> {
     let rustc_path = match get_rustc_path() {
         Some(path) => path,
         None => return Err("`rustc` path not found".to_owned()),
@@ -15,14 +15,18 @@ fn prepare_libcore() -> Result<(), String> {
         None => return Err(format!("No parent for `{}`", rustc_path.display())),
     };
 
-    let rustlib_dir = parent.join("../lib/rustlib/src/rust");
+    let rustlib_dir =
+        parent
+            .join("../lib/rustlib/src/rust")
+            .canonicalize()
+            .map_err(|e| format!("Failed to canonicalize path: {e:?}"))?;
     if !rustlib_dir.is_dir() {
         return Err("Please install `rust-src` component".to_owned());
     }
 
-    let sysroot_dir = Path::new("build_sysroot/sysroot_src");
+    let sysroot_dir = sysroot_path.join("sysroot_src");
     if sysroot_dir.is_dir() {
-        if let Err(e) = fs::remove_dir_all(sysroot_dir) {
+        if let Err(e) = fs::remove_dir_all(&sysroot_dir) {
             return Err(format!("Failed to remove `{}`: {:?}", sysroot_dir.display(), e));
         }
     }
@@ -34,12 +38,12 @@ fn prepare_libcore() -> Result<(), String> {
             sysroot_library_dir.display(),
         ))?;
 
-    run_command(&[&"cp", &"-r", &rustlib_dir, &sysroot_library_dir], None)?;
+    run_command(&[&"cp", &"-r", &rustlib_dir.join("library"), &sysroot_dir], None)?;
 
     println!("[GIT] init (cwd): `{}`", sysroot_dir.display());
-    run_command_with_output(&[&"git", &"init"], Some(&sysroot_dir))?;
+    run_command(&[&"git", &"init"], Some(&sysroot_dir))?;
     println!("[GIT] add (cwd): `{}`", sysroot_dir.display());
-    run_command_with_output(&[&"git", &"add", &"."], Some(&sysroot_dir))?;
+    run_command(&[&"git", &"add", &"."], Some(&sysroot_dir))?;
     println!("[GIT] commit (cwd): `{}`", sysroot_dir.display());
 
     // This is needed on systems where nothing is configured.
@@ -47,11 +51,17 @@ fn prepare_libcore() -> Result<(), String> {
     // Even using --author is not enough.
     run_command(&[&"git", &"config", &"user.email", &"none@example.com"], Some(&sysroot_dir))?;
     run_command(&[&"git", &"config", &"user.name", &"None"], Some(&sysroot_dir))?;
-    run_command(&[&"git", &"config", &"core.autocrlf=false"], Some(&sysroot_dir))?;
-    run_command(&[&"git", &"config", &"commit.gpgSign=false"], Some(&sysroot_dir))?;
+    run_command(&[&"git", &"config", &"core.autocrlf", &"false"], Some(&sysroot_dir))?;
+    run_command(&[&"git", &"config", &"commit.gpgSign", &"false"], Some(&sysroot_dir))?;
     run_command(&[&"git", &"commit", &"-m", &"Initial commit", &"-q"], Some(&sysroot_dir))?;
 
+    let mut patches = Vec::new();
     walk_dir("patches", |_| Ok(()), |file_path: &Path| {
+        patches.push(file_path.to_path_buf());
+        Ok(())
+    })?;
+    patches.sort();
+    for file_path in patches {
         println!("[GIT] apply `{}`", file_path.display());
         let path = Path::new("../..").join(file_path);
         run_command_with_output(&[&"git", &"apply", &path], Some(&sysroot_dir))?;
@@ -60,8 +70,7 @@ fn prepare_libcore() -> Result<(), String> {
             &[&"git", &"commit", &"--no-gpg-sign", &"-m", &format!("Patch {}", path.display())],
             Some(&sysroot_dir),
         )?;
-        Ok(())
-    })?;
+    }
     println!("Successfully prepared libcore for building");
     Ok(())
 }
@@ -69,6 +78,11 @@ fn prepare_libcore() -> Result<(), String> {
 // build with cg_llvm for perf comparison
 fn build_raytracer(repo_dir: &Path) -> Result<(), String> {
     run_command(&[&"cargo", &"build"], Some(repo_dir))?;
+    let mv_target = repo_dir.join("raytracer_cg_llvm");
+    if mv_target.is_file() {
+        std::fs::remove_file(&mv_target)
+            .map_err(|e| format!("Failed to remove file `{}`: {e:?}", mv_target.display()))?;
+    }
     run_command(&[&"mv", &"target/debug/main", &"raytracer_cg_llvm"], Some(repo_dir))?;
     Ok(())
 }
@@ -82,18 +96,21 @@ where
         println!("`{}` has already been cloned", clone_result.repo_name);
     }
     let repo_path = Path::new(&clone_result.repo_name);
-    run_command(&[&"git", &"checkout", &"--", &"."], Some(repo_path))?;
-    run_command(&[&"git", &"checkout", &checkout_commit], Some(repo_path))?;
+    run_command(&[&"git", &"checkout", &"--", &"."], Some(&repo_path))?;
+    run_command(&[&"git", &"checkout", &checkout_commit], Some(&repo_path))?;
     let filter = format!("-{}-", clone_result.repo_name);
     walk_dir("crate_patches", |_| Ok(()), |file_path| {
         let s = file_path.as_os_str().to_str().unwrap();
         if s.contains(&filter) && s.ends_with(".patch") {
-            run_command(&[&"git", &"am", &s], Some(repo_path))?;
+            run_command_with_output(
+                &[&"git", &"am", &file_path.canonicalize().unwrap()],
+                Some(&repo_path),
+            )?;
         }
         Ok(())
     })?;
     if let Some(extra) = extra {
-        extra(repo_path)?;
+        extra(&repo_path)?;
     }
     Ok(())
 }
@@ -136,7 +153,8 @@ pub fn run() -> Result<(), String> {
         Some(a) => a,
         None => return Ok(()),
     };
-    prepare_libcore()?;
+    let sysroot_path = Path::new("build_sysroot");
+    prepare_libcore(sysroot_path)?;
 
     if !args.only_libcore {
         cargo_install("hyperfine")?;
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 145f40ec8aef..c350864dbd29 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -1,9 +1,10 @@
 use std::ffi::OsStr;
+use std::fmt::Debug;
 use std::fs;
 use std::path::Path;
-use std::process::{Command, Output};
+use std::process::{Command, ExitStatus, Output};
 
-fn run_command_inner(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Command {
+fn get_command_inner(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Command {
     let (cmd, args) = match input {
         [] => panic!("empty command"),
         [cmd, args @ ..] => (cmd, args),
@@ -16,44 +17,67 @@ fn run_command_inner(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Command
     command
 }
 
-pub fn run_command(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Result<Output, String> {
-    run_command_inner(input, cwd).output()
-        .map_err(|e| format!(
-            "Command `{}` failed to run: {e:?}",
+fn check_exit_status(
+    input: &[&dyn AsRef<OsStr>],
+    cwd: Option<&Path>,
+    exit_status: ExitStatus,
+) -> Result<(), String> {
+    if exit_status.success() {
+        Ok(())
+    } else {
+        Err(format!(
+            "Command `{}`{} exited with status {:?}",
             input.iter()
                 .map(|s| s.as_ref().to_str().unwrap())
                 .collect::<Vec<_>>()
                 .join(" "),
+            cwd.map(|cwd| format!(" (running in folder `{}`)", cwd.display()))
+                .unwrap_or_default(),
+            exit_status.code(),
         ))
+    }
+}
+
+fn command_error<D: Debug>(input: &[&dyn AsRef<OsStr>], cwd: &Option<&Path>, error: D) -> String {
+    format!(
+        "Command `{}`{} failed to run: {error:?}",
+        input.iter()
+            .map(|s| s.as_ref().to_str().unwrap())
+            .collect::<Vec<_>>()
+            .join(" "),
+        cwd.as_ref()
+            .map(|cwd| format!(
+                " (running in folder `{}`)",
+                cwd.display(),
+            ))
+            .unwrap_or_default(),
+    )
+}
+
+pub fn run_command(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Result<Output, String> {
+    let output = get_command_inner(input, cwd)
+        .output()
+        .map_err(|e| command_error(input, &cwd, e))?;
+    check_exit_status(input, cwd, output.status)?;
+    Ok(output)
 }
 
 pub fn run_command_with_output(
     input: &[&dyn AsRef<OsStr>],
     cwd: Option<&Path>,
 ) -> Result<(), String> {
-    run_command_inner(input, cwd).spawn()
-        .map_err(|e| format!(
-            "Command `{}` failed to run: {e:?}",
-            input.iter()
-                .map(|s| s.as_ref().to_str().unwrap())
-                .collect::<Vec<_>>()
-                .join(" "),
-        ))?
+    let exit_status = get_command_inner(input, cwd).spawn()
+        .map_err(|e| command_error(input, &cwd, e))?
         .wait()
-        .map_err(|e| format!(
-            "Failed to wait for command `{}` to run: {e:?}",
-            input.iter()
-                .map(|s| s.as_ref().to_str().unwrap())
-                .collect::<Vec<_>>()
-                .join(" "),
-        ))?;
+        .map_err(|e| command_error(input, &cwd, e))?;
+    check_exit_status(input, cwd, exit_status)?;
     Ok(())
 }
 
 pub fn cargo_install(to_install: &str) -> Result<(), String> {
     let output = run_command(&[&"cargo", &"install", &"--list"], None)?;
 
-    let to_install = format!("{to_install} ");
+    let to_install_needle = format!("{to_install} ");
     // cargo install --list returns something like this:
     //
     // mdbook-toc v0.8.0:
@@ -65,11 +89,14 @@ pub fn cargo_install(to_install: &str) -> Result<(), String> {
     if String::from_utf8(output.stdout)
         .unwrap()
         .lines()
-        .any(|line| line.ends_with(':') && line.starts_with(&to_install))
+        .any(|line| line.ends_with(':') && line.starts_with(&to_install_needle))
     {
         return Ok(());
     }
-    run_command(&[&"cargo", &"install", &to_install], None)?;
+    // We voluntarily ignore this error.
+    if run_command_with_output(&[&"cargo", &"install", &to_install], None).is_err() {
+        println!("Skipping installation of `{to_install}`");
+    }
     Ok(())
 }
 
@@ -85,20 +112,22 @@ pub fn git_clone(to_clone: &str, dest: Option<&Path>) -> Result<CloneResult, Str
         None => repo_name.to_owned(),
     };
 
-    let dest = dest.unwrap_or_else(|| Path::new(&repo_name));
+    let dest = dest
+        .map(|dest| dest.join(&repo_name))
+        .unwrap_or_else(|| Path::new(&repo_name).into());
     if dest.is_dir() {
         return Ok(CloneResult { ran_clone: false, repo_name });
     }
 
-    run_command(&[&"git", &"clone", &to_clone, &dest], None)?;
+    run_command_with_output(&[&"git", &"clone", &to_clone, &dest], None)?;
     Ok(CloneResult { ran_clone: true, repo_name })
 }
 
-pub fn walk_dir<P, D, F>(dir: P, dir_cb: D, file_cb: F) -> Result<(), String>
+pub fn walk_dir<P, D, F>(dir: P, mut dir_cb: D, mut file_cb: F) -> Result<(), String>
 where
     P: AsRef<Path>,
-    D: Fn(&Path) -> Result<(), String>,
-    F: Fn(&Path) -> Result<(), String>,
+    D: FnMut(&Path) -> Result<(), String>,
+    F: FnMut(&Path) -> Result<(), String>,
 {
     let dir = dir.as_ref();
     for entry in fs::read_dir(dir).map_err(|e| format!("Failed to read dir `{}`: {e:?}", dir.display()))? {

From 08eb006f71c3c089045c9eeef560de5f68850676 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 21 Aug 2023 15:52:05 +0200
Subject: [PATCH 368/997] Remove unused Cargo feature

---
 build_system/Cargo.toml | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/build_system/Cargo.toml b/build_system/Cargo.toml
index b7487e38e630..f36709ea0360 100644
--- a/build_system/Cargo.toml
+++ b/build_system/Cargo.toml
@@ -6,6 +6,3 @@ edition = "2021"
 [[bin]]
 name = "y"
 path = "src/main.rs"
-
-[features]
-unstable-features = [] # for rust-analyzer

From 5ac2530d3ce2632226456edcb5d60403bbe6e79a Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 12 Aug 2023 16:12:15 +0200
Subject: [PATCH 369/997] Add support for `noalias` function parameters

---
 src/abi.rs | 43 +++++++++++++++++++++++++++++++------------
 1 file changed, 31 insertions(+), 12 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 6fb1cbfad8cd..8f5cd30fe3c7 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -3,7 +3,7 @@ use rustc_codegen_ssa::traits::{AbiBuilderMethods, BaseTypeMethods};
 use rustc_data_structures::fx::FxHashSet;
 use rustc_middle::bug;
 use rustc_middle::ty::Ty;
-use rustc_target::abi::call::{CastTarget, FnAbi, PassMode, Reg, RegKind};
+use rustc_target::abi::call::{ArgAttributes, CastTarget, FnAbi, PassMode, Reg, RegKind};
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
@@ -120,30 +120,49 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
                 }
             };
 
+        #[cfg(feature = "master")]
+        let apply_attrs = |ty: Type<'gcc>, attrs: &ArgAttributes| {
+            if attrs.regular.contains(rustc_target::abi::call::ArgAttribute::NoAlias)
+                && ty.get_pointee().is_some()
+            {
+                ty.make_restrict()
+            } else {
+                ty
+            }
+        };
+        #[cfg(not(feature = "master"))]
+        let apply_attrs = |ty: Type<'gcc>, _attrs: &ArgAttributes| {
+            ty
+        };
+
         for arg in self.args.iter() {
             let arg_ty = match arg.mode {
                 PassMode::Ignore => continue,
-                PassMode::Direct(_) => arg.layout.immediate_gcc_type(cx),
-                PassMode::Pair(..) => {
-                    argument_tys.push(arg.layout.scalar_pair_element_gcc_type(cx, 0, true));
-                    argument_tys.push(arg.layout.scalar_pair_element_gcc_type(cx, 1, true));
+                PassMode::Pair(a, b) => {
+                    argument_tys.push(apply_attrs(arg.layout.scalar_pair_element_gcc_type(cx, 0, true), &a));
+                    argument_tys.push(apply_attrs(arg.layout.scalar_pair_element_gcc_type(cx, 1, true), &b));
                     continue;
                 }
-                PassMode::Indirect { extra_attrs: Some(_), .. } => {
-                    unimplemented!();
-                }
                 PassMode::Cast(ref cast, pad_i32) => {
                     // add padding
                     if pad_i32 {
                         argument_tys.push(Reg::i32().gcc_type(cx));
                     }
-                    cast.gcc_type(cx)
+                    let ty = cast.gcc_type(cx);
+                    apply_attrs(ty, &cast.attrs)
                 }
-                PassMode::Indirect { extra_attrs: None, on_stack: true, .. } => {
+                PassMode::Indirect { attrs, extra_attrs: None, on_stack: true } => {
                     on_stack_param_indices.insert(argument_tys.len());
-                    arg.memory_ty(cx)
+                    apply_attrs(arg.memory_ty(cx), &attrs)
                 },
-                PassMode::Indirect { extra_attrs: None, on_stack: false, .. } => cx.type_ptr_to(arg.memory_ty(cx)),
+                PassMode::Direct(attrs) => apply_attrs(arg.layout.immediate_gcc_type(cx), &attrs),
+                PassMode::Indirect { attrs, extra_attrs: None, on_stack: false } => {
+                    apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs)
+                }
+                PassMode::Indirect { attrs, extra_attrs: Some(extra_attrs), on_stack } => {
+                    assert!(!on_stack);
+                    apply_attrs(apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs), &extra_attrs)
+                }
             };
             argument_tys.push(arg_ty);
         }

From 189dd7022a8c325ceb34b64014066e0b2b78a5f4 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 17 Aug 2023 10:46:48 +0200
Subject: [PATCH 370/997] Update gccjit dependency

---
 Cargo.lock | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 7fcb124927a1..40da783dbe89 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -74,7 +74,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#814eea1a0a098d08a113794225cad301622fd7b4"
+source = "git+https://github.com/antoyo/gccjit.rs#ff1f82584c760a8b870dc6bad9841bd090f92f80"
 dependencies = [
  "gccjit_sys",
 ]
@@ -82,7 +82,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#814eea1a0a098d08a113794225cad301622fd7b4"
+source = "git+https://github.com/antoyo/gccjit.rs#ff1f82584c760a8b870dc6bad9841bd090f92f80"
 dependencies = [
  "libc",
 ]

From c83e5679b3cef0beca335f8e010af491335b4c82 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 29 Aug 2023 15:45:48 +0200
Subject: [PATCH 371/997] Don't generate __restrict__ attribute for ByValue
 arguments

---
 src/abi.rs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 8f5cd30fe3c7..874ac0b087e8 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -123,7 +123,6 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
         #[cfg(feature = "master")]
         let apply_attrs = |ty: Type<'gcc>, attrs: &ArgAttributes| {
             if attrs.regular.contains(rustc_target::abi::call::ArgAttribute::NoAlias)
-                && ty.get_pointee().is_some()
             {
                 ty.make_restrict()
             } else {
@@ -151,9 +150,10 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
                     let ty = cast.gcc_type(cx);
                     apply_attrs(ty, &cast.attrs)
                 }
-                PassMode::Indirect { attrs, extra_attrs: None, on_stack: true } => {
+                PassMode::Indirect { attrs: _, extra_attrs: None, on_stack: true } => {
+                    // This is a "byval" argument, so we don't apply the `restrict` attribute on it.
                     on_stack_param_indices.insert(argument_tys.len());
-                    apply_attrs(arg.memory_ty(cx), &attrs)
+                    arg.memory_ty(cx)
                 },
                 PassMode::Direct(attrs) => apply_attrs(arg.layout.immediate_gcc_type(cx), &attrs),
                 PassMode::Indirect { attrs, extra_attrs: None, on_stack: false } => {

From 62867dc29f8772db166139d954dbe606ab28c34b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 12 May 2023 11:40:04 -0400
Subject: [PATCH 372/997] LTO implementation

---
 .github/workflows/ci.yml                      |  12 +-
 .github/workflows/release.yml                 |  22 +-
 .github/workflows/stdarch.yml                 |  14 +-
 Cargo.lock                                    |  10 +
 Cargo.toml                                    |   4 +
 Readme.md                                     |  47 ++-
 build_sysroot/Cargo.toml                      |   1 +
 config.sh                                     |  13 +-
 failing-lto-tests.txt                         |  23 ++
 failing-non-lto-tests.txt                     |  11 +
 failing-ui-tests.txt                          |  19 +-
 locales/en-US.ftl                             |  65 ----
 messages.ftl                                  |  14 +
 ...1-Add-stdarch-Cargo.toml-for-testing.patch |  19 +-
 patches/0001-Disable-examples.patch           |  25 --
 src/back/lto.rs                               | 341 ++++++++++++++++++
 src/back/mod.rs                               |   1 +
 src/back/write.rs                             | 102 +++++-
 src/base.rs                                   |  15 +-
 src/declare.rs                                |  40 ++
 src/errors.rs                                 |  31 ++
 src/lib.rs                                    |  52 +--
 test.sh                                       |   6 +-
 23 files changed, 713 insertions(+), 174 deletions(-)
 create mode 100644 failing-lto-tests.txt
 create mode 100644 failing-non-lto-tests.txt
 delete mode 100644 locales/en-US.ftl
 delete mode 100644 patches/0001-Disable-examples.patch
 create mode 100644 src/back/lto.rs

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 419468209ef7..4702494f05cb 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -57,8 +57,8 @@ jobs:
       uses: dawidd6/action-download-artifact@v2
       with:
           workflow: main.yml
-          name: ${{ matrix.libgccjit_version.gcc }}
-          path: gcc-build
+          name: gcc-13
+          path: gcc-13
           repo: antoyo/gcc
           branch: ${{ matrix.libgccjit_version.artifacts_branch }}
           event: push
@@ -71,9 +71,8 @@ jobs:
     - name: Setup path to libgccjit
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       run: |
-          echo $(readlink -f gcc-build) > gcc_path
-          # NOTE: the filename is still libgccjit.so even when the artifact name is different.
-          ln gcc-build/libgccjit.so gcc-build/libgccjit.so.0
+          sudo dpkg --force-overwrite -i gcc-13/gcc-13.deb
+          echo /usr/lib/ > gcc_path
 
     - name: Set env
       run: |
@@ -141,6 +140,9 @@ jobs:
       if: ${{ matrix.libgccjit_version.gcc == 'libgccjit12.so' }}
       run: cat failing-ui-tests12.txt >> failing-ui-tests.txt
 
+    - name: Add more failing tests because the sysroot is not compiled with LTO
+      run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
+
     - name: Run tests
       run: |
         ${{ matrix.libgccjit_version.env_extra }} ./test.sh --release --clean --build-sysroot ${{ matrix.commands }} ${{ matrix.libgccjit_version.extra }}
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 655a94cbafd7..51fc5c76cdb1 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -18,8 +18,6 @@ jobs:
     strategy:
       fail-fast: false
       matrix:
-        libgccjit_version:
-          - { gcc: "libgccjit.so", artifacts_branch: "master" }
         commands: [
           "--test-successful-rustc --nb-parts 2 --current-part 0",
           "--test-successful-rustc --nb-parts 2 --current-part 1",
@@ -40,18 +38,17 @@ jobs:
       uses: dawidd6/action-download-artifact@v2
       with:
           workflow: main.yml
-          name: ${{ matrix.libgccjit_version.gcc }}
-          path: gcc-build
+          name: gcc-13
+          path: gcc-13
           repo: antoyo/gcc
-          branch: ${{ matrix.libgccjit_version.artifacts_branch }}
+          branch: "master"
           event: push
           search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
 
     - name: Setup path to libgccjit
       run: |
-          echo $(readlink -f gcc-build) > gcc_path
-          # NOTE: the filename is still libgccjit.so even when the artifact name is different.
-          ln gcc-build/libgccjit.so gcc-build/libgccjit.so.0
+          sudo dpkg --force-overwrite -i gcc-13/gcc-13.deb
+          echo /usr/lib/ > gcc_path
 
     - name: Set env
       run: |
@@ -89,7 +86,7 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        ./build.sh --release --release-sysroot
+        EMBED_LTO_BITCODE=1 ./build.sh --release --release-sysroot
         cargo test
         ./clean_all.sh
 
@@ -98,6 +95,8 @@ jobs:
         git config --global user.email "user@example.com"
         git config --global user.name "User"
         ./y.sh prepare
+        # FIXME(antoyo): we cannot enable LTO for stdarch tests currently because of some failing LTO tests using proc-macros.
+        echo -n 'lto = "fat"' >> build_sysroot/Cargo.toml
 
     # Compile is a separate step, as the actions-rs/cargo action supports error annotations
     - name: Compile
@@ -106,6 +105,9 @@ jobs:
         command: build
         args: --release
 
+    - name: Add more failing tests because of undefined symbol errors (FIXME)
+      run: cat failing-lto-tests.txt >> failing-ui-tests.txt
+
     - name: Run tests
       run: |
-        ./test.sh --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }}
+        EMBED_LTO_BITCODE=1 ./test.sh --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }}
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 193c77f33c4d..c44d8efe3c78 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -18,8 +18,6 @@ jobs:
     strategy:
       fail-fast: false
       matrix:
-        libgccjit_version:
-          - { gcc: "libgccjit.so", artifacts_branch: "master" }
         cargo_runner: [
           "sde -future -rtm_mode full --",
           "",
@@ -54,18 +52,17 @@ jobs:
       uses: dawidd6/action-download-artifact@v2
       with:
           workflow: main.yml
-          name: ${{ matrix.libgccjit_version.gcc }}
-          path: gcc-build
+          name: gcc-13
+          path: gcc-13
           repo: antoyo/gcc
-          branch: ${{ matrix.libgccjit_version.artifacts_branch }}
+          branch: "master"
           event: push
           search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
 
     - name: Setup path to libgccjit
       run: |
-          echo $(readlink -f gcc-build) > gcc_path
-          # NOTE: the filename is still libgccjit.so even when the artifact name is different.
-          ln gcc-build/libgccjit.so gcc-build/libgccjit.so.0
+          sudo dpkg --force-overwrite -i gcc-13/gcc-13.deb
+          echo /usr/lib/ > gcc_path
 
     - name: Set env
       run: |
@@ -139,4 +136,5 @@ jobs:
       if: ${{ matrix.cargo_runner }}
       run: |
         cd build_sysroot/sysroot_src/library/stdarch/
+        # FIXME: these tests fail when the sysroot is compiled with LTO because of a missing symbol in proc-macro.
         STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../cargo.sh test -- --skip rtm --skip tbm --skip sse4a
diff --git a/Cargo.lock b/Cargo.lock
index 40da783dbe89..404fb9c6db13 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -146,6 +146,15 @@ dependencies = [
  "libc",
 ]
 
+[[package]]
+name = "object"
+version = "0.30.4"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "03b4680b86d9cfafba8fc491dc9b6df26b68cf40e9e6cd73909194759a63c385"
+dependencies = [
+ "memchr",
+]
+
 [[package]]
 name = "redox_syscall"
 version = "0.3.5"
@@ -178,6 +187,7 @@ version = "0.1.0"
 dependencies = [
  "gccjit",
  "lang_tester",
+ "object",
  "smallvec",
  "tempfile",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 3bf629fc6621..51fab147aa27 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -27,6 +27,10 @@ gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
 # Local copy.
 #gccjit = { path = "../gccjit.rs" }
 
+object = { version = "0.30.1", default-features = false, features = [
+    "std",
+    "read",
+] }
 smallvec = { version = "1.6.1", features = ["union", "may_dangle"] }
 # TODO(antoyo): make tempfile optional.
 tempfile = "3.7.1"
diff --git a/Readme.md b/Readme.md
index 47fb840efb9f..daee6e8588dc 100644
--- a/Readme.md
+++ b/Readme.md
@@ -91,6 +91,9 @@ $ CHANNEL="release" $CG_GCCJIT_DIR/cargo.sh run
 
 If you compiled cg_gccjit in debug mode (aka you didn't pass `--release` to `./test.sh`) you should use `CHANNEL="debug"` instead or omit `CHANNEL="release"` completely.
 
+To use LTO, you need to set the variable `FAT_LTO=1` and `EMBED_LTO_BITCODE=1` in addition to setting `lto = "fat"` in the `Cargo.toml`.
+Don't set `FAT_LTO` when compiling the sysroot, though: only set `EMBED_LTO_BITCODE=1`.
+
 ### Rustc
 
 > You should prefer using the Cargo method.
@@ -191,6 +194,48 @@ set substitute-path /usr/src/debug/gcc /path/to/gcc-repo/gcc
 
 TODO(antoyo): but that's not what I remember I was doing.
 
+### `failed to build archive` error
+
+When you get this error:
+
+```
+error: failed to build archive: failed to open object file: No such file or directory (os error 2)
+```
+
+That can be caused by the fact that you try to compile with `lto = "fat"`, but you didn't compile the sysroot with LTO.
+(Not sure if that's the reason since I cannot reproduce anymore. Maybe it happened when forgetting setting `FAT_LTO`.)
+
+### How to debug GCC LTO
+
+Run do the command with `-v -save-temps` and then extract the `lto1` line from the output and run that under the debugger.
+
+### How to send arguments to the GCC linker
+
+```
+CG_RUSTFLAGS="-Clink-args=-save-temps -v" ../cargo.sh build
+```
+
+### How to see the personality functions in the asm dump
+
+```
+CG_RUSTFLAGS="-Clink-arg=-save-temps -v -Clink-arg=-dA" ../cargo.sh build
+```
+
+### How to see the LLVM IR for a sysroot crate
+
+```
+cargo build -v --target x86_64-unknown-linux-gnu -Zbuild-std
+# Take the command from the output and add --emit=llvm-ir
+```
+
+### To prevent the linker from unmangling symbols
+
+Run with:
+
+```
+COLLECT_NO_DEMANGLE=1
+```
+
 ### How to use a custom-build rustc
 
  * Build the stage2 compiler (`rustup toolchain link debug-current build/x86_64-unknown-linux-gnu/stage2`).
@@ -253,4 +298,4 @@ generate it in [gimple.md](./doc/gimple.md).
  * Set `linker='-Clinker=m68k-linux-gcc'`.
  * Set the path to the cross-compiling libgccjit in `gcc_path`.
  * Comment the line: `context.add_command_line_option("-masm=intel");` in src/base.rs.
- * (might not be necessary) Disable the compilation of libstd.so (and possibly libcore.so?).
+ * (might not be necessary) Disable the compilation of libstd.so (and possibly libcore.so?): Remove dylib from build_sysroot/sysroot_src/library/std/Cargo.toml.
diff --git a/build_sysroot/Cargo.toml b/build_sysroot/Cargo.toml
index dca2ffdc24b6..e5658273c978 100644
--- a/build_sysroot/Cargo.toml
+++ b/build_sysroot/Cargo.toml
@@ -19,3 +19,4 @@ rustc-std-workspace-std = { path = "./sysroot_src/library/rustc-std-workspace-st
 
 [profile.release]
 debug = true
+#lto = "fat" # TODO(antoyo): re-enable when the failing LTO tests regarding proc-macros are fixed.
diff --git a/config.sh b/config.sh
index 166e83901c4f..ecc6d56b00ec 100644
--- a/config.sh
+++ b/config.sh
@@ -38,7 +38,14 @@ if [[ "$HOST_TRIPLE" != "$TARGET_TRIPLE" ]]; then
    fi
 fi
 
-export RUSTFLAGS="$CG_RUSTFLAGS $linker -Csymbol-mangling-version=v0 -Cdebuginfo=2 -Clto=off -Zcodegen-backend=$(pwd)/target/${CHANNEL:-debug}/librustc_codegen_gcc.$dylib_ext --sysroot $(pwd)/build_sysroot/sysroot $TEST_FLAGS"
+# Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
+# TODO(antoyo): remove when we can handle ThinLTO.
+disable_lto_flags=''
+if [[ ! -v FAT_LTO ]]; then
+    disable_lto_flags='-Clto=off'
+fi
+
+export RUSTFLAGS="$CG_RUSTFLAGS $linker -Csymbol-mangling-version=v0 -Cdebuginfo=2 $disable_lto_flags -Zcodegen-backend=$(pwd)/target/${CHANNEL:-debug}/librustc_codegen_gcc.$dylib_ext --sysroot $(pwd)/build_sysroot/sysroot $TEST_FLAGS"
 
 # FIXME(antoyo): remove once the atomic shim is gone
 if [[ `uname` == 'Darwin' ]]; then
@@ -50,3 +57,7 @@ export RUSTC_LOG=warn # display metadata load errors
 
 export LD_LIBRARY_PATH="$(pwd)/target/out:$(pwd)/build_sysroot/sysroot/lib/rustlib/$TARGET_TRIPLE/lib:$GCC_PATH"
 export DYLD_LIBRARY_PATH=$LD_LIBRARY_PATH
+# NOTE: To avoid the -fno-inline errors, use /opt/gcc/bin/gcc instead of cc.
+# To do so, add a symlink for cc to /opt/gcc/bin/gcc in our PATH.
+# Another option would be to add the following Rust flag: -Clinker=/opt/gcc/bin/gcc
+export PATH="/opt/gcc/bin:$PATH"
diff --git a/failing-lto-tests.txt b/failing-lto-tests.txt
new file mode 100644
index 000000000000..2e0b6134070b
--- /dev/null
+++ b/failing-lto-tests.txt
@@ -0,0 +1,23 @@
+tests/ui/lint/unsafe_code/forge_unsafe_block.rs
+tests/ui/lint/unused-qualification-in-derive-expansion.rs
+tests/ui/macro-quote-test.rs
+tests/ui/macros/proc_macro.rs
+tests/ui/panic-runtime/lto-unwind.rs
+tests/ui/resolve/derive-macro-1.rs
+tests/ui/resolve/derive-macro-2.rs
+tests/ui/rfcs/rfc-2565-param-attrs/param-attrs-pretty.rs
+tests/ui/rfcs/rfc-2565-param-attrs/issue-64682-dropping-first-attrs-in-impl-fns.rs
+tests/ui/rfcs/rfc-3348-c-string-literals/edition-spans.rs
+tests/ui/rust-2018/suggestions-not-always-applicable.rs
+tests/ui/rust-2021/reserved-prefixes-via-macro.rs
+tests/ui/underscore-imports/duplicate.rs
+tests/ui/async-await/issues/issue-60674.rs
+tests/ui/attributes/main-removed-2/main.rs
+tests/ui/cfg/assume-incomplete-release/assume-incomplete.rs
+tests/ui/crate-loading/cross-compiled-proc-macro.rs
+tests/ui/derives/derive-marker-tricky.rs
+tests/ui/diagnostic_namespace/existing_proc_macros.rs
+tests/ui/fmt/format-args-capture-issue-106408.rs
+tests/ui/fmt/indoc-issue-106408.rs
+tests/ui/hygiene/issue-77523-def-site-async-await.rs
+tests/ui/inherent-impls-overlap-check/no-overlap.rs
diff --git a/failing-non-lto-tests.txt b/failing-non-lto-tests.txt
new file mode 100644
index 000000000000..2f338f7d3c87
--- /dev/null
+++ b/failing-non-lto-tests.txt
@@ -0,0 +1,11 @@
+tests/ui/issues/issue-44056.rs
+tests/ui/lto/fat-lto.rs
+tests/ui/lto/debuginfo-lto.rs
+tests/ui/lto/lto-many-codegen-units.rs
+tests/ui/lto/issue-100772.rs
+tests/ui/lto/lto-rustc-loads-linker-plugin.rs
+tests/ui/panic-runtime/lto-unwind.rs
+tests/ui/sanitize/issue-111184-generator-witness.rs
+tests/ui/sepcomp/sepcomp-lib-lto.rs
+tests/ui/lto/lto-opt-level-s.rs
+tests/ui/lto/lto-opt-level-z.rs
diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index fe0df3347bbf..0711ae99a3e7 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -1,11 +1,5 @@
-tests/ui/allocator/custom-in-block.rs
-tests/ui/allocator/custom-in-submodule.rs
-tests/ui/allocator/custom.rs
-tests/ui/allocator/hygiene.rs
 tests/ui/allocator/no_std-alloc-error-handler-custom.rs
 tests/ui/allocator/no_std-alloc-error-handler-default.rs
-tests/ui/allocator/xcrate-use.rs
-tests/ui/allocator/xcrate-use2.rs
 tests/ui/asm/may_unwind.rs
 tests/ui/asm/x86_64/multiple-clobber-abi.rs
 tests/ui/debuginfo/debuginfo-emit-llvm-ir-and-split-debuginfo.rs
@@ -14,7 +8,6 @@ tests/ui/linkage-attr/linkage1.rs
 tests/ui/lto/dylib-works.rs
 tests/ui/numbers-arithmetic/saturating-float-casts.rs
 tests/ui/polymorphization/promoted-function.rs
-tests/ui/process/nofile-limit.rs
 tests/ui/sepcomp/sepcomp-cci.rs
 tests/ui/sepcomp/sepcomp-extern.rs
 tests/ui/sepcomp/sepcomp-fns-backwards.rs
@@ -53,8 +46,8 @@ tests/ui/issues/issue-40883.rs
 tests/ui/issues/issue-43853.rs
 tests/ui/issues/issue-47364.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
-tests/ui/rfcs/rfc-2091-track-caller/std-panic-locations.rs
 tests/ui/rfcs/rfc-1857-stabilize-drop-order/drop-order.rs
+tests/ui/rfcs/rfc-2091-track-caller/std-panic-locations.rs
 tests/ui/simd/issue-17170.rs
 tests/ui/simd/issue-39720.rs
 tests/ui/simd/issue-89193.rs
@@ -64,9 +57,15 @@ tests/ui/alloc-error/default-alloc-error-hook.rs
 tests/ui/generator/panic-safe.rs
 tests/ui/issues/issue-14875.rs
 tests/ui/issues/issue-29948.rs
-tests/ui/panic-while-printing.rs
-tests/ui/enum-discriminant/get_discr.rs
 tests/ui/panics/nested_panic_caught.rs
 tests/ui/simd/intrinsic/generic-bswap-byte.rs
 tests/ui/const_prop/ice-issue-111353.rs
 tests/ui/process/println-with-broken-pipe.rs
+tests/ui/panic-runtime/lto-abort.rs
+tests/ui/lto/thin-lto-inlines2.rs
+tests/ui/lto/weak-works.rs
+tests/ui/lto/thin-lto-inlines.rs
+tests/ui/lto/thin-lto-global-allocator.rs
+tests/ui/lto/msvc-imp-present.rs
+tests/ui/lto/lto-thin-rustc-loads-linker-plugin.rs
+tests/ui/lto/all-crates.rs
diff --git a/locales/en-US.ftl b/locales/en-US.ftl
deleted file mode 100644
index 2181d49eeef6..000000000000
--- a/locales/en-US.ftl
+++ /dev/null
@@ -1,65 +0,0 @@
-codegen_gcc_unwinding_inline_asm =
-    GCC backend does not support unwinding from inline asm
-
-codegen_gcc_lto_not_supported =
-    LTO is not supported. You may get a linker error.
-
-codegen_gcc_invalid_monomorphization_basic_integer =
-    invalid monomorphization of `{$name}` intrinsic: expected basic integer type, found `{$ty}`
-
-codegen_gcc_invalid_monomorphization_invalid_float_vector =
-    invalid monomorphization of `{$name}` intrinsic: unsupported element type `{$elem_ty}` of floating-point vector `{$vec_ty}`
-
-codegen_gcc_invalid_monomorphization_not_float =
-    invalid monomorphization of `{$name}` intrinsic: `{$ty}` is not a floating-point type
-
-codegen_gcc_invalid_monomorphization_unrecognized =
-    invalid monomorphization of `{$name}` intrinsic: unrecognized intrinsic `{$name}`
-
-codegen_gcc_invalid_monomorphization_expected_signed_unsigned =
-    invalid monomorphization of `{$name}` intrinsic: expected element type `{$elem_ty}` of vector type `{$vec_ty}` to be a signed or unsigned integer type
-
-codegen_gcc_invalid_monomorphization_unsupported_element =
-    invalid monomorphization of `{$name}` intrinsic: unsupported {$name} from `{$in_ty}` with element `{$elem_ty}` to `{$ret_ty}`
-
-codegen_gcc_invalid_monomorphization_invalid_bitmask =
-    invalid monomorphization of `{$name}` intrinsic: invalid bitmask `{$ty}`, expected `u{$expected_int_bits}` or `[u8; {$expected_bytes}]`
-
-codegen_gcc_invalid_monomorphization_simd_shuffle =
-    invalid monomorphization of `{$name}` intrinsic: simd_shuffle index must be an array of `u32`, got `{$ty}`
-
-codegen_gcc_invalid_monomorphization_expected_simd =
-    invalid monomorphization of `{$name}` intrinsic: expected SIMD {$expected_ty} type, found non-SIMD `{$found_ty}`
-
-codegen_gcc_invalid_monomorphization_mask_type =
-    invalid monomorphization of `{$name}` intrinsic: mask element type is `{$ty}`, expected `i_`
-
-codegen_gcc_invalid_monomorphization_return_length =
-    invalid monomorphization of `{$name}` intrinsic: expected return type of length {$in_len}, found `{$ret_ty}` with length {$out_len}
-
-codegen_gcc_invalid_monomorphization_return_length_input_type =
-    invalid monomorphization of `{$name}` intrinsic: expected return type with length {$in_len} (same as input type `{$in_ty}`), found `{$ret_ty}` with length {$out_len}
-
-codegen_gcc_invalid_monomorphization_return_element =
-    invalid monomorphization of `{$name}` intrinsic: expected return element type `{$in_elem}` (element of input `{$in_ty}`), found `{$ret_ty}` with element type `{$out_ty}`
-
-codegen_gcc_invalid_monomorphization_return_type =
-    invalid monomorphization of `{$name}` intrinsic: expected return type `{$in_elem}` (element of input `{$in_ty}`), found `{$ret_ty}`
-
-codegen_gcc_invalid_monomorphization_inserted_type =
-    invalid monomorphization of `{$name}` intrinsic: expected inserted type `{$in_elem}` (element of input `{$in_ty}`), found `{$out_ty}`
-
-codegen_gcc_invalid_monomorphization_return_integer_type =
-    invalid monomorphization of `{$name}` intrinsic: expected return type with integer elements, found `{$ret_ty}` with non-integer `{$out_ty}`
-
-codegen_gcc_invalid_monomorphization_mismatched_lengths =
-    invalid monomorphization of `{$name}` intrinsic: mismatched lengths: mask length `{$m_len}` != other vector length `{$v_len}`
-
-codegen_gcc_invalid_monomorphization_unsupported_cast =
-    invalid monomorphization of `{$name}` intrinsic: unsupported cast from `{$in_ty}` with element `{$in_elem}` to `{$ret_ty}` with element `{$out_elem}`
-
-codegen_gcc_invalid_monomorphization_unsupported_operation =
-    invalid monomorphization of `{$name}` intrinsic: unsupported operation on `{$in_ty}` with element `{$in_elem}`
-
-codegen_gcc_invalid_minimum_alignment =
-    invalid minimum global alignment: {$err}
diff --git a/messages.ftl b/messages.ftl
index 2fd0daee3e73..de9be3a55280 100644
--- a/messages.ftl
+++ b/messages.ftl
@@ -9,3 +9,17 @@ codegen_gcc_tied_target_features = the target features {$features} must all be e
 
 codegen_gcc_unwinding_inline_asm =
     GCC backend does not support unwinding from inline asm
+
+codegen_gcc_copy_bitcode = failed to copy bitcode to object file: {$err}
+
+codegen_gcc_dynamic_linking_with_lto =
+    cannot prefer dynamic linking when performing LTO
+    .note = only 'staticlib', 'bin', and 'cdylib' outputs are supported with LTO
+
+codegen_gcc_load_bitcode = failed to load bitcode of module "{$name}"
+
+codegen_gcc_lto_disallowed = lto can only be run for executables, cdylibs and static library outputs
+
+codegen_gcc_lto_dylib = lto cannot be used for `dylib` crate type without `-Zdylib-lto`
+
+codegen_gcc_lto_bitcode_from_rlib = failed to get bitcode from object file for LTO ({$gcc_err})
diff --git a/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch b/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch
index 93c63b5dcacf..2a55f2cb796f 100644
--- a/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch
+++ b/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch
@@ -1,25 +1,26 @@
-From c3821e02fbd6cb5ad6e06d759fccdc9073712375 Mon Sep 17 00:00:00 2001
+From b8f3eed3053c9333b5dfbeaeb2a6a65a4b3156df Mon Sep 17 00:00:00 2001
 From: Antoni Boucher <bouanto@zoho.com>
-Date: Tue, 7 Jun 2022 21:40:13 -0400
-Subject: [PATCH] Add stdarch Cargo.toml for testing
+Date: Tue, 29 Aug 2023 13:06:34 -0400
+Subject: [PATCH] Patch 0001-Add-stdarch-Cargo.toml-for-testing.patch
 
 ---
- library/stdarch/Cargo.toml | 20 ++++++++++++++++++++
- 1 file changed, 20 insertions(+)
+ library/stdarch/Cargo.toml | 23 +++++++++++++++++++++++
+ 1 file changed, 23 insertions(+)
  create mode 100644 library/stdarch/Cargo.toml
 
 diff --git a/library/stdarch/Cargo.toml b/library/stdarch/Cargo.toml
 new file mode 100644
-index 0000000..fbe0a95
+index 0000000..4c63700
 --- /dev/null
 +++ b/library/stdarch/Cargo.toml
-@@ -0,0 +1,20 @@
+@@ -0,0 +1,21 @@
 +[workspace]
++resolver = "1"
 +members = [
 +  "crates/core_arch",
 +  "crates/std_detect",
 +  "crates/stdarch-gen",
-+  "examples/"
++  #"examples/"
 +]
 +exclude = [
 +  "crates/wasm-assert-instr-tests"
@@ -35,5 +36,5 @@ index 0000000..fbe0a95
 +opt-level = 3
 +incremental = true
 -- 
-2.26.2.7.g19db9cfb68.dirty
+2.42.0
 
diff --git a/patches/0001-Disable-examples.patch b/patches/0001-Disable-examples.patch
deleted file mode 100644
index 1b71df1ca8df..000000000000
--- a/patches/0001-Disable-examples.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From a2d53a324a02c04b76c0e9d39dc15cd443a3b8b2 Mon Sep 17 00:00:00 2001
-From: Antoni Boucher <bouanto@zoho.com>
-Date: Fri, 25 Nov 2022 11:18:11 -0500
-Subject: [PATCH] Disable examples
-
----
- library/stdarch/Cargo.toml | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/library/stdarch/Cargo.toml b/library/stdarch/Cargo.toml
-index fbe0a95..748d72d 100644
---- a/library/stdarch/Cargo.toml
-+++ b/library/stdarch/Cargo.toml
-@@ -3,7 +3,7 @@ members = [
-   "crates/core_arch",
-   "crates/std_detect",
-   "crates/stdarch-gen",
--  "examples/"
-+  #"examples/"
- ]
- exclude = [
-   "crates/wasm-assert-instr-tests"
--- 
-2.26.2.7.g19db9cfb68.dirty
-
diff --git a/src/back/lto.rs b/src/back/lto.rs
new file mode 100644
index 000000000000..529454b119e8
--- /dev/null
+++ b/src/back/lto.rs
@@ -0,0 +1,341 @@
+/// GCC requires to use the same toolchain for the whole compilation when doing LTO.
+/// So, we need the same version/commit of the linker (gcc) and lto front-end binaries (lto1,
+/// lto-wrapper, liblto_plugin.so).
+
+// FIXME(antoyo): the executables compiled with LTO are bigger than those compiled without LTO.
+// Since it is the opposite for cg_llvm, check if this is normal.
+//
+// Maybe we embed the bitcode in the final binary?
+// It doesn't look like we try to generate fat objects for the final binary.
+// Check if the way we combine the object files make it keep the LTO sections on the final link.
+// Maybe that's because the combined object files contain the IR (true) and the final link
+// does not remove it?
+//
+// TODO(antoyo): for performance, check which optimizations the C++ frontend enables.
+//
+// Fix these warnings:
+// /usr/bin/ld: warning: type of symbol `_RNvNvNvNtCs5JWOrf9uCus_5rayon11thread_pool19WORKER_THREAD_STATE7___getit5___KEY' changed from 1 to 6 in /tmp/ccKeUSiR.ltrans0.ltrans.o
+// /usr/bin/ld: warning: type of symbol `_RNvNvNvNvNtNtNtCsAj5i4SGTR7_3std4sync4mpmc5waker17current_thread_id5DUMMY7___getit5___KEY' changed from 1 to 6 in /tmp/ccKeUSiR.ltrans0.ltrans.o
+// /usr/bin/ld: warning: incremental linking of LTO and non-LTO objects; using -flinker-output=nolto-rel which will bypass whole program optimization
+
+use std::ffi::CString;
+use std::fs::{self, File};
+use std::path::{Path, PathBuf};
+
+use gccjit::OutputKind;
+use object::read::archive::ArchiveFile;
+use rustc_codegen_ssa::back::lto::{LtoModuleCodegen, SerializedModule};
+use rustc_codegen_ssa::back::symbol_export;
+use rustc_codegen_ssa::back::write::{CodegenContext, FatLtoInput};
+use rustc_codegen_ssa::traits::*;
+use rustc_codegen_ssa::{looks_like_rust_object_file, ModuleCodegen, ModuleKind};
+use rustc_data_structures::memmap::Mmap;
+use rustc_errors::{FatalError, Handler};
+use rustc_hir::def_id::LOCAL_CRATE;
+use rustc_middle::dep_graph::WorkProduct;
+use rustc_middle::middle::exported_symbols::{SymbolExportInfo, SymbolExportLevel};
+use rustc_session::config::{CrateType, Lto};
+use tempfile::{TempDir, tempdir};
+
+use crate::back::write::save_temp_bitcode;
+use crate::errors::{
+    DynamicLinkingWithLTO, LtoBitcodeFromRlib, LtoDisallowed, LtoDylib,
+};
+use crate::{GccCodegenBackend, GccContext, to_gcc_opt_level};
+
+/// We keep track of the computed LTO cache keys from the previous
+/// session to determine which CGUs we can reuse.
+//pub const THIN_LTO_KEYS_INCR_COMP_FILE_NAME: &str = "thin-lto-past-keys.bin";
+
+pub fn crate_type_allows_lto(crate_type: CrateType) -> bool {
+    match crate_type {
+        CrateType::Executable | CrateType::Dylib | CrateType::Staticlib | CrateType::Cdylib => true,
+        CrateType::Rlib | CrateType::ProcMacro => false,
+    }
+}
+
+struct LtoData {
+    // TODO(antoyo): use symbols_below_threshold.
+    //symbols_below_threshold: Vec<CString>,
+    upstream_modules: Vec<(SerializedModule<ModuleBuffer>, CString)>,
+    tmp_path: TempDir,
+}
+
+fn prepare_lto(cgcx: &CodegenContext<GccCodegenBackend>, diag_handler: &Handler) -> Result<LtoData, FatalError> {
+    let export_threshold = match cgcx.lto {
+        // We're just doing LTO for our one crate
+        Lto::ThinLocal => SymbolExportLevel::Rust,
+
+        // We're doing LTO for the entire crate graph
+        Lto::Fat | Lto::Thin => symbol_export::crates_export_threshold(&cgcx.crate_types),
+
+        Lto::No => panic!("didn't request LTO but we're doing LTO"),
+    };
+
+    let tmp_path =
+        match tempdir() {
+            Ok(tmp_path) => tmp_path,
+            Err(error) => {
+                eprintln!("Cannot create temporary directory: {}", error);
+                return Err(FatalError);
+            },
+        };
+
+    let symbol_filter = &|&(ref name, info): &(String, SymbolExportInfo)| {
+        if info.level.is_below_threshold(export_threshold) || info.used {
+            Some(CString::new(name.as_str()).unwrap())
+        } else {
+            None
+        }
+    };
+    let exported_symbols = cgcx.exported_symbols.as_ref().expect("needs exported symbols for LTO");
+    let mut symbols_below_threshold = {
+        let _timer = cgcx.prof.generic_activity("GCC_lto_generate_symbols_below_threshold");
+        exported_symbols[&LOCAL_CRATE].iter().filter_map(symbol_filter).collect::<Vec<CString>>()
+    };
+    info!("{} symbols to preserve in this crate", symbols_below_threshold.len());
+
+    // If we're performing LTO for the entire crate graph, then for each of our
+    // upstream dependencies, find the corresponding rlib and load the bitcode
+    // from the archive.
+    //
+    // We save off all the bytecode and GCC module file path for later processing
+    // with either fat or thin LTO
+    let mut upstream_modules = Vec::new();
+    if cgcx.lto != Lto::ThinLocal {
+        // Make sure we actually can run LTO
+        for crate_type in cgcx.crate_types.iter() {
+            if !crate_type_allows_lto(*crate_type) {
+                diag_handler.emit_err(LtoDisallowed);
+                return Err(FatalError);
+            } else if *crate_type == CrateType::Dylib {
+                if !cgcx.opts.unstable_opts.dylib_lto {
+                    diag_handler.emit_err(LtoDylib);
+                    return Err(FatalError);
+                }
+            }
+        }
+
+        if cgcx.opts.cg.prefer_dynamic && !cgcx.opts.unstable_opts.dylib_lto {
+            diag_handler.emit_err(DynamicLinkingWithLTO);
+            return Err(FatalError);
+        }
+
+        for &(cnum, ref path) in cgcx.each_linked_rlib_for_lto.iter() {
+            let exported_symbols =
+                cgcx.exported_symbols.as_ref().expect("needs exported symbols for LTO");
+            {
+                let _timer =
+                    cgcx.prof.generic_activity("GCC_lto_generate_symbols_below_threshold");
+                symbols_below_threshold
+                    .extend(exported_symbols[&cnum].iter().filter_map(symbol_filter));
+            }
+
+            let archive_data = unsafe {
+                Mmap::map(File::open(&path).expect("couldn't open rlib"))
+                    .expect("couldn't map rlib")
+            };
+            let archive = ArchiveFile::parse(&*archive_data).expect("wanted an rlib");
+            let obj_files = archive
+                .members()
+                .filter_map(|child| {
+                    child.ok().and_then(|c| {
+                        std::str::from_utf8(c.name()).ok().map(|name| (name.trim(), c))
+                    })
+                })
+                .filter(|&(name, _)| looks_like_rust_object_file(name));
+            for (name, child) in obj_files {
+                info!("adding bitcode from {}", name);
+                let path = tmp_path.path().join(name);
+                match save_as_file(child.data(&*archive_data).expect("corrupt rlib"), &path) {
+                    Ok(()) => {
+                        let buffer = ModuleBuffer::new(path);
+                        let module = SerializedModule::Local(buffer);
+                        upstream_modules.push((module, CString::new(name).unwrap()));
+                    }
+                    Err(e) => {
+                        diag_handler.emit_err(e);
+                        return Err(FatalError);
+                    }
+                }
+            }
+        }
+    }
+
+    Ok(LtoData {
+        //symbols_below_threshold,
+        upstream_modules,
+        tmp_path,
+    })
+}
+
+fn save_as_file(obj: &[u8], path: &Path) -> Result<(), LtoBitcodeFromRlib> {
+    fs::write(path, obj)
+        .map_err(|error| LtoBitcodeFromRlib {
+            gcc_err: format!("write object file to temp dir: {}", error)
+        })
+}
+
+/// Performs fat LTO by merging all modules into a single one and returning it
+/// for further optimization.
+pub(crate) fn run_fat(
+    cgcx: &CodegenContext<GccCodegenBackend>,
+    modules: Vec<FatLtoInput<GccCodegenBackend>>,
+    cached_modules: Vec<(SerializedModule<ModuleBuffer>, WorkProduct)>,
+) -> Result<LtoModuleCodegen<GccCodegenBackend>, FatalError> {
+    let diag_handler = cgcx.create_diag_handler();
+    let lto_data = prepare_lto(cgcx, &diag_handler)?;
+    /*let symbols_below_threshold =
+        lto_data.symbols_below_threshold.iter().map(|c| c.as_ptr()).collect::<Vec<_>>();*/
+    fat_lto(cgcx, &diag_handler, modules, cached_modules, lto_data.upstream_modules, lto_data.tmp_path,
+        //&symbols_below_threshold,
+    )
+}
+
+fn fat_lto(cgcx: &CodegenContext<GccCodegenBackend>, _diag_handler: &Handler, modules: Vec<FatLtoInput<GccCodegenBackend>>, cached_modules: Vec<(SerializedModule<ModuleBuffer>, WorkProduct)>, mut serialized_modules: Vec<(SerializedModule<ModuleBuffer>, CString)>, tmp_path: TempDir,
+    //symbols_below_threshold: &[*const libc::c_char],
+) -> Result<LtoModuleCodegen<GccCodegenBackend>, FatalError> {
+    let _timer = cgcx.prof.generic_activity("GCC_fat_lto_build_monolithic_module");
+    info!("going for a fat lto");
+
+    // Sort out all our lists of incoming modules into two lists.
+    //
+    // * `serialized_modules` (also and argument to this function) contains all
+    //   modules that are serialized in-memory.
+    // * `in_memory` contains modules which are already parsed and in-memory,
+    //   such as from multi-CGU builds.
+    //
+    // All of `cached_modules` (cached from previous incremental builds) can
+    // immediately go onto the `serialized_modules` modules list and then we can
+    // split the `modules` array into these two lists.
+    let mut in_memory = Vec::new();
+    serialized_modules.extend(cached_modules.into_iter().map(|(buffer, wp)| {
+        info!("pushing cached module {:?}", wp.cgu_name);
+        (buffer, CString::new(wp.cgu_name).unwrap())
+    }));
+    for module in modules {
+        match module {
+            FatLtoInput::InMemory(m) => in_memory.push(m),
+            FatLtoInput::Serialized { name, buffer } => {
+                info!("pushing serialized module {:?}", name);
+                let buffer = SerializedModule::Local(buffer);
+                serialized_modules.push((buffer, CString::new(name).unwrap()));
+            }
+        }
+    }
+
+    // Find the "costliest" module and merge everything into that codegen unit.
+    // All the other modules will be serialized and reparsed into the new
+    // context, so this hopefully avoids serializing and parsing the largest
+    // codegen unit.
+    //
+    // Additionally use a regular module as the base here to ensure that various
+    // file copy operations in the backend work correctly. The only other kind
+    // of module here should be an allocator one, and if your crate is smaller
+    // than the allocator module then the size doesn't really matter anyway.
+    let costliest_module = in_memory
+        .iter()
+        .enumerate()
+        .filter(|&(_, module)| module.kind == ModuleKind::Regular)
+        .map(|(i, _module)| {
+            //let cost = unsafe { llvm::LLVMRustModuleCost(module.module_llvm.llmod()) };
+            // TODO(antoyo): compute the cost of a module if GCC allows this.
+            (0, i)
+        })
+        .max();
+
+    // If we found a costliest module, we're good to go. Otherwise all our
+    // inputs were serialized which could happen in the case, for example, that
+    // all our inputs were incrementally reread from the cache and we're just
+    // re-executing the LTO passes. If that's the case deserialize the first
+    // module and create a linker with it.
+    let mut module: ModuleCodegen<GccContext> = match costliest_module {
+        Some((_cost, i)) => in_memory.remove(i),
+        None => {
+            unimplemented!("Incremental");
+            /*assert!(!serialized_modules.is_empty(), "must have at least one serialized module");
+            let (buffer, name) = serialized_modules.remove(0);
+            info!("no in-memory regular modules to choose from, parsing {:?}", name);
+            ModuleCodegen {
+                module_llvm: GccContext::parse(cgcx, &name, buffer.data(), diag_handler)?,
+                name: name.into_string().unwrap(),
+                kind: ModuleKind::Regular,
+            }*/
+        }
+    };
+    let mut serialized_bitcode = Vec::new();
+    {
+        info!("using {:?} as a base module", module.name);
+
+        // We cannot load and merge GCC contexts in memory like cg_llvm is doing.
+        // Instead, we combine the object files into a single object file.
+        for module in in_memory {
+            let path = tmp_path.path().to_path_buf().join(&module.name);
+            let path = path.to_str().expect("path");
+            let context = &module.module_llvm.context;
+            let config = cgcx.config(module.kind);
+            // NOTE: we need to set the optimization level here in order for LTO to do its job.
+            context.set_optimization_level(to_gcc_opt_level(config.opt_level));
+            context.add_command_line_option("-flto=auto");
+            context.add_command_line_option("-flto-partition=one");
+            context.compile_to_file(OutputKind::ObjectFile, path);
+            let buffer = ModuleBuffer::new(PathBuf::from(path));
+            let llmod_id = CString::new(&module.name[..]).unwrap();
+            serialized_modules.push((SerializedModule::Local(buffer), llmod_id));
+        }
+        // Sort the modules to ensure we produce deterministic results.
+        serialized_modules.sort_by(|module1, module2| module1.1.cmp(&module2.1));
+
+        // We add the object files and save in should_combine_object_files that we should combine
+        // them into a single object file when compiling later.
+        for (bc_decoded, name) in serialized_modules {
+            let _timer = cgcx
+                .prof
+                .generic_activity_with_arg_recorder("GCC_fat_lto_link_module", |recorder| {
+                    recorder.record_arg(format!("{:?}", name))
+                });
+            info!("linking {:?}", name);
+            match bc_decoded {
+                SerializedModule::Local(ref module_buffer) => {
+                    module.module_llvm.should_combine_object_files = true;
+                    module.module_llvm.context.add_driver_option(module_buffer.0.to_str().expect("path"));
+                },
+                SerializedModule::FromRlib(_) => unimplemented!("from rlib"),
+                SerializedModule::FromUncompressedFile(_) => unimplemented!("from uncompressed file"),
+            }
+            serialized_bitcode.push(bc_decoded);
+        }
+        save_temp_bitcode(cgcx, &module, "lto.input");
+
+        // Internalize everything below threshold to help strip out more modules and such.
+        /*unsafe {
+            let ptr = symbols_below_threshold.as_ptr();
+            llvm::LLVMRustRunRestrictionPass(
+                llmod,
+                ptr as *const *const libc::c_char,
+                symbols_below_threshold.len() as libc::size_t,
+            );*/
+            save_temp_bitcode(cgcx, &module, "lto.after-restriction");
+        //}
+    }
+
+    // NOTE: save the temporary directory used by LTO so that it gets deleted after linking instead
+    // of now.
+    module.module_llvm.temp_dir = Some(tmp_path);
+
+    Ok(LtoModuleCodegen::Fat { module, _serialized_bitcode: serialized_bitcode })
+}
+
+pub struct ModuleBuffer(PathBuf);
+
+impl ModuleBuffer {
+    pub fn new(path: PathBuf) -> ModuleBuffer {
+        ModuleBuffer(path)
+    }
+}
+
+impl ModuleBufferMethods for ModuleBuffer {
+    fn data(&self) -> &[u8] {
+        unimplemented!("data not needed for GCC codegen");
+    }
+}
diff --git a/src/back/mod.rs b/src/back/mod.rs
index d692799d7642..10187eab0d7e 100644
--- a/src/back/mod.rs
+++ b/src/back/mod.rs
@@ -1 +1,2 @@
+pub mod lto;
 pub mod write;
diff --git a/src/back/write.rs b/src/back/write.rs
index 5f54ac4ebc69..04772d7707ab 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -2,27 +2,71 @@ use std::{env, fs};
 
 use gccjit::OutputKind;
 use rustc_codegen_ssa::{CompiledModule, ModuleCodegen};
-use rustc_codegen_ssa::back::write::{CodegenContext, EmitObj, ModuleConfig};
+use rustc_codegen_ssa::back::link::ensure_removed;
+use rustc_codegen_ssa::back::write::{BitcodeSection, CodegenContext, EmitObj, ModuleConfig};
 use rustc_errors::Handler;
+use rustc_fs_util::link_or_copy;
 use rustc_session::config::OutputType;
 use rustc_span::fatal_error::FatalError;
 use rustc_target::spec::SplitDebuginfo;
 
 use crate::{GccCodegenBackend, GccContext};
+use crate::errors::CopyBitcode;
 
-pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, _diag_handler: &Handler, module: ModuleCodegen<GccContext>, config: &ModuleConfig) -> Result<CompiledModule, FatalError> {
-    let _timer = cgcx.prof.generic_activity_with_arg("LLVM_module_codegen", &*module.name);
+pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, diag_handler: &Handler, module: ModuleCodegen<GccContext>, config: &ModuleConfig) -> Result<CompiledModule, FatalError> {
+    let _timer = cgcx.prof.generic_activity_with_arg("GCC_module_codegen", &*module.name);
     {
         let context = &module.module_llvm.context;
 
         let module_name = module.name.clone();
+
+        let should_combine_object_files = module.module_llvm.should_combine_object_files;
+
         let module_name = Some(&module_name[..]);
 
-        let _bc_out = cgcx.output_filenames.temp_path(OutputType::Bitcode, module_name);
+        // NOTE: Only generate object files with GIMPLE when this environment variable is set for
+        // now because this requires a particular setup (same gcc/lto1/lto-wrapper commit as libgccjit).
+        let fat_lto = env::var("EMBED_LTO_BITCODE").as_deref() == Ok("1");
+
+        let bc_out = cgcx.output_filenames.temp_path(OutputType::Bitcode, module_name);
         let obj_out = cgcx.output_filenames.temp_path(OutputType::Object, module_name);
 
-        if config.bitcode_needed() {
+        if config.bitcode_needed() && fat_lto {
+            let _timer = cgcx
+                .prof
+                .generic_activity_with_arg("GCC_module_codegen_make_bitcode", &*module.name);
+
             // TODO(antoyo)
+            /*if let Some(bitcode_filename) = bc_out.file_name() {
+                cgcx.prof.artifact_size(
+                    "llvm_bitcode",
+                    bitcode_filename.to_string_lossy(),
+                    data.len() as u64,
+                );
+            }*/
+
+            if config.emit_bc || config.emit_obj == EmitObj::Bitcode {
+                let _timer = cgcx
+                    .prof
+                    .generic_activity_with_arg("GCC_module_codegen_emit_bitcode", &*module.name);
+                context.add_command_line_option("-flto=auto");
+                context.add_command_line_option("-flto-partition=one");
+                context.compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+            }
+
+            if config.emit_obj == EmitObj::ObjectCode(BitcodeSection::Full) {
+                let _timer = cgcx
+                    .prof
+                    .generic_activity_with_arg("GCC_module_codegen_embed_bitcode", &*module.name);
+                // TODO(antoyo): maybe we should call embed_bitcode to have the proper iOS fixes?
+                //embed_bitcode(cgcx, llcx, llmod, &config.bc_cmdline, data);
+
+                context.add_command_line_option("-flto=auto");
+                context.add_command_line_option("-flto-partition=one");
+                context.add_command_line_option("-ffat-lto-objects");
+                // TODO(antoyo): Send -plugin/usr/lib/gcc/x86_64-pc-linux-gnu/11.1.0/liblto_plugin.so to linker (this should be done when specifying the appropriate rustc cli argument).
+                context.compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+            }
         }
 
         if config.emit_ir {
@@ -32,7 +76,7 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, _diag_han
         if config.emit_asm {
             let _timer = cgcx
                 .prof
-                .generic_activity_with_arg("LLVM_module_codegen_emit_asm", &*module.name);
+                .generic_activity_with_arg("GCC_module_codegen_emit_asm", &*module.name);
             let path = cgcx.output_filenames.temp_path(OutputType::Assembly, module_name);
             context.compile_to_file(OutputKind::Assembler, path.to_str().expect("path to str"));
         }
@@ -41,7 +85,7 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, _diag_han
             EmitObj::ObjectCode(_) => {
                 let _timer = cgcx
                     .prof
-                    .generic_activity_with_arg("LLVM_module_codegen_emit_obj", &*module.name);
+                    .generic_activity_with_arg("GCC_module_codegen_emit_obj", &*module.name);
                 if env::var("CG_GCCJIT_DUMP_MODULE_NAMES").as_deref() == Ok("1") {
                     println!("Module {}", module.name);
                 }
@@ -60,11 +104,36 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, _diag_han
                     context.set_debug_info(true);
                     context.dump_to_file(path, true);
                 }
-                context.compile_to_file(OutputKind::ObjectFile, obj_out.to_str().expect("path to str"));
+                if should_combine_object_files && fat_lto {
+                    context.add_command_line_option("-flto=auto");
+                    context.add_command_line_option("-flto-partition=one");
+
+                    context.add_driver_option("-Wl,-r");
+                    // NOTE: we need -nostdlib, otherwise, we get the following error:
+                    // /usr/bin/ld: cannot find -lgcc_s: No such file or directory
+                    context.add_driver_option("-nostdlib");
+                    // NOTE: without -fuse-linker-plugin, we get the following error:
+                    // lto1: internal compiler error: decompressed stream: Destination buffer is too small
+                    context.add_driver_option("-fuse-linker-plugin");
+
+                    // NOTE: this doesn't actually generate an executable. With the above flags, it combines the .o files together in another .o.
+                    context.compile_to_file(OutputKind::Executable, obj_out.to_str().expect("path to str"));
+                }
+                else {
+                    context.compile_to_file(OutputKind::ObjectFile, obj_out.to_str().expect("path to str"));
+                }
             }
 
             EmitObj::Bitcode => {
-                // TODO(antoyo)
+                debug!("copying bitcode {:?} to obj {:?}", bc_out, obj_out);
+                if let Err(err) = link_or_copy(&bc_out, &obj_out) {
+                    diag_handler.emit_err(CopyBitcode { err });
+                }
+
+                if !config.emit_bc {
+                    debug!("removing_bitcode {:?}", bc_out);
+                    ensure_removed(diag_handler, &bc_out);
+                }
             }
 
             EmitObj::None => {}
@@ -82,3 +151,18 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, _diag_han
 pub(crate) fn link(_cgcx: &CodegenContext<GccCodegenBackend>, _diag_handler: &Handler, mut _modules: Vec<ModuleCodegen<GccContext>>) -> Result<ModuleCodegen<GccContext>, FatalError> {
     unimplemented!();
 }
+
+pub(crate) fn save_temp_bitcode(cgcx: &CodegenContext<GccCodegenBackend>, _module: &ModuleCodegen<GccContext>, _name: &str) {
+    if !cgcx.save_temps {
+        return;
+    }
+    unimplemented!();
+    /*unsafe {
+        let ext = format!("{}.bc", name);
+        let cgu = Some(&module.name[..]);
+        let path = cgcx.output_filenames.temp_path_ext(&ext, cgu);
+        let cstr = path_to_c_string(&path);
+        let llmod = module.module_llvm.llmod();
+        llvm::LLVMWriteBitcodeToFile(llmod, cstr.as_ptr());
+    }*/
+}
diff --git a/src/base.rs b/src/base.rs
index bf0309fea148..266d60da10ca 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -56,6 +56,7 @@ pub fn global_linkage_to_gcc(linkage: Linkage) -> GlobalKind {
 pub fn linkage_to_gcc(linkage: Linkage) -> FunctionType {
     match linkage {
         Linkage::External => FunctionType::Exported,
+        // TODO(antoyo): set the attribute externally_visible.
         Linkage::AvailableExternally => FunctionType::Extern,
         Linkage::LinkOnceAny => unimplemented!(),
         Linkage::LinkOnceODR => unimplemented!(),
@@ -91,7 +92,6 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
     fn module_codegen(tcx: TyCtxt<'_>, (cgu_name, target_info): (Symbol, Arc<TargetInfo>)) -> ModuleCodegen<GccContext> {
         let cgu = tcx.codegen_unit(cgu_name);
         // Instantiate monomorphizations without filling out definitions yet...
-        //let llvm_module = ModuleLlvm::new(tcx, &cgu_name.as_str());
         let context = Context::default();
 
         context.add_command_line_option("-fexceptions");
@@ -152,7 +152,10 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
             context.add_command_line_option("-fdump-rtl-all");
         }
         if env::var("CG_GCCJIT_DUMP_TREE_ALL").as_deref() == Ok("1") {
-            context.add_command_line_option("-fdump-tree-all");
+            context.add_command_line_option("-fdump-tree-all-eh");
+        }
+        if env::var("CG_GCCJIT_DUMP_IPA_ALL").as_deref() == Ok("1") {
+            context.add_command_line_option("-fdump-ipa-all-eh");
         }
         if env::var("CG_GCCJIT_DUMP_CODE").as_deref() == Ok("1") {
             context.set_dump_code_on_compile(true);
@@ -168,6 +171,10 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
             context.set_keep_intermediates(true);
         }
 
+        if env::var("CG_GCCJIT_VERBOSE").as_deref() == Ok("1") {
+            context.add_driver_option("-v");
+        }
+
         // NOTE: The codegen generates unrechable blocks.
         context.set_allow_unreachable_blocks(true);
 
@@ -197,7 +204,9 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
         ModuleCodegen {
             name: cgu_name.to_string(),
             module_llvm: GccContext {
-                context
+                context,
+                should_combine_object_files: false,
+                temp_dir: None,
             },
             kind: ModuleKind::Regular,
         }
diff --git a/src/declare.rs b/src/declare.rs
index 493626c3cf5d..e673d0af4c7e 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -1,4 +1,6 @@
 use gccjit::{Function, FunctionType, GlobalKind, LValue, RValue, Type};
+#[cfg(feature="master")]
+use gccjit::{FnAttribute, ToRValue};
 use rustc_codegen_ssa::traits::BaseTypeMethods;
 use rustc_middle::ty::Ty;
 use rustc_span::Symbol;
@@ -114,6 +116,44 @@ fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*ll
                 .collect();
             let func = cx.context.new_function(None, cx.linkage.get(), return_type, &params, mangle_name(name), variadic);
             cx.functions.borrow_mut().insert(name.to_string(), func);
+
+            #[cfg(feature="master")]
+            if name == "rust_eh_personality" {
+                // NOTE: GCC will sometimes change the personality function set on a function from
+                // rust_eh_personality to __gcc_personality_v0 as an optimization.
+                // As such, we need to create a weak alias from __gcc_personality_v0 to
+                // rust_eh_personality in order to avoid a linker error.
+                // This needs to be weak in order to still allow using the standard
+                // __gcc_personality_v0 when the linking to it.
+                // Since aliases don't work (maybe because of a bug in LTO partitioning?), we
+                // create a wrapper function that calls rust_eh_personality.
+
+                let params: Vec<_> = param_types.into_iter().enumerate()
+                    .map(|(index, param)| cx.context.new_parameter(None, *param, &format!("param{}", index))) // TODO(antoyo): set name.
+                    .collect();
+                let gcc_func = cx.context.new_function(None, FunctionType::Exported, return_type, &params, "__gcc_personality_v0", variadic);
+
+                // We need a normal extern function for the crates that access rust_eh_personality
+                // without defining it, otherwise we'll get a compiler error.
+                //
+                // For the crate defining it, that needs to be a weak alias instead.
+                gcc_func.add_attribute(FnAttribute::Weak);
+
+                let block = gcc_func.new_block("start");
+                let mut args = vec![];
+                for param in &params {
+                    args.push(param.to_rvalue());
+                }
+                let call = cx.context.new_call(None, func, &args);
+                if return_type == cx.type_void() {
+                    block.add_eval(None, call);
+                    block.end_with_void_return(None);
+                }
+                else {
+                    block.end_with_return(None, call);
+                }
+            }
+
             func
         };
 
diff --git a/src/errors.rs b/src/errors.rs
index 693367192b1f..19a967cb4895 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -40,3 +40,34 @@ pub(crate) struct TiedTargetFeatures {
     pub span: Span,
     pub features: String,
 }
+
+#[derive(Diagnostic)]
+#[diag(codegen_gcc_copy_bitcode)]
+pub(crate) struct CopyBitcode {
+    pub err: std::io::Error,
+}
+
+#[derive(Diagnostic)]
+#[diag(codegen_gcc_dynamic_linking_with_lto)]
+#[note]
+pub(crate) struct DynamicLinkingWithLTO;
+
+#[derive(Diagnostic)]
+#[diag(codegen_gcc_load_bitcode)]
+pub(crate) struct LoadBitcode {
+    name: String,
+}
+
+#[derive(Diagnostic)]
+#[diag(codegen_gcc_lto_disallowed)]
+pub(crate) struct LtoDisallowed;
+
+#[derive(Diagnostic)]
+#[diag(codegen_gcc_lto_dylib)]
+pub(crate) struct LtoDylib;
+
+#[derive(Diagnostic)]
+#[diag(codegen_gcc_lto_bitcode_from_rlib)]
+pub(crate) struct LtoBitcodeFromRlib {
+    pub gcc_err: String,
+}
diff --git a/src/lib.rs b/src/lib.rs
index 7b55a4e4082e..2de8fb3fc705 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -2,6 +2,12 @@
  * TODO(antoyo): implement equality in libgccjit based on https://zpz.github.io/blog/overloading-equality-operator-in-cpp-class-hierarchy/ (for type equality?)
  * TODO(antoyo): support #[inline] attributes.
  * TODO(antoyo): support LTO (gcc's equivalent to Full LTO is -flto -flto-partition=one — https://documentation.suse.com/sbp/all/html/SBP-GCC-10/index.html).
+ * For Thin LTO, this might be helpful:
+ * In gcc 4.6 -fwhopr was removed and became default with -flto. The non-whopr path can still be executed via -flto-partition=none.
+ *
+ * Maybe some missing optizations enabled by rustc's LTO is in there: https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html
+ * Like -fipa-icf (should be already enabled) and maybe -fdevirtualize-at-ltrans.
+ * TODO: disable debug info always being emitted. Perhaps this slows down things?
  *
  * TODO(antoyo): remove the patches.
  */
@@ -28,6 +34,7 @@ extern crate rustc_codegen_ssa;
 extern crate rustc_data_structures;
 extern crate rustc_errors;
 extern crate rustc_fluent_macro;
+extern crate rustc_fs_util;
 extern crate rustc_hir;
 extern crate rustc_macros;
 extern crate rustc_metadata;
@@ -35,6 +42,8 @@ extern crate rustc_middle;
 extern crate rustc_session;
 extern crate rustc_span;
 extern crate rustc_target;
+#[macro_use]
+extern crate tracing;
 
 // This prevents duplicating functions and statics that are already part of the host rustc process.
 #[allow(unused_extern_crates)]
@@ -65,22 +74,24 @@ mod type_of;
 use std::any::Any;
 use std::sync::Arc;
 #[cfg(not(feature="master"))]
-use std::sync::atomic::{AtomicBool, Ordering};
+use std::sync::atomic::AtomicBool;
+#[cfg(not(feature="master"))]
+use std::sync::atomic::Ordering;
 
-use crate::errors::LTONotSupported;
 use gccjit::{Context, OptimizationLevel};
 #[cfg(feature="master")]
 use gccjit::TargetInfo;
 #[cfg(not(feature="master"))]
 use gccjit::CType;
+use errors::LTONotSupported;
 use rustc_ast::expand::allocator::AllocatorKind;
 use rustc_codegen_ssa::{CodegenResults, CompiledModule, ModuleCodegen};
 use rustc_codegen_ssa::base::codegen_crate;
 use rustc_codegen_ssa::back::write::{CodegenContext, FatLtoInput, ModuleConfig, TargetMachineFactoryFn};
 use rustc_codegen_ssa::back::lto::{LtoModuleCodegen, SerializedModule, ThinModule};
 use rustc_codegen_ssa::target_features::supported_target_features;
-use rustc_codegen_ssa::traits::{CodegenBackend, ExtraBackendMethods, ModuleBufferMethods, ThinBufferMethods, WriteBackendMethods};
 use rustc_data_structures::fx::FxIndexMap;
+use rustc_codegen_ssa::traits::{CodegenBackend, ExtraBackendMethods, ThinBufferMethods, WriteBackendMethods};
 use rustc_errors::{DiagnosticMessage, ErrorGuaranteed, Handler, SubdiagnosticMessage};
 use rustc_fluent_macro::fluent_messages;
 use rustc_metadata::EncodedMetadata;
@@ -91,9 +102,10 @@ use rustc_session::config::{Lto, OptLevel, OutputFilenames};
 use rustc_session::Session;
 use rustc_span::Symbol;
 use rustc_span::fatal_error::FatalError;
-#[cfg(not(feature="master"))]
 use tempfile::TempDir;
 
+use crate::back::lto::ModuleBuffer;
+
 fluent_messages! { "../messages.ftl" }
 
 pub struct PrintOnPanic<F: Fn() -> String>(pub F);
@@ -136,7 +148,7 @@ impl CodegenBackend for GccCodegenBackend {
     fn init(&self, sess: &Session) {
         #[cfg(feature="master")]
         gccjit::set_global_personality_function_name(b"rust_eh_personality\0");
-        if sess.lto() != Lto::No {
+        if sess.lto() == Lto::Thin {
             sess.emit_warning(LTONotSupported {});
         }
 
@@ -194,7 +206,12 @@ impl ExtraBackendMethods for GccCodegenBackend {
     fn codegen_allocator<'tcx>(&self, tcx: TyCtxt<'tcx>, module_name: &str, kind: AllocatorKind, alloc_error_handler_kind: AllocatorKind) -> Self::Module {
         let mut mods = GccContext {
             context: Context::default(),
+            should_combine_object_files: false,
+            temp_dir: None,
         };
+
+        // TODO(antoyo): only set for x86.
+        mods.context.add_command_line_option("-masm=intel");
         unsafe { allocator::codegen(tcx, &mut mods, module_name, kind, alloc_error_handler_kind); }
         mods
     }
@@ -211,14 +228,6 @@ impl ExtraBackendMethods for GccCodegenBackend {
     }
 }
 
-pub struct ModuleBuffer;
-
-impl ModuleBufferMethods for ModuleBuffer {
-    fn data(&self) -> &[u8] {
-        unimplemented!();
-    }
-}
-
 pub struct ThinBuffer;
 
 impl ThinBufferMethods for ThinBuffer {
@@ -229,6 +238,9 @@ impl ThinBufferMethods for ThinBuffer {
 
 pub struct GccContext {
     context: Context<'static>,
+    should_combine_object_files: bool,
+    // Temporary directory used by LTO. We keep it here so that it's not removed before linking.
+    temp_dir: Option<TempDir>,
 }
 
 unsafe impl Send for GccContext {}
@@ -243,18 +255,8 @@ impl WriteBackendMethods for GccCodegenBackend {
     type ThinData = ();
     type ThinBuffer = ThinBuffer;
 
-    fn run_fat_lto(_cgcx: &CodegenContext<Self>, mut modules: Vec<FatLtoInput<Self>>, _cached_modules: Vec<(SerializedModule<Self::ModuleBuffer>, WorkProduct)>) -> Result<LtoModuleCodegen<Self>, FatalError> {
-        // TODO(antoyo): implement LTO by sending -flto to libgccjit and adding the appropriate gcc linker plugins.
-        // NOTE: implemented elsewhere.
-        // TODO(antoyo): what is implemented elsewhere ^ ?
-        let module =
-            match modules.remove(0) {
-                FatLtoInput::InMemory(module) => module,
-                FatLtoInput::Serialized { .. } => {
-                    unimplemented!();
-                }
-            };
-        Ok(LtoModuleCodegen::Fat { module, _serialized_bitcode: vec![] })
+    fn run_fat_lto(cgcx: &CodegenContext<Self>, modules: Vec<FatLtoInput<Self>>, cached_modules: Vec<(SerializedModule<Self::ModuleBuffer>, WorkProduct)>) -> Result<LtoModuleCodegen<Self>, FatalError> {
+        back::lto::run_fat(cgcx, modules, cached_modules)
     }
 
     fn run_thin_lto(_cgcx: &CodegenContext<Self>, _modules: Vec<(String, Self::ThinBuffer)>, _cached_modules: Vec<(SerializedModule<Self::ModuleBuffer>, WorkProduct)>) -> Result<(Vec<LtoModuleCodegen<Self>>, Vec<WorkProduct>), FatalError> {
diff --git a/test.sh b/test.sh
index 1054fdf7ea11..c47cf140ae4a 100755
--- a/test.sh
+++ b/test.sh
@@ -3,6 +3,7 @@
 # TODO(antoyo): rewrite to cargo-make (or just) or something like that to only rebuild the sysroot when needed?
 
 set -e
+#set -x
 
 if [ -f ./gcc_path ]; then
     export GCC_PATH=$(cat gcc_path)
@@ -345,14 +346,13 @@ function test_rustc() {
 
     git checkout -- tests/ui/issues/auxiliary/issue-3136-a.rs # contains //~ERROR, but shouldn't be removed
 
-    rm -r tests/ui/{abi*,extern/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,chalkify/bugs/,test*,*lto*.rs,consts/const-float-bits-reject-conv.rs,consts/issue-miri-1910.rs} || true
+    rm -r tests/ui/{abi*,extern/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,chalkify/bugs/,test*,consts/const-float-bits-reject-conv.rs,consts/issue-miri-1910.rs} || true
     rm tests/ui/mir/mir_heavy_promoted.rs # this test is oom-killed in the CI.
     # Tests generating errors.
     rm tests/ui/consts/const-eval/nonnull_as_ref_ub.rs tests/ui/consts/issue-94675.rs
-    for test in $(rg --files-with-matches "thread|lto" tests/ui); do
+    for test in $(rg --files-with-matches "thread" tests/ui); do
       rm $test
     done
-    git checkout tests/ui/lto/auxiliary/dylib.rs
     git checkout tests/ui/type-alias-impl-trait/auxiliary/cross_crate_ice.rs
     git checkout tests/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
     git checkout tests/ui/macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs

From 03bcfff8b37f465143fccdcab7f5576a015984af Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 31 Aug 2023 21:19:36 +0200
Subject: [PATCH 373/997] Only apply NoAlias attribute if optimization is
 enabled

---
 src/abi.rs | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/abi.rs b/src/abi.rs
index 874ac0b087e8..9f6e2f7ff104 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -3,6 +3,7 @@ use rustc_codegen_ssa::traits::{AbiBuilderMethods, BaseTypeMethods};
 use rustc_data_structures::fx::FxHashSet;
 use rustc_middle::bug;
 use rustc_middle::ty::Ty;
+use rustc_session::config;
 use rustc_target::abi::call::{ArgAttributes, CastTarget, FnAbi, PassMode, Reg, RegKind};
 
 use crate::builder::Builder;
@@ -122,7 +123,8 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
 
         #[cfg(feature = "master")]
         let apply_attrs = |ty: Type<'gcc>, attrs: &ArgAttributes| {
-            if attrs.regular.contains(rustc_target::abi::call::ArgAttribute::NoAlias)
+            if cx.sess().opts.optimize != config::OptLevel::No
+                && attrs.regular.contains(rustc_target::abi::call::ArgAttribute::NoAlias)
             {
                 ty.make_restrict()
             } else {

From d214df291c7f627288a9c14ee84a754ba077eea4 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 6 Sep 2023 15:20:08 +0200
Subject: [PATCH 374/997] Fix gimple guide

---
 doc/gimple.md | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/doc/gimple.md b/doc/gimple.md
index 589cf3db7a68..1bd8035e75d1 100644
--- a/doc/gimple.md
+++ b/doc/gimple.md
@@ -34,7 +34,7 @@ also add the calls we need to generate the GIMPLE:
 int main() {
     gcc_jit_context *ctxt = gcc_jit_context_acquire();
     create_code(ctxt, NULL);
-    gcc_jit_context_compile_to_file(ctxt, GCC_JIT_OUTPUT_KIND_DYNAMIC_LIBRARY, "tmp");
+    gcc_jit_context_dump_to_file(ctxt, "tmp.gimple", 1);
     return 0;
 }
 ```
@@ -42,16 +42,16 @@ int main() {
 Then we can compile it by using:
 
 ```console
-gcc const.c -I `pwd`/gcc/gcc/jit/ -L `pwd`/gcc-build/gcc -lgccjit -o out
+gcc local.c -I `pwd`/gcc/gcc/jit/ -L `pwd`/gcc-build/gcc -lgccjit -o out
 ```
 
 And finally when you run it:
 
 ```console
-LD_LIBRARY_PATH=`pwd`/gcc-build/gcc ./out
+LD_LIBRARY_PATH=`pwd`/gcc-build/gcc LIBRARY_PATH=`pwd`/gcc-build/gcc ./out
 ```
 
-It should display:
+You should now have a file named `tmp.gimple` which contains:
 
 ```c
 __attribute__((const))

From 7324ee2da86b560eae238d7a77314e3027441d43 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 6 Sep 2023 17:38:50 +0200
Subject: [PATCH 375/997] Add missing compilation

---
 doc/gimple.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/doc/gimple.md b/doc/gimple.md
index 1bd8035e75d1..e2ae93cf20dd 100644
--- a/doc/gimple.md
+++ b/doc/gimple.md
@@ -34,6 +34,7 @@ also add the calls we need to generate the GIMPLE:
 int main() {
     gcc_jit_context *ctxt = gcc_jit_context_acquire();
     create_code(ctxt, NULL);
+    gcc_jit_context_compile(ctxt);
     gcc_jit_context_dump_to_file(ctxt, "tmp.gimple", 1);
     return 0;
 }

From b3916539dd56c52a9d8e62a7b06bf9449aa8a23d Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 7 Sep 2023 14:03:56 +0200
Subject: [PATCH 376/997] Set the correct gimple output format

---
 doc/gimple.md | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/doc/gimple.md b/doc/gimple.md
index e2ae93cf20dd..f97e50c32cb8 100644
--- a/doc/gimple.md
+++ b/doc/gimple.md
@@ -33,9 +33,17 @@ also add the calls we need to generate the GIMPLE:
 ```C
 int main() {
     gcc_jit_context *ctxt = gcc_jit_context_acquire();
+    // To set `-O3`, update it depending on your needs.
+    gcc_jit_context_set_int_option(ctxt, GCC_JIT_INT_OPTION_OPTIMIZATION_LEVEL, 3);
+    // Very important option to generate the gimple format.
+    gcc_jit_context_add_command_line_option(ctxt, "-fdump-tree-gimple");
     create_code(ctxt, NULL);
+
     gcc_jit_context_compile(ctxt);
-    gcc_jit_context_dump_to_file(ctxt, "tmp.gimple", 1);
+    // If you want to compile to assembly (or any other format) directly, you can
+    // use the following call instead:
+    // gcc_jit_context_compile_to_file(ctxt, GCC_JIT_OUTPUT_KIND_ASSEMBLER, "out.s");
+
     return 0;
 }
 ```
@@ -46,13 +54,21 @@ Then we can compile it by using:
 gcc local.c -I `pwd`/gcc/gcc/jit/ -L `pwd`/gcc-build/gcc -lgccjit -o out
 ```
 
+Before running it, I recommend running:
+
+```console
+rm -rf /tmp/libgccjit-*
+```
+
+to make it easier for you to know which folder to look into.
+
 And finally when you run it:
 
 ```console
 LD_LIBRARY_PATH=`pwd`/gcc-build/gcc LIBRARY_PATH=`pwd`/gcc-build/gcc ./out
 ```
 
-You should now have a file named `tmp.gimple` which contains:
+You should now have a file named with path looking like `/tmp/libgccjit-9OFqkD/fake.c.006t.gimple` which contains:
 
 ```c
 __attribute__((const))

From 3e61cc3de2c8835293bb864c9cec49439817e8ee Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 7 Sep 2023 14:21:58 +0200
Subject: [PATCH 377/997] Add simpler alternative to generate gimple

---
 doc/gimple.md | 34 ++++++++++++++++++++++++----------
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/doc/gimple.md b/doc/gimple.md
index f97e50c32cb8..145c4eda3c1c 100644
--- a/doc/gimple.md
+++ b/doc/gimple.md
@@ -36,7 +36,7 @@ int main() {
     // To set `-O3`, update it depending on your needs.
     gcc_jit_context_set_int_option(ctxt, GCC_JIT_INT_OPTION_OPTIMIZATION_LEVEL, 3);
     // Very important option to generate the gimple format.
-    gcc_jit_context_add_command_line_option(ctxt, "-fdump-tree-gimple");
+    gcc_jit_context_set_bool_option(ctxt, GCC_JIT_BOOL_OPTION_DUMP_INITIAL_GIMPLE, 1);
     create_code(ctxt, NULL);
 
     gcc_jit_context_compile(ctxt);
@@ -54,21 +54,13 @@ Then we can compile it by using:
 gcc local.c -I `pwd`/gcc/gcc/jit/ -L `pwd`/gcc-build/gcc -lgccjit -o out
 ```
 
-Before running it, I recommend running:
-
-```console
-rm -rf /tmp/libgccjit-*
-```
-
-to make it easier for you to know which folder to look into.
-
 And finally when you run it:
 
 ```console
 LD_LIBRARY_PATH=`pwd`/gcc-build/gcc LIBRARY_PATH=`pwd`/gcc-build/gcc ./out
 ```
 
-You should now have a file named with path looking like `/tmp/libgccjit-9OFqkD/fake.c.006t.gimple` which contains:
+It should display:
 
 ```c
 __attribute__((const))
@@ -95,3 +87,25 @@ int xxx ()
   return D.3394;
 }
 ```
+
+An alternative way to generate the GIMPLE is to replace:
+
+```c
+    gcc_jit_context_set_bool_option(ctxt, GCC_JIT_BOOL_OPTION_DUMP_INITIAL_GIMPLE, 1);
+```
+
+with:
+
+```c
+    gcc_jit_context_add_command_line_option(ctxt, "-fdump-tree-gimple");
+```
+
+(although you can have both at the same time too). Then you can compile it like previously. Only one difference: before executing it, I recommend to run:
+
+```console
+rm -rf /tmp/libgccjit-*
+```
+
+to make it easier for you to know which folder to look into.
+
+Once the execution is done, you should now have a file with path looking like `/tmp/libgccjit-9OFqkD/fake.c.006t.gimple` which contains the GIMPLE format.

From cd1644a658825b1aa87f1b54fafb49159d72c992 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 9 Sep 2023 12:50:25 -0400
Subject: [PATCH 378/997] Fix const handling in ATT syntax

---
 src/asm.rs       | 4 ----
 tests/run/asm.rs | 2 +-
 2 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 4c3b7f5036cc..b0e615d2de27 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -452,10 +452,6 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         }
 
                         InlineAsmOperandRef::Const { ref string } => {
-                            // Const operands get injected directly into the template
-                            if att_dialect {
-                                template_str.push('$');
-                            }
                             template_str.push_str(string);
                         }
                     }
diff --git a/tests/run/asm.rs b/tests/run/asm.rs
index 38c1eac7adf6..507b65ca049e 100644
--- a/tests/run/asm.rs
+++ b/tests/run/asm.rs
@@ -124,7 +124,7 @@ fn main() {
     // check const (ATT syntax)
     let mut x: u64 = 42;
     unsafe {
-        asm!("add {}, {}",
+        asm!("add ${}, {}",
             const 1,
             inout(reg) x,
             options(att_syntax)

From 32df82648d0d8f7687a22f470c7e56fccb5b4b2f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 14 Sep 2023 19:02:00 -0400
Subject: [PATCH 379/997] Handle static relocation model

---
 src/base.rs | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/base.rs b/src/base.rs
index 266d60da10ca..ef3db24f7087 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -140,6 +140,11 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
         // NOTE: Rust relies on LLVM doing wrapping on overflow.
         context.add_command_line_option("-fwrapv");
 
+        if tcx.sess.opts.cg.relocation_model == Some(rustc_target::spec::RelocModel::Static) {
+            context.add_command_line_option("-mcmodel=kernel");
+            context.add_command_line_option("-fno-pie");
+        }
+
         if tcx.sess.opts.unstable_opts.function_sections.unwrap_or(tcx.sess.target.function_sections) {
             context.add_command_line_option("-ffunction-sections");
             context.add_command_line_option("-fdata-sections");

From f6337e4966b43af7ee2779c3c778762426337273 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 9 Sep 2023 12:48:31 -0400
Subject: [PATCH 380/997] Don't always enabled CPU features

---
 src/base.rs | 11 ++---------
 src/lib.rs  |  2 +-
 2 files changed, 3 insertions(+), 10 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index ef3db24f7087..f4e7300b3fba 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -103,9 +103,7 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
             .collect();
 
         let add_cpu_feature_flag = |feature: &str| {
-            // FIXME(antoyo): some tests cause a segfault in GCC when not enabling all these
-            // features.
-            if (true || target_info.cpu_supports(feature)) && !disabled_features.contains(feature) {
+            if target_info.cpu_supports(feature) && !disabled_features.contains(feature) {
                 context.add_command_line_option(&format!("-m{}", feature));
             }
         };
@@ -113,7 +111,7 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
 
-        let features = ["sse2", "avx", "avx2", "sha", "fma", "gfni", "f16c", "aes", "bmi2", "rtm",
+        let features = ["64", "bmi", "sse2", "avx", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm",
             "vaes", "vpclmulqdq", "xsavec",
         ];
 
@@ -121,11 +119,6 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
             add_cpu_feature_flag(feature);
         }
 
-        // TODO(antoyo): only add the following cli arguments if the feature is supported.
-        context.add_command_line_option("-mpclmul");
-        context.add_command_line_option("-mfma4");
-        context.add_command_line_option("-m64");
-        context.add_command_line_option("-mbmi");
         //context.add_command_line_option("-mavxvnni"); // The CI doesn't support this option.
 
         for arg in &tcx.sess.opts.cg.llvm_args {
diff --git a/src/lib.rs b/src/lib.rs
index 2de8fb3fc705..b330f7705971 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -313,7 +313,7 @@ pub fn __rustc_codegen_backend() -> Box<dyn CodegenBackend> {
 
         // Get the second TargetInfo with the correct CPU features by setting the arch.
         let context = Context::default();
-        context.add_driver_option(&format!("-march={}", arch.to_str().unwrap()));
+        context.add_command_line_option(&format!("-march={}", arch.to_str().unwrap()));
         Arc::new(context.get_target_info())
     };
     #[cfg(not(feature="master"))]

From adc0b210f31324af637517aa28d81772fdf28719 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 9 Sep 2023 12:48:49 -0400
Subject: [PATCH 381/997] Enable one more feature

---
 src/base.rs | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index f4e7300b3fba..ff3f7a6d175e 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -111,7 +111,7 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
 
-        let features = ["64", "bmi", "sse2", "avx", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm",
+        let features = ["64", "avxvnni", "bmi", "sse2", "avx", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm",
             "vaes", "vpclmulqdq", "xsavec",
         ];
 
@@ -119,8 +119,6 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
             add_cpu_feature_flag(feature);
         }
 
-        //context.add_command_line_option("-mavxvnni"); // The CI doesn't support this option.
-
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
         }

From 45c501cdf9e711c8d7c8d06250fdc2a84caf69bd Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 13 Sep 2023 18:56:06 -0400
Subject: [PATCH 382/997] Add note to readme

---
 Readme.md | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/Readme.md b/Readme.md
index daee6e8588dc..1666cbc4f752 100644
--- a/Readme.md
+++ b/Readme.md
@@ -205,6 +205,19 @@ error: failed to build archive: failed to open object file: No such file or dire
 That can be caused by the fact that you try to compile with `lto = "fat"`, but you didn't compile the sysroot with LTO.
 (Not sure if that's the reason since I cannot reproduce anymore. Maybe it happened when forgetting setting `FAT_LTO`.)
 
+### ld: cannot find crtbegin.o
+
+When compiling an executable with libgccijt, if setting the `*LIBRARY_PATH` variables to the install directory, you will get the following errors:
+
+```
+ld: cannot find crtbegin.o: No such file or directory
+ld: cannot find -lgcc: No such file or directory
+ld: cannot find -lgcc: No such file or directory
+libgccjit.so: error: error invoking gcc driver
+```
+
+To fix this, set the variables to `gcc-build/build/gcc`.
+
 ### How to debug GCC LTO
 
 Run do the command with `-v -save-temps` and then extract the `lto1` line from the output and run that under the debugger.

From 5bb0d630ab1875e093df83714c30e11fd48ef383 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 13 Sep 2023 21:12:59 -0400
Subject: [PATCH 383/997] Do not always enable avx2

---
 src/abi.rs            |  1 +
 src/base.rs           | 20 ++++++++--------
 src/intrinsic/llvm.rs |  1 +
 src/lib.rs            | 54 +++++++++++++++++++++++++++++++------------
 4 files changed, 52 insertions(+), 24 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 9f6e2f7ff104..813abaac7930 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -3,6 +3,7 @@ use rustc_codegen_ssa::traits::{AbiBuilderMethods, BaseTypeMethods};
 use rustc_data_structures::fx::FxHashSet;
 use rustc_middle::bug;
 use rustc_middle::ty::Ty;
+#[cfg(feature = "master")]
 use rustc_session::config;
 use rustc_target::abi::call::{ArgAttributes, CastTarget, FnAbi, PassMode, Reg, RegKind};
 
diff --git a/src/base.rs b/src/base.rs
index ff3f7a6d175e..bb88c89fa53b 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -1,6 +1,5 @@
 use std::collections::HashSet;
 use std::env;
-use std::sync::Arc;
 use std::time::Instant;
 
 use gccjit::{
@@ -8,8 +7,6 @@ use gccjit::{
     FunctionType,
     GlobalKind,
 };
-#[cfg(feature="master")]
-use gccjit::TargetInfo;
 use rustc_middle::dep_graph;
 use rustc_middle::ty::TyCtxt;
 #[cfg(feature="master")]
@@ -22,8 +19,7 @@ use rustc_codegen_ssa::traits::DebugInfoMethods;
 use rustc_session::config::DebugInfo;
 use rustc_span::Symbol;
 
-#[cfg(not(feature="master"))]
-use crate::TargetInfo;
+use crate::LockedTargetInfo;
 use crate::GccContext;
 use crate::builder::Builder;
 use crate::context::CodegenCx;
@@ -70,7 +66,7 @@ pub fn linkage_to_gcc(linkage: Linkage) -> FunctionType {
     }
 }
 
-pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<TargetInfo>) -> (ModuleCodegen<GccContext>, u64) {
+pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: LockedTargetInfo) -> (ModuleCodegen<GccContext>, u64) {
     let prof_timer = tcx.prof.generic_activity("codegen_module");
     let start_time = Instant::now();
 
@@ -89,7 +85,7 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
     // the time we needed for codegenning it.
     let cost = time_to_codegen.as_secs() * 1_000_000_000 + time_to_codegen.subsec_nanos() as u64;
 
-    fn module_codegen(tcx: TyCtxt<'_>, (cgu_name, target_info): (Symbol, Arc<TargetInfo>)) -> ModuleCodegen<GccContext> {
+    fn module_codegen(tcx: TyCtxt<'_>, (cgu_name, target_info): (Symbol, LockedTargetInfo)) -> ModuleCodegen<GccContext> {
         let cgu = tcx.codegen_unit(cgu_name);
         // Instantiate monomorphizations without filling out definitions yet...
         let context = Context::default();
@@ -111,13 +107,19 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Arc<
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
 
-        let features = ["64", "avxvnni", "bmi", "sse2", "avx", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm",
+        // TODO: instead of setting the features manually, set the correct -march flag.
+        /*let features = ["64", "avxvnni", "bmi", "sse2", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm",
             "vaes", "vpclmulqdq", "xsavec",
         ];
 
         for feature in &features {
             add_cpu_feature_flag(feature);
-        }
+        }*/
+
+        // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for
+        // SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead.
+        // FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar.
+        context.add_command_line_option("-mavx");
 
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index f28348380d7b..cb070e8267a5 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -236,6 +236,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 let arg2 = builder.context.new_cast(None, arg2, arg2_type);
                 args = vec![new_args[0], arg2].into();
             },
+            // These builtins are sent one more argument than needed.
             "__builtin_prefetch" => {
                 let mut new_args = args.to_vec();
                 new_args.pop();
diff --git a/src/lib.rs b/src/lib.rs
index b330f7705971..9dbe6aab8cb9 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -73,6 +73,7 @@ mod type_of;
 
 use std::any::Any;
 use std::sync::Arc;
+use std::sync::Mutex;
 #[cfg(not(feature="master"))]
 use std::sync::atomic::AtomicBool;
 #[cfg(not(feature="master"))]
@@ -135,9 +136,24 @@ impl TargetInfo {
     }
 }
 
+#[derive(Clone, Debug)]
+pub struct LockedTargetInfo {
+    info: Arc<Mutex<TargetInfo>>,
+}
+
+impl LockedTargetInfo {
+    fn cpu_supports(&self, feature: &str) -> bool {
+        self.info.lock().expect("lock").cpu_supports(feature)
+    }
+
+    fn supports_128bit_int(&self) -> bool {
+        self.info.lock().expect("lock").supports_128bit_int()
+    }
+}
+
 #[derive(Clone)]
 pub struct GccCodegenBackend {
-    target_info: Arc<TargetInfo>,
+    target_info: LockedTargetInfo,
 }
 
 impl CodegenBackend for GccCodegenBackend {
@@ -146,6 +162,19 @@ impl CodegenBackend for GccCodegenBackend {
     }
 
     fn init(&self, sess: &Session) {
+        #[cfg(feature="master")]
+        {
+            let target_cpu = target_cpu(sess);
+
+            // Get the second TargetInfo with the correct CPU features by setting the arch.
+            let context = Context::default();
+            if target_cpu != "generic" {
+                context.add_command_line_option(&format!("-march={}", target_cpu));
+            }
+
+            *self.target_info.info.lock().expect("lock") = context.get_target_info();
+        }
+
         #[cfg(feature="master")]
         gccjit::set_global_personality_function_name(b"rust_eh_personality\0");
         if sess.lto() == Lto::Thin {
@@ -161,7 +190,7 @@ impl CodegenBackend for GccCodegenBackend {
             let _int128_ty = check_context.new_c_type(CType::UInt128t);
             // NOTE: we cannot just call compile() as this would require other files than libgccjit.so.
             check_context.compile_to_file(gccjit::OutputKind::Assembler, temp_file.to_str().expect("path to str"));
-            self.target_info.supports_128bit_integers.store(check_context.get_last_error() == Ok(None), Ordering::SeqCst);
+            self.target_info.info.lock().expect("lock").supports_128bit_integers.store(check_context.get_last_error() == Ok(None), Ordering::SeqCst);
         }
     }
 
@@ -217,7 +246,7 @@ impl ExtraBackendMethods for GccCodegenBackend {
     }
 
     fn compile_codegen_unit(&self, tcx: TyCtxt<'_>, cgu_name: Symbol) -> (ModuleCodegen<Self::Module>, u64) {
-        base::compile_codegen_unit(tcx, cgu_name, Arc::clone(&self.target_info))
+        base::compile_codegen_unit(tcx, cgu_name, self.target_info.clone())
     }
 
     fn target_machine_factory(&self, _sess: &Session, _opt_level: OptLevel, _features: &[String]) -> TargetMachineFactoryFn<Self> {
@@ -306,23 +335,18 @@ impl WriteBackendMethods for GccCodegenBackend {
 #[no_mangle]
 pub fn __rustc_codegen_backend() -> Box<dyn CodegenBackend> {
     #[cfg(feature="master")]
-    let target_info = {
-        // Get the native arch and check whether the target supports 128-bit integers.
+    let info = {
+        // Check whether the target supports 128-bit integers.
         let context = Context::default();
-        let arch = context.get_target_info().arch().unwrap();
-
-        // Get the second TargetInfo with the correct CPU features by setting the arch.
-        let context = Context::default();
-        context.add_command_line_option(&format!("-march={}", arch.to_str().unwrap()));
-        Arc::new(context.get_target_info())
+        Arc::new(Mutex::new(context.get_target_info()))
     };
     #[cfg(not(feature="master"))]
-    let target_info = Arc::new(TargetInfo {
+    let info = Arc::new(Mutex::new(TargetInfo {
         supports_128bit_integers: AtomicBool::new(false),
-    });
+    }));
 
     Box::new(GccCodegenBackend {
-        target_info,
+        target_info: LockedTargetInfo { info },
     })
 }
 
@@ -356,7 +380,7 @@ pub fn target_cpu(sess: &Session) -> &str {
     }
 }
 
-pub fn target_features(sess: &Session, allow_unstable: bool, target_info: &Arc<TargetInfo>) -> Vec<Symbol> {
+pub fn target_features(sess: &Session, allow_unstable: bool, target_info: &LockedTargetInfo) -> Vec<Symbol> {
     supported_target_features(sess)
         .iter()
         .filter_map(

From f692124c5d11bdf95a66552c769fbbb4d4b89208 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 14 Sep 2023 19:01:31 -0400
Subject: [PATCH 384/997] Handle disabled features

---
 src/base.rs | 27 +++++++++++++++++++--------
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index bb88c89fa53b..380be3417044 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -104,22 +104,33 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
             }
         };
 
+        let disable_cpu_feature = |feature: &str| {
+            if disabled_features.contains(feature) {
+                context.add_command_line_option(&format!("-mno-{}", feature));
+            }
+        };
+
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
 
         // TODO: instead of setting the features manually, set the correct -march flag.
-        /*let features = ["64", "avxvnni", "bmi", "sse2", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm",
+        let features = ["64", "avxvnni", "bmi", "sse2", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm",
             "vaes", "vpclmulqdq", "xsavec",
         ];
 
-        for feature in &features {
-            add_cpu_feature_flag(feature);
-        }*/
 
-        // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for
-        // SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead.
-        // FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar.
-        context.add_command_line_option("-mavx");
+        for feature in &features {
+            disable_cpu_feature(feature);
+
+            //add_cpu_feature_flag(feature);
+        }
+
+        if !disabled_features.contains("avx") {
+            // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for
+            // SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead.
+            // FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar.
+            context.add_command_line_option("-mavx");
+        }
 
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);

From 20d4c3946281bfe8cf0fc5585438857113143c36 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 14 Sep 2023 19:55:01 -0400
Subject: [PATCH 385/997] Correctly handle target features

---
 messages.ftl      |  16 ++++
 src/attributes.rs |  86 ++++++---------------
 src/errors.rs     |  56 +++++++++++++-
 src/gcc_util.rs   | 193 ++++++++++++++++++++++++++++++++++++++++++++++
 src/lib.rs        |   5 +-
 5 files changed, 289 insertions(+), 67 deletions(-)
 create mode 100644 src/gcc_util.rs

diff --git a/messages.ftl b/messages.ftl
index de9be3a55280..5ca0a2e1b6db 100644
--- a/messages.ftl
+++ b/messages.ftl
@@ -1,3 +1,7 @@
+codegen_gcc_unknown_ctarget_feature_prefix =
+    unknown feature specified for `-Ctarget-feature`: `{$feature}`
+    .note = features must begin with a `+` to enable or `-` to disable it
+
 codegen_gcc_invalid_minimum_alignment =
     invalid minimum global alignment: {$err}
 
@@ -23,3 +27,15 @@ codegen_gcc_lto_disallowed = lto can only be run for executables, cdylibs and st
 codegen_gcc_lto_dylib = lto cannot be used for `dylib` crate type without `-Zdylib-lto`
 
 codegen_gcc_lto_bitcode_from_rlib = failed to get bitcode from object file for LTO ({$gcc_err})
+
+codegen_gcc_unknown_ctarget_feature =
+    unknown feature specified for `-Ctarget-feature`: `{$feature}`
+    .note = it is still passed through to the codegen backend
+    .possible_feature = you might have meant: `{$rust_feature}`
+    .consider_filing_feature_request = consider filing a feature request
+
+codegen_gcc_missing_features =
+    add the missing features in a `target_feature` attribute
+
+codegen_gcc_target_feature_disable_or_enable =
+    the target features {$features} must all be either enabled or disabled together
diff --git a/src/attributes.rs b/src/attributes.rs
index 35682db9c785..ced13848c0b9 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -4,72 +4,13 @@ use gccjit::Function;
 use rustc_attr::InstructionSetAttr;
 #[cfg(feature="master")]
 use rustc_attr::InlineAttr;
-use rustc_codegen_ssa::target_features::tied_target_features;
-use rustc_data_structures::fx::FxHashMap;
 use rustc_middle::ty;
 #[cfg(feature="master")]
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
-use rustc_session::Session;
 use rustc_span::symbol::sym;
-use smallvec::{smallvec, SmallVec};
 
 use crate::{context::CodegenCx, errors::TiedTargetFeatures};
-
-// Given a map from target_features to whether they are enabled or disabled,
-// ensure only valid combinations are allowed.
-pub fn check_tied_features(sess: &Session, features: &FxHashMap<&str, bool>) -> Option<&'static [&'static str]> {
-    for tied in tied_target_features(sess) {
-        // Tied features must be set to the same value, or not set at all
-        let mut tied_iter = tied.iter();
-        let enabled = features.get(tied_iter.next().unwrap());
-        if tied_iter.any(|feature| enabled != features.get(feature)) {
-            return Some(tied);
-        }
-    }
-    None
-}
-
-// TODO(antoyo): maybe move to a new module gcc_util.
-// To find a list of GCC's names, check https://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html
-fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]> {
-    let arch = if sess.target.arch == "x86_64" { "x86" } else { &*sess.target.arch };
-    match (arch, s) {
-        ("x86", "sse4.2") => smallvec!["sse4.2", "crc32"],
-        ("x86", "pclmulqdq") => smallvec!["pclmul"],
-        ("x86", "rdrand") => smallvec!["rdrnd"],
-        ("x86", "bmi1") => smallvec!["bmi"],
-        ("x86", "cmpxchg16b") => smallvec!["cx16"],
-        ("x86", "avx512vaes") => smallvec!["vaes"],
-        ("x86", "avx512gfni") => smallvec!["gfni"],
-        ("x86", "avx512vpclmulqdq") => smallvec!["vpclmulqdq"],
-        // NOTE: seems like GCC requires 'avx512bw' for 'avx512vbmi2'.
-        ("x86", "avx512vbmi2") => smallvec!["avx512vbmi2", "avx512bw"],
-        // NOTE: seems like GCC requires 'avx512bw' for 'avx512bitalg'.
-        ("x86", "avx512bitalg") => smallvec!["avx512bitalg", "avx512bw"],
-        ("aarch64", "rcpc2") => smallvec!["rcpc-immo"],
-        ("aarch64", "dpb") => smallvec!["ccpp"],
-        ("aarch64", "dpb2") => smallvec!["ccdp"],
-        ("aarch64", "frintts") => smallvec!["fptoint"],
-        ("aarch64", "fcma") => smallvec!["complxnum"],
-        ("aarch64", "pmuv3") => smallvec!["perfmon"],
-        ("aarch64", "paca") => smallvec!["pauth"],
-        ("aarch64", "pacg") => smallvec!["pauth"],
-        // Rust ties fp and neon together. In LLVM neon implicitly enables fp,
-        // but we manually enable neon when a feature only implicitly enables fp
-        ("aarch64", "f32mm") => smallvec!["f32mm", "neon"],
-        ("aarch64", "f64mm") => smallvec!["f64mm", "neon"],
-        ("aarch64", "fhm") => smallvec!["fp16fml", "neon"],
-        ("aarch64", "fp16") => smallvec!["fullfp16", "neon"],
-        ("aarch64", "jsconv") => smallvec!["jsconv", "neon"],
-        ("aarch64", "sve") => smallvec!["sve", "neon"],
-        ("aarch64", "sve2") => smallvec!["sve2", "neon"],
-        ("aarch64", "sve2-aes") => smallvec!["sve2-aes", "neon"],
-        ("aarch64", "sve2-sm4") => smallvec!["sve2-sm4", "neon"],
-        ("aarch64", "sve2-sha3") => smallvec!["sve2-sha3", "neon"],
-        ("aarch64", "sve2-bitperm") => smallvec!["sve2-bitperm", "neon"],
-        (_, s) => smallvec![s],
-    }
-}
+use crate::gcc_util::{check_tied_features, to_gcc_features};
 
 /// Get GCC attribute for the provided inline heuristic.
 #[cfg(feature="master")]
@@ -153,12 +94,31 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
         }))
         .collect::<Vec<_>>();
 
-    // TODO(antoyo): check if we really need global backend features. (Maybe they could be applied
-    // globally?)
+    // TODO(antoyo): cg_llvm add global features to each function so that LTO keep them.
+    // Check if GCC requires the same.
     let mut global_features = cx.tcx.global_backend_features(()).iter().map(|s| s.as_str());
     function_features.extend(&mut global_features);
-    let target_features = function_features.join(",");
+    let target_features = function_features
+        .iter()
+        .filter_map(|feature| {
+            if feature.contains("soft-float") || feature.contains("retpoline-external-thunk") {
+                return None;
+            }
+
+            if feature.starts_with('-') {
+                Some(format!("no{}", feature))
+            }
+            else if feature.starts_with('+') {
+                Some(feature[1..].to_string())
+            }
+            else {
+                Some(feature.to_string())
+            }
+        })
+        .collect::<Vec<_>>()
+        .join(",");
     if !target_features.is_empty() {
+        println!("Function {:?}", function_features);
         #[cfg(feature="master")]
         func.add_attribute(FnAttribute::Target(&target_features));
     }
diff --git a/src/errors.rs b/src/errors.rs
index 19a967cb4895..4bf3b71f503d 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -1,8 +1,36 @@
-use rustc_errors::{DiagnosticArgValue, IntoDiagnosticArg};
-use rustc_macros::Diagnostic;
+use rustc_errors::{
+    DiagnosticArgValue, DiagnosticBuilder, ErrorGuaranteed, Handler, IntoDiagnostic, IntoDiagnosticArg,
+};
+use rustc_macros::{Diagnostic, Subdiagnostic};
 use rustc_span::Span;
 use std::borrow::Cow;
 
+use crate::fluent_generated as fluent;
+
+#[derive(Diagnostic)]
+#[diag(codegen_gcc_unknown_ctarget_feature_prefix)]
+#[note]
+pub(crate) struct UnknownCTargetFeaturePrefix<'a> {
+    pub feature: &'a str,
+}
+
+#[derive(Diagnostic)]
+#[diag(codegen_gcc_unknown_ctarget_feature)]
+#[note]
+pub(crate) struct UnknownCTargetFeature<'a> {
+    pub feature: &'a str,
+    #[subdiagnostic]
+    pub rust_feature: PossibleFeature<'a>,
+}
+
+#[derive(Subdiagnostic)]
+pub(crate) enum PossibleFeature<'a> {
+    #[help(codegen_gcc_possible_feature)]
+    Some { rust_feature: &'a str },
+    #[help(codegen_gcc_consider_filing_feature_request)]
+    None,
+}
+
 struct ExitCode(Option<i32>);
 
 impl IntoDiagnosticArg for ExitCode {
@@ -71,3 +99,27 @@ pub(crate) struct LtoDylib;
 pub(crate) struct LtoBitcodeFromRlib {
     pub gcc_err: String,
 }
+
+pub(crate) struct TargetFeatureDisableOrEnable<'a> {
+    pub features: &'a [&'a str],
+    pub span: Option<Span>,
+    pub missing_features: Option<MissingFeatures>,
+}
+
+#[derive(Subdiagnostic)]
+#[help(codegen_gcc_missing_features)]
+pub(crate) struct MissingFeatures;
+
+impl IntoDiagnostic<'_, ErrorGuaranteed> for TargetFeatureDisableOrEnable<'_> {
+    fn into_diagnostic(self, sess: &'_ Handler) -> DiagnosticBuilder<'_, ErrorGuaranteed> {
+        let mut diag = sess.struct_err(fluent::codegen_gcc_target_feature_disable_or_enable);
+        if let Some(span) = self.span {
+            diag.set_span(span);
+        };
+        if let Some(missing_features) = self.missing_features {
+            diag.subdiagnostic(missing_features);
+        }
+        diag.set_arg("features", self.features.join(", "));
+        diag
+    }
+}
diff --git a/src/gcc_util.rs b/src/gcc_util.rs
new file mode 100644
index 000000000000..da1c0dfe5595
--- /dev/null
+++ b/src/gcc_util.rs
@@ -0,0 +1,193 @@
+use smallvec::{smallvec, SmallVec};
+
+use rustc_codegen_ssa::target_features::{
+    supported_target_features, tied_target_features, RUSTC_SPECIFIC_FEATURES,
+};
+use rustc_data_structures::fx::FxHashMap;
+use rustc_middle::bug;
+use rustc_session::Session;
+
+use crate::errors::{PossibleFeature, TargetFeatureDisableOrEnable, UnknownCTargetFeature, UnknownCTargetFeaturePrefix};
+
+/// The list of GCC features computed from CLI flags (`-Ctarget-cpu`, `-Ctarget-feature`,
+/// `--target` and similar).
+pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<String> {
+    // Features that come earlier are overridden by conflicting features later in the string.
+    // Typically we'll want more explicit settings to override the implicit ones, so:
+    //
+    // * Features from -Ctarget-cpu=*; are overridden by [^1]
+    // * Features implied by --target; are overridden by
+    // * Features from -Ctarget-feature; are overridden by
+    // * function specific features.
+    //
+    // [^1]: target-cpu=native is handled here, other target-cpu values are handled implicitly
+    // through GCC TargetMachine implementation.
+    //
+    // FIXME(nagisa): it isn't clear what's the best interaction between features implied by
+    // `-Ctarget-cpu` and `--target` are. On one hand, you'd expect CLI arguments to always
+    // override anything that's implicit, so e.g. when there's no `--target` flag, features implied
+    // the host target are overridden by `-Ctarget-cpu=*`. On the other hand, what about when both
+    // `--target` and `-Ctarget-cpu=*` are specified? Both then imply some target features and both
+    // flags are specified by the user on the CLI. It isn't as clear-cut which order of precedence
+    // should be taken in cases like these.
+    let mut features = vec![];
+
+    // TODO(antoyo): -Ctarget-cpu=native
+
+    // Features implied by an implicit or explicit `--target`.
+    features.extend(
+        sess.target
+            .features
+            .split(',')
+            .filter(|v| !v.is_empty() && backend_feature_name(v).is_some())
+            .map(String::from),
+    );
+
+    // -Ctarget-features
+    let supported_features = supported_target_features(sess);
+    let mut featsmap = FxHashMap::default();
+    let feats = sess.opts.cg.target_feature
+        .split(',')
+        .filter_map(|s| {
+            let enable_disable = match s.chars().next() {
+                None => return None,
+                Some(c @ ('+' | '-')) => c,
+                Some(_) => {
+                    if diagnostics {
+                        sess.emit_warning(UnknownCTargetFeaturePrefix { feature: s });
+                    }
+                    return None;
+                }
+            };
+
+            let feature = backend_feature_name(s)?;
+            // Warn against use of GCC specific feature names on the CLI.
+            if diagnostics && !supported_features.iter().any(|&(v, _)| v == feature) {
+                let rust_feature = supported_features.iter().find_map(|&(rust_feature, _)| {
+                    let gcc_features = to_gcc_features(sess, rust_feature);
+                    if gcc_features.contains(&feature) && !gcc_features.contains(&rust_feature) {
+                        Some(rust_feature)
+                    } else {
+                        None
+                    }
+                });
+                let unknown_feature =
+                    if let Some(rust_feature) = rust_feature {
+                        UnknownCTargetFeature {
+                            feature,
+                            rust_feature: PossibleFeature::Some { rust_feature },
+                        }
+                    }
+                    else {
+                        UnknownCTargetFeature { feature, rust_feature: PossibleFeature::None }
+                    };
+                sess.emit_warning(unknown_feature);
+            }
+
+            if diagnostics {
+                // FIXME(nagisa): figure out how to not allocate a full hashset here.
+                featsmap.insert(feature, enable_disable == '+');
+            }
+
+            // rustc-specific features do not get passed down to GCC…
+            if RUSTC_SPECIFIC_FEATURES.contains(&feature) {
+                return None;
+            }
+            // ... otherwise though we run through `to_gcc_features` when
+            // passing requests down to GCC. This means that all in-language
+            // features also work on the command line instead of having two
+            // different names when the GCC name and the Rust name differ.
+            Some(to_gcc_features(sess, feature)
+                .iter()
+                .flat_map(|feat| to_gcc_features(sess, feat).into_iter())
+                .map(String::from)
+                .collect::<Vec<_>>(),
+            )
+        })
+        .flatten();
+    features.extend(feats);
+
+    if diagnostics {
+        if let Some(f) = check_tied_features(sess, &featsmap) {
+            sess.emit_err(TargetFeatureDisableOrEnable {
+                features: f,
+                span: None,
+                missing_features: None,
+            });
+        }
+    }
+
+    features
+}
+
+/// Returns a feature name for the given `+feature` or `-feature` string.
+///
+/// Only allows features that are backend specific (i.e. not [`RUSTC_SPECIFIC_FEATURES`].)
+fn backend_feature_name(s: &str) -> Option<&str> {
+    // features must start with a `+` or `-`.
+    let feature = s.strip_prefix(&['+', '-'][..]).unwrap_or_else(|| {
+        bug!("target feature `{}` must begin with a `+` or `-`", s);
+    });
+    // Rustc-specific feature requests like `+crt-static` or `-crt-static`
+    // are not passed down to GCC.
+    if RUSTC_SPECIFIC_FEATURES.contains(&feature) {
+        return None;
+    }
+    Some(feature)
+}
+
+// TODO(antoyo): maybe move to a new module gcc_util.
+// To find a list of GCC's names, check https://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html
+pub fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]> {
+    let arch = if sess.target.arch == "x86_64" { "x86" } else { &*sess.target.arch };
+    match (arch, s) {
+        ("x86", "sse4.2") => smallvec!["sse4.2", "crc32"],
+        ("x86", "pclmulqdq") => smallvec!["pclmul"],
+        ("x86", "rdrand") => smallvec!["rdrnd"],
+        ("x86", "bmi1") => smallvec!["bmi"],
+        ("x86", "cmpxchg16b") => smallvec!["cx16"],
+        ("x86", "avx512vaes") => smallvec!["vaes"],
+        ("x86", "avx512gfni") => smallvec!["gfni"],
+        ("x86", "avx512vpclmulqdq") => smallvec!["vpclmulqdq"],
+        // NOTE: seems like GCC requires 'avx512bw' for 'avx512vbmi2'.
+        ("x86", "avx512vbmi2") => smallvec!["avx512vbmi2", "avx512bw"],
+        // NOTE: seems like GCC requires 'avx512bw' for 'avx512bitalg'.
+        ("x86", "avx512bitalg") => smallvec!["avx512bitalg", "avx512bw"],
+        ("aarch64", "rcpc2") => smallvec!["rcpc-immo"],
+        ("aarch64", "dpb") => smallvec!["ccpp"],
+        ("aarch64", "dpb2") => smallvec!["ccdp"],
+        ("aarch64", "frintts") => smallvec!["fptoint"],
+        ("aarch64", "fcma") => smallvec!["complxnum"],
+        ("aarch64", "pmuv3") => smallvec!["perfmon"],
+        ("aarch64", "paca") => smallvec!["pauth"],
+        ("aarch64", "pacg") => smallvec!["pauth"],
+        // Rust ties fp and neon together. In GCC neon implicitly enables fp,
+        // but we manually enable neon when a feature only implicitly enables fp
+        ("aarch64", "f32mm") => smallvec!["f32mm", "neon"],
+        ("aarch64", "f64mm") => smallvec!["f64mm", "neon"],
+        ("aarch64", "fhm") => smallvec!["fp16fml", "neon"],
+        ("aarch64", "fp16") => smallvec!["fullfp16", "neon"],
+        ("aarch64", "jsconv") => smallvec!["jsconv", "neon"],
+        ("aarch64", "sve") => smallvec!["sve", "neon"],
+        ("aarch64", "sve2") => smallvec!["sve2", "neon"],
+        ("aarch64", "sve2-aes") => smallvec!["sve2-aes", "neon"],
+        ("aarch64", "sve2-sm4") => smallvec!["sve2-sm4", "neon"],
+        ("aarch64", "sve2-sha3") => smallvec!["sve2-sha3", "neon"],
+        ("aarch64", "sve2-bitperm") => smallvec!["sve2-bitperm", "neon"],
+        (_, s) => smallvec![s],
+    }
+}
+
+// Given a map from target_features to whether they are enabled or disabled,
+// ensure only valid combinations are allowed.
+pub fn check_tied_features(sess: &Session, features: &FxHashMap<&str, bool>) -> Option<&'static [&'static str]> {
+    for tied in tied_target_features(sess) {
+        // Tied features must be set to the same value, or not set at all
+        let mut tied_iter = tied.iter();
+        let enabled = features.get(tied_iter.next().unwrap());
+        if tied_iter.any(|feature| enabled != features.get(feature)) {
+            return Some(tied);
+        }
+    }
+    None
+}
diff --git a/src/lib.rs b/src/lib.rs
index 9dbe6aab8cb9..eedac315c60d 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -65,6 +65,7 @@ mod coverageinfo;
 mod debuginfo;
 mod declare;
 mod errors;
+mod gcc_util;
 mod int;
 mod intrinsic;
 mod mono_item;
@@ -195,8 +196,8 @@ impl CodegenBackend for GccCodegenBackend {
     }
 
     fn provide(&self, providers: &mut Providers) {
-        // FIXME(antoyo) compute list of enabled features from cli flags
-        providers.global_backend_features = |_tcx, ()| vec![];
+        providers.global_backend_features =
+            |tcx, ()| gcc_util::global_gcc_features(tcx.sess, true)
     }
 
     fn codegen_crate<'tcx>(&self, tcx: TyCtxt<'tcx>, metadata: EncodedMetadata, need_metadata_module: bool) -> Box<dyn Any> {

From 87daba2cadb642fa1d1e683f04652805e8f7499a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 14 Sep 2023 20:35:11 -0400
Subject: [PATCH 386/997] Only add feature flags on functions

---
 src/attributes.rs |  9 ++++++---
 src/base.rs       | 24 +-----------------------
 src/gcc_util.rs   |  9 ++++++++-
 3 files changed, 15 insertions(+), 27 deletions(-)

diff --git a/src/attributes.rs b/src/attributes.rs
index ced13848c0b9..971e019a4f60 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -94,14 +94,18 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
         }))
         .collect::<Vec<_>>();
 
-    // TODO(antoyo): cg_llvm add global features to each function so that LTO keep them.
+    // TODO(antoyo): cg_llvm adds global features to each function so that LTO keep them.
     // Check if GCC requires the same.
     let mut global_features = cx.tcx.global_backend_features(()).iter().map(|s| s.as_str());
     function_features.extend(&mut global_features);
     let target_features = function_features
         .iter()
         .filter_map(|feature| {
-            if feature.contains("soft-float") || feature.contains("retpoline-external-thunk") {
+            // FIXME(antoyo): for some reasons, disabling SSE results in the following error when
+            // compiling Rust for Linux:
+            // SSE register return with SSE disabled
+            // TODO(antoyo): support soft-float and retpoline-external-thunk.
+            if feature.contains("soft-float") || feature.contains("retpoline-external-thunk") || *feature == "-sse" {
                 return None;
             }
 
@@ -118,7 +122,6 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
         .collect::<Vec<_>>()
         .join(",");
     if !target_features.is_empty() {
-        println!("Function {:?}", function_features);
         #[cfg(feature="master")]
         func.add_attribute(FnAttribute::Target(&target_features));
     }
diff --git a/src/base.rs b/src/base.rs
index 380be3417044..91efcf18bf4a 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -98,32 +98,10 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
             .map(|string| &string[1..])
             .collect();
 
-        let add_cpu_feature_flag = |feature: &str| {
-            if target_info.cpu_supports(feature) && !disabled_features.contains(feature) {
-                context.add_command_line_option(&format!("-m{}", feature));
-            }
-        };
-
-        let disable_cpu_feature = |feature: &str| {
-            if disabled_features.contains(feature) {
-                context.add_command_line_option(&format!("-mno-{}", feature));
-            }
-        };
-
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
 
-        // TODO: instead of setting the features manually, set the correct -march flag.
-        let features = ["64", "avxvnni", "bmi", "sse2", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm",
-            "vaes", "vpclmulqdq", "xsavec",
-        ];
-
-
-        for feature in &features {
-            disable_cpu_feature(feature);
-
-            //add_cpu_feature_flag(feature);
-        }
+        // TODO(antoyo): set the correct -march flag.
 
         if !disabled_features.contains("avx") {
             // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for
diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index da1c0dfe5595..09a0af5d00d9 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -100,7 +100,14 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
             Some(to_gcc_features(sess, feature)
                 .iter()
                 .flat_map(|feat| to_gcc_features(sess, feat).into_iter())
-                .map(String::from)
+                .map(|feature| {
+                    if enable_disable == '-' {
+                        format!("-{}", feature)
+                    }
+                    else {
+                        feature.to_string()
+                    }
+                })
                 .collect::<Vec<_>>(),
             )
         })

From a9a2c687ff7ee755d92375d57b5c88a42f6acb66 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 14 Sep 2023 20:42:14 -0400
Subject: [PATCH 387/997] Send -march to gcc

---
 src/base.rs     |  9 ++++++---
 src/gcc_util.rs | 15 +++++++++++++++
 src/lib.rs      | 16 +---------------
 3 files changed, 22 insertions(+), 18 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index 91efcf18bf4a..61da38f4b0db 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -19,7 +19,7 @@ use rustc_codegen_ssa::traits::DebugInfoMethods;
 use rustc_session::config::DebugInfo;
 use rustc_span::Symbol;
 
-use crate::LockedTargetInfo;
+use crate::{LockedTargetInfo, gcc_util};
 use crate::GccContext;
 use crate::builder::Builder;
 use crate::context::CodegenCx;
@@ -101,8 +101,6 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
         // TODO(antoyo): only set on x86 platforms.
         context.add_command_line_option("-masm=intel");
 
-        // TODO(antoyo): set the correct -march flag.
-
         if !disabled_features.contains("avx") {
             // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for
             // SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead.
@@ -127,6 +125,11 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
             context.add_command_line_option("-fno-pie");
         }
 
+        let target_cpu = gcc_util::target_cpu(tcx.sess);
+        if target_cpu != "generic" {
+            context.add_command_line_option(&format!("-march={}", target_cpu));
+        }
+
         if tcx.sess.opts.unstable_opts.function_sections.unwrap_or(tcx.sess.target.function_sections) {
             context.add_command_line_option("-ffunction-sections");
             context.add_command_line_option("-fdata-sections");
diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 09a0af5d00d9..91a815c0771e 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -198,3 +198,18 @@ pub fn check_tied_features(sess: &Session, features: &FxHashMap<&str, bool>) ->
     }
     None
 }
+
+fn handle_native(name: &str) -> &str {
+    if name != "native" {
+        return name;
+    }
+
+    unimplemented!();
+}
+
+pub fn target_cpu(sess: &Session) -> &str {
+    match sess.opts.cg.target_cpu {
+        Some(ref name) => handle_native(name),
+        None => handle_native(sess.target.cpu.as_ref()),
+    }
+}
diff --git a/src/lib.rs b/src/lib.rs
index eedac315c60d..df33e6cbd613 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -107,6 +107,7 @@ use rustc_span::fatal_error::FatalError;
 use tempfile::TempDir;
 
 use crate::back::lto::ModuleBuffer;
+use crate::gcc_util::target_cpu;
 
 fluent_messages! { "../messages.ftl" }
 
@@ -366,21 +367,6 @@ fn to_gcc_opt_level(optlevel: Option<OptLevel>) -> OptimizationLevel {
     }
 }
 
-fn handle_native(name: &str) -> &str {
-    if name != "native" {
-        return name;
-    }
-
-    unimplemented!();
-}
-
-pub fn target_cpu(sess: &Session) -> &str {
-    match sess.opts.cg.target_cpu {
-        Some(ref name) => handle_native(name),
-        None => handle_native(sess.target.cpu.as_ref()),
-    }
-}
-
 pub fn target_features(sess: &Session, allow_unstable: bool, target_info: &LockedTargetInfo) -> Vec<Symbol> {
     supported_target_features(sess)
         .iter()

From f096c19db502957ecc571654cc5c821368a42eec Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 14 Sep 2023 20:47:14 -0400
Subject: [PATCH 388/997] Handle target-cpu=native

---
 src/gcc_util.rs | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 91a815c0771e..fc992ec6d2a6 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -1,3 +1,4 @@
+use gccjit::Context;
 use smallvec::{smallvec, SmallVec};
 
 use rustc_codegen_ssa::target_features::{
@@ -204,7 +205,11 @@ fn handle_native(name: &str) -> &str {
         return name;
     }
 
-    unimplemented!();
+    // Get the native arch.
+    let context = Context::default();
+    context.get_target_info().arch().unwrap()
+        .to_str()
+        .unwrap()
 }
 
 pub fn target_cpu(sess: &Session) -> &str {

From f3b82df8f8f59238bf9ba9aafa4896e8a72c888e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 14 Sep 2023 21:49:14 -0400
Subject: [PATCH 389/997] Add note to readme

---
 Readme.md       | 2 ++
 src/gcc_util.rs | 5 +----
 2 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/Readme.md b/Readme.md
index 1666cbc4f752..060f7c0326d4 100644
--- a/Readme.md
+++ b/Readme.md
@@ -111,6 +111,8 @@ $ LIBRARY_PATH=$(cat gcc_path) LD_LIBRARY_PATH=$(cat gcc_path) rustc +$(cat $CG_
     object files when their content should have been changed by a change to cg_gccjit.</dd>
     <dt>CG_GCCJIT_DISPLAY_CG_TIME</dt>
     <dd>Display the time it took to perform codegen for a crate</dd>
+    <dt>CG_RUSTFLAGS</dt>
+    <dd>Send additional flags to rustc. Can be used to build the sysroot without unwinding by setting `CG_RUSTFLAGS=-Cpanic=abort`.</dd>
 </dl>
 
 ## Licensing
diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index fc992ec6d2a6..18343d58c35d 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -22,7 +22,7 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
     // * function specific features.
     //
     // [^1]: target-cpu=native is handled here, other target-cpu values are handled implicitly
-    // through GCC TargetMachine implementation.
+    // through GCC march implementation.
     //
     // FIXME(nagisa): it isn't clear what's the best interaction between features implied by
     // `-Ctarget-cpu` and `--target` are. On one hand, you'd expect CLI arguments to always
@@ -33,8 +33,6 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
     // should be taken in cases like these.
     let mut features = vec![];
 
-    // TODO(antoyo): -Ctarget-cpu=native
-
     // Features implied by an implicit or explicit `--target`.
     features.extend(
         sess.target
@@ -144,7 +142,6 @@ fn backend_feature_name(s: &str) -> Option<&str> {
     Some(feature)
 }
 
-// TODO(antoyo): maybe move to a new module gcc_util.
 // To find a list of GCC's names, check https://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html
 pub fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]> {
     let arch = if sess.target.arch == "x86_64" { "x86" } else { &*sess.target.arch };

From 5ab4e2b484ea9b3ffd861c2ed9c358c405576bbd Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 18 Sep 2023 18:24:09 -0400
Subject: [PATCH 390/997] Implement llvm.x86.rdrand.64

---
 src/intrinsic/llvm.rs | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index cb070e8267a5..5996623bdc58 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -242,6 +242,11 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 new_args.pop();
                 args = new_args.into();
             },
+            // The GCC version returns one value of the tuple through a pointer.
+            "__builtin_ia32_rdrand64_step" => {
+                let arg = builder.current_func().new_local(None, builder.ulonglong_type, "return_rdrand_arg");
+                args = vec![arg.get_address(None)].into();
+            },
             _ => (),
         }
     }
@@ -362,6 +367,19 @@ pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc,
             // builtin twice, we overwrite the return value with a dummy value.
             return_value = builder.context.new_rvalue_zero(builder.int_type);
         },
+        "__builtin_ia32_rdrand64_step" => {
+            let random_number = args[0].dereference(None).to_rvalue();
+            let success_variable = builder.current_func().new_local(None, return_value.get_type(), "success");
+            builder.llbb().add_assignment(None, success_variable, return_value);
+
+            let field1 = builder.context.new_field(None, random_number.get_type(), "random_number");
+            let field2 = builder.context.new_field(None, return_value.get_type(), "success");
+            let struct_type = builder.context.new_struct_type(None, "rdrand_result", &[field1, field2]);
+            return_value = builder.context.new_struct_constructor(None, struct_type.as_type(), None, &[
+                random_number,
+                success_variable.to_rvalue(),
+            ]);
+        },
         _ => (),
     }
 
@@ -614,6 +632,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.fshr.v8i16" => "__builtin_ia32_vpshrdv_v8hi",
         "llvm.x86.fma.vfmadd.sd" => "__builtin_ia32_vfmaddsd3",
         "llvm.x86.fma.vfmadd.ss" => "__builtin_ia32_vfmaddss3",
+        "llvm.x86.rdrand.64" => "__builtin_ia32_rdrand64_step",
 
         // The above doc points to unknown builtins for the following, so override them:
         "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gathersiv4si",

From be3b1e33215bec2d47bcb0455c9b27d412b9328a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 19 Sep 2023 22:20:35 -0400
Subject: [PATCH 391/997] Fix gep on pointers to non-number

---
 Cargo.lock             |  4 ++--
 failing-ui-tests.txt   |  1 -
 failing-ui-tests12.txt |  1 +
 src/builder.rs         |  6 ++++++
 src/gcc_util.rs        | 16 +++++++++++-----
 test.sh                |  1 +
 tests/run/gep.rs       | 10 ++++++++++
 7 files changed, 31 insertions(+), 8 deletions(-)
 create mode 100644 tests/run/gep.rs

diff --git a/Cargo.lock b/Cargo.lock
index 404fb9c6db13..85675fc40c34 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -74,7 +74,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#ff1f82584c760a8b870dc6bad9841bd090f92f80"
+source = "git+https://github.com/antoyo/gccjit.rs#0b158c68bf7e46732869d90550a98e886dee8858"
 dependencies = [
  "gccjit_sys",
 ]
@@ -82,7 +82,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#ff1f82584c760a8b870dc6bad9841bd090f92f80"
+source = "git+https://github.com/antoyo/gccjit.rs#0b158c68bf7e46732869d90550a98e886dee8858"
 dependencies = [
  "libc",
 ]
diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 0711ae99a3e7..8ec151f78388 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -14,7 +14,6 @@ tests/ui/sepcomp/sepcomp-fns-backwards.rs
 tests/ui/sepcomp/sepcomp-fns.rs
 tests/ui/sepcomp/sepcomp-statics.rs
 tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
-tests/ui/target-feature/missing-plusminus.rs
 tests/ui/asm/x86_64/may_unwind.rs
 tests/ui/backtrace.rs
 tests/ui/catch-unwind-bang.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 8c27bd8b8ca8..0ac0a034af40 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -37,3 +37,4 @@ tests/ui/simd/intrinsic/generic-gather-pass.rs
 tests/ui/simd/issue-85915-simd-ptrs.rs
 tests/ui/issues/issue-68010-large-zst-consts.rs
 tests/ui/rust-2018/proc-macro-crate-in-paths.rs
+tests/ui/target-feature/missing-plusminus.rs
diff --git a/src/builder.rs b/src/builder.rs
index b0feb99e3c6f..04100f2ad2e2 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -922,6 +922,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // require dereferencing the pointer.
         for index in indices {
             pointee_type = pointee_type.get_pointee().expect("pointee type");
+            #[cfg(feature="master")]
+            let pointee_size = {
+                let size = self.cx.context.new_sizeof(pointee_type);
+                self.context.new_cast(None, size, index.get_type())
+            };
+            #[cfg(not(feature="master"))]
             let pointee_size = self.context.new_rvalue_from_int(index.get_type(), pointee_type.get_size() as i32);
             result = result + self.gcc_int_cast(*index * pointee_size, self.sizet_type);
         }
diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 18343d58c35d..0514c9988e0f 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -1,3 +1,4 @@
+#[cfg(feature="master")]
 use gccjit::Context;
 use smallvec::{smallvec, SmallVec};
 
@@ -202,11 +203,16 @@ fn handle_native(name: &str) -> &str {
         return name;
     }
 
-    // Get the native arch.
-    let context = Context::default();
-    context.get_target_info().arch().unwrap()
-        .to_str()
-        .unwrap()
+    #[cfg(feature="master")]
+    {
+        // Get the native arch.
+        let context = Context::default();
+        context.get_target_info().arch().unwrap()
+            .to_str()
+            .unwrap()
+    }
+    #[cfg(not(feature="master"))]
+    unimplemented!();
 }
 
 pub fn target_cpu(sess: &Session) -> &str {
diff --git a/test.sh b/test.sh
index c47cf140ae4a..5b7ef7ab1018 100755
--- a/test.sh
+++ b/test.sh
@@ -220,6 +220,7 @@ changelog-seen = 2
 [rust]
 codegen-backends = []
 deny-warnings = false
+verbose-tests = true
 
 [build]
 cargo = "$(rustup which cargo)"
diff --git a/tests/run/gep.rs b/tests/run/gep.rs
new file mode 100644
index 000000000000..c3d1672cff57
--- /dev/null
+++ b/tests/run/gep.rs
@@ -0,0 +1,10 @@
+// Compiler:
+//
+// Run-time:
+//   status: 0
+
+fn main() {
+    let mut value = (1, 1);
+    let ptr = &mut value as *mut (i32, i32);
+    println!("{:?}", ptr.wrapping_offset(10));
+}

From a7d8b8eb9f6012dd726ec904f45e00b806619a78 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 22 Sep 2023 16:39:11 +0200
Subject: [PATCH 392/997] Add guide to add new attributes support in libgccjit

---
 doc/add-attribute.md | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 doc/add-attribute.md

diff --git a/doc/add-attribute.md b/doc/add-attribute.md
new file mode 100644
index 000000000000..ae3bcc5e2ebe
--- /dev/null
+++ b/doc/add-attribute.md
@@ -0,0 +1,17 @@
+# Add support for a new function attribute
+
+To add support for a new function attribute in libgccjit, you need to do the following steps:
+
+ 1. Copy the corresponding function from `c-family/c-attribs.cc` into `jit/dummy-frontend.cc`. For example if you add the `target` attribute, the function name will be `handle_target_attribute`.
+ 2. Copy the corresponding entry from the `c_common_attribute_table` variable in the `c-family/c-attribs.cc` file into the `jit_attribute_table` variable in `jit/dummy-frontend.cc`.
+ 3. Add a new variant in the `gcc_jit_fn_attribute` enum in the `jit/libgccjit.h` file.
+ 4. Add a test to ensure the attribute is correctly applied in `gcc/testsuite/jit.dg/`. Take a look at `gcc/testsuite/jit.dg/test-nonnull.c` if you want an example.
+ 5. Run the example like this (in your `gcc-build` folder): `make check-jit RUNTESTFLAGS="-v -v -v jit.exp=jit.dg/test-nonnull.c"`
+
+Once done, you need to update the [gccjit.rs] crate to add the new enum variant in the corresponding enum (`FnAttribute`).
+
+Finally, you need to update this repository by calling the relevant API you added in [gccjit.rs].
+
+To test it, build `gcc`, run `cargo update -p gccjit` and then you can test the generated output for a given Rust crate.
+
+[gccjit.rs]: https://github.com/antoyo/gccjit.rs

From ccf57997826581da83eff3a29cadc1c9fb728875 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 25 Sep 2023 17:04:44 +0200
Subject: [PATCH 393/997] Use cargo to build the build system binary

---
 y.sh | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/y.sh b/y.sh
index 481b909c92a0..188109743e3d 100755
--- a/y.sh
+++ b/y.sh
@@ -2,6 +2,7 @@
 
 set -e
 echo "[BUILD] build system" 1>&2
-mkdir -p build_system/target
-rustc build_system/src/main.rs -o build_system/target/y -Cdebuginfo=1 --edition 2021
-exec ./build_system/target/y "$@"
+cd build_system
+cargo build --release
+cd ..
+./build_system/target/release/y $@

From 6be1f3674460cb0c91341dc07e1c31699bd0980e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 25 Sep 2023 17:12:40 +0200
Subject: [PATCH 394/997] Add help message

---
 build_system/src/main.rs | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index c76418da5794..16c4c3a9c62f 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -9,13 +9,19 @@ mod utils;
 macro_rules! arg_error {
     ($($err:tt)*) => {{
         eprintln!($($err)*);
+        eprintln!();
         usage();
         std::process::exit(1);
     }};
 }
 
 fn usage() {
-    // println!("{}", include_str!("usage.txt"));
+    println!("\
+Available commands for build_system:
+
+    prepare  : Run prepare command
+    build    : Run build command
+    --help   : Show this message");
 }
 
 pub enum Command {
@@ -31,6 +37,10 @@ fn main() {
     let command = match env::args().nth(1).as_deref() {
         Some("prepare") => Command::Prepare,
         Some("build") => Command::Build,
+        Some("--help") => {
+            usage();
+            process::exit(0);
+        }
         Some(flag) if flag.starts_with('-') => arg_error!("Expected command found flag {}", flag),
         Some(command) => arg_error!("Unknown command {}", command),
         None => {

From eedf1b6cb458c6a474bf2e9ccc29cbe9059f7764 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 26 Sep 2023 16:09:51 +0200
Subject: [PATCH 395/997] Migrate build.sh script to rust

---
 .github/workflows/ci.yml       |   2 +-
 .github/workflows/release.yml  |   2 +-
 .github/workflows/stdarch.yml  |   2 +-
 Readme.md                      |   2 +-
 build.sh                       |  67 ----------
 build_sysroot/build_sysroot.sh |   4 +-
 build_system/src/build.rs      | 217 ++++++++++++++++++++++++++++++++-
 build_system/src/config.rs     | 121 ++++++++++++++++++
 build_system/src/main.rs       |   7 +-
 build_system/src/prepare.rs    | 137 ++++++++++++++-------
 build_system/src/utils.rs      | 113 ++++++++++++++---
 config.sh                      |   2 +-
 12 files changed, 542 insertions(+), 134 deletions(-)
 delete mode 100755 build.sh
 create mode 100644 build_system/src/config.rs

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 4702494f05cb..f075c744e457 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -119,7 +119,7 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        ${{ matrix.libgccjit_version.env_extra }} ./build.sh ${{ matrix.libgccjit_version.extra }}
+        ${{ matrix.libgccjit_version.env_extra }} ./y.sh build ${{ matrix.libgccjit_version.extra }}
         ${{ matrix.libgccjit_version.env_extra }} cargo test ${{ matrix.libgccjit_version.extra }}
         ./clean_all.sh
 
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 51fc5c76cdb1..bd0415040e7e 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -86,7 +86,7 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        EMBED_LTO_BITCODE=1 ./build.sh --release --release-sysroot
+        EMBED_LTO_BITCODE=1 ./y.sh build --release --release-sysroot
         cargo test
         ./clean_all.sh
 
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index c44d8efe3c78..6c28326823cc 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -100,7 +100,7 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        ./build.sh --release --release-sysroot
+        ./y.sh build --release --release-sysroot
         cargo test
 
     - name: Clean
diff --git a/Readme.md b/Readme.md
index 060f7c0326d4..de6cab120a4d 100644
--- a/Readme.md
+++ b/Readme.md
@@ -66,7 +66,7 @@ Then you can run commands like this:
 
 ```bash
 $ ./y.sh prepare # download and patch sysroot src and install hyperfine for benchmarking
-$ LIBRARY_PATH=$(cat gcc_path) LD_LIBRARY_PATH=$(cat gcc_path) ./build.sh --release
+$ LIBRARY_PATH=$(cat gcc_path) LD_LIBRARY_PATH=$(cat gcc_path) ./y.sh build --release
 ```
 
 To run the tests:
diff --git a/build.sh b/build.sh
deleted file mode 100755
index ba0d0d04948a..000000000000
--- a/build.sh
+++ /dev/null
@@ -1,67 +0,0 @@
-#!/usr/bin/env bash
-
-#set -x
-set -e
-
-codegen_channel=debug
-sysroot_channel=debug
-
-flags=
-
-while [[ $# -gt 0 ]]; do
-    case $1 in
-        --release)
-            codegen_channel=release
-            shift
-            ;;
-        --release-sysroot)
-            sysroot_channel=release
-            shift
-            ;;
-        --no-default-features)
-            flags="$flags --no-default-features"
-            shift
-            ;;
-        --features)
-            shift
-            flags="$flags --features $1"
-            shift
-            ;;
-        *)
-            echo "Unknown option $1"
-            exit 1
-            ;;
-    esac
-done
-
-if [ -f ./gcc_path ]; then
-    export GCC_PATH=$(cat gcc_path)
-else
-    echo 'Please put the path to your custom build of libgccjit in the file `gcc_path`, see Readme.md for details'
-    exit 1
-fi
-
-export LD_LIBRARY_PATH="$GCC_PATH"
-export LIBRARY_PATH="$GCC_PATH"
-
-if [[ "$codegen_channel" == "release" ]]; then
-    export CHANNEL='release'
-    CARGO_INCREMENTAL=1 cargo rustc --release $flags
-else
-    echo $LD_LIBRARY_PATH
-    export CHANNEL='debug'
-    cargo rustc $flags
-fi
-
-source config.sh
-
-rm -r target/out || true
-mkdir -p target/out/gccjit
-
-echo "[BUILD] sysroot"
-if [[ "$sysroot_channel" == "release" ]]; then
-    time ./build_sysroot/build_sysroot.sh --release
-else
-    time ./build_sysroot/build_sysroot.sh
-fi
-
diff --git a/build_sysroot/build_sysroot.sh b/build_sysroot/build_sysroot.sh
index 9d692d599f6b..851e9895ce2b 100755
--- a/build_sysroot/build_sysroot.sh
+++ b/build_sysroot/build_sysroot.sh
@@ -5,9 +5,9 @@
 set -e
 cd $(dirname "$0")
 
-pushd ../ >/dev/null
+pushd ../
 source ./config.sh
-popd >/dev/null
+popd
 
 # Cleanup for previous run
 #     v Clean target dir except for build scripts and incremental cache
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 7384557d805c..58c36412ea52 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -1,3 +1,218 @@
-pub fn run() -> Result<(), String> {
+use crate::config::set_config;
+use crate::utils::{get_gcc_path, run_command_with_env, run_command_with_output, walk_dir};
+use std::collections::HashMap;
+use std::ffi::OsStr;
+use std::fs;
+use std::path::Path;
+
+#[derive(Default)]
+struct BuildArg {
+    codegen_release_channel: bool,
+    sysroot_release_channel: bool,
+    no_default_features: bool,
+    features: Vec<String>,
+    gcc_path: String,
+}
+
+impl BuildArg {
+    fn new() -> Result<Option<Self>, String> {
+        let gcc_path = get_gcc_path()?;
+        let mut build_arg = Self {
+            gcc_path,
+            ..Default::default()
+        };
+        let mut args = std::env::args().skip(2);
+
+        while let Some(arg) = args.next() {
+            match arg.as_str() {
+                "--release" => build_arg.codegen_release_channel = true,
+                "--release-sysroot" => build_arg.sysroot_release_channel = true,
+                "--no-default-features" => build_arg.no_default_features = true,
+                "--features" => {
+                    if let Some(arg) = args.next() {
+                        build_arg.features.push(arg.as_str().into());
+                    } else {
+                        return Err(format!(
+                            "Expected a value after `--features`, found nothing"
+                        ));
+                    }
+                }
+                "--help" => {
+                    Self::usage();
+                    return Ok(None);
+                }
+                a => return Err(format!("Unknown argument `{a}`")),
+            }
+        }
+        Ok(Some(build_arg))
+    }
+
+    fn usage() {
+        println!(
+            r#"
+`build` command help:
+
+    --release              : Build codegen in release mode
+    --release-sysroot      : Build sysroot in release mode
+    --no-default-features  : Add `--no-default-features` flag
+    --features [arg]       : Add a new feature [arg]
+    --help                 : Show this help
+"#
+        )
+    }
+}
+
+fn build_sysroot(
+    env: &mut HashMap<String, String>,
+    release_mode: bool,
+    target_triple: &str,
+) -> Result<(), String> {
+    std::env::set_current_dir("build_sysroot")
+        .map_err(|e| format!("Failed to go to `build_sysroot` directory: {e:?}"))?;
+    // Cleanup for previous run
+    //     v Clean target dir except for build scripts and incremental cache
+   let _e = walk_dir(
+        "target",
+        |dir: &Path| {
+            for top in &["debug", "release"] {
+                let _e = fs::remove_dir_all(dir.join(top).join("build"));
+                let _e = fs::remove_dir_all(dir.join(top).join("deps"));
+                let _e = fs::remove_dir_all(dir.join(top).join("examples"));
+                let _e = fs::remove_dir_all(dir.join(top).join("native"));
+
+                let _e = walk_dir(
+                    dir.join(top),
+                    |sub_dir: &Path| {
+                        if sub_dir
+                            .file_name()
+                            .map(|s| s.to_str().unwrap().starts_with("libsysroot"))
+                            .unwrap_or(false)
+                        {
+                            let _e = fs::remove_dir_all(sub_dir);
+                        }
+                        Ok(())
+                    },
+                    |file: &Path| {
+                        if file
+                            .file_name()
+                            .map(|s| s.to_str().unwrap().starts_with("libsysroot"))
+                            .unwrap_or(false)
+                        {
+                            let _e = fs::remove_file(file);
+                        }
+                        Ok(())
+                    },
+                );
+            }
+            Ok(())
+        },
+        |_| Ok(()),
+    );
+
+    let _e = fs::remove_file("Cargo.lock");
+    let _e = fs::remove_file("test_target/Cargo.lock");
+    let _e = fs::remove_dir_all("sysroot");
+
+    // Builds libs
+    let channel = if release_mode {
+        let rustflags = env
+            .get(&"RUSTFLAGS".to_owned())
+            .cloned()
+            .unwrap_or_default();
+        env.insert(
+            "RUSTFLAGS".to_owned(),
+            format!("{rustflags} -Zmir-opt-level=3"),
+        );
+        run_command_with_output(
+            &[
+                &"cargo",
+                &"build",
+                &"--target",
+                &target_triple,
+                &"--release",
+            ],
+            None,
+            Some(&env),
+        )?;
+        "release"
+    } else {
+        run_command_with_output(
+            &[
+                &"cargo",
+                &"build",
+                &"--target",
+                &target_triple,
+                &"--features",
+                &"compiler_builtins/c",
+            ],
+            None,
+            Some(env),
+        )?;
+        "debug"
+    };
+
+    // Copy files to sysroot
+    let sysroot_path = format!("sysroot/lib/rustlib/{target_triple}/lib/");
+    fs::create_dir_all(&sysroot_path)
+        .map_err(|e| format!("Failed to create directory `{sysroot_path}`: {e:?}"))?;
+    let copier = |d: &Path| run_command_with_output(&[&"cp", &"-r", &d, &sysroot_path], None, None);
+    walk_dir(
+        &format!("target/{target_triple}/{channel}/deps"),
+        copier,
+        copier,
+    )?;
+
+    Ok(())
+}
+
+fn build_codegen(args: &BuildArg) -> Result<(), String> {
+    let mut env = HashMap::new();
+
+    let current_dir =
+        std::env::current_dir().map_err(|e| format!("`current_dir` failed: {e:?}"))?;
+    env.insert(
+        "RUST_COMPILER_RT_ROOT".to_owned(),
+        format!("{}", current_dir.join("llvm/compiler-rt").display()),
+    );
+    env.insert("LD_LIBRARY_PATH".to_owned(), args.gcc_path.clone());
+    env.insert("LIBRARY_PATH".to_owned(), args.gcc_path.clone());
+
+    let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"rustc"];
+    if args.codegen_release_channel {
+        command.push(&"--release");
+        env.insert("CHANNEL".to_owned(), "release".to_owned());
+        env.insert("CARGO_INCREMENTAL".to_owned(), "1".to_owned());
+    } else {
+        env.insert("CHANNEL".to_owned(), "debug".to_owned());
+    }
+    let ref_features = args.features.iter().map(|s| s.as_str()).collect::<Vec<_>>();
+    for feature in &ref_features {
+        command.push(feature);
+    }
+    run_command_with_env(&command, None, Some(&env))?;
+
+    let config = set_config(&mut env, &[], Some(&args.gcc_path))?;
+
+    // We voluntarily ignore the error.
+    let _e = fs::remove_dir_all("target/out");
+    let gccjit_target = "target/out/gccjit";
+    fs::create_dir_all(gccjit_target)
+        .map_err(|e| format!("Failed to create directory `{gccjit_target}`: {e:?}"))?;
+
+    println!("[BUILD] sysroot");
+    build_sysroot(
+        &mut env,
+        args.sysroot_release_channel,
+        &config.target_triple,
+    )?;
+    Ok(())
+}
+
+pub fn run() -> Result<(), String> {
+    let args = match BuildArg::new()? {
+        Some(a) => a,
+        None => return Ok(()),
+    };
+    build_codegen(&args)?;
     Ok(())
 }
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
new file mode 100644
index 000000000000..5160eb2ecae7
--- /dev/null
+++ b/build_system/src/config.rs
@@ -0,0 +1,121 @@
+use crate::utils::{get_gcc_path, get_os_name, get_rustc_host_triple};
+use std::collections::HashMap;
+use std::env as std_env;
+
+pub struct ConfigInfo {
+    pub target_triple: String,
+    pub rustc_command: Vec<String>,
+    pub run_wrapper: Option<&'static str>,
+}
+
+// Returns the beginning for the command line of rustc.
+pub fn set_config(
+    env: &mut HashMap<String, String>,
+    test_flags: &[String],
+    gcc_path: Option<&str>,
+) -> Result<ConfigInfo, String> {
+    env.insert("CARGO_INCREMENTAL".to_owned(), "0".to_owned());
+
+    let gcc_path = match gcc_path {
+        Some(g) => g.to_owned(),
+        None => get_gcc_path()?,
+    };
+    env.insert("GCC_PATH".to_owned(), gcc_path.clone());
+
+    let os_name = get_os_name()?;
+    let dylib_ext = match os_name.as_str() {
+        "Linux" => "so",
+        "Darwin" => "dylib",
+        os => return Err(format!("unsupported OS `{os}`")),
+    };
+    let host_triple = get_rustc_host_triple()?;
+    let mut linker = None;
+    let mut target_triple = host_triple.as_str();
+    let mut run_wrapper = None;
+    // FIXME: handle this with a command line flag?
+    // let mut target_triple = "m68k-unknown-linux-gnu";
+
+    if host_triple != target_triple {
+        if target_triple == "m68k-unknown-linux-gnu" {
+            target_triple = "mips-unknown-linux-gnu";
+            linker = Some("-Clinker=m68k-linux-gcc");
+        } else if target_triple == "aarch64-unknown-linux-gnu" {
+            // We are cross-compiling for aarch64. Use the correct linker and run tests in qemu.
+            linker = Some("-Clinker=aarch64-linux-gnu-gcc");
+            run_wrapper = Some("qemu-aarch64 -L /usr/aarch64-linux-gnu");
+        } else {
+            return Err(format!("unknown non-native platform `{target_triple}`"));
+        }
+    }
+    // Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
+    // TODO(antoyo): remove when we can handle ThinLTO.
+    let disable_lto_lfags = "-Clto=off";
+    let current_dir = std_env::current_dir().map_err(|e| format!("`current_dir` failed: {e:?}"))?;
+    let cg_backend_path = current_dir
+        .join("target")
+        .join(if let Some(channel) = env.get(&"CHANNEL".to_owned()) {
+            channel.as_str()
+        } else {
+            "debug"
+        })
+        .join(&format!("librustc_codegen_gcc.{dylib_ext}"));
+    let sysroot_path = current_dir.join("build_sysroot/sysroot");
+    let mut rustflags = Vec::new();
+    if let Some(cg_rustflags) = env.get(&"CG_RUSTFLAGS".to_owned()) {
+        rustflags.push(cg_rustflags.clone());
+    }
+    if let Some(linker) = linker {
+        rustflags.push(linker.to_owned());
+    }
+    rustflags.extend_from_slice(&[
+        "-Csymbol-mangling-version=v0".to_owned(),
+        "-Cdebuginfo=2".to_owned(),
+        disable_lto_lfags.to_owned(),
+        format!("-Zcodegen-backend={}", cg_backend_path.display()),
+        "--sysroot".to_owned(),
+        format!("{}", sysroot_path.display()),
+    ]);
+    rustflags.extend_from_slice(test_flags);
+    // FIXME(antoyo): remove once the atomic shim is gone
+    if os_name == "Darwin" {
+        rustflags.extend_from_slice(&[
+            "-Clink-arg=-undefined".to_owned(),
+            "-Clink-arg=dynamic_lookup".to_owned(),
+        ]);
+    }
+    env.insert("RUSTFLAGS".to_owned(), rustflags.join(" "));
+    // display metadata load errors
+    env.insert("RUSTC_LOG".to_owned(), "warn".to_owned());
+
+    let ld_library_path = format!(
+        "{target}:{sysroot}:{gcc_path}",
+        target = current_dir.join("target/out").display(),
+        sysroot = current_dir
+            .join(&format!(
+                "build_sysroot/sysroot/lib/rustlib/{target_triple}/lib"
+            ),)
+            .display(),
+    );
+    env.insert("LD_LIBRARY_PATH".to_owned(), ld_library_path.clone());
+    env.insert("DYLD_LIBRARY_PATH".to_owned(), ld_library_path);
+
+    // NOTE: To avoid the -fno-inline errors, use /opt/gcc/bin/gcc instead of cc.
+    // To do so, add a symlink for cc to /opt/gcc/bin/gcc in our PATH.
+    // Another option would be to add the following Rust flag: -Clinker=/opt/gcc/bin/gcc
+    let path = std::env::var("PATH").unwrap_or_default();
+    env.insert("PATH".to_owned(), format!("/opt/gcc/bin:{path}"));
+
+    let mut rustc_command = vec!["rustc".to_owned()];
+    rustc_command.extend_from_slice(&rustflags);
+    rustc_command.extend_from_slice(&[
+        "-L".to_owned(),
+        "crate=target/out".to_owned(),
+        "--out-dir".to_owned(),
+        "target/out".to_owned(),
+    ]);
+    Ok(ConfigInfo {
+        target_triple: target_triple.to_owned(),
+        rustc_command,
+        run_wrapper,
+    })
+}
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index 16c4c3a9c62f..332a14ff0a28 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -2,6 +2,7 @@ use std::env;
 use std::process;
 
 mod build;
+mod config;
 mod prepare;
 mod rustc_info;
 mod utils;
@@ -16,12 +17,14 @@ macro_rules! arg_error {
 }
 
 fn usage() {
-    println!("\
+    println!(
+        "\
 Available commands for build_system:
 
     prepare  : Run prepare command
     build    : Run build command
-    --help   : Show this message");
+    --help   : Show this message"
+    );
 }
 
 pub enum Command {
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 9c31b5cb8b3c..6274628378e2 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -15,11 +15,10 @@ fn prepare_libcore(sysroot_path: &Path) -> Result<(), String> {
         None => return Err(format!("No parent for `{}`", rustc_path.display())),
     };
 
-    let rustlib_dir =
-        parent
-            .join("../lib/rustlib/src/rust")
-            .canonicalize()
-            .map_err(|e| format!("Failed to canonicalize path: {e:?}"))?;
+    let rustlib_dir = parent
+        .join("../lib/rustlib/src/rust")
+        .canonicalize()
+        .map_err(|e| format!("Failed to canonicalize path: {e:?}"))?;
     if !rustlib_dir.is_dir() {
         return Err("Please install `rust-src` component".to_owned());
     }
@@ -27,18 +26,26 @@ fn prepare_libcore(sysroot_path: &Path) -> Result<(), String> {
     let sysroot_dir = sysroot_path.join("sysroot_src");
     if sysroot_dir.is_dir() {
         if let Err(e) = fs::remove_dir_all(&sysroot_dir) {
-            return Err(format!("Failed to remove `{}`: {:?}", sysroot_dir.display(), e));
+            return Err(format!(
+                "Failed to remove `{}`: {:?}",
+                sysroot_dir.display(),
+                e
+            ));
         }
     }
 
     let sysroot_library_dir = sysroot_dir.join("library");
-    fs::create_dir_all(&sysroot_library_dir)
-        .map_err(|e| format!(
+    fs::create_dir_all(&sysroot_library_dir).map_err(|e| {
+        format!(
             "Failed to create folder `{}`: {e:?}",
             sysroot_library_dir.display(),
-        ))?;
+        )
+    })?;
 
-    run_command(&[&"cp", &"-r", &rustlib_dir.join("library"), &sysroot_dir], None)?;
+    run_command(
+        &[&"cp", &"-r", &rustlib_dir.join("library"), &sysroot_dir],
+        None,
+    )?;
 
     println!("[GIT] init (cwd): `{}`", sysroot_dir.display());
     run_command(&[&"git", &"init"], Some(&sysroot_dir))?;
@@ -49,26 +56,52 @@ fn prepare_libcore(sysroot_path: &Path) -> Result<(), String> {
     // This is needed on systems where nothing is configured.
     // git really needs something here, or it will fail.
     // Even using --author is not enough.
-    run_command(&[&"git", &"config", &"user.email", &"none@example.com"], Some(&sysroot_dir))?;
-    run_command(&[&"git", &"config", &"user.name", &"None"], Some(&sysroot_dir))?;
-    run_command(&[&"git", &"config", &"core.autocrlf", &"false"], Some(&sysroot_dir))?;
-    run_command(&[&"git", &"config", &"commit.gpgSign", &"false"], Some(&sysroot_dir))?;
-    run_command(&[&"git", &"commit", &"-m", &"Initial commit", &"-q"], Some(&sysroot_dir))?;
+    run_command(
+        &[&"git", &"config", &"user.email", &"none@example.com"],
+        Some(&sysroot_dir),
+    )?;
+    run_command(
+        &[&"git", &"config", &"user.name", &"None"],
+        Some(&sysroot_dir),
+    )?;
+    run_command(
+        &[&"git", &"config", &"core.autocrlf", &"false"],
+        Some(&sysroot_dir),
+    )?;
+    run_command(
+        &[&"git", &"config", &"commit.gpgSign", &"false"],
+        Some(&sysroot_dir),
+    )?;
+    run_command(
+        &[&"git", &"commit", &"-m", &"Initial commit", &"-q"],
+        Some(&sysroot_dir),
+    )?;
 
     let mut patches = Vec::new();
-    walk_dir("patches", |_| Ok(()), |file_path: &Path| {
-        patches.push(file_path.to_path_buf());
-        Ok(())
-    })?;
+    walk_dir(
+        "patches",
+        |_| Ok(()),
+        |file_path: &Path| {
+            patches.push(file_path.to_path_buf());
+            Ok(())
+        },
+    )?;
     patches.sort();
     for file_path in patches {
         println!("[GIT] apply `{}`", file_path.display());
         let path = Path::new("../..").join(file_path);
-        run_command_with_output(&[&"git", &"apply", &path], Some(&sysroot_dir))?;
-        run_command_with_output(&[&"git", &"add", &"-A"], Some(&sysroot_dir))?;
+        run_command_with_output(&[&"git", &"apply", &path], Some(&sysroot_dir), None)?;
+        run_command_with_output(&[&"git", &"add", &"-A"], Some(&sysroot_dir), None)?;
         run_command_with_output(
-            &[&"git", &"commit", &"--no-gpg-sign", &"-m", &format!("Patch {}", path.display())],
+            &[
+                &"git",
+                &"commit",
+                &"--no-gpg-sign",
+                &"-m",
+                &format!("Patch {}", path.display()),
+            ],
             Some(&sysroot_dir),
+            None,
         )?;
     }
     println!("Successfully prepared libcore for building");
@@ -83,7 +116,10 @@ fn build_raytracer(repo_dir: &Path) -> Result<(), String> {
         std::fs::remove_file(&mv_target)
             .map_err(|e| format!("Failed to remove file `{}`: {e:?}", mv_target.display()))?;
     }
-    run_command(&[&"mv", &"target/debug/main", &"raytracer_cg_llvm"], Some(repo_dir))?;
+    run_command(
+        &[&"mv", &"target/debug/main", &"raytracer_cg_llvm"],
+        Some(repo_dir),
+    )?;
     Ok(())
 }
 
@@ -99,16 +135,21 @@ where
     run_command(&[&"git", &"checkout", &"--", &"."], Some(&repo_path))?;
     run_command(&[&"git", &"checkout", &checkout_commit], Some(&repo_path))?;
     let filter = format!("-{}-", clone_result.repo_name);
-    walk_dir("crate_patches", |_| Ok(()), |file_path| {
-        let s = file_path.as_os_str().to_str().unwrap();
-        if s.contains(&filter) && s.ends_with(".patch") {
-            run_command_with_output(
-                &[&"git", &"am", &file_path.canonicalize().unwrap()],
-                Some(&repo_path),
-            )?;
-        }
-        Ok(())
-    })?;
+    walk_dir(
+        "crate_patches",
+        |_| Ok(()),
+        |file_path| {
+            let s = file_path.as_os_str().to_str().unwrap();
+            if s.contains(&filter) && s.ends_with(".patch") {
+                run_command_with_output(
+                    &[&"git", &"am", &file_path.canonicalize().unwrap()],
+                    Some(&repo_path),
+                    None,
+                )?;
+            }
+            Ok(())
+        },
+    )?;
     if let Some(extra) = extra {
         extra(&repo_path)?;
     }
@@ -128,23 +169,23 @@ impl PrepareArg {
                 "--only-libcore" => only_libcore = true,
                 "--help" => {
                     Self::usage();
-                    return Ok(None)
+                    return Ok(None);
                 }
                 a => return Err(format!("Unknown argument `{a}`")),
             }
         }
-        Ok(Some(Self {
-            only_libcore,
-        }))
+        Ok(Some(Self { only_libcore }))
     }
 
     fn usage() {
-        println!(r#"
+        println!(
+            r#"
 `prepare` command help:
 
     --only-libcore  : Only setup libcore and don't clone other repositories
     --help          : Show this help
-"#)
+"#
+        )
     }
 }
 
@@ -160,9 +201,21 @@ pub fn run() -> Result<(), String> {
         cargo_install("hyperfine")?;
 
         let to_clone = &[
-            ("https://github.com/rust-random/rand.git", "0f933f9c7176e53b2a3c7952ded484e1783f0bf1", None),
-            ("https://github.com/rust-lang/regex.git", "341f207c1071f7290e3f228c710817c280c8dca1", None),
-            ("https://github.com/ebobby/simple-raytracer", "804a7a21b9e673a482797aa289a18ed480e4d813", Some(build_raytracer)),
+            (
+                "https://github.com/rust-random/rand.git",
+                "0f933f9c7176e53b2a3c7952ded484e1783f0bf1",
+                None,
+            ),
+            (
+                "https://github.com/rust-lang/regex.git",
+                "341f207c1071f7290e3f228c710817c280c8dca1",
+                None,
+            ),
+            (
+                "https://github.com/ebobby/simple-raytracer",
+                "804a7a21b9e673a482797aa289a18ed480e4d813",
+                Some(build_raytracer),
+            ),
         ];
 
         for (repo_url, checkout_commit, cb) in to_clone {
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index c350864dbd29..1724e2755959 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -1,10 +1,15 @@
+use std::collections::HashMap;
 use std::ffi::OsStr;
 use std::fmt::Debug;
 use std::fs;
 use std::path::Path;
 use std::process::{Command, ExitStatus, Output};
 
-fn get_command_inner(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Command {
+fn get_command_inner(
+    input: &[&dyn AsRef<OsStr>],
+    cwd: Option<&Path>,
+    env: Option<&HashMap<String, String>>,
+) -> Command {
     let (cmd, args) = match input {
         [] => panic!("empty command"),
         [cmd, args @ ..] => (cmd, args),
@@ -14,6 +19,9 @@ fn get_command_inner(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Command
     if let Some(cwd) = cwd {
         command.current_dir(cwd);
     }
+    if let Some(env) = env {
+        command.envs(env.iter().map(|(k, v)| (k.as_str(), v.as_str())));
+    }
     command
 }
 
@@ -27,7 +35,8 @@ fn check_exit_status(
     } else {
         Err(format!(
             "Command `{}`{} exited with status {:?}",
-            input.iter()
+            input
+                .iter()
                 .map(|s| s.as_ref().to_str().unwrap())
                 .collect::<Vec<_>>()
                 .join(" "),
@@ -41,21 +50,27 @@ fn check_exit_status(
 fn command_error<D: Debug>(input: &[&dyn AsRef<OsStr>], cwd: &Option<&Path>, error: D) -> String {
     format!(
         "Command `{}`{} failed to run: {error:?}",
-        input.iter()
+        input
+            .iter()
             .map(|s| s.as_ref().to_str().unwrap())
             .collect::<Vec<_>>()
             .join(" "),
         cwd.as_ref()
-            .map(|cwd| format!(
-                " (running in folder `{}`)",
-                cwd.display(),
-            ))
+            .map(|cwd| format!(" (running in folder `{}`)", cwd.display(),))
             .unwrap_or_default(),
     )
 }
 
 pub fn run_command(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Result<Output, String> {
-    let output = get_command_inner(input, cwd)
+    run_command_with_env(input, cwd, None)
+}
+
+pub fn run_command_with_env(
+    input: &[&dyn AsRef<OsStr>],
+    cwd: Option<&Path>,
+    env: Option<&HashMap<String, String>>,
+) -> Result<Output, String> {
+    let output = get_command_inner(input, cwd, env)
         .output()
         .map_err(|e| command_error(input, &cwd, e))?;
     check_exit_status(input, cwd, output.status)?;
@@ -65,8 +80,10 @@ pub fn run_command(input: &[&dyn AsRef<OsStr>], cwd: Option<&Path>) -> Result<Ou
 pub fn run_command_with_output(
     input: &[&dyn AsRef<OsStr>],
     cwd: Option<&Path>,
+    env: Option<&HashMap<String, String>>,
 ) -> Result<(), String> {
-    let exit_status = get_command_inner(input, cwd).spawn()
+    let exit_status = get_command_inner(input, cwd, env)
+        .spawn()
         .map_err(|e| command_error(input, &cwd, e))?
         .wait()
         .map_err(|e| command_error(input, &cwd, e))?;
@@ -94,12 +111,69 @@ pub fn cargo_install(to_install: &str) -> Result<(), String> {
         return Ok(());
     }
     // We voluntarily ignore this error.
-    if run_command_with_output(&[&"cargo", &"install", &to_install], None).is_err() {
+    if run_command_with_output(&[&"cargo", &"install", &to_install], None, None).is_err() {
         println!("Skipping installation of `{to_install}`");
     }
     Ok(())
 }
 
+pub fn get_os_name() -> Result<String, String> {
+    let output = run_command(&[&"uname"], None)?;
+    let name = std::str::from_utf8(&output.stdout)
+        .unwrap_or("")
+        .trim()
+        .to_owned();
+    if !name.is_empty() {
+        Ok(name)
+    } else {
+        Err(format!("Failed to retrieve the OS name"))
+    }
+}
+
+pub fn get_rustc_host_triple() -> Result<String, String> {
+    let output = run_command(&[&"rustc", &"-vV"], None)?;
+    let content = std::str::from_utf8(&output.stdout).unwrap_or("");
+
+    for line in content.split('\n').map(|line| line.trim()) {
+        if !line.starts_with("host:") {
+            continue;
+        }
+        return Ok(line.split(':').nth(1).unwrap().trim().to_owned());
+    }
+    Err("Cannot find host triple".to_owned())
+}
+
+pub fn get_gcc_path() -> Result<String, String> {
+    let content = match fs::read_to_string("gcc_path") {
+        Ok(c) => c,
+        Err(_) => {
+            return Err(
+                "Please put the path to your custom build of libgccjit in the file \
+                   `gcc_path`, see Readme.md for details"
+                    .into(),
+            )
+        }
+    };
+    match content
+        .split('\n')
+        .map(|l| l.trim())
+        .filter(|l| !l.is_empty())
+        .next()
+    {
+        Some(gcc_path) => {
+            let path = Path::new(gcc_path);
+            if !path.exists() {
+                Err(format!(
+                    "Path `{gcc_path}` contained in the `gcc_path` file doesn't exist"
+                ))
+            } else {
+                Ok(gcc_path.into())
+            }
+        }
+        None => Err("No path found in `gcc_path` file".into()),
+    }
+}
+
 pub struct CloneResult {
     pub ran_clone: bool,
     pub repo_name: String,
@@ -116,11 +190,17 @@ pub fn git_clone(to_clone: &str, dest: Option<&Path>) -> Result<CloneResult, Str
         .map(|dest| dest.join(&repo_name))
         .unwrap_or_else(|| Path::new(&repo_name).into());
     if dest.is_dir() {
-        return Ok(CloneResult { ran_clone: false, repo_name });
+        return Ok(CloneResult {
+            ran_clone: false,
+            repo_name,
+        });
     }
 
-    run_command_with_output(&[&"git", &"clone", &to_clone, &dest], None)?;
-    Ok(CloneResult { ran_clone: true, repo_name })
+    run_command_with_output(&[&"git", &"clone", &to_clone, &dest], None, None)?;
+    Ok(CloneResult {
+        ran_clone: true,
+        repo_name,
+    })
 }
 
 pub fn walk_dir<P, D, F>(dir: P, mut dir_cb: D, mut file_cb: F) -> Result<(), String>
@@ -130,8 +210,11 @@ where
     F: FnMut(&Path) -> Result<(), String>,
 {
     let dir = dir.as_ref();
-    for entry in fs::read_dir(dir).map_err(|e| format!("Failed to read dir `{}`: {e:?}", dir.display()))? {
-        let entry = entry.map_err(|e| format!("Failed to read entry in `{}`: {e:?}", dir.display()))?;
+    for entry in
+        fs::read_dir(dir).map_err(|e| format!("Failed to read dir `{}`: {e:?}", dir.display()))?
+    {
+        let entry =
+            entry.map_err(|e| format!("Failed to read entry in `{}`: {e:?}", dir.display()))?;
         let entry_path = entry.path();
         if entry_path.is_dir() {
             dir_cb(&entry_path)?;
diff --git a/config.sh b/config.sh
index ecc6d56b00ec..c686df0c72a2 100644
--- a/config.sh
+++ b/config.sh
@@ -48,7 +48,7 @@ fi
 export RUSTFLAGS="$CG_RUSTFLAGS $linker -Csymbol-mangling-version=v0 -Cdebuginfo=2 $disable_lto_flags -Zcodegen-backend=$(pwd)/target/${CHANNEL:-debug}/librustc_codegen_gcc.$dylib_ext --sysroot $(pwd)/build_sysroot/sysroot $TEST_FLAGS"
 
 # FIXME(antoyo): remove once the atomic shim is gone
-if [[ `uname` == 'Darwin' ]]; then
+if [[ unamestr == 'Darwin' ]]; then
    export RUSTFLAGS="$RUSTFLAGS -Clink-arg=-undefined -Clink-arg=dynamic_lookup"
 fi
 

From 33e1daa51b5e934675fe3ed2877db9456e8be625 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 4 Oct 2023 16:01:02 +0200
Subject: [PATCH 396/997] Improve code

---
 build_system/src/build.rs      | 105 +++++++++++++++++++--------------
 build_system/src/config.rs     |  84 +++++++++++++-------------
 build_system/src/prepare.rs    |  25 ++++----
 build_system/src/rustc_info.rs |   2 +-
 build_system/src/utils.rs      |  46 ++++++++++-----
 5 files changed, 147 insertions(+), 115 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 58c36412ea52..e2819c37ad9b 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -1,5 +1,7 @@
 use crate::config::set_config;
-use crate::utils::{get_gcc_path, run_command_with_env, run_command_with_output, walk_dir};
+use crate::utils::{
+    get_gcc_path, run_command, run_command_with_env, run_command_with_output_and_env, walk_dir,
+};
 use std::collections::HashMap;
 use std::ffi::OsStr;
 use std::fs;
@@ -9,7 +11,6 @@ use std::path::Path;
 struct BuildArg {
     codegen_release_channel: bool,
     sysroot_release_channel: bool,
-    no_default_features: bool,
     features: Vec<String>,
     gcc_path: String,
 }
@@ -21,27 +22,31 @@ impl BuildArg {
             gcc_path,
             ..Default::default()
         };
+        // We skip binary name and the `build` command.
         let mut args = std::env::args().skip(2);
 
         while let Some(arg) = args.next() {
             match arg.as_str() {
                 "--release" => build_arg.codegen_release_channel = true,
                 "--release-sysroot" => build_arg.sysroot_release_channel = true,
-                "--no-default-features" => build_arg.no_default_features = true,
+                "--no-default-features" => {
+                    build_arg.features.push("--no-default-features".to_string());
+                }
                 "--features" => {
                     if let Some(arg) = args.next() {
+                        build_arg.features.push("--features".to_string());
                         build_arg.features.push(arg.as_str().into());
                     } else {
-                        return Err(format!(
-                            "Expected a value after `--features`, found nothing"
-                        ));
+                        return Err(
+                            "Expected a value after `--features`, found nothing".to_string()
+                        );
                     }
                 }
                 "--help" => {
                     Self::usage();
                     return Ok(None);
                 }
-                a => return Err(format!("Unknown argument `{a}`")),
+                arg => return Err(format!("Unknown argument `{}`", arg)),
             }
         }
         Ok(Some(build_arg))
@@ -68,37 +73,37 @@ fn build_sysroot(
     target_triple: &str,
 ) -> Result<(), String> {
     std::env::set_current_dir("build_sysroot")
-        .map_err(|e| format!("Failed to go to `build_sysroot` directory: {e:?}"))?;
+        .map_err(|error| format!("Failed to go to `build_sysroot` directory: {:?}", error))?;
     // Cleanup for previous run
-    //     v Clean target dir except for build scripts and incremental cache
-   let _e = walk_dir(
+    // Clean target dir except for build scripts and incremental cache
+    let _ = walk_dir(
         "target",
         |dir: &Path| {
             for top in &["debug", "release"] {
-                let _e = fs::remove_dir_all(dir.join(top).join("build"));
-                let _e = fs::remove_dir_all(dir.join(top).join("deps"));
-                let _e = fs::remove_dir_all(dir.join(top).join("examples"));
-                let _e = fs::remove_dir_all(dir.join(top).join("native"));
+                let _ = fs::remove_dir_all(dir.join(top).join("build"));
+                let _ = fs::remove_dir_all(dir.join(top).join("deps"));
+                let _ = fs::remove_dir_all(dir.join(top).join("examples"));
+                let _ = fs::remove_dir_all(dir.join(top).join("native"));
 
-                let _e = walk_dir(
+                let _ = walk_dir(
                     dir.join(top),
                     |sub_dir: &Path| {
                         if sub_dir
                             .file_name()
-                            .map(|s| s.to_str().unwrap().starts_with("libsysroot"))
+                            .map(|filename| filename.to_str().unwrap().starts_with("libsysroot"))
                             .unwrap_or(false)
                         {
-                            let _e = fs::remove_dir_all(sub_dir);
+                            let _ = fs::remove_dir_all(sub_dir);
                         }
                         Ok(())
                     },
                     |file: &Path| {
                         if file
                             .file_name()
-                            .map(|s| s.to_str().unwrap().starts_with("libsysroot"))
+                            .map(|filename| filename.to_str().unwrap().starts_with("libsysroot"))
                             .unwrap_or(false)
                         {
-                            let _e = fs::remove_file(file);
+                            let _ = fs::remove_file(file);
                         }
                         Ok(())
                     },
@@ -109,21 +114,21 @@ fn build_sysroot(
         |_| Ok(()),
     );
 
-    let _e = fs::remove_file("Cargo.lock");
-    let _e = fs::remove_file("test_target/Cargo.lock");
-    let _e = fs::remove_dir_all("sysroot");
+    let _ = fs::remove_file("Cargo.lock");
+    let _ = fs::remove_file("test_target/Cargo.lock");
+    let _ = fs::remove_dir_all("sysroot");
 
     // Builds libs
     let channel = if release_mode {
         let rustflags = env
-            .get(&"RUSTFLAGS".to_owned())
+            .get("RUSTFLAGS")
             .cloned()
             .unwrap_or_default();
         env.insert(
-            "RUSTFLAGS".to_owned(),
-            format!("{rustflags} -Zmir-opt-level=3"),
+            "RUSTFLAGS".to_string(),
+            format!("{} -Zmir-opt-level=3", rustflags),
         );
-        run_command_with_output(
+        run_command_with_output_and_env(
             &[
                 &"cargo",
                 &"build",
@@ -136,7 +141,7 @@ fn build_sysroot(
         )?;
         "release"
     } else {
-        run_command_with_output(
+        run_command_with_output_and_env(
             &[
                 &"cargo",
                 &"build",
@@ -152,12 +157,14 @@ fn build_sysroot(
     };
 
     // Copy files to sysroot
-    let sysroot_path = format!("sysroot/lib/rustlib/{target_triple}/lib/");
+    let sysroot_path = format!("sysroot/lib/rustlib/{}/lib/", target_triple);
     fs::create_dir_all(&sysroot_path)
-        .map_err(|e| format!("Failed to create directory `{sysroot_path}`: {e:?}"))?;
-    let copier = |d: &Path| run_command_with_output(&[&"cp", &"-r", &d, &sysroot_path], None, None);
+        .map_err(|error| format!("Failed to create directory `{}`: {:?}", sysroot_path, error))?;
+    let copier = |dir_to_copy: &Path| {
+        run_command(&[&"cp", &"-r", &dir_to_copy, &sysroot_path], None).map(|_| ())
+    };
     walk_dir(
-        &format!("target/{target_triple}/{channel}/deps"),
+        &format!("target/{}/{}/deps", target_triple, channel),
         copier,
         copier,
     )?;
@@ -169,21 +176,25 @@ fn build_codegen(args: &BuildArg) -> Result<(), String> {
     let mut env = HashMap::new();
 
     let current_dir =
-        std::env::current_dir().map_err(|e| format!("`current_dir` failed: {e:?}"))?;
-    env.insert(
-        "RUST_COMPILER_RT_ROOT".to_owned(),
-        format!("{}", current_dir.join("llvm/compiler-rt").display()),
-    );
-    env.insert("LD_LIBRARY_PATH".to_owned(), args.gcc_path.clone());
-    env.insert("LIBRARY_PATH".to_owned(), args.gcc_path.clone());
+        std::env::current_dir().map_err(|error| format!("`current_dir` failed: {:?}", error))?;
+    if let Ok(rt_root) = std::env::var("RUST_COMPILER_RT_ROOT") {
+        env.insert("RUST_COMPILER_RT_ROOT".to_string(), rt_root);
+    } else {
+        env.insert(
+            "RUST_COMPILER_RT_ROOT".to_string(),
+            format!("{}", current_dir.join("llvm/compiler-rt").display()),
+        );
+    }
+    env.insert("LD_LIBRARY_PATH".to_string(), args.gcc_path.clone());
+    env.insert("LIBRARY_PATH".to_string(), args.gcc_path.clone());
 
     let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"rustc"];
     if args.codegen_release_channel {
         command.push(&"--release");
-        env.insert("CHANNEL".to_owned(), "release".to_owned());
-        env.insert("CARGO_INCREMENTAL".to_owned(), "1".to_owned());
+        env.insert("CHANNEL".to_string(), "release".to_string());
+        env.insert("CARGO_INCREMENTAL".to_string(), "1".to_string());
     } else {
-        env.insert("CHANNEL".to_owned(), "debug".to_owned());
+        env.insert("CHANNEL".to_string(), "debug".to_string());
     }
     let ref_features = args.features.iter().map(|s| s.as_str()).collect::<Vec<_>>();
     for feature in &ref_features {
@@ -194,10 +205,14 @@ fn build_codegen(args: &BuildArg) -> Result<(), String> {
     let config = set_config(&mut env, &[], Some(&args.gcc_path))?;
 
     // We voluntarily ignore the error.
-    let _e = fs::remove_dir_all("target/out");
+    let _ = fs::remove_dir_all("target/out");
     let gccjit_target = "target/out/gccjit";
-    fs::create_dir_all(gccjit_target)
-        .map_err(|e| format!("Failed to create directory `{gccjit_target}`: {e:?}"))?;
+    fs::create_dir_all(gccjit_target).map_err(|error| {
+        format!(
+            "Failed to create directory `{}`: {:?}",
+            gccjit_target, error
+        )
+    })?;
 
     println!("[BUILD] sysroot");
     build_sysroot(
@@ -210,7 +225,7 @@ fn build_codegen(args: &BuildArg) -> Result<(), String> {
 
 pub fn run() -> Result<(), String> {
     let args = match BuildArg::new()? {
-        Some(a) => a,
+        Some(args) => args,
         None => return Ok(()),
     };
     build_codegen(&args)?;
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 5160eb2ecae7..4f2e33f0f998 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -14,19 +14,19 @@ pub fn set_config(
     test_flags: &[String],
     gcc_path: Option<&str>,
 ) -> Result<ConfigInfo, String> {
-    env.insert("CARGO_INCREMENTAL".to_owned(), "0".to_owned());
+    env.insert("CARGO_INCREMENTAL".to_string(), "0".to_string());
 
     let gcc_path = match gcc_path {
-        Some(g) => g.to_owned(),
+        Some(path) => path.to_string(),
         None => get_gcc_path()?,
     };
-    env.insert("GCC_PATH".to_owned(), gcc_path.clone());
+    env.insert("GCC_PATH".to_string(), gcc_path.clone());
 
     let os_name = get_os_name()?;
     let dylib_ext = match os_name.as_str() {
         "Linux" => "so",
         "Darwin" => "dylib",
-        os => return Err(format!("unsupported OS `{os}`")),
+        os => return Err(format!("unsupported OS `{}`", os)),
     };
     let host_triple = get_rustc_host_triple()?;
     let mut linker = None;
@@ -44,77 +44,81 @@ pub fn set_config(
             linker = Some("-Clinker=aarch64-linux-gnu-gcc");
             run_wrapper = Some("qemu-aarch64 -L /usr/aarch64-linux-gnu");
         } else {
-            return Err(format!("unknown non-native platform `{target_triple}`"));
+            return Err(format!("unknown non-native platform `{}`", target_triple));
         }
     }
-    // Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
-    // TODO(antoyo): remove when we can handle ThinLTO.
-    let disable_lto_lfags = "-Clto=off";
-    let current_dir = std_env::current_dir().map_err(|e| format!("`current_dir` failed: {e:?}"))?;
+    let current_dir =
+        std_env::current_dir().map_err(|error| format!("`current_dir` failed: {:?}", error))?;
+    let channel = if let Some(channel) = env.get("CHANNEL") {
+        channel.as_str()
+    } else {
+        "debug"
+    };
     let cg_backend_path = current_dir
         .join("target")
-        .join(if let Some(channel) = env.get(&"CHANNEL".to_owned()) {
-            channel.as_str()
-        } else {
-            "debug"
-        })
-        .join(&format!("librustc_codegen_gcc.{dylib_ext}"));
+        .join(channel)
+        .join(&format!("librustc_codegen_gcc.{}", dylib_ext));
     let sysroot_path = current_dir.join("build_sysroot/sysroot");
     let mut rustflags = Vec::new();
-    if let Some(cg_rustflags) = env.get(&"CG_RUSTFLAGS".to_owned()) {
+    if let Some(cg_rustflags) = env.get("CG_RUSTFLAGS") {
         rustflags.push(cg_rustflags.clone());
     }
     if let Some(linker) = linker {
-        rustflags.push(linker.to_owned());
+        rustflags.push(linker.to_string());
     }
     rustflags.extend_from_slice(&[
-        "-Csymbol-mangling-version=v0".to_owned(),
-        "-Cdebuginfo=2".to_owned(),
-        disable_lto_lfags.to_owned(),
+        "-Csymbol-mangling-version=v0".to_string(),
+        "-Cdebuginfo=2".to_string(),
         format!("-Zcodegen-backend={}", cg_backend_path.display()),
-        "--sysroot".to_owned(),
-        format!("{}", sysroot_path.display()),
+        "--sysroot".to_string(),
+        sysroot_path.display().to_string(),
     ]);
+
+    // Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
+    // TODO(antoyo): remove when we can handle ThinLTO.
+    if !env.contains_key(&"FAT_LTO".to_string()) {
+        rustflags.push("-Clto=off".to_string());
+    }
     rustflags.extend_from_slice(test_flags);
     // FIXME(antoyo): remove once the atomic shim is gone
     if os_name == "Darwin" {
         rustflags.extend_from_slice(&[
-            "-Clink-arg=-undefined".to_owned(),
-            "-Clink-arg=dynamic_lookup".to_owned(),
+            "-Clink-arg=-undefined".to_string(),
+            "-Clink-arg=dynamic_lookup".to_string(),
         ]);
     }
-    env.insert("RUSTFLAGS".to_owned(), rustflags.join(" "));
+    env.insert("RUSTFLAGS".to_string(), rustflags.join(" "));
     // display metadata load errors
-    env.insert("RUSTC_LOG".to_owned(), "warn".to_owned());
+    env.insert("RUSTC_LOG".to_string(), "warn".to_string());
 
+    let sysroot = current_dir.join(&format!(
+        "build_sysroot/sysroot/lib/rustlib/{}/lib",
+        target_triple
+    ));
     let ld_library_path = format!(
         "{target}:{sysroot}:{gcc_path}",
         target = current_dir.join("target/out").display(),
-        sysroot = current_dir
-            .join(&format!(
-                "build_sysroot/sysroot/lib/rustlib/{target_triple}/lib"
-            ),)
-            .display(),
+        sysroot = sysroot.display(),
     );
-    env.insert("LD_LIBRARY_PATH".to_owned(), ld_library_path.clone());
-    env.insert("DYLD_LIBRARY_PATH".to_owned(), ld_library_path);
+    env.insert("LD_LIBRARY_PATH".to_string(), ld_library_path.clone());
+    env.insert("DYLD_LIBRARY_PATH".to_string(), ld_library_path);
 
     // NOTE: To avoid the -fno-inline errors, use /opt/gcc/bin/gcc instead of cc.
     // To do so, add a symlink for cc to /opt/gcc/bin/gcc in our PATH.
     // Another option would be to add the following Rust flag: -Clinker=/opt/gcc/bin/gcc
     let path = std::env::var("PATH").unwrap_or_default();
-    env.insert("PATH".to_owned(), format!("/opt/gcc/bin:{path}"));
+    env.insert("PATH".to_string(), format!("/opt/gcc/bin:{}", path));
 
-    let mut rustc_command = vec!["rustc".to_owned()];
+    let mut rustc_command = vec!["rustc".to_string()];
     rustc_command.extend_from_slice(&rustflags);
     rustc_command.extend_from_slice(&[
-        "-L".to_owned(),
-        "crate=target/out".to_owned(),
-        "--out-dir".to_owned(),
-        "target/out".to_owned(),
+        "-L".to_string(),
+        "crate=target/out".to_string(),
+        "--out-dir".to_string(),
+        "target/out".to_string(),
     ]);
     Ok(ConfigInfo {
-        target_triple: target_triple.to_owned(),
+        target_triple: target_triple.to_string(),
         rustc_command,
         run_wrapper,
     })
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 6274628378e2..b258ddf36648 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -7,7 +7,7 @@ use std::path::Path;
 fn prepare_libcore(sysroot_path: &Path) -> Result<(), String> {
     let rustc_path = match get_rustc_path() {
         Some(path) => path,
-        None => return Err("`rustc` path not found".to_owned()),
+        None => return Err("`rustc` path not found".to_string()),
     };
 
     let parent = match rustc_path.parent() {
@@ -18,27 +18,28 @@ fn prepare_libcore(sysroot_path: &Path) -> Result<(), String> {
     let rustlib_dir = parent
         .join("../lib/rustlib/src/rust")
         .canonicalize()
-        .map_err(|e| format!("Failed to canonicalize path: {e:?}"))?;
+        .map_err(|error| format!("Failed to canonicalize path: {:?}", error))?;
     if !rustlib_dir.is_dir() {
-        return Err("Please install `rust-src` component".to_owned());
+        return Err("Please install `rust-src` component".to_string());
     }
 
     let sysroot_dir = sysroot_path.join("sysroot_src");
     if sysroot_dir.is_dir() {
-        if let Err(e) = fs::remove_dir_all(&sysroot_dir) {
+        if let Err(error) = fs::remove_dir_all(&sysroot_dir) {
             return Err(format!(
                 "Failed to remove `{}`: {:?}",
                 sysroot_dir.display(),
-                e
+                error,
             ));
         }
     }
 
     let sysroot_library_dir = sysroot_dir.join("library");
-    fs::create_dir_all(&sysroot_library_dir).map_err(|e| {
+    fs::create_dir_all(&sysroot_library_dir).map_err(|error| {
         format!(
-            "Failed to create folder `{}`: {e:?}",
+            "Failed to create folder `{}`: {:?}",
             sysroot_library_dir.display(),
+            error,
         )
     })?;
 
@@ -90,8 +91,8 @@ fn prepare_libcore(sysroot_path: &Path) -> Result<(), String> {
     for file_path in patches {
         println!("[GIT] apply `{}`", file_path.display());
         let path = Path::new("../..").join(file_path);
-        run_command_with_output(&[&"git", &"apply", &path], Some(&sysroot_dir), None)?;
-        run_command_with_output(&[&"git", &"add", &"-A"], Some(&sysroot_dir), None)?;
+        run_command_with_output(&[&"git", &"apply", &path], Some(&sysroot_dir))?;
+        run_command_with_output(&[&"git", &"add", &"-A"], Some(&sysroot_dir))?;
         run_command_with_output(
             &[
                 &"git",
@@ -101,7 +102,6 @@ fn prepare_libcore(sysroot_path: &Path) -> Result<(), String> {
                 &format!("Patch {}", path.display()),
             ],
             Some(&sysroot_dir),
-            None,
         )?;
     }
     println!("Successfully prepared libcore for building");
@@ -139,12 +139,11 @@ where
         "crate_patches",
         |_| Ok(()),
         |file_path| {
-            let s = file_path.as_os_str().to_str().unwrap();
-            if s.contains(&filter) && s.ends_with(".patch") {
+            let patch = file_path.as_os_str().to_str().unwrap();
+            if patch.contains(&filter) && patch.ends_with(".patch") {
                 run_command_with_output(
                     &[&"git", &"am", &file_path.canonicalize().unwrap()],
                     Some(&repo_path),
-                    None,
                 )?;
             }
             Ok(())
diff --git a/build_system/src/rustc_info.rs b/build_system/src/rustc_info.rs
index 38c0045c7b30..0988b56d81eb 100644
--- a/build_system/src/rustc_info.rs
+++ b/build_system/src/rustc_info.rs
@@ -8,5 +8,5 @@ pub fn get_rustc_path() -> Option<PathBuf> {
     }
     run_command(&[&"rustup", &"which", &"rustc"], None)
         .ok()
-        .map(|out| Path::new(String::from_utf8(out.stdout).unwrap().trim()).to_owned())
+        .map(|out| Path::new(String::from_utf8(out.stdout).unwrap().trim()).to_path_buf())
 }
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 1724e2755959..536f33a80293 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -80,6 +80,19 @@ pub fn run_command_with_env(
 pub fn run_command_with_output(
     input: &[&dyn AsRef<OsStr>],
     cwd: Option<&Path>,
+) -> Result<(), String> {
+    let exit_status = get_command_inner(input, cwd, None)
+        .spawn()
+        .map_err(|e| command_error(input, &cwd, e))?
+        .wait()
+        .map_err(|e| command_error(input, &cwd, e))?;
+    check_exit_status(input, cwd, exit_status)?;
+    Ok(())
+}
+
+pub fn run_command_with_output_and_env(
+    input: &[&dyn AsRef<OsStr>],
+    cwd: Option<&Path>,
     env: Option<&HashMap<String, String>>,
 ) -> Result<(), String> {
     let exit_status = get_command_inner(input, cwd, env)
@@ -111,7 +124,7 @@ pub fn cargo_install(to_install: &str) -> Result<(), String> {
         return Ok(());
     }
     // We voluntarily ignore this error.
-    if run_command_with_output(&[&"cargo", &"install", &to_install], None, None).is_err() {
+    if run_command_with_output(&[&"cargo", &"install", &to_install], None).is_err() {
         println!("Skipping installation of `{to_install}`");
     }
     Ok(())
@@ -122,11 +135,11 @@ pub fn get_os_name() -> Result<String, String> {
     let name = std::str::from_utf8(&output.stdout)
         .unwrap_or("")
         .trim()
-        .to_owned();
+        .to_string();
     if !name.is_empty() {
         Ok(name)
     } else {
-        Err(format!("Failed to retrieve the OS name"))
+        Err("Failed to retrieve the OS name".to_string())
     }
 }
 
@@ -138,14 +151,14 @@ pub fn get_rustc_host_triple() -> Result<String, String> {
         if !line.starts_with("host:") {
             continue;
         }
-        return Ok(line.split(':').nth(1).unwrap().trim().to_owned());
+        return Ok(line.split(':').nth(1).unwrap().trim().to_string());
     }
-    Err("Cannot find host triple".to_owned())
+    Err("Cannot find host triple".to_string())
 }
 
 pub fn get_gcc_path() -> Result<String, String> {
     let content = match fs::read_to_string("gcc_path") {
-        Ok(c) => c,
+        Ok(content) => content,
         Err(_) => {
             return Err(
                 "Please put the path to your custom build of libgccjit in the file \
@@ -156,15 +169,16 @@ pub fn get_gcc_path() -> Result<String, String> {
     };
     match content
         .split('\n')
-        .map(|l| l.trim())
-        .filter(|l| !l.is_empty())
+        .map(|line| line.trim())
+        .filter(|line| !line.is_empty())
         .next()
     {
         Some(gcc_path) => {
             let path = Path::new(gcc_path);
             if !path.exists() {
                 Err(format!(
-                    "Path `{gcc_path}` contained in the `gcc_path` file doesn't exist"
+                    "Path `{}` contained in the `gcc_path` file doesn't exist",
+                    gcc_path,
                 ))
             } else {
                 Ok(gcc_path.into())
@@ -182,8 +196,8 @@ pub struct CloneResult {
 pub fn git_clone(to_clone: &str, dest: Option<&Path>) -> Result<CloneResult, String> {
     let repo_name = to_clone.split('/').last().unwrap();
     let repo_name = match repo_name.strip_suffix(".git") {
-        Some(n) => n.to_owned(),
-        None => repo_name.to_owned(),
+        Some(n) => n.to_string(),
+        None => repo_name.to_string(),
     };
 
     let dest = dest
@@ -196,7 +210,7 @@ pub fn git_clone(to_clone: &str, dest: Option<&Path>) -> Result<CloneResult, Str
         });
     }
 
-    run_command_with_output(&[&"git", &"clone", &to_clone, &dest], None, None)?;
+    run_command_with_output(&[&"git", &"clone", &to_clone, &dest], None)?;
     Ok(CloneResult {
         ran_clone: true,
         repo_name,
@@ -210,11 +224,11 @@ where
     F: FnMut(&Path) -> Result<(), String>,
 {
     let dir = dir.as_ref();
-    for entry in
-        fs::read_dir(dir).map_err(|e| format!("Failed to read dir `{}`: {e:?}", dir.display()))?
+    for entry in fs::read_dir(dir)
+        .map_err(|error| format!("Failed to read dir `{}`: {:?}", dir.display(), error))?
     {
-        let entry =
-            entry.map_err(|e| format!("Failed to read entry in `{}`: {e:?}", dir.display()))?;
+        let entry = entry
+            .map_err(|error| format!("Failed to read entry in `{}`: {:?}", dir.display(), error))?;
         let entry_path = entry.path();
         if entry_path.is_dir() {
             dir_cb(&entry_path)?;

From b3fecae7d736eeb9e4170563b1bc0f4511e58125 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 7 Oct 2023 15:14:54 -0400
Subject: [PATCH 397/997] Fix 128-bit non-native integers comparison

---
 Readme.md  |  2 ++
 src/int.rs | 68 +++++++++++++++++++++++++++++++++++++++++++-----------
 2 files changed, 56 insertions(+), 14 deletions(-)

diff --git a/Readme.md b/Readme.md
index 060f7c0326d4..78a7b2d75d5e 100644
--- a/Readme.md
+++ b/Readme.md
@@ -113,6 +113,8 @@ $ LIBRARY_PATH=$(cat gcc_path) LD_LIBRARY_PATH=$(cat gcc_path) rustc +$(cat $CG_
     <dd>Display the time it took to perform codegen for a crate</dd>
     <dt>CG_RUSTFLAGS</dt>
     <dd>Send additional flags to rustc. Can be used to build the sysroot without unwinding by setting `CG_RUSTFLAGS=-Cpanic=abort`.</dd>
+    <dt>CG_GCCJIT_DUMP_TO_FILE</dt>
+    <dd>Dump a C-like representation to /tmp/gccjit_dumps and enable debug info in order to debug this C-like representation.</dd>
 </dl>
 
 ## Licensing
diff --git a/src/int.rs b/src/int.rs
index 2a6b1d17a3e5..4422162828d4 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -353,23 +353,63 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         (res.dereference(None).to_rvalue(), overflow)
     }
 
-    pub fn gcc_icmp(&self, op: IntPredicate, mut lhs: RValue<'gcc>, mut rhs: RValue<'gcc>) -> RValue<'gcc> {
+    pub fn gcc_icmp(&mut self, op: IntPredicate, mut lhs: RValue<'gcc>, mut rhs: RValue<'gcc>) -> RValue<'gcc> {
         let a_type = lhs.get_type();
         let b_type = rhs.get_type();
         if self.is_non_native_int_type(a_type) || self.is_non_native_int_type(b_type) {
-            let signed = a_type.is_compatible_with(self.i128_type);
-            let sign =
-                if signed {
-                    ""
-                }
-                else {
-                    "u"
-                };
-            let func_name = format!("__{}cmpti2", sign);
-            let param_a = self.context.new_parameter(None, a_type, "a");
-            let param_b = self.context.new_parameter(None, b_type, "b");
-            let func = self.context.new_function(None, FunctionType::Extern, self.int_type, &[param_a, param_b], func_name, false);
-            let cmp = self.context.new_call(None, func, &[lhs, rhs]);
+            // This algorithm is based on compiler-rt's __cmpti2:
+            // https://github.com/llvm-mirror/compiler-rt/blob/f0745e8476f069296a7c71accedd061dce4cdf79/lib/builtins/cmpti2.c#L21
+            let result = self.current_func().new_local(None, self.int_type, "icmp_result");
+            let block1 = self.current_func().new_block("block1");
+            let block2 = self.current_func().new_block("block2");
+            let block3 = self.current_func().new_block("block3");
+            let block4 = self.current_func().new_block("block4");
+            let block5 = self.current_func().new_block("block5");
+            let block6 = self.current_func().new_block("block6");
+            let block7 = self.current_func().new_block("block7");
+            let block8 = self.current_func().new_block("block8");
+            let after = self.current_func().new_block("after");
+
+            let native_int_type = a_type.dyncast_array().expect("get element type");
+            // NOTE: cast low to its unsigned type in order to perform a comparison correctly (e.g.
+            // the sign is only on high).
+            let unsigned_type = native_int_type.to_unsigned(&self.cx);
+
+            let lhs_low = self.context.new_cast(None, self.low(lhs), unsigned_type);
+            let rhs_low = self.context.new_cast(None, self.low(rhs), unsigned_type);
+
+            let condition = self.context.new_comparison(None, ComparisonOp::LessThan, self.high(lhs), self.high(rhs));
+            self.llbb().end_with_conditional(None, condition, block1, block2);
+
+            block1.add_assignment(None, result, self.context.new_rvalue_zero(self.int_type));
+            block1.end_with_jump(None, after);
+
+            let condition = self.context.new_comparison(None, ComparisonOp::GreaterThan, self.high(lhs), self.high(rhs));
+            block2.end_with_conditional(None, condition, block3, block4);
+
+            block3.add_assignment(None, result, self.context.new_rvalue_from_int(self.int_type, 2));
+            block3.end_with_jump(None, after);
+
+            let condition = self.context.new_comparison(None, ComparisonOp::LessThan, lhs_low, rhs_low);
+            block4.end_with_conditional(None, condition, block5, block6);
+
+            block5.add_assignment(None, result, self.context.new_rvalue_zero(self.int_type));
+            block5.end_with_jump(None, after);
+
+            let condition = self.context.new_comparison(None, ComparisonOp::GreaterThan, lhs_low, rhs_low);
+            block6.end_with_conditional(None, condition, block7, block8);
+
+            block7.add_assignment(None, result, self.context.new_rvalue_from_int(self.int_type, 2));
+            block7.end_with_jump(None, after);
+
+            block8.add_assignment(None, result, self.context.new_rvalue_one(self.int_type));
+            block8.end_with_jump(None, after);
+
+            // NOTE: since jumps were added in a place rustc does not expect, the current block in the
+            // state need to be updated.
+            self.switch_to_block(after);
+
+            let cmp = result.to_rvalue();
             let (op, limit) =
                 match op {
                     IntPredicate::IntEQ => {

From b3c10d4a7d01e46f609a1eb8b133d9985329a987 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 7 Oct 2023 15:15:02 -0400
Subject: [PATCH 398/997] Fix 128-bit non-native integers negation

---
 src/int.rs | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/src/int.rs b/src/int.rs
index 4422162828d4..58e0dd56f38d 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -36,7 +36,6 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             self.cx.context.new_unary_op(None, operation, typ, a)
         }
         else {
-            // TODO(antoyo): use __negdi2 and __negti2 instead?
             let element_type = typ.dyncast_array().expect("element type");
             let values = [
                 self.cx.context.new_unary_op(None, UnaryOp::BitwiseNegate, element_type, self.low(a)),
@@ -52,9 +51,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             self.cx.context.new_unary_op(None, UnaryOp::Minus, a.get_type(), a)
         }
         else {
-            let param_a = self.context.new_parameter(None, a_type, "a");
-            let func = self.context.new_function(None, FunctionType::Extern, a_type, &[param_a], "__negti2", false);
-            self.context.new_call(None, func, &[a])
+            self.gcc_add(self.gcc_not(a), self.gcc_int(a_type, 1))
         }
     }
 

From 237be9e0cb83101ba910a1fd62b3a56277cbfcd2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 8 Oct 2023 11:32:07 -0400
Subject: [PATCH 399/997] Update to nightly-2023-10-08

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index 1b60d7080077..25a1cea98cce 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2023-08-12"
+channel = "nightly-2023-10-08"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From bd7e5b9d4e58c6926b280c0657a9c723be25f4ed Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Oct 2023 08:28:06 -0400
Subject: [PATCH 400/997] Fix bitcast with different sizes

---
 src/type_of.rs | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/type_of.rs b/src/type_of.rs
index cc467801beba..c2eab295acd2 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -182,6 +182,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
     /// of that field's type - this is useful for taking the address of
     /// that field and ensuring the struct has the right alignment.
     fn gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc> {
+        use crate::rustc_middle::ty::layout::FnAbiOf;
         // This must produce the same result for `repr(transparent)` wrappers as for the inner type!
         // In other words, this should generally not look at the type at all, but only at the
         // layout.
@@ -191,7 +192,14 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
             if let Some(&ty) = cx.scalar_types.borrow().get(&self.ty) {
                 return ty;
             }
-            let ty = self.scalar_gcc_type_at(cx, scalar, Size::ZERO);
+            let ty =
+                match *self.ty.kind() {
+                    // NOTE: we cannot remove this match like in the LLVM codegen because the call
+                    // to fn_ptr_backend_type handle the on-stack attribute.
+                    // TODO(antoyo): find a less hackish way to hande the on-stack attribute.
+                    ty::FnPtr(sig) => cx.fn_ptr_backend_type(&cx.fn_abi_of_fn_ptr(sig, ty::List::empty())),
+                    _ => self.scalar_gcc_type_at(cx, scalar, Size::ZERO),
+                };
             cx.scalar_types.borrow_mut().insert(self.ty, ty);
             return ty;
         }

From e7f7fb87ddd9ddfa4c52c6b683a501a9ab3eba8b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Oct 2023 10:55:25 -0400
Subject: [PATCH 401/997] Fix tests

---
 tests/run/abort1.rs       | 2 +-
 tests/run/abort2.rs       | 2 +-
 tests/run/array.rs        | 2 +-
 tests/run/assign.rs       | 2 +-
 tests/run/closure.rs      | 2 +-
 tests/run/condition.rs    | 2 +-
 tests/run/fun_ptr.rs      | 2 +-
 tests/run/int_overflow.rs | 2 +-
 tests/run/mut_ref.rs      | 2 +-
 tests/run/operations.rs   | 2 +-
 tests/run/ptr_cast.rs     | 2 +-
 tests/run/slice.rs        | 2 +-
 tests/run/static.rs       | 2 +-
 13 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/tests/run/abort1.rs b/tests/run/abort1.rs
index 6cb3dd902030..44297e12779b 100644
--- a/tests/run/abort1.rs
+++ b/tests/run/abort1.rs
@@ -3,7 +3,7 @@
 // Run-time:
 //   status: signal
 
-#![feature(auto_traits, lang_items, no_core, start, intrinsics)]
+#![feature(auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
 #![allow(internal_features)]
 
 #![no_std]
diff --git a/tests/run/abort2.rs b/tests/run/abort2.rs
index b7a928166b8e..ce816927123d 100644
--- a/tests/run/abort2.rs
+++ b/tests/run/abort2.rs
@@ -3,7 +3,7 @@
 // Run-time:
 //   status: signal
 
-#![feature(auto_traits, lang_items, no_core, start, intrinsics)]
+#![feature(auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
 #![allow(internal_features)]
 
 #![no_std]
diff --git a/tests/run/array.rs b/tests/run/array.rs
index d2d60b75e63a..afd0eed82004 100644
--- a/tests/run/array.rs
+++ b/tests/run/array.rs
@@ -7,7 +7,7 @@
 //     5
 //     10
 
-#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics)]
+#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
 #![allow(internal_features)]
 
 #![no_std]
diff --git a/tests/run/assign.rs b/tests/run/assign.rs
index 241acea5e49c..5b0db2da294d 100644
--- a/tests/run/assign.rs
+++ b/tests/run/assign.rs
@@ -6,7 +6,7 @@
 //     10
 
 #![allow(internal_features, unused_attributes)]
-#![feature(auto_traits, lang_items, no_core, start, intrinsics, track_caller)]
+#![feature(auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs, track_caller)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/closure.rs b/tests/run/closure.rs
index 764c5b34426b..4ce528f86800 100644
--- a/tests/run/closure.rs
+++ b/tests/run/closure.rs
@@ -9,7 +9,7 @@
 //     Both args: 11
 
 #![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics,
-    unboxed_closures)]
+    unboxed_closures, rustc_attrs)]
 #![allow(internal_features)]
 
 #![no_std]
diff --git a/tests/run/condition.rs b/tests/run/condition.rs
index ed17c19409ee..1b3ae6dc004a 100644
--- a/tests/run/condition.rs
+++ b/tests/run/condition.rs
@@ -5,7 +5,7 @@
 //   stdout: true
 //     1
 
-#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics)]
+#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
 #![allow(internal_features)]
 
 #![no_std]
diff --git a/tests/run/fun_ptr.rs b/tests/run/fun_ptr.rs
index e0c30cada6be..960303597726 100644
--- a/tests/run/fun_ptr.rs
+++ b/tests/run/fun_ptr.rs
@@ -4,7 +4,7 @@
 //   status: 0
 //   stdout: 1
 
-#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics)]
+#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
 #![allow(internal_features)]
 
 #![no_std]
diff --git a/tests/run/int_overflow.rs b/tests/run/int_overflow.rs
index badcc0f76997..08fa087fccdf 100644
--- a/tests/run/int_overflow.rs
+++ b/tests/run/int_overflow.rs
@@ -5,7 +5,7 @@
 //   status: signal
 
 #![allow(internal_features, unused_attributes)]
-#![feature(auto_traits, lang_items, no_core, start, intrinsics)]
+#![feature(auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/mut_ref.rs b/tests/run/mut_ref.rs
index e843e2985373..194e55a3deae 100644
--- a/tests/run/mut_ref.rs
+++ b/tests/run/mut_ref.rs
@@ -8,7 +8,7 @@
 //     11
 
 #![allow(internal_features, unused_attributes)]
-#![feature(auto_traits, lang_items, no_core, start, intrinsics, track_caller)]
+#![feature(auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs, track_caller)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/operations.rs b/tests/run/operations.rs
index cac6fdfca4a1..2d781670873f 100644
--- a/tests/run/operations.rs
+++ b/tests/run/operations.rs
@@ -6,7 +6,7 @@
 //     10
 
 #![allow(internal_features, unused_attributes)]
-#![feature(auto_traits, lang_items, no_core, start, intrinsics, arbitrary_self_types)]
+#![feature(auto_traits, lang_items, no_core, start, intrinsics, arbitrary_self_types, rustc_attrs)]
 
 #![no_std]
 #![no_core]
diff --git a/tests/run/ptr_cast.rs b/tests/run/ptr_cast.rs
index 418661798286..09d77abe27cf 100644
--- a/tests/run/ptr_cast.rs
+++ b/tests/run/ptr_cast.rs
@@ -4,7 +4,7 @@
 //   status: 0
 //   stdout: 1
 
-#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics)]
+#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
 #![allow(internal_features)]
 
 #![no_std]
diff --git a/tests/run/slice.rs b/tests/run/slice.rs
index 25ff72549d49..1262c86c8109 100644
--- a/tests/run/slice.rs
+++ b/tests/run/slice.rs
@@ -4,7 +4,7 @@
 //   status: 0
 //   stdout: 5
 
-#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics)]
+#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
 #![allow(internal_features)]
 
 #![no_std]
diff --git a/tests/run/static.rs b/tests/run/static.rs
index 2457bb1f4430..0b933754c293 100644
--- a/tests/run/static.rs
+++ b/tests/run/static.rs
@@ -9,7 +9,7 @@
 //      12
 //      1
 
-#![feature(auto_traits, lang_items, no_core, start, intrinsics)]
+#![feature(auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
 #![allow(internal_features)]
 
 #![no_std]

From ad5637468e8cc1e3de1c8b9454dec01ae5b2b60a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Oct 2023 11:08:42 -0400
Subject: [PATCH 402/997] Add missing panic_in_cleanup

---
 example/mini_core.rs | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/example/mini_core.rs b/example/mini_core.rs
index 58df29bb6255..343285203432 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -429,6 +429,15 @@ fn panic_cannot_unwind() -> ! {
     }
 }
 
+#[lang = "panic_in_cleanup"]
+#[rustc_nounwind]
+fn panic_in_cleanup() -> ! {
+    unsafe {
+        libc::printf("panic in a destructor during cleanup\n\0" as *const str as *const i8);
+        intrinsics::abort();
+    }
+}
+
 #[lang = "panic_bounds_check"]
 #[track_caller]
 fn panic_bounds_check(index: usize, len: usize) -> ! {

From 3fe53587e428751d11a78247776768f90f6f4127 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Oct 2023 11:09:53 -0400
Subject: [PATCH 403/997] Add missing comma in alloc_system

---
 example/alloc_system.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/example/alloc_system.rs b/example/alloc_system.rs
index 3deef419f42e..56ff84e4bdfb 100644
--- a/example/alloc_system.rs
+++ b/example/alloc_system.rs
@@ -12,7 +12,7 @@
               target_arch = "mips",
               target_arch = "mips32r6",
               target_arch = "powerpc",
-              target_arch = "csky"
+              target_arch = "csky",
               target_arch = "powerpc64"))]
 const MIN_ALIGN: usize = 8;
 #[cfg(any(target_arch = "x86_64",

From 70834391ae427eb1870f2a9a09bce90a8f3b7ea7 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Oct 2023 11:27:43 -0400
Subject: [PATCH 404/997] Fix UI tests

---
 failing-ui-tests.txt | 3 +++
 test.sh              | 1 +
 2 files changed, 4 insertions(+)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 8ec151f78388..ed56a11a1709 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -68,3 +68,6 @@ tests/ui/lto/thin-lto-global-allocator.rs
 tests/ui/lto/msvc-imp-present.rs
 tests/ui/lto/lto-thin-rustc-loads-linker-plugin.rs
 tests/ui/lto/all-crates.rs
+tests/ui/async-await/deep-futures-are-freeze.rs
+tests/ui/closures/capture-unsized-by-ref.rs
+tests/ui/generator/resume-after-return.rs
diff --git a/test.sh b/test.sh
index 4655c920d2ec..e4cbd6fbcaff 100755
--- a/test.sh
+++ b/test.sh
@@ -359,6 +359,7 @@ function test_rustc() {
     git checkout tests/ui/macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs
     git checkout tests/ui/imports/ambiguous-1.rs
     git checkout tests/ui/imports/ambiguous-4-extern.rs
+    git checkout tests/ui/entry-point/auxiliary/bad_main_functions.rs
 
     RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot"
 

From a00ea0bf986be52723a7e8b47c444d281955ce28 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Oct 2023 13:03:23 -0400
Subject: [PATCH 405/997] Fix unchecked_sadd

---
 src/builder.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/builder.rs b/src/builder.rs
index 02d46654f04b..62bce7eb78ce 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -656,7 +656,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn unchecked_sadd(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        a + b
+        self.gcc_add(a, b)
     }
 
     fn unchecked_uadd(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {

From a7532daa76f4e3f79957862ee5e466dd2233d86d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 9 Oct 2023 13:16:47 -0400
Subject: [PATCH 406/997] Fix unchecked_ssub, unchecked_smul, and
 unchecked_umul

---
 src/builder.rs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 62bce7eb78ce..b78418089342 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -664,7 +664,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn unchecked_ssub(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        a - b
+        self.gcc_sub(a, b)
     }
 
     fn unchecked_usub(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -673,11 +673,11 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn unchecked_smul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        a * b
+        self.gcc_mul(a, b)
     }
 
     fn unchecked_umul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        a * b
+        self.gcc_mul(a, b)
     }
 
     fn fadd_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {

From cf8c391fc174c3e3264d910d5bbb4107b0565715 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 10 Oct 2023 19:19:38 -0400
Subject: [PATCH 407/997] Add comment

---
 Readme.md | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Readme.md b/Readme.md
index f001c83b08d3..6fad0707fbe9 100644
--- a/Readme.md
+++ b/Readme.md
@@ -286,6 +286,16 @@ git checkout sync_branch_name
 git merge master
 ```
 
+To send the changes to the rust repo:
+
+```bash
+cd ../rust
+git pull origin master
+git checkbout -b subtree-update_cg_gcc_YYYY-MM-DD
+PATH="$HOME/bin:$PATH" ~/bin/git-subtree pull --prefix=compiler/rustc_codegen_gcc/ https://github.com/rust-lang/rustc_codegen_gcc.git master
+git push
+```
+
 TODO: write a script that does the above.
 
 https://rust-lang.zulipchat.com/#narrow/stream/301329-t-devtools/topic/subtree.20madness/near/258877725

From 9030b704214d4b63f56498ee2af4c190a5287ac6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 11 Oct 2023 19:38:03 -0400
Subject: [PATCH 408/997] Update libgccjit

---
 Cargo.lock | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 85675fc40c34..b8e2e5d80804 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -74,7 +74,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#0b158c68bf7e46732869d90550a98e886dee8858"
+source = "git+https://github.com/antoyo/gccjit.rs#c52a218f5529321285b4489e5562a00e5428e033"
 dependencies = [
  "gccjit_sys",
 ]
@@ -82,7 +82,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#0b158c68bf7e46732869d90550a98e886dee8858"
+source = "git+https://github.com/antoyo/gccjit.rs#c52a218f5529321285b4489e5562a00e5428e033"
 dependencies = [
  "libc",
 ]

From 100dfced2067925df97cf203d696559be5c828b9 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 11 Oct 2023 20:55:32 -0400
Subject: [PATCH 409/997] Fix #[inline(always)] attribute

---
 src/attributes.rs | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/attributes.rs b/src/attributes.rs
index 971e019a4f60..6159971cfaa8 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -53,6 +53,9 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
                 codegen_fn_attrs.inline
             };
         if let Some(attr) = inline_attr(cx, inline) {
+            if let FnAttribute::AlwaysInline = attr {
+                func.add_attribute(FnAttribute::Inline);
+            }
             func.add_attribute(attr);
         }
 

From e3998b2d4633705eb4da278dcf5127f273e388ea Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 12 Oct 2023 17:06:29 -0400
Subject: [PATCH 410/997] Handle unsigned comparison for signed integers

---
 src/int.rs | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/src/int.rs b/src/int.rs
index 58e0dd56f38d..5719f6a8cf50 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -415,6 +415,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                     IntPredicate::IntNE => {
                         return self.context.new_comparison(None, ComparisonOp::NotEquals, cmp, self.context.new_rvalue_one(self.int_type));
                     },
+                    // TODO(antoyo): cast to u128 for unsigned comparison. See below.
                     IntPredicate::IntUGT => (ComparisonOp::Equals, 2),
                     IntPredicate::IntUGE => (ComparisonOp::GreaterThanEquals, 1),
                     IntPredicate::IntULT => (ComparisonOp::Equals, 0),
@@ -444,6 +445,18 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                     rhs = self.context.new_cast(None, rhs, a_type);
                 }
             }
+            match op {
+                IntPredicate::IntUGT | IntPredicate::IntUGE | IntPredicate::IntULT | IntPredicate::IntULE => {
+                    if !a_type.is_vector() {
+                        let unsigned_type = a_type.to_unsigned(&self.cx);
+                        lhs = self.context.new_cast(None, lhs, unsigned_type);
+                        rhs = self.context.new_cast(None, rhs, unsigned_type);
+                    }
+                },
+                // TODO(antoyo): we probably need to handle signed comparison for unsigned
+                // integers.
+                _ => (),
+            }
             self.context.new_comparison(None, op.to_gcc_comparison(), lhs, rhs)
         }
     }

From e2f32c72a7a6ad3b1ba971416d86c6eca1096a36 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 17 Oct 2023 07:57:56 -0400
Subject: [PATCH 411/997] Ignore failing test

This test only fails with non-native 128-bit integers, but it will also
fail with native 128-bit integers if we copy/paste it so that it's
executed twice. Interestingly, wrapping the test in a loop won't make it
fail.
So, it could be due to stack space or unwinding in release mode.
Also, the test only fails with -O2:
../cargo.sh rustc --bin test-rust -- -O

It doesn't fail with -O3.
---
 doc/tests.md         | 5 +++++
 failing-ui-tests.txt | 1 +
 2 files changed, 6 insertions(+)
 create mode 100644 doc/tests.md

diff --git a/doc/tests.md b/doc/tests.md
new file mode 100644
index 000000000000..3ac993bc2fd8
--- /dev/null
+++ b/doc/tests.md
@@ -0,0 +1,5 @@
+# Tests
+
+## Show the rustc command for UI tests
+
+Add ` --test-args "--verbose"` to `./x.py test`.
diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index ed56a11a1709..771da5812957 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -71,3 +71,4 @@ tests/ui/lto/all-crates.rs
 tests/ui/async-await/deep-futures-are-freeze.rs
 tests/ui/closures/capture-unsized-by-ref.rs
 tests/ui/generator/resume-after-return.rs
+tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs

From 096f14d37488ec5f2855cda241da5c795d738429 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 4 Sep 2023 20:29:50 +0200
Subject: [PATCH 412/997] Add support for NonNull function attribute

---
 src/abi.rs           | 54 ++++++++++++++++++++++++++++----------------
 src/declare.rs       |  6 ++++-
 src/intrinsic/mod.rs |  2 +-
 src/type_of.rs       |  3 ++-
 4 files changed, 43 insertions(+), 22 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 35bb0b6e5f4e..a2825773bd39 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -1,4 +1,4 @@
-use gccjit::{ToLValue, ToRValue, Type};
+use gccjit::{FnAttribute, ToLValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{AbiBuilderMethods, BaseTypeMethods};
 use rustc_data_structures::fx::FxHashSet;
 use rustc_middle::bug;
@@ -98,12 +98,12 @@ impl GccType for Reg {
 
 pub trait FnAbiGccExt<'gcc, 'tcx> {
     // TODO(antoyo): return a function pointer type instead?
-    fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool, FxHashSet<usize>);
+    fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool, FxHashSet<usize>, Vec<FnAttribute<'gcc>>);
     fn ptr_to_gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc>;
 }
 
 impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
-    fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool, FxHashSet<usize>) {
+    fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool, FxHashSet<usize>, Vec<FnAttribute<'gcc>>) {
         let mut on_stack_param_indices = FxHashSet::default();
 
         // This capacity calculation is approximate.
@@ -121,19 +121,23 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
                     cx.type_void()
                 }
             };
+        let mut non_null_args = Vec::new();
 
         #[cfg(feature = "master")]
-        let apply_attrs = |ty: Type<'gcc>, attrs: &ArgAttributes| {
-            if cx.sess().opts.optimize != config::OptLevel::No
-                && attrs.regular.contains(rustc_target::abi::call::ArgAttribute::NoAlias)
-            {
-                ty.make_restrict()
-            } else {
-                ty
+        let mut apply_attrs = |mut ty: Type<'gcc>, attrs: &ArgAttributes, arg_index: usize| {
+            if cx.sess().opts.optimize == config::OptLevel::No {
+                return ty;
             }
+            if attrs.regular.contains(rustc_target::abi::call::ArgAttribute::NoAlias) {
+                ty = ty.make_restrict()
+            }
+            if attrs.regular.contains(rustc_target::abi::call::ArgAttribute::NonNull) {
+                non_null_args.push(arg_index as i32 + 1);
+            }
+            ty
         };
         #[cfg(not(feature = "master"))]
-        let apply_attrs = |ty: Type<'gcc>, _attrs: &ArgAttributes| {
+        let apply_attrs = |ty: Type<'gcc>, _attrs: &ArgAttributes, _arg_index: usize| {
             ty
         };
 
@@ -141,8 +145,9 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
             let arg_ty = match arg.mode {
                 PassMode::Ignore => continue,
                 PassMode::Pair(a, b) => {
-                    argument_tys.push(apply_attrs(arg.layout.scalar_pair_element_gcc_type(cx, 0), &a));
-                    argument_tys.push(apply_attrs(arg.layout.scalar_pair_element_gcc_type(cx, 1), &b));
+                    let arg_pos = argument_tys.len();
+                    argument_tys.push(apply_attrs(arg.layout.scalar_pair_element_gcc_type(cx, 0), &a, arg_pos));
+                    argument_tys.push(apply_attrs(arg.layout.scalar_pair_element_gcc_type(cx, 1), &b, arg_pos + 1));
                     continue;
                 }
                 PassMode::Cast { ref cast, pad_i32 } => {
@@ -151,30 +156,41 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
                         argument_tys.push(Reg::i32().gcc_type(cx));
                     }
                     let ty = cast.gcc_type(cx);
-                    apply_attrs(ty, &cast.attrs)
+                    apply_attrs(ty, &cast.attrs, argument_tys.len())
                 }
                 PassMode::Indirect { attrs: _, meta_attrs: None, on_stack: true } => {
                     // This is a "byval" argument, so we don't apply the `restrict` attribute on it.
                     on_stack_param_indices.insert(argument_tys.len());
                     arg.memory_ty(cx)
                 },
-                PassMode::Direct(attrs) => apply_attrs(arg.layout.immediate_gcc_type(cx), &attrs),
+                PassMode::Direct(attrs) => apply_attrs(arg.layout.immediate_gcc_type(cx), &attrs, argument_tys.len()),
                 PassMode::Indirect { attrs, meta_attrs: None, on_stack: false } => {
-                    apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs)
+                    apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs, argument_tys.len())
                 }
                 PassMode::Indirect { attrs, meta_attrs: Some(meta_attrs), on_stack } => {
                     assert!(!on_stack);
-                    apply_attrs(apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs), &meta_attrs)
+                    let ty = apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs, argument_tys.len());
+                    apply_attrs(ty, &meta_attrs, argument_tys.len())
                 }
             };
             argument_tys.push(arg_ty);
         }
 
-        (return_ty, argument_tys, self.c_variadic, on_stack_param_indices)
+        #[cfg(feature = "master")]
+        let fn_attrs = if non_null_args.is_empty() {
+            Vec::new()
+        } else {
+            vec![FnAttribute::NonNull(non_null_args)]
+        };
+        #[cfg(not(feature = "master"))]
+        let fn_attrs = Vec::new();
+
+        (return_ty, argument_tys, self.c_variadic, on_stack_param_indices, fn_attrs)
     }
 
     fn ptr_to_gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc> {
-        let (return_type, params, variadic, on_stack_param_indices) = self.gcc_type(cx);
+        // FIXME: Should we do something with `fn_attrs`?
+        let (return_type, params, variadic, on_stack_param_indices, _fn_attrs) = self.gcc_type(cx);
         let pointer_type = cx.context.new_function_pointer_type(None, return_type, &params, variadic);
         cx.on_stack_params.borrow_mut().insert(pointer_type.dyncast_function_ptr_type().expect("function ptr type"), on_stack_param_indices);
         pointer_type
diff --git a/src/declare.rs b/src/declare.rs
index e673d0af4c7e..409f112ca739 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -80,9 +80,13 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     pub fn declare_fn(&self, name: &str, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Function<'gcc> {
-        let (return_type, params, variadic, on_stack_param_indices) = fn_abi.gcc_type(self);
+        let (return_type, params, variadic, on_stack_param_indices, fn_attrs) = fn_abi.gcc_type(self);
         let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, &params, variadic);
         self.on_stack_function_params.borrow_mut().insert(func, on_stack_param_indices);
+        // We need to handle `nonnull` here where we still have access to function args.
+        for fn_attr in fn_attrs {
+            func.add_attribute(fn_attr);
+        }
         func
     }
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 9caed459a292..4d0670d802d5 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1197,7 +1197,7 @@ fn get_rust_try_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, codegen: &mut
 #[cfg(feature="master")]
 fn gen_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, name: &str, rust_fn_sig: ty::PolyFnSig<'tcx>, codegen: &mut dyn FnMut(Builder<'a, 'gcc, 'tcx>)) -> (Type<'gcc>, Function<'gcc>) {
     let fn_abi = cx.fn_abi_of_fn_ptr(rust_fn_sig, ty::List::empty());
-    let (typ, _, _, _) = fn_abi.gcc_type(cx);
+    let (typ, _, _, _, _) = fn_abi.gcc_type(cx);
     // FIXME(eddyb) find a nicer way to do this.
     cx.linkage.set(FunctionType::Internal);
     let func = cx.declare_fn(name, fn_abi);
diff --git a/src/type_of.rs b/src/type_of.rs
index c2eab295acd2..4563e32301f5 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -372,7 +372,8 @@ impl<'gcc, 'tcx> LayoutTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn fn_decl_backend_type(&self, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Type<'gcc> {
-        let (return_type, param_types, variadic, _) = fn_abi.gcc_type(self);
+        // // FIXME: Should we do something with `fn_attrs`?
+        let (return_type, param_types, variadic, _, _fn_attrs) = fn_abi.gcc_type(self);
         self.context.new_function_pointer_type(None, return_type, &param_types, variadic)
     }
 }

From 0348a5f17adbb922cdb2a7b75bfee4045fe1adf8 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 17 Oct 2023 21:55:36 +0200
Subject: [PATCH 413/997] Improve code readability

---
 src/abi.rs           | 34 +++++++++++++++++++++++++++-------
 src/declare.rs       | 15 ++++++++++-----
 src/intrinsic/mod.rs |  4 ++--
 src/type_of.rs       | 13 +++++++++----
 4 files changed, 48 insertions(+), 18 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index a2825773bd39..5600f1ba8a9d 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -96,14 +96,22 @@ impl GccType for Reg {
     }
 }
 
+pub struct FnAbiGcc<'gcc> {
+    pub return_type: Type<'gcc>,
+    pub arguments_type: Vec<Type<'gcc>>,
+    pub is_c_variadic: bool,
+    pub on_stack_param_indices: FxHashSet<usize>,
+    pub fn_attributes: Vec<FnAttribute<'gcc>>,
+}
+
 pub trait FnAbiGccExt<'gcc, 'tcx> {
     // TODO(antoyo): return a function pointer type instead?
-    fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool, FxHashSet<usize>, Vec<FnAttribute<'gcc>>);
+    fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> FnAbiGcc<'gcc>;
     fn ptr_to_gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc>;
 }
 
 impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
-    fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> (Type<'gcc>, Vec<Type<'gcc>>, bool, FxHashSet<usize>, Vec<FnAttribute<'gcc>>) {
+    fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> FnAbiGcc<'gcc> {
         let mut on_stack_param_indices = FxHashSet::default();
 
         // This capacity calculation is approximate.
@@ -111,7 +119,7 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
             self.args.len() + if let PassMode::Indirect { .. } = self.ret.mode { 1 } else { 0 }
         );
 
-        let return_ty =
+        let return_type =
             match self.ret.mode {
                 PassMode::Ignore => cx.type_void(),
                 PassMode::Direct(_) | PassMode::Pair(..) => self.ret.layout.immediate_gcc_type(cx),
@@ -185,13 +193,25 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
         #[cfg(not(feature = "master"))]
         let fn_attrs = Vec::new();
 
-        (return_ty, argument_tys, self.c_variadic, on_stack_param_indices, fn_attrs)
+        FnAbiGcc {
+            return_type,
+            arguments_type: argument_tys,
+            is_c_variadic: self.c_variadic,
+            on_stack_param_indices,
+            fn_attributes: fn_attrs,
+        }
     }
 
     fn ptr_to_gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc> {
-        // FIXME: Should we do something with `fn_attrs`?
-        let (return_type, params, variadic, on_stack_param_indices, _fn_attrs) = self.gcc_type(cx);
-        let pointer_type = cx.context.new_function_pointer_type(None, return_type, &params, variadic);
+        // FIXME(antoyo): Should we do something with `FnAbiGcc::fn_attributes`?
+        let FnAbiGcc {
+            return_type,
+            arguments_type,
+            is_c_variadic,
+            on_stack_param_indices,
+            ..
+        } = self.gcc_type(cx);
+        let pointer_type = cx.context.new_function_pointer_type(None, return_type, &arguments_type, is_c_variadic);
         cx.on_stack_params.borrow_mut().insert(pointer_type.dyncast_function_ptr_type().expect("function ptr type"), on_stack_param_indices);
         pointer_type
     }
diff --git a/src/declare.rs b/src/declare.rs
index 409f112ca739..0b583c074dd2 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -6,7 +6,7 @@ use rustc_middle::ty::Ty;
 use rustc_span::Symbol;
 use rustc_target::abi::call::FnAbi;
 
-use crate::abi::FnAbiGccExt;
+use crate::abi::{FnAbiGcc, FnAbiGccExt};
 use crate::context::CodegenCx;
 use crate::intrinsic::llvm;
 
@@ -80,11 +80,16 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     pub fn declare_fn(&self, name: &str, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Function<'gcc> {
-        let (return_type, params, variadic, on_stack_param_indices, fn_attrs) = fn_abi.gcc_type(self);
-        let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, &params, variadic);
+        let FnAbiGcc {
+            return_type,
+            arguments_type,
+            is_c_variadic,
+            on_stack_param_indices,
+            fn_attributes,
+        } = fn_abi.gcc_type(self);
+        let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, &arguments_type, is_c_variadic);
         self.on_stack_function_params.borrow_mut().insert(func, on_stack_param_indices);
-        // We need to handle `nonnull` here where we still have access to function args.
-        for fn_attr in fn_attrs {
+        for fn_attr in fn_attributes {
             func.add_attribute(fn_attr);
         }
         func
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 4d0670d802d5..eaee1d453c53 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1197,7 +1197,7 @@ fn get_rust_try_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, codegen: &mut
 #[cfg(feature="master")]
 fn gen_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, name: &str, rust_fn_sig: ty::PolyFnSig<'tcx>, codegen: &mut dyn FnMut(Builder<'a, 'gcc, 'tcx>)) -> (Type<'gcc>, Function<'gcc>) {
     let fn_abi = cx.fn_abi_of_fn_ptr(rust_fn_sig, ty::List::empty());
-    let (typ, _, _, _, _) = fn_abi.gcc_type(cx);
+    let return_type = fn_abi.gcc_type(cx).return_type;
     // FIXME(eddyb) find a nicer way to do this.
     cx.linkage.set(FunctionType::Internal);
     let func = cx.declare_fn(name, fn_abi);
@@ -1207,5 +1207,5 @@ fn gen_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, name: &str, rust_fn_sig
     let block = Builder::append_block(cx, func_val, "entry-block");
     let bx = Builder::build(cx, block);
     codegen(bx);
-    (typ, func)
+    (return_type, func)
 }
diff --git a/src/type_of.rs b/src/type_of.rs
index 4563e32301f5..1189e96e3087 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -9,7 +9,7 @@ use rustc_middle::ty::print::with_no_trimmed_paths;
 use rustc_target::abi::{self, Abi, Align, F32, F64, FieldsShape, Int, Integer, Pointer, PointeeInfo, Size, TyAbiInterface, Variants};
 use rustc_target::abi::call::{CastTarget, FnAbi, Reg};
 
-use crate::abi::{FnAbiGccExt, GccType};
+use crate::abi::{FnAbiGcc, FnAbiGccExt, GccType};
 use crate::context::CodegenCx;
 use crate::type_::struct_fields;
 
@@ -372,8 +372,13 @@ impl<'gcc, 'tcx> LayoutTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn fn_decl_backend_type(&self, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Type<'gcc> {
-        // // FIXME: Should we do something with `fn_attrs`?
-        let (return_type, param_types, variadic, _, _fn_attrs) = fn_abi.gcc_type(self);
-        self.context.new_function_pointer_type(None, return_type, &param_types, variadic)
+        // FIXME(antoyo): Should we do something with `FnAbiGcc::fn_attributes`?
+        let FnAbiGcc {
+            return_type,
+            arguments_type,
+            is_c_variadic,
+            ..
+        } = fn_abi.gcc_type(self);
+        self.context.new_function_pointer_type(None, return_type, &arguments_type, is_c_variadic)
     }
 }

From 64abf5862ffb5b32f1555642550eb18f383fdc3a Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Thu, 5 Oct 2023 19:23:46 -0500
Subject: [PATCH 414/997] optimize popcount implementation

In the current implementation, the gcc backend of rustc currently emits the
following for a function that implements popcount for a u32 (x86_64 targeting
AVX2, using standard unix calling convention):

    popcount:
        mov     eax, edi
        and     edi, 1431655765
        shr     eax
        and     eax, 1431655765
        add     edi, eax
        mov     edx, edi
        and     edi, 858993459
        shr     edx, 2
        and     edx, 858993459
        add     edx, edi
        mov     eax, edx
        and     edx, 252645135
        shr     eax, 4
        and     eax, 252645135
        add     eax, edx
        mov     edx, eax
        and     eax, 16711935
        shr     edx, 8
        and     edx, 16711935
        add     edx, eax
        movzx   eax, dx
        shr     edx, 16
        add     eax, edx
        ret

Rather than using this implementation, gcc could be told to use Wenger's
algorithm.  This would give the same function the following implementation:

    popcount:
        xor eax, eax
        xor edx, edx
        popcnt eax, edi
        test edi, edi
        cmove eax, edx
        ret

This patch implements the popcount operation in terms of Wenger's algorithm in
all cases.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 src/intrinsic/mod.rs | 90 +++++++++++++++++---------------------------
 1 file changed, 34 insertions(+), 56 deletions(-)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 9caed459a292..f0437bf4cc83 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -4,7 +4,7 @@ mod simd;
 #[cfg(feature="master")]
 use std::iter;
 
-use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp, FunctionType};
+use gccjit::{BinaryOp, ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp, FunctionType};
 use rustc_codegen_ssa::MemFlags;
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::common::IntPredicate;
@@ -820,74 +820,52 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             };
 
         if value_type.is_u128(&self.cx) {
-            // TODO(antoyo): implement in the normal algorithm below to have a more efficient
-            // implementation (that does not require a call to __popcountdi2).
-            let popcount = self.context.get_builtin_function("__builtin_popcountll");
             let sixty_four = self.gcc_int(value_type, 64);
             let right_shift = self.gcc_lshr(value, sixty_four);
             let high = self.gcc_int_cast(right_shift, self.cx.ulonglong_type);
-            let high = self.context.new_call(None, popcount, &[high]);
+            let high = self.pop_count(high);
             let low = self.gcc_int_cast(value, self.cx.ulonglong_type);
-            let low = self.context.new_call(None, popcount, &[low]);
+            let low = self.pop_count(low);
             let res = high + low;
             return self.gcc_int_cast(res, result_type);
         }
 
-        // First step.
-        let mask = self.context.new_rvalue_from_long(value_type, 0x5555555555555555);
-        let left = value & mask;
-        let shifted = value >> self.context.new_rvalue_from_int(value_type, 1);
-        let right = shifted & mask;
-        let value = left + right;
+        // Use Wenger's algorithm for population count, gcc's seems to play better with it
+        // for (int counter = 0; value != 0; counter++) {
+        //     value &= value - 1;
+        // }
+        let func = self.current_func.borrow().expect("func");
+        let loop_head = func.new_block("head");
+        let loop_body = func.new_block("body");
+        let loop_tail = func.new_block("tail");
 
-        // Second step.
-        let mask = self.context.new_rvalue_from_long(value_type, 0x3333333333333333);
-        let left = value & mask;
-        let shifted = value >> self.context.new_rvalue_from_int(value_type, 2);
-        let right = shifted & mask;
-        let value = left + right;
+        let counter_type = self.int_type;
+        let counter = self.current_func().new_local(None, counter_type, "popcount_counter");
+        let val = self.current_func().new_local(None, value_type, "popcount_value");
+        let zero = self.context.new_rvalue_zero(counter_type);
+        self.llbb().add_assignment(None, counter, zero);
+        self.llbb().add_assignment(None, val, value);
+        self.br(loop_head);
 
-        // Third step.
-        let mask = self.context.new_rvalue_from_long(value_type, 0x0F0F0F0F0F0F0F0F);
-        let left = value & mask;
-        let shifted = value >> self.context.new_rvalue_from_int(value_type, 4);
-        let right = shifted & mask;
-        let value = left + right;
+        // check if value isn't zero
+        self.switch_to_block(loop_head);
+        let zero = self.context.new_rvalue_zero(value_type);
+        let cond = self.context.new_comparison(None, ComparisonOp::NotEquals, val.to_rvalue(), zero);
+        self.cond_br(cond, loop_body, loop_tail);
 
-        if value_type.is_u8(&self.cx) {
-            return self.context.new_cast(None, value, result_type);
-        }
+        // val &= val - 1;
+        self.switch_to_block(loop_body);
+        let sub = val.to_rvalue() - self.context.new_rvalue_one(value_type);
+        loop_body.add_assignment_op(None, val, BinaryOp::BitwiseAnd, sub);
 
-        // Fourth step.
-        let mask = self.context.new_rvalue_from_long(value_type, 0x00FF00FF00FF00FF);
-        let left = value & mask;
-        let shifted = value >> self.context.new_rvalue_from_int(value_type, 8);
-        let right = shifted & mask;
-        let value = left + right;
+        // counter += 1
+        let one = self.context.new_rvalue_one(counter_type);
+        loop_body.add_assignment_op(None, counter, BinaryOp::Plus, one);
+        self.br(loop_head);
 
-        if value_type.is_u16(&self.cx) {
-            return self.context.new_cast(None, value, result_type);
-        }
-
-        // Fifth step.
-        let mask = self.context.new_rvalue_from_long(value_type, 0x0000FFFF0000FFFF);
-        let left = value & mask;
-        let shifted = value >> self.context.new_rvalue_from_int(value_type, 16);
-        let right = shifted & mask;
-        let value = left + right;
-
-        if value_type.is_u32(&self.cx) {
-            return self.context.new_cast(None, value, result_type);
-        }
-
-        // Sixth step.
-        let mask = self.context.new_rvalue_from_long(value_type, 0x00000000FFFFFFFF);
-        let left = value & mask;
-        let shifted = value >> self.context.new_rvalue_from_int(value_type, 32);
-        let right = shifted & mask;
-        let value = left + right;
-
-        self.context.new_cast(None, value, result_type)
+        // end of loop
+        self.switch_to_block(loop_tail);
+        self.context.new_cast(None, counter.to_rvalue(), result_type)
     }
 
     // Algorithm from: https://blog.regehr.org/archives/1063

From e5fa9f869287f85ddc6b3d72457d8c56669638f6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 7 Oct 2023 15:13:55 -0400
Subject: [PATCH 415/997] Use the correct alignment for integer types

---
 src/common.rs  | 16 ++++++++--------
 src/context.rs | 43 +++++++++++++++++++++++++------------------
 2 files changed, 33 insertions(+), 26 deletions(-)

diff --git a/src/common.rs b/src/common.rs
index 5f54cb16d8e2..93fe27e547ae 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -424,35 +424,35 @@ impl<'gcc, 'tcx> TypeReflection<'gcc, 'tcx> for Type<'gcc> {
     }
 
     fn is_i8(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
-        self.unqualified() == cx.i8_type
+        self.is_compatible_with(cx.i8_type)
     }
 
     fn is_u8(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
-        self.unqualified() == cx.u8_type
+        self.is_compatible_with(cx.u8_type)
     }
 
     fn is_i16(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
-        self.unqualified() == cx.i16_type
+        self.is_compatible_with(cx.i16_type)
     }
 
     fn is_u16(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
-        self.unqualified() == cx.u16_type
+        self.is_compatible_with(cx.u16_type)
     }
 
     fn is_i32(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
-        self.unqualified() == cx.i32_type
+        self.is_compatible_with(cx.i32_type)
     }
 
     fn is_u32(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
-        self.unqualified() == cx.u32_type
+        self.is_compatible_with(cx.u32_type)
     }
 
     fn is_i64(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
-        self.unqualified() == cx.i64_type
+        self.is_compatible_with(cx.i64_type)
     }
 
     fn is_u64(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
-        self.unqualified() == cx.u64_type
+        self.is_compatible_with(cx.u64_type)
     }
 
     fn is_i128(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool {
diff --git a/src/context.rs b/src/context.rs
index dcebd92a61c6..b01ac7b57afa 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -129,19 +129,25 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     pub fn new(context: &'gcc Context<'gcc>, codegen_unit: &'tcx CodegenUnit<'tcx>, tcx: TyCtxt<'tcx>, supports_128bit_integers: bool) -> Self {
         let check_overflow = tcx.sess.overflow_checks();
 
-        let i8_type = context.new_c_type(CType::Int8t);
-        let i16_type = context.new_c_type(CType::Int16t);
-        let i32_type = context.new_c_type(CType::Int32t);
-        let i64_type = context.new_c_type(CType::Int64t);
-        let u8_type = context.new_c_type(CType::UInt8t);
-        let u16_type = context.new_c_type(CType::UInt16t);
-        let u32_type = context.new_c_type(CType::UInt32t);
-        let u64_type = context.new_c_type(CType::UInt64t);
+        let create_type = |ctype, rust_type| {
+            let layout = tcx.layout_of(ParamEnv::reveal_all().and(rust_type)).unwrap();
+            let align = layout.align.abi.bytes();
+            context.new_c_type(ctype).get_aligned(align)
+        };
+
+        let i8_type = create_type(CType::Int8t, tcx.types.i8);
+        let i16_type = create_type(CType::Int16t, tcx.types.i16);
+        let i32_type = create_type(CType::Int32t, tcx.types.i32);
+        let i64_type = create_type(CType::Int64t, tcx.types.i64);
+        let u8_type = create_type(CType::UInt8t, tcx.types.u8);
+        let u16_type = create_type(CType::UInt16t, tcx.types.u16);
+        let u32_type = create_type(CType::UInt32t, tcx.types.u32);
+        let u64_type = create_type(CType::UInt64t, tcx.types.u64);
 
         let (i128_type, u128_type) =
             if supports_128bit_integers {
-                let i128_type = context.new_c_type(CType::Int128t).get_aligned(8); // TODO(antoyo): should the alignment be hard-coded?;
-                let u128_type = context.new_c_type(CType::UInt128t).get_aligned(8); // TODO(antoyo): should the alignment be hard-coded?;
+                let i128_type = create_type(CType::Int128t, tcx.types.i128);
+                let u128_type = create_type(CType::UInt128t, tcx.types.u128);
                 (i128_type, u128_type)
             }
             else {
@@ -265,15 +271,16 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     pub fn is_native_int_type(&self, typ: Type<'gcc>) -> bool {
+        // TODO: cache those types to not query libgccjit everytime this is called.
         let types = [
-            self.u8_type,
-            self.u16_type,
-            self.u32_type,
-            self.u64_type,
-            self.i8_type,
-            self.i16_type,
-            self.i32_type,
-            self.i64_type,
+            self.context.new_c_type(CType::UInt8t),
+            self.context.new_c_type(CType::UInt16t),
+            self.context.new_c_type(CType::UInt32t),
+            self.context.new_c_type(CType::UInt64t),
+            self.context.new_c_type(CType::Int8t),
+            self.context.new_c_type(CType::Int16t),
+            self.context.new_c_type(CType::Int32t),
+            self.context.new_c_type(CType::Int64t),
         ];
 
         for native_type in types {

From 9d5e0ba1f51f61ba8ccaa6c37eef25ac497ea70c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 17 Oct 2023 19:43:20 -0400
Subject: [PATCH 416/997] Fixes including fixing compilation for
 --no-default-features

---
 src/abi.rs     |  9 ++++++---
 src/context.rs | 33 +++++++++++++++++++++++----------
 src/declare.rs |  2 ++
 3 files changed, 31 insertions(+), 13 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 5600f1ba8a9d..f601cd95f2a6 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -1,4 +1,6 @@
-use gccjit::{FnAttribute, ToLValue, ToRValue, Type};
+#[cfg(feature = "master")]
+use gccjit::FnAttribute;
+use gccjit::{ToLValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{AbiBuilderMethods, BaseTypeMethods};
 use rustc_data_structures::fx::FxHashSet;
 use rustc_middle::bug;
@@ -101,6 +103,7 @@ pub struct FnAbiGcc<'gcc> {
     pub arguments_type: Vec<Type<'gcc>>,
     pub is_c_variadic: bool,
     pub on_stack_param_indices: FxHashSet<usize>,
+    #[cfg(feature = "master")]
     pub fn_attributes: Vec<FnAttribute<'gcc>>,
 }
 
@@ -129,6 +132,7 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
                     cx.type_void()
                 }
             };
+        #[cfg(feature = "master")]
         let mut non_null_args = Vec::new();
 
         #[cfg(feature = "master")]
@@ -190,14 +194,13 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
         } else {
             vec![FnAttribute::NonNull(non_null_args)]
         };
-        #[cfg(not(feature = "master"))]
-        let fn_attrs = Vec::new();
 
         FnAbiGcc {
             return_type,
             arguments_type: argument_tys,
             is_c_variadic: self.c_variadic,
             on_stack_param_indices,
+            #[cfg(feature = "master")]
             fn_attributes: fn_attrs,
         }
     }
diff --git a/src/context.rs b/src/context.rs
index b01ac7b57afa..243556a0e523 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -132,7 +132,21 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let create_type = |ctype, rust_type| {
             let layout = tcx.layout_of(ParamEnv::reveal_all().and(rust_type)).unwrap();
             let align = layout.align.abi.bytes();
-            context.new_c_type(ctype).get_aligned(align)
+            #[cfg(feature="master")]
+            {
+                context.new_c_type(ctype).get_aligned(align)
+            }
+            #[cfg(not(feature="master"))]
+            {
+                // Since libgccjit 12 doesn't contain the fix to compare aligned integer types,
+                // only align u128 and i128.
+                if layout.ty.int_size_and_signed(tcx).0.bytes() == 16 {
+                    context.new_c_type(ctype).get_aligned(align)
+                }
+                else {
+                    context.new_c_type(ctype)
+                }
+            }
         };
 
         let i8_type = create_type(CType::Int8t, tcx.types.i8);
@@ -271,16 +285,15 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     pub fn is_native_int_type(&self, typ: Type<'gcc>) -> bool {
-        // TODO: cache those types to not query libgccjit everytime this is called.
         let types = [
-            self.context.new_c_type(CType::UInt8t),
-            self.context.new_c_type(CType::UInt16t),
-            self.context.new_c_type(CType::UInt32t),
-            self.context.new_c_type(CType::UInt64t),
-            self.context.new_c_type(CType::Int8t),
-            self.context.new_c_type(CType::Int16t),
-            self.context.new_c_type(CType::Int32t),
-            self.context.new_c_type(CType::Int64t),
+            self.u8_type,
+            self.u16_type,
+            self.u32_type,
+            self.u64_type,
+            self.i8_type,
+            self.i16_type,
+            self.i32_type,
+            self.i64_type,
         ];
 
         for native_type in types {
diff --git a/src/declare.rs b/src/declare.rs
index 0b583c074dd2..247454fa58e1 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -85,10 +85,12 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             arguments_type,
             is_c_variadic,
             on_stack_param_indices,
+            #[cfg(feature="master")]
             fn_attributes,
         } = fn_abi.gcc_type(self);
         let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, &arguments_type, is_c_variadic);
         self.on_stack_function_params.borrow_mut().insert(func, on_stack_param_indices);
+        #[cfg(feature="master")]
         for fn_attr in fn_attributes {
             func.add_attribute(fn_attr);
         }

From 99bc37e075573ae8b49893d2bb62f4dfb0595067 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 21 May 2023 21:20:46 -0400
Subject: [PATCH 417/997] Refactor CI scripts to have a different file for
 libgccjit 12

---
 .github/workflows/ci.yml       |  26 ++-----
 .github/workflows/failures.yml | 120 +++++++++++++++++++++++++++++++
 .github/workflows/gcc12.yml    | 124 +++++++++++++++++++++++++++++++++
 .ignore                        |  10 +++
 build_system/src/build.rs      |   4 +-
 5 files changed, 261 insertions(+), 23 deletions(-)
 create mode 100644 .github/workflows/failures.yml
 create mode 100644 .github/workflows/gcc12.yml
 create mode 100644 .ignore

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index f075c744e457..a38120e26f8d 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -19,9 +19,8 @@ jobs:
       fail-fast: false
       matrix:
         libgccjit_version:
-          - { gcc: "libgccjit.so", extra: "", env_extra: "", artifacts_branch: "master" }
-          - { gcc: "libgccjit_without_int128.so", extra: "", env_extra: "", artifacts_branch: "master-without-128bit-integers" }
-          - { gcc: "libgccjit12.so", extra: "--no-default-features", env_extra: "TEST_FLAGS='-Cpanic=abort -Zpanic-abort-tests'", artifacts_branch: "gcc12" }
+          - { gcc: "libgccjit.so", artifacts_branch: "master" }
+          - { gcc: "libgccjit_without_int128.so", artifacts_branch: "master-without-128bit-integers" }
         commands: [
           "--mini-tests",
           "--std-tests",
@@ -33,7 +32,6 @@ jobs:
           "--extended-regex-tests",
           "--test-successful-rustc --nb-parts 2 --current-part 0",
           "--test-successful-rustc --nb-parts 2 --current-part 1",
-          "--test-failing-rustc",
         ]
 
     steps:
@@ -48,12 +46,7 @@ jobs:
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
       run: sudo apt-get install ninja-build ripgrep llvm-14-tools
 
-    - name: Install libgccjit12
-      if: matrix.libgccjit_version.gcc == 'libgccjit12.so'
-      run: sudo apt-get install libgccjit-12-dev
-
     - name: Download artifact
-      if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       uses: dawidd6/action-download-artifact@v2
       with:
           workflow: main.yml
@@ -65,11 +58,6 @@ jobs:
           search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
 
     - name: Setup path to libgccjit
-      if: matrix.libgccjit_version.gcc == 'libgccjit12.so'
-      run: echo /usr/lib/gcc/x86_64-linux-gnu/12 > gcc_path
-
-    - name: Setup path to libgccjit
-      if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       run: |
           sudo dpkg --force-overwrite -i gcc-13/gcc-13.deb
           echo /usr/lib/ > gcc_path
@@ -119,8 +107,8 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        ${{ matrix.libgccjit_version.env_extra }} ./y.sh build ${{ matrix.libgccjit_version.extra }}
-        ${{ matrix.libgccjit_version.env_extra }} cargo test ${{ matrix.libgccjit_version.extra }}
+        ./y.sh build
+        cargo test
         ./clean_all.sh
 
     - name: Prepare dependencies
@@ -136,16 +124,12 @@ jobs:
         command: build
         args: --release
 
-    - name: Add more failing tests for GCC 12
-      if: ${{ matrix.libgccjit_version.gcc == 'libgccjit12.so' }}
-      run: cat failing-ui-tests12.txt >> failing-ui-tests.txt
-
     - name: Add more failing tests because the sysroot is not compiled with LTO
       run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
 
     - name: Run tests
       run: |
-        ${{ matrix.libgccjit_version.env_extra }} ./test.sh --release --clean --build-sysroot ${{ matrix.commands }} ${{ matrix.libgccjit_version.extra }}
+        ./test.sh --release --clean --build-sysroot ${{ matrix.commands }}
 
   duplicates:
     runs-on: ubuntu-latest
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
new file mode 100644
index 000000000000..e04648ab6306
--- /dev/null
+++ b/.github/workflows/failures.yml
@@ -0,0 +1,120 @@
+# TODO: refactor to avoid duplication with the ci.yml file.
+name: Failures
+
+on:
+  - pull_request
+
+permissions:
+  contents: read
+
+env:
+  # Enable backtraces for easier debugging
+  RUST_BACKTRACE: 1
+
+jobs:
+  build:
+    runs-on: ubuntu-22.04
+
+    strategy:
+      fail-fast: false
+      matrix:
+        libgccjit_version:
+          - { gcc: "libgccjit.so", artifacts_branch: "master" }
+          - { gcc: "libgccjit_without_int128.so", artifacts_branch: "master-without-128bit-integers" }
+
+    steps:
+    - uses: actions/checkout@v3
+
+    - uses: actions/checkout@v3
+      with:
+        repository: llvm/llvm-project
+        path: llvm
+
+    - name: Install packages
+      # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
+      run: sudo apt-get install ninja-build ripgrep llvm-14-tools
+
+    - name: Download artifact
+      uses: dawidd6/action-download-artifact@v2
+      with:
+          workflow: main.yml
+          name: gcc-13
+          path: gcc-13
+          repo: antoyo/gcc
+          branch: ${{ matrix.libgccjit_version.artifacts_branch }}
+          event: push
+          search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
+
+    - name: Setup path to libgccjit
+      run: |
+          sudo dpkg --force-overwrite -i gcc-13/gcc-13.deb
+          echo /usr/lib/ > gcc_path
+
+    - name: Set env
+      run: |
+        echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
+        echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
+        echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+
+    - name: Set RUST_COMPILER_RT_ROOT
+      run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
+
+    - name: Cache cargo installed crates
+      uses: actions/cache@v3
+      with:
+        path: ~/.cargo/bin
+        key: cargo-installed-crates2-ubuntu-latest
+
+    - name: Cache cargo registry
+      uses: actions/cache@v3
+      with:
+        path: ~/.cargo/registry
+        key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
+
+    - name: Cache cargo index
+      uses: actions/cache@v3
+      with:
+        path: ~/.cargo/git
+        key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
+
+    - name: Cache cargo target dir
+      uses: actions/cache@v3
+      with:
+        path: target
+        key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
+
+    #- name: Cache rust repository
+      #uses: actions/cache@v3
+      #id: cache-rust-repository
+      #with:
+        #path: rust
+        #key: ${{ runner.os }}-packages-${{ hashFiles('rust/.git/HEAD') }}
+
+    - name: Build
+      run: |
+        ./y.sh prepare --only-libcore
+        ./y.sh build
+        cargo test
+        ./clean_all.sh
+
+    - name: Prepare dependencies
+      run: |
+        git config --global user.email "user@example.com"
+        git config --global user.name "User"
+        ./y.sh prepare
+
+    # Compile is a separate step, as the actions-rs/cargo action supports error annotations
+    - name: Compile
+      uses: actions-rs/cargo@v1.0.3
+      with:
+        command: build
+        args: --release
+
+    - name: Add more failing tests because the sysroot is not compiled with LTO
+      run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
+
+    - name: Run tests
+      id: tests
+      run: |
+        ./test.sh --release --clean --build-sysroot --test-failing-rustc | tee output_log
+        rg "test result" output_log >> $GITHUB_STEP_SUMMARY
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
new file mode 100644
index 000000000000..59e0c5ad234d
--- /dev/null
+++ b/.github/workflows/gcc12.yml
@@ -0,0 +1,124 @@
+name: CI libgccjit 12
+
+on:
+  - push
+  - pull_request
+
+permissions:
+  contents: read
+
+env:
+  # Enable backtraces for easier debugging
+  RUST_BACKTRACE: 1
+  TEST_FLAGS: "-Cpanic=abort -Zpanic-abort-tests"
+
+jobs:
+  build:
+    runs-on: ubuntu-22.04
+
+    strategy:
+      fail-fast: false
+      matrix:
+        commands: [
+          "--mini-tests",
+          # TODO(antoyo): re-enable those commands when the build with libgccjit 12 is fixed.
+          #"--std-tests",
+          # FIXME: re-enable asm tests when GCC can emit in the right syntax.
+          # "--asm-tests",
+          #"--test-libcore",
+          #"--extended-rand-tests",
+          #"--extended-regex-example-tests",
+          #"--extended-regex-tests",
+          #"--test-successful-rustc --nb-parts 2 --current-part 0",
+          #"--test-successful-rustc --nb-parts 2 --current-part 1",
+          #"--test-failing-rustc",
+        ]
+
+    steps:
+    - uses: actions/checkout@v3
+
+    - uses: actions/checkout@v3
+      with:
+        repository: llvm/llvm-project
+        path: llvm
+
+    - name: Install packages
+      # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
+      run: sudo apt-get install ninja-build ripgrep llvm-14-tools libgccjit-12-dev
+
+    - name: Setup path to libgccjit
+      run: echo /usr/lib/gcc/x86_64-linux-gnu/12 > gcc_path
+
+    - name: Set env
+      run: |
+        echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
+        echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
+        echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+
+    - name: Set RUST_COMPILER_RT_ROOT
+      run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
+
+    - name: Cache cargo installed crates
+      uses: actions/cache@v3
+      with:
+        path: ~/.cargo/bin
+        key: cargo-installed-crates2-ubuntu-latest
+
+    - name: Cache cargo registry
+      uses: actions/cache@v3
+      with:
+        path: ~/.cargo/registry
+        key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
+
+    - name: Cache cargo index
+      uses: actions/cache@v3
+      with:
+        path: ~/.cargo/git
+        key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
+
+    - name: Cache cargo target dir
+      uses: actions/cache@v3
+      with:
+        path: target
+        key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
+
+    #- name: Cache rust repository
+      ## We only clone the rust repository for rustc tests
+      #if: ${{ contains(matrix.commands, 'rustc') }}
+      #uses: actions/cache@v3
+      #id: cache-rust-repository
+      #with:
+        #path: rust
+        #key: ${{ runner.os }}-packages-${{ hashFiles('rust/.git/HEAD') }}
+
+    - name: Build
+      run: |
+        ./y.sh prepare --only-libcore
+        # TODO(antoyo): build the sysroot when the build with libgccjit 12 is fixed.
+        #./y.sh build --no-default-features
+        # TODO(antoyo): run the tests when we can build the sysroot with libgccjit 12.
+        #cargo test --no-default-features
+        ./clean_all.sh
+
+    - name: Prepare dependencies
+      run: |
+        git config --global user.email "user@example.com"
+        git config --global user.name "User"
+        ./y.sh prepare
+
+    # Compile is a separate step, as the actions-rs/cargo action supports error annotations
+    - name: Compile
+      uses: actions-rs/cargo@v1.0.3
+      with:
+        command: build
+        args: --release
+
+    - name: Add more failing tests for GCC 12
+      run: cat failing-ui-tests12.txt >> failing-ui-tests.txt
+
+    - name: Run tests
+      run: |
+        # TODO(antoyo): add --build-sysroot when the build with libgccjit 12 is fixed.
+        # FIXME(antoyo): we need to set GCC_EXEC_PREFIX so that the linker can find the linker plugin.
+        # Not sure why it's not found otherwise.
+        GCC_EXEC_PREFIX=/usr/lib/gcc/ ./test.sh --release --clean ${{ matrix.commands }} --no-default-features
diff --git a/.ignore b/.ignore
new file mode 100644
index 000000000000..d8d189e5c7c6
--- /dev/null
+++ b/.ignore
@@ -0,0 +1,10 @@
+!/build_sysroot/sysroot_src
+!/simple-raytracer
+!/regex
+!/rand
+!/test-backend
+!/gcc_path
+!/benchmarks
+!*gimple*
+!*asm*
+!.github
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index e2819c37ad9b..0428c6b2cdae 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -1,6 +1,6 @@
 use crate::config::set_config;
 use crate::utils::{
-    get_gcc_path, run_command, run_command_with_env, run_command_with_output_and_env, walk_dir,
+    get_gcc_path, run_command, run_command_with_output_and_env, walk_dir,
 };
 use std::collections::HashMap;
 use std::ffi::OsStr;
@@ -200,7 +200,7 @@ fn build_codegen(args: &BuildArg) -> Result<(), String> {
     for feature in &ref_features {
         command.push(feature);
     }
-    run_command_with_env(&command, None, Some(&env))?;
+    run_command_with_output_and_env(&command, None, Some(&env))?;
 
     let config = set_config(&mut env, &[], Some(&args.gcc_path))?;
 

From c7679c4831204dc2ac2f835fe5f0851baf45e9df Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 18 Oct 2023 19:04:47 -0400
Subject: [PATCH 418/997] Revome llvm-14-tools from failures CI

---
 .github/workflows/failures.yml | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index e04648ab6306..b2835cd36993 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -31,8 +31,7 @@ jobs:
         path: llvm
 
     - name: Install packages
-      # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
-      run: sudo apt-get install ninja-build ripgrep llvm-14-tools
+      run: sudo apt-get install ninja-build ripgrep
 
     - name: Download artifact
       uses: dawidd6/action-download-artifact@v2

From 81c1f39a86295df471d5d7341a15c4bff44c2545 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Tue, 17 Oct 2023 19:38:17 -0500
Subject: [PATCH 419/997] optimize u128/i128 popcounts further

Don't fall back on breaking apart the popcount operation if 128-bit
integers are natively supported.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 src/intrinsic/mod.rs | 25 +++++++++++++++----------
 1 file changed, 15 insertions(+), 10 deletions(-)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 32cc724bb199..69927b28cd5f 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -4,7 +4,7 @@ mod simd;
 #[cfg(feature="master")]
 use std::iter;
 
-use gccjit::{BinaryOp, ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp, FunctionType};
+use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp, FunctionType};
 use rustc_codegen_ssa::MemFlags;
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::common::IntPredicate;
@@ -819,7 +819,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 value
             };
 
-        if value_type.is_u128(&self.cx) {
+        // only break apart 128-bit ints if they're not natively supported
+        // TODO(antoyo): remove this if/when native 128-bit integers land in libgccjit
+        if value_type.is_u128(&self.cx) && !self.cx.supports_128bit_integers {
             let sixty_four = self.gcc_int(value_type, 64);
             let right_shift = self.gcc_lshr(value, sixty_four);
             let high = self.gcc_int_cast(right_shift, self.cx.ulonglong_type);
@@ -842,30 +844,33 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let counter_type = self.int_type;
         let counter = self.current_func().new_local(None, counter_type, "popcount_counter");
         let val = self.current_func().new_local(None, value_type, "popcount_value");
-        let zero = self.context.new_rvalue_zero(counter_type);
+        let zero = self.gcc_zero(counter_type);
         self.llbb().add_assignment(None, counter, zero);
         self.llbb().add_assignment(None, val, value);
         self.br(loop_head);
 
         // check if value isn't zero
         self.switch_to_block(loop_head);
-        let zero = self.context.new_rvalue_zero(value_type);
-        let cond = self.context.new_comparison(None, ComparisonOp::NotEquals, val.to_rvalue(), zero);
+        let zero = self.gcc_zero(value_type);
+        let cond = self.gcc_icmp(IntPredicate::IntNE, val.to_rvalue(), zero);
         self.cond_br(cond, loop_body, loop_tail);
 
         // val &= val - 1;
         self.switch_to_block(loop_body);
-        let sub = val.to_rvalue() - self.context.new_rvalue_one(value_type);
-        loop_body.add_assignment_op(None, val, BinaryOp::BitwiseAnd, sub);
+        let one = self.gcc_int(value_type, 1);
+        let sub = self.gcc_sub(val.to_rvalue(), one);
+        let op = self.gcc_and(val.to_rvalue(), sub);
+        loop_body.add_assignment(None, val, op);
 
         // counter += 1
-        let one = self.context.new_rvalue_one(counter_type);
-        loop_body.add_assignment_op(None, counter, BinaryOp::Plus, one);
+        let one = self.gcc_int(counter_type, 1);
+        let op = self.gcc_add(counter.to_rvalue(), one);
+        loop_body.add_assignment(None, counter, op);
         self.br(loop_head);
 
         // end of loop
         self.switch_to_block(loop_tail);
-        self.context.new_cast(None, counter.to_rvalue(), result_type)
+        self.gcc_int_cast(counter.to_rvalue(), result_type)
     }
 
     // Algorithm from: https://blog.regehr.org/archives/1063

From 7425c560d3e53eb34fbdf8979981566ab8b344d1 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 6 Sep 2023 19:01:04 -0400
Subject: [PATCH 420/997] Add comment

---
 .github/workflows/ci.yml                      |   8 -
 .github/workflows/failures.yml                |   8 -
 .github/workflows/gcc12.yml                   |   8 -
 .github/workflows/m68k.yml                    | 139 ++++++++++++++++
 .github/workflows/release.yml                 |   8 -
 .github/workflows/stdarch.yml                 |   8 -
 Readme.md                                     |  37 +++--
 build_sysroot/build_sysroot.sh                |   2 +-
 build_system/src/build.rs                     |  36 ++---
 build_system/src/config.rs                    |  36 +++--
 build_system/src/prepare.rs                   |  19 ++-
 config.sh                                     |  25 ++-
 ...001-Disable-libstd-and-libtest-dylib.patch |  39 +++++
 example/alloc_system.rs                       |   1 +
 example/mini_core_hello_world.rs              |   6 +-
 example/std_example.rs                        |  13 ++
 src/base.rs                                   |   7 +-
 src/context.rs                                |  28 ++--
 src/gcc_util.rs                               |   9 +-
 src/int.rs                                    | 152 ++++++++++++------
 src/intrinsic/mod.rs                          |  20 +--
 src/lib.rs                                    |   5 +-
 src/type_.rs                                  |   4 +-
 test.sh                                       |  36 ++++-
 tests/lang_tests_common.rs                    |  48 +++++-
 tests/run/asm.rs                              |  14 +-
 tests/run/empty_main.rs                       |   2 +-
 tests/run/int_overflow.rs                     | 138 ++--------------
 28 files changed, 523 insertions(+), 333 deletions(-)
 create mode 100644 .github/workflows/m68k.yml
 create mode 100644 cross_patches/0001-Disable-libstd-and-libtest-dylib.patch

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index a38120e26f8d..65e7a697ab0d 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -37,11 +37,6 @@ jobs:
     steps:
     - uses: actions/checkout@v3
 
-    - uses: actions/checkout@v3
-      with:
-        repository: llvm/llvm-project
-        path: llvm
-
     - name: Install packages
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
       run: sudo apt-get install ninja-build ripgrep llvm-14-tools
@@ -68,9 +63,6 @@ jobs:
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
 
-    - name: Set RUST_COMPILER_RT_ROOT
-      run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
-
     - name: Cache cargo installed crates
       uses: actions/cache@v3
       with:
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index b2835cd36993..e6a9716d18cc 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -25,11 +25,6 @@ jobs:
     steps:
     - uses: actions/checkout@v3
 
-    - uses: actions/checkout@v3
-      with:
-        repository: llvm/llvm-project
-        path: llvm
-
     - name: Install packages
       run: sudo apt-get install ninja-build ripgrep
 
@@ -55,9 +50,6 @@ jobs:
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
 
-    - name: Set RUST_COMPILER_RT_ROOT
-      run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
-
     - name: Cache cargo installed crates
       uses: actions/cache@v3
       with:
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index 59e0c5ad234d..295f43acb385 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -37,11 +37,6 @@ jobs:
     steps:
     - uses: actions/checkout@v3
 
-    - uses: actions/checkout@v3
-      with:
-        repository: llvm/llvm-project
-        path: llvm
-
     - name: Install packages
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
       run: sudo apt-get install ninja-build ripgrep llvm-14-tools libgccjit-12-dev
@@ -55,9 +50,6 @@ jobs:
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
 
-    - name: Set RUST_COMPILER_RT_ROOT
-      run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
-
     - name: Cache cargo installed crates
       uses: actions/cache@v3
       with:
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
new file mode 100644
index 000000000000..55ee0a212142
--- /dev/null
+++ b/.github/workflows/m68k.yml
@@ -0,0 +1,139 @@
+# TODO: check if qemu-user-static-binfmt is needed (perhaps to run some tests since it probably calls exec).
+
+name: m68k CI
+
+on:
+  - push
+  - pull_request
+
+permissions:
+  contents: read
+
+env:
+  # Enable backtraces for easier debugging
+  RUST_BACKTRACE: 1
+  # TODO: remove when confish.sh is removed.
+  OVERWRITE_TARGET_TRIPLE: m68k-unknown-linux-gnu
+
+jobs:
+  build:
+    runs-on: ubuntu-22.04
+
+    strategy:
+      fail-fast: false
+      matrix:
+        commands: [
+          "--mini-tests",
+          "--std-tests",
+          # TODO(antoyo): fix those on m68k.
+          #"--test-libcore",
+          #"--extended-rand-tests",
+          #"--extended-regex-example-tests",
+          #"--extended-regex-tests",
+          #"--test-successful-rustc --nb-parts 2 --current-part 0",
+          #"--test-successful-rustc --nb-parts 2 --current-part 1",
+          #"--test-failing-rustc",
+        ]
+
+    steps:
+    - name: Install packages
+      run: |
+        sudo apt-get update
+        sudo apt-get install qemu qemu-user-static
+
+    - uses: actions/checkout@v3
+
+    - name: Download GCC artifact
+      uses: dawidd6/action-download-artifact@v2
+      with:
+          workflow: m68k.yml
+          name: gcc-m68k-13
+          repo: cross-cg-gcc-tools/cross-gcc
+          branch: master
+          event: push
+
+    - name: Download VM artifact
+      uses: dawidd6/action-download-artifact@v2
+      with:
+          workflow: m68k.yml
+          name: debian-m68k
+          repo: cross-cg-gcc-tools/vms
+          branch: master
+          event: push
+
+    - name: Setup path to libgccjit
+      run: |
+          sudo dpkg -i gcc-m68k-13.deb
+          echo /usr/lib/ > gcc_path
+
+    - name: Set env
+      run: |
+        echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
+        echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
+        echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+
+    - name: Cache cargo installed crates
+      uses: actions/cache@v3
+      with:
+        path: ~/.cargo/bin
+        key: cargo-installed-crates2-ubuntu-latest
+
+    #- name: Cache cargo registry
+      #uses: actions/cache@v3
+      #with:
+        #path: ~/.cargo/registry
+        #key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
+
+    #- name: Cache cargo index
+      #uses: actions/cache@v3
+      #with:
+        #path: ~/.cargo/git
+        #key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
+
+    - name: Cache cargo target dir
+      uses: actions/cache@v3
+      with:
+        path: target
+        key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
+
+    #- name: Cache rust repository
+      ## We only clone the rust repository for rustc tests
+      #if: ${{ contains(matrix.commands, 'rustc') }}
+      #uses: actions/cache@v3
+      #id: cache-rust-repository
+      #with:
+        #path: rust
+        #key: ${{ runner.os }}-packages-${{ hashFiles('rust/.git/HEAD') }}
+
+    - name: Prepare VM
+      run: |
+        mkdir vm
+        sudo mount debian-m68k.img vm
+        sudo cp $(which qemu-m68k-static) vm/usr/bin/
+
+    - name: Build
+      run: |
+        ./y.sh prepare --only-libcore --cross
+        ./y.sh build --target-triple m68k-unknown-linux-gnu
+        CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu cargo test
+        ./clean_all.sh
+
+    - name: Prepare dependencies
+      run: |
+        git config --global user.email "user@example.com"
+        git config --global user.name "User"
+        ./y.sh prepare --cross
+
+    # Compile is a separate step, as the actions-rs/cargo action supports error annotations
+    - name: Compile
+      uses: actions-rs/cargo@v1.0.3
+      with:
+        command: build
+        args: --release
+
+    - name: Add more failing tests because the sysroot is not compiled with LTO
+      run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
+
+    - name: Run tests
+      run: |
+        ./test.sh --release --clean --build-sysroot ${{ matrix.commands }}
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index bd0415040e7e..ae1134177a77 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -26,11 +26,6 @@ jobs:
     steps:
     - uses: actions/checkout@v3
 
-    - uses: actions/checkout@v3
-      with:
-        repository: llvm/llvm-project
-        path: llvm
-
     - name: Install packages
       run: sudo apt-get install ninja-build ripgrep
 
@@ -56,9 +51,6 @@ jobs:
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
 
-    - name: Set RUST_COMPILER_RT_ROOT
-      run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
-
     - name: Cache cargo installed crates
       uses: actions/cache@v3
       with:
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 6c28326823cc..28ac3cb65422 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -26,11 +26,6 @@ jobs:
     steps:
     - uses: actions/checkout@v3
 
-    - uses: actions/checkout@v3
-      with:
-        repository: llvm/llvm-project
-        path: llvm
-
     - name: Install packages
       run: sudo apt-get install ninja-build ripgrep
 
@@ -70,9 +65,6 @@ jobs:
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
 
-    - name: Set RUST_COMPILER_RT_ROOT
-      run: echo "RUST_COMPILER_RT_ROOT="${{ env.workspace }}/llvm/compiler-rt >> $GITHUB_ENV
-
     - name: Cache cargo installed crates
       uses: actions/cache@v3
       with:
diff --git a/Readme.md b/Readme.md
index 6fad0707fbe9..2207bd35edb4 100644
--- a/Readme.md
+++ b/Readme.md
@@ -55,13 +55,6 @@ $ make check-jit RUNTESTFLAGS="-v -v -v jit.exp=jit.dg/test-asm.cc"
 $ dirname $(readlink -f `find . -name libgccjit.so`) > gcc_path
 ```
 
-You also need to set RUST_COMPILER_RT_ROOT:
-
-```bash
-$ git clone https://github.com/llvm/llvm-project llvm --depth 1 --single-branch
-$ export RUST_COMPILER_RT_ROOT="$PWD/llvm/compiler-rt"
-```
-
 Then you can run commands like this:
 
 ```bash
@@ -91,9 +84,17 @@ $ CHANNEL="release" $CG_GCCJIT_DIR/cargo.sh run
 
 If you compiled cg_gccjit in debug mode (aka you didn't pass `--release` to `./test.sh`) you should use `CHANNEL="debug"` instead or omit `CHANNEL="release"` completely.
 
+### LTO
+
 To use LTO, you need to set the variable `FAT_LTO=1` and `EMBED_LTO_BITCODE=1` in addition to setting `lto = "fat"` in the `Cargo.toml`.
 Don't set `FAT_LTO` when compiling the sysroot, though: only set `EMBED_LTO_BITCODE=1`.
 
+Failing to set `EMBED_LTO_BITCODE` will give you the following error:
+
+```
+error: failed to copy bitcode to object file: No such file or directory (os error 2)
+```
+
 ### Rustc
 
 > You should prefer using the Cargo method.
@@ -313,16 +314,20 @@ generate it in [gimple.md](./doc/gimple.md).
 
 #### Building libgccjit
 
- * Follow these instructions: https://preshing.com/20141119/how-to-build-a-gcc-cross-compiler/ with the following changes:
- * Configure gcc with `../gcc/configure --enable-host-shared --disable-multilib --enable-languages=c,jit,c++ --disable-bootstrap --enable-checking=release --prefix=/opt/m68k-gcc/ --target=m68k-linux --without-headers`.
- * Some shells, like fish, don't define the environment variable `$MACHTYPE`.
- * Add `CFLAGS="-Wno-error=attributes -g -O2"` at the end of the configure command for building glibc (`CFLAGS="-Wno-error=attributes -Wno-error=array-parameter -Wno-error=stringop-overflow -Wno-error=array-bounds -g -O2"` for glibc 2.31, which is useful for Debian).
+ * Follow the instructions on [this repo](https://github.com/cross-cg-gcc-tools/cross-gcc).
 
 #### Configuring rustc_codegen_gcc
 
- * Set `TARGET_TRIPLE="m68k-unknown-linux-gnu"` in config.sh.
- * Since rustc doesn't support this architecture yet, set it back to `TARGET_TRIPLE="mips-unknown-linux-gnu"` (or another target having the same attributes). Alternatively, create a [target specification file](https://book.avr-rust.com/005.1-the-target-specification-json-file.html) (note that the `arch` specified in this file must be supported by the rust compiler).
- * Set `linker='-Clinker=m68k-linux-gcc'`.
+ * Run `./y.sh prepare --cross` so that the sysroot is patched for the cross-compiling case.
  * Set the path to the cross-compiling libgccjit in `gcc_path`.
- * Comment the line: `context.add_command_line_option("-masm=intel");` in src/base.rs.
- * (might not be necessary) Disable the compilation of libstd.so (and possibly libcore.so?): Remove dylib from build_sysroot/sysroot_src/library/std/Cargo.toml.
+ * Make sure you have the linker for your target (for instance `m68k-unknown-linux-gnu-gcc`) in your `$PATH`. Currently, the linker name is hardcoded as being `$TARGET-gcc`. Specify the target when building the sysroot: `./y.sh build --target-triple m68k-unknown-linux-gnu`.
+ * Build your project by specifying the target: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../cargo.sh build --target m68k-unknown-linux-gnu`.
+ * If the target is not yet supported by the Rust compiler, create a [target specification file](https://docs.rust-embedded.org/embedonomicon/custom-target.html) (note that the `arch` specified in this file must be supported by the rust compiler).
+
+If you get the following error:
+
+```
+/usr/bin/ld: unrecognised emulation mode: m68kelf
+```
+
+Make sure you set `gcc_path` to the install directory.
diff --git a/build_sysroot/build_sysroot.sh b/build_sysroot/build_sysroot.sh
index 851e9895ce2b..116fd36e7a7b 100755
--- a/build_sysroot/build_sysroot.sh
+++ b/build_sysroot/build_sysroot.sh
@@ -22,7 +22,7 @@ if [[ "$1" == "--release" ]]; then
     RUSTFLAGS="$RUSTFLAGS -Zmir-opt-level=3" cargo build --target $TARGET_TRIPLE --release
 else
     sysroot_channel='debug'
-    cargo build --target $TARGET_TRIPLE --features compiler_builtins/c
+    cargo build --target $TARGET_TRIPLE
 fi
 
 # Copy files to sysroot
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 0428c6b2cdae..b013ca80705d 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -11,7 +11,7 @@ use std::path::Path;
 struct BuildArg {
     codegen_release_channel: bool,
     sysroot_release_channel: bool,
-    features: Vec<String>,
+    flags: Vec<String>,
     gcc_path: String,
 }
 
@@ -30,12 +30,12 @@ impl BuildArg {
                 "--release" => build_arg.codegen_release_channel = true,
                 "--release-sysroot" => build_arg.sysroot_release_channel = true,
                 "--no-default-features" => {
-                    build_arg.features.push("--no-default-features".to_string());
+                    build_arg.flags.push("--no-default-features".to_string());
                 }
                 "--features" => {
                     if let Some(arg) = args.next() {
-                        build_arg.features.push("--features".to_string());
-                        build_arg.features.push(arg.as_str().into());
+                        build_arg.flags.push("--features".to_string());
+                        build_arg.flags.push(arg.as_str().into());
                     } else {
                         return Err(
                             "Expected a value after `--features`, found nothing".to_string()
@@ -46,6 +46,15 @@ impl BuildArg {
                     Self::usage();
                     return Ok(None);
                 }
+                "--target-triple" => {
+                    if args.next().is_some() {
+                        // Handled in config.rs.
+                    } else {
+                        return Err(
+                            "Expected a value after `--target-triple`, found nothing".to_string()
+                        );
+                    }
+                }
                 arg => return Err(format!("Unknown argument `{}`", arg)),
             }
         }
@@ -61,6 +70,7 @@ impl BuildArg {
     --release-sysroot      : Build sysroot in release mode
     --no-default-features  : Add `--no-default-features` flag
     --features [arg]       : Add a new feature [arg]
+    --target-triple [arg]  : Set the target triple to [arg]
     --help                 : Show this help
 "#
         )
@@ -147,8 +157,6 @@ fn build_sysroot(
                 &"build",
                 &"--target",
                 &target_triple,
-                &"--features",
-                &"compiler_builtins/c",
             ],
             None,
             Some(env),
@@ -175,16 +183,6 @@ fn build_sysroot(
 fn build_codegen(args: &BuildArg) -> Result<(), String> {
     let mut env = HashMap::new();
 
-    let current_dir =
-        std::env::current_dir().map_err(|error| format!("`current_dir` failed: {:?}", error))?;
-    if let Ok(rt_root) = std::env::var("RUST_COMPILER_RT_ROOT") {
-        env.insert("RUST_COMPILER_RT_ROOT".to_string(), rt_root);
-    } else {
-        env.insert(
-            "RUST_COMPILER_RT_ROOT".to_string(),
-            format!("{}", current_dir.join("llvm/compiler-rt").display()),
-        );
-    }
     env.insert("LD_LIBRARY_PATH".to_string(), args.gcc_path.clone());
     env.insert("LIBRARY_PATH".to_string(), args.gcc_path.clone());
 
@@ -196,9 +194,9 @@ fn build_codegen(args: &BuildArg) -> Result<(), String> {
     } else {
         env.insert("CHANNEL".to_string(), "debug".to_string());
     }
-    let ref_features = args.features.iter().map(|s| s.as_str()).collect::<Vec<_>>();
-    for feature in &ref_features {
-        command.push(feature);
+    let flags = args.flags.iter().map(|s| s.as_str()).collect::<Vec<_>>();
+    for flag in &flags {
+        command.push(flag);
     }
     run_command_with_output_and_env(&command, None, Some(&env))?;
 
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 4f2e33f0f998..0f77943476fe 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -5,7 +5,6 @@ use std::env as std_env;
 pub struct ConfigInfo {
     pub target_triple: String,
     pub rustc_command: Vec<String>,
-    pub run_wrapper: Option<&'static str>,
 }
 
 // Returns the beginning for the command line of rustc.
@@ -30,22 +29,28 @@ pub fn set_config(
     };
     let host_triple = get_rustc_host_triple()?;
     let mut linker = None;
-    let mut target_triple = host_triple.as_str();
-    let mut run_wrapper = None;
-    // FIXME: handle this with a command line flag?
-    // let mut target_triple = "m68k-unknown-linux-gnu";
+    let mut target_triple = host_triple.clone();
+
+    // We skip binary name and the command.
+    let mut args = std::env::args().skip(2);
+
+    while let Some(arg) = args.next() {
+        match arg.as_str() {
+            "--target-triple" => {
+                if let Some(arg) = args.next() {
+                    target_triple = arg;
+                } else {
+                    return Err(
+                        "Expected a value after `--target-triple`, found nothing".to_string()
+                    );
+                }
+            },
+            _ => (),
+        }
+    }
 
     if host_triple != target_triple {
-        if target_triple == "m68k-unknown-linux-gnu" {
-            target_triple = "mips-unknown-linux-gnu";
-            linker = Some("-Clinker=m68k-linux-gcc");
-        } else if target_triple == "aarch64-unknown-linux-gnu" {
-            // We are cross-compiling for aarch64. Use the correct linker and run tests in qemu.
-            linker = Some("-Clinker=aarch64-linux-gnu-gcc");
-            run_wrapper = Some("qemu-aarch64 -L /usr/aarch64-linux-gnu");
-        } else {
-            return Err(format!("unknown non-native platform `{}`", target_triple));
-        }
+        linker = Some(format!("-Clinker={}-gcc", target_triple));
     }
     let current_dir =
         std_env::current_dir().map_err(|error| format!("`current_dir` failed: {:?}", error))?;
@@ -120,6 +125,5 @@ pub fn set_config(
     Ok(ConfigInfo {
         target_triple: target_triple.to_string(),
         rustc_command,
-        run_wrapper,
     })
 }
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index b258ddf36648..d5d034c419c6 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -4,7 +4,7 @@ use crate::utils::{cargo_install, git_clone, run_command, run_command_with_outpu
 use std::fs;
 use std::path::Path;
 
-fn prepare_libcore(sysroot_path: &Path) -> Result<(), String> {
+fn prepare_libcore(sysroot_path: &Path, cross_compile: bool) -> Result<(), String> {
     let rustc_path = match get_rustc_path() {
         Some(path) => path,
         None => return Err("`rustc` path not found".to_string()),
@@ -87,6 +87,12 @@ fn prepare_libcore(sysroot_path: &Path) -> Result<(), String> {
             Ok(())
         },
     )?;
+    if cross_compile {
+        walk_dir("cross_patches", |_| Ok(()), |file_path: &Path| {
+            patches.push(file_path.to_path_buf());
+            Ok(())
+        })?;
+    }
     patches.sort();
     for file_path in patches {
         println!("[GIT] apply `{}`", file_path.display());
@@ -156,16 +162,19 @@ where
 }
 
 struct PrepareArg {
+    cross_compile: bool,
     only_libcore: bool,
 }
 
 impl PrepareArg {
     fn new() -> Result<Option<Self>, String> {
         let mut only_libcore = false;
+        let mut cross_compile = false;
 
         for arg in std::env::args().skip(2) {
             match arg.as_str() {
                 "--only-libcore" => only_libcore = true,
+                "--cross" => cross_compile = true,
                 "--help" => {
                     Self::usage();
                     return Ok(None);
@@ -173,7 +182,10 @@ impl PrepareArg {
                 a => return Err(format!("Unknown argument `{a}`")),
             }
         }
-        Ok(Some(Self { only_libcore }))
+        Ok(Some(Self {
+            cross_compile,
+            only_libcore,
+        }))
     }
 
     fn usage() {
@@ -182,6 +194,7 @@ impl PrepareArg {
 `prepare` command help:
 
     --only-libcore  : Only setup libcore and don't clone other repositories
+    --cross         : Apply the patches needed to do cross-compilation
     --help          : Show this help
 "#
         )
@@ -194,7 +207,7 @@ pub fn run() -> Result<(), String> {
         None => return Ok(()),
     };
     let sysroot_path = Path::new("build_sysroot");
-    prepare_libcore(sysroot_path)?;
+    prepare_libcore(sysroot_path, args.cross_compile)?;
 
     if !args.only_libcore {
         cargo_install("hyperfine")?;
diff --git a/config.sh b/config.sh
index c686df0c72a2..99ee9b054c6f 100644
--- a/config.sh
+++ b/config.sh
@@ -20,22 +20,21 @@ else
 fi
 
 HOST_TRIPLE=$(rustc -vV | grep host | cut -d: -f2 | tr -d " ")
-TARGET_TRIPLE=$HOST_TRIPLE
-#TARGET_TRIPLE="m68k-unknown-linux-gnu"
+# TODO: remove $OVERWRITE_TARGET_TRIPLE when config.sh is removed.
+TARGET_TRIPLE="${OVERWRITE_TARGET_TRIPLE:-$HOST_TRIPLE}"
 
 linker=''
 RUN_WRAPPER=''
 if [[ "$HOST_TRIPLE" != "$TARGET_TRIPLE" ]]; then
-   if [[ "$TARGET_TRIPLE" == "m68k-unknown-linux-gnu" ]]; then
-       TARGET_TRIPLE="mips-unknown-linux-gnu"
-       linker='-Clinker=m68k-linux-gcc'
-   elif [[ "$TARGET_TRIPLE" == "aarch64-unknown-linux-gnu" ]]; then
-      # We are cross-compiling for aarch64. Use the correct linker and run tests in qemu.
-      linker='-Clinker=aarch64-linux-gnu-gcc'
-      RUN_WRAPPER='qemu-aarch64 -L /usr/aarch64-linux-gnu'
-   else
-      echo "Unknown non-native platform"
-   fi
+    RUN_WRAPPER=run_in_vm
+    if [[ "$TARGET_TRIPLE" == "m68k-unknown-linux-gnu" ]]; then
+        linker='-Clinker=m68k-unknown-linux-gnu-gcc'
+    elif [[ "$TARGET_TRIPLE" == "aarch64-unknown-linux-gnu" ]]; then
+        # We are cross-compiling for aarch64. Use the correct linker and run tests in qemu.
+        linker='-Clinker=aarch64-linux-gnu-gcc'
+    else
+        echo "Unknown non-native platform"
+    fi
 fi
 
 # Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
@@ -60,4 +59,4 @@ export DYLD_LIBRARY_PATH=$LD_LIBRARY_PATH
 # NOTE: To avoid the -fno-inline errors, use /opt/gcc/bin/gcc instead of cc.
 # To do so, add a symlink for cc to /opt/gcc/bin/gcc in our PATH.
 # Another option would be to add the following Rust flag: -Clinker=/opt/gcc/bin/gcc
-export PATH="/opt/gcc/bin:$PATH"
+export PATH="/opt/gcc/bin:/opt/m68k-unknown-linux-gnu/bin:$PATH"
diff --git a/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch b/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch
new file mode 100644
index 000000000000..74d9c208a05a
--- /dev/null
+++ b/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch
@@ -0,0 +1,39 @@
+From 966beefe08be6045bfcca26079b76a7a80413080 Mon Sep 17 00:00:00 2001
+From: None <none@example.com>
+Date: Thu, 28 Sep 2023 17:37:38 -0400
+Subject: [PATCH] Disable libstd and libtest dylib
+
+---
+ library/std/Cargo.toml  | 2 +-
+ library/test/Cargo.toml | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/library/std/Cargo.toml b/library/std/Cargo.toml
+index 5b21355..cb0c49b 100644
+--- a/library/std/Cargo.toml
++++ b/library/std/Cargo.toml
+@@ -9,7 +9,7 @@ description = "The Rust Standard Library"
+ edition = "2021"
+ 
+ [lib]
+-crate-type = ["dylib", "rlib"]
++crate-type = ["rlib"]
+ 
+ [dependencies]
+ alloc = { path = "../alloc", public = true }
+diff --git a/library/test/Cargo.toml b/library/test/Cargo.toml
+index 91a1abd..a58c160 100644
+--- a/library/test/Cargo.toml
++++ b/library/test/Cargo.toml
+@@ -4,7 +4,7 @@ version = "0.0.0"
+ edition = "2021"
+ 
+ [lib]
+-crate-type = ["dylib", "rlib"]
++crate-type = ["rlib"]
+ 
+ [dependencies]
+ getopts = { version = "0.2.21", features = ['rustc-dep-of-std'] }
+-- 
+2.42.0
+
diff --git a/example/alloc_system.rs b/example/alloc_system.rs
index 56ff84e4bdfb..201e4c73675c 100644
--- a/example/alloc_system.rs
+++ b/example/alloc_system.rs
@@ -9,6 +9,7 @@
 // add fast paths for low alignment values.
 #[cfg(any(target_arch = "x86",
               target_arch = "arm",
+              target_arch = "m68k",
               target_arch = "mips",
               target_arch = "mips32r6",
               target_arch = "powerpc",
diff --git a/example/mini_core_hello_world.rs b/example/mini_core_hello_world.rs
index c3aea5718154..40a1ad22c0e1 100644
--- a/example/mini_core_hello_world.rs
+++ b/example/mini_core_hello_world.rs
@@ -152,7 +152,8 @@ fn main() {
     let slice = &[0, 1] as &[i32];
     let slice_ptr = slice as *const [i32] as *const i32;
 
-    assert_eq!(slice_ptr as usize % 4, 0);
+    let align = intrinsics::min_align_of::<*const i32>();
+    assert_eq!(slice_ptr as usize % align, 0);
 
     //return;
 
@@ -186,7 +187,10 @@ fn main() {
         let a: &dyn SomeTrait = &"abc\0";
         a.object_safe();
 
+        #[cfg(target_arch="x86_64")]
         assert_eq!(intrinsics::size_of_val(a) as u8, 16);
+        #[cfg(target_arch="m68k")]
+        assert_eq!(intrinsics::size_of_val(a) as u8, 8);
         assert_eq!(intrinsics::size_of_val(&0u32) as u8, 4);
 
         assert_eq!(intrinsics::min_align_of::<u16>() as u8, 2);
diff --git a/example/std_example.rs b/example/std_example.rs
index 18f2ddcde126..2d57866c1d17 100644
--- a/example/std_example.rs
+++ b/example/std_example.rs
@@ -1,6 +1,7 @@
 #![feature(core_intrinsics, generators, generator_trait, is_sorted)]
 
 #[cfg(feature="master")]
+#[cfg(target_arch="x86_64")]
 use std::arch::x86_64::*;
 use std::io::Write;
 use std::ops::Generator;
@@ -95,6 +96,7 @@ fn main() {
 
     println!("{:?}", std::intrinsics::caller_location());
 
+    #[cfg(target_arch="x86_64")]
     #[cfg(feature="master")]
     unsafe {
         test_simd();
@@ -108,6 +110,7 @@ fn main() {
 }
 
 #[cfg(feature="master")]
+#[cfg(target_arch="x86_64")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_simd() {
     let x = _mm_setzero_si128();
@@ -136,6 +139,7 @@ unsafe fn test_simd() {
 }
 
 #[cfg(feature="master")]
+#[cfg(target_arch="x86_64")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_slli_si128() {
     #[rustfmt::skip]
@@ -164,6 +168,7 @@ unsafe fn test_mm_slli_si128() {
 
 
 #[cfg(feature="master")]
+#[cfg(target_arch="x86_64")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_movemask_epi8() {
     #[rustfmt::skip]
@@ -178,6 +183,7 @@ unsafe fn test_mm_movemask_epi8() {
 }
 
 #[cfg(feature="master")]
+#[cfg(target_arch="x86_64")]
 #[target_feature(enable = "avx2")]
 unsafe fn test_mm256_movemask_epi8() {
     let a = _mm256_set1_epi8(-1);
@@ -187,6 +193,7 @@ unsafe fn test_mm256_movemask_epi8() {
 }
 
 #[cfg(feature="master")]
+#[cfg(target_arch="x86_64")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_add_epi8() {
     let a = _mm_setr_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
@@ -203,6 +210,7 @@ unsafe fn test_mm_add_epi8() {
 }
 
 #[cfg(feature="master")]
+#[cfg(target_arch="x86_64")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_add_pd() {
     let a = _mm_setr_pd(1.0, 2.0);
@@ -212,6 +220,7 @@ unsafe fn test_mm_add_pd() {
 }
 
 #[cfg(feature="master")]
+#[cfg(target_arch="x86_64")]
 fn assert_eq_m128i(x: std::arch::x86_64::__m128i, y: std::arch::x86_64::__m128i) {
     unsafe {
         assert_eq!(std::mem::transmute::<_, [u8; 16]>(x), std::mem::transmute::<_, [u8; 16]>(y));
@@ -219,6 +228,7 @@ fn assert_eq_m128i(x: std::arch::x86_64::__m128i, y: std::arch::x86_64::__m128i)
 }
 
 #[cfg(feature="master")]
+#[cfg(target_arch="x86_64")]
 #[target_feature(enable = "sse2")]
 pub unsafe fn assert_eq_m128d(a: __m128d, b: __m128d) {
     if _mm_movemask_pd(_mm_cmpeq_pd(a, b)) != 0b11 {
@@ -227,6 +237,7 @@ pub unsafe fn assert_eq_m128d(a: __m128d, b: __m128d) {
 }
 
 #[cfg(feature="master")]
+#[cfg(target_arch="x86_64")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_cvtsi128_si64() {
     let r = _mm_cvtsi128_si64(std::mem::transmute::<[i64; 2], _>([5, 0]));
@@ -234,6 +245,7 @@ unsafe fn test_mm_cvtsi128_si64() {
 }
 
 #[cfg(feature="master")]
+#[cfg(target_arch="x86_64")]
 #[target_feature(enable = "sse4.1")]
 unsafe fn test_mm_cvtepi8_epi16() {
     let a = _mm_set1_epi8(10);
@@ -247,6 +259,7 @@ unsafe fn test_mm_cvtepi8_epi16() {
 }
 
 #[cfg(feature="master")]
+#[cfg(target_arch="x86_64")]
 #[target_feature(enable = "sse4.1")]
 unsafe fn test_mm_extract_epi8() {
     #[rustfmt::skip]
diff --git a/src/base.rs b/src/base.rs
index 61da38f4b0db..3152357fe492 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -98,10 +98,11 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
             .map(|string| &string[1..])
             .collect();
 
-        // TODO(antoyo): only set on x86 platforms.
-        context.add_command_line_option("-masm=intel");
+        if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" {
+            context.add_command_line_option("-masm=intel");
+        }
 
-        if !disabled_features.contains("avx") {
+        if !disabled_features.contains("avx") && tcx.sess.target.arch == "x86_64" {
             // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for
             // SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead.
             // FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar.
diff --git a/src/context.rs b/src/context.rs
index 243556a0e523..a043660ea632 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -20,6 +20,7 @@ use rustc_target::abi::{call::FnAbi, HasDataLayout, PointeeInfo, Size, TargetDat
 use rustc_target::spec::{HasTargetSpec, Target, TlsModel};
 
 use crate::callee::get_fn;
+use crate::common::SignType;
 
 #[derive(Clone)]
 pub struct FuncSig<'gcc> {
@@ -165,13 +166,21 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
                 (i128_type, u128_type)
             }
             else {
-                let i128_type = context.new_array_type(None, i64_type, 2);
-                let u128_type = context.new_array_type(None, u64_type, 2);
+                /*let layout = tcx.layout_of(ParamEnv::reveal_all().and(tcx.types.i128)).unwrap();
+                let i128_align = layout.align.abi.bytes();
+                let layout = tcx.layout_of(ParamEnv::reveal_all().and(tcx.types.u128)).unwrap();
+                let u128_align = layout.align.abi.bytes();*/
+
+                // TODO(antoyo): re-enable the alignment when libgccjit fixed the issue in
+                // gcc_jit_context_new_array_constructor (it should not use reinterpret_cast).
+                let i128_type = context.new_array_type(None, i64_type, 2)/*.get_aligned(i128_align)*/;
+                let u128_type = context.new_array_type(None, u64_type, 2)/*.get_aligned(u128_align)*/;
                 (i128_type, u128_type)
             };
 
         let tls_model = to_gcc_tls_mode(tcx.sess.tls_model());
 
+        // TODO(antoyo): set alignment on those types as well.
         let float_type = context.new_type::<f32>();
         let double_type = context.new_type::<f64>();
 
@@ -187,14 +196,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let ulonglong_type = context.new_c_type(CType::ULongLong);
         let sizet_type = context.new_c_type(CType::SizeT);
 
-        let isize_type = context.new_c_type(CType::LongLong);
-        let usize_type = context.new_c_type(CType::ULongLong);
+        let usize_type = sizet_type;
+        let isize_type = usize_type;
         let bool_type = context.new_type::<bool>();
 
-        // TODO(antoyo): only have those assertions on x86_64.
-        assert_eq!(isize_type.get_size(), i64_type.get_size());
-        assert_eq!(usize_type.get_size(), u64_type.get_size());
-
         let mut functions = FxHashMap::default();
         let builtins = [
             "__builtin_unreachable", "abort", "__builtin_expect", "__builtin_add_overflow", "__builtin_mul_overflow",
@@ -212,7 +217,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             functions.insert(builtin.to_string(), context.get_builtin_function(builtin));
         }
 
-        Self {
+        let mut cx = Self {
             check_overflow,
             codegen_unit,
             context,
@@ -274,7 +279,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             pointee_infos: Default::default(),
             structs_as_pointer: Default::default(),
             cleanup_blocks: Default::default(),
-        }
+        };
+        // TODO(antoyo): instead of doing this, add SsizeT to libgccjit.
+        cx.isize_type = usize_type.to_signed(&cx);
+        cx
     }
 
     pub fn rvalue_as_function(&self, value: RValue<'gcc>) -> Function<'gcc> {
diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 0514c9988e0f..1248fdcd2599 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -198,9 +198,16 @@ pub fn check_tied_features(sess: &Session, features: &FxHashMap<&str, bool>) ->
     None
 }
 
+fn arch_to_gcc(name: &str) -> &str {
+    match name {
+        "M68020" => "68020",
+         _ => name,
+    }
+}
+
 fn handle_native(name: &str) -> &str {
     if name != "native" {
-        return name;
+        return arch_to_gcc(name);
     }
 
     #[cfg(feature="master")]
diff --git a/src/int.rs b/src/int.rs
index 5719f6a8cf50..ea8550d20f36 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -7,7 +7,9 @@ use std::convert::TryFrom;
 use gccjit::{ComparisonOp, FunctionType, RValue, ToRValue, Type, UnaryOp, BinaryOp};
 use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
 use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeMethods, BuilderMethods, OverflowOp};
-use rustc_middle::ty::Ty;
+use rustc_middle::ty::{ParamEnv, Ty};
+use rustc_target::abi::{Endian, call::{ArgAbi, ArgAttributes, Conv, FnAbi, PassMode}};
+use rustc_target::spec;
 
 use crate::builder::ToGccComp;
 use crate::{builder::Builder, common::{SignType, TypeReflection}, context::CodegenCx};
@@ -37,11 +39,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         }
         else {
             let element_type = typ.dyncast_array().expect("element type");
-            let values = [
+            self.from_low_high_rvalues(typ,
                 self.cx.context.new_unary_op(None, UnaryOp::BitwiseNegate, element_type, self.low(a)),
                 self.cx.context.new_unary_op(None, UnaryOp::BitwiseNegate, element_type, self.high(a)),
-            ];
-            self.cx.context.new_array_constructor(None, typ, &values)
+            )
         }
     }
 
@@ -100,7 +101,6 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let condition = self.gcc_icmp(IntPredicate::IntNE, self.gcc_and(b, sixty_four), zero);
             self.llbb().end_with_conditional(None, condition, then_block, else_block);
 
-            // TODO(antoyo): take endianness into account.
             let shift_value = self.gcc_sub(b, sixty_four);
             let high = self.high(a);
             let sign =
@@ -110,11 +110,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 else {
                     zero
                 };
-            let values = [
-                high >> shift_value,
-                sign,
-            ];
-            let array_value = self.context.new_array_constructor(None, a_type, &values);
+            let array_value = self.from_low_high_rvalues(a_type, high >> shift_value, sign);
             then_block.add_assignment(None, result, array_value);
             then_block.end_with_jump(None, after_block);
 
@@ -130,11 +126,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let casted_low = self.context.new_cast(None, self.low(a), unsigned_type);
             let shifted_low = casted_low >> self.context.new_cast(None, b, unsigned_type);
             let shifted_low = self.context.new_cast(None, shifted_low, native_int_type);
-            let values = [
+            let array_value = self.from_low_high_rvalues(a_type,
                 (high << shift_value) | shifted_low,
                 high >> b,
-            ];
-            let array_value = self.context.new_array_constructor(None, a_type, &values);
+            );
             actual_else_block.add_assignment(None, result, array_value);
             actual_else_block.end_with_jump(None, after_block);
 
@@ -314,18 +309,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                                         _ => unreachable!(),
                                     },
                             };
-                        let a_type = lhs.get_type();
-                        let b_type = rhs.get_type();
-                        let param_a = self.context.new_parameter(None, a_type, "a");
-                        let param_b = self.context.new_parameter(None, b_type, "b");
-                        let result_field = self.context.new_field(None, a_type, "result");
-                        let overflow_field = self.context.new_field(None, self.bool_type, "overflow");
-                        let return_type = self.context.new_struct_type(None, "result_overflow", &[result_field, overflow_field]);
-                        let func = self.context.new_function(None, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false);
-                        let result = self.context.new_call(None, func, &[lhs, rhs]);
-                        let overflow = result.access_field(None, overflow_field);
-                        let int_result = result.access_field(None, result_field);
-                        return (int_result, overflow);
+                        return self.operation_with_overflow(func_name, lhs, rhs);
                     },
                     _ => {
                         match oop {
@@ -350,6 +334,54 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         (res.dereference(None).to_rvalue(), overflow)
     }
 
+    pub fn operation_with_overflow(&self, func_name: &str, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
+        let a_type = lhs.get_type();
+        let b_type = rhs.get_type();
+        let param_a = self.context.new_parameter(None, a_type, "a");
+        let param_b = self.context.new_parameter(None, b_type, "b");
+        let result_field = self.context.new_field(None, a_type, "result");
+        let overflow_field = self.context.new_field(None, self.bool_type, "overflow");
+
+        let ret_ty = Ty::new_tup(self.tcx, &[self.tcx.types.i128, self.tcx.types.bool]);
+        let layout = self.tcx.layout_of(ParamEnv::reveal_all().and(ret_ty)).unwrap();
+
+        let arg_abi = ArgAbi {
+            layout,
+            mode: PassMode::Direct(ArgAttributes::new()),
+        };
+        let mut fn_abi = FnAbi {
+            args: vec![arg_abi.clone(), arg_abi.clone()].into_boxed_slice(),
+            ret: arg_abi,
+            c_variadic: false,
+            fixed_count: 2,
+            conv: Conv::C,
+            can_unwind: false,
+        };
+        fn_abi.adjust_for_foreign_abi(self.cx, spec::abi::Abi::C {
+            unwind: false,
+        }).unwrap();
+
+        let indirect = matches!(fn_abi.ret.mode, PassMode::Indirect { .. });
+
+        let return_type = self.context.new_struct_type(None, "result_overflow", &[result_field, overflow_field]);
+        let result =
+            if indirect {
+                let return_value = self.current_func().new_local(None, return_type.as_type(), "return_value");
+                let return_param_type = return_type.as_type().make_pointer();
+                let return_param = self.context.new_parameter(None, return_param_type, "return_value");
+                let func = self.context.new_function(None, FunctionType::Extern, self.type_void(), &[return_param, param_a, param_b], func_name, false);
+                self.llbb().add_eval(None, self.context.new_call(None, func, &[return_value.get_address(None), lhs, rhs]));
+                return_value.to_rvalue()
+            }
+            else {
+                let func = self.context.new_function(None, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false);
+                self.context.new_call(None, func, &[lhs, rhs])
+            };
+        let overflow = result.access_field(None, overflow_field);
+        let int_result = result.access_field(None, result_field);
+        return (int_result, overflow);
+    }
+
     pub fn gcc_icmp(&mut self, op: IntPredicate, mut lhs: RValue<'gcc>, mut rhs: RValue<'gcc>) -> RValue<'gcc> {
         let a_type = lhs.get_type();
         let b_type = rhs.get_type();
@@ -468,11 +500,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             a ^ b
         }
         else {
-            let values = [
+            self.from_low_high_rvalues(a_type,
                 self.low(a) ^ self.low(b),
                 self.high(a) ^ self.high(b),
-            ];
-            self.context.new_array_constructor(None, a_type, &values)
+            )
         }
     }
 
@@ -518,12 +549,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let condition = self.gcc_icmp(IntPredicate::IntNE, self.gcc_and(b, sixty_four), zero);
             self.llbb().end_with_conditional(None, condition, then_block, else_block);
 
-            // TODO(antoyo): take endianness into account.
-            let values = [
+            let array_value = self.from_low_high_rvalues(a_type,
                 zero,
                 self.low(a) << (b - sixty_four),
-            ];
-            let array_value = self.context.new_array_constructor(None, a_type, &values);
+            );
             then_block.add_assignment(None, result, array_value);
             then_block.end_with_jump(None, after_block);
 
@@ -534,16 +563,16 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             b0_block.end_with_jump(None, after_block);
 
             // NOTE: cast low to its unsigned type in order to perform a logical right shift.
+            // TODO(antoyo): adjust this ^ comment.
             let unsigned_type = native_int_type.to_unsigned(&self.cx);
             let casted_low = self.context.new_cast(None, self.low(a), unsigned_type);
             let shift_value = self.context.new_cast(None, sixty_four - b, unsigned_type);
             let high_low = self.context.new_cast(None, casted_low >> shift_value, native_int_type);
-            let values = [
+
+            let array_value = self.from_low_high_rvalues(a_type,
                 self.low(a) << b,
                 (self.high(a) << b) | high_low,
-            ];
-
-            let array_value = self.context.new_array_constructor(None, a_type, &values);
+            );
             actual_else_block.add_assignment(None, result, array_value);
             actual_else_block.end_with_jump(None, after_block);
 
@@ -559,16 +588,16 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let arg_type = arg.get_type();
         if !self.is_native_int_type(arg_type) {
             let native_int_type = arg_type.dyncast_array().expect("get element type");
-            let lsb = self.context.new_array_access(None, arg, self.context.new_rvalue_from_int(self.int_type, 0)).to_rvalue();
+            let lsb = self.low(arg);
             let swapped_lsb = self.gcc_bswap(lsb, width / 2);
             let swapped_lsb = self.context.new_cast(None, swapped_lsb, native_int_type);
-            let msb = self.context.new_array_access(None, arg, self.context.new_rvalue_from_int(self.int_type, 1)).to_rvalue();
+            let msb = self.high(arg);
             let swapped_msb = self.gcc_bswap(msb, width / 2);
             let swapped_msb = self.context.new_cast(None, swapped_msb, native_int_type);
 
             // NOTE: we also need to swap the two elements here, in addition to swapping inside
             // the elements themselves like done above.
-            return self.context.new_array_constructor(None, arg_type, &[swapped_msb, swapped_lsb]);
+            return self.from_low_high_rvalues(arg_type, swapped_msb, swapped_lsb);
         }
 
         // TODO(antoyo): check if it's faster to use string literals and a
@@ -672,11 +701,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         else {
             assert!(!a_native && !b_native, "both types should either be native or non-native for or operation");
             let native_int_type = a_type.dyncast_array().expect("get element type");
-            let values = [
+            self.from_low_high_rvalues(a_type,
                 self.context.new_binary_op(None, operation, native_int_type, self.low(a), self.low(b)),
                 self.context.new_binary_op(None, operation, native_int_type, self.high(a), self.high(b)),
-            ];
-            self.context.new_array_constructor(None, a_type, &values)
+            )
         }
     }
 
@@ -700,11 +728,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             let zero = self.context.new_rvalue_zero(value_type);
             let is_negative = self.context.new_comparison(None, ComparisonOp::LessThan, value, zero);
             let is_negative = self.gcc_int_cast(is_negative, dest_element_type);
-            let values = [
+            self.from_low_high_rvalues(dest_typ,
                 self.context.new_cast(None, value, dest_element_type),
                 self.context.new_unary_op(None, UnaryOp::Minus, dest_element_type, is_negative),
-            ];
-            self.context.new_array_constructor(None, dest_typ, &values)
+            )
         }
         else {
             // Since u128 and i128 are the only types that can be unsupported, we know the type of
@@ -782,20 +809,47 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     fn high(&self, value: RValue<'gcc>) -> RValue<'gcc> {
-        self.context.new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, 1))
+        let index =
+            match self.sess().target.options.endian {
+                Endian::Little => 1,
+                Endian::Big => 0,
+            };
+        self.context.new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, index))
             .to_rvalue()
     }
 
     fn low(&self, value: RValue<'gcc>) -> RValue<'gcc> {
-        self.context.new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, 0))
+        let index =
+            match self.sess().target.options.endian {
+                Endian::Little => 0,
+                Endian::Big => 1,
+            };
+        self.context.new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, index))
             .to_rvalue()
     }
 
+    fn from_low_high_rvalues(&self, typ: Type<'gcc>, low: RValue<'gcc>, high: RValue<'gcc>) -> RValue<'gcc> {
+        let (first, last) =
+            match self.sess().target.options.endian {
+                Endian::Little => (low, high),
+                Endian::Big => (high, low),
+            };
+
+        let values = [first, last];
+        self.context.new_array_constructor(None, typ, &values)
+    }
+
     fn from_low_high(&self, typ: Type<'gcc>, low: i64, high: i64) -> RValue<'gcc> {
+        let (first, last) =
+            match self.sess().target.options.endian {
+                Endian::Little => (low, high),
+                Endian::Big => (high, low),
+            };
+
         let native_int_type = typ.dyncast_array().expect("get element type");
         let values = [
-            self.context.new_rvalue_from_long(native_int_type, low),
-            self.context.new_rvalue_from_long(native_int_type, high),
+            self.context.new_rvalue_from_long(native_int_type, first),
+            self.context.new_rvalue_from_long(native_int_type, last),
         ];
         self.context.new_array_constructor(None, typ, &values)
     }
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 69927b28cd5f..bfe27c0552f0 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -930,15 +930,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                             128 => "__rust_i128_addo",
                             _ => unreachable!(),
                         };
-                    let param_a = self.context.new_parameter(None, result_type, "a");
-                    let param_b = self.context.new_parameter(None, result_type, "b");
-                    let result_field = self.context.new_field(None, result_type, "result");
-                    let overflow_field = self.context.new_field(None, self.bool_type, "overflow");
-                    let return_type = self.context.new_struct_type(None, "result_overflow", &[result_field, overflow_field]);
-                    let func = self.context.new_function(None, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false);
-                    let result = self.context.new_call(None, func, &[lhs, rhs]);
-                    let overflow = result.access_field(None, overflow_field);
-                    let int_result = result.access_field(None, result_field);
+                    let (int_result, overflow) = self.operation_with_overflow(func_name, lhs, rhs);
                     self.llbb().add_assignment(None, res, int_result);
                     overflow
                 };
@@ -1000,15 +992,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                             128 => "__rust_i128_subo",
                             _ => unreachable!(),
                         };
-                    let param_a = self.context.new_parameter(None, result_type, "a");
-                    let param_b = self.context.new_parameter(None, result_type, "b");
-                    let result_field = self.context.new_field(None, result_type, "result");
-                    let overflow_field = self.context.new_field(None, self.bool_type, "overflow");
-                    let return_type = self.context.new_struct_type(None, "result_overflow", &[result_field, overflow_field]);
-                    let func = self.context.new_function(None, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false);
-                    let result = self.context.new_call(None, func, &[lhs, rhs]);
-                    let overflow = result.access_field(None, overflow_field);
-                    let int_result = result.access_field(None, result_field);
+                    let (int_result, overflow) = self.operation_with_overflow(func_name, lhs, rhs);
                     self.llbb().add_assignment(None, res, int_result);
                     overflow
                 };
diff --git a/src/lib.rs b/src/lib.rs
index fe2339305604..2355cd1f6960 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -241,8 +241,9 @@ impl ExtraBackendMethods for GccCodegenBackend {
             temp_dir: None,
         };
 
-        // TODO(antoyo): only set for x86.
-        mods.context.add_command_line_option("-masm=intel");
+        if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" {
+            mods.context.add_command_line_option("-masm=intel");
+        }
         unsafe { allocator::codegen(tcx, &mut mods, module_name, kind, alloc_error_handler_kind); }
         mods
     }
diff --git a/src/type_.rs b/src/type_.rs
index 31899740514a..4914792c7b12 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -119,11 +119,11 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn type_f32(&self) -> Type<'gcc> {
-        self.context.new_type::<f32>()
+        self.float_type
     }
 
     fn type_f64(&self) -> Type<'gcc> {
-        self.context.new_type::<f64>()
+        self.double_type
     }
 
     fn type_func(&self, params: &[Type<'gcc>], return_type: Type<'gcc>) -> Type<'gcc> {
diff --git a/test.sh b/test.sh
index e4cbd6fbcaff..2eceee7c1e9d 100755
--- a/test.sh
+++ b/test.sh
@@ -151,7 +151,11 @@ function clean() {
 
 function mini_tests() {
     echo "[BUILD] mini_core"
-    $RUSTC example/mini_core.rs --crate-name mini_core --crate-type lib,dylib --target $TARGET_TRIPLE
+    crate_types="lib,dylib"
+    if [[ "$HOST_TRIPLE" != "$TARGET_TRIPLE" ]]; then
+        crate_types="lib"
+    fi
+    $RUSTC example/mini_core.rs --crate-name mini_core --crate-type $crate_types --target $TARGET_TRIPLE
 
     echo "[BUILD] example"
     $RUSTC example/example.rs --crate-type lib --target $TARGET_TRIPLE
@@ -166,6 +170,23 @@ function build_sysroot() {
     time ./build_sysroot/build_sysroot.sh $sysroot_channel
 }
 
+# TODO(GuillaumeGomez): when rewriting in Rust, refactor with the code in tests/lang_tests_common.rs if possible.
+function run_in_vm() {
+    vm_parent_dir=${CG_GCC_VM_DIR:-$(pwd)}
+    vm_dir=vm
+    exe=$1
+    exe_filename=$(basename $exe)
+    vm_home_dir=$vm_parent_dir/$vm_dir/home
+    vm_exe_path=$vm_home_dir/$exe_filename
+    inside_vm_exe_path=/home/$exe_filename
+    sudo cp $exe $vm_exe_path
+
+    shift
+    pushd $vm_parent_dir
+    sudo chroot $vm_dir qemu-m68k-static $inside_vm_exe_path $@
+    popd
+}
+
 function std_tests() {
     echo "[AOT] arbitrary_self_types_pointers_and_wrappers"
     $RUSTC example/arbitrary_self_types_pointers_and_wrappers.rs --crate-name arbitrary_self_types_pointers_and_wrappers --crate-type bin --target $TARGET_TRIPLE
@@ -174,9 +195,12 @@ function std_tests() {
     echo "[AOT] alloc_system"
     $RUSTC example/alloc_system.rs --crate-type lib --target "$TARGET_TRIPLE"
 
-    echo "[AOT] alloc_example"
-    $RUSTC example/alloc_example.rs --crate-type bin --target $TARGET_TRIPLE
-    $RUN_WRAPPER ./target/out/alloc_example
+    # FIXME: doesn't work on m68k.
+    if [[ "$HOST_TRIPLE" == "$TARGET_TRIPLE" ]]; then
+        echo "[AOT] alloc_example"
+        $RUSTC example/alloc_example.rs --crate-type bin --target $TARGET_TRIPLE
+        $RUN_WRAPPER ./target/out/alloc_example
+    fi
 
     echo "[AOT] dst_field_align"
     # FIXME(antoyo): Re-add -Zmir-opt-level=2 once rust-lang/rust#67529 is fixed.
@@ -225,7 +249,7 @@ verbose-tests = true
 [build]
 cargo = "$(rustup which cargo)"
 local-rebuild = true
-rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$TARGET_TRIPLE/bin/rustc"
+rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$HOST_TRIPLE/bin/rustc"
 
 [target.x86_64-unknown-linux-gnu]
 llvm-filecheck = "`which FileCheck-10 || which FileCheck-11 || which FileCheck-12 || which FileCheck-13 || which FileCheck-14`"
@@ -393,7 +417,7 @@ function test_rustc() {
     fi
 
     echo "[TEST] rustc test suite"
-    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/ui/ --rustc-args "$RUSTC_ARGS"
+    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/ui/ --rustc-args "$RUSTC_ARGS" # --target $TARGET_TRIPLE
 }
 
 function test_failing_rustc() {
diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index 06de26f7efc9..940c7cfd2662 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -2,7 +2,7 @@
 use std::{
     env::{self, current_dir},
     path::PathBuf,
-    process::Command,
+    process::{self, Command},
 };
 
 use lang_tester::LangTester;
@@ -50,6 +50,19 @@ pub fn main_inner(profile: Profile) {
                 "-o", exe.to_str().expect("to_str"),
                 path.to_str().expect("to_str"),
             ]);
+
+            // TODO(antoyo): find a way to send this via a cli argument.
+            let test_target = std::env::var("CG_GCC_TEST_TARGET");
+            if let Ok(ref target) = test_target {
+                compiler.args(&["--target", &target]);
+                let linker = format!("{}-gcc", target);
+                compiler.args(&[format!("-Clinker={}", linker)]);
+                let mut env_path = std::env::var("PATH").unwrap_or_default();
+                // TODO(antoyo): find a better way to add the PATH necessary locally.
+                env_path = format!("/opt/m68k-unknown-linux-gnu/bin:{}", env_path);
+                compiler.env("PATH", env_path);
+            }
+
             if let Some(flags) = option_env!("TEST_FLAGS") {
                 for flag in flags.split_whitespace() {
                     compiler.arg(&flag);
@@ -65,8 +78,37 @@ pub fn main_inner(profile: Profile) {
                 }
             }
             // Test command 2: run `tempdir/x`.
-            let runtime = Command::new(exe);
-            vec![("Compiler", compiler), ("Run-time", runtime)]
+            if test_target.is_ok() {
+                let vm_parent_dir = std::env::var("CG_GCC_VM_DIR")
+                    .map(|dir| PathBuf::from(dir))
+                    .unwrap_or_else(|_| std::env::current_dir().unwrap());
+                let vm_dir = "vm";
+                let exe_filename = exe.file_name().unwrap();
+                let vm_home_dir = vm_parent_dir.join(vm_dir).join("home");
+                let vm_exe_path = vm_home_dir.join(exe_filename);
+                // FIXME(antoyo): panicking here makes the test pass.
+                let inside_vm_exe_path = PathBuf::from("/home").join(&exe_filename);
+                let mut copy = Command::new("sudo");
+                copy.arg("cp");
+                copy.args(&[&exe, &vm_exe_path]);
+
+                let mut runtime = Command::new("sudo");
+                runtime.args(&["chroot", vm_dir, "qemu-m68k-static"]);
+                runtime.arg(inside_vm_exe_path);
+                runtime.current_dir(vm_parent_dir);
+                vec![
+                    ("Compiler", compiler),
+                    ("Copy", copy),
+                    ("Run-time", runtime),
+                ]
+            }
+            else {
+                let runtime = Command::new(exe);
+                vec![
+                    ("Compiler", compiler),
+                    ("Run-time", runtime),
+                ]
+            }
         })
         .run();
 }
diff --git a/tests/run/asm.rs b/tests/run/asm.rs
index 507b65ca049e..56f2aac3d0a1 100644
--- a/tests/run/asm.rs
+++ b/tests/run/asm.rs
@@ -5,8 +5,10 @@
 
 #![feature(asm_const)]
 
+#[cfg(target_arch="x86_64")]
 use std::arch::{asm, global_asm};
 
+#[cfg(target_arch="x86_64")]
 global_asm!(
     "
     .global add_asm
@@ -20,6 +22,7 @@ extern "C" {
     fn add_asm(a: i64, b: i64) -> i64;
 }
 
+#[cfg(target_arch="x86_64")]
 pub unsafe fn mem_cpy(dst: *mut u8, src: *const u8, len: usize) {
     asm!(
         "rep movsb",
@@ -30,7 +33,8 @@ pub unsafe fn mem_cpy(dst: *mut u8, src: *const u8, len: usize) {
     );
 }
 
-fn main() {
+#[cfg(target_arch="x86_64")]
+fn asm() {
     unsafe {
         asm!("nop");
     }
@@ -173,3 +177,11 @@ fn main() {
     }
     assert_eq!(array1, array2);
 }
+
+#[cfg(not(target_arch="x86_64"))]
+fn asm() {
+}
+
+fn main() {
+    asm();
+}
diff --git a/tests/run/empty_main.rs b/tests/run/empty_main.rs
index 2d78ef12aa72..e66a859ad698 100644
--- a/tests/run/empty_main.rs
+++ b/tests/run/empty_main.rs
@@ -35,6 +35,6 @@ pub(crate) unsafe auto trait Freeze {}
  */
 
 #[start]
-fn main(mut argc: isize, _argv: *const *const u8) -> isize {
+fn main(_argc: isize, _argv: *const *const u8) -> isize {
     0
 }
diff --git a/tests/run/int_overflow.rs b/tests/run/int_overflow.rs
index 08fa087fccdf..78872159f62d 100644
--- a/tests/run/int_overflow.rs
+++ b/tests/run/int_overflow.rs
@@ -4,138 +4,20 @@
 //   stdout: Success
 //   status: signal
 
-#![allow(internal_features, unused_attributes)]
-#![feature(auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
+fn main() {
+    std::panic::set_hook(Box::new(|_| {
+        println!("Success");
+        std::process::abort();
+    }));
 
-#![no_std]
-#![no_core]
-
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-impl Copy for *mut i32 {}
-impl Copy for usize {}
-impl Copy for i32 {}
-impl Copy for u8 {}
-impl Copy for i8 {}
-
-#[lang = "receiver"]
-trait Receiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-#[lang = "panic_location"]
-struct PanicLocation {
-    file: &'static str,
-    line: u32,
-    column: u32,
-}
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn puts(s: *const u8) -> i32;
-        pub fn fflush(stream: *mut i32) -> i32;
-
-        pub static stdout: *mut i32;
-    }
-}
-
-mod intrinsics {
-    extern "rust-intrinsic" {
-        #[rustc_safe_intrinsic]
-        pub fn abort() -> !;
-    }
-}
-
-#[lang = "panic"]
-#[track_caller]
-#[no_mangle]
-pub fn panic(_msg: &'static str) -> ! {
-    unsafe {
-        // Panicking is expected iff overflow checking is enabled.
-        #[cfg(debug_assertions)]
-        libc::puts("Success\0" as *const str as *const u8);
-        libc::fflush(libc::stdout);
-        intrinsics::abort();
-    }
-}
-
-#[lang = "add"]
-trait Add<RHS = Self> {
-    type Output;
-
-    fn add(self, rhs: RHS) -> Self::Output;
-}
-
-impl Add for u8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i32 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for usize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for isize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-/*
- * Code
- */
-
-#[start]
-fn main(mut argc: isize, _argv: *const *const u8) -> isize {
-    let int = 9223372036854775807isize;
-    let int = int + argc;  // overflow
+    let arg_count = std::env::args().count();
+    let int = isize::MAX;
+    let _int = int + arg_count as isize;  // overflow
 
     // If overflow checking is disabled, we should reach here.
     #[cfg(not(debug_assertions))]
     unsafe {
-        libc::puts("Success\0" as *const str as *const u8);
-        libc::fflush(libc::stdout);
-        intrinsics::abort();
+        println!("Success");
+        std::process::abort();
     }
-
-    int
 }

From fcd336b3de942192d9723a3e523c4b0cbe616d3d Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 24 Oct 2023 17:15:18 +0200
Subject: [PATCH 421/997] Add basics for `test` command in build system

---
 build_system/src/main.rs |  5 +++++
 build_system/src/test.rs | 15 +++++++++++++++
 2 files changed, 20 insertions(+)
 create mode 100644 build_system/src/test.rs

diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index 332a14ff0a28..bff82b6e3e57 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -5,6 +5,7 @@ mod build;
 mod config;
 mod prepare;
 mod rustc_info;
+mod test;
 mod utils;
 
 macro_rules! arg_error {
@@ -23,6 +24,7 @@ Available commands for build_system:
 
     prepare  : Run prepare command
     build    : Run build command
+    test     : Run test command
     --help   : Show this message"
     );
 }
@@ -30,6 +32,7 @@ Available commands for build_system:
 pub enum Command {
     Prepare,
     Build,
+    Test,
 }
 
 fn main() {
@@ -40,6 +43,7 @@ fn main() {
     let command = match env::args().nth(1).as_deref() {
         Some("prepare") => Command::Prepare,
         Some("build") => Command::Build,
+        Some("test") => Command::Test,
         Some("--help") => {
             usage();
             process::exit(0);
@@ -55,6 +59,7 @@ fn main() {
     if let Err(e) = match command {
         Command::Prepare => prepare::run(),
         Command::Build => build::run(),
+        Command::Test => test::run(),
     } {
         eprintln!("Command failed to run: {e:?}");
         process::exit(1);
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
new file mode 100644
index 000000000000..4c8c63e59ab7
--- /dev/null
+++ b/build_system/src/test.rs
@@ -0,0 +1,15 @@
+use crate::utils::run_command_with_output;
+
+fn get_args<'a>(args: &mut Vec<&'a dyn AsRef<std::ffi::OsStr>>, extra_args: &'a Vec<String>) {
+    for extra_arg in extra_args {
+        args.push(extra_arg);
+    }
+}
+
+pub fn run() -> Result<(), String> {
+    let mut args: Vec<&dyn AsRef<std::ffi::OsStr>> = vec![&"bash", &"test.sh"];
+    let extra_args = std::env::args().skip(2).collect::<Vec<_>>();
+    get_args(&mut args, &extra_args);
+    let current_dir = std::env::current_dir().map_err(|error| format!("`current_dir` failed: {:?}", error))?;
+    run_command_with_output(args.as_slice(), Some(&current_dir))
+}

From 0b6e1332b1c1258d24a52fdefd95e3fa2e88f69f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 24 Oct 2023 17:40:45 -0400
Subject: [PATCH 422/997] Fix to be able to use a target specification JSON
 file and document the process

---
 Readme.md                  |  7 ++++++-
 build_system/src/build.rs  | 23 ++++++++++++++++-------
 build_system/src/config.rs | 22 +++++++++++++++++++++-
 3 files changed, 43 insertions(+), 9 deletions(-)

diff --git a/Readme.md b/Readme.md
index 2207bd35edb4..1bad1e71137c 100644
--- a/Readme.md
+++ b/Readme.md
@@ -322,7 +322,12 @@ generate it in [gimple.md](./doc/gimple.md).
  * Set the path to the cross-compiling libgccjit in `gcc_path`.
  * Make sure you have the linker for your target (for instance `m68k-unknown-linux-gnu-gcc`) in your `$PATH`. Currently, the linker name is hardcoded as being `$TARGET-gcc`. Specify the target when building the sysroot: `./y.sh build --target-triple m68k-unknown-linux-gnu`.
  * Build your project by specifying the target: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../cargo.sh build --target m68k-unknown-linux-gnu`.
- * If the target is not yet supported by the Rust compiler, create a [target specification file](https://docs.rust-embedded.org/embedonomicon/custom-target.html) (note that the `arch` specified in this file must be supported by the rust compiler).
+
+If the target is not yet supported by the Rust compiler, create a [target specification file](https://docs.rust-embedded.org/embedonomicon/custom-target.html) (note that the `arch` specified in this file must be supported by the rust compiler).
+Then, you can use it the following way:
+
+ * Add the target specification file using `--target` as an **absolute** path to build the sysroot: `./y.sh build --target-triple m68k-unknown-linux-gnu --target $(pwd)/m68k-unknown-linux-gnu.json`
+ * Build your project by specifying the target specification file: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../cargo.sh build --target path/to/m68k-unknown-linux-gnu.json`.
 
 If you get the following error:
 
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index b013ca80705d..c71954e4d113 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -1,4 +1,4 @@
-use crate::config::set_config;
+use crate::config::{set_config, ConfigInfo};
 use crate::utils::{
     get_gcc_path, run_command, run_command_with_output_and_env, walk_dir,
 };
@@ -55,6 +55,15 @@ impl BuildArg {
                         );
                     }
                 }
+                "--target" => {
+                    if args.next().is_some() {
+                        // Handled in config.rs.
+                    } else {
+                        return Err(
+                            "Expected a value after `--target`, found nothing".to_string()
+                        );
+                    }
+                }
                 arg => return Err(format!("Unknown argument `{}`", arg)),
             }
         }
@@ -80,7 +89,7 @@ impl BuildArg {
 fn build_sysroot(
     env: &mut HashMap<String, String>,
     release_mode: bool,
-    target_triple: &str,
+    config: &ConfigInfo,
 ) -> Result<(), String> {
     std::env::set_current_dir("build_sysroot")
         .map_err(|error| format!("Failed to go to `build_sysroot` directory: {:?}", error))?;
@@ -143,7 +152,7 @@ fn build_sysroot(
                 &"cargo",
                 &"build",
                 &"--target",
-                &target_triple,
+                &config.target,
                 &"--release",
             ],
             None,
@@ -156,7 +165,7 @@ fn build_sysroot(
                 &"cargo",
                 &"build",
                 &"--target",
-                &target_triple,
+                &config.target,
             ],
             None,
             Some(env),
@@ -165,14 +174,14 @@ fn build_sysroot(
     };
 
     // Copy files to sysroot
-    let sysroot_path = format!("sysroot/lib/rustlib/{}/lib/", target_triple);
+    let sysroot_path = format!("sysroot/lib/rustlib/{}/lib/", config.target_triple);
     fs::create_dir_all(&sysroot_path)
         .map_err(|error| format!("Failed to create directory `{}`: {:?}", sysroot_path, error))?;
     let copier = |dir_to_copy: &Path| {
         run_command(&[&"cp", &"-r", &dir_to_copy, &sysroot_path], None).map(|_| ())
     };
     walk_dir(
-        &format!("target/{}/{}/deps", target_triple, channel),
+        &format!("target/{}/{}/deps", config.target_triple, channel),
         copier,
         copier,
     )?;
@@ -216,7 +225,7 @@ fn build_codegen(args: &BuildArg) -> Result<(), String> {
     build_sysroot(
         &mut env,
         args.sysroot_release_channel,
-        &config.target_triple,
+        &config,
     )?;
     Ok(())
 }
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 0f77943476fe..64d9bd73e01a 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -3,6 +3,7 @@ use std::collections::HashMap;
 use std::env as std_env;
 
 pub struct ConfigInfo {
+    pub target: String,
     pub target_triple: String,
     pub rustc_command: Vec<String>,
 }
@@ -30,25 +31,43 @@ pub fn set_config(
     let host_triple = get_rustc_host_triple()?;
     let mut linker = None;
     let mut target_triple = host_triple.clone();
+    let mut target = target_triple.clone();
 
     // We skip binary name and the command.
     let mut args = std::env::args().skip(2);
 
+    let mut set_target_triple = false;
+    let mut set_target = false;
     while let Some(arg) = args.next() {
         match arg.as_str() {
             "--target-triple" => {
                 if let Some(arg) = args.next() {
                     target_triple = arg;
+                    set_target_triple = true;
                 } else {
                     return Err(
                         "Expected a value after `--target-triple`, found nothing".to_string()
                     );
                 }
             },
+            "--target" => {
+                if let Some(arg) = args.next() {
+                    target = arg;
+                    set_target = true;
+                } else {
+                    return Err(
+                        "Expected a value after `--target`, found nothing".to_string()
+                    );
+                }
+            },
             _ => (),
         }
     }
 
+    if set_target_triple && !set_target {
+        target = target_triple.clone();
+    }
+
     if host_triple != target_triple {
         linker = Some(format!("-Clinker={}-gcc", target_triple));
     }
@@ -123,7 +142,8 @@ pub fn set_config(
         "target/out".to_string(),
     ]);
     Ok(ConfigInfo {
-        target_triple: target_triple.to_string(),
+        target,
+        target_triple,
         rustc_command,
     })
 }

From a93d1b73c67f8d08d759a9a880a3bc0081d6ae16 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 24 Oct 2023 17:43:23 -0400
Subject: [PATCH 423/997] Fix volatile_load

---
 src/builder.rs        |  5 ++---
 src/intrinsic/mod.rs  | 18 ++++++++++++------
 tests/run/volatile.rs | 26 ++++++++++++++++++++++++++
 3 files changed, 40 insertions(+), 9 deletions(-)
 create mode 100644 tests/run/volatile.rs

diff --git a/src/builder.rs b/src/builder.rs
index b78418089342..b8a8c144dc90 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -751,9 +751,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         loaded_value.to_rvalue()
     }
 
-    fn volatile_load(&mut self, _ty: Type<'gcc>, ptr: RValue<'gcc>) -> RValue<'gcc> {
-        // TODO(antoyo): use ty.
-        let ptr = self.context.new_cast(None, ptr, ptr.get_type().make_volatile());
+    fn volatile_load(&mut self, ty: Type<'gcc>, ptr: RValue<'gcc>) -> RValue<'gcc> {
+        let ptr = self.context.new_cast(None, ptr, ty.make_volatile().make_pointer());
         ptr.dereference(None).to_rvalue()
     }
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index bfe27c0552f0..ba1cae03f3e4 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -4,7 +4,9 @@ mod simd;
 #[cfg(feature="master")]
 use std::iter;
 
-use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp, FunctionType};
+#[cfg(feature="master")]
+use gccjit::FunctionType;
+use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp};
 use rustc_codegen_ssa::MemFlags;
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::common::IntPredicate;
@@ -143,11 +145,15 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
 
                 sym::volatile_load | sym::unaligned_volatile_load => {
                     let tp_ty = fn_args.type_at(0);
-                    let mut ptr = args[0].immediate();
-                    if let PassMode::Cast { cast: ty, .. } = &fn_abi.ret.mode {
-                        ptr = self.pointercast(ptr, self.type_ptr_to(ty.gcc_type(self)));
-                    }
-                    let load = self.volatile_load(ptr.get_type(), ptr);
+                    let ptr = args[0].immediate();
+                    let load =
+                        if let PassMode::Cast { cast: ty, pad_i32: _ } = &fn_abi.ret.mode {
+                            let gcc_ty = ty.gcc_type(self);
+                            self.volatile_load(gcc_ty, ptr)
+                        }
+                        else {
+                            self.volatile_load(self.layout_of(tp_ty).gcc_type(self), ptr)
+                        };
                     // TODO(antoyo): set alignment.
                     self.to_immediate(load, self.layout_of(tp_ty))
                 }
diff --git a/tests/run/volatile.rs b/tests/run/volatile.rs
new file mode 100644
index 000000000000..8b0433125936
--- /dev/null
+++ b/tests/run/volatile.rs
@@ -0,0 +1,26 @@
+// Compiler:
+//
+// Run-time:
+//   status: 0
+
+use std::mem::MaybeUninit;
+
+#[derive(Debug)]
+struct Struct {
+    pointer: *const (),
+    func: unsafe fn(*const ()),
+}
+
+fn func(ptr: *const ()) {
+}
+
+fn main() {
+    let mut x = MaybeUninit::<&Struct>::uninit();
+    x.write(&Struct {
+        pointer: std::ptr::null(),
+        func,
+    });
+    let x = unsafe { x.assume_init() };
+    let value = unsafe { (x as *const Struct).read_volatile() };
+    println!("{:?}", value);
+}

From c15ad9e7a50ef618ee9c8cb51aa37e51ab65f9f2 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 25 Oct 2023 15:53:31 +0200
Subject: [PATCH 424/997] Regenerate intrinsics mapping

---
 src/intrinsic/archs.rs | 1455 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 1455 insertions(+)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index e01299d32fda..15d67385c3e9 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -2285,8 +2285,1460 @@ match name {
     "llvm.loongarch.iocsrwr.d" => "__builtin_loongarch_iocsrwr_d",
     "llvm.loongarch.iocsrwr.h" => "__builtin_loongarch_iocsrwr_h",
     "llvm.loongarch.iocsrwr.w" => "__builtin_loongarch_iocsrwr_w",
+    "llvm.loongarch.lasx.vext2xv.d.b" => "__builtin_lasx_vext2xv_d_b",
+    "llvm.loongarch.lasx.vext2xv.d.h" => "__builtin_lasx_vext2xv_d_h",
+    "llvm.loongarch.lasx.vext2xv.d.w" => "__builtin_lasx_vext2xv_d_w",
+    "llvm.loongarch.lasx.vext2xv.du.bu" => "__builtin_lasx_vext2xv_du_bu",
+    "llvm.loongarch.lasx.vext2xv.du.hu" => "__builtin_lasx_vext2xv_du_hu",
+    "llvm.loongarch.lasx.vext2xv.du.wu" => "__builtin_lasx_vext2xv_du_wu",
+    "llvm.loongarch.lasx.vext2xv.h.b" => "__builtin_lasx_vext2xv_h_b",
+    "llvm.loongarch.lasx.vext2xv.hu.bu" => "__builtin_lasx_vext2xv_hu_bu",
+    "llvm.loongarch.lasx.vext2xv.w.b" => "__builtin_lasx_vext2xv_w_b",
+    "llvm.loongarch.lasx.vext2xv.w.h" => "__builtin_lasx_vext2xv_w_h",
+    "llvm.loongarch.lasx.vext2xv.wu.bu" => "__builtin_lasx_vext2xv_wu_bu",
+    "llvm.loongarch.lasx.vext2xv.wu.hu" => "__builtin_lasx_vext2xv_wu_hu",
+    "llvm.loongarch.lasx.xbnz.b" => "__builtin_lasx_xbnz_b",
+    "llvm.loongarch.lasx.xbnz.d" => "__builtin_lasx_xbnz_d",
+    "llvm.loongarch.lasx.xbnz.h" => "__builtin_lasx_xbnz_h",
+    "llvm.loongarch.lasx.xbnz.v" => "__builtin_lasx_xbnz_v",
+    "llvm.loongarch.lasx.xbnz.w" => "__builtin_lasx_xbnz_w",
+    "llvm.loongarch.lasx.xbz.b" => "__builtin_lasx_xbz_b",
+    "llvm.loongarch.lasx.xbz.d" => "__builtin_lasx_xbz_d",
+    "llvm.loongarch.lasx.xbz.h" => "__builtin_lasx_xbz_h",
+    "llvm.loongarch.lasx.xbz.v" => "__builtin_lasx_xbz_v",
+    "llvm.loongarch.lasx.xbz.w" => "__builtin_lasx_xbz_w",
+    "llvm.loongarch.lasx.xvabsd.b" => "__builtin_lasx_xvabsd_b",
+    "llvm.loongarch.lasx.xvabsd.bu" => "__builtin_lasx_xvabsd_bu",
+    "llvm.loongarch.lasx.xvabsd.d" => "__builtin_lasx_xvabsd_d",
+    "llvm.loongarch.lasx.xvabsd.du" => "__builtin_lasx_xvabsd_du",
+    "llvm.loongarch.lasx.xvabsd.h" => "__builtin_lasx_xvabsd_h",
+    "llvm.loongarch.lasx.xvabsd.hu" => "__builtin_lasx_xvabsd_hu",
+    "llvm.loongarch.lasx.xvabsd.w" => "__builtin_lasx_xvabsd_w",
+    "llvm.loongarch.lasx.xvabsd.wu" => "__builtin_lasx_xvabsd_wu",
+    "llvm.loongarch.lasx.xvadd.b" => "__builtin_lasx_xvadd_b",
+    "llvm.loongarch.lasx.xvadd.d" => "__builtin_lasx_xvadd_d",
+    "llvm.loongarch.lasx.xvadd.h" => "__builtin_lasx_xvadd_h",
+    "llvm.loongarch.lasx.xvadd.q" => "__builtin_lasx_xvadd_q",
+    "llvm.loongarch.lasx.xvadd.w" => "__builtin_lasx_xvadd_w",
+    "llvm.loongarch.lasx.xvadda.b" => "__builtin_lasx_xvadda_b",
+    "llvm.loongarch.lasx.xvadda.d" => "__builtin_lasx_xvadda_d",
+    "llvm.loongarch.lasx.xvadda.h" => "__builtin_lasx_xvadda_h",
+    "llvm.loongarch.lasx.xvadda.w" => "__builtin_lasx_xvadda_w",
+    "llvm.loongarch.lasx.xvaddi.bu" => "__builtin_lasx_xvaddi_bu",
+    "llvm.loongarch.lasx.xvaddi.du" => "__builtin_lasx_xvaddi_du",
+    "llvm.loongarch.lasx.xvaddi.hu" => "__builtin_lasx_xvaddi_hu",
+    "llvm.loongarch.lasx.xvaddi.wu" => "__builtin_lasx_xvaddi_wu",
+    "llvm.loongarch.lasx.xvaddwev.d.w" => "__builtin_lasx_xvaddwev_d_w",
+    "llvm.loongarch.lasx.xvaddwev.d.wu" => "__builtin_lasx_xvaddwev_d_wu",
+    "llvm.loongarch.lasx.xvaddwev.d.wu.w" => "__builtin_lasx_xvaddwev_d_wu_w",
+    "llvm.loongarch.lasx.xvaddwev.h.b" => "__builtin_lasx_xvaddwev_h_b",
+    "llvm.loongarch.lasx.xvaddwev.h.bu" => "__builtin_lasx_xvaddwev_h_bu",
+    "llvm.loongarch.lasx.xvaddwev.h.bu.b" => "__builtin_lasx_xvaddwev_h_bu_b",
+    "llvm.loongarch.lasx.xvaddwev.q.d" => "__builtin_lasx_xvaddwev_q_d",
+    "llvm.loongarch.lasx.xvaddwev.q.du" => "__builtin_lasx_xvaddwev_q_du",
+    "llvm.loongarch.lasx.xvaddwev.q.du.d" => "__builtin_lasx_xvaddwev_q_du_d",
+    "llvm.loongarch.lasx.xvaddwev.w.h" => "__builtin_lasx_xvaddwev_w_h",
+    "llvm.loongarch.lasx.xvaddwev.w.hu" => "__builtin_lasx_xvaddwev_w_hu",
+    "llvm.loongarch.lasx.xvaddwev.w.hu.h" => "__builtin_lasx_xvaddwev_w_hu_h",
+    "llvm.loongarch.lasx.xvaddwod.d.w" => "__builtin_lasx_xvaddwod_d_w",
+    "llvm.loongarch.lasx.xvaddwod.d.wu" => "__builtin_lasx_xvaddwod_d_wu",
+    "llvm.loongarch.lasx.xvaddwod.d.wu.w" => "__builtin_lasx_xvaddwod_d_wu_w",
+    "llvm.loongarch.lasx.xvaddwod.h.b" => "__builtin_lasx_xvaddwod_h_b",
+    "llvm.loongarch.lasx.xvaddwod.h.bu" => "__builtin_lasx_xvaddwod_h_bu",
+    "llvm.loongarch.lasx.xvaddwod.h.bu.b" => "__builtin_lasx_xvaddwod_h_bu_b",
+    "llvm.loongarch.lasx.xvaddwod.q.d" => "__builtin_lasx_xvaddwod_q_d",
+    "llvm.loongarch.lasx.xvaddwod.q.du" => "__builtin_lasx_xvaddwod_q_du",
+    "llvm.loongarch.lasx.xvaddwod.q.du.d" => "__builtin_lasx_xvaddwod_q_du_d",
+    "llvm.loongarch.lasx.xvaddwod.w.h" => "__builtin_lasx_xvaddwod_w_h",
+    "llvm.loongarch.lasx.xvaddwod.w.hu" => "__builtin_lasx_xvaddwod_w_hu",
+    "llvm.loongarch.lasx.xvaddwod.w.hu.h" => "__builtin_lasx_xvaddwod_w_hu_h",
+    "llvm.loongarch.lasx.xvand.v" => "__builtin_lasx_xvand_v",
+    "llvm.loongarch.lasx.xvandi.b" => "__builtin_lasx_xvandi_b",
+    "llvm.loongarch.lasx.xvandn.v" => "__builtin_lasx_xvandn_v",
+    "llvm.loongarch.lasx.xvavg.b" => "__builtin_lasx_xvavg_b",
+    "llvm.loongarch.lasx.xvavg.bu" => "__builtin_lasx_xvavg_bu",
+    "llvm.loongarch.lasx.xvavg.d" => "__builtin_lasx_xvavg_d",
+    "llvm.loongarch.lasx.xvavg.du" => "__builtin_lasx_xvavg_du",
+    "llvm.loongarch.lasx.xvavg.h" => "__builtin_lasx_xvavg_h",
+    "llvm.loongarch.lasx.xvavg.hu" => "__builtin_lasx_xvavg_hu",
+    "llvm.loongarch.lasx.xvavg.w" => "__builtin_lasx_xvavg_w",
+    "llvm.loongarch.lasx.xvavg.wu" => "__builtin_lasx_xvavg_wu",
+    "llvm.loongarch.lasx.xvavgr.b" => "__builtin_lasx_xvavgr_b",
+    "llvm.loongarch.lasx.xvavgr.bu" => "__builtin_lasx_xvavgr_bu",
+    "llvm.loongarch.lasx.xvavgr.d" => "__builtin_lasx_xvavgr_d",
+    "llvm.loongarch.lasx.xvavgr.du" => "__builtin_lasx_xvavgr_du",
+    "llvm.loongarch.lasx.xvavgr.h" => "__builtin_lasx_xvavgr_h",
+    "llvm.loongarch.lasx.xvavgr.hu" => "__builtin_lasx_xvavgr_hu",
+    "llvm.loongarch.lasx.xvavgr.w" => "__builtin_lasx_xvavgr_w",
+    "llvm.loongarch.lasx.xvavgr.wu" => "__builtin_lasx_xvavgr_wu",
+    "llvm.loongarch.lasx.xvbitclr.b" => "__builtin_lasx_xvbitclr_b",
+    "llvm.loongarch.lasx.xvbitclr.d" => "__builtin_lasx_xvbitclr_d",
+    "llvm.loongarch.lasx.xvbitclr.h" => "__builtin_lasx_xvbitclr_h",
+    "llvm.loongarch.lasx.xvbitclr.w" => "__builtin_lasx_xvbitclr_w",
+    "llvm.loongarch.lasx.xvbitclri.b" => "__builtin_lasx_xvbitclri_b",
+    "llvm.loongarch.lasx.xvbitclri.d" => "__builtin_lasx_xvbitclri_d",
+    "llvm.loongarch.lasx.xvbitclri.h" => "__builtin_lasx_xvbitclri_h",
+    "llvm.loongarch.lasx.xvbitclri.w" => "__builtin_lasx_xvbitclri_w",
+    "llvm.loongarch.lasx.xvbitrev.b" => "__builtin_lasx_xvbitrev_b",
+    "llvm.loongarch.lasx.xvbitrev.d" => "__builtin_lasx_xvbitrev_d",
+    "llvm.loongarch.lasx.xvbitrev.h" => "__builtin_lasx_xvbitrev_h",
+    "llvm.loongarch.lasx.xvbitrev.w" => "__builtin_lasx_xvbitrev_w",
+    "llvm.loongarch.lasx.xvbitrevi.b" => "__builtin_lasx_xvbitrevi_b",
+    "llvm.loongarch.lasx.xvbitrevi.d" => "__builtin_lasx_xvbitrevi_d",
+    "llvm.loongarch.lasx.xvbitrevi.h" => "__builtin_lasx_xvbitrevi_h",
+    "llvm.loongarch.lasx.xvbitrevi.w" => "__builtin_lasx_xvbitrevi_w",
+    "llvm.loongarch.lasx.xvbitsel.v" => "__builtin_lasx_xvbitsel_v",
+    "llvm.loongarch.lasx.xvbitseli.b" => "__builtin_lasx_xvbitseli_b",
+    "llvm.loongarch.lasx.xvbitset.b" => "__builtin_lasx_xvbitset_b",
+    "llvm.loongarch.lasx.xvbitset.d" => "__builtin_lasx_xvbitset_d",
+    "llvm.loongarch.lasx.xvbitset.h" => "__builtin_lasx_xvbitset_h",
+    "llvm.loongarch.lasx.xvbitset.w" => "__builtin_lasx_xvbitset_w",
+    "llvm.loongarch.lasx.xvbitseti.b" => "__builtin_lasx_xvbitseti_b",
+    "llvm.loongarch.lasx.xvbitseti.d" => "__builtin_lasx_xvbitseti_d",
+    "llvm.loongarch.lasx.xvbitseti.h" => "__builtin_lasx_xvbitseti_h",
+    "llvm.loongarch.lasx.xvbitseti.w" => "__builtin_lasx_xvbitseti_w",
+    "llvm.loongarch.lasx.xvbsll.v" => "__builtin_lasx_xvbsll_v",
+    "llvm.loongarch.lasx.xvbsrl.v" => "__builtin_lasx_xvbsrl_v",
+    "llvm.loongarch.lasx.xvclo.b" => "__builtin_lasx_xvclo_b",
+    "llvm.loongarch.lasx.xvclo.d" => "__builtin_lasx_xvclo_d",
+    "llvm.loongarch.lasx.xvclo.h" => "__builtin_lasx_xvclo_h",
+    "llvm.loongarch.lasx.xvclo.w" => "__builtin_lasx_xvclo_w",
+    "llvm.loongarch.lasx.xvclz.b" => "__builtin_lasx_xvclz_b",
+    "llvm.loongarch.lasx.xvclz.d" => "__builtin_lasx_xvclz_d",
+    "llvm.loongarch.lasx.xvclz.h" => "__builtin_lasx_xvclz_h",
+    "llvm.loongarch.lasx.xvclz.w" => "__builtin_lasx_xvclz_w",
+    "llvm.loongarch.lasx.xvdiv.b" => "__builtin_lasx_xvdiv_b",
+    "llvm.loongarch.lasx.xvdiv.bu" => "__builtin_lasx_xvdiv_bu",
+    "llvm.loongarch.lasx.xvdiv.d" => "__builtin_lasx_xvdiv_d",
+    "llvm.loongarch.lasx.xvdiv.du" => "__builtin_lasx_xvdiv_du",
+    "llvm.loongarch.lasx.xvdiv.h" => "__builtin_lasx_xvdiv_h",
+    "llvm.loongarch.lasx.xvdiv.hu" => "__builtin_lasx_xvdiv_hu",
+    "llvm.loongarch.lasx.xvdiv.w" => "__builtin_lasx_xvdiv_w",
+    "llvm.loongarch.lasx.xvdiv.wu" => "__builtin_lasx_xvdiv_wu",
+    "llvm.loongarch.lasx.xvexth.d.w" => "__builtin_lasx_xvexth_d_w",
+    "llvm.loongarch.lasx.xvexth.du.wu" => "__builtin_lasx_xvexth_du_wu",
+    "llvm.loongarch.lasx.xvexth.h.b" => "__builtin_lasx_xvexth_h_b",
+    "llvm.loongarch.lasx.xvexth.hu.bu" => "__builtin_lasx_xvexth_hu_bu",
+    "llvm.loongarch.lasx.xvexth.q.d" => "__builtin_lasx_xvexth_q_d",
+    "llvm.loongarch.lasx.xvexth.qu.du" => "__builtin_lasx_xvexth_qu_du",
+    "llvm.loongarch.lasx.xvexth.w.h" => "__builtin_lasx_xvexth_w_h",
+    "llvm.loongarch.lasx.xvexth.wu.hu" => "__builtin_lasx_xvexth_wu_hu",
+    "llvm.loongarch.lasx.xvextl.q.d" => "__builtin_lasx_xvextl_q_d",
+    "llvm.loongarch.lasx.xvextl.qu.du" => "__builtin_lasx_xvextl_qu_du",
+    "llvm.loongarch.lasx.xvextrins.b" => "__builtin_lasx_xvextrins_b",
+    "llvm.loongarch.lasx.xvextrins.d" => "__builtin_lasx_xvextrins_d",
+    "llvm.loongarch.lasx.xvextrins.h" => "__builtin_lasx_xvextrins_h",
+    "llvm.loongarch.lasx.xvextrins.w" => "__builtin_lasx_xvextrins_w",
+    "llvm.loongarch.lasx.xvfadd.d" => "__builtin_lasx_xvfadd_d",
+    "llvm.loongarch.lasx.xvfadd.s" => "__builtin_lasx_xvfadd_s",
+    "llvm.loongarch.lasx.xvfclass.d" => "__builtin_lasx_xvfclass_d",
+    "llvm.loongarch.lasx.xvfclass.s" => "__builtin_lasx_xvfclass_s",
+    "llvm.loongarch.lasx.xvfcmp.caf.d" => "__builtin_lasx_xvfcmp_caf_d",
+    "llvm.loongarch.lasx.xvfcmp.caf.s" => "__builtin_lasx_xvfcmp_caf_s",
+    "llvm.loongarch.lasx.xvfcmp.ceq.d" => "__builtin_lasx_xvfcmp_ceq_d",
+    "llvm.loongarch.lasx.xvfcmp.ceq.s" => "__builtin_lasx_xvfcmp_ceq_s",
+    "llvm.loongarch.lasx.xvfcmp.cle.d" => "__builtin_lasx_xvfcmp_cle_d",
+    "llvm.loongarch.lasx.xvfcmp.cle.s" => "__builtin_lasx_xvfcmp_cle_s",
+    "llvm.loongarch.lasx.xvfcmp.clt.d" => "__builtin_lasx_xvfcmp_clt_d",
+    "llvm.loongarch.lasx.xvfcmp.clt.s" => "__builtin_lasx_xvfcmp_clt_s",
+    "llvm.loongarch.lasx.xvfcmp.cne.d" => "__builtin_lasx_xvfcmp_cne_d",
+    "llvm.loongarch.lasx.xvfcmp.cne.s" => "__builtin_lasx_xvfcmp_cne_s",
+    "llvm.loongarch.lasx.xvfcmp.cor.d" => "__builtin_lasx_xvfcmp_cor_d",
+    "llvm.loongarch.lasx.xvfcmp.cor.s" => "__builtin_lasx_xvfcmp_cor_s",
+    "llvm.loongarch.lasx.xvfcmp.cueq.d" => "__builtin_lasx_xvfcmp_cueq_d",
+    "llvm.loongarch.lasx.xvfcmp.cueq.s" => "__builtin_lasx_xvfcmp_cueq_s",
+    "llvm.loongarch.lasx.xvfcmp.cule.d" => "__builtin_lasx_xvfcmp_cule_d",
+    "llvm.loongarch.lasx.xvfcmp.cule.s" => "__builtin_lasx_xvfcmp_cule_s",
+    "llvm.loongarch.lasx.xvfcmp.cult.d" => "__builtin_lasx_xvfcmp_cult_d",
+    "llvm.loongarch.lasx.xvfcmp.cult.s" => "__builtin_lasx_xvfcmp_cult_s",
+    "llvm.loongarch.lasx.xvfcmp.cun.d" => "__builtin_lasx_xvfcmp_cun_d",
+    "llvm.loongarch.lasx.xvfcmp.cun.s" => "__builtin_lasx_xvfcmp_cun_s",
+    "llvm.loongarch.lasx.xvfcmp.cune.d" => "__builtin_lasx_xvfcmp_cune_d",
+    "llvm.loongarch.lasx.xvfcmp.cune.s" => "__builtin_lasx_xvfcmp_cune_s",
+    "llvm.loongarch.lasx.xvfcmp.saf.d" => "__builtin_lasx_xvfcmp_saf_d",
+    "llvm.loongarch.lasx.xvfcmp.saf.s" => "__builtin_lasx_xvfcmp_saf_s",
+    "llvm.loongarch.lasx.xvfcmp.seq.d" => "__builtin_lasx_xvfcmp_seq_d",
+    "llvm.loongarch.lasx.xvfcmp.seq.s" => "__builtin_lasx_xvfcmp_seq_s",
+    "llvm.loongarch.lasx.xvfcmp.sle.d" => "__builtin_lasx_xvfcmp_sle_d",
+    "llvm.loongarch.lasx.xvfcmp.sle.s" => "__builtin_lasx_xvfcmp_sle_s",
+    "llvm.loongarch.lasx.xvfcmp.slt.d" => "__builtin_lasx_xvfcmp_slt_d",
+    "llvm.loongarch.lasx.xvfcmp.slt.s" => "__builtin_lasx_xvfcmp_slt_s",
+    "llvm.loongarch.lasx.xvfcmp.sne.d" => "__builtin_lasx_xvfcmp_sne_d",
+    "llvm.loongarch.lasx.xvfcmp.sne.s" => "__builtin_lasx_xvfcmp_sne_s",
+    "llvm.loongarch.lasx.xvfcmp.sor.d" => "__builtin_lasx_xvfcmp_sor_d",
+    "llvm.loongarch.lasx.xvfcmp.sor.s" => "__builtin_lasx_xvfcmp_sor_s",
+    "llvm.loongarch.lasx.xvfcmp.sueq.d" => "__builtin_lasx_xvfcmp_sueq_d",
+    "llvm.loongarch.lasx.xvfcmp.sueq.s" => "__builtin_lasx_xvfcmp_sueq_s",
+    "llvm.loongarch.lasx.xvfcmp.sule.d" => "__builtin_lasx_xvfcmp_sule_d",
+    "llvm.loongarch.lasx.xvfcmp.sule.s" => "__builtin_lasx_xvfcmp_sule_s",
+    "llvm.loongarch.lasx.xvfcmp.sult.d" => "__builtin_lasx_xvfcmp_sult_d",
+    "llvm.loongarch.lasx.xvfcmp.sult.s" => "__builtin_lasx_xvfcmp_sult_s",
+    "llvm.loongarch.lasx.xvfcmp.sun.d" => "__builtin_lasx_xvfcmp_sun_d",
+    "llvm.loongarch.lasx.xvfcmp.sun.s" => "__builtin_lasx_xvfcmp_sun_s",
+    "llvm.loongarch.lasx.xvfcmp.sune.d" => "__builtin_lasx_xvfcmp_sune_d",
+    "llvm.loongarch.lasx.xvfcmp.sune.s" => "__builtin_lasx_xvfcmp_sune_s",
+    "llvm.loongarch.lasx.xvfcvt.h.s" => "__builtin_lasx_xvfcvt_h_s",
+    "llvm.loongarch.lasx.xvfcvt.s.d" => "__builtin_lasx_xvfcvt_s_d",
+    "llvm.loongarch.lasx.xvfcvth.d.s" => "__builtin_lasx_xvfcvth_d_s",
+    "llvm.loongarch.lasx.xvfcvth.s.h" => "__builtin_lasx_xvfcvth_s_h",
+    "llvm.loongarch.lasx.xvfcvtl.d.s" => "__builtin_lasx_xvfcvtl_d_s",
+    "llvm.loongarch.lasx.xvfcvtl.s.h" => "__builtin_lasx_xvfcvtl_s_h",
+    "llvm.loongarch.lasx.xvfdiv.d" => "__builtin_lasx_xvfdiv_d",
+    "llvm.loongarch.lasx.xvfdiv.s" => "__builtin_lasx_xvfdiv_s",
+    "llvm.loongarch.lasx.xvffint.d.l" => "__builtin_lasx_xvffint_d_l",
+    "llvm.loongarch.lasx.xvffint.d.lu" => "__builtin_lasx_xvffint_d_lu",
+    "llvm.loongarch.lasx.xvffint.s.l" => "__builtin_lasx_xvffint_s_l",
+    "llvm.loongarch.lasx.xvffint.s.w" => "__builtin_lasx_xvffint_s_w",
+    "llvm.loongarch.lasx.xvffint.s.wu" => "__builtin_lasx_xvffint_s_wu",
+    "llvm.loongarch.lasx.xvffinth.d.w" => "__builtin_lasx_xvffinth_d_w",
+    "llvm.loongarch.lasx.xvffintl.d.w" => "__builtin_lasx_xvffintl_d_w",
+    "llvm.loongarch.lasx.xvflogb.d" => "__builtin_lasx_xvflogb_d",
+    "llvm.loongarch.lasx.xvflogb.s" => "__builtin_lasx_xvflogb_s",
+    "llvm.loongarch.lasx.xvfmadd.d" => "__builtin_lasx_xvfmadd_d",
+    "llvm.loongarch.lasx.xvfmadd.s" => "__builtin_lasx_xvfmadd_s",
+    "llvm.loongarch.lasx.xvfmax.d" => "__builtin_lasx_xvfmax_d",
+    "llvm.loongarch.lasx.xvfmax.s" => "__builtin_lasx_xvfmax_s",
+    "llvm.loongarch.lasx.xvfmaxa.d" => "__builtin_lasx_xvfmaxa_d",
+    "llvm.loongarch.lasx.xvfmaxa.s" => "__builtin_lasx_xvfmaxa_s",
+    "llvm.loongarch.lasx.xvfmin.d" => "__builtin_lasx_xvfmin_d",
+    "llvm.loongarch.lasx.xvfmin.s" => "__builtin_lasx_xvfmin_s",
+    "llvm.loongarch.lasx.xvfmina.d" => "__builtin_lasx_xvfmina_d",
+    "llvm.loongarch.lasx.xvfmina.s" => "__builtin_lasx_xvfmina_s",
+    "llvm.loongarch.lasx.xvfmsub.d" => "__builtin_lasx_xvfmsub_d",
+    "llvm.loongarch.lasx.xvfmsub.s" => "__builtin_lasx_xvfmsub_s",
+    "llvm.loongarch.lasx.xvfmul.d" => "__builtin_lasx_xvfmul_d",
+    "llvm.loongarch.lasx.xvfmul.s" => "__builtin_lasx_xvfmul_s",
+    "llvm.loongarch.lasx.xvfnmadd.d" => "__builtin_lasx_xvfnmadd_d",
+    "llvm.loongarch.lasx.xvfnmadd.s" => "__builtin_lasx_xvfnmadd_s",
+    "llvm.loongarch.lasx.xvfnmsub.d" => "__builtin_lasx_xvfnmsub_d",
+    "llvm.loongarch.lasx.xvfnmsub.s" => "__builtin_lasx_xvfnmsub_s",
+    "llvm.loongarch.lasx.xvfrecip.d" => "__builtin_lasx_xvfrecip_d",
+    "llvm.loongarch.lasx.xvfrecip.s" => "__builtin_lasx_xvfrecip_s",
+    "llvm.loongarch.lasx.xvfrint.d" => "__builtin_lasx_xvfrint_d",
+    "llvm.loongarch.lasx.xvfrint.s" => "__builtin_lasx_xvfrint_s",
+    "llvm.loongarch.lasx.xvfrintrm.d" => "__builtin_lasx_xvfrintrm_d",
+    "llvm.loongarch.lasx.xvfrintrm.s" => "__builtin_lasx_xvfrintrm_s",
+    "llvm.loongarch.lasx.xvfrintrne.d" => "__builtin_lasx_xvfrintrne_d",
+    "llvm.loongarch.lasx.xvfrintrne.s" => "__builtin_lasx_xvfrintrne_s",
+    "llvm.loongarch.lasx.xvfrintrp.d" => "__builtin_lasx_xvfrintrp_d",
+    "llvm.loongarch.lasx.xvfrintrp.s" => "__builtin_lasx_xvfrintrp_s",
+    "llvm.loongarch.lasx.xvfrintrz.d" => "__builtin_lasx_xvfrintrz_d",
+    "llvm.loongarch.lasx.xvfrintrz.s" => "__builtin_lasx_xvfrintrz_s",
+    "llvm.loongarch.lasx.xvfrsqrt.d" => "__builtin_lasx_xvfrsqrt_d",
+    "llvm.loongarch.lasx.xvfrsqrt.s" => "__builtin_lasx_xvfrsqrt_s",
+    "llvm.loongarch.lasx.xvfrstp.b" => "__builtin_lasx_xvfrstp_b",
+    "llvm.loongarch.lasx.xvfrstp.h" => "__builtin_lasx_xvfrstp_h",
+    "llvm.loongarch.lasx.xvfrstpi.b" => "__builtin_lasx_xvfrstpi_b",
+    "llvm.loongarch.lasx.xvfrstpi.h" => "__builtin_lasx_xvfrstpi_h",
+    "llvm.loongarch.lasx.xvfsqrt.d" => "__builtin_lasx_xvfsqrt_d",
+    "llvm.loongarch.lasx.xvfsqrt.s" => "__builtin_lasx_xvfsqrt_s",
+    "llvm.loongarch.lasx.xvfsub.d" => "__builtin_lasx_xvfsub_d",
+    "llvm.loongarch.lasx.xvfsub.s" => "__builtin_lasx_xvfsub_s",
+    "llvm.loongarch.lasx.xvftint.l.d" => "__builtin_lasx_xvftint_l_d",
+    "llvm.loongarch.lasx.xvftint.lu.d" => "__builtin_lasx_xvftint_lu_d",
+    "llvm.loongarch.lasx.xvftint.w.d" => "__builtin_lasx_xvftint_w_d",
+    "llvm.loongarch.lasx.xvftint.w.s" => "__builtin_lasx_xvftint_w_s",
+    "llvm.loongarch.lasx.xvftint.wu.s" => "__builtin_lasx_xvftint_wu_s",
+    "llvm.loongarch.lasx.xvftinth.l.s" => "__builtin_lasx_xvftinth_l_s",
+    "llvm.loongarch.lasx.xvftintl.l.s" => "__builtin_lasx_xvftintl_l_s",
+    "llvm.loongarch.lasx.xvftintrm.l.d" => "__builtin_lasx_xvftintrm_l_d",
+    "llvm.loongarch.lasx.xvftintrm.w.d" => "__builtin_lasx_xvftintrm_w_d",
+    "llvm.loongarch.lasx.xvftintrm.w.s" => "__builtin_lasx_xvftintrm_w_s",
+    "llvm.loongarch.lasx.xvftintrmh.l.s" => "__builtin_lasx_xvftintrmh_l_s",
+    "llvm.loongarch.lasx.xvftintrml.l.s" => "__builtin_lasx_xvftintrml_l_s",
+    "llvm.loongarch.lasx.xvftintrne.l.d" => "__builtin_lasx_xvftintrne_l_d",
+    "llvm.loongarch.lasx.xvftintrne.w.d" => "__builtin_lasx_xvftintrne_w_d",
+    "llvm.loongarch.lasx.xvftintrne.w.s" => "__builtin_lasx_xvftintrne_w_s",
+    "llvm.loongarch.lasx.xvftintrneh.l.s" => "__builtin_lasx_xvftintrneh_l_s",
+    "llvm.loongarch.lasx.xvftintrnel.l.s" => "__builtin_lasx_xvftintrnel_l_s",
+    "llvm.loongarch.lasx.xvftintrp.l.d" => "__builtin_lasx_xvftintrp_l_d",
+    "llvm.loongarch.lasx.xvftintrp.w.d" => "__builtin_lasx_xvftintrp_w_d",
+    "llvm.loongarch.lasx.xvftintrp.w.s" => "__builtin_lasx_xvftintrp_w_s",
+    "llvm.loongarch.lasx.xvftintrph.l.s" => "__builtin_lasx_xvftintrph_l_s",
+    "llvm.loongarch.lasx.xvftintrpl.l.s" => "__builtin_lasx_xvftintrpl_l_s",
+    "llvm.loongarch.lasx.xvftintrz.l.d" => "__builtin_lasx_xvftintrz_l_d",
+    "llvm.loongarch.lasx.xvftintrz.lu.d" => "__builtin_lasx_xvftintrz_lu_d",
+    "llvm.loongarch.lasx.xvftintrz.w.d" => "__builtin_lasx_xvftintrz_w_d",
+    "llvm.loongarch.lasx.xvftintrz.w.s" => "__builtin_lasx_xvftintrz_w_s",
+    "llvm.loongarch.lasx.xvftintrz.wu.s" => "__builtin_lasx_xvftintrz_wu_s",
+    "llvm.loongarch.lasx.xvftintrzh.l.s" => "__builtin_lasx_xvftintrzh_l_s",
+    "llvm.loongarch.lasx.xvftintrzl.l.s" => "__builtin_lasx_xvftintrzl_l_s",
+    "llvm.loongarch.lasx.xvhaddw.d.w" => "__builtin_lasx_xvhaddw_d_w",
+    "llvm.loongarch.lasx.xvhaddw.du.wu" => "__builtin_lasx_xvhaddw_du_wu",
+    "llvm.loongarch.lasx.xvhaddw.h.b" => "__builtin_lasx_xvhaddw_h_b",
+    "llvm.loongarch.lasx.xvhaddw.hu.bu" => "__builtin_lasx_xvhaddw_hu_bu",
+    "llvm.loongarch.lasx.xvhaddw.q.d" => "__builtin_lasx_xvhaddw_q_d",
+    "llvm.loongarch.lasx.xvhaddw.qu.du" => "__builtin_lasx_xvhaddw_qu_du",
+    "llvm.loongarch.lasx.xvhaddw.w.h" => "__builtin_lasx_xvhaddw_w_h",
+    "llvm.loongarch.lasx.xvhaddw.wu.hu" => "__builtin_lasx_xvhaddw_wu_hu",
+    "llvm.loongarch.lasx.xvhsubw.d.w" => "__builtin_lasx_xvhsubw_d_w",
+    "llvm.loongarch.lasx.xvhsubw.du.wu" => "__builtin_lasx_xvhsubw_du_wu",
+    "llvm.loongarch.lasx.xvhsubw.h.b" => "__builtin_lasx_xvhsubw_h_b",
+    "llvm.loongarch.lasx.xvhsubw.hu.bu" => "__builtin_lasx_xvhsubw_hu_bu",
+    "llvm.loongarch.lasx.xvhsubw.q.d" => "__builtin_lasx_xvhsubw_q_d",
+    "llvm.loongarch.lasx.xvhsubw.qu.du" => "__builtin_lasx_xvhsubw_qu_du",
+    "llvm.loongarch.lasx.xvhsubw.w.h" => "__builtin_lasx_xvhsubw_w_h",
+    "llvm.loongarch.lasx.xvhsubw.wu.hu" => "__builtin_lasx_xvhsubw_wu_hu",
+    "llvm.loongarch.lasx.xvilvh.b" => "__builtin_lasx_xvilvh_b",
+    "llvm.loongarch.lasx.xvilvh.d" => "__builtin_lasx_xvilvh_d",
+    "llvm.loongarch.lasx.xvilvh.h" => "__builtin_lasx_xvilvh_h",
+    "llvm.loongarch.lasx.xvilvh.w" => "__builtin_lasx_xvilvh_w",
+    "llvm.loongarch.lasx.xvilvl.b" => "__builtin_lasx_xvilvl_b",
+    "llvm.loongarch.lasx.xvilvl.d" => "__builtin_lasx_xvilvl_d",
+    "llvm.loongarch.lasx.xvilvl.h" => "__builtin_lasx_xvilvl_h",
+    "llvm.loongarch.lasx.xvilvl.w" => "__builtin_lasx_xvilvl_w",
+    "llvm.loongarch.lasx.xvinsgr2vr.d" => "__builtin_lasx_xvinsgr2vr_d",
+    "llvm.loongarch.lasx.xvinsgr2vr.w" => "__builtin_lasx_xvinsgr2vr_w",
+    "llvm.loongarch.lasx.xvinsve0.d" => "__builtin_lasx_xvinsve0_d",
+    "llvm.loongarch.lasx.xvinsve0.w" => "__builtin_lasx_xvinsve0_w",
+    "llvm.loongarch.lasx.xvld" => "__builtin_lasx_xvld",
+    "llvm.loongarch.lasx.xvldi" => "__builtin_lasx_xvldi",
+    "llvm.loongarch.lasx.xvldrepl.b" => "__builtin_lasx_xvldrepl_b",
+    "llvm.loongarch.lasx.xvldrepl.d" => "__builtin_lasx_xvldrepl_d",
+    "llvm.loongarch.lasx.xvldrepl.h" => "__builtin_lasx_xvldrepl_h",
+    "llvm.loongarch.lasx.xvldrepl.w" => "__builtin_lasx_xvldrepl_w",
+    "llvm.loongarch.lasx.xvldx" => "__builtin_lasx_xvldx",
+    "llvm.loongarch.lasx.xvmadd.b" => "__builtin_lasx_xvmadd_b",
+    "llvm.loongarch.lasx.xvmadd.d" => "__builtin_lasx_xvmadd_d",
+    "llvm.loongarch.lasx.xvmadd.h" => "__builtin_lasx_xvmadd_h",
+    "llvm.loongarch.lasx.xvmadd.w" => "__builtin_lasx_xvmadd_w",
+    "llvm.loongarch.lasx.xvmaddwev.d.w" => "__builtin_lasx_xvmaddwev_d_w",
+    "llvm.loongarch.lasx.xvmaddwev.d.wu" => "__builtin_lasx_xvmaddwev_d_wu",
+    "llvm.loongarch.lasx.xvmaddwev.d.wu.w" => "__builtin_lasx_xvmaddwev_d_wu_w",
+    "llvm.loongarch.lasx.xvmaddwev.h.b" => "__builtin_lasx_xvmaddwev_h_b",
+    "llvm.loongarch.lasx.xvmaddwev.h.bu" => "__builtin_lasx_xvmaddwev_h_bu",
+    "llvm.loongarch.lasx.xvmaddwev.h.bu.b" => "__builtin_lasx_xvmaddwev_h_bu_b",
+    "llvm.loongarch.lasx.xvmaddwev.q.d" => "__builtin_lasx_xvmaddwev_q_d",
+    "llvm.loongarch.lasx.xvmaddwev.q.du" => "__builtin_lasx_xvmaddwev_q_du",
+    "llvm.loongarch.lasx.xvmaddwev.q.du.d" => "__builtin_lasx_xvmaddwev_q_du_d",
+    "llvm.loongarch.lasx.xvmaddwev.w.h" => "__builtin_lasx_xvmaddwev_w_h",
+    "llvm.loongarch.lasx.xvmaddwev.w.hu" => "__builtin_lasx_xvmaddwev_w_hu",
+    "llvm.loongarch.lasx.xvmaddwev.w.hu.h" => "__builtin_lasx_xvmaddwev_w_hu_h",
+    "llvm.loongarch.lasx.xvmaddwod.d.w" => "__builtin_lasx_xvmaddwod_d_w",
+    "llvm.loongarch.lasx.xvmaddwod.d.wu" => "__builtin_lasx_xvmaddwod_d_wu",
+    "llvm.loongarch.lasx.xvmaddwod.d.wu.w" => "__builtin_lasx_xvmaddwod_d_wu_w",
+    "llvm.loongarch.lasx.xvmaddwod.h.b" => "__builtin_lasx_xvmaddwod_h_b",
+    "llvm.loongarch.lasx.xvmaddwod.h.bu" => "__builtin_lasx_xvmaddwod_h_bu",
+    "llvm.loongarch.lasx.xvmaddwod.h.bu.b" => "__builtin_lasx_xvmaddwod_h_bu_b",
+    "llvm.loongarch.lasx.xvmaddwod.q.d" => "__builtin_lasx_xvmaddwod_q_d",
+    "llvm.loongarch.lasx.xvmaddwod.q.du" => "__builtin_lasx_xvmaddwod_q_du",
+    "llvm.loongarch.lasx.xvmaddwod.q.du.d" => "__builtin_lasx_xvmaddwod_q_du_d",
+    "llvm.loongarch.lasx.xvmaddwod.w.h" => "__builtin_lasx_xvmaddwod_w_h",
+    "llvm.loongarch.lasx.xvmaddwod.w.hu" => "__builtin_lasx_xvmaddwod_w_hu",
+    "llvm.loongarch.lasx.xvmaddwod.w.hu.h" => "__builtin_lasx_xvmaddwod_w_hu_h",
+    "llvm.loongarch.lasx.xvmax.b" => "__builtin_lasx_xvmax_b",
+    "llvm.loongarch.lasx.xvmax.bu" => "__builtin_lasx_xvmax_bu",
+    "llvm.loongarch.lasx.xvmax.d" => "__builtin_lasx_xvmax_d",
+    "llvm.loongarch.lasx.xvmax.du" => "__builtin_lasx_xvmax_du",
+    "llvm.loongarch.lasx.xvmax.h" => "__builtin_lasx_xvmax_h",
+    "llvm.loongarch.lasx.xvmax.hu" => "__builtin_lasx_xvmax_hu",
+    "llvm.loongarch.lasx.xvmax.w" => "__builtin_lasx_xvmax_w",
+    "llvm.loongarch.lasx.xvmax.wu" => "__builtin_lasx_xvmax_wu",
+    "llvm.loongarch.lasx.xvmaxi.b" => "__builtin_lasx_xvmaxi_b",
+    "llvm.loongarch.lasx.xvmaxi.bu" => "__builtin_lasx_xvmaxi_bu",
+    "llvm.loongarch.lasx.xvmaxi.d" => "__builtin_lasx_xvmaxi_d",
+    "llvm.loongarch.lasx.xvmaxi.du" => "__builtin_lasx_xvmaxi_du",
+    "llvm.loongarch.lasx.xvmaxi.h" => "__builtin_lasx_xvmaxi_h",
+    "llvm.loongarch.lasx.xvmaxi.hu" => "__builtin_lasx_xvmaxi_hu",
+    "llvm.loongarch.lasx.xvmaxi.w" => "__builtin_lasx_xvmaxi_w",
+    "llvm.loongarch.lasx.xvmaxi.wu" => "__builtin_lasx_xvmaxi_wu",
+    "llvm.loongarch.lasx.xvmin.b" => "__builtin_lasx_xvmin_b",
+    "llvm.loongarch.lasx.xvmin.bu" => "__builtin_lasx_xvmin_bu",
+    "llvm.loongarch.lasx.xvmin.d" => "__builtin_lasx_xvmin_d",
+    "llvm.loongarch.lasx.xvmin.du" => "__builtin_lasx_xvmin_du",
+    "llvm.loongarch.lasx.xvmin.h" => "__builtin_lasx_xvmin_h",
+    "llvm.loongarch.lasx.xvmin.hu" => "__builtin_lasx_xvmin_hu",
+    "llvm.loongarch.lasx.xvmin.w" => "__builtin_lasx_xvmin_w",
+    "llvm.loongarch.lasx.xvmin.wu" => "__builtin_lasx_xvmin_wu",
+    "llvm.loongarch.lasx.xvmini.b" => "__builtin_lasx_xvmini_b",
+    "llvm.loongarch.lasx.xvmini.bu" => "__builtin_lasx_xvmini_bu",
+    "llvm.loongarch.lasx.xvmini.d" => "__builtin_lasx_xvmini_d",
+    "llvm.loongarch.lasx.xvmini.du" => "__builtin_lasx_xvmini_du",
+    "llvm.loongarch.lasx.xvmini.h" => "__builtin_lasx_xvmini_h",
+    "llvm.loongarch.lasx.xvmini.hu" => "__builtin_lasx_xvmini_hu",
+    "llvm.loongarch.lasx.xvmini.w" => "__builtin_lasx_xvmini_w",
+    "llvm.loongarch.lasx.xvmini.wu" => "__builtin_lasx_xvmini_wu",
+    "llvm.loongarch.lasx.xvmod.b" => "__builtin_lasx_xvmod_b",
+    "llvm.loongarch.lasx.xvmod.bu" => "__builtin_lasx_xvmod_bu",
+    "llvm.loongarch.lasx.xvmod.d" => "__builtin_lasx_xvmod_d",
+    "llvm.loongarch.lasx.xvmod.du" => "__builtin_lasx_xvmod_du",
+    "llvm.loongarch.lasx.xvmod.h" => "__builtin_lasx_xvmod_h",
+    "llvm.loongarch.lasx.xvmod.hu" => "__builtin_lasx_xvmod_hu",
+    "llvm.loongarch.lasx.xvmod.w" => "__builtin_lasx_xvmod_w",
+    "llvm.loongarch.lasx.xvmod.wu" => "__builtin_lasx_xvmod_wu",
+    "llvm.loongarch.lasx.xvmskgez.b" => "__builtin_lasx_xvmskgez_b",
+    "llvm.loongarch.lasx.xvmskltz.b" => "__builtin_lasx_xvmskltz_b",
+    "llvm.loongarch.lasx.xvmskltz.d" => "__builtin_lasx_xvmskltz_d",
+    "llvm.loongarch.lasx.xvmskltz.h" => "__builtin_lasx_xvmskltz_h",
+    "llvm.loongarch.lasx.xvmskltz.w" => "__builtin_lasx_xvmskltz_w",
+    "llvm.loongarch.lasx.xvmsknz.b" => "__builtin_lasx_xvmsknz_b",
+    "llvm.loongarch.lasx.xvmsub.b" => "__builtin_lasx_xvmsub_b",
+    "llvm.loongarch.lasx.xvmsub.d" => "__builtin_lasx_xvmsub_d",
+    "llvm.loongarch.lasx.xvmsub.h" => "__builtin_lasx_xvmsub_h",
+    "llvm.loongarch.lasx.xvmsub.w" => "__builtin_lasx_xvmsub_w",
+    "llvm.loongarch.lasx.xvmuh.b" => "__builtin_lasx_xvmuh_b",
+    "llvm.loongarch.lasx.xvmuh.bu" => "__builtin_lasx_xvmuh_bu",
+    "llvm.loongarch.lasx.xvmuh.d" => "__builtin_lasx_xvmuh_d",
+    "llvm.loongarch.lasx.xvmuh.du" => "__builtin_lasx_xvmuh_du",
+    "llvm.loongarch.lasx.xvmuh.h" => "__builtin_lasx_xvmuh_h",
+    "llvm.loongarch.lasx.xvmuh.hu" => "__builtin_lasx_xvmuh_hu",
+    "llvm.loongarch.lasx.xvmuh.w" => "__builtin_lasx_xvmuh_w",
+    "llvm.loongarch.lasx.xvmuh.wu" => "__builtin_lasx_xvmuh_wu",
+    "llvm.loongarch.lasx.xvmul.b" => "__builtin_lasx_xvmul_b",
+    "llvm.loongarch.lasx.xvmul.d" => "__builtin_lasx_xvmul_d",
+    "llvm.loongarch.lasx.xvmul.h" => "__builtin_lasx_xvmul_h",
+    "llvm.loongarch.lasx.xvmul.w" => "__builtin_lasx_xvmul_w",
+    "llvm.loongarch.lasx.xvmulwev.d.w" => "__builtin_lasx_xvmulwev_d_w",
+    "llvm.loongarch.lasx.xvmulwev.d.wu" => "__builtin_lasx_xvmulwev_d_wu",
+    "llvm.loongarch.lasx.xvmulwev.d.wu.w" => "__builtin_lasx_xvmulwev_d_wu_w",
+    "llvm.loongarch.lasx.xvmulwev.h.b" => "__builtin_lasx_xvmulwev_h_b",
+    "llvm.loongarch.lasx.xvmulwev.h.bu" => "__builtin_lasx_xvmulwev_h_bu",
+    "llvm.loongarch.lasx.xvmulwev.h.bu.b" => "__builtin_lasx_xvmulwev_h_bu_b",
+    "llvm.loongarch.lasx.xvmulwev.q.d" => "__builtin_lasx_xvmulwev_q_d",
+    "llvm.loongarch.lasx.xvmulwev.q.du" => "__builtin_lasx_xvmulwev_q_du",
+    "llvm.loongarch.lasx.xvmulwev.q.du.d" => "__builtin_lasx_xvmulwev_q_du_d",
+    "llvm.loongarch.lasx.xvmulwev.w.h" => "__builtin_lasx_xvmulwev_w_h",
+    "llvm.loongarch.lasx.xvmulwev.w.hu" => "__builtin_lasx_xvmulwev_w_hu",
+    "llvm.loongarch.lasx.xvmulwev.w.hu.h" => "__builtin_lasx_xvmulwev_w_hu_h",
+    "llvm.loongarch.lasx.xvmulwod.d.w" => "__builtin_lasx_xvmulwod_d_w",
+    "llvm.loongarch.lasx.xvmulwod.d.wu" => "__builtin_lasx_xvmulwod_d_wu",
+    "llvm.loongarch.lasx.xvmulwod.d.wu.w" => "__builtin_lasx_xvmulwod_d_wu_w",
+    "llvm.loongarch.lasx.xvmulwod.h.b" => "__builtin_lasx_xvmulwod_h_b",
+    "llvm.loongarch.lasx.xvmulwod.h.bu" => "__builtin_lasx_xvmulwod_h_bu",
+    "llvm.loongarch.lasx.xvmulwod.h.bu.b" => "__builtin_lasx_xvmulwod_h_bu_b",
+    "llvm.loongarch.lasx.xvmulwod.q.d" => "__builtin_lasx_xvmulwod_q_d",
+    "llvm.loongarch.lasx.xvmulwod.q.du" => "__builtin_lasx_xvmulwod_q_du",
+    "llvm.loongarch.lasx.xvmulwod.q.du.d" => "__builtin_lasx_xvmulwod_q_du_d",
+    "llvm.loongarch.lasx.xvmulwod.w.h" => "__builtin_lasx_xvmulwod_w_h",
+    "llvm.loongarch.lasx.xvmulwod.w.hu" => "__builtin_lasx_xvmulwod_w_hu",
+    "llvm.loongarch.lasx.xvmulwod.w.hu.h" => "__builtin_lasx_xvmulwod_w_hu_h",
+    "llvm.loongarch.lasx.xvneg.b" => "__builtin_lasx_xvneg_b",
+    "llvm.loongarch.lasx.xvneg.d" => "__builtin_lasx_xvneg_d",
+    "llvm.loongarch.lasx.xvneg.h" => "__builtin_lasx_xvneg_h",
+    "llvm.loongarch.lasx.xvneg.w" => "__builtin_lasx_xvneg_w",
+    "llvm.loongarch.lasx.xvnor.v" => "__builtin_lasx_xvnor_v",
+    "llvm.loongarch.lasx.xvnori.b" => "__builtin_lasx_xvnori_b",
+    "llvm.loongarch.lasx.xvor.v" => "__builtin_lasx_xvor_v",
+    "llvm.loongarch.lasx.xvori.b" => "__builtin_lasx_xvori_b",
+    "llvm.loongarch.lasx.xvorn.v" => "__builtin_lasx_xvorn_v",
+    "llvm.loongarch.lasx.xvpackev.b" => "__builtin_lasx_xvpackev_b",
+    "llvm.loongarch.lasx.xvpackev.d" => "__builtin_lasx_xvpackev_d",
+    "llvm.loongarch.lasx.xvpackev.h" => "__builtin_lasx_xvpackev_h",
+    "llvm.loongarch.lasx.xvpackev.w" => "__builtin_lasx_xvpackev_w",
+    "llvm.loongarch.lasx.xvpackod.b" => "__builtin_lasx_xvpackod_b",
+    "llvm.loongarch.lasx.xvpackod.d" => "__builtin_lasx_xvpackod_d",
+    "llvm.loongarch.lasx.xvpackod.h" => "__builtin_lasx_xvpackod_h",
+    "llvm.loongarch.lasx.xvpackod.w" => "__builtin_lasx_xvpackod_w",
+    "llvm.loongarch.lasx.xvpcnt.b" => "__builtin_lasx_xvpcnt_b",
+    "llvm.loongarch.lasx.xvpcnt.d" => "__builtin_lasx_xvpcnt_d",
+    "llvm.loongarch.lasx.xvpcnt.h" => "__builtin_lasx_xvpcnt_h",
+    "llvm.loongarch.lasx.xvpcnt.w" => "__builtin_lasx_xvpcnt_w",
+    "llvm.loongarch.lasx.xvperm.w" => "__builtin_lasx_xvperm_w",
+    "llvm.loongarch.lasx.xvpermi.d" => "__builtin_lasx_xvpermi_d",
+    "llvm.loongarch.lasx.xvpermi.q" => "__builtin_lasx_xvpermi_q",
+    "llvm.loongarch.lasx.xvpermi.w" => "__builtin_lasx_xvpermi_w",
+    "llvm.loongarch.lasx.xvpickev.b" => "__builtin_lasx_xvpickev_b",
+    "llvm.loongarch.lasx.xvpickev.d" => "__builtin_lasx_xvpickev_d",
+    "llvm.loongarch.lasx.xvpickev.h" => "__builtin_lasx_xvpickev_h",
+    "llvm.loongarch.lasx.xvpickev.w" => "__builtin_lasx_xvpickev_w",
+    "llvm.loongarch.lasx.xvpickod.b" => "__builtin_lasx_xvpickod_b",
+    "llvm.loongarch.lasx.xvpickod.d" => "__builtin_lasx_xvpickod_d",
+    "llvm.loongarch.lasx.xvpickod.h" => "__builtin_lasx_xvpickod_h",
+    "llvm.loongarch.lasx.xvpickod.w" => "__builtin_lasx_xvpickod_w",
+    "llvm.loongarch.lasx.xvpickve.d" => "__builtin_lasx_xvpickve_d",
+    "llvm.loongarch.lasx.xvpickve.d.f" => "__builtin_lasx_xvpickve_d_f",
+    "llvm.loongarch.lasx.xvpickve.w" => "__builtin_lasx_xvpickve_w",
+    "llvm.loongarch.lasx.xvpickve.w.f" => "__builtin_lasx_xvpickve_w_f",
+    "llvm.loongarch.lasx.xvpickve2gr.d" => "__builtin_lasx_xvpickve2gr_d",
+    "llvm.loongarch.lasx.xvpickve2gr.du" => "__builtin_lasx_xvpickve2gr_du",
+    "llvm.loongarch.lasx.xvpickve2gr.w" => "__builtin_lasx_xvpickve2gr_w",
+    "llvm.loongarch.lasx.xvpickve2gr.wu" => "__builtin_lasx_xvpickve2gr_wu",
+    "llvm.loongarch.lasx.xvrepl128vei.b" => "__builtin_lasx_xvrepl128vei_b",
+    "llvm.loongarch.lasx.xvrepl128vei.d" => "__builtin_lasx_xvrepl128vei_d",
+    "llvm.loongarch.lasx.xvrepl128vei.h" => "__builtin_lasx_xvrepl128vei_h",
+    "llvm.loongarch.lasx.xvrepl128vei.w" => "__builtin_lasx_xvrepl128vei_w",
+    "llvm.loongarch.lasx.xvreplgr2vr.b" => "__builtin_lasx_xvreplgr2vr_b",
+    "llvm.loongarch.lasx.xvreplgr2vr.d" => "__builtin_lasx_xvreplgr2vr_d",
+    "llvm.loongarch.lasx.xvreplgr2vr.h" => "__builtin_lasx_xvreplgr2vr_h",
+    "llvm.loongarch.lasx.xvreplgr2vr.w" => "__builtin_lasx_xvreplgr2vr_w",
+    "llvm.loongarch.lasx.xvrepli.b" => "__builtin_lasx_xvrepli_b",
+    "llvm.loongarch.lasx.xvrepli.d" => "__builtin_lasx_xvrepli_d",
+    "llvm.loongarch.lasx.xvrepli.h" => "__builtin_lasx_xvrepli_h",
+    "llvm.loongarch.lasx.xvrepli.w" => "__builtin_lasx_xvrepli_w",
+    "llvm.loongarch.lasx.xvreplve.b" => "__builtin_lasx_xvreplve_b",
+    "llvm.loongarch.lasx.xvreplve.d" => "__builtin_lasx_xvreplve_d",
+    "llvm.loongarch.lasx.xvreplve.h" => "__builtin_lasx_xvreplve_h",
+    "llvm.loongarch.lasx.xvreplve.w" => "__builtin_lasx_xvreplve_w",
+    "llvm.loongarch.lasx.xvreplve0.b" => "__builtin_lasx_xvreplve0_b",
+    "llvm.loongarch.lasx.xvreplve0.d" => "__builtin_lasx_xvreplve0_d",
+    "llvm.loongarch.lasx.xvreplve0.h" => "__builtin_lasx_xvreplve0_h",
+    "llvm.loongarch.lasx.xvreplve0.q" => "__builtin_lasx_xvreplve0_q",
+    "llvm.loongarch.lasx.xvreplve0.w" => "__builtin_lasx_xvreplve0_w",
+    "llvm.loongarch.lasx.xvrotr.b" => "__builtin_lasx_xvrotr_b",
+    "llvm.loongarch.lasx.xvrotr.d" => "__builtin_lasx_xvrotr_d",
+    "llvm.loongarch.lasx.xvrotr.h" => "__builtin_lasx_xvrotr_h",
+    "llvm.loongarch.lasx.xvrotr.w" => "__builtin_lasx_xvrotr_w",
+    "llvm.loongarch.lasx.xvrotri.b" => "__builtin_lasx_xvrotri_b",
+    "llvm.loongarch.lasx.xvrotri.d" => "__builtin_lasx_xvrotri_d",
+    "llvm.loongarch.lasx.xvrotri.h" => "__builtin_lasx_xvrotri_h",
+    "llvm.loongarch.lasx.xvrotri.w" => "__builtin_lasx_xvrotri_w",
+    "llvm.loongarch.lasx.xvsadd.b" => "__builtin_lasx_xvsadd_b",
+    "llvm.loongarch.lasx.xvsadd.bu" => "__builtin_lasx_xvsadd_bu",
+    "llvm.loongarch.lasx.xvsadd.d" => "__builtin_lasx_xvsadd_d",
+    "llvm.loongarch.lasx.xvsadd.du" => "__builtin_lasx_xvsadd_du",
+    "llvm.loongarch.lasx.xvsadd.h" => "__builtin_lasx_xvsadd_h",
+    "llvm.loongarch.lasx.xvsadd.hu" => "__builtin_lasx_xvsadd_hu",
+    "llvm.loongarch.lasx.xvsadd.w" => "__builtin_lasx_xvsadd_w",
+    "llvm.loongarch.lasx.xvsadd.wu" => "__builtin_lasx_xvsadd_wu",
+    "llvm.loongarch.lasx.xvsat.b" => "__builtin_lasx_xvsat_b",
+    "llvm.loongarch.lasx.xvsat.bu" => "__builtin_lasx_xvsat_bu",
+    "llvm.loongarch.lasx.xvsat.d" => "__builtin_lasx_xvsat_d",
+    "llvm.loongarch.lasx.xvsat.du" => "__builtin_lasx_xvsat_du",
+    "llvm.loongarch.lasx.xvsat.h" => "__builtin_lasx_xvsat_h",
+    "llvm.loongarch.lasx.xvsat.hu" => "__builtin_lasx_xvsat_hu",
+    "llvm.loongarch.lasx.xvsat.w" => "__builtin_lasx_xvsat_w",
+    "llvm.loongarch.lasx.xvsat.wu" => "__builtin_lasx_xvsat_wu",
+    "llvm.loongarch.lasx.xvseq.b" => "__builtin_lasx_xvseq_b",
+    "llvm.loongarch.lasx.xvseq.d" => "__builtin_lasx_xvseq_d",
+    "llvm.loongarch.lasx.xvseq.h" => "__builtin_lasx_xvseq_h",
+    "llvm.loongarch.lasx.xvseq.w" => "__builtin_lasx_xvseq_w",
+    "llvm.loongarch.lasx.xvseqi.b" => "__builtin_lasx_xvseqi_b",
+    "llvm.loongarch.lasx.xvseqi.d" => "__builtin_lasx_xvseqi_d",
+    "llvm.loongarch.lasx.xvseqi.h" => "__builtin_lasx_xvseqi_h",
+    "llvm.loongarch.lasx.xvseqi.w" => "__builtin_lasx_xvseqi_w",
+    "llvm.loongarch.lasx.xvshuf.b" => "__builtin_lasx_xvshuf_b",
+    "llvm.loongarch.lasx.xvshuf.d" => "__builtin_lasx_xvshuf_d",
+    "llvm.loongarch.lasx.xvshuf.h" => "__builtin_lasx_xvshuf_h",
+    "llvm.loongarch.lasx.xvshuf.w" => "__builtin_lasx_xvshuf_w",
+    "llvm.loongarch.lasx.xvshuf4i.b" => "__builtin_lasx_xvshuf4i_b",
+    "llvm.loongarch.lasx.xvshuf4i.d" => "__builtin_lasx_xvshuf4i_d",
+    "llvm.loongarch.lasx.xvshuf4i.h" => "__builtin_lasx_xvshuf4i_h",
+    "llvm.loongarch.lasx.xvshuf4i.w" => "__builtin_lasx_xvshuf4i_w",
+    "llvm.loongarch.lasx.xvsigncov.b" => "__builtin_lasx_xvsigncov_b",
+    "llvm.loongarch.lasx.xvsigncov.d" => "__builtin_lasx_xvsigncov_d",
+    "llvm.loongarch.lasx.xvsigncov.h" => "__builtin_lasx_xvsigncov_h",
+    "llvm.loongarch.lasx.xvsigncov.w" => "__builtin_lasx_xvsigncov_w",
+    "llvm.loongarch.lasx.xvsle.b" => "__builtin_lasx_xvsle_b",
+    "llvm.loongarch.lasx.xvsle.bu" => "__builtin_lasx_xvsle_bu",
+    "llvm.loongarch.lasx.xvsle.d" => "__builtin_lasx_xvsle_d",
+    "llvm.loongarch.lasx.xvsle.du" => "__builtin_lasx_xvsle_du",
+    "llvm.loongarch.lasx.xvsle.h" => "__builtin_lasx_xvsle_h",
+    "llvm.loongarch.lasx.xvsle.hu" => "__builtin_lasx_xvsle_hu",
+    "llvm.loongarch.lasx.xvsle.w" => "__builtin_lasx_xvsle_w",
+    "llvm.loongarch.lasx.xvsle.wu" => "__builtin_lasx_xvsle_wu",
+    "llvm.loongarch.lasx.xvslei.b" => "__builtin_lasx_xvslei_b",
+    "llvm.loongarch.lasx.xvslei.bu" => "__builtin_lasx_xvslei_bu",
+    "llvm.loongarch.lasx.xvslei.d" => "__builtin_lasx_xvslei_d",
+    "llvm.loongarch.lasx.xvslei.du" => "__builtin_lasx_xvslei_du",
+    "llvm.loongarch.lasx.xvslei.h" => "__builtin_lasx_xvslei_h",
+    "llvm.loongarch.lasx.xvslei.hu" => "__builtin_lasx_xvslei_hu",
+    "llvm.loongarch.lasx.xvslei.w" => "__builtin_lasx_xvslei_w",
+    "llvm.loongarch.lasx.xvslei.wu" => "__builtin_lasx_xvslei_wu",
+    "llvm.loongarch.lasx.xvsll.b" => "__builtin_lasx_xvsll_b",
+    "llvm.loongarch.lasx.xvsll.d" => "__builtin_lasx_xvsll_d",
+    "llvm.loongarch.lasx.xvsll.h" => "__builtin_lasx_xvsll_h",
+    "llvm.loongarch.lasx.xvsll.w" => "__builtin_lasx_xvsll_w",
+    "llvm.loongarch.lasx.xvslli.b" => "__builtin_lasx_xvslli_b",
+    "llvm.loongarch.lasx.xvslli.d" => "__builtin_lasx_xvslli_d",
+    "llvm.loongarch.lasx.xvslli.h" => "__builtin_lasx_xvslli_h",
+    "llvm.loongarch.lasx.xvslli.w" => "__builtin_lasx_xvslli_w",
+    "llvm.loongarch.lasx.xvsllwil.d.w" => "__builtin_lasx_xvsllwil_d_w",
+    "llvm.loongarch.lasx.xvsllwil.du.wu" => "__builtin_lasx_xvsllwil_du_wu",
+    "llvm.loongarch.lasx.xvsllwil.h.b" => "__builtin_lasx_xvsllwil_h_b",
+    "llvm.loongarch.lasx.xvsllwil.hu.bu" => "__builtin_lasx_xvsllwil_hu_bu",
+    "llvm.loongarch.lasx.xvsllwil.w.h" => "__builtin_lasx_xvsllwil_w_h",
+    "llvm.loongarch.lasx.xvsllwil.wu.hu" => "__builtin_lasx_xvsllwil_wu_hu",
+    "llvm.loongarch.lasx.xvslt.b" => "__builtin_lasx_xvslt_b",
+    "llvm.loongarch.lasx.xvslt.bu" => "__builtin_lasx_xvslt_bu",
+    "llvm.loongarch.lasx.xvslt.d" => "__builtin_lasx_xvslt_d",
+    "llvm.loongarch.lasx.xvslt.du" => "__builtin_lasx_xvslt_du",
+    "llvm.loongarch.lasx.xvslt.h" => "__builtin_lasx_xvslt_h",
+    "llvm.loongarch.lasx.xvslt.hu" => "__builtin_lasx_xvslt_hu",
+    "llvm.loongarch.lasx.xvslt.w" => "__builtin_lasx_xvslt_w",
+    "llvm.loongarch.lasx.xvslt.wu" => "__builtin_lasx_xvslt_wu",
+    "llvm.loongarch.lasx.xvslti.b" => "__builtin_lasx_xvslti_b",
+    "llvm.loongarch.lasx.xvslti.bu" => "__builtin_lasx_xvslti_bu",
+    "llvm.loongarch.lasx.xvslti.d" => "__builtin_lasx_xvslti_d",
+    "llvm.loongarch.lasx.xvslti.du" => "__builtin_lasx_xvslti_du",
+    "llvm.loongarch.lasx.xvslti.h" => "__builtin_lasx_xvslti_h",
+    "llvm.loongarch.lasx.xvslti.hu" => "__builtin_lasx_xvslti_hu",
+    "llvm.loongarch.lasx.xvslti.w" => "__builtin_lasx_xvslti_w",
+    "llvm.loongarch.lasx.xvslti.wu" => "__builtin_lasx_xvslti_wu",
+    "llvm.loongarch.lasx.xvsra.b" => "__builtin_lasx_xvsra_b",
+    "llvm.loongarch.lasx.xvsra.d" => "__builtin_lasx_xvsra_d",
+    "llvm.loongarch.lasx.xvsra.h" => "__builtin_lasx_xvsra_h",
+    "llvm.loongarch.lasx.xvsra.w" => "__builtin_lasx_xvsra_w",
+    "llvm.loongarch.lasx.xvsrai.b" => "__builtin_lasx_xvsrai_b",
+    "llvm.loongarch.lasx.xvsrai.d" => "__builtin_lasx_xvsrai_d",
+    "llvm.loongarch.lasx.xvsrai.h" => "__builtin_lasx_xvsrai_h",
+    "llvm.loongarch.lasx.xvsrai.w" => "__builtin_lasx_xvsrai_w",
+    "llvm.loongarch.lasx.xvsran.b.h" => "__builtin_lasx_xvsran_b_h",
+    "llvm.loongarch.lasx.xvsran.h.w" => "__builtin_lasx_xvsran_h_w",
+    "llvm.loongarch.lasx.xvsran.w.d" => "__builtin_lasx_xvsran_w_d",
+    "llvm.loongarch.lasx.xvsrani.b.h" => "__builtin_lasx_xvsrani_b_h",
+    "llvm.loongarch.lasx.xvsrani.d.q" => "__builtin_lasx_xvsrani_d_q",
+    "llvm.loongarch.lasx.xvsrani.h.w" => "__builtin_lasx_xvsrani_h_w",
+    "llvm.loongarch.lasx.xvsrani.w.d" => "__builtin_lasx_xvsrani_w_d",
+    "llvm.loongarch.lasx.xvsrar.b" => "__builtin_lasx_xvsrar_b",
+    "llvm.loongarch.lasx.xvsrar.d" => "__builtin_lasx_xvsrar_d",
+    "llvm.loongarch.lasx.xvsrar.h" => "__builtin_lasx_xvsrar_h",
+    "llvm.loongarch.lasx.xvsrar.w" => "__builtin_lasx_xvsrar_w",
+    "llvm.loongarch.lasx.xvsrari.b" => "__builtin_lasx_xvsrari_b",
+    "llvm.loongarch.lasx.xvsrari.d" => "__builtin_lasx_xvsrari_d",
+    "llvm.loongarch.lasx.xvsrari.h" => "__builtin_lasx_xvsrari_h",
+    "llvm.loongarch.lasx.xvsrari.w" => "__builtin_lasx_xvsrari_w",
+    "llvm.loongarch.lasx.xvsrarn.b.h" => "__builtin_lasx_xvsrarn_b_h",
+    "llvm.loongarch.lasx.xvsrarn.h.w" => "__builtin_lasx_xvsrarn_h_w",
+    "llvm.loongarch.lasx.xvsrarn.w.d" => "__builtin_lasx_xvsrarn_w_d",
+    "llvm.loongarch.lasx.xvsrarni.b.h" => "__builtin_lasx_xvsrarni_b_h",
+    "llvm.loongarch.lasx.xvsrarni.d.q" => "__builtin_lasx_xvsrarni_d_q",
+    "llvm.loongarch.lasx.xvsrarni.h.w" => "__builtin_lasx_xvsrarni_h_w",
+    "llvm.loongarch.lasx.xvsrarni.w.d" => "__builtin_lasx_xvsrarni_w_d",
+    "llvm.loongarch.lasx.xvsrl.b" => "__builtin_lasx_xvsrl_b",
+    "llvm.loongarch.lasx.xvsrl.d" => "__builtin_lasx_xvsrl_d",
+    "llvm.loongarch.lasx.xvsrl.h" => "__builtin_lasx_xvsrl_h",
+    "llvm.loongarch.lasx.xvsrl.w" => "__builtin_lasx_xvsrl_w",
+    "llvm.loongarch.lasx.xvsrli.b" => "__builtin_lasx_xvsrli_b",
+    "llvm.loongarch.lasx.xvsrli.d" => "__builtin_lasx_xvsrli_d",
+    "llvm.loongarch.lasx.xvsrli.h" => "__builtin_lasx_xvsrli_h",
+    "llvm.loongarch.lasx.xvsrli.w" => "__builtin_lasx_xvsrli_w",
+    "llvm.loongarch.lasx.xvsrln.b.h" => "__builtin_lasx_xvsrln_b_h",
+    "llvm.loongarch.lasx.xvsrln.h.w" => "__builtin_lasx_xvsrln_h_w",
+    "llvm.loongarch.lasx.xvsrln.w.d" => "__builtin_lasx_xvsrln_w_d",
+    "llvm.loongarch.lasx.xvsrlni.b.h" => "__builtin_lasx_xvsrlni_b_h",
+    "llvm.loongarch.lasx.xvsrlni.d.q" => "__builtin_lasx_xvsrlni_d_q",
+    "llvm.loongarch.lasx.xvsrlni.h.w" => "__builtin_lasx_xvsrlni_h_w",
+    "llvm.loongarch.lasx.xvsrlni.w.d" => "__builtin_lasx_xvsrlni_w_d",
+    "llvm.loongarch.lasx.xvsrlr.b" => "__builtin_lasx_xvsrlr_b",
+    "llvm.loongarch.lasx.xvsrlr.d" => "__builtin_lasx_xvsrlr_d",
+    "llvm.loongarch.lasx.xvsrlr.h" => "__builtin_lasx_xvsrlr_h",
+    "llvm.loongarch.lasx.xvsrlr.w" => "__builtin_lasx_xvsrlr_w",
+    "llvm.loongarch.lasx.xvsrlri.b" => "__builtin_lasx_xvsrlri_b",
+    "llvm.loongarch.lasx.xvsrlri.d" => "__builtin_lasx_xvsrlri_d",
+    "llvm.loongarch.lasx.xvsrlri.h" => "__builtin_lasx_xvsrlri_h",
+    "llvm.loongarch.lasx.xvsrlri.w" => "__builtin_lasx_xvsrlri_w",
+    "llvm.loongarch.lasx.xvsrlrn.b.h" => "__builtin_lasx_xvsrlrn_b_h",
+    "llvm.loongarch.lasx.xvsrlrn.h.w" => "__builtin_lasx_xvsrlrn_h_w",
+    "llvm.loongarch.lasx.xvsrlrn.w.d" => "__builtin_lasx_xvsrlrn_w_d",
+    "llvm.loongarch.lasx.xvsrlrni.b.h" => "__builtin_lasx_xvsrlrni_b_h",
+    "llvm.loongarch.lasx.xvsrlrni.d.q" => "__builtin_lasx_xvsrlrni_d_q",
+    "llvm.loongarch.lasx.xvsrlrni.h.w" => "__builtin_lasx_xvsrlrni_h_w",
+    "llvm.loongarch.lasx.xvsrlrni.w.d" => "__builtin_lasx_xvsrlrni_w_d",
+    "llvm.loongarch.lasx.xvssran.b.h" => "__builtin_lasx_xvssran_b_h",
+    "llvm.loongarch.lasx.xvssran.bu.h" => "__builtin_lasx_xvssran_bu_h",
+    "llvm.loongarch.lasx.xvssran.h.w" => "__builtin_lasx_xvssran_h_w",
+    "llvm.loongarch.lasx.xvssran.hu.w" => "__builtin_lasx_xvssran_hu_w",
+    "llvm.loongarch.lasx.xvssran.w.d" => "__builtin_lasx_xvssran_w_d",
+    "llvm.loongarch.lasx.xvssran.wu.d" => "__builtin_lasx_xvssran_wu_d",
+    "llvm.loongarch.lasx.xvssrani.b.h" => "__builtin_lasx_xvssrani_b_h",
+    "llvm.loongarch.lasx.xvssrani.bu.h" => "__builtin_lasx_xvssrani_bu_h",
+    "llvm.loongarch.lasx.xvssrani.d.q" => "__builtin_lasx_xvssrani_d_q",
+    "llvm.loongarch.lasx.xvssrani.du.q" => "__builtin_lasx_xvssrani_du_q",
+    "llvm.loongarch.lasx.xvssrani.h.w" => "__builtin_lasx_xvssrani_h_w",
+    "llvm.loongarch.lasx.xvssrani.hu.w" => "__builtin_lasx_xvssrani_hu_w",
+    "llvm.loongarch.lasx.xvssrani.w.d" => "__builtin_lasx_xvssrani_w_d",
+    "llvm.loongarch.lasx.xvssrani.wu.d" => "__builtin_lasx_xvssrani_wu_d",
+    "llvm.loongarch.lasx.xvssrarn.b.h" => "__builtin_lasx_xvssrarn_b_h",
+    "llvm.loongarch.lasx.xvssrarn.bu.h" => "__builtin_lasx_xvssrarn_bu_h",
+    "llvm.loongarch.lasx.xvssrarn.h.w" => "__builtin_lasx_xvssrarn_h_w",
+    "llvm.loongarch.lasx.xvssrarn.hu.w" => "__builtin_lasx_xvssrarn_hu_w",
+    "llvm.loongarch.lasx.xvssrarn.w.d" => "__builtin_lasx_xvssrarn_w_d",
+    "llvm.loongarch.lasx.xvssrarn.wu.d" => "__builtin_lasx_xvssrarn_wu_d",
+    "llvm.loongarch.lasx.xvssrarni.b.h" => "__builtin_lasx_xvssrarni_b_h",
+    "llvm.loongarch.lasx.xvssrarni.bu.h" => "__builtin_lasx_xvssrarni_bu_h",
+    "llvm.loongarch.lasx.xvssrarni.d.q" => "__builtin_lasx_xvssrarni_d_q",
+    "llvm.loongarch.lasx.xvssrarni.du.q" => "__builtin_lasx_xvssrarni_du_q",
+    "llvm.loongarch.lasx.xvssrarni.h.w" => "__builtin_lasx_xvssrarni_h_w",
+    "llvm.loongarch.lasx.xvssrarni.hu.w" => "__builtin_lasx_xvssrarni_hu_w",
+    "llvm.loongarch.lasx.xvssrarni.w.d" => "__builtin_lasx_xvssrarni_w_d",
+    "llvm.loongarch.lasx.xvssrarni.wu.d" => "__builtin_lasx_xvssrarni_wu_d",
+    "llvm.loongarch.lasx.xvssrln.b.h" => "__builtin_lasx_xvssrln_b_h",
+    "llvm.loongarch.lasx.xvssrln.bu.h" => "__builtin_lasx_xvssrln_bu_h",
+    "llvm.loongarch.lasx.xvssrln.h.w" => "__builtin_lasx_xvssrln_h_w",
+    "llvm.loongarch.lasx.xvssrln.hu.w" => "__builtin_lasx_xvssrln_hu_w",
+    "llvm.loongarch.lasx.xvssrln.w.d" => "__builtin_lasx_xvssrln_w_d",
+    "llvm.loongarch.lasx.xvssrln.wu.d" => "__builtin_lasx_xvssrln_wu_d",
+    "llvm.loongarch.lasx.xvssrlni.b.h" => "__builtin_lasx_xvssrlni_b_h",
+    "llvm.loongarch.lasx.xvssrlni.bu.h" => "__builtin_lasx_xvssrlni_bu_h",
+    "llvm.loongarch.lasx.xvssrlni.d.q" => "__builtin_lasx_xvssrlni_d_q",
+    "llvm.loongarch.lasx.xvssrlni.du.q" => "__builtin_lasx_xvssrlni_du_q",
+    "llvm.loongarch.lasx.xvssrlni.h.w" => "__builtin_lasx_xvssrlni_h_w",
+    "llvm.loongarch.lasx.xvssrlni.hu.w" => "__builtin_lasx_xvssrlni_hu_w",
+    "llvm.loongarch.lasx.xvssrlni.w.d" => "__builtin_lasx_xvssrlni_w_d",
+    "llvm.loongarch.lasx.xvssrlni.wu.d" => "__builtin_lasx_xvssrlni_wu_d",
+    "llvm.loongarch.lasx.xvssrlrn.b.h" => "__builtin_lasx_xvssrlrn_b_h",
+    "llvm.loongarch.lasx.xvssrlrn.bu.h" => "__builtin_lasx_xvssrlrn_bu_h",
+    "llvm.loongarch.lasx.xvssrlrn.h.w" => "__builtin_lasx_xvssrlrn_h_w",
+    "llvm.loongarch.lasx.xvssrlrn.hu.w" => "__builtin_lasx_xvssrlrn_hu_w",
+    "llvm.loongarch.lasx.xvssrlrn.w.d" => "__builtin_lasx_xvssrlrn_w_d",
+    "llvm.loongarch.lasx.xvssrlrn.wu.d" => "__builtin_lasx_xvssrlrn_wu_d",
+    "llvm.loongarch.lasx.xvssrlrni.b.h" => "__builtin_lasx_xvssrlrni_b_h",
+    "llvm.loongarch.lasx.xvssrlrni.bu.h" => "__builtin_lasx_xvssrlrni_bu_h",
+    "llvm.loongarch.lasx.xvssrlrni.d.q" => "__builtin_lasx_xvssrlrni_d_q",
+    "llvm.loongarch.lasx.xvssrlrni.du.q" => "__builtin_lasx_xvssrlrni_du_q",
+    "llvm.loongarch.lasx.xvssrlrni.h.w" => "__builtin_lasx_xvssrlrni_h_w",
+    "llvm.loongarch.lasx.xvssrlrni.hu.w" => "__builtin_lasx_xvssrlrni_hu_w",
+    "llvm.loongarch.lasx.xvssrlrni.w.d" => "__builtin_lasx_xvssrlrni_w_d",
+    "llvm.loongarch.lasx.xvssrlrni.wu.d" => "__builtin_lasx_xvssrlrni_wu_d",
+    "llvm.loongarch.lasx.xvssub.b" => "__builtin_lasx_xvssub_b",
+    "llvm.loongarch.lasx.xvssub.bu" => "__builtin_lasx_xvssub_bu",
+    "llvm.loongarch.lasx.xvssub.d" => "__builtin_lasx_xvssub_d",
+    "llvm.loongarch.lasx.xvssub.du" => "__builtin_lasx_xvssub_du",
+    "llvm.loongarch.lasx.xvssub.h" => "__builtin_lasx_xvssub_h",
+    "llvm.loongarch.lasx.xvssub.hu" => "__builtin_lasx_xvssub_hu",
+    "llvm.loongarch.lasx.xvssub.w" => "__builtin_lasx_xvssub_w",
+    "llvm.loongarch.lasx.xvssub.wu" => "__builtin_lasx_xvssub_wu",
+    "llvm.loongarch.lasx.xvst" => "__builtin_lasx_xvst",
+    "llvm.loongarch.lasx.xvstelm.b" => "__builtin_lasx_xvstelm_b",
+    "llvm.loongarch.lasx.xvstelm.d" => "__builtin_lasx_xvstelm_d",
+    "llvm.loongarch.lasx.xvstelm.h" => "__builtin_lasx_xvstelm_h",
+    "llvm.loongarch.lasx.xvstelm.w" => "__builtin_lasx_xvstelm_w",
+    "llvm.loongarch.lasx.xvstx" => "__builtin_lasx_xvstx",
+    "llvm.loongarch.lasx.xvsub.b" => "__builtin_lasx_xvsub_b",
+    "llvm.loongarch.lasx.xvsub.d" => "__builtin_lasx_xvsub_d",
+    "llvm.loongarch.lasx.xvsub.h" => "__builtin_lasx_xvsub_h",
+    "llvm.loongarch.lasx.xvsub.q" => "__builtin_lasx_xvsub_q",
+    "llvm.loongarch.lasx.xvsub.w" => "__builtin_lasx_xvsub_w",
+    "llvm.loongarch.lasx.xvsubi.bu" => "__builtin_lasx_xvsubi_bu",
+    "llvm.loongarch.lasx.xvsubi.du" => "__builtin_lasx_xvsubi_du",
+    "llvm.loongarch.lasx.xvsubi.hu" => "__builtin_lasx_xvsubi_hu",
+    "llvm.loongarch.lasx.xvsubi.wu" => "__builtin_lasx_xvsubi_wu",
+    "llvm.loongarch.lasx.xvsubwev.d.w" => "__builtin_lasx_xvsubwev_d_w",
+    "llvm.loongarch.lasx.xvsubwev.d.wu" => "__builtin_lasx_xvsubwev_d_wu",
+    "llvm.loongarch.lasx.xvsubwev.h.b" => "__builtin_lasx_xvsubwev_h_b",
+    "llvm.loongarch.lasx.xvsubwev.h.bu" => "__builtin_lasx_xvsubwev_h_bu",
+    "llvm.loongarch.lasx.xvsubwev.q.d" => "__builtin_lasx_xvsubwev_q_d",
+    "llvm.loongarch.lasx.xvsubwev.q.du" => "__builtin_lasx_xvsubwev_q_du",
+    "llvm.loongarch.lasx.xvsubwev.w.h" => "__builtin_lasx_xvsubwev_w_h",
+    "llvm.loongarch.lasx.xvsubwev.w.hu" => "__builtin_lasx_xvsubwev_w_hu",
+    "llvm.loongarch.lasx.xvsubwod.d.w" => "__builtin_lasx_xvsubwod_d_w",
+    "llvm.loongarch.lasx.xvsubwod.d.wu" => "__builtin_lasx_xvsubwod_d_wu",
+    "llvm.loongarch.lasx.xvsubwod.h.b" => "__builtin_lasx_xvsubwod_h_b",
+    "llvm.loongarch.lasx.xvsubwod.h.bu" => "__builtin_lasx_xvsubwod_h_bu",
+    "llvm.loongarch.lasx.xvsubwod.q.d" => "__builtin_lasx_xvsubwod_q_d",
+    "llvm.loongarch.lasx.xvsubwod.q.du" => "__builtin_lasx_xvsubwod_q_du",
+    "llvm.loongarch.lasx.xvsubwod.w.h" => "__builtin_lasx_xvsubwod_w_h",
+    "llvm.loongarch.lasx.xvsubwod.w.hu" => "__builtin_lasx_xvsubwod_w_hu",
+    "llvm.loongarch.lasx.xvxor.v" => "__builtin_lasx_xvxor_v",
+    "llvm.loongarch.lasx.xvxori.b" => "__builtin_lasx_xvxori_b",
     "llvm.loongarch.lddir.d" => "__builtin_loongarch_lddir_d",
     "llvm.loongarch.ldpte.d" => "__builtin_loongarch_ldpte_d",
+    "llvm.loongarch.lsx.bnz.b" => "__builtin_lsx_bnz_b",
+    "llvm.loongarch.lsx.bnz.d" => "__builtin_lsx_bnz_d",
+    "llvm.loongarch.lsx.bnz.h" => "__builtin_lsx_bnz_h",
+    "llvm.loongarch.lsx.bnz.v" => "__builtin_lsx_bnz_v",
+    "llvm.loongarch.lsx.bnz.w" => "__builtin_lsx_bnz_w",
+    "llvm.loongarch.lsx.bz.b" => "__builtin_lsx_bz_b",
+    "llvm.loongarch.lsx.bz.d" => "__builtin_lsx_bz_d",
+    "llvm.loongarch.lsx.bz.h" => "__builtin_lsx_bz_h",
+    "llvm.loongarch.lsx.bz.v" => "__builtin_lsx_bz_v",
+    "llvm.loongarch.lsx.bz.w" => "__builtin_lsx_bz_w",
+    "llvm.loongarch.lsx.vabsd.b" => "__builtin_lsx_vabsd_b",
+    "llvm.loongarch.lsx.vabsd.bu" => "__builtin_lsx_vabsd_bu",
+    "llvm.loongarch.lsx.vabsd.d" => "__builtin_lsx_vabsd_d",
+    "llvm.loongarch.lsx.vabsd.du" => "__builtin_lsx_vabsd_du",
+    "llvm.loongarch.lsx.vabsd.h" => "__builtin_lsx_vabsd_h",
+    "llvm.loongarch.lsx.vabsd.hu" => "__builtin_lsx_vabsd_hu",
+    "llvm.loongarch.lsx.vabsd.w" => "__builtin_lsx_vabsd_w",
+    "llvm.loongarch.lsx.vabsd.wu" => "__builtin_lsx_vabsd_wu",
+    "llvm.loongarch.lsx.vadd.b" => "__builtin_lsx_vadd_b",
+    "llvm.loongarch.lsx.vadd.d" => "__builtin_lsx_vadd_d",
+    "llvm.loongarch.lsx.vadd.h" => "__builtin_lsx_vadd_h",
+    "llvm.loongarch.lsx.vadd.q" => "__builtin_lsx_vadd_q",
+    "llvm.loongarch.lsx.vadd.w" => "__builtin_lsx_vadd_w",
+    "llvm.loongarch.lsx.vadda.b" => "__builtin_lsx_vadda_b",
+    "llvm.loongarch.lsx.vadda.d" => "__builtin_lsx_vadda_d",
+    "llvm.loongarch.lsx.vadda.h" => "__builtin_lsx_vadda_h",
+    "llvm.loongarch.lsx.vadda.w" => "__builtin_lsx_vadda_w",
+    "llvm.loongarch.lsx.vaddi.bu" => "__builtin_lsx_vaddi_bu",
+    "llvm.loongarch.lsx.vaddi.du" => "__builtin_lsx_vaddi_du",
+    "llvm.loongarch.lsx.vaddi.hu" => "__builtin_lsx_vaddi_hu",
+    "llvm.loongarch.lsx.vaddi.wu" => "__builtin_lsx_vaddi_wu",
+    "llvm.loongarch.lsx.vaddwev.d.w" => "__builtin_lsx_vaddwev_d_w",
+    "llvm.loongarch.lsx.vaddwev.d.wu" => "__builtin_lsx_vaddwev_d_wu",
+    "llvm.loongarch.lsx.vaddwev.d.wu.w" => "__builtin_lsx_vaddwev_d_wu_w",
+    "llvm.loongarch.lsx.vaddwev.h.b" => "__builtin_lsx_vaddwev_h_b",
+    "llvm.loongarch.lsx.vaddwev.h.bu" => "__builtin_lsx_vaddwev_h_bu",
+    "llvm.loongarch.lsx.vaddwev.h.bu.b" => "__builtin_lsx_vaddwev_h_bu_b",
+    "llvm.loongarch.lsx.vaddwev.q.d" => "__builtin_lsx_vaddwev_q_d",
+    "llvm.loongarch.lsx.vaddwev.q.du" => "__builtin_lsx_vaddwev_q_du",
+    "llvm.loongarch.lsx.vaddwev.q.du.d" => "__builtin_lsx_vaddwev_q_du_d",
+    "llvm.loongarch.lsx.vaddwev.w.h" => "__builtin_lsx_vaddwev_w_h",
+    "llvm.loongarch.lsx.vaddwev.w.hu" => "__builtin_lsx_vaddwev_w_hu",
+    "llvm.loongarch.lsx.vaddwev.w.hu.h" => "__builtin_lsx_vaddwev_w_hu_h",
+    "llvm.loongarch.lsx.vaddwod.d.w" => "__builtin_lsx_vaddwod_d_w",
+    "llvm.loongarch.lsx.vaddwod.d.wu" => "__builtin_lsx_vaddwod_d_wu",
+    "llvm.loongarch.lsx.vaddwod.d.wu.w" => "__builtin_lsx_vaddwod_d_wu_w",
+    "llvm.loongarch.lsx.vaddwod.h.b" => "__builtin_lsx_vaddwod_h_b",
+    "llvm.loongarch.lsx.vaddwod.h.bu" => "__builtin_lsx_vaddwod_h_bu",
+    "llvm.loongarch.lsx.vaddwod.h.bu.b" => "__builtin_lsx_vaddwod_h_bu_b",
+    "llvm.loongarch.lsx.vaddwod.q.d" => "__builtin_lsx_vaddwod_q_d",
+    "llvm.loongarch.lsx.vaddwod.q.du" => "__builtin_lsx_vaddwod_q_du",
+    "llvm.loongarch.lsx.vaddwod.q.du.d" => "__builtin_lsx_vaddwod_q_du_d",
+    "llvm.loongarch.lsx.vaddwod.w.h" => "__builtin_lsx_vaddwod_w_h",
+    "llvm.loongarch.lsx.vaddwod.w.hu" => "__builtin_lsx_vaddwod_w_hu",
+    "llvm.loongarch.lsx.vaddwod.w.hu.h" => "__builtin_lsx_vaddwod_w_hu_h",
+    "llvm.loongarch.lsx.vand.v" => "__builtin_lsx_vand_v",
+    "llvm.loongarch.lsx.vandi.b" => "__builtin_lsx_vandi_b",
+    "llvm.loongarch.lsx.vandn.v" => "__builtin_lsx_vandn_v",
+    "llvm.loongarch.lsx.vavg.b" => "__builtin_lsx_vavg_b",
+    "llvm.loongarch.lsx.vavg.bu" => "__builtin_lsx_vavg_bu",
+    "llvm.loongarch.lsx.vavg.d" => "__builtin_lsx_vavg_d",
+    "llvm.loongarch.lsx.vavg.du" => "__builtin_lsx_vavg_du",
+    "llvm.loongarch.lsx.vavg.h" => "__builtin_lsx_vavg_h",
+    "llvm.loongarch.lsx.vavg.hu" => "__builtin_lsx_vavg_hu",
+    "llvm.loongarch.lsx.vavg.w" => "__builtin_lsx_vavg_w",
+    "llvm.loongarch.lsx.vavg.wu" => "__builtin_lsx_vavg_wu",
+    "llvm.loongarch.lsx.vavgr.b" => "__builtin_lsx_vavgr_b",
+    "llvm.loongarch.lsx.vavgr.bu" => "__builtin_lsx_vavgr_bu",
+    "llvm.loongarch.lsx.vavgr.d" => "__builtin_lsx_vavgr_d",
+    "llvm.loongarch.lsx.vavgr.du" => "__builtin_lsx_vavgr_du",
+    "llvm.loongarch.lsx.vavgr.h" => "__builtin_lsx_vavgr_h",
+    "llvm.loongarch.lsx.vavgr.hu" => "__builtin_lsx_vavgr_hu",
+    "llvm.loongarch.lsx.vavgr.w" => "__builtin_lsx_vavgr_w",
+    "llvm.loongarch.lsx.vavgr.wu" => "__builtin_lsx_vavgr_wu",
+    "llvm.loongarch.lsx.vbitclr.b" => "__builtin_lsx_vbitclr_b",
+    "llvm.loongarch.lsx.vbitclr.d" => "__builtin_lsx_vbitclr_d",
+    "llvm.loongarch.lsx.vbitclr.h" => "__builtin_lsx_vbitclr_h",
+    "llvm.loongarch.lsx.vbitclr.w" => "__builtin_lsx_vbitclr_w",
+    "llvm.loongarch.lsx.vbitclri.b" => "__builtin_lsx_vbitclri_b",
+    "llvm.loongarch.lsx.vbitclri.d" => "__builtin_lsx_vbitclri_d",
+    "llvm.loongarch.lsx.vbitclri.h" => "__builtin_lsx_vbitclri_h",
+    "llvm.loongarch.lsx.vbitclri.w" => "__builtin_lsx_vbitclri_w",
+    "llvm.loongarch.lsx.vbitrev.b" => "__builtin_lsx_vbitrev_b",
+    "llvm.loongarch.lsx.vbitrev.d" => "__builtin_lsx_vbitrev_d",
+    "llvm.loongarch.lsx.vbitrev.h" => "__builtin_lsx_vbitrev_h",
+    "llvm.loongarch.lsx.vbitrev.w" => "__builtin_lsx_vbitrev_w",
+    "llvm.loongarch.lsx.vbitrevi.b" => "__builtin_lsx_vbitrevi_b",
+    "llvm.loongarch.lsx.vbitrevi.d" => "__builtin_lsx_vbitrevi_d",
+    "llvm.loongarch.lsx.vbitrevi.h" => "__builtin_lsx_vbitrevi_h",
+    "llvm.loongarch.lsx.vbitrevi.w" => "__builtin_lsx_vbitrevi_w",
+    "llvm.loongarch.lsx.vbitsel.v" => "__builtin_lsx_vbitsel_v",
+    "llvm.loongarch.lsx.vbitseli.b" => "__builtin_lsx_vbitseli_b",
+    "llvm.loongarch.lsx.vbitset.b" => "__builtin_lsx_vbitset_b",
+    "llvm.loongarch.lsx.vbitset.d" => "__builtin_lsx_vbitset_d",
+    "llvm.loongarch.lsx.vbitset.h" => "__builtin_lsx_vbitset_h",
+    "llvm.loongarch.lsx.vbitset.w" => "__builtin_lsx_vbitset_w",
+    "llvm.loongarch.lsx.vbitseti.b" => "__builtin_lsx_vbitseti_b",
+    "llvm.loongarch.lsx.vbitseti.d" => "__builtin_lsx_vbitseti_d",
+    "llvm.loongarch.lsx.vbitseti.h" => "__builtin_lsx_vbitseti_h",
+    "llvm.loongarch.lsx.vbitseti.w" => "__builtin_lsx_vbitseti_w",
+    "llvm.loongarch.lsx.vbsll.v" => "__builtin_lsx_vbsll_v",
+    "llvm.loongarch.lsx.vbsrl.v" => "__builtin_lsx_vbsrl_v",
+    "llvm.loongarch.lsx.vclo.b" => "__builtin_lsx_vclo_b",
+    "llvm.loongarch.lsx.vclo.d" => "__builtin_lsx_vclo_d",
+    "llvm.loongarch.lsx.vclo.h" => "__builtin_lsx_vclo_h",
+    "llvm.loongarch.lsx.vclo.w" => "__builtin_lsx_vclo_w",
+    "llvm.loongarch.lsx.vclz.b" => "__builtin_lsx_vclz_b",
+    "llvm.loongarch.lsx.vclz.d" => "__builtin_lsx_vclz_d",
+    "llvm.loongarch.lsx.vclz.h" => "__builtin_lsx_vclz_h",
+    "llvm.loongarch.lsx.vclz.w" => "__builtin_lsx_vclz_w",
+    "llvm.loongarch.lsx.vdiv.b" => "__builtin_lsx_vdiv_b",
+    "llvm.loongarch.lsx.vdiv.bu" => "__builtin_lsx_vdiv_bu",
+    "llvm.loongarch.lsx.vdiv.d" => "__builtin_lsx_vdiv_d",
+    "llvm.loongarch.lsx.vdiv.du" => "__builtin_lsx_vdiv_du",
+    "llvm.loongarch.lsx.vdiv.h" => "__builtin_lsx_vdiv_h",
+    "llvm.loongarch.lsx.vdiv.hu" => "__builtin_lsx_vdiv_hu",
+    "llvm.loongarch.lsx.vdiv.w" => "__builtin_lsx_vdiv_w",
+    "llvm.loongarch.lsx.vdiv.wu" => "__builtin_lsx_vdiv_wu",
+    "llvm.loongarch.lsx.vexth.d.w" => "__builtin_lsx_vexth_d_w",
+    "llvm.loongarch.lsx.vexth.du.wu" => "__builtin_lsx_vexth_du_wu",
+    "llvm.loongarch.lsx.vexth.h.b" => "__builtin_lsx_vexth_h_b",
+    "llvm.loongarch.lsx.vexth.hu.bu" => "__builtin_lsx_vexth_hu_bu",
+    "llvm.loongarch.lsx.vexth.q.d" => "__builtin_lsx_vexth_q_d",
+    "llvm.loongarch.lsx.vexth.qu.du" => "__builtin_lsx_vexth_qu_du",
+    "llvm.loongarch.lsx.vexth.w.h" => "__builtin_lsx_vexth_w_h",
+    "llvm.loongarch.lsx.vexth.wu.hu" => "__builtin_lsx_vexth_wu_hu",
+    "llvm.loongarch.lsx.vextl.q.d" => "__builtin_lsx_vextl_q_d",
+    "llvm.loongarch.lsx.vextl.qu.du" => "__builtin_lsx_vextl_qu_du",
+    "llvm.loongarch.lsx.vextrins.b" => "__builtin_lsx_vextrins_b",
+    "llvm.loongarch.lsx.vextrins.d" => "__builtin_lsx_vextrins_d",
+    "llvm.loongarch.lsx.vextrins.h" => "__builtin_lsx_vextrins_h",
+    "llvm.loongarch.lsx.vextrins.w" => "__builtin_lsx_vextrins_w",
+    "llvm.loongarch.lsx.vfadd.d" => "__builtin_lsx_vfadd_d",
+    "llvm.loongarch.lsx.vfadd.s" => "__builtin_lsx_vfadd_s",
+    "llvm.loongarch.lsx.vfclass.d" => "__builtin_lsx_vfclass_d",
+    "llvm.loongarch.lsx.vfclass.s" => "__builtin_lsx_vfclass_s",
+    "llvm.loongarch.lsx.vfcmp.caf.d" => "__builtin_lsx_vfcmp_caf_d",
+    "llvm.loongarch.lsx.vfcmp.caf.s" => "__builtin_lsx_vfcmp_caf_s",
+    "llvm.loongarch.lsx.vfcmp.ceq.d" => "__builtin_lsx_vfcmp_ceq_d",
+    "llvm.loongarch.lsx.vfcmp.ceq.s" => "__builtin_lsx_vfcmp_ceq_s",
+    "llvm.loongarch.lsx.vfcmp.cle.d" => "__builtin_lsx_vfcmp_cle_d",
+    "llvm.loongarch.lsx.vfcmp.cle.s" => "__builtin_lsx_vfcmp_cle_s",
+    "llvm.loongarch.lsx.vfcmp.clt.d" => "__builtin_lsx_vfcmp_clt_d",
+    "llvm.loongarch.lsx.vfcmp.clt.s" => "__builtin_lsx_vfcmp_clt_s",
+    "llvm.loongarch.lsx.vfcmp.cne.d" => "__builtin_lsx_vfcmp_cne_d",
+    "llvm.loongarch.lsx.vfcmp.cne.s" => "__builtin_lsx_vfcmp_cne_s",
+    "llvm.loongarch.lsx.vfcmp.cor.d" => "__builtin_lsx_vfcmp_cor_d",
+    "llvm.loongarch.lsx.vfcmp.cor.s" => "__builtin_lsx_vfcmp_cor_s",
+    "llvm.loongarch.lsx.vfcmp.cueq.d" => "__builtin_lsx_vfcmp_cueq_d",
+    "llvm.loongarch.lsx.vfcmp.cueq.s" => "__builtin_lsx_vfcmp_cueq_s",
+    "llvm.loongarch.lsx.vfcmp.cule.d" => "__builtin_lsx_vfcmp_cule_d",
+    "llvm.loongarch.lsx.vfcmp.cule.s" => "__builtin_lsx_vfcmp_cule_s",
+    "llvm.loongarch.lsx.vfcmp.cult.d" => "__builtin_lsx_vfcmp_cult_d",
+    "llvm.loongarch.lsx.vfcmp.cult.s" => "__builtin_lsx_vfcmp_cult_s",
+    "llvm.loongarch.lsx.vfcmp.cun.d" => "__builtin_lsx_vfcmp_cun_d",
+    "llvm.loongarch.lsx.vfcmp.cun.s" => "__builtin_lsx_vfcmp_cun_s",
+    "llvm.loongarch.lsx.vfcmp.cune.d" => "__builtin_lsx_vfcmp_cune_d",
+    "llvm.loongarch.lsx.vfcmp.cune.s" => "__builtin_lsx_vfcmp_cune_s",
+    "llvm.loongarch.lsx.vfcmp.saf.d" => "__builtin_lsx_vfcmp_saf_d",
+    "llvm.loongarch.lsx.vfcmp.saf.s" => "__builtin_lsx_vfcmp_saf_s",
+    "llvm.loongarch.lsx.vfcmp.seq.d" => "__builtin_lsx_vfcmp_seq_d",
+    "llvm.loongarch.lsx.vfcmp.seq.s" => "__builtin_lsx_vfcmp_seq_s",
+    "llvm.loongarch.lsx.vfcmp.sle.d" => "__builtin_lsx_vfcmp_sle_d",
+    "llvm.loongarch.lsx.vfcmp.sle.s" => "__builtin_lsx_vfcmp_sle_s",
+    "llvm.loongarch.lsx.vfcmp.slt.d" => "__builtin_lsx_vfcmp_slt_d",
+    "llvm.loongarch.lsx.vfcmp.slt.s" => "__builtin_lsx_vfcmp_slt_s",
+    "llvm.loongarch.lsx.vfcmp.sne.d" => "__builtin_lsx_vfcmp_sne_d",
+    "llvm.loongarch.lsx.vfcmp.sne.s" => "__builtin_lsx_vfcmp_sne_s",
+    "llvm.loongarch.lsx.vfcmp.sor.d" => "__builtin_lsx_vfcmp_sor_d",
+    "llvm.loongarch.lsx.vfcmp.sor.s" => "__builtin_lsx_vfcmp_sor_s",
+    "llvm.loongarch.lsx.vfcmp.sueq.d" => "__builtin_lsx_vfcmp_sueq_d",
+    "llvm.loongarch.lsx.vfcmp.sueq.s" => "__builtin_lsx_vfcmp_sueq_s",
+    "llvm.loongarch.lsx.vfcmp.sule.d" => "__builtin_lsx_vfcmp_sule_d",
+    "llvm.loongarch.lsx.vfcmp.sule.s" => "__builtin_lsx_vfcmp_sule_s",
+    "llvm.loongarch.lsx.vfcmp.sult.d" => "__builtin_lsx_vfcmp_sult_d",
+    "llvm.loongarch.lsx.vfcmp.sult.s" => "__builtin_lsx_vfcmp_sult_s",
+    "llvm.loongarch.lsx.vfcmp.sun.d" => "__builtin_lsx_vfcmp_sun_d",
+    "llvm.loongarch.lsx.vfcmp.sun.s" => "__builtin_lsx_vfcmp_sun_s",
+    "llvm.loongarch.lsx.vfcmp.sune.d" => "__builtin_lsx_vfcmp_sune_d",
+    "llvm.loongarch.lsx.vfcmp.sune.s" => "__builtin_lsx_vfcmp_sune_s",
+    "llvm.loongarch.lsx.vfcvt.h.s" => "__builtin_lsx_vfcvt_h_s",
+    "llvm.loongarch.lsx.vfcvt.s.d" => "__builtin_lsx_vfcvt_s_d",
+    "llvm.loongarch.lsx.vfcvth.d.s" => "__builtin_lsx_vfcvth_d_s",
+    "llvm.loongarch.lsx.vfcvth.s.h" => "__builtin_lsx_vfcvth_s_h",
+    "llvm.loongarch.lsx.vfcvtl.d.s" => "__builtin_lsx_vfcvtl_d_s",
+    "llvm.loongarch.lsx.vfcvtl.s.h" => "__builtin_lsx_vfcvtl_s_h",
+    "llvm.loongarch.lsx.vfdiv.d" => "__builtin_lsx_vfdiv_d",
+    "llvm.loongarch.lsx.vfdiv.s" => "__builtin_lsx_vfdiv_s",
+    "llvm.loongarch.lsx.vffint.d.l" => "__builtin_lsx_vffint_d_l",
+    "llvm.loongarch.lsx.vffint.d.lu" => "__builtin_lsx_vffint_d_lu",
+    "llvm.loongarch.lsx.vffint.s.l" => "__builtin_lsx_vffint_s_l",
+    "llvm.loongarch.lsx.vffint.s.w" => "__builtin_lsx_vffint_s_w",
+    "llvm.loongarch.lsx.vffint.s.wu" => "__builtin_lsx_vffint_s_wu",
+    "llvm.loongarch.lsx.vffinth.d.w" => "__builtin_lsx_vffinth_d_w",
+    "llvm.loongarch.lsx.vffintl.d.w" => "__builtin_lsx_vffintl_d_w",
+    "llvm.loongarch.lsx.vflogb.d" => "__builtin_lsx_vflogb_d",
+    "llvm.loongarch.lsx.vflogb.s" => "__builtin_lsx_vflogb_s",
+    "llvm.loongarch.lsx.vfmadd.d" => "__builtin_lsx_vfmadd_d",
+    "llvm.loongarch.lsx.vfmadd.s" => "__builtin_lsx_vfmadd_s",
+    "llvm.loongarch.lsx.vfmax.d" => "__builtin_lsx_vfmax_d",
+    "llvm.loongarch.lsx.vfmax.s" => "__builtin_lsx_vfmax_s",
+    "llvm.loongarch.lsx.vfmaxa.d" => "__builtin_lsx_vfmaxa_d",
+    "llvm.loongarch.lsx.vfmaxa.s" => "__builtin_lsx_vfmaxa_s",
+    "llvm.loongarch.lsx.vfmin.d" => "__builtin_lsx_vfmin_d",
+    "llvm.loongarch.lsx.vfmin.s" => "__builtin_lsx_vfmin_s",
+    "llvm.loongarch.lsx.vfmina.d" => "__builtin_lsx_vfmina_d",
+    "llvm.loongarch.lsx.vfmina.s" => "__builtin_lsx_vfmina_s",
+    "llvm.loongarch.lsx.vfmsub.d" => "__builtin_lsx_vfmsub_d",
+    "llvm.loongarch.lsx.vfmsub.s" => "__builtin_lsx_vfmsub_s",
+    "llvm.loongarch.lsx.vfmul.d" => "__builtin_lsx_vfmul_d",
+    "llvm.loongarch.lsx.vfmul.s" => "__builtin_lsx_vfmul_s",
+    "llvm.loongarch.lsx.vfnmadd.d" => "__builtin_lsx_vfnmadd_d",
+    "llvm.loongarch.lsx.vfnmadd.s" => "__builtin_lsx_vfnmadd_s",
+    "llvm.loongarch.lsx.vfnmsub.d" => "__builtin_lsx_vfnmsub_d",
+    "llvm.loongarch.lsx.vfnmsub.s" => "__builtin_lsx_vfnmsub_s",
+    "llvm.loongarch.lsx.vfrecip.d" => "__builtin_lsx_vfrecip_d",
+    "llvm.loongarch.lsx.vfrecip.s" => "__builtin_lsx_vfrecip_s",
+    "llvm.loongarch.lsx.vfrint.d" => "__builtin_lsx_vfrint_d",
+    "llvm.loongarch.lsx.vfrint.s" => "__builtin_lsx_vfrint_s",
+    "llvm.loongarch.lsx.vfrintrm.d" => "__builtin_lsx_vfrintrm_d",
+    "llvm.loongarch.lsx.vfrintrm.s" => "__builtin_lsx_vfrintrm_s",
+    "llvm.loongarch.lsx.vfrintrne.d" => "__builtin_lsx_vfrintrne_d",
+    "llvm.loongarch.lsx.vfrintrne.s" => "__builtin_lsx_vfrintrne_s",
+    "llvm.loongarch.lsx.vfrintrp.d" => "__builtin_lsx_vfrintrp_d",
+    "llvm.loongarch.lsx.vfrintrp.s" => "__builtin_lsx_vfrintrp_s",
+    "llvm.loongarch.lsx.vfrintrz.d" => "__builtin_lsx_vfrintrz_d",
+    "llvm.loongarch.lsx.vfrintrz.s" => "__builtin_lsx_vfrintrz_s",
+    "llvm.loongarch.lsx.vfrsqrt.d" => "__builtin_lsx_vfrsqrt_d",
+    "llvm.loongarch.lsx.vfrsqrt.s" => "__builtin_lsx_vfrsqrt_s",
+    "llvm.loongarch.lsx.vfrstp.b" => "__builtin_lsx_vfrstp_b",
+    "llvm.loongarch.lsx.vfrstp.h" => "__builtin_lsx_vfrstp_h",
+    "llvm.loongarch.lsx.vfrstpi.b" => "__builtin_lsx_vfrstpi_b",
+    "llvm.loongarch.lsx.vfrstpi.h" => "__builtin_lsx_vfrstpi_h",
+    "llvm.loongarch.lsx.vfsqrt.d" => "__builtin_lsx_vfsqrt_d",
+    "llvm.loongarch.lsx.vfsqrt.s" => "__builtin_lsx_vfsqrt_s",
+    "llvm.loongarch.lsx.vfsub.d" => "__builtin_lsx_vfsub_d",
+    "llvm.loongarch.lsx.vfsub.s" => "__builtin_lsx_vfsub_s",
+    "llvm.loongarch.lsx.vftint.l.d" => "__builtin_lsx_vftint_l_d",
+    "llvm.loongarch.lsx.vftint.lu.d" => "__builtin_lsx_vftint_lu_d",
+    "llvm.loongarch.lsx.vftint.w.d" => "__builtin_lsx_vftint_w_d",
+    "llvm.loongarch.lsx.vftint.w.s" => "__builtin_lsx_vftint_w_s",
+    "llvm.loongarch.lsx.vftint.wu.s" => "__builtin_lsx_vftint_wu_s",
+    "llvm.loongarch.lsx.vftinth.l.s" => "__builtin_lsx_vftinth_l_s",
+    "llvm.loongarch.lsx.vftintl.l.s" => "__builtin_lsx_vftintl_l_s",
+    "llvm.loongarch.lsx.vftintrm.l.d" => "__builtin_lsx_vftintrm_l_d",
+    "llvm.loongarch.lsx.vftintrm.w.d" => "__builtin_lsx_vftintrm_w_d",
+    "llvm.loongarch.lsx.vftintrm.w.s" => "__builtin_lsx_vftintrm_w_s",
+    "llvm.loongarch.lsx.vftintrmh.l.s" => "__builtin_lsx_vftintrmh_l_s",
+    "llvm.loongarch.lsx.vftintrml.l.s" => "__builtin_lsx_vftintrml_l_s",
+    "llvm.loongarch.lsx.vftintrne.l.d" => "__builtin_lsx_vftintrne_l_d",
+    "llvm.loongarch.lsx.vftintrne.w.d" => "__builtin_lsx_vftintrne_w_d",
+    "llvm.loongarch.lsx.vftintrne.w.s" => "__builtin_lsx_vftintrne_w_s",
+    "llvm.loongarch.lsx.vftintrneh.l.s" => "__builtin_lsx_vftintrneh_l_s",
+    "llvm.loongarch.lsx.vftintrnel.l.s" => "__builtin_lsx_vftintrnel_l_s",
+    "llvm.loongarch.lsx.vftintrp.l.d" => "__builtin_lsx_vftintrp_l_d",
+    "llvm.loongarch.lsx.vftintrp.w.d" => "__builtin_lsx_vftintrp_w_d",
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+    "llvm.loongarch.lsx.vftintrph.l.s" => "__builtin_lsx_vftintrph_l_s",
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+    "llvm.loongarch.lsx.vftintrz.l.d" => "__builtin_lsx_vftintrz_l_d",
+    "llvm.loongarch.lsx.vftintrz.lu.d" => "__builtin_lsx_vftintrz_lu_d",
+    "llvm.loongarch.lsx.vftintrz.w.d" => "__builtin_lsx_vftintrz_w_d",
+    "llvm.loongarch.lsx.vftintrz.w.s" => "__builtin_lsx_vftintrz_w_s",
+    "llvm.loongarch.lsx.vftintrz.wu.s" => "__builtin_lsx_vftintrz_wu_s",
+    "llvm.loongarch.lsx.vftintrzh.l.s" => "__builtin_lsx_vftintrzh_l_s",
+    "llvm.loongarch.lsx.vftintrzl.l.s" => "__builtin_lsx_vftintrzl_l_s",
+    "llvm.loongarch.lsx.vhaddw.d.w" => "__builtin_lsx_vhaddw_d_w",
+    "llvm.loongarch.lsx.vhaddw.du.wu" => "__builtin_lsx_vhaddw_du_wu",
+    "llvm.loongarch.lsx.vhaddw.h.b" => "__builtin_lsx_vhaddw_h_b",
+    "llvm.loongarch.lsx.vhaddw.hu.bu" => "__builtin_lsx_vhaddw_hu_bu",
+    "llvm.loongarch.lsx.vhaddw.q.d" => "__builtin_lsx_vhaddw_q_d",
+    "llvm.loongarch.lsx.vhaddw.qu.du" => "__builtin_lsx_vhaddw_qu_du",
+    "llvm.loongarch.lsx.vhaddw.w.h" => "__builtin_lsx_vhaddw_w_h",
+    "llvm.loongarch.lsx.vhaddw.wu.hu" => "__builtin_lsx_vhaddw_wu_hu",
+    "llvm.loongarch.lsx.vhsubw.d.w" => "__builtin_lsx_vhsubw_d_w",
+    "llvm.loongarch.lsx.vhsubw.du.wu" => "__builtin_lsx_vhsubw_du_wu",
+    "llvm.loongarch.lsx.vhsubw.h.b" => "__builtin_lsx_vhsubw_h_b",
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+    "llvm.loongarch.lsx.vhsubw.wu.hu" => "__builtin_lsx_vhsubw_wu_hu",
+    "llvm.loongarch.lsx.vilvh.b" => "__builtin_lsx_vilvh_b",
+    "llvm.loongarch.lsx.vilvh.d" => "__builtin_lsx_vilvh_d",
+    "llvm.loongarch.lsx.vilvh.h" => "__builtin_lsx_vilvh_h",
+    "llvm.loongarch.lsx.vilvh.w" => "__builtin_lsx_vilvh_w",
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+    "llvm.loongarch.lsx.vilvl.d" => "__builtin_lsx_vilvl_d",
+    "llvm.loongarch.lsx.vilvl.h" => "__builtin_lsx_vilvl_h",
+    "llvm.loongarch.lsx.vilvl.w" => "__builtin_lsx_vilvl_w",
+    "llvm.loongarch.lsx.vinsgr2vr.b" => "__builtin_lsx_vinsgr2vr_b",
+    "llvm.loongarch.lsx.vinsgr2vr.d" => "__builtin_lsx_vinsgr2vr_d",
+    "llvm.loongarch.lsx.vinsgr2vr.h" => "__builtin_lsx_vinsgr2vr_h",
+    "llvm.loongarch.lsx.vinsgr2vr.w" => "__builtin_lsx_vinsgr2vr_w",
+    "llvm.loongarch.lsx.vld" => "__builtin_lsx_vld",
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+    "llvm.loongarch.lsx.vldrepl.d" => "__builtin_lsx_vldrepl_d",
+    "llvm.loongarch.lsx.vldrepl.h" => "__builtin_lsx_vldrepl_h",
+    "llvm.loongarch.lsx.vldrepl.w" => "__builtin_lsx_vldrepl_w",
+    "llvm.loongarch.lsx.vldx" => "__builtin_lsx_vldx",
+    "llvm.loongarch.lsx.vmadd.b" => "__builtin_lsx_vmadd_b",
+    "llvm.loongarch.lsx.vmadd.d" => "__builtin_lsx_vmadd_d",
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+    "llvm.loongarch.lsx.vmadd.w" => "__builtin_lsx_vmadd_w",
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+    "llvm.loongarch.lsx.vrotri.d" => "__builtin_lsx_vrotri_d",
+    "llvm.loongarch.lsx.vrotri.h" => "__builtin_lsx_vrotri_h",
+    "llvm.loongarch.lsx.vrotri.w" => "__builtin_lsx_vrotri_w",
+    "llvm.loongarch.lsx.vsadd.b" => "__builtin_lsx_vsadd_b",
+    "llvm.loongarch.lsx.vsadd.bu" => "__builtin_lsx_vsadd_bu",
+    "llvm.loongarch.lsx.vsadd.d" => "__builtin_lsx_vsadd_d",
+    "llvm.loongarch.lsx.vsadd.du" => "__builtin_lsx_vsadd_du",
+    "llvm.loongarch.lsx.vsadd.h" => "__builtin_lsx_vsadd_h",
+    "llvm.loongarch.lsx.vsadd.hu" => "__builtin_lsx_vsadd_hu",
+    "llvm.loongarch.lsx.vsadd.w" => "__builtin_lsx_vsadd_w",
+    "llvm.loongarch.lsx.vsadd.wu" => "__builtin_lsx_vsadd_wu",
+    "llvm.loongarch.lsx.vsat.b" => "__builtin_lsx_vsat_b",
+    "llvm.loongarch.lsx.vsat.bu" => "__builtin_lsx_vsat_bu",
+    "llvm.loongarch.lsx.vsat.d" => "__builtin_lsx_vsat_d",
+    "llvm.loongarch.lsx.vsat.du" => "__builtin_lsx_vsat_du",
+    "llvm.loongarch.lsx.vsat.h" => "__builtin_lsx_vsat_h",
+    "llvm.loongarch.lsx.vsat.hu" => "__builtin_lsx_vsat_hu",
+    "llvm.loongarch.lsx.vsat.w" => "__builtin_lsx_vsat_w",
+    "llvm.loongarch.lsx.vsat.wu" => "__builtin_lsx_vsat_wu",
+    "llvm.loongarch.lsx.vseq.b" => "__builtin_lsx_vseq_b",
+    "llvm.loongarch.lsx.vseq.d" => "__builtin_lsx_vseq_d",
+    "llvm.loongarch.lsx.vseq.h" => "__builtin_lsx_vseq_h",
+    "llvm.loongarch.lsx.vseq.w" => "__builtin_lsx_vseq_w",
+    "llvm.loongarch.lsx.vseqi.b" => "__builtin_lsx_vseqi_b",
+    "llvm.loongarch.lsx.vseqi.d" => "__builtin_lsx_vseqi_d",
+    "llvm.loongarch.lsx.vseqi.h" => "__builtin_lsx_vseqi_h",
+    "llvm.loongarch.lsx.vseqi.w" => "__builtin_lsx_vseqi_w",
+    "llvm.loongarch.lsx.vshuf.b" => "__builtin_lsx_vshuf_b",
+    "llvm.loongarch.lsx.vshuf.d" => "__builtin_lsx_vshuf_d",
+    "llvm.loongarch.lsx.vshuf.h" => "__builtin_lsx_vshuf_h",
+    "llvm.loongarch.lsx.vshuf.w" => "__builtin_lsx_vshuf_w",
+    "llvm.loongarch.lsx.vshuf4i.b" => "__builtin_lsx_vshuf4i_b",
+    "llvm.loongarch.lsx.vshuf4i.d" => "__builtin_lsx_vshuf4i_d",
+    "llvm.loongarch.lsx.vshuf4i.h" => "__builtin_lsx_vshuf4i_h",
+    "llvm.loongarch.lsx.vshuf4i.w" => "__builtin_lsx_vshuf4i_w",
+    "llvm.loongarch.lsx.vsigncov.b" => "__builtin_lsx_vsigncov_b",
+    "llvm.loongarch.lsx.vsigncov.d" => "__builtin_lsx_vsigncov_d",
+    "llvm.loongarch.lsx.vsigncov.h" => "__builtin_lsx_vsigncov_h",
+    "llvm.loongarch.lsx.vsigncov.w" => "__builtin_lsx_vsigncov_w",
+    "llvm.loongarch.lsx.vsle.b" => "__builtin_lsx_vsle_b",
+    "llvm.loongarch.lsx.vsle.bu" => "__builtin_lsx_vsle_bu",
+    "llvm.loongarch.lsx.vsle.d" => "__builtin_lsx_vsle_d",
+    "llvm.loongarch.lsx.vsle.du" => "__builtin_lsx_vsle_du",
+    "llvm.loongarch.lsx.vsle.h" => "__builtin_lsx_vsle_h",
+    "llvm.loongarch.lsx.vsle.hu" => "__builtin_lsx_vsle_hu",
+    "llvm.loongarch.lsx.vsle.w" => "__builtin_lsx_vsle_w",
+    "llvm.loongarch.lsx.vsle.wu" => "__builtin_lsx_vsle_wu",
+    "llvm.loongarch.lsx.vslei.b" => "__builtin_lsx_vslei_b",
+    "llvm.loongarch.lsx.vslei.bu" => "__builtin_lsx_vslei_bu",
+    "llvm.loongarch.lsx.vslei.d" => "__builtin_lsx_vslei_d",
+    "llvm.loongarch.lsx.vslei.du" => "__builtin_lsx_vslei_du",
+    "llvm.loongarch.lsx.vslei.h" => "__builtin_lsx_vslei_h",
+    "llvm.loongarch.lsx.vslei.hu" => "__builtin_lsx_vslei_hu",
+    "llvm.loongarch.lsx.vslei.w" => "__builtin_lsx_vslei_w",
+    "llvm.loongarch.lsx.vslei.wu" => "__builtin_lsx_vslei_wu",
+    "llvm.loongarch.lsx.vsll.b" => "__builtin_lsx_vsll_b",
+    "llvm.loongarch.lsx.vsll.d" => "__builtin_lsx_vsll_d",
+    "llvm.loongarch.lsx.vsll.h" => "__builtin_lsx_vsll_h",
+    "llvm.loongarch.lsx.vsll.w" => "__builtin_lsx_vsll_w",
+    "llvm.loongarch.lsx.vslli.b" => "__builtin_lsx_vslli_b",
+    "llvm.loongarch.lsx.vslli.d" => "__builtin_lsx_vslli_d",
+    "llvm.loongarch.lsx.vslli.h" => "__builtin_lsx_vslli_h",
+    "llvm.loongarch.lsx.vslli.w" => "__builtin_lsx_vslli_w",
+    "llvm.loongarch.lsx.vsllwil.d.w" => "__builtin_lsx_vsllwil_d_w",
+    "llvm.loongarch.lsx.vsllwil.du.wu" => "__builtin_lsx_vsllwil_du_wu",
+    "llvm.loongarch.lsx.vsllwil.h.b" => "__builtin_lsx_vsllwil_h_b",
+    "llvm.loongarch.lsx.vsllwil.hu.bu" => "__builtin_lsx_vsllwil_hu_bu",
+    "llvm.loongarch.lsx.vsllwil.w.h" => "__builtin_lsx_vsllwil_w_h",
+    "llvm.loongarch.lsx.vsllwil.wu.hu" => "__builtin_lsx_vsllwil_wu_hu",
+    "llvm.loongarch.lsx.vslt.b" => "__builtin_lsx_vslt_b",
+    "llvm.loongarch.lsx.vslt.bu" => "__builtin_lsx_vslt_bu",
+    "llvm.loongarch.lsx.vslt.d" => "__builtin_lsx_vslt_d",
+    "llvm.loongarch.lsx.vslt.du" => "__builtin_lsx_vslt_du",
+    "llvm.loongarch.lsx.vslt.h" => "__builtin_lsx_vslt_h",
+    "llvm.loongarch.lsx.vslt.hu" => "__builtin_lsx_vslt_hu",
+    "llvm.loongarch.lsx.vslt.w" => "__builtin_lsx_vslt_w",
+    "llvm.loongarch.lsx.vslt.wu" => "__builtin_lsx_vslt_wu",
+    "llvm.loongarch.lsx.vslti.b" => "__builtin_lsx_vslti_b",
+    "llvm.loongarch.lsx.vslti.bu" => "__builtin_lsx_vslti_bu",
+    "llvm.loongarch.lsx.vslti.d" => "__builtin_lsx_vslti_d",
+    "llvm.loongarch.lsx.vslti.du" => "__builtin_lsx_vslti_du",
+    "llvm.loongarch.lsx.vslti.h" => "__builtin_lsx_vslti_h",
+    "llvm.loongarch.lsx.vslti.hu" => "__builtin_lsx_vslti_hu",
+    "llvm.loongarch.lsx.vslti.w" => "__builtin_lsx_vslti_w",
+    "llvm.loongarch.lsx.vslti.wu" => "__builtin_lsx_vslti_wu",
+    "llvm.loongarch.lsx.vsra.b" => "__builtin_lsx_vsra_b",
+    "llvm.loongarch.lsx.vsra.d" => "__builtin_lsx_vsra_d",
+    "llvm.loongarch.lsx.vsra.h" => "__builtin_lsx_vsra_h",
+    "llvm.loongarch.lsx.vsra.w" => "__builtin_lsx_vsra_w",
+    "llvm.loongarch.lsx.vsrai.b" => "__builtin_lsx_vsrai_b",
+    "llvm.loongarch.lsx.vsrai.d" => "__builtin_lsx_vsrai_d",
+    "llvm.loongarch.lsx.vsrai.h" => "__builtin_lsx_vsrai_h",
+    "llvm.loongarch.lsx.vsrai.w" => "__builtin_lsx_vsrai_w",
+    "llvm.loongarch.lsx.vsran.b.h" => "__builtin_lsx_vsran_b_h",
+    "llvm.loongarch.lsx.vsran.h.w" => "__builtin_lsx_vsran_h_w",
+    "llvm.loongarch.lsx.vsran.w.d" => "__builtin_lsx_vsran_w_d",
+    "llvm.loongarch.lsx.vsrani.b.h" => "__builtin_lsx_vsrani_b_h",
+    "llvm.loongarch.lsx.vsrani.d.q" => "__builtin_lsx_vsrani_d_q",
+    "llvm.loongarch.lsx.vsrani.h.w" => "__builtin_lsx_vsrani_h_w",
+    "llvm.loongarch.lsx.vsrani.w.d" => "__builtin_lsx_vsrani_w_d",
+    "llvm.loongarch.lsx.vsrar.b" => "__builtin_lsx_vsrar_b",
+    "llvm.loongarch.lsx.vsrar.d" => "__builtin_lsx_vsrar_d",
+    "llvm.loongarch.lsx.vsrar.h" => "__builtin_lsx_vsrar_h",
+    "llvm.loongarch.lsx.vsrar.w" => "__builtin_lsx_vsrar_w",
+    "llvm.loongarch.lsx.vsrari.b" => "__builtin_lsx_vsrari_b",
+    "llvm.loongarch.lsx.vsrari.d" => "__builtin_lsx_vsrari_d",
+    "llvm.loongarch.lsx.vsrari.h" => "__builtin_lsx_vsrari_h",
+    "llvm.loongarch.lsx.vsrari.w" => "__builtin_lsx_vsrari_w",
+    "llvm.loongarch.lsx.vsrarn.b.h" => "__builtin_lsx_vsrarn_b_h",
+    "llvm.loongarch.lsx.vsrarn.h.w" => "__builtin_lsx_vsrarn_h_w",
+    "llvm.loongarch.lsx.vsrarn.w.d" => "__builtin_lsx_vsrarn_w_d",
+    "llvm.loongarch.lsx.vsrarni.b.h" => "__builtin_lsx_vsrarni_b_h",
+    "llvm.loongarch.lsx.vsrarni.d.q" => "__builtin_lsx_vsrarni_d_q",
+    "llvm.loongarch.lsx.vsrarni.h.w" => "__builtin_lsx_vsrarni_h_w",
+    "llvm.loongarch.lsx.vsrarni.w.d" => "__builtin_lsx_vsrarni_w_d",
+    "llvm.loongarch.lsx.vsrl.b" => "__builtin_lsx_vsrl_b",
+    "llvm.loongarch.lsx.vsrl.d" => "__builtin_lsx_vsrl_d",
+    "llvm.loongarch.lsx.vsrl.h" => "__builtin_lsx_vsrl_h",
+    "llvm.loongarch.lsx.vsrl.w" => "__builtin_lsx_vsrl_w",
+    "llvm.loongarch.lsx.vsrli.b" => "__builtin_lsx_vsrli_b",
+    "llvm.loongarch.lsx.vsrli.d" => "__builtin_lsx_vsrli_d",
+    "llvm.loongarch.lsx.vsrli.h" => "__builtin_lsx_vsrli_h",
+    "llvm.loongarch.lsx.vsrli.w" => "__builtin_lsx_vsrli_w",
+    "llvm.loongarch.lsx.vsrln.b.h" => "__builtin_lsx_vsrln_b_h",
+    "llvm.loongarch.lsx.vsrln.h.w" => "__builtin_lsx_vsrln_h_w",
+    "llvm.loongarch.lsx.vsrln.w.d" => "__builtin_lsx_vsrln_w_d",
+    "llvm.loongarch.lsx.vsrlni.b.h" => "__builtin_lsx_vsrlni_b_h",
+    "llvm.loongarch.lsx.vsrlni.d.q" => "__builtin_lsx_vsrlni_d_q",
+    "llvm.loongarch.lsx.vsrlni.h.w" => "__builtin_lsx_vsrlni_h_w",
+    "llvm.loongarch.lsx.vsrlni.w.d" => "__builtin_lsx_vsrlni_w_d",
+    "llvm.loongarch.lsx.vsrlr.b" => "__builtin_lsx_vsrlr_b",
+    "llvm.loongarch.lsx.vsrlr.d" => "__builtin_lsx_vsrlr_d",
+    "llvm.loongarch.lsx.vsrlr.h" => "__builtin_lsx_vsrlr_h",
+    "llvm.loongarch.lsx.vsrlr.w" => "__builtin_lsx_vsrlr_w",
+    "llvm.loongarch.lsx.vsrlri.b" => "__builtin_lsx_vsrlri_b",
+    "llvm.loongarch.lsx.vsrlri.d" => "__builtin_lsx_vsrlri_d",
+    "llvm.loongarch.lsx.vsrlri.h" => "__builtin_lsx_vsrlri_h",
+    "llvm.loongarch.lsx.vsrlri.w" => "__builtin_lsx_vsrlri_w",
+    "llvm.loongarch.lsx.vsrlrn.b.h" => "__builtin_lsx_vsrlrn_b_h",
+    "llvm.loongarch.lsx.vsrlrn.h.w" => "__builtin_lsx_vsrlrn_h_w",
+    "llvm.loongarch.lsx.vsrlrn.w.d" => "__builtin_lsx_vsrlrn_w_d",
+    "llvm.loongarch.lsx.vsrlrni.b.h" => "__builtin_lsx_vsrlrni_b_h",
+    "llvm.loongarch.lsx.vsrlrni.d.q" => "__builtin_lsx_vsrlrni_d_q",
+    "llvm.loongarch.lsx.vsrlrni.h.w" => "__builtin_lsx_vsrlrni_h_w",
+    "llvm.loongarch.lsx.vsrlrni.w.d" => "__builtin_lsx_vsrlrni_w_d",
+    "llvm.loongarch.lsx.vssran.b.h" => "__builtin_lsx_vssran_b_h",
+    "llvm.loongarch.lsx.vssran.bu.h" => "__builtin_lsx_vssran_bu_h",
+    "llvm.loongarch.lsx.vssran.h.w" => "__builtin_lsx_vssran_h_w",
+    "llvm.loongarch.lsx.vssran.hu.w" => "__builtin_lsx_vssran_hu_w",
+    "llvm.loongarch.lsx.vssran.w.d" => "__builtin_lsx_vssran_w_d",
+    "llvm.loongarch.lsx.vssran.wu.d" => "__builtin_lsx_vssran_wu_d",
+    "llvm.loongarch.lsx.vssrani.b.h" => "__builtin_lsx_vssrani_b_h",
+    "llvm.loongarch.lsx.vssrani.bu.h" => "__builtin_lsx_vssrani_bu_h",
+    "llvm.loongarch.lsx.vssrani.d.q" => "__builtin_lsx_vssrani_d_q",
+    "llvm.loongarch.lsx.vssrani.du.q" => "__builtin_lsx_vssrani_du_q",
+    "llvm.loongarch.lsx.vssrani.h.w" => "__builtin_lsx_vssrani_h_w",
+    "llvm.loongarch.lsx.vssrani.hu.w" => "__builtin_lsx_vssrani_hu_w",
+    "llvm.loongarch.lsx.vssrani.w.d" => "__builtin_lsx_vssrani_w_d",
+    "llvm.loongarch.lsx.vssrani.wu.d" => "__builtin_lsx_vssrani_wu_d",
+    "llvm.loongarch.lsx.vssrarn.b.h" => "__builtin_lsx_vssrarn_b_h",
+    "llvm.loongarch.lsx.vssrarn.bu.h" => "__builtin_lsx_vssrarn_bu_h",
+    "llvm.loongarch.lsx.vssrarn.h.w" => "__builtin_lsx_vssrarn_h_w",
+    "llvm.loongarch.lsx.vssrarn.hu.w" => "__builtin_lsx_vssrarn_hu_w",
+    "llvm.loongarch.lsx.vssrarn.w.d" => "__builtin_lsx_vssrarn_w_d",
+    "llvm.loongarch.lsx.vssrarn.wu.d" => "__builtin_lsx_vssrarn_wu_d",
+    "llvm.loongarch.lsx.vssrarni.b.h" => "__builtin_lsx_vssrarni_b_h",
+    "llvm.loongarch.lsx.vssrarni.bu.h" => "__builtin_lsx_vssrarni_bu_h",
+    "llvm.loongarch.lsx.vssrarni.d.q" => "__builtin_lsx_vssrarni_d_q",
+    "llvm.loongarch.lsx.vssrarni.du.q" => "__builtin_lsx_vssrarni_du_q",
+    "llvm.loongarch.lsx.vssrarni.h.w" => "__builtin_lsx_vssrarni_h_w",
+    "llvm.loongarch.lsx.vssrarni.hu.w" => "__builtin_lsx_vssrarni_hu_w",
+    "llvm.loongarch.lsx.vssrarni.w.d" => "__builtin_lsx_vssrarni_w_d",
+    "llvm.loongarch.lsx.vssrarni.wu.d" => "__builtin_lsx_vssrarni_wu_d",
+    "llvm.loongarch.lsx.vssrln.b.h" => "__builtin_lsx_vssrln_b_h",
+    "llvm.loongarch.lsx.vssrln.bu.h" => "__builtin_lsx_vssrln_bu_h",
+    "llvm.loongarch.lsx.vssrln.h.w" => "__builtin_lsx_vssrln_h_w",
+    "llvm.loongarch.lsx.vssrln.hu.w" => "__builtin_lsx_vssrln_hu_w",
+    "llvm.loongarch.lsx.vssrln.w.d" => "__builtin_lsx_vssrln_w_d",
+    "llvm.loongarch.lsx.vssrln.wu.d" => "__builtin_lsx_vssrln_wu_d",
+    "llvm.loongarch.lsx.vssrlni.b.h" => "__builtin_lsx_vssrlni_b_h",
+    "llvm.loongarch.lsx.vssrlni.bu.h" => "__builtin_lsx_vssrlni_bu_h",
+    "llvm.loongarch.lsx.vssrlni.d.q" => "__builtin_lsx_vssrlni_d_q",
+    "llvm.loongarch.lsx.vssrlni.du.q" => "__builtin_lsx_vssrlni_du_q",
+    "llvm.loongarch.lsx.vssrlni.h.w" => "__builtin_lsx_vssrlni_h_w",
+    "llvm.loongarch.lsx.vssrlni.hu.w" => "__builtin_lsx_vssrlni_hu_w",
+    "llvm.loongarch.lsx.vssrlni.w.d" => "__builtin_lsx_vssrlni_w_d",
+    "llvm.loongarch.lsx.vssrlni.wu.d" => "__builtin_lsx_vssrlni_wu_d",
+    "llvm.loongarch.lsx.vssrlrn.b.h" => "__builtin_lsx_vssrlrn_b_h",
+    "llvm.loongarch.lsx.vssrlrn.bu.h" => "__builtin_lsx_vssrlrn_bu_h",
+    "llvm.loongarch.lsx.vssrlrn.h.w" => "__builtin_lsx_vssrlrn_h_w",
+    "llvm.loongarch.lsx.vssrlrn.hu.w" => "__builtin_lsx_vssrlrn_hu_w",
+    "llvm.loongarch.lsx.vssrlrn.w.d" => "__builtin_lsx_vssrlrn_w_d",
+    "llvm.loongarch.lsx.vssrlrn.wu.d" => "__builtin_lsx_vssrlrn_wu_d",
+    "llvm.loongarch.lsx.vssrlrni.b.h" => "__builtin_lsx_vssrlrni_b_h",
+    "llvm.loongarch.lsx.vssrlrni.bu.h" => "__builtin_lsx_vssrlrni_bu_h",
+    "llvm.loongarch.lsx.vssrlrni.d.q" => "__builtin_lsx_vssrlrni_d_q",
+    "llvm.loongarch.lsx.vssrlrni.du.q" => "__builtin_lsx_vssrlrni_du_q",
+    "llvm.loongarch.lsx.vssrlrni.h.w" => "__builtin_lsx_vssrlrni_h_w",
+    "llvm.loongarch.lsx.vssrlrni.hu.w" => "__builtin_lsx_vssrlrni_hu_w",
+    "llvm.loongarch.lsx.vssrlrni.w.d" => "__builtin_lsx_vssrlrni_w_d",
+    "llvm.loongarch.lsx.vssrlrni.wu.d" => "__builtin_lsx_vssrlrni_wu_d",
+    "llvm.loongarch.lsx.vssub.b" => "__builtin_lsx_vssub_b",
+    "llvm.loongarch.lsx.vssub.bu" => "__builtin_lsx_vssub_bu",
+    "llvm.loongarch.lsx.vssub.d" => "__builtin_lsx_vssub_d",
+    "llvm.loongarch.lsx.vssub.du" => "__builtin_lsx_vssub_du",
+    "llvm.loongarch.lsx.vssub.h" => "__builtin_lsx_vssub_h",
+    "llvm.loongarch.lsx.vssub.hu" => "__builtin_lsx_vssub_hu",
+    "llvm.loongarch.lsx.vssub.w" => "__builtin_lsx_vssub_w",
+    "llvm.loongarch.lsx.vssub.wu" => "__builtin_lsx_vssub_wu",
+    "llvm.loongarch.lsx.vst" => "__builtin_lsx_vst",
+    "llvm.loongarch.lsx.vstelm.b" => "__builtin_lsx_vstelm_b",
+    "llvm.loongarch.lsx.vstelm.d" => "__builtin_lsx_vstelm_d",
+    "llvm.loongarch.lsx.vstelm.h" => "__builtin_lsx_vstelm_h",
+    "llvm.loongarch.lsx.vstelm.w" => "__builtin_lsx_vstelm_w",
+    "llvm.loongarch.lsx.vstx" => "__builtin_lsx_vstx",
+    "llvm.loongarch.lsx.vsub.b" => "__builtin_lsx_vsub_b",
+    "llvm.loongarch.lsx.vsub.d" => "__builtin_lsx_vsub_d",
+    "llvm.loongarch.lsx.vsub.h" => "__builtin_lsx_vsub_h",
+    "llvm.loongarch.lsx.vsub.q" => "__builtin_lsx_vsub_q",
+    "llvm.loongarch.lsx.vsub.w" => "__builtin_lsx_vsub_w",
+    "llvm.loongarch.lsx.vsubi.bu" => "__builtin_lsx_vsubi_bu",
+    "llvm.loongarch.lsx.vsubi.du" => "__builtin_lsx_vsubi_du",
+    "llvm.loongarch.lsx.vsubi.hu" => "__builtin_lsx_vsubi_hu",
+    "llvm.loongarch.lsx.vsubi.wu" => "__builtin_lsx_vsubi_wu",
+    "llvm.loongarch.lsx.vsubwev.d.w" => "__builtin_lsx_vsubwev_d_w",
+    "llvm.loongarch.lsx.vsubwev.d.wu" => "__builtin_lsx_vsubwev_d_wu",
+    "llvm.loongarch.lsx.vsubwev.h.b" => "__builtin_lsx_vsubwev_h_b",
+    "llvm.loongarch.lsx.vsubwev.h.bu" => "__builtin_lsx_vsubwev_h_bu",
+    "llvm.loongarch.lsx.vsubwev.q.d" => "__builtin_lsx_vsubwev_q_d",
+    "llvm.loongarch.lsx.vsubwev.q.du" => "__builtin_lsx_vsubwev_q_du",
+    "llvm.loongarch.lsx.vsubwev.w.h" => "__builtin_lsx_vsubwev_w_h",
+    "llvm.loongarch.lsx.vsubwev.w.hu" => "__builtin_lsx_vsubwev_w_hu",
+    "llvm.loongarch.lsx.vsubwod.d.w" => "__builtin_lsx_vsubwod_d_w",
+    "llvm.loongarch.lsx.vsubwod.d.wu" => "__builtin_lsx_vsubwod_d_wu",
+    "llvm.loongarch.lsx.vsubwod.h.b" => "__builtin_lsx_vsubwod_h_b",
+    "llvm.loongarch.lsx.vsubwod.h.bu" => "__builtin_lsx_vsubwod_h_bu",
+    "llvm.loongarch.lsx.vsubwod.q.d" => "__builtin_lsx_vsubwod_q_d",
+    "llvm.loongarch.lsx.vsubwod.q.du" => "__builtin_lsx_vsubwod_q_du",
+    "llvm.loongarch.lsx.vsubwod.w.h" => "__builtin_lsx_vsubwod_w_h",
+    "llvm.loongarch.lsx.vsubwod.w.hu" => "__builtin_lsx_vsubwod_w_hu",
+    "llvm.loongarch.lsx.vxor.v" => "__builtin_lsx_vxor_v",
+    "llvm.loongarch.lsx.vxori.b" => "__builtin_lsx_vxori_b",
     "llvm.loongarch.movfcsr2gr" => "__builtin_loongarch_movfcsr2gr",
     "llvm.loongarch.movgr2fcsr" => "__builtin_loongarch_movgr2fcsr",
     "llvm.loongarch.syscall" => "__builtin_loongarch_syscall",
@@ -4033,6 +5485,7 @@ match name {
     "llvm.ppc.maddhd" => "__builtin_ppc_maddhd",
     "llvm.ppc.maddhdu" => "__builtin_ppc_maddhdu",
     "llvm.ppc.maddld" => "__builtin_ppc_maddld",
+    "llvm.ppc.mffsl" => "__builtin_ppc_mffsl",
     "llvm.ppc.mfmsr" => "__builtin_ppc_mfmsr",
     "llvm.ppc.mftbu" => "__builtin_ppc_mftbu",
     "llvm.ppc.mtfsb0" => "__builtin_ppc_mtfsb0",
@@ -7970,6 +9423,8 @@ match name {
     "llvm.x86.tpause" => "__builtin_ia32_tpause",
     "llvm.x86.umonitor" => "__builtin_ia32_umonitor",
     "llvm.x86.umwait" => "__builtin_ia32_umwait",
+    "llvm.x86.urdmsr" => "__builtin_ia32_urdmsr",
+    "llvm.x86.uwrmsr" => "__builtin_ia32_uwrmsr",
     "llvm.x86.vbcstnebf162ps128" => "__builtin_ia32_vbcstnebf162ps128",
     "llvm.x86.vbcstnebf162ps256" => "__builtin_ia32_vbcstnebf162ps256",
     "llvm.x86.vbcstnesh2ps128" => "__builtin_ia32_vbcstnesh2ps128",

From 783789f8313819a605782d9291050707cc11941a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 19 Oct 2023 07:48:42 -0400
Subject: [PATCH 425/997] Build the sysroot and run more tests

---
 .github/workflows/failures.yml                | 44 +++++++++++++------
 .github/workflows/gcc12.yml                   | 37 ++++++++--------
 build_system/src/build.rs                     | 30 ++++++++-----
 build_system/src/prepare.rs                   | 25 ++++++++---
 failing-ui-tests12.txt                        |  8 ++--
 ...0001-core-Disable-portable-simd-test.patch | 32 ++++++++++++++
 src/intrinsic/llvm.rs                         | 24 ++++++----
 src/type_.rs                                  | 10 ++---
 tests/lang_tests_common.rs                    | 26 +++++++++--
 9 files changed, 167 insertions(+), 69 deletions(-)
 create mode 100644 patches/libgccjit12/0001-core-Disable-portable-simd-test.patch

diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index e6a9716d18cc..27864dcadd0f 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -19,8 +19,16 @@ jobs:
       fail-fast: false
       matrix:
         libgccjit_version:
-          - { gcc: "libgccjit.so", artifacts_branch: "master" }
-          - { gcc: "libgccjit_without_int128.so", artifacts_branch: "master-without-128bit-integers" }
+          - gcc: "libgccjit.so"
+            artifacts_branch: "master"
+          - gcc: "libgccjit_without_int128.so"
+            artifacts_branch: "master-without-128bit-integers"
+          - gcc: "libgccjit12.so"
+            artifacts_branch: "gcc12"
+            extra: "--no-default-features"
+            # FIXME(antoyo): we need to set GCC_EXEC_PREFIX so that the linker can find the linker plugin.
+            # Not sure why it's not found otherwise.
+            env_extra: "TEST_FLAGS='-Cpanic=abort -Zpanic-abort-tests' GCC_EXEC_PREFIX=/usr/lib/gcc/"
 
     steps:
     - uses: actions/checkout@v3
@@ -28,7 +36,16 @@ jobs:
     - name: Install packages
       run: sudo apt-get install ninja-build ripgrep
 
+    - name: Install libgccjit12
+      if: matrix.libgccjit_version.gcc == 'libgccjit12.so'
+      run: sudo apt-get install libgccjit-12-dev
+
+    - name: Setup path to libgccjit
+      if: matrix.libgccjit_version.gcc == 'libgccjit12.so'
+      run: echo /usr/lib/gcc/x86_64-linux-gnu/12 > gcc_path
+
     - name: Download artifact
+      if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       uses: dawidd6/action-download-artifact@v2
       with:
           workflow: main.yml
@@ -40,6 +57,7 @@ jobs:
           search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
 
     - name: Setup path to libgccjit
+      if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       run: |
           sudo dpkg --force-overwrite -i gcc-13/gcc-13.deb
           echo /usr/lib/ > gcc_path
@@ -81,18 +99,18 @@ jobs:
         #path: rust
         #key: ${{ runner.os }}-packages-${{ hashFiles('rust/.git/HEAD') }}
 
-    - name: Build
-      run: |
-        ./y.sh prepare --only-libcore
-        ./y.sh build
-        cargo test
-        ./clean_all.sh
-
-    - name: Prepare dependencies
+    - name: Git config
       run: |
         git config --global user.email "user@example.com"
         git config --global user.name "User"
-        ./y.sh prepare
+
+    - name: Prepare dependencies
+      if: matrix.libgccjit_version.gcc == 'libgccjit12.so'
+      run: ./y.sh prepare --libgccjit12-patches
+
+    - name: Prepare dependencies
+      if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
+      run: ./y.sh prepare
 
     # Compile is a separate step, as the actions-rs/cargo action supports error annotations
     - name: Compile
@@ -107,5 +125,5 @@ jobs:
     - name: Run tests
       id: tests
       run: |
-        ./test.sh --release --clean --build-sysroot --test-failing-rustc | tee output_log
-        rg "test result" output_log >> $GITHUB_STEP_SUMMARY
+        ${{ matrix.libgccjit_version.env_extra }} ./test.sh --release --clean --build-sysroot --test-failing-rustc ${{ matrix.libgccjit_version.extra }} | tee output_log
+        rg --text "test result" output_log >> $GITHUB_STEP_SUMMARY
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index 295f43acb385..a0d363cf1fbd 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -11,6 +11,9 @@ env:
   # Enable backtraces for easier debugging
   RUST_BACKTRACE: 1
   TEST_FLAGS: "-Cpanic=abort -Zpanic-abort-tests"
+  # FIXME(antoyo): we need to set GCC_EXEC_PREFIX so that the linker can find the linker plugin.
+  # Not sure why it's not found otherwise.
+  GCC_EXEC_PREFIX: /usr/lib/gcc/
 
 jobs:
   build:
@@ -21,17 +24,15 @@ jobs:
       matrix:
         commands: [
           "--mini-tests",
-          # TODO(antoyo): re-enable those commands when the build with libgccjit 12 is fixed.
-          #"--std-tests",
+          "--std-tests",
           # FIXME: re-enable asm tests when GCC can emit in the right syntax.
           # "--asm-tests",
-          #"--test-libcore",
-          #"--extended-rand-tests",
-          #"--extended-regex-example-tests",
-          #"--extended-regex-tests",
-          #"--test-successful-rustc --nb-parts 2 --current-part 0",
-          #"--test-successful-rustc --nb-parts 2 --current-part 1",
-          #"--test-failing-rustc",
+          "--test-libcore",
+          "--extended-rand-tests",
+          "--extended-regex-example-tests",
+          "--extended-regex-tests",
+          "--test-successful-rustc --nb-parts 2 --current-part 0",
+          "--test-successful-rustc --nb-parts 2 --current-part 1",
         ]
 
     steps:
@@ -85,18 +86,16 @@ jobs:
 
     - name: Build
       run: |
-        ./y.sh prepare --only-libcore
-        # TODO(antoyo): build the sysroot when the build with libgccjit 12 is fixed.
-        #./y.sh build --no-default-features
-        # TODO(antoyo): run the tests when we can build the sysroot with libgccjit 12.
-        #cargo test --no-default-features
+        ./y.sh prepare --only-libcore --libgccjit12-patches
+        ./y.sh build --no-default-features --sysroot-panic-abort
+        cargo test --no-default-features
         ./clean_all.sh
 
     - name: Prepare dependencies
       run: |
         git config --global user.email "user@example.com"
         git config --global user.name "User"
-        ./y.sh prepare
+        ./y.sh prepare --libgccjit12-patches
 
     # Compile is a separate step, as the actions-rs/cargo action supports error annotations
     - name: Compile
@@ -108,9 +107,9 @@ jobs:
     - name: Add more failing tests for GCC 12
       run: cat failing-ui-tests12.txt >> failing-ui-tests.txt
 
+    - name: Add more failing tests because the sysroot is not compiled with LTO
+      run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
+
     - name: Run tests
       run: |
-        # TODO(antoyo): add --build-sysroot when the build with libgccjit 12 is fixed.
-        # FIXME(antoyo): we need to set GCC_EXEC_PREFIX so that the linker can find the linker plugin.
-        # Not sure why it's not found otherwise.
-        GCC_EXEC_PREFIX=/usr/lib/gcc/ ./test.sh --release --clean ${{ matrix.commands }} --no-default-features
+        ./test.sh --release --clean --build-sysroot ${{ matrix.commands }} --no-default-features
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index c71954e4d113..eaca7a987d6b 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -11,6 +11,7 @@ use std::path::Path;
 struct BuildArg {
     codegen_release_channel: bool,
     sysroot_release_channel: bool,
+    sysroot_panic_abort: bool,
     flags: Vec<String>,
     gcc_path: String,
 }
@@ -32,6 +33,9 @@ impl BuildArg {
                 "--no-default-features" => {
                     build_arg.flags.push("--no-default-features".to_string());
                 }
+                "--sysroot-panic-abort" => {
+                    build_arg.sysroot_panic_abort = true;
+                },
                 "--features" => {
                     if let Some(arg) = args.next() {
                         build_arg.flags.push("--features".to_string());
@@ -77,6 +81,7 @@ impl BuildArg {
 
     --release              : Build codegen in release mode
     --release-sysroot      : Build sysroot in release mode
+    --sysroot-panic-abort  : Build the sysroot without unwinding support.
     --no-default-features  : Add `--no-default-features` flag
     --features [arg]       : Add a new feature [arg]
     --target-triple [arg]  : Set the target triple to [arg]
@@ -88,7 +93,7 @@ impl BuildArg {
 
 fn build_sysroot(
     env: &mut HashMap<String, String>,
-    release_mode: bool,
+    args: &BuildArg,
     config: &ConfigInfo,
 ) -> Result<(), String> {
     std::env::set_current_dir("build_sysroot")
@@ -138,15 +143,18 @@ fn build_sysroot(
     let _ = fs::remove_dir_all("sysroot");
 
     // Builds libs
-    let channel = if release_mode {
-        let rustflags = env
-            .get("RUSTFLAGS")
-            .cloned()
-            .unwrap_or_default();
-        env.insert(
-            "RUSTFLAGS".to_string(),
-            format!("{} -Zmir-opt-level=3", rustflags),
-        );
+    let mut rustflags = env
+        .get("RUSTFLAGS")
+        .cloned()
+        .unwrap_or_default();
+    if args.sysroot_panic_abort {
+        rustflags.push_str(" -Cpanic=abort -Zpanic-abort-tests");
+    }
+    env.insert(
+        "RUSTFLAGS".to_string(),
+        format!("{} -Zmir-opt-level=3", rustflags),
+    );
+    let channel = if args.sysroot_release_channel {
         run_command_with_output_and_env(
             &[
                 &"cargo",
@@ -224,7 +232,7 @@ fn build_codegen(args: &BuildArg) -> Result<(), String> {
     println!("[BUILD] sysroot");
     build_sysroot(
         &mut env,
-        args.sysroot_release_channel,
+        args,
         &config,
     )?;
     Ok(())
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index d5d034c419c6..6c7c85868345 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -4,7 +4,7 @@ use crate::utils::{cargo_install, git_clone, run_command, run_command_with_outpu
 use std::fs;
 use std::path::Path;
 
-fn prepare_libcore(sysroot_path: &Path, cross_compile: bool) -> Result<(), String> {
+fn prepare_libcore(sysroot_path: &Path, libgccjit12_patches: bool, cross_compile: bool) -> Result<(), String> {
     let rustc_path = match get_rustc_path() {
         Some(path) => path,
         None => return Err("`rustc` path not found".to_string()),
@@ -93,6 +93,16 @@ fn prepare_libcore(sysroot_path: &Path, cross_compile: bool) -> Result<(), Strin
             Ok(())
         })?;
     }
+    if libgccjit12_patches {
+        walk_dir(
+            "patches/libgccjit12",
+            |_| Ok(()),
+            |file_path: &Path| {
+                patches.push(file_path.to_path_buf());
+                Ok(())
+            },
+        )?;
+    }
     patches.sort();
     for file_path in patches {
         println!("[GIT] apply `{}`", file_path.display());
@@ -164,17 +174,20 @@ where
 struct PrepareArg {
     cross_compile: bool,
     only_libcore: bool,
+    libgccjit12_patches: bool,
 }
 
 impl PrepareArg {
     fn new() -> Result<Option<Self>, String> {
         let mut only_libcore = false;
         let mut cross_compile = false;
+        let mut libgccjit12_patches = false;
 
         for arg in std::env::args().skip(2) {
             match arg.as_str() {
                 "--only-libcore" => only_libcore = true,
                 "--cross" => cross_compile = true,
+                "--libgccjit12-patches" => libgccjit12_patches = true,
                 "--help" => {
                     Self::usage();
                     return Ok(None);
@@ -185,6 +198,7 @@ impl PrepareArg {
         Ok(Some(Self {
             cross_compile,
             only_libcore,
+            libgccjit12_patches,
         }))
     }
 
@@ -193,9 +207,10 @@ impl PrepareArg {
             r#"
 `prepare` command help:
 
-    --only-libcore  : Only setup libcore and don't clone other repositories
-    --cross         : Apply the patches needed to do cross-compilation
-    --help          : Show this help
+    --only-libcore           : Only setup libcore and don't clone other repositories
+    --cross                  : Apply the patches needed to do cross-compilation
+    --libgccjit12-patches    : Apply patches needed for libgccjit12
+    --help                   : Show this help
 "#
         )
     }
@@ -207,7 +222,7 @@ pub fn run() -> Result<(), String> {
         None => return Ok(()),
     };
     let sysroot_path = Path::new("build_sysroot");
-    prepare_libcore(sysroot_path, args.cross_compile)?;
+    prepare_libcore(sysroot_path, args.libgccjit12_patches, args.cross_compile)?;
 
     if !args.only_libcore {
         cargo_install("hyperfine")?;
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 0ac0a034af40..f027afa78a38 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -19,15 +19,12 @@ tests/ui/simd/intrinsic/generic-reduction-pass.rs
 tests/ui/simd/intrinsic/generic-select-pass.rs
 tests/ui/simd/intrinsic/inlining-issue67557-ice.rs
 tests/ui/simd/intrinsic/inlining-issue67557.rs
-tests/ui/simd/monomorphize-shuffle-index.rs
 tests/ui/simd/shuffle.rs
 tests/ui/simd/simd-bitmask.rs
-tests/ui/generator/resume-after-return.rs
 tests/ui/iterators/iter-step-overflow-debug.rs
-tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs
 tests/ui/numbers-arithmetic/next-power-of-two-overflow-debug.rs
 tests/ui/privacy/reachable-unnameable-items.rs
-tests/ui/rfc-1937-termination-trait/termination-trait-in-test.rs
+tests/ui/rfcs/rfc-1937-termination-trait/termination-trait-in-test.rs
 tests/ui/async-await/async-fn-size-moved-locals.rs
 tests/ui/async-await/async-fn-size-uninit-locals.rs
 tests/ui/cfg/cfg-panic.rs
@@ -38,3 +35,6 @@ tests/ui/simd/issue-85915-simd-ptrs.rs
 tests/ui/issues/issue-68010-large-zst-consts.rs
 tests/ui/rust-2018/proc-macro-crate-in-paths.rs
 tests/ui/target-feature/missing-plusminus.rs
+tests/ui/sse2.rs
+tests/ui/codegen/issue-79865-llvm-miscompile.rs
+tests/ui/intrinsics/intrinsics-integer.rs
diff --git a/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch b/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
new file mode 100644
index 000000000000..9520a5a39edc
--- /dev/null
+++ b/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
@@ -0,0 +1,32 @@
+From 7bcd24ec6d4a96121874cb1ae5a23ea274aeff34 Mon Sep 17 00:00:00 2001
+From: None <none@example.com>
+Date: Thu, 19 Oct 2023 13:12:51 -0400
+Subject: [PATCH] [core] Disable portable-simd test
+
+---
+ library/core/tests/lib.rs | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
+index 5814ed4..194ad4c 100644
+--- a/library/core/tests/lib.rs
++++ b/library/core/tests/lib.rs
+@@ -90,7 +90,6 @@
+ #![feature(unwrap_infallible)]
+ #![feature(pointer_byte_offsets)]
+ #![feature(pointer_is_aligned)]
+-#![feature(portable_simd)]
+ #![feature(ptr_metadata)]
+ #![feature(lazy_cell)]
+ #![feature(unsized_tuple_coercion)]
+@@ -157,7 +156,6 @@ mod pin;
+ mod pin_macro;
+ mod ptr;
+ mod result;
+-mod simd;
+ mod slice;
+ mod str;
+ mod str_lossy;
+-- 
+2.42.0
+
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 5996623bdc58..35eb4a11005b 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -432,15 +432,21 @@ pub fn ignore_arg_cast(func_name: &str, index: usize, args_len: usize) -> bool {
 
 #[cfg(not(feature="master"))]
 pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
-    match name {
-        "llvm.x86.xgetbv" | "llvm.x86.sse2.pause" => {
-            let gcc_name = "__builtin_trap";
-            let func = cx.context.get_builtin_function(gcc_name);
-            cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
-            return func;
-        },
-        _ => unimplemented!("unsupported LLVM intrinsic {}", name),
-    }
+    let gcc_name =
+        match name {
+            "llvm.x86.sse2.pause" => {
+                // NOTE: pause is only a hint, so we use a dummy built-in because target built-ins
+                // are not supported in libgccjit 12.
+                "__builtin_inff"
+            },
+            "llvm.x86.xgetbv" => {
+                "__builtin_trap"
+            },
+            _ => unimplemented!("unsupported LLVM intrinsic {}", name),
+        };
+    let func = cx.context.get_builtin_function(gcc_name);
+    cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
+    return func;
 }
 
 #[cfg(feature="master")]
diff --git a/src/type_.rs b/src/type_.rs
index 4914792c7b12..7a89fe81d384 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -216,17 +216,17 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         value.get_type()
     }
 
-    fn type_array(&self, ty: Type<'gcc>, len: u64) -> Type<'gcc> {
-        // TODO: remove this as well?
-        /*if let Some(struct_type) = ty.is_struct() {
+    #[cfg_attr(feature="master", allow(unused_mut))]
+    fn type_array(&self, ty: Type<'gcc>, mut len: u64) -> Type<'gcc> {
+        #[cfg(not(feature="master"))]
+        if let Some(struct_type) = ty.is_struct() {
             if struct_type.get_field_count() == 0 {
                 // NOTE: since gccjit only supports i32 for the array size and libcore's tests uses a
                 // size of usize::MAX in test_binary_search, we workaround this by setting the size to
                 // zero for ZSTs.
-                // FIXME(antoyo): fix gccjit API.
                 len = 0;
             }
-        }*/
+        }
 
         self.context.new_array_type(None, ty, len)
     }
diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index 940c7cfd2662..af0133aad461 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -1,8 +1,8 @@
 //! The common code for `tests/lang_tests_*.rs`
 use std::{
     env::{self, current_dir},
-    path::PathBuf,
-    process::{self, Command},
+    path::{Path, PathBuf},
+    process::Command,
 };
 
 use lang_tester::LangTester;
@@ -23,9 +23,29 @@ pub fn main_inner(profile: Profile) {
     let gcc_path = include_str!("../gcc_path");
     let gcc_path = gcc_path.trim();
     env::set_var("LD_LIBRARY_PATH", gcc_path);
+
+    fn rust_filter(filename: &Path) -> bool {
+        filename.extension().expect("extension").to_str().expect("to_str") == "rs"
+    }
+
+    #[cfg(feature="master")]
+    fn filter(filename: &Path) -> bool {
+        rust_filter(filename)
+    }
+
+    #[cfg(not(feature="master"))]
+    fn filter(filename: &Path) -> bool {
+        if let Some(filename) = filename.to_str() {
+            if filename.ends_with("gep.rs") {
+                return false;
+            }
+        }
+        rust_filter(filename)
+    }
+
     LangTester::new()
         .test_dir("tests/run")
-        .test_file_filter(|path| path.extension().expect("extension").to_str().expect("to_str") == "rs")
+        .test_file_filter(filter)
         .test_extract(|source| {
             let lines =
                 source.lines()

From 42e37059a3bf0576dac84f4666bce3d09840f19b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 25 Oct 2023 20:41:39 -0400
Subject: [PATCH 426/997] Fix rebase

---
 src/abi.rs | 15 ---------------
 1 file changed, 15 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 562e1e9a0911..f601cd95f2a6 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -153,21 +153,6 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
             ty
         };
 
-        #[cfg(feature = "master")]
-        let apply_attrs = |ty: Type<'gcc>, attrs: &ArgAttributes| {
-            if cx.sess().opts.optimize != config::OptLevel::No
-                && attrs.regular.contains(rustc_target::abi::call::ArgAttribute::NoAlias)
-            {
-                ty.make_restrict()
-            } else {
-                ty
-            }
-        };
-        #[cfg(not(feature = "master"))]
-        let apply_attrs = |ty: Type<'gcc>, _attrs: &ArgAttributes| {
-            ty
-        };
-
         for arg in self.args.iter() {
             let arg_ty = match arg.mode {
                 PassMode::Ignore => continue,

From 9efb4ce8badae357b02818b167624b9e14f9fd3b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 25 Oct 2023 20:41:45 -0400
Subject: [PATCH 427/997] Update to nightly-2023-10-25

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index 25a1cea98cce..1dff813db590 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2023-10-08"
+channel = "nightly-2023-10-25"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From c12ac7ea76d4051261010932d98a1b7f394a9eaa Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 25 Oct 2023 20:42:47 -0400
Subject: [PATCH 428/997] Fix warning

---
 src/lib.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/lib.rs b/src/lib.rs
index 66e3475b527a..a530fc994a22 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -12,6 +12,7 @@
  * TODO(antoyo): remove the patches.
  */
 
+#![cfg_attr(not(bootstrap), allow(internal_features))]
 #![cfg_attr(not(bootstrap), doc(rust_logo))]
 #![cfg_attr(not(bootstrap), feature(rustdoc_internals))]
 #![feature(

From 2a2b3ea48bd458d30fdfa044111932b77f690099 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 25 Oct 2023 20:43:51 -0400
Subject: [PATCH 429/997] Remove duplication in CI

---
 .github/workflows/ci.yml | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index c3bb1bc088e6..65e7a697ab0d 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -119,9 +119,6 @@ jobs:
     - name: Add more failing tests because the sysroot is not compiled with LTO
       run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
 
-    - name: Add more failing tests because the sysroot is not compiled with LTO
-      run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
-
     - name: Run tests
       run: |
         ./test.sh --release --clean --build-sysroot ${{ matrix.commands }}

From a6984f5961c6a211b64797ff0db595228d00abf5 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 25 Oct 2023 20:56:39 -0400
Subject: [PATCH 430/997] Fix tests

---
 Readme.md                 | 2 +-
 failing-non-lto-tests.txt | 2 +-
 failing-ui-tests.txt      | 8 ++++----
 failing-ui-tests12.txt    | 2 +-
 rust-toolchain            | 2 +-
 test.sh                   | 4 ++--
 6 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/Readme.md b/Readme.md
index 1bad1e71137c..95fc6374c09a 100644
--- a/Readme.md
+++ b/Readme.md
@@ -292,7 +292,7 @@ To send the changes to the rust repo:
 ```bash
 cd ../rust
 git pull origin master
-git checkbout -b subtree-update_cg_gcc_YYYY-MM-DD
+git checkout -b subtree-update_cg_gcc_YYYY-MM-DD
 PATH="$HOME/bin:$PATH" ~/bin/git-subtree pull --prefix=compiler/rustc_codegen_gcc/ https://github.com/rust-lang/rustc_codegen_gcc.git master
 git push
 ```
diff --git a/failing-non-lto-tests.txt b/failing-non-lto-tests.txt
index 2f338f7d3c87..4fd60f2b8e4f 100644
--- a/failing-non-lto-tests.txt
+++ b/failing-non-lto-tests.txt
@@ -5,7 +5,7 @@ tests/ui/lto/lto-many-codegen-units.rs
 tests/ui/lto/issue-100772.rs
 tests/ui/lto/lto-rustc-loads-linker-plugin.rs
 tests/ui/panic-runtime/lto-unwind.rs
-tests/ui/sanitize/issue-111184-generator-witness.rs
+tests/ui/sanitize/issue-111184-coroutine-witness.rs
 tests/ui/sepcomp/sepcomp-lib-lto.rs
 tests/ui/lto/lto-opt-level-s.rs
 tests/ui/lto/lto-opt-level-z.rs
diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 771da5812957..22044eabe969 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -21,8 +21,8 @@ tests/ui/cfg/cfg-panic-abort.rs
 tests/ui/drop/dynamic-drop-async.rs
 tests/ui/drop/repeat-drop.rs
 tests/ui/fmt/format-args-capture.rs
-tests/ui/generator/panic-drops-resume.rs
-tests/ui/generator/panic-drops.rs
+tests/ui/coroutine/panic-drops-resume.rs
+tests/ui/coroutine/panic-drops.rs
 tests/ui/intrinsics/panic-uninitialized-zeroed.rs
 tests/ui/iterators/iter-sum-overflow-debug.rs
 tests/ui/iterators/iter-sum-overflow-overflow-checks.rs
@@ -53,7 +53,7 @@ tests/ui/simd/issue-89193.rs
 tests/ui/statics/issue-91050-1.rs
 tests/ui/statics/issue-91050-2.rs
 tests/ui/alloc-error/default-alloc-error-hook.rs
-tests/ui/generator/panic-safe.rs
+tests/ui/coroutine/panic-safe.rs
 tests/ui/issues/issue-14875.rs
 tests/ui/issues/issue-29948.rs
 tests/ui/panics/nested_panic_caught.rs
@@ -70,5 +70,5 @@ tests/ui/lto/lto-thin-rustc-loads-linker-plugin.rs
 tests/ui/lto/all-crates.rs
 tests/ui/async-await/deep-futures-are-freeze.rs
 tests/ui/closures/capture-unsized-by-ref.rs
-tests/ui/generator/resume-after-return.rs
+tests/ui/coroutine/resume-after-return.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index f027afa78a38..f91aa9253184 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -28,7 +28,7 @@ tests/ui/rfcs/rfc-1937-termination-trait/termination-trait-in-test.rs
 tests/ui/async-await/async-fn-size-moved-locals.rs
 tests/ui/async-await/async-fn-size-uninit-locals.rs
 tests/ui/cfg/cfg-panic.rs
-tests/ui/generator/size-moved-locals.rs
+tests/ui/coroutine/size-moved-locals.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-not-available-cases.rs
 tests/ui/simd/intrinsic/generic-gather-pass.rs
 tests/ui/simd/issue-85915-simd-ptrs.rs
diff --git a/rust-toolchain b/rust-toolchain
index 1dff813db590..205ec53b425b 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2023-10-25"
+channel = "nightly-2023-10-21"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
diff --git a/test.sh b/test.sh
index 2eceee7c1e9d..fa34c31dbaa7 100755
--- a/test.sh
+++ b/test.sh
@@ -371,10 +371,10 @@ function test_rustc() {
 
     git checkout -- tests/ui/issues/auxiliary/issue-3136-a.rs # contains //~ERROR, but shouldn't be removed
 
-    rm -r tests/ui/{abi*,extern/,unsized-locals/,proc-macro/,threads-sendsync/,thinlto/,borrowck/,chalkify/bugs/,test*,consts/const-float-bits-reject-conv.rs,consts/issue-miri-1910.rs} || true
+    rm -r tests/ui/{abi*,extern/,unsized-locals/,proc-macro/,threads-sendsync/,borrowck/,test*,consts/issue-miri-1910.rs} || true
     rm tests/ui/mir/mir_heavy_promoted.rs # this test is oom-killed in the CI.
     # Tests generating errors.
-    rm tests/ui/consts/const-eval/nonnull_as_ref_ub.rs tests/ui/consts/issue-94675.rs
+    rm tests/ui/consts/issue-94675.rs
     for test in $(rg --files-with-matches "thread" tests/ui); do
       rm $test
     done

From eb10fa345e3d2d80c450aae42fb868fbc5449915 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 27 Oct 2023 16:55:40 +0200
Subject: [PATCH 431/997] Fix build scripts

---
 cargo.sh  |   2 +-
 config.sh |  35 +++++++++++++----
 test.sh   | 114 +++++++++++++++++++++++++++++++++---------------------
 3 files changed, 98 insertions(+), 53 deletions(-)

diff --git a/cargo.sh b/cargo.sh
index 16e49b20423c..b68a08ee88f8 100755
--- a/cargo.sh
+++ b/cargo.sh
@@ -12,7 +12,7 @@ TOOLCHAIN=$(cat rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
 
 popd >/dev/null
 
-if [[ $(rustc -V) != $(rustc +${TOOLCHAIN} -V) ]]; then
+if [[ $(${RUSTC} -V) != $(${RUSTC} +${TOOLCHAIN} -V) ]]; then
     echo "rustc_codegen_gcc is build for $(rustc +${TOOLCHAIN} -V) but the default rustc version is $(rustc -V)."
     echo "Using $(rustc +${TOOLCHAIN} -V)."
 fi
diff --git a/config.sh b/config.sh
index 99ee9b054c6f..006758e19e19 100644
--- a/config.sh
+++ b/config.sh
@@ -4,19 +4,25 @@ export CARGO_INCREMENTAL=0
 
 if [ -f ./gcc_path ]; then
     export GCC_PATH=$(cat gcc_path)
+elif (( $use_system_gcc == 1 )); then
+    echo 'Using system GCC'
 else
     echo 'Please put the path to your custom build of libgccjit in the file `gcc_path`, see Readme.md for details'
     exit 1
 fi
 
+if [[ -z "$RUSTC" ]]; then
+    export RUSTC="rustc"
+fi
+
 unamestr=`uname`
 if [[ "$unamestr" == 'Linux' ]]; then
-   dylib_ext='so'
+    dylib_ext='so'
 elif [[ "$unamestr" == 'Darwin' ]]; then
-   dylib_ext='dylib'
+    dylib_ext='dylib'
 else
-   echo "Unsupported os"
-   exit 1
+    echo "Unsupported os"
+    exit 1
 fi
 
 HOST_TRIPLE=$(rustc -vV | grep host | cut -d: -f2 | tr -d " ")
@@ -44,17 +50,30 @@ if [[ ! -v FAT_LTO ]]; then
     disable_lto_flags='-Clto=off'
 fi
 
-export RUSTFLAGS="$CG_RUSTFLAGS $linker -Csymbol-mangling-version=v0 -Cdebuginfo=2 $disable_lto_flags -Zcodegen-backend=$(pwd)/target/${CHANNEL:-debug}/librustc_codegen_gcc.$dylib_ext --sysroot $(pwd)/build_sysroot/sysroot $TEST_FLAGS"
+if [[ -z "$BUILTIN_BACKEND" ]]; then
+    export RUSTFLAGS="$CG_RUSTFLAGS $linker -Csymbol-mangling-version=v0 -Cdebuginfo=2 $disable_lto_flags -Zcodegen-backend=$(pwd)/target/${CHANNEL:-debug}/librustc_codegen_gcc.$dylib_ext --sysroot $(pwd)/build_sysroot/sysroot $TEST_FLAGS"
+else
+    export RUSTFLAGS="$CG_RUSTFLAGS $linker -Csymbol-mangling-version=v0 -Cdebuginfo=2 $disable_lto_flags -Zcodegen-backend=gcc $TEST_FLAGS -Cpanic=abort"
+fi
 
 # FIXME(antoyo): remove once the atomic shim is gone
 if [[ unamestr == 'Darwin' ]]; then
-   export RUSTFLAGS="$RUSTFLAGS -Clink-arg=-undefined -Clink-arg=dynamic_lookup"
+    export RUSTFLAGS="$RUSTFLAGS -Clink-arg=-undefined -Clink-arg=dynamic_lookup"
 fi
 
-RUSTC="rustc $RUSTFLAGS -L crate=target/out --out-dir target/out"
+if [[ -z "$cargo_target_dir" ]]; then
+    RUST_CMD="$RUSTC $RUSTFLAGS -L crate=target/out --out-dir target/out"
+    cargo_target_dir="target/out"
+else
+    RUST_CMD="$RUSTC $RUSTFLAGS -L crate=$cargo_target_dir --out-dir $cargo_target_dir"
+fi
 export RUSTC_LOG=warn # display metadata load errors
 
-export LD_LIBRARY_PATH="$(pwd)/target/out:$(pwd)/build_sysroot/sysroot/lib/rustlib/$TARGET_TRIPLE/lib:$GCC_PATH"
+export LD_LIBRARY_PATH="$(pwd)/target/out:$(pwd)/build_sysroot/sysroot/lib/rustlib/$TARGET_TRIPLE/lib"
+if [[ ! -z "$:$GCC_PATH" ]]; then
+    export LD_LIBRARY_PATH="$LD_LIBRARY_PATH:$GCC_PATH"
+fi
+
 export DYLD_LIBRARY_PATH=$LD_LIBRARY_PATH
 # NOTE: To avoid the -fno-inline errors, use /opt/gcc/bin/gcc instead of cc.
 # To do so, add a symlink for cc to /opt/gcc/bin/gcc in our PATH.
diff --git a/test.sh b/test.sh
index fa34c31dbaa7..e896237a1ea4 100755
--- a/test.sh
+++ b/test.sh
@@ -5,16 +5,6 @@
 set -e
 #set -x
 
-if [ -f ./gcc_path ]; then
-    export GCC_PATH=$(cat gcc_path)
-else
-    echo 'Please put the path to your custom build of libgccjit in the file `gcc_path`, see Readme.md for details'
-    exit 1
-fi
-
-export LD_LIBRARY_PATH="$GCC_PATH"
-export LIBRARY_PATH="$GCC_PATH"
-
 flags=
 gcc_master_branch=1
 channel="debug"
@@ -22,12 +12,18 @@ funcs=()
 build_only=0
 nb_parts=0
 current_part=0
+use_system_gcc=0
+use_backend=0
+cargo_target_dir=""
+
+export CHANNEL='debug'
 
 while [[ $# -gt 0 ]]; do
     case $1 in
         --release)
             codegen_channel=release
             channel="release"
+            export CHANNEL='release'
             shift
             ;;
         --release-sysroot)
@@ -111,6 +107,22 @@ while [[ $# -gt 0 ]]; do
             build_only=1
             shift
             ;;
+        "--use-system-gcc")
+            use_system_gcc=1
+            shift
+            ;;
+        "--use-backend")
+            use_backend=1
+            shift
+            export BUILTIN_BACKEND=$1
+            shift
+            ;;
+        "--out-dir")
+            shift
+            export CARGO_TARGET_DIR=$1
+            cargo_target_dir=$1
+            shift
+            ;;
         "--nb-parts")
             shift
             nb_parts=$1
@@ -128,13 +140,25 @@ while [[ $# -gt 0 ]]; do
     esac
 done
 
-if [[ $channel == "release" ]]; then
-    export CHANNEL='release'
-    CARGO_INCREMENTAL=1 cargo rustc --release $flags
+if [ -f ./gcc_path ]; then
+    export GCC_PATH=$(cat gcc_path)
+elif (( $use_system_gcc == 1 )); then
+    echo 'Using system GCC'
 else
-    echo $LD_LIBRARY_PATH
-    export CHANNEL='debug'
-    cargo rustc $flags
+    echo 'Please put the path to your custom build of libgccjit in the file `gcc_path`, see Readme.md for details'
+    exit 1
+fi
+
+export LD_LIBRARY_PATH="$GCC_PATH"
+export LIBRARY_PATH="$GCC_PATH"
+
+if [[ $use_backend == 0 ]]; then
+    if [[ $channel == "release" ]]; then
+        CARGO_INCREMENTAL=1 cargo rustc --release $flags
+    else
+        echo $LD_LIBRARY_PATH
+        cargo rustc $flags
+    fi
 fi
 
 if (( $build_only == 1 )); then
@@ -145,24 +169,26 @@ fi
 source config.sh
 
 function clean() {
-    rm -r target/out || true
-    mkdir -p target/out/gccjit
+    rm -r $cargo_target_dir || true
+    mkdir -p $cargo_target_dir/gccjit
 }
 
 function mini_tests() {
     echo "[BUILD] mini_core"
     crate_types="lib,dylib"
+
     if [[ "$HOST_TRIPLE" != "$TARGET_TRIPLE" ]]; then
         crate_types="lib"
     fi
-    $RUSTC example/mini_core.rs --crate-name mini_core --crate-type $crate_types --target $TARGET_TRIPLE
+
+    $RUST_CMD example/mini_core.rs --crate-name mini_core --crate-type $crate_types --target $TARGET_TRIPLE
 
     echo "[BUILD] example"
-    $RUSTC example/example.rs --crate-type lib --target $TARGET_TRIPLE
+    $RUST_CMD example/example.rs --crate-type lib --target $TARGET_TRIPLE
 
     echo "[AOT] mini_core_hello_world"
-    $RUSTC example/mini_core_hello_world.rs --crate-name mini_core_hello_world --crate-type bin -g --target $TARGET_TRIPLE
-    $RUN_WRAPPER ./target/out/mini_core_hello_world abc bcd
+    $RUST_CMD example/mini_core_hello_world.rs --crate-name mini_core_hello_world --crate-type bin -g --target $TARGET_TRIPLE
+    $RUN_WRAPPER $cargo_target_dir/mini_core_hello_world abc bcd
 }
 
 function build_sysroot() {
@@ -189,42 +215,42 @@ function run_in_vm() {
 
 function std_tests() {
     echo "[AOT] arbitrary_self_types_pointers_and_wrappers"
-    $RUSTC example/arbitrary_self_types_pointers_and_wrappers.rs --crate-name arbitrary_self_types_pointers_and_wrappers --crate-type bin --target $TARGET_TRIPLE
-    $RUN_WRAPPER ./target/out/arbitrary_self_types_pointers_and_wrappers
+    $RUST_CMD example/arbitrary_self_types_pointers_and_wrappers.rs --crate-name arbitrary_self_types_pointers_and_wrappers --crate-type bin --target $TARGET_TRIPLE
+    $RUN_WRAPPER $cargo_target_dir/arbitrary_self_types_pointers_and_wrappers
 
     echo "[AOT] alloc_system"
-    $RUSTC example/alloc_system.rs --crate-type lib --target "$TARGET_TRIPLE"
+    $RUST_CMD example/alloc_system.rs --crate-type lib --target "$TARGET_TRIPLE"
 
     # FIXME: doesn't work on m68k.
     if [[ "$HOST_TRIPLE" == "$TARGET_TRIPLE" ]]; then
         echo "[AOT] alloc_example"
-        $RUSTC example/alloc_example.rs --crate-type bin --target $TARGET_TRIPLE
-        $RUN_WRAPPER ./target/out/alloc_example
+        $RUST_CMD example/alloc_example.rs --crate-type bin --target $TARGET_TRIPLE
+        $RUN_WRAPPER $cargo_target_dir/alloc_example
     fi
 
     echo "[AOT] dst_field_align"
     # FIXME(antoyo): Re-add -Zmir-opt-level=2 once rust-lang/rust#67529 is fixed.
-    $RUSTC example/dst-field-align.rs --crate-name dst_field_align --crate-type bin --target $TARGET_TRIPLE
-    $RUN_WRAPPER ./target/out/dst_field_align || (echo $?; false)
+    $RUST_CMD example/dst-field-align.rs --crate-name dst_field_align --crate-type bin --target $TARGET_TRIPLE
+    $RUN_WRAPPER $cargo_target_dir/dst_field_align || (echo $?; false)
 
     echo "[AOT] std_example"
     std_flags="--cfg feature=\"master\""
     if (( $gcc_master_branch == 0 )); then
         std_flags=""
     fi
-    $RUSTC example/std_example.rs --crate-type bin --target $TARGET_TRIPLE $std_flags
-    $RUN_WRAPPER ./target/out/std_example --target $TARGET_TRIPLE
+    $RUST_CMD example/std_example.rs --crate-type bin --target $TARGET_TRIPLE $std_flags
+    $RUN_WRAPPER $cargo_target_dir/std_example --target $TARGET_TRIPLE
 
     echo "[AOT] subslice-patterns-const-eval"
-    $RUSTC example/subslice-patterns-const-eval.rs --crate-type bin $TEST_FLAGS --target $TARGET_TRIPLE
-    $RUN_WRAPPER ./target/out/subslice-patterns-const-eval
+    $RUST_CMD example/subslice-patterns-const-eval.rs --crate-type bin $TEST_FLAGS --target $TARGET_TRIPLE
+    $RUN_WRAPPER $cargo_target_dir/subslice-patterns-const-eval
 
     echo "[AOT] track-caller-attribute"
-    $RUSTC example/track-caller-attribute.rs --crate-type bin $TEST_FLAGS --target $TARGET_TRIPLE
-    $RUN_WRAPPER ./target/out/track-caller-attribute
+    $RUST_CMD example/track-caller-attribute.rs --crate-type bin $TEST_FLAGS --target $TARGET_TRIPLE
+    $RUN_WRAPPER $cargo_target_dir/track-caller-attribute
 
     echo "[BUILD] mod_bench"
-    $RUSTC example/mod_bench.rs --crate-type bin --target $TARGET_TRIPLE
+    $RUST_CMD example/mod_bench.rs --crate-type bin --target $TARGET_TRIPLE
 }
 
 function setup_rustc() {
@@ -233,7 +259,7 @@ function setup_rustc() {
     git clone https://github.com/rust-lang/rust.git || true
     cd rust
     git fetch
-    git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(')
+    git checkout $($RUSTC -V | cut -d' ' -f3 | tr -d '(')
     export RUSTFLAGS=
 
     rm config.toml || true
@@ -258,8 +284,8 @@ llvm-filecheck = "`which FileCheck-10 || which FileCheck-11 || which FileCheck-1
 download-ci-llvm = false
 EOF
 
-    rustc -V | cut -d' ' -f3 | tr -d '('
-    git checkout $(rustc -V | cut -d' ' -f3 | tr -d '(') tests
+    $RUSTC -V | cut -d' ' -f3 | tr -d '('
+    git checkout $($RUSTC -V | cut -d' ' -f3 | tr -d '(') tests
 }
 
 function asm_tests() {
@@ -286,17 +312,17 @@ function test_libcore() {
 #echo "[BENCH COMPILE] mod_bench"
 
 #COMPILE_MOD_BENCH_INLINE="$RUSTC example/mod_bench.rs --crate-type bin -Zmir-opt-level=3 -O --crate-name mod_bench_inline"
-#COMPILE_MOD_BENCH_LLVM_0="rustc example/mod_bench.rs --crate-type bin -Copt-level=0 -o target/out/mod_bench_llvm_0 -Cpanic=abort"
-#COMPILE_MOD_BENCH_LLVM_1="rustc example/mod_bench.rs --crate-type bin -Copt-level=1 -o target/out/mod_bench_llvm_1 -Cpanic=abort"
-#COMPILE_MOD_BENCH_LLVM_2="rustc example/mod_bench.rs --crate-type bin -Copt-level=2 -o target/out/mod_bench_llvm_2 -Cpanic=abort"
-#COMPILE_MOD_BENCH_LLVM_3="rustc example/mod_bench.rs --crate-type bin -Copt-level=3 -o target/out/mod_bench_llvm_3 -Cpanic=abort"
+#COMPILE_MOD_BENCH_LLVM_0="rustc example/mod_bench.rs --crate-type bin -Copt-level=0 -o $cargo_target_dir/mod_bench_llvm_0 -Cpanic=abort"
+#COMPILE_MOD_BENCH_LLVM_1="rustc example/mod_bench.rs --crate-type bin -Copt-level=1 -o $cargo_target_dir/mod_bench_llvm_1 -Cpanic=abort"
+#COMPILE_MOD_BENCH_LLVM_2="rustc example/mod_bench.rs --crate-type bin -Copt-level=2 -o $cargo_target_dir/mod_bench_llvm_2 -Cpanic=abort"
+#COMPILE_MOD_BENCH_LLVM_3="rustc example/mod_bench.rs --crate-type bin -Copt-level=3 -o $cargo_target_dir/mod_bench_llvm_3 -Cpanic=abort"
 
 ## Use 100 runs, because a single compilations doesn't take more than ~150ms, so it isn't very slow
 #hyperfine --runs ${COMPILE_RUNS:-100} "$COMPILE_MOD_BENCH_INLINE" "$COMPILE_MOD_BENCH_LLVM_0" "$COMPILE_MOD_BENCH_LLVM_1" "$COMPILE_MOD_BENCH_LLVM_2" "$COMPILE_MOD_BENCH_LLVM_3"
 
 #echo
 #echo "[BENCH RUN] mod_bench"
-#hyperfine --runs ${RUN_RUNS:-10} ./target/out/mod_bench{,_inline} ./target/out/mod_bench_llvm_*
+#hyperfine --runs ${RUN_RUNS:-10} $cargo_target_dir/mod_bench{,_inline} $cargo_target_dir/mod_bench_llvm_*
 
 function extended_rand_tests() {
     if (( $gcc_master_branch == 0 )); then

From 9149becf6a6ecd153cd6fe006997c8c74afba77d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 24 Oct 2023 21:34:50 -0400
Subject: [PATCH 432/997] Fix vector compilation error

---
 src/int.rs | 25 ++++++++++++++++++++++---
 1 file changed, 22 insertions(+), 3 deletions(-)

diff --git a/src/int.rs b/src/int.rs
index ea8550d20f36..9b9b3ea4f870 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -76,6 +76,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 a >> b
             }
         }
+        else if a_type.is_vector() && a_type.is_vector() {
+            a >> b
+        }
         else if a_native && !b_native {
             self.gcc_lshr(a, self.gcc_int_cast(b, a_type))
         }
@@ -144,7 +147,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     fn additive_operation(&self, operation: BinaryOp, a: RValue<'gcc>, mut b: RValue<'gcc>) -> RValue<'gcc> {
         let a_type = a.get_type();
         let b_type = b.get_type();
-        if self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type) {
+        if (self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type)) || (a_type.is_vector() && b_type.is_vector()) {
             if a_type != b_type {
                 if a_type.is_vector() {
                     // Vector types need to be bitcast.
@@ -158,6 +161,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             self.context.new_binary_op(None, operation, a_type, a, b)
         }
         else {
+            debug_assert!(a_type.dyncast_array().is_some());
+            debug_assert!(b_type.dyncast_array().is_some());
             let signed = a_type.is_compatible_with(self.i128_type);
             let func_name =
                 match (operation, signed) {
@@ -189,10 +194,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     fn multiplicative_operation(&self, operation: BinaryOp, operation_name: &str, signed: bool, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
         let a_type = a.get_type();
         let b_type = b.get_type();
-        if self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type) {
+        if (self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type)) || (a_type.is_vector() && b_type.is_vector()) {
             self.context.new_binary_op(None, operation, a_type, a, b)
         }
         else {
+            debug_assert!(a_type.dyncast_array().is_some());
+            debug_assert!(b_type.dyncast_array().is_some());
             let sign =
                 if signed {
                     ""
@@ -337,6 +344,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     pub fn operation_with_overflow(&self, func_name: &str, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
         let a_type = lhs.get_type();
         let b_type = rhs.get_type();
+        debug_assert!(a_type.dyncast_array().is_some());
+        debug_assert!(b_type.dyncast_array().is_some());
         let param_a = self.context.new_parameter(None, a_type, "a");
         let param_b = self.context.new_parameter(None, b_type, "b");
         let result_field = self.context.new_field(None, a_type, "result");
@@ -496,7 +505,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     pub fn gcc_xor(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
         let a_type = a.get_type();
         let b_type = b.get_type();
-        if self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type) {
+        if a_type.is_vector() && b_type.is_vector() {
+            let b = self.bitcast_if_needed(b, a_type);
+            a ^ b
+        }
+        else if self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type) {
             a ^ b
         }
         else {
@@ -527,6 +540,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 a << b
             }
         }
+        else if a_type.is_vector() && a_type.is_vector() {
+            a << b
+        }
         else if a_native && !b_native {
             self.gcc_shl(a, self.gcc_int_cast(b, a_type))
         }
@@ -690,6 +706,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let a_native = self.is_native_int_type_or_bool(a_type);
         let b_native = self.is_native_int_type_or_bool(b_type);
         if a_type.is_vector() && b_type.is_vector() {
+            let b = self.bitcast_if_needed(b, a_type);
             self.context.new_binary_op(None, operation, a_type, a, b)
         }
         else if a_native && b_native {
@@ -748,6 +765,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             return self.context.new_cast(None, value, dest_typ);
         }
 
+        debug_assert!(value_type.dyncast_array().is_some());
         let name_suffix =
             match self.type_kind(dest_typ) {
                 TypeKind::Float => "tisf",
@@ -781,6 +799,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             return self.context.new_cast(None, value, dest_typ);
         }
 
+        debug_assert!(value_type.dyncast_array().is_some());
         let name_suffix =
             match self.type_kind(value_type) {
                 TypeKind::Float => "sfti",

From cc2af1fb41b0dac60fabf5e3047f32af091a982a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 25 Oct 2023 18:26:34 -0400
Subject: [PATCH 433/997] Do not emit .eh_frame section when using
 -Cpanic=abort

---
 build_sysroot/build_sysroot.sh |  4 ++++
 build_system/src/build.rs      |  6 ++++++
 failing-ui-tests12.txt         |  1 +
 src/base.rs                    | 16 +++++++---------
 src/lib.rs                     | 14 ++++++++++----
 5 files changed, 28 insertions(+), 13 deletions(-)

diff --git a/build_sysroot/build_sysroot.sh b/build_sysroot/build_sysroot.sh
index 116fd36e7a7b..ebc7dc375b12 100755
--- a/build_sysroot/build_sysroot.sh
+++ b/build_sysroot/build_sysroot.sh
@@ -28,3 +28,7 @@ fi
 # Copy files to sysroot
 mkdir -p sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
 cp -r target/$TARGET_TRIPLE/$sysroot_channel/deps/* sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
+# Copy the source files to the sysroot (Rust for Linux needs this).
+source_dir=sysroot/lib/rustlib/src/rust
+mkdir -p $source_dir
+cp -r sysroot_src/library/ $source_dir
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index eaca7a987d6b..f1c3701a946e 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -194,6 +194,12 @@ fn build_sysroot(
         copier,
     )?;
 
+    // Copy the source files to the sysroot (Rust for Linux needs this).
+    let sysroot_src_path = "sysroot/lib/rustlib/src/rust";
+    fs::create_dir_all(&sysroot_src_path)
+        .map_err(|error| format!("Failed to create directory `{}`: {:?}", sysroot_src_path, error))?;
+    run_command(&[&"cp", &"-r", &"sysroot_src/library/", &sysroot_src_path], None)?;
+
     Ok(())
 }
 
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index f91aa9253184..24ef7bb8d709 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -38,3 +38,4 @@ tests/ui/target-feature/missing-plusminus.rs
 tests/ui/sse2.rs
 tests/ui/codegen/issue-79865-llvm-miscompile.rs
 tests/ui/intrinsics/intrinsics-integer.rs
+tests/ui/std-backtrace.rs
diff --git a/src/base.rs b/src/base.rs
index 5073066c1383..3ffdab8b16ca 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -3,7 +3,6 @@ use std::env;
 use std::time::Instant;
 
 use gccjit::{
-    Context,
     FunctionType,
     GlobalKind,
 };
@@ -18,8 +17,9 @@ use rustc_codegen_ssa::mono_item::MonoItemExt;
 use rustc_codegen_ssa::traits::DebugInfoMethods;
 use rustc_session::config::DebugInfo;
 use rustc_span::Symbol;
+use rustc_target::spec::PanicStrategy;
 
-use crate::{LockedTargetInfo, gcc_util};
+use crate::{LockedTargetInfo, gcc_util, new_context};
 use crate::GccContext;
 use crate::builder::Builder;
 use crate::context::CodegenCx;
@@ -88,20 +88,18 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
     fn module_codegen(tcx: TyCtxt<'_>, (cgu_name, target_info): (Symbol, LockedTargetInfo)) -> ModuleCodegen<GccContext> {
         let cgu = tcx.codegen_unit(cgu_name);
         // Instantiate monomorphizations without filling out definitions yet...
-        let context = Context::default();
+        let context = new_context(&tcx);
 
-        context.add_command_line_option("-fexceptions");
-        context.add_driver_option("-fexceptions");
+        if tcx.sess.panic_strategy() == PanicStrategy::Unwind {
+            context.add_command_line_option("-fexceptions");
+            context.add_driver_option("-fexceptions");
+        }
 
         let disabled_features: HashSet<_> = tcx.sess.opts.cg.target_feature.split(',')
             .filter(|feature| feature.starts_with('-'))
             .map(|string| &string[1..])
             .collect();
 
-        if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" {
-            context.add_command_line_option("-masm=intel");
-        }
-
         if !disabled_features.contains("avx") && tcx.sess.target.arch == "x86_64" {
             // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for
             // SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead.
diff --git a/src/lib.rs b/src/lib.rs
index a530fc994a22..26f1763bb801 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -244,17 +244,23 @@ impl CodegenBackend for GccCodegenBackend {
     }
 }
 
+fn new_context<'gcc, 'tcx>(tcx: &TyCtxt<'tcx>) -> Context<'gcc> {
+    let context = Context::default();
+    if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" {
+        context.add_command_line_option("-masm=intel");
+    }
+    context.add_command_line_option("-fno-asynchronous-unwind-tables");
+    context
+}
+
 impl ExtraBackendMethods for GccCodegenBackend {
     fn codegen_allocator<'tcx>(&self, tcx: TyCtxt<'tcx>, module_name: &str, kind: AllocatorKind, alloc_error_handler_kind: AllocatorKind) -> Self::Module {
         let mut mods = GccContext {
-            context: Context::default(),
+            context: new_context(&tcx),
             should_combine_object_files: false,
             temp_dir: None,
         };
 
-        if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" {
-            mods.context.add_command_line_option("-masm=intel");
-        }
         unsafe { allocator::codegen(tcx, &mut mods, module_name, kind, alloc_error_handler_kind); }
         mods
     }

From 4dbfa4d698f75db615347854a58c9838c1477165 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 27 Oct 2023 19:31:02 -0400
Subject: [PATCH 434/997] Set the .comment section

---
 Cargo.lock |  4 ++--
 src/lib.rs | 14 +++++++++++++-
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index b8e2e5d80804..7c1863369278 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -74,7 +74,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#c52a218f5529321285b4489e5562a00e5428e033"
+source = "git+https://github.com/antoyo/gccjit.rs#6e290f25b1d1edab5ae9ace486fd2dc8c08d6421"
 dependencies = [
  "gccjit_sys",
 ]
@@ -82,7 +82,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#c52a218f5529321285b4489e5562a00e5428e033"
+source = "git+https://github.com/antoyo/gccjit.rs#6e290f25b1d1edab5ae9ace486fd2dc8c08d6421"
 dependencies = [
  "libc",
 ]
diff --git a/src/lib.rs b/src/lib.rs
index 26f1763bb801..f672a45af915 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -39,6 +39,8 @@ extern crate rustc_errors;
 extern crate rustc_fluent_macro;
 extern crate rustc_fs_util;
 extern crate rustc_hir;
+#[cfg(feature="master")]
+extern crate rustc_interface;
 extern crate rustc_macros;
 extern crate rustc_metadata;
 extern crate rustc_middle;
@@ -86,7 +88,7 @@ use std::sync::atomic::Ordering;
 
 use gccjit::{Context, OptimizationLevel};
 #[cfg(feature="master")]
-use gccjit::TargetInfo;
+use gccjit::{TargetInfo, Version};
 #[cfg(not(feature="master"))]
 use gccjit::CType;
 use errors::LTONotSupported;
@@ -249,6 +251,16 @@ fn new_context<'gcc, 'tcx>(tcx: &TyCtxt<'tcx>) -> Context<'gcc> {
     if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" {
         context.add_command_line_option("-masm=intel");
     }
+    #[cfg(feature="master")]
+    {
+        let version = Version::get();
+        let version = format!("{}.{}.{}", version.major, version.minor, version.patch);
+        context.set_output_ident(&format!("rustc version {} with libgccjit {}",
+                rustc_interface::util::rustc_version_str().unwrap_or("unknown version"),
+                version,
+        ));
+    }
+    // TODO(antoyo): check if this should only be added when using -Cforce-unwind-tables=n.
     context.add_command_line_option("-fno-asynchronous-unwind-tables");
     context
 }

From 4d8b25c39510ae0c6b00b1bc5efabf0d4884978a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 17 Nov 2023 17:32:43 -0500
Subject: [PATCH 435/997] Update patch disabling portable-simd

---
 .github/workflows/ci.yml                           |  6 ++++--
 .github/workflows/failures.yml                     |  3 ++-
 .github/workflows/m68k.yml                         |  6 ++++--
 .github/workflows/release.yml                      |  6 ++++--
 .github/workflows/stdarch.yml                      |  3 ++-
 .../0001-core-Disable-portable-simd-test.patch     | 14 +++++++-------
 rust-toolchain                                     |  2 +-
 7 files changed, 24 insertions(+), 16 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 65e7a697ab0d..04a0017a3504 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -99,7 +99,8 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        ./y.sh build
+        # TODO: remove --features master when it is back to the default.
+        ./y.sh build --features master
         cargo test
         ./clean_all.sh
 
@@ -121,7 +122,8 @@ jobs:
 
     - name: Run tests
       run: |
-        ./test.sh --release --clean --build-sysroot ${{ matrix.commands }}
+        # TODO: remove --features master when it is back to the default.
+        ./test.sh --features master --release --clean --build-sysroot ${{ matrix.commands }}
 
   duplicates:
     runs-on: ubuntu-latest
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index 27864dcadd0f..7fcc0bfe75f2 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -125,5 +125,6 @@ jobs:
     - name: Run tests
       id: tests
       run: |
-        ${{ matrix.libgccjit_version.env_extra }} ./test.sh --release --clean --build-sysroot --test-failing-rustc ${{ matrix.libgccjit_version.extra }} | tee output_log
+        # TODO: remove --features master when it is back to the default.
+        ${{ matrix.libgccjit_version.env_extra }} ./test.sh --release --features master --clean --build-sysroot --test-failing-rustc ${{ matrix.libgccjit_version.extra }} | tee output_log
         rg --text "test result" output_log >> $GITHUB_STEP_SUMMARY
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 55ee0a212142..51e8c084061c 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -114,7 +114,8 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore --cross
-        ./y.sh build --target-triple m68k-unknown-linux-gnu
+        # TODO: remove --features master when it is back to the default.
+        ./y.sh build --target-triple m68k-unknown-linux-gnu --features master
         CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu cargo test
         ./clean_all.sh
 
@@ -136,4 +137,5 @@ jobs:
 
     - name: Run tests
       run: |
-        ./test.sh --release --clean --build-sysroot ${{ matrix.commands }}
+        # TODO: remove --features master when it is back to the default.
+        ./test.sh --release --features master --clean --build-sysroot ${{ matrix.commands }}
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index ae1134177a77..de37123f951d 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -78,7 +78,8 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        EMBED_LTO_BITCODE=1 ./y.sh build --release --release-sysroot
+        # TODO: remove --features master when it is back to the default.
+        EMBED_LTO_BITCODE=1 ./y.sh build --release --release-sysroot --features master
         cargo test
         ./clean_all.sh
 
@@ -102,4 +103,5 @@ jobs:
 
     - name: Run tests
       run: |
-        EMBED_LTO_BITCODE=1 ./test.sh --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }}
+        # TODO: remove --features master when it is back to the default.
+        EMBED_LTO_BITCODE=1 ./test.sh --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }} --features master
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 28ac3cb65422..af6f399b52a9 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -92,7 +92,8 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        ./y.sh build --release --release-sysroot
+        # TODO: remove --features master when it is back to the default.
+        ./y.sh build --release --release-sysroot --features master
         cargo test
 
     - name: Clean
diff --git a/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch b/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
index 9520a5a39edc..914ae986b50e 100644
--- a/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
+++ b/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
@@ -1,6 +1,6 @@
-From 7bcd24ec6d4a96121874cb1ae5a23ea274aeff34 Mon Sep 17 00:00:00 2001
+From a5663265f797a43c502915c356fe7899c16cee92 Mon Sep 17 00:00:00 2001
 From: None <none@example.com>
-Date: Thu, 19 Oct 2023 13:12:51 -0400
+Date: Sat, 18 Nov 2023 10:50:36 -0500
 Subject: [PATCH] [core] Disable portable-simd test
 
 ---
@@ -8,18 +8,18 @@ Subject: [PATCH] [core] Disable portable-simd test
  1 file changed, 2 deletions(-)
 
 diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
-index 5814ed4..194ad4c 100644
+index d0a119c..76fdece 100644
 --- a/library/core/tests/lib.rs
 +++ b/library/core/tests/lib.rs
-@@ -90,7 +90,6 @@
+@@ -89,7 +89,6 @@
+ #![feature(never_type)]
  #![feature(unwrap_infallible)]
- #![feature(pointer_byte_offsets)]
  #![feature(pointer_is_aligned)]
 -#![feature(portable_simd)]
  #![feature(ptr_metadata)]
  #![feature(lazy_cell)]
  #![feature(unsized_tuple_coercion)]
-@@ -157,7 +156,6 @@ mod pin;
+@@ -155,7 +154,6 @@ mod pin;
  mod pin_macro;
  mod ptr;
  mod result;
@@ -28,5 +28,5 @@ index 5814ed4..194ad4c 100644
  mod str;
  mod str_lossy;
 -- 
-2.42.0
+2.42.1
 
diff --git a/rust-toolchain b/rust-toolchain
index 205ec53b425b..1962c217258a 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2023-10-21"
+channel = "nightly-2023-11-17"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From a3b6444909ef4346fc98620c739d7a466ad473d1 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 18 Nov 2023 10:56:00 -0500
Subject: [PATCH 436/997] Fix CI

---
 .github/workflows/ci.yml       |  3 ++-
 .github/workflows/failures.yml |  8 +++++---
 .github/workflows/m68k.yml     |  3 ++-
 .github/workflows/release.yml  |  3 ++-
 .github/workflows/stdarch.yml  | 11 +++++++----
 failing-ui-tests12.txt         |  1 +
 6 files changed, 19 insertions(+), 10 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 04a0017a3504..308bc55ead71 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -101,7 +101,8 @@ jobs:
         ./y.sh prepare --only-libcore
         # TODO: remove --features master when it is back to the default.
         ./y.sh build --features master
-        cargo test
+        # TODO: remove --features master when it is back to the default.
+        cargo test --features master
         ./clean_all.sh
 
     - name: Prepare dependencies
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index 7fcc0bfe75f2..ae8de79b773d 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -21,11 +21,14 @@ jobs:
         libgccjit_version:
           - gcc: "libgccjit.so"
             artifacts_branch: "master"
+            # TODO: switch back to --no-default-features in the case of libgccjit 12 when the default is to enable
+            # master again.
+            extra: "--features master"
           - gcc: "libgccjit_without_int128.so"
             artifacts_branch: "master-without-128bit-integers"
+            extra: "--features master"
           - gcc: "libgccjit12.so"
             artifacts_branch: "gcc12"
-            extra: "--no-default-features"
             # FIXME(antoyo): we need to set GCC_EXEC_PREFIX so that the linker can find the linker plugin.
             # Not sure why it's not found otherwise.
             env_extra: "TEST_FLAGS='-Cpanic=abort -Zpanic-abort-tests' GCC_EXEC_PREFIX=/usr/lib/gcc/"
@@ -125,6 +128,5 @@ jobs:
     - name: Run tests
       id: tests
       run: |
-        # TODO: remove --features master when it is back to the default.
-        ${{ matrix.libgccjit_version.env_extra }} ./test.sh --release --features master --clean --build-sysroot --test-failing-rustc ${{ matrix.libgccjit_version.extra }} | tee output_log
+        ${{ matrix.libgccjit_version.env_extra }} ./test.sh --release --clean --build-sysroot --test-failing-rustc ${{ matrix.libgccjit_version.extra }} | tee output_log
         rg --text "test result" output_log >> $GITHUB_STEP_SUMMARY
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 51e8c084061c..4d9d7e23dc2b 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -116,7 +116,8 @@ jobs:
         ./y.sh prepare --only-libcore --cross
         # TODO: remove --features master when it is back to the default.
         ./y.sh build --target-triple m68k-unknown-linux-gnu --features master
-        CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu cargo test
+        # TODO: remove --features master when it is back to the default.
+        CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu cargo test --features master
         ./clean_all.sh
 
     - name: Prepare dependencies
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index de37123f951d..43b90fcec933 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -80,7 +80,8 @@ jobs:
         ./y.sh prepare --only-libcore
         # TODO: remove --features master when it is back to the default.
         EMBED_LTO_BITCODE=1 ./y.sh build --release --release-sysroot --features master
-        cargo test
+        # TODO: remove --features master when it is back to the default.
+        cargo test --features master
         ./clean_all.sh
 
     - name: Prepare dependencies
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index af6f399b52a9..42109ba3e024 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -92,9 +92,10 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        # TODO: remove --features master when it is back to the default.
+        # TODO: remove `--features master` when it is back to the default.
         ./y.sh build --release --release-sysroot --features master
-        cargo test
+        # TODO: remove --features master when it is back to the default.
+        cargo test --features master
 
     - name: Clean
       if: ${{ !matrix.cargo_runner }}
@@ -112,12 +113,14 @@ jobs:
       uses: actions-rs/cargo@v1.0.3
       with:
         command: build
-        args: --release
+        # TODO: remove `--features master` when it is back to the default.
+        args: --release --features master
 
     - name: Run tests
       if: ${{ !matrix.cargo_runner }}
       run: |
-        ./test.sh --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore
+        # TODO: remove `--features master` when it is back to the default.
+        ./test.sh --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore --features master
 
     - name: Run stdarch tests
       if: ${{ !matrix.cargo_runner }}
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 24ef7bb8d709..4af93939b064 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -39,3 +39,4 @@ tests/ui/sse2.rs
 tests/ui/codegen/issue-79865-llvm-miscompile.rs
 tests/ui/intrinsics/intrinsics-integer.rs
 tests/ui/std-backtrace.rs
+tests/ui/mir/alignment/packed.rs

From a412e9c411ff13aaea0c88aeee0ad55690f2e2ce Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 22 Nov 2023 07:40:14 -0500
Subject: [PATCH 437/997] Update README

---
 Readme.md | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Readme.md b/Readme.md
index 95fc6374c09a..20871ceb814c 100644
--- a/Readme.md
+++ b/Readme.md
@@ -295,6 +295,9 @@ git pull origin master
 git checkout -b subtree-update_cg_gcc_YYYY-MM-DD
 PATH="$HOME/bin:$PATH" ~/bin/git-subtree pull --prefix=compiler/rustc_codegen_gcc/ https://github.com/rust-lang/rustc_codegen_gcc.git master
 git push
+
+# Immediately merge the merge commit into cg_gcc to prevent merge conflicts when syncing from rust-lang/rust later.
+PATH="$HOME/bin:$PATH" ~/bin/git-subtree push -P compiler/rustc_codegen_gcc/ ../rustc_codegen_gcc/ sync_branch_name
 ```
 
 TODO: write a script that does the above.

From cc7c9bea1546f9dc07b39feab2d1af776804ee84 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Sat, 7 Oct 2023 23:59:58 -0500
Subject: [PATCH 438/997] implement simd_bswap intrinsic

Implements lane-local byte swapping through vector shuffles.  While this
is more setup than non-vector shuffles, this implementation can shuffle
multiple integers concurrently.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 src/intrinsic/simd.rs | 54 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 85d3e7234a0e..3356d6f4a4b8 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -1,3 +1,5 @@
+use std::iter::FromIterator;
+
 use gccjit::ToRValue;
 use gccjit::{BinaryOp, RValue, Type};
 #[cfg(feature = "master")]
@@ -156,6 +158,58 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         return Ok(compare_simd_types(bx, arg1, arg2, in_elem, llret_ty, cmp_op));
     }
 
+    if name == sym::simd_bswap {
+        let vector = args[0].immediate();
+        let ret = match in_elem.kind() {
+            ty::Int(i) if i.bit_width() == Some(8) => vector,
+            ty::Uint(i) if i.bit_width() == Some(8) => vector,
+            ty::Int(_) | ty::Uint(_) => {
+                let v_type = vector.get_type();
+                let vector_type = v_type.unqualified().dyncast_vector().expect("vector type");
+                let elem_type = vector_type.get_element_type();
+                let elem_size_bytes = elem_type.get_size();
+                let type_size_bytes = elem_size_bytes as u64 * in_len;
+
+                let shuffle_indices = Vec::from_iter(0..type_size_bytes);
+                let byte_vector_type = bx.context.new_vector_type(bx.type_u8(), type_size_bytes);
+                let byte_vector = bx.context.new_bitcast(None, args[0].immediate(), byte_vector_type);
+
+                #[cfg(not(feature = "master"))]
+                let shuffled = {
+                    let new_elements: Vec<_> = shuffle_indices.chunks_exact(elem_size_bytes as _)
+                        .flat_map(|x| x.iter().rev())
+                        .map(|&i| {
+                            let index = bx.context.new_rvalue_from_long(bx.u64_type, i as _);
+                            bx.extract_element(byte_vector, index)
+                        })
+                        .collect();
+
+                    bx.context.new_rvalue_from_vector(None, byte_vector_type, &new_elements)
+                };
+                #[cfg(feature = "master")]
+                let shuffled = {
+                    let indices: Vec<_> = shuffle_indices.chunks_exact(elem_size_bytes as _)
+                        .flat_map(|x| x.iter().rev())
+                        .map(|&i| bx.context.new_rvalue_from_int(bx.u8_type, i as _))
+                        .collect();
+
+                    let mask = bx.context.new_rvalue_from_vector(None, byte_vector_type, &indices);
+                    bx.context.new_rvalue_vector_perm(None, byte_vector, byte_vector, mask)
+                };
+                bx.context.new_bitcast(None, shuffled, v_type)
+            }
+            _ => {
+                return_error!(InvalidMonomorphization::UnsupportedOperation {
+                    span,
+                    name,
+                    in_ty,
+                    in_elem,
+                });
+            }
+        };
+        return Ok(ret);
+    }
+
     if name == sym::simd_shuffle {
         // Make sure this is actually an array, since typeck only checks the length-suffixed
         // version of this intrinsic.

From 6d13f949ee67dbed3ee9a1da5533d3a55c03e774 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Thu, 9 Nov 2023 19:49:06 -0600
Subject: [PATCH 439/997] remove generic-bswap-byte from failing test list

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 failing-ui-tests.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 22044eabe969..4b2c3f64a176 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -57,7 +57,6 @@ tests/ui/coroutine/panic-safe.rs
 tests/ui/issues/issue-14875.rs
 tests/ui/issues/issue-29948.rs
 tests/ui/panics/nested_panic_caught.rs
-tests/ui/simd/intrinsic/generic-bswap-byte.rs
 tests/ui/const_prop/ice-issue-111353.rs
 tests/ui/process/println-with-broken-pipe.rs
 tests/ui/panic-runtime/lto-abort.rs

From 70586a23a7fbe5b78752438587db86678f53ee2f Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Sun, 8 Oct 2023 00:13:10 -0500
Subject: [PATCH 440/997] fix simd_frem intrinsic implementation

The simd intrinsic handler was delegating implementation of `simd_frem`
to `Builder::frem`, which wasn't able to handle vector-typed inputs.  To
fix this, teach this method how to handle vector inputs.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 src/builder.rs | 21 +++++++++++++++++++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index b8a8c144dc90..4ae56a41e529 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -606,12 +606,29 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         //     ../../../gcc/gcc/cfgexpand.cc:6069
         // 0x7f0101bf9194 execute
         //     ../../../gcc/gcc/cfgexpand.cc:6795
-        if a.get_type().is_compatible_with(self.cx.float_type) {
+        let a_type = a.get_type();
+        let a_type_unqualified = a_type.unqualified();
+        if a_type.is_compatible_with(self.cx.float_type) {
             let fmodf = self.context.get_builtin_function("fmodf");
             // FIXME(antoyo): this seems to produce the wrong result.
             return self.context.new_call(None, fmodf, &[a, b]);
         }
-        assert_eq!(a.get_type().unqualified(), self.cx.double_type);
+        else if let Some(vector_type) = a_type_unqualified.dyncast_vector() {
+            assert_eq!(a_type_unqualified, b.get_type().unqualified());
+
+            let num_units = vector_type.get_num_units();
+            let new_elements: Vec<_> = (0..num_units)
+                .map(|i| {
+                    let index = self.context.new_rvalue_from_long(self.cx.type_u32(), i as _);
+                    let x = self.extract_element(a, index).to_rvalue();
+                    let y = self.extract_element(b, index).to_rvalue();
+                    self.frem(x, y)
+                })
+                .collect();
+
+            return self.context.new_rvalue_from_vector(None, a_type, &new_elements)
+        }
+        assert_eq!(a_type_unqualified, self.cx.double_type);
 
         let fmod = self.context.get_builtin_function("fmod");
         return self.context.new_call(None, fmod, &[a, b]);

From 8d42a82b6e86b30e9a18cd12e2a89fd7b261bdd3 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Sun, 8 Oct 2023 18:49:16 -0500
Subject: [PATCH 441/997] impl simd_bitreverse intrinsic

If we're running against a patched libgccjit, use an algorithm similar
to what LLVM uses for this intrinsic.  Otherwise, fallback to a
per-element bitreverse.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 src/intrinsic/simd.rs | 215 +++++++++++++++++++++++++++++++++---------
 1 file changed, 169 insertions(+), 46 deletions(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 3356d6f4a4b8..2469e8d4c62e 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -23,6 +23,8 @@ use rustc_target::abi::Align;
 use crate::builder::Builder;
 #[cfg(feature = "master")]
 use crate::context::CodegenCx;
+#[cfg(not(feature = "master"))]
+use crate::common::SignType;
 
 pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
     bx: &mut Builder<'a, 'gcc, 'tcx>,
@@ -158,56 +160,177 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         return Ok(compare_simd_types(bx, arg1, arg2, in_elem, llret_ty, cmp_op));
     }
 
-    if name == sym::simd_bswap {
-        let vector = args[0].immediate();
-        let ret = match in_elem.kind() {
-            ty::Int(i) if i.bit_width() == Some(8) => vector,
-            ty::Uint(i) if i.bit_width() == Some(8) => vector,
-            ty::Int(_) | ty::Uint(_) => {
-                let v_type = vector.get_type();
-                let vector_type = v_type.unqualified().dyncast_vector().expect("vector type");
-                let elem_type = vector_type.get_element_type();
-                let elem_size_bytes = elem_type.get_size();
-                let type_size_bytes = elem_size_bytes as u64 * in_len;
+    let simd_bswap = |bx: &mut Builder<'a, 'gcc, 'tcx>, vector: RValue<'gcc>| -> RValue<'gcc> {
+        let v_type = vector.get_type();
+        let vector_type = v_type.unqualified().dyncast_vector().expect("vector type");
+        let elem_type = vector_type.get_element_type();
+        let elem_size_bytes = elem_type.get_size();
+        if elem_size_bytes == 1 {
+            return vector;
+        }
 
-                let shuffle_indices = Vec::from_iter(0..type_size_bytes);
-                let byte_vector_type = bx.context.new_vector_type(bx.type_u8(), type_size_bytes);
-                let byte_vector = bx.context.new_bitcast(None, args[0].immediate(), byte_vector_type);
+        let type_size_bytes = elem_size_bytes as u64 * in_len;
+        let shuffle_indices = Vec::from_iter(0..type_size_bytes);
+        let byte_vector_type = bx.context.new_vector_type(bx.type_u8(), type_size_bytes);
+        let byte_vector = bx.context.new_bitcast(None, args[0].immediate(), byte_vector_type);
 
-                #[cfg(not(feature = "master"))]
-                let shuffled = {
-                    let new_elements: Vec<_> = shuffle_indices.chunks_exact(elem_size_bytes as _)
-                        .flat_map(|x| x.iter().rev())
-                        .map(|&i| {
-                            let index = bx.context.new_rvalue_from_long(bx.u64_type, i as _);
-                            bx.extract_element(byte_vector, index)
-                        })
-                        .collect();
+        #[cfg(not(feature = "master"))]
+        let shuffled = {
+            let new_elements: Vec<_> = shuffle_indices.chunks_exact(elem_size_bytes as _)
+                .flat_map(|x| x.iter().rev())
+                .map(|&i| {
+                    let index = bx.context.new_rvalue_from_long(bx.u64_type, i as _);
+                    bx.extract_element(byte_vector, index)
+                })
+                .collect();
 
-                    bx.context.new_rvalue_from_vector(None, byte_vector_type, &new_elements)
-                };
-                #[cfg(feature = "master")]
-                let shuffled = {
-                    let indices: Vec<_> = shuffle_indices.chunks_exact(elem_size_bytes as _)
-                        .flat_map(|x| x.iter().rev())
-                        .map(|&i| bx.context.new_rvalue_from_int(bx.u8_type, i as _))
-                        .collect();
-
-                    let mask = bx.context.new_rvalue_from_vector(None, byte_vector_type, &indices);
-                    bx.context.new_rvalue_vector_perm(None, byte_vector, byte_vector, mask)
-                };
-                bx.context.new_bitcast(None, shuffled, v_type)
-            }
-            _ => {
-                return_error!(InvalidMonomorphization::UnsupportedOperation {
-                    span,
-                    name,
-                    in_ty,
-                    in_elem,
-                });
-            }
+            bx.context.new_rvalue_from_vector(None, byte_vector_type, &new_elements)
         };
-        return Ok(ret);
+        #[cfg(feature = "master")]
+        let shuffled = {
+            let indices: Vec<_> = shuffle_indices.chunks_exact(elem_size_bytes as _)
+                .flat_map(|x| x.iter().rev())
+                .map(|&i| bx.context.new_rvalue_from_int(bx.u8_type, i as _))
+                .collect();
+
+            let mask = bx.context.new_rvalue_from_vector(None, byte_vector_type, &indices);
+            bx.context.new_rvalue_vector_perm(None, byte_vector, byte_vector, mask)
+        };
+        bx.context.new_bitcast(None, shuffled, v_type)
+    };
+
+    if name == sym::simd_bswap || name == sym::simd_bitreverse {
+        require!(
+            bx.type_kind(bx.element_type(llret_ty)) == TypeKind::Integer,
+            InvalidMonomorphization::UnsupportedOperation {
+                span,
+                name,
+                in_ty,
+                in_elem,
+            }
+        );
+    }
+
+    if name == sym::simd_bswap {
+        return Ok(simd_bswap(bx, args[0].immediate()));
+    }
+
+    // We use a different algorithm from non-vector bitreverse to take advantage of most
+    // processors' vector shuffle units.  It works like this:
+    // 1. Generate pre-reversed low and high nibbles as a vector.
+    // 2. Byte-swap the input.
+    // 3. Mask off the low and high nibbles of each byte in the byte-swapped input.
+    // 4. Shuffle the pre-reversed low and high-nibbles using the masked nibbles as a shuffle mask.
+    // 5. Combine the results of the shuffle back together and cast back to the original type.
+    #[cfg(feature = "master")]
+    if name == sym::simd_bitreverse {
+        let vector = args[0].immediate();
+        let v_type = vector.get_type();
+        let vector_type = v_type.unqualified().dyncast_vector().expect("vector type");
+        let elem_type = vector_type.get_element_type();
+        let elem_size_bytes = elem_type.get_size();
+
+        let type_size_bytes = elem_size_bytes as u64 * in_len;
+        // We need to ensure at least 16 entries in our vector type, since the pre-reversed vectors
+        // we generate below have 16 entries in them.  `new_rvalue_vector_perm` requires the mask
+        // vector to be of the same length as the source vectors.
+        let byte_vector_type_size = type_size_bytes.max(16);
+
+        let byte_vector_type = bx.context.new_vector_type(bx.u8_type, type_size_bytes);
+        let long_byte_vector_type = bx.context.new_vector_type(bx.u8_type, byte_vector_type_size);
+
+        // Step 1: Generate pre-reversed low and high nibbles as a vector.
+        let zero_byte = bx.context.new_rvalue_zero(bx.u8_type);
+        let hi_nibble_elements: Vec<_> = (0u8..16)
+            .map(|x| bx.context.new_rvalue_from_int(bx.u8_type, x.reverse_bits() as _))
+            .chain((16..byte_vector_type_size).map(|_| zero_byte))
+            .collect();
+        let hi_nibble = bx.context.new_rvalue_from_vector(None, long_byte_vector_type, &hi_nibble_elements);
+
+        let lo_nibble_elements: Vec<_> = (0u8..16)
+            .map(|x| bx.context.new_rvalue_from_int(bx.u8_type, (x.reverse_bits() >> 4) as _))
+            .chain((16..byte_vector_type_size).map(|_| zero_byte))
+            .collect();
+        let lo_nibble = bx.context.new_rvalue_from_vector(None, long_byte_vector_type, &lo_nibble_elements);
+
+        let mask = bx.context.new_rvalue_from_vector(
+            None,
+            long_byte_vector_type,
+            &vec![bx.context.new_rvalue_from_int(bx.u8_type, 0x0f); byte_vector_type_size as _]);
+
+        let four_vec = bx.context.new_rvalue_from_vector(
+            None,
+            long_byte_vector_type,
+            &vec![bx.context.new_rvalue_from_int(bx.u8_type, 4); byte_vector_type_size as _]);
+
+        // Step 2: Byte-swap the input.
+        let swapped = simd_bswap(bx, args[0].immediate());
+        let byte_vector = bx.context.new_bitcast(None, swapped, byte_vector_type);
+
+        // We're going to need to extend the vector with zeros to make sure that the types are the
+        // same, since that's what new_rvalue_vector_perm expects.
+        let byte_vector = if byte_vector_type_size > type_size_bytes {
+            let mut byte_vector_elements = Vec::with_capacity(byte_vector_type_size as _);
+            for i in 0..type_size_bytes {
+                let idx = bx.context.new_rvalue_from_int(bx.u32_type, i as _);
+                let val = bx.extract_element(byte_vector, idx);
+                byte_vector_elements.push(val);
+            }
+            for _ in type_size_bytes..byte_vector_type_size {
+                byte_vector_elements.push(zero_byte);
+            }
+            bx.context.new_rvalue_from_vector(None, long_byte_vector_type, &byte_vector_elements)
+        } else {
+            bx.context.new_bitcast(None, byte_vector, long_byte_vector_type)
+        };
+
+        // Step 3: Mask off the low and high nibbles of each byte in the byte-swapped input.
+        let masked_hi = (byte_vector >> four_vec) & mask;
+        let masked_lo = byte_vector & mask;
+
+        // Step 4: Shuffle the pre-reversed low and high-nibbles using the masked nibbles as a shuffle mask.
+        let hi = bx.context.new_rvalue_vector_perm(None, hi_nibble, hi_nibble, masked_lo);
+        let lo = bx.context.new_rvalue_vector_perm(None, lo_nibble, lo_nibble, masked_hi);
+
+        // Step 5: Combine the results of the shuffle back together and cast back to the original type.
+        let result = hi | lo;
+        let cast_ty = bx.context.new_vector_type(elem_type, byte_vector_type_size / (elem_size_bytes as u64));
+
+        // we might need to truncate if sizeof(v_type) < sizeof(cast_type)
+        if type_size_bytes < byte_vector_type_size {
+            let cast_result = bx.context.new_bitcast(None, result, cast_ty);
+            let elems: Vec<_> = (0..in_len)
+                .map(|i| {
+                    let idx = bx.context.new_rvalue_from_int(bx.u32_type, i as _);
+                    bx.extract_element(cast_result, idx)
+                })
+                .collect();
+            return Ok(bx.context.new_rvalue_from_vector(None, v_type, &elems))
+        } else {
+            // avoid the unnecessary truncation as an optimization.
+            return Ok(bx.context.new_bitcast(None, result, v_type));
+        }
+    }
+    // since gcc doesn't have vector shuffle methods available in non-patched builds, fallback to
+    // component-wise bitreverses if they're not available.
+    #[cfg(not(feature = "master"))]
+    if name == sym::simd_bitreverse {
+        let vector = args[0].immediate();
+        let vector_ty = vector.get_type();
+        let vector_type = vector_ty.unqualified().dyncast_vector().expect("vector type");
+        let num_elements = vector_type.get_num_units();
+
+        let elem_type = vector_type.get_element_type();
+        let elem_size_bytes = elem_type.get_size();
+        let num_type = elem_type.to_unsigned(bx.cx);
+        let new_elements: Vec<_> = (0..num_elements)
+            .map(|idx| {
+                let index = bx.context.new_rvalue_from_long(num_type, idx as _);
+                let extracted_value = bx.extract_element(vector, index).to_rvalue();
+                bx.bit_reverse(elem_size_bytes as u64 * 8, extracted_value)
+            })
+            .collect();
+        return Ok(bx.context.new_rvalue_from_vector(None, vector_ty, &new_elements));
     }
 
     if name == sym::simd_shuffle {

From 03e11a214e9b6295bb06a53f849b117e75986cf6 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Thu, 19 Oct 2023 20:01:22 -0500
Subject: [PATCH 442/997] impl simd_ctlz/simd_cttz intrinsic

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 src/intrinsic/simd.rs | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 2469e8d4c62e..5991f061c10c 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -333,6 +333,22 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         return Ok(bx.context.new_rvalue_from_vector(None, vector_ty, &new_elements));
     }
 
+    if name == sym::simd_ctlz || name == sym::simd_cttz {
+        let vector = args[0].immediate();
+        let elements: Vec<_> = (0..in_len)
+            .map(|i| {
+                let index = bx.context.new_rvalue_from_long(bx.i32_type, i as i64);
+                let value = bx.extract_element(vector, index).to_rvalue();
+                if name == sym::simd_ctlz {
+                    bx.count_leading_zeroes(value.get_type().get_size() as u64 * 8, value)
+                } else {
+                    bx.count_trailing_zeroes(value.get_type().get_size() as u64 * 8, value)
+                }
+            })
+            .collect();
+        return Ok(bx.context.new_rvalue_from_vector(None, vector.get_type(), &elements));
+    }
+
     if name == sym::simd_shuffle {
         // Make sure this is actually an array, since typeck only checks the length-suffixed
         // version of this intrinsic.

From 3a221320eb49bf464fd332c2be244ca3a783d1ac Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Thu, 9 Nov 2023 19:07:44 -0600
Subject: [PATCH 443/997] fix simd_neg implementation for ints

gcc_not would panic upon encountering a vector type, which is not what
we want here.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 src/int.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/int.rs b/src/int.rs
index 9b9b3ea4f870..b69e073c4d94 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -48,7 +48,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
     pub fn gcc_neg(&self, a: RValue<'gcc>) -> RValue<'gcc> {
         let a_type = a.get_type();
-        if self.is_native_int_type(a_type) {
+        if self.is_native_int_type(a_type) || a_type.is_vector() {
             self.cx.context.new_unary_op(None, UnaryOp::Minus, a.get_type(), a)
         }
         else {

From 17b2c46c8896adf07ae8f70b0d8b70227b5f4c71 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Thu, 9 Nov 2023 19:49:34 -0600
Subject: [PATCH 444/997] remove generic-arithmetic-pass from failing tests

This test now passes when tested with a patched libgccjit.  However, due
to [some compiler bugs][1], we can't enable this for non-patched
libgccjit yet.

[1]: https://github.com/sadlerap/rustc_codegen_gcc/actions/runs/6820180639/job/18548672444#step:15:4375

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 failing-ui-tests.txt   | 1 -
 failing-ui-tests12.txt | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/failing-ui-tests.txt b/failing-ui-tests.txt
index 4b2c3f64a176..023fe9d7e831 100644
--- a/failing-ui-tests.txt
+++ b/failing-ui-tests.txt
@@ -13,7 +13,6 @@ tests/ui/sepcomp/sepcomp-extern.rs
 tests/ui/sepcomp/sepcomp-fns-backwards.rs
 tests/ui/sepcomp/sepcomp-fns.rs
 tests/ui/sepcomp/sepcomp-statics.rs
-tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
 tests/ui/asm/x86_64/may_unwind.rs
 tests/ui/backtrace.rs
 tests/ui/catch-unwind-bang.rs
diff --git a/failing-ui-tests12.txt b/failing-ui-tests12.txt
index 24ef7bb8d709..fef259c53f49 100644
--- a/failing-ui-tests12.txt
+++ b/failing-ui-tests12.txt
@@ -9,6 +9,7 @@ tests/ui/packed/packed-struct-vec.rs
 tests/ui/packed/packed-tuple-struct-layout.rs
 tests/ui/simd/array-type.rs
 tests/ui/simd/intrinsic/float-minmax-pass.rs
+tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
 tests/ui/simd/intrinsic/generic-arithmetic-saturating-pass.rs
 tests/ui/simd/intrinsic/generic-as.rs
 tests/ui/simd/intrinsic/generic-cast-pass.rs

From bb4d0be014957067ea1386948fc1d691fff64918 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 2 Dec 2023 16:28:28 +0100
Subject: [PATCH 445/997] Fix build instructions

---
 Readme.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Readme.md b/Readme.md
index 20871ceb814c..9db1dec10323 100644
--- a/Readme.md
+++ b/Readme.md
@@ -59,13 +59,13 @@ Then you can run commands like this:
 
 ```bash
 $ ./y.sh prepare # download and patch sysroot src and install hyperfine for benchmarking
-$ LIBRARY_PATH=$(cat gcc_path) LD_LIBRARY_PATH=$(cat gcc_path) ./y.sh build --release
+$ LIBRARY_PATH=$(cat gcc_path) LD_LIBRARY_PATH=$(cat gcc_path) ./y.sh build --release --features master
 ```
 
 To run the tests:
 
 ```bash
-$ ./test.sh --release
+$ ./test.sh --release --features master
 ```
 
 ## Usage

From 04f32f2016495ec8aabf6ba00b47a5665811eae6 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 13 Nov 2023 16:05:35 +0100
Subject: [PATCH 446/997] Allow rustfmt to run on `build_system`

---
 .rustfmt.toml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.rustfmt.toml b/.rustfmt.toml
index c7ad93bafe36..87f034950e3b 100644
--- a/.rustfmt.toml
+++ b/.rustfmt.toml
@@ -1 +1 @@
-disable_all_formatting = true
+ignore = ["/src", "/tests"]

From 7b76ac4eb74f3cf8e0d616b82f8135fd7fd7ccab Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 8 Nov 2023 17:31:56 +0100
Subject: [PATCH 447/997] Rustify `test.sh`

---
 build_system/src/build.rs   |  128 ++--
 build_system/src/config.rs  |  330 ++++++----
 build_system/src/prepare.rs |   18 +-
 build_system/src/test.rs    | 1143 ++++++++++++++++++++++++++++++++++-
 build_system/src/utils.rs   |  104 +++-
 5 files changed, 1518 insertions(+), 205 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index f1c3701a946e..6390458d4fd0 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -1,7 +1,5 @@
-use crate::config::{set_config, ConfigInfo};
-use crate::utils::{
-    get_gcc_path, run_command, run_command_with_output_and_env, walk_dir,
-};
+use crate::config::ConfigInfo;
+use crate::utils::{get_gcc_path, run_command, run_command_with_output_and_env, walk_dir};
 use std::collections::HashMap;
 use std::ffi::OsStr;
 use std::fs;
@@ -10,10 +8,9 @@ use std::path::Path;
 #[derive(Default)]
 struct BuildArg {
     codegen_release_channel: bool,
-    sysroot_release_channel: bool,
-    sysroot_panic_abort: bool,
     flags: Vec<String>,
     gcc_path: String,
+    config_info: ConfigInfo,
 }
 
 impl BuildArg {
@@ -29,13 +26,9 @@ impl BuildArg {
         while let Some(arg) = args.next() {
             match arg.as_str() {
                 "--release" => build_arg.codegen_release_channel = true,
-                "--release-sysroot" => build_arg.sysroot_release_channel = true,
                 "--no-default-features" => {
                     build_arg.flags.push("--no-default-features".to_string());
                 }
-                "--sysroot-panic-abort" => {
-                    build_arg.sysroot_panic_abort = true;
-                },
                 "--features" => {
                     if let Some(arg) = args.next() {
                         build_arg.flags.push("--features".to_string());
@@ -63,12 +56,14 @@ impl BuildArg {
                     if args.next().is_some() {
                         // Handled in config.rs.
                     } else {
-                        return Err(
-                            "Expected a value after `--target`, found nothing".to_string()
-                        );
+                        return Err("Expected a value after `--target`, found nothing".to_string());
+                    }
+                }
+                arg => {
+                    if !build_arg.config_info.parse_argument(arg, &mut args)? {
+                        return Err(format!("Unknown argument `{}`", arg));
                     }
                 }
-                arg => return Err(format!("Unknown argument `{}`", arg)),
             }
         }
         Ok(Some(build_arg))
@@ -80,28 +75,26 @@ impl BuildArg {
 `build` command help:
 
     --release              : Build codegen in release mode
-    --release-sysroot      : Build sysroot in release mode
-    --sysroot-panic-abort  : Build the sysroot without unwinding support.
     --no-default-features  : Add `--no-default-features` flag
-    --features [arg]       : Add a new feature [arg]
-    --target-triple [arg]  : Set the target triple to [arg]
-    --help                 : Show this help
-"#
-        )
+    --features [arg]       : Add a new feature [arg]"#
+        );
+        ConfigInfo::show_usage();
+        println!("    --help                 : Show this help");
     }
 }
 
-fn build_sysroot(
-    env: &mut HashMap<String, String>,
-    args: &BuildArg,
+fn build_sysroot_inner(
+    env: &HashMap<String, String>,
+    sysroot_panic_abort: bool,
+    sysroot_release_channel: bool,
     config: &ConfigInfo,
+    start_dir: Option<&Path>,
 ) -> Result<(), String> {
-    std::env::set_current_dir("build_sysroot")
-        .map_err(|error| format!("Failed to go to `build_sysroot` directory: {:?}", error))?;
+    let start_dir = start_dir.unwrap_or_else(|| Path::new("."));
     // Cleanup for previous run
     // Clean target dir except for build scripts and incremental cache
     let _ = walk_dir(
-        "target",
+        start_dir.join("target"),
         |dir: &Path| {
             for top in &["debug", "release"] {
                 let _ = fs::remove_dir_all(dir.join(top).join("build"));
@@ -138,23 +131,22 @@ fn build_sysroot(
         |_| Ok(()),
     );
 
-    let _ = fs::remove_file("Cargo.lock");
-    let _ = fs::remove_file("test_target/Cargo.lock");
-    let _ = fs::remove_dir_all("sysroot");
+    let _ = fs::remove_file(start_dir.join("Cargo.lock"));
+    let _ = fs::remove_file(start_dir.join("test_target/Cargo.lock"));
+    let _ = fs::remove_dir_all(start_dir.join("sysroot"));
 
     // Builds libs
-    let mut rustflags = env
-        .get("RUSTFLAGS")
-        .cloned()
-        .unwrap_or_default();
-    if args.sysroot_panic_abort {
+    let mut rustflags = env.get("RUSTFLAGS").cloned().unwrap_or_default();
+    if sysroot_panic_abort {
         rustflags.push_str(" -Cpanic=abort -Zpanic-abort-tests");
     }
-    env.insert(
-        "RUSTFLAGS".to_string(),
-        format!("{} -Zmir-opt-level=3", rustflags),
-    );
-    let channel = if args.sysroot_release_channel {
+    rustflags.push_str(" -Z force-unstable-if-unmarked");
+    let channel = if sysroot_release_channel {
+        let mut env = env.clone();
+        env.insert(
+            "RUSTFLAGS".to_string(),
+            format!("{} -Zmir-opt-level=3", rustflags),
+        );
         run_command_with_output_and_env(
             &[
                 &"cargo",
@@ -163,33 +155,34 @@ fn build_sysroot(
                 &config.target,
                 &"--release",
             ],
-            None,
+            Some(start_dir),
             Some(&env),
         )?;
         "release"
     } else {
         run_command_with_output_and_env(
-            &[
-                &"cargo",
-                &"build",
-                &"--target",
-                &config.target,
-            ],
-            None,
+            &[&"cargo", &"build", &"--target", &config.target],
+            Some(start_dir),
             Some(env),
         )?;
         "debug"
     };
 
     // Copy files to sysroot
-    let sysroot_path = format!("sysroot/lib/rustlib/{}/lib/", config.target_triple);
-    fs::create_dir_all(&sysroot_path)
-        .map_err(|error| format!("Failed to create directory `{}`: {:?}", sysroot_path, error))?;
+    let sysroot_path = start_dir.join(format!("sysroot/lib/rustlib/{}/lib/", config.target_triple));
+    fs::create_dir_all(&sysroot_path).map_err(|error| {
+        format!(
+            "Failed to create directory `{}`: {:?}",
+            sysroot_path.display(),
+            error
+        )
+    })?;
     let copier = |dir_to_copy: &Path| {
+        // FIXME: should not use shell command!
         run_command(&[&"cp", &"-r", &dir_to_copy, &sysroot_path], None).map(|_| ())
     };
     walk_dir(
-        &format!("target/{}/{}/deps", config.target_triple, channel),
+        start_dir.join(&format!("target/{}/{}/deps", config.target_triple, channel)),
         copier,
         copier,
     )?;
@@ -203,7 +196,22 @@ fn build_sysroot(
     Ok(())
 }
 
-fn build_codegen(args: &BuildArg) -> Result<(), String> {
+pub fn build_sysroot(
+    env: &HashMap<String, String>,
+    sysroot_panic_abort: bool,
+    sysroot_release_channel: bool,
+    config: &ConfigInfo,
+) -> Result<(), String> {
+    build_sysroot_inner(
+        env,
+        sysroot_panic_abort,
+        sysroot_release_channel,
+        config,
+        Some(Path::new("build_sysroot")),
+    )
+}
+
+fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     let mut env = HashMap::new();
 
     env.insert("LD_LIBRARY_PATH".to_string(), args.gcc_path.clone());
@@ -223,7 +231,8 @@ fn build_codegen(args: &BuildArg) -> Result<(), String> {
     }
     run_command_with_output_and_env(&command, None, Some(&env))?;
 
-    let config = set_config(&mut env, &[], Some(&args.gcc_path))?;
+    args.config_info
+        .setup(&mut env, &[], Some(&args.gcc_path))?;
 
     // We voluntarily ignore the error.
     let _ = fs::remove_dir_all("target/out");
@@ -237,18 +246,19 @@ fn build_codegen(args: &BuildArg) -> Result<(), String> {
 
     println!("[BUILD] sysroot");
     build_sysroot(
-        &mut env,
-        args,
-        &config,
+        &env,
+        args.config_info.sysroot_panic_abort,
+        args.config_info.sysroot_release_channel,
+        &args.config_info,
     )?;
     Ok(())
 }
 
 pub fn run() -> Result<(), String> {
-    let args = match BuildArg::new()? {
+    let mut args = match BuildArg::new()? {
         Some(args) => args,
         None => return Ok(()),
     };
-    build_codegen(&args)?;
+    build_codegen(&mut args)?;
     Ok(())
 }
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 64d9bd73e01a..763cac8edb66 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -1,149 +1,229 @@
-use crate::utils::{get_gcc_path, get_os_name, get_rustc_host_triple};
+use crate::utils::{get_gcc_path, get_os_name, rustc_version_info, split_args};
 use std::collections::HashMap;
 use std::env as std_env;
 
+#[derive(Default)]
 pub struct ConfigInfo {
     pub target: String,
     pub target_triple: String,
+    pub host_triple: String,
     pub rustc_command: Vec<String>,
+    pub run_in_vm: bool,
+    pub cargo_target_dir: String,
+    pub dylib_ext: String,
+    pub sysroot_release_channel: bool,
+    pub sysroot_panic_abort: bool,
 }
 
-// Returns the beginning for the command line of rustc.
-pub fn set_config(
-    env: &mut HashMap<String, String>,
-    test_flags: &[String],
-    gcc_path: Option<&str>,
-) -> Result<ConfigInfo, String> {
-    env.insert("CARGO_INCREMENTAL".to_string(), "0".to_string());
-
-    let gcc_path = match gcc_path {
-        Some(path) => path.to_string(),
-        None => get_gcc_path()?,
-    };
-    env.insert("GCC_PATH".to_string(), gcc_path.clone());
-
-    let os_name = get_os_name()?;
-    let dylib_ext = match os_name.as_str() {
-        "Linux" => "so",
-        "Darwin" => "dylib",
-        os => return Err(format!("unsupported OS `{}`", os)),
-    };
-    let host_triple = get_rustc_host_triple()?;
-    let mut linker = None;
-    let mut target_triple = host_triple.clone();
-    let mut target = target_triple.clone();
-
-    // We skip binary name and the command.
-    let mut args = std::env::args().skip(2);
-
-    let mut set_target_triple = false;
-    let mut set_target = false;
-    while let Some(arg) = args.next() {
-        match arg.as_str() {
-            "--target-triple" => {
-                if let Some(arg) = args.next() {
-                    target_triple = arg;
-                    set_target_triple = true;
-                } else {
+impl ConfigInfo {
+    /// Returns `true` if the argument was taken into account.
+    pub fn parse_argument(
+        &mut self,
+        arg: &str,
+        args: &mut impl Iterator<Item = String>,
+    ) -> Result<bool, String> {
+        match arg {
+            "--target-triple" => match args.next() {
+                Some(arg) if !arg.is_empty() => self.target_triple = arg.to_string(),
+                _ => {
                     return Err(
                         "Expected a value after `--target-triple`, found nothing".to_string()
-                    );
+                    )
                 }
             },
-            "--target" => {
-                if let Some(arg) = args.next() {
-                    target = arg;
-                    set_target = true;
-                } else {
-                    return Err(
-                        "Expected a value after `--target`, found nothing".to_string()
-                    );
-                }
+            "--target" => match args.next() {
+                Some(arg) if !arg.is_empty() => self.target = arg.to_string(),
+                _ => return Err("Expected a value after `--target`, found nothing".to_string()),
             },
-            _ => (),
+            "--out-dir" => match args.next() {
+                Some(arg) if !arg.is_empty() => {
+                    // env.insert("CARGO_TARGET_DIR".to_string(), arg.to_string());
+                    self.cargo_target_dir = arg.to_string();
+                }
+                _ => return Err("Expected a value after `--out-dir`, found nothing".to_string()),
+            },
+            "--release-sysroot" => self.sysroot_release_channel = true,
+            "--sysroot-panic-abort" => self.sysroot_panic_abort = true,
+            _ => return Ok(false),
         }
+        Ok(true)
     }
 
-    if set_target_triple && !set_target {
-        target = target_triple.clone();
-    }
+    pub fn setup(
+        &mut self,
+        env: &mut HashMap<String, String>,
+        test_flags: &[String],
+        gcc_path: Option<&str>,
+    ) -> Result<(), String> {
+        env.insert("CARGO_INCREMENTAL".to_string(), "0".to_string());
 
-    if host_triple != target_triple {
-        linker = Some(format!("-Clinker={}-gcc", target_triple));
-    }
-    let current_dir =
-        std_env::current_dir().map_err(|error| format!("`current_dir` failed: {:?}", error))?;
-    let channel = if let Some(channel) = env.get("CHANNEL") {
-        channel.as_str()
-    } else {
-        "debug"
-    };
-    let cg_backend_path = current_dir
-        .join("target")
-        .join(channel)
-        .join(&format!("librustc_codegen_gcc.{}", dylib_ext));
-    let sysroot_path = current_dir.join("build_sysroot/sysroot");
-    let mut rustflags = Vec::new();
-    if let Some(cg_rustflags) = env.get("CG_RUSTFLAGS") {
-        rustflags.push(cg_rustflags.clone());
-    }
-    if let Some(linker) = linker {
-        rustflags.push(linker.to_string());
-    }
-    rustflags.extend_from_slice(&[
-        "-Csymbol-mangling-version=v0".to_string(),
-        "-Cdebuginfo=2".to_string(),
-        format!("-Zcodegen-backend={}", cg_backend_path.display()),
-        "--sysroot".to_string(),
-        sysroot_path.display().to_string(),
-    ]);
+        let gcc_path = match gcc_path {
+            Some(path) => path.to_string(),
+            None => get_gcc_path()?,
+        };
+        env.insert("GCC_PATH".to_string(), gcc_path.clone());
 
-    // Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
-    // TODO(antoyo): remove when we can handle ThinLTO.
-    if !env.contains_key(&"FAT_LTO".to_string()) {
-        rustflags.push("-Clto=off".to_string());
-    }
-    rustflags.extend_from_slice(test_flags);
-    // FIXME(antoyo): remove once the atomic shim is gone
-    if os_name == "Darwin" {
+        if self.cargo_target_dir.is_empty() {
+            match env.get("CARGO_TARGET_DIR").filter(|dir| !dir.is_empty()) {
+                Some(cargo_target_dir) => self.cargo_target_dir = cargo_target_dir.clone(),
+                None => self.cargo_target_dir = "target/out".to_string(),
+            }
+        }
+
+        let os_name = get_os_name()?;
+        self.dylib_ext = match os_name.as_str() {
+            "Linux" => "so",
+            "Darwin" => "dylib",
+            os => return Err(format!("unsupported OS `{}`", os)),
+        }
+        .to_string();
+        let rustc = match env.get("RUSTC") {
+            Some(r) if !r.is_empty() => r.to_string(),
+            _ => "rustc".to_string(),
+        };
+        self.host_triple = rustc_version_info(Some(&rustc))?.host.unwrap_or_default();
+
+        if !self.target_triple.is_empty() && self.target.is_empty() {
+            self.target = self.target_triple.clone();
+        }
+        if self.target.is_empty() {
+            self.target = self.host_triple.clone();
+        }
+        if self.target_triple.is_empty() {
+            self.target_triple = self.host_triple.clone();
+        }
+
+        let mut linker = None;
+
+        if self.host_triple != self.target_triple {
+            if self.target_triple == "m68k-unknown-linux-gnu" {
+                linker = Some("-Clinker=m68k-unknown-linux-gnu-gcc".to_string());
+            } else if self.target_triple == "aarch64-unknown-linux-gnu" {
+                // We are cross-compiling for aarch64. Use the correct linker and run tests in qemu.
+                linker = Some("-Clinker=aarch64-linux-gnu-gcc".to_string());
+            } else {
+                return Err("Unknown non-native platform".to_string());
+            }
+
+            self.run_in_vm = true;
+        }
+
+        let current_dir =
+            std_env::current_dir().map_err(|error| format!("`current_dir` failed: {:?}", error))?;
+        let channel = if let Some(channel) = env.get("CHANNEL") {
+            channel.as_str()
+        } else {
+            "debug"
+        };
+
+        let has_builtin_backend = env
+            .get("BUILTIN_BACKEND")
+            .map(|backend| !backend.is_empty())
+            .unwrap_or(false);
+        let cg_backend_path;
+
+        let mut rustflags = Vec::new();
+        if has_builtin_backend {
+            // It means we're building inside the rustc testsuite, so some options need to be handled
+            // a bit differently.
+            cg_backend_path = "gcc".to_string();
+
+            match env.get("RUSTC_SYSROOT") {
+                Some(rustc_sysroot) if !rustc_sysroot.is_empty() => {
+                    rustflags.extend_from_slice(&["--sysroot".to_string(), rustc_sysroot.clone()]);
+                }
+                _ => {}
+            }
+            rustflags.push("-Cpanic=abort".to_string());
+        } else {
+            cg_backend_path = current_dir
+                .join("target")
+                .join(channel)
+                .join(&format!("librustc_codegen_gcc.{}", self.dylib_ext))
+                .display()
+                .to_string();
+            let sysroot_path = current_dir.join("build_sysroot/sysroot");
+            rustflags
+                .extend_from_slice(&["--sysroot".to_string(), sysroot_path.display().to_string()]);
+        };
+
+        if let Some(cg_rustflags) = env.get("CG_RUSTFLAGS") {
+            rustflags.extend_from_slice(&split_args(&cg_rustflags));
+        }
+        if let Some(linker) = linker {
+            rustflags.push(linker.to_string());
+        }
         rustflags.extend_from_slice(&[
-            "-Clink-arg=-undefined".to_string(),
-            "-Clink-arg=dynamic_lookup".to_string(),
+            "-Csymbol-mangling-version=v0".to_string(),
+            "-Cdebuginfo=2".to_string(),
+            format!("-Zcodegen-backend={}", cg_backend_path),
         ]);
+
+        // Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
+        // TODO(antoyo): remove when we can handle ThinLTO.
+        if !env.contains_key(&"FAT_LTO".to_string()) {
+            rustflags.push("-Clto=off".to_string());
+        }
+        rustflags.extend_from_slice(test_flags);
+        // FIXME(antoyo): remove once the atomic shim is gone
+        if os_name == "Darwin" {
+            rustflags.extend_from_slice(&[
+                "-Clink-arg=-undefined".to_string(),
+                "-Clink-arg=dynamic_lookup".to_string(),
+            ]);
+        }
+        env.insert("RUSTFLAGS".to_string(), rustflags.join(" "));
+        // display metadata load errors
+        env.insert("RUSTC_LOG".to_string(), "warn".to_string());
+
+        let sysroot = current_dir.join(&format!(
+            "build_sysroot/sysroot/lib/rustlib/{}/lib",
+            self.target_triple,
+        ));
+        let ld_library_path = format!(
+            "{target}:{sysroot}:{gcc_path}",
+            target = current_dir.join("target/out").display(),
+            sysroot = sysroot.display(),
+        );
+        env.insert("LD_LIBRARY_PATH".to_string(), ld_library_path.clone());
+        env.insert("DYLD_LIBRARY_PATH".to_string(), ld_library_path);
+
+        // NOTE: To avoid the -fno-inline errors, use /opt/gcc/bin/gcc instead of cc.
+        // To do so, add a symlink for cc to /opt/gcc/bin/gcc in our PATH.
+        // Another option would be to add the following Rust flag: -Clinker=/opt/gcc/bin/gcc
+        let path = std::env::var("PATH").unwrap_or_default();
+        env.insert(
+            "PATH".to_string(),
+            format!(
+                "/opt/gcc/bin:/opt/m68k-unknown-linux-gnu/bin{}{}",
+                if path.is_empty() { "" } else { ":" },
+                path
+            ),
+        );
+
+        self.rustc_command = vec![rustc];
+        self.rustc_command.extend_from_slice(&rustflags);
+        self.rustc_command.extend_from_slice(&[
+            "-L".to_string(),
+            "crate=target/out".to_string(),
+            "--out-dir".to_string(),
+            self.cargo_target_dir.clone(),
+        ]);
+
+        if !env.contains_key("RUSTC_LOG") {
+            env.insert("RUSTC_LOG".to_string(), "warn".to_string());
+        }
+        Ok(())
     }
-    env.insert("RUSTFLAGS".to_string(), rustflags.join(" "));
-    // display metadata load errors
-    env.insert("RUSTC_LOG".to_string(), "warn".to_string());
 
-    let sysroot = current_dir.join(&format!(
-        "build_sysroot/sysroot/lib/rustlib/{}/lib",
-        target_triple
-    ));
-    let ld_library_path = format!(
-        "{target}:{sysroot}:{gcc_path}",
-        target = current_dir.join("target/out").display(),
-        sysroot = sysroot.display(),
-    );
-    env.insert("LD_LIBRARY_PATH".to_string(), ld_library_path.clone());
-    env.insert("DYLD_LIBRARY_PATH".to_string(), ld_library_path);
-
-    // NOTE: To avoid the -fno-inline errors, use /opt/gcc/bin/gcc instead of cc.
-    // To do so, add a symlink for cc to /opt/gcc/bin/gcc in our PATH.
-    // Another option would be to add the following Rust flag: -Clinker=/opt/gcc/bin/gcc
-    let path = std::env::var("PATH").unwrap_or_default();
-    env.insert("PATH".to_string(), format!("/opt/gcc/bin:{}", path));
-
-    let mut rustc_command = vec!["rustc".to_string()];
-    rustc_command.extend_from_slice(&rustflags);
-    rustc_command.extend_from_slice(&[
-        "-L".to_string(),
-        "crate=target/out".to_string(),
-        "--out-dir".to_string(),
-        "target/out".to_string(),
-    ]);
-    Ok(ConfigInfo {
-        target,
-        target_triple,
-        rustc_command,
-    })
+    pub fn show_usage() {
+        println!(
+            "\
+    --target [arg]         : Set the target to [arg]
+    --target-triple [arg]  : Set the target triple to [arg]
+    --out-dir              : Location where the files will be generated
+    --release-sysroot      : Build sysroot in release mode
+    --sysroot-panic-abort  : Build the sysroot without unwinding support."
+        );
+    }
 }
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 6c7c85868345..da9f8953ec3c 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -4,7 +4,11 @@ use crate::utils::{cargo_install, git_clone, run_command, run_command_with_outpu
 use std::fs;
 use std::path::Path;
 
-fn prepare_libcore(sysroot_path: &Path, libgccjit12_patches: bool, cross_compile: bool) -> Result<(), String> {
+fn prepare_libcore(
+    sysroot_path: &Path,
+    libgccjit12_patches: bool,
+    cross_compile: bool,
+) -> Result<(), String> {
     let rustc_path = match get_rustc_path() {
         Some(path) => path,
         None => return Err("`rustc` path not found".to_string()),
@@ -88,10 +92,14 @@ fn prepare_libcore(sysroot_path: &Path, libgccjit12_patches: bool, cross_compile
         },
     )?;
     if cross_compile {
-        walk_dir("cross_patches", |_| Ok(()), |file_path: &Path| {
-            patches.push(file_path.to_path_buf());
-            Ok(())
-        })?;
+        walk_dir(
+            "cross_patches",
+            |_| Ok(()),
+            |file_path: &Path| {
+                patches.push(file_path.to_path_buf());
+                Ok(())
+            },
+        )?;
     }
     if libgccjit12_patches {
         walk_dir(
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 4c8c63e59ab7..fb2b24da9a23 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1,15 +1,1138 @@
-use crate::utils::run_command_with_output;
+use crate::build;
+use crate::config::ConfigInfo;
+use crate::utils::{
+    get_gcc_path, get_toolchain, run_command, run_command_with_env,
+    run_command_with_output_and_env, rustc_version_info, split_args, walk_dir,
+};
 
-fn get_args<'a>(args: &mut Vec<&'a dyn AsRef<std::ffi::OsStr>>, extra_args: &'a Vec<String>) {
-    for extra_arg in extra_args {
-        args.push(extra_arg);
+use std::collections::{BTreeSet, HashMap};
+use std::ffi::OsStr;
+use std::fs::remove_dir_all;
+use std::path::{Path, PathBuf};
+use std::str::FromStr;
+
+type Env = HashMap<String, String>;
+type Runner = &'static dyn Fn(&Env, &TestArg) -> Result<(), String>;
+type Runners = HashMap<&'static str, (&'static str, Runner)>;
+
+fn get_runners() -> Runners {
+    let mut runners = HashMap::new();
+
+    runners.insert(
+        "--test-rustc",
+        ("Run all rustc tests", &test_rustc as Runner),
+    );
+    runners.insert(
+        "--test-successful-rustc",
+        ("Run successful rustc tests", &test_successful_rustc),
+    );
+    runners.insert(
+        "--test-failing-rustc",
+        ("Run failing rustc tests", &test_failing_rustc),
+    );
+    runners.insert("--test-libcore", ("Run libcore tests", &test_libcore));
+    runners.insert("--clean-ui-tests", ("Clean ui tests", &clean_ui_tests));
+    runners.insert("--clean", ("Empty cargo target directory", &clean));
+    runners.insert("--std-tests", ("Run std tests", &std_tests));
+    runners.insert("--asm-tests", ("Run asm tests", &asm_tests));
+    runners.insert(
+        "--extended-tests",
+        ("Run extended sysroot tests", &extended_sysroot_tests),
+    );
+    runners.insert(
+        "--extended-rand-tests",
+        ("Run extended rand tests", &extended_rand_tests),
+    );
+    runners.insert(
+        "--extended-regex-example-tests",
+        (
+            "Run extended regex example tests",
+            &extended_regex_example_tests,
+        ),
+    );
+    runners.insert(
+        "--extended-regex-tests",
+        ("Run extended regex tests", &extended_regex_tests),
+    );
+    runners.insert("--mini-tests", ("Run mini tests", &mini_tests));
+
+    runners
+}
+
+fn get_number_after_arg(
+    args: &mut impl Iterator<Item = String>,
+    option: &str,
+) -> Result<usize, String> {
+    match args.next() {
+        Some(nb) if !nb.is_empty() => match usize::from_str(&nb) {
+            Ok(nb) => Ok(nb),
+            Err(_) => Err(format!(
+                "Expected a number after `{}`, found `{}`",
+                option, nb
+            )),
+        },
+        _ => Err(format!(
+            "Expected a number after `{}`, found nothing",
+            option
+        )),
     }
 }
 
-pub fn run() -> Result<(), String> {
-    let mut args: Vec<&dyn AsRef<std::ffi::OsStr>> = vec![&"bash", &"test.sh"];
-    let extra_args = std::env::args().skip(2).collect::<Vec<_>>();
-    get_args(&mut args, &extra_args);
-    let current_dir = std::env::current_dir().map_err(|error| format!("`current_dir` failed: {:?}", error))?;
-    run_command_with_output(args.as_slice(), Some(&current_dir))
+fn show_usage() {
+    println!(
+        r#"
+`test` command help:
+
+    --release              : Build codegen in release mode
+    --release-sysroot      : Build sysroot in release mode
+    --sysroot-panic-abort  : Build the sysroot without unwinding support.
+    --no-default-features  : Add `--no-default-features` flag
+    --features [arg]       : Add a new feature [arg]
+    --use-system-gcc       : Use system installed libgccjit
+    --build-only           : Only build rustc_codegen_gcc then exits
+    --use-backend          : Useful only for rustc testsuite
+    --nb-parts             : Used to split rustc_tests (for CI needs)
+    --current-part         : Used with `--nb-parts`, allows you to specify which parts to test"#
+    );
+    ConfigInfo::show_usage();
+    for (option, (doc, _)) in get_runners() {
+        let needed_spaces = 23_usize.saturating_sub(option.len());
+        let spaces: String = std::iter::repeat(' ').take(needed_spaces).collect();
+        println!("    {}{}: {}", option, spaces, doc);
+    }
+    println!("    --help                 : Show this help");
+}
+
+#[derive(Default, PartialEq, Eq, Clone, Copy)]
+enum Channel {
+    #[default]
+    Debug,
+    Release,
+}
+
+impl Channel {
+    pub fn as_str(self) -> &'static str {
+        match self {
+            Self::Debug => "debug",
+            Self::Release => "release",
+        }
+    }
+}
+
+#[derive(Default)]
+struct TestArg {
+    no_default_features: bool,
+    build_only: bool,
+    gcc_path: String,
+    channel: Channel,
+    sysroot_channel: Channel,
+    use_backend: bool,
+    runners: BTreeSet<String>,
+    flags: Vec<String>,
+    backend: Option<String>,
+    nb_parts: Option<usize>,
+    current_part: Option<usize>,
+    sysroot_panic_abort: bool,
+    config_info: ConfigInfo,
+}
+
+impl TestArg {
+    fn new() -> Result<Option<Self>, String> {
+        let mut use_system_gcc = false;
+        let mut test_arg = Self::default();
+
+        // We skip binary name and the `test` command.
+        let mut args = std::env::args().skip(2);
+        let runners = get_runners();
+
+        while let Some(arg) = args.next() {
+            match arg.as_str() {
+                "--release" => test_arg.channel = Channel::Release,
+                "--release-sysroot" => test_arg.sysroot_channel = Channel::Release,
+                "--no-default-features" => {
+                    // To prevent adding it more than once.
+                    if !test_arg.no_default_features {
+                        test_arg.flags.push("--no-default-features".into());
+                    }
+                    test_arg.no_default_features = true;
+                }
+                "--features" => match args.next() {
+                    Some(feature) if !feature.is_empty() => {
+                        test_arg
+                            .flags
+                            .extend_from_slice(&["--features".into(), feature]);
+                    }
+                    _ => {
+                        return Err("Expected an argument after `--features`, found nothing".into())
+                    }
+                },
+                "--use-system-gcc" => use_system_gcc = true,
+                "--build-only" => test_arg.build_only = true,
+                "--use-backend" => match args.next() {
+                    Some(backend) if !backend.is_empty() => test_arg.backend = Some(backend),
+                    _ => {
+                        return Err(
+                            "Expected an argument after `--use-backend`, found nothing".into()
+                        )
+                    }
+                },
+                "--nb-parts" => {
+                    test_arg.nb_parts = Some(get_number_after_arg(&mut args, "--nb-parts")?);
+                }
+                "--current-part" => {
+                    test_arg.current_part =
+                        Some(get_number_after_arg(&mut args, "--current-part")?);
+                }
+                "--sysroot-panic-abort" => {
+                    test_arg.sysroot_panic_abort = true;
+                }
+                "--help" => {
+                    show_usage();
+                    return Ok(None);
+                }
+                x if runners.contains_key(x) => {
+                    test_arg.runners.insert(x.into());
+                }
+                arg => {
+                    if !test_arg.config_info.parse_argument(arg, &mut args)? {
+                        return Err(format!("Unknown option {}", arg));
+                    }
+                }
+            }
+
+            test_arg.gcc_path = if use_system_gcc {
+                println!("Using system GCC");
+                "gcc".to_string()
+            } else {
+                get_gcc_path()?
+            };
+        }
+        Ok(Some(test_arg))
+    }
+}
+
+fn build_if_no_backend(env: &Env, args: &TestArg) -> Result<(), String> {
+    if args.use_backend {
+        return Ok(());
+    }
+    let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"rustc"];
+    if args.channel == Channel::Release {
+        let mut env = env.clone();
+        env.insert("CARGO_INCREMENTAL".to_string(), "1".to_string());
+        command.push(&"--release");
+        for flag in args.flags.iter() {
+            command.push(flag);
+        }
+        run_command_with_output_and_env(&command, None, Some(&env))
+    } else {
+        for flag in args.flags.iter() {
+            command.push(flag);
+        }
+        run_command_with_output_and_env(&command, None, Some(&env))
+    }
+}
+
+fn clean(_env: &Env, args: &TestArg) -> Result<(), String> {
+    let _ = std::fs::remove_dir_all(&args.config_info.cargo_target_dir);
+    let path = Path::new(&args.config_info.cargo_target_dir).join("gccjit");
+    std::fs::create_dir_all(&path)
+        .map_err(|error| format!("failed to create folder `{}`: {:?}", path.display(), error))
+}
+
+fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[BUILD] mini_core");
+    let crate_types = if args.config_info.host_triple != args.config_info.target_triple {
+        "lib"
+    } else {
+        "lib,dylib"
+    }
+    .to_string();
+    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
+    for arg in args.config_info.rustc_command.iter() {
+        command.push(arg);
+    }
+    command.extend_from_slice(&[
+        &"example/mini_core.rs",
+        &"--crate-name",
+        &"mini_core",
+        &"--crate-type",
+        &crate_types,
+        &"--target",
+        &args.config_info.target_triple,
+    ]);
+    run_command_with_output_and_env(&command, None, Some(&env))?;
+
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[BUILD] example");
+    command.clear();
+    for arg in args.config_info.rustc_command.iter() {
+        command.push(arg);
+    }
+    command.extend_from_slice(&[
+        &"example/example.rs",
+        &"--crate-type",
+        &"lib",
+        &"--target",
+        &args.config_info.target_triple,
+    ]);
+    run_command_with_output_and_env(&command, None, Some(&env))?;
+
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[AOT] mini_core_hello_world");
+    command.clear();
+    for arg in args.config_info.rustc_command.iter() {
+        command.push(arg);
+    }
+    command.extend_from_slice(&[
+        &"example/mini_core_hello_world.rs",
+        &"--crate-name",
+        &"mini_core_hello_world",
+        &"--crate-type",
+        &"bin",
+        &"-g",
+        &"--target",
+        &args.config_info.target_triple,
+    ]);
+    run_command_with_output_and_env(&command, None, Some(&env))?;
+
+    let command: &[&dyn AsRef<OsStr>] = &[
+        &Path::new(&args.config_info.cargo_target_dir).join("mini_core_hello_world"),
+        &"abc",
+        &"bcd",
+    ];
+    run_command_in_vm(&command, env, args)?;
+    Ok(())
+}
+
+fn build_sysroot(env: &Env, args: &TestArg) -> Result<(), String> {
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[BUILD] sysroot");
+    build::build_sysroot(
+        env,
+        args.config_info.sysroot_panic_abort,
+        args.config_info.sysroot_release_channel,
+        &args.config_info,
+    )?;
+    Ok(())
+}
+
+// TODO(GuillaumeGomez): when rewriting in Rust, refactor with the code in tests/lang_tests_common.rs if possible.
+fn run_command_in_vm(
+    command: &[&dyn AsRef<OsStr>],
+    env: &Env,
+    args: &TestArg,
+) -> Result<(), String> {
+    if !args.config_info.run_in_vm {
+        run_command_with_env(command, None, Some(env))?;
+        return Ok(());
+    }
+    let vm_parent_dir = match env.get("CG_GCC_VM_DIR") {
+        Some(dir) if !dir.is_empty() => PathBuf::from(dir.clone()),
+        _ => std::env::current_dir().unwrap(),
+    };
+    let vm_dir = "vm";
+    let exe_to_run = command.first().unwrap();
+    let exe = Path::new(&exe_to_run);
+    let exe_filename = exe.file_name().unwrap();
+    let vm_home_dir = vm_parent_dir.join(vm_dir).join("home");
+    let vm_exe_path = vm_home_dir.join(exe_filename);
+    let inside_vm_exe_path = Path::new("/home").join(exe_filename);
+
+    let sudo_command: &[&dyn AsRef<OsStr>] = &[&"sudo", &"cp", &exe, &vm_exe_path];
+    run_command_with_env(sudo_command, None, Some(env))?;
+
+    let mut vm_command: Vec<&dyn AsRef<OsStr>> =
+        vec![&"sudo", &"chroot", &"qemu-m68k-static", &inside_vm_exe_path];
+    vm_command.extend_from_slice(command);
+    run_command_with_env(&vm_command, Some(&vm_parent_dir), Some(env))?;
+    Ok(())
+}
+
+fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[AOT] arbitrary_self_types_pointers_and_wrappers");
+    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
+    for arg in args.config_info.rustc_command.iter() {
+        command.push(arg);
+    }
+    command.extend_from_slice(&[
+        &"example/arbitrary_self_types_pointers_and_wrappers.rs",
+        &"--crate-name",
+        &"arbitrary_self_types_pointers_and_wrappers",
+        &"--crate-type",
+        &"bin",
+        &"--target",
+        &args.config_info.target_triple,
+    ]);
+    run_command_with_env(&command, None, Some(env))?;
+    run_command_in_vm(
+        &[&Path::new(&args.config_info.cargo_target_dir)
+            .join("arbitrary_self_types_pointers_and_wrappers")],
+        env,
+        args,
+    )?;
+
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[AOT] alloc_system");
+    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
+    for arg in args.config_info.rustc_command.iter() {
+        command.push(arg);
+    }
+    command.extend_from_slice(&[
+        &"example/alloc_system.rs",
+        &"--crate-type",
+        &"lib",
+        &"--target",
+        &args.config_info.target_triple,
+    ]);
+    if !args.no_default_features {
+        command.push(&"--cfg feature=\"master\"");
+    }
+    run_command_with_env(&command, None, Some(env))?;
+
+    // FIXME: doesn't work on m68k.
+    if args.config_info.host_triple != args.config_info.target_triple {
+        // FIXME: create a function "display_if_not_quiet" or something along the line.
+        println!("[AOT] alloc_example");
+        let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
+        for arg in args.config_info.rustc_command.iter() {
+            command.push(arg);
+        }
+        command.extend_from_slice(&[
+            &"example/alloc_example.rs",
+            &"--crate-type",
+            &"bin",
+            &"--target",
+            &args.config_info.target_triple,
+        ]);
+        run_command_with_env(&command, None, Some(env))?;
+        run_command_in_vm(
+            &[&Path::new(&args.config_info.cargo_target_dir).join("alloc_example")],
+            env,
+            args,
+        )?;
+    }
+
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[AOT] dst_field_align");
+    // FIXME(antoyo): Re-add -Zmir-opt-level=2 once rust-lang/rust#67529 is fixed.
+    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
+    for arg in args.config_info.rustc_command.iter() {
+        command.push(arg);
+    }
+    command.extend_from_slice(&[
+        &"example/dst-field-align.rs",
+        &"--crate-name",
+        &"dst_field_align",
+        &"--crate-type",
+        &"bin",
+        &"--target",
+        &args.config_info.target_triple,
+    ]);
+    run_command_with_env(&command, None, Some(env))?;
+    run_command_in_vm(
+        &[&Path::new(&args.config_info.cargo_target_dir).join("dst_field_align")],
+        env,
+        args,
+    )?;
+
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[AOT] std_example");
+    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
+    for arg in args.config_info.rustc_command.iter() {
+        command.push(arg);
+    }
+    command.extend_from_slice(&[
+        &"example/std_example.rs",
+        &"--crate-type",
+        &"bin",
+        &"--target",
+        &args.config_info.target_triple,
+    ]);
+    if !args.no_default_features {
+        command.push(&"--cfg feature=\"master\"");
+    }
+    run_command_with_env(&command, None, Some(env))?;
+    run_command_in_vm(
+        &[
+            &Path::new(&args.config_info.cargo_target_dir).join("std_example"),
+            &"--target",
+            &args.config_info.target_triple,
+        ],
+        env,
+        args,
+    )?;
+
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[AOT] subslice-patterns-const-eval");
+    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
+    for arg in args.config_info.rustc_command.iter() {
+        command.push(arg);
+    }
+    command.extend_from_slice(&[
+        &"example/subslice-patterns-const-eval.rs",
+        &"--crate-type",
+        &"bin",
+        &"--target",
+        &args.config_info.target_triple,
+    ]);
+    run_command_with_env(&command, None, Some(env))?;
+    run_command_in_vm(
+        &[&Path::new(&args.config_info.cargo_target_dir).join("subslice-patterns-const-eval")],
+        env,
+        args,
+    )?;
+
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[AOT] track-caller-attribute");
+    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
+    for arg in args.config_info.rustc_command.iter() {
+        command.push(arg);
+    }
+    command.extend_from_slice(&[
+        &"example/track-caller-attribute.rs",
+        &"--crate-type",
+        &"bin",
+        &"--target",
+        &args.config_info.target_triple,
+    ]);
+    run_command_with_env(&command, None, Some(env))?;
+    run_command_in_vm(
+        &[&Path::new(&args.config_info.cargo_target_dir).join("track-caller-attribute")],
+        env,
+        args,
+    )?;
+
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[AOT] mod_bench");
+    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
+    for arg in args.config_info.rustc_command.iter() {
+        command.push(arg);
+    }
+    command.extend_from_slice(&[
+        &"example/mod_bench.rs",
+        &"--crate-type",
+        &"bin",
+        &"--target",
+        &args.config_info.target_triple,
+    ]);
+    run_command_with_env(&command, None, Some(env))?;
+    // FIXME: the compiled binary is not run. Is it normal?
+
+    Ok(())
+}
+
+fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
+    let toolchain = get_toolchain()?;
+
+    let rust_dir = Some(Path::new("rust"));
+    // If the repository was already cloned, command will fail, so doesn't matter.
+    let _ = run_command_with_output_and_env(
+        &[&"git", &"clone", &"https://github.com/rust-lang/rust.git"],
+        None,
+        Some(env),
+    );
+    run_command_with_output_and_env(&[&"git", &"fetch"], rust_dir, Some(env))?;
+    let rustc_commit = match rustc_version_info(env.get("RUSTC").map(|s| s.as_str()))?.commit_hash {
+        Some(commit_hash) => commit_hash,
+        None => return Err("Couldn't retrieve rustc commit hash".to_string()),
+    };
+    run_command_with_output_and_env(&[&"git", &"checkout", &rustc_commit], rust_dir, Some(env))?;
+    env.insert("RUSTFLAGS".to_string(), String::new());
+    let cargo = String::from_utf8(
+        run_command_with_env(&[&"rustup", &"which", &"cargo"], rust_dir, Some(env))?.stdout,
+    )
+    .map_err(|error| format!("Failed to retrieve cargo path: {:?}", error))
+    .and_then(|cargo| {
+        let cargo = cargo.trim().to_owned();
+        if cargo.is_empty() {
+            Err(format!("`cargo` path is empty"))
+        } else {
+            Ok(cargo)
+        }
+    })?;
+    let llvm_filecheck = String::from_utf8(
+        run_command_with_env(
+            &[
+                &"bash",
+                &"-c",
+                &"which FileCheck-10 || \
+          which FileCheck-11 || \
+          which FileCheck-12 || \
+          which FileCheck-13 || \
+          which FileCheck-14",
+            ],
+            rust_dir,
+            Some(env),
+        )?
+        .stdout,
+    )
+    .map_err(|error| format!("Failed to retrieve LLVM FileCheck: {:?}", error))?;
+    std::fs::write(
+        "rust/config.toml",
+        &format!(
+            r#"change-id = 115898
+
+[rust]
+codegen-backends = []
+deny-warnings = false
+verbose-tests = true
+
+[build]
+cargo = "{cargo}"
+local-rebuild = true
+rustc = "{home}/.rustup/toolchains/{toolchain}-{host_triple}/bin/rustc"
+
+[target.x86_64-unknown-linux-gnu]
+llvm-filecheck = "{llvm_filecheck}"
+
+[llvm]
+download-ci-llvm = false
+"#,
+            cargo = cargo.trim(),
+            home = env.get("HOME").unwrap(),
+            toolchain = toolchain,
+            host_triple = args.config_info.host_triple,
+            llvm_filecheck = llvm_filecheck,
+        ),
+    )
+    .map_err(|error| format!("Failed to write into `rust/config.toml`: {:?}", error))?;
+
+    let rustc_commit = match rustc_version_info(env.get("RUSTC").map(|s| s.as_str()))?.commit_hash {
+        Some(commit_hash) => commit_hash,
+        None => return Err("Couldn't retrieve rustc commit hash".to_string()),
+    };
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("commit: {:?}", rustc_commit);
+    let command: &[&dyn AsRef<OsStr>] = &[&"git", &"checkout", &rustc_commit, &"tests"];
+    run_command_with_output_and_env(command, rust_dir, Some(env))?;
+    Ok(())
+}
+
+fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
+    let mut env = env.clone();
+    setup_rustc(&mut env, args)?;
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[TEST] rustc asm test suite");
+
+    env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
+
+    run_command_with_env(
+        &[
+            &"./x.py",
+            &"test",
+            &"--run",
+            &"always",
+            &"--stage",
+            &"0",
+            &"tests/assembly/asm",
+            &"--rustc-args",
+            &format!(
+                r#"-Zpanic-abort-tests -Csymbol-mangling-version=v0 \
+                -Zcodegen-backend="{pwd}/target/{channel}/librustc_codegen_gcc.{dylib_ext}" \
+                --sysroot "{pwd}/build_sysroot/sysroot" -Cpanic=abort"#,
+                pwd = std::env::current_dir()
+                    .map_err(|error| format!("`current_dir` failed: {:?}", error))?
+                    .display(),
+                channel = args.channel.as_str(),
+                dylib_ext = args.config_info.dylib_ext,
+            )
+            .as_str(),
+        ],
+        Some(Path::new("rust")),
+        Some(&env),
+    )?;
+    Ok(())
+}
+
+fn run_cargo_command(
+    command: &[&dyn AsRef<OsStr>],
+    cwd: Option<&Path>,
+    env: &Env,
+    args: &TestArg,
+) -> Result<(), String> {
+    run_cargo_command_with_callback(command, cwd, env, args, |cargo_command, cwd, env| {
+        run_command_with_output_and_env(&cargo_command, cwd, Some(env))?;
+        Ok(())
+    })
+}
+
+fn run_cargo_command_with_callback<F>(
+    command: &[&dyn AsRef<OsStr>],
+    cwd: Option<&Path>,
+    env: &Env,
+    args: &TestArg,
+    callback: F,
+) -> Result<(), String>
+where
+    F: Fn(&[&dyn AsRef<OsStr>], Option<&Path>, &Env) -> Result<(), String>,
+{
+    let toolchain = get_toolchain()?;
+    let rustc_version = String::from_utf8(
+        run_command_with_env(&[&args.config_info.rustc_command[0], &"-V"], cwd, Some(env))?.stdout,
+    )
+    .map_err(|error| format!("Failed to retrieve rustc version: {:?}", error))?;
+    let rustc_toolchain_version = String::from_utf8(
+        run_command_with_env(
+            &[
+                &args.config_info.rustc_command[0],
+                &format!("+{}", toolchain),
+                &"-V",
+            ],
+            cwd,
+            Some(env),
+        )?
+        .stdout,
+    )
+    .map_err(|error| format!("Failed to retrieve rustc +toolchain version: {:?}", error))?;
+
+    if rustc_version != rustc_toolchain_version {
+        eprintln!(
+            "rustc_codegen_gcc is built for `{}` but the default rustc version is `{}`.",
+            rustc_toolchain_version, rustc_version,
+        );
+        eprintln!("Using `{}`.", rustc_toolchain_version);
+    }
+    let mut cargo_command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &toolchain];
+    cargo_command.extend_from_slice(&command);
+    callback(&cargo_command, cwd, env)
+}
+
+// FIXME(antoyo): linker gives multiple definitions error on Linux
+// echo "[BUILD] sysroot in release mode"
+// ./build_sysroot/build_sysroot.sh --release
+
+fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[TEST] libcore");
+    let path = Path::new("build_sysroot/sysroot_src/library/core/tests");
+    let _ = remove_dir_all(path.join("target"));
+    run_cargo_command(&[&"test"], Some(path), env, args)?;
+    Ok(())
+}
+
+// echo "[BENCH COMPILE] mod_bench"
+//
+// COMPILE_MOD_BENCH_INLINE="$RUSTC example/mod_bench.rs --crate-type bin -Zmir-opt-level=3 -O --crate-name mod_bench_inline"
+// COMPILE_MOD_BENCH_LLVM_0="rustc example/mod_bench.rs --crate-type bin -Copt-level=0 -o $cargo_target_dir/mod_bench_llvm_0 -Cpanic=abort"
+// COMPILE_MOD_BENCH_LLVM_1="rustc example/mod_bench.rs --crate-type bin -Copt-level=1 -o $cargo_target_dir/mod_bench_llvm_1 -Cpanic=abort"
+// COMPILE_MOD_BENCH_LLVM_2="rustc example/mod_bench.rs --crate-type bin -Copt-level=2 -o $cargo_target_dir/mod_bench_llvm_2 -Cpanic=abort"
+// COMPILE_MOD_BENCH_LLVM_3="rustc example/mod_bench.rs --crate-type bin -Copt-level=3 -o $cargo_target_dir/mod_bench_llvm_3 -Cpanic=abort"
+//
+// Use 100 runs, because a single compilations doesn't take more than ~150ms, so it isn't very slow
+// hyperfine --runs ${COMPILE_RUNS:-100} "$COMPILE_MOD_BENCH_INLINE" "$COMPILE_MOD_BENCH_LLVM_0" "$COMPILE_MOD_BENCH_LLVM_1" "$COMPILE_MOD_BENCH_LLVM_2" "$COMPILE_MOD_BENCH_LLVM_3"
+// echo "[BENCH RUN] mod_bench"
+// hyperfine --runs ${RUN_RUNS:-10} $cargo_target_dir/mod_bench{,_inline} $cargo_target_dir/mod_bench_llvm_*
+
+fn extended_rand_tests(env: &Env, args: &TestArg) -> Result<(), String> {
+    if args.no_default_features {
+        return Ok(());
+    }
+    let path = Path::new("rand");
+    run_cargo_command(&[&"clean"], Some(path), env, args)?;
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[TEST] rust-random/rand");
+    run_cargo_command(&[&"test", &"--workspace"], Some(path), env, args)?;
+    Ok(())
+}
+
+fn extended_regex_example_tests(env: &Env, args: &TestArg) -> Result<(), String> {
+    if args.no_default_features {
+        return Ok(());
+    }
+    let path = Path::new("regex");
+    run_cargo_command(&[&"clean"], Some(path), env, args)?;
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[TEST] rust-lang/regex example shootout-regex-dna");
+    let mut env = env.clone();
+    // newer aho_corasick versions throw a deprecation warning
+    env.insert("CG_RUSTFLAGS".to_string(), "--cap-lints warn".to_string());
+    // Make sure `[codegen mono items] start` doesn't poison the diff
+    run_cargo_command(
+        &[&"build", &"--example", &"shootout-regex-dna"],
+        Some(path),
+        &env,
+        args,
+    )?;
+
+    run_cargo_command_with_callback(
+        &[&"run", &"--example", &"shootout-regex-dna"],
+        Some(path),
+        &env,
+        args,
+        |cargo_command, cwd, env| {
+            // FIXME: rewrite this with `child.stdin.write_all()` because
+            // `examples/regexdna-input.txt` is very small.
+            let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"bash", &"-c"];
+            let cargo_args = cargo_command
+                .iter()
+                .map(|s| s.as_ref().to_str().unwrap())
+                .collect::<Vec<_>>();
+            let bash_command = format!(
+                "cat examples/regexdna-input.txt | {} | grep -v 'Spawned thread' > res.txt",
+                cargo_args.join(" "),
+            );
+            command.push(&bash_command);
+            run_command_with_output_and_env(&command, cwd, Some(env))?;
+            run_command_with_output_and_env(
+                &[&"diff", &"-u", &"res.txt", &"examples/regexdna-output.txt"],
+                cwd,
+                Some(env),
+            )?;
+            Ok(())
+        },
+    )?;
+
+    Ok(())
+}
+
+fn extended_regex_tests(env: &Env, args: &TestArg) -> Result<(), String> {
+    if args.no_default_features {
+        return Ok(());
+    }
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[TEST] rust-lang/regex tests");
+    let mut env = env.clone();
+    env.insert("CG_RUSTFLAGS".to_string(), "--cap-lints warn".to_string());
+    run_cargo_command(
+        &[
+            &"test",
+            &"--tests",
+            &"--",
+            &"--exclude-should-panic",
+            &"--test-threads",
+            &"1",
+            &"-Zunstable-options",
+            &"-q",
+        ],
+        Some(Path::new("regex")),
+        &env,
+        args,
+    )?;
+    Ok(())
+}
+
+fn extended_sysroot_tests(env: &Env, args: &TestArg) -> Result<(), String> {
+    // pushd simple-raytracer
+    // echo "[BENCH COMPILE] ebobby/simple-raytracer"
+    // hyperfine --runs "${RUN_RUNS:-10}" --warmup 1 --prepare "cargo clean" \
+    // "RUSTC=rustc RUSTFLAGS='' cargo build" \
+    // "../cargo.sh build"
+
+    // echo "[BENCH RUN] ebobby/simple-raytracer"
+    // cp ./target/debug/main ./raytracer_cg_gcc
+    // hyperfine --runs "${RUN_RUNS:-10}" ./raytracer_cg_llvm ./raytracer_cg_gcc
+    // popd
+    extended_rand_tests(env, args)?;
+    extended_regex_example_tests(env, args)?;
+    extended_regex_tests(env, args)?;
+
+    Ok(())
+}
+
+fn should_remove_ui_test(content: &str) -> bool {
+    for line in content
+        .lines()
+        .map(|line| line.trim())
+        .filter(|line| !line.is_empty())
+    {
+        if [
+            "// error-pattern:",
+            "// build-fail",
+            "// run-fail",
+            "-Cllvm-args",
+            "//~",
+            "// ~",
+        ]
+        .iter()
+        .any(|check| line.contains(check))
+        {
+            return true;
+        }
+    }
+    false
+}
+
+fn should_not_remove_test(file: &str) -> bool {
+    // contains //~ERROR, but shouldn't be removed
+    [
+        "issues/auxiliary/issue-3136-a.rs",
+        "type-alias-impl-trait/auxiliary/cross_crate_ice.rs",
+        "type-alias-impl-trait/auxiliary/cross_crate_ice2.rs",
+        "macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs",
+        "imports/ambiguous-1.rs",
+        "imports/ambiguous-4-extern.rs",
+        "entry-point/auxiliary/bad_main_functions.rs",
+    ]
+    .iter()
+    .any(|to_ignore| file.ends_with(to_ignore))
+}
+
+fn should_remove_test(path: &Path, path_str: &str) -> bool {
+    // Tests generating errors.
+    path.file_name()
+        .and_then(|name| name.to_str())
+        .map(|name| name.contains("thread"))
+        .unwrap_or(false)
+        || [
+            "consts/issue-miri-1910.rs",
+            // Tests generating errors.
+            "consts/issue-94675.rs",
+            // this test is oom-killed in the CI.
+            "mir/mir_heavy/issue-miri-1910.rs",
+        ]
+        .iter()
+        .any(|to_ignore| path_str.ends_with(to_ignore))
+}
+
+fn test_rustc_inner<F>(env: &Env, args: &TestArg, callback: F) -> Result<(), String>
+where
+    F: Fn() -> Result<bool, String>,
+{
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[TEST] rust-lang/rust");
+    walk_dir(
+        "rust/tests/ui",
+        |dir| {
+            let dir_name = dir.file_name().and_then(|name| name.to_str()).unwrap_or("");
+            if [
+                "abi",
+                "extern",
+                "unsized-locals",
+                "proc-macro",
+                "threads-sendsync",
+                "borrowck",
+                "test-attrs",
+            ]
+            .iter()
+            .any(|name| *name == dir_name)
+            {
+                std::fs::remove_dir_all(dir).map_err(|error| {
+                    format!("Failed to remove folder `{}`: {:?}", dir.display(), error)
+                })?;
+            }
+            Ok(())
+        },
+        |_| Ok(()),
+    )?;
+
+    fn dir_handling(dir: &Path) -> Result<(), String> {
+        walk_dir(dir, dir_handling, file_handling)
+    }
+    fn file_handling(file: &Path) -> Result<(), String> {
+        let path_str = file.display().to_string().replace("\\", "/");
+        if should_not_remove_test(&path_str) {
+            return Ok(());
+        } else if should_remove_test(file, &path_str) {
+            return std::fs::remove_file(file)
+                .map_err(|error| format!("Failed to remove `{}`: {:?}", file.display(), error));
+        }
+        let file_content = std::fs::read_to_string(file)
+            .map_err(|error| format!("Failed to read `{}`: {:?}", file.display(), error))?;
+        if should_remove_ui_test(&file_content) {
+            std::fs::remove_file(file)
+                .map_err(|error| format!("Failed to remove `{}`: {:?}", file.display(), error))?;
+        }
+        Ok(())
+    }
+
+    walk_dir("rust/tests/ui", dir_handling, file_handling)?;
+    let file = "rust/tests/ui/consts/const_cmp_type_id.rs";
+    std::fs::remove_file(file)
+        .map_err(|error| format!("Failed to remove `{}`: {:?}", file, error))?;
+    let file = "rust/tests/ui/consts/issue-73976-monomorphic.rs";
+    std::fs::remove_file(file)
+        .map_err(|error| format!("Failed to remove `{}`: {:?}", file, error))?;
+
+    let mut env = env.clone();
+    setup_rustc(&mut env, args)?;
+    if !callback()? {
+        // FIXME: create a function "display_if_not_quiet" or something along the line.
+        println!("Keeping all UI tests");
+    }
+
+    let nb_parts = args.nb_parts.unwrap_or(0);
+    if nb_parts > 0 {
+        let current_part = args.current_part.unwrap_or(0);
+        // FIXME: create a function "display_if_not_quiet" or something along the line.
+        println!(
+            "Splitting ui_test into {} parts (and running part {})",
+            nb_parts, current_part
+        );
+        let out = String::from_utf8(
+            run_command(
+                &[
+                    &"find",
+                    &"tests/ui",
+                    &"-type",
+                    &"f",
+                    &"-name",
+                    &"*.rs",
+                    &"-not",
+                    &"-path",
+                    &"*/auxiliary/*",
+                ],
+                Some(Path::new("rust")),
+            )?
+            .stdout,
+        )
+        .map_err(|error| format!("Failed to retrieve output of find command: {:?}", error))?;
+        let mut files = out
+            .split('\n')
+            .map(|line| line.trim())
+            .filter(|line| !line.is_empty())
+            .collect::<Vec<_>>();
+        // To ensure it'll be always the same sub files, we sort the content.
+        files.sort();
+        // We increment the number of tests by one because if this is an odd number, we would skip
+        // one test.
+        let count = files.len() / nb_parts + 1;
+        let start = nb_parts * count;
+        let end = start + count;
+        for (pos, path) in files.iter().enumerate() {
+            if pos >= start && pos <= end {
+                continue;
+            }
+            std::fs::remove_file(path)
+                .map_err(|error| format!("Failed to remove `{}`: {:?}", path, error))?;
+        }
+    }
+
+    // FIXME: create a function "display_if_not_quiet" or something along the line.
+    println!("[TEST] rustc test suite");
+    env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
+    let rustc_args = env
+        .get("RUSTFLAGS")
+        .expect("RUSTFLAGS should not be empty at this stage");
+    run_command_with_output_and_env(
+        &[
+            &"./x.py",
+            &"test",
+            &"--run",
+            &"always",
+            &"--stage",
+            &"0",
+            &"tests/ui",
+            &"--rustc-args",
+            &rustc_args,
+        ],
+        Some(Path::new("rust")),
+        Some(&env),
+    )?;
+    Ok(())
+}
+
+fn test_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
+    test_rustc_inner(env, args, || Ok(false))
+}
+
+fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
+    test_rustc_inner(env, args, || {
+        // Removing all tests.
+        run_command(
+            &[
+                &"find",
+                &"tests/ui",
+                &"-type",
+                &"f",
+                &"-name",
+                &"*.rs",
+                &"-not",
+                &"-path",
+                &"*/auxiliary/*",
+                &"-delete",
+            ],
+            Some(Path::new("rust")),
+        )?;
+        // Putting back only the failing ones.
+        run_command(
+            &[
+                &"xargs",
+                &"-a",
+                &"../failing-ui-tests.txt",
+                &"-d'\n'",
+                &"git",
+                &"checkout",
+                &"--",
+            ],
+            Some(Path::new("rust")),
+        )?;
+        Ok(true)
+    })
+}
+
+fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
+    test_rustc_inner(env, args, || {
+        // Removing the failing tests.
+        run_command(
+            &[
+                &"xargs",
+                &"-a",
+                &"../failing-ui-tests.txt",
+                &"-d'\n'",
+                &"rm",
+            ],
+            Some(Path::new("rust")),
+        )?;
+        Ok(true)
+    })
+}
+
+fn clean_ui_tests(_env: &Env, _args: &TestArg) -> Result<(), String> {
+    run_command(
+        &[
+            &"find",
+            &"rust/build/x86_64-unknown-linux-gnu/test/ui/",
+            &"-name",
+            &"stamp",
+            &"-delete",
+        ],
+        None,
+    )?;
+    Ok(())
+}
+
+fn run_all(env: &Env, args: &TestArg) -> Result<(), String> {
+    clean(env, args)?;
+    mini_tests(env, args)?;
+    build_sysroot(env, args)?;
+    std_tests(env, args)?;
+    // asm_tests(env, args)?;
+    test_libcore(env, args)?;
+    extended_sysroot_tests(env, args)?;
+    test_rustc(env, args)?;
+    Ok(())
+}
+
+pub fn run() -> Result<(), String> {
+    let mut args = match TestArg::new()? {
+        Some(args) => args,
+        None => return Ok(()),
+    };
+    let mut env: HashMap<String, String> = std::env::vars().collect();
+
+    env.insert("LD_LIBRARY_PATH".to_string(), args.gcc_path.clone());
+    env.insert("LIBRARY_PATH".to_string(), args.gcc_path.clone());
+
+    build_if_no_backend(&env, &args)?;
+    if args.build_only {
+        println!("Since it's build only, exiting...");
+        return Ok(());
+    }
+
+    let test_flags = split_args(env.get("TEST_FLAGS").unwrap_or(&String::new()));
+    args.config_info
+        .setup(&mut env, &test_flags, Some(&args.gcc_path))?;
+
+    if args.runners.is_empty() {
+        run_all(&env, &args)?;
+    } else {
+        let runners = get_runners();
+        for runner in args.runners.iter() {
+            runners.get(runner.as_str()).unwrap().1(&env, &args)?;
+        }
+    }
+
+    Ok(())
 }
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 536f33a80293..ba1e040cb20f 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -143,17 +143,56 @@ pub fn get_os_name() -> Result<String, String> {
     }
 }
 
-pub fn get_rustc_host_triple() -> Result<String, String> {
-    let output = run_command(&[&"rustc", &"-vV"], None)?;
+#[derive(Default)]
+pub struct RustcVersionInfo {
+    pub version: String,
+    pub host: Option<String>,
+    pub commit_hash: Option<String>,
+    pub commit_date: Option<String>,
+}
+
+pub fn rustc_version_info(rustc: Option<&str>) -> Result<RustcVersionInfo, String> {
+    let output = run_command(&[&rustc.unwrap_or("rustc"), &"-vV"], None)?;
     let content = std::str::from_utf8(&output.stdout).unwrap_or("");
 
+    let mut info = RustcVersionInfo::default();
+
     for line in content.split('\n').map(|line| line.trim()) {
-        if !line.starts_with("host:") {
-            continue;
+        match line.split_once(':') {
+            Some(("host", data)) => info.host = Some(data.trim().to_string()),
+            Some(("release", data)) => info.version = data.trim().to_string(),
+            Some(("commit-hash", data)) => info.commit_hash = Some(data.trim().to_string()),
+            Some(("commit-date", data)) => info.commit_date = Some(data.trim().to_string()),
+            _ => {}
         }
-        return Ok(line.split(':').nth(1).unwrap().trim().to_string());
     }
-    Err("Cannot find host triple".to_string())
+    if info.version.is_empty() {
+        Err("failed to retrieve rustc version".to_string())
+    } else {
+        Ok(info)
+    }
+}
+
+pub fn get_toolchain() -> Result<String, String> {
+    let content = match fs::read_to_string("rust-toolchain") {
+        Ok(content) => content,
+        Err(_) => return Err("No `rust-toolchain` file found".to_string()),
+    };
+    match content
+        .split('\n')
+        .map(|line| line.trim())
+        .filter(|line| !line.is_empty())
+        .filter_map(|line| {
+            if !line.starts_with("channel") {
+                return None;
+            }
+            line.split('"').skip(1).next()
+        })
+        .next()
+    {
+        Some(toolchain) => Ok(toolchain.to_string()),
+        None => Err("Couldn't find `channel` in `rust-toolchain` file".to_string()),
+    }
 }
 
 pub fn get_gcc_path() -> Result<String, String> {
@@ -238,3 +277,56 @@ where
     }
     Ok(())
 }
+
+pub fn split_args(args: &str) -> Vec<String> {
+    let mut out = Vec::new();
+    let mut start = 0;
+    let mut iter = args.char_indices().peekable();
+
+    while iter.peek().is_some() {
+        while let Some((pos, c)) = iter.next() {
+            if c == ' ' {
+                if pos != 0 {
+                    out.push(args[start..pos].to_string());
+                }
+                let mut found_start = false;
+                while let Some((pos, c)) = iter.peek() {
+                    if *c != ' ' {
+                        start = *pos;
+                        found_start = true;
+                        break;
+                    } else {
+                        iter.next();
+                    }
+                }
+                if !found_start {
+                    return out;
+                }
+            } else if c == '"' || c == '\'' {
+                let end = c;
+                let mut found_end = false;
+                while let Some((_, c)) = iter.next() {
+                    if c == end {
+                        found_end = true;
+                        break;
+                    } else if c == '\\' {
+                        // We skip the escaped character.
+                        iter.next();
+                    }
+                }
+                if !found_end {
+                    out.push(args[start..].to_string());
+                    return out;
+                }
+            } else if c == '\\' {
+                // We skip the escaped character.
+                iter.next();
+            }
+        }
+    }
+    let s = args[start..].trim();
+    if !s.is_empty() {
+        out.push(s.to_string());
+    }
+    out
+}

From 84ca4f59c21425b02ba2042297187953d9aa283e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 16 Nov 2023 22:51:51 +0100
Subject: [PATCH 448/997] Remove `test.sh`, `config.sh` and all calls and
 documentation pointing to it

---
 .github/workflows/ci.yml       |   2 +-
 .github/workflows/failures.yml |   2 +-
 .github/workflows/gcc12.yml    |   2 +-
 .github/workflows/m68k.yml     |   2 +-
 .github/workflows/release.yml  |   2 +-
 .github/workflows/stdarch.yml  |   2 +-
 Readme.md                      |   4 +-
 config.sh                      |  85 ------
 test.sh                        | 479 ---------------------------------
 9 files changed, 8 insertions(+), 572 deletions(-)
 delete mode 100644 config.sh
 delete mode 100755 test.sh

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 308bc55ead71..8e361bf617b1 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -124,7 +124,7 @@ jobs:
     - name: Run tests
       run: |
         # TODO: remove --features master when it is back to the default.
-        ./test.sh --features master --release --clean --build-sysroot ${{ matrix.commands }}
+        ./y.sh test --features master --release --clean --build-sysroot ${{ matrix.commands }}
 
   duplicates:
     runs-on: ubuntu-latest
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index ae8de79b773d..b411b9a17846 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -128,5 +128,5 @@ jobs:
     - name: Run tests
       id: tests
       run: |
-        ${{ matrix.libgccjit_version.env_extra }} ./test.sh --release --clean --build-sysroot --test-failing-rustc ${{ matrix.libgccjit_version.extra }} | tee output_log
+        ${{ matrix.libgccjit_version.env_extra }} ./y.sh test --release --clean --build-sysroot --test-failing-rustc ${{ matrix.libgccjit_version.extra }} | tee output_log
         rg --text "test result" output_log >> $GITHUB_STEP_SUMMARY
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index a0d363cf1fbd..1a17b936c743 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -112,4 +112,4 @@ jobs:
 
     - name: Run tests
       run: |
-        ./test.sh --release --clean --build-sysroot ${{ matrix.commands }} --no-default-features
+        ./y.sh test --release --clean --build-sysroot ${{ matrix.commands }} --no-default-features
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 4d9d7e23dc2b..ac141e062479 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -139,4 +139,4 @@ jobs:
     - name: Run tests
       run: |
         # TODO: remove --features master when it is back to the default.
-        ./test.sh --release --features master --clean --build-sysroot ${{ matrix.commands }}
+        ./y.sh test --release --features master --clean --build-sysroot ${{ matrix.commands }}
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 43b90fcec933..9798bc338f3d 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -105,4 +105,4 @@ jobs:
     - name: Run tests
       run: |
         # TODO: remove --features master when it is back to the default.
-        EMBED_LTO_BITCODE=1 ./test.sh --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }} --features master
+        EMBED_LTO_BITCODE=1 ./y.sh test --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }} --features master
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 42109ba3e024..d290f1d05628 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -120,7 +120,7 @@ jobs:
       if: ${{ !matrix.cargo_runner }}
       run: |
         # TODO: remove `--features master` when it is back to the default.
-        ./test.sh --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore --features master
+        ./y.sh test --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore --features master
 
     - name: Run stdarch tests
       if: ${{ !matrix.cargo_runner }}
diff --git a/Readme.md b/Readme.md
index 9db1dec10323..68effb2bf78f 100644
--- a/Readme.md
+++ b/Readme.md
@@ -65,7 +65,7 @@ $ LIBRARY_PATH=$(cat gcc_path) LD_LIBRARY_PATH=$(cat gcc_path) ./y.sh build --re
 To run the tests:
 
 ```bash
-$ ./test.sh --release --features master
+$ ./y.sh test --release --features master
 ```
 
 ## Usage
@@ -82,7 +82,7 @@ export CG_GCCJIT_DIR=[the full path to rustc_codegen_gcc]
 $ CHANNEL="release" $CG_GCCJIT_DIR/cargo.sh run
 ```
 
-If you compiled cg_gccjit in debug mode (aka you didn't pass `--release` to `./test.sh`) you should use `CHANNEL="debug"` instead or omit `CHANNEL="release"` completely.
+If you compiled cg_gccjit in debug mode (aka you didn't pass `--release` to `./y.sh test`) you should use `CHANNEL="debug"` instead or omit `CHANNEL="release"` completely.
 
 ### LTO
 
diff --git a/config.sh b/config.sh
deleted file mode 100644
index 7ae2175d41de..000000000000
--- a/config.sh
+++ /dev/null
@@ -1,85 +0,0 @@
-set -e
-
-export CARGO_INCREMENTAL=0
-
-if [ -f ./gcc_path ]; then
-    export GCC_PATH=$(cat gcc_path)
-elif (( $use_system_gcc == 1 )); then
-    echo 'Using system GCC'
-else
-    echo 'Please put the path to your custom build of libgccjit in the file `gcc_path`, see Readme.md for details'
-    exit 1
-fi
-
-if [[ -z "$RUSTC" ]]; then
-    export RUSTC="rustc"
-fi
-
-unamestr=`uname`
-if [[ "$unamestr" == 'Linux' ]]; then
-    dylib_ext='so'
-elif [[ "$unamestr" == 'Darwin' ]]; then
-    dylib_ext='dylib'
-else
-    echo "Unsupported os"
-    exit 1
-fi
-
-HOST_TRIPLE=$($RUSTC -vV | grep host | cut -d: -f2 | tr -d " ")
-# TODO: remove $OVERWRITE_TARGET_TRIPLE when config.sh is removed.
-TARGET_TRIPLE="${OVERWRITE_TARGET_TRIPLE:-$HOST_TRIPLE}"
-
-linker=''
-RUN_WRAPPER=''
-if [[ "$HOST_TRIPLE" != "$TARGET_TRIPLE" ]]; then
-    RUN_WRAPPER=run_in_vm
-    if [[ "$TARGET_TRIPLE" == "m68k-unknown-linux-gnu" ]]; then
-        linker='-Clinker=m68k-unknown-linux-gnu-gcc'
-    elif [[ "$TARGET_TRIPLE" == "aarch64-unknown-linux-gnu" ]]; then
-        # We are cross-compiling for aarch64. Use the correct linker and run tests in qemu.
-        linker='-Clinker=aarch64-linux-gnu-gcc'
-    else
-        echo "Unknown non-native platform"
-    fi
-fi
-
-# Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
-# TODO(antoyo): remove when we can handle ThinLTO.
-disable_lto_flags=''
-if [[ ! -v FAT_LTO ]]; then
-    disable_lto_flags='-Clto=off'
-fi
-
-if [[ -z "$BUILTIN_BACKEND" ]]; then
-    export RUSTFLAGS="$CG_RUSTFLAGS $linker -Csymbol-mangling-version=v0 -Cdebuginfo=2 $disable_lto_flags -Zcodegen-backend=$(pwd)/target/${CHANNEL:-debug}/librustc_codegen_gcc.$dylib_ext --sysroot $(pwd)/build_sysroot/sysroot $TEST_FLAGS"
-else
-    export RUSTFLAGS="$CG_RUSTFLAGS $linker -Csymbol-mangling-version=v0 -Cdebuginfo=2 $disable_lto_flags -Zcodegen-backend=gcc $TEST_FLAGS -Cpanic=abort"
-
-    if [[ ! -z "$RUSTC_SYSROOT" ]]; then
-        export RUSTFLAGS="$RUSTFLAGS --sysroot $RUSTC_SYSROOT"
-    fi
-fi
-
-# FIXME(antoyo): remove once the atomic shim is gone
-if [[ unamestr == 'Darwin' ]]; then
-    export RUSTFLAGS="$RUSTFLAGS -Clink-arg=-undefined -Clink-arg=dynamic_lookup"
-fi
-
-if [[ -z "$cargo_target_dir" ]]; then
-    RUST_CMD="$RUSTC $RUSTFLAGS -L crate=target/out --out-dir target/out"
-    cargo_target_dir="target/out"
-else
-    RUST_CMD="$RUSTC $RUSTFLAGS -L crate=$cargo_target_dir --out-dir $cargo_target_dir"
-fi
-export RUSTC_LOG=warn # display metadata load errors
-
-export LD_LIBRARY_PATH="$(pwd)/target/out:$(pwd)/build_sysroot/sysroot/lib/rustlib/$TARGET_TRIPLE/lib"
-if [[ ! -z "$:$GCC_PATH" ]]; then
-    export LD_LIBRARY_PATH="$LD_LIBRARY_PATH:$GCC_PATH"
-fi
-
-export DYLD_LIBRARY_PATH=$LD_LIBRARY_PATH
-# NOTE: To avoid the -fno-inline errors, use /opt/gcc/bin/gcc instead of cc.
-# To do so, add a symlink for cc to /opt/gcc/bin/gcc in our PATH.
-# Another option would be to add the following Rust flag: -Clinker=/opt/gcc/bin/gcc
-export PATH="/opt/gcc/bin:/opt/m68k-unknown-linux-gnu/bin:$PATH"
diff --git a/test.sh b/test.sh
deleted file mode 100755
index e896237a1ea4..000000000000
--- a/test.sh
+++ /dev/null
@@ -1,479 +0,0 @@
-#!/usr/bin/env bash
-
-# TODO(antoyo): rewrite to cargo-make (or just) or something like that to only rebuild the sysroot when needed?
-
-set -e
-#set -x
-
-flags=
-gcc_master_branch=1
-channel="debug"
-funcs=()
-build_only=0
-nb_parts=0
-current_part=0
-use_system_gcc=0
-use_backend=0
-cargo_target_dir=""
-
-export CHANNEL='debug'
-
-while [[ $# -gt 0 ]]; do
-    case $1 in
-        --release)
-            codegen_channel=release
-            channel="release"
-            export CHANNEL='release'
-            shift
-            ;;
-        --release-sysroot)
-            sysroot_channel="--release"
-            shift
-            ;;
-        --no-default-features)
-            gcc_master_branch=0
-            flags="$flags --no-default-features"
-            shift
-            ;;
-        --features)
-            shift
-            flags="$flags --features $1"
-            shift
-            ;;
-        "--test-rustc")
-            funcs+=(test_rustc)
-            shift
-            ;;
-        "--test-successful-rustc")
-            funcs+=(test_successful_rustc)
-            shift
-            ;;
-        "--test-failing-rustc")
-            funcs+=(test_failing_rustc)
-            shift
-            ;;
-
-        "--test-libcore")
-            funcs+=(test_libcore)
-            shift
-            ;;
-
-        "--clean-ui-tests")
-            funcs+=(clean_ui_tests)
-            shift
-            ;;
-        "--clean")
-            funcs+=(clean)
-            shift
-            ;;
-
-        "--std-tests")
-            funcs+=(std_tests)
-            shift
-            ;;
-
-        "--asm-tests")
-            funcs+=(asm_tests)
-            shift
-            ;;
-
-        "--extended-tests")
-            funcs+=(extended_sysroot_tests)
-            shift
-            ;;
-        "--extended-rand-tests")
-            funcs+=(extended_rand_tests)
-            shift
-            ;;
-        "--extended-regex-example-tests")
-            funcs+=(extended_regex_example_tests)
-            shift
-            ;;
-        "--extended-regex-tests")
-            funcs+=(extended_regex_tests)
-            shift
-            ;;
-
-        "--mini-tests")
-            funcs+=(mini_tests)
-            shift
-            ;;
-
-        "--build-sysroot")
-            funcs+=(build_sysroot)
-            shift
-            ;;
-        "--build")
-            build_only=1
-            shift
-            ;;
-        "--use-system-gcc")
-            use_system_gcc=1
-            shift
-            ;;
-        "--use-backend")
-            use_backend=1
-            shift
-            export BUILTIN_BACKEND=$1
-            shift
-            ;;
-        "--out-dir")
-            shift
-            export CARGO_TARGET_DIR=$1
-            cargo_target_dir=$1
-            shift
-            ;;
-        "--nb-parts")
-            shift
-            nb_parts=$1
-            shift
-            ;;
-        "--current-part")
-            shift
-            current_part=$1
-            shift
-            ;;
-        *)
-            echo "Unknown option $1"
-            exit 1
-            ;;
-    esac
-done
-
-if [ -f ./gcc_path ]; then
-    export GCC_PATH=$(cat gcc_path)
-elif (( $use_system_gcc == 1 )); then
-    echo 'Using system GCC'
-else
-    echo 'Please put the path to your custom build of libgccjit in the file `gcc_path`, see Readme.md for details'
-    exit 1
-fi
-
-export LD_LIBRARY_PATH="$GCC_PATH"
-export LIBRARY_PATH="$GCC_PATH"
-
-if [[ $use_backend == 0 ]]; then
-    if [[ $channel == "release" ]]; then
-        CARGO_INCREMENTAL=1 cargo rustc --release $flags
-    else
-        echo $LD_LIBRARY_PATH
-        cargo rustc $flags
-    fi
-fi
-
-if (( $build_only == 1 )); then
-    echo "Since it's 'build-only', exiting..."
-    exit
-fi
-
-source config.sh
-
-function clean() {
-    rm -r $cargo_target_dir || true
-    mkdir -p $cargo_target_dir/gccjit
-}
-
-function mini_tests() {
-    echo "[BUILD] mini_core"
-    crate_types="lib,dylib"
-
-    if [[ "$HOST_TRIPLE" != "$TARGET_TRIPLE" ]]; then
-        crate_types="lib"
-    fi
-
-    $RUST_CMD example/mini_core.rs --crate-name mini_core --crate-type $crate_types --target $TARGET_TRIPLE
-
-    echo "[BUILD] example"
-    $RUST_CMD example/example.rs --crate-type lib --target $TARGET_TRIPLE
-
-    echo "[AOT] mini_core_hello_world"
-    $RUST_CMD example/mini_core_hello_world.rs --crate-name mini_core_hello_world --crate-type bin -g --target $TARGET_TRIPLE
-    $RUN_WRAPPER $cargo_target_dir/mini_core_hello_world abc bcd
-}
-
-function build_sysroot() {
-    echo "[BUILD] sysroot"
-    time ./build_sysroot/build_sysroot.sh $sysroot_channel
-}
-
-# TODO(GuillaumeGomez): when rewriting in Rust, refactor with the code in tests/lang_tests_common.rs if possible.
-function run_in_vm() {
-    vm_parent_dir=${CG_GCC_VM_DIR:-$(pwd)}
-    vm_dir=vm
-    exe=$1
-    exe_filename=$(basename $exe)
-    vm_home_dir=$vm_parent_dir/$vm_dir/home
-    vm_exe_path=$vm_home_dir/$exe_filename
-    inside_vm_exe_path=/home/$exe_filename
-    sudo cp $exe $vm_exe_path
-
-    shift
-    pushd $vm_parent_dir
-    sudo chroot $vm_dir qemu-m68k-static $inside_vm_exe_path $@
-    popd
-}
-
-function std_tests() {
-    echo "[AOT] arbitrary_self_types_pointers_and_wrappers"
-    $RUST_CMD example/arbitrary_self_types_pointers_and_wrappers.rs --crate-name arbitrary_self_types_pointers_and_wrappers --crate-type bin --target $TARGET_TRIPLE
-    $RUN_WRAPPER $cargo_target_dir/arbitrary_self_types_pointers_and_wrappers
-
-    echo "[AOT] alloc_system"
-    $RUST_CMD example/alloc_system.rs --crate-type lib --target "$TARGET_TRIPLE"
-
-    # FIXME: doesn't work on m68k.
-    if [[ "$HOST_TRIPLE" == "$TARGET_TRIPLE" ]]; then
-        echo "[AOT] alloc_example"
-        $RUST_CMD example/alloc_example.rs --crate-type bin --target $TARGET_TRIPLE
-        $RUN_WRAPPER $cargo_target_dir/alloc_example
-    fi
-
-    echo "[AOT] dst_field_align"
-    # FIXME(antoyo): Re-add -Zmir-opt-level=2 once rust-lang/rust#67529 is fixed.
-    $RUST_CMD example/dst-field-align.rs --crate-name dst_field_align --crate-type bin --target $TARGET_TRIPLE
-    $RUN_WRAPPER $cargo_target_dir/dst_field_align || (echo $?; false)
-
-    echo "[AOT] std_example"
-    std_flags="--cfg feature=\"master\""
-    if (( $gcc_master_branch == 0 )); then
-        std_flags=""
-    fi
-    $RUST_CMD example/std_example.rs --crate-type bin --target $TARGET_TRIPLE $std_flags
-    $RUN_WRAPPER $cargo_target_dir/std_example --target $TARGET_TRIPLE
-
-    echo "[AOT] subslice-patterns-const-eval"
-    $RUST_CMD example/subslice-patterns-const-eval.rs --crate-type bin $TEST_FLAGS --target $TARGET_TRIPLE
-    $RUN_WRAPPER $cargo_target_dir/subslice-patterns-const-eval
-
-    echo "[AOT] track-caller-attribute"
-    $RUST_CMD example/track-caller-attribute.rs --crate-type bin $TEST_FLAGS --target $TARGET_TRIPLE
-    $RUN_WRAPPER $cargo_target_dir/track-caller-attribute
-
-    echo "[BUILD] mod_bench"
-    $RUST_CMD example/mod_bench.rs --crate-type bin --target $TARGET_TRIPLE
-}
-
-function setup_rustc() {
-    rust_toolchain=$(cat rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
-
-    git clone https://github.com/rust-lang/rust.git || true
-    cd rust
-    git fetch
-    git checkout $($RUSTC -V | cut -d' ' -f3 | tr -d '(')
-    export RUSTFLAGS=
-
-    rm config.toml || true
-
-    cat > config.toml <<EOF
-change-id = 115898
-
-[rust]
-codegen-backends = []
-deny-warnings = false
-verbose-tests = true
-
-[build]
-cargo = "$(rustup which cargo)"
-local-rebuild = true
-rustc = "$HOME/.rustup/toolchains/$rust_toolchain-$HOST_TRIPLE/bin/rustc"
-
-[target.x86_64-unknown-linux-gnu]
-llvm-filecheck = "`which FileCheck-10 || which FileCheck-11 || which FileCheck-12 || which FileCheck-13 || which FileCheck-14`"
-
-[llvm]
-download-ci-llvm = false
-EOF
-
-    $RUSTC -V | cut -d' ' -f3 | tr -d '('
-    git checkout $($RUSTC -V | cut -d' ' -f3 | tr -d '(') tests
-}
-
-function asm_tests() {
-    setup_rustc
-
-    echo "[TEST] rustc asm test suite"
-    RUSTC_ARGS="-Zpanic-abort-tests -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot -Cpanic=abort"
-    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/assembly/asm --rustc-args "$RUSTC_ARGS"
-}
-
-# FIXME(antoyo): linker gives multiple definitions error on Linux
-#echo "[BUILD] sysroot in release mode"
-#./build_sysroot/build_sysroot.sh --release
-
-function test_libcore() {
-    pushd build_sysroot/sysroot_src/library/core/tests
-    echo "[TEST] libcore"
-    rm -r ./target || true
-    ../../../../../cargo.sh test
-    popd
-}
-
-#echo
-#echo "[BENCH COMPILE] mod_bench"
-
-#COMPILE_MOD_BENCH_INLINE="$RUSTC example/mod_bench.rs --crate-type bin -Zmir-opt-level=3 -O --crate-name mod_bench_inline"
-#COMPILE_MOD_BENCH_LLVM_0="rustc example/mod_bench.rs --crate-type bin -Copt-level=0 -o $cargo_target_dir/mod_bench_llvm_0 -Cpanic=abort"
-#COMPILE_MOD_BENCH_LLVM_1="rustc example/mod_bench.rs --crate-type bin -Copt-level=1 -o $cargo_target_dir/mod_bench_llvm_1 -Cpanic=abort"
-#COMPILE_MOD_BENCH_LLVM_2="rustc example/mod_bench.rs --crate-type bin -Copt-level=2 -o $cargo_target_dir/mod_bench_llvm_2 -Cpanic=abort"
-#COMPILE_MOD_BENCH_LLVM_3="rustc example/mod_bench.rs --crate-type bin -Copt-level=3 -o $cargo_target_dir/mod_bench_llvm_3 -Cpanic=abort"
-
-## Use 100 runs, because a single compilations doesn't take more than ~150ms, so it isn't very slow
-#hyperfine --runs ${COMPILE_RUNS:-100} "$COMPILE_MOD_BENCH_INLINE" "$COMPILE_MOD_BENCH_LLVM_0" "$COMPILE_MOD_BENCH_LLVM_1" "$COMPILE_MOD_BENCH_LLVM_2" "$COMPILE_MOD_BENCH_LLVM_3"
-
-#echo
-#echo "[BENCH RUN] mod_bench"
-#hyperfine --runs ${RUN_RUNS:-10} $cargo_target_dir/mod_bench{,_inline} $cargo_target_dir/mod_bench_llvm_*
-
-function extended_rand_tests() {
-    if (( $gcc_master_branch == 0 )); then
-        return
-    fi
-
-    pushd rand
-    cargo clean
-    echo "[TEST] rust-random/rand"
-    ../cargo.sh test --workspace
-    popd
-}
-
-function extended_regex_example_tests() {
-    if (( $gcc_master_branch == 0 )); then
-        return
-    fi
-
-    pushd regex
-    echo "[TEST] rust-lang/regex example shootout-regex-dna"
-    cargo clean
-    export CG_RUSTFLAGS="--cap-lints warn" # newer aho_corasick versions throw a deprecation warning
-    # Make sure `[codegen mono items] start` doesn't poison the diff
-    ../cargo.sh build --example shootout-regex-dna
-    cat examples/regexdna-input.txt \
-        | ../cargo.sh run --example shootout-regex-dna \
-        | grep -v "Spawned thread" > res.txt
-    diff -u res.txt examples/regexdna-output.txt
-    popd
-}
-
-function extended_regex_tests() {
-    if (( $gcc_master_branch == 0 )); then
-        return
-    fi
-
-    pushd regex
-    echo "[TEST] rust-lang/regex tests"
-    export CG_RUSTFLAGS="--cap-lints warn" # newer aho_corasick versions throw a deprecation warning
-    ../cargo.sh test --tests -- --exclude-should-panic --test-threads 1 -Zunstable-options -q
-    popd
-}
-
-function extended_sysroot_tests() {
-    #pushd simple-raytracer
-    #echo "[BENCH COMPILE] ebobby/simple-raytracer"
-    #hyperfine --runs "${RUN_RUNS:-10}" --warmup 1 --prepare "cargo clean" \
-    #"RUSTC=rustc RUSTFLAGS='' cargo build" \
-    #"../cargo.sh build"
-
-    #echo "[BENCH RUN] ebobby/simple-raytracer"
-    #cp ./target/debug/main ./raytracer_cg_gcc
-    #hyperfine --runs "${RUN_RUNS:-10}" ./raytracer_cg_llvm ./raytracer_cg_gcc
-    #popd
-
-    extended_rand_tests
-    extended_regex_example_tests
-    extended_regex_tests
-}
-
-function test_rustc() {
-    echo
-    echo "[TEST] rust-lang/rust"
-
-    setup_rustc
-
-    for test in $(rg -i --files-with-matches "//(\[\w+\])?~|// error-pattern:|// build-fail|// run-fail|-Cllvm-args" tests/ui); do
-      rm $test
-    done
-    rm tests/ui/consts/const_cmp_type_id.rs
-    rm tests/ui/consts/issue-73976-monomorphic.rs
-
-    git checkout -- tests/ui/issues/auxiliary/issue-3136-a.rs # contains //~ERROR, but shouldn't be removed
-
-    rm -r tests/ui/{abi*,extern/,unsized-locals/,proc-macro/,threads-sendsync/,borrowck/,test*,consts/issue-miri-1910.rs} || true
-    rm tests/ui/mir/mir_heavy_promoted.rs # this test is oom-killed in the CI.
-    # Tests generating errors.
-    rm tests/ui/consts/issue-94675.rs
-    for test in $(rg --files-with-matches "thread" tests/ui); do
-      rm $test
-    done
-    git checkout tests/ui/type-alias-impl-trait/auxiliary/cross_crate_ice.rs
-    git checkout tests/ui/type-alias-impl-trait/auxiliary/cross_crate_ice2.rs
-    git checkout tests/ui/macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs
-    git checkout tests/ui/imports/ambiguous-1.rs
-    git checkout tests/ui/imports/ambiguous-4-extern.rs
-    git checkout tests/ui/entry-point/auxiliary/bad_main_functions.rs
-
-    RUSTC_ARGS="$TEST_FLAGS -Csymbol-mangling-version=v0 -Zcodegen-backend="$(pwd)"/../target/"$CHANNEL"/librustc_codegen_gcc."$dylib_ext" --sysroot "$(pwd)"/../build_sysroot/sysroot"
-
-    if [ $# -eq 0 ]; then
-        # No argument supplied to the function. Doing nothing.
-        echo "No argument provided. Keeping all UI tests"
-    elif [ $1 = "0" ]; then
-        # Removing the failing tests.
-        xargs -a ../failing-ui-tests.txt -d'\n' rm
-    else
-        # Removing all tests.
-        find tests/ui -type f -name '*.rs' -not -path '*/auxiliary/*' -delete
-        # Putting back only the failing ones.
-        xargs -a ../failing-ui-tests.txt -d'\n' git checkout --
-    fi
-
-    if [ $nb_parts -gt 0 ]; then
-        echo "Splitting ui_test into $nb_parts parts (and running part $current_part)"
-        find tests/ui -type f -name '*.rs' -not -path "*/auxiliary/*" > ui_tests
-        # To ensure it'll be always the same sub files, we sort the content.
-        sort ui_tests -o ui_tests
-        count=$((`wc -l < ui_tests` / $nb_parts))
-        # We increment the number of tests by one because if this is an odd number, we would skip
-        # one test.
-        count=$((count + 1))
-        split -d -l $count -a 1 ui_tests ui_tests.split
-        # Removing all tests.
-        find tests/ui -type f -name '*.rs' -not -path "*/auxiliary/*" -delete
-        # Putting back only the ones we want to test.
-        xargs -a "ui_tests.split$current_part" -d'\n' git checkout --
-    fi
-
-    echo "[TEST] rustc test suite"
-    COMPILETEST_FORCE_STAGE0=1 ./x.py test --run always --stage 0 tests/ui/ --rustc-args "$RUSTC_ARGS" # --target $TARGET_TRIPLE
-}
-
-function test_failing_rustc() {
-    test_rustc "1"
-}
-
-function test_successful_rustc() {
-    test_rustc "0"
-}
-
-function clean_ui_tests() {
-    find rust/build/x86_64-unknown-linux-gnu/test/ui/ -name stamp -delete
-}
-
-function all() {
-    clean
-    mini_tests
-    build_sysroot
-    std_tests
-    #asm_tests
-    test_libcore
-    extended_sysroot_tests
-    test_rustc
-}
-
-if [ ${#funcs[@]} -eq 0 ]; then
-    echo "No command passed, running '--all'..."
-    all
-else
-    for t in ${funcs[@]}; do
-        $t
-    done
-fi

From d3e14a49c9710a93ebd315b1b54a596496531de7 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 21 Nov 2023 16:29:32 +0100
Subject: [PATCH 449/997] Display stdout and stderr if a command failed to run

---
 build_system/src/build.rs | 13 ++++++++---
 build_system/src/main.rs  |  2 +-
 build_system/src/utils.rs | 47 ++++++++++++++++++++++++++-------------
 3 files changed, 42 insertions(+), 20 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 6390458d4fd0..43fa442bf5b2 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -189,9 +189,16 @@ fn build_sysroot_inner(
 
     // Copy the source files to the sysroot (Rust for Linux needs this).
     let sysroot_src_path = "sysroot/lib/rustlib/src/rust";
-    fs::create_dir_all(&sysroot_src_path)
-        .map_err(|error| format!("Failed to create directory `{}`: {:?}", sysroot_src_path, error))?;
-    run_command(&[&"cp", &"-r", &"sysroot_src/library/", &sysroot_src_path], None)?;
+    fs::create_dir_all(&sysroot_src_path).map_err(|error| {
+        format!(
+            "Failed to create directory `{}`: {:?}",
+            sysroot_src_path, error
+        )
+    })?;
+    run_command(
+        &[&"cp", &"-r", &"sysroot_src/library/", &sysroot_src_path],
+        None,
+    )?;
 
     Ok(())
 }
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index bff82b6e3e57..e0091ff69773 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -61,7 +61,7 @@ fn main() {
         Command::Build => build::run(),
         Command::Test => test::run(),
     } {
-        eprintln!("Command failed to run: {e:?}");
+        eprintln!("Command failed to run: {e}");
         process::exit(1);
     }
 }
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index ba1e040cb20f..6dfc6a6506aa 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -29,22 +29,37 @@ fn check_exit_status(
     input: &[&dyn AsRef<OsStr>],
     cwd: Option<&Path>,
     exit_status: ExitStatus,
+    output: Option<&Output>,
 ) -> Result<(), String> {
     if exit_status.success() {
-        Ok(())
-    } else {
-        Err(format!(
-            "Command `{}`{} exited with status {:?}",
-            input
-                .iter()
-                .map(|s| s.as_ref().to_str().unwrap())
-                .collect::<Vec<_>>()
-                .join(" "),
-            cwd.map(|cwd| format!(" (running in folder `{}`)", cwd.display()))
-                .unwrap_or_default(),
-            exit_status.code(),
-        ))
+        return Ok(());
     }
+    let mut error = format!(
+        "Command `{}`{} exited with status {:?}",
+        input
+            .iter()
+            .map(|s| s.as_ref().to_str().unwrap())
+            .collect::<Vec<_>>()
+            .join(" "),
+        cwd.map(|cwd| format!(" (running in folder `{}`)", cwd.display()))
+            .unwrap_or_default(),
+        exit_status.code()
+    );
+    if let Some(output) = output {
+        unsafe {
+            let stdout = std::str::from_utf8_unchecked(&output.stdout);
+            if !stdout.is_empty() {
+                error.push_str("\n==== STDOUT ====\n");
+                error.push_str(stdout);
+            }
+            let stderr = std::str::from_utf8_unchecked(&output.stderr);
+            if !stderr.is_empty() {
+                error.push_str("\n==== STDERR ====\n");
+                error.push_str(stderr);
+            }
+        }
+    }
+    Err(error)
 }
 
 fn command_error<D: Debug>(input: &[&dyn AsRef<OsStr>], cwd: &Option<&Path>, error: D) -> String {
@@ -73,7 +88,7 @@ pub fn run_command_with_env(
     let output = get_command_inner(input, cwd, env)
         .output()
         .map_err(|e| command_error(input, &cwd, e))?;
-    check_exit_status(input, cwd, output.status)?;
+    check_exit_status(input, cwd, output.status, Some(&output))?;
     Ok(output)
 }
 
@@ -86,7 +101,7 @@ pub fn run_command_with_output(
         .map_err(|e| command_error(input, &cwd, e))?
         .wait()
         .map_err(|e| command_error(input, &cwd, e))?;
-    check_exit_status(input, cwd, exit_status)?;
+    check_exit_status(input, cwd, exit_status, None)?;
     Ok(())
 }
 
@@ -100,7 +115,7 @@ pub fn run_command_with_output_and_env(
         .map_err(|e| command_error(input, &cwd, e))?
         .wait()
         .map_err(|e| command_error(input, &cwd, e))?;
-    check_exit_status(input, cwd, exit_status)?;
+    check_exit_status(input, cwd, exit_status, None)?;
     Ok(())
 }
 

From 8cc024c84dc76cb081bbaf8ae2eef4647ed8d78b Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 21 Nov 2023 18:38:30 +0100
Subject: [PATCH 450/997] Fix invalid path in `build_sysroot_inner`

---
 build_system/src/build.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 43fa442bf5b2..8f5c113fe319 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -196,7 +196,7 @@ fn build_sysroot_inner(
         )
     })?;
     run_command(
-        &[&"cp", &"-r", &"sysroot_src/library/", &sysroot_src_path],
+        &[&"cp", &"-r", &start_dir.join("sysroot_src/library/"), &sysroot_src_path],
         None,
     )?;
 

From 694a80d3724cdf7138df550d64fcaceb5d1404b0 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 21 Nov 2023 21:38:16 +0100
Subject: [PATCH 451/997] Add missing `--build-sysroot` option

---
 build_system/src/test.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index fb2b24da9a23..2619fbc2f646 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -33,6 +33,7 @@ fn get_runners() -> Runners {
     runners.insert("--test-libcore", ("Run libcore tests", &test_libcore));
     runners.insert("--clean-ui-tests", ("Clean ui tests", &clean_ui_tests));
     runners.insert("--clean", ("Empty cargo target directory", &clean));
+    runners.insert("--build-sysroot", ("Build sysroot", &build_sysroot));
     runners.insert("--std-tests", ("Run std tests", &std_tests));
     runners.insert("--asm-tests", ("Run asm tests", &asm_tests));
     runners.insert(

From c27fe3e0366313933daf6f9a6b3df578bde2682b Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 22 Nov 2023 15:17:48 +0100
Subject: [PATCH 452/997] Correctly handle channel in config

---
 build_system/src/config.rs | 4 +++-
 build_system/src/test.rs   | 8 +++++---
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 763cac8edb66..8bab64f121ac 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -110,7 +110,9 @@ impl ConfigInfo {
 
         let current_dir =
             std_env::current_dir().map_err(|error| format!("`current_dir` failed: {:?}", error))?;
-        let channel = if let Some(channel) = env.get("CHANNEL") {
+        let channel = if self.sysroot_release_channel {
+            "release"
+        } else if let Some(channel) = env.get("CHANNEL") {
             channel.as_str()
         } else {
             "debug"
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 2619fbc2f646..06a5c3157bb2 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -126,7 +126,6 @@ struct TestArg {
     build_only: bool,
     gcc_path: String,
     channel: Channel,
-    sysroot_channel: Channel,
     use_backend: bool,
     runners: BTreeSet<String>,
     flags: Vec<String>,
@@ -148,8 +147,11 @@ impl TestArg {
 
         while let Some(arg) = args.next() {
             match arg.as_str() {
-                "--release" => test_arg.channel = Channel::Release,
-                "--release-sysroot" => test_arg.sysroot_channel = Channel::Release,
+                "--release" => {
+                    test_arg.channel = Channel::Release;
+                    test_arg.config_info.sysroot_release_channel = true;
+                }
+                "--release-sysroot" => test_arg.config_info.sysroot_release_channel = true,
                 "--no-default-features" => {
                     // To prevent adding it more than once.
                     if !test_arg.no_default_features {

From 9d104a0cbf0abbf5d2f5176298373510392e5a36 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 22 Nov 2023 17:01:05 +0100
Subject: [PATCH 453/997] Clone rust repository before modifying it

---
 build_system/src/test.rs | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 06a5c3157bb2..7785957541f5 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -895,6 +895,9 @@ where
 {
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[TEST] rust-lang/rust");
+    let mut env = env.clone();
+    setup_rustc(&mut env, args)?;
+
     walk_dir(
         "rust/tests/ui",
         |dir| {
@@ -948,8 +951,6 @@ where
     std::fs::remove_file(file)
         .map_err(|error| format!("Failed to remove `{}`: {:?}", file, error))?;
 
-    let mut env = env.clone();
-    setup_rustc(&mut env, args)?;
     if !callback()? {
         // FIXME: create a function "display_if_not_quiet" or something along the line.
         println!("Keeping all UI tests");

From 87c284c9bc05e290cb0ee577717a94de9e853c89 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 22 Nov 2023 17:20:14 +0100
Subject: [PATCH 454/997] Only read rust test files

---
 build_system/src/test.rs | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 7785957541f5..bbe2322f93d3 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -928,7 +928,9 @@ where
     }
     fn file_handling(file: &Path) -> Result<(), String> {
         let path_str = file.display().to_string().replace("\\", "/");
-        if should_not_remove_test(&path_str) {
+        if !path_str.ends_with(".rs") {
+            return Ok(())
+        } else if should_not_remove_test(&path_str) {
             return Ok(());
         } else if should_remove_test(file, &path_str) {
             return std::fs::remove_file(file)

From 23c97b545dd7d8dbee80e491269f95308707c750 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 22 Nov 2023 17:35:49 +0100
Subject: [PATCH 455/997] Replace `xargs` command with pure Rust

---
 build_system/src/build.rs |  7 ++++-
 build_system/src/test.rs  | 59 ++++++++++++++++++++++++---------------
 2 files changed, 42 insertions(+), 24 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 8f5c113fe319..3087a5d79e01 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -196,7 +196,12 @@ fn build_sysroot_inner(
         )
     })?;
     run_command(
-        &[&"cp", &"-r", &start_dir.join("sysroot_src/library/"), &sysroot_src_path],
+        &[
+            &"cp",
+            &"-r",
+            &start_dir.join("sysroot_src/library/"),
+            &sysroot_src_path,
+        ],
         None,
     )?;
 
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index bbe2322f93d3..12927c5d13ca 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -929,7 +929,7 @@ where
     fn file_handling(file: &Path) -> Result<(), String> {
         let path_str = file.display().to_string().replace("\\", "/");
         if !path_str.ends_with(".rs") {
-            return Ok(())
+            return Ok(());
         } else if should_not_remove_test(&path_str) {
             return Ok(());
         } else if should_remove_test(file, &path_str) {
@@ -1052,18 +1052,24 @@ fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
             Some(Path::new("rust")),
         )?;
         // Putting back only the failing ones.
-        run_command(
-            &[
-                &"xargs",
-                &"-a",
-                &"../failing-ui-tests.txt",
-                &"-d'\n'",
-                &"git",
-                &"checkout",
-                &"--",
-            ],
-            Some(Path::new("rust")),
-        )?;
+        let path = "failing-ui-tests.txt";
+        if let Ok(files) = std::fs::read_to_string(path) {
+            for file in files
+                .split('\n')
+                .map(|line| line.trim())
+                .filter(|line| !line.is_empty())
+            {
+                run_command(
+                    &[&"git", &"checkout", &"--", &file],
+                    Some(Path::new("rust")),
+                )?;
+            }
+        } else {
+            println!(
+                "Failed to read `{}`, not putting back failing ui tests",
+                path
+            );
+        }
         Ok(true)
     })
 }
@@ -1071,16 +1077,23 @@ fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
 fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
     test_rustc_inner(env, args, || {
         // Removing the failing tests.
-        run_command(
-            &[
-                &"xargs",
-                &"-a",
-                &"../failing-ui-tests.txt",
-                &"-d'\n'",
-                &"rm",
-            ],
-            Some(Path::new("rust")),
-        )?;
+        let path = "failing-ui-tests.txt";
+        if let Ok(files) = std::fs::read_to_string(path) {
+            for file in files
+                .split('\n')
+                .map(|line| line.trim())
+                .filter(|line| !line.is_empty())
+            {
+                let path = Path::new("rust").join(file);
+                std::fs::remove_file(&path)
+                    .map_err(|error| format!("failed to remove `{}`: {:?}", path.display(), error))?;
+            }
+        } else {
+            println!(
+                "Failed to read `{}`, not putting back failing ui tests",
+                path
+            );
+        }
         Ok(true)
     })
 }

From 673661db8b35fbbdc71b91af9b122a7eaf7f7bf3 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 22 Nov 2023 17:54:58 +0100
Subject: [PATCH 456/997] Remove newline for llvm FileCheck binary path

---
 build_system/src/test.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 12927c5d13ca..e175b62625cb 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -597,7 +597,7 @@ download-ci-llvm = false
             home = env.get("HOME").unwrap(),
             toolchain = toolchain,
             host_triple = args.config_info.host_triple,
-            llvm_filecheck = llvm_filecheck,
+            llvm_filecheck = llvm_filecheck.trim(),
         ),
     )
     .map_err(|error| format!("Failed to write into `rust/config.toml`: {:?}", error))?;

From d793f80bd4ceb85c032e18c1d0badac9a8664bba Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 23 Nov 2023 16:09:11 +0100
Subject: [PATCH 457/997] Correctly pass `cfg` option

---
 build_system/src/test.rs | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index e175b62625cb..614042b36c20 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -390,7 +390,7 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &args.config_info.target_triple,
     ]);
     if !args.no_default_features {
-        command.push(&"--cfg feature=\"master\"");
+        command.extend_from_slice(&[&"--cfg", &"feature=\"master\""]);
     }
     run_command_with_env(&command, None, Some(env))?;
 
@@ -454,7 +454,7 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &args.config_info.target_triple,
     ]);
     if !args.no_default_features {
-        command.push(&"--cfg feature=\"master\"");
+        command.extend_from_slice(&[&"--cfg", &"feature=\"master\""]);
     }
     run_command_with_env(&command, None, Some(env))?;
     run_command_in_vm(
@@ -1085,8 +1085,9 @@ fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
                 .filter(|line| !line.is_empty())
             {
                 let path = Path::new("rust").join(file);
-                std::fs::remove_file(&path)
-                    .map_err(|error| format!("failed to remove `{}`: {:?}", path.display(), error))?;
+                std::fs::remove_file(&path).map_err(|error| {
+                    format!("failed to remove `{}`: {:?}", path.display(), error)
+                })?;
             }
         } else {
             println!(

From 4bed89f79bfd40fdfe615334c38e2427319db34f Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 23 Nov 2023 16:25:52 +0100
Subject: [PATCH 458/997] Correctly pass toolchain to cargo command

---
 build_system/src/test.rs | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 614042b36c20..114aa6dc7207 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -672,17 +672,14 @@ where
     F: Fn(&[&dyn AsRef<OsStr>], Option<&Path>, &Env) -> Result<(), String>,
 {
     let toolchain = get_toolchain()?;
+    let toolchain_arg = format!("+{}", toolchain);
     let rustc_version = String::from_utf8(
         run_command_with_env(&[&args.config_info.rustc_command[0], &"-V"], cwd, Some(env))?.stdout,
     )
     .map_err(|error| format!("Failed to retrieve rustc version: {:?}", error))?;
     let rustc_toolchain_version = String::from_utf8(
         run_command_with_env(
-            &[
-                &args.config_info.rustc_command[0],
-                &format!("+{}", toolchain),
-                &"-V",
-            ],
+            &[&args.config_info.rustc_command[0], &toolchain_arg, &"-V"],
             cwd,
             Some(env),
         )?
@@ -697,7 +694,7 @@ where
         );
         eprintln!("Using `{}`.", rustc_toolchain_version);
     }
-    let mut cargo_command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &toolchain];
+    let mut cargo_command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &toolchain_arg];
     cargo_command.extend_from_slice(&command);
     callback(&cargo_command, cwd, env)
 }

From 3c6bae7fa88d700a34b57f43e55749c510c57b72 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 23 Nov 2023 16:41:16 +0100
Subject: [PATCH 459/997] Use the correct folder when deleting rust UI tests

---
 build_system/src/test.rs | 26 +++++++++++++++-----------
 1 file changed, 15 insertions(+), 11 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 114aa6dc7207..16f01a1ba2de 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -942,13 +942,15 @@ where
         Ok(())
     }
 
-    walk_dir("rust/tests/ui", dir_handling, file_handling)?;
-    let file = "rust/tests/ui/consts/const_cmp_type_id.rs";
-    std::fs::remove_file(file)
-        .map_err(|error| format!("Failed to remove `{}`: {:?}", file, error))?;
-    let file = "rust/tests/ui/consts/issue-73976-monomorphic.rs";
-    std::fs::remove_file(file)
-        .map_err(|error| format!("Failed to remove `{}`: {:?}", file, error))?;
+    let rust_path = Path::new("rust");
+
+    walk_dir(rust_path.join("tests/ui"), dir_handling, file_handling)?;
+    let file = rust_path.join("tests/ui/consts/const_cmp_type_id.rs");
+    std::fs::remove_file(&file)
+        .map_err(|error| format!("Failed to remove `{}`: {:?}", file.display(), error))?;
+    let file = rust_path.join("tests/ui/consts/issue-73976-monomorphic.rs");
+    std::fs::remove_file(&file)
+        .map_err(|error| format!("Failed to remove `{}`: {:?}", file.display(), error))?;
 
     if !callback()? {
         // FIXME: create a function "display_if_not_quiet" or something along the line.
@@ -976,7 +978,7 @@ where
                     &"-path",
                     &"*/auxiliary/*",
                 ],
-                Some(Path::new("rust")),
+                Some(rust_path),
             )?
             .stdout,
         )
@@ -997,8 +999,10 @@ where
             if pos >= start && pos <= end {
                 continue;
             }
-            std::fs::remove_file(path)
-                .map_err(|error| format!("Failed to remove `{}`: {:?}", path, error))?;
+            let test_path = rust_path.join(path);
+            std::fs::remove_file(&test_path).map_err(|error| {
+                format!("Failed to remove `{}`: {:?}", test_path.display(), error)
+            })?;
         }
     }
 
@@ -1020,7 +1024,7 @@ where
             &"--rustc-args",
             &rustc_args,
         ],
-        Some(Path::new("rust")),
+        Some(rust_path),
         Some(&env),
     )?;
     Ok(())

From 7013eccc052228044faa0103ca596ed75ea2a70e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 23 Nov 2023 17:05:33 +0100
Subject: [PATCH 460/997] Add missing code comment

---
 build_system/src/test.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 16f01a1ba2de..7ab4767e405d 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -794,6 +794,7 @@ fn extended_regex_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[TEST] rust-lang/regex tests");
     let mut env = env.clone();
+    // newer aho_corasick versions throw a deprecation warning
     env.insert("CG_RUSTFLAGS".to_string(), "--cap-lints warn".to_string());
     run_cargo_command(
         &[

From ad1d5417e705c8d915b718b8fc29e58c49b8defa Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 23 Nov 2023 17:11:07 +0100
Subject: [PATCH 461/997] Set RUSTDOCFLAGS environment variable in
 `run_cargo_command_with_callback` function

---
 build_system/src/test.rs | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 7ab4767e405d..02e6309bd338 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -694,9 +694,12 @@ where
         );
         eprintln!("Using `{}`.", rustc_toolchain_version);
     }
+    let mut env = env.clone();
+    let rustflags = env.get("RUSTFLAGS").cloned().unwrap_or_default();
+    env.insert("RUSTDOCFLAGS".to_string(), rustflags);
     let mut cargo_command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &toolchain_arg];
     cargo_command.extend_from_slice(&command);
-    callback(&cargo_command, cwd, env)
+    callback(&cargo_command, cwd, &env)
 }
 
 // FIXME(antoyo): linker gives multiple definitions error on Linux

From 7d71b87691c22d54a1119a491647db63d28b55d3 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 23 Nov 2023 18:10:01 +0100
Subject: [PATCH 462/997] Correctly set `--cap-lints` when running regex tests

---
 build_system/src/config.rs | 2 ++
 build_system/src/test.rs   | 6 ++++--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 8bab64f121ac..b31a728c6807 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -149,9 +149,11 @@ impl ConfigInfo {
                 .extend_from_slice(&["--sysroot".to_string(), sysroot_path.display().to_string()]);
         };
 
+        // This environment variable is useful in case we want to change options of rustc commands.
         if let Some(cg_rustflags) = env.get("CG_RUSTFLAGS") {
             rustflags.extend_from_slice(&split_args(&cg_rustflags));
         }
+
         if let Some(linker) = linker {
             rustflags.push(linker.to_string());
         }
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 02e6309bd338..4e8c176db737 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -750,7 +750,8 @@ fn extended_regex_example_tests(env: &Env, args: &TestArg) -> Result<(), String>
     println!("[TEST] rust-lang/regex example shootout-regex-dna");
     let mut env = env.clone();
     // newer aho_corasick versions throw a deprecation warning
-    env.insert("CG_RUSTFLAGS".to_string(), "--cap-lints warn".to_string());
+    let rustflags = format!("{} --cap-lints warn", env.get("RUSTFLAGS").cloned().unwrap_or_default());
+    env.insert("RUSTFLAGS".to_string(), rustflags);
     // Make sure `[codegen mono items] start` doesn't poison the diff
     run_cargo_command(
         &[&"build", &"--example", &"shootout-regex-dna"],
@@ -798,7 +799,8 @@ fn extended_regex_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     println!("[TEST] rust-lang/regex tests");
     let mut env = env.clone();
     // newer aho_corasick versions throw a deprecation warning
-    env.insert("CG_RUSTFLAGS".to_string(), "--cap-lints warn".to_string());
+    let rustflags = format!("{} --cap-lints warn", env.get("RUSTFLAGS").cloned().unwrap_or_default());
+    env.insert("RUSTFLAGS".to_string(), rustflags);
     run_cargo_command(
         &[
             &"test",

From 970b2c770010c044abe5e3a8433fffc4ab3b8d52 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 24 Nov 2023 21:34:29 +0100
Subject: [PATCH 463/997] Fix `build_sysroot` by adding missing `RUSTFLAGS`
 environment variable

---
 build_system/src/build.rs | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 3087a5d79e01..da29e87c33cb 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -141,8 +141,8 @@ fn build_sysroot_inner(
         rustflags.push_str(" -Cpanic=abort -Zpanic-abort-tests");
     }
     rustflags.push_str(" -Z force-unstable-if-unmarked");
+    let mut env = env.clone();
     let channel = if sysroot_release_channel {
-        let mut env = env.clone();
         env.insert(
             "RUSTFLAGS".to_string(),
             format!("{} -Zmir-opt-level=3", rustflags),
@@ -160,10 +160,15 @@ fn build_sysroot_inner(
         )?;
         "release"
     } else {
+        env.insert(
+            "RUSTFLAGS".to_string(),
+            rustflags,
+        );
+
         run_command_with_output_and_env(
             &[&"cargo", &"build", &"--target", &config.target],
             Some(start_dir),
-            Some(env),
+            Some(&env),
         )?;
         "debug"
     };

From ff043162432a33fb7d2c675f05aef2803b39d387 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 24 Nov 2023 22:05:08 +0100
Subject: [PATCH 464/997] Remove `--target` option

---
 build_system/src/build.rs  | 25 +++----------------------
 build_system/src/config.rs | 12 ------------
 build_system/src/test.rs   | 10 ++++++++--
 3 files changed, 11 insertions(+), 36 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index da29e87c33cb..189c393019fd 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -43,22 +43,6 @@ impl BuildArg {
                     Self::usage();
                     return Ok(None);
                 }
-                "--target-triple" => {
-                    if args.next().is_some() {
-                        // Handled in config.rs.
-                    } else {
-                        return Err(
-                            "Expected a value after `--target-triple`, found nothing".to_string()
-                        );
-                    }
-                }
-                "--target" => {
-                    if args.next().is_some() {
-                        // Handled in config.rs.
-                    } else {
-                        return Err("Expected a value after `--target`, found nothing".to_string());
-                    }
-                }
                 arg => {
                     if !build_arg.config_info.parse_argument(arg, &mut args)? {
                         return Err(format!("Unknown argument `{}`", arg));
@@ -152,7 +136,7 @@ fn build_sysroot_inner(
                 &"cargo",
                 &"build",
                 &"--target",
-                &config.target,
+                &config.target_triple,
                 &"--release",
             ],
             Some(start_dir),
@@ -160,13 +144,10 @@ fn build_sysroot_inner(
         )?;
         "release"
     } else {
-        env.insert(
-            "RUSTFLAGS".to_string(),
-            rustflags,
-        );
+        env.insert("RUSTFLAGS".to_string(), rustflags);
 
         run_command_with_output_and_env(
-            &[&"cargo", &"build", &"--target", &config.target],
+            &[&"cargo", &"build", &"--target", &config.target_triple],
             Some(start_dir),
             Some(&env),
         )?;
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index b31a728c6807..267f45464423 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -4,7 +4,6 @@ use std::env as std_env;
 
 #[derive(Default)]
 pub struct ConfigInfo {
-    pub target: String,
     pub target_triple: String,
     pub host_triple: String,
     pub rustc_command: Vec<String>,
@@ -31,10 +30,6 @@ impl ConfigInfo {
                     )
                 }
             },
-            "--target" => match args.next() {
-                Some(arg) if !arg.is_empty() => self.target = arg.to_string(),
-                _ => return Err("Expected a value after `--target`, found nothing".to_string()),
-            },
             "--out-dir" => match args.next() {
                 Some(arg) if !arg.is_empty() => {
                     // env.insert("CARGO_TARGET_DIR".to_string(), arg.to_string());
@@ -83,12 +78,6 @@ impl ConfigInfo {
         };
         self.host_triple = rustc_version_info(Some(&rustc))?.host.unwrap_or_default();
 
-        if !self.target_triple.is_empty() && self.target.is_empty() {
-            self.target = self.target_triple.clone();
-        }
-        if self.target.is_empty() {
-            self.target = self.host_triple.clone();
-        }
         if self.target_triple.is_empty() {
             self.target_triple = self.host_triple.clone();
         }
@@ -223,7 +212,6 @@ impl ConfigInfo {
     pub fn show_usage() {
         println!(
             "\
-    --target [arg]         : Set the target to [arg]
     --target-triple [arg]  : Set the target triple to [arg]
     --out-dir              : Location where the files will be generated
     --release-sysroot      : Build sysroot in release mode
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 4e8c176db737..1e012798cba1 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -750,7 +750,10 @@ fn extended_regex_example_tests(env: &Env, args: &TestArg) -> Result<(), String>
     println!("[TEST] rust-lang/regex example shootout-regex-dna");
     let mut env = env.clone();
     // newer aho_corasick versions throw a deprecation warning
-    let rustflags = format!("{} --cap-lints warn", env.get("RUSTFLAGS").cloned().unwrap_or_default());
+    let rustflags = format!(
+        "{} --cap-lints warn",
+        env.get("RUSTFLAGS").cloned().unwrap_or_default()
+    );
     env.insert("RUSTFLAGS".to_string(), rustflags);
     // Make sure `[codegen mono items] start` doesn't poison the diff
     run_cargo_command(
@@ -799,7 +802,10 @@ fn extended_regex_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     println!("[TEST] rust-lang/regex tests");
     let mut env = env.clone();
     // newer aho_corasick versions throw a deprecation warning
-    let rustflags = format!("{} --cap-lints warn", env.get("RUSTFLAGS").cloned().unwrap_or_default());
+    let rustflags = format!(
+        "{} --cap-lints warn",
+        env.get("RUSTFLAGS").cloned().unwrap_or_default()
+    );
     env.insert("RUSTFLAGS".to_string(), rustflags);
     run_cargo_command(
         &[

From 53b2759bef791bad51bfcef022f2da432e6a4269 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 24 Nov 2023 22:23:08 +0100
Subject: [PATCH 465/997] Show command which failed

---
 build_system/src/utils.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 6dfc6a6506aa..88fce2fcbce1 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -45,6 +45,8 @@ fn check_exit_status(
             .unwrap_or_default(),
         exit_status.code()
     );
+    let input = input.iter().map(|i| i.as_ref()).collect::<Vec<&OsStr>>();
+    eprintln!("Command `{:?}` failed", input);
     if let Some(output) = output {
         unsafe {
             let stdout = std::str::from_utf8_unchecked(&output.stdout);

From 2ec8d46dd1b6adc116a5efba46b7aad4a5315f86 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 24 Nov 2023 23:54:18 +0100
Subject: [PATCH 466/997] Correctly handle `OVERWRITE_TARGET_TRIPLE` env
 variable

---
 build_system/src/config.rs | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 267f45464423..d602cec9f9f5 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -78,6 +78,11 @@ impl ConfigInfo {
         };
         self.host_triple = rustc_version_info(Some(&rustc))?.host.unwrap_or_default();
 
+        if self.target_triple.is_empty() {
+            if let Some(overwrite) = env.get("OVERWRITE_TARGET_TRIPLE") {
+                self.target_triple = overwrite.clone();
+            }
+        }
         if self.target_triple.is_empty() {
             self.target_triple = self.host_triple.clone();
         }

From 996635bad689a90ba90a8dbf887611f6fa287bab Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 25 Nov 2023 00:04:08 +0100
Subject: [PATCH 467/997] Fix chroot command

---
 build_system/src/test.rs | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 1e012798cba1..db3e4d9894d8 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -345,8 +345,13 @@ fn run_command_in_vm(
     let sudo_command: &[&dyn AsRef<OsStr>] = &[&"sudo", &"cp", &exe, &vm_exe_path];
     run_command_with_env(sudo_command, None, Some(env))?;
 
-    let mut vm_command: Vec<&dyn AsRef<OsStr>> =
-        vec![&"sudo", &"chroot", &"qemu-m68k-static", &inside_vm_exe_path];
+    let mut vm_command: Vec<&dyn AsRef<OsStr>> = vec![
+        &"sudo",
+        &"chroot",
+        &vm_dir,
+        &"qemu-m68k-static",
+        &inside_vm_exe_path,
+    ];
     vm_command.extend_from_slice(command);
     run_command_with_env(&vm_command, Some(&vm_parent_dir), Some(env))?;
     Ok(())

From ebb7aa0b8575a27e2768c42f1472d3523925357c Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 1 Dec 2023 23:57:16 +0100
Subject: [PATCH 468/997] Apply suggestions

---
 build_system/src/build.rs   |  40 +------
 build_system/src/config.rs  |  25 ++--
 build_system/src/prepare.rs |   7 +-
 build_system/src/test.rs    | 227 ++++++++++++++++--------------------
 build_system/src/utils.rs   |  47 +++++---
 5 files changed, 156 insertions(+), 190 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 189c393019fd..618e74be2c0c 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -67,14 +67,8 @@ impl BuildArg {
     }
 }
 
-fn build_sysroot_inner(
-    env: &HashMap<String, String>,
-    sysroot_panic_abort: bool,
-    sysroot_release_channel: bool,
-    config: &ConfigInfo,
-    start_dir: Option<&Path>,
-) -> Result<(), String> {
-    let start_dir = start_dir.unwrap_or_else(|| Path::new("."));
+pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Result<(), String> {
+    let start_dir = Path::new("build_sysroot");
     // Cleanup for previous run
     // Clean target dir except for build scripts and incremental cache
     let _ = walk_dir(
@@ -121,12 +115,11 @@ fn build_sysroot_inner(
 
     // Builds libs
     let mut rustflags = env.get("RUSTFLAGS").cloned().unwrap_or_default();
-    if sysroot_panic_abort {
+    if config.sysroot_panic_abort {
         rustflags.push_str(" -Cpanic=abort -Zpanic-abort-tests");
     }
-    rustflags.push_str(" -Z force-unstable-if-unmarked");
     let mut env = env.clone();
-    let channel = if sysroot_release_channel {
+    let channel = if config.sysroot_release_channel {
         env.insert(
             "RUSTFLAGS".to_string(),
             format!("{} -Zmir-opt-level=3", rustflags),
@@ -194,21 +187,6 @@ fn build_sysroot_inner(
     Ok(())
 }
 
-pub fn build_sysroot(
-    env: &HashMap<String, String>,
-    sysroot_panic_abort: bool,
-    sysroot_release_channel: bool,
-    config: &ConfigInfo,
-) -> Result<(), String> {
-    build_sysroot_inner(
-        env,
-        sysroot_panic_abort,
-        sysroot_release_channel,
-        config,
-        Some(Path::new("build_sysroot")),
-    )
-}
-
 fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     let mut env = HashMap::new();
 
@@ -229,8 +207,7 @@ fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     }
     run_command_with_output_and_env(&command, None, Some(&env))?;
 
-    args.config_info
-        .setup(&mut env, &[], Some(&args.gcc_path))?;
+    args.config_info.setup(&mut env, Some(&args.gcc_path))?;
 
     // We voluntarily ignore the error.
     let _ = fs::remove_dir_all("target/out");
@@ -243,12 +220,7 @@ fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     })?;
 
     println!("[BUILD] sysroot");
-    build_sysroot(
-        &env,
-        args.config_info.sysroot_panic_abort,
-        args.config_info.sysroot_release_channel,
-        &args.config_info,
-    )?;
+    build_sysroot(&env, &args.config_info)?;
     Ok(())
 }
 
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index d602cec9f9f5..8396681b292a 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -1,8 +1,9 @@
 use crate::utils::{get_gcc_path, get_os_name, rustc_version_info, split_args};
 use std::collections::HashMap;
 use std::env as std_env;
+use std::ffi::OsStr;
 
-#[derive(Default)]
+#[derive(Default, Debug)]
 pub struct ConfigInfo {
     pub target_triple: String,
     pub host_triple: String,
@@ -32,7 +33,6 @@ impl ConfigInfo {
             },
             "--out-dir" => match args.next() {
                 Some(arg) if !arg.is_empty() => {
-                    // env.insert("CARGO_TARGET_DIR".to_string(), arg.to_string());
                     self.cargo_target_dir = arg.to_string();
                 }
                 _ => return Err("Expected a value after `--out-dir`, found nothing".to_string()),
@@ -44,10 +44,17 @@ impl ConfigInfo {
         Ok(true)
     }
 
+    pub fn rustc_command_vec(&self) -> Vec<&dyn AsRef<OsStr>> {
+        let mut command: Vec<&dyn AsRef<OsStr>> = Vec::with_capacity(self.rustc_command.len());
+        for arg in self.rustc_command.iter() {
+            command.push(arg);
+        }
+        command
+    }
+
     pub fn setup(
         &mut self,
         env: &mut HashMap<String, String>,
-        test_flags: &[String],
         gcc_path: Option<&str>,
     ) -> Result<(), String> {
         env.insert("CARGO_INCREMENTAL".to_string(), "0".to_string());
@@ -90,15 +97,10 @@ impl ConfigInfo {
         let mut linker = None;
 
         if self.host_triple != self.target_triple {
-            if self.target_triple == "m68k-unknown-linux-gnu" {
-                linker = Some("-Clinker=m68k-unknown-linux-gnu-gcc".to_string());
-            } else if self.target_triple == "aarch64-unknown-linux-gnu" {
-                // We are cross-compiling for aarch64. Use the correct linker and run tests in qemu.
-                linker = Some("-Clinker=aarch64-linux-gnu-gcc".to_string());
-            } else {
+            if self.target_triple.is_empty() {
                 return Err("Unknown non-native platform".to_string());
             }
-
+            linker = Some(format!("-Clinker={}-gcc", self.target_triple));
             self.run_in_vm = true;
         }
 
@@ -145,7 +147,7 @@ impl ConfigInfo {
 
         // This environment variable is useful in case we want to change options of rustc commands.
         if let Some(cg_rustflags) = env.get("CG_RUSTFLAGS") {
-            rustflags.extend_from_slice(&split_args(&cg_rustflags));
+            rustflags.extend_from_slice(&split_args(&cg_rustflags)?);
         }
 
         if let Some(linker) = linker {
@@ -162,7 +164,6 @@ impl ConfigInfo {
         if !env.contains_key(&"FAT_LTO".to_string()) {
             rustflags.push("-Clto=off".to_string());
         }
-        rustflags.extend_from_slice(test_flags);
         // FIXME(antoyo): remove once the atomic shim is gone
         if os_name == "Darwin" {
             rustflags.extend_from_slice(&[
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index da9f8953ec3c..ce9b440be053 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -1,5 +1,7 @@
 use crate::rustc_info::get_rustc_path;
-use crate::utils::{cargo_install, git_clone, run_command, run_command_with_output, walk_dir};
+use crate::utils::{
+    cargo_install, git_clone, remove_file, run_command, run_command_with_output, walk_dir,
+};
 
 use std::fs;
 use std::path::Path;
@@ -137,8 +139,7 @@ fn build_raytracer(repo_dir: &Path) -> Result<(), String> {
     run_command(&[&"cargo", &"build"], Some(repo_dir))?;
     let mv_target = repo_dir.join("raytracer_cg_llvm");
     if mv_target.is_file() {
-        std::fs::remove_file(&mv_target)
-            .map_err(|e| format!("Failed to remove file `{}`: {e:?}", mv_target.display()))?;
+        remove_file(&mv_target)?;
     }
     run_command(
         &[&"mv", &"target/debug/main", &"raytracer_cg_llvm"],
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index db3e4d9894d8..af2367e668eb 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -3,11 +3,13 @@ use crate::config::ConfigInfo;
 use crate::utils::{
     get_gcc_path, get_toolchain, run_command, run_command_with_env,
     run_command_with_output_and_env, rustc_version_info, split_args, walk_dir,
+    remove_file,
 };
 
 use std::collections::{BTreeSet, HashMap};
 use std::ffi::OsStr;
-use std::fs::remove_dir_all;
+use std::fs::{File, remove_dir_all};
+use std::io::{BufRead, BufReader};
 use std::path::{Path, PathBuf};
 use std::str::FromStr;
 
@@ -85,7 +87,6 @@ fn show_usage() {
 `test` command help:
 
     --release              : Build codegen in release mode
-    --release-sysroot      : Build sysroot in release mode
     --sysroot-panic-abort  : Build the sysroot without unwinding support.
     --no-default-features  : Add `--no-default-features` flag
     --features [arg]       : Add a new feature [arg]
@@ -104,7 +105,7 @@ fn show_usage() {
     println!("    --help                 : Show this help");
 }
 
-#[derive(Default, PartialEq, Eq, Clone, Copy)]
+#[derive(Default, PartialEq, Eq, Clone, Copy, Debug)]
 enum Channel {
     #[default]
     Debug,
@@ -120,7 +121,7 @@ impl Channel {
     }
 }
 
-#[derive(Default)]
+#[derive(Default, Debug)]
 struct TestArg {
     no_default_features: bool,
     build_only: bool,
@@ -151,7 +152,6 @@ impl TestArg {
                     test_arg.channel = Channel::Release;
                     test_arg.config_info.sysroot_release_channel = true;
                 }
-                "--release-sysroot" => test_arg.config_info.sysroot_release_channel = true,
                 "--no-default-features" => {
                     // To prevent adding it more than once.
                     if !test_arg.no_default_features {
@@ -210,8 +210,19 @@ impl TestArg {
                 get_gcc_path()?
             };
         }
+        match (test_arg.current_part, test_arg.nb_parts) {
+            (Some(_), Some(_)) | (None, None) => {}
+            _ => {
+                return Err("If either `--current-part` or `--nb-parts` is specified, the other one \
+                            needs to be specified as well!".to_string());
+            }
+        }
         Ok(Some(test_arg))
     }
+
+    pub fn is_using_gcc_master_branch(&self) -> bool {
+        !self.no_default_features
+    }
 }
 
 fn build_if_no_backend(env: &Env, args: &TestArg) -> Result<(), String> {
@@ -251,10 +262,7 @@ fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         "lib,dylib"
     }
     .to_string();
-    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
-    for arg in args.config_info.rustc_command.iter() {
-        command.push(arg);
-    }
+    let mut command = args.config_info.rustc_command_vec();
     command.extend_from_slice(&[
         &"example/mini_core.rs",
         &"--crate-name",
@@ -268,10 +276,7 @@ fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[BUILD] example");
-    command.clear();
-    for arg in args.config_info.rustc_command.iter() {
-        command.push(arg);
-    }
+    let mut command = args.config_info.rustc_command_vec();
     command.extend_from_slice(&[
         &"example/example.rs",
         &"--crate-type",
@@ -283,10 +288,7 @@ fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] mini_core_hello_world");
-    command.clear();
-    for arg in args.config_info.rustc_command.iter() {
-        command.push(arg);
-    }
+    let mut command = args.config_info.rustc_command_vec();
     command.extend_from_slice(&[
         &"example/mini_core_hello_world.rs",
         &"--crate-name",
@@ -304,24 +306,19 @@ fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &"abc",
         &"bcd",
     ];
-    run_command_in_vm(&command, env, args)?;
+    maybe_run_command_in_vm(&command, env, args)?;
     Ok(())
 }
 
 fn build_sysroot(env: &Env, args: &TestArg) -> Result<(), String> {
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[BUILD] sysroot");
-    build::build_sysroot(
-        env,
-        args.config_info.sysroot_panic_abort,
-        args.config_info.sysroot_release_channel,
-        &args.config_info,
-    )?;
+    build::build_sysroot(env, &args.config_info)?;
     Ok(())
 }
 
 // TODO(GuillaumeGomez): when rewriting in Rust, refactor with the code in tests/lang_tests_common.rs if possible.
-fn run_command_in_vm(
+fn maybe_run_command_in_vm(
     command: &[&dyn AsRef<OsStr>],
     env: &Env,
     args: &TestArg,
@@ -358,12 +355,10 @@ fn run_command_in_vm(
 }
 
 fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
+    let cargo_target_dir = Path::new(&args.config_info.cargo_target_dir);
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] arbitrary_self_types_pointers_and_wrappers");
-    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
-    for arg in args.config_info.rustc_command.iter() {
-        command.push(arg);
-    }
+    let mut command = args.config_info.rustc_command_vec();
     command.extend_from_slice(&[
         &"example/arbitrary_self_types_pointers_and_wrappers.rs",
         &"--crate-name",
@@ -374,19 +369,15 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &args.config_info.target_triple,
     ]);
     run_command_with_env(&command, None, Some(env))?;
-    run_command_in_vm(
-        &[&Path::new(&args.config_info.cargo_target_dir)
-            .join("arbitrary_self_types_pointers_and_wrappers")],
+    maybe_run_command_in_vm(
+        &[&cargo_target_dir.join("arbitrary_self_types_pointers_and_wrappers")],
         env,
         args,
     )?;
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] alloc_system");
-    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
-    for arg in args.config_info.rustc_command.iter() {
-        command.push(arg);
-    }
+    let mut command = args.config_info.rustc_command_vec();
     command.extend_from_slice(&[
         &"example/alloc_system.rs",
         &"--crate-type",
@@ -394,19 +385,16 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &"--target",
         &args.config_info.target_triple,
     ]);
-    if !args.no_default_features {
+    if args.is_using_gcc_master_branch() {
         command.extend_from_slice(&[&"--cfg", &"feature=\"master\""]);
     }
     run_command_with_env(&command, None, Some(env))?;
 
     // FIXME: doesn't work on m68k.
-    if args.config_info.host_triple != args.config_info.target_triple {
+    if args.config_info.host_triple == args.config_info.target_triple {
         // FIXME: create a function "display_if_not_quiet" or something along the line.
         println!("[AOT] alloc_example");
-        let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
-        for arg in args.config_info.rustc_command.iter() {
-            command.push(arg);
-        }
+        let mut command = args.config_info.rustc_command_vec();
         command.extend_from_slice(&[
             &"example/alloc_example.rs",
             &"--crate-type",
@@ -415,8 +403,8 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
             &args.config_info.target_triple,
         ]);
         run_command_with_env(&command, None, Some(env))?;
-        run_command_in_vm(
-            &[&Path::new(&args.config_info.cargo_target_dir).join("alloc_example")],
+        maybe_run_command_in_vm(
+            &[&cargo_target_dir.join("alloc_example")],
             env,
             args,
         )?;
@@ -425,10 +413,7 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] dst_field_align");
     // FIXME(antoyo): Re-add -Zmir-opt-level=2 once rust-lang/rust#67529 is fixed.
-    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
-    for arg in args.config_info.rustc_command.iter() {
-        command.push(arg);
-    }
+    let mut command = args.config_info.rustc_command_vec();
     command.extend_from_slice(&[
         &"example/dst-field-align.rs",
         &"--crate-name",
@@ -439,18 +424,15 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &args.config_info.target_triple,
     ]);
     run_command_with_env(&command, None, Some(env))?;
-    run_command_in_vm(
-        &[&Path::new(&args.config_info.cargo_target_dir).join("dst_field_align")],
+    maybe_run_command_in_vm(
+        &[&cargo_target_dir.join("dst_field_align")],
         env,
         args,
     )?;
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] std_example");
-    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
-    for arg in args.config_info.rustc_command.iter() {
-        command.push(arg);
-    }
+    let mut command = args.config_info.rustc_command_vec();
     command.extend_from_slice(&[
         &"example/std_example.rs",
         &"--crate-type",
@@ -458,13 +440,13 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &"--target",
         &args.config_info.target_triple,
     ]);
-    if !args.no_default_features {
+    if args.is_using_gcc_master_branch() {
         command.extend_from_slice(&[&"--cfg", &"feature=\"master\""]);
     }
     run_command_with_env(&command, None, Some(env))?;
-    run_command_in_vm(
+    maybe_run_command_in_vm(
         &[
-            &Path::new(&args.config_info.cargo_target_dir).join("std_example"),
+            &cargo_target_dir.join("std_example"),
             &"--target",
             &args.config_info.target_triple,
         ],
@@ -472,12 +454,14 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         args,
     )?;
 
+    let test_flags = if let Some(test_flags) = env.get("TEST_FLAGS") {
+        split_args(test_flags)?
+    } else {
+        Vec::new()
+    };
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] subslice-patterns-const-eval");
-    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
-    for arg in args.config_info.rustc_command.iter() {
-        command.push(arg);
-    }
+    let mut command = args.config_info.rustc_command_vec();
     command.extend_from_slice(&[
         &"example/subslice-patterns-const-eval.rs",
         &"--crate-type",
@@ -485,19 +469,19 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &"--target",
         &args.config_info.target_triple,
     ]);
+    for test_flag in &test_flags {
+        command.push(test_flag);
+    }
     run_command_with_env(&command, None, Some(env))?;
-    run_command_in_vm(
-        &[&Path::new(&args.config_info.cargo_target_dir).join("subslice-patterns-const-eval")],
+    maybe_run_command_in_vm(
+        &[&cargo_target_dir.join("subslice-patterns-const-eval")],
         env,
         args,
     )?;
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] track-caller-attribute");
-    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
-    for arg in args.config_info.rustc_command.iter() {
-        command.push(arg);
-    }
+    let mut command = args.config_info.rustc_command_vec();
     command.extend_from_slice(&[
         &"example/track-caller-attribute.rs",
         &"--crate-type",
@@ -505,19 +489,19 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &"--target",
         &args.config_info.target_triple,
     ]);
+    for test_flag in &test_flags {
+        command.push(test_flag);
+    }
     run_command_with_env(&command, None, Some(env))?;
-    run_command_in_vm(
-        &[&Path::new(&args.config_info.cargo_target_dir).join("track-caller-attribute")],
+    maybe_run_command_in_vm(
+        &[&cargo_target_dir.join("track-caller-attribute")],
         env,
         args,
     )?;
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] mod_bench");
-    let mut command: Vec<&dyn AsRef<OsStr>> = Vec::new();
-    for arg in args.config_info.rustc_command.iter() {
-        command.push(arg);
-    }
+    let mut command = args.config_info.rustc_command_vec();
     command.extend_from_slice(&[
         &"example/mod_bench.rs",
         &"--crate-type",
@@ -547,6 +531,7 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
         None => return Err("Couldn't retrieve rustc commit hash".to_string()),
     };
     run_command_with_output_and_env(&[&"git", &"checkout", &rustc_commit], rust_dir, Some(env))?;
+    // FIXME: Is it really needed to empty `RUSTFLAGS` here?
     env.insert("RUSTFLAGS".to_string(), String::new());
     let cargo = String::from_utf8(
         run_command_with_env(&[&"rustup", &"which", &"cargo"], rust_dir, Some(env))?.stdout,
@@ -661,7 +646,7 @@ fn run_cargo_command(
     args: &TestArg,
 ) -> Result<(), String> {
     run_cargo_command_with_callback(command, cwd, env, args, |cargo_command, cwd, env| {
-        run_command_with_output_and_env(&cargo_command, cwd, Some(env))?;
+        run_command_with_output_and_env(cargo_command, cwd, Some(env))?;
         Ok(())
     })
 }
@@ -734,7 +719,7 @@ fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
 // hyperfine --runs ${RUN_RUNS:-10} $cargo_target_dir/mod_bench{,_inline} $cargo_target_dir/mod_bench_llvm_*
 
 fn extended_rand_tests(env: &Env, args: &TestArg) -> Result<(), String> {
-    if args.no_default_features {
+    if !args.is_using_gcc_master_branch() {
         return Ok(());
     }
     let path = Path::new("rand");
@@ -746,7 +731,7 @@ fn extended_rand_tests(env: &Env, args: &TestArg) -> Result<(), String> {
 }
 
 fn extended_regex_example_tests(env: &Env, args: &TestArg) -> Result<(), String> {
-    if args.no_default_features {
+    if !args.is_using_gcc_master_branch() {
         return Ok(());
     }
     let path = Path::new("regex");
@@ -800,7 +785,7 @@ fn extended_regex_example_tests(env: &Env, args: &TestArg) -> Result<(), String>
 }
 
 fn extended_regex_tests(env: &Env, args: &TestArg) -> Result<(), String> {
-    if args.no_default_features {
+    if !args.is_using_gcc_master_branch() {
         return Ok(());
     }
     // FIXME: create a function "display_if_not_quiet" or something along the line.
@@ -817,6 +802,7 @@ fn extended_regex_tests(env: &Env, args: &TestArg) -> Result<(), String> {
             &"test",
             &"--tests",
             &"--",
+            // FIXME: try removing `--exclude-should-panic` argument
             &"--exclude-should-panic",
             &"--test-threads",
             &"1",
@@ -848,24 +834,22 @@ fn extended_sysroot_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     Ok(())
 }
 
-fn should_remove_ui_test(content: &str) -> bool {
-    for line in content
-        .lines()
-        .map(|line| line.trim())
-        .filter(|line| !line.is_empty())
-    {
-        if [
-            "// error-pattern:",
-            "// build-fail",
-            "// run-fail",
-            "-Cllvm-args",
-            "//~",
-            "// ~",
-        ]
-        .iter()
-        .any(|check| line.contains(check))
-        {
-            return true;
+fn should_remove_ui_test(file: File) -> bool {
+    for line in BufReader::new(file).lines() {
+        if let Ok(line) = line {
+            if [
+                "// error-pattern:",
+                "// build-fail",
+                "// run-fail",
+                "-Cllvm-args",
+                "//~",
+                "// ~",
+            ]
+            .iter()
+            .any(|check| line.contains(check))
+            {
+                return true;
+            }
         }
     }
     false
@@ -903,7 +887,7 @@ fn should_remove_test(path: &Path, path_str: &str) -> bool {
         .any(|to_ignore| path_str.ends_with(to_ignore))
 }
 
-fn test_rustc_inner<F>(env: &Env, args: &TestArg, callback: F) -> Result<(), String>
+fn test_rustc_inner<F>(env: &Env, args: &TestArg, prepare_files_callback: F) -> Result<(), String>
 where
     F: Fn() -> Result<bool, String>,
 {
@@ -937,24 +921,24 @@ where
         |_| Ok(()),
     )?;
 
+    // These two functions are used to remove files that are known to not be working currently
+    // with the GCC backend to reduce noise.
     fn dir_handling(dir: &Path) -> Result<(), String> {
         walk_dir(dir, dir_handling, file_handling)
     }
-    fn file_handling(file: &Path) -> Result<(), String> {
-        let path_str = file.display().to_string().replace("\\", "/");
+    fn file_handling(file_path: &Path) -> Result<(), String> {
+        let path_str = file_path.display().to_string().replace("\\", "/");
         if !path_str.ends_with(".rs") {
             return Ok(());
         } else if should_not_remove_test(&path_str) {
             return Ok(());
-        } else if should_remove_test(file, &path_str) {
-            return std::fs::remove_file(file)
-                .map_err(|error| format!("Failed to remove `{}`: {:?}", file.display(), error));
+        } else if should_remove_test(file_path, &path_str) {
+            return remove_file(&file_path);
         }
-        let file_content = std::fs::read_to_string(file)
-            .map_err(|error| format!("Failed to read `{}`: {:?}", file.display(), error))?;
-        if should_remove_ui_test(&file_content) {
-            std::fs::remove_file(file)
-                .map_err(|error| format!("Failed to remove `{}`: {:?}", file.display(), error))?;
+        let file = File::open(file_path)
+            .map_err(|error| format!("Failed to read `{}`: {:?}", file_path.display(), error))?;
+        if should_remove_ui_test(file) {
+            remove_file(&file_path)?;
         }
         Ok(())
     }
@@ -963,20 +947,18 @@ where
 
     walk_dir(rust_path.join("tests/ui"), dir_handling, file_handling)?;
     let file = rust_path.join("tests/ui/consts/const_cmp_type_id.rs");
-    std::fs::remove_file(&file)
-        .map_err(|error| format!("Failed to remove `{}`: {:?}", file.display(), error))?;
+    remove_file(&file)?;
     let file = rust_path.join("tests/ui/consts/issue-73976-monomorphic.rs");
-    std::fs::remove_file(&file)
-        .map_err(|error| format!("Failed to remove `{}`: {:?}", file.display(), error))?;
+    remove_file(&file)?;
 
-    if !callback()? {
+    if !prepare_files_callback()? {
         // FIXME: create a function "display_if_not_quiet" or something along the line.
         println!("Keeping all UI tests");
     }
 
     let nb_parts = args.nb_parts.unwrap_or(0);
     if nb_parts > 0 {
-        let current_part = args.current_part.unwrap_or(0);
+        let current_part = args.current_part.unwrap();
         // FIXME: create a function "display_if_not_quiet" or something along the line.
         println!(
             "Splitting ui_test into {} parts (and running part {})",
@@ -1017,18 +999,19 @@ where
                 continue;
             }
             let test_path = rust_path.join(path);
-            std::fs::remove_file(&test_path).map_err(|error| {
-                format!("Failed to remove `{}`: {:?}", test_path.display(), error)
-            })?;
+            remove_file(&test_path)?;
         }
     }
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[TEST] rustc test suite");
     env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
-    let rustc_args = env
-        .get("RUSTFLAGS")
-        .expect("RUSTFLAGS should not be empty at this stage");
+    let rustc_args = format!(
+        "{} {}",
+        env.get("RUSTFLAGS")
+            .expect("RUSTFLAGS should not be empty at this stage"),
+        env.get("TEST_FLAGS").unwrap_or(&String::new()),
+    );
     run_command_with_output_and_env(
         &[
             &"./x.py",
@@ -1103,9 +1086,7 @@ fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
                 .filter(|line| !line.is_empty())
             {
                 let path = Path::new("rust").join(file);
-                std::fs::remove_file(&path).map_err(|error| {
-                    format!("failed to remove `{}`: {:?}", path.display(), error)
-                })?;
+                remove_file(&path)?;
             }
         } else {
             println!(
@@ -1159,9 +1140,7 @@ pub fn run() -> Result<(), String> {
         return Ok(());
     }
 
-    let test_flags = split_args(env.get("TEST_FLAGS").unwrap_or(&String::new()));
-    args.config_info
-        .setup(&mut env, &test_flags, Some(&args.gcc_path))?;
+    args.config_info.setup(&mut env, Some(&args.gcc_path))?;
 
     if args.runners.is_empty() {
         run_all(&env, &args)?;
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 88fce2fcbce1..59863fcfd90a 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -1,3 +1,4 @@
+use std::borrow::Cow;
 use std::collections::HashMap;
 use std::ffi::OsStr;
 use std::fmt::Debug;
@@ -48,16 +49,20 @@ fn check_exit_status(
     let input = input.iter().map(|i| i.as_ref()).collect::<Vec<&OsStr>>();
     eprintln!("Command `{:?}` failed", input);
     if let Some(output) = output {
-        unsafe {
-            let stdout = std::str::from_utf8_unchecked(&output.stdout);
-            if !stdout.is_empty() {
-                error.push_str("\n==== STDOUT ====\n");
-                error.push_str(stdout);
+        let stdout = String::from_utf8_lossy(&output.stdout);
+        if !stdout.is_empty() {
+            error.push_str("\n==== STDOUT ====\n");
+            match stdout {
+                Cow::Owned(s) => error.push_str(&s),
+                Cow::Borrowed(s) => error.push_str(s),
             }
-            let stderr = std::str::from_utf8_unchecked(&output.stderr);
-            if !stderr.is_empty() {
-                error.push_str("\n==== STDERR ====\n");
-                error.push_str(stderr);
+        }
+        let stderr = String::from_utf8_lossy(&output.stderr);
+        if !stderr.is_empty() {
+            error.push_str("\n==== STDERR ====\n");
+            match stderr {
+                Cow::Owned(s) => error.push_str(&s),
+                Cow::Borrowed(s) => error.push_str(s),
             }
         }
     }
@@ -295,17 +300,16 @@ where
     Ok(())
 }
 
-pub fn split_args(args: &str) -> Vec<String> {
+pub fn split_args(args: &str) -> Result<Vec<String>, String> {
     let mut out = Vec::new();
     let mut start = 0;
+    let args = args.trim();
     let mut iter = args.char_indices().peekable();
 
     while iter.peek().is_some() {
         while let Some((pos, c)) = iter.next() {
             if c == ' ' {
-                if pos != 0 {
-                    out.push(args[start..pos].to_string());
-                }
+                out.push(args[start..pos].to_string());
                 let mut found_start = false;
                 while let Some((pos, c)) = iter.peek() {
                     if *c != ' ' {
@@ -317,7 +321,7 @@ pub fn split_args(args: &str) -> Vec<String> {
                     }
                 }
                 if !found_start {
-                    return out;
+                    return Ok(out);
                 }
             } else if c == '"' || c == '\'' {
                 let end = c;
@@ -332,8 +336,7 @@ pub fn split_args(args: &str) -> Vec<String> {
                     }
                 }
                 if !found_end {
-                    out.push(args[start..].to_string());
-                    return out;
+                    return Err(format!("Didn't find `{}` at the end of `{}`", end, &args[start..]));
                 }
             } else if c == '\\' {
                 // We skip the escaped character.
@@ -345,5 +348,15 @@ pub fn split_args(args: &str) -> Vec<String> {
     if !s.is_empty() {
         out.push(s.to_string());
     }
-    out
+    Ok(out)
+}
+
+pub fn remove_file<P: AsRef<Path>>(file_path: &P) -> Result<(), String> {
+    std::fs::remove_file(file_path).map_err(|error| {
+        format!(
+            "Failed to remove `{}`: {:?}",
+            file_path.as_ref().display(),
+            error
+        )
+    })
 }

From 867ea124884cabf81462e152fcfa2cdccd3ed1aa Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 5 Dec 2023 21:09:13 +0100
Subject: [PATCH 469/997] Fix non-running rustc ui tests

---
 build_system/src/build.rs  |   2 +-
 build_system/src/config.rs |  17 ++--
 build_system/src/test.rs   | 188 ++++++++++++++++++-------------------
 build_system/src/utils.rs  |   6 +-
 4 files changed, 109 insertions(+), 104 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 618e74be2c0c..370d8436e3de 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -128,9 +128,9 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
             &[
                 &"cargo",
                 &"build",
+                &"--release",
                 &"--target",
                 &config.target_triple,
-                &"--release",
             ],
             Some(start_dir),
             Some(&env),
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 8396681b292a..091186b90660 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -13,6 +13,8 @@ pub struct ConfigInfo {
     pub dylib_ext: String,
     pub sysroot_release_channel: bool,
     pub sysroot_panic_abort: bool,
+    pub cg_backend_path: String,
+    pub sysroot_path: String,
 }
 
 impl ConfigInfo {
@@ -118,13 +120,12 @@ impl ConfigInfo {
             .get("BUILTIN_BACKEND")
             .map(|backend| !backend.is_empty())
             .unwrap_or(false);
-        let cg_backend_path;
 
         let mut rustflags = Vec::new();
         if has_builtin_backend {
             // It means we're building inside the rustc testsuite, so some options need to be handled
             // a bit differently.
-            cg_backend_path = "gcc".to_string();
+            self.cg_backend_path = "gcc".to_string();
 
             match env.get("RUSTC_SYSROOT") {
                 Some(rustc_sysroot) if !rustc_sysroot.is_empty() => {
@@ -134,15 +135,17 @@ impl ConfigInfo {
             }
             rustflags.push("-Cpanic=abort".to_string());
         } else {
-            cg_backend_path = current_dir
+            self.cg_backend_path = current_dir
                 .join("target")
                 .join(channel)
                 .join(&format!("librustc_codegen_gcc.{}", self.dylib_ext))
                 .display()
                 .to_string();
-            let sysroot_path = current_dir.join("build_sysroot/sysroot");
-            rustflags
-                .extend_from_slice(&["--sysroot".to_string(), sysroot_path.display().to_string()]);
+            self.sysroot_path = current_dir
+                .join("build_sysroot/sysroot")
+                .display()
+                .to_string();
+            rustflags.extend_from_slice(&["--sysroot".to_string(), self.sysroot_path.clone()]);
         };
 
         // This environment variable is useful in case we want to change options of rustc commands.
@@ -156,7 +159,7 @@ impl ConfigInfo {
         rustflags.extend_from_slice(&[
             "-Csymbol-mangling-version=v0".to_string(),
             "-Cdebuginfo=2".to_string(),
-            format!("-Zcodegen-backend={}", cg_backend_path),
+            format!("-Zcodegen-backend={}", self.cg_backend_path),
         ]);
 
         // Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index af2367e668eb..efd8ebdd52d9 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1,14 +1,13 @@
 use crate::build;
 use crate::config::ConfigInfo;
 use crate::utils::{
-    get_gcc_path, get_toolchain, run_command, run_command_with_env,
+    get_gcc_path, get_toolchain, remove_file, run_command, run_command_with_env,
     run_command_with_output_and_env, rustc_version_info, split_args, walk_dir,
-    remove_file,
 };
 
 use std::collections::{BTreeSet, HashMap};
 use std::ffi::OsStr;
-use std::fs::{File, remove_dir_all};
+use std::fs::{remove_dir_all, File};
 use std::io::{BufRead, BufReader};
 use std::path::{Path, PathBuf};
 use std::str::FromStr;
@@ -213,8 +212,11 @@ impl TestArg {
         match (test_arg.current_part, test_arg.nb_parts) {
             (Some(_), Some(_)) | (None, None) => {}
             _ => {
-                return Err("If either `--current-part` or `--nb-parts` is specified, the other one \
-                            needs to be specified as well!".to_string());
+                return Err(
+                    "If either `--current-part` or `--nb-parts` is specified, the other one \
+                            needs to be specified as well!"
+                        .to_string(),
+                );
             }
         }
         Ok(Some(test_arg))
@@ -230,20 +232,19 @@ fn build_if_no_backend(env: &Env, args: &TestArg) -> Result<(), String> {
         return Ok(());
     }
     let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"rustc"];
-    if args.channel == Channel::Release {
-        let mut env = env.clone();
-        env.insert("CARGO_INCREMENTAL".to_string(), "1".to_string());
+    let mut tmp_env;
+    let env = if args.channel == Channel::Release {
+        tmp_env = env.clone();
+        tmp_env.insert("CARGO_INCREMENTAL".to_string(), "1".to_string());
         command.push(&"--release");
-        for flag in args.flags.iter() {
-            command.push(flag);
-        }
-        run_command_with_output_and_env(&command, None, Some(&env))
+        &tmp_env
     } else {
-        for flag in args.flags.iter() {
-            command.push(flag);
-        }
-        run_command_with_output_and_env(&command, None, Some(&env))
+        &env
+    };
+    for flag in args.flags.iter() {
+        command.push(flag);
     }
+    run_command_with_output_and_env(&command, None, Some(env))
 }
 
 fn clean(_env: &Env, args: &TestArg) -> Result<(), String> {
@@ -403,11 +404,7 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
             &args.config_info.target_triple,
         ]);
         run_command_with_env(&command, None, Some(env))?;
-        maybe_run_command_in_vm(
-            &[&cargo_target_dir.join("alloc_example")],
-            env,
-            args,
-        )?;
+        maybe_run_command_in_vm(&[&cargo_target_dir.join("alloc_example")], env, args)?;
     }
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
@@ -424,11 +421,7 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &args.config_info.target_triple,
     ]);
     run_command_with_env(&command, None, Some(env))?;
-    maybe_run_command_in_vm(
-        &[&cargo_target_dir.join("dst_field_align")],
-        env,
-        args,
-    )?;
+    maybe_run_command_in_vm(&[&cargo_target_dir.join("dst_field_align")], env, args)?;
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] std_example");
@@ -525,6 +518,7 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
         None,
         Some(env),
     );
+    run_command(&[&"git", &"checkout", &"--", &"tests/"], rust_dir)?;
     run_command_with_output_and_env(&[&"git", &"fetch"], rust_dir, Some(env))?;
     let rustc_commit = match rustc_version_info(env.get("RUSTC").map(|s| s.as_str()))?.commit_hash {
         Some(commit_hash) => commit_hash,
@@ -532,7 +526,7 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
     };
     run_command_with_output_and_env(&[&"git", &"checkout", &rustc_commit], rust_dir, Some(env))?;
     // FIXME: Is it really needed to empty `RUSTFLAGS` here?
-    env.insert("RUSTFLAGS".to_string(), String::new());
+    // env.insert("RUSTFLAGS".to_string(), String::new());
     let cargo = String::from_utf8(
         run_command_with_env(&[&"rustup", &"which", &"cargo"], rust_dir, Some(env))?.stdout,
     )
@@ -591,15 +585,6 @@ download-ci-llvm = false
         ),
     )
     .map_err(|error| format!("Failed to write into `rust/config.toml`: {:?}", error))?;
-
-    let rustc_commit = match rustc_version_info(env.get("RUSTC").map(|s| s.as_str()))?.commit_hash {
-        Some(commit_hash) => commit_hash,
-        None => return Err("Couldn't retrieve rustc commit hash".to_string()),
-    };
-    // FIXME: create a function "display_if_not_quiet" or something along the line.
-    println!("commit: {:?}", rustc_commit);
-    let command: &[&dyn AsRef<OsStr>] = &[&"git", &"checkout", &rustc_commit, &"tests"];
-    run_command_with_output_and_env(command, rust_dir, Some(env))?;
     Ok(())
 }
 
@@ -834,27 +819,6 @@ fn extended_sysroot_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     Ok(())
 }
 
-fn should_remove_ui_test(file: File) -> bool {
-    for line in BufReader::new(file).lines() {
-        if let Ok(line) = line {
-            if [
-                "// error-pattern:",
-                "// build-fail",
-                "// run-fail",
-                "-Cllvm-args",
-                "//~",
-                "// ~",
-            ]
-            .iter()
-            .any(|check| line.contains(check))
-            {
-                return true;
-            }
-        }
-    }
-    false
-}
-
 fn should_not_remove_test(file: &str) -> bool {
     // contains //~ERROR, but shouldn't be removed
     [
@@ -870,21 +834,40 @@ fn should_not_remove_test(file: &str) -> bool {
     .any(|to_ignore| file.ends_with(to_ignore))
 }
 
-fn should_remove_test(path: &Path, path_str: &str) -> bool {
+fn should_remove_test(file_path: &Path) -> Result<bool, String> {
     // Tests generating errors.
-    path.file_name()
-        .and_then(|name| name.to_str())
-        .map(|name| name.contains("thread"))
-        .unwrap_or(false)
-        || [
-            "consts/issue-miri-1910.rs",
-            // Tests generating errors.
-            "consts/issue-94675.rs",
-            // this test is oom-killed in the CI.
-            "mir/mir_heavy/issue-miri-1910.rs",
+    let file = File::open(file_path)
+        .map_err(|error| format!("Failed to read `{}`: {:?}", file_path.display(), error))?;
+    for line in BufReader::new(file).lines().filter_map(|line| line.ok()) {
+        let line = line.trim();
+        if line.is_empty() {
+            continue;
+        }
+        if [
+            "// error-pattern:",
+            "// build-fail",
+            "// run-fail",
+            "-Cllvm-args",
+            "//~",
+            "thread",
         ]
         .iter()
-        .any(|to_ignore| path_str.ends_with(to_ignore))
+        .any(|check| line.contains(check))
+        {
+            return Ok(true);
+        }
+        if line.contains("//[") && line.contains("]~") {
+            return Ok(true);
+        }
+    }
+    if file_path
+        .display()
+        .to_string()
+        .contains("ambiguous-4-extern.rs")
+    {
+        eprintln!("nothing found for {file_path:?}");
+    }
+    Ok(false)
 }
 
 fn test_rustc_inner<F>(env: &Env, args: &TestArg, prepare_files_callback: F) -> Result<(), String>
@@ -896,6 +879,8 @@ where
     let mut env = env.clone();
     setup_rustc(&mut env, args)?;
 
+    let rust_path = Path::new("rust");
+
     walk_dir(
         "rust/tests/ui",
         |dir| {
@@ -924,32 +909,41 @@ where
     // These two functions are used to remove files that are known to not be working currently
     // with the GCC backend to reduce noise.
     fn dir_handling(dir: &Path) -> Result<(), String> {
+        if dir
+            .file_name()
+            .map(|name| name == "auxiliary")
+            .unwrap_or(true)
+        {
+            return Ok(());
+        }
         walk_dir(dir, dir_handling, file_handling)
     }
     fn file_handling(file_path: &Path) -> Result<(), String> {
-        let path_str = file_path.display().to_string().replace("\\", "/");
-        if !path_str.ends_with(".rs") {
+        if !file_path
+            .extension()
+            .map(|extension| extension == "rs")
+            .unwrap_or(false)
+        {
             return Ok(());
-        } else if should_not_remove_test(&path_str) {
-            return Ok(());
-        } else if should_remove_test(file_path, &path_str) {
-            return remove_file(&file_path);
         }
-        let file = File::open(file_path)
-            .map_err(|error| format!("Failed to read `{}`: {:?}", file_path.display(), error))?;
-        if should_remove_ui_test(file) {
-            remove_file(&file_path)?;
+        let path_str = file_path.display().to_string().replace("\\", "/");
+        if should_not_remove_test(&path_str) {
+            return Ok(());
+        } else if should_remove_test(file_path)? {
+            return remove_file(&file_path);
         }
         Ok(())
     }
 
-    let rust_path = Path::new("rust");
+    remove_file(&rust_path.join("tests/ui/consts/const_cmp_type_id.rs"))?;
+    remove_file(&rust_path.join("tests/ui/consts/issue-73976-monomorphic.rs"))?;
+    // this test is oom-killed in the CI.
+    remove_file(&rust_path.join("tests/ui/consts/issue-miri-1910.rs"))?;
+    // Tests generating errors.
+    remove_file(&rust_path.join("tests/ui/consts/issue-94675.rs"))?;
+    remove_file(&rust_path.join("tests/ui/mir/mir_heavy_promoted.rs"))?;
 
     walk_dir(rust_path.join("tests/ui"), dir_handling, file_handling)?;
-    let file = rust_path.join("tests/ui/consts/const_cmp_type_id.rs");
-    remove_file(&file)?;
-    let file = rust_path.join("tests/ui/consts/issue-73976-monomorphic.rs");
-    remove_file(&file)?;
 
     if !prepare_files_callback()? {
         // FIXME: create a function "display_if_not_quiet" or something along the line.
@@ -992,14 +986,16 @@ where
         // We increment the number of tests by one because if this is an odd number, we would skip
         // one test.
         let count = files.len() / nb_parts + 1;
-        let start = nb_parts * count;
-        let end = start + count;
-        for (pos, path) in files.iter().enumerate() {
-            if pos >= start && pos <= end {
-                continue;
-            }
-            let test_path = rust_path.join(path);
-            remove_file(&test_path)?;
+        let start = current_part * count;
+        let end = current_part * count + count;
+        // We remove the files we don't want to test.
+        for path in files
+            .iter()
+            .enumerate()
+            .filter(|(pos, _)| *pos < start || *pos >= end)
+            .map(|(_, path)| path)
+        {
+            remove_file(&rust_path.join(path))?;
         }
     }
 
@@ -1007,11 +1003,13 @@ where
     println!("[TEST] rustc test suite");
     env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
     let rustc_args = format!(
-        "{} {}",
-        env.get("RUSTFLAGS")
-            .expect("RUSTFLAGS should not be empty at this stage"),
+        "{} -Csymbol-mangling-version=v0 -Zcodegen-backend={} --sysroot {}",
         env.get("TEST_FLAGS").unwrap_or(&String::new()),
+        args.config_info.cg_backend_path,
+        args.config_info.sysroot_path,
     );
+
+    env.get_mut("RUSTFLAGS").unwrap().clear();
     run_command_with_output_and_env(
         &[
             &"./x.py",
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 59863fcfd90a..9d785e7f57cf 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -336,7 +336,11 @@ pub fn split_args(args: &str) -> Result<Vec<String>, String> {
                     }
                 }
                 if !found_end {
-                    return Err(format!("Didn't find `{}` at the end of `{}`", end, &args[start..]));
+                    return Err(format!(
+                        "Didn't find `{}` at the end of `{}`",
+                        end,
+                        &args[start..]
+                    ));
                 }
             } else if c == '\\' {
                 // We skip the escaped character.

From db9b932314023318f49b0b5941d09f034a12b31e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 13 Dec 2023 21:35:05 +0100
Subject: [PATCH 470/997] Fix sysroot build

---
 build_system/src/build.rs  |  8 +++-----
 build_system/src/config.rs | 24 +++++++++++++++++++++++-
 build_system/src/test.rs   | 27 +++------------------------
 3 files changed, 29 insertions(+), 30 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 370d8436e3de..9fb47195aeed 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -1,4 +1,4 @@
-use crate::config::ConfigInfo;
+use crate::config::{Channel, ConfigInfo};
 use crate::utils::{get_gcc_path, run_command, run_command_with_output_and_env, walk_dir};
 use std::collections::HashMap;
 use std::ffi::OsStr;
@@ -7,7 +7,6 @@ use std::path::Path;
 
 #[derive(Default)]
 struct BuildArg {
-    codegen_release_channel: bool,
     flags: Vec<String>,
     gcc_path: String,
     config_info: ConfigInfo,
@@ -25,7 +24,6 @@ impl BuildArg {
 
         while let Some(arg) = args.next() {
             match arg.as_str() {
-                "--release" => build_arg.codegen_release_channel = true,
                 "--no-default-features" => {
                     build_arg.flags.push("--no-default-features".to_string());
                 }
@@ -58,7 +56,6 @@ impl BuildArg {
             r#"
 `build` command help:
 
-    --release              : Build codegen in release mode
     --no-default-features  : Add `--no-default-features` flag
     --features [arg]       : Add a new feature [arg]"#
         );
@@ -118,6 +115,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     if config.sysroot_panic_abort {
         rustflags.push_str(" -Cpanic=abort -Zpanic-abort-tests");
     }
+    rustflags.push_str(" -Z force-unstable-if-unmarked");
     let mut env = env.clone();
     let channel = if config.sysroot_release_channel {
         env.insert(
@@ -194,7 +192,7 @@ fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     env.insert("LIBRARY_PATH".to_string(), args.gcc_path.clone());
 
     let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"rustc"];
-    if args.codegen_release_channel {
+    if args.config_info.channel == Channel::Release {
         command.push(&"--release");
         env.insert("CHANNEL".to_string(), "release".to_string());
         env.insert("CARGO_INCREMENTAL".to_string(), "1".to_string());
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 091186b90660..09375791aa31 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -3,6 +3,22 @@ use std::collections::HashMap;
 use std::env as std_env;
 use std::ffi::OsStr;
 
+#[derive(Default, PartialEq, Eq, Clone, Copy, Debug)]
+pub enum Channel {
+    #[default]
+    Debug,
+    Release,
+}
+
+impl Channel {
+    pub fn as_str(self) -> &'static str {
+        match self {
+            Self::Debug => "debug",
+            Self::Release => "release",
+        }
+    }
+}
+
 #[derive(Default, Debug)]
 pub struct ConfigInfo {
     pub target_triple: String,
@@ -12,6 +28,7 @@ pub struct ConfigInfo {
     pub cargo_target_dir: String,
     pub dylib_ext: String,
     pub sysroot_release_channel: bool,
+    pub channel: Channel,
     pub sysroot_panic_abort: bool,
     pub cg_backend_path: String,
     pub sysroot_path: String,
@@ -40,6 +57,7 @@ impl ConfigInfo {
                 _ => return Err("Expected a value after `--out-dir`, found nothing".to_string()),
             },
             "--release-sysroot" => self.sysroot_release_channel = true,
+            "--release" => self.channel = Channel::Release,
             "--sysroot-panic-abort" => self.sysroot_panic_abort = true,
             _ => return Ok(false),
         }
@@ -108,7 +126,7 @@ impl ConfigInfo {
 
         let current_dir =
             std_env::current_dir().map_err(|error| format!("`current_dir` failed: {:?}", error))?;
-        let channel = if self.sysroot_release_channel {
+        let channel = if self.channel == Channel::Release {
             "release"
         } else if let Some(channel) = env.get("CHANNEL") {
             channel.as_str()
@@ -152,6 +170,9 @@ impl ConfigInfo {
         if let Some(cg_rustflags) = env.get("CG_RUSTFLAGS") {
             rustflags.extend_from_slice(&split_args(&cg_rustflags)?);
         }
+        if let Some(test_flags) = env.get("TEST_FLAGS") {
+            rustflags.extend_from_slice(&split_args(&test_flags)?);
+        }
 
         if let Some(linker) = linker {
             rustflags.push(linker.to_string());
@@ -223,6 +244,7 @@ impl ConfigInfo {
             "\
     --target-triple [arg]  : Set the target triple to [arg]
     --out-dir              : Location where the files will be generated
+    --release              : Build in release mode
     --release-sysroot      : Build sysroot in release mode
     --sysroot-panic-abort  : Build the sysroot without unwinding support."
         );
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index efd8ebdd52d9..1e9652d28220 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1,5 +1,5 @@
 use crate::build;
-use crate::config::ConfigInfo;
+use crate::config::{Channel, ConfigInfo};
 use crate::utils::{
     get_gcc_path, get_toolchain, remove_file, run_command, run_command_with_env,
     run_command_with_output_and_env, rustc_version_info, split_args, walk_dir,
@@ -104,28 +104,11 @@ fn show_usage() {
     println!("    --help                 : Show this help");
 }
 
-#[derive(Default, PartialEq, Eq, Clone, Copy, Debug)]
-enum Channel {
-    #[default]
-    Debug,
-    Release,
-}
-
-impl Channel {
-    pub fn as_str(self) -> &'static str {
-        match self {
-            Self::Debug => "debug",
-            Self::Release => "release",
-        }
-    }
-}
-
 #[derive(Default, Debug)]
 struct TestArg {
     no_default_features: bool,
     build_only: bool,
     gcc_path: String,
-    channel: Channel,
     use_backend: bool,
     runners: BTreeSet<String>,
     flags: Vec<String>,
@@ -147,10 +130,6 @@ impl TestArg {
 
         while let Some(arg) = args.next() {
             match arg.as_str() {
-                "--release" => {
-                    test_arg.channel = Channel::Release;
-                    test_arg.config_info.sysroot_release_channel = true;
-                }
                 "--no-default-features" => {
                     // To prevent adding it more than once.
                     if !test_arg.no_default_features {
@@ -233,7 +212,7 @@ fn build_if_no_backend(env: &Env, args: &TestArg) -> Result<(), String> {
     }
     let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"rustc"];
     let mut tmp_env;
-    let env = if args.channel == Channel::Release {
+    let env = if args.config_info.channel == Channel::Release {
         tmp_env = env.clone();
         tmp_env.insert("CARGO_INCREMENTAL".to_string(), "1".to_string());
         command.push(&"--release");
@@ -613,7 +592,7 @@ fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
                 pwd = std::env::current_dir()
                     .map_err(|error| format!("`current_dir` failed: {:?}", error))?
                     .display(),
-                channel = args.channel.as_str(),
+                channel = args.config_info.channel.as_str(),
                 dylib_ext = args.config_info.dylib_ext,
             )
             .as_str(),

From 95dfe5ec9040bcba53a8dd61d3593d182defab71 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 16 Dec 2023 17:39:58 +0100
Subject: [PATCH 471/997] Simplify `split_args` code, add a unit test for it
 and run it into CI

---
 .github/workflows/ci.yml  |  9 ++++
 build_system/src/utils.rs | 97 ++++++++++++++++++++++++---------------
 2 files changed, 68 insertions(+), 38 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 8e361bf617b1..b04ea1550ba2 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -131,3 +131,12 @@ jobs:
     steps:
       - uses: actions/checkout@v3
       - run: python tools/check_intrinsics_duplicates.py
+
+  build_system:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v3
+      - name: Test build system
+        run: |
+          cd build_system
+          cargo test
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 9d785e7f57cf..ebfa41c761ce 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -306,46 +306,44 @@ pub fn split_args(args: &str) -> Result<Vec<String>, String> {
     let args = args.trim();
     let mut iter = args.char_indices().peekable();
 
-    while iter.peek().is_some() {
-        while let Some((pos, c)) = iter.next() {
-            if c == ' ' {
-                out.push(args[start..pos].to_string());
-                let mut found_start = false;
-                while let Some((pos, c)) = iter.peek() {
-                    if *c != ' ' {
-                        start = *pos;
-                        found_start = true;
-                        break;
-                    } else {
-                        iter.next();
-                    }
+    while let Some((pos, c)) = iter.next() {
+        if c == ' ' {
+            out.push(args[start..pos].to_string());
+            let mut found_start = false;
+            while let Some((pos, c)) = iter.peek() {
+                if *c != ' ' {
+                    start = *pos;
+                    found_start = true;
+                    break;
+                } else {
+                    iter.next();
                 }
-                if !found_start {
-                    return Ok(out);
-                }
-            } else if c == '"' || c == '\'' {
-                let end = c;
-                let mut found_end = false;
-                while let Some((_, c)) = iter.next() {
-                    if c == end {
-                        found_end = true;
-                        break;
-                    } else if c == '\\' {
-                        // We skip the escaped character.
-                        iter.next();
-                    }
-                }
-                if !found_end {
-                    return Err(format!(
-                        "Didn't find `{}` at the end of `{}`",
-                        end,
-                        &args[start..]
-                    ));
-                }
-            } else if c == '\\' {
-                // We skip the escaped character.
-                iter.next();
             }
+            if !found_start {
+                return Ok(out);
+            }
+        } else if c == '"' || c == '\'' {
+            let end = c;
+            let mut found_end = false;
+            while let Some((_, c)) = iter.next() {
+                if c == end {
+                    found_end = true;
+                    break;
+                } else if c == '\\' {
+                    // We skip the escaped character.
+                    iter.next();
+                }
+            }
+            if !found_end {
+                return Err(format!(
+                    "Didn't find `{}` at the end of `{}`",
+                    end,
+                    &args[start..]
+                ));
+            }
+        } else if c == '\\' {
+            // We skip the escaped character.
+            iter.next();
         }
     }
     let s = args[start..].trim();
@@ -364,3 +362,26 @@ pub fn remove_file<P: AsRef<Path>>(file_path: &P) -> Result<(), String> {
         )
     })
 }
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    #[test]
+    fn test_split_args() {
+        // Missing `"` at the end.
+        assert!(split_args("\"tada").is_err());
+        // Missing `'` at the end.
+        assert!(split_args("\'tada").is_err());
+
+        assert_eq!(
+            split_args("a \"b\" c"),
+            Ok(vec!["a".to_string(), "\"b\"".to_string(), "c".to_string()])
+        );
+        // Trailing whitespace characters.
+        assert_eq!(
+            split_args("    a    \"b\" c    "),
+            Ok(vec!["a".to_string(), "\"b\"".to_string(), "c".to_string()])
+        );
+    }
+}

From 9882d7c511fcfed404c547a64cbc42b6cf3fc17c Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 16 Dec 2023 17:55:53 +0100
Subject: [PATCH 472/997] Apply suggestions

---
 build_system/src/build.rs  |  4 ++--
 build_system/src/config.rs | 12 ++++++++++++
 build_system/src/test.rs   |  2 +-
 3 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 9fb47195aeed..d264aac7effb 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -128,7 +128,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
                 &"build",
                 &"--release",
                 &"--target",
-                &config.target_triple,
+                &config.target,
             ],
             Some(start_dir),
             Some(&env),
@@ -138,7 +138,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         env.insert("RUSTFLAGS".to_string(), rustflags);
 
         run_command_with_output_and_env(
-            &[&"cargo", &"build", &"--target", &config.target_triple],
+            &[&"cargo", &"build", &"--target", &config.target],
             Some(start_dir),
             Some(&env),
         )?;
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 09375791aa31..d948572bda56 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -21,6 +21,7 @@ impl Channel {
 
 #[derive(Default, Debug)]
 pub struct ConfigInfo {
+    pub target: String,
     pub target_triple: String,
     pub host_triple: String,
     pub rustc_command: Vec<String>,
@@ -42,6 +43,13 @@ impl ConfigInfo {
         args: &mut impl Iterator<Item = String>,
     ) -> Result<bool, String> {
         match arg {
+            "--target" => {
+                if let Some(arg) = args.next() {
+                    self.target = arg;
+                } else {
+                    return Err("Expected a value after `--target`, found nothing".to_string());
+                }
+            }
             "--target-triple" => match args.next() {
                 Some(arg) if !arg.is_empty() => self.target_triple = arg.to_string(),
                 _ => {
@@ -113,6 +121,9 @@ impl ConfigInfo {
         if self.target_triple.is_empty() {
             self.target_triple = self.host_triple.clone();
         }
+        if self.target.is_empty() && !self.target_triple.is_empty() {
+            self.target = self.target_triple.clone();
+        }
 
         let mut linker = None;
 
@@ -243,6 +254,7 @@ impl ConfigInfo {
         println!(
             "\
     --target-triple [arg]  : Set the target triple to [arg]
+    --target [arg]         : Set the target to [arg]
     --out-dir              : Location where the files will be generated
     --release              : Build in release mode
     --release-sysroot      : Build sysroot in release mode
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 1e9652d28220..a926ee4c79eb 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -482,7 +482,7 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &args.config_info.target_triple,
     ]);
     run_command_with_env(&command, None, Some(env))?;
-    // FIXME: the compiled binary is not run. Is it normal?
+    // FIXME: the compiled binary is not run.
 
     Ok(())
 }

From a8b0e30a8b5c9b97b83bdabd700c0f6e92e0f96d Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 18 Dec 2023 23:25:23 +0100
Subject: [PATCH 473/997] Error earlier if the rustc host cannot be found

---
 build_system/src/config.rs | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index d948572bda56..b61c65f7b022 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -111,7 +111,10 @@ impl ConfigInfo {
             Some(r) if !r.is_empty() => r.to_string(),
             _ => "rustc".to_string(),
         };
-        self.host_triple = rustc_version_info(Some(&rustc))?.host.unwrap_or_default();
+        self.host_triple = match rustc_version_info(Some(&rustc))?.host {
+            Some(host) => host,
+            None => return Err("no host found".to_string()),
+        };
 
         if self.target_triple.is_empty() {
             if let Some(overwrite) = env.get("OVERWRITE_TARGET_TRIPLE") {
@@ -216,6 +219,8 @@ impl ConfigInfo {
         ));
         let ld_library_path = format!(
             "{target}:{sysroot}:{gcc_path}",
+            // FIXME: It's possible to pick another out directory. Would be nice to have a command
+            // line option to change it.
             target = current_dir.join("target/out").display(),
             sysroot = sysroot.display(),
         );

From f516c9681133788c6ff20932e443226ffef98d5c Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 19 Dec 2023 01:07:01 +0100
Subject: [PATCH 474/997] Add comment about why `-Cpanic=abort` option is
 needed

---
 build_system/src/config.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index b61c65f7b022..1824bdd292ff 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -165,6 +165,8 @@ impl ConfigInfo {
                 }
                 _ => {}
             }
+            // This should not be needed, but is necessary for the CI in the rust repository.
+            // FIXME: Remove when the rust CI switches to the master version of libgccjit.
             rustflags.push("-Cpanic=abort".to_string());
         } else {
             self.cg_backend_path = current_dir

From bb4fd2c638fa31c0121255e8548488381ab39041 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 19 Dec 2023 01:16:29 +0100
Subject: [PATCH 475/997] Simplify code by removing unneeded pattern matching

---
 build_system/src/utils.rs | 11 ++---------
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index ebfa41c761ce..9c3a86ad68a2 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -1,4 +1,3 @@
-use std::borrow::Cow;
 use std::collections::HashMap;
 use std::ffi::OsStr;
 use std::fmt::Debug;
@@ -52,18 +51,12 @@ fn check_exit_status(
         let stdout = String::from_utf8_lossy(&output.stdout);
         if !stdout.is_empty() {
             error.push_str("\n==== STDOUT ====\n");
-            match stdout {
-                Cow::Owned(s) => error.push_str(&s),
-                Cow::Borrowed(s) => error.push_str(s),
-            }
+            error.push_str(&*stdout);
         }
         let stderr = String::from_utf8_lossy(&output.stderr);
         if !stderr.is_empty() {
             error.push_str("\n==== STDERR ====\n");
-            match stderr {
-                Cow::Owned(s) => error.push_str(&s),
-                Cow::Borrowed(s) => error.push_str(s),
-            }
+            error.push_str(&*stderr);
         }
     }
     Err(error)

From 984e045848ff28294d86471478286307942680da Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 19 Dec 2023 16:54:02 +0100
Subject: [PATCH 476/997] Show output of `--mini-tests` and `--std-tests`
 commands

---
 build_system/src/test.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index a926ee4c79eb..13828e461913 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -304,7 +304,7 @@ fn maybe_run_command_in_vm(
     args: &TestArg,
 ) -> Result<(), String> {
     if !args.config_info.run_in_vm {
-        run_command_with_env(command, None, Some(env))?;
+        run_command_with_output_and_env(command, None, Some(env))?;
         return Ok(());
     }
     let vm_parent_dir = match env.get("CG_GCC_VM_DIR") {
@@ -330,7 +330,7 @@ fn maybe_run_command_in_vm(
         &inside_vm_exe_path,
     ];
     vm_command.extend_from_slice(command);
-    run_command_with_env(&vm_command, Some(&vm_parent_dir), Some(env))?;
+    run_command_with_output_and_env(&vm_command, Some(&vm_parent_dir), Some(env))?;
     Ok(())
 }
 

From a46066ca230a421ef40bf1136ec030cc10afab84 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 19 Dec 2023 16:55:22 +0100
Subject: [PATCH 477/997] Remove ignored commands from gcc12 CI

---
 .github/workflows/gcc12.yml | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index 1a17b936c743..a27ef913c21d 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -28,9 +28,6 @@ jobs:
           # FIXME: re-enable asm tests when GCC can emit in the right syntax.
           # "--asm-tests",
           "--test-libcore",
-          "--extended-rand-tests",
-          "--extended-regex-example-tests",
-          "--extended-regex-tests",
           "--test-successful-rustc --nb-parts 2 --current-part 0",
           "--test-successful-rustc --nb-parts 2 --current-part 1",
         ]

From 6e53832eda190141516e0faeb4651eecfe3710be Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 19 Dec 2023 21:15:28 +0100
Subject: [PATCH 478/997] Simplify `Runner` type alias

---
 build_system/src/test.rs | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 13828e461913..f368e5b420e6 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -13,7 +13,7 @@ use std::path::{Path, PathBuf};
 use std::str::FromStr;
 
 type Env = HashMap<String, String>;
-type Runner = &'static dyn Fn(&Env, &TestArg) -> Result<(), String>;
+type Runner = fn(&Env, &TestArg) -> Result<(), String>;
 type Runners = HashMap<&'static str, (&'static str, Runner)>;
 
 fn get_runners() -> Runners {
@@ -21,42 +21,42 @@ fn get_runners() -> Runners {
 
     runners.insert(
         "--test-rustc",
-        ("Run all rustc tests", &test_rustc as Runner),
+        ("Run all rustc tests", test_rustc as Runner),
     );
     runners.insert(
         "--test-successful-rustc",
-        ("Run successful rustc tests", &test_successful_rustc),
+        ("Run successful rustc tests", test_successful_rustc),
     );
     runners.insert(
         "--test-failing-rustc",
-        ("Run failing rustc tests", &test_failing_rustc),
+        ("Run failing rustc tests", test_failing_rustc),
     );
-    runners.insert("--test-libcore", ("Run libcore tests", &test_libcore));
-    runners.insert("--clean-ui-tests", ("Clean ui tests", &clean_ui_tests));
-    runners.insert("--clean", ("Empty cargo target directory", &clean));
-    runners.insert("--build-sysroot", ("Build sysroot", &build_sysroot));
-    runners.insert("--std-tests", ("Run std tests", &std_tests));
-    runners.insert("--asm-tests", ("Run asm tests", &asm_tests));
+    runners.insert("--test-libcore", ("Run libcore tests", test_libcore));
+    runners.insert("--clean-ui-tests", ("Clean ui tests", clean_ui_tests));
+    runners.insert("--clean", ("Empty cargo target directory", clean));
+    runners.insert("--build-sysroot", ("Build sysroot", build_sysroot));
+    runners.insert("--std-tests", ("Run std tests", std_tests));
+    runners.insert("--asm-tests", ("Run asm tests", asm_tests));
     runners.insert(
         "--extended-tests",
-        ("Run extended sysroot tests", &extended_sysroot_tests),
+        ("Run extended sysroot tests", extended_sysroot_tests),
     );
     runners.insert(
         "--extended-rand-tests",
-        ("Run extended rand tests", &extended_rand_tests),
+        ("Run extended rand tests", extended_rand_tests),
     );
     runners.insert(
         "--extended-regex-example-tests",
         (
             "Run extended regex example tests",
-            &extended_regex_example_tests,
+            extended_regex_example_tests,
         ),
     );
     runners.insert(
         "--extended-regex-tests",
-        ("Run extended regex tests", &extended_regex_tests),
+        ("Run extended regex tests", extended_regex_tests),
     );
-    runners.insert("--mini-tests", ("Run mini tests", &mini_tests));
+    runners.insert("--mini-tests", ("Run mini tests", mini_tests));
 
     runners
 }

From 8e870c75d991b06a19a6ae8af45cef39a70ffae9 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 19 Dec 2023 21:22:32 +0100
Subject: [PATCH 479/997] Remove unused `TestArgs::use_backend` and display
 messages in case a test is not run

---
 build_system/src/test.rs | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index f368e5b420e6..f66b16c31496 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -97,6 +97,7 @@ fn show_usage() {
     );
     ConfigInfo::show_usage();
     for (option, (doc, _)) in get_runners() {
+        // FIXME: Instead of using the hard-coded `23` value, better to compute it instead.
         let needed_spaces = 23_usize.saturating_sub(option.len());
         let spaces: String = std::iter::repeat(' ').take(needed_spaces).collect();
         println!("    {}{}: {}", option, spaces, doc);
@@ -109,7 +110,6 @@ struct TestArg {
     no_default_features: bool,
     build_only: bool,
     gcc_path: String,
-    use_backend: bool,
     runners: BTreeSet<String>,
     flags: Vec<String>,
     backend: Option<String>,
@@ -207,7 +207,7 @@ impl TestArg {
 }
 
 fn build_if_no_backend(env: &Env, args: &TestArg) -> Result<(), String> {
-    if args.use_backend {
+    if args.backend.is_some() {
         return Ok(());
     }
     let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"rustc"];
@@ -504,8 +504,6 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
         None => return Err("Couldn't retrieve rustc commit hash".to_string()),
     };
     run_command_with_output_and_env(&[&"git", &"checkout", &rustc_commit], rust_dir, Some(env))?;
-    // FIXME: Is it really needed to empty `RUSTFLAGS` here?
-    // env.insert("RUSTFLAGS".to_string(), String::new());
     let cargo = String::from_utf8(
         run_command_with_env(&[&"rustup", &"which", &"cargo"], rust_dir, Some(env))?.stdout,
     )
@@ -684,6 +682,7 @@ fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
 
 fn extended_rand_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     if !args.is_using_gcc_master_branch() {
+        println!("Not using GCC master branch. Skipping `extended_rand_tests`.");
         return Ok(());
     }
     let path = Path::new("rand");
@@ -696,6 +695,7 @@ fn extended_rand_tests(env: &Env, args: &TestArg) -> Result<(), String> {
 
 fn extended_regex_example_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     if !args.is_using_gcc_master_branch() {
+        println!("Not using GCC master branch. Skipping `extended_regex_example_tests`.");
         return Ok(());
     }
     let path = Path::new("regex");
@@ -750,6 +750,7 @@ fn extended_regex_example_tests(env: &Env, args: &TestArg) -> Result<(), String>
 
 fn extended_regex_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     if !args.is_using_gcc_master_branch() {
+        println!("Not using GCC master branch. Skipping `extended_regex_tests`.");
         return Ok(());
     }
     // FIXME: create a function "display_if_not_quiet" or something along the line.

From 05ef68961b0375cca8ddf7e842d6dbba9d46db11 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 20 Dec 2023 14:47:42 +0100
Subject: [PATCH 480/997] Remove unused `build_sysroot.sh` file

---
 build_sysroot/build_sysroot.sh | 34 ----------------------------------
 1 file changed, 34 deletions(-)
 delete mode 100755 build_sysroot/build_sysroot.sh

diff --git a/build_sysroot/build_sysroot.sh b/build_sysroot/build_sysroot.sh
deleted file mode 100755
index ebc7dc375b12..000000000000
--- a/build_sysroot/build_sysroot.sh
+++ /dev/null
@@ -1,34 +0,0 @@
-#!/usr/bin/env bash
-
-# Requires the CHANNEL env var to be set to `debug` or `release.`
-
-set -e
-cd $(dirname "$0")
-
-pushd ../
-source ./config.sh
-popd
-
-# Cleanup for previous run
-#     v Clean target dir except for build scripts and incremental cache
-rm -r target/*/{debug,release}/{build,deps,examples,libsysroot*,native} 2>/dev/null || true
-rm Cargo.lock test_target/Cargo.lock 2>/dev/null || true
-rm -r sysroot/ 2>/dev/null || true
-
-# Build libs
-export RUSTFLAGS="$RUSTFLAGS -Z force-unstable-if-unmarked"
-if [[ "$1" == "--release" ]]; then
-    sysroot_channel='release'
-    RUSTFLAGS="$RUSTFLAGS -Zmir-opt-level=3" cargo build --target $TARGET_TRIPLE --release
-else
-    sysroot_channel='debug'
-    cargo build --target $TARGET_TRIPLE
-fi
-
-# Copy files to sysroot
-mkdir -p sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
-cp -r target/$TARGET_TRIPLE/$sysroot_channel/deps/* sysroot/lib/rustlib/$TARGET_TRIPLE/lib/
-# Copy the source files to the sysroot (Rust for Linux needs this).
-source_dir=sysroot/lib/rustlib/src/rust
-mkdir -p $source_dir
-cp -r sysroot_src/library/ $source_dir

From e26e074261c841508cf4114645291c92ab552be2 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 20 Dec 2023 14:58:43 +0100
Subject: [PATCH 481/997] Rustify `clean_all.sh`

---
 .github/workflows/ci.yml      |  2 +-
 .github/workflows/gcc12.yml   |  2 +-
 .github/workflows/m68k.yml    |  2 +-
 .github/workflows/release.yml |  2 +-
 .github/workflows/stdarch.yml |  2 +-
 build_system/src/clean.rs     | 73 +++++++++++++++++++++++++++++++++++
 build_system/src/main.rs      |  5 +++
 build_system/src/utils.rs     |  2 +-
 clean_all.sh                  |  6 ---
 rustup.sh                     |  2 +-
 10 files changed, 85 insertions(+), 13 deletions(-)
 create mode 100644 build_system/src/clean.rs
 delete mode 100755 clean_all.sh

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index b04ea1550ba2..d14f30338b01 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -103,7 +103,7 @@ jobs:
         ./y.sh build --features master
         # TODO: remove --features master when it is back to the default.
         cargo test --features master
-        ./clean_all.sh
+        ./y.sh clean all
 
     - name: Prepare dependencies
       run: |
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index a27ef913c21d..eef26f01789f 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -86,7 +86,7 @@ jobs:
         ./y.sh prepare --only-libcore --libgccjit12-patches
         ./y.sh build --no-default-features --sysroot-panic-abort
         cargo test --no-default-features
-        ./clean_all.sh
+        ./y.sh clean all
 
     - name: Prepare dependencies
       run: |
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index ac141e062479..a7489b10744f 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -118,7 +118,7 @@ jobs:
         ./y.sh build --target-triple m68k-unknown-linux-gnu --features master
         # TODO: remove --features master when it is back to the default.
         CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu cargo test --features master
-        ./clean_all.sh
+        ./y.sh clean all
 
     - name: Prepare dependencies
       run: |
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 9798bc338f3d..6dc950f88a23 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -82,7 +82,7 @@ jobs:
         EMBED_LTO_BITCODE=1 ./y.sh build --release --release-sysroot --features master
         # TODO: remove --features master when it is back to the default.
         cargo test --features master
-        ./clean_all.sh
+        ./y.sh clean all
 
     - name: Prepare dependencies
       run: |
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index d290f1d05628..dc670c5701c8 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -100,7 +100,7 @@ jobs:
     - name: Clean
       if: ${{ !matrix.cargo_runner }}
       run: |
-        ./clean_all.sh
+        ./y.sh clean all
 
     - name: Prepare dependencies
       run: |
diff --git a/build_system/src/clean.rs b/build_system/src/clean.rs
new file mode 100644
index 000000000000..56cc19d255f9
--- /dev/null
+++ b/build_system/src/clean.rs
@@ -0,0 +1,73 @@
+use crate::utils::remove_file;
+
+use std::fs::remove_dir_all;
+
+#[derive(Default)]
+struct CleanArg {
+    all: bool,
+}
+
+impl CleanArg {
+    fn new() -> Result<Option<Self>, String> {
+        let mut args = CleanArg::default();
+
+        // We skip the binary and the "clean" option.
+        for arg in std::env::args().skip(2) {
+            match arg.as_str() {
+                "all" => args.all = true,
+                "--help" => {
+                    Self::usage();
+                    return Ok(None);
+                }
+                a => return Err(format!("Unknown argument `{}`", a)),
+            }
+        }
+        Ok(Some(args))
+    }
+
+    fn usage() {
+        println!(
+            r#"
+    `clean` command help:
+
+        all                      : Clean all data
+        --help                   : Show this help
+    "#
+        )
+    }
+}
+
+fn clean_all() -> Result<(), String> {
+    let dirs_to_remove = [
+        "target",
+        "build_sysroot/sysroot",
+        "build_sysroot/sysroot_src",
+        "build_sysroot/target",
+        "regex",
+        "simple-raytracer",
+    ];
+    for dir in dirs_to_remove {
+        let _ = remove_dir_all(dir);
+    }
+
+    let files_to_remove = ["build_sysroot/Cargo.lock", "perf.data", "perf.data.old"];
+
+    for file in files_to_remove {
+        let _ = remove_file(file);
+    }
+
+    println!("Successfully ran `clean all`");
+    Ok(())
+}
+
+pub fn run() -> Result<(), String> {
+    let args = match CleanArg::new()? {
+        Some(a) => a,
+        None => return Ok(()),
+    };
+
+    if args.all {
+        clean_all()?;
+    }
+    Ok(())
+}
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index e0091ff69773..1ed44b22a953 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -2,6 +2,7 @@ use std::env;
 use std::process;
 
 mod build;
+mod clean;
 mod config;
 mod prepare;
 mod rustc_info;
@@ -22,6 +23,7 @@ fn usage() {
         "\
 Available commands for build_system:
 
+    clean    : Run clean command
     prepare  : Run prepare command
     build    : Run build command
     test     : Run test command
@@ -30,6 +32,7 @@ Available commands for build_system:
 }
 
 pub enum Command {
+    Clean,
     Prepare,
     Build,
     Test,
@@ -41,6 +44,7 @@ fn main() {
     }
 
     let command = match env::args().nth(1).as_deref() {
+        Some("clean") => Command::Clean,
         Some("prepare") => Command::Prepare,
         Some("build") => Command::Build,
         Some("test") => Command::Test,
@@ -57,6 +61,7 @@ fn main() {
     };
 
     if let Err(e) = match command {
+        Command::Clean => clean::run(),
         Command::Prepare => prepare::run(),
         Command::Build => build::run(),
         Command::Test => test::run(),
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 9c3a86ad68a2..276f4f2d989b 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -346,7 +346,7 @@ pub fn split_args(args: &str) -> Result<Vec<String>, String> {
     Ok(out)
 }
 
-pub fn remove_file<P: AsRef<Path>>(file_path: &P) -> Result<(), String> {
+pub fn remove_file<P: AsRef<Path> + ?Sized>(file_path: &P) -> Result<(), String> {
     std::fs::remove_file(file_path).map_err(|error| {
         format!(
             "Failed to remove `{}`: {:?}",
diff --git a/clean_all.sh b/clean_all.sh
deleted file mode 100755
index 782bd3e5058c..000000000000
--- a/clean_all.sh
+++ /dev/null
@@ -1,6 +0,0 @@
-#!/usr/bin/env bash
-set -e
-set -v
-
-rm -rf target/ build_sysroot/{sysroot/,sysroot_src/,target/,Cargo.lock} perf.data{,.old}
-rm -rf regex/ simple-raytracer/
diff --git a/rustup.sh b/rustup.sh
index a4f938e4b5b7..3cdc07ca5207 100755
--- a/rustup.sh
+++ b/rustup.sh
@@ -15,7 +15,7 @@ case $1 in
             rustup toolchain uninstall $nightly
         done
 
-        ./clean_all.sh
+        ./y.sh clean all
         ./y.sh prepare
         ;;
     "commit")

From 9a8245fed83d55a5bdcd72cf126107a11cc676e1 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 20 Dec 2023 16:19:03 +0100
Subject: [PATCH 482/997] Remove unused `rustup.sh` script

---
 rustup.sh | 29 -----------------------------
 1 file changed, 29 deletions(-)
 delete mode 100755 rustup.sh

diff --git a/rustup.sh b/rustup.sh
deleted file mode 100755
index 3cdc07ca5207..000000000000
--- a/rustup.sh
+++ /dev/null
@@ -1,29 +0,0 @@
-#!/usr/bin/env bash
-
-set -e
-
-case $1 in
-    "prepare")
-        TOOLCHAIN=$(date +%Y-%m-%d)
-
-        echo "=> Installing new nightly"
-        rustup toolchain install --profile minimal nightly-${TOOLCHAIN} # Sanity check to see if the nightly exists
-        echo nightly-${TOOLCHAIN} > rust-toolchain
-
-        echo "=> Uninstalling all old nightlies"
-        for nightly in $(rustup toolchain list | grep nightly | grep -v $TOOLCHAIN | grep -v nightly-x86_64); do
-            rustup toolchain uninstall $nightly
-        done
-
-        ./y.sh clean all
-        ./y.sh prepare
-        ;;
-    "commit")
-        git add rust-toolchain
-        git commit -m "Rustup to $(rustc -V)"
-        ;;
-    *)
-        echo "Unknown command '$1'"
-        echo "Usage: ./rustup.sh prepare|commit"
-        ;;
-esac

From 87a704a2278882d4d8717e83c62879dc540ad87d Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 20 Dec 2023 21:33:21 +0100
Subject: [PATCH 483/997] If the rustc commit cannot be retrieve, just checkout
 the repository

---
 build_system/src/test.rs | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index f66b16c31496..c98be8dcaccd 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -503,7 +503,15 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
         Some(commit_hash) => commit_hash,
         None => return Err("Couldn't retrieve rustc commit hash".to_string()),
     };
-    run_command_with_output_and_env(&[&"git", &"checkout", &rustc_commit], rust_dir, Some(env))?;
+    if rustc_commit != "unknown" {
+        run_command_with_output_and_env(
+            &[&"git", &"checkout", &rustc_commit],
+            rust_dir,
+            Some(env),
+        )?;
+    } else {
+        run_command_with_output_and_env(&[&"git", &"checkout"], rust_dir, Some(env))?;
+    }
     let cargo = String::from_utf8(
         run_command_with_env(&[&"rustup", &"which", &"cargo"], rust_dir, Some(env))?.stdout,
     )

From 6631dd9dd27b63bf89d3ace5dbce02ea240c5a44 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 20 Dec 2023 21:44:12 +0100
Subject: [PATCH 484/997] Don't stop test if llvm FileCheck cannot be found

---
 build_system/src/test.rs | 28 +++++++++++++++-------------
 1 file changed, 15 insertions(+), 13 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index c98be8dcaccd..1a9bb4ea94eb 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -524,23 +524,25 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
             Ok(cargo)
         }
     })?;
-    let llvm_filecheck = String::from_utf8(
-        run_command_with_env(
-            &[
-                &"bash",
-                &"-c",
-                &"which FileCheck-10 || \
+    let llvm_filecheck = match run_command_with_env(
+        &[
+            &"bash",
+            &"-c",
+            &"which FileCheck-10 || \
           which FileCheck-11 || \
           which FileCheck-12 || \
           which FileCheck-13 || \
           which FileCheck-14",
-            ],
-            rust_dir,
-            Some(env),
-        )?
-        .stdout,
-    )
-    .map_err(|error| format!("Failed to retrieve LLVM FileCheck: {:?}", error))?;
+        ],
+        rust_dir,
+        Some(env),
+    ) {
+        Ok(cmd) => String::from_utf8_lossy(&cmd.stdout).to_string(),
+        Err(_) => {
+            eprintln!("Failed to retrieve LLVM FileCheck, ignoring...");
+            String::new()
+        }
+    };
     std::fs::write(
         "rust/config.toml",
         &format!(

From a53495ab45a1d7773561431eb2fb753aee102d44 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 21 Dec 2023 11:18:11 -0500
Subject: [PATCH 485/997] Add comment

---
 src/lib.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/lib.rs b/src/lib.rs
index 8c7bae0c8866..5f8d00bb455e 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -4,6 +4,7 @@
  * TODO(antoyo): support LTO (gcc's equivalent to Full LTO is -flto -flto-partition=one — https://documentation.suse.com/sbp/all/html/SBP-GCC-10/index.html).
  * For Thin LTO, this might be helpful:
  * In gcc 4.6 -fwhopr was removed and became default with -flto. The non-whopr path can still be executed via -flto-partition=none.
+ * Or the new incremental LTO?
  *
  * Maybe some missing optizations enabled by rustc's LTO is in there: https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html
  * Like -fipa-icf (should be already enabled) and maybe -fdevirtualize-at-ltrans.
@@ -29,6 +30,7 @@
 #![warn(unused_lifetimes)]
 #![deny(rustc::untranslatable_diagnostic)]
 #![deny(rustc::diagnostic_outside_of_impl)]
+#![deny(clippy::pattern_type_mismatch)]
 
 extern crate rustc_apfloat;
 extern crate rustc_ast;

From 2e52b08800d5213e6cc7d75559f62584e8e0eede Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 21 Dec 2023 23:46:41 +0100
Subject: [PATCH 486/997] Rustify `cargo.sh`

---
 .github/workflows/stdarch.yml |  4 +-
 Readme.md                     | 10 ++--
 build_system/src/cargo.rs     | 98 +++++++++++++++++++++++++++++++++++
 build_system/src/main.rs      |  5 ++
 build_system/src/test.rs      |  2 +-
 build_system/src/utils.rs     | 27 ++++++++--
 cargo.sh                      | 23 --------
 7 files changed, 135 insertions(+), 34 deletions(-)
 create mode 100644 build_system/src/cargo.rs
 delete mode 100755 cargo.sh

diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index dc670c5701c8..d8336fe991b6 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -126,11 +126,11 @@ jobs:
       if: ${{ !matrix.cargo_runner }}
       run: |
         cd build_sysroot/sysroot_src/library/stdarch/
-        CHANNEL=release TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../cargo.sh test
+        CHANNEL=release TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../y.sh cargo test
 
     - name: Run stdarch tests
       if: ${{ matrix.cargo_runner }}
       run: |
         cd build_sysroot/sysroot_src/library/stdarch/
         # FIXME: these tests fail when the sysroot is compiled with LTO because of a missing symbol in proc-macro.
-        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../cargo.sh test -- --skip rtm --skip tbm --skip sse4a
+        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../y.sh cargo test -- --skip rtm --skip tbm --skip sse4a
diff --git a/Readme.md b/Readme.md
index 68effb2bf78f..f31b5c17969e 100644
--- a/Readme.md
+++ b/Readme.md
@@ -79,7 +79,7 @@ export CG_GCCJIT_DIR=[the full path to rustc_codegen_gcc]
 ### Cargo
 
 ```bash
-$ CHANNEL="release" $CG_GCCJIT_DIR/cargo.sh run
+$ CHANNEL="release" $CG_GCCJIT_DIR/y.sh cargo run
 ```
 
 If you compiled cg_gccjit in debug mode (aka you didn't pass `--release` to `./y.sh test`) you should use `CHANNEL="debug"` instead or omit `CHANNEL="release"` completely.
@@ -230,13 +230,13 @@ Run do the command with `-v -save-temps` and then extract the `lto1` line from t
 ### How to send arguments to the GCC linker
 
 ```
-CG_RUSTFLAGS="-Clink-args=-save-temps -v" ../cargo.sh build
+CG_RUSTFLAGS="-Clink-args=-save-temps -v" ../y.sh cargo build
 ```
 
 ### How to see the personality functions in the asm dump
 
 ```
-CG_RUSTFLAGS="-Clink-arg=-save-temps -v -Clink-arg=-dA" ../cargo.sh build
+CG_RUSTFLAGS="-Clink-arg=-save-temps -v -Clink-arg=-dA" ../y.sh cargo build
 ```
 
 ### How to see the LLVM IR for a sysroot crate
@@ -324,13 +324,13 @@ generate it in [gimple.md](./doc/gimple.md).
  * Run `./y.sh prepare --cross` so that the sysroot is patched for the cross-compiling case.
  * Set the path to the cross-compiling libgccjit in `gcc_path`.
  * Make sure you have the linker for your target (for instance `m68k-unknown-linux-gnu-gcc`) in your `$PATH`. Currently, the linker name is hardcoded as being `$TARGET-gcc`. Specify the target when building the sysroot: `./y.sh build --target-triple m68k-unknown-linux-gnu`.
- * Build your project by specifying the target: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../cargo.sh build --target m68k-unknown-linux-gnu`.
+ * Build your project by specifying the target: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../y.sh cargo build --target m68k-unknown-linux-gnu`.
 
 If the target is not yet supported by the Rust compiler, create a [target specification file](https://docs.rust-embedded.org/embedonomicon/custom-target.html) (note that the `arch` specified in this file must be supported by the rust compiler).
 Then, you can use it the following way:
 
  * Add the target specification file using `--target` as an **absolute** path to build the sysroot: `./y.sh build --target-triple m68k-unknown-linux-gnu --target $(pwd)/m68k-unknown-linux-gnu.json`
- * Build your project by specifying the target specification file: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../cargo.sh build --target path/to/m68k-unknown-linux-gnu.json`.
+ * Build your project by specifying the target specification file: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../y.sh cargo build --target path/to/m68k-unknown-linux-gnu.json`.
 
 If you get the following error:
 
diff --git a/build_system/src/cargo.rs b/build_system/src/cargo.rs
new file mode 100644
index 000000000000..06b543a6cad6
--- /dev/null
+++ b/build_system/src/cargo.rs
@@ -0,0 +1,98 @@
+use crate::config::ConfigInfo;
+use crate::utils::{
+    get_toolchain, run_command_with_output_and_env, rustc_toolchain_version_info,
+    rustc_version_info,
+};
+
+use std::collections::HashMap;
+use std::ffi::OsStr;
+
+fn args() -> Result<Option<Vec<String>>, String> {
+    // We skip the binary and the "cargo" option.
+    if let Some("--help") = std::env::args().skip(2).next().as_deref() {
+        usage();
+        return Ok(None);
+    }
+    let args = std::env::args().skip(2).collect::<Vec<_>>();
+    if args.is_empty() {
+        return Err(
+            "Expected at least one argument for `cargo` subcommand, found none".to_string(),
+        );
+    }
+    Ok(Some(args))
+}
+
+fn usage() {
+    println!(
+        r#"
+`cargo` command help:
+
+    [args]     : Arguments to be passed to the cargo command
+    --help     : Show this help
+"#
+    )
+}
+
+pub fn run() -> Result<(), String> {
+    let args = match args()? {
+        Some(a) => a,
+        None => return Ok(()),
+    };
+
+    // We first need to go to the original location to ensure that the config setup will go as
+    // expected.
+    let current_dir = std::env::current_dir()
+        .map_err(|error| format!("Failed to get current directory path: {:?}", error))?;
+    let current_exe = std::env::current_exe()
+        .map_err(|error| format!("Failed to get current exe path: {:?}", error))?;
+    let parent_dir = match current_exe.parent() {
+        Some(parent) => parent,
+        None => {
+            return Err(format!(
+                "Cannot get parent of current executable path `{}`",
+                current_exe.display()
+            ));
+        }
+    };
+    std::env::set_current_dir(&parent_dir).map_err(|error| {
+        format!(
+            "Failed to go to `{}` folder: {:?}",
+            parent_dir.display(),
+            error
+        )
+    })?;
+
+    let mut env: HashMap<String, String> = std::env::vars().collect();
+    ConfigInfo::default().setup(&mut env, None)?;
+    let toolchain = get_toolchain()?;
+
+    let toolchain_version = rustc_toolchain_version_info(&toolchain)?;
+    let default_version = rustc_version_info(None)?;
+    if toolchain_version != default_version {
+        println!(
+            "rustc_codegen_gcc is built for {} but the default rustc version is {}.",
+            toolchain_version.short, default_version.short,
+        );
+        println!("Using {}.", toolchain_version.short);
+    }
+
+    // We go back to the original folder since we now have set up everything we needed.
+    std::env::set_current_dir(&current_dir).map_err(|error| {
+        format!(
+            "Failed to go back to `{}` folder: {:?}",
+            current_dir.display(),
+            error
+        )
+    })?;
+
+    let rustflags = env.get("RUSTFLAGS").cloned().unwrap_or_default();
+    env.insert("RUSTDOCFLAGS".to_string(), rustflags);
+    let toolchain = format!("+{}", toolchain);
+    let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &toolchain];
+    for arg in &args {
+        command.push(arg);
+    }
+    run_command_with_output_and_env(&command, None, Some(&env))?;
+
+    Ok(())
+}
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index 1ed44b22a953..102c5486a75e 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -2,6 +2,7 @@ use std::env;
 use std::process;
 
 mod build;
+mod cargo;
 mod clean;
 mod config;
 mod prepare;
@@ -23,6 +24,7 @@ fn usage() {
         "\
 Available commands for build_system:
 
+    cargo    : Run cargo command
     clean    : Run clean command
     prepare  : Run prepare command
     build    : Run build command
@@ -32,6 +34,7 @@ Available commands for build_system:
 }
 
 pub enum Command {
+    Cargo,
     Clean,
     Prepare,
     Build,
@@ -44,6 +47,7 @@ fn main() {
     }
 
     let command = match env::args().nth(1).as_deref() {
+        Some("cargo") => Command::Cargo,
         Some("clean") => Command::Clean,
         Some("prepare") => Command::Prepare,
         Some("build") => Command::Build,
@@ -61,6 +65,7 @@ fn main() {
     };
 
     if let Err(e) = match command {
+        Command::Cargo => cargo::run(),
         Command::Clean => clean::run(),
         Command::Prepare => prepare::run(),
         Command::Build => build::run(),
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 1a9bb4ea94eb..1577cbf2b53e 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -796,7 +796,7 @@ fn extended_sysroot_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     // echo "[BENCH COMPILE] ebobby/simple-raytracer"
     // hyperfine --runs "${RUN_RUNS:-10}" --warmup 1 --prepare "cargo clean" \
     // "RUSTC=rustc RUSTFLAGS='' cargo build" \
-    // "../cargo.sh build"
+    // "../y.sh cargo build"
 
     // echo "[BENCH RUN] ebobby/simple-raytracer"
     // cp ./target/debug/main ./raytracer_cg_gcc
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 276f4f2d989b..fdd8bd8f4c4d 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -158,21 +158,42 @@ pub fn get_os_name() -> Result<String, String> {
     }
 }
 
-#[derive(Default)]
+#[derive(Default, PartialEq)]
 pub struct RustcVersionInfo {
+    pub short: String,
     pub version: String,
     pub host: Option<String>,
     pub commit_hash: Option<String>,
     pub commit_date: Option<String>,
 }
 
+pub fn rustc_toolchain_version_info(toolchain: &str) -> Result<RustcVersionInfo, String> {
+    rustc_version_info_inner(None, Some(toolchain))
+}
+
 pub fn rustc_version_info(rustc: Option<&str>) -> Result<RustcVersionInfo, String> {
-    let output = run_command(&[&rustc.unwrap_or("rustc"), &"-vV"], None)?;
+    rustc_version_info_inner(rustc, None)
+}
+
+fn rustc_version_info_inner(
+    rustc: Option<&str>,
+    toolchain: Option<&str>,
+) -> Result<RustcVersionInfo, String> {
+    let output = if let Some(toolchain) = toolchain {
+        run_command(&[&rustc.unwrap_or("rustc"), &toolchain, &"-vV"], None)
+    } else {
+        run_command(&[&rustc.unwrap_or("rustc"), &"-vV"], None)
+    }?;
     let content = std::str::from_utf8(&output.stdout).unwrap_or("");
 
     let mut info = RustcVersionInfo::default();
+    let mut lines = content.split('\n');
+    info.short = match lines.next() {
+        Some(s) => s.to_string(),
+        None => return Err("failed to retrieve rustc version".to_string()),
+    };
 
-    for line in content.split('\n').map(|line| line.trim()) {
+    for line in lines.map(|line| line.trim()) {
         match line.split_once(':') {
             Some(("host", data)) => info.host = Some(data.trim().to_string()),
             Some(("release", data)) => info.version = data.trim().to_string(),
diff --git a/cargo.sh b/cargo.sh
deleted file mode 100755
index b68a08ee88f8..000000000000
--- a/cargo.sh
+++ /dev/null
@@ -1,23 +0,0 @@
-#!/usr/bin/env bash
-
-if [ -z $CHANNEL ]; then
-export CHANNEL='debug'
-fi
-
-pushd $(dirname "$0") >/dev/null
-source config.sh
-
-# read nightly compiler from rust-toolchain file
-TOOLCHAIN=$(cat rust-toolchain | grep channel | sed 's/channel = "\(.*\)"/\1/')
-
-popd >/dev/null
-
-if [[ $(${RUSTC} -V) != $(${RUSTC} +${TOOLCHAIN} -V) ]]; then
-    echo "rustc_codegen_gcc is build for $(rustc +${TOOLCHAIN} -V) but the default rustc version is $(rustc -V)."
-    echo "Using $(rustc +${TOOLCHAIN} -V)."
-fi
-
-cmd=$1
-shift
-
-RUSTDOCFLAGS="$RUSTFLAGS" cargo +${TOOLCHAIN} $cmd $@

From ec940748175eca4e476ed29fa537319eb090356a Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 22 Dec 2023 00:47:01 +0100
Subject: [PATCH 487/997] Correctly take into account potential position of
 cargo command in `y.sh`

---
 build_system/src/cargo.rs | 26 ++++++++++++++++++++------
 y.sh                      |  6 +++---
 2 files changed, 23 insertions(+), 9 deletions(-)

diff --git a/build_system/src/cargo.rs b/build_system/src/cargo.rs
index 06b543a6cad6..5f9de5e2eb65 100644
--- a/build_system/src/cargo.rs
+++ b/build_system/src/cargo.rs
@@ -6,6 +6,7 @@ use crate::utils::{
 
 use std::collections::HashMap;
 use std::ffi::OsStr;
+use std::path::PathBuf;
 
 fn args() -> Result<Option<Vec<String>>, String> {
     // We skip the binary and the "cargo" option.
@@ -42,18 +43,31 @@ pub fn run() -> Result<(), String> {
     // We first need to go to the original location to ensure that the config setup will go as
     // expected.
     let current_dir = std::env::current_dir()
+        .and_then(|path| path.canonicalize())
         .map_err(|error| format!("Failed to get current directory path: {:?}", error))?;
     let current_exe = std::env::current_exe()
+        .and_then(|path| path.canonicalize())
         .map_err(|error| format!("Failed to get current exe path: {:?}", error))?;
-    let parent_dir = match current_exe.parent() {
-        Some(parent) => parent,
-        None => {
+    let mut parent_dir = current_exe
+        .components()
+        .map(|comp| comp.as_os_str())
+        .collect::<Vec<_>>();
+    // We run this script from "build_system/target/release/y", so we need to remove these elements.
+    for to_remove in &["y", "release", "target", "build_system"] {
+        if parent_dir
+            .last()
+            .map(|part| part == to_remove)
+            .unwrap_or(false)
+        {
+            parent_dir.pop();
+        } else {
             return Err(format!(
-                "Cannot get parent of current executable path `{}`",
-                current_exe.display()
+                "Build script not executed from `build_system/target/release/y` (in path {})",
+                current_exe.display(),
             ));
         }
-    };
+    }
+    let parent_dir = PathBuf::from(parent_dir.join(&OsStr::new("/")));
     std::env::set_current_dir(&parent_dir).map_err(|error| {
         format!(
             "Failed to go to `{}` folder: {:?}",
diff --git a/y.sh b/y.sh
index 188109743e3d..69d7917dd777 100755
--- a/y.sh
+++ b/y.sh
@@ -2,7 +2,7 @@
 
 set -e
 echo "[BUILD] build system" 1>&2
-cd build_system
+pushd $(dirname "$0")/build_system > /dev/null
 cargo build --release
-cd ..
-./build_system/target/release/y $@
+popd > /dev/null
+$(dirname "$0")/build_system/target/release/y $@

From c122376493e40dd494dac45614205c340141f005 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 29 Dec 2023 21:27:36 +0100
Subject: [PATCH 488/997] Don't show `cargo` command errors

---
 build_system/src/cargo.rs |  6 ++++--
 build_system/src/utils.rs | 25 +++++++++++++++++++++----
 2 files changed, 25 insertions(+), 6 deletions(-)

diff --git a/build_system/src/cargo.rs b/build_system/src/cargo.rs
index 5f9de5e2eb65..67b301d9aa64 100644
--- a/build_system/src/cargo.rs
+++ b/build_system/src/cargo.rs
@@ -1,6 +1,6 @@
 use crate::config::ConfigInfo;
 use crate::utils::{
-    get_toolchain, run_command_with_output_and_env, rustc_toolchain_version_info,
+    get_toolchain, run_command_with_output_and_env_no_err, rustc_toolchain_version_info,
     rustc_version_info,
 };
 
@@ -106,7 +106,9 @@ pub fn run() -> Result<(), String> {
     for arg in &args {
         command.push(arg);
     }
-    run_command_with_output_and_env(&command, None, Some(&env))?;
+    if run_command_with_output_and_env_no_err(&command, None, Some(&env)).is_err() {
+        std::process::exit(1);
+    }
 
     Ok(())
 }
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index fdd8bd8f4c4d..f0a07b597a0f 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -30,6 +30,7 @@ fn check_exit_status(
     cwd: Option<&Path>,
     exit_status: ExitStatus,
     output: Option<&Output>,
+    show_err: bool,
 ) -> Result<(), String> {
     if exit_status.success() {
         return Ok(());
@@ -46,7 +47,9 @@ fn check_exit_status(
         exit_status.code()
     );
     let input = input.iter().map(|i| i.as_ref()).collect::<Vec<&OsStr>>();
-    eprintln!("Command `{:?}` failed", input);
+    if show_err {
+        eprintln!("Command `{:?}` failed", input);
+    }
     if let Some(output) = output {
         let stdout = String::from_utf8_lossy(&output.stdout);
         if !stdout.is_empty() {
@@ -88,7 +91,7 @@ pub fn run_command_with_env(
     let output = get_command_inner(input, cwd, env)
         .output()
         .map_err(|e| command_error(input, &cwd, e))?;
-    check_exit_status(input, cwd, output.status, Some(&output))?;
+    check_exit_status(input, cwd, output.status, Some(&output), true)?;
     Ok(output)
 }
 
@@ -101,7 +104,7 @@ pub fn run_command_with_output(
         .map_err(|e| command_error(input, &cwd, e))?
         .wait()
         .map_err(|e| command_error(input, &cwd, e))?;
-    check_exit_status(input, cwd, exit_status, None)?;
+    check_exit_status(input, cwd, exit_status, None, true)?;
     Ok(())
 }
 
@@ -115,7 +118,21 @@ pub fn run_command_with_output_and_env(
         .map_err(|e| command_error(input, &cwd, e))?
         .wait()
         .map_err(|e| command_error(input, &cwd, e))?;
-    check_exit_status(input, cwd, exit_status, None)?;
+    check_exit_status(input, cwd, exit_status, None, true)?;
+    Ok(())
+}
+
+pub fn run_command_with_output_and_env_no_err(
+    input: &[&dyn AsRef<OsStr>],
+    cwd: Option<&Path>,
+    env: Option<&HashMap<String, String>>,
+) -> Result<(), String> {
+    let exit_status = get_command_inner(input, cwd, env)
+        .spawn()
+        .map_err(|e| command_error(input, &cwd, e))?
+        .wait()
+        .map_err(|e| command_error(input, &cwd, e))?;
+    check_exit_status(input, cwd, exit_status, None, false)?;
     Ok(())
 }
 

From b5681ca4aa818e10debd99020327af9c01c43ed2 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 3 Jan 2024 15:27:19 +0100
Subject: [PATCH 489/997] Update intrinsics conversion

---
 src/intrinsic/archs.rs | 27 +++++++++++++++++----------
 1 file changed, 17 insertions(+), 10 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 15d67385c3e9..c4ae1751fa05 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -151,8 +151,10 @@ match name {
     "llvm.amdgcn.msad.u8" => "__builtin_amdgcn_msad_u8",
     "llvm.amdgcn.perm" => "__builtin_amdgcn_perm",
     "llvm.amdgcn.permlane16" => "__builtin_amdgcn_permlane16",
+    "llvm.amdgcn.permlane16.var" => "__builtin_amdgcn_permlane16_var",
     "llvm.amdgcn.permlane64" => "__builtin_amdgcn_permlane64",
     "llvm.amdgcn.permlanex16" => "__builtin_amdgcn_permlanex16",
+    "llvm.amdgcn.permlanex16.var" => "__builtin_amdgcn_permlanex16_var",
     "llvm.amdgcn.qsad.pk.u16.u8" => "__builtin_amdgcn_qsad_pk_u16_u8",
     "llvm.amdgcn.queue.ptr" => "__builtin_amdgcn_queue_ptr",
     "llvm.amdgcn.rcp.legacy" => "__builtin_amdgcn_rcp_legacy",
@@ -160,11 +162,20 @@ match name {
     "llvm.amdgcn.readlane" => "__builtin_amdgcn_readlane",
     "llvm.amdgcn.rsq.legacy" => "__builtin_amdgcn_rsq_legacy",
     "llvm.amdgcn.s.barrier" => "__builtin_amdgcn_s_barrier",
+    "llvm.amdgcn.s.barrier.init" => "__builtin_amdgcn_s_barrier_init",
+    "llvm.amdgcn.s.barrier.join" => "__builtin_amdgcn_s_barrier_join",
+    "llvm.amdgcn.s.barrier.leave" => "__builtin_amdgcn_s_barrier_leave",
+    "llvm.amdgcn.s.barrier.signal" => "__builtin_amdgcn_s_barrier_signal",
+    "llvm.amdgcn.s.barrier.signal.isfirst" => "__builtin_amdgcn_s_barrier_signal_isfirst",
+    "llvm.amdgcn.s.barrier.signal.isfirst.var" => "__builtin_amdgcn_s_barrier_signal_isfirst_var",
+    "llvm.amdgcn.s.barrier.signal.var" => "__builtin_amdgcn_s_barrier_signal_var",
+    "llvm.amdgcn.s.barrier.wait" => "__builtin_amdgcn_s_barrier_wait",
     "llvm.amdgcn.s.dcache.inv" => "__builtin_amdgcn_s_dcache_inv",
     "llvm.amdgcn.s.dcache.inv.vol" => "__builtin_amdgcn_s_dcache_inv_vol",
     "llvm.amdgcn.s.dcache.wb" => "__builtin_amdgcn_s_dcache_wb",
     "llvm.amdgcn.s.dcache.wb.vol" => "__builtin_amdgcn_s_dcache_wb_vol",
     "llvm.amdgcn.s.decperflevel" => "__builtin_amdgcn_s_decperflevel",
+    "llvm.amdgcn.s.get.barrier.state" => "__builtin_amdgcn_s_get_barrier_state",
     "llvm.amdgcn.s.get.waveid.in.workgroup" => "__builtin_amdgcn_s_get_waveid_in_workgroup",
     "llvm.amdgcn.s.getpc" => "__builtin_amdgcn_s_getpc",
     "llvm.amdgcn.s.getreg" => "__builtin_amdgcn_s_getreg",
@@ -176,8 +187,10 @@ match name {
     "llvm.amdgcn.s.setprio" => "__builtin_amdgcn_s_setprio",
     "llvm.amdgcn.s.setreg" => "__builtin_amdgcn_s_setreg",
     "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_sleep",
+    "llvm.amdgcn.s.sleep.var" => "__builtin_amdgcn_s_sleep_var",
     "llvm.amdgcn.s.wait.event.export.ready" => "__builtin_amdgcn_s_wait_event_export_ready",
     "llvm.amdgcn.s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
+    "llvm.amdgcn.s.wakeup.barrier" => "__builtin_amdgcn_s_wakeup_barrier",
     "llvm.amdgcn.sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
     "llvm.amdgcn.sad.u16" => "__builtin_amdgcn_sad_u16",
     "llvm.amdgcn.sad.u8" => "__builtin_amdgcn_sad_u8",
@@ -314,6 +327,8 @@ match name {
     // bpf
     "llvm.bpf.btf.type.id" => "__builtin_bpf_btf_type_id",
     "llvm.bpf.compare" => "__builtin_bpf_compare",
+    "llvm.bpf.getelementptr.and.load" => "__builtin_bpf_getelementptr_and_load",
+    "llvm.bpf.getelementptr.and.store" => "__builtin_bpf_getelementptr_and_store",
     "llvm.bpf.load.byte" => "__builtin_bpf_load_byte",
     "llvm.bpf.load.half" => "__builtin_bpf_load_half",
     "llvm.bpf.load.word" => "__builtin_bpf_load_word",
@@ -5776,14 +5791,6 @@ match name {
     "llvm.s390.verimf" => "__builtin_s390_verimf",
     "llvm.s390.verimg" => "__builtin_s390_verimg",
     "llvm.s390.verimh" => "__builtin_s390_verimh",
-    "llvm.s390.verllb" => "__builtin_s390_verllb",
-    "llvm.s390.verllf" => "__builtin_s390_verllf",
-    "llvm.s390.verllg" => "__builtin_s390_verllg",
-    "llvm.s390.verllh" => "__builtin_s390_verllh",
-    "llvm.s390.verllvb" => "__builtin_s390_verllvb",
-    "llvm.s390.verllvf" => "__builtin_s390_verllvf",
-    "llvm.s390.verllvg" => "__builtin_s390_verllvg",
-    "llvm.s390.verllvh" => "__builtin_s390_verllvh",
     "llvm.s390.vfaeb" => "__builtin_s390_vfaeb",
     "llvm.s390.vfaef" => "__builtin_s390_vfaef",
     "llvm.s390.vfaeh" => "__builtin_s390_vfaeh",
@@ -5815,7 +5822,7 @@ match name {
     "llvm.s390.vistrh" => "__builtin_s390_vistrh",
     "llvm.s390.vlbb" => "__builtin_s390_vlbb",
     "llvm.s390.vll" => "__builtin_s390_vll",
-    "llvm.s390.vlrl" => "__builtin_s390_vlrl",
+    "llvm.s390.vlrl" => "__builtin_s390_vlrlr",
     "llvm.s390.vmaeb" => "__builtin_s390_vmaeb",
     "llvm.s390.vmaef" => "__builtin_s390_vmaef",
     "llvm.s390.vmaeh" => "__builtin_s390_vmaeh",
@@ -5885,7 +5892,7 @@ match name {
     "llvm.s390.vstrczb" => "__builtin_s390_vstrczb",
     "llvm.s390.vstrczf" => "__builtin_s390_vstrczf",
     "llvm.s390.vstrczh" => "__builtin_s390_vstrczh",
-    "llvm.s390.vstrl" => "__builtin_s390_vstrl",
+    "llvm.s390.vstrl" => "__builtin_s390_vstrlr",
     "llvm.s390.vsumb" => "__builtin_s390_vsumb",
     "llvm.s390.vsumgf" => "__builtin_s390_vsumgf",
     "llvm.s390.vsumgh" => "__builtin_s390_vsumgh",

From b10f5dd3b9f33093030bda58b470d727128fa3ea Mon Sep 17 00:00:00 2001
From: vuittont60 <81072379+vuittont60@users.noreply.github.com>
Date: Tue, 9 Jan 2024 10:52:52 +0800
Subject: [PATCH 490/997] Fix typo Readme.md

---
 Readme.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Readme.md b/Readme.md
index f31b5c17969e..39ff41acf84a 100644
--- a/Readme.md
+++ b/Readme.md
@@ -181,7 +181,7 @@ debug_tree(expr);
 
 (defined in print-tree.h)
 
-To print a debug reprensentation of a gimple struct:
+To print a debug representation of a gimple struct:
 
 ```c
 debug_gimple_stmt(gimple_struct)

From 4e8627cf8982e16c000f5b36e0cf505337ce467f Mon Sep 17 00:00:00 2001
From: vuittont60 <81072379+vuittont60@users.noreply.github.com>
Date: Tue, 9 Jan 2024 10:53:00 +0800
Subject: [PATCH 491/997] Fix typo src/base.rs

---
 src/base.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/base.rs b/src/base.rs
index b0788718da4d..773e234150d1 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -164,7 +164,7 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
             context.add_driver_option("-v");
         }
 
-        // NOTE: The codegen generates unrechable blocks.
+        // NOTE: The codegen generates unreachable blocks.
         context.set_allow_unreachable_blocks(true);
 
         {

From f8e079a1714c43d81b96bfa2af67833eeec6eae6 Mon Sep 17 00:00:00 2001
From: vuittont60 <81072379+vuittont60@users.noreply.github.com>
Date: Tue, 9 Jan 2024 10:53:11 +0800
Subject: [PATCH 492/997] Fix typo src/intrinsic/llvm.rs

---
 src/intrinsic/llvm.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 35eb4a11005b..0d2ce20c654c 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -262,7 +262,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
             },
             // NOTE: the LLVM intrinsic receives 3 floats, but the GCC builtin requires 3 vectors.
             // FIXME: the intrinsics like _mm_mask_fmadd_sd should probably directly call the GCC
-            // instrinsic to avoid this.
+            // intrinsic to avoid this.
             "__builtin_ia32_vfmaddss3_round" => {
                 let new_args = args.to_vec();
                 let arg1_type = gcc_func.get_param_type(0);

From 45137ddd32681be7a0cd0bf0465f672f176099e2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 11 Jan 2024 17:41:37 -0500
Subject: [PATCH 493/997] Fix the destination path of the sysroot copy

---
 build_system/src/build.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index d264aac7effb..3149560b458a 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -165,11 +165,11 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     )?;
 
     // Copy the source files to the sysroot (Rust for Linux needs this).
-    let sysroot_src_path = "sysroot/lib/rustlib/src/rust";
+    let sysroot_src_path = start_dir.join("sysroot/lib/rustlib/src/rust");
     fs::create_dir_all(&sysroot_src_path).map_err(|error| {
         format!(
             "Failed to create directory `{}`: {:?}",
-            sysroot_src_path, error
+            sysroot_src_path.display(), error
         )
     })?;
     run_command(

From 0fe5c7fee387d8440b99227ec17587863434b6b6 Mon Sep 17 00:00:00 2001
From: Trevor Gross <tgross@intrepidcs.com>
Date: Thu, 11 Jan 2024 20:42:00 -0500
Subject: [PATCH 494/997] Switch from actions-rs to preinstalled rustup

actions-rs is deprecated. Switch to using the preinstalled rustup to install
the toolchain, and https://github.com/Swatinem/rust-cache to configure
cacheing.
---
 .github/workflows/ci.yml       | 38 ++++++------------------------
 .github/workflows/failures.yml | 38 ++++++------------------------
 .github/workflows/gcc12.yml    | 38 ++++++------------------------
 .github/workflows/m68k.yml     | 42 ++++++++--------------------------
 .github/workflows/release.yml  | 38 ++++++------------------------
 .github/workflows/stdarch.yml  | 39 ++++++-------------------------
 6 files changed, 44 insertions(+), 189 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index d14f30338b01..d063f3929396 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -37,6 +37,13 @@ jobs:
     steps:
     - uses: actions/checkout@v3
 
+    # `rustup show` installs from rust-toolchain.toml
+    - name: Setup rust toolchain
+      run: rustup show
+
+    - name: Setup rust cache
+      uses: Swatinem/rust-cache@v2
+
     - name: Install packages
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
       run: sudo apt-get install ninja-build ripgrep llvm-14-tools
@@ -63,30 +70,6 @@ jobs:
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
 
-    - name: Cache cargo installed crates
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/bin
-        key: cargo-installed-crates2-ubuntu-latest
-
-    - name: Cache cargo registry
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/registry
-        key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
-
-    - name: Cache cargo index
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/git
-        key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
-
-    - name: Cache cargo target dir
-      uses: actions/cache@v3
-      with:
-        path: target
-        key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
-
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
       #if: ${{ contains(matrix.commands, 'rustc') }}
@@ -111,13 +94,6 @@ jobs:
         git config --global user.name "User"
         ./y.sh prepare
 
-    # Compile is a separate step, as the actions-rs/cargo action supports error annotations
-    - name: Compile
-      uses: actions-rs/cargo@v1.0.3
-      with:
-        command: build
-        args: --release
-
     - name: Add more failing tests because the sysroot is not compiled with LTO
       run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
 
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index b411b9a17846..b768918a014e 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -36,6 +36,13 @@ jobs:
     steps:
     - uses: actions/checkout@v3
 
+    # `rustup show` installs from rust-toolchain.toml
+    - name: Setup rust toolchain
+      run: rustup show
+
+    - name: Setup rust cache
+      uses: Swatinem/rust-cache@v2
+
     - name: Install packages
       run: sudo apt-get install ninja-build ripgrep
 
@@ -71,30 +78,6 @@ jobs:
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
 
-    - name: Cache cargo installed crates
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/bin
-        key: cargo-installed-crates2-ubuntu-latest
-
-    - name: Cache cargo registry
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/registry
-        key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
-
-    - name: Cache cargo index
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/git
-        key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
-
-    - name: Cache cargo target dir
-      uses: actions/cache@v3
-      with:
-        path: target
-        key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
-
     #- name: Cache rust repository
       #uses: actions/cache@v3
       #id: cache-rust-repository
@@ -115,13 +98,6 @@ jobs:
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       run: ./y.sh prepare
 
-    # Compile is a separate step, as the actions-rs/cargo action supports error annotations
-    - name: Compile
-      uses: actions-rs/cargo@v1.0.3
-      with:
-        command: build
-        args: --release
-
     - name: Add more failing tests because the sysroot is not compiled with LTO
       run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
 
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index eef26f01789f..a522423f36cc 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -35,6 +35,13 @@ jobs:
     steps:
     - uses: actions/checkout@v3
 
+    # `rustup show` installs from rust-toolchain.toml
+    - name: Setup rust toolchain
+      run: rustup show
+
+    - name: Setup rust cache
+      uses: Swatinem/rust-cache@v2
+
     - name: Install packages
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
       run: sudo apt-get install ninja-build ripgrep llvm-14-tools libgccjit-12-dev
@@ -48,30 +55,6 @@ jobs:
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
 
-    - name: Cache cargo installed crates
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/bin
-        key: cargo-installed-crates2-ubuntu-latest
-
-    - name: Cache cargo registry
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/registry
-        key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
-
-    - name: Cache cargo index
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/git
-        key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
-
-    - name: Cache cargo target dir
-      uses: actions/cache@v3
-      with:
-        path: target
-        key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
-
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
       #if: ${{ contains(matrix.commands, 'rustc') }}
@@ -94,13 +77,6 @@ jobs:
         git config --global user.name "User"
         ./y.sh prepare --libgccjit12-patches
 
-    # Compile is a separate step, as the actions-rs/cargo action supports error annotations
-    - name: Compile
-      uses: actions-rs/cargo@v1.0.3
-      with:
-        command: build
-        args: --release
-
     - name: Add more failing tests for GCC 12
       run: cat failing-ui-tests12.txt >> failing-ui-tests.txt
 
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index a7489b10744f..af4665021985 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -36,13 +36,20 @@ jobs:
         ]
 
     steps:
+    - uses: actions/checkout@v3
+
+    # `rustup show` installs from rust-toolchain.toml
+    - name: Setup rust toolchain
+      run: rustup show
+
+    - name: Setup rust cache
+      uses: Swatinem/rust-cache@v2
+
     - name: Install packages
       run: |
         sudo apt-get update
         sudo apt-get install qemu qemu-user-static
 
-    - uses: actions/checkout@v3
-
     - name: Download GCC artifact
       uses: dawidd6/action-download-artifact@v2
       with:
@@ -72,30 +79,6 @@ jobs:
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
 
-    - name: Cache cargo installed crates
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/bin
-        key: cargo-installed-crates2-ubuntu-latest
-
-    #- name: Cache cargo registry
-      #uses: actions/cache@v3
-      #with:
-        #path: ~/.cargo/registry
-        #key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
-
-    #- name: Cache cargo index
-      #uses: actions/cache@v3
-      #with:
-        #path: ~/.cargo/git
-        #key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
-
-    - name: Cache cargo target dir
-      uses: actions/cache@v3
-      with:
-        path: target
-        key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
-
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
       #if: ${{ contains(matrix.commands, 'rustc') }}
@@ -126,13 +109,6 @@ jobs:
         git config --global user.name "User"
         ./y.sh prepare --cross
 
-    # Compile is a separate step, as the actions-rs/cargo action supports error annotations
-    - name: Compile
-      uses: actions-rs/cargo@v1.0.3
-      with:
-        command: build
-        args: --release
-
     - name: Add more failing tests because the sysroot is not compiled with LTO
       run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
 
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 6dc950f88a23..071c21d5f7bb 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -26,6 +26,13 @@ jobs:
     steps:
     - uses: actions/checkout@v3
 
+    # `rustup show` installs from rust-toolchain.toml
+    - name: Setup rust toolchain
+      run: rustup show
+
+    - name: Setup rust cache
+      uses: Swatinem/rust-cache@v2
+
     - name: Install packages
       run: sudo apt-get install ninja-build ripgrep
 
@@ -51,30 +58,6 @@ jobs:
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
 
-    - name: Cache cargo installed crates
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/bin
-        key: cargo-installed-crates2-ubuntu-latest
-
-    - name: Cache cargo registry
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/registry
-        key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
-
-    - name: Cache cargo index
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/git
-        key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
-
-    - name: Cache cargo target dir
-      uses: actions/cache@v3
-      with:
-        path: target
-        key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
-
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
@@ -92,13 +75,6 @@ jobs:
         # FIXME(antoyo): we cannot enable LTO for stdarch tests currently because of some failing LTO tests using proc-macros.
         echo -n 'lto = "fat"' >> build_sysroot/Cargo.toml
 
-    # Compile is a separate step, as the actions-rs/cargo action supports error annotations
-    - name: Compile
-      uses: actions-rs/cargo@v1.0.3
-      with:
-        command: build
-        args: --release
-
     - name: Add more failing tests because of undefined symbol errors (FIXME)
       run: cat failing-lto-tests.txt >> failing-ui-tests.txt
 
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index d8336fe991b6..7c3ad6281e9f 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -26,6 +26,13 @@ jobs:
     steps:
     - uses: actions/checkout@v3
 
+    # `rustup show` installs from rust-toolchain.toml
+    - name: Setup rust toolchain
+      run: rustup show
+
+    - name: Setup rust cache
+      uses: Swatinem/rust-cache@v2
+
     - name: Install packages
       run: sudo apt-get install ninja-build ripgrep
 
@@ -65,30 +72,6 @@ jobs:
         echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
 
-    - name: Cache cargo installed crates
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/bin
-        key: cargo-installed-crates2-ubuntu-latest
-
-    - name: Cache cargo registry
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/registry
-        key: ${{ runner.os }}-cargo-registry2-${{ hashFiles('**/Cargo.lock') }}
-
-    - name: Cache cargo index
-      uses: actions/cache@v3
-      with:
-        path: ~/.cargo/git
-        key: ${{ runner.os }}-cargo-index-${{ hashFiles('**/Cargo.lock') }}
-
-    - name: Cache cargo target dir
-      uses: actions/cache@v3
-      with:
-        path: target
-        key: ${{ runner.os }}-cargo-build-target-${{ hashFiles('rust-toolchain') }}
-
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
@@ -108,14 +91,6 @@ jobs:
         git config --global user.name "User"
         ./y.sh prepare
 
-    # Compile is a separate step, as the actions-rs/cargo action supports error annotations
-    - name: Compile
-      uses: actions-rs/cargo@v1.0.3
-      with:
-        command: build
-        # TODO: remove `--features master` when it is back to the default.
-        args: --release --features master
-
     - name: Run tests
       if: ${{ !matrix.cargo_runner }}
       run: |

From 52946377dc9dfbeb3c2ebc31f9263d308c0af2ab Mon Sep 17 00:00:00 2001
From: Nicholas Thompson <NCGThompson@gmail.com>
Date: Sun, 14 Jan 2024 11:52:06 -0500
Subject: [PATCH 495/997] Honor $RUSTUP_HOME

---
 build_system/src/test.rs | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 1577cbf2b53e..dc1dc82736ef 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -556,7 +556,7 @@ verbose-tests = true
 [build]
 cargo = "{cargo}"
 local-rebuild = true
-rustc = "{home}/.rustup/toolchains/{toolchain}-{host_triple}/bin/rustc"
+rustc = "{rustup_home}/toolchains/{toolchain}-{host_triple}/bin/rustc"
 
 [target.x86_64-unknown-linux-gnu]
 llvm-filecheck = "{llvm_filecheck}"
@@ -565,7 +565,10 @@ llvm-filecheck = "{llvm_filecheck}"
 download-ci-llvm = false
 "#,
             cargo = cargo.trim(),
-            home = env.get("HOME").unwrap(),
+            rustup_home = match env.get("RUSTUP_HOME") {
+                Some(rustup_dir) => rustup_dir.clone(),
+                None => env.get("HOME").unwrap().to_owned() + "/.rustup",
+            },
             toolchain = toolchain,
             host_triple = args.config_info.host_triple,
             llvm_filecheck = llvm_filecheck.trim(),

From 7dd3f6fffbefcd8acb142cd2d0d166b08619e62f Mon Sep 17 00:00:00 2001
From: Nicholas Thompson <NCGThompson@gmail.com>
Date: Sun, 14 Jan 2024 14:19:40 -0500
Subject: [PATCH 496/997] call rustup which

---
 build_system/src/test.rs | 29 +++++++++++++++++++----------
 1 file changed, 19 insertions(+), 10 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index dc1dc82736ef..11622026994d 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -488,8 +488,10 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
 }
 
 fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
-    let toolchain = get_toolchain()?;
-
+    let toolchain = format!("+{channel}-{host}",
+        channel = get_toolchain()?, // May also include date
+        host = args.config_info.host_triple
+    );
     let rust_dir = Some(Path::new("rust"));
     // If the repository was already cloned, command will fail, so doesn't matter.
     let _ = run_command_with_output_and_env(
@@ -524,6 +526,18 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
             Ok(cargo)
         }
     })?;
+    let rustc = String::from_utf8(
+        run_command_with_env(&[&"rustup", &OsStr::new(&*toolchain), &"which", &"rustc"], rust_dir, Some(env))?.stdout,
+    )
+    .map_err(|error| format!("Failed to retrieve rustc path: {:?}", error))
+    .and_then(|rustc| {
+        let rustc = rustc.trim().to_owned();
+        if rustc.is_empty() {
+            Err(format!("`rustc` path is empty"))
+        } else {
+            Ok(rustc)
+        }
+    })?;
     let llvm_filecheck = match run_command_with_env(
         &[
             &"bash",
@@ -556,7 +570,7 @@ verbose-tests = true
 [build]
 cargo = "{cargo}"
 local-rebuild = true
-rustc = "{rustup_home}/toolchains/{toolchain}-{host_triple}/bin/rustc"
+rustc = "{rustc}"
 
 [target.x86_64-unknown-linux-gnu]
 llvm-filecheck = "{llvm_filecheck}"
@@ -564,13 +578,8 @@ llvm-filecheck = "{llvm_filecheck}"
 [llvm]
 download-ci-llvm = false
 "#,
-            cargo = cargo.trim(),
-            rustup_home = match env.get("RUSTUP_HOME") {
-                Some(rustup_dir) => rustup_dir.clone(),
-                None => env.get("HOME").unwrap().to_owned() + "/.rustup",
-            },
-            toolchain = toolchain,
-            host_triple = args.config_info.host_triple,
+            cargo = cargo,
+            rustc = rustc,
             llvm_filecheck = llvm_filecheck.trim(),
         ),
     )

From dcb531f13042c5d335ce689555aae2230c3db778 Mon Sep 17 00:00:00 2001
From: Nic <NCGThompson@gmail.com>
Date: Tue, 16 Jan 2024 12:57:34 -0500
Subject: [PATCH 497/997] Update build_system/src/test.rs

Co-authored-by: antoyo <antoyo@users.noreply.github.com>
---
 build_system/src/test.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 11622026994d..e098e3702b89 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -527,7 +527,7 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
         }
     })?;
     let rustc = String::from_utf8(
-        run_command_with_env(&[&"rustup", &OsStr::new(&*toolchain), &"which", &"rustc"], rust_dir, Some(env))?.stdout,
+        run_command_with_env(&[&"rustup", &toolchain, &"which", &"rustc"], rust_dir, Some(env))?.stdout,
     )
     .map_err(|error| format!("Failed to retrieve rustc path: {:?}", error))
     .and_then(|rustc| {

From 94ed9d16cff42752e2fdd95ca131fa8288cb513f Mon Sep 17 00:00:00 2001
From: Rowan S-L <r@fawkes.io>
Date: Thu, 18 Jan 2024 12:41:25 -0500
Subject: [PATCH 498/997] rename `y.sh test --clean-ui-tests` to `y.sh clean
 ui-tests`

---
 build_system/src/clean.rs | 76 +++++++++++++++++++++++----------------
 build_system/src/test.rs  | 15 --------
 2 files changed, 45 insertions(+), 46 deletions(-)

diff --git a/build_system/src/clean.rs b/build_system/src/clean.rs
index 56cc19d255f9..929a878113d6 100644
--- a/build_system/src/clean.rs
+++ b/build_system/src/clean.rs
@@ -1,40 +1,43 @@
-use crate::utils::remove_file;
+use crate::utils::{remove_file, run_command};
 
 use std::fs::remove_dir_all;
 
 #[derive(Default)]
-struct CleanArg {
-    all: bool,
+enum CleanArg {
+    /// `clean all`
+    All,
+    /// `clean ui-tests`
+    UiTests,
+    /// `clean --help`
+    #[default]
+    Help,
 }
 
 impl CleanArg {
-    fn new() -> Result<Option<Self>, String> {
-        let mut args = CleanArg::default();
-
+    fn new() -> Result<Self, String> {
         // We skip the binary and the "clean" option.
         for arg in std::env::args().skip(2) {
-            match arg.as_str() {
-                "all" => args.all = true,
-                "--help" => {
-                    Self::usage();
-                    return Ok(None);
-                }
-                a => return Err(format!("Unknown argument `{}`", a)),
-            }
+            return match arg.as_str() {
+                "all" => Ok(Self::All),
+                "ui-tests" => Ok(Self::UiTests),
+                "--help" => Ok(Self::Help),
+                a => Err(format!("Unknown argument `{}`", a)),
+            };
         }
-        Ok(Some(args))
+        Ok(Self::default())
     }
+}
 
-    fn usage() {
-        println!(
-            r#"
-    `clean` command help:
+fn usage() {
+    println!(
+        r#"
+`clean` command help:
 
-        all                      : Clean all data
-        --help                   : Show this help
-    "#
-        )
-    }
+    all                      : Clean all data
+    ui-tests                 : Clean ui tests
+    --help                   : Show this help
+"#
+    )
 }
 
 fn clean_all() -> Result<(), String> {
@@ -60,14 +63,25 @@ fn clean_all() -> Result<(), String> {
     Ok(())
 }
 
-pub fn run() -> Result<(), String> {
-    let args = match CleanArg::new()? {
-        Some(a) => a,
-        None => return Ok(()),
-    };
+fn clean_ui_tests() -> Result<(), String> {
+    run_command(
+        &[
+            &"find",
+            &"rust/build/x86_64-unknown-linux-gnu/test/ui/",
+            &"-name",
+            &"stamp",
+            &"-delete",
+        ],
+        None,
+    )?;
+    Ok(())
+}
 
-    if args.all {
-        clean_all()?;
+pub fn run() -> Result<(), String> {
+    match CleanArg::new()? {
+        CleanArg::All => clean_all()?,
+        CleanArg::UiTests => clean_ui_tests()?,
+        CleanArg::Help => usage(),
     }
     Ok(())
 }
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 1577cbf2b53e..f3d0d38499cb 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -32,7 +32,6 @@ fn get_runners() -> Runners {
         ("Run failing rustc tests", test_failing_rustc),
     );
     runners.insert("--test-libcore", ("Run libcore tests", test_libcore));
-    runners.insert("--clean-ui-tests", ("Clean ui tests", clean_ui_tests));
     runners.insert("--clean", ("Empty cargo target directory", clean));
     runners.insert("--build-sysroot", ("Build sysroot", build_sysroot));
     runners.insert("--std-tests", ("Run std tests", std_tests));
@@ -1086,20 +1085,6 @@ fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
     })
 }
 
-fn clean_ui_tests(_env: &Env, _args: &TestArg) -> Result<(), String> {
-    run_command(
-        &[
-            &"find",
-            &"rust/build/x86_64-unknown-linux-gnu/test/ui/",
-            &"-name",
-            &"stamp",
-            &"-delete",
-        ],
-        None,
-    )?;
-    Ok(())
-}
-
 fn run_all(env: &Env, args: &TestArg) -> Result<(), String> {
     clean(env, args)?;
     mini_tests(env, args)?;

From d34789f5d2bb31b76b8775a695ba8b559ac93303 Mon Sep 17 00:00:00 2001
From: Rowan S-L <r@fawkes.io>
Date: Fri, 19 Jan 2024 11:18:40 -0500
Subject: [PATCH 499/997] update Intel Software Development Emulator

---
 .github/workflows/stdarch.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 7c3ad6281e9f..8ffb82518efa 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -41,9 +41,9 @@ jobs:
       run: |
           mkdir intel-sde
           cd intel-sde
-          dir=sde-external-9.14.0-2022-10-25-lin
+          dir=sde-external-9.33.0-2024-01-07-lin
           file=$dir.tar.xz
-          wget https://downloadmirror.intel.com/751535/$file
+          wget https://downloadmirror.intel.com/813591/$file
           tar xvf $file
           sudo mkdir /usr/share/intel-sde
           sudo cp -r $dir/* /usr/share/intel-sde

From 599492a3d594312f59d051240e573176bd1df2ab Mon Sep 17 00:00:00 2001
From: liewyec <ondrej.hojdysz@gmail.com>
Date: Sat, 20 Jan 2024 13:30:51 +0100
Subject: [PATCH 500/997] replace filter with skip and take

---
 build_system/src/test.rs | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 1577cbf2b53e..e7325d5e71fe 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -979,12 +979,7 @@ where
         let start = current_part * count;
         let end = current_part * count + count;
         // We remove the files we don't want to test.
-        for path in files
-            .iter()
-            .enumerate()
-            .filter(|(pos, _)| *pos < start || *pos >= end)
-            .map(|(_, path)| path)
-        {
+        for path in files.iter().skip(start).take(count) {
             remove_file(&rust_path.join(path))?;
         }
     }

From ad8e8201395b0c2a9dbacfde2c5aa7580a1cdb82 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 25 Jan 2024 21:20:12 -0400
Subject: [PATCH 501/997] Update for rebased gcc

---
 .github/workflows/ci.yml                           | 14 +++-----------
 .github/workflows/failures.yml                     | 14 +++-----------
 .github/workflows/gcc12.yml                        |  4 ++--
 .github/workflows/m68k.yml                         | 12 +++---------
 .github/workflows/release.yml                      | 14 +++-----------
 .github/workflows/stdarch.yml                      | 12 ++----------
 .gitignore                                         |  2 ++
 Cargo.lock                                         |  4 ++--
 build_system/src/test.rs                           |  5 ++---
 src/consts.rs                                      |  2 +-
 src/mono_item.rs                                   |  2 +-
 .../failing-lto-tests.txt                          |  0
 .../failing-non-lto-tests.txt                      |  0
 failing-ui-tests.txt => tests/failing-ui-tests.txt |  1 +
 .../failing-ui-tests12.txt                         |  1 -
 15 files changed, 25 insertions(+), 62 deletions(-)
 rename failing-lto-tests.txt => tests/failing-lto-tests.txt (100%)
 rename failing-non-lto-tests.txt => tests/failing-non-lto-tests.txt (100%)
 rename failing-ui-tests.txt => tests/failing-ui-tests.txt (98%)
 rename failing-ui-tests12.txt => tests/failing-ui-tests12.txt (97%)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index d063f3929396..0d84926fddfe 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -49,19 +49,11 @@ jobs:
       run: sudo apt-get install ninja-build ripgrep llvm-14-tools
 
     - name: Download artifact
-      uses: dawidd6/action-download-artifact@v2
-      with:
-          workflow: main.yml
-          name: gcc-13
-          path: gcc-13
-          repo: antoyo/gcc
-          branch: ${{ matrix.libgccjit_version.artifacts_branch }}
-          event: push
-          search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
+      run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/gcc-13.deb
 
     - name: Setup path to libgccjit
       run: |
-          sudo dpkg --force-overwrite -i gcc-13/gcc-13.deb
+          sudo dpkg --force-overwrite -i gcc-13.deb
           echo /usr/lib/ > gcc_path
 
     - name: Set env
@@ -95,7 +87,7 @@ jobs:
         ./y.sh prepare
 
     - name: Add more failing tests because the sysroot is not compiled with LTO
-      run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
+      run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
 
     - name: Run tests
       run: |
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index b768918a014e..7aaf47facd87 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -56,20 +56,12 @@ jobs:
 
     - name: Download artifact
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
-      uses: dawidd6/action-download-artifact@v2
-      with:
-          workflow: main.yml
-          name: gcc-13
-          path: gcc-13
-          repo: antoyo/gcc
-          branch: ${{ matrix.libgccjit_version.artifacts_branch }}
-          event: push
-          search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
+      run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/gcc-13.deb
 
     - name: Setup path to libgccjit
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       run: |
-          sudo dpkg --force-overwrite -i gcc-13/gcc-13.deb
+          sudo dpkg --force-overwrite -i gcc-13.deb
           echo /usr/lib/ > gcc_path
 
     - name: Set env
@@ -99,7 +91,7 @@ jobs:
       run: ./y.sh prepare
 
     - name: Add more failing tests because the sysroot is not compiled with LTO
-      run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
+      run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
 
     - name: Run tests
       id: tests
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index a522423f36cc..8d4f88ea7b1a 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -78,10 +78,10 @@ jobs:
         ./y.sh prepare --libgccjit12-patches
 
     - name: Add more failing tests for GCC 12
-      run: cat failing-ui-tests12.txt >> failing-ui-tests.txt
+      run: cat tests/failing-ui-tests12.txt >> tests/failing-ui-tests.txt
 
     - name: Add more failing tests because the sysroot is not compiled with LTO
-      run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
+      run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
 
     - name: Run tests
       run: |
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index af4665021985..b0866bafb8e3 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -50,14 +50,8 @@ jobs:
         sudo apt-get update
         sudo apt-get install qemu qemu-user-static
 
-    - name: Download GCC artifact
-      uses: dawidd6/action-download-artifact@v2
-      with:
-          workflow: m68k.yml
-          name: gcc-m68k-13
-          repo: cross-cg-gcc-tools/cross-gcc
-          branch: master
-          event: push
+    - name: Download artifact
+      run: curl -LO https://github.com/cross-cg-gcc-tools/cross-gcc/releases/latest/download/gcc-m68k-13.deb
 
     - name: Download VM artifact
       uses: dawidd6/action-download-artifact@v2
@@ -110,7 +104,7 @@ jobs:
         ./y.sh prepare --cross
 
     - name: Add more failing tests because the sysroot is not compiled with LTO
-      run: cat failing-non-lto-tests.txt >> failing-ui-tests.txt
+      run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
 
     - name: Run tests
       run: |
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 071c21d5f7bb..7628fd655716 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -37,19 +37,11 @@ jobs:
       run: sudo apt-get install ninja-build ripgrep
 
     - name: Download artifact
-      uses: dawidd6/action-download-artifact@v2
-      with:
-          workflow: main.yml
-          name: gcc-13
-          path: gcc-13
-          repo: antoyo/gcc
-          branch: "master"
-          event: push
-          search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
+      run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/gcc-13.deb
 
     - name: Setup path to libgccjit
       run: |
-          sudo dpkg --force-overwrite -i gcc-13/gcc-13.deb
+          sudo dpkg --force-overwrite -i gcc-13.deb
           echo /usr/lib/ > gcc_path
 
     - name: Set env
@@ -76,7 +68,7 @@ jobs:
         echo -n 'lto = "fat"' >> build_sysroot/Cargo.toml
 
     - name: Add more failing tests because of undefined symbol errors (FIXME)
-      run: cat failing-lto-tests.txt >> failing-ui-tests.txt
+      run: cat tests/failing-lto-tests.txt >> tests/failing-ui-tests.txt
 
     - name: Run tests
       run: |
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 8ffb82518efa..a5c3a5456bd7 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -51,19 +51,11 @@ jobs:
           sudo ln -s /usr/share/intel-sde/sde64 /usr/bin/sde64
 
     - name: Download artifact
-      uses: dawidd6/action-download-artifact@v2
-      with:
-          workflow: main.yml
-          name: gcc-13
-          path: gcc-13
-          repo: antoyo/gcc
-          branch: "master"
-          event: push
-          search_artifacts: true # Because, instead, the action only check the last job ran and that won't work since we want multiple artifacts.
+      run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/gcc-13.deb
 
     - name: Setup path to libgccjit
       run: |
-          sudo dpkg --force-overwrite -i gcc-13/gcc-13.deb
+          sudo dpkg --force-overwrite -i gcc-13.deb
           echo /usr/lib/ > gcc_path
 
     - name: Set env
diff --git a/.gitignore b/.gitignore
index b44d1aa78c2e..c865386dad30 100644
--- a/.gitignore
+++ b/.gitignore
@@ -19,6 +19,8 @@ gimple*
 res
 test-backend
 gcc_path
+cross_gcc_path
+projects
 benchmarks
 tools/llvm-project
 tools/llvmint
diff --git a/Cargo.lock b/Cargo.lock
index 7c1863369278..26dc7c535f85 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -74,7 +74,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#6e290f25b1d1edab5ae9ace486fd2dc8c08d6421"
+source = "git+https://github.com/antoyo/gccjit.rs#e6109eb8b7ced60b5191e65b34954d04d4abeaec"
 dependencies = [
  "gccjit_sys",
 ]
@@ -82,7 +82,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#6e290f25b1d1edab5ae9ace486fd2dc8c08d6421"
+source = "git+https://github.com/antoyo/gccjit.rs#e6109eb8b7ced60b5191e65b34954d04d4abeaec"
 dependencies = [
  "libc",
 ]
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 44c003d8f75e..5e8a5ebe9496 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -988,7 +988,6 @@ where
         // one test.
         let count = files.len() / nb_parts + 1;
         let start = current_part * count;
-        let end = current_part * count + count;
         // We remove the files we don't want to test.
         for path in files.iter().skip(start).take(count) {
             remove_file(&rust_path.join(path))?;
@@ -1047,7 +1046,7 @@ fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
             Some(Path::new("rust")),
         )?;
         // Putting back only the failing ones.
-        let path = "failing-ui-tests.txt";
+        let path = "tests/failing-ui-tests.txt";
         if let Ok(files) = std::fs::read_to_string(path) {
             for file in files
                 .split('\n')
@@ -1072,7 +1071,7 @@ fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
 fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
     test_rustc_inner(env, args, || {
         // Removing the failing tests.
-        let path = "failing-ui-tests.txt";
+        let path = "tests/failing-ui-tests.txt";
         if let Ok(files) = std::fs::read_to_string(path) {
             for file in files
                 .split('\n')
diff --git a/src/consts.rs b/src/consts.rs
index d8a1fd315c0a..2501c126faf2 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -235,7 +235,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
             if !self.tcx.is_reachable_non_generic(def_id) {
                 #[cfg(feature = "master")]
-                global.add_attribute(VarAttribute::Visibility(Visibility::Hidden));
+                global.add_string_attribute(VarAttribute::Visibility(Visibility::Hidden));
             }
 
             global
diff --git a/src/mono_item.rs b/src/mono_item.rs
index 3322d56513bb..fdeb2f96fe2c 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -23,7 +23,7 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
         let global = self.define_global(symbol_name, gcc_type, is_tls, attrs.link_section);
         #[cfg(feature="master")]
-        global.add_attribute(VarAttribute::Visibility(base::visibility_to_gcc(visibility)));
+        global.add_string_attribute(VarAttribute::Visibility(base::visibility_to_gcc(visibility)));
 
         // TODO(antoyo): set linkage.
         self.instances.borrow_mut().insert(instance, global);
diff --git a/failing-lto-tests.txt b/tests/failing-lto-tests.txt
similarity index 100%
rename from failing-lto-tests.txt
rename to tests/failing-lto-tests.txt
diff --git a/failing-non-lto-tests.txt b/tests/failing-non-lto-tests.txt
similarity index 100%
rename from failing-non-lto-tests.txt
rename to tests/failing-non-lto-tests.txt
diff --git a/failing-ui-tests.txt b/tests/failing-ui-tests.txt
similarity index 98%
rename from failing-ui-tests.txt
rename to tests/failing-ui-tests.txt
index 023fe9d7e831..13d79cd23e33 100644
--- a/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -70,3 +70,4 @@ tests/ui/async-await/deep-futures-are-freeze.rs
 tests/ui/closures/capture-unsized-by-ref.rs
 tests/ui/coroutine/resume-after-return.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs
+tests/ui/intrinsics/intrinsics-integer.rs
diff --git a/failing-ui-tests12.txt b/tests/failing-ui-tests12.txt
similarity index 97%
rename from failing-ui-tests12.txt
rename to tests/failing-ui-tests12.txt
index 3ef2bc3ebf89..857c158e42f0 100644
--- a/failing-ui-tests12.txt
+++ b/tests/failing-ui-tests12.txt
@@ -38,6 +38,5 @@ tests/ui/rust-2018/proc-macro-crate-in-paths.rs
 tests/ui/target-feature/missing-plusminus.rs
 tests/ui/sse2.rs
 tests/ui/codegen/issue-79865-llvm-miscompile.rs
-tests/ui/intrinsics/intrinsics-integer.rs
 tests/ui/std-backtrace.rs
 tests/ui/mir/alignment/packed.rs

From 0a38748d8a49b21d5060b6b274a4b87cd5a7c53e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 3 Feb 2024 13:26:06 -0500
Subject: [PATCH 502/997] Renable intrinsics-integer.rs test

---
 tests/failing-ui-tests.txt   | 1 -
 tests/failing-ui-tests12.txt | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 13d79cd23e33..023fe9d7e831 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -70,4 +70,3 @@ tests/ui/async-await/deep-futures-are-freeze.rs
 tests/ui/closures/capture-unsized-by-ref.rs
 tests/ui/coroutine/resume-after-return.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs
-tests/ui/intrinsics/intrinsics-integer.rs
diff --git a/tests/failing-ui-tests12.txt b/tests/failing-ui-tests12.txt
index 857c158e42f0..b4615b26852d 100644
--- a/tests/failing-ui-tests12.txt
+++ b/tests/failing-ui-tests12.txt
@@ -40,3 +40,4 @@ tests/ui/sse2.rs
 tests/ui/codegen/issue-79865-llvm-miscompile.rs
 tests/ui/std-backtrace.rs
 tests/ui/mir/alignment/packed.rs
+tests/ui/intrinsics/intrinsics-integer.rs

From 6b05753cb3c7373b151774540476ae04365fd898 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 8 Feb 2024 12:17:41 -0500
Subject: [PATCH 503/997] Run the tests of popular crates in the CI

---
 .github/workflows/ci.yml    |  1 +
 build_system/src/prepare.rs |  2 +-
 build_system/src/test.rs    | 56 +++++++++++++++++++++++++++++++++++--
 build_system/src/utils.rs   | 12 ++++++--
 4 files changed, 66 insertions(+), 5 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 0d84926fddfe..426eabdd176b 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -32,6 +32,7 @@ jobs:
           "--extended-regex-tests",
           "--test-successful-rustc --nb-parts 2 --current-part 0",
           "--test-successful-rustc --nb-parts 2 --current-part 1",
+          "--projects",
         ]
 
     steps:
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index ce9b440be053..7f1401e594c4 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -152,7 +152,7 @@ fn clone_and_setup<F>(repo_url: &str, checkout_commit: &str, extra: Option<F>) -
 where
     F: Fn(&Path) -> Result<(), String>,
 {
-    let clone_result = git_clone(repo_url, None)?;
+    let clone_result = git_clone(repo_url, None, false)?;
     if !clone_result.ran_clone {
         println!("`{}` has already been cloned", clone_result.repo_name);
     }
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 5e8a5ebe9496..656432292431 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1,13 +1,13 @@
 use crate::build;
 use crate::config::{Channel, ConfigInfo};
 use crate::utils::{
-    get_gcc_path, get_toolchain, remove_file, run_command, run_command_with_env,
+    get_gcc_path, get_toolchain, git_clone, remove_file, run_command, run_command_with_env,
     run_command_with_output_and_env, rustc_version_info, split_args, walk_dir,
 };
 
 use std::collections::{BTreeSet, HashMap};
 use std::ffi::OsStr;
-use std::fs::{remove_dir_all, File};
+use std::fs::{create_dir_all, remove_dir_all, File};
 use std::io::{BufRead, BufReader};
 use std::path::{Path, PathBuf};
 use std::str::FromStr;
@@ -31,6 +31,7 @@ fn get_runners() -> Runners {
         "--test-failing-rustc",
         ("Run failing rustc tests", test_failing_rustc),
     );
+    runners.insert("--projects", ("Run the tests of popular crates", test_projects));
     runners.insert("--test-libcore", ("Run libcore tests", test_libcore));
     runners.insert("--clean", ("Empty cargo target directory", clean));
     runners.insert("--build-sysroot", ("Build sysroot", build_sysroot));
@@ -679,6 +680,57 @@ where
 // echo "[BUILD] sysroot in release mode"
 // ./build_sysroot/build_sysroot.sh --release
 
+fn test_projects(env: &Env, args: &TestArg) -> Result<(), String> {
+    let projects = [
+        //"https://gitlab.gnome.org/GNOME/librsvg", // FIXME: doesn't compile in the CI since the
+        // version of cairo and other libraries is too old.
+        "https://github.com/rust-random/getrandom",
+        "https://github.com/BurntSushi/memchr",
+        "https://github.com/dtolnay/itoa",
+        "https://github.com/rust-lang/cfg-if",
+        "https://github.com/rust-lang-nursery/lazy-static.rs",
+        //"https://github.com/marshallpierce/rust-base64", // FIXME: one test is OOM-killed.
+        // TODO: ignore the base64 test that is OOM-killed.
+        "https://github.com/time-rs/time",
+        "https://github.com/rust-lang/log",
+        "https://github.com/bitflags/bitflags",
+        //"https://github.com/serde-rs/serde", // FIXME: one test fails.
+        //"https://github.com/rayon-rs/rayon", // TODO: very slow, only run on master?
+        //"https://github.com/rust-lang/cargo", // TODO: very slow, only run on master?
+    ];
+
+    let run_tests = |projects_path, iter: &mut dyn Iterator<Item=&&str>| -> Result<(), String> {
+        for project in iter {
+            let clone_result = git_clone(project, Some(projects_path), true)?;
+            let repo_path = Path::new(&clone_result.repo_dir);
+            run_cargo_command(&[&"build", &"--release"], Some(repo_path), env, args)?;
+            run_cargo_command(&[&"test"], Some(repo_path), env, args)?;
+        }
+
+        Ok(())
+    };
+
+    let projects_path = Path::new("projects");
+    create_dir_all(projects_path)
+        .map_err(|err| format!("Failed to create directory `projects`: {}", err))?;
+
+    let nb_parts = args.nb_parts.unwrap_or(0);
+    if nb_parts > 0 {
+        // We increment the number of tests by one because if this is an odd number, we would skip
+        // one test.
+        let count = projects.len() / nb_parts + 1;
+        let current_part = args.current_part.unwrap();
+        let start = current_part * count;
+        // We remove the projects we don't want to test.
+        run_tests(projects_path, &mut projects.iter().skip(start).take(count))?;
+    }
+    else {
+        run_tests(projects_path, &mut projects.iter())?;
+    }
+
+    Ok(())
+}
+
 fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[TEST] libcore");
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index f0a07b597a0f..85f1e18006ca 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -283,9 +283,10 @@ pub fn get_gcc_path() -> Result<String, String> {
 pub struct CloneResult {
     pub ran_clone: bool,
     pub repo_name: String,
+    pub repo_dir: String,
 }
 
-pub fn git_clone(to_clone: &str, dest: Option<&Path>) -> Result<CloneResult, String> {
+pub fn git_clone(to_clone: &str, dest: Option<&Path>, shallow_clone: bool) -> Result<CloneResult, String> {
     let repo_name = to_clone.split('/').last().unwrap();
     let repo_name = match repo_name.strip_suffix(".git") {
         Some(n) => n.to_string(),
@@ -299,13 +300,20 @@ pub fn git_clone(to_clone: &str, dest: Option<&Path>) -> Result<CloneResult, Str
         return Ok(CloneResult {
             ran_clone: false,
             repo_name,
+            repo_dir: dest.display().to_string(),
         });
     }
 
-    run_command_with_output(&[&"git", &"clone", &to_clone, &dest], None)?;
+    let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"git", &"clone", &to_clone, &dest];
+    if shallow_clone {
+        command.push(&"--depth");
+        command.push(&"1");
+    }
+    run_command_with_output(&command, None)?;
     Ok(CloneResult {
         ran_clone: true,
         repo_name,
+        repo_dir: dest.display().to_string(),
     })
 }
 

From 2640b316e2e64dd1c4a79ba81bd2da809ad47d41 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 9 Feb 2024 15:26:44 +0100
Subject: [PATCH 504/997] Switch to `config.toml` instead of `gcc-path`

---
 .gitignore                 |   1 +
 Readme.md                  |  22 ++++++--
 build_system/Cargo.lock    |   9 +++
 build_system/Cargo.toml    |   3 +
 build_system/src/build.rs  |  25 +++++----
 build_system/src/config.rs | 112 ++++++++++++++++++++++++++++++++++---
 build_system/src/test.rs   |  35 ++++++++----
 build_system/src/utils.rs  |  32 -----------
 config.example.toml        |   2 +
 9 files changed, 173 insertions(+), 68 deletions(-)
 create mode 100644 config.example.toml

diff --git a/.gitignore b/.gitignore
index c865386dad30..687c3a6797af 100644
--- a/.gitignore
+++ b/.gitignore
@@ -28,3 +28,4 @@ tools/llvmint-2
 # The `llvm` folder is generated by the `tools/generate_intrinsics.py` script to update intrinsics.
 llvm
 build_system/target
+config.toml
diff --git a/Readme.md b/Readme.md
index 39ff41acf84a..a380d0d5be6d 100644
--- a/Readme.md
+++ b/Readme.md
@@ -49,17 +49,27 @@ $ make check-jit
 $ make check-jit RUNTESTFLAGS="-v -v -v jit.exp=jit.dg/test-asm.cc"
 ```
 
-**Put the path to your custom build of libgccjit in the file `gcc_path`.**
+**Put the path to your custom build of libgccjit in the file `config.toml`.**
+
+If you followed the instructions exactly as written (ie, you have created a `gcc-build` folder
+where gcc is built), the only thing you need to do is:
 
 ```bash
-$ dirname $(readlink -f `find . -name libgccjit.so`) > gcc_path
+$ cp config.example.toml config.toml
+```
+
+But if you did something different, you also need to set the `gcc-path` value in `config.toml` with
+the result of this command:
+
+```bash
+$ dirname $(readlink -f `find . -name libgccjit.so`)
 ```
 
 Then you can run commands like this:
 
 ```bash
 $ ./y.sh prepare # download and patch sysroot src and install hyperfine for benchmarking
-$ LIBRARY_PATH=$(cat gcc_path) LD_LIBRARY_PATH=$(cat gcc_path) ./y.sh build --release --features master
+$ ./y.sh build --release --features master
 ```
 
 To run the tests:
@@ -100,7 +110,7 @@ error: failed to copy bitcode to object file: No such file or directory (os erro
 > You should prefer using the Cargo method.
 
 ```bash
-$ LIBRARY_PATH=$(cat gcc_path) LD_LIBRARY_PATH=$(cat gcc_path) rustc +$(cat $CG_GCCJIT_DIR/rust-toolchain | grep 'channel' | cut -d '=' -f 2 | sed 's/"//g' | sed 's/ //g') -Cpanic=abort -Zcodegen-backend=$CG_GCCJIT_DIR/target/release/librustc_codegen_gcc.so --sysroot $CG_GCCJIT_DIR/build_sysroot/sysroot my_crate.rs
+$ LIBRARY_PATH="[gcc-path value]" LD_LIBRARY_PATH="[gcc-path value]" rustc +$(cat $CG_GCCJIT_DIR/rust-toolchain | grep 'channel' | cut -d '=' -f 2 | sed 's/"//g' | sed 's/ //g') -Cpanic=abort -Zcodegen-backend=$CG_GCCJIT_DIR/target/release/librustc_codegen_gcc.so --sysroot $CG_GCCJIT_DIR/build_sysroot/sysroot my_crate.rs
 ```
 
 ## Env vars
@@ -322,7 +332,7 @@ generate it in [gimple.md](./doc/gimple.md).
 #### Configuring rustc_codegen_gcc
 
  * Run `./y.sh prepare --cross` so that the sysroot is patched for the cross-compiling case.
- * Set the path to the cross-compiling libgccjit in `gcc_path`.
+ * Set the path to the cross-compiling libgccjit in `gcc-path` (in `config.toml`).
  * Make sure you have the linker for your target (for instance `m68k-unknown-linux-gnu-gcc`) in your `$PATH`. Currently, the linker name is hardcoded as being `$TARGET-gcc`. Specify the target when building the sysroot: `./y.sh build --target-triple m68k-unknown-linux-gnu`.
  * Build your project by specifying the target: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../y.sh cargo build --target m68k-unknown-linux-gnu`.
 
@@ -338,4 +348,4 @@ If you get the following error:
 /usr/bin/ld: unrecognised emulation mode: m68kelf
 ```
 
-Make sure you set `gcc_path` to the install directory.
+Make sure you set `gcc-path` (in `config.toml`) to the install directory.
diff --git a/build_system/Cargo.lock b/build_system/Cargo.lock
index 86268e191603..e727561a2bfb 100644
--- a/build_system/Cargo.lock
+++ b/build_system/Cargo.lock
@@ -2,6 +2,15 @@
 # It is not intended for manual editing.
 version = 3
 
+[[package]]
+name = "boml"
+version = "0.3.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "85fdb93f04c73bff54305fa437ffea5449c41edcaadfe882f35836206b166ac5"
+
 [[package]]
 name = "y"
 version = "0.1.0"
+dependencies = [
+ "boml",
+]
diff --git a/build_system/Cargo.toml b/build_system/Cargo.toml
index f36709ea0360..d2600ed5a031 100644
--- a/build_system/Cargo.toml
+++ b/build_system/Cargo.toml
@@ -3,6 +3,9 @@ name = "y"
 version = "0.1.0"
 edition = "2021"
 
+[dependencies]
+boml = "0.3.1"
+
 [[bin]]
 name = "y"
 path = "src/main.rs"
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 3149560b458a..efae5a46b04f 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -1,5 +1,5 @@
 use crate::config::{Channel, ConfigInfo};
-use crate::utils::{get_gcc_path, run_command, run_command_with_output_and_env, walk_dir};
+use crate::utils::{run_command, run_command_with_output_and_env, walk_dir};
 use std::collections::HashMap;
 use std::ffi::OsStr;
 use std::fs;
@@ -8,17 +8,12 @@ use std::path::Path;
 #[derive(Default)]
 struct BuildArg {
     flags: Vec<String>,
-    gcc_path: String,
     config_info: ConfigInfo,
 }
 
 impl BuildArg {
     fn new() -> Result<Option<Self>, String> {
-        let gcc_path = get_gcc_path()?;
-        let mut build_arg = Self {
-            gcc_path,
-            ..Default::default()
-        };
+        let mut build_arg = Self::default();
         // We skip binary name and the `build` command.
         let mut args = std::env::args().skip(2);
 
@@ -169,7 +164,8 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     fs::create_dir_all(&sysroot_src_path).map_err(|error| {
         format!(
             "Failed to create directory `{}`: {:?}",
-            sysroot_src_path.display(), error
+            sysroot_src_path.display(),
+            error
         )
     })?;
     run_command(
@@ -188,8 +184,14 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
 fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     let mut env = HashMap::new();
 
-    env.insert("LD_LIBRARY_PATH".to_string(), args.gcc_path.clone());
-    env.insert("LIBRARY_PATH".to_string(), args.gcc_path.clone());
+    env.insert(
+        "LD_LIBRARY_PATH".to_string(),
+        args.config_info.gcc_path.clone(),
+    );
+    env.insert(
+        "LIBRARY_PATH".to_string(),
+        args.config_info.gcc_path.clone(),
+    );
 
     let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"rustc"];
     if args.config_info.channel == Channel::Release {
@@ -205,7 +207,7 @@ fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     }
     run_command_with_output_and_env(&command, None, Some(&env))?;
 
-    args.config_info.setup(&mut env, Some(&args.gcc_path))?;
+    args.config_info.setup(&mut env, None)?;
 
     // We voluntarily ignore the error.
     let _ = fs::remove_dir_all("target/out");
@@ -227,6 +229,7 @@ pub fn run() -> Result<(), String> {
         Some(args) => args,
         None => return Ok(()),
     };
+    args.config_info.setup_gcc_path(None)?;
     build_codegen(&mut args)?;
     Ok(())
 }
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 1824bdd292ff..09fa3ee9d3b9 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -1,7 +1,11 @@
-use crate::utils::{get_gcc_path, get_os_name, rustc_version_info, split_args};
+use crate::utils::{get_os_name, rustc_version_info, split_args};
 use std::collections::HashMap;
 use std::env as std_env;
 use std::ffi::OsStr;
+use std::fs;
+use std::path::Path;
+
+use boml::{types::TomlValue, Toml};
 
 #[derive(Default, PartialEq, Eq, Clone, Copy, Debug)]
 pub enum Channel {
@@ -19,6 +23,72 @@ impl Channel {
     }
 }
 
+fn failed_config_parsing(err: &str) -> Result<ConfigFile, String> {
+    Err(format!(
+        "Failed to parse `{}`: {}",
+        ConfigFile::CONFIG_FILE,
+        err
+    ))
+}
+
+#[derive(Default)]
+pub struct ConfigFile {
+    gcc_path: Option<String>,
+    download_gccjit: Option<bool>,
+}
+
+impl ConfigFile {
+    pub const CONFIG_FILE: &'static str = "config.toml";
+
+    pub fn new() -> Result<Self, String> {
+        let content = fs::read_to_string(Self::CONFIG_FILE).map_err(|_| {
+            format!(
+                "Failed to read `{}`. Take a look at `Readme.md` to see how to set up the project",
+                Self::CONFIG_FILE,
+            )
+        })?;
+        let toml = Toml::parse(&content).map_err(|err| {
+            format!(
+                "Error occurred around `{}`: {:?}",
+                &content[err.start..=err.end],
+                err.kind
+            )
+        })?;
+        let mut config = Self::default();
+        for (key, value) in toml.iter() {
+            match (key, value) {
+                ("gcc-path", TomlValue::String(value)) => {
+                    config.gcc_path = Some(value.as_str().to_string())
+                }
+                ("gcc-path", _) => {
+                    return failed_config_parsing("Expected a string for `gcc-path`")
+                }
+                ("download-gccjit", TomlValue::Boolean(value)) => {
+                    config.download_gccjit = Some(*value)
+                }
+                ("download-gccjit", _) => {
+                    return failed_config_parsing("Expected a boolean for `download-gccjit`")
+                }
+                _ => return failed_config_parsing(&format!("Unknown key `{}`", key)),
+            }
+        }
+        if config.gcc_path.is_none() && config.download_gccjit.is_none() {
+            return failed_config_parsing(
+                "At least one of `gcc-path` or `download-gccjit` value must be set",
+            );
+        }
+        if let Some(gcc_path) = config.gcc_path.as_mut() {
+            let path = Path::new(gcc_path);
+            *gcc_path = path
+                .canonicalize()
+                .map_err(|err| format!("Failed to get absolute path of `{}`: {:?}", gcc_path, err))?
+                .display()
+                .to_string();
+        }
+        Ok(config)
+    }
+}
+
 #[derive(Default, Debug)]
 pub struct ConfigInfo {
     pub target: String,
@@ -33,6 +103,7 @@ pub struct ConfigInfo {
     pub sysroot_panic_abort: bool,
     pub cg_backend_path: String,
     pub sysroot_path: String,
+    pub gcc_path: String,
 }
 
 impl ConfigInfo {
@@ -80,18 +151,43 @@ impl ConfigInfo {
         command
     }
 
+    pub fn setup_gcc_path(&mut self, override_gcc_path: Option<&str>) -> Result<(), String> {
+        let ConfigFile { gcc_path, .. } = ConfigFile::new()?;
+
+        self.gcc_path = match override_gcc_path {
+            Some(path) => {
+                if gcc_path.is_some() {
+                    println!("overriding setting from `{}`", ConfigFile::CONFIG_FILE);
+                }
+                path.to_string()
+            }
+            None => {
+                match gcc_path {
+                    Some(path) => path,
+                    // FIXME: Once we support "download", rewrite this.
+                    None => {
+                        return Err(format!(
+                            "missing `gcc-path` value from `{}`",
+                            ConfigFile::CONFIG_FILE
+                        ))
+                    }
+                }
+            }
+        };
+        Ok(())
+    }
+
     pub fn setup(
         &mut self,
         env: &mut HashMap<String, String>,
-        gcc_path: Option<&str>,
+        override_gcc_path: Option<&str>,
     ) -> Result<(), String> {
         env.insert("CARGO_INCREMENTAL".to_string(), "0".to_string());
 
-        let gcc_path = match gcc_path {
-            Some(path) => path.to_string(),
-            None => get_gcc_path()?,
-        };
-        env.insert("GCC_PATH".to_string(), gcc_path.clone());
+        if self.gcc_path.is_empty() || override_gcc_path.is_some() {
+            self.setup_gcc_path(override_gcc_path)?;
+        }
+        env.insert("GCC_PATH".to_string(), self.gcc_path.clone());
 
         if self.cargo_target_dir.is_empty() {
             match env.get("CARGO_TARGET_DIR").filter(|dir| !dir.is_empty()) {
@@ -225,7 +321,9 @@ impl ConfigInfo {
             // line option to change it.
             target = current_dir.join("target/out").display(),
             sysroot = sysroot.display(),
+            gcc_path = self.gcc_path,
         );
+        env.insert("LIBRARY_PATH".to_string(), ld_library_path.clone());
         env.insert("LD_LIBRARY_PATH".to_string(), ld_library_path.clone());
         env.insert("DYLD_LIBRARY_PATH".to_string(), ld_library_path);
 
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 656432292431..1cacd6efc7fe 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1,7 +1,7 @@
 use crate::build;
 use crate::config::{Channel, ConfigInfo};
 use crate::utils::{
-    get_gcc_path, get_toolchain, git_clone, remove_file, run_command, run_command_with_env,
+    get_toolchain, git_clone, remove_file, run_command, run_command_with_env,
     run_command_with_output_and_env, rustc_version_info, split_args, walk_dir,
 };
 
@@ -109,7 +109,7 @@ fn show_usage() {
 struct TestArg {
     no_default_features: bool,
     build_only: bool,
-    gcc_path: String,
+    gcc_path: Option<String>,
     runners: BTreeSet<String>,
     flags: Vec<String>,
     backend: Option<String>,
@@ -181,12 +181,10 @@ impl TestArg {
                 }
             }
 
-            test_arg.gcc_path = if use_system_gcc {
+            if use_system_gcc {
                 println!("Using system GCC");
-                "gcc".to_string()
-            } else {
-                get_gcc_path()?
-            };
+                test_arg.gcc_path = Some("gcc".to_string());
+            }
         }
         match (test_arg.current_part, test_arg.nb_parts) {
             (Some(_), Some(_)) | (None, None) => {}
@@ -488,7 +486,8 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
 }
 
 fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
-    let toolchain = format!("+{channel}-{host}",
+    let toolchain = format!(
+        "+{channel}-{host}",
         channel = get_toolchain()?, // May also include date
         host = args.config_info.host_triple
     );
@@ -527,7 +526,12 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
         }
     })?;
     let rustc = String::from_utf8(
-        run_command_with_env(&[&"rustup", &toolchain, &"which", &"rustc"], rust_dir, Some(env))?.stdout,
+        run_command_with_env(
+            &[&"rustup", &toolchain, &"which", &"rustc"],
+            rust_dir,
+            Some(env),
+        )?
+        .stdout,
     )
     .map_err(|error| format!("Failed to retrieve rustc path: {:?}", error))
     .and_then(|rustc| {
@@ -1162,8 +1166,15 @@ pub fn run() -> Result<(), String> {
     };
     let mut env: HashMap<String, String> = std::env::vars().collect();
 
-    env.insert("LD_LIBRARY_PATH".to_string(), args.gcc_path.clone());
-    env.insert("LIBRARY_PATH".to_string(), args.gcc_path.clone());
+    args.config_info.setup_gcc_path(None)?;
+    env.insert(
+        "LIBRARY_PATH".to_string(),
+        args.config_info.gcc_path.clone(),
+    );
+    env.insert(
+        "LD_LIBRARY_PATH".to_string(),
+        args.config_info.gcc_path.clone(),
+    );
 
     build_if_no_backend(&env, &args)?;
     if args.build_only {
@@ -1171,7 +1182,7 @@ pub fn run() -> Result<(), String> {
         return Ok(());
     }
 
-    args.config_info.setup(&mut env, Some(&args.gcc_path))?;
+    args.config_info.setup(&mut env, args.gcc_path.as_deref())?;
 
     if args.runners.is_empty() {
         run_all(&env, &args)?;
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 85f1e18006ca..b288eff94a5d 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -248,38 +248,6 @@ pub fn get_toolchain() -> Result<String, String> {
     }
 }
 
-pub fn get_gcc_path() -> Result<String, String> {
-    let content = match fs::read_to_string("gcc_path") {
-        Ok(content) => content,
-        Err(_) => {
-            return Err(
-                "Please put the path to your custom build of libgccjit in the file \
-                   `gcc_path`, see Readme.md for details"
-                    .into(),
-            )
-        }
-    };
-    match content
-        .split('\n')
-        .map(|line| line.trim())
-        .filter(|line| !line.is_empty())
-        .next()
-    {
-        Some(gcc_path) => {
-            let path = Path::new(gcc_path);
-            if !path.exists() {
-                Err(format!(
-                    "Path `{}` contained in the `gcc_path` file doesn't exist",
-                    gcc_path,
-                ))
-            } else {
-                Ok(gcc_path.into())
-            }
-        }
-        None => Err("No path found in `gcc_path` file".into()),
-    }
-}
-
 pub struct CloneResult {
     pub ran_clone: bool,
     pub repo_name: String,
diff --git a/config.example.toml b/config.example.toml
new file mode 100644
index 000000000000..dcc414b73100
--- /dev/null
+++ b/config.example.toml
@@ -0,0 +1,2 @@
+gcc-path = "gcc-build/gcc"
+# download-gccjit = true

From 0b2402fdfcf0f126abb3c2f2ce11fd8ac79f5c38 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 9 Feb 2024 16:47:28 +0100
Subject: [PATCH 505/997] Update CI scripts to work with `config.toml`

---
 .github/workflows/ci.yml       |  6 +++---
 .github/workflows/failures.yml | 11 +++++++----
 .github/workflows/gcc12.yml    |  6 +++---
 .github/workflows/m68k.yml     |  6 +++---
 .github/workflows/release.yml  |  6 +++---
 .github/workflows/stdarch.yml  |  6 +++---
 6 files changed, 22 insertions(+), 19 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 426eabdd176b..ba64f40acc4b 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -55,13 +55,13 @@ jobs:
     - name: Setup path to libgccjit
       run: |
           sudo dpkg --force-overwrite -i gcc-13.deb
-          echo /usr/lib/ > gcc_path
+          echo 'gcc-path = "/usr/lib/"' > config.toml
 
     - name: Set env
       run: |
-        echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
 
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index 7aaf47facd87..ae00a257e248 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -52,7 +52,10 @@ jobs:
 
     - name: Setup path to libgccjit
       if: matrix.libgccjit_version.gcc == 'libgccjit12.so'
-      run: echo /usr/lib/gcc/x86_64-linux-gnu/12 > gcc_path
+      run: |
+          echo 'gcc-path = "/usr/lib/gcc/x86_64-linux-gnu/12"' > config.toml
+          echo "LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/12" >> $GITHUB_ENV
+          echo "LD_LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/12" >> $GITHUB_ENV
 
     - name: Download artifact
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
@@ -62,12 +65,12 @@ jobs:
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       run: |
           sudo dpkg --force-overwrite -i gcc-13.deb
-          echo /usr/lib/ > gcc_path
+          echo 'gcc-path = "/usr/lib"' > config.toml
+          echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+          echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
 
     - name: Set env
       run: |
-        echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
 
     #- name: Cache rust repository
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index 8d4f88ea7b1a..f7bb15604923 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -47,13 +47,13 @@ jobs:
       run: sudo apt-get install ninja-build ripgrep llvm-14-tools libgccjit-12-dev
 
     - name: Setup path to libgccjit
-      run: echo /usr/lib/gcc/x86_64-linux-gnu/12 > gcc_path
+      run: echo 'gcc-path = "/usr/lib/gcc/x86_64-linux-gnu/12"' > config.toml
 
     - name: Set env
       run: |
-        echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+        echo "LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/12" >> $GITHUB_ENV
+        echo "LD_LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/12" >> $GITHUB_ENV
 
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index b0866bafb8e3..2428125483bd 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -65,13 +65,13 @@ jobs:
     - name: Setup path to libgccjit
       run: |
           sudo dpkg -i gcc-m68k-13.deb
-          echo /usr/lib/ > gcc_path
+          echo 'gcc-path = "/usr/lib/"' > config.toml
 
     - name: Set env
       run: |
-        echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
 
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 7628fd655716..729a76e80bf9 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -42,13 +42,13 @@ jobs:
     - name: Setup path to libgccjit
       run: |
           sudo dpkg --force-overwrite -i gcc-13.deb
-          echo /usr/lib/ > gcc_path
+          echo 'gcc-path = "/usr/lib/"' > config.toml
 
     - name: Set env
       run: |
-        echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
 
     - name: Build
       run: |
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index a5c3a5456bd7..65687756cd4e 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -56,13 +56,13 @@ jobs:
     - name: Setup path to libgccjit
       run: |
           sudo dpkg --force-overwrite -i gcc-13.deb
-          echo /usr/lib/ > gcc_path
+          echo 'gcc-path = "/usr/lib/"' > config.toml
 
     - name: Set env
       run: |
-        echo "LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=$(cat gcc_path)" >> $GITHUB_ENV
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
 
     - name: Build
       run: |

From 79241b8a4e511a4e59761477c0bdffea24bd7201 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 9 Feb 2024 17:00:37 +0100
Subject: [PATCH 506/997] Update tests to use `config.toml` instead

---
 Cargo.lock                 |  7 +++++++
 Cargo.toml                 |  1 +
 tests/lang_tests_common.rs | 13 +++++++++++--
 3 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 26dc7c535f85..a19de10d0d29 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -23,6 +23,12 @@ version = "2.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "b4682ae6287fcf752ecaabbfcc7b6f9b72aa33933dc23a554d853aea8eea8635"
 
+[[package]]
+name = "boml"
+version = "0.3.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "85fdb93f04c73bff54305fa437ffea5449c41edcaadfe882f35836206b166ac5"
+
 [[package]]
 name = "cc"
 version = "1.0.79"
@@ -185,6 +191,7 @@ checksum = "436b050e76ed2903236f032a59761c1eb99e1b0aead2c257922771dab1fc8c78"
 name = "rustc_codegen_gcc"
 version = "0.1.0"
 dependencies = [
+ "boml",
  "gccjit",
  "lang_tester",
  "object",
diff --git a/Cargo.toml b/Cargo.toml
index b0b3aeecdbdf..a280ac73de09 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -37,6 +37,7 @@ tempfile = "3.7.1"
 [dev-dependencies]
 lang_tester = "0.3.9"
 tempfile = "3.1.0"
+boml = "0.3.1"
 
 [profile.dev]
 # By compiling dependencies with optimizations, performing tests gets much faster.
diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index af0133aad461..029a3b98ff23 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -7,6 +7,7 @@ use std::{
 
 use lang_tester::LangTester;
 use tempfile::TempDir;
+use boml::Toml;
 
 /// Controls the compile options (e.g., optimization level) used to compile
 /// test code.
@@ -20,8 +21,16 @@ pub fn main_inner(profile: Profile) {
     let tempdir = TempDir::new().expect("temp dir");
     let current_dir = current_dir().expect("current dir");
     let current_dir = current_dir.to_str().expect("current dir").to_string();
-    let gcc_path = include_str!("../gcc_path");
-    let gcc_path = gcc_path.trim();
+    let gcc_path = Toml::parse(include_str!("../config.toml"))
+        .expect("Failed to parse `config.toml`")
+        .get_string("gcc-path")
+        .expect("Missing `gcc-path` key in `config.toml`")
+        .to_string();
+    let gcc_path = Path::new(&gcc_path)
+        .canonicalize()
+        .expect("failed to get absolute path of `gcc-path`")
+        .display()
+        .to_string();
     env::set_var("LD_LIBRARY_PATH", gcc_path);
 
     fn rust_filter(filename: &Path) -> bool {

From de9d1b63b4b1bde72baee556c833fb9fe73e013b Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 9 Feb 2024 17:37:56 +0100
Subject: [PATCH 507/997] Add `--config-file` option to override default
 location of `config.toml`

---
 build_system/src/config.rs | 48 ++++++++++++++++++++++++--------------
 1 file changed, 30 insertions(+), 18 deletions(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 09fa3ee9d3b9..5ba6233617ec 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -23,12 +23,8 @@ impl Channel {
     }
 }
 
-fn failed_config_parsing(err: &str) -> Result<ConfigFile, String> {
-    Err(format!(
-        "Failed to parse `{}`: {}",
-        ConfigFile::CONFIG_FILE,
-        err
-    ))
+fn failed_config_parsing(config_file: &str, err: &str) -> Result<ConfigFile, String> {
+    Err(format!("Failed to parse `{}`: {}", config_file, err))
 }
 
 #[derive(Default)]
@@ -38,13 +34,12 @@ pub struct ConfigFile {
 }
 
 impl ConfigFile {
-    pub const CONFIG_FILE: &'static str = "config.toml";
-
-    pub fn new() -> Result<Self, String> {
-        let content = fs::read_to_string(Self::CONFIG_FILE).map_err(|_| {
+    pub fn new(config_file: Option<&str>) -> Result<Self, String> {
+        let config_file = config_file.unwrap_or("config.toml");
+        let content = fs::read_to_string(config_file).map_err(|_| {
             format!(
                 "Failed to read `{}`. Take a look at `Readme.md` to see how to set up the project",
-                Self::CONFIG_FILE,
+                config_file,
             )
         })?;
         let toml = Toml::parse(&content).map_err(|err| {
@@ -61,19 +56,23 @@ impl ConfigFile {
                     config.gcc_path = Some(value.as_str().to_string())
                 }
                 ("gcc-path", _) => {
-                    return failed_config_parsing("Expected a string for `gcc-path`")
+                    return failed_config_parsing(config_file, "Expected a string for `gcc-path`")
                 }
                 ("download-gccjit", TomlValue::Boolean(value)) => {
                     config.download_gccjit = Some(*value)
                 }
                 ("download-gccjit", _) => {
-                    return failed_config_parsing("Expected a boolean for `download-gccjit`")
+                    return failed_config_parsing(
+                        config_file,
+                        "Expected a boolean for `download-gccjit`",
+                    )
                 }
-                _ => return failed_config_parsing(&format!("Unknown key `{}`", key)),
+                _ => return failed_config_parsing(config_file, &format!("Unknown key `{}`", key)),
             }
         }
         if config.gcc_path.is_none() && config.download_gccjit.is_none() {
             return failed_config_parsing(
+                config_file,
                 "At least one of `gcc-path` or `download-gccjit` value must be set",
             );
         }
@@ -104,6 +103,7 @@ pub struct ConfigInfo {
     pub cg_backend_path: String,
     pub sysroot_path: String,
     pub gcc_path: String,
+    config_file: Option<String>,
 }
 
 impl ConfigInfo {
@@ -135,6 +135,14 @@ impl ConfigInfo {
                 }
                 _ => return Err("Expected a value after `--out-dir`, found nothing".to_string()),
             },
+            "--config-file" => match args.next() {
+                Some(arg) if !arg.is_empty() => {
+                    self.config_file = Some(arg.to_string());
+                }
+                _ => {
+                    return Err("Expected a value after `--config-file`, found nothing".to_string())
+                }
+            },
             "--release-sysroot" => self.sysroot_release_channel = true,
             "--release" => self.channel = Channel::Release,
             "--sysroot-panic-abort" => self.sysroot_panic_abort = true,
@@ -152,12 +160,15 @@ impl ConfigInfo {
     }
 
     pub fn setup_gcc_path(&mut self, override_gcc_path: Option<&str>) -> Result<(), String> {
-        let ConfigFile { gcc_path, .. } = ConfigFile::new()?;
+        let ConfigFile { gcc_path, .. } = ConfigFile::new(self.config_file.as_deref())?;
 
         self.gcc_path = match override_gcc_path {
             Some(path) => {
                 if gcc_path.is_some() {
-                    println!("overriding setting from `{}`", ConfigFile::CONFIG_FILE);
+                    println!(
+                        "overriding setting from `{}`",
+                        self.config_file.as_deref().unwrap_or("config.toml")
+                    );
                 }
                 path.to_string()
             }
@@ -168,7 +179,7 @@ impl ConfigInfo {
                     None => {
                         return Err(format!(
                             "missing `gcc-path` value from `{}`",
-                            ConfigFile::CONFIG_FILE
+                            self.config_file.as_deref().unwrap_or("config.toml"),
                         ))
                     }
                 }
@@ -363,7 +374,8 @@ impl ConfigInfo {
     --out-dir              : Location where the files will be generated
     --release              : Build in release mode
     --release-sysroot      : Build sysroot in release mode
-    --sysroot-panic-abort  : Build the sysroot without unwinding support."
+    --sysroot-panic-abort  : Build the sysroot without unwinding support
+    --config-file          : Location of the config file to be used"
         );
     }
 }

From 588db24344dc2b626bb050067e9e6cda2de3bc59 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 12 Feb 2024 14:41:18 +0100
Subject: [PATCH 508/997] Correctly handle `--use-system-gcc`

---
 build_system/src/build.rs  |  4 ++--
 build_system/src/cargo.rs  |  2 +-
 build_system/src/config.rs | 35 ++++++++++-------------------
 build_system/src/test.rs   | 45 +++++++++++++++++++-------------------
 build_system/src/utils.rs  |  6 ++++-
 5 files changed, 42 insertions(+), 50 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index efae5a46b04f..308ad3465494 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -207,7 +207,7 @@ fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     }
     run_command_with_output_and_env(&command, None, Some(&env))?;
 
-    args.config_info.setup(&mut env, None)?;
+    args.config_info.setup(&mut env, false)?;
 
     // We voluntarily ignore the error.
     let _ = fs::remove_dir_all("target/out");
@@ -229,7 +229,7 @@ pub fn run() -> Result<(), String> {
         Some(args) => args,
         None => return Ok(()),
     };
-    args.config_info.setup_gcc_path(None)?;
+    args.config_info.setup_gcc_path()?;
     build_codegen(&mut args)?;
     Ok(())
 }
diff --git a/build_system/src/cargo.rs b/build_system/src/cargo.rs
index 67b301d9aa64..1cfcdba6b1cd 100644
--- a/build_system/src/cargo.rs
+++ b/build_system/src/cargo.rs
@@ -77,7 +77,7 @@ pub fn run() -> Result<(), String> {
     })?;
 
     let mut env: HashMap<String, String> = std::env::vars().collect();
-    ConfigInfo::default().setup(&mut env, None)?;
+    ConfigInfo::default().setup(&mut env, false)?;
     let toolchain = get_toolchain()?;
 
     let toolchain_version = rustc_toolchain_version_info(&toolchain)?;
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 5ba6233617ec..49782fc64ef7 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -159,30 +159,17 @@ impl ConfigInfo {
         command
     }
 
-    pub fn setup_gcc_path(&mut self, override_gcc_path: Option<&str>) -> Result<(), String> {
+    pub fn setup_gcc_path(&mut self) -> Result<(), String> {
         let ConfigFile { gcc_path, .. } = ConfigFile::new(self.config_file.as_deref())?;
 
-        self.gcc_path = match override_gcc_path {
-            Some(path) => {
-                if gcc_path.is_some() {
-                    println!(
-                        "overriding setting from `{}`",
-                        self.config_file.as_deref().unwrap_or("config.toml")
-                    );
-                }
-                path.to_string()
-            }
+        self.gcc_path = match gcc_path {
+            Some(path) => path,
+            // FIXME: Once we support "download", rewrite this.
             None => {
-                match gcc_path {
-                    Some(path) => path,
-                    // FIXME: Once we support "download", rewrite this.
-                    None => {
-                        return Err(format!(
-                            "missing `gcc-path` value from `{}`",
-                            self.config_file.as_deref().unwrap_or("config.toml"),
-                        ))
-                    }
-                }
+                return Err(format!(
+                    "missing `gcc-path` value from `{}`",
+                    self.config_file.as_deref().unwrap_or("config.toml"),
+                ))
             }
         };
         Ok(())
@@ -191,12 +178,12 @@ impl ConfigInfo {
     pub fn setup(
         &mut self,
         env: &mut HashMap<String, String>,
-        override_gcc_path: Option<&str>,
+        use_system_gcc: bool,
     ) -> Result<(), String> {
         env.insert("CARGO_INCREMENTAL".to_string(), "0".to_string());
 
-        if self.gcc_path.is_empty() || override_gcc_path.is_some() {
-            self.setup_gcc_path(override_gcc_path)?;
+        if self.gcc_path.is_empty() && !use_system_gcc {
+            self.setup_gcc_path()?;
         }
         env.insert("GCC_PATH".to_string(), self.gcc_path.clone());
 
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 1cacd6efc7fe..806e18431c46 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -31,7 +31,10 @@ fn get_runners() -> Runners {
         "--test-failing-rustc",
         ("Run failing rustc tests", test_failing_rustc),
     );
-    runners.insert("--projects", ("Run the tests of popular crates", test_projects));
+    runners.insert(
+        "--projects",
+        ("Run the tests of popular crates", test_projects),
+    );
     runners.insert("--test-libcore", ("Run libcore tests", test_libcore));
     runners.insert("--clean", ("Empty cargo target directory", clean));
     runners.insert("--build-sysroot", ("Build sysroot", build_sysroot));
@@ -109,7 +112,7 @@ fn show_usage() {
 struct TestArg {
     no_default_features: bool,
     build_only: bool,
-    gcc_path: Option<String>,
+    use_system_gcc: bool,
     runners: BTreeSet<String>,
     flags: Vec<String>,
     backend: Option<String>,
@@ -121,7 +124,6 @@ struct TestArg {
 
 impl TestArg {
     fn new() -> Result<Option<Self>, String> {
-        let mut use_system_gcc = false;
         let mut test_arg = Self::default();
 
         // We skip binary name and the `test` command.
@@ -147,7 +149,10 @@ impl TestArg {
                         return Err("Expected an argument after `--features`, found nothing".into())
                     }
                 },
-                "--use-system-gcc" => use_system_gcc = true,
+                "--use-system-gcc" => {
+                    println!("Using system GCC");
+                    test_arg.use_system_gcc = true;
+                }
                 "--build-only" => test_arg.build_only = true,
                 "--use-backend" => match args.next() {
                     Some(backend) if !backend.is_empty() => test_arg.backend = Some(backend),
@@ -180,11 +185,6 @@ impl TestArg {
                     }
                 }
             }
-
-            if use_system_gcc {
-                println!("Using system GCC");
-                test_arg.gcc_path = Some("gcc".to_string());
-            }
         }
         match (test_arg.current_part, test_arg.nb_parts) {
             (Some(_), Some(_)) | (None, None) => {}
@@ -703,7 +703,7 @@ fn test_projects(env: &Env, args: &TestArg) -> Result<(), String> {
         //"https://github.com/rust-lang/cargo", // TODO: very slow, only run on master?
     ];
 
-    let run_tests = |projects_path, iter: &mut dyn Iterator<Item=&&str>| -> Result<(), String> {
+    let run_tests = |projects_path, iter: &mut dyn Iterator<Item = &&str>| -> Result<(), String> {
         for project in iter {
             let clone_result = git_clone(project, Some(projects_path), true)?;
             let repo_path = Path::new(&clone_result.repo_dir);
@@ -727,8 +727,7 @@ fn test_projects(env: &Env, args: &TestArg) -> Result<(), String> {
         let start = current_part * count;
         // We remove the projects we don't want to test.
         run_tests(projects_path, &mut projects.iter().skip(start).take(count))?;
-    }
-    else {
+    } else {
         run_tests(projects_path, &mut projects.iter())?;
     }
 
@@ -1166,15 +1165,17 @@ pub fn run() -> Result<(), String> {
     };
     let mut env: HashMap<String, String> = std::env::vars().collect();
 
-    args.config_info.setup_gcc_path(None)?;
-    env.insert(
-        "LIBRARY_PATH".to_string(),
-        args.config_info.gcc_path.clone(),
-    );
-    env.insert(
-        "LD_LIBRARY_PATH".to_string(),
-        args.config_info.gcc_path.clone(),
-    );
+    if !args.use_system_gcc {
+        args.config_info.setup_gcc_path()?;
+        env.insert(
+            "LIBRARY_PATH".to_string(),
+            args.config_info.gcc_path.clone(),
+        );
+        env.insert(
+            "LD_LIBRARY_PATH".to_string(),
+            args.config_info.gcc_path.clone(),
+        );
+    }
 
     build_if_no_backend(&env, &args)?;
     if args.build_only {
@@ -1182,7 +1183,7 @@ pub fn run() -> Result<(), String> {
         return Ok(());
     }
 
-    args.config_info.setup(&mut env, args.gcc_path.as_deref())?;
+    args.config_info.setup(&mut env, args.use_system_gcc)?;
 
     if args.runners.is_empty() {
         run_all(&env, &args)?;
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index b288eff94a5d..046008ae1a24 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -254,7 +254,11 @@ pub struct CloneResult {
     pub repo_dir: String,
 }
 
-pub fn git_clone(to_clone: &str, dest: Option<&Path>, shallow_clone: bool) -> Result<CloneResult, String> {
+pub fn git_clone(
+    to_clone: &str,
+    dest: Option<&Path>,
+    shallow_clone: bool,
+) -> Result<CloneResult, String> {
     let repo_name = to_clone.split('/').last().unwrap();
     let repo_name = match repo_name.strip_suffix(".git") {
         Some(n) => n.to_string(),

From 5d5137cebce6c3906238fd82d728017cac89a5c4 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 12 Feb 2024 21:20:12 -0400
Subject: [PATCH 509/997] Rework the download function to only contain the
 platform-specific code

---
 build_system/src/config.rs | 156 ++++++++++++++++++-------------------
 1 file changed, 78 insertions(+), 78 deletions(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 475f9b300f74..c9bfcb9e6ba4 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -190,83 +190,6 @@ impl ConfigInfo {
         command
     }
 
-    fn download_gccjit(
-        &self,
-        output_dir: &Path,
-        libgccjit_so_name: &str,
-        commit: &str,
-    ) -> Result<(), String> {
-        // Download time!
-        let tempfile_name = format!("{}.download", libgccjit_so_name);
-        let tempfile = output_dir.join(&tempfile_name);
-        let is_in_ci = std::env::var("GITHUB_ACTIONS").is_ok();
-
-        let url = format!(
-            "https://github.com/antoyo/gcc/releases/download/master-{}/libgccjit.so",
-            commit,
-        );
-
-        println!("Downloading `{}`...", url);
-        // Try curl. If that fails and we are on windows, fallback to PowerShell.
-        let mut ret = run_command_with_output(
-            &[
-                &"curl",
-                &"--speed-time",
-                &"30",
-                &"--speed-limit",
-                &"10", // timeout if speed is < 10 bytes/sec for > 30 seconds
-                &"--connect-timeout",
-                &"30", // timeout if cannot connect within 30 seconds
-                &"-o",
-                &tempfile_name,
-                &"--retry",
-                &"3",
-                &"-SRfL",
-                if is_in_ci { &"-s" } else { &"--progress-bar" },
-                &url.as_str(),
-            ],
-            Some(&output_dir),
-        );
-        if ret.is_err() && cfg!(windows) {
-            eprintln!("Fallback to PowerShell");
-            ret = run_command_with_output(
-                &[
-                    &"PowerShell.exe",
-                    &"/nologo",
-                    &"-Command",
-                    &"[Net.ServicePointManager]::SecurityProtocol = [Net.SecurityProtocolType]::Tls12;",
-                    &format!(
-                        "(New-Object System.Net.WebClient).DownloadFile('{}', '{}')",
-                        url,
-                        tempfile_name,
-                    ).as_str(),
-                ],
-                Some(&output_dir),
-            );
-        }
-        ret?;
-
-        let libgccjit_so = output_dir.join(libgccjit_so_name);
-        // If we reach this point, it means the file was correctly downloaded, so let's
-        // rename it!
-        std::fs::rename(&tempfile, &libgccjit_so).map_err(|err| {
-            format!(
-                "Failed to rename `{}` into `{}`: {:?}",
-                tempfile.display(),
-                libgccjit_so.display(),
-                err,
-            )
-        })?;
-
-        println!("Downloaded libgccjit.so version {} successfully!", commit);
-        // We need to create a link named `libgccjit.so.0` because that's what the linker is
-        // looking for.
-        create_symlink(
-            &libgccjit_so,
-            output_dir.join(&format!("{}.0", libgccjit_so_name)),
-        )
-    }
-
     fn download_gccjit_if_needed(&mut self) -> Result<(), String> {
         let output_dir = Path::new(
             std::env::var("CARGO_TARGET_DIR")
@@ -313,7 +236,38 @@ impl ConfigInfo {
         let libgccjit_so_name = "libgccjit.so";
         let libgccjit_so = output_dir.join(libgccjit_so_name);
         if !libgccjit_so.is_file() && !self.no_download {
-            self.download_gccjit(&output_dir, libgccjit_so_name, commit)?;
+            // Download time!
+            let tempfile_name = format!("{}.download", libgccjit_so_name);
+            let tempfile = output_dir.join(&tempfile_name);
+            let is_in_ci = std::env::var("GITHUB_ACTIONS").is_ok();
+
+            let url = format!(
+                "https://github.com/antoyo/gcc/releases/download/master-{}/libgccjit.so",
+                commit,
+            );
+
+            println!("Downloading `{}`...", url);
+            download_gccjit(url, &output_dir, tempfile_name, !is_in_ci)?;
+
+            let libgccjit_so = output_dir.join(libgccjit_so_name);
+            // If we reach this point, it means the file was correctly downloaded, so let's
+            // rename it!
+            std::fs::rename(&tempfile, &libgccjit_so).map_err(|err| {
+                format!(
+                    "Failed to rename `{}` into `{}`: {:?}",
+                    tempfile.display(),
+                    libgccjit_so.display(),
+                    err,
+                )
+            })?;
+
+            println!("Downloaded libgccjit.so version {} successfully!", commit);
+            // We need to create a link named `libgccjit.so.0` because that's what the linker is
+            // looking for.
+            create_symlink(
+                &libgccjit_so,
+                output_dir.join(&format!("{}.0", libgccjit_so_name)),
+            )?;
         }
 
         self.gcc_path = output_dir.display().to_string();
@@ -547,3 +501,49 @@ impl ConfigInfo {
         );
     }
 }
+
+fn download_gccjit(
+    url: String,
+    output_dir: &Path,
+    tempfile_name: String,
+    with_progress_bar: bool,
+) -> Result<(), String> {
+    // Try curl. If that fails and we are on windows, fallback to PowerShell.
+    let mut ret = run_command_with_output(
+        &[
+            &"curl",
+            &"--speed-time",
+            &"30",
+            &"--speed-limit",
+            &"10", // timeout if speed is < 10 bytes/sec for > 30 seconds
+            &"--connect-timeout",
+            &"30", // timeout if cannot connect within 30 seconds
+            &"-o",
+            &tempfile_name,
+            &"--retry",
+            &"3",
+            &"-SRfL",
+            if with_progress_bar { &"--progress-bar" } else { &"-s" },
+            &url.as_str(),
+        ],
+        Some(&output_dir),
+    );
+    if ret.is_err() && cfg!(windows) {
+        eprintln!("Fallback to PowerShell");
+        ret = run_command_with_output(
+            &[
+                &"PowerShell.exe",
+                &"/nologo",
+                &"-Command",
+                &"[Net.ServicePointManager]::SecurityProtocol = [Net.SecurityProtocolType]::Tls12;",
+                &format!(
+                    "(New-Object System.Net.WebClient).DownloadFile('{}', '{}')",
+                    url,
+                    tempfile_name,
+                ).as_str(),
+            ],
+            Some(&output_dir),
+        );
+    }
+    ret
+}

From eee04a48d9b0ba2ca7e18c6465c51a63feed8e08 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 12 Feb 2024 18:07:05 +0100
Subject: [PATCH 510/997] Add support for "download"

---
 build_system/src/config.rs | 203 ++++++++++++++++++++++++++++++++-----
 libgccjit.version          |   1 +
 2 files changed, 179 insertions(+), 25 deletions(-)
 create mode 100644 libgccjit.version

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 49782fc64ef7..0201e3509dcd 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -1,9 +1,9 @@
-use crate::utils::{get_os_name, rustc_version_info, split_args};
+use crate::utils::{get_os_name, run_command_with_output, rustc_version_info, split_args};
 use std::collections::HashMap;
 use std::env as std_env;
 use std::ffi::OsStr;
 use std::fs;
-use std::path::Path;
+use std::path::{Path, PathBuf};
 
 use boml::{types::TomlValue, Toml};
 
@@ -23,8 +23,12 @@ impl Channel {
     }
 }
 
-fn failed_config_parsing(config_file: &str, err: &str) -> Result<ConfigFile, String> {
-    Err(format!("Failed to parse `{}`: {}", config_file, err))
+fn failed_config_parsing(config_file: &Path, err: &str) -> Result<ConfigFile, String> {
+    Err(format!(
+        "Failed to parse `{}`: {}",
+        config_file.display(),
+        err
+    ))
 }
 
 #[derive(Default)]
@@ -34,12 +38,11 @@ pub struct ConfigFile {
 }
 
 impl ConfigFile {
-    pub fn new(config_file: Option<&str>) -> Result<Self, String> {
-        let config_file = config_file.unwrap_or("config.toml");
+    pub fn new(config_file: &Path) -> Result<Self, String> {
         let content = fs::read_to_string(config_file).map_err(|_| {
             format!(
                 "Failed to read `{}`. Take a look at `Readme.md` to see how to set up the project",
-                config_file,
+                config_file.display(),
             )
         })?;
         let toml = Toml::parse(&content).map_err(|err| {
@@ -70,19 +73,30 @@ impl ConfigFile {
                 _ => return failed_config_parsing(config_file, &format!("Unknown key `{}`", key)),
             }
         }
-        if config.gcc_path.is_none() && config.download_gccjit.is_none() {
-            return failed_config_parsing(
-                config_file,
-                "At least one of `gcc-path` or `download-gccjit` value must be set",
-            );
-        }
-        if let Some(gcc_path) = config.gcc_path.as_mut() {
-            let path = Path::new(gcc_path);
-            *gcc_path = path
-                .canonicalize()
-                .map_err(|err| format!("Failed to get absolute path of `{}`: {:?}", gcc_path, err))?
-                .display()
-                .to_string();
+        match (config.gcc_path.as_mut(), config.download_gccjit) {
+            (None, None | Some(false)) => {
+                return failed_config_parsing(
+                    config_file,
+                    "At least one of `gcc-path` or `download-gccjit` value must be set",
+                )
+            }
+            (Some(_), Some(true)) => {
+                println!(
+                    "WARNING: both `gcc-path` and `download-gccjit` arguments are used, \
+                    ignoring `gcc-path`"
+                );
+            }
+            (Some(gcc_path), _) => {
+                let path = Path::new(gcc_path);
+                *gcc_path = path
+                    .canonicalize()
+                    .map_err(|err| {
+                        format!("Failed to get absolute path of `{}`: {:?}", gcc_path, err)
+                    })?
+                    .display()
+                    .to_string();
+            }
+            _ => {}
         }
         Ok(config)
     }
@@ -104,6 +118,7 @@ pub struct ConfigInfo {
     pub sysroot_path: String,
     pub gcc_path: String,
     config_file: Option<String>,
+    cg_gcc_path: Option<PathBuf>,
 }
 
 impl ConfigInfo {
@@ -146,6 +161,14 @@ impl ConfigInfo {
             "--release-sysroot" => self.sysroot_release_channel = true,
             "--release" => self.channel = Channel::Release,
             "--sysroot-panic-abort" => self.sysroot_panic_abort = true,
+            "--cg_gcc-path" => match args.next() {
+                Some(arg) if !arg.is_empty() => {
+                    self.cg_gcc_path = Some(arg.into());
+                }
+                _ => {
+                    return Err("Expected a value after `--cg_gcc-path`, found nothing".to_string())
+                }
+            },
             _ => return Ok(false),
         }
         Ok(true)
@@ -159,16 +182,144 @@ impl ConfigInfo {
         command
     }
 
-    pub fn setup_gcc_path(&mut self) -> Result<(), String> {
-        let ConfigFile { gcc_path, .. } = ConfigFile::new(self.config_file.as_deref())?;
+    fn download_gccjit_if_needed(&mut self) -> Result<(), String> {
+        let output_dir = Path::new(
+            std::env::var("CARGO_TARGET_DIR")
+                .as_deref()
+                .unwrap_or("target"),
+        )
+        .join("libgccjit");
 
+        let commit_hash_file = self.compute_path("libgccjit.version");
+        let content = fs::read_to_string(&commit_hash_file).map_err(|_| {
+            format!(
+                "Failed to read `{}`. Take a look at `Readme.md` to see how to set up the project",
+                commit_hash_file.display(),
+            )
+        })?;
+        let commit = content.trim();
+        if commit.contains('/') || commit.contains('\\') {
+            return Err(format!(
+                "{}: invalid commit hash `{}`",
+                commit_hash_file.display(),
+                commit
+            ));
+        }
+        let output_dir = output_dir.join(commit);
+        if !output_dir.is_dir() {
+            std::fs::create_dir_all(&output_dir).map_err(|err| {
+                format!(
+                    "failed to create folder `{}`: {:?}",
+                    output_dir.display(),
+                    err,
+                )
+            })?;
+        }
+        let libgccjit_so = output_dir.join("libgccjit.so");
+        if !libgccjit_so.is_file() {
+            // Download time!
+            let tempfile_name = "libgccjit.so.download";
+            let tempfile = output_dir.join(tempfile_name);
+            let is_in_ci = std::env::var("GITHUB_ACTIONS").is_ok();
+
+            let url = format!(
+                "https://github.com/antoyo/gcc/releases/download/master-{}/libgccjit.so",
+                commit,
+            );
+
+            println!("Downloading `{}`...", url);
+            // Try curl. If that fails and we are on windows, fallback to PowerShell.
+            let mut ret = run_command_with_output(
+                &[
+                    &"curl",
+                    &"--speed-time",
+                    &"30",
+                    &"--speed-limit",
+                    &"10", // timeout if speed is < 10 bytes/sec for > 30 seconds
+                    &"--connect-timeout",
+                    &"30", // timeout if cannot connect within 30 seconds
+                    &"-o",
+                    &tempfile_name,
+                    &"--retry",
+                    &"3",
+                    &"-SRfL",
+                    if is_in_ci { &"-s" } else { &"--progress-bar" },
+                    &url.as_str(),
+                ],
+                Some(&output_dir),
+            );
+            if ret.is_err() && cfg!(windows) {
+                eprintln!("Fallback to PowerShell");
+                ret = run_command_with_output(
+                    &[
+                        &"PowerShell.exe",
+                        &"/nologo",
+                        &"-Command",
+                        &"[Net.ServicePointManager]::SecurityProtocol = [Net.SecurityProtocolType]::Tls12;",
+                        &format!(
+                            "(New-Object System.Net.WebClient).DownloadFile('{}', '{}')",
+                            url,
+                            tempfile_name,
+                        ).as_str(),
+                    ],
+                    Some(&output_dir),
+                );
+            }
+            ret?;
+
+            // If we reach this point, it means the file was correctly downloaded, so let's
+            // rename it!
+            std::fs::rename(&tempfile, &libgccjit_so).map_err(|err| {
+                format!(
+                    "Failed to rename `{}` into `{}`: {:?}",
+                    tempfile.display(),
+                    libgccjit_so.display(),
+                    err,
+                )
+            })?;
+
+            println!("Downloaded libgccjit.so version {} successfully!", commit);
+        }
+
+        self.gcc_path = output_dir
+            .canonicalize()
+            .map_err(|err| {
+                format!(
+                    "Failed to get absolute path of `{}`: {:?}",
+                    output_dir.display(),
+                    err
+                )
+            })?
+            .display()
+            .to_string();
+        println!("Using `{}` as path for libgccjit", self.gcc_path);
+        Ok(())
+    }
+
+    pub fn compute_path<P: AsRef<Path>>(&self, other: P) -> PathBuf {
+        match self.cg_gcc_path {
+            Some(ref path) => path.join(other),
+            None => PathBuf::new().join(other),
+        }
+    }
+
+    pub fn setup_gcc_path(&mut self) -> Result<(), String> {
+        let config_file = self.compute_path(self.config_file.as_deref().unwrap_or("config.toml"));
+        let ConfigFile {
+            gcc_path,
+            download_gccjit,
+        } = ConfigFile::new(&config_file)?;
+
+        if let Some(true) = download_gccjit {
+            self.download_gccjit_if_needed()?;
+            return Ok(());
+        }
         self.gcc_path = match gcc_path {
             Some(path) => path,
-            // FIXME: Once we support "download", rewrite this.
             None => {
                 return Err(format!(
                     "missing `gcc-path` value from `{}`",
-                    self.config_file.as_deref().unwrap_or("config.toml"),
+                    config_file.display(),
                 ))
             }
         };
@@ -362,7 +513,9 @@ impl ConfigInfo {
     --release              : Build in release mode
     --release-sysroot      : Build sysroot in release mode
     --sysroot-panic-abort  : Build the sysroot without unwinding support
-    --config-file          : Location of the config file to be used"
+    --config-file          : Location of the config file to be used
+    --cg_gcc-path          : Location of the rustc_codegen_gcc root folder (used
+                             for accessing any file from the project)"
         );
     }
 }
diff --git a/libgccjit.version b/libgccjit.version
new file mode 100644
index 000000000000..3fc84f4ddd4e
--- /dev/null
+++ b/libgccjit.version
@@ -0,0 +1 @@
+2fc8940e1

From 0a4b0af141add015d1388c6b457530fcdd3f0316 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 12 Feb 2024 20:09:54 +0100
Subject: [PATCH 511/997] Generate symbolic link to libgccjit.so as well

---
 build_system/src/config.rs | 17 +++++++++++++++--
 build_system/src/utils.rs  | 16 ++++++++++++++++
 2 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 0201e3509dcd..a206bab14a9a 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -1,4 +1,6 @@
-use crate::utils::{get_os_name, run_command_with_output, rustc_version_info, split_args};
+use crate::utils::{
+    create_symlink, get_os_name, run_command_with_output, rustc_version_info, split_args,
+};
 use std::collections::HashMap;
 use std::env as std_env;
 use std::ffi::OsStr;
@@ -215,7 +217,8 @@ impl ConfigInfo {
                 )
             })?;
         }
-        let libgccjit_so = output_dir.join("libgccjit.so");
+        let libgccjit_so_name = "libgccjit.so";
+        let libgccjit_so = output_dir.join(libgccjit_so_name);
         if !libgccjit_so.is_file() {
             // Download time!
             let tempfile_name = "libgccjit.so.download";
@@ -279,6 +282,16 @@ impl ConfigInfo {
             })?;
 
             println!("Downloaded libgccjit.so version {} successfully!", commit);
+            create_symlink(
+                &libgccjit_so.canonicalize().map_err(|err| {
+                    format!(
+                        "Failed to get absolute path of `{}`: {:?}",
+                        libgccjit_so.display(),
+                        err,
+                    )
+                })?,
+                output_dir.join(&format!("{}.0", libgccjit_so_name)),
+            )?;
         }
 
         self.gcc_path = output_dir
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 046008ae1a24..33dcd9ef7005 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -374,6 +374,22 @@ pub fn remove_file<P: AsRef<Path> + ?Sized>(file_path: &P) -> Result<(), String>
     })
 }
 
+pub fn create_symlink<P: AsRef<Path>, Q: AsRef<Path>>(original: P, link: Q) -> Result<(), String> {
+    #[cfg(windows)]
+    let symlink = std::os::windows::fs::symlink_file;
+    #[cfg(not(windows))]
+    let symlink = std::os::unix::fs::symlink;
+
+    symlink(&original, &link).map_err(|err| {
+        format!(
+            "failed to create a symlink `{}` to `{}`: {:?}",
+            original.as_ref().display(),
+            link.as_ref().display(),
+            err,
+        )
+    })
+}
+
 #[cfg(test)]
 mod tests {
     use super::*;

From 5c6cdf5ab6399604695c94031e32087cfe3367ae Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 12 Feb 2024 20:55:14 +0100
Subject: [PATCH 512/997] Add `info` command to help get some information

---
 build_system/src/config.rs | 35 +++++++++++++++--------------------
 build_system/src/info.rs   | 19 +++++++++++++++++++
 build_system/src/main.rs   |  5 +++++
 3 files changed, 39 insertions(+), 20 deletions(-)
 create mode 100644 build_system/src/info.rs

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index a206bab14a9a..48be515a1f0f 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -121,6 +121,9 @@ pub struct ConfigInfo {
     pub gcc_path: String,
     config_file: Option<String>,
     cg_gcc_path: Option<PathBuf>,
+    // Needed for the `info` command which doesn't want to actually download the lib if needed,
+    // just to set the `gcc_path` field to display it.
+    pub no_download: bool,
 }
 
 impl ConfigInfo {
@@ -204,7 +207,7 @@ impl ConfigInfo {
             return Err(format!(
                 "{}: invalid commit hash `{}`",
                 commit_hash_file.display(),
-                commit
+                commit,
             ));
         }
         let output_dir = output_dir.join(commit);
@@ -217,9 +220,17 @@ impl ConfigInfo {
                 )
             })?;
         }
+        let output_dir = output_dir.canonicalize().map_err(|err| {
+            format!(
+                "Failed to get absolute path of `{}`: {:?}",
+                output_dir.display(),
+                err
+            )
+        })?;
+
         let libgccjit_so_name = "libgccjit.so";
         let libgccjit_so = output_dir.join(libgccjit_so_name);
-        if !libgccjit_so.is_file() {
+        if !libgccjit_so.is_file() && !self.no_download {
             // Download time!
             let tempfile_name = "libgccjit.so.download";
             let tempfile = output_dir.join(tempfile_name);
@@ -283,28 +294,12 @@ impl ConfigInfo {
 
             println!("Downloaded libgccjit.so version {} successfully!", commit);
             create_symlink(
-                &libgccjit_so.canonicalize().map_err(|err| {
-                    format!(
-                        "Failed to get absolute path of `{}`: {:?}",
-                        libgccjit_so.display(),
-                        err,
-                    )
-                })?,
+                &libgccjit_so,
                 output_dir.join(&format!("{}.0", libgccjit_so_name)),
             )?;
         }
 
-        self.gcc_path = output_dir
-            .canonicalize()
-            .map_err(|err| {
-                format!(
-                    "Failed to get absolute path of `{}`: {:?}",
-                    output_dir.display(),
-                    err
-                )
-            })?
-            .display()
-            .to_string();
+        self.gcc_path = output_dir.display().to_string();
         println!("Using `{}` as path for libgccjit", self.gcc_path);
         Ok(())
     }
diff --git a/build_system/src/info.rs b/build_system/src/info.rs
new file mode 100644
index 000000000000..ea38791d38c9
--- /dev/null
+++ b/build_system/src/info.rs
@@ -0,0 +1,19 @@
+use crate::config::ConfigInfo;
+
+pub fn run() -> Result<(), String> {
+    let mut config = ConfigInfo::default();
+
+    // We skip binary name and the `info` command.
+    let mut args = std::env::args().skip(2);
+    while let Some(arg) = args.next() {
+        if arg == "--help" {
+            println!("Display the path where the libgccjit will be located");
+            return Ok(());
+        }
+        config.parse_argument(&arg, &mut args)?;
+    }
+    config.no_download = true;
+    config.setup_gcc_path()?;
+    println!("{}", config.gcc_path);
+    Ok(())
+}
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index 102c5486a75e..c6958f0c5124 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -5,6 +5,7 @@ mod build;
 mod cargo;
 mod clean;
 mod config;
+mod info;
 mod prepare;
 mod rustc_info;
 mod test;
@@ -29,6 +30,7 @@ Available commands for build_system:
     prepare  : Run prepare command
     build    : Run build command
     test     : Run test command
+    info:    : Run info command
     --help   : Show this message"
     );
 }
@@ -39,6 +41,7 @@ pub enum Command {
     Prepare,
     Build,
     Test,
+    Info,
 }
 
 fn main() {
@@ -52,6 +55,7 @@ fn main() {
         Some("prepare") => Command::Prepare,
         Some("build") => Command::Build,
         Some("test") => Command::Test,
+        Some("info") => Command::Info,
         Some("--help") => {
             usage();
             process::exit(0);
@@ -70,6 +74,7 @@ fn main() {
         Command::Prepare => prepare::run(),
         Command::Build => build::run(),
         Command::Test => test::run(),
+        Command::Info => info::run(),
     } {
         eprintln!("Command failed to run: {e}");
         process::exit(1);

From 65f4b6354d8899e9292f8666d2804a0306b0770e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 12 Feb 2024 18:11:37 +0100
Subject: [PATCH 513/997] Add CI for download config

---
 .github/workflows/download.yml | 97 ++++++++++++++++++++++++++++++++++
 1 file changed, 97 insertions(+)
 create mode 100644 .github/workflows/download.yml

diff --git a/.github/workflows/download.yml b/.github/workflows/download.yml
new file mode 100644
index 000000000000..86a8459a33c9
--- /dev/null
+++ b/.github/workflows/download.yml
@@ -0,0 +1,97 @@
+name: Check download command
+
+on:
+  - push
+  - pull_request
+
+permissions:
+  contents: read
+
+env:
+  # Enable backtraces for easier debugging
+  RUST_BACKTRACE: 1
+
+jobs:
+  build:
+    runs-on: ubuntu-22.04
+
+    strategy:
+      fail-fast: false
+      matrix:
+        commands: [
+          "--mini-tests",
+          "--std-tests",
+          # FIXME: re-enable asm tests when GCC can emit in the right syntax.
+          # "--asm-tests",
+          "--test-libcore",
+          "--extended-rand-tests",
+          "--extended-regex-example-tests",
+          "--extended-regex-tests",
+          "--test-successful-rustc --nb-parts 2 --current-part 0",
+          "--test-successful-rustc --nb-parts 2 --current-part 1",
+          "--projects",
+        ]
+
+    steps:
+    - uses: actions/checkout@v3
+
+    # `rustup show` installs from rust-toolchain.toml
+    - name: Setup rust toolchain
+      run: rustup show
+
+    - name: Setup rust cache
+      uses: Swatinem/rust-cache@v2
+
+    - name: Install packages
+      # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
+      run: sudo apt-get install ninja-build ripgrep llvm-14-tools
+
+    - name: Setup path to libgccjit
+      run: |
+          echo 'download-gccjit = true' > config.toml
+
+    - name: Set env
+      run: |
+        echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
+
+    #- name: Cache rust repository
+      ## We only clone the rust repository for rustc tests
+      #if: ${{ contains(matrix.commands, 'rustc') }}
+      #uses: actions/cache@v3
+      #id: cache-rust-repository
+      #with:
+        #path: rust
+        #key: ${{ runner.os }}-packages-${{ hashFiles('rust/.git/HEAD') }}
+
+    - name: Build
+      run: |
+        ./y.sh prepare --only-libcore
+        # TODO: remove --features master when it is back to the default.
+        ./y.sh build --features master
+        # TODO: remove --features master when it is back to the default.
+
+    - name: Set env (part 2)
+      run: |
+        # Set the `LD_LIBRARY_PATH` and `LIBRARY_PATH` env variables...
+        echo "LD_LIBRARY_PATH="$(./y.sh info | grep -v Using) >> $GITHUB_ENV
+        echo "LIBRARY_PATH="$(./y.sh info | grep -v Using) >> $GITHUB_ENV
+
+    - name: Build (part 2)
+      run: |
+        echo "LIBRARY_PATH=" $LIBRARY_PATH
+        cargo test --features master
+        ./y.sh clean all
+
+    - name: Prepare dependencies
+      run: |
+        git config --global user.email "user@example.com"
+        git config --global user.name "User"
+        ./y.sh prepare
+
+    - name: Add more failing tests because the sysroot is not compiled with LTO
+      run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
+
+    - name: Run tests
+      run: |
+        # TODO: remove --features master when it is back to the default.
+        ./y.sh test --features master --release --clean --build-sysroot ${{ matrix.commands }}

From d04ffb0ffc10bbf2623f32fc6840ed3a7614ff33 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 12 Feb 2024 22:52:57 +0100
Subject: [PATCH 514/997] Update lang_tests_common.rs test

---
 tests/lang_tests_common.rs | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index 029a3b98ff23..33dc6ef62ae5 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -21,11 +21,16 @@ pub fn main_inner(profile: Profile) {
     let tempdir = TempDir::new().expect("temp dir");
     let current_dir = current_dir().expect("current dir");
     let current_dir = current_dir.to_str().expect("current dir").to_string();
-    let gcc_path = Toml::parse(include_str!("../config.toml"))
-        .expect("Failed to parse `config.toml`")
-        .get_string("gcc-path")
-        .expect("Missing `gcc-path` key in `config.toml`")
-        .to_string();
+    let toml = Toml::parse(include_str!("../config.toml"))
+        .expect("Failed to parse `config.toml`");
+    let gcc_path = if let Ok(gcc_path) = toml.get_string("gcc-path") {
+        PathBuf::from(gcc_path.to_string())
+    } else {
+        // then we try to retrieve it from the `target` folder.
+        let commit = include_str!("../libgccjit.version").trim();
+        Path::new("target/libgccjit").join(commit)
+    };
+
     let gcc_path = Path::new(&gcc_path)
         .canonicalize()
         .expect("failed to get absolute path of `gcc-path`")

From 59546ea2d53c9f3c9f0e87bb2852d6b972ec8f8b Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 13 Feb 2024 14:20:39 +0100
Subject: [PATCH 515/997] Merge `download.yml` into `ci.yml`

---
 .github/workflows/ci.yml       | 20 +++----
 .github/workflows/download.yml | 97 ----------------------------------
 2 files changed, 10 insertions(+), 107 deletions(-)
 delete mode 100644 .github/workflows/download.yml

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index ba64f40acc4b..e4678c4e2af4 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -49,19 +49,10 @@ jobs:
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
       run: sudo apt-get install ninja-build ripgrep llvm-14-tools
 
-    - name: Download artifact
-      run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/gcc-13.deb
-
-    - name: Setup path to libgccjit
-      run: |
-          sudo dpkg --force-overwrite -i gcc-13.deb
-          echo 'gcc-path = "/usr/lib/"' > config.toml
-
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+        echo 'download-gccjit = true' > config.toml
 
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
@@ -78,6 +69,15 @@ jobs:
         # TODO: remove --features master when it is back to the default.
         ./y.sh build --features master
         # TODO: remove --features master when it is back to the default.
+
+    - name: Set env (part 2)
+      run: |
+        # Set the `LD_LIBRARY_PATH` and `LIBRARY_PATH` env variables...
+        echo "LD_LIBRARY_PATH="$(./y.sh info | grep -v Using) >> $GITHUB_ENV
+        echo "LIBRARY_PATH="$(./y.sh info | grep -v Using) >> $GITHUB_ENV
+
+    - name: Build (part 2)
+      run: |
         cargo test --features master
         ./y.sh clean all
 
diff --git a/.github/workflows/download.yml b/.github/workflows/download.yml
deleted file mode 100644
index 86a8459a33c9..000000000000
--- a/.github/workflows/download.yml
+++ /dev/null
@@ -1,97 +0,0 @@
-name: Check download command
-
-on:
-  - push
-  - pull_request
-
-permissions:
-  contents: read
-
-env:
-  # Enable backtraces for easier debugging
-  RUST_BACKTRACE: 1
-
-jobs:
-  build:
-    runs-on: ubuntu-22.04
-
-    strategy:
-      fail-fast: false
-      matrix:
-        commands: [
-          "--mini-tests",
-          "--std-tests",
-          # FIXME: re-enable asm tests when GCC can emit in the right syntax.
-          # "--asm-tests",
-          "--test-libcore",
-          "--extended-rand-tests",
-          "--extended-regex-example-tests",
-          "--extended-regex-tests",
-          "--test-successful-rustc --nb-parts 2 --current-part 0",
-          "--test-successful-rustc --nb-parts 2 --current-part 1",
-          "--projects",
-        ]
-
-    steps:
-    - uses: actions/checkout@v3
-
-    # `rustup show` installs from rust-toolchain.toml
-    - name: Setup rust toolchain
-      run: rustup show
-
-    - name: Setup rust cache
-      uses: Swatinem/rust-cache@v2
-
-    - name: Install packages
-      # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
-      run: sudo apt-get install ninja-build ripgrep llvm-14-tools
-
-    - name: Setup path to libgccjit
-      run: |
-          echo 'download-gccjit = true' > config.toml
-
-    - name: Set env
-      run: |
-        echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-
-    #- name: Cache rust repository
-      ## We only clone the rust repository for rustc tests
-      #if: ${{ contains(matrix.commands, 'rustc') }}
-      #uses: actions/cache@v3
-      #id: cache-rust-repository
-      #with:
-        #path: rust
-        #key: ${{ runner.os }}-packages-${{ hashFiles('rust/.git/HEAD') }}
-
-    - name: Build
-      run: |
-        ./y.sh prepare --only-libcore
-        # TODO: remove --features master when it is back to the default.
-        ./y.sh build --features master
-        # TODO: remove --features master when it is back to the default.
-
-    - name: Set env (part 2)
-      run: |
-        # Set the `LD_LIBRARY_PATH` and `LIBRARY_PATH` env variables...
-        echo "LD_LIBRARY_PATH="$(./y.sh info | grep -v Using) >> $GITHUB_ENV
-        echo "LIBRARY_PATH="$(./y.sh info | grep -v Using) >> $GITHUB_ENV
-
-    - name: Build (part 2)
-      run: |
-        echo "LIBRARY_PATH=" $LIBRARY_PATH
-        cargo test --features master
-        ./y.sh clean all
-
-    - name: Prepare dependencies
-      run: |
-        git config --global user.email "user@example.com"
-        git config --global user.name "User"
-        ./y.sh prepare
-
-    - name: Add more failing tests because the sysroot is not compiled with LTO
-      run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
-
-    - name: Run tests
-      run: |
-        # TODO: remove --features master when it is back to the default.
-        ./y.sh test --features master --release --clean --build-sysroot ${{ matrix.commands }}

From 2bcc73540cbadaae43b539567252f79dffd43f5a Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 13 Feb 2024 14:44:19 +0100
Subject: [PATCH 516/997] Don't join config file path if provided through
 `--config-file` option

---
 build_system/src/config.rs | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 48be515a1f0f..b48e132ebd2a 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -312,7 +312,10 @@ impl ConfigInfo {
     }
 
     pub fn setup_gcc_path(&mut self) -> Result<(), String> {
-        let config_file = self.compute_path(self.config_file.as_deref().unwrap_or("config.toml"));
+        let config_file = match self.config_file.as_deref() {
+            Some(config_file) => config_file.into(),
+            None => self.compute_path("config.toml"),
+        };
         let ConfigFile {
             gcc_path,
             download_gccjit,

From 1096b1b8db1ac3bdb13f77e3726a00d9516af5a0 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 13 Feb 2024 15:01:13 +0100
Subject: [PATCH 517/997] Add more explanation on what `cg_gcc_path` is used
 for and improve help message for `--cg_gcc-path`

---
 build_system/src/config.rs | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index b48e132ebd2a..fc2ef7b797d5 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -120,6 +120,9 @@ pub struct ConfigInfo {
     pub sysroot_path: String,
     pub gcc_path: String,
     config_file: Option<String>,
+    // This is used in particular in rust compiler bootstrap because it doesn't run at the root
+    // of the `cg_gcc` folder, making it complicated for us to get access to local files we need
+    // like `libgccjit.version` or `config.toml`.
     cg_gcc_path: Option<PathBuf>,
     // Needed for the `info` command which doesn't want to actually download the lib if needed,
     // just to set the `gcc_path` field to display it.
@@ -526,7 +529,7 @@ impl ConfigInfo {
     --sysroot-panic-abort  : Build the sysroot without unwinding support
     --config-file          : Location of the config file to be used
     --cg_gcc-path          : Location of the rustc_codegen_gcc root folder (used
-                             for accessing any file from the project)"
+                             when ran from another directory)"
         );
     }
 }

From b80a99922be9866d4117931e50127f36010a8dc9 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 13 Feb 2024 15:43:07 +0100
Subject: [PATCH 518/997] Improve code readability and add more code comments

---
 build_system/src/config.rs | 146 ++++++++++++++++++++-----------------
 1 file changed, 80 insertions(+), 66 deletions(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index fc2ef7b797d5..475f9b300f74 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -190,6 +190,83 @@ impl ConfigInfo {
         command
     }
 
+    fn download_gccjit(
+        &self,
+        output_dir: &Path,
+        libgccjit_so_name: &str,
+        commit: &str,
+    ) -> Result<(), String> {
+        // Download time!
+        let tempfile_name = format!("{}.download", libgccjit_so_name);
+        let tempfile = output_dir.join(&tempfile_name);
+        let is_in_ci = std::env::var("GITHUB_ACTIONS").is_ok();
+
+        let url = format!(
+            "https://github.com/antoyo/gcc/releases/download/master-{}/libgccjit.so",
+            commit,
+        );
+
+        println!("Downloading `{}`...", url);
+        // Try curl. If that fails and we are on windows, fallback to PowerShell.
+        let mut ret = run_command_with_output(
+            &[
+                &"curl",
+                &"--speed-time",
+                &"30",
+                &"--speed-limit",
+                &"10", // timeout if speed is < 10 bytes/sec for > 30 seconds
+                &"--connect-timeout",
+                &"30", // timeout if cannot connect within 30 seconds
+                &"-o",
+                &tempfile_name,
+                &"--retry",
+                &"3",
+                &"-SRfL",
+                if is_in_ci { &"-s" } else { &"--progress-bar" },
+                &url.as_str(),
+            ],
+            Some(&output_dir),
+        );
+        if ret.is_err() && cfg!(windows) {
+            eprintln!("Fallback to PowerShell");
+            ret = run_command_with_output(
+                &[
+                    &"PowerShell.exe",
+                    &"/nologo",
+                    &"-Command",
+                    &"[Net.ServicePointManager]::SecurityProtocol = [Net.SecurityProtocolType]::Tls12;",
+                    &format!(
+                        "(New-Object System.Net.WebClient).DownloadFile('{}', '{}')",
+                        url,
+                        tempfile_name,
+                    ).as_str(),
+                ],
+                Some(&output_dir),
+            );
+        }
+        ret?;
+
+        let libgccjit_so = output_dir.join(libgccjit_so_name);
+        // If we reach this point, it means the file was correctly downloaded, so let's
+        // rename it!
+        std::fs::rename(&tempfile, &libgccjit_so).map_err(|err| {
+            format!(
+                "Failed to rename `{}` into `{}`: {:?}",
+                tempfile.display(),
+                libgccjit_so.display(),
+                err,
+            )
+        })?;
+
+        println!("Downloaded libgccjit.so version {} successfully!", commit);
+        // We need to create a link named `libgccjit.so.0` because that's what the linker is
+        // looking for.
+        create_symlink(
+            &libgccjit_so,
+            output_dir.join(&format!("{}.0", libgccjit_so_name)),
+        )
+    }
+
     fn download_gccjit_if_needed(&mut self) -> Result<(), String> {
         let output_dir = Path::new(
             std::env::var("CARGO_TARGET_DIR")
@@ -206,6 +283,8 @@ impl ConfigInfo {
             )
         })?;
         let commit = content.trim();
+        // This is a very simple check to ensure this is not a path. For the rest, it'll just fail
+        // when trying to download the file so we should be fine.
         if commit.contains('/') || commit.contains('\\') {
             return Err(format!(
                 "{}: invalid commit hash `{}`",
@@ -234,72 +313,7 @@ impl ConfigInfo {
         let libgccjit_so_name = "libgccjit.so";
         let libgccjit_so = output_dir.join(libgccjit_so_name);
         if !libgccjit_so.is_file() && !self.no_download {
-            // Download time!
-            let tempfile_name = "libgccjit.so.download";
-            let tempfile = output_dir.join(tempfile_name);
-            let is_in_ci = std::env::var("GITHUB_ACTIONS").is_ok();
-
-            let url = format!(
-                "https://github.com/antoyo/gcc/releases/download/master-{}/libgccjit.so",
-                commit,
-            );
-
-            println!("Downloading `{}`...", url);
-            // Try curl. If that fails and we are on windows, fallback to PowerShell.
-            let mut ret = run_command_with_output(
-                &[
-                    &"curl",
-                    &"--speed-time",
-                    &"30",
-                    &"--speed-limit",
-                    &"10", // timeout if speed is < 10 bytes/sec for > 30 seconds
-                    &"--connect-timeout",
-                    &"30", // timeout if cannot connect within 30 seconds
-                    &"-o",
-                    &tempfile_name,
-                    &"--retry",
-                    &"3",
-                    &"-SRfL",
-                    if is_in_ci { &"-s" } else { &"--progress-bar" },
-                    &url.as_str(),
-                ],
-                Some(&output_dir),
-            );
-            if ret.is_err() && cfg!(windows) {
-                eprintln!("Fallback to PowerShell");
-                ret = run_command_with_output(
-                    &[
-                        &"PowerShell.exe",
-                        &"/nologo",
-                        &"-Command",
-                        &"[Net.ServicePointManager]::SecurityProtocol = [Net.SecurityProtocolType]::Tls12;",
-                        &format!(
-                            "(New-Object System.Net.WebClient).DownloadFile('{}', '{}')",
-                            url,
-                            tempfile_name,
-                        ).as_str(),
-                    ],
-                    Some(&output_dir),
-                );
-            }
-            ret?;
-
-            // If we reach this point, it means the file was correctly downloaded, so let's
-            // rename it!
-            std::fs::rename(&tempfile, &libgccjit_so).map_err(|err| {
-                format!(
-                    "Failed to rename `{}` into `{}`: {:?}",
-                    tempfile.display(),
-                    libgccjit_so.display(),
-                    err,
-                )
-            })?;
-
-            println!("Downloaded libgccjit.so version {} successfully!", commit);
-            create_symlink(
-                &libgccjit_so,
-                output_dir.join(&format!("{}.0", libgccjit_so_name)),
-            )?;
+            self.download_gccjit(&output_dir, libgccjit_so_name, commit)?;
         }
 
         self.gcc_path = output_dir.display().to_string();

From 267aaef81dade6f1c1ae09fe820a31ff6de95e38 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 13 Feb 2024 21:26:14 +0100
Subject: [PATCH 519/997] Move some top-level folders into `build`

---
 build_system/src/clean.rs   | 19 ++++------
 build_system/src/config.rs  | 12 ++++--
 build_system/src/main.rs    |  2 +
 build_system/src/prepare.rs |  7 ++--
 build_system/src/test.rs    | 75 +++++++++++++++++++++----------------
 5 files changed, 62 insertions(+), 53 deletions(-)

diff --git a/build_system/src/clean.rs b/build_system/src/clean.rs
index 929a878113d6..cd8e691a0ed9 100644
--- a/build_system/src/clean.rs
+++ b/build_system/src/clean.rs
@@ -1,6 +1,7 @@
 use crate::utils::{remove_file, run_command};
 
 use std::fs::remove_dir_all;
+use std::path::Path;
 
 #[derive(Default)]
 enum CleanArg {
@@ -46,12 +47,14 @@ fn clean_all() -> Result<(), String> {
         "build_sysroot/sysroot",
         "build_sysroot/sysroot_src",
         "build_sysroot/target",
-        "regex",
-        "simple-raytracer",
     ];
     for dir in dirs_to_remove {
         let _ = remove_dir_all(dir);
     }
+    let dirs_to_remove = ["regex", "rand", "simple-raytracer"];
+    for dir in dirs_to_remove {
+        let _ = remove_dir_all(Path::new(crate::BUILD_DIR).join(dir));
+    }
 
     let files_to_remove = ["build_sysroot/Cargo.lock", "perf.data", "perf.data.old"];
 
@@ -64,16 +67,8 @@ fn clean_all() -> Result<(), String> {
 }
 
 fn clean_ui_tests() -> Result<(), String> {
-    run_command(
-        &[
-            &"find",
-            &"rust/build/x86_64-unknown-linux-gnu/test/ui/",
-            &"-name",
-            &"stamp",
-            &"-delete",
-        ],
-        None,
-    )?;
+    let path = Path::new(crate::BUILD_DIR).join("rust/build/x86_64-unknown-linux-gnu/test/ui/");
+    run_command(&[&"find", &path, &"-name", &"stamp", &"-delete"], None)?;
     Ok(())
 }
 
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index c9bfcb9e6ba4..d1047436cebd 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -523,7 +523,11 @@ fn download_gccjit(
             &"--retry",
             &"3",
             &"-SRfL",
-            if with_progress_bar { &"--progress-bar" } else { &"-s" },
+            if with_progress_bar {
+                &"--progress-bar"
+            } else {
+                &"-s"
+            },
             &url.as_str(),
         ],
         Some(&output_dir),
@@ -538,9 +542,9 @@ fn download_gccjit(
                 &"[Net.ServicePointManager]::SecurityProtocol = [Net.SecurityProtocolType]::Tls12;",
                 &format!(
                     "(New-Object System.Net.WebClient).DownloadFile('{}', '{}')",
-                    url,
-                    tempfile_name,
-                ).as_str(),
+                    url, tempfile_name,
+                )
+                .as_str(),
             ],
             Some(&output_dir),
         );
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index c6958f0c5124..18dc4b21a962 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -11,6 +11,8 @@ mod rustc_info;
 mod test;
 mod utils;
 
+const BUILD_DIR: &str = "build";
+
 macro_rules! arg_error {
     ($($err:tt)*) => {{
         eprintln!($($err)*);
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 7f1401e594c4..979438d04151 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -152,11 +152,11 @@ fn clone_and_setup<F>(repo_url: &str, checkout_commit: &str, extra: Option<F>) -
 where
     F: Fn(&Path) -> Result<(), String>,
 {
-    let clone_result = git_clone(repo_url, None, false)?;
+    let clone_result = git_clone(repo_url, Some(&Path::new(crate::BUILD_DIR)), false)?;
     if !clone_result.ran_clone {
         println!("`{}` has already been cloned", clone_result.repo_name);
     }
-    let repo_path = Path::new(&clone_result.repo_name);
+    let repo_path = Path::new(crate::BUILD_DIR).join(&clone_result.repo_name);
     run_command(&[&"git", &"checkout", &"--", &"."], Some(&repo_path))?;
     run_command(&[&"git", &"checkout", &checkout_commit], Some(&repo_path))?;
     let filter = format!("-{}-", clone_result.repo_name);
@@ -219,8 +219,7 @@ impl PrepareArg {
     --only-libcore           : Only setup libcore and don't clone other repositories
     --cross                  : Apply the patches needed to do cross-compilation
     --libgccjit12-patches    : Apply patches needed for libgccjit12
-    --help                   : Show this help
-"#
+    --help                   : Show this help"#
         )
     }
 }
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 806e18431c46..d7f7a0eb47ef 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -485,19 +485,25 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     Ok(())
 }
 
-fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
+fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
     let toolchain = format!(
         "+{channel}-{host}",
         channel = get_toolchain()?, // May also include date
         host = args.config_info.host_triple
     );
-    let rust_dir = Some(Path::new("rust"));
+    let rust_dir_path = Path::new(crate::BUILD_DIR).join("rust");
     // If the repository was already cloned, command will fail, so doesn't matter.
     let _ = run_command_with_output_and_env(
-        &[&"git", &"clone", &"https://github.com/rust-lang/rust.git"],
+        &[
+            &"git",
+            &"clone",
+            &"https://github.com/rust-lang/rust.git",
+            &rust_dir_path,
+        ],
         None,
         Some(env),
     );
+    let rust_dir: Option<&Path> = Some(&rust_dir_path);
     run_command(&[&"git", &"checkout", &"--", &"tests/"], rust_dir)?;
     run_command_with_output_and_env(&[&"git", &"fetch"], rust_dir, Some(env))?;
     let rustc_commit = match rustc_version_info(env.get("RUSTC").map(|s| s.as_str()))?.commit_hash {
@@ -561,8 +567,9 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<(), String> {
             String::new()
         }
     };
+    let file_path = rust_dir_path.join("config.toml");
     std::fs::write(
-        "rust/config.toml",
+        &file_path,
         &format!(
             r#"change-id = 115898
 
@@ -587,13 +594,19 @@ download-ci-llvm = false
             llvm_filecheck = llvm_filecheck.trim(),
         ),
     )
-    .map_err(|error| format!("Failed to write into `rust/config.toml`: {:?}", error))?;
-    Ok(())
+    .map_err(|error| {
+        format!(
+            "Failed to write into `{}`: {:?}",
+            file_path.display(),
+            error
+        )
+    })?;
+    Ok(rust_dir_path)
 }
 
 fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     let mut env = env.clone();
-    setup_rustc(&mut env, args)?;
+    let rust_dir = setup_rustc(&mut env, args)?;
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[TEST] rustc asm test suite");
 
@@ -621,7 +634,7 @@ fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
             )
             .as_str(),
         ],
-        Some(Path::new("rust")),
+        Some(&rust_dir),
         Some(&env),
     )?;
     Ok(())
@@ -761,11 +774,11 @@ fn extended_rand_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         println!("Not using GCC master branch. Skipping `extended_rand_tests`.");
         return Ok(());
     }
-    let path = Path::new("rand");
-    run_cargo_command(&[&"clean"], Some(path), env, args)?;
+    let path = Path::new(crate::BUILD_DIR).join("rand");
+    run_cargo_command(&[&"clean"], Some(&path), env, args)?;
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[TEST] rust-random/rand");
-    run_cargo_command(&[&"test", &"--workspace"], Some(path), env, args)?;
+    run_cargo_command(&[&"test", &"--workspace"], Some(&path), env, args)?;
     Ok(())
 }
 
@@ -774,8 +787,8 @@ fn extended_regex_example_tests(env: &Env, args: &TestArg) -> Result<(), String>
         println!("Not using GCC master branch. Skipping `extended_regex_example_tests`.");
         return Ok(());
     }
-    let path = Path::new("regex");
-    run_cargo_command(&[&"clean"], Some(path), env, args)?;
+    let path = Path::new(crate::BUILD_DIR).join("regex");
+    run_cargo_command(&[&"clean"], Some(&path), env, args)?;
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[TEST] rust-lang/regex example shootout-regex-dna");
     let mut env = env.clone();
@@ -788,14 +801,14 @@ fn extended_regex_example_tests(env: &Env, args: &TestArg) -> Result<(), String>
     // Make sure `[codegen mono items] start` doesn't poison the diff
     run_cargo_command(
         &[&"build", &"--example", &"shootout-regex-dna"],
-        Some(path),
+        Some(&path),
         &env,
         args,
     )?;
 
     run_cargo_command_with_callback(
         &[&"run", &"--example", &"shootout-regex-dna"],
-        Some(path),
+        Some(&path),
         &env,
         args,
         |cargo_command, cwd, env| {
@@ -838,6 +851,7 @@ fn extended_regex_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         env.get("RUSTFLAGS").cloned().unwrap_or_default()
     );
     env.insert("RUSTFLAGS".to_string(), rustflags);
+    let path = Path::new(crate::BUILD_DIR).join("regex");
     run_cargo_command(
         &[
             &"test",
@@ -850,7 +864,7 @@ fn extended_regex_tests(env: &Env, args: &TestArg) -> Result<(), String> {
             &"-Zunstable-options",
             &"-q",
         ],
-        Some(Path::new("regex")),
+        Some(&path),
         &env,
         args,
     )?;
@@ -928,17 +942,15 @@ fn should_remove_test(file_path: &Path) -> Result<bool, String> {
 
 fn test_rustc_inner<F>(env: &Env, args: &TestArg, prepare_files_callback: F) -> Result<(), String>
 where
-    F: Fn() -> Result<bool, String>,
+    F: Fn(&Path) -> Result<bool, String>,
 {
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[TEST] rust-lang/rust");
     let mut env = env.clone();
-    setup_rustc(&mut env, args)?;
-
-    let rust_path = Path::new("rust");
+    let rust_path = setup_rustc(&mut env, args)?;
 
     walk_dir(
-        "rust/tests/ui",
+        rust_path.join("tests/ui"),
         |dir| {
             let dir_name = dir.file_name().and_then(|name| name.to_str()).unwrap_or("");
             if [
@@ -1001,7 +1013,7 @@ where
 
     walk_dir(rust_path.join("tests/ui"), dir_handling, file_handling)?;
 
-    if !prepare_files_callback()? {
+    if !prepare_files_callback(&rust_path)? {
         // FIXME: create a function "display_if_not_quiet" or something along the line.
         println!("Keeping all UI tests");
     }
@@ -1027,7 +1039,7 @@ where
                     &"-path",
                     &"*/auxiliary/*",
                 ],
-                Some(rust_path),
+                Some(&rust_path),
             )?
             .stdout,
         )
@@ -1072,18 +1084,18 @@ where
             &"--rustc-args",
             &rustc_args,
         ],
-        Some(rust_path),
+        Some(&rust_path),
         Some(&env),
     )?;
     Ok(())
 }
 
 fn test_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    test_rustc_inner(env, args, || Ok(false))
+    test_rustc_inner(env, args, |_| Ok(false))
 }
 
 fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    test_rustc_inner(env, args, || {
+    test_rustc_inner(env, args, |rust_path| {
         // Removing all tests.
         run_command(
             &[
@@ -1098,7 +1110,7 @@ fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
                 &"*/auxiliary/*",
                 &"-delete",
             ],
-            Some(Path::new("rust")),
+            Some(rust_path),
         )?;
         // Putting back only the failing ones.
         let path = "tests/failing-ui-tests.txt";
@@ -1108,10 +1120,7 @@ fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
                 .map(|line| line.trim())
                 .filter(|line| !line.is_empty())
             {
-                run_command(
-                    &[&"git", &"checkout", &"--", &file],
-                    Some(Path::new("rust")),
-                )?;
+                run_command(&[&"git", &"checkout", &"--", &file], Some(&rust_path))?;
             }
         } else {
             println!(
@@ -1124,7 +1133,7 @@ fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
 }
 
 fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    test_rustc_inner(env, args, || {
+    test_rustc_inner(env, args, |rust_path| {
         // Removing the failing tests.
         let path = "tests/failing-ui-tests.txt";
         if let Ok(files) = std::fs::read_to_string(path) {
@@ -1133,7 +1142,7 @@ fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
                 .map(|line| line.trim())
                 .filter(|line| !line.is_empty())
             {
-                let path = Path::new("rust").join(file);
+                let path = rust_path.join(file);
                 remove_file(&path)?;
             }
         } else {

From 896b1a9049631477e2549144a2a3a773c470213e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 13 Feb 2024 21:50:00 +0100
Subject: [PATCH 520/997] Generate libgccjit.so into the `build` folder

---
 build_system/src/config.rs | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index d1047436cebd..c89a6d5eb9b2 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -191,12 +191,7 @@ impl ConfigInfo {
     }
 
     fn download_gccjit_if_needed(&mut self) -> Result<(), String> {
-        let output_dir = Path::new(
-            std::env::var("CARGO_TARGET_DIR")
-                .as_deref()
-                .unwrap_or("target"),
-        )
-        .join("libgccjit");
+        let output_dir = Path::new(crate::BUILD_DIR).join("libgccjit");
 
         let commit_hash_file = self.compute_path("libgccjit.version");
         let content = fs::read_to_string(&commit_hash_file).map_err(|_| {

From 436fea8efbb332362a9c3b7f6854fea6bd35cd11 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 13 Feb 2024 21:50:34 +0100
Subject: [PATCH 521/997] Add `build` folder into the ignored git entries

---
 .gitignore | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.gitignore b/.gitignore
index 687c3a6797af..ac695da16f86 100644
--- a/.gitignore
+++ b/.gitignore
@@ -29,3 +29,4 @@ tools/llvmint-2
 llvm
 build_system/target
 config.toml
+build
\ No newline at end of file

From 46d6e772c087c3bffb3228f36530010f16a57431 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 13 Feb 2024 21:56:17 +0100
Subject: [PATCH 522/997] Update `tests/lang_tests_common.rs` test

---
 tests/lang_tests_common.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index 33dc6ef62ae5..4cc429cfa456 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -28,7 +28,7 @@ pub fn main_inner(profile: Profile) {
     } else {
         // then we try to retrieve it from the `target` folder.
         let commit = include_str!("../libgccjit.version").trim();
-        Path::new("target/libgccjit").join(commit)
+        Path::new("build/libgccjit").join(commit)
     };
 
     let gcc_path = Path::new(&gcc_path)

From 452ebf5f376971bec12364f56a7bb71125edf1fc Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Wed, 14 Feb 2024 08:12:10 +0800
Subject: [PATCH 523/997] feat(test.rs): Clone only 1 layer in build_system

---
 build_system/src/test.rs | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index d7f7a0eb47ef..f4e68ae710c8 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -499,17 +499,29 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
             &"clone",
             &"https://github.com/rust-lang/rust.git",
             &rust_dir_path,
+            &"--depth",
+            &"1",
         ],
         None,
         Some(env),
     );
     let rust_dir: Option<&Path> = Some(&rust_dir_path);
     run_command(&[&"git", &"checkout", &"--", &"tests/"], rust_dir)?;
-    run_command_with_output_and_env(&[&"git", &"fetch"], rust_dir, Some(env))?;
     let rustc_commit = match rustc_version_info(env.get("RUSTC").map(|s| s.as_str()))?.commit_hash {
         Some(commit_hash) => commit_hash,
         None => return Err("Couldn't retrieve rustc commit hash".to_string()),
     };
+    run_command_with_output_and_env(
+        &[
+            &"git",
+            &"fetch",
+            &"https://github.com/rust-lang/rust.git",
+            &rustc_commit.as_str(),
+            &"--depth=1",
+        ],
+        rust_dir,
+        Some(env),
+    )?;
     if rustc_commit != "unknown" {
         run_command_with_output_and_env(
             &[&"git", &"checkout", &rustc_commit],

From 17e329777fedae708cbc5170787bd8481989e7fd Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Wed, 14 Feb 2024 17:59:16 +0800
Subject: [PATCH 524/997] feat(test.rs): Lookup the commit with cat-file to
 avoid re-fetches

---
 build_system/src/test.rs | 35 ++++++++++++++++++++++++-----------
 1 file changed, 24 insertions(+), 11 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index f4e68ae710c8..9fe9708c2917 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -511,17 +511,30 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
         Some(commit_hash) => commit_hash,
         None => return Err("Couldn't retrieve rustc commit hash".to_string()),
     };
-    run_command_with_output_and_env(
-        &[
-            &"git",
-            &"fetch",
-            &"https://github.com/rust-lang/rust.git",
-            &rustc_commit.as_str(),
-            &"--depth=1",
-        ],
-        rust_dir,
-        Some(env),
-    )?;
+    let has_commit = {
+        if let Ok(ty) = run_command_with_env(
+            &[&"git", &"cat-file", &"-t", &rustc_commit.as_str()],
+            rust_dir,
+            Some(env),
+        ) {
+            String::from_utf8_lossy(&ty.stdout).to_string() == "commit"
+        } else {
+            false
+        }
+    };
+    if !has_commit {
+        run_command_with_output_and_env(
+            &[
+                &"git",
+                &"fetch",
+                &"https://github.com/rust-lang/rust.git",
+                &rustc_commit.as_str(),
+                &"--depth=1",
+            ],
+            rust_dir,
+            Some(env),
+        )?
+    };
     if rustc_commit != "unknown" {
         run_command_with_output_and_env(
             &[&"git", &"checkout", &rustc_commit],

From a883c6da2055aeb2892781c6f1abe38df6c0ef88 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 14 Feb 2024 13:35:20 +0100
Subject: [PATCH 525/997] Move `crates_patches` and `cross_patches` into the
 `patches` folder

---
 build_system/src/prepare.rs                                   | 4 ++--
 .../crate_patches}/0002-rand-Disable-failing-test.patch       | 0
 .../0001-Disable-libstd-and-libtest-dylib.patch               | 0
 3 files changed, 2 insertions(+), 2 deletions(-)
 rename {crate_patches => patches/crate_patches}/0002-rand-Disable-failing-test.patch (100%)
 rename {cross_patches => patches/cross_patches}/0001-Disable-libstd-and-libtest-dylib.patch (100%)

diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 979438d04151..1a3eb7d2e57b 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -95,7 +95,7 @@ fn prepare_libcore(
     )?;
     if cross_compile {
         walk_dir(
-            "cross_patches",
+            "patches/cross_patches",
             |_| Ok(()),
             |file_path: &Path| {
                 patches.push(file_path.to_path_buf());
@@ -161,7 +161,7 @@ where
     run_command(&[&"git", &"checkout", &checkout_commit], Some(&repo_path))?;
     let filter = format!("-{}-", clone_result.repo_name);
     walk_dir(
-        "crate_patches",
+        "patches/crate_patches",
         |_| Ok(()),
         |file_path| {
             let patch = file_path.as_os_str().to_str().unwrap();
diff --git a/crate_patches/0002-rand-Disable-failing-test.patch b/patches/crate_patches/0002-rand-Disable-failing-test.patch
similarity index 100%
rename from crate_patches/0002-rand-Disable-failing-test.patch
rename to patches/crate_patches/0002-rand-Disable-failing-test.patch
diff --git a/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch b/patches/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch
similarity index 100%
rename from cross_patches/0001-Disable-libstd-and-libtest-dylib.patch
rename to patches/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch

From ebac107a554bfdefc1c3932616795e07ff44eea6 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 14 Feb 2024 14:18:17 +0100
Subject: [PATCH 526/997] Remove paths that don't exist anymore from  file

---
 .gitignore | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/.gitignore b/.gitignore
index ac695da16f86..bf975f92014d 100644
--- a/.gitignore
+++ b/.gitignore
@@ -10,16 +10,10 @@ perf.data.old
 /build_sysroot/sysroot_src
 /build_sysroot/Cargo.lock
 /build_sysroot/test_target/Cargo.lock
-/rust
-/simple-raytracer
-/regex
-/rand
 gimple*
 *asm
 res
 test-backend
-gcc_path
-cross_gcc_path
 projects
 benchmarks
 tools/llvm-project

From de57533e5644335eccd8c1430b4c60295a0b922c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 12 Feb 2024 20:15:12 -0400
Subject: [PATCH 527/997] Implement dummy emit=llvm-ir

---
 .ignore           | 1 +
 src/back/write.rs | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/.ignore b/.ignore
index d8d189e5c7c6..702dd9e2a23f 100644
--- a/.ignore
+++ b/.ignore
@@ -8,3 +8,4 @@
 !*gimple*
 !*asm*
 !.github
+!config.toml
diff --git a/src/back/write.rs b/src/back/write.rs
index 04772d7707ab..792fd47001d5 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -70,7 +70,8 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, diag_hand
         }
 
         if config.emit_ir {
-            unimplemented!();
+            let out = cgcx.output_filenames.temp_path(OutputType::LlvmAssembly, module_name);
+            std::fs::write(out, "").expect("write file");
         }
 
         if config.emit_asm {

From 98c1efd5b69b64cabab6762d75687fc937d79599 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 15 Feb 2024 12:30:43 +0100
Subject: [PATCH 528/997] Put back `master` feature as default

---
 .github/workflows/ci.yml       | 9 +++------
 .github/workflows/failures.yml | 5 +----
 .github/workflows/m68k.yml     | 9 +++------
 .github/workflows/release.yml  | 9 +++------
 .github/workflows/stdarch.yml  | 9 +++------
 Cargo.toml                     | 1 +
 Readme.md                      | 4 ++--
 7 files changed, 16 insertions(+), 30 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index e4678c4e2af4..37d2bc1c201a 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -66,9 +66,7 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        # TODO: remove --features master when it is back to the default.
-        ./y.sh build --features master
-        # TODO: remove --features master when it is back to the default.
+        ./y.sh build
 
     - name: Set env (part 2)
       run: |
@@ -78,7 +76,7 @@ jobs:
 
     - name: Build (part 2)
       run: |
-        cargo test --features master
+        cargo test
         ./y.sh clean all
 
     - name: Prepare dependencies
@@ -92,8 +90,7 @@ jobs:
 
     - name: Run tests
       run: |
-        # TODO: remove --features master when it is back to the default.
-        ./y.sh test --features master --release --clean --build-sysroot ${{ matrix.commands }}
+        ./y.sh test --release --clean --build-sysroot ${{ matrix.commands }}
 
   duplicates:
     runs-on: ubuntu-latest
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index ae00a257e248..2bca694e8328 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -21,14 +21,11 @@ jobs:
         libgccjit_version:
           - gcc: "libgccjit.so"
             artifacts_branch: "master"
-            # TODO: switch back to --no-default-features in the case of libgccjit 12 when the default is to enable
-            # master again.
-            extra: "--features master"
           - gcc: "libgccjit_without_int128.so"
             artifacts_branch: "master-without-128bit-integers"
-            extra: "--features master"
           - gcc: "libgccjit12.so"
             artifacts_branch: "gcc12"
+            extra: "--no-default-features"
             # FIXME(antoyo): we need to set GCC_EXEC_PREFIX so that the linker can find the linker plugin.
             # Not sure why it's not found otherwise.
             env_extra: "TEST_FLAGS='-Cpanic=abort -Zpanic-abort-tests' GCC_EXEC_PREFIX=/usr/lib/gcc/"
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 2428125483bd..a8c6b614ce81 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -91,10 +91,8 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore --cross
-        # TODO: remove --features master when it is back to the default.
-        ./y.sh build --target-triple m68k-unknown-linux-gnu --features master
-        # TODO: remove --features master when it is back to the default.
-        CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu cargo test --features master
+        ./y.sh build --target-triple m68k-unknown-linux-gnu
+        CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu cargo test
         ./y.sh clean all
 
     - name: Prepare dependencies
@@ -108,5 +106,4 @@ jobs:
 
     - name: Run tests
       run: |
-        # TODO: remove --features master when it is back to the default.
-        ./y.sh test --release --features master --clean --build-sysroot ${{ matrix.commands }}
+        ./y.sh test --release --clean --build-sysroot ${{ matrix.commands }}
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 729a76e80bf9..28336998ffcd 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -53,10 +53,8 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        # TODO: remove --features master when it is back to the default.
-        EMBED_LTO_BITCODE=1 ./y.sh build --release --release-sysroot --features master
-        # TODO: remove --features master when it is back to the default.
-        cargo test --features master
+        EMBED_LTO_BITCODE=1 ./y.sh build --release --release-sysroot
+        cargo test
         ./y.sh clean all
 
     - name: Prepare dependencies
@@ -72,5 +70,4 @@ jobs:
 
     - name: Run tests
       run: |
-        # TODO: remove --features master when it is back to the default.
-        EMBED_LTO_BITCODE=1 ./y.sh test --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }} --features master
+        EMBED_LTO_BITCODE=1 ./y.sh test --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }}
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 65687756cd4e..fa40c1a2beab 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -67,10 +67,8 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        # TODO: remove `--features master` when it is back to the default.
-        ./y.sh build --release --release-sysroot --features master
-        # TODO: remove --features master when it is back to the default.
-        cargo test --features master
+        ./y.sh build --release --release-sysroot
+        cargo test
 
     - name: Clean
       if: ${{ !matrix.cargo_runner }}
@@ -86,8 +84,7 @@ jobs:
     - name: Run tests
       if: ${{ !matrix.cargo_runner }}
       run: |
-        # TODO: remove `--features master` when it is back to the default.
-        ./y.sh test --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore --features master
+        ./y.sh test --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore
 
     - name: Run stdarch tests
       if: ${{ !matrix.cargo_runner }}
diff --git a/Cargo.toml b/Cargo.toml
index a280ac73de09..5e657c7c5395 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -19,6 +19,7 @@ harness = false
 
 [features]
 master = ["gccjit/master"]
+default = ["master"]
 
 [dependencies]
 gccjit = { git = "https://github.com/antoyo/gccjit.rs" }
diff --git a/Readme.md b/Readme.md
index a380d0d5be6d..5d960d0c2d60 100644
--- a/Readme.md
+++ b/Readme.md
@@ -69,13 +69,13 @@ Then you can run commands like this:
 
 ```bash
 $ ./y.sh prepare # download and patch sysroot src and install hyperfine for benchmarking
-$ ./y.sh build --release --features master
+$ ./y.sh build --release
 ```
 
 To run the tests:
 
 ```bash
-$ ./y.sh test --release --features master
+$ ./y.sh test --release
 ```
 
 ## Usage

From af289a5eacbdf531ae22c5e90be7c8c627b20a93 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 15 Feb 2024 17:16:04 -0500
Subject: [PATCH 529/997] Use the default rust mangling

---
 Cargo.lock                 |  4 ++--
 build_system/src/config.rs |  5 ++++-
 build_system/src/test.rs   | 32 ++++++++++++++++++++------------
 libgccjit.version          |  2 +-
 src/declare.rs             |  7 +++++--
 src/lib.rs                 |  1 +
 6 files changed, 33 insertions(+), 18 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index a19de10d0d29..786d753a1505 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -80,7 +80,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#e6109eb8b7ced60b5191e65b34954d04d4abeaec"
+source = "git+https://github.com/antoyo/gccjit.rs#4b7aba76891e6436984f7f098fe92824d95194d5"
 dependencies = [
  "gccjit_sys",
 ]
@@ -88,7 +88,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#e6109eb8b7ced60b5191e65b34954d04d4abeaec"
+source = "git+https://github.com/antoyo/gccjit.rs#4b7aba76891e6436984f7f098fe92824d95194d5"
 dependencies = [
  "libc",
 ]
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index c89a6d5eb9b2..ddfc0e4a925d 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -415,8 +415,11 @@ impl ConfigInfo {
         if let Some(linker) = linker {
             rustflags.push(linker.to_string());
         }
+
+        #[cfg(not(feature="master"))]
+        rustflags.push("-Csymbol-mangling-version=v0".to_string());
+
         rustflags.extend_from_slice(&[
-            "-Csymbol-mangling-version=v0".to_string(),
             "-Cdebuginfo=2".to_string(),
             format!("-Zcodegen-backend={}", self.cg_backend_path),
         ]);
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index d7f7a0eb47ef..ab65fed0f75a 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -612,6 +612,21 @@ fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
 
     env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
 
+    let rustc_args =
+        &format!(
+            r#"-Zpanic-abort-tests \
+            -Zcodegen-backend="{pwd}/target/{channel}/librustc_codegen_gcc.{dylib_ext}" \
+            --sysroot "{pwd}/build_sysroot/sysroot" -Cpanic=abort"#,
+            pwd = std::env::current_dir()
+                .map_err(|error| format!("`current_dir` failed: {:?}", error))?
+                .display(),
+            channel = args.config_info.channel.as_str(),
+            dylib_ext = args.config_info.dylib_ext,
+        );
+
+    #[cfg(not(feature="master"))]
+    let rustc_args = format!("{} -Csymbol-mangling-version=v0", rustc_args);
+
     run_command_with_env(
         &[
             &"./x.py",
@@ -622,17 +637,7 @@ fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
             &"0",
             &"tests/assembly/asm",
             &"--rustc-args",
-            &format!(
-                r#"-Zpanic-abort-tests -Csymbol-mangling-version=v0 \
-                -Zcodegen-backend="{pwd}/target/{channel}/librustc_codegen_gcc.{dylib_ext}" \
-                --sysroot "{pwd}/build_sysroot/sysroot" -Cpanic=abort"#,
-                pwd = std::env::current_dir()
-                    .map_err(|error| format!("`current_dir` failed: {:?}", error))?
-                    .display(),
-                channel = args.config_info.channel.as_str(),
-                dylib_ext = args.config_info.dylib_ext,
-            )
-            .as_str(),
+            &rustc_args,
         ],
         Some(&rust_dir),
         Some(&env),
@@ -1065,12 +1070,15 @@ where
     println!("[TEST] rustc test suite");
     env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
     let rustc_args = format!(
-        "{} -Csymbol-mangling-version=v0 -Zcodegen-backend={} --sysroot {}",
+        "{} -Zcodegen-backend={} --sysroot {}",
         env.get("TEST_FLAGS").unwrap_or(&String::new()),
         args.config_info.cg_backend_path,
         args.config_info.sysroot_path,
     );
 
+    #[cfg(not(feature="master"))]
+    let rustc_args = format!("{} -Csymbol-mangling-version=v0", rustc_args);
+
     env.get_mut("RUSTFLAGS").unwrap().clear();
     run_command_with_output_and_env(
         &[
diff --git a/libgccjit.version b/libgccjit.version
index 3fc84f4ddd4e..281a3ef5fa65 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-2fc8940e1
+89a92e561
diff --git a/src/declare.rs b/src/declare.rs
index 247454fa58e1..5ed6739883d8 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -125,7 +125,9 @@ fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*ll
             let params: Vec<_> = param_types.into_iter().enumerate()
                 .map(|(index, param)| cx.context.new_parameter(None, *param, &format!("param{}", index))) // TODO(antoyo): set name.
                 .collect();
-            let func = cx.context.new_function(None, cx.linkage.get(), return_type, &params, mangle_name(name), variadic);
+            #[cfg(not(feature="master"))]
+            let name = mangle_name(name);
+            let func = cx.context.new_function(None, cx.linkage.get(), return_type, &params, &name, variadic);
             cx.functions.borrow_mut().insert(name.to_string(), func);
 
             #[cfg(feature="master")]
@@ -180,7 +182,8 @@ fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*ll
 
 // FIXME(antoyo): this is a hack because libgccjit currently only supports alpha, num and _.
 // Unsupported characters: `$` and `.`.
-pub fn mangle_name(name: &str) -> String {
+#[cfg(not(feature="master"))]
+fn mangle_name(name: &str) -> String {
     name.replace(|char: char| {
         if !char.is_alphanumeric() && char != '_' {
             debug_assert!("$.*".contains(char), "Unsupported char in function name {}: {}", name, char);
diff --git a/src/lib.rs b/src/lib.rs
index 5f8d00bb455e..943a71ed953b 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -255,6 +255,7 @@ fn new_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
     }
     #[cfg(feature="master")]
     {
+        context.set_allow_special_chars_in_func_names(true);
         let version = Version::get();
         let version = format!("{}.{}.{}", version.major, version.minor, version.patch);
         context.set_output_ident(&format!("rustc version {} with libgccjit {}",

From 6bdcc3c4c71dd63a28a9920be011c20df3099f62 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 17 Feb 2024 16:59:30 +0100
Subject: [PATCH 530/997] Move subtree part of Readme into its own doc file

---
 Readme.md      | 45 -------------------------------------------
 doc/subtree.md | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 52 insertions(+), 45 deletions(-)
 create mode 100644 doc/subtree.md

diff --git a/Readme.md b/Readme.md
index 5d960d0c2d60..dc9d0a4fd127 100644
--- a/Readme.md
+++ b/Readme.md
@@ -269,51 +269,6 @@ COLLECT_NO_DEMANGLE=1
  * Build the stage2 compiler (`rustup toolchain link debug-current build/x86_64-unknown-linux-gnu/stage2`).
  * Clean and rebuild the codegen with `debug-current` in the file `rust-toolchain`.
 
-### How to install a forked git-subtree
-
-Using git-subtree with `rustc` requires a patched git to make it work.
-The PR that is needed is [here](https://github.com/gitgitgadget/git/pull/493).
-Use the following instructions to install it:
-
-```bash
-git clone git@github.com:tqc/git.git
-cd git
-git checkout tqc/subtree
-make
-make install
-cd contrib/subtree
-make
-cp git-subtree ~/bin
-```
-
-Then, do a sync with this command:
-
-```bash
-PATH="$HOME/bin:$PATH" ~/bin/git-subtree push -P compiler/rustc_codegen_gcc/ ../rustc_codegen_gcc/ sync_branch_name
-cd ../rustc_codegen_gcc
-git checkout master
-git pull
-git checkout sync_branch_name
-git merge master
-```
-
-To send the changes to the rust repo:
-
-```bash
-cd ../rust
-git pull origin master
-git checkout -b subtree-update_cg_gcc_YYYY-MM-DD
-PATH="$HOME/bin:$PATH" ~/bin/git-subtree pull --prefix=compiler/rustc_codegen_gcc/ https://github.com/rust-lang/rustc_codegen_gcc.git master
-git push
-
-# Immediately merge the merge commit into cg_gcc to prevent merge conflicts when syncing from rust-lang/rust later.
-PATH="$HOME/bin:$PATH" ~/bin/git-subtree push -P compiler/rustc_codegen_gcc/ ../rustc_codegen_gcc/ sync_branch_name
-```
-
-TODO: write a script that does the above.
-
-https://rust-lang.zulipchat.com/#narrow/stream/301329-t-devtools/topic/subtree.20madness/near/258877725
-
 ### How to use [mem-trace](https://github.com/antoyo/mem-trace)
 
 `rustc` needs to be built without `jemalloc` so that `mem-trace` can overload `malloc` since `jemalloc` is linked statically, so a `LD_PRELOAD`-ed library won't a chance to intercept the calls to `malloc`.
diff --git a/doc/subtree.md b/doc/subtree.md
new file mode 100644
index 000000000000..5d7af2a066bd
--- /dev/null
+++ b/doc/subtree.md
@@ -0,0 +1,52 @@
+# git subtree sync
+
+`rustc_codegen_gcc` is a subtree of the rust compiler. As such, it needs to be
+sync from time to time to ensure changes that happened on their side are also
+included on our side.
+
+### How to install a forked git-subtree
+
+Using git-subtree with `rustc` requires a patched git to make it work.
+The PR that is needed is [here](https://github.com/gitgitgadget/git/pull/493).
+Use the following instructions to install it:
+
+```bash
+git clone git@github.com:tqc/git.git
+cd git
+git checkout tqc/subtree
+make
+make install
+cd contrib/subtree
+make
+cp git-subtree ~/bin
+```
+
+### Syncing with rust compiler
+
+Do a sync with this command:
+
+```bash
+PATH="$HOME/bin:$PATH" ~/bin/git-subtree push -P compiler/rustc_codegen_gcc/ ../rustc_codegen_gcc/ sync_branch_name
+cd ../rustc_codegen_gcc
+git checkout master
+git pull
+git checkout sync_branch_name
+git merge master
+```
+
+To send the changes to the rust repo:
+
+```bash
+cd ../rust
+git pull origin master
+git checkout -b subtree-update_cg_gcc_YYYY-MM-DD
+PATH="$HOME/bin:$PATH" ~/bin/git-subtree pull --prefix=compiler/rustc_codegen_gcc/ https://github.com/rust-lang/rustc_codegen_gcc.git master
+git push
+
+# Immediately merge the merge commit into cg_gcc to prevent merge conflicts when syncing from rust-lang/rust later.
+PATH="$HOME/bin:$PATH" ~/bin/git-subtree push -P compiler/rustc_codegen_gcc/ ../rustc_codegen_gcc/ sync_branch_name
+```
+
+TODO: write a script that does the above.
+
+https://rust-lang.zulipchat.com/#narrow/stream/301329-t-devtools/topic/subtree.20madness/near/258877725

From cb14f43de634d3f605559158b705e03e5537ba95 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 17 Feb 2024 17:04:32 +0100
Subject: [PATCH 531/997] Improve instructions to start working on the project

---
 Readme.md | 29 ++++++++++++++++++++---------
 1 file changed, 20 insertions(+), 9 deletions(-)

diff --git a/Readme.md b/Readme.md
index dc9d0a4fd127..2c6d21b3f960 100644
--- a/Readme.md
+++ b/Readme.md
@@ -17,6 +17,18 @@ A secondary goal is to check if using the gcc backend will provide any run-time
 **This requires a patched libgccjit in order to work.
 You need to use my [fork of gcc](https://github.com/antoyo/gcc) which already includes these patches.**
 
+```bash
+$ cp config.example.toml config.toml
+```
+
+If don't need to test GCC patches you wrote in our GCC fork, then the default configuration should
+be all you need. You can update the `rustc_codegen_gcc` without worrying about GCC.
+
+### Building with your own GCC version
+
+If you wrote a patch for GCC and want to test it without this backend, you will need
+to do a few more things.
+
 To build it (most of these instructions come from [here](https://gcc.gnu.org/onlinedocs/jit/internals/index.html), so don't hesitate to take a look there if you encounter an issue):
 
 ```bash
@@ -51,20 +63,19 @@ $ make check-jit RUNTESTFLAGS="-v -v -v jit.exp=jit.dg/test-asm.cc"
 
 **Put the path to your custom build of libgccjit in the file `config.toml`.**
 
-If you followed the instructions exactly as written (ie, you have created a `gcc-build` folder
-where gcc is built), the only thing you need to do is:
-
-```bash
-$ cp config.example.toml config.toml
-```
-
-But if you did something different, you also need to set the `gcc-path` value in `config.toml` with
-the result of this command:
+You now need to set the `gcc-path` value in `config.toml` with the result of this command:
 
 ```bash
 $ dirname $(readlink -f `find . -name libgccjit.so`)
 ```
 
+and to comment the `download-gccjit` setting:
+
+```toml
+gcc-path = "[MY PATH]"
+# download-gccjit = true
+```
+
 Then you can run commands like this:
 
 ```bash

From 79316d4e8313951ace166dd0c96108c3d9b70dab Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 17 Feb 2024 17:13:48 +0100
Subject: [PATCH 532/997] Split Readme even further

---
 Readme.md                  | 182 +++----------------------------------
 doc/debugging-gcc-lto.md   |   3 +
 doc/debugging-libgccjit.md |  74 +++++++++++++++
 doc/errors.md              |  27 ++++++
 doc/tips.md                |  72 +++++++++++++++
 5 files changed, 187 insertions(+), 171 deletions(-)
 create mode 100644 doc/debugging-gcc-lto.md
 create mode 100644 doc/debugging-libgccjit.md
 create mode 100644 doc/errors.md
 create mode 100644 doc/tips.md

diff --git a/Readme.md b/Readme.md
index 2c6d21b3f960..da6e91587fda 100644
--- a/Readme.md
+++ b/Readme.md
@@ -139,179 +139,19 @@ $ LIBRARY_PATH="[gcc-path value]" LD_LIBRARY_PATH="[gcc-path value]" rustc +$(ca
     <dd>Dump a C-like representation to /tmp/gccjit_dumps and enable debug info in order to debug this C-like representation.</dd>
 </dl>
 
+## Extra documentation
+
+More specific documentation is available in the [`doc`](./doc) folder:
+
+ * [Common errors](./doc/errors.md)
+ * [Debugging GCC LTO](./doc/debugging-gcc-lto.md)
+ * [Debugging libgccjit](./doc/debugging-libgccjit.md)
+ * [Git subtree sync](./doc/subtree.md)
+ * [List of useful commands](./doc/tips.md)
+ * [Send a patch to GCC](./doc/sending-gcc-patch.md)
+
 ## Licensing
 
 While this crate is licensed under a dual Apache/MIT license, it links to `libgccjit` which is under the GPLv3+ and thus, the resulting toolchain (rustc + GCC codegen) will need to be released under the GPL license.
 
 However, programs compiled with `rustc_codegen_gcc` do not need to be released under a GPL license.
-
-## Debugging
-
-Sometimes, libgccjit will crash and output an error like this:
-
-```
-during RTL pass: expand
-libgccjit.so: error: in expmed_mode_index, at expmed.h:249
-0x7f0da2e61a35 expmed_mode_index
-	../../../gcc/gcc/expmed.h:249
-0x7f0da2e61aa4 expmed_op_cost_ptr
-	../../../gcc/gcc/expmed.h:271
-0x7f0da2e620dc sdiv_cost_ptr
-	../../../gcc/gcc/expmed.h:540
-0x7f0da2e62129 sdiv_cost
-	../../../gcc/gcc/expmed.h:558
-0x7f0da2e73c12 expand_divmod(int, tree_code, machine_mode, rtx_def*, rtx_def*, rtx_def*, int)
-	../../../gcc/gcc/expmed.c:4335
-0x7f0da2ea1423 expand_expr_real_2(separate_ops*, rtx_def*, machine_mode, expand_modifier)
-	../../../gcc/gcc/expr.c:9240
-0x7f0da2cd1a1e expand_gimple_stmt_1
-	../../../gcc/gcc/cfgexpand.c:3796
-0x7f0da2cd1c30 expand_gimple_stmt
-	../../../gcc/gcc/cfgexpand.c:3857
-0x7f0da2cd90a9 expand_gimple_basic_block
-	../../../gcc/gcc/cfgexpand.c:5898
-0x7f0da2cdade8 execute
-	../../../gcc/gcc/cfgexpand.c:6582
-```
-
-To see the code which causes this error, call the following function:
-
-```c
-gcc_jit_context_dump_to_file(ctxt, "/tmp/output.c", 1 /* update_locations */)
-```
-
-This will create a C-like file and add the locations into the IR pointing to this C file.
-Then, rerun the program and it will output the location in the second line:
-
-```
-libgccjit.so: /tmp/something.c:61322:0: error: in expmed_mode_index, at expmed.h:249
-```
-
-Or add a breakpoint to `add_error` in gdb and print the line number using:
-
-```
-p loc->m_line
-p loc->m_filename->m_buffer
-```
-
-To print a debug representation of a tree:
-
-```c
-debug_tree(expr);
-```
-
-(defined in print-tree.h)
-
-To print a debug representation of a gimple struct:
-
-```c
-debug_gimple_stmt(gimple_struct)
-```
-
-To get the `rustc` command to run in `gdb`, add the `--verbose` flag to `cargo build`.
-
-To have the correct file paths in `gdb` instead of `/usr/src/debug/gcc/libstdc++-v3/libsupc++/eh_personality.cc`:
-
-Maybe by calling the following at the beginning of gdb:
-
-```
-set substitute-path /usr/src/debug/gcc /path/to/gcc-repo/gcc
-```
-
-TODO(antoyo): but that's not what I remember I was doing.
-
-### `failed to build archive` error
-
-When you get this error:
-
-```
-error: failed to build archive: failed to open object file: No such file or directory (os error 2)
-```
-
-That can be caused by the fact that you try to compile with `lto = "fat"`, but you didn't compile the sysroot with LTO.
-(Not sure if that's the reason since I cannot reproduce anymore. Maybe it happened when forgetting setting `FAT_LTO`.)
-
-### ld: cannot find crtbegin.o
-
-When compiling an executable with libgccijt, if setting the `*LIBRARY_PATH` variables to the install directory, you will get the following errors:
-
-```
-ld: cannot find crtbegin.o: No such file or directory
-ld: cannot find -lgcc: No such file or directory
-ld: cannot find -lgcc: No such file or directory
-libgccjit.so: error: error invoking gcc driver
-```
-
-To fix this, set the variables to `gcc-build/build/gcc`.
-
-### How to debug GCC LTO
-
-Run do the command with `-v -save-temps` and then extract the `lto1` line from the output and run that under the debugger.
-
-### How to send arguments to the GCC linker
-
-```
-CG_RUSTFLAGS="-Clink-args=-save-temps -v" ../y.sh cargo build
-```
-
-### How to see the personality functions in the asm dump
-
-```
-CG_RUSTFLAGS="-Clink-arg=-save-temps -v -Clink-arg=-dA" ../y.sh cargo build
-```
-
-### How to see the LLVM IR for a sysroot crate
-
-```
-cargo build -v --target x86_64-unknown-linux-gnu -Zbuild-std
-# Take the command from the output and add --emit=llvm-ir
-```
-
-### To prevent the linker from unmangling symbols
-
-Run with:
-
-```
-COLLECT_NO_DEMANGLE=1
-```
-
-### How to use a custom-build rustc
-
- * Build the stage2 compiler (`rustup toolchain link debug-current build/x86_64-unknown-linux-gnu/stage2`).
- * Clean and rebuild the codegen with `debug-current` in the file `rust-toolchain`.
-
-### How to use [mem-trace](https://github.com/antoyo/mem-trace)
-
-`rustc` needs to be built without `jemalloc` so that `mem-trace` can overload `malloc` since `jemalloc` is linked statically, so a `LD_PRELOAD`-ed library won't a chance to intercept the calls to `malloc`.
-
-### How to generate GIMPLE
-
-If you need to check what gccjit is generating (GIMPLE), then take a look at how to
-generate it in [gimple.md](./doc/gimple.md).
-
-### How to build a cross-compiling libgccjit
-
-#### Building libgccjit
-
- * Follow the instructions on [this repo](https://github.com/cross-cg-gcc-tools/cross-gcc).
-
-#### Configuring rustc_codegen_gcc
-
- * Run `./y.sh prepare --cross` so that the sysroot is patched for the cross-compiling case.
- * Set the path to the cross-compiling libgccjit in `gcc-path` (in `config.toml`).
- * Make sure you have the linker for your target (for instance `m68k-unknown-linux-gnu-gcc`) in your `$PATH`. Currently, the linker name is hardcoded as being `$TARGET-gcc`. Specify the target when building the sysroot: `./y.sh build --target-triple m68k-unknown-linux-gnu`.
- * Build your project by specifying the target: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../y.sh cargo build --target m68k-unknown-linux-gnu`.
-
-If the target is not yet supported by the Rust compiler, create a [target specification file](https://docs.rust-embedded.org/embedonomicon/custom-target.html) (note that the `arch` specified in this file must be supported by the rust compiler).
-Then, you can use it the following way:
-
- * Add the target specification file using `--target` as an **absolute** path to build the sysroot: `./y.sh build --target-triple m68k-unknown-linux-gnu --target $(pwd)/m68k-unknown-linux-gnu.json`
- * Build your project by specifying the target specification file: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../y.sh cargo build --target path/to/m68k-unknown-linux-gnu.json`.
-
-If you get the following error:
-
-```
-/usr/bin/ld: unrecognised emulation mode: m68kelf
-```
-
-Make sure you set `gcc-path` (in `config.toml`) to the install directory.
diff --git a/doc/debugging-gcc-lto.md b/doc/debugging-gcc-lto.md
new file mode 100644
index 000000000000..93b150d76865
--- /dev/null
+++ b/doc/debugging-gcc-lto.md
@@ -0,0 +1,3 @@
+# How to debug GCC LTO
+
+Run do the command with `-v -save-temps` and then extract the `lto1` line from the output and run that under the debugger.
diff --git a/doc/debugging-libgccjit.md b/doc/debugging-libgccjit.md
new file mode 100644
index 000000000000..be0ec83f7cdc
--- /dev/null
+++ b/doc/debugging-libgccjit.md
@@ -0,0 +1,74 @@
+# Debugging libgccjit
+
+Sometimes, libgccjit will crash and output an error like this:
+
+```
+during RTL pass: expand
+libgccjit.so: error: in expmed_mode_index, at expmed.h:249
+0x7f0da2e61a35 expmed_mode_index
+	../../../gcc/gcc/expmed.h:249
+0x7f0da2e61aa4 expmed_op_cost_ptr
+	../../../gcc/gcc/expmed.h:271
+0x7f0da2e620dc sdiv_cost_ptr
+	../../../gcc/gcc/expmed.h:540
+0x7f0da2e62129 sdiv_cost
+	../../../gcc/gcc/expmed.h:558
+0x7f0da2e73c12 expand_divmod(int, tree_code, machine_mode, rtx_def*, rtx_def*, rtx_def*, int)
+	../../../gcc/gcc/expmed.c:4335
+0x7f0da2ea1423 expand_expr_real_2(separate_ops*, rtx_def*, machine_mode, expand_modifier)
+	../../../gcc/gcc/expr.c:9240
+0x7f0da2cd1a1e expand_gimple_stmt_1
+	../../../gcc/gcc/cfgexpand.c:3796
+0x7f0da2cd1c30 expand_gimple_stmt
+	../../../gcc/gcc/cfgexpand.c:3857
+0x7f0da2cd90a9 expand_gimple_basic_block
+	../../../gcc/gcc/cfgexpand.c:5898
+0x7f0da2cdade8 execute
+	../../../gcc/gcc/cfgexpand.c:6582
+```
+
+To see the code which causes this error, call the following function:
+
+```c
+gcc_jit_context_dump_to_file(ctxt, "/tmp/output.c", 1 /* update_locations */)
+```
+
+This will create a C-like file and add the locations into the IR pointing to this C file.
+Then, rerun the program and it will output the location in the second line:
+
+```
+libgccjit.so: /tmp/something.c:61322:0: error: in expmed_mode_index, at expmed.h:249
+```
+
+Or add a breakpoint to `add_error` in gdb and print the line number using:
+
+```
+p loc->m_line
+p loc->m_filename->m_buffer
+```
+
+To print a debug representation of a tree:
+
+```c
+debug_tree(expr);
+```
+
+(defined in print-tree.h)
+
+To print a debug representation of a gimple struct:
+
+```c
+debug_gimple_stmt(gimple_struct)
+```
+
+To get the `rustc` command to run in `gdb`, add the `--verbose` flag to `cargo build`.
+
+To have the correct file paths in `gdb` instead of `/usr/src/debug/gcc/libstdc++-v3/libsupc++/eh_personality.cc`:
+
+Maybe by calling the following at the beginning of gdb:
+
+```
+set substitute-path /usr/src/debug/gcc /path/to/gcc-repo/gcc
+```
+
+TODO(antoyo): but that's not what I remember I was doing.
diff --git a/doc/errors.md b/doc/errors.md
new file mode 100644
index 000000000000..5727b0ff7c86
--- /dev/null
+++ b/doc/errors.md
@@ -0,0 +1,27 @@
+# Common errors
+
+This file lists errors that were encountered and how to fix them.
+
+### `failed to build archive` error
+
+When you get this error:
+
+```
+error: failed to build archive: failed to open object file: No such file or directory (os error 2)
+```
+
+That can be caused by the fact that you try to compile with `lto = "fat"`, but you didn't compile the sysroot with LTO.
+(Not sure if that's the reason since I cannot reproduce anymore. Maybe it happened when forgetting setting `FAT_LTO`.)
+
+### ld: cannot find crtbegin.o
+
+When compiling an executable with libgccijt, if setting the `*LIBRARY_PATH` variables to the install directory, you will get the following errors:
+
+```
+ld: cannot find crtbegin.o: No such file or directory
+ld: cannot find -lgcc: No such file or directory
+ld: cannot find -lgcc: No such file or directory
+libgccjit.so: error: error invoking gcc driver
+```
+
+To fix this, set the variables to `gcc-build/build/gcc`.
diff --git a/doc/tips.md b/doc/tips.md
new file mode 100644
index 000000000000..1379f5130be0
--- /dev/null
+++ b/doc/tips.md
@@ -0,0 +1,72 @@
+# Tips
+
+The following shows how to do different random small things we encountered and thought could
+be useful.
+
+### How to send arguments to the GCC linker
+
+```
+CG_RUSTFLAGS="-Clink-args=-save-temps -v" ../y.sh cargo build
+```
+
+### How to see the personality functions in the asm dump
+
+```
+CG_RUSTFLAGS="-Clink-arg=-save-temps -v -Clink-arg=-dA" ../y.sh cargo build
+```
+
+### How to see the LLVM IR for a sysroot crate
+
+```
+cargo build -v --target x86_64-unknown-linux-gnu -Zbuild-std
+# Take the command from the output and add --emit=llvm-ir
+```
+
+### To prevent the linker from unmangling symbols
+
+Run with:
+
+```
+COLLECT_NO_DEMANGLE=1
+```
+
+### How to use a custom-build rustc
+
+ * Build the stage2 compiler (`rustup toolchain link debug-current build/x86_64-unknown-linux-gnu/stage2`).
+ * Clean and rebuild the codegen with `debug-current` in the file `rust-toolchain`.
+
+### How to use [mem-trace](https://github.com/antoyo/mem-trace)
+
+`rustc` needs to be built without `jemalloc` so that `mem-trace` can overload `malloc` since `jemalloc` is linked statically, so a `LD_PRELOAD`-ed library won't a chance to intercept the calls to `malloc`.
+
+### How to generate GIMPLE
+
+If you need to check what gccjit is generating (GIMPLE), then take a look at how to
+generate it in [gimple.md](./doc/gimple.md).
+
+### How to build a cross-compiling libgccjit
+
+#### Building libgccjit
+
+ * Follow the instructions on [this repo](https://github.com/cross-cg-gcc-tools/cross-gcc).
+
+#### Configuring rustc_codegen_gcc
+
+ * Run `./y.sh prepare --cross` so that the sysroot is patched for the cross-compiling case.
+ * Set the path to the cross-compiling libgccjit in `gcc-path` (in `config.toml`).
+ * Make sure you have the linker for your target (for instance `m68k-unknown-linux-gnu-gcc`) in your `$PATH`. Currently, the linker name is hardcoded as being `$TARGET-gcc`. Specify the target when building the sysroot: `./y.sh build --target-triple m68k-unknown-linux-gnu`.
+ * Build your project by specifying the target: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../y.sh cargo build --target m68k-unknown-linux-gnu`.
+
+If the target is not yet supported by the Rust compiler, create a [target specification file](https://docs.rust-embedded.org/embedonomicon/custom-target.html) (note that the `arch` specified in this file must be supported by the rust compiler).
+Then, you can use it the following way:
+
+ * Add the target specification file using `--target` as an **absolute** path to build the sysroot: `./y.sh build --target-triple m68k-unknown-linux-gnu --target $(pwd)/m68k-unknown-linux-gnu.json`
+ * Build your project by specifying the target specification file: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../y.sh cargo build --target path/to/m68k-unknown-linux-gnu.json`.
+
+If you get the following error:
+
+```
+/usr/bin/ld: unrecognised emulation mode: m68kelf
+```
+
+Make sure you set `gcc-path` (in `config.toml`) to the install directory.

From 0a66c555bd4e8599e9710652509bfbdca366f36d Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 17 Feb 2024 20:04:17 +0100
Subject: [PATCH 533/997] Revert "Use shallow clone in test.rs to reduce
 cloning overhead"

---
 build_system/src/test.rs | 27 +--------------------------
 1 file changed, 1 insertion(+), 26 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 9fe9708c2917..d7f7a0eb47ef 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -499,42 +499,17 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
             &"clone",
             &"https://github.com/rust-lang/rust.git",
             &rust_dir_path,
-            &"--depth",
-            &"1",
         ],
         None,
         Some(env),
     );
     let rust_dir: Option<&Path> = Some(&rust_dir_path);
     run_command(&[&"git", &"checkout", &"--", &"tests/"], rust_dir)?;
+    run_command_with_output_and_env(&[&"git", &"fetch"], rust_dir, Some(env))?;
     let rustc_commit = match rustc_version_info(env.get("RUSTC").map(|s| s.as_str()))?.commit_hash {
         Some(commit_hash) => commit_hash,
         None => return Err("Couldn't retrieve rustc commit hash".to_string()),
     };
-    let has_commit = {
-        if let Ok(ty) = run_command_with_env(
-            &[&"git", &"cat-file", &"-t", &rustc_commit.as_str()],
-            rust_dir,
-            Some(env),
-        ) {
-            String::from_utf8_lossy(&ty.stdout).to_string() == "commit"
-        } else {
-            false
-        }
-    };
-    if !has_commit {
-        run_command_with_output_and_env(
-            &[
-                &"git",
-                &"fetch",
-                &"https://github.com/rust-lang/rust.git",
-                &rustc_commit.as_str(),
-                &"--depth=1",
-            ],
-            rust_dir,
-            Some(env),
-        )?
-    };
     if rustc_commit != "unknown" {
         run_command_with_output_and_env(
             &[&"git", &"checkout", &rustc_commit],

From e116cb7811510936c4386322cc27255bc97f656a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 15 Feb 2024 18:12:42 -0400
Subject: [PATCH 534/997] Fix to use the correct libgccjit for the CI where
 128-bit integers are disabled

---
 .github/workflows/ci.yml      | 24 ++++++++++++------------
 .github/workflows/stdarch.yml | 20 ++++++++++----------
 libgccjit.version             |  2 +-
 src/declare.rs                |  3 ++-
 4 files changed, 25 insertions(+), 24 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 37d2bc1c201a..ab704aa80a2b 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -19,8 +19,8 @@ jobs:
       fail-fast: false
       matrix:
         libgccjit_version:
-          - { gcc: "libgccjit.so", artifacts_branch: "master" }
-          - { gcc: "libgccjit_without_int128.so", artifacts_branch: "master-without-128bit-integers" }
+          - { gcc: "gcc-13.deb" }
+          - { gcc: "gcc-13-without-int128.deb" }
         commands: [
           "--mini-tests",
           "--std-tests",
@@ -49,10 +49,19 @@ jobs:
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
       run: sudo apt-get install ninja-build ripgrep llvm-14-tools
 
+    - name: Download artifact
+      run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/${{ matrix.libgccjit_version.gcc }}
+
+    - name: Setup path to libgccjit
+      run: |
+          sudo dpkg --force-overwrite -i ${{ matrix.libgccjit_version.gcc }}
+          echo 'gcc-path = "/usr/lib/"' > config.toml
+
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-        echo 'download-gccjit = true' > config.toml
+        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
 
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
@@ -67,15 +76,6 @@ jobs:
       run: |
         ./y.sh prepare --only-libcore
         ./y.sh build
-
-    - name: Set env (part 2)
-      run: |
-        # Set the `LD_LIBRARY_PATH` and `LIBRARY_PATH` env variables...
-        echo "LD_LIBRARY_PATH="$(./y.sh info | grep -v Using) >> $GITHUB_ENV
-        echo "LIBRARY_PATH="$(./y.sh info | grep -v Using) >> $GITHUB_ENV
-
-    - name: Build (part 2)
-      run: |
         cargo test
         ./y.sh clean all
 
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index fa40c1a2beab..41a9318007f1 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -50,24 +50,24 @@ jobs:
           sudo ln -s /usr/share/intel-sde/sde /usr/bin/sde
           sudo ln -s /usr/share/intel-sde/sde64 /usr/bin/sde64
 
-    - name: Download artifact
-      run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/gcc-13.deb
-
-    - name: Setup path to libgccjit
-      run: |
-          sudo dpkg --force-overwrite -i gcc-13.deb
-          echo 'gcc-path = "/usr/lib/"' > config.toml
-
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+        echo 'download-gccjit = true' > config.toml
 
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
         ./y.sh build --release --release-sysroot
+
+    - name: Set env (part 2)
+      run: |
+        # Set the `LD_LIBRARY_PATH` and `LIBRARY_PATH` env variables...
+        echo "LD_LIBRARY_PATH="$(./y.sh info | grep -v Using) >> $GITHUB_ENV
+        echo "LIBRARY_PATH="$(./y.sh info | grep -v Using) >> $GITHUB_ENV
+
+    - name: Build (part 2)
+      run: |
         cargo test
 
     - name: Clean
diff --git a/libgccjit.version b/libgccjit.version
index 281a3ef5fa65..12dafeb9edee 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-89a92e561
+cdd897840
diff --git a/src/declare.rs b/src/declare.rs
index 5ed6739883d8..72cba9fbba95 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -181,7 +181,8 @@ fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*ll
 }
 
 // FIXME(antoyo): this is a hack because libgccjit currently only supports alpha, num and _.
-// Unsupported characters: `$` and `.`.
+// Unsupported characters: `$`, `.` and `*`.
+// FIXME(antoyo): `*` might not be expected: https://github.com/rust-lang/rust/issues/116979#issuecomment-1840926865
 #[cfg(not(feature="master"))]
 fn mangle_name(name: &str) -> String {
     name.replace(|char: char| {

From 5ac9bee7f13c83123cc3d184f50a255248e640f2 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Sat, 17 Feb 2024 17:19:08 -0600
Subject: [PATCH 535/997] fix tests/ui/simd/issue-89193.rs and mark as passing

Work around an issue where usize and isize can sometimes (but not
always) get canonicalized to their corresponding integer type.  This
causes shuffle_vector to panic, since the types of the vectors it got
passed aren't the same.

Also insert a cast on the mask element, since we might get passed a
signed integer of any size, not just i32.  For now, we always cast to
i32.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 src/intrinsic/simd.rs      | 15 +++++++++++----
 tests/failing-ui-tests.txt |  1 -
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 5991f061c10c..33d659f251fe 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -710,7 +710,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         };
         let elem_type = vector_type.dyncast_vector().expect("vector type").get_element_type();
 
-        let mut values = vec![];
+        let mut values = Vec::with_capacity(in_len as usize);
         for i in 0..in_len {
             let index = bx.context.new_rvalue_from_long(bx.i32_type, i as i64);
             let int = bx.context.new_vector_access(None, pointers, index).to_rvalue();
@@ -723,19 +723,26 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
 
         let vector = bx.context.new_rvalue_from_vector(None, vector_type, &values);
 
-        let mut mask_types = vec![];
-        let mut mask_values = vec![];
+        let mut mask_types = Vec::with_capacity(in_len as usize);
+        let mut mask_values = Vec::with_capacity(in_len as usize);
         for i in 0..in_len {
             let index = bx.context.new_rvalue_from_long(bx.i32_type, i as i64);
             mask_types.push(bx.context.new_field(None, bx.i32_type, "m"));
             let mask_value = bx.context.new_vector_access(None, mask, index).to_rvalue();
-            let masked = bx.context.new_rvalue_from_int(bx.i32_type, in_len as i32) & mask_value;
+            let mask_value_cast = bx.context.new_cast(None, mask_value, bx.i32_type);
+            let masked = bx.context.new_rvalue_from_int(bx.i32_type, in_len as i32) & mask_value_cast;
             let value = index + masked;
             mask_values.push(value);
         }
         let mask_type = bx.context.new_struct_type(None, "mask_type", &mask_types);
         let mask = bx.context.new_struct_constructor(None, mask_type.as_type(), None, &mask_values);
 
+        // FIXME(antoyo): We sometimes need to bitcast here, since usize/isize sometimes (but not
+        // always) get canonicalized to their corresponding integer type (i.e. uint64_t/int64_t on
+        // 64-bit platforms).  This causes the shuffle_vector call below to panic, since the types
+        // of the two vectors aren't the same.  This is a workaround for now.
+        let vector = bx.bitcast_if_needed(vector, default.get_type());
+
         if invert {
             bx.shuffle_vector(vector, default, mask)
         } else {
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 023fe9d7e831..6e020e9b354d 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -48,7 +48,6 @@ tests/ui/rfcs/rfc-1857-stabilize-drop-order/drop-order.rs
 tests/ui/rfcs/rfc-2091-track-caller/std-panic-locations.rs
 tests/ui/simd/issue-17170.rs
 tests/ui/simd/issue-39720.rs
-tests/ui/simd/issue-89193.rs
 tests/ui/statics/issue-91050-1.rs
 tests/ui/statics/issue-91050-2.rs
 tests/ui/alloc-error/default-alloc-error-hook.rs

From 087456f1229998ff28cc25d8d849375f62c66d8e Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Sat, 17 Feb 2024 18:07:11 -0600
Subject: [PATCH 536/997] mark tests/ui/simd/issue-89193.rs as failing for
 libgccjit12

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 tests/failing-ui-tests12.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/failing-ui-tests12.txt b/tests/failing-ui-tests12.txt
index b4615b26852d..64f89b03eecc 100644
--- a/tests/failing-ui-tests12.txt
+++ b/tests/failing-ui-tests12.txt
@@ -33,6 +33,7 @@ tests/ui/coroutine/size-moved-locals.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-not-available-cases.rs
 tests/ui/simd/intrinsic/generic-gather-pass.rs
 tests/ui/simd/issue-85915-simd-ptrs.rs
+tests/ui/simd/issue-89193.rs
 tests/ui/issues/issue-68010-large-zst-consts.rs
 tests/ui/rust-2018/proc-macro-crate-in-paths.rs
 tests/ui/target-feature/missing-plusminus.rs

From 1f34c881e87969818cab379cd7ad9dd7d1bc2e3e Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sun, 18 Feb 2024 14:36:39 +0800
Subject: [PATCH 537/997] feat(Cargo.toml): Set `rustc_private` to `true` to
 allow lsp parsing

---
 Cargo.toml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Cargo.toml b/Cargo.toml
index 5e657c7c5395..85ad69e00fde 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -57,3 +57,6 @@ debug = false
 [profile.release.build-override]
 opt-level = 0
 debug = false
+
+[package.metadata.rust-analyzer]
+rustc_private = true
\ No newline at end of file

From 4ec4209ff5e41a986836d18718da5ab510390cf2 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Sun, 18 Feb 2024 12:40:20 -0600
Subject: [PATCH 538/997] use `default` as output type source in simd_gather

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 src/intrinsic/simd.rs | 20 ++------------------
 1 file changed, 2 insertions(+), 18 deletions(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 33d659f251fe..8599403c914c 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -697,18 +697,12 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         default: RValue<'gcc>,
         pointers: RValue<'gcc>,
         mask: RValue<'gcc>,
-        pointer_count: usize,
         bx: &mut Builder<'a, 'gcc, 'tcx>,
         in_len: u64,
-        underlying_ty: Ty<'tcx>,
         invert: bool,
     ) -> RValue<'gcc> {
-        let vector_type = if pointer_count > 1 {
-            bx.context.new_vector_type(bx.usize_type, in_len)
-        } else {
-            vector_ty(bx, underlying_ty, in_len)
-        };
-        let elem_type = vector_type.dyncast_vector().expect("vector type").get_element_type();
+        let vector_type = default.get_type();
+        let elem_type = vector_type.unqualified().dyncast_vector().expect("vector type").get_element_type();
 
         let mut values = Vec::with_capacity(in_len as usize);
         for i in 0..in_len {
@@ -737,12 +731,6 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         let mask_type = bx.context.new_struct_type(None, "mask_type", &mask_types);
         let mask = bx.context.new_struct_constructor(None, mask_type.as_type(), None, &mask_values);
 
-        // FIXME(antoyo): We sometimes need to bitcast here, since usize/isize sometimes (but not
-        // always) get canonicalized to their corresponding integer type (i.e. uint64_t/int64_t on
-        // 64-bit platforms).  This causes the shuffle_vector call below to panic, since the types
-        // of the two vectors aren't the same.  This is a workaround for now.
-        let vector = bx.bitcast_if_needed(vector, default.get_type());
-
         if invert {
             bx.shuffle_vector(vector, default, mask)
         } else {
@@ -865,10 +853,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             args[0].immediate(),
             args[1].immediate(),
             args[2].immediate(),
-            pointer_count,
             bx,
             in_len,
-            underlying_ty,
             false,
         ));
     }
@@ -983,10 +969,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             args[0].immediate(),
             args[1].immediate(),
             args[2].immediate(),
-            pointer_count,
             bx,
             in_len,
-            underlying_ty,
             true,
         );
 

From 6bbbf59951a6ef9f54f5f0e2849bba2ac53928a5 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 20 Feb 2024 10:23:05 -0500
Subject: [PATCH 539/997] Update to nightly-2024-02-20

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index 1962c217258a..cd278090924d 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2023-11-17"
+channel = "nightly-2024-02-20"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From c3d5b7fe3ba0c2b04fcd4a7d2ebdb1ab9e357b6e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 20 Feb 2024 10:35:56 -0500
Subject: [PATCH 540/997] Fix patches

---
 .../0022-core-Disable-not-compiling-tests.patch  |  4 +---
 .../0001-Disable-libstd-and-libtest-dylib.patch  | 16 ----------------
 2 files changed, 1 insertion(+), 19 deletions(-)

diff --git a/patches/0022-core-Disable-not-compiling-tests.patch b/patches/0022-core-Disable-not-compiling-tests.patch
index 4db56fa3bd2c..a7d523f94082 100644
--- a/patches/0022-core-Disable-not-compiling-tests.patch
+++ b/patches/0022-core-Disable-not-compiling-tests.patch
@@ -39,6 +39,4 @@ index 42a26ae..5ac1042 100644
 +#![cfg(test)]
  #![feature(alloc_layout_extra)]
  #![feature(array_chunks)]
- #![feature(array_methods)]
---
-2.21.0 (Apple Git-122)
+ #![feature(array_windows)]
diff --git a/patches/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch b/patches/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch
index 74d9c208a05a..c220f53040f0 100644
--- a/patches/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch
+++ b/patches/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch
@@ -21,19 +21,3 @@ index 5b21355..cb0c49b 100644
  
  [dependencies]
  alloc = { path = "../alloc", public = true }
-diff --git a/library/test/Cargo.toml b/library/test/Cargo.toml
-index 91a1abd..a58c160 100644
---- a/library/test/Cargo.toml
-+++ b/library/test/Cargo.toml
-@@ -4,7 +4,7 @@ version = "0.0.0"
- edition = "2021"
- 
- [lib]
--crate-type = ["dylib", "rlib"]
-+crate-type = ["rlib"]
- 
- [dependencies]
- getopts = { version = "0.2.21", features = ['rustc-dep-of-std'] }
--- 
-2.42.0
-

From e7b7c98e1c9628570bed2915e683ab298c59a0d6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 20 Feb 2024 11:08:45 -0500
Subject: [PATCH 541/997] Fix tests

---
 build_system/src/prepare.rs                   | 17 +-------
 .../0002-rand-Disable-failing-test.patch      | 32 ---------------
 tests/failing-lto-tests.txt                   | 16 +++++++-
 tests/failing-ui-tests.txt                    | 39 +++++++++++++++++++
 tests/failing-ui-tests12.txt                  |  4 ++
 5 files changed, 59 insertions(+), 49 deletions(-)
 delete mode 100644 patches/crate_patches/0002-rand-Disable-failing-test.patch

diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 1a3eb7d2e57b..66f440f53553 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -159,21 +159,6 @@ where
     let repo_path = Path::new(crate::BUILD_DIR).join(&clone_result.repo_name);
     run_command(&[&"git", &"checkout", &"--", &"."], Some(&repo_path))?;
     run_command(&[&"git", &"checkout", &checkout_commit], Some(&repo_path))?;
-    let filter = format!("-{}-", clone_result.repo_name);
-    walk_dir(
-        "patches/crate_patches",
-        |_| Ok(()),
-        |file_path| {
-            let patch = file_path.as_os_str().to_str().unwrap();
-            if patch.contains(&filter) && patch.ends_with(".patch") {
-                run_command_with_output(
-                    &[&"git", &"am", &file_path.canonicalize().unwrap()],
-                    Some(&repo_path),
-                )?;
-            }
-            Ok(())
-        },
-    )?;
     if let Some(extra) = extra {
         extra(&repo_path)?;
     }
@@ -238,7 +223,7 @@ pub fn run() -> Result<(), String> {
         let to_clone = &[
             (
                 "https://github.com/rust-random/rand.git",
-                "0f933f9c7176e53b2a3c7952ded484e1783f0bf1",
+                "1f4507a8e1cf8050e4ceef95eeda8f64645b6719",
                 None,
             ),
             (
diff --git a/patches/crate_patches/0002-rand-Disable-failing-test.patch b/patches/crate_patches/0002-rand-Disable-failing-test.patch
deleted file mode 100644
index 449ca5f6e29c..000000000000
--- a/patches/crate_patches/0002-rand-Disable-failing-test.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From a8fb97120d71252538b6b026695df40d02696bdb Mon Sep 17 00:00:00 2001
-From: bjorn3 <bjorn3@users.noreply.github.com>
-Date: Sat, 15 Aug 2020 20:04:38 +0200
-Subject: [PATCH] [rand] Disable failing test
-
----
- src/distributions/uniform.rs | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/src/distributions/uniform.rs b/src/distributions/uniform.rs
-index 480b859..c80bb6f 100644
---- a/src/distributions/uniform.rs
-+++ b/src/distributions/uniform.rs
-@@ -1085,7 +1085,7 @@ mod tests {
-             _ => panic!("`UniformDurationMode` was not serialized/deserialized correctly")
-         }
-     }
--    
-+
-     #[test]
-     #[cfg(feature = "serde1")]
-     fn test_uniform_serialization() {
-@@ -1314,6 +1314,7 @@ mod tests {
-         not(target_arch = "wasm32"),
-         not(target_arch = "asmjs")
-     ))]
-+    #[ignore] // FIXME
-     fn test_float_assertions() {
-         use super::SampleUniform;
-         use std::panic::catch_unwind;
--- 
-2.20.1
diff --git a/tests/failing-lto-tests.txt b/tests/failing-lto-tests.txt
index 2e0b6134070b..8de45ae0f28b 100644
--- a/tests/failing-lto-tests.txt
+++ b/tests/failing-lto-tests.txt
@@ -1,6 +1,6 @@
 tests/ui/lint/unsafe_code/forge_unsafe_block.rs
 tests/ui/lint/unused-qualification-in-derive-expansion.rs
-tests/ui/macro-quote-test.rs
+tests/ui/macros/macro-quote-test.rs
 tests/ui/macros/proc_macro.rs
 tests/ui/panic-runtime/lto-unwind.rs
 tests/ui/resolve/derive-macro-1.rs
@@ -21,3 +21,17 @@ tests/ui/fmt/format-args-capture-issue-106408.rs
 tests/ui/fmt/indoc-issue-106408.rs
 tests/ui/hygiene/issue-77523-def-site-async-await.rs
 tests/ui/inherent-impls-overlap-check/no-overlap.rs
+tests/ui/annotate-snippet/multispan.rs
+tests/ui/enum-discriminant/issue-46519.rs
+tests/ui/issues/issue-45731.rs
+tests/ui/lint/test-allow-dead-extern-static-no-warning.rs
+tests/ui/macros/macro-comma-behavior-rpass.rs
+tests/ui/macros/rfc-2011-nicer-assert-messages/assert-with-custom-errors-does-not-create-unnecessary-code.rs
+tests/ui/macros/rfc-2011-nicer-assert-messages/feature-gate-generic_assert.rs
+tests/ui/macros/stringify.rs
+tests/ui/panics/test-panic.rs
+tests/ui/panics/test-should-fail-bad-message.rs
+tests/ui/panics/test-should-panic-bad-message.rs
+tests/ui/panics/test-should-panic-no-message.rs
+tests/ui/reexport-test-harness-main.rs
+tests/ui/rfcs/rfc-1937-termination-trait/termination-trait-in-test.rs
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 6e020e9b354d..e504021bf2ad 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -69,3 +69,42 @@ tests/ui/async-await/deep-futures-are-freeze.rs
 tests/ui/closures/capture-unsized-by-ref.rs
 tests/ui/coroutine/resume-after-return.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs
+tests/ui/limits/issue-17913.rs
+tests/ui/limits/issue-55878.rs
+tests/ui/linkage-attr/common-linkage-non-zero-init.rs
+tests/ui/linkage-attr/linkage-detect-extern-generated-name-collision.rs
+tests/ui/numbers-arithmetic/divide-by-zero.rs
+tests/ui/numbers-arithmetic/mod-zero.rs
+tests/ui/numbers-arithmetic/overflowing-neg-nonzero.rs
+tests/ui/numbers-arithmetic/overflowing-neg.rs
+tests/ui/optimization-remark.rs
+tests/ui/panic-handler/panic-handler-std.rs
+tests/ui/panic-runtime/abort-link-to-unwind-dylib.rs
+tests/ui/panic-runtime/need-unwind-got-abort.rs
+tests/ui/panics/issue-47429-short-backtraces.rs
+tests/ui/panics/panic-in-cleanup.rs
+tests/ui/panics/panic-in-ffi.rs
+tests/ui/panics/runtime-switch.rs
+tests/ui/panics/short-ice-remove-middle-frames-2.rs
+tests/ui/panics/short-ice-remove-middle-frames.rs
+tests/ui/precondition-checks/out-of-bounds-get-unchecked.rs
+tests/ui/simd/masked-load-store.rs
+tests/ui/simd/repr_packed.rs
+tests/ui/type_length_limit.rs
+tests/ui/async-await/in-trait/dont-project-to-specializable-projection.rs
+tests/ui/async-await/issues/issue-65419/issue-65419-coroutine-resume-after-completion.rs
+tests/ui/c-variadic/issue-86053-1.rs
+tests/ui/const-ptr/out_of_bounds_read.rs
+tests/ui/consts/const_unsafe_unreachable_ub.rs
+tests/ui/consts/miri_unleashed/drop.rs
+tests/ui/consts/timeout.rs
+tests/ui/consts/try-operator.rs
+tests/ui/coroutine/coroutine-resume-after-panic.rs
+tests/ui/coroutine/unwind-abort-mix.rs
+tests/ui/duplicate/dupe-symbols-7.rs
+tests/ui/duplicate/dupe-symbols-8.rs
+tests/ui/hygiene/panic-location.rs
+tests/ui/invalid/issue-114435-layout-type-err.rs
+tests/ui/invalid-compile-flags/invalid-llvm-passes.rs
+tests/ui/lto/issue-105637.rs
+tests/ui/lto/lto-duplicate-symbols.rs
diff --git a/tests/failing-ui-tests12.txt b/tests/failing-ui-tests12.txt
index 64f89b03eecc..1d9bdaa552c6 100644
--- a/tests/failing-ui-tests12.txt
+++ b/tests/failing-ui-tests12.txt
@@ -42,3 +42,7 @@ tests/ui/codegen/issue-79865-llvm-miscompile.rs
 tests/ui/std-backtrace.rs
 tests/ui/mir/alignment/packed.rs
 tests/ui/intrinsics/intrinsics-integer.rs
+tests/ui/asm/x86_64/evex512-implicit-feature.rs
+tests/ui/packed/dyn-trait.rs
+tests/ui/packed/issue-118537-field-offset-ice.rs
+tests/ui/stable-mir-print/basic_function.rs

From b87de7325f60af4072f85ecb22b5b4582e51742b Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 21 Feb 2024 13:30:04 +0100
Subject: [PATCH 542/997] Correctly handle "master" feature

---
 build_system/src/build.rs  | 14 +++++++---
 build_system/src/config.rs | 10 +++++--
 build_system/src/test.rs   | 56 ++++++++++++++++++++------------------
 3 files changed, 46 insertions(+), 34 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 308ad3465494..7ec8b8de62a3 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -19,9 +19,6 @@ impl BuildArg {
 
         while let Some(arg) = args.next() {
             match arg.as_str() {
-                "--no-default-features" => {
-                    build_arg.flags.push("--no-default-features".to_string());
-                }
                 "--features" => {
                     if let Some(arg) = args.next() {
                         build_arg.flags.push("--features".to_string());
@@ -51,7 +48,6 @@ impl BuildArg {
             r#"
 `build` command help:
 
-    --no-default-features  : Add `--no-default-features` flag
     --features [arg]       : Add a new feature [arg]"#
         );
         ConfigInfo::show_usage();
@@ -111,6 +107,9 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         rustflags.push_str(" -Cpanic=abort -Zpanic-abort-tests");
     }
     rustflags.push_str(" -Z force-unstable-if-unmarked");
+    if config.no_default_features {
+        rustflags.push_str(" -Csymbol-mangling-version=v0");
+    }
     let mut env = env.clone();
     let channel = if config.sysroot_release_channel {
         env.insert(
@@ -193,6 +192,13 @@ fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
         args.config_info.gcc_path.clone(),
     );
 
+    if args.config_info.no_default_features {
+        env.insert(
+            "RUSTFLAGS".to_string(),
+            "-Csymbol-mangling-version=v0".to_string(),
+        );
+    }
+
     let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"rustc"];
     if args.config_info.channel == Channel::Release {
         command.push(&"--release");
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index ddfc0e4a925d..f6f039370180 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -127,6 +127,7 @@ pub struct ConfigInfo {
     // Needed for the `info` command which doesn't want to actually download the lib if needed,
     // just to set the `gcc_path` field to display it.
     pub no_download: bool,
+    pub no_default_features: bool,
 }
 
 impl ConfigInfo {
@@ -177,6 +178,7 @@ impl ConfigInfo {
                     return Err("Expected a value after `--cg_gcc-path`, found nothing".to_string())
                 }
             },
+            "--no-default-features" => self.no_default_features = true,
             _ => return Ok(false),
         }
         Ok(true)
@@ -416,8 +418,9 @@ impl ConfigInfo {
             rustflags.push(linker.to_string());
         }
 
-        #[cfg(not(feature="master"))]
-        rustflags.push("-Csymbol-mangling-version=v0".to_string());
+        if self.no_default_features {
+            rustflags.push("-Csymbol-mangling-version=v0".to_string());
+        }
 
         rustflags.extend_from_slice(&[
             "-Cdebuginfo=2".to_string(),
@@ -495,7 +498,8 @@ impl ConfigInfo {
     --sysroot-panic-abort  : Build the sysroot without unwinding support
     --config-file          : Location of the config file to be used
     --cg_gcc-path          : Location of the rustc_codegen_gcc root folder (used
-                             when ran from another directory)"
+                             when ran from another directory)
+    --no-default-features  : Add `--no-default-features` flag to cargo commands"
         );
     }
 }
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index ab65fed0f75a..17b1868502aa 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -90,7 +90,6 @@ fn show_usage() {
 
     --release              : Build codegen in release mode
     --sysroot-panic-abort  : Build the sysroot without unwinding support.
-    --no-default-features  : Add `--no-default-features` flag
     --features [arg]       : Add a new feature [arg]
     --use-system-gcc       : Use system installed libgccjit
     --build-only           : Only build rustc_codegen_gcc then exits
@@ -110,7 +109,6 @@ fn show_usage() {
 
 #[derive(Default, Debug)]
 struct TestArg {
-    no_default_features: bool,
     build_only: bool,
     use_system_gcc: bool,
     runners: BTreeSet<String>,
@@ -132,13 +130,6 @@ impl TestArg {
 
         while let Some(arg) = args.next() {
             match arg.as_str() {
-                "--no-default-features" => {
-                    // To prevent adding it more than once.
-                    if !test_arg.no_default_features {
-                        test_arg.flags.push("--no-default-features".into());
-                    }
-                    test_arg.no_default_features = true;
-                }
                 "--features" => match args.next() {
                     Some(feature) if !feature.is_empty() => {
                         test_arg
@@ -196,11 +187,14 @@ impl TestArg {
                 );
             }
         }
+        if test_arg.config_info.no_default_features {
+            test_arg.flags.push("--no-default-features".into());
+        }
         Ok(Some(test_arg))
     }
 
     pub fn is_using_gcc_master_branch(&self) -> bool {
-        !self.no_default_features
+        !self.config_info.no_default_features
     }
 }
 
@@ -612,20 +606,23 @@ fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
 
     env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
 
-    let rustc_args =
-        &format!(
-            r#"-Zpanic-abort-tests \
-            -Zcodegen-backend="{pwd}/target/{channel}/librustc_codegen_gcc.{dylib_ext}" \
-            --sysroot "{pwd}/build_sysroot/sysroot" -Cpanic=abort"#,
-            pwd = std::env::current_dir()
-                .map_err(|error| format!("`current_dir` failed: {:?}", error))?
-                .display(),
-            channel = args.config_info.channel.as_str(),
-            dylib_ext = args.config_info.dylib_ext,
-        );
+    let extra = if args.is_using_gcc_master_branch() {
+        ""
+    } else {
+        " -Csymbol-mangling-version=v0"
+    };
 
-    #[cfg(not(feature="master"))]
-    let rustc_args = format!("{} -Csymbol-mangling-version=v0", rustc_args);
+    let rustc_args = &format!(
+        r#"-Zpanic-abort-tests \
+            -Zcodegen-backend="{pwd}/target/{channel}/librustc_codegen_gcc.{dylib_ext}" \
+            --sysroot "{pwd}/build_sysroot/sysroot" -Cpanic=abort{extra}"#,
+        pwd = std::env::current_dir()
+            .map_err(|error| format!("`current_dir` failed: {:?}", error))?
+            .display(),
+        channel = args.config_info.channel.as_str(),
+        dylib_ext = args.config_info.dylib_ext,
+        extra = extra,
+    );
 
     run_command_with_env(
         &[
@@ -1069,16 +1066,21 @@ where
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[TEST] rustc test suite");
     env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
+
+    let extra = if args.is_using_gcc_master_branch() {
+        ""
+    } else {
+        " -Csymbol-mangling-version=v0"
+    };
+
     let rustc_args = format!(
-        "{} -Zcodegen-backend={} --sysroot {}",
+        "{} -Zcodegen-backend={} --sysroot {}{}",
         env.get("TEST_FLAGS").unwrap_or(&String::new()),
         args.config_info.cg_backend_path,
         args.config_info.sysroot_path,
+        extra,
     );
 
-    #[cfg(not(feature="master"))]
-    let rustc_args = format!("{} -Csymbol-mangling-version=v0", rustc_args);
-
     env.get_mut("RUSTFLAGS").unwrap().clear();
     run_command_with_output_and_env(
         &[

From d2210d497670be3fcf342277e3d95882bd9c2700 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 21 Feb 2024 14:42:24 +0100
Subject: [PATCH 543/997] Correctly pass `--no-default-features` when argument
 is passed

---
 build_system/src/build.rs | 34 +++++++++++-----------------------
 1 file changed, 11 insertions(+), 23 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 7ec8b8de62a3..e32971ca0c73 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -107,38 +107,26 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         rustflags.push_str(" -Cpanic=abort -Zpanic-abort-tests");
     }
     rustflags.push_str(" -Z force-unstable-if-unmarked");
+    let mut env = env.clone();
+
+    let mut args: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"build", &"--target", &config.target];
+
     if config.no_default_features {
         rustflags.push_str(" -Csymbol-mangling-version=v0");
+        args.push(&"--no-default-features");
     }
-    let mut env = env.clone();
+
     let channel = if config.sysroot_release_channel {
-        env.insert(
-            "RUSTFLAGS".to_string(),
-            format!("{} -Zmir-opt-level=3", rustflags),
-        );
-        run_command_with_output_and_env(
-            &[
-                &"cargo",
-                &"build",
-                &"--release",
-                &"--target",
-                &config.target,
-            ],
-            Some(start_dir),
-            Some(&env),
-        )?;
+        rustflags.push_str(" -Zmir-opt-level=3");
+        args.push(&"--release");
         "release"
     } else {
-        env.insert("RUSTFLAGS".to_string(), rustflags);
-
-        run_command_with_output_and_env(
-            &[&"cargo", &"build", &"--target", &config.target],
-            Some(start_dir),
-            Some(&env),
-        )?;
         "debug"
     };
 
+    env.insert("RUSTFLAGS".to_string(), rustflags);
+    run_command_with_output_and_env(&args, Some(start_dir), Some(&env))?;
+
     // Copy files to sysroot
     let sysroot_path = start_dir.join(format!("sysroot/lib/rustlib/{}/lib/", config.target_triple));
     fs::create_dir_all(&sysroot_path).map_err(|error| {

From 114c25feeb021fc3462056df2a06f715512e89e6 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 21 Feb 2024 14:58:04 +0100
Subject: [PATCH 544/997] Pass `--no-default-features` to codegen as well

---
 build_system/src/build.rs | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index e32971ca0c73..0eabd1d89729 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -195,6 +195,9 @@ fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     } else {
         env.insert("CHANNEL".to_string(), "debug".to_string());
     }
+    if args.config_info.no_default_features {
+        command.push(&"--no-default-features");
+    }
     let flags = args.flags.iter().map(|s| s.as_str()).collect::<Vec<_>>();
     for flag in &flags {
         command.push(flag);

From bb5b75f28dff36bb2ffded0ee3c3384745a1b3e1 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 23 Feb 2024 12:32:14 -0500
Subject: [PATCH 545/997] Update gcc version

---
 libgccjit.version | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libgccjit.version b/libgccjit.version
index 12dafeb9edee..20aebf091a70 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-cdd897840
+d24c8dae3

From c638defad75543fe2762a2afd34e4b7f97be5a35 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Fri, 23 Feb 2024 22:31:05 +0800
Subject: [PATCH 546/997] feat(debuginfo): Init Commit for debuginfo Support

TODO:
1. Add int.rs locations
2. Add demangling support
3. Add debug scope support
4. Add vtable support
5. Clean up builder.rs locations
---
 src/base.rs      |   4 +-
 src/builder.rs   | 362 ++++++++++++++++++++++++-----------------------
 src/context.rs   |   4 +-
 src/debuginfo.rs | 227 ++++++++++++++++++++++++++---
 src/int.rs       |  10 +-
 src/lib.rs       |   3 +-
 6 files changed, 398 insertions(+), 212 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index 773e234150d1..bcf467839a45 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -184,8 +184,8 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
             // wrapper here
             maybe_create_entry_wrapper::<Builder<'_, '_, '_>>(&cx);
 
-            // Finalize debuginfo
-            if cx.sess().opts.debuginfo != DebugInfo::None {
+            // FINALIZE debuginfo
+            if cx.sess().opts.debuginfo != DebugInfo::None  {
                 cx.debuginfo_finalize();
             }
         }
diff --git a/src/builder.rs b/src/builder.rs
index 56d9fd30bf67..fc4c4d86a7d6 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -4,16 +4,7 @@ use std::convert::TryFrom;
 use std::ops::Deref;
 
 use gccjit::{
-    BinaryOp,
-    Block,
-    ComparisonOp,
-    Context,
-    Function,
-    LValue,
-    RValue,
-    ToRValue,
-    Type,
-    UnaryOp,
+    BinaryOp, Block, ComparisonOp, Context, Function, LValue, Location, RValue, ToRValue, Type, UnaryOp
 };
 use rustc_apfloat::{ieee, Float, Round, Status};
 use rustc_codegen_ssa::MemFlags;
@@ -70,6 +61,7 @@ pub struct Builder<'a: 'gcc, 'gcc, 'tcx> {
     pub cx: &'a CodegenCx<'gcc, 'tcx>,
     pub block: Block<'gcc>,
     stack_var_count: Cell<usize>,
+    pub loc: Option<Location<'gcc>>,
 }
 
 impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
@@ -78,6 +70,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             cx,
             block,
             stack_var_count: Cell::new(0),
+            loc:None
         }
     }
 
@@ -93,14 +86,14 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 _ => order,
             };
         let previous_value = self.atomic_load(dst.get_type(), dst, load_ordering, Size::from_bytes(size));
-        let previous_var = func.new_local(None, previous_value.get_type(), "previous_value");
-        let return_value = func.new_local(None, previous_value.get_type(), "return_value");
-        self.llbb().add_assignment(None, previous_var, previous_value);
-        self.llbb().add_assignment(None, return_value, previous_var.to_rvalue());
+        let previous_var = func.new_local(self.loc, previous_value.get_type(), "previous_value");
+        let return_value = func.new_local(self.loc, previous_value.get_type(), "return_value");
+        self.llbb().add_assignment(self.loc, previous_var, previous_value);
+        self.llbb().add_assignment(self.loc, return_value, previous_var.to_rvalue());
 
         let while_block = func.new_block("while");
         let after_block = func.new_block("after_while");
-        self.llbb().end_with_jump(None, while_block);
+        self.llbb().end_with_jump(self.loc, while_block);
 
         // NOTE: since jumps were added and compare_exchange doesn't expect this, the current block in the
         // state need to be updated.
@@ -112,12 +105,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 ExtremumOperation::Min => ComparisonOp::GreaterThan,
             };
 
-        let cond1 = self.context.new_comparison(None, comparison_operator, previous_var.to_rvalue(), self.context.new_cast(None, src, previous_value.get_type()));
+        let cond1 = self.context.new_comparison(self.loc, comparison_operator, previous_var.to_rvalue(), self.context.new_cast(self.loc, src, previous_value.get_type()));
         let compare_exchange = self.compare_exchange(dst, previous_var, src, order, load_ordering, false);
-        let cond2 = self.cx.context.new_unary_op(None, UnaryOp::LogicalNegate, compare_exchange.get_type(), compare_exchange);
-        let cond = self.cx.context.new_binary_op(None, BinaryOp::LogicalAnd, self.cx.bool_type, cond1, cond2);
+        let cond2 = self.cx.context.new_unary_op(self.loc, UnaryOp::LogicalNegate, compare_exchange.get_type(), compare_exchange);
+        let cond = self.cx.context.new_binary_op(self.loc, BinaryOp::LogicalAnd, self.cx.bool_type, cond1, cond2);
 
-        while_block.end_with_conditional(None, cond, while_block, after_block);
+        while_block.end_with_conditional(self.loc, cond, while_block, after_block);
 
         // NOTE: since jumps were added in a place rustc does not expect, the current block in the
         // state need to be updated.
@@ -135,17 +128,17 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         let void_ptr_type = self.context.new_type::<*mut ()>();
         let volatile_void_ptr_type = void_ptr_type.make_volatile();
-        let dst = self.context.new_cast(None, dst, volatile_void_ptr_type);
-        let expected = self.context.new_cast(None, cmp.get_address(None), void_ptr_type);
+        let dst = self.context.new_cast(self.loc, dst, volatile_void_ptr_type);
+        let expected = self.context.new_cast(self.loc, cmp.get_address(self.loc), void_ptr_type);
 
         // NOTE: not sure why, but we have the wrong type here.
         let int_type = compare_exchange.get_param(2).to_rvalue().get_type();
-        let src = self.context.new_cast(None, src, int_type);
-        self.context.new_call(None, compare_exchange, &[dst, expected, src, weak, order, failure_order])
+        let src = self.context.new_cast(self.loc, src, int_type);
+        self.context.new_call(self.loc, compare_exchange, &[dst, expected, src, weak, order, failure_order])
     }
 
     pub fn assign(&self, lvalue: LValue<'gcc>, value: RValue<'gcc>) {
-        self.llbb().add_assignment(None, lvalue, value);
+        self.llbb().add_assignment(self.loc, lvalue, value);
     }
 
     fn check_call<'b>(&mut self, _typ: &str, func: Function<'gcc>, args: &'b [RValue<'gcc>]) -> Cow<'b, [RValue<'gcc>]> {
@@ -220,10 +213,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let actual_ty = actual_val.get_type();
                 if expected_ty != actual_ty {
                     if !actual_ty.is_vector() && !expected_ty.is_vector() && (actual_ty.is_integral() && expected_ty.is_integral()) || (actual_ty.get_pointee().is_some() && expected_ty.get_pointee().is_some()) {
-                        self.context.new_cast(None, actual_val, expected_ty)
+                        self.context.new_cast(self.loc, actual_val, expected_ty)
                     }
                     else if on_stack_param_indices.contains(&index) {
-                        actual_val.dereference(None).to_rvalue()
+                        actual_val.dereference(self.loc).to_rvalue()
                     }
                     else {
                         assert!(!((actual_ty.is_vector() && !expected_ty.is_vector()) || (!actual_ty.is_vector() && expected_ty.is_vector())), "{:?} ({}) -> {:?} ({}), index: {:?}[{}]", actual_ty, actual_ty.is_vector(), expected_ty, expected_ty.is_vector(), func_ptr, index);
@@ -268,12 +261,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let current_func = self.block.get_function();
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
-            let result = current_func.new_local(None, return_type, &format!("returnValue{}", unsafe { RETURN_VALUE_COUNT }));
-            self.block.add_assignment(None, result, self.cx.context.new_call(None, func, &args));
+            let result = current_func.new_local(self.loc, return_type, &format!("returnValue{}", unsafe { RETURN_VALUE_COUNT }));
+            self.block.add_assignment(self.loc, result, self.cx.context.new_call(self.loc, func, &args));
             result.to_rvalue()
         }
         else {
-            self.block.add_eval(None, self.cx.context.new_call(None, func, &args));
+            self.block.add_eval(self.loc, self.cx.context.new_call(self.loc, func, &args));
             // Return dummy value when not having return value.
             self.context.new_rvalue_from_long(self.isize_type, 0)
         }
@@ -286,7 +279,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 None => {
                     // NOTE: due to opaque pointers now being used, we need to cast here.
                     let new_func_type = typ.dyncast_function_ptr_type().expect("function ptr");
-                    func_ptr = self.context.new_cast(None, func_ptr, typ);
+                    func_ptr = self.context.new_cast(self.loc, func_ptr, typ);
                     new_func_type
                 },
             };
@@ -309,26 +302,26 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
-            let return_value = self.cx.context.new_call_through_ptr(None, func_ptr, &args);
+            let return_value = self.cx.context.new_call_through_ptr(self.loc, func_ptr, &args);
             let return_value = llvm::adjust_intrinsic_return_value(&self, return_value, &func_name, &args, args_adjusted, orig_args);
-            let result = current_func.new_local(None, return_value.get_type(), &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
-            self.block.add_assignment(None, result, return_value);
+            let result = current_func.new_local(self.loc, return_value.get_type(), &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
+            self.block.add_assignment(self.loc, result, return_value);
             result.to_rvalue()
         }
         else {
             #[cfg(not(feature="master"))]
             if gcc_func.get_param_count() == 0 {
                 // FIXME(antoyo): As a temporary workaround for unsupported LLVM intrinsics.
-                self.block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &[]));
+                self.block.add_eval(self.loc, self.cx.context.new_call_through_ptr(self.loc, func_ptr, &[]));
             }
             else {
-                self.block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
+                self.block.add_eval(self.loc, self.cx.context.new_call_through_ptr(self.loc, func_ptr, &args));
             }
             #[cfg(feature="master")]
-            self.block.add_eval(None, self.cx.context.new_call_through_ptr(None, func_ptr, &args));
+            self.block.add_eval(self.loc, self.cx.context.new_call_through_ptr(self.loc, func_ptr, &args));
             // Return dummy value when not having return value.
-            let result = current_func.new_local(None, self.isize_type, "dummyValueThatShouldNeverBeUsed");
-            self.block.add_assignment(None, result, self.context.new_rvalue_from_long(self.isize_type, 0));
+            let result = current_func.new_local(self.loc, self.isize_type, "dummyValueThatShouldNeverBeUsed");
+            self.block.add_assignment(self.loc, result, self.context.new_rvalue_from_long(self.isize_type, 0));
             result.to_rvalue()
         }
     }
@@ -340,8 +333,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let current_func = self.block.get_function();
         // TODO(antoyo): return the new_call() directly? Since the overflow function has no side-effects.
         unsafe { RETURN_VALUE_COUNT += 1 };
-        let result = current_func.new_local(None, return_type, &format!("overflowReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
-        self.block.add_assignment(None, result, self.cx.context.new_call(None, func, &args));
+        let result = current_func.new_local(self.loc, return_type, &format!("overflowReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
+        self.block.add_assignment(self.loc, result, self.cx.context.new_call(self.loc, func, &args));
         result.to_rvalue()
     }
 }
@@ -429,29 +422,29 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn ret_void(&mut self) {
-        self.llbb().end_with_void_return(None)
+        self.llbb().end_with_void_return(self.loc)
     }
 
     fn ret(&mut self, mut value: RValue<'gcc>) {
         if self.structs_as_pointer.borrow().contains(&value) {
             // NOTE: hack to workaround a limitation of the rustc API: see comment on
             // CodegenCx.structs_as_pointer
-            value = value.dereference(None).to_rvalue();
+            value = value.dereference(self.loc).to_rvalue();
         }
         let expected_return_type = self.current_func().get_return_type();
         if !expected_return_type.is_compatible_with(value.get_type()) {
             // NOTE: due to opaque pointers now being used, we need to cast here.
-            value = self.context.new_cast(None, value, expected_return_type);
+            value = self.context.new_cast(self.loc, value, expected_return_type);
         }
-        self.llbb().end_with_return(None, value);
+        self.llbb().end_with_return(self.loc, value);
     }
 
     fn br(&mut self, dest: Block<'gcc>) {
-        self.llbb().end_with_jump(None, dest)
+        self.llbb().end_with_jump(self.loc, dest)
     }
 
     fn cond_br(&mut self, cond: RValue<'gcc>, then_block: Block<'gcc>, else_block: Block<'gcc>) {
-        self.llbb().end_with_conditional(None, cond, then_block, else_block)
+        self.llbb().end_with_conditional(self.loc, cond, then_block, else_block)
     }
 
     fn switch(&mut self, value: RValue<'gcc>, default_block: Block<'gcc>, cases: impl ExactSizeIterator<Item = (u128, Block<'gcc>)>) {
@@ -461,7 +454,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             let on_val = self.const_uint_big(typ, on_val);
             gcc_cases.push(self.context.new_case(on_val, on_val, dest));
         }
-        self.block.end_with_switch(None, value, default_block, &gcc_cases);
+        self.block.end_with_switch(self.loc, value, default_block, &gcc_cases);
     }
 
     #[cfg(feature="master")]
@@ -474,20 +467,20 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.block = current_block;
 
         let return_value = self.current_func()
-            .new_local(None, call.get_type(), "invokeResult");
+            .new_local(self.loc, call.get_type(), "invokeResult");
 
-        try_block.add_assignment(None, return_value, call);
+        try_block.add_assignment(self.loc, return_value, call);
 
-        try_block.end_with_jump(None, then);
+        try_block.end_with_jump(self.loc, then);
 
         if self.cleanup_blocks.borrow().contains(&catch) {
-            self.block.add_try_finally(None, try_block, catch);
+            self.block.add_try_finally(self.loc, try_block, catch);
         }
         else {
-            self.block.add_try_catch(None, try_block, catch);
+            self.block.add_try_catch(self.loc, try_block, catch);
         }
 
-        self.block.end_with_jump(None, then);
+        self.block.end_with_jump(self.loc, then);
 
         return_value.to_rvalue()
     }
@@ -496,7 +489,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn invoke(&mut self, typ: Type<'gcc>, fn_attrs: Option<&CodegenFnAttrs>, fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
         let call_site = self.call(typ, fn_attrs, None, func, args, None);
         let condition = self.context.new_rvalue_from_int(self.bool_type, 1);
-        self.llbb().end_with_conditional(None, condition, then, catch);
+        self.llbb().end_with_conditional(self.loc, condition, then, catch);
         if let Some(_fn_abi) = fn_abi {
             // TODO(bjorn3): Apply function attributes
         }
@@ -505,16 +498,16 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn unreachable(&mut self) {
         let func = self.context.get_builtin_function("__builtin_unreachable");
-        self.block.add_eval(None, self.context.new_call(None, func, &[]));
+        self.block.add_eval(self.loc, self.context.new_call(self.loc, func, &[]));
         let return_type = self.block.get_function().get_return_type();
         let void_type = self.context.new_type::<()>();
         if return_type == void_type {
-            self.block.end_with_void_return(None)
+            self.block.end_with_void_return(self.loc)
         }
         else {
             let return_value = self.current_func()
-                .new_local(None, return_type, "unreachableReturn");
-            self.block.end_with_return(None, return_value)
+                .new_local(self.loc, return_type, "unreachableReturn");
+            self.block.end_with_return(self.loc, return_value)
         }
     }
 
@@ -539,7 +532,13 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn fmul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        a * b
+        let i=a * b;
+        if self.loc.is_some() {
+            unsafe{
+                i.set_location(self.loc.clone().unwrap());
+            }
+        }
+        i
     }
 
     fn udiv(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -564,7 +563,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // FIXME(antoyo): rustc_codegen_ssa::mir::intrinsic uses different types for a and b but they
         // should be the same.
         let typ = a.get_type().to_signed(self);
-        let b = self.context.new_cast(None, b, typ);
+        let b = self.context.new_cast(self.loc, b, typ);
         a / b
     }
 
@@ -611,7 +610,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         if a_type.is_compatible_with(self.cx.float_type) {
             let fmodf = self.context.get_builtin_function("fmodf");
             // FIXME(antoyo): this seems to produce the wrong result.
-            return self.context.new_call(None, fmodf, &[a, b]);
+            return self.context.new_call(self.loc, fmodf, &[a, b]);
         }
         else if let Some(vector_type) = a_type_unqualified.dyncast_vector() {
             assert_eq!(a_type_unqualified, b.get_type().unqualified());
@@ -626,12 +625,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
                 })
                 .collect();
 
-            return self.context.new_rvalue_from_vector(None, a_type, &new_elements)
+            return self.context.new_rvalue_from_vector(self.loc, a_type, &new_elements)
         }
         assert_eq!(a_type_unqualified, self.cx.double_type);
 
         let fmod = self.context.get_builtin_function("fmod");
-        return self.context.new_call(None, fmod, &[a, b]);
+        return self.context.new_call(self.loc, fmod, &[a, b]);
     }
 
     fn shl(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -665,7 +664,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn fneg(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        self.cx.context.new_unary_op(None, UnaryOp::Minus, a.get_type(), a)
+        self.cx.context.new_unary_op(self.loc, UnaryOp::Minus, a.get_type(), a)
     }
 
     fn not(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
@@ -738,7 +737,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             };
         // TODO(antoyo): It might be better to return a LValue, but fixing the rustc API is non-trivial.
         self.stack_var_count.set(self.stack_var_count.get() + 1);
-        self.current_func().new_local(None, aligned_type, &format!("stack_var_{}", self.stack_var_count.get())).get_address(None)
+        self.current_func().new_local(self.loc, aligned_type, &format!("stack_var_{}", self.stack_var_count.get())).get_address(self.loc)
     }
 
     fn byte_array_alloca(&mut self, _len: RValue<'gcc>, _align: Align) -> RValue<'gcc> {
@@ -760,17 +759,17 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             else {
                 pointee_ty.get_aligned(align.bytes())
             };
-        let ptr = self.context.new_cast(None, ptr, aligned_type.make_pointer());
-        let deref = ptr.dereference(None).to_rvalue();
+        let ptr = self.context.new_cast(self.loc, ptr, aligned_type.make_pointer());
+        let deref = ptr.dereference(self.loc).to_rvalue();
         unsafe { RETURN_VALUE_COUNT += 1 };
-        let loaded_value = function.new_local(None, aligned_type, &format!("loadedValue{}", unsafe { RETURN_VALUE_COUNT }));
-        block.add_assignment(None, loaded_value, deref);
+        let loaded_value = function.new_local(self.loc, aligned_type, &format!("loadedValue{}", unsafe { RETURN_VALUE_COUNT }));
+        block.add_assignment(self.loc, loaded_value, deref);
         loaded_value.to_rvalue()
     }
 
     fn volatile_load(&mut self, ty: Type<'gcc>, ptr: RValue<'gcc>) -> RValue<'gcc> {
-        let ptr = self.context.new_cast(None, ptr, ty.make_volatile().make_pointer());
-        ptr.dereference(None).to_rvalue()
+        let ptr = self.context.new_cast(self.loc, ptr, ty.make_volatile().make_pointer());
+        ptr.dereference(self.loc).to_rvalue()
     }
 
     fn atomic_load(&mut self, _ty: Type<'gcc>, ptr: RValue<'gcc>, order: AtomicOrdering, size: Size) -> RValue<'gcc> {
@@ -783,8 +782,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             .make_const()
             .make_volatile()
             .make_pointer();
-        let ptr = self.context.new_cast(None, ptr, volatile_const_void_ptr_type);
-        self.context.new_call(None, atomic_load, &[ptr, ordering])
+        let ptr = self.context.new_cast(self.loc, ptr, volatile_const_void_ptr_type);
+        self.context.new_call(self.loc, atomic_load, &[ptr, ordering])
     }
 
     fn load_operand(&mut self, place: PlaceRef<'tcx, RValue<'gcc>>) -> OperandRef<'tcx, RValue<'gcc>> {
@@ -859,7 +858,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let next_bb = self.append_sibling_block("repeat_loop_next");
 
         let ptr_type = start.get_type();
-        let current = self.llbb().get_function().new_local(None, ptr_type, "loop_var");
+        let current = self.llbb().get_function().new_local(self.loc, ptr_type, "loop_var");
         let current_val = current.to_rvalue();
         self.assign(current, start);
 
@@ -874,7 +873,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         cg_elem.val.store(self, PlaceRef::new_sized_aligned(current_val, cg_elem.layout, align));
 
         let next = self.inbounds_gep(self.backend_type(cg_elem.layout), current.to_rvalue(), &[self.const_usize(1)]);
-        self.llbb().add_assignment(None, current, next);
+        self.llbb().add_assignment(self.loc, current, next);
         self.br(header_bb);
 
         self.switch_to_block(next_bb);
@@ -894,14 +893,14 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn store_with_flags(&mut self, val: RValue<'gcc>, ptr: RValue<'gcc>, align: Align, _flags: MemFlags) -> RValue<'gcc> {
         let ptr = self.check_store(val, ptr);
-        let destination = ptr.dereference(None);
+        let destination = ptr.dereference(self.loc);
         // NOTE: libgccjit does not support specifying the alignment on the assignment, so we cast
         // to type so it gets the proper alignment.
         let destination_type = destination.to_rvalue().get_type().unqualified();
         let aligned_type = destination_type.get_aligned(align.bytes()).make_pointer();
-        let aligned_destination = self.cx.context.new_bitcast(None, ptr, aligned_type);
-        let aligned_destination = aligned_destination.dereference(None);
-        self.llbb().add_assignment(None, aligned_destination, val);
+        let aligned_destination = self.cx.context.new_bitcast(self.loc, ptr, aligned_type);
+        let aligned_destination = aligned_destination.dereference(self.loc);
+        self.llbb().add_assignment(self.loc, aligned_destination, val);
         // TODO(antoyo): handle align and flags.
         // NOTE: dummy value here since it's never used. FIXME(antoyo): API should not return a value here?
         self.cx.context.new_rvalue_zero(self.type_i32())
@@ -914,26 +913,26 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let volatile_const_void_ptr_type = self.context.new_type::<()>()
             .make_volatile()
             .make_pointer();
-        let ptr = self.context.new_cast(None, ptr, volatile_const_void_ptr_type);
+        let ptr = self.context.new_cast(self.loc, ptr, volatile_const_void_ptr_type);
 
         // FIXME(antoyo): fix libgccjit to allow comparing an integer type with an aligned integer type because
         // the following cast is required to avoid this error:
         // gcc_jit_context_new_call: mismatching types for argument 2 of function "__atomic_store_4": assignment to param arg1 (type: int) from loadedValue3577 (type: unsigned int  __attribute__((aligned(4))))
         let int_type = atomic_store.get_param(1).to_rvalue().get_type();
-        let value = self.context.new_cast(None, value, int_type);
+        let value = self.context.new_cast(self.loc, value, int_type);
         self.llbb()
-            .add_eval(None, self.context.new_call(None, atomic_store, &[ptr, value, ordering]));
+            .add_eval(self.loc, self.context.new_call(self.loc, atomic_store, &[ptr, value, ordering]));
     }
 
     fn gep(&mut self, typ: Type<'gcc>, ptr: RValue<'gcc>, indices: &[RValue<'gcc>]) -> RValue<'gcc> {
         // NOTE: due to opaque pointers now being used, we need to cast here.
-        let ptr = self.context.new_cast(None, ptr, typ.make_pointer());
+        let ptr = self.context.new_cast(self.loc, ptr, typ.make_pointer());
         let ptr_type = ptr.get_type();
         let mut pointee_type = ptr.get_type();
         // NOTE: we cannot use array indexing here like in inbounds_gep because array indexing is
         // always considered in bounds in GCC (TODO(antoyo): to be verified).
         // So, we have to cast to a number.
-        let mut result = self.context.new_bitcast(None, ptr, self.sizet_type);
+        let mut result = self.context.new_bitcast(self.loc, ptr, self.sizet_type);
         // FIXME(antoyo): if there were more than 1 index, this code is probably wrong and would
         // require dereferencing the pointer.
         for index in indices {
@@ -941,49 +940,49 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             #[cfg(feature="master")]
             let pointee_size = {
                 let size = self.cx.context.new_sizeof(pointee_type);
-                self.context.new_cast(None, size, index.get_type())
+                self.context.new_cast(self.loc, size, index.get_type())
             };
             #[cfg(not(feature="master"))]
             let pointee_size = self.context.new_rvalue_from_int(index.get_type(), pointee_type.get_size() as i32);
             result = result + self.gcc_int_cast(*index * pointee_size, self.sizet_type);
         }
-        self.context.new_bitcast(None, result, ptr_type)
+        self.context.new_bitcast(self.loc, result, ptr_type)
     }
 
     fn inbounds_gep(&mut self, typ: Type<'gcc>, ptr: RValue<'gcc>, indices: &[RValue<'gcc>]) -> RValue<'gcc> {
         // NOTE: due to opaque pointers now being used, we need to cast here.
-        let ptr = self.context.new_cast(None, ptr, typ.make_pointer());
+        let ptr = self.context.new_cast(self.loc, ptr, typ.make_pointer());
         // NOTE: array indexing is always considered in bounds in GCC (TODO(antoyo): to be verified).
         let mut indices = indices.into_iter();
         let index = indices.next().expect("first index in inbounds_gep");
-        let mut result = self.context.new_array_access(None, ptr, *index);
+        let mut result = self.context.new_array_access(self.loc, ptr, *index);
         for index in indices {
-            result = self.context.new_array_access(None, result, *index);
+            result = self.context.new_array_access(self.loc, result, *index);
         }
-        result.get_address(None)
+        result.get_address(self.loc)
     }
 
     fn struct_gep(&mut self, value_type: Type<'gcc>, ptr: RValue<'gcc>, idx: u64) -> RValue<'gcc> {
         // FIXME(antoyo): it would be better if the API only called this on struct, not on arrays.
         assert_eq!(idx as usize as u64, idx);
-        let value = ptr.dereference(None).to_rvalue();
+        let value = ptr.dereference(self.loc).to_rvalue();
 
         if value_type.dyncast_array().is_some() {
             let index = self.context.new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
-            let element = self.context.new_array_access(None, value, index);
-            element.get_address(None)
+            let element = self.context.new_array_access(self.loc, value, index);
+            element.get_address(self.loc)
         }
         else if let Some(vector_type) = value_type.dyncast_vector() {
             let array_type = vector_type.get_element_type().make_pointer();
             let array = self.bitcast(ptr, array_type);
             let index = self.context.new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
-            let element = self.context.new_array_access(None, array, index);
-            element.get_address(None)
+            let element = self.context.new_array_access(self.loc, array, index);
+            element.get_address(self.loc)
         }
         else if let Some(struct_type) = value_type.is_struct() {
             // NOTE: due to opaque pointers now being used, we need to bitcast here.
             let ptr = self.bitcast_if_needed(ptr, value_type.make_pointer());
-            ptr.dereference_field(None, struct_type.get_field(idx as i32)).get_address(None)
+            ptr.dereference_field(self.loc, struct_type.get_field(idx as i32)).get_address(self.loc)
         }
         else {
             panic!("Unexpected type {:?}", value_type);
@@ -1002,7 +1001,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             // TODO(antoyo): nothing to do as it is only for LLVM?
             return value;
         }
-        self.context.new_cast(None, value, dest_ty)
+        self.context.new_cast(self.loc, value, dest_ty)
     }
 
     fn fptoui(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
@@ -1023,11 +1022,11 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn fptrunc(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): make sure it truncates.
-        self.context.new_cast(None, value, dest_ty)
+        self.context.new_cast(self.loc, value, dest_ty)
     }
 
     fn fpext(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.context.new_cast(None, value, dest_ty)
+        self.context.new_cast(self.loc, value, dest_ty)
     }
 
     fn ptrtoint(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
@@ -1055,13 +1054,13 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             (false, true) => {
                 // NOTE: Projecting a field of a pointer type will attempt a cast from a signed char to
                 // a pointer, which is not supported by gccjit.
-                return self.cx.context.new_cast(None, self.inttoptr(value, val_type.make_pointer()), dest_ty);
+                return self.cx.context.new_cast(self.loc, self.inttoptr(value, val_type.make_pointer()), dest_ty);
             },
             (false, false) => {
                 // When they are not pointers, we want a transmute (or reinterpret_cast).
                 self.bitcast(value, dest_ty)
             },
-            (true, true) => self.cx.context.new_cast(None, value, dest_ty),
+            (true, true) => self.cx.context.new_cast(self.loc, value, dest_ty),
             (true, false) => unimplemented!(),
         }
     }
@@ -1072,7 +1071,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn fcmp(&mut self, op: RealPredicate, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
-        self.context.new_comparison(None, op.to_gcc_comparison(), lhs, rhs)
+        self.context.new_comparison(self.loc, op.to_gcc_comparison(), lhs, rhs)
     }
 
     /* Miscellaneous instructions */
@@ -1084,7 +1083,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let src = self.pointercast(src, self.type_ptr_to(self.type_void()));
         let memcpy = self.context.get_builtin_function("memcpy");
         // TODO(antoyo): handle aligns and is_volatile.
-        self.block.add_eval(None, self.context.new_call(None, memcpy, &[dst, src, size]));
+        self.block.add_eval(self.loc, self.context.new_call(self.loc, memcpy, &[dst, src, size]));
     }
 
     fn memmove(&mut self, dst: RValue<'gcc>, dst_align: Align, src: RValue<'gcc>, src_align: Align, size: RValue<'gcc>, flags: MemFlags) {
@@ -1102,7 +1101,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         let memmove = self.context.get_builtin_function("memmove");
         // TODO(antoyo): handle is_volatile.
-        self.block.add_eval(None, self.context.new_call(None, memmove, &[dst, src, size]));
+        self.block.add_eval(self.loc, self.context.new_call(self.loc, memmove, &[dst, src, size]));
     }
 
     fn memset(&mut self, ptr: RValue<'gcc>, fill_byte: RValue<'gcc>, size: RValue<'gcc>, _align: Align, flags: MemFlags) {
@@ -1110,27 +1109,27 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let ptr = self.pointercast(ptr, self.type_i8p());
         let memset = self.context.get_builtin_function("memset");
         // TODO(antoyo): handle align and is_volatile.
-        let fill_byte = self.context.new_cast(None, fill_byte, self.i32_type);
+        let fill_byte = self.context.new_cast(self.loc, fill_byte, self.i32_type);
         let size = self.intcast(size, self.type_size_t(), false);
-        self.block.add_eval(None, self.context.new_call(None, memset, &[ptr, fill_byte, size]));
+        self.block.add_eval(self.loc, self.context.new_call(self.loc, memset, &[ptr, fill_byte, size]));
     }
 
     fn select(&mut self, cond: RValue<'gcc>, then_val: RValue<'gcc>, mut else_val: RValue<'gcc>) -> RValue<'gcc> {
         let func = self.current_func();
-        let variable = func.new_local(None, then_val.get_type(), "selectVar");
+        let variable = func.new_local(self.loc, then_val.get_type(), "selectVar");
         let then_block = func.new_block("then");
         let else_block = func.new_block("else");
         let after_block = func.new_block("after");
-        self.llbb().end_with_conditional(None, cond, then_block, else_block);
+        self.llbb().end_with_conditional(self.loc, cond, then_block, else_block);
 
-        then_block.add_assignment(None, variable, then_val);
-        then_block.end_with_jump(None, after_block);
+        then_block.add_assignment(self.loc, variable, then_val);
+        then_block.end_with_jump(self.loc, after_block);
 
         if !then_val.get_type().is_compatible_with(else_val.get_type()) {
-            else_val = self.context.new_cast(None, else_val, then_val.get_type());
+            else_val = self.context.new_cast(self.loc, else_val, then_val.get_type());
         }
-        else_block.add_assignment(None, variable, else_val);
-        else_block.end_with_jump(None, after_block);
+        else_block.add_assignment(self.loc, variable, else_val);
+        else_block.end_with_jump(self.loc, after_block);
 
         // NOTE: since jumps were added in a place rustc does not expect, the current block in the
         // state need to be updated.
@@ -1146,7 +1145,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     #[cfg(feature="master")]
     fn extract_element(&mut self, vec: RValue<'gcc>, idx: RValue<'gcc>) -> RValue<'gcc> {
-        self.context.new_vector_access(None, vec, idx).to_rvalue()
+        self.context.new_vector_access(self.loc, vec, idx).to_rvalue()
     }
 
     #[cfg(not(feature="master"))]
@@ -1154,9 +1153,9 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let vector_type = vec.get_type().unqualified().dyncast_vector().expect("Called extract_element on a non-vector type");
         let element_type = vector_type.get_element_type();
         let vec_num_units = vector_type.get_num_units();
-        let array_type = self.context.new_array_type(None, element_type, vec_num_units as u64);
-        let array = self.context.new_bitcast(None, vec, array_type).to_rvalue();
-        self.context.new_array_access(None, array, idx).to_rvalue()
+        let array_type = self.context.new_array_type(self.loc, element_type, vec_num_units as u64);
+        let array = self.context.new_bitcast(self.loc, vec, array_type).to_rvalue();
+        self.context.new_array_access(self.loc, array, idx).to_rvalue()
     }
 
     fn vector_splat(&mut self, _num_elts: usize, _elt: RValue<'gcc>) -> RValue<'gcc> {
@@ -1170,8 +1169,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         if value_type.dyncast_array().is_some() {
             let index = self.context.new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
-            let element = self.context.new_array_access(None, aggregate_value, index);
-            element.get_address(None)
+            let element = self.context.new_array_access(self.loc, aggregate_value, index);
+            element.get_address(self.loc)
         }
         else if value_type.dyncast_vector().is_some() {
             panic!();
@@ -1180,14 +1179,14 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             if let Some(struct_type) = pointer_type.is_struct() {
                 // NOTE: hack to workaround a limitation of the rustc API: see comment on
                 // CodegenCx.structs_as_pointer
-                aggregate_value.dereference_field(None, struct_type.get_field(idx as i32)).to_rvalue()
+                aggregate_value.dereference_field(self.loc, struct_type.get_field(idx as i32)).to_rvalue()
             }
             else {
                 panic!("Unexpected type {:?}", value_type);
             }
         }
         else if let Some(struct_type) = value_type.is_struct() {
-            aggregate_value.access_field(None, struct_type.get_field(idx as i32)).to_rvalue()
+            aggregate_value.access_field(self.loc, struct_type.get_field(idx as i32)).to_rvalue()
         }
         else {
             panic!("Unexpected type {:?}", value_type);
@@ -1202,7 +1201,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let lvalue =
             if value_type.dyncast_array().is_some() {
                 let index = self.context.new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
-                self.context.new_array_access(None, aggregate_value, index)
+                self.context.new_array_access(self.loc, aggregate_value, index)
             }
             else if value_type.dyncast_vector().is_some() {
                 panic!();
@@ -1211,7 +1210,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
                 if let Some(struct_type) = pointer_type.is_struct() {
                     // NOTE: hack to workaround a limitation of the rustc API: see comment on
                     // CodegenCx.structs_as_pointer
-                    aggregate_value.dereference_field(None, struct_type.get_field(idx as i32))
+                    aggregate_value.dereference_field(self.loc, struct_type.get_field(idx as i32))
                 }
                 else {
                     panic!("Unexpected type {:?}", value_type);
@@ -1225,13 +1224,13 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let value =
             // NOTE: sometimes, rustc will create a value with the wrong type.
             if lvalue_type != value.get_type() {
-                self.context.new_cast(None, value, lvalue_type)
+                self.context.new_cast(self.loc, value, lvalue_type)
             }
             else {
                 value
             };
 
-        self.llbb().add_assignment(None, lvalue, value);
+        self.llbb().add_assignment(self.loc, lvalue, value);
 
         aggregate_value
     }
@@ -1254,10 +1253,10 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         let eh_pointer_builtin = self.cx.context.get_target_builtin_function("__builtin_eh_pointer");
         let zero = self.cx.context.new_rvalue_zero(self.int_type);
-        let ptr = self.cx.context.new_call(None, eh_pointer_builtin, &[zero]);
+        let ptr = self.cx.context.new_call(self.loc, eh_pointer_builtin, &[zero]);
 
         let value1_type = self.u8_type.make_pointer();
-        let ptr = self.cx.context.new_cast(None, ptr, value1_type);
+        let ptr = self.cx.context.new_cast(self.loc, ptr, value1_type);
         let value1 = ptr;
         let value2 = zero; // TODO(antoyo): set the proper value here (the type of exception?).
 
@@ -1266,9 +1265,9 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     #[cfg(not(feature="master"))]
     fn cleanup_landing_pad(&mut self, _pers_fn: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
-        let value1 = self.current_func().new_local(None, self.u8_type.make_pointer(), "landing_pad0")
+        let value1 = self.current_func().new_local(self.loc, self.u8_type.make_pointer(), "landing_pad0")
                 .to_rvalue();
-        let value2 = self.current_func().new_local(None, self.i32_type, "landing_pad1").to_rvalue();
+        let value2 = self.current_func().new_local(self.loc, self.i32_type, "landing_pad1").to_rvalue();
         (value1, value2)
     }
 
@@ -1280,9 +1279,9 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     #[cfg(feature="master")]
     fn resume(&mut self, exn0: RValue<'gcc>, _exn1: RValue<'gcc>) {
         let exn_type = exn0.get_type();
-        let exn = self.context.new_cast(None, exn0, exn_type);
+        let exn = self.context.new_cast(self.loc, exn0, exn_type);
         let unwind_resume = self.context.get_target_builtin_function("__builtin_unwind_resume");
-        self.llbb().add_eval(None, self.context.new_call(None, unwind_resume, &[exn]));
+        self.llbb().add_eval(self.loc, self.context.new_call(self.loc, unwind_resume, &[exn]));
         self.unreachable();
     }
 
@@ -1329,8 +1328,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         // NOTE: since success contains the call to the intrinsic, it must be added to the basic block before
         // expected so that we store expected after the call.
-        let success_var = self.current_func().new_local(None, self.bool_type, "success");
-        self.llbb().add_assignment(None, success_var, success);
+        let success_var = self.current_func().new_local(self.loc, self.bool_type, "success");
+        self.llbb().add_assignment(self.loc, success_var, success);
 
         (expected.to_rvalue(), success_var.to_rvalue())
     }
@@ -1358,12 +1357,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         let void_ptr_type = self.context.new_type::<*mut ()>();
         let volatile_void_ptr_type = void_ptr_type.make_volatile();
-        let dst = self.context.new_cast(None, dst, volatile_void_ptr_type);
+        let dst = self.context.new_cast(self.loc, dst, volatile_void_ptr_type);
         // FIXME(antoyo): not sure why, but we have the wrong type here.
         let new_src_type = atomic_function.get_param(1).to_rvalue().get_type();
-        let src = self.context.new_cast(None, src, new_src_type);
-        let res = self.context.new_call(None, atomic_function, &[dst, src, order]);
-        self.context.new_cast(None, res, src.get_type())
+        let src = self.context.new_cast(self.loc, src, new_src_type);
+        let res = self.context.new_call(self.loc, atomic_function, &[dst, src, order]);
+        self.context.new_cast(self.loc, res, src.get_type())
     }
 
     fn atomic_fence(&mut self, order: AtomicOrdering, scope: SynchronizationScope) {
@@ -1374,7 +1373,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             };
         let thread_fence = self.context.get_builtin_function(name);
         let order = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
-        self.llbb().add_eval(None, self.context.new_call(None, thread_fence, &[order]));
+        self.llbb().add_eval(self.loc, self.context.new_call(self.loc, thread_fence, &[order]));
     }
 
     fn set_invariant_load(&mut self, load: RValue<'gcc>) {
@@ -1650,7 +1649,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             };
         for i in 0..mask_num_units {
             let field = struct_type.get_field(i as i32);
-            vector_elements.push(self.context.new_cast(None, mask.access_field(None, field).to_rvalue(), mask_element_type));
+            vector_elements.push(self.context.new_cast(self.loc, mask.access_field(self.loc, field).to_rvalue(), mask_element_type));
         }
 
         // NOTE: the mask needs to be the same length as the input vectors, so add the missing
@@ -1666,14 +1665,14 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 // vectors and create a dummy second vector.
                 let mut elements = vec![];
                 for i in 0..vec_num_units {
-                    elements.push(self.context.new_vector_access(None, v1, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
+                    elements.push(self.context.new_vector_access(self.loc, v1, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
                 }
                 for i in 0..(mask_num_units - vec_num_units) {
-                    elements.push(self.context.new_vector_access(None, v2, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
+                    elements.push(self.context.new_vector_access(self.loc, v2, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
                 }
-                let v1 = self.context.new_rvalue_from_vector(None, result_type, &elements);
+                let v1 = self.context.new_rvalue_from_vector(self.loc, result_type, &elements);
                 let zero = self.context.new_rvalue_zero(element_type);
-                let v2 = self.context.new_rvalue_from_vector(None, result_type, &vec![zero; mask_num_units]);
+                let v2 = self.context.new_rvalue_from_vector(self.loc, result_type, &vec![zero; mask_num_units]);
                 (v1, v2)
             }
             else {
@@ -1682,17 +1681,17 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         let new_mask_num_units = std::cmp::max(mask_num_units, vec_num_units);
         let mask_type = self.context.new_vector_type(mask_element_type, new_mask_num_units as u64);
-        let mask = self.context.new_rvalue_from_vector(None, mask_type, &vector_elements);
-        let result = self.context.new_rvalue_vector_perm(None, v1, v2, mask);
+        let mask = self.context.new_rvalue_from_vector(self.loc, mask_type, &vector_elements);
+        let result = self.context.new_rvalue_vector_perm(self.loc, v1, v2, mask);
 
         if vec_num_units != mask_num_units {
             // NOTE: if padding was added, only select the number of elements of the masks to
             // remove that padding in the result.
             let mut elements = vec![];
             for i in 0..mask_num_units {
-                elements.push(self.context.new_vector_access(None, result, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
+                elements.push(self.context.new_vector_access(self.loc, result, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
             }
-            self.context.new_rvalue_from_vector(None, result_type, &elements)
+            self.context.new_rvalue_from_vector(self.loc, result_type, &elements)
         }
         else {
             result
@@ -1724,12 +1723,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 vector_elements.iter()
                     .map(|i| self.context.new_rvalue_from_int(mask_element_type, ((i + shift) % element_count) as i32))
                     .collect();
-            let mask = self.context.new_rvalue_from_vector(None, mask_type, &vector_elements);
-            let shifted = self.context.new_rvalue_vector_perm(None, res, res, mask);
+            let mask = self.context.new_rvalue_from_vector(self.loc, mask_type, &vector_elements);
+            let shifted = self.context.new_rvalue_vector_perm(self.loc, res, res, mask);
             shift *= 2;
             res = op(res, shifted, &self.context);
         }
-        self.context.new_vector_access(None, res, self.context.new_rvalue_zero(self.int_type))
+        self.context.new_vector_access(self.loc, res, self.context.new_rvalue_zero(self.int_type))
             .to_rvalue()
     }
 
@@ -1741,7 +1740,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     pub fn vector_reduce_op(&mut self, src: RValue<'gcc>, op: BinaryOp) -> RValue<'gcc> {
-        self.vector_reduce(src, |a, b, context| context.new_binary_op(None, op, a.get_type(), a, b))
+        let loc = self.loc.clone();
+        self.vector_reduce(src, |a, b, context| context.new_binary_op(loc, op, a.get_type(), a, b))
     }
 
     pub fn vector_reduce_fadd_fast(&mut self, _acc: RValue<'gcc>, _src: RValue<'gcc>) -> RValue<'gcc> {
@@ -1754,7 +1754,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let element_count = vector_type.get_num_units();
         (0..element_count).into_iter()
             .map(|i| self.context
-                .new_vector_access(None, src, self.context.new_rvalue_from_int(self.int_type, i as _))
+                .new_vector_access(self.loc, src, self.context.new_rvalue_from_int(self.int_type, i as _))
                 .to_rvalue())
             .fold(acc, |x, i| x + i)
     }
@@ -1774,7 +1774,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let element_count = vector_type.get_num_units();
         (0..element_count).into_iter()
             .map(|i| self.context
-                .new_vector_access(None, src, self.context.new_rvalue_from_int(self.int_type, i as _))
+                .new_vector_access(self.loc, src, self.context.new_rvalue_from_int(self.int_type, i as _))
                 .to_rvalue())
             .fold(acc, |x, i| x * i)
     }
@@ -1786,17 +1786,19 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
     // Inspired by Hacker's Delight min implementation.
     pub fn vector_reduce_min(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
+        let loc = self.loc.clone();
         self.vector_reduce(src, |a, b, context| {
-            let differences_or_zeros = difference_or_zero(a, b, context);
-            context.new_binary_op(None, BinaryOp::Plus, b.get_type(), b, differences_or_zeros)
+            let differences_or_zeros = difference_or_zero(loc, a, b, context);
+            context.new_binary_op(loc, BinaryOp::Plus, b.get_type(), b, differences_or_zeros)
         })
     }
 
     // Inspired by Hacker's Delight max implementation.
     pub fn vector_reduce_max(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
+        let loc = self.loc.clone();
         self.vector_reduce(src, |a, b, context| {
-            let differences_or_zeros = difference_or_zero(a, b, context);
-            context.new_binary_op(None, BinaryOp::Minus, a.get_type(), a, differences_or_zeros)
+            let differences_or_zeros = difference_or_zero(loc, a, b, context);
+            context.new_binary_op(loc, BinaryOp::Minus, a.get_type(), a, differences_or_zeros)
         })
     }
 
@@ -1805,23 +1807,23 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         // mask out the NaNs in b and replace them with the corresponding lane in a, so when a and
         // b get compared & spliced together, we get the numeric values instead of NaNs.
-        let b_nan_mask = self.context.new_comparison(None, ComparisonOp::NotEquals, b, b);
+        let b_nan_mask = self.context.new_comparison(self.loc, ComparisonOp::NotEquals, b, b);
         let mask_type = b_nan_mask.get_type();
-        let b_nan_mask_inverted = self.context.new_unary_op(None, UnaryOp::BitwiseNegate, mask_type, b_nan_mask);
-        let a_cast = self.context.new_bitcast(None, a, mask_type);
-        let b_cast = self.context.new_bitcast(None, b, mask_type);
+        let b_nan_mask_inverted = self.context.new_unary_op(self.loc, UnaryOp::BitwiseNegate, mask_type, b_nan_mask);
+        let a_cast = self.context.new_bitcast(self.loc, a, mask_type);
+        let b_cast = self.context.new_bitcast(self.loc, b, mask_type);
         let res = (b_nan_mask & a_cast) | (b_nan_mask_inverted & b_cast);
-        let b = self.context.new_bitcast(None, res, vector_type);
+        let b = self.context.new_bitcast(self.loc, res, vector_type);
 
         // now do the actual comparison
         let comparison_op = match direction {
             ExtremumOperation::Min => ComparisonOp::LessThan,
             ExtremumOperation::Max => ComparisonOp::GreaterThan,
         };
-        let cmp = self.context.new_comparison(None, comparison_op, a, b);
-        let cmp_inverted = self.context.new_unary_op(None, UnaryOp::BitwiseNegate, cmp.get_type(), cmp);
+        let cmp = self.context.new_comparison(self.loc, comparison_op, a, b);
+        let cmp_inverted = self.context.new_unary_op(self.loc, UnaryOp::BitwiseNegate, cmp.get_type(), cmp);
         let res = (cmp & a_cast) | (cmp_inverted & res);
-        self.context.new_bitcast(None, res, vector_type)
+        self.context.new_bitcast(self.loc, res, vector_type)
     }
 
     pub fn vector_fmin(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -1832,12 +1834,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     pub fn vector_reduce_fmin(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
         let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
         let element_count = vector_type.get_num_units();
-        let mut acc = self.context.new_vector_access(None, src, self.context.new_rvalue_zero(self.int_type)).to_rvalue();
+        let mut acc = self.context.new_vector_access(self.loc, src, self.context.new_rvalue_zero(self.int_type)).to_rvalue();
         for i in 1..element_count {
             let elem = self.context
-                .new_vector_access(None, src, self.context.new_rvalue_from_int(self.int_type, i as _))
+                .new_vector_access(self.loc, src, self.context.new_rvalue_from_int(self.int_type, i as _))
                 .to_rvalue();
-            let cmp = self.context.new_comparison(None, ComparisonOp::LessThan, acc, elem);
+            let cmp = self.context.new_comparison(self.loc, ComparisonOp::LessThan, acc, elem);
             acc = self.select(cmp, acc, elem);
         }
         acc
@@ -1856,12 +1858,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     pub fn vector_reduce_fmax(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
         let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
         let element_count = vector_type.get_num_units();
-        let mut acc = self.context.new_vector_access(None, src, self.context.new_rvalue_zero(self.int_type)).to_rvalue();
+        let mut acc = self.context.new_vector_access(self.loc, src, self.context.new_rvalue_zero(self.int_type)).to_rvalue();
         for i in 1..element_count {
             let elem = self.context
-                .new_vector_access(None, src, self.context.new_rvalue_from_int(self.int_type, i as _))
+                .new_vector_access(self.loc, src, self.context.new_rvalue_from_int(self.int_type, i as _))
                 .to_rvalue();
-            let cmp = self.context.new_comparison(None, ComparisonOp::GreaterThan, acc, elem);
+            let cmp = self.context.new_comparison(self.loc, ComparisonOp::GreaterThan, acc, elem);
             acc = self.select(cmp, acc, elem);
         }
         acc
@@ -1890,7 +1892,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             if then_val_element_size != element_type.get_size() {
                 let new_element_type = self.type_ix(then_val_element_size as u64 * 8);
                 let new_vector_type = self.context.new_vector_type(new_element_type, num_units as u64);
-                let cond = self.context.convert_vector(None, cond, new_vector_type);
+                let cond = self.context.convert_vector(self.loc, cond, new_vector_type);
                 (cond, new_element_type)
             }
             else {
@@ -1901,24 +1903,24 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let cond_type = cond.get_type();
 
         let zeros = vec![self.context.new_rvalue_zero(element_type); num_units];
-        let zeros = self.context.new_rvalue_from_vector(None, cond_type, &zeros);
+        let zeros = self.context.new_rvalue_from_vector(self.loc, cond_type, &zeros);
 
         let result_type = then_val.get_type();
 
-        let masks = self.context.new_comparison(None, ComparisonOp::NotEquals, cond, zeros);
+        let masks = self.context.new_comparison(self.loc, ComparisonOp::NotEquals, cond, zeros);
         // NOTE: masks is a vector of integers, but the values can be vectors of floats, so use bitcast to make
         // the & operation work.
         let then_val = self.bitcast_if_needed(then_val, masks.get_type());
         let then_vals = masks & then_val;
 
         let minus_ones = vec![self.context.new_rvalue_from_int(element_type, -1); num_units];
-        let minus_ones = self.context.new_rvalue_from_vector(None, cond_type, &minus_ones);
+        let minus_ones = self.context.new_rvalue_from_vector(self.loc, cond_type, &minus_ones);
         let inverted_masks = masks ^ minus_ones;
         // NOTE: sometimes, the type of else_val can be different than the type of then_val in
         // libgccjit (vector of int vs vector of int32_t), but they should be the same for the AND
         // operation to work.
         // TODO: remove bitcast now that vector types can be compared?
-        let else_val = self.context.new_bitcast(None, else_val, then_val.get_type());
+        let else_val = self.context.new_bitcast(self.loc, else_val, then_val.get_type());
         let else_vals = inverted_masks & else_val;
 
         let res = then_vals | else_vals;
@@ -1926,15 +1928,15 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 }
 
-fn difference_or_zero<'gcc>(a: RValue<'gcc>, b: RValue<'gcc>, context: &'gcc Context<'gcc>) -> RValue<'gcc> {
+fn difference_or_zero<'gcc>(loc: Option<Location<'gcc>>, a: RValue<'gcc>, b: RValue<'gcc>, context: &'gcc Context<'gcc>) -> RValue<'gcc> {
     let difference = a - b;
-    let masks = context.new_comparison(None, ComparisonOp::GreaterThanEquals, b, a);
+    let masks = context.new_comparison(loc, ComparisonOp::GreaterThanEquals, b, a);
     // NOTE: masks is a vector of integers, but the values can be vectors of floats, so use bitcast to make
     // the & operation work.
     let a_type = a.get_type();
     let masks =
         if masks.get_type() != a_type {
-            context.new_bitcast(None, masks, a_type)
+            context.new_bitcast(loc, masks, a_type)
         }
         else {
             masks
@@ -1945,7 +1947,7 @@ fn difference_or_zero<'gcc>(a: RValue<'gcc>, b: RValue<'gcc>, context: &'gcc Con
 impl<'a, 'gcc, 'tcx> StaticBuilderMethods for Builder<'a, 'gcc, 'tcx> {
     fn get_static(&mut self, def_id: DefId) -> RValue<'gcc> {
         // Forward to the `get_static` method of `CodegenCx`
-        self.cx().get_static(def_id).get_address(None)
+        self.cx().get_static(def_id).get_address(self.loc)
     }
 }
 
diff --git a/src/context.rs b/src/context.rs
index 5760d96165dd..9dbb3751d47b 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -1,6 +1,6 @@
 use std::cell::{Cell, RefCell};
 
-use gccjit::{Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, RValue, Type};
+use gccjit::{Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, Location, RValue, Type};
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::traits::{
     BackendTypes,
@@ -345,7 +345,7 @@ impl<'gcc, 'tcx> BackendTypes for CodegenCx<'gcc, 'tcx> {
     type Funclet = (); // TODO(antoyo)
 
     type DIScope = (); // TODO(antoyo)
-    type DILocation = (); // TODO(antoyo)
+    type DILocation = Location<'gcc>; // TODO(antoyo)
     type DIVariable = (); // TODO(antoyo)
 }
 
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index d1bfd833cd87..e01624ce15ea 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -1,41 +1,172 @@
-use gccjit::RValue;
-use rustc_codegen_ssa::mir::debuginfo::{FunctionDebugContext, VariableKind};
+use gccjit::{Location, RValue};
+use rustc_codegen_ssa::mir::debuginfo::{DebugScope, FunctionDebugContext, VariableKind};
 use rustc_codegen_ssa::traits::{DebugInfoBuilderMethods, DebugInfoMethods};
-use rustc_middle::mir;
+use rustc_index::bit_set::BitSet;
+use rustc_index::IndexVec;
+use rustc_middle::mir::{Body, self, SourceScope};
 use rustc_middle::ty::{Instance, PolyExistentialTraitRef, Ty};
-use rustc_span::{SourceFile, Span, Symbol};
+use rustc_session::config::DebugInfo;
+use rustc_span::{BytePos, Pos, SourceFile, SourceFileAndLine, Span, Symbol};
 use rustc_target::abi::call::FnAbi;
 use rustc_target::abi::Size;
+use rustc_data_structures::sync::Lrc;
+use crate::rustc_index::Idx;
 use std::ops::Range;
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
 
+pub(super) const UNKNOWN_LINE_NUMBER: u32 = 0;
+pub(super) const UNKNOWN_COLUMN_NUMBER: u32 = 0;
+
 impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods for Builder<'a, 'gcc, 'tcx> {
     // FIXME(eddyb) find a common convention for all of the debuginfo-related
     // names (choose between `dbg`, `debug`, `debuginfo`, `debug_info` etc.).
     fn dbg_var_addr(
         &mut self,
         _dbg_var: Self::DIVariable,
-        _scope_metadata: Self::DIScope,
-        _variable_alloca: Self::Value,
+        dbg_loc: Self::DILocation,
+        variable_alloca: Self::Value,
         _direct_offset: Size,
         _indirect_offsets: &[Size],
         _fragment: Option<Range<Size>>,
     ) {
-        unimplemented!();
+        // Not sure if this is correct, probably wrong but still keep it here.
+        unsafe {
+            #[cfg(feature = "master")]
+            variable_alloca.set_location(dbg_loc);
+        }
     }
 
     fn insert_reference_to_gdb_debug_scripts_section_global(&mut self) {
         // TODO(antoyo): insert reference to gdb debug scripts section global.
     }
 
-    fn set_var_name(&mut self, _value: RValue<'gcc>, _name: &str) {
-        unimplemented!();
+    /// Currently, this function is not yet implemented. It seems that the
+    /// debug name and the mangled name should both be included in the LValues.
+    /// Besides, a function to get the rvalue type(m_is_lvalue) should also be included.
+    fn set_var_name(&mut self, value: RValue<'gcc>, name: &str) {
+        //unimplemented!();
     }
 
-    fn set_dbg_loc(&mut self, _dbg_loc: Self::DILocation) {
-        unimplemented!();
+    fn set_dbg_loc(&mut self, dbg_loc: Self::DILocation) {
+        self.loc = Some(dbg_loc);
+    }
+}
+
+pub fn compute_mir_scopes<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    instance: Instance<'tcx>,
+    mir: &Body<'tcx>,
+    debug_context: &mut FunctionDebugContext<'tcx, (), Location<'gcc>>,
+) {
+    // Find all scopes with variables defined in them.
+    let variables = if cx.sess().opts.debuginfo == DebugInfo::Full {
+        let mut vars = BitSet::new_empty(mir.source_scopes.len());
+        // FIXME(eddyb) take into account that arguments always have debuginfo,
+        // irrespective of their name (assuming full debuginfo is enabled).
+        // NOTE(eddyb) actually, on second thought, those are always in the
+        // function scope, which always exists.
+        for var_debug_info in &mir.var_debug_info {
+            vars.insert(var_debug_info.source_info.scope);
+        }
+        Some(vars)
+    } else {
+        // Nothing to emit, of course.
+        None
+    };
+    let mut instantiated = BitSet::new_empty(mir.source_scopes.len());
+    // Instantiate all scopes.
+    for idx in 0..mir.source_scopes.len() {
+        let scope = SourceScope::new(idx);
+        make_mir_scope(cx, instance, mir, &variables, debug_context, &mut instantiated, scope);
+    }
+    assert!(instantiated.count() == mir.source_scopes.len());
+}
+
+fn make_mir_scope<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    instance: Instance<'tcx>,
+    mir: &Body<'tcx>,
+    variables: &Option<BitSet<SourceScope>>,
+    debug_context: &mut FunctionDebugContext<'tcx, (), Location<'gcc>>,
+    instantiated: &mut BitSet<SourceScope>,
+    scope: SourceScope,
+) {
+    if instantiated.contains(scope) {
+        return;
+    }
+
+    let scope_data = &mir.source_scopes[scope];
+    let parent_scope = if let Some(parent) = scope_data.parent_scope {
+        make_mir_scope(cx, instance, mir, variables, debug_context, instantiated, parent);
+        debug_context.scopes[parent]
+    } else {
+        // The root is the function itself.
+        let file = cx.sess().source_map().lookup_source_file(mir.span.lo());
+        debug_context.scopes[scope] = DebugScope {
+            file_start_pos: file.start_pos,
+            file_end_pos: file.end_position(),
+            ..debug_context.scopes[scope]
+        };
+        instantiated.insert(scope);
+        return;
+    };
+
+    if let Some(vars) = variables
+    {
+        if !vars.contains(scope)
+            && scope_data.inlined.is_none() {
+                // Do not create a DIScope if there are no variables defined in this
+                // MIR `SourceScope`, and it's not `inlined`, to avoid debuginfo bloat.
+                debug_context.scopes[scope] = parent_scope;
+                instantiated.insert(scope);
+                return;
+            }
+    }
+
+    let loc = cx.lookup_debug_loc(scope_data.span.lo());
+    let dbg_scope = ();
+
+    let inlined_at = scope_data.inlined.map(|(_, callsite_span)| {
+        // FIXME(eddyb) this doesn't account for the macro-related
+        // `Span` fixups that `rustc_codegen_ssa::mir::debuginfo` does.
+        let callsite_scope = parent_scope.adjust_dbg_scope_for_span(cx, callsite_span);
+        cx.dbg_loc(callsite_scope, parent_scope.inlined_at, callsite_span)
+    });
+    let p_inlined_at = parent_scope.inlined_at;
+    // TODO(tempdragon): dbg_scope: Add support for scope extension here.
+    inlined_at.or(p_inlined_at);
+    
+    debug_context.scopes[scope] = DebugScope {
+        dbg_scope,
+        inlined_at,
+        file_start_pos: loc.0.start_pos,
+        file_end_pos: loc.0.end_position(),
+    };
+    instantiated.insert(scope);
+}
+
+/// Copied from LLVM backend
+impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
+    pub fn lookup_debug_loc(&self, pos: BytePos) -> (Lrc<SourceFile>, u32, u32) {
+        match self.sess().source_map().lookup_line(pos) {
+            Ok(SourceFileAndLine { sf: file, line }) => {
+                let line_pos = file.lines()[line];
+
+                // Use 1-based indexing.
+                let line = (line + 1) as u32;
+                let col = (file.relative_position(pos) - line_pos).to_u32() + 1;
+                (file,
+                 line,
+                 if ! self.sess().target.is_like_msvc {
+                     col } else {
+                     UNKNOWN_COLUMN_NUMBER
+                 }
+                )
+            }
+            Err(file) => (file, UNKNOWN_LINE_NUMBER, UNKNOWN_COLUMN_NUMBER),
+        }
     }
 }
 
@@ -51,13 +182,32 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
     fn create_function_debug_context(
         &self,
-        _instance: Instance<'tcx>,
-        _fn_abi: &FnAbi<'tcx, Ty<'tcx>>,
-        _llfn: RValue<'gcc>,
-        _mir: &mir::Body<'tcx>,
+        instance: Instance<'tcx>,
+        fn_abi: &FnAbi<'tcx, Ty<'tcx>>,
+        llfn: RValue<'gcc>,
+        mir: &mir::Body<'tcx>,
     ) -> Option<FunctionDebugContext<'tcx, Self::DIScope, Self::DILocation>> {
         // TODO(antoyo)
-        None
+        if self.sess().opts.debuginfo == DebugInfo::None {
+            return None;
+        }
+
+        // Initialize fn debug context (including scopes).
+        let empty_scope = DebugScope {
+            dbg_scope: self.dbg_scope_fn(instance, fn_abi, Some(llfn)),
+            inlined_at: None,
+            file_start_pos: BytePos(0),
+            file_end_pos: BytePos(0),
+        };
+        let mut fn_debug_context = FunctionDebugContext {
+            scopes: IndexVec::from_elem(empty_scope, &mir.source_scopes.as_slice()),
+            inlined_function_scopes: Default::default(),
+        };
+
+        // Fill in all the scopes, with the information from the MIR body.
+        compute_mir_scopes(self, instance, mir, &mut fn_debug_context);
+
+        Some(fn_debug_context)
     }
 
     fn extend_scope_to_file(
@@ -65,11 +215,12 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         _scope_metadata: Self::DIScope,
         _file: &SourceFile,
     ) -> Self::DIScope {
-        unimplemented!();
+        //unimplemented!();
     }
 
     fn debuginfo_finalize(&self) {
-        // TODO(antoyo)
+        // TODO(antoyo): Get the debug flag/predicate to allow optional generation of debuginfo.
+        self.context.set_debug_info(true)
     }
 
     fn create_dbg_var(
@@ -80,7 +231,7 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         _variable_kind: VariableKind,
         _span: Span,
     ) -> Self::DIVariable {
-        unimplemented!();
+        ()
     }
 
     fn dbg_scope_fn(
@@ -89,15 +240,47 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         _fn_abi: &FnAbi<'tcx, Ty<'tcx>>,
         _maybe_definition_llfn: Option<RValue<'gcc>>,
     ) -> Self::DIScope {
-        unimplemented!();
+        //unimplemented!();
     }
 
     fn dbg_loc(
         &self,
         _scope: Self::DIScope,
         _inlined_at: Option<Self::DILocation>,
-        _span: Span,
+        span: Span,
     ) -> Self::DILocation {
-        unimplemented!();
+        //unimplemented!();
+        let pos = span.lo();
+        let (file, line, col) = self.lookup_debug_loc(pos);
+        let loc = match &file.name {
+            rustc_span::FileName::Real(name) => match name {
+                rustc_span::RealFileName::LocalPath(name) => {
+                    if let Some(name) = name.to_str() {
+                        self.context
+                            .new_location(name, line as i32, col as i32)
+                    }else{
+                        Location::null()
+                    }
+                }
+                rustc_span::RealFileName::Remapped {
+                    local_path,
+                    virtual_name,
+                } => if let Some(name) = local_path.as_ref() {
+                    if let Some(name) = name.to_str(){
+                        self.context.new_location(
+                            name,
+                            line as i32,
+                            col as i32,
+                        )
+                    } else {
+                        Location::null()
+                    }
+                }else{
+                    Location::null()
+                },
+            },
+            _ => Location::null(),
+        };
+        loc
     }
 }
diff --git a/src/int.rs b/src/int.rs
index b69e073c4d94..b0ceacf2ffc2 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -195,7 +195,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let a_type = a.get_type();
         let b_type = b.get_type();
         if (self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type)) || (a_type.is_vector() && b_type.is_vector()) {
-            self.context.new_binary_op(None, operation, a_type, a, b)
+            self.context.new_binary_op(self.loc, operation, a_type, a, b)
         }
         else {
             debug_assert!(a_type.dyncast_array().is_some());
@@ -208,10 +208,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                     "u"
                 };
             let func_name = format!("__{}{}ti3", sign, operation_name);
-            let param_a = self.context.new_parameter(None, a_type, "a");
-            let param_b = self.context.new_parameter(None, b_type, "b");
-            let func = self.context.new_function(None, FunctionType::Extern, a_type, &[param_a, param_b], func_name, false);
-            self.context.new_call(None, func, &[a, b])
+            let param_a = self.context.new_parameter(self.loc, a_type, "a");
+            let param_b = self.context.new_parameter(self.loc, b_type, "b");
+            let func = self.context.new_function(self.loc, FunctionType::Extern, a_type, &[param_a, param_b], func_name, false);
+            self.context.new_call(self.loc, func, &[a, b])
         }
     }
 
diff --git a/src/lib.rs b/src/lib.rs
index 7f0696740b37..cdb7cbebc1cc 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -39,6 +39,7 @@ extern crate rustc_errors;
 extern crate rustc_fluent_macro;
 extern crate rustc_fs_util;
 extern crate rustc_hir;
+extern crate rustc_index;
 #[cfg(feature="master")]
 extern crate rustc_interface;
 extern crate rustc_macros;
@@ -174,7 +175,7 @@ impl CodegenBackend for GccCodegenBackend {
         crate::DEFAULT_LOCALE_RESOURCE
     }
 
-    fn init(&self, sess: &Session) {
+    fn init(&self, sess: &Session) {        
         #[cfg(feature="master")]
         {
             let target_cpu = target_cpu(sess);

From 2ffe9d1eefb175addf8c14cc48dd7fcf91b2b008 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 24 Feb 2024 19:56:29 +0800
Subject: [PATCH 547/997] feat(int.rs&build.rs): Add location info to
 arithmetic operators

TODO:
1. Clean the unnecessary locations in builder.rs & int.rs
2. Add demangling support
3. Add debug scope support
4. Add vtable support
5. Clean up builder.rs locations
---
 src/builder.rs       |  68 +++++++++------
 src/int.rs           | 204 +++++++++++++++++++++----------------------
 src/intrinsic/mod.rs | 108 +++++++++++------------
 3 files changed, 199 insertions(+), 181 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index fc4c4d86a7d6..c5d3ed8c8a1f 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -26,6 +26,7 @@ use rustc_codegen_ssa::traits::{
 use rustc_data_structures::fx::FxHashSet;
 use rustc_middle::bug;
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrs;
+use rustc_middle::mir::Rvalue;
 use rustc_middle::ty::{ParamEnv, Ty, TyCtxt};
 use rustc_middle::ty::layout::{FnAbiError, FnAbiOfHelpers, FnAbiRequest, HasParamEnv, HasTyCtxt, LayoutError, LayoutOfHelpers, TyAndLayout};
 use rustc_span::Span;
@@ -398,6 +399,16 @@ impl<'gcc, 'tcx> BackendTypes for Builder<'_, 'gcc, 'tcx> {
     type DIVariable = <CodegenCx<'gcc, 'tcx> as BackendTypes>::DIVariable;
 }
 
+pub fn set_rval_location<'a, 'gcc, 'tcx>(bx: &mut Builder<'a,'gcc,'tcx>, r:RValue<'gcc>) -> RValue<'gcc> {
+    if bx.loc.is_some(){
+        unsafe {
+            r.set_location(bx.loc.unwrap());
+        }
+    }
+    r
+    
+}
+
 impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn build(cx: &'a CodegenCx<'gcc, 'tcx>, block: Block<'gcc>) -> Builder<'a, 'gcc, 'tcx> {
         Builder::with_cx(cx, block)
@@ -612,7 +623,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             // FIXME(antoyo): this seems to produce the wrong result.
             return self.context.new_call(self.loc, fmodf, &[a, b]);
         }
-        else if let Some(vector_type) = a_type_unqualified.dyncast_vector() {
+        if let Some(vector_type) = a_type_unqualified.dyncast_vector() {
             assert_eq!(a_type_unqualified, b.get_type().unqualified());
 
             let num_units = vector_type.get_num_units();
@@ -630,7 +641,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         assert_eq!(a_type_unqualified, self.cx.double_type);
 
         let fmod = self.context.get_builtin_function("fmod");
-        return self.context.new_call(self.loc, fmod, &[a, b]);
+        self.context.new_call(self.loc, fmod, &[a, b])
     }
 
     fn shl(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -652,73 +663,80 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn or(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        self.cx.gcc_or(a, b)
+        let ret = self.cx.gcc_or(a, b, self.loc);
+        
+        if self.loc.is_some() {
+            unsafe { ret.set_location(self.loc.unwrap()); }
+        }
+        ret
     }
 
     fn xor(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        self.gcc_xor(a, b)
+        set_rval_location(self,self.gcc_xor(a, b))
     }
 
     fn neg(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        self.gcc_neg(a)
+        set_rval_location(self,self.gcc_neg(a))
     }
 
     fn fneg(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        self.cx.context.new_unary_op(self.loc, UnaryOp::Minus, a.get_type(), a)
+        set_rval_location(self,self.cx.context.new_unary_op(self.loc, UnaryOp::Minus, a.get_type(), a))
     }
 
     fn not(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        self.gcc_not(a)
+        set_rval_location(self,self.gcc_not(a))
     }
 
     fn unchecked_sadd(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        self.gcc_add(a, b)
+        set_rval_location(self,self.gcc_add(a, b))
     }
 
     fn unchecked_uadd(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        self.gcc_add(a, b)
+        set_rval_location(self,self.gcc_add(a, b))
     }
 
     fn unchecked_ssub(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        self.gcc_sub(a, b)
+        set_rval_location(self,self.gcc_sub(a, b))
     }
 
     fn unchecked_usub(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): should generate poison value?
-        self.gcc_sub(a, b)
+        set_rval_location(self,self.gcc_sub(a, b))
     }
 
     fn unchecked_smul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        self.gcc_mul(a, b)
+        set_rval_location(self,self.gcc_mul(a, b))
     }
 
     fn unchecked_umul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        self.gcc_mul(a, b)
+        set_rval_location(self,self.gcc_mul(a, b))
     }
 
     fn fadd_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        lhs + rhs
+        set_rval_location(self,lhs + rhs)
     }
 
     fn fsub_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        lhs - rhs
+        set_rval_location(self,lhs - rhs)
     }
 
     fn fmul_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        lhs * rhs
+        set_rval_location(self,lhs * rhs)
     }
 
     fn fdiv_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        lhs / rhs
+        set_rval_location(self,lhs / rhs)
     }
 
     fn frem_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        self.frem(lhs, rhs)
+        let i = self.frem(lhs, rhs);
+        set_rval_location(self,i);
+        i
     }
 
     fn checked_binop(&mut self, oop: OverflowOp, typ: Ty<'_>, lhs: Self::Value, rhs: Self::Value) -> (Self::Value, Self::Value) {
@@ -1005,33 +1023,33 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn fptoui(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.gcc_float_to_uint_cast(value, dest_ty)
+        set_rval_location(self,self.gcc_float_to_uint_cast(value, dest_ty))
     }
 
     fn fptosi(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.gcc_float_to_int_cast(value, dest_ty)
+        set_rval_location(self,self.gcc_float_to_int_cast(value, dest_ty))
     }
 
     fn uitofp(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.gcc_uint_to_float_cast(value, dest_ty)
+        set_rval_location(self,self.gcc_uint_to_float_cast(value, dest_ty))
     }
 
     fn sitofp(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.gcc_int_to_float_cast(value, dest_ty)
+        set_rval_location(self,self.gcc_int_to_float_cast(value, dest_ty))
     }
 
     fn fptrunc(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): make sure it truncates.
-        self.context.new_cast(self.loc, value, dest_ty)
+        set_rval_location(self,self.context.new_cast(self.loc, value, dest_ty))
     }
 
     fn fpext(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        self.context.new_cast(self.loc, value, dest_ty)
+        set_rval_location(self,self.context.new_cast(self.loc, value, dest_ty))
     }
 
     fn ptrtoint(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
         let usize_value = self.cx.const_bitcast(value, self.cx.type_isize());
-        self.intcast(usize_value, dest_ty, false)
+        self.intcast(usize_value, dest_ty, false)        
     }
 
     fn inttoptr(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
diff --git a/src/int.rs b/src/int.rs
index b0ceacf2ffc2..fe38d89ff8c3 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -4,7 +4,7 @@
 
 use std::convert::TryFrom;
 
-use gccjit::{ComparisonOp, FunctionType, RValue, ToRValue, Type, UnaryOp, BinaryOp};
+use gccjit::{BinaryOp, ComparisonOp, FunctionType, Location, RValue, ToRValue, Type, UnaryOp};
 use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
 use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeMethods, BuilderMethods, OverflowOp};
 use rustc_middle::ty::{ParamEnv, Ty};
@@ -35,13 +35,13 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 else {
                     UnaryOp::BitwiseNegate
                 };
-            self.cx.context.new_unary_op(None, operation, typ, a)
+            self.cx.context.new_unary_op(self.loc, operation, typ, a)
         }
         else {
             let element_type = typ.dyncast_array().expect("element type");
             self.from_low_high_rvalues(typ,
-                self.cx.context.new_unary_op(None, UnaryOp::BitwiseNegate, element_type, self.low(a)),
-                self.cx.context.new_unary_op(None, UnaryOp::BitwiseNegate, element_type, self.high(a)),
+                self.cx.context.new_unary_op(self.loc, UnaryOp::BitwiseNegate, element_type, self.low(a)),
+                self.cx.context.new_unary_op(self.loc, UnaryOp::BitwiseNegate, element_type, self.high(a)),
             )
         }
     }
@@ -49,7 +49,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     pub fn gcc_neg(&self, a: RValue<'gcc>) -> RValue<'gcc> {
         let a_type = a.get_type();
         if self.is_native_int_type(a_type) || a_type.is_vector() {
-            self.cx.context.new_unary_op(None, UnaryOp::Minus, a.get_type(), a)
+            self.cx.context.new_unary_op(self.loc, UnaryOp::Minus, a.get_type(), a)
         }
         else {
             self.gcc_add(self.gcc_not(a), self.gcc_int(a_type, 1))
@@ -57,7 +57,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     pub fn gcc_and(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        self.cx.bitwise_operation(BinaryOp::BitwiseAnd, a, b)
+        self.cx.bitwise_operation(BinaryOp::BitwiseAnd, a, b, self.loc)
     }
 
     pub fn gcc_lshr(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -69,7 +69,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             // FIXME(antoyo): remove the casts when libgccjit can shift an unsigned number by a signed number.
             // TODO(antoyo): cast to unsigned to do a logical shift if that does not work.
             if a_type.is_signed(self) != b_type.is_signed(self) {
-                let b = self.context.new_cast(None, b, a_type);
+                let b = self.context.new_cast(self.loc, b, a_type);
                 a >> b
             }
             else {
@@ -95,14 +95,14 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let b0_block = func.new_block("b0");
             let actual_else_block = func.new_block("actual_else");
 
-            let result = func.new_local(None, a_type, "shiftResult");
+            let result = func.new_local(self.loc, a_type, "shiftResult");
 
             let sixty_four = self.gcc_int(native_int_type, 64);
             let sixty_three = self.gcc_int(native_int_type, 63);
             let zero = self.gcc_zero(native_int_type);
             let b = self.gcc_int_cast(b, native_int_type);
             let condition = self.gcc_icmp(IntPredicate::IntNE, self.gcc_and(b, sixty_four), zero);
-            self.llbb().end_with_conditional(None, condition, then_block, else_block);
+            self.llbb().end_with_conditional(self.loc, condition, then_block, else_block);
 
             let shift_value = self.gcc_sub(b, sixty_four);
             let high = self.high(a);
@@ -114,27 +114,27 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                     zero
                 };
             let array_value = self.from_low_high_rvalues(a_type, high >> shift_value, sign);
-            then_block.add_assignment(None, result, array_value);
-            then_block.end_with_jump(None, after_block);
+            then_block.add_assignment(self.loc, result, array_value);
+            then_block.end_with_jump(self.loc, after_block);
 
             let condition = self.gcc_icmp(IntPredicate::IntEQ, b, zero);
-            else_block.end_with_conditional(None, condition, b0_block, actual_else_block);
+            else_block.end_with_conditional(self.loc, condition, b0_block, actual_else_block);
 
-            b0_block.add_assignment(None, result, a);
-            b0_block.end_with_jump(None, after_block);
+            b0_block.add_assignment(self.loc, result, a);
+            b0_block.end_with_jump(self.loc, after_block);
 
             let shift_value = self.gcc_sub(sixty_four, b);
             // NOTE: cast low to its unsigned type in order to perform a logical right shift.
             let unsigned_type = native_int_type.to_unsigned(&self.cx);
-            let casted_low = self.context.new_cast(None, self.low(a), unsigned_type);
-            let shifted_low = casted_low >> self.context.new_cast(None, b, unsigned_type);
-            let shifted_low = self.context.new_cast(None, shifted_low, native_int_type);
+            let casted_low = self.context.new_cast(self.loc, self.low(a), unsigned_type);
+            let shifted_low = casted_low >> self.context.new_cast(self.loc, b, unsigned_type);
+            let shifted_low = self.context.new_cast(self.loc, shifted_low, native_int_type);
             let array_value = self.from_low_high_rvalues(a_type,
                 (high << shift_value) | shifted_low,
                 high >> b,
             );
-            actual_else_block.add_assignment(None, result, array_value);
-            actual_else_block.end_with_jump(None, after_block);
+            actual_else_block.add_assignment(self.loc, result, array_value);
+            actual_else_block.end_with_jump(self.loc, after_block);
 
             // NOTE: since jumps were added in a place rustc does not expect, the current block in the
             // state need to be updated.
@@ -152,13 +152,13 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 if a_type.is_vector() {
                     // Vector types need to be bitcast.
                     // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
-                    b = self.context.new_bitcast(None, b, a.get_type());
+                    b = self.context.new_bitcast(self.loc, b, a.get_type());
                 }
                 else {
-                    b = self.context.new_cast(None, b, a.get_type());
+                    b = self.context.new_cast(self.loc, b, a.get_type());
                 }
             }
-            self.context.new_binary_op(None, operation, a_type, a, b)
+            self.context.new_binary_op(self.loc, operation, a_type, a, b)
         }
         else {
             debug_assert!(a_type.dyncast_array().is_some());
@@ -172,10 +172,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                     (BinaryOp::Minus, false) => "__rust_u128_sub",
                     _ => unreachable!("unexpected additive operation {:?}", operation),
                 };
-            let param_a = self.context.new_parameter(None, a_type, "a");
-            let param_b = self.context.new_parameter(None, b_type, "b");
-            let func = self.context.new_function(None, FunctionType::Extern, a_type, &[param_a, param_b], func_name, false);
-            self.context.new_call(None, func, &[a, b])
+            let param_a = self.context.new_parameter(self.loc, a_type, "a");
+            let param_b = self.context.new_parameter(self.loc, b_type, "b");
+            let func = self.context.new_function(self.loc, FunctionType::Extern, a_type, &[param_a, param_b], func_name, false);
+            self.context.new_call(self.loc, func, &[a, b])
         }
     }
 
@@ -335,10 +335,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let intrinsic = self.context.get_builtin_function(&name);
         let res = self.current_func()
             // TODO(antoyo): is it correct to use rhs type instead of the parameter typ?
-            .new_local(None, rhs.get_type(), "binopResult")
-            .get_address(None);
+            .new_local(self.loc, rhs.get_type(), "binopResult")
+            .get_address(self.loc);
         let overflow = self.overflow_call(intrinsic, &[lhs, rhs, res], None);
-        (res.dereference(None).to_rvalue(), overflow)
+        (res.dereference(self.loc).to_rvalue(), overflow)
     }
 
     pub fn operation_with_overflow(&self, func_name: &str, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
@@ -346,10 +346,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let b_type = rhs.get_type();
         debug_assert!(a_type.dyncast_array().is_some());
         debug_assert!(b_type.dyncast_array().is_some());
-        let param_a = self.context.new_parameter(None, a_type, "a");
-        let param_b = self.context.new_parameter(None, b_type, "b");
-        let result_field = self.context.new_field(None, a_type, "result");
-        let overflow_field = self.context.new_field(None, self.bool_type, "overflow");
+        let param_a = self.context.new_parameter(self.loc, a_type, "a");
+        let param_b = self.context.new_parameter(self.loc, b_type, "b");
+        let result_field = self.context.new_field(self.loc, a_type, "result");
+        let overflow_field = self.context.new_field(self.loc, self.bool_type, "overflow");
 
         let ret_ty = Ty::new_tup(self.tcx, &[self.tcx.types.i128, self.tcx.types.bool]);
         let layout = self.tcx.layout_of(ParamEnv::reveal_all().and(ret_ty)).unwrap();
@@ -372,23 +372,23 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         let indirect = matches!(fn_abi.ret.mode, PassMode::Indirect { .. });
 
-        let return_type = self.context.new_struct_type(None, "result_overflow", &[result_field, overflow_field]);
+        let return_type = self.context.new_struct_type(self.loc, "result_overflow", &[result_field, overflow_field]);
         let result =
             if indirect {
-                let return_value = self.current_func().new_local(None, return_type.as_type(), "return_value");
+                let return_value = self.current_func().new_local(self.loc, return_type.as_type(), "return_value");
                 let return_param_type = return_type.as_type().make_pointer();
-                let return_param = self.context.new_parameter(None, return_param_type, "return_value");
-                let func = self.context.new_function(None, FunctionType::Extern, self.type_void(), &[return_param, param_a, param_b], func_name, false);
-                self.llbb().add_eval(None, self.context.new_call(None, func, &[return_value.get_address(None), lhs, rhs]));
+                let return_param = self.context.new_parameter(self.loc, return_param_type, "return_value");
+                let func = self.context.new_function(self.loc, FunctionType::Extern, self.type_void(), &[return_param, param_a, param_b], func_name, false);
+                self.llbb().add_eval(self.loc, self.context.new_call(self.loc, func, &[return_value.get_address(self.loc), lhs, rhs]));
                 return_value.to_rvalue()
             }
             else {
-                let func = self.context.new_function(None, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false);
-                self.context.new_call(None, func, &[lhs, rhs])
+                let func = self.context.new_function(self.loc, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false);
+                self.context.new_call(self.loc, func, &[lhs, rhs])
             };
-        let overflow = result.access_field(None, overflow_field);
-        let int_result = result.access_field(None, result_field);
-        return (int_result, overflow);
+        let overflow = result.access_field(self.loc, overflow_field);
+        let int_result = result.access_field(self.loc, result_field);
+        (int_result, overflow)
     }
 
     pub fn gcc_icmp(&mut self, op: IntPredicate, mut lhs: RValue<'gcc>, mut rhs: RValue<'gcc>) -> RValue<'gcc> {
@@ -397,7 +397,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if self.is_non_native_int_type(a_type) || self.is_non_native_int_type(b_type) {
             // This algorithm is based on compiler-rt's __cmpti2:
             // https://github.com/llvm-mirror/compiler-rt/blob/f0745e8476f069296a7c71accedd061dce4cdf79/lib/builtins/cmpti2.c#L21
-            let result = self.current_func().new_local(None, self.int_type, "icmp_result");
+            let result = self.current_func().new_local(self.loc, self.int_type, "icmp_result");
             let block1 = self.current_func().new_block("block1");
             let block2 = self.current_func().new_block("block2");
             let block3 = self.current_func().new_block("block3");
@@ -413,35 +413,35 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             // the sign is only on high).
             let unsigned_type = native_int_type.to_unsigned(&self.cx);
 
-            let lhs_low = self.context.new_cast(None, self.low(lhs), unsigned_type);
-            let rhs_low = self.context.new_cast(None, self.low(rhs), unsigned_type);
+            let lhs_low = self.context.new_cast(self.loc, self.low(lhs), unsigned_type);
+            let rhs_low = self.context.new_cast(self.loc, self.low(rhs), unsigned_type);
 
-            let condition = self.context.new_comparison(None, ComparisonOp::LessThan, self.high(lhs), self.high(rhs));
-            self.llbb().end_with_conditional(None, condition, block1, block2);
+            let condition = self.context.new_comparison(self.loc, ComparisonOp::LessThan, self.high(lhs), self.high(rhs));
+            self.llbb().end_with_conditional(self.loc, condition, block1, block2);
 
-            block1.add_assignment(None, result, self.context.new_rvalue_zero(self.int_type));
-            block1.end_with_jump(None, after);
+            block1.add_assignment(self.loc, result, self.context.new_rvalue_zero(self.int_type));
+            block1.end_with_jump(self.loc, after);
 
-            let condition = self.context.new_comparison(None, ComparisonOp::GreaterThan, self.high(lhs), self.high(rhs));
-            block2.end_with_conditional(None, condition, block3, block4);
+            let condition = self.context.new_comparison(self.loc, ComparisonOp::GreaterThan, self.high(lhs), self.high(rhs));
+            block2.end_with_conditional(self.loc, condition, block3, block4);
 
-            block3.add_assignment(None, result, self.context.new_rvalue_from_int(self.int_type, 2));
-            block3.end_with_jump(None, after);
+            block3.add_assignment(self.loc, result, self.context.new_rvalue_from_int(self.int_type, 2));
+            block3.end_with_jump(self.loc, after);
 
-            let condition = self.context.new_comparison(None, ComparisonOp::LessThan, lhs_low, rhs_low);
-            block4.end_with_conditional(None, condition, block5, block6);
+            let condition = self.context.new_comparison(self.loc, ComparisonOp::LessThan, lhs_low, rhs_low);
+            block4.end_with_conditional(self.loc, condition, block5, block6);
 
-            block5.add_assignment(None, result, self.context.new_rvalue_zero(self.int_type));
-            block5.end_with_jump(None, after);
+            block5.add_assignment(self.loc, result, self.context.new_rvalue_zero(self.int_type));
+            block5.end_with_jump(self.loc, after);
 
-            let condition = self.context.new_comparison(None, ComparisonOp::GreaterThan, lhs_low, rhs_low);
-            block6.end_with_conditional(None, condition, block7, block8);
+            let condition = self.context.new_comparison(self.loc, ComparisonOp::GreaterThan, lhs_low, rhs_low);
+            block6.end_with_conditional(self.loc, condition, block7, block8);
 
-            block7.add_assignment(None, result, self.context.new_rvalue_from_int(self.int_type, 2));
-            block7.end_with_jump(None, after);
+            block7.add_assignment(self.loc, result, self.context.new_rvalue_from_int(self.int_type, 2));
+            block7.end_with_jump(self.loc, after);
 
-            block8.add_assignment(None, result, self.context.new_rvalue_one(self.int_type));
-            block8.end_with_jump(None, after);
+            block8.add_assignment(self.loc, result, self.context.new_rvalue_one(self.int_type));
+            block8.end_with_jump(self.loc, after);
 
             // NOTE: since jumps were added in a place rustc does not expect, the current block in the
             // state need to be updated.
@@ -451,10 +451,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let (op, limit) =
                 match op {
                     IntPredicate::IntEQ => {
-                        return self.context.new_comparison(None, ComparisonOp::Equals, cmp, self.context.new_rvalue_one(self.int_type));
+                        return self.context.new_comparison(self.loc, ComparisonOp::Equals, cmp, self.context.new_rvalue_one(self.int_type));
                     },
                     IntPredicate::IntNE => {
-                        return self.context.new_comparison(None, ComparisonOp::NotEquals, cmp, self.context.new_rvalue_one(self.int_type));
+                        return self.context.new_comparison(self.loc, ComparisonOp::NotEquals, cmp, self.context.new_rvalue_one(self.int_type));
                     },
                     // TODO(antoyo): cast to u128 for unsigned comparison. See below.
                     IntPredicate::IntUGT => (ComparisonOp::Equals, 2),
@@ -466,39 +466,39 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                     IntPredicate::IntSLT => (ComparisonOp::Equals, 0),
                     IntPredicate::IntSLE => (ComparisonOp::LessThanEquals, 1),
                 };
-            self.context.new_comparison(None, op, cmp, self.context.new_rvalue_from_int(self.int_type, limit))
+            self.context.new_comparison(self.loc, op, cmp, self.context.new_rvalue_from_int(self.int_type, limit))
         }
         else if a_type.get_pointee().is_some() && b_type.get_pointee().is_some() {
             // NOTE: gcc cannot compare pointers to different objects, but rustc does that, so cast them to usize.
-            lhs = self.context.new_bitcast(None, lhs, self.usize_type);
-            rhs = self.context.new_bitcast(None, rhs, self.usize_type);
-            self.context.new_comparison(None, op.to_gcc_comparison(), lhs, rhs)
+            lhs = self.context.new_bitcast(self.loc, lhs, self.usize_type);
+            rhs = self.context.new_bitcast(self.loc, rhs, self.usize_type);
+            self.context.new_comparison(self.loc, op.to_gcc_comparison(), lhs, rhs)
         }
         else {
             if a_type != b_type {
                 // NOTE: because libgccjit cannot compare function pointers.
                 if a_type.dyncast_function_ptr_type().is_some() && b_type.dyncast_function_ptr_type().is_some() {
-                    lhs = self.context.new_cast(None, lhs, self.usize_type.make_pointer());
-                    rhs = self.context.new_cast(None, rhs, self.usize_type.make_pointer());
+                    lhs = self.context.new_cast(self.loc, lhs, self.usize_type.make_pointer());
+                    rhs = self.context.new_cast(self.loc, rhs, self.usize_type.make_pointer());
                 }
                 // NOTE: hack because we try to cast a vector type to the same vector type.
                 else if format!("{:?}", a_type) != format!("{:?}", b_type) {
-                    rhs = self.context.new_cast(None, rhs, a_type);
+                    rhs = self.context.new_cast(self.loc, rhs, a_type);
                 }
             }
             match op {
                 IntPredicate::IntUGT | IntPredicate::IntUGE | IntPredicate::IntULT | IntPredicate::IntULE => {
                     if !a_type.is_vector() {
                         let unsigned_type = a_type.to_unsigned(&self.cx);
-                        lhs = self.context.new_cast(None, lhs, unsigned_type);
-                        rhs = self.context.new_cast(None, rhs, unsigned_type);
+                        lhs = self.context.new_cast(self.loc, lhs, unsigned_type);
+                        rhs = self.context.new_cast(self.loc, rhs, unsigned_type);
                     }
                 },
                 // TODO(antoyo): we probably need to handle signed comparison for unsigned
                 // integers.
                 _ => (),
             }
-            self.context.new_comparison(None, op.to_gcc_comparison(), lhs, rhs)
+            self.context.new_comparison(self.loc, op.to_gcc_comparison(), lhs, rhs)
         }
     }
 
@@ -528,12 +528,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if a_native && b_native {
             // FIXME(antoyo): remove the casts when libgccjit can shift an unsigned number by an unsigned number.
             if a_type.is_unsigned(self) && b_type.is_signed(self) {
-                let a = self.context.new_cast(None, a, b_type);
+                let a = self.context.new_cast(self.loc, a, b_type);
                 let result = a << b;
-                self.context.new_cast(None, result, a_type)
+                self.context.new_cast(self.loc, result, a_type)
             }
             else if a_type.is_signed(self) && b_type.is_unsigned(self) {
-                let b = self.context.new_cast(None, b, a_type);
+                let b = self.context.new_cast(self.loc, b, a_type);
                 a << b
             }
             else {
@@ -557,40 +557,40 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let b0_block = func.new_block("b0");
             let actual_else_block = func.new_block("actual_else");
 
-            let result = func.new_local(None, a_type, "shiftResult");
+            let result = func.new_local(self.loc, a_type, "shiftResult");
 
             let b = self.gcc_int_cast(b, native_int_type);
             let sixty_four = self.gcc_int(native_int_type, 64);
             let zero = self.gcc_zero(native_int_type);
             let condition = self.gcc_icmp(IntPredicate::IntNE, self.gcc_and(b, sixty_four), zero);
-            self.llbb().end_with_conditional(None, condition, then_block, else_block);
+            self.llbb().end_with_conditional(self.loc, condition, then_block, else_block);
 
             let array_value = self.from_low_high_rvalues(a_type,
                 zero,
                 self.low(a) << (b - sixty_four),
             );
-            then_block.add_assignment(None, result, array_value);
-            then_block.end_with_jump(None, after_block);
+            then_block.add_assignment(self.loc, result, array_value);
+            then_block.end_with_jump(self.loc, after_block);
 
             let condition = self.gcc_icmp(IntPredicate::IntEQ, b, zero);
-            else_block.end_with_conditional(None, condition, b0_block, actual_else_block);
+            else_block.end_with_conditional(self.loc, condition, b0_block, actual_else_block);
 
-            b0_block.add_assignment(None, result, a);
-            b0_block.end_with_jump(None, after_block);
+            b0_block.add_assignment(self.loc, result, a);
+            b0_block.end_with_jump(self.loc, after_block);
 
             // NOTE: cast low to its unsigned type in order to perform a logical right shift.
             // TODO(antoyo): adjust this ^ comment.
             let unsigned_type = native_int_type.to_unsigned(&self.cx);
-            let casted_low = self.context.new_cast(None, self.low(a), unsigned_type);
-            let shift_value = self.context.new_cast(None, sixty_four - b, unsigned_type);
-            let high_low = self.context.new_cast(None, casted_low >> shift_value, native_int_type);
+            let casted_low = self.context.new_cast(self.loc, self.low(a), unsigned_type);
+            let shift_value = self.context.new_cast(self.loc, sixty_four - b, unsigned_type);
+            let high_low = self.context.new_cast(self.loc, casted_low >> shift_value, native_int_type);
 
             let array_value = self.from_low_high_rvalues(a_type,
                 self.low(a) << b,
                 (self.high(a) << b) | high_low,
             );
-            actual_else_block.add_assignment(None, result, array_value);
-            actual_else_block.end_with_jump(None, after_block);
+            actual_else_block.add_assignment(self.loc, result, array_value);
+            actual_else_block.end_with_jump(self.loc, after_block);
 
             // NOTE: since jumps were added in a place rustc does not expect, the current block in the
             // state need to be updated.
@@ -606,10 +606,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let native_int_type = arg_type.dyncast_array().expect("get element type");
             let lsb = self.low(arg);
             let swapped_lsb = self.gcc_bswap(lsb, width / 2);
-            let swapped_lsb = self.context.new_cast(None, swapped_lsb, native_int_type);
+            let swapped_lsb = self.context.new_cast(self.loc, swapped_lsb, native_int_type);
             let msb = self.high(arg);
             let swapped_msb = self.gcc_bswap(msb, width / 2);
-            let swapped_msb = self.context.new_cast(None, swapped_msb, native_int_type);
+            let swapped_msb = self.context.new_cast(self.loc, swapped_msb, native_int_type);
 
             // NOTE: we also need to swap the two elements here, in addition to swapping inside
             // the elements themselves like done above.
@@ -625,7 +625,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if param_type != arg_type {
             arg = self.bitcast(arg, param_type);
         }
-        self.cx.context.new_call(None, bswap, &[arg])
+        self.cx.context.new_call(self.loc, bswap, &[arg])
     }
 }
 
@@ -700,33 +700,33 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         }
     }
 
-    fn bitwise_operation(&self, operation: BinaryOp, a: RValue<'gcc>, mut b: RValue<'gcc>) -> RValue<'gcc> {
+    fn bitwise_operation(&self, operation: BinaryOp, a: RValue<'gcc>, mut b: RValue<'gcc>, loc: Option<Location<'gcc>>) -> RValue<'gcc> {
         let a_type = a.get_type();
         let b_type = b.get_type();
         let a_native = self.is_native_int_type_or_bool(a_type);
         let b_native = self.is_native_int_type_or_bool(b_type);
         if a_type.is_vector() && b_type.is_vector() {
             let b = self.bitcast_if_needed(b, a_type);
-            self.context.new_binary_op(None, operation, a_type, a, b)
+            self.context.new_binary_op(loc, operation, a_type, a, b)
         }
         else if a_native && b_native {
             if a_type != b_type {
-                b = self.context.new_cast(None, b, a_type);
+                b = self.context.new_cast(loc, b, a_type);
             }
-            self.context.new_binary_op(None, operation, a_type, a, b)
+            self.context.new_binary_op(loc, operation, a_type, a, b)
         }
         else {
             assert!(!a_native && !b_native, "both types should either be native or non-native for or operation");
             let native_int_type = a_type.dyncast_array().expect("get element type");
             self.from_low_high_rvalues(a_type,
-                self.context.new_binary_op(None, operation, native_int_type, self.low(a), self.low(b)),
-                self.context.new_binary_op(None, operation, native_int_type, self.high(a), self.high(b)),
+                self.context.new_binary_op(loc, operation, native_int_type, self.low(a), self.low(b)),
+                self.context.new_binary_op(loc, operation, native_int_type, self.high(a), self.high(b)),
             )
         }
     }
 
-    pub fn gcc_or(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        self.bitwise_operation(BinaryOp::BitwiseOr, a, b)
+    pub fn gcc_or(&self, a: RValue<'gcc>, b: RValue<'gcc>, loc: Option<Location<'gcc>>) -> RValue<'gcc> {
+        self.bitwise_operation(BinaryOp::BitwiseOr, a, b, loc)
     }
 
     // TODO(antoyo): can we use https://github.com/rust-lang/compiler-builtins/blob/master/src/int/mod.rs#L379 instead?
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index f162ef831b76..0849c6266f19 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -640,7 +640,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                     let new_low = self.gcc_int_cast(reversed_high, typ);
                     let new_high = self.shl(self.gcc_int_cast(reversed_low, typ), sixty_four);
 
-                    self.gcc_or(new_low, new_high)
+                    self.gcc_or(new_low, new_high, self.loc)
                 },
                 _ => {
                     panic!("cannot bit reverse with width = {}", width);
@@ -685,44 +685,44 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let first_elem = self.context.new_array_access(None, result, zero);
                 let first_value = self.gcc_int_cast(self.context.new_call(None, clzll, &[high]), arg_type);
                 self.llbb()
-                    .add_assignment(None, first_elem, first_value);
+                    .add_assignment(self.loc, first_elem, first_value);
 
-                let second_elem = self.context.new_array_access(None, result, one);
-                let cast = self.gcc_int_cast(self.context.new_call(None, clzll, &[low]), arg_type);
+                let second_elem = self.context.new_array_access(self.loc, result, one);
+                let cast = self.gcc_int_cast(self.context.new_call(self.loc, clzll, &[low]), arg_type);
                 let second_value = self.add(cast, sixty_four);
                 self.llbb()
-                    .add_assignment(None, second_elem, second_value);
+                    .add_assignment(self.loc, second_elem, second_value);
 
-                let third_elem = self.context.new_array_access(None, result, two);
+                let third_elem = self.context.new_array_access(self.loc, result, two);
                 let third_value = self.const_uint(arg_type, 128);
                 self.llbb()
-                    .add_assignment(None, third_elem, third_value);
+                    .add_assignment(self.loc, third_elem, third_value);
 
-                let not_high = self.context.new_unary_op(None, UnaryOp::LogicalNegate, self.u64_type, high);
-                let not_low = self.context.new_unary_op(None, UnaryOp::LogicalNegate, self.u64_type, low);
+                let not_high = self.context.new_unary_op(self.loc, UnaryOp::LogicalNegate, self.u64_type, high);
+                let not_low = self.context.new_unary_op(self.loc, UnaryOp::LogicalNegate, self.u64_type, low);
                 let not_low_and_not_high = not_low & not_high;
                 let index = not_high + not_low_and_not_high;
                 // NOTE: the following cast is necessary to avoid a GIMPLE verification failure in
                 // gcc.
                 // TODO(antoyo): do the correct verification in libgccjit to avoid an error at the
                 // compilation stage.
-                let index = self.context.new_cast(None, index, self.i32_type);
+                let index = self.context.new_cast(self.loc, index, self.i32_type);
 
-                let res = self.context.new_array_access(None, result, index);
+                let res = self.context.new_array_access(self.loc, result, index);
 
                 return self.gcc_int_cast(res.to_rvalue(), arg_type);
             }
             else {
                 let count_leading_zeroes = self.context.get_builtin_function("__builtin_clzll");
-                let arg = self.context.new_cast(None, arg, self.ulonglong_type);
+                let arg = self.context.new_cast(self.loc, arg, self.ulonglong_type);
                 let diff = self.ulonglong_type.get_size() as i64 - arg_type.get_size() as i64;
                 let diff = self.context.new_rvalue_from_long(self.int_type, diff * 8);
-                let res = self.context.new_call(None, count_leading_zeroes, &[arg]) - diff;
-                return self.context.new_cast(None, res, arg_type);
+                let res = self.context.new_call(self.loc, count_leading_zeroes, &[arg]) - diff;
+                return self.context.new_cast(self.loc, res, arg_type);
             };
         let count_leading_zeroes = self.context.get_builtin_function(count_leading_zeroes);
-        let res = self.context.new_call(None, count_leading_zeroes, &[arg]);
-        self.context.new_cast(None, res, arg_type)
+        let res = self.context.new_call(self.loc, count_leading_zeroes, &[arg]);
+        self.context.new_cast(self.loc, res, arg_type)
     }
 
     fn count_trailing_zeroes(&mut self, _width: u64, arg: RValue<'gcc>) -> RValue<'gcc> {
@@ -766,58 +766,58 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
                 let ctzll = self.context.get_builtin_function("__builtin_ctzll");
 
-                let first_elem = self.context.new_array_access(None, result, zero);
-                let first_value = self.gcc_int_cast(self.context.new_call(None, ctzll, &[low]), arg_type);
+                let first_elem = self.context.new_array_access(self.loc, result, zero);
+                let first_value = self.gcc_int_cast(self.context.new_call(self.loc, ctzll, &[low]), arg_type);
                 self.llbb()
-                    .add_assignment(None, first_elem, first_value);
+                    .add_assignment(self.loc, first_elem, first_value);
 
-                let second_elem = self.context.new_array_access(None, result, one);
-                let second_value = self.gcc_add(self.gcc_int_cast(self.context.new_call(None, ctzll, &[high]), arg_type), sixty_four);
+                let second_elem = self.context.new_array_access(self.loc, result, one);
+                let second_value = self.gcc_add(self.gcc_int_cast(self.context.new_call(self.loc, ctzll, &[high]), arg_type), sixty_four);
                 self.llbb()
-                    .add_assignment(None, second_elem, second_value);
+                    .add_assignment(self.loc, second_elem, second_value);
 
-                let third_elem = self.context.new_array_access(None, result, two);
+                let third_elem = self.context.new_array_access(self.loc, result, two);
                 let third_value = self.gcc_int(arg_type, 128);
                 self.llbb()
-                    .add_assignment(None, third_elem, third_value);
+                    .add_assignment(self.loc, third_elem, third_value);
 
-                let not_low = self.context.new_unary_op(None, UnaryOp::LogicalNegate, self.u64_type, low);
-                let not_high = self.context.new_unary_op(None, UnaryOp::LogicalNegate, self.u64_type, high);
+                let not_low = self.context.new_unary_op(self.loc, UnaryOp::LogicalNegate, self.u64_type, low);
+                let not_high = self.context.new_unary_op(self.loc, UnaryOp::LogicalNegate, self.u64_type, high);
                 let not_low_and_not_high = not_low & not_high;
                 let index = not_low + not_low_and_not_high;
                 // NOTE: the following cast is necessary to avoid a GIMPLE verification failure in
                 // gcc.
                 // TODO(antoyo): do the correct verification in libgccjit to avoid an error at the
                 // compilation stage.
-                let index = self.context.new_cast(None, index, self.i32_type);
+                let index = self.context.new_cast(self.loc, index, self.i32_type);
 
-                let res = self.context.new_array_access(None, result, index);
+                let res = self.context.new_array_access(self.loc, result, index);
 
                 return self.gcc_int_cast(res.to_rvalue(), result_type);
             }
             else {
                 let count_trailing_zeroes = self.context.get_builtin_function("__builtin_ctzll");
                 let arg_size = arg_type.get_size();
-                let casted_arg = self.context.new_cast(None, arg, self.ulonglong_type);
+                let casted_arg = self.context.new_cast(self.loc, arg, self.ulonglong_type);
                 let byte_diff = self.ulonglong_type.get_size() as i64 - arg_size as i64;
                 let diff = self.context.new_rvalue_from_long(self.int_type, byte_diff * 8);
                 let mask = self.context.new_rvalue_from_long(arg_type, -1); // To get the value with all bits set.
-                let masked = mask & self.context.new_unary_op(None, UnaryOp::BitwiseNegate, arg_type, arg);
-                let cond = self.context.new_comparison(None, ComparisonOp::Equals, masked, mask);
-                let diff = diff * self.context.new_cast(None, cond, self.int_type);
-                let res = self.context.new_call(None, count_trailing_zeroes, &[casted_arg]) - diff;
-                return self.context.new_cast(None, res, result_type);
+                let masked = mask & self.context.new_unary_op(self.loc, UnaryOp::BitwiseNegate, arg_type, arg);
+                let cond = self.context.new_comparison(self.loc, ComparisonOp::Equals, masked, mask);
+                let diff = diff * self.context.new_cast(self.loc, cond, self.int_type);
+                let res = self.context.new_call(self.loc, count_trailing_zeroes, &[casted_arg]) - diff;
+                return self.context.new_cast(self.loc, res, result_type);
             };
         let count_trailing_zeroes = self.context.get_builtin_function(count_trailing_zeroes);
         let arg =
             if arg_type != expected_type {
-                self.context.new_cast(None, arg, expected_type)
+                self.context.new_cast(self.loc, arg, expected_type)
             }
             else {
                 arg
             };
-        let res = self.context.new_call(None, count_trailing_zeroes, &[arg]);
-        self.context.new_cast(None, res, result_type)
+        let res = self.context.new_call(self.loc, count_trailing_zeroes, &[arg]);
+        self.context.new_cast(self.loc, res, result_type)
     }
 
     fn pop_count(&mut self, value: RValue<'gcc>) -> RValue<'gcc> {
@@ -859,8 +859,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let counter = self.current_func().new_local(None, counter_type, "popcount_counter");
         let val = self.current_func().new_local(None, value_type, "popcount_value");
         let zero = self.gcc_zero(counter_type);
-        self.llbb().add_assignment(None, counter, zero);
-        self.llbb().add_assignment(None, val, value);
+        self.llbb().add_assignment(self.loc, counter, zero);
+        self.llbb().add_assignment(self.loc, val, value);
         self.br(loop_head);
 
         // check if value isn't zero
@@ -874,12 +874,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let one = self.gcc_int(value_type, 1);
         let sub = self.gcc_sub(val.to_rvalue(), one);
         let op = self.gcc_and(val.to_rvalue(), sub);
-        loop_body.add_assignment(None, val, op);
+        loop_body.add_assignment(self.loc, val, op);
 
         // counter += 1
         let one = self.gcc_int(counter_type, 1);
         let op = self.gcc_add(counter.to_rvalue(), one);
-        loop_body.add_assignment(None, counter, op);
+        loop_body.add_assignment(self.loc, counter, op);
         self.br(loop_head);
 
         // end of loop
@@ -922,7 +922,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if signed {
             // Based on algorithm from: https://stackoverflow.com/a/56531252/389119
             let func = self.current_func.borrow().expect("func");
-            let res = func.new_local(None, result_type, "saturating_sum");
+            let res = func.new_local(self.loc, result_type, "saturating_sum");
             let supports_native_type = self.is_native_int_type(result_type);
             let overflow =
                 if supports_native_type {
@@ -936,7 +936,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                             _ => unreachable!(),
                         };
                     let overflow_func = self.context.get_builtin_function(func_name);
-                    self.overflow_call(overflow_func, &[lhs, rhs, res.get_address(None)], None)
+                    self.overflow_call(overflow_func, &[lhs, rhs, res.get_address(self.loc)], None)
                 }
                 else {
                     let func_name =
@@ -945,7 +945,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                             _ => unreachable!(),
                         };
                     let (int_result, overflow) = self.operation_with_overflow(func_name, lhs, rhs);
-                    self.llbb().add_assignment(None, res, int_result);
+                    self.llbb().add_assignment(self.loc, res, int_result);
                     overflow
                 };
 
@@ -958,10 +958,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let shifted = self.gcc_lshr(self.gcc_int_cast(lhs, unsigned_type), self.gcc_int(unsigned_type, width as i64 - 1));
             let uint_max = self.gcc_not(self.gcc_int(unsigned_type, 0));
             let int_max = self.gcc_lshr(uint_max, self.gcc_int(unsigned_type, 1));
-            then_block.add_assignment(None, res, self.gcc_int_cast(self.gcc_add(shifted, int_max), result_type));
-            then_block.end_with_jump(None, after_block);
+            then_block.add_assignment(self.loc, res, self.gcc_int_cast(self.gcc_add(shifted, int_max), result_type));
+            then_block.end_with_jump(self.loc, after_block);
 
-            self.llbb().end_with_conditional(None, overflow, then_block, after_block);
+            self.llbb().end_with_conditional(self.loc, overflow, then_block, after_block);
 
             // NOTE: since jumps were added in a place rustc does not
             // expect, the current block in the state need to be updated.
@@ -974,7 +974,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let res = self.gcc_add(lhs, rhs);
             let cond = self.gcc_icmp(IntPredicate::IntULT, res, lhs);
             let value = self.gcc_neg(self.gcc_int_cast(cond, result_type));
-            self.gcc_or(res, value)
+            self.gcc_or(res, value, self.loc)
         }
     }
 
@@ -984,7 +984,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if signed {
             // Based on algorithm from: https://stackoverflow.com/a/56531252/389119
             let func = self.current_func.borrow().expect("func");
-            let res = func.new_local(None, result_type, "saturating_diff");
+            let res = func.new_local(self.loc, result_type, "saturating_diff");
             let supports_native_type = self.is_native_int_type(result_type);
             let overflow =
                 if supports_native_type {
@@ -998,7 +998,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                             _ => unreachable!(),
                         };
                     let overflow_func = self.context.get_builtin_function(func_name);
-                    self.overflow_call(overflow_func, &[lhs, rhs, res.get_address(None)], None)
+                    self.overflow_call(overflow_func, &[lhs, rhs, res.get_address(self.loc)], None)
                 }
                 else {
                     let func_name =
@@ -1007,7 +1007,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                             _ => unreachable!(),
                         };
                     let (int_result, overflow) = self.operation_with_overflow(func_name, lhs, rhs);
-                    self.llbb().add_assignment(None, res, int_result);
+                    self.llbb().add_assignment(self.loc, res, int_result);
                     overflow
                 };
 
@@ -1020,10 +1020,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let shifted = self.gcc_lshr(self.gcc_int_cast(lhs, unsigned_type), self.gcc_int(unsigned_type, width as i64 - 1));
             let uint_max = self.gcc_not(self.gcc_int(unsigned_type, 0));
             let int_max = self.gcc_lshr(uint_max, self.gcc_int(unsigned_type, 1));
-            then_block.add_assignment(None, res, self.gcc_int_cast(self.gcc_add(shifted, int_max), result_type));
-            then_block.end_with_jump(None, after_block);
+            then_block.add_assignment(self.loc, res, self.gcc_int_cast(self.gcc_add(shifted, int_max), result_type));
+            then_block.end_with_jump(self.loc, after_block);
 
-            self.llbb().end_with_conditional(None, overflow, then_block, after_block);
+            self.llbb().end_with_conditional(self.loc, overflow, then_block, after_block);
 
             // NOTE: since jumps were added in a place rustc does not
             // expect, the current block in the state need to be updated.

From aed59f0a510b4e47496d871051026c885bccc3a1 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 26 Feb 2024 18:12:12 +0100
Subject: [PATCH 548/997] Add `clone-gcc` command

---
 build_system/src/clone_gcc.rs | 79 +++++++++++++++++++++++++++++++++++
 build_system/src/config.rs    | 13 ++++--
 build_system/src/main.rs      | 19 +++++----
 build_system/src/prepare.rs   |  4 +-
 build_system/src/test.rs      | 17 +++-----
 build_system/src/utils.rs     | 57 +++++++++++++++++++------
 6 files changed, 153 insertions(+), 36 deletions(-)
 create mode 100644 build_system/src/clone_gcc.rs

diff --git a/build_system/src/clone_gcc.rs b/build_system/src/clone_gcc.rs
new file mode 100644
index 000000000000..aee46afaeb04
--- /dev/null
+++ b/build_system/src/clone_gcc.rs
@@ -0,0 +1,79 @@
+use crate::config::ConfigInfo;
+use crate::utils::{git_clone, run_command_with_output};
+
+use std::path::{Path, PathBuf};
+
+fn show_usage() {
+    println!(
+        r#"
+`clone-gcc` command help:
+
+    --out-path         : Location where the GCC repository will be cloned (default: `./gcc`)"#
+    );
+    ConfigInfo::show_usage();
+    println!("    --help                 : Show this help");
+}
+
+#[derive(Default)]
+struct Args {
+    out_path: PathBuf,
+    config_info: ConfigInfo,
+}
+
+impl Args {
+    fn new() -> Result<Option<Self>, String> {
+        let mut command_args = Self::default();
+
+        let mut out_path = None;
+
+        // We skip binary name and the `clone-gcc` command.
+        let mut args = std::env::args().skip(2);
+
+        while let Some(arg) = args.next() {
+            match arg.as_str() {
+                "--out-path" => match args.next() {
+                    Some(path) if !path.is_empty() => out_path = Some(path),
+                    _ => {
+                        return Err("Expected an argument after `--out-path`, found nothing".into())
+                    }
+                },
+                "--help" => {
+                    show_usage();
+                    return Ok(None);
+                }
+                arg => {
+                    if !command_args.config_info.parse_argument(arg, &mut args)? {
+                        return Err(format!("Unknown option {}", arg));
+                    }
+                }
+            }
+        }
+        command_args.out_path = match out_path {
+            Some(p) => p.into(),
+            None => PathBuf::from("./gcc"),
+        };
+        return Ok(Some(command_args));
+    }
+}
+
+pub fn run() -> Result<(), String> {
+    let Some(args) = Args::new()? else {
+        return Ok(());
+    };
+
+    let result = git_clone("https://github.com/antoyo/gcc", Some(&args.out_path), false)?;
+    if result.ran_clone {
+        let gcc_commit = args.config_info.get_gcc_commit()?;
+        println!("Checking out GCC commit `{}`...", gcc_commit);
+        run_command_with_output(
+            &[&"git", &"checkout", &gcc_commit],
+            Some(Path::new(&result.repo_dir)),
+        )?;
+    } else {
+        println!(
+            "There is already a GCC folder in `{}`, leaving things as is...",
+            args.out_path.display()
+        );
+    }
+    Ok(())
+}
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index f6f039370180..c633ee57d4a3 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -192,9 +192,7 @@ impl ConfigInfo {
         command
     }
 
-    fn download_gccjit_if_needed(&mut self) -> Result<(), String> {
-        let output_dir = Path::new(crate::BUILD_DIR).join("libgccjit");
-
+    pub fn get_gcc_commit(&self) -> Result<String, String> {
         let commit_hash_file = self.compute_path("libgccjit.version");
         let content = fs::read_to_string(&commit_hash_file).map_err(|_| {
             format!(
@@ -212,7 +210,14 @@ impl ConfigInfo {
                 commit,
             ));
         }
-        let output_dir = output_dir.join(commit);
+        Ok(commit.to_string())
+    }
+
+    fn download_gccjit_if_needed(&mut self) -> Result<(), String> {
+        let output_dir = Path::new(crate::BUILD_DIR).join("libgccjit");
+        let commit = self.get_gcc_commit()?;
+
+        let output_dir = output_dir.join(&commit);
         if !output_dir.is_dir() {
             std::fs::create_dir_all(&output_dir).map_err(|err| {
                 format!(
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index 18dc4b21a962..48ffbc7a9075 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -4,6 +4,7 @@ use std::process;
 mod build;
 mod cargo;
 mod clean;
+mod clone_gcc;
 mod config;
 mod info;
 mod prepare;
@@ -27,19 +28,21 @@ fn usage() {
         "\
 Available commands for build_system:
 
-    cargo    : Run cargo command
-    clean    : Run clean command
-    prepare  : Run prepare command
-    build    : Run build command
-    test     : Run test command
-    info:    : Run info command
-    --help   : Show this message"
+    cargo     : Run cargo command
+    clean     : Run clean command
+    prepare   : Run prepare command
+    build     : Run build command
+    test      : Run test command
+    info      : Run info command
+    clone-gcc : Run clone-gcc command
+    --help    : Show this message"
     );
 }
 
 pub enum Command {
     Cargo,
     Clean,
+    CloneGcc,
     Prepare,
     Build,
     Test,
@@ -58,6 +61,7 @@ fn main() {
         Some("build") => Command::Build,
         Some("test") => Command::Test,
         Some("info") => Command::Info,
+        Some("clone-gcc") => Command::CloneGcc,
         Some("--help") => {
             usage();
             process::exit(0);
@@ -77,6 +81,7 @@ fn main() {
         Command::Build => build::run(),
         Command::Test => test::run(),
         Command::Info => info::run(),
+        Command::CloneGcc => clone_gcc::run(),
     } {
         eprintln!("Command failed to run: {e}");
         process::exit(1);
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 66f440f53553..4ea334ad8b90 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -1,6 +1,6 @@
 use crate::rustc_info::get_rustc_path;
 use crate::utils::{
-    cargo_install, git_clone, remove_file, run_command, run_command_with_output, walk_dir,
+    cargo_install, git_clone_root_dir, remove_file, run_command, run_command_with_output, walk_dir,
 };
 
 use std::fs;
@@ -152,7 +152,7 @@ fn clone_and_setup<F>(repo_url: &str, checkout_commit: &str, extra: Option<F>) -
 where
     F: Fn(&Path) -> Result<(), String>,
 {
-    let clone_result = git_clone(repo_url, Some(&Path::new(crate::BUILD_DIR)), false)?;
+    let clone_result = git_clone_root_dir(repo_url, &Path::new(crate::BUILD_DIR), false)?;
     if !clone_result.ran_clone {
         println!("`{}` has already been cloned", clone_result.repo_name);
     }
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 17b1868502aa..470bb2431d56 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1,7 +1,7 @@
 use crate::build;
 use crate::config::{Channel, ConfigInfo};
 use crate::utils::{
-    get_toolchain, git_clone, remove_file, run_command, run_command_with_env,
+    get_toolchain, git_clone, git_clone_root_dir, remove_file, run_command, run_command_with_env,
     run_command_with_output_and_env, rustc_version_info, split_args, walk_dir,
 };
 
@@ -487,15 +487,10 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
     );
     let rust_dir_path = Path::new(crate::BUILD_DIR).join("rust");
     // If the repository was already cloned, command will fail, so doesn't matter.
-    let _ = run_command_with_output_and_env(
-        &[
-            &"git",
-            &"clone",
-            &"https://github.com/rust-lang/rust.git",
-            &rust_dir_path,
-        ],
-        None,
-        Some(env),
+    let _ = git_clone(
+        "https://github.com/rust-lang/rust.git",
+        Some(&rust_dir_path),
+        false,
     );
     let rust_dir: Option<&Path> = Some(&rust_dir_path);
     run_command(&[&"git", &"checkout", &"--", &"tests/"], rust_dir)?;
@@ -720,7 +715,7 @@ fn test_projects(env: &Env, args: &TestArg) -> Result<(), String> {
 
     let run_tests = |projects_path, iter: &mut dyn Iterator<Item = &&str>| -> Result<(), String> {
         for project in iter {
-            let clone_result = git_clone(project, Some(projects_path), true)?;
+            let clone_result = git_clone_root_dir(project, projects_path, true)?;
             let repo_path = Path::new(&clone_result.repo_dir);
             run_cargo_command(&[&"build", &"--release"], Some(repo_path), env, args)?;
             run_cargo_command(&[&"test"], Some(repo_path), env, args)?;
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 33dcd9ef7005..56f1abaf1984 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -2,7 +2,7 @@ use std::collections::HashMap;
 use std::ffi::OsStr;
 use std::fmt::Debug;
 use std::fs;
-use std::path::Path;
+use std::path::{Path, PathBuf};
 use std::process::{Command, ExitStatus, Output};
 
 fn get_command_inner(
@@ -254,20 +254,12 @@ pub struct CloneResult {
     pub repo_dir: String,
 }
 
-pub fn git_clone(
+fn git_clone_inner(
     to_clone: &str,
-    dest: Option<&Path>,
+    dest: &Path,
     shallow_clone: bool,
+    repo_name: String,
 ) -> Result<CloneResult, String> {
-    let repo_name = to_clone.split('/').last().unwrap();
-    let repo_name = match repo_name.strip_suffix(".git") {
-        Some(n) => n.to_string(),
-        None => repo_name.to_string(),
-    };
-
-    let dest = dest
-        .map(|dest| dest.join(&repo_name))
-        .unwrap_or_else(|| Path::new(&repo_name).into());
     if dest.is_dir() {
         return Ok(CloneResult {
             ran_clone: false,
@@ -289,6 +281,47 @@ pub fn git_clone(
     })
 }
 
+fn get_repo_name(url: &str) -> String {
+    let repo_name = url.split('/').last().unwrap();
+    match repo_name.strip_suffix(".git") {
+        Some(n) => n.to_string(),
+        None => repo_name.to_string(),
+    }
+}
+
+pub fn git_clone(
+    to_clone: &str,
+    dest: Option<&Path>,
+    shallow_clone: bool,
+) -> Result<CloneResult, String> {
+    let repo_name = get_repo_name(to_clone);
+    let tmp: PathBuf;
+
+    let dest = match dest {
+        Some(dest) => dest,
+        None => {
+            tmp = repo_name.clone().into();
+            &tmp
+        }
+    };
+    git_clone_inner(to_clone, dest, shallow_clone, repo_name)
+}
+
+pub fn git_clone_root_dir(
+    to_clone: &str,
+    dest_parent_dir: &Path,
+    shallow_clone: bool,
+) -> Result<CloneResult, String> {
+    let repo_name = get_repo_name(to_clone);
+
+    git_clone_inner(
+        to_clone,
+        &dest_parent_dir.join(&repo_name),
+        shallow_clone,
+        repo_name,
+    )
+}
+
 pub fn walk_dir<P, D, F>(dir: P, mut dir_cb: D, mut file_cb: F) -> Result<(), String>
 where
     P: AsRef<Path>,

From 6560fecbdfba0d4b2bd874e26008fe5716891589 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 27 Feb 2024 18:48:29 +0100
Subject: [PATCH 549/997] Add documentation on git_clone_root_dir

---
 build_system/src/utils.rs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 56f1abaf1984..d9c13fd143d1 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -307,6 +307,10 @@ pub fn git_clone(
     git_clone_inner(to_clone, dest, shallow_clone, repo_name)
 }
 
+/// This function differs from `git_clone` in how it handles *where* the repository will be cloned.
+/// In `git_clone`, it is cloned in the provided path. In this function, the path you provide is
+/// the parent folder. So if you pass "a" as folder and try to clone "b.git", it will be cloned into
+/// `a/b`.
 pub fn git_clone_root_dir(
     to_clone: &str,
     dest_parent_dir: &Path,

From 8879155e563cf9050754f12abcd170806fa63acd Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Wed, 28 Feb 2024 09:09:56 +0800
Subject: [PATCH 550/997] fix(libgccjit.version): Update GCC commit version

---
 libgccjit.version | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libgccjit.version b/libgccjit.version
index 20aebf091a70..ad2c3b12b874 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-d24c8dae3
+cf9554126

From 5b053a3c3c62ea77f0b8865a4ac97a90bb606c78 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Wed, 28 Feb 2024 09:18:22 +0800
Subject: [PATCH 551/997] fix(Cargo.lock): Update Cargo.lock

---
 Cargo.lock | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index d73101f97d6a..c004c7b992f7 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -80,7 +80,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#4b7aba76891e6436984f7f098fe92824d95194d5"
+source = "git+https://github.com/antoyo/gccjit.rs#af31863f5f2a32f1c805444bfb6e8c174d6da8f4"
 dependencies = [
  "gccjit_sys",
 ]
@@ -88,7 +88,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#4b7aba76891e6436984f7f098fe92824d95194d5"
+source = "git+https://github.com/antoyo/gccjit.rs#af31863f5f2a32f1c805444bfb6e8c174d6da8f4"
 dependencies = [
  "libc",
 ]

From 6170f48e3f5800a75e2ded5e55669048acfcbb2f Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Wed, 28 Feb 2024 10:04:25 +0800
Subject: [PATCH 552/997] fix(builder.rs): Add `cfg(feature = "master")` to
 set_location

---
 src/builder.rs   | 14 ++++++--------
 src/debuginfo.rs | 10 ++++------
 2 files changed, 10 insertions(+), 14 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index c5d3ed8c8a1f..663e42aaf85d 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -26,7 +26,6 @@ use rustc_codegen_ssa::traits::{
 use rustc_data_structures::fx::FxHashSet;
 use rustc_middle::bug;
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrs;
-use rustc_middle::mir::Rvalue;
 use rustc_middle::ty::{ParamEnv, Ty, TyCtxt};
 use rustc_middle::ty::layout::{FnAbiError, FnAbiOfHelpers, FnAbiRequest, HasParamEnv, HasTyCtxt, LayoutError, LayoutOfHelpers, TyAndLayout};
 use rustc_span::Span;
@@ -401,9 +400,8 @@ impl<'gcc, 'tcx> BackendTypes for Builder<'_, 'gcc, 'tcx> {
 
 pub fn set_rval_location<'a, 'gcc, 'tcx>(bx: &mut Builder<'a,'gcc,'tcx>, r:RValue<'gcc>) -> RValue<'gcc> {
     if bx.loc.is_some(){
-        unsafe {
-            r.set_location(bx.loc.unwrap());
-        }
+        #[cfg(feature = "master")]
+        r.set_location(bx.loc.unwrap());
     }
     r
     
@@ -545,9 +543,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn fmul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
         let i=a * b;
         if self.loc.is_some() {
-            unsafe{
-                i.set_location(self.loc.clone().unwrap());
-            }
+            #[cfg(feature = "master")]
+            i.set_location(self.loc.clone().unwrap());
         }
         i
     }
@@ -666,7 +663,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let ret = self.cx.gcc_or(a, b, self.loc);
         
         if self.loc.is_some() {
-            unsafe { ret.set_location(self.loc.unwrap()); }
+            #[cfg(feature = "master")]
+            ret.set_location(self.loc.unwrap());
         }
         ret
     }
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index e01624ce15ea..0ac5841df633 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -32,10 +32,8 @@ impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods for Builder<'a, 'gcc, 'tcx> {
         _fragment: Option<Range<Size>>,
     ) {
         // Not sure if this is correct, probably wrong but still keep it here.
-        unsafe {
-            #[cfg(feature = "master")]
-            variable_alloca.set_location(dbg_loc);
-        }
+        #[cfg(feature = "master")]
+        variable_alloca.set_location(dbg_loc);
     }
 
     fn insert_reference_to_gdb_debug_scripts_section_global(&mut self) {
@@ -45,7 +43,7 @@ impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods for Builder<'a, 'gcc, 'tcx> {
     /// Currently, this function is not yet implemented. It seems that the
     /// debug name and the mangled name should both be included in the LValues.
     /// Besides, a function to get the rvalue type(m_is_lvalue) should also be included.
-    fn set_var_name(&mut self, value: RValue<'gcc>, name: &str) {
+    fn set_var_name(&mut self, _value: RValue<'gcc>, _name: &str) {
         //unimplemented!();
     }
 
@@ -264,7 +262,7 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 }
                 rustc_span::RealFileName::Remapped {
                     local_path,
-                    virtual_name,
+                    virtual_name:_,
                 } => if let Some(name) = local_path.as_ref() {
                     if let Some(name) = name.to_str(){
                         self.context.new_location(

From 09fd9087b6ee5245e5b87fdb2dd48e7770c41fd6 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Wed, 28 Feb 2024 11:37:49 +0800
Subject: [PATCH 553/997] fix(code fmt): builder.rs & base.rs

---
 src/base.rs    |  4 ++--
 src/builder.rs | 17 +++--------------
 2 files changed, 5 insertions(+), 16 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index bcf467839a45..773e234150d1 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -184,8 +184,8 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
             // wrapper here
             maybe_create_entry_wrapper::<Builder<'_, '_, '_>>(&cx);
 
-            // FINALIZE debuginfo
-            if cx.sess().opts.debuginfo != DebugInfo::None  {
+            // Finalize debuginfo
+            if cx.sess().opts.debuginfo != DebugInfo::None {
                 cx.debuginfo_finalize();
             }
         }
diff --git a/src/builder.rs b/src/builder.rs
index 663e42aaf85d..87b5b04af139 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -70,7 +70,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             cx,
             block,
             stack_var_count: Cell::new(0),
-            loc:None
+            loc: None
         }
     }
 
@@ -541,12 +541,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn fmul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        let i=a * b;
-        if self.loc.is_some() {
-            #[cfg(feature = "master")]
-            i.set_location(self.loc.clone().unwrap());
-        }
-        i
+        self.cx.context.new_binary_op(self.loc, BinaryOp::Mult, a.get_type(), a, b)
     }
 
     fn udiv(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -660,13 +655,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn or(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        let ret = self.cx.gcc_or(a, b, self.loc);
-        
-        if self.loc.is_some() {
-            #[cfg(feature = "master")]
-            ret.set_location(self.loc.unwrap());
-        }
-        ret
+        self.cx.gcc_or(a, b, self.loc)
     }
 
     fn xor(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {

From 51cd5f1c78462860890da4487616569400369378 Mon Sep 17 00:00:00 2001
From: tempdragon <88025134+tempdragon@users.noreply.github.com>
Date: Thu, 29 Feb 2024 01:10:51 +0800
Subject: [PATCH 554/997] fix(code fmt): Apply style suggestions from code
 review

Co-authored-by: antoyo <antoyo@users.noreply.github.com>
---
 src/context.rs   |  2 +-
 src/debuginfo.rs | 14 ++++++--------
 src/lib.rs       |  2 +-
 3 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/src/context.rs b/src/context.rs
index 9dbb3751d47b..cca37168880b 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -345,7 +345,7 @@ impl<'gcc, 'tcx> BackendTypes for CodegenCx<'gcc, 'tcx> {
     type Funclet = (); // TODO(antoyo)
 
     type DIScope = (); // TODO(antoyo)
-    type DILocation = Location<'gcc>; // TODO(antoyo)
+    type DILocation = Location<'gcc>;
     type DIVariable = (); // TODO(antoyo)
 }
 
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index 0ac5841df633..51c5de2920b5 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -31,7 +31,7 @@ impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods for Builder<'a, 'gcc, 'tcx> {
         _indirect_offsets: &[Size],
         _fragment: Option<Range<Size>>,
     ) {
-        // Not sure if this is correct, probably wrong but still keep it here.
+        // FIXME(tempdragon): Not sure if this is correct, probably wrong but still keep it here.
         #[cfg(feature = "master")]
         variable_alloca.set_location(dbg_loc);
     }
@@ -40,11 +40,10 @@ impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods for Builder<'a, 'gcc, 'tcx> {
         // TODO(antoyo): insert reference to gdb debug scripts section global.
     }
 
-    /// Currently, this function is not yet implemented. It seems that the
+    /// FIXME(tempdragon): Currently, this function is not yet implemented. It seems that the
     /// debug name and the mangled name should both be included in the LValues.
     /// Besides, a function to get the rvalue type(m_is_lvalue) should also be included.
     fn set_var_name(&mut self, _value: RValue<'gcc>, _name: &str) {
-        //unimplemented!();
     }
 
     fn set_dbg_loc(&mut self, dbg_loc: Self::DILocation) {
@@ -213,7 +212,7 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         _scope_metadata: Self::DIScope,
         _file: &SourceFile,
     ) -> Self::DIScope {
-        //unimplemented!();
+        // TODO(antoyo): implement.
     }
 
     fn debuginfo_finalize(&self) {
@@ -238,7 +237,7 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         _fn_abi: &FnAbi<'tcx, Ty<'tcx>>,
         _maybe_definition_llfn: Option<RValue<'gcc>>,
     ) -> Self::DIScope {
-        //unimplemented!();
+        // TODO(antoyo): implement.
     }
 
     fn dbg_loc(
@@ -247,7 +246,6 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         _inlined_at: Option<Self::DILocation>,
         span: Span,
     ) -> Self::DILocation {
-        //unimplemented!();
         let pos = span.lo();
         let (file, line, col) = self.lookup_debug_loc(pos);
         let loc = match &file.name {
@@ -256,7 +254,7 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                     if let Some(name) = name.to_str() {
                         self.context
                             .new_location(name, line as i32, col as i32)
-                    }else{
+                    } else{
                         Location::null()
                     }
                 }
@@ -273,7 +271,7 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                     } else {
                         Location::null()
                     }
-                }else{
+                } else{
                     Location::null()
                 },
             },
diff --git a/src/lib.rs b/src/lib.rs
index cdb7cbebc1cc..1c1f82c3221c 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -175,7 +175,7 @@ impl CodegenBackend for GccCodegenBackend {
         crate::DEFAULT_LOCALE_RESOURCE
     }
 
-    fn init(&self, sess: &Session) {        
+    fn init(&self, sess: &Session) {
         #[cfg(feature="master")]
         {
             let target_cpu = target_cpu(sess);

From eaeb54448e66edff57118bf9fe2ab3f13b98c04e Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Thu, 29 Feb 2024 01:28:08 +0800
Subject: [PATCH 555/997] fix(base): Remove the `set_debug_info()` in
 `compile_codegen_unit`

---
 src/base.rs | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/base.rs b/src/base.rs
index 773e234150d1..10aaf904bca0 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -152,7 +152,6 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
         if env::var("CG_GCCJIT_DUMP_GIMPLE").as_deref() == Ok("1") {
             context.set_dump_initial_gimple(true);
         }
-        context.set_debug_info(true);
         if env::var("CG_GCCJIT_DUMP_EVERYTHING").as_deref() == Ok("1") {
             context.set_dump_everything(true);
         }

From ef158f295ecd37413a11b9f01d203f7b2440cbe6 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Thu, 29 Feb 2024 02:37:37 +0800
Subject: [PATCH 556/997] feat(debuginfo.rs): Add Comments on functions of LLVM
 Origin

---
 src/base.rs      |  1 -
 src/debuginfo.rs | 52 +++++++++++++++++++++++++++++++++++++++++++++---
 2 files changed, 49 insertions(+), 4 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index 10aaf904bca0..b1d0f541702b 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -158,7 +158,6 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
         if env::var("CG_GCCJIT_KEEP_INTERMEDIATES").as_deref() == Ok("1") {
             context.set_keep_intermediates(true);
         }
-
         if env::var("CG_GCCJIT_VERBOSE").as_deref() == Ok("1") {
             context.add_driver_option("-v");
         }
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index 51c5de2920b5..6c3f2367063d 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -51,7 +51,10 @@ impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods for Builder<'a, 'gcc, 'tcx> {
     }
 }
 
-pub fn compute_mir_scopes<'gcc, 'tcx>(
+/// Generate the `debug_context` in an MIR Body.
+/// # Souce of Origin
+/// Copied from `create_scope_map.rs` of rustc_codegen_llvm
+fn compute_mir_scopes<'gcc, 'tcx>(
     cx: &CodegenCx<'gcc, 'tcx>,
     instance: Instance<'tcx>,
     mir: &Body<'tcx>,
@@ -81,6 +84,12 @@ pub fn compute_mir_scopes<'gcc, 'tcx>(
     assert!(instantiated.count() == mir.source_scopes.len());
 }
 
+/// Update the `debug_context`, adding new scope to it,
+/// if it's not added as is denoted in `instantiated`.
+/// 
+/// # Souce of Origin
+/// Copied from `create_scope_map.rs` of rustc_codegen_llvm
+/// FIXME(tempdragon/?): Add Scope Support Here.
 fn make_mir_scope<'gcc, 'tcx>(
     cx: &CodegenCx<'gcc, 'tcx>,
     instance: Instance<'tcx>,
@@ -123,6 +132,39 @@ fn make_mir_scope<'gcc, 'tcx>(
     }
 
     let loc = cx.lookup_debug_loc(scope_data.span.lo());
+
+    /*
+    // FIXME(?): Uncommented when the scope is supported.
+    let file_metadata = file_metadata(cx, &loc.file);
+
+    let parent_dbg_scope = match scope_data.inlined {
+        Some((callee, _)) => {
+            // FIXME(eddyb) this would be `self.monomorphize(&callee)`
+            // if this is moved to `rustc_codegen_ssa::mir::debuginfo`.
+            let callee = cx.tcx.instantiate_and_normalize_erasing_regions(
+                instance.args,
+                ty::ParamEnv::reveal_all(),
+                ty::EarlyBinder::bind(callee),
+            );
+            debug_context.inlined_function_scopes.entry(callee).or_insert_with(|| {
+                let callee_fn_abi = cx.fn_abi_of_instance(callee, ty::List::empty());
+                cx.dbg_scope_fn(callee, callee_fn_abi, None)
+            })
+        }
+        None => parent_scope.dbg_scope,
+    };
+
+    let dbg_scope = unsafe {
+        llvm::LLVMRustDIBuilderCreateLexicalBlock(
+            DIB(cx),
+            parent_dbg_scope,
+            file_metadata,
+            loc.line,
+            loc.col,
+        )
+    };
+    */
+
     let dbg_scope = ();
 
     let inlined_at = scope_data.inlined.map(|(_, callsite_span)| {
@@ -144,8 +186,13 @@ fn make_mir_scope<'gcc, 'tcx>(
     instantiated.insert(scope);
 }
 
-/// Copied from LLVM backend
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
+    /// Look up the file, the 1-based indexing line number and column number.
+    /// # Argument
+    /// - `pos`: `BytePos`, the starting position of a piece of code
+    /// # Source of Origin
+    /// Copied from LLVM backend(with a return type from struct to tuple).
+    /// No need to change since you may end up something like this.
     pub fn lookup_debug_loc(&self, pos: BytePos) -> (Lrc<SourceFile>, u32, u32) {
         match self.sess().source_map().lookup_line(pos) {
             Ok(SourceFileAndLine { sf: file, line }) => {
@@ -216,7 +263,6 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn debuginfo_finalize(&self) {
-        // TODO(antoyo): Get the debug flag/predicate to allow optional generation of debuginfo.
         self.context.set_debug_info(true)
     }
 

From e18d3c3dfdfbf9c8f50479ac64de5da6754035fb Mon Sep 17 00:00:00 2001
From: tempdragon <88025134+tempdragon@users.noreply.github.com>
Date: Thu, 29 Feb 2024 03:00:46 +0800
Subject: [PATCH 557/997] fix(builder.rs): Apply suggestions from code review

Co-authored-by: antoyo <antoyo@users.noreply.github.com>
---
 src/builder.rs | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 87b5b04af139..9afca472b5fa 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -659,7 +659,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn xor(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.gcc_xor(a, b))
+        set_rval_location(self, self.gcc_xor(a, b))
     }
 
     fn neg(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
@@ -721,9 +721,9 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn frem_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        let i = self.frem(lhs, rhs);
-        set_rval_location(self,i);
-        i
+        let result = self.frem(lhs, rhs);
+        set_rval_location(self, i);
+        result
     }
 
     fn checked_binop(&mut self, oop: OverflowOp, typ: Ty<'_>, lhs: Self::Value, rhs: Self::Value) -> (Self::Value, Self::Value) {
@@ -1010,7 +1010,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn fptoui(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.gcc_float_to_uint_cast(value, dest_ty))
+        set_rval_location(self, self.gcc_float_to_uint_cast(value, dest_ty))
     }
 
     fn fptosi(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
@@ -1036,7 +1036,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn ptrtoint(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
         let usize_value = self.cx.const_bitcast(value, self.cx.type_isize());
-        self.intcast(usize_value, dest_ty, false)        
+        self.intcast(usize_value, dest_ty, false)
     }
 
     fn inttoptr(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {

From fba0dae5feade451cf0adb4409396711623ae00e Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Thu, 29 Feb 2024 03:03:33 +0800
Subject: [PATCH 558/997] fix(builder.rs): Apply a variable name change to func
 param.

---
 src/builder.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/builder.rs b/src/builder.rs
index 9afca472b5fa..aac402826891 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -722,7 +722,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn frem_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
         let result = self.frem(lhs, rhs);
-        set_rval_location(self, i);
+        set_rval_location(self, result);
         result
     }
 

From 8c975d98619eec49c65c51e0303abdfeb126f133 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Thu, 29 Feb 2024 03:18:51 +0800
Subject: [PATCH 559/997] fix(builder.rs): Rename `r` to `rvalue` in
 `set_rval_location`

---
 src/builder.rs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index aac402826891..6df4313949d7 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -398,12 +398,12 @@ impl<'gcc, 'tcx> BackendTypes for Builder<'_, 'gcc, 'tcx> {
     type DIVariable = <CodegenCx<'gcc, 'tcx> as BackendTypes>::DIVariable;
 }
 
-pub fn set_rval_location<'a, 'gcc, 'tcx>(bx: &mut Builder<'a,'gcc,'tcx>, r:RValue<'gcc>) -> RValue<'gcc> {
+pub fn set_rval_location<'a, 'gcc, 'tcx>(bx: &mut Builder<'a,'gcc,'tcx>, rvalue:RValue<'gcc>) -> RValue<'gcc> {
     if bx.loc.is_some(){
         #[cfg(feature = "master")]
-        r.set_location(bx.loc.unwrap());
+        rvalue.set_location(bx.loc.unwrap());
     }
-    r
+    rvalue
     
 }
 

From 9cc0a4204d1d1dba72b79d009e5f526505ea2d3c Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Thu, 29 Feb 2024 03:56:17 +0800
Subject: [PATCH 560/997] fix(debuginfo.rs): Cleanup of redundant code.

1. Revert to the original `lookup_debug_loc` of DebugLoc return type
2. Removed the commented code of scope lookup
---
 src/debuginfo.rs | 85 ++++++++++++++++++++----------------------------
 1 file changed, 35 insertions(+), 50 deletions(-)

diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index 6c3f2367063d..cd01785edbf0 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -133,38 +133,7 @@ fn make_mir_scope<'gcc, 'tcx>(
 
     let loc = cx.lookup_debug_loc(scope_data.span.lo());
 
-    /*
-    // FIXME(?): Uncommented when the scope is supported.
-    let file_metadata = file_metadata(cx, &loc.file);
-
-    let parent_dbg_scope = match scope_data.inlined {
-        Some((callee, _)) => {
-            // FIXME(eddyb) this would be `self.monomorphize(&callee)`
-            // if this is moved to `rustc_codegen_ssa::mir::debuginfo`.
-            let callee = cx.tcx.instantiate_and_normalize_erasing_regions(
-                instance.args,
-                ty::ParamEnv::reveal_all(),
-                ty::EarlyBinder::bind(callee),
-            );
-            debug_context.inlined_function_scopes.entry(callee).or_insert_with(|| {
-                let callee_fn_abi = cx.fn_abi_of_instance(callee, ty::List::empty());
-                cx.dbg_scope_fn(callee, callee_fn_abi, None)
-            })
-        }
-        None => parent_scope.dbg_scope,
-    };
-
-    let dbg_scope = unsafe {
-        llvm::LLVMRustDIBuilderCreateLexicalBlock(
-            DIB(cx),
-            parent_dbg_scope,
-            file_metadata,
-            loc.line,
-            loc.col,
-        )
-    };
-    */
-
+    // FIXME(tempdragon): Add the scope related code here if the scope is supported.
     let dbg_scope = ();
 
     let inlined_at = scope_data.inlined.map(|(_, callsite_span)| {
@@ -180,36 +149,52 @@ fn make_mir_scope<'gcc, 'tcx>(
     debug_context.scopes[scope] = DebugScope {
         dbg_scope,
         inlined_at,
-        file_start_pos: loc.0.start_pos,
-        file_end_pos: loc.0.end_position(),
+        file_start_pos: loc.file.start_pos,
+        file_end_pos: loc.file.end_position(),
     };
     instantiated.insert(scope);
 }
 
+/// A source code location used to generate debug information.
+// FIXME(eddyb) rename this to better indicate it's a duplicate of
+// `rustc_span::Loc` rather than `DILocation`, perhaps by making
+// `lookup_char_pos` return the right information instead.
+pub struct DebugLoc {
+    /// Information about the original source file.
+    pub file: Lrc<SourceFile>,
+    /// The (1-based) line number.
+    pub line: u32,
+    /// The (1-based) column number.
+    pub col: u32,
+}
+
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
-    /// Look up the file, the 1-based indexing line number and column number.
-    /// # Argument
-    /// - `pos`: `BytePos`, the starting position of a piece of code
-    /// # Source of Origin
-    /// Copied from LLVM backend(with a return type from struct to tuple).
-    /// No need to change since you may end up something like this.
-    pub fn lookup_debug_loc(&self, pos: BytePos) -> (Lrc<SourceFile>, u32, u32) {
-        match self.sess().source_map().lookup_line(pos) {
+    /// Looks up debug source information about a `BytePos`.
+    // FIXME(eddyb) rename this to better indicate it's a duplicate of
+    // `lookup_char_pos` rather than `dbg_loc`, perhaps by making
+    // `lookup_char_pos` return the right information instead.
+    // Source of Origin: cg_llvm
+    pub fn lookup_debug_loc(&self, pos: BytePos) -> DebugLoc {
+        let (file, line, col) = match self.sess().source_map().lookup_line(pos) {
             Ok(SourceFileAndLine { sf: file, line }) => {
                 let line_pos = file.lines()[line];
 
                 // Use 1-based indexing.
                 let line = (line + 1) as u32;
                 let col = (file.relative_position(pos) - line_pos).to_u32() + 1;
-                (file,
-                 line,
-                 if ! self.sess().target.is_like_msvc {
-                     col } else {
-                     UNKNOWN_COLUMN_NUMBER
-                 }
-                )
+
+                (file, line, col)
             }
             Err(file) => (file, UNKNOWN_LINE_NUMBER, UNKNOWN_COLUMN_NUMBER),
+        };
+
+        // For MSVC, omit the column number.
+        // Otherwise, emit it. This mimics clang behaviour.
+        // See discussion in https://github.com/rust-lang/rust/issues/42921
+        if self.sess().target.is_like_msvc {
+            DebugLoc { file, line, col: UNKNOWN_COLUMN_NUMBER }
+        } else {
+            DebugLoc { file, line, col }
         }
     }
 }
@@ -293,7 +278,7 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         span: Span,
     ) -> Self::DILocation {
         let pos = span.lo();
-        let (file, line, col) = self.lookup_debug_loc(pos);
+        let DebugLoc{file, line, col} = self.lookup_debug_loc(pos);
         let loc = match &file.name {
             rustc_span::FileName::Real(name) => match name {
                 rustc_span::RealFileName::LocalPath(name) => {

From 7c3565e569bb5017baad3a2a708dcdf7c1822d82 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Thu, 29 Feb 2024 04:01:38 +0800
Subject: [PATCH 561/997] fix(builder.rs): Add space after self when necessary

---
 src/builder.rs | 38 +++++++++++++++++++-------------------
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 6df4313949d7..dcac066f3953 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -663,60 +663,60 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn neg(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.gcc_neg(a))
+        set_rval_location(self, self.gcc_neg(a))
     }
 
     fn fneg(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.cx.context.new_unary_op(self.loc, UnaryOp::Minus, a.get_type(), a))
+        set_rval_location(self, self.cx.context.new_unary_op(self.loc, UnaryOp::Minus, a.get_type(), a))
     }
 
     fn not(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.gcc_not(a))
+        set_rval_location(self, self.gcc_not(a))
     }
 
     fn unchecked_sadd(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.gcc_add(a, b))
+        set_rval_location(self, self.gcc_add(a, b))
     }
 
     fn unchecked_uadd(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.gcc_add(a, b))
+        set_rval_location(self, self.gcc_add(a, b))
     }
 
     fn unchecked_ssub(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.gcc_sub(a, b))
+        set_rval_location(self, self.gcc_sub(a, b))
     }
 
     fn unchecked_usub(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): should generate poison value?
-        set_rval_location(self,self.gcc_sub(a, b))
+        set_rval_location(self, self.gcc_sub(a, b))
     }
 
     fn unchecked_smul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.gcc_mul(a, b))
+        set_rval_location(self, self.gcc_mul(a, b))
     }
 
     fn unchecked_umul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.gcc_mul(a, b))
+        set_rval_location(self, self.gcc_mul(a, b))
     }
 
     fn fadd_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        set_rval_location(self,lhs + rhs)
+        set_rval_location(self, lhs + rhs)
     }
 
     fn fsub_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        set_rval_location(self,lhs - rhs)
+        set_rval_location(self, lhs - rhs)
     }
 
     fn fmul_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        set_rval_location(self,lhs * rhs)
+        set_rval_location(self, lhs * rhs)
     }
 
     fn fdiv_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        set_rval_location(self,lhs / rhs)
+        set_rval_location(self, lhs / rhs)
     }
 
     fn frem_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
@@ -1014,24 +1014,24 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn fptosi(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.gcc_float_to_int_cast(value, dest_ty))
+        set_rval_location(self, self.gcc_float_to_int_cast(value, dest_ty))
     }
 
     fn uitofp(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.gcc_uint_to_float_cast(value, dest_ty))
+        set_rval_location(self, self.gcc_uint_to_float_cast(value, dest_ty))
     }
 
     fn sitofp(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.gcc_int_to_float_cast(value, dest_ty))
+        set_rval_location(self, self.gcc_int_to_float_cast(value, dest_ty))
     }
 
     fn fptrunc(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): make sure it truncates.
-        set_rval_location(self,self.context.new_cast(self.loc, value, dest_ty))
+        set_rval_location(self, self.context.new_cast(self.loc, value, dest_ty))
     }
 
     fn fpext(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self,self.context.new_cast(self.loc, value, dest_ty))
+        set_rval_location(self, self.context.new_cast(self.loc, value, dest_ty))
     }
 
     fn ptrtoint(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
@@ -1059,7 +1059,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             (false, true) => {
                 // NOTE: Projecting a field of a pointer type will attempt a cast from a signed char to
                 // a pointer, which is not supported by gccjit.
-                return self.cx.context.new_cast(self.loc, self.inttoptr(value, val_type.make_pointer()), dest_ty);
+                self.cx.context.new_cast(self.loc, self.inttoptr(value, val_type.make_pointer()), dest_ty)
             },
             (false, false) => {
                 // When they are not pointers, we want a transmute (or reinterpret_cast).

From c2c68e3f4dcfd43aa2cbaddd8fdfe61ee086966d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 28 Feb 2024 17:06:24 -0500
Subject: [PATCH 562/997] Format the code

---
 .github/workflows/ci.yml   |    6 +
 .rustfmt.toml              |    2 +-
 src/abi.rs                 |  107 +--
 src/allocator.rs           |   56 +-
 src/asm.rs                 |  217 +++---
 src/attributes.rs          |   77 +-
 src/back/lto.rs            |   85 ++-
 src/back/write.rs          |   51 +-
 src/base.rs                |   55 +-
 src/builder.rs             | 1417 +++++++++++++++++++++++-------------
 src/callee.rs              |  253 ++++---
 src/common.rs              |  168 ++---
 src/consts.rs              |  133 ++--
 src/context.rs             |  246 ++++---
 src/debuginfo.rs           |   74 +-
 src/declare.rs             |  219 ++++--
 src/errors.rs              |    2 +-
 src/gcc_util.rs            |   67 +-
 src/int.rs                 |  932 ++++++++++++++----------
 src/intrinsic/llvm.rs      |  522 ++++++++-----
 src/intrinsic/mod.rs       | 1088 ++++++++++++++-------------
 src/intrinsic/simd.rs      |   50 +-
 src/lib.rs                 |  234 +++---
 src/mono_item.rs           |   35 +-
 src/type_.rs               |   59 +-
 src/type_of.rs             |  163 +++--
 tests/lang_tests_common.rs |   51 +-
 27 files changed, 3742 insertions(+), 2627 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index ab704aa80a2b..839f3ba4de36 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -49,6 +49,9 @@ jobs:
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
       run: sudo apt-get install ninja-build ripgrep llvm-14-tools
 
+    - name: Install rustfmt
+      run: rustup component add rustfmt
+
     - name: Download artifact
       run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/${{ matrix.libgccjit_version.gcc }}
 
@@ -92,6 +95,9 @@ jobs:
       run: |
         ./y.sh test --release --clean --build-sysroot ${{ matrix.commands }}
 
+    - name: Check formatting
+      run: cargo fmt -- --check
+
   duplicates:
     runs-on: ubuntu-latest
     steps:
diff --git a/.rustfmt.toml b/.rustfmt.toml
index 87f034950e3b..2a35f0230c69 100644
--- a/.rustfmt.toml
+++ b/.rustfmt.toml
@@ -1 +1 @@
-ignore = ["/src", "/tests"]
+use_small_heuristics = "Max"
diff --git a/src/abi.rs b/src/abi.rs
index f601cd95f2a6..b098594dbcc3 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -18,17 +18,16 @@ impl<'a, 'gcc, 'tcx> AbiBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn get_param(&mut self, index: usize) -> Self::Value {
         let func = self.current_func();
         let param = func.get_param(index as i32);
-        let on_stack =
-            if let Some(on_stack_param_indices) = self.on_stack_function_params.borrow().get(&func) {
-                on_stack_param_indices.contains(&index)
-            }
-            else {
-                false
-            };
+        let on_stack = if let Some(on_stack_param_indices) =
+            self.on_stack_function_params.borrow().get(&func)
+        {
+            on_stack_param_indices.contains(&index)
+        } else {
+            false
+        };
         if on_stack {
             param.to_lvalue().get_address(None)
-        }
-        else {
+        } else {
             param.to_rvalue()
         }
     }
@@ -37,13 +36,14 @@ impl<'a, 'gcc, 'tcx> AbiBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
 impl GccType for CastTarget {
     fn gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, '_>) -> Type<'gcc> {
         let rest_gcc_unit = self.rest.unit.gcc_type(cx);
-        let (rest_count, rem_bytes) =
-            if self.rest.unit.size.bytes() == 0 {
-                (0, 0)
-            }
-            else {
-                (self.rest.total.bytes() / self.rest.unit.size.bytes(), self.rest.total.bytes() % self.rest.unit.size.bytes())
-            };
+        let (rest_count, rem_bytes) = if self.rest.unit.size.bytes() == 0 {
+            (0, 0)
+        } else {
+            (
+                self.rest.total.bytes() / self.rest.unit.size.bytes(),
+                self.rest.total.bytes() % self.rest.unit.size.bytes(),
+            )
+        };
 
         if self.prefix.iter().all(|x| x.is_none()) {
             // Simplify to a single unit when there is no prefix and size <= unit size
@@ -61,9 +61,7 @@ impl GccType for CastTarget {
         let mut args: Vec<_> = self
             .prefix
             .iter()
-            .flat_map(|option_reg| {
-                option_reg.map(|reg| reg.gcc_type(cx))
-            })
+            .flat_map(|option_reg| option_reg.map(|reg| reg.gcc_type(cx)))
             .chain((0..rest_count).map(|_| rest_gcc_unit))
             .collect();
 
@@ -86,12 +84,10 @@ impl GccType for Reg {
     fn gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, '_>) -> Type<'gcc> {
         match self.kind {
             RegKind::Integer => cx.type_ix(self.size.bits()),
-            RegKind::Float => {
-                match self.size.bits() {
-                    32 => cx.type_f32(),
-                    64 => cx.type_f64(),
-                    _ => bug!("unsupported float: {:?}", self),
-                }
+            RegKind::Float => match self.size.bits() {
+                32 => cx.type_f32(),
+                64 => cx.type_f64(),
+                _ => bug!("unsupported float: {:?}", self),
             },
             RegKind::Vector => unimplemented!(), //cx.type_vector(cx.type_i8(), self.size.bytes()),
         }
@@ -119,19 +115,18 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
 
         // This capacity calculation is approximate.
         let mut argument_tys = Vec::with_capacity(
-            self.args.len() + if let PassMode::Indirect { .. } = self.ret.mode { 1 } else { 0 }
+            self.args.len() + if let PassMode::Indirect { .. } = self.ret.mode { 1 } else { 0 },
         );
 
-        let return_type =
-            match self.ret.mode {
-                PassMode::Ignore => cx.type_void(),
-                PassMode::Direct(_) | PassMode::Pair(..) => self.ret.layout.immediate_gcc_type(cx),
-                PassMode::Cast { ref cast, .. } => cast.gcc_type(cx),
-                PassMode::Indirect { .. } => {
-                    argument_tys.push(cx.type_ptr_to(self.ret.memory_ty(cx)));
-                    cx.type_void()
-                }
-            };
+        let return_type = match self.ret.mode {
+            PassMode::Ignore => cx.type_void(),
+            PassMode::Direct(_) | PassMode::Pair(..) => self.ret.layout.immediate_gcc_type(cx),
+            PassMode::Cast { ref cast, .. } => cast.gcc_type(cx),
+            PassMode::Indirect { .. } => {
+                argument_tys.push(cx.type_ptr_to(self.ret.memory_ty(cx)));
+                cx.type_void()
+            }
+        };
         #[cfg(feature = "master")]
         let mut non_null_args = Vec::new();
 
@@ -149,17 +144,23 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
             ty
         };
         #[cfg(not(feature = "master"))]
-        let apply_attrs = |ty: Type<'gcc>, _attrs: &ArgAttributes, _arg_index: usize| {
-            ty
-        };
+        let apply_attrs = |ty: Type<'gcc>, _attrs: &ArgAttributes, _arg_index: usize| ty;
 
         for arg in self.args.iter() {
             let arg_ty = match arg.mode {
                 PassMode::Ignore => continue,
                 PassMode::Pair(a, b) => {
                     let arg_pos = argument_tys.len();
-                    argument_tys.push(apply_attrs(arg.layout.scalar_pair_element_gcc_type(cx, 0), &a, arg_pos));
-                    argument_tys.push(apply_attrs(arg.layout.scalar_pair_element_gcc_type(cx, 1), &b, arg_pos + 1));
+                    argument_tys.push(apply_attrs(
+                        arg.layout.scalar_pair_element_gcc_type(cx, 0),
+                        &a,
+                        arg_pos,
+                    ));
+                    argument_tys.push(apply_attrs(
+                        arg.layout.scalar_pair_element_gcc_type(cx, 1),
+                        &b,
+                        arg_pos + 1,
+                    ));
                     continue;
                 }
                 PassMode::Cast { ref cast, pad_i32 } => {
@@ -174,14 +175,17 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
                     // This is a "byval" argument, so we don't apply the `restrict` attribute on it.
                     on_stack_param_indices.insert(argument_tys.len());
                     arg.memory_ty(cx)
-                },
-                PassMode::Direct(attrs) => apply_attrs(arg.layout.immediate_gcc_type(cx), &attrs, argument_tys.len()),
+                }
+                PassMode::Direct(attrs) => {
+                    apply_attrs(arg.layout.immediate_gcc_type(cx), &attrs, argument_tys.len())
+                }
                 PassMode::Indirect { attrs, meta_attrs: None, on_stack: false } => {
                     apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs, argument_tys.len())
                 }
                 PassMode::Indirect { attrs, meta_attrs: Some(meta_attrs), on_stack } => {
                     assert!(!on_stack);
-                    let ty = apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs, argument_tys.len());
+                    let ty =
+                        apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs, argument_tys.len());
                     apply_attrs(ty, &meta_attrs, argument_tys.len())
                 }
             };
@@ -207,15 +211,14 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
 
     fn ptr_to_gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc> {
         // FIXME(antoyo): Should we do something with `FnAbiGcc::fn_attributes`?
-        let FnAbiGcc {
-            return_type,
-            arguments_type,
-            is_c_variadic,
+        let FnAbiGcc { return_type, arguments_type, is_c_variadic, on_stack_param_indices, .. } =
+            self.gcc_type(cx);
+        let pointer_type =
+            cx.context.new_function_pointer_type(None, return_type, &arguments_type, is_c_variadic);
+        cx.on_stack_params.borrow_mut().insert(
+            pointer_type.dyncast_function_ptr_type().expect("function ptr type"),
             on_stack_param_indices,
-            ..
-        } = self.gcc_type(cx);
-        let pointer_type = cx.context.new_function_pointer_type(None, return_type, &arguments_type, is_c_variadic);
-        cx.on_stack_params.borrow_mut().insert(pointer_type.dyncast_function_ptr_type().expect("function ptr type"), on_stack_param_indices);
+        );
         pointer_type
     }
 }
diff --git a/src/allocator.rs b/src/allocator.rs
index 7c7044830f3d..5cfd654a2049 100644
--- a/src/allocator.rs
+++ b/src/allocator.rs
@@ -1,4 +1,4 @@
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 use gccjit::FnAttribute;
 use gccjit::{Context, FunctionType, GlobalKind, ToRValue, Type};
 use rustc_ast::expand::allocator::{
@@ -11,15 +11,20 @@ use rustc_session::config::OomStrategy;
 
 use crate::GccContext;
 
-pub(crate) unsafe fn codegen(tcx: TyCtxt<'_>, mods: &mut GccContext, _module_name: &str, kind: AllocatorKind, alloc_error_handler_kind: AllocatorKind) {
+pub(crate) unsafe fn codegen(
+    tcx: TyCtxt<'_>,
+    mods: &mut GccContext,
+    _module_name: &str,
+    kind: AllocatorKind,
+    alloc_error_handler_kind: AllocatorKind,
+) {
     let context = &mods.context;
-    let usize =
-        match tcx.sess.target.pointer_width {
-            16 => context.new_type::<u16>(),
-            32 => context.new_type::<u32>(),
-            64 => context.new_type::<u64>(),
-            tws => bug!("Unsupported target word size for int: {}", tws),
-        };
+    let usize = match tcx.sess.target.pointer_width {
+        16 => context.new_type::<u16>(),
+        32 => context.new_type::<u32>(),
+        64 => context.new_type::<u64>(),
+        tws => bug!("Unsupported target word size for int: {}", tws),
+    };
     let i8 = context.new_type::<i8>();
     let i8p = i8.make_pointer();
 
@@ -85,24 +90,42 @@ fn create_wrapper_function(
 ) {
     let void = context.new_type::<()>();
 
-    let args: Vec<_> = types.iter().enumerate()
+    let args: Vec<_> = types
+        .iter()
+        .enumerate()
         .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
         .collect();
-    let func = context.new_function(None, FunctionType::Exported, output.unwrap_or(void), &args, from_name, false);
+    let func = context.new_function(
+        None,
+        FunctionType::Exported,
+        output.unwrap_or(void),
+        &args,
+        from_name,
+        false,
+    );
 
     if tcx.sess.default_hidden_visibility() {
-        #[cfg(feature="master")]
+        #[cfg(feature = "master")]
         func.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
     }
     if tcx.sess.must_emit_unwind_tables() {
         // TODO(antoyo): emit unwind tables.
     }
 
-    let args: Vec<_> = types.iter().enumerate()
+    let args: Vec<_> = types
+        .iter()
+        .enumerate()
         .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
         .collect();
-    let callee = context.new_function(None, FunctionType::Extern, output.unwrap_or(void), &args, to_name, false);
-    #[cfg(feature="master")]
+    let callee = context.new_function(
+        None,
+        FunctionType::Extern,
+        output.unwrap_or(void),
+        &args,
+        to_name,
+        false,
+    );
+    #[cfg(feature = "master")]
     callee.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
 
     let block = func.new_block("entry");
@@ -116,8 +139,7 @@ fn create_wrapper_function(
     //llvm::LLVMSetTailCall(ret, True);
     if output.is_some() {
         block.end_with_return(None, ret);
-    }
-    else {
+    } else {
         block.end_with_void_return(None);
     }
 
diff --git a/src/asm.rs b/src/asm.rs
index 78e8e32b9729..bded806cafde 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -2,7 +2,10 @@ use gccjit::{LValue, RValue, ToRValue, Type};
 use rustc_ast::ast::{InlineAsmOptions, InlineAsmTemplatePiece};
 use rustc_codegen_ssa::mir::operand::OperandValue;
 use rustc_codegen_ssa::mir::place::PlaceRef;
-use rustc_codegen_ssa::traits::{AsmBuilderMethods, AsmMethods, BaseTypeMethods, BuilderMethods, GlobalAsmOperandRef, InlineAsmOperandRef};
+use rustc_codegen_ssa::traits::{
+    AsmBuilderMethods, AsmMethods, BaseTypeMethods, BuilderMethods, GlobalAsmOperandRef,
+    InlineAsmOperandRef,
+};
 
 use rustc_middle::{bug, ty::Instance};
 use rustc_span::Span;
@@ -11,11 +14,10 @@ use rustc_target::asm::*;
 use std::borrow::Cow;
 
 use crate::builder::Builder;
+use crate::callee::get_fn;
 use crate::context::CodegenCx;
 use crate::errors::UnwindingInlineAsm;
 use crate::type_of::LayoutGccExt;
-use crate::callee::get_fn;
-
 
 // Rust asm! and GCC Extended Asm semantics differ substantially.
 //
@@ -68,7 +70,6 @@ use crate::callee::get_fn;
 const ATT_SYNTAX_INS: &str = ".att_syntax noprefix\n\t";
 const INTEL_SYNTAX_INS: &str = "\n\t.intel_syntax noprefix";
 
-
 struct AsmOutOperand<'a, 'tcx, 'gcc> {
     rust_idx: usize,
     constraint: &'a str,
@@ -76,13 +77,13 @@ struct AsmOutOperand<'a, 'tcx, 'gcc> {
     readwrite: bool,
 
     tmp_var: LValue<'gcc>,
-    out_place: Option<PlaceRef<'tcx, RValue<'gcc>>>
+    out_place: Option<PlaceRef<'tcx, RValue<'gcc>>>,
 }
 
 struct AsmInOperand<'a, 'tcx> {
     rust_idx: usize,
     constraint: Cow<'a, str>,
-    val: RValue<'tcx>
+    val: RValue<'tcx>,
 }
 
 impl AsmOutOperand<'_, '_, '_> {
@@ -102,16 +103,21 @@ impl AsmOutOperand<'_, '_, '_> {
 
 enum ConstraintOrRegister {
     Constraint(&'static str),
-    Register(&'static str)
+    Register(&'static str),
 }
 
-
 impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
-    fn codegen_inline_asm(&mut self, template: &[InlineAsmTemplatePiece], rust_operands: &[InlineAsmOperandRef<'tcx, Self>], options: InlineAsmOptions, span: &[Span], instance: Instance<'_>, _dest_catch_funclet: Option<(Self::BasicBlock, Self::BasicBlock, Option<&Self::Funclet>)>) {
+    fn codegen_inline_asm(
+        &mut self,
+        template: &[InlineAsmTemplatePiece],
+        rust_operands: &[InlineAsmOperandRef<'tcx, Self>],
+        options: InlineAsmOptions,
+        span: &[Span],
+        instance: Instance<'_>,
+        _dest_catch_funclet: Option<(Self::BasicBlock, Self::BasicBlock, Option<&Self::Funclet>)>,
+    ) {
         if options.contains(InlineAsmOptions::MAY_UNWIND) {
-            self.sess().dcx()
-                .create_err(UnwindingInlineAsm { span: span[0] })
-                .emit();
+            self.sess().dcx().create_err(UnwindingInlineAsm { span: span[0] }).emit();
             return;
         }
 
@@ -157,32 +163,40 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     use ConstraintOrRegister::*;
 
                     let (constraint, ty) = match (reg_to_gcc(reg), place) {
-                        (Constraint(constraint), Some(place)) => (constraint, place.layout.gcc_type(self.cx)),
+                        (Constraint(constraint), Some(place)) => {
+                            (constraint, place.layout.gcc_type(self.cx))
+                        }
                         // When `reg` is a class and not an explicit register but the out place is not specified,
                         // we need to create an unused output variable to assign the output to. This var
                         // needs to be of a type that's "compatible" with the register class, but specific type
                         // doesn't matter.
-                        (Constraint(constraint), None) => (constraint, dummy_output_type(self.cx, reg.reg_class())),
+                        (Constraint(constraint), None) => {
+                            (constraint, dummy_output_type(self.cx, reg.reg_class()))
+                        }
                         (Register(_), Some(_)) => {
                             // left for the next pass
-                            continue
-                        },
+                            continue;
+                        }
                         (Register(reg_name), None) => {
                             // `clobber_abi` can add lots of clobbers that are not supported by the target,
                             // such as AVX-512 registers, so we just ignore unsupported registers
-                            let is_target_supported = reg.reg_class().supported_types(asm_arch).iter()
-                                .any(|&(_, feature)| {
-                                    if let Some(feature) = feature {
-                                        self.tcx.asm_target_features(instance.def_id()).contains(&feature)
-                                    } else {
-                                        true // Register class is unconditionally supported
-                                    }
-                                });
+                            let is_target_supported =
+                                reg.reg_class().supported_types(asm_arch).iter().any(
+                                    |&(_, feature)| {
+                                        if let Some(feature) = feature {
+                                            self.tcx
+                                                .asm_target_features(instance.def_id())
+                                                .contains(&feature)
+                                        } else {
+                                            true // Register class is unconditionally supported
+                                        }
+                                    },
+                                );
 
                             if is_target_supported && !clobbers.contains(&reg_name) {
                                 clobbers.push(reg_name);
                             }
-                            continue
+                            continue;
                         }
                     };
 
@@ -193,7 +207,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         late,
                         readwrite: false,
                         tmp_var,
-                        out_place: place
+                        out_place: place,
                     });
                 }
 
@@ -202,23 +216,22 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         inputs.push(AsmInOperand {
                             constraint: Cow::Borrowed(constraint),
                             rust_idx,
-                            val: value.immediate()
+                            val: value.immediate(),
                         });
-                    }
-                    else {
+                    } else {
                         // left for the next pass
-                        continue
+                        continue;
                     }
                 }
 
                 InlineAsmOperandRef::InOut { reg, late, in_value, out_place } => {
-                    let constraint = if let ConstraintOrRegister::Constraint(constraint) = reg_to_gcc(reg) {
-                        constraint
-                    }
-                    else {
-                        // left for the next pass
-                        continue
-                    };
+                    let constraint =
+                        if let ConstraintOrRegister::Constraint(constraint) = reg_to_gcc(reg) {
+                            constraint
+                        } else {
+                            // left for the next pass
+                            continue;
+                        };
 
                     // Rustc frontend guarantees that input and output types are "compatible",
                     // so we can just use input var's type for the output variable.
@@ -249,7 +262,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         inputs.push(AsmInOperand {
                             constraint,
                             rust_idx,
-                            val: in_value.immediate()
+                            val: in_value.immediate(),
                         });
                     }
                 }
@@ -267,7 +280,8 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 InlineAsmOperandRef::SymStatic { def_id } => {
                     // TODO(@Amanieu): Additional mangling is needed on
                     // some targets to add a leading underscore (Mach-O).
-                    constants_len += self.tcx.symbol_name(Instance::mono(self.tcx, def_id)).name.len();
+                    constants_len +=
+                        self.tcx.symbol_name(Instance::mono(self.tcx, def_id)).name.len();
                 }
             }
         }
@@ -280,10 +294,9 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     if let ConstraintOrRegister::Register(reg_name) = reg_to_gcc(reg) {
                         let out_place = if let Some(place) = place {
                             place
-                        }
-                        else {
+                        } else {
                             // processed in the previous pass
-                            continue
+                            continue;
                         };
 
                         let ty = out_place.layout.gcc_type(self.cx);
@@ -296,7 +309,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                             late,
                             readwrite: false,
                             tmp_var,
-                            out_place: Some(out_place)
+                            out_place: Some(out_place),
                         });
                     }
 
@@ -314,7 +327,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         inputs.push(AsmInOperand {
                             constraint: "r".into(),
                             rust_idx,
-                            val: reg_var.to_rvalue()
+                            val: reg_var.to_rvalue(),
                         });
                     }
 
@@ -342,7 +355,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         inputs.push(AsmInOperand {
                             constraint,
                             rust_idx,
-                            val: in_value.immediate()
+                            val: in_value.immediate(),
                         });
                     }
 
@@ -373,7 +386,8 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         // 3. Build the template string
 
-        let mut template_str = String::with_capacity(estimate_template_length(template, constants_len, att_dialect));
+        let mut template_str =
+            String::with_capacity(estimate_template_length(template, constants_len, att_dialect));
         if att_dialect {
             template_str.push_str(ATT_SYNTAX_INS);
         }
@@ -383,16 +397,15 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 InlineAsmTemplatePiece::String(ref string) => {
                     for char in string.chars() {
                         // TODO(antoyo): might also need to escape | if rustc doesn't do it.
-                        let escaped_char =
-                            match char {
-                                '%' => "%%",
-                                '{' => "%{",
-                                '}' => "%}",
-                                _ => {
-                                    template_str.push(char);
-                                    continue;
-                                },
-                            };
+                        let escaped_char = match char {
+                            '%' => "%%",
+                            '{' => "%{",
+                            '}' => "%}",
+                            _ => {
+                                template_str.push(char);
+                                continue;
+                            }
+                        };
                         template_str.push_str(escaped_char);
                     }
                 }
@@ -408,9 +421,10 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     };
 
                     match rust_operands[operand_idx] {
-                        InlineAsmOperandRef::Out { reg, ..  } => {
+                        InlineAsmOperandRef::Out { reg, .. } => {
                             let modifier = modifier_to_gcc(asm_arch, reg.reg_class(), modifier);
-                            let gcc_index = outputs.iter()
+                            let gcc_index = outputs
+                                .iter()
                                 .position(|op| operand_idx == op.rust_idx)
                                 .expect("wrong rust index");
                             push_to_template(modifier, gcc_index);
@@ -418,7 +432,8 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
 
                         InlineAsmOperandRef::In { reg, .. } => {
                             let modifier = modifier_to_gcc(asm_arch, reg.reg_class(), modifier);
-                            let in_gcc_index = inputs.iter()
+                            let in_gcc_index = inputs
+                                .iter()
                                 .position(|op| operand_idx == op.rust_idx)
                                 .expect("wrong rust index");
                             let gcc_index = in_gcc_index + outputs.len();
@@ -429,7 +444,8 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                             let modifier = modifier_to_gcc(asm_arch, reg.reg_class(), modifier);
 
                             // The input register is tied to the output, so we can just use the index of the output register
-                            let gcc_index = outputs.iter()
+                            let gcc_index = outputs
+                                .iter()
                                 .position(|op| operand_idx == op.rust_idx)
                                 .expect("wrong rust index");
                             push_to_template(modifier, gcc_index);
@@ -496,7 +512,8 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         }
         if options.contains(InlineAsmOptions::NORETURN) {
             let builtin_unreachable = self.context.get_builtin_function("__builtin_unreachable");
-            let builtin_unreachable: RValue<'gcc> = unsafe { std::mem::transmute(builtin_unreachable) };
+            let builtin_unreachable: RValue<'gcc> =
+                unsafe { std::mem::transmute(builtin_unreachable) };
             self.call(self.type_void(), None, None, builtin_unreachable, &[], None);
         }
 
@@ -517,19 +534,23 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 }
 
-fn estimate_template_length(template: &[InlineAsmTemplatePiece], constants_len: usize, att_dialect: bool) -> usize {
-    let len: usize = template.iter().map(|piece| {
-        match *piece {
-            InlineAsmTemplatePiece::String(ref string) => {
-                string.len()
+fn estimate_template_length(
+    template: &[InlineAsmTemplatePiece],
+    constants_len: usize,
+    att_dialect: bool,
+) -> usize {
+    let len: usize = template
+        .iter()
+        .map(|piece| {
+            match *piece {
+                InlineAsmTemplatePiece::String(ref string) => string.len(),
+                InlineAsmTemplatePiece::Placeholder { .. } => {
+                    // '%' + 1 char modifier + 1 char index
+                    3
+                }
             }
-            InlineAsmTemplatePiece::Placeholder { .. } => {
-                // '%' + 1 char modifier + 1 char index
-                3
-            }
-        }
-    })
-    .sum();
+        })
+        .sum();
 
     // increase it by 5% to account for possible '%' signs that'll be duplicated
     // I pulled the number out of blue, but should be fair enough
@@ -562,7 +583,7 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
 
                 _ => unimplemented!(),
             }
-        },
+        }
         // They can be retrieved from https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html
         InlineAsmRegOrRegClass::RegClass(reg) => match reg {
             InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => "r",
@@ -610,7 +631,7 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
             InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
             | InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
                 unreachable!("clobber-only")
-            },
+            }
             InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => "r",
             InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => "f",
             InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
@@ -637,7 +658,7 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
             InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg_addr) => "a",
             InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
             InlineAsmRegClass::Err => unreachable!(),
-        }
+        },
     };
 
     ConstraintOrRegister::Constraint(constraint)
@@ -653,7 +674,7 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
         | InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => {
             unimplemented!()
         }
-        InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg)=> cx.type_i32(),
+        InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => cx.type_i32(),
         InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
         | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16) => cx.type_f32(),
         InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
@@ -686,7 +707,7 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
         InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
         | InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
             unreachable!("clobber-only")
-        },
+        }
         InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => cx.type_i32(),
         InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => cx.type_f32(),
         InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => cx.type_f32(),
@@ -704,9 +725,9 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
         InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => cx.type_i32(),
         InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
             bug!("LLVM backend does not support SPIR-V")
-        },
+        }
         InlineAsmRegClass::S390x(
-            S390xInlineAsmRegClass::reg | S390xInlineAsmRegClass::reg_addr
+            S390xInlineAsmRegClass::reg | S390xInlineAsmRegClass::reg_addr,
         ) => cx.type_i32(),
         InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(),
         InlineAsmRegClass::Err => unreachable!(),
@@ -714,7 +735,13 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
 }
 
 impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
-    fn codegen_global_asm(&self, template: &[InlineAsmTemplatePiece], operands: &[GlobalAsmOperandRef<'tcx>], options: InlineAsmOptions, _line_spans: &[Span]) {
+    fn codegen_global_asm(
+        &self,
+        template: &[InlineAsmTemplatePiece],
+        operands: &[GlobalAsmOperandRef<'tcx>],
+        options: InlineAsmOptions,
+        _line_spans: &[Span],
+    ) {
         let asm_arch = self.tcx.sess.asm_arch.unwrap();
 
         // Default to Intel syntax on x86
@@ -732,15 +759,17 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                     let mut index = 0;
                     while index < string.len() {
                         // NOTE: gcc does not allow inline comment, so remove them.
-                        let comment_index = string[index..].find("//")
+                        let comment_index = string[index..]
+                            .find("//")
                             .map(|comment_index| comment_index + index)
                             .unwrap_or(string.len());
                         template_str.push_str(&string[index..comment_index]);
-                        index = string[comment_index..].find('\n')
+                        index = string[comment_index..]
+                            .find('\n')
                             .map(|index| index + comment_index)
                             .unwrap_or(string.len());
                     }
-                },
+                }
                 InlineAsmTemplatePiece::Placeholder { operand_idx, modifier: _, span: _ } => {
                     match operands[operand_idx] {
                         GlobalAsmOperandRef::Const { ref string } => {
@@ -782,14 +811,22 @@ impl<'gcc, 'tcx> AsmMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 }
 
-fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option<char>) -> Option<char> {
+fn modifier_to_gcc(
+    arch: InlineAsmArch,
+    reg: InlineAsmRegClass,
+    modifier: Option<char>,
+) -> Option<char> {
     // The modifiers can be retrieved from
     // https://gcc.gnu.org/onlinedocs/gcc/Modifiers.html#Modifiers
     match reg {
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => modifier,
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg)
         | InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => {
-            if modifier == Some('v') { None } else { modifier }
+            if modifier == Some('v') {
+                None
+            } else {
+                modifier
+            }
         }
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
             unreachable!("clobber-only")
@@ -821,7 +858,13 @@ fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option
         }
         InlineAsmRegClass::X86(X86InlineAsmRegClass::reg)
         | InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => match modifier {
-            None => if arch == InlineAsmArch::X86_64 { Some('q') } else { Some('k') },
+            None => {
+                if arch == InlineAsmArch::X86_64 {
+                    Some('q')
+                } else {
+                    Some('k')
+                }
+            }
             Some('l') => Some('b'),
             Some('h') => Some('h'),
             Some('x') => Some('w'),
diff --git a/src/attributes.rs b/src/attributes.rs
index 142f86b003dd..8602566ab8fa 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -1,21 +1,24 @@
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 use gccjit::FnAttribute;
 use gccjit::Function;
-use rustc_attr::InstructionSetAttr;
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 use rustc_attr::InlineAttr;
-use rustc_middle::ty;
-#[cfg(feature="master")]
+use rustc_attr::InstructionSetAttr;
+#[cfg(feature = "master")]
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
+use rustc_middle::ty;
 use rustc_span::symbol::sym;
 
-use crate::{context::CodegenCx, errors::TiedTargetFeatures};
 use crate::gcc_util::{check_tied_features, to_gcc_features};
+use crate::{context::CodegenCx, errors::TiedTargetFeatures};
 
 /// Get GCC attribute for the provided inline heuristic.
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 #[inline]
-fn inline_attr<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, inline: InlineAttr) -> Option<FnAttribute<'gcc>> {
+fn inline_attr<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    inline: InlineAttr,
+) -> Option<FnAttribute<'gcc>> {
     match inline {
         InlineAttr::Hint => Some(FnAttribute::Inline),
         InlineAttr::Always => Some(FnAttribute::AlwaysInline),
@@ -34,24 +37,22 @@ fn inline_attr<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, inline: InlineAttr) -> Op
 /// attributes.
 pub fn from_fn_attrs<'gcc, 'tcx>(
     cx: &CodegenCx<'gcc, 'tcx>,
-    #[cfg_attr(not(feature="master"), allow(unused_variables))]
-    func: Function<'gcc>,
+    #[cfg_attr(not(feature = "master"), allow(unused_variables))] func: Function<'gcc>,
     instance: ty::Instance<'tcx>,
 ) {
     let codegen_fn_attrs = cx.tcx.codegen_fn_attrs(instance.def_id());
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     {
-        let inline =
-            if codegen_fn_attrs.flags.contains(CodegenFnAttrFlags::NAKED) {
-                InlineAttr::Never
-            }
-            else if codegen_fn_attrs.inline == InlineAttr::None && instance.def.requires_inline(cx.tcx) {
-                InlineAttr::Hint
-            }
-            else {
-                codegen_fn_attrs.inline
-            };
+        let inline = if codegen_fn_attrs.flags.contains(CodegenFnAttrFlags::NAKED) {
+            InlineAttr::Never
+        } else if codegen_fn_attrs.inline == InlineAttr::None
+            && instance.def.requires_inline(cx.tcx)
+        {
+            InlineAttr::Hint
+        } else {
+            codegen_fn_attrs.inline
+        };
         if let Some(attr) = inline_attr(cx, inline) {
             if let FnAttribute::AlwaysInline = attr {
                 func.add_attribute(FnAttribute::Inline);
@@ -70,18 +71,21 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
         }
     }
 
-    let function_features =
-        codegen_fn_attrs.target_features.iter().map(|features| features.as_str()).collect::<Vec<&str>>();
+    let function_features = codegen_fn_attrs
+        .target_features
+        .iter()
+        .map(|features| features.as_str())
+        .collect::<Vec<&str>>();
 
-    if let Some(features) = check_tied_features(cx.tcx.sess, &function_features.iter().map(|features| (*features, true)).collect()) {
-        let span = cx.tcx
+    if let Some(features) = check_tied_features(
+        cx.tcx.sess,
+        &function_features.iter().map(|features| (*features, true)).collect(),
+    ) {
+        let span = cx
+            .tcx
             .get_attr(instance.def_id(), sym::target_feature)
             .map_or_else(|| cx.tcx.def_span(instance.def_id()), |a| a.span);
-        cx.tcx.dcx().create_err(TiedTargetFeatures {
-            features: features.join(", "),
-            span,
-        })
-            .emit();
+        cx.tcx.dcx().create_err(TiedTargetFeatures { features: features.join(", "), span }).emit();
         return;
     }
 
@@ -105,24 +109,25 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
             // compiling Rust for Linux:
             // SSE register return with SSE disabled
             // TODO(antoyo): support soft-float and retpoline-external-thunk.
-            if feature.contains("soft-float") || feature.contains("retpoline-external-thunk") || *feature == "-sse" {
+            if feature.contains("soft-float")
+                || feature.contains("retpoline-external-thunk")
+                || *feature == "-sse"
+            {
                 return None;
             }
 
             if feature.starts_with('-') {
                 Some(format!("no{}", feature))
-            }
-            else if feature.starts_with('+') {
+            } else if feature.starts_with('+') {
                 Some(feature[1..].to_string())
-            }
-            else {
+            } else {
                 Some(feature.to_string())
             }
         })
         .collect::<Vec<_>>()
         .join(",");
     if !target_features.is_empty() {
-        #[cfg(feature="master")]
+        #[cfg(feature = "master")]
         func.add_attribute(FnAttribute::Target(&target_features));
     }
 }
diff --git a/src/back/lto.rs b/src/back/lto.rs
index c21b76868239..42837a57bade 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -1,7 +1,6 @@
 /// GCC requires to use the same toolchain for the whole compilation when doing LTO.
 /// So, we need the same version/commit of the linker (gcc) and lto front-end binaries (lto1,
 /// lto-wrapper, liblto_plugin.so).
-
 // FIXME(antoyo): the executables compiled with LTO are bigger than those compiled without LTO.
 // Since it is the opposite for cg_llvm, check if this is normal.
 //
@@ -17,7 +16,6 @@
 // /usr/bin/ld: warning: type of symbol `_RNvNvNvNtCs5JWOrf9uCus_5rayon11thread_pool19WORKER_THREAD_STATE7___getit5___KEY' changed from 1 to 6 in /tmp/ccKeUSiR.ltrans0.ltrans.o
 // /usr/bin/ld: warning: type of symbol `_RNvNvNvNvNtNtNtCsAj5i4SGTR7_3std4sync4mpmc5waker17current_thread_id5DUMMY7___getit5___KEY' changed from 1 to 6 in /tmp/ccKeUSiR.ltrans0.ltrans.o
 // /usr/bin/ld: warning: incremental linking of LTO and non-LTO objects; using -flinker-output=nolto-rel which will bypass whole program optimization
-
 use std::ffi::CString;
 use std::fs::{self, File};
 use std::path::{Path, PathBuf};
@@ -30,18 +28,16 @@ use rustc_codegen_ssa::back::write::{CodegenContext, FatLtoInput};
 use rustc_codegen_ssa::traits::*;
 use rustc_codegen_ssa::{looks_like_rust_object_file, ModuleCodegen, ModuleKind};
 use rustc_data_structures::memmap::Mmap;
-use rustc_errors::{FatalError, DiagCtxt};
+use rustc_errors::{DiagCtxt, FatalError};
 use rustc_hir::def_id::LOCAL_CRATE;
 use rustc_middle::dep_graph::WorkProduct;
 use rustc_middle::middle::exported_symbols::{SymbolExportInfo, SymbolExportLevel};
 use rustc_session::config::{CrateType, Lto};
-use tempfile::{TempDir, tempdir};
+use tempfile::{tempdir, TempDir};
 
 use crate::back::write::save_temp_bitcode;
-use crate::errors::{
-    DynamicLinkingWithLTO, LtoBitcodeFromRlib, LtoDisallowed, LtoDylib,
-};
-use crate::{GccCodegenBackend, GccContext, to_gcc_opt_level};
+use crate::errors::{DynamicLinkingWithLTO, LtoBitcodeFromRlib, LtoDisallowed, LtoDylib};
+use crate::{to_gcc_opt_level, GccCodegenBackend, GccContext};
 
 /// We keep track of the computed LTO cache keys from the previous
 /// session to determine which CGUs we can reuse.
@@ -61,7 +57,10 @@ struct LtoData {
     tmp_path: TempDir,
 }
 
-fn prepare_lto(cgcx: &CodegenContext<GccCodegenBackend>, dcx: &DiagCtxt) -> Result<LtoData, FatalError> {
+fn prepare_lto(
+    cgcx: &CodegenContext<GccCodegenBackend>,
+    dcx: &DiagCtxt,
+) -> Result<LtoData, FatalError> {
     let export_threshold = match cgcx.lto {
         // We're just doing LTO for our one crate
         Lto::ThinLocal => SymbolExportLevel::Rust,
@@ -72,14 +71,13 @@ fn prepare_lto(cgcx: &CodegenContext<GccCodegenBackend>, dcx: &DiagCtxt) -> Resu
         Lto::No => panic!("didn't request LTO but we're doing LTO"),
     };
 
-    let tmp_path =
-        match tempdir() {
-            Ok(tmp_path) => tmp_path,
-            Err(error) => {
-                eprintln!("Cannot create temporary directory: {}", error);
-                return Err(FatalError);
-            },
-        };
+    let tmp_path = match tempdir() {
+        Ok(tmp_path) => tmp_path,
+        Err(error) => {
+            eprintln!("Cannot create temporary directory: {}", error);
+            return Err(FatalError);
+        }
+    };
 
     let symbol_filter = &|&(ref name, info): &(String, SymbolExportInfo)| {
         if info.level.is_below_threshold(export_threshold) || info.used {
@@ -125,8 +123,7 @@ fn prepare_lto(cgcx: &CodegenContext<GccCodegenBackend>, dcx: &DiagCtxt) -> Resu
             let exported_symbols =
                 cgcx.exported_symbols.as_ref().expect("needs exported symbols for LTO");
             {
-                let _timer =
-                    cgcx.prof.generic_activity("GCC_lto_generate_symbols_below_threshold");
+                let _timer = cgcx.prof.generic_activity("GCC_lto_generate_symbols_below_threshold");
                 symbols_below_threshold
                     .extend(exported_symbols[&cnum].iter().filter_map(symbol_filter));
             }
@@ -170,10 +167,9 @@ fn prepare_lto(cgcx: &CodegenContext<GccCodegenBackend>, dcx: &DiagCtxt) -> Resu
 }
 
 fn save_as_file(obj: &[u8], path: &Path) -> Result<(), LtoBitcodeFromRlib> {
-    fs::write(path, obj)
-        .map_err(|error| LtoBitcodeFromRlib {
-            gcc_err: format!("write object file to temp dir: {}", error)
-        })
+    fs::write(path, obj).map_err(|error| LtoBitcodeFromRlib {
+        gcc_err: format!("write object file to temp dir: {}", error),
+    })
 }
 
 /// Performs fat LTO by merging all modules into a single one and returning it
@@ -186,13 +182,25 @@ pub(crate) fn run_fat(
     let dcx = cgcx.create_dcx();
     let lto_data = prepare_lto(cgcx, &dcx)?;
     /*let symbols_below_threshold =
-        lto_data.symbols_below_threshold.iter().map(|c| c.as_ptr()).collect::<Vec<_>>();*/
-    fat_lto(cgcx, &dcx, modules, cached_modules, lto_data.upstream_modules, lto_data.tmp_path,
+    lto_data.symbols_below_threshold.iter().map(|c| c.as_ptr()).collect::<Vec<_>>();*/
+    fat_lto(
+        cgcx,
+        &dcx,
+        modules,
+        cached_modules,
+        lto_data.upstream_modules,
+        lto_data.tmp_path,
         //&symbols_below_threshold,
     )
 }
 
-fn fat_lto(cgcx: &CodegenContext<GccCodegenBackend>, _dcx: &DiagCtxt, modules: Vec<FatLtoInput<GccCodegenBackend>>, cached_modules: Vec<(SerializedModule<ModuleBuffer>, WorkProduct)>, mut serialized_modules: Vec<(SerializedModule<ModuleBuffer>, CString)>, tmp_path: TempDir,
+fn fat_lto(
+    cgcx: &CodegenContext<GccCodegenBackend>,
+    _dcx: &DiagCtxt,
+    modules: Vec<FatLtoInput<GccCodegenBackend>>,
+    cached_modules: Vec<(SerializedModule<ModuleBuffer>, WorkProduct)>,
+    mut serialized_modules: Vec<(SerializedModule<ModuleBuffer>, CString)>,
+    tmp_path: TempDir,
     //symbols_below_threshold: &[*const libc::c_char],
 ) -> Result<LtoModuleCodegen<GccCodegenBackend>, FatalError> {
     let _timer = cgcx.prof.generic_activity("GCC_fat_lto_build_monolithic_module");
@@ -298,10 +306,15 @@ fn fat_lto(cgcx: &CodegenContext<GccCodegenBackend>, _dcx: &DiagCtxt, modules: V
             match bc_decoded {
                 SerializedModule::Local(ref module_buffer) => {
                     module.module_llvm.should_combine_object_files = true;
-                    module.module_llvm.context.add_driver_option(module_buffer.0.to_str().expect("path"));
-                },
+                    module
+                        .module_llvm
+                        .context
+                        .add_driver_option(module_buffer.0.to_str().expect("path"));
+                }
                 SerializedModule::FromRlib(_) => unimplemented!("from rlib"),
-                SerializedModule::FromUncompressedFile(_) => unimplemented!("from uncompressed file"),
+                SerializedModule::FromUncompressedFile(_) => {
+                    unimplemented!("from uncompressed file")
+                }
             }
             serialized_bitcode.push(bc_decoded);
         }
@@ -309,13 +322,13 @@ fn fat_lto(cgcx: &CodegenContext<GccCodegenBackend>, _dcx: &DiagCtxt, modules: V
 
         // Internalize everything below threshold to help strip out more modules and such.
         /*unsafe {
-            let ptr = symbols_below_threshold.as_ptr();
-            llvm::LLVMRustRunRestrictionPass(
-                llmod,
-                ptr as *const *const libc::c_char,
-                symbols_below_threshold.len() as libc::size_t,
-            );*/
-            save_temp_bitcode(cgcx, &module, "lto.after-restriction");
+        let ptr = symbols_below_threshold.as_ptr();
+        llvm::LLVMRustRunRestrictionPass(
+            llmod,
+            ptr as *const *const libc::c_char,
+            symbols_below_threshold.len() as libc::size_t,
+        );*/
+        save_temp_bitcode(cgcx, &module, "lto.after-restriction");
         //}
     }
 
diff --git a/src/back/write.rs b/src/back/write.rs
index eea62adca07e..76a619a1af78 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -1,19 +1,24 @@
 use std::{env, fs};
 
 use gccjit::OutputKind;
-use rustc_codegen_ssa::{CompiledModule, ModuleCodegen};
 use rustc_codegen_ssa::back::link::ensure_removed;
 use rustc_codegen_ssa::back::write::{BitcodeSection, CodegenContext, EmitObj, ModuleConfig};
+use rustc_codegen_ssa::{CompiledModule, ModuleCodegen};
 use rustc_errors::DiagCtxt;
 use rustc_fs_util::link_or_copy;
 use rustc_session::config::OutputType;
 use rustc_span::fatal_error::FatalError;
 use rustc_target::spec::SplitDebuginfo;
 
-use crate::{GccCodegenBackend, GccContext};
 use crate::errors::CopyBitcode;
+use crate::{GccCodegenBackend, GccContext};
 
-pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, dcx: &DiagCtxt, module: ModuleCodegen<GccContext>, config: &ModuleConfig) -> Result<CompiledModule, FatalError> {
+pub(crate) unsafe fn codegen(
+    cgcx: &CodegenContext<GccCodegenBackend>,
+    dcx: &DiagCtxt,
+    module: ModuleCodegen<GccContext>,
+    config: &ModuleConfig,
+) -> Result<CompiledModule, FatalError> {
     let _timer = cgcx.prof.generic_activity_with_arg("GCC_module_codegen", &*module.name);
     {
         let context = &module.module_llvm.context;
@@ -51,7 +56,8 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, dcx: &Dia
                     .generic_activity_with_arg("GCC_module_codegen_emit_bitcode", &*module.name);
                 context.add_command_line_option("-flto=auto");
                 context.add_command_line_option("-flto-partition=one");
-                context.compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+                context
+                    .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
             }
 
             if config.emit_obj == EmitObj::ObjectCode(BitcodeSection::Full) {
@@ -65,7 +71,8 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, dcx: &Dia
                 context.add_command_line_option("-flto-partition=one");
                 context.add_command_line_option("-ffat-lto-objects");
                 // TODO(antoyo): Send -plugin/usr/lib/gcc/x86_64-pc-linux-gnu/11.1.0/liblto_plugin.so to linker (this should be done when specifying the appropriate rustc cli argument).
-                context.compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+                context
+                    .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
             }
         }
 
@@ -75,9 +82,8 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, dcx: &Dia
         }
 
         if config.emit_asm {
-            let _timer = cgcx
-                .prof
-                .generic_activity_with_arg("GCC_module_codegen_emit_asm", &*module.name);
+            let _timer =
+                cgcx.prof.generic_activity_with_arg("GCC_module_codegen_emit_asm", &*module.name);
             let path = cgcx.output_filenames.temp_path(OutputType::Assembly, module_name);
             context.compile_to_file(OutputKind::Assembler, path.to_str().expect("path to str"));
         }
@@ -90,7 +96,9 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, dcx: &Dia
                 if env::var("CG_GCCJIT_DUMP_MODULE_NAMES").as_deref() == Ok("1") {
                     println!("Module {}", module.name);
                 }
-                if env::var("CG_GCCJIT_DUMP_ALL_MODULES").as_deref() == Ok("1") || env::var("CG_GCCJIT_DUMP_MODULE").as_deref() == Ok(&module.name) {
+                if env::var("CG_GCCJIT_DUMP_ALL_MODULES").as_deref() == Ok("1")
+                    || env::var("CG_GCCJIT_DUMP_MODULE").as_deref() == Ok(&module.name)
+                {
                     println!("Dumping reproducer {}", module.name);
                     let _ = fs::create_dir("/tmp/reproducers");
                     // FIXME(antoyo): segfault in dump_reproducer_to_file() might be caused by
@@ -118,10 +126,15 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, dcx: &Dia
                     context.add_driver_option("-fuse-linker-plugin");
 
                     // NOTE: this doesn't actually generate an executable. With the above flags, it combines the .o files together in another .o.
-                    context.compile_to_file(OutputKind::Executable, obj_out.to_str().expect("path to str"));
-                }
-                else {
-                    context.compile_to_file(OutputKind::ObjectFile, obj_out.to_str().expect("path to str"));
+                    context.compile_to_file(
+                        OutputKind::Executable,
+                        obj_out.to_str().expect("path to str"),
+                    );
+                } else {
+                    context.compile_to_file(
+                        OutputKind::ObjectFile,
+                        obj_out.to_str().expect("path to str"),
+                    );
                 }
             }
 
@@ -149,11 +162,19 @@ pub(crate) unsafe fn codegen(cgcx: &CodegenContext<GccCodegenBackend>, dcx: &Dia
     ))
 }
 
-pub(crate) fn link(_cgcx: &CodegenContext<GccCodegenBackend>, _dcx: &DiagCtxt, mut _modules: Vec<ModuleCodegen<GccContext>>) -> Result<ModuleCodegen<GccContext>, FatalError> {
+pub(crate) fn link(
+    _cgcx: &CodegenContext<GccCodegenBackend>,
+    _dcx: &DiagCtxt,
+    mut _modules: Vec<ModuleCodegen<GccContext>>,
+) -> Result<ModuleCodegen<GccContext>, FatalError> {
     unimplemented!();
 }
 
-pub(crate) fn save_temp_bitcode(cgcx: &CodegenContext<GccCodegenBackend>, _module: &ModuleCodegen<GccContext>, _name: &str) {
+pub(crate) fn save_temp_bitcode(
+    cgcx: &CodegenContext<GccCodegenBackend>,
+    _module: &ModuleCodegen<GccContext>,
+    _name: &str,
+) {
     if !cgcx.save_temps {
         return;
     }
diff --git a/src/base.rs b/src/base.rs
index b1d0f541702b..2a2d5741d131 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -2,29 +2,26 @@ use std::collections::HashSet;
 use std::env;
 use std::time::Instant;
 
-use gccjit::{
-    FunctionType,
-    GlobalKind,
-};
-use rustc_middle::dep_graph;
-use rustc_middle::ty::TyCtxt;
-#[cfg(feature="master")]
-use rustc_middle::mir::mono::Visibility;
-use rustc_middle::mir::mono::Linkage;
-use rustc_codegen_ssa::{ModuleCodegen, ModuleKind};
+use gccjit::{FunctionType, GlobalKind};
 use rustc_codegen_ssa::base::maybe_create_entry_wrapper;
 use rustc_codegen_ssa::mono_item::MonoItemExt;
 use rustc_codegen_ssa::traits::DebugInfoMethods;
+use rustc_codegen_ssa::{ModuleCodegen, ModuleKind};
+use rustc_middle::dep_graph;
+use rustc_middle::mir::mono::Linkage;
+#[cfg(feature = "master")]
+use rustc_middle::mir::mono::Visibility;
+use rustc_middle::ty::TyCtxt;
 use rustc_session::config::DebugInfo;
 use rustc_span::Symbol;
 use rustc_target::spec::PanicStrategy;
 
-use crate::{LockedTargetInfo, gcc_util, new_context};
-use crate::GccContext;
 use crate::builder::Builder;
 use crate::context::CodegenCx;
+use crate::GccContext;
+use crate::{gcc_util, new_context, LockedTargetInfo};
 
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 pub fn visibility_to_gcc(linkage: Visibility) -> gccjit::Visibility {
     match linkage {
         Visibility::Default => gccjit::Visibility::Default,
@@ -66,7 +63,11 @@ pub fn linkage_to_gcc(linkage: Linkage) -> FunctionType {
     }
 }
 
-pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: LockedTargetInfo) -> (ModuleCodegen<GccContext>, u64) {
+pub fn compile_codegen_unit(
+    tcx: TyCtxt<'_>,
+    cgu_name: Symbol,
+    target_info: LockedTargetInfo,
+) -> (ModuleCodegen<GccContext>, u64) {
     let prof_timer = tcx.prof.generic_activity("codegen_module");
     let start_time = Instant::now();
 
@@ -85,7 +86,10 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
     // the time we needed for codegenning it.
     let cost = time_to_codegen.as_secs() * 1_000_000_000 + time_to_codegen.subsec_nanos() as u64;
 
-    fn module_codegen(tcx: TyCtxt<'_>, (cgu_name, target_info): (Symbol, LockedTargetInfo)) -> ModuleCodegen<GccContext> {
+    fn module_codegen(
+        tcx: TyCtxt<'_>,
+        (cgu_name, target_info): (Symbol, LockedTargetInfo),
+    ) -> ModuleCodegen<GccContext> {
         let cgu = tcx.codegen_unit(cgu_name);
         // Instantiate monomorphizations without filling out definitions yet...
         let context = new_context(tcx);
@@ -95,7 +99,12 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
             context.add_driver_option("-fexceptions");
         }
 
-        let disabled_features: HashSet<_> = tcx.sess.opts.cg.target_feature.split(',')
+        let disabled_features: HashSet<_> = tcx
+            .sess
+            .opts
+            .cg
+            .target_feature
+            .split(',')
             .filter(|feature| feature.starts_with('-'))
             .map(|string| &string[1..])
             .collect();
@@ -129,7 +138,13 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
             context.add_command_line_option(&format!("-march={}", target_cpu));
         }
 
-        if tcx.sess.opts.unstable_opts.function_sections.unwrap_or(tcx.sess.target.function_sections) {
+        if tcx
+            .sess
+            .opts
+            .unstable_opts
+            .function_sections
+            .unwrap_or(tcx.sess.target.function_sections)
+        {
             context.add_command_line_option("-ffunction-sections");
             context.add_command_line_option("-fdata-sections");
         }
@@ -190,11 +205,7 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol, target_info: Lock
 
         ModuleCodegen {
             name: cgu_name.to_string(),
-            module_llvm: GccContext {
-                context,
-                should_combine_object_files: false,
-                temp_dir: None,
-            },
+            module_llvm: GccContext { context, should_combine_object_files: false, temp_dir: None },
             kind: ModuleKind::Regular,
         }
     }
diff --git a/src/builder.rs b/src/builder.rs
index dcac066f3953..26967fb49535 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -4,44 +4,36 @@ use std::convert::TryFrom;
 use std::ops::Deref;
 
 use gccjit::{
-    BinaryOp, Block, ComparisonOp, Context, Function, LValue, Location, RValue, ToRValue, Type, UnaryOp
+    BinaryOp, Block, ComparisonOp, Context, Function, LValue, Location, RValue, ToRValue, Type,
+    UnaryOp,
 };
 use rustc_apfloat::{ieee, Float, Round, Status};
-use rustc_codegen_ssa::MemFlags;
 use rustc_codegen_ssa::common::{
     AtomicOrdering, AtomicRmwBinOp, IntPredicate, RealPredicate, SynchronizationScope, TypeKind,
 };
 use rustc_codegen_ssa::mir::operand::{OperandRef, OperandValue};
 use rustc_codegen_ssa::mir::place::PlaceRef;
 use rustc_codegen_ssa::traits::{
-    BackendTypes,
-    BaseTypeMethods,
-    BuilderMethods,
-    ConstMethods,
-    LayoutTypeMethods,
-    HasCodegen,
-    OverflowOp,
-    StaticBuilderMethods,
+    BackendTypes, BaseTypeMethods, BuilderMethods, ConstMethods, HasCodegen, LayoutTypeMethods,
+    OverflowOp, StaticBuilderMethods,
 };
+use rustc_codegen_ssa::MemFlags;
 use rustc_data_structures::fx::FxHashSet;
 use rustc_middle::bug;
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrs;
+use rustc_middle::ty::layout::{
+    FnAbiError, FnAbiOfHelpers, FnAbiRequest, HasParamEnv, HasTyCtxt, LayoutError, LayoutOfHelpers,
+    TyAndLayout,
+};
 use rustc_middle::ty::{ParamEnv, Ty, TyCtxt};
-use rustc_middle::ty::layout::{FnAbiError, FnAbiOfHelpers, FnAbiRequest, HasParamEnv, HasTyCtxt, LayoutError, LayoutOfHelpers, TyAndLayout};
-use rustc_span::Span;
 use rustc_span::def_id::DefId;
+use rustc_span::Span;
 use rustc_target::abi::{
-    self,
-    call::FnAbi,
-    Align,
-    HasDataLayout,
-    Size,
-    TargetDataLayout,
-    WrappingRange,
+    self, call::FnAbi, Align, HasDataLayout, Size, TargetDataLayout, WrappingRange,
 };
 use rustc_target::spec::{HasTargetSpec, Target};
 
-use crate::common::{SignType, TypeReflection, type_is_pointer};
+use crate::common::{type_is_pointer, SignType, TypeReflection};
 use crate::context::CodegenCx;
 use crate::intrinsic::llvm;
 use crate::type_of::LayoutGccExt;
@@ -61,56 +53,74 @@ pub struct Builder<'a: 'gcc, 'gcc, 'tcx> {
     pub cx: &'a CodegenCx<'gcc, 'tcx>,
     pub block: Block<'gcc>,
     stack_var_count: Cell<usize>,
-    pub loc: Option<Location<'gcc>>,
+    pub location: Option<Location<'gcc>>,
 }
 
 impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     fn with_cx(cx: &'a CodegenCx<'gcc, 'tcx>, block: Block<'gcc>) -> Self {
-        Builder {
-            cx,
-            block,
-            stack_var_count: Cell::new(0),
-            loc: None
-        }
+        Builder { cx, block, stack_var_count: Cell::new(0), location: None }
     }
 
-    fn atomic_extremum(&mut self, operation: ExtremumOperation, dst: RValue<'gcc>, src: RValue<'gcc>, order: AtomicOrdering) -> RValue<'gcc> {
+    fn atomic_extremum(
+        &mut self,
+        operation: ExtremumOperation,
+        dst: RValue<'gcc>,
+        src: RValue<'gcc>,
+        order: AtomicOrdering,
+    ) -> RValue<'gcc> {
         let size = src.get_type().get_size();
 
         let func = self.current_func();
 
-        let load_ordering =
-            match order {
-                // TODO(antoyo): does this make sense?
-                AtomicOrdering::AcquireRelease | AtomicOrdering::Release => AtomicOrdering::Acquire,
-                _ => order,
-            };
-        let previous_value = self.atomic_load(dst.get_type(), dst, load_ordering, Size::from_bytes(size));
-        let previous_var = func.new_local(self.loc, previous_value.get_type(), "previous_value");
-        let return_value = func.new_local(self.loc, previous_value.get_type(), "return_value");
-        self.llbb().add_assignment(self.loc, previous_var, previous_value);
-        self.llbb().add_assignment(self.loc, return_value, previous_var.to_rvalue());
+        let load_ordering = match order {
+            // TODO(antoyo): does this make sense?
+            AtomicOrdering::AcquireRelease | AtomicOrdering::Release => AtomicOrdering::Acquire,
+            _ => order,
+        };
+        let previous_value =
+            self.atomic_load(dst.get_type(), dst, load_ordering, Size::from_bytes(size));
+        let previous_var =
+            func.new_local(self.location, previous_value.get_type(), "previous_value");
+        let return_value = func.new_local(self.location, previous_value.get_type(), "return_value");
+        self.llbb().add_assignment(self.location, previous_var, previous_value);
+        self.llbb().add_assignment(self.location, return_value, previous_var.to_rvalue());
 
         let while_block = func.new_block("while");
         let after_block = func.new_block("after_while");
-        self.llbb().end_with_jump(self.loc, while_block);
+        self.llbb().end_with_jump(self.location, while_block);
 
         // NOTE: since jumps were added and compare_exchange doesn't expect this, the current block in the
         // state need to be updated.
         self.switch_to_block(while_block);
 
-        let comparison_operator =
-            match operation {
-                ExtremumOperation::Max => ComparisonOp::LessThan,
-                ExtremumOperation::Min => ComparisonOp::GreaterThan,
-            };
+        let comparison_operator = match operation {
+            ExtremumOperation::Max => ComparisonOp::LessThan,
+            ExtremumOperation::Min => ComparisonOp::GreaterThan,
+        };
 
-        let cond1 = self.context.new_comparison(self.loc, comparison_operator, previous_var.to_rvalue(), self.context.new_cast(self.loc, src, previous_value.get_type()));
-        let compare_exchange = self.compare_exchange(dst, previous_var, src, order, load_ordering, false);
-        let cond2 = self.cx.context.new_unary_op(self.loc, UnaryOp::LogicalNegate, compare_exchange.get_type(), compare_exchange);
-        let cond = self.cx.context.new_binary_op(self.loc, BinaryOp::LogicalAnd, self.cx.bool_type, cond1, cond2);
+        let cond1 = self.context.new_comparison(
+            self.location,
+            comparison_operator,
+            previous_var.to_rvalue(),
+            self.context.new_cast(self.location, src, previous_value.get_type()),
+        );
+        let compare_exchange =
+            self.compare_exchange(dst, previous_var, src, order, load_ordering, false);
+        let cond2 = self.cx.context.new_unary_op(
+            self.location,
+            UnaryOp::LogicalNegate,
+            compare_exchange.get_type(),
+            compare_exchange,
+        );
+        let cond = self.cx.context.new_binary_op(
+            self.location,
+            BinaryOp::LogicalAnd,
+            self.cx.bool_type,
+            cond1,
+            cond2,
+        );
 
-        while_block.end_with_conditional(self.loc, cond, while_block, after_block);
+        while_block.end_with_conditional(self.location, cond, while_block, after_block);
 
         // NOTE: since jumps were added in a place rustc does not expect, the current block in the
         // state need to be updated.
@@ -119,29 +129,48 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         return_value.to_rvalue()
     }
 
-    fn compare_exchange(&self, dst: RValue<'gcc>, cmp: LValue<'gcc>, src: RValue<'gcc>, order: AtomicOrdering, failure_order: AtomicOrdering, weak: bool) -> RValue<'gcc> {
+    fn compare_exchange(
+        &self,
+        dst: RValue<'gcc>,
+        cmp: LValue<'gcc>,
+        src: RValue<'gcc>,
+        order: AtomicOrdering,
+        failure_order: AtomicOrdering,
+        weak: bool,
+    ) -> RValue<'gcc> {
         let size = src.get_type().get_size();
-        let compare_exchange = self.context.get_builtin_function(&format!("__atomic_compare_exchange_{}", size));
+        let compare_exchange =
+            self.context.get_builtin_function(&format!("__atomic_compare_exchange_{}", size));
         let order = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
         let failure_order = self.context.new_rvalue_from_int(self.i32_type, failure_order.to_gcc());
         let weak = self.context.new_rvalue_from_int(self.bool_type, weak as i32);
 
         let void_ptr_type = self.context.new_type::<*mut ()>();
         let volatile_void_ptr_type = void_ptr_type.make_volatile();
-        let dst = self.context.new_cast(self.loc, dst, volatile_void_ptr_type);
-        let expected = self.context.new_cast(self.loc, cmp.get_address(self.loc), void_ptr_type);
+        let dst = self.context.new_cast(self.location, dst, volatile_void_ptr_type);
+        let expected =
+            self.context.new_cast(self.location, cmp.get_address(self.location), void_ptr_type);
 
         // NOTE: not sure why, but we have the wrong type here.
         let int_type = compare_exchange.get_param(2).to_rvalue().get_type();
-        let src = self.context.new_cast(self.loc, src, int_type);
-        self.context.new_call(self.loc, compare_exchange, &[dst, expected, src, weak, order, failure_order])
+        let src = self.context.new_cast(self.location, src, int_type);
+        self.context.new_call(
+            self.location,
+            compare_exchange,
+            &[dst, expected, src, weak, order, failure_order],
+        )
     }
 
     pub fn assign(&self, lvalue: LValue<'gcc>, value: RValue<'gcc>) {
-        self.llbb().add_assignment(self.loc, lvalue, value);
+        self.llbb().add_assignment(self.location, lvalue, value);
     }
 
-    fn check_call<'b>(&mut self, _typ: &str, func: Function<'gcc>, args: &'b [RValue<'gcc>]) -> Cow<'b, [RValue<'gcc>]> {
+    fn check_call<'b>(
+        &mut self,
+        _typ: &str,
+        func: Function<'gcc>,
+        args: &'b [RValue<'gcc>],
+    ) -> Cow<'b, [RValue<'gcc>]> {
         let mut all_args_match = true;
         let mut param_types = vec![];
         let param_count = func.get_param_count();
@@ -166,8 +195,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let actual_ty = actual_val.get_type();
                 if expected_ty != actual_ty {
                     self.bitcast(actual_val, expected_ty)
-                }
-                else {
+                } else {
                     actual_val
                 }
             })
@@ -178,7 +206,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         Cow::Owned(casted_args)
     }
 
-    fn check_ptr_call<'b>(&mut self, _typ: &str, func_ptr: RValue<'gcc>, args: &'b [RValue<'gcc>]) -> Cow<'b, [RValue<'gcc>]> {
+    fn check_ptr_call<'b>(
+        &mut self,
+        _typ: &str,
+        func_ptr: RValue<'gcc>,
+        args: &'b [RValue<'gcc>],
+    ) -> Cow<'b, [RValue<'gcc>]> {
         let mut all_args_match = true;
         let mut param_types = vec![];
         let gcc_func = func_ptr.get_type().dyncast_function_ptr_type().expect("function ptr");
@@ -212,20 +245,32 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
                 let actual_ty = actual_val.get_type();
                 if expected_ty != actual_ty {
-                    if !actual_ty.is_vector() && !expected_ty.is_vector() && (actual_ty.is_integral() && expected_ty.is_integral()) || (actual_ty.get_pointee().is_some() && expected_ty.get_pointee().is_some()) {
-                        self.context.new_cast(self.loc, actual_val, expected_ty)
-                    }
-                    else if on_stack_param_indices.contains(&index) {
-                        actual_val.dereference(self.loc).to_rvalue()
-                    }
-                    else {
-                        assert!(!((actual_ty.is_vector() && !expected_ty.is_vector()) || (!actual_ty.is_vector() && expected_ty.is_vector())), "{:?} ({}) -> {:?} ({}), index: {:?}[{}]", actual_ty, actual_ty.is_vector(), expected_ty, expected_ty.is_vector(), func_ptr, index);
+                    if !actual_ty.is_vector()
+                        && !expected_ty.is_vector()
+                        && (actual_ty.is_integral() && expected_ty.is_integral())
+                        || (actual_ty.get_pointee().is_some()
+                            && expected_ty.get_pointee().is_some())
+                    {
+                        self.context.new_cast(self.location, actual_val, expected_ty)
+                    } else if on_stack_param_indices.contains(&index) {
+                        actual_val.dereference(self.location).to_rvalue()
+                    } else {
+                        assert!(
+                            !((actual_ty.is_vector() && !expected_ty.is_vector())
+                                || (!actual_ty.is_vector() && expected_ty.is_vector())),
+                            "{:?} ({}) -> {:?} ({}), index: {:?}[{}]",
+                            actual_ty,
+                            actual_ty.is_vector(),
+                            expected_ty,
+                            expected_ty.is_vector(),
+                            func_ptr,
+                            index
+                        );
                         // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
                         // TODO: remove bitcast now that vector types can be compared?
                         self.bitcast(actual_val, expected_ty)
                     }
-                }
-                else {
+                } else {
                     actual_val
                 }
             })
@@ -249,7 +294,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         self.block.get_function()
     }
 
-    fn function_call(&mut self, func: RValue<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
+    fn function_call(
+        &mut self,
+        func: RValue<'gcc>,
+        args: &[RValue<'gcc>],
+        _funclet: Option<&Funclet>,
+    ) -> RValue<'gcc> {
         // TODO(antoyo): remove when the API supports a different type for functions.
         let func: Function<'gcc> = self.cx.rvalue_as_function(func);
         let args = self.check_call("call", func, args);
@@ -261,35 +311,54 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let current_func = self.block.get_function();
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
-            let result = current_func.new_local(self.loc, return_type, &format!("returnValue{}", unsafe { RETURN_VALUE_COUNT }));
-            self.block.add_assignment(self.loc, result, self.cx.context.new_call(self.loc, func, &args));
+            let result = current_func.new_local(
+                self.location,
+                return_type,
+                &format!("returnValue{}", unsafe { RETURN_VALUE_COUNT }),
+            );
+            self.block.add_assignment(
+                self.location,
+                result,
+                self.cx.context.new_call(self.location, func, &args),
+            );
             result.to_rvalue()
-        }
-        else {
-            self.block.add_eval(self.loc, self.cx.context.new_call(self.loc, func, &args));
+        } else {
+            self.block
+                .add_eval(self.location, self.cx.context.new_call(self.location, func, &args));
             // Return dummy value when not having return value.
             self.context.new_rvalue_from_long(self.isize_type, 0)
         }
     }
 
-    fn function_ptr_call(&mut self, typ: Type<'gcc>, mut func_ptr: RValue<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
-        let gcc_func =
-            match func_ptr.get_type().dyncast_function_ptr_type() {
-                Some(func) => func,
-                None => {
-                    // NOTE: due to opaque pointers now being used, we need to cast here.
-                    let new_func_type = typ.dyncast_function_ptr_type().expect("function ptr");
-                    func_ptr = self.context.new_cast(self.loc, func_ptr, typ);
-                    new_func_type
-                },
-            };
+    fn function_ptr_call(
+        &mut self,
+        typ: Type<'gcc>,
+        mut func_ptr: RValue<'gcc>,
+        args: &[RValue<'gcc>],
+        _funclet: Option<&Funclet>,
+    ) -> RValue<'gcc> {
+        let gcc_func = match func_ptr.get_type().dyncast_function_ptr_type() {
+            Some(func) => func,
+            None => {
+                // NOTE: due to opaque pointers now being used, we need to cast here.
+                let new_func_type = typ.dyncast_function_ptr_type().expect("function ptr");
+                func_ptr = self.context.new_cast(self.location, func_ptr, typ);
+                new_func_type
+            }
+        };
         let func_name = format!("{:?}", func_ptr);
         let previous_arg_count = args.len();
         let orig_args = args;
         let args = {
             let function_address_names = self.function_address_names.borrow();
             let original_function_name = function_address_names.get(&func_ptr);
-            llvm::adjust_intrinsic_arguments(&self, gcc_func, args.into(), &func_name, original_function_name)
+            llvm::adjust_intrinsic_arguments(
+                &self,
+                gcc_func,
+                args.into(),
+                &func_name,
+                original_function_name,
+            )
         };
         let args_adjusted = args.len() != previous_arg_count;
         let args = self.check_ptr_call("call", func_ptr, &*args);
@@ -302,39 +371,78 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         if return_type != void_type {
             unsafe { RETURN_VALUE_COUNT += 1 };
-            let return_value = self.cx.context.new_call_through_ptr(self.loc, func_ptr, &args);
-            let return_value = llvm::adjust_intrinsic_return_value(&self, return_value, &func_name, &args, args_adjusted, orig_args);
-            let result = current_func.new_local(self.loc, return_value.get_type(), &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
-            self.block.add_assignment(self.loc, result, return_value);
+            let return_value = self.cx.context.new_call_through_ptr(self.location, func_ptr, &args);
+            let return_value = llvm::adjust_intrinsic_return_value(
+                &self,
+                return_value,
+                &func_name,
+                &args,
+                args_adjusted,
+                orig_args,
+            );
+            let result = current_func.new_local(
+                self.location,
+                return_value.get_type(),
+                &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }),
+            );
+            self.block.add_assignment(self.location, result, return_value);
             result.to_rvalue()
-        }
-        else {
-            #[cfg(not(feature="master"))]
+        } else {
+            #[cfg(not(feature = "master"))]
             if gcc_func.get_param_count() == 0 {
                 // FIXME(antoyo): As a temporary workaround for unsupported LLVM intrinsics.
-                self.block.add_eval(self.loc, self.cx.context.new_call_through_ptr(self.loc, func_ptr, &[]));
+                self.block.add_eval(
+                    self.location,
+                    self.cx.context.new_call_through_ptr(self.location, func_ptr, &[]),
+                );
+            } else {
+                self.block.add_eval(
+                    self.location,
+                    self.cx.context.new_call_through_ptr(self.location, func_ptr, &args),
+                );
             }
-            else {
-                self.block.add_eval(self.loc, self.cx.context.new_call_through_ptr(self.loc, func_ptr, &args));
-            }
-            #[cfg(feature="master")]
-            self.block.add_eval(self.loc, self.cx.context.new_call_through_ptr(self.loc, func_ptr, &args));
+            #[cfg(feature = "master")]
+            self.block.add_eval(
+                self.location,
+                self.cx.context.new_call_through_ptr(self.location, func_ptr, &args),
+            );
             // Return dummy value when not having return value.
-            let result = current_func.new_local(self.loc, self.isize_type, "dummyValueThatShouldNeverBeUsed");
-            self.block.add_assignment(self.loc, result, self.context.new_rvalue_from_long(self.isize_type, 0));
+            let result = current_func.new_local(
+                self.location,
+                self.isize_type,
+                "dummyValueThatShouldNeverBeUsed",
+            );
+            self.block.add_assignment(
+                self.location,
+                result,
+                self.context.new_rvalue_from_long(self.isize_type, 0),
+            );
             result.to_rvalue()
         }
     }
 
-    pub fn overflow_call(&self, func: Function<'gcc>, args: &[RValue<'gcc>], _funclet: Option<&Funclet>) -> RValue<'gcc> {
+    pub fn overflow_call(
+        &self,
+        func: Function<'gcc>,
+        args: &[RValue<'gcc>],
+        _funclet: Option<&Funclet>,
+    ) -> RValue<'gcc> {
         // gccjit requires to use the result of functions, even when it's not used.
         // That's why we assign the result to a local.
         let return_type = self.context.new_type::<bool>();
         let current_func = self.block.get_function();
         // TODO(antoyo): return the new_call() directly? Since the overflow function has no side-effects.
         unsafe { RETURN_VALUE_COUNT += 1 };
-        let result = current_func.new_local(self.loc, return_type, &format!("overflowReturnValue{}", unsafe { RETURN_VALUE_COUNT }));
-        self.block.add_assignment(self.loc, result, self.cx.context.new_call(self.loc, func, &args));
+        let result = current_func.new_local(
+            self.location,
+            return_type,
+            &format!("overflowReturnValue{}", unsafe { RETURN_VALUE_COUNT }),
+        );
+        self.block.add_assignment(
+            self.location,
+            result,
+            self.cx.context.new_call(self.location, func, &args),
+        );
         result.to_rvalue()
     }
 }
@@ -398,13 +506,15 @@ impl<'gcc, 'tcx> BackendTypes for Builder<'_, 'gcc, 'tcx> {
     type DIVariable = <CodegenCx<'gcc, 'tcx> as BackendTypes>::DIVariable;
 }
 
-pub fn set_rval_location<'a, 'gcc, 'tcx>(bx: &mut Builder<'a,'gcc,'tcx>, rvalue:RValue<'gcc>) -> RValue<'gcc> {
-    if bx.loc.is_some(){
+fn set_rvalue_location<'a, 'gcc, 'tcx>(
+    bx: &mut Builder<'a, 'gcc, 'tcx>,
+    rvalue: RValue<'gcc>,
+) -> RValue<'gcc> {
+    if bx.location.is_some() {
         #[cfg(feature = "master")]
-        rvalue.set_location(bx.loc.unwrap());
+        rvalue.set_location(bx.location.unwrap());
     }
     rvalue
-    
 }
 
 impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
@@ -431,43 +541,58 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn ret_void(&mut self) {
-        self.llbb().end_with_void_return(self.loc)
+        self.llbb().end_with_void_return(self.location)
     }
 
     fn ret(&mut self, mut value: RValue<'gcc>) {
         if self.structs_as_pointer.borrow().contains(&value) {
             // NOTE: hack to workaround a limitation of the rustc API: see comment on
             // CodegenCx.structs_as_pointer
-            value = value.dereference(self.loc).to_rvalue();
+            value = value.dereference(self.location).to_rvalue();
         }
         let expected_return_type = self.current_func().get_return_type();
         if !expected_return_type.is_compatible_with(value.get_type()) {
             // NOTE: due to opaque pointers now being used, we need to cast here.
-            value = self.context.new_cast(self.loc, value, expected_return_type);
+            value = self.context.new_cast(self.location, value, expected_return_type);
         }
-        self.llbb().end_with_return(self.loc, value);
+        self.llbb().end_with_return(self.location, value);
     }
 
     fn br(&mut self, dest: Block<'gcc>) {
-        self.llbb().end_with_jump(self.loc, dest)
+        self.llbb().end_with_jump(self.location, dest)
     }
 
     fn cond_br(&mut self, cond: RValue<'gcc>, then_block: Block<'gcc>, else_block: Block<'gcc>) {
-        self.llbb().end_with_conditional(self.loc, cond, then_block, else_block)
+        self.llbb().end_with_conditional(self.location, cond, then_block, else_block)
     }
 
-    fn switch(&mut self, value: RValue<'gcc>, default_block: Block<'gcc>, cases: impl ExactSizeIterator<Item = (u128, Block<'gcc>)>) {
+    fn switch(
+        &mut self,
+        value: RValue<'gcc>,
+        default_block: Block<'gcc>,
+        cases: impl ExactSizeIterator<Item = (u128, Block<'gcc>)>,
+    ) {
         let mut gcc_cases = vec![];
         let typ = self.val_ty(value);
         for (on_val, dest) in cases {
             let on_val = self.const_uint_big(typ, on_val);
             gcc_cases.push(self.context.new_case(on_val, on_val, dest));
         }
-        self.block.end_with_switch(self.loc, value, default_block, &gcc_cases);
+        self.block.end_with_switch(self.location, value, default_block, &gcc_cases);
     }
 
-    #[cfg(feature="master")]
-    fn invoke(&mut self, typ: Type<'gcc>, fn_attrs: Option<&CodegenFnAttrs>, _fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
+    #[cfg(feature = "master")]
+    fn invoke(
+        &mut self,
+        typ: Type<'gcc>,
+        fn_attrs: Option<&CodegenFnAttrs>,
+        _fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>,
+        func: RValue<'gcc>,
+        args: &[RValue<'gcc>],
+        then: Block<'gcc>,
+        catch: Block<'gcc>,
+        _funclet: Option<&Funclet>,
+    ) -> RValue<'gcc> {
         let try_block = self.current_func().new_block("try");
 
         let current_block = self.block.clone();
@@ -475,30 +600,39 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let call = self.call(typ, fn_attrs, None, func, args, None); // TODO(antoyo): use funclet here?
         self.block = current_block;
 
-        let return_value = self.current_func()
-            .new_local(self.loc, call.get_type(), "invokeResult");
+        let return_value =
+            self.current_func().new_local(self.location, call.get_type(), "invokeResult");
 
-        try_block.add_assignment(self.loc, return_value, call);
+        try_block.add_assignment(self.location, return_value, call);
 
-        try_block.end_with_jump(self.loc, then);
+        try_block.end_with_jump(self.location, then);
 
         if self.cleanup_blocks.borrow().contains(&catch) {
-            self.block.add_try_finally(self.loc, try_block, catch);
-        }
-        else {
-            self.block.add_try_catch(self.loc, try_block, catch);
+            self.block.add_try_finally(self.location, try_block, catch);
+        } else {
+            self.block.add_try_catch(self.location, try_block, catch);
         }
 
-        self.block.end_with_jump(self.loc, then);
+        self.block.end_with_jump(self.location, then);
 
         return_value.to_rvalue()
     }
 
-    #[cfg(not(feature="master"))]
-    fn invoke(&mut self, typ: Type<'gcc>, fn_attrs: Option<&CodegenFnAttrs>, fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>, func: RValue<'gcc>, args: &[RValue<'gcc>], then: Block<'gcc>, catch: Block<'gcc>, _funclet: Option<&Funclet>) -> RValue<'gcc> {
+    #[cfg(not(feature = "master"))]
+    fn invoke(
+        &mut self,
+        typ: Type<'gcc>,
+        fn_attrs: Option<&CodegenFnAttrs>,
+        fn_abi: Option<&FnAbi<'tcx, Ty<'tcx>>>,
+        func: RValue<'gcc>,
+        args: &[RValue<'gcc>],
+        then: Block<'gcc>,
+        catch: Block<'gcc>,
+        _funclet: Option<&Funclet>,
+    ) -> RValue<'gcc> {
         let call_site = self.call(typ, fn_attrs, None, func, args, None);
         let condition = self.context.new_rvalue_from_int(self.bool_type, 1);
-        self.llbb().end_with_conditional(self.loc, condition, then, catch);
+        self.llbb().end_with_conditional(self.location, condition, then, catch);
         if let Some(_fn_abi) = fn_abi {
             // TODO(bjorn3): Apply function attributes
         }
@@ -507,16 +641,15 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn unreachable(&mut self) {
         let func = self.context.get_builtin_function("__builtin_unreachable");
-        self.block.add_eval(self.loc, self.context.new_call(self.loc, func, &[]));
+        self.block.add_eval(self.location, self.context.new_call(self.location, func, &[]));
         let return_type = self.block.get_function().get_return_type();
         let void_type = self.context.new_type::<()>();
         if return_type == void_type {
-            self.block.end_with_void_return(self.loc)
-        }
-        else {
-            let return_value = self.current_func()
-                .new_local(self.loc, return_type, "unreachableReturn");
-            self.block.end_with_return(self.loc, return_value)
+            self.block.end_with_void_return(self.location)
+        } else {
+            let return_value =
+                self.current_func().new_local(self.location, return_type, "unreachableReturn");
+            self.block.end_with_return(self.location, return_value)
         }
     }
 
@@ -541,7 +674,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn fmul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        self.cx.context.new_binary_op(self.loc, BinaryOp::Mult, a.get_type(), a, b)
+        self.cx.context.new_binary_op(self.location, BinaryOp::Mult, a.get_type(), a, b)
     }
 
     fn udiv(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -566,7 +699,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // FIXME(antoyo): rustc_codegen_ssa::mir::intrinsic uses different types for a and b but they
         // should be the same.
         let typ = a.get_type().to_signed(self);
-        let b = self.context.new_cast(self.loc, b, typ);
+        let b = self.context.new_cast(self.location, b, typ);
         a / b
     }
 
@@ -613,7 +746,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         if a_type.is_compatible_with(self.cx.float_type) {
             let fmodf = self.context.get_builtin_function("fmodf");
             // FIXME(antoyo): this seems to produce the wrong result.
-            return self.context.new_call(self.loc, fmodf, &[a, b]);
+            return self.context.new_call(self.location, fmodf, &[a, b]);
         }
         if let Some(vector_type) = a_type_unqualified.dyncast_vector() {
             assert_eq!(a_type_unqualified, b.get_type().unqualified());
@@ -628,12 +761,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
                 })
                 .collect();
 
-            return self.context.new_rvalue_from_vector(self.loc, a_type, &new_elements)
+            return self.context.new_rvalue_from_vector(self.location, a_type, &new_elements);
         }
         assert_eq!(a_type_unqualified, self.cx.double_type);
 
         let fmod = self.context.get_builtin_function("fmod");
-        self.context.new_call(self.loc, fmod, &[a, b])
+        self.context.new_call(self.location, fmod, &[a, b])
     }
 
     fn shl(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -655,94 +788,107 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn or(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        self.cx.gcc_or(a, b, self.loc)
+        self.cx.gcc_or(a, b, self.location)
     }
 
     fn xor(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.gcc_xor(a, b))
+        set_rvalue_location(self, self.gcc_xor(a, b))
     }
 
     fn neg(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.gcc_neg(a))
+        set_rvalue_location(self, self.gcc_neg(a))
     }
 
     fn fneg(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.cx.context.new_unary_op(self.loc, UnaryOp::Minus, a.get_type(), a))
+        set_rvalue_location(
+            self,
+            self.cx.context.new_unary_op(self.location, UnaryOp::Minus, a.get_type(), a),
+        )
     }
 
     fn not(&mut self, a: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.gcc_not(a))
+        set_rvalue_location(self, self.gcc_not(a))
     }
 
     fn unchecked_sadd(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.gcc_add(a, b))
+        set_rvalue_location(self, self.gcc_add(a, b))
     }
 
     fn unchecked_uadd(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.gcc_add(a, b))
+        set_rvalue_location(self, self.gcc_add(a, b))
     }
 
     fn unchecked_ssub(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.gcc_sub(a, b))
+        set_rvalue_location(self, self.gcc_sub(a, b))
     }
 
     fn unchecked_usub(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): should generate poison value?
-        set_rval_location(self, self.gcc_sub(a, b))
+        set_rvalue_location(self, self.gcc_sub(a, b))
     }
 
     fn unchecked_smul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.gcc_mul(a, b))
+        set_rvalue_location(self, self.gcc_mul(a, b))
     }
 
     fn unchecked_umul(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.gcc_mul(a, b))
+        set_rvalue_location(self, self.gcc_mul(a, b))
     }
 
     fn fadd_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        set_rval_location(self, lhs + rhs)
+        set_rvalue_location(self, lhs + rhs)
     }
 
     fn fsub_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        set_rval_location(self, lhs - rhs)
+        set_rvalue_location(self, lhs - rhs)
     }
 
     fn fmul_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        set_rval_location(self, lhs * rhs)
+        set_rvalue_location(self, lhs * rhs)
     }
 
     fn fdiv_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
-        set_rval_location(self, lhs / rhs)
+        set_rvalue_location(self, lhs / rhs)
     }
 
     fn frem_fast(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
         // NOTE: it seems like we cannot enable fast-mode for a single operation in GCC.
         let result = self.frem(lhs, rhs);
-        set_rval_location(self, result);
+        set_rvalue_location(self, result);
         result
     }
 
-    fn checked_binop(&mut self, oop: OverflowOp, typ: Ty<'_>, lhs: Self::Value, rhs: Self::Value) -> (Self::Value, Self::Value) {
+    fn checked_binop(
+        &mut self,
+        oop: OverflowOp,
+        typ: Ty<'_>,
+        lhs: Self::Value,
+        rhs: Self::Value,
+    ) -> (Self::Value, Self::Value) {
         self.gcc_checked_binop(oop, typ, lhs, rhs)
     }
 
     fn alloca(&mut self, ty: Type<'gcc>, align: Align) -> RValue<'gcc> {
         // FIXME(antoyo): this check that we don't call get_aligned() a second time on a type.
         // Ideally, we shouldn't need to do this check.
-        let aligned_type =
-            if ty == self.cx.u128_type || ty == self.cx.i128_type {
-                ty
-            }
-            else {
-                ty.get_aligned(align.bytes())
-            };
+        let aligned_type = if ty == self.cx.u128_type || ty == self.cx.i128_type {
+            ty
+        } else {
+            ty.get_aligned(align.bytes())
+        };
         // TODO(antoyo): It might be better to return a LValue, but fixing the rustc API is non-trivial.
         self.stack_var_count.set(self.stack_var_count.get() + 1);
-        self.current_func().new_local(self.loc, aligned_type, &format!("stack_var_{}", self.stack_var_count.get())).get_address(self.loc)
+        self.current_func()
+            .new_local(
+                self.location,
+                aligned_type,
+                &format!("stack_var_{}", self.stack_var_count.get()),
+            )
+            .get_address(self.location)
     }
 
     fn byte_array_alloca(&mut self, _len: RValue<'gcc>, _align: Align) -> RValue<'gcc> {
@@ -757,48 +903,62 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // dereference after a drop, for instance.
         // FIXME(antoyo): this check that we don't call get_aligned() a second time on a type.
         // Ideally, we shouldn't need to do this check.
-        let aligned_type =
-            if pointee_ty == self.cx.u128_type || pointee_ty == self.cx.i128_type {
-                pointee_ty
-            }
-            else {
-                pointee_ty.get_aligned(align.bytes())
-            };
-        let ptr = self.context.new_cast(self.loc, ptr, aligned_type.make_pointer());
-        let deref = ptr.dereference(self.loc).to_rvalue();
+        let aligned_type = if pointee_ty == self.cx.u128_type || pointee_ty == self.cx.i128_type {
+            pointee_ty
+        } else {
+            pointee_ty.get_aligned(align.bytes())
+        };
+        let ptr = self.context.new_cast(self.location, ptr, aligned_type.make_pointer());
+        let deref = ptr.dereference(self.location).to_rvalue();
         unsafe { RETURN_VALUE_COUNT += 1 };
-        let loaded_value = function.new_local(self.loc, aligned_type, &format!("loadedValue{}", unsafe { RETURN_VALUE_COUNT }));
-        block.add_assignment(self.loc, loaded_value, deref);
+        let loaded_value = function.new_local(
+            self.location,
+            aligned_type,
+            &format!("loadedValue{}", unsafe { RETURN_VALUE_COUNT }),
+        );
+        block.add_assignment(self.location, loaded_value, deref);
         loaded_value.to_rvalue()
     }
 
     fn volatile_load(&mut self, ty: Type<'gcc>, ptr: RValue<'gcc>) -> RValue<'gcc> {
-        let ptr = self.context.new_cast(self.loc, ptr, ty.make_volatile().make_pointer());
-        ptr.dereference(self.loc).to_rvalue()
+        let ptr = self.context.new_cast(self.location, ptr, ty.make_volatile().make_pointer());
+        ptr.dereference(self.location).to_rvalue()
     }
 
-    fn atomic_load(&mut self, _ty: Type<'gcc>, ptr: RValue<'gcc>, order: AtomicOrdering, size: Size) -> RValue<'gcc> {
+    fn atomic_load(
+        &mut self,
+        _ty: Type<'gcc>,
+        ptr: RValue<'gcc>,
+        order: AtomicOrdering,
+        size: Size,
+    ) -> RValue<'gcc> {
         // TODO(antoyo): use ty.
         // TODO(antoyo): handle alignment.
-        let atomic_load = self.context.get_builtin_function(&format!("__atomic_load_{}", size.bytes()));
+        let atomic_load =
+            self.context.get_builtin_function(&format!("__atomic_load_{}", size.bytes()));
         let ordering = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
 
-        let volatile_const_void_ptr_type = self.context.new_type::<()>()
-            .make_const()
-            .make_volatile()
-            .make_pointer();
-        let ptr = self.context.new_cast(self.loc, ptr, volatile_const_void_ptr_type);
-        self.context.new_call(self.loc, atomic_load, &[ptr, ordering])
+        let volatile_const_void_ptr_type =
+            self.context.new_type::<()>().make_const().make_volatile().make_pointer();
+        let ptr = self.context.new_cast(self.location, ptr, volatile_const_void_ptr_type);
+        self.context.new_call(self.location, atomic_load, &[ptr, ordering])
     }
 
-    fn load_operand(&mut self, place: PlaceRef<'tcx, RValue<'gcc>>) -> OperandRef<'tcx, RValue<'gcc>> {
+    fn load_operand(
+        &mut self,
+        place: PlaceRef<'tcx, RValue<'gcc>>,
+    ) -> OperandRef<'tcx, RValue<'gcc>> {
         assert_eq!(place.llextra.is_some(), place.layout.is_unsized());
 
         if place.layout.is_zst() {
             return OperandRef::zero_sized(place.layout);
         }
 
-        fn scalar_load_metadata<'a, 'gcc, 'tcx>(bx: &mut Builder<'a, 'gcc, 'tcx>, load: RValue<'gcc>, scalar: &abi::Scalar) {
+        fn scalar_load_metadata<'a, 'gcc, 'tcx>(
+            bx: &mut Builder<'a, 'gcc, 'tcx>,
+            load: RValue<'gcc>,
+            scalar: &abi::Scalar,
+        ) {
             let vr = scalar.valid_range(bx);
             match scalar.primitive() {
                 abi::Int(..) => {
@@ -813,46 +973,47 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             }
         }
 
-        let val =
-            if let Some(llextra) = place.llextra {
-                OperandValue::Ref(place.llval, Some(llextra), place.align)
+        let val = if let Some(llextra) = place.llextra {
+            OperandValue::Ref(place.llval, Some(llextra), place.align)
+        } else if place.layout.is_gcc_immediate() {
+            let load = self.load(place.layout.gcc_type(self), place.llval, place.align);
+            if let abi::Abi::Scalar(ref scalar) = place.layout.abi {
+                scalar_load_metadata(self, load, scalar);
             }
-            else if place.layout.is_gcc_immediate() {
-                let load = self.load(
-                    place.layout.gcc_type(self),
-                    place.llval,
-                    place.align,
-                );
-                if let abi::Abi::Scalar(ref scalar) = place.layout.abi {
-                    scalar_load_metadata(self, load, scalar);
+            OperandValue::Immediate(self.to_immediate(load, place.layout))
+        } else if let abi::Abi::ScalarPair(ref a, ref b) = place.layout.abi {
+            let b_offset = a.size(self).align_to(b.align(self).abi);
+            let pair_type = place.layout.gcc_type(self);
+
+            let mut load = |i, scalar: &abi::Scalar, align| {
+                let llptr = self.struct_gep(pair_type, place.llval, i as u64);
+                let llty = place.layout.scalar_pair_element_gcc_type(self, i);
+                let load = self.load(llty, llptr, align);
+                scalar_load_metadata(self, load, scalar);
+                if scalar.is_bool() {
+                    self.trunc(load, self.type_i1())
+                } else {
+                    load
                 }
-                OperandValue::Immediate(self.to_immediate(load, place.layout))
-            }
-            else if let abi::Abi::ScalarPair(ref a, ref b) = place.layout.abi {
-                let b_offset = a.size(self).align_to(b.align(self).abi);
-                let pair_type = place.layout.gcc_type(self);
-
-                let mut load = |i, scalar: &abi::Scalar, align| {
-                    let llptr = self.struct_gep(pair_type, place.llval, i as u64);
-                    let llty = place.layout.scalar_pair_element_gcc_type(self, i);
-                    let load = self.load(llty, llptr, align);
-                    scalar_load_metadata(self, load, scalar);
-                    if scalar.is_bool() { self.trunc(load, self.type_i1()) } else { load }
-                };
-
-                OperandValue::Pair(
-                    load(0, a, place.align),
-                    load(1, b, place.align.restrict_for_offset(b_offset)),
-                )
-            }
-            else {
-                OperandValue::Ref(place.llval, None, place.align)
             };
 
+            OperandValue::Pair(
+                load(0, a, place.align),
+                load(1, b, place.align.restrict_for_offset(b_offset)),
+            )
+        } else {
+            OperandValue::Ref(place.llval, None, place.align)
+        };
+
         OperandRef { val, layout: place.layout }
     }
 
-    fn write_operand_repeatedly(&mut self, cg_elem: OperandRef<'tcx, RValue<'gcc>>, count: u64, dest: PlaceRef<'tcx, RValue<'gcc>>) {
+    fn write_operand_repeatedly(
+        &mut self,
+        cg_elem: OperandRef<'tcx, RValue<'gcc>>,
+        count: u64,
+        dest: PlaceRef<'tcx, RValue<'gcc>>,
+    ) {
         let zero = self.const_usize(0);
         let count = self.const_usize(count);
         let start = dest.project_index(self, zero).llval;
@@ -863,7 +1024,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let next_bb = self.append_sibling_block("repeat_loop_next");
 
         let ptr_type = start.get_type();
-        let current = self.llbb().get_function().new_local(self.loc, ptr_type, "loop_var");
+        let current = self.llbb().get_function().new_local(self.location, ptr_type, "loop_var");
         let current_val = current.to_rvalue();
         self.assign(current, start);
 
@@ -877,8 +1038,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let align = dest.align.restrict_for_offset(dest.layout.field(self.cx(), 0).size);
         cg_elem.val.store(self, PlaceRef::new_sized_aligned(current_val, cg_elem.layout, align));
 
-        let next = self.inbounds_gep(self.backend_type(cg_elem.layout), current.to_rvalue(), &[self.const_usize(1)]);
-        self.llbb().add_assignment(self.loc, current, next);
+        let next = self.inbounds_gep(
+            self.backend_type(cg_elem.layout),
+            current.to_rvalue(),
+            &[self.const_usize(1)],
+        );
+        self.llbb().add_assignment(self.location, current, next);
         self.br(header_bb);
 
         self.switch_to_block(next_bb);
@@ -896,100 +1061,127 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.store_with_flags(val, ptr, align, MemFlags::empty())
     }
 
-    fn store_with_flags(&mut self, val: RValue<'gcc>, ptr: RValue<'gcc>, align: Align, _flags: MemFlags) -> RValue<'gcc> {
+    fn store_with_flags(
+        &mut self,
+        val: RValue<'gcc>,
+        ptr: RValue<'gcc>,
+        align: Align,
+        _flags: MemFlags,
+    ) -> RValue<'gcc> {
         let ptr = self.check_store(val, ptr);
-        let destination = ptr.dereference(self.loc);
+        let destination = ptr.dereference(self.location);
         // NOTE: libgccjit does not support specifying the alignment on the assignment, so we cast
         // to type so it gets the proper alignment.
         let destination_type = destination.to_rvalue().get_type().unqualified();
         let aligned_type = destination_type.get_aligned(align.bytes()).make_pointer();
-        let aligned_destination = self.cx.context.new_bitcast(self.loc, ptr, aligned_type);
-        let aligned_destination = aligned_destination.dereference(self.loc);
-        self.llbb().add_assignment(self.loc, aligned_destination, val);
+        let aligned_destination = self.cx.context.new_bitcast(self.location, ptr, aligned_type);
+        let aligned_destination = aligned_destination.dereference(self.location);
+        self.llbb().add_assignment(self.location, aligned_destination, val);
         // TODO(antoyo): handle align and flags.
         // NOTE: dummy value here since it's never used. FIXME(antoyo): API should not return a value here?
         self.cx.context.new_rvalue_zero(self.type_i32())
     }
 
-    fn atomic_store(&mut self, value: RValue<'gcc>, ptr: RValue<'gcc>, order: AtomicOrdering, size: Size) {
+    fn atomic_store(
+        &mut self,
+        value: RValue<'gcc>,
+        ptr: RValue<'gcc>,
+        order: AtomicOrdering,
+        size: Size,
+    ) {
         // TODO(antoyo): handle alignment.
-        let atomic_store = self.context.get_builtin_function(&format!("__atomic_store_{}", size.bytes()));
+        let atomic_store =
+            self.context.get_builtin_function(&format!("__atomic_store_{}", size.bytes()));
         let ordering = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
-        let volatile_const_void_ptr_type = self.context.new_type::<()>()
-            .make_volatile()
-            .make_pointer();
-        let ptr = self.context.new_cast(self.loc, ptr, volatile_const_void_ptr_type);
+        let volatile_const_void_ptr_type =
+            self.context.new_type::<()>().make_volatile().make_pointer();
+        let ptr = self.context.new_cast(self.location, ptr, volatile_const_void_ptr_type);
 
         // FIXME(antoyo): fix libgccjit to allow comparing an integer type with an aligned integer type because
         // the following cast is required to avoid this error:
         // gcc_jit_context_new_call: mismatching types for argument 2 of function "__atomic_store_4": assignment to param arg1 (type: int) from loadedValue3577 (type: unsigned int  __attribute__((aligned(4))))
         let int_type = atomic_store.get_param(1).to_rvalue().get_type();
-        let value = self.context.new_cast(self.loc, value, int_type);
-        self.llbb()
-            .add_eval(self.loc, self.context.new_call(self.loc, atomic_store, &[ptr, value, ordering]));
+        let value = self.context.new_cast(self.location, value, int_type);
+        self.llbb().add_eval(
+            self.location,
+            self.context.new_call(self.location, atomic_store, &[ptr, value, ordering]),
+        );
     }
 
-    fn gep(&mut self, typ: Type<'gcc>, ptr: RValue<'gcc>, indices: &[RValue<'gcc>]) -> RValue<'gcc> {
+    fn gep(
+        &mut self,
+        typ: Type<'gcc>,
+        ptr: RValue<'gcc>,
+        indices: &[RValue<'gcc>],
+    ) -> RValue<'gcc> {
         // NOTE: due to opaque pointers now being used, we need to cast here.
-        let ptr = self.context.new_cast(self.loc, ptr, typ.make_pointer());
+        let ptr = self.context.new_cast(self.location, ptr, typ.make_pointer());
         let ptr_type = ptr.get_type();
         let mut pointee_type = ptr.get_type();
         // NOTE: we cannot use array indexing here like in inbounds_gep because array indexing is
         // always considered in bounds in GCC (TODO(antoyo): to be verified).
         // So, we have to cast to a number.
-        let mut result = self.context.new_bitcast(self.loc, ptr, self.sizet_type);
+        let mut result = self.context.new_bitcast(self.location, ptr, self.sizet_type);
         // FIXME(antoyo): if there were more than 1 index, this code is probably wrong and would
         // require dereferencing the pointer.
         for index in indices {
             pointee_type = pointee_type.get_pointee().expect("pointee type");
-            #[cfg(feature="master")]
+            #[cfg(feature = "master")]
             let pointee_size = {
                 let size = self.cx.context.new_sizeof(pointee_type);
-                self.context.new_cast(self.loc, size, index.get_type())
+                self.context.new_cast(self.location, size, index.get_type())
             };
-            #[cfg(not(feature="master"))]
-            let pointee_size = self.context.new_rvalue_from_int(index.get_type(), pointee_type.get_size() as i32);
+            #[cfg(not(feature = "master"))]
+            let pointee_size =
+                self.context.new_rvalue_from_int(index.get_type(), pointee_type.get_size() as i32);
             result = result + self.gcc_int_cast(*index * pointee_size, self.sizet_type);
         }
-        self.context.new_bitcast(self.loc, result, ptr_type)
+        self.context.new_bitcast(self.location, result, ptr_type)
     }
 
-    fn inbounds_gep(&mut self, typ: Type<'gcc>, ptr: RValue<'gcc>, indices: &[RValue<'gcc>]) -> RValue<'gcc> {
+    fn inbounds_gep(
+        &mut self,
+        typ: Type<'gcc>,
+        ptr: RValue<'gcc>,
+        indices: &[RValue<'gcc>],
+    ) -> RValue<'gcc> {
         // NOTE: due to opaque pointers now being used, we need to cast here.
-        let ptr = self.context.new_cast(self.loc, ptr, typ.make_pointer());
+        let ptr = self.context.new_cast(self.location, ptr, typ.make_pointer());
         // NOTE: array indexing is always considered in bounds in GCC (TODO(antoyo): to be verified).
         let mut indices = indices.into_iter();
         let index = indices.next().expect("first index in inbounds_gep");
-        let mut result = self.context.new_array_access(self.loc, ptr, *index);
+        let mut result = self.context.new_array_access(self.location, ptr, *index);
         for index in indices {
-            result = self.context.new_array_access(self.loc, result, *index);
+            result = self.context.new_array_access(self.location, result, *index);
         }
-        result.get_address(self.loc)
+        result.get_address(self.location)
     }
 
     fn struct_gep(&mut self, value_type: Type<'gcc>, ptr: RValue<'gcc>, idx: u64) -> RValue<'gcc> {
         // FIXME(antoyo): it would be better if the API only called this on struct, not on arrays.
         assert_eq!(idx as usize as u64, idx);
-        let value = ptr.dereference(self.loc).to_rvalue();
+        let value = ptr.dereference(self.location).to_rvalue();
 
         if value_type.dyncast_array().is_some() {
-            let index = self.context.new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
-            let element = self.context.new_array_access(self.loc, value, index);
-            element.get_address(self.loc)
-        }
-        else if let Some(vector_type) = value_type.dyncast_vector() {
+            let index = self
+                .context
+                .new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
+            let element = self.context.new_array_access(self.location, value, index);
+            element.get_address(self.location)
+        } else if let Some(vector_type) = value_type.dyncast_vector() {
             let array_type = vector_type.get_element_type().make_pointer();
             let array = self.bitcast(ptr, array_type);
-            let index = self.context.new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
-            let element = self.context.new_array_access(self.loc, array, index);
-            element.get_address(self.loc)
-        }
-        else if let Some(struct_type) = value_type.is_struct() {
+            let index = self
+                .context
+                .new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
+            let element = self.context.new_array_access(self.location, array, index);
+            element.get_address(self.location)
+        } else if let Some(struct_type) = value_type.is_struct() {
             // NOTE: due to opaque pointers now being used, we need to bitcast here.
             let ptr = self.bitcast_if_needed(ptr, value_type.make_pointer());
-            ptr.dereference_field(self.loc, struct_type.get_field(idx as i32)).get_address(self.loc)
-        }
-        else {
+            ptr.dereference_field(self.location, struct_type.get_field(idx as i32))
+                .get_address(self.location)
+        } else {
             panic!("Unexpected type {:?}", value_type);
         }
     }
@@ -1006,32 +1198,32 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             // TODO(antoyo): nothing to do as it is only for LLVM?
             return value;
         }
-        self.context.new_cast(self.loc, value, dest_ty)
+        self.context.new_cast(self.location, value, dest_ty)
     }
 
     fn fptoui(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.gcc_float_to_uint_cast(value, dest_ty))
+        set_rvalue_location(self, self.gcc_float_to_uint_cast(value, dest_ty))
     }
 
     fn fptosi(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.gcc_float_to_int_cast(value, dest_ty))
+        set_rvalue_location(self, self.gcc_float_to_int_cast(value, dest_ty))
     }
 
     fn uitofp(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.gcc_uint_to_float_cast(value, dest_ty))
+        set_rvalue_location(self, self.gcc_uint_to_float_cast(value, dest_ty))
     }
 
     fn sitofp(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.gcc_int_to_float_cast(value, dest_ty))
+        set_rvalue_location(self, self.gcc_int_to_float_cast(value, dest_ty))
     }
 
     fn fptrunc(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): make sure it truncates.
-        set_rval_location(self, self.context.new_cast(self.loc, value, dest_ty))
+        set_rvalue_location(self, self.context.new_cast(self.location, value, dest_ty))
     }
 
     fn fpext(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        set_rval_location(self, self.context.new_cast(self.loc, value, dest_ty))
+        set_rvalue_location(self, self.context.new_cast(self.location, value, dest_ty))
     }
 
     fn ptrtoint(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
@@ -1048,7 +1240,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.cx.const_bitcast(value, dest_ty)
     }
 
-    fn intcast(&mut self, value: RValue<'gcc>, dest_typ: Type<'gcc>, _is_signed: bool) -> RValue<'gcc> {
+    fn intcast(
+        &mut self,
+        value: RValue<'gcc>,
+        dest_typ: Type<'gcc>,
+        _is_signed: bool,
+    ) -> RValue<'gcc> {
         // NOTE: is_signed is for value, not dest_typ.
         self.gcc_int_cast(value, dest_typ)
     }
@@ -1059,13 +1256,17 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             (false, true) => {
                 // NOTE: Projecting a field of a pointer type will attempt a cast from a signed char to
                 // a pointer, which is not supported by gccjit.
-                self.cx.context.new_cast(self.loc, self.inttoptr(value, val_type.make_pointer()), dest_ty)
-            },
+                self.cx.context.new_cast(
+                    self.location,
+                    self.inttoptr(value, val_type.make_pointer()),
+                    dest_ty,
+                )
+            }
             (false, false) => {
                 // When they are not pointers, we want a transmute (or reinterpret_cast).
                 self.bitcast(value, dest_ty)
-            },
-            (true, true) => self.cx.context.new_cast(self.loc, value, dest_ty),
+            }
+            (true, true) => self.cx.context.new_cast(self.location, value, dest_ty),
             (true, false) => unimplemented!(),
         }
     }
@@ -1076,11 +1277,19 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn fcmp(&mut self, op: RealPredicate, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
-        self.context.new_comparison(self.loc, op.to_gcc_comparison(), lhs, rhs)
+        self.context.new_comparison(self.location, op.to_gcc_comparison(), lhs, rhs)
     }
 
     /* Miscellaneous instructions */
-    fn memcpy(&mut self, dst: RValue<'gcc>, _dst_align: Align, src: RValue<'gcc>, _src_align: Align, size: RValue<'gcc>, flags: MemFlags) {
+    fn memcpy(
+        &mut self,
+        dst: RValue<'gcc>,
+        _dst_align: Align,
+        src: RValue<'gcc>,
+        _src_align: Align,
+        size: RValue<'gcc>,
+        flags: MemFlags,
+    ) {
         assert!(!flags.contains(MemFlags::NONTEMPORAL), "non-temporal memcpy not supported");
         let size = self.intcast(size, self.type_size_t(), false);
         let _is_volatile = flags.contains(MemFlags::VOLATILE);
@@ -1088,10 +1297,21 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let src = self.pointercast(src, self.type_ptr_to(self.type_void()));
         let memcpy = self.context.get_builtin_function("memcpy");
         // TODO(antoyo): handle aligns and is_volatile.
-        self.block.add_eval(self.loc, self.context.new_call(self.loc, memcpy, &[dst, src, size]));
+        self.block.add_eval(
+            self.location,
+            self.context.new_call(self.location, memcpy, &[dst, src, size]),
+        );
     }
 
-    fn memmove(&mut self, dst: RValue<'gcc>, dst_align: Align, src: RValue<'gcc>, src_align: Align, size: RValue<'gcc>, flags: MemFlags) {
+    fn memmove(
+        &mut self,
+        dst: RValue<'gcc>,
+        dst_align: Align,
+        src: RValue<'gcc>,
+        src_align: Align,
+        size: RValue<'gcc>,
+        flags: MemFlags,
+    ) {
         if flags.contains(MemFlags::NONTEMPORAL) {
             // HACK(nox): This is inefficient but there is no nontemporal memmove.
             let val = self.load(src.get_type().get_pointee().expect("get_pointee"), src, src_align);
@@ -1106,35 +1326,53 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         let memmove = self.context.get_builtin_function("memmove");
         // TODO(antoyo): handle is_volatile.
-        self.block.add_eval(self.loc, self.context.new_call(self.loc, memmove, &[dst, src, size]));
+        self.block.add_eval(
+            self.location,
+            self.context.new_call(self.location, memmove, &[dst, src, size]),
+        );
     }
 
-    fn memset(&mut self, ptr: RValue<'gcc>, fill_byte: RValue<'gcc>, size: RValue<'gcc>, _align: Align, flags: MemFlags) {
+    fn memset(
+        &mut self,
+        ptr: RValue<'gcc>,
+        fill_byte: RValue<'gcc>,
+        size: RValue<'gcc>,
+        _align: Align,
+        flags: MemFlags,
+    ) {
         let _is_volatile = flags.contains(MemFlags::VOLATILE);
         let ptr = self.pointercast(ptr, self.type_i8p());
         let memset = self.context.get_builtin_function("memset");
         // TODO(antoyo): handle align and is_volatile.
-        let fill_byte = self.context.new_cast(self.loc, fill_byte, self.i32_type);
+        let fill_byte = self.context.new_cast(self.location, fill_byte, self.i32_type);
         let size = self.intcast(size, self.type_size_t(), false);
-        self.block.add_eval(self.loc, self.context.new_call(self.loc, memset, &[ptr, fill_byte, size]));
+        self.block.add_eval(
+            self.location,
+            self.context.new_call(self.location, memset, &[ptr, fill_byte, size]),
+        );
     }
 
-    fn select(&mut self, cond: RValue<'gcc>, then_val: RValue<'gcc>, mut else_val: RValue<'gcc>) -> RValue<'gcc> {
+    fn select(
+        &mut self,
+        cond: RValue<'gcc>,
+        then_val: RValue<'gcc>,
+        mut else_val: RValue<'gcc>,
+    ) -> RValue<'gcc> {
         let func = self.current_func();
-        let variable = func.new_local(self.loc, then_val.get_type(), "selectVar");
+        let variable = func.new_local(self.location, then_val.get_type(), "selectVar");
         let then_block = func.new_block("then");
         let else_block = func.new_block("else");
         let after_block = func.new_block("after");
-        self.llbb().end_with_conditional(self.loc, cond, then_block, else_block);
+        self.llbb().end_with_conditional(self.location, cond, then_block, else_block);
 
-        then_block.add_assignment(self.loc, variable, then_val);
-        then_block.end_with_jump(self.loc, after_block);
+        then_block.add_assignment(self.location, variable, then_val);
+        then_block.end_with_jump(self.location, after_block);
 
         if !then_val.get_type().is_compatible_with(else_val.get_type()) {
-            else_val = self.context.new_cast(self.loc, else_val, then_val.get_type());
+            else_val = self.context.new_cast(self.location, else_val, then_val.get_type());
         }
-        else_block.add_assignment(self.loc, variable, else_val);
-        else_block.end_with_jump(self.loc, after_block);
+        else_block.add_assignment(self.location, variable, else_val);
+        else_block.end_with_jump(self.location, after_block);
 
         // NOTE: since jumps were added in a place rustc does not expect, the current block in the
         // state need to be updated.
@@ -1148,19 +1386,24 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         unimplemented!();
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     fn extract_element(&mut self, vec: RValue<'gcc>, idx: RValue<'gcc>) -> RValue<'gcc> {
-        self.context.new_vector_access(self.loc, vec, idx).to_rvalue()
+        self.context.new_vector_access(self.location, vec, idx).to_rvalue()
     }
 
-    #[cfg(not(feature="master"))]
+    #[cfg(not(feature = "master"))]
     fn extract_element(&mut self, vec: RValue<'gcc>, idx: RValue<'gcc>) -> RValue<'gcc> {
-        let vector_type = vec.get_type().unqualified().dyncast_vector().expect("Called extract_element on a non-vector type");
+        let vector_type = vec
+            .get_type()
+            .unqualified()
+            .dyncast_vector()
+            .expect("Called extract_element on a non-vector type");
         let element_type = vector_type.get_element_type();
         let vec_num_units = vector_type.get_num_units();
-        let array_type = self.context.new_array_type(self.loc, element_type, vec_num_units as u64);
-        let array = self.context.new_bitcast(self.loc, vec, array_type).to_rvalue();
-        self.context.new_array_access(self.loc, array, idx).to_rvalue()
+        let array_type =
+            self.context.new_array_type(self.location, element_type, vec_num_units as u64);
+        let array = self.context.new_bitcast(self.location, vec, array_type).to_rvalue();
+        self.context.new_array_access(self.location, array, idx).to_rvalue()
     }
 
     fn vector_splat(&mut self, _num_elts: usize, _elt: RValue<'gcc>) -> RValue<'gcc> {
@@ -1173,82 +1416,85 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let value_type = aggregate_value.get_type();
 
         if value_type.dyncast_array().is_some() {
-            let index = self.context.new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
-            let element = self.context.new_array_access(self.loc, aggregate_value, index);
-            element.get_address(self.loc)
-        }
-        else if value_type.dyncast_vector().is_some() {
+            let index = self
+                .context
+                .new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
+            let element = self.context.new_array_access(self.location, aggregate_value, index);
+            element.get_address(self.location)
+        } else if value_type.dyncast_vector().is_some() {
             panic!();
-        }
-        else if let Some(pointer_type) = value_type.get_pointee() {
+        } else if let Some(pointer_type) = value_type.get_pointee() {
             if let Some(struct_type) = pointer_type.is_struct() {
                 // NOTE: hack to workaround a limitation of the rustc API: see comment on
                 // CodegenCx.structs_as_pointer
-                aggregate_value.dereference_field(self.loc, struct_type.get_field(idx as i32)).to_rvalue()
-            }
-            else {
+                aggregate_value
+                    .dereference_field(self.location, struct_type.get_field(idx as i32))
+                    .to_rvalue()
+            } else {
                 panic!("Unexpected type {:?}", value_type);
             }
-        }
-        else if let Some(struct_type) = value_type.is_struct() {
-            aggregate_value.access_field(self.loc, struct_type.get_field(idx as i32)).to_rvalue()
-        }
-        else {
+        } else if let Some(struct_type) = value_type.is_struct() {
+            aggregate_value
+                .access_field(self.location, struct_type.get_field(idx as i32))
+                .to_rvalue()
+        } else {
             panic!("Unexpected type {:?}", value_type);
         }
     }
 
-    fn insert_value(&mut self, aggregate_value: RValue<'gcc>, value: RValue<'gcc>, idx: u64) -> RValue<'gcc> {
+    fn insert_value(
+        &mut self,
+        aggregate_value: RValue<'gcc>,
+        value: RValue<'gcc>,
+        idx: u64,
+    ) -> RValue<'gcc> {
         // FIXME(antoyo): it would be better if the API only called this on struct, not on arrays.
         assert_eq!(idx as usize as u64, idx);
         let value_type = aggregate_value.get_type();
 
-        let lvalue =
-            if value_type.dyncast_array().is_some() {
-                let index = self.context.new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
-                self.context.new_array_access(self.loc, aggregate_value, index)
-            }
-            else if value_type.dyncast_vector().is_some() {
-                panic!();
-            }
-            else if let Some(pointer_type) = value_type.get_pointee() {
-                if let Some(struct_type) = pointer_type.is_struct() {
-                    // NOTE: hack to workaround a limitation of the rustc API: see comment on
-                    // CodegenCx.structs_as_pointer
-                    aggregate_value.dereference_field(self.loc, struct_type.get_field(idx as i32))
-                }
-                else {
-                    panic!("Unexpected type {:?}", value_type);
-                }
-            }
-            else {
+        let lvalue = if value_type.dyncast_array().is_some() {
+            let index = self
+                .context
+                .new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
+            self.context.new_array_access(self.location, aggregate_value, index)
+        } else if value_type.dyncast_vector().is_some() {
+            panic!();
+        } else if let Some(pointer_type) = value_type.get_pointee() {
+            if let Some(struct_type) = pointer_type.is_struct() {
+                // NOTE: hack to workaround a limitation of the rustc API: see comment on
+                // CodegenCx.structs_as_pointer
+                aggregate_value.dereference_field(self.location, struct_type.get_field(idx as i32))
+            } else {
                 panic!("Unexpected type {:?}", value_type);
-            };
+            }
+        } else {
+            panic!("Unexpected type {:?}", value_type);
+        };
 
         let lvalue_type = lvalue.to_rvalue().get_type();
         let value =
             // NOTE: sometimes, rustc will create a value with the wrong type.
             if lvalue_type != value.get_type() {
-                self.context.new_cast(self.loc, value, lvalue_type)
+                self.context.new_cast(self.location, value, lvalue_type)
             }
             else {
                 value
             };
 
-        self.llbb().add_assignment(self.loc, lvalue, value);
+        self.llbb().add_assignment(self.location, lvalue, value);
 
         aggregate_value
     }
 
     fn set_personality_fn(&mut self, _personality: RValue<'gcc>) {
-        #[cfg(feature="master")]
+        #[cfg(feature = "master")]
         {
             let personality = self.rvalue_as_function(_personality);
             self.current_func().set_personality_function(personality);
         }
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     fn cleanup_landing_pad(&mut self, pers_fn: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
         self.set_personality_fn(pers_fn);
 
@@ -1256,23 +1502,27 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // generate a try/finally instead of a try/catch for this block.
         self.cleanup_blocks.borrow_mut().insert(self.block);
 
-        let eh_pointer_builtin = self.cx.context.get_target_builtin_function("__builtin_eh_pointer");
+        let eh_pointer_builtin =
+            self.cx.context.get_target_builtin_function("__builtin_eh_pointer");
         let zero = self.cx.context.new_rvalue_zero(self.int_type);
-        let ptr = self.cx.context.new_call(self.loc, eh_pointer_builtin, &[zero]);
+        let ptr = self.cx.context.new_call(self.location, eh_pointer_builtin, &[zero]);
 
         let value1_type = self.u8_type.make_pointer();
-        let ptr = self.cx.context.new_cast(self.loc, ptr, value1_type);
+        let ptr = self.cx.context.new_cast(self.location, ptr, value1_type);
         let value1 = ptr;
         let value2 = zero; // TODO(antoyo): set the proper value here (the type of exception?).
 
         (value1, value2)
     }
 
-    #[cfg(not(feature="master"))]
+    #[cfg(not(feature = "master"))]
     fn cleanup_landing_pad(&mut self, _pers_fn: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
-        let value1 = self.current_func().new_local(self.loc, self.u8_type.make_pointer(), "landing_pad0")
-                .to_rvalue();
-        let value2 = self.current_func().new_local(self.loc, self.i32_type, "landing_pad1").to_rvalue();
+        let value1 = self
+            .current_func()
+            .new_local(self.location, self.u8_type.make_pointer(), "landing_pad0")
+            .to_rvalue();
+        let value2 =
+            self.current_func().new_local(self.location, self.i32_type, "landing_pad1").to_rvalue();
         (value1, value2)
     }
 
@@ -1281,16 +1531,17 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.cleanup_landing_pad(pers_fn)
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     fn resume(&mut self, exn0: RValue<'gcc>, _exn1: RValue<'gcc>) {
         let exn_type = exn0.get_type();
-        let exn = self.context.new_cast(self.loc, exn0, exn_type);
+        let exn = self.context.new_cast(self.location, exn0, exn_type);
         let unwind_resume = self.context.get_target_builtin_function("__builtin_unwind_resume");
-        self.llbb().add_eval(self.loc, self.context.new_call(self.loc, unwind_resume, &[exn]));
+        self.llbb()
+            .add_eval(self.location, self.context.new_call(self.location, unwind_resume, &[exn]));
         self.unreachable();
     }
 
-    #[cfg(not(feature="master"))]
+    #[cfg(not(feature = "master"))]
     fn resume(&mut self, _exn0: RValue<'gcc>, _exn1: RValue<'gcc>) {
         self.unreachable();
     }
@@ -1317,68 +1568,82 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     // Atomic Operations
-    fn atomic_cmpxchg(&mut self, dst: RValue<'gcc>, cmp: RValue<'gcc>, src: RValue<'gcc>, order: AtomicOrdering, failure_order: AtomicOrdering, weak: bool) -> (RValue<'gcc>, RValue<'gcc>) {
+    fn atomic_cmpxchg(
+        &mut self,
+        dst: RValue<'gcc>,
+        cmp: RValue<'gcc>,
+        src: RValue<'gcc>,
+        order: AtomicOrdering,
+        failure_order: AtomicOrdering,
+        weak: bool,
+    ) -> (RValue<'gcc>, RValue<'gcc>) {
         let expected = self.current_func().new_local(None, cmp.get_type(), "expected");
         self.llbb().add_assignment(None, expected, cmp);
         // NOTE: gcc doesn't support a failure memory model that is stronger than the success
         // memory model.
-        let order =
-            if failure_order as i32 > order as i32 {
-                failure_order
-            }
-            else {
-                order
-            };
+        let order = if failure_order as i32 > order as i32 { failure_order } else { order };
         let success = self.compare_exchange(dst, expected, src, order, failure_order, weak);
 
         // NOTE: since success contains the call to the intrinsic, it must be added to the basic block before
         // expected so that we store expected after the call.
-        let success_var = self.current_func().new_local(self.loc, self.bool_type, "success");
-        self.llbb().add_assignment(self.loc, success_var, success);
+        let success_var = self.current_func().new_local(self.location, self.bool_type, "success");
+        self.llbb().add_assignment(self.location, success_var, success);
 
         (expected.to_rvalue(), success_var.to_rvalue())
     }
 
-    fn atomic_rmw(&mut self, op: AtomicRmwBinOp, dst: RValue<'gcc>, src: RValue<'gcc>, order: AtomicOrdering) -> RValue<'gcc> {
+    fn atomic_rmw(
+        &mut self,
+        op: AtomicRmwBinOp,
+        dst: RValue<'gcc>,
+        src: RValue<'gcc>,
+        order: AtomicOrdering,
+    ) -> RValue<'gcc> {
         let size = src.get_type().get_size();
-        let name =
-            match op {
-                AtomicRmwBinOp::AtomicXchg => format!("__atomic_exchange_{}", size),
-                AtomicRmwBinOp::AtomicAdd => format!("__atomic_fetch_add_{}", size),
-                AtomicRmwBinOp::AtomicSub => format!("__atomic_fetch_sub_{}", size),
-                AtomicRmwBinOp::AtomicAnd => format!("__atomic_fetch_and_{}", size),
-                AtomicRmwBinOp::AtomicNand => format!("__atomic_fetch_nand_{}", size),
-                AtomicRmwBinOp::AtomicOr => format!("__atomic_fetch_or_{}", size),
-                AtomicRmwBinOp::AtomicXor => format!("__atomic_fetch_xor_{}", size),
-                AtomicRmwBinOp::AtomicMax => return self.atomic_extremum(ExtremumOperation::Max, dst, src, order),
-                AtomicRmwBinOp::AtomicMin => return self.atomic_extremum(ExtremumOperation::Min, dst, src, order),
-                AtomicRmwBinOp::AtomicUMax => return self.atomic_extremum(ExtremumOperation::Max, dst, src, order),
-                AtomicRmwBinOp::AtomicUMin => return self.atomic_extremum(ExtremumOperation::Min, dst, src, order),
-            };
-
+        let name = match op {
+            AtomicRmwBinOp::AtomicXchg => format!("__atomic_exchange_{}", size),
+            AtomicRmwBinOp::AtomicAdd => format!("__atomic_fetch_add_{}", size),
+            AtomicRmwBinOp::AtomicSub => format!("__atomic_fetch_sub_{}", size),
+            AtomicRmwBinOp::AtomicAnd => format!("__atomic_fetch_and_{}", size),
+            AtomicRmwBinOp::AtomicNand => format!("__atomic_fetch_nand_{}", size),
+            AtomicRmwBinOp::AtomicOr => format!("__atomic_fetch_or_{}", size),
+            AtomicRmwBinOp::AtomicXor => format!("__atomic_fetch_xor_{}", size),
+            AtomicRmwBinOp::AtomicMax => {
+                return self.atomic_extremum(ExtremumOperation::Max, dst, src, order);
+            }
+            AtomicRmwBinOp::AtomicMin => {
+                return self.atomic_extremum(ExtremumOperation::Min, dst, src, order);
+            }
+            AtomicRmwBinOp::AtomicUMax => {
+                return self.atomic_extremum(ExtremumOperation::Max, dst, src, order);
+            }
+            AtomicRmwBinOp::AtomicUMin => {
+                return self.atomic_extremum(ExtremumOperation::Min, dst, src, order);
+            }
+        };
 
         let atomic_function = self.context.get_builtin_function(name);
         let order = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
 
         let void_ptr_type = self.context.new_type::<*mut ()>();
         let volatile_void_ptr_type = void_ptr_type.make_volatile();
-        let dst = self.context.new_cast(self.loc, dst, volatile_void_ptr_type);
+        let dst = self.context.new_cast(self.location, dst, volatile_void_ptr_type);
         // FIXME(antoyo): not sure why, but we have the wrong type here.
         let new_src_type = atomic_function.get_param(1).to_rvalue().get_type();
-        let src = self.context.new_cast(self.loc, src, new_src_type);
-        let res = self.context.new_call(self.loc, atomic_function, &[dst, src, order]);
-        self.context.new_cast(self.loc, res, src.get_type())
+        let src = self.context.new_cast(self.location, src, new_src_type);
+        let res = self.context.new_call(self.location, atomic_function, &[dst, src, order]);
+        self.context.new_cast(self.location, res, src.get_type())
     }
 
     fn atomic_fence(&mut self, order: AtomicOrdering, scope: SynchronizationScope) {
-        let name =
-            match scope {
-                SynchronizationScope::SingleThread => "__atomic_signal_fence",
-                SynchronizationScope::CrossThread => "__atomic_thread_fence",
-            };
+        let name = match scope {
+            SynchronizationScope::SingleThread => "__atomic_signal_fence",
+            SynchronizationScope::CrossThread => "__atomic_thread_fence",
+        };
         let thread_fence = self.context.get_builtin_function(name);
         let order = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
-        self.llbb().add_eval(self.loc, self.context.new_call(self.loc, thread_fence, &[order]));
+        self.llbb()
+            .add_eval(self.location, self.context.new_call(self.location, thread_fence, &[order]));
     }
 
     fn set_invariant_load(&mut self, load: RValue<'gcc>) {
@@ -1408,8 +1673,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let gcc_func = unsafe { std::mem::transmute(func) };
         let call = if self.functions.borrow().values().any(|value| *value == gcc_func) {
             self.function_call(func, args, funclet)
-        }
-        else {
+        } else {
             // If it's a not function that was defined, it's a function pointer.
             self.function_ptr_call(typ, func, args, funclet)
         };
@@ -1442,8 +1706,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn from_immediate(&mut self, val: Self::Value) -> Self::Value {
         if self.cx().val_ty(val) == self.cx().type_i1() {
             self.zext(val, self.cx().type_i8())
-        }
-        else {
+        } else {
             val
         }
     }
@@ -1463,13 +1726,24 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.fptoint_sat(true, val, dest_ty)
     }
 
-    fn instrprof_increment(&mut self, _fn_name: RValue<'gcc>, _hash: RValue<'gcc>, _num_counters: RValue<'gcc>, _index: RValue<'gcc>) {
+    fn instrprof_increment(
+        &mut self,
+        _fn_name: RValue<'gcc>,
+        _hash: RValue<'gcc>,
+        _num_counters: RValue<'gcc>,
+        _index: RValue<'gcc>,
+    ) {
         unimplemented!();
     }
 }
 
 impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
-    fn fptoint_sat(&mut self, signed: bool, val: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
+    fn fptoint_sat(
+        &mut self,
+        signed: bool,
+        val: RValue<'gcc>,
+        dest_ty: Type<'gcc>,
+    ) -> RValue<'gcc> {
         let src_ty = self.cx.val_ty(val);
         let (float_ty, int_ty) = if self.cx.type_kind(src_ty) == TypeKind::Vector {
             assert_eq!(self.cx.vector_length(src_ty), self.cx.vector_length(dest_ty));
@@ -1506,10 +1780,18 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         // This already happens today with u128::MAX = 2^128 - 1 > f32::MAX.
         let int_max = |signed: bool, int_width: u64| -> u128 {
             let shift_amount = 128 - int_width;
-            if signed { i128::MAX as u128 >> shift_amount } else { u128::MAX >> shift_amount }
+            if signed {
+                i128::MAX as u128 >> shift_amount
+            } else {
+                u128::MAX >> shift_amount
+            }
         };
         let int_min = |signed: bool, int_width: u64| -> i128 {
-            if signed { i128::MIN >> (128 - int_width) } else { 0 }
+            if signed {
+                i128::MIN >> (128 - int_width)
+            } else {
+                0
+            }
         };
 
         let compute_clamp_bounds_single = |signed: bool, int_width: u64| -> (u128, u128) {
@@ -1593,7 +1875,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let zero = maybe_splat(self, zero);
 
         // Step 1 ...
-        let fptosui_result = if signed { self.fptosi(val, dest_ty) } else { self.fptoui(val, dest_ty) };
+        let fptosui_result =
+            if signed { self.fptosi(val, dest_ty) } else { self.fptoui(val, dest_ty) };
         let less_or_nan = self.fcmp(RealPredicate::RealULT, val, f_min);
         let greater = self.fcmp(RealPredicate::RealOGT, val, f_max);
 
@@ -1629,8 +1912,13 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         }
     }
 
-    #[cfg(feature="master")]
-    pub fn shuffle_vector(&mut self, v1: RValue<'gcc>, v2: RValue<'gcc>, mask: RValue<'gcc>) -> RValue<'gcc> {
+    #[cfg(feature = "master")]
+    pub fn shuffle_vector(
+        &mut self,
+        v1: RValue<'gcc>,
+        v2: RValue<'gcc>,
+        mask: RValue<'gcc>,
+    ) -> RValue<'gcc> {
         let struct_type = mask.get_type().is_struct().expect("mask should be of struct type");
 
         // TODO(antoyo): use a recursive unqualified() here.
@@ -1640,21 +1928,23 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         let mask_num_units = struct_type.get_field_count();
         let mut vector_elements = vec![];
-        let mask_element_type =
-            if element_type.is_integral() {
-                element_type
+        let mask_element_type = if element_type.is_integral() {
+            element_type
+        } else {
+            #[cfg(feature = "master")]
+            {
+                self.cx.type_ix(element_type.get_size() as u64 * 8)
             }
-            else {
-                #[cfg(feature="master")]
-                {
-                    self.cx.type_ix(element_type.get_size() as u64 * 8)
-                }
-                #[cfg(not(feature="master"))]
-                self.int_type
-            };
+            #[cfg(not(feature = "master"))]
+            self.int_type
+        };
         for i in 0..mask_num_units {
             let field = struct_type.get_field(i as i32);
-            vector_elements.push(self.context.new_cast(self.loc, mask.access_field(self.loc, field).to_rvalue(), mask_element_type));
+            vector_elements.push(self.context.new_cast(
+                self.location,
+                mask.access_field(self.location, field).to_rvalue(),
+                mask_element_type,
+            ));
         }
 
         // NOTE: the mask needs to be the same length as the input vectors, so add the missing
@@ -1664,53 +1954,84 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         }
 
         let result_type = self.context.new_vector_type(element_type, mask_num_units as u64);
-        let (v1, v2) =
-            if vec_num_units < mask_num_units {
-                // NOTE: the mask needs to be the same length as the input vectors, so join the 2
-                // vectors and create a dummy second vector.
-                let mut elements = vec![];
-                for i in 0..vec_num_units {
-                    elements.push(self.context.new_vector_access(self.loc, v1, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
-                }
-                for i in 0..(mask_num_units - vec_num_units) {
-                    elements.push(self.context.new_vector_access(self.loc, v2, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
-                }
-                let v1 = self.context.new_rvalue_from_vector(self.loc, result_type, &elements);
-                let zero = self.context.new_rvalue_zero(element_type);
-                let v2 = self.context.new_rvalue_from_vector(self.loc, result_type, &vec![zero; mask_num_units]);
-                (v1, v2)
+        let (v1, v2) = if vec_num_units < mask_num_units {
+            // NOTE: the mask needs to be the same length as the input vectors, so join the 2
+            // vectors and create a dummy second vector.
+            let mut elements = vec![];
+            for i in 0..vec_num_units {
+                elements.push(
+                    self.context
+                        .new_vector_access(
+                            self.location,
+                            v1,
+                            self.context.new_rvalue_from_int(self.int_type, i as i32),
+                        )
+                        .to_rvalue(),
+                );
             }
-            else {
-                (v1, v2)
-            };
+            for i in 0..(mask_num_units - vec_num_units) {
+                elements.push(
+                    self.context
+                        .new_vector_access(
+                            self.location,
+                            v2,
+                            self.context.new_rvalue_from_int(self.int_type, i as i32),
+                        )
+                        .to_rvalue(),
+                );
+            }
+            let v1 = self.context.new_rvalue_from_vector(self.location, result_type, &elements);
+            let zero = self.context.new_rvalue_zero(element_type);
+            let v2 = self.context.new_rvalue_from_vector(
+                self.location,
+                result_type,
+                &vec![zero; mask_num_units],
+            );
+            (v1, v2)
+        } else {
+            (v1, v2)
+        };
 
         let new_mask_num_units = std::cmp::max(mask_num_units, vec_num_units);
         let mask_type = self.context.new_vector_type(mask_element_type, new_mask_num_units as u64);
-        let mask = self.context.new_rvalue_from_vector(self.loc, mask_type, &vector_elements);
-        let result = self.context.new_rvalue_vector_perm(self.loc, v1, v2, mask);
+        let mask = self.context.new_rvalue_from_vector(self.location, mask_type, &vector_elements);
+        let result = self.context.new_rvalue_vector_perm(self.location, v1, v2, mask);
 
         if vec_num_units != mask_num_units {
             // NOTE: if padding was added, only select the number of elements of the masks to
             // remove that padding in the result.
             let mut elements = vec![];
             for i in 0..mask_num_units {
-                elements.push(self.context.new_vector_access(self.loc, result, self.context.new_rvalue_from_int(self.int_type, i as i32)).to_rvalue());
+                elements.push(
+                    self.context
+                        .new_vector_access(
+                            self.location,
+                            result,
+                            self.context.new_rvalue_from_int(self.int_type, i as i32),
+                        )
+                        .to_rvalue(),
+                );
             }
-            self.context.new_rvalue_from_vector(self.loc, result_type, &elements)
-        }
-        else {
+            self.context.new_rvalue_from_vector(self.location, result_type, &elements)
+        } else {
             result
         }
     }
 
-    #[cfg(not(feature="master"))]
-    pub fn shuffle_vector(&mut self, _v1: RValue<'gcc>, _v2: RValue<'gcc>, _mask: RValue<'gcc>) -> RValue<'gcc> {
+    #[cfg(not(feature = "master"))]
+    pub fn shuffle_vector(
+        &mut self,
+        _v1: RValue<'gcc>,
+        _v2: RValue<'gcc>,
+        _mask: RValue<'gcc>,
+    ) -> RValue<'gcc> {
         unimplemented!();
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     pub fn vector_reduce<F>(&mut self, src: RValue<'gcc>, op: F) -> RValue<'gcc>
-    where F: Fn(RValue<'gcc>, RValue<'gcc>, &'gcc Context<'gcc>) -> RValue<'gcc>
+    where
+        F: Fn(RValue<'gcc>, RValue<'gcc>, &'gcc Context<'gcc>) -> RValue<'gcc>,
     {
         let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
         let element_type = vector_type.get_element_type();
@@ -1724,74 +2045,104 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let mut shift = 1;
         let mut res = src;
         while shift < element_count {
-            let vector_elements: Vec<_> =
-                vector_elements.iter()
-                    .map(|i| self.context.new_rvalue_from_int(mask_element_type, ((i + shift) % element_count) as i32))
-                    .collect();
-            let mask = self.context.new_rvalue_from_vector(self.loc, mask_type, &vector_elements);
-            let shifted = self.context.new_rvalue_vector_perm(self.loc, res, res, mask);
+            let vector_elements: Vec<_> = vector_elements
+                .iter()
+                .map(|i| {
+                    self.context.new_rvalue_from_int(
+                        mask_element_type,
+                        ((i + shift) % element_count) as i32,
+                    )
+                })
+                .collect();
+            let mask =
+                self.context.new_rvalue_from_vector(self.location, mask_type, &vector_elements);
+            let shifted = self.context.new_rvalue_vector_perm(self.location, res, res, mask);
             shift *= 2;
             res = op(res, shifted, &self.context);
         }
-        self.context.new_vector_access(self.loc, res, self.context.new_rvalue_zero(self.int_type))
+        self.context
+            .new_vector_access(self.location, res, self.context.new_rvalue_zero(self.int_type))
             .to_rvalue()
     }
 
-    #[cfg(not(feature="master"))]
+    #[cfg(not(feature = "master"))]
     pub fn vector_reduce<F>(&mut self, _src: RValue<'gcc>, _op: F) -> RValue<'gcc>
-    where F: Fn(RValue<'gcc>, RValue<'gcc>, &'gcc Context<'gcc>) -> RValue<'gcc>
+    where
+        F: Fn(RValue<'gcc>, RValue<'gcc>, &'gcc Context<'gcc>) -> RValue<'gcc>,
     {
         unimplemented!();
     }
 
     pub fn vector_reduce_op(&mut self, src: RValue<'gcc>, op: BinaryOp) -> RValue<'gcc> {
-        let loc = self.loc.clone();
+        let loc = self.location.clone();
         self.vector_reduce(src, |a, b, context| context.new_binary_op(loc, op, a.get_type(), a, b))
     }
 
-    pub fn vector_reduce_fadd_fast(&mut self, _acc: RValue<'gcc>, _src: RValue<'gcc>) -> RValue<'gcc> {
+    pub fn vector_reduce_fadd_fast(
+        &mut self,
+        _acc: RValue<'gcc>,
+        _src: RValue<'gcc>,
+    ) -> RValue<'gcc> {
         unimplemented!();
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     pub fn vector_reduce_fadd(&mut self, acc: RValue<'gcc>, src: RValue<'gcc>) -> RValue<'gcc> {
         let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
         let element_count = vector_type.get_num_units();
-        (0..element_count).into_iter()
-            .map(|i| self.context
-                .new_vector_access(self.loc, src, self.context.new_rvalue_from_int(self.int_type, i as _))
-                .to_rvalue())
+        (0..element_count)
+            .into_iter()
+            .map(|i| {
+                self.context
+                    .new_vector_access(
+                        self.location,
+                        src,
+                        self.context.new_rvalue_from_int(self.int_type, i as _),
+                    )
+                    .to_rvalue()
+            })
             .fold(acc, |x, i| x + i)
     }
 
-    #[cfg(not(feature="master"))]
+    #[cfg(not(feature = "master"))]
     pub fn vector_reduce_fadd(&mut self, _acc: RValue<'gcc>, _src: RValue<'gcc>) -> RValue<'gcc> {
         unimplemented!();
     }
 
-    pub fn vector_reduce_fmul_fast(&mut self, _acc: RValue<'gcc>, _src: RValue<'gcc>) -> RValue<'gcc> {
+    pub fn vector_reduce_fmul_fast(
+        &mut self,
+        _acc: RValue<'gcc>,
+        _src: RValue<'gcc>,
+    ) -> RValue<'gcc> {
         unimplemented!();
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     pub fn vector_reduce_fmul(&mut self, acc: RValue<'gcc>, src: RValue<'gcc>) -> RValue<'gcc> {
         let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
         let element_count = vector_type.get_num_units();
-        (0..element_count).into_iter()
-            .map(|i| self.context
-                .new_vector_access(self.loc, src, self.context.new_rvalue_from_int(self.int_type, i as _))
-                .to_rvalue())
+        (0..element_count)
+            .into_iter()
+            .map(|i| {
+                self.context
+                    .new_vector_access(
+                        self.location,
+                        src,
+                        self.context.new_rvalue_from_int(self.int_type, i as _),
+                    )
+                    .to_rvalue()
+            })
             .fold(acc, |x, i| x * i)
     }
 
-    #[cfg(not(feature="master"))]
+    #[cfg(not(feature = "master"))]
     pub fn vector_reduce_fmul(&mut self, _acc: RValue<'gcc>, _src: RValue<'gcc>) -> RValue<'gcc> {
         unimplemented!()
     }
 
     // Inspired by Hacker's Delight min implementation.
     pub fn vector_reduce_min(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
-        let loc = self.loc.clone();
+        let loc = self.location.clone();
         self.vector_reduce(src, |a, b, context| {
             let differences_or_zeros = difference_or_zero(loc, a, b, context);
             context.new_binary_op(loc, BinaryOp::Plus, b.get_type(), b, differences_or_zeros)
@@ -1800,57 +2151,72 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
     // Inspired by Hacker's Delight max implementation.
     pub fn vector_reduce_max(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
-        let loc = self.loc.clone();
+        let loc = self.location.clone();
         self.vector_reduce(src, |a, b, context| {
             let differences_or_zeros = difference_or_zero(loc, a, b, context);
             context.new_binary_op(loc, BinaryOp::Minus, a.get_type(), a, differences_or_zeros)
         })
     }
 
-    fn vector_extremum(&mut self, a: RValue<'gcc>, b: RValue<'gcc>, direction: ExtremumOperation) -> RValue<'gcc> {
+    fn vector_extremum(
+        &mut self,
+        a: RValue<'gcc>,
+        b: RValue<'gcc>,
+        direction: ExtremumOperation,
+    ) -> RValue<'gcc> {
         let vector_type = a.get_type();
 
         // mask out the NaNs in b and replace them with the corresponding lane in a, so when a and
         // b get compared & spliced together, we get the numeric values instead of NaNs.
-        let b_nan_mask = self.context.new_comparison(self.loc, ComparisonOp::NotEquals, b, b);
+        let b_nan_mask = self.context.new_comparison(self.location, ComparisonOp::NotEquals, b, b);
         let mask_type = b_nan_mask.get_type();
-        let b_nan_mask_inverted = self.context.new_unary_op(self.loc, UnaryOp::BitwiseNegate, mask_type, b_nan_mask);
-        let a_cast = self.context.new_bitcast(self.loc, a, mask_type);
-        let b_cast = self.context.new_bitcast(self.loc, b, mask_type);
+        let b_nan_mask_inverted =
+            self.context.new_unary_op(self.location, UnaryOp::BitwiseNegate, mask_type, b_nan_mask);
+        let a_cast = self.context.new_bitcast(self.location, a, mask_type);
+        let b_cast = self.context.new_bitcast(self.location, b, mask_type);
         let res = (b_nan_mask & a_cast) | (b_nan_mask_inverted & b_cast);
-        let b = self.context.new_bitcast(self.loc, res, vector_type);
+        let b = self.context.new_bitcast(self.location, res, vector_type);
 
         // now do the actual comparison
         let comparison_op = match direction {
             ExtremumOperation::Min => ComparisonOp::LessThan,
             ExtremumOperation::Max => ComparisonOp::GreaterThan,
         };
-        let cmp = self.context.new_comparison(self.loc, comparison_op, a, b);
-        let cmp_inverted = self.context.new_unary_op(self.loc, UnaryOp::BitwiseNegate, cmp.get_type(), cmp);
+        let cmp = self.context.new_comparison(self.location, comparison_op, a, b);
+        let cmp_inverted =
+            self.context.new_unary_op(self.location, UnaryOp::BitwiseNegate, cmp.get_type(), cmp);
         let res = (cmp & a_cast) | (cmp_inverted & res);
-        self.context.new_bitcast(self.loc, res, vector_type)
+        self.context.new_bitcast(self.location, res, vector_type)
     }
 
     pub fn vector_fmin(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
         self.vector_extremum(a, b, ExtremumOperation::Min)
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     pub fn vector_reduce_fmin(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
         let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
         let element_count = vector_type.get_num_units();
-        let mut acc = self.context.new_vector_access(self.loc, src, self.context.new_rvalue_zero(self.int_type)).to_rvalue();
+        let mut acc = self
+            .context
+            .new_vector_access(self.location, src, self.context.new_rvalue_zero(self.int_type))
+            .to_rvalue();
         for i in 1..element_count {
-            let elem = self.context
-                .new_vector_access(self.loc, src, self.context.new_rvalue_from_int(self.int_type, i as _))
+            let elem = self
+                .context
+                .new_vector_access(
+                    self.location,
+                    src,
+                    self.context.new_rvalue_from_int(self.int_type, i as _),
+                )
                 .to_rvalue();
-            let cmp = self.context.new_comparison(self.loc, ComparisonOp::LessThan, acc, elem);
+            let cmp = self.context.new_comparison(self.location, ComparisonOp::LessThan, acc, elem);
             acc = self.select(cmp, acc, elem);
         }
         acc
     }
 
-    #[cfg(not(feature="master"))]
+    #[cfg(not(feature = "master"))]
     pub fn vector_reduce_fmin(&mut self, _src: RValue<'gcc>) -> RValue<'gcc> {
         unimplemented!();
     }
@@ -1859,36 +2225,51 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         self.vector_extremum(a, b, ExtremumOperation::Max)
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     pub fn vector_reduce_fmax(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
         let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
         let element_count = vector_type.get_num_units();
-        let mut acc = self.context.new_vector_access(self.loc, src, self.context.new_rvalue_zero(self.int_type)).to_rvalue();
+        let mut acc = self
+            .context
+            .new_vector_access(self.location, src, self.context.new_rvalue_zero(self.int_type))
+            .to_rvalue();
         for i in 1..element_count {
-            let elem = self.context
-                .new_vector_access(self.loc, src, self.context.new_rvalue_from_int(self.int_type, i as _))
+            let elem = self
+                .context
+                .new_vector_access(
+                    self.location,
+                    src,
+                    self.context.new_rvalue_from_int(self.int_type, i as _),
+                )
                 .to_rvalue();
-            let cmp = self.context.new_comparison(self.loc, ComparisonOp::GreaterThan, acc, elem);
+            let cmp =
+                self.context.new_comparison(self.location, ComparisonOp::GreaterThan, acc, elem);
             acc = self.select(cmp, acc, elem);
         }
         acc
     }
 
-    #[cfg(not(feature="master"))]
+    #[cfg(not(feature = "master"))]
     pub fn vector_reduce_fmax(&mut self, _src: RValue<'gcc>) -> RValue<'gcc> {
         unimplemented!();
     }
 
-    pub fn vector_select(&mut self, cond: RValue<'gcc>, then_val: RValue<'gcc>, else_val: RValue<'gcc>) -> RValue<'gcc> {
+    pub fn vector_select(
+        &mut self,
+        cond: RValue<'gcc>,
+        then_val: RValue<'gcc>,
+        else_val: RValue<'gcc>,
+    ) -> RValue<'gcc> {
         // cond is a vector of integers, not of bools.
         let vector_type = cond.get_type().unqualified().dyncast_vector().expect("vector type");
         let num_units = vector_type.get_num_units();
         let element_type = vector_type.get_element_type();
 
-        #[cfg(feature="master")]
+        #[cfg(feature = "master")]
         let (cond, element_type) = {
             // TODO(antoyo): dyncast_vector should not require a call to unqualified.
-            let then_val_vector_type = then_val.get_type().unqualified().dyncast_vector().expect("vector type");
+            let then_val_vector_type =
+                then_val.get_type().unqualified().dyncast_vector().expect("vector type");
             let then_val_element_type = then_val_vector_type.get_element_type();
             let then_val_element_size = then_val_element_type.get_size();
 
@@ -1896,11 +2277,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             // operation to work.
             if then_val_element_size != element_type.get_size() {
                 let new_element_type = self.type_ix(then_val_element_size as u64 * 8);
-                let new_vector_type = self.context.new_vector_type(new_element_type, num_units as u64);
-                let cond = self.context.convert_vector(self.loc, cond, new_vector_type);
+                let new_vector_type =
+                    self.context.new_vector_type(new_element_type, num_units as u64);
+                let cond = self.context.convert_vector(self.location, cond, new_vector_type);
                 (cond, new_element_type)
-            }
-            else {
+            } else {
                 (cond, element_type)
             }
         };
@@ -1908,24 +2289,25 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let cond_type = cond.get_type();
 
         let zeros = vec![self.context.new_rvalue_zero(element_type); num_units];
-        let zeros = self.context.new_rvalue_from_vector(self.loc, cond_type, &zeros);
+        let zeros = self.context.new_rvalue_from_vector(self.location, cond_type, &zeros);
 
         let result_type = then_val.get_type();
 
-        let masks = self.context.new_comparison(self.loc, ComparisonOp::NotEquals, cond, zeros);
+        let masks =
+            self.context.new_comparison(self.location, ComparisonOp::NotEquals, cond, zeros);
         // NOTE: masks is a vector of integers, but the values can be vectors of floats, so use bitcast to make
         // the & operation work.
         let then_val = self.bitcast_if_needed(then_val, masks.get_type());
         let then_vals = masks & then_val;
 
         let minus_ones = vec![self.context.new_rvalue_from_int(element_type, -1); num_units];
-        let minus_ones = self.context.new_rvalue_from_vector(self.loc, cond_type, &minus_ones);
+        let minus_ones = self.context.new_rvalue_from_vector(self.location, cond_type, &minus_ones);
         let inverted_masks = masks ^ minus_ones;
         // NOTE: sometimes, the type of else_val can be different than the type of then_val in
         // libgccjit (vector of int vs vector of int32_t), but they should be the same for the AND
         // operation to work.
         // TODO: remove bitcast now that vector types can be compared?
-        let else_val = self.context.new_bitcast(self.loc, else_val, then_val.get_type());
+        let else_val = self.context.new_bitcast(self.location, else_val, then_val.get_type());
         let else_vals = inverted_masks & else_val;
 
         let res = then_vals | else_vals;
@@ -1933,26 +2315,26 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 }
 
-fn difference_or_zero<'gcc>(loc: Option<Location<'gcc>>, a: RValue<'gcc>, b: RValue<'gcc>, context: &'gcc Context<'gcc>) -> RValue<'gcc> {
+fn difference_or_zero<'gcc>(
+    loc: Option<Location<'gcc>>,
+    a: RValue<'gcc>,
+    b: RValue<'gcc>,
+    context: &'gcc Context<'gcc>,
+) -> RValue<'gcc> {
     let difference = a - b;
     let masks = context.new_comparison(loc, ComparisonOp::GreaterThanEquals, b, a);
     // NOTE: masks is a vector of integers, but the values can be vectors of floats, so use bitcast to make
     // the & operation work.
     let a_type = a.get_type();
     let masks =
-        if masks.get_type() != a_type {
-            context.new_bitcast(loc, masks, a_type)
-        }
-        else {
-            masks
-        };
+        if masks.get_type() != a_type { context.new_bitcast(loc, masks, a_type) } else { masks };
     difference & masks
 }
 
 impl<'a, 'gcc, 'tcx> StaticBuilderMethods for Builder<'a, 'gcc, 'tcx> {
     fn get_static(&mut self, def_id: DefId) -> RValue<'gcc> {
         // Forward to the `get_static` method of `CodegenCx`
-        self.cx().get_static(def_id).get_address(self.loc)
+        self.cx().get_static(def_id).get_address(self.location)
     }
 }
 
@@ -2032,15 +2414,14 @@ impl ToGccOrdering for AtomicOrdering {
     fn to_gcc(self) -> i32 {
         use MemOrdering::*;
 
-        let ordering =
-            match self {
-                AtomicOrdering::Unordered => __ATOMIC_RELAXED,
-                AtomicOrdering::Relaxed => __ATOMIC_RELAXED, // TODO(antoyo): check if that's the same.
-                AtomicOrdering::Acquire => __ATOMIC_ACQUIRE,
-                AtomicOrdering::Release => __ATOMIC_RELEASE,
-                AtomicOrdering::AcquireRelease => __ATOMIC_ACQ_REL,
-                AtomicOrdering::SequentiallyConsistent => __ATOMIC_SEQ_CST,
-            };
+        let ordering = match self {
+            AtomicOrdering::Unordered => __ATOMIC_RELAXED,
+            AtomicOrdering::Relaxed => __ATOMIC_RELAXED, // TODO(antoyo): check if that's the same.
+            AtomicOrdering::Acquire => __ATOMIC_ACQUIRE,
+            AtomicOrdering::Release => __ATOMIC_RELEASE,
+            AtomicOrdering::AcquireRelease => __ATOMIC_ACQ_REL,
+            AtomicOrdering::SequentiallyConsistent => __ATOMIC_SEQ_CST,
+        };
         ordering as i32
     }
 }
diff --git a/src/callee.rs b/src/callee.rs
index 9fc77627b1bc..84f49b6856d4 100644
--- a/src/callee.rs
+++ b/src/callee.rs
@@ -1,8 +1,8 @@
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 use gccjit::{FnAttribute, Visibility};
-use gccjit::{FunctionType, Function};
-use rustc_middle::ty::{self, Instance, TypeVisitableExt};
+use gccjit::{Function, FunctionType};
 use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt};
+use rustc_middle::ty::{self, Instance, TypeVisitableExt};
 
 use crate::attributes;
 use crate::context::CodegenCx;
@@ -28,145 +28,144 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
 
     let fn_abi = cx.fn_abi_of_instance(instance, ty::List::empty());
 
-    let func =
-        if let Some(_func) = cx.get_declared_value(&sym) {
-            // FIXME(antoyo): we never reach this because get_declared_value only returns global variables
-            // and here we try to get a function.
-            unreachable!();
-            /*
-            // Create a fn pointer with the new signature.
-            let ptrty = fn_abi.ptr_to_gcc_type(cx);
+    let func = if let Some(_func) = cx.get_declared_value(&sym) {
+        // FIXME(antoyo): we never reach this because get_declared_value only returns global variables
+        // and here we try to get a function.
+        unreachable!();
+        /*
+        // Create a fn pointer with the new signature.
+        let ptrty = fn_abi.ptr_to_gcc_type(cx);
 
-            // This is subtle and surprising, but sometimes we have to bitcast
-            // the resulting fn pointer.  The reason has to do with external
-            // functions.  If you have two crates that both bind the same C
-            // library, they may not use precisely the same types: for
-            // example, they will probably each declare their own structs,
-            // which are distinct types from LLVM's point of view (nominal
-            // types).
-            //
-            // Now, if those two crates are linked into an application, and
-            // they contain inlined code, you can wind up with a situation
-            // where both of those functions wind up being loaded into this
-            // application simultaneously. In that case, the same function
-            // (from LLVM's point of view) requires two types. But of course
-            // LLVM won't allow one function to have two types.
-            //
-            // What we currently do, therefore, is declare the function with
-            // one of the two types (whichever happens to come first) and then
-            // bitcast as needed when the function is referenced to make sure
-            // it has the type we expect.
-            //
-            // This can occur on either a crate-local or crate-external
-            // reference. It also occurs when testing libcore and in some
-            // other weird situations. Annoying.
-            if cx.val_ty(func) != ptrty {
-                // TODO(antoyo): cast the pointer.
-                func
-            }
-            else {
-                func
-            }*/
+        // This is subtle and surprising, but sometimes we have to bitcast
+        // the resulting fn pointer.  The reason has to do with external
+        // functions.  If you have two crates that both bind the same C
+        // library, they may not use precisely the same types: for
+        // example, they will probably each declare their own structs,
+        // which are distinct types from LLVM's point of view (nominal
+        // types).
+        //
+        // Now, if those two crates are linked into an application, and
+        // they contain inlined code, you can wind up with a situation
+        // where both of those functions wind up being loaded into this
+        // application simultaneously. In that case, the same function
+        // (from LLVM's point of view) requires two types. But of course
+        // LLVM won't allow one function to have two types.
+        //
+        // What we currently do, therefore, is declare the function with
+        // one of the two types (whichever happens to come first) and then
+        // bitcast as needed when the function is referenced to make sure
+        // it has the type we expect.
+        //
+        // This can occur on either a crate-local or crate-external
+        // reference. It also occurs when testing libcore and in some
+        // other weird situations. Annoying.
+        if cx.val_ty(func) != ptrty {
+            // TODO(antoyo): cast the pointer.
+            func
         }
         else {
-            cx.linkage.set(FunctionType::Extern);
-            let func = cx.declare_fn(&sym, &fn_abi);
+            func
+        }*/
+    } else {
+        cx.linkage.set(FunctionType::Extern);
+        let func = cx.declare_fn(&sym, &fn_abi);
 
-            attributes::from_fn_attrs(cx, func, instance);
+        attributes::from_fn_attrs(cx, func, instance);
 
-            let instance_def_id = instance.def_id();
+        let instance_def_id = instance.def_id();
 
-            // TODO(antoyo): set linkage and attributes.
+        // TODO(antoyo): set linkage and attributes.
 
-            // Apply an appropriate linkage/visibility value to our item that we
-            // just declared.
-            //
-            // This is sort of subtle. Inside our codegen unit we started off
-            // compilation by predefining all our own `MonoItem` instances. That
-            // is, everything we're codegenning ourselves is already defined. That
-            // means that anything we're actually codegenning in this codegen unit
-            // will have hit the above branch in `get_declared_value`. As a result,
-            // we're guaranteed here that we're declaring a symbol that won't get
-            // defined, or in other words we're referencing a value from another
-            // codegen unit or even another crate.
-            //
-            // So because this is a foreign value we blanket apply an external
-            // linkage directive because it's coming from a different object file.
-            // The visibility here is where it gets tricky. This symbol could be
-            // referencing some foreign crate or foreign library (an `extern`
-            // block) in which case we want to leave the default visibility. We may
-            // also, though, have multiple codegen units. It could be a
-            // monomorphization, in which case its expected visibility depends on
-            // whether we are sharing generics or not. The important thing here is
-            // that the visibility we apply to the declaration is the same one that
-            // has been applied to the definition (wherever that definition may be).
-            let is_generic = instance.args.non_erasable_generics(tcx, instance.def_id()).next().is_some();
+        // Apply an appropriate linkage/visibility value to our item that we
+        // just declared.
+        //
+        // This is sort of subtle. Inside our codegen unit we started off
+        // compilation by predefining all our own `MonoItem` instances. That
+        // is, everything we're codegenning ourselves is already defined. That
+        // means that anything we're actually codegenning in this codegen unit
+        // will have hit the above branch in `get_declared_value`. As a result,
+        // we're guaranteed here that we're declaring a symbol that won't get
+        // defined, or in other words we're referencing a value from another
+        // codegen unit or even another crate.
+        //
+        // So because this is a foreign value we blanket apply an external
+        // linkage directive because it's coming from a different object file.
+        // The visibility here is where it gets tricky. This symbol could be
+        // referencing some foreign crate or foreign library (an `extern`
+        // block) in which case we want to leave the default visibility. We may
+        // also, though, have multiple codegen units. It could be a
+        // monomorphization, in which case its expected visibility depends on
+        // whether we are sharing generics or not. The important thing here is
+        // that the visibility we apply to the declaration is the same one that
+        // has been applied to the definition (wherever that definition may be).
+        let is_generic =
+            instance.args.non_erasable_generics(tcx, instance.def_id()).next().is_some();
 
-            if is_generic {
-                // This is a monomorphization. Its expected visibility depends
-                // on whether we are in share-generics mode.
+        if is_generic {
+            // This is a monomorphization. Its expected visibility depends
+            // on whether we are in share-generics mode.
 
-                if cx.tcx.sess.opts.share_generics() {
-                    // We are in share_generics mode.
+            if cx.tcx.sess.opts.share_generics() {
+                // We are in share_generics mode.
 
-                    if let Some(instance_def_id) = instance_def_id.as_local() {
-                        // This is a definition from the current crate. If the
-                        // definition is unreachable for downstream crates or
-                        // the current crate does not re-export generics, the
-                        // definition of the instance will have been declared
-                        // as `hidden`.
-                        if cx.tcx.is_unreachable_local_definition(instance_def_id)
-                            || !cx.tcx.local_crate_exports_generics()
-                        {
-                            #[cfg(feature="master")]
-                            func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
-                        }
-                    } else {
-                        // This is a monomorphization of a generic function
-                        // defined in an upstream crate.
-                        if instance.upstream_monomorphization(tcx).is_some() {
-                            // This is instantiated in another crate. It cannot
-                            // be `hidden`.
-                        } else {
-                            // This is a local instantiation of an upstream definition.
-                            // If the current crate does not re-export it
-                            // (because it is a C library or an executable), it
-                            // will have been declared `hidden`.
-                            if !cx.tcx.local_crate_exports_generics() {
-                                #[cfg(feature="master")]
-                                func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
-                            }
-                        }
-                    }
-                } else {
-                    // When not sharing generics, all instances are in the same
-                    // crate and have hidden visibility
-                    #[cfg(feature="master")]
-                    func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
-                }
-            } else {
-                // This is a non-generic function
-                if cx.tcx.is_codegened_item(instance_def_id) {
-                    // This is a function that is instantiated in the local crate
-
-                    if instance_def_id.is_local() {
-                        // This is function that is defined in the local crate.
-                        // If it is not reachable, it is hidden.
-                        if !cx.tcx.is_reachable_non_generic(instance_def_id) {
-                            #[cfg(feature="master")]
-                            func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
-                        }
-                    } else {
-                        // This is a function from an upstream crate that has
-                        // been instantiated here. These are always hidden.
-                        #[cfg(feature="master")]
+                if let Some(instance_def_id) = instance_def_id.as_local() {
+                    // This is a definition from the current crate. If the
+                    // definition is unreachable for downstream crates or
+                    // the current crate does not re-export generics, the
+                    // definition of the instance will have been declared
+                    // as `hidden`.
+                    if cx.tcx.is_unreachable_local_definition(instance_def_id)
+                        || !cx.tcx.local_crate_exports_generics()
+                    {
+                        #[cfg(feature = "master")]
                         func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
                     }
+                } else {
+                    // This is a monomorphization of a generic function
+                    // defined in an upstream crate.
+                    if instance.upstream_monomorphization(tcx).is_some() {
+                        // This is instantiated in another crate. It cannot
+                        // be `hidden`.
+                    } else {
+                        // This is a local instantiation of an upstream definition.
+                        // If the current crate does not re-export it
+                        // (because it is a C library or an executable), it
+                        // will have been declared `hidden`.
+                        if !cx.tcx.local_crate_exports_generics() {
+                            #[cfg(feature = "master")]
+                            func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
+                        }
+                    }
+                }
+            } else {
+                // When not sharing generics, all instances are in the same
+                // crate and have hidden visibility
+                #[cfg(feature = "master")]
+                func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
+            }
+        } else {
+            // This is a non-generic function
+            if cx.tcx.is_codegened_item(instance_def_id) {
+                // This is a function that is instantiated in the local crate
+
+                if instance_def_id.is_local() {
+                    // This is function that is defined in the local crate.
+                    // If it is not reachable, it is hidden.
+                    if !cx.tcx.is_reachable_non_generic(instance_def_id) {
+                        #[cfg(feature = "master")]
+                        func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
+                    }
+                } else {
+                    // This is a function from an upstream crate that has
+                    // been instantiated here. These are always hidden.
+                    #[cfg(feature = "master")]
+                    func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
                 }
             }
+        }
 
-            func
-        };
+        func
+    };
 
     cx.function_instances.borrow_mut().insert(instance, func);
 
diff --git a/src/common.rs b/src/common.rs
index c6edd52d1e41..d243d7088ada 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -1,14 +1,9 @@
 use gccjit::LValue;
-use gccjit::{RValue, Type, ToRValue};
-use rustc_codegen_ssa::traits::{
-    BaseTypeMethods,
-    ConstMethods,
-    MiscMethods,
-    StaticMethods,
-};
-use rustc_middle::mir::Mutability;
-use rustc_middle::ty::layout::{LayoutOf};
+use gccjit::{RValue, ToRValue, Type};
+use rustc_codegen_ssa::traits::{BaseTypeMethods, ConstMethods, MiscMethods, StaticMethods};
 use rustc_middle::mir::interpret::{ConstAllocation, GlobalAlloc, Scalar};
+use rustc_middle::mir::Mutability;
+use rustc_middle::ty::layout::LayoutOf;
 use rustc_target::abi::{self, HasDataLayout, Pointer};
 
 use crate::consts::const_alloc_to_gcc;
@@ -40,9 +35,7 @@ pub fn bytes_in_context<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, bytes: &[u8]) ->
     let byte_type = context.new_type::<u8>();
     let typ = context.new_array_type(None, byte_type, bytes.len() as u64);
     let elements: Vec<_> =
-        bytes.iter()
-        .map(|&byte| context.new_rvalue_from_int(byte_type, byte as i32))
-        .collect();
+        bytes.iter().map(|&byte| context.new_rvalue_from_int(byte_type, byte as i32)).collect();
     context.new_array_constructor(None, typ, &elements)
 }
 
@@ -54,23 +47,20 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn const_null(&self, typ: Type<'gcc>) -> RValue<'gcc> {
         if type_is_pointer(typ) {
             self.context.new_null(typ)
-        }
-        else {
+        } else {
             self.const_int(typ, 0)
         }
     }
 
     fn const_undef(&self, typ: Type<'gcc>) -> RValue<'gcc> {
-        let local = self.current_func.borrow().expect("func")
-            .new_local(None, typ, "undefined");
+        let local = self.current_func.borrow().expect("func").new_local(None, typ, "undefined");
         if typ.is_struct().is_some() {
             // NOTE: hack to workaround a limitation of the rustc API: see comment on
             // CodegenCx.structs_as_pointer
             let pointer = local.get_address(None);
             self.structs_as_pointer.borrow_mut().insert(pointer);
             pointer
-        }
-        else {
+        } else {
             local.to_rvalue()
         }
     }
@@ -143,16 +133,15 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
             .or_insert_with(|| (s.to_owned(), self.global_string(s)))
             .1;
         let len = s.len();
-        let cs = self.const_ptrcast(str_global.get_address(None),
+        let cs = self.const_ptrcast(
+            str_global.get_address(None),
             self.type_ptr_to(self.layout_of(self.tcx.types.str_).gcc_type(self)),
         );
         (cs, self.const_usize(len as u64))
     }
 
     fn const_struct(&self, values: &[RValue<'gcc>], packed: bool) -> RValue<'gcc> {
-        let fields: Vec<_> = values.iter()
-            .map(|value| value.get_type())
-            .collect();
+        let fields: Vec<_> = values.iter().map(|value| value.get_type()).collect();
         // TODO(antoyo): cache the type? It's anonymous, so probably not.
         let typ = self.type_struct(&fields, packed);
         let struct_type = typ.is_struct().expect("struct type");
@@ -178,9 +167,10 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 // FIXME(antoyo): there's some issues with using the u128 code that follows, so hard-code
                 // the paths for floating-point values.
                 if ty == self.float_type {
-                    return self.context.new_rvalue_from_double(ty, f32::from_bits(data as u32) as f64);
-                }
-                else if ty == self.double_type {
+                    return self
+                        .context
+                        .new_rvalue_from_double(ty, f32::from_bits(data as u32) as f64);
+                } else if ty == self.double_type {
                     return self.context.new_rvalue_from_double(ty, f64::from_bits(data as u64));
                 }
 
@@ -192,8 +182,7 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                     // FIXME(antoyo): fix bitcast to work in constant contexts.
                     // TODO(antoyo): perhaps only use bitcast for pointers?
                     self.context.new_cast(None, value, ty)
-                }
-                else {
+                } else {
                     // TODO(bjorn3): assert size is correct
                     self.const_bitcast(value, ty)
                 }
@@ -201,42 +190,41 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
             Scalar::Ptr(ptr, _size) => {
                 let (prov, offset) = ptr.into_parts(); // we know the `offset` is relative
                 let alloc_id = prov.alloc_id();
-                let base_addr =
-                    match self.tcx.global_alloc(alloc_id) {
-                        GlobalAlloc::Memory(alloc) => {
-                            let init = const_alloc_to_gcc(self, alloc);
-                            let alloc = alloc.inner();
-                            let value =
-                                match alloc.mutability {
-                                    Mutability::Mut => self.static_addr_of_mut(init, alloc.align, None),
-                                    _ => self.static_addr_of(init, alloc.align, None),
-                                };
-                            if !self.sess().fewer_names() {
-                                // TODO(antoyo): set value name.
-                            }
-                            value
-                        },
-                        GlobalAlloc::Function(fn_instance) => {
-                            self.get_fn_addr(fn_instance)
-                        },
-                        GlobalAlloc::VTable(ty, trait_ref) => {
-                            let alloc = self.tcx.global_alloc(self.tcx.vtable_allocation((ty, trait_ref))).unwrap_memory();
-                            let init = const_alloc_to_gcc(self, alloc);
-                            self.static_addr_of(init, alloc.inner().align, None)
+                let base_addr = match self.tcx.global_alloc(alloc_id) {
+                    GlobalAlloc::Memory(alloc) => {
+                        let init = const_alloc_to_gcc(self, alloc);
+                        let alloc = alloc.inner();
+                        let value = match alloc.mutability {
+                            Mutability::Mut => self.static_addr_of_mut(init, alloc.align, None),
+                            _ => self.static_addr_of(init, alloc.align, None),
+                        };
+                        if !self.sess().fewer_names() {
+                            // TODO(antoyo): set value name.
                         }
-                        GlobalAlloc::Static(def_id) => {
-                            assert!(self.tcx.is_static(def_id));
-                            self.get_static(def_id).get_address(None)
-                        },
-                    };
+                        value
+                    }
+                    GlobalAlloc::Function(fn_instance) => self.get_fn_addr(fn_instance),
+                    GlobalAlloc::VTable(ty, trait_ref) => {
+                        let alloc = self
+                            .tcx
+                            .global_alloc(self.tcx.vtable_allocation((ty, trait_ref)))
+                            .unwrap_memory();
+                        let init = const_alloc_to_gcc(self, alloc);
+                        self.static_addr_of(init, alloc.inner().align, None)
+                    }
+                    GlobalAlloc::Static(def_id) => {
+                        assert!(self.tcx.is_static(def_id));
+                        self.get_static(def_id).get_address(None)
+                    }
+                };
                 let ptr_type = base_addr.get_type();
                 let base_addr = self.const_bitcast(base_addr, self.usize_type);
-                let offset = self.context.new_rvalue_from_long(self.usize_type, offset.bytes() as i64);
+                let offset =
+                    self.context.new_rvalue_from_long(self.usize_type, offset.bytes() as i64);
                 let ptr = self.const_bitcast(base_addr + offset, ptr_type);
                 if !matches!(layout.primitive(), Pointer(_)) {
                     self.const_bitcast(ptr.dereference(None).to_rvalue(), ty)
-                }
-                else {
+                } else {
                     self.const_bitcast(ptr, ty)
                 }
             }
@@ -261,7 +249,9 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn const_ptr_byte_offset(&self, base_addr: Self::Value, offset: abi::Size) -> Self::Value {
-        self.context.new_array_access(None, base_addr, self.const_usize(offset.bytes())).get_address(None)
+        self.context
+            .new_array_access(None, base_addr, self.const_usize(offset.bytes()))
+            .get_address(None)
     }
 }
 
@@ -284,35 +274,25 @@ impl<'gcc, 'tcx> SignType<'gcc, 'tcx> for Type<'gcc> {
     fn to_signed(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc> {
         if self.is_u8(cx) {
             cx.i8_type
-        }
-        else if self.is_u16(cx) {
+        } else if self.is_u16(cx) {
             cx.i16_type
-        }
-        else if self.is_u32(cx) {
+        } else if self.is_u32(cx) {
             cx.i32_type
-        }
-        else if self.is_u64(cx) {
+        } else if self.is_u64(cx) {
             cx.i64_type
-        }
-        else if self.is_u128(cx) {
+        } else if self.is_u128(cx) {
             cx.i128_type
-        }
-        else if self.is_uchar(cx) {
+        } else if self.is_uchar(cx) {
             cx.char_type
-        }
-        else if self.is_ushort(cx) {
+        } else if self.is_ushort(cx) {
             cx.short_type
-        }
-        else if self.is_uint(cx) {
+        } else if self.is_uint(cx) {
             cx.int_type
-        }
-        else if self.is_ulong(cx) {
+        } else if self.is_ulong(cx) {
             cx.long_type
-        }
-        else if self.is_ulonglong(cx) {
+        } else if self.is_ulonglong(cx) {
             cx.longlong_type
-        }
-        else {
+        } else {
             self.clone()
         }
     }
@@ -320,41 +300,31 @@ impl<'gcc, 'tcx> SignType<'gcc, 'tcx> for Type<'gcc> {
     fn to_unsigned(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc> {
         if self.is_i8(cx) {
             cx.u8_type
-        }
-        else if self.is_i16(cx) {
+        } else if self.is_i16(cx) {
             cx.u16_type
-        }
-        else if self.is_i32(cx) {
+        } else if self.is_i32(cx) {
             cx.u32_type
-        }
-        else if self.is_i64(cx) {
+        } else if self.is_i64(cx) {
             cx.u64_type
-        }
-        else if self.is_i128(cx) {
+        } else if self.is_i128(cx) {
             cx.u128_type
-        }
-        else if self.is_char(cx) {
+        } else if self.is_char(cx) {
             cx.uchar_type
-        }
-        else if self.is_short(cx) {
+        } else if self.is_short(cx) {
             cx.ushort_type
-        }
-        else if self.is_int(cx) {
+        } else if self.is_int(cx) {
             cx.uint_type
-        }
-        else if self.is_long(cx) {
+        } else if self.is_long(cx) {
             cx.ulong_type
-        }
-        else if self.is_longlong(cx) {
+        } else if self.is_longlong(cx) {
             cx.ulonglong_type
-        }
-        else {
+        } else {
             self.clone()
         }
     }
 }
 
-pub trait TypeReflection<'gcc, 'tcx>  {
+pub trait TypeReflection<'gcc, 'tcx> {
     fn is_uchar(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
     fn is_ushort(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
     fn is_uint(&self, cx: &CodegenCx<'gcc, 'tcx>) -> bool;
diff --git a/src/consts.rs b/src/consts.rs
index 054741e16423..1c66ad8cc5a1 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -2,12 +2,14 @@
 use gccjit::{FnAttribute, VarAttribute, Visibility};
 use gccjit::{Function, GlobalKind, LValue, RValue, ToRValue};
 use rustc_codegen_ssa::traits::{BaseTypeMethods, ConstMethods, DerivedTypeMethods, StaticMethods};
-use rustc_middle::span_bug;
 use rustc_middle::middle::codegen_fn_attrs::{CodegenFnAttrFlags, CodegenFnAttrs};
+use rustc_middle::mir::interpret::{
+    self, read_target_uint, ConstAllocation, ErrorHandled, Scalar as InterpScalar,
+};
 use rustc_middle::mir::mono::MonoItem;
-use rustc_middle::ty::{self, Instance, Ty};
+use rustc_middle::span_bug;
 use rustc_middle::ty::layout::LayoutOf;
-use rustc_middle::mir::interpret::{self, ConstAllocation, ErrorHandled, Scalar as InterpScalar, read_target_uint};
+use rustc_middle::ty::{self, Instance, Ty};
 use rustc_span::def_id::DefId;
 use rustc_target::abi::{self, Align, HasDataLayout, Primitive, Size, WrappingRange};
 
@@ -16,7 +18,11 @@ use crate::context::CodegenCx;
 use crate::errors::InvalidMinimumAlignment;
 use crate::type_of::LayoutGccExt;
 
-fn set_global_alignment<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, gv: LValue<'gcc>, mut align: Align) {
+fn set_global_alignment<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    gv: LValue<'gcc>,
+    mut align: Align,
+) {
     // The target may require greater alignment for globals than the type does.
     // Note: GCC and Clang also allow `__attribute__((aligned))` on variables,
     // which can force it to be smaller. Rust doesn't support this yet.
@@ -48,7 +54,9 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
         }
         let global_value = self.static_addr_of_mut(cv, align, kind);
         #[cfg(feature = "master")]
-        self.global_lvalues.borrow().get(&global_value)
+        self.global_lvalues
+            .borrow()
+            .get(&global_value)
             .expect("`static_addr_of_mut` did not add the global to `self.global_lvalues`")
             .global_set_readonly();
         self.const_globals.borrow_mut().insert(cv, global_value);
@@ -58,25 +66,22 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
     fn codegen_static(&self, def_id: DefId, is_mutable: bool) {
         let attrs = self.tcx.codegen_fn_attrs(def_id);
 
-        let value =
-            match codegen_static_initializer(&self, def_id) {
-                Ok((value, _)) => value,
-                // Error has already been reported
-                Err(_) => return,
-            };
+        let value = match codegen_static_initializer(&self, def_id) {
+            Ok((value, _)) => value,
+            // Error has already been reported
+            Err(_) => return,
+        };
 
         let global = self.get_static(def_id);
 
         // boolean SSA values are i1, but they have to be stored in i8 slots,
         // otherwise some LLVM optimization passes don't work as expected
         let val_llty = self.val_ty(value);
-        let value =
-            if val_llty == self.type_i1() {
-                unimplemented!();
-            }
-            else {
-                value
-            };
+        let value = if val_llty == self.type_i1() {
+            unimplemented!();
+        } else {
+            value
+        };
 
         let instance = Instance::mono(self.tcx, def_id);
         let ty = instance.ty(self.tcx, ty::ParamEnv::reveal_all());
@@ -149,7 +154,9 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
             // TODO(antoyo): set link section.
         }
 
-        if attrs.flags.contains(CodegenFnAttrFlags::USED) || attrs.flags.contains(CodegenFnAttrFlags::USED_LINKER) {
+        if attrs.flags.contains(CodegenFnAttrFlags::USED)
+            || attrs.flags.contains(CodegenFnAttrFlags::USED_LINKER)
+        {
             self.add_used_global(global.to_rvalue());
         }
     }
@@ -166,29 +173,33 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
 }
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
-    #[cfg_attr(not(feature="master"), allow(unused_variables))]
+    #[cfg_attr(not(feature = "master"), allow(unused_variables))]
     pub fn add_used_function(&self, function: Function<'gcc>) {
         #[cfg(feature = "master")]
         function.add_attribute(FnAttribute::Used);
     }
 
-    pub fn static_addr_of_mut(&self, cv: RValue<'gcc>, align: Align, kind: Option<&str>) -> RValue<'gcc> {
-        let global =
-            match kind {
-                Some(kind) if !self.tcx.sess.fewer_names() => {
-                    let name = self.generate_local_symbol_name(kind);
-                    // TODO(antoyo): check if it's okay that no link_section is set.
+    pub fn static_addr_of_mut(
+        &self,
+        cv: RValue<'gcc>,
+        align: Align,
+        kind: Option<&str>,
+    ) -> RValue<'gcc> {
+        let global = match kind {
+            Some(kind) if !self.tcx.sess.fewer_names() => {
+                let name = self.generate_local_symbol_name(kind);
+                // TODO(antoyo): check if it's okay that no link_section is set.
 
-                    let typ = self.val_ty(cv).get_aligned(align.bytes());
-                    let global = self.declare_private_global(&name[..], typ);
-                    global
-                }
-                _ => {
-                    let typ = self.val_ty(cv).get_aligned(align.bytes());
-                    let global = self.declare_unnamed_global(typ);
-                    global
-                },
-            };
+                let typ = self.val_ty(cv).get_aligned(align.bytes());
+                let global = self.declare_private_global(&name[..], typ);
+                global
+            }
+            _ => {
+                let typ = self.val_ty(cv).get_aligned(align.bytes());
+                let global = self.declare_unnamed_global(typ);
+                global
+            }
+        };
         global.global_set_initializer_rvalue(cv);
         // TODO(antoyo): set unnamed address.
         let rvalue = global.get_address(None);
@@ -215,8 +226,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let ty = instance.ty(self.tcx, ty::ParamEnv::reveal_all());
         let sym = self.tcx.symbol_name(instance).name;
 
-        let global =
-            if def_id.is_local() && !self.tcx.is_foreign_item(def_id) {
+        let global = if def_id.is_local() && !self.tcx.is_foreign_item(def_id) {
             let llty = self.layout_of(ty).gcc_type(self);
             if let Some(global) = self.get_declared_value(sym) {
                 if self.val_ty(global) != self.type_ptr_to(llty) {
@@ -278,7 +288,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 }
 
-pub fn const_alloc_to_gcc<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, alloc: ConstAllocation<'tcx>) -> RValue<'gcc> {
+pub fn const_alloc_to_gcc<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    alloc: ConstAllocation<'tcx>,
+) -> RValue<'gcc> {
     let alloc = alloc.inner();
     let mut llvals = Vec::with_capacity(alloc.provenance().ptrs().len() + 1);
     let dl = cx.data_layout();
@@ -300,14 +313,14 @@ pub fn const_alloc_to_gcc<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, alloc: ConstAl
             let bytes = alloc.inspect_with_uninit_and_ptr_outside_interpreter(next_offset..offset);
             llvals.push(cx.const_bytes(bytes));
         }
-        let ptr_offset =
-            read_target_uint( dl.endian,
-                // This `inspect` is okay since it is within the bounds of the allocation, it doesn't
-                // affect interpreter execution (we inspect the result after interpreter execution),
-                // and we properly interpret the provenance as a relocation pointer offset.
-                alloc.inspect_with_uninit_and_ptr_outside_interpreter(offset..(offset + pointer_size)),
-            )
-            .expect("const_alloc_to_llvm: could not read relocation pointer")
+        let ptr_offset = read_target_uint(
+            dl.endian,
+            // This `inspect` is okay since it is within the bounds of the allocation, it doesn't
+            // affect interpreter execution (we inspect the result after interpreter execution),
+            // and we properly interpret the provenance as a relocation pointer offset.
+            alloc.inspect_with_uninit_and_ptr_outside_interpreter(offset..(offset + pointer_size)),
+        )
+        .expect("const_alloc_to_llvm: could not read relocation pointer")
             as u64;
 
         let address_space = cx.tcx.global_alloc(alloc_id).address_space(cx);
@@ -317,7 +330,10 @@ pub fn const_alloc_to_gcc<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, alloc: ConstAl
                 interpret::Pointer::new(prov, Size::from_bytes(ptr_offset)),
                 &cx.tcx,
             ),
-            abi::Scalar::Initialized { value: Primitive::Pointer(address_space), valid_range: WrappingRange::full(dl.pointer_size) },
+            abi::Scalar::Initialized {
+                value: Primitive::Pointer(address_space),
+                valid_range: WrappingRange::full(dl.pointer_size),
+            },
             cx.type_i8p_ext(address_space),
         ));
         next_offset = offset + pointer_size;
@@ -337,17 +353,29 @@ pub fn const_alloc_to_gcc<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, alloc: ConstAl
     cx.const_struct(&llvals, true)
 }
 
-pub fn codegen_static_initializer<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, def_id: DefId) -> Result<(RValue<'gcc>, ConstAllocation<'tcx>), ErrorHandled> {
+pub fn codegen_static_initializer<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    def_id: DefId,
+) -> Result<(RValue<'gcc>, ConstAllocation<'tcx>), ErrorHandled> {
     let alloc = cx.tcx.eval_static_initializer(def_id)?;
     Ok((const_alloc_to_gcc(cx, alloc), alloc))
 }
 
-fn check_and_apply_linkage<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, attrs: &CodegenFnAttrs, ty: Ty<'tcx>, sym: &str) -> LValue<'gcc> {
+fn check_and_apply_linkage<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    attrs: &CodegenFnAttrs,
+    ty: Ty<'tcx>,
+    sym: &str,
+) -> LValue<'gcc> {
     let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
     let gcc_type = cx.layout_of(ty).gcc_type(cx);
     if let Some(linkage) = attrs.import_linkage {
         // Declare a symbol `foo` with the desired linkage.
-        let global1 = cx.declare_global_with_linkage(&sym, cx.type_i8(), base::global_linkage_to_gcc(linkage));
+        let global1 = cx.declare_global_with_linkage(
+            &sym,
+            cx.type_i8(),
+            base::global_linkage_to_gcc(linkage),
+        );
 
         // Declare an internal global `extern_with_linkage_foo` which
         // is initialized with the address of `foo`.  If `foo` is
@@ -363,8 +391,7 @@ fn check_and_apply_linkage<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, attrs: &Codeg
         global2.global_set_initializer_rvalue(value);
         // TODO(antoyo): use global_set_initializer() when it will work.
         global2
-    }
-    else {
+    } else {
         // Generate an external declaration.
         // FIXME(nagisa): investigate whether it can be changed into define_global
 
diff --git a/src/context.rs b/src/context.rs
index cca37168880b..bc3d62f2679d 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -1,22 +1,25 @@
 use std::cell::{Cell, RefCell};
 
-use gccjit::{Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, Location, RValue, Type};
-use rustc_codegen_ssa::base::wants_msvc_seh;
-use rustc_codegen_ssa::traits::{
-    BackendTypes,
-    BaseTypeMethods,
-    MiscMethods,
+use gccjit::{
+    Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, Location, RValue, Type,
 };
+use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::errors as ssa_errors;
+use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeMethods, MiscMethods};
 use rustc_data_structures::base_n;
 use rustc_data_structures::fx::{FxHashMap, FxHashSet};
-use rustc_middle::span_bug;
 use rustc_middle::mir::mono::CodegenUnit;
+use rustc_middle::span_bug;
+use rustc_middle::ty::layout::{
+    FnAbiError, FnAbiOf, FnAbiOfHelpers, FnAbiRequest, HasParamEnv, HasTyCtxt, LayoutError,
+    LayoutOfHelpers, TyAndLayout,
+};
 use rustc_middle::ty::{self, Instance, ParamEnv, PolyExistentialTraitRef, Ty, TyCtxt};
-use rustc_middle::ty::layout::{FnAbiError, FnAbiOf, FnAbiOfHelpers, FnAbiRequest, HasParamEnv, HasTyCtxt, LayoutError, TyAndLayout, LayoutOfHelpers};
 use rustc_session::Session;
-use rustc_span::{Span, source_map::respan};
-use rustc_target::abi::{call::FnAbi, HasDataLayout, PointeeInfo, Size, TargetDataLayout, VariantIdx};
+use rustc_span::{source_map::respan, Span};
+use rustc_target::abi::{
+    call::FnAbi, HasDataLayout, PointeeInfo, Size, TargetDataLayout, VariantIdx,
+};
 use rustc_target::spec::{HasTargetSpec, Target, TlsModel};
 
 use crate::callee::get_fn;
@@ -81,7 +84,8 @@ pub struct CodegenCx<'gcc, 'tcx> {
     /// Cache function instances of monomorphic and polymorphic items
     pub function_instances: RefCell<FxHashMap<Instance<'tcx>, Function<'gcc>>>,
     /// Cache generated vtables
-    pub vtables: RefCell<FxHashMap<(Ty<'tcx>, Option<ty::PolyExistentialTraitRef<'tcx>>), RValue<'gcc>>>,
+    pub vtables:
+        RefCell<FxHashMap<(Ty<'tcx>, Option<ty::PolyExistentialTraitRef<'tcx>>), RValue<'gcc>>>,
 
     // TODO(antoyo): improve the SSA API to not require those.
     /// Mapping from function pointer type to indexes of on stack parameters.
@@ -121,24 +125,28 @@ pub struct CodegenCx<'gcc, 'tcx> {
 }
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
-    pub fn new(context: &'gcc Context<'gcc>, codegen_unit: &'tcx CodegenUnit<'tcx>, tcx: TyCtxt<'tcx>, supports_128bit_integers: bool) -> Self {
+    pub fn new(
+        context: &'gcc Context<'gcc>,
+        codegen_unit: &'tcx CodegenUnit<'tcx>,
+        tcx: TyCtxt<'tcx>,
+        supports_128bit_integers: bool,
+    ) -> Self {
         let check_overflow = tcx.sess.overflow_checks();
 
         let create_type = |ctype, rust_type| {
             let layout = tcx.layout_of(ParamEnv::reveal_all().and(rust_type)).unwrap();
             let align = layout.align.abi.bytes();
-            #[cfg(feature="master")]
+            #[cfg(feature = "master")]
             {
                 context.new_c_type(ctype).get_aligned(align)
             }
-            #[cfg(not(feature="master"))]
+            #[cfg(not(feature = "master"))]
             {
                 // Since libgccjit 12 doesn't contain the fix to compare aligned integer types,
                 // only align u128 and i128.
                 if layout.ty.int_size_and_signed(tcx).0.bytes() == 16 {
                     context.new_c_type(ctype).get_aligned(align)
-                }
-                else {
+                } else {
                     context.new_c_type(ctype)
                 }
             }
@@ -153,24 +161,22 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let u32_type = create_type(CType::UInt32t, tcx.types.u32);
         let u64_type = create_type(CType::UInt64t, tcx.types.u64);
 
-        let (i128_type, u128_type) =
-            if supports_128bit_integers {
-                let i128_type = create_type(CType::Int128t, tcx.types.i128);
-                let u128_type = create_type(CType::UInt128t, tcx.types.u128);
-                (i128_type, u128_type)
-            }
-            else {
-                /*let layout = tcx.layout_of(ParamEnv::reveal_all().and(tcx.types.i128)).unwrap();
-                let i128_align = layout.align.abi.bytes();
-                let layout = tcx.layout_of(ParamEnv::reveal_all().and(tcx.types.u128)).unwrap();
-                let u128_align = layout.align.abi.bytes();*/
+        let (i128_type, u128_type) = if supports_128bit_integers {
+            let i128_type = create_type(CType::Int128t, tcx.types.i128);
+            let u128_type = create_type(CType::UInt128t, tcx.types.u128);
+            (i128_type, u128_type)
+        } else {
+            /*let layout = tcx.layout_of(ParamEnv::reveal_all().and(tcx.types.i128)).unwrap();
+            let i128_align = layout.align.abi.bytes();
+            let layout = tcx.layout_of(ParamEnv::reveal_all().and(tcx.types.u128)).unwrap();
+            let u128_align = layout.align.abi.bytes();*/
 
-                // TODO(antoyo): re-enable the alignment when libgccjit fixed the issue in
-                // gcc_jit_context_new_array_constructor (it should not use reinterpret_cast).
-                let i128_type = context.new_array_type(None, i64_type, 2)/*.get_aligned(i128_align)*/;
-                let u128_type = context.new_array_type(None, u64_type, 2)/*.get_aligned(u128_align)*/;
-                (i128_type, u128_type)
-            };
+            // TODO(antoyo): re-enable the alignment when libgccjit fixed the issue in
+            // gcc_jit_context_new_array_constructor (it should not use reinterpret_cast).
+            let i128_type = context.new_array_type(None, i64_type, 2)/*.get_aligned(i128_align)*/;
+            let u128_type = context.new_array_type(None, u64_type, 2)/*.get_aligned(u128_align)*/;
+            (i128_type, u128_type)
+        };
 
         let tls_model = to_gcc_tls_mode(tcx.sess.tls_model());
 
@@ -196,16 +202,65 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
         let mut functions = FxHashMap::default();
         let builtins = [
-            "__builtin_unreachable", "abort", "__builtin_expect", /*"__builtin_expect_with_probability",*/
-            "__builtin_constant_p", "__builtin_add_overflow", "__builtin_mul_overflow", "__builtin_saddll_overflow",
-            /*"__builtin_sadd_overflow",*/ "__builtin_smulll_overflow", /*"__builtin_smul_overflow",*/
-            "__builtin_ssubll_overflow", /*"__builtin_ssub_overflow",*/ "__builtin_sub_overflow", "__builtin_uaddll_overflow",
-            "__builtin_uadd_overflow", "__builtin_umulll_overflow", "__builtin_umul_overflow", "__builtin_usubll_overflow",
-            "__builtin_usub_overflow", "sqrtf", "sqrt", "__builtin_powif", "__builtin_powi", "sinf", "sin", "cosf", "cos",
-            "powf", "pow", "expf", "exp", "exp2f", "exp2", "logf", "log", "log10f", "log10", "log2f", "log2", "fmaf",
-            "fma", "fabsf", "fabs", "fminf", "fmin", "fmaxf", "fmax", "copysignf", "copysign", "floorf", "floor", "ceilf",
-            "ceil", "truncf", "trunc", "rintf", "rint", "nearbyintf", "nearbyint", "roundf", "round",
-           
+            "__builtin_unreachable",
+            "abort",
+            "__builtin_expect", /*"__builtin_expect_with_probability",*/
+            "__builtin_constant_p",
+            "__builtin_add_overflow",
+            "__builtin_mul_overflow",
+            "__builtin_saddll_overflow",
+            /*"__builtin_sadd_overflow",*/
+            "__builtin_smulll_overflow", /*"__builtin_smul_overflow",*/
+            "__builtin_ssubll_overflow",
+            /*"__builtin_ssub_overflow",*/ "__builtin_sub_overflow",
+            "__builtin_uaddll_overflow",
+            "__builtin_uadd_overflow",
+            "__builtin_umulll_overflow",
+            "__builtin_umul_overflow",
+            "__builtin_usubll_overflow",
+            "__builtin_usub_overflow",
+            "sqrtf",
+            "sqrt",
+            "__builtin_powif",
+            "__builtin_powi",
+            "sinf",
+            "sin",
+            "cosf",
+            "cos",
+            "powf",
+            "pow",
+            "expf",
+            "exp",
+            "exp2f",
+            "exp2",
+            "logf",
+            "log",
+            "log10f",
+            "log10",
+            "log2f",
+            "log2",
+            "fmaf",
+            "fma",
+            "fabsf",
+            "fabs",
+            "fminf",
+            "fmin",
+            "fmaxf",
+            "fmax",
+            "copysignf",
+            "copysign",
+            "floorf",
+            "floor",
+            "ceilf",
+            "ceil",
+            "truncf",
+            "trunc",
+            "rintf",
+            "rint",
+            "nearbyintf",
+            "nearbyint",
+            "roundf",
+            "round",
         ];
 
         for builtin in builtins.iter() {
@@ -282,8 +337,12 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
     pub fn rvalue_as_function(&self, value: RValue<'gcc>) -> Function<'gcc> {
         let function: Function<'gcc> = unsafe { std::mem::transmute(value) };
-        debug_assert!(self.functions.borrow().values().any(|value| *value == function),
-            "{:?} ({:?}) is not a function", value, value.get_type());
+        debug_assert!(
+            self.functions.borrow().values().any(|value| *value == function),
+            "{:?} ({:?}) is not a function",
+            value,
+            value.get_type()
+        );
         function
     }
 
@@ -305,13 +364,13 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             }
         }
 
-        self.supports_128bit_integers &&
-            (self.u128_type.is_compatible_with(typ) || self.i128_type.is_compatible_with(typ))
+        self.supports_128bit_integers
+            && (self.u128_type.is_compatible_with(typ) || self.i128_type.is_compatible_with(typ))
     }
 
     pub fn is_non_native_int_type(&self, typ: Type<'gcc>) -> bool {
-        !self.supports_128bit_integers &&
-            (self.u128_type.is_compatible_with(typ) || self.i128_type.is_compatible_with(typ))
+        !self.supports_128bit_integers
+            && (self.u128_type.is_compatible_with(typ) || self.i128_type.is_compatible_with(typ))
     }
 
     pub fn is_native_int_type_or_bool(&self, typ: Type<'gcc>) -> bool {
@@ -319,18 +378,23 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     pub fn is_int_type_or_bool(&self, typ: Type<'gcc>) -> bool {
-        self.is_native_int_type(typ) || self.is_non_native_int_type(typ) || typ.is_compatible_with(self.bool_type)
+        self.is_native_int_type(typ)
+            || self.is_non_native_int_type(typ)
+            || typ.is_compatible_with(self.bool_type)
     }
 
     pub fn sess(&self) -> &'tcx Session {
         &self.tcx.sess
     }
 
-    pub fn bitcast_if_needed(&self, value: RValue<'gcc>, expected_type: Type<'gcc>) -> RValue<'gcc> {
+    pub fn bitcast_if_needed(
+        &self,
+        value: RValue<'gcc>,
+        expected_type: Type<'gcc>,
+    ) -> RValue<'gcc> {
         if value.get_type() != expected_type {
             self.context.new_bitcast(None, value, expected_type)
-        }
-        else {
+        } else {
             value
         }
     }
@@ -350,7 +414,9 @@ impl<'gcc, 'tcx> BackendTypes for CodegenCx<'gcc, 'tcx> {
 }
 
 impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
-    fn vtables(&self) -> &RefCell<FxHashMap<(Ty<'tcx>, Option<PolyExistentialTraitRef<'tcx>>), RValue<'gcc>>> {
+    fn vtables(
+        &self,
+    ) -> &RefCell<FxHashMap<(Ty<'tcx>, Option<PolyExistentialTraitRef<'tcx>>), RValue<'gcc>>> {
         &self.vtables
     }
 
@@ -364,13 +430,11 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn get_fn_addr(&self, instance: Instance<'tcx>) -> RValue<'gcc> {
         let func_name = self.tcx.symbol_name(instance).name;
 
-        let func =
-            if self.intrinsics.borrow().contains_key(func_name) {
-                self.intrinsics.borrow()[func_name].clone()
-            }
-            else {
-                get_fn(self, instance)
-            };
+        let func = if self.intrinsics.borrow().contains_key(func_name) {
+            self.intrinsics.borrow()[func_name].clone()
+        } else {
+            get_fn(self, instance)
+        };
         let ptr = func.get_address(None);
 
         // TODO(antoyo): don't do this twice: i.e. in declare_fn and here.
@@ -407,37 +471,34 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
             return llpersonality;
         }
         let tcx = self.tcx;
-        let func =
-            match tcx.lang_items().eh_personality() {
-                Some(def_id) if !wants_msvc_seh(self.sess()) => {
-                    let instance =
-                        ty::Instance::resolve(
-                            tcx,
-                            ty::ParamEnv::reveal_all(),
-                            def_id,
-                            ty::List::empty(),
-                        )
-                        .unwrap().unwrap();
+        let func = match tcx.lang_items().eh_personality() {
+            Some(def_id) if !wants_msvc_seh(self.sess()) => {
+                let instance = ty::Instance::resolve(
+                    tcx,
+                    ty::ParamEnv::reveal_all(),
+                    def_id,
+                    ty::List::empty(),
+                )
+                .unwrap()
+                .unwrap();
 
-                    let symbol_name = tcx.symbol_name(instance).name;
-                    let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
-                    self.linkage.set(FunctionType::Extern);
-                    let func = self.declare_fn(symbol_name, &fn_abi);
-                    let func: RValue<'gcc> = unsafe { std::mem::transmute(func) };
-                    func
-                },
-                _ => {
-                    let name =
-                        if wants_msvc_seh(self.sess()) {
-                            "__CxxFrameHandler3"
-                        }
-                        else {
-                            "rust_eh_personality"
-                        };
-                    let func = self.declare_func(name, self.type_i32(), &[], true);
-                    unsafe { std::mem::transmute(func) }
-                }
-            };
+                let symbol_name = tcx.symbol_name(instance).name;
+                let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
+                self.linkage.set(FunctionType::Extern);
+                let func = self.declare_fn(symbol_name, &fn_abi);
+                let func: RValue<'gcc> = unsafe { std::mem::transmute(func) };
+                func
+            }
+            _ => {
+                let name = if wants_msvc_seh(self.sess()) {
+                    "__CxxFrameHandler3"
+                } else {
+                    "rust_eh_personality"
+                };
+                let func = self.declare_func(name, self.type_i32(), &[], true);
+                unsafe { std::mem::transmute(func) }
+            }
+        };
         // TODO(antoyo): apply target cpu attributes.
         self.eh_personality.set(Some(func));
         func
@@ -467,8 +528,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let entry_name = self.sess().target.entry_name.as_ref();
         if self.get_declared_value(entry_name).is_none() {
             Some(self.declare_entry_fn(entry_name, fn_type, ()))
-        }
-        else {
+        } else {
             // If the symbol already exists, it is an error: for example, the user wrote
             // #[no_mangle] extern "C" fn main(..) {..}
             // instead of #[start]
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index cd01785edbf0..a072a5092a79 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -1,16 +1,16 @@
+use crate::rustc_index::Idx;
 use gccjit::{Location, RValue};
 use rustc_codegen_ssa::mir::debuginfo::{DebugScope, FunctionDebugContext, VariableKind};
 use rustc_codegen_ssa::traits::{DebugInfoBuilderMethods, DebugInfoMethods};
+use rustc_data_structures::sync::Lrc;
 use rustc_index::bit_set::BitSet;
 use rustc_index::IndexVec;
-use rustc_middle::mir::{Body, self, SourceScope};
+use rustc_middle::mir::{self, Body, SourceScope};
 use rustc_middle::ty::{Instance, PolyExistentialTraitRef, Ty};
 use rustc_session::config::DebugInfo;
 use rustc_span::{BytePos, Pos, SourceFile, SourceFileAndLine, Span, Symbol};
 use rustc_target::abi::call::FnAbi;
 use rustc_target::abi::Size;
-use rustc_data_structures::sync::Lrc;
-use crate::rustc_index::Idx;
 use std::ops::Range;
 
 use crate::builder::Builder;
@@ -25,15 +25,15 @@ impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods for Builder<'a, 'gcc, 'tcx> {
     fn dbg_var_addr(
         &mut self,
         _dbg_var: Self::DIVariable,
-        dbg_loc: Self::DILocation,
-        variable_alloca: Self::Value,
+        _dbg_loc: Self::DILocation,
+        _variable_alloca: Self::Value,
         _direct_offset: Size,
         _indirect_offsets: &[Size],
         _fragment: Option<Range<Size>>,
     ) {
         // FIXME(tempdragon): Not sure if this is correct, probably wrong but still keep it here.
         #[cfg(feature = "master")]
-        variable_alloca.set_location(dbg_loc);
+        _variable_alloca.set_location(_dbg_loc);
     }
 
     fn insert_reference_to_gdb_debug_scripts_section_global(&mut self) {
@@ -43,11 +43,10 @@ impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods for Builder<'a, 'gcc, 'tcx> {
     /// FIXME(tempdragon): Currently, this function is not yet implemented. It seems that the
     /// debug name and the mangled name should both be included in the LValues.
     /// Besides, a function to get the rvalue type(m_is_lvalue) should also be included.
-    fn set_var_name(&mut self, _value: RValue<'gcc>, _name: &str) {
-    }
+    fn set_var_name(&mut self, _value: RValue<'gcc>, _name: &str) {}
 
     fn set_dbg_loc(&mut self, dbg_loc: Self::DILocation) {
-        self.loc = Some(dbg_loc);
+        self.location = Some(dbg_loc);
     }
 }
 
@@ -86,7 +85,7 @@ fn compute_mir_scopes<'gcc, 'tcx>(
 
 /// Update the `debug_context`, adding new scope to it,
 /// if it's not added as is denoted in `instantiated`.
-/// 
+///
 /// # Souce of Origin
 /// Copied from `create_scope_map.rs` of rustc_codegen_llvm
 /// FIXME(tempdragon/?): Add Scope Support Here.
@@ -119,16 +118,14 @@ fn make_mir_scope<'gcc, 'tcx>(
         return;
     };
 
-    if let Some(vars) = variables
-    {
-        if !vars.contains(scope)
-            && scope_data.inlined.is_none() {
-                // Do not create a DIScope if there are no variables defined in this
-                // MIR `SourceScope`, and it's not `inlined`, to avoid debuginfo bloat.
-                debug_context.scopes[scope] = parent_scope;
-                instantiated.insert(scope);
-                return;
-            }
+    if let Some(vars) = variables {
+        if !vars.contains(scope) && scope_data.inlined.is_none() {
+            // Do not create a DIScope if there are no variables defined in this
+            // MIR `SourceScope`, and it's not `inlined`, to avoid debuginfo bloat.
+            debug_context.scopes[scope] = parent_scope;
+            instantiated.insert(scope);
+            return;
+        }
     }
 
     let loc = cx.lookup_debug_loc(scope_data.span.lo());
@@ -145,7 +142,7 @@ fn make_mir_scope<'gcc, 'tcx>(
     let p_inlined_at = parent_scope.inlined_at;
     // TODO(tempdragon): dbg_scope: Add support for scope extension here.
     inlined_at.or(p_inlined_at);
-    
+
     debug_context.scopes[scope] = DebugScope {
         dbg_scope,
         inlined_at,
@@ -216,7 +213,6 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         llfn: RValue<'gcc>,
         mir: &mir::Body<'tcx>,
     ) -> Option<FunctionDebugContext<'tcx, Self::DIScope, Self::DILocation>> {
-        // TODO(antoyo)
         if self.sess().opts.debuginfo == DebugInfo::None {
             return None;
         }
@@ -278,33 +274,27 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         span: Span,
     ) -> Self::DILocation {
         let pos = span.lo();
-        let DebugLoc{file, line, col} = self.lookup_debug_loc(pos);
+        let DebugLoc { file, line, col } = self.lookup_debug_loc(pos);
         let loc = match &file.name {
             rustc_span::FileName::Real(name) => match name {
                 rustc_span::RealFileName::LocalPath(name) => {
                     if let Some(name) = name.to_str() {
-                        self.context
-                            .new_location(name, line as i32, col as i32)
-                    } else{
-                        Location::null()
-                    }
-                }
-                rustc_span::RealFileName::Remapped {
-                    local_path,
-                    virtual_name:_,
-                } => if let Some(name) = local_path.as_ref() {
-                    if let Some(name) = name.to_str(){
-                        self.context.new_location(
-                            name,
-                            line as i32,
-                            col as i32,
-                        )
+                        self.context.new_location(name, line as i32, col as i32)
                     } else {
                         Location::null()
                     }
-                } else{
-                    Location::null()
-                },
+                }
+                rustc_span::RealFileName::Remapped { local_path, virtual_name: _ } => {
+                    if let Some(name) = local_path.as_ref() {
+                        if let Some(name) = name.to_str() {
+                            self.context.new_location(name, line as i32, col as i32)
+                        } else {
+                            Location::null()
+                        }
+                    } else {
+                        Location::null()
+                    }
+                }
             },
             _ => Location::null(),
         };
diff --git a/src/declare.rs b/src/declare.rs
index 72cba9fbba95..db6edbab12d4 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -1,6 +1,6 @@
-use gccjit::{Function, FunctionType, GlobalKind, LValue, RValue, Type};
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 use gccjit::{FnAttribute, ToRValue};
+use gccjit::{Function, FunctionType, GlobalKind, LValue, RValue, Type};
 use rustc_codegen_ssa::traits::BaseTypeMethods;
 use rustc_middle::ty::Ty;
 use rustc_span::Symbol;
@@ -11,7 +11,13 @@ use crate::context::CodegenCx;
 use crate::intrinsic::llvm;
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
-    pub fn get_or_insert_global(&self, name: &str, ty: Type<'gcc>, is_tls: bool, link_section: Option<Symbol>) -> LValue<'gcc> {
+    pub fn get_or_insert_global(
+        &self,
+        name: &str,
+        ty: Type<'gcc>,
+        is_tls: bool,
+        link_section: Option<Symbol>,
+    ) -> LValue<'gcc> {
         if self.globals.borrow().contains_key(name) {
             let typ = self.globals.borrow()[name].get_type();
             let global = self.context.new_global(None, GlobalKind::Imported, typ, name);
@@ -22,8 +28,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
                 global.set_link_section(link_section.as_str());
             }
             global
-        }
-        else {
+        } else {
             self.declare_global(name, ty, GlobalKind::Exported, is_tls, link_section)
         }
     }
@@ -33,19 +38,37 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         self.context.new_global(None, GlobalKind::Internal, ty, &name)
     }
 
-    pub fn declare_global_with_linkage(&self, name: &str, ty: Type<'gcc>, linkage: GlobalKind) -> LValue<'gcc> {
+    pub fn declare_global_with_linkage(
+        &self,
+        name: &str,
+        ty: Type<'gcc>,
+        linkage: GlobalKind,
+    ) -> LValue<'gcc> {
         let global = self.context.new_global(None, linkage, ty, name);
         let global_address = global.get_address(None);
         self.globals.borrow_mut().insert(name.to_string(), global_address);
         global
     }
 
-    pub fn declare_func(&self, name: &str, return_type: Type<'gcc>, params: &[Type<'gcc>], variadic: bool) -> Function<'gcc> {
+    pub fn declare_func(
+        &self,
+        name: &str,
+        return_type: Type<'gcc>,
+        params: &[Type<'gcc>],
+        variadic: bool,
+    ) -> Function<'gcc> {
         self.linkage.set(FunctionType::Extern);
         declare_raw_fn(self, name, () /*llvm::CCallConv*/, return_type, params, variadic)
     }
 
-    pub fn declare_global(&self, name: &str, ty: Type<'gcc>, global_kind: GlobalKind, is_tls: bool, link_section: Option<Symbol>) -> LValue<'gcc> {
+    pub fn declare_global(
+        &self,
+        name: &str,
+        ty: Type<'gcc>,
+        global_kind: GlobalKind,
+        is_tls: bool,
+        link_section: Option<Symbol>,
+    ) -> LValue<'gcc> {
         let global = self.context.new_global(None, global_kind, ty, name);
         if is_tls {
             global.set_tls_model(self.tls_model);
@@ -65,13 +88,25 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         global
     }
 
-    pub fn declare_entry_fn(&self, name: &str, _fn_type: Type<'gcc>, callconv: () /*llvm::CCallConv*/) -> RValue<'gcc> {
+    pub fn declare_entry_fn(
+        &self,
+        name: &str,
+        _fn_type: Type<'gcc>,
+        callconv: (), /*llvm::CCallConv*/
+    ) -> RValue<'gcc> {
         // TODO(antoyo): use the fn_type parameter.
         let const_string = self.context.new_type::<u8>().make_pointer().make_pointer();
         let return_type = self.type_i32();
         let variadic = false;
         self.linkage.set(FunctionType::Exported);
-        let func = declare_raw_fn(self, name, callconv, return_type, &[self.type_i32(), const_string], variadic);
+        let func = declare_raw_fn(
+            self,
+            name,
+            callconv,
+            return_type,
+            &[self.type_i32(), const_string],
+            variadic,
+        );
         // NOTE: it is needed to set the current_func here as well, because get_fn() is not called
         // for the main function.
         *self.current_func.borrow_mut() = Some(func);
@@ -85,19 +120,32 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             arguments_type,
             is_c_variadic,
             on_stack_param_indices,
-            #[cfg(feature="master")]
+            #[cfg(feature = "master")]
             fn_attributes,
         } = fn_abi.gcc_type(self);
-        let func = declare_raw_fn(self, name, () /*fn_abi.llvm_cconv()*/, return_type, &arguments_type, is_c_variadic);
+        let func = declare_raw_fn(
+            self,
+            name,
+            (), /*fn_abi.llvm_cconv()*/
+            return_type,
+            &arguments_type,
+            is_c_variadic,
+        );
         self.on_stack_function_params.borrow_mut().insert(func, on_stack_param_indices);
-        #[cfg(feature="master")]
+        #[cfg(feature = "master")]
         for fn_attr in fn_attributes {
             func.add_attribute(fn_attr);
         }
         func
     }
 
-    pub fn define_global(&self, name: &str, ty: Type<'gcc>, is_tls: bool, link_section: Option<Symbol>) -> LValue<'gcc> {
+    pub fn define_global(
+        &self,
+        name: &str,
+        ty: Type<'gcc>,
+        is_tls: bool,
+        link_section: Option<Symbol>,
+    ) -> LValue<'gcc> {
         self.get_or_insert_global(name, ty, is_tls, link_section)
     }
 
@@ -111,64 +159,84 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 ///
 /// If there’s a value with the same name already declared, the function will
 /// update the declaration and return existing Value instead.
-fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*llvm::CallConv*/, return_type: Type<'gcc>, param_types: &[Type<'gcc>], variadic: bool) -> Function<'gcc> {
+fn declare_raw_fn<'gcc>(
+    cx: &CodegenCx<'gcc, '_>,
+    name: &str,
+    _callconv: (), /*llvm::CallConv*/
+    return_type: Type<'gcc>,
+    param_types: &[Type<'gcc>],
+    variadic: bool,
+) -> Function<'gcc> {
     if name.starts_with("llvm.") {
         let intrinsic = llvm::intrinsic(name, cx);
         cx.intrinsics.borrow_mut().insert(name.to_string(), intrinsic);
         return intrinsic;
     }
-    let func =
-        if cx.functions.borrow().contains_key(name) {
-            cx.functions.borrow()[name]
-        }
-        else {
-            let params: Vec<_> = param_types.into_iter().enumerate()
-                .map(|(index, param)| cx.context.new_parameter(None, *param, &format!("param{}", index))) // TODO(antoyo): set name.
+    let func = if cx.functions.borrow().contains_key(name) {
+        cx.functions.borrow()[name]
+    } else {
+        let params: Vec<_> = param_types
+            .into_iter()
+            .enumerate()
+            .map(|(index, param)| {
+                cx.context.new_parameter(None, *param, &format!("param{}", index))
+            }) // TODO(antoyo): set name.
+            .collect();
+        #[cfg(not(feature = "master"))]
+        let name = mangle_name(name);
+        let func =
+            cx.context.new_function(None, cx.linkage.get(), return_type, &params, &name, variadic);
+        cx.functions.borrow_mut().insert(name.to_string(), func);
+
+        #[cfg(feature = "master")]
+        if name == "rust_eh_personality" {
+            // NOTE: GCC will sometimes change the personality function set on a function from
+            // rust_eh_personality to __gcc_personality_v0 as an optimization.
+            // As such, we need to create a weak alias from __gcc_personality_v0 to
+            // rust_eh_personality in order to avoid a linker error.
+            // This needs to be weak in order to still allow using the standard
+            // __gcc_personality_v0 when the linking to it.
+            // Since aliases don't work (maybe because of a bug in LTO partitioning?), we
+            // create a wrapper function that calls rust_eh_personality.
+
+            let params: Vec<_> = param_types
+                .into_iter()
+                .enumerate()
+                .map(|(index, param)| {
+                    cx.context.new_parameter(None, *param, &format!("param{}", index))
+                }) // TODO(antoyo): set name.
                 .collect();
-            #[cfg(not(feature="master"))]
-            let name = mangle_name(name);
-            let func = cx.context.new_function(None, cx.linkage.get(), return_type, &params, &name, variadic);
-            cx.functions.borrow_mut().insert(name.to_string(), func);
+            let gcc_func = cx.context.new_function(
+                None,
+                FunctionType::Exported,
+                return_type,
+                &params,
+                "__gcc_personality_v0",
+                variadic,
+            );
 
-            #[cfg(feature="master")]
-            if name == "rust_eh_personality" {
-                // NOTE: GCC will sometimes change the personality function set on a function from
-                // rust_eh_personality to __gcc_personality_v0 as an optimization.
-                // As such, we need to create a weak alias from __gcc_personality_v0 to
-                // rust_eh_personality in order to avoid a linker error.
-                // This needs to be weak in order to still allow using the standard
-                // __gcc_personality_v0 when the linking to it.
-                // Since aliases don't work (maybe because of a bug in LTO partitioning?), we
-                // create a wrapper function that calls rust_eh_personality.
+            // We need a normal extern function for the crates that access rust_eh_personality
+            // without defining it, otherwise we'll get a compiler error.
+            //
+            // For the crate defining it, that needs to be a weak alias instead.
+            gcc_func.add_attribute(FnAttribute::Weak);
 
-                let params: Vec<_> = param_types.into_iter().enumerate()
-                    .map(|(index, param)| cx.context.new_parameter(None, *param, &format!("param{}", index))) // TODO(antoyo): set name.
-                    .collect();
-                let gcc_func = cx.context.new_function(None, FunctionType::Exported, return_type, &params, "__gcc_personality_v0", variadic);
-
-                // We need a normal extern function for the crates that access rust_eh_personality
-                // without defining it, otherwise we'll get a compiler error.
-                //
-                // For the crate defining it, that needs to be a weak alias instead.
-                gcc_func.add_attribute(FnAttribute::Weak);
-
-                let block = gcc_func.new_block("start");
-                let mut args = vec![];
-                for param in &params {
-                    args.push(param.to_rvalue());
-                }
-                let call = cx.context.new_call(None, func, &args);
-                if return_type == cx.type_void() {
-                    block.add_eval(None, call);
-                    block.end_with_void_return(None);
-                }
-                else {
-                    block.end_with_return(None, call);
-                }
+            let block = gcc_func.new_block("start");
+            let mut args = vec![];
+            for param in &params {
+                args.push(param.to_rvalue());
             }
+            let call = cx.context.new_call(None, func, &args);
+            if return_type == cx.type_void() {
+                block.add_eval(None, call);
+                block.end_with_void_return(None);
+            } else {
+                block.end_with_return(None, call);
+            }
+        }
 
-            func
-        };
+        func
+    };
 
     // TODO(antoyo): set function calling convention.
     // TODO(antoyo): set unnamed address.
@@ -183,15 +251,22 @@ fn declare_raw_fn<'gcc>(cx: &CodegenCx<'gcc, '_>, name: &str, _callconv: () /*ll
 // FIXME(antoyo): this is a hack because libgccjit currently only supports alpha, num and _.
 // Unsupported characters: `$`, `.` and `*`.
 // FIXME(antoyo): `*` might not be expected: https://github.com/rust-lang/rust/issues/116979#issuecomment-1840926865
-#[cfg(not(feature="master"))]
+#[cfg(not(feature = "master"))]
 fn mangle_name(name: &str) -> String {
-    name.replace(|char: char| {
-        if !char.is_alphanumeric() && char != '_' {
-            debug_assert!("$.*".contains(char), "Unsupported char in function name {}: {}", name, char);
-            true
-        }
-        else {
-            false
-        }
-    }, "_")
+    name.replace(
+        |char: char| {
+            if !char.is_alphanumeric() && char != '_' {
+                debug_assert!(
+                    "$.*".contains(char),
+                    "Unsupported char in function name {}: {}",
+                    name,
+                    char
+                );
+                true
+            } else {
+                false
+            }
+        },
+        "_",
+    )
 }
diff --git a/src/errors.rs b/src/errors.rs
index 79eb4406b8a3..62be9e9b379a 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -116,7 +116,7 @@ impl<G: EmissionGuarantee> IntoDiagnostic<'_, G> for TargetFeatureDisableOrEnabl
         let mut diag = DiagnosticBuilder::new(
             dcx,
             level,
-            fluent::codegen_gcc_target_feature_disable_or_enable
+            fluent::codegen_gcc_target_feature_disable_or_enable,
         );
         if let Some(span) = self.span {
             diag.span(span);
diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 4babe5bfb813..53877e8ff7fa 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -1,4 +1,4 @@
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 use gccjit::Context;
 use smallvec::{smallvec, SmallVec};
 
@@ -7,7 +7,10 @@ use rustc_middle::bug;
 use rustc_session::Session;
 use rustc_target::target_features::RUSTC_SPECIFIC_FEATURES;
 
-use crate::errors::{PossibleFeature, TargetFeatureDisableOrEnable, UnknownCTargetFeature, UnknownCTargetFeaturePrefix};
+use crate::errors::{
+    PossibleFeature, TargetFeatureDisableOrEnable, UnknownCTargetFeature,
+    UnknownCTargetFeaturePrefix,
+};
 
 /// The list of GCC features computed from CLI flags (`-Ctarget-cpu`, `-Ctarget-feature`,
 /// `--target` and similar).
@@ -44,7 +47,10 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
     // -Ctarget-features
     let supported_features = sess.target.supported_target_features();
     let mut featsmap = FxHashMap::default();
-    let feats = sess.opts.cg.target_feature
+    let feats = sess
+        .opts
+        .cg
+        .target_feature
         .split(',')
         .filter_map(|s| {
             let enable_disable = match s.chars().next() {
@@ -69,16 +75,14 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
                         None
                     }
                 });
-                let unknown_feature =
-                    if let Some(rust_feature) = rust_feature {
-                        UnknownCTargetFeature {
-                            feature,
-                            rust_feature: PossibleFeature::Some { rust_feature },
-                        }
+                let unknown_feature = if let Some(rust_feature) = rust_feature {
+                    UnknownCTargetFeature {
+                        feature,
+                        rust_feature: PossibleFeature::Some { rust_feature },
                     }
-                    else {
-                        UnknownCTargetFeature { feature, rust_feature: PossibleFeature::None }
-                    };
+                } else {
+                    UnknownCTargetFeature { feature, rust_feature: PossibleFeature::None }
+                };
                 sess.dcx().emit_warn(unknown_feature);
             }
 
@@ -95,18 +99,18 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
             // passing requests down to GCC. This means that all in-language
             // features also work on the command line instead of having two
             // different names when the GCC name and the Rust name differ.
-            Some(to_gcc_features(sess, feature)
-                .iter()
-                .flat_map(|feat| to_gcc_features(sess, feat).into_iter())
-                .map(|feature| {
-                    if enable_disable == '-' {
-                        format!("-{}", feature)
-                    }
-                    else {
-                        feature.to_string()
-                    }
-                })
-                .collect::<Vec<_>>(),
+            Some(
+                to_gcc_features(sess, feature)
+                    .iter()
+                    .flat_map(|feat| to_gcc_features(sess, feat).into_iter())
+                    .map(|feature| {
+                        if enable_disable == '-' {
+                            format!("-{}", feature)
+                        } else {
+                            feature.to_string()
+                        }
+                    })
+                    .collect::<Vec<_>>(),
             )
         })
         .flatten();
@@ -184,7 +188,10 @@ pub fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]>
 
 // Given a map from target_features to whether they are enabled or disabled,
 // ensure only valid combinations are allowed.
-pub fn check_tied_features(sess: &Session, features: &FxHashMap<&str, bool>) -> Option<&'static [&'static str]> {
+pub fn check_tied_features(
+    sess: &Session,
+    features: &FxHashMap<&str, bool>,
+) -> Option<&'static [&'static str]> {
     for tied in sess.target.tied_target_features() {
         // Tied features must be set to the same value, or not set at all
         let mut tied_iter = tied.iter();
@@ -199,7 +206,7 @@ pub fn check_tied_features(sess: &Session, features: &FxHashMap<&str, bool>) ->
 fn arch_to_gcc(name: &str) -> &str {
     match name {
         "M68020" => "68020",
-         _ => name,
+        _ => name,
     }
 }
 
@@ -208,15 +215,13 @@ fn handle_native(name: &str) -> &str {
         return arch_to_gcc(name);
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     {
         // Get the native arch.
         let context = Context::default();
-        context.get_target_info().arch().unwrap()
-            .to_str()
-            .unwrap()
+        context.get_target_info().arch().unwrap().to_str().unwrap()
     }
-    #[cfg(not(feature="master"))]
+    #[cfg(not(feature = "master"))]
     unimplemented!();
 }
 
diff --git a/src/int.rs b/src/int.rs
index fe38d89ff8c3..841bcf592e48 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -8,11 +8,18 @@ use gccjit::{BinaryOp, ComparisonOp, FunctionType, Location, RValue, ToRValue, T
 use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
 use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeMethods, BuilderMethods, OverflowOp};
 use rustc_middle::ty::{ParamEnv, Ty};
-use rustc_target::abi::{Endian, call::{ArgAbi, ArgAttributes, Conv, FnAbi, PassMode}};
+use rustc_target::abi::{
+    call::{ArgAbi, ArgAttributes, Conv, FnAbi, PassMode},
+    Endian,
+};
 use rustc_target::spec;
 
 use crate::builder::ToGccComp;
-use crate::{builder::Builder, common::{SignType, TypeReflection}, context::CodegenCx};
+use crate::{
+    builder::Builder,
+    common::{SignType, TypeReflection},
+    context::CodegenCx,
+};
 
 impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     pub fn gcc_urem(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -29,19 +36,24 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let typ = a.get_type();
         if self.is_native_int_type_or_bool(typ) {
             let operation =
-                if typ.is_bool() {
-                    UnaryOp::LogicalNegate
-                }
-                else {
-                    UnaryOp::BitwiseNegate
-                };
-            self.cx.context.new_unary_op(self.loc, operation, typ, a)
-        }
-        else {
+                if typ.is_bool() { UnaryOp::LogicalNegate } else { UnaryOp::BitwiseNegate };
+            self.cx.context.new_unary_op(self.location, operation, typ, a)
+        } else {
             let element_type = typ.dyncast_array().expect("element type");
-            self.from_low_high_rvalues(typ,
-                self.cx.context.new_unary_op(self.loc, UnaryOp::BitwiseNegate, element_type, self.low(a)),
-                self.cx.context.new_unary_op(self.loc, UnaryOp::BitwiseNegate, element_type, self.high(a)),
+            self.from_low_high_rvalues(
+                typ,
+                self.cx.context.new_unary_op(
+                    self.location,
+                    UnaryOp::BitwiseNegate,
+                    element_type,
+                    self.low(a),
+                ),
+                self.cx.context.new_unary_op(
+                    self.location,
+                    UnaryOp::BitwiseNegate,
+                    element_type,
+                    self.high(a),
+                ),
             )
         }
     }
@@ -49,15 +61,14 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     pub fn gcc_neg(&self, a: RValue<'gcc>) -> RValue<'gcc> {
         let a_type = a.get_type();
         if self.is_native_int_type(a_type) || a_type.is_vector() {
-            self.cx.context.new_unary_op(self.loc, UnaryOp::Minus, a.get_type(), a)
-        }
-        else {
+            self.cx.context.new_unary_op(self.location, UnaryOp::Minus, a.get_type(), a)
+        } else {
             self.gcc_add(self.gcc_not(a), self.gcc_int(a_type, 1))
         }
     }
 
     pub fn gcc_and(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
-        self.cx.bitwise_operation(BinaryOp::BitwiseAnd, a, b, self.loc)
+        self.cx.bitwise_operation(BinaryOp::BitwiseAnd, a, b, self.location)
     }
 
     pub fn gcc_lshr(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -69,20 +80,16 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             // FIXME(antoyo): remove the casts when libgccjit can shift an unsigned number by a signed number.
             // TODO(antoyo): cast to unsigned to do a logical shift if that does not work.
             if a_type.is_signed(self) != b_type.is_signed(self) {
-                let b = self.context.new_cast(self.loc, b, a_type);
+                let b = self.context.new_cast(self.location, b, a_type);
+                a >> b
+            } else {
                 a >> b
             }
-            else {
-                a >> b
-            }
-        }
-        else if a_type.is_vector() && a_type.is_vector() {
+        } else if a_type.is_vector() && a_type.is_vector() {
             a >> b
-        }
-        else if a_native && !b_native {
+        } else if a_native && !b_native {
             self.gcc_lshr(a, self.gcc_int_cast(b, a_type))
-        }
-        else {
+        } else {
             // NOTE: we cannot use the lshr builtin because it's calling hi() (to get the most
             // significant half of the number) which uses lshr.
 
@@ -95,46 +102,38 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let b0_block = func.new_block("b0");
             let actual_else_block = func.new_block("actual_else");
 
-            let result = func.new_local(self.loc, a_type, "shiftResult");
+            let result = func.new_local(self.location, a_type, "shiftResult");
 
             let sixty_four = self.gcc_int(native_int_type, 64);
             let sixty_three = self.gcc_int(native_int_type, 63);
             let zero = self.gcc_zero(native_int_type);
             let b = self.gcc_int_cast(b, native_int_type);
             let condition = self.gcc_icmp(IntPredicate::IntNE, self.gcc_and(b, sixty_four), zero);
-            self.llbb().end_with_conditional(self.loc, condition, then_block, else_block);
+            self.llbb().end_with_conditional(self.location, condition, then_block, else_block);
 
             let shift_value = self.gcc_sub(b, sixty_four);
             let high = self.high(a);
-            let sign =
-                if a_type.is_signed(self) {
-                    high >> sixty_three
-                }
-                else {
-                    zero
-                };
+            let sign = if a_type.is_signed(self) { high >> sixty_three } else { zero };
             let array_value = self.from_low_high_rvalues(a_type, high >> shift_value, sign);
-            then_block.add_assignment(self.loc, result, array_value);
-            then_block.end_with_jump(self.loc, after_block);
+            then_block.add_assignment(self.location, result, array_value);
+            then_block.end_with_jump(self.location, after_block);
 
             let condition = self.gcc_icmp(IntPredicate::IntEQ, b, zero);
-            else_block.end_with_conditional(self.loc, condition, b0_block, actual_else_block);
+            else_block.end_with_conditional(self.location, condition, b0_block, actual_else_block);
 
-            b0_block.add_assignment(self.loc, result, a);
-            b0_block.end_with_jump(self.loc, after_block);
+            b0_block.add_assignment(self.location, result, a);
+            b0_block.end_with_jump(self.location, after_block);
 
             let shift_value = self.gcc_sub(sixty_four, b);
             // NOTE: cast low to its unsigned type in order to perform a logical right shift.
             let unsigned_type = native_int_type.to_unsigned(&self.cx);
-            let casted_low = self.context.new_cast(self.loc, self.low(a), unsigned_type);
-            let shifted_low = casted_low >> self.context.new_cast(self.loc, b, unsigned_type);
-            let shifted_low = self.context.new_cast(self.loc, shifted_low, native_int_type);
-            let array_value = self.from_low_high_rvalues(a_type,
-                (high << shift_value) | shifted_low,
-                high >> b,
-            );
-            actual_else_block.add_assignment(self.loc, result, array_value);
-            actual_else_block.end_with_jump(self.loc, after_block);
+            let casted_low = self.context.new_cast(self.location, self.low(a), unsigned_type);
+            let shifted_low = casted_low >> self.context.new_cast(self.location, b, unsigned_type);
+            let shifted_low = self.context.new_cast(self.location, shifted_low, native_int_type);
+            let array_value =
+                self.from_low_high_rvalues(a_type, (high << shift_value) | shifted_low, high >> b);
+            actual_else_block.add_assignment(self.location, result, array_value);
+            actual_else_block.end_with_jump(self.location, after_block);
 
             // NOTE: since jumps were added in a place rustc does not expect, the current block in the
             // state need to be updated.
@@ -144,38 +143,49 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         }
     }
 
-    fn additive_operation(&self, operation: BinaryOp, a: RValue<'gcc>, mut b: RValue<'gcc>) -> RValue<'gcc> {
+    fn additive_operation(
+        &self,
+        operation: BinaryOp,
+        a: RValue<'gcc>,
+        mut b: RValue<'gcc>,
+    ) -> RValue<'gcc> {
         let a_type = a.get_type();
         let b_type = b.get_type();
-        if (self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type)) || (a_type.is_vector() && b_type.is_vector()) {
+        if (self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type))
+            || (a_type.is_vector() && b_type.is_vector())
+        {
             if a_type != b_type {
                 if a_type.is_vector() {
                     // Vector types need to be bitcast.
                     // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
-                    b = self.context.new_bitcast(self.loc, b, a.get_type());
-                }
-                else {
-                    b = self.context.new_cast(self.loc, b, a.get_type());
+                    b = self.context.new_bitcast(self.location, b, a.get_type());
+                } else {
+                    b = self.context.new_cast(self.location, b, a.get_type());
                 }
             }
-            self.context.new_binary_op(self.loc, operation, a_type, a, b)
-        }
-        else {
+            self.context.new_binary_op(self.location, operation, a_type, a, b)
+        } else {
             debug_assert!(a_type.dyncast_array().is_some());
             debug_assert!(b_type.dyncast_array().is_some());
             let signed = a_type.is_compatible_with(self.i128_type);
-            let func_name =
-                match (operation, signed) {
-                    (BinaryOp::Plus, true) => "__rust_i128_add",
-                    (BinaryOp::Plus, false) => "__rust_u128_add",
-                    (BinaryOp::Minus, true) => "__rust_i128_sub",
-                    (BinaryOp::Minus, false) => "__rust_u128_sub",
-                    _ => unreachable!("unexpected additive operation {:?}", operation),
-                };
-            let param_a = self.context.new_parameter(self.loc, a_type, "a");
-            let param_b = self.context.new_parameter(self.loc, b_type, "b");
-            let func = self.context.new_function(self.loc, FunctionType::Extern, a_type, &[param_a, param_b], func_name, false);
-            self.context.new_call(self.loc, func, &[a, b])
+            let func_name = match (operation, signed) {
+                (BinaryOp::Plus, true) => "__rust_i128_add",
+                (BinaryOp::Plus, false) => "__rust_u128_add",
+                (BinaryOp::Minus, true) => "__rust_i128_sub",
+                (BinaryOp::Minus, false) => "__rust_u128_sub",
+                _ => unreachable!("unexpected additive operation {:?}", operation),
+            };
+            let param_a = self.context.new_parameter(self.location, a_type, "a");
+            let param_b = self.context.new_parameter(self.location, b_type, "b");
+            let func = self.context.new_function(
+                self.location,
+                FunctionType::Extern,
+                a_type,
+                &[param_a, param_b],
+                func_name,
+                false,
+            );
+            self.context.new_call(self.location, func, &[a, b])
         }
     }
 
@@ -191,27 +201,36 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         self.additive_operation(BinaryOp::Minus, a, b)
     }
 
-    fn multiplicative_operation(&self, operation: BinaryOp, operation_name: &str, signed: bool, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+    fn multiplicative_operation(
+        &self,
+        operation: BinaryOp,
+        operation_name: &str,
+        signed: bool,
+        a: RValue<'gcc>,
+        b: RValue<'gcc>,
+    ) -> RValue<'gcc> {
         let a_type = a.get_type();
         let b_type = b.get_type();
-        if (self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type)) || (a_type.is_vector() && b_type.is_vector()) {
-            self.context.new_binary_op(self.loc, operation, a_type, a, b)
-        }
-        else {
+        if (self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type))
+            || (a_type.is_vector() && b_type.is_vector())
+        {
+            self.context.new_binary_op(self.location, operation, a_type, a, b)
+        } else {
             debug_assert!(a_type.dyncast_array().is_some());
             debug_assert!(b_type.dyncast_array().is_some());
-            let sign =
-                if signed {
-                    ""
-                }
-                else {
-                    "u"
-                };
+            let sign = if signed { "" } else { "u" };
             let func_name = format!("__{}{}ti3", sign, operation_name);
-            let param_a = self.context.new_parameter(self.loc, a_type, "a");
-            let param_b = self.context.new_parameter(self.loc, b_type, "b");
-            let func = self.context.new_function(self.loc, FunctionType::Extern, a_type, &[param_a, param_b], func_name, false);
-            self.context.new_call(self.loc, func, &[a, b])
+            let param_a = self.context.new_parameter(self.location, a_type, "a");
+            let param_b = self.context.new_parameter(self.location, b_type, "b");
+            let func = self.context.new_function(
+                self.location,
+                FunctionType::Extern,
+                a_type,
+                &[param_a, param_b],
+                func_name,
+                false,
+            );
+            self.context.new_call(self.location, func, &[a, b])
         }
     }
 
@@ -227,137 +246,133 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         self.multiplicative_operation(BinaryOp::Divide, "div", false, a, b)
     }
 
-    pub fn gcc_checked_binop(&self, oop: OverflowOp, typ: Ty<'_>, lhs: <Self as BackendTypes>::Value, rhs: <Self as BackendTypes>::Value) -> (<Self as BackendTypes>::Value, <Self as BackendTypes>::Value) {
+    pub fn gcc_checked_binop(
+        &self,
+        oop: OverflowOp,
+        typ: Ty<'_>,
+        lhs: <Self as BackendTypes>::Value,
+        rhs: <Self as BackendTypes>::Value,
+    ) -> (<Self as BackendTypes>::Value, <Self as BackendTypes>::Value) {
         use rustc_middle::ty::{Int, IntTy::*, Uint, UintTy::*};
 
-        let new_kind =
-            match typ.kind() {
-                Int(t @ Isize) => Int(t.normalize(self.tcx.sess.target.pointer_width)),
-                Uint(t @ Usize) => Uint(t.normalize(self.tcx.sess.target.pointer_width)),
-                t @ (Uint(_) | Int(_)) => t.clone(),
-                _ => panic!("tried to get overflow intrinsic for op applied to non-int type"),
-            };
+        let new_kind = match typ.kind() {
+            Int(t @ Isize) => Int(t.normalize(self.tcx.sess.target.pointer_width)),
+            Uint(t @ Usize) => Uint(t.normalize(self.tcx.sess.target.pointer_width)),
+            t @ (Uint(_) | Int(_)) => t.clone(),
+            _ => panic!("tried to get overflow intrinsic for op applied to non-int type"),
+        };
 
         // TODO(antoyo): remove duplication with intrinsic?
-        let name =
-            if self.is_native_int_type(lhs.get_type()) {
-                match oop {
-                    OverflowOp::Add =>
-                        match new_kind {
-                            Int(I8) => "__builtin_add_overflow",
-                            Int(I16) => "__builtin_add_overflow",
-                            Int(I32) => "__builtin_sadd_overflow",
-                            Int(I64) => "__builtin_saddll_overflow",
-                            Int(I128) => "__builtin_add_overflow",
+        let name = if self.is_native_int_type(lhs.get_type()) {
+            match oop {
+                OverflowOp::Add => match new_kind {
+                    Int(I8) => "__builtin_add_overflow",
+                    Int(I16) => "__builtin_add_overflow",
+                    Int(I32) => "__builtin_sadd_overflow",
+                    Int(I64) => "__builtin_saddll_overflow",
+                    Int(I128) => "__builtin_add_overflow",
 
-                            Uint(U8) => "__builtin_add_overflow",
-                            Uint(U16) => "__builtin_add_overflow",
-                            Uint(U32) => "__builtin_uadd_overflow",
-                            Uint(U64) => "__builtin_uaddll_overflow",
-                            Uint(U128) => "__builtin_add_overflow",
+                    Uint(U8) => "__builtin_add_overflow",
+                    Uint(U16) => "__builtin_add_overflow",
+                    Uint(U32) => "__builtin_uadd_overflow",
+                    Uint(U64) => "__builtin_uaddll_overflow",
+                    Uint(U128) => "__builtin_add_overflow",
 
-                            _ => unreachable!(),
-                        },
-                    OverflowOp::Sub =>
-                        match new_kind {
-                            Int(I8) => "__builtin_sub_overflow",
-                            Int(I16) => "__builtin_sub_overflow",
-                            Int(I32) => "__builtin_ssub_overflow",
-                            Int(I64) => "__builtin_ssubll_overflow",
-                            Int(I128) => "__builtin_sub_overflow",
+                    _ => unreachable!(),
+                },
+                OverflowOp::Sub => match new_kind {
+                    Int(I8) => "__builtin_sub_overflow",
+                    Int(I16) => "__builtin_sub_overflow",
+                    Int(I32) => "__builtin_ssub_overflow",
+                    Int(I64) => "__builtin_ssubll_overflow",
+                    Int(I128) => "__builtin_sub_overflow",
 
-                            Uint(U8) => "__builtin_sub_overflow",
-                            Uint(U16) => "__builtin_sub_overflow",
-                            Uint(U32) => "__builtin_usub_overflow",
-                            Uint(U64) => "__builtin_usubll_overflow",
-                            Uint(U128) => "__builtin_sub_overflow",
+                    Uint(U8) => "__builtin_sub_overflow",
+                    Uint(U16) => "__builtin_sub_overflow",
+                    Uint(U32) => "__builtin_usub_overflow",
+                    Uint(U64) => "__builtin_usubll_overflow",
+                    Uint(U128) => "__builtin_sub_overflow",
 
-                            _ => unreachable!(),
-                        },
-                    OverflowOp::Mul =>
-                        match new_kind {
-                            Int(I8) => "__builtin_mul_overflow",
-                            Int(I16) => "__builtin_mul_overflow",
-                            Int(I32) => "__builtin_smul_overflow",
-                            Int(I64) => "__builtin_smulll_overflow",
-                            Int(I128) => "__builtin_mul_overflow",
+                    _ => unreachable!(),
+                },
+                OverflowOp::Mul => match new_kind {
+                    Int(I8) => "__builtin_mul_overflow",
+                    Int(I16) => "__builtin_mul_overflow",
+                    Int(I32) => "__builtin_smul_overflow",
+                    Int(I64) => "__builtin_smulll_overflow",
+                    Int(I128) => "__builtin_mul_overflow",
 
-                            Uint(U8) => "__builtin_mul_overflow",
-                            Uint(U16) => "__builtin_mul_overflow",
-                            Uint(U32) => "__builtin_umul_overflow",
-                            Uint(U64) => "__builtin_umulll_overflow",
-                            Uint(U128) => "__builtin_mul_overflow",
+                    Uint(U8) => "__builtin_mul_overflow",
+                    Uint(U16) => "__builtin_mul_overflow",
+                    Uint(U32) => "__builtin_umul_overflow",
+                    Uint(U64) => "__builtin_umulll_overflow",
+                    Uint(U128) => "__builtin_mul_overflow",
 
-                            _ => unreachable!(),
-                        },
-                }
+                    _ => unreachable!(),
+                },
             }
-            else {
-                match new_kind {
-                    Int(I128) | Uint(U128) => {
-                        let func_name =
-                            match oop {
-                                OverflowOp::Add =>
-                                    match new_kind {
-                                        Int(I128) => "__rust_i128_addo",
-                                        Uint(U128) => "__rust_u128_addo",
-                                        _ => unreachable!(),
-                                    },
-                                OverflowOp::Sub =>
-                                    match new_kind {
-                                        Int(I128) => "__rust_i128_subo",
-                                        Uint(U128) => "__rust_u128_subo",
-                                        _ => unreachable!(),
-                                    },
-                                OverflowOp::Mul =>
-                                    match new_kind {
-                                        Int(I128) => "__rust_i128_mulo", // TODO(antoyo): use __muloti4d instead?
-                                        Uint(U128) => "__rust_u128_mulo",
-                                        _ => unreachable!(),
-                                    },
-                            };
-                        return self.operation_with_overflow(func_name, lhs, rhs);
-                    },
-                    _ => {
-                        match oop {
-                            OverflowOp::Mul =>
-                                match new_kind {
-                                    Int(I32) => "__mulosi4",
-                                    Int(I64) => "__mulodi4",
-                                    _ => unreachable!(),
-                                },
-                            _ => unimplemented!("overflow operation for {:?}", new_kind),
-                        }
-                    }
+        } else {
+            match new_kind {
+                Int(I128) | Uint(U128) => {
+                    let func_name = match oop {
+                        OverflowOp::Add => match new_kind {
+                            Int(I128) => "__rust_i128_addo",
+                            Uint(U128) => "__rust_u128_addo",
+                            _ => unreachable!(),
+                        },
+                        OverflowOp::Sub => match new_kind {
+                            Int(I128) => "__rust_i128_subo",
+                            Uint(U128) => "__rust_u128_subo",
+                            _ => unreachable!(),
+                        },
+                        OverflowOp::Mul => match new_kind {
+                            Int(I128) => "__rust_i128_mulo", // TODO(antoyo): use __muloti4d instead?
+                            Uint(U128) => "__rust_u128_mulo",
+                            _ => unreachable!(),
+                        },
+                    };
+                    return self.operation_with_overflow(func_name, lhs, rhs);
                 }
-            };
+                _ => match oop {
+                    OverflowOp::Mul => match new_kind {
+                        Int(I32) => "__mulosi4",
+                        Int(I64) => "__mulodi4",
+                        _ => unreachable!(),
+                    },
+                    _ => unimplemented!("overflow operation for {:?}", new_kind),
+                },
+            }
+        };
 
         let intrinsic = self.context.get_builtin_function(&name);
-        let res = self.current_func()
+        let res = self
+            .current_func()
             // TODO(antoyo): is it correct to use rhs type instead of the parameter typ?
-            .new_local(self.loc, rhs.get_type(), "binopResult")
-            .get_address(self.loc);
+            .new_local(self.location, rhs.get_type(), "binopResult")
+            .get_address(self.location);
         let overflow = self.overflow_call(intrinsic, &[lhs, rhs, res], None);
-        (res.dereference(self.loc).to_rvalue(), overflow)
+        (res.dereference(self.location).to_rvalue(), overflow)
     }
 
-    pub fn operation_with_overflow(&self, func_name: &str, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
+    pub fn operation_with_overflow(
+        &self,
+        func_name: &str,
+        lhs: RValue<'gcc>,
+        rhs: RValue<'gcc>,
+    ) -> (RValue<'gcc>, RValue<'gcc>) {
         let a_type = lhs.get_type();
         let b_type = rhs.get_type();
         debug_assert!(a_type.dyncast_array().is_some());
         debug_assert!(b_type.dyncast_array().is_some());
-        let param_a = self.context.new_parameter(self.loc, a_type, "a");
-        let param_b = self.context.new_parameter(self.loc, b_type, "b");
-        let result_field = self.context.new_field(self.loc, a_type, "result");
-        let overflow_field = self.context.new_field(self.loc, self.bool_type, "overflow");
+        let param_a = self.context.new_parameter(self.location, a_type, "a");
+        let param_b = self.context.new_parameter(self.location, b_type, "b");
+        let result_field = self.context.new_field(self.location, a_type, "result");
+        let overflow_field = self.context.new_field(self.location, self.bool_type, "overflow");
 
         let ret_ty = Ty::new_tup(self.tcx, &[self.tcx.types.i128, self.tcx.types.bool]);
         let layout = self.tcx.layout_of(ParamEnv::reveal_all().and(ret_ty)).unwrap();
 
-        let arg_abi = ArgAbi {
-            layout,
-            mode: PassMode::Direct(ArgAttributes::new()),
-        };
+        let arg_abi = ArgAbi { layout, mode: PassMode::Direct(ArgAttributes::new()) };
         let mut fn_abi = FnAbi {
             args: vec![arg_abi.clone(), arg_abi.clone()].into_boxed_slice(),
             ret: arg_abi,
@@ -366,38 +381,66 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             conv: Conv::C,
             can_unwind: false,
         };
-        fn_abi.adjust_for_foreign_abi(self.cx, spec::abi::Abi::C {
-            unwind: false,
-        }).unwrap();
+        fn_abi.adjust_for_foreign_abi(self.cx, spec::abi::Abi::C { unwind: false }).unwrap();
 
         let indirect = matches!(fn_abi.ret.mode, PassMode::Indirect { .. });
 
-        let return_type = self.context.new_struct_type(self.loc, "result_overflow", &[result_field, overflow_field]);
-        let result =
-            if indirect {
-                let return_value = self.current_func().new_local(self.loc, return_type.as_type(), "return_value");
-                let return_param_type = return_type.as_type().make_pointer();
-                let return_param = self.context.new_parameter(self.loc, return_param_type, "return_value");
-                let func = self.context.new_function(self.loc, FunctionType::Extern, self.type_void(), &[return_param, param_a, param_b], func_name, false);
-                self.llbb().add_eval(self.loc, self.context.new_call(self.loc, func, &[return_value.get_address(self.loc), lhs, rhs]));
-                return_value.to_rvalue()
-            }
-            else {
-                let func = self.context.new_function(self.loc, FunctionType::Extern, return_type.as_type(), &[param_a, param_b], func_name, false);
-                self.context.new_call(self.loc, func, &[lhs, rhs])
-            };
-        let overflow = result.access_field(self.loc, overflow_field);
-        let int_result = result.access_field(self.loc, result_field);
+        let return_type = self.context.new_struct_type(
+            self.location,
+            "result_overflow",
+            &[result_field, overflow_field],
+        );
+        let result = if indirect {
+            let return_value =
+                self.current_func().new_local(self.location, return_type.as_type(), "return_value");
+            let return_param_type = return_type.as_type().make_pointer();
+            let return_param =
+                self.context.new_parameter(self.location, return_param_type, "return_value");
+            let func = self.context.new_function(
+                self.location,
+                FunctionType::Extern,
+                self.type_void(),
+                &[return_param, param_a, param_b],
+                func_name,
+                false,
+            );
+            self.llbb().add_eval(
+                self.location,
+                self.context.new_call(
+                    self.location,
+                    func,
+                    &[return_value.get_address(self.location), lhs, rhs],
+                ),
+            );
+            return_value.to_rvalue()
+        } else {
+            let func = self.context.new_function(
+                self.location,
+                FunctionType::Extern,
+                return_type.as_type(),
+                &[param_a, param_b],
+                func_name,
+                false,
+            );
+            self.context.new_call(self.location, func, &[lhs, rhs])
+        };
+        let overflow = result.access_field(self.location, overflow_field);
+        let int_result = result.access_field(self.location, result_field);
         (int_result, overflow)
     }
 
-    pub fn gcc_icmp(&mut self, op: IntPredicate, mut lhs: RValue<'gcc>, mut rhs: RValue<'gcc>) -> RValue<'gcc> {
+    pub fn gcc_icmp(
+        &mut self,
+        op: IntPredicate,
+        mut lhs: RValue<'gcc>,
+        mut rhs: RValue<'gcc>,
+    ) -> RValue<'gcc> {
         let a_type = lhs.get_type();
         let b_type = rhs.get_type();
         if self.is_non_native_int_type(a_type) || self.is_non_native_int_type(b_type) {
             // This algorithm is based on compiler-rt's __cmpti2:
             // https://github.com/llvm-mirror/compiler-rt/blob/f0745e8476f069296a7c71accedd061dce4cdf79/lib/builtins/cmpti2.c#L21
-            let result = self.current_func().new_local(self.loc, self.int_type, "icmp_result");
+            let result = self.current_func().new_local(self.location, self.int_type, "icmp_result");
             let block1 = self.current_func().new_block("block1");
             let block2 = self.current_func().new_block("block2");
             let block3 = self.current_func().new_block("block3");
@@ -413,92 +456,149 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             // the sign is only on high).
             let unsigned_type = native_int_type.to_unsigned(&self.cx);
 
-            let lhs_low = self.context.new_cast(self.loc, self.low(lhs), unsigned_type);
-            let rhs_low = self.context.new_cast(self.loc, self.low(rhs), unsigned_type);
+            let lhs_low = self.context.new_cast(self.location, self.low(lhs), unsigned_type);
+            let rhs_low = self.context.new_cast(self.location, self.low(rhs), unsigned_type);
 
-            let condition = self.context.new_comparison(self.loc, ComparisonOp::LessThan, self.high(lhs), self.high(rhs));
-            self.llbb().end_with_conditional(self.loc, condition, block1, block2);
+            let condition = self.context.new_comparison(
+                self.location,
+                ComparisonOp::LessThan,
+                self.high(lhs),
+                self.high(rhs),
+            );
+            self.llbb().end_with_conditional(self.location, condition, block1, block2);
 
-            block1.add_assignment(self.loc, result, self.context.new_rvalue_zero(self.int_type));
-            block1.end_with_jump(self.loc, after);
+            block1.add_assignment(
+                self.location,
+                result,
+                self.context.new_rvalue_zero(self.int_type),
+            );
+            block1.end_with_jump(self.location, after);
 
-            let condition = self.context.new_comparison(self.loc, ComparisonOp::GreaterThan, self.high(lhs), self.high(rhs));
-            block2.end_with_conditional(self.loc, condition, block3, block4);
+            let condition = self.context.new_comparison(
+                self.location,
+                ComparisonOp::GreaterThan,
+                self.high(lhs),
+                self.high(rhs),
+            );
+            block2.end_with_conditional(self.location, condition, block3, block4);
 
-            block3.add_assignment(self.loc, result, self.context.new_rvalue_from_int(self.int_type, 2));
-            block3.end_with_jump(self.loc, after);
+            block3.add_assignment(
+                self.location,
+                result,
+                self.context.new_rvalue_from_int(self.int_type, 2),
+            );
+            block3.end_with_jump(self.location, after);
 
-            let condition = self.context.new_comparison(self.loc, ComparisonOp::LessThan, lhs_low, rhs_low);
-            block4.end_with_conditional(self.loc, condition, block5, block6);
+            let condition = self.context.new_comparison(
+                self.location,
+                ComparisonOp::LessThan,
+                lhs_low,
+                rhs_low,
+            );
+            block4.end_with_conditional(self.location, condition, block5, block6);
 
-            block5.add_assignment(self.loc, result, self.context.new_rvalue_zero(self.int_type));
-            block5.end_with_jump(self.loc, after);
+            block5.add_assignment(
+                self.location,
+                result,
+                self.context.new_rvalue_zero(self.int_type),
+            );
+            block5.end_with_jump(self.location, after);
 
-            let condition = self.context.new_comparison(self.loc, ComparisonOp::GreaterThan, lhs_low, rhs_low);
-            block6.end_with_conditional(self.loc, condition, block7, block8);
+            let condition = self.context.new_comparison(
+                self.location,
+                ComparisonOp::GreaterThan,
+                lhs_low,
+                rhs_low,
+            );
+            block6.end_with_conditional(self.location, condition, block7, block8);
 
-            block7.add_assignment(self.loc, result, self.context.new_rvalue_from_int(self.int_type, 2));
-            block7.end_with_jump(self.loc, after);
+            block7.add_assignment(
+                self.location,
+                result,
+                self.context.new_rvalue_from_int(self.int_type, 2),
+            );
+            block7.end_with_jump(self.location, after);
 
-            block8.add_assignment(self.loc, result, self.context.new_rvalue_one(self.int_type));
-            block8.end_with_jump(self.loc, after);
+            block8.add_assignment(
+                self.location,
+                result,
+                self.context.new_rvalue_one(self.int_type),
+            );
+            block8.end_with_jump(self.location, after);
 
             // NOTE: since jumps were added in a place rustc does not expect, the current block in the
             // state need to be updated.
             self.switch_to_block(after);
 
             let cmp = result.to_rvalue();
-            let (op, limit) =
-                match op {
-                    IntPredicate::IntEQ => {
-                        return self.context.new_comparison(self.loc, ComparisonOp::Equals, cmp, self.context.new_rvalue_one(self.int_type));
-                    },
-                    IntPredicate::IntNE => {
-                        return self.context.new_comparison(self.loc, ComparisonOp::NotEquals, cmp, self.context.new_rvalue_one(self.int_type));
-                    },
-                    // TODO(antoyo): cast to u128 for unsigned comparison. See below.
-                    IntPredicate::IntUGT => (ComparisonOp::Equals, 2),
-                    IntPredicate::IntUGE => (ComparisonOp::GreaterThanEquals, 1),
-                    IntPredicate::IntULT => (ComparisonOp::Equals, 0),
-                    IntPredicate::IntULE => (ComparisonOp::LessThanEquals, 1),
-                    IntPredicate::IntSGT => (ComparisonOp::Equals, 2),
-                    IntPredicate::IntSGE => (ComparisonOp::GreaterThanEquals, 1),
-                    IntPredicate::IntSLT => (ComparisonOp::Equals, 0),
-                    IntPredicate::IntSLE => (ComparisonOp::LessThanEquals, 1),
-                };
-            self.context.new_comparison(self.loc, op, cmp, self.context.new_rvalue_from_int(self.int_type, limit))
-        }
-        else if a_type.get_pointee().is_some() && b_type.get_pointee().is_some() {
+            let (op, limit) = match op {
+                IntPredicate::IntEQ => {
+                    return self.context.new_comparison(
+                        self.location,
+                        ComparisonOp::Equals,
+                        cmp,
+                        self.context.new_rvalue_one(self.int_type),
+                    );
+                }
+                IntPredicate::IntNE => {
+                    return self.context.new_comparison(
+                        self.location,
+                        ComparisonOp::NotEquals,
+                        cmp,
+                        self.context.new_rvalue_one(self.int_type),
+                    );
+                }
+                // TODO(antoyo): cast to u128 for unsigned comparison. See below.
+                IntPredicate::IntUGT => (ComparisonOp::Equals, 2),
+                IntPredicate::IntUGE => (ComparisonOp::GreaterThanEquals, 1),
+                IntPredicate::IntULT => (ComparisonOp::Equals, 0),
+                IntPredicate::IntULE => (ComparisonOp::LessThanEquals, 1),
+                IntPredicate::IntSGT => (ComparisonOp::Equals, 2),
+                IntPredicate::IntSGE => (ComparisonOp::GreaterThanEquals, 1),
+                IntPredicate::IntSLT => (ComparisonOp::Equals, 0),
+                IntPredicate::IntSLE => (ComparisonOp::LessThanEquals, 1),
+            };
+            self.context.new_comparison(
+                self.location,
+                op,
+                cmp,
+                self.context.new_rvalue_from_int(self.int_type, limit),
+            )
+        } else if a_type.get_pointee().is_some() && b_type.get_pointee().is_some() {
             // NOTE: gcc cannot compare pointers to different objects, but rustc does that, so cast them to usize.
-            lhs = self.context.new_bitcast(self.loc, lhs, self.usize_type);
-            rhs = self.context.new_bitcast(self.loc, rhs, self.usize_type);
-            self.context.new_comparison(self.loc, op.to_gcc_comparison(), lhs, rhs)
-        }
-        else {
+            lhs = self.context.new_bitcast(self.location, lhs, self.usize_type);
+            rhs = self.context.new_bitcast(self.location, rhs, self.usize_type);
+            self.context.new_comparison(self.location, op.to_gcc_comparison(), lhs, rhs)
+        } else {
             if a_type != b_type {
                 // NOTE: because libgccjit cannot compare function pointers.
-                if a_type.dyncast_function_ptr_type().is_some() && b_type.dyncast_function_ptr_type().is_some() {
-                    lhs = self.context.new_cast(self.loc, lhs, self.usize_type.make_pointer());
-                    rhs = self.context.new_cast(self.loc, rhs, self.usize_type.make_pointer());
+                if a_type.dyncast_function_ptr_type().is_some()
+                    && b_type.dyncast_function_ptr_type().is_some()
+                {
+                    lhs = self.context.new_cast(self.location, lhs, self.usize_type.make_pointer());
+                    rhs = self.context.new_cast(self.location, rhs, self.usize_type.make_pointer());
                 }
                 // NOTE: hack because we try to cast a vector type to the same vector type.
                 else if format!("{:?}", a_type) != format!("{:?}", b_type) {
-                    rhs = self.context.new_cast(self.loc, rhs, a_type);
+                    rhs = self.context.new_cast(self.location, rhs, a_type);
                 }
             }
             match op {
-                IntPredicate::IntUGT | IntPredicate::IntUGE | IntPredicate::IntULT | IntPredicate::IntULE => {
+                IntPredicate::IntUGT
+                | IntPredicate::IntUGE
+                | IntPredicate::IntULT
+                | IntPredicate::IntULE => {
                     if !a_type.is_vector() {
                         let unsigned_type = a_type.to_unsigned(&self.cx);
-                        lhs = self.context.new_cast(self.loc, lhs, unsigned_type);
-                        rhs = self.context.new_cast(self.loc, rhs, unsigned_type);
+                        lhs = self.context.new_cast(self.location, lhs, unsigned_type);
+                        rhs = self.context.new_cast(self.location, rhs, unsigned_type);
                     }
-                },
+                }
                 // TODO(antoyo): we probably need to handle signed comparison for unsigned
                 // integers.
                 _ => (),
             }
-            self.context.new_comparison(self.loc, op.to_gcc_comparison(), lhs, rhs)
+            self.context.new_comparison(self.location, op.to_gcc_comparison(), lhs, rhs)
         }
     }
 
@@ -508,12 +608,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if a_type.is_vector() && b_type.is_vector() {
             let b = self.bitcast_if_needed(b, a_type);
             a ^ b
-        }
-        else if self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type) {
+        } else if self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type)
+        {
             a ^ b
-        }
-        else {
-            self.from_low_high_rvalues(a_type,
+        } else {
+            self.from_low_high_rvalues(
+                a_type,
                 self.low(a) ^ self.low(b),
                 self.high(a) ^ self.high(b),
             )
@@ -528,25 +628,20 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if a_native && b_native {
             // FIXME(antoyo): remove the casts when libgccjit can shift an unsigned number by an unsigned number.
             if a_type.is_unsigned(self) && b_type.is_signed(self) {
-                let a = self.context.new_cast(self.loc, a, b_type);
+                let a = self.context.new_cast(self.location, a, b_type);
                 let result = a << b;
-                self.context.new_cast(self.loc, result, a_type)
-            }
-            else if a_type.is_signed(self) && b_type.is_unsigned(self) {
-                let b = self.context.new_cast(self.loc, b, a_type);
+                self.context.new_cast(self.location, result, a_type)
+            } else if a_type.is_signed(self) && b_type.is_unsigned(self) {
+                let b = self.context.new_cast(self.location, b, a_type);
+                a << b
+            } else {
                 a << b
             }
-            else {
-                a << b
-            }
-        }
-        else if a_type.is_vector() && a_type.is_vector() {
+        } else if a_type.is_vector() && a_type.is_vector() {
             a << b
-        }
-        else if a_native && !b_native {
+        } else if a_native && !b_native {
             self.gcc_shl(a, self.gcc_int_cast(b, a_type))
-        }
-        else {
+        } else {
             // NOTE: we cannot use the ashl builtin because it's calling widen_hi() which uses ashl.
             let native_int_type = a_type.dyncast_array().expect("get element type");
 
@@ -557,40 +652,40 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let b0_block = func.new_block("b0");
             let actual_else_block = func.new_block("actual_else");
 
-            let result = func.new_local(self.loc, a_type, "shiftResult");
+            let result = func.new_local(self.location, a_type, "shiftResult");
 
             let b = self.gcc_int_cast(b, native_int_type);
             let sixty_four = self.gcc_int(native_int_type, 64);
             let zero = self.gcc_zero(native_int_type);
             let condition = self.gcc_icmp(IntPredicate::IntNE, self.gcc_and(b, sixty_four), zero);
-            self.llbb().end_with_conditional(self.loc, condition, then_block, else_block);
+            self.llbb().end_with_conditional(self.location, condition, then_block, else_block);
 
-            let array_value = self.from_low_high_rvalues(a_type,
-                zero,
-                self.low(a) << (b - sixty_four),
-            );
-            then_block.add_assignment(self.loc, result, array_value);
-            then_block.end_with_jump(self.loc, after_block);
+            let array_value =
+                self.from_low_high_rvalues(a_type, zero, self.low(a) << (b - sixty_four));
+            then_block.add_assignment(self.location, result, array_value);
+            then_block.end_with_jump(self.location, after_block);
 
             let condition = self.gcc_icmp(IntPredicate::IntEQ, b, zero);
-            else_block.end_with_conditional(self.loc, condition, b0_block, actual_else_block);
+            else_block.end_with_conditional(self.location, condition, b0_block, actual_else_block);
 
-            b0_block.add_assignment(self.loc, result, a);
-            b0_block.end_with_jump(self.loc, after_block);
+            b0_block.add_assignment(self.location, result, a);
+            b0_block.end_with_jump(self.location, after_block);
 
             // NOTE: cast low to its unsigned type in order to perform a logical right shift.
             // TODO(antoyo): adjust this ^ comment.
             let unsigned_type = native_int_type.to_unsigned(&self.cx);
-            let casted_low = self.context.new_cast(self.loc, self.low(a), unsigned_type);
-            let shift_value = self.context.new_cast(self.loc, sixty_four - b, unsigned_type);
-            let high_low = self.context.new_cast(self.loc, casted_low >> shift_value, native_int_type);
+            let casted_low = self.context.new_cast(self.location, self.low(a), unsigned_type);
+            let shift_value = self.context.new_cast(self.location, sixty_four - b, unsigned_type);
+            let high_low =
+                self.context.new_cast(self.location, casted_low >> shift_value, native_int_type);
 
-            let array_value = self.from_low_high_rvalues(a_type,
+            let array_value = self.from_low_high_rvalues(
+                a_type,
                 self.low(a) << b,
                 (self.high(a) << b) | high_low,
             );
-            actual_else_block.add_assignment(self.loc, result, array_value);
-            actual_else_block.end_with_jump(self.loc, after_block);
+            actual_else_block.add_assignment(self.location, result, array_value);
+            actual_else_block.end_with_jump(self.location, after_block);
 
             // NOTE: since jumps were added in a place rustc does not expect, the current block in the
             // state need to be updated.
@@ -606,10 +701,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let native_int_type = arg_type.dyncast_array().expect("get element type");
             let lsb = self.low(arg);
             let swapped_lsb = self.gcc_bswap(lsb, width / 2);
-            let swapped_lsb = self.context.new_cast(self.loc, swapped_lsb, native_int_type);
+            let swapped_lsb = self.context.new_cast(self.location, swapped_lsb, native_int_type);
             let msb = self.high(arg);
             let swapped_msb = self.gcc_bswap(msb, width / 2);
-            let swapped_msb = self.context.new_cast(self.loc, swapped_msb, native_int_type);
+            let swapped_msb = self.context.new_cast(self.location, swapped_msb, native_int_type);
 
             // NOTE: we also need to swap the two elements here, in addition to swapping inside
             // the elements themselves like done above.
@@ -625,7 +720,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         if param_type != arg_type {
             arg = self.bitcast(arg, param_type);
         }
-        self.cx.context.new_call(self.loc, bswap, &[arg])
+        self.cx.context.new_call(self.location, bswap, &[arg])
     }
 }
 
@@ -633,8 +728,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     pub fn gcc_int(&self, typ: Type<'gcc>, int: i64) -> RValue<'gcc> {
         if self.is_native_int_type_or_bool(typ) {
             self.context.new_rvalue_from_long(typ, i64::try_from(int).expect("i64::try_from"))
-        }
-        else {
+        } else {
             // NOTE: set the sign in high.
             self.from_low_high(typ, int, -(int.is_negative() as i64))
         }
@@ -645,11 +739,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             // FIXME(antoyo): libgccjit cannot create 128-bit values yet.
             let num = self.context.new_rvalue_from_long(self.u64_type, int as i64);
             self.gcc_int_cast(num, typ)
-        }
-        else if self.is_native_int_type_or_bool(typ) {
-            self.context.new_rvalue_from_long(typ, u64::try_from(int).expect("u64::try_from") as i64)
-        }
-        else {
+        } else if self.is_native_int_type_or_bool(typ) {
+            self.context
+                .new_rvalue_from_long(typ, u64::try_from(int).expect("u64::try_from") as i64)
+        } else {
             self.from_low_high(typ, int as i64, 0)
         }
     }
@@ -666,17 +759,14 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
                 let sixty_four = self.context.new_rvalue_from_long(typ, 64);
                 let shift = high << sixty_four;
                 shift | self.context.new_cast(None, low, typ)
-            }
-            else {
+            } else {
                 self.from_low_high(typ, low as i64, high as i64)
             }
-        }
-        else if typ.is_i128(self) {
+        } else if typ.is_i128(self) {
             // FIXME(antoyo): libgccjit cannot create 128-bit values yet.
             let num = self.context.new_rvalue_from_long(self.u64_type, num as u64 as i64);
             self.gcc_int_cast(num, typ)
-        }
-        else {
+        } else {
             self.gcc_uint(typ, num as u64)
         }
     }
@@ -684,8 +774,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     pub fn gcc_zero(&self, typ: Type<'gcc>) -> RValue<'gcc> {
         if self.is_native_int_type_or_bool(typ) {
             self.context.new_rvalue_zero(typ)
-        }
-        else {
+        } else {
             self.from_low_high(typ, 0, 0)
         }
     }
@@ -693,14 +782,19 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     pub fn gcc_int_width(&self, typ: Type<'gcc>) -> u64 {
         if self.is_native_int_type_or_bool(typ) {
             typ.get_size() as u64 * 8
-        }
-        else {
+        } else {
             // NOTE: the only unsupported types are u128 and i128.
             128
         }
     }
 
-    fn bitwise_operation(&self, operation: BinaryOp, a: RValue<'gcc>, mut b: RValue<'gcc>, loc: Option<Location<'gcc>>) -> RValue<'gcc> {
+    fn bitwise_operation(
+        &self,
+        operation: BinaryOp,
+        a: RValue<'gcc>,
+        mut b: RValue<'gcc>,
+        loc: Option<Location<'gcc>>,
+    ) -> RValue<'gcc> {
         let a_type = a.get_type();
         let b_type = b.get_type();
         let a_native = self.is_native_int_type_or_bool(a_type);
@@ -708,49 +802,68 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         if a_type.is_vector() && b_type.is_vector() {
             let b = self.bitcast_if_needed(b, a_type);
             self.context.new_binary_op(loc, operation, a_type, a, b)
-        }
-        else if a_native && b_native {
+        } else if a_native && b_native {
             if a_type != b_type {
                 b = self.context.new_cast(loc, b, a_type);
             }
             self.context.new_binary_op(loc, operation, a_type, a, b)
-        }
-        else {
-            assert!(!a_native && !b_native, "both types should either be native or non-native for or operation");
+        } else {
+            assert!(
+                !a_native && !b_native,
+                "both types should either be native or non-native for or operation"
+            );
             let native_int_type = a_type.dyncast_array().expect("get element type");
-            self.from_low_high_rvalues(a_type,
-                self.context.new_binary_op(loc, operation, native_int_type, self.low(a), self.low(b)),
-                self.context.new_binary_op(loc, operation, native_int_type, self.high(a), self.high(b)),
+            self.from_low_high_rvalues(
+                a_type,
+                self.context.new_binary_op(
+                    loc,
+                    operation,
+                    native_int_type,
+                    self.low(a),
+                    self.low(b),
+                ),
+                self.context.new_binary_op(
+                    loc,
+                    operation,
+                    native_int_type,
+                    self.high(a),
+                    self.high(b),
+                ),
             )
         }
     }
 
-    pub fn gcc_or(&self, a: RValue<'gcc>, b: RValue<'gcc>, loc: Option<Location<'gcc>>) -> RValue<'gcc> {
+    pub fn gcc_or(
+        &self,
+        a: RValue<'gcc>,
+        b: RValue<'gcc>,
+        loc: Option<Location<'gcc>>,
+    ) -> RValue<'gcc> {
         self.bitwise_operation(BinaryOp::BitwiseOr, a, b, loc)
     }
 
     // TODO(antoyo): can we use https://github.com/rust-lang/compiler-builtins/blob/master/src/int/mod.rs#L379 instead?
     pub fn gcc_int_cast(&self, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
         let value_type = value.get_type();
-        if self.is_native_int_type_or_bool(dest_typ) && self.is_native_int_type_or_bool(value_type) {
+        if self.is_native_int_type_or_bool(dest_typ) && self.is_native_int_type_or_bool(value_type)
+        {
             self.context.new_cast(None, value, dest_typ)
-        }
-        else if self.is_native_int_type_or_bool(dest_typ) {
+        } else if self.is_native_int_type_or_bool(dest_typ) {
             self.context.new_cast(None, self.low(value), dest_typ)
-        }
-        else if self.is_native_int_type_or_bool(value_type) {
+        } else if self.is_native_int_type_or_bool(value_type) {
             let dest_element_type = dest_typ.dyncast_array().expect("get element type");
 
             // NOTE: set the sign of the value.
             let zero = self.context.new_rvalue_zero(value_type);
-            let is_negative = self.context.new_comparison(None, ComparisonOp::LessThan, value, zero);
+            let is_negative =
+                self.context.new_comparison(None, ComparisonOp::LessThan, value, zero);
             let is_negative = self.gcc_int_cast(is_negative, dest_element_type);
-            self.from_low_high_rvalues(dest_typ,
+            self.from_low_high_rvalues(
+                dest_typ,
                 self.context.new_cast(None, value, dest_element_type),
                 self.context.new_unary_op(None, UnaryOp::Minus, dest_element_type, is_negative),
             )
-        }
-        else {
+        } else {
             // Since u128 and i128 are the only types that can be unsupported, we know the type of
             // value and the destination type have the same size, so a bitcast is fine.
 
@@ -759,29 +872,34 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         }
     }
 
-    fn int_to_float_cast(&self, signed: bool, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
+    fn int_to_float_cast(
+        &self,
+        signed: bool,
+        value: RValue<'gcc>,
+        dest_typ: Type<'gcc>,
+    ) -> RValue<'gcc> {
         let value_type = value.get_type();
         if self.is_native_int_type_or_bool(value_type) {
             return self.context.new_cast(None, value, dest_typ);
         }
 
         debug_assert!(value_type.dyncast_array().is_some());
-        let name_suffix =
-            match self.type_kind(dest_typ) {
-                TypeKind::Float => "tisf",
-                TypeKind::Double => "tidf",
-                kind => panic!("cannot cast a non-native integer to type {:?}", kind),
-            };
-        let sign =
-            if signed {
-                ""
-            }
-            else {
-                "un"
-            };
+        let name_suffix = match self.type_kind(dest_typ) {
+            TypeKind::Float => "tisf",
+            TypeKind::Double => "tidf",
+            kind => panic!("cannot cast a non-native integer to type {:?}", kind),
+        };
+        let sign = if signed { "" } else { "un" };
         let func_name = format!("__float{}{}", sign, name_suffix);
         let param = self.context.new_parameter(None, value_type, "n");
-        let func = self.context.new_function(None, FunctionType::Extern, dest_typ, &[param], func_name, false);
+        let func = self.context.new_function(
+            None,
+            FunctionType::Extern,
+            dest_typ,
+            &[param],
+            func_name,
+            false,
+        );
         self.context.new_call(None, func, &[value])
     }
 
@@ -789,33 +907,42 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         self.int_to_float_cast(true, value, dest_typ)
     }
 
-    pub fn gcc_uint_to_float_cast(&self, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
+    pub fn gcc_uint_to_float_cast(
+        &self,
+        value: RValue<'gcc>,
+        dest_typ: Type<'gcc>,
+    ) -> RValue<'gcc> {
         self.int_to_float_cast(false, value, dest_typ)
     }
 
-    fn float_to_int_cast(&self, signed: bool, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
+    fn float_to_int_cast(
+        &self,
+        signed: bool,
+        value: RValue<'gcc>,
+        dest_typ: Type<'gcc>,
+    ) -> RValue<'gcc> {
         let value_type = value.get_type();
         if self.is_native_int_type_or_bool(dest_typ) {
             return self.context.new_cast(None, value, dest_typ);
         }
 
         debug_assert!(value_type.dyncast_array().is_some());
-        let name_suffix =
-            match self.type_kind(value_type) {
-                TypeKind::Float => "sfti",
-                TypeKind::Double => "dfti",
-                kind => panic!("cannot cast a {:?} to non-native integer", kind),
-            };
-        let sign =
-            if signed {
-                ""
-            }
-            else {
-                "uns"
-            };
+        let name_suffix = match self.type_kind(value_type) {
+            TypeKind::Float => "sfti",
+            TypeKind::Double => "dfti",
+            kind => panic!("cannot cast a {:?} to non-native integer", kind),
+        };
+        let sign = if signed { "" } else { "uns" };
         let func_name = format!("__fix{}{}", sign, name_suffix);
         let param = self.context.new_parameter(None, value_type, "n");
-        let func = self.context.new_function(None, FunctionType::Extern, dest_typ, &[param], func_name, false);
+        let func = self.context.new_function(
+            None,
+            FunctionType::Extern,
+            dest_typ,
+            &[param],
+            func_name,
+            false,
+        );
         self.context.new_call(None, func, &[value])
     }
 
@@ -823,47 +950,54 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         self.float_to_int_cast(true, value, dest_typ)
     }
 
-    pub fn gcc_float_to_uint_cast(&self, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
+    pub fn gcc_float_to_uint_cast(
+        &self,
+        value: RValue<'gcc>,
+        dest_typ: Type<'gcc>,
+    ) -> RValue<'gcc> {
         self.float_to_int_cast(false, value, dest_typ)
     }
 
     fn high(&self, value: RValue<'gcc>) -> RValue<'gcc> {
-        let index =
-            match self.sess().target.options.endian {
-                Endian::Little => 1,
-                Endian::Big => 0,
-            };
-        self.context.new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, index))
+        let index = match self.sess().target.options.endian {
+            Endian::Little => 1,
+            Endian::Big => 0,
+        };
+        self.context
+            .new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, index))
             .to_rvalue()
     }
 
     fn low(&self, value: RValue<'gcc>) -> RValue<'gcc> {
-        let index =
-            match self.sess().target.options.endian {
-                Endian::Little => 0,
-                Endian::Big => 1,
-            };
-        self.context.new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, index))
+        let index = match self.sess().target.options.endian {
+            Endian::Little => 0,
+            Endian::Big => 1,
+        };
+        self.context
+            .new_array_access(None, value, self.context.new_rvalue_from_int(self.int_type, index))
             .to_rvalue()
     }
 
-    fn from_low_high_rvalues(&self, typ: Type<'gcc>, low: RValue<'gcc>, high: RValue<'gcc>) -> RValue<'gcc> {
-        let (first, last) =
-            match self.sess().target.options.endian {
-                Endian::Little => (low, high),
-                Endian::Big => (high, low),
-            };
+    fn from_low_high_rvalues(
+        &self,
+        typ: Type<'gcc>,
+        low: RValue<'gcc>,
+        high: RValue<'gcc>,
+    ) -> RValue<'gcc> {
+        let (first, last) = match self.sess().target.options.endian {
+            Endian::Little => (low, high),
+            Endian::Big => (high, low),
+        };
 
         let values = [first, last];
         self.context.new_array_constructor(None, typ, &values)
     }
 
     fn from_low_high(&self, typ: Type<'gcc>, low: i64, high: i64) -> RValue<'gcc> {
-        let (first, last) =
-            match self.sess().target.options.endian {
-                Endian::Little => (low, high),
-                Endian::Big => (high, low),
-            };
+        let (first, last) = match self.sess().target.options.endian {
+            Endian::Little => (low, high),
+            Endian::Big => (high, low),
+        };
 
         let native_int_type = typ.dyncast_array().expect("get element type");
         let values = [
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 0d2ce20c654c..ce8dee69a988 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -3,94 +3,185 @@ use std::borrow::Cow;
 use gccjit::{Function, FunctionPtrType, RValue, ToRValue, UnaryOp};
 use rustc_codegen_ssa::traits::BuilderMethods;
 
-use crate::{context::CodegenCx, builder::Builder};
+use crate::{builder::Builder, context::CodegenCx};
 
-pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc, 'tcx>, gcc_func: FunctionPtrType<'gcc>, mut args: Cow<'b, [RValue<'gcc>]>, func_name: &str, original_function_name: Option<&String>) -> Cow<'b, [RValue<'gcc>]> {
+pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
+    builder: &Builder<'a, 'gcc, 'tcx>,
+    gcc_func: FunctionPtrType<'gcc>,
+    mut args: Cow<'b, [RValue<'gcc>]>,
+    func_name: &str,
+    original_function_name: Option<&String>,
+) -> Cow<'b, [RValue<'gcc>]> {
     // Some LLVM intrinsics do not map 1-to-1 to GCC intrinsics, so we add the missing
     // arguments here.
     if gcc_func.get_param_count() != args.len() {
         match &*func_name {
             // NOTE: the following intrinsics have a different number of parameters in LLVM and GCC.
-            "__builtin_ia32_prold512_mask" | "__builtin_ia32_pmuldq512_mask" | "__builtin_ia32_pmuludq512_mask"
-                | "__builtin_ia32_pmaxsd512_mask" | "__builtin_ia32_pmaxsq512_mask" | "__builtin_ia32_pmaxsq256_mask"
-                | "__builtin_ia32_pmaxsq128_mask" | "__builtin_ia32_pmaxud512_mask" | "__builtin_ia32_pmaxuq512_mask"
-                | "__builtin_ia32_pminsd512_mask" | "__builtin_ia32_pminsq512_mask" | "__builtin_ia32_pminsq256_mask"
-                | "__builtin_ia32_pminsq128_mask" | "__builtin_ia32_pminud512_mask" | "__builtin_ia32_pminuq512_mask"
-                | "__builtin_ia32_prolq512_mask" | "__builtin_ia32_prorq512_mask" | "__builtin_ia32_pslldi512_mask"
-                | "__builtin_ia32_psrldi512_mask" | "__builtin_ia32_psllqi512_mask" | "__builtin_ia32_psrlqi512_mask"
-                | "__builtin_ia32_pslld512_mask" | "__builtin_ia32_psrld512_mask" | "__builtin_ia32_psllq512_mask"
-                | "__builtin_ia32_psrlq512_mask" | "__builtin_ia32_psrad512_mask" | "__builtin_ia32_psraq512_mask"
-                | "__builtin_ia32_psradi512_mask" | "__builtin_ia32_psraqi512_mask" | "__builtin_ia32_psrav16si_mask"
-                | "__builtin_ia32_psrav8di_mask" | "__builtin_ia32_prolvd512_mask" | "__builtin_ia32_prorvd512_mask"
-                | "__builtin_ia32_prolvq512_mask" | "__builtin_ia32_prorvq512_mask" | "__builtin_ia32_psllv16si_mask"
-                | "__builtin_ia32_psrlv16si_mask" | "__builtin_ia32_psllv8di_mask" | "__builtin_ia32_psrlv8di_mask"
-                | "__builtin_ia32_permvarsi512_mask" | "__builtin_ia32_vpermilvarps512_mask"
-                | "__builtin_ia32_vpermilvarpd512_mask" | "__builtin_ia32_permvardi512_mask"
-                | "__builtin_ia32_permvarsf512_mask" | "__builtin_ia32_permvarqi512_mask"
-                | "__builtin_ia32_permvarqi256_mask" | "__builtin_ia32_permvarqi128_mask"
-                | "__builtin_ia32_vpmultishiftqb512_mask" | "__builtin_ia32_vpmultishiftqb256_mask"
-                | "__builtin_ia32_vpmultishiftqb128_mask"
-                => {
+            "__builtin_ia32_prold512_mask"
+            | "__builtin_ia32_pmuldq512_mask"
+            | "__builtin_ia32_pmuludq512_mask"
+            | "__builtin_ia32_pmaxsd512_mask"
+            | "__builtin_ia32_pmaxsq512_mask"
+            | "__builtin_ia32_pmaxsq256_mask"
+            | "__builtin_ia32_pmaxsq128_mask"
+            | "__builtin_ia32_pmaxud512_mask"
+            | "__builtin_ia32_pmaxuq512_mask"
+            | "__builtin_ia32_pminsd512_mask"
+            | "__builtin_ia32_pminsq512_mask"
+            | "__builtin_ia32_pminsq256_mask"
+            | "__builtin_ia32_pminsq128_mask"
+            | "__builtin_ia32_pminud512_mask"
+            | "__builtin_ia32_pminuq512_mask"
+            | "__builtin_ia32_prolq512_mask"
+            | "__builtin_ia32_prorq512_mask"
+            | "__builtin_ia32_pslldi512_mask"
+            | "__builtin_ia32_psrldi512_mask"
+            | "__builtin_ia32_psllqi512_mask"
+            | "__builtin_ia32_psrlqi512_mask"
+            | "__builtin_ia32_pslld512_mask"
+            | "__builtin_ia32_psrld512_mask"
+            | "__builtin_ia32_psllq512_mask"
+            | "__builtin_ia32_psrlq512_mask"
+            | "__builtin_ia32_psrad512_mask"
+            | "__builtin_ia32_psraq512_mask"
+            | "__builtin_ia32_psradi512_mask"
+            | "__builtin_ia32_psraqi512_mask"
+            | "__builtin_ia32_psrav16si_mask"
+            | "__builtin_ia32_psrav8di_mask"
+            | "__builtin_ia32_prolvd512_mask"
+            | "__builtin_ia32_prorvd512_mask"
+            | "__builtin_ia32_prolvq512_mask"
+            | "__builtin_ia32_prorvq512_mask"
+            | "__builtin_ia32_psllv16si_mask"
+            | "__builtin_ia32_psrlv16si_mask"
+            | "__builtin_ia32_psllv8di_mask"
+            | "__builtin_ia32_psrlv8di_mask"
+            | "__builtin_ia32_permvarsi512_mask"
+            | "__builtin_ia32_vpermilvarps512_mask"
+            | "__builtin_ia32_vpermilvarpd512_mask"
+            | "__builtin_ia32_permvardi512_mask"
+            | "__builtin_ia32_permvarsf512_mask"
+            | "__builtin_ia32_permvarqi512_mask"
+            | "__builtin_ia32_permvarqi256_mask"
+            | "__builtin_ia32_permvarqi128_mask"
+            | "__builtin_ia32_vpmultishiftqb512_mask"
+            | "__builtin_ia32_vpmultishiftqb256_mask"
+            | "__builtin_ia32_vpmultishiftqb128_mask" => {
                 let mut new_args = args.to_vec();
                 let arg3_type = gcc_func.get_param_type(2);
-                let first_arg = builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue();
+                let first_arg = builder
+                    .current_func()
+                    .new_local(None, arg3_type, "undefined_for_intrinsic")
+                    .to_rvalue();
                 new_args.push(first_arg);
                 let arg4_type = gcc_func.get_param_type(3);
                 let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
                 new_args.push(minus_one);
                 args = new_args.into();
-            },
-            "__builtin_ia32_pmaxuq256_mask" | "__builtin_ia32_pmaxuq128_mask" | "__builtin_ia32_pminuq256_mask"
-                | "__builtin_ia32_pminuq128_mask" | "__builtin_ia32_prold256_mask" | "__builtin_ia32_prold128_mask"
-                | "__builtin_ia32_prord512_mask" | "__builtin_ia32_prord256_mask" | "__builtin_ia32_prord128_mask"
-                | "__builtin_ia32_prolq256_mask" | "__builtin_ia32_prolq128_mask" | "__builtin_ia32_prorq256_mask"
-                | "__builtin_ia32_prorq128_mask" | "__builtin_ia32_psraq256_mask" | "__builtin_ia32_psraq128_mask"
-                | "__builtin_ia32_psraqi256_mask" | "__builtin_ia32_psraqi128_mask" | "__builtin_ia32_psravq256_mask"
-                | "__builtin_ia32_psravq128_mask" | "__builtin_ia32_prolvd256_mask" | "__builtin_ia32_prolvd128_mask"
-                | "__builtin_ia32_prorvd256_mask" | "__builtin_ia32_prorvd128_mask" | "__builtin_ia32_prolvq256_mask"
-                | "__builtin_ia32_prolvq128_mask" | "__builtin_ia32_prorvq256_mask" | "__builtin_ia32_prorvq128_mask"
-                | "__builtin_ia32_permvardi256_mask" | "__builtin_ia32_permvardf512_mask" | "__builtin_ia32_permvardf256_mask"
-                | "__builtin_ia32_pmulhuw512_mask" | "__builtin_ia32_pmulhw512_mask" | "__builtin_ia32_pmulhrsw512_mask"
-                | "__builtin_ia32_pmaxuw512_mask" | "__builtin_ia32_pmaxub512_mask" | "__builtin_ia32_pmaxsw512_mask"
-                | "__builtin_ia32_pmaxsb512_mask" | "__builtin_ia32_pminuw512_mask" | "__builtin_ia32_pminub512_mask"
-                | "__builtin_ia32_pminsw512_mask" | "__builtin_ia32_pminsb512_mask"
-                | "__builtin_ia32_pmaddwd512_mask" | "__builtin_ia32_pmaddubsw512_mask" | "__builtin_ia32_packssdw512_mask"
-                | "__builtin_ia32_packsswb512_mask" | "__builtin_ia32_packusdw512_mask" | "__builtin_ia32_packuswb512_mask"
-                | "__builtin_ia32_pavgw512_mask" | "__builtin_ia32_pavgb512_mask" | "__builtin_ia32_psllw512_mask"
-                | "__builtin_ia32_psllwi512_mask" | "__builtin_ia32_psllv32hi_mask" | "__builtin_ia32_psrlw512_mask"
-                | "__builtin_ia32_psrlwi512_mask" | "__builtin_ia32_psllv16hi_mask" | "__builtin_ia32_psllv8hi_mask"
-                | "__builtin_ia32_psrlv32hi_mask" | "__builtin_ia32_psraw512_mask" | "__builtin_ia32_psrawi512_mask"
-                | "__builtin_ia32_psrlv16hi_mask" | "__builtin_ia32_psrlv8hi_mask" | "__builtin_ia32_psrav32hi_mask"
-                | "__builtin_ia32_permvarhi512_mask" | "__builtin_ia32_pshufb512_mask" | "__builtin_ia32_psrav16hi_mask"
-                | "__builtin_ia32_psrav8hi_mask" | "__builtin_ia32_permvarhi256_mask" | "__builtin_ia32_permvarhi128_mask"
-                => {
+            }
+            "__builtin_ia32_pmaxuq256_mask"
+            | "__builtin_ia32_pmaxuq128_mask"
+            | "__builtin_ia32_pminuq256_mask"
+            | "__builtin_ia32_pminuq128_mask"
+            | "__builtin_ia32_prold256_mask"
+            | "__builtin_ia32_prold128_mask"
+            | "__builtin_ia32_prord512_mask"
+            | "__builtin_ia32_prord256_mask"
+            | "__builtin_ia32_prord128_mask"
+            | "__builtin_ia32_prolq256_mask"
+            | "__builtin_ia32_prolq128_mask"
+            | "__builtin_ia32_prorq256_mask"
+            | "__builtin_ia32_prorq128_mask"
+            | "__builtin_ia32_psraq256_mask"
+            | "__builtin_ia32_psraq128_mask"
+            | "__builtin_ia32_psraqi256_mask"
+            | "__builtin_ia32_psraqi128_mask"
+            | "__builtin_ia32_psravq256_mask"
+            | "__builtin_ia32_psravq128_mask"
+            | "__builtin_ia32_prolvd256_mask"
+            | "__builtin_ia32_prolvd128_mask"
+            | "__builtin_ia32_prorvd256_mask"
+            | "__builtin_ia32_prorvd128_mask"
+            | "__builtin_ia32_prolvq256_mask"
+            | "__builtin_ia32_prolvq128_mask"
+            | "__builtin_ia32_prorvq256_mask"
+            | "__builtin_ia32_prorvq128_mask"
+            | "__builtin_ia32_permvardi256_mask"
+            | "__builtin_ia32_permvardf512_mask"
+            | "__builtin_ia32_permvardf256_mask"
+            | "__builtin_ia32_pmulhuw512_mask"
+            | "__builtin_ia32_pmulhw512_mask"
+            | "__builtin_ia32_pmulhrsw512_mask"
+            | "__builtin_ia32_pmaxuw512_mask"
+            | "__builtin_ia32_pmaxub512_mask"
+            | "__builtin_ia32_pmaxsw512_mask"
+            | "__builtin_ia32_pmaxsb512_mask"
+            | "__builtin_ia32_pminuw512_mask"
+            | "__builtin_ia32_pminub512_mask"
+            | "__builtin_ia32_pminsw512_mask"
+            | "__builtin_ia32_pminsb512_mask"
+            | "__builtin_ia32_pmaddwd512_mask"
+            | "__builtin_ia32_pmaddubsw512_mask"
+            | "__builtin_ia32_packssdw512_mask"
+            | "__builtin_ia32_packsswb512_mask"
+            | "__builtin_ia32_packusdw512_mask"
+            | "__builtin_ia32_packuswb512_mask"
+            | "__builtin_ia32_pavgw512_mask"
+            | "__builtin_ia32_pavgb512_mask"
+            | "__builtin_ia32_psllw512_mask"
+            | "__builtin_ia32_psllwi512_mask"
+            | "__builtin_ia32_psllv32hi_mask"
+            | "__builtin_ia32_psrlw512_mask"
+            | "__builtin_ia32_psrlwi512_mask"
+            | "__builtin_ia32_psllv16hi_mask"
+            | "__builtin_ia32_psllv8hi_mask"
+            | "__builtin_ia32_psrlv32hi_mask"
+            | "__builtin_ia32_psraw512_mask"
+            | "__builtin_ia32_psrawi512_mask"
+            | "__builtin_ia32_psrlv16hi_mask"
+            | "__builtin_ia32_psrlv8hi_mask"
+            | "__builtin_ia32_psrav32hi_mask"
+            | "__builtin_ia32_permvarhi512_mask"
+            | "__builtin_ia32_pshufb512_mask"
+            | "__builtin_ia32_psrav16hi_mask"
+            | "__builtin_ia32_psrav8hi_mask"
+            | "__builtin_ia32_permvarhi256_mask"
+            | "__builtin_ia32_permvarhi128_mask" => {
                 let mut new_args = args.to_vec();
                 let arg3_type = gcc_func.get_param_type(2);
                 let vector_type = arg3_type.dyncast_vector().expect("vector type");
                 let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
                 let num_units = vector_type.get_num_units();
-                let first_arg = builder.context.new_rvalue_from_vector(None, arg3_type, &vec![zero; num_units]);
+                let first_arg =
+                    builder.context.new_rvalue_from_vector(None, arg3_type, &vec![zero; num_units]);
                 new_args.push(first_arg);
                 let arg4_type = gcc_func.get_param_type(3);
                 let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
                 new_args.push(minus_one);
                 args = new_args.into();
-            },
-            "__builtin_ia32_dbpsadbw512_mask" | "__builtin_ia32_dbpsadbw256_mask" | "__builtin_ia32_dbpsadbw128_mask" => {
+            }
+            "__builtin_ia32_dbpsadbw512_mask"
+            | "__builtin_ia32_dbpsadbw256_mask"
+            | "__builtin_ia32_dbpsadbw128_mask" => {
                 let mut new_args = args.to_vec();
                 let arg4_type = gcc_func.get_param_type(3);
                 let vector_type = arg4_type.dyncast_vector().expect("vector type");
                 let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
                 let num_units = vector_type.get_num_units();
-                let first_arg = builder.context.new_rvalue_from_vector(None, arg4_type, &vec![zero; num_units]);
+                let first_arg =
+                    builder.context.new_rvalue_from_vector(None, arg4_type, &vec![zero; num_units]);
                 new_args.push(first_arg);
                 let arg5_type = gcc_func.get_param_type(4);
                 let minus_one = builder.context.new_rvalue_from_int(arg5_type, -1);
                 new_args.push(minus_one);
                 args = new_args.into();
-            },
-            "__builtin_ia32_vplzcntd_512_mask" | "__builtin_ia32_vplzcntd_256_mask" | "__builtin_ia32_vplzcntd_128_mask"
-                | "__builtin_ia32_vplzcntq_512_mask" | "__builtin_ia32_vplzcntq_256_mask" | "__builtin_ia32_vplzcntq_128_mask" => {
+            }
+            "__builtin_ia32_vplzcntd_512_mask"
+            | "__builtin_ia32_vplzcntd_256_mask"
+            | "__builtin_ia32_vplzcntd_128_mask"
+            | "__builtin_ia32_vplzcntq_512_mask"
+            | "__builtin_ia32_vplzcntq_256_mask"
+            | "__builtin_ia32_vplzcntq_128_mask" => {
                 let mut new_args = args.to_vec();
                 // Remove last arg as it doesn't seem to be used in GCC and is always false.
                 new_args.pop();
@@ -98,37 +189,45 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 let vector_type = arg2_type.dyncast_vector().expect("vector type");
                 let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
                 let num_units = vector_type.get_num_units();
-                let first_arg = builder.context.new_rvalue_from_vector(None, arg2_type, &vec![zero; num_units]);
+                let first_arg =
+                    builder.context.new_rvalue_from_vector(None, arg2_type, &vec![zero; num_units]);
                 new_args.push(first_arg);
                 let arg3_type = gcc_func.get_param_type(2);
                 let minus_one = builder.context.new_rvalue_from_int(arg3_type, -1);
                 new_args.push(minus_one);
                 args = new_args.into();
-            },
-            "__builtin_ia32_vpconflictsi_512_mask" | "__builtin_ia32_vpconflictsi_256_mask"
-                | "__builtin_ia32_vpconflictsi_128_mask" | "__builtin_ia32_vpconflictdi_512_mask"
-                | "__builtin_ia32_vpconflictdi_256_mask" | "__builtin_ia32_vpconflictdi_128_mask" => {
+            }
+            "__builtin_ia32_vpconflictsi_512_mask"
+            | "__builtin_ia32_vpconflictsi_256_mask"
+            | "__builtin_ia32_vpconflictsi_128_mask"
+            | "__builtin_ia32_vpconflictdi_512_mask"
+            | "__builtin_ia32_vpconflictdi_256_mask"
+            | "__builtin_ia32_vpconflictdi_128_mask" => {
                 let mut new_args = args.to_vec();
                 let arg2_type = gcc_func.get_param_type(1);
                 let vector_type = arg2_type.dyncast_vector().expect("vector type");
                 let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
                 let num_units = vector_type.get_num_units();
-                let first_arg = builder.context.new_rvalue_from_vector(None, arg2_type, &vec![zero; num_units]);
+                let first_arg =
+                    builder.context.new_rvalue_from_vector(None, arg2_type, &vec![zero; num_units]);
                 new_args.push(first_arg);
                 let arg3_type = gcc_func.get_param_type(2);
                 let minus_one = builder.context.new_rvalue_from_int(arg3_type, -1);
                 new_args.push(minus_one);
                 args = new_args.into();
-            },
-            "__builtin_ia32_pternlogd512_mask" | "__builtin_ia32_pternlogd256_mask"
-                | "__builtin_ia32_pternlogd128_mask" | "__builtin_ia32_pternlogq512_mask"
-                | "__builtin_ia32_pternlogq256_mask" | "__builtin_ia32_pternlogq128_mask" => {
+            }
+            "__builtin_ia32_pternlogd512_mask"
+            | "__builtin_ia32_pternlogd256_mask"
+            | "__builtin_ia32_pternlogd128_mask"
+            | "__builtin_ia32_pternlogq512_mask"
+            | "__builtin_ia32_pternlogq256_mask"
+            | "__builtin_ia32_pternlogq128_mask" => {
                 let mut new_args = args.to_vec();
                 let arg5_type = gcc_func.get_param_type(4);
                 let minus_one = builder.context.new_rvalue_from_int(arg5_type, -1);
                 new_args.push(minus_one);
                 args = new_args.into();
-            },
+            }
             "__builtin_ia32_vfmaddps512_mask" | "__builtin_ia32_vfmaddpd512_mask" => {
                 let mut new_args = args.to_vec();
 
@@ -154,24 +253,33 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 }
 
                 args = new_args.into();
-            },
-            "__builtin_ia32_addps512_mask" | "__builtin_ia32_addpd512_mask"
-                | "__builtin_ia32_subps512_mask" | "__builtin_ia32_subpd512_mask"
-                | "__builtin_ia32_mulps512_mask" | "__builtin_ia32_mulpd512_mask"
-                | "__builtin_ia32_divps512_mask" | "__builtin_ia32_divpd512_mask"
-                | "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
-                |  "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask" => {
+            }
+            "__builtin_ia32_addps512_mask"
+            | "__builtin_ia32_addpd512_mask"
+            | "__builtin_ia32_subps512_mask"
+            | "__builtin_ia32_subpd512_mask"
+            | "__builtin_ia32_mulps512_mask"
+            | "__builtin_ia32_mulpd512_mask"
+            | "__builtin_ia32_divps512_mask"
+            | "__builtin_ia32_divpd512_mask"
+            | "__builtin_ia32_maxps512_mask"
+            | "__builtin_ia32_maxpd512_mask"
+            | "__builtin_ia32_minps512_mask"
+            | "__builtin_ia32_minpd512_mask" => {
                 let mut new_args = args.to_vec();
                 let last_arg = new_args.pop().expect("last arg");
                 let arg3_type = gcc_func.get_param_type(2);
-                let undefined = builder.current_func().new_local(None, arg3_type, "undefined_for_intrinsic").to_rvalue();
+                let undefined = builder
+                    .current_func()
+                    .new_local(None, arg3_type, "undefined_for_intrinsic")
+                    .to_rvalue();
                 new_args.push(undefined);
                 let arg4_type = gcc_func.get_param_type(3);
                 let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
                 new_args.push(minus_one);
                 new_args.push(last_arg);
                 args = new_args.into();
-            },
+            }
             "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
                 let mut new_args = args.to_vec();
                 let last_arg = new_args.pop().expect("last arg");
@@ -180,54 +288,72 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 new_args.push(minus_one);
                 new_args.push(last_arg);
                 args = new_args.into();
-            },
-            "__builtin_ia32_vpermi2vard512_mask" | "__builtin_ia32_vpermi2vard256_mask"
-                | "__builtin_ia32_vpermi2vard128_mask" | "__builtin_ia32_vpermi2varq512_mask"
-                | "__builtin_ia32_vpermi2varq256_mask" | "__builtin_ia32_vpermi2varq128_mask"
-                | "__builtin_ia32_vpermi2varps512_mask" | "__builtin_ia32_vpermi2varps256_mask"
-                | "__builtin_ia32_vpermi2varps128_mask" | "__builtin_ia32_vpermi2varpd512_mask"
-                | "__builtin_ia32_vpermi2varpd256_mask" | "__builtin_ia32_vpermi2varpd128_mask" | "__builtin_ia32_vpmadd52huq512_mask"
-                | "__builtin_ia32_vpmadd52luq512_mask" | "__builtin_ia32_vpmadd52huq256_mask" | "__builtin_ia32_vpmadd52luq256_mask"
-                | "__builtin_ia32_vpmadd52huq128_mask"
-                => {
+            }
+            "__builtin_ia32_vpermi2vard512_mask"
+            | "__builtin_ia32_vpermi2vard256_mask"
+            | "__builtin_ia32_vpermi2vard128_mask"
+            | "__builtin_ia32_vpermi2varq512_mask"
+            | "__builtin_ia32_vpermi2varq256_mask"
+            | "__builtin_ia32_vpermi2varq128_mask"
+            | "__builtin_ia32_vpermi2varps512_mask"
+            | "__builtin_ia32_vpermi2varps256_mask"
+            | "__builtin_ia32_vpermi2varps128_mask"
+            | "__builtin_ia32_vpermi2varpd512_mask"
+            | "__builtin_ia32_vpermi2varpd256_mask"
+            | "__builtin_ia32_vpermi2varpd128_mask"
+            | "__builtin_ia32_vpmadd52huq512_mask"
+            | "__builtin_ia32_vpmadd52luq512_mask"
+            | "__builtin_ia32_vpmadd52huq256_mask"
+            | "__builtin_ia32_vpmadd52luq256_mask"
+            | "__builtin_ia32_vpmadd52huq128_mask" => {
                 let mut new_args = args.to_vec();
                 let arg4_type = gcc_func.get_param_type(3);
                 let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
                 new_args.push(minus_one);
                 args = new_args.into();
-            },
-            "__builtin_ia32_cvtdq2ps512_mask" | "__builtin_ia32_cvtudq2ps512_mask"
-                | "__builtin_ia32_sqrtps512_mask" | "__builtin_ia32_sqrtpd512_mask" => {
+            }
+            "__builtin_ia32_cvtdq2ps512_mask"
+            | "__builtin_ia32_cvtudq2ps512_mask"
+            | "__builtin_ia32_sqrtps512_mask"
+            | "__builtin_ia32_sqrtpd512_mask" => {
                 let mut new_args = args.to_vec();
                 let last_arg = new_args.pop().expect("last arg");
                 let arg2_type = gcc_func.get_param_type(1);
-                let undefined = builder.current_func().new_local(None, arg2_type, "undefined_for_intrinsic").to_rvalue();
+                let undefined = builder
+                    .current_func()
+                    .new_local(None, arg2_type, "undefined_for_intrinsic")
+                    .to_rvalue();
                 new_args.push(undefined);
                 let arg3_type = gcc_func.get_param_type(2);
                 let minus_one = builder.context.new_rvalue_from_int(arg3_type, -1);
                 new_args.push(minus_one);
                 new_args.push(last_arg);
                 args = new_args.into();
-            },
+            }
             "__builtin_ia32_stmxcsr" => {
                 args = vec![].into();
-            },
-            "__builtin_ia32_addcarryx_u64" | "__builtin_ia32_sbb_u64" | "__builtin_ia32_addcarryx_u32" | "__builtin_ia32_sbb_u32" => {
+            }
+            "__builtin_ia32_addcarryx_u64"
+            | "__builtin_ia32_sbb_u64"
+            | "__builtin_ia32_addcarryx_u32"
+            | "__builtin_ia32_sbb_u32" => {
                 let mut new_args = args.to_vec();
                 let arg2_type = gcc_func.get_param_type(1);
                 let variable = builder.current_func().new_local(None, arg2_type, "addcarryResult");
                 new_args.push(variable.get_address(None));
                 args = new_args.into();
-            },
-            "__builtin_ia32_vpermt2varqi512_mask" | "__builtin_ia32_vpermt2varqi256_mask"
-                | "__builtin_ia32_vpermt2varqi128_mask" | "__builtin_ia32_vpermt2varhi512_mask"
-                | "__builtin_ia32_vpermt2varhi256_mask" | "__builtin_ia32_vpermt2varhi128_mask"
-                => {
+            }
+            "__builtin_ia32_vpermt2varqi512_mask"
+            | "__builtin_ia32_vpermt2varqi256_mask"
+            | "__builtin_ia32_vpermt2varqi128_mask"
+            | "__builtin_ia32_vpermt2varhi512_mask"
+            | "__builtin_ia32_vpermt2varhi256_mask"
+            | "__builtin_ia32_vpermt2varhi128_mask" => {
                 let new_args = args.to_vec();
                 let arg4_type = gcc_func.get_param_type(3);
                 let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
                 args = vec![new_args[1], new_args[0], new_args[2], minus_one].into();
-            },
+            }
             "__builtin_ia32_xrstor" | "__builtin_ia32_xsavec" => {
                 let new_args = args.to_vec();
                 let thirty_two = builder.context.new_rvalue_from_int(new_args[1].get_type(), 32);
@@ -235,22 +361,25 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 let arg2_type = gcc_func.get_param_type(1);
                 let arg2 = builder.context.new_cast(None, arg2, arg2_type);
                 args = vec![new_args[0], arg2].into();
-            },
+            }
             // These builtins are sent one more argument than needed.
             "__builtin_prefetch" => {
                 let mut new_args = args.to_vec();
                 new_args.pop();
                 args = new_args.into();
-            },
+            }
             // The GCC version returns one value of the tuple through a pointer.
             "__builtin_ia32_rdrand64_step" => {
-                let arg = builder.current_func().new_local(None, builder.ulonglong_type, "return_rdrand_arg");
+                let arg = builder.current_func().new_local(
+                    None,
+                    builder.ulonglong_type,
+                    "return_rdrand_arg",
+                );
                 args = vec![arg.get_address(None)].into();
-            },
+            }
             _ => (),
         }
-    }
-    else {
+    } else {
         match &*func_name {
             "__builtin_ia32_rndscaless_mask_round" | "__builtin_ia32_rndscalesd_mask_round" => {
                 let new_args = args.to_vec();
@@ -259,7 +388,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 let arg4_type = gcc_func.get_param_type(3);
                 let arg4 = builder.context.new_bitcast(None, new_args[2], arg4_type);
                 args = vec![new_args[0], new_args[1], arg3, arg4, new_args[3], new_args[5]].into();
-            },
+            }
             // NOTE: the LLVM intrinsic receives 3 floats, but the GCC builtin requires 3 vectors.
             // FIXME: the intrinsics like _mm_mask_fmadd_sd should probably directly call the GCC
             // intrinsic to avoid this.
@@ -272,7 +401,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 let b = builder.context.new_rvalue_from_vector(None, arg2_type, &[new_args[1]; 4]);
                 let c = builder.context.new_rvalue_from_vector(None, arg3_type, &[new_args[2]; 4]);
                 args = vec![a, b, c, new_args[3]].into();
-            },
+            }
             "__builtin_ia32_vfmaddsd3_round" => {
                 let new_args = args.to_vec();
                 let arg1_type = gcc_func.get_param_type(0);
@@ -282,25 +411,34 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 let b = builder.context.new_rvalue_from_vector(None, arg2_type, &[new_args[1]; 2]);
                 let c = builder.context.new_rvalue_from_vector(None, arg3_type, &[new_args[2]; 2]);
                 args = vec![a, b, c, new_args[3]].into();
-            },
-            "__builtin_ia32_vfmaddsubpd256" | "__builtin_ia32_vfmaddsubps" | "__builtin_ia32_vfmaddsubps256"
-                | "__builtin_ia32_vfmaddsubpd" => {
+            }
+            "__builtin_ia32_vfmaddsubpd256"
+            | "__builtin_ia32_vfmaddsubps"
+            | "__builtin_ia32_vfmaddsubps256"
+            | "__builtin_ia32_vfmaddsubpd" => {
                 if let Some(original_function_name) = original_function_name {
                     match &**original_function_name {
-                        "llvm.x86.fma.vfmsubadd.pd.256" | "llvm.x86.fma.vfmsubadd.ps" | "llvm.x86.fma.vfmsubadd.ps.256"
-                            | "llvm.x86.fma.vfmsubadd.pd" => {
+                        "llvm.x86.fma.vfmsubadd.pd.256"
+                        | "llvm.x86.fma.vfmsubadd.ps"
+                        | "llvm.x86.fma.vfmsubadd.ps.256"
+                        | "llvm.x86.fma.vfmsubadd.pd" => {
                             // NOTE: since both llvm.x86.fma.vfmsubadd.ps and llvm.x86.fma.vfmaddsub.ps maps to
                             // __builtin_ia32_vfmaddsubps, only add minus if this comes from a
                             // subadd LLVM intrinsic, e.g. _mm256_fmsubadd_pd.
                             let mut new_args = args.to_vec();
                             let arg3 = &mut new_args[2];
-                            *arg3 = builder.context.new_unary_op(None, UnaryOp::Minus, arg3.get_type(), *arg3);
+                            *arg3 = builder.context.new_unary_op(
+                                None,
+                                UnaryOp::Minus,
+                                arg3.get_type(),
+                                *arg3,
+                            );
                             args = new_args.into();
-                        },
+                        }
                         _ => (),
                     }
                 }
-            },
+            }
             "__builtin_ia32_ldmxcsr" => {
                 // The builtin __builtin_ia32_ldmxcsr takes an integer value while llvm.x86.sse.ldmxcsr takes a pointer,
                 // so dereference the pointer.
@@ -309,23 +447,31 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 let arg1 = builder.context.new_cast(None, args[0], uint_ptr_type);
                 new_args[0] = arg1.dereference(None).to_rvalue();
                 args = new_args.into();
-            },
-            "__builtin_ia32_rcp14sd_mask" | "__builtin_ia32_rcp14ss_mask" | "__builtin_ia32_rsqrt14sd_mask"
-                | "__builtin_ia32_rsqrt14ss_mask" => {
+            }
+            "__builtin_ia32_rcp14sd_mask"
+            | "__builtin_ia32_rcp14ss_mask"
+            | "__builtin_ia32_rsqrt14sd_mask"
+            | "__builtin_ia32_rsqrt14ss_mask" => {
                 let new_args = args.to_vec();
                 args = vec![new_args[1], new_args[0], new_args[2], new_args[3]].into();
-            },
+            }
             "__builtin_ia32_sqrtsd_mask_round" | "__builtin_ia32_sqrtss_mask_round" => {
                 let new_args = args.to_vec();
                 args = vec![new_args[1], new_args[0], new_args[2], new_args[3], new_args[4]].into();
-            },
-            "__builtin_ia32_vpshrdv_v8di" | "__builtin_ia32_vpshrdv_v4di" | "__builtin_ia32_vpshrdv_v2di" |
-                "__builtin_ia32_vpshrdv_v16si" | "__builtin_ia32_vpshrdv_v8si" | "__builtin_ia32_vpshrdv_v4si" |
-                "__builtin_ia32_vpshrdv_v32hi" | "__builtin_ia32_vpshrdv_v16hi" | "__builtin_ia32_vpshrdv_v8hi" => {
+            }
+            "__builtin_ia32_vpshrdv_v8di"
+            | "__builtin_ia32_vpshrdv_v4di"
+            | "__builtin_ia32_vpshrdv_v2di"
+            | "__builtin_ia32_vpshrdv_v16si"
+            | "__builtin_ia32_vpshrdv_v8si"
+            | "__builtin_ia32_vpshrdv_v4si"
+            | "__builtin_ia32_vpshrdv_v32hi"
+            | "__builtin_ia32_vpshrdv_v16hi"
+            | "__builtin_ia32_vpshrdv_v8hi" => {
                 // The first two arguments are reversed, compared to LLVM.
                 let new_args = args.to_vec();
                 args = vec![new_args[1], new_args[0], new_args[2]].into();
-            },
+            }
             _ => (),
         }
     }
@@ -333,16 +479,27 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
     args
 }
 
-pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc, 'tcx>, mut return_value: RValue<'gcc>, func_name: &str, args: &[RValue<'gcc>], args_adjusted: bool, orig_args: &[RValue<'gcc>]) -> RValue<'gcc> {
+pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(
+    builder: &Builder<'a, 'gcc, 'tcx>,
+    mut return_value: RValue<'gcc>,
+    func_name: &str,
+    args: &[RValue<'gcc>],
+    args_adjusted: bool,
+    orig_args: &[RValue<'gcc>],
+) -> RValue<'gcc> {
     match func_name {
         "__builtin_ia32_vfmaddss3_round" | "__builtin_ia32_vfmaddsd3_round" => {
-            #[cfg(feature="master")]
+            #[cfg(feature = "master")]
             {
                 let zero = builder.context.new_rvalue_zero(builder.int_type);
-                return_value = builder.context.new_vector_access(None, return_value, zero).to_rvalue();
+                return_value =
+                    builder.context.new_vector_access(None, return_value, zero).to_rvalue();
             }
-        },
-        "__builtin_ia32_addcarryx_u64" | "__builtin_ia32_sbb_u64" | "__builtin_ia32_addcarryx_u32" | "__builtin_ia32_sbb_u32" => {
+        }
+        "__builtin_ia32_addcarryx_u64"
+        | "__builtin_ia32_sbb_u64"
+        | "__builtin_ia32_addcarryx_u32"
+        | "__builtin_ia32_sbb_u32" => {
             // Both llvm.x86.addcarry.32 and llvm.x86.addcarryx.u32 points to the same GCC builtin,
             // but only the former requires adjusting the return value.
             // Those 2 LLVM intrinsics differ by their argument count, that's why we check if the
@@ -351,10 +508,16 @@ pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc,
                 let last_arg = args.last().expect("last arg");
                 let field1 = builder.context.new_field(None, builder.u8_type, "carryFlag");
                 let field2 = builder.context.new_field(None, args[1].get_type(), "carryResult");
-                let struct_type = builder.context.new_struct_type(None, "addcarryResult", &[field1, field2]);
-                return_value = builder.context.new_struct_constructor(None, struct_type.as_type(), None, &[return_value, last_arg.dereference(None).to_rvalue()]);
+                let struct_type =
+                    builder.context.new_struct_type(None, "addcarryResult", &[field1, field2]);
+                return_value = builder.context.new_struct_constructor(
+                    None,
+                    struct_type.as_type(),
+                    None,
+                    &[return_value, last_arg.dereference(None).to_rvalue()],
+                );
             }
-        },
+        }
         "__builtin_ia32_stmxcsr" => {
             // The builtin __builtin_ia32_stmxcsr returns a value while llvm.x86.sse.stmxcsr writes
             // the result in its pointer argument.
@@ -366,20 +529,24 @@ pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc,
             // The return value was assigned to the result pointer above. In order to not call the
             // builtin twice, we overwrite the return value with a dummy value.
             return_value = builder.context.new_rvalue_zero(builder.int_type);
-        },
+        }
         "__builtin_ia32_rdrand64_step" => {
             let random_number = args[0].dereference(None).to_rvalue();
-            let success_variable = builder.current_func().new_local(None, return_value.get_type(), "success");
+            let success_variable =
+                builder.current_func().new_local(None, return_value.get_type(), "success");
             builder.llbb().add_assignment(None, success_variable, return_value);
 
             let field1 = builder.context.new_field(None, random_number.get_type(), "random_number");
             let field2 = builder.context.new_field(None, return_value.get_type(), "success");
-            let struct_type = builder.context.new_struct_type(None, "rdrand_result", &[field1, field2]);
-            return_value = builder.context.new_struct_constructor(None, struct_type.as_type(), None, &[
-                random_number,
-                success_variable.to_rvalue(),
-            ]);
-        },
+            let struct_type =
+                builder.context.new_struct_type(None, "rdrand_result", &[field1, field2]);
+            return_value = builder.context.new_struct_constructor(
+                None,
+                struct_type.as_type(),
+                None,
+                &[random_number, success_variable.to_rvalue()],
+            );
+        }
         _ => (),
     }
 
@@ -391,23 +558,33 @@ pub fn ignore_arg_cast(func_name: &str, index: usize, args_len: usize) -> bool {
     match func_name {
         // NOTE: these intrinsics have missing parameters before the last one, so ignore the
         // last argument type check.
-        "__builtin_ia32_maxps512_mask" | "__builtin_ia32_maxpd512_mask"
-            | "__builtin_ia32_minps512_mask" | "__builtin_ia32_minpd512_mask" | "__builtin_ia32_sqrtps512_mask"
-            | "__builtin_ia32_sqrtpd512_mask" | "__builtin_ia32_addps512_mask" | "__builtin_ia32_addpd512_mask"
-            | "__builtin_ia32_subps512_mask" | "__builtin_ia32_subpd512_mask"
-            | "__builtin_ia32_mulps512_mask" | "__builtin_ia32_mulpd512_mask"
-            | "__builtin_ia32_divps512_mask" | "__builtin_ia32_divpd512_mask"
-            | "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask"
-            | "__builtin_ia32_cvtdq2ps512_mask" | "__builtin_ia32_cvtudq2ps512_mask" => {
-                if index == args_len - 1 {
-                    return true;
-                }
-            },
+        "__builtin_ia32_maxps512_mask"
+        | "__builtin_ia32_maxpd512_mask"
+        | "__builtin_ia32_minps512_mask"
+        | "__builtin_ia32_minpd512_mask"
+        | "__builtin_ia32_sqrtps512_mask"
+        | "__builtin_ia32_sqrtpd512_mask"
+        | "__builtin_ia32_addps512_mask"
+        | "__builtin_ia32_addpd512_mask"
+        | "__builtin_ia32_subps512_mask"
+        | "__builtin_ia32_subpd512_mask"
+        | "__builtin_ia32_mulps512_mask"
+        | "__builtin_ia32_mulpd512_mask"
+        | "__builtin_ia32_divps512_mask"
+        | "__builtin_ia32_divpd512_mask"
+        | "__builtin_ia32_vfmaddsubps512_mask"
+        | "__builtin_ia32_vfmaddsubpd512_mask"
+        | "__builtin_ia32_cvtdq2ps512_mask"
+        | "__builtin_ia32_cvtudq2ps512_mask" => {
+            if index == args_len - 1 {
+                return true;
+            }
+        }
         "__builtin_ia32_rndscaless_mask_round" | "__builtin_ia32_rndscalesd_mask_round" => {
             if index == 2 || index == 3 {
                 return true;
             }
-        },
+        }
         "__builtin_ia32_vfmaddps512_mask" | "__builtin_ia32_vfmaddpd512_mask" => {
             // Since there are two LLVM intrinsics that map to each of these GCC builtins and only
             // one of them has a missing parameter before the last one, we check the number of
@@ -415,49 +592,50 @@ pub fn ignore_arg_cast(func_name: &str, index: usize, args_len: usize) -> bool {
             if args_len == 4 && index == args_len - 1 {
                 return true;
             }
-        },
+        }
         // NOTE: the LLVM intrinsic receives 3 floats, but the GCC builtin requires 3 vectors.
         "__builtin_ia32_vfmaddss3_round" | "__builtin_ia32_vfmaddsd3_round" => return true,
-        "__builtin_ia32_vplzcntd_512_mask" | "__builtin_ia32_vplzcntd_256_mask" | "__builtin_ia32_vplzcntd_128_mask"
-            | "__builtin_ia32_vplzcntq_512_mask" | "__builtin_ia32_vplzcntq_256_mask" | "__builtin_ia32_vplzcntq_128_mask" => {
+        "__builtin_ia32_vplzcntd_512_mask"
+        | "__builtin_ia32_vplzcntd_256_mask"
+        | "__builtin_ia32_vplzcntd_128_mask"
+        | "__builtin_ia32_vplzcntq_512_mask"
+        | "__builtin_ia32_vplzcntq_256_mask"
+        | "__builtin_ia32_vplzcntq_128_mask" => {
             if index == args_len - 1 {
                 return true;
             }
-        },
+        }
         _ => (),
     }
 
     false
 }
 
-#[cfg(not(feature="master"))]
+#[cfg(not(feature = "master"))]
 pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
-    let gcc_name =
-        match name {
-            "llvm.x86.sse2.pause" => {
-                // NOTE: pause is only a hint, so we use a dummy built-in because target built-ins
-                // are not supported in libgccjit 12.
-                "__builtin_inff"
-            },
-            "llvm.x86.xgetbv" => {
-                "__builtin_trap"
-            },
-            _ => unimplemented!("unsupported LLVM intrinsic {}", name),
-        };
+    let gcc_name = match name {
+        "llvm.x86.sse2.pause" => {
+            // NOTE: pause is only a hint, so we use a dummy built-in because target built-ins
+            // are not supported in libgccjit 12.
+            "__builtin_inff"
+        }
+        "llvm.x86.xgetbv" => "__builtin_trap",
+        _ => unimplemented!("unsupported LLVM intrinsic {}", name),
+    };
     let func = cx.context.get_builtin_function(gcc_name);
     cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
     return func;
 }
 
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
     match name {
         "llvm.prefetch" => {
             let gcc_name = "__builtin_prefetch";
             let func = cx.context.get_builtin_function(gcc_name);
             cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
-            return func
-        },
+            return func;
+        }
         _ => (),
     }
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 0849c6266f19..22176ab9cd7a 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1,43 +1,48 @@
 pub mod llvm;
 mod simd;
 
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 use std::iter;
 
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 use gccjit::FunctionType;
 use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp};
-use rustc_codegen_ssa::MemFlags;
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::common::IntPredicate;
+use rustc_codegen_ssa::errors::InvalidMonomorphization;
 use rustc_codegen_ssa::mir::operand::{OperandRef, OperandValue};
 use rustc_codegen_ssa::mir::place::PlaceRef;
-use rustc_codegen_ssa::traits::{ArgAbiMethods, BuilderMethods, ConstMethods, IntrinsicCallMethods};
-#[cfg(feature="master")]
+use rustc_codegen_ssa::traits::{
+    ArgAbiMethods, BuilderMethods, ConstMethods, IntrinsicCallMethods,
+};
+#[cfg(feature = "master")]
 use rustc_codegen_ssa::traits::{BaseTypeMethods, MiscMethods};
-use rustc_codegen_ssa::errors::InvalidMonomorphization;
+use rustc_codegen_ssa::MemFlags;
 use rustc_middle::bug;
-use rustc_middle::ty::{self, Instance, Ty};
 use rustc_middle::ty::layout::LayoutOf;
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt};
-use rustc_span::{Span, Symbol, symbol::kw, sym};
-use rustc_target::abi::HasDataLayout;
+use rustc_middle::ty::{self, Instance, Ty};
+use rustc_span::{sym, symbol::kw, Span, Symbol};
 use rustc_target::abi::call::{ArgAbi, FnAbi, PassMode};
-use rustc_target::spec::PanicStrategy;
-#[cfg(feature="master")]
+use rustc_target::abi::HasDataLayout;
+#[cfg(feature = "master")]
 use rustc_target::spec::abi::Abi;
+use rustc_target::spec::PanicStrategy;
 
-use crate::abi::GccType;
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 use crate::abi::FnAbiGccExt;
+use crate::abi::GccType;
 use crate::builder::Builder;
 use crate::common::{SignType, TypeReflection};
 use crate::context::CodegenCx;
-use crate::type_of::LayoutGccExt;
 use crate::intrinsic::simd::generic_simd_intrinsic;
+use crate::type_of::LayoutGccExt;
 
-fn get_simple_intrinsic<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, name: Symbol) -> Option<Function<'gcc>> {
+fn get_simple_intrinsic<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    name: Symbol,
+) -> Option<Function<'gcc>> {
     let gcc_name = match name {
         sym::sqrtf32 => "sqrtf",
         sym::sqrtf64 => "sqrt",
@@ -90,7 +95,14 @@ fn get_simple_intrinsic<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, name: Symbol) ->
 }
 
 impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
-    fn codegen_intrinsic_call(&mut self, instance: Instance<'tcx>, fn_abi: &FnAbi<'tcx, Ty<'tcx>>, args: &[OperandRef<'tcx, RValue<'gcc>>], llresult: RValue<'gcc>, span: Span) -> Result<(), Instance<'tcx>> {
+    fn codegen_intrinsic_call(
+        &mut self,
+        instance: Instance<'tcx>,
+        fn_abi: &FnAbi<'tcx, Ty<'tcx>>,
+        args: &[OperandRef<'tcx, RValue<'gcc>>],
+        llresult: RValue<'gcc>,
+        span: Span,
+    ) -> Result<(), Instance<'tcx>> {
         let tcx = self.tcx;
         let callee_ty = instance.ty(tcx, ty::ParamEnv::reveal_all());
 
@@ -110,268 +122,274 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         let result = PlaceRef::new_sized(llresult, fn_abi.ret.layout);
 
         let simple = get_simple_intrinsic(self, name);
-        let llval =
-            match name {
-                _ if simple.is_some() => {
-                    // FIXME(antoyo): remove this cast when the API supports function.
-                    let func = unsafe { std::mem::transmute(simple.expect("simple")) };
-                    self.call(self.type_void(), None, None, func, &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(), None)
-                },
-                sym::likely => {
-                    self.expect(args[0].immediate(), true)
-                }
-                sym::unlikely => {
-                    self.expect(args[0].immediate(), false)
-                }
-                sym::is_val_statically_known => {
-                    let a = args[0].immediate();
-                    let builtin = self.context.get_builtin_function("__builtin_constant_p");
-                    let res = self.context.new_call(None, builtin, &[a]);
-                    self.icmp(IntPredicate::IntEQ, res, self.const_i32(0))
-                }
-                kw::Try => {
-                    try_intrinsic(
-                        self,
-                        args[0].immediate(),
-                        args[1].immediate(),
-                        args[2].immediate(),
-                        llresult,
-                    );
-                    return Ok(());
-                }
-                sym::breakpoint => {
-                    unimplemented!();
-                }
-                sym::va_copy => {
-                    unimplemented!();
-                }
-                sym::va_arg => {
-                    unimplemented!();
-                }
+        let llval = match name {
+            _ if simple.is_some() => {
+                // FIXME(antoyo): remove this cast when the API supports function.
+                let func = unsafe { std::mem::transmute(simple.expect("simple")) };
+                self.call(
+                    self.type_void(),
+                    None,
+                    None,
+                    func,
+                    &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
+                    None,
+                )
+            }
+            sym::likely => self.expect(args[0].immediate(), true),
+            sym::unlikely => self.expect(args[0].immediate(), false),
+            sym::is_val_statically_known => {
+                let a = args[0].immediate();
+                let builtin = self.context.get_builtin_function("__builtin_constant_p");
+                let res = self.context.new_call(None, builtin, &[a]);
+                self.icmp(IntPredicate::IntEQ, res, self.const_i32(0))
+            }
+            kw::Try => {
+                try_intrinsic(
+                    self,
+                    args[0].immediate(),
+                    args[1].immediate(),
+                    args[2].immediate(),
+                    llresult,
+                );
+                return Ok(());
+            }
+            sym::breakpoint => {
+                unimplemented!();
+            }
+            sym::va_copy => {
+                unimplemented!();
+            }
+            sym::va_arg => {
+                unimplemented!();
+            }
 
-                sym::volatile_load | sym::unaligned_volatile_load => {
-                    let tp_ty = fn_args.type_at(0);
-                    let ptr = args[0].immediate();
-                    let load =
-                        if let PassMode::Cast { cast: ty, pad_i32: _ } = &fn_abi.ret.mode {
-                            let gcc_ty = ty.gcc_type(self);
-                            self.volatile_load(gcc_ty, ptr)
+            sym::volatile_load | sym::unaligned_volatile_load => {
+                let tp_ty = fn_args.type_at(0);
+                let ptr = args[0].immediate();
+                let load = if let PassMode::Cast { cast: ty, pad_i32: _ } = &fn_abi.ret.mode {
+                    let gcc_ty = ty.gcc_type(self);
+                    self.volatile_load(gcc_ty, ptr)
+                } else {
+                    self.volatile_load(self.layout_of(tp_ty).gcc_type(self), ptr)
+                };
+                // TODO(antoyo): set alignment.
+                self.to_immediate(load, self.layout_of(tp_ty))
+            }
+            sym::volatile_store => {
+                let dst = args[0].deref(self.cx());
+                args[1].val.volatile_store(self, dst);
+                return Ok(());
+            }
+            sym::unaligned_volatile_store => {
+                let dst = args[0].deref(self.cx());
+                args[1].val.unaligned_volatile_store(self, dst);
+                return Ok(());
+            }
+            sym::prefetch_read_data
+            | sym::prefetch_write_data
+            | sym::prefetch_read_instruction
+            | sym::prefetch_write_instruction => {
+                unimplemented!();
+            }
+            sym::ctlz
+            | sym::ctlz_nonzero
+            | sym::cttz
+            | sym::cttz_nonzero
+            | sym::ctpop
+            | sym::bswap
+            | sym::bitreverse
+            | sym::rotate_left
+            | sym::rotate_right
+            | sym::saturating_add
+            | sym::saturating_sub => {
+                let ty = arg_tys[0];
+                match int_type_width_signed(ty, self) {
+                    Some((width, signed)) => match name {
+                        sym::ctlz | sym::cttz => {
+                            let func = self.current_func.borrow().expect("func");
+                            let then_block = func.new_block("then");
+                            let else_block = func.new_block("else");
+                            let after_block = func.new_block("after");
+
+                            let arg = args[0].immediate();
+                            let result = func.new_local(None, arg.get_type(), "zeros");
+                            let zero = self.cx.gcc_zero(arg.get_type());
+                            let cond = self.gcc_icmp(IntPredicate::IntEQ, arg, zero);
+                            self.llbb().end_with_conditional(None, cond, then_block, else_block);
+
+                            let zero_result = self.cx.gcc_uint(arg.get_type(), width);
+                            then_block.add_assignment(None, result, zero_result);
+                            then_block.end_with_jump(None, after_block);
+
+                            // NOTE: since jumps were added in a place
+                            // count_leading_zeroes() does not expect, the current block
+                            // in the state need to be updated.
+                            self.switch_to_block(else_block);
+
+                            let zeros = match name {
+                                sym::ctlz => self.count_leading_zeroes(width, arg),
+                                sym::cttz => self.count_trailing_zeroes(width, arg),
+                                _ => unreachable!(),
+                            };
+                            self.llbb().add_assignment(None, result, zeros);
+                            self.llbb().end_with_jump(None, after_block);
+
+                            // NOTE: since jumps were added in a place rustc does not
+                            // expect, the current block in the state need to be updated.
+                            self.switch_to_block(after_block);
+
+                            result.to_rvalue()
                         }
-                        else {
-                            self.volatile_load(self.layout_of(tp_ty).gcc_type(self), ptr)
-                        };
-                    // TODO(antoyo): set alignment.
-                    self.to_immediate(load, self.layout_of(tp_ty))
-                }
-                sym::volatile_store => {
-                    let dst = args[0].deref(self.cx());
-                    args[1].val.volatile_store(self, dst);
-                    return Ok(());
-                }
-                sym::unaligned_volatile_store => {
-                    let dst = args[0].deref(self.cx());
-                    args[1].val.unaligned_volatile_store(self, dst);
-                    return Ok(());
-                }
-                sym::prefetch_read_data
-                    | sym::prefetch_write_data
-                    | sym::prefetch_read_instruction
-                    | sym::prefetch_write_instruction => {
-                        unimplemented!();
-                    }
-                sym::ctlz
-                    | sym::ctlz_nonzero
-                    | sym::cttz
-                    | sym::cttz_nonzero
-                    | sym::ctpop
-                    | sym::bswap
-                    | sym::bitreverse
-                    | sym::rotate_left
-                    | sym::rotate_right
-                    | sym::saturating_add
-                    | sym::saturating_sub => {
-                        let ty = arg_tys[0];
-                        match int_type_width_signed(ty, self) {
-                            Some((width, signed)) => match name {
-                                sym::ctlz | sym::cttz => {
-                                    let func = self.current_func.borrow().expect("func");
-                                    let then_block = func.new_block("then");
-                                    let else_block = func.new_block("else");
-                                    let after_block = func.new_block("after");
-
-                                    let arg = args[0].immediate();
-                                    let result = func.new_local(None, arg.get_type(), "zeros");
-                                    let zero = self.cx.gcc_zero(arg.get_type());
-                                    let cond = self.gcc_icmp(IntPredicate::IntEQ, arg, zero);
-                                    self.llbb().end_with_conditional(None, cond, then_block, else_block);
-
-                                    let zero_result = self.cx.gcc_uint(arg.get_type(), width);
-                                    then_block.add_assignment(None, result, zero_result);
-                                    then_block.end_with_jump(None, after_block);
-
-                                    // NOTE: since jumps were added in a place
-                                    // count_leading_zeroes() does not expect, the current block
-                                    // in the state need to be updated.
-                                    self.switch_to_block(else_block);
-
-                                    let zeros =
-                                        match name {
-                                            sym::ctlz => self.count_leading_zeroes(width, arg),
-                                            sym::cttz => self.count_trailing_zeroes(width, arg),
-                                            _ => unreachable!(),
-                                        };
-                                    self.llbb().add_assignment(None, result, zeros);
-                                    self.llbb().end_with_jump(None, after_block);
-
-                                    // NOTE: since jumps were added in a place rustc does not
-                                    // expect, the current block in the state need to be updated.
-                                    self.switch_to_block(after_block);
-
-                                    result.to_rvalue()
-                                }
-                                sym::ctlz_nonzero => {
-                                    self.count_leading_zeroes(width, args[0].immediate())
-                                },
-                                sym::cttz_nonzero => {
-                                    self.count_trailing_zeroes(width, args[0].immediate())
-                                }
-                                sym::ctpop => self.pop_count(args[0].immediate()),
-                                sym::bswap => {
-                                    if width == 8 {
-                                        args[0].immediate() // byte swap a u8/i8 is just a no-op
-                                    }
-                                    else {
-                                        self.gcc_bswap(args[0].immediate(), width)
-                                    }
-                                },
-                                sym::bitreverse => self.bit_reverse(width, args[0].immediate()),
-                                sym::rotate_left | sym::rotate_right => {
-                                    // TODO(antoyo): implement using algorithm from:
-                                    // https://blog.regehr.org/archives/1063
-                                    // for other platforms.
-                                    let is_left = name == sym::rotate_left;
-                                    let val = args[0].immediate();
-                                    let raw_shift = args[1].immediate();
-                                    if is_left {
-                                        self.rotate_left(val, raw_shift, width)
-                                    }
-                                    else {
-                                        self.rotate_right(val, raw_shift, width)
-                                    }
-                                },
-                                sym::saturating_add => {
-                                    self.saturating_add(args[0].immediate(), args[1].immediate(), signed, width)
-                                },
-                                sym::saturating_sub => {
-                                    self.saturating_sub(args[0].immediate(), args[1].immediate(), signed, width)
-                                },
-                                _ => bug!(),
-                            },
-                            None => {
-                                tcx.dcx().emit_err(InvalidMonomorphization::BasicIntegerType { span, name, ty });
-                                return Ok(());
+                        sym::ctlz_nonzero => self.count_leading_zeroes(width, args[0].immediate()),
+                        sym::cttz_nonzero => self.count_trailing_zeroes(width, args[0].immediate()),
+                        sym::ctpop => self.pop_count(args[0].immediate()),
+                        sym::bswap => {
+                            if width == 8 {
+                                args[0].immediate() // byte swap a u8/i8 is just a no-op
+                            } else {
+                                self.gcc_bswap(args[0].immediate(), width)
                             }
                         }
-                    }
-
-                sym::raw_eq => {
-                    use rustc_target::abi::Abi::*;
-                    let tp_ty = fn_args.type_at(0);
-                    let layout = self.layout_of(tp_ty).layout;
-                    let _use_integer_compare = match layout.abi() {
-                        Scalar(_) | ScalarPair(_, _) => true,
-                        Uninhabited | Vector { .. } => false,
-                        Aggregate { .. } => {
-                            // For rusty ABIs, small aggregates are actually passed
-                            // as `RegKind::Integer` (see `FnAbi::adjust_for_abi`),
-                            // so we re-use that same threshold here.
-                            layout.size() <= self.data_layout().pointer_size * 2
+                        sym::bitreverse => self.bit_reverse(width, args[0].immediate()),
+                        sym::rotate_left | sym::rotate_right => {
+                            // TODO(antoyo): implement using algorithm from:
+                            // https://blog.regehr.org/archives/1063
+                            // for other platforms.
+                            let is_left = name == sym::rotate_left;
+                            let val = args[0].immediate();
+                            let raw_shift = args[1].immediate();
+                            if is_left {
+                                self.rotate_left(val, raw_shift, width)
+                            } else {
+                                self.rotate_right(val, raw_shift, width)
+                            }
                         }
-                    };
-
-                    let a = args[0].immediate();
-                    let b = args[1].immediate();
-                    if layout.size().bytes() == 0 {
-                        self.const_bool(true)
-                    }
-                    /*else if use_integer_compare {
-                        let integer_ty = self.type_ix(layout.size.bits()); // FIXME(antoyo): LLVM creates an integer of 96 bits for [i32; 3], but gcc doesn't support this, so it creates an integer of 128 bits.
-                        let ptr_ty = self.type_ptr_to(integer_ty);
-                        let a_ptr = self.bitcast(a, ptr_ty);
-                        let a_val = self.load(integer_ty, a_ptr, layout.align.abi);
-                        let b_ptr = self.bitcast(b, ptr_ty);
-                        let b_val = self.load(integer_ty, b_ptr, layout.align.abi);
-                        self.icmp(IntPredicate::IntEQ, a_val, b_val)
-                    }*/
-                    else {
-                        let void_ptr_type = self.context.new_type::<*const ()>();
-                        let a_ptr = self.bitcast(a, void_ptr_type);
-                        let b_ptr = self.bitcast(b, void_ptr_type);
-                        let n = self.context.new_cast(None, self.const_usize(layout.size().bytes()), self.sizet_type);
-                        let builtin = self.context.get_builtin_function("memcmp");
-                        let cmp = self.context.new_call(None, builtin, &[a_ptr, b_ptr, n]);
-                        self.icmp(IntPredicate::IntEQ, cmp, self.const_i32(0))
+                        sym::saturating_add => self.saturating_add(
+                            args[0].immediate(),
+                            args[1].immediate(),
+                            signed,
+                            width,
+                        ),
+                        sym::saturating_sub => self.saturating_sub(
+                            args[0].immediate(),
+                            args[1].immediate(),
+                            signed,
+                            width,
+                        ),
+                        _ => bug!(),
+                    },
+                    None => {
+                        tcx.dcx().emit_err(InvalidMonomorphization::BasicIntegerType {
+                            span,
+                            name,
+                            ty,
+                        });
+                        return Ok(());
                     }
                 }
+            }
 
-                sym::compare_bytes => {
-                    let a = args[0].immediate();
-                    let b = args[1].immediate();
-                    let n = args[2].immediate();
+            sym::raw_eq => {
+                use rustc_target::abi::Abi::*;
+                let tp_ty = fn_args.type_at(0);
+                let layout = self.layout_of(tp_ty).layout;
+                let _use_integer_compare = match layout.abi() {
+                    Scalar(_) | ScalarPair(_, _) => true,
+                    Uninhabited | Vector { .. } => false,
+                    Aggregate { .. } => {
+                        // For rusty ABIs, small aggregates are actually passed
+                        // as `RegKind::Integer` (see `FnAbi::adjust_for_abi`),
+                        // so we re-use that same threshold here.
+                        layout.size() <= self.data_layout().pointer_size * 2
+                    }
+                };
 
+                let a = args[0].immediate();
+                let b = args[1].immediate();
+                if layout.size().bytes() == 0 {
+                    self.const_bool(true)
+                }
+                /*else if use_integer_compare {
+                    let integer_ty = self.type_ix(layout.size.bits()); // FIXME(antoyo): LLVM creates an integer of 96 bits for [i32; 3], but gcc doesn't support this, so it creates an integer of 128 bits.
+                    let ptr_ty = self.type_ptr_to(integer_ty);
+                    let a_ptr = self.bitcast(a, ptr_ty);
+                    let a_val = self.load(integer_ty, a_ptr, layout.align.abi);
+                    let b_ptr = self.bitcast(b, ptr_ty);
+                    let b_val = self.load(integer_ty, b_ptr, layout.align.abi);
+                    self.icmp(IntPredicate::IntEQ, a_val, b_val)
+                }*/
+                else {
                     let void_ptr_type = self.context.new_type::<*const ()>();
                     let a_ptr = self.bitcast(a, void_ptr_type);
                     let b_ptr = self.bitcast(b, void_ptr_type);
-
-                    // Here we assume that the `memcmp` provided by the target is a NOP for size 0.
+                    let n = self.context.new_cast(
+                        None,
+                        self.const_usize(layout.size().bytes()),
+                        self.sizet_type,
+                    );
                     let builtin = self.context.get_builtin_function("memcmp");
                     let cmp = self.context.new_call(None, builtin, &[a_ptr, b_ptr, n]);
-                    self.sext(cmp, self.type_ix(32))
+                    self.icmp(IntPredicate::IntEQ, cmp, self.const_i32(0))
                 }
+            }
 
-                sym::black_box => {
-                    args[0].val.store(self, result);
+            sym::compare_bytes => {
+                let a = args[0].immediate();
+                let b = args[1].immediate();
+                let n = args[2].immediate();
 
-                    let block = self.llbb();
-                    let extended_asm = block.add_extended_asm(None, "");
-                    extended_asm.add_input_operand(None, "r", result.llval);
-                    extended_asm.add_clobber("memory");
-                    extended_asm.set_volatile_flag(true);
+                let void_ptr_type = self.context.new_type::<*const ()>();
+                let a_ptr = self.bitcast(a, void_ptr_type);
+                let b_ptr = self.bitcast(b, void_ptr_type);
 
-                    // We have copied the value to `result` already.
-                    return Ok(());
+                // Here we assume that the `memcmp` provided by the target is a NOP for size 0.
+                let builtin = self.context.get_builtin_function("memcmp");
+                let cmp = self.context.new_call(None, builtin, &[a_ptr, b_ptr, n]);
+                self.sext(cmp, self.type_ix(32))
+            }
+
+            sym::black_box => {
+                args[0].val.store(self, result);
+
+                let block = self.llbb();
+                let extended_asm = block.add_extended_asm(None, "");
+                extended_asm.add_input_operand(None, "r", result.llval);
+                extended_asm.add_clobber("memory");
+                extended_asm.set_volatile_flag(true);
+
+                // We have copied the value to `result` already.
+                return Ok(());
+            }
+
+            sym::ptr_mask => {
+                let usize_type = self.context.new_type::<usize>();
+                let void_ptr_type = self.context.new_type::<*const ()>();
+
+                let ptr = args[0].immediate();
+                let mask = args[1].immediate();
+
+                let addr = self.bitcast(ptr, usize_type);
+                let masked = self.and(addr, mask);
+                self.bitcast(masked, void_ptr_type)
+            }
+
+            _ if name_str.starts_with("simd_") => {
+                match generic_simd_intrinsic(self, name, callee_ty, args, ret_ty, llret_ty, span) {
+                    Ok(llval) => llval,
+                    Err(()) => return Ok(()),
                 }
+            }
 
-                sym::ptr_mask => {
-                    let usize_type = self.context.new_type::<usize>();
-                    let void_ptr_type = self.context.new_type::<*const ()>();
-
-                    let ptr = args[0].immediate();
-                    let mask = args[1].immediate();
-
-                    let addr = self.bitcast(ptr, usize_type);
-                    let masked = self.and(addr, mask);
-                    self.bitcast(masked, void_ptr_type)
-                },
-
-                _ if name_str.starts_with("simd_") => {
-                    match generic_simd_intrinsic(self, name, callee_ty, args, ret_ty, llret_ty, span) {
-                        Ok(llval) => llval,
-                        Err(()) => return Ok(()),
-                    }
-                }
-
-                // Fall back to default body
-                _ => return Err(Instance::new(instance.def_id(), instance.args)),
-            };
+            // Fall back to default body
+            _ => return Err(Instance::new(instance.def_id(), instance.args)),
+        };
 
         if !fn_abi.ret.is_ignore() {
             if let PassMode::Cast { cast: ty, .. } = &fn_abi.ret.mode {
                 let ptr_llty = self.type_ptr_to(ty.gcc_type(self));
                 let ptr = self.pointercast(result.llval, ptr_llty);
                 self.store(llval, ptr, result.align);
-            }
-            else {
+            } else {
                 OperandRef::from_immediate_or_packed_pair(self, llval, result.layout)
                     .val
                     .store(self, result);
@@ -423,11 +441,21 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
 }
 
 impl<'a, 'gcc, 'tcx> ArgAbiMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
-    fn store_fn_arg(&mut self, arg_abi: &ArgAbi<'tcx, Ty<'tcx>>, idx: &mut usize, dst: PlaceRef<'tcx, Self::Value>) {
+    fn store_fn_arg(
+        &mut self,
+        arg_abi: &ArgAbi<'tcx, Ty<'tcx>>,
+        idx: &mut usize,
+        dst: PlaceRef<'tcx, Self::Value>,
+    ) {
         arg_abi.store_fn_arg(self, idx, dst)
     }
 
-    fn store_arg(&mut self, arg_abi: &ArgAbi<'tcx, Ty<'tcx>>, val: RValue<'gcc>, dst: PlaceRef<'tcx, RValue<'gcc>>) {
+    fn store_arg(
+        &mut self,
+        arg_abi: &ArgAbi<'tcx, Ty<'tcx>>,
+        val: RValue<'gcc>,
+        dst: PlaceRef<'tcx, RValue<'gcc>>,
+    ) {
         arg_abi.store(self, val, dst)
     }
 
@@ -438,8 +466,18 @@ impl<'a, 'gcc, 'tcx> ArgAbiMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
 
 pub trait ArgAbiExt<'gcc, 'tcx> {
     fn memory_ty(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc>;
-    fn store(&self, bx: &mut Builder<'_, 'gcc, 'tcx>, val: RValue<'gcc>, dst: PlaceRef<'tcx, RValue<'gcc>>);
-    fn store_fn_arg(&self, bx: &mut Builder<'_, 'gcc, 'tcx>, idx: &mut usize, dst: PlaceRef<'tcx, RValue<'gcc>>);
+    fn store(
+        &self,
+        bx: &mut Builder<'_, 'gcc, 'tcx>,
+        val: RValue<'gcc>,
+        dst: PlaceRef<'tcx, RValue<'gcc>>,
+    );
+    fn store_fn_arg(
+        &self,
+        bx: &mut Builder<'_, 'gcc, 'tcx>,
+        idx: &mut usize,
+        dst: PlaceRef<'tcx, RValue<'gcc>>,
+    );
 }
 
 impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
@@ -453,17 +491,20 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
     /// place for the original Rust type of this argument/return.
     /// Can be used for both storing formal arguments into Rust variables
     /// or results of call/invoke instructions into their destinations.
-    fn store(&self, bx: &mut Builder<'_, 'gcc, 'tcx>, val: RValue<'gcc>, dst: PlaceRef<'tcx, RValue<'gcc>>) {
+    fn store(
+        &self,
+        bx: &mut Builder<'_, 'gcc, 'tcx>,
+        val: RValue<'gcc>,
+        dst: PlaceRef<'tcx, RValue<'gcc>>,
+    ) {
         if self.is_ignore() {
             return;
         }
         if self.is_sized_indirect() {
             OperandValue::Ref(val, None, self.layout.align.abi).store(bx, dst)
-        }
-        else if self.is_unsized_indirect() {
+        } else if self.is_unsized_indirect() {
             bug!("unsized `ArgAbi` must be handled through `store_fn_arg`");
-        }
-        else if let PassMode::Cast { ref cast, .. } = self.mode {
+        } else if let PassMode::Cast { ref cast, .. } = self.mode {
             // FIXME(eddyb): Figure out when the simpler Store is safe, clang
             // uses it for i16 -> {i8, i8}, but not for i24 -> {i8, i8, i8}.
             let can_store_through_cast_ptr = false;
@@ -471,8 +512,7 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
                 let cast_ptr_llty = bx.type_ptr_to(cast.gcc_type(bx));
                 let cast_dst = bx.pointercast(dst.llval, cast_ptr_llty);
                 bx.store(val, cast_dst, self.layout.align.abi);
-            }
-            else {
+            } else {
                 // The actual return type is a struct, but the ABI
                 // adaptation code has cast it into some scalar type.  The
                 // code that follows is the only reliable way I have
@@ -508,35 +548,44 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
 
                 bx.lifetime_end(llscratch, scratch_size);
             }
-        }
-        else {
+        } else {
             OperandValue::Immediate(val).store(bx, dst);
         }
     }
 
-    fn store_fn_arg<'a>(&self, bx: &mut Builder<'a, 'gcc, 'tcx>, idx: &mut usize, dst: PlaceRef<'tcx, RValue<'gcc>>) {
+    fn store_fn_arg<'a>(
+        &self,
+        bx: &mut Builder<'a, 'gcc, 'tcx>,
+        idx: &mut usize,
+        dst: PlaceRef<'tcx, RValue<'gcc>>,
+    ) {
         let mut next = || {
             let val = bx.current_func().get_param(*idx as i32);
             *idx += 1;
             val.to_rvalue()
         };
         match self.mode {
-            PassMode::Ignore => {},
+            PassMode::Ignore => {}
             PassMode::Pair(..) => {
                 OperandValue::Pair(next(), next()).store(bx, dst);
-            },
+            }
             PassMode::Indirect { meta_attrs: Some(_), .. } => {
                 OperandValue::Ref(next(), Some(next()), self.layout.align.abi).store(bx, dst);
-            },
-            PassMode::Direct(_) | PassMode::Indirect { meta_attrs: None, .. } | PassMode::Cast { .. } => {
+            }
+            PassMode::Direct(_)
+            | PassMode::Indirect { meta_attrs: None, .. }
+            | PassMode::Cast { .. } => {
                 let next_arg = next();
                 self.store(bx, next_arg, dst);
-            },
+            }
         }
     }
 }
 
-fn int_type_width_signed<'gcc, 'tcx>(ty: Ty<'tcx>, cx: &CodegenCx<'gcc, 'tcx>) -> Option<(u64, bool)> {
+fn int_type_width_signed<'gcc, 'tcx>(
+    ty: Ty<'tcx>,
+    cx: &CodegenCx<'gcc, 'tcx>,
+) -> Option<(u64, bool)> {
     match ty.kind() {
         ty::Int(t) => Some((
             match t {
@@ -570,82 +619,76 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let typ = result_type.to_unsigned(self.cx);
 
         let value =
-            if result_type.is_signed(self.cx) {
-                self.gcc_int_cast(value, typ)
-            }
-            else {
-                value
-            };
+            if result_type.is_signed(self.cx) { self.gcc_int_cast(value, typ) } else { value };
 
         let context = &self.cx.context;
-        let result =
-            match width {
-                8 | 16 | 32 | 64 => {
-                    let mask = ((1u128 << width) - 1) as u64;
-                    let (m0, m1, m2) = if width > 16 {
-                        (
-                            context.new_rvalue_from_long(typ, (0x5555555555555555u64 & mask) as i64),
-                            context.new_rvalue_from_long(typ, (0x3333333333333333u64 & mask) as i64),
-                            context.new_rvalue_from_long(typ, (0x0f0f0f0f0f0f0f0fu64 & mask) as i64),
-                        )
-                    } else {
-                        (
-                            context.new_rvalue_from_int(typ, (0x5555u64 & mask) as i32),
-                            context.new_rvalue_from_int(typ, (0x3333u64 & mask) as i32),
-                            context.new_rvalue_from_int(typ, (0x0f0fu64 & mask) as i32),
-                        )
-                    };
-                    let one = context.new_rvalue_from_int(typ, 1);
-                    let two = context.new_rvalue_from_int(typ, 2);
-                    let four = context.new_rvalue_from_int(typ, 4);
+        let result = match width {
+            8 | 16 | 32 | 64 => {
+                let mask = ((1u128 << width) - 1) as u64;
+                let (m0, m1, m2) = if width > 16 {
+                    (
+                        context.new_rvalue_from_long(typ, (0x5555555555555555u64 & mask) as i64),
+                        context.new_rvalue_from_long(typ, (0x3333333333333333u64 & mask) as i64),
+                        context.new_rvalue_from_long(typ, (0x0f0f0f0f0f0f0f0fu64 & mask) as i64),
+                    )
+                } else {
+                    (
+                        context.new_rvalue_from_int(typ, (0x5555u64 & mask) as i32),
+                        context.new_rvalue_from_int(typ, (0x3333u64 & mask) as i32),
+                        context.new_rvalue_from_int(typ, (0x0f0fu64 & mask) as i32),
+                    )
+                };
+                let one = context.new_rvalue_from_int(typ, 1);
+                let two = context.new_rvalue_from_int(typ, 2);
+                let four = context.new_rvalue_from_int(typ, 4);
 
-                    // First step.
-                    let left = self.lshr(value, one);
-                    let left = self.and(left, m0);
-                    let right = self.and(value, m0);
-                    let right = self.shl(right, one);
-                    let step1 = self.or(left, right);
+                // First step.
+                let left = self.lshr(value, one);
+                let left = self.and(left, m0);
+                let right = self.and(value, m0);
+                let right = self.shl(right, one);
+                let step1 = self.or(left, right);
 
-                    // Second step.
-                    let left = self.lshr(step1, two);
-                    let left = self.and(left, m1);
-                    let right = self.and(step1, m1);
-                    let right = self.shl(right, two);
-                    let step2 = self.or(left, right);
+                // Second step.
+                let left = self.lshr(step1, two);
+                let left = self.and(left, m1);
+                let right = self.and(step1, m1);
+                let right = self.shl(right, two);
+                let step2 = self.or(left, right);
 
-                    // Third step.
-                    let left = self.lshr(step2, four);
-                    let left = self.and(left, m2);
-                    let right = self.and(step2, m2);
-                    let right = self.shl(right, four);
-                    let step3 = self.or(left, right);
+                // Third step.
+                let left = self.lshr(step2, four);
+                let left = self.and(left, m2);
+                let right = self.and(step2, m2);
+                let right = self.shl(right, four);
+                let step3 = self.or(left, right);
 
-                    // Fourth step.
-                    if width == 8 {
-                        step3
-                    } else {
-                        self.gcc_bswap(step3, width)
-                    }
-                },
-                128 => {
-                    // TODO(antoyo): find a more efficient implementation?
-                    let sixty_four = self.gcc_int(typ, 64);
-                    let right_shift = self.gcc_lshr(value, sixty_four);
-                    let high = self.gcc_int_cast(right_shift, self.u64_type);
-                    let low = self.gcc_int_cast(value, self.u64_type);
+                // Fourth step.
+                if width == 8 {
+                    step3
+                } else {
+                    self.gcc_bswap(step3, width)
+                }
+            }
+            128 => {
+                // TODO(antoyo): find a more efficient implementation?
+                let sixty_four = self.gcc_int(typ, 64);
+                let right_shift = self.gcc_lshr(value, sixty_four);
+                let high = self.gcc_int_cast(right_shift, self.u64_type);
+                let low = self.gcc_int_cast(value, self.u64_type);
 
-                    let reversed_high = self.bit_reverse(64, high);
-                    let reversed_low = self.bit_reverse(64, low);
+                let reversed_high = self.bit_reverse(64, high);
+                let reversed_low = self.bit_reverse(64, low);
 
-                    let new_low = self.gcc_int_cast(reversed_high, typ);
-                    let new_high = self.shl(self.gcc_int_cast(reversed_low, typ), sixty_four);
+                let new_low = self.gcc_int_cast(reversed_high, typ);
+                let new_high = self.shl(self.gcc_int_cast(reversed_low, typ), sixty_four);
 
-                    self.gcc_or(new_low, new_high, self.loc)
-                },
-                _ => {
-                    panic!("cannot bit reverse with width = {}", width);
-                },
-            };
+                self.gcc_or(new_low, new_high, self.location)
+            }
+            _ => {
+                panic!("cannot bit reverse with width = {}", width);
+            }
+        };
 
         self.gcc_int_cast(result, result_type)
     }
@@ -685,56 +728,54 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let first_elem = self.context.new_array_access(None, result, zero);
                 let first_value = self.gcc_int_cast(self.context.new_call(None, clzll, &[high]), arg_type);
                 self.llbb()
-                    .add_assignment(self.loc, first_elem, first_value);
+                    .add_assignment(self.location, first_elem, first_value);
 
-                let second_elem = self.context.new_array_access(self.loc, result, one);
-                let cast = self.gcc_int_cast(self.context.new_call(self.loc, clzll, &[low]), arg_type);
+                let second_elem = self.context.new_array_access(self.location, result, one);
+                let cast = self.gcc_int_cast(self.context.new_call(self.location, clzll, &[low]), arg_type);
                 let second_value = self.add(cast, sixty_four);
                 self.llbb()
-                    .add_assignment(self.loc, second_elem, second_value);
+                    .add_assignment(self.location, second_elem, second_value);
 
-                let third_elem = self.context.new_array_access(self.loc, result, two);
+                let third_elem = self.context.new_array_access(self.location, result, two);
                 let third_value = self.const_uint(arg_type, 128);
                 self.llbb()
-                    .add_assignment(self.loc, third_elem, third_value);
+                    .add_assignment(self.location, third_elem, third_value);
 
-                let not_high = self.context.new_unary_op(self.loc, UnaryOp::LogicalNegate, self.u64_type, high);
-                let not_low = self.context.new_unary_op(self.loc, UnaryOp::LogicalNegate, self.u64_type, low);
+                let not_high = self.context.new_unary_op(self.location, UnaryOp::LogicalNegate, self.u64_type, high);
+                let not_low = self.context.new_unary_op(self.location, UnaryOp::LogicalNegate, self.u64_type, low);
                 let not_low_and_not_high = not_low & not_high;
                 let index = not_high + not_low_and_not_high;
                 // NOTE: the following cast is necessary to avoid a GIMPLE verification failure in
                 // gcc.
                 // TODO(antoyo): do the correct verification in libgccjit to avoid an error at the
                 // compilation stage.
-                let index = self.context.new_cast(self.loc, index, self.i32_type);
+                let index = self.context.new_cast(self.location, index, self.i32_type);
 
-                let res = self.context.new_array_access(self.loc, result, index);
+                let res = self.context.new_array_access(self.location, result, index);
 
                 return self.gcc_int_cast(res.to_rvalue(), arg_type);
             }
             else {
                 let count_leading_zeroes = self.context.get_builtin_function("__builtin_clzll");
-                let arg = self.context.new_cast(self.loc, arg, self.ulonglong_type);
+                let arg = self.context.new_cast(self.location, arg, self.ulonglong_type);
                 let diff = self.ulonglong_type.get_size() as i64 - arg_type.get_size() as i64;
                 let diff = self.context.new_rvalue_from_long(self.int_type, diff * 8);
-                let res = self.context.new_call(self.loc, count_leading_zeroes, &[arg]) - diff;
-                return self.context.new_cast(self.loc, res, arg_type);
+                let res = self.context.new_call(self.location, count_leading_zeroes, &[arg]) - diff;
+                return self.context.new_cast(self.location, res, arg_type);
             };
         let count_leading_zeroes = self.context.get_builtin_function(count_leading_zeroes);
-        let res = self.context.new_call(self.loc, count_leading_zeroes, &[arg]);
-        self.context.new_cast(self.loc, res, arg_type)
+        let res = self.context.new_call(self.location, count_leading_zeroes, &[arg]);
+        self.context.new_cast(self.location, res, arg_type)
     }
 
     fn count_trailing_zeroes(&mut self, _width: u64, arg: RValue<'gcc>) -> RValue<'gcc> {
         let result_type = arg.get_type();
-        let arg =
-            if result_type.is_signed(self.cx) {
-                let new_type = result_type.to_unsigned(self.cx);
-                self.gcc_int_cast(arg, new_type)
-            }
-            else {
-                arg
-            };
+        let arg = if result_type.is_signed(self.cx) {
+            let new_type = result_type.to_unsigned(self.cx);
+            self.gcc_int_cast(arg, new_type)
+        } else {
+            arg
+        };
         let arg_type = arg.get_type();
         let (count_trailing_zeroes, expected_type) =
             // TODO(antoyo): write a new function Type::is_compatible_with(&Type) and use it here
@@ -766,58 +807,56 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
                 let ctzll = self.context.get_builtin_function("__builtin_ctzll");
 
-                let first_elem = self.context.new_array_access(self.loc, result, zero);
-                let first_value = self.gcc_int_cast(self.context.new_call(self.loc, ctzll, &[low]), arg_type);
+                let first_elem = self.context.new_array_access(self.location, result, zero);
+                let first_value = self.gcc_int_cast(self.context.new_call(self.location, ctzll, &[low]), arg_type);
                 self.llbb()
-                    .add_assignment(self.loc, first_elem, first_value);
+                    .add_assignment(self.location, first_elem, first_value);
 
-                let second_elem = self.context.new_array_access(self.loc, result, one);
-                let second_value = self.gcc_add(self.gcc_int_cast(self.context.new_call(self.loc, ctzll, &[high]), arg_type), sixty_four);
+                let second_elem = self.context.new_array_access(self.location, result, one);
+                let second_value = self.gcc_add(self.gcc_int_cast(self.context.new_call(self.location, ctzll, &[high]), arg_type), sixty_four);
                 self.llbb()
-                    .add_assignment(self.loc, second_elem, second_value);
+                    .add_assignment(self.location, second_elem, second_value);
 
-                let third_elem = self.context.new_array_access(self.loc, result, two);
+                let third_elem = self.context.new_array_access(self.location, result, two);
                 let third_value = self.gcc_int(arg_type, 128);
                 self.llbb()
-                    .add_assignment(self.loc, third_elem, third_value);
+                    .add_assignment(self.location, third_elem, third_value);
 
-                let not_low = self.context.new_unary_op(self.loc, UnaryOp::LogicalNegate, self.u64_type, low);
-                let not_high = self.context.new_unary_op(self.loc, UnaryOp::LogicalNegate, self.u64_type, high);
+                let not_low = self.context.new_unary_op(self.location, UnaryOp::LogicalNegate, self.u64_type, low);
+                let not_high = self.context.new_unary_op(self.location, UnaryOp::LogicalNegate, self.u64_type, high);
                 let not_low_and_not_high = not_low & not_high;
                 let index = not_low + not_low_and_not_high;
                 // NOTE: the following cast is necessary to avoid a GIMPLE verification failure in
                 // gcc.
                 // TODO(antoyo): do the correct verification in libgccjit to avoid an error at the
                 // compilation stage.
-                let index = self.context.new_cast(self.loc, index, self.i32_type);
+                let index = self.context.new_cast(self.location, index, self.i32_type);
 
-                let res = self.context.new_array_access(self.loc, result, index);
+                let res = self.context.new_array_access(self.location, result, index);
 
                 return self.gcc_int_cast(res.to_rvalue(), result_type);
             }
             else {
                 let count_trailing_zeroes = self.context.get_builtin_function("__builtin_ctzll");
                 let arg_size = arg_type.get_size();
-                let casted_arg = self.context.new_cast(self.loc, arg, self.ulonglong_type);
+                let casted_arg = self.context.new_cast(self.location, arg, self.ulonglong_type);
                 let byte_diff = self.ulonglong_type.get_size() as i64 - arg_size as i64;
                 let diff = self.context.new_rvalue_from_long(self.int_type, byte_diff * 8);
                 let mask = self.context.new_rvalue_from_long(arg_type, -1); // To get the value with all bits set.
-                let masked = mask & self.context.new_unary_op(self.loc, UnaryOp::BitwiseNegate, arg_type, arg);
-                let cond = self.context.new_comparison(self.loc, ComparisonOp::Equals, masked, mask);
-                let diff = diff * self.context.new_cast(self.loc, cond, self.int_type);
-                let res = self.context.new_call(self.loc, count_trailing_zeroes, &[casted_arg]) - diff;
-                return self.context.new_cast(self.loc, res, result_type);
+                let masked = mask & self.context.new_unary_op(self.location, UnaryOp::BitwiseNegate, arg_type, arg);
+                let cond = self.context.new_comparison(self.location, ComparisonOp::Equals, masked, mask);
+                let diff = diff * self.context.new_cast(self.location, cond, self.int_type);
+                let res = self.context.new_call(self.location, count_trailing_zeroes, &[casted_arg]) - diff;
+                return self.context.new_cast(self.location, res, result_type);
             };
         let count_trailing_zeroes = self.context.get_builtin_function(count_trailing_zeroes);
-        let arg =
-            if arg_type != expected_type {
-                self.context.new_cast(self.loc, arg, expected_type)
-            }
-            else {
-                arg
-            };
-        let res = self.context.new_call(self.loc, count_trailing_zeroes, &[arg]);
-        self.context.new_cast(self.loc, res, result_type)
+        let arg = if arg_type != expected_type {
+            self.context.new_cast(self.location, arg, expected_type)
+        } else {
+            arg
+        };
+        let res = self.context.new_call(self.location, count_trailing_zeroes, &[arg]);
+        self.context.new_cast(self.location, res, result_type)
     }
 
     fn pop_count(&mut self, value: RValue<'gcc>) -> RValue<'gcc> {
@@ -825,13 +864,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let result_type = value.get_type();
         let value_type = result_type.to_unsigned(self.cx);
 
-        let value =
-            if result_type.is_signed(self.cx) {
-                self.gcc_int_cast(value, value_type)
-            }
-            else {
-                value
-            };
+        let value = if result_type.is_signed(self.cx) {
+            self.gcc_int_cast(value, value_type)
+        } else {
+            value
+        };
 
         // only break apart 128-bit ints if they're not natively supported
         // TODO(antoyo): remove this if/when native 128-bit integers land in libgccjit
@@ -859,8 +896,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let counter = self.current_func().new_local(None, counter_type, "popcount_counter");
         let val = self.current_func().new_local(None, value_type, "popcount_value");
         let zero = self.gcc_zero(counter_type);
-        self.llbb().add_assignment(self.loc, counter, zero);
-        self.llbb().add_assignment(self.loc, val, value);
+        self.llbb().add_assignment(self.location, counter, zero);
+        self.llbb().add_assignment(self.location, val, value);
         self.br(loop_head);
 
         // check if value isn't zero
@@ -874,12 +911,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let one = self.gcc_int(value_type, 1);
         let sub = self.gcc_sub(val.to_rvalue(), one);
         let op = self.gcc_and(val.to_rvalue(), sub);
-        loop_body.add_assignment(self.loc, val, op);
+        loop_body.add_assignment(self.location, val, op);
 
         // counter += 1
         let one = self.gcc_int(counter_type, 1);
         let op = self.gcc_add(counter.to_rvalue(), one);
-        loop_body.add_assignment(self.loc, counter, op);
+        loop_body.add_assignment(self.location, counter, op);
         self.br(loop_head);
 
         // end of loop
@@ -888,66 +925,70 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     // Algorithm from: https://blog.regehr.org/archives/1063
-    fn rotate_left(&mut self, value: RValue<'gcc>, shift: RValue<'gcc>, width: u64) -> RValue<'gcc> {
+    fn rotate_left(
+        &mut self,
+        value: RValue<'gcc>,
+        shift: RValue<'gcc>,
+        width: u64,
+    ) -> RValue<'gcc> {
         let max = self.const_uint(shift.get_type(), width);
         let shift = self.urem(shift, max);
         let lhs = self.shl(value, shift);
         let result_neg = self.neg(shift);
-        let result_and =
-            self.and(
-                result_neg,
-                self.const_uint(shift.get_type(), width - 1),
-            );
+        let result_and = self.and(result_neg, self.const_uint(shift.get_type(), width - 1));
         let rhs = self.lshr(value, result_and);
         self.or(lhs, rhs)
     }
 
     // Algorithm from: https://blog.regehr.org/archives/1063
-    fn rotate_right(&mut self, value: RValue<'gcc>, shift: RValue<'gcc>, width: u64) -> RValue<'gcc> {
+    fn rotate_right(
+        &mut self,
+        value: RValue<'gcc>,
+        shift: RValue<'gcc>,
+        width: u64,
+    ) -> RValue<'gcc> {
         let max = self.const_uint(shift.get_type(), width);
         let shift = self.urem(shift, max);
         let lhs = self.lshr(value, shift);
         let result_neg = self.neg(shift);
-        let result_and =
-            self.and(
-                result_neg,
-                self.const_uint(shift.get_type(), width - 1),
-            );
+        let result_and = self.and(result_neg, self.const_uint(shift.get_type(), width - 1));
         let rhs = self.shl(value, result_and);
         self.or(lhs, rhs)
     }
 
-    fn saturating_add(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>, signed: bool, width: u64) -> RValue<'gcc> {
+    fn saturating_add(
+        &mut self,
+        lhs: RValue<'gcc>,
+        rhs: RValue<'gcc>,
+        signed: bool,
+        width: u64,
+    ) -> RValue<'gcc> {
         let result_type = lhs.get_type();
         if signed {
             // Based on algorithm from: https://stackoverflow.com/a/56531252/389119
             let func = self.current_func.borrow().expect("func");
-            let res = func.new_local(self.loc, result_type, "saturating_sum");
+            let res = func.new_local(self.location, result_type, "saturating_sum");
             let supports_native_type = self.is_native_int_type(result_type);
-            let overflow =
-                if supports_native_type {
-                    let func_name =
-                        match width {
-                            8 => "__builtin_add_overflow",
-                            16 => "__builtin_add_overflow",
-                            32 => "__builtin_sadd_overflow",
-                            64 => "__builtin_saddll_overflow",
-                            128 => "__builtin_add_overflow",
-                            _ => unreachable!(),
-                        };
-                    let overflow_func = self.context.get_builtin_function(func_name);
-                    self.overflow_call(overflow_func, &[lhs, rhs, res.get_address(self.loc)], None)
-                }
-                else {
-                    let func_name =
-                        match width {
-                            128 => "__rust_i128_addo",
-                            _ => unreachable!(),
-                        };
-                    let (int_result, overflow) = self.operation_with_overflow(func_name, lhs, rhs);
-                    self.llbb().add_assignment(self.loc, res, int_result);
-                    overflow
+            let overflow = if supports_native_type {
+                let func_name = match width {
+                    8 => "__builtin_add_overflow",
+                    16 => "__builtin_add_overflow",
+                    32 => "__builtin_sadd_overflow",
+                    64 => "__builtin_saddll_overflow",
+                    128 => "__builtin_add_overflow",
+                    _ => unreachable!(),
                 };
+                let overflow_func = self.context.get_builtin_function(func_name);
+                self.overflow_call(overflow_func, &[lhs, rhs, res.get_address(self.location)], None)
+            } else {
+                let func_name = match width {
+                    128 => "__rust_i128_addo",
+                    _ => unreachable!(),
+                };
+                let (int_result, overflow) = self.operation_with_overflow(func_name, lhs, rhs);
+                self.llbb().add_assignment(self.location, res, int_result);
+                overflow
+            };
 
             let then_block = func.new_block("then");
             let after_block = func.new_block("after");
@@ -955,61 +996,69 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             // Return `result_type`'s maximum or minimum value on overflow
             // NOTE: convert the type to unsigned to have an unsigned shift.
             let unsigned_type = result_type.to_unsigned(&self.cx);
-            let shifted = self.gcc_lshr(self.gcc_int_cast(lhs, unsigned_type), self.gcc_int(unsigned_type, width as i64 - 1));
+            let shifted = self.gcc_lshr(
+                self.gcc_int_cast(lhs, unsigned_type),
+                self.gcc_int(unsigned_type, width as i64 - 1),
+            );
             let uint_max = self.gcc_not(self.gcc_int(unsigned_type, 0));
             let int_max = self.gcc_lshr(uint_max, self.gcc_int(unsigned_type, 1));
-            then_block.add_assignment(self.loc, res, self.gcc_int_cast(self.gcc_add(shifted, int_max), result_type));
-            then_block.end_with_jump(self.loc, after_block);
+            then_block.add_assignment(
+                self.location,
+                res,
+                self.gcc_int_cast(self.gcc_add(shifted, int_max), result_type),
+            );
+            then_block.end_with_jump(self.location, after_block);
 
-            self.llbb().end_with_conditional(self.loc, overflow, then_block, after_block);
+            self.llbb().end_with_conditional(self.location, overflow, then_block, after_block);
 
             // NOTE: since jumps were added in a place rustc does not
             // expect, the current block in the state need to be updated.
             self.switch_to_block(after_block);
 
             res.to_rvalue()
-        }
-        else {
+        } else {
             // Algorithm from: http://locklessinc.com/articles/sat_arithmetic/
             let res = self.gcc_add(lhs, rhs);
             let cond = self.gcc_icmp(IntPredicate::IntULT, res, lhs);
             let value = self.gcc_neg(self.gcc_int_cast(cond, result_type));
-            self.gcc_or(res, value, self.loc)
+            self.gcc_or(res, value, self.location)
         }
     }
 
     // Algorithm from: https://locklessinc.com/articles/sat_arithmetic/
-    fn saturating_sub(&mut self, lhs: RValue<'gcc>, rhs: RValue<'gcc>, signed: bool, width: u64) -> RValue<'gcc> {
+    fn saturating_sub(
+        &mut self,
+        lhs: RValue<'gcc>,
+        rhs: RValue<'gcc>,
+        signed: bool,
+        width: u64,
+    ) -> RValue<'gcc> {
         let result_type = lhs.get_type();
         if signed {
             // Based on algorithm from: https://stackoverflow.com/a/56531252/389119
             let func = self.current_func.borrow().expect("func");
-            let res = func.new_local(self.loc, result_type, "saturating_diff");
+            let res = func.new_local(self.location, result_type, "saturating_diff");
             let supports_native_type = self.is_native_int_type(result_type);
-            let overflow =
-                if supports_native_type {
-                    let func_name =
-                        match width {
-                            8 => "__builtin_sub_overflow",
-                            16 => "__builtin_sub_overflow",
-                            32 => "__builtin_ssub_overflow",
-                            64 => "__builtin_ssubll_overflow",
-                            128 => "__builtin_sub_overflow",
-                            _ => unreachable!(),
-                        };
-                    let overflow_func = self.context.get_builtin_function(func_name);
-                    self.overflow_call(overflow_func, &[lhs, rhs, res.get_address(self.loc)], None)
-                }
-                else {
-                    let func_name =
-                        match width {
-                            128 => "__rust_i128_subo",
-                            _ => unreachable!(),
-                        };
-                    let (int_result, overflow) = self.operation_with_overflow(func_name, lhs, rhs);
-                    self.llbb().add_assignment(self.loc, res, int_result);
-                    overflow
+            let overflow = if supports_native_type {
+                let func_name = match width {
+                    8 => "__builtin_sub_overflow",
+                    16 => "__builtin_sub_overflow",
+                    32 => "__builtin_ssub_overflow",
+                    64 => "__builtin_ssubll_overflow",
+                    128 => "__builtin_sub_overflow",
+                    _ => unreachable!(),
                 };
+                let overflow_func = self.context.get_builtin_function(func_name);
+                self.overflow_call(overflow_func, &[lhs, rhs, res.get_address(self.location)], None)
+            } else {
+                let func_name = match width {
+                    128 => "__rust_i128_subo",
+                    _ => unreachable!(),
+                };
+                let (int_result, overflow) = self.operation_with_overflow(func_name, lhs, rhs);
+                self.llbb().add_assignment(self.location, res, int_result);
+                overflow
+            };
 
             let then_block = func.new_block("then");
             let after_block = func.new_block("after");
@@ -1017,21 +1066,27 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             // Return `result_type`'s maximum or minimum value on overflow
             // NOTE: convert the type to unsigned to have an unsigned shift.
             let unsigned_type = result_type.to_unsigned(&self.cx);
-            let shifted = self.gcc_lshr(self.gcc_int_cast(lhs, unsigned_type), self.gcc_int(unsigned_type, width as i64 - 1));
+            let shifted = self.gcc_lshr(
+                self.gcc_int_cast(lhs, unsigned_type),
+                self.gcc_int(unsigned_type, width as i64 - 1),
+            );
             let uint_max = self.gcc_not(self.gcc_int(unsigned_type, 0));
             let int_max = self.gcc_lshr(uint_max, self.gcc_int(unsigned_type, 1));
-            then_block.add_assignment(self.loc, res, self.gcc_int_cast(self.gcc_add(shifted, int_max), result_type));
-            then_block.end_with_jump(self.loc, after_block);
+            then_block.add_assignment(
+                self.location,
+                res,
+                self.gcc_int_cast(self.gcc_add(shifted, int_max), result_type),
+            );
+            then_block.end_with_jump(self.location, after_block);
 
-            self.llbb().end_with_conditional(self.loc, overflow, then_block, after_block);
+            self.llbb().end_with_conditional(self.location, overflow, then_block, after_block);
 
             // NOTE: since jumps were added in a place rustc does not
             // expect, the current block in the state need to be updated.
             self.switch_to_block(after_block);
 
             res.to_rvalue()
-        }
-        else {
+        } else {
             let res = self.gcc_sub(lhs, rhs);
             let comparison = self.gcc_icmp(IntPredicate::IntULE, res, lhs);
             let value = self.gcc_neg(self.gcc_int_cast(comparison, result_type));
@@ -1040,21 +1095,25 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 }
 
-fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(bx: &'b mut Builder<'a, 'gcc, 'tcx>, try_func: RValue<'gcc>, data: RValue<'gcc>, _catch_func: RValue<'gcc>, dest: RValue<'gcc>) {
+fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(
+    bx: &'b mut Builder<'a, 'gcc, 'tcx>,
+    try_func: RValue<'gcc>,
+    data: RValue<'gcc>,
+    _catch_func: RValue<'gcc>,
+    dest: RValue<'gcc>,
+) {
     if bx.sess().panic_strategy() == PanicStrategy::Abort {
         bx.call(bx.type_void(), None, None, try_func, &[data], None);
         // Return 0 unconditionally from the intrinsic call;
         // we can never unwind.
         let ret_align = bx.tcx.data_layout.i32_align.abi;
         bx.store(bx.const_i32(0), dest, ret_align);
-    }
-    else if wants_msvc_seh(bx.sess()) {
+    } else if wants_msvc_seh(bx.sess()) {
         unimplemented!();
-    }
-    else {
-        #[cfg(feature="master")]
+    } else {
+        #[cfg(feature = "master")]
         codegen_gnu_try(bx, try_func, data, _catch_func, dest);
-        #[cfg(not(feature="master"))]
+        #[cfg(not(feature = "master"))]
         unimplemented!();
     }
 }
@@ -1070,8 +1129,14 @@ fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(bx: &'b mut Builder<'a, 'gcc, 'tcx>, try_fu
 // function calling it, and that function may already have other personality
 // functions in play. By calling a shim we're guaranteed that our shim will have
 // the right personality function.
-#[cfg(feature="master")]
-fn codegen_gnu_try<'gcc>(bx: &mut Builder<'_, 'gcc, '_>, try_func: RValue<'gcc>, data: RValue<'gcc>, catch_func: RValue<'gcc>, dest: RValue<'gcc>) {
+#[cfg(feature = "master")]
+fn codegen_gnu_try<'gcc>(
+    bx: &mut Builder<'_, 'gcc, '_>,
+    try_func: RValue<'gcc>,
+    data: RValue<'gcc>,
+    catch_func: RValue<'gcc>,
+    dest: RValue<'gcc>,
+) {
     let cx: &CodegenCx<'gcc, '_> = bx.cx;
     let (llty, func) = get_rust_try_fn(cx, &mut |mut bx| {
         // Codegens the shims described above:
@@ -1130,36 +1195,44 @@ fn codegen_gnu_try<'gcc>(bx: &mut Builder<'_, 'gcc, '_>, try_func: RValue<'gcc>,
     bx.store(ret, dest, i32_align);
 }
 
-
 // Helper function used to get a handle to the `__rust_try` function used to
 // catch exceptions.
 //
 // This function is only generated once and is then cached.
-#[cfg(feature="master")]
-fn get_rust_try_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, codegen: &mut dyn FnMut(Builder<'a, 'gcc, 'tcx>)) -> (Type<'gcc>, Function<'gcc>) {
+#[cfg(feature = "master")]
+fn get_rust_try_fn<'a, 'gcc, 'tcx>(
+    cx: &'a CodegenCx<'gcc, 'tcx>,
+    codegen: &mut dyn FnMut(Builder<'a, 'gcc, 'tcx>),
+) -> (Type<'gcc>, Function<'gcc>) {
     if let Some(llfn) = cx.rust_try_fn.get() {
         return llfn;
     }
 
     // Define the type up front for the signature of the rust_try function.
     let tcx = cx.tcx;
-    let i8p = Ty::new_mut_ptr(tcx,tcx.types.i8);
+    let i8p = Ty::new_mut_ptr(tcx, tcx.types.i8);
     // `unsafe fn(*mut i8) -> ()`
-    let try_fn_ty = Ty::new_fn_ptr(tcx,ty::Binder::dummy(tcx.mk_fn_sig(
-        iter::once(i8p),
-        Ty::new_unit(tcx,),
-        false,
-        rustc_hir::Unsafety::Unsafe,
-        Abi::Rust,
-    )));
+    let try_fn_ty = Ty::new_fn_ptr(
+        tcx,
+        ty::Binder::dummy(tcx.mk_fn_sig(
+            iter::once(i8p),
+            Ty::new_unit(tcx),
+            false,
+            rustc_hir::Unsafety::Unsafe,
+            Abi::Rust,
+        )),
+    );
     // `unsafe fn(*mut i8, *mut i8) -> ()`
-    let catch_fn_ty = Ty::new_fn_ptr(tcx,ty::Binder::dummy(tcx.mk_fn_sig(
-        [i8p, i8p].iter().cloned(),
-        Ty::new_unit(tcx,),
-        false,
-        rustc_hir::Unsafety::Unsafe,
-        Abi::Rust,
-    )));
+    let catch_fn_ty = Ty::new_fn_ptr(
+        tcx,
+        ty::Binder::dummy(tcx.mk_fn_sig(
+            [i8p, i8p].iter().cloned(),
+            Ty::new_unit(tcx),
+            false,
+            rustc_hir::Unsafety::Unsafe,
+            Abi::Rust,
+        )),
+    );
     // `unsafe fn(unsafe fn(*mut i8) -> (), *mut i8, unsafe fn(*mut i8, *mut i8) -> ()) -> i32`
     let rust_fn_sig = ty::Binder::dummy(cx.tcx.mk_fn_sig(
         [try_fn_ty, i8p, catch_fn_ty],
@@ -1175,8 +1248,13 @@ fn get_rust_try_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, codegen: &mut
 
 // Helper function to give a Block to a closure to codegen a shim function.
 // This is currently primarily used for the `try` intrinsic functions above.
-#[cfg(feature="master")]
-fn gen_fn<'a, 'gcc, 'tcx>(cx: &'a CodegenCx<'gcc, 'tcx>, name: &str, rust_fn_sig: ty::PolyFnSig<'tcx>, codegen: &mut dyn FnMut(Builder<'a, 'gcc, 'tcx>)) -> (Type<'gcc>, Function<'gcc>) {
+#[cfg(feature = "master")]
+fn gen_fn<'a, 'gcc, 'tcx>(
+    cx: &'a CodegenCx<'gcc, 'tcx>,
+    name: &str,
+    rust_fn_sig: ty::PolyFnSig<'tcx>,
+    codegen: &mut dyn FnMut(Builder<'a, 'gcc, 'tcx>),
+) -> (Type<'gcc>, Function<'gcc>) {
     let fn_abi = cx.fn_abi_of_fn_ptr(rust_fn_sig, ty::List::empty());
     let return_type = fn_abi.gcc_type(cx).return_type;
     // FIXME(eddyb) find a nicer way to do this.
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index cecc982bb1f8..052b368ecb64 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -21,10 +21,10 @@ use rustc_span::{sym, Span, Symbol};
 use rustc_target::abi::Align;
 
 use crate::builder::Builder;
-#[cfg(feature = "master")]
-use crate::context::CodegenCx;
 #[cfg(not(feature = "master"))]
 use crate::common::SignType;
+#[cfg(feature = "master")]
+use crate::context::CodegenCx;
 
 pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
     bx: &mut Builder<'a, 'gcc, 'tcx>,
@@ -176,7 +176,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
 
         #[cfg(not(feature = "master"))]
         let shuffled = {
-            let new_elements: Vec<_> = shuffle_indices.chunks_exact(elem_size_bytes as _)
+            let new_elements: Vec<_> = shuffle_indices
+                .chunks_exact(elem_size_bytes as _)
                 .flat_map(|x| x.iter().rev())
                 .map(|&i| {
                     let index = bx.context.new_rvalue_from_long(bx.u64_type, i as _);
@@ -188,7 +189,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         };
         #[cfg(feature = "master")]
         let shuffled = {
-            let indices: Vec<_> = shuffle_indices.chunks_exact(elem_size_bytes as _)
+            let indices: Vec<_> = shuffle_indices
+                .chunks_exact(elem_size_bytes as _)
                 .flat_map(|x| x.iter().rev())
                 .map(|&i| bx.context.new_rvalue_from_int(bx.u8_type, i as _))
                 .collect();
@@ -202,12 +204,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
     if name == sym::simd_bswap || name == sym::simd_bitreverse {
         require!(
             bx.type_kind(bx.element_type(llret_ty)) == TypeKind::Integer,
-            InvalidMonomorphization::UnsupportedOperation {
-                span,
-                name,
-                in_ty,
-                in_elem,
-            }
+            InvalidMonomorphization::UnsupportedOperation { span, name, in_ty, in_elem }
         );
     }
 
@@ -245,23 +242,27 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             .map(|x| bx.context.new_rvalue_from_int(bx.u8_type, x.reverse_bits() as _))
             .chain((16..byte_vector_type_size).map(|_| zero_byte))
             .collect();
-        let hi_nibble = bx.context.new_rvalue_from_vector(None, long_byte_vector_type, &hi_nibble_elements);
+        let hi_nibble =
+            bx.context.new_rvalue_from_vector(None, long_byte_vector_type, &hi_nibble_elements);
 
         let lo_nibble_elements: Vec<_> = (0u8..16)
             .map(|x| bx.context.new_rvalue_from_int(bx.u8_type, (x.reverse_bits() >> 4) as _))
             .chain((16..byte_vector_type_size).map(|_| zero_byte))
             .collect();
-        let lo_nibble = bx.context.new_rvalue_from_vector(None, long_byte_vector_type, &lo_nibble_elements);
+        let lo_nibble =
+            bx.context.new_rvalue_from_vector(None, long_byte_vector_type, &lo_nibble_elements);
 
         let mask = bx.context.new_rvalue_from_vector(
             None,
             long_byte_vector_type,
-            &vec![bx.context.new_rvalue_from_int(bx.u8_type, 0x0f); byte_vector_type_size as _]);
+            &vec![bx.context.new_rvalue_from_int(bx.u8_type, 0x0f); byte_vector_type_size as _],
+        );
 
         let four_vec = bx.context.new_rvalue_from_vector(
             None,
             long_byte_vector_type,
-            &vec![bx.context.new_rvalue_from_int(bx.u8_type, 4); byte_vector_type_size as _]);
+            &vec![bx.context.new_rvalue_from_int(bx.u8_type, 4); byte_vector_type_size as _],
+        );
 
         // Step 2: Byte-swap the input.
         let swapped = simd_bswap(bx, args[0].immediate());
@@ -294,7 +295,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
 
         // Step 5: Combine the results of the shuffle back together and cast back to the original type.
         let result = hi | lo;
-        let cast_ty = bx.context.new_vector_type(elem_type, byte_vector_type_size / (elem_size_bytes as u64));
+        let cast_ty =
+            bx.context.new_vector_type(elem_type, byte_vector_type_size / (elem_size_bytes as u64));
 
         // we might need to truncate if sizeof(v_type) < sizeof(cast_type)
         if type_size_bytes < byte_vector_type_size {
@@ -305,7 +307,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                     bx.extract_element(cast_result, idx)
                 })
                 .collect();
-            return Ok(bx.context.new_rvalue_from_vector(None, v_type, &elems))
+            return Ok(bx.context.new_rvalue_from_vector(None, v_type, &elems));
         } else {
             // avoid the unnecessary truncation as an optimization.
             return Ok(bx.context.new_bitcast(None, result, v_type));
@@ -702,7 +704,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         invert: bool,
     ) -> RValue<'gcc> {
         let vector_type = default.get_type();
-        let elem_type = vector_type.unqualified().dyncast_vector().expect("vector type").get_element_type();
+        let elem_type =
+            vector_type.unqualified().dyncast_vector().expect("vector type").get_element_type();
 
         let mut values = Vec::with_capacity(in_len as usize);
         for i in 0..in_len {
@@ -724,7 +727,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             mask_types.push(bx.context.new_field(None, bx.i32_type, "m"));
             let mask_value = bx.context.new_vector_access(None, mask, index).to_rvalue();
             let mask_value_cast = bx.context.new_cast(None, mask_value, bx.i32_type);
-            let masked = bx.context.new_rvalue_from_int(bx.i32_type, in_len as i32) & mask_value_cast;
+            let masked =
+                bx.context.new_rvalue_from_int(bx.i32_type, in_len as i32) & mask_value_cast;
             let value = index + masked;
             mask_values.push(value);
         }
@@ -965,14 +969,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             }
         }
 
-        let result = gather(
-            args[0].immediate(),
-            args[1].immediate(),
-            args[2].immediate(),
-            bx,
-            in_len,
-            true,
-        );
+        let result =
+            gather(args[0].immediate(), args[1].immediate(), args[2].immediate(), bx, in_len, true);
 
         let pointers = args[1].immediate();
 
diff --git a/src/lib.rs b/src/lib.rs
index 1c1f82c3221c..0f57465591d5 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -25,7 +25,7 @@
     hash_raw_entry
 )]
 #![allow(broken_intra_doc_links)]
-#![recursion_limit="256"]
+#![recursion_limit = "256"]
 #![warn(rust_2018_idioms)]
 #![warn(unused_lifetimes)]
 #![deny(clippy::pattern_type_mismatch)]
@@ -40,7 +40,7 @@ extern crate rustc_fluent_macro;
 extern crate rustc_fs_util;
 extern crate rustc_hir;
 extern crate rustc_index;
-#[cfg(feature="master")]
+#[cfg(feature = "master")]
 extern crate rustc_interface;
 extern crate rustc_macros;
 extern crate rustc_metadata;
@@ -80,36 +80,40 @@ mod type_of;
 
 use std::any::Any;
 use std::fmt::Debug;
+#[cfg(not(feature = "master"))]
+use std::sync::atomic::AtomicBool;
+#[cfg(not(feature = "master"))]
+use std::sync::atomic::Ordering;
 use std::sync::Arc;
 use std::sync::Mutex;
-#[cfg(not(feature="master"))]
-use std::sync::atomic::AtomicBool;
-#[cfg(not(feature="master"))]
-use std::sync::atomic::Ordering;
 
-use gccjit::{Context, OptimizationLevel};
-#[cfg(feature="master")]
-use gccjit::{TargetInfo, Version};
-#[cfg(not(feature="master"))]
-use gccjit::CType;
 use errors::LTONotSupported;
+#[cfg(not(feature = "master"))]
+use gccjit::CType;
+use gccjit::{Context, OptimizationLevel};
+#[cfg(feature = "master")]
+use gccjit::{TargetInfo, Version};
 use rustc_ast::expand::allocator::AllocatorKind;
-use rustc_codegen_ssa::{CodegenResults, CompiledModule, ModuleCodegen};
-use rustc_codegen_ssa::base::codegen_crate;
-use rustc_codegen_ssa::back::write::{CodegenContext, FatLtoInput, ModuleConfig, TargetMachineFactoryFn};
 use rustc_codegen_ssa::back::lto::{LtoModuleCodegen, SerializedModule, ThinModule};
+use rustc_codegen_ssa::back::write::{
+    CodegenContext, FatLtoInput, ModuleConfig, TargetMachineFactoryFn,
+};
+use rustc_codegen_ssa::base::codegen_crate;
+use rustc_codegen_ssa::traits::{
+    CodegenBackend, ExtraBackendMethods, ThinBufferMethods, WriteBackendMethods,
+};
+use rustc_codegen_ssa::{CodegenResults, CompiledModule, ModuleCodegen};
 use rustc_data_structures::fx::FxIndexMap;
 use rustc_data_structures::sync::IntoDynSyncSend;
-use rustc_codegen_ssa::traits::{CodegenBackend, ExtraBackendMethods, ThinBufferMethods, WriteBackendMethods};
-use rustc_errors::{ErrorGuaranteed, DiagCtxt};
+use rustc_errors::{DiagCtxt, ErrorGuaranteed};
 use rustc_metadata::EncodedMetadata;
 use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
-use rustc_middle::util::Providers;
 use rustc_middle::ty::TyCtxt;
+use rustc_middle::util::Providers;
 use rustc_session::config::{Lto, OptLevel, OutputFilenames};
 use rustc_session::Session;
-use rustc_span::Symbol;
 use rustc_span::fatal_error::FatalError;
+use rustc_span::Symbol;
 use tempfile::TempDir;
 
 use crate::back::lto::ModuleBuffer;
@@ -127,13 +131,13 @@ impl<F: Fn() -> String> Drop for PrintOnPanic<F> {
     }
 }
 
-#[cfg(not(feature="master"))]
+#[cfg(not(feature = "master"))]
 #[derive(Debug)]
 pub struct TargetInfo {
     supports_128bit_integers: AtomicBool,
 }
 
-#[cfg(not(feature="master"))]
+#[cfg(not(feature = "master"))]
 impl TargetInfo {
     fn cpu_supports(&self, _feature: &str) -> bool {
         false
@@ -176,7 +180,7 @@ impl CodegenBackend for GccCodegenBackend {
     }
 
     fn init(&self, sess: &Session) {
-        #[cfg(feature="master")]
+        #[cfg(feature = "master")]
         {
             let target_cpu = target_cpu(sess);
 
@@ -189,13 +193,13 @@ impl CodegenBackend for GccCodegenBackend {
             **self.target_info.info.lock().expect("lock") = context.get_target_info();
         }
 
-        #[cfg(feature="master")]
+        #[cfg(feature = "master")]
         gccjit::set_global_personality_function_name(b"rust_eh_personality\0");
         if sess.lto() == Lto::Thin {
             sess.dcx().emit_warn(LTONotSupported {});
         }
 
-        #[cfg(not(feature="master"))]
+        #[cfg(not(feature = "master"))]
         {
             let temp_dir = TempDir::new().expect("cannot create temporary directory");
             let temp_file = temp_dir.into_path().join("result.asm");
@@ -203,39 +207,62 @@ impl CodegenBackend for GccCodegenBackend {
             check_context.set_print_errors_to_stderr(false);
             let _int128_ty = check_context.new_c_type(CType::UInt128t);
             // NOTE: we cannot just call compile() as this would require other files than libgccjit.so.
-            check_context.compile_to_file(gccjit::OutputKind::Assembler, temp_file.to_str().expect("path to str"));
-            self.target_info.info.lock().expect("lock").supports_128bit_integers.store(check_context.get_last_error() == Ok(None), Ordering::SeqCst);
+            check_context.compile_to_file(
+                gccjit::OutputKind::Assembler,
+                temp_file.to_str().expect("path to str"),
+            );
+            self.target_info
+                .info
+                .lock()
+                .expect("lock")
+                .supports_128bit_integers
+                .store(check_context.get_last_error() == Ok(None), Ordering::SeqCst);
         }
     }
 
     fn provide(&self, providers: &mut Providers) {
-        providers.global_backend_features =
-            |tcx, ()| gcc_util::global_gcc_features(tcx.sess, true)
+        providers.global_backend_features = |tcx, ()| gcc_util::global_gcc_features(tcx.sess, true)
     }
 
-    fn codegen_crate<'tcx>(&self, tcx: TyCtxt<'tcx>, metadata: EncodedMetadata, need_metadata_module: bool) -> Box<dyn Any> {
+    fn codegen_crate<'tcx>(
+        &self,
+        tcx: TyCtxt<'tcx>,
+        metadata: EncodedMetadata,
+        need_metadata_module: bool,
+    ) -> Box<dyn Any> {
         let target_cpu = target_cpu(tcx.sess);
-        let res = codegen_crate(self.clone(), tcx, target_cpu.to_string(), metadata, need_metadata_module);
+        let res = codegen_crate(
+            self.clone(),
+            tcx,
+            target_cpu.to_string(),
+            metadata,
+            need_metadata_module,
+        );
 
         Box::new(res)
     }
 
-    fn join_codegen(&self, ongoing_codegen: Box<dyn Any>, sess: &Session, _outputs: &OutputFilenames) -> (CodegenResults, FxIndexMap<WorkProductId, WorkProduct>) {
+    fn join_codegen(
+        &self,
+        ongoing_codegen: Box<dyn Any>,
+        sess: &Session,
+        _outputs: &OutputFilenames,
+    ) -> (CodegenResults, FxIndexMap<WorkProductId, WorkProduct>) {
         ongoing_codegen
             .downcast::<rustc_codegen_ssa::back::write::OngoingCodegen<GccCodegenBackend>>()
             .expect("Expected GccCodegenBackend's OngoingCodegen, found Box<Any>")
             .join(sess)
     }
 
-    fn link(&self, sess: &Session, codegen_results: CodegenResults, outputs: &OutputFilenames) -> Result<(), ErrorGuaranteed> {
+    fn link(
+        &self,
+        sess: &Session,
+        codegen_results: CodegenResults,
+        outputs: &OutputFilenames,
+    ) -> Result<(), ErrorGuaranteed> {
         use rustc_codegen_ssa::back::link::link_binary;
 
-        link_binary(
-            sess,
-            &crate::archive::ArArchiveBuilderBuilder,
-            &codegen_results,
-            outputs,
-        )
+        link_binary(sess, &crate::archive::ArArchiveBuilderBuilder, &codegen_results, outputs)
     }
 
     fn target_features(&self, sess: &Session, allow_unstable: bool) -> Vec<Symbol> {
@@ -248,14 +275,15 @@ fn new_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
     if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" {
         context.add_command_line_option("-masm=intel");
     }
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     {
         context.set_allow_special_chars_in_func_names(true);
         let version = Version::get();
         let version = format!("{}.{}.{}", version.major, version.minor, version.patch);
-        context.set_output_ident(&format!("rustc version {} with libgccjit {}",
-                rustc_interface::util::rustc_version_str().unwrap_or("unknown version"),
-                version,
+        context.set_output_ident(&format!(
+            "rustc version {} with libgccjit {}",
+            rustc_interface::util::rustc_version_str().unwrap_or("unknown version"),
+            version,
         ));
     }
     // TODO(antoyo): check if this should only be added when using -Cforce-unwind-tables=n.
@@ -264,26 +292,41 @@ fn new_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
 }
 
 impl ExtraBackendMethods for GccCodegenBackend {
-    fn codegen_allocator<'tcx>(&self, tcx: TyCtxt<'tcx>, module_name: &str, kind: AllocatorKind, alloc_error_handler_kind: AllocatorKind) -> Self::Module {
+    fn codegen_allocator<'tcx>(
+        &self,
+        tcx: TyCtxt<'tcx>,
+        module_name: &str,
+        kind: AllocatorKind,
+        alloc_error_handler_kind: AllocatorKind,
+    ) -> Self::Module {
         let mut mods = GccContext {
             context: new_context(tcx),
             should_combine_object_files: false,
             temp_dir: None,
         };
 
-        unsafe { allocator::codegen(tcx, &mut mods, module_name, kind, alloc_error_handler_kind); }
+        unsafe {
+            allocator::codegen(tcx, &mut mods, module_name, kind, alloc_error_handler_kind);
+        }
         mods
     }
 
-    fn compile_codegen_unit(&self, tcx: TyCtxt<'_>, cgu_name: Symbol) -> (ModuleCodegen<Self::Module>, u64) {
+    fn compile_codegen_unit(
+        &self,
+        tcx: TyCtxt<'_>,
+        cgu_name: Symbol,
+    ) -> (ModuleCodegen<Self::Module>, u64) {
         base::compile_codegen_unit(tcx, cgu_name, self.target_info.clone())
     }
 
-    fn target_machine_factory(&self, _sess: &Session, _opt_level: OptLevel, _features: &[String]) -> TargetMachineFactoryFn<Self> {
+    fn target_machine_factory(
+        &self,
+        _sess: &Session,
+        _opt_level: OptLevel,
+        _features: &[String],
+    ) -> TargetMachineFactoryFn<Self> {
         // TODO(antoyo): set opt level.
-        Arc::new(|_| {
-            Ok(())
-        })
+        Arc::new(|_| Ok(()))
     }
 }
 
@@ -314,11 +357,19 @@ impl WriteBackendMethods for GccCodegenBackend {
     type ThinData = ();
     type ThinBuffer = ThinBuffer;
 
-    fn run_fat_lto(cgcx: &CodegenContext<Self>, modules: Vec<FatLtoInput<Self>>, cached_modules: Vec<(SerializedModule<Self::ModuleBuffer>, WorkProduct)>) -> Result<LtoModuleCodegen<Self>, FatalError> {
+    fn run_fat_lto(
+        cgcx: &CodegenContext<Self>,
+        modules: Vec<FatLtoInput<Self>>,
+        cached_modules: Vec<(SerializedModule<Self::ModuleBuffer>, WorkProduct)>,
+    ) -> Result<LtoModuleCodegen<Self>, FatalError> {
         back::lto::run_fat(cgcx, modules, cached_modules)
     }
 
-    fn run_thin_lto(_cgcx: &CodegenContext<Self>, _modules: Vec<(String, Self::ThinBuffer)>, _cached_modules: Vec<(SerializedModule<Self::ModuleBuffer>, WorkProduct)>) -> Result<(Vec<LtoModuleCodegen<Self>>, Vec<WorkProduct>), FatalError> {
+    fn run_thin_lto(
+        _cgcx: &CodegenContext<Self>,
+        _modules: Vec<(String, Self::ThinBuffer)>,
+        _cached_modules: Vec<(SerializedModule<Self::ModuleBuffer>, WorkProduct)>,
+    ) -> Result<(Vec<LtoModuleCodegen<Self>>, Vec<WorkProduct>), FatalError> {
         unimplemented!();
     }
 
@@ -330,21 +381,37 @@ impl WriteBackendMethods for GccCodegenBackend {
         unimplemented!()
     }
 
-    unsafe fn optimize(_cgcx: &CodegenContext<Self>, _dcx: &DiagCtxt, module: &ModuleCodegen<Self::Module>, config: &ModuleConfig) -> Result<(), FatalError> {
+    unsafe fn optimize(
+        _cgcx: &CodegenContext<Self>,
+        _dcx: &DiagCtxt,
+        module: &ModuleCodegen<Self::Module>,
+        config: &ModuleConfig,
+    ) -> Result<(), FatalError> {
         module.module_llvm.context.set_optimization_level(to_gcc_opt_level(config.opt_level));
         Ok(())
     }
 
-    fn optimize_fat(_cgcx: &CodegenContext<Self>, _module: &mut ModuleCodegen<Self::Module>) -> Result<(), FatalError> {
+    fn optimize_fat(
+        _cgcx: &CodegenContext<Self>,
+        _module: &mut ModuleCodegen<Self::Module>,
+    ) -> Result<(), FatalError> {
         // TODO(antoyo)
         Ok(())
     }
 
-    unsafe fn optimize_thin(_cgcx: &CodegenContext<Self>, _thin: ThinModule<Self>) -> Result<ModuleCodegen<Self::Module>, FatalError> {
+    unsafe fn optimize_thin(
+        _cgcx: &CodegenContext<Self>,
+        _thin: ThinModule<Self>,
+    ) -> Result<ModuleCodegen<Self::Module>, FatalError> {
         unimplemented!();
     }
 
-    unsafe fn codegen(cgcx: &CodegenContext<Self>, dcx: &DiagCtxt, module: ModuleCodegen<Self::Module>, config: &ModuleConfig) -> Result<CompiledModule, FatalError> {
+    unsafe fn codegen(
+        cgcx: &CodegenContext<Self>,
+        dcx: &DiagCtxt,
+        module: ModuleCodegen<Self::Module>,
+        config: &ModuleConfig,
+    ) -> Result<CompiledModule, FatalError> {
         back::write::codegen(cgcx, dcx, module, config)
     }
 
@@ -356,7 +423,11 @@ impl WriteBackendMethods for GccCodegenBackend {
         unimplemented!();
     }
 
-    fn run_link(cgcx: &CodegenContext<Self>, dcx: &DiagCtxt, modules: Vec<ModuleCodegen<Self::Module>>) -> Result<ModuleCodegen<Self::Module>, FatalError> {
+    fn run_link(
+        cgcx: &CodegenContext<Self>,
+        dcx: &DiagCtxt,
+        modules: Vec<ModuleCodegen<Self::Module>>,
+    ) -> Result<ModuleCodegen<Self::Module>, FatalError> {
         back::write::link(cgcx, dcx, modules)
     }
 }
@@ -364,55 +435,56 @@ impl WriteBackendMethods for GccCodegenBackend {
 /// This is the entrypoint for a hot plugged rustc_codegen_gccjit
 #[no_mangle]
 pub fn __rustc_codegen_backend() -> Box<dyn CodegenBackend> {
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     let info = {
         // Check whether the target supports 128-bit integers.
         let context = Context::default();
         Arc::new(Mutex::new(IntoDynSyncSend(context.get_target_info())))
     };
-    #[cfg(not(feature="master"))]
+    #[cfg(not(feature = "master"))]
     let info = Arc::new(Mutex::new(IntoDynSyncSend(TargetInfo {
         supports_128bit_integers: AtomicBool::new(false),
     })));
 
-    Box::new(GccCodegenBackend {
-        target_info: LockedTargetInfo { info },
-    })
+    Box::new(GccCodegenBackend { target_info: LockedTargetInfo { info } })
 }
 
 fn to_gcc_opt_level(optlevel: Option<OptLevel>) -> OptimizationLevel {
     match optlevel {
         None => OptimizationLevel::None,
-        Some(level) => {
-            match level {
-                OptLevel::No => OptimizationLevel::None,
-                OptLevel::Less => OptimizationLevel::Limited,
-                OptLevel::Default => OptimizationLevel::Standard,
-                OptLevel::Aggressive => OptimizationLevel::Aggressive,
-                OptLevel::Size | OptLevel::SizeMin => OptimizationLevel::Limited,
-            }
+        Some(level) => match level {
+            OptLevel::No => OptimizationLevel::None,
+            OptLevel::Less => OptimizationLevel::Limited,
+            OptLevel::Default => OptimizationLevel::Standard,
+            OptLevel::Aggressive => OptimizationLevel::Aggressive,
+            OptLevel::Size | OptLevel::SizeMin => OptimizationLevel::Limited,
         },
     }
 }
 
-pub fn target_features(sess: &Session, allow_unstable: bool, target_info: &LockedTargetInfo) -> Vec<Symbol> {
-    sess
-        .target
+pub fn target_features(
+    sess: &Session,
+    allow_unstable: bool,
+    target_info: &LockedTargetInfo,
+) -> Vec<Symbol> {
+    sess.target
         .supported_target_features()
         .iter()
-        .filter_map(
-            |&(feature, gate)| {
-                if sess.is_nightly_build() || allow_unstable || gate.is_stable() { Some(feature) } else { None }
-            },
-        )
+        .filter_map(|&(feature, gate)| {
+            if sess.is_nightly_build() || allow_unstable || gate.is_stable() {
+                Some(feature)
+            } else {
+                None
+            }
+        })
         .filter(|_feature| {
             target_info.cpu_supports(_feature)
             /*
-               adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512fp16, avx512ifma,
-               avx512pf, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpopcntdq,
-               bmi1, bmi2, cmpxchg16b, ermsb, f16c, fma, fxsr, gfni, lzcnt, movbe, pclmulqdq, popcnt, rdrand, rdseed, rtm,
-               sha, sse, sse2, sse3, sse4.1, sse4.2, sse4a, ssse3, tbm, vaes, vpclmulqdq, xsave, xsavec, xsaveopt, xsaves
-             */
+              adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512fp16, avx512ifma,
+              avx512pf, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpopcntdq,
+              bmi1, bmi2, cmpxchg16b, ermsb, f16c, fma, fxsr, gfni, lzcnt, movbe, pclmulqdq, popcnt, rdrand, rdseed, rtm,
+              sha, sse, sse2, sse3, sse4.1, sse4.2, sse4a, ssse3, tbm, vaes, vpclmulqdq, xsave, xsavec, xsaveopt, xsaves
+            */
         })
         .map(|feature| Symbol::intern(feature))
         .collect()
diff --git a/src/mono_item.rs b/src/mono_item.rs
index fdeb2f96fe2c..2f75cec69e92 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -1,11 +1,11 @@
-#[cfg(feature="master")]
-use gccjit::{VarAttribute, FnAttribute};
+#[cfg(feature = "master")]
+use gccjit::{FnAttribute, VarAttribute};
 use rustc_codegen_ssa::traits::PreDefineMethods;
 use rustc_hir::def_id::{DefId, LOCAL_CRATE};
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
 use rustc_middle::mir::mono::{Linkage, Visibility};
-use rustc_middle::ty::{self, Instance, TypeVisitableExt};
 use rustc_middle::ty::layout::{FnAbiOf, LayoutOf};
+use rustc_middle::ty::{self, Instance, TypeVisitableExt};
 
 use crate::attributes;
 use crate::base;
@@ -13,8 +13,14 @@ use crate::context::CodegenCx;
 use crate::type_of::LayoutGccExt;
 
 impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
-    #[cfg_attr(not(feature="master"), allow(unused_variables))]
-    fn predefine_static(&self, def_id: DefId, _linkage: Linkage, visibility: Visibility, symbol_name: &str) {
+    #[cfg_attr(not(feature = "master"), allow(unused_variables))]
+    fn predefine_static(
+        &self,
+        def_id: DefId,
+        _linkage: Linkage,
+        visibility: Visibility,
+        symbol_name: &str,
+    ) {
         let attrs = self.tcx.codegen_fn_attrs(def_id);
         let instance = Instance::mono(self.tcx, def_id);
         let ty = instance.ty(self.tcx, ty::ParamEnv::reveal_all());
@@ -22,15 +28,21 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
         let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
         let global = self.define_global(symbol_name, gcc_type, is_tls, attrs.link_section);
-        #[cfg(feature="master")]
+        #[cfg(feature = "master")]
         global.add_string_attribute(VarAttribute::Visibility(base::visibility_to_gcc(visibility)));
 
         // TODO(antoyo): set linkage.
         self.instances.borrow_mut().insert(instance, global);
     }
 
-    #[cfg_attr(not(feature="master"), allow(unused_variables))]
-    fn predefine_fn(&self, instance: Instance<'tcx>, linkage: Linkage, visibility: Visibility, symbol_name: &str) {
+    #[cfg_attr(not(feature = "master"), allow(unused_variables))]
+    fn predefine_fn(
+        &self,
+        instance: Instance<'tcx>,
+        linkage: Linkage,
+        visibility: Visibility,
+        symbol_name: &str,
+    ) {
         assert!(!instance.args.has_infer());
 
         let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
@@ -48,11 +60,10 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
             && linkage != Linkage::Private
             && self.tcx.is_compiler_builtins(LOCAL_CRATE)
         {
-            #[cfg(feature="master")]
+            #[cfg(feature = "master")]
             decl.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
-        }
-        else {
-            #[cfg(feature="master")]
+        } else {
+            #[cfg(feature = "master")]
             decl.add_attribute(FnAttribute::Visibility(base::visibility_to_gcc(visibility)));
         }
 
diff --git a/src/type_.rs b/src/type_.rs
index 7a89fe81d384..f5e2ace725c1 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -1,8 +1,8 @@
 use gccjit::{RValue, Struct, Type};
-use rustc_codegen_ssa::traits::{BaseTypeMethods, DerivedTypeMethods, TypeMembershipMethods};
 use rustc_codegen_ssa::common::TypeKind;
-use rustc_middle::{bug, ty};
+use rustc_codegen_ssa::traits::{BaseTypeMethods, DerivedTypeMethods, TypeMembershipMethods};
 use rustc_middle::ty::layout::TyAndLayout;
+use rustc_middle::{bug, ty};
 use rustc_target::abi::{AddressSpace, Align, Integer, Size};
 
 use crate::common::TypeReflection;
@@ -135,12 +135,16 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         if let Some(typ) = self.struct_types.borrow().get(fields) {
             return typ.clone();
         }
-        let fields: Vec<_> = fields.iter().enumerate()
-            .map(|(index, field)| self.context.new_field(None, *field, &format!("field{}_TODO", index)))
+        let fields: Vec<_> = fields
+            .iter()
+            .enumerate()
+            .map(|(index, field)| {
+                self.context.new_field(None, *field, &format!("field{}_TODO", index))
+            })
             .collect();
         let typ = self.context.new_struct_type(None, "struct", &fields).as_type();
         if packed {
-            #[cfg(feature="master")]
+            #[cfg(feature = "master")]
             typ.set_packed();
         }
         self.struct_types.borrow_mut().insert(types, typ);
@@ -150,17 +154,13 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn type_kind(&self, typ: Type<'gcc>) -> TypeKind {
         if self.is_int_type_or_bool(typ) {
             TypeKind::Integer
-        }
-        else if typ.is_compatible_with(self.float_type) {
+        } else if typ.is_compatible_with(self.float_type) {
             TypeKind::Float
-        }
-        else if typ.is_compatible_with(self.double_type) {
+        } else if typ.is_compatible_with(self.double_type) {
             TypeKind::Double
-        }
-        else if typ.is_vector() {
+        } else if typ.is_vector() {
             TypeKind::Vector
-        }
-        else {
+        } else {
             // TODO(antoyo): support other types.
             TypeKind::Void
         }
@@ -177,14 +177,11 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn element_type(&self, ty: Type<'gcc>) -> Type<'gcc> {
         if let Some(typ) = ty.dyncast_array() {
             typ
-        }
-        else if let Some(vector_type) = ty.dyncast_vector() {
+        } else if let Some(vector_type) = ty.dyncast_vector() {
             vector_type.get_element_type()
-        }
-        else if let Some(typ) = ty.get_pointee() {
+        } else if let Some(typ) = ty.get_pointee() {
             typ
-        }
-        else {
+        } else {
             unreachable!()
         }
     }
@@ -198,11 +195,9 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let f64 = self.context.new_type::<f64>();
         if typ.is_compatible_with(f32) {
             32
-        }
-        else if typ.is_compatible_with(f64) {
+        } else if typ.is_compatible_with(f64) {
             64
-        }
-        else {
+        } else {
             panic!("Cannot get width of float type {:?}", typ);
         }
         // TODO(antoyo): support other sizes.
@@ -216,9 +211,9 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         value.get_type()
     }
 
-    #[cfg_attr(feature="master", allow(unused_mut))]
+    #[cfg_attr(feature = "master", allow(unused_mut))]
     fn type_array(&self, ty: Type<'gcc>, mut len: u64) -> Type<'gcc> {
-        #[cfg(not(feature="master"))]
+        #[cfg(not(feature = "master"))]
         if let Some(struct_type) = ty.is_struct() {
             if struct_type.get_field_count() == 0 {
                 // NOTE: since gccjit only supports i32 for the array size and libcore's tests uses a
@@ -242,12 +237,14 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     pub fn set_struct_body(&self, typ: Struct<'gcc>, fields: &[Type<'gcc>], packed: bool) {
-        let fields: Vec<_> = fields.iter().enumerate()
+        let fields: Vec<_> = fields
+            .iter()
+            .enumerate()
             .map(|(index, field)| self.context.new_field(None, *field, &format!("field_{}", index)))
             .collect();
         typ.set_fields(None, &fields);
         if packed {
-            #[cfg(feature="master")]
+            #[cfg(feature = "master")]
             typ.as_type().set_packed();
         }
     }
@@ -257,7 +254,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 }
 
-pub fn struct_fields<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout<'tcx>) -> (Vec<Type<'gcc>>, bool) {
+pub fn struct_fields<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    layout: TyAndLayout<'tcx>,
+) -> (Vec<Type<'gcc>>, bool) {
     let field_count = layout.fields.count();
 
     let mut packed = false;
@@ -295,5 +295,4 @@ pub fn struct_fields<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout
     (result, packed)
 }
 
-impl<'gcc, 'tcx> TypeMembershipMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
-}
+impl<'gcc, 'tcx> TypeMembershipMethods<'tcx> for CodegenCx<'gcc, 'tcx> {}
diff --git a/src/type_of.rs b/src/type_of.rs
index 25149b802016..04220d8b1dc0 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -1,13 +1,16 @@
 use std::fmt::Write;
 
-use gccjit::{Struct, Type};
 use crate::rustc_codegen_ssa::traits::{BaseTypeMethods, DerivedTypeMethods, LayoutTypeMethods};
+use gccjit::{Struct, Type};
 use rustc_middle::bug;
-use rustc_middle::ty::{self, Ty, TypeVisitableExt};
 use rustc_middle::ty::layout::{LayoutOf, TyAndLayout};
 use rustc_middle::ty::print::with_no_trimmed_paths;
-use rustc_target::abi::{self, Abi, Align, F32, F64, FieldsShape, Int, Integer, Pointer, PointeeInfo, Size, TyAbiInterface, Variants};
+use rustc_middle::ty::{self, Ty, TypeVisitableExt};
 use rustc_target::abi::call::{CastTarget, FnAbi, Reg};
+use rustc_target::abi::{
+    self, Abi, Align, FieldsShape, Int, Integer, PointeeInfo, Pointer, Size, TyAbiInterface,
+    Variants, F32, F64,
+};
 
 use crate::abi::{FnAbiGcc, FnAbiGccExt, GccType};
 use crate::context::CodegenCx;
@@ -25,7 +28,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         }
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     pub fn type_int_from_ty(&self, t: ty::IntTy) -> Type<'gcc> {
         match t {
             ty::IntTy::Isize => self.type_isize(),
@@ -37,7 +40,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         }
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     pub fn type_uint_from_ty(&self, t: ty::UintTy) -> Type<'gcc> {
         match t {
             ty::UintTy::Usize => self.type_isize(),
@@ -56,7 +59,11 @@ impl<'a, 'tcx> CodegenCx<'a, 'tcx> {
     }
 }
 
-fn uncached_gcc_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout<'tcx>, defer: &mut Option<(Struct<'gcc>, TyAndLayout<'tcx>)>) -> Type<'gcc> {
+fn uncached_gcc_type<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    layout: TyAndLayout<'tcx>,
+    defer: &mut Option<(Struct<'gcc>, TyAndLayout<'tcx>)>,
+) -> Type<'gcc> {
     match layout.abi {
         Abi::Scalar(_) => bug!("handled elsewhere"),
         Abi::Vector { ref element, count } => {
@@ -70,7 +77,7 @@ fn uncached_gcc_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout
                     element
                 };
             return cx.context.new_vector_type(element, count);
-        },
+        }
         Abi::ScalarPair(..) => {
             return cx.type_struct(
                 &[
@@ -87,7 +94,12 @@ fn uncached_gcc_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout
         // FIXME(eddyb) producing readable type names for trait objects can result
         // in problematically distinct types due to HRTB and subtyping (see #47638).
         // ty::Dynamic(..) |
-        ty::Adt(..) | ty::Closure(..) | ty::CoroutineClosure(..) | ty::Foreign(..) | ty::Coroutine(..) | ty::Str
+        ty::Adt(..)
+        | ty::Closure(..)
+        | ty::CoroutineClosure(..)
+        | ty::Foreign(..)
+        | ty::Coroutine(..)
+        | ty::Str
             if !cx.sess().fewer_names() =>
         {
             let mut name = with_no_trimmed_paths!(layout.ty.to_string());
@@ -125,22 +137,21 @@ fn uncached_gcc_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, layout: TyAndLayout
                     let gcc_type = cx.type_named_struct(name);
                     cx.set_struct_body(gcc_type, &[fill], packed);
                     gcc_type.as_type()
-                },
+                }
             }
         }
         FieldsShape::Array { count, .. } => cx.type_array(layout.field(cx, 0).gcc_type(cx), count),
-        FieldsShape::Arbitrary { .. } =>
-            match name {
-                None => {
-                    let (gcc_fields, packed) = struct_fields(cx, layout);
-                    cx.type_struct(&gcc_fields, packed)
-                },
-                Some(ref name) => {
-                    let gcc_type = cx.type_named_struct(name);
-                    *defer = Some((gcc_type, layout));
-                    gcc_type.as_type()
-                },
-            },
+        FieldsShape::Arbitrary { .. } => match name {
+            None => {
+                let (gcc_fields, packed) = struct_fields(cx, layout);
+                cx.type_struct(&gcc_fields, packed)
+            }
+            Some(ref name) => {
+                let gcc_type = cx.type_named_struct(name);
+                *defer = Some((gcc_type, layout));
+                gcc_type.as_type()
+            }
+        },
     }
 }
 
@@ -149,10 +160,23 @@ pub trait LayoutGccExt<'tcx> {
     fn is_gcc_scalar_pair(&self) -> bool;
     fn gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc>;
     fn immediate_gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc>;
-    fn scalar_gcc_type_at<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, scalar: &abi::Scalar, offset: Size) -> Type<'gcc>;
-    fn scalar_pair_element_gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, index: usize) -> Type<'gcc>;
+    fn scalar_gcc_type_at<'gcc>(
+        &self,
+        cx: &CodegenCx<'gcc, 'tcx>,
+        scalar: &abi::Scalar,
+        offset: Size,
+    ) -> Type<'gcc>;
+    fn scalar_pair_element_gcc_type<'gcc>(
+        &self,
+        cx: &CodegenCx<'gcc, 'tcx>,
+        index: usize,
+    ) -> Type<'gcc>;
     fn gcc_field_index(&self, index: usize) -> u64;
-    fn pointee_info_at<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, offset: Size) -> Option<PointeeInfo>;
+    fn pointee_info_at<'gcc>(
+        &self,
+        cx: &CodegenCx<'gcc, 'tcx>,
+        offset: Size,
+    ) -> Option<PointeeInfo>;
 }
 
 impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
@@ -192,24 +216,24 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
             if let Some(&ty) = cx.scalar_types.borrow().get(&self.ty) {
                 return ty;
             }
-            let ty =
-                match *self.ty.kind() {
-                    // NOTE: we cannot remove this match like in the LLVM codegen because the call
-                    // to fn_ptr_backend_type handle the on-stack attribute.
-                    // TODO(antoyo): find a less hackish way to hande the on-stack attribute.
-                    ty::FnPtr(sig) => cx.fn_ptr_backend_type(&cx.fn_abi_of_fn_ptr(sig, ty::List::empty())),
-                    _ => self.scalar_gcc_type_at(cx, scalar, Size::ZERO),
-                };
+            let ty = match *self.ty.kind() {
+                // NOTE: we cannot remove this match like in the LLVM codegen because the call
+                // to fn_ptr_backend_type handle the on-stack attribute.
+                // TODO(antoyo): find a less hackish way to hande the on-stack attribute.
+                ty::FnPtr(sig) => {
+                    cx.fn_ptr_backend_type(&cx.fn_abi_of_fn_ptr(sig, ty::List::empty()))
+                }
+                _ => self.scalar_gcc_type_at(cx, scalar, Size::ZERO),
+            };
             cx.scalar_types.borrow_mut().insert(self.ty, ty);
             return ty;
         }
 
         // Check the cache.
-        let variant_index =
-            match self.variants {
-                Variants::Single { index } => Some(index),
-                _ => None,
-            };
+        let variant_index = match self.variants {
+            Variants::Single { index } => Some(index),
+            _ => None,
+        };
         let cached_type = cx.types.borrow().get(&(self.ty, variant_index)).cloned();
         if let Some(ty) = cached_type {
             return ty;
@@ -222,17 +246,15 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
         let normal_ty = cx.tcx.erase_regions(self.ty);
 
         let mut defer = None;
-        let ty =
-            if self.ty != normal_ty {
-                let mut layout = cx.layout_of(normal_ty);
-                if let Some(v) = variant_index {
-                    layout = layout.for_variant(cx, v);
-                }
-                layout.gcc_type(cx)
+        let ty = if self.ty != normal_ty {
+            let mut layout = cx.layout_of(normal_ty);
+            if let Some(v) = variant_index {
+                layout = layout.for_variant(cx, v);
             }
-            else {
-                uncached_gcc_type(cx, *self, &mut defer)
-            };
+            layout.gcc_type(cx)
+        } else {
+            uncached_gcc_type(cx, *self, &mut defer)
+        };
 
         cx.types.borrow_mut().insert((self.ty, variant_index), ty);
 
@@ -253,7 +275,12 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
         self.gcc_type(cx)
     }
 
-    fn scalar_gcc_type_at<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, scalar: &abi::Scalar, offset: Size) -> Type<'gcc> {
+    fn scalar_gcc_type_at<'gcc>(
+        &self,
+        cx: &CodegenCx<'gcc, 'tcx>,
+        scalar: &abi::Scalar,
+        offset: Size,
+    ) -> Type<'gcc> {
         match scalar.primitive() {
             Int(i, true) => cx.type_from_integer(i),
             Int(i, false) => cx.type_from_unsigned_integer(i),
@@ -261,19 +288,21 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
             F64 => cx.type_f64(),
             Pointer(address_space) => {
                 // If we know the alignment, pick something better than i8.
-                let pointee =
-                    if let Some(pointee) = self.pointee_info_at(cx, offset) {
-                        cx.type_pointee_for_align(pointee.align)
-                    }
-                    else {
-                        cx.type_i8()
-                    };
+                let pointee = if let Some(pointee) = self.pointee_info_at(cx, offset) {
+                    cx.type_pointee_for_align(pointee.align)
+                } else {
+                    cx.type_i8()
+                };
                 cx.type_ptr_to_ext(pointee, address_space)
             }
         }
     }
 
-    fn scalar_pair_element_gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, index: usize) -> Type<'gcc> {
+    fn scalar_pair_element_gcc_type<'gcc>(
+        &self,
+        cx: &CodegenCx<'gcc, 'tcx>,
+        index: usize,
+    ) -> Type<'gcc> {
         // This must produce the same result for `repr(transparent)` wrappers as for the inner type!
         // In other words, this should generally not look at the type at all, but only at the
         // layout.
@@ -294,13 +323,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
             return cx.type_i1();
         }
 
-        let offset =
-            if index == 0 {
-                Size::ZERO
-            }
-            else {
-                a.size(cx).align_to(b.align(cx).abi)
-            };
+        let offset = if index == 0 { Size::ZERO } else { a.size(cx).align_to(b.align(cx).abi) };
         self.scalar_gcc_type_at(cx, scalar, offset)
     }
 
@@ -355,7 +378,12 @@ impl<'gcc, 'tcx> LayoutTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         layout.gcc_field_index(index)
     }
 
-    fn scalar_pair_element_backend_type(&self, layout: TyAndLayout<'tcx>, index: usize, _immediate: bool) -> Type<'gcc> {
+    fn scalar_pair_element_backend_type(
+        &self,
+        layout: TyAndLayout<'tcx>,
+        index: usize,
+        _immediate: bool,
+    ) -> Type<'gcc> {
         layout.scalar_pair_element_gcc_type(self, index)
     }
 
@@ -373,12 +401,7 @@ impl<'gcc, 'tcx> LayoutTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
     fn fn_decl_backend_type(&self, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Type<'gcc> {
         // FIXME(antoyo): Should we do something with `FnAbiGcc::fn_attributes`?
-        let FnAbiGcc {
-            return_type,
-            arguments_type,
-            is_c_variadic,
-            ..
-        } = fn_abi.gcc_type(self);
+        let FnAbiGcc { return_type, arguments_type, is_c_variadic, .. } = fn_abi.gcc_type(self);
         self.context.new_function_pointer_type(None, return_type, &arguments_type, is_c_variadic)
     }
 }
diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index 4cc429cfa456..67629a3c95a8 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -5,9 +5,9 @@ use std::{
     process::Command,
 };
 
+use boml::Toml;
 use lang_tester::LangTester;
 use tempfile::TempDir;
-use boml::Toml;
 
 /// Controls the compile options (e.g., optimization level) used to compile
 /// test code.
@@ -21,8 +21,7 @@ pub fn main_inner(profile: Profile) {
     let tempdir = TempDir::new().expect("temp dir");
     let current_dir = current_dir().expect("current dir");
     let current_dir = current_dir.to_str().expect("current dir").to_string();
-    let toml = Toml::parse(include_str!("../config.toml"))
-        .expect("Failed to parse `config.toml`");
+    let toml = Toml::parse(include_str!("../config.toml")).expect("Failed to parse `config.toml`");
     let gcc_path = if let Ok(gcc_path) = toml.get_string("gcc-path") {
         PathBuf::from(gcc_path.to_string())
     } else {
@@ -42,12 +41,12 @@ pub fn main_inner(profile: Profile) {
         filename.extension().expect("extension").to_str().expect("to_str") == "rs"
     }
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     fn filter(filename: &Path) -> bool {
         rust_filter(filename)
     }
 
-    #[cfg(not(feature="master"))]
+    #[cfg(not(feature = "master"))]
     fn filter(filename: &Path) -> bool {
         if let Some(filename) = filename.to_str() {
             if filename.ends_with("gep.rs") {
@@ -61,13 +60,13 @@ pub fn main_inner(profile: Profile) {
         .test_dir("tests/run")
         .test_file_filter(filter)
         .test_extract(|source| {
-            let lines =
-                source.lines()
-                    .skip_while(|l| !l.starts_with("//"))
-                    .take_while(|l| l.starts_with("//"))
-                    .map(|l| &l[2..])
-                    .collect::<Vec<_>>()
-                    .join("\n");
+            let lines = source
+                .lines()
+                .skip_while(|l| !l.starts_with("//"))
+                .take_while(|l| l.starts_with("//"))
+                .map(|l| &l[2..])
+                .collect::<Vec<_>>()
+                .join("\n");
             Some(lines)
         })
         .test_cmds(move |path| {
@@ -78,10 +77,13 @@ pub fn main_inner(profile: Profile) {
             let mut compiler = Command::new("rustc");
             compiler.args(&[
                 &format!("-Zcodegen-backend={}/target/debug/librustc_codegen_gcc.so", current_dir),
-                "--sysroot", &format!("{}/build_sysroot/sysroot/", current_dir),
+                "--sysroot",
+                &format!("{}/build_sysroot/sysroot/", current_dir),
                 "-Zno-parallel-llvm",
-                "-C", "link-arg=-lc",
-                "-o", exe.to_str().expect("to_str"),
+                "-C",
+                "link-arg=-lc",
+                "-o",
+                exe.to_str().expect("to_str"),
                 path.to_str().expect("to_str"),
             ]);
 
@@ -105,10 +107,7 @@ pub fn main_inner(profile: Profile) {
             match profile {
                 Profile::Debug => {}
                 Profile::Release => {
-                    compiler.args(&[
-                        "-C", "opt-level=3",
-                        "-C", "lto=no",
-                    ]);
+                    compiler.args(&["-C", "opt-level=3", "-C", "lto=no"]);
                 }
             }
             // Test command 2: run `tempdir/x`.
@@ -130,18 +129,10 @@ pub fn main_inner(profile: Profile) {
                 runtime.args(&["chroot", vm_dir, "qemu-m68k-static"]);
                 runtime.arg(inside_vm_exe_path);
                 runtime.current_dir(vm_parent_dir);
-                vec![
-                    ("Compiler", compiler),
-                    ("Copy", copy),
-                    ("Run-time", runtime),
-                ]
-            }
-            else {
+                vec![("Compiler", compiler), ("Copy", copy), ("Run-time", runtime)]
+            } else {
                 let runtime = Command::new(exe);
-                vec![
-                    ("Compiler", compiler),
-                    ("Run-time", runtime),
-                ]
+                vec![("Compiler", compiler), ("Run-time", runtime)]
             }
         })
         .run();

From aeffc2fcaa719a052eb832212855d9c400277edb Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Thu, 29 Feb 2024 10:33:11 +0800
Subject: [PATCH 563/997] fix(fmt/style): Clippy-generated Code Correction
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Modifications to Commit：
	Modified：     src/allocator.rs
	Modified：     src/asm.rs
	Modified：     src/back/lto.rs
	Modified：     src/consts.rs
	Modified：     src/debuginfo.rs
	Modified：     src/intrinsic/mod.rs
	Modified：     src/lib.rs
	Modified：     src/mono_item.rs
	Modified：     src/type_.rs
	Modified：     tests/lang_tests_common.rs
---
 src/allocator.rs           |  6 +++---
 src/asm.rs                 |  6 +++---
 src/back/lto.rs            |  9 ++++-----
 src/consts.rs              | 12 ++++--------
 src/debuginfo.rs           |  1 -
 src/intrinsic/mod.rs       |  9 +++++----
 src/lib.rs                 | 12 ++++++------
 src/mono_item.rs           |  2 +-
 src/type_.rs               |  8 ++++----
 tests/lang_tests_common.rs | 16 ++++++++--------
 10 files changed, 38 insertions(+), 43 deletions(-)

diff --git a/src/allocator.rs b/src/allocator.rs
index 5cfd654a2049..deeb55e9d128 100644
--- a/src/allocator.rs
+++ b/src/allocator.rs
@@ -63,7 +63,7 @@ pub(crate) unsafe fn codegen(
         tcx,
         context,
         "__rust_alloc_error_handler",
-        &alloc_error_handler_name(alloc_error_handler_kind),
+        alloc_error_handler_name(alloc_error_handler_kind),
         &[usize, usize],
         None,
     );
@@ -93,7 +93,7 @@ fn create_wrapper_function(
     let args: Vec<_> = types
         .iter()
         .enumerate()
-        .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
+        .map(|(index, typ)| context.new_parameter(None, *typ, format!("param{}", index)))
         .collect();
     let func = context.new_function(
         None,
@@ -115,7 +115,7 @@ fn create_wrapper_function(
     let args: Vec<_> = types
         .iter()
         .enumerate()
-        .map(|(index, typ)| context.new_parameter(None, *typ, &format!("param{}", index)))
+        .map(|(index, typ)| context.new_parameter(None, *typ, format!("param{}", index)))
         .collect();
     let callee = context.new_function(
         None,
diff --git a/src/asm.rs b/src/asm.rs
index bded806cafde..a237f3e6490c 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -96,7 +96,7 @@ impl AsmOutOperand<'_, '_, '_> {
             res.push('&');
         }
 
-        res.push_str(&self.constraint);
+        res.push_str(self.constraint);
         res
     }
 }
@@ -304,7 +304,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         tmp_var.set_register_name(reg_name);
 
                         outputs.push(AsmOutOperand {
-                            constraint: "r".into(),
+                            constraint: "r",
                             rust_idx,
                             late,
                             readwrite: false,
@@ -343,7 +343,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         tmp_var.set_register_name(reg_name);
 
                         outputs.push(AsmOutOperand {
-                            constraint: "r".into(),
+                            constraint: "r",
                             rust_idx,
                             late,
                             readwrite: false,
diff --git a/src/back/lto.rs b/src/back/lto.rs
index 42837a57bade..61e0f203ee0b 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -106,11 +106,10 @@ fn prepare_lto(
             if !crate_type_allows_lto(*crate_type) {
                 dcx.emit_err(LtoDisallowed);
                 return Err(FatalError);
-            } else if *crate_type == CrateType::Dylib {
-                if !cgcx.opts.unstable_opts.dylib_lto {
-                    dcx.emit_err(LtoDylib);
-                    return Err(FatalError);
-                }
+            }
+            if *crate_type == CrateType::Dylib && !cgcx.opts.unstable_opts.dylib_lto {
+                dcx.emit_err(LtoDylib);
+                return Err(FatalError);
             }
         }
 
diff --git a/src/consts.rs b/src/consts.rs
index 1c66ad8cc5a1..327c9bdada92 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -77,10 +77,8 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
         // boolean SSA values are i1, but they have to be stored in i8 slots,
         // otherwise some LLVM optimization passes don't work as expected
         let val_llty = self.val_ty(value);
-        let value = if val_llty == self.type_i1() {
+        if val_llty == self.type_i1() {
             unimplemented!();
-        } else {
-            value
         };
 
         let instance = Instance::mono(self.tcx, def_id);
@@ -94,11 +92,9 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
 
         // As an optimization, all shared statics which do not have interior
         // mutability are placed into read-only memory.
-        if !is_mutable {
-            if self.type_is_freeze(ty) {
-                #[cfg(feature = "master")]
-                global.global_set_readonly();
-            }
+        if !is_mutable && self.type_is_freeze(ty) {
+            #[cfg(feature = "master")]
+            global.global_set_readonly();
         }
 
         if attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL) {
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index a072a5092a79..aed15769025f 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -255,7 +255,6 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         _variable_kind: VariableKind,
         _span: Span,
     ) -> Self::DIVariable {
-        ()
     }
 
     fn dbg_scope_fn(
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 22176ab9cd7a..0fd91fc10f18 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1065,7 +1065,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
             // Return `result_type`'s maximum or minimum value on overflow
             // NOTE: convert the type to unsigned to have an unsigned shift.
-            let unsigned_type = result_type.to_unsigned(&self.cx);
+            let unsigned_type = result_type.to_unsigned(self.cx);
             let shifted = self.gcc_lshr(
                 self.gcc_int_cast(lhs, unsigned_type),
                 self.gcc_int(unsigned_type, width as i64 - 1),
@@ -1108,9 +1108,10 @@ fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(
         // we can never unwind.
         let ret_align = bx.tcx.data_layout.i32_align.abi;
         bx.store(bx.const_i32(0), dest, ret_align);
-    } else if wants_msvc_seh(bx.sess()) {
-        unimplemented!();
     } else {
+        if wants_msvc_seh(bx.sess()) {
+            unimplemented!();
+        }
         #[cfg(feature = "master")]
         codegen_gnu_try(bx, try_func, data, _catch_func, dest);
         #[cfg(not(feature = "master"))]
@@ -1160,7 +1161,7 @@ fn codegen_gnu_try<'gcc>(
         let catch_func = func.get_param(2).to_rvalue();
         let try_func_ty = bx.type_func(&[bx.type_i8p()], bx.type_void());
 
-        let current_block = bx.block.clone();
+        let current_block = bx.block;
 
         bx.switch_to_block(then);
         bx.ret(bx.const_i32(0));
diff --git a/src/lib.rs b/src/lib.rs
index 0f57465591d5..ab029ca4ce59 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -187,7 +187,7 @@ impl CodegenBackend for GccCodegenBackend {
             // Get the second TargetInfo with the correct CPU features by setting the arch.
             let context = Context::default();
             if target_cpu != "generic" {
-                context.add_command_line_option(&format!("-march={}", target_cpu));
+                context.add_command_line_option(format!("-march={}", target_cpu));
             }
 
             **self.target_info.info.lock().expect("lock") = context.get_target_info();
@@ -224,9 +224,9 @@ impl CodegenBackend for GccCodegenBackend {
         providers.global_backend_features = |tcx, ()| gcc_util::global_gcc_features(tcx.sess, true)
     }
 
-    fn codegen_crate<'tcx>(
+    fn codegen_crate(
         &self,
-        tcx: TyCtxt<'tcx>,
+        tcx: TyCtxt<'_>,
         metadata: EncodedMetadata,
         need_metadata_module: bool,
     ) -> Box<dyn Any> {
@@ -292,9 +292,9 @@ fn new_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
 }
 
 impl ExtraBackendMethods for GccCodegenBackend {
-    fn codegen_allocator<'tcx>(
+    fn codegen_allocator(
         &self,
-        tcx: TyCtxt<'tcx>,
+        tcx: TyCtxt<'_>,
         module_name: &str,
         kind: AllocatorKind,
         alloc_error_handler_kind: AllocatorKind,
@@ -486,6 +486,6 @@ pub fn target_features(
               sha, sse, sse2, sse3, sse4.1, sse4.2, sse4a, ssse3, tbm, vaes, vpclmulqdq, xsave, xsavec, xsaveopt, xsaves
             */
         })
-        .map(|feature| Symbol::intern(feature))
+        .map(Symbol::intern)
         .collect()
 }
diff --git a/src/mono_item.rs b/src/mono_item.rs
index 2f75cec69e92..e56c49686c01 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -47,7 +47,7 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
         let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
         self.linkage.set(base::linkage_to_gcc(linkage));
-        let decl = self.declare_fn(symbol_name, &fn_abi);
+        let decl = self.declare_fn(symbol_name, fn_abi);
         //let attrs = self.tcx.codegen_fn_attrs(instance.def_id());
 
         attributes::from_fn_attrs(self, decl, instance);
diff --git a/src/type_.rs b/src/type_.rs
index f5e2ace725c1..0465d0bbdfe2 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -133,13 +133,13 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn type_struct(&self, fields: &[Type<'gcc>], packed: bool) -> Type<'gcc> {
         let types = fields.to_vec();
         if let Some(typ) = self.struct_types.borrow().get(fields) {
-            return typ.clone();
+            return *typ;
         }
         let fields: Vec<_> = fields
             .iter()
             .enumerate()
             .map(|(index, field)| {
-                self.context.new_field(None, *field, &format!("field{}_TODO", index))
+                self.context.new_field(None, *field, format!("field{}_TODO", index))
             })
             .collect();
         let typ = self.context.new_struct_type(None, "struct", &fields).as_type();
@@ -240,7 +240,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let fields: Vec<_> = fields
             .iter()
             .enumerate()
-            .map(|(index, field)| self.context.new_field(None, *field, &format!("field_{}", index)))
+            .map(|(index, field)| self.context.new_field(None, *field, format!("field_{}", index)))
             .collect();
         typ.set_fields(None, &fields);
         if packed {
@@ -265,7 +265,7 @@ pub fn struct_fields<'gcc, 'tcx>(
     let mut prev_effective_align = layout.align.abi;
     let mut result: Vec<_> = Vec::with_capacity(1 + field_count * 2);
     for i in layout.fields.index_by_increasing_offset() {
-        let target_offset = layout.fields.offset(i as usize);
+        let target_offset = layout.fields.offset(i);
         let field = layout.field(cx, i);
         let effective_field_align =
             layout.align.abi.min(field.align.abi).restrict_for_offset(target_offset);
diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index 67629a3c95a8..f89ad650af59 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -75,7 +75,7 @@ pub fn main_inner(profile: Profile) {
             exe.push(&tempdir);
             exe.push(path.file_stem().expect("file_stem"));
             let mut compiler = Command::new("rustc");
-            compiler.args(&[
+            compiler.args([
                 &format!("-Zcodegen-backend={}/target/debug/librustc_codegen_gcc.so", current_dir),
                 "--sysroot",
                 &format!("{}/build_sysroot/sysroot/", current_dir),
@@ -90,7 +90,7 @@ pub fn main_inner(profile: Profile) {
             // TODO(antoyo): find a way to send this via a cli argument.
             let test_target = std::env::var("CG_GCC_TEST_TARGET");
             if let Ok(ref target) = test_target {
-                compiler.args(&["--target", &target]);
+                compiler.args(["--target", target]);
                 let linker = format!("{}-gcc", target);
                 compiler.args(&[format!("-Clinker={}", linker)]);
                 let mut env_path = std::env::var("PATH").unwrap_or_default();
@@ -101,32 +101,32 @@ pub fn main_inner(profile: Profile) {
 
             if let Some(flags) = option_env!("TEST_FLAGS") {
                 for flag in flags.split_whitespace() {
-                    compiler.arg(&flag);
+                    compiler.arg(flag);
                 }
             }
             match profile {
                 Profile::Debug => {}
                 Profile::Release => {
-                    compiler.args(&["-C", "opt-level=3", "-C", "lto=no"]);
+                    compiler.args(["-C", "opt-level=3", "-C", "lto=no"]);
                 }
             }
             // Test command 2: run `tempdir/x`.
             if test_target.is_ok() {
                 let vm_parent_dir = std::env::var("CG_GCC_VM_DIR")
-                    .map(|dir| PathBuf::from(dir))
+                    .map(PathBuf::from)
                     .unwrap_or_else(|_| std::env::current_dir().unwrap());
                 let vm_dir = "vm";
                 let exe_filename = exe.file_name().unwrap();
                 let vm_home_dir = vm_parent_dir.join(vm_dir).join("home");
                 let vm_exe_path = vm_home_dir.join(exe_filename);
                 // FIXME(antoyo): panicking here makes the test pass.
-                let inside_vm_exe_path = PathBuf::from("/home").join(&exe_filename);
+                let inside_vm_exe_path = PathBuf::from("/home").join(exe_filename);
                 let mut copy = Command::new("sudo");
                 copy.arg("cp");
-                copy.args(&[&exe, &vm_exe_path]);
+                copy.args([&exe, &vm_exe_path]);
 
                 let mut runtime = Command::new("sudo");
-                runtime.args(&["chroot", vm_dir, "qemu-m68k-static"]);
+                runtime.args(["chroot", vm_dir, "qemu-m68k-static"]);
                 runtime.arg(inside_vm_exe_path);
                 runtime.current_dir(vm_parent_dir);
                 vec![("Compiler", compiler), ("Copy", copy), ("Run-time", runtime)]

From 6f54eeb07096645c6b92fc766ffec752c770b594 Mon Sep 17 00:00:00 2001
From: r01and <mu001999@outlook.com>
Date: Thu, 29 Feb 2024 23:13:09 +0800
Subject: [PATCH 564/997] Remove unused structs

---
 src/errors.rs | 22 +---------------------
 1 file changed, 1 insertion(+), 21 deletions(-)

diff --git a/src/errors.rs b/src/errors.rs
index 62be9e9b379a..6b781f109989 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -1,10 +1,8 @@
 use rustc_errors::{
-    DiagCtxt, DiagnosticArgValue, DiagnosticBuilder, EmissionGuarantee, IntoDiagnostic,
-    IntoDiagnosticArg, Level,
+    DiagCtxt, DiagnosticBuilder, EmissionGuarantee, IntoDiagnostic, Level,
 };
 use rustc_macros::{Diagnostic, Subdiagnostic};
 use rustc_span::Span;
-use std::borrow::Cow;
 
 use crate::fluent_generated as fluent;
 
@@ -32,18 +30,6 @@ pub(crate) enum PossibleFeature<'a> {
     None,
 }
 
-struct ExitCode(Option<i32>);
-
-impl IntoDiagnosticArg for ExitCode {
-    fn into_diagnostic_arg(self) -> DiagnosticArgValue {
-        let ExitCode(exit_code) = self;
-        match exit_code {
-            Some(t) => t.into_diagnostic_arg(),
-            None => DiagnosticArgValue::Str(Cow::Borrowed("<signal>")),
-        }
-    }
-}
-
 #[derive(Diagnostic)]
 #[diag(codegen_gcc_lto_not_supported)]
 pub(crate) struct LTONotSupported;
@@ -81,12 +67,6 @@ pub(crate) struct CopyBitcode {
 #[note]
 pub(crate) struct DynamicLinkingWithLTO;
 
-#[derive(Diagnostic)]
-#[diag(codegen_gcc_load_bitcode)]
-pub(crate) struct LoadBitcode {
-    name: String,
-}
-
 #[derive(Diagnostic)]
 #[diag(codegen_gcc_lto_disallowed)]
 pub(crate) struct LtoDisallowed;

From 1b124a9bbd3637d23f1c1a8e41fcb2594a26a077 Mon Sep 17 00:00:00 2001
From: r01and <mu001999@outlook.com>
Date: Thu, 29 Feb 2024 23:26:34 +0800
Subject: [PATCH 565/997] Format codes

---
 src/errors.rs | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/errors.rs b/src/errors.rs
index 6b781f109989..58d74ca733be 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -1,6 +1,4 @@
-use rustc_errors::{
-    DiagCtxt, DiagnosticBuilder, EmissionGuarantee, IntoDiagnostic, Level,
-};
+use rustc_errors::{DiagCtxt, DiagnosticBuilder, EmissionGuarantee, IntoDiagnostic, Level};
 use rustc_macros::{Diagnostic, Subdiagnostic};
 use rustc_span::Span;
 

From 7e4b53e45b71abdc1da2960beeb87765330b6340 Mon Sep 17 00:00:00 2001
From: r01and <mu001999@outlook.com>
Date: Fri, 1 Mar 2024 09:50:33 +0800
Subject: [PATCH 566/997] Remove unused fluent messages

---
 messages.ftl | 2 --
 1 file changed, 2 deletions(-)

diff --git a/messages.ftl b/messages.ftl
index 5ca0a2e1b6db..0235384445e7 100644
--- a/messages.ftl
+++ b/messages.ftl
@@ -20,8 +20,6 @@ codegen_gcc_dynamic_linking_with_lto =
     cannot prefer dynamic linking when performing LTO
     .note = only 'staticlib', 'bin', and 'cdylib' outputs are supported with LTO
 
-codegen_gcc_load_bitcode = failed to load bitcode of module "{$name}"
-
 codegen_gcc_lto_disallowed = lto can only be run for executables, cdylibs and static library outputs
 
 codegen_gcc_lto_dylib = lto cannot be used for `dylib` crate type without `-Zdylib-lto`

From 56dc8de1db5510ccc0545238f556e38b7cc3933f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 1 Mar 2024 12:20:59 -0500
Subject: [PATCH 567/997] Switch to the new
 set_special_chars_allowed_in_func_names API

---
 Cargo.lock        | 4 ++--
 Cargo.toml        | 2 +-
 libgccjit.version | 2 +-
 src/lib.rs        | 2 +-
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index c004c7b992f7..ffbd4ee39de8 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -80,7 +80,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#af31863f5f2a32f1c805444bfb6e8c174d6da8f4"
+source = "git+https://github.com/antoyo/gccjit.rs#9f8f67edc006d543b17529a001803ffece48349e"
 dependencies = [
  "gccjit_sys",
 ]
@@ -88,7 +88,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#af31863f5f2a32f1c805444bfb6e8c174d6da8f4"
+source = "git+https://github.com/antoyo/gccjit.rs#9f8f67edc006d543b17529a001803ffece48349e"
 dependencies = [
  "libc",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 85ad69e00fde..e23aaeab9777 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -59,4 +59,4 @@ opt-level = 0
 debug = false
 
 [package.metadata.rust-analyzer]
-rustc_private = true
\ No newline at end of file
+rustc_private = true
diff --git a/libgccjit.version b/libgccjit.version
index ad2c3b12b874..41bec6df5d95 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-cf9554126
+b6f163f52
diff --git a/src/lib.rs b/src/lib.rs
index 0f57465591d5..19e441bae96c 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -277,7 +277,7 @@ fn new_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
     }
     #[cfg(feature = "master")]
     {
-        context.set_allow_special_chars_in_func_names(true);
+        context.set_special_chars_allowed_in_func_names("$.*");
         let version = Version::get();
         let version = format!("{}.{}.{}", version.major, version.minor, version.patch);
         context.set_output_ident(&format!(

From 4baadb7859b6de4e5bf7addcbba253d24d70f52a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 1 Mar 2024 17:28:57 -0500
Subject: [PATCH 568/997] Update lang_tester so that panicking in a test
 results in the test failing

---
 Cargo.lock                 |  8 ++++----
 Cargo.toml                 |  2 +-
 tests/lang_tests_common.rs | 13 +++++++------
 3 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index ffbd4ee39de8..ab2c7ca8a47c 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -70,9 +70,9 @@ checksum = "6999dc1837253364c2ebb0704ba97994bd874e8f195d665c50b7548f6ea92764"
 
 [[package]]
 name = "fm"
-version = "0.1.4"
+version = "0.2.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "68fda3cff2cce84c19e5dfa5179a4b35d2c0f18b893f108002b8a6a54984acca"
+checksum = "21bcf4db620a804cf7e9d84fbcb5d4ac83a8c43396203b2507d62ea31814dfd4"
 dependencies = [
  "regex",
 ]
@@ -110,9 +110,9 @@ checksum = "fed44880c466736ef9a5c5b5facefb5ed0785676d0c02d612db14e54f0d84286"
 
 [[package]]
 name = "lang_tester"
-version = "0.3.13"
+version = "0.8.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "96bd995a092cac79868250589869b5a5d656b02a02bd74c8ebdc566dc7203090"
+checksum = "9af8149dbb3ed7d8e529fcb141fe033b1c26ed54cbffc6762d3a86483c485d23"
 dependencies = [
  "fm",
  "getopts",
diff --git a/Cargo.toml b/Cargo.toml
index e23aaeab9777..100c10ef1d7a 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -36,7 +36,7 @@ smallvec = { version = "1.6.1", features = ["union", "may_dangle"] }
 tempfile = "3.7.1"
 
 [dev-dependencies]
-lang_tester = "0.3.9"
+lang_tester = "0.8.0"
 tempfile = "3.1.0"
 boml = "0.3.1"
 
diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index 67629a3c95a8..d116daab7c43 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -37,8 +37,8 @@ pub fn main_inner(profile: Profile) {
         .to_string();
     env::set_var("LD_LIBRARY_PATH", gcc_path);
 
-    fn rust_filter(filename: &Path) -> bool {
-        filename.extension().expect("extension").to_str().expect("to_str") == "rs"
+    fn rust_filter(path: &Path) -> bool {
+        path.is_file() && path.extension().expect("extension").to_str().expect("to_str") == "rs"
     }
 
     #[cfg(feature = "master")]
@@ -58,16 +58,17 @@ pub fn main_inner(profile: Profile) {
 
     LangTester::new()
         .test_dir("tests/run")
-        .test_file_filter(filter)
-        .test_extract(|source| {
-            let lines = source
+        .test_path_filter(filter)
+        .test_extract(|path| {
+            let lines = std::fs::read_to_string(path)
+                .expect("read file")
                 .lines()
                 .skip_while(|l| !l.starts_with("//"))
                 .take_while(|l| l.starts_with("//"))
                 .map(|l| &l[2..])
                 .collect::<Vec<_>>()
                 .join("\n");
-            Some(lines)
+            lines
         })
         .test_cmds(move |path| {
             // Test command 1: Compile `x.rs` into `tempdir/x`.

From b76515708b5aab54fc69c50babc03ab92daaff08 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 5 Mar 2024 08:23:27 -0500
Subject: [PATCH 569/997] Workaround for linker error about missing
 -lLLVM-18-rust-1.78.0-nightly

---
 build.rs                               | 6 ++++++
 deps/libLLVM-18-rust-1.78.0-nightly.so | 1 +
 2 files changed, 7 insertions(+)
 create mode 100644 build.rs
 create mode 100644 deps/libLLVM-18-rust-1.78.0-nightly.so

diff --git a/build.rs b/build.rs
new file mode 100644
index 000000000000..b93c17793bf3
--- /dev/null
+++ b/build.rs
@@ -0,0 +1,6 @@
+// TODO: remove this file and deps/libLLVM-18-rust-1.78.0-nightly.so when
+// https://github.com/rust-lang/rust/pull/121967 is merged.
+fn main() {
+    println!("cargo:rerun-if-changed=deps/libLLVM-18-rust-1.78.0-nightly.so");
+    println!("cargo:rustc-link-search=deps");
+}
diff --git a/deps/libLLVM-18-rust-1.78.0-nightly.so b/deps/libLLVM-18-rust-1.78.0-nightly.so
new file mode 100644
index 000000000000..c44ca790b4f8
--- /dev/null
+++ b/deps/libLLVM-18-rust-1.78.0-nightly.so
@@ -0,0 +1 @@
+INPUT(libLLVM.so.18.1-rust-1.78.0-nightly)

From cd75da1f2ce67cf0ee10a4189b13c321f9c6ae4e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 5 Mar 2024 08:33:42 -0500
Subject: [PATCH 570/997] Fix formatting

---
 src/builder.rs       | 22 ++++++++----
 src/errors.rs        |  4 +--
 src/intrinsic/mod.rs | 82 +++++++++++++++++++++++---------------------
 src/type_.rs         |  4 +--
 src/type_of.rs       | 31 ++++++++++++++---
 5 files changed, 87 insertions(+), 56 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 25eb987d6256..f5cda81f6ab8 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1018,19 +1018,21 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
                 let llty = place.layout.scalar_pair_element_gcc_type(self, i);
                 let load = self.load(llty, llptr, align);
                 scalar_load_metadata(self, load, scalar);
-                if scalar.is_bool() { self.trunc(load, self.type_i1()) } else { load }
+                if scalar.is_bool() {
+                    self.trunc(load, self.type_i1())
+                } else {
+                    load
+                }
             };
 
             OperandValue::Pair(
                 load(0, a, place.align),
                 load(1, b, place.align.restrict_for_offset(b_offset)),
             )
-        }
-        else {
+        } else {
             OperandValue::Ref(place.llval, None, place.align)
         };
 
-
         OperandRef { val, layout: place.layout }
     }
 
@@ -2075,7 +2077,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         self.vector_reduce(src, |a, b, context| context.new_binary_op(loc, op, a.get_type(), a, b))
     }
 
-    pub fn vector_reduce_fadd_reassoc(&mut self, _acc: RValue<'gcc>, _src: RValue<'gcc>) -> RValue<'gcc> {
+    pub fn vector_reduce_fadd_reassoc(
+        &mut self,
+        _acc: RValue<'gcc>,
+        _src: RValue<'gcc>,
+    ) -> RValue<'gcc> {
         unimplemented!();
     }
 
@@ -2102,7 +2108,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         unimplemented!();
     }
 
-    pub fn vector_reduce_fmul_reassoc(&mut self, _acc: RValue<'gcc>, _src: RValue<'gcc>) -> RValue<'gcc> {
+    pub fn vector_reduce_fmul_reassoc(
+        &mut self,
+        _acc: RValue<'gcc>,
+        _src: RValue<'gcc>,
+    ) -> RValue<'gcc> {
         unimplemented!();
     }
 
diff --git a/src/errors.rs b/src/errors.rs
index 1d3e09d3f9c5..f963a153fbab 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -1,6 +1,4 @@
-use rustc_errors::{
-    DiagCtxt, Diag, EmissionGuarantee, IntoDiagnostic, Level,
-};
+use rustc_errors::{Diag, DiagCtxt, EmissionGuarantee, IntoDiagnostic, Level};
 use rustc_macros::{Diagnostic, Subdiagnostic};
 use rustc_span::Span;
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 24d4650e9c2e..a6c8b72e851b 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -22,10 +22,10 @@ use rustc_middle::bug;
 use rustc_middle::ty::layout::LayoutOf;
 #[cfg(feature = "master")]
 use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt};
-use rustc_span::{Span, Symbol, sym};
-use rustc_target::abi::HasDataLayout;
 use rustc_middle::ty::{self, Instance, Ty};
+use rustc_span::{sym, Span, Symbol};
 use rustc_target::abi::call::{ArgAbi, FnAbi, PassMode};
+use rustc_target::abi::HasDataLayout;
 #[cfg(feature = "master")]
 use rustc_target::spec::abi::Abi;
 use rustc_target::spec::PanicStrategy;
@@ -122,44 +122,46 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         let result = PlaceRef::new_sized(llresult, fn_abi.ret.layout);
 
         let simple = get_simple_intrinsic(self, name);
-        let llval =
-            match name {
-                _ if simple.is_some() => {
-                    // FIXME(antoyo): remove this cast when the API supports function.
-                    let func = unsafe { std::mem::transmute(simple.expect("simple")) };
-                    self.call(self.type_void(), None, None, func, &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(), None)
-                },
-                sym::likely => {
-                    self.expect(args[0].immediate(), true)
-                }
-                sym::unlikely => {
-                    self.expect(args[0].immediate(), false)
-                }
-                sym::is_val_statically_known => {
-                    let a = args[0].immediate();
-                    let builtin = self.context.get_builtin_function("__builtin_constant_p");
-                    let res = self.context.new_call(None, builtin, &[a]);
-                    self.icmp(IntPredicate::IntEQ, res, self.const_i32(0))
-                }
-                sym::catch_unwind => {
-                    try_intrinsic(
-                        self,
-                        args[0].immediate(),
-                        args[1].immediate(),
-                        args[2].immediate(),
-                        llresult,
-                    );
-                    return Ok(());
-                }
-                sym::breakpoint => {
-                    unimplemented!();
-                }
-                sym::va_copy => {
-                    unimplemented!();
-                }
-                sym::va_arg => {
-                    unimplemented!();
-                }
+        let llval = match name {
+            _ if simple.is_some() => {
+                // FIXME(antoyo): remove this cast when the API supports function.
+                let func = unsafe { std::mem::transmute(simple.expect("simple")) };
+                self.call(
+                    self.type_void(),
+                    None,
+                    None,
+                    func,
+                    &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
+                    None,
+                )
+            }
+            sym::likely => self.expect(args[0].immediate(), true),
+            sym::unlikely => self.expect(args[0].immediate(), false),
+            sym::is_val_statically_known => {
+                let a = args[0].immediate();
+                let builtin = self.context.get_builtin_function("__builtin_constant_p");
+                let res = self.context.new_call(None, builtin, &[a]);
+                self.icmp(IntPredicate::IntEQ, res, self.const_i32(0))
+            }
+            sym::catch_unwind => {
+                try_intrinsic(
+                    self,
+                    args[0].immediate(),
+                    args[1].immediate(),
+                    args[2].immediate(),
+                    llresult,
+                );
+                return Ok(());
+            }
+            sym::breakpoint => {
+                unimplemented!();
+            }
+            sym::va_copy => {
+                unimplemented!();
+            }
+            sym::va_arg => {
+                unimplemented!();
+            }
 
             sym::volatile_load | sym::unaligned_volatile_load => {
                 let tp_ty = fn_args.type_at(0);
diff --git a/src/type_.rs b/src/type_.rs
index df091bfde77b..8fe3328ec55f 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -123,7 +123,7 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn type_f16(&self) -> Type<'gcc> {
         unimplemented!("f16_f128")
     }
-    
+
     fn type_f32(&self) -> Type<'gcc> {
         self.float_type
     }
@@ -131,7 +131,7 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn type_f64(&self) -> Type<'gcc> {
         self.double_type
     }
-    
+
     fn type_f128(&self) -> Type<'gcc> {
         unimplemented!("f16_f128")
     }
diff --git a/src/type_of.rs b/src/type_of.rs
index 27344a1b83db..8f9bfbbd18fb 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -5,9 +5,12 @@ use gccjit::{Struct, Type};
 use rustc_middle::bug;
 use rustc_middle::ty::layout::{LayoutOf, TyAndLayout};
 use rustc_middle::ty::print::with_no_trimmed_paths;
-use rustc_target::abi::{self, Abi, Align, F16, F128, F32, F64, FieldsShape, Int, Integer, Pointer, PointeeInfo, Size, TyAbiInterface, Variants};
 use rustc_middle::ty::{self, Ty, TypeVisitableExt};
 use rustc_target::abi::call::{CastTarget, FnAbi, Reg};
+use rustc_target::abi::{
+    self, Abi, Align, FieldsShape, Int, Integer, PointeeInfo, Pointer, Size, TyAbiInterface,
+    Variants, F128, F16, F32, F64,
+};
 
 use crate::abi::{FnAbiGcc, FnAbiGccExt, GccType};
 use crate::context::CodegenCx;
@@ -157,9 +160,22 @@ pub trait LayoutGccExt<'tcx> {
     fn is_gcc_scalar_pair(&self) -> bool;
     fn gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc>;
     fn immediate_gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc>;
-    fn scalar_gcc_type_at<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, scalar: &abi::Scalar, offset: Size) -> Type<'gcc>;
-    fn scalar_pair_element_gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, index: usize) -> Type<'gcc>;
-    fn pointee_info_at<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>, offset: Size) -> Option<PointeeInfo>;
+    fn scalar_gcc_type_at<'gcc>(
+        &self,
+        cx: &CodegenCx<'gcc, 'tcx>,
+        scalar: &abi::Scalar,
+        offset: Size,
+    ) -> Type<'gcc>;
+    fn scalar_pair_element_gcc_type<'gcc>(
+        &self,
+        cx: &CodegenCx<'gcc, 'tcx>,
+        index: usize,
+    ) -> Type<'gcc>;
+    fn pointee_info_at<'gcc>(
+        &self,
+        cx: &CodegenCx<'gcc, 'tcx>,
+        offset: Size,
+    ) -> Option<PointeeInfo>;
 }
 
 impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
@@ -341,7 +357,12 @@ impl<'gcc, 'tcx> LayoutTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         layout.is_gcc_scalar_pair()
     }
 
-    fn scalar_pair_element_backend_type(&self, layout: TyAndLayout<'tcx>, index: usize, _immediate: bool) -> Type<'gcc> {
+    fn scalar_pair_element_backend_type(
+        &self,
+        layout: TyAndLayout<'tcx>,
+        index: usize,
+        _immediate: bool,
+    ) -> Type<'gcc> {
         layout.scalar_pair_element_gcc_type(self, index)
     }
 

From 499d3c229d2516b7ce9f5930ea15339467693580 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 5 Mar 2024 08:42:30 -0500
Subject: [PATCH 571/997] Fix CI

---
 build_system/src/test.rs        | 1 +
 tests/failing-non-lto-tests.txt | 2 +-
 tests/failing-ui-tests.txt      | 1 -
 3 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 470bb2431d56..4f9791dde480 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -912,6 +912,7 @@ fn should_remove_test(file_path: &Path) -> Result<bool, String> {
         }
         if [
             "// error-pattern:",
+            "// @error-pattern:",
             "// build-fail",
             "// run-fail",
             "-Cllvm-args",
diff --git a/tests/failing-non-lto-tests.txt b/tests/failing-non-lto-tests.txt
index 4fd60f2b8e4f..384dfdc26fb5 100644
--- a/tests/failing-non-lto-tests.txt
+++ b/tests/failing-non-lto-tests.txt
@@ -5,7 +5,7 @@ tests/ui/lto/lto-many-codegen-units.rs
 tests/ui/lto/issue-100772.rs
 tests/ui/lto/lto-rustc-loads-linker-plugin.rs
 tests/ui/panic-runtime/lto-unwind.rs
-tests/ui/sanitize/issue-111184-coroutine-witness.rs
+tests/ui/sanitizer/issue-111184-cfi-coroutine-witness.rs
 tests/ui/sepcomp/sepcomp-lib-lto.rs
 tests/ui/lto/lto-opt-level-s.rs
 tests/ui/lto/lto-opt-level-z.rs
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index e504021bf2ad..b9ad7ef33cff 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -76,7 +76,6 @@ tests/ui/linkage-attr/linkage-detect-extern-generated-name-collision.rs
 tests/ui/numbers-arithmetic/divide-by-zero.rs
 tests/ui/numbers-arithmetic/mod-zero.rs
 tests/ui/numbers-arithmetic/overflowing-neg-nonzero.rs
-tests/ui/numbers-arithmetic/overflowing-neg.rs
 tests/ui/optimization-remark.rs
 tests/ui/panic-handler/panic-handler-std.rs
 tests/ui/panic-runtime/abort-link-to-unwind-dylib.rs

From 42a0d63238a511fa913fbe7291903fa739c105b2 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 5 Mar 2024 15:47:58 +0100
Subject: [PATCH 572/997] Ignore rand tests warnings

---
 build_system/src/test.rs | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 4f9791dde480..36d72512dfd0 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -771,11 +771,19 @@ fn extended_rand_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         println!("Not using GCC master branch. Skipping `extended_rand_tests`.");
         return Ok(());
     }
+    let mut env = env.clone();
+    // newer aho_corasick versions throw a deprecation warning
+    let rustflags = format!(
+        "{} --cap-lints warn",
+        env.get("RUSTFLAGS").cloned().unwrap_or_default()
+    );
+    env.insert("RUSTFLAGS".to_string(), rustflags);
+
     let path = Path::new(crate::BUILD_DIR).join("rand");
-    run_cargo_command(&[&"clean"], Some(&path), env, args)?;
+    run_cargo_command(&[&"clean"], Some(&path), &env, args)?;
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[TEST] rust-random/rand");
-    run_cargo_command(&[&"test", &"--workspace"], Some(&path), env, args)?;
+    run_cargo_command(&[&"test", &"--workspace"], Some(&path), &env, args)?;
     Ok(())
 }
 

From 86a2bb760c729fe620a45f35fb55e89abeacfc40 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 5 Mar 2024 10:25:02 -0500
Subject: [PATCH 573/997] Fix CI

---
 build_system/src/test.rs    |  9 +++++----
 tests/failing-lto-tests.txt |  5 -----
 tests/failing-ui-tests.txt  | 33 ---------------------------------
 3 files changed, 5 insertions(+), 42 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 36d72512dfd0..a4db2fdebef1 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -919,10 +919,9 @@ fn should_remove_test(file_path: &Path) -> Result<bool, String> {
             continue;
         }
         if [
-            "// error-pattern:",
-            "// @error-pattern:",
-            "// build-fail",
-            "// run-fail",
+            "//@ error-pattern:",
+            "//@ build-fail",
+            "//@ run-fail",
             "-Cllvm-args",
             "//~",
             "thread",
@@ -1016,6 +1015,8 @@ where
     // Tests generating errors.
     remove_file(&rust_path.join("tests/ui/consts/issue-94675.rs"))?;
     remove_file(&rust_path.join("tests/ui/mir/mir_heavy_promoted.rs"))?;
+    remove_file(&rust_path.join("tests/ui/rfcs/rfc-2632-const-trait-impl/const-drop-fail.rs"))?;
+    remove_file(&rust_path.join("tests/ui/rfcs/rfc-2632-const-trait-impl/const-drop.rs"))?;
 
     walk_dir(rust_path.join("tests/ui"), dir_handling, file_handling)?;
 
diff --git a/tests/failing-lto-tests.txt b/tests/failing-lto-tests.txt
index 8de45ae0f28b..6e1ed99c6f7a 100644
--- a/tests/failing-lto-tests.txt
+++ b/tests/failing-lto-tests.txt
@@ -21,7 +21,6 @@ tests/ui/fmt/format-args-capture-issue-106408.rs
 tests/ui/fmt/indoc-issue-106408.rs
 tests/ui/hygiene/issue-77523-def-site-async-await.rs
 tests/ui/inherent-impls-overlap-check/no-overlap.rs
-tests/ui/annotate-snippet/multispan.rs
 tests/ui/enum-discriminant/issue-46519.rs
 tests/ui/issues/issue-45731.rs
 tests/ui/lint/test-allow-dead-extern-static-no-warning.rs
@@ -29,9 +28,5 @@ tests/ui/macros/macro-comma-behavior-rpass.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/assert-with-custom-errors-does-not-create-unnecessary-code.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/feature-gate-generic_assert.rs
 tests/ui/macros/stringify.rs
-tests/ui/panics/test-panic.rs
-tests/ui/panics/test-should-fail-bad-message.rs
-tests/ui/panics/test-should-panic-bad-message.rs
-tests/ui/panics/test-should-panic-no-message.rs
 tests/ui/reexport-test-harness-main.rs
 tests/ui/rfcs/rfc-1937-termination-trait/termination-trait-in-test.rs
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index b9ad7ef33cff..d13562f8bb01 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -69,41 +69,8 @@ tests/ui/async-await/deep-futures-are-freeze.rs
 tests/ui/closures/capture-unsized-by-ref.rs
 tests/ui/coroutine/resume-after-return.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs
-tests/ui/limits/issue-17913.rs
-tests/ui/limits/issue-55878.rs
-tests/ui/linkage-attr/common-linkage-non-zero-init.rs
-tests/ui/linkage-attr/linkage-detect-extern-generated-name-collision.rs
-tests/ui/numbers-arithmetic/divide-by-zero.rs
-tests/ui/numbers-arithmetic/mod-zero.rs
-tests/ui/numbers-arithmetic/overflowing-neg-nonzero.rs
-tests/ui/optimization-remark.rs
-tests/ui/panic-handler/panic-handler-std.rs
-tests/ui/panic-runtime/abort-link-to-unwind-dylib.rs
-tests/ui/panic-runtime/need-unwind-got-abort.rs
-tests/ui/panics/issue-47429-short-backtraces.rs
-tests/ui/panics/panic-in-cleanup.rs
-tests/ui/panics/panic-in-ffi.rs
-tests/ui/panics/runtime-switch.rs
-tests/ui/panics/short-ice-remove-middle-frames-2.rs
-tests/ui/panics/short-ice-remove-middle-frames.rs
-tests/ui/precondition-checks/out-of-bounds-get-unchecked.rs
 tests/ui/simd/masked-load-store.rs
 tests/ui/simd/repr_packed.rs
-tests/ui/type_length_limit.rs
 tests/ui/async-await/in-trait/dont-project-to-specializable-projection.rs
-tests/ui/async-await/issues/issue-65419/issue-65419-coroutine-resume-after-completion.rs
-tests/ui/c-variadic/issue-86053-1.rs
-tests/ui/const-ptr/out_of_bounds_read.rs
-tests/ui/consts/const_unsafe_unreachable_ub.rs
-tests/ui/consts/miri_unleashed/drop.rs
-tests/ui/consts/timeout.rs
 tests/ui/consts/try-operator.rs
-tests/ui/coroutine/coroutine-resume-after-panic.rs
 tests/ui/coroutine/unwind-abort-mix.rs
-tests/ui/duplicate/dupe-symbols-7.rs
-tests/ui/duplicate/dupe-symbols-8.rs
-tests/ui/hygiene/panic-location.rs
-tests/ui/invalid/issue-114435-layout-type-err.rs
-tests/ui/invalid-compile-flags/invalid-llvm-passes.rs
-tests/ui/lto/issue-105637.rs
-tests/ui/lto/lto-duplicate-symbols.rs

From 3b4c58d7f570f2db6a35e5a3d90167cfada02dd3 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 5 Mar 2024 12:50:14 -0500
Subject: [PATCH 574/997] Fix rand tests

---
 build_system/src/prepare.rs                   | 26 +++++++++++++++++++
 .../crates/0001-Remove-deny-warnings.patch    | 24 +++++++++++++++++
 2 files changed, 50 insertions(+)
 create mode 100644 patches/crates/0001-Remove-deny-warnings.patch

diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 4ea334ad8b90..821c793c7e55 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -131,6 +131,30 @@ fn prepare_libcore(
         )?;
     }
     println!("Successfully prepared libcore for building");
+
+    Ok(())
+}
+
+// TODO: remove when we can ignore warnings in rustdoc tests.
+fn prepare_rand() -> Result<(), String> {
+    // Apply patch for the rand crate.
+    let file_path = "patches/crates/0001-Remove-deny-warnings.patch";
+    let rand_dir = Path::new("build/rand");
+    println!("[GIT] apply `{}`", file_path);
+    let path = Path::new("../..").join(file_path);
+    run_command_with_output(&[&"git", &"apply", &path], Some(rand_dir))?;
+    run_command_with_output(&[&"git", &"add", &"-A"], Some(rand_dir))?;
+    run_command_with_output(
+        &[
+            &"git",
+            &"commit",
+            &"--no-gpg-sign",
+            &"-m",
+            &format!("Patch {}", path.display()),
+        ],
+        Some(rand_dir),
+    )?;
+
     Ok(())
 }
 
@@ -241,6 +265,8 @@ pub fn run() -> Result<(), String> {
         for (repo_url, checkout_commit, cb) in to_clone {
             clone_and_setup(repo_url, checkout_commit, *cb)?;
         }
+
+        prepare_rand()?;
     }
 
     println!("Successfully ran `prepare`");
diff --git a/patches/crates/0001-Remove-deny-warnings.patch b/patches/crates/0001-Remove-deny-warnings.patch
new file mode 100644
index 000000000000..66ea1df4e137
--- /dev/null
+++ b/patches/crates/0001-Remove-deny-warnings.patch
@@ -0,0 +1,24 @@
+From f4a31d2c57cdbd578b778ab70eb2a0cfb248652c Mon Sep 17 00:00:00 2001
+From: Antoni Boucher <bouanto@zoho.com>
+Date: Tue, 5 Mar 2024 12:39:44 -0500
+Subject: [PATCH] Remove #[deny(warnings)]
+
+---
+ src/lib.rs | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/src/lib.rs b/src/lib.rs
+index 8ade2881d5..e26c595e38 100644
+--- a/src/lib.rs
++++ b/src/lib.rs
+@@ -47,7 +47,6 @@
+ )]
+ #![deny(missing_docs)]
+ #![deny(missing_debug_implementations)]
+-#![doc(test(attr(allow(unused_variables), deny(warnings))))]
+ #![no_std]
+ #![cfg_attr(feature = "simd_support", feature(stdsimd, portable_simd))]
+ #![cfg_attr(doc_cfg, feature(doc_cfg))]
+-- 
+2.44.0
+

From 45aa965bd516620a9a92e583c0cfe34ec1b923ba Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 10 Mar 2024 17:19:48 +0100
Subject: [PATCH 575/997] Update rustc version to 2024-03-10

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index a0ac82866609..42c26df058a6 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2024-03-05"
+channel = "nightly-2024-03-10"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From f7622d11a738cfc9d0dbf1c54d6b035a10c83fc3 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 10 Mar 2024 17:31:34 +0100
Subject: [PATCH 576/997] fmt

---
 src/asm.rs | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 6dc21e02de01..72d572465f40 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -485,9 +485,8 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                         }
 
                         InlineAsmOperandRef::Label { label } => {
-                            let label_gcc_index = labels.iter()
-                                .position(|&l| l == label)
-                                .expect("wrong rust index");
+                            let label_gcc_index =
+                                labels.iter().position(|&l| l == label).expect("wrong rust index");
                             let gcc_index = label_gcc_index + outputs.len() + inputs.len();
                             push_to_template(Some('l'), gcc_index);
                         }
@@ -538,9 +537,8 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         }
         if dest.is_none() && options.contains(InlineAsmOptions::NORETURN) {
             let builtin_unreachable = self.context.get_builtin_function("__builtin_unreachable");
-            let builtin_unreachable: RValue<'gcc> = unsafe {
-                std::mem::transmute(builtin_unreachable)
-            };
+            let builtin_unreachable: RValue<'gcc> =
+                unsafe { std::mem::transmute(builtin_unreachable) };
             self.call(self.type_void(), None, None, builtin_unreachable, &[], None);
         }
 

From fc2d1edad794a985ed7fac95b61c3774e5550ca6 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 10 Mar 2024 17:45:20 +0100
Subject: [PATCH 577/997] Add new failing tests

---
 tests/failing-ui-tests.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index d13562f8bb01..de838231a1f9 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -74,3 +74,5 @@ tests/ui/simd/repr_packed.rs
 tests/ui/async-await/in-trait/dont-project-to-specializable-projection.rs
 tests/ui/consts/try-operator.rs
 tests/ui/coroutine/unwind-abort-mix.rs
+tests/ui/type-alias-impl-trait/rpit_tait_equality_in_canonical_query.rs
+tests/ui/impl-trait/equality-in-canonical-query.rs

From ba5231751811386387746bafb1bb791be5057132 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 10 Mar 2024 22:10:05 +0100
Subject: [PATCH 578/997] Add code comment about the `--backend` option usage

---
 build_system/src/config.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 34c92a3485ed..0a7258958e7e 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -398,6 +398,8 @@ impl ConfigInfo {
             .display()
             .to_string();
         if let Some(backend) = &self.backend {
+            // This option is only used in the rust compiler testsuite. The sysroot is handled
+            // by its build system directly so no need to set it ourselves.
             rustflags.push(format!("-Zcodegen-backend={}", backend));
         } else {
             rustflags.extend_from_slice(&[

From ca883bdbe48f683a5ed06f40fd156e4d97354ee5 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 10 Mar 2024 23:34:00 +0100
Subject: [PATCH 579/997] Remove unused files

---
 build.rs                               | 6 ------
 deps/libLLVM-18-rust-1.78.0-nightly.so | 1 -
 2 files changed, 7 deletions(-)
 delete mode 100644 build.rs
 delete mode 100644 deps/libLLVM-18-rust-1.78.0-nightly.so

diff --git a/build.rs b/build.rs
deleted file mode 100644
index b93c17793bf3..000000000000
--- a/build.rs
+++ /dev/null
@@ -1,6 +0,0 @@
-// TODO: remove this file and deps/libLLVM-18-rust-1.78.0-nightly.so when
-// https://github.com/rust-lang/rust/pull/121967 is merged.
-fn main() {
-    println!("cargo:rerun-if-changed=deps/libLLVM-18-rust-1.78.0-nightly.so");
-    println!("cargo:rustc-link-search=deps");
-}
diff --git a/deps/libLLVM-18-rust-1.78.0-nightly.so b/deps/libLLVM-18-rust-1.78.0-nightly.so
deleted file mode 100644
index c44ca790b4f8..000000000000
--- a/deps/libLLVM-18-rust-1.78.0-nightly.so
+++ /dev/null
@@ -1 +0,0 @@
-INPUT(libLLVM.so.18.1-rust-1.78.0-nightly)

From 6f76488b2f8ca6019f01e15ffc896ca21f747254 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Fri, 8 Mar 2024 18:47:20 +0800
Subject: [PATCH 580/997] fix(fmt/style): Remove unncessary clones, into's and
 deref's

---
 src/attributes.rs     |  6 +++---
 src/back/lto.rs       |  3 +--
 src/back/write.rs     |  2 +-
 src/base.rs           |  2 +-
 src/builder.rs        | 30 ++++++++++++++----------------
 src/callee.rs         |  4 ++--
 src/common.rs         | 11 ++++++-----
 src/consts.rs         | 24 ++++++++----------------
 src/context.rs        | 10 +++++-----
 src/debuginfo.rs      |  2 +-
 src/declare.rs        | 14 ++++++--------
 src/int.rs            | 19 ++++++++-----------
 src/intrinsic/llvm.rs | 17 +++++++----------
 src/intrinsic/mod.rs  | 20 ++++++++++----------
 src/intrinsic/simd.rs |  5 ++---
 src/type_of.rs        |  2 +-
 16 files changed, 76 insertions(+), 95 deletions(-)

diff --git a/src/attributes.rs b/src/attributes.rs
index 8602566ab8fa..2ce0c83008f1 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -92,7 +92,7 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
     let mut function_features = function_features
         .iter()
         .flat_map(|feat| to_gcc_features(cx.tcx.sess, feat).into_iter())
-        .chain(codegen_fn_attrs.instruction_set.iter().map(|x| match x {
+        .chain(codegen_fn_attrs.instruction_set.iter().map(|x| match *x {
             InstructionSetAttr::ArmA32 => "-thumb-mode", // TODO(antoyo): support removing feature.
             InstructionSetAttr::ArmT32 => "thumb-mode",
         }))
@@ -118,8 +118,8 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
 
             if feature.starts_with('-') {
                 Some(format!("no{}", feature))
-            } else if feature.starts_with('+') {
-                Some(feature[1..].to_string())
+            } else if let Some(stripped) = feature.strip_prefix('+') {
+                Some(stripped.to_string())
             } else {
                 Some(feature.to_string())
             }
diff --git a/src/back/lto.rs b/src/back/lto.rs
index 61e0f203ee0b..96e0b84450f8 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -128,8 +128,7 @@ fn prepare_lto(
             }
 
             let archive_data = unsafe {
-                Mmap::map(File::open(&path).expect("couldn't open rlib"))
-                    .expect("couldn't map rlib")
+                Mmap::map(File::open(path).expect("couldn't open rlib")).expect("couldn't map rlib")
             };
             let archive = ArchiveFile::parse(&*archive_data).expect("wanted an rlib");
             let obj_files = archive
diff --git a/src/back/write.rs b/src/back/write.rs
index 76a619a1af78..a38fc8c14fbb 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -104,7 +104,7 @@ pub(crate) unsafe fn codegen(
                     // FIXME(antoyo): segfault in dump_reproducer_to_file() might be caused by
                     // transmuting an rvalue to an lvalue.
                     // Segfault is actually in gcc::jit::reproducer::get_identifier_as_lvalue
-                    context.dump_reproducer_to_file(&format!("/tmp/reproducers/{}.c", module.name));
+                    context.dump_reproducer_to_file(format!("/tmp/reproducers/{}.c", module.name));
                     println!("Dumped reproducer {}", module.name);
                 }
                 if env::var("CG_GCCJIT_DUMP_TO_FILE").as_deref() == Ok("1") {
diff --git a/src/base.rs b/src/base.rs
index 2a2d5741d131..79a29a1135a1 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -135,7 +135,7 @@ pub fn compile_codegen_unit(
 
         let target_cpu = gcc_util::target_cpu(tcx.sess);
         if target_cpu != "generic" {
-            context.add_command_line_option(&format!("-march={}", target_cpu));
+            context.add_command_line_option(format!("-march={}", target_cpu));
         }
 
         if tcx
diff --git a/src/builder.rs b/src/builder.rs
index f5cda81f6ab8..2241e0ea3643 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -277,8 +277,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             .collect();
 
         // NOTE: to take into account variadic functions.
-        for i in casted_args.len()..args.len() {
-            casted_args.push(args[i]);
+        for arg in args.iter().skip(casted_args.len()) {
+            casted_args.push(*arg);
         }
 
         Cow::Owned(casted_args)
@@ -353,7 +353,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let function_address_names = self.function_address_names.borrow();
             let original_function_name = function_address_names.get(&func_ptr);
             llvm::adjust_intrinsic_arguments(
-                &self,
+                self,
                 gcc_func,
                 args.into(),
                 &func_name,
@@ -361,7 +361,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             )
         };
         let args_adjusted = args.len() != previous_arg_count;
-        let args = self.check_ptr_call("call", func_ptr, &*args);
+        let args = self.check_ptr_call("call", func_ptr, &args);
 
         // gccjit requires to use the result of functions, even when it's not used.
         // That's why we assign the result to a local or call add_eval().
@@ -373,7 +373,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             unsafe { RETURN_VALUE_COUNT += 1 };
             let return_value = self.cx.context.new_call_through_ptr(self.location, func_ptr, &args);
             let return_value = llvm::adjust_intrinsic_return_value(
-                &self,
+                self,
                 return_value,
                 &func_name,
                 &args,
@@ -441,7 +441,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         self.block.add_assignment(
             self.location,
             result,
-            self.cx.context.new_call(self.location, func, &args),
+            self.cx.context.new_call(self.location, func, args),
         );
         result.to_rvalue()
     }
@@ -595,7 +595,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     ) -> RValue<'gcc> {
         let try_block = self.current_func().new_block("try");
 
-        let current_block = self.block.clone();
+        let current_block = self.block;
         self.block = try_block;
         let call = self.call(typ, fn_attrs, None, func, args, None); // TODO(antoyo): use funclet here?
         self.block = current_block;
@@ -1176,7 +1176,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // NOTE: due to opaque pointers now being used, we need to cast here.
         let ptr = self.context.new_cast(self.location, ptr, typ.make_pointer());
         // NOTE: array indexing is always considered in bounds in GCC (TODO(antoyo): to be verified).
-        let mut indices = indices.into_iter();
+        let mut indices = indices.iter();
         let index = indices.next().expect("first index in inbounds_gep");
         let mut result = self.context.new_array_access(self.location, ptr, *index);
         for index in indices {
@@ -1684,7 +1684,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn zext(&mut self, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
         // FIXME(antoyo): this does not zero-extend.
-        if value.get_type().is_bool() && dest_typ.is_i8(&self.cx) {
+        if value.get_type().is_bool() && dest_typ.is_i8(self.cx) {
             // FIXME(antoyo): hack because base::from_immediate converts i1 to i8.
             // Fix the code in codegen_ssa::base::from_immediate.
             return value;
@@ -2057,7 +2057,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 self.context.new_rvalue_from_vector(self.location, mask_type, &vector_elements);
             let shifted = self.context.new_rvalue_vector_perm(self.location, res, res, mask);
             shift *= 2;
-            res = op(res, shifted, &self.context);
+            res = op(res, shifted, self.context);
         }
         self.context
             .new_vector_access(self.location, res, self.context.new_rvalue_zero(self.int_type))
@@ -2073,7 +2073,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 
     pub fn vector_reduce_op(&mut self, src: RValue<'gcc>, op: BinaryOp) -> RValue<'gcc> {
-        let loc = self.location.clone();
+        let loc = self.location;
         self.vector_reduce(src, |a, b, context| context.new_binary_op(loc, op, a.get_type(), a, b))
     }
 
@@ -2090,7 +2090,6 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
         let element_count = vector_type.get_num_units();
         (0..element_count)
-            .into_iter()
             .map(|i| {
                 self.context
                     .new_vector_access(
@@ -2121,7 +2120,6 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let vector_type = src.get_type().unqualified().dyncast_vector().expect("vector type");
         let element_count = vector_type.get_num_units();
         (0..element_count)
-            .into_iter()
             .map(|i| {
                 self.context
                     .new_vector_access(
@@ -2141,7 +2139,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
     // Inspired by Hacker's Delight min implementation.
     pub fn vector_reduce_min(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
-        let loc = self.location.clone();
+        let loc = self.location;
         self.vector_reduce(src, |a, b, context| {
             let differences_or_zeros = difference_or_zero(loc, a, b, context);
             context.new_binary_op(loc, BinaryOp::Plus, b.get_type(), b, differences_or_zeros)
@@ -2150,7 +2148,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
     // Inspired by Hacker's Delight max implementation.
     pub fn vector_reduce_max(&mut self, src: RValue<'gcc>) -> RValue<'gcc> {
-        let loc = self.location.clone();
+        let loc = self.location;
         self.vector_reduce(src, |a, b, context| {
             let differences_or_zeros = difference_or_zero(loc, a, b, context);
             context.new_binary_op(loc, BinaryOp::Minus, a.get_type(), a, differences_or_zeros)
@@ -2345,7 +2343,7 @@ impl<'tcx> HasParamEnv<'tcx> for Builder<'_, '_, 'tcx> {
 
 impl<'tcx> HasTargetSpec for Builder<'_, '_, 'tcx> {
     fn target_spec(&self) -> &Target {
-        &self.cx.target_spec()
+        self.cx.target_spec()
     }
 }
 
diff --git a/src/callee.rs b/src/callee.rs
index 84f49b6856d4..9ad2e90122f5 100644
--- a/src/callee.rs
+++ b/src/callee.rs
@@ -28,7 +28,7 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
 
     let fn_abi = cx.fn_abi_of_instance(instance, ty::List::empty());
 
-    let func = if let Some(_func) = cx.get_declared_value(&sym) {
+    let func = if let Some(_func) = cx.get_declared_value(sym) {
         // FIXME(antoyo): we never reach this because get_declared_value only returns global variables
         // and here we try to get a function.
         unreachable!();
@@ -68,7 +68,7 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
         }*/
     } else {
         cx.linkage.set(FunctionType::Extern);
-        let func = cx.declare_fn(&sym, &fn_abi);
+        let func = cx.declare_fn(sym, fn_abi);
 
         attributes::from_fn_attrs(cx, func, instance);
 
diff --git a/src/common.rs b/src/common.rs
index d243d7088ada..6a3b5442adf2 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -21,7 +21,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
     fn global_string(&self, string: &str) -> LValue<'gcc> {
         // TODO(antoyo): handle non-null-terminated strings.
-        let string = self.context.new_string_literal(&*string);
+        let string = self.context.new_string_literal(string);
         let sym = self.generate_local_symbol_name("str");
         let global = self.declare_private_global(&sym, self.val_ty(string));
         global.global_set_initializer_rvalue(string);
@@ -170,7 +170,8 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                     return self
                         .context
                         .new_rvalue_from_double(ty, f32::from_bits(data as u32) as f64);
-                } else if ty == self.double_type {
+                }
+                if ty == self.double_type {
                     return self.context.new_rvalue_from_double(ty, f64::from_bits(data as u64));
                 }
 
@@ -293,7 +294,7 @@ impl<'gcc, 'tcx> SignType<'gcc, 'tcx> for Type<'gcc> {
         } else if self.is_ulonglong(cx) {
             cx.longlong_type
         } else {
-            self.clone()
+            *self
         }
     }
 
@@ -319,7 +320,7 @@ impl<'gcc, 'tcx> SignType<'gcc, 'tcx> for Type<'gcc> {
         } else if self.is_longlong(cx) {
             cx.ulonglong_type
         } else {
-            self.clone()
+            *self
         }
     }
 }
@@ -432,7 +433,7 @@ impl<'gcc, 'tcx> TypeReflection<'gcc, 'tcx> for Type<'gcc> {
     }
 
     fn is_vector(&self) -> bool {
-        let mut typ = self.clone();
+        let mut typ = *self;
         loop {
             if typ.dyncast_vector().is_some() {
                 return true;
diff --git a/src/consts.rs b/src/consts.rs
index 327c9bdada92..f47fd5655332 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -66,7 +66,7 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
     fn codegen_static(&self, def_id: DefId, is_mutable: bool) {
         let attrs = self.tcx.codegen_fn_attrs(def_id);
 
-        let value = match codegen_static_initializer(&self, def_id) {
+        let value = match codegen_static_initializer(self, def_id) {
             Ok((value, _)) => value,
             // Error has already been reported
             Err(_) => return,
@@ -231,13 +231,8 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             }
 
             let is_tls = fn_attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-            let global = self.declare_global(
-                &sym,
-                llty,
-                GlobalKind::Exported,
-                is_tls,
-                fn_attrs.link_section,
-            );
+            let global =
+                self.declare_global(sym, llty, GlobalKind::Exported, is_tls, fn_attrs.link_section);
 
             if !self.tcx.is_reachable_non_generic(def_id) {
                 #[cfg(feature = "master")]
@@ -246,7 +241,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
             global
         } else {
-            check_and_apply_linkage(&self, &fn_attrs, ty, sym)
+            check_and_apply_linkage(self, fn_attrs, ty, sym)
         };
 
         if !def_id.is_local() {
@@ -367,11 +362,8 @@ fn check_and_apply_linkage<'gcc, 'tcx>(
     let gcc_type = cx.layout_of(ty).gcc_type(cx);
     if let Some(linkage) = attrs.import_linkage {
         // Declare a symbol `foo` with the desired linkage.
-        let global1 = cx.declare_global_with_linkage(
-            &sym,
-            cx.type_i8(),
-            base::global_linkage_to_gcc(linkage),
-        );
+        let global1 =
+            cx.declare_global_with_linkage(sym, cx.type_i8(), base::global_linkage_to_gcc(linkage));
 
         // Declare an internal global `extern_with_linkage_foo` which
         // is initialized with the address of `foo`.  If `foo` is
@@ -380,7 +372,7 @@ fn check_and_apply_linkage<'gcc, 'tcx>(
         // `extern_with_linkage_foo` will instead be initialized to
         // zero.
         let mut real_name = "_rust_extern_with_linkage_".to_string();
-        real_name.push_str(&sym);
+        real_name.push_str(sym);
         let global2 = cx.define_global(&real_name, gcc_type, is_tls, attrs.link_section);
         // TODO(antoyo): set linkage.
         let value = cx.const_ptrcast(global1.get_address(None), gcc_type);
@@ -397,6 +389,6 @@ fn check_and_apply_linkage<'gcc, 'tcx>(
         // don't do this then linker errors can be generated where the linker
         // complains that one object files has a thread local version of the
         // symbol and another one doesn't.
-        cx.declare_global(&sym, gcc_type, GlobalKind::Imported, is_tls, attrs.link_section)
+        cx.declare_global(sym, gcc_type, GlobalKind::Imported, is_tls, attrs.link_section)
     }
 }
diff --git a/src/context.rs b/src/context.rs
index bc3d62f2679d..1b9cfd3652c8 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -384,7 +384,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     pub fn sess(&self) -> &'tcx Session {
-        &self.tcx.sess
+        self.tcx.sess
     }
 
     pub fn bitcast_if_needed(
@@ -431,7 +431,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let func_name = self.tcx.symbol_name(instance).name;
 
         let func = if self.intrinsics.borrow().contains_key(func_name) {
-            self.intrinsics.borrow()[func_name].clone()
+            self.intrinsics.borrow()[func_name]
         } else {
             get_fn(self, instance)
         };
@@ -485,7 +485,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 let symbol_name = tcx.symbol_name(instance).name;
                 let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
                 self.linkage.set(FunctionType::Extern);
-                let func = self.declare_fn(symbol_name, &fn_abi);
+                let func = self.declare_fn(symbol_name, fn_abi);
                 let func: RValue<'gcc> = unsafe { std::mem::transmute(func) };
                 func
             }
@@ -505,7 +505,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn sess(&self) -> &Session {
-        &self.tcx.sess
+        self.tcx.sess
     }
 
     fn check_overflow(&self) -> bool {
@@ -612,7 +612,7 @@ impl<'b, 'tcx> CodegenCx<'b, 'tcx> {
         // user defined names
         let mut name = String::with_capacity(prefix.len() + 6);
         name.push_str(prefix);
-        name.push_str(".");
+        name.push('.');
         base_n::push_str(idx as u128, base_n::ALPHANUMERIC_ONLY, &mut name);
         name
     }
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index aed15769025f..774930838056 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -225,7 +225,7 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
             file_end_pos: BytePos(0),
         };
         let mut fn_debug_context = FunctionDebugContext {
-            scopes: IndexVec::from_elem(empty_scope, &mir.source_scopes.as_slice()),
+            scopes: IndexVec::from_elem(empty_scope, mir.source_scopes.as_slice()),
             inlined_function_scopes: Default::default(),
         };
 
diff --git a/src/declare.rs b/src/declare.rs
index db6edbab12d4..f4e726a34216 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -35,7 +35,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
     pub fn declare_unnamed_global(&self, ty: Type<'gcc>) -> LValue<'gcc> {
         let name = self.generate_local_symbol_name("global");
-        self.context.new_global(None, GlobalKind::Internal, ty, &name)
+        self.context.new_global(None, GlobalKind::Internal, ty, name)
     }
 
     pub fn declare_global_with_linkage(
@@ -176,16 +176,14 @@ fn declare_raw_fn<'gcc>(
         cx.functions.borrow()[name]
     } else {
         let params: Vec<_> = param_types
-            .into_iter()
+            .iter()
             .enumerate()
-            .map(|(index, param)| {
-                cx.context.new_parameter(None, *param, &format!("param{}", index))
-            }) // TODO(antoyo): set name.
+            .map(|(index, param)| cx.context.new_parameter(None, *param, format!("param{}", index))) // TODO(antoyo): set name.
             .collect();
         #[cfg(not(feature = "master"))]
         let name = mangle_name(name);
         let func =
-            cx.context.new_function(None, cx.linkage.get(), return_type, &params, &name, variadic);
+            cx.context.new_function(None, cx.linkage.get(), return_type, &params, name, variadic);
         cx.functions.borrow_mut().insert(name.to_string(), func);
 
         #[cfg(feature = "master")]
@@ -200,10 +198,10 @@ fn declare_raw_fn<'gcc>(
             // create a wrapper function that calls rust_eh_personality.
 
             let params: Vec<_> = param_types
-                .into_iter()
+                .iter()
                 .enumerate()
                 .map(|(index, param)| {
-                    cx.context.new_parameter(None, *param, &format!("param{}", index))
+                    cx.context.new_parameter(None, *param, format!("param{}", index))
                 }) // TODO(antoyo): set name.
                 .collect();
             let gcc_func = cx.context.new_function(
diff --git a/src/int.rs b/src/int.rs
index 841bcf592e48..fe8625d0642f 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -2,8 +2,6 @@
 //! This module exists because some integer types are not supported on some gcc platforms, e.g.
 //! 128-bit integers on 32-bit platforms and thus require to be handled manually.
 
-use std::convert::TryFrom;
-
 use gccjit::{BinaryOp, ComparisonOp, FunctionType, Location, RValue, ToRValue, Type, UnaryOp};
 use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
 use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeMethods, BuilderMethods, OverflowOp};
@@ -126,7 +124,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
             let shift_value = self.gcc_sub(sixty_four, b);
             // NOTE: cast low to its unsigned type in order to perform a logical right shift.
-            let unsigned_type = native_int_type.to_unsigned(&self.cx);
+            let unsigned_type = native_int_type.to_unsigned(self.cx);
             let casted_low = self.context.new_cast(self.location, self.low(a), unsigned_type);
             let shifted_low = casted_low >> self.context.new_cast(self.location, b, unsigned_type);
             let shifted_low = self.context.new_cast(self.location, shifted_low, native_int_type);
@@ -258,7 +256,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let new_kind = match typ.kind() {
             Int(t @ Isize) => Int(t.normalize(self.tcx.sess.target.pointer_width)),
             Uint(t @ Usize) => Uint(t.normalize(self.tcx.sess.target.pointer_width)),
-            t @ (Uint(_) | Int(_)) => t.clone(),
+            t @ (Uint(_) | Int(_)) => *t,
             _ => panic!("tried to get overflow intrinsic for op applied to non-int type"),
         };
 
@@ -344,7 +342,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             }
         };
 
-        let intrinsic = self.context.get_builtin_function(&name);
+        let intrinsic = self.context.get_builtin_function(name);
         let res = self
             .current_func()
             // TODO(antoyo): is it correct to use rhs type instead of the parameter typ?
@@ -454,7 +452,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let native_int_type = a_type.dyncast_array().expect("get element type");
             // NOTE: cast low to its unsigned type in order to perform a comparison correctly (e.g.
             // the sign is only on high).
-            let unsigned_type = native_int_type.to_unsigned(&self.cx);
+            let unsigned_type = native_int_type.to_unsigned(self.cx);
 
             let lhs_low = self.context.new_cast(self.location, self.low(lhs), unsigned_type);
             let rhs_low = self.context.new_cast(self.location, self.low(rhs), unsigned_type);
@@ -589,7 +587,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 | IntPredicate::IntULT
                 | IntPredicate::IntULE => {
                     if !a_type.is_vector() {
-                        let unsigned_type = a_type.to_unsigned(&self.cx);
+                        let unsigned_type = a_type.to_unsigned(self.cx);
                         lhs = self.context.new_cast(self.location, lhs, unsigned_type);
                         rhs = self.context.new_cast(self.location, rhs, unsigned_type);
                     }
@@ -673,7 +671,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
             // NOTE: cast low to its unsigned type in order to perform a logical right shift.
             // TODO(antoyo): adjust this ^ comment.
-            let unsigned_type = native_int_type.to_unsigned(&self.cx);
+            let unsigned_type = native_int_type.to_unsigned(self.cx);
             let casted_low = self.context.new_cast(self.location, self.low(a), unsigned_type);
             let shift_value = self.context.new_cast(self.location, sixty_four - b, unsigned_type);
             let high_low =
@@ -727,7 +725,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     pub fn gcc_int(&self, typ: Type<'gcc>, int: i64) -> RValue<'gcc> {
         if self.is_native_int_type_or_bool(typ) {
-            self.context.new_rvalue_from_long(typ, i64::try_from(int).expect("i64::try_from"))
+            self.context.new_rvalue_from_long(typ, int)
         } else {
             // NOTE: set the sign in high.
             self.from_low_high(typ, int, -(int.is_negative() as i64))
@@ -740,8 +738,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             let num = self.context.new_rvalue_from_long(self.u64_type, int as i64);
             self.gcc_int_cast(num, typ)
         } else if self.is_native_int_type_or_bool(typ) {
-            self.context
-                .new_rvalue_from_long(typ, u64::try_from(int).expect("u64::try_from") as i64)
+            self.context.new_rvalue_from_long(typ, int as i64)
         } else {
             self.from_low_high(typ, int as i64, 0)
         }
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index ce8dee69a988..c845ee5fe5fd 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -15,7 +15,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
     // Some LLVM intrinsics do not map 1-to-1 to GCC intrinsics, so we add the missing
     // arguments here.
     if gcc_func.get_param_count() != args.len() {
-        match &*func_name {
+        match func_name {
             // NOTE: the following intrinsics have a different number of parameters in LLVM and GCC.
             "__builtin_ia32_prold512_mask"
             | "__builtin_ia32_pmuldq512_mask"
@@ -380,7 +380,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             _ => (),
         }
     } else {
-        match &*func_name {
+        match func_name {
             "__builtin_ia32_rndscaless_mask_round" | "__builtin_ia32_rndscalesd_mask_round" => {
                 let new_args = args.to_vec();
                 let arg3_type = gcc_func.get_param_type(2);
@@ -629,14 +629,11 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
 
 #[cfg(feature = "master")]
 pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
-    match name {
-        "llvm.prefetch" => {
-            let gcc_name = "__builtin_prefetch";
-            let func = cx.context.get_builtin_function(gcc_name);
-            cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
-            return func;
-        }
-        _ => (),
+    if name == "llvm.prefetch" {
+        let gcc_name = "__builtin_prefetch";
+        let func = cx.context.get_builtin_function(gcc_name);
+        cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
+        return func;
     }
 
     let gcc_name = match name {
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index a6c8b72e851b..0cd75ae14250 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -91,7 +91,7 @@ fn get_simple_intrinsic<'gcc, 'tcx>(
         sym::abort => "abort",
         _ => return None,
     };
-    Some(cx.context.get_builtin_function(&gcc_name))
+    Some(cx.context.get_builtin_function(gcc_name))
 }
 
 impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
@@ -699,13 +699,13 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let count_leading_zeroes =
             // TODO(antoyo): write a new function Type::is_compatible_with(&Type) and use it here
             // instead of using is_uint().
-            if arg_type.is_uint(&self.cx) {
+            if arg_type.is_uint(self.cx) {
                 "__builtin_clz"
             }
-            else if arg_type.is_ulong(&self.cx) {
+            else if arg_type.is_ulong(self.cx) {
                 "__builtin_clzl"
             }
-            else if arg_type.is_ulonglong(&self.cx) {
+            else if arg_type.is_ulonglong(self.cx) {
                 "__builtin_clzll"
             }
             else if width == 128 {
@@ -780,17 +780,17 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let (count_trailing_zeroes, expected_type) =
             // TODO(antoyo): write a new function Type::is_compatible_with(&Type) and use it here
             // instead of using is_uint().
-            if arg_type.is_uchar(&self.cx) || arg_type.is_ushort(&self.cx) || arg_type.is_uint(&self.cx) {
+            if arg_type.is_uchar(self.cx) || arg_type.is_ushort(self.cx) || arg_type.is_uint(self.cx) {
                 // NOTE: we don't need to & 0xFF for uchar because the result is undefined on zero.
                 ("__builtin_ctz", self.cx.uint_type)
             }
-            else if arg_type.is_ulong(&self.cx) {
+            else if arg_type.is_ulong(self.cx) {
                 ("__builtin_ctzl", self.cx.ulong_type)
             }
-            else if arg_type.is_ulonglong(&self.cx) {
+            else if arg_type.is_ulonglong(self.cx) {
                 ("__builtin_ctzll", self.cx.ulonglong_type)
             }
-            else if arg_type.is_u128(&self.cx) {
+            else if arg_type.is_u128(self.cx) {
                 // Adapted from the algorithm to count leading zeroes from: https://stackoverflow.com/a/28433850/389119
                 let array_type = self.context.new_array_type(None, arg_type, 3);
                 let result = self.current_func()
@@ -872,7 +872,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         // only break apart 128-bit ints if they're not natively supported
         // TODO(antoyo): remove this if/when native 128-bit integers land in libgccjit
-        if value_type.is_u128(&self.cx) && !self.cx.supports_128bit_integers {
+        if value_type.is_u128(self.cx) && !self.cx.supports_128bit_integers {
             let sixty_four = self.gcc_int(value_type, 64);
             let right_shift = self.gcc_lshr(value, sixty_four);
             let high = self.gcc_int_cast(right_shift, self.cx.ulonglong_type);
@@ -995,7 +995,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
             // Return `result_type`'s maximum or minimum value on overflow
             // NOTE: convert the type to unsigned to have an unsigned shift.
-            let unsigned_type = result_type.to_unsigned(&self.cx);
+            let unsigned_type = result_type.to_unsigned(self.cx);
             let shifted = self.gcc_lshr(
                 self.gcc_int_cast(lhs, unsigned_type),
                 self.gcc_int(unsigned_type, width as i64 - 1),
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index e9af34059a0e..91caa822d0a7 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -308,10 +308,9 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                 })
                 .collect();
             return Ok(bx.context.new_rvalue_from_vector(None, v_type, &elems));
-        } else {
-            // avoid the unnecessary truncation as an optimization.
-            return Ok(bx.context.new_bitcast(None, result, v_type));
         }
+        // avoid the unnecessary truncation as an optimization.
+        return Ok(bx.context.new_bitcast(None, result, v_type));
     }
     // since gcc doesn't have vector shuffle methods available in non-patched builds, fallback to
     // component-wise bitreverses if they're not available.
diff --git a/src/type_of.rs b/src/type_of.rs
index 8f9bfbbd18fb..6779d95359c2 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -220,7 +220,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
                 // to fn_ptr_backend_type handle the on-stack attribute.
                 // TODO(antoyo): find a less hackish way to hande the on-stack attribute.
                 ty::FnPtr(sig) => {
-                    cx.fn_ptr_backend_type(&cx.fn_abi_of_fn_ptr(sig, ty::List::empty()))
+                    cx.fn_ptr_backend_type(cx.fn_abi_of_fn_ptr(sig, ty::List::empty()))
                 }
                 _ => self.scalar_gcc_type_at(cx, scalar, Size::ZERO),
             };

From 9ea3c1905573add3fbd2d768f5a9eb0ef2628ddc Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 9 Mar 2024 13:54:30 +0800
Subject: [PATCH 581/997] fix(fmt/style): Further apply Clippy suggestions
 manually

1. Fix Pattern Type Mismatch by Adding deref's
2. Move commented `else if` to previous block in `intrinsic.rs`
---
 src/debuginfo.rs      | 21 +++++++++++--------
 src/int.rs            |  4 ++--
 src/intrinsic/mod.rs  | 32 ++++++++++++++++-------------
 src/intrinsic/simd.rs | 48 +++++++++++++++++++++----------------------
 src/type_of.rs        |  2 +-
 5 files changed, 58 insertions(+), 49 deletions(-)

diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index 774930838056..a485225a2560 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -91,7 +91,7 @@ fn compute_mir_scopes<'gcc, 'tcx>(
 /// FIXME(tempdragon/?): Add Scope Support Here.
 fn make_mir_scope<'gcc, 'tcx>(
     cx: &CodegenCx<'gcc, 'tcx>,
-    instance: Instance<'tcx>,
+    _instance: Instance<'tcx>,
     mir: &Body<'tcx>,
     variables: &Option<BitSet<SourceScope>>,
     debug_context: &mut FunctionDebugContext<'tcx, (), Location<'gcc>>,
@@ -104,7 +104,7 @@ fn make_mir_scope<'gcc, 'tcx>(
 
     let scope_data = &mir.source_scopes[scope];
     let parent_scope = if let Some(parent) = scope_data.parent_scope {
-        make_mir_scope(cx, instance, mir, variables, debug_context, instantiated, parent);
+        make_mir_scope(cx, _instance, mir, variables, debug_context, instantiated, parent);
         debug_context.scopes[parent]
     } else {
         // The root is the function itself.
@@ -118,7 +118,7 @@ fn make_mir_scope<'gcc, 'tcx>(
         return;
     };
 
-    if let Some(vars) = variables {
+    if let Some(ref vars) = *variables {
         if !vars.contains(scope) && scope_data.inlined.is_none() {
             // Do not create a DIScope if there are no variables defined in this
             // MIR `SourceScope`, and it's not `inlined`, to avoid debuginfo bloat.
@@ -136,8 +136,13 @@ fn make_mir_scope<'gcc, 'tcx>(
     let inlined_at = scope_data.inlined.map(|(_, callsite_span)| {
         // FIXME(eddyb) this doesn't account for the macro-related
         // `Span` fixups that `rustc_codegen_ssa::mir::debuginfo` does.
-        let callsite_scope = parent_scope.adjust_dbg_scope_for_span(cx, callsite_span);
-        cx.dbg_loc(callsite_scope, parent_scope.inlined_at, callsite_span)
+
+        // NOTE: These variables passed () here.
+        // Changed to comply to clippy.
+
+        /* let callsite_scope =  */
+        parent_scope.adjust_dbg_scope_for_span(cx, callsite_span);
+        cx.dbg_loc(/* callsite_scope */ (), parent_scope.inlined_at, callsite_span)
     });
     let p_inlined_at = parent_scope.inlined_at;
     // TODO(tempdragon): dbg_scope: Add support for scope extension here.
@@ -275,15 +280,15 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let pos = span.lo();
         let DebugLoc { file, line, col } = self.lookup_debug_loc(pos);
         let loc = match &file.name {
-            rustc_span::FileName::Real(name) => match name {
-                rustc_span::RealFileName::LocalPath(name) => {
+            rustc_span::FileName::Real(ref name) => match &name {
+                rustc_span::RealFileName::LocalPath(ref name) => {
                     if let Some(name) = name.to_str() {
                         self.context.new_location(name, line as i32, col as i32)
                     } else {
                         Location::null()
                     }
                 }
-                rustc_span::RealFileName::Remapped { local_path, virtual_name: _ } => {
+                rustc_span::RealFileName::Remapped { ref local_path, virtual_name: _unused } => {
                     if let Some(name) = local_path.as_ref() {
                         if let Some(name) = name.to_str() {
                             self.context.new_location(name, line as i32, col as i32)
diff --git a/src/int.rs b/src/int.rs
index fe8625d0642f..6d73baa8a9d6 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -253,10 +253,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     ) -> (<Self as BackendTypes>::Value, <Self as BackendTypes>::Value) {
         use rustc_middle::ty::{Int, IntTy::*, Uint, UintTy::*};
 
-        let new_kind = match typ.kind() {
+        let new_kind = match *typ.kind() {
             Int(t @ Isize) => Int(t.normalize(self.tcx.sess.target.pointer_width)),
             Uint(t @ Usize) => Uint(t.normalize(self.tcx.sess.target.pointer_width)),
-            t @ (Uint(_) | Int(_)) => *t,
+            t @ (Uint(_) | Int(_)) => t,
             _ => panic!("tried to get overflow intrinsic for op applied to non-int type"),
         };
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 0cd75ae14250..b170f4303019 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -166,7 +166,9 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
             sym::volatile_load | sym::unaligned_volatile_load => {
                 let tp_ty = fn_args.type_at(0);
                 let ptr = args[0].immediate();
-                let load = if let PassMode::Cast { cast: ty, pad_i32: _ } = &fn_abi.ret.mode {
+                // The reference was changed to clone to comply to clippy.
+                let load = if let PassMode::Cast { cast: ty, pad_i32: _ } = fn_abi.ret.mode.clone()
+                {
                     let gcc_ty = ty.gcc_type(self);
                     self.volatile_load(gcc_ty, ptr)
                 } else {
@@ -308,17 +310,18 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 let b = args[1].immediate();
                 if layout.size().bytes() == 0 {
                     self.const_bool(true)
-                }
-                /*else if use_integer_compare {
-                    let integer_ty = self.type_ix(layout.size.bits()); // FIXME(antoyo): LLVM creates an integer of 96 bits for [i32; 3], but gcc doesn't support this, so it creates an integer of 128 bits.
-                    let ptr_ty = self.type_ptr_to(integer_ty);
-                    let a_ptr = self.bitcast(a, ptr_ty);
-                    let a_val = self.load(integer_ty, a_ptr, layout.align.abi);
-                    let b_ptr = self.bitcast(b, ptr_ty);
-                    let b_val = self.load(integer_ty, b_ptr, layout.align.abi);
-                    self.icmp(IntPredicate::IntEQ, a_val, b_val)
-                }*/
-                else {
+                    // The else if an immediate neighbor of this block.
+                    // It is moved here to comply to Clippy.
+                    /*else if use_integer_compare {
+                        let integer_ty = self.type_ix(layout.size.bits()); // FIXME(antoyo): LLVM creates an integer of 96 bits for [i32; 3], but gcc doesn't support this, so it creates an integer of 128 bits.
+                        let ptr_ty = self.type_ptr_to(integer_ty);
+                        let a_ptr = self.bitcast(a, ptr_ty);
+                        let a_val = self.load(integer_ty, a_ptr, layout.align.abi);
+                        let b_ptr = self.bitcast(b, ptr_ty);
+                        let b_val = self.load(integer_ty, b_ptr, layout.align.abi);
+                        self.icmp(IntPredicate::IntEQ, a_val, b_val)
+                    }*/
+                } else {
                     let void_ptr_type = self.context.new_type::<*const ()>();
                     let a_ptr = self.bitcast(a, void_ptr_type);
                     let b_ptr = self.bitcast(b, void_ptr_type);
@@ -385,7 +388,8 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         };
 
         if !fn_abi.ret.is_ignore() {
-            if let PassMode::Cast { cast: ty, .. } = &fn_abi.ret.mode {
+            // The reference was changed to clone to comply to clippy.
+            if let PassMode::Cast { cast: ty, .. } = fn_abi.ret.mode.clone() {
                 let ptr_llty = self.type_ptr_to(ty.gcc_type(self));
                 let ptr = self.pointercast(result.llval, ptr_llty);
                 self.store(llval, ptr, result.align);
@@ -586,7 +590,7 @@ fn int_type_width_signed<'gcc, 'tcx>(
     ty: Ty<'tcx>,
     cx: &CodegenCx<'gcc, 'tcx>,
 ) -> Option<(u64, bool)> {
-    match ty.kind() {
+    match *ty.kind() {
         ty::Int(t) => Some((
             match t {
                 rustc_middle::ty::IntTy::Isize => u64::from(cx.tcx.sess.target.pointer_width),
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 91caa822d0a7..d5a2c6125104 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -71,11 +71,11 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         let expected_bytes = len / 8 + ((len % 8 > 0) as u64);
 
         let mask_ty = arg_tys[0];
-        let mut mask = match mask_ty.kind() {
+        let mut mask = match *mask_ty.kind() {
             ty::Int(i) if i.bit_width() == Some(expected_int_bits) => args[0].immediate(),
             ty::Uint(i) if i.bit_width() == Some(expected_int_bits) => args[0].immediate(),
             ty::Array(elem, len)
-                if matches!(elem.kind(), ty::Uint(ty::UintTy::U8))
+                if matches!(*elem.kind(), ty::Uint(ty::UintTy::U8))
                     && len.try_eval_target_usize(bx.tcx, ty::ParamEnv::reveal_all())
                         == Some(expected_bytes) =>
             {
@@ -353,8 +353,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
     if name == sym::simd_shuffle {
         // Make sure this is actually an array, since typeck only checks the length-suffixed
         // version of this intrinsic.
-        let n: u64 = match args[2].layout.ty.kind() {
-            ty::Array(ty, len) if matches!(ty.kind(), ty::Uint(ty::UintTy::U32)) => {
+        let n: u64 = match *args[2].layout.ty.kind() {
+            ty::Array(ty, len) if matches!(*ty.kind(), ty::Uint(ty::UintTy::U32)) => {
                 len.try_eval_target_usize(bx.cx.tcx, ty::ParamEnv::reveal_all()).unwrap_or_else(
                     || span_bug!(span, "could not evaluate shuffle index array length"),
                 )
@@ -427,7 +427,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             m_len == v_len,
             InvalidMonomorphization::MismatchedLengths { span, name, m_len, v_len }
         );
-        match m_elem_ty.kind() {
+        match *m_elem_ty.kind() {
             ty::Int(_) => {}
             _ => return_error!(InvalidMonomorphization::MaskType { span, name, ty: m_elem_ty }),
         }
@@ -460,13 +460,13 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             Unsupported,
         }
 
-        let in_style = match in_elem.kind() {
+        let in_style = match *in_elem.kind() {
             ty::Int(_) | ty::Uint(_) => Style::Int,
             ty::Float(_) => Style::Float,
             _ => Style::Unsupported,
         };
 
-        let out_style = match out_elem.kind() {
+        let out_style = match *out_elem.kind() {
             ty::Int(_) | ty::Uint(_) => Style::Int,
             ty::Float(_) => Style::Float,
             _ => Style::Unsupported,
@@ -493,7 +493,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
     macro_rules! arith_binary {
         ($($name: ident: $($($p: ident),* => $call: ident),*;)*) => {
             $(if name == sym::$name {
-                match in_elem.kind() {
+                match *in_elem.kind() {
                     $($(ty::$p(_))|* => {
                         return Ok(bx.$call(args[0].immediate(), args[1].immediate()))
                     })*
@@ -543,13 +543,13 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             shift += 1;
         }
 
-        match ret_ty.kind() {
+        match *ret_ty.kind() {
             ty::Uint(i) if i.bit_width() == Some(expected_int_bits) => {
                 // Zero-extend iN to the bitmask type:
                 return Ok(result);
             }
             ty::Array(elem, len)
-                if matches!(elem.kind(), ty::Uint(ty::UintTy::U8))
+                if matches!(*elem.kind(), ty::Uint(ty::UintTy::U8))
                     && len.try_eval_target_usize(bx.tcx, ty::ParamEnv::reveal_all())
                         == Some(expected_bytes) =>
             {
@@ -588,7 +588,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                 return Err(());
             }};
         }
-        let (elem_ty_str, elem_ty) = if let ty::Float(f) = in_elem.kind() {
+        let (elem_ty_str, elem_ty) = if let ty::Float(ref f) = *in_elem.kind() {
             let elem_ty = bx.cx.type_float_from_ty(*f);
             match f.bit_width() {
                 32 => ("f", elem_ty),
@@ -795,7 +795,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
 
         // This counts how many pointers
         fn ptr_count(t: Ty<'_>) -> usize {
-            match t.kind() {
+            match *t.kind() {
                 ty::RawPtr(p) => 1 + ptr_count(p.ty),
                 _ => 0,
             }
@@ -803,7 +803,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
 
         // Non-ptr type
         fn non_ptr(t: Ty<'_>) -> Ty<'_> {
-            match t.kind() {
+            match *t.kind() {
                 ty::RawPtr(p) => non_ptr(p.ty),
                 _ => t,
             }
@@ -813,7 +813,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         // to the element type of the first argument
         let (_, element_ty0) = arg_tys[0].simd_size_and_type(bx.tcx());
         let (_, element_ty1) = arg_tys[1].simd_size_and_type(bx.tcx());
-        let (pointer_count, underlying_ty) = match element_ty1.kind() {
+        let (pointer_count, underlying_ty) = match *element_ty1.kind() {
             ty::RawPtr(p) if p.ty == in_elem => (ptr_count(element_ty1), non_ptr(element_ty1)),
             _ => {
                 require!(
@@ -837,7 +837,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
 
         // The element type of the third argument must be a signed integer type of any width:
         let (_, element_ty2) = arg_tys[2].simd_size_and_type(bx.tcx());
-        match element_ty2.kind() {
+        match *element_ty2.kind() {
             ty::Int(_) => (),
             _ => {
                 require!(
@@ -909,7 +909,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
 
         // This counts how many pointers
         fn ptr_count(t: Ty<'_>) -> usize {
-            match t.kind() {
+            match *t.kind() {
                 ty::RawPtr(p) => 1 + ptr_count(p.ty),
                 _ => 0,
             }
@@ -917,7 +917,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
 
         // Non-ptr type
         fn non_ptr(t: Ty<'_>) -> Ty<'_> {
-            match t.kind() {
+            match *t.kind() {
                 ty::RawPtr(p) => non_ptr(p.ty),
                 _ => t,
             }
@@ -928,7 +928,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         let (_, element_ty0) = arg_tys[0].simd_size_and_type(bx.tcx());
         let (_, element_ty1) = arg_tys[1].simd_size_and_type(bx.tcx());
         let (_, element_ty2) = arg_tys[2].simd_size_and_type(bx.tcx());
-        let (pointer_count, underlying_ty) = match element_ty1.kind() {
+        let (pointer_count, underlying_ty) = match *element_ty1.kind() {
             ty::RawPtr(p) if p.ty == in_elem && p.mutbl == hir::Mutability::Mut => {
                 (ptr_count(element_ty1), non_ptr(element_ty1))
             }
@@ -953,7 +953,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         assert_eq!(underlying_ty, non_ptr(element_ty0));
 
         // The element type of the third argument must be a signed integer type of any width:
-        match element_ty2.kind() {
+        match *element_ty2.kind() {
             ty::Int(_) => (),
             _ => {
                 require!(
@@ -1011,7 +1011,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
     macro_rules! arith_unary {
         ($($name: ident: $($($p: ident),* => $call: ident),*;)*) => {
             $(if name == sym::$name {
-                match in_elem.kind() {
+                match *in_elem.kind() {
                     $($(ty::$p(_))|* => {
                         return Ok(bx.$call(args[0].immediate()))
                     })*
@@ -1135,7 +1135,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                     ret_ty == in_elem,
                     InvalidMonomorphization::ReturnType { span, name, in_elem, in_ty, ret_ty }
                 );
-                return match in_elem.kind() {
+                return match *in_elem.kind() {
                     ty::Int(_) | ty::Uint(_) => {
                         let r = bx.vector_reduce_op(args[0].immediate(), $vec_op);
                         if $ordered {
@@ -1204,7 +1204,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                     ret_ty == in_elem,
                     InvalidMonomorphization::ReturnType { span, name, in_elem, in_ty, ret_ty }
                 );
-                return match in_elem.kind() {
+                return match *in_elem.kind() {
                     ty::Int(_) | ty::Uint(_) => Ok(bx.$int_red(args[0].immediate())),
                     ty::Float(_) => Ok(bx.$float_red(args[0].immediate())),
                     _ => return_error!(InvalidMonomorphization::UnsupportedSymbol {
@@ -1233,7 +1233,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                     );
                     args[0].immediate()
                 } else {
-                    match in_elem.kind() {
+                    match *in_elem.kind() {
                         ty::Int(_) | ty::Uint(_) => {}
                         _ => return_error!(InvalidMonomorphization::UnsupportedSymbol {
                             span,
@@ -1247,7 +1247,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
 
                     args[0].immediate()
                 };
-                return match in_elem.kind() {
+                return match *in_elem.kind() {
                     ty::Int(_) | ty::Uint(_) => {
                         let r = bx.vector_reduce_op(input, $op);
                         Ok(if !$boolean {
diff --git a/src/type_of.rs b/src/type_of.rs
index 6779d95359c2..1c9a41649aae 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -90,7 +90,7 @@ fn uncached_gcc_type<'gcc, 'tcx>(
         Abi::Uninhabited | Abi::Aggregate { .. } => {}
     }
 
-    let name = match layout.ty.kind() {
+    let name = match *layout.ty.kind() {
         // FIXME(eddyb) producing readable type names for trait objects can result
         // in problematically distinct types due to HRTB and subtyping (see #47638).
         // ty::Dynamic(..) |

From c6b75581d06a573eb8f419d83f4ecbed18c0e805 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 9 Mar 2024 14:26:46 +0800
Subject: [PATCH 582/997] fix(declare.rs): Clone `name` when buiding without
 the master feat.

---
 src/declare.rs | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/src/declare.rs b/src/declare.rs
index f4e726a34216..555f95fb1556 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -182,6 +182,18 @@ fn declare_raw_fn<'gcc>(
             .collect();
         #[cfg(not(feature = "master"))]
         let name = mangle_name(name);
+
+        #[cfg(not(feature = "master"))]
+        let func = cx.context.new_function(
+            None,
+            cx.linkage.get(),
+            return_type,
+            &params,
+            name.clone(),
+            variadic,
+        );
+
+        #[cfg(feature = "master")]
         let func =
             cx.context.new_function(None, cx.linkage.get(), return_type, &params, name, variadic);
         cx.functions.borrow_mut().insert(name.to_string(), func);

From 8d4d87859b6ec9d5aae2b0297514b27d413c19d2 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Mon, 11 Mar 2024 12:13:30 +0800
Subject: [PATCH 583/997] fix(clippy): Clone-related clippy workarounds

1. Use `clone_from` in place of `clone()` in `builder.rs`
2. Change `&name` to `name.clone()` in `debuginfo.rs`(Is this really
efficient? But I can't find other workarounds.)
---
 src/builder.rs   | 2 +-
 src/debuginfo.rs | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 2241e0ea3643..ebd6595b4382 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -225,7 +225,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         let mut on_stack_param_indices = FxHashSet::default();
         if let Some(indices) = self.on_stack_params.borrow().get(&gcc_func) {
-            on_stack_param_indices = indices.clone();
+            on_stack_param_indices.clone_from(indices);
         }
 
         if all_args_match {
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index a485225a2560..7ca4743f4b8e 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -279,9 +279,9 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     ) -> Self::DILocation {
         let pos = span.lo();
         let DebugLoc { file, line, col } = self.lookup_debug_loc(pos);
-        let loc = match &file.name {
-            rustc_span::FileName::Real(ref name) => match &name {
-                rustc_span::RealFileName::LocalPath(ref name) => {
+        let loc = match file.name {
+            rustc_span::FileName::Real(ref name) => match name.clone() {
+                rustc_span::RealFileName::LocalPath(name) => {
                     if let Some(name) = name.to_str() {
                         self.context.new_location(name, line as i32, col as i32)
                     } else {

From ad97b8c061e6f39a52daaf036c9721e17510c30c Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Mon, 11 Mar 2024 12:20:36 +0800
Subject: [PATCH 584/997] fix(liftime): Gen. by cargo clippy

cmd: `cargo clippy --fix --lib -p rustc_codegen_gcc --allow-dirtyxs`
---
 src/asm.rs            |  2 +-
 src/attributes.rs     |  4 ++--
 src/builder.rs        |  8 ++++----
 src/common.rs         |  2 +-
 src/consts.rs         |  4 ++--
 src/intrinsic/llvm.rs | 10 +++++-----
 src/intrinsic/mod.rs  | 12 ++++++------
 src/intrinsic/simd.rs |  4 ++--
 src/lib.rs            |  2 +-
 9 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 72d572465f40..68de3fd7b079 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -691,7 +691,7 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
 
 /// Type to use for outputs that are discarded. It doesn't really matter what
 /// the type is, as long as it is valid for the constraint code.
-fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegClass) -> Type<'gcc> {
+fn dummy_output_type<'gcc>(cx: &CodegenCx<'gcc, '_>, reg: InlineAsmRegClass) -> Type<'gcc> {
     match reg {
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => cx.type_i32(),
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => unimplemented!(),
diff --git a/src/attributes.rs b/src/attributes.rs
index 2ce0c83008f1..6c518f2c45eb 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -15,8 +15,8 @@ use crate::{context::CodegenCx, errors::TiedTargetFeatures};
 /// Get GCC attribute for the provided inline heuristic.
 #[cfg(feature = "master")]
 #[inline]
-fn inline_attr<'gcc, 'tcx>(
-    cx: &CodegenCx<'gcc, 'tcx>,
+fn inline_attr<'gcc>(
+    cx: &CodegenCx<'gcc, '_>,
     inline: InlineAttr,
 ) -> Option<FnAttribute<'gcc>> {
     match inline {
diff --git a/src/builder.rs b/src/builder.rs
index ebd6595b4382..dbecd297f384 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -506,8 +506,8 @@ impl<'gcc, 'tcx> BackendTypes for Builder<'_, 'gcc, 'tcx> {
     type DIVariable = <CodegenCx<'gcc, 'tcx> as BackendTypes>::DIVariable;
 }
 
-fn set_rvalue_location<'a, 'gcc, 'tcx>(
-    bx: &mut Builder<'a, 'gcc, 'tcx>,
+fn set_rvalue_location<'gcc>(
+    bx: &mut Builder<'_, 'gcc, '_>,
     rvalue: RValue<'gcc>,
 ) -> RValue<'gcc> {
     if bx.location.is_some() {
@@ -979,8 +979,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             return OperandRef::zero_sized(place.layout);
         }
 
-        fn scalar_load_metadata<'a, 'gcc, 'tcx>(
-            bx: &mut Builder<'a, 'gcc, 'tcx>,
+        fn scalar_load_metadata<'gcc>(
+            bx: &mut Builder<'_, 'gcc, '_>,
             load: RValue<'gcc>,
             scalar: &abi::Scalar,
         ) {
diff --git a/src/common.rs b/src/common.rs
index 6a3b5442adf2..ff0513265389 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -30,7 +30,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 }
 
-pub fn bytes_in_context<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, bytes: &[u8]) -> RValue<'gcc> {
+pub fn bytes_in_context<'gcc>(cx: &CodegenCx<'gcc, '_>, bytes: &[u8]) -> RValue<'gcc> {
     let context = &cx.context;
     let byte_type = context.new_type::<u8>();
     let typ = context.new_array_type(None, byte_type, bytes.len() as u64);
diff --git a/src/consts.rs b/src/consts.rs
index f47fd5655332..0d7ecb56b34b 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -18,8 +18,8 @@ use crate::context::CodegenCx;
 use crate::errors::InvalidMinimumAlignment;
 use crate::type_of::LayoutGccExt;
 
-fn set_global_alignment<'gcc, 'tcx>(
-    cx: &CodegenCx<'gcc, 'tcx>,
+fn set_global_alignment<'gcc>(
+    cx: &CodegenCx<'gcc, '_>,
     gv: LValue<'gcc>,
     mut align: Align,
 ) {
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index c845ee5fe5fd..94c9869bd1f1 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -5,8 +5,8 @@ use rustc_codegen_ssa::traits::BuilderMethods;
 
 use crate::{builder::Builder, context::CodegenCx};
 
-pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
-    builder: &Builder<'a, 'gcc, 'tcx>,
+pub fn adjust_intrinsic_arguments<'b, 'gcc>(
+    builder: &Builder<'_, 'gcc, '_>,
     gcc_func: FunctionPtrType<'gcc>,
     mut args: Cow<'b, [RValue<'gcc>]>,
     func_name: &str,
@@ -479,8 +479,8 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
     args
 }
 
-pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(
-    builder: &Builder<'a, 'gcc, 'tcx>,
+pub fn adjust_intrinsic_return_value<'gcc>(
+    builder: &Builder<'_, 'gcc, '_>,
     mut return_value: RValue<'gcc>,
     func_name: &str,
     args: &[RValue<'gcc>],
@@ -628,7 +628,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
 }
 
 #[cfg(feature = "master")]
-pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
+pub fn intrinsic<'gcc>(name: &str, cx: &CodegenCx<'gcc, '_>) -> Function<'gcc> {
     if name == "llvm.prefetch" {
         let gcc_name = "__builtin_prefetch";
         let func = cx.context.get_builtin_function(gcc_name);
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index b170f4303019..b5835d5649cc 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -39,8 +39,8 @@ use crate::context::CodegenCx;
 use crate::intrinsic::simd::generic_simd_intrinsic;
 use crate::type_of::LayoutGccExt;
 
-fn get_simple_intrinsic<'gcc, 'tcx>(
-    cx: &CodegenCx<'gcc, 'tcx>,
+fn get_simple_intrinsic<'gcc>(
+    cx: &CodegenCx<'gcc, '_>,
     name: Symbol,
 ) -> Option<Function<'gcc>> {
     let gcc_name = match name {
@@ -586,9 +586,9 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
     }
 }
 
-fn int_type_width_signed<'gcc, 'tcx>(
+fn int_type_width_signed<'tcx>(
     ty: Ty<'tcx>,
-    cx: &CodegenCx<'gcc, 'tcx>,
+    cx: &CodegenCx<'_, 'tcx>,
 ) -> Option<(u64, bool)> {
     match *ty.kind() {
         ty::Int(t) => Some((
@@ -1099,8 +1099,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 }
 
-fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(
-    bx: &'b mut Builder<'a, 'gcc, 'tcx>,
+fn try_intrinsic<'gcc>(
+    bx: &mut Builder<'_, 'gcc, '_>,
     try_func: RValue<'gcc>,
     data: RValue<'gcc>,
     _catch_func: RValue<'gcc>,
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index d5a2c6125104..3972673afafc 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -694,11 +694,11 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
     }
 
     #[cfg(feature = "master")]
-    fn gather<'a, 'gcc, 'tcx>(
+    fn gather<'gcc>(
         default: RValue<'gcc>,
         pointers: RValue<'gcc>,
         mask: RValue<'gcc>,
-        bx: &mut Builder<'a, 'gcc, 'tcx>,
+        bx: &mut Builder<'_, 'gcc, '_>,
         in_len: u64,
         invert: bool,
     ) -> RValue<'gcc> {
diff --git a/src/lib.rs b/src/lib.rs
index a4ee3015b8d3..f2f3b6fd7878 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -270,7 +270,7 @@ impl CodegenBackend for GccCodegenBackend {
     }
 }
 
-fn new_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
+fn new_context<'gcc>(tcx: TyCtxt<'_>) -> Context<'gcc> {
     let context = Context::default();
     if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" {
         context.add_command_line_option("-masm=intel");

From 091de55db84aa53ea7845b6ca58fc3bafc40510a Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Mon, 11 Mar 2024 12:31:16 +0800
Subject: [PATCH 585/997] fix(fmt): Try to comply to the format requirement

---
 src/attributes.rs    |  5 +----
 src/builder.rs       |  5 +----
 src/consts.rs        |  6 +-----
 src/intrinsic/mod.rs | 10 ++--------
 4 files changed, 5 insertions(+), 21 deletions(-)

diff --git a/src/attributes.rs b/src/attributes.rs
index 6c518f2c45eb..6238daaed1dd 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -15,10 +15,7 @@ use crate::{context::CodegenCx, errors::TiedTargetFeatures};
 /// Get GCC attribute for the provided inline heuristic.
 #[cfg(feature = "master")]
 #[inline]
-fn inline_attr<'gcc>(
-    cx: &CodegenCx<'gcc, '_>,
-    inline: InlineAttr,
-) -> Option<FnAttribute<'gcc>> {
+fn inline_attr<'gcc>(cx: &CodegenCx<'gcc, '_>, inline: InlineAttr) -> Option<FnAttribute<'gcc>> {
     match inline {
         InlineAttr::Hint => Some(FnAttribute::Inline),
         InlineAttr::Always => Some(FnAttribute::AlwaysInline),
diff --git a/src/builder.rs b/src/builder.rs
index dbecd297f384..7f5156f93be4 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -506,10 +506,7 @@ impl<'gcc, 'tcx> BackendTypes for Builder<'_, 'gcc, 'tcx> {
     type DIVariable = <CodegenCx<'gcc, 'tcx> as BackendTypes>::DIVariable;
 }
 
-fn set_rvalue_location<'gcc>(
-    bx: &mut Builder<'_, 'gcc, '_>,
-    rvalue: RValue<'gcc>,
-) -> RValue<'gcc> {
+fn set_rvalue_location<'gcc>(bx: &mut Builder<'_, 'gcc, '_>, rvalue: RValue<'gcc>) -> RValue<'gcc> {
     if bx.location.is_some() {
         #[cfg(feature = "master")]
         rvalue.set_location(bx.location.unwrap());
diff --git a/src/consts.rs b/src/consts.rs
index 0d7ecb56b34b..bbc1de1dfae9 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -18,11 +18,7 @@ use crate::context::CodegenCx;
 use crate::errors::InvalidMinimumAlignment;
 use crate::type_of::LayoutGccExt;
 
-fn set_global_alignment<'gcc>(
-    cx: &CodegenCx<'gcc, '_>,
-    gv: LValue<'gcc>,
-    mut align: Align,
-) {
+fn set_global_alignment<'gcc>(cx: &CodegenCx<'gcc, '_>, gv: LValue<'gcc>, mut align: Align) {
     // The target may require greater alignment for globals than the type does.
     // Note: GCC and Clang also allow `__attribute__((aligned))` on variables,
     // which can force it to be smaller. Rust doesn't support this yet.
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index b5835d5649cc..d4afbcbcc449 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -39,10 +39,7 @@ use crate::context::CodegenCx;
 use crate::intrinsic::simd::generic_simd_intrinsic;
 use crate::type_of::LayoutGccExt;
 
-fn get_simple_intrinsic<'gcc>(
-    cx: &CodegenCx<'gcc, '_>,
-    name: Symbol,
-) -> Option<Function<'gcc>> {
+fn get_simple_intrinsic<'gcc>(cx: &CodegenCx<'gcc, '_>, name: Symbol) -> Option<Function<'gcc>> {
     let gcc_name = match name {
         sym::sqrtf32 => "sqrtf",
         sym::sqrtf64 => "sqrt",
@@ -586,10 +583,7 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
     }
 }
 
-fn int_type_width_signed<'tcx>(
-    ty: Ty<'tcx>,
-    cx: &CodegenCx<'_, 'tcx>,
-) -> Option<(u64, bool)> {
+fn int_type_width_signed<'tcx>(ty: Ty<'tcx>, cx: &CodegenCx<'_, 'tcx>) -> Option<(u64, bool)> {
     match *ty.kind() {
         ty::Int(t) => Some((
             match t {

From d2cda90e4ecb32cbf7be08d166daa78b5dbed819 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Mon, 11 Mar 2024 12:36:39 +0800
Subject: [PATCH 586/997] fix(clippy): redundant variables in `simd.rs`

---
 src/intrinsic/simd.rs | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 3972673afafc..8fca81091dc5 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -531,7 +531,6 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         let sign_shift = bx.context.new_rvalue_from_int(elem_type, elem_size as i32 - 1);
         let one = bx.context.new_rvalue_one(elem_type);
 
-        let mut shift = 0;
         for i in 0..in_len {
             let elem =
                 bx.extract_element(vector, bx.context.new_rvalue_from_int(bx.int_type, i as i32));
@@ -539,8 +538,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             let masked = shifted & one;
             result = result
                 | (bx.context.new_cast(None, masked, result_type)
-                    << bx.context.new_rvalue_from_int(result_type, shift));
-            shift += 1;
+                    << bx.context.new_rvalue_from_int(result_type, i as i32));
         }
 
         match *ret_ty.kind() {

From 3fd9db31bf485bd177481f12344e1e501a8a0234 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Mon, 11 Mar 2024 12:39:57 +0800
Subject: [PATCH 587/997] fix(fmt): Rewrite a condition according to clippy

This looks like an (inverted) exclusive-or but I still leave it as it is in clippy.
---
 src/builder.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 7f5156f93be4..79ba110e1c56 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -256,8 +256,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                         actual_val.dereference(self.location).to_rvalue()
                     } else {
                         assert!(
-                            !((actual_ty.is_vector() && !expected_ty.is_vector())
-                                || (!actual_ty.is_vector() && expected_ty.is_vector())),
+                            (!expected_ty.is_vector() || actual_ty.is_vector())
+                                && (expected_ty.is_vector() || !actual_ty.is_vector()),
                             "{:?} ({}) -> {:?} ({}), index: {:?}[{}]",
                             actual_ty,
                             actual_ty.is_vector(),

From a7d39b852a5ad19b11781c18b59d38dc6ef92932 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Mon, 11 Mar 2024 12:55:28 +0800
Subject: [PATCH 588/997] fix(from_low_high): Renamed according to clippy
 requirements

Changed for clippy naming convention requirement:
```
warning: methods called `from_*` usually take no `self`
   --> src/int.rs:996:22
    |
996 |     fn from_low_high(&self, typ: Type<'gcc>, low: i64, high: i64) -> RValue<'gcc> {
    |                      ^^^^^
    |
    = help: consider choosing a less ambiguous name
    = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#wrong_self_convention
    = note: `#[warn(clippy::wrong_self_convention)]` on by default
```
---
 src/int.rs | 35 +++++++++++++++++++----------------
 1 file changed, 19 insertions(+), 16 deletions(-)

diff --git a/src/int.rs b/src/int.rs
index 6d73baa8a9d6..1b812b4d137f 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -38,7 +38,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             self.cx.context.new_unary_op(self.location, operation, typ, a)
         } else {
             let element_type = typ.dyncast_array().expect("element type");
-            self.from_low_high_rvalues(
+            self.concat_low_high_rvalues(
                 typ,
                 self.cx.context.new_unary_op(
                     self.location,
@@ -112,7 +112,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let shift_value = self.gcc_sub(b, sixty_four);
             let high = self.high(a);
             let sign = if a_type.is_signed(self) { high >> sixty_three } else { zero };
-            let array_value = self.from_low_high_rvalues(a_type, high >> shift_value, sign);
+            let array_value = self.concat_low_high_rvalues(a_type, high >> shift_value, sign);
             then_block.add_assignment(self.location, result, array_value);
             then_block.end_with_jump(self.location, after_block);
 
@@ -128,8 +128,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let casted_low = self.context.new_cast(self.location, self.low(a), unsigned_type);
             let shifted_low = casted_low >> self.context.new_cast(self.location, b, unsigned_type);
             let shifted_low = self.context.new_cast(self.location, shifted_low, native_int_type);
-            let array_value =
-                self.from_low_high_rvalues(a_type, (high << shift_value) | shifted_low, high >> b);
+            let array_value = self.concat_low_high_rvalues(
+                a_type,
+                (high << shift_value) | shifted_low,
+                high >> b,
+            );
             actual_else_block.add_assignment(self.location, result, array_value);
             actual_else_block.end_with_jump(self.location, after_block);
 
@@ -610,7 +613,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         {
             a ^ b
         } else {
-            self.from_low_high_rvalues(
+            self.concat_low_high_rvalues(
                 a_type,
                 self.low(a) ^ self.low(b),
                 self.high(a) ^ self.high(b),
@@ -659,7 +662,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             self.llbb().end_with_conditional(self.location, condition, then_block, else_block);
 
             let array_value =
-                self.from_low_high_rvalues(a_type, zero, self.low(a) << (b - sixty_four));
+                self.concat_low_high_rvalues(a_type, zero, self.low(a) << (b - sixty_four));
             then_block.add_assignment(self.location, result, array_value);
             then_block.end_with_jump(self.location, after_block);
 
@@ -677,7 +680,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let high_low =
                 self.context.new_cast(self.location, casted_low >> shift_value, native_int_type);
 
-            let array_value = self.from_low_high_rvalues(
+            let array_value = self.concat_low_high_rvalues(
                 a_type,
                 self.low(a) << b,
                 (self.high(a) << b) | high_low,
@@ -706,7 +709,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
             // NOTE: we also need to swap the two elements here, in addition to swapping inside
             // the elements themselves like done above.
-            return self.from_low_high_rvalues(arg_type, swapped_msb, swapped_lsb);
+            return self.concat_low_high_rvalues(arg_type, swapped_msb, swapped_lsb);
         }
 
         // TODO(antoyo): check if it's faster to use string literals and a
@@ -728,7 +731,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             self.context.new_rvalue_from_long(typ, int)
         } else {
             // NOTE: set the sign in high.
-            self.from_low_high(typ, int, -(int.is_negative() as i64))
+            self.concat_low_high(typ, int, -(int.is_negative() as i64))
         }
     }
 
@@ -740,7 +743,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         } else if self.is_native_int_type_or_bool(typ) {
             self.context.new_rvalue_from_long(typ, int as i64)
         } else {
-            self.from_low_high(typ, int as i64, 0)
+            self.concat_low_high(typ, int as i64, 0)
         }
     }
 
@@ -757,7 +760,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
                 let shift = high << sixty_four;
                 shift | self.context.new_cast(None, low, typ)
             } else {
-                self.from_low_high(typ, low as i64, high as i64)
+                self.concat_low_high(typ, low as i64, high as i64)
             }
         } else if typ.is_i128(self) {
             // FIXME(antoyo): libgccjit cannot create 128-bit values yet.
@@ -772,7 +775,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         if self.is_native_int_type_or_bool(typ) {
             self.context.new_rvalue_zero(typ)
         } else {
-            self.from_low_high(typ, 0, 0)
+            self.concat_low_high(typ, 0, 0)
         }
     }
 
@@ -810,7 +813,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
                 "both types should either be native or non-native for or operation"
             );
             let native_int_type = a_type.dyncast_array().expect("get element type");
-            self.from_low_high_rvalues(
+            self.concat_low_high_rvalues(
                 a_type,
                 self.context.new_binary_op(
                     loc,
@@ -855,7 +858,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             let is_negative =
                 self.context.new_comparison(None, ComparisonOp::LessThan, value, zero);
             let is_negative = self.gcc_int_cast(is_negative, dest_element_type);
-            self.from_low_high_rvalues(
+            self.concat_low_high_rvalues(
                 dest_typ,
                 self.context.new_cast(None, value, dest_element_type),
                 self.context.new_unary_op(None, UnaryOp::Minus, dest_element_type, is_negative),
@@ -975,7 +978,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             .to_rvalue()
     }
 
-    fn from_low_high_rvalues(
+    fn concat_low_high_rvalues(
         &self,
         typ: Type<'gcc>,
         low: RValue<'gcc>,
@@ -990,7 +993,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         self.context.new_array_constructor(None, typ, &values)
     }
 
-    fn from_low_high(&self, typ: Type<'gcc>, low: i64, high: i64) -> RValue<'gcc> {
+    fn concat_low_high(&self, typ: Type<'gcc>, low: i64, high: i64) -> RValue<'gcc> {
         let (first, last) = match self.sess().target.options.endian {
             Endian::Little => (low, high),
             Endian::Big => (high, low),

From 6c9156717e226a64639b79428febd519a1cbb5d6 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 13 Mar 2024 16:44:54 +0100
Subject: [PATCH 589/997] Regen intrinsics conversions

---
 src/intrinsic/archs.rs | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index c4ae1751fa05..f75009337898 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -74,6 +74,10 @@ match name {
     "llvm.amdgcn.cvt.sr.bf8.f32" => "__builtin_amdgcn_cvt_sr_bf8_f32",
     "llvm.amdgcn.cvt.sr.fp8.f32" => "__builtin_amdgcn_cvt_sr_fp8_f32",
     "llvm.amdgcn.dispatch.id" => "__builtin_amdgcn_dispatch_id",
+    "llvm.amdgcn.dot4.f32.bf8.bf8" => "__builtin_amdgcn_dot4_f32_bf8_bf8",
+    "llvm.amdgcn.dot4.f32.bf8.fp8" => "__builtin_amdgcn_dot4_f32_bf8_fp8",
+    "llvm.amdgcn.dot4.f32.fp8.bf8" => "__builtin_amdgcn_dot4_f32_fp8_bf8",
+    "llvm.amdgcn.dot4.f32.fp8.fp8" => "__builtin_amdgcn_dot4_f32_fp8_fp8",
     "llvm.amdgcn.ds.add.gs.reg.rtn" => "__builtin_amdgcn_ds_add_gs_reg_rtn",
     "llvm.amdgcn.ds.bpermute" => "__builtin_amdgcn_ds_bpermute",
     "llvm.amdgcn.ds.fadd.v2bf16" => "__builtin_amdgcn_ds_atomic_fadd_v2bf16",
@@ -2291,6 +2295,10 @@ match name {
     "llvm.loongarch.csrxchg.d" => "__builtin_loongarch_csrxchg_d",
     "llvm.loongarch.csrxchg.w" => "__builtin_loongarch_csrxchg_w",
     "llvm.loongarch.dbar" => "__builtin_loongarch_dbar",
+    "llvm.loongarch.frecipe.d" => "__builtin_loongarch_frecipe_d",
+    "llvm.loongarch.frecipe.s" => "__builtin_loongarch_frecipe_s",
+    "llvm.loongarch.frsqrte.d" => "__builtin_loongarch_frsqrte_d",
+    "llvm.loongarch.frsqrte.s" => "__builtin_loongarch_frsqrte_s",
     "llvm.loongarch.ibar" => "__builtin_loongarch_ibar",
     "llvm.loongarch.iocsrrd.b" => "__builtin_loongarch_iocsrrd_b",
     "llvm.loongarch.iocsrrd.d" => "__builtin_loongarch_iocsrrd_d",
@@ -2529,6 +2537,8 @@ match name {
     "llvm.loongarch.lasx.xvfnmsub.s" => "__builtin_lasx_xvfnmsub_s",
     "llvm.loongarch.lasx.xvfrecip.d" => "__builtin_lasx_xvfrecip_d",
     "llvm.loongarch.lasx.xvfrecip.s" => "__builtin_lasx_xvfrecip_s",
+    "llvm.loongarch.lasx.xvfrecipe.d" => "__builtin_lasx_xvfrecipe_d",
+    "llvm.loongarch.lasx.xvfrecipe.s" => "__builtin_lasx_xvfrecipe_s",
     "llvm.loongarch.lasx.xvfrint.d" => "__builtin_lasx_xvfrint_d",
     "llvm.loongarch.lasx.xvfrint.s" => "__builtin_lasx_xvfrint_s",
     "llvm.loongarch.lasx.xvfrintrm.d" => "__builtin_lasx_xvfrintrm_d",
@@ -2541,6 +2551,8 @@ match name {
     "llvm.loongarch.lasx.xvfrintrz.s" => "__builtin_lasx_xvfrintrz_s",
     "llvm.loongarch.lasx.xvfrsqrt.d" => "__builtin_lasx_xvfrsqrt_d",
     "llvm.loongarch.lasx.xvfrsqrt.s" => "__builtin_lasx_xvfrsqrt_s",
+    "llvm.loongarch.lasx.xvfrsqrte.d" => "__builtin_lasx_xvfrsqrte_d",
+    "llvm.loongarch.lasx.xvfrsqrte.s" => "__builtin_lasx_xvfrsqrte_s",
     "llvm.loongarch.lasx.xvfrstp.b" => "__builtin_lasx_xvfrstp_b",
     "llvm.loongarch.lasx.xvfrstp.h" => "__builtin_lasx_xvfrstp_h",
     "llvm.loongarch.lasx.xvfrstpi.b" => "__builtin_lasx_xvfrstpi_b",
@@ -3255,6 +3267,8 @@ match name {
     "llvm.loongarch.lsx.vfnmsub.s" => "__builtin_lsx_vfnmsub_s",
     "llvm.loongarch.lsx.vfrecip.d" => "__builtin_lsx_vfrecip_d",
     "llvm.loongarch.lsx.vfrecip.s" => "__builtin_lsx_vfrecip_s",
+    "llvm.loongarch.lsx.vfrecipe.d" => "__builtin_lsx_vfrecipe_d",
+    "llvm.loongarch.lsx.vfrecipe.s" => "__builtin_lsx_vfrecipe_s",
     "llvm.loongarch.lsx.vfrint.d" => "__builtin_lsx_vfrint_d",
     "llvm.loongarch.lsx.vfrint.s" => "__builtin_lsx_vfrint_s",
     "llvm.loongarch.lsx.vfrintrm.d" => "__builtin_lsx_vfrintrm_d",
@@ -3267,6 +3281,8 @@ match name {
     "llvm.loongarch.lsx.vfrintrz.s" => "__builtin_lsx_vfrintrz_s",
     "llvm.loongarch.lsx.vfrsqrt.d" => "__builtin_lsx_vfrsqrt_d",
     "llvm.loongarch.lsx.vfrsqrt.s" => "__builtin_lsx_vfrsqrt_s",
+    "llvm.loongarch.lsx.vfrsqrte.d" => "__builtin_lsx_vfrsqrte_d",
+    "llvm.loongarch.lsx.vfrsqrte.s" => "__builtin_lsx_vfrsqrte_s",
     "llvm.loongarch.lsx.vfrstp.b" => "__builtin_lsx_vfrstp_b",
     "llvm.loongarch.lsx.vfrstp.h" => "__builtin_lsx_vfrstp_h",
     "llvm.loongarch.lsx.vfrstpi.b" => "__builtin_lsx_vfrstpi_b",
@@ -4434,6 +4450,7 @@ match name {
     "llvm.nvvm.abs.bf16x2" => "__nvvm_abs_bf16x2",
     "llvm.nvvm.abs.i" => "__nvvm_abs_i",
     "llvm.nvvm.abs.ll" => "__nvvm_abs_ll",
+    "llvm.nvvm.activemask" => "__nvvm_activemask",
     "llvm.nvvm.add.rm.d" => "__nvvm_add_rm_d",
     "llvm.nvvm.add.rm.f" => "__nvvm_add_rm_f",
     "llvm.nvvm.add.rm.ftz.f" => "__nvvm_add_rm_ftz_f",
@@ -4522,6 +4539,7 @@ match name {
     "llvm.nvvm.ex2.approx.d" => "__nvvm_ex2_approx_d",
     "llvm.nvvm.ex2.approx.f" => "__nvvm_ex2_approx_f",
     "llvm.nvvm.ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f",
+    "llvm.nvvm.exit" => "__nvvm_exit",
     "llvm.nvvm.f2bf16.rn" => "__nvvm_f2bf16_rn",
     "llvm.nvvm.f2bf16.rn.relu" => "__nvvm_f2bf16_rn_relu",
     "llvm.nvvm.f2bf16.rz" => "__nvvm_f2bf16_rz",
@@ -4722,8 +4740,11 @@ match name {
     "llvm.nvvm.mul24.ui" => "__nvvm_mul24_ui",
     "llvm.nvvm.mulhi.i" => "__nvvm_mulhi_i",
     "llvm.nvvm.mulhi.ll" => "__nvvm_mulhi_ll",
+    "llvm.nvvm.mulhi.s" => "__nvvm_mulhi_s",
     "llvm.nvvm.mulhi.ui" => "__nvvm_mulhi_ui",
     "llvm.nvvm.mulhi.ull" => "__nvvm_mulhi_ull",
+    "llvm.nvvm.mulhi.us" => "__nvvm_mulhi_us",
+    "llvm.nvvm.nanosleep" => "__nvvm_nanosleep",
     "llvm.nvvm.neg.bf16" => "__nvvm_neg_bf16",
     "llvm.nvvm.neg.bf16x2" => "__nvvm_neg_bf16x2",
     "llvm.nvvm.popc.i" => "__nvvm_popc_i",
@@ -4783,6 +4804,7 @@ match name {
     "llvm.nvvm.read.ptx.sreg.envreg7" => "__nvvm_read_ptx_sreg_envreg7",
     "llvm.nvvm.read.ptx.sreg.envreg8" => "__nvvm_read_ptx_sreg_envreg8",
     "llvm.nvvm.read.ptx.sreg.envreg9" => "__nvvm_read_ptx_sreg_envreg9",
+    "llvm.nvvm.read.ptx.sreg.globaltimer" => "__nvvm_read_ptx_sreg_globaltimer",
     "llvm.nvvm.read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_gridid",
     // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_",
     "llvm.nvvm.read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_laneid",
@@ -4835,6 +4857,7 @@ match name {
     "llvm.nvvm.redux.sync.umax" => "__nvvm_redux_sync_umax",
     "llvm.nvvm.redux.sync.umin" => "__nvvm_redux_sync_umin",
     "llvm.nvvm.redux.sync.xor" => "__nvvm_redux_sync_xor",
+    "llvm.nvvm.reflect" => "__nvvm_reflect",
     "llvm.nvvm.rotate.b32" => "__nvvm_rotate_b32",
     "llvm.nvvm.rotate.b64" => "__nvvm_rotate_b64",
     "llvm.nvvm.rotate.right.b64" => "__nvvm_rotate_right_b64",
@@ -4845,7 +4868,11 @@ match name {
     "llvm.nvvm.rsqrt.approx.f" => "__nvvm_rsqrt_approx_f",
     "llvm.nvvm.rsqrt.approx.ftz.f" => "__nvvm_rsqrt_approx_ftz_f",
     "llvm.nvvm.sad.i" => "__nvvm_sad_i",
+    "llvm.nvvm.sad.ll" => "__nvvm_sad_ll",
+    "llvm.nvvm.sad.s" => "__nvvm_sad_s",
     "llvm.nvvm.sad.ui" => "__nvvm_sad_ui",
+    "llvm.nvvm.sad.ull" => "__nvvm_sad_ull",
+    "llvm.nvvm.sad.us" => "__nvvm_sad_us",
     "llvm.nvvm.saturate.d" => "__nvvm_saturate_d",
     "llvm.nvvm.saturate.f" => "__nvvm_saturate_f",
     "llvm.nvvm.saturate.ftz.f" => "__nvvm_saturate_ftz_f",
@@ -5471,6 +5498,7 @@ match name {
     "llvm.ppc.fctiwz" => "__builtin_ppc_fctiwz",
     "llvm.ppc.fctudz" => "__builtin_ppc_fctudz",
     "llvm.ppc.fctuwz" => "__builtin_ppc_fctuwz",
+    "llvm.ppc.fence" => "__builtin_ppc_fence",
     "llvm.ppc.fmaf128.round.to.odd" => "__builtin_fmaf128_round_to_odd",
     "llvm.ppc.fmsub" => "__builtin_ppc_fmsub",
     "llvm.ppc.fmsubs" => "__builtin_ppc_fmsubs",
@@ -5599,6 +5627,9 @@ match name {
     "llvm.ppc.qpx.qvstfs" => "__builtin_qpx_qvstfs",
     "llvm.ppc.qpx.qvstfsa" => "__builtin_qpx_qvstfsa",
     "llvm.ppc.readflm" => "__builtin_readflm",
+    "llvm.ppc.rldimi" => "__builtin_ppc_rldimi",
+    "llvm.ppc.rlwimi" => "__builtin_ppc_rlwimi",
+    "llvm.ppc.rlwnm" => "__builtin_ppc_rlwnm",
     "llvm.ppc.scalar.extract.expq" => "__builtin_vsx_scalar_extract_expq",
     "llvm.ppc.scalar.insert.exp.qp" => "__builtin_vsx_scalar_insert_exp_qp",
     "llvm.ppc.set.texasr" => "__builtin_set_texasr",
@@ -5912,6 +5943,8 @@ match name {
     "llvm.s390.vupllb" => "__builtin_s390_vupllb",
     "llvm.s390.vupllf" => "__builtin_s390_vupllf",
     "llvm.s390.vupllh" => "__builtin_s390_vupllh",
+    // spv
+    "llvm.spv.create.handle" => "__builtin_hlsl_create_handle",
     // ve
     "llvm.ve.vl.andm.MMM" => "__builtin_ve_vl_andm_MMM",
     "llvm.ve.vl.andm.mmm" => "__builtin_ve_vl_andm_mmm",

From 817d2f298eb07c34806f41ecfe1d1c0b509566b7 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 16 Mar 2024 09:43:16 +0800
Subject: [PATCH 590/997] fix(pattern_type_mismatch)): Fix mismatch with
 ref/deref

---
 src/debuginfo.rs     |  9 ++++++---
 src/declare.rs       | 14 +-------------
 src/intrinsic/mod.rs |  5 ++---
 3 files changed, 9 insertions(+), 19 deletions(-)

diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index 7ca4743f4b8e..57e7e4e54ca3 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -280,15 +280,18 @@ impl<'gcc, 'tcx> DebugInfoMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let pos = span.lo();
         let DebugLoc { file, line, col } = self.lookup_debug_loc(pos);
         let loc = match file.name {
-            rustc_span::FileName::Real(ref name) => match name.clone() {
-                rustc_span::RealFileName::LocalPath(name) => {
+            rustc_span::FileName::Real(ref name) => match *name {
+                rustc_span::RealFileName::LocalPath(ref name) => {
                     if let Some(name) = name.to_str() {
                         self.context.new_location(name, line as i32, col as i32)
                     } else {
                         Location::null()
                     }
                 }
-                rustc_span::RealFileName::Remapped { ref local_path, virtual_name: _unused } => {
+                rustc_span::RealFileName::Remapped {
+                    ref local_path,
+                    virtual_name: ref _unused,
+                } => {
                     if let Some(name) = local_path.as_ref() {
                         if let Some(name) = name.to_str() {
                             self.context.new_location(name, line as i32, col as i32)
diff --git a/src/declare.rs b/src/declare.rs
index 555f95fb1556..a2b158ee0a7e 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -181,19 +181,7 @@ fn declare_raw_fn<'gcc>(
             .map(|(index, param)| cx.context.new_parameter(None, *param, format!("param{}", index))) // TODO(antoyo): set name.
             .collect();
         #[cfg(not(feature = "master"))]
-        let name = mangle_name(name);
-
-        #[cfg(not(feature = "master"))]
-        let func = cx.context.new_function(
-            None,
-            cx.linkage.get(),
-            return_type,
-            &params,
-            name.clone(),
-            variadic,
-        );
-
-        #[cfg(feature = "master")]
+        let name = &mangle_name(name);
         let func =
             cx.context.new_function(None, cx.linkage.get(), return_type, &params, name, variadic);
         cx.functions.borrow_mut().insert(name.to_string(), func);
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index d4afbcbcc449..b4236a31c5d9 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -164,8 +164,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 let tp_ty = fn_args.type_at(0);
                 let ptr = args[0].immediate();
                 // The reference was changed to clone to comply to clippy.
-                let load = if let PassMode::Cast { cast: ty, pad_i32: _ } = fn_abi.ret.mode.clone()
-                {
+                let load = if let PassMode::Cast { cast: ref ty, pad_i32: _ } = fn_abi.ret.mode {
                     let gcc_ty = ty.gcc_type(self);
                     self.volatile_load(gcc_ty, ptr)
                 } else {
@@ -386,7 +385,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         if !fn_abi.ret.is_ignore() {
             // The reference was changed to clone to comply to clippy.
-            if let PassMode::Cast { cast: ty, .. } = fn_abi.ret.mode.clone() {
+            if let PassMode::Cast { cast: ref ty, .. } = fn_abi.ret.mode {
                 let ptr_llty = self.type_ptr_to(ty.gcc_type(self));
                 let ptr = self.pointercast(result.llval, ptr_llty);
                 self.store(llval, ptr, result.align);

From 878f572d0eb9a69f8c69085af1713a30b1a338b4 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 16 Mar 2024 10:07:52 +0800
Subject: [PATCH 591/997] fix(comments): Add some info and revert `else if`

1. Put the `else if` comment in intrinsic/mod.rs away
2. Add TODO to debuginfo.rs in `make_mir_scope()`
---
 src/debuginfo.rs     |  1 +
 src/intrinsic/mod.rs | 21 +++++++++++----------
 2 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index 57e7e4e54ca3..04c517e7d295 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -137,6 +137,7 @@ fn make_mir_scope<'gcc, 'tcx>(
         // FIXME(eddyb) this doesn't account for the macro-related
         // `Span` fixups that `rustc_codegen_ssa::mir::debuginfo` does.
 
+        // TODO(tempdragon): Add scope support and then revert to cg_llvm version of this closure
         // NOTE: These variables passed () here.
         // Changed to comply to clippy.
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index b4236a31c5d9..7cb3eb915917 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -308,16 +308,17 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                     self.const_bool(true)
                     // The else if an immediate neighbor of this block.
                     // It is moved here to comply to Clippy.
-                    /*else if use_integer_compare {
-                        let integer_ty = self.type_ix(layout.size.bits()); // FIXME(antoyo): LLVM creates an integer of 96 bits for [i32; 3], but gcc doesn't support this, so it creates an integer of 128 bits.
-                        let ptr_ty = self.type_ptr_to(integer_ty);
-                        let a_ptr = self.bitcast(a, ptr_ty);
-                        let a_val = self.load(integer_ty, a_ptr, layout.align.abi);
-                        let b_ptr = self.bitcast(b, ptr_ty);
-                        let b_val = self.load(integer_ty, b_ptr, layout.align.abi);
-                        self.icmp(IntPredicate::IntEQ, a_val, b_val)
-                    }*/
-                } else {
+                }
+                /*else if use_integer_compare {
+                    let integer_ty = self.type_ix(layout.size.bits()); // FIXME(antoyo): LLVM creates an integer of 96 bits for [i32; 3], but gcc doesn't support this, so it creates an integer of 128 bits.
+                    let ptr_ty = self.type_ptr_to(integer_ty);
+                    let a_ptr = self.bitcast(a, ptr_ty);
+                    let a_val = self.load(integer_ty, a_ptr, layout.align.abi);
+                    let b_ptr = self.bitcast(b, ptr_ty);
+                    let b_val = self.load(integer_ty, b_ptr, layout.align.abi);
+                    self.icmp(IntPredicate::IntEQ, a_val, b_val)
+                }*/
+                else {
                     let void_ptr_type = self.context.new_type::<*const ()>();
                     let a_ptr = self.bitcast(a, void_ptr_type);
                     let b_ptr = self.bitcast(b, void_ptr_type);

From 390f9064e18701f9b863f1790a4bc22bc8e51d0d Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 16 Mar 2024 10:17:35 +0800
Subject: [PATCH 592/997] revert(lifetime): Add "needless" lifetime(s) and
 allow it in clippy

This reverts commit ad97b8c061e6f39a52daaf036c9721e17510c30c.
---
 src/asm.rs            |  2 +-
 src/builder.rs        |  4 ++--
 src/common.rs         |  2 +-
 src/intrinsic/llvm.rs | 10 +++++-----
 src/intrinsic/mod.rs  |  4 ++--
 src/intrinsic/simd.rs |  4 ++--
 src/lib.rs            |  3 ++-
 7 files changed, 15 insertions(+), 14 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 68de3fd7b079..72d572465f40 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -691,7 +691,7 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
 
 /// Type to use for outputs that are discarded. It doesn't really matter what
 /// the type is, as long as it is valid for the constraint code.
-fn dummy_output_type<'gcc>(cx: &CodegenCx<'gcc, '_>, reg: InlineAsmRegClass) -> Type<'gcc> {
+fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegClass) -> Type<'gcc> {
     match reg {
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => cx.type_i32(),
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => unimplemented!(),
diff --git a/src/builder.rs b/src/builder.rs
index 79ba110e1c56..55ab20a03ae1 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -976,8 +976,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             return OperandRef::zero_sized(place.layout);
         }
 
-        fn scalar_load_metadata<'gcc>(
-            bx: &mut Builder<'_, 'gcc, '_>,
+        fn scalar_load_metadata<'a, 'gcc, 'tcx>(
+            bx: &mut Builder<'a, 'gcc, 'tcx>,
             load: RValue<'gcc>,
             scalar: &abi::Scalar,
         ) {
diff --git a/src/common.rs b/src/common.rs
index ff0513265389..6a3b5442adf2 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -30,7 +30,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 }
 
-pub fn bytes_in_context<'gcc>(cx: &CodegenCx<'gcc, '_>, bytes: &[u8]) -> RValue<'gcc> {
+pub fn bytes_in_context<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, bytes: &[u8]) -> RValue<'gcc> {
     let context = &cx.context;
     let byte_type = context.new_type::<u8>();
     let typ = context.new_array_type(None, byte_type, bytes.len() as u64);
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 94c9869bd1f1..c845ee5fe5fd 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -5,8 +5,8 @@ use rustc_codegen_ssa::traits::BuilderMethods;
 
 use crate::{builder::Builder, context::CodegenCx};
 
-pub fn adjust_intrinsic_arguments<'b, 'gcc>(
-    builder: &Builder<'_, 'gcc, '_>,
+pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
+    builder: &Builder<'a, 'gcc, 'tcx>,
     gcc_func: FunctionPtrType<'gcc>,
     mut args: Cow<'b, [RValue<'gcc>]>,
     func_name: &str,
@@ -479,8 +479,8 @@ pub fn adjust_intrinsic_arguments<'b, 'gcc>(
     args
 }
 
-pub fn adjust_intrinsic_return_value<'gcc>(
-    builder: &Builder<'_, 'gcc, '_>,
+pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(
+    builder: &Builder<'a, 'gcc, 'tcx>,
     mut return_value: RValue<'gcc>,
     func_name: &str,
     args: &[RValue<'gcc>],
@@ -628,7 +628,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
 }
 
 #[cfg(feature = "master")]
-pub fn intrinsic<'gcc>(name: &str, cx: &CodegenCx<'gcc, '_>) -> Function<'gcc> {
+pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
     if name == "llvm.prefetch" {
         let gcc_name = "__builtin_prefetch";
         let func = cx.context.get_builtin_function(gcc_name);
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 7cb3eb915917..0961c4d1bf9a 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1093,8 +1093,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     }
 }
 
-fn try_intrinsic<'gcc>(
-    bx: &mut Builder<'_, 'gcc, '_>,
+fn try_intrinsic<'a, 'b, 'gcc, 'tcx>(
+    bx: &'b mut Builder<'a, 'gcc, 'tcx>,
     try_func: RValue<'gcc>,
     data: RValue<'gcc>,
     _catch_func: RValue<'gcc>,
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 8fca81091dc5..6d8ed519b4cc 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -692,11 +692,11 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
     }
 
     #[cfg(feature = "master")]
-    fn gather<'gcc>(
+    fn gather<'a, 'gcc, 'tcx>(
         default: RValue<'gcc>,
         pointers: RValue<'gcc>,
         mask: RValue<'gcc>,
-        bx: &mut Builder<'_, 'gcc, '_>,
+        bx: &mut Builder<'a, 'gcc, 'tcx>,
         in_len: u64,
         invert: bool,
     ) -> RValue<'gcc> {
diff --git a/src/lib.rs b/src/lib.rs
index f2f3b6fd7878..616b1944798c 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -29,6 +29,7 @@
 #![warn(rust_2018_idioms)]
 #![warn(unused_lifetimes)]
 #![deny(clippy::pattern_type_mismatch)]
+#![allow(clippy::needless_lifetimes)]
 
 extern crate rustc_apfloat;
 extern crate rustc_ast;
@@ -270,7 +271,7 @@ impl CodegenBackend for GccCodegenBackend {
     }
 }
 
-fn new_context<'gcc>(tcx: TyCtxt<'_>) -> Context<'gcc> {
+fn new_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
     let context = Context::default();
     if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" {
         context.add_command_line_option("-masm=intel");

From f6cab2cd1eb985737db2d0059c4655588c9ed4e1 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 16 Mar 2024 12:05:56 +0800
Subject: [PATCH 593/997] feat(CI): Add clippy check to workflow.

---
 .github/workflows/ci.yml | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 839f3ba4de36..6079725b3e6c 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -52,6 +52,9 @@ jobs:
     - name: Install rustfmt
       run: rustup component add rustfmt
 
+    - name: Install clippy
+      run: rustup component add clippy
+
     - name: Download artifact
       run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/${{ matrix.libgccjit_version.gcc }}
 
@@ -98,6 +101,11 @@ jobs:
     - name: Check formatting
       run: cargo fmt -- --check
 
+     - name: clippy
+      run: |
+        cargo clippy --all-targets -- -D warnings
+        cargo clippy --all-targets --features master -- -D warnings
+
   duplicates:
     runs-on: ubuntu-latest
     steps:

From 653118e797902d7854035a197c319c53d1b8eeef Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 16 Mar 2024 12:08:39 +0800
Subject: [PATCH 594/997] feat(clippy): Suppress lint
 `suspicious_else_formatting` temporarily

---
 src/intrinsic/mod.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 0961c4d1bf9a..6cc6e0378f1f 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -119,6 +119,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         let result = PlaceRef::new_sized(llresult, fn_abi.ret.layout);
 
         let simple = get_simple_intrinsic(self, name);
+        #[allow(clippy::suspicious_else_formatting)]
         let llval = match name {
             _ if simple.is_some() => {
                 // FIXME(antoyo): remove this cast when the API supports function.

From 225a32f7d0d668f3044c12e31bf2cf3da48454fb Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 16 Mar 2024 12:14:01 +0800
Subject: [PATCH 595/997] Revert "feat(CI): Add clippy check to workflow."

This reverts commit f6cab2cd1eb985737db2d0059c4655588c9ed4e1.
---
 .github/workflows/ci.yml | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 6079725b3e6c..839f3ba4de36 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -52,9 +52,6 @@ jobs:
     - name: Install rustfmt
       run: rustup component add rustfmt
 
-    - name: Install clippy
-      run: rustup component add clippy
-
     - name: Download artifact
       run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/${{ matrix.libgccjit_version.gcc }}
 
@@ -101,11 +98,6 @@ jobs:
     - name: Check formatting
       run: cargo fmt -- --check
 
-     - name: clippy
-      run: |
-        cargo clippy --all-targets -- -D warnings
-        cargo clippy --all-targets --features master -- -D warnings
-
   duplicates:
     runs-on: ubuntu-latest
     steps:

From 89acb108b48d206798e7ec2c8522c7650101036f Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 16 Mar 2024 12:24:05 +0800
Subject: [PATCH 596/997] feat(ci): Install clippy in ci.yml(But no testing)

Done incrementally to avoid potential failure.
---
 .github/workflows/ci.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 839f3ba4de36..f563583648dd 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -49,8 +49,8 @@ jobs:
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
       run: sudo apt-get install ninja-build ripgrep llvm-14-tools
 
-    - name: Install rustfmt
-      run: rustup component add rustfmt
+    - name: Install rustfmt & clippy
+      run: rustup component add rustfmt clippy
 
     - name: Download artifact
       run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/${{ matrix.libgccjit_version.gcc }}

From 4e4efb9b9e45d40f14a8911ed394fc00fa0dc518 Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 16 Mar 2024 12:30:52 +0800
Subject: [PATCH 597/997] feat(ci): Add clippy check for both master and
 non-master

---
 .github/workflows/ci.yml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index f563583648dd..44730bab4ed1 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -98,6 +98,11 @@ jobs:
     - name: Check formatting
       run: cargo fmt -- --check
 
+    - name: clippy
+      run: |
+        cargo clippy --all-targets -- -D warnings
+        cargo clippy --all-targets --features master -- -D warnings
+
   duplicates:
     runs-on: ubuntu-latest
     steps:

From 3b01fba0f5ecfd7e929fcf1948945ae75479c38d Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 16 Mar 2024 21:16:41 +0800
Subject: [PATCH 598/997] fix(intrinsic/mod.rs): Update comments

---
 src/intrinsic/mod.rs | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 6cc6e0378f1f..b1d8ced66199 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -119,6 +119,10 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         let result = PlaceRef::new_sized(llresult, fn_abi.ret.layout);
 
         let simple = get_simple_intrinsic(self, name);
+
+        // FIXME(tempdragon): Re-enable `clippy::suspicious_else_formatting` if the following issue is solved:
+        // https://github.com/rust-lang/rust-clippy/issues/12497
+        // and leave `else if use_integer_compare` to be placed "as is".
         #[allow(clippy::suspicious_else_formatting)]
         let llval = match name {
             _ if simple.is_some() => {
@@ -164,7 +168,6 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
             sym::volatile_load | sym::unaligned_volatile_load => {
                 let tp_ty = fn_args.type_at(0);
                 let ptr = args[0].immediate();
-                // The reference was changed to clone to comply to clippy.
                 let load = if let PassMode::Cast { cast: ref ty, pad_i32: _ } = fn_abi.ret.mode {
                     let gcc_ty = ty.gcc_type(self);
                     self.volatile_load(gcc_ty, ptr)
@@ -307,8 +310,6 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 let b = args[1].immediate();
                 if layout.size().bytes() == 0 {
                     self.const_bool(true)
-                    // The else if an immediate neighbor of this block.
-                    // It is moved here to comply to Clippy.
                 }
                 /*else if use_integer_compare {
                     let integer_ty = self.type_ix(layout.size.bits()); // FIXME(antoyo): LLVM creates an integer of 96 bits for [i32; 3], but gcc doesn't support this, so it creates an integer of 128 bits.
@@ -386,7 +387,6 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         };
 
         if !fn_abi.ret.is_ignore() {
-            // The reference was changed to clone to comply to clippy.
             if let PassMode::Cast { cast: ref ty, .. } = fn_abi.ret.mode {
                 let ptr_llty = self.type_ptr_to(ty.gcc_type(self));
                 let ptr = self.pointercast(result.llval, ptr_llty);

From 0a493514d7596649cc9ca9e70f00fc9b53ba434e Mon Sep 17 00:00:00 2001
From: tempdragon <645703113@qq.com>
Date: Sat, 16 Mar 2024 21:26:16 +0800
Subject: [PATCH 599/997] fix(lifetime): Add lifetimes back.

---
 src/attributes.rs    |  5 ++++-
 src/builder.rs       |  5 ++++-
 src/consts.rs        |  6 +++++-
 src/intrinsic/mod.rs | 10 ++++++++--
 4 files changed, 21 insertions(+), 5 deletions(-)

diff --git a/src/attributes.rs b/src/attributes.rs
index 6238daaed1dd..2ce0c83008f1 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -15,7 +15,10 @@ use crate::{context::CodegenCx, errors::TiedTargetFeatures};
 /// Get GCC attribute for the provided inline heuristic.
 #[cfg(feature = "master")]
 #[inline]
-fn inline_attr<'gcc>(cx: &CodegenCx<'gcc, '_>, inline: InlineAttr) -> Option<FnAttribute<'gcc>> {
+fn inline_attr<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    inline: InlineAttr,
+) -> Option<FnAttribute<'gcc>> {
     match inline {
         InlineAttr::Hint => Some(FnAttribute::Inline),
         InlineAttr::Always => Some(FnAttribute::AlwaysInline),
diff --git a/src/builder.rs b/src/builder.rs
index 55ab20a03ae1..385ca7a44a7d 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -506,7 +506,10 @@ impl<'gcc, 'tcx> BackendTypes for Builder<'_, 'gcc, 'tcx> {
     type DIVariable = <CodegenCx<'gcc, 'tcx> as BackendTypes>::DIVariable;
 }
 
-fn set_rvalue_location<'gcc>(bx: &mut Builder<'_, 'gcc, '_>, rvalue: RValue<'gcc>) -> RValue<'gcc> {
+fn set_rvalue_location<'a, 'gcc, 'tcx>(
+    bx: &mut Builder<'a, 'gcc, 'tcx>,
+    rvalue: RValue<'gcc>,
+) -> RValue<'gcc> {
     if bx.location.is_some() {
         #[cfg(feature = "master")]
         rvalue.set_location(bx.location.unwrap());
diff --git a/src/consts.rs b/src/consts.rs
index bbc1de1dfae9..f47fd5655332 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -18,7 +18,11 @@ use crate::context::CodegenCx;
 use crate::errors::InvalidMinimumAlignment;
 use crate::type_of::LayoutGccExt;
 
-fn set_global_alignment<'gcc>(cx: &CodegenCx<'gcc, '_>, gv: LValue<'gcc>, mut align: Align) {
+fn set_global_alignment<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    gv: LValue<'gcc>,
+    mut align: Align,
+) {
     // The target may require greater alignment for globals than the type does.
     // Note: GCC and Clang also allow `__attribute__((aligned))` on variables,
     // which can force it to be smaller. Rust doesn't support this yet.
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index b1d8ced66199..eca4a72c756a 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -39,7 +39,10 @@ use crate::context::CodegenCx;
 use crate::intrinsic::simd::generic_simd_intrinsic;
 use crate::type_of::LayoutGccExt;
 
-fn get_simple_intrinsic<'gcc>(cx: &CodegenCx<'gcc, '_>, name: Symbol) -> Option<Function<'gcc>> {
+fn get_simple_intrinsic<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    name: Symbol,
+) -> Option<Function<'gcc>> {
     let gcc_name = match name {
         sym::sqrtf32 => "sqrtf",
         sym::sqrtf64 => "sqrt",
@@ -584,7 +587,10 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
     }
 }
 
-fn int_type_width_signed<'tcx>(ty: Ty<'tcx>, cx: &CodegenCx<'_, 'tcx>) -> Option<(u64, bool)> {
+fn int_type_width_signed<'gcc, 'tcx>(
+    ty: Ty<'tcx>,
+    cx: &CodegenCx<'gcc, 'tcx>,
+) -> Option<(u64, bool)> {
     match *ty.kind() {
         ty::Int(t) => Some((
             match t {

From 4ef3bac2a63405d87d0157d9a0c11f225a5fc28f Mon Sep 17 00:00:00 2001
From: mubarak23 <mubarakaminu340@gmail.com>
Date: Tue, 19 Mar 2024 08:54:11 +0100
Subject: [PATCH 600/997] remove debug info from emitting

---
 build_system/src/config.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 0a7258958e7e..4cda356301ad 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -424,7 +424,7 @@ impl ConfigInfo {
             rustflags.push("-Csymbol-mangling-version=v0".to_string());
         }
 
-        rustflags.push("-Cdebuginfo=2".to_string());
+        
 
         // Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
         // TODO(antoyo): remove when we can handle ThinLTO.

From 09dbab8fab1eaf4a101330c24febc4ab3fac9939 Mon Sep 17 00:00:00 2001
From: mubarak23 <mubarakaminu340@gmail.com>
Date: Tue, 19 Mar 2024 13:49:07 +0100
Subject: [PATCH 601/997] change the debug option from true to limited

---
 build_sysroot/Cargo.toml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build_sysroot/Cargo.toml b/build_sysroot/Cargo.toml
index e5658273c978..f46c9c8ce157 100644
--- a/build_sysroot/Cargo.toml
+++ b/build_sysroot/Cargo.toml
@@ -18,5 +18,5 @@ rustc-std-workspace-alloc = { path = "./sysroot_src/library/rustc-std-workspace-
 rustc-std-workspace-std = { path = "./sysroot_src/library/rustc-std-workspace-std" }
 
 [profile.release]
-debug = true
+debug = "limited"
 #lto = "fat" # TODO(antoyo): re-enable when the failing LTO tests regarding proc-macros are fixed.

From 51d27a63b8039765790c469ebb169802da4a307e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 20 Mar 2024 13:52:36 +0100
Subject: [PATCH 602/997] Move cleanup of sysroot build into its own function

---
 build_system/src/build.rs | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index c81b02e2183d..2d66fd89fb9f 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -55,8 +55,7 @@ impl BuildArg {
     }
 }
 
-pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Result<(), String> {
-    let start_dir = Path::new("build_sysroot");
+fn cleanup_sysroot_previous_build(start_dir: &Path) {
     // Cleanup for previous run
     // Clean target dir except for build scripts and incremental cache
     let _ = walk_dir(
@@ -100,6 +99,11 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     let _ = fs::remove_file(start_dir.join("Cargo.lock"));
     let _ = fs::remove_file(start_dir.join("test_target/Cargo.lock"));
     let _ = fs::remove_dir_all(start_dir.join("sysroot"));
+}
+
+pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Result<(), String> {
+    let start_dir = Path::new("build_sysroot");
+    cleanup_sysroot_previous_build(&start_dir);
 
     // Builds libs
     let mut rustflags = env.get("RUSTFLAGS").cloned().unwrap_or_default();

From 9b17b3d184a77c6022f51b68aefbad60d0a47d81 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 20 Mar 2024 14:18:25 +0100
Subject: [PATCH 603/997] Simplify directory creation

---
 build_system/src/build.rs   | 26 +++++---------------------
 build_system/src/config.rs  | 10 ++--------
 build_system/src/prepare.rs | 10 ++--------
 build_system/src/test.rs    | 10 ++++------
 build_system/src/utils.rs   |  6 ++++++
 5 files changed, 19 insertions(+), 43 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 2d66fd89fb9f..a4ea5107a050 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -1,5 +1,5 @@
 use crate::config::{Channel, ConfigInfo};
-use crate::utils::{run_command, run_command_with_output_and_env, walk_dir};
+use crate::utils::{create_dir, run_command, run_command_with_output_and_env, walk_dir};
 use std::collections::HashMap;
 use std::ffi::OsStr;
 use std::fs;
@@ -103,6 +103,7 @@ fn cleanup_sysroot_previous_build(start_dir: &Path) {
 
 pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Result<(), String> {
     let start_dir = Path::new("build_sysroot");
+
     cleanup_sysroot_previous_build(&start_dir);
 
     // Builds libs
@@ -136,13 +137,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
 
     // Copy files to sysroot
     let sysroot_path = start_dir.join(format!("sysroot/lib/rustlib/{}/lib/", config.target_triple));
-    fs::create_dir_all(&sysroot_path).map_err(|error| {
-        format!(
-            "Failed to create directory `{}`: {:?}",
-            sysroot_path.display(),
-            error
-        )
-    })?;
+    create_dir(&sysroot_path)?;
     let copier = |dir_to_copy: &Path| {
         // FIXME: should not use shell command!
         run_command(&[&"cp", &"-r", &dir_to_copy, &sysroot_path], None).map(|_| ())
@@ -155,13 +150,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
 
     // Copy the source files to the sysroot (Rust for Linux needs this).
     let sysroot_src_path = start_dir.join("sysroot/lib/rustlib/src/rust");
-    fs::create_dir_all(&sysroot_src_path).map_err(|error| {
-        format!(
-            "Failed to create directory `{}`: {:?}",
-            sysroot_src_path.display(),
-            error
-        )
-    })?;
+    create_dir(&sysroot_src_path)?;
     run_command(
         &[
             &"cp",
@@ -216,12 +205,7 @@ fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     // We voluntarily ignore the error.
     let _ = fs::remove_dir_all("target/out");
     let gccjit_target = "target/out/gccjit";
-    fs::create_dir_all(gccjit_target).map_err(|error| {
-        format!(
-            "Failed to create directory `{}`: {:?}",
-            gccjit_target, error
-        )
-    })?;
+    create_dir(gccjit_target)?;
 
     println!("[BUILD] sysroot");
     build_sysroot(&env, &args.config_info)?;
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 4cda356301ad..2e6d1b038c10 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -1,5 +1,5 @@
 use crate::utils::{
-    create_symlink, get_os_name, run_command_with_output, rustc_version_info, split_args,
+    create_dir, create_symlink, get_os_name, run_command_with_output, rustc_version_info, split_args,
 };
 use std::collections::HashMap;
 use std::env as std_env;
@@ -228,13 +228,7 @@ impl ConfigInfo {
 
         let output_dir = output_dir.join(&commit);
         if !output_dir.is_dir() {
-            std::fs::create_dir_all(&output_dir).map_err(|err| {
-                format!(
-                    "failed to create folder `{}`: {:?}",
-                    output_dir.display(),
-                    err,
-                )
-            })?;
+            create_dir(&output_dir)?;
         }
         let output_dir = output_dir.canonicalize().map_err(|err| {
             format!(
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 821c793c7e55..fd577fa94341 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -1,6 +1,6 @@
 use crate::rustc_info::get_rustc_path;
 use crate::utils::{
-    cargo_install, git_clone_root_dir, remove_file, run_command, run_command_with_output, walk_dir,
+    cargo_install, create_dir, git_clone_root_dir, remove_file, run_command, run_command_with_output, walk_dir,
 };
 
 use std::fs;
@@ -41,13 +41,7 @@ fn prepare_libcore(
     }
 
     let sysroot_library_dir = sysroot_dir.join("library");
-    fs::create_dir_all(&sysroot_library_dir).map_err(|error| {
-        format!(
-            "Failed to create folder `{}`: {:?}",
-            sysroot_library_dir.display(),
-            error,
-        )
-    })?;
+    create_dir(&sysroot_library_dir)?;
 
     run_command(
         &[&"cp", &"-r", &rustlib_dir.join("library"), &sysroot_dir],
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 0895dc6bff70..c0cb6c8f2397 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1,13 +1,13 @@
 use crate::build;
 use crate::config::{Channel, ConfigInfo};
 use crate::utils::{
-    get_toolchain, git_clone, git_clone_root_dir, remove_file, run_command, run_command_with_env,
+    create_dir, get_toolchain, git_clone, git_clone_root_dir, remove_file, run_command, run_command_with_env,
     run_command_with_output_and_env, rustc_version_info, split_args, walk_dir,
 };
 
 use std::collections::{BTreeSet, HashMap};
 use std::ffi::OsStr;
-use std::fs::{create_dir_all, remove_dir_all, File};
+use std::fs::{remove_dir_all, File};
 use std::io::{BufRead, BufReader};
 use std::path::{Path, PathBuf};
 use std::str::FromStr;
@@ -211,8 +211,7 @@ fn build_if_no_backend(env: &Env, args: &TestArg) -> Result<(), String> {
 fn clean(_env: &Env, args: &TestArg) -> Result<(), String> {
     let _ = std::fs::remove_dir_all(&args.config_info.cargo_target_dir);
     let path = Path::new(&args.config_info.cargo_target_dir).join("gccjit");
-    std::fs::create_dir_all(&path)
-        .map_err(|error| format!("failed to create folder `{}`: {:?}", path.display(), error))
+    create_dir(&path)
 }
 
 fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
@@ -715,8 +714,7 @@ fn test_projects(env: &Env, args: &TestArg) -> Result<(), String> {
     };
 
     let projects_path = Path::new("projects");
-    create_dir_all(projects_path)
-        .map_err(|err| format!("Failed to create directory `projects`: {}", err))?;
+    create_dir(projects_path)?;
 
     let nb_parts = args.nb_parts.unwrap_or(0);
     if nb_parts > 0 {
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index d9c13fd143d1..cd7c035e690c 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -307,6 +307,12 @@ pub fn git_clone(
     git_clone_inner(to_clone, dest, shallow_clone, repo_name)
 }
 
+pub fn create_dir<P: AsRef<Path>>(path: P) -> Result<(), String> {
+    fs::create_dir_all(&path).map_err(|error| {
+        format!("Failed to create directory `{}`: {:?}", path.as_ref().display(), error)
+    })
+}
+
 /// This function differs from `git_clone` in how it handles *where* the repository will be cloned.
 /// In `git_clone`, it is cloned in the provided path. In this function, the path you provide is
 /// the parent folder. So if you pass "a" as folder and try to clone "b.git", it will be cloned into

From 6a2f725a45131a1bab709ebd99f498414d7fc409 Mon Sep 17 00:00:00 2001
From: mubarak23 <mubarakaminu340@gmail.com>
Date: Thu, 21 Mar 2024 16:00:30 +0100
Subject: [PATCH 604/997] remove pass test

---
 tests/failing-ui-tests.txt | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index de838231a1f9..9d7f9b3e8a6a 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -16,10 +16,8 @@ tests/ui/sepcomp/sepcomp-statics.rs
 tests/ui/asm/x86_64/may_unwind.rs
 tests/ui/backtrace.rs
 tests/ui/catch-unwind-bang.rs
-tests/ui/cfg/cfg-panic-abort.rs
 tests/ui/drop/dynamic-drop-async.rs
 tests/ui/drop/repeat-drop.rs
-tests/ui/fmt/format-args-capture.rs
 tests/ui/coroutine/panic-drops-resume.rs
 tests/ui/coroutine/panic-drops.rs
 tests/ui/intrinsics/panic-uninitialized-zeroed.rs
@@ -29,9 +27,7 @@ tests/ui/mir/mir_calls_to_shims.rs
 tests/ui/mir/mir_drop_order.rs
 tests/ui/mir/mir_let_chains_drop_order.rs
 tests/ui/oom_unwind.rs
-tests/ui/panic-runtime/abort-link-to-unwinding-crates.rs
 tests/ui/panic-runtime/abort.rs
-tests/ui/panic-runtime/link-to-abort.rs
 tests/ui/unwind-no-uwtable.rs
 tests/ui/parser/unclosed-delimiter-in-dep.rs
 tests/ui/runtime/rt-explody-panic-payloads.rs

From 3cb807b6d36ddf4d12af9f83d08e79dd27f9e901 Mon Sep 17 00:00:00 2001
From: mubarak23 <mubarakaminu340@gmail.com>
Date: Thu, 21 Mar 2024 16:19:49 +0100
Subject: [PATCH 605/997] remove more pass test from the lists

---
 tests/failing-ui-tests.txt | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 9d7f9b3e8a6a..7c2dbbb33eea 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -2,7 +2,6 @@ tests/ui/allocator/no_std-alloc-error-handler-custom.rs
 tests/ui/allocator/no_std-alloc-error-handler-default.rs
 tests/ui/asm/may_unwind.rs
 tests/ui/asm/x86_64/multiple-clobber-abi.rs
-tests/ui/debuginfo/debuginfo-emit-llvm-ir-and-split-debuginfo.rs
 tests/ui/functions-closures/parallel-codegen-closures.rs
 tests/ui/linkage-attr/linkage1.rs
 tests/ui/lto/dylib-works.rs
@@ -27,7 +26,6 @@ tests/ui/mir/mir_calls_to_shims.rs
 tests/ui/mir/mir_drop_order.rs
 tests/ui/mir/mir_let_chains_drop_order.rs
 tests/ui/oom_unwind.rs
-tests/ui/panic-runtime/abort.rs
 tests/ui/unwind-no-uwtable.rs
 tests/ui/parser/unclosed-delimiter-in-dep.rs
 tests/ui/runtime/rt-explody-panic-payloads.rs
@@ -44,8 +42,6 @@ tests/ui/rfcs/rfc-1857-stabilize-drop-order/drop-order.rs
 tests/ui/rfcs/rfc-2091-track-caller/std-panic-locations.rs
 tests/ui/simd/issue-17170.rs
 tests/ui/simd/issue-39720.rs
-tests/ui/statics/issue-91050-1.rs
-tests/ui/statics/issue-91050-2.rs
 tests/ui/alloc-error/default-alloc-error-hook.rs
 tests/ui/coroutine/panic-safe.rs
 tests/ui/issues/issue-14875.rs
@@ -53,7 +49,6 @@ tests/ui/issues/issue-29948.rs
 tests/ui/panics/nested_panic_caught.rs
 tests/ui/const_prop/ice-issue-111353.rs
 tests/ui/process/println-with-broken-pipe.rs
-tests/ui/panic-runtime/lto-abort.rs
 tests/ui/lto/thin-lto-inlines2.rs
 tests/ui/lto/weak-works.rs
 tests/ui/lto/thin-lto-inlines.rs

From 193d165e22a090fd2e9307020124551b1f43815e Mon Sep 17 00:00:00 2001
From: mubarak23 <mubarakaminu340@gmail.com>
Date: Thu, 21 Mar 2024 16:47:20 +0100
Subject: [PATCH 606/997] add back lto-abort.rs to the list

---
 tests/failing-ui-tests.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 7c2dbbb33eea..713878711b49 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -57,6 +57,7 @@ tests/ui/lto/msvc-imp-present.rs
 tests/ui/lto/lto-thin-rustc-loads-linker-plugin.rs
 tests/ui/lto/all-crates.rs
 tests/ui/async-await/deep-futures-are-freeze.rs
+tests/ui/panic-runtime/lto-abort.rs
 tests/ui/closures/capture-unsized-by-ref.rs
 tests/ui/coroutine/resume-after-return.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs

From 486f6b7300f4666cb5b84e47374024eca7aab205 Mon Sep 17 00:00:00 2001
From: mubarak23 <mubarakaminu340@gmail.com>
Date: Thu, 21 Mar 2024 17:04:03 +0100
Subject: [PATCH 607/997] remove lto-abort.rs since it has passed

---
 tests/failing-ui-tests.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 713878711b49..7c2dbbb33eea 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -57,7 +57,6 @@ tests/ui/lto/msvc-imp-present.rs
 tests/ui/lto/lto-thin-rustc-loads-linker-plugin.rs
 tests/ui/lto/all-crates.rs
 tests/ui/async-await/deep-futures-are-freeze.rs
-tests/ui/panic-runtime/lto-abort.rs
 tests/ui/closures/capture-unsized-by-ref.rs
 tests/ui/coroutine/resume-after-return.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs

From 67c6c7e00d5f030f12fac14a7372b5f809e264e6 Mon Sep 17 00:00:00 2001
From: mubarak23 <mubarakaminu340@gmail.com>
Date: Fri, 22 Mar 2024 12:29:56 +0100
Subject: [PATCH 608/997] add two fail test back to the list

---
 tests/failing-ui-tests.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 7c2dbbb33eea..e1f4cb52d707 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -16,8 +16,10 @@ tests/ui/asm/x86_64/may_unwind.rs
 tests/ui/backtrace.rs
 tests/ui/catch-unwind-bang.rs
 tests/ui/drop/dynamic-drop-async.rs
+tests/ui/cfg/cfg-panic-abort.rs
 tests/ui/drop/repeat-drop.rs
 tests/ui/coroutine/panic-drops-resume.rs
+format-args-capture.rs
 tests/ui/coroutine/panic-drops.rs
 tests/ui/intrinsics/panic-uninitialized-zeroed.rs
 tests/ui/iterators/iter-sum-overflow-debug.rs

From 906a2ab5b35a279e8b4ee49b598d98979f40c1f1 Mon Sep 17 00:00:00 2001
From: Mubarak Muhammad Aminu <Mubarakaminu340@gmail.com>
Date: Fri, 22 Mar 2024 15:51:48 +0100
Subject: [PATCH 609/997] Update tests/failing-ui-tests.txt

Co-authored-by: antoyo <antoyo@users.noreply.github.com>
---
 tests/failing-ui-tests.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index e1f4cb52d707..2ee64f4d9fb4 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -19,7 +19,7 @@ tests/ui/drop/dynamic-drop-async.rs
 tests/ui/cfg/cfg-panic-abort.rs
 tests/ui/drop/repeat-drop.rs
 tests/ui/coroutine/panic-drops-resume.rs
-format-args-capture.rs
+tests/ui/fmt/format-args-capture.rs
 tests/ui/coroutine/panic-drops.rs
 tests/ui/intrinsics/panic-uninitialized-zeroed.rs
 tests/ui/iterators/iter-sum-overflow-debug.rs

From ab1ea400a8ac464bb6e39b5b3376e2a0bfcdd3df Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 20 Mar 2024 14:18:38 +0100
Subject: [PATCH 610/997] Format code

---
 build_system/src/build.rs   |  25 +----
 build_system/src/cargo.rs   |  27 +----
 build_system/src/clean.rs   |   8 +-
 build_system/src/config.rs  |  62 +++--------
 build_system/src/prepare.rs |  66 +++--------
 build_system/src/test.rs    | 214 +++++++++---------------------------
 build_system/src/utils.rs   |  50 ++-------
 7 files changed, 99 insertions(+), 353 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index a4ea5107a050..5d3e355a5251 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -151,15 +151,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     // Copy the source files to the sysroot (Rust for Linux needs this).
     let sysroot_src_path = start_dir.join("sysroot/lib/rustlib/src/rust");
     create_dir(&sysroot_src_path)?;
-    run_command(
-        &[
-            &"cp",
-            &"-r",
-            &start_dir.join("sysroot_src/library/"),
-            &sysroot_src_path,
-        ],
-        None,
-    )?;
+    run_command(&[&"cp", &"-r", &start_dir.join("sysroot_src/library/"), &sysroot_src_path], None)?;
 
     Ok(())
 }
@@ -167,20 +159,11 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
 fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     let mut env = HashMap::new();
 
-    env.insert(
-        "LD_LIBRARY_PATH".to_string(),
-        args.config_info.gcc_path.clone(),
-    );
-    env.insert(
-        "LIBRARY_PATH".to_string(),
-        args.config_info.gcc_path.clone(),
-    );
+    env.insert("LD_LIBRARY_PATH".to_string(), args.config_info.gcc_path.clone());
+    env.insert("LIBRARY_PATH".to_string(), args.config_info.gcc_path.clone());
 
     if args.config_info.no_default_features {
-        env.insert(
-            "RUSTFLAGS".to_string(),
-            "-Csymbol-mangling-version=v0".to_string(),
-        );
+        env.insert("RUSTFLAGS".to_string(), "-Csymbol-mangling-version=v0".to_string());
     }
 
     let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"rustc"];
diff --git a/build_system/src/cargo.rs b/build_system/src/cargo.rs
index 1cfcdba6b1cd..e4ea79b06f22 100644
--- a/build_system/src/cargo.rs
+++ b/build_system/src/cargo.rs
@@ -16,9 +16,7 @@ fn args() -> Result<Option<Vec<String>>, String> {
     }
     let args = std::env::args().skip(2).collect::<Vec<_>>();
     if args.is_empty() {
-        return Err(
-            "Expected at least one argument for `cargo` subcommand, found none".to_string(),
-        );
+        return Err("Expected at least one argument for `cargo` subcommand, found none".to_string());
     }
     Ok(Some(args))
 }
@@ -48,17 +46,10 @@ pub fn run() -> Result<(), String> {
     let current_exe = std::env::current_exe()
         .and_then(|path| path.canonicalize())
         .map_err(|error| format!("Failed to get current exe path: {:?}", error))?;
-    let mut parent_dir = current_exe
-        .components()
-        .map(|comp| comp.as_os_str())
-        .collect::<Vec<_>>();
+    let mut parent_dir = current_exe.components().map(|comp| comp.as_os_str()).collect::<Vec<_>>();
     // We run this script from "build_system/target/release/y", so we need to remove these elements.
     for to_remove in &["y", "release", "target", "build_system"] {
-        if parent_dir
-            .last()
-            .map(|part| part == to_remove)
-            .unwrap_or(false)
-        {
+        if parent_dir.last().map(|part| part == to_remove).unwrap_or(false) {
             parent_dir.pop();
         } else {
             return Err(format!(
@@ -69,11 +60,7 @@ pub fn run() -> Result<(), String> {
     }
     let parent_dir = PathBuf::from(parent_dir.join(&OsStr::new("/")));
     std::env::set_current_dir(&parent_dir).map_err(|error| {
-        format!(
-            "Failed to go to `{}` folder: {:?}",
-            parent_dir.display(),
-            error
-        )
+        format!("Failed to go to `{}` folder: {:?}", parent_dir.display(), error)
     })?;
 
     let mut env: HashMap<String, String> = std::env::vars().collect();
@@ -92,11 +79,7 @@ pub fn run() -> Result<(), String> {
 
     // We go back to the original folder since we now have set up everything we needed.
     std::env::set_current_dir(&current_dir).map_err(|error| {
-        format!(
-            "Failed to go back to `{}` folder: {:?}",
-            current_dir.display(),
-            error
-        )
+        format!("Failed to go back to `{}` folder: {:?}", current_dir.display(), error)
     })?;
 
     let rustflags = env.get("RUSTFLAGS").cloned().unwrap_or_default();
diff --git a/build_system/src/clean.rs b/build_system/src/clean.rs
index cd8e691a0ed9..22055ab9841d 100644
--- a/build_system/src/clean.rs
+++ b/build_system/src/clean.rs
@@ -42,12 +42,8 @@ fn usage() {
 }
 
 fn clean_all() -> Result<(), String> {
-    let dirs_to_remove = [
-        "target",
-        "build_sysroot/sysroot",
-        "build_sysroot/sysroot_src",
-        "build_sysroot/target",
-    ];
+    let dirs_to_remove =
+        ["target", "build_sysroot/sysroot", "build_sysroot/sysroot_src", "build_sysroot/target"];
     for dir in dirs_to_remove {
         let _ = remove_dir_all(dir);
     }
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 2e6d1b038c10..274767ea0b17 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -1,5 +1,6 @@
 use crate::utils::{
-    create_dir, create_symlink, get_os_name, run_command_with_output, rustc_version_info, split_args,
+    create_dir, create_symlink, get_os_name, run_command_with_output, rustc_version_info,
+    split_args,
 };
 use std::collections::HashMap;
 use std::env as std_env;
@@ -26,11 +27,7 @@ impl Channel {
 }
 
 fn failed_config_parsing(config_file: &Path, err: &str) -> Result<ConfigFile, String> {
-    Err(format!(
-        "Failed to parse `{}`: {}",
-        config_file.display(),
-        err
-    ))
+    Err(format!("Failed to parse `{}`: {}", config_file.display(), err))
 }
 
 #[derive(Default)]
@@ -48,11 +45,7 @@ impl ConfigFile {
             )
         })?;
         let toml = Toml::parse(&content).map_err(|err| {
-            format!(
-                "Error occurred around `{}`: {:?}",
-                &content[err.start..=err.end],
-                err.kind
-            )
+            format!("Error occurred around `{}`: {:?}", &content[err.start..=err.end], err.kind)
         })?;
         let mut config = Self::default();
         for (key, value) in toml.iter() {
@@ -181,11 +174,7 @@ impl ConfigInfo {
             },
             "--use-backend" => match args.next() {
                 Some(backend) if !backend.is_empty() => self.backend = Some(backend),
-                _ => {
-                    return Err(
-                        "Expected an argument after `--use-backend`, found nothing".into()
-                    )
-                }
+                _ => return Err("Expected an argument after `--use-backend`, found nothing".into()),
             },
             "--no-default-features" => self.no_default_features = true,
             _ => return Ok(false),
@@ -231,11 +220,7 @@ impl ConfigInfo {
             create_dir(&output_dir)?;
         }
         let output_dir = output_dir.canonicalize().map_err(|err| {
-            format!(
-                "Failed to get absolute path of `{}`: {:?}",
-                output_dir.display(),
-                err
-            )
+            format!("Failed to get absolute path of `{}`: {:?}", output_dir.display(), err)
         })?;
 
         let libgccjit_so_name = "libgccjit.so";
@@ -269,10 +254,7 @@ impl ConfigInfo {
             println!("Downloaded libgccjit.so version {} successfully!", commit);
             // We need to create a link named `libgccjit.so.0` because that's what the linker is
             // looking for.
-            create_symlink(
-                &libgccjit_so,
-                output_dir.join(&format!("{}.0", libgccjit_so_name)),
-            )?;
+            create_symlink(&libgccjit_so, output_dir.join(&format!("{}.0", libgccjit_so_name)))?;
         }
 
         self.gcc_path = output_dir.display().to_string();
@@ -292,10 +274,7 @@ impl ConfigInfo {
             Some(config_file) => config_file.into(),
             None => self.compute_path("config.toml"),
         };
-        let ConfigFile {
-            gcc_path,
-            download_gccjit,
-        } = ConfigFile::new(&config_file)?;
+        let ConfigFile { gcc_path, download_gccjit } = ConfigFile::new(&config_file)?;
 
         if let Some(true) = download_gccjit {
             self.download_gccjit_if_needed()?;
@@ -304,10 +283,7 @@ impl ConfigInfo {
         self.gcc_path = match gcc_path {
             Some(path) => path,
             None => {
-                return Err(format!(
-                    "missing `gcc-path` value from `{}`",
-                    config_file.display(),
-                ))
+                return Err(format!("missing `gcc-path` value from `{}`", config_file.display(),))
             }
         };
         Ok(())
@@ -387,17 +363,15 @@ impl ConfigInfo {
             .join(&format!("librustc_codegen_gcc.{}", self.dylib_ext))
             .display()
             .to_string();
-        self.sysroot_path = current_dir
-            .join("build_sysroot/sysroot")
-            .display()
-            .to_string();
+        self.sysroot_path = current_dir.join("build_sysroot/sysroot").display().to_string();
         if let Some(backend) = &self.backend {
             // This option is only used in the rust compiler testsuite. The sysroot is handled
             // by its build system directly so no need to set it ourselves.
             rustflags.push(format!("-Zcodegen-backend={}", backend));
         } else {
             rustflags.extend_from_slice(&[
-                "--sysroot".to_string(), self.sysroot_path.clone(),
+                "--sysroot".to_string(),
+                self.sysroot_path.clone(),
                 format!("-Zcodegen-backend={}", self.cg_backend_path),
             ]);
         }
@@ -436,10 +410,8 @@ impl ConfigInfo {
         // display metadata load errors
         env.insert("RUSTC_LOG".to_string(), "warn".to_string());
 
-        let sysroot = current_dir.join(&format!(
-            "build_sysroot/sysroot/lib/rustlib/{}/lib",
-            self.target_triple,
-        ));
+        let sysroot = current_dir
+            .join(&format!("build_sysroot/sysroot/lib/rustlib/{}/lib", self.target_triple,));
         let ld_library_path = format!(
             "{target}:{sysroot}:{gcc_path}",
             target = self.cargo_target_dir,
@@ -517,11 +489,7 @@ fn download_gccjit(
             &"--retry",
             &"3",
             &"-SRfL",
-            if with_progress_bar {
-                &"--progress-bar"
-            } else {
-                &"-s"
-            },
+            if with_progress_bar { &"--progress-bar" } else { &"-s" },
             &url.as_str(),
         ],
         Some(&output_dir),
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index fd577fa94341..4b6756a2eefb 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -1,6 +1,7 @@
 use crate::rustc_info::get_rustc_path;
 use crate::utils::{
-    cargo_install, create_dir, git_clone_root_dir, remove_file, run_command, run_command_with_output, walk_dir,
+    cargo_install, create_dir, git_clone_root_dir, remove_file, run_command,
+    run_command_with_output, walk_dir,
 };
 
 use std::fs;
@@ -32,21 +33,14 @@ fn prepare_libcore(
     let sysroot_dir = sysroot_path.join("sysroot_src");
     if sysroot_dir.is_dir() {
         if let Err(error) = fs::remove_dir_all(&sysroot_dir) {
-            return Err(format!(
-                "Failed to remove `{}`: {:?}",
-                sysroot_dir.display(),
-                error,
-            ));
+            return Err(format!("Failed to remove `{}`: {:?}", sysroot_dir.display(), error,));
         }
     }
 
     let sysroot_library_dir = sysroot_dir.join("library");
     create_dir(&sysroot_library_dir)?;
 
-    run_command(
-        &[&"cp", &"-r", &rustlib_dir.join("library"), &sysroot_dir],
-        None,
-    )?;
+    run_command(&[&"cp", &"-r", &rustlib_dir.join("library"), &sysroot_dir], None)?;
 
     println!("[GIT] init (cwd): `{}`", sysroot_dir.display());
     run_command(&[&"git", &"init"], Some(&sysroot_dir))?;
@@ -57,26 +51,11 @@ fn prepare_libcore(
     // This is needed on systems where nothing is configured.
     // git really needs something here, or it will fail.
     // Even using --author is not enough.
-    run_command(
-        &[&"git", &"config", &"user.email", &"none@example.com"],
-        Some(&sysroot_dir),
-    )?;
-    run_command(
-        &[&"git", &"config", &"user.name", &"None"],
-        Some(&sysroot_dir),
-    )?;
-    run_command(
-        &[&"git", &"config", &"core.autocrlf", &"false"],
-        Some(&sysroot_dir),
-    )?;
-    run_command(
-        &[&"git", &"config", &"commit.gpgSign", &"false"],
-        Some(&sysroot_dir),
-    )?;
-    run_command(
-        &[&"git", &"commit", &"-m", &"Initial commit", &"-q"],
-        Some(&sysroot_dir),
-    )?;
+    run_command(&[&"git", &"config", &"user.email", &"none@example.com"], Some(&sysroot_dir))?;
+    run_command(&[&"git", &"config", &"user.name", &"None"], Some(&sysroot_dir))?;
+    run_command(&[&"git", &"config", &"core.autocrlf", &"false"], Some(&sysroot_dir))?;
+    run_command(&[&"git", &"config", &"commit.gpgSign", &"false"], Some(&sysroot_dir))?;
+    run_command(&[&"git", &"commit", &"-m", &"Initial commit", &"-q"], Some(&sysroot_dir))?;
 
     let mut patches = Vec::new();
     walk_dir(
@@ -114,13 +93,7 @@ fn prepare_libcore(
         run_command_with_output(&[&"git", &"apply", &path], Some(&sysroot_dir))?;
         run_command_with_output(&[&"git", &"add", &"-A"], Some(&sysroot_dir))?;
         run_command_with_output(
-            &[
-                &"git",
-                &"commit",
-                &"--no-gpg-sign",
-                &"-m",
-                &format!("Patch {}", path.display()),
-            ],
+            &[&"git", &"commit", &"--no-gpg-sign", &"-m", &format!("Patch {}", path.display())],
             Some(&sysroot_dir),
         )?;
     }
@@ -139,13 +112,7 @@ fn prepare_rand() -> Result<(), String> {
     run_command_with_output(&[&"git", &"apply", &path], Some(rand_dir))?;
     run_command_with_output(&[&"git", &"add", &"-A"], Some(rand_dir))?;
     run_command_with_output(
-        &[
-            &"git",
-            &"commit",
-            &"--no-gpg-sign",
-            &"-m",
-            &format!("Patch {}", path.display()),
-        ],
+        &[&"git", &"commit", &"--no-gpg-sign", &"-m", &format!("Patch {}", path.display())],
         Some(rand_dir),
     )?;
 
@@ -159,10 +126,7 @@ fn build_raytracer(repo_dir: &Path) -> Result<(), String> {
     if mv_target.is_file() {
         remove_file(&mv_target)?;
     }
-    run_command(
-        &[&"mv", &"target/debug/main", &"raytracer_cg_llvm"],
-        Some(repo_dir),
-    )?;
+    run_command(&[&"mv", &"target/debug/main", &"raytracer_cg_llvm"], Some(repo_dir))?;
     Ok(())
 }
 
@@ -207,11 +171,7 @@ impl PrepareArg {
                 a => return Err(format!("Unknown argument `{a}`")),
             }
         }
-        Ok(Some(Self {
-            cross_compile,
-            only_libcore,
-            libgccjit12_patches,
-        }))
+        Ok(Some(Self { cross_compile, only_libcore, libgccjit12_patches }))
     }
 
     fn usage() {
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index c0cb6c8f2397..b27f28795d7b 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1,8 +1,9 @@
 use crate::build;
 use crate::config::{Channel, ConfigInfo};
 use crate::utils::{
-    create_dir, get_toolchain, git_clone, git_clone_root_dir, remove_file, run_command, run_command_with_env,
-    run_command_with_output_and_env, rustc_version_info, split_args, walk_dir,
+    create_dir, get_toolchain, git_clone, git_clone_root_dir, remove_file, run_command,
+    run_command_with_env, run_command_with_output_and_env, rustc_version_info, split_args,
+    walk_dir,
 };
 
 use std::collections::{BTreeSet, HashMap};
@@ -19,46 +20,23 @@ type Runners = HashMap<&'static str, (&'static str, Runner)>;
 fn get_runners() -> Runners {
     let mut runners = HashMap::new();
 
-    runners.insert(
-        "--test-rustc",
-        ("Run all rustc tests", test_rustc as Runner),
-    );
-    runners.insert(
-        "--test-successful-rustc",
-        ("Run successful rustc tests", test_successful_rustc),
-    );
-    runners.insert(
-        "--test-failing-rustc",
-        ("Run failing rustc tests", test_failing_rustc),
-    );
-    runners.insert(
-        "--projects",
-        ("Run the tests of popular crates", test_projects),
-    );
+    runners.insert("--test-rustc", ("Run all rustc tests", test_rustc as Runner));
+    runners
+        .insert("--test-successful-rustc", ("Run successful rustc tests", test_successful_rustc));
+    runners.insert("--test-failing-rustc", ("Run failing rustc tests", test_failing_rustc));
+    runners.insert("--projects", ("Run the tests of popular crates", test_projects));
     runners.insert("--test-libcore", ("Run libcore tests", test_libcore));
     runners.insert("--clean", ("Empty cargo target directory", clean));
     runners.insert("--build-sysroot", ("Build sysroot", build_sysroot));
     runners.insert("--std-tests", ("Run std tests", std_tests));
     runners.insert("--asm-tests", ("Run asm tests", asm_tests));
-    runners.insert(
-        "--extended-tests",
-        ("Run extended sysroot tests", extended_sysroot_tests),
-    );
-    runners.insert(
-        "--extended-rand-tests",
-        ("Run extended rand tests", extended_rand_tests),
-    );
+    runners.insert("--extended-tests", ("Run extended sysroot tests", extended_sysroot_tests));
+    runners.insert("--extended-rand-tests", ("Run extended rand tests", extended_rand_tests));
     runners.insert(
         "--extended-regex-example-tests",
-        (
-            "Run extended regex example tests",
-            extended_regex_example_tests,
-        ),
-    );
-    runners.insert(
-        "--extended-regex-tests",
-        ("Run extended regex tests", extended_regex_tests),
+        ("Run extended regex example tests", extended_regex_example_tests),
     );
+    runners.insert("--extended-regex-tests", ("Run extended regex tests", extended_regex_tests));
     runners.insert("--mini-tests", ("Run mini tests", mini_tests));
 
     runners
@@ -71,15 +49,9 @@ fn get_number_after_arg(
     match args.next() {
         Some(nb) if !nb.is_empty() => match usize::from_str(&nb) {
             Ok(nb) => Ok(nb),
-            Err(_) => Err(format!(
-                "Expected a number after `{}`, found `{}`",
-                option, nb
-            )),
+            Err(_) => Err(format!("Expected a number after `{}`, found `{}`", option, nb)),
         },
-        _ => Err(format!(
-            "Expected a number after `{}`, found nothing",
-            option
-        )),
+        _ => Err(format!("Expected a number after `{}`, found nothing", option)),
     }
 }
 
@@ -130,9 +102,7 @@ impl TestArg {
             match arg.as_str() {
                 "--features" => match args.next() {
                     Some(feature) if !feature.is_empty() => {
-                        test_arg
-                            .flags
-                            .extend_from_slice(&["--features".into(), feature]);
+                        test_arg.flags.extend_from_slice(&["--features".into(), feature]);
                     }
                     _ => {
                         return Err("Expected an argument after `--features`, found nothing".into())
@@ -303,13 +273,8 @@ fn maybe_run_command_in_vm(
     let sudo_command: &[&dyn AsRef<OsStr>] = &[&"sudo", &"cp", &exe, &vm_exe_path];
     run_command_with_env(sudo_command, None, Some(env))?;
 
-    let mut vm_command: Vec<&dyn AsRef<OsStr>> = vec![
-        &"sudo",
-        &"chroot",
-        &vm_dir,
-        &"qemu-m68k-static",
-        &inside_vm_exe_path,
-    ];
+    let mut vm_command: Vec<&dyn AsRef<OsStr>> =
+        vec![&"sudo", &"chroot", &vm_dir, &"qemu-m68k-static", &inside_vm_exe_path];
     vm_command.extend_from_slice(command);
     run_command_with_output_and_env(&vm_command, Some(&vm_parent_dir), Some(env))?;
     Ok(())
@@ -398,11 +363,7 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     }
     run_command_with_env(&command, None, Some(env))?;
     maybe_run_command_in_vm(
-        &[
-            &cargo_target_dir.join("std_example"),
-            &"--target",
-            &args.config_info.target_triple,
-        ],
+        &[&cargo_target_dir.join("std_example"), &"--target", &args.config_info.target_triple],
         env,
         args,
     )?;
@@ -426,11 +387,7 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         command.push(test_flag);
     }
     run_command_with_env(&command, None, Some(env))?;
-    maybe_run_command_in_vm(
-        &[&cargo_target_dir.join("subslice-patterns-const-eval")],
-        env,
-        args,
-    )?;
+    maybe_run_command_in_vm(&[&cargo_target_dir.join("subslice-patterns-const-eval")], env, args)?;
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] track-caller-attribute");
@@ -446,11 +403,7 @@ fn std_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         command.push(test_flag);
     }
     run_command_with_env(&command, None, Some(env))?;
-    maybe_run_command_in_vm(
-        &[&cargo_target_dir.join("track-caller-attribute")],
-        env,
-        args,
-    )?;
+    maybe_run_command_in_vm(&[&cargo_target_dir.join("track-caller-attribute")], env, args)?;
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] mod_bench");
@@ -476,11 +429,7 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
     );
     let rust_dir_path = Path::new(crate::BUILD_DIR).join("rust");
     // If the repository was already cloned, command will fail, so doesn't matter.
-    let _ = git_clone(
-        "https://github.com/rust-lang/rust.git",
-        Some(&rust_dir_path),
-        false,
-    );
+    let _ = git_clone("https://github.com/rust-lang/rust.git", Some(&rust_dir_path), false);
     let rust_dir: Option<&Path> = Some(&rust_dir_path);
     run_command(&[&"git", &"checkout", &"--", &"tests/"], rust_dir)?;
     run_command_with_output_and_env(&[&"git", &"fetch"], rust_dir, Some(env))?;
@@ -510,12 +459,8 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
         }
     })?;
     let rustc = String::from_utf8(
-        run_command_with_env(
-            &[&"rustup", &toolchain, &"which", &"rustc"],
-            rust_dir,
-            Some(env),
-        )?
-        .stdout,
+        run_command_with_env(&[&"rustup", &toolchain, &"which", &"rustc"], rust_dir, Some(env))?
+            .stdout,
     )
     .map_err(|error| format!("Failed to retrieve rustc path: {:?}", error))
     .and_then(|rustc| {
@@ -572,13 +517,7 @@ download-ci-llvm = false
             llvm_filecheck = llvm_filecheck.trim(),
         ),
     )
-    .map_err(|error| {
-        format!(
-            "Failed to write into `{}`: {:?}",
-            file_path.display(),
-            error
-        )
-    })?;
+    .map_err(|error| format!("Failed to write into `{}`: {:?}", file_path.display(), error))?;
     Ok(rust_dir_path)
 }
 
@@ -590,11 +529,8 @@ fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
 
     env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
 
-    let extra = if args.is_using_gcc_master_branch() {
-        ""
-    } else {
-        " -Csymbol-mangling-version=v0"
-    };
+    let extra =
+        if args.is_using_gcc_master_branch() { "" } else { " -Csymbol-mangling-version=v0" };
 
     let rustc_args = &format!(
         r#"-Zpanic-abort-tests \
@@ -761,10 +697,8 @@ fn extended_rand_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     }
     let mut env = env.clone();
     // newer aho_corasick versions throw a deprecation warning
-    let rustflags = format!(
-        "{} --cap-lints warn",
-        env.get("RUSTFLAGS").cloned().unwrap_or_default()
-    );
+    let rustflags =
+        format!("{} --cap-lints warn", env.get("RUSTFLAGS").cloned().unwrap_or_default());
     env.insert("RUSTFLAGS".to_string(), rustflags);
 
     let path = Path::new(crate::BUILD_DIR).join("rand");
@@ -786,18 +720,11 @@ fn extended_regex_example_tests(env: &Env, args: &TestArg) -> Result<(), String>
     println!("[TEST] rust-lang/regex example shootout-regex-dna");
     let mut env = env.clone();
     // newer aho_corasick versions throw a deprecation warning
-    let rustflags = format!(
-        "{} --cap-lints warn",
-        env.get("RUSTFLAGS").cloned().unwrap_or_default()
-    );
+    let rustflags =
+        format!("{} --cap-lints warn", env.get("RUSTFLAGS").cloned().unwrap_or_default());
     env.insert("RUSTFLAGS".to_string(), rustflags);
     // Make sure `[codegen mono items] start` doesn't poison the diff
-    run_cargo_command(
-        &[&"build", &"--example", &"shootout-regex-dna"],
-        Some(&path),
-        &env,
-        args,
-    )?;
+    run_cargo_command(&[&"build", &"--example", &"shootout-regex-dna"], Some(&path), &env, args)?;
 
     run_cargo_command_with_callback(
         &[&"run", &"--example", &"shootout-regex-dna"],
@@ -808,10 +735,8 @@ fn extended_regex_example_tests(env: &Env, args: &TestArg) -> Result<(), String>
             // FIXME: rewrite this with `child.stdin.write_all()` because
             // `examples/regexdna-input.txt` is very small.
             let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"bash", &"-c"];
-            let cargo_args = cargo_command
-                .iter()
-                .map(|s| s.as_ref().to_str().unwrap())
-                .collect::<Vec<_>>();
+            let cargo_args =
+                cargo_command.iter().map(|s| s.as_ref().to_str().unwrap()).collect::<Vec<_>>();
             let bash_command = format!(
                 "cat examples/regexdna-input.txt | {} | grep -v 'Spawned thread' > res.txt",
                 cargo_args.join(" "),
@@ -839,10 +764,8 @@ fn extended_regex_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     println!("[TEST] rust-lang/regex tests");
     let mut env = env.clone();
     // newer aho_corasick versions throw a deprecation warning
-    let rustflags = format!(
-        "{} --cap-lints warn",
-        env.get("RUSTFLAGS").cloned().unwrap_or_default()
-    );
+    let rustflags =
+        format!("{} --cap-lints warn", env.get("RUSTFLAGS").cloned().unwrap_or_default());
     env.insert("RUSTFLAGS".to_string(), rustflags);
     let path = Path::new(crate::BUILD_DIR).join("regex");
     run_cargo_command(
@@ -897,6 +820,7 @@ fn should_not_remove_test(file: &str) -> bool {
     .any(|to_ignore| file.ends_with(to_ignore))
 }
 
+#[rustfmt::skip]
 fn should_remove_test(file_path: &Path) -> Result<bool, String> {
     // Tests generating errors.
     let file = File::open(file_path)
@@ -914,8 +838,8 @@ fn should_remove_test(file_path: &Path) -> Result<bool, String> {
             "//~",
             "thread",
         ]
-        .iter()
-        .any(|check| line.contains(check))
+            .iter()
+            .any(|check| line.contains(check))
         {
             return Ok(true);
         }
@@ -923,11 +847,7 @@ fn should_remove_test(file_path: &Path) -> Result<bool, String> {
             return Ok(true);
         }
     }
-    if file_path
-        .display()
-        .to_string()
-        .contains("ambiguous-4-extern.rs")
-    {
+    if file_path.display().to_string().contains("ambiguous-4-extern.rs") {
         eprintln!("nothing found for {file_path:?}");
     }
     Ok(false)
@@ -970,21 +890,13 @@ where
     // These two functions are used to remove files that are known to not be working currently
     // with the GCC backend to reduce noise.
     fn dir_handling(dir: &Path) -> Result<(), String> {
-        if dir
-            .file_name()
-            .map(|name| name == "auxiliary")
-            .unwrap_or(true)
-        {
+        if dir.file_name().map(|name| name == "auxiliary").unwrap_or(true) {
             return Ok(());
         }
         walk_dir(dir, dir_handling, file_handling)
     }
     fn file_handling(file_path: &Path) -> Result<(), String> {
-        if !file_path
-            .extension()
-            .map(|extension| extension == "rs")
-            .unwrap_or(false)
-        {
+        if !file_path.extension().map(|extension| extension == "rs").unwrap_or(false) {
             return Ok(());
         }
         let path_str = file_path.display().to_string().replace("\\", "/");
@@ -1017,10 +929,7 @@ where
     if nb_parts > 0 {
         let current_part = args.current_part.unwrap();
         // FIXME: create a function "display_if_not_quiet" or something along the line.
-        println!(
-            "Splitting ui_test into {} parts (and running part {})",
-            nb_parts, current_part
-        );
+        println!("Splitting ui_test into {} parts (and running part {})", nb_parts, current_part);
         let out = String::from_utf8(
             run_command(
                 &[
@@ -1060,11 +969,8 @@ where
     println!("[TEST] rustc test suite");
     env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
 
-    let extra = if args.is_using_gcc_master_branch() {
-        ""
-    } else {
-        " -Csymbol-mangling-version=v0"
-    };
+    let extra =
+        if args.is_using_gcc_master_branch() { "" } else { " -Csymbol-mangling-version=v0" };
 
     let rustc_args = format!(
         "{} -Zcodegen-backend={} --sysroot {}{}",
@@ -1118,18 +1024,11 @@ fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
         // Putting back only the failing ones.
         let path = "tests/failing-ui-tests.txt";
         if let Ok(files) = std::fs::read_to_string(path) {
-            for file in files
-                .split('\n')
-                .map(|line| line.trim())
-                .filter(|line| !line.is_empty())
-            {
+            for file in files.split('\n').map(|line| line.trim()).filter(|line| !line.is_empty()) {
                 run_command(&[&"git", &"checkout", &"--", &file], Some(&rust_path))?;
             }
         } else {
-            println!(
-                "Failed to read `{}`, not putting back failing ui tests",
-                path
-            );
+            println!("Failed to read `{}`, not putting back failing ui tests", path);
         }
         Ok(true)
     })
@@ -1140,19 +1039,12 @@ fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
         // Removing the failing tests.
         let path = "tests/failing-ui-tests.txt";
         if let Ok(files) = std::fs::read_to_string(path) {
-            for file in files
-                .split('\n')
-                .map(|line| line.trim())
-                .filter(|line| !line.is_empty())
-            {
+            for file in files.split('\n').map(|line| line.trim()).filter(|line| !line.is_empty()) {
                 let path = rust_path.join(file);
                 remove_file(&path)?;
             }
         } else {
-            println!(
-                "Failed to read `{}`, not putting back failing ui tests",
-                path
-            );
+            println!("Failed to read `{}`, not putting back failing ui tests", path);
         }
         Ok(true)
     })
@@ -1179,14 +1071,8 @@ pub fn run() -> Result<(), String> {
 
     if !args.use_system_gcc {
         args.config_info.setup_gcc_path()?;
-        env.insert(
-            "LIBRARY_PATH".to_string(),
-            args.config_info.gcc_path.clone(),
-        );
-        env.insert(
-            "LD_LIBRARY_PATH".to_string(),
-            args.config_info.gcc_path.clone(),
-        );
+        env.insert("LIBRARY_PATH".to_string(), args.config_info.gcc_path.clone());
+        env.insert("LD_LIBRARY_PATH".to_string(), args.config_info.gcc_path.clone());
     }
 
     build_if_no_backend(&env, &args)?;
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index cd7c035e690c..c5e7f532a7dd 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -37,13 +37,8 @@ fn check_exit_status(
     }
     let mut error = format!(
         "Command `{}`{} exited with status {:?}",
-        input
-            .iter()
-            .map(|s| s.as_ref().to_str().unwrap())
-            .collect::<Vec<_>>()
-            .join(" "),
-        cwd.map(|cwd| format!(" (running in folder `{}`)", cwd.display()))
-            .unwrap_or_default(),
+        input.iter().map(|s| s.as_ref().to_str().unwrap()).collect::<Vec<_>>().join(" "),
+        cwd.map(|cwd| format!(" (running in folder `{}`)", cwd.display())).unwrap_or_default(),
         exit_status.code()
     );
     let input = input.iter().map(|i| i.as_ref()).collect::<Vec<&OsStr>>();
@@ -68,11 +63,7 @@ fn check_exit_status(
 fn command_error<D: Debug>(input: &[&dyn AsRef<OsStr>], cwd: &Option<&Path>, error: D) -> String {
     format!(
         "Command `{}`{} failed to run: {error:?}",
-        input
-            .iter()
-            .map(|s| s.as_ref().to_str().unwrap())
-            .collect::<Vec<_>>()
-            .join(" "),
+        input.iter().map(|s| s.as_ref().to_str().unwrap()).collect::<Vec<_>>().join(" "),
         cwd.as_ref()
             .map(|cwd| format!(" (running in folder `{}`)", cwd.display(),))
             .unwrap_or_default(),
@@ -88,9 +79,8 @@ pub fn run_command_with_env(
     cwd: Option<&Path>,
     env: Option<&HashMap<String, String>>,
 ) -> Result<Output, String> {
-    let output = get_command_inner(input, cwd, env)
-        .output()
-        .map_err(|e| command_error(input, &cwd, e))?;
+    let output =
+        get_command_inner(input, cwd, env).output().map_err(|e| command_error(input, &cwd, e))?;
     check_exit_status(input, cwd, output.status, Some(&output), true)?;
     Ok(output)
 }
@@ -164,10 +154,7 @@ pub fn cargo_install(to_install: &str) -> Result<(), String> {
 
 pub fn get_os_name() -> Result<String, String> {
     let output = run_command(&[&"uname"], None)?;
-    let name = std::str::from_utf8(&output.stdout)
-        .unwrap_or("")
-        .trim()
-        .to_string();
+    let name = std::str::from_utf8(&output.stdout).unwrap_or("").trim().to_string();
     if !name.is_empty() {
         Ok(name)
     } else {
@@ -274,11 +261,7 @@ fn git_clone_inner(
         command.push(&"1");
     }
     run_command_with_output(&command, None)?;
-    Ok(CloneResult {
-        ran_clone: true,
-        repo_name,
-        repo_dir: dest.display().to_string(),
-    })
+    Ok(CloneResult { ran_clone: true, repo_name, repo_dir: dest.display().to_string() })
 }
 
 fn get_repo_name(url: &str) -> String {
@@ -324,12 +307,7 @@ pub fn git_clone_root_dir(
 ) -> Result<CloneResult, String> {
     let repo_name = get_repo_name(to_clone);
 
-    git_clone_inner(
-        to_clone,
-        &dest_parent_dir.join(&repo_name),
-        shallow_clone,
-        repo_name,
-    )
+    git_clone_inner(to_clone, &dest_parent_dir.join(&repo_name), shallow_clone, repo_name)
 }
 
 pub fn walk_dir<P, D, F>(dir: P, mut dir_cb: D, mut file_cb: F) -> Result<(), String>
@@ -389,11 +367,7 @@ pub fn split_args(args: &str) -> Result<Vec<String>, String> {
                 }
             }
             if !found_end {
-                return Err(format!(
-                    "Didn't find `{}` at the end of `{}`",
-                    end,
-                    &args[start..]
-                ));
+                return Err(format!("Didn't find `{}` at the end of `{}`", end, &args[start..]));
             }
         } else if c == '\\' {
             // We skip the escaped character.
@@ -409,11 +383,7 @@ pub fn split_args(args: &str) -> Result<Vec<String>, String> {
 
 pub fn remove_file<P: AsRef<Path> + ?Sized>(file_path: &P) -> Result<(), String> {
     std::fs::remove_file(file_path).map_err(|error| {
-        format!(
-            "Failed to remove `{}`: {:?}",
-            file_path.as_ref().display(),
-            error
-        )
+        format!("Failed to remove `{}`: {:?}", file_path.as_ref().display(), error)
     })
 }
 

From cde105a651a3f3249d16780f4ff0173ec8f6b87b Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 20 Mar 2024 15:15:20 +0100
Subject: [PATCH 611/997] Move `build_sysroot` folder into `build_system`

---
 .github/workflows/release.yml                 |  4 ++--
 .github/workflows/stdarch.yml                 |  8 +++----
 .gitignore                                    |  4 ----
 .../build_sysroot}/Cargo.toml                 |  2 +-
 .../src => build_system/build_sysroot}/lib.rs |  0
 build_system/src/build.rs                     | 24 +++++++++++++++----
 build_system/src/clean.rs                     | 16 +++++++++----
 build_system/src/config.rs                    | 12 +++++-----
 build_system/src/prepare.rs                   |  8 +++----
 build_system/src/test.rs                      | 13 +++++-----
 build_system/src/utils.rs                     | 17 +++++++++++++
 tests/lang_tests_common.rs                    |  2 +-
 12 files changed, 73 insertions(+), 37 deletions(-)
 rename {build_sysroot => build_system/build_sysroot}/Cargo.toml (93%)
 rename {build_sysroot/src => build_system/build_sysroot}/lib.rs (100%)

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 28336998ffcd..60a71d7d3dd7 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -62,12 +62,12 @@ jobs:
         git config --global user.email "user@example.com"
         git config --global user.name "User"
         ./y.sh prepare
-        # FIXME(antoyo): we cannot enable LTO for stdarch tests currently because of some failing LTO tests using proc-macros.
-        echo -n 'lto = "fat"' >> build_sysroot/Cargo.toml
 
     - name: Add more failing tests because of undefined symbol errors (FIXME)
       run: cat tests/failing-lto-tests.txt >> tests/failing-ui-tests.txt
 
     - name: Run tests
       run: |
+        # FIXME(antoyo): we cannot enable LTO for stdarch tests currently because of some failing LTO tests using proc-macros.
+        echo -n 'lto = "fat"' >> build_system/build_sysroot/Cargo.toml
         EMBED_LTO_BITCODE=1 ./y.sh test --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }}
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 41a9318007f1..25eb5c1b69f2 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -89,12 +89,12 @@ jobs:
     - name: Run stdarch tests
       if: ${{ !matrix.cargo_runner }}
       run: |
-        cd build_sysroot/sysroot_src/library/stdarch/
-        CHANNEL=release TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../y.sh cargo test
+        cd build/build_sysroot/sysroot_src/library/stdarch/
+        CHANNEL=release TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../../y.sh cargo test
 
     - name: Run stdarch tests
       if: ${{ matrix.cargo_runner }}
       run: |
-        cd build_sysroot/sysroot_src/library/stdarch/
+        cd build/build_sysroot/sysroot_src/library/stdarch/
         # FIXME: these tests fail when the sysroot is compiled with LTO because of a missing symbol in proc-macro.
-        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../y.sh cargo test -- --skip rtm --skip tbm --skip sse4a
+        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../../y.sh cargo test -- --skip rtm --skip tbm --skip sse4a
diff --git a/.gitignore b/.gitignore
index bf975f92014d..c1e6631a281b 100644
--- a/.gitignore
+++ b/.gitignore
@@ -6,10 +6,6 @@ perf.data
 perf.data.old
 *.events
 *.string*
-/build_sysroot/sysroot
-/build_sysroot/sysroot_src
-/build_sysroot/Cargo.lock
-/build_sysroot/test_target/Cargo.lock
 gimple*
 *asm
 res
diff --git a/build_sysroot/Cargo.toml b/build_system/build_sysroot/Cargo.toml
similarity index 93%
rename from build_sysroot/Cargo.toml
rename to build_system/build_sysroot/Cargo.toml
index f46c9c8ce157..05503128f2af 100644
--- a/build_sysroot/Cargo.toml
+++ b/build_system/build_sysroot/Cargo.toml
@@ -1,5 +1,5 @@
 [package]
-authors = ["bjorn3 <bjorn3@users.noreply.github.com>"]
+authors = ["rustc_codegen_gcc devs"]
 name = "sysroot"
 version = "0.0.0"
 resolver = "2"
diff --git a/build_sysroot/src/lib.rs b/build_system/build_sysroot/lib.rs
similarity index 100%
rename from build_sysroot/src/lib.rs
rename to build_system/build_sysroot/lib.rs
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 5d3e355a5251..6313e4ffccb9 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -1,5 +1,7 @@
 use crate::config::{Channel, ConfigInfo};
-use crate::utils::{create_dir, run_command, run_command_with_output_and_env, walk_dir};
+use crate::utils::{
+    copy_file, create_dir, get_sysroot_dir, run_command, run_command_with_output_and_env, walk_dir,
+};
 use std::collections::HashMap;
 use std::ffi::OsStr;
 use std::fs;
@@ -101,10 +103,24 @@ fn cleanup_sysroot_previous_build(start_dir: &Path) {
     let _ = fs::remove_dir_all(start_dir.join("sysroot"));
 }
 
+pub fn create_build_sysroot_content(start_dir: &Path) -> Result<(), String> {
+    if !start_dir.is_dir() {
+        create_dir(start_dir)?;
+    }
+    copy_file("build_system/build_sysroot/Cargo.toml", &start_dir.join("Cargo.toml"))?;
+
+    let src_dir = start_dir.join("src");
+    if !src_dir.is_dir() {
+        create_dir(&src_dir)?;
+    }
+    copy_file("build_system/build_sysroot/lib.rs", &start_dir.join("src/lib.rs"))
+}
+
 pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Result<(), String> {
-    let start_dir = Path::new("build_sysroot");
+    let start_dir = get_sysroot_dir();
 
     cleanup_sysroot_previous_build(&start_dir);
+    create_build_sysroot_content(&start_dir)?;
 
     // Builds libs
     let mut rustflags = env.get("RUSTFLAGS").cloned().unwrap_or_default();
@@ -115,7 +131,6 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     if config.no_default_features {
         rustflags.push_str(" -Csymbol-mangling-version=v0");
     }
-    let mut env = env.clone();
 
     let mut args: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"build", &"--target", &config.target];
 
@@ -132,8 +147,9 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         "debug"
     };
 
+    let mut env = env.clone();
     env.insert("RUSTFLAGS".to_string(), rustflags);
-    run_command_with_output_and_env(&args, Some(start_dir), Some(&env))?;
+    run_command_with_output_and_env(&args, Some(&start_dir), Some(&env))?;
 
     // Copy files to sysroot
     let sysroot_path = start_dir.join(format!("sysroot/lib/rustlib/{}/lib/", config.target_triple));
diff --git a/build_system/src/clean.rs b/build_system/src/clean.rs
index 22055ab9841d..55f55acf73ea 100644
--- a/build_system/src/clean.rs
+++ b/build_system/src/clean.rs
@@ -1,4 +1,4 @@
-use crate::utils::{remove_file, run_command};
+use crate::utils::{get_sysroot_dir, remove_file, run_command};
 
 use std::fs::remove_dir_all;
 use std::path::Path;
@@ -42,8 +42,13 @@ fn usage() {
 }
 
 fn clean_all() -> Result<(), String> {
-    let dirs_to_remove =
-        ["target", "build_sysroot/sysroot", "build_sysroot/sysroot_src", "build_sysroot/target"];
+    let build_sysroot = get_sysroot_dir();
+    let dirs_to_remove = [
+        "target".into(),
+        build_sysroot.join("sysroot"),
+        build_sysroot.join("sysroot_src"),
+        build_sysroot.join("target"),
+    ];
     for dir in dirs_to_remove {
         let _ = remove_dir_all(dir);
     }
@@ -52,10 +57,11 @@ fn clean_all() -> Result<(), String> {
         let _ = remove_dir_all(Path::new(crate::BUILD_DIR).join(dir));
     }
 
-    let files_to_remove = ["build_sysroot/Cargo.lock", "perf.data", "perf.data.old"];
+    let files_to_remove =
+        [build_sysroot.join("Cargo.lock"), "perf.data".into(), "perf.data.old".into()];
 
     for file in files_to_remove {
-        let _ = remove_file(file);
+        let _ = remove_file(&file);
     }
 
     println!("Successfully ran `clean all`");
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 274767ea0b17..041d75915fb0 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -1,6 +1,6 @@
 use crate::utils::{
-    create_dir, create_symlink, get_os_name, run_command_with_output, rustc_version_info,
-    split_args,
+    create_dir, create_symlink, get_os_name, get_sysroot_dir, run_command_with_output,
+    rustc_version_info, split_args,
 };
 use std::collections::HashMap;
 use std::env as std_env;
@@ -363,7 +363,8 @@ impl ConfigInfo {
             .join(&format!("librustc_codegen_gcc.{}", self.dylib_ext))
             .display()
             .to_string();
-        self.sysroot_path = current_dir.join("build_sysroot/sysroot").display().to_string();
+        self.sysroot_path =
+            current_dir.join(&get_sysroot_dir()).join("sysroot").display().to_string();
         if let Some(backend) = &self.backend {
             // This option is only used in the rust compiler testsuite. The sysroot is handled
             // by its build system directly so no need to set it ourselves.
@@ -392,8 +393,6 @@ impl ConfigInfo {
             rustflags.push("-Csymbol-mangling-version=v0".to_string());
         }
 
-        
-
         // Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
         // TODO(antoyo): remove when we can handle ThinLTO.
         if !env.contains_key(&"FAT_LTO".to_string()) {
@@ -411,7 +410,8 @@ impl ConfigInfo {
         env.insert("RUSTC_LOG".to_string(), "warn".to_string());
 
         let sysroot = current_dir
-            .join(&format!("build_sysroot/sysroot/lib/rustlib/{}/lib", self.target_triple,));
+            .join(&get_sysroot_dir())
+            .join(&format!("sysroot/lib/rustlib/{}/lib", self.target_triple));
         let ld_library_path = format!(
             "{target}:{sysroot}:{gcc_path}",
             target = self.cargo_target_dir,
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 4b6756a2eefb..9f405daa6876 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -1,6 +1,6 @@
 use crate::rustc_info::get_rustc_path;
 use crate::utils::{
-    cargo_install, create_dir, git_clone_root_dir, remove_file, run_command,
+    cargo_install, create_dir, get_sysroot_dir, git_clone_root_dir, remove_file, run_command,
     run_command_with_output, walk_dir,
 };
 
@@ -89,7 +89,7 @@ fn prepare_libcore(
     patches.sort();
     for file_path in patches {
         println!("[GIT] apply `{}`", file_path.display());
-        let path = Path::new("../..").join(file_path);
+        let path = Path::new("../../..").join(file_path);
         run_command_with_output(&[&"git", &"apply", &path], Some(&sysroot_dir))?;
         run_command_with_output(&[&"git", &"add", &"-A"], Some(&sysroot_dir))?;
         run_command_with_output(
@@ -192,8 +192,8 @@ pub fn run() -> Result<(), String> {
         Some(a) => a,
         None => return Ok(()),
     };
-    let sysroot_path = Path::new("build_sysroot");
-    prepare_libcore(sysroot_path, args.libgccjit12_patches, args.cross_compile)?;
+    let sysroot_path = get_sysroot_dir();
+    prepare_libcore(&sysroot_path, args.libgccjit12_patches, args.cross_compile)?;
 
     if !args.only_libcore {
         cargo_install("hyperfine")?;
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index b27f28795d7b..c9cfa13e8759 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1,9 +1,9 @@
 use crate::build;
 use crate::config::{Channel, ConfigInfo};
 use crate::utils::{
-    create_dir, get_toolchain, git_clone, git_clone_root_dir, remove_file, run_command,
-    run_command_with_env, run_command_with_output_and_env, rustc_version_info, split_args,
-    walk_dir,
+    create_dir, get_sysroot_dir, get_toolchain, git_clone, git_clone_root_dir, remove_file,
+    run_command, run_command_with_env, run_command_with_output_and_env, rustc_version_info,
+    split_args, walk_dir,
 };
 
 use std::collections::{BTreeSet, HashMap};
@@ -535,12 +535,13 @@ fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     let rustc_args = &format!(
         r#"-Zpanic-abort-tests \
             -Zcodegen-backend="{pwd}/target/{channel}/librustc_codegen_gcc.{dylib_ext}" \
-            --sysroot "{pwd}/build_sysroot/sysroot" -Cpanic=abort{extra}"#,
+            --sysroot "{pwd}/{sysroot_dir}" -Cpanic=abort{extra}"#,
         pwd = std::env::current_dir()
             .map_err(|error| format!("`current_dir` failed: {:?}", error))?
             .display(),
         channel = args.config_info.channel.as_str(),
         dylib_ext = args.config_info.dylib_ext,
+        sysroot_dir = args.config_info.sysroot_path,
         extra = extra,
     );
 
@@ -671,9 +672,9 @@ fn test_projects(env: &Env, args: &TestArg) -> Result<(), String> {
 fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[TEST] libcore");
-    let path = Path::new("build_sysroot/sysroot_src/library/core/tests");
+    let path = get_sysroot_dir().join("sysroot_src/library/core/tests");
     let _ = remove_dir_all(path.join("target"));
-    run_cargo_command(&[&"test"], Some(path), env, args)?;
+    run_cargo_command(&[&"test"], Some(&path), env, args)?;
     Ok(())
 }
 
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index c5e7f532a7dd..45a3ac81b44d 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -296,6 +296,19 @@ pub fn create_dir<P: AsRef<Path>>(path: P) -> Result<(), String> {
     })
 }
 
+pub fn copy_file<F: AsRef<Path>, T: AsRef<Path>>(from: F, to: T) -> Result<(), String> {
+    fs::copy(&from, &to)
+        .map_err(|error| {
+            format!(
+                "Failed to copy file `{}` into `{}`: {:?}",
+                from.as_ref().display(),
+                to.as_ref().display(),
+                error
+            )
+        })
+        .map(|_| ())
+}
+
 /// This function differs from `git_clone` in how it handles *where* the repository will be cloned.
 /// In `git_clone`, it is cloned in the provided path. In this function, the path you provide is
 /// the parent folder. So if you pass "a" as folder and try to clone "b.git", it will be cloned into
@@ -403,6 +416,10 @@ pub fn create_symlink<P: AsRef<Path>, Q: AsRef<Path>>(original: P, link: Q) -> R
     })
 }
 
+pub fn get_sysroot_dir() -> PathBuf {
+    Path::new(crate::BUILD_DIR).join("build_sysroot")
+}
+
 #[cfg(test)]
 mod tests {
     use super::*;
diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index d321ffc8ff54..c0fb5fa40733 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -79,7 +79,7 @@ pub fn main_inner(profile: Profile) {
             compiler.args([
                 &format!("-Zcodegen-backend={}/target/debug/librustc_codegen_gcc.so", current_dir),
                 "--sysroot",
-                &format!("{}/build_sysroot/sysroot/", current_dir),
+                &format!("{}/build/build_sysroot/sysroot/", current_dir),
                 "-Zno-parallel-llvm",
                 "-C",
                 "link-arg=-lc",

From 52f6d5d5893b74755e044072ebfbaded230c3526 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 21 Mar 2024 17:09:37 +0100
Subject: [PATCH 612/997] Run test commands in the provided order

---
 build_system/src/test.rs | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index c9cfa13e8759..86e6f1a95e9f 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -6,7 +6,7 @@ use crate::utils::{
     split_args, walk_dir,
 };
 
-use std::collections::{BTreeSet, HashMap};
+use std::collections::HashMap;
 use std::ffi::OsStr;
 use std::fs::{remove_dir_all, File};
 use std::io::{BufRead, BufReader};
@@ -82,7 +82,7 @@ fn show_usage() {
 struct TestArg {
     build_only: bool,
     use_system_gcc: bool,
-    runners: BTreeSet<String>,
+    runners: Vec<String>,
     flags: Vec<String>,
     nb_parts: Option<usize>,
     current_part: Option<usize>,
@@ -127,8 +127,8 @@ impl TestArg {
                     show_usage();
                     return Ok(None);
                 }
-                x if runners.contains_key(x) => {
-                    test_arg.runners.insert(x.into());
+                x if runners.contains_key(x) && !test_arg.runners.iter().any(|runner| runner == x) => {
+                    test_arg.runners.push(x.into());
                 }
                 arg => {
                     if !test_arg.config_info.parse_argument(arg, &mut args)? {
@@ -535,7 +535,7 @@ fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     let rustc_args = &format!(
         r#"-Zpanic-abort-tests \
             -Zcodegen-backend="{pwd}/target/{channel}/librustc_codegen_gcc.{dylib_ext}" \
-            --sysroot "{pwd}/{sysroot_dir}" -Cpanic=abort{extra}"#,
+            --sysroot "{sysroot_dir}" -Cpanic=abort{extra}"#,
         pwd = std::env::current_dir()
             .map_err(|error| format!("`current_dir` failed: {:?}", error))?
             .display(),
@@ -974,11 +974,11 @@ where
         if args.is_using_gcc_master_branch() { "" } else { " -Csymbol-mangling-version=v0" };
 
     let rustc_args = format!(
-        "{} -Zcodegen-backend={} --sysroot {}{}",
-        env.get("TEST_FLAGS").unwrap_or(&String::new()),
-        args.config_info.cg_backend_path,
-        args.config_info.sysroot_path,
-        extra,
+        "{test_flags} -Zcodegen-backend={backend} --sysroot {sysroot}{extra}",
+        test_flags = env.get("TEST_FLAGS").unwrap_or(&String::new()),
+        backend = args.config_info.cg_backend_path,
+        sysroot = args.config_info.sysroot_path,
+        extra = extra,
     );
 
     env.get_mut("RUSTFLAGS").unwrap().clear();

From 7ccd8ce6938cc6f44b3451d7a865b6e0d406d2d4 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 21 Mar 2024 17:46:23 +0100
Subject: [PATCH 613/997] Add fmt check on `build_system`

---
 .github/workflows/ci.yml | 5 ++++-
 build_system/src/test.rs | 4 +++-
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 44730bab4ed1..75694ebd9cea 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -96,7 +96,10 @@ jobs:
         ./y.sh test --release --clean --build-sysroot ${{ matrix.commands }}
 
     - name: Check formatting
-      run: cargo fmt -- --check
+      run: |
+        cargo fmt -- --check
+        cd build_system
+        cargo fmt -- --check
 
     - name: clippy
       run: |
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 86e6f1a95e9f..8ce615ff17a4 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -127,7 +127,9 @@ impl TestArg {
                     show_usage();
                     return Ok(None);
                 }
-                x if runners.contains_key(x) && !test_arg.runners.iter().any(|runner| runner == x) => {
+                x if runners.contains_key(x)
+                    && !test_arg.runners.iter().any(|runner| runner == x) =>
+                {
                     test_arg.runners.push(x.into());
                 }
                 arg => {

From f16a006c233f408ae9be5f7ccc1dd2bbee467b68 Mon Sep 17 00:00:00 2001
From: Shashank Trivedi <100513286+lordshashank@users.noreply.github.com>
Date: Sat, 23 Mar 2024 01:02:34 +0530
Subject: [PATCH 614/997] CI cargo test added (#6)

---
 .github/workflows/ci.yml      | 9 ++++++++-
 tests/hello-world/Cargo.toml  | 4 ++++
 tests/hello-world/src/main.rs | 3 +++
 3 files changed, 15 insertions(+), 1 deletion(-)
 create mode 100644 tests/hello-world/Cargo.toml
 create mode 100644 tests/hello-world/src/main.rs

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 44730bab4ed1..9b2c7ab5e30f 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -80,7 +80,14 @@ jobs:
         ./y.sh prepare --only-libcore
         ./y.sh build
         cargo test
-        ./y.sh clean all
+
+    - name: Run y.sh cargo build
+      run: |
+        ./y.sh cargo build --manifest-path tests/hello-world/Cargo.toml
+
+    - name: Clean
+      run: |
+        ./y.sh clean all      
 
     - name: Prepare dependencies
       run: |
diff --git a/tests/hello-world/Cargo.toml b/tests/hello-world/Cargo.toml
new file mode 100644
index 000000000000..a3b6813443f7
--- /dev/null
+++ b/tests/hello-world/Cargo.toml
@@ -0,0 +1,4 @@
+[package]
+name = "hello_world"
+
+[dependencies]
\ No newline at end of file
diff --git a/tests/hello-world/src/main.rs b/tests/hello-world/src/main.rs
new file mode 100644
index 000000000000..fbedd9205254
--- /dev/null
+++ b/tests/hello-world/src/main.rs
@@ -0,0 +1,3 @@
+fn main() {
+    println!("Hello, world!");
+}
\ No newline at end of file

From da070d356932612ab9564d99d10de7924240566c Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 22 Mar 2024 20:24:44 +0100
Subject: [PATCH 615/997] Clean up `y.sh` path in CI

---
 .github/workflows/stdarch.yml | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 25eb5c1b69f2..dc52c94376c5 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -89,12 +89,10 @@ jobs:
     - name: Run stdarch tests
       if: ${{ !matrix.cargo_runner }}
       run: |
-        cd build/build_sysroot/sysroot_src/library/stdarch/
-        CHANNEL=release TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../../y.sh cargo test
+        CHANNEL=release TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml
 
     - name: Run stdarch tests
       if: ${{ matrix.cargo_runner }}
       run: |
-        cd build/build_sysroot/sysroot_src/library/stdarch/
         # FIXME: these tests fail when the sysroot is compiled with LTO because of a missing symbol in proc-macro.
-        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ../../../../../y.sh cargo test -- --skip rtm --skip tbm --skip sse4a
+        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a

From 9c81910732dadc599d4692e9420b99872c40c81c Mon Sep 17 00:00:00 2001
From: mubarak23 <mubarakaminu340@gmail.com>
Date: Sat, 23 Mar 2024 13:27:33 +0100
Subject: [PATCH 616/997] fix rebase

---
 tests/failing-ui-tests.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 2ee64f4d9fb4..c451db9b480d 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -28,6 +28,9 @@ tests/ui/mir/mir_calls_to_shims.rs
 tests/ui/mir/mir_drop_order.rs
 tests/ui/mir/mir_let_chains_drop_order.rs
 tests/ui/oom_unwind.rs
+tests/ui/panic-runtime/abort-link-to-unwinding-crates.rs
+tests/ui/panic-runtime/abort.rs 
+tests/ui/panic-runtime/link-to-abort.rs
 tests/ui/unwind-no-uwtable.rs
 tests/ui/parser/unclosed-delimiter-in-dep.rs
 tests/ui/runtime/rt-explody-panic-payloads.rs
@@ -53,6 +56,7 @@ tests/ui/const_prop/ice-issue-111353.rs
 tests/ui/process/println-with-broken-pipe.rs
 tests/ui/lto/thin-lto-inlines2.rs
 tests/ui/lto/weak-works.rs
+tests/ui/panic-runtime/lto-abort.rs 
 tests/ui/lto/thin-lto-inlines.rs
 tests/ui/lto/thin-lto-global-allocator.rs
 tests/ui/lto/msvc-imp-present.rs

From 56eab3c484ee56043d26d3ea3f2dd0d37fd67b0f Mon Sep 17 00:00:00 2001
From: mubarak23 <mubarakaminu340@gmail.com>
Date: Sat, 23 Mar 2024 18:09:18 +0100
Subject: [PATCH 617/997] remove trailing space

---
 tests/failing-ui-tests.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index c451db9b480d..f33f58c763bd 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -29,7 +29,7 @@ tests/ui/mir/mir_drop_order.rs
 tests/ui/mir/mir_let_chains_drop_order.rs
 tests/ui/oom_unwind.rs
 tests/ui/panic-runtime/abort-link-to-unwinding-crates.rs
-tests/ui/panic-runtime/abort.rs 
+tests/ui/panic-runtime/abort.rs
 tests/ui/panic-runtime/link-to-abort.rs
 tests/ui/unwind-no-uwtable.rs
 tests/ui/parser/unclosed-delimiter-in-dep.rs

From 0319a80c5b37383ba90c5c5cd3e412b0477e3b91 Mon Sep 17 00:00:00 2001
From: mubarak23 <mubarakaminu340@gmail.com>
Date: Sat, 23 Mar 2024 19:21:45 +0100
Subject: [PATCH 618/997] remove more test that have passed

---
 tests/failing-ui-tests.txt | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index f33f58c763bd..c39b89d884fb 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -33,9 +33,7 @@ tests/ui/panic-runtime/abort.rs
 tests/ui/panic-runtime/link-to-abort.rs
 tests/ui/unwind-no-uwtable.rs
 tests/ui/parser/unclosed-delimiter-in-dep.rs
-tests/ui/runtime/rt-explody-panic-payloads.rs
 tests/ui/simd/intrinsic/ptr-cast.rs
-tests/ui/binding/fn-arg-incomplete-pattern-drop-order.rs
 tests/ui/consts/missing_span_in_backtrace.rs
 tests/ui/drop/dynamic-drop.rs
 tests/ui/dyn-star/box.rs
@@ -65,7 +63,6 @@ tests/ui/lto/all-crates.rs
 tests/ui/async-await/deep-futures-are-freeze.rs
 tests/ui/closures/capture-unsized-by-ref.rs
 tests/ui/coroutine/resume-after-return.rs
-tests/ui/macros/rfc-2011-nicer-assert-messages/all-expr-kinds.rs
 tests/ui/simd/masked-load-store.rs
 tests/ui/simd/repr_packed.rs
 tests/ui/async-await/in-trait/dont-project-to-specializable-projection.rs

From a67cd0c4fdeabb9c870bfbe797212f08fc283e2d Mon Sep 17 00:00:00 2001
From: mubarak23 <mubarakaminu340@gmail.com>
Date: Sat, 23 Mar 2024 22:18:22 +0100
Subject: [PATCH 619/997] add fn-arg-incomplete-pattern-drop-order.rs to the
 list

---
 tests/failing-lto-tests.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/failing-lto-tests.txt b/tests/failing-lto-tests.txt
index 6e1ed99c6f7a..b9126fb73a77 100644
--- a/tests/failing-lto-tests.txt
+++ b/tests/failing-lto-tests.txt
@@ -30,3 +30,4 @@ tests/ui/macros/rfc-2011-nicer-assert-messages/feature-gate-generic_assert.rs
 tests/ui/macros/stringify.rs
 tests/ui/reexport-test-harness-main.rs
 tests/ui/rfcs/rfc-1937-termination-trait/termination-trait-in-test.rs
+tests/ui/binding/fn-arg-incomplete-pattern-drop-order.rs

From 94ca8283af4e33dfbb2bec16becd1a5445689f51 Mon Sep 17 00:00:00 2001
From: Robert Zakrzewski <robert.zakrzewski1@stellantis.com>
Date: Sun, 24 Mar 2024 12:23:54 +0100
Subject: [PATCH 620/997] add missing mappings from register classes to dummy
 output types

fix formatting

Replace LLVM with GCC
---
 src/asm.rs | 49 ++++++++++++++++++++++++++++++-------------------
 1 file changed, 30 insertions(+), 19 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 72d572465f40..b446843a106c 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -694,10 +694,12 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
 fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegClass) -> Type<'gcc> {
     match reg {
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => cx.type_i32(),
-        InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => unimplemented!(),
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg)
         | InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => {
-            unimplemented!()
+            cx.type_vector(cx.type_i64(), 2)
+        }
+        InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
+            unreachable!("clobber-only")
         }
         InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => cx.type_i32(),
         InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
@@ -708,21 +710,13 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
         InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg)
         | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low8)
         | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4) => {
-            unimplemented!()
+            cx.type_vector(cx.type_i64(), 2)
         }
-        InlineAsmRegClass::Avr(_) => unimplemented!(),
-        InlineAsmRegClass::Bpf(_) => unimplemented!(),
         InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => cx.type_i32(),
         InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => cx.type_i32(),
         InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => cx.type_f32(),
-        InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => cx.type_i32(),
-        InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => cx.type_i32(),
-        InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => cx.type_i32(),
-        InlineAsmRegClass::CSKY(CSKYInlineAsmRegClass::reg) => cx.type_i32(),
-        InlineAsmRegClass::CSKY(CSKYInlineAsmRegClass::freg) => cx.type_f32(),
         InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => cx.type_i32(),
         InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => cx.type_f32(),
-        InlineAsmRegClass::Msp430(_) => unimplemented!(),
         InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => cx.type_i16(),
         InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => cx.type_i32(),
         InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => cx.type_i64(),
@@ -735,26 +729,43 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
         }
         InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => cx.type_i32(),
         InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => cx.type_f32(),
-        InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => cx.type_f32(),
+        InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
+            unreachable!("clobber-only")
+        }
         InlineAsmRegClass::X86(X86InlineAsmRegClass::reg)
         | InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => cx.type_i32(),
         InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_byte) => cx.type_i8(),
-        InlineAsmRegClass::X86(X86InlineAsmRegClass::mmx_reg) => unimplemented!(),
         InlineAsmRegClass::X86(X86InlineAsmRegClass::xmm_reg)
         | InlineAsmRegClass::X86(X86InlineAsmRegClass::ymm_reg)
         | InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => cx.type_f32(),
-        InlineAsmRegClass::X86(X86InlineAsmRegClass::x87_reg) => unimplemented!(),
         InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => cx.type_i16(),
-        InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg0) => cx.type_i16(),
-        InlineAsmRegClass::X86(X86InlineAsmRegClass::tmm_reg) => unimplemented!(),
-        InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => cx.type_i32(),
-        InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
-            bug!("LLVM backend does not support SPIR-V")
+        InlineAsmRegClass::X86(X86InlineAsmRegClass::x87_reg)
+        | InlineAsmRegClass::X86(X86InlineAsmRegClass::mmx_reg)
+        | InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg0)
+        | InlineAsmRegClass::X86(X86InlineAsmRegClass::tmm_reg) => {
+            unreachable!("clobber-only")
         }
+        InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => cx.type_i32(),
+        InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => cx.type_i64(),
+        InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => cx.type_i32(),
+        InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg) => cx.type_i8(),
+        InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_upper) => cx.type_i8(),
+        InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair) => cx.type_i16(),
+        InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw) => cx.type_i16(),
+        InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => cx.type_i16(),
         InlineAsmRegClass::S390x(
             S390xInlineAsmRegClass::reg | S390xInlineAsmRegClass::reg_addr,
         ) => cx.type_i32(),
         InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(),
+        InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => cx.type_i16(),
+        InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => cx.type_i32(),
+        InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => cx.type_i32(),
+        InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => cx.type_i32(),
+        InlineAsmRegClass::CSKY(CSKYInlineAsmRegClass::reg) => cx.type_i32(),
+        InlineAsmRegClass::CSKY(CSKYInlineAsmRegClass::freg) => cx.type_f32(),
+        InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
+            bug!("GCC backend does not support SPIR-V")
+        }
         InlineAsmRegClass::Err => unreachable!(),
     }
 }

From 2a88451d6b35306ce870b6489e2cbdbad94975fc Mon Sep 17 00:00:00 2001
From: Shashank Trivedi <100513286+lordshashank@users.noreply.github.com>
Date: Mon, 25 Mar 2024 21:09:26 +0530
Subject: [PATCH 621/997] run-make tests initialized (#7)

---
 build_system/src/test.rs         | 355 +++++++++++++++++++------------
 tests/failing-run-make-tests.txt |  43 ++++
 tests/failing-ui-tests.txt       |   8 +
 3 files changed, 275 insertions(+), 131 deletions(-)
 create mode 100644 tests/failing-run-make-tests.txt

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 8ce615ff17a4..f1b7b8d19b6a 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -856,7 +856,12 @@ fn should_remove_test(file_path: &Path) -> Result<bool, String> {
     Ok(false)
 }
 
-fn test_rustc_inner<F>(env: &Env, args: &TestArg, prepare_files_callback: F) -> Result<(), String>
+fn test_rustc_inner<F>(
+    env: &Env,
+    args: &TestArg,
+    prepare_files_callback: F,
+    test_type: &str,
+) -> Result<(), String>
 where
     F: Fn(&Path) -> Result<bool, String>,
 {
@@ -865,111 +870,106 @@ where
     let mut env = env.clone();
     let rust_path = setup_rustc(&mut env, args)?;
 
-    walk_dir(
-        rust_path.join("tests/ui"),
-        |dir| {
-            let dir_name = dir.file_name().and_then(|name| name.to_str()).unwrap_or("");
-            if [
-                "abi",
-                "extern",
-                "unsized-locals",
-                "proc-macro",
-                "threads-sendsync",
-                "borrowck",
-                "test-attrs",
-            ]
-            .iter()
-            .any(|name| *name == dir_name)
-            {
-                std::fs::remove_dir_all(dir).map_err(|error| {
-                    format!("Failed to remove folder `{}`: {:?}", dir.display(), error)
-                })?;
-            }
-            Ok(())
-        },
-        |_| Ok(()),
-    )?;
-
-    // These two functions are used to remove files that are known to not be working currently
-    // with the GCC backend to reduce noise.
-    fn dir_handling(dir: &Path) -> Result<(), String> {
-        if dir.file_name().map(|name| name == "auxiliary").unwrap_or(true) {
-            return Ok(());
-        }
-        walk_dir(dir, dir_handling, file_handling)
-    }
-    fn file_handling(file_path: &Path) -> Result<(), String> {
-        if !file_path.extension().map(|extension| extension == "rs").unwrap_or(false) {
-            return Ok(());
-        }
-        let path_str = file_path.display().to_string().replace("\\", "/");
-        if should_not_remove_test(&path_str) {
-            return Ok(());
-        } else if should_remove_test(file_path)? {
-            return remove_file(&file_path);
-        }
-        Ok(())
-    }
-
-    remove_file(&rust_path.join("tests/ui/consts/const_cmp_type_id.rs"))?;
-    remove_file(&rust_path.join("tests/ui/consts/issue-73976-monomorphic.rs"))?;
-    // this test is oom-killed in the CI.
-    remove_file(&rust_path.join("tests/ui/consts/issue-miri-1910.rs"))?;
-    // Tests generating errors.
-    remove_file(&rust_path.join("tests/ui/consts/issue-94675.rs"))?;
-    remove_file(&rust_path.join("tests/ui/mir/mir_heavy_promoted.rs"))?;
-    remove_file(&rust_path.join("tests/ui/rfcs/rfc-2632-const-trait-impl/const-drop-fail.rs"))?;
-    remove_file(&rust_path.join("tests/ui/rfcs/rfc-2632-const-trait-impl/const-drop.rs"))?;
-
-    walk_dir(rust_path.join("tests/ui"), dir_handling, file_handling)?;
-
     if !prepare_files_callback(&rust_path)? {
         // FIXME: create a function "display_if_not_quiet" or something along the line.
-        println!("Keeping all UI tests");
+        println!("Keeping all {} tests", test_type);
     }
 
-    let nb_parts = args.nb_parts.unwrap_or(0);
-    if nb_parts > 0 {
-        let current_part = args.current_part.unwrap();
-        // FIXME: create a function "display_if_not_quiet" or something along the line.
-        println!("Splitting ui_test into {} parts (and running part {})", nb_parts, current_part);
-        let out = String::from_utf8(
-            run_command(
-                &[
-                    &"find",
-                    &"tests/ui",
-                    &"-type",
-                    &"f",
-                    &"-name",
-                    &"*.rs",
-                    &"-not",
-                    &"-path",
-                    &"*/auxiliary/*",
-                ],
-                Some(&rust_path),
-            )?
-            .stdout,
-        )
-        .map_err(|error| format!("Failed to retrieve output of find command: {:?}", error))?;
-        let mut files = out
-            .split('\n')
-            .map(|line| line.trim())
-            .filter(|line| !line.is_empty())
-            .collect::<Vec<_>>();
-        // To ensure it'll be always the same sub files, we sort the content.
-        files.sort();
-        // We increment the number of tests by one because if this is an odd number, we would skip
-        // one test.
-        let count = files.len() / nb_parts + 1;
-        let start = current_part * count;
-        // We remove the files we don't want to test.
-        for path in files.iter().skip(start).take(count) {
-            remove_file(&rust_path.join(path))?;
+    if test_type == "ui" {
+        walk_dir(
+            rust_path.join("tests/ui"),
+            |dir| {
+                let dir_name = dir.file_name().and_then(|name| name.to_str()).unwrap_or("");
+                if [
+                    "abi",
+                    "extern",
+                    "unsized-locals",
+                    "proc-macro",
+                    "threads-sendsync",
+                    "borrowck",
+                    "test-attrs",
+                ]
+                .iter()
+                .any(|name| *name == dir_name)
+                {
+                    std::fs::remove_dir_all(dir).map_err(|error| {
+                        format!("Failed to remove folder `{}`: {:?}", dir.display(), error)
+                    })?;
+                }
+                Ok(())
+            },
+            |_| Ok(()),
+        )?;
+
+        // These two functions are used to remove files that are known to not be working currently
+        // with the GCC backend to reduce noise.
+        fn dir_handling(dir: &Path) -> Result<(), String> {
+            if dir.file_name().map(|name| name == "auxiliary").unwrap_or(true) {
+                return Ok(());
+            }
+            walk_dir(dir, dir_handling, file_handling)
+        }
+        fn file_handling(file_path: &Path) -> Result<(), String> {
+            if !file_path.extension().map(|extension| extension == "rs").unwrap_or(false) {
+                return Ok(());
+            }
+            let path_str = file_path.display().to_string().replace("\\", "/");
+            if should_not_remove_test(&path_str) {
+                return Ok(());
+            } else if should_remove_test(file_path)? {
+                return remove_file(&file_path);
+            }
+            Ok(())
+        }
+
+        walk_dir(rust_path.join("tests/ui"), dir_handling, file_handling)?;
+
+        let nb_parts = args.nb_parts.unwrap_or(0);
+        if nb_parts > 0 {
+            let current_part = args.current_part.unwrap();
+            // FIXME: create a function "display_if_not_quiet" or something along the line.
+            println!(
+                "Splitting ui_test into {} parts (and running part {})",
+                nb_parts, current_part
+            );
+            let out = String::from_utf8(
+                run_command(
+                    &[
+                        &"find",
+                        &"tests/ui",
+                        &"-type",
+                        &"f",
+                        &"-name",
+                        &"*.rs",
+                        &"-not",
+                        &"-path",
+                        &"*/auxiliary/*",
+                    ],
+                    Some(&rust_path),
+                )?
+                .stdout,
+            )
+            .map_err(|error| format!("Failed to retrieve output of find command: {:?}", error))?;
+            let mut files = out
+                .split('\n')
+                .map(|line| line.trim())
+                .filter(|line| !line.is_empty())
+                .collect::<Vec<_>>();
+            // To ensure it'll be always the same sub files, we sort the content.
+            files.sort();
+            // We increment the number of tests by one because if this is an odd number, we would skip
+            // one test.
+            let count = files.len() / nb_parts + 1;
+            // We remove the files we don't want to test.
+            let start = current_part * count;
+            for path in files.iter().skip(start).take(count) {
+                remove_file(&rust_path.join(path))?;
+            }
         }
     }
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
-    println!("[TEST] rustc test suite");
+    println!("[TEST] rustc {} test suite", test_type);
     env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
 
     let extra =
@@ -984,6 +984,7 @@ where
     );
 
     env.get_mut("RUSTFLAGS").unwrap().clear();
+
     run_command_with_output_and_env(
         &[
             &"./x.py",
@@ -992,7 +993,7 @@ where
             &"always",
             &"--stage",
             &"0",
-            &"tests/ui",
+            &format!("tests/{}", test_type),
             &"--rustc-args",
             &rustc_args,
         ],
@@ -1003,54 +1004,146 @@ where
 }
 
 fn test_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    test_rustc_inner(env, args, |_| Ok(false))
+    test_rustc_inner(env, args, |_| Ok(false), "run-make")?;
+    test_rustc_inner(env, args, |_| Ok(false), "ui")
 }
 
 fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    test_rustc_inner(env, args, |rust_path| {
-        // Removing all tests.
-        run_command(
-            &[
-                &"find",
-                &"tests/ui",
-                &"-type",
-                &"f",
-                &"-name",
-                &"*.rs",
-                &"-not",
-                &"-path",
-                &"*/auxiliary/*",
-                &"-delete",
-            ],
-            Some(rust_path),
-        )?;
+    let result1 = test_rustc_inner(
+        env,
+        args,
+        prepare_files_callback_failing("tests/failing-run-make-tests.txt", "run-make"),
+        "run-make",
+    );
+
+    let result2 = test_rustc_inner(
+        env,
+        args,
+        prepare_files_callback_failing("tests/failing-ui-tests.txt", "ui"),
+        "ui",
+    );
+
+    result1.and(result2)
+}
+
+fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
+    test_rustc_inner(
+        env,
+        args,
+        prepare_files_callback_success("tests/failing-ui-tests.txt", "ui"),
+        "ui",
+    )?;
+    test_rustc_inner(
+        env,
+        args,
+        prepare_files_callback_success("tests/failing-run-make-tests.txt", "run-make"),
+        "run-make",
+    )
+}
+
+fn prepare_files_callback_failing<'a>(
+    file_path: &'a str,
+    test_type: &'a str,
+) -> impl Fn(&Path) -> Result<bool, String> + 'a {
+    move |rust_path| {
+        let files = std::fs::read_to_string(file_path).unwrap_or_default();
+        let first_file_name = files.lines().next().unwrap_or("");
+        // If the first line ends with a `/`, we treat all lines in the file as a directory.
+        if first_file_name.ends_with('/') {
+            // Treat as directory
+            // Removing all tests.
+            run_command(
+                &[
+                    &"find",
+                    &format!("tests/{}", test_type),
+                    &"-mindepth",
+                    &"1",
+                    &"-type",
+                    &"d",
+                    &"-exec",
+                    &"rm",
+                    &"-rf",
+                    &"{}",
+                    &"+",
+                ],
+                Some(rust_path),
+            )?;
+        } else {
+            // Treat as file
+            // Removing all tests.
+            run_command(
+                &[
+                    &"find",
+                    &format!("tests/{}", test_type),
+                    &"-type",
+                    &"f",
+                    &"-name",
+                    &"*.rs",
+                    &"-not",
+                    &"-path",
+                    &"*/auxiliary/*",
+                    &"-delete",
+                ],
+                Some(rust_path),
+            )?;
+        }
+
         // Putting back only the failing ones.
-        let path = "tests/failing-ui-tests.txt";
-        if let Ok(files) = std::fs::read_to_string(path) {
+        if let Ok(files) = std::fs::read_to_string(&file_path) {
             for file in files.split('\n').map(|line| line.trim()).filter(|line| !line.is_empty()) {
                 run_command(&[&"git", &"checkout", &"--", &file], Some(&rust_path))?;
             }
         } else {
-            println!("Failed to read `{}`, not putting back failing ui tests", path);
+            println!(
+                "Failed to read `{}`, not putting back failing {} tests",
+                file_path, test_type
+            );
         }
+
         Ok(true)
-    })
+    }
 }
 
-fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    test_rustc_inner(env, args, |rust_path| {
-        // Removing the failing tests.
-        let path = "tests/failing-ui-tests.txt";
-        if let Ok(files) = std::fs::read_to_string(path) {
-            for file in files.split('\n').map(|line| line.trim()).filter(|line| !line.is_empty()) {
-                let path = rust_path.join(file);
-                remove_file(&path)?;
+fn prepare_files_callback_success<'a>(
+    file_path: &'a str,
+    test_type: &'a str,
+) -> impl Fn(&Path) -> Result<bool, String> + 'a {
+    move |rust_path| {
+        let files = std::fs::read_to_string(file_path).unwrap_or_default();
+        let first_file_name = files.lines().next().unwrap_or("");
+        // If the first line ends with a `/`, we treat all lines in the file as a directory.
+        if first_file_name.ends_with('/') {
+            // Removing the failing tests.
+            if let Ok(files) = std::fs::read_to_string(file_path) {
+                for file in
+                    files.split('\n').map(|line| line.trim()).filter(|line| !line.is_empty())
+                {
+                    let path = rust_path.join(file);
+                    if let Err(e) = std::fs::remove_dir_all(&path) {
+                        println!("Failed to remove directory `{}`: {}", path.display(), e);
+                    }
+                }
+            } else {
+                println!(
+                    "Failed to read `{}`, not putting back failing {} tests",
+                    file_path, test_type
+                );
             }
         } else {
-            println!("Failed to read `{}`, not putting back failing ui tests", path);
+            // Removing the failing tests.
+            if let Ok(files) = std::fs::read_to_string(file_path) {
+                for file in
+                    files.split('\n').map(|line| line.trim()).filter(|line| !line.is_empty())
+                {
+                    let path = rust_path.join(file);
+                    remove_file(&path)?;
+                }
+            } else {
+                println!("Failed to read `{}`, not putting back failing ui tests", file_path);
+            }
         }
         Ok(true)
-    })
+    }
 }
 
 fn run_all(env: &Env, args: &TestArg) -> Result<(), String> {
diff --git a/tests/failing-run-make-tests.txt b/tests/failing-run-make-tests.txt
new file mode 100644
index 000000000000..058261a3ceea
--- /dev/null
+++ b/tests/failing-run-make-tests.txt
@@ -0,0 +1,43 @@
+tests/run-make/a-b-a-linker-guard/
+tests/run-make/CURRENT_RUSTC_VERSION/
+tests/run-make/cross-lang-lto/
+tests/run-make/cross-lang-lto-upstream-rlibs/
+tests/run-make/doctests-keep-binaries/
+tests/run-make/doctests-runtool/
+tests/run-make/emit-shared-files/
+tests/run-make/exit-code/
+tests/run-make/issue-22131/
+tests/run-make/issue-38237/
+tests/run-make/issue-64153/
+tests/run-make/llvm-ident/
+tests/run-make/native-link-modifier-bundle/
+tests/run-make/remap-path-prefix-dwarf/
+tests/run-make/repr128-dwarf/
+tests/run-make/rlib-format-packed-bundled-libs/
+tests/run-make/rlib-format-packed-bundled-libs-2/
+tests/run-make/rustdoc-determinism/
+tests/run-make/rustdoc-error-lines/
+tests/run-make/rustdoc-map-file/
+tests/run-make/rustdoc-output-path/
+tests/run-make/rustdoc-scrape-examples-invalid-expr/
+tests/run-make/rustdoc-scrape-examples-multiple/
+tests/run-make/rustdoc-scrape-examples-ordering/
+tests/run-make/rustdoc-scrape-examples-remap/
+tests/run-make/rustdoc-scrape-examples-test/
+tests/run-make/rustdoc-scrape-examples-whitespace/
+tests/run-make/rustdoc-scrape-examples-macros/
+tests/run-make/rustdoc-with-out-dir-option/
+tests/run-make/rustdoc-verify-output-files/
+tests/run-make/rustdoc-themes/
+tests/run-make/rustdoc-with-short-out-dir-option/
+tests/run-make/rustdoc-with-output-option/
+tests/run-make/arguments-non-c-like-enum/
+tests/run-make/c-link-to-rust-staticlib/
+tests/run-make/foreign-double-unwind/
+tests/run-make/foreign-exceptions/
+tests/run-make/glibc-staticlib-args/
+tests/run-make/issue-36710/
+tests/run-make/issue-68794-textrel-on-minimal-lib/
+tests/run-make/lto-smoke-c/
+tests/run-make/return-non-c-like-enum/
+
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index c39b89d884fb..0b749918a3a7 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -70,3 +70,11 @@ tests/ui/consts/try-operator.rs
 tests/ui/coroutine/unwind-abort-mix.rs
 tests/ui/type-alias-impl-trait/rpit_tait_equality_in_canonical_query.rs
 tests/ui/impl-trait/equality-in-canonical-query.rs
+tests/ui/consts/issue-miri-1910.rs
+tests/ui/mir/mir_heavy_promoted.rs
+tests/ui/consts/const_cmp_type_id.rs
+tests/ui/consts/issue-73976-monomorphic.rs
+tests/ui/consts/issue-94675.rs
+tests/ui/rfcs/rfc-2632-const-trait-impl/const-drop-fail.rs
+tests/ui/rfcs/rfc-2632-const-trait-impl/const-drop.rs
+

From 111b3395a8bdb52e78cef2b2a2e2c9ad6f06719c Mon Sep 17 00:00:00 2001
From: Robert Zakrzewski <zakrzewski.robert@gmail.com>
Date: Wed, 27 Mar 2024 22:37:19 +0100
Subject: [PATCH 622/997] Execute tests using a target defined as a JSON spec
 (#12)

---
 .github/workflows/m68k.yml               |  7 +++++++
 target_specs/m68k-unknown-linux-gnu.json | 26 ++++++++++++++++++++++++
 2 files changed, 33 insertions(+)
 create mode 100644 target_specs/m68k-unknown-linux-gnu.json

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index a8c6b614ce81..47a235b0218c 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -88,6 +88,13 @@ jobs:
         sudo mount debian-m68k.img vm
         sudo cp $(which qemu-m68k-static) vm/usr/bin/
 
+    - name: Build sample project with target defined as JSON spec
+      run: |
+        ./y.sh prepare --only-libcore --cross
+        ./y.sh build --target-triple m68k-unknown-linux-gnu --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
+        ./y.sh cargo build --manifest-path=./tests/hello-world/Cargo.toml --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
+        ./y.sh clean all
+
     - name: Build
       run: |
         ./y.sh prepare --only-libcore --cross
diff --git a/target_specs/m68k-unknown-linux-gnu.json b/target_specs/m68k-unknown-linux-gnu.json
new file mode 100644
index 000000000000..95ea06106fb1
--- /dev/null
+++ b/target_specs/m68k-unknown-linux-gnu.json
@@ -0,0 +1,26 @@
+{
+  "arch": "m68k",
+  "cpu": "M68020",
+  "crt-static-respected": true,
+  "data-layout": "E-m:e-p:32:16:32-i8:8:8-i16:16:16-i32:16:32-n8:16:32-a:0:16-S16",
+  "dynamic-linking": true,
+  "env": "gnu",
+  "has-rpath": true,
+  "has-thread-local": true,
+  "llvm-target": "m68k-unknown-linux-gnu",
+  "max-atomic-width": 32,
+  "os": "linux",
+  "position-independent-executables": true,
+  "relro-level": "full",
+  "supported-split-debuginfo": [
+    "packed",
+    "unpacked",
+    "off"
+  ],
+  "target-endian": "big",
+  "target-family": [
+    "unix"
+  ],
+  "target-mcount": "_mcount",
+  "target-pointer-width": "32"
+}

From 03f299bce00001fa0e1841af5db1c6fc5472a0b6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 30 Mar 2024 08:14:53 -0400
Subject: [PATCH 623/997] Fix VM artifact link

---
 .github/workflows/m68k.yml | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 47a235b0218c..25a5d2cf3d78 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -54,13 +54,7 @@ jobs:
       run: curl -LO https://github.com/cross-cg-gcc-tools/cross-gcc/releases/latest/download/gcc-m68k-13.deb
 
     - name: Download VM artifact
-      uses: dawidd6/action-download-artifact@v2
-      with:
-          workflow: m68k.yml
-          name: debian-m68k
-          repo: cross-cg-gcc-tools/vms
-          branch: master
-          event: push
+      run: curl -LO https://github.com/cross-cg-gcc-tools/vms/releases/latest/download/debian-m68k.img
 
     - name: Setup path to libgccjit
       run: |

From 92be47bef5e1f35cd84097f4bca5170e9d05dbcd Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 30 Mar 2024 08:16:03 -0400
Subject: [PATCH 624/997] Add back y.sh to run stdarch tests

---
 .github/workflows/stdarch.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index dc52c94376c5..e285e9119f70 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -89,10 +89,10 @@ jobs:
     - name: Run stdarch tests
       if: ${{ !matrix.cargo_runner }}
       run: |
-        CHANNEL=release TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml
+        CHANNEL=release TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml
 
     - name: Run stdarch tests
       if: ${{ matrix.cargo_runner }}
       run: |
         # FIXME: these tests fail when the sysroot is compiled with LTO because of a missing symbol in proc-macro.
-        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a
+        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a

From c7ac792687283b8c48fae679bc8cf65387181fa4 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 30 Mar 2024 08:18:56 -0400
Subject: [PATCH 625/997] Add newlines

---
 tests/hello-world/Cargo.toml  | 2 +-
 tests/hello-world/src/main.rs | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/hello-world/Cargo.toml b/tests/hello-world/Cargo.toml
index a3b6813443f7..0b8cdc63fbe8 100644
--- a/tests/hello-world/Cargo.toml
+++ b/tests/hello-world/Cargo.toml
@@ -1,4 +1,4 @@
 [package]
 name = "hello_world"
 
-[dependencies]
\ No newline at end of file
+[dependencies]
diff --git a/tests/hello-world/src/main.rs b/tests/hello-world/src/main.rs
index fbedd9205254..e7a11a969c03 100644
--- a/tests/hello-world/src/main.rs
+++ b/tests/hello-world/src/main.rs
@@ -1,3 +1,3 @@
 fn main() {
     println!("Hello, world!");
-}
\ No newline at end of file
+}

From 5eb8d854d12573a841fd5dba71578656aa69f830 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 5 Apr 2024 17:18:55 +0200
Subject: [PATCH 626/997] Rename `cargo.rs` into `rust_tools.rs` to prepare the
 addition of the `rustc` command

---
 build_system/src/main.rs                     |  4 ++--
 build_system/src/{cargo.rs => rust_tools.rs} | 20 ++++++++++++--------
 2 files changed, 14 insertions(+), 10 deletions(-)
 rename build_system/src/{cargo.rs => rust_tools.rs} (89%)

diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index 48ffbc7a9075..99d466f2b86d 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -2,12 +2,12 @@ use std::env;
 use std::process;
 
 mod build;
-mod cargo;
 mod clean;
 mod clone_gcc;
 mod config;
 mod info;
 mod prepare;
+mod rust_tools;
 mod rustc_info;
 mod test;
 mod utils;
@@ -75,7 +75,7 @@ fn main() {
     };
 
     if let Err(e) = match command {
-        Command::Cargo => cargo::run(),
+        Command::Cargo => rust_tools::run_cargo(),
         Command::Clean => clean::run(),
         Command::Prepare => prepare::run(),
         Command::Build => build::run(),
diff --git a/build_system/src/cargo.rs b/build_system/src/rust_tools.rs
similarity index 89%
rename from build_system/src/cargo.rs
rename to build_system/src/rust_tools.rs
index e4ea79b06f22..80885d0c6c70 100644
--- a/build_system/src/cargo.rs
+++ b/build_system/src/rust_tools.rs
@@ -8,32 +8,36 @@ use std::collections::HashMap;
 use std::ffi::OsStr;
 use std::path::PathBuf;
 
-fn args() -> Result<Option<Vec<String>>, String> {
+fn args(command: &str) -> Result<Option<Vec<String>>, String> {
     // We skip the binary and the "cargo" option.
     if let Some("--help") = std::env::args().skip(2).next().as_deref() {
-        usage();
+        usage(command);
         return Ok(None);
     }
     let args = std::env::args().skip(2).collect::<Vec<_>>();
     if args.is_empty() {
-        return Err("Expected at least one argument for `cargo` subcommand, found none".to_string());
+        return Err(format!(
+            "Expected at least one argument for `{}` subcommand, found none",
+            command
+        ));
     }
     Ok(Some(args))
 }
 
-fn usage() {
+fn usage(command: &str) {
     println!(
         r#"
-`cargo` command help:
+`{}` command help:
 
     [args]     : Arguments to be passed to the cargo command
     --help     : Show this help
-"#
+"#,
+        command,
     )
 }
 
-pub fn run() -> Result<(), String> {
-    let args = match args()? {
+pub fn run_cargo() -> Result<(), String> {
+    let args = match args("cargo")? {
         Some(a) => a,
         None => return Ok(()),
     };

From 00ad2634d5ec8f718db5ea1520b6de2375ecf237 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 5 Apr 2024 17:32:19 +0200
Subject: [PATCH 627/997] Add `rustc` command to build system

---
 build_system/src/main.rs       |   4 +
 build_system/src/rust_tools.rs | 130 +++++++++++++++++++--------------
 2 files changed, 81 insertions(+), 53 deletions(-)

diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index 99d466f2b86d..1bfba0f9828e 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -29,6 +29,7 @@ fn usage() {
 Available commands for build_system:
 
     cargo     : Run cargo command
+    rustc     : Run rustc command
     clean     : Run clean command
     prepare   : Run prepare command
     build     : Run build command
@@ -45,6 +46,7 @@ pub enum Command {
     CloneGcc,
     Prepare,
     Build,
+    Rustc,
     Test,
     Info,
 }
@@ -56,6 +58,7 @@ fn main() {
 
     let command = match env::args().nth(1).as_deref() {
         Some("cargo") => Command::Cargo,
+        Some("rustc") => Command::Rustc,
         Some("clean") => Command::Clean,
         Some("prepare") => Command::Prepare,
         Some("build") => Command::Build,
@@ -76,6 +79,7 @@ fn main() {
 
     if let Err(e) = match command {
         Command::Cargo => rust_tools::run_cargo(),
+        Command::Rustc => rust_tools::run_rustc(),
         Command::Clean => clean::run(),
         Command::Prepare => prepare::run(),
         Command::Build => build::run(),
diff --git a/build_system/src/rust_tools.rs b/build_system/src/rust_tools.rs
index 80885d0c6c70..242fa7ef9498 100644
--- a/build_system/src/rust_tools.rs
+++ b/build_system/src/rust_tools.rs
@@ -9,7 +9,7 @@ use std::ffi::OsStr;
 use std::path::PathBuf;
 
 fn args(command: &str) -> Result<Option<Vec<String>>, String> {
-    // We skip the binary and the "cargo" option.
+    // We skip the binary and the "cargo"/"rustc" option.
     if let Some("--help") = std::env::args().skip(2).next().as_deref() {
         usage(command);
         return Ok(None);
@@ -36,66 +36,90 @@ fn usage(command: &str) {
     )
 }
 
-pub fn run_cargo() -> Result<(), String> {
-    let args = match args("cargo")? {
-        Some(a) => a,
-        None => return Ok(()),
-    };
+struct RustcTools {
+    env: HashMap<String, String>,
+    args: Vec<String>,
+    toolchain: String,
+    config: ConfigInfo,
+}
 
-    // We first need to go to the original location to ensure that the config setup will go as
-    // expected.
-    let current_dir = std::env::current_dir()
-        .and_then(|path| path.canonicalize())
-        .map_err(|error| format!("Failed to get current directory path: {:?}", error))?;
-    let current_exe = std::env::current_exe()
-        .and_then(|path| path.canonicalize())
-        .map_err(|error| format!("Failed to get current exe path: {:?}", error))?;
-    let mut parent_dir = current_exe.components().map(|comp| comp.as_os_str()).collect::<Vec<_>>();
-    // We run this script from "build_system/target/release/y", so we need to remove these elements.
-    for to_remove in &["y", "release", "target", "build_system"] {
-        if parent_dir.last().map(|part| part == to_remove).unwrap_or(false) {
-            parent_dir.pop();
-        } else {
-            return Err(format!(
-                "Build script not executed from `build_system/target/release/y` (in path {})",
-                current_exe.display(),
-            ));
+impl RustcTools {
+    fn new(command: &str) -> Result<Option<Self>, String> {
+        let Some(args) = args(command)? else { return Ok(None) };
+
+        // We first need to go to the original location to ensure that the config setup will go as
+        // expected.
+        let current_dir = std::env::current_dir()
+            .and_then(|path| path.canonicalize())
+            .map_err(|error| format!("Failed to get current directory path: {:?}", error))?;
+        let current_exe = std::env::current_exe()
+            .and_then(|path| path.canonicalize())
+            .map_err(|error| format!("Failed to get current exe path: {:?}", error))?;
+        let mut parent_dir =
+            current_exe.components().map(|comp| comp.as_os_str()).collect::<Vec<_>>();
+        // We run this script from "build_system/target/release/y", so we need to remove these elements.
+        for to_remove in &["y", "release", "target", "build_system"] {
+            if parent_dir.last().map(|part| part == to_remove).unwrap_or(false) {
+                parent_dir.pop();
+            } else {
+                return Err(format!(
+                    "Build script not executed from `build_system/target/release/y` (in path {})",
+                    current_exe.display(),
+                ));
+            }
         }
+        let parent_dir = PathBuf::from(parent_dir.join(&OsStr::new("/")));
+        std::env::set_current_dir(&parent_dir).map_err(|error| {
+            format!("Failed to go to `{}` folder: {:?}", parent_dir.display(), error)
+        })?;
+
+        let mut env: HashMap<String, String> = std::env::vars().collect();
+        let mut config = ConfigInfo::default();
+        config.setup(&mut env, false)?;
+        let toolchain = get_toolchain()?;
+
+        let toolchain_version = rustc_toolchain_version_info(&toolchain)?;
+        let default_version = rustc_version_info(None)?;
+        if toolchain_version != default_version {
+            println!(
+                "rustc_codegen_gcc is built for {} but the default rustc version is {}.",
+                toolchain_version.short, default_version.short,
+            );
+            println!("Using {}.", toolchain_version.short);
+        }
+
+        // We go back to the original folder since we now have set up everything we needed.
+        std::env::set_current_dir(&current_dir).map_err(|error| {
+            format!("Failed to go back to `{}` folder: {:?}", current_dir.display(), error)
+        })?;
+        let toolchain = format!("+{}", toolchain);
+        Ok(Some(Self { toolchain, args, env, config }))
     }
-    let parent_dir = PathBuf::from(parent_dir.join(&OsStr::new("/")));
-    std::env::set_current_dir(&parent_dir).map_err(|error| {
-        format!("Failed to go to `{}` folder: {:?}", parent_dir.display(), error)
-    })?;
+}
 
-    let mut env: HashMap<String, String> = std::env::vars().collect();
-    ConfigInfo::default().setup(&mut env, false)?;
-    let toolchain = get_toolchain()?;
-
-    let toolchain_version = rustc_toolchain_version_info(&toolchain)?;
-    let default_version = rustc_version_info(None)?;
-    if toolchain_version != default_version {
-        println!(
-            "rustc_codegen_gcc is built for {} but the default rustc version is {}.",
-            toolchain_version.short, default_version.short,
-        );
-        println!("Using {}.", toolchain_version.short);
-    }
-
-    // We go back to the original folder since we now have set up everything we needed.
-    std::env::set_current_dir(&current_dir).map_err(|error| {
-        format!("Failed to go back to `{}` folder: {:?}", current_dir.display(), error)
-    })?;
-
-    let rustflags = env.get("RUSTFLAGS").cloned().unwrap_or_default();
-    env.insert("RUSTDOCFLAGS".to_string(), rustflags);
-    let toolchain = format!("+{}", toolchain);
-    let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &toolchain];
-    for arg in &args {
+pub fn run_cargo() -> Result<(), String> {
+    let Some(mut tools) = RustcTools::new("cargo")? else { return Ok(()) };
+    let rustflags = tools.env.get("RUSTFLAGS").cloned().unwrap_or_default();
+    tools.env.insert("RUSTDOCFLAGS".to_string(), rustflags);
+    let mut command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &tools.toolchain];
+    for arg in &tools.args {
         command.push(arg);
     }
-    if run_command_with_output_and_env_no_err(&command, None, Some(&env)).is_err() {
+    if run_command_with_output_and_env_no_err(&command, None, Some(&tools.env)).is_err() {
         std::process::exit(1);
     }
 
     Ok(())
 }
+
+pub fn run_rustc() -> Result<(), String> {
+    let Some(tools) = RustcTools::new("rustc")? else { return Ok(()) };
+    let mut command = tools.config.rustc_command_vec();
+    for arg in &tools.args {
+        command.push(arg);
+    }
+    if run_command_with_output_and_env_no_err(&command, None, Some(&tools.env)).is_err() {
+        std::process::exit(1);
+    }
+    Ok(())
+}

From 2a991102977fd6f51d16612e10bd82d74b932e9a Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 5 Apr 2024 17:35:41 +0200
Subject: [PATCH 628/997] Update documentation to recommend using `y.sh rustc`
 instead of `rustc` and all its flags

---
 Readme.md | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Readme.md b/Readme.md
index da6e91587fda..929160799592 100644
--- a/Readme.md
+++ b/Readme.md
@@ -118,7 +118,13 @@ error: failed to copy bitcode to object file: No such file or directory (os erro
 
 ### Rustc
 
-> You should prefer using the Cargo method.
+If you want to run `rustc` directly, you can do so with:
+
+```bash
+$ ./y.sh rustc my_crate.rs
+```
+
+You can do the same manually (although we don't recommend it):
 
 ```bash
 $ LIBRARY_PATH="[gcc-path value]" LD_LIBRARY_PATH="[gcc-path value]" rustc +$(cat $CG_GCCJIT_DIR/rust-toolchain | grep 'channel' | cut -d '=' -f 2 | sed 's/"//g' | sed 's/ //g') -Cpanic=abort -Zcodegen-backend=$CG_GCCJIT_DIR/target/release/librustc_codegen_gcc.so --sysroot $CG_GCCJIT_DIR/build_sysroot/sysroot my_crate.rs

From 86921925823fabe1f58f4c40350761043037eb97 Mon Sep 17 00:00:00 2001
From: Shashank Trivedi <100513286+lordshashank@users.noreply.github.com>
Date: Wed, 10 Apr 2024 17:53:51 +0530
Subject: [PATCH 629/997] build sysroot flag (#16)

---
 .github/workflows/ci.yml      |  2 +-
 .github/workflows/gcc12.yml   |  2 +-
 .github/workflows/m68k.yml    |  4 ++--
 .github/workflows/release.yml |  2 +-
 .github/workflows/stdarch.yml |  2 +-
 Readme.md                     |  2 +-
 build_system/src/build.rs     | 14 ++++++++++----
 doc/tips.md                   |  4 ++--
 8 files changed, 19 insertions(+), 13 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index eca08c7d7499..69a0707c1f2a 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -78,7 +78,7 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        ./y.sh build
+        ./y.sh build --sysroot
         cargo test
 
     - name: Run y.sh cargo build
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index f7bb15604923..44dca6be6a19 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -67,7 +67,7 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore --libgccjit12-patches
-        ./y.sh build --no-default-features --sysroot-panic-abort
+        ./y.sh build --sysroot --no-default-features --sysroot-panic-abort
         cargo test --no-default-features
         ./y.sh clean all
 
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 25a5d2cf3d78..34e4f2b0d412 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -85,14 +85,14 @@ jobs:
     - name: Build sample project with target defined as JSON spec
       run: |
         ./y.sh prepare --only-libcore --cross
-        ./y.sh build --target-triple m68k-unknown-linux-gnu --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
+        ./y.sh build --sysroot --target-triple m68k-unknown-linux-gnu --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
         ./y.sh cargo build --manifest-path=./tests/hello-world/Cargo.toml --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
         ./y.sh clean all
 
     - name: Build
       run: |
         ./y.sh prepare --only-libcore --cross
-        ./y.sh build --target-triple m68k-unknown-linux-gnu
+        ./y.sh build --sysroot --target-triple m68k-unknown-linux-gnu
         CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu cargo test
         ./y.sh clean all
 
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 60a71d7d3dd7..84394b2957c4 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -53,7 +53,7 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        EMBED_LTO_BITCODE=1 ./y.sh build --release --release-sysroot
+        EMBED_LTO_BITCODE=1 ./y.sh build --sysroot --release --release-sysroot
         cargo test
         ./y.sh clean all
 
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index e285e9119f70..20341ae53d7e 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -58,7 +58,7 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        ./y.sh build --release --release-sysroot
+        ./y.sh build --sysroot --release --release-sysroot
 
     - name: Set env (part 2)
       run: |
diff --git a/Readme.md b/Readme.md
index 929160799592..159997701450 100644
--- a/Readme.md
+++ b/Readme.md
@@ -80,7 +80,7 @@ Then you can run commands like this:
 
 ```bash
 $ ./y.sh prepare # download and patch sysroot src and install hyperfine for benchmarking
-$ ./y.sh build --release
+$ ./y.sh build --sysroot --release
 ```
 
 To run the tests:
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 6313e4ffccb9..ae2ad1a19a9b 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -11,6 +11,7 @@ use std::path::Path;
 struct BuildArg {
     flags: Vec<String>,
     config_info: ConfigInfo,
+    build_sysroot: bool,
 }
 
 impl BuildArg {
@@ -31,6 +32,9 @@ impl BuildArg {
                         );
                     }
                 }
+                "--sysroot" => {
+                    build_arg.build_sysroot = true;
+                }
                 "--help" => {
                     Self::usage();
                     return Ok(None);
@@ -50,7 +54,8 @@ impl BuildArg {
             r#"
 `build` command help:
 
-    --features [arg]       : Add a new feature [arg]"#
+    --features [arg]       : Add a new feature [arg]
+    --sysroot              : Build with sysroot"#
         );
         ConfigInfo::show_usage();
         println!("    --help                 : Show this help");
@@ -205,9 +210,10 @@ fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     let _ = fs::remove_dir_all("target/out");
     let gccjit_target = "target/out/gccjit";
     create_dir(gccjit_target)?;
-
-    println!("[BUILD] sysroot");
-    build_sysroot(&env, &args.config_info)?;
+    if args.build_sysroot {
+        println!("[BUILD] sysroot");
+        build_sysroot(&env, &args.config_info)?;
+    }
     Ok(())
 }
 
diff --git a/doc/tips.md b/doc/tips.md
index 1379f5130be0..6cc81871d026 100644
--- a/doc/tips.md
+++ b/doc/tips.md
@@ -54,13 +54,13 @@ generate it in [gimple.md](./doc/gimple.md).
 
  * Run `./y.sh prepare --cross` so that the sysroot is patched for the cross-compiling case.
  * Set the path to the cross-compiling libgccjit in `gcc-path` (in `config.toml`).
- * Make sure you have the linker for your target (for instance `m68k-unknown-linux-gnu-gcc`) in your `$PATH`. Currently, the linker name is hardcoded as being `$TARGET-gcc`. Specify the target when building the sysroot: `./y.sh build --target-triple m68k-unknown-linux-gnu`.
+ * Make sure you have the linker for your target (for instance `m68k-unknown-linux-gnu-gcc`) in your `$PATH`. Currently, the linker name is hardcoded as being `$TARGET-gcc`. Specify the target when building the sysroot: `./y.sh build --sysroot --target-triple m68k-unknown-linux-gnu`.
  * Build your project by specifying the target: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../y.sh cargo build --target m68k-unknown-linux-gnu`.
 
 If the target is not yet supported by the Rust compiler, create a [target specification file](https://docs.rust-embedded.org/embedonomicon/custom-target.html) (note that the `arch` specified in this file must be supported by the rust compiler).
 Then, you can use it the following way:
 
- * Add the target specification file using `--target` as an **absolute** path to build the sysroot: `./y.sh build --target-triple m68k-unknown-linux-gnu --target $(pwd)/m68k-unknown-linux-gnu.json`
+ * Add the target specification file using `--target` as an **absolute** path to build the sysroot: `./y.sh build --sysroot --target-triple m68k-unknown-linux-gnu --target $(pwd)/m68k-unknown-linux-gnu.json`
  * Build your project by specifying the target specification file: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../y.sh cargo build --target path/to/m68k-unknown-linux-gnu.json`.
 
 If you get the following error:

From a3cd6e7a31bee1e807855a64052dc2b9a0e71f40 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 13 Apr 2024 21:31:57 +0200
Subject: [PATCH 630/997] Default to `download-gccjit` instead of `gcc-path`

---
 config.example.toml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/config.example.toml b/config.example.toml
index dcc414b73100..890387dc2426 100644
--- a/config.example.toml
+++ b/config.example.toml
@@ -1,2 +1,2 @@
-gcc-path = "gcc-build/gcc"
-# download-gccjit = true
+#gcc-path = "gcc-build/gcc"
+download-gccjit = true

From 5584f5f1a22aceb3d686cfa1165c6d160c994586 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E3=82=A2=E3=83=AC=E3=83=BC=E3=82=AF?= <g4titan1@gmail.com>
Date: Tue, 16 Apr 2024 22:59:47 +0100
Subject: [PATCH 631/997] updated build system script commands (#490)

updated build system script commands
---
 build_system/src/build.rs |  4 +++-
 build_system/src/main.rs  | 25 +++++++++++++++----------
 2 files changed, 18 insertions(+), 11 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 6313e4ffccb9..92f4b890e348 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -14,9 +14,10 @@ struct BuildArg {
 }
 
 impl BuildArg {
+    /// Creates a new `BuildArg` instance by parsing command-line arguments.
     fn new() -> Result<Option<Self>, String> {
         let mut build_arg = Self::default();
-        // We skip binary name and the `build` command.
+        // Skip binary name and the `build` command.
         let mut args = std::env::args().skip(2);
 
         while let Some(arg) = args.next() {
@@ -211,6 +212,7 @@ fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     Ok(())
 }
 
+/// Executes the build process.
 pub fn run() -> Result<(), String> {
     let mut args = match BuildArg::new()? {
         Some(args) => args,
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index 1bfba0f9828e..9a30490f6215 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -26,17 +26,22 @@ macro_rules! arg_error {
 fn usage() {
     println!(
         "\
-Available commands for build_system:
+rustc_codegen_gcc build system
 
-    cargo     : Run cargo command
-    rustc     : Run rustc command
-    clean     : Run clean command
-    prepare   : Run prepare command
-    build     : Run build command
-    test      : Run test command
-    info      : Run info command
-    clone-gcc : Run clone-gcc command
-    --help    : Show this message"
+Usage: build_system [command] [options]
+
+Options:
+        --help    : Displays this help message.
+
+Commands:
+        cargo     : Executes a cargo command. 
+        rustc     : Compiles the program using the GCC compiler.
+        clean     : Cleans the build directory, removing all compiled files and artifacts.
+        prepare   : Prepares the environment for building, including fetching dependencies and setting up configurations.
+        build     : Compiles the project. 
+        test      : Runs tests for the project.
+        info      : Displays information about the build environment and project configuration.
+        clone-gcc : Clones the GCC compiler from a specified source."
     );
 }
 

From 50a0d5b8166f927142288ba0ce5ca0bbe250923a Mon Sep 17 00:00:00 2001
From: darc <darcagn@protonmail.com>
Date: Wed, 17 Apr 2024 10:02:10 -0500
Subject: [PATCH 632/997] Fix passing custom CG_RUSTFLAGS when building sysroot

---
 build_system/src/build.rs | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 2ae325c6c006..a17adb3cd06a 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -153,6 +153,11 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         "debug"
     };
 
+    if let Ok(cg_rustflags) = std::env::var("CG_RUSTFLAGS") {
+        rustflags.push(' ');
+        rustflags.push_str(&cg_rustflags);
+    }
+
     let mut env = env.clone();
     env.insert("RUSTFLAGS".to_string(), rustflags);
     run_command_with_output_and_env(&args, Some(&start_dir), Some(&env))?;

From 6e5395a4147f50c95b3f5952fcb62648a124cb88 Mon Sep 17 00:00:00 2001
From: Gerson <71728860+Gerson2102@users.noreply.github.com>
Date: Wed, 17 Apr 2024 09:31:18 -0600
Subject: [PATCH 633/997] Updating readme instructions (#489)

---
 Readme.md | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/Readme.md b/Readme.md
index 159997701450..607a16cc2097 100644
--- a/Readme.md
+++ b/Readme.md
@@ -12,6 +12,10 @@ This is a GCC codegen for rustc, which means it can be loaded by the existing ru
 The primary goal of this project is to be able to compile Rust code on platforms unsupported by LLVM.
 A secondary goal is to check if using the gcc backend will provide any run-time speed improvement for the programs compiled using rustc.
 
+### Dependencies
+
+**rustup:** Follow the instructions on the official [website](https://www.rust-lang.org/tools/install)
+
 ## Building
 
 **This requires a patched libgccjit in order to work.
@@ -91,10 +95,16 @@ $ ./y.sh test --release
 
 ## Usage
 
-`$CG_GCCJIT_DIR` is the directory you cloned this repo into in the following instructions:
+You have to run these commands, in the corresponding order:
 
 ```bash
-export CG_GCCJIT_DIR=[the full path to rustc_codegen_gcc]
+$ ./y.sh prepare
+$ ./y.sh build --sysroot
+```
+To check if all is  working correctly, run:
+
+ ```bash
+$ ./y.sh cargo build --manifest-path tests/hello-world/Cargo.toml
 ```
 
 ### Cargo

From 7cd561efd6e8097bb9075dbf05a2cd8d37696cb8 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 19 Apr 2024 20:55:59 -0400
Subject: [PATCH 634/997] Fix check for main function already declared

---
 src/context.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/context.rs b/src/context.rs
index 1b9cfd3652c8..d37fa7833fcc 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -526,7 +526,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
     fn declare_c_main(&self, fn_type: Self::Type) -> Option<Self::Function> {
         let entry_name = self.sess().target.entry_name.as_ref();
-        if self.get_declared_value(entry_name).is_none() {
+        if !self.functions.borrow().contains_key(entry_name) {
             Some(self.declare_entry_fn(entry_name, fn_type, ()))
         } else {
             // If the symbol already exists, it is an error: for example, the user wrote

From 9b628f8e82dfb02bf6870624eb4acdca7a20947e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 19 Apr 2024 20:57:40 -0400
Subject: [PATCH 635/997] Fix panic when calling get_fn for a variable

---
 src/context.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/context.rs b/src/context.rs
index 1b9cfd3652c8..d04c7532b3cc 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -432,6 +432,8 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
         let func = if self.intrinsics.borrow().contains_key(func_name) {
             self.intrinsics.borrow()[func_name]
+        } else if let Some(variable) = self.get_declared_value(func_name) {
+            return variable;
         } else {
             get_fn(self, instance)
         };

From 89ee0f997c8c30081e819e9b101d54befb038163 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 19 Apr 2024 20:58:35 -0400
Subject: [PATCH 636/997] Implement more type kinds

---
 src/type_.rs               | 12 +++++++++++-
 tests/failing-ui-tests.txt |  1 -
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/src/type_.rs b/src/type_.rs
index 8fe3328ec55f..d0d3c21f0cf0 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -170,9 +170,19 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
             TypeKind::Double
         } else if typ.is_vector() {
             TypeKind::Vector
+        } else if typ.get_pointee().is_some() {
+            TypeKind::Pointer
+        } else if typ.dyncast_array().is_some() {
+            TypeKind::Array
+        } else if typ.is_struct().is_some() {
+            TypeKind::Struct
+        } else if typ.dyncast_function_ptr_type().is_some() {
+            TypeKind::Function
+        } else if typ == self.type_void() {
+            TypeKind::Void
         } else {
             // TODO(antoyo): support other types.
-            TypeKind::Void
+            unimplemented!();
         }
     }
 
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 0b749918a3a7..5df9381ecc77 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -36,7 +36,6 @@ tests/ui/parser/unclosed-delimiter-in-dep.rs
 tests/ui/simd/intrinsic/ptr-cast.rs
 tests/ui/consts/missing_span_in_backtrace.rs
 tests/ui/drop/dynamic-drop.rs
-tests/ui/dyn-star/box.rs
 tests/ui/issues/issue-40883.rs
 tests/ui/issues/issue-43853.rs
 tests/ui/issues/issue-47364.rs

From f9a0c3fb0f6e555358236affbd969a35dbe28ac9 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 19 Apr 2024 20:56:23 -0400
Subject: [PATCH 637/997] Fix PassMode::Indirect with params

---
 src/abi.rs                 | 15 ++++++++++++---
 tests/failing-ui-tests.txt |  2 --
 2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index b098594dbcc3..166dd080cf20 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -4,6 +4,7 @@ use gccjit::{ToLValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{AbiBuilderMethods, BaseTypeMethods};
 use rustc_data_structures::fx::FxHashSet;
 use rustc_middle::bug;
+use rustc_middle::ty::layout::LayoutOf;
 use rustc_middle::ty::Ty;
 #[cfg(feature = "master")]
 use rustc_session::config;
@@ -184,9 +185,17 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
                 }
                 PassMode::Indirect { attrs, meta_attrs: Some(meta_attrs), on_stack } => {
                     assert!(!on_stack);
-                    let ty =
-                        apply_attrs(cx.type_ptr_to(arg.memory_ty(cx)), &attrs, argument_tys.len());
-                    apply_attrs(ty, &meta_attrs, argument_tys.len())
+                    // Construct the type of a (wide) pointer to `ty`, and pass its two fields.
+                    // Any two ABI-compatible unsized types have the same metadata type and
+                    // moreover the same metadata value leads to the same dynamic size and
+                    // alignment, so this respects ABI compatibility.
+                    let ptr_ty = Ty::new_mut_ptr(cx.tcx, arg.layout.ty);
+                    let ptr_layout = cx.layout_of(ptr_ty);
+                    let typ1 = ptr_layout.scalar_pair_element_gcc_type(cx, 0);
+                    let typ2 = ptr_layout.scalar_pair_element_gcc_type(cx, 1);
+                    argument_tys.push(apply_attrs(typ1, &attrs, argument_tys.len()));
+                    argument_tys.push(apply_attrs(typ2, &meta_attrs, argument_tys.len()));
+                    continue;
                 }
             };
             argument_tys.push(arg_ty);
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 0b749918a3a7..31d742183b4f 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -50,7 +50,6 @@ tests/ui/coroutine/panic-safe.rs
 tests/ui/issues/issue-14875.rs
 tests/ui/issues/issue-29948.rs
 tests/ui/panics/nested_panic_caught.rs
-tests/ui/const_prop/ice-issue-111353.rs
 tests/ui/process/println-with-broken-pipe.rs
 tests/ui/lto/thin-lto-inlines2.rs
 tests/ui/lto/weak-works.rs
@@ -61,7 +60,6 @@ tests/ui/lto/msvc-imp-present.rs
 tests/ui/lto/lto-thin-rustc-loads-linker-plugin.rs
 tests/ui/lto/all-crates.rs
 tests/ui/async-await/deep-futures-are-freeze.rs
-tests/ui/closures/capture-unsized-by-ref.rs
 tests/ui/coroutine/resume-after-return.rs
 tests/ui/simd/masked-load-store.rs
 tests/ui/simd/repr_packed.rs

From 04932ea22f51c6b4ed31463a5a6f4243f6b1b1e7 Mon Sep 17 00:00:00 2001
From: darc <darcagn@protonmail.com>
Date: Wed, 17 Apr 2024 15:21:55 -0500
Subject: [PATCH 638/997] Modify build_system's prepare stage to allow for
 custom sysroot source path

---
 build_system/src/prepare.rs | 66 +++++++++++++++++++++++++++----------
 doc/tips.md                 |  8 +++++
 2 files changed, 56 insertions(+), 18 deletions(-)

diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 9f405daa6876..a085d8636167 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -5,29 +5,41 @@ use crate::utils::{
 };
 
 use std::fs;
-use std::path::Path;
+use std::path::{Path, PathBuf};
 
 fn prepare_libcore(
     sysroot_path: &Path,
     libgccjit12_patches: bool,
     cross_compile: bool,
+    sysroot_source: Option<String>,
 ) -> Result<(), String> {
-    let rustc_path = match get_rustc_path() {
-        Some(path) => path,
-        None => return Err("`rustc` path not found".to_string()),
-    };
+    let rustlib_dir: PathBuf;
 
-    let parent = match rustc_path.parent() {
-        Some(path) => path,
-        None => return Err(format!("No parent for `{}`", rustc_path.display())),
-    };
+    if let Some(path) = sysroot_source {
+        rustlib_dir = Path::new(&path)
+            .canonicalize()
+            .map_err(|error| format!("Failed to canonicalize path: {:?}", error))?;
+        if !rustlib_dir.is_dir() {
+            return Err(format!("Custom sysroot path {:?} not found", rustlib_dir));
+        }
+    } else {
+        let rustc_path = match get_rustc_path() {
+            Some(path) => path,
+            None => return Err("`rustc` path not found".to_string()),
+        };
 
-    let rustlib_dir = parent
-        .join("../lib/rustlib/src/rust")
-        .canonicalize()
-        .map_err(|error| format!("Failed to canonicalize path: {:?}", error))?;
-    if !rustlib_dir.is_dir() {
-        return Err("Please install `rust-src` component".to_string());
+        let parent = match rustc_path.parent() {
+            Some(path) => path,
+            None => return Err(format!("No parent for `{}`", rustc_path.display())),
+        };
+
+        rustlib_dir = parent
+            .join("../lib/rustlib/src/rust")
+            .canonicalize()
+            .map_err(|error| format!("Failed to canonicalize path: {:?}", error))?;
+        if !rustlib_dir.is_dir() {
+            return Err("Please install `rust-src` component".to_string());
+        }
     }
 
     let sysroot_dir = sysroot_path.join("sysroot_src");
@@ -151,6 +163,7 @@ struct PrepareArg {
     cross_compile: bool,
     only_libcore: bool,
     libgccjit12_patches: bool,
+    sysroot_source: Option<String>,
 }
 
 impl PrepareArg {
@@ -158,12 +171,23 @@ impl PrepareArg {
         let mut only_libcore = false;
         let mut cross_compile = false;
         let mut libgccjit12_patches = false;
+        let mut sysroot_source = None;
 
-        for arg in std::env::args().skip(2) {
+        let mut args = std::env::args().skip(2);
+        while let Some(arg) = args.next() {
             match arg.as_str() {
                 "--only-libcore" => only_libcore = true,
                 "--cross" => cross_compile = true,
                 "--libgccjit12-patches" => libgccjit12_patches = true,
+                "--sysroot-source" => {
+                    if let Some(path) = args.next() {
+                        sysroot_source = Some(path);
+                    } else {
+                        return Err(
+                            "Expected a value after `--sysroot-source`, found nothing".to_string()
+                        );
+                    }
+                }
                 "--help" => {
                     Self::usage();
                     return Ok(None);
@@ -171,7 +195,7 @@ impl PrepareArg {
                 a => return Err(format!("Unknown argument `{a}`")),
             }
         }
-        Ok(Some(Self { cross_compile, only_libcore, libgccjit12_patches }))
+        Ok(Some(Self { cross_compile, only_libcore, libgccjit12_patches, sysroot_source }))
     }
 
     fn usage() {
@@ -182,6 +206,7 @@ impl PrepareArg {
     --only-libcore           : Only setup libcore and don't clone other repositories
     --cross                  : Apply the patches needed to do cross-compilation
     --libgccjit12-patches    : Apply patches needed for libgccjit12
+    --sysroot-source         : Specify custom path for sysroot source
     --help                   : Show this help"#
         )
     }
@@ -193,7 +218,12 @@ pub fn run() -> Result<(), String> {
         None => return Ok(()),
     };
     let sysroot_path = get_sysroot_dir();
-    prepare_libcore(&sysroot_path, args.libgccjit12_patches, args.cross_compile)?;
+    prepare_libcore(
+        &sysroot_path,
+        args.libgccjit12_patches,
+        args.cross_compile,
+        args.sysroot_source,
+    )?;
 
     if !args.only_libcore {
         cargo_install("hyperfine")?;
diff --git a/doc/tips.md b/doc/tips.md
index 6cc81871d026..86c22db186e0 100644
--- a/doc/tips.md
+++ b/doc/tips.md
@@ -35,6 +35,14 @@ COLLECT_NO_DEMANGLE=1
  * Build the stage2 compiler (`rustup toolchain link debug-current build/x86_64-unknown-linux-gnu/stage2`).
  * Clean and rebuild the codegen with `debug-current` in the file `rust-toolchain`.
 
+### How to use a custom sysroot source path
+
+If you wish to build a custom sysroot, pass the path of your sysroot source to `--sysroot-source` during the `prepare` step, like so:
+
+```
+./y.sh prepare --sysroot-source /path/to/custom/source
+```
+
 ### How to use [mem-trace](https://github.com/antoyo/mem-trace)
 
 `rustc` needs to be built without `jemalloc` so that `mem-trace` can overload `malloc` since `jemalloc` is linked statically, so a `LD_PRELOAD`-ed library won't a chance to intercept the calls to `malloc`.

From 65e8717e4559bdfd30a0c6a05eb7f1241f53221e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 24 Apr 2024 20:01:57 -0400
Subject: [PATCH 639/997] Some fixes for aarch64

---
 src/attributes.rs     |  8 +++++++-
 src/builder.rs        |  2 +-
 src/intrinsic/llvm.rs | 22 +++++++++++++++-------
 3 files changed, 23 insertions(+), 9 deletions(-)

diff --git a/src/attributes.rs b/src/attributes.rs
index 2ce0c83008f1..27f21107eda7 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -128,6 +128,12 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
         .join(",");
     if !target_features.is_empty() {
         #[cfg(feature = "master")]
-        func.add_attribute(FnAttribute::Target(&target_features));
+        match cx.sess().target.arch.as_ref() {
+            "x86" | "x86_64" | "powerpc" => {
+                func.add_attribute(FnAttribute::Target(&target_features))
+            }
+            // The target attribute is not supported on other targets in GCC.
+            _ => (),
+        }
     }
 }
diff --git a/src/builder.rs b/src/builder.rs
index 385ca7a44a7d..e9c16a0e4a71 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1129,7 +1129,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // the following cast is required to avoid this error:
         // gcc_jit_context_new_call: mismatching types for argument 2 of function "__atomic_store_4": assignment to param arg1 (type: int) from loadedValue3577 (type: unsigned int  __attribute__((aligned(4))))
         let int_type = atomic_store.get_param(1).to_rvalue().get_type();
-        let value = self.context.new_cast(self.location, value, int_type);
+        let value = self.context.new_bitcast(self.location, value, int_type);
         self.llbb().add_eval(
             self.location,
             self.context.new_call(self.location, atomic_store, &[ptr, value, ordering]),
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index c845ee5fe5fd..a12704822190 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -629,14 +629,22 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
 
 #[cfg(feature = "master")]
 pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
-    if name == "llvm.prefetch" {
-        let gcc_name = "__builtin_prefetch";
-        let func = cx.context.get_builtin_function(gcc_name);
-        cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
-        return func;
-    }
-
     let gcc_name = match name {
+        "llvm.prefetch" => {
+            let gcc_name = "__builtin_prefetch";
+            let func = cx.context.get_builtin_function(gcc_name);
+            cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
+            return func;
+        }
+
+        "llvm.aarch64.isb" => {
+            // FIXME: GCC doesn't support __builtin_arm_isb yet, check if this builtin is OK.
+            let gcc_name = "__atomic_thread_fence";
+            let func = cx.context.get_builtin_function(gcc_name);
+            cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
+            return func;
+        }
+
         "llvm.x86.xgetbv" => "__builtin_ia32_xgetbv",
         // NOTE: this doc specifies the equivalent GCC builtins: http://huonw.github.io/llvmint/llvmint/x86/index.html
         "llvm.sqrt.v2f64" => "__builtin_ia32_sqrtpd",

From 4267ff065675a63f6bb32ee18148ac05b3b256b8 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 26 Apr 2024 14:02:19 +0200
Subject: [PATCH 640/997] Download artifacts from `rust-lang/gcc` instead of
 old `antoyo/gcc`

---
 .github/workflows/ci.yml       | 2 +-
 .github/workflows/failures.yml | 2 +-
 .github/workflows/release.yml  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 69a0707c1f2a..835e055e8c58 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -53,7 +53,7 @@ jobs:
       run: rustup component add rustfmt clippy
 
     - name: Download artifact
-      run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/${{ matrix.libgccjit_version.gcc }}
+      run: curl -LO https://github.com/rust-lang/gcc/releases/latest/download/${{ matrix.libgccjit_version.gcc }}
 
     - name: Setup path to libgccjit
       run: |
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index 2bca694e8328..9fa6f416c141 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -56,7 +56,7 @@ jobs:
 
     - name: Download artifact
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
-      run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/gcc-13.deb
+      run: curl -LO https://github.com/rust-lang/gcc/releases/latest/download/gcc-13.deb
 
     - name: Setup path to libgccjit
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 84394b2957c4..d5242926eb4d 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -37,7 +37,7 @@ jobs:
       run: sudo apt-get install ninja-build ripgrep
 
     - name: Download artifact
-      run: curl -LO https://github.com/antoyo/gcc/releases/latest/download/gcc-13.deb
+      run: curl -LO https://github.com/rust-lang/gcc/releases/latest/download/gcc-13.deb
 
     - name: Setup path to libgccjit
       run: |

From 9ed0543964e25d57ce2842d99e6b07d72537f8fe Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 29 Apr 2024 11:07:54 -0400
Subject: [PATCH 641/997] Some more fixes and workarounds for Aarch64

---
 src/int.rs | 2 +-
 src/lib.rs | 9 +++++++--
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/src/int.rs b/src/int.rs
index 1b812b4d137f..b92db7a74246 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -926,7 +926,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             return self.context.new_cast(None, value, dest_typ);
         }
 
-        debug_assert!(value_type.dyncast_array().is_some());
+        debug_assert!(dest_typ.dyncast_array().is_some());
         let name_suffix = match self.type_kind(value_type) {
             TypeKind::Float => "sfti",
             TypeKind::Double => "dfti",
diff --git a/src/lib.rs b/src/lib.rs
index 616b1944798c..af110e3ab5e6 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -468,6 +468,7 @@ pub fn target_features(
     allow_unstable: bool,
     target_info: &LockedTargetInfo,
 ) -> Vec<Symbol> {
+    // TODO(antoyo): use global_gcc_features.
     sess.target
         .supported_target_features()
         .iter()
@@ -478,8 +479,12 @@ pub fn target_features(
                 None
             }
         })
-        .filter(|_feature| {
-            target_info.cpu_supports(_feature)
+        .filter(|feature| {
+            // TODO: we disable Neon for now since we don't support the LLVM intrinsics for it.
+            if *feature == "neon" {
+                return false;
+            }
+            target_info.cpu_supports(feature)
             /*
               adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512fp16, avx512ifma,
               avx512pf, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpopcntdq,

From 766f59d7f212e7efaa1c316ecc99b8af0d0e7c66 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 30 Apr 2024 22:07:48 +0200
Subject: [PATCH 642/997] Stop swallowing signals in build_system when running
 sub-commands

---
 build_system/src/utils.rs | 50 +++++++++++++++++++++++++++------------
 1 file changed, 35 insertions(+), 15 deletions(-)

diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 45a3ac81b44d..cdda9d4a81e6 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -1,10 +1,42 @@
 use std::collections::HashMap;
+#[cfg(unix)]
+use std::ffi::c_int;
 use std::ffi::OsStr;
 use std::fmt::Debug;
 use std::fs;
+#[cfg(unix)]
+use std::os::unix::process::ExitStatusExt;
 use std::path::{Path, PathBuf};
 use std::process::{Command, ExitStatus, Output};
 
+#[cfg(unix)]
+extern "C" {
+    fn raise(signal: c_int) -> c_int;
+}
+
+fn exec_command(
+    input: &[&dyn AsRef<OsStr>],
+    cwd: Option<&Path>,
+    env: Option<&HashMap<String, String>>,
+) -> Result<ExitStatus, String> {
+    let status = get_command_inner(input, cwd, env)
+        .spawn()
+        .map_err(|e| command_error(input, &cwd, e))?
+        .wait()
+        .map_err(|e| command_error(input, &cwd, e))?;
+    #[cfg(unix)]
+    {
+        if let Some(signal) = status.signal() {
+            unsafe {
+                raise(signal as _);
+            }
+            // In case the signal didn't kill the current process.
+            return Err(command_error(input, &cwd, format!("Process received signal {}", signal)));
+        }
+    }
+    Ok(status)
+}
+
 fn get_command_inner(
     input: &[&dyn AsRef<OsStr>],
     cwd: Option<&Path>,
@@ -89,11 +121,7 @@ pub fn run_command_with_output(
     input: &[&dyn AsRef<OsStr>],
     cwd: Option<&Path>,
 ) -> Result<(), String> {
-    let exit_status = get_command_inner(input, cwd, None)
-        .spawn()
-        .map_err(|e| command_error(input, &cwd, e))?
-        .wait()
-        .map_err(|e| command_error(input, &cwd, e))?;
+    let exit_status = exec_command(input, cwd, None)?;
     check_exit_status(input, cwd, exit_status, None, true)?;
     Ok(())
 }
@@ -103,11 +131,7 @@ pub fn run_command_with_output_and_env(
     cwd: Option<&Path>,
     env: Option<&HashMap<String, String>>,
 ) -> Result<(), String> {
-    let exit_status = get_command_inner(input, cwd, env)
-        .spawn()
-        .map_err(|e| command_error(input, &cwd, e))?
-        .wait()
-        .map_err(|e| command_error(input, &cwd, e))?;
+    let exit_status = exec_command(input, cwd, env)?;
     check_exit_status(input, cwd, exit_status, None, true)?;
     Ok(())
 }
@@ -117,11 +141,7 @@ pub fn run_command_with_output_and_env_no_err(
     cwd: Option<&Path>,
     env: Option<&HashMap<String, String>>,
 ) -> Result<(), String> {
-    let exit_status = get_command_inner(input, cwd, env)
-        .spawn()
-        .map_err(|e| command_error(input, &cwd, e))?
-        .wait()
-        .map_err(|e| command_error(input, &cwd, e))?;
+    let exit_status = exec_command(input, cwd, env)?;
     check_exit_status(input, cwd, exit_status, None, false)?;
     Ok(())
 }

From 5166efc3eb83ed95a9ff608530798f4653448586 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 2 May 2024 17:07:58 -0400
Subject: [PATCH 643/997] Fix segfault in tests due to a bug in libc 0.2.154

We now keep the Cargo.lock to fix the version of libc to 0.2.153.
---
 build_system/build_sysroot/Cargo.lock | 433 ++++++++++++++++++++++++++
 build_system/src/build.rs             |   1 +
 2 files changed, 434 insertions(+)
 create mode 100644 build_system/build_sysroot/Cargo.lock

diff --git a/build_system/build_sysroot/Cargo.lock b/build_system/build_sysroot/Cargo.lock
new file mode 100644
index 000000000000..d6ec1f87d010
--- /dev/null
+++ b/build_system/build_sysroot/Cargo.lock
@@ -0,0 +1,433 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "addr2line"
+version = "0.21.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8a30b2e23b9e17a9f90641c7ab1549cd9b44f296d3ccbf309d2863cfe398a0cb"
+dependencies = [
+ "compiler_builtins",
+ "gimli",
+ "rustc-std-workspace-alloc",
+ "rustc-std-workspace-core",
+]
+
+[[package]]
+name = "adler"
+version = "1.0.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f26201604c87b1e01bd3d98f8d5d9a8fcbb815e8cedb41ffccbeb4bf593a35fe"
+dependencies = [
+ "compiler_builtins",
+ "rustc-std-workspace-core",
+]
+
+[[package]]
+name = "alloc"
+version = "0.0.0"
+dependencies = [
+ "compiler_builtins",
+ "core",
+]
+
+[[package]]
+name = "allocator-api2"
+version = "0.2.18"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "5c6cb57a04249c6480766f7f7cef5467412af1490f8d1e243141daddada3264f"
+
+[[package]]
+name = "cfg-if"
+version = "1.0.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd"
+dependencies = [
+ "compiler_builtins",
+ "rustc-std-workspace-core",
+]
+
+[[package]]
+name = "compiler_builtins"
+version = "0.1.109"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f11973008a8cf741fe6d22f339eba21fd0ca81e2760a769ba8243ed6c21edd7e"
+dependencies = [
+ "rustc-std-workspace-core",
+]
+
+[[package]]
+name = "core"
+version = "0.0.0"
+
+[[package]]
+name = "dlmalloc"
+version = "0.2.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "3264b043b8e977326c1ee9e723da2c1f8d09a99df52cacf00b4dbce5ac54414d"
+dependencies = [
+ "cfg-if",
+ "compiler_builtins",
+ "libc",
+ "rustc-std-workspace-core",
+ "windows-sys",
+]
+
+[[package]]
+name = "fortanix-sgx-abi"
+version = "0.5.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "57cafc2274c10fab234f176b25903ce17e690fca7597090d50880e047a0389c5"
+dependencies = [
+ "compiler_builtins",
+ "rustc-std-workspace-core",
+]
+
+[[package]]
+name = "getopts"
+version = "0.2.21"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "14dbbfd5c71d70241ecf9e6f13737f7b5ce823821063188d7e46c41d371eebd5"
+dependencies = [
+ "rustc-std-workspace-core",
+ "rustc-std-workspace-std",
+ "unicode-width",
+]
+
+[[package]]
+name = "gimli"
+version = "0.28.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "4271d37baee1b8c7e4b708028c57d816cf9d2434acb33a549475f78c181f6253"
+dependencies = [
+ "compiler_builtins",
+ "rustc-std-workspace-alloc",
+ "rustc-std-workspace-core",
+]
+
+[[package]]
+name = "hashbrown"
+version = "0.14.5"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e5274423e17b7c9fc20b6e7e208532f9b19825d82dfd615708b70edd83df41f1"
+dependencies = [
+ "allocator-api2",
+ "compiler_builtins",
+ "rustc-std-workspace-alloc",
+ "rustc-std-workspace-core",
+]
+
+[[package]]
+name = "hermit-abi"
+version = "0.3.9"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "d231dfb89cfffdbc30e7fc41579ed6066ad03abda9e567ccafae602b97ec5024"
+dependencies = [
+ "compiler_builtins",
+ "rustc-std-workspace-alloc",
+ "rustc-std-workspace-core",
+]
+
+[[package]]
+name = "libc"
+version = "0.2.153"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9c198f91728a82281a64e1f4f9eeb25d82cb32a5de251c6bd1b5154d63a8e7bd"
+dependencies = [
+ "rustc-std-workspace-core",
+]
+
+[[package]]
+name = "memchr"
+version = "2.7.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "6c8640c5d730cb13ebd907d8d04b52f55ac9a2eec55b440c8892f40d56c76c1d"
+dependencies = [
+ "compiler_builtins",
+ "rustc-std-workspace-core",
+]
+
+[[package]]
+name = "miniz_oxide"
+version = "0.7.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9d811f3e15f28568be3407c8e7fdb6514c1cda3cb30683f15b6a1a1dc4ea14a7"
+dependencies = [
+ "adler",
+ "compiler_builtins",
+ "rustc-std-workspace-alloc",
+ "rustc-std-workspace-core",
+]
+
+[[package]]
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+version = "0.32.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
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+dependencies = [
+ "compiler_builtins",
+ "memchr",
+ "rustc-std-workspace-alloc",
+ "rustc-std-workspace-core",
+]
+
+[[package]]
+name = "panic_abort"
+version = "0.0.0"
+dependencies = [
+ "alloc",
+ "cfg-if",
+ "compiler_builtins",
+ "core",
+ "libc",
+]
+
+[[package]]
+name = "panic_unwind"
+version = "0.0.0"
+dependencies = [
+ "alloc",
+ "cfg-if",
+ "compiler_builtins",
+ "core",
+ "libc",
+ "unwind",
+]
+
+[[package]]
+name = "proc_macro"
+version = "0.0.0"
+dependencies = [
+ "core",
+ "std",
+]
+
+[[package]]
+name = "r-efi"
+version = "4.4.0"
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+ "compiler_builtins",
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+
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+dependencies = [
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+]
+
+[[package]]
+name = "rustc-std-workspace-alloc"
+version = "1.99.0"
+dependencies = [
+ "alloc",
+]
+
+[[package]]
+name = "rustc-std-workspace-core"
+version = "1.99.0"
+dependencies = [
+ "core",
+]
+
+[[package]]
+name = "rustc-std-workspace-std"
+version = "1.99.0"
+dependencies = [
+ "std",
+]
+
+[[package]]
+name = "std"
+version = "0.0.0"
+dependencies = [
+ "addr2line",
+ "alloc",
+ "cfg-if",
+ "compiler_builtins",
+ "core",
+ "dlmalloc",
+ "fortanix-sgx-abi",
+ "hashbrown",
+ "hermit-abi",
+ "libc",
+ "miniz_oxide",
+ "object",
+ "panic_abort",
+ "panic_unwind",
+ "r-efi",
+ "r-efi-alloc",
+ "rustc-demangle",
+ "std_detect",
+ "unwind",
+ "wasi",
+]
+
+[[package]]
+name = "std_detect"
+version = "0.1.5"
+dependencies = [
+ "cfg-if",
+ "compiler_builtins",
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+
+[[package]]
+name = "sysroot"
+version = "0.0.0"
+dependencies = [
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+ "compiler_builtins",
+ "core",
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+ "std",
+ "test",
+]
+
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+version = "0.0.0"
+dependencies = [
+ "core",
+ "getopts",
+ "libc",
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+]
+
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+dependencies = [
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+]
+
+[[package]]
+name = "unwind"
+version = "0.0.0"
+dependencies = [
+ "cfg-if",
+ "compiler_builtins",
+ "core",
+ "libc",
+ "unwinding",
+]
+
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+ "rustc-std-workspace-alloc",
+ "rustc-std-workspace-core",
+]
+
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+]
+
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+dependencies = [
+ "windows_aarch64_gnullvm",
+ "windows_aarch64_msvc",
+ "windows_i686_gnu",
+ "windows_i686_gnullvm",
+ "windows_i686_msvc",
+ "windows_x86_64_gnu",
+ "windows_x86_64_gnullvm",
+ "windows_x86_64_msvc",
+]
+
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+
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+
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+
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+name = "windows_x86_64_msvc"
+version = "0.52.5"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "bec47e5bfd1bff0eeaf6d8b485cc1074891a197ab4225d504cb7a1ab88b02bf0"
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index a17adb3cd06a..ac428b4cec05 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -114,6 +114,7 @@ pub fn create_build_sysroot_content(start_dir: &Path) -> Result<(), String> {
         create_dir(start_dir)?;
     }
     copy_file("build_system/build_sysroot/Cargo.toml", &start_dir.join("Cargo.toml"))?;
+    copy_file("build_system/build_sysroot/Cargo.lock", &start_dir.join("Cargo.lock"))?;
 
     let src_dir = start_dir.join("src");
     if !src_dir.is_dir() {

From bd7c57b8cdfc045eeb4f6866a6abedd757e20e02 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 2 May 2024 15:20:40 +0200
Subject: [PATCH 644/997] Add `fmt` command

---
 build_system/src/fmt.rs  | 35 +++++++++++++++++++++++++++++++++++
 build_system/src/main.rs |  7 ++++++-
 2 files changed, 41 insertions(+), 1 deletion(-)
 create mode 100644 build_system/src/fmt.rs

diff --git a/build_system/src/fmt.rs b/build_system/src/fmt.rs
new file mode 100644
index 000000000000..43644ba19b38
--- /dev/null
+++ b/build_system/src/fmt.rs
@@ -0,0 +1,35 @@
+use crate::utils::run_command_with_output;
+use std::ffi::OsStr;
+use std::path::Path;
+
+fn show_usage() {
+    println!(
+        r#"
+`fmt` command help:
+
+    --check                : Pass `--check` argument to `cargo fmt` commands
+    --help                 : Show this help"#
+    );
+}
+
+pub fn run() -> Result<(), String> {
+    let mut check = false;
+    // We skip binary name and the `info` command.
+    let mut args = std::env::args().skip(2);
+    while let Some(arg) = args.next() {
+        match arg.as_str() {
+            "--help" => {
+                show_usage();
+                return Ok(());
+            }
+            "--check" => check = true,
+            _ => return Err(format!("Unknown option {}", arg)),
+        }
+    }
+
+    let cmd: &[&dyn AsRef<OsStr>] =
+        if check { &[&"cargo", &"fmt", &"--check"] } else { &[&"cargo", &"fmt"] };
+
+    run_command_with_output(cmd, Some(&Path::new(".")))?;
+    run_command_with_output(cmd, Some(&Path::new("build_system")))
+}
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index 9a30490f6215..d678fd75344d 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -5,6 +5,7 @@ mod build;
 mod clean;
 mod clone_gcc;
 mod config;
+mod fmt;
 mod info;
 mod prepare;
 mod rust_tools;
@@ -41,7 +42,8 @@ Commands:
         build     : Compiles the project. 
         test      : Runs tests for the project.
         info      : Displays information about the build environment and project configuration.
-        clone-gcc : Clones the GCC compiler from a specified source."
+        clone-gcc : Clones the GCC compiler from a specified source.
+        fmt       : Runs rustfmt"
     );
 }
 
@@ -54,6 +56,7 @@ pub enum Command {
     Rustc,
     Test,
     Info,
+    Fmt,
 }
 
 fn main() {
@@ -70,6 +73,7 @@ fn main() {
         Some("test") => Command::Test,
         Some("info") => Command::Info,
         Some("clone-gcc") => Command::CloneGcc,
+        Some("fmt") => Command::Fmt,
         Some("--help") => {
             usage();
             process::exit(0);
@@ -91,6 +95,7 @@ fn main() {
         Command::Test => test::run(),
         Command::Info => info::run(),
         Command::CloneGcc => clone_gcc::run(),
+        Command::Fmt => fmt::run(),
     } {
         eprintln!("Command failed to run: {e}");
         process::exit(1);

From 7e369b314bf7f08640febc341731ebd8b8a34236 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 2 May 2024 15:21:30 +0200
Subject: [PATCH 645/997] Simplify `fmt` check in CI

---
 .github/workflows/ci.yml | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 835e055e8c58..cd366dbae160 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -103,10 +103,7 @@ jobs:
         ./y.sh test --release --clean --build-sysroot ${{ matrix.commands }}
 
     - name: Check formatting
-      run: |
-        cargo fmt -- --check
-        cd build_system
-        cargo fmt -- --check
+      run: ./y.sh fmt --check
 
     - name: clippy
       run: |

From a0b4d735e33811941e0eceb4cbedc8aaec6af3d3 Mon Sep 17 00:00:00 2001
From: Andy Sadler <andrewsadler122@gmail.com>
Date: Wed, 8 May 2024 20:51:21 -0500
Subject: [PATCH 646/997] simd: implement pointer provenance intrinsics

This adds support for the simd variants of the pointer provenance
intrinsics, which are `simd_cast_ptr`, `simd_expose_addr`, and
`simd_from_exposed_addr`.

The preconditions for each intrinsic are adapted from rustc_codegen_llvm
to preserve compatibility.  Each of these intrinsics are implemented as
calling the non-simd variant of each intrinsic on each lane.

This is enough to enable the UI test `ui/simd/intrinsic/ptr-cast.rs` to
pass.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
---
 src/intrinsic/simd.rs      | 135 +++++++++++++++++++++++++++++++++++++
 tests/failing-ui-tests.txt |   1 -
 2 files changed, 135 insertions(+), 1 deletion(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 6d8ed519b4cc..a8d7c37dc871 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -434,6 +434,141 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         return Ok(bx.vector_select(args[0].immediate(), args[1].immediate(), args[2].immediate()));
     }
 
+    if name == sym::simd_cast_ptr {
+        require_simd!(ret_ty, InvalidMonomorphization::SimdReturn { span, name, ty: ret_ty });
+        let (out_len, out_elem) = ret_ty.simd_size_and_type(bx.tcx());
+
+        require!(
+            in_len == out_len,
+            InvalidMonomorphization::ReturnLengthInputType {
+                span,
+                name,
+                in_len,
+                in_ty,
+                ret_ty,
+                out_len
+            }
+        );
+
+        match *in_elem.kind() {
+            ty::RawPtr(p) => {
+                let metadata = p.ty.ptr_metadata_ty(bx.tcx, |ty| {
+                    bx.tcx.normalize_erasing_regions(ty::ParamEnv::reveal_all(), ty)
+                });
+                require!(
+                    metadata.is_unit(),
+                    InvalidMonomorphization::CastFatPointer { span, name, ty: in_elem }
+                );
+            }
+            _ => {
+                return_error!(InvalidMonomorphization::ExpectedPointer { span, name, ty: in_elem })
+            }
+        }
+        match *out_elem.kind() {
+            ty::RawPtr(p) => {
+                let metadata = p.ty.ptr_metadata_ty(bx.tcx, |ty| {
+                    bx.tcx.normalize_erasing_regions(ty::ParamEnv::reveal_all(), ty)
+                });
+                require!(
+                    metadata.is_unit(),
+                    InvalidMonomorphization::CastFatPointer { span, name, ty: out_elem }
+                );
+            }
+            _ => {
+                return_error!(InvalidMonomorphization::ExpectedPointer { span, name, ty: out_elem })
+            }
+        }
+
+        let arg = args[0].immediate();
+        let elem_type = llret_ty.dyncast_vector().expect("vector return type").get_element_type();
+        let values: Vec<_> = (0..in_len)
+            .map(|i| {
+                let idx = bx.gcc_int(bx.usize_type, i as _);
+                let value = bx.extract_element(arg, idx);
+                bx.pointercast(value, elem_type)
+            })
+            .collect();
+        return Ok(bx.context.new_rvalue_from_vector(bx.location, llret_ty, &values));
+    }
+
+    if name == sym::simd_expose_addr {
+        require_simd!(ret_ty, InvalidMonomorphization::SimdReturn { span, name, ty: ret_ty });
+        let (out_len, out_elem) = ret_ty.simd_size_and_type(bx.tcx());
+
+        require!(
+            in_len == out_len,
+            InvalidMonomorphization::ReturnLengthInputType {
+                span,
+                name,
+                in_len,
+                in_ty,
+                ret_ty,
+                out_len
+            }
+        );
+
+        match *in_elem.kind() {
+            ty::RawPtr(_) => {}
+            _ => {
+                return_error!(InvalidMonomorphization::ExpectedPointer { span, name, ty: in_elem })
+            }
+        }
+        match *out_elem.kind() {
+            ty::Uint(ty::UintTy::Usize) => {}
+            _ => return_error!(InvalidMonomorphization::ExpectedUsize { span, name, ty: out_elem }),
+        }
+
+        let arg = args[0].immediate();
+        let elem_type = llret_ty.dyncast_vector().expect("vector return type").get_element_type();
+        let values: Vec<_> = (0..in_len)
+            .map(|i| {
+                let idx = bx.gcc_int(bx.usize_type, i as _);
+                let value = bx.extract_element(arg, idx);
+                bx.ptrtoint(value, elem_type)
+            })
+            .collect();
+        return Ok(bx.context.new_rvalue_from_vector(bx.location, llret_ty, &values));
+    }
+
+    if name == sym::simd_from_exposed_addr {
+        require_simd!(ret_ty, InvalidMonomorphization::SimdReturn { span, name, ty: ret_ty });
+        let (out_len, out_elem) = ret_ty.simd_size_and_type(bx.tcx());
+
+        require!(
+            in_len == out_len,
+            InvalidMonomorphization::ReturnLengthInputType {
+                span,
+                name,
+                in_len,
+                in_ty,
+                ret_ty,
+                out_len
+            }
+        );
+
+        match *in_elem.kind() {
+            ty::Uint(ty::UintTy::Usize) => {}
+            _ => return_error!(InvalidMonomorphization::ExpectedUsize { span, name, ty: in_elem }),
+        }
+        match *out_elem.kind() {
+            ty::RawPtr(_) => {}
+            _ => {
+                return_error!(InvalidMonomorphization::ExpectedPointer { span, name, ty: out_elem })
+            }
+        }
+
+        let arg = args[0].immediate();
+        let elem_type = llret_ty.dyncast_vector().expect("vector return type").get_element_type();
+        let values: Vec<_> = (0..in_len)
+            .map(|i| {
+                let idx = bx.gcc_int(bx.usize_type, i as _);
+                let value = bx.extract_element(arg, idx);
+                bx.inttoptr(value, elem_type)
+            })
+            .collect();
+        return Ok(bx.context.new_rvalue_from_vector(bx.location, llret_ty, &values));
+    }
+
     #[cfg(feature = "master")]
     if name == sym::simd_cast || name == sym::simd_as {
         require_simd!(ret_ty, InvalidMonomorphization::SimdReturn { span, name, ty: ret_ty });
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 4f0c9814e73e..1521a4d25470 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -33,7 +33,6 @@ tests/ui/panic-runtime/abort.rs
 tests/ui/panic-runtime/link-to-abort.rs
 tests/ui/unwind-no-uwtable.rs
 tests/ui/parser/unclosed-delimiter-in-dep.rs
-tests/ui/simd/intrinsic/ptr-cast.rs
 tests/ui/consts/missing_span_in_backtrace.rs
 tests/ui/drop/dynamic-drop.rs
 tests/ui/issues/issue-40883.rs

From b13943ed4227ac0b51aeb117aae1fa4793c11916 Mon Sep 17 00:00:00 2001
From: Gerson <71728860+Gerson2102@users.noreply.github.com>
Date: Mon, 27 May 2024 10:08:20 -0600
Subject: [PATCH 647/997] adding more env vars (#523)

---
 Readme.md | 32 ++++++++++++++++++++++++++------
 1 file changed, 26 insertions(+), 6 deletions(-)

diff --git a/Readme.md b/Readme.md
index 607a16cc2097..01b00273ccb3 100644
--- a/Readme.md
+++ b/Readme.md
@@ -16,6 +16,10 @@ A secondary goal is to check if using the gcc backend will provide any run-time
 
 **rustup:** Follow the instructions on the official [website](https://www.rust-lang.org/tools/install)
 
+**DejaGnu:** Consider to install DejaGnu which is necessary for running the libgccjit test suite. [website](https://www.gnu.org/software/dejagnu/#downloading)
+
+
+
 ## Building
 
 **This requires a patched libgccjit in order to work.
@@ -143,16 +147,32 @@ $ LIBRARY_PATH="[gcc-path value]" LD_LIBRARY_PATH="[gcc-path value]" rustc +$(ca
 ## Env vars
 
 <dl>
-    <dt>CG_GCCJIT_INCR_CACHE_DISABLED</dt>
-    <dd>Don't cache object files in the incremental cache. Useful during development of cg_gccjit
-    to make it possible to use incremental mode for all analyses performed by rustc without caching
-    object files when their content should have been changed by a change to cg_gccjit.</dd>
-    <dt>CG_GCCJIT_DISPLAY_CG_TIME</dt>
-    <dd>Display the time it took to perform codegen for a crate</dd>
+    <dt>CG_GCCJIT_DUMP_ALL_MODULES</dt>
+    <dd>Enables dumping of all compilation modules. When set to "1", a dump is created for each module during compilation and stored in `/tmp/reproducers/`.</dd>
+    <dt>CG_GCCJIT_DUMP_MODULE</dt>
+    <dd>Enables dumping of a specific module. When set with the module name, e.g., `CG_GCCJIT_DUMP_MODULE=module_name`, a dump of that specific module is created in `/tmp/reproducers/`.</dd>
     <dt>CG_RUSTFLAGS</dt>
     <dd>Send additional flags to rustc. Can be used to build the sysroot without unwinding by setting `CG_RUSTFLAGS=-Cpanic=abort`.</dd>
     <dt>CG_GCCJIT_DUMP_TO_FILE</dt>
     <dd>Dump a C-like representation to /tmp/gccjit_dumps and enable debug info in order to debug this C-like representation.</dd>
+    <dt>CG_GCCJIT_DUMP_RTL</dt>
+    <dd>Dumps RTL (Register Transfer Language) for virtual registers.</dd>
+    <dt>CG_GCCJIT_DUMP_RTL_ALL</dt>
+    <dd>Dumps all RTL passes.</dd>
+    <dt>CG_GCCJIT_DUMP_TREE_ALL</dt>
+    <dd>Dumps all tree (GIMPLE) passes.</dd>
+    <dt>CG_GCCJIT_DUMP_IPA_ALL</dt>
+    <dd>Dumps all Interprocedural Analysis (IPA) passes.</dd>
+    <dt>CG_GCCJIT_DUMP_CODE</dt>
+    <dd>Dumps the final generated code.</dd>
+    <dt>CG_GCCJIT_DUMP_GIMPLE</dt>
+    <dd>Dumps the initial GIMPLE representation.</dd>
+    <dt>CG_GCCJIT_DUMP_EVERYTHING</dt>
+    <dd>Enables dumping of all intermediate representations and passes.</dd>
+    <dt>CG_GCCJIT_KEEP_INTERMEDIATES</dt>
+    <dd>Keeps intermediate files generated during the compilation process.</dd>
+    <dt>CG_GCCJIT_VERBOSE</dt>
+    <dd>Enables verbose output from the GCC driver.</dd>
 </dl>
 
 ## Extra documentation

From e7eeeb92dad5369fa26a553fc08acb2949ebdb3d Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 28 May 2024 12:03:35 +0200
Subject: [PATCH 648/997] Improve Readme.md format

---
 Readme.md | 41 +++++++++++++----------------------------
 1 file changed, 13 insertions(+), 28 deletions(-)

diff --git a/Readme.md b/Readme.md
index 01b00273ccb3..bd552b84f928 100644
--- a/Readme.md
+++ b/Readme.md
@@ -146,34 +146,19 @@ $ LIBRARY_PATH="[gcc-path value]" LD_LIBRARY_PATH="[gcc-path value]" rustc +$(ca
 
 ## Env vars
 
-<dl>
-    <dt>CG_GCCJIT_DUMP_ALL_MODULES</dt>
-    <dd>Enables dumping of all compilation modules. When set to "1", a dump is created for each module during compilation and stored in `/tmp/reproducers/`.</dd>
-    <dt>CG_GCCJIT_DUMP_MODULE</dt>
-    <dd>Enables dumping of a specific module. When set with the module name, e.g., `CG_GCCJIT_DUMP_MODULE=module_name`, a dump of that specific module is created in `/tmp/reproducers/`.</dd>
-    <dt>CG_RUSTFLAGS</dt>
-    <dd>Send additional flags to rustc. Can be used to build the sysroot without unwinding by setting `CG_RUSTFLAGS=-Cpanic=abort`.</dd>
-    <dt>CG_GCCJIT_DUMP_TO_FILE</dt>
-    <dd>Dump a C-like representation to /tmp/gccjit_dumps and enable debug info in order to debug this C-like representation.</dd>
-    <dt>CG_GCCJIT_DUMP_RTL</dt>
-    <dd>Dumps RTL (Register Transfer Language) for virtual registers.</dd>
-    <dt>CG_GCCJIT_DUMP_RTL_ALL</dt>
-    <dd>Dumps all RTL passes.</dd>
-    <dt>CG_GCCJIT_DUMP_TREE_ALL</dt>
-    <dd>Dumps all tree (GIMPLE) passes.</dd>
-    <dt>CG_GCCJIT_DUMP_IPA_ALL</dt>
-    <dd>Dumps all Interprocedural Analysis (IPA) passes.</dd>
-    <dt>CG_GCCJIT_DUMP_CODE</dt>
-    <dd>Dumps the final generated code.</dd>
-    <dt>CG_GCCJIT_DUMP_GIMPLE</dt>
-    <dd>Dumps the initial GIMPLE representation.</dd>
-    <dt>CG_GCCJIT_DUMP_EVERYTHING</dt>
-    <dd>Enables dumping of all intermediate representations and passes.</dd>
-    <dt>CG_GCCJIT_KEEP_INTERMEDIATES</dt>
-    <dd>Keeps intermediate files generated during the compilation process.</dd>
-    <dt>CG_GCCJIT_VERBOSE</dt>
-    <dd>Enables verbose output from the GCC driver.</dd>
-</dl>
+ * _**CG_GCCJIT_DUMP_ALL_MODULES**_: Enables dumping of all compilation modules. When set to "1", a dump is created for each module during compilation and stored in `/tmp/reproducers/`.
+ * _**CG_GCCJIT_DUMP_MODULE**_: Enables dumping of a specific module. When set with the module name, e.g., `CG_GCCJIT_DUMP_MODULE=module_name`, a dump of that specific module is created in `/tmp/reproducers/`.
+ * _**CG_RUSTFLAGS**_: Send additional flags to rustc. Can be used to build the sysroot without unwinding by setting `CG_RUSTFLAGS=-Cpanic=abort`.
+ * _**CG_GCCJIT_DUMP_TO_FILE**_: Dump a C-like representation to /tmp/gccjit_dumps and enable debug info in order to debug this C-like representation.
+ * _**CG_GCCJIT_DUMP_RTL**_: Dumps RTL (Register Transfer Language) for virtual registers.
+ * _**CG_GCCJIT_DUMP_RTL_ALL**_: Dumps all RTL passes.
+ * _**CG_GCCJIT_DUMP_TREE_ALL**_: Dumps all tree (GIMPLE) passes.
+ * _**CG_GCCJIT_DUMP_IPA_ALL**_: Dumps all Interprocedural Analysis (IPA) passes.
+ * _**CG_GCCJIT_DUMP_CODE**_: Dumps the final generated code.
+ * _**CG_GCCJIT_DUMP_GIMPLE**_: Dumps the initial GIMPLE representation.
+ * _**CG_GCCJIT_DUMP_EVERYTHING**_: Enables dumping of all intermediate representations and passes.
+ * _**CG_GCCJIT_KEEP_INTERMEDIATES**_: Keeps intermediate files generated during the compilation process.
+ * _**CG_GCCJIT_VERBOSE**_: Enables verbose output from the GCC driver.
 
 ## Extra documentation
 

From eccab8ba39e9c5a3dfcf146105909039b64b0577 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bennet=20Ble=C3=9Fmann?=
 <bennet.blessmann+github@googlemail.com>
Date: Sat, 1 Jun 2024 13:29:55 +0200
Subject: [PATCH 649/997] prevent libgccjit.so download on unsupported os/arch
 (#529)

prevent libgccjit.so download on unsupported os/arch (#529)


Co-authored-by: Guillaume Gomez <guillaume1.gomez@gmail.com>
---
 build_system/src/config.rs | 26 ++++++++++++++++++--------
 1 file changed, 18 insertions(+), 8 deletions(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 041d75915fb0..081e7d2e250e 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -231,13 +231,7 @@ impl ConfigInfo {
             let tempfile = output_dir.join(&tempfile_name);
             let is_in_ci = std::env::var("GITHUB_ACTIONS").is_ok();
 
-            let url = format!(
-                "https://github.com/antoyo/gcc/releases/download/master-{}/libgccjit.so",
-                commit,
-            );
-
-            println!("Downloading `{}`...", url);
-            download_gccjit(url, &output_dir, tempfile_name, !is_in_ci)?;
+            download_gccjit(&commit, &output_dir, tempfile_name, !is_in_ci)?;
 
             let libgccjit_so = output_dir.join(libgccjit_so_name);
             // If we reach this point, it means the file was correctly downloaded, so let's
@@ -469,11 +463,27 @@ impl ConfigInfo {
 }
 
 fn download_gccjit(
-    url: String,
+    commit: &str,
     output_dir: &Path,
     tempfile_name: String,
     with_progress_bar: bool,
 ) -> Result<(), String> {
+    let url = if std::env::consts::OS == "linux" && std::env::consts::ARCH == "x86_64" {
+        format!("https://github.com/rust-lang/gcc/releases/download/master-{}/libgccjit.so", commit)
+    } else {
+        eprintln!(
+            "\
+Pre-compiled libgccjit.so not available for this os or architecture.
+Please compile it yourself and update the `config.toml` file
+to `download-gccjit = false` and set `gcc-path` to the appropriate directory."
+        );
+        return Err(String::from(
+            "no appropriate pre-compiled libgccjit.so available for download",
+        ));
+    };
+
+    println!("Downloading `{}`...", url);
+
     // Try curl. If that fails and we are on windows, fallback to PowerShell.
     let mut ret = run_command_with_output(
         &[

From a63b83eb4e46433216dac0558b978619c6746ea8 Mon Sep 17 00:00:00 2001
From: Shashank Trivedi <100513286+lordshashank@users.noreply.github.com>
Date: Tue, 11 Jun 2024 02:43:44 +0530
Subject: [PATCH 650/997] ui pattern failure tests (#524)

---
 .github/workflows/failures.yml |   9 ++
 build_system/src/build.rs      |  17 ++--
 build_system/src/prepare.rs    |  15 ++--
 build_system/src/test.rs       | 152 +++++++++++++++++++++------------
 build_system/src/utils.rs      |  10 ++-
 tests/failing-ice-tests.txt    |  36 ++++++++
 6 files changed, 171 insertions(+), 68 deletions(-)
 create mode 100644 tests/failing-ice-tests.txt

diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index 9fa6f416c141..66129f805d4c 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -98,3 +98,12 @@ jobs:
       run: |
         ${{ matrix.libgccjit_version.env_extra }} ./y.sh test --release --clean --build-sysroot --test-failing-rustc ${{ matrix.libgccjit_version.extra }} | tee output_log
         rg --text "test result" output_log >> $GITHUB_STEP_SUMMARY
+
+    - name: Run failing ui pattern tests for ICE
+      id: ui-tests
+      run: |
+        ${{ matrix.libgccjit_version.env_extra }} ./y.sh test --release --test-failing-ui-pattern-tests ${{ matrix.libgccjit_version.extra }} | tee output_log_ui
+        if grep -q "the compiler unexpectedly panicked" output_log_ui; then
+          echo "Error: 'the compiler unexpectedly panicked' found in output logs. CI Error!!"
+          exit 1
+        fi
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index ac428b4cec05..d465ab7e5066 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -68,7 +68,7 @@ fn cleanup_sysroot_previous_build(start_dir: &Path) {
     // Clean target dir except for build scripts and incremental cache
     let _ = walk_dir(
         start_dir.join("target"),
-        |dir: &Path| {
+        &mut |dir: &Path| {
             for top in &["debug", "release"] {
                 let _ = fs::remove_dir_all(dir.join(top).join("build"));
                 let _ = fs::remove_dir_all(dir.join(top).join("deps"));
@@ -77,7 +77,7 @@ fn cleanup_sysroot_previous_build(start_dir: &Path) {
 
                 let _ = walk_dir(
                     dir.join(top),
-                    |sub_dir: &Path| {
+                    &mut |sub_dir: &Path| {
                         if sub_dir
                             .file_name()
                             .map(|filename| filename.to_str().unwrap().starts_with("libsysroot"))
@@ -87,7 +87,7 @@ fn cleanup_sysroot_previous_build(start_dir: &Path) {
                         }
                         Ok(())
                     },
-                    |file: &Path| {
+                    &mut |file: &Path| {
                         if file
                             .file_name()
                             .map(|filename| filename.to_str().unwrap().starts_with("libsysroot"))
@@ -97,11 +97,13 @@ fn cleanup_sysroot_previous_build(start_dir: &Path) {
                         }
                         Ok(())
                     },
+                    false,
                 );
             }
             Ok(())
         },
-        |_| Ok(()),
+        &mut |_| Ok(()),
+        false,
     );
 
     let _ = fs::remove_file(start_dir.join("Cargo.lock"));
@@ -166,14 +168,15 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     // Copy files to sysroot
     let sysroot_path = start_dir.join(format!("sysroot/lib/rustlib/{}/lib/", config.target_triple));
     create_dir(&sysroot_path)?;
-    let copier = |dir_to_copy: &Path| {
+    let mut copier = |dir_to_copy: &Path| {
         // FIXME: should not use shell command!
         run_command(&[&"cp", &"-r", &dir_to_copy, &sysroot_path], None).map(|_| ())
     };
     walk_dir(
         start_dir.join(&format!("target/{}/{}/deps", config.target_triple, channel)),
-        copier,
-        copier,
+        &mut copier.clone(),
+        &mut copier,
+        false,
     )?;
 
     // Copy the source files to the sysroot (Rust for Linux needs this).
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index a085d8636167..00aa632165e2 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -72,30 +72,33 @@ fn prepare_libcore(
     let mut patches = Vec::new();
     walk_dir(
         "patches",
-        |_| Ok(()),
-        |file_path: &Path| {
+        &mut |_| Ok(()),
+        &mut |file_path: &Path| {
             patches.push(file_path.to_path_buf());
             Ok(())
         },
+        false,
     )?;
     if cross_compile {
         walk_dir(
             "patches/cross_patches",
-            |_| Ok(()),
-            |file_path: &Path| {
+            &mut |_| Ok(()),
+            &mut |file_path: &Path| {
                 patches.push(file_path.to_path_buf());
                 Ok(())
             },
+            false,
         )?;
     }
     if libgccjit12_patches {
         walk_dir(
             "patches/libgccjit12",
-            |_| Ok(()),
-            |file_path: &Path| {
+            &mut |_| Ok(()),
+            &mut |file_path: &Path| {
                 patches.push(file_path.to_path_buf());
                 Ok(())
             },
+            false,
         )?;
     }
     patches.sort();
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index f1b7b8d19b6a..462d20d728d1 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -23,6 +23,10 @@ fn get_runners() -> Runners {
     runners.insert("--test-rustc", ("Run all rustc tests", test_rustc as Runner));
     runners
         .insert("--test-successful-rustc", ("Run successful rustc tests", test_successful_rustc));
+    runners.insert(
+        "--test-failing-ui-pattern-tests",
+        ("Run failing ui pattern tests", test_failing_ui_pattern_tests),
+    );
     runners.insert("--test-failing-rustc", ("Run failing rustc tests", test_failing_rustc));
     runners.insert("--projects", ("Run the tests of popular crates", test_projects));
     runners.insert("--test-libcore", ("Run libcore tests", test_libcore));
@@ -808,7 +812,7 @@ fn extended_sysroot_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     Ok(())
 }
 
-fn should_not_remove_test(file: &str) -> bool {
+fn valid_ui_error_pattern_test(file: &str) -> bool {
     // contains //~ERROR, but shouldn't be removed
     [
         "issues/auxiliary/issue-3136-a.rs",
@@ -824,7 +828,7 @@ fn should_not_remove_test(file: &str) -> bool {
 }
 
 #[rustfmt::skip]
-fn should_remove_test(file_path: &Path) -> Result<bool, String> {
+fn contains_ui_error_patterns(file_path: &Path) -> Result<bool, String> {
     // Tests generating errors.
     let file = File::open(file_path)
         .map_err(|error| format!("Failed to read `{}`: {:?}", file_path.display(), error))?;
@@ -856,10 +860,19 @@ fn should_remove_test(file_path: &Path) -> Result<bool, String> {
     Ok(false)
 }
 
+// # Parameters
+//
+// * `env`: An environment variable that provides context for the function.
+// * `args`: The arguments passed to the test. This could include things like the flags, config etc.
+// * `prepare_files_callback`: A callback function that prepares the files needed for the test. Its used to remove/retain tests giving Error to run various rust test suits.
+// * `run_error_pattern_test`: A boolean that determines whether to run only error pattern tests.
+// * `test_type`: A string that indicates the type of the test being run.
+//
 fn test_rustc_inner<F>(
     env: &Env,
     args: &TestArg,
     prepare_files_callback: F,
+    run_error_pattern_test: bool,
     test_type: &str,
 ) -> Result<(), String>
 where
@@ -876,54 +889,71 @@ where
     }
 
     if test_type == "ui" {
-        walk_dir(
-            rust_path.join("tests/ui"),
-            |dir| {
-                let dir_name = dir.file_name().and_then(|name| name.to_str()).unwrap_or("");
-                if [
-                    "abi",
-                    "extern",
-                    "unsized-locals",
-                    "proc-macro",
-                    "threads-sendsync",
-                    "borrowck",
-                    "test-attrs",
-                ]
-                .iter()
-                .any(|name| *name == dir_name)
-                {
-                    std::fs::remove_dir_all(dir).map_err(|error| {
-                        format!("Failed to remove folder `{}`: {:?}", dir.display(), error)
-                    })?;
+        if run_error_pattern_test {
+            // After we removed the error tests that are known to panic with rustc_codegen_gcc, we now remove the passing tests since this runs the error tests.
+            walk_dir(
+                rust_path.join("tests/ui"),
+                &mut |_dir| Ok(()),
+                &mut |file_path| {
+                    if contains_ui_error_patterns(file_path)? {
+                        Ok(())
+                    } else {
+                        remove_file(file_path).map_err(|e| e.to_string())
+                    }
+                },
+                true,
+            )?;
+        } else {
+            walk_dir(
+                rust_path.join("tests/ui"),
+                &mut |dir| {
+                    let dir_name = dir.file_name().and_then(|name| name.to_str()).unwrap_or("");
+                    if [
+                        "abi",
+                        "extern",
+                        "unsized-locals",
+                        "proc-macro",
+                        "threads-sendsync",
+                        "borrowck",
+                        "test-attrs",
+                    ]
+                    .iter()
+                    .any(|name| *name == dir_name)
+                    {
+                        std::fs::remove_dir_all(dir).map_err(|error| {
+                            format!("Failed to remove folder `{}`: {:?}", dir.display(), error)
+                        })?;
+                    }
+                    Ok(())
+                },
+                &mut |_| Ok(()),
+                false,
+            )?;
+
+            // These two functions are used to remove files that are known to not be working currently
+            // with the GCC backend to reduce noise.
+            fn dir_handling(dir: &Path) -> Result<(), String> {
+                if dir.file_name().map(|name| name == "auxiliary").unwrap_or(true) {
+                    return Ok(());
+                }
+
+                walk_dir(dir, &mut dir_handling, &mut file_handling, false)
+            }
+            fn file_handling(file_path: &Path) -> Result<(), String> {
+                if !file_path.extension().map(|extension| extension == "rs").unwrap_or(false) {
+                    return Ok(());
+                }
+                let path_str = file_path.display().to_string().replace("\\", "/");
+                if valid_ui_error_pattern_test(&path_str) {
+                    return Ok(());
+                } else if contains_ui_error_patterns(file_path)? {
+                    return remove_file(&file_path);
                 }
                 Ok(())
-            },
-            |_| Ok(()),
-        )?;
-
-        // These two functions are used to remove files that are known to not be working currently
-        // with the GCC backend to reduce noise.
-        fn dir_handling(dir: &Path) -> Result<(), String> {
-            if dir.file_name().map(|name| name == "auxiliary").unwrap_or(true) {
-                return Ok(());
             }
-            walk_dir(dir, dir_handling, file_handling)
+
+            walk_dir(rust_path.join("tests/ui"), &mut dir_handling, &mut file_handling, false)?;
         }
-        fn file_handling(file_path: &Path) -> Result<(), String> {
-            if !file_path.extension().map(|extension| extension == "rs").unwrap_or(false) {
-                return Ok(());
-            }
-            let path_str = file_path.display().to_string().replace("\\", "/");
-            if should_not_remove_test(&path_str) {
-                return Ok(());
-            } else if should_remove_test(file_path)? {
-                return remove_file(&file_path);
-            }
-            Ok(())
-        }
-
-        walk_dir(rust_path.join("tests/ui"), dir_handling, file_handling)?;
-
         let nb_parts = args.nb_parts.unwrap_or(0);
         if nb_parts > 0 {
             let current_part = args.current_part.unwrap();
@@ -1004,22 +1034,24 @@ where
 }
 
 fn test_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    test_rustc_inner(env, args, |_| Ok(false), "run-make")?;
-    test_rustc_inner(env, args, |_| Ok(false), "ui")
+    test_rustc_inner(env, args, |_| Ok(false), false, "run-make")?;
+    test_rustc_inner(env, args, |_| Ok(false), false, "ui")
 }
 
 fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
     let result1 = test_rustc_inner(
         env,
         args,
-        prepare_files_callback_failing("tests/failing-run-make-tests.txt", "run-make"),
+        retain_files_callback("tests/failing-run-make-tests.txt", "run-make"),
+        false,
         "run-make",
     );
 
     let result2 = test_rustc_inner(
         env,
         args,
-        prepare_files_callback_failing("tests/failing-ui-tests.txt", "ui"),
+        retain_files_callback("tests/failing-ui-tests.txt", "ui"),
+        false,
         "ui",
     );
 
@@ -1030,18 +1062,30 @@ fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
     test_rustc_inner(
         env,
         args,
-        prepare_files_callback_success("tests/failing-ui-tests.txt", "ui"),
+        remove_files_callback("tests/failing-ui-tests.txt", "ui"),
+        false,
         "ui",
     )?;
     test_rustc_inner(
         env,
         args,
-        prepare_files_callback_success("tests/failing-run-make-tests.txt", "run-make"),
+        remove_files_callback("tests/failing-run-make-tests.txt", "run-make"),
+        false,
         "run-make",
     )
 }
 
-fn prepare_files_callback_failing<'a>(
+fn test_failing_ui_pattern_tests(env: &Env, args: &TestArg) -> Result<(), String> {
+    test_rustc_inner(
+        env,
+        args,
+        remove_files_callback("tests/failing-ice-tests.txt", "ui"),
+        true,
+        "ui",
+    )
+}
+
+fn retain_files_callback<'a>(
     file_path: &'a str,
     test_type: &'a str,
 ) -> impl Fn(&Path) -> Result<bool, String> + 'a {
@@ -1104,7 +1148,7 @@ fn prepare_files_callback_failing<'a>(
     }
 }
 
-fn prepare_files_callback_success<'a>(
+fn remove_files_callback<'a>(
     file_path: &'a str,
     test_type: &'a str,
 ) -> impl Fn(&Path) -> Result<bool, String> + 'a {
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index cdda9d4a81e6..3bba8df6c650 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -343,7 +343,12 @@ pub fn git_clone_root_dir(
     git_clone_inner(to_clone, &dest_parent_dir.join(&repo_name), shallow_clone, repo_name)
 }
 
-pub fn walk_dir<P, D, F>(dir: P, mut dir_cb: D, mut file_cb: F) -> Result<(), String>
+pub fn walk_dir<P, D, F>(
+    dir: P,
+    dir_cb: &mut D,
+    file_cb: &mut F,
+    recursive: bool,
+) -> Result<(), String>
 where
     P: AsRef<Path>,
     D: FnMut(&Path) -> Result<(), String>,
@@ -358,6 +363,9 @@ where
         let entry_path = entry.path();
         if entry_path.is_dir() {
             dir_cb(&entry_path)?;
+            if recursive {
+                walk_dir(entry_path, dir_cb, file_cb, recursive)?; // Recursive call
+            }
         } else {
             file_cb(&entry_path)?;
         }
diff --git a/tests/failing-ice-tests.txt b/tests/failing-ice-tests.txt
new file mode 100644
index 000000000000..2084f86b62e1
--- /dev/null
+++ b/tests/failing-ice-tests.txt
@@ -0,0 +1,36 @@
+tests/ui/treat-err-as-bug/span_delayed_bug.rs
+tests/ui/treat-err-as-bug/err.rs
+tests/ui/simd/not-out-of-bounds.rs
+tests/ui/simd/monomorphize-shuffle-index.rs
+tests/ui/simd/masked-load-store-build-fail.rs
+tests/ui/simd/intrinsic/generic-shuffle.rs
+tests/ui/simd/intrinsic/generic-elements.rs
+tests/ui/simd/intrinsic/generic-cast.rs
+tests/ui/simd/intrinsic/generic-arithmetic-saturating-2.rs
+tests/ui/simd/intrinsic/generic-arithmetic-2.rs
+tests/ui/panics/default-backtrace-ice.rs
+tests/ui/mir/lint/storage-live.rs
+tests/ui/layout/valid_range_oob.rs
+tests/ui/higher-ranked/trait-bounds/future.rs
+tests/ui/consts/const-eval/const-eval-query-stack.rs
+tests/ui/simd/masked-load-store.rs
+tests/ui/simd/issue-39720.rs
+tests/ui/simd/intrinsic/ptr-cast.rs
+tests/ui/sepcomp/sepcomp-statics.rs
+tests/ui/sepcomp/sepcomp-fns.rs
+tests/ui/sepcomp/sepcomp-fns-backwards.rs
+tests/ui/sepcomp/sepcomp-extern.rs
+tests/ui/sepcomp/sepcomp-cci.rs
+tests/ui/lto/thin-lto-inlines2.rs
+tests/ui/lto/weak-works.rs
+tests/ui/lto/thin-lto-inlines.rs
+tests/ui/lto/thin-lto-global-allocator.rs
+tests/ui/lto/msvc-imp-present.rs
+tests/ui/lto/dylib-works.rs
+tests/ui/lto/all-crates.rs
+tests/ui/issues/issue-47364.rs
+tests/ui/functions-closures/parallel-codegen-closures.rs
+tests/ui/sepcomp/sepcomp-unwind.rs
+tests/ui/extern/issue-64655-extern-rust-must-allow-unwind.rs
+tests/ui/extern/issue-64655-allow-unwind-when-calling-panic-directly.rs
+tests/ui/unwind-no-uwtable.rs

From d0977e3e2a5b15229df46d98d48e31b290aa68da Mon Sep 17 00:00:00 2001
From: Robert Zakrzewski <robert.zakrzewski1@stellantis.com>
Date: Wed, 10 Apr 2024 23:08:01 +0200
Subject: [PATCH 651/997] Add support for Float16, Float32, Float64 and
 Float128

Upgrade libgccjit.version

Limit new Floatxx types to master branch only

apply rustfmt

Make new types available only when requested

Make new types available only when requested

Check if Float16 and Float128 are supported by the target platform

Replace Float with Float32 and Double with Float64 if target dependent type is defined

Add support for Float16|32|64|128 in the builder

Fix cargo fmt errors

Update gccjit wrapper

update hash of ligccjit
---
 Cargo.lock        |  8 +++---
 libgccjit.version |  2 +-
 src/builder.rs    | 18 ++++++++++++
 src/type_.rs      | 70 +++++++++++++++++++++++++++++++++++++++++++++--
 4 files changed, 90 insertions(+), 8 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index ab2c7ca8a47c..2ce9eb081eec 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -79,16 +79,16 @@ dependencies = [
 
 [[package]]
 name = "gccjit"
-version = "1.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#9f8f67edc006d543b17529a001803ffece48349e"
+version = "2.0.0"
+source = "git+https://github.com/antoyo/gccjit.rs#f1545d7c2c13e42d78eaac8032d49ab8f7d43b6e"
 dependencies = [
  "gccjit_sys",
 ]
 
 [[package]]
 name = "gccjit_sys"
-version = "0.0.1"
-source = "git+https://github.com/antoyo/gccjit.rs#9f8f67edc006d543b17529a001803ffece48349e"
+version = "0.1.0"
+source = "git+https://github.com/antoyo/gccjit.rs#f1545d7c2c13e42d78eaac8032d49ab8f7d43b6e"
 dependencies = [
  "libc",
 ]
diff --git a/libgccjit.version b/libgccjit.version
index 41bec6df5d95..adf9b64c826f 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-b6f163f52
+ac1853f579dbfdc53f2c22317e673ae99686eca2
diff --git a/src/builder.rs b/src/builder.rs
index e9c16a0e4a71..30343f2e17b4 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -748,6 +748,24 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             // FIXME(antoyo): this seems to produce the wrong result.
             return self.context.new_call(self.location, fmodf, &[a, b]);
         }
+
+        #[cfg(feature = "master")]
+        match self.cx.type_kind(a_type) {
+            TypeKind::Half | TypeKind::Float => {
+                let fmodf = self.context.get_builtin_function("fmodf");
+                return self.context.new_call(self.location, fmodf, &[a, b]);
+            }
+            TypeKind::Double => {
+                let fmod = self.context.get_builtin_function("fmod");
+                return self.context.new_call(self.location, fmod, &[a, b]);
+            }
+            TypeKind::FP128 => {
+                let fmodl = self.context.get_builtin_function("fmodl");
+                return self.context.new_call(self.location, fmodl, &[a, b]);
+            }
+            _ => (),
+        }
+
         if let Some(vector_type) = a_type_unqualified.dyncast_vector() {
             assert_eq!(a_type_unqualified, b.get_type().unqualified());
 
diff --git a/src/type_.rs b/src/type_.rs
index d0d3c21f0cf0..cc26f306d6de 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -1,4 +1,6 @@
-use gccjit::{RValue, Struct, Type};
+use std::convert::TryInto;
+
+use gccjit::{CType, RValue, Struct, Type};
 use rustc_codegen_ssa::common::TypeKind;
 use rustc_codegen_ssa::traits::{BaseTypeMethods, DerivedTypeMethods, TypeMembershipMethods};
 use rustc_middle::ty::layout::TyAndLayout;
@@ -120,10 +122,28 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         self.isize_type
     }
 
+    #[cfg(feature = "master")]
     fn type_f16(&self) -> Type<'gcc> {
-        unimplemented!("f16_f128")
+        if self.context.get_target_info().supports_target_dependent_type(CType::Float16) {
+            return self.context.new_c_type(CType::Float16);
+        }
+        unimplemented!("f16")
     }
 
+    #[cfg(not(feature = "master"))]
+    fn type_f16(&self) -> Type<'gcc> {
+        unimplemented!("f16")
+    }
+
+    #[cfg(feature = "master")]
+    fn type_f32(&self) -> Type<'gcc> {
+        if self.context.get_target_info().supports_target_dependent_type(CType::Float32) {
+            return self.context.new_c_type(CType::Float32);
+        }
+        self.float_type
+    }
+
+    #[cfg(not(feature = "master"))]
     fn type_f32(&self) -> Type<'gcc> {
         self.float_type
     }
@@ -132,8 +152,17 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         self.double_type
     }
 
+    #[cfg(feature = "master")]
     fn type_f128(&self) -> Type<'gcc> {
-        unimplemented!("f16_f128")
+        if self.context.get_target_info().supports_target_dependent_type(CType::Float128) {
+            return self.context.new_c_type(CType::Float128);
+        }
+        unimplemented!("f128")
+    }
+
+    #[cfg(not(feature = "master"))]
+    fn type_f128(&self) -> Type<'gcc> {
+        unimplemented!("f128")
     }
 
     fn type_func(&self, params: &[Type<'gcc>], return_type: Type<'gcc>) -> Type<'gcc> {
@@ -161,6 +190,31 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         typ
     }
 
+    #[cfg(feature = "master")]
+    fn type_kind(&self, typ: Type<'gcc>) -> TypeKind {
+        if self.is_int_type_or_bool(typ) {
+            TypeKind::Integer
+        } else if typ.is_compatible_with(self.float_type) {
+            TypeKind::Float
+        } else if typ.is_compatible_with(self.double_type) {
+            TypeKind::Double
+        } else if typ.is_vector() {
+            TypeKind::Vector
+        } else if typ.is_floating_point() {
+            match typ.get_size() {
+                2 => TypeKind::Half,
+                4 => TypeKind::Float,
+                8 => TypeKind::Double,
+                16 => TypeKind::FP128,
+                _ => TypeKind::Void,
+            }
+        } else {
+            // TODO(antoyo): support other types.
+            TypeKind::Void
+        }
+    }
+
+    #[cfg(not(feature = "master"))]
     fn type_kind(&self, typ: Type<'gcc>) -> TypeKind {
         if self.is_int_type_or_bool(typ) {
             TypeKind::Integer
@@ -210,6 +264,16 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         unimplemented!();
     }
 
+    #[cfg(feature = "master")]
+    fn float_width(&self, typ: Type<'gcc>) -> usize {
+        if typ.is_floating_point() {
+            (typ.get_size() * u8::BITS).try_into().unwrap()
+        } else {
+            panic!("Cannot get width of float type {:?}", typ);
+        }
+    }
+
+    #[cfg(not(feature = "master"))]
     fn float_width(&self, typ: Type<'gcc>) -> usize {
         let f32 = self.context.new_type::<f32>();
         let f64 = self.context.new_type::<f64>();

From a486dbfc17945e6bad43793aae37a9ef29c05efd Mon Sep 17 00:00:00 2001
From: Robert Zakrzewski <robert.zakrzewski1@stellantis.com>
Date: Sun, 5 May 2024 18:42:27 +0200
Subject: [PATCH 652/997] Upgrade libgccjit.version

---
 libgccjit.version | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libgccjit.version b/libgccjit.version
index adf9b64c826f..71a61a4b8735 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-ac1853f579dbfdc53f2c22317e673ae99686eca2
+272d0ccced960394fe6ff2b40b01610208cb4940

From fa18a181f7bf0a7c1f5753de82c1e934a957894d Mon Sep 17 00:00:00 2001
From: Robert Zakrzewski <robert.zakrzewski1@stellantis.com>
Date: Sun, 5 May 2024 21:03:54 +0200
Subject: [PATCH 653/997] Temporary downgrade compiler_builtins library. From
 version 0.1.110 the no-f16-f128 feautes introduced incompatibility

---
 build_system/build_sysroot/Cargo.toml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/build_system/build_sysroot/Cargo.toml b/build_system/build_sysroot/Cargo.toml
index 05503128f2af..d0d21a044fd1 100644
--- a/build_system/build_sysroot/Cargo.toml
+++ b/build_system/build_sysroot/Cargo.toml
@@ -6,7 +6,8 @@ resolver = "2"
 
 [dependencies]
 core = { path = "./sysroot_src/library/core" }
-compiler_builtins = "0.1"
+# compiler_builtins = "0.1"
+compiler_builtins = "=0.1.109"
 alloc = { path = "./sysroot_src/library/alloc" }
 std = { path = "./sysroot_src/library/std", features = ["panic_unwind", "backtrace"] }
 test = { path = "./sysroot_src/library/test" }

From b94cb8c01ccb1c027dc2840483afa45c6325fd2b Mon Sep 17 00:00:00 2001
From: Robert Zakrzewski <robert.zakrzewski1@stellantis.com>
Date: Sun, 12 May 2024 17:40:14 +0200
Subject: [PATCH 654/997] Add missing types in the type_kind function

reorder type_kind

reorder type_kind

reorder type_kind

fix

fix

fix

fix
---
 src/type_.rs | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/src/type_.rs b/src/type_.rs
index cc26f306d6de..36656c66a654 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -194,12 +194,20 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn type_kind(&self, typ: Type<'gcc>) -> TypeKind {
         if self.is_int_type_or_bool(typ) {
             TypeKind::Integer
+        } else if typ.get_pointee().is_some() {
+            TypeKind::Pointer
+        } else if typ.is_vector() {
+            TypeKind::Vector
+        } else if typ.dyncast_array().is_some() {
+            TypeKind::Array
+        } else if typ.is_struct().is_some() {
+            TypeKind::Struct
+        } else if typ.dyncast_function_ptr_type().is_some() {
+            TypeKind::Function
         } else if typ.is_compatible_with(self.float_type) {
             TypeKind::Float
         } else if typ.is_compatible_with(self.double_type) {
             TypeKind::Double
-        } else if typ.is_vector() {
-            TypeKind::Vector
         } else if typ.is_floating_point() {
             match typ.get_size() {
                 2 => TypeKind::Half,
@@ -208,9 +216,11 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 16 => TypeKind::FP128,
                 _ => TypeKind::Void,
             }
+        } else if typ == self.type_void() {
+            TypeKind::Void
         } else {
             // TODO(antoyo): support other types.
-            TypeKind::Void
+            unimplemented!();
         }
     }
 

From 0dad11feb9cf34f41d883f49518f9bf812314d57 Mon Sep 17 00:00:00 2001
From: Robert Zakrzewski <robert.zakrzewski1@stellantis.com>
Date: Fri, 24 May 2024 08:05:57 +0200
Subject: [PATCH 655/997] Do not use target dependent Float32

fix formatting
---
 src/type_.rs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/type_.rs b/src/type_.rs
index 36656c66a654..c65301495b19 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -137,9 +137,9 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
     #[cfg(feature = "master")]
     fn type_f32(&self) -> Type<'gcc> {
-        if self.context.get_target_info().supports_target_dependent_type(CType::Float32) {
-            return self.context.new_c_type(CType::Float32);
-        }
+        // if self.context.get_target_info().supports_target_dependent_type(CType::Float32) {
+        // return self.context.new_c_type(CType::Float32);
+        // }
         self.float_type
     }
 

From c4e7c04de9bc72190ef9911c7a481ebc2a406db7 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 13 Jun 2024 08:45:41 -0400
Subject: [PATCH 656/997] Fix location of check for sized floating-point types

---
 src/base.rs    | 19 +++++++++++++++++--
 src/context.rs |  9 +++++++++
 src/lib.rs     | 12 ++++++++++--
 src/type_.rs   | 15 +++++++++------
 4 files changed, 45 insertions(+), 10 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index 79a29a1135a1..ea2b0b791b7f 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -2,7 +2,7 @@ use std::collections::HashSet;
 use std::env;
 use std::time::Instant;
 
-use gccjit::{FunctionType, GlobalKind};
+use gccjit::{CType, FunctionType, GlobalKind};
 use rustc_codegen_ssa::base::maybe_create_entry_wrapper;
 use rustc_codegen_ssa::mono_item::MonoItemExt;
 use rustc_codegen_ssa::traits::DebugInfoMethods;
@@ -181,7 +181,22 @@ pub fn compile_codegen_unit(
         context.set_allow_unreachable_blocks(true);
 
         {
-            let cx = CodegenCx::new(&context, cgu, tcx, target_info.supports_128bit_int());
+            // TODO: to make it less error-prone (calling get_target_info() will add the flag
+            // -fsyntax-only), forbid the compilation when get_target_info() is called on a
+            // context.
+            let f16_type_supported = target_info.supports_target_dependent_type(CType::Float16);
+            let f32_type_supported = target_info.supports_target_dependent_type(CType::Float32);
+            let f128_type_supported = target_info.supports_target_dependent_type(CType::Float128);
+            // TODO: improve this to avoid passing that many arguments.
+            let cx = CodegenCx::new(
+                &context,
+                cgu,
+                tcx,
+                target_info.supports_128bit_int(),
+                f16_type_supported,
+                f32_type_supported,
+                f128_type_supported,
+            );
 
             let mono_items = cgu.items_in_deterministic_order(tcx);
             for &(mono_item, data) in &mono_items {
diff --git a/src/context.rs b/src/context.rs
index 890b4b15fc01..53a2b09217a9 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -68,6 +68,9 @@ pub struct CodegenCx<'gcc, 'tcx> {
     pub sizet_type: Type<'gcc>,
 
     pub supports_128bit_integers: bool,
+    pub supports_f16_type: bool,
+    pub supports_f32_type: bool,
+    pub supports_f128_type: bool,
 
     pub float_type: Type<'gcc>,
     pub double_type: Type<'gcc>,
@@ -130,6 +133,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         codegen_unit: &'tcx CodegenUnit<'tcx>,
         tcx: TyCtxt<'tcx>,
         supports_128bit_integers: bool,
+        supports_f16_type: bool,
+        supports_f32_type: bool,
+        supports_f128_type: bool,
     ) -> Self {
         let check_overflow = tcx.sess.overflow_checks();
 
@@ -305,6 +311,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             sizet_type,
 
             supports_128bit_integers,
+            supports_f16_type,
+            supports_f32_type,
+            supports_f128_type,
 
             float_type,
             double_type,
diff --git a/src/lib.rs b/src/lib.rs
index af110e3ab5e6..9b9b97b9595d 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -89,7 +89,6 @@ use std::sync::Arc;
 use std::sync::Mutex;
 
 use errors::LTONotSupported;
-#[cfg(not(feature = "master"))]
 use gccjit::CType;
 use gccjit::{Context, OptimizationLevel};
 #[cfg(feature = "master")]
@@ -147,6 +146,10 @@ impl TargetInfo {
     fn supports_128bit_int(&self) -> bool {
         self.supports_128bit_integers.load(Ordering::SeqCst)
     }
+
+    fn supports_target_dependent_type(&self, _typ: CType) -> bool {
+        false
+    }
 }
 
 #[derive(Clone)]
@@ -168,6 +171,10 @@ impl LockedTargetInfo {
     fn supports_128bit_int(&self) -> bool {
         self.info.lock().expect("lock").supports_128bit_int()
     }
+
+    fn supports_target_dependent_type(&self, typ: CType) -> bool {
+        self.info.lock().expect("lock").supports_target_dependent_type(typ)
+    }
 }
 
 #[derive(Clone)]
@@ -438,7 +445,8 @@ impl WriteBackendMethods for GccCodegenBackend {
 pub fn __rustc_codegen_backend() -> Box<dyn CodegenBackend> {
     #[cfg(feature = "master")]
     let info = {
-        // Check whether the target supports 128-bit integers.
+        // Check whether the target supports 128-bit integers, and sized floating point types (like
+        // Float16).
         let context = Context::default();
         Arc::new(Mutex::new(IntoDynSyncSend(context.get_target_info())))
     };
diff --git a/src/type_.rs b/src/type_.rs
index c65301495b19..7bcc71e581df 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -1,6 +1,9 @@
+#[cfg(feature = "master")]
 use std::convert::TryInto;
 
-use gccjit::{CType, RValue, Struct, Type};
+#[cfg(feature = "master")]
+use gccjit::CType;
+use gccjit::{RValue, Struct, Type};
 use rustc_codegen_ssa::common::TypeKind;
 use rustc_codegen_ssa::traits::{BaseTypeMethods, DerivedTypeMethods, TypeMembershipMethods};
 use rustc_middle::ty::layout::TyAndLayout;
@@ -124,7 +127,7 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
     #[cfg(feature = "master")]
     fn type_f16(&self) -> Type<'gcc> {
-        if self.context.get_target_info().supports_target_dependent_type(CType::Float16) {
+        if self.supports_f16_type {
             return self.context.new_c_type(CType::Float16);
         }
         unimplemented!("f16")
@@ -137,9 +140,9 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
     #[cfg(feature = "master")]
     fn type_f32(&self) -> Type<'gcc> {
-        // if self.context.get_target_info().supports_target_dependent_type(CType::Float32) {
-        // return self.context.new_c_type(CType::Float32);
-        // }
+        if self.supports_f32_type {
+            return self.context.new_c_type(CType::Float32);
+        }
         self.float_type
     }
 
@@ -154,7 +157,7 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
 
     #[cfg(feature = "master")]
     fn type_f128(&self) -> Type<'gcc> {
-        if self.context.get_target_info().supports_target_dependent_type(CType::Float128) {
+        if self.supports_f128_type {
             return self.context.new_c_type(CType::Float128);
         }
         unimplemented!("f128")

From 55788e4a92fee3521fa9eb1eba1bbfbe27564e9d Mon Sep 17 00:00:00 2001
From: Robert Zakrzewski <robert.zakrzewski1@stellantis.com>
Date: Fri, 21 Jun 2024 14:53:24 +0200
Subject: [PATCH 657/997] Update libgccjit version with fixed is_same_type_as
 for vector types

---
 libgccjit.version | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libgccjit.version b/libgccjit.version
index 71a61a4b8735..8cce73583213 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-272d0ccced960394fe6ff2b40b01610208cb4940
+d61ce945badf4c9d8237a13ca135e3c46ad13be3

From 2eaac2388d6172922d0b8ac62979ff4fa6a2355c Mon Sep 17 00:00:00 2001
From: Robert Zakrzewski <robert.zakrzewski1@stellantis.com>
Date: Fri, 21 Jun 2024 16:42:21 +0200
Subject: [PATCH 658/997] Refactor type_f16|32|128 functions. Common
 type_kind()

fix
---
 src/type_.rs | 25 +++++--------------------
 1 file changed, 5 insertions(+), 20 deletions(-)

diff --git a/src/type_.rs b/src/type_.rs
index 7bcc71e581df..eaa16c448970 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -125,47 +125,32 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         self.isize_type
     }
 
-    #[cfg(feature = "master")]
     fn type_f16(&self) -> Type<'gcc> {
+        #[cfg(feature = "master")]
         if self.supports_f16_type {
             return self.context.new_c_type(CType::Float16);
         }
-        unimplemented!("f16")
+        bug!("unsupported float width 16")
     }
 
-    #[cfg(not(feature = "master"))]
-    fn type_f16(&self) -> Type<'gcc> {
-        unimplemented!("f16")
-    }
-
-    #[cfg(feature = "master")]
     fn type_f32(&self) -> Type<'gcc> {
+        #[cfg(feature = "master")]
         if self.supports_f32_type {
             return self.context.new_c_type(CType::Float32);
         }
         self.float_type
     }
 
-    #[cfg(not(feature = "master"))]
-    fn type_f32(&self) -> Type<'gcc> {
-        self.float_type
-    }
-
     fn type_f64(&self) -> Type<'gcc> {
         self.double_type
     }
 
-    #[cfg(feature = "master")]
     fn type_f128(&self) -> Type<'gcc> {
+        #[cfg(feature = "master")]
         if self.supports_f128_type {
             return self.context.new_c_type(CType::Float128);
         }
-        unimplemented!("f128")
-    }
-
-    #[cfg(not(feature = "master"))]
-    fn type_f128(&self) -> Type<'gcc> {
-        unimplemented!("f128")
+        bug!("unsupported float width 128")
     }
 
     fn type_func(&self, params: &[Type<'gcc>], return_type: Type<'gcc>) -> Type<'gcc> {

From dabf5faff0bb0154d702561266826cc0cd53eec4 Mon Sep 17 00:00:00 2001
From: Robert Zakrzewski <robert.zakrzewski1@stellantis.com>
Date: Fri, 21 Jun 2024 22:10:52 +0200
Subject: [PATCH 659/997] Add support for Float64

---
 src/base.rs    | 2 ++
 src/context.rs | 3 +++
 src/type_.rs   | 4 ++++
 3 files changed, 9 insertions(+)

diff --git a/src/base.rs b/src/base.rs
index ea2b0b791b7f..e88fde8ebef7 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -186,6 +186,7 @@ pub fn compile_codegen_unit(
             // context.
             let f16_type_supported = target_info.supports_target_dependent_type(CType::Float16);
             let f32_type_supported = target_info.supports_target_dependent_type(CType::Float32);
+            let f64_type_supported = target_info.supports_target_dependent_type(CType::Float64);
             let f128_type_supported = target_info.supports_target_dependent_type(CType::Float128);
             // TODO: improve this to avoid passing that many arguments.
             let cx = CodegenCx::new(
@@ -195,6 +196,7 @@ pub fn compile_codegen_unit(
                 target_info.supports_128bit_int(),
                 f16_type_supported,
                 f32_type_supported,
+                f64_type_supported,
                 f128_type_supported,
             );
 
diff --git a/src/context.rs b/src/context.rs
index 53a2b09217a9..6beed91270bd 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -70,6 +70,7 @@ pub struct CodegenCx<'gcc, 'tcx> {
     pub supports_128bit_integers: bool,
     pub supports_f16_type: bool,
     pub supports_f32_type: bool,
+    pub supports_f64_type: bool,
     pub supports_f128_type: bool,
 
     pub float_type: Type<'gcc>,
@@ -135,6 +136,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         supports_128bit_integers: bool,
         supports_f16_type: bool,
         supports_f32_type: bool,
+        supports_f64_type: bool,
         supports_f128_type: bool,
     ) -> Self {
         let check_overflow = tcx.sess.overflow_checks();
@@ -313,6 +315,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             supports_128bit_integers,
             supports_f16_type,
             supports_f32_type,
+            supports_f64_type,
             supports_f128_type,
 
             float_type,
diff --git a/src/type_.rs b/src/type_.rs
index eaa16c448970..093ddbf8137c 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -142,6 +142,10 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     }
 
     fn type_f64(&self) -> Type<'gcc> {
+        #[cfg(feature = "master")]
+        if self.supports_f64_type {
+            return self.context.new_c_type(CType::Float64);
+        }
         self.double_type
     }
 

From 16e1ad7327b070a11d4bbf01a343c24e2dd34553 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 25 Jun 2024 08:10:29 -0400
Subject: [PATCH 660/997] Fix clippy warnings

---
 src/context.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/context.rs b/src/context.rs
index 6beed91270bd..5ece10cc70d1 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -129,6 +129,7 @@ pub struct CodegenCx<'gcc, 'tcx> {
 }
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
+    #[allow(clippy::too_many_arguments)]
     pub fn new(
         context: &'gcc Context<'gcc>,
         codegen_unit: &'tcx CodegenUnit<'tcx>,

From 73db24970f86e6495db1548b235334ed98ba8a6a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 25 Jun 2024 08:43:48 -0400
Subject: [PATCH 661/997] Add comment about compiler_builtins

---
 build_system/build_sysroot/Cargo.toml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/build_system/build_sysroot/Cargo.toml b/build_system/build_sysroot/Cargo.toml
index d0d21a044fd1..e46699236238 100644
--- a/build_system/build_sysroot/Cargo.toml
+++ b/build_system/build_sysroot/Cargo.toml
@@ -6,6 +6,7 @@ resolver = "2"
 
 [dependencies]
 core = { path = "./sysroot_src/library/core" }
+# TODO: after the sync, revert to using version 0.1.
 # compiler_builtins = "0.1"
 compiler_builtins = "=0.1.109"
 alloc = { path = "./sysroot_src/library/alloc" }

From 9274c63df3f584a58d4f916a4de2871c2e92621d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 25 Jun 2024 09:00:36 -0400
Subject: [PATCH 662/997] Change Void to unreachable

---
 src/type_.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/type_.rs b/src/type_.rs
index 093ddbf8137c..184367e9cde1 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -206,7 +206,7 @@ impl<'gcc, 'tcx> BaseTypeMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 4 => TypeKind::Float,
                 8 => TypeKind::Double,
                 16 => TypeKind::FP128,
-                _ => TypeKind::Void,
+                size => unreachable!("Floating-point type of size {}", size),
             }
         } else if typ == self.type_void() {
             TypeKind::Void

From 8e819fbb5ccd520e39981f42ffd497831d34fecb Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 26 Mar 2024 14:35:54 +0100
Subject: [PATCH 663/997] Fix libcore patch

---
 patches/0022-core-Disable-not-compiling-tests.patch | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/patches/0022-core-Disable-not-compiling-tests.patch b/patches/0022-core-Disable-not-compiling-tests.patch
index a7d523f94082..ea1a5a8d3553 100644
--- a/patches/0022-core-Disable-not-compiling-tests.patch
+++ b/patches/0022-core-Disable-not-compiling-tests.patch
@@ -39,4 +39,4 @@ index 42a26ae..5ac1042 100644
 +#![cfg(test)]
  #![feature(alloc_layout_extra)]
  #![feature(array_chunks)]
- #![feature(array_windows)]
+ #![feature(array_ptr_get)]

From f848dbbda5e5666c3fe9eb805f9eababa6244d50 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 26 Mar 2024 14:44:01 +0100
Subject: [PATCH 664/997] Fix non-master build

---
 src/builder.rs | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/builder.rs b/src/builder.rs
index 4a3b6f678c44..84aa168bcca3 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -630,8 +630,9 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         then: Block<'gcc>,
         catch: Block<'gcc>,
         _funclet: Option<&Funclet>,
+        instance: Option<Instance<'tcx>>,
     ) -> RValue<'gcc> {
-        let call_site = self.call(typ, fn_attrs, None, func, args, None);
+        let call_site = self.call(typ, fn_attrs, None, func, args, None, instance);
         let condition = self.context.new_rvalue_from_int(self.bool_type, 1);
         self.llbb().end_with_conditional(self.location, condition, then, catch);
         if let Some(_fn_abi) = fn_abi {

From 580e5ba456a4993794f0c6cbcb67f4b78e8673e5 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 15 May 2024 19:18:38 +0200
Subject: [PATCH 665/997] Format code

---
 src/builder.rs        | 8 ++------
 src/context.rs        | 8 ++++----
 src/intrinsic/simd.rs | 4 +++-
 3 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 84aa168bcca3..41d85bdceb77 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -25,7 +25,7 @@ use rustc_middle::ty::layout::{
     FnAbiError, FnAbiOfHelpers, FnAbiRequest, HasParamEnv, HasTyCtxt, LayoutError, LayoutOfHelpers,
     TyAndLayout,
 };
-use rustc_middle::ty::{ParamEnv, Ty, TyCtxt, Instance};
+use rustc_middle::ty::{Instance, ParamEnv, Ty, TyCtxt};
 use rustc_span::def_id::DefId;
 use rustc_span::Span;
 use rustc_target::abi::{
@@ -904,11 +904,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // TODO(antoyo): It might be better to return a LValue, but fixing the rustc API is non-trivial.
         self.stack_var_count.set(self.stack_var_count.get() + 1);
         self.current_func()
-            .new_local(
-                self.location,
-                ty,
-                &format!("stack_var_{}", self.stack_var_count.get()),
-            )
+            .new_local(self.location, ty, &format!("stack_var_{}", self.stack_var_count.get()))
             .get_address(self.location)
     }
 
diff --git a/src/context.rs b/src/context.rs
index 6231b09552ce..a082bc1b2fc2 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -110,7 +110,7 @@ pub struct CodegenCx<'gcc, 'tcx> {
     local_gen_sym_counter: Cell<usize>,
 
     eh_personality: Cell<Option<RValue<'gcc>>>,
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     pub rust_try_fn: Cell<Option<(Type<'gcc>, Function<'gcc>)>>,
 
     pub pointee_infos: RefCell<FxHashMap<(Ty<'tcx>, Size), Option<PointeeInfo>>>,
@@ -122,7 +122,7 @@ pub struct CodegenCx<'gcc, 'tcx> {
     /// FIXME(antoyo): fix the rustc API to avoid having this hack.
     pub structs_as_pointer: RefCell<FxHashSet<RValue<'gcc>>>,
 
-    #[cfg(feature="master")]
+    #[cfg(feature = "master")]
     pub cleanup_blocks: RefCell<FxHashSet<Block<'gcc>>>,
 }
 
@@ -324,11 +324,11 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             struct_types: Default::default(),
             local_gen_sym_counter: Cell::new(0),
             eh_personality: Cell::new(None),
-            #[cfg(feature="master")]
+            #[cfg(feature = "master")]
             rust_try_fn: Cell::new(None),
             pointee_infos: Default::default(),
             structs_as_pointer: Default::default(),
-            #[cfg(feature="master")]
+            #[cfg(feature = "master")]
             cleanup_blocks: Default::default(),
         };
         // TODO(antoyo): instead of doing this, add SsizeT to libgccjit.
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 1625e6ecdb70..9dfdff1fdcb4 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -816,7 +816,9 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         let (_, element_ty0) = arg_tys[0].simd_size_and_type(bx.tcx());
         let (_, element_ty1) = arg_tys[1].simd_size_and_type(bx.tcx());
         let (pointer_count, underlying_ty) = match *element_ty1.kind() {
-            ty::RawPtr(p_ty, _) if p_ty == in_elem => (ptr_count(element_ty1), non_ptr(element_ty1)),
+            ty::RawPtr(p_ty, _) if p_ty == in_elem => {
+                (ptr_count(element_ty1), non_ptr(element_ty1))
+            }
             _ => {
                 require!(
                     false,

From 263166894a90e907d541686488acf3f47fedf9d2 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 27 Mar 2024 10:18:57 +0100
Subject: [PATCH 666/997] Update libgccjit version

---
 libgccjit.version | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libgccjit.version b/libgccjit.version
index 41bec6df5d95..77d9993d0fe6 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-b6f163f52
+2cf6ca7373dbaf81a5bbc5d286a98c72fff8c8ee

From 9b1211db58243e15f363caabbd7f22a45abd3654 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 3 Apr 2024 17:37:00 +0200
Subject: [PATCH 667/997] Fix casts

---
 src/builder.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 41d85bdceb77..d72082937a7d 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -153,7 +153,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         // NOTE: not sure why, but we have the wrong type here.
         let int_type = compare_exchange.get_param(2).to_rvalue().get_type();
-        let src = self.context.new_cast(self.location, src, int_type);
+        let src = self.context.new_bitcast(self.location, src, int_type);
         self.context.new_call(
             self.location,
             compare_exchange,
@@ -1617,7 +1617,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let dst = self.context.new_cast(self.location, dst, volatile_void_ptr_type);
         // FIXME(antoyo): not sure why, but we have the wrong type here.
         let new_src_type = atomic_function.get_param(1).to_rvalue().get_type();
-        let src = self.context.new_cast(self.location, src, new_src_type);
+        let src = self.context.new_bitcast(self.location, src, new_src_type);
         let res = self.context.new_call(self.location, atomic_function, &[dst, src, order]);
         self.context.new_cast(self.location, res, src.get_type())
     }

From 7615e04f8236897af5fe8876f6da1d83cb90e699 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 3 Apr 2024 17:54:20 +0200
Subject: [PATCH 668/997] Fix usage of `get_size` for gcc 12

---
 src/builder.rs | 22 +++++++++++++++++++---
 1 file changed, 19 insertions(+), 3 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index d72082937a7d..b4a01d3c065b 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -68,7 +68,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         src: RValue<'gcc>,
         order: AtomicOrdering,
     ) -> RValue<'gcc> {
-        let size = src.get_type().get_size();
+        let size = get_maybe_pointer_size(src);
 
         let func = self.current_func();
 
@@ -138,7 +138,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         failure_order: AtomicOrdering,
         weak: bool,
     ) -> RValue<'gcc> {
-        let size = src.get_type().get_size();
+        let size = get_maybe_pointer_size(src);
         let compare_exchange =
             self.context.get_builtin_function(&format!("__atomic_compare_exchange_{}", size));
         let order = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
@@ -1586,7 +1586,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         src: RValue<'gcc>,
         order: AtomicOrdering,
     ) -> RValue<'gcc> {
-        let size = src.get_type().get_size();
+        let size = get_maybe_pointer_size(src);
         let name = match op {
             AtomicRmwBinOp::AtomicXchg => format!("__atomic_exchange_{}", size),
             AtomicRmwBinOp::AtomicAdd => format!("__atomic_fetch_add_{}", size),
@@ -2419,3 +2419,19 @@ impl ToGccOrdering for AtomicOrdering {
         ordering as i32
     }
 }
+
+// Needed because gcc 12 `get_size()` doesn't work on pointers.
+#[cfg(feature = "master")]
+fn get_maybe_pointer_size(value: RValue<'_>) -> u32 {
+    value.get_type().get_size()
+}
+
+#[cfg(not(feature = "master"))]
+fn get_maybe_pointer_size(value: RValue<'_>) -> u32 {
+    let type_ = value.get_type();
+    if type_.get_pointee().is_some() {
+        std::mem::size_of::<*const ()>() as _
+    } else {
+        type_.get_size()
+    }
+}

From fd7979d46d3b19360e48fb54118761ecaed37c20 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 28 Mar 2024 00:48:07 +0100
Subject: [PATCH 669/997] Remove usage of `-Zno-parallel-llvm`

---
 tests/lang_tests_common.rs | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index 09307836fd42..aecea37ab5a9 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -80,8 +80,7 @@ pub fn main_inner(profile: Profile) {
             compiler.args([
                 &format!("-Zcodegen-backend={}/target/debug/librustc_codegen_gcc.so", current_dir),
                 "--sysroot",
-                &format!("{}/build_sysroot/sysroot/", current_dir),
-                "-Zno-parallel-llvm",
+                &format!("{}/build/build_sysroot/sysroot/", current_dir),
                 "-C",
                 "link-arg=-lc",
                 "-o",

From 621e948721abb85f9b075027180e3f15416efcfc Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 28 Mar 2024 00:55:45 +0100
Subject: [PATCH 670/997] Fix clippy lint

---
 src/builder.rs | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index b4a01d3c065b..f85971d1657e 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -190,8 +190,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let casted_args: Vec<_> = param_types
             .into_iter()
             .zip(args.iter())
-            .enumerate()
-            .map(|(_i, (expected_ty, &actual_val))| {
+            .map(|(expected_ty, &actual_val)| {
                 let actual_ty = actual_val.get_type();
                 if expected_ty != actual_ty {
                     self.bitcast(actual_val, expected_ty)

From a89f17869c74f165c72dfe1cfbce5638b966b213 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 2 Apr 2024 12:24:15 +0200
Subject: [PATCH 671/997] Fix stdarch crate add patch

---
 patches/0001-Add-stdarch-Cargo.toml-for-testing.patch | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch b/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch
index 2a55f2cb796f..9cc377850b9b 100644
--- a/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch
+++ b/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch
@@ -19,7 +19,7 @@ index 0000000..4c63700
 +members = [
 +  "crates/core_arch",
 +  "crates/std_detect",
-+  "crates/stdarch-gen",
++  "crates/stdarch-gen-arm",
 +  #"examples/"
 +]
 +exclude = [

From 068fe5d10a125c28ed4ae8f4b8e0f0e7f95eb64f Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 20 Apr 2024 01:17:46 +0200
Subject: [PATCH 672/997] If the type of a global is not the same, we remove
 the global and replace it with a new one

---
 src/consts.rs | 91 ++++++++++++++++++++++++++++++---------------------
 1 file changed, 54 insertions(+), 37 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index 3d73a60b2550..be44ebe0698a 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -1,7 +1,9 @@
 #[cfg(feature = "master")]
 use gccjit::{FnAttribute, VarAttribute, Visibility};
-use gccjit::{Function, GlobalKind, LValue, RValue, ToRValue};
+use gccjit::{Function, GlobalKind, LValue, RValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{BaseTypeMethods, ConstMethods, DerivedTypeMethods, StaticMethods};
+use rustc_hir::def::DefKind;
+use rustc_middle::bug;
 use rustc_middle::middle::codegen_fn_attrs::{CodegenFnAttrFlags, CodegenFnAttrs};
 use rustc_middle::mir::interpret::{
     self, read_target_uint, ConstAllocation, ErrorHandled, Scalar as InterpScalar,
@@ -9,7 +11,7 @@ use rustc_middle::mir::interpret::{
 use rustc_middle::mir::mono::MonoItem;
 use rustc_middle::span_bug;
 use rustc_middle::ty::layout::LayoutOf;
-use rustc_middle::ty::{self, Instance, Ty};
+use rustc_middle::ty::{self, Instance};
 use rustc_span::def_id::DefId;
 use rustc_target::abi::{self, Align, HasDataLayout, Primitive, Size, WrappingRange};
 
@@ -63,16 +65,15 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
         global_value
     }
 
+    #[cfg_attr(not(feature = "master"), allow(unused_mut))]
     fn codegen_static(&self, def_id: DefId) {
         let attrs = self.tcx.codegen_fn_attrs(def_id);
 
-        let value = match codegen_static_initializer(&self, def_id) {
-            Ok((value, _)) => value,
+        let Ok((value, alloc)) = codegen_static_initializer(self, def_id) else {
             // Error has already been reported
-            Err(_) => return,
+            return;
         };
-
-        let global = self.get_static(def_id);
+        let alloc = alloc.inner();
 
         // boolean SSA values are i1, but they have to be stored in i8 slots,
         // otherwise some LLVM optimization passes don't work as expected
@@ -81,23 +82,31 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
             unimplemented!();
         };
 
-        let instance = Instance::mono(self.tcx, def_id);
-        let ty = instance.ty(self.tcx, ty::ParamEnv::reveal_all());
-        let gcc_type = self.layout_of(ty).gcc_type(self);
+        let is_thread_local = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
+        let mut global = self.get_static_inner(def_id, val_llty);
 
-        set_global_alignment(self, global, self.align_of(ty));
+        #[cfg(feature = "master")]
+        if global.to_rvalue().get_type() != val_llty {
+            let instance = Instance::mono(self.tcx, def_id);
+            self.instances.borrow_mut().remove(&instance);
+
+            global.remove();
+            let name = self.tcx.symbol_name(instance).name;
+            self.globals.borrow_mut().remove(name);
+            global = self.get_static_inner(def_id, val_llty);
+        }
+        set_global_alignment(self, global, alloc.align);
 
-        let value = self.bitcast_if_needed(value, gcc_type);
         global.global_set_initializer_rvalue(value);
 
         // As an optimization, all shared statics which do not have interior
         // mutability are placed into read-only memory.
-        if !self.tcx.static_mutability(def_id).unwrap().is_mut() && self.type_is_freeze(ty) {
+        if alloc.mutability.is_not() {
             #[cfg(feature = "master")]
             global.global_set_readonly();
         }
 
-        if attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL) {
+        if is_thread_local {
             // Do not allow LLVM to change the alignment of a TLS on macOS.
             //
             // By default a global's alignment can be freely increased.
@@ -205,39 +214,48 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
     pub fn get_static(&self, def_id: DefId) -> LValue<'gcc> {
         let instance = Instance::mono(self.tcx, def_id);
-        let fn_attrs = self.tcx.codegen_fn_attrs(def_id);
+        let DefKind::Static { nested, .. } = self.tcx.def_kind(def_id) else { bug!() };
+        // Nested statics do not have a type, so pick a random type and let `define_static` figure out
+        // the gcc type from the actual evaluated initializer.
+        let gcc_type = if nested {
+            self.type_i8()
+        } else {
+            let ty = instance.ty(self.tcx, ty::ParamEnv::reveal_all());
+            self.layout_of(ty).gcc_type(self)
+        };
+
+        self.get_static_inner(def_id, gcc_type)
+    }
+
+    pub(crate) fn get_static_inner(&self, def_id: DefId, gcc_type: Type<'gcc>) -> LValue<'gcc> {
+        let instance = Instance::mono(self.tcx, def_id);
         if let Some(&global) = self.instances.borrow().get(&instance) {
+            trace!("used cached value");
             return global;
         }
 
-        let defined_in_current_codegen_unit =
-            self.codegen_unit.items().contains_key(&MonoItem::Static(def_id));
-        assert!(
-            !defined_in_current_codegen_unit,
-            "consts::get_static() should always hit the cache for \
-                 statics defined in the same CGU, but did not for `{:?}`",
-            def_id
-        );
-
-        let ty = instance.ty(self.tcx, ty::ParamEnv::reveal_all());
+        // FIXME: Once we stop removing globals in `codegen_static`, we can uncomment this code.
+        // let defined_in_current_codegen_unit =
+        //     self.codegen_unit.items().contains_key(&MonoItem::Static(def_id));
+        // assert!(
+        //     !defined_in_current_codegen_unit,
+        //     "consts::get_static() should always hit the cache for \
+        //          statics defined in the same CGU, but did not for `{:?}`",
+        //     def_id
+        // );
         let sym = self.tcx.symbol_name(instance).name;
+        let fn_attrs = self.tcx.codegen_fn_attrs(def_id);
 
         let global = if def_id.is_local() && !self.tcx.is_foreign_item(def_id) {
-            let llty = self.layout_of(ty).gcc_type(self);
             if let Some(global) = self.get_declared_value(sym) {
-                if self.val_ty(global) != self.type_ptr_to(llty) {
+                if self.val_ty(global) != self.type_ptr_to(gcc_type) {
                     span_bug!(self.tcx.def_span(def_id), "Conflicting types for static");
                 }
             }
 
             let is_tls = fn_attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-            let global = self.declare_global(
-                &sym,
-                llty,
-                GlobalKind::Exported,
-                is_tls,
-                fn_attrs.link_section,
-            );
+            let global =
+                self.declare_global(sym, gcc_type, GlobalKind::Exported, is_tls, fn_attrs.link_section);
 
             if !self.tcx.is_reachable_non_generic(def_id) {
                 #[cfg(feature = "master")]
@@ -246,7 +264,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
             global
         } else {
-            check_and_apply_linkage(&self, &fn_attrs, ty, sym)
+            check_and_apply_linkage(self, fn_attrs, gcc_type, sym)
         };
 
         if !def_id.is_local() {
@@ -360,11 +378,10 @@ fn codegen_static_initializer<'gcc, 'tcx>(
 fn check_and_apply_linkage<'gcc, 'tcx>(
     cx: &CodegenCx<'gcc, 'tcx>,
     attrs: &CodegenFnAttrs,
-    ty: Ty<'tcx>,
+    gcc_type: Type<'gcc>,
     sym: &str,
 ) -> LValue<'gcc> {
     let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-    let gcc_type = cx.layout_of(ty).gcc_type(cx);
     if let Some(linkage) = attrs.import_linkage {
         // Declare a symbol `foo` with the desired linkage.
         let global1 = cx.declare_global_with_linkage(

From 684a69b4e656c8d3c05fa0d56056371e3cef42c2 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Thu, 25 Apr 2024 14:26:50 +0200
Subject: [PATCH 673/997] Update gcc version to
 272d0ccced960394fe6ff2b40b01610208cb4940

---
 libgccjit.version | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libgccjit.version b/libgccjit.version
index 77d9993d0fe6..71a61a4b8735 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-2cf6ca7373dbaf81a5bbc5d286a98c72fff8c8ee
+272d0ccced960394fe6ff2b40b01610208cb4940

From 30ee7ba862f97bf32c1fc665590edd71901d12d1 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 21 May 2024 16:30:55 +0200
Subject: [PATCH 674/997] Add shl and shr missing casts

---
 src/context.rs |  2 +-
 src/int.rs     | 24 ++++++++++++++++++++++--
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/src/context.rs b/src/context.rs
index a082bc1b2fc2..0e3d79077992 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -613,7 +613,7 @@ impl<'b, 'tcx> CodegenCx<'b, 'tcx> {
         // user defined names
         let mut name = String::with_capacity(prefix.len() + 6);
         name.push_str(prefix);
-        name.push_str(".");
+        name.push('.');
         name.push_str(&(idx as u64).to_base(ALPHANUMERIC_ONLY));
         name
     }
diff --git a/src/int.rs b/src/int.rs
index 841bcf592e48..218198b9c576 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -83,7 +83,17 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let b = self.context.new_cast(self.location, b, a_type);
                 a >> b
             } else {
-                a >> b
+                let a_size = a_type.get_size();
+                let b_size = b_type.get_size();
+                if a_size > b_size {
+                    let b = self.context.new_cast(self.location, b, a_type);
+                    a >> b
+                } else if a_size < b_size {
+                    let a = self.context.new_cast(self.location, a, b_type);
+                    a >> b
+                } else {
+                    a >> b
+                }
             }
         } else if a_type.is_vector() && a_type.is_vector() {
             a >> b
@@ -635,7 +645,17 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let b = self.context.new_cast(self.location, b, a_type);
                 a << b
             } else {
-                a << b
+                let a_size = a_type.get_size();
+                let b_size = b_type.get_size();
+                if a_size > b_size {
+                    let b = self.context.new_cast(self.location, b, a_type);
+                    a << b
+                } else if a_size < b_size {
+                    let a = self.context.new_cast(self.location, a, b_type);
+                    a << b
+                } else {
+                    a << b
+                }
             }
         } else if a_type.is_vector() && a_type.is_vector() {
             a << b

From ca654047fb130962943df137dabd6e58929319e8 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 21 May 2024 16:57:53 +0200
Subject: [PATCH 675/997] Add missing cast for function_ptr arguments

---
 src/builder.rs | 14 +++++++++++++-
 src/consts.rs  |  9 +++++++--
 src/lib.rs     |  2 +-
 3 files changed, 21 insertions(+), 4 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index f85971d1657e..c5819ff93d74 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -252,7 +252,19 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                     {
                         self.context.new_cast(self.location, actual_val, expected_ty)
                     } else if on_stack_param_indices.contains(&index) {
-                        actual_val.dereference(self.location).to_rvalue()
+                        let ty = actual_val.get_type();
+                        if let Some(pointee_val) = ty.get_pointee()
+                            && pointee_val != expected_ty
+                        {
+                            let new_val = self.context.new_cast(
+                                self.location,
+                                actual_val,
+                                expected_ty.make_pointer(),
+                            );
+                            new_val.dereference(self.location).to_rvalue()
+                        } else {
+                            actual_val.dereference(self.location).to_rvalue()
+                        }
                     } else {
                         assert!(
                             !((actual_ty.is_vector() && !expected_ty.is_vector())
diff --git a/src/consts.rs b/src/consts.rs
index be44ebe0698a..735793baf610 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -254,8 +254,13 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             }
 
             let is_tls = fn_attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-            let global =
-                self.declare_global(sym, gcc_type, GlobalKind::Exported, is_tls, fn_attrs.link_section);
+            let global = self.declare_global(
+                sym,
+                gcc_type,
+                GlobalKind::Exported,
+                is_tls,
+                fn_attrs.link_section,
+            );
 
             if !self.tcx.is_reachable_non_generic(def_id) {
                 #[cfg(feature = "master")]
diff --git a/src/lib.rs b/src/lib.rs
index 24856506c464..d83938569551 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -16,7 +16,7 @@
 #![allow(internal_features)]
 #![doc(rust_logo)]
 #![feature(rustdoc_internals)]
-#![feature(rustc_private, decl_macro, never_type, trusted_len, hash_raw_entry)]
+#![feature(rustc_private, decl_macro, never_type, trusted_len, hash_raw_entry, let_chains)]
 #![allow(broken_intra_doc_links)]
 #![recursion_limit = "256"]
 #![warn(rust_2018_idioms)]

From 527c04958469c3d8701d3ab0dedb16fa396a7900 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 21 May 2024 23:09:34 +0200
Subject: [PATCH 676/997] Fix warnings

---
 src/consts.rs  | 3 +--
 src/type_of.rs | 8 +-------
 2 files changed, 2 insertions(+), 9 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index 735793baf610..93c23440c57c 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -1,14 +1,13 @@
 #[cfg(feature = "master")]
 use gccjit::{FnAttribute, VarAttribute, Visibility};
 use gccjit::{Function, GlobalKind, LValue, RValue, ToRValue, Type};
-use rustc_codegen_ssa::traits::{BaseTypeMethods, ConstMethods, DerivedTypeMethods, StaticMethods};
+use rustc_codegen_ssa::traits::{BaseTypeMethods, ConstMethods, StaticMethods};
 use rustc_hir::def::DefKind;
 use rustc_middle::bug;
 use rustc_middle::middle::codegen_fn_attrs::{CodegenFnAttrFlags, CodegenFnAttrs};
 use rustc_middle::mir::interpret::{
     self, read_target_uint, ConstAllocation, ErrorHandled, Scalar as InterpScalar,
 };
-use rustc_middle::mir::mono::MonoItem;
 use rustc_middle::span_bug;
 use rustc_middle::ty::layout::LayoutOf;
 use rustc_middle::ty::{self, Instance};
diff --git a/src/type_of.rs b/src/type_of.rs
index a88d50cb4340..24eab8e9a1e8 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -8,7 +8,7 @@ use rustc_middle::ty::print::with_no_trimmed_paths;
 use rustc_middle::ty::{self, CoroutineArgsExt, Ty, TypeVisitableExt};
 use rustc_target::abi::call::{CastTarget, FnAbi, Reg};
 use rustc_target::abi::{
-    self, Abi, Align, FieldsShape, Float, Int, Integer, PointeeInfo, Pointer, Size, TyAbiInterface,
+    self, Abi, FieldsShape, Float, Int, Integer, PointeeInfo, Pointer, Size, TyAbiInterface,
     Variants,
 };
 
@@ -53,12 +53,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 }
 
-impl<'a, 'tcx> CodegenCx<'a, 'tcx> {
-    pub fn align_of(&self, ty: Ty<'tcx>) -> Align {
-        self.layout_of(ty).align.abi
-    }
-}
-
 fn uncached_gcc_type<'gcc, 'tcx>(
     cx: &CodegenCx<'gcc, 'tcx>,
     layout: TyAndLayout<'tcx>,

From dd4a546de0af391759a901ac070e6ca66a6c7af1 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 22 May 2024 15:19:15 +0200
Subject: [PATCH 677/997] Add explanations for ptr func call argument cast

---
 src/builder.rs | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/builder.rs b/src/builder.rs
index c5819ff93d74..0d5ef42833d0 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -253,6 +253,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                         self.context.new_cast(self.location, actual_val, expected_ty)
                     } else if on_stack_param_indices.contains(&index) {
                         let ty = actual_val.get_type();
+                        // It's possible that the value behind the pointer is actually not exactly
+                        // the expected type, so to go around that, we add a cast before
+                        // dereferencing the value.
                         if let Some(pointee_val) = ty.get_pointee()
                             && pointee_val != expected_ty
                         {

From 0ffcbb0f6eda96ade2f1c3fbda4316998b8fbb90 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 12 Jun 2024 08:43:28 -0400
Subject: [PATCH 678/997] Remove the hack in zext

TODO: make sure this doesn't break something else.
---
 src/builder.rs | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 0d5ef42833d0..91a019318a84 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1687,11 +1687,6 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn zext(&mut self, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
         // FIXME(antoyo): this does not zero-extend.
-        if value.get_type().is_bool() && dest_typ.is_i8(&self.cx) {
-            // FIXME(antoyo): hack because base::from_immediate converts i1 to i8.
-            // Fix the code in codegen_ssa::base::from_immediate.
-            return value;
-        }
         self.gcc_int_cast(value, dest_typ)
     }
 

From e8e6663167618b7674165f894edf7acbf03980e1 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 18 Jun 2024 12:56:20 -0400
Subject: [PATCH 679/997] Fix provenance intrinsics

---
 Cargo.lock            |   6 +-
 Cargo.toml            |   3 +-
 rust-toolchain        |   2 +-
 src/intrinsic/simd.rs | 135 ++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 140 insertions(+), 6 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 3ecb0ef6b4d2..ba6633bc2dcb 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -80,8 +80,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "2.0.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ecaa4c3da2d74c1a991b4faff75d49ab1d0522d9a99d8e2614b3b04d226417ce"
+source = "git+https://github.com/rust-lang/gccjit.rs#f1545d7c2c13e42d78eaac8032d49ab8f7d43b6e"
 dependencies = [
  "gccjit_sys",
 ]
@@ -89,8 +88,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.1.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "406a66fba005f1a02661f2f9443e5693dd3a667b7c58e70aa4ccc4c8b50b4758"
+source = "git+https://github.com/rust-lang/gccjit.rs#f1545d7c2c13e42d78eaac8032d49ab8f7d43b6e"
 dependencies = [
  "libc",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index c5aa2eed1e00..309746f04e01 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,7 +22,8 @@ master = ["gccjit/master"]
 default = ["master"]
 
 [dependencies]
-gccjit = "2.0"
+#gccjit = "2.0"
+gccjit = { git = "https://github.com/rust-lang/gccjit.rs" }
 
 # Local copy.
 #gccjit = { path = "../gccjit.rs" }
diff --git a/rust-toolchain b/rust-toolchain
index a0ac82866609..7a1806fe3c76 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2024-03-05"
+channel = "nightly-2024-06-18"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 9dfdff1fdcb4..0c52bfd21923 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -436,6 +436,141 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         return Ok(bx.vector_select(args[0].immediate(), args[1].immediate(), args[2].immediate()));
     }
 
+    if name == sym::simd_cast_ptr {
+        require_simd!(ret_ty, InvalidMonomorphization::SimdReturn { span, name, ty: ret_ty });
+        let (out_len, out_elem) = ret_ty.simd_size_and_type(bx.tcx());
+
+        require!(
+            in_len == out_len,
+            InvalidMonomorphization::ReturnLengthInputType {
+                span,
+                name,
+                in_len,
+                in_ty,
+                ret_ty,
+                out_len
+            }
+        );
+
+        match *in_elem.kind() {
+            ty::RawPtr(p_ty, _) => {
+                let metadata = p_ty.ptr_metadata_ty(bx.tcx, |ty| {
+                    bx.tcx.normalize_erasing_regions(ty::ParamEnv::reveal_all(), ty)
+                });
+                require!(
+                    metadata.is_unit(),
+                    InvalidMonomorphization::CastFatPointer { span, name, ty: in_elem }
+                );
+            }
+            _ => {
+                return_error!(InvalidMonomorphization::ExpectedPointer { span, name, ty: in_elem })
+            }
+        }
+        match *out_elem.kind() {
+            ty::RawPtr(p_ty, _) => {
+                let metadata = p_ty.ptr_metadata_ty(bx.tcx, |ty| {
+                    bx.tcx.normalize_erasing_regions(ty::ParamEnv::reveal_all(), ty)
+                });
+                require!(
+                    metadata.is_unit(),
+                    InvalidMonomorphization::CastFatPointer { span, name, ty: out_elem }
+                );
+            }
+            _ => {
+                return_error!(InvalidMonomorphization::ExpectedPointer { span, name, ty: out_elem })
+            }
+        }
+
+        let arg = args[0].immediate();
+        let elem_type = llret_ty.dyncast_vector().expect("vector return type").get_element_type();
+        let values: Vec<_> = (0..in_len)
+            .map(|i| {
+                let idx = bx.gcc_int(bx.usize_type, i as _);
+                let value = bx.extract_element(arg, idx);
+                bx.pointercast(value, elem_type)
+            })
+            .collect();
+        return Ok(bx.context.new_rvalue_from_vector(bx.location, llret_ty, &values));
+    }
+
+    if name == sym::simd_expose_provenance {
+        require_simd!(ret_ty, InvalidMonomorphization::SimdReturn { span, name, ty: ret_ty });
+        let (out_len, out_elem) = ret_ty.simd_size_and_type(bx.tcx());
+
+        require!(
+            in_len == out_len,
+            InvalidMonomorphization::ReturnLengthInputType {
+                span,
+                name,
+                in_len,
+                in_ty,
+                ret_ty,
+                out_len
+            }
+        );
+
+        match *in_elem.kind() {
+            ty::RawPtr(_, _) => {}
+            _ => {
+                return_error!(InvalidMonomorphization::ExpectedPointer { span, name, ty: in_elem })
+            }
+        }
+        match *out_elem.kind() {
+            ty::Uint(ty::UintTy::Usize) => {}
+            _ => return_error!(InvalidMonomorphization::ExpectedUsize { span, name, ty: out_elem }),
+        }
+
+        let arg = args[0].immediate();
+        let elem_type = llret_ty.dyncast_vector().expect("vector return type").get_element_type();
+        let values: Vec<_> = (0..in_len)
+            .map(|i| {
+                let idx = bx.gcc_int(bx.usize_type, i as _);
+                let value = bx.extract_element(arg, idx);
+                bx.ptrtoint(value, elem_type)
+            })
+            .collect();
+        return Ok(bx.context.new_rvalue_from_vector(bx.location, llret_ty, &values));
+    }
+
+    if name == sym::simd_with_exposed_provenance {
+        require_simd!(ret_ty, InvalidMonomorphization::SimdReturn { span, name, ty: ret_ty });
+        let (out_len, out_elem) = ret_ty.simd_size_and_type(bx.tcx());
+
+        require!(
+            in_len == out_len,
+            InvalidMonomorphization::ReturnLengthInputType {
+                span,
+                name,
+                in_len,
+                in_ty,
+                ret_ty,
+                out_len
+            }
+        );
+
+        match *in_elem.kind() {
+            ty::Uint(ty::UintTy::Usize) => {}
+            _ => return_error!(InvalidMonomorphization::ExpectedUsize { span, name, ty: in_elem }),
+        }
+        match *out_elem.kind() {
+            ty::RawPtr(_, _) => {}
+            _ => {
+                return_error!(InvalidMonomorphization::ExpectedPointer { span, name, ty: out_elem })
+            }
+        }
+
+        let arg = args[0].immediate();
+        let elem_type = llret_ty.dyncast_vector().expect("vector return type").get_element_type();
+        let values: Vec<_> = (0..in_len)
+            .map(|i| {
+                let idx = bx.gcc_int(bx.usize_type, i as _);
+                let value = bx.extract_element(arg, idx);
+                bx.inttoptr(value, elem_type)
+            })
+            .collect();
+        return Ok(bx.context.new_rvalue_from_vector(bx.location, llret_ty, &values));
+    }
+
     #[cfg(feature = "master")]
     if name == sym::simd_cast || name == sym::simd_as {
         require_simd!(ret_ty, InvalidMonomorphization::SimdReturn { span, name, ty: ret_ty });

From 9ca76588177de76422cb54a416555b8b2fc234f9 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 18 Jun 2024 12:58:01 -0400
Subject: [PATCH 680/997] Fix tests

---
 ...0001-core-Disable-portable-simd-test.patch | 14 +++----
 src/asm.rs                                    |  5 +--
 src/builder.rs                                |  4 +-
 src/context.rs                                |  2 +-
 src/int.rs                                    | 36 +++++++++-------
 src/intrinsic/mod.rs                          | 14 +++++--
 src/intrinsic/simd.rs                         |  1 +
 src/mono_item.rs                              |  2 +-
 tests/failing-run-make-tests.txt              | 42 +++++++++++++++++++
 tests/failing-ui-tests.txt                    |  1 -
 tests/run/array.rs                            | 11 +++++
 tests/run/assign.rs                           |  6 +++
 tests/run/closure.rs                          |  6 +++
 tests/run/mut_ref.rs                          |  6 +++
 tests/run/operations.rs                       | 18 ++++++++
 15 files changed, 133 insertions(+), 35 deletions(-)
 create mode 100644 tests/failing-run-make-tests.txt

diff --git a/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch b/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
index 36d0789d2a23..c060300f44f6 100644
--- a/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
+++ b/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
@@ -1,4 +1,4 @@
-From a5663265f797a43c502915c356fe7899c16cee92 Mon Sep 17 00:00:00 2001
+From 124a11ce086952a5794d5cfbaa45175809497b81 Mon Sep 17 00:00:00 2001
 From: None <none@example.com>
 Date: Sat, 18 Nov 2023 10:50:36 -0500
 Subject: [PATCH] [core] Disable portable-simd test
@@ -8,18 +8,18 @@ Subject: [PATCH] [core] Disable portable-simd test
  1 file changed, 2 deletions(-)
 
 diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
-index d0a119c..76fdece 100644
+index b71786c..cf484d5 100644
 --- a/library/core/tests/lib.rs
 +++ b/library/core/tests/lib.rs
-@@ -89,7 +89,6 @@
+@@ -95,7 +95,6 @@
  #![feature(never_type)]
  #![feature(unwrap_infallible)]
  #![feature(pointer_is_aligned_to)]
 -#![feature(portable_simd)]
  #![feature(ptr_metadata)]
- #![feature(lazy_cell)]
  #![feature(unsized_tuple_coercion)]
-@@ -155,7 +154,6 @@ mod pin;
+ #![feature(const_option)]
+@@ -157,7 +156,6 @@ mod pin;
  mod pin_macro;
  mod ptr;
  mod result;
@@ -27,6 +27,6 @@ index d0a119c..76fdece 100644
  mod slice;
  mod str;
  mod str_lossy;
---
-2.42.1
+-- 
+2.45.2
 
diff --git a/src/asm.rs b/src/asm.rs
index 06b14a1f118a..60e63efe57b7 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -538,9 +538,8 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         }
         if dest.is_none() && options.contains(InlineAsmOptions::NORETURN) {
             let builtin_unreachable = self.context.get_builtin_function("__builtin_unreachable");
-            let builtin_unreachable: RValue<'gcc> = unsafe {
-                std::mem::transmute(builtin_unreachable)
-            };
+            let builtin_unreachable: RValue<'gcc> =
+                unsafe { std::mem::transmute(builtin_unreachable) };
             self.call(self.type_void(), None, None, builtin_unreachable, &[], None, None);
         }
 
diff --git a/src/builder.rs b/src/builder.rs
index 91a019318a84..4cbc8175aa07 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1004,7 +1004,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             }
         }
 
-        let val = if let Some(_) = place.val.llextra {
+        let val = if place.val.llextra.is_some() {
             // FIXME: Merge with the `else` below?
             OperandValue::Ref(place.val)
         } else if place.layout.is_gcc_immediate() {
@@ -1672,7 +1672,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         _instance: Option<Instance<'tcx>>,
     ) -> RValue<'gcc> {
         // FIXME(antoyo): remove when having a proper API.
-        let gcc_func = unsafe { std::mem::transmute(func) };
+        let gcc_func = unsafe { std::mem::transmute::<RValue<'gcc>, Function<'gcc>>(func) };
         let call = if self.functions.borrow().values().any(|value| *value == gcc_func) {
             self.function_call(func, args, funclet)
         } else {
diff --git a/src/context.rs b/src/context.rs
index 0e3d79077992..c5d5c6bc846d 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -495,7 +495,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                     "rust_eh_personality"
                 };
                 let func = self.declare_func(name, self.type_i32(), &[], true);
-                unsafe { std::mem::transmute(func) }
+                unsafe { std::mem::transmute::<Function<'gcc>, RValue<'gcc>>(func) }
             }
         };
         // TODO(antoyo): apply target cpu attributes.
diff --git a/src/int.rs b/src/int.rs
index 218198b9c576..a095dd395396 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -85,14 +85,16 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             } else {
                 let a_size = a_type.get_size();
                 let b_size = b_type.get_size();
-                if a_size > b_size {
-                    let b = self.context.new_cast(self.location, b, a_type);
-                    a >> b
-                } else if a_size < b_size {
-                    let a = self.context.new_cast(self.location, a, b_type);
-                    a >> b
-                } else {
-                    a >> b
+                match a_size.cmp(&b_size) {
+                    std::cmp::Ordering::Less => {
+                        let a = self.context.new_cast(self.location, a, b_type);
+                        a >> b
+                    }
+                    std::cmp::Ordering::Equal => a >> b,
+                    std::cmp::Ordering::Greater => {
+                        let b = self.context.new_cast(self.location, b, a_type);
+                        a >> b
+                    }
                 }
             }
         } else if a_type.is_vector() && a_type.is_vector() {
@@ -647,14 +649,16 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             } else {
                 let a_size = a_type.get_size();
                 let b_size = b_type.get_size();
-                if a_size > b_size {
-                    let b = self.context.new_cast(self.location, b, a_type);
-                    a << b
-                } else if a_size < b_size {
-                    let a = self.context.new_cast(self.location, a, b_type);
-                    a << b
-                } else {
-                    a << b
+                match a_size.cmp(&b_size) {
+                    std::cmp::Ordering::Less => {
+                        let a = self.context.new_cast(self.location, a, b_type);
+                        a << b
+                    }
+                    std::cmp::Ordering::Equal => a << b,
+                    std::cmp::Ordering::Greater => {
+                        let b = self.context.new_cast(self.location, b, a_type);
+                        a << b
+                    }
                 }
             }
         } else if a_type.is_vector() && a_type.is_vector() {
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 43f12b514aff..1e09572e6128 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -125,7 +125,9 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         let llval = match name {
             _ if simple.is_some() => {
                 // FIXME(antoyo): remove this cast when the API supports function.
-                let func = unsafe { std::mem::transmute(simple.expect("simple")) };
+                let func = unsafe {
+                    std::mem::transmute::<Function<'gcc>, RValue<'gcc>>(simple.expect("simple"))
+                };
                 self.call(
                     self.type_void(),
                     None,
@@ -670,7 +672,11 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let step3 = self.or(left, right);
 
                 // Fourth step.
-                if width == 8 { step3 } else { self.gcc_bswap(step3, width) }
+                if width == 8 {
+                    step3
+                } else {
+                    self.gcc_bswap(step3, width)
+                }
             }
             128 => {
                 // TODO(antoyo): find a more efficient implementation?
@@ -1189,7 +1195,7 @@ fn codegen_gnu_try<'gcc>(
         bx.invoke(try_func_ty, None, None, try_func, &[data], then, catch, None, None);
     });
 
-    let func = unsafe { std::mem::transmute(func) };
+    let func = unsafe { std::mem::transmute::<Function<'gcc>, RValue<'gcc>>(func) };
 
     // Note that no invoke is used here because by definition this function
     // can't panic (that's what it's catching).
@@ -1263,7 +1269,7 @@ fn gen_fn<'a, 'gcc, 'tcx>(
     // FIXME(eddyb) find a nicer way to do this.
     cx.linkage.set(FunctionType::Internal);
     let func = cx.declare_fn(name, fn_abi);
-    let func_val = unsafe { std::mem::transmute(func) };
+    let func_val = unsafe { std::mem::transmute::<Function<'gcc>, RValue<'gcc>>(func) };
     cx.set_frame_pointer_type(func_val);
     cx.apply_target_cpu_attr(func_val);
     let block = Builder::append_block(cx, func_val, "entry-block");
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 0c52bfd21923..a54e7107a906 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -13,6 +13,7 @@ use rustc_codegen_ssa::errors::InvalidMonomorphization;
 use rustc_codegen_ssa::mir::operand::OperandRef;
 use rustc_codegen_ssa::mir::place::PlaceRef;
 use rustc_codegen_ssa::traits::{BaseTypeMethods, BuilderMethods};
+#[cfg(feature = "master")]
 use rustc_hir as hir;
 use rustc_middle::mir::BinOp;
 use rustc_middle::span_bug;
diff --git a/src/mono_item.rs b/src/mono_item.rs
index 359d3c70b4ca..44657ad4f6e2 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -81,6 +81,6 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         // TODO(antoyo): use inline attribute from there in linkage.set() above.
 
         self.functions.borrow_mut().insert(symbol_name.to_string(), decl);
-        self.function_instances.borrow_mut().insert(instance, unsafe { std::mem::transmute(decl) });
+        self.function_instances.borrow_mut().insert(instance, decl);
     }
 }
diff --git a/tests/failing-run-make-tests.txt b/tests/failing-run-make-tests.txt
new file mode 100644
index 000000000000..842533cd3c62
--- /dev/null
+++ b/tests/failing-run-make-tests.txt
@@ -0,0 +1,42 @@
+tests/run-make/a-b-a-linker-guard/
+tests/run-make/CURRENT_RUSTC_VERSION/
+tests/run-make/cross-lang-lto/
+tests/run-make/cross-lang-lto-upstream-rlibs/
+tests/run-make/doctests-keep-binaries/
+tests/run-make/doctests-runtool/
+tests/run-make/emit-shared-files/
+tests/run-make/exit-code/
+tests/run-make/issue-22131/
+tests/run-make/issue-64153/
+tests/run-make/llvm-ident/
+tests/run-make/native-link-modifier-bundle/
+tests/run-make/remap-path-prefix-dwarf/
+tests/run-make/repr128-dwarf/
+tests/run-make/rlib-format-packed-bundled-libs/
+tests/run-make/rlib-format-packed-bundled-libs-2/
+tests/run-make/rustdoc-determinism/
+tests/run-make/rustdoc-error-lines/
+tests/run-make/rustdoc-map-file/
+tests/run-make/rustdoc-output-path/
+tests/run-make/rustdoc-scrape-examples-invalid-expr/
+tests/run-make/rustdoc-scrape-examples-multiple/
+tests/run-make/rustdoc-scrape-examples-ordering/
+tests/run-make/rustdoc-scrape-examples-remap/
+tests/run-make/rustdoc-scrape-examples-test/
+tests/run-make/rustdoc-scrape-examples-whitespace/
+tests/run-make/rustdoc-scrape-examples-macros/
+tests/run-make/rustdoc-with-out-dir-option/
+tests/run-make/rustdoc-verify-output-files/
+tests/run-make/rustdoc-themes/
+tests/run-make/rustdoc-with-short-out-dir-option/
+tests/run-make/rustdoc-with-output-option/
+tests/run-make/arguments-non-c-like-enum/
+tests/run-make/c-link-to-rust-staticlib/
+tests/run-make/foreign-double-unwind/
+tests/run-make/foreign-exceptions/
+tests/run-make/glibc-staticlib-args/
+tests/run-make/issue-36710/
+tests/run-make/issue-68794-textrel-on-minimal-lib/
+tests/run-make/lto-smoke-c/
+tests/run-make/return-non-c-like-enum/
+
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index d13562f8bb01..7cc3b0dee0f5 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -14,7 +14,6 @@ tests/ui/sepcomp/sepcomp-fns-backwards.rs
 tests/ui/sepcomp/sepcomp-fns.rs
 tests/ui/sepcomp/sepcomp-statics.rs
 tests/ui/asm/x86_64/may_unwind.rs
-tests/ui/backtrace.rs
 tests/ui/catch-unwind-bang.rs
 tests/ui/cfg/cfg-panic-abort.rs
 tests/ui/drop/dynamic-drop-async.rs
diff --git a/tests/run/array.rs b/tests/run/array.rs
index afd0eed82004..3fe8917c9a3c 100644
--- a/tests/run/array.rs
+++ b/tests/run/array.rs
@@ -205,6 +205,17 @@ impl Sub for i16 {
     }
 }
 
+#[track_caller]
+#[lang = "panic_const_add_overflow"]
+pub fn panic_const_add_overflow() -> ! {
+    panic("attempt to add with overflow");
+}
+
+#[track_caller]
+#[lang = "panic_const_sub_overflow"]
+pub fn panic_const_sub_overflow() -> ! {
+    panic("attempt to subtract with overflow");
+}
 
 /*
  * Code
diff --git a/tests/run/assign.rs b/tests/run/assign.rs
index 5b0db2da294d..e105d64a8ad8 100644
--- a/tests/run/assign.rs
+++ b/tests/run/assign.rs
@@ -120,6 +120,12 @@ impl Add for isize {
     }
 }
 
+#[track_caller]
+#[lang = "panic_const_add_overflow"]
+pub fn panic_const_add_overflow() -> ! {
+    panic("attempt to add with overflow");
+}
+
 /*
  * Code
  */
diff --git a/tests/run/closure.rs b/tests/run/closure.rs
index 4ce528f86800..355f0acee747 100644
--- a/tests/run/closure.rs
+++ b/tests/run/closure.rs
@@ -189,6 +189,12 @@ pub fn panic(_msg: &'static str) -> ! {
     }
 }
 
+#[track_caller]
+#[lang = "panic_const_add_overflow"]
+pub fn panic_const_add_overflow() -> ! {
+    panic("attempt to add with overflow");
+}
+
 /*
  * Code
  */
diff --git a/tests/run/mut_ref.rs b/tests/run/mut_ref.rs
index 194e55a3deae..5a3f72b69047 100644
--- a/tests/run/mut_ref.rs
+++ b/tests/run/mut_ref.rs
@@ -122,6 +122,12 @@ impl Add for isize {
     }
 }
 
+#[track_caller]
+#[lang = "panic_const_add_overflow"]
+pub fn panic_const_add_overflow() -> ! {
+    panic("attempt to add with overflow");
+}
+
 /*
  * Code
  */
diff --git a/tests/run/operations.rs b/tests/run/operations.rs
index 2d781670873f..d697bd921cd1 100644
--- a/tests/run/operations.rs
+++ b/tests/run/operations.rs
@@ -207,6 +207,24 @@ impl Mul for isize {
     }
 }
 
+#[track_caller]
+#[lang = "panic_const_add_overflow"]
+pub fn panic_const_add_overflow() -> ! {
+    panic("attempt to add with overflow");
+}
+
+#[track_caller]
+#[lang = "panic_const_sub_overflow"]
+pub fn panic_const_sub_overflow() -> ! {
+    panic("attempt to subtract with overflow");
+}
+
+#[track_caller]
+#[lang = "panic_const_mul_overflow"]
+pub fn panic_const_mul_overflow() -> ! {
+    panic("attempt to multiply with overflow");
+}
+
 /*
  * Code
  */

From 21b1b11981b1c679c32e723cefcc1eb76b0b9a62 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 26 Jun 2024 08:54:49 -0400
Subject: [PATCH 681/997] WIP: Implement dummy ThinLTO

FIXME: This seems very slow.
==> Not sure anymore: compare with the master branch.
---
 build_system/src/config.rs |   5 +-
 src/back/lto.rs            | 404 ++++++++++++++++++++++++++++++++++++-
 src/back/write.rs          |  17 +-
 src/base.rs                |   7 +-
 src/lib.rs                 |  47 ++---
 5 files changed, 438 insertions(+), 42 deletions(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 34c92a3485ed..88e1424a2841 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -426,9 +426,10 @@ impl ConfigInfo {
 
         // Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
         // TODO(antoyo): remove when we can handle ThinLTO.
-        if !env.contains_key(&"FAT_LTO".to_string()) {
+        // TODO: remove:
+        /*if !env.contains_key(&"FAT_LTO".to_string()) {
             rustflags.push("-Clto=off".to_string());
-        }
+        }*/
         // FIXME(antoyo): remove once the atomic shim is gone
         if os_name == "Darwin" {
             rustflags.extend_from_slice(&[
diff --git a/src/back/lto.rs b/src/back/lto.rs
index ec70fbdddb0f..5b6eec855503 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -16,13 +16,14 @@
 // /usr/bin/ld: warning: type of symbol `_RNvNvNvNtCs5JWOrf9uCus_5rayon11thread_pool19WORKER_THREAD_STATE7___getit5___KEY' changed from 1 to 6 in /tmp/ccKeUSiR.ltrans0.ltrans.o
 // /usr/bin/ld: warning: type of symbol `_RNvNvNvNvNtNtNtCsAj5i4SGTR7_3std4sync4mpmc5waker17current_thread_id5DUMMY7___getit5___KEY' changed from 1 to 6 in /tmp/ccKeUSiR.ltrans0.ltrans.o
 // /usr/bin/ld: warning: incremental linking of LTO and non-LTO objects; using -flinker-output=nolto-rel which will bypass whole program optimization
-use std::ffi::CString;
+use std::ffi::{CStr, CString};
 use std::fs::{self, File};
 use std::path::{Path, PathBuf};
+use std::sync::Arc;
 
-use gccjit::OutputKind;
+use gccjit::{Context, OutputKind};
 use object::read::archive::ArchiveFile;
-use rustc_codegen_ssa::back::lto::{LtoModuleCodegen, SerializedModule};
+use rustc_codegen_ssa::back::lto::{LtoModuleCodegen, SerializedModule, ThinModule, ThinShared};
 use rustc_codegen_ssa::back::symbol_export;
 use rustc_codegen_ssa::back::write::{CodegenContext, FatLtoInput};
 use rustc_codegen_ssa::traits::*;
@@ -30,6 +31,7 @@ use rustc_codegen_ssa::{looks_like_rust_object_file, ModuleCodegen, ModuleKind};
 use rustc_data_structures::memmap::Mmap;
 use rustc_errors::{DiagCtxtHandle, FatalError};
 use rustc_hir::def_id::LOCAL_CRATE;
+use rustc_middle::bug;
 use rustc_middle::dep_graph::WorkProduct;
 use rustc_middle::middle::exported_symbols::{SymbolExportInfo, SymbolExportLevel};
 use rustc_session::config::{CrateType, Lto};
@@ -349,6 +351,400 @@ impl ModuleBuffer {
 
 impl ModuleBufferMethods for ModuleBuffer {
     fn data(&self) -> &[u8] {
-        unimplemented!("data not needed for GCC codegen");
+        &[]
     }
 }
+
+/// Performs thin LTO by performing necessary global analysis and returning two
+/// lists, one of the modules that need optimization and another for modules that
+/// can simply be copied over from the incr. comp. cache.
+pub(crate) fn run_thin(
+    cgcx: &CodegenContext<GccCodegenBackend>,
+    modules: Vec<(String, ThinBuffer)>,
+    cached_modules: Vec<(SerializedModule<ModuleBuffer>, WorkProduct)>,
+) -> Result<(Vec<LtoModuleCodegen<GccCodegenBackend>>, Vec<WorkProduct>), FatalError> {
+    let dcx = cgcx.create_dcx();
+    let lto_data = prepare_lto(cgcx, &dcx)?;
+    /*let symbols_below_threshold =
+    symbols_below_threshold.iter().map(|c| c.as_ptr()).collect::<Vec<_>>();*/
+    if cgcx.opts.cg.linker_plugin_lto.enabled() {
+        unreachable!(
+            "We should never reach this case if the LTO step \
+                      is deferred to the linker"
+        );
+    }
+    thin_lto(
+        cgcx,
+        &dcx,
+        modules,
+        lto_data.upstream_modules,
+        lto_data.tmp_path,
+        cached_modules, /*, &symbols_below_threshold*/
+    )
+}
+
+pub(crate) fn prepare_thin(
+    module: ModuleCodegen<GccContext>,
+    _emit_summary: bool,
+) -> (String, ThinBuffer) {
+    let name = module.name;
+    //let buffer = ThinBuffer::new(module.module_llvm.context, true, emit_summary);
+    let buffer = ThinBuffer::new(&module.module_llvm.context);
+    (name, buffer)
+}
+
+/// Prepare "thin" LTO to get run on these modules.
+///
+/// The general structure of ThinLTO is quite different from the structure of
+/// "fat" LTO above. With "fat" LTO all LLVM modules in question are merged into
+/// one giant LLVM module, and then we run more optimization passes over this
+/// big module after internalizing most symbols. Thin LTO, on the other hand,
+/// avoid this large bottleneck through more targeted optimization.
+///
+/// At a high level Thin LTO looks like:
+///
+///    1. Prepare a "summary" of each LLVM module in question which describes
+///       the values inside, cost of the values, etc.
+///    2. Merge the summaries of all modules in question into one "index"
+///    3. Perform some global analysis on this index
+///    4. For each module, use the index and analysis calculated previously to
+///       perform local transformations on the module, for example inlining
+///       small functions from other modules.
+///    5. Run thin-specific optimization passes over each module, and then code
+///       generate everything at the end.
+///
+/// The summary for each module is intended to be quite cheap, and the global
+/// index is relatively quite cheap to create as well. As a result, the goal of
+/// ThinLTO is to reduce the bottleneck on LTO and enable LTO to be used in more
+/// situations. For example one cheap optimization is that we can parallelize
+/// all codegen modules, easily making use of all the cores on a machine.
+///
+/// With all that in mind, the function here is designed at specifically just
+/// calculating the *index* for ThinLTO. This index will then be shared amongst
+/// all of the `LtoModuleCodegen` units returned below and destroyed once
+/// they all go out of scope.
+fn thin_lto(
+    cgcx: &CodegenContext<GccCodegenBackend>,
+    _dcx: &DiagCtxt,
+    modules: Vec<(String, ThinBuffer)>,
+    serialized_modules: Vec<(SerializedModule<ModuleBuffer>, CString)>,
+    tmp_path: TempDir,
+    cached_modules: Vec<(SerializedModule<ModuleBuffer>, WorkProduct)>,
+    //symbols_below_threshold: &[*const libc::c_char],
+) -> Result<(Vec<LtoModuleCodegen<GccCodegenBackend>>, Vec<WorkProduct>), FatalError> {
+    let _timer = cgcx.prof.generic_activity("LLVM_thin_lto_global_analysis");
+    info!("going for that thin, thin LTO");
+
+    /*let green_modules: FxHashMap<_, _> =
+    cached_modules.iter().map(|(_, wp)| (wp.cgu_name.clone(), wp.clone())).collect();*/
+
+    let full_scope_len = modules.len() + serialized_modules.len() + cached_modules.len();
+    let mut thin_buffers = Vec::with_capacity(modules.len());
+    let mut module_names = Vec::with_capacity(full_scope_len);
+    //let mut thin_modules = Vec::with_capacity(full_scope_len);
+
+    for (i, (name, buffer)) in modules.into_iter().enumerate() {
+        info!("local module: {} - {}", i, name);
+        let cname = CString::new(name.as_bytes()).unwrap();
+        /*thin_modules.push(llvm::ThinLTOModule {
+            identifier: cname.as_ptr(),
+            data: buffer.data().as_ptr(),
+            len: buffer.data().len(),
+        });*/
+        thin_buffers.push(buffer);
+        module_names.push(cname);
+    }
+
+    // FIXME: All upstream crates are deserialized internally in the
+    //        function below to extract their summary and modules. Note that
+    //        unlike the loop above we *must* decode and/or read something
+    //        here as these are all just serialized files on disk. An
+    //        improvement, however, to make here would be to store the
+    //        module summary separately from the actual module itself. Right
+    //        now this is store in one large bitcode file, and the entire
+    //        file is deflate-compressed. We could try to bypass some of the
+    //        decompression by storing the index uncompressed and only
+    //        lazily decompressing the bytecode if necessary.
+    //
+    //        Note that truly taking advantage of this optimization will
+    //        likely be further down the road. We'd have to implement
+    //        incremental ThinLTO first where we could actually avoid
+    //        looking at upstream modules entirely sometimes (the contents,
+    //        we must always unconditionally look at the index).
+    let mut serialized = Vec::with_capacity(serialized_modules.len() + cached_modules.len());
+
+    let cached_modules =
+        cached_modules.into_iter().map(|(sm, wp)| (sm, CString::new(wp.cgu_name).unwrap()));
+
+    for (module, name) in serialized_modules.into_iter().chain(cached_modules) {
+        info!("upstream or cached module {:?}", name);
+        /*thin_modules.push(llvm::ThinLTOModule {
+            identifier: name.as_ptr(),
+            data: module.data().as_ptr(),
+            len: module.data().len(),
+        });*/
+
+        match module {
+            SerializedModule::Local(ref module_buffer) => {
+                let path = module_buffer.0.to_str().expect("path");
+                let my_path = PathBuf::from(path);
+                //let exists = my_path.exists();
+                //println!("Path: {:?}: {}", path, exists);
+                /*module.module_llvm.should_combine_object_files = true;
+                module
+                .module_llvm
+                .context
+                .add_driver_option(module_buffer.0.to_str().expect("path"));*/
+            }
+            SerializedModule::FromRlib(_) => unimplemented!("from rlib"),
+            SerializedModule::FromUncompressedFile(_) => {
+                unimplemented!("from uncompressed file")
+            }
+        }
+
+        serialized.push(module);
+        module_names.push(name);
+    }
+
+    // Sanity check
+    //assert_eq!(thin_modules.len(), module_names.len());
+
+    // Delegate to the C++ bindings to create some data here. Once this is a
+    // tried-and-true interface we may wish to try to upstream some of this
+    // to LLVM itself, right now we reimplement a lot of what they do
+    // upstream...
+    /*let data = llvm::LLVMRustCreateThinLTOData(
+        thin_modules.as_ptr(),
+        thin_modules.len() as u32,
+        symbols_below_threshold.as_ptr(),
+        symbols_below_threshold.len() as u32,
+    )
+    .ok_or_else(|| write::llvm_err(dcx, LlvmError::PrepareThinLtoContext))?;
+    */
+
+    let data = ThinData; //(Arc::new(tmp_path))/*(data)*/;
+
+    info!("thin LTO data created");
+
+    /*let (key_map_path, prev_key_map, curr_key_map) =
+        if let Some(ref incr_comp_session_dir) = cgcx.incr_comp_session_dir {
+            let path = incr_comp_session_dir.join(THIN_LTO_KEYS_INCR_COMP_FILE_NAME);
+            // If the previous file was deleted, or we get an IO error
+            // reading the file, then we'll just use `None` as the
+            // prev_key_map, which will force the code to be recompiled.
+            let prev =
+                if path.exists() { ThinLTOKeysMap::load_from_file(&path).ok() } else { None };
+            let curr = ThinLTOKeysMap::from_thin_lto_modules(&data, &thin_modules, &module_names);
+            (Some(path), prev, curr)
+        }
+        else {
+            // If we don't compile incrementally, we don't need to load the
+            // import data from LLVM.
+            assert!(green_modules.is_empty());
+            let curr = ThinLTOKeysMap::default();
+            (None, None, curr)
+        };
+    info!("thin LTO cache key map loaded");
+    info!("prev_key_map: {:#?}", prev_key_map);
+    info!("curr_key_map: {:#?}", curr_key_map);*/
+
+    // Throw our data in an `Arc` as we'll be sharing it across threads. We
+    // also put all memory referenced by the C++ data (buffers, ids, etc)
+    // into the arc as well. After this we'll create a thin module
+    // codegen per module in this data.
+    let shared =
+        Arc::new(ThinShared { data, thin_buffers, serialized_modules: serialized, module_names });
+
+    let copy_jobs = vec![];
+    let mut opt_jobs = vec![];
+
+    info!("checking which modules can be-reused and which have to be re-optimized.");
+    for (module_index, module_name) in shared.module_names.iter().enumerate() {
+        let module_name = module_name_to_str(module_name);
+        /*if let (Some(prev_key_map), true) =
+            (prev_key_map.as_ref(), green_modules.contains_key(module_name))
+        {
+            assert!(cgcx.incr_comp_session_dir.is_some());
+
+            // If a module exists in both the current and the previous session,
+            // and has the same LTO cache key in both sessions, then we can re-use it
+            if prev_key_map.keys.get(module_name) == curr_key_map.keys.get(module_name) {
+                let work_product = green_modules[module_name].clone();
+                copy_jobs.push(work_product);
+                info!(" - {}: re-used", module_name);
+                assert!(cgcx.incr_comp_session_dir.is_some());
+                continue;
+            }
+        }*/
+
+        info!(" - {}: re-compiled", module_name);
+        opt_jobs
+            .push(LtoModuleCodegen::Thin(ThinModule { shared: shared.clone(), idx: module_index }));
+    }
+
+    // Save the current ThinLTO import information for the next compilation
+    // session, overwriting the previous serialized data (if any).
+    /*if let Some(path) = key_map_path {
+        if let Err(err) = curr_key_map.save_to_file(&path) {
+            return Err(write::llvm_err(dcx, LlvmError::WriteThinLtoKey { err }));
+        }
+    }*/
+
+    // NOTE: save the temporary directory used by LTO so that it gets deleted after linking instead
+    // of now.
+    //module.module_llvm.temp_dir = Some(tmp_path);
+    // TODO: save the directory so that it gets deleted later.
+    std::mem::forget(tmp_path);
+
+    Ok((opt_jobs, copy_jobs))
+}
+
+pub unsafe fn optimize_thin_module(
+    thin_module: ThinModule<GccCodegenBackend>,
+    _cgcx: &CodegenContext<GccCodegenBackend>,
+) -> Result<ModuleCodegen<GccContext>, FatalError> {
+    //let dcx = cgcx.create_dcx();
+
+    //let module_name = &thin_module.shared.module_names[thin_module.idx];
+    /*let tm_factory_config = TargetMachineFactoryConfig::new(cgcx, module_name.to_str().unwrap());
+    let tm = (cgcx.tm_factory)(tm_factory_config).map_err(|e| write::llvm_err(&dcx, e))?;*/
+
+    // Right now the implementation we've got only works over serialized
+    // modules, so we create a fresh new LLVM context and parse the module
+    // into that context. One day, however, we may do this for upstream
+    // crates but for locally codegened modules we may be able to reuse
+    // that LLVM Context and Module.
+    //let llcx = llvm::LLVMRustContextCreate(cgcx.fewer_names);
+    //let llmod_raw = parse_module(llcx, module_name, thin_module.data(), &dcx)? as *const _;
+    let mut should_combine_object_files = false;
+    let context = match thin_module.shared.thin_buffers.get(thin_module.idx) {
+        Some(thin_buffer) => Arc::clone(&thin_buffer.context),
+        None => {
+            let context = Context::default();
+            let len = thin_module.shared.thin_buffers.len();
+            let module = &thin_module.shared.serialized_modules[thin_module.idx - len];
+            match *module {
+                SerializedModule::Local(ref module_buffer) => {
+                    let path = module_buffer.0.to_str().expect("path");
+
+                    //let my_path = PathBuf::from(path);
+                    //let exists = my_path.exists();
+                    //println!("Path2: {:?}: {}", path, exists);
+
+                    context.add_driver_option(path);
+                    should_combine_object_files = true;
+                    /*module.module_llvm.should_combine_object_files = true;
+                    module
+                        .module_llvm
+                        .context
+                        .add_driver_option(module_buffer.0.to_str().expect("path"));*/
+                }
+                SerializedModule::FromRlib(_) => unimplemented!("from rlib"),
+                SerializedModule::FromUncompressedFile(_) => {
+                    unimplemented!("from uncompressed file")
+                }
+            }
+            Arc::new(context)
+        }
+    };
+    let module = ModuleCodegen {
+        module_llvm: GccContext { context, should_combine_object_files, temp_dir: None },
+        name: thin_module.name().to_string(),
+        kind: ModuleKind::Regular,
+    };
+    /*{
+        let target = &*module.module_llvm.tm;
+        let llmod = module.module_llvm.llmod();
+        save_temp_bitcode(cgcx, &module, "thin-lto-input");
+
+        // Up next comes the per-module local analyses that we do for Thin LTO.
+        // Each of these functions is basically copied from the LLVM
+        // implementation and then tailored to suit this implementation. Ideally
+        // each of these would be supported by upstream LLVM but that's perhaps
+        // a patch for another day!
+        //
+        // You can find some more comments about these functions in the LLVM
+        // bindings we've got (currently `PassWrapper.cpp`)
+        {
+            let _timer =
+                cgcx.prof.generic_activity_with_arg("LLVM_thin_lto_rename", thin_module.name());
+            if !llvm::LLVMRustPrepareThinLTORename(thin_module.shared.data.0, llmod, target) {
+                return Err(write::llvm_err(&dcx, LlvmError::PrepareThinLtoModule));
+            }
+            save_temp_bitcode(cgcx, &module, "thin-lto-after-rename");
+        }
+
+        {
+            let _timer = cgcx
+                .prof
+                .generic_activity_with_arg("LLVM_thin_lto_resolve_weak", thin_module.name());
+            if !llvm::LLVMRustPrepareThinLTOResolveWeak(thin_module.shared.data.0, llmod) {
+                return Err(write::llvm_err(&dcx, LlvmError::PrepareThinLtoModule));
+            }
+            save_temp_bitcode(cgcx, &module, "thin-lto-after-resolve");
+        }
+
+        {
+            let _timer = cgcx
+                .prof
+                .generic_activity_with_arg("LLVM_thin_lto_internalize", thin_module.name());
+            if !llvm::LLVMRustPrepareThinLTOInternalize(thin_module.shared.data.0, llmod) {
+                return Err(write::llvm_err(&dcx, LlvmError::PrepareThinLtoModule));
+            }
+            save_temp_bitcode(cgcx, &module, "thin-lto-after-internalize");
+        }
+
+        {
+            let _timer =
+                cgcx.prof.generic_activity_with_arg("LLVM_thin_lto_import", thin_module.name());
+            if !llvm::LLVMRustPrepareThinLTOImport(thin_module.shared.data.0, llmod, target) {
+                return Err(write::llvm_err(&dcx, LlvmError::PrepareThinLtoModule));
+            }
+            save_temp_bitcode(cgcx, &module, "thin-lto-after-import");
+        }
+
+        // Alright now that we've done everything related to the ThinLTO
+        // analysis it's time to run some optimizations! Here we use the same
+        // `run_pass_manager` as the "fat" LTO above except that we tell it to
+        // populate a thin-specific pass manager, which presumably LLVM treats a
+        // little differently.
+        {
+            info!("running thin lto passes over {}", module.name);
+            run_pass_manager(cgcx, &dcx, &mut module, true)?;
+            save_temp_bitcode(cgcx, &module, "thin-lto-after-pm");
+        }
+    }*/
+    Ok(module)
+}
+
+pub struct ThinBuffer {
+    context: Arc<Context<'static>>,
+}
+
+// TODO: check if this makes sense to make ThinBuffer Send and Sync.
+unsafe impl Send for ThinBuffer {}
+unsafe impl Sync for ThinBuffer {}
+
+impl ThinBuffer {
+    pub fn new(context: &Arc<Context<'static>>) -> Self {
+        Self { context: Arc::clone(context) }
+    }
+}
+
+impl ThinBufferMethods for ThinBuffer {
+    fn data(&self) -> &[u8] {
+        &[]
+    }
+
+    fn thin_link_data(&self) -> &[u8] {
+        unimplemented!();
+    }
+}
+
+pub struct ThinData; //(Arc<TempDir>);
+
+fn module_name_to_str(c_str: &CStr) -> &str {
+    c_str.to_str().unwrap_or_else(|e| {
+        bug!("Encountered non-utf8 GCC module name `{}`: {}", c_str.to_string_lossy(), e)
+    })
+}
diff --git a/src/back/write.rs b/src/back/write.rs
index b9c7f72d0b72..09d7e692a443 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -31,6 +31,7 @@ pub(crate) unsafe fn codegen(
 
         // NOTE: Only generate object files with GIMPLE when this environment variable is set for
         // now because this requires a particular setup (same gcc/lto1/lto-wrapper commit as libgccjit).
+        // TODO: remove this environment variable.
         let fat_lto = env::var("EMBED_LTO_BITCODE").as_deref() == Ok("1");
 
         let bc_out = cgcx.output_filenames.temp_path(OutputType::Bitcode, module_name);
@@ -113,17 +114,20 @@ pub(crate) unsafe fn codegen(
                     context.set_debug_info(true);
                     context.dump_to_file(path, true);
                 }
-                if should_combine_object_files && fat_lto {
-                    context.add_command_line_option("-flto=auto");
-                    context.add_command_line_option("-flto-partition=one");
+                if should_combine_object_files {
+                    if fat_lto {
+                        context.add_command_line_option("-flto=auto");
+                        context.add_command_line_option("-flto-partition=one");
+
+                        // NOTE: without -fuse-linker-plugin, we get the following error:
+                        // lto1: internal compiler error: decompressed stream: Destination buffer is too small
+                        context.add_driver_option("-fuse-linker-plugin");
+                    }
 
                     context.add_driver_option("-Wl,-r");
                     // NOTE: we need -nostdlib, otherwise, we get the following error:
                     // /usr/bin/ld: cannot find -lgcc_s: No such file or directory
                     context.add_driver_option("-nostdlib");
-                    // NOTE: without -fuse-linker-plugin, we get the following error:
-                    // lto1: internal compiler error: decompressed stream: Destination buffer is too small
-                    context.add_driver_option("-fuse-linker-plugin");
 
                     // NOTE: this doesn't actually generate an executable. With the above flags, it combines the .o files together in another .o.
                     context.compile_to_file(
@@ -131,6 +135,7 @@ pub(crate) unsafe fn codegen(
                         obj_out.to_str().expect("path to str"),
                     );
                 } else {
+                    //println!("Combining to object file");
                     context.compile_to_file(
                         OutputKind::ObjectFile,
                         obj_out.to_str().expect("path to str"),
diff --git a/src/base.rs b/src/base.rs
index 2a2d5741d131..b2cf6fe51df8 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -1,5 +1,6 @@
 use std::collections::HashSet;
 use std::env;
+use std::sync::Arc;
 use std::time::Instant;
 
 use gccjit::{FunctionType, GlobalKind};
@@ -205,7 +206,11 @@ pub fn compile_codegen_unit(
 
         ModuleCodegen {
             name: cgu_name.to_string(),
-            module_llvm: GccContext { context, should_combine_object_files: false, temp_dir: None },
+            module_llvm: GccContext {
+                context: Arc::new(context),
+                should_combine_object_files: false,
+                temp_dir: None,
+            },
             kind: ModuleKind::Regular,
         }
     }
diff --git a/src/lib.rs b/src/lib.rs
index d83938569551..3df48f96e8c4 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -4,7 +4,7 @@
  * TODO(antoyo): support LTO (gcc's equivalent to Full LTO is -flto -flto-partition=one — https://documentation.suse.com/sbp/all/html/SBP-GCC-10/index.html).
  * For Thin LTO, this might be helpful:
  * In gcc 4.6 -fwhopr was removed and became default with -flto. The non-whopr path can still be executed via -flto-partition=none.
- * Or the new incremental LTO?
+ * Or the new incremental LTO (https://www.phoronix.com/news/GCC-Incremental-LTO-Patches)?
  *
  * Maybe some missing optizations enabled by rustc's LTO is in there: https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html
  * Like -fipa-icf (should be already enabled) and maybe -fdevirtualize-at-ltrans.
@@ -80,6 +80,8 @@ use std::sync::atomic::Ordering;
 use std::sync::Arc;
 use std::sync::Mutex;
 
+use back::lto::ThinBuffer;
+use back::lto::ThinData;
 use errors::LTONotSupported;
 #[cfg(not(feature = "master"))]
 use gccjit::CType;
@@ -92,9 +94,7 @@ use rustc_codegen_ssa::back::write::{
     CodegenContext, FatLtoInput, ModuleConfig, TargetMachineFactoryFn,
 };
 use rustc_codegen_ssa::base::codegen_crate;
-use rustc_codegen_ssa::traits::{
-    CodegenBackend, ExtraBackendMethods, ThinBufferMethods, WriteBackendMethods,
-};
+use rustc_codegen_ssa::traits::{CodegenBackend, ExtraBackendMethods, WriteBackendMethods};
 use rustc_codegen_ssa::{CodegenResults, CompiledModule, ModuleCodegen};
 use rustc_data_structures::fx::FxIndexMap;
 use rustc_data_structures::sync::IntoDynSyncSend;
@@ -188,6 +188,7 @@ impl CodegenBackend for GccCodegenBackend {
 
         #[cfg(feature = "master")]
         gccjit::set_global_personality_function_name(b"rust_eh_personality\0");
+
         if sess.lto() == Lto::Thin {
             sess.dcx().emit_warn(LTONotSupported {});
         }
@@ -293,7 +294,7 @@ impl ExtraBackendMethods for GccCodegenBackend {
         alloc_error_handler_kind: AllocatorKind,
     ) -> Self::Module {
         let mut mods = GccContext {
-            context: new_context(tcx),
+            context: Arc::new(new_context(tcx)),
             should_combine_object_files: false,
             temp_dir: None,
         };
@@ -323,20 +324,8 @@ impl ExtraBackendMethods for GccCodegenBackend {
     }
 }
 
-pub struct ThinBuffer;
-
-impl ThinBufferMethods for ThinBuffer {
-    fn data(&self) -> &[u8] {
-        unimplemented!();
-    }
-
-    fn thin_link_data(&self) -> &[u8] {
-        unimplemented!();
-    }
-}
-
 pub struct GccContext {
-    context: Context<'static>,
+    context: Arc<Context<'static>>,
     should_combine_object_files: bool,
     // Temporary directory used by LTO. We keep it here so that it's not removed before linking.
     temp_dir: Option<TempDir>,
@@ -351,7 +340,7 @@ impl WriteBackendMethods for GccCodegenBackend {
     type TargetMachine = ();
     type TargetMachineError = ();
     type ModuleBuffer = ModuleBuffer;
-    type ThinData = ();
+    type ThinData = ThinData;
     type ThinBuffer = ThinBuffer;
 
     fn run_fat_lto(
@@ -363,11 +352,11 @@ impl WriteBackendMethods for GccCodegenBackend {
     }
 
     fn run_thin_lto(
-        _cgcx: &CodegenContext<Self>,
-        _modules: Vec<(String, Self::ThinBuffer)>,
-        _cached_modules: Vec<(SerializedModule<Self::ModuleBuffer>, WorkProduct)>,
+        cgcx: &CodegenContext<Self>,
+        modules: Vec<(String, Self::ThinBuffer)>,
+        cached_modules: Vec<(SerializedModule<Self::ModuleBuffer>, WorkProduct)>,
     ) -> Result<(Vec<LtoModuleCodegen<Self>>, Vec<WorkProduct>), FatalError> {
-        unimplemented!();
+        back::lto::run_thin(cgcx, modules, cached_modules)
     }
 
     fn print_pass_timings(&self) {
@@ -397,10 +386,10 @@ impl WriteBackendMethods for GccCodegenBackend {
     }
 
     unsafe fn optimize_thin(
-        _cgcx: &CodegenContext<Self>,
-        _thin: ThinModule<Self>,
+        cgcx: &CodegenContext<Self>,
+        thin: ThinModule<Self>,
     ) -> Result<ModuleCodegen<Self::Module>, FatalError> {
-        unimplemented!();
+        back::lto::optimize_thin_module(thin, cgcx)
     }
 
     unsafe fn codegen(
@@ -413,10 +402,10 @@ impl WriteBackendMethods for GccCodegenBackend {
     }
 
     fn prepare_thin(
-        _module: ModuleCodegen<Self::Module>,
-        _emit_summary: bool,
+        module: ModuleCodegen<Self::Module>,
+        emit_summary: bool,
     ) -> (String, Self::ThinBuffer) {
-        unimplemented!();
+        back::lto::prepare_thin(module, emit_summary)
     }
 
     fn serialize_module(_module: ModuleCodegen<Self::Module>) -> (String, Self::ModuleBuffer) {

From bbc765b49b7c0d57a30476c2550303d46c75ade3 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 28 Jun 2024 14:00:45 -0400
Subject: [PATCH 682/997] Fix clippy warnings

---
 src/back/lto.rs | 14 +++++++-------
 src/base.rs     |  4 ++--
 src/lib.rs      | 30 +++++++++++++++++++++++++-----
 3 files changed, 34 insertions(+), 14 deletions(-)

diff --git a/src/back/lto.rs b/src/back/lto.rs
index 5b6eec855503..4b31bfac5dd7 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -39,7 +39,7 @@ use tempfile::{tempdir, TempDir};
 
 use crate::back::write::save_temp_bitcode;
 use crate::errors::{DynamicLinkingWithLTO, LtoBitcodeFromRlib, LtoDisallowed, LtoDylib};
-use crate::{to_gcc_opt_level, GccCodegenBackend, GccContext};
+use crate::{to_gcc_opt_level, GccCodegenBackend, GccContext, SyncContext};
 
 /// We keep track of the computed LTO cache keys from the previous
 /// session to determine which CGUs we can reuse.
@@ -485,9 +485,9 @@ fn thin_lto(
         });*/
 
         match module {
-            SerializedModule::Local(ref module_buffer) => {
-                let path = module_buffer.0.to_str().expect("path");
-                let my_path = PathBuf::from(path);
+            SerializedModule::Local(_) => {
+                //let path = module_buffer.0.to_str().expect("path");
+                //let my_path = PathBuf::from(path);
                 //let exists = my_path.exists();
                 //println!("Path: {:?}: {}", path, exists);
                 /*module.module_llvm.should_combine_object_files = true;
@@ -644,7 +644,7 @@ pub unsafe fn optimize_thin_module(
                     unimplemented!("from uncompressed file")
                 }
             }
-            Arc::new(context)
+            Arc::new(SyncContext::new(context))
         }
     };
     let module = ModuleCodegen {
@@ -718,7 +718,7 @@ pub unsafe fn optimize_thin_module(
 }
 
 pub struct ThinBuffer {
-    context: Arc<Context<'static>>,
+    context: Arc<SyncContext>,
 }
 
 // TODO: check if this makes sense to make ThinBuffer Send and Sync.
@@ -726,7 +726,7 @@ unsafe impl Send for ThinBuffer {}
 unsafe impl Sync for ThinBuffer {}
 
 impl ThinBuffer {
-    pub fn new(context: &Arc<Context<'static>>) -> Self {
+    pub(crate) fn new(context: &Arc<SyncContext>) -> Self {
         Self { context: Arc::clone(context) }
     }
 }
diff --git a/src/base.rs b/src/base.rs
index b2cf6fe51df8..488757c44849 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -19,8 +19,8 @@ use rustc_target::spec::PanicStrategy;
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
-use crate::GccContext;
 use crate::{gcc_util, new_context, LockedTargetInfo};
+use crate::{GccContext, SyncContext};
 
 #[cfg(feature = "master")]
 pub fn visibility_to_gcc(linkage: Visibility) -> gccjit::Visibility {
@@ -207,7 +207,7 @@ pub fn compile_codegen_unit(
         ModuleCodegen {
             name: cgu_name.to_string(),
             module_llvm: GccContext {
-                context: Arc::new(context),
+                context: Arc::new(SyncContext::new(context)),
                 should_combine_object_files: false,
                 temp_dir: None,
             },
diff --git a/src/lib.rs b/src/lib.rs
index 3df48f96e8c4..ce781b3f3ff7 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -73,6 +73,7 @@ mod type_of;
 
 use std::any::Any;
 use std::fmt::Debug;
+use std::ops::Deref;
 #[cfg(not(feature = "master"))]
 use std::sync::atomic::AtomicBool;
 #[cfg(not(feature = "master"))]
@@ -294,7 +295,7 @@ impl ExtraBackendMethods for GccCodegenBackend {
         alloc_error_handler_kind: AllocatorKind,
     ) -> Self::Module {
         let mut mods = GccContext {
-            context: Arc::new(new_context(tcx)),
+            context: Arc::new(SyncContext::new(new_context(tcx))),
             should_combine_object_files: false,
             temp_dir: None,
         };
@@ -325,15 +326,34 @@ impl ExtraBackendMethods for GccCodegenBackend {
 }
 
 pub struct GccContext {
-    context: Arc<Context<'static>>,
+    context: Arc<SyncContext>,
     should_combine_object_files: bool,
     // Temporary directory used by LTO. We keep it here so that it's not removed before linking.
     temp_dir: Option<TempDir>,
 }
 
-unsafe impl Send for GccContext {}
-// FIXME(antoyo): that shouldn't be Sync. Parallel compilation is currently disabled with "-Zno-parallel-llvm". Try to disable it here.
-unsafe impl Sync for GccContext {}
+struct SyncContext {
+    context: Context<'static>,
+}
+
+impl SyncContext {
+    fn new(context: Context<'static>) -> Self {
+        Self { context }
+    }
+}
+
+impl Deref for SyncContext {
+    type Target = Context<'static>;
+
+    fn deref(&self) -> &Self::Target {
+        &self.context
+    }
+}
+
+unsafe impl Send for SyncContext {}
+// FIXME(antoyo): that shouldn't be Sync. Parallel compilation is currently disabled with "-Zno-parallel-llvm".
+// TODO: disable it here by returing false in CodegenBackend::supports_parallel().
+unsafe impl Sync for SyncContext {}
 
 impl WriteBackendMethods for GccCodegenBackend {
     type Module = GccContext;

From 2ecab996f82a85b5aae078ef24880276426914fa Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 28 Jun 2024 20:45:02 +0200
Subject: [PATCH 683/997] Fix build failure in cfg-if

---
 build_system/src/test.rs | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 0895dc6bff70..d39036c26a18 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -703,12 +703,16 @@ fn test_projects(env: &Env, args: &TestArg) -> Result<(), String> {
         //"https://github.com/rust-lang/cargo", // TODO: very slow, only run on master?
     ];
 
+    let mut env = env.clone();
+    let rustflags =
+        format!("{} --cap-lints allow", env.get("RUSTFLAGS").cloned().unwrap_or_default());
+    env.insert("RUSTFLAGS".to_string(), rustflags);
     let run_tests = |projects_path, iter: &mut dyn Iterator<Item = &&str>| -> Result<(), String> {
         for project in iter {
             let clone_result = git_clone_root_dir(project, projects_path, true)?;
             let repo_path = Path::new(&clone_result.repo_dir);
-            run_cargo_command(&[&"build", &"--release"], Some(repo_path), env, args)?;
-            run_cargo_command(&[&"test"], Some(repo_path), env, args)?;
+            run_cargo_command(&[&"build", &"--release"], Some(repo_path), &env, args)?;
+            run_cargo_command(&[&"test"], Some(repo_path), &env, args)?;
         }
 
         Ok(())

From 606196b0cf901d02a19bc67f0c14047991eaed2a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 30 Jun 2024 09:49:19 -0400
Subject: [PATCH 684/997] Comment libgccjit 12 CI

---
 .github/workflows/gcc12.yml | 30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index f7bb15604923..5977ed33c56e 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -68,21 +68,23 @@ jobs:
       run: |
         ./y.sh prepare --only-libcore --libgccjit12-patches
         ./y.sh build --no-default-features --sysroot-panic-abort
-        cargo test --no-default-features
-        ./y.sh clean all
+        # Uncomment when we no longer need to remove global variables.
+        #./y.sh build --sysroot --no-default-features --sysroot-panic-abort
+        #cargo test --no-default-features
+        #./y.sh clean all
 
-    - name: Prepare dependencies
-      run: |
-        git config --global user.email "user@example.com"
-        git config --global user.name "User"
-        ./y.sh prepare --libgccjit12-patches
+    #- name: Prepare dependencies
+      #run: |
+        #git config --global user.email "user@example.com"
+        #git config --global user.name "User"
+        #./y.sh prepare --libgccjit12-patches
 
-    - name: Add more failing tests for GCC 12
-      run: cat tests/failing-ui-tests12.txt >> tests/failing-ui-tests.txt
+    #- name: Add more failing tests for GCC 12
+      #run: cat tests/failing-ui-tests12.txt >> tests/failing-ui-tests.txt
 
-    - name: Add more failing tests because the sysroot is not compiled with LTO
-      run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
+    #- name: Add more failing tests because the sysroot is not compiled with LTO
+      #run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
 
-    - name: Run tests
-      run: |
-        ./y.sh test --release --clean --build-sysroot ${{ matrix.commands }} --no-default-features
+    #- name: Run tests
+      #run: |
+        #./y.sh test --release --clean --build-sysroot ${{ matrix.commands }} --no-default-features

From cd014cda8c09afd88f6a9b8d75043c1d95bee734 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 2 Jul 2024 09:54:01 -0400
Subject: [PATCH 685/997] Replace the type of global variables instead of
 replacing them

---
 Cargo.lock        |  4 ++--
 libgccjit.version |  2 +-
 src/consts.rs     | 10 ++--------
 3 files changed, 5 insertions(+), 11 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index ba6633bc2dcb..cd693835ded1 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -80,7 +80,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "2.0.0"
-source = "git+https://github.com/rust-lang/gccjit.rs#f1545d7c2c13e42d78eaac8032d49ab8f7d43b6e"
+source = "git+https://github.com/rust-lang/gccjit.rs#328cb1b414f67dfa15162ba7a55ed01931f1b219"
 dependencies = [
  "gccjit_sys",
 ]
@@ -88,7 +88,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.1.0"
-source = "git+https://github.com/rust-lang/gccjit.rs#f1545d7c2c13e42d78eaac8032d49ab8f7d43b6e"
+source = "git+https://github.com/rust-lang/gccjit.rs#328cb1b414f67dfa15162ba7a55ed01931f1b219"
 dependencies = [
  "libc",
 ]
diff --git a/libgccjit.version b/libgccjit.version
index 71a61a4b8735..23ca7f022155 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-272d0ccced960394fe6ff2b40b01610208cb4940
+341be3b7d7ac6976cfed8ed59da3573c040d0776
diff --git a/src/consts.rs b/src/consts.rs
index 93c23440c57c..50f3a4e0402d 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -82,17 +82,11 @@ impl<'gcc, 'tcx> StaticMethods for CodegenCx<'gcc, 'tcx> {
         };
 
         let is_thread_local = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-        let mut global = self.get_static_inner(def_id, val_llty);
+        let global = self.get_static_inner(def_id, val_llty);
 
         #[cfg(feature = "master")]
         if global.to_rvalue().get_type() != val_llty {
-            let instance = Instance::mono(self.tcx, def_id);
-            self.instances.borrow_mut().remove(&instance);
-
-            global.remove();
-            let name = self.tcx.symbol_name(instance).name;
-            self.globals.borrow_mut().remove(name);
-            global = self.get_static_inner(def_id, val_llty);
+            global.to_rvalue().set_type(val_llty);
         }
         set_global_alignment(self, global, alloc.align);
 

From 4d3d0d492f25eddeb837e16b2773783c95f8933b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 2 Jul 2024 10:43:26 -0400
Subject: [PATCH 686/997] Fix intrinsic/generic-arithmetic-pass.rs test

---
 src/intrinsic/simd.rs      | 10 ++++++----
 tests/failing-ui-tests.txt | 30 ++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 4 deletions(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index a54e7107a906..01f207368e89 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -343,11 +343,13 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             .map(|i| {
                 let index = bx.context.new_rvalue_from_long(bx.i32_type, i as i64);
                 let value = bx.extract_element(vector, index).to_rvalue();
-                if name == sym::simd_ctlz {
-                    bx.count_leading_zeroes(value.get_type().get_size() as u64 * 8, value)
+                let value_type = value.get_type();
+                let element = if name == sym::simd_ctlz {
+                    bx.count_leading_zeroes(value_type.get_size() as u64 * 8, value)
                 } else {
-                    bx.count_trailing_zeroes(value.get_type().get_size() as u64 * 8, value)
-                }
+                    bx.count_trailing_zeroes(value_type.get_size() as u64 * 8, value)
+                };
+                bx.context.new_cast(None, element, value_type)
             })
             .collect();
         return Ok(bx.context.new_rvalue_from_vector(None, vector.get_type(), &elements));
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 7cc3b0dee0f5..dcaf60d99039 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -73,3 +73,33 @@ tests/ui/simd/repr_packed.rs
 tests/ui/async-await/in-trait/dont-project-to-specializable-projection.rs
 tests/ui/consts/try-operator.rs
 tests/ui/coroutine/unwind-abort-mix.rs
+tests/ui/type-alias-impl-trait/rpit_tait_equality_in_canonical_query.rs
+tests/ui/impl-trait/equality-in-canonical-query.rs
+tests/ui/consts/issue-miri-1910.rs
+tests/ui/mir/mir_heavy_promoted.rs
+tests/ui/consts/const_cmp_type_id.rs
+tests/ui/consts/issue-73976-monomorphic.rs
+tests/ui/consts/issue-94675.rs
+tests/ui/rfcs/rfc-2632-const-trait-impl/const-drop-fail.rs
+tests/ui/rfcs/rfc-2632-const-trait-impl/const-drop.rs
+tests/ui/runtime/on-broken-pipe/child-processes.rs
+tests/ui/sanitizer/cfi-assoc-ty-lifetime-issue-123053.rs
+tests/ui/sanitizer/cfi-async-closures.rs
+tests/ui/sanitizer/cfi-closures.rs
+tests/ui/sanitizer/cfi-complex-receiver.rs
+tests/ui/sanitizer/cfi-coroutine.rs
+tests/ui/sanitizer/cfi-drop-in-place.rs
+tests/ui/sanitizer/cfi-drop-no-principal.rs
+tests/ui/sanitizer/cfi-fn-ptr.rs
+tests/ui/sanitizer/cfi-self-ref.rs
+tests/ui/sanitizer/cfi-supertraits.rs
+tests/ui/sanitizer/cfi-virtual-auto.rs
+tests/ui/sanitizer/kcfi-mangling.rs
+tests/ui/statics/const_generics.rs
+tests/ui/backtrace/dylib-dep.rs
+tests/ui/errors/pic-linker.rs
+tests/ui/delegation/fn-header.rs
+tests/ui/consts/zst_no_llvm_alloc.rs
+tests/ui/consts/const-eval/parse_ints.rs
+tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
+tests/ui/backtrace/backtrace.rs

From ee41c1904a39d485b11672064f67ffe0236105fc Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 2 Jul 2024 12:33:09 -0400
Subject: [PATCH 687/997] Update to nightly-2024-07-02

---
 rust-toolchain  | 2 +-
 src/back/lto.rs | 7 ++++---
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/rust-toolchain b/rust-toolchain
index 7a1806fe3c76..3c83f4b4608d 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2024-06-18"
+channel = "nightly-2024-07-02"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
diff --git a/src/back/lto.rs b/src/back/lto.rs
index 4b31bfac5dd7..19964176bcbd 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -364,7 +364,8 @@ pub(crate) fn run_thin(
     cached_modules: Vec<(SerializedModule<ModuleBuffer>, WorkProduct)>,
 ) -> Result<(Vec<LtoModuleCodegen<GccCodegenBackend>>, Vec<WorkProduct>), FatalError> {
     let dcx = cgcx.create_dcx();
-    let lto_data = prepare_lto(cgcx, &dcx)?;
+    let dcx = dcx.handle();
+    let lto_data = prepare_lto(cgcx, dcx)?;
     /*let symbols_below_threshold =
     symbols_below_threshold.iter().map(|c| c.as_ptr()).collect::<Vec<_>>();*/
     if cgcx.opts.cg.linker_plugin_lto.enabled() {
@@ -375,7 +376,7 @@ pub(crate) fn run_thin(
     }
     thin_lto(
         cgcx,
-        &dcx,
+        dcx,
         modules,
         lto_data.upstream_modules,
         lto_data.tmp_path,
@@ -425,7 +426,7 @@ pub(crate) fn prepare_thin(
 /// they all go out of scope.
 fn thin_lto(
     cgcx: &CodegenContext<GccCodegenBackend>,
-    _dcx: &DiagCtxt,
+    _dcx: DiagCtxtHandle<'_>,
     modules: Vec<(String, ThinBuffer)>,
     serialized_modules: Vec<(SerializedModule<ModuleBuffer>, CString)>,
     tmp_path: TempDir,

From 6099d97bcbad92e04b8e34f3c1df706e0de86eb6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 2 Jul 2024 12:40:45 -0400
Subject: [PATCH 688/997] Fix rebase

---
 Cargo.lock     | 4 ++--
 src/builder.rs | 8 --------
 2 files changed, 2 insertions(+), 10 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 2ce9eb081eec..cd693835ded1 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -80,7 +80,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "2.0.0"
-source = "git+https://github.com/antoyo/gccjit.rs#f1545d7c2c13e42d78eaac8032d49ab8f7d43b6e"
+source = "git+https://github.com/rust-lang/gccjit.rs#328cb1b414f67dfa15162ba7a55ed01931f1b219"
 dependencies = [
  "gccjit_sys",
 ]
@@ -88,7 +88,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.1.0"
-source = "git+https://github.com/antoyo/gccjit.rs#f1545d7c2c13e42d78eaac8032d49ab8f7d43b6e"
+source = "git+https://github.com/rust-lang/gccjit.rs#328cb1b414f67dfa15162ba7a55ed01931f1b219"
 dependencies = [
  "libc",
 ]
diff --git a/src/builder.rs b/src/builder.rs
index 1a3509bfca50..307348f595dc 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1705,14 +1705,6 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn zext(&mut self, value: RValue<'gcc>, dest_typ: Type<'gcc>) -> RValue<'gcc> {
         // FIXME(antoyo): this does not zero-extend.
-<<<<<<< HEAD
-=======
-        if value.get_type().is_bool() && dest_typ.is_i8(self.cx) {
-            // FIXME(antoyo): hack because base::from_immediate converts i1 to i8.
-            // Fix the code in codegen_ssa::base::from_immediate.
-            return value;
-        }
->>>>>>> master
         self.gcc_int_cast(value, dest_typ)
     }
 

From 63d308bd765553f03c2684f6ea8a5ef39029f54d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 2 Jul 2024 12:43:41 -0400
Subject: [PATCH 689/997] Fix broken libgccjit 12 CI

---
 .github/workflows/gcc12.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index 5a8686e1288f..b0775646c5c9 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -67,9 +67,10 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore --libgccjit12-patches
-        ./y.sh build --sysroot --no-default-features --sysroot-panic-abort
+        ./y.sh build --no-default-features --sysroot-panic-abort
         # Uncomment when we no longer need to remove global variables.
         #./y.sh build --sysroot --no-default-features --sysroot-panic-abort
+        #./y.sh build --sysroot --no-default-features --sysroot-panic-abort
         #cargo test --no-default-features
         #./y.sh clean all
 

From 59de4fa99191ba324e7aafc7666b10a125974bc5 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 28 Jun 2024 12:51:18 -0400
Subject: [PATCH 690/997] Fix type of intrinsics

---
 example/example.rs   |  6 +++---
 src/intrinsic/mod.rs | 31 +++++++++++++++----------------
 2 files changed, 18 insertions(+), 19 deletions(-)

diff --git a/example/example.rs b/example/example.rs
index 7c21b73b630e..30e3c3c30c22 100644
--- a/example/example.rs
+++ b/example/example.rs
@@ -154,9 +154,9 @@ fn array_as_slice(arr: &[u8; 3]) -> &[u8] {
 }
 
 // FIXME: fix the intrinsic implementation to work with the new ->u32 signature
-// unsafe fn use_ctlz_nonzero(a: u16) -> u32 {
-//     intrinsics::ctlz_nonzero(a)
-// }
+unsafe fn use_ctlz_nonzero(a: u16) -> u32 {
+    intrinsics::ctlz_nonzero(a)
+}
 
 fn ptr_as_usize(ptr: *const u8) -> usize {
     ptr as usize
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 864bc98a4b7b..a739e6ff3fcb 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -220,12 +220,12 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                             let after_block = func.new_block("after");
 
                             let arg = args[0].immediate();
-                            let result = func.new_local(None, arg.get_type(), "zeros");
+                            let result = func.new_local(None, self.u32_type, "zeros");
                             let zero = self.cx.gcc_zero(arg.get_type());
                             let cond = self.gcc_icmp(IntPredicate::IntEQ, arg, zero);
                             self.llbb().end_with_conditional(None, cond, then_block, else_block);
 
-                            let zero_result = self.cx.gcc_uint(arg.get_type(), width);
+                            let zero_result = self.cx.gcc_uint(self.u32_type, width);
                             then_block.add_assignment(None, result, zero_result);
                             then_block.end_with_jump(None, after_block);
 
@@ -709,6 +709,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     fn count_leading_zeroes(&mut self, width: u64, arg: RValue<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): use width?
         let arg_type = arg.get_type();
+        let result_type = self.u32_type;
         let count_leading_zeroes =
             // TODO(antoyo): write a new function Type::is_compatible_with(&Type) and use it here
             // instead of using is_uint().
@@ -766,7 +767,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
                 let res = self.context.new_array_access(self.location, result, index);
 
-                return self.gcc_int_cast(res.to_rvalue(), arg_type);
+                return self.gcc_int_cast(res.to_rvalue(), result_type);
             }
             else {
                 let count_leading_zeroes = self.context.get_builtin_function("__builtin_clzll");
@@ -774,22 +775,22 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let diff = self.ulonglong_type.get_size() as i64 - arg_type.get_size() as i64;
                 let diff = self.context.new_rvalue_from_long(self.int_type, diff * 8);
                 let res = self.context.new_call(self.location, count_leading_zeroes, &[arg]) - diff;
-                return self.context.new_cast(self.location, res, arg_type);
+                return self.context.new_cast(self.location, res, result_type);
             };
         let count_leading_zeroes = self.context.get_builtin_function(count_leading_zeroes);
         let res = self.context.new_call(self.location, count_leading_zeroes, &[arg]);
-        self.context.new_cast(self.location, res, arg_type)
+        self.context.new_cast(self.location, res, result_type)
     }
 
     fn count_trailing_zeroes(&mut self, _width: u64, arg: RValue<'gcc>) -> RValue<'gcc> {
-        let result_type = arg.get_type();
-        let arg = if result_type.is_signed(self.cx) {
-            let new_type = result_type.to_unsigned(self.cx);
+        let arg_type = arg.get_type();
+        let result_type = self.u32_type;
+        let arg = if arg_type.is_signed(self.cx) {
+            let new_type = arg_type.to_unsigned(self.cx);
             self.gcc_int_cast(arg, new_type)
         } else {
             arg
         };
-        let arg_type = arg.get_type();
         let (count_trailing_zeroes, expected_type) =
             // TODO(antoyo): write a new function Type::is_compatible_with(&Type) and use it here
             // instead of using is_uint().
@@ -874,14 +875,12 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
     fn pop_count(&mut self, value: RValue<'gcc>) -> RValue<'gcc> {
         // TODO(antoyo): use the optimized version with fewer operations.
-        let result_type = value.get_type();
-        let value_type = result_type.to_unsigned(self.cx);
+        let result_type = self.u32_type;
+        let arg_type = value.get_type();
+        let value_type = arg_type.to_unsigned(self.cx);
 
-        let value = if result_type.is_signed(self.cx) {
-            self.gcc_int_cast(value, value_type)
-        } else {
-            value
-        };
+        let value =
+            if arg_type.is_signed(self.cx) { self.gcc_int_cast(value, value_type) } else { value };
 
         // only break apart 128-bit ints if they're not natively supported
         // TODO(antoyo): remove this if/when native 128-bit integers land in libgccjit

From 3e91e162f90e29dc6a8f994aead8114a754a78fd Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 2 Jul 2024 13:33:26 -0400
Subject: [PATCH 691/997] Ignore a stdarch test that will fail until the
 stdarch version in rustc is updated

---
 .github/workflows/stdarch.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 20341ae53d7e..e24b25b73690 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -95,4 +95,5 @@ jobs:
       if: ${{ matrix.cargo_runner }}
       run: |
         # FIXME: these tests fail when the sysroot is compiled with LTO because of a missing symbol in proc-macro.
-        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a
+        # TODO: remove --skip test_mm512_stream_ps when stdarch is updated in rustc.
+        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a --skip test_mm512_stream_ps

From fc2eee58d2ff933b6236e33ad60bc03f84966fad Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 2 Jul 2024 13:37:34 -0400
Subject: [PATCH 692/997] Ignore more tests

---
 .github/workflows/failures.yml | 4 ++++
 tests/failing-ui-tests.txt     | 1 +
 2 files changed, 5 insertions(+)

diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index 66129f805d4c..e5d94767fe7d 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -94,12 +94,16 @@ jobs:
       run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
 
     - name: Run tests
+      # TODO: re-enable those tests for libgccjit 12.
+      if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       id: tests
       run: |
         ${{ matrix.libgccjit_version.env_extra }} ./y.sh test --release --clean --build-sysroot --test-failing-rustc ${{ matrix.libgccjit_version.extra }} | tee output_log
         rg --text "test result" output_log >> $GITHUB_STEP_SUMMARY
 
     - name: Run failing ui pattern tests for ICE
+      # TODO: re-enable those tests for libgccjit 12.
+      if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       id: ui-tests
       run: |
         ${{ matrix.libgccjit_version.env_extra }} ./y.sh test --release --test-failing-ui-pattern-tests ${{ matrix.libgccjit_version.extra }} | tee output_log_ui
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 9672054cdad0..ce867be7390c 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -93,3 +93,4 @@ tests/ui/consts/zst_no_llvm_alloc.rs
 tests/ui/consts/const-eval/parse_ints.rs
 tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
 tests/ui/backtrace/backtrace.rs
+tests/ui/lifetimes/tail-expr-lock-poisoning.rs

From 2d123d08c98419261bddec8f3ad8b80cadb82515 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 5 Jul 2024 10:42:03 -0400
Subject: [PATCH 693/997] Fix LTO tests

FIXME: we now have fat LTO objects even when only bitcode is requested.
---
 .github/workflows/release.yml |  4 ++--
 Readme.md                     | 11 -----------
 build_system/src/config.rs    |  6 ------
 src/back/lto.rs               | 14 +++++++-------
 src/back/write.rs             | 15 ++++++++-------
 src/base.rs                   |  1 +
 src/lib.rs                    |  2 ++
 tests/failing-ui-tests.txt    |  1 +
 8 files changed, 21 insertions(+), 33 deletions(-)

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index d5242926eb4d..f0b1212986dd 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -53,7 +53,7 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        EMBED_LTO_BITCODE=1 ./y.sh build --sysroot --release --release-sysroot
+        ./y.sh build --sysroot --release --release-sysroot
         cargo test
         ./y.sh clean all
 
@@ -70,4 +70,4 @@ jobs:
       run: |
         # FIXME(antoyo): we cannot enable LTO for stdarch tests currently because of some failing LTO tests using proc-macros.
         echo -n 'lto = "fat"' >> build_system/build_sysroot/Cargo.toml
-        EMBED_LTO_BITCODE=1 ./y.sh test --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }}
+        ./y.sh test --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }}
diff --git a/Readme.md b/Readme.md
index bd552b84f928..d0b57d2c729c 100644
--- a/Readme.md
+++ b/Readme.md
@@ -119,17 +119,6 @@ $ CHANNEL="release" $CG_GCCJIT_DIR/y.sh cargo run
 
 If you compiled cg_gccjit in debug mode (aka you didn't pass `--release` to `./y.sh test`) you should use `CHANNEL="debug"` instead or omit `CHANNEL="release"` completely.
 
-### LTO
-
-To use LTO, you need to set the variable `FAT_LTO=1` and `EMBED_LTO_BITCODE=1` in addition to setting `lto = "fat"` in the `Cargo.toml`.
-Don't set `FAT_LTO` when compiling the sysroot, though: only set `EMBED_LTO_BITCODE=1`.
-
-Failing to set `EMBED_LTO_BITCODE` will give you the following error:
-
-```
-error: failed to copy bitcode to object file: No such file or directory (os error 2)
-```
-
 ### Rustc
 
 If you want to run `rustc` directly, you can do so with:
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 30321939f64b..965aedd8be89 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -387,12 +387,6 @@ impl ConfigInfo {
             rustflags.push("-Csymbol-mangling-version=v0".to_string());
         }
 
-        // Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
-        // TODO(antoyo): remove when we can handle ThinLTO.
-        // TODO: remove:
-        /*if !env.contains_key(&"FAT_LTO".to_string()) {
-            rustflags.push("-Clto=off".to_string());
-        }*/
         // FIXME(antoyo): remove once the atomic shim is gone
         if os_name == "Darwin" {
             rustflags.extend_from_slice(&[
diff --git a/src/back/lto.rs b/src/back/lto.rs
index 19573628b1b9..88eff198739e 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -307,6 +307,7 @@ fn fat_lto(
             match bc_decoded {
                 SerializedModule::Local(ref module_buffer) => {
                     module.module_llvm.should_combine_object_files = true;
+                    module.module_llvm.fat_lto = true;
                     module
                         .module_llvm
                         .context
@@ -489,7 +490,6 @@ fn thin_lto(
                 //let path = module_buffer.0.to_str().expect("path");
                 //let my_path = PathBuf::from(path);
                 //let exists = my_path.exists();
-                //println!("Path: {:?}: {}", path, exists);
                 /*module.module_llvm.should_combine_object_files = true;
                 module
                 .module_llvm
@@ -626,11 +626,6 @@ pub unsafe fn optimize_thin_module(
             match *module {
                 SerializedModule::Local(ref module_buffer) => {
                     let path = module_buffer.0.to_str().expect("path");
-
-                    //let my_path = PathBuf::from(path);
-                    //let exists = my_path.exists();
-                    //println!("Path2: {:?}: {}", path, exists);
-
                     context.add_driver_option(path);
                     should_combine_object_files = true;
                     /*module.module_llvm.should_combine_object_files = true;
@@ -648,7 +643,12 @@ pub unsafe fn optimize_thin_module(
         }
     };
     let module = ModuleCodegen {
-        module_llvm: GccContext { context, should_combine_object_files, temp_dir: None },
+        module_llvm: GccContext {
+            context,
+            should_combine_object_files,
+            fat_lto: false,
+            temp_dir: None,
+        },
         name: thin_module.name().to_string(),
         kind: ModuleKind::Regular,
     };
diff --git a/src/back/write.rs b/src/back/write.rs
index b9bb62a0351d..8922e7e742b2 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -32,12 +32,12 @@ pub(crate) unsafe fn codegen(
         // NOTE: Only generate object files with GIMPLE when this environment variable is set for
         // now because this requires a particular setup (same gcc/lto1/lto-wrapper commit as libgccjit).
         // TODO: remove this environment variable.
-        let fat_lto = env::var("EMBED_LTO_BITCODE").as_deref() == Ok("1");
+        let fat_lto = module.module_llvm.fat_lto;
 
         let bc_out = cgcx.output_filenames.temp_path(OutputType::Bitcode, module_name);
         let obj_out = cgcx.output_filenames.temp_path(OutputType::Object, module_name);
 
-        if config.bitcode_needed() && fat_lto {
+        if config.bitcode_needed() {
             let _timer = cgcx
                 .prof
                 .generic_activity_with_arg("GCC_module_codegen_make_bitcode", &*module.name);
@@ -57,6 +57,8 @@ pub(crate) unsafe fn codegen(
                     .generic_activity_with_arg("GCC_module_codegen_emit_bitcode", &*module.name);
                 context.add_command_line_option("-flto=auto");
                 context.add_command_line_option("-flto-partition=one");
+                // TODO: remove since we don't want fat objects when it is for Bitcode only.
+                context.add_command_line_option("-ffat-lto-objects");
                 context
                     .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
             }
@@ -118,12 +120,12 @@ pub(crate) unsafe fn codegen(
                     if fat_lto {
                         context.add_command_line_option("-flto=auto");
                         context.add_command_line_option("-flto-partition=one");
-
-                        // NOTE: without -fuse-linker-plugin, we get the following error:
-                        // lto1: internal compiler error: decompressed stream: Destination buffer is too small
-                        context.add_driver_option("-fuse-linker-plugin");
                     }
 
+                    // NOTE: without -fuse-linker-plugin, we get the following error:
+                    // lto1: internal compiler error: decompressed stream: Destination buffer is too small
+                    //context.add_driver_option("-fuse-linker-plugin");
+
                     context.add_driver_option("-Wl,-r");
                     // NOTE: we need -nostdlib, otherwise, we get the following error:
                     // /usr/bin/ld: cannot find -lgcc_s: No such file or directory
@@ -135,7 +137,6 @@ pub(crate) unsafe fn codegen(
                         obj_out.to_str().expect("path to str"),
                     );
                 } else {
-                    //println!("Combining to object file");
                     context.compile_to_file(
                         OutputKind::ObjectFile,
                         obj_out.to_str().expect("path to str"),
diff --git a/src/base.rs b/src/base.rs
index be149ffe5a16..0287c73569a6 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -225,6 +225,7 @@ pub fn compile_codegen_unit(
             name: cgu_name.to_string(),
             module_llvm: GccContext {
                 context: Arc::new(SyncContext::new(context)),
+                fat_lto: false,
                 should_combine_object_files: false,
                 temp_dir: None,
             },
diff --git a/src/lib.rs b/src/lib.rs
index 1132b0cd2f5a..123cebf51377 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -304,6 +304,7 @@ impl ExtraBackendMethods for GccCodegenBackend {
     ) -> Self::Module {
         let mut mods = GccContext {
             context: Arc::new(SyncContext::new(new_context(tcx))),
+            fat_lto: false,
             should_combine_object_files: false,
             temp_dir: None,
         };
@@ -336,6 +337,7 @@ impl ExtraBackendMethods for GccCodegenBackend {
 pub struct GccContext {
     context: Arc<SyncContext>,
     should_combine_object_files: bool,
+    fat_lto: bool,
     // Temporary directory used by LTO. We keep it here so that it's not removed before linking.
     temp_dir: Option<TempDir>,
 }
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index ce867be7390c..5a55bdb156e3 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -94,3 +94,4 @@ tests/ui/consts/const-eval/parse_ints.rs
 tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
 tests/ui/backtrace/backtrace.rs
 tests/ui/lifetimes/tail-expr-lock-poisoning.rs
+tests/ui/runtime/rt-explody-panic-payloads.rs

From bc8520d98eb59563be09ca8772501b26a2a58ed9 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 5 Jul 2024 11:35:16 -0400
Subject: [PATCH 694/997] Revert "Fix LTO tests"

This reverts commit 2d123d08c98419261bddec8f3ad8b80cadb82515.
---
 .github/workflows/release.yml |  4 ++--
 Readme.md                     | 11 +++++++++++
 build_system/src/config.rs    |  6 ++++++
 src/back/lto.rs               | 14 +++++++-------
 src/back/write.rs             | 15 +++++++--------
 src/base.rs                   |  1 -
 src/lib.rs                    |  2 --
 tests/failing-ui-tests.txt    |  1 -
 8 files changed, 33 insertions(+), 21 deletions(-)

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index f0b1212986dd..d5242926eb4d 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -53,7 +53,7 @@ jobs:
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
-        ./y.sh build --sysroot --release --release-sysroot
+        EMBED_LTO_BITCODE=1 ./y.sh build --sysroot --release --release-sysroot
         cargo test
         ./y.sh clean all
 
@@ -70,4 +70,4 @@ jobs:
       run: |
         # FIXME(antoyo): we cannot enable LTO for stdarch tests currently because of some failing LTO tests using proc-macros.
         echo -n 'lto = "fat"' >> build_system/build_sysroot/Cargo.toml
-        ./y.sh test --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }}
+        EMBED_LTO_BITCODE=1 ./y.sh test --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }}
diff --git a/Readme.md b/Readme.md
index d0b57d2c729c..bd552b84f928 100644
--- a/Readme.md
+++ b/Readme.md
@@ -119,6 +119,17 @@ $ CHANNEL="release" $CG_GCCJIT_DIR/y.sh cargo run
 
 If you compiled cg_gccjit in debug mode (aka you didn't pass `--release` to `./y.sh test`) you should use `CHANNEL="debug"` instead or omit `CHANNEL="release"` completely.
 
+### LTO
+
+To use LTO, you need to set the variable `FAT_LTO=1` and `EMBED_LTO_BITCODE=1` in addition to setting `lto = "fat"` in the `Cargo.toml`.
+Don't set `FAT_LTO` when compiling the sysroot, though: only set `EMBED_LTO_BITCODE=1`.
+
+Failing to set `EMBED_LTO_BITCODE` will give you the following error:
+
+```
+error: failed to copy bitcode to object file: No such file or directory (os error 2)
+```
+
 ### Rustc
 
 If you want to run `rustc` directly, you can do so with:
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 965aedd8be89..30321939f64b 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -387,6 +387,12 @@ impl ConfigInfo {
             rustflags.push("-Csymbol-mangling-version=v0".to_string());
         }
 
+        // Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
+        // TODO(antoyo): remove when we can handle ThinLTO.
+        // TODO: remove:
+        /*if !env.contains_key(&"FAT_LTO".to_string()) {
+            rustflags.push("-Clto=off".to_string());
+        }*/
         // FIXME(antoyo): remove once the atomic shim is gone
         if os_name == "Darwin" {
             rustflags.extend_from_slice(&[
diff --git a/src/back/lto.rs b/src/back/lto.rs
index 88eff198739e..19573628b1b9 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -307,7 +307,6 @@ fn fat_lto(
             match bc_decoded {
                 SerializedModule::Local(ref module_buffer) => {
                     module.module_llvm.should_combine_object_files = true;
-                    module.module_llvm.fat_lto = true;
                     module
                         .module_llvm
                         .context
@@ -490,6 +489,7 @@ fn thin_lto(
                 //let path = module_buffer.0.to_str().expect("path");
                 //let my_path = PathBuf::from(path);
                 //let exists = my_path.exists();
+                //println!("Path: {:?}: {}", path, exists);
                 /*module.module_llvm.should_combine_object_files = true;
                 module
                 .module_llvm
@@ -626,6 +626,11 @@ pub unsafe fn optimize_thin_module(
             match *module {
                 SerializedModule::Local(ref module_buffer) => {
                     let path = module_buffer.0.to_str().expect("path");
+
+                    //let my_path = PathBuf::from(path);
+                    //let exists = my_path.exists();
+                    //println!("Path2: {:?}: {}", path, exists);
+
                     context.add_driver_option(path);
                     should_combine_object_files = true;
                     /*module.module_llvm.should_combine_object_files = true;
@@ -643,12 +648,7 @@ pub unsafe fn optimize_thin_module(
         }
     };
     let module = ModuleCodegen {
-        module_llvm: GccContext {
-            context,
-            should_combine_object_files,
-            fat_lto: false,
-            temp_dir: None,
-        },
+        module_llvm: GccContext { context, should_combine_object_files, temp_dir: None },
         name: thin_module.name().to_string(),
         kind: ModuleKind::Regular,
     };
diff --git a/src/back/write.rs b/src/back/write.rs
index 8922e7e742b2..b9bb62a0351d 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -32,12 +32,12 @@ pub(crate) unsafe fn codegen(
         // NOTE: Only generate object files with GIMPLE when this environment variable is set for
         // now because this requires a particular setup (same gcc/lto1/lto-wrapper commit as libgccjit).
         // TODO: remove this environment variable.
-        let fat_lto = module.module_llvm.fat_lto;
+        let fat_lto = env::var("EMBED_LTO_BITCODE").as_deref() == Ok("1");
 
         let bc_out = cgcx.output_filenames.temp_path(OutputType::Bitcode, module_name);
         let obj_out = cgcx.output_filenames.temp_path(OutputType::Object, module_name);
 
-        if config.bitcode_needed() {
+        if config.bitcode_needed() && fat_lto {
             let _timer = cgcx
                 .prof
                 .generic_activity_with_arg("GCC_module_codegen_make_bitcode", &*module.name);
@@ -57,8 +57,6 @@ pub(crate) unsafe fn codegen(
                     .generic_activity_with_arg("GCC_module_codegen_emit_bitcode", &*module.name);
                 context.add_command_line_option("-flto=auto");
                 context.add_command_line_option("-flto-partition=one");
-                // TODO: remove since we don't want fat objects when it is for Bitcode only.
-                context.add_command_line_option("-ffat-lto-objects");
                 context
                     .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
             }
@@ -120,11 +118,11 @@ pub(crate) unsafe fn codegen(
                     if fat_lto {
                         context.add_command_line_option("-flto=auto");
                         context.add_command_line_option("-flto-partition=one");
-                    }
 
-                    // NOTE: without -fuse-linker-plugin, we get the following error:
-                    // lto1: internal compiler error: decompressed stream: Destination buffer is too small
-                    //context.add_driver_option("-fuse-linker-plugin");
+                        // NOTE: without -fuse-linker-plugin, we get the following error:
+                        // lto1: internal compiler error: decompressed stream: Destination buffer is too small
+                        context.add_driver_option("-fuse-linker-plugin");
+                    }
 
                     context.add_driver_option("-Wl,-r");
                     // NOTE: we need -nostdlib, otherwise, we get the following error:
@@ -137,6 +135,7 @@ pub(crate) unsafe fn codegen(
                         obj_out.to_str().expect("path to str"),
                     );
                 } else {
+                    //println!("Combining to object file");
                     context.compile_to_file(
                         OutputKind::ObjectFile,
                         obj_out.to_str().expect("path to str"),
diff --git a/src/base.rs b/src/base.rs
index 0287c73569a6..be149ffe5a16 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -225,7 +225,6 @@ pub fn compile_codegen_unit(
             name: cgu_name.to_string(),
             module_llvm: GccContext {
                 context: Arc::new(SyncContext::new(context)),
-                fat_lto: false,
                 should_combine_object_files: false,
                 temp_dir: None,
             },
diff --git a/src/lib.rs b/src/lib.rs
index 123cebf51377..1132b0cd2f5a 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -304,7 +304,6 @@ impl ExtraBackendMethods for GccCodegenBackend {
     ) -> Self::Module {
         let mut mods = GccContext {
             context: Arc::new(SyncContext::new(new_context(tcx))),
-            fat_lto: false,
             should_combine_object_files: false,
             temp_dir: None,
         };
@@ -337,7 +336,6 @@ impl ExtraBackendMethods for GccCodegenBackend {
 pub struct GccContext {
     context: Arc<SyncContext>,
     should_combine_object_files: bool,
-    fat_lto: bool,
     // Temporary directory used by LTO. We keep it here so that it's not removed before linking.
     temp_dir: Option<TempDir>,
 }
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 5a55bdb156e3..ce867be7390c 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -94,4 +94,3 @@ tests/ui/consts/const-eval/parse_ints.rs
 tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
 tests/ui/backtrace/backtrace.rs
 tests/ui/lifetimes/tail-expr-lock-poisoning.rs
-tests/ui/runtime/rt-explody-panic-payloads.rs

From fe054be06ed9cea3f8b6efc723de20feb418cb4d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 5 Jul 2024 11:55:08 -0400
Subject: [PATCH 695/997] Second attempt at fixing LTO tests

FIXME: we now have fat LTO objects even when only bitcode is requested.
---
 Readme.md                  | 3 +--
 build_system/src/config.rs | 6 ------
 src/back/lto.rs            | 6 ------
 src/back/write.rs          | 3 ++-
 tests/failing-ui-tests.txt | 1 +
 5 files changed, 4 insertions(+), 15 deletions(-)

diff --git a/Readme.md b/Readme.md
index bd552b84f928..e92c16ece2f1 100644
--- a/Readme.md
+++ b/Readme.md
@@ -121,8 +121,7 @@ If you compiled cg_gccjit in debug mode (aka you didn't pass `--release` to `./y
 
 ### LTO
 
-To use LTO, you need to set the variable `FAT_LTO=1` and `EMBED_LTO_BITCODE=1` in addition to setting `lto = "fat"` in the `Cargo.toml`.
-Don't set `FAT_LTO` when compiling the sysroot, though: only set `EMBED_LTO_BITCODE=1`.
+To use LTO, you need to set the variable `EMBED_LTO_BITCODE=1` in addition to setting `lto = "fat"` in the `Cargo.toml`.
 
 Failing to set `EMBED_LTO_BITCODE` will give you the following error:
 
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 30321939f64b..965aedd8be89 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -387,12 +387,6 @@ impl ConfigInfo {
             rustflags.push("-Csymbol-mangling-version=v0".to_string());
         }
 
-        // Since we don't support ThinLTO, disable LTO completely when not trying to do LTO.
-        // TODO(antoyo): remove when we can handle ThinLTO.
-        // TODO: remove:
-        /*if !env.contains_key(&"FAT_LTO".to_string()) {
-            rustflags.push("-Clto=off".to_string());
-        }*/
         // FIXME(antoyo): remove once the atomic shim is gone
         if os_name == "Darwin" {
             rustflags.extend_from_slice(&[
diff --git a/src/back/lto.rs b/src/back/lto.rs
index 19573628b1b9..6b2dbbbed677 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -489,7 +489,6 @@ fn thin_lto(
                 //let path = module_buffer.0.to_str().expect("path");
                 //let my_path = PathBuf::from(path);
                 //let exists = my_path.exists();
-                //println!("Path: {:?}: {}", path, exists);
                 /*module.module_llvm.should_combine_object_files = true;
                 module
                 .module_llvm
@@ -626,11 +625,6 @@ pub unsafe fn optimize_thin_module(
             match *module {
                 SerializedModule::Local(ref module_buffer) => {
                     let path = module_buffer.0.to_str().expect("path");
-
-                    //let my_path = PathBuf::from(path);
-                    //let exists = my_path.exists();
-                    //println!("Path2: {:?}: {}", path, exists);
-
                     context.add_driver_option(path);
                     should_combine_object_files = true;
                     /*module.module_llvm.should_combine_object_files = true;
diff --git a/src/back/write.rs b/src/back/write.rs
index b9bb62a0351d..802968979c72 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -57,6 +57,8 @@ pub(crate) unsafe fn codegen(
                     .generic_activity_with_arg("GCC_module_codegen_emit_bitcode", &*module.name);
                 context.add_command_line_option("-flto=auto");
                 context.add_command_line_option("-flto-partition=one");
+                // TODO: remove since we don't want fat objects when it is for Bitcode only.
+                context.add_command_line_option("-ffat-lto-objects");
                 context
                     .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
             }
@@ -135,7 +137,6 @@ pub(crate) unsafe fn codegen(
                         obj_out.to_str().expect("path to str"),
                     );
                 } else {
-                    //println!("Combining to object file");
                     context.compile_to_file(
                         OutputKind::ObjectFile,
                         obj_out.to_str().expect("path to str"),
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index ce867be7390c..5a55bdb156e3 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -94,3 +94,4 @@ tests/ui/consts/const-eval/parse_ints.rs
 tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
 tests/ui/backtrace/backtrace.rs
 tests/ui/lifetimes/tail-expr-lock-poisoning.rs
+tests/ui/runtime/rt-explody-panic-payloads.rs

From 14d327a265dde1df05cf15e23c6956197a22f141 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 5 Jul 2024 13:11:24 -0400
Subject: [PATCH 696/997] Disable run-make tests

---
 build_system/src/test.rs | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 5efdac9444df..8d088a3aac31 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1038,18 +1038,19 @@ where
 }
 
 fn test_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    test_rustc_inner(env, args, |_| Ok(false), false, "run-make")?;
+    //test_rustc_inner(env, args, |_| Ok(false), false, "run-make")?;
     test_rustc_inner(env, args, |_| Ok(false), false, "ui")
 }
 
 fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    let result1 = test_rustc_inner(
+    let result1 = Ok(());
+    /*test_rustc_inner(
         env,
         args,
         retain_files_callback("tests/failing-run-make-tests.txt", "run-make"),
         false,
         "run-make",
-    );
+    )*/
 
     let result2 = test_rustc_inner(
         env,
@@ -1070,13 +1071,14 @@ fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
         false,
         "ui",
     )?;
-    test_rustc_inner(
+    Ok(())
+    /*test_rustc_inner(
         env,
         args,
         remove_files_callback("tests/failing-run-make-tests.txt", "run-make"),
         false,
         "run-make",
-    )
+    )*/
 }
 
 fn test_failing_ui_pattern_tests(env: &Env, args: &TestArg) -> Result<(), String> {

From 0b5be441cf5e25beba8990b201be30293072245e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 5 Jul 2024 14:14:18 -0400
Subject: [PATCH 697/997] Fix for gcc-13 without int128

---
 src/intrinsic/mod.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index a739e6ff3fcb..839ebf3f2987 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -791,6 +791,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         } else {
             arg
         };
+        let arg_type = arg.get_type();
         let (count_trailing_zeroes, expected_type) =
             // TODO(antoyo): write a new function Type::is_compatible_with(&Type) and use it here
             // instead of using is_uint().

From 5681c3cf681d0dc5acdafbd28eed1b8a7ad751fa Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 5 Jul 2024 15:35:57 -0400
Subject: [PATCH 698/997] Cleanup

---
 .github/workflows/gcc12.yml | 1 -
 Cargo.toml                  | 3 +--
 example/example.rs          | 1 -
 3 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index b0775646c5c9..5977ed33c56e 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -70,7 +70,6 @@ jobs:
         ./y.sh build --no-default-features --sysroot-panic-abort
         # Uncomment when we no longer need to remove global variables.
         #./y.sh build --sysroot --no-default-features --sysroot-panic-abort
-        #./y.sh build --sysroot --no-default-features --sysroot-panic-abort
         #cargo test --no-default-features
         #./y.sh clean all
 
diff --git a/Cargo.toml b/Cargo.toml
index 309746f04e01..5caca63f6348 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,8 +22,7 @@ master = ["gccjit/master"]
 default = ["master"]
 
 [dependencies]
-#gccjit = "2.0"
-gccjit = { git = "https://github.com/rust-lang/gccjit.rs" }
+gccjit = "2.1"
 
 # Local copy.
 #gccjit = { path = "../gccjit.rs" }
diff --git a/example/example.rs b/example/example.rs
index 30e3c3c30c22..03470b74d0a1 100644
--- a/example/example.rs
+++ b/example/example.rs
@@ -153,7 +153,6 @@ fn array_as_slice(arr: &[u8; 3]) -> &[u8] {
     arr
 }
 
-// FIXME: fix the intrinsic implementation to work with the new ->u32 signature
 unsafe fn use_ctlz_nonzero(a: u16) -> u32 {
     intrinsics::ctlz_nonzero(a)
 }

From f7f9a3fb28faab90cf59d2e11b30e8ebc19d5845 Mon Sep 17 00:00:00 2001
From: sapir <yasapir@gmail.com>
Date: Mon, 5 Aug 2024 00:37:51 +0300
Subject: [PATCH 699/997] Update Cargo.lock

---
 Cargo.lock | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index cd693835ded1..915229f7e7ee 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -79,16 +79,18 @@ dependencies = [
 
 [[package]]
 name = "gccjit"
-version = "2.0.0"
-source = "git+https://github.com/rust-lang/gccjit.rs#328cb1b414f67dfa15162ba7a55ed01931f1b219"
+version = "2.1.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "62e0ba949ebee07c5cc21f02cb48f28f2c8db7fcbc15fdc5120476a6c43b4636"
 dependencies = [
  "gccjit_sys",
 ]
 
 [[package]]
 name = "gccjit_sys"
-version = "0.1.0"
-source = "git+https://github.com/rust-lang/gccjit.rs#328cb1b414f67dfa15162ba7a55ed01931f1b219"
+version = "0.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a5bbf85e12c2593772329a9d4e8310271f6706e6045ce4f41b041dd34fba6603"
 dependencies = [
  "libc",
 ]

From f579dee206eec8b914487d52fc65843bbae795db Mon Sep 17 00:00:00 2001
From: sapir <yasapir@gmail.com>
Date: Mon, 5 Aug 2024 00:37:59 +0300
Subject: [PATCH 700/997] Implement CodeModel

---
 src/base.rs | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/base.rs b/src/base.rs
index be149ffe5a16..e3558b6b8751 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -129,8 +129,19 @@ pub fn compile_codegen_unit(
         // NOTE: Rust relies on LLVM doing wrapping on overflow.
         context.add_command_line_option("-fwrapv");
 
+        if let Some(model) = tcx.sess.code_model() {
+            use rustc_target::spec::CodeModel;
+
+            context.add_command_line_option(match model {
+                CodeModel::Tiny => "-mcmodel=tiny",
+                CodeModel::Small => "-mcmodel=small",
+                CodeModel::Kernel => "-mcmodel=kernel",
+                CodeModel::Medium => "-mcmodel=medium",
+                CodeModel::Large => "-mcmodel=large",
+            });
+        }
+
         if tcx.sess.relocation_model() == rustc_target::spec::RelocModel::Static {
-            context.add_command_line_option("-mcmodel=kernel");
             context.add_command_line_option("-fno-pie");
         }
 

From 014a84029c1ea3d66056f0ae920e547f8ba90168 Mon Sep 17 00:00:00 2001
From: sapir <yasapir@gmail.com>
Date: Mon, 5 Aug 2024 01:15:57 +0300
Subject: [PATCH 701/997] Replace stack_var_count and RETURN_VALUE_COUNT with a
 single counter

---
 src/builder.rs | 27 ++++++++++++---------------
 1 file changed, 12 insertions(+), 15 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 307348f595dc..e7f1e7e6b90d 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -41,9 +41,6 @@ use crate::type_of::LayoutGccExt;
 // TODO(antoyo)
 type Funclet = ();
 
-// TODO(antoyo): remove this variable.
-static mut RETURN_VALUE_COUNT: usize = 0;
-
 enum ExtremumOperation {
     Max,
     Min,
@@ -52,13 +49,18 @@ enum ExtremumOperation {
 pub struct Builder<'a: 'gcc, 'gcc, 'tcx> {
     pub cx: &'a CodegenCx<'gcc, 'tcx>,
     pub block: Block<'gcc>,
-    stack_var_count: Cell<usize>,
     pub location: Option<Location<'gcc>>,
+    value_counter: Cell<u64>,
 }
 
 impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     fn with_cx(cx: &'a CodegenCx<'gcc, 'tcx>, block: Block<'gcc>) -> Self {
-        Builder { cx, block, stack_var_count: Cell::new(0), location: None }
+        Builder { cx, block, location: None, value_counter: Cell::new(0) }
+    }
+
+    fn next_value_counter(&self) -> u64 {
+        self.value_counter.set(self.value_counter.get() + 1);
+        self.value_counter.get()
     }
 
     fn atomic_extremum(
@@ -324,11 +326,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let void_type = self.context.new_type::<()>();
         let current_func = self.block.get_function();
         if return_type != void_type {
-            unsafe { RETURN_VALUE_COUNT += 1 };
             let result = current_func.new_local(
                 self.location,
                 return_type,
-                &format!("returnValue{}", unsafe { RETURN_VALUE_COUNT }),
+                &format!("returnValue{}", self.next_value_counter()),
             );
             self.block.add_assignment(
                 self.location,
@@ -384,7 +385,6 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let current_func = self.block.get_function();
 
         if return_type != void_type {
-            unsafe { RETURN_VALUE_COUNT += 1 };
             let return_value = self.cx.context.new_call_through_ptr(self.location, func_ptr, &args);
             let return_value = llvm::adjust_intrinsic_return_value(
                 self,
@@ -397,7 +397,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let result = current_func.new_local(
                 self.location,
                 return_value.get_type(),
-                &format!("ptrReturnValue{}", unsafe { RETURN_VALUE_COUNT }),
+                &format!("ptrReturnValue{}", self.next_value_counter()),
             );
             self.block.add_assignment(self.location, result, return_value);
             result.to_rvalue()
@@ -446,11 +446,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let return_type = self.context.new_type::<bool>();
         let current_func = self.block.get_function();
         // TODO(antoyo): return the new_call() directly? Since the overflow function has no side-effects.
-        unsafe { RETURN_VALUE_COUNT += 1 };
         let result = current_func.new_local(
             self.location,
             return_type,
-            &format!("overflowReturnValue{}", unsafe { RETURN_VALUE_COUNT }),
+            &format!("overflowReturnValue{}", self.next_value_counter()),
         );
         self.block.add_assignment(
             self.location,
@@ -934,9 +933,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn alloca(&mut self, size: Size, align: Align) -> RValue<'gcc> {
         let ty = self.cx.type_array(self.cx.type_i8(), size.bytes()).get_aligned(align.bytes());
         // TODO(antoyo): It might be better to return a LValue, but fixing the rustc API is non-trivial.
-        self.stack_var_count.set(self.stack_var_count.get() + 1);
         self.current_func()
-            .new_local(self.location, ty, &format!("stack_var_{}", self.stack_var_count.get()))
+            .new_local(self.location, ty, &format!("stack_var_{}", self.next_value_counter()))
             .get_address(self.location)
     }
 
@@ -959,11 +957,10 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         };
         let ptr = self.context.new_cast(self.location, ptr, aligned_type.make_pointer());
         let deref = ptr.dereference(self.location).to_rvalue();
-        unsafe { RETURN_VALUE_COUNT += 1 };
         let loaded_value = function.new_local(
             self.location,
             aligned_type,
-            &format!("loadedValue{}", unsafe { RETURN_VALUE_COUNT }),
+            &format!("loadedValue{}", self.next_value_counter()),
         );
         block.add_assignment(self.location, loaded_value, deref);
         loaded_value.to_rvalue()

From 4fe1647d21e8533d718ae7026391443a76ce3351 Mon Sep 17 00:00:00 2001
From: sapir <yasapir@gmail.com>
Date: Wed, 7 Aug 2024 13:43:27 +0300
Subject: [PATCH 702/997] Remove dummy value locals for function ptr calls

---
 src/builder.rs | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index e7f1e7e6b90d..38e147599c96 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -341,7 +341,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             self.block
                 .add_eval(self.location, self.cx.context.new_call(self.location, func, &args));
             // Return dummy value when not having return value.
-            self.context.new_rvalue_from_long(self.isize_type, 0)
+            self.context.new_rvalue_zero(self.isize_type)
         }
     }
 
@@ -421,17 +421,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 self.cx.context.new_call_through_ptr(self.location, func_ptr, &args),
             );
             // Return dummy value when not having return value.
-            let result = current_func.new_local(
-                self.location,
-                self.isize_type,
-                "dummyValueThatShouldNeverBeUsed",
-            );
-            self.block.add_assignment(
-                self.location,
-                result,
-                self.context.new_rvalue_from_long(self.isize_type, 0),
-            );
-            result.to_rvalue()
+            self.context.new_rvalue_zero(self.isize_type)
         }
     }
 

From 3eb28444b522c01e9461255b38990b55915f3651 Mon Sep 17 00:00:00 2001
From: Michael Goulet <michael@errs.io>
Date: Wed, 12 Jun 2024 13:06:23 -0400
Subject: [PATCH 703/997] Give Instance::expect_resolve a span

---
 src/context.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/context.rs b/src/context.rs
index 4458ca84bbb0..e258f16bacb4 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -494,6 +494,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                     ty::ParamEnv::reveal_all(),
                     def_id,
                     ty::List::empty(),
+                    None,
                 );
 
                 let symbol_name = tcx.symbol_name(instance).name;

From 007fa3b94eed08b51a7d5aea2a79292744f04935 Mon Sep 17 00:00:00 2001
From: Michael Goulet <michael@errs.io>
Date: Mon, 1 Jul 2024 16:32:32 -0400
Subject: [PATCH 704/997] Fix spans

---
 src/context.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/context.rs b/src/context.rs
index e258f16bacb4..86a5000a7232 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -17,7 +17,7 @@ use rustc_middle::ty::layout::{
 };
 use rustc_middle::ty::{self, Instance, ParamEnv, PolyExistentialTraitRef, Ty, TyCtxt};
 use rustc_session::Session;
-use rustc_span::{source_map::respan, Span};
+use rustc_span::{source_map::respan, Span, DUMMY_SP};
 use rustc_target::abi::{
     call::FnAbi, HasDataLayout, PointeeInfo, Size, TargetDataLayout, VariantIdx,
 };
@@ -494,7 +494,7 @@ impl<'gcc, 'tcx> MiscMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                     ty::ParamEnv::reveal_all(),
                     def_id,
                     ty::List::empty(),
-                    None,
+                    DUMMY_SP,
                 );
 
                 let symbol_name = tcx.symbol_name(instance).name;

From fb4738571fdecbee2ad0d89f6e181f2feb90e908 Mon Sep 17 00:00:00 2001
From: Ralf Jung <post@ralfj.de>
Date: Tue, 2 Jul 2024 21:05:22 +0200
Subject: [PATCH 705/997] Miri function identity hack: account for possible
 inlining

---
 src/common.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/common.rs b/src/common.rs
index 35699346b297..19333689aaa9 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -221,7 +221,7 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                         }
                         value
                     }
-                    GlobalAlloc::Function(fn_instance) => self.get_fn_addr(fn_instance),
+                    GlobalAlloc::Function { instance, .. } => self.get_fn_addr(instance),
                     GlobalAlloc::VTable(ty, trait_ref) => {
                         let alloc = self
                             .tcx

From 24ab684b44fc68d9dde7d1ca285795512d521ef3 Mon Sep 17 00:00:00 2001
From: Michael Goulet <michael@errs.io>
Date: Thu, 11 Jul 2024 18:57:56 -0400
Subject: [PATCH 706/997] Remove lang feature for type ascription

---
 example/mini_core.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/example/mini_core.rs b/example/mini_core.rs
index a48c0a4450c2..f47bfdad1312 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -1,5 +1,5 @@
 #![feature(
-    no_core, lang_items, intrinsics, unboxed_closures, type_ascription, extern_types,
+    no_core, lang_items, intrinsics, unboxed_closures, extern_types,
     decl_macro, rustc_attrs, transparent_unions, auto_traits, freeze_impls,
     thread_local
 )]

From 6199de283301147369bf3bfd478ba19fe4cb3c85 Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Tue, 16 Apr 2024 18:31:43 +0000
Subject: [PATCH 707/997] Sync ar_archive_writer to LLVM 18.1.3

From LLVM 15.0.0-rc3. This adds support for COFF archives containing
Arm64EC object files and has various fixes for AIX big archive files.
---
 src/archive.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/archive.rs b/src/archive.rs
index 73ff0c37b665..21676f5dbb6a 100644
--- a/src/archive.rs
+++ b/src/archive.rs
@@ -1,7 +1,7 @@
 use std::path::{Path, PathBuf};
 
 use rustc_codegen_ssa::back::archive::{
-    get_native_object_symbols, ArArchiveBuilder, ArchiveBuilder, ArchiveBuilderBuilder,
+    ArArchiveBuilder, ArchiveBuilder, ArchiveBuilderBuilder, DEFAULT_OBJECT_READER,
 };
 use rustc_session::Session;
 
@@ -11,7 +11,7 @@ pub(crate) struct ArArchiveBuilderBuilder;
 
 impl ArchiveBuilderBuilder for ArArchiveBuilderBuilder {
     fn new_archive_builder<'a>(&self, sess: &'a Session) -> Box<dyn ArchiveBuilder + 'a> {
-        Box::new(ArArchiveBuilder::new(sess, get_native_object_symbols))
+        Box::new(ArArchiveBuilder::new(sess, &DEFAULT_OBJECT_READER))
     }
 
     fn create_dll_import_lib(

From f34f3c7e7fcef1c75fac9d9f8eec21101513466c Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume.gomez@huawei.com>
Date: Wed, 17 Jul 2024 20:17:44 +0200
Subject: [PATCH 708/997] Align cg_gcc rustfmt.toml with rust's

---
 .rustfmt.toml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/.rustfmt.toml b/.rustfmt.toml
index 2a35f0230c69..725aec25a071 100644
--- a/.rustfmt.toml
+++ b/.rustfmt.toml
@@ -1 +1,3 @@
+version = "Two"
 use_small_heuristics = "Max"
+merge_derives = false

From fd56f44836380abc2b99a9ac2776e96ff15b8ad0 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume.gomez@huawei.com>
Date: Wed, 17 Jul 2024 20:22:07 +0200
Subject: [PATCH 709/997] Format cg_gcc with same formatting parameters

---
 build_system/src/clone_gcc.rs |  2 +-
 build_system/src/config.rs    | 14 +++++++-------
 build_system/src/test.rs      | 14 +++-----------
 build_system/src/utils.rs     |  6 +-----
 src/abi.rs                    |  6 +-----
 src/asm.rs                    |  6 +-----
 src/builder.rs                | 18 +++---------------
 src/common.rs                 |  6 +-----
 8 files changed, 18 insertions(+), 54 deletions(-)

diff --git a/build_system/src/clone_gcc.rs b/build_system/src/clone_gcc.rs
index aee46afaeb04..cbf590c0c321 100644
--- a/build_system/src/clone_gcc.rs
+++ b/build_system/src/clone_gcc.rs
@@ -34,7 +34,7 @@ impl Args {
                 "--out-path" => match args.next() {
                     Some(path) if !path.is_empty() => out_path = Some(path),
                     _ => {
-                        return Err("Expected an argument after `--out-path`, found nothing".into())
+                        return Err("Expected an argument after `--out-path`, found nothing".into());
                     }
                 },
                 "--help" => {
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 965aedd8be89..bbb711c8428b 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -54,7 +54,7 @@ impl ConfigFile {
                     config.gcc_path = Some(value.as_str().to_string())
                 }
                 ("gcc-path", _) => {
-                    return failed_config_parsing(config_file, "Expected a string for `gcc-path`")
+                    return failed_config_parsing(config_file, "Expected a string for `gcc-path`");
                 }
                 ("download-gccjit", TomlValue::Boolean(value)) => {
                     config.download_gccjit = Some(*value)
@@ -63,7 +63,7 @@ impl ConfigFile {
                     return failed_config_parsing(
                         config_file,
                         "Expected a boolean for `download-gccjit`",
-                    )
+                    );
                 }
                 _ => return failed_config_parsing(config_file, &format!("Unknown key `{}`", key)),
             }
@@ -73,7 +73,7 @@ impl ConfigFile {
                 return failed_config_parsing(
                     config_file,
                     "At least one of `gcc-path` or `download-gccjit` value must be set",
-                )
+                );
             }
             (Some(_), Some(true)) => {
                 println!(
@@ -144,7 +144,7 @@ impl ConfigInfo {
                 _ => {
                     return Err(
                         "Expected a value after `--target-triple`, found nothing".to_string()
-                    )
+                    );
                 }
             },
             "--out-dir" => match args.next() {
@@ -158,7 +158,7 @@ impl ConfigInfo {
                     self.config_file = Some(arg.to_string());
                 }
                 _ => {
-                    return Err("Expected a value after `--config-file`, found nothing".to_string())
+                    return Err("Expected a value after `--config-file`, found nothing".to_string());
                 }
             },
             "--release-sysroot" => self.sysroot_release_channel = true,
@@ -169,7 +169,7 @@ impl ConfigInfo {
                     self.cg_gcc_path = Some(arg.into());
                 }
                 _ => {
-                    return Err("Expected a value after `--cg_gcc-path`, found nothing".to_string())
+                    return Err("Expected a value after `--cg_gcc-path`, found nothing".to_string());
                 }
             },
             "--use-backend" => match args.next() {
@@ -277,7 +277,7 @@ impl ConfigInfo {
         self.gcc_path = match gcc_path {
             Some(path) => path,
             None => {
-                return Err(format!("missing `gcc-path` value from `{}`", config_file.display(),))
+                return Err(format!("missing `gcc-path` value from `{}`", config_file.display(),));
             }
         };
         Ok(())
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 8d088a3aac31..06f28d13fb3a 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -109,7 +109,7 @@ impl TestArg {
                         test_arg.flags.extend_from_slice(&["--features".into(), feature]);
                     }
                     _ => {
-                        return Err("Expected an argument after `--features`, found nothing".into())
+                        return Err("Expected an argument after `--features`, found nothing".into());
                     }
                 },
                 "--use-system-gcc" => {
@@ -458,11 +458,7 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
     .map_err(|error| format!("Failed to retrieve cargo path: {:?}", error))
     .and_then(|cargo| {
         let cargo = cargo.trim().to_owned();
-        if cargo.is_empty() {
-            Err(format!("`cargo` path is empty"))
-        } else {
-            Ok(cargo)
-        }
+        if cargo.is_empty() { Err(format!("`cargo` path is empty")) } else { Ok(cargo) }
     })?;
     let rustc = String::from_utf8(
         run_command_with_env(&[&"rustup", &toolchain, &"which", &"rustc"], rust_dir, Some(env))?
@@ -471,11 +467,7 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
     .map_err(|error| format!("Failed to retrieve rustc path: {:?}", error))
     .and_then(|rustc| {
         let rustc = rustc.trim().to_owned();
-        if rustc.is_empty() {
-            Err(format!("`rustc` path is empty"))
-        } else {
-            Ok(rustc)
-        }
+        if rustc.is_empty() { Err(format!("`rustc` path is empty")) } else { Ok(rustc) }
     })?;
     let llvm_filecheck = match run_command_with_env(
         &[
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 3bba8df6c650..e338d1b4992e 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -175,11 +175,7 @@ pub fn cargo_install(to_install: &str) -> Result<(), String> {
 pub fn get_os_name() -> Result<String, String> {
     let output = run_command(&[&"uname"], None)?;
     let name = std::str::from_utf8(&output.stdout).unwrap_or("").trim().to_string();
-    if !name.is_empty() {
-        Ok(name)
-    } else {
-        Err("Failed to retrieve the OS name".to_string())
-    }
+    if !name.is_empty() { Ok(name) } else { Err("Failed to retrieve the OS name".to_string()) }
 }
 
 #[derive(Default, PartialEq)]
diff --git a/src/abi.rs b/src/abi.rs
index 166dd080cf20..0a99e7213be5 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -26,11 +26,7 @@ impl<'a, 'gcc, 'tcx> AbiBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         } else {
             false
         };
-        if on_stack {
-            param.to_lvalue().get_address(None)
-        } else {
-            param.to_rvalue()
-        }
+        if on_stack { param.to_lvalue().get_address(None) } else { param.to_rvalue() }
     }
 }
 
diff --git a/src/asm.rs b/src/asm.rs
index aa485846cd42..1da691252ab9 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -858,11 +858,7 @@ fn modifier_to_gcc(
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => modifier,
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg)
         | InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => {
-            if modifier == Some('v') {
-                None
-            } else {
-                modifier
-            }
+            if modifier == Some('v') { None } else { modifier }
         }
         InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
             unreachable!("clobber-only")
diff --git a/src/builder.rs b/src/builder.rs
index 38e147599c96..a7c16d971a92 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1030,11 +1030,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
                 let llty = place.layout.scalar_pair_element_gcc_type(self, i);
                 let load = self.load(llty, llptr, align);
                 scalar_load_metadata(self, load, scalar);
-                if scalar.is_bool() {
-                    self.trunc(load, self.type_i1())
-                } else {
-                    load
-                }
+                if scalar.is_bool() { self.trunc(load, self.type_i1()) } else { load }
             };
 
             OperandValue::Pair(
@@ -1782,18 +1778,10 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         // This already happens today with u128::MAX = 2^128 - 1 > f32::MAX.
         let int_max = |signed: bool, int_width: u64| -> u128 {
             let shift_amount = 128 - int_width;
-            if signed {
-                i128::MAX as u128 >> shift_amount
-            } else {
-                u128::MAX >> shift_amount
-            }
+            if signed { i128::MAX as u128 >> shift_amount } else { u128::MAX >> shift_amount }
         };
         let int_min = |signed: bool, int_width: u64| -> i128 {
-            if signed {
-                i128::MIN >> (128 - int_width)
-            } else {
-                0
-            }
+            if signed { i128::MIN >> (128 - int_width) } else { 0 }
         };
 
         let compute_clamp_bounds_single = |signed: bool, int_width: u64| -> (u128, u128) {
diff --git a/src/common.rs b/src/common.rs
index 19333689aaa9..70f0dc37e39d 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -58,11 +58,7 @@ pub fn type_is_pointer(typ: Type<'_>) -> bool {
 
 impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn const_null(&self, typ: Type<'gcc>) -> RValue<'gcc> {
-        if type_is_pointer(typ) {
-            self.context.new_null(typ)
-        } else {
-            self.const_int(typ, 0)
-        }
+        if type_is_pointer(typ) { self.context.new_null(typ) } else { self.const_int(typ, 0) }
     }
 
     fn const_undef(&self, typ: Type<'gcc>) -> RValue<'gcc> {

From 88f7508da770c6951f9121c5c7cd7de3951f9dd3 Mon Sep 17 00:00:00 2001
From: Slanterns <slanterns.w@gmail.com>
Date: Sun, 28 Jul 2024 01:28:39 +0800
Subject: [PATCH 710/997] stabilize `is_sorted`

---
 example/std_example.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/example/std_example.rs b/example/std_example.rs
index 8ab8fcc525e5..9e43b4635f0d 100644
--- a/example/std_example.rs
+++ b/example/std_example.rs
@@ -1,5 +1,5 @@
 #![allow(internal_features)]
-#![feature(core_intrinsics, coroutines, coroutine_trait, is_sorted, stmt_expr_attributes)]
+#![feature(core_intrinsics, coroutines, coroutine_trait, stmt_expr_attributes)]
 
 #[cfg(feature="master")]
 #[cfg(target_arch="x86_64")]

From 1cbbac391100028e2ebb871b81f543ddca243dc9 Mon Sep 17 00:00:00 2001
From: Nicholas Nethercote <n.nethercote@gmail.com>
Date: Mon, 29 Jul 2024 08:13:50 +1000
Subject: [PATCH 711/997] Reformat `use` declarations.

The previous commit updated `rustfmt.toml` appropriately. This commit is
the outcome of running `x fmt --all` with the new formatting options.
---
 build_system/src/build.rs      |  9 +++++----
 build_system/src/clean.rs      |  4 ++--
 build_system/src/clone_gcc.rs  |  4 ++--
 build_system/src/config.rs     | 15 ++++++++-------
 build_system/src/fmt.rs        |  3 ++-
 build_system/src/main.rs       |  3 +--
 build_system/src/prepare.rs    |  6 +++---
 build_system/src/rust_tools.rs |  8 ++++----
 build_system/src/test.rs       | 14 +++++++-------
 src/archive.rs                 |  3 +--
 src/asm.rs                     |  8 ++++----
 src/attributes.rs              |  3 ++-
 src/base.rs                    |  3 +--
 src/builder.rs                 |  5 ++---
 src/common.rs                  |  3 +--
 src/consts.rs                  |  3 +--
 src/context.rs                 | 11 +++++------
 src/debuginfo.rs               |  3 ++-
 src/gcc_util.rs                |  3 +--
 src/int.rs                     | 19 ++++++++-----------
 src/intrinsic/llvm.rs          |  3 ++-
 src/intrinsic/simd.rs          |  4 +---
 src/lib.rs                     |  9 +++------
 src/mono_item.rs               |  3 +--
 24 files changed, 69 insertions(+), 80 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index d465ab7e5066..8d23f1fda807 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -1,12 +1,13 @@
-use crate::config::{Channel, ConfigInfo};
-use crate::utils::{
-    copy_file, create_dir, get_sysroot_dir, run_command, run_command_with_output_and_env, walk_dir,
-};
 use std::collections::HashMap;
 use std::ffi::OsStr;
 use std::fs;
 use std::path::Path;
 
+use crate::config::{Channel, ConfigInfo};
+use crate::utils::{
+    copy_file, create_dir, get_sysroot_dir, run_command, run_command_with_output_and_env, walk_dir,
+};
+
 #[derive(Default)]
 struct BuildArg {
     flags: Vec<String>,
diff --git a/build_system/src/clean.rs b/build_system/src/clean.rs
index 55f55acf73ea..768a78e789e1 100644
--- a/build_system/src/clean.rs
+++ b/build_system/src/clean.rs
@@ -1,8 +1,8 @@
-use crate::utils::{get_sysroot_dir, remove_file, run_command};
-
 use std::fs::remove_dir_all;
 use std::path::Path;
 
+use crate::utils::{get_sysroot_dir, remove_file, run_command};
+
 #[derive(Default)]
 enum CleanArg {
     /// `clean all`
diff --git a/build_system/src/clone_gcc.rs b/build_system/src/clone_gcc.rs
index cbf590c0c321..e28ee873eb6b 100644
--- a/build_system/src/clone_gcc.rs
+++ b/build_system/src/clone_gcc.rs
@@ -1,8 +1,8 @@
+use std::path::{Path, PathBuf};
+
 use crate::config::ConfigInfo;
 use crate::utils::{git_clone, run_command_with_output};
 
-use std::path::{Path, PathBuf};
-
 fn show_usage() {
     println!(
         r#"
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index bbb711c8428b..15ba1612167e 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -1,14 +1,15 @@
+use std::collections::HashMap;
+use std::ffi::OsStr;
+use std::path::{Path, PathBuf};
+use std::{env as std_env, fs};
+
+use boml::types::TomlValue;
+use boml::Toml;
+
 use crate::utils::{
     create_dir, create_symlink, get_os_name, get_sysroot_dir, run_command_with_output,
     rustc_version_info, split_args,
 };
-use std::collections::HashMap;
-use std::env as std_env;
-use std::ffi::OsStr;
-use std::fs;
-use std::path::{Path, PathBuf};
-
-use boml::{types::TomlValue, Toml};
 
 #[derive(Default, PartialEq, Eq, Clone, Copy, Debug)]
 pub enum Channel {
diff --git a/build_system/src/fmt.rs b/build_system/src/fmt.rs
index 43644ba19b38..de310a6a30fe 100644
--- a/build_system/src/fmt.rs
+++ b/build_system/src/fmt.rs
@@ -1,7 +1,8 @@
-use crate::utils::run_command_with_output;
 use std::ffi::OsStr;
 use std::path::Path;
 
+use crate::utils::run_command_with_output;
+
 fn show_usage() {
     println!(
         r#"
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index d678fd75344d..3a860e2b1360 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -1,5 +1,4 @@
-use std::env;
-use std::process;
+use std::{env, process};
 
 mod build;
 mod clean;
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index 00aa632165e2..d14639afee5a 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -1,12 +1,12 @@
+use std::fs;
+use std::path::{Path, PathBuf};
+
 use crate::rustc_info::get_rustc_path;
 use crate::utils::{
     cargo_install, create_dir, get_sysroot_dir, git_clone_root_dir, remove_file, run_command,
     run_command_with_output, walk_dir,
 };
 
-use std::fs;
-use std::path::{Path, PathBuf};
-
 fn prepare_libcore(
     sysroot_path: &Path,
     libgccjit12_patches: bool,
diff --git a/build_system/src/rust_tools.rs b/build_system/src/rust_tools.rs
index 242fa7ef9498..105f5eebe240 100644
--- a/build_system/src/rust_tools.rs
+++ b/build_system/src/rust_tools.rs
@@ -1,13 +1,13 @@
+use std::collections::HashMap;
+use std::ffi::OsStr;
+use std::path::PathBuf;
+
 use crate::config::ConfigInfo;
 use crate::utils::{
     get_toolchain, run_command_with_output_and_env_no_err, rustc_toolchain_version_info,
     rustc_version_info,
 };
 
-use std::collections::HashMap;
-use std::ffi::OsStr;
-use std::path::PathBuf;
-
 fn args(command: &str) -> Result<Option<Vec<String>>, String> {
     // We skip the binary and the "cargo"/"rustc" option.
     if let Some("--help") = std::env::args().skip(2).next().as_deref() {
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 06f28d13fb3a..dabf6c5aa3ee 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1,3 +1,10 @@
+use std::collections::HashMap;
+use std::ffi::OsStr;
+use std::fs::{remove_dir_all, File};
+use std::io::{BufRead, BufReader};
+use std::path::{Path, PathBuf};
+use std::str::FromStr;
+
 use crate::build;
 use crate::config::{Channel, ConfigInfo};
 use crate::utils::{
@@ -6,13 +13,6 @@ use crate::utils::{
     split_args, walk_dir,
 };
 
-use std::collections::HashMap;
-use std::ffi::OsStr;
-use std::fs::{remove_dir_all, File};
-use std::io::{BufRead, BufReader};
-use std::path::{Path, PathBuf};
-use std::str::FromStr;
-
 type Env = HashMap<String, String>;
 type Runner = fn(&Env, &TestArg) -> Result<(), String>;
 type Runners = HashMap<&'static str, (&'static str, Runner)>;
diff --git a/src/archive.rs b/src/archive.rs
index 21676f5dbb6a..36f5e0f8094e 100644
--- a/src/archive.rs
+++ b/src/archive.rs
@@ -3,9 +3,8 @@ use std::path::{Path, PathBuf};
 use rustc_codegen_ssa::back::archive::{
     ArArchiveBuilder, ArchiveBuilder, ArchiveBuilderBuilder, DEFAULT_OBJECT_READER,
 };
-use rustc_session::Session;
-
 use rustc_session::cstore::DllImport;
+use rustc_session::Session;
 
 pub(crate) struct ArArchiveBuilderBuilder;
 
diff --git a/src/asm.rs b/src/asm.rs
index 1da691252ab9..7c135289958f 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -1,3 +1,5 @@
+use std::borrow::Cow;
+
 use gccjit::{LValue, RValue, ToRValue, Type};
 use rustc_ast::ast::{InlineAsmOptions, InlineAsmTemplatePiece};
 use rustc_codegen_ssa::mir::operand::OperandValue;
@@ -6,13 +8,11 @@ use rustc_codegen_ssa::traits::{
     AsmBuilderMethods, AsmMethods, BaseTypeMethods, BuilderMethods, GlobalAsmOperandRef,
     InlineAsmOperandRef,
 };
-
-use rustc_middle::{bug, ty::Instance};
+use rustc_middle::bug;
+use rustc_middle::ty::Instance;
 use rustc_span::Span;
 use rustc_target::asm::*;
 
-use std::borrow::Cow;
-
 use crate::builder::Builder;
 use crate::callee::get_fn;
 use crate::context::CodegenCx;
diff --git a/src/attributes.rs b/src/attributes.rs
index 27f21107eda7..e521551304ef 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -9,8 +9,9 @@ use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
 use rustc_middle::ty;
 use rustc_span::symbol::sym;
 
+use crate::context::CodegenCx;
+use crate::errors::TiedTargetFeatures;
 use crate::gcc_util::{check_tied_features, to_gcc_features};
-use crate::{context::CodegenCx, errors::TiedTargetFeatures};
 
 /// Get GCC attribute for the provided inline heuristic.
 #[cfg(feature = "master")]
diff --git a/src/base.rs b/src/base.rs
index e3558b6b8751..2eaab3ed00c8 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -19,8 +19,7 @@ use rustc_target::spec::PanicStrategy;
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
-use crate::{gcc_util, new_context, LockedTargetInfo};
-use crate::{GccContext, SyncContext};
+use crate::{gcc_util, new_context, GccContext, LockedTargetInfo, SyncContext};
 
 #[cfg(feature = "master")]
 pub fn visibility_to_gcc(linkage: Visibility) -> gccjit::Visibility {
diff --git a/src/builder.rs b/src/builder.rs
index a7c16d971a92..eabdf0d83423 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -28,9 +28,8 @@ use rustc_middle::ty::layout::{
 use rustc_middle::ty::{Instance, ParamEnv, Ty, TyCtxt};
 use rustc_span::def_id::DefId;
 use rustc_span::Span;
-use rustc_target::abi::{
-    self, call::FnAbi, Align, HasDataLayout, Size, TargetDataLayout, WrappingRange,
-};
+use rustc_target::abi::call::FnAbi;
+use rustc_target::abi::{self, Align, HasDataLayout, Size, TargetDataLayout, WrappingRange};
 use rustc_target::spec::{HasTargetSpec, HasWasmCAbiOpt, Target, WasmCAbi};
 
 use crate::common::{type_is_pointer, SignType, TypeReflection};
diff --git a/src/common.rs b/src/common.rs
index 70f0dc37e39d..7a456e1c5d64 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -1,5 +1,4 @@
-use gccjit::LValue;
-use gccjit::{RValue, ToRValue, Type};
+use gccjit::{LValue, RValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{BaseTypeMethods, ConstMethods, MiscMethods, StaticMethods};
 use rustc_middle::mir::interpret::{ConstAllocation, GlobalAlloc, Scalar};
 use rustc_middle::mir::Mutability;
diff --git a/src/consts.rs b/src/consts.rs
index ba7e08e33efa..e5673cddc4a4 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -3,14 +3,13 @@ use gccjit::{FnAttribute, VarAttribute, Visibility};
 use gccjit::{Function, GlobalKind, LValue, RValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{BaseTypeMethods, ConstMethods, StaticMethods};
 use rustc_hir::def::DefKind;
-use rustc_middle::bug;
 use rustc_middle::middle::codegen_fn_attrs::{CodegenFnAttrFlags, CodegenFnAttrs};
 use rustc_middle::mir::interpret::{
     self, read_target_uint, ConstAllocation, ErrorHandled, Scalar as InterpScalar,
 };
-use rustc_middle::span_bug;
 use rustc_middle::ty::layout::LayoutOf;
 use rustc_middle::ty::{self, Instance};
+use rustc_middle::{bug, span_bug};
 use rustc_span::def_id::DefId;
 use rustc_target::abi::{self, Align, HasDataLayout, Primitive, Size, WrappingRange};
 
diff --git a/src/context.rs b/src/context.rs
index 86a5000a7232..e330102fbd84 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -6,8 +6,7 @@ use gccjit::{
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::errors as ssa_errors;
 use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeMethods, MiscMethods};
-use rustc_data_structures::base_n::ToBaseN;
-use rustc_data_structures::base_n::ALPHANUMERIC_ONLY;
+use rustc_data_structures::base_n::{ToBaseN, ALPHANUMERIC_ONLY};
 use rustc_data_structures::fx::{FxHashMap, FxHashSet};
 use rustc_middle::mir::mono::CodegenUnit;
 use rustc_middle::span_bug;
@@ -17,10 +16,10 @@ use rustc_middle::ty::layout::{
 };
 use rustc_middle::ty::{self, Instance, ParamEnv, PolyExistentialTraitRef, Ty, TyCtxt};
 use rustc_session::Session;
-use rustc_span::{source_map::respan, Span, DUMMY_SP};
-use rustc_target::abi::{
-    call::FnAbi, HasDataLayout, PointeeInfo, Size, TargetDataLayout, VariantIdx,
-};
+use rustc_span::source_map::respan;
+use rustc_span::{Span, DUMMY_SP};
+use rustc_target::abi::call::FnAbi;
+use rustc_target::abi::{HasDataLayout, PointeeInfo, Size, TargetDataLayout, VariantIdx};
 use rustc_target::spec::{HasTargetSpec, HasWasmCAbiOpt, Target, TlsModel, WasmCAbi};
 
 use crate::callee::get_fn;
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index 3d9ea278a639..d770da5a8c44 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -1,3 +1,5 @@
+use std::ops::Range;
+
 use gccjit::{Location, RValue};
 use rustc_codegen_ssa::mir::debuginfo::{DebugScope, FunctionDebugContext, VariableKind};
 use rustc_codegen_ssa::traits::{DebugInfoBuilderMethods, DebugInfoMethods};
@@ -10,7 +12,6 @@ use rustc_session::config::DebugInfo;
 use rustc_span::{BytePos, Pos, SourceFile, SourceFileAndLine, Span, Symbol};
 use rustc_target::abi::call::FnAbi;
 use rustc_target::abi::Size;
-use std::ops::Range;
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 53877e8ff7fa..8bb90efe6fb7 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -1,11 +1,10 @@
 #[cfg(feature = "master")]
 use gccjit::Context;
-use smallvec::{smallvec, SmallVec};
-
 use rustc_data_structures::fx::FxHashMap;
 use rustc_middle::bug;
 use rustc_session::Session;
 use rustc_target::target_features::RUSTC_SPECIFIC_FEATURES;
+use smallvec::{smallvec, SmallVec};
 
 use crate::errors::{
     PossibleFeature, TargetFeatureDisableOrEnable, UnknownCTargetFeature,
diff --git a/src/int.rs b/src/int.rs
index e4c5eb913731..92d5c1cbbb80 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -6,18 +6,13 @@ use gccjit::{BinaryOp, ComparisonOp, FunctionType, Location, RValue, ToRValue, T
 use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
 use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeMethods, BuilderMethods, OverflowOp};
 use rustc_middle::ty::{ParamEnv, Ty};
-use rustc_target::abi::{
-    call::{ArgAbi, ArgAttributes, Conv, FnAbi, PassMode},
-    Endian,
-};
+use rustc_target::abi::call::{ArgAbi, ArgAttributes, Conv, FnAbi, PassMode};
+use rustc_target::abi::Endian;
 use rustc_target::spec;
 
-use crate::builder::ToGccComp;
-use crate::{
-    builder::Builder,
-    common::{SignType, TypeReflection},
-    context::CodegenCx,
-};
+use crate::builder::{Builder, ToGccComp};
+use crate::common::{SignType, TypeReflection};
+use crate::context::CodegenCx;
 
 impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     pub fn gcc_urem(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -266,7 +261,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         lhs: <Self as BackendTypes>::Value,
         rhs: <Self as BackendTypes>::Value,
     ) -> (<Self as BackendTypes>::Value, <Self as BackendTypes>::Value) {
-        use rustc_middle::ty::{Int, IntTy::*, Uint, UintTy::*};
+        use rustc_middle::ty::IntTy::*;
+        use rustc_middle::ty::UintTy::*;
+        use rustc_middle::ty::{Int, Uint};
 
         let new_kind = match *typ.kind() {
             Int(t @ Isize) => Int(t.normalize(self.tcx.sess.target.pointer_width)),
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index a12704822190..554e57250e6d 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -3,7 +3,8 @@ use std::borrow::Cow;
 use gccjit::{Function, FunctionPtrType, RValue, ToRValue, UnaryOp};
 use rustc_codegen_ssa::traits::BuilderMethods;
 
-use crate::{builder::Builder, context::CodegenCx};
+use crate::builder::Builder;
+use crate::context::CodegenCx;
 
 pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
     builder: &Builder<'a, 'gcc, 'tcx>,
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index ba214a9c24cf..8da1df3be153 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -1,10 +1,8 @@
 use std::iter::FromIterator;
 
-use gccjit::ToRValue;
-use gccjit::{BinaryOp, RValue, Type};
+use gccjit::{BinaryOp, RValue, ToRValue, Type};
 #[cfg(feature = "master")]
 use gccjit::{ComparisonOp, UnaryOp};
-
 use rustc_codegen_ssa::base::compare_simd_types;
 use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
 #[cfg(feature = "master")]
diff --git a/src/lib.rs b/src/lib.rs
index 1132b0cd2f5a..cd63a405b67b 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -79,14 +79,11 @@ use std::ops::Deref;
 use std::sync::atomic::AtomicBool;
 #[cfg(not(feature = "master"))]
 use std::sync::atomic::Ordering;
-use std::sync::Arc;
-use std::sync::Mutex;
+use std::sync::{Arc, Mutex};
 
-use back::lto::ThinBuffer;
-use back::lto::ThinData;
+use back::lto::{ThinBuffer, ThinData};
 use errors::LTONotSupported;
-use gccjit::CType;
-use gccjit::{Context, OptimizationLevel};
+use gccjit::{CType, Context, OptimizationLevel};
 #[cfg(feature = "master")]
 use gccjit::{TargetInfo, Version};
 use rustc_ast::expand::allocator::AllocatorKind;
diff --git a/src/mono_item.rs b/src/mono_item.rs
index 44657ad4f6e2..e6b22d518714 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -9,10 +9,9 @@ use rustc_middle::mir::mono::{Linkage, Visibility};
 use rustc_middle::ty::layout::{FnAbiOf, LayoutOf};
 use rustc_middle::ty::{self, Instance, TypeVisitableExt};
 
-use crate::attributes;
-use crate::base;
 use crate::context::CodegenCx;
 use crate::type_of::LayoutGccExt;
+use crate::{attributes, base};
 
 impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     #[cfg_attr(not(feature = "master"), allow(unused_variables))]

From 78f5ee65183e816d2cb0499c6766591fc234d8f7 Mon Sep 17 00:00:00 2001
From: Nicholas Bishop <nbishop@nbishop.net>
Date: Sat, 11 May 2024 09:56:59 -0400
Subject: [PATCH 712/997] Update compiler_builtins to 0.1.114

The `weak-intrinsics` feature was removed from compiler_builtins in
https://github.com/rust-lang/compiler-builtins/pull/598, so dropped the
`compiler-builtins-weak-intrinsics` feature from alloc/std/sysroot.

In https://github.com/rust-lang/compiler-builtins/pull/593, some
builtins for f16/f128 were added. These don't work for all compiler
backends, so add a `compiler-builtins-no-f16-f128` feature and disable
it for cranelift and gcc. Also disable it for LLVM targets that don't
support it.
---
 build_system/src/build.rs | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 8d23f1fda807..8d9518653c5c 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -142,7 +142,14 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         rustflags.push_str(" -Csymbol-mangling-version=v0");
     }
 
-    let mut args: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"build", &"--target", &config.target];
+    let mut args: Vec<&dyn AsRef<OsStr>> = vec![
+        &"cargo",
+        &"build",
+        &"--target",
+        &config.target,
+        &"--features",
+        &"compiler-builtins-no-f16-f128",
+    ];
 
     if config.no_default_features {
         rustflags.push_str(" -Csymbol-mangling-version=v0");

From c57eb5581fe407f364df5812416190b241e8a8bb Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Thu, 25 Jul 2024 19:53:17 +0000
Subject: [PATCH 713/997] Move temp file name generation out of the
 create_dll_import_lib method

---
 src/archive.rs | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/archive.rs b/src/archive.rs
index 36f5e0f8094e..4a54d26daf7f 100644
--- a/src/archive.rs
+++ b/src/archive.rs
@@ -1,4 +1,4 @@
-use std::path::{Path, PathBuf};
+use std::path::Path;
 
 use rustc_codegen_ssa::back::archive::{
     ArArchiveBuilder, ArchiveBuilder, ArchiveBuilderBuilder, DEFAULT_OBJECT_READER,
@@ -18,9 +18,8 @@ impl ArchiveBuilderBuilder for ArArchiveBuilderBuilder {
         _sess: &Session,
         _lib_name: &str,
         _dll_imports: &[DllImport],
-        _tmpdir: &Path,
-        _is_direct_dependency: bool,
-    ) -> PathBuf {
+        _output_path: &Path,
+    ) {
         unimplemented!("creating dll imports is not yet supported");
     }
 }

From 50b374627fc319d26ec96d5e477685614f6575a2 Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Thu, 25 Jul 2024 20:08:40 +0000
Subject: [PATCH 714/997] Move computation of decorated names out of the
 create_dll_import_lib method

---
 src/archive.rs | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/archive.rs b/src/archive.rs
index 4a54d26daf7f..0cee05f1cea3 100644
--- a/src/archive.rs
+++ b/src/archive.rs
@@ -3,7 +3,6 @@ use std::path::Path;
 use rustc_codegen_ssa::back::archive::{
     ArArchiveBuilder, ArchiveBuilder, ArchiveBuilderBuilder, DEFAULT_OBJECT_READER,
 };
-use rustc_session::cstore::DllImport;
 use rustc_session::Session;
 
 pub(crate) struct ArArchiveBuilderBuilder;
@@ -17,7 +16,7 @@ impl ArchiveBuilderBuilder for ArArchiveBuilderBuilder {
         &self,
         _sess: &Session,
         _lib_name: &str,
-        _dll_imports: &[DllImport],
+        _import_name_and_ordinal_vector: Vec<(String, Option<u16>)>,
         _output_path: &Path,
     ) {
         unimplemented!("creating dll imports is not yet supported");

From e80199cc7955f6eb972371b1651528e3ea76554c Mon Sep 17 00:00:00 2001
From: Caleb Zulawski <caleb.zulawski@gmail.com>
Date: Fri, 2 Aug 2024 00:20:49 -0400
Subject: [PATCH 715/997] Refactor and fill out target feature lists

---
 src/gcc_util.rs | 4 ++--
 src/lib.rs      | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 8bb90efe6fb7..5308ccdb6146 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -65,8 +65,8 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
 
             let feature = backend_feature_name(s)?;
             // Warn against use of GCC specific feature names on the CLI.
-            if diagnostics && !supported_features.iter().any(|&(v, _)| v == feature) {
-                let rust_feature = supported_features.iter().find_map(|&(rust_feature, _)| {
+            if diagnostics && !supported_features.iter().any(|&(v, _, _)| v == feature) {
+                let rust_feature = supported_features.iter().find_map(|&(rust_feature, _, _)| {
                     let gcc_features = to_gcc_features(sess, rust_feature);
                     if gcc_features.contains(&feature) && !gcc_features.contains(&rust_feature) {
                         Some(rust_feature)
diff --git a/src/lib.rs b/src/lib.rs
index cd63a405b67b..94f016234f92 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -486,7 +486,7 @@ pub fn target_features(
     sess.target
         .supported_target_features()
         .iter()
-        .filter_map(|&(feature, gate)| {
+        .filter_map(|&(feature, gate, _)| {
             if sess.is_nightly_build() || allow_unstable || gate.is_stable() {
                 Some(feature)
             } else {

From 51130e10f196155e0c77b3a7351a9975f86c968d Mon Sep 17 00:00:00 2001
From: Caleb Zulawski <caleb.zulawski@gmail.com>
Date: Sun, 4 Aug 2024 23:51:59 -0400
Subject: [PATCH 716/997] Hide implicit target features from diagnostics when
 possible

---
 src/attributes.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/attributes.rs b/src/attributes.rs
index e521551304ef..5fdf2680aac8 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -75,7 +75,7 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
     let function_features = codegen_fn_attrs
         .target_features
         .iter()
-        .map(|features| features.as_str())
+        .map(|features| features.name.as_str())
         .collect::<Vec<&str>>();
 
     if let Some(features) = check_tied_features(

From f824fb6d9fe1b4c5166d4c46f1ea928d3e771f12 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume.gomez@huawei.com>
Date: Thu, 8 Aug 2024 14:42:44 +0200
Subject: [PATCH 717/997] Update compiler-builtins version to 0.1.118

---
 build_system/build_sysroot/Cargo.lock | 2 +-
 build_system/build_sysroot/Cargo.toml | 4 +---
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/build_system/build_sysroot/Cargo.lock b/build_system/build_sysroot/Cargo.lock
index d6ec1f87d010..771f2f18dce7 100644
--- a/build_system/build_sysroot/Cargo.lock
+++ b/build_system/build_sysroot/Cargo.lock
@@ -50,7 +50,7 @@ dependencies = [
 
 [[package]]
 name = "compiler_builtins"
-version = "0.1.109"
+version = "0.1.118"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "f11973008a8cf741fe6d22f339eba21fd0ca81e2760a769ba8243ed6c21edd7e"
 dependencies = [
diff --git a/build_system/build_sysroot/Cargo.toml b/build_system/build_sysroot/Cargo.toml
index e46699236238..05503128f2af 100644
--- a/build_system/build_sysroot/Cargo.toml
+++ b/build_system/build_sysroot/Cargo.toml
@@ -6,9 +6,7 @@ resolver = "2"
 
 [dependencies]
 core = { path = "./sysroot_src/library/core" }
-# TODO: after the sync, revert to using version 0.1.
-# compiler_builtins = "0.1"
-compiler_builtins = "=0.1.109"
+compiler_builtins = "0.1"
 alloc = { path = "./sysroot_src/library/alloc" }
 std = { path = "./sysroot_src/library/std", features = ["panic_unwind", "backtrace"] }
 test = { path = "./sysroot_src/library/test" }

From b373147918786ea7919ace6b47a9f0ce9b66e0f2 Mon Sep 17 00:00:00 2001
From: Nadrieril <nadrieril+git@gmail.com>
Date: Wed, 20 Mar 2024 22:51:29 +0100
Subject: [PATCH 718/997] Fixes in various places

---
 example/mini_core_hello_world.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/example/mini_core_hello_world.rs b/example/mini_core_hello_world.rs
index 5a7ddc4cd7fa..9f096e902201 100644
--- a/example/mini_core_hello_world.rs
+++ b/example/mini_core_hello_world.rs
@@ -430,6 +430,7 @@ pub enum E2<X> {
     V4,
 }
 
+#[allow(unreachable_patterns)]
 fn check_niche_behavior () {
     if let E1::V2 { .. } = (E1::V1 { f: true }) {
         intrinsics::abort();

From 8bd9b48e7ecc308ff680414049972180476dca78 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 12 Aug 2024 15:11:51 +0200
Subject: [PATCH 719/997] Update compiler version to nightly-2024-08-11

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index 3c83f4b4608d..dca3b0c22e4e 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2024-07-02"
+channel = "nightly-2024-08-11"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From dd76ad45b381680f26d327a42fa4cb1d1ccf6842 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 6 Aug 2024 14:35:59 +0200
Subject: [PATCH 720/997] Fix libcore patch

---
 patches/0022-core-Disable-not-compiling-tests.patch | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/patches/0022-core-Disable-not-compiling-tests.patch b/patches/0022-core-Disable-not-compiling-tests.patch
index ea1a5a8d3553..08e2f1a76284 100644
--- a/patches/0022-core-Disable-not-compiling-tests.patch
+++ b/patches/0022-core-Disable-not-compiling-tests.patch
@@ -35,8 +35,9 @@ diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
 index 42a26ae..5ac1042 100644
 --- a/library/core/tests/lib.rs
 +++ b/library/core/tests/lib.rs
-@@ -1,3 +1,4 @@
+@@ -2,4 +2,5 @@
+ // tidy-alphabetical-start
 +#![cfg(test)]
- #![feature(alloc_layout_extra)]
- #![feature(array_chunks)]
- #![feature(array_ptr_get)]
+ #![cfg_attr(bootstrap, feature(offset_of_nested))]
+ #![cfg_attr(target_has_atomic = "128", feature(integer_atomics))]
+ #![cfg_attr(test, feature(cfg_match))]

From 8643c13e547ebf80d6ac2ea167582235084d926c Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 6 Aug 2024 14:44:49 +0200
Subject: [PATCH 721/997] Fix patch
 `libgccjit12/0001-core-Disable-portable-simd-test.patch`

---
 .../0001-core-Disable-portable-simd-test.patch       | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch b/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
index c060300f44f6..da664d51b63e 100644
--- a/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
+++ b/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
@@ -11,15 +11,15 @@ diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
 index b71786c..cf484d5 100644
 --- a/library/core/tests/lib.rs
 +++ b/library/core/tests/lib.rs
-@@ -95,7 +95,6 @@
- #![feature(never_type)]
- #![feature(unwrap_infallible)]
+@@ -87,7 +87,6 @@
+ #![feature(numfmt)]
+ #![feature(pattern)]
  #![feature(pointer_is_aligned_to)]
 -#![feature(portable_simd)]
  #![feature(ptr_metadata)]
- #![feature(unsized_tuple_coercion)]
- #![feature(const_option)]
-@@ -157,7 +156,6 @@ mod pin;
+ #![feature(slice_from_ptr_range)]
+ #![feature(slice_internals)]
+@@ -155,7 +154,6 @@ mod pin;
  mod pin_macro;
  mod ptr;
  mod result;

From fb6118b824349fe77870cdad85da32d5c73c623a Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 6 Aug 2024 15:00:15 +0200
Subject: [PATCH 722/997] Rename `compiler-builtins-no-f16-f128` into
 `std/compiler-builtins-no-f16-f128`

---
 build_system/src/build.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 8d9518653c5c..3f88945767d8 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -148,7 +148,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         &"--target",
         &config.target,
         &"--features",
-        &"compiler-builtins-no-f16-f128",
+        &"std/compiler-builtins-no-f16-f128",
     ];
 
     if config.no_default_features {

From 3b45cf476aea28edd0b7aa2cf6ed78eb79abdbf6 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 12 Aug 2024 16:09:54 +0200
Subject: [PATCH 723/997] Update sysroot Cargo.lock

---
 build_system/build_sysroot/Cargo.lock | 99 +++++++++++++++------------
 1 file changed, 54 insertions(+), 45 deletions(-)

diff --git a/build_system/build_sysroot/Cargo.lock b/build_system/build_sysroot/Cargo.lock
index 771f2f18dce7..51bec5aa9e37 100644
--- a/build_system/build_sysroot/Cargo.lock
+++ b/build_system/build_sysroot/Cargo.lock
@@ -4,12 +4,12 @@ version = 3
 
 [[package]]
 name = "addr2line"
-version = "0.21.0"
+version = "0.22.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8a30b2e23b9e17a9f90641c7ab1549cd9b44f296d3ccbf309d2863cfe398a0cb"
+checksum = "6e4503c46a5c0c7844e948c9a4d6acd9f50cccb4de1c48eb9e291ea17470c678"
 dependencies = [
  "compiler_builtins",
- "gimli",
+ "gimli 0.29.0",
  "rustc-std-workspace-alloc",
  "rustc-std-workspace-core",
 ]
@@ -52,7 +52,7 @@ dependencies = [
 name = "compiler_builtins"
 version = "0.1.118"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f11973008a8cf741fe6d22f339eba21fd0ca81e2760a769ba8243ed6c21edd7e"
+checksum = "92afe7344b64cccf3662ca26d5d1c0828ab826f04206b97d856e3625e390e4b5"
 dependencies = [
  "rustc-std-workspace-core",
 ]
@@ -97,9 +97,20 @@ dependencies = [
 
 [[package]]
 name = "gimli"
-version = "0.28.1"
+version = "0.29.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4271d37baee1b8c7e4b708028c57d816cf9d2434acb33a549475f78c181f6253"
+checksum = "40ecd4077b5ae9fd2e9e169b102c6c330d0605168eb0e8bf79952b256dbefffd"
+dependencies = [
+ "compiler_builtins",
+ "rustc-std-workspace-alloc",
+ "rustc-std-workspace-core",
+]
+
+[[package]]
+name = "gimli"
+version = "0.30.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e2e1d97fbe9722ba9bbd0c97051c2956e726562b61f86a25a4360398a40edfc9"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-alloc",
@@ -120,9 +131,9 @@ dependencies = [
 
 [[package]]
 name = "hermit-abi"
-version = "0.3.9"
+version = "0.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d231dfb89cfffdbc30e7fc41579ed6066ad03abda9e567ccafae602b97ec5024"
+checksum = "fbf6a919d6cf397374f7dfeeea91d974c7c0a7221d0d0f4f20d859d329e53fcc"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-alloc",
@@ -131,18 +142,18 @@ dependencies = [
 
 [[package]]
 name = "libc"
-version = "0.2.153"
+version = "0.2.155"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "9c198f91728a82281a64e1f4f9eeb25d82cb32a5de251c6bd1b5154d63a8e7bd"
+checksum = "97b3888a4aecf77e811145cadf6eef5901f4782c53886191b2f693f24761847c"
 dependencies = [
  "rustc-std-workspace-core",
 ]
 
 [[package]]
 name = "memchr"
-version = "2.7.2"
+version = "2.7.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6c8640c5d730cb13ebd907d8d04b52f55ac9a2eec55b440c8892f40d56c76c1d"
+checksum = "78ca9ab1a0babb1e7d5695e3530886289c18cf2f87ec19a575a0abdce112e3a3"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-core",
@@ -150,9 +161,9 @@ dependencies = [
 
 [[package]]
 name = "miniz_oxide"
-version = "0.7.2"
+version = "0.7.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "9d811f3e15f28568be3407c8e7fdb6514c1cda3cb30683f15b6a1a1dc4ea14a7"
+checksum = "b8a240ddb74feaf34a79a7add65a741f3167852fba007066dcac1ca548d89c08"
 dependencies = [
  "adler",
  "compiler_builtins",
@@ -162,9 +173,9 @@ dependencies = [
 
 [[package]]
 name = "object"
-version = "0.32.2"
+version = "0.36.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a6a622008b6e321afc04970976f62ee297fdbaa6f95318ca343e3eebb9648441"
+checksum = "27b64972346851a39438c60b341ebc01bba47464ae329e55cf343eb93964efd9"
 dependencies = [
  "compiler_builtins",
  "memchr",
@@ -205,9 +216,9 @@ dependencies = [
 
 [[package]]
 name = "r-efi"
-version = "4.4.0"
+version = "4.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "c47196f636c4cc0634b73b0405323d177753c2e15e866952c64ea22902567a34"
+checksum = "e9e935efc5854715dfc0a4c9ef18dc69dee0ec3bf9cc3ab740db831c0fdd86a3"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-core",
@@ -226,9 +237,9 @@ dependencies = [
 
 [[package]]
 name = "rustc-demangle"
-version = "0.1.23"
+version = "0.1.24"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "d626bb9dae77e28219937af045c257c28bfd3f69333c512553507f5f9798cb76"
+checksum = "719b953e2095829ee67db738b3bfa9fa368c94900df327b3f07fe6e794d2fe1f"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-core",
@@ -310,16 +321,14 @@ dependencies = [
  "core",
  "getopts",
  "libc",
- "panic_abort",
- "panic_unwind",
  "std",
 ]
 
 [[package]]
 name = "unicode-width"
-version = "0.1.12"
+version = "0.1.13"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "68f5e5f3158ecfd4b8ff6fe086db7c8467a2dfdac97fe420f2b7c4aa97af66d6"
+checksum = "0336d538f7abc86d282a4189614dfaa90810dfc2c6f6427eaf88e16311dd225d"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-core",
@@ -339,12 +348,12 @@ dependencies = [
 
 [[package]]
 name = "unwinding"
-version = "0.2.1"
+version = "0.2.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "37a19a21a537f635c16c7576f22d0f2f7d63353c1337ad4ce0d8001c7952a25b"
+checksum = "dc55842d0db6329a669d55a623c674b02d677b16bfb2d24857d4089d41eba882"
 dependencies = [
  "compiler_builtins",
- "gimli",
+ "gimli 0.30.0",
  "rustc-std-workspace-core",
 ]
 
@@ -370,9 +379,9 @@ dependencies = [
 
 [[package]]
 name = "windows-targets"
-version = "0.52.5"
+version = "0.52.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6f0713a46559409d202e70e28227288446bf7841d3211583a4b53e3f6d96e7eb"
+checksum = "9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973"
 dependencies = [
  "windows_aarch64_gnullvm",
  "windows_aarch64_msvc",
@@ -386,48 +395,48 @@ dependencies = [
 
 [[package]]
 name = "windows_aarch64_gnullvm"
-version = "0.52.5"
+version = "0.52.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7088eed71e8b8dda258ecc8bac5fb1153c5cffaf2578fc8ff5d61e23578d3263"
+checksum = "32a4622180e7a0ec044bb555404c800bc9fd9ec262ec147edd5989ccd0c02cd3"
 
 [[package]]
 name = "windows_aarch64_msvc"
-version = "0.52.5"
+version = "0.52.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "9985fd1504e250c615ca5f281c3f7a6da76213ebd5ccc9561496568a2752afb6"
+checksum = "09ec2a7bb152e2252b53fa7803150007879548bc709c039df7627cabbd05d469"
 
 [[package]]
 name = "windows_i686_gnu"
-version = "0.52.5"
+version = "0.52.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "88ba073cf16d5372720ec942a8ccbf61626074c6d4dd2e745299726ce8b89670"
+checksum = "8e9b5ad5ab802e97eb8e295ac6720e509ee4c243f69d781394014ebfe8bbfa0b"
 
 [[package]]
 name = "windows_i686_gnullvm"
-version = "0.52.5"
+version = "0.52.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "87f4261229030a858f36b459e748ae97545d6f1ec60e5e0d6a3d32e0dc232ee9"
+checksum = "0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66"
 
 [[package]]
 name = "windows_i686_msvc"
-version = "0.52.5"
+version = "0.52.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "db3c2bf3d13d5b658be73463284eaf12830ac9a26a90c717b7f771dfe97487bf"
+checksum = "240948bc05c5e7c6dabba28bf89d89ffce3e303022809e73deaefe4f6ec56c66"
 
 [[package]]
 name = "windows_x86_64_gnu"
-version = "0.52.5"
+version = "0.52.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4e4246f76bdeff09eb48875a0fd3e2af6aada79d409d33011886d3e1581517d9"
+checksum = "147a5c80aabfbf0c7d901cb5895d1de30ef2907eb21fbbab29ca94c5b08b1a78"
 
 [[package]]
 name = "windows_x86_64_gnullvm"
-version = "0.52.5"
+version = "0.52.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "852298e482cd67c356ddd9570386e2862b5673c85bd5f88df9ab6802b334c596"
+checksum = "24d5b23dc417412679681396f2b49f3de8c1473deb516bd34410872eff51ed0d"
 
 [[package]]
 name = "windows_x86_64_msvc"
-version = "0.52.5"
+version = "0.52.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bec47e5bfd1bff0eeaf6d8b485cc1074891a197ab4225d504cb7a1ab88b02bf0"
+checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec"

From afb14f75e183b7f746984c1f0a9d55dee0e9e34e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 12 Aug 2024 16:28:27 +0200
Subject: [PATCH 724/997] Unpin compiler-builtins

Co-authored-by: Antoni Boucher <bouanto@zoho.com>
---
 .github/workflows/m68k.yml            |  6 ++---
 build_system/build_sysroot/Cargo.toml | 16 +++++++++++++
 build_system/src/build.rs             | 15 ++++--------
 build_system/src/config.rs            | 11 ++++++++-
 build_system/src/test.rs              | 13 +++++++++-
 src/context.rs                        | 34 ---------------------------
 src/intrinsic/mod.rs                  | 21 ++++++-----------
 src/intrinsic/simd.rs                 |  7 ++----
 8 files changed, 54 insertions(+), 69 deletions(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 34e4f2b0d412..2c824d1a6761 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -85,14 +85,14 @@ jobs:
     - name: Build sample project with target defined as JSON spec
       run: |
         ./y.sh prepare --only-libcore --cross
-        ./y.sh build --sysroot --target-triple m68k-unknown-linux-gnu --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
+        ./y.sh build --sysroot --features compiler_builtins/no-f16-f128 --target-triple m68k-unknown-linux-gnu --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
         ./y.sh cargo build --manifest-path=./tests/hello-world/Cargo.toml --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
         ./y.sh clean all
 
     - name: Build
       run: |
         ./y.sh prepare --only-libcore --cross
-        ./y.sh build --sysroot --target-triple m68k-unknown-linux-gnu
+        ./y.sh build --sysroot --features compiler_builtins/no-f16-f128 --target-triple m68k-unknown-linux-gnu
         CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu cargo test
         ./y.sh clean all
 
@@ -107,4 +107,4 @@ jobs:
 
     - name: Run tests
       run: |
-        ./y.sh test --release --clean --build-sysroot ${{ matrix.commands }}
+        ./y.sh test --release --clean --build-sysroot --sysroot-features compiler_builtins/no-f16-f128 ${{ matrix.commands }}
diff --git a/build_system/build_sysroot/Cargo.toml b/build_system/build_sysroot/Cargo.toml
index 05503128f2af..24152070e645 100644
--- a/build_system/build_sysroot/Cargo.toml
+++ b/build_system/build_sysroot/Cargo.toml
@@ -17,6 +17,22 @@ rustc-std-workspace-core = { path = "./sysroot_src/library/rustc-std-workspace-c
 rustc-std-workspace-alloc = { path = "./sysroot_src/library/rustc-std-workspace-alloc" }
 rustc-std-workspace-std = { path = "./sysroot_src/library/rustc-std-workspace-std" }
 
+# For compiler-builtins we always use a high number of codegen units.
+# The goal here is to place every single intrinsic into its own object
+# file to avoid symbol clashes with the system libgcc if possible. Note
+# that this number doesn't actually produce this many object files, we
+# just don't create more than this number of object files.
+#
+# It's a bit of a bummer that we have to pass this here, unfortunately.
+# Ideally this would be specified through an env var to Cargo so Cargo
+# knows how many CGUs are for this specific crate, but for now
+# per-crate configuration isn't specifiable in the environment.
+[profile.dev.package.compiler_builtins]
+codegen-units = 10000
+
+[profile.release.package.compiler_builtins]
+codegen-units = 10000
+
 [profile.release]
 debug = "limited"
 #lto = "fat" # TODO(antoyo): re-enable when the failing LTO tests regarding proc-macros are fixed.
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 3f88945767d8..d96683afa359 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -24,16 +24,6 @@ impl BuildArg {
 
         while let Some(arg) = args.next() {
             match arg.as_str() {
-                "--features" => {
-                    if let Some(arg) = args.next() {
-                        build_arg.flags.push("--features".to_string());
-                        build_arg.flags.push(arg.as_str().into());
-                    } else {
-                        return Err(
-                            "Expected a value after `--features`, found nothing".to_string()
-                        );
-                    }
-                }
                 "--sysroot" => {
                     build_arg.build_sysroot = true;
                 }
@@ -56,7 +46,6 @@ impl BuildArg {
             r#"
 `build` command help:
 
-    --features [arg]       : Add a new feature [arg]
     --sysroot              : Build with sysroot"#
         );
         ConfigInfo::show_usage();
@@ -150,6 +139,10 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         &"--features",
         &"std/compiler-builtins-no-f16-f128",
     ];
+    for feature in &config.features {
+        args.push(&"--features");
+        args.push(feature);
+    }
 
     if config.no_default_features {
         rustflags.push_str(" -Csymbol-mangling-version=v0");
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 15ba1612167e..e381617be06b 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -98,7 +98,7 @@ impl ConfigFile {
     }
 }
 
-#[derive(Default, Debug)]
+#[derive(Default, Debug, Clone)]
 pub struct ConfigInfo {
     pub target: String,
     pub target_triple: String,
@@ -123,6 +123,7 @@ pub struct ConfigInfo {
     pub no_download: bool,
     pub no_default_features: bool,
     pub backend: Option<String>,
+    pub features: Vec<String>,
 }
 
 impl ConfigInfo {
@@ -133,6 +134,13 @@ impl ConfigInfo {
         args: &mut impl Iterator<Item = String>,
     ) -> Result<bool, String> {
         match arg {
+            "--features" => {
+                if let Some(arg) = args.next() {
+                    self.features.push(arg);
+                } else {
+                    return Err("Expected a value after `--features`, found nothing".to_string());
+                }
+            }
             "--target" => {
                 if let Some(arg) = args.next() {
                     self.target = arg;
@@ -443,6 +451,7 @@ impl ConfigInfo {
     pub fn show_usage() {
         println!(
             "\
+    --features [arg]       : Add a new feature [arg]
     --target-triple [arg]  : Set the target triple to [arg]
     --target [arg]         : Set the target to [arg]
     --out-dir              : Location where the files will be generated
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index dabf6c5aa3ee..6454005b1394 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -92,6 +92,7 @@ struct TestArg {
     current_part: Option<usize>,
     sysroot_panic_abort: bool,
     config_info: ConfigInfo,
+    sysroot_features: Vec<String>,
 }
 
 impl TestArg {
@@ -127,6 +128,14 @@ impl TestArg {
                 "--sysroot-panic-abort" => {
                     test_arg.sysroot_panic_abort = true;
                 }
+                "--sysroot-features" => match args.next() {
+                    Some(feature) if !feature.is_empty() => {
+                        test_arg.sysroot_features.push(feature);
+                    }
+                    _ => {
+                        return Err(format!("Expected an argument after `{}`, found nothing", arg))
+                    }
+                },
                 "--help" => {
                     show_usage();
                     return Ok(None);
@@ -250,7 +259,9 @@ fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
 fn build_sysroot(env: &Env, args: &TestArg) -> Result<(), String> {
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[BUILD] sysroot");
-    build::build_sysroot(env, &args.config_info)?;
+    let mut config = args.config_info.clone();
+    config.features.extend(args.sysroot_features.iter().cloned());
+    build::build_sysroot(env, &config)?;
     Ok(())
 }
 
diff --git a/src/context.rs b/src/context.rs
index e330102fbd84..d4ac4f26b039 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -227,48 +227,14 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             "__builtin_umul_overflow",
             "__builtin_usubll_overflow",
             "__builtin_usub_overflow",
-            "sqrtf",
-            "sqrt",
             "__builtin_powif",
             "__builtin_powi",
-            "sinf",
-            "sin",
-            "cosf",
-            "cos",
-            "powf",
-            "pow",
-            "expf",
-            "exp",
-            "exp2f",
-            "exp2",
-            "logf",
-            "log",
-            "log10f",
-            "log10",
-            "log2f",
-            "log2",
-            "fmaf",
-            "fma",
             "fabsf",
             "fabs",
-            "fminf",
-            "fmin",
-            "fmaxf",
-            "fmax",
             "copysignf",
             "copysign",
-            "floorf",
-            "floor",
-            "ceilf",
-            "ceil",
-            "truncf",
-            "trunc",
-            "rintf",
-            "rint",
             "nearbyintf",
             "nearbyint",
-            "roundf",
-            "round",
         ];
 
         for builtin in builtins.iter() {
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 839ebf3f2987..252b9b6fad6f 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -127,20 +127,13 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         // https://github.com/rust-lang/rust-clippy/issues/12497
         // and leave `else if use_integer_compare` to be placed "as is".
         #[allow(clippy::suspicious_else_formatting)]
-        let llval = match name {
+        let value = match name {
             _ if simple.is_some() => {
-                // FIXME(antoyo): remove this cast when the API supports function.
-                let func = unsafe {
-                    std::mem::transmute::<Function<'gcc>, RValue<'gcc>>(simple.expect("simple"))
-                };
-                self.call(
-                    self.type_void(),
-                    None,
-                    None,
+                let func = simple.expect("simple function");
+                self.cx.context.new_call(
+                    self.location,
                     func,
                     &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
-                    None,
-                    None,
                 )
             }
             sym::likely => self.expect(args[0].immediate(), true),
@@ -383,7 +376,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
 
             _ if name_str.starts_with("simd_") => {
                 match generic_simd_intrinsic(self, name, callee_ty, args, ret_ty, llret_ty, span) {
-                    Ok(llval) => llval,
+                    Ok(value) => value,
                     Err(()) => return Ok(()),
                 }
             }
@@ -396,9 +389,9 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
             if let PassMode::Cast { cast: ref ty, .. } = fn_abi.ret.mode {
                 let ptr_llty = self.type_ptr_to(ty.gcc_type(self));
                 let ptr = self.pointercast(result.val.llval, ptr_llty);
-                self.store(llval, ptr, result.val.align);
+                self.store(value, ptr, result.val.align);
             } else {
-                OperandRef::from_immediate_or_packed_pair(self, llval, result.layout)
+                OperandRef::from_immediate_or_packed_pair(self, value, result.layout)
                     .val
                     .store(self, result);
             }
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 8da1df3be153..d1b4a9689a93 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -763,10 +763,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             _ => return_error!(InvalidMonomorphization::UnrecognizedIntrinsic { span, name }),
         };
         let builtin_name = format!("{}{}", intr_name, elem_ty_str);
-        let funcs = bx.cx.functions.borrow();
-        let function = funcs
-            .get(&builtin_name)
-            .unwrap_or_else(|| panic!("unable to find builtin function {}", builtin_name));
+        let function = bx.context.get_builtin_function(builtin_name);
 
         // TODO(antoyo): add platform-specific behavior here for architectures that have these
         // intrinsics as instructions (for instance, gpus)
@@ -784,7 +781,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                     .map(|arg| bx.extract_element(arg.immediate(), index).to_rvalue())
                     .collect()
             };
-            vector_elements.push(bx.context.new_call(None, *function, &arguments));
+            vector_elements.push(bx.context.new_call(None, function, &arguments));
         }
         let c = bx.context.new_rvalue_from_vector(None, vec_ty, &vector_elements);
         Ok(c)

From b70a1ec0b17a5f32feca23d6e289e4c8bf534c22 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 13 Aug 2024 11:27:39 -0400
Subject: [PATCH 725/997] Add missing impl Copy for *mut T

---
 tests/run/array.rs     | 1 +
 tests/run/closure.rs   | 1 +
 tests/run/condition.rs | 1 +
 tests/run/fun_ptr.rs   | 1 +
 tests/run/ptr_cast.rs  | 1 +
 tests/run/slice.rs     | 1 +
 tests/run/static.rs    | 1 +
 7 files changed, 7 insertions(+)

diff --git a/tests/run/array.rs b/tests/run/array.rs
index 3fe8917c9a3c..432f11ad8d4c 100644
--- a/tests/run/array.rs
+++ b/tests/run/array.rs
@@ -31,6 +31,7 @@ impl Copy for i32 {}
 impl Copy for u8 {}
 impl Copy for i8 {}
 impl Copy for i16 {}
+impl<T: ?Sized> Copy for *mut T {}
 
 #[lang = "receiver"]
 trait Receiver {
diff --git a/tests/run/closure.rs b/tests/run/closure.rs
index 355f0acee747..00e61cc001fe 100644
--- a/tests/run/closure.rs
+++ b/tests/run/closure.rs
@@ -33,6 +33,7 @@ impl Copy for i32 {}
 impl Copy for u32 {}
 impl Copy for u8 {}
 impl Copy for i8 {}
+impl<T: ?Sized> Copy for *mut T {}
 
 #[lang = "receiver"]
 trait Receiver {
diff --git a/tests/run/condition.rs b/tests/run/condition.rs
index 1b3ae6dc004a..7b05b7decd36 100644
--- a/tests/run/condition.rs
+++ b/tests/run/condition.rs
@@ -34,6 +34,7 @@ impl Copy for i16 {}
 impl Copy for char {}
 impl Copy for i8 {}
 impl Copy for u8 {}
+impl<T: ?Sized> Copy for *mut T {}
 
 #[lang = "receiver"]
 trait Receiver {
diff --git a/tests/run/fun_ptr.rs b/tests/run/fun_ptr.rs
index 960303597726..4e96f3765558 100644
--- a/tests/run/fun_ptr.rs
+++ b/tests/run/fun_ptr.rs
@@ -28,6 +28,7 @@ impl Copy for i32 {}
 impl Copy for u8 {}
 impl Copy for i8 {}
 impl Copy for i16 {}
+impl<T: ?Sized> Copy for *mut T {}
 
 #[lang = "receiver"]
 trait Receiver {
diff --git a/tests/run/ptr_cast.rs b/tests/run/ptr_cast.rs
index 09d77abe27cf..a94279182d68 100644
--- a/tests/run/ptr_cast.rs
+++ b/tests/run/ptr_cast.rs
@@ -28,6 +28,7 @@ impl Copy for i32 {}
 impl Copy for u8 {}
 impl Copy for i8 {}
 impl Copy for i16 {}
+impl<T: ?Sized> Copy for *mut T {}
 
 #[lang = "receiver"]
 trait Receiver {
diff --git a/tests/run/slice.rs b/tests/run/slice.rs
index 1262c86c8109..e86fc823a1ab 100644
--- a/tests/run/slice.rs
+++ b/tests/run/slice.rs
@@ -26,6 +26,7 @@ impl Copy for isize {}
 impl Copy for usize {}
 impl Copy for i32 {}
 impl Copy for u32 {}
+impl<T: ?Sized> Copy for *mut T {}
 
 #[lang = "receiver"]
 trait Receiver {
diff --git a/tests/run/static.rs b/tests/run/static.rs
index e7c46ae3fcc8..6247e08f5e3c 100644
--- a/tests/run/static.rs
+++ b/tests/run/static.rs
@@ -34,6 +34,7 @@ trait Copy {
 }
 
 impl Copy for isize {}
+impl<T: ?Sized> Copy for *mut T {}
 
 #[lang = "receiver"]
 trait Receiver {

From b4ef8980a30cd44f71b01f1b48946dcec185db38 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 13 Aug 2024 13:03:25 -0400
Subject: [PATCH 726/997] Fix formatting

---
 build_system/src/test.rs | 2 +-
 src/intrinsic/mod.rs     | 6 +-----
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 6454005b1394..303a2e518cf7 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -133,7 +133,7 @@ impl TestArg {
                         test_arg.sysroot_features.push(feature);
                     }
                     _ => {
-                        return Err(format!("Expected an argument after `{}`, found nothing", arg))
+                        return Err(format!("Expected an argument after `{}`, found nothing", arg));
                     }
                 },
                 "--help" => {
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 252b9b6fad6f..d95a7782fa0d 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -670,11 +670,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 let step3 = self.or(left, right);
 
                 // Fourth step.
-                if width == 8 {
-                    step3
-                } else {
-                    self.gcc_bswap(step3, width)
-                }
+                if width == 8 { step3 } else { self.gcc_bswap(step3, width) }
             }
             128 => {
                 // TODO(antoyo): find a more efficient implementation?

From d3cfb7274d87c441b47c3d4790246be0a5a54e3f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 13 Aug 2024 14:04:38 -0400
Subject: [PATCH 727/997] Fix clippy lint

---
 src/builder.rs | 16 ++++++++--------
 src/int.rs     |  2 +-
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index eabdf0d83423..7ab9dfee46a3 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -141,7 +141,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
     ) -> RValue<'gcc> {
         let size = get_maybe_pointer_size(src);
         let compare_exchange =
-            self.context.get_builtin_function(&format!("__atomic_compare_exchange_{}", size));
+            self.context.get_builtin_function(format!("__atomic_compare_exchange_{}", size));
         let order = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
         let failure_order = self.context.new_rvalue_from_int(self.i32_type, failure_order.to_gcc());
         let weak = self.context.new_rvalue_from_int(self.bool_type, weak as i32);
@@ -328,7 +328,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let result = current_func.new_local(
                 self.location,
                 return_type,
-                &format!("returnValue{}", self.next_value_counter()),
+                format!("returnValue{}", self.next_value_counter()),
             );
             self.block.add_assignment(
                 self.location,
@@ -396,7 +396,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let result = current_func.new_local(
                 self.location,
                 return_value.get_type(),
-                &format!("ptrReturnValue{}", self.next_value_counter()),
+                format!("ptrReturnValue{}", self.next_value_counter()),
             );
             self.block.add_assignment(self.location, result, return_value);
             result.to_rvalue()
@@ -438,7 +438,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let result = current_func.new_local(
             self.location,
             return_type,
-            &format!("overflowReturnValue{}", self.next_value_counter()),
+            format!("overflowReturnValue{}", self.next_value_counter()),
         );
         self.block.add_assignment(
             self.location,
@@ -923,7 +923,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let ty = self.cx.type_array(self.cx.type_i8(), size.bytes()).get_aligned(align.bytes());
         // TODO(antoyo): It might be better to return a LValue, but fixing the rustc API is non-trivial.
         self.current_func()
-            .new_local(self.location, ty, &format!("stack_var_{}", self.next_value_counter()))
+            .new_local(self.location, ty, format!("stack_var_{}", self.next_value_counter()))
             .get_address(self.location)
     }
 
@@ -949,7 +949,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let loaded_value = function.new_local(
             self.location,
             aligned_type,
-            &format!("loadedValue{}", self.next_value_counter()),
+            format!("loadedValue{}", self.next_value_counter()),
         );
         block.add_assignment(self.location, loaded_value, deref);
         loaded_value.to_rvalue()
@@ -970,7 +970,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // TODO(antoyo): use ty.
         // TODO(antoyo): handle alignment.
         let atomic_load =
-            self.context.get_builtin_function(&format!("__atomic_load_{}", size.bytes()));
+            self.context.get_builtin_function(format!("__atomic_load_{}", size.bytes()));
         let ordering = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
 
         let volatile_const_void_ptr_type =
@@ -1126,7 +1126,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     ) {
         // TODO(antoyo): handle alignment.
         let atomic_store =
-            self.context.get_builtin_function(&format!("__atomic_store_{}", size.bytes()));
+            self.context.get_builtin_function(format!("__atomic_store_{}", size.bytes()));
         let ordering = self.context.new_rvalue_from_int(self.i32_type, order.to_gcc());
         let volatile_const_void_ptr_type =
             self.context.new_type::<()>().make_volatile().make_pointer();
diff --git a/src/int.rs b/src/int.rs
index 92d5c1cbbb80..1893d5a17dce 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -735,7 +735,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         // TODO(antoyo): check if it's faster to use string literals and a
         // match instead of format!.
-        let bswap = self.cx.context.get_builtin_function(&format!("__builtin_bswap{}", width));
+        let bswap = self.cx.context.get_builtin_function(format!("__builtin_bswap{}", width));
         // FIXME(antoyo): this cast should not be necessary. Remove
         // when having proper sized integer types.
         let param_type = bswap.get_param(0).to_rvalue().get_type();

From 0bdc5ffd685db3d1506dbf21c8df5daaf68aeaac Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 1 Sep 2024 11:23:24 -0400
Subject: [PATCH 728/997] Support the weak variable attribute

---
 Cargo.lock       | 6 ++----
 Cargo.toml       | 3 ++-
 src/consts.rs    | 7 ++++++-
 src/mono_item.rs | 2 +-
 4 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 915229f7e7ee..42528419a253 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -80,8 +80,7 @@ dependencies = [
 [[package]]
 name = "gccjit"
 version = "2.1.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "62e0ba949ebee07c5cc21f02cb48f28f2c8db7fcbc15fdc5120476a6c43b4636"
+source = "git+https://github.com/rust-lang/gccjit.rs#4fbe2023250357378fb2faf6f484b34cb8f8ebc3"
 dependencies = [
  "gccjit_sys",
 ]
@@ -89,8 +88,7 @@ dependencies = [
 [[package]]
 name = "gccjit_sys"
 version = "0.2.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a5bbf85e12c2593772329a9d4e8310271f6706e6045ce4f41b041dd34fba6603"
+source = "git+https://github.com/rust-lang/gccjit.rs#4fbe2023250357378fb2faf6f484b34cb8f8ebc3"
 dependencies = [
  "libc",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 5caca63f6348..67a90cc34ee4 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,7 +22,8 @@ master = ["gccjit/master"]
 default = ["master"]
 
 [dependencies]
-gccjit = "2.1"
+#gccjit = "2.1"
+gccjit = { git = "https://github.com/rust-lang/gccjit.rs" }
 
 # Local copy.
 #gccjit = { path = "../gccjit.rs" }
diff --git a/src/consts.rs b/src/consts.rs
index e5673cddc4a4..53dbb35d711e 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -7,6 +7,7 @@ use rustc_middle::middle::codegen_fn_attrs::{CodegenFnAttrFlags, CodegenFnAttrs}
 use rustc_middle::mir::interpret::{
     self, read_target_uint, ConstAllocation, ErrorHandled, Scalar as InterpScalar,
 };
+use rustc_middle::mir::mono::Linkage;
 use rustc_middle::ty::layout::LayoutOf;
 use rustc_middle::ty::{self, Instance};
 use rustc_middle::{bug, span_bug};
@@ -256,7 +257,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
             if !self.tcx.is_reachable_non_generic(def_id) {
                 #[cfg(feature = "master")]
-                global.add_string_attribute(VarAttribute::Visibility(Visibility::Hidden));
+                global.add_attribute(VarAttribute::Visibility(Visibility::Hidden));
             }
 
             global
@@ -384,6 +385,10 @@ fn check_and_apply_linkage<'gcc, 'tcx>(
         let global1 =
             cx.declare_global_with_linkage(sym, cx.type_i8(), base::global_linkage_to_gcc(linkage));
 
+        if linkage == Linkage::ExternalWeak {
+            global1.add_attribute(VarAttribute::Weak);
+        }
+
         // Declare an internal global `extern_with_linkage_foo` which
         // is initialized with the address of `foo`.  If `foo` is
         // discarded during linking (for example, if `foo` has weak
diff --git a/src/mono_item.rs b/src/mono_item.rs
index e6b22d518714..ba81dea49d54 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -37,7 +37,7 @@ impl<'gcc, 'tcx> PreDefineMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
         let global = self.define_global(symbol_name, gcc_type, is_tls, attrs.link_section);
         #[cfg(feature = "master")]
-        global.add_string_attribute(VarAttribute::Visibility(base::visibility_to_gcc(visibility)));
+        global.add_attribute(VarAttribute::Visibility(base::visibility_to_gcc(visibility)));
 
         // TODO(antoyo): set linkage.
         self.instances.borrow_mut().insert(instance, global);

From 4dd288cecf8b8fc24921f45413b7609ab55a066d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 1 Sep 2024 11:59:27 -0400
Subject: [PATCH 729/997] Fix tests

---
 build_system/src/test.rs                      |  3 +-
 libgccjit.version                             |  2 +-
 ...022-core-Disable-not-compiling-tests.patch | 30 +++++++++----------
 src/consts.rs                                 |  1 +
 src/intrinsic/llvm.rs                         |  2 ++
 tests/failing-ice-tests.txt                   |  4 +++
 tests/failing-ui-tests.txt                    | 26 ++++++++++++++++
 7 files changed, 51 insertions(+), 17 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 303a2e518cf7..dd09de24aa34 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -637,7 +637,8 @@ fn test_projects(env: &Env, args: &TestArg) -> Result<(), String> {
         "https://github.com/BurntSushi/memchr",
         "https://github.com/dtolnay/itoa",
         "https://github.com/rust-lang/cfg-if",
-        "https://github.com/rust-lang-nursery/lazy-static.rs",
+        //"https://github.com/rust-lang-nursery/lazy-static.rs", // TODO: re-enable when the
+        //failing test is fixed upstream.
         //"https://github.com/marshallpierce/rust-base64", // FIXME: one test is OOM-killed.
         // TODO: ignore the base64 test that is OOM-killed.
         "https://github.com/time-rs/time",
diff --git a/libgccjit.version b/libgccjit.version
index 23ca7f022155..fa2bacc2c8e7 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-341be3b7d7ac6976cfed8ed59da3573c040d0776
+bcafd46296f7898dac02d127e441b1d838ef2afc
diff --git a/patches/0022-core-Disable-not-compiling-tests.patch b/patches/0022-core-Disable-not-compiling-tests.patch
index 08e2f1a76284..b2ab05691ecb 100644
--- a/patches/0022-core-Disable-not-compiling-tests.patch
+++ b/patches/0022-core-Disable-not-compiling-tests.patch
@@ -1,26 +1,24 @@
-From f6befc4bb51d84f5f1cf35938a168c953d421350 Mon Sep 17 00:00:00 2001
-From: bjorn3 <bjorn3@users.noreply.github.com>
-Date: Sun, 24 Nov 2019 15:10:23 +0100
+From 18793c6109890493ceb3ff36549849a36e3d8022 Mon Sep 17 00:00:00 2001
+From: None <none@example.com>
+Date: Sun, 1 Sep 2024 11:42:17 -0400
 Subject: [PATCH] [core] Disable not compiling tests
 
 ---
- library/core/tests/Cargo.toml         | 8 ++++++++
- library/core/tests/num/flt2dec/mod.rs | 1 -
- library/core/tests/num/int_macros.rs  | 2 ++
- library/core/tests/num/uint_macros.rs | 2 ++
- library/core/tests/ptr.rs             | 2 ++
- library/core/tests/slice.rs           | 2 ++
- 6 files changed, 16 insertions(+), 1 deletion(-)
+ library/core/tests/Cargo.toml | 14 ++++++++++++++
+ library/core/tests/lib.rs     |  1 +
+ 2 files changed, 15 insertions(+)
  create mode 100644 library/core/tests/Cargo.toml
 
 diff --git a/library/core/tests/Cargo.toml b/library/core/tests/Cargo.toml
 new file mode 100644
-index 0000000..46fd999
+index 0000000..ca326ac
 --- /dev/null
 +++ b/library/core/tests/Cargo.toml
-@@ -0,0 +1,12 @@
+@@ -0,0 +1,14 @@
++[workspace]
++
 +[package]
-+name = "core"
++name = "coretests"
 +version = "0.0.0"
 +edition = "2021"
 +
@@ -32,12 +30,14 @@ index 0000000..46fd999
 +rand = { version = "0.8.5", default-features = false }
 +rand_xorshift = { version = "0.3.0", default-features = false }
 diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
-index 42a26ae..5ac1042 100644
+index 1e336bf..5800ebb 100644
 --- a/library/core/tests/lib.rs
 +++ b/library/core/tests/lib.rs
-@@ -2,4 +2,5 @@
+@@ -1,4 +1,5 @@
  // tidy-alphabetical-start
 +#![cfg(test)]
  #![cfg_attr(bootstrap, feature(offset_of_nested))]
  #![cfg_attr(target_has_atomic = "128", feature(integer_atomics))]
  #![cfg_attr(test, feature(cfg_match))]
+--
+2.46.0
diff --git a/src/consts.rs b/src/consts.rs
index 53dbb35d711e..483b2355c529 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -386,6 +386,7 @@ fn check_and_apply_linkage<'gcc, 'tcx>(
             cx.declare_global_with_linkage(sym, cx.type_i8(), base::global_linkage_to_gcc(linkage));
 
         if linkage == Linkage::ExternalWeak {
+            #[cfg(feature = "master")]
             global1.add_attribute(VarAttribute::Weak);
         }
 
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 554e57250e6d..2287c96b41b8 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -985,6 +985,8 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.vpdpbusds.512" => "__builtin_ia32_vpdpbusds_v16si",
         "llvm.x86.avx512.vpdpbusds.256" => "__builtin_ia32_vpdpbusds_v8si",
         "llvm.x86.avx512.vpdpbusds.128" => "__builtin_ia32_vpdpbusds_v4si",
+        "llvm.x86.xsave" => "__builtin_ia32_xsave",
+        "llvm.x86.xsaveopt" => "__builtin_ia32_xsaveopt",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),
diff --git a/tests/failing-ice-tests.txt b/tests/failing-ice-tests.txt
index 2084f86b62e1..ff1b6f148946 100644
--- a/tests/failing-ice-tests.txt
+++ b/tests/failing-ice-tests.txt
@@ -34,3 +34,7 @@ tests/ui/sepcomp/sepcomp-unwind.rs
 tests/ui/extern/issue-64655-extern-rust-must-allow-unwind.rs
 tests/ui/extern/issue-64655-allow-unwind-when-calling-panic-directly.rs
 tests/ui/unwind-no-uwtable.rs
+tests/ui/delegation/fn-header.rs
+tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
+tests/ui/simd/masked-load-store.rs
+tests/ui/rfcs/rfc-2632-const-trait-impl/effects/minicore.rs
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 5a55bdb156e3..56b51275a53b 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -95,3 +95,29 @@ tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
 tests/ui/backtrace/backtrace.rs
 tests/ui/lifetimes/tail-expr-lock-poisoning.rs
 tests/ui/runtime/rt-explody-panic-payloads.rs
+tests/ui/codegen/equal-pointers-unequal/as-cast/function.rs
+tests/ui/codegen/equal-pointers-unequal/as-cast/basic.rs
+tests/ui/codegen/equal-pointers-unequal/as-cast/inline1.rs
+tests/ui/codegen/equal-pointers-unequal/as-cast/print.rs
+tests/ui/codegen/equal-pointers-unequal/as-cast/inline2.rs
+tests/ui/codegen/equal-pointers-unequal/as-cast/print3.rs
+tests/ui/codegen/equal-pointers-unequal/as-cast/segfault.rs
+tests/ui/codegen/equal-pointers-unequal/exposed-provenance/function.rs
+tests/ui/codegen/equal-pointers-unequal/exposed-provenance/basic.rs
+tests/ui/codegen/equal-pointers-unequal/as-cast/zero.rs
+tests/ui/codegen/equal-pointers-unequal/exposed-provenance/inline1.rs
+tests/ui/codegen/equal-pointers-unequal/exposed-provenance/print.rs
+tests/ui/codegen/equal-pointers-unequal/exposed-provenance/print3.rs
+tests/ui/codegen/equal-pointers-unequal/exposed-provenance/inline2.rs
+tests/ui/codegen/equal-pointers-unequal/exposed-provenance/segfault.rs
+tests/ui/codegen/equal-pointers-unequal/exposed-provenance/zero.rs
+tests/ui/codegen/equal-pointers-unequal/strict-provenance/basic.rs
+tests/ui/codegen/equal-pointers-unequal/strict-provenance/function.rs
+tests/ui/codegen/equal-pointers-unequal/strict-provenance/print.rs
+tests/ui/codegen/equal-pointers-unequal/strict-provenance/inline1.rs
+tests/ui/codegen/equal-pointers-unequal/strict-provenance/print3.rs
+tests/ui/codegen/equal-pointers-unequal/strict-provenance/inline2.rs
+tests/ui/codegen/equal-pointers-unequal/strict-provenance/segfault.rs
+tests/ui/codegen/equal-pointers-unequal/strict-provenance/zero.rs
+tests/ui/sanitizer/cfi-sized-associated-ty.rs
+tests/ui/sanitizer/cfi-can-reveal-opaques.rs

From 59b42b92e7fe506a083e194aee2281525f8199c4 Mon Sep 17 00:00:00 2001
From: Alexander Cyon <alex.cyon@gmail.com>
Date: Mon, 2 Sep 2024 07:54:55 +0200
Subject: [PATCH 730/997] chore: Fix some typos

---
 src/debuginfo.rs             |  4 ++--
 src/lib.rs                   |  2 +-
 tools/generate_intrinsics.py | 10 +++++-----
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index 3d9ea278a639..876386428835 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -50,7 +50,7 @@ impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods for Builder<'a, 'gcc, 'tcx> {
 }
 
 /// Generate the `debug_context` in an MIR Body.
-/// # Souce of Origin
+/// # Source of Origin
 /// Copied from `create_scope_map.rs` of rustc_codegen_llvm
 fn compute_mir_scopes<'gcc, 'tcx>(
     cx: &CodegenCx<'gcc, 'tcx>,
@@ -85,7 +85,7 @@ fn compute_mir_scopes<'gcc, 'tcx>(
 /// Update the `debug_context`, adding new scope to it,
 /// if it's not added as is denoted in `instantiated`.
 ///
-/// # Souce of Origin
+/// # Source of Origin
 /// Copied from `create_scope_map.rs` of rustc_codegen_llvm
 /// FIXME(tempdragon/?): Add Scope Support Here.
 fn make_mir_scope<'gcc, 'tcx>(
diff --git a/src/lib.rs b/src/lib.rs
index 1132b0cd2f5a..c11a183acde5 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -360,7 +360,7 @@ impl Deref for SyncContext {
 
 unsafe impl Send for SyncContext {}
 // FIXME(antoyo): that shouldn't be Sync. Parallel compilation is currently disabled with "-Zno-parallel-llvm".
-// TODO: disable it here by returing false in CodegenBackend::supports_parallel().
+// TODO: disable it here by returning false in CodegenBackend::supports_parallel().
 unsafe impl Sync for SyncContext {}
 
 impl WriteBackendMethods for GccCodegenBackend {
diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index 90fb7bfad27c..8efed3e43af8 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -45,7 +45,7 @@ def convert_to_string(content):
     return content
 
 
-def extract_instrinsics_from_llvm(llvm_path, intrinsics):
+def extract_intrinsics_from_llvm(llvm_path, intrinsics):
     command = ["llvm-tblgen", "llvm/IR/Intrinsics.td"]
     cwd = os.path.join(llvm_path, "llvm/include")
     print("=> Running command `{}` from `{}`".format(command, cwd))
@@ -88,7 +88,7 @@ def append_translation(json_data, p, array):
     append_intrinsic(array, content[1], content[3])
 
 
-def extract_instrinsics_from_llvmint(llvmint, intrinsics):
+def extract_intrinsics_from_llvmint(llvmint, intrinsics):
     archs = [
         "AMDGPU",
         "aarch64",
@@ -152,9 +152,9 @@ def update_intrinsics(llvm_path, llvmint, llvmint2):
     intrinsics_llvmint = {}
     all_intrinsics = {}
 
-    extract_instrinsics_from_llvm(llvm_path, intrinsics_llvm)
-    extract_instrinsics_from_llvmint(llvmint, intrinsics_llvmint)
-    extract_instrinsics_from_llvmint(llvmint2, intrinsics_llvmint)
+    extract_intrinsics_from_llvm(llvm_path, intrinsics_llvm)
+    extract_intrinsics_from_llvmint(llvmint, intrinsics_llvmint)
+    extract_intrinsics_from_llvmint(llvmint2, intrinsics_llvmint)
 
     intrinsics = {}
     # We give priority to translations from LLVM over the ones from llvmint.

From d3c9cc57d291efa09963add37b11cc52edcae19e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 3 Sep 2024 12:03:53 -0400
Subject: [PATCH 731/997] Add support for missing SIMD intrinsics

---
 src/intrinsic/llvm.rs | 45 ++++++++++++++++++++++++++++++++++++++++++-
 src/intrinsic/simd.rs | 18 ++++++++++++++++-
 2 files changed, 61 insertions(+), 2 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 2287c96b41b8..614bdbe26b80 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -182,7 +182,10 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             | "__builtin_ia32_vplzcntd_128_mask"
             | "__builtin_ia32_vplzcntq_512_mask"
             | "__builtin_ia32_vplzcntq_256_mask"
-            | "__builtin_ia32_vplzcntq_128_mask" => {
+            | "__builtin_ia32_vplzcntq_128_mask"
+            | "__builtin_ia32_cvtqq2pd128_mask"
+            | "__builtin_ia32_cvtqq2pd256_mask"
+            | "__builtin_ia32_cvtqq2ps256_mask" => {
                 let mut new_args = args.to_vec();
                 // Remove last arg as it doesn't seem to be used in GCC and is always false.
                 new_args.pop();
@@ -378,6 +381,23 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 );
                 args = vec![arg.get_address(None)].into();
             }
+            "__builtin_ia32_cvtqq2pd512_mask" | "__builtin_ia32_cvtqq2ps512_mask" => {
+                let mut old_args = args.to_vec();
+                let mut new_args = vec![];
+                new_args.push(old_args.swap_remove(0));
+                let arg2_type = gcc_func.get_param_type(1);
+                let vector_type = arg2_type.dyncast_vector().expect("vector type");
+                let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
+                let num_units = vector_type.get_num_units();
+                let first_arg =
+                    builder.context.new_rvalue_from_vector(None, arg2_type, &vec![zero; num_units]);
+                new_args.push(first_arg);
+                let arg3_type = gcc_func.get_param_type(2);
+                let minus_one = builder.context.new_rvalue_from_int(arg3_type, -1);
+                new_args.push(minus_one);
+                new_args.push(old_args.swap_remove(0));
+                args = new_args.into();
+            }
             _ => (),
         }
     } else {
@@ -987,6 +1007,29 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.vpdpbusds.128" => "__builtin_ia32_vpdpbusds_v4si",
         "llvm.x86.xsave" => "__builtin_ia32_xsave",
         "llvm.x86.xsaveopt" => "__builtin_ia32_xsaveopt",
+        "llvm.x86.avx512.mask.loadu.w.512" => "__builtin_ia32_loaddquhi512_mask",
+        "llvm.x86.avx512.mask.loadu.b.512" => "__builtin_ia32_loaddquqi512_mask",
+        "llvm.x86.avx512.mask.loadu.w.256" => "__builtin_ia32_loaddquhi256_mask",
+        "llvm.x86.avx512.mask.loadu.b.256" => "__builtin_ia32_loaddquqi256_mask",
+        "llvm.x86.avx512.mask.loadu.w.128" => "__builtin_ia32_loaddquhi128_mask",
+        "llvm.x86.avx512.mask.loadu.b.128" => "__builtin_ia32_loaddquqi128_mask",
+        "llvm.x86.avx512.mask.storeu.w.512" => "__builtin_ia32_storedquhi512_mask",
+        "llvm.x86.avx512.mask.storeu.b.512" => "__builtin_ia32_storedquqi512_mask",
+        "llvm.x86.avx512.mask.storeu.w.256" => "__builtin_ia32_storedquhi256_mask",
+        "llvm.x86.avx512.mask.storeu.b.256" => "__builtin_ia32_storedquqi256_mask",
+        "llvm.x86.avx512.mask.storeu.w.128" => "__builtin_ia32_storedquhi128_mask",
+        "llvm.x86.avx512.mask.storeu.b.128" => "__builtin_ia32_storedquqi128_mask",
+        "llvm.x86.avx512.mask.expand.load.w.512" => "__builtin_ia32_expandloadhi512_mask",
+        "llvm.x86.avx512.mask.expand.load.w.256" => "__builtin_ia32_expandloadhi256_mask",
+        "llvm.x86.avx512.mask.expand.load.w.128" => "__builtin_ia32_expandloadhi128_mask",
+        "llvm.x86.avx512.mask.expand.load.b.512" => "__builtin_ia32_expandloadqi512_mask",
+        "llvm.x86.avx512.mask.expand.load.b.256" => "__builtin_ia32_expandloadqi256_mask",
+        "llvm.x86.avx512.mask.expand.load.b.128" => "__builtin_ia32_expandloadqi128_mask",
+        "llvm.x86.avx512.sitofp.round.v8f64.v8i64" => "__builtin_ia32_cvtqq2pd512_mask",
+        "llvm.x86.avx512.sitofp.round.v2f64.v2i64" => "__builtin_ia32_cvtqq2pd128_mask",
+        "llvm.x86.avx512.sitofp.round.v4f64.v4i64" => "__builtin_ia32_cvtqq2pd256_mask",
+        "llvm.x86.avx512.sitofp.round.v8f32.v8i64" => "__builtin_ia32_cvtqq2ps512_mask",
+        "llvm.x86.avx512.sitofp.round.v4f32.v4i64" => "__builtin_ia32_cvtqq2ps256_mask",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index d1b4a9689a93..a0d8ff6346f3 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -201,7 +201,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         bx.context.new_bitcast(None, shuffled, v_type)
     };
 
-    if name == sym::simd_bswap || name == sym::simd_bitreverse {
+    if matches!(name, sym::simd_bswap | sym::simd_bitreverse | sym::simd_ctpop) {
         require!(
             bx.type_kind(bx.element_type(llret_ty)) == TypeKind::Integer,
             InvalidMonomorphization::UnsupportedOperation { span, name, in_ty, in_elem }
@@ -212,6 +212,22 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         return Ok(simd_bswap(bx, args[0].immediate()));
     }
 
+    let simd_ctpop = |bx: &mut Builder<'a, 'gcc, 'tcx>, vector: RValue<'gcc>| -> RValue<'gcc> {
+        let mut vector_elements = vec![];
+        let elem_ty = bx.element_type(llret_ty);
+        for i in 0..in_len {
+            let index = bx.context.new_rvalue_from_long(bx.ulong_type, i as i64);
+            let element = bx.extract_element(vector, index).to_rvalue();
+            let result = bx.context.new_cast(None, bx.pop_count(element), elem_ty);
+            vector_elements.push(result);
+        }
+        bx.context.new_rvalue_from_vector(None, llret_ty, &vector_elements)
+    };
+
+    if name == sym::simd_ctpop {
+        return Ok(simd_ctpop(bx, args[0].immediate()));
+    }
+
     // We use a different algorithm from non-vector bitreverse to take advantage of most
     // processors' vector shuffle units.  It works like this:
     // 1. Generate pre-reversed low and high nibbles as a vector.

From e064b729b9cff869e3c03b28cc2fd28f25b928dd Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 3 Sep 2024 21:53:06 +0200
Subject: [PATCH 732/997] Add missing intrinsic translation for
 `llvm.x86.xsave64`

---
 src/intrinsic/llvm.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 614bdbe26b80..3b9855ddc189 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -802,6 +802,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.mask.cmp.b.128" => "__builtin_ia32_cmpb128_mask",
         "llvm.x86.xrstor" => "__builtin_ia32_xrstor",
         "llvm.x86.xsavec" => "__builtin_ia32_xsavec",
+        "llvm.x86.xsave64" => "__builtin_ia32_xsave64",
         "llvm.x86.addcarry.32" => "__builtin_ia32_addcarryx_u32",
         "llvm.x86.subborrow.32" => "__builtin_ia32_sbb_u32",
         "llvm.x86.avx512.mask.compress.store.w.512" => "__builtin_ia32_compressstoreuhi512_mask",

From 197df44af97026e6c04da77a73c3121387f9816f Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Tue, 3 Sep 2024 21:58:18 +0200
Subject: [PATCH 733/997] Regenerate intrinsics

---
 src/intrinsic/archs.rs | 364 ++++++++++++++++++++++++++---------------
 1 file changed, 234 insertions(+), 130 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index f75009337898..b8d1cde1d5dd 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -31,8 +31,11 @@ match name {
     "llvm.AMDGPU.trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
     "llvm.AMDGPU.trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
     // aarch64
+    "llvm.aarch64.chkfeat" => "__builtin_arm_chkfeat",
     "llvm.aarch64.dmb" => "__builtin_arm_dmb",
     "llvm.aarch64.dsb" => "__builtin_arm_dsb",
+    "llvm.aarch64.gcspopm" => "__builtin_arm_gcspopm",
+    "llvm.aarch64.gcsss" => "__builtin_arm_gcsss",
     "llvm.aarch64.isb" => "__builtin_arm_isb",
     "llvm.aarch64.prefetch" => "__builtin_arm_prefetch",
     "llvm.aarch64.sve.aesd" => "__builtin_sve_svaesd_u8",
@@ -80,7 +83,6 @@ match name {
     "llvm.amdgcn.dot4.f32.fp8.fp8" => "__builtin_amdgcn_dot4_f32_fp8_fp8",
     "llvm.amdgcn.ds.add.gs.reg.rtn" => "__builtin_amdgcn_ds_add_gs_reg_rtn",
     "llvm.amdgcn.ds.bpermute" => "__builtin_amdgcn_ds_bpermute",
-    "llvm.amdgcn.ds.fadd.v2bf16" => "__builtin_amdgcn_ds_atomic_fadd_v2bf16",
     "llvm.amdgcn.ds.gws.barrier" => "__builtin_amdgcn_ds_gws_barrier",
     "llvm.amdgcn.ds.gws.init" => "__builtin_amdgcn_ds_gws_init",
     "llvm.amdgcn.ds.gws.sema.br" => "__builtin_amdgcn_ds_gws_sema_br",
@@ -96,6 +98,7 @@ match name {
     "llvm.amdgcn.fdot2.f16.f16" => "__builtin_amdgcn_fdot2_f16_f16",
     "llvm.amdgcn.fdot2.f32.bf16" => "__builtin_amdgcn_fdot2_f32_bf16",
     "llvm.amdgcn.fmul.legacy" => "__builtin_amdgcn_fmul_legacy",
+    "llvm.amdgcn.global.load.lds" => "__builtin_amdgcn_global_load_lds",
     "llvm.amdgcn.groupstaticsize" => "__builtin_amdgcn_groupstaticsize",
     "llvm.amdgcn.iglp.opt" => "__builtin_amdgcn_iglp_opt",
     "llvm.amdgcn.implicit.buffer.ptr" => "__builtin_amdgcn_implicit_buffer_ptr",
@@ -154,16 +157,11 @@ match name {
     "llvm.amdgcn.mqsad.u32.u8" => "__builtin_amdgcn_mqsad_u32_u8",
     "llvm.amdgcn.msad.u8" => "__builtin_amdgcn_msad_u8",
     "llvm.amdgcn.perm" => "__builtin_amdgcn_perm",
-    "llvm.amdgcn.permlane16" => "__builtin_amdgcn_permlane16",
     "llvm.amdgcn.permlane16.var" => "__builtin_amdgcn_permlane16_var",
-    "llvm.amdgcn.permlane64" => "__builtin_amdgcn_permlane64",
-    "llvm.amdgcn.permlanex16" => "__builtin_amdgcn_permlanex16",
     "llvm.amdgcn.permlanex16.var" => "__builtin_amdgcn_permlanex16_var",
     "llvm.amdgcn.qsad.pk.u16.u8" => "__builtin_amdgcn_qsad_pk_u16_u8",
     "llvm.amdgcn.queue.ptr" => "__builtin_amdgcn_queue_ptr",
     "llvm.amdgcn.rcp.legacy" => "__builtin_amdgcn_rcp_legacy",
-    "llvm.amdgcn.readfirstlane" => "__builtin_amdgcn_readfirstlane",
-    "llvm.amdgcn.readlane" => "__builtin_amdgcn_readlane",
     "llvm.amdgcn.rsq.legacy" => "__builtin_amdgcn_rsq_legacy",
     "llvm.amdgcn.s.barrier" => "__builtin_amdgcn_s_barrier",
     "llvm.amdgcn.s.barrier.init" => "__builtin_amdgcn_s_barrier_init",
@@ -192,6 +190,8 @@ match name {
     "llvm.amdgcn.s.setreg" => "__builtin_amdgcn_s_setreg",
     "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_sleep",
     "llvm.amdgcn.s.sleep.var" => "__builtin_amdgcn_s_sleep_var",
+    "llvm.amdgcn.s.ttracedata" => "__builtin_amdgcn_s_ttracedata",
+    "llvm.amdgcn.s.ttracedata.imm" => "__builtin_amdgcn_s_ttracedata_imm",
     "llvm.amdgcn.s.wait.event.export.ready" => "__builtin_amdgcn_s_wait_event_export_ready",
     "llvm.amdgcn.s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
     "llvm.amdgcn.s.wakeup.barrier" => "__builtin_amdgcn_s_wakeup_barrier",
@@ -227,7 +227,6 @@ match name {
     "llvm.amdgcn.workgroup.id.x" => "__builtin_amdgcn_workgroup_id_x",
     "llvm.amdgcn.workgroup.id.y" => "__builtin_amdgcn_workgroup_id_y",
     "llvm.amdgcn.workgroup.id.z" => "__builtin_amdgcn_workgroup_id_z",
-    "llvm.amdgcn.writelane" => "__builtin_amdgcn_writelane",
     // arm
     "llvm.arm.cdp" => "__builtin_arm_cdp",
     "llvm.arm.cdp2" => "__builtin_arm_cdp2",
@@ -4536,10 +4535,18 @@ match name {
     "llvm.nvvm.div.rz.d" => "__nvvm_div_rz_d",
     "llvm.nvvm.div.rz.f" => "__nvvm_div_rz_f",
     "llvm.nvvm.div.rz.ftz.f" => "__nvvm_div_rz_ftz_f",
+    "llvm.nvvm.e4m3x2.to.f16x2.rn" => "__nvvm_e4m3x2_to_f16x2_rn",
+    "llvm.nvvm.e4m3x2.to.f16x2.rn.relu" => "__nvvm_e4m3x2_to_f16x2_rn_relu",
+    "llvm.nvvm.e5m2x2.to.f16x2.rn" => "__nvvm_e5m2x2_to_f16x2_rn",
+    "llvm.nvvm.e5m2x2.to.f16x2.rn.relu" => "__nvvm_e5m2x2_to_f16x2_rn_relu",
     "llvm.nvvm.ex2.approx.d" => "__nvvm_ex2_approx_d",
     "llvm.nvvm.ex2.approx.f" => "__nvvm_ex2_approx_f",
     "llvm.nvvm.ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f",
     "llvm.nvvm.exit" => "__nvvm_exit",
+    "llvm.nvvm.f16x2.to.e4m3x2.rn" => "__nvvm_f16x2_to_e4m3x2_rn",
+    "llvm.nvvm.f16x2.to.e4m3x2.rn.relu" => "__nvvm_f16x2_to_e4m3x2_rn_relu",
+    "llvm.nvvm.f16x2.to.e5m2x2.rn" => "__nvvm_f16x2_to_e5m2x2_rn",
+    "llvm.nvvm.f16x2.to.e5m2x2.rn.relu" => "__nvvm_f16x2_to_e5m2x2_rn_relu",
     "llvm.nvvm.f2bf16.rn" => "__nvvm_f2bf16_rn",
     "llvm.nvvm.f2bf16.rn.relu" => "__nvvm_f2bf16_rn_relu",
     "llvm.nvvm.f2bf16.rz" => "__nvvm_f2bf16_rz",
@@ -4582,6 +4589,10 @@ match name {
     "llvm.nvvm.fabs.d" => "__nvvm_fabs_d",
     "llvm.nvvm.fabs.f" => "__nvvm_fabs_f",
     "llvm.nvvm.fabs.ftz.f" => "__nvvm_fabs_ftz_f",
+    "llvm.nvvm.ff.to.e4m3x2.rn" => "__nvvm_ff_to_e4m3x2_rn",
+    "llvm.nvvm.ff.to.e4m3x2.rn.relu" => "__nvvm_ff_to_e4m3x2_rn_relu",
+    "llvm.nvvm.ff.to.e5m2x2.rn" => "__nvvm_ff_to_e5m2x2_rn",
+    "llvm.nvvm.ff.to.e5m2x2.rn.relu" => "__nvvm_ff_to_e5m2x2_rn_relu",
     "llvm.nvvm.ff2bf16x2.rn" => "__nvvm_ff2bf16x2_rn",
     "llvm.nvvm.ff2bf16x2.rn.relu" => "__nvvm_ff2bf16x2_rn_relu",
     "llvm.nvvm.ff2bf16x2.rz" => "__nvvm_ff2bf16x2_rz",
@@ -4866,6 +4877,7 @@ match name {
     "llvm.nvvm.round.ftz.f" => "__nvvm_round_ftz_f",
     "llvm.nvvm.rsqrt.approx.d" => "__nvvm_rsqrt_approx_d",
     "llvm.nvvm.rsqrt.approx.f" => "__nvvm_rsqrt_approx_f",
+    "llvm.nvvm.rsqrt.approx.ftz.d" => "__nvvm_rsqrt_approx_ftz_d",
     "llvm.nvvm.rsqrt.approx.ftz.f" => "__nvvm_rsqrt_approx_ftz_f",
     "llvm.nvvm.sad.i" => "__nvvm_sad_i",
     "llvm.nvvm.sad.ll" => "__nvvm_sad_ll",
@@ -5164,6 +5176,8 @@ match name {
     // ppc
     "llvm.ppc.addex" => "__builtin_ppc_addex",
     "llvm.ppc.addf128.round.to.odd" => "__builtin_addf128_round_to_odd",
+    "llvm.ppc.addg6s" => "__builtin_addg6s",
+    "llvm.ppc.addg6sd" => "__builtin_ppc_addg6s",
     "llvm.ppc.altivec.crypto.vcipher" => "__builtin_altivec_crypto_vcipher",
     "llvm.ppc.altivec.crypto.vcipherlast" => "__builtin_altivec_crypto_vcipherlast",
     "llvm.ppc.altivec.crypto.vncipher" => "__builtin_altivec_crypto_vncipher",
@@ -5461,6 +5475,10 @@ match name {
     "llvm.ppc.bcdsub" => "__builtin_ppc_bcdsub",
     "llvm.ppc.bcdsub.p" => "__builtin_ppc_bcdsub_p",
     "llvm.ppc.bpermd" => "__builtin_bpermd",
+    "llvm.ppc.cbcdtd" => "__builtin_cbcdtd",
+    "llvm.ppc.cbcdtdd" => "__builtin_ppc_cbcdtd",
+    "llvm.ppc.cdtbcd" => "__builtin_cdtbcd",
+    "llvm.ppc.cdtbcdd" => "__builtin_ppc_cdtbcd",
     "llvm.ppc.cfuged" => "__builtin_cfuged",
     "llvm.ppc.cmpeqb" => "__builtin_ppc_cmpeqb",
     "llvm.ppc.cmprb" => "__builtin_ppc_cmprb",
@@ -5627,7 +5645,6 @@ match name {
     "llvm.ppc.qpx.qvstfs" => "__builtin_qpx_qvstfs",
     "llvm.ppc.qpx.qvstfsa" => "__builtin_qpx_qvstfsa",
     "llvm.ppc.readflm" => "__builtin_readflm",
-    "llvm.ppc.rldimi" => "__builtin_ppc_rldimi",
     "llvm.ppc.rlwimi" => "__builtin_ppc_rlwimi",
     "llvm.ppc.rlwnm" => "__builtin_ppc_rlwnm",
     "llvm.ppc.scalar.extract.expq" => "__builtin_vsx_scalar_extract_expq",
@@ -7210,29 +7227,6 @@ match name {
     "llvm.ve.vl.xorm.MMM" => "__builtin_ve_vl_xorm_MMM",
     "llvm.ve.vl.xorm.mmm" => "__builtin_ve_vl_xorm_mmm",
     // x86
-    "llvm.x86.3dnow.pavgusb" => "__builtin_ia32_pavgusb",
-    "llvm.x86.3dnow.pf2id" => "__builtin_ia32_pf2id",
-    "llvm.x86.3dnow.pfacc" => "__builtin_ia32_pfacc",
-    "llvm.x86.3dnow.pfadd" => "__builtin_ia32_pfadd",
-    "llvm.x86.3dnow.pfcmpeq" => "__builtin_ia32_pfcmpeq",
-    "llvm.x86.3dnow.pfcmpge" => "__builtin_ia32_pfcmpge",
-    "llvm.x86.3dnow.pfcmpgt" => "__builtin_ia32_pfcmpgt",
-    "llvm.x86.3dnow.pfmax" => "__builtin_ia32_pfmax",
-    "llvm.x86.3dnow.pfmin" => "__builtin_ia32_pfmin",
-    "llvm.x86.3dnow.pfmul" => "__builtin_ia32_pfmul",
-    "llvm.x86.3dnow.pfrcp" => "__builtin_ia32_pfrcp",
-    "llvm.x86.3dnow.pfrcpit1" => "__builtin_ia32_pfrcpit1",
-    "llvm.x86.3dnow.pfrcpit2" => "__builtin_ia32_pfrcpit2",
-    "llvm.x86.3dnow.pfrsqit1" => "__builtin_ia32_pfrsqit1",
-    "llvm.x86.3dnow.pfrsqrt" => "__builtin_ia32_pfrsqrt",
-    "llvm.x86.3dnow.pfsub" => "__builtin_ia32_pfsub",
-    "llvm.x86.3dnow.pfsubr" => "__builtin_ia32_pfsubr",
-    "llvm.x86.3dnow.pi2fd" => "__builtin_ia32_pi2fd",
-    "llvm.x86.3dnow.pmulhrw" => "__builtin_ia32_pmulhrw",
-    "llvm.x86.3dnowa.pf2iw" => "__builtin_ia32_pf2iw",
-    "llvm.x86.3dnowa.pfnacc" => "__builtin_ia32_pfnacc",
-    "llvm.x86.3dnowa.pfpnacc" => "__builtin_ia32_pfpnacc",
-    "llvm.x86.3dnowa.pi2fw" => "__builtin_ia32_pi2fw",
     "llvm.x86.aadd32" => "__builtin_ia32_aadd32",
     "llvm.x86.aadd64" => "__builtin_ia32_aadd64",
     "llvm.x86.aand32" => "__builtin_ia32_aand32",
@@ -7334,6 +7328,207 @@ match name {
     "llvm.x86.avx.vtestz.ps.256" => "__builtin_ia32_vtestzps256",
     "llvm.x86.avx.vzeroall" => "__builtin_ia32_vzeroall",
     "llvm.x86.avx.vzeroupper" => "__builtin_ia32_vzeroupper",
+    "llvm.x86.avx10.mask.vcvt2ps2phx.128" => "__builtin_ia32_vcvt2ps2phx128_mask",
+    "llvm.x86.avx10.mask.vcvt2ps2phx.256" => "__builtin_ia32_vcvt2ps2phx256_mask",
+    "llvm.x86.avx10.mask.vcvt2ps2phx.512" => "__builtin_ia32_vcvt2ps2phx512_mask",
+    "llvm.x86.avx10.mask.vcvtbiasph2bf8128" => "__builtin_ia32_vcvtbiasph2bf8_128_mask",
+    "llvm.x86.avx10.mask.vcvtbiasph2bf8256" => "__builtin_ia32_vcvtbiasph2bf8_256_mask",
+    "llvm.x86.avx10.mask.vcvtbiasph2bf8512" => "__builtin_ia32_vcvtbiasph2bf8_512_mask",
+    "llvm.x86.avx10.mask.vcvtbiasph2bf8s128" => "__builtin_ia32_vcvtbiasph2bf8s_128_mask",
+    "llvm.x86.avx10.mask.vcvtbiasph2bf8s256" => "__builtin_ia32_vcvtbiasph2bf8s_256_mask",
+    "llvm.x86.avx10.mask.vcvtbiasph2bf8s512" => "__builtin_ia32_vcvtbiasph2bf8s_512_mask",
+    "llvm.x86.avx10.mask.vcvtbiasph2hf8128" => "__builtin_ia32_vcvtbiasph2hf8_128_mask",
+    "llvm.x86.avx10.mask.vcvtbiasph2hf8256" => "__builtin_ia32_vcvtbiasph2hf8_256_mask",
+    "llvm.x86.avx10.mask.vcvtbiasph2hf8512" => "__builtin_ia32_vcvtbiasph2hf8_512_mask",
+    "llvm.x86.avx10.mask.vcvtbiasph2hf8s128" => "__builtin_ia32_vcvtbiasph2hf8s_128_mask",
+    "llvm.x86.avx10.mask.vcvtbiasph2hf8s256" => "__builtin_ia32_vcvtbiasph2hf8s_256_mask",
+    "llvm.x86.avx10.mask.vcvtbiasph2hf8s512" => "__builtin_ia32_vcvtbiasph2hf8s_512_mask",
+    "llvm.x86.avx10.mask.vcvthf82ph128" => "__builtin_ia32_vcvthf8_2ph128_mask",
+    "llvm.x86.avx10.mask.vcvthf82ph256" => "__builtin_ia32_vcvthf8_2ph256_mask",
+    "llvm.x86.avx10.mask.vcvthf82ph512" => "__builtin_ia32_vcvthf8_2ph512_mask",
+    "llvm.x86.avx10.mask.vcvtneph2bf8128" => "__builtin_ia32_vcvtneph2bf8_128_mask",
+    "llvm.x86.avx10.mask.vcvtneph2bf8256" => "__builtin_ia32_vcvtneph2bf8_256_mask",
+    "llvm.x86.avx10.mask.vcvtneph2bf8512" => "__builtin_ia32_vcvtneph2bf8_512_mask",
+    "llvm.x86.avx10.mask.vcvtneph2bf8s128" => "__builtin_ia32_vcvtneph2bf8s_128_mask",
+    "llvm.x86.avx10.mask.vcvtneph2bf8s256" => "__builtin_ia32_vcvtneph2bf8s_256_mask",
+    "llvm.x86.avx10.mask.vcvtneph2bf8s512" => "__builtin_ia32_vcvtneph2bf8s_512_mask",
+    "llvm.x86.avx10.mask.vcvtneph2hf8128" => "__builtin_ia32_vcvtneph2hf8_128_mask",
+    "llvm.x86.avx10.mask.vcvtneph2hf8256" => "__builtin_ia32_vcvtneph2hf8_256_mask",
+    "llvm.x86.avx10.mask.vcvtneph2hf8512" => "__builtin_ia32_vcvtneph2hf8_512_mask",
+    "llvm.x86.avx10.mask.vcvtneph2hf8s128" => "__builtin_ia32_vcvtneph2hf8s_128_mask",
+    "llvm.x86.avx10.mask.vcvtneph2hf8s256" => "__builtin_ia32_vcvtneph2hf8s_256_mask",
+    "llvm.x86.avx10.mask.vcvtneph2hf8s512" => "__builtin_ia32_vcvtneph2hf8s_512_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtpd2dq256" => "__builtin_ia32_vcvtpd2dq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtpd2ph256" => "__builtin_ia32_vcvtpd2ph256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtpd2ps256" => "__builtin_ia32_vcvtpd2ps256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtpd2qq256" => "__builtin_ia32_vcvtpd2qq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtpd2udq256" => "__builtin_ia32_vcvtpd2udq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtpd2uqq256" => "__builtin_ia32_vcvtpd2uqq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2dq256" => "__builtin_ia32_vcvtph2dq256_round_mask",
+    "llvm.x86.avx10.mask.vcvtph2ibs128" => "__builtin_ia32_vcvtph2ibs128_mask",
+    "llvm.x86.avx10.mask.vcvtph2ibs256" => "__builtin_ia32_vcvtph2ibs256_mask",
+    "llvm.x86.avx10.mask.vcvtph2ibs512" => "__builtin_ia32_vcvtph2ibs512_mask",
+    "llvm.x86.avx10.mask.vcvtph2iubs128" => "__builtin_ia32_vcvtph2iubs128_mask",
+    "llvm.x86.avx10.mask.vcvtph2iubs256" => "__builtin_ia32_vcvtph2iubs256_mask",
+    "llvm.x86.avx10.mask.vcvtph2iubs512" => "__builtin_ia32_vcvtph2iubs512_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2pd256" => "__builtin_ia32_vcvtph2pd256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2psx256" => "__builtin_ia32_vcvtph2psx256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2qq256" => "__builtin_ia32_vcvtph2qq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2udq256" => "__builtin_ia32_vcvtph2udq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2uqq256" => "__builtin_ia32_vcvtph2uqq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2uw256" => "__builtin_ia32_vcvtph2uw256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2w256" => "__builtin_ia32_vcvtph2w256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2dq256" => "__builtin_ia32_vcvtps2dq256_round_mask",
+    "llvm.x86.avx10.mask.vcvtps2ibs128" => "__builtin_ia32_vcvtps2ibs128_mask",
+    "llvm.x86.avx10.mask.vcvtps2ibs256" => "__builtin_ia32_vcvtps2ibs256_mask",
+    "llvm.x86.avx10.mask.vcvtps2ibs512" => "__builtin_ia32_vcvtps2ibs512_mask",
+    "llvm.x86.avx10.mask.vcvtps2iubs128" => "__builtin_ia32_vcvtps2iubs128_mask",
+    "llvm.x86.avx10.mask.vcvtps2iubs256" => "__builtin_ia32_vcvtps2iubs256_mask",
+    "llvm.x86.avx10.mask.vcvtps2iubs512" => "__builtin_ia32_vcvtps2iubs512_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2pd256" => "__builtin_ia32_vcvtps2pd256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2ph256" => "__builtin_ia32_vcvtps2ph256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2phx256" => "__builtin_ia32_vcvtps2phx256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2qq256" => "__builtin_ia32_vcvtps2qq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2udq256" => "__builtin_ia32_vcvtps2udq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2uqq256" => "__builtin_ia32_vcvtps2uqq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2dq256" => "__builtin_ia32_vcvttpd2dq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2qq256" => "__builtin_ia32_vcvttpd2qq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2udq256" => "__builtin_ia32_vcvttpd2udq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2uqq256" => "__builtin_ia32_vcvttpd2uqq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttph2dq256" => "__builtin_ia32_vcvttph2dq256_round_mask",
+    "llvm.x86.avx10.mask.vcvttph2ibs128" => "__builtin_ia32_vcvttph2ibs128_mask",
+    "llvm.x86.avx10.mask.vcvttph2ibs256" => "__builtin_ia32_vcvttph2ibs256_mask",
+    "llvm.x86.avx10.mask.vcvttph2ibs512" => "__builtin_ia32_vcvttph2ibs512_mask",
+    "llvm.x86.avx10.mask.vcvttph2iubs128" => "__builtin_ia32_vcvttph2iubs128_mask",
+    "llvm.x86.avx10.mask.vcvttph2iubs256" => "__builtin_ia32_vcvttph2iubs256_mask",
+    "llvm.x86.avx10.mask.vcvttph2iubs512" => "__builtin_ia32_vcvttph2iubs512_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttph2qq256" => "__builtin_ia32_vcvttph2qq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttph2udq256" => "__builtin_ia32_vcvttph2udq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttph2uqq256" => "__builtin_ia32_vcvttph2uqq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttph2uw256" => "__builtin_ia32_vcvttph2uw256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttph2w256" => "__builtin_ia32_vcvttph2w256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2dq256" => "__builtin_ia32_vcvttps2dq256_round_mask",
+    "llvm.x86.avx10.mask.vcvttps2ibs128" => "__builtin_ia32_vcvttps2ibs128_mask",
+    "llvm.x86.avx10.mask.vcvttps2ibs256" => "__builtin_ia32_vcvttps2ibs256_mask",
+    "llvm.x86.avx10.mask.vcvttps2ibs512" => "__builtin_ia32_vcvttps2ibs512_mask",
+    "llvm.x86.avx10.mask.vcvttps2iubs128" => "__builtin_ia32_vcvttps2iubs128_mask",
+    "llvm.x86.avx10.mask.vcvttps2iubs256" => "__builtin_ia32_vcvttps2iubs256_mask",
+    "llvm.x86.avx10.mask.vcvttps2iubs512" => "__builtin_ia32_vcvttps2iubs512_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2qq256" => "__builtin_ia32_vcvttps2qq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2udq256" => "__builtin_ia32_vcvttps2udq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2uqq256" => "__builtin_ia32_vcvttps2uqq256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vfcmaddcph256" => "__builtin_ia32_vfcmaddcph256_round_mask3",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vfcmulcph256" => "__builtin_ia32_vfcmulcph256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vfixupimmpd256" => "__builtin_ia32_vfixupimmpd256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vfixupimmps256" => "__builtin_ia32_vfixupimmps256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vfmaddcph256" => "__builtin_ia32_vfmaddcph256_round_mask3",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vfmulcph256" => "__builtin_ia32_vfmulcph256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vgetexppd256" => "__builtin_ia32_vgetexppd256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vgetexpph256" => "__builtin_ia32_vgetexpph256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vgetexpps256" => "__builtin_ia32_vgetexpps256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vgetmantpd256" => "__builtin_ia32_vgetmantpd256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vgetmantph256" => "__builtin_ia32_vgetmantph256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vgetmantps256" => "__builtin_ia32_vgetmantps256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxpd.round" => "__builtin_ia32_vminmaxpd512_round_mask",
+    "llvm.x86.avx10.mask.vminmaxpd128" => "__builtin_ia32_vminmaxpd128_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxpd256.round" => "__builtin_ia32_vminmaxpd256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxph.round" => "__builtin_ia32_vminmaxph512_round_mask",
+    "llvm.x86.avx10.mask.vminmaxph128" => "__builtin_ia32_vminmaxph128_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxph256.round" => "__builtin_ia32_vminmaxph256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxps.round" => "__builtin_ia32_vminmaxps512_round_mask",
+    "llvm.x86.avx10.mask.vminmaxps128" => "__builtin_ia32_vminmaxps128_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxps256.round" => "__builtin_ia32_vminmaxps256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxsd.round" => "__builtin_ia32_vminmaxsd_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxsh.round" => "__builtin_ia32_vminmaxsh_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxss.round" => "__builtin_ia32_vminmaxss_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vrangepd256" => "__builtin_ia32_vrangepd256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vrangeps256" => "__builtin_ia32_vrangeps256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vreducepd256" => "__builtin_ia32_vreducepd256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vreduceph256" => "__builtin_ia32_vreduceph256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vreduceps256" => "__builtin_ia32_vreduceps256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vrndscalepd256" => "__builtin_ia32_vrndscalepd256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vrndscaleph256" => "__builtin_ia32_vrndscaleph256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vrndscaleps256" => "__builtin_ia32_vrndscaleps256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vscalefpd256" => "__builtin_ia32_vscalefpd256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vscalefph256" => "__builtin_ia32_vscalefph256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vscalefps256" => "__builtin_ia32_vscalefps256_round_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.maskz.vfcmaddcph256" => "__builtin_ia32_vfcmaddcph256_round_maskz",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.maskz.vfixupimmpd256" => "__builtin_ia32_vfixupimmpd256_round_maskz",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.maskz.vfixupimmps256" => "__builtin_ia32_vfixupimmps256_round_maskz",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.maskz.vfmaddcph256" => "__builtin_ia32_vfmaddcph256_round_maskz",
+    "llvm.x86.avx10.vaddpd256" => "__builtin_ia32_vaddpd256_round",
+    "llvm.x86.avx10.vaddph256" => "__builtin_ia32_vaddph256_round",
+    "llvm.x86.avx10.vaddps256" => "__builtin_ia32_vaddps256_round",
+    "llvm.x86.avx10.vcvtne2ph2bf8128" => "__builtin_ia32_vcvtne2ph2bf8_128",
+    "llvm.x86.avx10.vcvtne2ph2bf8256" => "__builtin_ia32_vcvtne2ph2bf8_256",
+    "llvm.x86.avx10.vcvtne2ph2bf8512" => "__builtin_ia32_vcvtne2ph2bf8_512",
+    "llvm.x86.avx10.vcvtne2ph2bf8s128" => "__builtin_ia32_vcvtne2ph2bf8s_128",
+    "llvm.x86.avx10.vcvtne2ph2bf8s256" => "__builtin_ia32_vcvtne2ph2bf8s_256",
+    "llvm.x86.avx10.vcvtne2ph2bf8s512" => "__builtin_ia32_vcvtne2ph2bf8s_512",
+    "llvm.x86.avx10.vcvtne2ph2hf8128" => "__builtin_ia32_vcvtne2ph2hf8_128",
+    "llvm.x86.avx10.vcvtne2ph2hf8256" => "__builtin_ia32_vcvtne2ph2hf8_256",
+    "llvm.x86.avx10.vcvtne2ph2hf8512" => "__builtin_ia32_vcvtne2ph2hf8_512",
+    "llvm.x86.avx10.vcvtne2ph2hf8s128" => "__builtin_ia32_vcvtne2ph2hf8s_128",
+    "llvm.x86.avx10.vcvtne2ph2hf8s256" => "__builtin_ia32_vcvtne2ph2hf8s_256",
+    "llvm.x86.avx10.vcvtne2ph2hf8s512" => "__builtin_ia32_vcvtne2ph2hf8s_512",
+    "llvm.x86.avx10.vcvtnebf162ibs128" => "__builtin_ia32_vcvtnebf162ibs128",
+    "llvm.x86.avx10.vcvtnebf162ibs256" => "__builtin_ia32_vcvtnebf162ibs256",
+    "llvm.x86.avx10.vcvtnebf162ibs512" => "__builtin_ia32_vcvtnebf162ibs512",
+    "llvm.x86.avx10.vcvtnebf162iubs128" => "__builtin_ia32_vcvtnebf162iubs128",
+    "llvm.x86.avx10.vcvtnebf162iubs256" => "__builtin_ia32_vcvtnebf162iubs256",
+    "llvm.x86.avx10.vcvtnebf162iubs512" => "__builtin_ia32_vcvtnebf162iubs512",
+    "llvm.x86.avx10.vcvttnebf162ibs128" => "__builtin_ia32_vcvttnebf162ibs128",
+    "llvm.x86.avx10.vcvttnebf162ibs256" => "__builtin_ia32_vcvttnebf162ibs256",
+    "llvm.x86.avx10.vcvttnebf162ibs512" => "__builtin_ia32_vcvttnebf162ibs512",
+    "llvm.x86.avx10.vcvttnebf162iubs128" => "__builtin_ia32_vcvttnebf162iubs128",
+    "llvm.x86.avx10.vcvttnebf162iubs256" => "__builtin_ia32_vcvttnebf162iubs256",
+    "llvm.x86.avx10.vcvttnebf162iubs512" => "__builtin_ia32_vcvttnebf162iubs512",
+    "llvm.x86.avx10.vdivpd256" => "__builtin_ia32_vdivpd256_round",
+    "llvm.x86.avx10.vdivph256" => "__builtin_ia32_vdivph256_round",
+    "llvm.x86.avx10.vdivps256" => "__builtin_ia32_vdivps256_round",
+    "llvm.x86.avx10.vdpphps.128" => "__builtin_ia32_vdpphps128",
+    "llvm.x86.avx10.vdpphps.256" => "__builtin_ia32_vdpphps256",
+    "llvm.x86.avx10.vdpphps.512" => "__builtin_ia32_vdpphps512",
+    "llvm.x86.avx10.vfmaddsubpd256" => "__builtin_ia32_vfmaddsubpd256_round",
+    "llvm.x86.avx10.vfmaddsubph256" => "__builtin_ia32_vfmaddsubph256_round",
+    "llvm.x86.avx10.vfmaddsubps256" => "__builtin_ia32_vfmaddsubps256_round",
+    "llvm.x86.avx10.vmaxpd256" => "__builtin_ia32_vmaxpd256_round",
+    "llvm.x86.avx10.vmaxph256" => "__builtin_ia32_vmaxph256_round",
+    "llvm.x86.avx10.vmaxps256" => "__builtin_ia32_vmaxps256_round",
+    "llvm.x86.avx10.vminmaxnepbf16128" => "__builtin_ia32_vminmaxnepbf16128",
+    "llvm.x86.avx10.vminmaxnepbf16256" => "__builtin_ia32_vminmaxnepbf16256",
+    "llvm.x86.avx10.vminmaxnepbf16512" => "__builtin_ia32_vminmaxnepbf16512",
+    "llvm.x86.avx10.vminmaxpd128" => "__builtin_ia32_vminmaxpd128",
+    "llvm.x86.avx10.vminmaxpd256" => "__builtin_ia32_vminmaxpd256",
+    "llvm.x86.avx10.vminmaxph128" => "__builtin_ia32_vminmaxph128",
+    "llvm.x86.avx10.vminmaxph256" => "__builtin_ia32_vminmaxph256",
+    "llvm.x86.avx10.vminmaxps128" => "__builtin_ia32_vminmaxps128",
+    "llvm.x86.avx10.vminmaxps256" => "__builtin_ia32_vminmaxps256",
+    "llvm.x86.avx10.vminpd256" => "__builtin_ia32_vminpd256_round",
+    "llvm.x86.avx10.vminph256" => "__builtin_ia32_vminph256_round",
+    "llvm.x86.avx10.vminps256" => "__builtin_ia32_vminps256_round",
+    "llvm.x86.avx10.vmpsadbw.512" => "__builtin_ia32_mpsadbw512",
+    "llvm.x86.avx10.vmulpd256" => "__builtin_ia32_vmulpd256_round",
+    "llvm.x86.avx10.vmulph256" => "__builtin_ia32_vmulph256_round",
+    "llvm.x86.avx10.vmulps256" => "__builtin_ia32_vmulps256_round",
+    "llvm.x86.avx10.vpdpbssd.512" => "__builtin_ia32_vpdpbssd512",
+    "llvm.x86.avx10.vpdpbssds.512" => "__builtin_ia32_vpdpbssds512",
+    "llvm.x86.avx10.vpdpbsud.512" => "__builtin_ia32_vpdpbsud512",
+    "llvm.x86.avx10.vpdpbsuds.512" => "__builtin_ia32_vpdpbsuds512",
+    "llvm.x86.avx10.vpdpbuud.512" => "__builtin_ia32_vpdpbuud512",
+    "llvm.x86.avx10.vpdpbuuds.512" => "__builtin_ia32_vpdpbuuds512",
+    "llvm.x86.avx10.vpdpwsud.512" => "__builtin_ia32_vpdpwsud512",
+    "llvm.x86.avx10.vpdpwsuds.512" => "__builtin_ia32_vpdpwsuds512",
+    "llvm.x86.avx10.vpdpwusd.512" => "__builtin_ia32_vpdpwusd512",
+    "llvm.x86.avx10.vpdpwusds.512" => "__builtin_ia32_vpdpwusds512",
+    "llvm.x86.avx10.vpdpwuud.512" => "__builtin_ia32_vpdpwuud512",
+    "llvm.x86.avx10.vpdpwuuds.512" => "__builtin_ia32_vpdpwuuds512",
+    "llvm.x86.avx10.vsqrtpd256" => "__builtin_ia32_vsqrtpd256_round",
+    "llvm.x86.avx10.vsqrtph256" => "__builtin_ia32_vsqrtph256_round",
+    "llvm.x86.avx10.vsqrtps256" => "__builtin_ia32_vsqrtps256_round",
+    "llvm.x86.avx10.vsubpd256" => "__builtin_ia32_vsubpd256_round",
+    "llvm.x86.avx10.vsubph256" => "__builtin_ia32_vsubph256_round",
+    "llvm.x86.avx10.vsubps256" => "__builtin_ia32_vsubps256_round",
     "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gatherd_d",
     "llvm.x86.avx2.gather.d.d.256" => "__builtin_ia32_gatherd_d256",
     "llvm.x86.avx2.gather.d.pd" => "__builtin_ia32_gatherd_pd",
@@ -8738,10 +8933,10 @@ match name {
     "llvm.x86.avx512.rcp14.ss" => "__builtin_ia32_rcp14ss_mask",
     "llvm.x86.avx512.rcp28.pd" => "__builtin_ia32_rcp28pd_mask",
     "llvm.x86.avx512.rcp28.ps" => "__builtin_ia32_rcp28ps_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
+    "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
+    // [DUPLICATE]: "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
+    "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
+    // [DUPLICATE]: "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
     "llvm.x86.avx512.rndscale.sd" => "__builtin_ia32_rndscalesd",
     "llvm.x86.avx512.rndscale.ss" => "__builtin_ia32_rndscaless",
     "llvm.x86.avx512.rsqrt14.pd.128" => "__builtin_ia32_rsqrt14pd128_mask",
@@ -8754,10 +8949,10 @@ match name {
     "llvm.x86.avx512.rsqrt14.ss" => "__builtin_ia32_rsqrt14ss_mask",
     "llvm.x86.avx512.rsqrt28.pd" => "__builtin_ia32_rsqrt28pd_mask",
     "llvm.x86.avx512.rsqrt28.ps" => "__builtin_ia32_rsqrt28ps_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
+    "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
+    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
+    "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
+    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
     "llvm.x86.avx512.scatter.dpd.512" => "__builtin_ia32_scattersiv8df",
     "llvm.x86.avx512.scatter.dpi.512" => "__builtin_ia32_scattersiv16si",
     "llvm.x86.avx512.scatter.dpq.512" => "__builtin_ia32_scattersiv8di",
@@ -9082,75 +9277,6 @@ match name {
     "llvm.x86.lwpval64" => "__builtin_ia32_lwpval64",
     "llvm.x86.mmx.emms" => "__builtin_ia32_emms",
     "llvm.x86.mmx.femms" => "__builtin_ia32_femms",
-    "llvm.x86.mmx.maskmovq" => "__builtin_ia32_maskmovq",
-    "llvm.x86.mmx.movnt.dq" => "__builtin_ia32_movntq",
-    "llvm.x86.mmx.packssdw" => "__builtin_ia32_packssdw",
-    "llvm.x86.mmx.packsswb" => "__builtin_ia32_packsswb",
-    "llvm.x86.mmx.packuswb" => "__builtin_ia32_packuswb",
-    "llvm.x86.mmx.padd.b" => "__builtin_ia32_paddb",
-    "llvm.x86.mmx.padd.d" => "__builtin_ia32_paddd",
-    "llvm.x86.mmx.padd.q" => "__builtin_ia32_paddq",
-    "llvm.x86.mmx.padd.w" => "__builtin_ia32_paddw",
-    "llvm.x86.mmx.padds.b" => "__builtin_ia32_paddsb",
-    "llvm.x86.mmx.padds.w" => "__builtin_ia32_paddsw",
-    "llvm.x86.mmx.paddus.b" => "__builtin_ia32_paddusb",
-    "llvm.x86.mmx.paddus.w" => "__builtin_ia32_paddusw",
-    "llvm.x86.mmx.palignr.b" => "__builtin_ia32_palignr",
-    "llvm.x86.mmx.pand" => "__builtin_ia32_pand",
-    "llvm.x86.mmx.pandn" => "__builtin_ia32_pandn",
-    "llvm.x86.mmx.pavg.b" => "__builtin_ia32_pavgb",
-    "llvm.x86.mmx.pavg.w" => "__builtin_ia32_pavgw",
-    "llvm.x86.mmx.pcmpeq.b" => "__builtin_ia32_pcmpeqb",
-    "llvm.x86.mmx.pcmpeq.d" => "__builtin_ia32_pcmpeqd",
-    "llvm.x86.mmx.pcmpeq.w" => "__builtin_ia32_pcmpeqw",
-    "llvm.x86.mmx.pcmpgt.b" => "__builtin_ia32_pcmpgtb",
-    "llvm.x86.mmx.pcmpgt.d" => "__builtin_ia32_pcmpgtd",
-    "llvm.x86.mmx.pcmpgt.w" => "__builtin_ia32_pcmpgtw",
-    "llvm.x86.mmx.pextr.w" => "__builtin_ia32_vec_ext_v4hi",
-    "llvm.x86.mmx.pinsr.w" => "__builtin_ia32_vec_set_v4hi",
-    "llvm.x86.mmx.pmadd.wd" => "__builtin_ia32_pmaddwd",
-    "llvm.x86.mmx.pmaxs.w" => "__builtin_ia32_pmaxsw",
-    "llvm.x86.mmx.pmaxu.b" => "__builtin_ia32_pmaxub",
-    "llvm.x86.mmx.pmins.w" => "__builtin_ia32_pminsw",
-    "llvm.x86.mmx.pminu.b" => "__builtin_ia32_pminub",
-    "llvm.x86.mmx.pmovmskb" => "__builtin_ia32_pmovmskb",
-    "llvm.x86.mmx.pmulh.w" => "__builtin_ia32_pmulhw",
-    "llvm.x86.mmx.pmulhu.w" => "__builtin_ia32_pmulhuw",
-    "llvm.x86.mmx.pmull.w" => "__builtin_ia32_pmullw",
-    "llvm.x86.mmx.pmulu.dq" => "__builtin_ia32_pmuludq",
-    "llvm.x86.mmx.por" => "__builtin_ia32_por",
-    "llvm.x86.mmx.psad.bw" => "__builtin_ia32_psadbw",
-    "llvm.x86.mmx.psll.d" => "__builtin_ia32_pslld",
-    "llvm.x86.mmx.psll.q" => "__builtin_ia32_psllq",
-    "llvm.x86.mmx.psll.w" => "__builtin_ia32_psllw",
-    "llvm.x86.mmx.pslli.d" => "__builtin_ia32_pslldi",
-    "llvm.x86.mmx.pslli.q" => "__builtin_ia32_psllqi",
-    "llvm.x86.mmx.pslli.w" => "__builtin_ia32_psllwi",
-    "llvm.x86.mmx.psra.d" => "__builtin_ia32_psrad",
-    "llvm.x86.mmx.psra.w" => "__builtin_ia32_psraw",
-    "llvm.x86.mmx.psrai.d" => "__builtin_ia32_psradi",
-    "llvm.x86.mmx.psrai.w" => "__builtin_ia32_psrawi",
-    "llvm.x86.mmx.psrl.d" => "__builtin_ia32_psrld",
-    "llvm.x86.mmx.psrl.q" => "__builtin_ia32_psrlq",
-    "llvm.x86.mmx.psrl.w" => "__builtin_ia32_psrlw",
-    "llvm.x86.mmx.psrli.d" => "__builtin_ia32_psrldi",
-    "llvm.x86.mmx.psrli.q" => "__builtin_ia32_psrlqi",
-    "llvm.x86.mmx.psrli.w" => "__builtin_ia32_psrlwi",
-    "llvm.x86.mmx.psub.b" => "__builtin_ia32_psubb",
-    "llvm.x86.mmx.psub.d" => "__builtin_ia32_psubd",
-    "llvm.x86.mmx.psub.q" => "__builtin_ia32_psubq",
-    "llvm.x86.mmx.psub.w" => "__builtin_ia32_psubw",
-    "llvm.x86.mmx.psubs.b" => "__builtin_ia32_psubsb",
-    "llvm.x86.mmx.psubs.w" => "__builtin_ia32_psubsw",
-    "llvm.x86.mmx.psubus.b" => "__builtin_ia32_psubusb",
-    "llvm.x86.mmx.psubus.w" => "__builtin_ia32_psubusw",
-    "llvm.x86.mmx.punpckhbw" => "__builtin_ia32_punpckhbw",
-    "llvm.x86.mmx.punpckhdq" => "__builtin_ia32_punpckhdq",
-    "llvm.x86.mmx.punpckhwd" => "__builtin_ia32_punpckhwd",
-    "llvm.x86.mmx.punpcklbw" => "__builtin_ia32_punpcklbw",
-    "llvm.x86.mmx.punpckldq" => "__builtin_ia32_punpckldq",
-    "llvm.x86.mmx.punpcklwd" => "__builtin_ia32_punpcklwd",
-    "llvm.x86.mmx.pxor" => "__builtin_ia32_pxor",
     "llvm.x86.monitorx" => "__builtin_ia32_monitorx",
     "llvm.x86.movdir64b" => "__builtin_ia32_movdir64b",
     "llvm.x86.mwaitx" => "__builtin_ia32_mwaitx",
@@ -9193,16 +9319,10 @@ match name {
     "llvm.x86.sse.comile.ss" => "__builtin_ia32_comile",
     "llvm.x86.sse.comilt.ss" => "__builtin_ia32_comilt",
     "llvm.x86.sse.comineq.ss" => "__builtin_ia32_comineq",
-    "llvm.x86.sse.cvtpd2pi" => "__builtin_ia32_cvtpd2pi",
-    "llvm.x86.sse.cvtpi2pd" => "__builtin_ia32_cvtpi2pd",
-    "llvm.x86.sse.cvtpi2ps" => "__builtin_ia32_cvtpi2ps",
-    "llvm.x86.sse.cvtps2pi" => "__builtin_ia32_cvtps2pi",
     "llvm.x86.sse.cvtsi2ss" => "__builtin_ia32_cvtsi2ss",
     "llvm.x86.sse.cvtsi642ss" => "__builtin_ia32_cvtsi642ss",
     "llvm.x86.sse.cvtss2si" => "__builtin_ia32_cvtss2si",
     "llvm.x86.sse.cvtss2si64" => "__builtin_ia32_cvtss2si64",
-    "llvm.x86.sse.cvttpd2pi" => "__builtin_ia32_cvttpd2pi",
-    "llvm.x86.sse.cvttps2pi" => "__builtin_ia32_cvttps2pi",
     "llvm.x86.sse.cvttss2si" => "__builtin_ia32_cvttss2si",
     "llvm.x86.sse.cvttss2si64" => "__builtin_ia32_cvttss2si64",
     "llvm.x86.sse.div.ss" => "__builtin_ia32_divss",
@@ -9212,7 +9332,6 @@ match name {
     "llvm.x86.sse.min.ss" => "__builtin_ia32_minss",
     "llvm.x86.sse.movmsk.ps" => "__builtin_ia32_movmskps",
     "llvm.x86.sse.mul.ss" => "__builtin_ia32_mulss",
-    "llvm.x86.sse.pshuf.w" => "__builtin_ia32_pshufw",
     "llvm.x86.sse.rcp.ps" => "__builtin_ia32_rcpps",
     "llvm.x86.sse.rcp.ss" => "__builtin_ia32_rcpss",
     "llvm.x86.sse.rsqrt.ps" => "__builtin_ia32_rsqrtps",
@@ -9398,35 +9517,20 @@ match name {
     "llvm.x86.sse4a.insertqi" => "__builtin_ia32_insertqi",
     "llvm.x86.sse4a.movnt.sd" => "__builtin_ia32_movntsd",
     "llvm.x86.sse4a.movnt.ss" => "__builtin_ia32_movntss",
-    "llvm.x86.ssse3.pabs.b" => "__builtin_ia32_pabsb",
     "llvm.x86.ssse3.pabs.b.128" => "__builtin_ia32_pabsb128",
-    "llvm.x86.ssse3.pabs.d" => "__builtin_ia32_pabsd",
     "llvm.x86.ssse3.pabs.d.128" => "__builtin_ia32_pabsd128",
-    "llvm.x86.ssse3.pabs.w" => "__builtin_ia32_pabsw",
     "llvm.x86.ssse3.pabs.w.128" => "__builtin_ia32_pabsw128",
-    "llvm.x86.ssse3.phadd.d" => "__builtin_ia32_phaddd",
     "llvm.x86.ssse3.phadd.d.128" => "__builtin_ia32_phaddd128",
-    "llvm.x86.ssse3.phadd.sw" => "__builtin_ia32_phaddsw",
     "llvm.x86.ssse3.phadd.sw.128" => "__builtin_ia32_phaddsw128",
-    "llvm.x86.ssse3.phadd.w" => "__builtin_ia32_phaddw",
     "llvm.x86.ssse3.phadd.w.128" => "__builtin_ia32_phaddw128",
-    "llvm.x86.ssse3.phsub.d" => "__builtin_ia32_phsubd",
     "llvm.x86.ssse3.phsub.d.128" => "__builtin_ia32_phsubd128",
-    "llvm.x86.ssse3.phsub.sw" => "__builtin_ia32_phsubsw",
     "llvm.x86.ssse3.phsub.sw.128" => "__builtin_ia32_phsubsw128",
-    "llvm.x86.ssse3.phsub.w" => "__builtin_ia32_phsubw",
     "llvm.x86.ssse3.phsub.w.128" => "__builtin_ia32_phsubw128",
-    "llvm.x86.ssse3.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw",
     "llvm.x86.ssse3.pmadd.ub.sw.128" => "__builtin_ia32_pmaddubsw128",
-    "llvm.x86.ssse3.pmul.hr.sw" => "__builtin_ia32_pmulhrsw",
     "llvm.x86.ssse3.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128",
-    "llvm.x86.ssse3.pshuf.b" => "__builtin_ia32_pshufb",
     "llvm.x86.ssse3.pshuf.b.128" => "__builtin_ia32_pshufb128",
-    "llvm.x86.ssse3.psign.b" => "__builtin_ia32_psignb",
     "llvm.x86.ssse3.psign.b.128" => "__builtin_ia32_psignb128",
-    "llvm.x86.ssse3.psign.d" => "__builtin_ia32_psignd",
     "llvm.x86.ssse3.psign.d.128" => "__builtin_ia32_psignd128",
-    "llvm.x86.ssse3.psign.w" => "__builtin_ia32_psignw",
     "llvm.x86.ssse3.psign.w.128" => "__builtin_ia32_psignw128",
     "llvm.x86.sttilecfg" => "__builtin_ia32_tile_storeconfig",
     "llvm.x86.stui" => "__builtin_ia32_stui",

From 2e7d2562805b79647d192a1511f2d616607c565a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 3 Sep 2024 16:25:28 -0400
Subject: [PATCH 734/997] Add more SIMD intrinsics

---
 src/intrinsic/llvm.rs | 21 +++++++++++++++++++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 3b9855ddc189..2d7bb8a2d548 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -185,7 +185,10 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             | "__builtin_ia32_vplzcntq_128_mask"
             | "__builtin_ia32_cvtqq2pd128_mask"
             | "__builtin_ia32_cvtqq2pd256_mask"
-            | "__builtin_ia32_cvtqq2ps256_mask" => {
+            | "__builtin_ia32_cvtqq2ps256_mask"
+            | "__builtin_ia32_cvtuqq2pd128_mask"
+            | "__builtin_ia32_cvtuqq2pd256_mask"
+            | "__builtin_ia32_cvtuqq2ps256_mask" => {
                 let mut new_args = args.to_vec();
                 // Remove last arg as it doesn't seem to be used in GCC and is always false.
                 new_args.pop();
@@ -381,7 +384,8 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 );
                 args = vec![arg.get_address(None)].into();
             }
-            "__builtin_ia32_cvtqq2pd512_mask" | "__builtin_ia32_cvtqq2ps512_mask" => {
+            "__builtin_ia32_cvtqq2pd512_mask" | "__builtin_ia32_cvtqq2ps512_mask" | "__builtin_ia32_cvtuqq2pd512_mask" |
+                "__builtin_ia32_cvtuqq2ps512_mask" => {
                 let mut old_args = args.to_vec();
                 let mut new_args = vec![];
                 new_args.push(old_args.swap_remove(0));
@@ -493,6 +497,11 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 let new_args = args.to_vec();
                 args = vec![new_args[1], new_args[0], new_args[2]].into();
             }
+            "__builtin_ia32_rangesd128_mask_round" | "__builtin_ia32_rangess128_mask_round"
+                | "__builtin_ia32_reducesd_mask_round" => {
+                let new_args = args.to_vec();
+                args = vec![new_args[0], new_args[1], new_args[4], new_args[2], new_args[3], new_args[5]].into();
+            }
             _ => (),
         }
     }
@@ -1031,6 +1040,14 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.sitofp.round.v4f64.v4i64" => "__builtin_ia32_cvtqq2pd256_mask",
         "llvm.x86.avx512.sitofp.round.v8f32.v8i64" => "__builtin_ia32_cvtqq2ps512_mask",
         "llvm.x86.avx512.sitofp.round.v4f32.v4i64" => "__builtin_ia32_cvtqq2ps256_mask",
+        "llvm.x86.avx512.uitofp.round.v8f64.v8u64" => "__builtin_ia32_cvtuqq2pd512_mask",
+        "llvm.x86.avx512.uitofp.round.v2f64.v2u64" => "__builtin_ia32_cvtuqq2pd128_mask",
+        "llvm.x86.avx512.uitofp.round.v4f64.v4u64" => "__builtin_ia32_cvtuqq2pd256_mask",
+        "llvm.x86.avx512.uitofp.round.v8f32.v8u64" => "__builtin_ia32_cvtuqq2ps512_mask",
+        "llvm.x86.avx512.uitofp.round.v4f32.v4u64" => "__builtin_ia32_cvtuqq2ps256_mask",
+        "llvm.x86.avx512.mask.reduce.pd.512" => "__builtin_ia32_reducepd512_mask_round",
+        "llvm.x86.avx512.mask.reduce.ps.512" => "__builtin_ia32_reduceps512_mask_round",
+        "llvm.x86.avx512.mask.reduce.sd" => "__builtin_ia32_reducesd_mask_round",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),

From 139eea948d2f4d6f816f1ac548527566814b37de Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 4 Sep 2024 00:34:34 +0200
Subject: [PATCH 735/997] fmt

---
 src/intrinsic/llvm.rs | 21 ++++++++++++++++-----
 1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 2d7bb8a2d548..981603747c54 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -384,8 +384,10 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 );
                 args = vec![arg.get_address(None)].into();
             }
-            "__builtin_ia32_cvtqq2pd512_mask" | "__builtin_ia32_cvtqq2ps512_mask" | "__builtin_ia32_cvtuqq2pd512_mask" |
-                "__builtin_ia32_cvtuqq2ps512_mask" => {
+            "__builtin_ia32_cvtqq2pd512_mask"
+            | "__builtin_ia32_cvtqq2ps512_mask"
+            | "__builtin_ia32_cvtuqq2pd512_mask"
+            | "__builtin_ia32_cvtuqq2ps512_mask" => {
                 let mut old_args = args.to_vec();
                 let mut new_args = vec![];
                 new_args.push(old_args.swap_remove(0));
@@ -497,10 +499,19 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 let new_args = args.to_vec();
                 args = vec![new_args[1], new_args[0], new_args[2]].into();
             }
-            "__builtin_ia32_rangesd128_mask_round" | "__builtin_ia32_rangess128_mask_round"
-                | "__builtin_ia32_reducesd_mask_round" => {
+            "__builtin_ia32_rangesd128_mask_round"
+            | "__builtin_ia32_rangess128_mask_round"
+            | "__builtin_ia32_reducesd_mask_round" => {
                 let new_args = args.to_vec();
-                args = vec![new_args[0], new_args[1], new_args[4], new_args[2], new_args[3], new_args[5]].into();
+                args = vec![
+                    new_args[0],
+                    new_args[1],
+                    new_args[4],
+                    new_args[2],
+                    new_args[3],
+                    new_args[5],
+                ]
+                .into();
             }
             _ => (),
         }

From 244ac087349bd57a626202ce37a82f90a94d4037 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 4 Sep 2024 00:35:04 +0200
Subject: [PATCH 736/997] Add missing intrinsic translation for
 `llvm.x86.xrstor64`

---
 src/intrinsic/llvm.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 981603747c54..d3e50afe53b2 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -821,6 +821,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.mask.cmp.b.256" => "__builtin_ia32_cmpb256_mask",
         "llvm.x86.avx512.mask.cmp.b.128" => "__builtin_ia32_cmpb128_mask",
         "llvm.x86.xrstor" => "__builtin_ia32_xrstor",
+        "llvm.x86.xrstor64" => "__builtin_ia32_xrstor64",
         "llvm.x86.xsavec" => "__builtin_ia32_xsavec",
         "llvm.x86.xsave64" => "__builtin_ia32_xsave64",
         "llvm.x86.addcarry.32" => "__builtin_ia32_addcarryx_u32",

From 39e191077bb075a1b4f6facc9b75e5270cb507e4 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 4 Sep 2024 00:42:12 +0200
Subject: [PATCH 737/997] Add missing intrinsic translation for
 `llvm.x86.xsaveopt64`

---
 src/intrinsic/llvm.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index d3e50afe53b2..286aa6dab75c 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1029,6 +1029,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.vpdpbusds.128" => "__builtin_ia32_vpdpbusds_v4si",
         "llvm.x86.xsave" => "__builtin_ia32_xsave",
         "llvm.x86.xsaveopt" => "__builtin_ia32_xsaveopt",
+        "llvm.x86.xsaveopt64" => "__builtin_ia32_xsaveopt64",
         "llvm.x86.avx512.mask.loadu.w.512" => "__builtin_ia32_loaddquhi512_mask",
         "llvm.x86.avx512.mask.loadu.b.512" => "__builtin_ia32_loaddquqi512_mask",
         "llvm.x86.avx512.mask.loadu.w.256" => "__builtin_ia32_loaddquhi256_mask",

From 623dc09fa3a1d12f5a83ed763f4defa1c7e84c67 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 3 Sep 2024 21:09:49 -0400
Subject: [PATCH 738/997] Add support for more SIMD intrinsics

---
 src/intrinsic/llvm.rs | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 286aa6dab75c..ba57e425b0fc 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -501,7 +501,8 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             }
             "__builtin_ia32_rangesd128_mask_round"
             | "__builtin_ia32_rangess128_mask_round"
-            | "__builtin_ia32_reducesd_mask_round" => {
+            | "__builtin_ia32_reducesd_mask_round"
+            | "__builtin_ia32_reducess_mask_round" => {
                 let new_args = args.to_vec();
                 args = vec![
                     new_args[0],
@@ -1061,6 +1062,21 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.mask.reduce.pd.512" => "__builtin_ia32_reducepd512_mask_round",
         "llvm.x86.avx512.mask.reduce.ps.512" => "__builtin_ia32_reduceps512_mask_round",
         "llvm.x86.avx512.mask.reduce.sd" => "__builtin_ia32_reducesd_mask_round",
+        "llvm.x86.avx512.mask.reduce.ss" => "__builtin_ia32_reducess_mask_round",
+        "llvm.x86.avx512.mask.loadu.d.256" => "__builtin_ia32_loaddqusi256_mask",
+        "llvm.x86.avx512.mask.loadu.q.256" => "__builtin_ia32_loaddqudi256_mask",
+        "llvm.x86.avx512.mask.loadu.ps.256" => "__builtin_ia32_loadups256_mask",
+        "llvm.x86.avx512.mask.loadu.pd.256" => "__builtin_ia32_loadupd256_mask",
+        "llvm.x86.avx512.mask.loadu.d.128" => "__builtin_ia32_loaddqusi128_mask",
+        "llvm.x86.avx512.mask.loadu.q.128" => "__builtin_ia32_loaddqudi128_mask",
+        "llvm.x86.avx512.mask.loadu.ps.128" => "__builtin_ia32_loadups128_mask",
+        "llvm.x86.avx512.mask.loadu.pd.128" => "__builtin_ia32_loadupd128_mask",
+        "llvm.x86.avx512.mask.load.d.512" => "__builtin_ia32_movdqa32load512_mask",
+        "llvm.x86.avx512.mask.load.q.512" => "__builtin_ia32_movdqa64load512_mask",
+        "llvm.x86.avx512.mask.load.ps.512" => "__builtin_ia32_loadaps512_mask",
+        "llvm.x86.avx512.mask.load.pd.512" => "__builtin_ia32_loadapd512_mask",
+        "llvm.x86.avx512.mask.load.d.256" => "__builtin_ia32_movdqa32load256_mask",
+        "llvm.x86.avx512.mask.load.q.256" => "__builtin_ia32_movdqa64load256_mask",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),

From c207badc2dd6abb1f416c4e09968184a69ff0484 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 4 Sep 2024 15:19:29 +0200
Subject: [PATCH 739/997] Add missing intrinsics translation for
 `llvm.x86.xsavec64` and fix more intrinsic calls

---
 src/intrinsic/llvm.rs | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index ba57e425b0fc..89d5d582e4c7 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -361,7 +361,14 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
                 args = vec![new_args[1], new_args[0], new_args[2], minus_one].into();
             }
-            "__builtin_ia32_xrstor" | "__builtin_ia32_xsavec" => {
+            "__builtin_ia32_xrstor"
+            | "__builtin_ia32_xrstor64"
+            | "__builtin_ia32_xsavec"
+            | "__builtin_ia32_xsavec64"
+            | "__builtin_ia32_xsave"
+            | "__builtin_ia32_xsave64"
+            | "__builtin_ia32_xsaveopt"
+            | "__builtin_ia32_xsaveopt64" => {
                 let new_args = args.to_vec();
                 let thirty_two = builder.context.new_rvalue_from_int(new_args[1].get_type(), 32);
                 let arg2 = new_args[1] << thirty_two | new_args[2];
@@ -824,7 +831,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.xrstor" => "__builtin_ia32_xrstor",
         "llvm.x86.xrstor64" => "__builtin_ia32_xrstor64",
         "llvm.x86.xsavec" => "__builtin_ia32_xsavec",
-        "llvm.x86.xsave64" => "__builtin_ia32_xsave64",
+        "llvm.x86.xsavec64" => "__builtin_ia32_xsavec64",
         "llvm.x86.addcarry.32" => "__builtin_ia32_addcarryx_u32",
         "llvm.x86.subborrow.32" => "__builtin_ia32_sbb_u32",
         "llvm.x86.avx512.mask.compress.store.w.512" => "__builtin_ia32_compressstoreuhi512_mask",
@@ -1029,6 +1036,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.vpdpbusds.256" => "__builtin_ia32_vpdpbusds_v8si",
         "llvm.x86.avx512.vpdpbusds.128" => "__builtin_ia32_vpdpbusds_v4si",
         "llvm.x86.xsave" => "__builtin_ia32_xsave",
+        "llvm.x86.xsave64" => "__builtin_ia32_xsave64",
         "llvm.x86.xsaveopt" => "__builtin_ia32_xsaveopt",
         "llvm.x86.xsaveopt64" => "__builtin_ia32_xsaveopt64",
         "llvm.x86.avx512.mask.loadu.w.512" => "__builtin_ia32_loaddquhi512_mask",

From cb0b5199ffbeec62ff622349c3bc15d9b9772a50 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 5 Sep 2024 21:28:04 -0400
Subject: [PATCH 740/997] Add more SIMD intrinsics

---
 src/intrinsic/llvm.rs | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 89d5d582e4c7..e57dc1cc75f6 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -13,6 +13,11 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
     func_name: &str,
     original_function_name: Option<&String>,
 ) -> Cow<'b, [RValue<'gcc>]> {
+    // TODO: this might not be a good way to workaround the missing tile builtins.
+    if func_name == "__builtin_trap" {
+        return vec![].into();
+    }
+
     // Some LLVM intrinsics do not map 1-to-1 to GCC intrinsics, so we add the missing
     // arguments here.
     if gcc_func.get_param_count() != args.len() {
@@ -287,7 +292,9 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 new_args.push(last_arg);
                 args = new_args.into();
             }
-            "__builtin_ia32_vfmaddsubps512_mask" | "__builtin_ia32_vfmaddsubpd512_mask" => {
+            "__builtin_ia32_vfmaddsubps512_mask"
+            | "__builtin_ia32_vfmaddsubpd512_mask"
+            | "__builtin_ia32_cmpsh_mask_round" => {
                 let mut new_args = args.to_vec();
                 let last_arg = new_args.pop().expect("last arg");
                 let arg4_type = gcc_func.get_param_type(3);
@@ -1085,6 +1092,17 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.mask.load.pd.512" => "__builtin_ia32_loadapd512_mask",
         "llvm.x86.avx512.mask.load.d.256" => "__builtin_ia32_movdqa32load256_mask",
         "llvm.x86.avx512.mask.load.q.256" => "__builtin_ia32_movdqa64load256_mask",
+        "llvm.x86.avx512fp16.mask.cmp.sh" => "__builtin_ia32_cmpsh_mask_round",
+        "llvm.x86.avx512fp16.vcomi.sh" => "__builtin_ia32_cmpsh_mask_round",
+        // TODO: support the tile builtins:
+        "llvm.x86.ldtilecfg" => "__builtin_trap",
+        "llvm.x86.sttilecfg" => "__builtin_trap",
+        "llvm.x86.tileloadd64" => "__builtin_trap",
+        "llvm.x86.tilerelease" => "__builtin_trap",
+        "llvm.x86.tilestored64" => "__builtin_trap",
+        "llvm.x86.tileloaddt164" => "__builtin_trap",
+        "llvm.x86.tilezero" => "__builtin_trap",
+        "llvm.x86.tdpbf16ps" => "__builtin_trap",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),

From 62f44d7f20cf939ae0bd487d2e70ac1411e9db88 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 6 Sep 2024 12:27:20 -0400
Subject: [PATCH 741/997] Add more SIMD intrinsics

---
 src/intrinsic/llvm.rs | 45 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index e57dc1cc75f6..1a3385a97be8 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -418,6 +418,27 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 new_args.push(old_args.swap_remove(0));
                 args = new_args.into();
             }
+            "__builtin_ia32_addph512_mask_round"
+            | "__builtin_ia32_subph512_mask_round"
+            | "__builtin_ia32_mulph512_mask_round"
+            | "__builtin_ia32_divph512_mask_round" => {
+                let mut new_args = args.to_vec();
+                let last_arg = new_args.pop().expect("last arg");
+
+                let arg3_type = gcc_func.get_param_type(2);
+                let vector_type = arg3_type.dyncast_vector().expect("vector type");
+                let zero = builder.context.new_rvalue_zero(vector_type.get_element_type());
+                let num_units = vector_type.get_num_units();
+                let first_arg =
+                    builder.context.new_rvalue_from_vector(None, arg3_type, &vec![zero; num_units]);
+                new_args.push(first_arg);
+
+                let arg4_type = gcc_func.get_param_type(3);
+                let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
+                new_args.push(minus_one);
+                new_args.push(last_arg);
+                args = new_args.into();
+            }
             _ => (),
         }
     } else {
@@ -1094,6 +1115,23 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.mask.load.q.256" => "__builtin_ia32_movdqa64load256_mask",
         "llvm.x86.avx512fp16.mask.cmp.sh" => "__builtin_ia32_cmpsh_mask_round",
         "llvm.x86.avx512fp16.vcomi.sh" => "__builtin_ia32_cmpsh_mask_round",
+        "llvm.x86.avx512fp16.add.ph.512" => "__builtin_ia32_addph512_mask_round",
+        "llvm.x86.avx512fp16.sub.ph.512" => "__builtin_ia32_subph512_mask_round",
+        "llvm.x86.avx512fp16.mul.ph.512" => "__builtin_ia32_mulph512_mask_round",
+        "llvm.x86.avx512fp16.div.ph.512" => "__builtin_ia32_divph512_mask_round",
+        "llvm.x86.avx512fp16.mask.vfmul.cph.512" => "__builtin_ia32_vfmulcph512_mask_round",
+        "llvm.x86.avx512fp16.mask.vfmul.csh" => "__builtin_ia32_vfmulcsh_mask_round",
+        "llvm.x86.avx512fp16.mask.vfcmul.cph.512" => "__builtin_ia32_vfcmulcph512_mask_round",
+        "llvm.x86.avx512fp16.mask.vfcmul.csh" => "__builtin_ia32_vfcmulcsh_mask_round",
+        "llvm.x86.avx512fp16.mask.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_mask3_round",
+        "llvm.x86.avx512fp16.maskz.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_maskz_round",
+        "llvm.x86.avx512fp16.mask.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_mask3_round",
+        "llvm.x86.avx512fp16.maskz.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_maskz_round",
+        "llvm.x86.avx512fp16.mask.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_mask3_round",
+        "llvm.x86.avx512fp16.maskz.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_maskz_round",
+        "llvm.x86.avx512fp16.mask.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_mask_round",
+        "llvm.x86.avx512fp16.maskz.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_maskz_round",
+
         // TODO: support the tile builtins:
         "llvm.x86.ldtilecfg" => "__builtin_trap",
         "llvm.x86.sttilecfg" => "__builtin_trap",
@@ -1103,6 +1141,13 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.tileloaddt164" => "__builtin_trap",
         "llvm.x86.tilezero" => "__builtin_trap",
         "llvm.x86.tdpbf16ps" => "__builtin_trap",
+        "llvm.x86.tdpbssd" => "__builtin_trap",
+        "llvm.x86.tdpbsud" => "__builtin_trap",
+        "llvm.x86.tdpbusd" => "__builtin_trap",
+        "llvm.x86.tdpbuud" => "__builtin_trap",
+        "llvm.x86.tdpfp16ps" => "__builtin_trap",
+        "llvm.x86.tcmmimfp16ps" => "__builtin_trap",
+        "llvm.x86.tcmmrlfp16ps" => "__builtin_trap",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
         _ => include!("archs.rs"),

From bcc5a1c77e7453445040184b8879e9fb49f9adb0 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 6 Sep 2024 13:16:57 -0400
Subject: [PATCH 742/997] Update libgccjit version

---
 libgccjit.version | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libgccjit.version b/libgccjit.version
index fa2bacc2c8e7..e5f51a197a44 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-bcafd46296f7898dac02d127e441b1d838ef2afc
+a0cb76246d8d00ed9847d9874e5d5658049c332d

From 42d03f6633e3ebc939d3d04d7605301f99d22a54 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 7 Sep 2024 20:02:24 -0400
Subject: [PATCH 743/997] Add support for more SIMD intrinsics

---
 build_system/src/build.rs |  1 +
 src/intrinsic/simd.rs     | 32 ++++++++++++++++++++++----------
 2 files changed, 23 insertions(+), 10 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index d96683afa359..d5d099fb14cf 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -136,6 +136,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         &"build",
         &"--target",
         &config.target,
+        // TODO: remove this feature?
         &"--features",
         &"std/compiler-builtins-no-f16-f128",
     ];
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index a0d8ff6346f3..79b345982c6e 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -739,11 +739,12 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                 return Err(());
             }};
         }
-        let (elem_ty_str, elem_ty) = if let ty::Float(ref f) = *in_elem.kind() {
+        let (elem_ty_str, elem_ty, cast_type) = if let ty::Float(ref f) = *in_elem.kind() {
             let elem_ty = bx.cx.type_float_from_ty(*f);
             match f.bit_width() {
-                32 => ("f", elem_ty),
-                64 => ("", elem_ty),
+                16 => ("", elem_ty, Some(bx.cx.double_type)),
+                32 => ("f", elem_ty, None),
+                64 => ("", elem_ty, None),
                 _ => {
                     return_error!(InvalidMonomorphization::FloatingPointVector {
                         span,
@@ -787,17 +788,28 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         for i in 0..in_len {
             let index = bx.context.new_rvalue_from_long(bx.ulong_type, i as i64);
             // we have to treat fpowi specially, since fpowi's second argument is always an i32
-            let arguments = if name == sym::simd_fpowi {
-                vec![
+            let mut arguments = vec![];
+            if name == sym::simd_fpowi {
+                arguments = vec![
                     bx.extract_element(args[0].immediate(), index).to_rvalue(),
                     args[1].immediate(),
-                ]
+                ];
             } else {
-                args.iter()
-                    .map(|arg| bx.extract_element(arg.immediate(), index).to_rvalue())
-                    .collect()
+                for arg in args {
+                    let mut element = bx.extract_element(arg.immediate(), index).to_rvalue();
+                    // FIXME: it would probably be better to not have casts here and use the proper
+                    // instructions.
+                    if let Some(typ) = cast_type {
+                        element = bx.context.new_cast(None, element, typ);
+                    }
+                    arguments.push(element);
+                }
             };
-            vector_elements.push(bx.context.new_call(None, function, &arguments));
+            let mut result = bx.context.new_call(None, function, &arguments);
+            if cast_type.is_some() {
+                result = bx.context.new_cast(None, result, elem_ty);
+            }
+            vector_elements.push(result);
         }
         let c = bx.context.new_rvalue_from_vector(None, vec_ty, &vector_elements);
         Ok(c)

From 93b94c240ee7ed3d597e237c30ffc54a784752c0 Mon Sep 17 00:00:00 2001
From: Trivikram Kamat <16024985+trivikr@users.noreply.github.com>
Date: Sun, 8 Sep 2024 17:05:42 -0700
Subject: [PATCH 744/997] ci: bump actions/checkout to v4

---
 .github/workflows/ci.yml       | 6 +++---
 .github/workflows/failures.yml | 2 +-
 .github/workflows/gcc12.yml    | 2 +-
 .github/workflows/m68k.yml     | 2 +-
 .github/workflows/release.yml  | 2 +-
 .github/workflows/stdarch.yml  | 2 +-
 6 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index cd366dbae160..704d7b9c2fd6 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -36,7 +36,7 @@ jobs:
         ]
 
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
 
     # `rustup show` installs from rust-toolchain.toml
     - name: Setup rust toolchain
@@ -113,13 +113,13 @@ jobs:
   duplicates:
     runs-on: ubuntu-latest
     steps:
-      - uses: actions/checkout@v3
+      - uses: actions/checkout@v4
       - run: python tools/check_intrinsics_duplicates.py
 
   build_system:
     runs-on: ubuntu-latest
     steps:
-      - uses: actions/checkout@v3
+      - uses: actions/checkout@v4
       - name: Test build system
         run: |
           cd build_system
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index e5d94767fe7d..2c1ed9ad4294 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -31,7 +31,7 @@ jobs:
             env_extra: "TEST_FLAGS='-Cpanic=abort -Zpanic-abort-tests' GCC_EXEC_PREFIX=/usr/lib/gcc/"
 
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
 
     # `rustup show` installs from rust-toolchain.toml
     - name: Setup rust toolchain
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index 5977ed33c56e..7dcad21a02e1 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -33,7 +33,7 @@ jobs:
         ]
 
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
 
     # `rustup show` installs from rust-toolchain.toml
     - name: Setup rust toolchain
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 34e4f2b0d412..400eb7574057 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -36,7 +36,7 @@ jobs:
         ]
 
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
 
     # `rustup show` installs from rust-toolchain.toml
     - name: Setup rust toolchain
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index d5242926eb4d..d5c06a836db9 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -24,7 +24,7 @@ jobs:
         ]
 
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
 
     # `rustup show` installs from rust-toolchain.toml
     - name: Setup rust toolchain
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index e24b25b73690..33095bdb5f78 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -24,7 +24,7 @@ jobs:
         ]
 
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
 
     # `rustup show` installs from rust-toolchain.toml
     - name: Setup rust toolchain

From 2c93ffb30f9e4804cefa79993875cb0656fb1150 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 11 Sep 2024 13:47:41 -0400
Subject: [PATCH 745/997] Add SIMD intrinsic

---
 src/intrinsic/llvm.rs | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 1a3385a97be8..e0abf0ec021a 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -294,7 +294,8 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             }
             "__builtin_ia32_vfmaddsubps512_mask"
             | "__builtin_ia32_vfmaddsubpd512_mask"
-            | "__builtin_ia32_cmpsh_mask_round" => {
+            | "__builtin_ia32_cmpsh_mask_round"
+            | "__builtin_ia32_vfmaddph512_mask" => {
                 let mut new_args = args.to_vec();
                 let last_arg = new_args.pop().expect("last arg");
                 let arg4_type = gcc_func.get_param_type(3);
@@ -1131,6 +1132,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512fp16.maskz.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_maskz_round",
         "llvm.x86.avx512fp16.mask.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_mask_round",
         "llvm.x86.avx512fp16.maskz.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_maskz_round",
+        "llvm.x86.avx512fp16.vfmadd.ph.512" => "__builtin_ia32_vfmaddph512_mask",
 
         // TODO: support the tile builtins:
         "llvm.x86.ldtilecfg" => "__builtin_trap",

From 17f3dbf656660497e3c7705596342b087156c0a2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 11 Sep 2024 15:59:02 -0400
Subject: [PATCH 746/997] Add more SIMD intrinsics

---
 src/intrinsic/llvm.rs | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index e0abf0ec021a..52e5efd6d16e 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1133,6 +1133,38 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512fp16.mask.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_mask_round",
         "llvm.x86.avx512fp16.maskz.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_maskz_round",
         "llvm.x86.avx512fp16.vfmadd.ph.512" => "__builtin_ia32_vfmaddph512_mask",
+        "llvm.x86.avx512fp16.vcvtsi642sh" => "__builtin_ia32_vcvtsi2sh64_round",
+        "llvm.x86.avx512fp16.vcvtusi642sh" => "__builtin_ia32_vcvtusi2sh64_round",
+        "llvm.x86.avx512fp16.vcvtsh2si64" => "__builtin_ia32_vcvtsh2si64_round",
+        "llvm.x86.avx512fp16.vcvtsh2usi64" => "__builtin_ia32_vcvtsh2usi64_round",
+        "llvm.x86.avx512fp16.vcvttsh2si64" => "__builtin_ia32_vcvttsh2si64_round",
+        "llvm.x86.avx512fp16.vcvttsh2usi64" => "__builtin_ia32_vcvttsh2usi64_round",
+        "llvm.x86.avx512.mask.load.ps.256" => "__builtin_ia32_loadaps256_mask",
+        "llvm.x86.avx512.mask.load.pd.256" => "__builtin_ia32_loadapd256_mask",
+        "llvm.x86.avx512.mask.load.d.128" => "__builtin_ia32_movdqa32load128_mask",
+        "llvm.x86.avx512.mask.load.q.128" => "__builtin_ia32_movdqa64load128_mask",
+        "llvm.x86.avx512.mask.load.ps.128" => "__builtin_ia32_movdqa64load128_mask",
+        "llvm.x86.avx512.mask.load.pd.128" => "__builtin_ia32_loadapd128_mask",
+        "llvm.x86.avx512.mask.storeu.d.256" => "__builtin_ia32_storedqusi256_mask",
+        "llvm.x86.avx512.mask.storeu.q.256" => "__builtin_ia32_storedqudi256_mask",
+        "llvm.x86.avx512.mask.storeu.ps.256" => "__builtin_ia32_storeups256_mask",
+        "llvm.x86.avx512.mask.storeu.pd.256" => "__builtin_ia32_storeupd256_mask",
+        "llvm.x86.avx512.mask.storeu.d.128" => "__builtin_ia32_storedqusi128_mask",
+        "llvm.x86.avx512.mask.storeu.q.128" => "__builtin_ia32_storedqudi128_mask",
+        "llvm.x86.avx512.mask.storeu.ps.128" => "__builtin_ia32_storeups128_mask",
+        "llvm.x86.avx512.mask.storeu.pd.128" => "__builtin_ia32_storeupd128_mask",
+        "llvm.x86.avx512.mask.store.d.512" => "__builtin_ia32_movdqa32store512_mask",
+        "llvm.x86.avx512.mask.store.q.512" => "__builtin_ia32_movdqa64store512_mask",
+        "llvm.x86.avx512.mask.store.ps.512" => "__builtin_ia32_storeaps512_mask",
+        "llvm.x86.avx512.mask.store.pd.512" => "__builtin_ia32_storeapd512_mask",
+        "llvm.x86.avx512.mask.store.d.256" => "__builtin_ia32_movdqa32store256_mask",
+        "llvm.x86.avx512.mask.store.q.256" => "__builtin_ia32_movdqa64store256_mask",
+        "llvm.x86.avx512.mask.store.ps.256" => "__builtin_ia32_storeaps256_mask",
+        "llvm.x86.avx512.mask.store.pd.256" => "__builtin_ia32_storeapd256_mask",
+        "llvm.x86.avx512.mask.store.d.128" => "__builtin_ia32_movdqa32store128_mask",
+        "llvm.x86.avx512.mask.store.q.128" => "__builtin_ia32_movdqa64store128_mask",
+        "llvm.x86.avx512.mask.store.ps.128" => "__builtin_ia32_storeaps128_mask",
+        "llvm.x86.avx512.mask.store.pd.128" => "__builtin_ia32_storeapd128_mask",
 
         // TODO: support the tile builtins:
         "llvm.x86.ldtilecfg" => "__builtin_trap",

From cb36d78d7ba5ddd1b148db955121f43aad9f5db4 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 15 Sep 2024 17:24:37 -0400
Subject: [PATCH 747/997] Add more SIMD intrinsics

---
 src/base.rs           |  5 +++++
 src/builder.rs        |  3 +++
 src/declare.rs        | 18 +++++++++++++++-
 src/intrinsic/llvm.rs | 50 ++++++++++++++++++++++++++++++++++++++++---
 4 files changed, 72 insertions(+), 4 deletions(-)

diff --git a/src/base.rs b/src/base.rs
index 2eaab3ed00c8..d76011da9807 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -116,6 +116,10 @@ pub fn compile_codegen_unit(
             context.add_command_line_option("-mavx");
         }
 
+        /*for feature in tcx.sess.opts.cg.target_feature.split(',') {
+            println!("Feature: {}", feature);
+        }*/
+
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
         }
@@ -218,6 +222,7 @@ pub fn compile_codegen_unit(
 
             // ... and now that we have everything pre-defined, fill out those definitions.
             for &(mono_item, _) in &mono_items {
+                //println!("{:?}", mono_item);
                 mono_item.define::<Builder<'_, '_, '_>>(&cx);
             }
 
diff --git a/src/builder.rs b/src/builder.rs
index 7ab9dfee46a3..f07c5a53f683 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -270,6 +270,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                             actual_val.dereference(self.location).to_rvalue()
                         }
                     } else {
+                        // FIXME: this condition seems wrong: it will pass when both types are not
+                        // a vector.
                         assert!(
                             (!expected_ty.is_vector() || actual_ty.is_vector())
                                 && (expected_ty.is_vector() || !actual_ty.is_vector()),
@@ -283,6 +285,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                         );
                         // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
                         // TODO: remove bitcast now that vector types can be compared?
+                        println!("Name: {}", func_name);
                         self.bitcast(actual_val, expected_ty)
                     }
                 } else {
diff --git a/src/declare.rs b/src/declare.rs
index a2b158ee0a7e..cbf82918a9c4 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -168,7 +168,23 @@ fn declare_raw_fn<'gcc>(
     variadic: bool,
 ) -> Function<'gcc> {
     if name.starts_with("llvm.") {
-        let intrinsic = llvm::intrinsic(name, cx);
+        let intrinsic = match name {
+            "llvm.fma.f16" => {
+                let param1 = cx.context.new_parameter(None, cx.double_type, "x");
+                let param2 = cx.context.new_parameter(None, cx.double_type, "y");
+                let param3 = cx.context.new_parameter(None, cx.double_type, "z");
+                cx.context.new_function(
+                    None,
+                    FunctionType::Extern,
+                    cx.double_type,
+                    &[param1, param2, param3],
+                    "fma",
+                    false,
+                )
+            }
+            _ => llvm::intrinsic(name, cx),
+        };
+
         cx.intrinsics.borrow_mut().insert(name.to_string(), intrinsic);
         return intrinsic;
     }
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 52e5efd6d16e..098c7fbb4856 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1,5 +1,6 @@
 use std::borrow::Cow;
 
+use gccjit::CType;
 use gccjit::{Function, FunctionPtrType, RValue, ToRValue, UnaryOp};
 use rustc_codegen_ssa::traits::BuilderMethods;
 
@@ -320,7 +321,9 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             | "__builtin_ia32_vpmadd52luq512_mask"
             | "__builtin_ia32_vpmadd52huq256_mask"
             | "__builtin_ia32_vpmadd52luq256_mask"
-            | "__builtin_ia32_vpmadd52huq128_mask" => {
+            | "__builtin_ia32_vpmadd52huq128_mask"
+            | "__builtin_ia32_vfmaddsubph128_mask"
+            | "__builtin_ia32_vfmaddsubph256_mask" => {
                 let mut new_args = args.to_vec();
                 let arg4_type = gcc_func.get_param_type(3);
                 let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1);
@@ -440,6 +443,19 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 new_args.push(last_arg);
                 args = new_args.into();
             }
+            // NOTE: the LLVM intrinsics receive 3 floats, but the GCC builtin requires 3 vectors.
+            "__builtin_ia32_vfmaddsh3_mask" => {
+                let new_args = args.to_vec();
+                let arg1_type = gcc_func.get_param_type(0);
+                let arg2_type = gcc_func.get_param_type(1);
+                let arg3_type = gcc_func.get_param_type(2);
+                let arg5_type = gcc_func.get_param_type(4);
+                let a = builder.context.new_rvalue_from_vector(None, arg1_type, &[new_args[0]; 8]);
+                let b = builder.context.new_rvalue_from_vector(None, arg2_type, &[new_args[1]; 8]);
+                let c = builder.context.new_rvalue_from_vector(None, arg3_type, &[new_args[2]; 8]);
+                let arg5 = builder.context.new_rvalue_from_int(arg5_type, 4);
+                args = vec![a, b, c, new_args[3], arg5].into();
+            }
             _ => (),
         }
     } else {
@@ -452,7 +468,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 let arg4 = builder.context.new_bitcast(None, new_args[2], arg4_type);
                 args = vec![new_args[0], new_args[1], arg3, arg4, new_args[3], new_args[5]].into();
             }
-            // NOTE: the LLVM intrinsic receives 3 floats, but the GCC builtin requires 3 vectors.
+            // NOTE: the LLVM intrinsics receive 3 floats, but the GCC builtin requires 3 vectors.
             // FIXME: the intrinsics like _mm_mask_fmadd_sd should probably directly call the GCC
             // intrinsic to avoid this.
             "__builtin_ia32_vfmaddss3_round" => {
@@ -550,6 +566,25 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 ]
                 .into();
             }
+            "__builtin_ia32_rndscalesh_mask_round" => {
+                let new_args = args.to_vec();
+                args = vec![
+                    new_args[0],
+                    new_args[1],
+                    new_args[4],
+                    new_args[2],
+                    new_args[3],
+                    new_args[5],
+                ]
+                .into();
+            }
+            "fma" => {
+                let mut new_args = args.to_vec();
+                new_args[0] = builder.context.new_cast(None, new_args[0], builder.double_type);
+                new_args[1] = builder.context.new_cast(None, new_args[1], builder.double_type);
+                new_args[2] = builder.context.new_cast(None, new_args[2], builder.double_type);
+                args = new_args.into();
+            }
             _ => (),
         }
     }
@@ -566,7 +601,9 @@ pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(
     orig_args: &[RValue<'gcc>],
 ) -> RValue<'gcc> {
     match func_name {
-        "__builtin_ia32_vfmaddss3_round" | "__builtin_ia32_vfmaddsd3_round" => {
+        "__builtin_ia32_vfmaddss3_round"
+        | "__builtin_ia32_vfmaddsd3_round"
+        | "__builtin_ia32_vfmaddsh3_mask" => {
             #[cfg(feature = "master")]
             {
                 let zero = builder.context.new_rvalue_zero(builder.int_type);
@@ -625,6 +662,10 @@ pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(
                 &[random_number, success_variable.to_rvalue()],
             );
         }
+        "fma" => {
+            let f16_type = builder.context.new_c_type(CType::Float16);
+            return_value = builder.context.new_cast(None, return_value, f16_type);
+        }
         _ => (),
     }
 
@@ -1165,6 +1206,9 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.mask.store.q.128" => "__builtin_ia32_movdqa64store128_mask",
         "llvm.x86.avx512.mask.store.ps.128" => "__builtin_ia32_storeaps128_mask",
         "llvm.x86.avx512.mask.store.pd.128" => "__builtin_ia32_storeapd128_mask",
+        "llvm.x86.avx512fp16.vfmadd.f16" => "__builtin_ia32_vfmaddsh3_mask",
+        "llvm.x86.avx512fp16.vfmaddsub.ph.128" => "__builtin_ia32_vfmaddsubph128_mask",
+        "llvm.x86.avx512fp16.vfmaddsub.ph.256" => "__builtin_ia32_vfmaddsubph256_mask",
 
         // TODO: support the tile builtins:
         "llvm.x86.ldtilecfg" => "__builtin_trap",

From 88445ee1c2ee96f97d72a102b60142943a817623 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 24 Sep 2024 12:38:01 -0400
Subject: [PATCH 748/997] Add missing SIMD intrinsics

---
 libgccjit.version     |  2 +-
 src/base.rs           |  1 -
 src/builder.rs        |  3 +-
 src/intrinsic/llvm.rs | 98 +++++++++++++++++++++++++++++++++++++------
 4 files changed, 88 insertions(+), 16 deletions(-)

diff --git a/libgccjit.version b/libgccjit.version
index e5f51a197a44..b9bbbd324c3b 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-a0cb76246d8d00ed9847d9874e5d5658049c332d
+e744a9459d33864067214741daf5c5bc2a7b88c6
diff --git a/src/base.rs b/src/base.rs
index d76011da9807..b8f511b73a0f 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -222,7 +222,6 @@ pub fn compile_codegen_unit(
 
             // ... and now that we have everything pre-defined, fill out those definitions.
             for &(mono_item, _) in &mono_items {
-                //println!("{:?}", mono_item);
                 mono_item.define::<Builder<'_, '_, '_>>(&cx);
             }
 
diff --git a/src/builder.rs b/src/builder.rs
index f07c5a53f683..408b7bc3caa4 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -275,7 +275,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                         assert!(
                             (!expected_ty.is_vector() || actual_ty.is_vector())
                                 && (expected_ty.is_vector() || !actual_ty.is_vector()),
-                            "{:?} ({}) -> {:?} ({}), index: {:?}[{}]",
+                            "{:?} (is vector: {}) -> {:?} (is vector: {}), Function: {:?}[{}]",
                             actual_ty,
                             actual_ty.is_vector(),
                             expected_ty,
@@ -285,7 +285,6 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                         );
                         // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
                         // TODO: remove bitcast now that vector types can be compared?
-                        println!("Name: {}", func_name);
                         self.bitcast(actual_val, expected_ty)
                     }
                 } else {
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 098c7fbb4856..cc6bed1fc9a4 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -153,7 +153,11 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             | "__builtin_ia32_psrav16hi_mask"
             | "__builtin_ia32_psrav8hi_mask"
             | "__builtin_ia32_permvarhi256_mask"
-            | "__builtin_ia32_permvarhi128_mask" => {
+            | "__builtin_ia32_permvarhi128_mask"
+            | "__builtin_ia32_maxph128_mask"
+            | "__builtin_ia32_maxph256_mask"
+            | "__builtin_ia32_minph128_mask"
+            | "__builtin_ia32_minph256_mask" => {
                 let mut new_args = args.to_vec();
                 let arg3_type = gcc_func.get_param_type(2);
                 let vector_type = arg3_type.dyncast_vector().expect("vector type");
@@ -194,7 +198,13 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             | "__builtin_ia32_cvtqq2ps256_mask"
             | "__builtin_ia32_cvtuqq2pd128_mask"
             | "__builtin_ia32_cvtuqq2pd256_mask"
-            | "__builtin_ia32_cvtuqq2ps256_mask" => {
+            | "__builtin_ia32_cvtuqq2ps256_mask"
+            | "__builtin_ia32_vcvtw2ph128_mask"
+            | "__builtin_ia32_vcvtw2ph256_mask"
+            | "__builtin_ia32_vcvtuw2ph128_mask"
+            | "__builtin_ia32_vcvtuw2ph256_mask"
+            | "__builtin_ia32_vcvtdq2ph256_mask"
+            | "__builtin_ia32_vcvtudq2ph256_mask" => {
                 let mut new_args = args.to_vec();
                 // Remove last arg as it doesn't seem to be used in GCC and is always false.
                 new_args.pop();
@@ -296,7 +306,8 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             "__builtin_ia32_vfmaddsubps512_mask"
             | "__builtin_ia32_vfmaddsubpd512_mask"
             | "__builtin_ia32_cmpsh_mask_round"
-            | "__builtin_ia32_vfmaddph512_mask" => {
+            | "__builtin_ia32_vfmaddph512_mask"
+            | "__builtin_ia32_vfmaddsubph512_mask" => {
                 let mut new_args = args.to_vec();
                 let last_arg = new_args.pop().expect("last arg");
                 let arg4_type = gcc_func.get_param_type(3);
@@ -319,9 +330,6 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             | "__builtin_ia32_vpermi2varpd128_mask"
             | "__builtin_ia32_vpmadd52huq512_mask"
             | "__builtin_ia32_vpmadd52luq512_mask"
-            | "__builtin_ia32_vpmadd52huq256_mask"
-            | "__builtin_ia32_vpmadd52luq256_mask"
-            | "__builtin_ia32_vpmadd52huq128_mask"
             | "__builtin_ia32_vfmaddsubph128_mask"
             | "__builtin_ia32_vfmaddsubph256_mask" => {
                 let mut new_args = args.to_vec();
@@ -405,7 +413,14 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             "__builtin_ia32_cvtqq2pd512_mask"
             | "__builtin_ia32_cvtqq2ps512_mask"
             | "__builtin_ia32_cvtuqq2pd512_mask"
-            | "__builtin_ia32_cvtuqq2ps512_mask" => {
+            | "__builtin_ia32_cvtuqq2ps512_mask"
+            | "__builtin_ia32_sqrtph512_mask_round"
+            | "__builtin_ia32_vcvtw2ph512_mask_round"
+            | "__builtin_ia32_vcvtuw2ph512_mask_round"
+            | "__builtin_ia32_vcvtdq2ph512_mask_round"
+            | "__builtin_ia32_vcvtudq2ph512_mask_round"
+            | "__builtin_ia32_vcvtqq2ph512_mask_round"
+            | "__builtin_ia32_vcvtuqq2ph512_mask_round" => {
                 let mut old_args = args.to_vec();
                 let mut new_args = vec![];
                 new_args.push(old_args.swap_remove(0));
@@ -425,7 +440,9 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             "__builtin_ia32_addph512_mask_round"
             | "__builtin_ia32_subph512_mask_round"
             | "__builtin_ia32_mulph512_mask_round"
-            | "__builtin_ia32_divph512_mask_round" => {
+            | "__builtin_ia32_divph512_mask_round"
+            | "__builtin_ia32_maxph512_mask_round"
+            | "__builtin_ia32_minph512_mask_round" => {
                 let mut new_args = args.to_vec();
                 let last_arg = new_args.pop().expect("last arg");
 
@@ -460,7 +477,9 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
         }
     } else {
         match func_name {
-            "__builtin_ia32_rndscaless_mask_round" | "__builtin_ia32_rndscalesd_mask_round" => {
+            "__builtin_ia32_rndscaless_mask_round"
+            | "__builtin_ia32_rndscalesd_mask_round"
+            | "__builtin_ia32_reducesh_mask_round" => {
                 let new_args = args.to_vec();
                 let arg3_type = gcc_func.get_param_type(2);
                 let arg3 = builder.context.new_cast(None, new_args[4], arg3_type);
@@ -585,6 +604,12 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 new_args[2] = builder.context.new_cast(None, new_args[2], builder.double_type);
                 args = new_args.into();
             }
+            "__builtin_ia32_sqrtsh_mask_round" => {
+                // The first two arguments are inverted, so swap them.
+                let mut new_args = args.to_vec();
+                new_args.swap(0, 1);
+                args = new_args.into();
+            }
             _ => (),
         }
     }
@@ -1090,9 +1115,9 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128_mask",
         "llvm.x86.avx512.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_mask",
         "llvm.x86.avx512.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_mask",
-        "llvm.x86.avx512.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_mask",
-        "llvm.x86.avx512.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_mask",
-        "llvm.x86.avx512.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_mask",
+        "llvm.x86.avx512.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256",
+        "llvm.x86.avx512.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256",
+        "llvm.x86.avx512.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128",
         "llvm.x86.avx512.vpdpwssd.512" => "__builtin_ia32_vpdpwssd_v16si",
         "llvm.x86.avx512.vpdpwssd.256" => "__builtin_ia32_vpdpwssd_v8si",
         "llvm.x86.avx512.vpdpwssd.128" => "__builtin_ia32_vpdpwssd_v4si",
@@ -1209,6 +1234,55 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512fp16.vfmadd.f16" => "__builtin_ia32_vfmaddsh3_mask",
         "llvm.x86.avx512fp16.vfmaddsub.ph.128" => "__builtin_ia32_vfmaddsubph128_mask",
         "llvm.x86.avx512fp16.vfmaddsub.ph.256" => "__builtin_ia32_vfmaddsubph256_mask",
+        "llvm.x86.avx512fp16.vfmaddsub.ph.512" => "__builtin_ia32_vfmaddsubph512_mask",
+        "llvm.x86.avx512fp16.sqrt.ph.512" => "__builtin_ia32_sqrtph512_mask_round",
+        "llvm.x86.avx512fp16.mask.sqrt.sh" => "__builtin_ia32_sqrtsh_mask_round",
+        "llvm.x86.avx512fp16.max.ph.128" => "__builtin_ia32_maxph128_mask",
+        "llvm.x86.avx512fp16.max.ph.256" => "__builtin_ia32_maxph256_mask",
+        "llvm.x86.avx512fp16.max.ph.512" => "__builtin_ia32_maxph512_mask_round",
+        "llvm.x86.avx512fp16.min.ph.128" => "__builtin_ia32_minph128_mask",
+        "llvm.x86.avx512fp16.min.ph.256" => "__builtin_ia32_minph256_mask",
+        "llvm.x86.avx512fp16.min.ph.512" => "__builtin_ia32_minph512_mask_round",
+        "llvm.x86.avx512fp16.mask.getexp.sh" => "__builtin_ia32_getexpsh_mask_round",
+        "llvm.x86.avx512fp16.mask.rndscale.ph.128" => "__builtin_ia32_rndscaleph128_mask",
+        "llvm.x86.avx512fp16.mask.rndscale.ph.256" => "__builtin_ia32_rndscaleph256_mask",
+        "llvm.x86.avx512fp16.mask.rndscale.ph.512" => "__builtin_ia32_rndscaleph512_mask_round",
+        "llvm.x86.avx512fp16.mask.scalef.ph.512" => "__builtin_ia32_scalefph512_mask_round",
+        "llvm.x86.avx512fp16.mask.reduce.ph.512" => "__builtin_ia32_reduceph512_mask_round",
+        "llvm.x86.avx512fp16.mask.reduce.sh" => "__builtin_ia32_reducesh_mask_round",
+        "llvm.x86.avx512.sitofp.round.v8f16.v8i16" => "__builtin_ia32_vcvtw2ph128_mask",
+        "llvm.x86.avx512.sitofp.round.v16f16.v16i16" => "__builtin_ia32_vcvtw2ph256_mask",
+        "llvm.x86.avx512.sitofp.round.v32f16.v32i16" => "__builtin_ia32_vcvtw2ph512_mask_round",
+        "llvm.x86.avx512.uitofp.round.v8f16.v8u16" => "__builtin_ia32_vcvtuw2ph128_mask",
+        "llvm.x86.avx512.uitofp.round.v16f16.v16u16" => "__builtin_ia32_vcvtuw2ph256_mask",
+        "llvm.x86.avx512.uitofp.round.v32f16.v32u16" => "__builtin_ia32_vcvtuw2ph512_mask_round",
+        "llvm.x86.avx512.sitofp.round.v8f16.v8i32" => "__builtin_ia32_vcvtdq2ph256_mask",
+        "llvm.x86.avx512.sitofp.round.v16f16.v16i32" => "__builtin_ia32_vcvtdq2ph512_mask_round",
+        "llvm.x86.avx512fp16.vcvtsi2sh" => "__builtin_ia32_vcvtsi2sh32_round",
+        "llvm.x86.avx512.uitofp.round.v8f16.v8u32" => "__builtin_ia32_vcvtudq2ph256_mask",
+        "llvm.x86.avx512.uitofp.round.v16f16.v16u32" => "__builtin_ia32_vcvtudq2ph512_mask_round",
+        "llvm.x86.avx512fp16.vcvtusi2sh" => "__builtin_ia32_vcvtusi2sh32_round",
+        "llvm.x86.avx512.sitofp.round.v8f16.v8i64" => "__builtin_ia32_vcvtqq2ph512_mask_round",
+        "llvm.x86.avx512.uitofp.round.v8f16.v8u64" => "__builtin_ia32_vcvtuqq2ph512_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvtps2phx.512" => "__builtin_ia32_vcvtps2phx512_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvtpd2ph.512" => "__builtin_ia32_vcvtpd2ph512_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvtph2uw.512" => "__builtin_ia32_vcvtph2uw512_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvttph2w.512" => "__builtin_ia32_vcvttph2w512_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvttph2uw.512" => "__builtin_ia32_vcvttph2uw512_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvtph2dq.512" => "__builtin_ia32_vcvtph2dq512_mask_round",
+        "llvm.x86.avx512fp16.vcvtsh2si32" => "__builtin_ia32_vcvtsh2si32_round",
+        "llvm.x86.avx512fp16.mask.vcvtph2udq.512" => "__builtin_ia32_vcvtph2udq512_mask_round",
+        "llvm.x86.avx512fp16.vcvtsh2usi32" => "__builtin_ia32_vcvtsh2usi32_round",
+        "llvm.x86.avx512fp16.mask.vcvttph2dq.512" => "__builtin_ia32_vcvttph2dq512_mask_round",
+        "llvm.x86.avx512fp16.vcvttsh2si32" => "__builtin_ia32_vcvttsh2si32_round",
+        "llvm.x86.avx512fp16.mask.vcvttph2udq.512" => "__builtin_ia32_vcvttph2udq512_mask_round",
+        "llvm.x86.avx512fp16.vcvttsh2usi32" => "__builtin_ia32_vcvttsh2usi32_round",
+        "llvm.x86.avx512fp16.mask.vcvtph2qq.512" => "__builtin_ia32_vcvtph2qq512_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvtph2uqq.512" => "__builtin_ia32_vcvtph2uqq512_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvttph2qq.512" => "__builtin_ia32_vcvttph2qq512_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvttph2uqq.512" => "__builtin_ia32_vcvttph2uqq512_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvtph2psx.512" => "__builtin_ia32_vcvtph2psx512_mask_round",
+        "llvm.x86.avx512fp16.mask.vcvtph2pd.512" => "__builtin_ia32_vcvtph2pd512_mask_round",
 
         // TODO: support the tile builtins:
         "llvm.x86.ldtilecfg" => "__builtin_trap",

From 0a52b6511382d79219798cf423f370786e9e13b7 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 24 Sep 2024 12:45:52 -0400
Subject: [PATCH 749/997] Update to Ubuntu 24.04 to get a more recent GNU as

---
 .github/workflows/stdarch.yml | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index e24b25b73690..dde1ce21d7bc 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -13,7 +13,7 @@ env:
 
 jobs:
   build:
-    runs-on: ubuntu-latest
+    runs-on: ubuntu-24.04
 
     strategy:
       fail-fast: false
@@ -36,6 +36,12 @@ jobs:
     - name: Install packages
       run: sudo apt-get install ninja-build ripgrep
 
+    - name: Install more recent binutils
+      run: |
+        echo "deb http://archive.ubuntu.com/ubuntu oracular main universe" | sudo tee /etc/apt/sources.list.d/oracular-copies.list
+        sudo apt-get update
+        sudo apt-get install binutils
+
     - name: Install Intel Software Development Emulator
       if: ${{ matrix.cargo_runner }}
       run: |

From 79a6e4eaa3cb48e0c75089840bd2b6859214aacd Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 24 Sep 2024 20:12:41 -0400
Subject: [PATCH 750/997] Add documentation for stdarch tests

---
 doc/debugging-gcc-lto.md |  3 ---
 doc/debugging.md         | 38 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 38 insertions(+), 3 deletions(-)
 delete mode 100644 doc/debugging-gcc-lto.md
 create mode 100644 doc/debugging.md

diff --git a/doc/debugging-gcc-lto.md b/doc/debugging-gcc-lto.md
deleted file mode 100644
index 93b150d76865..000000000000
--- a/doc/debugging-gcc-lto.md
+++ /dev/null
@@ -1,3 +0,0 @@
-# How to debug GCC LTO
-
-Run do the command with `-v -save-temps` and then extract the `lto1` line from the output and run that under the debugger.
diff --git a/doc/debugging.md b/doc/debugging.md
new file mode 100644
index 000000000000..6ff4edf8877c
--- /dev/null
+++ b/doc/debugging.md
@@ -0,0 +1,38 @@
+# Debugging
+
+## How to debug GCC LTO
+
+Run do the command with `-v -save-temps` and then extract the `lto1` line from the output and run that under the debugger.
+
+## How to debug stdarch tests that cannot be ran locally
+
+First, run the tests normally:
+
+----
+cd build/build_sysroot/sysroot_src/library/stdarch/
+STDARCH_TEST_EVERYTHING=1 CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="sde -future -rtm_mode full --" TARGET=x86_64-unknown-linux-gnu ../../../../../y.sh cargo test
+----
+
+It will show the command it ran, something like this:
+
+----
+  process didn't exit successfully: `sde -future -rtm_mode full -- /home/user/projects/rustc_codegen_gcc/build/build_sysroot/sysroot_src/library/stdarch/target/debug/deps/core_arch-fd2d75f89baae5c6` (signal: 11, SIGSEGV: invalid memory reference)
+----
+
+Then add the `-debug` flag to it:
+
+----
+sde -debug -future -rtm_mode full -- /home/user/projects/rustc_codegen_gcc/build/build_sysroot/sysroot_src/library/stdarch/target/debug/deps/core_arch-fd2d75f89baae5c6
+----
+
+To see the symbols in `gdb`, specify the executable in your command:
+
+----
+gdb /home/user/projects/rustc_codegen_gcc/build/build_sysroot/sysroot_src/library/stdarch/target/debug/deps/core_arch-fd2d75f89baae5c6
+----
+
+and then write the `gdb` command that `sde` tells you to use, something like:
+
+----
+target remote :51299
+----

From 7d4d356bddbf3328fb4978322c541e667a387fa5 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 25 Sep 2024 09:15:55 -0400
Subject: [PATCH 751/997] Enable the cfg stdarch_intel_sde to fix the segfault
 when running the tests under SDE

---
 .github/workflows/stdarch.yml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index dde1ce21d7bc..95f40ff28613 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -36,6 +36,7 @@ jobs:
     - name: Install packages
       run: sudo apt-get install ninja-build ripgrep
 
+    # TODO: remove when we have binutils version 2.43 in the repo.
     - name: Install more recent binutils
       run: |
         echo "deb http://archive.ubuntu.com/ubuntu oracular main universe" | sudo tee /etc/apt/sources.list.d/oracular-copies.list
@@ -102,4 +103,5 @@ jobs:
       run: |
         # FIXME: these tests fail when the sysroot is compiled with LTO because of a missing symbol in proc-macro.
         # TODO: remove --skip test_mm512_stream_ps when stdarch is updated in rustc.
-        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a --skip test_mm512_stream_ps
+        # TODO: remove --skip test_tile_ when it's implemented.
+        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features --cfg stdarch_intel_sde" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a --skip test_mm512_stream_ps --skip test_tile_

From 1e8354a461486bb543741d9343ce170af554e7eb Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 25 Sep 2024 19:54:16 -0400
Subject: [PATCH 752/997] Fix mapping

---
 src/builder.rs        |  2 ++
 src/intrinsic/llvm.rs | 24 +++++++++++++++++-------
 2 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 408b7bc3caa4..e001e59177db 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -285,6 +285,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                         );
                         // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
                         // TODO: remove bitcast now that vector types can be compared?
+                        // ==> We use bitcast to avoid having to do many manual casts from e.g. __m256i to __v32qi (in
+                        // the case of _mm256_aesenc_epi128).
                         self.bitcast(actual_val, expected_ty)
                     }
                 } else {
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index cc6bed1fc9a4..4aed955627d5 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -466,12 +466,12 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 let arg1_type = gcc_func.get_param_type(0);
                 let arg2_type = gcc_func.get_param_type(1);
                 let arg3_type = gcc_func.get_param_type(2);
-                let arg5_type = gcc_func.get_param_type(4);
+                let arg4_type = gcc_func.get_param_type(3);
                 let a = builder.context.new_rvalue_from_vector(None, arg1_type, &[new_args[0]; 8]);
                 let b = builder.context.new_rvalue_from_vector(None, arg2_type, &[new_args[1]; 8]);
                 let c = builder.context.new_rvalue_from_vector(None, arg3_type, &[new_args[2]; 8]);
-                let arg5 = builder.context.new_rvalue_from_int(arg5_type, 4);
-                args = vec![a, b, c, new_args[3], arg5].into();
+                let arg4 = builder.context.new_rvalue_from_int(arg4_type, -1);
+                args = vec![a, b, c, arg4, new_args[3]].into();
             }
             _ => (),
         }
@@ -604,7 +604,13 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 new_args[2] = builder.context.new_cast(None, new_args[2], builder.double_type);
                 args = new_args.into();
             }
-            "__builtin_ia32_sqrtsh_mask_round" => {
+            "__builtin_ia32_sqrtsh_mask_round"
+            | "__builtin_ia32_vcvtss2sh_mask_round"
+            | "__builtin_ia32_vcvtsd2sh_mask_round"
+            | "__builtin_ia32_vcvtsh2ss_mask_round"
+            | "__builtin_ia32_vcvtsh2sd_mask_round"
+            | "__builtin_ia32_rcpsh_mask"
+            | "__builtin_ia32_rsqrtsh_mask" => {
                 // The first two arguments are inverted, so swap them.
                 let mut new_args = args.to_vec();
                 new_args.swap(0, 1);
@@ -1192,11 +1198,11 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512fp16.mask.vfcmul.csh" => "__builtin_ia32_vfcmulcsh_mask_round",
         "llvm.x86.avx512fp16.mask.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_mask3_round",
         "llvm.x86.avx512fp16.maskz.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_maskz_round",
-        "llvm.x86.avx512fp16.mask.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_mask3_round",
+        "llvm.x86.avx512fp16.mask.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_mask_round",
         "llvm.x86.avx512fp16.maskz.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_maskz_round",
         "llvm.x86.avx512fp16.mask.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_mask3_round",
         "llvm.x86.avx512fp16.maskz.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_maskz_round",
-        "llvm.x86.avx512fp16.mask.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_mask_round",
+        "llvm.x86.avx512fp16.mask.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_mask3_round",
         "llvm.x86.avx512fp16.maskz.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_maskz_round",
         "llvm.x86.avx512fp16.vfmadd.ph.512" => "__builtin_ia32_vfmaddph512_mask",
         "llvm.x86.avx512fp16.vcvtsi642sh" => "__builtin_ia32_vcvtsi2sh64_round",
@@ -1209,7 +1215,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512.mask.load.pd.256" => "__builtin_ia32_loadapd256_mask",
         "llvm.x86.avx512.mask.load.d.128" => "__builtin_ia32_movdqa32load128_mask",
         "llvm.x86.avx512.mask.load.q.128" => "__builtin_ia32_movdqa64load128_mask",
-        "llvm.x86.avx512.mask.load.ps.128" => "__builtin_ia32_movdqa64load128_mask",
+        "llvm.x86.avx512.mask.load.ps.128" => "__builtin_ia32_loadaps128_mask",
         "llvm.x86.avx512.mask.load.pd.128" => "__builtin_ia32_loadapd128_mask",
         "llvm.x86.avx512.mask.storeu.d.256" => "__builtin_ia32_storedqusi256_mask",
         "llvm.x86.avx512.mask.storeu.q.256" => "__builtin_ia32_storedqudi256_mask",
@@ -1283,6 +1289,10 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512fp16.mask.vcvttph2uqq.512" => "__builtin_ia32_vcvttph2uqq512_mask_round",
         "llvm.x86.avx512fp16.mask.vcvtph2psx.512" => "__builtin_ia32_vcvtph2psx512_mask_round",
         "llvm.x86.avx512fp16.mask.vcvtph2pd.512" => "__builtin_ia32_vcvtph2pd512_mask_round",
+        "llvm.x86.avx512fp16.mask.vfcmadd.cph.256" => "__builtin_ia32_vfcmaddcph256_mask3",
+        "llvm.x86.avx512fp16.mask.vfmadd.cph.256" => "__builtin_ia32_vfmaddcph256_mask3",
+        "llvm.x86.avx512fp16.mask.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_mask3",
+        "llvm.x86.avx512fp16.mask.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_mask3",
 
         // TODO: support the tile builtins:
         "llvm.x86.ldtilecfg" => "__builtin_trap",

From 11f4f160d3a10d2c4e6f49c173f0344f9b9f09ae Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 27 Sep 2024 12:07:24 -0400
Subject: [PATCH 753/997] Implement a hack for an intrinsic mapping where we
 need to output a different builtin based on an argument

---
 src/builder.rs        |  1 +
 src/intrinsic/llvm.rs | 34 ++++++++++++++++++++++++++++++++--
 2 files changed, 33 insertions(+), 2 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index e001e59177db..9936bc1f5f22 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -370,6 +370,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let args = {
             let function_address_names = self.function_address_names.borrow();
             let original_function_name = function_address_names.get(&func_ptr);
+            func_ptr = llvm::adjust_function(self.context, &func_name, func_ptr, args);
             llvm::adjust_intrinsic_arguments(
                 self,
                 gcc_func,
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 4aed955627d5..b1fed82507d4 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1,12 +1,42 @@
 use std::borrow::Cow;
 
-use gccjit::CType;
+use gccjit::{CType, Context};
 use gccjit::{Function, FunctionPtrType, RValue, ToRValue, UnaryOp};
 use rustc_codegen_ssa::traits::BuilderMethods;
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
 
+pub fn adjust_function<'gcc>(
+    context: &'gcc Context<'gcc>,
+    func_name: &str,
+    func_ptr: RValue<'gcc>,
+    args: &[RValue<'gcc>],
+) -> RValue<'gcc> {
+    // FIXME: we should not need this hack: this is required because both _mm_fcmadd_sch
+    // and _mm_mask3_fcmadd_round_sch calls llvm.x86.avx512fp16.mask.vfcmadd.csh and we
+    // seem to need to map this one LLVM intrinsic to 2 different GCC builtins.
+    match func_name {
+        "__builtin_ia32_vfcmaddcsh_mask3_round" => {
+            if format!("{:?}", args[3]).ends_with("255") {
+                return context
+                    .get_target_builtin_function("__builtin_ia32_vfcmaddcsh_mask_round")
+                    .get_address(None);
+            }
+        }
+        "__builtin_ia32_vfmaddcsh_mask3_round" => {
+            if format!("{:?}", args[3]).ends_with("255") {
+                return context
+                    .get_target_builtin_function("__builtin_ia32_vfmaddcsh_mask_round")
+                    .get_address(None);
+            }
+        }
+        _ => (),
+    }
+
+    func_ptr
+}
+
 pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
     builder: &Builder<'a, 'gcc, 'tcx>,
     gcc_func: FunctionPtrType<'gcc>,
@@ -1198,7 +1228,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512fp16.mask.vfcmul.csh" => "__builtin_ia32_vfcmulcsh_mask_round",
         "llvm.x86.avx512fp16.mask.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_mask3_round",
         "llvm.x86.avx512fp16.maskz.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_maskz_round",
-        "llvm.x86.avx512fp16.mask.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_mask_round",
+        "llvm.x86.avx512fp16.mask.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_mask3_round",
         "llvm.x86.avx512fp16.maskz.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_maskz_round",
         "llvm.x86.avx512fp16.mask.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_mask3_round",
         "llvm.x86.avx512fp16.maskz.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_maskz_round",

From 117cf3e3cd292c6c18454dcab3eec73ef090b323 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 27 Sep 2024 12:12:24 -0400
Subject: [PATCH 754/997] Fix for libgccjit 12

---
 src/context.rs        | 1 +
 src/intrinsic/llvm.rs | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/src/context.rs b/src/context.rs
index d4ac4f26b039..9756f0faae22 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -25,6 +25,7 @@ use rustc_target::spec::{HasTargetSpec, HasWasmCAbiOpt, Target, TlsModel, WasmCA
 use crate::callee::get_fn;
 use crate::common::SignType;
 
+#[cfg_attr(not(feature = "master"), allow(dead_code))]
 pub struct CodegenCx<'gcc, 'tcx> {
     pub codegen_unit: &'tcx CodegenUnit<'tcx>,
     pub context: &'gcc Context<'gcc>,
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index b1fed82507d4..7a8fe134cfc7 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -7,6 +7,7 @@ use rustc_codegen_ssa::traits::BuilderMethods;
 use crate::builder::Builder;
 use crate::context::CodegenCx;
 
+#[cfg_attr(not(feature = "master"), allow(unused_variables))]
 pub fn adjust_function<'gcc>(
     context: &'gcc Context<'gcc>,
     func_name: &str,
@@ -16,6 +17,7 @@ pub fn adjust_function<'gcc>(
     // FIXME: we should not need this hack: this is required because both _mm_fcmadd_sch
     // and _mm_mask3_fcmadd_round_sch calls llvm.x86.avx512fp16.mask.vfcmadd.csh and we
     // seem to need to map this one LLVM intrinsic to 2 different GCC builtins.
+    #[cfg(feature = "master")]
     match func_name {
         "__builtin_ia32_vfcmaddcsh_mask3_round" => {
             if format!("{:?}", args[3]).ends_with("255") {

From 12575df6ba2d897f7d8a91c252ca0af4451f5024 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 27 Sep 2024 12:37:56 -0400
Subject: [PATCH 755/997] Cleanup

---
 Cargo.lock                | 10 ++++++----
 Cargo.toml                |  4 ++--
 build_system/src/build.rs | 10 +---------
 src/base.rs               |  4 ----
 src/declare.rs            | 14 +++-----------
 5 files changed, 12 insertions(+), 30 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 42528419a253..f2a368395b2f 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -79,16 +79,18 @@ dependencies = [
 
 [[package]]
 name = "gccjit"
-version = "2.1.0"
-source = "git+https://github.com/rust-lang/gccjit.rs#4fbe2023250357378fb2faf6f484b34cb8f8ebc3"
+version = "2.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "4bb376e98c82d9284c3a17fc1d6bf9bc921055418950238d7a553c27a7e1f6ab"
 dependencies = [
  "gccjit_sys",
 ]
 
 [[package]]
 name = "gccjit_sys"
-version = "0.2.0"
-source = "git+https://github.com/rust-lang/gccjit.rs#4fbe2023250357378fb2faf6f484b34cb8f8ebc3"
+version = "0.3.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "93b4b1be553b5df790bf25ca2a1d6add81727dc29f8d5c8742468ed306d621d1"
 dependencies = [
  "libc",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 67a90cc34ee4..22b953cd2d17 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,8 +22,8 @@ master = ["gccjit/master"]
 default = ["master"]
 
 [dependencies]
-#gccjit = "2.1"
-gccjit = { git = "https://github.com/rust-lang/gccjit.rs" }
+gccjit = "2.2"
+#gccjit = { git = "https://github.com/rust-lang/gccjit.rs" }
 
 # Local copy.
 #gccjit = { path = "../gccjit.rs" }
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index d5d099fb14cf..d0ced211a616 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -131,15 +131,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         rustflags.push_str(" -Csymbol-mangling-version=v0");
     }
 
-    let mut args: Vec<&dyn AsRef<OsStr>> = vec![
-        &"cargo",
-        &"build",
-        &"--target",
-        &config.target,
-        // TODO: remove this feature?
-        &"--features",
-        &"std/compiler-builtins-no-f16-f128",
-    ];
+    let mut args: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"build", &"--target", &config.target];
     for feature in &config.features {
         args.push(&"--features");
         args.push(feature);
diff --git a/src/base.rs b/src/base.rs
index b8f511b73a0f..2eaab3ed00c8 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -116,10 +116,6 @@ pub fn compile_codegen_unit(
             context.add_command_line_option("-mavx");
         }
 
-        /*for feature in tcx.sess.opts.cg.target_feature.split(',') {
-            println!("Feature: {}", feature);
-        }*/
-
         for arg in &tcx.sess.opts.cg.llvm_args {
             context.add_command_line_option(arg);
         }
diff --git a/src/declare.rs b/src/declare.rs
index cbf82918a9c4..aa7709488e6b 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -170,17 +170,9 @@ fn declare_raw_fn<'gcc>(
     if name.starts_with("llvm.") {
         let intrinsic = match name {
             "llvm.fma.f16" => {
-                let param1 = cx.context.new_parameter(None, cx.double_type, "x");
-                let param2 = cx.context.new_parameter(None, cx.double_type, "y");
-                let param3 = cx.context.new_parameter(None, cx.double_type, "z");
-                cx.context.new_function(
-                    None,
-                    FunctionType::Extern,
-                    cx.double_type,
-                    &[param1, param2, param3],
-                    "fma",
-                    false,
-                )
+                // fma is not a target builtin, but a normal builtin, so we handle it differently
+                // here.
+                cx.context.get_builtin_function("fma")
             }
             _ => llvm::intrinsic(name, cx),
         };

From 887af16d67af6088fc7cf8baefe65d27b16053a6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 2 Oct 2024 12:52:49 -0400
Subject: [PATCH 756/997] Update GCC version

---
 libgccjit.version | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libgccjit.version b/libgccjit.version
index b9bbbd324c3b..e165345eeac4 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-e744a9459d33864067214741daf5c5bc2a7b88c6
+a71dd583ec21d3695256471842db1f24e6ac5e9e

From db2c4ff14312fd10e1d196d7c34ce29d6169ea24 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 3 Oct 2024 17:23:30 -0400
Subject: [PATCH 757/997] Ignore new failing test

---
 tests/failing-ui-tests.txt   | 1 +
 tests/failing-ui-tests12.txt | 1 -
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 56b51275a53b..cb38c1648382 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -92,6 +92,7 @@ tests/ui/delegation/fn-header.rs
 tests/ui/consts/zst_no_llvm_alloc.rs
 tests/ui/consts/const-eval/parse_ints.rs
 tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
+tests/ui/simd/intrinsic/generic-as.rs
 tests/ui/backtrace/backtrace.rs
 tests/ui/lifetimes/tail-expr-lock-poisoning.rs
 tests/ui/runtime/rt-explody-panic-payloads.rs
diff --git a/tests/failing-ui-tests12.txt b/tests/failing-ui-tests12.txt
index 1d9bdaa552c6..b10d4bc82aa8 100644
--- a/tests/failing-ui-tests12.txt
+++ b/tests/failing-ui-tests12.txt
@@ -11,7 +11,6 @@ tests/ui/simd/array-type.rs
 tests/ui/simd/intrinsic/float-minmax-pass.rs
 tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
 tests/ui/simd/intrinsic/generic-arithmetic-saturating-pass.rs
-tests/ui/simd/intrinsic/generic-as.rs
 tests/ui/simd/intrinsic/generic-cast-pass.rs
 tests/ui/simd/intrinsic/generic-cast-pointer-width.rs
 tests/ui/simd/intrinsic/generic-comparison-pass.rs

From 5e18d414f1d81cfab2ad6b754362642f7fa68ccc Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 10 Oct 2024 18:42:39 -0400
Subject: [PATCH 758/997] Update GCC version to have the refactor CPU feature
 detection code

---
 libgccjit.version | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libgccjit.version b/libgccjit.version
index e165345eeac4..7cd597a92c07 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-a71dd583ec21d3695256471842db1f24e6ac5e9e
+62d60a06236aca4be621ed0502114bea73d89a75

From 99698ddc2d9f0650002b597203b16ae5231cb727 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 16 Oct 2024 17:36:13 -0400
Subject: [PATCH 759/997] Update GCC version

---
 libgccjit.version | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libgccjit.version b/libgccjit.version
index 7cd597a92c07..e515f2232126 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-62d60a06236aca4be621ed0502114bea73d89a75
+c16f53a752ed2b679fafe88d4ec795fe54a245ac

From 8cd325d987ec875a9bb09f4c0bbc34f1f07fe308 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 16 Oct 2024 20:55:56 -0400
Subject: [PATCH 760/997] Update GCC version with the removal of
 supports_128bit_int

---
 Cargo.lock        |  8 ++++----
 Cargo.toml        |  2 +-
 libgccjit.version |  2 +-
 src/base.rs       |  3 ++-
 src/lib.rs        | 18 +++++++++---------
 5 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index f2a368395b2f..2f38d39f7e89 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -79,18 +79,18 @@ dependencies = [
 
 [[package]]
 name = "gccjit"
-version = "2.2.0"
+version = "2.3.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4bb376e98c82d9284c3a17fc1d6bf9bc921055418950238d7a553c27a7e1f6ab"
+checksum = "8b8611473168aebc9b307d7f4e7466fda20ab8d72acaca2c0d840dbe8fef451a"
 dependencies = [
  "gccjit_sys",
 ]
 
 [[package]]
 name = "gccjit_sys"
-version = "0.3.0"
+version = "0.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "93b4b1be553b5df790bf25ca2a1d6add81727dc29f8d5c8742468ed306d621d1"
+checksum = "f383b875dac2f3bb06e7d395be2fe6fbaad935658fb54f2399e5eb4fb88117ce"
 dependencies = [
  "libc",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 22b953cd2d17..3c6b8e93811b 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,7 +22,7 @@ master = ["gccjit/master"]
 default = ["master"]
 
 [dependencies]
-gccjit = "2.2"
+gccjit = "2.3"
 #gccjit = { git = "https://github.com/rust-lang/gccjit.rs" }
 
 # Local copy.
diff --git a/libgccjit.version b/libgccjit.version
index e515f2232126..f6b512a0280a 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-c16f53a752ed2b679fafe88d4ec795fe54a245ac
+29901846ff610daab8a80436cfe36e93b4b5aa1e
diff --git a/src/base.rs b/src/base.rs
index 2eaab3ed00c8..2838aad1afe3 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -199,12 +199,13 @@ pub fn compile_codegen_unit(
             let f32_type_supported = target_info.supports_target_dependent_type(CType::Float32);
             let f64_type_supported = target_info.supports_target_dependent_type(CType::Float64);
             let f128_type_supported = target_info.supports_target_dependent_type(CType::Float128);
+            let u128_type_supported = target_info.supports_target_dependent_type(CType::UInt128t);
             // TODO: improve this to avoid passing that many arguments.
             let cx = CodegenCx::new(
                 &context,
                 cgu,
                 tcx,
-                target_info.supports_128bit_int(),
+                u128_type_supported,
                 f16_type_supported,
                 f32_type_supported,
                 f64_type_supported,
diff --git a/src/lib.rs b/src/lib.rs
index 7b0d594ddc16..fdbf53e1b1a4 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -134,11 +134,15 @@ impl TargetInfo {
         false
     }
 
-    fn supports_128bit_int(&self) -> bool {
-        self.supports_128bit_integers.load(Ordering::SeqCst)
-    }
-
-    fn supports_target_dependent_type(&self, _typ: CType) -> bool {
+    fn supports_target_dependent_type(&self, typ: CType) -> bool {
+        match typ {
+            CType::UInt128t | CType::Int128t => {
+                if self.supports_128bit_integers.load(Ordering::SeqCst) {
+                    return true;
+                }
+            }
+            _ => (),
+        }
         false
     }
 }
@@ -159,10 +163,6 @@ impl LockedTargetInfo {
         self.info.lock().expect("lock").cpu_supports(feature)
     }
 
-    fn supports_128bit_int(&self) -> bool {
-        self.info.lock().expect("lock").supports_128bit_int()
-    }
-
     fn supports_target_dependent_type(&self, typ: CType) -> bool {
         self.info.lock().expect("lock").supports_target_dependent_type(typ)
     }

From f14161ea3535e39f4ac22edad0b626ea78110535 Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Tue, 26 Apr 2022 23:23:00 +0900
Subject: [PATCH 761/997] Add a test for volatile loads and stores

---
 tests/run/volatile2.rs | 119 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 119 insertions(+)
 create mode 100644 tests/run/volatile2.rs

diff --git a/tests/run/volatile2.rs b/tests/run/volatile2.rs
new file mode 100644
index 000000000000..c1bc442454e9
--- /dev/null
+++ b/tests/run/volatile2.rs
@@ -0,0 +1,119 @@
+// Compiler:
+//
+// Run-time:
+//   status: 0
+
+#![no_std]
+#![feature(core_intrinsics, start)]
+
+#[panic_handler]
+fn panic_handler(_: &core::panic::PanicInfo) -> ! {
+    core::intrinsics::abort();
+}
+
+mod libc {
+    #[link(name = "c")]
+    extern "C" {
+        pub fn puts(s: *const u8) -> i32;
+
+        pub fn sigaction(signum: i32, act: *const sigaction, oldact: *mut sigaction) -> i32;
+        pub fn mmap(addr: *mut (), len: usize, prot: i32, flags: i32, fd: i32, offset: i64) -> *mut ();
+        pub fn mprotect(addr: *mut (), len: usize, prot: i32) -> i32;
+    }
+
+    pub const PROT_READ: i32 = 1;
+    pub const PROT_WRITE: i32 = 2;
+    pub const MAP_PRIVATE: i32 = 0x0002;
+    pub const MAP_ANONYMOUS: i32 = 0x0020;
+    pub const MAP_FAILED: *mut u8 = !0 as *mut u8;
+
+    /// glibc sigaction
+    #[repr(C)]
+    pub struct sigaction {
+        pub sa_sigaction: Option<unsafe extern "C" fn(i32, *mut (), *mut ())>,
+        pub sa_mask: [u32; 32],
+        pub sa_flags: i32,
+        pub sa_restorer: Option<unsafe extern "C" fn()>,
+    }
+
+    pub const SA_SIGINFO: i32 = 0x00000004;
+    pub const SIGSEGV: i32 = 11;
+}
+
+static mut COUNT: u32 = 0;
+static mut STORAGE: *mut u8 = core::ptr::null_mut();
+const PAGE_SIZE: usize = 1 << 15;
+
+#[start]
+fn main(_argc: isize, _argv: *const *const u8) -> isize {
+    unsafe {
+        // Register a segfault handler
+        libc::sigaction(
+            libc::SIGSEGV,
+            &libc::sigaction {
+                sa_sigaction: Some(segv_handler),
+                sa_flags: libc::SA_SIGINFO,
+                ..core::mem::zeroed()
+            },
+            core::ptr::null_mut(),
+        );
+
+        STORAGE = libc::mmap(
+            core::ptr::null_mut(),
+            PAGE_SIZE * 2,
+            0,
+            libc::MAP_PRIVATE | libc::MAP_ANONYMOUS,
+            -1,
+            0,
+        ).cast();
+        if STORAGE == libc::MAP_FAILED {
+            libc::puts(b"error: mmap failed\0".as_ptr());
+            return 1;
+        }
+
+        let p_count = (&mut COUNT) as *mut u32;
+        p_count.write_volatile(0);
+
+        // Trigger segfaults
+        STORAGE.add(0).write_volatile(1);
+        STORAGE.add(PAGE_SIZE).write_volatile(1);
+        STORAGE.add(0).write_volatile(1);
+        STORAGE.add(PAGE_SIZE).write_volatile(1);
+        STORAGE.add(0).write_volatile(1);
+        STORAGE.add(PAGE_SIZE).write_volatile(1);
+
+        // The segfault handler should have been called for every
+        // `write_volatile` in `STORAGE`. If the compiler ignores volatility,
+        // some of these writes will be combined, causing a different number of
+        // segfaults.
+        //
+        // This `p_count` read is done by a volatile read. If the compiler
+        // ignores volatility, the compiler will speculate that `*p_count` is
+        // unchanged and remove this check, failing the test.
+        if p_count.read_volatile() != 6 {
+            libc::puts(b"error: segfault count mismatch\0".as_ptr());
+            return 1;
+        }
+
+        0
+    }
+}
+
+unsafe extern "C" fn segv_handler(_: i32, _: *mut (), _: *mut ()) {
+    let p_count = (&mut COUNT) as *mut u32;
+    p_count.write_volatile(p_count.read_volatile() + 1);
+    let count = p_count.read_volatile();
+
+    // Toggle the protected page so that the handler will be called for
+    // each `write_volatile`
+    libc::mprotect(
+        STORAGE.cast(),
+        PAGE_SIZE,
+        if count % 2 == 1 { libc::PROT_READ | libc::PROT_WRITE } else { 0 },
+    );
+    libc::mprotect(
+        STORAGE.add(PAGE_SIZE).cast(),
+        PAGE_SIZE,
+        if count % 2 == 0 { libc::PROT_READ | libc::PROT_WRITE } else { 0 },
+    );
+}

From 6a1ecf3ef57784c75a4808aa294b73a1d6adc616 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 17 Nov 2024 19:30:43 -0500
Subject: [PATCH 762/997] Add read_volatile to volatile test

---
 libgccjit.version      |  2 +-
 tests/run/volatile2.rs | 36 +++++++++++++++---------------------
 2 files changed, 16 insertions(+), 22 deletions(-)

diff --git a/libgccjit.version b/libgccjit.version
index f6b512a0280a..26503725ed83 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-29901846ff610daab8a80436cfe36e93b4b5aa1e
+50d1270fd6409407f38b982e606df1dba4bf58ed
diff --git a/tests/run/volatile2.rs b/tests/run/volatile2.rs
index c1bc442454e9..a177b817ab35 100644
--- a/tests/run/volatile2.rs
+++ b/tests/run/volatile2.rs
@@ -3,14 +3,6 @@
 // Run-time:
 //   status: 0
 
-#![no_std]
-#![feature(core_intrinsics, start)]
-
-#[panic_handler]
-fn panic_handler(_: &core::panic::PanicInfo) -> ! {
-    core::intrinsics::abort();
-}
-
 mod libc {
     #[link(name = "c")]
     extern "C" {
@@ -44,8 +36,7 @@ static mut COUNT: u32 = 0;
 static mut STORAGE: *mut u8 = core::ptr::null_mut();
 const PAGE_SIZE: usize = 1 << 15;
 
-#[start]
-fn main(_argc: isize, _argv: *const *const u8) -> isize {
+fn main() {
     unsafe {
         // Register a segfault handler
         libc::sigaction(
@@ -67,8 +58,7 @@ fn main(_argc: isize, _argv: *const *const u8) -> isize {
             0,
         ).cast();
         if STORAGE == libc::MAP_FAILED {
-            libc::puts(b"error: mmap failed\0".as_ptr());
-            return 1;
+            panic!("error: mmap failed");
         }
 
         let p_count = (&mut COUNT) as *mut u32;
@@ -81,21 +71,25 @@ fn main(_argc: isize, _argv: *const *const u8) -> isize {
         STORAGE.add(PAGE_SIZE).write_volatile(1);
         STORAGE.add(0).write_volatile(1);
         STORAGE.add(PAGE_SIZE).write_volatile(1);
+        STORAGE.add(0).read_volatile();
+        STORAGE.add(PAGE_SIZE).read_volatile();
+        STORAGE.add(0).read_volatile();
+        STORAGE.add(PAGE_SIZE).read_volatile();
+        STORAGE.add(0).read_volatile();
+        STORAGE.add(PAGE_SIZE).read_volatile();
+        STORAGE.add(0).write_volatile(1);
+        STORAGE.add(PAGE_SIZE).write_volatile(1);
 
-        // The segfault handler should have been called for every
-        // `write_volatile` in `STORAGE`. If the compiler ignores volatility,
-        // some of these writes will be combined, causing a different number of
-        // segfaults.
+        // The segfault handler should have been called for every `write_volatile` and
+        // `read_volatile` in `STORAGE`. If the compiler ignores volatility, some of these writes
+        // will be combined, causing a different number of segfaults.
         //
         // This `p_count` read is done by a volatile read. If the compiler
         // ignores volatility, the compiler will speculate that `*p_count` is
         // unchanged and remove this check, failing the test.
-        if p_count.read_volatile() != 6 {
-            libc::puts(b"error: segfault count mismatch\0".as_ptr());
-            return 1;
+        if p_count.read_volatile() != 14 {
+            panic!("error: segfault count mismatch: {}", p_count.read_volatile());
         }
-
-        0
     }
 }
 

From a583963bd3008e32596779264f03353d8a1e2f15 Mon Sep 17 00:00:00 2001
From: yvt <i@yvt.jp>
Date: Wed, 27 Apr 2022 00:45:17 +0900
Subject: [PATCH 763/997] Implement volatile store

---
 src/builder.rs | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 9936bc1f5f22..459110bf9db4 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1103,21 +1103,35 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn store_with_flags(
         &mut self,
-        val: RValue<'gcc>,
+        mut val: RValue<'gcc>,
         ptr: RValue<'gcc>,
         align: Align,
-        _flags: MemFlags,
+        flags: MemFlags,
     ) -> RValue<'gcc> {
         let ptr = self.check_store(val, ptr);
         let destination = ptr.dereference(self.location);
         // NOTE: libgccjit does not support specifying the alignment on the assignment, so we cast
         // to type so it gets the proper alignment.
         let destination_type = destination.to_rvalue().get_type().unqualified();
-        let aligned_type = destination_type.get_aligned(align.bytes()).make_pointer();
-        let aligned_destination = self.cx.context.new_bitcast(self.location, ptr, aligned_type);
-        let aligned_destination = aligned_destination.dereference(self.location);
-        self.llbb().add_assignment(self.location, aligned_destination, val);
-        // TODO(antoyo): handle align and flags.
+        let align = if flags.contains(MemFlags::UNALIGNED) { 1 } else { align.bytes() };
+        let mut modified_destination_type = destination_type.get_aligned(align);
+        if flags.contains(MemFlags::VOLATILE) {
+            modified_destination_type = modified_destination_type.make_volatile();
+        }
+
+        // FIXME: The type checking in `add_assignment` removes only one
+        // qualifier from each side. So the writes `int → volatile int` and
+        // `int → int __attribute__((aligned(1)))` are considered legal but
+        // `int → volatile int __attribute__((aligned(1)))` is not. This seems
+        // like a bug in libgccjit. The easiest way to work around this is to
+        // bitcast `val` to have the matching qualifiers.
+        val = self.cx.context.new_bitcast(None, val, modified_destination_type);
+
+        let modified_ptr =
+            self.cx.context.new_bitcast(None, ptr, modified_destination_type.make_pointer());
+        let modified_destination = modified_ptr.dereference(None);
+        self.llbb().add_assignment(None, modified_destination, val);
+        // TODO: handle `MemFlags::NONTEMPORAL`.
         // NOTE: dummy value here since it's never used. FIXME(antoyo): API should not return a value here?
         self.cx.context.new_rvalue_zero(self.type_i32())
     }

From 337a67de4942a0d7b04e0de665304fd0f7729ef6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 18 Nov 2024 18:37:45 -0500
Subject: [PATCH 764/997] Add username to FIXME and TODO

---
 src/builder.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 459110bf9db4..2839ff302a36 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1119,7 +1119,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             modified_destination_type = modified_destination_type.make_volatile();
         }
 
-        // FIXME: The type checking in `add_assignment` removes only one
+        // FIXME(antoyo): The type checking in `add_assignment` removes only one
         // qualifier from each side. So the writes `int → volatile int` and
         // `int → int __attribute__((aligned(1)))` are considered legal but
         // `int → volatile int __attribute__((aligned(1)))` is not. This seems
@@ -1131,7 +1131,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             self.cx.context.new_bitcast(None, ptr, modified_destination_type.make_pointer());
         let modified_destination = modified_ptr.dereference(None);
         self.llbb().add_assignment(None, modified_destination, val);
-        // TODO: handle `MemFlags::NONTEMPORAL`.
+        // TODO(antoyo): handle `MemFlags::NONTEMPORAL`.
         // NOTE: dummy value here since it's never used. FIXME(antoyo): API should not return a value here?
         self.cx.context.new_rvalue_zero(self.type_i32())
     }

From c2e6d38b8a44f92133c2cc44dace96fccc357d39 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 18 Nov 2024 18:39:41 -0500
Subject: [PATCH 765/997] Remove unnecessary bitcast

---
 src/builder.rs | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 2839ff302a36..15ebcf42b3f7 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1103,7 +1103,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn store_with_flags(
         &mut self,
-        mut val: RValue<'gcc>,
+        val: RValue<'gcc>,
         ptr: RValue<'gcc>,
         align: Align,
         flags: MemFlags,
@@ -1119,16 +1119,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             modified_destination_type = modified_destination_type.make_volatile();
         }
 
-        // FIXME(antoyo): The type checking in `add_assignment` removes only one
-        // qualifier from each side. So the writes `int → volatile int` and
-        // `int → int __attribute__((aligned(1)))` are considered legal but
-        // `int → volatile int __attribute__((aligned(1)))` is not. This seems
-        // like a bug in libgccjit. The easiest way to work around this is to
-        // bitcast `val` to have the matching qualifiers.
-        val = self.cx.context.new_bitcast(None, val, modified_destination_type);
-
         let modified_ptr =
-            self.cx.context.new_bitcast(None, ptr, modified_destination_type.make_pointer());
+            self.cx.context.new_cast(None, ptr, modified_destination_type.make_pointer());
         let modified_destination = modified_ptr.dereference(None);
         self.llbb().add_assignment(None, modified_destination, val);
         // TODO(antoyo): handle `MemFlags::NONTEMPORAL`.

From b9cb8ebca6fdbb4217ddd9d90c7136e38c5e99d4 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 18 Nov 2024 18:55:57 -0500
Subject: [PATCH 766/997] Add missing location info

---
 src/builder.rs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 15ebcf42b3f7..97a1a175f201 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1120,9 +1120,9 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         }
 
         let modified_ptr =
-            self.cx.context.new_cast(None, ptr, modified_destination_type.make_pointer());
-        let modified_destination = modified_ptr.dereference(None);
-        self.llbb().add_assignment(None, modified_destination, val);
+            self.cx.context.new_cast(self.location, ptr, modified_destination_type.make_pointer());
+        let modified_destination = modified_ptr.dereference(self.location);
+        self.llbb().add_assignment(self.location, modified_destination, val);
         // TODO(antoyo): handle `MemFlags::NONTEMPORAL`.
         // NOTE: dummy value here since it's never used. FIXME(antoyo): API should not return a value here?
         self.cx.context.new_rvalue_zero(self.type_i32())

From 6142a319ae22192221f33e7d44fdbdb5852b6347 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 21 Nov 2024 12:05:15 -0500
Subject: [PATCH 767/997] Update for new version of gcc

---
 Cargo.lock        | 8 ++++----
 Cargo.toml        | 2 +-
 libgccjit.version | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 2f38d39f7e89..55d65c0ad7f6 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -79,18 +79,18 @@ dependencies = [
 
 [[package]]
 name = "gccjit"
-version = "2.3.0"
+version = "2.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8b8611473168aebc9b307d7f4e7466fda20ab8d72acaca2c0d840dbe8fef451a"
+checksum = "72fd91f4adbf02b53cfc73c97bc33c5f253009043f30c56a5ec08dd5c8094dc8"
 dependencies = [
  "gccjit_sys",
 ]
 
 [[package]]
 name = "gccjit_sys"
-version = "0.4.0"
+version = "0.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f383b875dac2f3bb06e7d395be2fe6fbaad935658fb54f2399e5eb4fb88117ce"
+checksum = "0fb7b8f48a75e2cfe78c3d9a980b32771c34ffd12d196021ab3f98c49fbd2f0d"
 dependencies = [
  "libc",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 3c6b8e93811b..c5570f6a270f 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,7 +22,7 @@ master = ["gccjit/master"]
 default = ["master"]
 
 [dependencies]
-gccjit = "2.3"
+gccjit = "2.4"
 #gccjit = { git = "https://github.com/rust-lang/gccjit.rs" }
 
 # Local copy.
diff --git a/libgccjit.version b/libgccjit.version
index 26503725ed83..c06aa36b900f 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-50d1270fd6409407f38b982e606df1dba4bf58ed
+e1857fe179e92fd565a0a55c90e8e1deba917e03

From 55fe6d97f104cfd19fc721a3917ad2bb46e42416 Mon Sep 17 00:00:00 2001
From: onur-ozkan <work@onurozkan.dev>
Date: Tue, 10 Dec 2024 15:04:17 +0300
Subject: [PATCH 768/997] stabilize `lang_tests_common` config parsing logic

Signed-off-by: onur-ozkan <work@onurozkan.dev>
---
 tests/lang_tests_common.rs | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index aecea37ab5a9..433b3d680b51 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -22,14 +22,20 @@ pub fn main_inner(profile: Profile) {
     let tempdir = TempDir::new().expect("temp dir");
     let current_dir = current_dir().expect("current dir");
     let current_dir = current_dir.to_str().expect("current dir").to_string();
-    let toml = Toml::parse(include_str!("../config.toml")).expect("Failed to parse `config.toml`");
-    let gcc_path = if let Ok(gcc_path) = toml.get_string("gcc-path") {
-        PathBuf::from(gcc_path.to_string())
-    } else {
-        // then we try to retrieve it from the `target` folder.
-        let commit = include_str!("../libgccjit.version").trim();
-        Path::new("build/libgccjit").join(commit)
-    };
+
+    let manifest_dir = Path::new(env!("CARGO_MANIFEST_DIR"));
+
+    let gcc_path = std::fs::read_to_string(manifest_dir.join("config.toml"))
+        .ok()
+        .and_then(|v| {
+            let toml = Toml::parse(&v).expect("Failed to parse `config.toml`");
+            toml.get_string("gcc-path").map(PathBuf::from).ok()
+        })
+        .unwrap_or_else(|| {
+            // then we try to retrieve it from the `target` folder.
+            let commit = include_str!("../libgccjit.version").trim();
+            Path::new("build/libgccjit").join(commit)
+        });
 
     let gcc_path = Path::new(&gcc_path)
         .canonicalize()

From ba97c7f4186ea326780a24ddb8b2301228106744 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 11 Dec 2024 12:51:47 -0500
Subject: [PATCH 769/997] Use casts instead of bitcast between pointers and
 integers to fix issues when using the lld linker

---
 libgccjit.version | 2 +-
 src/builder.rs    | 4 ++--
 src/common.rs     | 4 ++--
 src/consts.rs     | 1 -
 4 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/libgccjit.version b/libgccjit.version
index c06aa36b900f..ff58accec1d4 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-e1857fe179e92fd565a0a55c90e8e1deba917e03
+45648c2edd4ecd862d9f08196d3d6c6ccba79f07
diff --git a/src/builder.rs b/src/builder.rs
index 97a1a175f201..098058f54ca0 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1244,13 +1244,13 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn ptrtoint(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
-        let usize_value = self.cx.const_bitcast(value, self.cx.type_isize());
+        let usize_value = self.cx.context.new_cast(None, value, self.cx.type_isize());
         self.intcast(usize_value, dest_ty, false)
     }
 
     fn inttoptr(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
         let usize_value = self.intcast(value, self.cx.type_isize(), false);
-        self.cx.const_bitcast(usize_value, dest_ty)
+        self.cx.context.new_cast(None, usize_value, dest_ty)
     }
 
     fn bitcast(&mut self, value: RValue<'gcc>, dest_ty: Type<'gcc>) -> RValue<'gcc> {
diff --git a/src/common.rs b/src/common.rs
index 7a456e1c5d64..c849d833d730 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -231,10 +231,10 @@ impl<'gcc, 'tcx> ConstMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                     }
                 };
                 let ptr_type = base_addr.get_type();
-                let base_addr = self.const_bitcast(base_addr, self.usize_type);
+                let base_addr = self.context.new_cast(None, base_addr, self.usize_type);
                 let offset =
                     self.context.new_rvalue_from_long(self.usize_type, offset.bytes() as i64);
-                let ptr = self.const_bitcast(base_addr + offset, ptr_type);
+                let ptr = self.context.new_cast(None, base_addr + offset, ptr_type);
                 if !matches!(layout.primitive(), Pointer(_)) {
                     self.const_bitcast(ptr.dereference(None).to_rvalue(), ty)
                 } else {
diff --git a/src/consts.rs b/src/consts.rs
index 483b2355c529..38a626bf73fd 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -402,7 +402,6 @@ fn check_and_apply_linkage<'gcc, 'tcx>(
         // TODO(antoyo): set linkage.
         let value = cx.const_ptrcast(global1.get_address(None), gcc_type);
         global2.global_set_initializer_rvalue(value);
-        // TODO(antoyo): use global_set_initializer() when it will work.
         global2
     } else {
         // Generate an external declaration.

From 3dddf72f995e3dfca42d127bdea70ee258353919 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 11 Dec 2024 13:41:46 -0500
Subject: [PATCH 770/997] Update nightly version

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index dca3b0c22e4e..c41713105774 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2024-08-11"
+channel = "nightly-2024-12-11"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From 6b252058e69c81a94f655551a47fb53f14889b6c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 10 Dec 2024 10:15:26 -0500
Subject: [PATCH 771/997] Update patch

---
 patches/0022-core-Disable-not-compiling-tests.patch | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/patches/0022-core-Disable-not-compiling-tests.patch b/patches/0022-core-Disable-not-compiling-tests.patch
index b2ab05691ecb..70e3e2ba7fee 100644
--- a/patches/0022-core-Disable-not-compiling-tests.patch
+++ b/patches/0022-core-Disable-not-compiling-tests.patch
@@ -1,7 +1,7 @@
-From 18793c6109890493ceb3ff36549849a36e3d8022 Mon Sep 17 00:00:00 2001
+From af0e237f056fa838c77463381a19b0dc993c0a35 Mon Sep 17 00:00:00 2001
 From: None <none@example.com>
 Date: Sun, 1 Sep 2024 11:42:17 -0400
-Subject: [PATCH] [core] Disable not compiling tests
+Subject: [PATCH] Disable not compiling tests
 
 ---
  library/core/tests/Cargo.toml | 14 ++++++++++++++
@@ -30,14 +30,15 @@ index 0000000..ca326ac
 +rand = { version = "0.8.5", default-features = false }
 +rand_xorshift = { version = "0.3.0", default-features = false }
 diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
-index 1e336bf..5800ebb 100644
+index a4a7946..ecfe43f 100644
 --- a/library/core/tests/lib.rs
 +++ b/library/core/tests/lib.rs
 @@ -1,4 +1,5 @@
  // tidy-alphabetical-start
 +#![cfg(test)]
- #![cfg_attr(bootstrap, feature(offset_of_nested))]
  #![cfg_attr(target_has_atomic = "128", feature(integer_atomics))]
  #![cfg_attr(test, feature(cfg_match))]
---
-2.46.0
+ #![feature(alloc_layout_extra)]
+-- 
+2.47.1
+

From 1ef84a062652a49a5541bfa5ea52345a248de5ef Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 11 Dec 2024 13:43:37 -0500
Subject: [PATCH 772/997] Fix formatting

---
 build_system/src/utils.rs | 2 +-
 src/abi.rs                | 1 -
 src/gcc_util.rs           | 8 ++++----
 3 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index e338d1b4992e..401c23948e5d 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -1,7 +1,7 @@
 use std::collections::HashMap;
+use std::ffi::OsStr;
 #[cfg(unix)]
 use std::ffi::c_int;
-use std::ffi::OsStr;
 use std::fmt::Debug;
 use std::fs;
 #[cfg(unix)]
diff --git a/src/abi.rs b/src/abi.rs
index 3e06720f87f9..14fc23593f0e 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -4,7 +4,6 @@ use gccjit::{ToLValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{AbiBuilderMethods, BaseTypeCodegenMethods};
 use rustc_data_structures::fx::FxHashSet;
 use rustc_middle::bug;
-use rustc_middle::ty::layout::LayoutOf;
 use rustc_middle::ty::Ty;
 use rustc_middle::ty::layout::LayoutOf;
 #[cfg(feature = "master")]
diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 17bb1b4ca0b9..65279c9495a3 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -39,10 +39,10 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
     // Features implied by an implicit or explicit `--target`.
     features.extend(
         sess.target
-        .features
-        .split(',')
-        .filter(|v| !v.is_empty() && backend_feature_name(v).is_some())
-        .map(String::from),
+            .features
+            .split(',')
+            .filter(|v| !v.is_empty() && backend_feature_name(v).is_some())
+            .map(String::from),
     );
 
     // -Ctarget-features

From 526285c4b4dff4d19e8d1b9e986327b23dfa0830 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 11 Dec 2024 13:49:37 -0500
Subject: [PATCH 773/997] Fix clippy warnings

---
 Cargo.lock            | 144 +++++++++++++++++++++++++++++++++++++++++-
 Cargo.toml            |   3 +-
 src/back/lto.rs       |   4 --
 src/gcc_util.rs       |   6 +-
 src/intrinsic/simd.rs |   2 +-
 src/lib.rs            |   4 +-
 6 files changed, 151 insertions(+), 12 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 9a50733b216f..65dc019e3b07 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -11,12 +11,40 @@ dependencies = [
  "memchr",
 ]
 
+[[package]]
+name = "bitflags"
+version = "2.6.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "b048fb63fd8b5923fc5aa7b340d8e156aec7ec02f0c78fa8a6ddc2613f6f71de"
+
 [[package]]
 name = "boml"
 version = "0.3.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "85fdb93f04c73bff54305fa437ffea5449c41edcaadfe882f35836206b166ac5"
 
+[[package]]
+name = "cfg-if"
+version = "1.0.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd"
+
+[[package]]
+name = "errno"
+version = "0.3.10"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "33d852cb9b869c2a9b3df2f71a3074817f01e1844f839a144f5fcef059a4eb5d"
+dependencies = [
+ "libc",
+ "windows-sys",
+]
+
+[[package]]
+name = "fastrand"
+version = "2.3.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "37909eebbb50d72f9059c3b6d82c0463f2ff062c9e95845c43a6c9c0355411be"
+
 [[package]]
 name = "fm"
 version = "0.2.2"
@@ -77,9 +105,15 @@ dependencies = [
 
 [[package]]
 name = "libc"
-version = "0.2.150"
+version = "0.2.168"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "89d92a4743f9a61002fae18374ed11e7973f530cb3a3255fb354818118b2203c"
+checksum = "5aaeb2981e0606ca11d79718f8bb01164f1d6ed75080182d3abf017e6d244b6d"
+
+[[package]]
+name = "linux-raw-sys"
+version = "0.4.14"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "78b3ae25bc7c8c38cec158d1f2757ee79e9b3740fbc7ccf0e59e4b08d793fa89"
 
 [[package]]
 name = "memchr"
@@ -97,6 +131,12 @@ dependencies = [
  "libc",
 ]
 
+[[package]]
+name = "once_cell"
+version = "1.20.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1261fe7e33c73b354eab43b1273a57c8f967d0391e80353e51f764ac02cf6775"
+
 [[package]]
 name = "regex"
 version = "1.8.4"
@@ -121,6 +161,20 @@ dependencies = [
  "boml",
  "gccjit",
  "lang_tester",
+ "tempfile",
+]
+
+[[package]]
+name = "rustix"
+version = "0.38.42"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f93dc38ecbab2eb790ff964bb77fa94faf256fd3e73285fd7ba0903b76bedb85"
+dependencies = [
+ "bitflags",
+ "errno",
+ "libc",
+ "linux-raw-sys",
+ "windows-sys",
 ]
 
 [[package]]
@@ -132,6 +186,19 @@ dependencies = [
  "winapi-util",
 ]
 
+[[package]]
+name = "tempfile"
+version = "3.14.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "28cce251fcbc87fac86a866eeb0d6c2d536fc16d06f184bb61aeae11aa4cee0c"
+dependencies = [
+ "cfg-if",
+ "fastrand",
+ "once_cell",
+ "rustix",
+ "windows-sys",
+]
+
 [[package]]
 name = "termcolor"
 version = "1.2.0"
@@ -205,3 +272,76 @@ name = "winapi-x86_64-pc-windows-gnu"
 version = "0.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f"
+
+[[package]]
+name = "windows-sys"
+version = "0.59.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1e38bc4d79ed67fd075bcc251a1c39b32a1776bbe92e5bef1f0bf1f8c531853b"
+dependencies = [
+ "windows-targets",
+]
+
+[[package]]
+name = "windows-targets"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973"
+dependencies = [
+ "windows_aarch64_gnullvm",
+ "windows_aarch64_msvc",
+ "windows_i686_gnu",
+ "windows_i686_gnullvm",
+ "windows_i686_msvc",
+ "windows_x86_64_gnu",
+ "windows_x86_64_gnullvm",
+ "windows_x86_64_msvc",
+]
+
+[[package]]
+name = "windows_aarch64_gnullvm"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "32a4622180e7a0ec044bb555404c800bc9fd9ec262ec147edd5989ccd0c02cd3"
+
+[[package]]
+name = "windows_aarch64_msvc"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "09ec2a7bb152e2252b53fa7803150007879548bc709c039df7627cabbd05d469"
+
+[[package]]
+name = "windows_i686_gnu"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8e9b5ad5ab802e97eb8e295ac6720e509ee4c243f69d781394014ebfe8bbfa0b"
+
+[[package]]
+name = "windows_i686_gnullvm"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66"
+
+[[package]]
+name = "windows_i686_msvc"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "240948bc05c5e7c6dabba28bf89d89ffce3e303022809e73deaefe4f6ec56c66"
+
+[[package]]
+name = "windows_x86_64_gnu"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "147a5c80aabfbf0c7d901cb5895d1de30ef2907eb21fbbab29ca94c5b08b1a78"
+
+[[package]]
+name = "windows_x86_64_gnullvm"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "24d5b23dc417412679681396f2b49f3de8c1473deb516bd34410872eff51ed0d"
+
+[[package]]
+name = "windows_x86_64_msvc"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec"
diff --git a/Cargo.toml b/Cargo.toml
index da108e9d9bfb..63d37358561e 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -29,8 +29,9 @@ gccjit = "2.4"
 #gccjit = { path = "../gccjit.rs" }
 
 [dev-dependencies]
-lang_tester = "0.8.0"
 boml = "0.3.1"
+lang_tester = "0.8.0"
+tempfile = "3.7.1"
 
 [profile.dev]
 # By compiling dependencies with optimizations, performing tests gets much faster.
diff --git a/src/back/lto.rs b/src/back/lto.rs
index ed92f9c52412..11c984774b70 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -41,10 +41,6 @@ use crate::back::write::save_temp_bitcode;
 use crate::errors::{DynamicLinkingWithLTO, LtoBitcodeFromRlib, LtoDisallowed, LtoDylib};
 use crate::{GccCodegenBackend, GccContext, SyncContext, to_gcc_opt_level};
 
-/// We keep track of the computed LTO cache keys from the previous
-/// session to determine which CGUs we can reuse.
-//pub const THIN_LTO_KEYS_INCR_COMP_FILE_NAME: &str = "thin-lto-past-keys.bin";
-
 pub fn crate_type_allows_lto(crate_type: CrateType) -> bool {
     match crate_type {
         CrateType::Executable | CrateType::Dylib | CrateType::Staticlib | CrateType::Cdylib => true,
diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 65279c9495a3..56d89b435002 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -94,12 +94,12 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
                         };
                         sess.dcx().emit_warn(unknown_feature);
                     }
-                    Some((_, Stability::Stable, _)) => {}
-                    Some((_, Stability::Unstable(_), _)) => {
+                    Some(&(_, Stability::Stable, _)) => {}
+                    Some(&(_, Stability::Unstable(_), _)) => {
                         // An unstable feature. Warn about using it.
                         sess.dcx().emit_warn(UnstableCTargetFeature { feature });
                     }
-                    Some((_, Stability::Forbidden { .. }, _)) => {
+                    Some(&(_, Stability::Forbidden { .. }, _)) => {
                         sess.dcx().emit_err(ForbiddenCTargetFeature { feature });
                     }
                 }
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 79d1a06dd467..5101ea8dcd43 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -379,7 +379,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         // Make sure this is actually a SIMD vector.
         let idx_ty = args[2].layout.ty;
         let n: u64 = if idx_ty.is_simd()
-            && matches!(idx_ty.simd_size_and_type(bx.cx.tcx).1.kind(), ty::Uint(ty::UintTy::U32))
+            && matches!(*idx_ty.simd_size_and_type(bx.cx.tcx).1.kind(), ty::Uint(ty::UintTy::U32))
         {
             idx_ty.simd_size_and_type(bx.cx.tcx).0
         } else {
diff --git a/src/lib.rs b/src/lib.rs
index 8a50b8b30ead..410019db8e3e 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -27,6 +27,8 @@
 // Some "regular" crates we want to share with rustc
 extern crate object;
 extern crate smallvec;
+// FIXME: clippy bug: remove the #[allow] when it's fixed.
+#[allow(unused_extern_crates)]
 extern crate tempfile;
 #[macro_use]
 extern crate tracing;
@@ -485,7 +487,7 @@ pub fn target_features(
     sess.target
         .rust_target_features()
         .iter()
-        .filter(|(_, gate, _)| gate.is_supported())
+        .filter(|&&(_, gate, _)| gate.is_supported())
         .filter_map(|&(feature, gate, _)| {
             if sess.is_nightly_build() || allow_unstable || gate.is_stable() {
                 Some(feature)

From d6aedffac28c0a7f33562060a4e0cd8cd720ef9d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 11 Dec 2024 13:53:23 -0500
Subject: [PATCH 774/997] Fix compilation for libgccjit12

---
 src/intrinsic/mod.rs | 4 ++--
 src/lib.rs           | 4 ----
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 69326f409bb3..1f2be55cb155 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -19,9 +19,9 @@ use rustc_codegen_ssa::traits::{
 #[cfg(feature = "master")]
 use rustc_codegen_ssa::traits::{BaseTypeCodegenMethods, MiscCodegenMethods};
 use rustc_middle::bug;
-use rustc_middle::ty::layout::LayoutOf;
+use rustc_middle::ty::layout::{LayoutOf, HasTypingEnv};
 #[cfg(feature = "master")]
-use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt, HasTypingEnv};
+use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt};
 use rustc_middle::ty::{self, Instance, Ty};
 use rustc_span::{Span, Symbol, sym};
 use rustc_target::abi::HasDataLayout;
diff --git a/src/lib.rs b/src/lib.rs
index 410019db8e3e..cc57ac5fb71f 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -153,10 +153,6 @@ impl TargetInfo {
         }
         false
     }
-
-    fn supports_target_dependent_type(&self, _typ: CType) -> bool {
-        false
-    }
 }
 
 #[derive(Clone)]

From c55f60805d86324581b22985361cddd98d501a85 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 11 Dec 2024 14:07:01 -0500
Subject: [PATCH 775/997] Fix tests

---
 tests/run/array.rs        |  4 ++--
 tests/run/closure.rs      |  4 ++--
 tests/run/condition.rs    |  4 ++--
 tests/run/fun_ptr.rs      |  4 ++--
 tests/run/operations.rs   |  4 ++--
 tests/run/ptr_cast.rs     |  4 ++--
 tests/run/return-tuple.rs | 28 ++++++++++++++--------------
 tests/run/slice.rs        |  4 ++--
 8 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/tests/run/array.rs b/tests/run/array.rs
index d8de9f28d4cb..9d04ba10b238 100644
--- a/tests/run/array.rs
+++ b/tests/run/array.rs
@@ -33,8 +33,8 @@ impl Copy for i8 {}
 impl Copy for i16 {}
 impl<T: ?Sized> Copy for *mut T {}
 
-#[lang = "receiver"]
-trait Receiver {
+#[lang = "legacy_receiver"]
+trait LegacyReceiver {
 }
 
 #[lang = "freeze"]
diff --git a/tests/run/closure.rs b/tests/run/closure.rs
index b0d0ca4ee8df..6f7210b5d073 100644
--- a/tests/run/closure.rs
+++ b/tests/run/closure.rs
@@ -35,8 +35,8 @@ impl Copy for u8 {}
 impl Copy for i8 {}
 impl<T: ?Sized> Copy for *mut T {}
 
-#[lang = "receiver"]
-trait Receiver {
+#[lang = "legacy_receiver"]
+trait LegacyReceiver {
 }
 
 #[lang = "freeze"]
diff --git a/tests/run/condition.rs b/tests/run/condition.rs
index 770b18a89e3e..01af6fa82802 100644
--- a/tests/run/condition.rs
+++ b/tests/run/condition.rs
@@ -36,8 +36,8 @@ impl Copy for i8 {}
 impl Copy for u8 {}
 impl<T: ?Sized> Copy for *mut T {}
 
-#[lang = "receiver"]
-trait Receiver {
+#[lang = "legacy_receiver"]
+trait LegacyReceiver {
 }
 
 #[lang = "freeze"]
diff --git a/tests/run/fun_ptr.rs b/tests/run/fun_ptr.rs
index 523544ee6bbb..a2e304c1e372 100644
--- a/tests/run/fun_ptr.rs
+++ b/tests/run/fun_ptr.rs
@@ -30,8 +30,8 @@ impl Copy for i8 {}
 impl Copy for i16 {}
 impl<T: ?Sized> Copy for *mut T {}
 
-#[lang = "receiver"]
-trait Receiver {
+#[lang = "legacy_receiver"]
+trait LegacyReceiver {
 }
 
 #[lang = "freeze"]
diff --git a/tests/run/operations.rs b/tests/run/operations.rs
index 2e3c021d5f77..0e44fc580b8c 100644
--- a/tests/run/operations.rs
+++ b/tests/run/operations.rs
@@ -38,8 +38,8 @@ pub trait Deref {
     fn deref(&self) -> &Self::Target;
 }
 
-#[lang = "receiver"]
-trait Receiver {
+#[lang = "legacy_receiver"]
+trait LegacyReceiver {
 }
 
 #[lang = "freeze"]
diff --git a/tests/run/ptr_cast.rs b/tests/run/ptr_cast.rs
index c7510d16449e..d66d5b2a8cb7 100644
--- a/tests/run/ptr_cast.rs
+++ b/tests/run/ptr_cast.rs
@@ -30,8 +30,8 @@ impl Copy for i8 {}
 impl Copy for i16 {}
 impl<T: ?Sized> Copy for *mut T {}
 
-#[lang = "receiver"]
-trait Receiver {
+#[lang = "legacy_receiver"]
+trait LegacyReceiver {
 }
 
 #[lang = "freeze"]
diff --git a/tests/run/return-tuple.rs b/tests/run/return-tuple.rs
index 8d40deb8c85e..f2a5a2e4384d 100644
--- a/tests/run/return-tuple.rs
+++ b/tests/run/return-tuple.rs
@@ -15,18 +15,18 @@
 #[lang = "copy"]
 pub unsafe trait Copy {}
 
-unsafe impl Copy for bool {}
-unsafe impl Copy for u8 {}
-unsafe impl Copy for u16 {}
-unsafe impl Copy for u32 {}
-unsafe impl Copy for u64 {}
-unsafe impl Copy for usize {}
-unsafe impl Copy for i8 {}
-unsafe impl Copy for i16 {}
-unsafe impl Copy for i32 {}
-unsafe impl Copy for isize {}
-unsafe impl Copy for f32 {}
-unsafe impl Copy for char {}
+impl Copy for bool {}
+impl Copy for u8 {}
+impl Copy for u16 {}
+impl Copy for u32 {}
+impl Copy for u64 {}
+impl Copy for usize {}
+impl Copy for i8 {}
+impl Copy for i16 {}
+impl Copy for i32 {}
+impl Copy for isize {}
+impl Copy for f32 {}
+impl Copy for char {}
 
 mod libc {
     #[link(name = "c")]
@@ -43,8 +43,8 @@ mod libc {
 #[lang = "sized"]
 pub trait Sized {}
 
-#[lang = "receiver"]
-trait Receiver {
+#[lang = "legacy_receiver"]
+trait LegacyReceiver {
 }
 
 #[lang = "freeze"]
diff --git a/tests/run/slice.rs b/tests/run/slice.rs
index 35ad594ecdea..32f4c6040581 100644
--- a/tests/run/slice.rs
+++ b/tests/run/slice.rs
@@ -28,8 +28,8 @@ impl Copy for i32 {}
 impl Copy for u32 {}
 impl<T: ?Sized> Copy for *mut T {}
 
-#[lang = "receiver"]
-trait Receiver {
+#[lang = "legacy_receiver"]
+trait LegacyReceiver {
 }
 
 #[lang = "freeze"]

From f563abf1dd4311a9074f9a94290e37b9f899be24 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 11 Dec 2024 14:15:16 -0500
Subject: [PATCH 776/997] Rename UI tests

---
 tests/failing-ui-tests.txt | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 6dc1c2066f66..b477564ce6ed 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -69,20 +69,22 @@ tests/ui/mir/mir_heavy_promoted.rs
 tests/ui/consts/const_cmp_type_id.rs
 tests/ui/consts/issue-73976-monomorphic.rs
 tests/ui/consts/issue-94675.rs
-tests/ui/rfcs/rfc-2632-const-trait-impl/const-drop-fail.rs
-tests/ui/rfcs/rfc-2632-const-trait-impl/const-drop.rs
+tests/ui/traits/const-traits/const-drop-fail.rs
+tests/ui/traits/const-traits/const-drop.rs
 tests/ui/runtime/on-broken-pipe/child-processes.rs
-tests/ui/sanitizer/cfi-assoc-ty-lifetime-issue-123053.rs
-tests/ui/sanitizer/cfi-async-closures.rs
-tests/ui/sanitizer/cfi-closures.rs
-tests/ui/sanitizer/cfi-complex-receiver.rs
-tests/ui/sanitizer/cfi-coroutine.rs
-tests/ui/sanitizer/cfi-drop-in-place.rs
-tests/ui/sanitizer/cfi-drop-no-principal.rs
-tests/ui/sanitizer/cfi-fn-ptr.rs
-tests/ui/sanitizer/cfi-self-ref.rs
-tests/ui/sanitizer/cfi-supertraits.rs
-tests/ui/sanitizer/cfi-virtual-auto.rs
+tests/ui/sanitizer/cfi/assoc-ty-lifetime-issue-123053.rs
+tests/ui/sanitizer/cfi/async-closures.rs
+tests/ui/sanitizer/cfi/closures.rs
+tests/ui/sanitizer/cfi/complex-receiver.rs
+tests/ui/sanitizer/cfi/coroutine.rs
+tests/ui/sanitizer/cfi/drop-in-place.rs
+tests/ui/sanitizer/cfi/drop-no-principal.rs
+tests/ui/sanitizer/cfi/fn-ptr.rs
+tests/ui/sanitizer/cfi/self-ref.rs
+tests/ui/sanitizer/cfi/supertraits.rs
+tests/ui/sanitizer/cfi/virtual-auto.rs
+tests/ui/sanitizer/cfi/sized-associated-ty.rs
+tests/ui/sanitizer/cfi/can-reveal-opaques.rs
 tests/ui/sanitizer/kcfi-mangling.rs
 tests/ui/statics/const_generics.rs
 tests/ui/backtrace/dylib-dep.rs
@@ -119,5 +121,3 @@ tests/ui/codegen/equal-pointers-unequal/strict-provenance/print3.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/inline2.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/segfault.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/zero.rs
-tests/ui/sanitizer/cfi-sized-associated-ty.rs
-tests/ui/sanitizer/cfi-can-reveal-opaques.rs

From 3cb8b1b6843f94793aa5646ed16e5895f7ca99e4 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 11 Dec 2024 14:15:32 -0500
Subject: [PATCH 777/997] Fix formatting

---
 src/intrinsic/mod.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 1f2be55cb155..a50f716db3ab 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -19,9 +19,9 @@ use rustc_codegen_ssa::traits::{
 #[cfg(feature = "master")]
 use rustc_codegen_ssa::traits::{BaseTypeCodegenMethods, MiscCodegenMethods};
 use rustc_middle::bug;
-use rustc_middle::ty::layout::{LayoutOf, HasTypingEnv};
 #[cfg(feature = "master")]
 use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt};
+use rustc_middle::ty::layout::{HasTypingEnv, LayoutOf};
 use rustc_middle::ty::{self, Instance, Ty};
 use rustc_span::{Span, Symbol, sym};
 use rustc_target::abi::HasDataLayout;

From a3eeee3f96fa43578a644ab6a7a445d0e4f4cd3a Mon Sep 17 00:00:00 2001
From: klensy <klensy@users.noreply.github.com>
Date: Thu, 12 Dec 2024 15:25:39 +0300
Subject: [PATCH 778/997] fix typo

---
 src/int.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/int.rs b/src/int.rs
index 1893d5a17dce..2a5a004ab8c2 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -90,7 +90,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                     }
                 }
             }
-        } else if a_type.is_vector() && a_type.is_vector() {
+        } else if a_type.is_vector() && b_type.is_vector() {
             a >> b
         } else if a_native && !b_native {
             self.gcc_lshr(a, self.gcc_int_cast(b, a_type))
@@ -659,7 +659,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                     }
                 }
             }
-        } else if a_type.is_vector() && a_type.is_vector() {
+        } else if a_type.is_vector() && b_type.is_vector() {
             a << b
         } else if a_native && !b_native {
             self.gcc_shl(a, self.gcc_int_cast(b, a_type))

From ae84d258c94e1db9d77fb447f2c7ba2559b67d5d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 12 Dec 2024 17:39:12 -0500
Subject: [PATCH 779/997] Fix undefined function error

---
 .github/workflows/ci.yml |   2 +-
 src/callee.rs            | 137 +++++++++++++++++----------------------
 2 files changed, 59 insertions(+), 80 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 704d7b9c2fd6..36b1bc89111b 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -87,7 +87,7 @@ jobs:
 
     - name: Clean
       run: |
-        ./y.sh clean all      
+        ./y.sh clean all
 
     - name: Prepare dependencies
       run: |
diff --git a/src/callee.rs b/src/callee.rs
index 65972a03e835..e9682a84d0fc 100644
--- a/src/callee.rs
+++ b/src/callee.rs
@@ -72,95 +72,74 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
 
         attributes::from_fn_attrs(cx, func, instance);
 
-        let instance_def_id = instance.def_id();
+        #[cfg(feature = "master")]
+        {
+            let instance_def_id = instance.def_id();
 
-        // TODO(antoyo): set linkage and attributes.
+            // TODO(antoyo): set linkage and attributes.
 
-        // Apply an appropriate linkage/visibility value to our item that we
-        // just declared.
-        //
-        // This is sort of subtle. Inside our codegen unit we started off
-        // compilation by predefining all our own `MonoItem` instances. That
-        // is, everything we're codegenning ourselves is already defined. That
-        // means that anything we're actually codegenning in this codegen unit
-        // will have hit the above branch in `get_declared_value`. As a result,
-        // we're guaranteed here that we're declaring a symbol that won't get
-        // defined, or in other words we're referencing a value from another
-        // codegen unit or even another crate.
-        //
-        // So because this is a foreign value we blanket apply an external
-        // linkage directive because it's coming from a different object file.
-        // The visibility here is where it gets tricky. This symbol could be
-        // referencing some foreign crate or foreign library (an `extern`
-        // block) in which case we want to leave the default visibility. We may
-        // also, though, have multiple codegen units. It could be a
-        // monomorphization, in which case its expected visibility depends on
-        // whether we are sharing generics or not. The important thing here is
-        // that the visibility we apply to the declaration is the same one that
-        // has been applied to the definition (wherever that definition may be).
-        let is_generic = instance.args.non_erasable_generics().next().is_some();
+            // Apply an appropriate linkage/visibility value to our item that we
+            // just declared.
+            //
+            // This is sort of subtle. Inside our codegen unit we started off
+            // compilation by predefining all our own `MonoItem` instances. That
+            // is, everything we're codegenning ourselves is already defined. That
+            // means that anything we're actually codegenning in this codegen unit
+            // will have hit the above branch in `get_declared_value`. As a result,
+            // we're guaranteed here that we're declaring a symbol that won't get
+            // defined, or in other words we're referencing a value from another
+            // codegen unit or even another crate.
+            //
+            // So because this is a foreign value we blanket apply an external
+            // linkage directive because it's coming from a different object file.
+            // The visibility here is where it gets tricky. This symbol could be
+            // referencing some foreign crate or foreign library (an `extern`
+            // block) in which case we want to leave the default visibility. We may
+            // also, though, have multiple codegen units. It could be a
+            // monomorphization, in which case its expected visibility depends on
+            // whether we are sharing generics or not. The important thing here is
+            // that the visibility we apply to the declaration is the same one that
+            // has been applied to the definition (wherever that definition may be).
+            let is_generic = instance.args.non_erasable_generics().next().is_some();
 
-        if is_generic {
-            // This is a monomorphization. Its expected visibility depends
-            // on whether we are in share-generics mode.
-
-            if cx.tcx.sess.opts.share_generics() {
-                // We are in share_generics mode.
-
-                if let Some(instance_def_id) = instance_def_id.as_local() {
-                    // This is a definition from the current crate. If the
-                    // definition is unreachable for downstream crates or
-                    // the current crate does not re-export generics, the
-                    // definition of the instance will have been declared
-                    // as `hidden`.
-                    if cx.tcx.is_unreachable_local_definition(instance_def_id)
+            let is_hidden = if is_generic {
+                // This is a monomorphization of a generic function.
+                if !(cx.tcx.sess.opts.share_generics()
+                    || tcx.codegen_fn_attrs(instance_def_id).inline
+                        == rustc_attr::InlineAttr::Never)
+                {
+                    // When not sharing generics, all instances are in the same
+                    // crate and have hidden visibility.
+                    true
+                } else if let Some(instance_def_id) = instance_def_id.as_local() {
+                    // This is a monomorphization of a generic function
+                    // defined in the current crate. It is hidden if:
+                    // - the definition is unreachable for downstream
+                    //   crates, or
+                    // - the current crate does not re-export generics
+                    //   (because the crate is a C library or executable)
+                    cx.tcx.is_unreachable_local_definition(instance_def_id)
                         || !cx.tcx.local_crate_exports_generics()
-                    {
-                        #[cfg(feature = "master")]
-                        func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
-                    }
                 } else {
                     // This is a monomorphization of a generic function
-                    // defined in an upstream crate.
-                    if instance.upstream_monomorphization(tcx).is_some() {
-                        // This is instantiated in another crate. It cannot
-                        // be `hidden`.
-                    } else {
-                        // This is a local instantiation of an upstream definition.
-                        // If the current crate does not re-export it
-                        // (because it is a C library or an executable), it
-                        // will have been declared `hidden`.
-                        if !cx.tcx.local_crate_exports_generics() {
-                            #[cfg(feature = "master")]
-                            func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
-                        }
-                    }
+                    // defined in an upstream crate. It is hidden if:
+                    // - it is instantiated in this crate, and
+                    // - the current crate does not re-export generics
+                    instance.upstream_monomorphization(tcx).is_none()
+                        && !cx.tcx.local_crate_exports_generics()
                 }
             } else {
-                // When not sharing generics, all instances are in the same
-                // crate and have hidden visibility
-                #[cfg(feature = "master")]
+                // This is a non-generic function. It is hidden if:
+                // - it is instantiated in the local crate, and
+                //   - it is defined an upstream crate (non-local), or
+                //   - it is not reachable
+                cx.tcx.is_codegened_item(instance_def_id)
+                    && (!instance_def_id.is_local()
+                        || !cx.tcx.is_reachable_non_generic(instance_def_id))
+            };
+            if is_hidden {
                 func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
             }
-        } else {
-            // This is a non-generic function
-            if cx.tcx.is_codegened_item(instance_def_id) {
-                // This is a function that is instantiated in the local crate
-
-                if instance_def_id.is_local() {
-                    // This is function that is defined in the local crate.
-                    // If it is not reachable, it is hidden.
-                    if !cx.tcx.is_reachable_non_generic(instance_def_id) {
-                        #[cfg(feature = "master")]
-                        func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
-                    }
-                } else {
-                    // This is a function from an upstream crate that has
-                    // been instantiated here. These are always hidden.
-                    #[cfg(feature = "master")]
-                    func.add_attribute(FnAttribute::Visibility(Visibility::Hidden));
-                }
-            }
         }
 
         func

From f0d9b56e7287416b4c0a537c9a5ff50e48051ca0 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 14 Dec 2024 08:51:44 -0500
Subject: [PATCH 780/997] WIP: Fix undefined symbol for allocator functions

---
 build_system/src/test.rs |  2 +-
 src/allocator.rs         | 19 +++++++++---------
 src/back/lto.rs          | 42 +++++++++++++++++++++++++++++-----------
 src/base.rs              | 15 +++++++++++---
 4 files changed, 53 insertions(+), 25 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index c69e240c01de..5c06ed65747b 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1031,7 +1031,7 @@ where
             &"always",
             &"--stage",
             &"0",
-            &format!("tests/{}", test_type),
+            &format!("tests/{}/codegen/virtual-function-elimination.rs", test_type),
             &"--compiletest-rustc-args",
             &rustc_args,
         ],
diff --git a/src/allocator.rs b/src/allocator.rs
index f13a75648aea..6df56693ce11 100644
--- a/src/allocator.rs
+++ b/src/allocator.rs
@@ -1,5 +1,5 @@
 #[cfg(feature = "master")]
-use gccjit::FnAttribute;
+use gccjit::{FnAttribute, VarAttribute};
 use gccjit::{Context, FunctionType, GlobalKind, ToRValue, Type};
 use rustc_ast::expand::allocator::{
     ALLOCATOR_METHODS, AllocatorKind, AllocatorTy, NO_ALLOC_SHIM_IS_UNSTABLE,
@@ -9,6 +9,7 @@ use rustc_middle::bug;
 use rustc_middle::ty::TyCtxt;
 use rustc_session::config::OomStrategy;
 
+use crate::base::symbol_visibility_to_gcc;
 use crate::GccContext;
 
 pub(crate) unsafe fn codegen(
@@ -70,12 +71,16 @@ pub(crate) unsafe fn codegen(
 
     let name = OomStrategy::SYMBOL.to_string();
     let global = context.new_global(None, GlobalKind::Exported, i8, name);
+    #[cfg(feature = "master")]
+    global.add_attribute(VarAttribute::Visibility(symbol_visibility_to_gcc(tcx.sess.default_visibility())));
     let value = tcx.sess.opts.unstable_opts.oom.should_panic();
     let value = context.new_rvalue_from_int(i8, value as i32);
     global.global_set_initializer_rvalue(value);
 
     let name = NO_ALLOC_SHIM_IS_UNSTABLE.to_string();
     let global = context.new_global(None, GlobalKind::Exported, i8, name);
+    #[cfg(feature = "master")]
+    global.add_attribute(VarAttribute::Visibility(symbol_visibility_to_gcc(tcx.sess.default_visibility())));
     let value = context.new_rvalue_from_int(i8, 0);
     global.global_set_initializer_rvalue(value);
 }
@@ -104,16 +109,10 @@ fn create_wrapper_function(
         false,
     );
 
+    println!("{} -> {}: {:?}", from_name, to_name, tcx.sess.default_visibility());
+
     #[cfg(feature = "master")]
-    match tcx.sess.default_visibility() {
-        rustc_target::spec::SymbolVisibility::Hidden => {
-            func.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden))
-        }
-        rustc_target::spec::SymbolVisibility::Protected => {
-            func.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Protected))
-        }
-        rustc_target::spec::SymbolVisibility::Interposable => {}
-    }
+    func.add_attribute(FnAttribute::Visibility(symbol_visibility_to_gcc(tcx.sess.default_visibility())));
 
     if tcx.sess.must_emit_unwind_tables() {
         // TODO(antoyo): emit unwind tables.
diff --git a/src/back/lto.rs b/src/back/lto.rs
index 11c984774b70..b0b89bf588bf 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -21,7 +21,7 @@ use std::fs::{self, File};
 use std::path::{Path, PathBuf};
 use std::sync::Arc;
 
-use gccjit::{Context, OutputKind};
+use gccjit::{Context, FnAttribute, FunctionType, GlobalKind, OutputKind};
 use object::read::archive::ArchiveFile;
 use rustc_codegen_ssa::back::lto::{LtoModuleCodegen, SerializedModule, ThinModule, ThinShared};
 use rustc_codegen_ssa::back::symbol_export;
@@ -50,7 +50,7 @@ pub fn crate_type_allows_lto(crate_type: CrateType) -> bool {
 
 struct LtoData {
     // TODO(antoyo): use symbols_below_threshold.
-    //symbols_below_threshold: Vec<CString>,
+    symbols_below_threshold: Vec<String>,
     upstream_modules: Vec<(SerializedModule<ModuleBuffer>, CString)>,
     tmp_path: TempDir,
 }
@@ -79,18 +79,21 @@ fn prepare_lto(
 
     let symbol_filter = &|&(ref name, info): &(String, SymbolExportInfo)| {
         if info.level.is_below_threshold(export_threshold) || info.used {
-            Some(CString::new(name.as_str()).unwrap())
+            Some(name.clone())
         } else {
             None
         }
     };
     let exported_symbols = cgcx.exported_symbols.as_ref().expect("needs exported symbols for LTO");
+    //println!("1. {:?}", exported_symbols);
     let mut symbols_below_threshold = {
         let _timer = cgcx.prof.generic_activity("GCC_lto_generate_symbols_below_threshold");
-        exported_symbols[&LOCAL_CRATE].iter().filter_map(symbol_filter).collect::<Vec<CString>>()
+        exported_symbols[&LOCAL_CRATE].iter().filter_map(symbol_filter).collect::<Vec<String>>()
     };
     info!("{} symbols to preserve in this crate", symbols_below_threshold.len());
 
+    //println!("2. {:?}", symbols_below_threshold);
+
     // If we're performing LTO for the entire crate graph, then for each of our
     // upstream dependencies, find the corresponding rlib and load the bitcode
     // from the archive.
@@ -119,6 +122,7 @@ fn prepare_lto(
         for &(cnum, ref path) in cgcx.each_linked_rlib_for_lto.iter() {
             let exported_symbols =
                 cgcx.exported_symbols.as_ref().expect("needs exported symbols for LTO");
+            //println!("3. {:?}", exported_symbols);
             {
                 let _timer = cgcx.prof.generic_activity("GCC_lto_generate_symbols_below_threshold");
                 symbols_below_threshold
@@ -155,8 +159,9 @@ fn prepare_lto(
         }
     }
 
+    println!("**** 4. {:?}", symbols_below_threshold);
     Ok(LtoData {
-        //symbols_below_threshold,
+        symbols_below_threshold,
         upstream_modules,
         tmp_path,
     })
@@ -187,7 +192,7 @@ pub(crate) fn run_fat(
         cached_modules,
         lto_data.upstream_modules,
         lto_data.tmp_path,
-        //&symbols_below_threshold,
+        &lto_data.symbols_below_threshold,
     )
 }
 
@@ -198,7 +203,7 @@ fn fat_lto(
     cached_modules: Vec<(SerializedModule<ModuleBuffer>, WorkProduct)>,
     mut serialized_modules: Vec<(SerializedModule<ModuleBuffer>, CString)>,
     tmp_path: TempDir,
-    //symbols_below_threshold: &[*const libc::c_char],
+    symbols_below_threshold: &[String],
 ) -> Result<LtoModuleCodegen<GccCodegenBackend>, FatalError> {
     let _timer = cgcx.prof.generic_activity("GCC_fat_lto_build_monolithic_module");
     info!("going for a fat lto");
@@ -323,6 +328,14 @@ fn fat_lto(
             ptr as *const *const libc::c_char,
             symbols_below_threshold.len() as libc::size_t,
         );*/
+        let int_type = module.module_llvm.context.new_type::<i32>();
+        for symbol in symbols_below_threshold {
+            println!("*** Keeping symbol: {}", symbol);
+            module.module_llvm.context.new_global(None, GlobalKind::Imported, int_type, symbol);
+        }
+        let void_type = module.module_llvm.context.new_type::<()>();
+        let func = module.module_llvm.context.new_function(None, FunctionType::Extern, void_type, &[], "__rust_alloc", false);
+        func.add_attribute(FnAttribute::Used);
         save_temp_bitcode(cgcx, &module, "lto.after-restriction");
         //}
     }
@@ -359,8 +372,6 @@ pub(crate) fn run_thin(
     let dcx = cgcx.create_dcx();
     let dcx = dcx.handle();
     let lto_data = prepare_lto(cgcx, dcx)?;
-    /*let symbols_below_threshold =
-    symbols_below_threshold.iter().map(|c| c.as_ptr()).collect::<Vec<_>>();*/
     if cgcx.opts.cg.linker_plugin_lto.enabled() {
         unreachable!(
             "We should never reach this case if the LTO step \
@@ -373,7 +384,8 @@ pub(crate) fn run_thin(
         modules,
         lto_data.upstream_modules,
         lto_data.tmp_path,
-        cached_modules, /*, &symbols_below_threshold*/
+        cached_modules,
+        &lto_data.symbols_below_threshold,
     )
 }
 
@@ -424,8 +436,10 @@ fn thin_lto(
     serialized_modules: Vec<(SerializedModule<ModuleBuffer>, CString)>,
     tmp_path: TempDir,
     cached_modules: Vec<(SerializedModule<ModuleBuffer>, WorkProduct)>,
-    //symbols_below_threshold: &[*const libc::c_char],
+    symbols_below_threshold: &[String],
 ) -> Result<(Vec<LtoModuleCodegen<GccCodegenBackend>>, Vec<WorkProduct>), FatalError> {
+    println!("********* Thin LTO");
+
     let _timer = cgcx.prof.generic_activity("LLVM_thin_lto_global_analysis");
     info!("going for that thin, thin LTO");
 
@@ -495,6 +509,12 @@ fn thin_lto(
             }
         }
 
+        /*for symbol in symbols_below_threshold {
+            module.module_llvm.context.new_global(symbol);
+        }*/
+
+        println!("**** Name: {:?}\n******", name);
+
         serialized.push(module);
         module_names.push(name);
     }
diff --git a/src/base.rs b/src/base.rs
index 508cb74ff640..76699da3275d 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -15,21 +15,30 @@ use rustc_middle::mir::mono::Visibility;
 use rustc_middle::ty::TyCtxt;
 use rustc_session::config::DebugInfo;
 use rustc_span::Symbol;
-use rustc_target::spec::PanicStrategy;
+use rustc_target::spec::{PanicStrategy, SymbolVisibility};
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
 use crate::{GccContext, LockedTargetInfo, SyncContext, gcc_util, new_context};
 
 #[cfg(feature = "master")]
-pub fn visibility_to_gcc(linkage: Visibility) -> gccjit::Visibility {
-    match linkage {
+pub fn visibility_to_gcc(visibility: Visibility) -> gccjit::Visibility {
+    match visibility {
         Visibility::Default => gccjit::Visibility::Default,
         Visibility::Hidden => gccjit::Visibility::Hidden,
         Visibility::Protected => gccjit::Visibility::Protected,
     }
 }
 
+#[cfg(feature = "master")]
+pub fn symbol_visibility_to_gcc(visibility: SymbolVisibility) -> gccjit::Visibility {
+    match visibility {
+        SymbolVisibility::Hidden => gccjit::Visibility::Hidden,
+        SymbolVisibility::Protected => gccjit::Visibility::Protected,
+        SymbolVisibility::Interposable => gccjit::Visibility::Default,
+    }
+}
+
 pub fn global_linkage_to_gcc(linkage: Linkage) -> GlobalKind {
     match linkage {
         Linkage::External => GlobalKind::Imported,

From 0dcb1e3bc1c41830fd9d8c816786551fc4a07b24 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 14 Dec 2024 08:59:50 -0500
Subject: [PATCH 781/997] Fix CI by downgrading to 22.04

---
 .github/workflows/release.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index d5c06a836db9..f0ff23cf0f8f 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -13,7 +13,7 @@ env:
 
 jobs:
   build:
-    runs-on: ubuntu-latest
+    runs-on: ubuntu-22.04
 
     strategy:
       fail-fast: false

From 96fd4a20cd5b172dd91cd8d52b2ed87c190f457b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 14 Dec 2024 09:32:15 -0500
Subject: [PATCH 782/997] Do not test the time crate since one test fails

---
 build_system/src/test.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index dd09de24aa34..06b3e4466650 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -641,7 +641,7 @@ fn test_projects(env: &Env, args: &TestArg) -> Result<(), String> {
         //failing test is fixed upstream.
         //"https://github.com/marshallpierce/rust-base64", // FIXME: one test is OOM-killed.
         // TODO: ignore the base64 test that is OOM-killed.
-        "https://github.com/time-rs/time",
+        //"https://github.com/time-rs/time", // FIXME: one test fails (https://github.com/time-rs/time/issues/719).
         "https://github.com/rust-lang/log",
         "https://github.com/bitflags/bitflags",
         //"https://github.com/serde-rs/serde", // FIXME: one test fails.

From e91ec42e3343698cd66aa6d97f62fa7de172eb74 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 14 Dec 2024 16:23:37 -0500
Subject: [PATCH 783/997] Clean fix for undefined symbol for allocator
 functions

---
 build_system/src/test.rs |  2 +-
 src/allocator.rs         | 19 ++++++++++++-------
 src/back/lto.rs          | 40 ++++++++--------------------------------
 src/base.rs              |  4 +++-
 4 files changed, 24 insertions(+), 41 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 701584e24b2d..53b56eb427ed 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1031,7 +1031,7 @@ where
             &"always",
             &"--stage",
             &"0",
-            &format!("tests/{}/codegen/virtual-function-elimination.rs", test_type),
+            &format!("tests/{}", test_type),
             &"--compiletest-rustc-args",
             &rustc_args,
         ],
diff --git a/src/allocator.rs b/src/allocator.rs
index 6df56693ce11..416f3231a13c 100644
--- a/src/allocator.rs
+++ b/src/allocator.rs
@@ -1,6 +1,6 @@
+use gccjit::{Context, FunctionType, GlobalKind, ToRValue, Type};
 #[cfg(feature = "master")]
 use gccjit::{FnAttribute, VarAttribute};
-use gccjit::{Context, FunctionType, GlobalKind, ToRValue, Type};
 use rustc_ast::expand::allocator::{
     ALLOCATOR_METHODS, AllocatorKind, AllocatorTy, NO_ALLOC_SHIM_IS_UNSTABLE,
     alloc_error_handler_name, default_fn_name, global_fn_name,
@@ -9,8 +9,9 @@ use rustc_middle::bug;
 use rustc_middle::ty::TyCtxt;
 use rustc_session::config::OomStrategy;
 
-use crate::base::symbol_visibility_to_gcc;
 use crate::GccContext;
+#[cfg(feature = "master")]
+use crate::base::symbol_visibility_to_gcc;
 
 pub(crate) unsafe fn codegen(
     tcx: TyCtxt<'_>,
@@ -72,7 +73,9 @@ pub(crate) unsafe fn codegen(
     let name = OomStrategy::SYMBOL.to_string();
     let global = context.new_global(None, GlobalKind::Exported, i8, name);
     #[cfg(feature = "master")]
-    global.add_attribute(VarAttribute::Visibility(symbol_visibility_to_gcc(tcx.sess.default_visibility())));
+    global.add_attribute(VarAttribute::Visibility(symbol_visibility_to_gcc(
+        tcx.sess.default_visibility(),
+    )));
     let value = tcx.sess.opts.unstable_opts.oom.should_panic();
     let value = context.new_rvalue_from_int(i8, value as i32);
     global.global_set_initializer_rvalue(value);
@@ -80,7 +83,9 @@ pub(crate) unsafe fn codegen(
     let name = NO_ALLOC_SHIM_IS_UNSTABLE.to_string();
     let global = context.new_global(None, GlobalKind::Exported, i8, name);
     #[cfg(feature = "master")]
-    global.add_attribute(VarAttribute::Visibility(symbol_visibility_to_gcc(tcx.sess.default_visibility())));
+    global.add_attribute(VarAttribute::Visibility(symbol_visibility_to_gcc(
+        tcx.sess.default_visibility(),
+    )));
     let value = context.new_rvalue_from_int(i8, 0);
     global.global_set_initializer_rvalue(value);
 }
@@ -109,10 +114,10 @@ fn create_wrapper_function(
         false,
     );
 
-    println!("{} -> {}: {:?}", from_name, to_name, tcx.sess.default_visibility());
-
     #[cfg(feature = "master")]
-    func.add_attribute(FnAttribute::Visibility(symbol_visibility_to_gcc(tcx.sess.default_visibility())));
+    func.add_attribute(FnAttribute::Visibility(symbol_visibility_to_gcc(
+        tcx.sess.default_visibility(),
+    )));
 
     if tcx.sess.must_emit_unwind_tables() {
         // TODO(antoyo): emit unwind tables.
diff --git a/src/back/lto.rs b/src/back/lto.rs
index b0b89bf588bf..aecb4c424081 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -21,7 +21,7 @@ use std::fs::{self, File};
 use std::path::{Path, PathBuf};
 use std::sync::Arc;
 
-use gccjit::{Context, FnAttribute, FunctionType, GlobalKind, OutputKind};
+use gccjit::{Context, OutputKind};
 use object::read::archive::ArchiveFile;
 use rustc_codegen_ssa::back::lto::{LtoModuleCodegen, SerializedModule, ThinModule, ThinShared};
 use rustc_codegen_ssa::back::symbol_export;
@@ -50,7 +50,7 @@ pub fn crate_type_allows_lto(crate_type: CrateType) -> bool {
 
 struct LtoData {
     // TODO(antoyo): use symbols_below_threshold.
-    symbols_below_threshold: Vec<String>,
+    //symbols_below_threshold: Vec<String>,
     upstream_modules: Vec<(SerializedModule<ModuleBuffer>, CString)>,
     tmp_path: TempDir,
 }
@@ -85,15 +85,12 @@ fn prepare_lto(
         }
     };
     let exported_symbols = cgcx.exported_symbols.as_ref().expect("needs exported symbols for LTO");
-    //println!("1. {:?}", exported_symbols);
     let mut symbols_below_threshold = {
         let _timer = cgcx.prof.generic_activity("GCC_lto_generate_symbols_below_threshold");
         exported_symbols[&LOCAL_CRATE].iter().filter_map(symbol_filter).collect::<Vec<String>>()
     };
     info!("{} symbols to preserve in this crate", symbols_below_threshold.len());
 
-    //println!("2. {:?}", symbols_below_threshold);
-
     // If we're performing LTO for the entire crate graph, then for each of our
     // upstream dependencies, find the corresponding rlib and load the bitcode
     // from the archive.
@@ -122,7 +119,6 @@ fn prepare_lto(
         for &(cnum, ref path) in cgcx.each_linked_rlib_for_lto.iter() {
             let exported_symbols =
                 cgcx.exported_symbols.as_ref().expect("needs exported symbols for LTO");
-            //println!("3. {:?}", exported_symbols);
             {
                 let _timer = cgcx.prof.generic_activity("GCC_lto_generate_symbols_below_threshold");
                 symbols_below_threshold
@@ -159,12 +155,7 @@ fn prepare_lto(
         }
     }
 
-    println!("**** 4. {:?}", symbols_below_threshold);
-    Ok(LtoData {
-        symbols_below_threshold,
-        upstream_modules,
-        tmp_path,
-    })
+    Ok(LtoData { upstream_modules, tmp_path })
 }
 
 fn save_as_file(obj: &[u8], path: &Path) -> Result<(), LtoBitcodeFromRlib> {
@@ -192,7 +183,7 @@ pub(crate) fn run_fat(
         cached_modules,
         lto_data.upstream_modules,
         lto_data.tmp_path,
-        &lto_data.symbols_below_threshold,
+        //&lto_data.symbols_below_threshold,
     )
 }
 
@@ -203,7 +194,7 @@ fn fat_lto(
     cached_modules: Vec<(SerializedModule<ModuleBuffer>, WorkProduct)>,
     mut serialized_modules: Vec<(SerializedModule<ModuleBuffer>, CString)>,
     tmp_path: TempDir,
-    symbols_below_threshold: &[String],
+    //symbols_below_threshold: &[String],
 ) -> Result<LtoModuleCodegen<GccCodegenBackend>, FatalError> {
     let _timer = cgcx.prof.generic_activity("GCC_fat_lto_build_monolithic_module");
     info!("going for a fat lto");
@@ -328,14 +319,7 @@ fn fat_lto(
             ptr as *const *const libc::c_char,
             symbols_below_threshold.len() as libc::size_t,
         );*/
-        let int_type = module.module_llvm.context.new_type::<i32>();
-        for symbol in symbols_below_threshold {
-            println!("*** Keeping symbol: {}", symbol);
-            module.module_llvm.context.new_global(None, GlobalKind::Imported, int_type, symbol);
-        }
-        let void_type = module.module_llvm.context.new_type::<()>();
-        let func = module.module_llvm.context.new_function(None, FunctionType::Extern, void_type, &[], "__rust_alloc", false);
-        func.add_attribute(FnAttribute::Used);
+
         save_temp_bitcode(cgcx, &module, "lto.after-restriction");
         //}
     }
@@ -385,7 +369,7 @@ pub(crate) fn run_thin(
         lto_data.upstream_modules,
         lto_data.tmp_path,
         cached_modules,
-        &lto_data.symbols_below_threshold,
+        //&lto_data.symbols_below_threshold,
     )
 }
 
@@ -436,10 +420,8 @@ fn thin_lto(
     serialized_modules: Vec<(SerializedModule<ModuleBuffer>, CString)>,
     tmp_path: TempDir,
     cached_modules: Vec<(SerializedModule<ModuleBuffer>, WorkProduct)>,
-    symbols_below_threshold: &[String],
+    //_symbols_below_threshold: &[String],
 ) -> Result<(Vec<LtoModuleCodegen<GccCodegenBackend>>, Vec<WorkProduct>), FatalError> {
-    println!("********* Thin LTO");
-
     let _timer = cgcx.prof.generic_activity("LLVM_thin_lto_global_analysis");
     info!("going for that thin, thin LTO");
 
@@ -509,12 +491,6 @@ fn thin_lto(
             }
         }
 
-        /*for symbol in symbols_below_threshold {
-            module.module_llvm.context.new_global(symbol);
-        }*/
-
-        println!("**** Name: {:?}\n******", name);
-
         serialized.push(module);
         module_names.push(name);
     }
diff --git a/src/base.rs b/src/base.rs
index 76699da3275d..c92dbc981955 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -15,7 +15,9 @@ use rustc_middle::mir::mono::Visibility;
 use rustc_middle::ty::TyCtxt;
 use rustc_session::config::DebugInfo;
 use rustc_span::Symbol;
-use rustc_target::spec::{PanicStrategy, SymbolVisibility};
+use rustc_target::spec::PanicStrategy;
+#[cfg(feature = "master")]
+use rustc_target::spec::SymbolVisibility;
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;

From a29fd9cc3472d9274ea6a97a970e0d8729493691 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 14 Dec 2024 16:40:05 -0500
Subject: [PATCH 784/997] Fix failures CI

---
 .github/workflows/failures.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index 2c1ed9ad4294..a7a20b6bc817 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -98,7 +98,7 @@ jobs:
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       id: tests
       run: |
-        ${{ matrix.libgccjit_version.env_extra }} ./y.sh test --release --clean --build-sysroot --test-failing-rustc ${{ matrix.libgccjit_version.extra }} | tee output_log
+        ${{ matrix.libgccjit_version.env_extra }} ./y.sh test --release --clean --build-sysroot --test-failing-rustc ${{ matrix.libgccjit_version.extra }} 2>&1 | tee output_log
         rg --text "test result" output_log >> $GITHUB_STEP_SUMMARY
 
     - name: Run failing ui pattern tests for ICE
@@ -106,7 +106,7 @@ jobs:
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       id: ui-tests
       run: |
-        ${{ matrix.libgccjit_version.env_extra }} ./y.sh test --release --test-failing-ui-pattern-tests ${{ matrix.libgccjit_version.extra }} | tee output_log_ui
+        ${{ matrix.libgccjit_version.env_extra }} ./y.sh test --release --test-failing-ui-pattern-tests ${{ matrix.libgccjit_version.extra }} 2>&1 | tee output_log_ui
         if grep -q "the compiler unexpectedly panicked" output_log_ui; then
           echo "Error: 'the compiler unexpectedly panicked' found in output logs. CI Error!!"
           exit 1

From 660305dccb8b362a7cf63cf3a6258d90287fbfef Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 8 Oct 2024 19:51:27 -0400
Subject: [PATCH 785/997] Fix simd_gather

---
 src/builder.rs | 41 +++++++++++++++++++++++++++++------------
 1 file changed, 29 insertions(+), 12 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index a9f0edd26675..30e13ddce917 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1923,18 +1923,35 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             self.int_type
         };
 
-        let vector_type =
-            mask.get_type().dyncast_vector().expect("simd_shuffle mask should be of vector type");
-        let mask_num_units = vector_type.get_num_units();
-        let mut mask_elements = vec![];
-        for i in 0..mask_num_units {
-            let index = self.context.new_rvalue_from_long(self.cx.type_u32(), i as _);
-            mask_elements.push(self.context.new_cast(
-                self.location,
-                self.extract_element(mask, index).to_rvalue(),
-                mask_element_type,
-            ));
-        }
+        // NOTE: this condition is needed because we call shuffle_vector in the implementation of
+        // simd_gather.
+        let mut mask_elements = if let Some(vector_type) = mask.get_type().dyncast_vector() {
+            let mask_num_units = vector_type.get_num_units();
+            let mut mask_elements = vec![];
+            for i in 0..mask_num_units {
+                let index = self.context.new_rvalue_from_long(self.cx.type_u32(), i as _);
+                mask_elements.push(self.context.new_cast(
+                    self.location,
+                    self.extract_element(mask, index).to_rvalue(),
+                    mask_element_type,
+                ));
+            }
+            mask_elements
+        } else {
+            let struct_type = mask.get_type().is_struct().expect("mask should be of struct type");
+            let mask_num_units = struct_type.get_field_count();
+            let mut mask_elements = vec![];
+            for i in 0..mask_num_units {
+                let field = struct_type.get_field(i as i32);
+                mask_elements.push(self.context.new_cast(
+                    self.location,
+                    mask.access_field(self.location, field).to_rvalue(),
+                    mask_element_type,
+                ));
+            }
+            mask_elements
+        };
+        let mask_num_units = mask_elements.len();
 
         // NOTE: the mask needs to be the same length as the input vectors, so add the missing
         // elements in the mask if needed.

From e1439ba17883b6400aa54dcee1de9db5e63ff3de Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 14 Dec 2024 17:38:11 -0500
Subject: [PATCH 786/997] Automatically detect LTO tests to remove when the
 sysroot is not compiled with LTO

---
 .github/workflows/ci.yml        |  3 --
 .github/workflows/failures.yml  |  3 --
 .github/workflows/gcc12.yml     |  3 --
 .github/workflows/m68k.yml      |  3 --
 .github/workflows/release.yml   |  2 +-
 build_system/src/test.rs        | 83 +++++++++++++++++++++------------
 tests/failing-non-lto-tests.txt | 11 -----
 7 files changed, 53 insertions(+), 55 deletions(-)
 delete mode 100644 tests/failing-non-lto-tests.txt

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 36b1bc89111b..efb4de5f5fb0 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -95,9 +95,6 @@ jobs:
         git config --global user.name "User"
         ./y.sh prepare
 
-    - name: Add more failing tests because the sysroot is not compiled with LTO
-      run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
-
     - name: Run tests
       run: |
         ./y.sh test --release --clean --build-sysroot ${{ matrix.commands }}
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index a7a20b6bc817..f33d9fcc5825 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -90,9 +90,6 @@ jobs:
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       run: ./y.sh prepare
 
-    - name: Add more failing tests because the sysroot is not compiled with LTO
-      run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
-
     - name: Run tests
       # TODO: re-enable those tests for libgccjit 12.
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index 7dcad21a02e1..4c2ce91e86ee 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -82,9 +82,6 @@ jobs:
     #- name: Add more failing tests for GCC 12
       #run: cat tests/failing-ui-tests12.txt >> tests/failing-ui-tests.txt
 
-    #- name: Add more failing tests because the sysroot is not compiled with LTO
-      #run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
-
     #- name: Run tests
       #run: |
         #./y.sh test --release --clean --build-sysroot ${{ matrix.commands }} --no-default-features
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 1c864e04413f..69549dfeb5f5 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -102,9 +102,6 @@ jobs:
         git config --global user.name "User"
         ./y.sh prepare --cross
 
-    - name: Add more failing tests because the sysroot is not compiled with LTO
-      run: cat tests/failing-non-lto-tests.txt >> tests/failing-ui-tests.txt
-
     - name: Run tests
       run: |
         ./y.sh test --release --clean --build-sysroot --sysroot-features compiler_builtins/no-f16-f128 ${{ matrix.commands }}
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index f0ff23cf0f8f..887720436e99 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -70,4 +70,4 @@ jobs:
       run: |
         # FIXME(antoyo): we cannot enable LTO for stdarch tests currently because of some failing LTO tests using proc-macros.
         echo -n 'lto = "fat"' >> build_system/build_sysroot/Cargo.toml
-        EMBED_LTO_BITCODE=1 ./y.sh test --release --clean --release-sysroot --build-sysroot ${{ matrix.commands }}
+        EMBED_LTO_BITCODE=1 ./y.sh test --release --clean --release-sysroot --build-sysroot --keep-lto-tests ${{ matrix.commands }}
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 53b56eb427ed..371fcb4bc306 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -93,6 +93,7 @@ struct TestArg {
     sysroot_panic_abort: bool,
     config_info: ConfigInfo,
     sysroot_features: Vec<String>,
+    keep_lto_tests: bool,
 }
 
 impl TestArg {
@@ -128,6 +129,9 @@ impl TestArg {
                 "--sysroot-panic-abort" => {
                     test_arg.sysroot_panic_abort = true;
                 }
+                "--keep-lto-tests" => {
+                    test_arg.keep_lto_tests = true;
+                }
                 "--sysroot-features" => match args.next() {
                     Some(feature) if !feature.is_empty() => {
                         test_arg.sysroot_features.push(feature);
@@ -194,7 +198,7 @@ fn build_if_no_backend(env: &Env, args: &TestArg) -> Result<(), String> {
 }
 
 fn clean(_env: &Env, args: &TestArg) -> Result<(), String> {
-    let _ = std::fs::remove_dir_all(&args.config_info.cargo_target_dir);
+    let _ = remove_dir_all(&args.config_info.cargo_target_dir);
     let path = Path::new(&args.config_info.cargo_target_dir).join("gccjit");
     create_dir(&path)
 }
@@ -835,8 +839,7 @@ fn valid_ui_error_pattern_test(file: &str) -> bool {
     .any(|to_ignore| file.ends_with(to_ignore))
 }
 
-#[rustfmt::skip]
-fn contains_ui_error_patterns(file_path: &Path) -> Result<bool, String> {
+fn contains_ui_error_patterns(file_path: &Path, keep_lto_tests: bool) -> Result<bool, String> {
     // Tests generating errors.
     let file = File::open(file_path)
         .map_err(|error| format!("Failed to read `{}`: {:?}", file_path.display(), error))?;
@@ -845,19 +848,22 @@ fn contains_ui_error_patterns(file_path: &Path) -> Result<bool, String> {
         if line.is_empty() {
             continue;
         }
-        if [
-            "//@ error-pattern:",
-            "//@ build-fail",
-            "//@ run-fail",
-            "-Cllvm-args",
-            "//~",
-            "thread",
-        ]
+        if ["//@ error-pattern:", "//@ build-fail", "//@ run-fail", "-Cllvm-args", "//~", "thread"]
             .iter()
             .any(|check| line.contains(check))
         {
             return Ok(true);
         }
+
+        if !keep_lto_tests
+            && (line.contains("-Clto")
+                || line.contains("-C lto")
+                || line.contains("compile-flags: -Clinker-plugin-lto"))
+            && !line.contains("-Clto=thin")
+        {
+            return Ok(true);
+        }
+
         if line.contains("//[") && line.contains("]~") {
             return Ok(true);
         }
@@ -903,7 +909,7 @@ where
                 rust_path.join("tests/ui"),
                 &mut |_dir| Ok(()),
                 &mut |file_path| {
-                    if contains_ui_error_patterns(file_path)? {
+                    if contains_ui_error_patterns(file_path, args.keep_lto_tests)? {
                         Ok(())
                     } else {
                         remove_file(file_path).map_err(|e| e.to_string())
@@ -928,7 +934,7 @@ where
                     .iter()
                     .any(|name| *name == dir_name)
                     {
-                        std::fs::remove_dir_all(dir).map_err(|error| {
+                        remove_dir_all(dir).map_err(|error| {
                             format!("Failed to remove folder `{}`: {:?}", dir.display(), error)
                         })?;
                     }
@@ -940,27 +946,42 @@ where
 
             // These two functions are used to remove files that are known to not be working currently
             // with the GCC backend to reduce noise.
-            fn dir_handling(dir: &Path) -> Result<(), String> {
-                if dir.file_name().map(|name| name == "auxiliary").unwrap_or(true) {
-                    return Ok(());
-                }
+            fn dir_handling(keep_lto_tests: bool) -> impl Fn(&Path) -> Result<(), String> {
+                move |dir| {
+                    if dir.file_name().map(|name| name == "auxiliary").unwrap_or(true) {
+                        return Ok(());
+                    }
 
-                walk_dir(dir, &mut dir_handling, &mut file_handling, false)
-            }
-            fn file_handling(file_path: &Path) -> Result<(), String> {
-                if !file_path.extension().map(|extension| extension == "rs").unwrap_or(false) {
-                    return Ok(());
+                    walk_dir(
+                        dir,
+                        &mut dir_handling(keep_lto_tests),
+                        &mut file_handling(keep_lto_tests),
+                        false,
+                    )
                 }
-                let path_str = file_path.display().to_string().replace("\\", "/");
-                if valid_ui_error_pattern_test(&path_str) {
-                    return Ok(());
-                } else if contains_ui_error_patterns(file_path)? {
-                    return remove_file(&file_path);
-                }
-                Ok(())
             }
 
-            walk_dir(rust_path.join("tests/ui"), &mut dir_handling, &mut file_handling, false)?;
+            fn file_handling(keep_lto_tests: bool) -> impl Fn(&Path) -> Result<(), String> {
+                move |file_path| {
+                    if !file_path.extension().map(|extension| extension == "rs").unwrap_or(false) {
+                        return Ok(());
+                    }
+                    let path_str = file_path.display().to_string().replace("\\", "/");
+                    if valid_ui_error_pattern_test(&path_str) {
+                        return Ok(());
+                    } else if contains_ui_error_patterns(file_path, keep_lto_tests)? {
+                        return remove_file(&file_path);
+                    }
+                    Ok(())
+                }
+            }
+
+            walk_dir(
+                rust_path.join("tests/ui"),
+                &mut dir_handling(args.keep_lto_tests),
+                &mut file_handling(args.keep_lto_tests),
+                false,
+            )?;
         }
         let nb_parts = args.nb_parts.unwrap_or(0);
         if nb_parts > 0 {
@@ -1173,7 +1194,7 @@ fn remove_files_callback<'a>(
                     files.split('\n').map(|line| line.trim()).filter(|line| !line.is_empty())
                 {
                     let path = rust_path.join(file);
-                    if let Err(e) = std::fs::remove_dir_all(&path) {
+                    if let Err(e) = remove_dir_all(&path) {
                         println!("Failed to remove directory `{}`: {}", path.display(), e);
                     }
                 }
diff --git a/tests/failing-non-lto-tests.txt b/tests/failing-non-lto-tests.txt
deleted file mode 100644
index 384dfdc26fb5..000000000000
--- a/tests/failing-non-lto-tests.txt
+++ /dev/null
@@ -1,11 +0,0 @@
-tests/ui/issues/issue-44056.rs
-tests/ui/lto/fat-lto.rs
-tests/ui/lto/debuginfo-lto.rs
-tests/ui/lto/lto-many-codegen-units.rs
-tests/ui/lto/issue-100772.rs
-tests/ui/lto/lto-rustc-loads-linker-plugin.rs
-tests/ui/panic-runtime/lto-unwind.rs
-tests/ui/sanitizer/issue-111184-cfi-coroutine-witness.rs
-tests/ui/sepcomp/sepcomp-lib-lto.rs
-tests/ui/lto/lto-opt-level-s.rs
-tests/ui/lto/lto-opt-level-z.rs

From 86a972345c11eb3ec49a9d8ab72d400865e715bf Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 14 Dec 2024 17:59:23 -0500
Subject: [PATCH 787/997] Fix for simd_relaxed_fma

---
 src/intrinsic/simd.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 5101ea8dcd43..1be452e5d05d 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -829,6 +829,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
             | sym::simd_flog
             | sym::simd_floor
             | sym::simd_fma
+            | sym::simd_relaxed_fma
             | sym::simd_fpow
             | sym::simd_fpowi
             | sym::simd_fsin

From 530cdb4b3a0c1f6d7aee291b6ecebf6a769c7c57 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 14 Dec 2024 18:00:07 -0500
Subject: [PATCH 788/997] Ignore new failing test

---
 tests/failing-ui-tests.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index b477564ce6ed..082958bfe1f8 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -121,3 +121,4 @@ tests/ui/codegen/equal-pointers-unequal/strict-provenance/print3.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/inline2.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/segfault.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/zero.rs
+tests/ui/simd/simd-bitmask-notpow2.rs

From 02198d8458b9894c2450d5ea0a4e2e979dc56b84 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 22 Dec 2024 12:28:01 -0500
Subject: [PATCH 789/997] Fix a stack overflow caused by GCC creating too many
 local variables

---
 src/builder.rs | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/builder.rs b/src/builder.rs
index 30e13ddce917..89e5cf1b8c6b 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1907,6 +1907,15 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         v2: RValue<'gcc>,
         mask: RValue<'gcc>,
     ) -> RValue<'gcc> {
+        // NOTE: if the `mask` is a constant value, the following code will copy it in many places,
+        // which will make GCC create a lot (+4000) local variables in some cases.
+        // So we assign it to an explicit local variable once to avoid this.
+        let func = self.current_func();
+        let mask_var = func.new_local(self.location, mask.get_type(), "mask");
+        let block = self.block;
+        block.add_assignment(self.location, mask_var, mask);
+        let mask = mask_var.to_rvalue();
+
         // TODO(antoyo): use a recursive unqualified() here.
         let vector_type = v1.get_type().unqualified().dyncast_vector().expect("vector type");
         let element_type = vector_type.get_element_type();

From 747924ad86b6841ee6d73732785f181e864dd730 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 20 Dec 2024 19:28:02 -0500
Subject: [PATCH 790/997] Debug global variable not initialized bug

---
 Cargo.lock                |  2 +-
 build_system/src/build.rs | 13 +++++++
 build_system/src/test.rs  | 19 ++++++++-
 src/back/write.rs         | 43 ++++++++++++++++++++-
 src/common.rs             |  2 +-
 src/consts.rs             | 81 ++++++++++++++++++++++++++++++++++++++-
 6 files changed, 154 insertions(+), 6 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 65dc019e3b07..636e75b94a3f 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -1,6 +1,6 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
-version = 3
+version = 4
 
 [[package]]
 name = "aho-corasick"
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index d0ced211a616..e93e8570e6aa 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -130,6 +130,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     if config.no_default_features {
         rustflags.push_str(" -Csymbol-mangling-version=v0");
     }
+    rustflags.push_str(" --print link-args");
 
     let mut args: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"build", &"--target", &config.target];
     for feature in &config.features {
@@ -156,7 +157,19 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     }
 
     let mut env = env.clone();
+    /*rustflags.push_str(" -C link-arg=-Wl,--verbose");
+    rustflags.push_str(" -C link-arg=-Wl,--warn-ifunc-textrel");
+    rustflags.push_str(" -C link-arg=-Wl,--warn-unresolved-symbols");
+    rustflags.push_str(" -C link-arg=-Wl,--fatal-warnings");
+    rustflags.push_str(" -C link-arg=-Wl,--warn-backrefs");
+    rustflags.push_str(" -C link-arg=-Wl,-znotext");
+    //rustflags.push_str(" -C link-arg=-Wl,--emit-relocs");
+    //rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=memchr::arch::x86_64::memchr::memchr_raw::FN");
+    //rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=_ZN6memchr4arch6x86_646memchr10memchr_raw2FN17haaf621f7b8ca567eE");
+    //rustflags.push_str(" -C link-arg=-Wl,--print-map");
+    //rustflags.push_str(" -C link-arg=-Wl,");
     env.insert("RUSTFLAGS".to_string(), rustflags);
+    env.insert("RUSTC_LOG".to_string(), "rustc_codegen_ssa::back::link=info".to_string());*/
     run_command_with_output_and_env(&args, Some(&start_dir), Some(&env))?;
 
     // Copy files to sysroot
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 371fcb4bc306..2886062043b9 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -692,7 +692,24 @@ fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
     println!("[TEST] libcore");
     let path = get_sysroot_dir().join("sysroot_src/library/core/tests");
     let _ = remove_dir_all(path.join("target"));
-    run_cargo_command(&[&"test"], Some(&path), env, args)?;
+    let mut env = env.clone();
+    env.insert("RUSTC_LOG".to_string(), "rustc_codegen_ssa::back::link=info".to_string());
+    let rustflags =
+        env.entry("RUSTFLAGS".to_string())
+        .or_default();
+    rustflags.push_str(" -C link-arg=-Wl,--verbose");
+    rustflags.push_str(" -C link-arg=-Wl,--warn-ifunc-textrel");
+    rustflags.push_str(" -C link-arg=-Wl,--warn-unresolved-symbols");
+    rustflags.push_str(" -C link-arg=-Wl,--fatal-warnings");
+    rustflags.push_str(" -C link-arg=-Wl,--warn-backrefs");
+    rustflags.push_str(" -C link-arg=-Wl,-znotext");
+    rustflags.push_str(" -C link-arg=-Wl,--emit-relocs");
+    rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=memchr::arch::x86_64::memchr::memchr_raw::FN");
+    // FIXME FIXME: seems like RUSTFLAGS is not set here.
+    //rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=_ZN6memchr4arch6x86_646memchr10memchr_raw2FN17haaf621f7b8ca567eE");
+    //rustflags.push_str(" -C link-arg=-Wl,--print-map");
+    //rustflags.push_str(" -Clink-arg=-not-an-arg");
+    run_cargo_command(&[&"test"], Some(&path), &env, args)?;
     Ok(())
 }
 
diff --git a/src/back/write.rs b/src/back/write.rs
index 802968979c72..ad071a331305 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -1,6 +1,6 @@
 use std::{env, fs};
 
-use gccjit::OutputKind;
+use gccjit::{Context, OutputKind};
 use rustc_codegen_ssa::back::link::ensure_removed;
 use rustc_codegen_ssa::back::write::{BitcodeSection, CodegenContext, EmitObj, ModuleConfig};
 use rustc_codegen_ssa::{CompiledModule, ModuleCodegen};
@@ -34,6 +34,11 @@ pub(crate) unsafe fn codegen(
         // TODO: remove this environment variable.
         let fat_lto = env::var("EMBED_LTO_BITCODE").as_deref() == Ok("1");
 
+        if cgcx.msvc_imps_needed {
+            println!("************************************************** Imps needed");
+            create_msvc_imps(cgcx, context);
+        }
+
         let bc_out = cgcx.output_filenames.temp_path(OutputType::Bitcode, module_name);
         let obj_out = cgcx.output_filenames.temp_path(OutputType::Object, module_name);
 
@@ -196,3 +201,39 @@ pub(crate) fn save_temp_bitcode(
         llvm::LLVMWriteBitcodeToFile(llmod, cstr.as_ptr());
     }*/
 }
+
+fn create_msvc_imps<'gcc>(
+    cgcx: &CodegenContext<GccCodegenBackend>,
+    context: &Context<'gcc>,
+) {
+    if !cgcx.msvc_imps_needed {
+        return;
+    }
+    // The x86 ABI seems to require that leading underscores are added to symbol
+    // names, so we need an extra underscore on x86. There's also a leading
+    // '\x01' here which disables LLVM's symbol mangling (e.g., no extra
+    // underscores added in front).
+    let prefix = if cgcx.target_arch == "x86" { "\x01__imp__" } else { "\x01__imp_" };
+
+    /*unsafe {
+        let ptr_ty = Type::ptr_llcx(llcx);
+        let globals = base::iter_globals(llmod)
+            .filter(|&val| {
+                llvm::get_linkage(val) == llvm::Linkage::ExternalLinkage
+                    && llvm::LLVMIsDeclaration(val) == 0
+            })
+            .map(move |(val, name)| {
+                let mut imp_name = prefix.as_bytes().to_vec();
+                imp_name.extend(name);
+                let imp_name = CString::new(imp_name).unwrap();
+                (imp_name, val)
+            })
+            .collect::<Vec<_>>();
+
+        for (imp_name, val) in globals {
+            let imp = llvm::LLVMAddGlobal(llmod, ptr_ty, imp_name.as_ptr());
+            llvm::LLVMSetInitializer(imp, val);
+            llvm::set_linkage(imp, llvm::Linkage::ExternalLinkage);
+        }
+    }*/
+}
diff --git a/src/common.rs b/src/common.rs
index 3025c8c9085d..f43743fc2a41 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -247,7 +247,7 @@ impl<'gcc, 'tcx> ConstCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 if !matches!(layout.primitive(), Pointer(_)) {
                     self.const_bitcast(ptr.dereference(None).to_rvalue(), ty)
                 } else {
-                    self.const_bitcast(ptr, ty)
+                    self.context.new_cast(None, ptr, ty)
                 }
             }
         }
diff --git a/src/consts.rs b/src/consts.rs
index ddb9e8336f4b..32b43e72b11f 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -1,6 +1,6 @@
 #[cfg(feature = "master")]
 use gccjit::{FnAttribute, VarAttribute, Visibility};
-use gccjit::{Function, GlobalKind, LValue, RValue, ToRValue, Type};
+use gccjit::{Function, FunctionType, GlobalKind, LValue, RValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{
     BaseTypeCodegenMethods, ConstCodegenMethods, StaticCodegenMethods,
 };
@@ -92,7 +92,84 @@ impl<'gcc, 'tcx> StaticCodegenMethods for CodegenCx<'gcc, 'tcx> {
         }
         set_global_alignment(self, global, alloc.align);
 
-        global.global_set_initializer_rvalue(value);
+
+        // TODO: if I still use this code, find the name of the variable in a better way (using
+        // def_id).
+        let var_name = format!("{:?}", global);
+        if var_name.contains("FN") && var_name.contains("memchr") {
+            println!("Var name: {:?}", var_name);
+
+            let ptr_type = value.get_type().make_pointer();
+
+            // TODO: remove \x01
+            //let prefix = if self.cgcx.target_arch == "x86" { "\x01__imp__" } else { "\x01__imp_" };
+            let prefix = "__imp__";
+            let mut imp_name = prefix.to_string();
+            imp_name.push_str(&var_name);
+
+            // FIXME: if I understand correctly the code in cg_llvm, the kind should be Imported.
+            /*let imp_global = self.context.new_global(None, GlobalKind::Exported, ptr_type, &imp_name);
+            imp_global.global_set_initializer_rvalue(global.get_address(None));*/
+
+            /*
+            /*let context = gccjit::Context::default();
+            let global = context.new_global(None, GlobalKind::Exported, val_llty, &var_name);
+            global.global_set_initializer_rvalue(value);
+            context.compile_to_file(gccjit::OutputKind::ObjectFile, format!("{}.o", var_name));*/
+
+            let void_type = self.context.new_type::<()>();
+            let fn_ptr_type = self.context.new_function_pointer_type(None, void_type, &[], false);
+            let my_name = format!("MY_NAME${}", var_name);
+            //let global = self.context.new_global(None, GlobalKind::Exported, fn_ptr_type, my_name);
+            //global.add_attribute(VarAttribute::Used);
+            println!("{:?} = {:?}", var_name, value);
+
+            let my_func_name = format!("MY_FUNC${}", var_name);
+            let func = self.context.new_function(None, FunctionType::Exported, void_type, &[], &my_func_name, false);
+            func.add_attribute(FnAttribute::Used);
+            let block = func.new_block("start");
+            block.end_with_void_return(None);
+
+            //let func = self.context.new_function(None, FunctionType::Extern, void_type, &[], "puts", false);
+            let value = func.get_address(None);
+            //let global = self.context.new_global(None, GlobalKind::Exported, value.get_type(), my_name);
+            //let value = self.context.new_bitcast(None, func.get_address(None), fn_ptr_type);
+            /*
+             * TODO: Check if the hard-coded function has the correct name.
+             * ===> It seems so.
+             * TODO: try with a function we know exists.
+             * ===> It doesn't seem to help.
+             * TODO: check if the .o contains the value (before linking into the .so).
+             * ===> It seems the object file doesn't contain the value either.
+             * ======> This is because there are relocations.
+             * TODO: check if fold in GCC erases the value.
+             * ===> It doesn't seem so.
+             *
+             * TODO TODO: try again this code with using the used attribute.
+             */
+
+            /*let var_type = global.to_rvalue().get_type();
+            let struct_type = var_type.is_struct().unwrap();
+            /*let field1_type = struct_type.get_field(0).get_type();
+            let field2_type = struct_type.get_field(1).get_type();*/
+
+            let field1 = value;
+            let field2 = self.context.new_rvalue_zero(self.int_type);
+
+            let struct_val = self.context.new_struct_constructor(None, var_type, None, &[field1, field2]);
+            let value = struct_val;*/
+
+            //let value = self.context.new_bitcast(None, func.get_address(None), val_llty);
+
+            //let value = self.context.new_rvalue_from_int(self.usize_type, 10293);
+            //let value = self.context.new_cast(None, value, fn_ptr_type); // WORKS
+            //let value = self.context.new_bitcast(None, value, fn_ptr_type); // Also WORKS
+            let value = self.context.new_bitcast(None, value, val_llty);*/
+            global.global_set_initializer_rvalue(value);
+        }
+        else {
+            global.global_set_initializer_rvalue(value);
+        }
 
         // As an optimization, all shared statics which do not have interior
         // mutability are placed into read-only memory.

From 8bc4863951fb685902bc55e2667802bdd7a6ceb9 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 5 Jan 2025 15:16:27 -0500
Subject: [PATCH 791/997] Fix for ThinLTO

---
 src/back/write.rs | 99 ++++++++++++++++++++++++++++++-----------------
 1 file changed, 64 insertions(+), 35 deletions(-)

diff --git a/src/back/write.rs b/src/back/write.rs
index ad071a331305..9d903a3f75e2 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -6,7 +6,7 @@ use rustc_codegen_ssa::back::write::{BitcodeSection, CodegenContext, EmitObj, Mo
 use rustc_codegen_ssa::{CompiledModule, ModuleCodegen};
 use rustc_errors::DiagCtxtHandle;
 use rustc_fs_util::link_or_copy;
-use rustc_session::config::OutputType;
+use rustc_session::config::{Lto, OutputType};
 use rustc_span::fatal_error::FatalError;
 use rustc_target::spec::SplitDebuginfo;
 
@@ -42,45 +42,74 @@ pub(crate) unsafe fn codegen(
         let bc_out = cgcx.output_filenames.temp_path(OutputType::Bitcode, module_name);
         let obj_out = cgcx.output_filenames.temp_path(OutputType::Object, module_name);
 
-        if config.bitcode_needed() && fat_lto {
-            let _timer = cgcx
-                .prof
-                .generic_activity_with_arg("GCC_module_codegen_make_bitcode", &*module.name);
-
-            // TODO(antoyo)
-            /*if let Some(bitcode_filename) = bc_out.file_name() {
-                cgcx.prof.artifact_size(
-                    "llvm_bitcode",
-                    bitcode_filename.to_string_lossy(),
-                    data.len() as u64,
-                );
-            }*/
-
-            if config.emit_bc || config.emit_obj == EmitObj::Bitcode {
+        if config.bitcode_needed() {
+            if fat_lto {
                 let _timer = cgcx
                     .prof
-                    .generic_activity_with_arg("GCC_module_codegen_emit_bitcode", &*module.name);
-                context.add_command_line_option("-flto=auto");
-                context.add_command_line_option("-flto-partition=one");
-                // TODO: remove since we don't want fat objects when it is for Bitcode only.
-                context.add_command_line_option("-ffat-lto-objects");
-                context
-                    .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+                    .generic_activity_with_arg("GCC_module_codegen_make_bitcode", &*module.name);
+
+                // TODO(antoyo)
+                /*if let Some(bitcode_filename) = bc_out.file_name() {
+                    cgcx.prof.artifact_size(
+                        "llvm_bitcode",
+                        bitcode_filename.to_string_lossy(),
+                        data.len() as u64,
+                    );
+                }*/
+
+                if config.emit_bc || config.emit_obj == EmitObj::Bitcode {
+                    let _timer = cgcx
+                        .prof
+                        .generic_activity_with_arg("GCC_module_codegen_emit_bitcode", &*module.name);
+                    context.add_command_line_option("-flto=auto");
+                    context.add_command_line_option("-flto-partition=one");
+                    // TODO: remove since we don't want fat objects when it is for Bitcode only.
+                    context.add_command_line_option("-ffat-lto-objects");
+                    context
+                        .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+                }
+
+                if config.emit_obj == EmitObj::ObjectCode(BitcodeSection::Full) {
+                    let _timer = cgcx
+                        .prof
+                        .generic_activity_with_arg("GCC_module_codegen_embed_bitcode", &*module.name);
+                    // TODO(antoyo): maybe we should call embed_bitcode to have the proper iOS fixes?
+                    //embed_bitcode(cgcx, llcx, llmod, &config.bc_cmdline, data);
+
+                    context.add_command_line_option("-flto=auto");
+                    context.add_command_line_option("-flto-partition=one");
+                    context.add_command_line_option("-ffat-lto-objects");
+                    // TODO(antoyo): Send -plugin/usr/lib/gcc/x86_64-pc-linux-gnu/11.1.0/liblto_plugin.so to linker (this should be done when specifying the appropriate rustc cli argument).
+                    context
+                        .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+                }
             }
+            else {
+                if config.emit_bc || config.emit_obj == EmitObj::Bitcode {
+                    let _timer = cgcx
+                        .prof
+                        .generic_activity_with_arg("GCC_module_codegen_emit_bitcode", &*module.name);
+                    context
+                        .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+                }
 
-            if config.emit_obj == EmitObj::ObjectCode(BitcodeSection::Full) {
-                let _timer = cgcx
-                    .prof
-                    .generic_activity_with_arg("GCC_module_codegen_embed_bitcode", &*module.name);
-                // TODO(antoyo): maybe we should call embed_bitcode to have the proper iOS fixes?
-                //embed_bitcode(cgcx, llcx, llmod, &config.bc_cmdline, data);
+                if config.emit_obj == EmitObj::ObjectCode(BitcodeSection::Full) {
+                    // TODO: we might want to emit to emit an error here, saying to set the
+                    // environment variable EMBED_LTO_BITCODE.
+                    unreachable!();
+                    let _timer = cgcx
+                        .prof
+                        .generic_activity_with_arg("GCC_module_codegen_embed_bitcode", &*module.name);
+                    // TODO(antoyo): maybe we should call embed_bitcode to have the proper iOS fixes?
+                    //embed_bitcode(cgcx, llcx, llmod, &config.bc_cmdline, data);
 
-                context.add_command_line_option("-flto=auto");
-                context.add_command_line_option("-flto-partition=one");
-                context.add_command_line_option("-ffat-lto-objects");
-                // TODO(antoyo): Send -plugin/usr/lib/gcc/x86_64-pc-linux-gnu/11.1.0/liblto_plugin.so to linker (this should be done when specifying the appropriate rustc cli argument).
-                context
-                    .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+                    context.add_command_line_option("-flto=auto");
+                    context.add_command_line_option("-flto-partition=one");
+                    context.add_command_line_option("-ffat-lto-objects");
+                    // TODO(antoyo): Send -plugin/usr/lib/gcc/x86_64-pc-linux-gnu/11.1.0/liblto_plugin.so to linker (this should be done when specifying the appropriate rustc cli argument).
+                    context
+                        .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+                }
             }
         }
 

From 59afbe091324294b40528db7e6bbd55d1a47b447 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 8 Jan 2025 21:26:26 -0500
Subject: [PATCH 792/997] Fix for the relocation bug

---
 build_system/src/build.rs | 16 +++++++++++++---
 build_system/src/test.rs  | 19 ++++++++++++++-----
 src/base.rs               | 23 +++++++++++++++++++----
 src/consts.rs             | 16 +++++++++++-----
 src/declare.rs            |  4 ++++
 src/lib.rs                |  1 +
 src/mono_item.rs          |  3 +++
 7 files changed, 65 insertions(+), 17 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index e93e8570e6aa..b62bd44c6ac7 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -158,18 +158,28 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
 
     let mut env = env.clone();
     /*rustflags.push_str(" -C link-arg=-Wl,--verbose");
-    rustflags.push_str(" -C link-arg=-Wl,--warn-ifunc-textrel");
+    rustflags.push_str(" -C link-arg=-Wl,--warn-shared-textrel"); // Mold and Gold.
+    //rustflags.push_str(" -C link-arg=-Wl,--warn-textrel"); // Mold
     rustflags.push_str(" -C link-arg=-Wl,--warn-unresolved-symbols");
     rustflags.push_str(" -C link-arg=-Wl,--fatal-warnings");
+    rustflags.push_str(" -C link-arg=-Wl,--print-gc-sections");*/
+    //rustflags.push_str(" -C link-arg=-Wl,--no-apply-dynamic-relocs"); // Mold
+    /*rustflags.push_str(" -C link-arg=-Wl,--warn-ifunc-textrel");
     rustflags.push_str(" -C link-arg=-Wl,--warn-backrefs");
     rustflags.push_str(" -C link-arg=-Wl,-znotext");
     //rustflags.push_str(" -C link-arg=-Wl,--emit-relocs");
     //rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=memchr::arch::x86_64::memchr::memchr_raw::FN");
     //rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=_ZN6memchr4arch6x86_646memchr10memchr_raw2FN17haaf621f7b8ca567eE");
     //rustflags.push_str(" -C link-arg=-Wl,--print-map");
-    //rustflags.push_str(" -C link-arg=-Wl,");
+    //rustflags.push_str(" -C link-arg=-Wl,");*/
+    //rustflags.push_str(" -Clinker=/usr/bin/ld.gold");
+    // TODO: try with verbose, warnings and logs.
+    //rustflags.push_str(" -Clinker=/usr/bin/clang");
+    //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/mold");
+    //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/ld.bfd");
+    //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/ld.gold");
+    env.insert("RUSTC_LOG".to_string(), "rustc_codegen_ssa::back::link=info".to_string());
     env.insert("RUSTFLAGS".to_string(), rustflags);
-    env.insert("RUSTC_LOG".to_string(), "rustc_codegen_ssa::back::link=info".to_string());*/
     run_command_with_output_and_env(&args, Some(&start_dir), Some(&env))?;
 
     // Copy files to sysroot
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 2886062043b9..6a70fe8d2b82 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -697,14 +697,23 @@ fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
     let rustflags =
         env.entry("RUSTFLAGS".to_string())
         .or_default();
-    rustflags.push_str(" -C link-arg=-Wl,--verbose");
-    rustflags.push_str(" -C link-arg=-Wl,--warn-ifunc-textrel");
-    rustflags.push_str(" -C link-arg=-Wl,--warn-unresolved-symbols");
-    rustflags.push_str(" -C link-arg=-Wl,--fatal-warnings");
+    //rustflags.push_str(" -C link-arg=-Wl,--verbose");
+    //rustflags.push_str(" -C link-arg=-Wl,--fatal-warnings");
+    //rustflags.push_str(" -C link-arg=-Wl,--warn-unresolved-symbols");
+    //rustflags.push_str(" -C link-arg=-Wl,--warn-shared-textrel"); // Mold and Gold.
+    //rustflags.push_str(" -C link-arg=-Wl,--warn-textrel"); // Mold
+    //rustflags.push_str(" -C link-arg=-Wl,--print-gc-sections");
+    //rustflags.push_str(" -C link-arg=-Wl,--no-apply-dynamic-relocs"); // Mold
+    /*rustflags.push_str(" -C link-arg=-Wl,--warn-ifunc-textrel");
     rustflags.push_str(" -C link-arg=-Wl,--warn-backrefs");
     rustflags.push_str(" -C link-arg=-Wl,-znotext");
     rustflags.push_str(" -C link-arg=-Wl,--emit-relocs");
-    rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=memchr::arch::x86_64::memchr::memchr_raw::FN");
+    rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=memchr::arch::x86_64::memchr::memchr_raw::FN");*/
+    //rustflags.push_str(" -Clinker=/usr/bin/ld.gol");
+    //rustflags.push_str(" -Clinker=/usr/bin/clang");
+    //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/mold");
+    //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/ld.bfd");
+    //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/ld.gold");
     // FIXME FIXME: seems like RUSTFLAGS is not set here.
     //rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=_ZN6memchr4arch6x86_646memchr10memchr_raw2FN17haaf621f7b8ca567eE");
     //rustflags.push_str(" -C link-arg=-Wl,--print-map");
diff --git a/src/base.rs b/src/base.rs
index c92dbc981955..d457928ce08e 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -43,8 +43,8 @@ pub fn symbol_visibility_to_gcc(visibility: SymbolVisibility) -> gccjit::Visibil
 
 pub fn global_linkage_to_gcc(linkage: Linkage) -> GlobalKind {
     match linkage {
-        Linkage::External => GlobalKind::Imported,
-        Linkage::AvailableExternally => GlobalKind::Imported,
+        Linkage::External => GlobalKind::Exported,
+        Linkage::AvailableExternally => GlobalKind::Exported,
         Linkage::LinkOnceAny => unimplemented!(),
         Linkage::LinkOnceODR => unimplemented!(),
         Linkage::WeakAny => unimplemented!(),
@@ -151,8 +151,23 @@ pub fn compile_codegen_unit(
             });
         }
 
-        if tcx.sess.relocation_model() == rustc_target::spec::RelocModel::Static {
-            context.add_command_line_option("-fno-pie");
+        match tcx.sess.relocation_model() {
+            rustc_target::spec::RelocModel::Static => {
+                //println!("*** Static");
+                context.add_command_line_option("-fno-pie");
+                context.add_driver_option("-fno-pie");
+            },
+            rustc_target::spec::RelocModel::Pic => {
+                //println!("*** Pic");
+                context.add_command_line_option("-fPIC");
+                context.add_driver_option("-fPIC");
+            },
+            rustc_target::spec::RelocModel::Pie => {
+                //println!("*** Pie");
+                context.add_command_line_option("-fPIE");
+                context.add_driver_option("-fPIE");
+            },
+            model => eprintln!("Unsupported relocation model: {:?}", model),
         }
 
         let target_cpu = gcc_util::target_cpu(tcx.sess);
diff --git a/src/consts.rs b/src/consts.rs
index 32b43e72b11f..7cba39bcea10 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -97,8 +97,10 @@ impl<'gcc, 'tcx> StaticCodegenMethods for CodegenCx<'gcc, 'tcx> {
         // def_id).
         let var_name = format!("{:?}", global);
         if var_name.contains("FN") && var_name.contains("memchr") {
-            println!("Var name: {:?}", var_name);
+            //println!("Var name: {:?}", var_name);
+            println!("INITIALIZE: {:?} = {:?}", var_name, value);
 
+            /*
             let ptr_type = value.get_type().make_pointer();
 
             // TODO: remove \x01
@@ -108,8 +110,9 @@ impl<'gcc, 'tcx> StaticCodegenMethods for CodegenCx<'gcc, 'tcx> {
             imp_name.push_str(&var_name);
 
             // FIXME: if I understand correctly the code in cg_llvm, the kind should be Imported.
-            /*let imp_global = self.context.new_global(None, GlobalKind::Exported, ptr_type, &imp_name);
-            imp_global.global_set_initializer_rvalue(global.get_address(None));*/
+            let imp_global = self.context.new_global(None, GlobalKind::Exported, ptr_type, &imp_name);
+            imp_global.global_set_initializer_rvalue(global.get_address(None));
+            */
 
             /*
             /*let context = gccjit::Context::default();
@@ -122,7 +125,6 @@ impl<'gcc, 'tcx> StaticCodegenMethods for CodegenCx<'gcc, 'tcx> {
             let my_name = format!("MY_NAME${}", var_name);
             //let global = self.context.new_global(None, GlobalKind::Exported, fn_ptr_type, my_name);
             //global.add_attribute(VarAttribute::Used);
-            println!("{:?} = {:?}", var_name, value);
 
             let my_func_name = format!("MY_FUNC${}", var_name);
             let func = self.context.new_function(None, FunctionType::Exported, void_type, &[], &my_func_name, false);
@@ -166,6 +168,7 @@ impl<'gcc, 'tcx> StaticCodegenMethods for CodegenCx<'gcc, 'tcx> {
             //let value = self.context.new_bitcast(None, value, fn_ptr_type); // Also WORKS
             let value = self.context.new_bitcast(None, value, val_llty);*/
             global.global_set_initializer_rvalue(value);
+            println!("=== AFTER INITIALIZE");
         }
         else {
             global.global_set_initializer_rvalue(value);
@@ -326,10 +329,13 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             }
 
             let is_tls = fn_attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
+            if sym.contains("memchr") && sym.contains("FN") {
+                println!("** DECLARE");
+            }
             let global = self.declare_global(
                 sym,
                 gcc_type,
-                GlobalKind::Exported,
+                GlobalKind::Imported,
                 is_tls,
                 fn_attrs.link_section,
             );
diff --git a/src/declare.rs b/src/declare.rs
index 442488b7fd65..ac82ed4b3b8c 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -29,6 +29,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             }
             global
         } else {
+            // HERE: ExternalLinkage.
             self.declare_global(name, ty, GlobalKind::Exported, is_tls, link_section)
         }
     }
@@ -69,6 +70,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         is_tls: bool,
         link_section: Option<Symbol>,
     ) -> LValue<'gcc> {
+        if name.contains("memchr") && name.contains("FN") {
+            println!("{}: {:?}: {:?}", self.codegen_unit.name(), name, global_kind);
+        }
         let global = self.context.new_global(None, global_kind, ty, name);
         if is_tls {
             global.set_tls_model(self.tls_model);
diff --git a/src/lib.rs b/src/lib.rs
index cc57ac5fb71f..a71ec9ba6a49 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -269,6 +269,7 @@ impl CodegenBackend for GccCodegenBackend {
 
 fn new_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
     let context = Context::default();
+    //context.add_driver_option("-pie");
     if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" {
         context.add_command_line_option("-masm=intel");
     }
diff --git a/src/mono_item.rs b/src/mono_item.rs
index 239902df7f04..90d4386a760e 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -32,6 +32,9 @@ impl<'gcc, 'tcx> PreDefineCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let gcc_type = self.layout_of(ty).gcc_type(self);
 
         let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
+        if symbol_name.contains("memchr") && symbol_name.contains("FN") {
+            println!("** DECLARE static");
+        }
         let global = self.define_global(symbol_name, gcc_type, is_tls, attrs.link_section);
         #[cfg(feature = "master")]
         global.add_attribute(VarAttribute::Visibility(base::visibility_to_gcc(visibility)));

From 3f23706c6ca89f25dc337b65e1769ca749960a94 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 8 Jan 2025 21:31:32 -0500
Subject: [PATCH 793/997] Cleanup

---
 build_system/src/build.rs |  4 +--
 build_system/src/test.rs  | 12 +++----
 src/back/write.rs         | 76 ++++++++++++++++++++-------------------
 src/base.rs               |  6 ++--
 src/consts.rs             | 14 ++++----
 src/declare.rs            |  4 +--
 src/mono_item.rs          |  4 +--
 7 files changed, 60 insertions(+), 60 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index b62bd44c6ac7..d0e6beb376ee 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -130,7 +130,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     if config.no_default_features {
         rustflags.push_str(" -Csymbol-mangling-version=v0");
     }
-    rustflags.push_str(" --print link-args");
+    //rustflags.push_str(" --print link-args");
 
     let mut args: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"build", &"--target", &config.target];
     for feature in &config.features {
@@ -178,7 +178,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/mold");
     //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/ld.bfd");
     //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/ld.gold");
-    env.insert("RUSTC_LOG".to_string(), "rustc_codegen_ssa::back::link=info".to_string());
+    //env.insert("RUSTC_LOG".to_string(), "rustc_codegen_ssa::back::link=info".to_string());
     env.insert("RUSTFLAGS".to_string(), rustflags);
     run_command_with_output_and_env(&args, Some(&start_dir), Some(&env))?;
 
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 6a70fe8d2b82..060bfb8880e1 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -692,11 +692,11 @@ fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
     println!("[TEST] libcore");
     let path = get_sysroot_dir().join("sysroot_src/library/core/tests");
     let _ = remove_dir_all(path.join("target"));
-    let mut env = env.clone();
-    env.insert("RUSTC_LOG".to_string(), "rustc_codegen_ssa::back::link=info".to_string());
-    let rustflags =
-        env.entry("RUSTFLAGS".to_string())
-        .or_default();
+    /*let mut env = env.clone();
+    env.insert("RUSTC_LOG".to_string(), "rustc_codegen_ssa::back::link=info".to_string());*/
+    /*let rustflags =
+    env.entry("RUSTFLAGS".to_string())
+    .or_default();*/
     //rustflags.push_str(" -C link-arg=-Wl,--verbose");
     //rustflags.push_str(" -C link-arg=-Wl,--fatal-warnings");
     //rustflags.push_str(" -C link-arg=-Wl,--warn-unresolved-symbols");
@@ -718,7 +718,7 @@ fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
     //rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=_ZN6memchr4arch6x86_646memchr10memchr_raw2FN17haaf621f7b8ca567eE");
     //rustflags.push_str(" -C link-arg=-Wl,--print-map");
     //rustflags.push_str(" -Clink-arg=-not-an-arg");
-    run_cargo_command(&[&"test"], Some(&path), &env, args)?;
+    run_cargo_command(&[&"test"], Some(&path), env, args)?;
     Ok(())
 }
 
diff --git a/src/back/write.rs b/src/back/write.rs
index 9d903a3f75e2..33e76c4565cf 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -1,12 +1,12 @@
 use std::{env, fs};
 
-use gccjit::{Context, OutputKind};
+use gccjit::OutputKind;
 use rustc_codegen_ssa::back::link::ensure_removed;
 use rustc_codegen_ssa::back::write::{BitcodeSection, CodegenContext, EmitObj, ModuleConfig};
 use rustc_codegen_ssa::{CompiledModule, ModuleCodegen};
 use rustc_errors::DiagCtxtHandle;
 use rustc_fs_util::link_or_copy;
-use rustc_session::config::{Lto, OutputType};
+use rustc_session::config::OutputType;
 use rustc_span::fatal_error::FatalError;
 use rustc_target::spec::SplitDebuginfo;
 
@@ -34,10 +34,10 @@ pub(crate) unsafe fn codegen(
         // TODO: remove this environment variable.
         let fat_lto = env::var("EMBED_LTO_BITCODE").as_deref() == Ok("1");
 
-        if cgcx.msvc_imps_needed {
+        /*if cgcx.msvc_imps_needed {
             println!("************************************************** Imps needed");
             create_msvc_imps(cgcx, context);
-        }
+        }*/
 
         let bc_out = cgcx.output_filenames.temp_path(OutputType::Bitcode, module_name);
         let obj_out = cgcx.output_filenames.temp_path(OutputType::Object, module_name);
@@ -58,21 +58,25 @@ pub(crate) unsafe fn codegen(
                 }*/
 
                 if config.emit_bc || config.emit_obj == EmitObj::Bitcode {
-                    let _timer = cgcx
-                        .prof
-                        .generic_activity_with_arg("GCC_module_codegen_emit_bitcode", &*module.name);
+                    let _timer = cgcx.prof.generic_activity_with_arg(
+                        "GCC_module_codegen_emit_bitcode",
+                        &*module.name,
+                    );
                     context.add_command_line_option("-flto=auto");
                     context.add_command_line_option("-flto-partition=one");
                     // TODO: remove since we don't want fat objects when it is for Bitcode only.
                     context.add_command_line_option("-ffat-lto-objects");
-                    context
-                        .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+                    context.compile_to_file(
+                        OutputKind::ObjectFile,
+                        bc_out.to_str().expect("path to str"),
+                    );
                 }
 
                 if config.emit_obj == EmitObj::ObjectCode(BitcodeSection::Full) {
-                    let _timer = cgcx
-                        .prof
-                        .generic_activity_with_arg("GCC_module_codegen_embed_bitcode", &*module.name);
+                    let _timer = cgcx.prof.generic_activity_with_arg(
+                        "GCC_module_codegen_embed_bitcode",
+                        &*module.name,
+                    );
                     // TODO(antoyo): maybe we should call embed_bitcode to have the proper iOS fixes?
                     //embed_bitcode(cgcx, llcx, llmod, &config.bc_cmdline, data);
 
@@ -80,26 +84,30 @@ pub(crate) unsafe fn codegen(
                     context.add_command_line_option("-flto-partition=one");
                     context.add_command_line_option("-ffat-lto-objects");
                     // TODO(antoyo): Send -plugin/usr/lib/gcc/x86_64-pc-linux-gnu/11.1.0/liblto_plugin.so to linker (this should be done when specifying the appropriate rustc cli argument).
-                    context
-                        .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+                    context.compile_to_file(
+                        OutputKind::ObjectFile,
+                        bc_out.to_str().expect("path to str"),
+                    );
                 }
-            }
-            else {
+            } else {
                 if config.emit_bc || config.emit_obj == EmitObj::Bitcode {
-                    let _timer = cgcx
-                        .prof
-                        .generic_activity_with_arg("GCC_module_codegen_emit_bitcode", &*module.name);
-                    context
-                        .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+                    let _timer = cgcx.prof.generic_activity_with_arg(
+                        "GCC_module_codegen_emit_bitcode",
+                        &*module.name,
+                    );
+                    context.compile_to_file(
+                        OutputKind::ObjectFile,
+                        bc_out.to_str().expect("path to str"),
+                    );
                 }
 
                 if config.emit_obj == EmitObj::ObjectCode(BitcodeSection::Full) {
                     // TODO: we might want to emit to emit an error here, saying to set the
                     // environment variable EMBED_LTO_BITCODE.
-                    unreachable!();
-                    let _timer = cgcx
-                        .prof
-                        .generic_activity_with_arg("GCC_module_codegen_embed_bitcode", &*module.name);
+                    let _timer = cgcx.prof.generic_activity_with_arg(
+                        "GCC_module_codegen_embed_bitcode",
+                        &*module.name,
+                    );
                     // TODO(antoyo): maybe we should call embed_bitcode to have the proper iOS fixes?
                     //embed_bitcode(cgcx, llcx, llmod, &config.bc_cmdline, data);
 
@@ -107,8 +115,10 @@ pub(crate) unsafe fn codegen(
                     context.add_command_line_option("-flto-partition=one");
                     context.add_command_line_option("-ffat-lto-objects");
                     // TODO(antoyo): Send -plugin/usr/lib/gcc/x86_64-pc-linux-gnu/11.1.0/liblto_plugin.so to linker (this should be done when specifying the appropriate rustc cli argument).
-                    context
-                        .compile_to_file(OutputKind::ObjectFile, bc_out.to_str().expect("path to str"));
+                    context.compile_to_file(
+                        OutputKind::ObjectFile,
+                        bc_out.to_str().expect("path to str"),
+                    );
                 }
             }
         }
@@ -231,18 +241,10 @@ pub(crate) fn save_temp_bitcode(
     }*/
 }
 
-fn create_msvc_imps<'gcc>(
-    cgcx: &CodegenContext<GccCodegenBackend>,
-    context: &Context<'gcc>,
-) {
+/*fn create_msvc_imps<'gcc>(cgcx: &CodegenContext<GccCodegenBackend>, _context: &Context<'gcc>) {
     if !cgcx.msvc_imps_needed {
         return;
     }
-    // The x86 ABI seems to require that leading underscores are added to symbol
-    // names, so we need an extra underscore on x86. There's also a leading
-    // '\x01' here which disables LLVM's symbol mangling (e.g., no extra
-    // underscores added in front).
-    let prefix = if cgcx.target_arch == "x86" { "\x01__imp__" } else { "\x01__imp_" };
 
     /*unsafe {
         let ptr_ty = Type::ptr_llcx(llcx);
@@ -265,4 +267,4 @@ fn create_msvc_imps<'gcc>(
             llvm::set_linkage(imp, llvm::Linkage::ExternalLinkage);
         }
     }*/
-}
+}*/
diff --git a/src/base.rs b/src/base.rs
index d457928ce08e..eaa692a20467 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -156,17 +156,17 @@ pub fn compile_codegen_unit(
                 //println!("*** Static");
                 context.add_command_line_option("-fno-pie");
                 context.add_driver_option("-fno-pie");
-            },
+            }
             rustc_target::spec::RelocModel::Pic => {
                 //println!("*** Pic");
                 context.add_command_line_option("-fPIC");
                 context.add_driver_option("-fPIC");
-            },
+            }
             rustc_target::spec::RelocModel::Pie => {
                 //println!("*** Pie");
                 context.add_command_line_option("-fPIE");
                 context.add_driver_option("-fPIE");
-            },
+            }
             model => eprintln!("Unsupported relocation model: {:?}", model),
         }
 
diff --git a/src/consts.rs b/src/consts.rs
index 7cba39bcea10..4c3f03780641 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -1,6 +1,6 @@
 #[cfg(feature = "master")]
 use gccjit::{FnAttribute, VarAttribute, Visibility};
-use gccjit::{Function, FunctionType, GlobalKind, LValue, RValue, ToRValue, Type};
+use gccjit::{Function, GlobalKind, LValue, RValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::{
     BaseTypeCodegenMethods, ConstCodegenMethods, StaticCodegenMethods,
 };
@@ -92,13 +92,12 @@ impl<'gcc, 'tcx> StaticCodegenMethods for CodegenCx<'gcc, 'tcx> {
         }
         set_global_alignment(self, global, alloc.align);
 
-
         // TODO: if I still use this code, find the name of the variable in a better way (using
         // def_id).
         let var_name = format!("{:?}", global);
         if var_name.contains("FN") && var_name.contains("memchr") {
             //println!("Var name: {:?}", var_name);
-            println!("INITIALIZE: {:?} = {:?}", var_name, value);
+            //println!("INITIALIZE: {:?} = {:?}", var_name, value);
 
             /*
             let ptr_type = value.get_type().make_pointer();
@@ -168,9 +167,8 @@ impl<'gcc, 'tcx> StaticCodegenMethods for CodegenCx<'gcc, 'tcx> {
             //let value = self.context.new_bitcast(None, value, fn_ptr_type); // Also WORKS
             let value = self.context.new_bitcast(None, value, val_llty);*/
             global.global_set_initializer_rvalue(value);
-            println!("=== AFTER INITIALIZE");
-        }
-        else {
+            //println!("=== AFTER INITIALIZE");
+        } else {
             global.global_set_initializer_rvalue(value);
         }
 
@@ -329,9 +327,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             }
 
             let is_tls = fn_attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-            if sym.contains("memchr") && sym.contains("FN") {
+            /*if sym.contains("memchr") && sym.contains("FN") {
                 println!("** DECLARE");
-            }
+            }*/
             let global = self.declare_global(
                 sym,
                 gcc_type,
diff --git a/src/declare.rs b/src/declare.rs
index ac82ed4b3b8c..fa4f2e622e99 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -70,9 +70,9 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         is_tls: bool,
         link_section: Option<Symbol>,
     ) -> LValue<'gcc> {
-        if name.contains("memchr") && name.contains("FN") {
+        /*if name.contains("memchr") && name.contains("FN") {
             println!("{}: {:?}: {:?}", self.codegen_unit.name(), name, global_kind);
-        }
+        }*/
         let global = self.context.new_global(None, global_kind, ty, name);
         if is_tls {
             global.set_tls_model(self.tls_model);
diff --git a/src/mono_item.rs b/src/mono_item.rs
index 90d4386a760e..4fc2aad6437e 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -32,9 +32,9 @@ impl<'gcc, 'tcx> PreDefineCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let gcc_type = self.layout_of(ty).gcc_type(self);
 
         let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-        if symbol_name.contains("memchr") && symbol_name.contains("FN") {
+        /*if symbol_name.contains("memchr") && symbol_name.contains("FN") {
             println!("** DECLARE static");
-        }
+        }*/
         let global = self.define_global(symbol_name, gcc_type, is_tls, attrs.link_section);
         #[cfg(feature = "master")]
         global.add_attribute(VarAttribute::Visibility(base::visibility_to_gcc(visibility)));

From 34ed154343489cbf462ea08ed9e5c7f2f8eb2b99 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 9 Jan 2025 18:41:32 -0500
Subject: [PATCH 794/997] Fix LTO

---
 src/back/write.rs | 54 ++++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 51 insertions(+), 3 deletions(-)

diff --git a/src/back/write.rs b/src/back/write.rs
index 33e76c4565cf..2fa2bf651d55 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -1,6 +1,6 @@
 use std::{env, fs};
 
-use gccjit::OutputKind;
+use gccjit::{Context, OutputKind};
 use rustc_codegen_ssa::back::link::ensure_removed;
 use rustc_codegen_ssa::back::write::{BitcodeSection, CodegenContext, EmitObj, ModuleConfig};
 use rustc_codegen_ssa::{CompiledModule, ModuleCodegen};
@@ -176,10 +176,58 @@ pub(crate) unsafe fn codegen(
                     context.add_driver_option("-nostdlib");
 
                     // NOTE: this doesn't actually generate an executable. With the above flags, it combines the .o files together in another .o.
-                    context.compile_to_file(
+                    // FIXME FIXME: this produces an object file with GIMPLE IR, but it should
+                    // produce an object file with machine code.
+                    //println!("LTO-ed object file: {:?}", obj_out);
+                    /*context.compile_to_file(
                         OutputKind::Executable,
                         obj_out.to_str().expect("path to str"),
-                    );
+                    );*/
+
+                    let path = obj_out.to_str().expect("path to str");
+
+                    if fat_lto {
+                        let lto_path = format!("{}.lto", path);
+                        // FIXME(antoyo): The LTO frontend generates the following warning:
+                        // ../build_sysroot/sysroot_src/library/core/src/num/dec2flt/lemire.rs:150:15: warning: type of ‘_ZN4core3num7dec2flt5table17POWER_OF_FIVE_12817ha449a68fb31379e4E’ does not match original declaration [-Wlto-type-mismatch]
+                        // 150 |     let (lo5, hi5) = POWER_OF_FIVE_128[index];
+                        //     |               ^
+                        // lto1: note: ‘_ZN4core3num7dec2flt5table17POWER_OF_FIVE_12817ha449a68fb31379e4E’ was previously declared here
+                        //
+                        // This option is to mute it to make the UI tests pass with LTO enabled.
+                        context.add_driver_option("-Wno-lto-type-mismatch");
+                        // NOTE: this doesn't actually generate an executable. With the above
+                        // flags, it combines the .o files together in another .o.
+                        context.compile_to_file(OutputKind::Executable, &lto_path);
+
+                        let context = Context::default(); // TODO: might need to set some other flags from new_context.
+                        //context.add_driver_option("-v");
+                        //println!("*** Arch: {}", cgcx.target_arch);
+                        if cgcx.target_arch == "x86" || cgcx.target_arch == "x86_64" {
+                            //println!("**** Added -masm=intel");
+                            //context.add_command_line_option("-masm=intel");
+                            // NOTE: it seems we need to use add_driver_option instead of
+                            // add_command_line_option here because we use the LTO frontend via gcc.
+                            context.add_driver_option("-masm=intel");
+                        }
+
+                        // NOTE: these two options are needed to invoke LTO to produce an object file.
+                        // We need to initiate a second compilation because the arguments "-x lto"
+                        // needs to be at the very beginning.
+                        // TODO TODO: check that LTO still does the optimizations across different
+                        // object files with this change.
+                        // TODO: this should probably be in a condition `if fat_lto`.
+                        context.add_driver_option("-x");
+                        context.add_driver_option("lto");
+                        context.add_driver_option("-fPIC"); // TODO TODO: only add this flag when necessary.
+                        context.add_driver_option(lto_path);
+
+                        context.compile_to_file(OutputKind::ObjectFile, path);
+                    } else {
+                        // NOTE: this doesn't actually generate an executable. With the above
+                        // flags, it combines the .o files together in another .o.
+                        context.compile_to_file(OutputKind::Executable, path);
+                    }
                 } else {
                     context.compile_to_file(
                         OutputKind::ObjectFile,

From 93693a52dc1b92e6220dde1cb8cb4d4e0a846983 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 10 Jan 2025 11:10:58 -0500
Subject: [PATCH 795/997] Disable the LTO warning for now

---
 src/back/write.rs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/back/write.rs b/src/back/write.rs
index 2fa2bf651d55..1f4eab28574a 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -167,6 +167,10 @@ pub(crate) unsafe fn codegen(
 
                         // NOTE: without -fuse-linker-plugin, we get the following error:
                         // lto1: internal compiler error: decompressed stream: Destination buffer is too small
+                        // TODO: since we do not do LTO when the linker is invoked anymore, perhaps
+                        // the following flag is not necessary anymore.
+                        // TODO: also, perhaps compiling the gcc driver in the CI is not necessary
+                        // anymore.
                         context.add_driver_option("-fuse-linker-plugin");
                     }
 

From 3e4df68991544276099759b754c021f11bd525fe Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 10 Jan 2025 12:05:37 -0500
Subject: [PATCH 796/997] Fix for m68k

---
 src/back/write.rs | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/back/write.rs b/src/back/write.rs
index 1f4eab28574a..37a59e51c4b5 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -111,9 +111,12 @@ pub(crate) unsafe fn codegen(
                     // TODO(antoyo): maybe we should call embed_bitcode to have the proper iOS fixes?
                     //embed_bitcode(cgcx, llcx, llmod, &config.bc_cmdline, data);
 
-                    context.add_command_line_option("-flto=auto");
-                    context.add_command_line_option("-flto-partition=one");
-                    context.add_command_line_option("-ffat-lto-objects");
+                    // TODO: check if this condition makes sense.
+                    if fat_lto {
+                        context.add_command_line_option("-flto=auto");
+                        context.add_command_line_option("-flto-partition=one");
+                        context.add_command_line_option("-ffat-lto-objects");
+                    }
                     // TODO(antoyo): Send -plugin/usr/lib/gcc/x86_64-pc-linux-gnu/11.1.0/liblto_plugin.so to linker (this should be done when specifying the appropriate rustc cli argument).
                     context.compile_to_file(
                         OutputKind::ObjectFile,

From 423701a3cf76dc96904878832c28709b36d8e778 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 10 Jan 2025 14:32:01 -0500
Subject: [PATCH 797/997] Add comment

---
 build_system/src/build.rs | 23 -----------
 build_system/src/test.rs  | 26 ------------
 src/back/write.rs         | 60 ++--------------------------
 src/base.rs               | 10 +----
 src/consts.rs             | 83 +--------------------------------------
 src/context.rs            |  1 +
 src/declare.rs            |  4 --
 src/lib.rs                |  3 +-
 src/mono_item.rs          |  3 --
 9 files changed, 8 insertions(+), 205 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index d0e6beb376ee..d0ced211a616 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -130,7 +130,6 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     if config.no_default_features {
         rustflags.push_str(" -Csymbol-mangling-version=v0");
     }
-    //rustflags.push_str(" --print link-args");
 
     let mut args: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"build", &"--target", &config.target];
     for feature in &config.features {
@@ -157,28 +156,6 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     }
 
     let mut env = env.clone();
-    /*rustflags.push_str(" -C link-arg=-Wl,--verbose");
-    rustflags.push_str(" -C link-arg=-Wl,--warn-shared-textrel"); // Mold and Gold.
-    //rustflags.push_str(" -C link-arg=-Wl,--warn-textrel"); // Mold
-    rustflags.push_str(" -C link-arg=-Wl,--warn-unresolved-symbols");
-    rustflags.push_str(" -C link-arg=-Wl,--fatal-warnings");
-    rustflags.push_str(" -C link-arg=-Wl,--print-gc-sections");*/
-    //rustflags.push_str(" -C link-arg=-Wl,--no-apply-dynamic-relocs"); // Mold
-    /*rustflags.push_str(" -C link-arg=-Wl,--warn-ifunc-textrel");
-    rustflags.push_str(" -C link-arg=-Wl,--warn-backrefs");
-    rustflags.push_str(" -C link-arg=-Wl,-znotext");
-    //rustflags.push_str(" -C link-arg=-Wl,--emit-relocs");
-    //rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=memchr::arch::x86_64::memchr::memchr_raw::FN");
-    //rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=_ZN6memchr4arch6x86_646memchr10memchr_raw2FN17haaf621f7b8ca567eE");
-    //rustflags.push_str(" -C link-arg=-Wl,--print-map");
-    //rustflags.push_str(" -C link-arg=-Wl,");*/
-    //rustflags.push_str(" -Clinker=/usr/bin/ld.gold");
-    // TODO: try with verbose, warnings and logs.
-    //rustflags.push_str(" -Clinker=/usr/bin/clang");
-    //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/mold");
-    //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/ld.bfd");
-    //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/ld.gold");
-    //env.insert("RUSTC_LOG".to_string(), "rustc_codegen_ssa::back::link=info".to_string());
     env.insert("RUSTFLAGS".to_string(), rustflags);
     run_command_with_output_and_env(&args, Some(&start_dir), Some(&env))?;
 
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 060bfb8880e1..371fcb4bc306 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -692,32 +692,6 @@ fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
     println!("[TEST] libcore");
     let path = get_sysroot_dir().join("sysroot_src/library/core/tests");
     let _ = remove_dir_all(path.join("target"));
-    /*let mut env = env.clone();
-    env.insert("RUSTC_LOG".to_string(), "rustc_codegen_ssa::back::link=info".to_string());*/
-    /*let rustflags =
-    env.entry("RUSTFLAGS".to_string())
-    .or_default();*/
-    //rustflags.push_str(" -C link-arg=-Wl,--verbose");
-    //rustflags.push_str(" -C link-arg=-Wl,--fatal-warnings");
-    //rustflags.push_str(" -C link-arg=-Wl,--warn-unresolved-symbols");
-    //rustflags.push_str(" -C link-arg=-Wl,--warn-shared-textrel"); // Mold and Gold.
-    //rustflags.push_str(" -C link-arg=-Wl,--warn-textrel"); // Mold
-    //rustflags.push_str(" -C link-arg=-Wl,--print-gc-sections");
-    //rustflags.push_str(" -C link-arg=-Wl,--no-apply-dynamic-relocs"); // Mold
-    /*rustflags.push_str(" -C link-arg=-Wl,--warn-ifunc-textrel");
-    rustflags.push_str(" -C link-arg=-Wl,--warn-backrefs");
-    rustflags.push_str(" -C link-arg=-Wl,-znotext");
-    rustflags.push_str(" -C link-arg=-Wl,--emit-relocs");
-    rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=memchr::arch::x86_64::memchr::memchr_raw::FN");*/
-    //rustflags.push_str(" -Clinker=/usr/bin/ld.gol");
-    //rustflags.push_str(" -Clinker=/usr/bin/clang");
-    //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/mold");
-    //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/ld.bfd");
-    //rustflags.push_str(" -Clink-arg=--ld-path=/usr/bin/ld.gold");
-    // FIXME FIXME: seems like RUSTFLAGS is not set here.
-    //rustflags.push_str(" -C link-arg=-Wl,--trace-symbol=_ZN6memchr4arch6x86_646memchr10memchr_raw2FN17haaf621f7b8ca567eE");
-    //rustflags.push_str(" -C link-arg=-Wl,--print-map");
-    //rustflags.push_str(" -Clink-arg=-not-an-arg");
     run_cargo_command(&[&"test"], Some(&path), env, args)?;
     Ok(())
 }
diff --git a/src/back/write.rs b/src/back/write.rs
index 37a59e51c4b5..007f30369abd 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -31,14 +31,9 @@ pub(crate) unsafe fn codegen(
 
         // NOTE: Only generate object files with GIMPLE when this environment variable is set for
         // now because this requires a particular setup (same gcc/lto1/lto-wrapper commit as libgccjit).
-        // TODO: remove this environment variable.
+        // TODO(antoyo): remove this environment variable.
         let fat_lto = env::var("EMBED_LTO_BITCODE").as_deref() == Ok("1");
 
-        /*if cgcx.msvc_imps_needed {
-            println!("************************************************** Imps needed");
-            create_msvc_imps(cgcx, context);
-        }*/
-
         let bc_out = cgcx.output_filenames.temp_path(OutputType::Bitcode, module_name);
         let obj_out = cgcx.output_filenames.temp_path(OutputType::Object, module_name);
 
@@ -64,7 +59,7 @@ pub(crate) unsafe fn codegen(
                     );
                     context.add_command_line_option("-flto=auto");
                     context.add_command_line_option("-flto-partition=one");
-                    // TODO: remove since we don't want fat objects when it is for Bitcode only.
+                    // TODO(antoyo): remove since we don't want fat objects when it is for Bitcode only.
                     context.add_command_line_option("-ffat-lto-objects");
                     context.compile_to_file(
                         OutputKind::ObjectFile,
@@ -102,7 +97,7 @@ pub(crate) unsafe fn codegen(
                 }
 
                 if config.emit_obj == EmitObj::ObjectCode(BitcodeSection::Full) {
-                    // TODO: we might want to emit to emit an error here, saying to set the
+                    // TODO(antoyo): we might want to emit to emit an error here, saying to set the
                     // environment variable EMBED_LTO_BITCODE.
                     let _timer = cgcx.prof.generic_activity_with_arg(
                         "GCC_module_codegen_embed_bitcode",
@@ -111,12 +106,6 @@ pub(crate) unsafe fn codegen(
                     // TODO(antoyo): maybe we should call embed_bitcode to have the proper iOS fixes?
                     //embed_bitcode(cgcx, llcx, llmod, &config.bc_cmdline, data);
 
-                    // TODO: check if this condition makes sense.
-                    if fat_lto {
-                        context.add_command_line_option("-flto=auto");
-                        context.add_command_line_option("-flto-partition=one");
-                        context.add_command_line_option("-ffat-lto-objects");
-                    }
                     // TODO(antoyo): Send -plugin/usr/lib/gcc/x86_64-pc-linux-gnu/11.1.0/liblto_plugin.so to linker (this should be done when specifying the appropriate rustc cli argument).
                     context.compile_to_file(
                         OutputKind::ObjectFile,
@@ -172,8 +161,6 @@ pub(crate) unsafe fn codegen(
                         // lto1: internal compiler error: decompressed stream: Destination buffer is too small
                         // TODO: since we do not do LTO when the linker is invoked anymore, perhaps
                         // the following flag is not necessary anymore.
-                        // TODO: also, perhaps compiling the gcc driver in the CI is not necessary
-                        // anymore.
                         context.add_driver_option("-fuse-linker-plugin");
                     }
 
@@ -182,15 +169,6 @@ pub(crate) unsafe fn codegen(
                     // /usr/bin/ld: cannot find -lgcc_s: No such file or directory
                     context.add_driver_option("-nostdlib");
 
-                    // NOTE: this doesn't actually generate an executable. With the above flags, it combines the .o files together in another .o.
-                    // FIXME FIXME: this produces an object file with GIMPLE IR, but it should
-                    // produce an object file with machine code.
-                    //println!("LTO-ed object file: {:?}", obj_out);
-                    /*context.compile_to_file(
-                        OutputKind::Executable,
-                        obj_out.to_str().expect("path to str"),
-                    );*/
-
                     let path = obj_out.to_str().expect("path to str");
 
                     if fat_lto {
@@ -208,11 +186,7 @@ pub(crate) unsafe fn codegen(
                         context.compile_to_file(OutputKind::Executable, &lto_path);
 
                         let context = Context::default(); // TODO: might need to set some other flags from new_context.
-                        //context.add_driver_option("-v");
-                        //println!("*** Arch: {}", cgcx.target_arch);
                         if cgcx.target_arch == "x86" || cgcx.target_arch == "x86_64" {
-                            //println!("**** Added -masm=intel");
-                            //context.add_command_line_option("-masm=intel");
                             // NOTE: it seems we need to use add_driver_option instead of
                             // add_command_line_option here because we use the LTO frontend via gcc.
                             context.add_driver_option("-masm=intel");
@@ -295,31 +269,3 @@ pub(crate) fn save_temp_bitcode(
         llvm::LLVMWriteBitcodeToFile(llmod, cstr.as_ptr());
     }*/
 }
-
-/*fn create_msvc_imps<'gcc>(cgcx: &CodegenContext<GccCodegenBackend>, _context: &Context<'gcc>) {
-    if !cgcx.msvc_imps_needed {
-        return;
-    }
-
-    /*unsafe {
-        let ptr_ty = Type::ptr_llcx(llcx);
-        let globals = base::iter_globals(llmod)
-            .filter(|&val| {
-                llvm::get_linkage(val) == llvm::Linkage::ExternalLinkage
-                    && llvm::LLVMIsDeclaration(val) == 0
-            })
-            .map(move |(val, name)| {
-                let mut imp_name = prefix.as_bytes().to_vec();
-                imp_name.extend(name);
-                let imp_name = CString::new(imp_name).unwrap();
-                (imp_name, val)
-            })
-            .collect::<Vec<_>>();
-
-        for (imp_name, val) in globals {
-            let imp = llvm::LLVMAddGlobal(llmod, ptr_ty, imp_name.as_ptr());
-            llvm::LLVMSetInitializer(imp, val);
-            llvm::set_linkage(imp, llvm::Linkage::ExternalLinkage);
-        }
-    }*/
-}*/
diff --git a/src/base.rs b/src/base.rs
index eaa692a20467..4ac25fd7019d 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -43,8 +43,8 @@ pub fn symbol_visibility_to_gcc(visibility: SymbolVisibility) -> gccjit::Visibil
 
 pub fn global_linkage_to_gcc(linkage: Linkage) -> GlobalKind {
     match linkage {
-        Linkage::External => GlobalKind::Exported,
-        Linkage::AvailableExternally => GlobalKind::Exported,
+        Linkage::External => GlobalKind::Imported,
+        Linkage::AvailableExternally => GlobalKind::Imported,
         Linkage::LinkOnceAny => unimplemented!(),
         Linkage::LinkOnceODR => unimplemented!(),
         Linkage::WeakAny => unimplemented!(),
@@ -153,19 +153,13 @@ pub fn compile_codegen_unit(
 
         match tcx.sess.relocation_model() {
             rustc_target::spec::RelocModel::Static => {
-                //println!("*** Static");
                 context.add_command_line_option("-fno-pie");
-                context.add_driver_option("-fno-pie");
             }
             rustc_target::spec::RelocModel::Pic => {
-                //println!("*** Pic");
                 context.add_command_line_option("-fPIC");
-                context.add_driver_option("-fPIC");
             }
             rustc_target::spec::RelocModel::Pie => {
-                //println!("*** Pie");
                 context.add_command_line_option("-fPIE");
-                context.add_driver_option("-fPIE");
             }
             model => eprintln!("Unsupported relocation model: {:?}", model),
         }
diff --git a/src/consts.rs b/src/consts.rs
index 4c3f03780641..1631ecfeecf3 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -92,85 +92,7 @@ impl<'gcc, 'tcx> StaticCodegenMethods for CodegenCx<'gcc, 'tcx> {
         }
         set_global_alignment(self, global, alloc.align);
 
-        // TODO: if I still use this code, find the name of the variable in a better way (using
-        // def_id).
-        let var_name = format!("{:?}", global);
-        if var_name.contains("FN") && var_name.contains("memchr") {
-            //println!("Var name: {:?}", var_name);
-            //println!("INITIALIZE: {:?} = {:?}", var_name, value);
-
-            /*
-            let ptr_type = value.get_type().make_pointer();
-
-            // TODO: remove \x01
-            //let prefix = if self.cgcx.target_arch == "x86" { "\x01__imp__" } else { "\x01__imp_" };
-            let prefix = "__imp__";
-            let mut imp_name = prefix.to_string();
-            imp_name.push_str(&var_name);
-
-            // FIXME: if I understand correctly the code in cg_llvm, the kind should be Imported.
-            let imp_global = self.context.new_global(None, GlobalKind::Exported, ptr_type, &imp_name);
-            imp_global.global_set_initializer_rvalue(global.get_address(None));
-            */
-
-            /*
-            /*let context = gccjit::Context::default();
-            let global = context.new_global(None, GlobalKind::Exported, val_llty, &var_name);
-            global.global_set_initializer_rvalue(value);
-            context.compile_to_file(gccjit::OutputKind::ObjectFile, format!("{}.o", var_name));*/
-
-            let void_type = self.context.new_type::<()>();
-            let fn_ptr_type = self.context.new_function_pointer_type(None, void_type, &[], false);
-            let my_name = format!("MY_NAME${}", var_name);
-            //let global = self.context.new_global(None, GlobalKind::Exported, fn_ptr_type, my_name);
-            //global.add_attribute(VarAttribute::Used);
-
-            let my_func_name = format!("MY_FUNC${}", var_name);
-            let func = self.context.new_function(None, FunctionType::Exported, void_type, &[], &my_func_name, false);
-            func.add_attribute(FnAttribute::Used);
-            let block = func.new_block("start");
-            block.end_with_void_return(None);
-
-            //let func = self.context.new_function(None, FunctionType::Extern, void_type, &[], "puts", false);
-            let value = func.get_address(None);
-            //let global = self.context.new_global(None, GlobalKind::Exported, value.get_type(), my_name);
-            //let value = self.context.new_bitcast(None, func.get_address(None), fn_ptr_type);
-            /*
-             * TODO: Check if the hard-coded function has the correct name.
-             * ===> It seems so.
-             * TODO: try with a function we know exists.
-             * ===> It doesn't seem to help.
-             * TODO: check if the .o contains the value (before linking into the .so).
-             * ===> It seems the object file doesn't contain the value either.
-             * ======> This is because there are relocations.
-             * TODO: check if fold in GCC erases the value.
-             * ===> It doesn't seem so.
-             *
-             * TODO TODO: try again this code with using the used attribute.
-             */
-
-            /*let var_type = global.to_rvalue().get_type();
-            let struct_type = var_type.is_struct().unwrap();
-            /*let field1_type = struct_type.get_field(0).get_type();
-            let field2_type = struct_type.get_field(1).get_type();*/
-
-            let field1 = value;
-            let field2 = self.context.new_rvalue_zero(self.int_type);
-
-            let struct_val = self.context.new_struct_constructor(None, var_type, None, &[field1, field2]);
-            let value = struct_val;*/
-
-            //let value = self.context.new_bitcast(None, func.get_address(None), val_llty);
-
-            //let value = self.context.new_rvalue_from_int(self.usize_type, 10293);
-            //let value = self.context.new_cast(None, value, fn_ptr_type); // WORKS
-            //let value = self.context.new_bitcast(None, value, fn_ptr_type); // Also WORKS
-            let value = self.context.new_bitcast(None, value, val_llty);*/
-            global.global_set_initializer_rvalue(value);
-            //println!("=== AFTER INITIALIZE");
-        } else {
-            global.global_set_initializer_rvalue(value);
-        }
+        global.global_set_initializer_rvalue(value);
 
         // As an optimization, all shared statics which do not have interior
         // mutability are placed into read-only memory.
@@ -327,9 +249,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             }
 
             let is_tls = fn_attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-            /*if sym.contains("memchr") && sym.contains("FN") {
-                println!("** DECLARE");
-            }*/
             let global = self.declare_global(
                 sym,
                 gcc_type,
diff --git a/src/context.rs b/src/context.rs
index f67dcf0cb116..c81c53359fd1 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -386,6 +386,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 impl<'gcc, 'tcx> BackendTypes for CodegenCx<'gcc, 'tcx> {
     type Value = RValue<'gcc>;
     type Metadata = RValue<'gcc>;
+    // TODO(antoyo): change to Function<'gcc>.
     type Function = RValue<'gcc>;
 
     type BasicBlock = Block<'gcc>;
diff --git a/src/declare.rs b/src/declare.rs
index fa4f2e622e99..442488b7fd65 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -29,7 +29,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             }
             global
         } else {
-            // HERE: ExternalLinkage.
             self.declare_global(name, ty, GlobalKind::Exported, is_tls, link_section)
         }
     }
@@ -70,9 +69,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         is_tls: bool,
         link_section: Option<Symbol>,
     ) -> LValue<'gcc> {
-        /*if name.contains("memchr") && name.contains("FN") {
-            println!("{}: {:?}: {:?}", self.codegen_unit.name(), name, global_kind);
-        }*/
         let global = self.context.new_global(None, global_kind, ty, name);
         if is_tls {
             global.set_tls_model(self.tls_model);
diff --git a/src/lib.rs b/src/lib.rs
index a71ec9ba6a49..0c209ebc26f2 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -27,7 +27,7 @@
 // Some "regular" crates we want to share with rustc
 extern crate object;
 extern crate smallvec;
-// FIXME: clippy bug: remove the #[allow] when it's fixed.
+// FIXME(antoyo): clippy bug: remove the #[allow] when it's fixed.
 #[allow(unused_extern_crates)]
 extern crate tempfile;
 #[macro_use]
@@ -269,7 +269,6 @@ impl CodegenBackend for GccCodegenBackend {
 
 fn new_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
     let context = Context::default();
-    //context.add_driver_option("-pie");
     if tcx.sess.target.arch == "x86" || tcx.sess.target.arch == "x86_64" {
         context.add_command_line_option("-masm=intel");
     }
diff --git a/src/mono_item.rs b/src/mono_item.rs
index 4fc2aad6437e..239902df7f04 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -32,9 +32,6 @@ impl<'gcc, 'tcx> PreDefineCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let gcc_type = self.layout_of(ty).gcc_type(self);
 
         let is_tls = attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
-        /*if symbol_name.contains("memchr") && symbol_name.contains("FN") {
-            println!("** DECLARE static");
-        }*/
         let global = self.define_global(symbol_name, gcc_type, is_tls, attrs.link_section);
         #[cfg(feature = "master")]
         global.add_attribute(VarAttribute::Visibility(base::visibility_to_gcc(visibility)));

From 0d47dc0cf0629bcdedfd689c08e2f074aa7d03f3 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 10 Jan 2025 20:51:23 -0500
Subject: [PATCH 798/997] Correctly handle the relocation model for LTO

---
 src/back/lto.rs   |  9 ++++++++-
 src/back/write.rs | 10 ++++------
 src/base.rs       | 39 +++++++++++++++++++++++++--------------
 src/lib.rs        |  5 +++++
 4 files changed, 42 insertions(+), 21 deletions(-)

diff --git a/src/back/lto.rs b/src/back/lto.rs
index aecb4c424081..8371a025d90b 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -35,6 +35,7 @@ use rustc_middle::bug;
 use rustc_middle::dep_graph::WorkProduct;
 use rustc_middle::middle::exported_symbols::{SymbolExportInfo, SymbolExportLevel};
 use rustc_session::config::{CrateType, Lto};
+use rustc_target::spec::RelocModel;
 use tempfile::{TempDir, tempdir};
 
 use crate::back::write::save_temp_bitcode;
@@ -632,7 +633,13 @@ pub unsafe fn optimize_thin_module(
         }
     };
     let module = ModuleCodegen {
-        module_llvm: GccContext { context, should_combine_object_files, temp_dir: None },
+        module_llvm: GccContext {
+            context,
+            should_combine_object_files,
+            // TODO(antoyo): use the correct relocation model here.
+            relocation_model: RelocModel::Pic,
+            temp_dir: None,
+        },
         name: thin_module.name().to_string(),
         kind: ModuleKind::Regular,
     };
diff --git a/src/back/write.rs b/src/back/write.rs
index 007f30369abd..51c5ba73e32b 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -10,6 +10,7 @@ use rustc_session::config::OutputType;
 use rustc_span::fatal_error::FatalError;
 use rustc_target::spec::SplitDebuginfo;
 
+use crate::base::add_pic_option;
 use crate::errors::CopyBitcode;
 use crate::{GccCodegenBackend, GccContext};
 
@@ -159,7 +160,7 @@ pub(crate) unsafe fn codegen(
 
                         // NOTE: without -fuse-linker-plugin, we get the following error:
                         // lto1: internal compiler error: decompressed stream: Destination buffer is too small
-                        // TODO: since we do not do LTO when the linker is invoked anymore, perhaps
+                        // TODO(antoyo): since we do not do LTO when the linker is invoked anymore, perhaps
                         // the following flag is not necessary anymore.
                         context.add_driver_option("-fuse-linker-plugin");
                     }
@@ -185,7 +186,7 @@ pub(crate) unsafe fn codegen(
                         // flags, it combines the .o files together in another .o.
                         context.compile_to_file(OutputKind::Executable, &lto_path);
 
-                        let context = Context::default(); // TODO: might need to set some other flags from new_context.
+                        let context = Context::default();
                         if cgcx.target_arch == "x86" || cgcx.target_arch == "x86_64" {
                             // NOTE: it seems we need to use add_driver_option instead of
                             // add_command_line_option here because we use the LTO frontend via gcc.
@@ -195,12 +196,9 @@ pub(crate) unsafe fn codegen(
                         // NOTE: these two options are needed to invoke LTO to produce an object file.
                         // We need to initiate a second compilation because the arguments "-x lto"
                         // needs to be at the very beginning.
-                        // TODO TODO: check that LTO still does the optimizations across different
-                        // object files with this change.
-                        // TODO: this should probably be in a condition `if fat_lto`.
                         context.add_driver_option("-x");
                         context.add_driver_option("lto");
-                        context.add_driver_option("-fPIC"); // TODO TODO: only add this flag when necessary.
+                        add_pic_option(&context, module.module_llvm.relocation_model);
                         context.add_driver_option(lto_path);
 
                         context.compile_to_file(OutputKind::ObjectFile, path);
diff --git a/src/base.rs b/src/base.rs
index 4ac25fd7019d..c9701fb9885c 100644
--- a/src/base.rs
+++ b/src/base.rs
@@ -3,7 +3,7 @@ use std::env;
 use std::sync::Arc;
 use std::time::Instant;
 
-use gccjit::{CType, FunctionType, GlobalKind};
+use gccjit::{CType, Context, FunctionType, GlobalKind};
 use rustc_codegen_ssa::base::maybe_create_entry_wrapper;
 use rustc_codegen_ssa::mono_item::MonoItemExt;
 use rustc_codegen_ssa::traits::DebugInfoCodegenMethods;
@@ -15,9 +15,9 @@ use rustc_middle::mir::mono::Visibility;
 use rustc_middle::ty::TyCtxt;
 use rustc_session::config::DebugInfo;
 use rustc_span::Symbol;
-use rustc_target::spec::PanicStrategy;
 #[cfg(feature = "master")]
 use rustc_target::spec::SymbolVisibility;
+use rustc_target::spec::{PanicStrategy, RelocModel};
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
@@ -151,18 +151,7 @@ pub fn compile_codegen_unit(
             });
         }
 
-        match tcx.sess.relocation_model() {
-            rustc_target::spec::RelocModel::Static => {
-                context.add_command_line_option("-fno-pie");
-            }
-            rustc_target::spec::RelocModel::Pic => {
-                context.add_command_line_option("-fPIC");
-            }
-            rustc_target::spec::RelocModel::Pie => {
-                context.add_command_line_option("-fPIE");
-            }
-            model => eprintln!("Unsupported relocation model: {:?}", model),
-        }
+        add_pic_option(&context, tcx.sess.relocation_model());
 
         let target_cpu = gcc_util::target_cpu(tcx.sess);
         if target_cpu != "generic" {
@@ -256,6 +245,7 @@ pub fn compile_codegen_unit(
             name: cgu_name.to_string(),
             module_llvm: GccContext {
                 context: Arc::new(SyncContext::new(context)),
+                relocation_model: tcx.sess.relocation_model(),
                 should_combine_object_files: false,
                 temp_dir: None,
             },
@@ -265,3 +255,24 @@ pub fn compile_codegen_unit(
 
     (module, cost)
 }
+
+pub fn add_pic_option<'gcc>(context: &Context<'gcc>, relocation_model: RelocModel) {
+    match relocation_model {
+        rustc_target::spec::RelocModel::Static => {
+            context.add_command_line_option("-fno-pie");
+            context.add_driver_option("-fno-pie");
+        }
+        rustc_target::spec::RelocModel::Pic => {
+            context.add_command_line_option("-fPIC");
+            // NOTE: we use both add_command_line_option and add_driver_option because the usage in
+            // this module (compile_codegen_unit) requires add_command_line_option while the usage
+            // in the back::write module (codegen) requires add_driver_option.
+            context.add_driver_option("-fPIC");
+        }
+        rustc_target::spec::RelocModel::Pie => {
+            context.add_command_line_option("-fPIE");
+            context.add_driver_option("-fPIE");
+        }
+        model => eprintln!("Unsupported relocation model: {:?}", model),
+    }
+}
diff --git a/src/lib.rs b/src/lib.rs
index 0c209ebc26f2..a93e1df4e4db 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -113,6 +113,7 @@ use rustc_session::Session;
 use rustc_session::config::{Lto, OptLevel, OutputFilenames};
 use rustc_span::Symbol;
 use rustc_span::fatal_error::FatalError;
+use rustc_target::spec::RelocModel;
 use tempfile::TempDir;
 
 use crate::back::lto::ModuleBuffer;
@@ -298,6 +299,7 @@ impl ExtraBackendMethods for GccCodegenBackend {
     ) -> Self::Module {
         let mut mods = GccContext {
             context: Arc::new(SyncContext::new(new_context(tcx))),
+            relocation_model: tcx.sess.relocation_model(),
             should_combine_object_files: false,
             temp_dir: None,
         };
@@ -329,6 +331,9 @@ impl ExtraBackendMethods for GccCodegenBackend {
 
 pub struct GccContext {
     context: Arc<SyncContext>,
+    /// This field is needed in order to be able to set the flag -fPIC when necessary when doing
+    /// LTO.
+    relocation_model: RelocModel,
     should_combine_object_files: bool,
     // Temporary directory used by LTO. We keep it here so that it's not removed before linking.
     temp_dir: Option<TempDir>,

From 37a9e5069ddcad28491936818479a6c6c967ed3a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 12 Jan 2025 09:06:40 -0500
Subject: [PATCH 799/997] Remove LTO warning

---
 src/errors.rs | 4 ----
 src/lib.rs    | 7 +------
 2 files changed, 1 insertion(+), 10 deletions(-)

diff --git a/src/errors.rs b/src/errors.rs
index 7a586b5b04c5..6b4f9d301d84 100644
--- a/src/errors.rs
+++ b/src/errors.rs
@@ -38,10 +38,6 @@ pub(crate) enum PossibleFeature<'a> {
     None,
 }
 
-#[derive(Diagnostic)]
-#[diag(codegen_gcc_lto_not_supported)]
-pub(crate) struct LTONotSupported;
-
 #[derive(Diagnostic)]
 #[diag(codegen_gcc_unwinding_inline_asm)]
 pub(crate) struct UnwindingInlineAsm {
diff --git a/src/lib.rs b/src/lib.rs
index a93e1df4e4db..11d71ea40d00 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -90,7 +90,6 @@ use std::sync::atomic::Ordering;
 use std::sync::{Arc, Mutex};
 
 use back::lto::{ThinBuffer, ThinData};
-use errors::LTONotSupported;
 use gccjit::{CType, Context, OptimizationLevel};
 #[cfg(feature = "master")]
 use gccjit::{TargetInfo, Version};
@@ -110,7 +109,7 @@ use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
 use rustc_middle::ty::TyCtxt;
 use rustc_middle::util::Providers;
 use rustc_session::Session;
-use rustc_session::config::{Lto, OptLevel, OutputFilenames};
+use rustc_session::config::{OptLevel, OutputFilenames};
 use rustc_span::Symbol;
 use rustc_span::fatal_error::FatalError;
 use rustc_target::spec::RelocModel;
@@ -204,10 +203,6 @@ impl CodegenBackend for GccCodegenBackend {
         #[cfg(feature = "master")]
         gccjit::set_global_personality_function_name(b"rust_eh_personality\0");
 
-        if sess.lto() == Lto::Thin {
-            sess.dcx().emit_warn(LTONotSupported {});
-        }
-
         #[cfg(not(feature = "master"))]
         {
             let temp_dir = TempDir::new().expect("cannot create temporary directory");

From fe608c7639b0261232c5c00822f77fefe897425b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 12 Jan 2025 09:10:40 -0500
Subject: [PATCH 800/997] Add ThinLTO test

---
 tests/hello-world/Cargo.lock       | 14 ++++++++++++++
 tests/hello-world/Cargo.toml       |  5 +++++
 tests/hello-world/mylib/Cargo.lock |  5 +++++
 tests/hello-world/mylib/Cargo.toml |  9 +++++++++
 tests/hello-world/mylib/src/lib.rs |  7 +++++++
 tests/hello-world/src/main.rs      |  4 +++-
 6 files changed, 43 insertions(+), 1 deletion(-)
 create mode 100644 tests/hello-world/Cargo.lock
 create mode 100644 tests/hello-world/mylib/Cargo.lock
 create mode 100644 tests/hello-world/mylib/Cargo.toml
 create mode 100644 tests/hello-world/mylib/src/lib.rs

diff --git a/tests/hello-world/Cargo.lock b/tests/hello-world/Cargo.lock
new file mode 100644
index 000000000000..fe252db44253
--- /dev/null
+++ b/tests/hello-world/Cargo.lock
@@ -0,0 +1,14 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 4
+
+[[package]]
+name = "hello_world"
+version = "0.0.0"
+dependencies = [
+ "mylib",
+]
+
+[[package]]
+name = "mylib"
+version = "0.1.0"
diff --git a/tests/hello-world/Cargo.toml b/tests/hello-world/Cargo.toml
index 0b8cdc63fbe8..f73beedccced 100644
--- a/tests/hello-world/Cargo.toml
+++ b/tests/hello-world/Cargo.toml
@@ -1,4 +1,9 @@
 [package]
 name = "hello_world"
+edition = "2024"
 
 [dependencies]
+mylib = { path = "mylib" }
+
+[profile.dev]
+lto = "thin"
diff --git a/tests/hello-world/mylib/Cargo.lock b/tests/hello-world/mylib/Cargo.lock
new file mode 100644
index 000000000000..c8a0bfc63547
--- /dev/null
+++ b/tests/hello-world/mylib/Cargo.lock
@@ -0,0 +1,5 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+[[package]]
+name = "mylib"
+version = "0.1.0"
diff --git a/tests/hello-world/mylib/Cargo.toml b/tests/hello-world/mylib/Cargo.toml
new file mode 100644
index 000000000000..d15f62bfb6dc
--- /dev/null
+++ b/tests/hello-world/mylib/Cargo.toml
@@ -0,0 +1,9 @@
+[package]
+name = "mylib"
+version = "0.1.0"
+authors = ["Antoni Boucher <bouanto@zoho.com>"]
+edition = "2018"
+
+# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
+
+[dependencies]
diff --git a/tests/hello-world/mylib/src/lib.rs b/tests/hello-world/mylib/src/lib.rs
new file mode 100644
index 000000000000..8d3d111bd199
--- /dev/null
+++ b/tests/hello-world/mylib/src/lib.rs
@@ -0,0 +1,7 @@
+pub fn my_func(a: i32, b: i32) -> i32 {
+    let mut res = a;
+    for i in a..b {
+        res += i;
+    }
+    res
+}
diff --git a/tests/hello-world/src/main.rs b/tests/hello-world/src/main.rs
index e7a11a969c03..71c78d364ac8 100644
--- a/tests/hello-world/src/main.rs
+++ b/tests/hello-world/src/main.rs
@@ -1,3 +1,5 @@
+use mylib::my_func;
+
 fn main() {
-    println!("Hello, world!");
+    println!("{}", my_func(5, 10));
 }

From 93f7f2fdeba33c748cbda750cdbaa2c80bb34be1 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 12 Jan 2025 09:36:12 -0500
Subject: [PATCH 801/997] Add LTO test

---
 .github/workflows/release.yml | 5 +++++
 tests/hello-world/Cargo.toml  | 3 +++
 2 files changed, 8 insertions(+)

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 887720436e99..f1ddb301acce 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -71,3 +71,8 @@ jobs:
         # FIXME(antoyo): we cannot enable LTO for stdarch tests currently because of some failing LTO tests using proc-macros.
         echo -n 'lto = "fat"' >> build_system/build_sysroot/Cargo.toml
         EMBED_LTO_BITCODE=1 ./y.sh test --release --clean --release-sysroot --build-sysroot --keep-lto-tests ${{ matrix.commands }}
+
+    - name: Run y.sh cargo build
+      run: |
+        EMBED_LTO_BITCODE=1 CHANNEL="release" ./y.sh cargo build --release --manifest-path tests/hello-world/Cargo.toml
+        # TODO: grep the asm output for "call my_func" and fail if it is found.
diff --git a/tests/hello-world/Cargo.toml b/tests/hello-world/Cargo.toml
index f73beedccced..c6e22f642f67 100644
--- a/tests/hello-world/Cargo.toml
+++ b/tests/hello-world/Cargo.toml
@@ -7,3 +7,6 @@ mylib = { path = "mylib" }
 
 [profile.dev]
 lto = "thin"
+
+[profile.release]
+lto = "fat"

From 59689c43f3e8ac79bd221d1b0617017547bf3bd2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 12 Jan 2025 19:37:10 -0500
Subject: [PATCH 802/997] Update to nightly-2025-01-12

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index c41713105774..940b3de9f745 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2024-12-11"
+channel = "nightly-2025-01-12"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From b4418b896c163f935bf0f48e7c1fa62cd2a3baaf Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 12 Jan 2025 19:47:47 -0500
Subject: [PATCH 803/997] Fix clippy warnings

---
 src/gcc_util.rs       | 44 +++++++++++++++++++------------------------
 src/intrinsic/llvm.rs |  2 +-
 src/lib.rs            |  6 +++---
 3 files changed, 23 insertions(+), 29 deletions(-)

diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 1994a2a3c537..560aff43d653 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -66,16 +66,14 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
             // We do the equivalent above in `target_features_cfg`.
             // See <https://github.com/rust-lang/rust/issues/134792>.
             all_rust_features.push((false, feature));
-        } else if !feature.is_empty() {
-            if diagnostics {
-                sess.dcx().emit_warn(UnknownCTargetFeaturePrefix { feature });
-            }
+        } else if !feature.is_empty() && diagnostics {
+            sess.dcx().emit_warn(UnknownCTargetFeaturePrefix { feature });
         }
     }
     // Remove features that are meant for rustc, not codegen.
-    all_rust_features.retain(|(_, feature)| {
+    all_rust_features.retain(|&(_, feature)| {
         // Retain if it is not a rustc feature
-        !RUSTC_SPECIFIC_FEATURES.contains(feature)
+        !RUSTC_SPECIFIC_FEATURES.contains(&feature)
     });
 
     // Check feature validity.
@@ -103,7 +101,7 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
                     };
                     sess.dcx().emit_warn(unknown_feature);
                 }
-                Some((_, stability, _)) => {
+                Some(&(_, stability, _)) => {
                     if let Err(reason) = stability.toggle_allowed() {
                         sess.dcx().emit_warn(ForbiddenCTargetFeature {
                             feature,
@@ -165,29 +163,25 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
     );
 
     // Translate this into GCC features.
-    let feats = all_rust_features
-        .iter()
-        .filter_map(|&(enable, feature)| {
+    let feats =
+        all_rust_features.iter().flat_map(|&(enable, feature)| {
             let enable_disable = if enable { '+' } else { '-' };
             // We run through `to_gcc_features` when
             // passing requests down to GCC. This means that all in-language
             // features also work on the command line instead of having two
             // different names when the GCC name and the Rust name differ.
-            Some(
-                to_gcc_features(sess, feature)
-                    .iter()
-                    .flat_map(|feat| to_gcc_features(sess, feat).into_iter())
-                    .map(|feature| {
-                        if enable_disable == '-' {
-                            format!("-{}", feature)
-                        } else {
-                            feature.to_string()
-                        }
-                    })
-                    .collect::<Vec<_>>(),
-            )
-        })
-        .flatten();
+            to_gcc_features(sess, feature)
+                .iter()
+                .flat_map(|feat| to_gcc_features(sess, feat).into_iter())
+                .map(|feature| {
+                    if enable_disable == '-' {
+                        format!("-{}", feature)
+                    } else {
+                        feature.to_string()
+                    }
+                })
+                .collect::<Vec<_>>()
+        });
     features.extend(feats);
 
     if diagnostics {
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 0a448ded6b1a..231307def291 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -421,7 +421,7 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             | "__builtin_ia32_xsaveopt64" => {
                 let new_args = args.to_vec();
                 let thirty_two = builder.context.new_rvalue_from_int(new_args[1].get_type(), 32);
-                let arg2 = new_args[1] << thirty_two | new_args[2];
+                let arg2 = (new_args[1] << thirty_two) | new_args[2];
                 let arg2_type = gcc_func.get_param_type(1);
                 let arg2 = builder.context.new_cast(None, arg2, arg2_type);
                 args = vec![new_args[0], arg2].into();
diff --git a/src/lib.rs b/src/lib.rs
index 1dfa598ea674..f6ad0c79de54 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -494,10 +494,10 @@ fn target_features_cfg(
     sess.target
         .rust_target_features()
         .iter()
-        .filter(|(_, gate, _)| gate.in_cfg())
-        .filter_map(|(feature, gate, _)| {
+        .filter(|&&(_, gate, _)| gate.in_cfg())
+        .filter_map(|&(feature, gate, _)| {
             if sess.is_nightly_build() || allow_unstable || gate.requires_nightly().is_none() {
-                Some(*feature)
+                Some(feature)
             } else {
                 None
             }

From 06fdf3df2ce1fdfec057ac3c43f0fc0ea80aec63 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 13 Jan 2025 08:10:40 -0500
Subject: [PATCH 804/997] Use mini_core in the tests

---
 .github/workflows/ci.yml      |   2 +-
 .github/workflows/m68k.yml    |   2 +-
 .github/workflows/release.yml |   1 +
 .github/workflows/stdarch.yml |   5 +-
 example/mini_core.rs          |   8 +
 tests/lang_tests_common.rs    |   2 +
 tests/run/array.rs            | 206 +-----------------------
 tests/run/closure.rs          | 184 +---------------------
 tests/run/condition.rs        | 288 +---------------------------------
 tests/run/fun_ptr.rs          | 196 +----------------------
 tests/run/ptr_cast.rs         | 196 +----------------------
 tests/run/slice.rs            | 101 +-----------
 12 files changed, 26 insertions(+), 1165 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index efb4de5f5fb0..73ec6b84a155 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -22,7 +22,6 @@ jobs:
           - { gcc: "gcc-13.deb" }
           - { gcc: "gcc-13-without-int128.deb" }
         commands: [
-          "--mini-tests",
           "--std-tests",
           # FIXME: re-enable asm tests when GCC can emit in the right syntax.
           # "--asm-tests",
@@ -79,6 +78,7 @@ jobs:
       run: |
         ./y.sh prepare --only-libcore
         ./y.sh build --sysroot
+        ./y.sh test --mini-tests
         cargo test
 
     - name: Run y.sh cargo build
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 69549dfeb5f5..07bb372b3606 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -23,7 +23,6 @@ jobs:
       fail-fast: false
       matrix:
         commands: [
-          "--mini-tests",
           "--std-tests",
           # TODO(antoyo): fix those on m68k.
           #"--test-libcore",
@@ -93,6 +92,7 @@ jobs:
       run: |
         ./y.sh prepare --only-libcore --cross
         ./y.sh build --sysroot --features compiler_builtins/no-f16-f128 --target-triple m68k-unknown-linux-gnu
+        ./y.sh test --mini-tests
         CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu cargo test
         ./y.sh clean all
 
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index f1ddb301acce..60e0943c87da 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -54,6 +54,7 @@ jobs:
       run: |
         ./y.sh prepare --only-libcore
         EMBED_LTO_BITCODE=1 ./y.sh build --sysroot --release --release-sysroot
+        ./y.sh test --mini-tests
         cargo test
         ./y.sh clean all
 
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index d8818eefa96d..d5ae6144496f 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -73,10 +73,6 @@ jobs:
         echo "LD_LIBRARY_PATH="$(./y.sh info | grep -v Using) >> $GITHUB_ENV
         echo "LIBRARY_PATH="$(./y.sh info | grep -v Using) >> $GITHUB_ENV
 
-    - name: Build (part 2)
-      run: |
-        cargo test
-
     - name: Clean
       if: ${{ !matrix.cargo_runner }}
       run: |
@@ -92,6 +88,7 @@ jobs:
       if: ${{ !matrix.cargo_runner }}
       run: |
         ./y.sh test --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore
+        cargo test
 
     - name: Run stdarch tests
       if: ${{ !matrix.cargo_runner }}
diff --git a/example/mini_core.rs b/example/mini_core.rs
index cdd151613df8..bd7a4612a92c 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -170,6 +170,14 @@ impl Add for usize {
     }
 }
 
+impl Add for isize {
+    type Output = Self;
+
+    fn add(self, rhs: Self) -> Self {
+        self + rhs
+    }
+}
+
 #[lang = "sub"]
 pub trait Sub<RHS = Self> {
     type Output;
diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index 433b3d680b51..fafb7be55ceb 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -89,6 +89,8 @@ pub fn main_inner(profile: Profile) {
                 &format!("{}/build/build_sysroot/sysroot/", current_dir),
                 "-C",
                 "link-arg=-lc",
+                "--extern",
+                "mini_core=target/out/libmini_core.rlib",
                 "-o",
                 exe.to_str().expect("to_str"),
                 path.to_str().expect("to_str"),
diff --git a/tests/run/array.rs b/tests/run/array.rs
index 9d04ba10b238..c3c08c29c6db 100644
--- a/tests/run/array.rs
+++ b/tests/run/array.rs
@@ -7,38 +7,12 @@
 //     5
 //     10
 
-#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
-#![allow(internal_features)]
+#![feature(no_core, start)]
 
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-impl Copy for usize {}
-impl Copy for i32 {}
-impl Copy for u8 {}
-impl Copy for i8 {}
-impl Copy for i16 {}
-impl<T: ?Sized> Copy for *mut T {}
-
-#[lang = "legacy_receiver"]
-trait LegacyReceiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
+extern crate mini_core;
 
 mod libc {
     #[link(name = "c")]
@@ -48,182 +22,6 @@ mod libc {
     }
 }
 
-#[lang = "index"]
-pub trait Index<Idx: ?Sized> {
-    type Output: ?Sized;
-    fn index(&self, index: Idx) -> &Self::Output;
-}
-
-impl<T> Index<usize> for [T; 3] {
-    type Output = T;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self[index]
-    }
-}
-
-impl<T> Index<usize> for [T] {
-    type Output = T;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self[index]
-    }
-}
-
-#[lang = "drop_in_place"]
-#[allow(unconditional_recursion)]
-pub unsafe fn drop_in_place<T: ?Sized>(to_drop: *mut T) {
-    // Code here does not matter - this is replaced by the
-    // real drop glue by the compiler.
-    drop_in_place(to_drop);
-}
-
-#[lang = "panic"]
-#[track_caller]
-#[no_mangle]
-pub fn panic(_msg: &'static str) -> ! {
-    unsafe {
-        libc::puts("Panicking\0" as *const str as *const u8);
-        intrinsics::abort();
-    }
-}
-
-#[lang = "panic_location"]
-struct PanicLocation {
-    file: &'static str,
-    line: u32,
-    column: u32,
-}
-
-#[lang = "panic_bounds_check"]
-#[track_caller]
-#[no_mangle]
-fn panic_bounds_check(index: usize, len: usize) -> ! {
-    unsafe {
-        libc::printf("index out of bounds: the len is %d but the index is %d\n\0" as *const str as *const i8, len, index);
-        intrinsics::abort();
-    }
-}
-
-mod intrinsics {
-    #[rustc_nounwind]
-    #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
-}
-
-#[lang = "add"]
-trait Add<RHS = Self> {
-    type Output;
-
-    fn add(self, rhs: RHS) -> Self::Output;
-}
-
-impl Add for u8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i32 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for usize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for isize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-#[lang = "sub"]
-pub trait Sub<RHS = Self> {
-    type Output;
-
-    fn sub(self, rhs: RHS) -> Self::Output;
-}
-
-impl Sub for usize {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for isize {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for u8 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for i8 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for i16 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-#[track_caller]
-#[lang = "panic_const_add_overflow"]
-pub fn panic_const_add_overflow() -> ! {
-    panic("attempt to add with overflow");
-}
-
-#[track_caller]
-#[lang = "panic_const_sub_overflow"]
-pub fn panic_const_sub_overflow() -> ! {
-    panic("attempt to subtract with overflow");
-}
-
-/*
- * Code
- */
-
 static mut ONE: usize = 1;
 
 fn make_array() -> [u8; 3] {
diff --git a/tests/run/closure.rs b/tests/run/closure.rs
index 6f7210b5d073..46c47bc54ed0 100644
--- a/tests/run/closure.rs
+++ b/tests/run/closure.rs
@@ -8,200 +8,20 @@
 //     Int argument: 2
 //     Both args: 11
 
-#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics,
-    unboxed_closures, rustc_attrs)]
-#![allow(internal_features)]
+#![feature(no_core, start)]
 
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-impl Copy for usize {}
-impl Copy for i32 {}
-impl Copy for u32 {}
-impl Copy for u8 {}
-impl Copy for i8 {}
-impl<T: ?Sized> Copy for *mut T {}
-
-#[lang = "legacy_receiver"]
-trait LegacyReceiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
+extern crate mini_core;
 
 mod libc {
     #[link(name = "c")]
     extern "C" {
-        pub fn puts(s: *const u8) -> i32;
         pub fn printf(format: *const i8, ...) -> i32;
     }
 }
 
-#[lang = "index"]
-pub trait Index<Idx: ?Sized> {
-    type Output: ?Sized;
-    fn index(&self, index: Idx) -> &Self::Output;
-}
-
-impl<T> Index<usize> for [T; 3] {
-    type Output = T;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self[index]
-    }
-}
-
-impl<T> Index<usize> for [T] {
-    type Output = T;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self[index]
-    }
-}
-
-#[lang = "drop_in_place"]
-#[allow(unconditional_recursion)]
-pub unsafe fn drop_in_place<T: ?Sized>(to_drop: *mut T) {
-    // Code here does not matter - this is replaced by the
-    // real drop glue by the compiler.
-    drop_in_place(to_drop);
-}
-
-#[lang = "panic_location"]
-struct PanicLocation {
-    file: &'static str,
-    line: u32,
-    column: u32,
-}
-
-#[lang = "panic_bounds_check"]
-#[track_caller]
-#[no_mangle]
-fn panic_bounds_check(index: usize, len: usize) -> ! {
-    unsafe {
-        libc::printf("index out of bounds: the len is %d but the index is %d\n\0" as *const str as *const i8, len, index);
-        intrinsics::abort();
-    }
-}
-
-mod intrinsics {
-    #[rustc_nounwind]
-    #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
-}
-
-#[lang = "tuple_trait"]
-pub trait Tuple {}
-
-#[lang = "unsize"]
-pub trait Unsize<T: ?Sized> {}
-
-#[lang = "coerce_unsized"]
-pub trait CoerceUnsized<T> {}
-
-impl<'a, 'b: 'a, T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<&'a U> for &'b T {}
-impl<'a, T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<&'a mut U> for &'a mut T {}
-impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<*const U> for *const T {}
-impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<*mut U> for *mut T {}
-
-#[lang = "fn_once"]
-#[rustc_paren_sugar]
-pub trait FnOnce<Args: Tuple> {
-    #[lang = "fn_once_output"]
-    type Output;
-
-    extern "rust-call" fn call_once(self, args: Args) -> Self::Output;
-}
-
-#[lang = "fn_mut"]
-#[rustc_paren_sugar]
-pub trait FnMut<Args: Tuple>: FnOnce<Args> {
-    extern "rust-call" fn call_mut(&mut self, args: Args) -> Self::Output;
-}
-
-#[lang = "add"]
-trait Add<RHS = Self> {
-    type Output;
-
-    fn add(self, rhs: RHS) -> Self::Output;
-}
-
-impl Add for u8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i32 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for usize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for isize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-#[lang = "panic"]
-#[track_caller]
-#[no_mangle]
-pub fn panic(_msg: &'static str) -> ! {
-    unsafe {
-        libc::puts("Panicking\0" as *const str as *const u8);
-        intrinsics::abort();
-    }
-}
-
-#[track_caller]
-#[lang = "panic_const_add_overflow"]
-pub fn panic_const_add_overflow() -> ! {
-    panic("attempt to add with overflow");
-}
-
-/*
- * Code
- */
-
 #[start]
 fn main(mut argc: isize, _argv: *const *const u8) -> isize {
     let string = "Arg: %d\n\0";
diff --git a/tests/run/condition.rs b/tests/run/condition.rs
index 01af6fa82802..039ef94eaa71 100644
--- a/tests/run/condition.rs
+++ b/tests/run/condition.rs
@@ -5,304 +5,20 @@
 //   stdout: true
 //     1
 
-#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
-#![allow(internal_features)]
+#![feature(no_core, start)]
 
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-impl Copy for usize {}
-impl Copy for u64 {}
-impl Copy for i32 {}
-impl Copy for u32 {}
-impl Copy for bool {}
-impl Copy for u16 {}
-impl Copy for i16 {}
-impl Copy for char {}
-impl Copy for i8 {}
-impl Copy for u8 {}
-impl<T: ?Sized> Copy for *mut T {}
-
-#[lang = "legacy_receiver"]
-trait LegacyReceiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
+extern crate mini_core;
 
 mod libc {
     #[link(name = "c")]
     extern "C" {
         pub fn printf(format: *const i8, ...) -> i32;
-        pub fn puts(s: *const u8) -> i32;
     }
 }
 
-#[lang = "index"]
-pub trait Index<Idx: ?Sized> {
-    type Output: ?Sized;
-    fn index(&self, index: Idx) -> &Self::Output;
-}
-
-impl<T> Index<usize> for [T; 3] {
-    type Output = T;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self[index]
-    }
-}
-
-impl<T> Index<usize> for [T] {
-    type Output = T;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self[index]
-    }
-}
-
-#[lang = "drop_in_place"]
-#[allow(unconditional_recursion)]
-pub unsafe fn drop_in_place<T: ?Sized>(to_drop: *mut T) {
-    // Code here does not matter - this is replaced by the
-    // real drop glue by the compiler.
-    drop_in_place(to_drop);
-}
-
-#[lang = "panic"]
-#[track_caller]
-#[no_mangle]
-pub fn panic(_msg: &'static str) -> ! {
-    unsafe {
-        libc::puts("Panicking\0" as *const str as *const u8);
-        intrinsics::abort();
-    }
-}
-
-#[lang = "panic_location"]
-struct PanicLocation {
-    file: &'static str,
-    line: u32,
-    column: u32,
-}
-
-#[lang = "panic_bounds_check"]
-#[track_caller]
-#[no_mangle]
-fn panic_bounds_check(index: usize, len: usize) -> ! {
-    unsafe {
-        libc::printf("index out of bounds: the len is %d but the index is %d\n\0" as *const str as *const i8, len, index);
-        intrinsics::abort();
-    }
-}
-
-mod intrinsics {
-    #[rustc_nounwind]
-    #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
-}
-
-#[lang = "add"]
-trait Add<RHS = Self> {
-    type Output;
-
-    fn add(self, rhs: RHS) -> Self::Output;
-}
-
-impl Add for u8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i32 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for usize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for isize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-#[lang = "sub"]
-pub trait Sub<RHS = Self> {
-    type Output;
-
-    fn sub(self, rhs: RHS) -> Self::Output;
-}
-
-impl Sub for usize {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for isize {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for u8 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for i8 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for i16 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-#[lang = "eq"]
-pub trait PartialEq<Rhs: ?Sized = Self> {
-    fn eq(&self, other: &Rhs) -> bool;
-    fn ne(&self, other: &Rhs) -> bool;
-}
-
-impl PartialEq for u8 {
-    fn eq(&self, other: &u8) -> bool {
-        (*self) == (*other)
-    }
-    fn ne(&self, other: &u8) -> bool {
-        (*self) != (*other)
-    }
-}
-
-impl PartialEq for u16 {
-    fn eq(&self, other: &u16) -> bool {
-        (*self) == (*other)
-    }
-    fn ne(&self, other: &u16) -> bool {
-        (*self) != (*other)
-    }
-}
-
-impl PartialEq for u32 {
-    fn eq(&self, other: &u32) -> bool {
-        (*self) == (*other)
-    }
-    fn ne(&self, other: &u32) -> bool {
-        (*self) != (*other)
-    }
-}
-
-
-impl PartialEq for u64 {
-    fn eq(&self, other: &u64) -> bool {
-        (*self) == (*other)
-    }
-    fn ne(&self, other: &u64) -> bool {
-        (*self) != (*other)
-    }
-}
-
-impl PartialEq for usize {
-    fn eq(&self, other: &usize) -> bool {
-        (*self) == (*other)
-    }
-    fn ne(&self, other: &usize) -> bool {
-        (*self) != (*other)
-    }
-}
-
-impl PartialEq for i8 {
-    fn eq(&self, other: &i8) -> bool {
-        (*self) == (*other)
-    }
-    fn ne(&self, other: &i8) -> bool {
-        (*self) != (*other)
-    }
-}
-
-impl PartialEq for i32 {
-    fn eq(&self, other: &i32) -> bool {
-        (*self) == (*other)
-    }
-    fn ne(&self, other: &i32) -> bool {
-        (*self) != (*other)
-    }
-}
-
-impl PartialEq for isize {
-    fn eq(&self, other: &isize) -> bool {
-        (*self) == (*other)
-    }
-    fn ne(&self, other: &isize) -> bool {
-        (*self) != (*other)
-    }
-}
-
-impl PartialEq for char {
-    fn eq(&self, other: &char) -> bool {
-        (*self) == (*other)
-    }
-    fn ne(&self, other: &char) -> bool {
-        (*self) != (*other)
-    }
-}
-
-/*
- * Code
- */
-
 #[start]
 fn main(argc: isize, _argv: *const *const u8) -> isize {
     unsafe {
diff --git a/tests/run/fun_ptr.rs b/tests/run/fun_ptr.rs
index a2e304c1e372..ed1bf72bb275 100644
--- a/tests/run/fun_ptr.rs
+++ b/tests/run/fun_ptr.rs
@@ -4,212 +4,20 @@
 //   status: 0
 //   stdout: 1
 
-#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
-#![allow(internal_features)]
+#![feature(no_core, start)]
 
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-impl Copy for usize {}
-impl Copy for i32 {}
-impl Copy for u8 {}
-impl Copy for i8 {}
-impl Copy for i16 {}
-impl<T: ?Sized> Copy for *mut T {}
-
-#[lang = "legacy_receiver"]
-trait LegacyReceiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
+extern crate mini_core;
 
 mod libc {
     #[link(name = "c")]
     extern "C" {
         pub fn printf(format: *const i8, ...) -> i32;
-        pub fn puts(s: *const u8) -> i32;
     }
 }
 
-#[lang = "index"]
-pub trait Index<Idx: ?Sized> {
-    type Output: ?Sized;
-    fn index(&self, index: Idx) -> &Self::Output;
-}
-
-impl<T> Index<usize> for [T; 3] {
-    type Output = T;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self[index]
-    }
-}
-
-impl<T> Index<usize> for [T] {
-    type Output = T;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self[index]
-    }
-}
-
-#[lang = "drop_in_place"]
-#[allow(unconditional_recursion)]
-pub unsafe fn drop_in_place<T: ?Sized>(to_drop: *mut T) {
-    // Code here does not matter - this is replaced by the
-    // real drop glue by the compiler.
-    drop_in_place(to_drop);
-}
-
-#[lang = "panic"]
-#[track_caller]
-#[no_mangle]
-pub fn panic(_msg: &'static str) -> ! {
-    unsafe {
-        libc::puts("Panicking\0" as *const str as *const u8);
-        intrinsics::abort();
-    }
-}
-
-#[lang = "panic_location"]
-struct PanicLocation {
-    file: &'static str,
-    line: u32,
-    column: u32,
-}
-
-#[lang = "panic_bounds_check"]
-#[track_caller]
-#[no_mangle]
-fn panic_bounds_check(index: usize, len: usize) -> ! {
-    unsafe {
-        libc::printf("index out of bounds: the len is %d but the index is %d\n\0" as *const str as *const i8, len, index);
-        intrinsics::abort();
-    }
-}
-
-mod intrinsics {
-    #[rustc_nounwind]
-    #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
-}
-
-#[lang = "add"]
-trait Add<RHS = Self> {
-    type Output;
-
-    fn add(self, rhs: RHS) -> Self::Output;
-}
-
-impl Add for u8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i32 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for usize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for isize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-#[lang = "sub"]
-pub trait Sub<RHS = Self> {
-    type Output;
-
-    fn sub(self, rhs: RHS) -> Self::Output;
-}
-
-impl Sub for usize {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for isize {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for u8 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for i8 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for i16 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-
-/*
- * Code
- */
-
 fn i16_as_i8(a: i16) -> i8 {
     a as i8
 }
diff --git a/tests/run/ptr_cast.rs b/tests/run/ptr_cast.rs
index d66d5b2a8cb7..2b8812ad51c5 100644
--- a/tests/run/ptr_cast.rs
+++ b/tests/run/ptr_cast.rs
@@ -4,212 +4,20 @@
 //   status: 0
 //   stdout: 1
 
-#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
-#![allow(internal_features)]
+#![feature(no_core, start)]
 
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-impl Copy for usize {}
-impl Copy for i32 {}
-impl Copy for u8 {}
-impl Copy for i8 {}
-impl Copy for i16 {}
-impl<T: ?Sized> Copy for *mut T {}
-
-#[lang = "legacy_receiver"]
-trait LegacyReceiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
+extern crate mini_core;
 
 mod libc {
     #[link(name = "c")]
     extern "C" {
         pub fn printf(format: *const i8, ...) -> i32;
-        pub fn puts(s: *const u8) -> i32;
     }
 }
 
-#[lang = "index"]
-pub trait Index<Idx: ?Sized> {
-    type Output: ?Sized;
-    fn index(&self, index: Idx) -> &Self::Output;
-}
-
-impl<T> Index<usize> for [T; 3] {
-    type Output = T;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self[index]
-    }
-}
-
-impl<T> Index<usize> for [T] {
-    type Output = T;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self[index]
-    }
-}
-
-#[lang = "drop_in_place"]
-#[allow(unconditional_recursion)]
-pub unsafe fn drop_in_place<T: ?Sized>(to_drop: *mut T) {
-    // Code here does not matter - this is replaced by the
-    // real drop glue by the compiler.
-    drop_in_place(to_drop);
-}
-
-#[lang = "panic"]
-#[track_caller]
-#[no_mangle]
-pub fn panic(_msg: &'static str) -> ! {
-    unsafe {
-        libc::puts("Panicking\0" as *const str as *const u8);
-        intrinsics::abort();
-    }
-}
-
-#[lang = "panic_location"]
-struct PanicLocation {
-    file: &'static str,
-    line: u32,
-    column: u32,
-}
-
-#[lang = "panic_bounds_check"]
-#[track_caller]
-#[no_mangle]
-fn panic_bounds_check(index: usize, len: usize) -> ! {
-    unsafe {
-        libc::printf("index out of bounds: the len is %d but the index is %d\n\0" as *const str as *const i8, len, index);
-        intrinsics::abort();
-    }
-}
-
-mod intrinsics {
-    #[rustc_nounwind]
-    #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
-}
-
-#[lang = "add"]
-trait Add<RHS = Self> {
-    type Output;
-
-    fn add(self, rhs: RHS) -> Self::Output;
-}
-
-impl Add for u8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i32 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for usize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for isize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-#[lang = "sub"]
-pub trait Sub<RHS = Self> {
-    type Output;
-
-    fn sub(self, rhs: RHS) -> Self::Output;
-}
-
-impl Sub for usize {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for isize {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for u8 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for i8 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for i16 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-
-/*
- * Code
- */
-
 static mut ONE: usize = 1;
 
 fn make_array() -> [u8; 3] {
diff --git a/tests/run/slice.rs b/tests/run/slice.rs
index 32f4c6040581..fba93fc15549 100644
--- a/tests/run/slice.rs
+++ b/tests/run/slice.rs
@@ -4,36 +4,12 @@
 //   status: 0
 //   stdout: 5
 
-#![feature(arbitrary_self_types, auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
-#![allow(internal_features)]
+#![feature(no_core, start)]
 
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-impl Copy for usize {}
-impl Copy for i32 {}
-impl Copy for u32 {}
-impl<T: ?Sized> Copy for *mut T {}
-
-#[lang = "legacy_receiver"]
-trait LegacyReceiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
+extern crate mini_core;
 
 mod libc {
     #[link(name = "c")]
@@ -42,79 +18,6 @@ mod libc {
     }
 }
 
-#[lang = "index"]
-pub trait Index<Idx: ?Sized> {
-    type Output: ?Sized;
-    fn index(&self, index: Idx) -> &Self::Output;
-}
-
-impl<T> Index<usize> for [T; 3] {
-    type Output = T;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self[index]
-    }
-}
-
-impl<T> Index<usize> for [T] {
-    type Output = T;
-
-    fn index(&self, index: usize) -> &Self::Output {
-        &self[index]
-    }
-}
-
-#[lang = "unsize"]
-pub trait Unsize<T: ?Sized> {}
-
-#[lang = "coerce_unsized"]
-pub trait CoerceUnsized<T> {}
-
-impl<'a, 'b: 'a, T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<&'a U> for &'b T {}
-impl<'a, T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<&'a mut U> for &'a mut T {}
-impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<*const U> for *const T {}
-impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<*mut U> for *mut T {}
-
-#[lang = "drop_in_place"]
-#[allow(unconditional_recursion)]
-pub unsafe fn drop_in_place<T: ?Sized>(to_drop: *mut T) {
-    // Code here does not matter - this is replaced by the
-    // real drop glue by the compiler.
-    drop_in_place(to_drop);
-}
-
-#[lang = "panic_location"]
-struct PanicLocation {
-    file: &'static str,
-    line: u32,
-    column: u32,
-}
-
-#[lang = "panic_bounds_check"]
-#[track_caller]
-#[no_mangle]
-fn panic_bounds_check(index: usize, len: usize) -> ! {
-    unsafe {
-        libc::printf("index out of bounds: the len is %d but the index is %d\n\0" as *const str as *const i8, len, index);
-        intrinsics::abort();
-    }
-}
-
-mod intrinsics {
-    use super::Sized;
-
-    #[rustc_nounwind]
-    #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
-}
-
-/*
- * Code
- */
-
 static mut TWO: usize = 2;
 
 fn index_slice(s: &[u32]) -> u32 {

From 500fce185cea1fdb259c1e88f2610d463ef63e3d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 13 Jan 2025 08:29:28 -0500
Subject: [PATCH 805/997] Add error pattern

---
 build_system/src/test.rs | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 371fcb4bc306..21286e972716 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -848,9 +848,17 @@ fn contains_ui_error_patterns(file_path: &Path, keep_lto_tests: bool) -> Result<
         if line.is_empty() {
             continue;
         }
-        if ["//@ error-pattern:", "//@ build-fail", "//@ run-fail", "-Cllvm-args", "//~", "thread"]
-            .iter()
-            .any(|check| line.contains(check))
+        if [
+            "//@ error-pattern:",
+            "//@ build-fail",
+            "//@ run-fail",
+            "//@ known-bug",
+            "-Cllvm-args",
+            "//~",
+            "thread",
+        ]
+        .iter()
+        .any(|check| line.contains(check))
         {
             return Ok(true);
         }

From 10d745c7f7f6dbff7feabc00269c7bcee4c9d680 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 13 Jan 2025 08:53:59 -0500
Subject: [PATCH 806/997] Do not run UI tests in the error-emitter directory

---
 build_system/src/test.rs | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 21286e972716..7cc7336612c7 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -876,9 +876,14 @@ fn contains_ui_error_patterns(file_path: &Path, keep_lto_tests: bool) -> Result<
             return Ok(true);
         }
     }
-    if file_path.display().to_string().contains("ambiguous-4-extern.rs") {
+    let file_path = file_path.display().to_string();
+    if file_path.contains("ambiguous-4-extern.rs") {
         eprintln!("nothing found for {file_path:?}");
     }
+    // The files in this directory contain errors.
+    if file_path.contains("/error-emitter/") {
+        return Ok(true);
+    }
     Ok(false)
 }
 

From 17f5a4f4f05579854d0819b38b6391cddb1717ef Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 13 Jan 2025 09:17:54 -0500
Subject: [PATCH 807/997] Add support for fmaf16

---
 src/intrinsic/mod.rs | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index d2956bac201a..11f9604c6d26 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -13,11 +13,12 @@ use rustc_codegen_ssa::common::IntPredicate;
 use rustc_codegen_ssa::errors::InvalidMonomorphization;
 use rustc_codegen_ssa::mir::operand::{OperandRef, OperandValue};
 use rustc_codegen_ssa::mir::place::{PlaceRef, PlaceValue};
+use rustc_codegen_ssa::traits::BaseTypeCodegenMethods;
+#[cfg(feature = "master")]
+use rustc_codegen_ssa::traits::MiscCodegenMethods;
 use rustc_codegen_ssa::traits::{
     ArgAbiBuilderMethods, BuilderMethods, ConstCodegenMethods, IntrinsicCallBuilderMethods,
 };
-#[cfg(feature = "master")]
-use rustc_codegen_ssa::traits::{BaseTypeCodegenMethods, MiscCodegenMethods};
 use rustc_middle::bug;
 #[cfg(feature = "master")]
 use rustc_middle::ty::layout::{FnAbiOf, HasTyCtxt};
@@ -139,6 +140,18 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
                     &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
                 )
             }
+            sym::fmaf16 => {
+                // TODO(antoyo): use the correct builtin for f16.
+                let func = self.cx.context.get_builtin_function("fmaf");
+                let args: Vec<_> = args
+                    .iter()
+                    .map(|arg| {
+                        self.cx.context.new_cast(self.location, arg.immediate(), self.cx.type_f32())
+                    })
+                    .collect();
+                let result = self.cx.context.new_call(self.location, func, &args);
+                self.cx.context.new_cast(self.location, result, self.cx.type_f16())
+            }
             sym::is_val_statically_known => {
                 let a = args[0].immediate();
                 let builtin = self.context.get_builtin_function("__builtin_constant_p");

From 7bc67011d27f3e1ce15d8368f75365644549fbe8 Mon Sep 17 00:00:00 2001
From: Sudhanshu Singh <singhsudhanshu069@gmail.com>
Date: Mon, 13 Jan 2025 22:27:33 +0530
Subject: [PATCH 808/997] Remove codegen_gcc_lto_not_supported in messages.flt

---
 messages.ftl | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/messages.ftl b/messages.ftl
index 85fa17a6ba50..882fff8673a1 100644
--- a/messages.ftl
+++ b/messages.ftl
@@ -5,9 +5,6 @@ codegen_gcc_unknown_ctarget_feature_prefix =
 codegen_gcc_invalid_minimum_alignment =
     invalid minimum global alignment: {$err}
 
-codegen_gcc_lto_not_supported =
-    LTO is not supported. You may get a linker error.
-
 codegen_gcc_forbidden_ctarget_feature =
     target feature `{$feature}` cannot be toggled with `-Ctarget-feature`: {$reason}
 

From 50a9f41ce97ec0c297d33611f1cd91e81bf1e519 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 15 Jan 2025 10:26:57 -0500
Subject: [PATCH 809/997] Update GCC version

---
 .github/workflows/ci.yml       | 4 ++--
 .github/workflows/failures.yml | 4 ++--
 .github/workflows/m68k.yml     | 6 +++---
 .github/workflows/release.yml  | 4 ++--
 libgccjit.version              | 2 +-
 5 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 73ec6b84a155..fa6133c75e31 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -19,8 +19,8 @@ jobs:
       fail-fast: false
       matrix:
         libgccjit_version:
-          - { gcc: "gcc-13.deb" }
-          - { gcc: "gcc-13-without-int128.deb" }
+          - { gcc: "gcc-15.deb" }
+          - { gcc: "gcc-15-without-int128.deb" }
         commands: [
           "--std-tests",
           # FIXME: re-enable asm tests when GCC can emit in the right syntax.
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index f33d9fcc5825..407c9b31d05c 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -56,12 +56,12 @@ jobs:
 
     - name: Download artifact
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
-      run: curl -LO https://github.com/rust-lang/gcc/releases/latest/download/gcc-13.deb
+      run: curl -LO https://github.com/rust-lang/gcc/releases/latest/download/gcc-15.deb
 
     - name: Setup path to libgccjit
       if: matrix.libgccjit_version.gcc != 'libgccjit12.so'
       run: |
-          sudo dpkg --force-overwrite -i gcc-13.deb
+          sudo dpkg --force-overwrite -i gcc-15.deb
           echo 'gcc-path = "/usr/lib"' > config.toml
           echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
           echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 07bb372b3606..369299e64478 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -47,17 +47,17 @@ jobs:
     - name: Install packages
       run: |
         sudo apt-get update
-        sudo apt-get install qemu qemu-user-static
+        sudo apt-get install qemu-system qemu-user-static
 
     - name: Download artifact
-      run: curl -LO https://github.com/cross-cg-gcc-tools/cross-gcc/releases/latest/download/gcc-m68k-13.deb
+      run: curl -LO https://github.com/cross-cg-gcc-tools/cross-gcc/releases/latest/download/gcc-m68k-15.deb
 
     - name: Download VM artifact
       run: curl -LO https://github.com/cross-cg-gcc-tools/vms/releases/latest/download/debian-m68k.img
 
     - name: Setup path to libgccjit
       run: |
-          sudo dpkg -i gcc-m68k-13.deb
+          sudo dpkg -i gcc-m68k-15.deb
           echo 'gcc-path = "/usr/lib/"' > config.toml
 
     - name: Set env
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 60e0943c87da..f36b14970482 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -37,11 +37,11 @@ jobs:
       run: sudo apt-get install ninja-build ripgrep
 
     - name: Download artifact
-      run: curl -LO https://github.com/rust-lang/gcc/releases/latest/download/gcc-13.deb
+      run: curl -LO https://github.com/rust-lang/gcc/releases/latest/download/gcc-15.deb
 
     - name: Setup path to libgccjit
       run: |
-          sudo dpkg --force-overwrite -i gcc-13.deb
+          sudo dpkg --force-overwrite -i gcc-15.deb
           echo 'gcc-path = "/usr/lib/"' > config.toml
 
     - name: Set env
diff --git a/libgccjit.version b/libgccjit.version
index ff58accec1d4..417fd5b03935 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-45648c2edd4ecd862d9f08196d3d6c6ccba79f07
+e607be166673a8de9fc07f6f02c60426e556c5f2

From 0ab1f8ddb0d8364892e7cf2a064f9eb988c91a23 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 15 Jan 2025 10:30:57 -0500
Subject: [PATCH 810/997] Update the CI to Ubuntu 24.04

---
 .github/workflows/ci.yml       | 6 +++---
 .github/workflows/failures.yml | 2 +-
 .github/workflows/gcc12.yml    | 2 +-
 .github/workflows/m68k.yml     | 2 +-
 .github/workflows/release.yml  | 2 +-
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index fa6133c75e31..f96912e6b7a8 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -13,7 +13,7 @@ env:
 
 jobs:
   build:
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
 
     strategy:
       fail-fast: false
@@ -108,13 +108,13 @@ jobs:
         cargo clippy --all-targets --features master -- -D warnings
 
   duplicates:
-    runs-on: ubuntu-latest
+    runs-on: ubuntu-24.04
     steps:
       - uses: actions/checkout@v4
       - run: python tools/check_intrinsics_duplicates.py
 
   build_system:
-    runs-on: ubuntu-latest
+    runs-on: ubuntu-24.04
     steps:
       - uses: actions/checkout@v4
       - name: Test build system
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index 407c9b31d05c..d080bbfe91fe 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -13,7 +13,7 @@ env:
 
 jobs:
   build:
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
 
     strategy:
       fail-fast: false
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index 4c2ce91e86ee..bb9e020dc6a4 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -17,7 +17,7 @@ env:
 
 jobs:
   build:
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
 
     strategy:
       fail-fast: false
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 369299e64478..ed1fc02bd913 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -17,7 +17,7 @@ env:
 
 jobs:
   build:
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
 
     strategy:
       fail-fast: false
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index f36b14970482..77bb9056b279 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -13,7 +13,7 @@ env:
 
 jobs:
   build:
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
 
     strategy:
       fail-fast: false

From 638611f5f5ab1262f42791d9e8771d29dac6cd87 Mon Sep 17 00:00:00 2001
From: Raj Aryan Agrawal <rajaryan.a.258@gmail.com>
Date: Thu, 16 Jan 2025 15:46:33 +0900
Subject: [PATCH 811/997] Add grep check for LTO Test

---
 .github/workflows/release.yml | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 77bb9056b279..886ce90b4713 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -76,4 +76,9 @@ jobs:
     - name: Run y.sh cargo build
       run: |
         EMBED_LTO_BITCODE=1 CHANNEL="release" ./y.sh cargo build --release --manifest-path tests/hello-world/Cargo.toml
-        # TODO: grep the asm output for "call my_func" and fail if it is found.
+        call_found=$(objdump -dj .text tests/hello-world/target/release/hello_world | grep -c "call .*mylib.*my_func" ) ||:
+        if [ $call_found -gt 0 ]; then
+          echo "ERROR: call my_func found in asm"
+          echo "Test is done with LTO enabled, hence inlining should occur across crates"
+          exit 1
+        fi

From 8d0eb87d08ac146cddb85e8f59fa6902204290c1 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 24 Jan 2025 15:28:16 +0100
Subject: [PATCH 812/997] Remove extra whitespace at the end of some line
 strings

---
 build_system/src/main.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index 3a860e2b1360..393617183061 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -34,11 +34,11 @@ Options:
         --help    : Displays this help message.
 
 Commands:
-        cargo     : Executes a cargo command. 
+        cargo     : Executes a cargo command.
         rustc     : Compiles the program using the GCC compiler.
         clean     : Cleans the build directory, removing all compiled files and artifacts.
         prepare   : Prepares the environment for building, including fetching dependencies and setting up configurations.
-        build     : Compiles the project. 
+        build     : Compiles the project.
         test      : Runs tests for the project.
         info      : Displays information about the build environment and project configuration.
         clone-gcc : Clones the GCC compiler from a specified source.

From f24b0d358ac32af14994657865e1b4493550dc7a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 24 Jan 2025 10:48:53 -0500
Subject: [PATCH 813/997] Add comment to explain why CG_RUSTFLAGS is needed

---
 build_system/src/build.rs  | 2 ++
 build_system/src/config.rs | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index d0ced211a616..a027c82a0b56 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -150,6 +150,8 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         "debug"
     };
 
+    // We have a different environment variable than RUSTFLAGS to make sure those flags are only
+    // sent to rustc_codegen_gcc and not the LLVM backend.
     if let Ok(cg_rustflags) = std::env::var("CG_RUSTFLAGS") {
         rustflags.push(' ');
         rustflags.push_str(&cg_rustflags);
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 37b4b68950e4..f10eee2651a7 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -381,6 +381,8 @@ impl ConfigInfo {
         }
 
         // This environment variable is useful in case we want to change options of rustc commands.
+        // We have a different environment variable than RUSTFLAGS to make sure those flags are
+        // only sent to rustc_codegen_gcc and not the LLVM backend.
         if let Some(cg_rustflags) = env.get("CG_RUSTFLAGS") {
             rustflags.extend_from_slice(&split_args(&cg_rustflags)?);
         }

From 4798615ad4199a87f5ad880ad757b67b6db6e4f8 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 24 Jan 2025 16:09:26 +0100
Subject: [PATCH 814/997] Add `--gcc-path` option

---
 build_system/src/build.rs  |  8 ++++++--
 build_system/src/config.rs | 40 ++++++++++++++++++++++++++------------
 build_system/src/info.rs   |  4 +++-
 build_system/src/test.rs   |  7 +++++--
 4 files changed, 42 insertions(+), 17 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index d0ced211a616..2f48d78e6a8b 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -184,8 +184,12 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
 fn build_codegen(args: &mut BuildArg) -> Result<(), String> {
     let mut env = HashMap::new();
 
-    env.insert("LD_LIBRARY_PATH".to_string(), args.config_info.gcc_path.clone());
-    env.insert("LIBRARY_PATH".to_string(), args.config_info.gcc_path.clone());
+    let gcc_path =
+        args.config_info.gcc_path.clone().expect(
+            "The config module should have emitted an error if the GCC path wasn't provided",
+        );
+    env.insert("LD_LIBRARY_PATH".to_string(), gcc_path.clone());
+    env.insert("LIBRARY_PATH".to_string(), gcc_path);
 
     if args.config_info.no_default_features {
         env.insert("RUSTFLAGS".to_string(), "-Csymbol-mangling-version=v0".to_string());
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 37b4b68950e4..e8eeb559c79d 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -112,7 +112,7 @@ pub struct ConfigInfo {
     pub sysroot_panic_abort: bool,
     pub cg_backend_path: String,
     pub sysroot_path: String,
-    pub gcc_path: String,
+    pub gcc_path: Option<String>,
     config_file: Option<String>,
     // This is used in particular in rust compiler bootstrap because it doesn't run at the root
     // of the `cg_gcc` folder, making it complicated for us to get access to local files we need
@@ -173,6 +173,14 @@ impl ConfigInfo {
             "--release-sysroot" => self.sysroot_release_channel = true,
             "--release" => self.channel = Channel::Release,
             "--sysroot-panic-abort" => self.sysroot_panic_abort = true,
+            "--gcc-path" => match args.next() {
+                Some(arg) if !arg.is_empty() => {
+                    self.gcc_path = Some(arg.into());
+                }
+                _ => {
+                    return Err("Expected a value after `--gcc-path`, found nothing".to_string());
+                }
+            },
             "--cg_gcc-path" => match args.next() {
                 Some(arg) if !arg.is_empty() => {
                     self.cg_gcc_path = Some(arg.into());
@@ -260,8 +268,9 @@ impl ConfigInfo {
             create_symlink(&libgccjit_so, output_dir.join(&format!("{}.0", libgccjit_so_name)))?;
         }
 
-        self.gcc_path = output_dir.display().to_string();
-        println!("Using `{}` as path for libgccjit", self.gcc_path);
+        let gcc_path = output_dir.display().to_string();
+        println!("Using `{}` as path for libgccjit", gcc_path);
+        self.gcc_path = Some(gcc_path);
         Ok(())
     }
 
@@ -273,6 +282,11 @@ impl ConfigInfo {
     }
 
     pub fn setup_gcc_path(&mut self) -> Result<(), String> {
+        // If the user used the `--gcc-path` option, no need to look at `config.toml` content
+        // since we already have everything we need.
+        if self.gcc_path.is_some() {
+            return Ok(());
+        }
         let config_file = match self.config_file.as_deref() {
             Some(config_file) => config_file.into(),
             None => self.compute_path("config.toml"),
@@ -283,12 +297,10 @@ impl ConfigInfo {
             self.download_gccjit_if_needed()?;
             return Ok(());
         }
-        self.gcc_path = match gcc_path {
-            Some(path) => path,
-            None => {
-                return Err(format!("missing `gcc-path` value from `{}`", config_file.display(),));
-            }
-        };
+        if gcc_path.is_none() {
+            return Err(format!("missing `gcc-path` value from `{}`", config_file.display()));
+        }
+        self.gcc_path = gcc_path;
         Ok(())
     }
 
@@ -299,10 +311,13 @@ impl ConfigInfo {
     ) -> Result<(), String> {
         env.insert("CARGO_INCREMENTAL".to_string(), "0".to_string());
 
-        if self.gcc_path.is_empty() && !use_system_gcc {
+        if self.gcc_path.is_none() && !use_system_gcc {
             self.setup_gcc_path()?;
         }
-        env.insert("GCC_PATH".to_string(), self.gcc_path.clone());
+        let gcc_path = self.gcc_path.clone().expect(
+            "The config module should have emitted an error if the GCC path wasn't provided",
+        );
+        env.insert("GCC_PATH".to_string(), gcc_path.clone());
 
         if self.cargo_target_dir.is_empty() {
             match env.get("CARGO_TARGET_DIR").filter(|dir| !dir.is_empty()) {
@@ -414,7 +429,7 @@ impl ConfigInfo {
             "{target}:{sysroot}:{gcc_path}",
             target = self.cargo_target_dir,
             sysroot = sysroot.display(),
-            gcc_path = self.gcc_path,
+            gcc_path = gcc_path,
         );
         env.insert("LIBRARY_PATH".to_string(), ld_library_path.clone());
         env.insert("LD_LIBRARY_PATH".to_string(), ld_library_path.clone());
@@ -459,6 +474,7 @@ impl ConfigInfo {
     --release-sysroot      : Build sysroot in release mode
     --sysroot-panic-abort  : Build the sysroot without unwinding support
     --config-file          : Location of the config file to be used
+    --gcc-path             : Location of the GCC root folder
     --cg_gcc-path          : Location of the rustc_codegen_gcc root folder (used
                              when ran from another directory)
     --no-default-features  : Add `--no-default-features` flag to cargo commands
diff --git a/build_system/src/info.rs b/build_system/src/info.rs
index ea38791d38c9..bd891de2eb4c 100644
--- a/build_system/src/info.rs
+++ b/build_system/src/info.rs
@@ -14,6 +14,8 @@ pub fn run() -> Result<(), String> {
     }
     config.no_download = true;
     config.setup_gcc_path()?;
-    println!("{}", config.gcc_path);
+    if let Some(gcc_path) = config.gcc_path {
+        println!("{}", gcc_path);
+    }
     Ok(())
 }
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 7cc7336612c7..efd7b2b8df3a 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1255,8 +1255,11 @@ pub fn run() -> Result<(), String> {
 
     if !args.use_system_gcc {
         args.config_info.setup_gcc_path()?;
-        env.insert("LIBRARY_PATH".to_string(), args.config_info.gcc_path.clone());
-        env.insert("LD_LIBRARY_PATH".to_string(), args.config_info.gcc_path.clone());
+        let gcc_path = args.config_info.gcc_path.clone().expect(
+            "The config module should have emitted an error if the GCC path wasn't provided",
+        );
+        env.insert("LIBRARY_PATH".to_string(), gcc_path.clone());
+        env.insert("LD_LIBRARY_PATH".to_string(), gcc_path);
     }
 
     build_if_no_backend(&env, &args)?;

From b8218f0d2bcca50dc0128393015207aa649587c0 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 24 Jan 2025 16:40:47 +0100
Subject: [PATCH 815/997] Add log to mention what GCC path the build script is
 using and where it comes from

---
 build_system/src/config.rs | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index e8eeb559c79d..843f87c8be6b 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -284,7 +284,11 @@ impl ConfigInfo {
     pub fn setup_gcc_path(&mut self) -> Result<(), String> {
         // If the user used the `--gcc-path` option, no need to look at `config.toml` content
         // since we already have everything we need.
-        if self.gcc_path.is_some() {
+        if let Some(gcc_path) = &self.gcc_path {
+            println!(
+                "`--gcc-path` was provided, ignoring config file. Using `{}` as path for libgccjit",
+                gcc_path
+            );
             return Ok(());
         }
         let config_file = match self.config_file.as_deref() {
@@ -297,10 +301,15 @@ impl ConfigInfo {
             self.download_gccjit_if_needed()?;
             return Ok(());
         }
-        if gcc_path.is_none() {
+        let Some(gcc_path) = gcc_path else {
             return Err(format!("missing `gcc-path` value from `{}`", config_file.display()));
-        }
-        self.gcc_path = gcc_path;
+        };
+        println!(
+            "GCC path retrieved from `{}`. Using `{}` as path for libgccjit",
+            config_file.display(),
+            gcc_path
+        );
+        self.gcc_path = Some(gcc_path);
         Ok(())
     }
 

From 12e73aec910ba8ad6fc673cacf7d5138523c8d30 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 24 Jan 2025 22:42:42 +0100
Subject: [PATCH 816/997] Fix `--use-system-gcc` option handling

---
 build_system/src/config.rs | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 0904ea871cd4..4f9fcc971514 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -320,12 +320,16 @@ impl ConfigInfo {
     ) -> Result<(), String> {
         env.insert("CARGO_INCREMENTAL".to_string(), "0".to_string());
 
-        if self.gcc_path.is_none() && !use_system_gcc {
-            self.setup_gcc_path()?;
-        }
-        let gcc_path = self.gcc_path.clone().expect(
-            "The config module should have emitted an error if the GCC path wasn't provided",
-        );
+        let gcc_path = if !use_system_gcc {
+            if self.gcc_path.is_none() {
+                self.setup_gcc_path()?;
+            }
+            self.gcc_path.clone().expect(
+                "The config module should have emitted an error if the GCC path wasn't provided",
+            )
+        } else {
+            String::new()
+        };
         env.insert("GCC_PATH".to_string(), gcc_path.clone());
 
         if self.cargo_target_dir.is_empty() {

From bc6b9bf526b2aafefe5d212cdde85e01b16351ba Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jakub=20Ber=C3=A1nek?= <berykubik@gmail.com>
Date: Mon, 27 Jan 2025 23:27:43 +0100
Subject: [PATCH 817/997] Add CI success job

---
 .github/workflows/ci.yml | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index f96912e6b7a8..689a7dee435f 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -121,3 +121,23 @@ jobs:
         run: |
           cd build_system
           cargo test
+
+
+  # Summary job for the merge queue.
+  # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!
+  success:
+    needs: [build, duplicates, build_system]
+    # We need to ensure this job does *not* get skipped if its dependencies fail,
+    # because a skipped job is considered a success by GitHub. So we have to
+    # overwrite `if:`. We use `!cancelled()` to ensure the job does still not get run
+    # when the workflow is canceled manually.
+    if: ${{ !cancelled() }}
+    runs-on: ubuntu-latest
+    steps:
+      # Manually check the status of all dependencies. `if: failure()` does not work.
+      - name: Conclusion
+        run: |
+          # Print the dependent jobs to see them in the CI log
+          jq -C <<< '${{ toJson(needs) }}'
+          # Check if all jobs that we depend on (in the needs array) were successful.
+          jq --exit-status 'all(.result == "success")' <<< '${{ toJson(needs) }}'

From adee0849a2971663984f6d7c1612097d4cbbcbd3 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 1 Feb 2025 10:31:25 -0500
Subject: [PATCH 818/997] Add success job for all CI workflows

---
 .github/workflows/ci.yml       | 1 -
 .github/workflows/failures.yml | 2 +-
 .github/workflows/gcc12.yml    | 2 +-
 .github/workflows/m68k.yml     | 2 +-
 .github/workflows/release.yml  | 2 +-
 .github/workflows/stdarch.yml  | 2 +-
 6 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 689a7dee435f..688a9f7d7bf7 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -122,7 +122,6 @@ jobs:
           cd build_system
           cargo test
 
-
   # Summary job for the merge queue.
   # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!
   success:
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index d080bbfe91fe..b9f6f9d84f46 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -12,7 +12,7 @@ env:
   RUST_BACKTRACE: 1
 
 jobs:
-  build:
+  success:
     runs-on: ubuntu-24.04
 
     strategy:
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index bb9e020dc6a4..0308eec51cdf 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -16,7 +16,7 @@ env:
   GCC_EXEC_PREFIX: /usr/lib/gcc/
 
 jobs:
-  build:
+  success:
     runs-on: ubuntu-24.04
 
     strategy:
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index ed1fc02bd913..e031ad59f4b5 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -16,7 +16,7 @@ env:
   OVERWRITE_TARGET_TRIPLE: m68k-unknown-linux-gnu
 
 jobs:
-  build:
+  success:
     runs-on: ubuntu-24.04
 
     strategy:
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 886ce90b4713..4367cbccab11 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -12,7 +12,7 @@ env:
   RUST_BACKTRACE: 1
 
 jobs:
-  build:
+  success:
     runs-on: ubuntu-24.04
 
     strategy:
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index d5ae6144496f..ea8bec02eef1 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -12,7 +12,7 @@ env:
   RUST_BACKTRACE: 1
 
 jobs:
-  build:
+  success:
     runs-on: ubuntu-24.04
 
     strategy:

From ff2cd0fb6390d775c753733abefab6b81d45eb64 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jakub=20Ber=C3=A1nek?= <berykubik@gmail.com>
Date: Sat, 1 Feb 2025 19:13:41 +0100
Subject: [PATCH 819/997] Remove duplicated CI triggers

There shouldn't be a need to run all CI jobs on all pushes.
---
 .github/workflows/ci.yml      | 1 -
 .github/workflows/gcc12.yml   | 1 -
 .github/workflows/m68k.yml    | 1 -
 .github/workflows/release.yml | 1 -
 .github/workflows/stdarch.yml | 1 -
 5 files changed, 5 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 688a9f7d7bf7..bf974f65c1e1 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -1,7 +1,6 @@
 name: CI
 
 on:
-  - push
   - pull_request
 
 permissions:
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index 0308eec51cdf..0d49336ea208 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -1,7 +1,6 @@
 name: CI libgccjit 12
 
 on:
-  - push
   - pull_request
 
 permissions:
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index e031ad59f4b5..af5f084205e5 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -3,7 +3,6 @@
 name: m68k CI
 
 on:
-  - push
   - pull_request
 
 permissions:
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 4367cbccab11..4582cf577fe6 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -1,7 +1,6 @@
 name: CI with sysroot compiled in release mode
 
 on:
-  - push
   - pull_request
 
 permissions:
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index ea8bec02eef1..a1df0207d54f 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -1,7 +1,6 @@
 name: stdarch tests with sysroot compiled in release mode
 
 on:
-  - push
   - pull_request
 
 permissions:

From befc31c588585db6650d228f50727070e2ccd96b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 1 Feb 2025 12:19:35 -0500
Subject: [PATCH 820/997] Move back to a success job so because the required
 checks only work without a matrix

---
 .github/workflows/failures.yml | 21 ++++++++++++++++++++-
 .github/workflows/gcc12.yml    | 21 ++++++++++++++++++++-
 .github/workflows/m68k.yml     | 21 ++++++++++++++++++++-
 .github/workflows/release.yml  | 21 ++++++++++++++++++++-
 .github/workflows/stdarch.yml  | 21 ++++++++++++++++++++-
 5 files changed, 100 insertions(+), 5 deletions(-)

diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index b9f6f9d84f46..ab3e4002e87f 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -12,7 +12,7 @@ env:
   RUST_BACKTRACE: 1
 
 jobs:
-  success:
+  build:
     runs-on: ubuntu-24.04
 
     strategy:
@@ -108,3 +108,22 @@ jobs:
           echo "Error: 'the compiler unexpectedly panicked' found in output logs. CI Error!!"
           exit 1
         fi
+
+  # Summary job for the merge queue.
+  # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!
+  success_failures:
+    needs: [build]
+    # We need to ensure this job does *not* get skipped if its dependencies fail,
+    # because a skipped job is considered a success by GitHub. So we have to
+    # overwrite `if:`. We use `!cancelled()` to ensure the job does still not get run
+    # when the workflow is canceled manually.
+    if: ${{ !cancelled() }}
+    runs-on: ubuntu-latest
+    steps:
+      # Manually check the status of all dependencies. `if: failure()` does not work.
+      - name: Conclusion
+        run: |
+          # Print the dependent jobs to see them in the CI log
+          jq -C <<< '${{ toJson(needs) }}'
+          # Check if all jobs that we depend on (in the needs array) were successful.
+          jq --exit-status 'all(.result == "success")' <<< '${{ toJson(needs) }}'
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index 0308eec51cdf..33d5d1a52df8 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -16,7 +16,7 @@ env:
   GCC_EXEC_PREFIX: /usr/lib/gcc/
 
 jobs:
-  success:
+  build:
     runs-on: ubuntu-24.04
 
     strategy:
@@ -85,3 +85,22 @@ jobs:
     #- name: Run tests
       #run: |
         #./y.sh test --release --clean --build-sysroot ${{ matrix.commands }} --no-default-features
+
+  # Summary job for the merge queue.
+  # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!
+  success_gcc12:
+    needs: [build]
+    # We need to ensure this job does *not* get skipped if its dependencies fail,
+    # because a skipped job is considered a success by GitHub. So we have to
+    # overwrite `if:`. We use `!cancelled()` to ensure the job does still not get run
+    # when the workflow is canceled manually.
+    if: ${{ !cancelled() }}
+    runs-on: ubuntu-latest
+    steps:
+      # Manually check the status of all dependencies. `if: failure()` does not work.
+      - name: Conclusion
+        run: |
+          # Print the dependent jobs to see them in the CI log
+          jq -C <<< '${{ toJson(needs) }}'
+          # Check if all jobs that we depend on (in the needs array) were successful.
+          jq --exit-status 'all(.result == "success")' <<< '${{ toJson(needs) }}'
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index e031ad59f4b5..a7090338a7f1 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -16,7 +16,7 @@ env:
   OVERWRITE_TARGET_TRIPLE: m68k-unknown-linux-gnu
 
 jobs:
-  success:
+  build:
     runs-on: ubuntu-24.04
 
     strategy:
@@ -105,3 +105,22 @@ jobs:
     - name: Run tests
       run: |
         ./y.sh test --release --clean --build-sysroot --sysroot-features compiler_builtins/no-f16-f128 ${{ matrix.commands }}
+
+  # Summary job for the merge queue.
+  # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!
+  success_m68k:
+    needs: [build]
+    # We need to ensure this job does *not* get skipped if its dependencies fail,
+    # because a skipped job is considered a success by GitHub. So we have to
+    # overwrite `if:`. We use `!cancelled()` to ensure the job does still not get run
+    # when the workflow is canceled manually.
+    if: ${{ !cancelled() }}
+    runs-on: ubuntu-latest
+    steps:
+      # Manually check the status of all dependencies. `if: failure()` does not work.
+      - name: Conclusion
+        run: |
+          # Print the dependent jobs to see them in the CI log
+          jq -C <<< '${{ toJson(needs) }}'
+          # Check if all jobs that we depend on (in the needs array) were successful.
+          jq --exit-status 'all(.result == "success")' <<< '${{ toJson(needs) }}'
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 4367cbccab11..7284b7f7398a 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -12,7 +12,7 @@ env:
   RUST_BACKTRACE: 1
 
 jobs:
-  success:
+  build:
     runs-on: ubuntu-24.04
 
     strategy:
@@ -82,3 +82,22 @@ jobs:
           echo "Test is done with LTO enabled, hence inlining should occur across crates"
           exit 1
         fi
+
+  # Summary job for the merge queue.
+  # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!
+  success_release:
+    needs: [build]
+    # We need to ensure this job does *not* get skipped if its dependencies fail,
+    # because a skipped job is considered a success by GitHub. So we have to
+    # overwrite `if:`. We use `!cancelled()` to ensure the job does still not get run
+    # when the workflow is canceled manually.
+    if: ${{ !cancelled() }}
+    runs-on: ubuntu-latest
+    steps:
+      # Manually check the status of all dependencies. `if: failure()` does not work.
+      - name: Conclusion
+        run: |
+          # Print the dependent jobs to see them in the CI log
+          jq -C <<< '${{ toJson(needs) }}'
+          # Check if all jobs that we depend on (in the needs array) were successful.
+          jq --exit-status 'all(.result == "success")' <<< '${{ toJson(needs) }}'
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index ea8bec02eef1..9438e557ecd9 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -12,7 +12,7 @@ env:
   RUST_BACKTRACE: 1
 
 jobs:
-  success:
+  build:
     runs-on: ubuntu-24.04
 
     strategy:
@@ -102,3 +102,22 @@ jobs:
         # TODO: remove --skip test_mm512_stream_ps when stdarch is updated in rustc.
         # TODO: remove --skip test_tile_ when it's implemented.
         STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features --cfg stdarch_intel_sde" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a --skip test_mm512_stream_ps --skip test_tile_
+
+  # Summary job for the merge queue.
+  # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!
+  success_stdarch:
+    needs: [build]
+    # We need to ensure this job does *not* get skipped if its dependencies fail,
+    # because a skipped job is considered a success by GitHub. So we have to
+    # overwrite `if:`. We use `!cancelled()` to ensure the job does still not get run
+    # when the workflow is canceled manually.
+    if: ${{ !cancelled() }}
+    runs-on: ubuntu-latest
+    steps:
+      # Manually check the status of all dependencies. `if: failure()` does not work.
+      - name: Conclusion
+        run: |
+          # Print the dependent jobs to see them in the CI log
+          jq -C <<< '${{ toJson(needs) }}'
+          # Check if all jobs that we depend on (in the needs array) were successful.
+          jq --exit-status 'all(.result == "success")' <<< '${{ toJson(needs) }}'

From ad2be68b490180012d7775a2ae3e0fd8e9cabda4 Mon Sep 17 00:00:00 2001
From: Kevin Hamacher <kevin@hamacher.cc>
Date: Mon, 27 Jan 2025 19:05:14 +0100
Subject: [PATCH 821/997] Make globals always have 2+ chars as suffix

As discussed on chat, there currently is the bug where certain suffixes are interpreted by the (m68k) assembler.

Example: `move.l #global.w,-44(%fp)`
`.w` is interpreted by the assembler as a size hint for `#global`.
---
 src/context.rs | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/context.rs b/src/context.rs
index c81c53359fd1..2a33beef63b9 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -606,7 +606,10 @@ impl<'b, 'tcx> CodegenCx<'b, 'tcx> {
         let mut name = String::with_capacity(prefix.len() + 6);
         name.push_str(prefix);
         name.push('.');
-        name.push_str(&(idx as u64).to_base(ALPHANUMERIC_ONLY));
+        // Offset the index by the base so that always at least two characters
+        // are generated. This avoids cases where the suffix is interpreted as
+        // size by the assembler (for m68k: .b, .w, .l).
+        name.push_str(&(idx as u64 + ALPHANUMERIC_ONLY as u64).to_base(ALPHANUMERIC_ONLY));
         name
     }
 }

From 5d12c54b345d6bf6e7d25b904c1b7fbb0287429e Mon Sep 17 00:00:00 2001
From: Kevin Hamacher <kevin@hamacher.cc>
Date: Mon, 27 Jan 2025 18:49:49 +0100
Subject: [PATCH 822/997] Add M68000 entry to arch_to_gcc

---
 src/gcc_util.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 560aff43d653..f463ee406174 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -242,6 +242,7 @@ pub fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]>
 
 fn arch_to_gcc(name: &str) -> &str {
     match name {
+        "M68000" => "68000",
         "M68020" => "68020",
         _ => name,
     }

From 4c932ff8379e70893d3cdc835c289547ba3bee26 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 25 Jan 2025 23:32:44 +0100
Subject: [PATCH 823/997] Update repositories URL for repositories moved to
 `rust-lang` organization

---
 Readme.md                     | 4 ++--
 build_system/src/clone_gcc.rs | 2 +-
 doc/add-attribute.md          | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/Readme.md b/Readme.md
index e92c16ece2f1..d0e4dbba6d35 100644
--- a/Readme.md
+++ b/Readme.md
@@ -23,7 +23,7 @@ A secondary goal is to check if using the gcc backend will provide any run-time
 ## Building
 
 **This requires a patched libgccjit in order to work.
-You need to use my [fork of gcc](https://github.com/antoyo/gcc) which already includes these patches.**
+You need to use my [fork of gcc](https://github.com/rust-lang/gcc) which already includes these patches.**
 
 ```bash
 $ cp config.example.toml config.toml
@@ -40,7 +40,7 @@ to do a few more things.
 To build it (most of these instructions come from [here](https://gcc.gnu.org/onlinedocs/jit/internals/index.html), so don't hesitate to take a look there if you encounter an issue):
 
 ```bash
-$ git clone https://github.com/antoyo/gcc
+$ git clone https://github.com/rust-lang/gcc
 $ sudo apt install flex libmpfr-dev libgmp-dev libmpc3 libmpc-dev
 $ mkdir gcc-build gcc-install
 $ cd gcc-build
diff --git a/build_system/src/clone_gcc.rs b/build_system/src/clone_gcc.rs
index e28ee873eb6b..b49dd47f3521 100644
--- a/build_system/src/clone_gcc.rs
+++ b/build_system/src/clone_gcc.rs
@@ -61,7 +61,7 @@ pub fn run() -> Result<(), String> {
         return Ok(());
     };
 
-    let result = git_clone("https://github.com/antoyo/gcc", Some(&args.out_path), false)?;
+    let result = git_clone("https://github.com/rust-lang/gcc", Some(&args.out_path), false)?;
     if result.ran_clone {
         let gcc_commit = args.config_info.get_gcc_commit()?;
         println!("Checking out GCC commit `{}`...", gcc_commit);
diff --git a/doc/add-attribute.md b/doc/add-attribute.md
index ae3bcc5e2ebe..267c18195255 100644
--- a/doc/add-attribute.md
+++ b/doc/add-attribute.md
@@ -14,4 +14,4 @@ Finally, you need to update this repository by calling the relevant API you adde
 
 To test it, build `gcc`, run `cargo update -p gccjit` and then you can test the generated output for a given Rust crate.
 
-[gccjit.rs]: https://github.com/antoyo/gccjit.rs
+[gccjit.rs]: https://github.com/rust-lang/gccjit.rs

From 2214ba9f1a9a3d88098ae34912d5c646b57f59a6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 5 Feb 2025 12:16:57 -0500
Subject: [PATCH 824/997] Run the CI on push on the master branch

---
 .github/workflows/ci.yml       | 5 ++++-
 .github/workflows/failures.yml | 5 ++++-
 .github/workflows/gcc12.yml    | 5 ++++-
 .github/workflows/m68k.yml     | 5 ++++-
 .github/workflows/release.yml  | 5 ++++-
 .github/workflows/stdarch.yml  | 5 ++++-
 6 files changed, 24 insertions(+), 6 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index bf974f65c1e1..ef024258ffc8 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -1,7 +1,10 @@
 name: CI
 
 on:
-  - pull_request
+  push:
+    branches:
+      - master
+  pull_request:
 
 permissions:
   contents: read
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index ab3e4002e87f..bc42eb1468ea 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -2,7 +2,10 @@
 name: Failures
 
 on:
-  - pull_request
+  push:
+    branches:
+      - master
+  pull_request:
 
 permissions:
   contents: read
diff --git a/.github/workflows/gcc12.yml b/.github/workflows/gcc12.yml
index d6b7e5a2a13a..da9a1506855c 100644
--- a/.github/workflows/gcc12.yml
+++ b/.github/workflows/gcc12.yml
@@ -1,7 +1,10 @@
 name: CI libgccjit 12
 
 on:
-  - pull_request
+  push:
+    branches:
+      - master
+  pull_request:
 
 permissions:
   contents: read
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 90fa5acc3fb0..21731f7087e2 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -3,7 +3,10 @@
 name: m68k CI
 
 on:
-  - pull_request
+  push:
+    branches:
+      - master
+  pull_request:
 
 permissions:
   contents: read
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 2f6e3b475319..47a40286554e 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -1,7 +1,10 @@
 name: CI with sysroot compiled in release mode
 
 on:
-  - pull_request
+  push:
+    branches:
+      - master
+  pull_request:
 
 permissions:
   contents: read
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 350e099d8870..4b9f48e7b183 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -1,7 +1,10 @@
 name: stdarch tests with sysroot compiled in release mode
 
 on:
-  - pull_request
+  push:
+    branches:
+      - master
+  pull_request:
 
 permissions:
   contents: read

From 09d907627b6f86fae8cc926a353a44bd723ccf59 Mon Sep 17 00:00:00 2001
From: Folkert de Vries <folkert@folkertdev.nl>
Date: Fri, 7 Feb 2025 16:48:39 +0100
Subject: [PATCH 825/997] fix backslashes in path used for `asm_tests`

---
 build_system/src/test.rs | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index efd7b2b8df3a..096b4c4a7154 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -542,20 +542,21 @@ fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
 
     env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
 
-    let extra =
-        if args.is_using_gcc_master_branch() { "" } else { " -Csymbol-mangling-version=v0" };
-
-    let rustc_args = &format!(
-        r#"-Zpanic-abort-tests \
-            -Zcodegen-backend="{pwd}/target/{channel}/librustc_codegen_gcc.{dylib_ext}" \
-            --sysroot "{sysroot_dir}" -Cpanic=abort{extra}"#,
+    let codegen_backend_path = format!(
+        "{pwd}/target/{channel}/librustc_codegen_gcc.{dylib_ext}",
         pwd = std::env::current_dir()
             .map_err(|error| format!("`current_dir` failed: {:?}", error))?
             .display(),
         channel = args.config_info.channel.as_str(),
         dylib_ext = args.config_info.dylib_ext,
-        sysroot_dir = args.config_info.sysroot_path,
-        extra = extra,
+    );
+
+    let extra =
+        if args.is_using_gcc_master_branch() { "" } else { " -Csymbol-mangling-version=v0" };
+
+    let rustc_args = format!(
+        "-Zpanic-abort-tests -Zcodegen-backend={codegen_backend_path} --sysroot {} -Cpanic=abort{extra}",
+        args.config_info.sysroot_path
     );
 
     run_command_with_env(

From cb499a29a8d26cf58e4b26ea70fd49c9486e7528 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Tue, 11 Feb 2025 03:17:38 +0800
Subject: [PATCH 826/997] remove some intrinsics (#625)

---
 src/builder.rs        | 10 +---------
 src/intrinsic/llvm.rs | 42 +-----------------------------------------
 2 files changed, 2 insertions(+), 50 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 89e5cf1b8c6b..8268819c5fae 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -371,16 +371,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let previous_arg_count = args.len();
         let orig_args = args;
         let args = {
-            let function_address_names = self.function_address_names.borrow();
-            let original_function_name = function_address_names.get(&func_ptr);
             func_ptr = llvm::adjust_function(self.context, &func_name, func_ptr, args);
-            llvm::adjust_intrinsic_arguments(
-                self,
-                gcc_func,
-                args.into(),
-                &func_name,
-                original_function_name,
-            )
+            llvm::adjust_intrinsic_arguments(self, gcc_func, args.into(), &func_name)
         };
         let args_adjusted = args.len() != previous_arg_count;
         let args = self.check_ptr_call("call", func_ptr, &args);
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 231307def291..afa434ce74e3 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1,6 +1,6 @@
 use std::borrow::Cow;
 
-use gccjit::{CType, Context, Function, FunctionPtrType, RValue, ToRValue, UnaryOp};
+use gccjit::{CType, Context, Function, FunctionPtrType, RValue, ToRValue};
 use rustc_codegen_ssa::traits::BuilderMethods;
 
 use crate::builder::Builder;
@@ -43,7 +43,6 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
     gcc_func: FunctionPtrType<'gcc>,
     mut args: Cow<'b, [RValue<'gcc>]>,
     func_name: &str,
-    original_function_name: Option<&String>,
 ) -> Cow<'b, [RValue<'gcc>]> {
     // TODO: this might not be a good way to workaround the missing tile builtins.
     if func_name == "__builtin_trap" {
@@ -541,33 +540,6 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 let c = builder.context.new_rvalue_from_vector(None, arg3_type, &[new_args[2]; 2]);
                 args = vec![a, b, c, new_args[3]].into();
             }
-            "__builtin_ia32_vfmaddsubpd256"
-            | "__builtin_ia32_vfmaddsubps"
-            | "__builtin_ia32_vfmaddsubps256"
-            | "__builtin_ia32_vfmaddsubpd" => {
-                if let Some(original_function_name) = original_function_name {
-                    match &**original_function_name {
-                        "llvm.x86.fma.vfmsubadd.pd.256"
-                        | "llvm.x86.fma.vfmsubadd.ps"
-                        | "llvm.x86.fma.vfmsubadd.ps.256"
-                        | "llvm.x86.fma.vfmsubadd.pd" => {
-                            // NOTE: since both llvm.x86.fma.vfmsubadd.ps and llvm.x86.fma.vfmaddsub.ps maps to
-                            // __builtin_ia32_vfmaddsubps, only add minus if this comes from a
-                            // subadd LLVM intrinsic, e.g. _mm256_fmsubadd_pd.
-                            let mut new_args = args.to_vec();
-                            let arg3 = &mut new_args[2];
-                            *arg3 = builder.context.new_unary_op(
-                                None,
-                                UnaryOp::Minus,
-                                arg3.get_type(),
-                                *arg3,
-                            );
-                            args = new_args.into();
-                        }
-                        _ => (),
-                    }
-                }
-            }
             "__builtin_ia32_ldmxcsr" => {
                 // The builtin __builtin_ia32_ldmxcsr takes an integer value while llvm.x86.sse.ldmxcsr takes a pointer,
                 // so dereference the pointer.
@@ -913,16 +885,6 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.ctlz.v4i64" => "__builtin_ia32_vplzcntq_256_mask",
         "llvm.ctlz.v2i64" => "__builtin_ia32_vplzcntq_128_mask",
         "llvm.ctpop.v32i16" => "__builtin_ia32_vpopcountw_v32hi",
-        "llvm.x86.fma.vfmsub.sd" => "__builtin_ia32_vfmsubsd3",
-        "llvm.x86.fma.vfmsub.ss" => "__builtin_ia32_vfmsubss3",
-        "llvm.x86.fma.vfmsubadd.pd" => "__builtin_ia32_vfmaddsubpd",
-        "llvm.x86.fma.vfmsubadd.pd.256" => "__builtin_ia32_vfmaddsubpd256",
-        "llvm.x86.fma.vfmsubadd.ps" => "__builtin_ia32_vfmaddsubps",
-        "llvm.x86.fma.vfmsubadd.ps.256" => "__builtin_ia32_vfmaddsubps256",
-        "llvm.x86.fma.vfnmadd.sd" => "__builtin_ia32_vfnmaddsd3",
-        "llvm.x86.fma.vfnmadd.ss" => "__builtin_ia32_vfnmaddss3",
-        "llvm.x86.fma.vfnmsub.sd" => "__builtin_ia32_vfnmsubsd3",
-        "llvm.x86.fma.vfnmsub.ss" => "__builtin_ia32_vfnmsubss3",
         "llvm.x86.avx512.conflict.d.512" => "__builtin_ia32_vpconflictsi_512_mask",
         "llvm.x86.avx512.conflict.d.256" => "__builtin_ia32_vpconflictsi_256_mask",
         "llvm.x86.avx512.conflict.d.128" => "__builtin_ia32_vpconflictsi_128_mask",
@@ -1000,8 +962,6 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.fshr.v32i16" => "__builtin_ia32_vpshrdv_v32hi",
         "llvm.fshr.v16i16" => "__builtin_ia32_vpshrdv_v16hi",
         "llvm.fshr.v8i16" => "__builtin_ia32_vpshrdv_v8hi",
-        "llvm.x86.fma.vfmadd.sd" => "__builtin_ia32_vfmaddsd3",
-        "llvm.x86.fma.vfmadd.ss" => "__builtin_ia32_vfmaddss3",
         "llvm.x86.rdrand.64" => "__builtin_ia32_rdrand64_step",
 
         // The above doc points to unknown builtins for the following, so override them:

From c817210c70bed03133395890a09908ae06e44c94 Mon Sep 17 00:00:00 2001
From: Folkert de Vries <folkert@folkertdev.nl>
Date: Wed, 12 Feb 2025 15:22:13 +0100
Subject: [PATCH 827/997] handle NaN in unordered comparisons

---
 src/builder.rs             | 45 +++++++++++++++++++++++++++++++++++++-
 tests/failing-ui-tests.txt |  1 -
 tests/run/float.rs         | 32 +++++++++++++++++++++++++++
 3 files changed, 76 insertions(+), 2 deletions(-)
 create mode 100644 tests/run/float.rs

diff --git a/src/builder.rs b/src/builder.rs
index 8268819c5fae..fc2f6862c161 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1284,7 +1284,50 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn fcmp(&mut self, op: RealPredicate, lhs: RValue<'gcc>, rhs: RValue<'gcc>) -> RValue<'gcc> {
-        self.context.new_comparison(self.location, op.to_gcc_comparison(), lhs, rhs)
+        // LLVM has a concept of "unordered compares", where eg ULT returns true if either the two
+        // arguments are unordered (i.e. either is NaN), or the lhs is less than the rhs. GCC does
+        // not natively have this concept, so in some cases we must manually handle NaNs
+        let must_handle_nan = match op {
+            RealPredicate::RealPredicateFalse => unreachable!(),
+            RealPredicate::RealOEQ => false,
+            RealPredicate::RealOGT => false,
+            RealPredicate::RealOGE => false,
+            RealPredicate::RealOLT => false,
+            RealPredicate::RealOLE => false,
+            RealPredicate::RealONE => false,
+            RealPredicate::RealORD => unreachable!(),
+            RealPredicate::RealUNO => unreachable!(),
+            RealPredicate::RealUEQ => false,
+            RealPredicate::RealUGT => true,
+            RealPredicate::RealUGE => true,
+            RealPredicate::RealULT => true,
+            RealPredicate::RealULE => true,
+            RealPredicate::RealUNE => false,
+            RealPredicate::RealPredicateTrue => unreachable!(),
+        };
+
+        let cmp = self.context.new_comparison(self.location, op.to_gcc_comparison(), lhs, rhs);
+
+        if must_handle_nan {
+            let is_nan = self.context.new_binary_op(
+                self.location,
+                BinaryOp::LogicalOr,
+                self.cx.bool_type,
+                // compare a value to itself to check whether it is NaN
+                self.context.new_comparison(self.location, ComparisonOp::NotEquals, lhs, lhs),
+                self.context.new_comparison(self.location, ComparisonOp::NotEquals, rhs, rhs),
+            );
+
+            self.context.new_binary_op(
+                self.location,
+                BinaryOp::LogicalOr,
+                self.cx.bool_type,
+                is_nan,
+                cmp,
+            )
+        } else {
+            cmp
+        }
     }
 
     /* Miscellaneous instructions */
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 082958bfe1f8..579ac3749e95 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -5,7 +5,6 @@ tests/ui/asm/x86_64/multiple-clobber-abi.rs
 tests/ui/functions-closures/parallel-codegen-closures.rs
 tests/ui/linkage-attr/linkage1.rs
 tests/ui/lto/dylib-works.rs
-tests/ui/numbers-arithmetic/saturating-float-casts.rs
 tests/ui/sepcomp/sepcomp-cci.rs
 tests/ui/sepcomp/sepcomp-extern.rs
 tests/ui/sepcomp/sepcomp-fns-backwards.rs
diff --git a/tests/run/float.rs b/tests/run/float.rs
new file mode 100644
index 000000000000..e0a57e6fed1a
--- /dev/null
+++ b/tests/run/float.rs
@@ -0,0 +1,32 @@
+// Compiler:
+//
+// Run-time:
+//   status: 0
+
+#![feature(const_black_box)]
+
+/*
+ * Code
+ */
+
+fn main() {
+    use std::hint::black_box;
+
+    macro_rules! check {
+        ($ty:ty, $expr:expr) => {{
+            const EXPECTED: $ty = $expr;
+            assert_eq!($expr, EXPECTED);
+        }};
+    }
+
+    check!(i32, (black_box(0.0f32) as i32));
+
+    check!(u64, (black_box(f32::NAN) as u64));
+    check!(u128, (black_box(f32::NAN) as u128));
+
+    check!(i64, (black_box(f64::NAN) as i64));
+    check!(u64, (black_box(f64::NAN) as u64));
+
+    check!(i16, (black_box(f32::MIN) as i16));
+    check!(i16, (black_box(f32::MAX) as i16));
+}

From 4f59a687f136ac0ce29ad68ea02066e06fb9fc88 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 12 Feb 2025 19:54:51 -0500
Subject: [PATCH 828/997] Support sysv64 and ms ABIs

---
 Cargo.lock     |  8 ++++----
 Cargo.toml     |  2 +-
 src/abi.rs     | 46 ++++++++++++++++++++++++++++++++++++++++++++++
 src/context.rs |  8 +++++++-
 src/declare.rs | 25 ++++++++++++++-----------
 src/lib.rs     |  4 ++--
 6 files changed, 74 insertions(+), 19 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 636e75b94a3f..832603aa7925 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -56,18 +56,18 @@ dependencies = [
 
 [[package]]
 name = "gccjit"
-version = "2.4.0"
+version = "2.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "72fd91f4adbf02b53cfc73c97bc33c5f253009043f30c56a5ec08dd5c8094dc8"
+checksum = "2895ddec764de7ac76fe6c056050c4801a80109c066f177a00a9cc8dee02b29b"
 dependencies = [
  "gccjit_sys",
 ]
 
 [[package]]
 name = "gccjit_sys"
-version = "0.5.0"
+version = "0.6.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0fb7b8f48a75e2cfe78c3d9a980b32771c34ffd12d196021ab3f98c49fbd2f0d"
+checksum = "ac133db68db8a6a8b2c51ef4b18d8ea16682d5814c4641272fe37bbbc223d5f3"
 dependencies = [
  "libc",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index 63d37358561e..b50f2a626d57 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,7 +22,7 @@ master = ["gccjit/master"]
 default = ["master"]
 
 [dependencies]
-gccjit = "2.4"
+gccjit = "2.5"
 #gccjit = { git = "https://github.com/rust-lang/gccjit.rs" }
 
 # Local copy.
diff --git a/src/abi.rs b/src/abi.rs
index 14fc23593f0e..35e9b356741e 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -9,6 +9,8 @@ use rustc_middle::ty::layout::LayoutOf;
 #[cfg(feature = "master")]
 use rustc_session::config;
 use rustc_target::abi::call::{ArgAttributes, CastTarget, FnAbi, PassMode, Reg, RegKind};
+#[cfg(feature = "master")]
+use rustc_target::callconv::Conv;
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
@@ -104,6 +106,8 @@ pub trait FnAbiGccExt<'gcc, 'tcx> {
     // TODO(antoyo): return a function pointer type instead?
     fn gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> FnAbiGcc<'gcc>;
     fn ptr_to_gcc_type(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc>;
+    #[cfg(feature = "master")]
+    fn gcc_cconv(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Option<FnAttribute<'gcc>>;
 }
 
 impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
@@ -226,4 +230,46 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
         );
         pointer_type
     }
+
+    #[cfg(feature = "master")]
+    fn gcc_cconv(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Option<FnAttribute<'gcc>> {
+        conv_to_fn_attribute(self.conv, &cx.tcx.sess.target.arch)
+    }
+}
+
+#[cfg(feature = "master")]
+pub fn conv_to_fn_attribute<'gcc>(conv: Conv, _arch: &str) -> Option<FnAttribute<'gcc>> {
+    // TODO: handle the calling conventions returning None.
+    let attribute = match conv {
+        Conv::C
+        | Conv::Rust
+        | Conv::CCmseNonSecureCall
+        | Conv::CCmseNonSecureEntry
+        | Conv::RiscvInterrupt { .. } => return None,
+        Conv::Cold => return None,
+        Conv::PreserveMost => return None,
+        Conv::PreserveAll => return None,
+        /*Conv::GpuKernel => {
+            if arch == "amdgpu" {
+                return None
+            } else if arch == "nvptx64" {
+                return None
+            } else {
+                panic!("Architecture {arch} does not support GpuKernel calling convention");
+            }
+        }*/
+        Conv::AvrInterrupt => return None,
+        Conv::AvrNonBlockingInterrupt => return None,
+        Conv::ArmAapcs => return None,
+        Conv::Msp430Intr => return None,
+        Conv::PtxKernel => return None,
+        Conv::X86Fastcall => return None,
+        Conv::X86Intr => return None,
+        Conv::X86Stdcall => return None,
+        Conv::X86ThisCall => return None,
+        Conv::X86VectorCall => return None,
+        Conv::X86_64SysV => FnAttribute::SysvAbi,
+        Conv::X86_64Win64 => FnAttribute::MsAbi,
+    };
+    Some(attribute)
 }
diff --git a/src/context.rs b/src/context.rs
index 2a33beef63b9..38d012c8ca6d 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -23,6 +23,8 @@ use rustc_target::spec::{
     HasTargetSpec, HasWasmCAbiOpt, HasX86AbiOpt, Target, TlsModel, WasmCAbi, X86Abi,
 };
 
+#[cfg(feature = "master")]
+use crate::abi::conv_to_fn_attribute;
 use crate::callee::get_fn;
 use crate::common::SignType;
 
@@ -509,7 +511,11 @@ impl<'gcc, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     fn declare_c_main(&self, fn_type: Self::Type) -> Option<Self::Function> {
         let entry_name = self.sess().target.entry_name.as_ref();
         if !self.functions.borrow().contains_key(entry_name) {
-            Some(self.declare_entry_fn(entry_name, fn_type, ()))
+            #[cfg(feature = "master")]
+            let conv = conv_to_fn_attribute(self.sess().target.entry_abi, &self.sess().target.arch);
+            #[cfg(not(feature = "master"))]
+            let conv = None;
+            Some(self.declare_entry_fn(entry_name, fn_type, conv))
         } else {
             // If the symbol already exists, it is an error: for example, the user wrote
             // #[no_mangle] extern "C" fn main(..) {..}
diff --git a/src/declare.rs b/src/declare.rs
index 442488b7fd65..d4a4d7f4b82f 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -58,7 +58,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         variadic: bool,
     ) -> Function<'gcc> {
         self.linkage.set(FunctionType::Extern);
-        declare_raw_fn(self, name, () /*llvm::CCallConv*/, return_type, params, variadic)
+        declare_raw_fn(self, name, None, return_type, params, variadic)
     }
 
     pub fn declare_global(
@@ -92,7 +92,8 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         &self,
         name: &str,
         _fn_type: Type<'gcc>,
-        callconv: (), /*llvm::CCallConv*/
+        #[cfg(feature = "master")] callconv: Option<FnAttribute<'gcc>>,
+        #[cfg(not(feature = "master"))] callconv: Option<()>,
     ) -> RValue<'gcc> {
         // TODO(antoyo): use the fn_type parameter.
         let const_string = self.context.new_type::<u8>().make_pointer().make_pointer();
@@ -123,14 +124,11 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             #[cfg(feature = "master")]
             fn_attributes,
         } = fn_abi.gcc_type(self);
-        let func = declare_raw_fn(
-            self,
-            name,
-            (), /*fn_abi.llvm_cconv()*/
-            return_type,
-            &arguments_type,
-            is_c_variadic,
-        );
+        #[cfg(feature = "master")]
+        let conv = fn_abi.gcc_cconv(self);
+        #[cfg(not(feature = "master"))]
+        let conv = None;
+        let func = declare_raw_fn(self, name, conv, return_type, &arguments_type, is_c_variadic);
         self.on_stack_function_params.borrow_mut().insert(func, on_stack_param_indices);
         #[cfg(feature = "master")]
         for fn_attr in fn_attributes {
@@ -162,7 +160,8 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 fn declare_raw_fn<'gcc>(
     cx: &CodegenCx<'gcc, '_>,
     name: &str,
-    _callconv: (), /*llvm::CallConv*/
+    #[cfg(feature = "master")] callconv: Option<FnAttribute<'gcc>>,
+    #[cfg(not(feature = "master"))] _callconv: Option<()>,
     return_type: Type<'gcc>,
     param_types: &[Type<'gcc>],
     variadic: bool,
@@ -192,6 +191,10 @@ fn declare_raw_fn<'gcc>(
         let name = &mangle_name(name);
         let func =
             cx.context.new_function(None, cx.linkage.get(), return_type, &params, name, variadic);
+        #[cfg(feature = "master")]
+        if let Some(attribute) = callconv {
+            func.add_attribute(attribute);
+        }
         cx.functions.borrow_mut().insert(name.to_string(), func);
 
         #[cfg(feature = "master")]
diff --git a/src/lib.rs b/src/lib.rs
index f6ad0c79de54..68e0bc061add 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -187,10 +187,10 @@ impl CodegenBackend for GccCodegenBackend {
         crate::DEFAULT_LOCALE_RESOURCE
     }
 
-    fn init(&self, sess: &Session) {
+    fn init(&self, _sess: &Session) {
         #[cfg(feature = "master")]
         {
-            let target_cpu = target_cpu(sess);
+            let target_cpu = target_cpu(_sess);
 
             // Get the second TargetInfo with the correct CPU features by setting the arch.
             let context = Context::default();

From 3ecc012f6f59419fbdfddd9bac3a4b21d2275078 Mon Sep 17 00:00:00 2001
From: Folkert de Vries <folkert@folkertdev.nl>
Date: Wed, 12 Feb 2025 22:05:29 +0100
Subject: [PATCH 829/997] fix clobbered or lateout registers overlapping with
 input registers

---
 libgccjit.version          |  2 +-
 src/asm.rs                 | 72 +++++++++++++++++++++++++-------------
 tests/failing-ui-tests.txt |  1 -
 tests/run/asm.rs           | 31 ++++++++++++++++
 4 files changed, 79 insertions(+), 27 deletions(-)

diff --git a/libgccjit.version b/libgccjit.version
index 417fd5b03935..dfdc222c00fc 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-e607be166673a8de9fc07f6f02c60426e556c5f2
+d6f5a708104a98199ac0f01a3b6b279a0f7c66d3
diff --git a/src/asm.rs b/src/asm.rs
index 415f8affab90..9f4b84d22c08 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -36,7 +36,8 @@ use crate::type_of::LayoutGccExt;
 //
 // 3. Clobbers. GCC has a separate list of clobbers, and clobbers don't have indexes.
 //    Contrary, Rust expresses clobbers through "out" operands that aren't tied to
-//    a variable (`_`),  and such "clobbers" do have index.
+//    a variable (`_`),  and such "clobbers" do have index. Input operands cannot also
+//    be clobbered.
 //
 // 4. Furthermore, GCC Extended Asm does not support explicit register constraints
 //    (like `out("eax")`) directly, offering so-called "local register variables"
@@ -161,6 +162,16 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         // Also, we don't emit any asm operands immediately; we save them to
         // the one of the buffers to be emitted later.
 
+        let mut input_registers = vec![];
+
+        for op in rust_operands {
+            if let InlineAsmOperandRef::In { reg, .. } = *op {
+                if let ConstraintOrRegister::Register(reg_name) = reg_to_gcc(reg) {
+                    input_registers.push(reg_name);
+                }
+            }
+        }
+
         // 1. Normal variables (and saving operands to buffers).
         for (rust_idx, op) in rust_operands.iter().enumerate() {
             match *op {
@@ -183,25 +194,39 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                             continue;
                         }
                         (Register(reg_name), None) => {
-                            // `clobber_abi` can add lots of clobbers that are not supported by the target,
-                            // such as AVX-512 registers, so we just ignore unsupported registers
-                            let is_target_supported =
-                                reg.reg_class().supported_types(asm_arch, true).iter().any(
-                                    |&(_, feature)| {
-                                        if let Some(feature) = feature {
-                                            self.tcx
-                                                .asm_target_features(instance.def_id())
-                                                .contains(&feature)
-                                        } else {
-                                            true // Register class is unconditionally supported
-                                        }
-                                    },
-                                );
+                            if input_registers.contains(&reg_name) {
+                                // the `clobber_abi` operand is converted into a series of
+                                // `lateout("reg") _` operands. Of course, a user could also
+                                // explicitly define such an output operand.
+                                //
+                                // GCC does not allow input registers to be clobbered, so if this out register
+                                // is also used as an in register, do not add it to the clobbers list.
+                                // it will be treated as a lateout register with `out_place: None`
+                                if !late {
+                                    bug!("input registers can only be used as lateout regisers");
+                                }
+                                ("r", dummy_output_type(self.cx, reg.reg_class()))
+                            } else {
+                                // `clobber_abi` can add lots of clobbers that are not supported by the target,
+                                // such as AVX-512 registers, so we just ignore unsupported registers
+                                let is_target_supported =
+                                    reg.reg_class().supported_types(asm_arch, true).iter().any(
+                                        |&(_, feature)| {
+                                            if let Some(feature) = feature {
+                                                self.tcx
+                                                    .asm_target_features(instance.def_id())
+                                                    .contains(&feature)
+                                            } else {
+                                                true // Register class is unconditionally supported
+                                            }
+                                        },
+                                    );
 
-                            if is_target_supported && !clobbers.contains(&reg_name) {
-                                clobbers.push(reg_name);
+                                if is_target_supported && !clobbers.contains(&reg_name) {
+                                    clobbers.push(reg_name);
+                                }
+                                continue;
                             }
-                            continue;
                         }
                     };
 
@@ -230,13 +255,10 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                 }
 
                 InlineAsmOperandRef::InOut { reg, late, in_value, out_place } => {
-                    let constraint =
-                        if let ConstraintOrRegister::Constraint(constraint) = reg_to_gcc(reg) {
-                            constraint
-                        } else {
-                            // left for the next pass
-                            continue;
-                        };
+                    let ConstraintOrRegister::Constraint(constraint) = reg_to_gcc(reg) else {
+                        // left for the next pass
+                        continue;
+                    };
 
                     // Rustc frontend guarantees that input and output types are "compatible",
                     // so we can just use input var's type for the output variable.
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 579ac3749e95..0babc748f98b 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -1,7 +1,6 @@
 tests/ui/allocator/no_std-alloc-error-handler-custom.rs
 tests/ui/allocator/no_std-alloc-error-handler-default.rs
 tests/ui/asm/may_unwind.rs
-tests/ui/asm/x86_64/multiple-clobber-abi.rs
 tests/ui/functions-closures/parallel-codegen-closures.rs
 tests/ui/linkage-attr/linkage1.rs
 tests/ui/lto/dylib-works.rs
diff --git a/tests/run/asm.rs b/tests/run/asm.rs
index 4e05d026868e..9ede19a061f3 100644
--- a/tests/run/asm.rs
+++ b/tests/run/asm.rs
@@ -174,6 +174,37 @@ fn asm() {
         mem_cpy(array2.as_mut_ptr(), array1.as_ptr(), 3);
     }
     assert_eq!(array1, array2);
+
+    // in and clobber registers cannot overlap. This tests that the lateout register without an
+    // output place (indicated by the `_`) is not added to the list of clobbered registers
+    let x = 8;
+    let y: i32;
+    unsafe {
+        asm!(
+            "mov rax, rdi",
+            in("rdi") x,
+            lateout("rdi") _,
+            out("rax") y,
+        );
+    }
+    assert_eq!((x, y), (8, 8));
+
+    // sysv64 is the default calling convention on unix systems. The rdi register is
+    // used to pass arguments in the sysv64 calling convention, so this register will be clobbered
+    #[cfg(unix)]
+    {
+        let x = 16;
+        let y: i32;
+        unsafe {
+            asm!(
+                "mov rax, rdi",
+                in("rdi") x,
+                out("rax") y,
+                clobber_abi("sysv64"),
+            );
+        }
+        assert_eq!((x, y), (16, 16));
+    }
 }
 
 #[cfg(not(target_arch = "x86_64"))]

From 53aa977e4bd4f5d79303061c1a6b6dbeb8cbf51c Mon Sep 17 00:00:00 2001
From: Folkert de Vries <folkert@folkertdev.nl>
Date: Thu, 13 Feb 2025 19:44:42 +0100
Subject: [PATCH 830/997] refactor and support reg_byte registers

---
 src/asm.rs       | 213 +++++++++++++++++++++++++----------------------
 tests/run/asm.rs |  22 +++++
 2 files changed, 135 insertions(+), 100 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index 9f4b84d22c08..dbdf37ee6c9e 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -611,114 +611,127 @@ fn estimate_template_length(
 }
 
 /// Converts a register class to a GCC constraint code.
-fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
-    let constraint = match reg {
-        // For vector registers LLVM wants the register name to match the type size.
+fn reg_to_gcc(reg_or_reg_class: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
+    match reg_or_reg_class {
         InlineAsmRegOrRegClass::Reg(reg) => {
-            match reg {
-                InlineAsmReg::X86(_) => {
-                    // TODO(antoyo): add support for vector register.
-                    //
-                    // // For explicit registers, we have to create a register variable: https://stackoverflow.com/a/31774784/389119
-                    return ConstraintOrRegister::Register(match reg.name() {
-                        // Some of registers' names does not map 1-1 from rust to gcc
-                        "st(0)" => "st",
+            ConstraintOrRegister::Register(explicit_reg_to_gcc(reg))
+        }
+        InlineAsmRegOrRegClass::RegClass(reg_class) => {
+            ConstraintOrRegister::Constraint(reg_class_to_gcc(reg_class))
+        }
+    }
+}
 
-                        name => name,
-                    });
+fn explicit_reg_to_gcc(reg: InlineAsmReg) -> &'static str {
+    // For explicit registers, we have to create a register variable: https://stackoverflow.com/a/31774784/389119
+    match reg {
+        InlineAsmReg::X86(reg) => {
+            // TODO(antoyo): add support for vector register.
+            match reg.reg_class() {
+                X86InlineAsmRegClass::reg_byte => {
+                    // GCC does not support the `b` suffix, so we just strip it
+                    // see https://github.com/rust-lang/rustc_codegen_gcc/issues/485
+                    reg.name().trim_end_matches('b')
                 }
+                _ => match reg.name() {
+                    // Some of registers' names does not map 1-1 from rust to gcc
+                    "st(0)" => "st",
 
-                _ => unimplemented!(),
+                    name => name,
+                },
             }
         }
-        // They can be retrieved from https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html
-        InlineAsmRegOrRegClass::RegClass(reg) => match reg {
-            InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg) => "w",
-            InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => "x",
-            InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
-                unreachable!("clobber-only")
-            }
-            InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
-            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low16)
-            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low8)
-            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16)
-            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low8)
-            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4)
-            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
-            | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg) => "t",
-            InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_upper) => "d",
-            InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair) => "r",
-            InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw) => "w",
-            InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => "e",
-            InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w",
-            InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::preg) => {
-                unreachable!("clobber-only")
-            }
-            InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => "f",
-            InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => "a",
-            InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => "d",
-            InlineAsmRegClass::CSKY(CSKYInlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::CSKY(CSKYInlineAsmRegClass::freg) => "f",
-            InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => "d", // more specific than "r"
-            InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => "f",
-            InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r",
-            // https://github.com/gcc-mirror/gcc/blob/master/gcc/config/nvptx/nvptx.md -> look for
-            // "define_constraint".
-            InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => "h",
-            InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => "r",
-            InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => "l",
 
-            InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => "b",
-            InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => "f",
-            InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::vreg) => "v",
-            InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
-            | InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
-                unreachable!("clobber-only")
-            }
-            InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => "f",
-            InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
-                unreachable!("clobber-only")
-            }
-            InlineAsmRegClass::X86(X86InlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => "Q",
-            InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_byte) => "q",
-            InlineAsmRegClass::X86(X86InlineAsmRegClass::xmm_reg)
-            | InlineAsmRegClass::X86(X86InlineAsmRegClass::ymm_reg) => "x",
-            InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => "v",
-            InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => "Yk",
-            InlineAsmRegClass::X86(
-                X86InlineAsmRegClass::kreg0
-                | X86InlineAsmRegClass::x87_reg
-                | X86InlineAsmRegClass::mmx_reg
-                | X86InlineAsmRegClass::tmm_reg,
-            ) => unreachable!("clobber-only"),
-            InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
-                bug!("GCC backend does not support SPIR-V")
-            }
-            InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
-            InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg_addr) => "a",
-            InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
-            InlineAsmRegClass::S390x(S390xInlineAsmRegClass::vreg) => "v",
-            InlineAsmRegClass::S390x(S390xInlineAsmRegClass::areg) => {
-                unreachable!("clobber-only")
-            }
-            InlineAsmRegClass::Sparc(SparcInlineAsmRegClass::reg) => "r",
-            InlineAsmRegClass::Sparc(SparcInlineAsmRegClass::yreg) => unreachable!("clobber-only"),
-            InlineAsmRegClass::Err => unreachable!(),
-        },
-    };
+        _ => unimplemented!(),
+    }
+}
 
-    ConstraintOrRegister::Constraint(constraint)
+/// They can be retrieved from https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html
+fn reg_class_to_gcc(reg_class: InlineAsmRegClass) -> &'static str {
+    match reg_class {
+        InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg) => "w",
+        InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => "x",
+        InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
+            unreachable!("clobber-only")
+        }
+        InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
+        | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low16)
+        | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low8)
+        | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16)
+        | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low8)
+        | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4)
+        | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
+        | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg) => "t",
+        InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_upper) => "d",
+        InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair) => "r",
+        InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw) => "w",
+        InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => "e",
+        InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w",
+        InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::preg) => {
+            unreachable!("clobber-only")
+        }
+        InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => "f",
+        InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => "a",
+        InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => "d",
+        InlineAsmRegClass::CSKY(CSKYInlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::CSKY(CSKYInlineAsmRegClass::freg) => "f",
+        InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => "d", // more specific than "r"
+        InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => "f",
+        InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r",
+        // https://github.com/gcc-mirror/gcc/blob/master/gcc/config/nvptx/nvptx.md -> look for
+        // "define_constraint".
+        InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => "h",
+        InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => "r",
+        InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => "l",
+
+        InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => "b",
+        InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => "f",
+        InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::vreg) => "v",
+        InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
+        | InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
+            unreachable!("clobber-only")
+        }
+        InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => "f",
+        InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
+            unreachable!("clobber-only")
+        }
+        InlineAsmRegClass::X86(X86InlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => "Q",
+        InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_byte) => "q",
+        InlineAsmRegClass::X86(X86InlineAsmRegClass::xmm_reg)
+        | InlineAsmRegClass::X86(X86InlineAsmRegClass::ymm_reg) => "x",
+        InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => "v",
+        InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => "Yk",
+        InlineAsmRegClass::X86(
+            X86InlineAsmRegClass::kreg0
+            | X86InlineAsmRegClass::x87_reg
+            | X86InlineAsmRegClass::mmx_reg
+            | X86InlineAsmRegClass::tmm_reg,
+        ) => unreachable!("clobber-only"),
+        InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
+            bug!("GCC backend does not support SPIR-V")
+        }
+        InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
+        InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg_addr) => "a",
+        InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
+        InlineAsmRegClass::S390x(S390xInlineAsmRegClass::vreg) => "v",
+        InlineAsmRegClass::S390x(S390xInlineAsmRegClass::areg) => {
+            unreachable!("clobber-only")
+        }
+        InlineAsmRegClass::Sparc(SparcInlineAsmRegClass::reg) => "r",
+        InlineAsmRegClass::Sparc(SparcInlineAsmRegClass::yreg) => unreachable!("clobber-only"),
+        InlineAsmRegClass::Err => unreachable!(),
+    }
 }
 
 /// Type to use for outputs that are discarded. It doesn't really matter what
diff --git a/tests/run/asm.rs b/tests/run/asm.rs
index 9ede19a061f3..2dbf43be664d 100644
--- a/tests/run/asm.rs
+++ b/tests/run/asm.rs
@@ -205,6 +205,28 @@ fn asm() {
         }
         assert_eq!((x, y), (16, 16));
     }
+
+    // the `b` suffix for registers in the `reg_byte` register class is not supported in GCC
+    // and needs to be stripped in order to use these registers.
+    unsafe {
+        core::arch::asm!(
+            "",
+            out("al") _,
+            out("bl") _,
+            out("cl") _,
+            out("dl") _,
+            out("sil") _,
+            out("dil") _,
+            out("r8b") _,
+            out("r9b") _,
+            out("r10b") _,
+            out("r11b") _,
+            out("r12b") _,
+            out("r13b") _,
+            out("r14b") _,
+            out("r15b") _,
+        );
+    }
 }
 
 #[cfg(not(target_arch = "x86_64"))]

From 572da5cd261381451669d7d35c199e2227f9e6db Mon Sep 17 00:00:00 2001
From: Madhav Madhusoodanan <f20200049@pilani.bits-pilani.ac.in>
Date: Sat, 8 Mar 2025 16:47:58 +0530
Subject: [PATCH 831/997] cleaned up tests by bringing objects under
 `mini_core` into scope

---
 example/mini_core.rs      | 109 +++++++++---------
 tests/run/abort1.rs       |  41 +------
 tests/run/abort2.rs       |  41 +------
 tests/run/array.rs        |  10 +-
 tests/run/assign.rs       | 127 +--------------------
 tests/run/closure.rs      |  39 ++-----
 tests/run/condition.rs    |  26 ++---
 tests/run/empty_main.rs   |  30 +----
 tests/run/exit.rs         |  37 +------
 tests/run/exit_code.rs    |  30 +----
 tests/run/float.rs        |   4 -
 tests/run/fun_ptr.rs      |   9 +-
 tests/run/int.rs          |   4 -
 tests/run/mut_ref.rs      | 131 +---------------------
 tests/run/operations.rs   | 225 +-------------------------------------
 tests/run/ptr_cast.rs     |   9 +-
 tests/run/return-tuple.rs |  47 +-------
 tests/run/slice.rs        |  13 +--
 tests/run/static.rs       |  78 +------------
 tests/run/structs.rs      |  45 +-------
 tests/run/tuple.rs        |  37 +------
 21 files changed, 124 insertions(+), 968 deletions(-)

diff --git a/example/mini_core.rs b/example/mini_core.rs
index bd7a4612a92c..8d749c7a8f17 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -51,6 +51,10 @@ impl<T: ?Sized> LegacyReceiver for &T {}
 impl<T: ?Sized> LegacyReceiver for &mut T {}
 impl<T: ?Sized, A: Allocator> LegacyReceiver for Box<T, A> {}
 
+#[lang = "receiver"]
+trait Receiver {
+}
+
 #[lang = "copy"]
 pub trait Copy {}
 
@@ -139,6 +143,14 @@ impl Mul for usize {
     }
 }
 
+impl Mul for isize {
+    type Output = Self;
+
+    fn mul(self, rhs: Self) -> Self::Output {
+        self * rhs
+    }
+}
+
 #[lang = "add"]
 pub trait Add<RHS = Self> {
     type Output;
@@ -162,6 +174,14 @@ impl Add for i8 {
     }
 }
 
+impl Add for i32 {
+    type Output = Self;
+
+    fn add(self, rhs: Self) -> Self {
+        self + rhs
+    }
+}
+
 impl Add for usize {
     type Output = Self;
 
@@ -193,6 +213,14 @@ impl Sub for usize {
     }
 }
 
+impl Sub for isize {
+    type Output = Self;
+
+    fn sub(self, rhs: Self) -> Self {
+        self - rhs
+    }
+}
+
 impl Sub for u8 {
     type Output = Self;
 
@@ -588,70 +616,43 @@ pub union MaybeUninit<T> {
 
 pub mod intrinsics {
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
+    pub fn abort() -> !;
+
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn size_of<T>() -> usize {
-        loop {}
-    }
+    pub fn size_of<T>() -> usize;
+
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub unsafe fn size_of_val<T: ?::Sized>(_val: *const T) -> usize {
-        loop {}
-    }
+    pub unsafe fn size_of_val<T: ?::Sized>(_val: *const T) -> usize;
+
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn min_align_of<T>() -> usize {
-        loop {}
-    }
+    pub fn min_align_of<T>() -> usize;
+
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub unsafe fn min_align_of_val<T: ?::Sized>(_val: *const T) -> usize {
-        loop {}
-    }
+    pub unsafe fn min_align_of_val<T: ?::Sized>(_val: *const T) -> usize;
+
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub unsafe fn copy<T>(_src: *const T, _dst: *mut T, _count: usize) {
-        loop {}
-    }
+    pub unsafe fn copy<T>(_src: *const T, _dst: *mut T, _count: usize);
+
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub unsafe fn transmute<T, U>(_e: T) -> U {
-        loop {}
-    }
+    pub unsafe fn transmute<T, U>(_e: T) -> U;
+
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub unsafe fn ctlz_nonzero<T>(_x: T) -> u32 {
-        loop {}
-    }
+    pub unsafe fn ctlz_nonzero<T>(_x: T) -> u32;
+
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn needs_drop<T: ?::Sized>() -> bool {
-        loop {}
-    }
+    pub fn needs_drop<T: ?::Sized>() -> bool;
+
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn bitreverse<T>(_x: T) -> T {
-        loop {}
-    }
+    pub fn bitreverse<T>(_x: T) -> T;
+
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn bswap<T>(_x: T) -> T {
-        loop {}
-    }
+    pub fn bswap<T>(_x: T) -> T;
+
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub unsafe fn write_bytes<T>(_dst: *mut T, _val: u8, _count: usize) {
-        loop {}
-    }
+    pub unsafe fn write_bytes<T>(_dst: *mut T, _val: u8, _count: usize);
+
     #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub unsafe fn unreachable() -> ! {
-        loop {}
-    }
+    pub unsafe fn unreachable() -> !;
 }
 
 pub mod libc {
@@ -664,6 +665,10 @@ pub mod libc {
         pub fn memcpy(dst: *mut u8, src: *const u8, size: usize);
         pub fn memmove(dst: *mut u8, src: *const u8, size: usize);
         pub fn strncpy(dst: *mut u8, src: *const u8, size: usize);
+        pub fn fflush(stream: *mut i32) -> i32;
+        pub fn exit(status: i32);
+
+        pub static stdout: *mut i32;
     }
 }
 
diff --git a/tests/run/abort1.rs b/tests/run/abort1.rs
index 696197d73772..6561aaf25f6e 100644
--- a/tests/run/abort1.rs
+++ b/tests/run/abort1.rs
@@ -3,47 +3,12 @@
 // Run-time:
 //   status: signal
 
-#![feature(auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
-#![allow(internal_features)]
-
+#![feature(no_core, start)]
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-
-#[lang = "receiver"]
-trait Receiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-mod intrinsics {
-    use super::Sized;
-
-    #[rustc_nounwind]
-    #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
-}
-
-/*
- * Code
- */
+extern crate mini_core;
+use mini_core::*;
 
 fn test_fail() -> ! {
     unsafe { intrinsics::abort() };
diff --git a/tests/run/abort2.rs b/tests/run/abort2.rs
index 714cd6c0f381..a9f176577fc7 100644
--- a/tests/run/abort2.rs
+++ b/tests/run/abort2.rs
@@ -3,47 +3,12 @@
 // Run-time:
 //   status: signal
 
-#![feature(auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
-#![allow(internal_features)]
-
+#![feature(no_core, start)]
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-
-#[lang = "receiver"]
-trait Receiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-mod intrinsics {
-    use super::Sized;
-
-    #[rustc_nounwind]
-    #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
-}
-
-/*
- * Code
- */
+extern crate mini_core;
+use mini_core::*;
 
 fn fail() -> i32 {
     unsafe { intrinsics::abort() };
diff --git a/tests/run/array.rs b/tests/run/array.rs
index c3c08c29c6db..b405102baff6 100644
--- a/tests/run/array.rs
+++ b/tests/run/array.rs
@@ -8,19 +8,11 @@
 //     10
 
 #![feature(no_core, start)]
-
 #![no_std]
 #![no_core]
 
 extern crate mini_core;
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn printf(format: *const i8, ...) -> i32;
-        pub fn puts(s: *const u8) -> i32;
-    }
-}
+use mini_core::*;
 
 static mut ONE: usize = 1;
 
diff --git a/tests/run/assign.rs b/tests/run/assign.rs
index 2a47f0c2966e..99a61337ada4 100644
--- a/tests/run/assign.rs
+++ b/tests/run/assign.rs
@@ -5,132 +5,12 @@
 //     7 8
 //     10
 
-#![allow(internal_features, unused_attributes)]
-#![feature(auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs, track_caller)]
-
+#![feature(no_core, start)]
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-impl Copy for *mut i32 {}
-impl Copy for usize {}
-impl Copy for u8 {}
-impl Copy for i8 {}
-impl Copy for i32 {}
-
-#[lang = "receiver"]
-trait Receiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-#[lang = "panic_location"]
-struct PanicLocation {
-    file: &'static str,
-    line: u32,
-    column: u32,
-}
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn puts(s: *const u8) -> i32;
-        pub fn fflush(stream: *mut i32) -> i32;
-        pub fn printf(format: *const i8, ...) -> i32;
-
-        pub static stdout: *mut i32;
-    }
-}
-
-mod intrinsics {
-    #[rustc_nounwind]
-    #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
-}
-
-#[lang = "panic"]
-#[track_caller]
-#[no_mangle]
-pub fn panic(_msg: &'static str) -> ! {
-    unsafe {
-        libc::puts("Panicking\0" as *const str as *const u8);
-        libc::fflush(libc::stdout);
-        intrinsics::abort();
-    }
-}
-
-#[lang = "add"]
-trait Add<RHS = Self> {
-    type Output;
-
-    fn add(self, rhs: RHS) -> Self::Output;
-}
-
-impl Add for u8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i32 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for usize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for isize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-#[track_caller]
-#[lang = "panic_const_add_overflow"]
-pub fn panic_const_add_overflow() -> ! {
-    panic("attempt to add with overflow");
-}
-
-/*
- * Code
- */
+extern crate mini_core;
+use mini_core::*;
 
 fn inc_ref(num: &mut isize) -> isize {
     *num = *num + 5;
@@ -141,7 +21,6 @@ fn inc(num: isize) -> isize {
     num + 1
 }
 
-
 #[start]
 fn main(mut argc: isize, _argv: *const *const u8) -> isize {
     argc = inc(argc);
diff --git a/tests/run/closure.rs b/tests/run/closure.rs
index 46c47bc54ed0..c8f06265c6b9 100644
--- a/tests/run/closure.rs
+++ b/tests/run/closure.rs
@@ -9,54 +9,37 @@
 //     Both args: 11
 
 #![feature(no_core, start)]
-
 #![no_std]
 #![no_core]
 
 extern crate mini_core;
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn printf(format: *const i8, ...) -> i32;
-    }
-}
+use mini_core::*;
 
 #[start]
 fn main(mut argc: isize, _argv: *const *const u8) -> isize {
     let string = "Arg: %d\n\0";
-    let mut closure = || {
-        unsafe {
-            libc::printf(string as *const str as *const i8, argc);
-        }
+    let mut closure = || unsafe {
+        libc::printf(string as *const str as *const i8, argc);
     };
     closure();
 
-    let mut closure = || {
-        unsafe {
-            libc::printf("Argument: %d\n\0" as *const str as *const i8, argc);
-        }
+    let mut closure = || unsafe {
+        libc::printf("Argument: %d\n\0" as *const str as *const i8, argc);
     };
     closure();
 
-    let mut closure = |string| {
-        unsafe {
-            libc::printf(string as *const str as *const i8, argc);
-        }
+    let mut closure = |string| unsafe {
+        libc::printf(string as *const str as *const i8, argc);
     };
     closure("String arg: %d\n\0");
 
-    let mut closure = |arg: isize| {
-        unsafe {
-            libc::printf("Int argument: %d\n\0" as *const str as *const i8, arg);
-        }
+    let mut closure = |arg: isize| unsafe {
+        libc::printf("Int argument: %d\n\0" as *const str as *const i8, arg);
     };
     closure(argc + 1);
 
-    let mut closure = |string, arg: isize| {
-        unsafe {
-            libc::printf(string as *const str as *const i8, arg);
-        }
+    let mut closure = |string, arg: isize| unsafe {
+        libc::printf(string as *const str as *const i8, arg);
     };
     closure("Both args: %d\n\0", argc + 10);
 
diff --git a/tests/run/condition.rs b/tests/run/condition.rs
index 039ef94eaa71..d3714587401a 100644
--- a/tests/run/condition.rs
+++ b/tests/run/condition.rs
@@ -6,18 +6,11 @@
 //     1
 
 #![feature(no_core, start)]
-
 #![no_std]
 #![no_core]
 
 extern crate mini_core;
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn printf(format: *const i8, ...) -> i32;
-    }
-}
+use mini_core::*;
 
 #[start]
 fn main(argc: isize, _argv: *const *const u8) -> isize {
@@ -26,15 +19,14 @@ fn main(argc: isize, _argv: *const *const u8) -> isize {
             libc::printf(b"true\n\0" as *const u8 as *const i8);
         }
 
-        let string =
-            match argc {
-                1 => b"1\n\0",
-                2 => b"2\n\0",
-                3 => b"3\n\0",
-                4 => b"4\n\0",
-                5 => b"5\n\0",
-                _ => b"_\n\0",
-            };
+        let string = match argc {
+            1 => b"1\n\0",
+            2 => b"2\n\0",
+            3 => b"3\n\0",
+            4 => b"4\n\0",
+            5 => b"5\n\0",
+            _ => b"_\n\0",
+        };
         libc::printf(string as *const u8 as *const i8);
     }
     0
diff --git a/tests/run/empty_main.rs b/tests/run/empty_main.rs
index e66a859ad698..c4a24e9b1854 100644
--- a/tests/run/empty_main.rs
+++ b/tests/run/empty_main.rs
@@ -3,36 +3,12 @@
 // Run-time:
 //   status: 0
 
-#![feature(auto_traits, lang_items, no_core, start)]
-#![allow(internal_features)]
-
+#![feature(no_core, start)]
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-
-#[lang = "receiver"]
-trait Receiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-/*
- * Code
- */
+extern crate mini_core;
+use mini_core::*;
 
 #[start]
 fn main(_argc: isize, _argv: *const *const u8) -> isize {
diff --git a/tests/run/exit.rs b/tests/run/exit.rs
index bf1cbeef3020..3d66d8fbdb21 100644
--- a/tests/run/exit.rs
+++ b/tests/run/exit.rs
@@ -3,43 +3,12 @@
 // Run-time:
 //   status: 2
 
-#![feature(auto_traits, lang_items, no_core, start, intrinsics)]
-#![allow(internal_features)]
-
+#![feature(no_core, start)]
 #![no_std]
 #![no_core]
 
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn exit(status: i32);
-    }
-}
-
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-
-#[lang = "receiver"]
-trait Receiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-/*
- * Code
- */
+extern crate mini_core;
+use mini_core::*;
 
 #[start]
 fn main(mut argc: isize, _argv: *const *const u8) -> isize {
diff --git a/tests/run/exit_code.rs b/tests/run/exit_code.rs
index be7a233efdaa..b18d08879f0d 100644
--- a/tests/run/exit_code.rs
+++ b/tests/run/exit_code.rs
@@ -3,36 +3,12 @@
 // Run-time:
 //   status: 1
 
-#![feature(auto_traits, lang_items, no_core, start)]
-#![allow(internal_features)]
-
+#![feature(no_core, start)]
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-
-#[lang = "receiver"]
-trait Receiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-/*
- * Code
- */
+extern crate mini_core;
+use mini_core::*;
 
 #[start]
 fn main(mut argc: isize, _argv: *const *const u8) -> isize {
diff --git a/tests/run/float.rs b/tests/run/float.rs
index e0a57e6fed1a..424fa1cf4ad5 100644
--- a/tests/run/float.rs
+++ b/tests/run/float.rs
@@ -5,10 +5,6 @@
 
 #![feature(const_black_box)]
 
-/*
- * Code
- */
-
 fn main() {
     use std::hint::black_box;
 
diff --git a/tests/run/fun_ptr.rs b/tests/run/fun_ptr.rs
index ed1bf72bb275..45b4ebcd9f05 100644
--- a/tests/run/fun_ptr.rs
+++ b/tests/run/fun_ptr.rs
@@ -5,18 +5,11 @@
 //   stdout: 1
 
 #![feature(no_core, start)]
-
 #![no_std]
 #![no_core]
 
 extern crate mini_core;
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn printf(format: *const i8, ...) -> i32;
-    }
-}
+use mini_core::*;
 
 fn i16_as_i8(a: i16) -> i8 {
     a as i8
diff --git a/tests/run/int.rs b/tests/run/int.rs
index bfe73c38435a..47b5dea46f8d 100644
--- a/tests/run/int.rs
+++ b/tests/run/int.rs
@@ -5,10 +5,6 @@
 
 #![feature(const_black_box)]
 
-/*
- * Code
- */
-
 fn main() {
     use std::hint::black_box;
 
diff --git a/tests/run/mut_ref.rs b/tests/run/mut_ref.rs
index 3ae793382164..5c91bc96ca00 100644
--- a/tests/run/mut_ref.rs
+++ b/tests/run/mut_ref.rs
@@ -1,4 +1,3 @@
-
 // Compiler:
 //
 // Run-time:
@@ -7,141 +6,19 @@
 //     6
 //     11
 
-#![allow(internal_features, unused_attributes)]
-#![feature(auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs, track_caller)]
-
+#![feature(no_core, start)]
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-impl Copy for *mut i32 {}
-impl Copy for usize {}
-impl Copy for u8 {}
-impl Copy for i8 {}
-impl Copy for i32 {}
-
-#[lang = "receiver"]
-trait Receiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-#[lang = "panic_location"]
-struct PanicLocation {
-    file: &'static str,
-    line: u32,
-    column: u32,
-}
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn puts(s: *const u8) -> i32;
-        pub fn fflush(stream: *mut i32) -> i32;
-        pub fn printf(format: *const i8, ...) -> i32;
-
-        pub static stdout: *mut i32;
-    }
-}
-
-mod intrinsics {
-    #[rustc_nounwind]
-    #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
-}
-
-#[lang = "panic"]
-#[track_caller]
-#[no_mangle]
-pub fn panic(_msg: &'static str) -> ! {
-    unsafe {
-        libc::puts("Panicking\0" as *const str as *const u8);
-        libc::fflush(libc::stdout);
-        intrinsics::abort();
-    }
-}
-
-#[lang = "add"]
-trait Add<RHS = Self> {
-    type Output;
-
-    fn add(self, rhs: RHS) -> Self::Output;
-}
-
-impl Add for u8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i32 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for usize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for isize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-#[track_caller]
-#[lang = "panic_const_add_overflow"]
-pub fn panic_const_add_overflow() -> ! {
-    panic("attempt to add with overflow");
-}
-
-/*
- * Code
- */
+extern crate mini_core;
+use mini_core::*;
 
 struct Test {
     field: isize,
 }
 
 fn test(num: isize) -> Test {
-    Test {
-        field: num + 1,
-    }
+    Test { field: num + 1 }
 }
 
 fn update_num(num: &mut isize) {
diff --git a/tests/run/operations.rs b/tests/run/operations.rs
index 0e44fc580b8c..a298cf2a68d5 100644
--- a/tests/run/operations.rs
+++ b/tests/run/operations.rs
@@ -5,231 +5,12 @@
 //     39
 //     10
 
-#![allow(internal_features, unused_attributes)]
-#![feature(auto_traits, lang_items, no_core, start, intrinsics, arbitrary_self_types, rustc_attrs)]
-
+#![feature(no_core, start)]
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-impl Copy for *mut i32 {}
-impl Copy for usize {}
-impl Copy for u8 {}
-impl Copy for i8 {}
-impl Copy for i16 {}
-impl Copy for i32 {}
-
-#[lang = "deref"]
-pub trait Deref {
-    type Target: ?Sized;
-
-    fn deref(&self) -> &Self::Target;
-}
-
-#[lang = "legacy_receiver"]
-trait LegacyReceiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-#[lang = "panic_location"]
-struct PanicLocation {
-    file: &'static str,
-    line: u32,
-    column: u32,
-}
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn printf(format: *const i8, ...) -> i32;
-        pub fn puts(s: *const u8) -> i32;
-        pub fn fflush(stream: *mut i32) -> i32;
-
-        pub static stdout: *mut i32;
-    }
-}
-
-mod intrinsics {
-    #[rustc_nounwind]
-    #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
-}
-
-#[lang = "panic"]
-#[track_caller]
-#[no_mangle]
-pub fn panic(_msg: &'static str) -> ! {
-    unsafe {
-        libc::puts("Panicking\0" as *const str as *const u8);
-        libc::fflush(libc::stdout);
-        intrinsics::abort();
-    }
-}
-
-#[lang = "add"]
-trait Add<RHS = Self> {
-    type Output;
-
-    fn add(self, rhs: RHS) -> Self::Output;
-}
-
-impl Add for u8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i8 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for i32 {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for usize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-impl Add for isize {
-    type Output = Self;
-
-    fn add(self, rhs: Self) -> Self {
-        self + rhs
-    }
-}
-
-#[lang = "sub"]
-pub trait Sub<RHS = Self> {
-    type Output;
-
-    fn sub(self, rhs: RHS) -> Self::Output;
-}
-
-impl Sub for usize {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for isize {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for u8 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for i8 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-impl Sub for i16 {
-    type Output = Self;
-
-    fn sub(self, rhs: Self) -> Self {
-        self - rhs
-    }
-}
-
-#[lang = "mul"]
-pub trait Mul<RHS = Self> {
-    type Output;
-
-    #[must_use]
-    fn mul(self, rhs: RHS) -> Self::Output;
-}
-
-impl Mul for u8 {
-    type Output = Self;
-
-    fn mul(self, rhs: Self) -> Self::Output {
-        self * rhs
-    }
-}
-
-impl Mul for usize {
-    type Output = Self;
-
-    fn mul(self, rhs: Self) -> Self::Output {
-        self * rhs
-    }
-}
-
-impl Mul for isize {
-    type Output = Self;
-
-    fn mul(self, rhs: Self) -> Self::Output {
-        self * rhs
-    }
-}
-
-#[track_caller]
-#[lang = "panic_const_add_overflow"]
-pub fn panic_const_add_overflow() -> ! {
-    panic("attempt to add with overflow");
-}
-
-#[track_caller]
-#[lang = "panic_const_sub_overflow"]
-pub fn panic_const_sub_overflow() -> ! {
-    panic("attempt to subtract with overflow");
-}
-
-#[track_caller]
-#[lang = "panic_const_mul_overflow"]
-pub fn panic_const_mul_overflow() -> ! {
-    panic("attempt to multiply with overflow");
-}
-
-/*
- * Code
- */
+extern crate mini_core;
+use mini_core::*;
 
 #[start]
 fn main(mut argc: isize, _argv: *const *const u8) -> isize {
diff --git a/tests/run/ptr_cast.rs b/tests/run/ptr_cast.rs
index 2b8812ad51c5..eb4cf3eafd0e 100644
--- a/tests/run/ptr_cast.rs
+++ b/tests/run/ptr_cast.rs
@@ -5,18 +5,11 @@
 //   stdout: 1
 
 #![feature(no_core, start)]
-
 #![no_std]
 #![no_core]
 
 extern crate mini_core;
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn printf(format: *const i8, ...) -> i32;
-    }
-}
+use mini_core::*;
 
 static mut ONE: usize = 1;
 
diff --git a/tests/run/return-tuple.rs b/tests/run/return-tuple.rs
index f2a5a2e4384d..c3069933e085 100644
--- a/tests/run/return-tuple.rs
+++ b/tests/run/return-tuple.rs
@@ -6,53 +6,12 @@
 //     10
 //     42
 
-#![feature(auto_traits, lang_items, no_core, start, intrinsics)]
-#![allow(internal_features)]
-
+#![feature(no_core, start)]
 #![no_std]
 #![no_core]
 
-#[lang = "copy"]
-pub unsafe trait Copy {}
-
-impl Copy for bool {}
-impl Copy for u8 {}
-impl Copy for u16 {}
-impl Copy for u32 {}
-impl Copy for u64 {}
-impl Copy for usize {}
-impl Copy for i8 {}
-impl Copy for i16 {}
-impl Copy for i32 {}
-impl Copy for isize {}
-impl Copy for f32 {}
-impl Copy for char {}
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn printf(format: *const i8, ...) -> i32;
-    }
-}
-
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "legacy_receiver"]
-trait LegacyReceiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-/*
- * Code
- */
+extern crate mini_core;
+use mini_core::*;
 
 fn int_cast(a: u16, b: i16) -> (u8, u16, u32, usize, i8, i16, i32, isize, u8, u32) {
     (
diff --git a/tests/run/slice.rs b/tests/run/slice.rs
index fba93fc15549..6f2f8b9a9cec 100644
--- a/tests/run/slice.rs
+++ b/tests/run/slice.rs
@@ -5,25 +5,16 @@
 //   stdout: 5
 
 #![feature(no_core, start)]
-
 #![no_std]
 #![no_core]
 
 extern crate mini_core;
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn printf(format: *const i8, ...) -> i32;
-    }
-}
+use mini_core::*;
 
 static mut TWO: usize = 2;
 
 fn index_slice(s: &[u32]) -> u32 {
-    unsafe {
-        s[TWO]
-    }
+    unsafe { s[TWO] }
 }
 
 #[start]
diff --git a/tests/run/static.rs b/tests/run/static.rs
index a17ea2a48936..5fc167ce4e47 100644
--- a/tests/run/static.rs
+++ b/tests/run/static.rs
@@ -9,72 +9,12 @@
 //      12
 //      1
 
-#![feature(auto_traits, lang_items, no_core, start, intrinsics, rustc_attrs)]
-#![allow(internal_features)]
-
+#![feature(no_core, start)]
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "destruct"]
-pub trait Destruct {}
-
-#[lang = "drop"]
-pub trait Drop {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-impl<T: ?Sized> Copy for *mut T {}
-
-#[lang = "receiver"]
-trait Receiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-mod intrinsics {
-    use super::Sized;
-
-    #[rustc_nounwind]
-    #[rustc_intrinsic]
-    #[rustc_intrinsic_must_be_overridden]
-    pub fn abort() -> ! {
-        loop {}
-    }
-}
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn printf(format: *const i8, ...) -> i32;
-    }
-}
-
-#[lang = "structural_peq"]
-pub trait StructuralPartialEq {}
-
-#[lang = "drop_in_place"]
-#[allow(unconditional_recursion)]
-pub unsafe fn drop_in_place<T: ?Sized>(to_drop: *mut T) {
-    // Code here does not matter - this is replaced by the
-    // real drop glue by the compiler.
-    drop_in_place(to_drop);
-}
-
-/*
- * Code
- */
+extern crate mini_core;
+use mini_core::*;
 
 struct Test {
     field: isize,
@@ -86,17 +26,11 @@ struct WithRef {
 
 static mut CONSTANT: isize = 10;
 
-static mut TEST: Test = Test {
-    field: 12,
-};
+static mut TEST: Test = Test { field: 12 };
 
-static mut TEST2: Test = Test {
-    field: 14,
-};
+static mut TEST2: Test = Test { field: 14 };
 
-static mut WITH_REF: WithRef = WithRef {
-    refe: unsafe { &TEST },
-};
+static mut WITH_REF: WithRef = WithRef { refe: unsafe { &TEST } };
 
 #[start]
 fn main(mut argc: isize, _argv: *const *const u8) -> isize {
diff --git a/tests/run/structs.rs b/tests/run/structs.rs
index d6455667400c..641c6c71d1e0 100644
--- a/tests/run/structs.rs
+++ b/tests/run/structs.rs
@@ -5,43 +5,12 @@
 //   stdout: 1
 //     2
 
-#![feature(auto_traits, lang_items, no_core, start, intrinsics)]
-#![allow(internal_features)]
-
+#![feature(no_core, start)]
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-
-#[lang = "receiver"]
-trait Receiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn printf(format: *const i8, ...) -> i32;
-    }
-}
-
-/*
- * Code
- */
+extern crate mini_core;
+use mini_core::*;
 
 struct Test {
     field: isize,
@@ -57,12 +26,8 @@ fn one() -> isize {
 
 #[start]
 fn main(mut argc: isize, _argv: *const *const u8) -> isize {
-    let test = Test {
-        field: one(),
-    };
-    let two = Two {
-        two: 2,
-    };
+    let test = Test { field: one() };
+    let two = Two { two: 2 };
     unsafe {
         libc::printf(b"%ld\n\0" as *const u8 as *const i8, test.field);
         libc::printf(b"%ld\n\0" as *const u8 as *const i8, two.two);
diff --git a/tests/run/tuple.rs b/tests/run/tuple.rs
index 8a7d85ae867e..1f2d24eeacc5 100644
--- a/tests/run/tuple.rs
+++ b/tests/run/tuple.rs
@@ -4,43 +4,12 @@
 //   status: 0
 //   stdout: 3
 
-#![feature(auto_traits, lang_items, no_core, start, intrinsics)]
-#![allow(internal_features)]
-
+#![feature(no_core, start)]
 #![no_std]
 #![no_core]
 
-/*
- * Core
- */
-
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {
-}
-
-impl Copy for isize {}
-
-#[lang = "receiver"]
-trait Receiver {
-}
-
-#[lang = "freeze"]
-pub(crate) unsafe auto trait Freeze {}
-
-mod libc {
-    #[link(name = "c")]
-    extern "C" {
-        pub fn printf(format: *const i8, ...) -> i32;
-    }
-}
-
-/*
- * Code
- */
+extern crate mini_core;
+use mini_core::*;
 
 #[start]
 fn main(mut argc: isize, _argv: *const *const u8) -> isize {

From c1d21003bb6d9f1f1bd3f0e5f6edc453c602dcad Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 17 Apr 2025 08:34:54 -0400
Subject: [PATCH 832/997] Update to nightly-2025-04-17

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index 940b3de9f745..fd898c59707b 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2025-01-12"
+channel = "nightly-2025-04-17"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From cc81c706e460c2d8a97a7006664136b62fd2c59e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 27 Mar 2025 09:22:28 -0400
Subject: [PATCH 833/997] Fix patches

---
 ...022-core-Disable-not-compiling-tests.patch | 44 -------------------
 ...0028-core-Disable-long-running-tests.patch | 26 +++++------
 2 files changed, 13 insertions(+), 57 deletions(-)
 delete mode 100644 patches/0022-core-Disable-not-compiling-tests.patch

diff --git a/patches/0022-core-Disable-not-compiling-tests.patch b/patches/0022-core-Disable-not-compiling-tests.patch
deleted file mode 100644
index 70e3e2ba7fee..000000000000
--- a/patches/0022-core-Disable-not-compiling-tests.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From af0e237f056fa838c77463381a19b0dc993c0a35 Mon Sep 17 00:00:00 2001
-From: None <none@example.com>
-Date: Sun, 1 Sep 2024 11:42:17 -0400
-Subject: [PATCH] Disable not compiling tests
-
----
- library/core/tests/Cargo.toml | 14 ++++++++++++++
- library/core/tests/lib.rs     |  1 +
- 2 files changed, 15 insertions(+)
- create mode 100644 library/core/tests/Cargo.toml
-
-diff --git a/library/core/tests/Cargo.toml b/library/core/tests/Cargo.toml
-new file mode 100644
-index 0000000..ca326ac
---- /dev/null
-+++ b/library/core/tests/Cargo.toml
-@@ -0,0 +1,14 @@
-+[workspace]
-+
-+[package]
-+name = "coretests"
-+version = "0.0.0"
-+edition = "2021"
-+
-+[lib]
-+name = "coretests"
-+path = "lib.rs"
-+
-+[dependencies]
-+rand = { version = "0.8.5", default-features = false }
-+rand_xorshift = { version = "0.3.0", default-features = false }
-diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
-index a4a7946..ecfe43f 100644
---- a/library/core/tests/lib.rs
-+++ b/library/core/tests/lib.rs
-@@ -1,4 +1,5 @@
- // tidy-alphabetical-start
-+#![cfg(test)]
- #![cfg_attr(target_has_atomic = "128", feature(integer_atomics))]
- #![cfg_attr(test, feature(cfg_match))]
- #![feature(alloc_layout_extra)]
--- 
-2.47.1
-
diff --git a/patches/0028-core-Disable-long-running-tests.patch b/patches/0028-core-Disable-long-running-tests.patch
index dc1beae6d2e7..20df4245cfdf 100644
--- a/patches/0028-core-Disable-long-running-tests.patch
+++ b/patches/0028-core-Disable-long-running-tests.patch
@@ -1,17 +1,17 @@
-From eb703e627e7a84f1cd8d0d87f0f69da1f0acf765 Mon Sep 17 00:00:00 2001
-From: bjorn3 <bjorn3@users.noreply.github.com>
-Date: Fri, 3 Dec 2021 12:16:30 +0100
+From ec2d0dc77fb484d926b45bb626b0db6a4bb0ab5c Mon Sep 17 00:00:00 2001
+From: None <none@example.com>
+Date: Thu, 27 Mar 2025 09:20:41 -0400
 Subject: [PATCH] Disable long running tests
 
 ---
- library/core/tests/slice.rs | 2 ++
+ library/coretests/tests/slice.rs | 2 ++
  1 file changed, 2 insertions(+)
 
-diff --git a/library/core/tests/slice.rs b/library/core/tests/slice.rs
-index 8402833..84592e0 100644
---- a/library/core/tests/slice.rs
-+++ b/library/core/tests/slice.rs
-@@ -2462,6 +2462,7 @@ take_tests! {
+diff --git a/library/coretests/tests/slice.rs b/library/coretests/tests/slice.rs
+index d17e681..fba5cd6 100644
+--- a/library/coretests/tests/slice.rs
++++ b/library/coretests/tests/slice.rs
+@@ -2486,6 +2486,7 @@ split_off_tests! {
  #[cfg(not(miri))] // unused in Miri
  const EMPTY_MAX: &'static [()] = &[(); usize::MAX];
  
@@ -19,14 +19,14 @@ index 8402833..84592e0 100644
  // can't be a constant due to const mutability rules
  #[cfg(not(miri))] // unused in Miri
  macro_rules! empty_max_mut {
-@@ -2485,6 +2486,7 @@ take_tests! {
-     (take_mut_oob_max_range_to_inclusive, (..=usize::MAX), None, empty_max_mut!()),
-     (take_mut_in_bounds_max_range_from, (usize::MAX..), Some(&mut [] as _), empty_max_mut!()),
+@@ -2509,6 +2510,7 @@ split_off_tests! {
+     (split_off_mut_oob_max_range_to_inclusive, (..=usize::MAX), None, empty_max_mut!()),
+     (split_off_mut_in_bounds_max_range_from, (usize::MAX..), Some(&mut [] as _), empty_max_mut!()),
  }
 +*/
  
  #[test]
  fn test_slice_from_ptr_range() {
 -- 
-2.26.2.7.g19db9cfb68
+2.49.0
 

From be75a58538154cbe901efea7807d7830d3d064c4 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 13 Apr 2025 07:48:56 -0400
Subject: [PATCH 834/997] Fix compilation

---
 src/abi.rs | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 1f522f64c9cf..3b0ab9f00426 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -9,7 +9,7 @@ use rustc_middle::ty::Ty;
 use rustc_middle::ty::layout::LayoutOf;
 #[cfg(feature = "master")]
 use rustc_session::config;
-use rustc_target::abi::call::{ArgAttributes, CastTarget, FnAbi, PassMode};
+use rustc_target::callconv::{ArgAttributes, CastTarget, FnAbi, PassMode};
 #[cfg(feature = "master")]
 use rustc_target::callconv::Conv;
 
@@ -239,7 +239,7 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
 }
 
 #[cfg(feature = "master")]
-pub fn conv_to_fn_attribute<'gcc>(conv: Conv, _arch: &str) -> Option<FnAttribute<'gcc>> {
+pub fn conv_to_fn_attribute<'gcc>(conv: Conv, arch: &str) -> Option<FnAttribute<'gcc>> {
     // TODO: handle the calling conventions returning None.
     let attribute = match conv {
         Conv::C
@@ -250,20 +250,19 @@ pub fn conv_to_fn_attribute<'gcc>(conv: Conv, _arch: &str) -> Option<FnAttribute
         Conv::Cold => return None,
         Conv::PreserveMost => return None,
         Conv::PreserveAll => return None,
-        /*Conv::GpuKernel => {
+        Conv::GpuKernel => {
             if arch == "amdgpu" {
                 return None
             } else if arch == "nvptx64" {
                 return None
             } else {
-                panic!("Architecture {arch} does not support GpuKernel calling convention");
+                panic!("Architecture {} does not support GpuKernel calling convention", arch);
             }
-        }*/
+        }
         Conv::AvrInterrupt => return None,
         Conv::AvrNonBlockingInterrupt => return None,
         Conv::ArmAapcs => return None,
         Conv::Msp430Intr => return None,
-        Conv::PtxKernel => return None,
         Conv::X86Fastcall => return None,
         Conv::X86Intr => return None,
         Conv::X86Stdcall => return None,

From 5c832e5ece3c55295bbc8c9f58962a2a57e75147 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 27 Mar 2025 14:28:56 -0400
Subject: [PATCH 835/997] Remove most of builtins hack since it's not necessary
 anymore

---
 src/context.rs | 28 +---------------------------
 1 file changed, 1 insertion(+), 27 deletions(-)

diff --git a/src/context.rs b/src/context.rs
index 964f1f265591..73718994e641 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -215,33 +215,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let bool_type = context.new_type::<bool>();
 
         let mut functions = FxHashMap::default();
-        let builtins = [
-            "__builtin_unreachable",
-            "abort",
-            "__builtin_expect", /*"__builtin_expect_with_probability",*/
-            "__builtin_constant_p",
-            "__builtin_add_overflow",
-            "__builtin_mul_overflow",
-            "__builtin_saddll_overflow",
-            /*"__builtin_sadd_overflow",*/
-            "__builtin_smulll_overflow", /*"__builtin_smul_overflow",*/
-            "__builtin_ssubll_overflow",
-            /*"__builtin_ssub_overflow",*/ "__builtin_sub_overflow",
-            "__builtin_uaddll_overflow",
-            "__builtin_uadd_overflow",
-            "__builtin_umulll_overflow",
-            "__builtin_umul_overflow",
-            "__builtin_usubll_overflow",
-            "__builtin_usub_overflow",
-            "__builtin_powif",
-            "__builtin_powi",
-            "fabsf",
-            "fabs",
-            "copysignf",
-            "copysign",
-            "nearbyintf",
-            "nearbyint",
-        ];
+        let builtins = ["abort"];
 
         for builtin in builtins.iter() {
             functions.insert(builtin.to_string(), context.get_builtin_function(builtin));

From e1fa74b4a9ed699d0abf3c98113b3cc11baa81d6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 27 Mar 2025 12:14:14 -0400
Subject: [PATCH 836/997] Implement copysignf128

---
 src/intrinsic/mod.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index f38622074f18..d22f4229e237 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -78,6 +78,7 @@ fn get_simple_intrinsic<'gcc, 'tcx>(
         sym::maxnumf64 => "fmax",
         sym::copysignf32 => "copysignf",
         sym::copysignf64 => "copysign",
+        sym::copysignf128 => "copysignl",
         sym::floorf32 => "floorf",
         sym::floorf64 => "floor",
         sym::ceilf32 => "ceilf",

From 9a453d46f42c40b91d004064a4cc12f7c28c7fc7 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 27 Mar 2025 14:33:03 -0400
Subject: [PATCH 837/997] Update other patches

---
 ...001-Disable-libstd-and-libtest-dylib.patch | 18 ++++++-----
 ...0001-core-Disable-portable-simd-test.patch | 32 ++++++++-----------
 2 files changed, 23 insertions(+), 27 deletions(-)

diff --git a/patches/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch b/patches/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch
index c220f53040f0..fa360fe9e74e 100644
--- a/patches/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch
+++ b/patches/cross_patches/0001-Disable-libstd-and-libtest-dylib.patch
@@ -1,19 +1,18 @@
-From 966beefe08be6045bfcca26079b76a7a80413080 Mon Sep 17 00:00:00 2001
+From b2911e732d1bf0e28872495c4c47af1dad3c7911 Mon Sep 17 00:00:00 2001
 From: None <none@example.com>
-Date: Thu, 28 Sep 2023 17:37:38 -0400
+Date: Thu, 27 Mar 2025 14:30:10 -0400
 Subject: [PATCH] Disable libstd and libtest dylib
 
 ---
- library/std/Cargo.toml  | 2 +-
- library/test/Cargo.toml | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
+ library/std/Cargo.toml | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/library/std/Cargo.toml b/library/std/Cargo.toml
-index 5b21355..cb0c49b 100644
+index 176da60..c183cdb 100644
 --- a/library/std/Cargo.toml
 +++ b/library/std/Cargo.toml
-@@ -9,7 +9,7 @@ description = "The Rust Standard Library"
- edition = "2021"
+@@ -10,7 +10,7 @@ edition = "2024"
+ autobenches = false
  
  [lib]
 -crate-type = ["dylib", "rlib"]
@@ -21,3 +20,6 @@ index 5b21355..cb0c49b 100644
  
  [dependencies]
  alloc = { path = "../alloc", public = true }
+-- 
+2.49.0
+
diff --git a/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch b/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
index 9ef5e0e4f467..9d5b2dc537d2 100644
--- a/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
+++ b/patches/libgccjit12/0001-core-Disable-portable-simd-test.patch
@@ -1,25 +1,17 @@
-From 124a11ce086952a5794d5cfbaa45175809497b81 Mon Sep 17 00:00:00 2001
+From 1a8f6b8e39f343959d4d2e6b6957a6d780ac3fc0 Mon Sep 17 00:00:00 2001
 From: None <none@example.com>
-Date: Sat, 18 Nov 2023 10:50:36 -0500
-Subject: [PATCH] [core] Disable portable-simd test
+Date: Thu, 27 Mar 2025 14:32:14 -0400
+Subject: [PATCH] Disable portable-simd test
 
 ---
- library/core/tests/lib.rs | 2 --
- 1 file changed, 2 deletions(-)
+ library/coretests/tests/lib.rs | 1 -
+ 1 file changed, 1 deletion(-)
 
-diff --git a/library/core/tests/lib.rs b/library/core/tests/lib.rs
-index b71786c..cf484d5 100644
---- a/library/core/tests/lib.rs
-+++ b/library/core/tests/lib.rs
-@@ -87,7 +87,6 @@
- #![feature(numfmt)]
- #![feature(pattern)]
- #![feature(pointer_is_aligned_to)]
--#![feature(portable_simd)]
- #![feature(ptr_metadata)]
- #![feature(slice_from_ptr_range)]
- #![feature(slice_internals)]
-@@ -155,7 +154,6 @@ mod pin;
+diff --git a/library/coretests/tests/lib.rs b/library/coretests/tests/lib.rs
+index 79022fe..9223b2f 100644
+--- a/library/coretests/tests/lib.rs
++++ b/library/coretests/tests/lib.rs
+@@ -165,7 +165,6 @@ mod pin;
  mod pin_macro;
  mod ptr;
  mod result;
@@ -27,4 +19,6 @@ index b71786c..cf484d5 100644
  mod slice;
  mod str;
  mod str_lossy;
--- 2.45.2
+-- 
+2.49.0
+

From f9822772e8781ed30a89aa4494e47c42b4397133 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 27 Mar 2025 14:33:38 -0400
Subject: [PATCH 838/997] Fix libcore tests

---
 build_system/src/test.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 297cd7d71316..df4ac85233b0 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -678,7 +678,7 @@ fn test_projects(env: &Env, args: &TestArg) -> Result<(), String> {
 fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[TEST] libcore");
-    let path = get_sysroot_dir().join("sysroot_src/library/core/tests");
+    let path = get_sysroot_dir().join("sysroot_src/library/coretests");
     let _ = remove_dir_all(path.join("target"));
     run_cargo_command(&[&"test"], Some(&path), env, args)?;
     Ok(())

From 5cf2bbc4e2c82961f2e82fbacc39fcf5f332e371 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 27 Mar 2025 14:34:44 -0400
Subject: [PATCH 839/997] Fix clippy warnings

---
 src/abi.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/abi.rs b/src/abi.rs
index 3b0ab9f00426..6fdb03fb85b5 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -251,6 +251,8 @@ pub fn conv_to_fn_attribute<'gcc>(conv: Conv, arch: &str) -> Option<FnAttribute<
         Conv::PreserveMost => return None,
         Conv::PreserveAll => return None,
         Conv::GpuKernel => {
+            // TODO(antoyo): remove clippy allow attribute when this is implemented.
+            #[allow(clippy::if_same_then_else)]
             if arch == "amdgpu" {
                 return None
             } else if arch == "nvptx64" {

From ecf0a1eea3714a9c9f79bf1f3a53e6feb6c631f5 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 13 Apr 2025 08:28:02 -0400
Subject: [PATCH 840/997] Update GCC version

---
 libgccjit.version | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libgccjit.version b/libgccjit.version
index dfdc222c00fc..125b04004b07 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-d6f5a708104a98199ac0f01a3b6b279a0f7c66d3
+0ea98a1365b81f7488073512c850e8ee951a4afd

From ec44cfdfb4a74d19f522984e2e2e226a3b76df9a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 27 Mar 2025 15:28:31 -0400
Subject: [PATCH 841/997] Fix tests

---
 example/mini_core.rs | 16 ++++++++++++++++
 tests/run/abort1.rs  |  2 +-
 tests/run/abort2.rs  |  2 +-
 tests/run/assign.rs  |  2 +-
 tests/run/closure.rs |  2 +-
 tests/run/mut_ref.rs |  2 +-
 tests/run/static.rs  |  2 +-
 7 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/example/mini_core.rs b/example/mini_core.rs
index 32501530cfac..c554a87b8256 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -138,6 +138,14 @@ impl Mul for u8 {
     }
 }
 
+impl Mul for i32 {
+    type Output = Self;
+
+    fn mul(self, rhs: Self) -> Self::Output {
+        self * rhs
+    }
+}
+
 impl Mul for usize {
     type Output = Self;
 
@@ -248,6 +256,14 @@ impl Sub for i16 {
     }
 }
 
+impl Sub for i32 {
+    type Output = Self;
+
+    fn sub(self, rhs: Self) -> Self {
+        self - rhs
+    }
+}
+
 #[lang = "rem"]
 pub trait Rem<RHS = Self> {
     type Output;
diff --git a/tests/run/abort1.rs b/tests/run/abort1.rs
index ae7e457d1cd3..ff2bb75ece22 100644
--- a/tests/run/abort1.rs
+++ b/tests/run/abort1.rs
@@ -3,7 +3,7 @@
 // Run-time:
 //   status: signal
 
-#![feature(no_core, start)]
+#![feature(no_core)]
 #![no_std]
 #![no_core]
 #![no_main]
diff --git a/tests/run/abort2.rs b/tests/run/abort2.rs
index 28fad0107f75..781f518e0b22 100644
--- a/tests/run/abort2.rs
+++ b/tests/run/abort2.rs
@@ -3,7 +3,7 @@
 // Run-time:
 //   status: signal
 
-#![feature(no_core, start)]
+#![feature(no_core)]
 #![no_std]
 #![no_core]
 #![no_main]
diff --git a/tests/run/assign.rs b/tests/run/assign.rs
index a54d0b20def3..4535ab5778e9 100644
--- a/tests/run/assign.rs
+++ b/tests/run/assign.rs
@@ -23,7 +23,7 @@ fn inc(num: isize) -> isize {
 }
 
 #[no_mangle]
-extern "C" fn main(mut argc: i32, _argv: *const *const u8) -> i32 {
+extern "C" fn main(mut argc: isize, _argv: *const *const u8) -> i32 {
     argc = inc(argc);
     unsafe {
         libc::printf(b"%ld\n\0" as *const u8 as *const i8, argc);
diff --git a/tests/run/closure.rs b/tests/run/closure.rs
index b827a2614002..a8a3fadfed47 100644
--- a/tests/run/closure.rs
+++ b/tests/run/closure.rs
@@ -17,7 +17,7 @@ extern crate mini_core;
 use mini_core::*;
 
 #[no_mangle]
-extern "C" fn main(argc: i32, _argv: *const *const u8) -> i32 {
+extern "C" fn main(argc: isize, _argv: *const *const u8) -> i32 {
     let string = "Arg: %d\n\0";
     let mut closure = || unsafe {
         libc::printf(string as *const str as *const i8, argc);
diff --git a/tests/run/mut_ref.rs b/tests/run/mut_ref.rs
index 5fa5df751a32..fa50d5bc5d3d 100644
--- a/tests/run/mut_ref.rs
+++ b/tests/run/mut_ref.rs
@@ -27,7 +27,7 @@ fn update_num(num: &mut isize) {
 }
 
 #[no_mangle]
-extern "C" fn main(argc: i32, _argv: *const *const u8) -> i32 {
+extern "C" fn main(mut argc: isize, _argv: *const *const u8) -> i32 {
     let mut test = test(argc);
     unsafe {
         libc::printf(b"%ld\n\0" as *const u8 as *const i8, test.field);
diff --git a/tests/run/static.rs b/tests/run/static.rs
index c58151f8417b..1e36cf4f3d31 100644
--- a/tests/run/static.rs
+++ b/tests/run/static.rs
@@ -34,7 +34,7 @@ static mut TEST2: Test = Test { field: 14 };
 static mut WITH_REF: WithRef = WithRef { refe: unsafe { &TEST } };
 
 #[no_mangle]
-extern "C" fn main(argc: i32, _argv: *const *const u8) -> i32 {
+extern "C" fn main(argc: isize, _argv: *const *const u8) -> i32 {
     unsafe {
         libc::printf(b"%ld\n\0" as *const u8 as *const i8, CONSTANT);
         libc::printf(b"%ld\n\0" as *const u8 as *const i8, TEST2.field);

From bc0bc8d5e1a1a38ee5a342e614e490e490bc5604 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 27 Mar 2025 15:36:15 -0400
Subject: [PATCH 842/997] Fix int_to_float_cast for f128

---
 src/int.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/int.rs b/src/int.rs
index f3552d9b12fc..b5fcb534747d 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -905,6 +905,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let name_suffix = match self.type_kind(dest_typ) {
             TypeKind::Float => "tisf",
             TypeKind::Double => "tidf",
+            TypeKind::FP128 => "tixf",
             kind => panic!("cannot cast a non-native integer to type {:?}", kind),
         };
         let sign = if signed { "" } else { "un" };

From 6504f4c09ce9e3c72084e647fab8e6565d79573e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 13 Apr 2025 08:40:42 -0400
Subject: [PATCH 843/997] Format

---
 src/abi.rs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/abi.rs b/src/abi.rs
index 6fdb03fb85b5..a96b18e01c08 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -9,9 +9,9 @@ use rustc_middle::ty::Ty;
 use rustc_middle::ty::layout::LayoutOf;
 #[cfg(feature = "master")]
 use rustc_session::config;
-use rustc_target::callconv::{ArgAttributes, CastTarget, FnAbi, PassMode};
 #[cfg(feature = "master")]
 use rustc_target::callconv::Conv;
+use rustc_target::callconv::{ArgAttributes, CastTarget, FnAbi, PassMode};
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
@@ -254,9 +254,9 @@ pub fn conv_to_fn_attribute<'gcc>(conv: Conv, arch: &str) -> Option<FnAttribute<
             // TODO(antoyo): remove clippy allow attribute when this is implemented.
             #[allow(clippy::if_same_then_else)]
             if arch == "amdgpu" {
-                return None
+                return None;
             } else if arch == "nvptx64" {
-                return None
+                return None;
             } else {
                 panic!("Architecture {} does not support GpuKernel calling convention", arch);
             }

From bb1e6a3193cedf6315811dd47f584b7f2e294304 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 13 Apr 2025 08:58:32 -0400
Subject: [PATCH 844/997] Fix tests

---
 tests/failing-ui-tests.txt | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 0babc748f98b..12dc7f726aab 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -31,7 +31,6 @@ tests/ui/unwind-no-uwtable.rs
 tests/ui/parser/unclosed-delimiter-in-dep.rs
 tests/ui/consts/missing_span_in_backtrace.rs
 tests/ui/drop/dynamic-drop.rs
-tests/ui/issues/issue-40883.rs
 tests/ui/issues/issue-43853.rs
 tests/ui/issues/issue-47364.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
@@ -100,14 +99,12 @@ tests/ui/codegen/equal-pointers-unequal/as-cast/basic.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/inline1.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/print.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/inline2.rs
-tests/ui/codegen/equal-pointers-unequal/as-cast/print3.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/segfault.rs
 tests/ui/codegen/equal-pointers-unequal/exposed-provenance/function.rs
 tests/ui/codegen/equal-pointers-unequal/exposed-provenance/basic.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/zero.rs
 tests/ui/codegen/equal-pointers-unequal/exposed-provenance/inline1.rs
 tests/ui/codegen/equal-pointers-unequal/exposed-provenance/print.rs
-tests/ui/codegen/equal-pointers-unequal/exposed-provenance/print3.rs
 tests/ui/codegen/equal-pointers-unequal/exposed-provenance/inline2.rs
 tests/ui/codegen/equal-pointers-unequal/exposed-provenance/segfault.rs
 tests/ui/codegen/equal-pointers-unequal/exposed-provenance/zero.rs
@@ -115,8 +112,8 @@ tests/ui/codegen/equal-pointers-unequal/strict-provenance/basic.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/function.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/print.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/inline1.rs
-tests/ui/codegen/equal-pointers-unequal/strict-provenance/print3.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/inline2.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/segfault.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/zero.rs
 tests/ui/simd/simd-bitmask-notpow2.rs
+tests/ui/codegen/StackColoring-not-blowup-stack-issue-40883.rs

From 0d773175cc41901f1a558a9b45239c67c3fa0df6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 13 Apr 2025 10:25:10 -0400
Subject: [PATCH 845/997] Add support for simd_insert_dyn and simd_extract_dyn

---
 src/intrinsic/simd.rs | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 8b454ab2a424..6d40d5297f1a 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -399,7 +399,7 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
     }
 
     #[cfg(feature = "master")]
-    if name == sym::simd_insert {
+    if name == sym::simd_insert || name == sym::simd_insert_dyn {
         require!(
             in_elem == arg_tys[2],
             InvalidMonomorphization::InsertedType {
@@ -410,6 +410,8 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
                 out_ty: arg_tys[2]
             }
         );
+
+        // TODO(antoyo): For simd_insert, check if the index is a constant of the correct size.
         let vector = args[0].immediate();
         let index = args[1].immediate();
         let value = args[2].immediate();
@@ -422,13 +424,15 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
     }
 
     #[cfg(feature = "master")]
-    if name == sym::simd_extract {
+    if name == sym::simd_extract || name == sym::simd_extract_dyn {
         require!(
             ret_ty == in_elem,
             InvalidMonomorphization::ReturnType { span, name, in_elem, in_ty, ret_ty }
         );
+        // TODO(antoyo): For simd_extract, check if the index is a constant of the correct size.
         let vector = args[0].immediate();
-        return Ok(bx.context.new_vector_access(None, vector, args[1].immediate()).to_rvalue());
+        let index = args[1].immediate();
+        return Ok(bx.context.new_vector_access(None, vector, index).to_rvalue());
     }
 
     if name == sym::simd_select {

From 4b5940ad77cf9a95cf78bef1ecc6fa84ef1fc0ce Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 15 Apr 2025 12:51:28 -0400
Subject: [PATCH 846/997] Fix overflow operations

---
 src/int.rs | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/src/int.rs b/src/int.rs
index b5fcb534747d..9b5b0fde6e2f 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -404,7 +404,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
 
         let ret_indirect = matches!(fn_abi.ret.mode, PassMode::Indirect { .. });
 
-        let result = if ret_indirect {
+        let call = if ret_indirect {
             let res_value = self.current_func().new_local(self.location, res_type, "result_value");
             let res_addr = res_value.get_address(self.location);
             let res_param_type = res_type.make_pointer();
@@ -432,8 +432,17 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             );
             self.context.new_call(self.location, func, &[lhs, rhs, overflow_addr])
         };
+        // NOTE: we must assign the result of the operation to a variable at this point to make
+        // sure it will be evaluated by libgccjit now.
+        // Otherwise, it will only be evaluated when the rvalue for the call is used somewhere else
+        // and overflow_value will not be initialized at the correct point in the program.
+        let result = self.current_func().new_local(self.location, res_type, "result");
+        self.block.add_assignment(self.location, result, call);
 
-        (result, self.context.new_cast(self.location, overflow_value, self.bool_type).to_rvalue())
+        (
+            result.to_rvalue(),
+            self.context.new_cast(self.location, overflow_value, self.bool_type).to_rvalue(),
+        )
     }
 
     pub fn gcc_icmp(
@@ -865,6 +874,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let value_type = value.get_type();
         if self.is_native_int_type_or_bool(dest_typ) && self.is_native_int_type_or_bool(value_type)
         {
+            // TODO: use self.location.
             self.context.new_cast(None, value, dest_typ)
         } else if self.is_native_int_type_or_bool(dest_typ) {
             self.context.new_cast(None, self.low(value), dest_typ)

From 06af88e06cd464809bbe3c2ab073d2d575d185e6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 15 Apr 2025 13:28:27 -0400
Subject: [PATCH 847/997] Add new failing test

---
 tests/failing-ui-tests.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 12dc7f726aab..499c1a962311 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -117,3 +117,4 @@ tests/ui/codegen/equal-pointers-unequal/strict-provenance/segfault.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/zero.rs
 tests/ui/simd/simd-bitmask-notpow2.rs
 tests/ui/codegen/StackColoring-not-blowup-stack-issue-40883.rs
+tests/ui/uninhabited/uninhabited-transparent-return-abi.rs

From 65b87aae21096c0f22d141ceaf7030ebdf6edbe4 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 17 Apr 2025 15:05:06 -0400
Subject: [PATCH 848/997] Support new target builtins

---
 src/intrinsic/llvm.rs | 245 +++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 244 insertions(+), 1 deletion(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 2b172cdfed3a..e030e3b4ff28 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1,11 +1,86 @@
 use std::borrow::Cow;
 
-use gccjit::{CType, Context, Function, FunctionPtrType, RValue, ToRValue};
+use gccjit::{CType, Context, Field, Function, FunctionPtrType, RValue, ToRValue, Type};
 use rustc_codegen_ssa::traits::BuilderMethods;
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
 
+fn encode_key_128_type<'a, 'gcc, 'tcx>(
+    builder: &Builder<'a, 'gcc, 'tcx>,
+) -> (Type<'gcc>, Field<'gcc>, Field<'gcc>) {
+    let m128i = builder.context.new_vector_type(builder.i64_type, 2);
+    let field1 = builder.context.new_field(None, builder.u32_type, "field1");
+    let field2 = builder.context.new_field(None, m128i, "field2");
+    let field3 = builder.context.new_field(None, m128i, "field3");
+    let field4 = builder.context.new_field(None, m128i, "field4");
+    let field5 = builder.context.new_field(None, m128i, "field5");
+    let field6 = builder.context.new_field(None, m128i, "field6");
+    let field7 = builder.context.new_field(None, m128i, "field7");
+    let encode_type = builder.context.new_struct_type(
+        None,
+        "EncodeKey128Output",
+        &[field1, field2, field3, field4, field5, field6, field7],
+    );
+    encode_type.as_type().set_packed();
+    (encode_type.as_type(), field1, field2)
+}
+
+fn encode_key_256_type<'a, 'gcc, 'tcx>(
+    builder: &Builder<'a, 'gcc, 'tcx>,
+) -> (Type<'gcc>, Field<'gcc>, Field<'gcc>) {
+    let m128i = builder.context.new_vector_type(builder.i64_type, 2);
+    let field1 = builder.context.new_field(None, builder.u32_type, "field1");
+    let field2 = builder.context.new_field(None, m128i, "field2");
+    let field3 = builder.context.new_field(None, m128i, "field3");
+    let field4 = builder.context.new_field(None, m128i, "field4");
+    let field5 = builder.context.new_field(None, m128i, "field5");
+    let field6 = builder.context.new_field(None, m128i, "field6");
+    let field7 = builder.context.new_field(None, m128i, "field7");
+    let field8 = builder.context.new_field(None, m128i, "field8");
+    let encode_type = builder.context.new_struct_type(
+        None,
+        "EncodeKey256Output",
+        &[field1, field2, field3, field4, field5, field6, field7, field8],
+    );
+    encode_type.as_type().set_packed();
+    (encode_type.as_type(), field1, field2)
+}
+
+fn aes_output_type<'a, 'gcc, 'tcx>(
+    builder: &Builder<'a, 'gcc, 'tcx>,
+) -> (Type<'gcc>, Field<'gcc>, Field<'gcc>) {
+    let m128i = builder.context.new_vector_type(builder.i64_type, 2);
+    let field1 = builder.context.new_field(None, builder.u8_type, "field1");
+    let field2 = builder.context.new_field(None, m128i, "field2");
+    let aes_output_type = builder.context.new_struct_type(None, "AesOutput", &[field1, field2]);
+    let typ = aes_output_type.as_type();
+    typ.set_packed();
+    (typ, field1, field2)
+}
+
+fn wide_aes_output_type<'a, 'gcc, 'tcx>(
+    builder: &Builder<'a, 'gcc, 'tcx>,
+) -> (Type<'gcc>, Field<'gcc>, Field<'gcc>) {
+    let m128i = builder.context.new_vector_type(builder.i64_type, 2);
+    let field1 = builder.context.new_field(None, builder.u8_type, "field1");
+    let field2 = builder.context.new_field(None, m128i, "field2");
+    let field3 = builder.context.new_field(None, m128i, "field3");
+    let field4 = builder.context.new_field(None, m128i, "field4");
+    let field5 = builder.context.new_field(None, m128i, "field5");
+    let field6 = builder.context.new_field(None, m128i, "field6");
+    let field7 = builder.context.new_field(None, m128i, "field7");
+    let field8 = builder.context.new_field(None, m128i, "field8");
+    let field9 = builder.context.new_field(None, m128i, "field9");
+    let aes_output_type = builder.context.new_struct_type(
+        None,
+        "WideAesOutput",
+        &[field1, field2, field3, field4, field5, field6, field7, field8, field9],
+    );
+    aes_output_type.as_type().set_packed();
+    (aes_output_type.as_type(), field1, field2)
+}
+
 #[cfg_attr(not(feature = "master"), allow(unused_variables))]
 pub fn adjust_function<'gcc>(
     context: &'gcc Context<'gcc>,
@@ -503,6 +578,74 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 let arg4 = builder.context.new_rvalue_from_int(arg4_type, -1);
                 args = vec![a, b, c, arg4, new_args[3]].into();
             }
+            "__builtin_ia32_encodekey128_u32" => {
+                let mut new_args = args.to_vec();
+                let m128i = builder.context.new_vector_type(builder.i64_type, 2);
+                let array_type = builder.context.new_array_type(None, m128i, 6);
+                let result = builder.current_func().new_local(None, array_type, "result");
+                new_args.push(result.get_address(None));
+                args = new_args.into();
+            }
+            "__builtin_ia32_encodekey256_u32" => {
+                let mut new_args = args.to_vec();
+                let m128i = builder.context.new_vector_type(builder.i64_type, 2);
+                let array_type = builder.context.new_array_type(None, m128i, 7);
+                let result = builder.current_func().new_local(None, array_type, "result");
+                new_args.push(result.get_address(None));
+                args = new_args.into();
+            }
+            "__builtin_ia32_aesenc128kl_u8"
+            | "__builtin_ia32_aesdec128kl_u8"
+            | "__builtin_ia32_aesenc256kl_u8"
+            | "__builtin_ia32_aesdec256kl_u8" => {
+                let mut new_args = vec![];
+                // TODO: directly create a variable of type m128i instead of the whole struct?
+                let (aes_output_type, _, field2) = aes_output_type(builder);
+                let result = builder.current_func().new_local(None, aes_output_type, "result");
+                let field2 = result.access_field(None, field2);
+                new_args.push(field2.get_address(None));
+                new_args.extend(args.to_vec());
+                args = new_args.into();
+            }
+            "__builtin_ia32_aesencwide128kl_u8"
+            | "__builtin_ia32_aesdecwide128kl_u8"
+            | "__builtin_ia32_aesencwide256kl_u8"
+            | "__builtin_ia32_aesdecwide256kl_u8" => {
+                let mut new_args = vec![];
+
+                let mut old_args = args.to_vec();
+                let handle = old_args.swap_remove(0); // Called __P in GCC.
+                let first_value = old_args.swap_remove(0);
+
+                let element_type = first_value.get_type();
+                let array_type = builder.context.new_array_type(None, element_type, 8);
+                let result = builder.current_func().new_local(None, array_type, "result");
+                new_args.push(result.get_address(None));
+
+                let array = builder.current_func().new_local(None, array_type, "array");
+                let input = builder.context.new_array_constructor(
+                    None,
+                    array_type,
+                    &[
+                        first_value,
+                        old_args.swap_remove(0),
+                        old_args.swap_remove(0),
+                        old_args.swap_remove(0),
+                        old_args.swap_remove(0),
+                        old_args.swap_remove(0),
+                        old_args.swap_remove(0),
+                        old_args.swap_remove(0),
+                    ],
+                );
+                builder.llbb().add_assignment(None, array, input);
+                let input_ptr = array.get_address(None);
+                let arg2_type = gcc_func.get_param_type(1);
+                let input_ptr = builder.context.new_cast(None, input_ptr, arg2_type);
+                new_args.push(input_ptr);
+
+                new_args.push(handle);
+                args = new_args.into();
+            }
             _ => (),
         }
     } else {
@@ -700,6 +843,96 @@ pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(
             let f16_type = builder.context.new_c_type(CType::Float16);
             return_value = builder.context.new_cast(None, return_value, f16_type);
         }
+        "__builtin_ia32_encodekey128_u32" => {
+            // The builtin __builtin_ia32_encodekey128_u32 writes the result in its pointer argument while
+            // llvm.x86.encodekey128 returns a value.
+            // We added a result pointer argument and now need to assign its value to the return_value expected by
+            // the LLVM intrinsic.
+            let (encode_type, field1, field2) = encode_key_128_type(builder);
+            let result = builder.current_func().new_local(None, encode_type, "result");
+            let field1 = result.access_field(None, field1);
+            builder.llbb().add_assignment(None, field1, return_value);
+            let field2 = result.access_field(None, field2);
+            let field2_type = field2.to_rvalue().get_type();
+            let array_type = builder.context.new_array_type(None, field2_type, 6);
+            let ptr = builder.context.new_cast(None, args[2], array_type.make_pointer());
+            let field2_ptr =
+                builder.context.new_cast(None, field2.get_address(None), array_type.make_pointer());
+            builder.llbb().add_assignment(
+                None,
+                field2_ptr.dereference(None),
+                ptr.dereference(None),
+            );
+            return_value = result.to_rvalue();
+        }
+        "__builtin_ia32_encodekey256_u32" => {
+            // The builtin __builtin_ia32_encodekey256_u32 writes the result in its pointer argument while
+            // llvm.x86.encodekey256 returns a value.
+            // We added a result pointer argument and now need to assign its value to the return_value expected by
+            // the LLVM intrinsic.
+            let (encode_type, field1, field2) = encode_key_256_type(builder);
+            let result = builder.current_func().new_local(None, encode_type, "result");
+            let field1 = result.access_field(None, field1);
+            builder.llbb().add_assignment(None, field1, return_value);
+            let field2 = result.access_field(None, field2);
+            let field2_type = field2.to_rvalue().get_type();
+            let array_type = builder.context.new_array_type(None, field2_type, 7);
+            let ptr = builder.context.new_cast(None, args[3], array_type.make_pointer());
+            let field2_ptr =
+                builder.context.new_cast(None, field2.get_address(None), array_type.make_pointer());
+            builder.llbb().add_assignment(
+                None,
+                field2_ptr.dereference(None),
+                ptr.dereference(None),
+            );
+            return_value = result.to_rvalue();
+        }
+        "__builtin_ia32_aesdec128kl_u8"
+        | "__builtin_ia32_aesenc128kl_u8"
+        | "__builtin_ia32_aesdec256kl_u8"
+        | "__builtin_ia32_aesenc256kl_u8" => {
+            // The builtin for aesdec/aesenc writes the result in its pointer argument while
+            // llvm.x86.aesdec128kl returns a value.
+            // We added a result pointer argument and now need to assign its value to the return_value expected by
+            // the LLVM intrinsic.
+            let (aes_output_type, field1, field2) = aes_output_type(builder);
+            let result = builder.current_func().new_local(None, aes_output_type, "result");
+            let field1 = result.access_field(None, field1);
+            builder.llbb().add_assignment(None, field1, return_value);
+            let field2 = result.access_field(None, field2);
+            let ptr = builder.context.new_cast(
+                None,
+                args[0],
+                field2.to_rvalue().get_type().make_pointer(),
+            );
+            builder.llbb().add_assignment(None, field2, ptr.dereference(None));
+            return_value = result.to_rvalue();
+        }
+        "__builtin_ia32_aesencwide128kl_u8"
+        | "__builtin_ia32_aesdecwide128kl_u8"
+        | "__builtin_ia32_aesencwide256kl_u8"
+        | "__builtin_ia32_aesdecwide256kl_u8" => {
+            // The builtin for aesdecwide/aesencwide writes the result in its pointer argument while
+            // llvm.x86.aesencwide128kl returns a value.
+            // We added a result pointer argument and now need to assign its value to the return_value expected by
+            // the LLVM intrinsic.
+            let (aes_output_type, field1, field2) = wide_aes_output_type(builder);
+            let result = builder.current_func().new_local(None, aes_output_type, "result");
+            let field1 = result.access_field(None, field1);
+            builder.llbb().add_assignment(None, field1, return_value);
+            let field2 = result.access_field(None, field2);
+            let field2_type = field2.to_rvalue().get_type();
+            let array_type = builder.context.new_array_type(None, field2_type, 8);
+            let ptr = builder.context.new_cast(None, args[0], array_type.make_pointer());
+            let field2_ptr =
+                builder.context.new_cast(None, field2.get_address(None), array_type.make_pointer());
+            builder.llbb().add_assignment(
+                None,
+                field2_ptr.dereference(None),
+                ptr.dereference(None),
+            );
+            return_value = result.to_rvalue();
+        }
         _ => (),
     }
 
@@ -1284,6 +1517,16 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.avx512fp16.mask.vfmadd.cph.256" => "__builtin_ia32_vfmaddcph256_mask3",
         "llvm.x86.avx512fp16.mask.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_mask3",
         "llvm.x86.avx512fp16.mask.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_mask3",
+        "llvm.x86.encodekey128" => "__builtin_ia32_encodekey128_u32",
+        "llvm.x86.encodekey256" => "__builtin_ia32_encodekey256_u32",
+        "llvm.x86.aesenc128kl" => "__builtin_ia32_aesenc128kl_u8",
+        "llvm.x86.aesdec128kl" => "__builtin_ia32_aesdec128kl_u8",
+        "llvm.x86.aesenc256kl" => "__builtin_ia32_aesenc256kl_u8",
+        "llvm.x86.aesdec256kl" => "__builtin_ia32_aesdec256kl_u8",
+        "llvm.x86.aesencwide128kl" => "__builtin_ia32_aesencwide128kl_u8",
+        "llvm.x86.aesdecwide128kl" => "__builtin_ia32_aesdecwide128kl_u8",
+        "llvm.x86.aesencwide256kl" => "__builtin_ia32_aesencwide256kl_u8",
+        "llvm.x86.aesdecwide256kl" => "__builtin_ia32_aesdecwide256kl_u8",
 
         // TODO: support the tile builtins:
         "llvm.x86.ldtilecfg" => "__builtin_trap",

From 98dd5a30b32c1311d5a44ebb2c0667a8ff0ef76a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 18 Apr 2025 11:45:30 -0400
Subject: [PATCH 849/997] Fix for libgccjit 12

---
 src/intrinsic/llvm.rs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index e030e3b4ff28..befb2e17960c 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -22,6 +22,7 @@ fn encode_key_128_type<'a, 'gcc, 'tcx>(
         "EncodeKey128Output",
         &[field1, field2, field3, field4, field5, field6, field7],
     );
+    #[cfg(feature = "master")]
     encode_type.as_type().set_packed();
     (encode_type.as_type(), field1, field2)
 }
@@ -43,6 +44,7 @@ fn encode_key_256_type<'a, 'gcc, 'tcx>(
         "EncodeKey256Output",
         &[field1, field2, field3, field4, field5, field6, field7, field8],
     );
+    #[cfg(feature = "master")]
     encode_type.as_type().set_packed();
     (encode_type.as_type(), field1, field2)
 }
@@ -55,6 +57,7 @@ fn aes_output_type<'a, 'gcc, 'tcx>(
     let field2 = builder.context.new_field(None, m128i, "field2");
     let aes_output_type = builder.context.new_struct_type(None, "AesOutput", &[field1, field2]);
     let typ = aes_output_type.as_type();
+    #[cfg(feature = "master")]
     typ.set_packed();
     (typ, field1, field2)
 }
@@ -77,6 +80,7 @@ fn wide_aes_output_type<'a, 'gcc, 'tcx>(
         "WideAesOutput",
         &[field1, field2, field3, field4, field5, field6, field7, field8, field9],
     );
+    #[cfg(feature = "master")]
     aes_output_type.as_type().set_packed();
     (aes_output_type.as_type(), field1, field2)
 }

From 52b06872fe92811e5ae5d87bbb3508924525723b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 18 Apr 2025 12:07:10 -0400
Subject: [PATCH 850/997] Simplify handling of some SIMD intrinsics

---
 src/intrinsic/llvm.rs | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index befb2e17960c..0eebd21001a9 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -603,11 +603,9 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
             | "__builtin_ia32_aesenc256kl_u8"
             | "__builtin_ia32_aesdec256kl_u8" => {
                 let mut new_args = vec![];
-                // TODO: directly create a variable of type m128i instead of the whole struct?
-                let (aes_output_type, _, field2) = aes_output_type(builder);
-                let result = builder.current_func().new_local(None, aes_output_type, "result");
-                let field2 = result.access_field(None, field2);
-                new_args.push(field2.get_address(None));
+                let m128i = builder.context.new_vector_type(builder.i64_type, 2);
+                let result = builder.current_func().new_local(None, m128i, "result");
+                new_args.push(result.get_address(None));
                 new_args.extend(args.to_vec());
                 args = new_args.into();
             }

From 79339104b1cc2e0cce8eb4e74e0184e00e872782 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 25 Apr 2025 10:05:35 -0400
Subject: [PATCH 851/997] Update to nightly-2025-04-25

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index fd898c59707b..452d3f22dc51 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2025-04-17"
+channel = "nightly-2025-04-25"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From 5e5ad10bc6eea1d7ff23e9f49e42e39a6c2873f1 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 25 Apr 2025 10:10:50 -0400
Subject: [PATCH 852/997] Fix clippy warnings

---
 src/asm.rs                 |  8 ++++----
 src/common.rs              | 11 +++++------
 src/consts.rs              |  8 ++++----
 src/debuginfo.rs           | 17 +++++++++--------
 src/gcc_util.rs            | 14 ++++++--------
 src/lib.rs                 |  2 +-
 src/type_of.rs             | 14 +++++++-------
 tests/lang_tests_common.rs |  2 ++
 8 files changed, 38 insertions(+), 38 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index dbdf37ee6c9e..396c6d579501 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -165,10 +165,10 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         let mut input_registers = vec![];
 
         for op in rust_operands {
-            if let InlineAsmOperandRef::In { reg, .. } = *op {
-                if let ConstraintOrRegister::Register(reg_name) = reg_to_gcc(reg) {
-                    input_registers.push(reg_name);
-                }
+            if let InlineAsmOperandRef::In { reg, .. } = *op
+                && let ConstraintOrRegister::Register(reg_name) = reg_to_gcc(reg)
+            {
+                input_registers.push(reg_name);
             }
         }
 
diff --git a/src/common.rs b/src/common.rs
index a63da6b6e27d..918195364ffe 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -33,12 +33,11 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
     }
 
     pub fn const_bitcast(&self, value: RValue<'gcc>, typ: Type<'gcc>) -> RValue<'gcc> {
-        if value.get_type() == self.bool_type.make_pointer() {
-            if let Some(pointee) = typ.get_pointee() {
-                if pointee.dyncast_vector().is_some() {
-                    panic!()
-                }
-            }
+        if value.get_type() == self.bool_type.make_pointer()
+            && let Some(pointee) = typ.get_pointee()
+            && pointee.dyncast_vector().is_some()
+        {
+            panic!()
         }
         // NOTE: since bitcast makes a value non-constant, don't bitcast if not necessary as some
         // SIMD builtins require a constant value.
diff --git a/src/consts.rs b/src/consts.rs
index acb393746285..0a67bd7bc71a 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -242,10 +242,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let fn_attrs = self.tcx.codegen_fn_attrs(def_id);
 
         let global = if def_id.is_local() && !self.tcx.is_foreign_item(def_id) {
-            if let Some(global) = self.get_declared_value(sym) {
-                if self.val_ty(global) != self.type_ptr_to(gcc_type) {
-                    span_bug!(self.tcx.def_span(def_id), "Conflicting types for static");
-                }
+            if let Some(global) = self.get_declared_value(sym)
+                && self.val_ty(global) != self.type_ptr_to(gcc_type)
+            {
+                span_bug!(self.tcx.def_span(def_id), "Conflicting types for static");
             }
 
             let is_tls = fn_attrs.flags.contains(CodegenFnAttrFlags::THREAD_LOCAL);
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index 55e01687400a..f3ced8643952 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -126,14 +126,15 @@ fn make_mir_scope<'gcc, 'tcx>(
         return;
     };
 
-    if let Some(ref vars) = *variables {
-        if !vars.contains(scope) && scope_data.inlined.is_none() {
-            // Do not create a DIScope if there are no variables defined in this
-            // MIR `SourceScope`, and it's not `inlined`, to avoid debuginfo bloat.
-            debug_context.scopes[scope] = parent_scope;
-            instantiated.insert(scope);
-            return;
-        }
+    if let Some(ref vars) = *variables
+        && !vars.contains(scope)
+        && scope_data.inlined.is_none()
+    {
+        // Do not create a DIScope if there are no variables defined in this
+        // MIR `SourceScope`, and it's not `inlined`, to avoid debuginfo bloat.
+        debug_context.scopes[scope] = parent_scope;
+        instantiated.insert(scope);
+        return;
     }
 
     let loc = cx.lookup_debug_loc(scope_data.span.lo());
diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 202764d56491..955f90202357 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -136,14 +136,12 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
         });
     features.extend(feats);
 
-    if diagnostics {
-        if let Some(f) = check_tied_features(sess, &featsmap) {
-            sess.dcx().emit_err(TargetFeatureDisableOrEnable {
-                features: f,
-                span: None,
-                missing_features: None,
-            });
-        }
+    if diagnostics && let Some(f) = check_tied_features(sess, &featsmap) {
+        sess.dcx().emit_err(TargetFeatureDisableOrEnable {
+            features: f,
+            span: None,
+            missing_features: None,
+        });
     }
 
     features
diff --git a/src/lib.rs b/src/lib.rs
index 624fdb4043c7..555f164e53fd 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -22,7 +22,7 @@
 #![warn(rust_2018_idioms)]
 #![warn(unused_lifetimes)]
 #![deny(clippy::pattern_type_mismatch)]
-#![allow(clippy::needless_lifetimes)]
+#![allow(clippy::needless_lifetimes, clippy::uninlined_format_args)]
 
 // Some "regular" crates we want to share with rustc
 extern crate object;
diff --git a/src/type_of.rs b/src/type_of.rs
index ae98b3d0b56e..5745acce6fee 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -102,10 +102,10 @@ fn uncached_gcc_type<'gcc, 'tcx>(
             let mut name = with_no_trimmed_paths!(layout.ty.to_string());
             if let (&ty::Adt(def, _), &Variants::Single { index }) =
                 (layout.ty.kind(), &layout.variants)
+                && def.is_enum()
+                && !def.variants().is_empty()
             {
-                if def.is_enum() && !def.variants().is_empty() {
-                    write!(&mut name, "::{}", def.variant(index).name).unwrap();
-                }
+                write!(&mut name, "::{}", def.variant(index).name).unwrap();
             }
             if let (&ty::Coroutine(_, _), &Variants::Single { index }) =
                 (layout.ty.kind(), &layout.variants)
@@ -264,10 +264,10 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
     }
 
     fn immediate_gcc_type<'gcc>(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Type<'gcc> {
-        if let BackendRepr::Scalar(ref scalar) = self.backend_repr {
-            if scalar.is_bool() {
-                return cx.type_i1();
-            }
+        if let BackendRepr::Scalar(ref scalar) = self.backend_repr
+            && scalar.is_bool()
+        {
+            return cx.type_i1();
         }
         self.gcc_type(cx)
     }
diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index 64c932a26581..d5a0d71c4b29 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -1,5 +1,7 @@
 //! The common code for `tests/lang_tests_*.rs`
 
+#![allow(clippy::uninlined_format_args)]
+
 use std::env::{self, current_dir};
 use std::path::{Path, PathBuf};
 use std::process::Command;

From 9059f8cd7c312d55a78cbf32ddf0729032993a9d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 25 Apr 2025 10:18:12 -0400
Subject: [PATCH 853/997] Fix test

---
 tests/run/ptr_cast.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/run/ptr_cast.rs b/tests/run/ptr_cast.rs
index 03d998c14cc9..e627886a9d57 100644
--- a/tests/run/ptr_cast.rs
+++ b/tests/run/ptr_cast.rs
@@ -5,6 +5,7 @@
 //   stdout: 10
 //     10
 //     42
+//     1
 
 #![feature(no_core)]
 #![no_std]

From 84c5fd784e3005ef150aa4c0f8313c8c74b5d60f Mon Sep 17 00:00:00 2001
From: Urgau <urgau@numericable.fr>
Date: Fri, 25 Apr 2025 22:35:58 +0200
Subject: [PATCH 854/997] Enable `[no-mentions]` and `[issue-links]` in
 `rustbot`

---
 triagebot.toml | 7 +++++++
 1 file changed, 7 insertions(+)
 create mode 100644 triagebot.toml

diff --git a/triagebot.toml b/triagebot.toml
new file mode 100644
index 000000000000..13da0a87def3
--- /dev/null
+++ b/triagebot.toml
@@ -0,0 +1,7 @@
+# Documentation at https://forge.rust-lang.org/triagebot/index.html
+
+# Prevents un-canonicalized issue links (to avoid wrong issues being linked in r-l/rust)
+[issue-links]
+
+# Prevents mentions in commits to avoid users being spammed
+[no-mentions]

From 3893560e694c28b100b75355622f23b63531d800 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 26 Apr 2025 16:02:17 -0400
Subject: [PATCH 855/997] Update to nightly-2025-04-26

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index 452d3f22dc51..fbaa22190052 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2025-04-25"
+channel = "nightly-2025-04-26"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From ce5a198239ff3f656e0e5bb0035b6fac306a461a Mon Sep 17 00:00:00 2001
From: g4titanx <g4titan1@gmail.com>
Date: Fri, 3 Jan 2025 07:58:23 +0100
Subject: [PATCH 856/997] add contibuting.md

---
 CONTRIBUTING.md | 113 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 113 insertions(+)
 create mode 100644 CONTRIBUTING.md

diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
new file mode 100644
index 000000000000..3bddb6ac63b5
--- /dev/null
+++ b/CONTRIBUTING.md
@@ -0,0 +1,113 @@
+# Contributing to rust_codegen_gcc
+
+Welcome to the rust_codegen_gcc project! This guide will help you get started as a contributor. The project aims to provide a GCC codegen backend for rustc, allowing Rust compilation on platforms unsupported by LLVM and potentially improving runtime performance through GCC's optimizations.
+
+## Getting Started
+
+### Setting Up Your Development Environment
+
+1. Install the required dependencies:
+   - rustup (follow instructions on the [official website](https://rustup.rs))
+   - DejaGnu (for running libgccjit test suite)
+   - Additional packages: `flex`, `libmpfr-dev`, `libgmp-dev`, `libmpc3`, `libmpc-dev`
+
+2. Clone and configure the repository:
+   ```bash
+   git clone https://github.com/rust-lang/rust_codegen_gcc
+   cd rust_codegen_gcc
+   cp config.example.toml config.toml
+   ```
+
+3. Build the project:
+   ```bash
+   ./y.sh prepare  # downloads and patches sysroot
+   ./y.sh build --sysroot --release
+   ```
+
+### Running Tests
+
+To verify your setup:
+```bash
+# Run the full test suite
+./y.sh test --release
+
+# Test with a simple program
+./y.sh cargo build --manifest-path tests/hello-world/Cargo.toml
+```
+
+## Communication Channels
+
+- Matrix: Join our [Matrix channel](https://matrix.to/#/#rustc_codegen_gcc:matrix.org)
+- IRC: Join us on [IRC](https://web.libera.chat/#rustc_codegen_gcc)
+- GitHub Issues: For bug reports and feature discussions
+
+We encourage new contributors to join our communication channels and introduce themselves. Feel free to ask questions about where to start or discuss potential contributions.
+
+## Understanding Core Concepts
+
+### Project Structure
+
+The project consists of several key components:
+- The GCC backend integration through libgccjit
+- Rust compiler interface
+- Test infrastructure
+
+### Common Development Tasks
+
+#### Running Specific Tests
+To run a specific test:
+1. Individual test: `./y.sh test --test <test_name>`
+2. libgccjit tests: 
+   ```bash
+   cd gcc-build/gcc
+   make check-jit
+   # For a specific test:
+   make check-jit RUNTESTFLAGS="-v -v -v jit.exp=jit.dg/test-asm.cc"
+   ```
+
+#### Debugging Tools
+The project provides several environment variables for debugging:
+- `CG_GCCJIT_DUMP_MODULE`: Dumps a specific module
+- `CG_GCCJIT_DUMP_TO_FILE`: Creates C-like representation
+- `CG_GCCJIT_DUMP_RTL`: Shows Register Transfer Language output
+
+Full list of debugging options can be found in the README.
+
+## Making Contributions
+
+### Finding Issues to Work On
+1. Look for issues labeled with `good-first-issue` or `help-wanted`
+2. Check the project roadmap for larger initiatives
+3. Consider improving documentation or tests
+
+### Pull Request Process
+1. Fork the repository and create a new branch
+2. Make your changes with clear commit messages
+3. Add tests for new functionality
+4. Update documentation as needed
+5. Submit a PR with a description of your changes
+
+### Code Style Guidelines
+- Follow Rust standard coding conventions
+- Ensure your code passes `rustfmt` and `clippy`
+- Add comments explaining complex logic, especially in GCC interface code
+
+## Additional Resources
+
+- [Rustc Dev Guide](https://rustc-dev-guide.rust-lang.org/)
+- [GCC Internals Documentation](https://gcc.gnu.org/onlinedocs/gccint/)
+- Project-specific documentation in the `doc/` directory:
+  - Common errors
+  - Debugging GCC LTO
+  - Git subtree sync
+  - Sending patches to GCC
+
+## Getting Help
+
+If you're stuck or unsure about anything:
+1. Check the existing documentation in the `doc/` directory
+2. Ask in the IRC or Matrix channels
+3. Open a GitHub issue for technical problems
+4. Comment on the issue you're working on if you need guidance
+
+Remember that all contributions, including documentation improvements, bug reports, and feature requests, are valuable to the project.
\ No newline at end of file

From a5b947ba1cba06bbd08f4d5c83aac1dba1dd37ca Mon Sep 17 00:00:00 2001
From: g4titanx <g4titan1@gmail.com>
Date: Fri, 7 Feb 2025 11:22:21 +0100
Subject: [PATCH 857/997] modify docs

---
 CONTRIBUTING.md | 81 ++++++++++++++++++-------------------------------
 Readme.md       | 43 +++++++++++++++++---------
 2 files changed, 58 insertions(+), 66 deletions(-)

diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 3bddb6ac63b5..85ddb6c8f46c 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -1,39 +1,19 @@
 # Contributing to rust_codegen_gcc
 
-Welcome to the rust_codegen_gcc project! This guide will help you get started as a contributor. The project aims to provide a GCC codegen backend for rustc, allowing Rust compilation on platforms unsupported by LLVM and potentially improving runtime performance through GCC's optimizations.
+Welcome to the `rust_codegen_gcc` project! This guide will help you get started as a contributor. The project aims to provide a GCC codegen backend for rustc, allowing Rust compilation on platforms unsupported by LLVM and potentially improving runtime performance through GCC's optimizations.
 
 ## Getting Started
 
 ### Setting Up Your Development Environment
 
-1. Install the required dependencies:
-   - rustup (follow instructions on the [official website](https://rustup.rs))
-   - DejaGnu (for running libgccjit test suite)
-   - Additional packages: `flex`, `libmpfr-dev`, `libgmp-dev`, `libmpc3`, `libmpc-dev`
+For detailed setup instructions including dependencies, build steps, and initial testing, please refer to our [README](https://github.com/rust-lang/rustc_codegen_gcc/blob/master/Readme.md). The README contains the most up-to-date information on:
 
-2. Clone and configure the repository:
-   ```bash
-   git clone https://github.com/rust-lang/rust_codegen_gcc
-   cd rust_codegen_gcc
-   cp config.example.toml config.toml
-   ```
+- Required dependencies and system packages
+- Repository setup and configuration
+- Build process
+- Basic test verification
 
-3. Build the project:
-   ```bash
-   ./y.sh prepare  # downloads and patches sysroot
-   ./y.sh build --sysroot --release
-   ```
-
-### Running Tests
-
-To verify your setup:
-```bash
-# Run the full test suite
-./y.sh test --release
-
-# Test with a simple program
-./y.sh cargo build --manifest-path tests/hello-world/Cargo.toml
-```
+Once you've completed the setup process outlined in the README, you can proceed with the contributor-specific information below.
 
 ## Communication Channels
 
@@ -45,31 +25,28 @@ We encourage new contributors to join our communication channels and introduce t
 
 ## Understanding Core Concepts
 
-### Project Structure
-
-The project consists of several key components:
-- The GCC backend integration through libgccjit
-- Rust compiler interface
-- Test infrastructure
-
 ### Common Development Tasks
 
 #### Running Specific Tests
-To run a specific test:
-1. Individual test: `./y.sh test --test <test_name>`
-2. libgccjit tests: 
-   ```bash
-   cd gcc-build/gcc
-   make check-jit
-   # For a specific test:
-   make check-jit RUNTESTFLAGS="-v -v -v jit.exp=jit.dg/test-asm.cc"
-   ```
+To run specific tests, use appropriate flags such as:
+- `./y.sh test --test-libcore`
+- `./y.sh test --std-tests`
+
+Additional test running options:
+```bash
+# libgccjit tests
+cd gcc-build/gcc
+make check-jit
+# For a specific test:
+make check-jit RUNTESTFLAGS="-v -v -v jit.exp=jit.dg/test-asm.cc"
+```
 
 #### Debugging Tools
 The project provides several environment variables for debugging:
+- `CG_GCCJIT_DUMP_GIMPLE`: Most commonly used debug dump
+- `CG_RUSTFLAGS`: Additional Rust compiler flags
 - `CG_GCCJIT_DUMP_MODULE`: Dumps a specific module
 - `CG_GCCJIT_DUMP_TO_FILE`: Creates C-like representation
-- `CG_GCCJIT_DUMP_RTL`: Shows Register Transfer Language output
 
 Full list of debugging options can be found in the README.
 
@@ -77,8 +54,8 @@ Full list of debugging options can be found in the README.
 
 ### Finding Issues to Work On
 1. Look for issues labeled with `good-first-issue` or `help-wanted`
-2. Check the project roadmap for larger initiatives
-3. Consider improving documentation or tests
+2. Check the [progress report](https://blog.antoyo.xyz/rustc_codegen_gcc-progress-report-34#state_of_rustc_codegen_gcc) for larger initiatives
+3. Consider improving documentation or investigate [failing tests](https://github.com/rust-lang/rustc_codegen_gcc/tree/master/tests)(except failing-ui-tests12.txt)
 
 ### Pull Request Process
 1. Fork the repository and create a new branch
@@ -97,10 +74,12 @@ Full list of debugging options can be found in the README.
 - [Rustc Dev Guide](https://rustc-dev-guide.rust-lang.org/)
 - [GCC Internals Documentation](https://gcc.gnu.org/onlinedocs/gccint/)
 - Project-specific documentation in the `doc/` directory:
-  - Common errors
-  - Debugging GCC LTO
-  - Git subtree sync
-  - Sending patches to GCC
+  - [Common errors](./doc/errors.md)
+  - [Debugging GCC LTO](./doc/debugging-gcc-lto.md)
+  - [Debugging libgccjit](./doc/debugging-libgccjit.md)
+  - [Git subtree sync](./doc/subtree.md)
+  - [List of useful commands](./doc/tips.md)
+  - [Send a patch to GCC](./doc/sending-gcc-patch.md)
 
 ## Getting Help
 
@@ -110,4 +89,4 @@ If you're stuck or unsure about anything:
 3. Open a GitHub issue for technical problems
 4. Comment on the issue you're working on if you need guidance
 
-Remember that all contributions, including documentation improvements, bug reports, and feature requests, are valuable to the project.
\ No newline at end of file
+Remember that all contributions, including documentation improvements, bug reports, and feature requests, are valuable to the project.
diff --git a/Readme.md b/Readme.md
index d0e4dbba6d35..89e7e24bd327 100644
--- a/Readme.md
+++ b/Readme.md
@@ -12,22 +12,35 @@ This is a GCC codegen for rustc, which means it can be loaded by the existing ru
 The primary goal of this project is to be able to compile Rust code on platforms unsupported by LLVM.
 A secondary goal is to check if using the gcc backend will provide any run-time speed improvement for the programs compiled using rustc.
 
+## Getting Started
+
+Note: **This requires a patched libgccjit in order to work.
+You need to use my [fork of gcc](https://github.com/antoyo/gcc) which already includes these patches.**
+
 ### Dependencies
+  - rustup: follow instructions on the [official website](https://rustup.rs)
+  - consider to install DejaGnu which is necessary for running the libgccjit test suite. [website](https://www.gnu.org/software/dejagnu/#downloading)
+  - additional packages: `flex`, `libmpfr-dev`, `libgmp-dev`, `libmpc3`, `libmpc-dev`
+  
+### Quick start
+1. Clone and configure the repository:
+   ```bash
+   git clone https://github.com/rust-lang/rust_codegen_gcc
+   cd rust_codegen_gcc
+   cp config.example.toml config.toml
+   ```
 
-**rustup:** Follow the instructions on the official [website](https://www.rust-lang.org/tools/install)
-
-**DejaGnu:** Consider to install DejaGnu which is necessary for running the libgccjit test suite. [website](https://www.gnu.org/software/dejagnu/#downloading)
-
-
-
-## Building
-
-**This requires a patched libgccjit in order to work.
-You need to use my [fork of gcc](https://github.com/rust-lang/gcc) which already includes these patches.**
-
-```bash
-$ cp config.example.toml config.toml
-```
+2. Build and test:
+   ```bash
+   ./y.sh prepare  # downloads and patches sysroot
+   ./y.sh build --sysroot --release
+   
+   # Verify setup with a simple test
+   ./y.sh cargo build --manifest-path tests/hello-world/Cargo.toml
+   
+   # Run full test suite (expect ~100 failing UI tests)
+   ./y.sh test --release
+   ```
 
 If don't need to test GCC patches you wrote in our GCC fork, then the default configuration should
 be all you need. You can update the `rustc_codegen_gcc` without worrying about GCC.
@@ -40,7 +53,7 @@ to do a few more things.
 To build it (most of these instructions come from [here](https://gcc.gnu.org/onlinedocs/jit/internals/index.html), so don't hesitate to take a look there if you encounter an issue):
 
 ```bash
-$ git clone https://github.com/rust-lang/gcc
+$ git clone https://github.com/antoyo/gcc
 $ sudo apt install flex libmpfr-dev libgmp-dev libmpc3 libmpc-dev
 $ mkdir gcc-build gcc-install
 $ cd gcc-build

From f150171b6cc6b1e8393fd9b057accb6b5ea0f093 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 29 Apr 2025 18:12:08 -0400
Subject: [PATCH 858/997] Some improvements

---
 CONTRIBUTING.md | 21 +++++++++++----------
 Readme.md       |  5 +++--
 2 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 85ddb6c8f46c..1bfa6e435db3 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -31,8 +31,9 @@ We encourage new contributors to join our communication channels and introduce t
 To run specific tests, use appropriate flags such as:
 - `./y.sh test --test-libcore`
 - `./y.sh test --std-tests`
+- `cargo test -- <name of test>`
 
-Additional test running options:
+Additionally, you can run the tests of `libgccjit`:
 ```bash
 # libgccjit tests
 cd gcc-build/gcc
@@ -48,14 +49,14 @@ The project provides several environment variables for debugging:
 - `CG_GCCJIT_DUMP_MODULE`: Dumps a specific module
 - `CG_GCCJIT_DUMP_TO_FILE`: Creates C-like representation
 
-Full list of debugging options can be found in the README.
+Full list of debugging options can be found in the [README](/rust-lang/rustc_codegen_gcc#env-vars).
 
 ## Making Contributions
 
 ### Finding Issues to Work On
-1. Look for issues labeled with `good-first-issue` or `help-wanted`
+1. Look for issues labeled with [`good first issue`](/rust-lang/rustc_codegen_gcc/issues?q=is%3Aissue state%3Aopen label%3A"good first issue") or [`help wanted`](/rust-lang/rustc_codegen_gcc/issues?q=is%3Aissue state%3Aopen label%3A"help wanted")
 2. Check the [progress report](https://blog.antoyo.xyz/rustc_codegen_gcc-progress-report-34#state_of_rustc_codegen_gcc) for larger initiatives
-3. Consider improving documentation or investigate [failing tests](https://github.com/rust-lang/rustc_codegen_gcc/tree/master/tests)(except failing-ui-tests12.txt)
+3. Consider improving documentation or investigating [failing tests](https://github.com/rust-lang/rustc_codegen_gcc/tree/master/tests)(except `failing-ui-tests12.txt`)
 
 ### Pull Request Process
 1. Fork the repository and create a new branch
@@ -74,12 +75,12 @@ Full list of debugging options can be found in the README.
 - [Rustc Dev Guide](https://rustc-dev-guide.rust-lang.org/)
 - [GCC Internals Documentation](https://gcc.gnu.org/onlinedocs/gccint/)
 - Project-specific documentation in the `doc/` directory:
-  - [Common errors](./doc/errors.md)
-  - [Debugging GCC LTO](./doc/debugging-gcc-lto.md)
-  - [Debugging libgccjit](./doc/debugging-libgccjit.md)
-  - [Git subtree sync](./doc/subtree.md)
-  - [List of useful commands](./doc/tips.md)
-  - [Send a patch to GCC](./doc/sending-gcc-patch.md)
+  - [Common errors](/rust-lang/rustc_codegen_gcc/blob/master/doc/errors.md)
+  - [Debugging](/rust-lang/rustc_codegen_gcc/blob/master/doc/debugging.md)
+  - [Debugging libgccjit](/rust-lang/rustc_codegen_gcc/blob/master/doc/debugging-libgccjit.md)
+  - [Git subtree sync](/rust-lang/rustc_codegen_gcc/blob/master/doc/subtree.md)
+  - [List of useful commands](/rust-lang/rustc_codegen_gcc/blob/master/doc/tips.md)
+  - [Send a patch to GCC](/rust-lang/rustc_codegen_gcc/blob/master/doc/sending-gcc-patch.md)
 
 ## Getting Help
 
diff --git a/Readme.md b/Readme.md
index 89e7e24bd327..10f9a85d72a3 100644
--- a/Readme.md
+++ b/Readme.md
@@ -15,7 +15,8 @@ A secondary goal is to check if using the gcc backend will provide any run-time
 ## Getting Started
 
 Note: **This requires a patched libgccjit in order to work.
-You need to use my [fork of gcc](https://github.com/antoyo/gcc) which already includes these patches.**
+You need to use my [fork of gcc](https://github.com/rust-lang/gcc) which already includes these patches.**
+The default configuration (see below in the [Quick start](#quick-start) section) will download a `libgccjit` built in the CI that already contains these patches, so you don't need to build this fork yourself if you use the default configuration.
 
 ### Dependencies
   - rustup: follow instructions on the [official website](https://rustup.rs)
@@ -53,7 +54,7 @@ to do a few more things.
 To build it (most of these instructions come from [here](https://gcc.gnu.org/onlinedocs/jit/internals/index.html), so don't hesitate to take a look there if you encounter an issue):
 
 ```bash
-$ git clone https://github.com/antoyo/gcc
+$ git clone https://github.com/rust-lang/gcc
 $ sudo apt install flex libmpfr-dev libgmp-dev libmpc3 libmpc-dev
 $ mkdir gcc-build gcc-install
 $ cd gcc-build

From d11bfe9c187e72147ce520a3d5f2c0ea28eb98ad Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 29 Apr 2025 18:23:23 -0400
Subject: [PATCH 859/997] Use the correct name of the project

---
 CONTRIBUTING.md | 4 ++--
 Readme.md       | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 1bfa6e435db3..fecd20209344 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -1,6 +1,6 @@
-# Contributing to rust_codegen_gcc
+# Contributing to rustc_codegen_gcc
 
-Welcome to the `rust_codegen_gcc` project! This guide will help you get started as a contributor. The project aims to provide a GCC codegen backend for rustc, allowing Rust compilation on platforms unsupported by LLVM and potentially improving runtime performance through GCC's optimizations.
+Welcome to the `rustc_codegen_gcc` project! This guide will help you get started as a contributor. The project aims to provide a GCC codegen backend for rustc, allowing Rust compilation on platforms unsupported by LLVM and potentially improving runtime performance through GCC's optimizations.
 
 ## Getting Started
 
diff --git a/Readme.md b/Readme.md
index 10f9a85d72a3..bacad151c965 100644
--- a/Readme.md
+++ b/Readme.md
@@ -26,8 +26,8 @@ The default configuration (see below in the [Quick start](#quick-start) section)
 ### Quick start
 1. Clone and configure the repository:
    ```bash
-   git clone https://github.com/rust-lang/rust_codegen_gcc
-   cd rust_codegen_gcc
+   git clone https://github.com/rust-lang/rustc_codegen_gcc
+   cd rustc_codegen_gcc
    cp config.example.toml config.toml
    ```
 

From 62814f0995c855c4a2effc1cb318da9fc9810adb Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 29 Apr 2025 18:36:29 -0400
Subject: [PATCH 860/997] Improve the doc

---
 CONTRIBUTING.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index fecd20209344..73f13f5bd86b 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -44,8 +44,8 @@ make check-jit RUNTESTFLAGS="-v -v -v jit.exp=jit.dg/test-asm.cc"
 
 #### Debugging Tools
 The project provides several environment variables for debugging:
-- `CG_GCCJIT_DUMP_GIMPLE`: Most commonly used debug dump
-- `CG_RUSTFLAGS`: Additional Rust compiler flags
+- `CG_GCCJIT_DUMP_GIMPLE`: Dump the GIMPLE IR
+- `CG_RUSTFLAGS`: Additional Rust flags
 - `CG_GCCJIT_DUMP_MODULE`: Dumps a specific module
 - `CG_GCCJIT_DUMP_TO_FILE`: Creates C-like representation
 

From 2e9ec931dae240e4845c16c2f54153bf01b63fcd Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 29 Apr 2025 18:42:25 -0400
Subject: [PATCH 861/997] Fix links in CONTRIBUTING.md

---
 CONTRIBUTING.md | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 73f13f5bd86b..db1bee285ead 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -6,7 +6,7 @@ Welcome to the `rustc_codegen_gcc` project! This guide will help you get started
 
 ### Setting Up Your Development Environment
 
-For detailed setup instructions including dependencies, build steps, and initial testing, please refer to our [README](https://github.com/rust-lang/rustc_codegen_gcc/blob/master/Readme.md). The README contains the most up-to-date information on:
+For detailed setup instructions including dependencies, build steps, and initial testing, please refer to our [README](Readme.md). The README contains the most up-to-date information on:
 
 - Required dependencies and system packages
 - Repository setup and configuration
@@ -49,14 +49,14 @@ The project provides several environment variables for debugging:
 - `CG_GCCJIT_DUMP_MODULE`: Dumps a specific module
 - `CG_GCCJIT_DUMP_TO_FILE`: Creates C-like representation
 
-Full list of debugging options can be found in the [README](/rust-lang/rustc_codegen_gcc#env-vars).
+Full list of debugging options can be found in the [README](Readme.md#env-vars).
 
 ## Making Contributions
 
 ### Finding Issues to Work On
-1. Look for issues labeled with [`good first issue`](/rust-lang/rustc_codegen_gcc/issues?q=is%3Aissue state%3Aopen label%3A"good first issue") or [`help wanted`](/rust-lang/rustc_codegen_gcc/issues?q=is%3Aissue state%3Aopen label%3A"help wanted")
+1. Look for issues labeled with [`good first issue`](https://github.com/rust-lang/rustc_codegen_gcc/issues?q=is%3Aissue state%3Aopen label%3A"good first issue") or [`help wanted`](https://github.com/rust-lang/rustc_codegen_gcc/issues?q=is%3Aissue state%3Aopen label%3A"help wanted")
 2. Check the [progress report](https://blog.antoyo.xyz/rustc_codegen_gcc-progress-report-34#state_of_rustc_codegen_gcc) for larger initiatives
-3. Consider improving documentation or investigating [failing tests](https://github.com/rust-lang/rustc_codegen_gcc/tree/master/tests)(except `failing-ui-tests12.txt`)
+3. Consider improving documentation or investigating [failing tests](https://github.com/rust-lang/rustc_codegen_gcc/tree/master/tests) (except `failing-ui-tests12.txt`)
 
 ### Pull Request Process
 1. Fork the repository and create a new branch
@@ -75,12 +75,12 @@ Full list of debugging options can be found in the [README](/rust-lang/rustc_cod
 - [Rustc Dev Guide](https://rustc-dev-guide.rust-lang.org/)
 - [GCC Internals Documentation](https://gcc.gnu.org/onlinedocs/gccint/)
 - Project-specific documentation in the `doc/` directory:
-  - [Common errors](/rust-lang/rustc_codegen_gcc/blob/master/doc/errors.md)
-  - [Debugging](/rust-lang/rustc_codegen_gcc/blob/master/doc/debugging.md)
-  - [Debugging libgccjit](/rust-lang/rustc_codegen_gcc/blob/master/doc/debugging-libgccjit.md)
-  - [Git subtree sync](/rust-lang/rustc_codegen_gcc/blob/master/doc/subtree.md)
-  - [List of useful commands](/rust-lang/rustc_codegen_gcc/blob/master/doc/tips.md)
-  - [Send a patch to GCC](/rust-lang/rustc_codegen_gcc/blob/master/doc/sending-gcc-patch.md)
+  - [Common errors](doc/errors.md)
+  - [Debugging](doc/debugging.md)
+  - [Debugging libgccjit](doc/debugging-libgccjit.md)
+  - [Git subtree sync](doc/subtree.md)
+  - [List of useful commands](doc/tips.md)
+  - [Send a patch to GCC](doc/sending-gcc-patch.md)
 
 ## Getting Help
 

From 43747cecfbe9a7f3c60a712256cfd6131bad7a0c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 29 Apr 2025 18:45:26 -0400
Subject: [PATCH 862/997] Fix links in CONTRIBUTING.md

---
 CONTRIBUTING.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index db1bee285ead..f0fd5c630528 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -54,7 +54,7 @@ Full list of debugging options can be found in the [README](Readme.md#env-vars).
 ## Making Contributions
 
 ### Finding Issues to Work On
-1. Look for issues labeled with [`good first issue`](https://github.com/rust-lang/rustc_codegen_gcc/issues?q=is%3Aissue state%3Aopen label%3A"good first issue") or [`help wanted`](https://github.com/rust-lang/rustc_codegen_gcc/issues?q=is%3Aissue state%3Aopen label%3A"help wanted")
+1. Look for issues labeled with [`good first issue`](https://github.com/rust-lang/rustc_codegen_gcc/issues?q=is%3Aissue%20state%3Aopen%20label%3A"good%20first%20issue") or [`help wanted`](https://github.com/rust-lang/rustc_codegen_gcc/issues?q=is%3Aissue%20state%3Aopen%20label%3A"help%20wanted")
 2. Check the [progress report](https://blog.antoyo.xyz/rustc_codegen_gcc-progress-report-34#state_of_rustc_codegen_gcc) for larger initiatives
 3. Consider improving documentation or investigating [failing tests](https://github.com/rust-lang/rustc_codegen_gcc/tree/master/tests) (except `failing-ui-tests12.txt`)
 

From 8b15bfbe8c43b6143acb67554573fc8637ce652a Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 30 Apr 2025 13:13:02 +0200
Subject: [PATCH 863/997] Clean up docs

---
 CONTRIBUTING.md | 12 ++++++++++--
 Readme.md       | 10 ++++++----
 2 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index f0fd5c630528..8e313ab08b59 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -19,7 +19,7 @@ Once you've completed the setup process outlined in the README, you can proceed
 
 - Matrix: Join our [Matrix channel](https://matrix.to/#/#rustc_codegen_gcc:matrix.org)
 - IRC: Join us on [IRC](https://web.libera.chat/#rustc_codegen_gcc)
-- GitHub Issues: For bug reports and feature discussions
+- [GitHub Issues](https://github.com/rust-lang/rustc_codegen_gcc/issues): For bug reports and feature discussions
 
 We encourage new contributors to join our communication channels and introduce themselves. Feel free to ask questions about where to start or discuss potential contributions.
 
@@ -28,12 +28,15 @@ We encourage new contributors to join our communication channels and introduce t
 ### Common Development Tasks
 
 #### Running Specific Tests
+
 To run specific tests, use appropriate flags such as:
+
 - `./y.sh test --test-libcore`
 - `./y.sh test --std-tests`
 - `cargo test -- <name of test>`
 
 Additionally, you can run the tests of `libgccjit`:
+
 ```bash
 # libgccjit tests
 cd gcc-build/gcc
@@ -43,8 +46,10 @@ make check-jit RUNTESTFLAGS="-v -v -v jit.exp=jit.dg/test-asm.cc"
 ```
 
 #### Debugging Tools
+
 The project provides several environment variables for debugging:
-- `CG_GCCJIT_DUMP_GIMPLE`: Dump the GIMPLE IR
+
+- `CG_GCCJIT_DUMP_GIMPLE`: Dumps the GIMPLE IR
 - `CG_RUSTFLAGS`: Additional Rust flags
 - `CG_GCCJIT_DUMP_MODULE`: Dumps a specific module
 - `CG_GCCJIT_DUMP_TO_FILE`: Creates C-like representation
@@ -54,11 +59,13 @@ Full list of debugging options can be found in the [README](Readme.md#env-vars).
 ## Making Contributions
 
 ### Finding Issues to Work On
+
 1. Look for issues labeled with [`good first issue`](https://github.com/rust-lang/rustc_codegen_gcc/issues?q=is%3Aissue%20state%3Aopen%20label%3A"good%20first%20issue") or [`help wanted`](https://github.com/rust-lang/rustc_codegen_gcc/issues?q=is%3Aissue%20state%3Aopen%20label%3A"help%20wanted")
 2. Check the [progress report](https://blog.antoyo.xyz/rustc_codegen_gcc-progress-report-34#state_of_rustc_codegen_gcc) for larger initiatives
 3. Consider improving documentation or investigating [failing tests](https://github.com/rust-lang/rustc_codegen_gcc/tree/master/tests) (except `failing-ui-tests12.txt`)
 
 ### Pull Request Process
+
 1. Fork the repository and create a new branch
 2. Make your changes with clear commit messages
 3. Add tests for new functionality
@@ -66,6 +73,7 @@ Full list of debugging options can be found in the [README](Readme.md#env-vars).
 5. Submit a PR with a description of your changes
 
 ### Code Style Guidelines
+
 - Follow Rust standard coding conventions
 - Ensure your code passes `rustfmt` and `clippy`
 - Add comments explaining complex logic, especially in GCC interface code
diff --git a/Readme.md b/Readme.md
index bacad151c965..859bb1568f4e 100644
--- a/Readme.md
+++ b/Readme.md
@@ -19,11 +19,13 @@ You need to use my [fork of gcc](https://github.com/rust-lang/gcc) which already
 The default configuration (see below in the [Quick start](#quick-start) section) will download a `libgccjit` built in the CI that already contains these patches, so you don't need to build this fork yourself if you use the default configuration.
 
 ### Dependencies
-  - rustup: follow instructions on the [official website](https://rustup.rs)
-  - consider to install DejaGnu which is necessary for running the libgccjit test suite. [website](https://www.gnu.org/software/dejagnu/#downloading)
-  - additional packages: `flex`, `libmpfr-dev`, `libgmp-dev`, `libmpc3`, `libmpc-dev`
+
+- rustup: follow instructions on the [official website](https://rustup.rs)
+- consider to install DejaGnu which is necessary for running the libgccjit test suite. [website](https://www.gnu.org/software/dejagnu/#downloading)
+- additional packages: `flex`, `libmpfr-dev`, `libgmp-dev`, `libmpc3`, `libmpc-dev`
   
 ### Quick start
+
 1. Clone and configure the repository:
    ```bash
    git clone https://github.com/rust-lang/rustc_codegen_gcc
@@ -157,7 +159,7 @@ You can do the same manually (although we don't recommend it):
 $ LIBRARY_PATH="[gcc-path value]" LD_LIBRARY_PATH="[gcc-path value]" rustc +$(cat $CG_GCCJIT_DIR/rust-toolchain | grep 'channel' | cut -d '=' -f 2 | sed 's/"//g' | sed 's/ //g') -Cpanic=abort -Zcodegen-backend=$CG_GCCJIT_DIR/target/release/librustc_codegen_gcc.so --sysroot $CG_GCCJIT_DIR/build_sysroot/sysroot my_crate.rs
 ```
 
-## Env vars
+## Environment variables
 
  * _**CG_GCCJIT_DUMP_ALL_MODULES**_: Enables dumping of all compilation modules. When set to "1", a dump is created for each module during compilation and stored in `/tmp/reproducers/`.
  * _**CG_GCCJIT_DUMP_MODULE**_: Enables dumping of a specific module. When set with the module name, e.g., `CG_GCCJIT_DUMP_MODULE=module_name`, a dump of that specific module is created in `/tmp/reproducers/`.

From 6fad1bac72dafc414bd7083f83dccb50a35d08d8 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 30 Apr 2025 11:11:17 -0400
Subject: [PATCH 864/997] Support more calling convention attributes

---
 Cargo.lock        |  8 +++---
 Cargo.toml        |  2 +-
 libgccjit.version |  2 +-
 src/abi.rs        | 65 ++++++++++++++++++++++++++++++-----------------
 4 files changed, 48 insertions(+), 29 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 832603aa7925..967a51a1cc64 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -56,18 +56,18 @@ dependencies = [
 
 [[package]]
 name = "gccjit"
-version = "2.5.0"
+version = "2.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "2895ddec764de7ac76fe6c056050c4801a80109c066f177a00a9cc8dee02b29b"
+checksum = "ae99a89184220d967dd300139f2d2ae7d52c1a69d632b24aacc57c54625254ce"
 dependencies = [
  "gccjit_sys",
 ]
 
 [[package]]
 name = "gccjit_sys"
-version = "0.6.0"
+version = "0.8.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ac133db68db8a6a8b2c51ef4b18d8ea16682d5814c4641272fe37bbbc223d5f3"
+checksum = "24edb7bfe2b7b27c6d09ed23eebfcab0b359c8fe978433f902943e6f127a0f1b"
 dependencies = [
  "libc",
 ]
diff --git a/Cargo.toml b/Cargo.toml
index b50f2a626d57..717eaf9e0580 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,7 +22,7 @@ master = ["gccjit/master"]
 default = ["master"]
 
 [dependencies]
-gccjit = "2.5"
+gccjit = "2.7"
 #gccjit = { git = "https://github.com/rust-lang/gccjit.rs" }
 
 # Local copy.
diff --git a/libgccjit.version b/libgccjit.version
index 125b04004b07..d06646dacc34 100644
--- a/libgccjit.version
+++ b/libgccjit.version
@@ -1 +1 @@
-0ea98a1365b81f7488073512c850e8ee951a4afd
+8b194529188f9d3a98cc211caa805a5355bfa8f0
diff --git a/src/abi.rs b/src/abi.rs
index a96b18e01c08..d882d3eecf49 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -9,9 +9,9 @@ use rustc_middle::ty::Ty;
 use rustc_middle::ty::layout::LayoutOf;
 #[cfg(feature = "master")]
 use rustc_session::config;
-#[cfg(feature = "master")]
-use rustc_target::callconv::Conv;
 use rustc_target::callconv::{ArgAttributes, CastTarget, FnAbi, PassMode};
+#[cfg(feature = "master")]
+use rustc_target::callconv::{Conv, RiscvInterruptKind};
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
@@ -240,38 +240,57 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
 
 #[cfg(feature = "master")]
 pub fn conv_to_fn_attribute<'gcc>(conv: Conv, arch: &str) -> Option<FnAttribute<'gcc>> {
-    // TODO: handle the calling conventions returning None.
     let attribute = match conv {
-        Conv::C
-        | Conv::Rust
-        | Conv::CCmseNonSecureCall
-        | Conv::CCmseNonSecureEntry
-        | Conv::RiscvInterrupt { .. } => return None,
-        Conv::Cold => return None,
+        Conv::C | Conv::Rust => return None,
+        Conv::CCmseNonSecureCall => {
+            if arch == "arm" {
+                FnAttribute::ArmCmseNonsecureCall
+            } else {
+                return None;
+            }
+        }
+        Conv::CCmseNonSecureEntry => {
+            if arch == "arm" {
+                FnAttribute::ArmCmseNonsecureEntry
+            } else {
+                return None;
+            }
+        }
+        Conv::Cold => FnAttribute::Cold,
+        // NOTE: the preserve attributes are not yet implemented in GCC:
+        // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110899
         Conv::PreserveMost => return None,
         Conv::PreserveAll => return None,
         Conv::GpuKernel => {
-            // TODO(antoyo): remove clippy allow attribute when this is implemented.
-            #[allow(clippy::if_same_then_else)]
             if arch == "amdgpu" {
-                return None;
+                FnAttribute::GcnAmdGpuHsaKernel
             } else if arch == "nvptx64" {
-                return None;
+                FnAttribute::NvptxKernel
             } else {
                 panic!("Architecture {} does not support GpuKernel calling convention", arch);
             }
         }
-        Conv::AvrInterrupt => return None,
-        Conv::AvrNonBlockingInterrupt => return None,
-        Conv::ArmAapcs => return None,
-        Conv::Msp430Intr => return None,
-        Conv::X86Fastcall => return None,
-        Conv::X86Intr => return None,
-        Conv::X86Stdcall => return None,
-        Conv::X86ThisCall => return None,
+        // TODO(antoyo): check if those AVR attributes are mapped correctly.
+        Conv::AvrInterrupt => FnAttribute::AvrSignal,
+        Conv::AvrNonBlockingInterrupt => FnAttribute::AvrInterrupt,
+        Conv::ArmAapcs => FnAttribute::ArmPcs("aapcs"),
+        Conv::Msp430Intr => FnAttribute::Msp430Interrupt,
+        Conv::RiscvInterrupt { kind } => {
+            let kind = match kind {
+                RiscvInterruptKind::Machine => "machine",
+                RiscvInterruptKind::Supervisor => "supervisor",
+            };
+            FnAttribute::RiscvInterrupt(kind)
+        }
+        Conv::X86Fastcall => FnAttribute::X86FastCall,
+        Conv::X86Intr => FnAttribute::X86Interrupt,
+        Conv::X86Stdcall => FnAttribute::X86Stdcall,
+        Conv::X86ThisCall => FnAttribute::X86ThisCall,
+        // NOTE: the vectorcall calling convention is not yet implemented in GCC:
+        // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89485
         Conv::X86VectorCall => return None,
-        Conv::X86_64SysV => FnAttribute::SysvAbi,
-        Conv::X86_64Win64 => FnAttribute::MsAbi,
+        Conv::X86_64SysV => FnAttribute::X86SysvAbi,
+        Conv::X86_64Win64 => FnAttribute::X86MsAbi,
     };
     Some(attribute)
 }

From 1047a7c43281453f30eb30f39000f69bdfe74e8f Mon Sep 17 00:00:00 2001
From: ALBIN BABU VARGHESE <albinbabuvarghese20@gmail.com>
Date: Thu, 1 May 2025 17:13:58 -0400
Subject: [PATCH 865/997] Added a .gitattributes file for showing cargo.lock
 diffs (#659)

---
 .gitattributes | 1 +
 1 file changed, 1 insertion(+)
 create mode 100644 .gitattributes

diff --git a/.gitattributes b/.gitattributes
new file mode 100644
index 000000000000..b9cd1111c8d0
--- /dev/null
+++ b/.gitattributes
@@ -0,0 +1 @@
+Cargo.lock linguist-generated=false
\ No newline at end of file

From e608520b12b3f6521312287831156e1ba309c5f2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 6 May 2025 17:58:21 -0400
Subject: [PATCH 866/997] Stop ignoring the feature -sse

---
 src/attributes.rs | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/src/attributes.rs b/src/attributes.rs
index 69b04dd57969..8bc1b7702430 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -88,14 +88,8 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
     let target_features = function_features
         .iter()
         .filter_map(|feature| {
-            // FIXME(antoyo): for some reasons, disabling SSE results in the following error when
-            // compiling Rust for Linux:
-            // SSE register return with SSE disabled
-            // TODO(antoyo): support soft-float and retpoline-external-thunk.
-            if feature.contains("soft-float")
-                || feature.contains("retpoline-external-thunk")
-                || *feature == "-sse"
-            {
+            // TODO(antoyo): support soft-float.
+            if feature.contains("soft-float") {
                 return None;
             }
 

From 3278cb554578fadd03a606b45690cc68a8661cfd Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 7 May 2025 16:34:32 +0200
Subject: [PATCH 867/997] Migrate to 2024 edition

---
 Cargo.toml | 2 +-
 src/lib.rs | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/Cargo.toml b/Cargo.toml
index 717eaf9e0580..c692a90f0a4a 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -2,7 +2,7 @@
 name = "rustc_codegen_gcc"
 version = "0.1.0"
 authors = ["Antoni Boucher <bouanto@zoho.com>"]
-edition = "2018"
+edition = "2024"
 license = "MIT OR Apache-2.0"
 
 [lib]
diff --git a/src/lib.rs b/src/lib.rs
index 555f164e53fd..9bbf40d4b34a 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -413,7 +413,7 @@ impl WriteBackendMethods for GccCodegenBackend {
         cgcx: &CodegenContext<Self>,
         thin: ThinModule<Self>,
     ) -> Result<ModuleCodegen<Self::Module>, FatalError> {
-        back::lto::optimize_thin_module(thin, cgcx)
+        unsafe { back::lto::optimize_thin_module(thin, cgcx) }
     }
 
     unsafe fn codegen(
@@ -422,7 +422,7 @@ impl WriteBackendMethods for GccCodegenBackend {
         module: ModuleCodegen<Self::Module>,
         config: &ModuleConfig,
     ) -> Result<CompiledModule, FatalError> {
-        back::write::codegen(cgcx, dcx, module, config)
+        unsafe { back::write::codegen(cgcx, dcx, module, config) }
     }
 
     fn prepare_thin(
@@ -454,7 +454,7 @@ impl WriteBackendMethods for GccCodegenBackend {
 }
 
 /// This is the entrypoint for a hot plugged rustc_codegen_gccjit
-#[no_mangle]
+#[unsafe(no_mangle)]
 pub fn __rustc_codegen_backend() -> Box<dyn CodegenBackend> {
     #[cfg(feature = "master")]
     let info = {

From 8e9a84011d24e99e3741664143c727f9c8e61964 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 7 May 2025 16:37:50 +0200
Subject: [PATCH 868/997] Migrate build system to 2024 edition

---
 build_system/Cargo.toml   | 2 +-
 build_system/src/main.rs  | 4 +++-
 build_system/src/utils.rs | 2 +-
 3 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/build_system/Cargo.toml b/build_system/Cargo.toml
index d2600ed5a031..540d82369fdf 100644
--- a/build_system/Cargo.toml
+++ b/build_system/Cargo.toml
@@ -1,7 +1,7 @@
 [package]
 name = "y"
 version = "0.1.0"
-edition = "2021"
+edition = "2024"
 
 [dependencies]
 boml = "0.3.1"
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index 393617183061..c70b00e09ae7 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -60,7 +60,9 @@ pub enum Command {
 
 fn main() {
     if env::var("RUST_BACKTRACE").is_err() {
-        env::set_var("RUST_BACKTRACE", "1");
+        unsafe {
+            env::set_var("RUST_BACKTRACE", "1");
+        }
     }
 
     let command = match env::args().nth(1).as_deref() {
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index 401c23948e5d..ca177a5feb86 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -10,7 +10,7 @@ use std::path::{Path, PathBuf};
 use std::process::{Command, ExitStatus, Output};
 
 #[cfg(unix)]
-extern "C" {
+unsafe extern "C" {
     fn raise(signal: c_int) -> c_int;
 }
 

From dcfd5c30d4bd81b08f893ca245e02359b9210d25 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 7 May 2025 16:45:18 +0200
Subject: [PATCH 869/997] Remove unneeded `let_chains` feature

---
 src/lib.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/lib.rs b/src/lib.rs
index 9bbf40d4b34a..7ef7d4daf461 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -16,7 +16,7 @@
 #![allow(internal_features)]
 #![doc(rust_logo)]
 #![feature(rustdoc_internals)]
-#![feature(rustc_private, decl_macro, never_type, trusted_len, let_chains)]
+#![feature(rustc_private, decl_macro, never_type, trusted_len)]
 #![allow(broken_intra_doc_links)]
 #![recursion_limit = "256"]
 #![warn(rust_2018_idioms)]

From 7f2f0d2ec13f22eb3057b309d39de134d0fd2848 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 7 May 2025 16:50:47 +0200
Subject: [PATCH 870/997] Update tests to 2024 edition

---
 tests/lang_tests_common.rs | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index d5a0d71c4b29..f0a9e72f2ea2 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -42,7 +42,9 @@ pub fn main_inner(profile: Profile) {
         .expect("failed to get absolute path of `gcc-path`")
         .display()
         .to_string();
-    env::set_var("LD_LIBRARY_PATH", gcc_path);
+    unsafe {
+        env::set_var("LD_LIBRARY_PATH", gcc_path);
+    }
 
     fn rust_filter(path: &Path) -> bool {
         path.is_file() && path.extension().expect("extension").to_str().expect("to_str") == "rs"

From 0bdf0726cf77c95937aea1df408c9b18fe33f010 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 7 May 2025 17:20:25 +0200
Subject: [PATCH 871/997] Mark back::lto::optimize_thin_module` and
 `back::write::codegen` functions as safe

---
 src/back/lto.rs   | 2 +-
 src/back/write.rs | 2 +-
 src/lib.rs        | 4 ++--
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/back/lto.rs b/src/back/lto.rs
index e5221c7da319..62bb58d44fe0 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -589,7 +589,7 @@ fn thin_lto(
     Ok((opt_jobs, copy_jobs))
 }
 
-pub unsafe fn optimize_thin_module(
+pub fn optimize_thin_module(
     thin_module: ThinModule<GccCodegenBackend>,
     _cgcx: &CodegenContext<GccCodegenBackend>,
 ) -> Result<ModuleCodegen<GccContext>, FatalError> {
diff --git a/src/back/write.rs b/src/back/write.rs
index 16c895322e88..09e955acf390 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -14,7 +14,7 @@ use crate::base::add_pic_option;
 use crate::errors::CopyBitcode;
 use crate::{GccCodegenBackend, GccContext};
 
-pub(crate) unsafe fn codegen(
+pub(crate) fn codegen(
     cgcx: &CodegenContext<GccCodegenBackend>,
     dcx: DiagCtxtHandle<'_>,
     module: ModuleCodegen<GccContext>,
diff --git a/src/lib.rs b/src/lib.rs
index 7ef7d4daf461..688487304612 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -413,7 +413,7 @@ impl WriteBackendMethods for GccCodegenBackend {
         cgcx: &CodegenContext<Self>,
         thin: ThinModule<Self>,
     ) -> Result<ModuleCodegen<Self::Module>, FatalError> {
-        unsafe { back::lto::optimize_thin_module(thin, cgcx) }
+        back::lto::optimize_thin_module(thin, cgcx)
     }
 
     unsafe fn codegen(
@@ -422,7 +422,7 @@ impl WriteBackendMethods for GccCodegenBackend {
         module: ModuleCodegen<Self::Module>,
         config: &ModuleConfig,
     ) -> Result<CompiledModule, FatalError> {
-        unsafe { back::write::codegen(cgcx, dcx, module, config) }
+        back::write::codegen(cgcx, dcx, module, config)
     }
 
     fn prepare_thin(

From 390fc73ae737ef99fa109add85bbf60e53f1a983 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 7 May 2025 17:32:31 +0200
Subject: [PATCH 872/997] Fix new clippy lints

---
 src/consts.rs              | 6 ++----
 src/debuginfo.rs           | 5 ++---
 src/declare.rs             | 1 +
 tests/lang_tests_common.rs | 5 ++---
 4 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/src/consts.rs b/src/consts.rs
index 0a67bd7bc71a..033afc0f8fbf 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -191,13 +191,11 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
                 // TODO(antoyo): check if it's okay that no link_section is set.
 
                 let typ = self.val_ty(cv).get_aligned(align.bytes());
-                let global = self.declare_private_global(&name[..], typ);
-                global
+                self.declare_private_global(&name[..], typ)
             }
             _ => {
                 let typ = self.val_ty(cv).get_aligned(align.bytes());
-                let global = self.declare_unnamed_global(typ);
-                global
+                self.declare_unnamed_global(typ)
             }
         };
         global.global_set_initializer_rvalue(cv);
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index f3ced8643952..e0597d0030d5 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -289,7 +289,7 @@ impl<'gcc, 'tcx> DebugInfoCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
     ) -> Self::DILocation {
         let pos = span.lo();
         let DebugLoc { file, line, col } = self.lookup_debug_loc(pos);
-        let loc = match file.name {
+        match file.name {
             rustc_span::FileName::Real(ref name) => match *name {
                 rustc_span::RealFileName::LocalPath(ref name) => {
                     if let Some(name) = name.to_str() {
@@ -314,7 +314,6 @@ impl<'gcc, 'tcx> DebugInfoCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 }
             },
             _ => Location::null(),
-        };
-        loc
+        }
     }
 }
diff --git a/src/declare.rs b/src/declare.rs
index c1ca3eb849e8..bed82073e2c4 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -157,6 +157,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 ///
 /// If there’s a value with the same name already declared, the function will
 /// update the declaration and return existing Value instead.
+#[allow(clippy::let_and_return)]
 fn declare_raw_fn<'gcc>(
     cx: &CodegenCx<'gcc, '_>,
     name: &str,
diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index f0a9e72f2ea2..bdcf14b4b26d 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -69,15 +69,14 @@ pub fn main_inner(profile: Profile) {
         .test_dir("tests/run")
         .test_path_filter(filter)
         .test_extract(|path| {
-            let lines = std::fs::read_to_string(path)
+            std::fs::read_to_string(path)
                 .expect("read file")
                 .lines()
                 .skip_while(|l| !l.starts_with("//"))
                 .take_while(|l| l.starts_with("//"))
                 .map(|l| &l[2..])
                 .collect::<Vec<_>>()
-                .join("\n");
-            lines
+                .join("\n")
         })
         .test_cmds(move |path| {
             // Test command 1: Compile `x.rs` into `tempdir/x`.

From 33966ccbb6570c83b9fc1dd0942f83ae2d56f47c Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Fri, 9 May 2025 21:22:33 +0200
Subject: [PATCH 873/997] Add a workaround for 128 bit switches

---
 example/mini_core.rs          | 54 ++++++++++++++++++++++++-----------
 src/builder.rs                | 25 +++++++++++++---
 tests/run/switchint_128bit.rs | 37 ++++++++++++++++++++++++
 3 files changed, 96 insertions(+), 20 deletions(-)
 create mode 100644 tests/run/switchint_128bit.rs

diff --git a/example/mini_core.rs b/example/mini_core.rs
index c554a87b8256..d1d8e8fd5bc4 100644
--- a/example/mini_core.rs
+++ b/example/mini_core.rs
@@ -1,6 +1,14 @@
 #![feature(
-    no_core, lang_items, intrinsics, unboxed_closures, extern_types,
-    decl_macro, rustc_attrs, transparent_unions, auto_traits, freeze_impls,
+    no_core,
+    lang_items,
+    intrinsics,
+    unboxed_closures,
+    extern_types,
+    decl_macro,
+    rustc_attrs,
+    transparent_unions,
+    auto_traits,
+    freeze_impls,
     thread_local
 )]
 #![no_core]
@@ -35,13 +43,13 @@ impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<*mut U> for *mut T {}
 pub trait DispatchFromDyn<T> {}
 
 // &T -> &U
-impl<'a, T: ?Sized+Unsize<U>, U: ?Sized> DispatchFromDyn<&'a U> for &'a T {}
+impl<'a, T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<&'a U> for &'a T {}
 // &mut T -> &mut U
-impl<'a, T: ?Sized+Unsize<U>, U: ?Sized> DispatchFromDyn<&'a mut U> for &'a mut T {}
+impl<'a, T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<&'a mut U> for &'a mut T {}
 // *const T -> *const U
-impl<T: ?Sized+Unsize<U>, U: ?Sized> DispatchFromDyn<*const U> for *const T {}
+impl<T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<*const U> for *const T {}
 // *mut T -> *mut U
-impl<T: ?Sized+Unsize<U>, U: ?Sized> DispatchFromDyn<*mut U> for *mut T {}
+impl<T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<*mut U> for *mut T {}
 impl<T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<Box<U, ()>> for Box<T, ()> {}
 
 #[lang = "legacy_receiver"]
@@ -52,8 +60,7 @@ impl<T: ?Sized> LegacyReceiver for &mut T {}
 impl<T: ?Sized, A: Allocator> LegacyReceiver for Box<T, A> {}
 
 #[lang = "receiver"]
-trait Receiver {
-}
+trait Receiver {}
 
 #[lang = "copy"]
 pub trait Copy {}
@@ -67,10 +74,13 @@ impl Copy for u16 {}
 impl Copy for u32 {}
 impl Copy for u64 {}
 impl Copy for usize {}
+impl Copy for u128 {}
 impl Copy for i8 {}
 impl Copy for i16 {}
 impl Copy for i32 {}
+impl Copy for i64 {}
 impl Copy for isize {}
+impl Copy for i128 {}
 impl Copy for f32 {}
 impl Copy for f64 {}
 impl Copy for char {}
@@ -336,7 +346,6 @@ impl PartialEq for u32 {
     }
 }
 
-
 impl PartialEq for u64 {
     fn eq(&self, other: &u64) -> bool {
         (*self) == (*other)
@@ -523,7 +532,11 @@ fn panic_in_cleanup() -> ! {
 #[track_caller]
 fn panic_bounds_check(index: usize, len: usize) -> ! {
     unsafe {
-        libc::printf("index out of bounds: the len is %d but the index is %d\n\0" as *const str as *const i8, len, index);
+        libc::printf(
+            "index out of bounds: the len is %d but the index is %d\n\0" as *const str as *const i8,
+            len,
+            index,
+        );
         intrinsics::abort();
     }
 }
@@ -551,8 +564,7 @@ pub trait Deref {
     fn deref(&self) -> &Self::Target;
 }
 
-pub trait Allocator {
-}
+pub trait Allocator {}
 
 impl Allocator for () {}
 
@@ -634,6 +646,8 @@ pub union MaybeUninit<T> {
 }
 
 pub mod intrinsics {
+    #[rustc_intrinsic]
+    pub const fn black_box<T>(_dummy: T) -> T;
     #[rustc_intrinsic]
     pub fn abort() -> !;
     #[rustc_intrinsic]
@@ -711,19 +725,27 @@ pub struct VaList<'a>(&'a mut VaListImpl);
 
 #[rustc_builtin_macro]
 #[rustc_macro_transparency = "semitransparent"]
-pub macro stringify($($t:tt)*) { /* compiler built-in */ }
+pub macro stringify($($t:tt)*) {
+    /* compiler built-in */
+}
 
 #[rustc_builtin_macro]
 #[rustc_macro_transparency = "semitransparent"]
-pub macro file() { /* compiler built-in */ }
+pub macro file() {
+    /* compiler built-in */
+}
 
 #[rustc_builtin_macro]
 #[rustc_macro_transparency = "semitransparent"]
-pub macro line() { /* compiler built-in */ }
+pub macro line() {
+    /* compiler built-in */
+}
 
 #[rustc_builtin_macro]
 #[rustc_macro_transparency = "semitransparent"]
-pub macro cfg() { /* compiler built-in */ }
+pub macro cfg() {
+    /* compiler built-in */
+}
 
 pub static A_STATIC: u8 = 42;
 
diff --git a/src/builder.rs b/src/builder.rs
index 5c70f4a7df93..557f7da0db84 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -568,11 +568,28 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     ) {
         let mut gcc_cases = vec![];
         let typ = self.val_ty(value);
-        for (on_val, dest) in cases {
-            let on_val = self.const_uint_big(typ, on_val);
-            gcc_cases.push(self.context.new_case(on_val, on_val, dest));
+        // FIXME(FractalFir): This is a workaround for a libgccjit limitation.
+        // Currently, libgccjit can't directly create 128 bit integers.
+        // Since switch cases must be values, and casts are not constant, we can't use 128 bit switch cases.
+        // In such a case, we will simply fall back to an if-ladder.
+        // This *may* be slower than a native switch, but a slow working solution is better than none at all.
+        if typ.is_i128(self) || typ.is_u128(self) {
+            for (on_val, dest) in cases {
+                let on_val = self.const_uint_big(typ, on_val);
+                let is_case =
+                    self.context.new_comparison(self.location, ComparisonOp::Equals, value, on_val);
+                let next_block = self.current_func().new_block("case");
+                self.block.end_with_conditional(self.location, is_case, dest, next_block);
+                self.block = next_block;
+            }
+            self.block.end_with_jump(self.location, default_block);
+        } else {
+            for (on_val, dest) in cases {
+                let on_val = self.const_uint_big(typ, on_val);
+                gcc_cases.push(self.context.new_case(on_val, on_val, dest));
+            }
+            self.block.end_with_switch(self.location, value, default_block, &gcc_cases);
         }
-        self.block.end_with_switch(self.location, value, default_block, &gcc_cases);
     }
 
     #[cfg(feature = "master")]
diff --git a/tests/run/switchint_128bit.rs b/tests/run/switchint_128bit.rs
new file mode 100644
index 000000000000..decae5bfcd78
--- /dev/null
+++ b/tests/run/switchint_128bit.rs
@@ -0,0 +1,37 @@
+// Compiler:
+//
+// Run-time:
+//   status: 0
+
+#![feature(no_core)]
+#![no_std]
+#![no_core]
+#![no_main]
+
+extern crate mini_core;
+use intrinsics::black_box;
+use mini_core::*;
+
+#[no_mangle]
+extern "C" fn main(argc: i32, _argv: *const *const u8) -> i32 {
+    // 1st. Check that small 128 bit values work.
+    let val = black_box(64_u128);
+    match val {
+        0 => return 1,
+        1 => return 2,
+        64 => (),
+        _ => return 3,
+    }
+    // 2nd check that *large* values work.
+    const BIG: u128 = 0xDEAD_C0FE_BEEF_DECAF_BADD_DECAF_BEEF_u128;
+    let val = black_box(BIG);
+    match val {
+        0 => return 4,
+        1 => return 5,
+        // Check that we will not match on the lower u64, if the upper qword is different!
+        0xcafbadddecafbeef => return 6,
+        0xDEAD_C0FE_BEEF_DECAF_BADD_DECAF_BEEF_u128 => (),
+        _ => return 7,
+    }
+    0
+}

From 25dd45f7bdbc13b2c3d9fea8f1cdb65187840879 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 10 May 2025 18:02:47 +0200
Subject: [PATCH 874/997] Correctly handle branches when updating repository

---
 tools/generate_intrinsics.py | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index 8efed3e43af8..181f1e501a40 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -12,7 +12,7 @@ def run_command(command, cwd=None):
         sys.exit(1)
 
 
-def clone_repository(repo_name, path, repo_url, sub_paths=None):
+def clone_repository(repo_name, path, repo_url, branch="master", sub_paths=None):
     if os.path.exists(path):
         while True:
             choice = input("There is already a `{}` folder, do you want to update it? [y/N]".format(path))
@@ -21,7 +21,7 @@ def clone_repository(repo_name, path, repo_url, sub_paths=None):
                 return
             elif choice.lower() == "y":
                 print("Updating repository...")
-                run_command(["git", "pull", "origin"], cwd=path)
+                run_command(["git", "pull", "origin", branch], cwd=path)
                 return
             else:
                 print("Didn't understand answer...")
@@ -209,6 +209,7 @@ def main():
         "llvm-project",
         llvm_path,
         "https://github.com/llvm/llvm-project",
+        branch="main",
         sub_paths=["llvm/include/llvm/IR", "llvm/include/llvm/CodeGen/"],
     )
     clone_repository(

From 43b95881f0ef12e61713fa2c8ed57d4e8ac59b71 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sat, 10 May 2025 18:02:54 +0200
Subject: [PATCH 875/997] Regenerate intrinsics

---
 src/intrinsic/archs.rs | 554 +++++++++++++++++++++++++++++++----------
 1 file changed, 418 insertions(+), 136 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index b8d1cde1d5dd..5ada535aa41d 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -38,6 +38,7 @@ match name {
     "llvm.aarch64.gcsss" => "__builtin_arm_gcsss",
     "llvm.aarch64.isb" => "__builtin_arm_isb",
     "llvm.aarch64.prefetch" => "__builtin_arm_prefetch",
+    "llvm.aarch64.sme.in.streaming.mode" => "__builtin_arm_in_streaming_mode",
     "llvm.aarch64.sve.aesd" => "__builtin_sve_svaesd_u8",
     "llvm.aarch64.sve.aese" => "__builtin_sve_svaese_u8",
     "llvm.aarch64.sve.aesimc" => "__builtin_sve_svaesimc_u8",
@@ -55,6 +56,8 @@ match name {
     "llvm.aarch64.ttest" => "__builtin_arm_ttest",
     // amdgcn
     "llvm.amdgcn.alignbyte" => "__builtin_amdgcn_alignbyte",
+    "llvm.amdgcn.ashr.pk.i8.i32" => "__builtin_amdgcn_ashr_pk_i8_i32",
+    "llvm.amdgcn.ashr.pk.u8.i32" => "__builtin_amdgcn_ashr_pk_u8_i32",
     "llvm.amdgcn.buffer.wbinvl1" => "__builtin_amdgcn_buffer_wbinvl1",
     "llvm.amdgcn.buffer.wbinvl1.sc" => "__builtin_amdgcn_buffer_wbinvl1_sc",
     "llvm.amdgcn.buffer.wbinvl1.vol" => "__builtin_amdgcn_buffer_wbinvl1_vol",
@@ -64,6 +67,7 @@ match name {
     "llvm.amdgcn.cubetc" => "__builtin_amdgcn_cubetc",
     "llvm.amdgcn.cvt.f32.bf8" => "__builtin_amdgcn_cvt_f32_bf8",
     "llvm.amdgcn.cvt.f32.fp8" => "__builtin_amdgcn_cvt_f32_fp8",
+    "llvm.amdgcn.cvt.off.f32.i4" => "__builtin_amdgcn_cvt_off_f32_i4",
     "llvm.amdgcn.cvt.pk.bf8.f32" => "__builtin_amdgcn_cvt_pk_bf8_f32",
     "llvm.amdgcn.cvt.pk.f32.bf8" => "__builtin_amdgcn_cvt_pk_f32_bf8",
     "llvm.amdgcn.cvt.pk.f32.fp8" => "__builtin_amdgcn_cvt_pk_f32_fp8",
@@ -74,7 +78,58 @@ match name {
     "llvm.amdgcn.cvt.pknorm.i16" => "__builtin_amdgcn_cvt_pknorm_i16",
     "llvm.amdgcn.cvt.pknorm.u16" => "__builtin_amdgcn_cvt_pknorm_u16",
     "llvm.amdgcn.cvt.pkrtz" => "__builtin_amdgcn_cvt_pkrtz",
+    "llvm.amdgcn.cvt.scalef32.2xpk16.bf6.f32" => "__builtin_amdgcn_cvt_scalef32_2xpk16_bf6_f32",
+    "llvm.amdgcn.cvt.scalef32.2xpk16.fp6.f32" => "__builtin_amdgcn_cvt_scalef32_2xpk16_fp6_f32",
+    "llvm.amdgcn.cvt.scalef32.f16.bf8" => "__builtin_amdgcn_cvt_scalef32_f16_bf8",
+    "llvm.amdgcn.cvt.scalef32.f16.fp8" => "__builtin_amdgcn_cvt_scalef32_f16_fp8",
+    "llvm.amdgcn.cvt.scalef32.f32.bf8" => "__builtin_amdgcn_cvt_scalef32_f32_bf8",
+    "llvm.amdgcn.cvt.scalef32.f32.fp8" => "__builtin_amdgcn_cvt_scalef32_f32_fp8",
+    "llvm.amdgcn.cvt.scalef32.pk.bf16.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_bf8",
+    "llvm.amdgcn.cvt.scalef32.pk.bf16.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_fp4",
+    "llvm.amdgcn.cvt.scalef32.pk.bf16.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_fp8",
+    "llvm.amdgcn.cvt.scalef32.pk.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_bf16",
+    "llvm.amdgcn.cvt.scalef32.pk.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_f16",
+    "llvm.amdgcn.cvt.scalef32.pk.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_f32",
+    "llvm.amdgcn.cvt.scalef32.pk.f16.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_f16_bf8",
+    "llvm.amdgcn.cvt.scalef32.pk.f16.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_f16_fp4",
+    "llvm.amdgcn.cvt.scalef32.pk.f16.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_f16_fp8",
+    "llvm.amdgcn.cvt.scalef32.pk.f32.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_f32_bf8",
+    "llvm.amdgcn.cvt.scalef32.pk.f32.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_f32_fp4",
+    "llvm.amdgcn.cvt.scalef32.pk.f32.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_f32_fp8",
+    "llvm.amdgcn.cvt.scalef32.pk.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_bf16",
+    "llvm.amdgcn.cvt.scalef32.pk.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_f16",
+    "llvm.amdgcn.cvt.scalef32.pk.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_f32",
+    "llvm.amdgcn.cvt.scalef32.pk.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_bf16",
+    "llvm.amdgcn.cvt.scalef32.pk.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_f16",
+    "llvm.amdgcn.cvt.scalef32.pk.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_f32",
+    "llvm.amdgcn.cvt.scalef32.pk32.bf16.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_bf16_bf6",
+    "llvm.amdgcn.cvt.scalef32.pk32.bf16.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_bf16_fp6",
+    "llvm.amdgcn.cvt.scalef32.pk32.bf6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk32_bf6_bf16",
+    "llvm.amdgcn.cvt.scalef32.pk32.bf6.f16" => "__builtin_amdgcn_cvt_scalef32_pk32_bf6_f16",
+    "llvm.amdgcn.cvt.scalef32.pk32.f16.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_f16_bf6",
+    "llvm.amdgcn.cvt.scalef32.pk32.f16.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_f16_fp6",
+    "llvm.amdgcn.cvt.scalef32.pk32.f32.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_f32_bf6",
+    "llvm.amdgcn.cvt.scalef32.pk32.f32.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_f32_fp6",
+    "llvm.amdgcn.cvt.scalef32.pk32.fp6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk32_fp6_bf16",
+    "llvm.amdgcn.cvt.scalef32.pk32.fp6.f16" => "__builtin_amdgcn_cvt_scalef32_pk32_fp6_f16",
+    "llvm.amdgcn.cvt.scalef32.sr.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_bf16",
+    "llvm.amdgcn.cvt.scalef32.sr.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_f16",
+    "llvm.amdgcn.cvt.scalef32.sr.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_f32",
+    "llvm.amdgcn.cvt.scalef32.sr.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_bf16",
+    "llvm.amdgcn.cvt.scalef32.sr.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_f16",
+    "llvm.amdgcn.cvt.scalef32.sr.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_f32",
+    "llvm.amdgcn.cvt.scalef32.sr.pk.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_bf16",
+    "llvm.amdgcn.cvt.scalef32.sr.pk.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_f16",
+    "llvm.amdgcn.cvt.scalef32.sr.pk.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_f32",
+    "llvm.amdgcn.cvt.scalef32.sr.pk32.bf6.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_bf16",
+    "llvm.amdgcn.cvt.scalef32.sr.pk32.bf6.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_f16",
+    "llvm.amdgcn.cvt.scalef32.sr.pk32.bf6.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_f32",
+    "llvm.amdgcn.cvt.scalef32.sr.pk32.fp6.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_bf16",
+    "llvm.amdgcn.cvt.scalef32.sr.pk32.fp6.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_f16",
+    "llvm.amdgcn.cvt.scalef32.sr.pk32.fp6.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_f32",
+    "llvm.amdgcn.cvt.sr.bf16.f32" => "__builtin_amdgcn_cvt_sr_bf16_f32",
     "llvm.amdgcn.cvt.sr.bf8.f32" => "__builtin_amdgcn_cvt_sr_bf8_f32",
+    "llvm.amdgcn.cvt.sr.f16.f32" => "__builtin_amdgcn_cvt_sr_f16_f32",
     "llvm.amdgcn.cvt.sr.fp8.f32" => "__builtin_amdgcn_cvt_sr_fp8_f32",
     "llvm.amdgcn.dispatch.id" => "__builtin_amdgcn_dispatch_id",
     "llvm.amdgcn.dot4.f32.bf8.bf8" => "__builtin_amdgcn_dot4_f32_bf8_bf8",
@@ -83,6 +138,7 @@ match name {
     "llvm.amdgcn.dot4.f32.fp8.fp8" => "__builtin_amdgcn_dot4_f32_fp8_fp8",
     "llvm.amdgcn.ds.add.gs.reg.rtn" => "__builtin_amdgcn_ds_add_gs_reg_rtn",
     "llvm.amdgcn.ds.bpermute" => "__builtin_amdgcn_ds_bpermute",
+    "llvm.amdgcn.ds.bpermute.fi.b32" => "__builtin_amdgcn_ds_bpermute_fi_b32",
     "llvm.amdgcn.ds.gws.barrier" => "__builtin_amdgcn_ds_gws_barrier",
     "llvm.amdgcn.ds.gws.init" => "__builtin_amdgcn_ds_gws_init",
     "llvm.amdgcn.ds.gws.sema.br" => "__builtin_amdgcn_ds_gws_sema_br",
@@ -97,6 +153,7 @@ match name {
     "llvm.amdgcn.fdot2.bf16.bf16" => "__builtin_amdgcn_fdot2_bf16_bf16",
     "llvm.amdgcn.fdot2.f16.f16" => "__builtin_amdgcn_fdot2_f16_f16",
     "llvm.amdgcn.fdot2.f32.bf16" => "__builtin_amdgcn_fdot2_f32_bf16",
+    "llvm.amdgcn.fdot2c.f32.bf16" => "__builtin_amdgcn_fdot2c_f32_bf16",
     "llvm.amdgcn.fmul.legacy" => "__builtin_amdgcn_fmul_legacy",
     "llvm.amdgcn.global.load.lds" => "__builtin_amdgcn_global_load_lds",
     "llvm.amdgcn.groupstaticsize" => "__builtin_amdgcn_groupstaticsize",
@@ -118,8 +175,10 @@ match name {
     "llvm.amdgcn.mfma.f32.16x16x16f16" => "__builtin_amdgcn_mfma_f32_16x16x16f16",
     "llvm.amdgcn.mfma.f32.16x16x1f32" => "__builtin_amdgcn_mfma_f32_16x16x1f32",
     "llvm.amdgcn.mfma.f32.16x16x2bf16" => "__builtin_amdgcn_mfma_f32_16x16x2bf16",
+    "llvm.amdgcn.mfma.f32.16x16x32.bf16" => "__builtin_amdgcn_mfma_f32_16x16x32_bf16",
     "llvm.amdgcn.mfma.f32.16x16x32.bf8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_bf8",
     "llvm.amdgcn.mfma.f32.16x16x32.bf8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_fp8",
+    "llvm.amdgcn.mfma.f32.16x16x32.f16" => "__builtin_amdgcn_mfma_f32_16x16x32_f16",
     "llvm.amdgcn.mfma.f32.16x16x32.fp8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_bf8",
     "llvm.amdgcn.mfma.f32.16x16x32.fp8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_fp8",
     "llvm.amdgcn.mfma.f32.16x16x4bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x4bf16_1k",
@@ -127,8 +186,10 @@ match name {
     "llvm.amdgcn.mfma.f32.16x16x4f32" => "__builtin_amdgcn_mfma_f32_16x16x4f32",
     "llvm.amdgcn.mfma.f32.16x16x8.xf32" => "__builtin_amdgcn_mfma_f32_16x16x8_xf32",
     "llvm.amdgcn.mfma.f32.16x16x8bf16" => "__builtin_amdgcn_mfma_f32_16x16x8bf16",
+    "llvm.amdgcn.mfma.f32.32x32x16.bf16" => "__builtin_amdgcn_mfma_f32_32x32x16_bf16",
     "llvm.amdgcn.mfma.f32.32x32x16.bf8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_bf8",
     "llvm.amdgcn.mfma.f32.32x32x16.bf8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_fp8",
+    "llvm.amdgcn.mfma.f32.32x32x16.f16" => "__builtin_amdgcn_mfma_f32_32x32x16_f16",
     "llvm.amdgcn.mfma.f32.32x32x16.fp8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_bf8",
     "llvm.amdgcn.mfma.f32.32x32x16.fp8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_fp8",
     "llvm.amdgcn.mfma.f32.32x32x1f32" => "__builtin_amdgcn_mfma_f32_32x32x1f32",
@@ -149,7 +210,9 @@ match name {
     "llvm.amdgcn.mfma.i32.16x16x16i8" => "__builtin_amdgcn_mfma_i32_16x16x16i8",
     "llvm.amdgcn.mfma.i32.16x16x32.i8" => "__builtin_amdgcn_mfma_i32_16x16x32_i8",
     "llvm.amdgcn.mfma.i32.16x16x4i8" => "__builtin_amdgcn_mfma_i32_16x16x4i8",
+    "llvm.amdgcn.mfma.i32.16x16x64.i8" => "__builtin_amdgcn_mfma_i32_16x16x64_i8",
     "llvm.amdgcn.mfma.i32.32x32x16.i8" => "__builtin_amdgcn_mfma_i32_32x32x16_i8",
+    "llvm.amdgcn.mfma.i32.32x32x32.i8" => "__builtin_amdgcn_mfma_i32_32x32x32_i8",
     "llvm.amdgcn.mfma.i32.32x32x4i8" => "__builtin_amdgcn_mfma_i32_32x32x4i8",
     "llvm.amdgcn.mfma.i32.32x32x8i8" => "__builtin_amdgcn_mfma_i32_32x32x8i8",
     "llvm.amdgcn.mfma.i32.4x4x4i8" => "__builtin_amdgcn_mfma_i32_4x4x4i8",
@@ -159,25 +222,25 @@ match name {
     "llvm.amdgcn.perm" => "__builtin_amdgcn_perm",
     "llvm.amdgcn.permlane16.var" => "__builtin_amdgcn_permlane16_var",
     "llvm.amdgcn.permlanex16.var" => "__builtin_amdgcn_permlanex16_var",
+    "llvm.amdgcn.prng.b32" => "__builtin_amdgcn_prng_b32",
     "llvm.amdgcn.qsad.pk.u16.u8" => "__builtin_amdgcn_qsad_pk_u16_u8",
     "llvm.amdgcn.queue.ptr" => "__builtin_amdgcn_queue_ptr",
+    "llvm.amdgcn.raw.ptr.buffer.load.lds" => "__builtin_amdgcn_raw_ptr_buffer_load_lds",
     "llvm.amdgcn.rcp.legacy" => "__builtin_amdgcn_rcp_legacy",
     "llvm.amdgcn.rsq.legacy" => "__builtin_amdgcn_rsq_legacy",
     "llvm.amdgcn.s.barrier" => "__builtin_amdgcn_s_barrier",
-    "llvm.amdgcn.s.barrier.init" => "__builtin_amdgcn_s_barrier_init",
-    "llvm.amdgcn.s.barrier.join" => "__builtin_amdgcn_s_barrier_join",
-    "llvm.amdgcn.s.barrier.leave" => "__builtin_amdgcn_s_barrier_leave",
     "llvm.amdgcn.s.barrier.signal" => "__builtin_amdgcn_s_barrier_signal",
     "llvm.amdgcn.s.barrier.signal.isfirst" => "__builtin_amdgcn_s_barrier_signal_isfirst",
-    "llvm.amdgcn.s.barrier.signal.isfirst.var" => "__builtin_amdgcn_s_barrier_signal_isfirst_var",
     "llvm.amdgcn.s.barrier.signal.var" => "__builtin_amdgcn_s_barrier_signal_var",
     "llvm.amdgcn.s.barrier.wait" => "__builtin_amdgcn_s_barrier_wait",
+    "llvm.amdgcn.s.buffer.prefetch.data" => "__builtin_amdgcn_s_buffer_prefetch_data",
     "llvm.amdgcn.s.dcache.inv" => "__builtin_amdgcn_s_dcache_inv",
     "llvm.amdgcn.s.dcache.inv.vol" => "__builtin_amdgcn_s_dcache_inv_vol",
     "llvm.amdgcn.s.dcache.wb" => "__builtin_amdgcn_s_dcache_wb",
     "llvm.amdgcn.s.dcache.wb.vol" => "__builtin_amdgcn_s_dcache_wb_vol",
     "llvm.amdgcn.s.decperflevel" => "__builtin_amdgcn_s_decperflevel",
     "llvm.amdgcn.s.get.barrier.state" => "__builtin_amdgcn_s_get_barrier_state",
+    "llvm.amdgcn.s.get.named.barrier.state" => "__builtin_amdgcn_s_get_named_barrier_state",
     "llvm.amdgcn.s.get.waveid.in.workgroup" => "__builtin_amdgcn_s_get_waveid_in_workgroup",
     "llvm.amdgcn.s.getpc" => "__builtin_amdgcn_s_getpc",
     "llvm.amdgcn.s.getreg" => "__builtin_amdgcn_s_getreg",
@@ -194,7 +257,6 @@ match name {
     "llvm.amdgcn.s.ttracedata.imm" => "__builtin_amdgcn_s_ttracedata_imm",
     "llvm.amdgcn.s.wait.event.export.ready" => "__builtin_amdgcn_s_wait_event_export_ready",
     "llvm.amdgcn.s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
-    "llvm.amdgcn.s.wakeup.barrier" => "__builtin_amdgcn_s_wakeup_barrier",
     "llvm.amdgcn.sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
     "llvm.amdgcn.sad.u16" => "__builtin_amdgcn_sad_u16",
     "llvm.amdgcn.sad.u8" => "__builtin_amdgcn_sad_u8",
@@ -203,20 +265,34 @@ match name {
     "llvm.amdgcn.sdot2" => "__builtin_amdgcn_sdot2",
     "llvm.amdgcn.sdot4" => "__builtin_amdgcn_sdot4",
     "llvm.amdgcn.sdot8" => "__builtin_amdgcn_sdot8",
+    "llvm.amdgcn.smfmac.f32.16x16x128.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x128_bf8_bf8",
+    "llvm.amdgcn.smfmac.f32.16x16x128.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x128_bf8_fp8",
+    "llvm.amdgcn.smfmac.f32.16x16x128.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x128_fp8_bf8",
+    "llvm.amdgcn.smfmac.f32.16x16x128.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x128_fp8_fp8",
     "llvm.amdgcn.smfmac.f32.16x16x32.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x32_bf16",
     "llvm.amdgcn.smfmac.f32.16x16x32.f16" => "__builtin_amdgcn_smfmac_f32_16x16x32_f16",
+    "llvm.amdgcn.smfmac.f32.16x16x64.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf16",
     "llvm.amdgcn.smfmac.f32.16x16x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_bf8",
     "llvm.amdgcn.smfmac.f32.16x16x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_fp8",
+    "llvm.amdgcn.smfmac.f32.16x16x64.f16" => "__builtin_amdgcn_smfmac_f32_16x16x64_f16",
     "llvm.amdgcn.smfmac.f32.16x16x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_bf8",
     "llvm.amdgcn.smfmac.f32.16x16x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_fp8",
     "llvm.amdgcn.smfmac.f32.32x32x16.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x16_bf16",
     "llvm.amdgcn.smfmac.f32.32x32x16.f16" => "__builtin_amdgcn_smfmac_f32_32x32x16_f16",
+    "llvm.amdgcn.smfmac.f32.32x32x32.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf16",
     "llvm.amdgcn.smfmac.f32.32x32x32.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_bf8",
     "llvm.amdgcn.smfmac.f32.32x32x32.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_fp8",
+    "llvm.amdgcn.smfmac.f32.32x32x32.f16" => "__builtin_amdgcn_smfmac_f32_32x32x32_f16",
     "llvm.amdgcn.smfmac.f32.32x32x32.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_bf8",
     "llvm.amdgcn.smfmac.f32.32x32x32.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_fp8",
+    "llvm.amdgcn.smfmac.f32.32x32x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x64_bf8_bf8",
+    "llvm.amdgcn.smfmac.f32.32x32x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x64_bf8_fp8",
+    "llvm.amdgcn.smfmac.f32.32x32x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x64_fp8_bf8",
+    "llvm.amdgcn.smfmac.f32.32x32x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x64_fp8_fp8",
+    "llvm.amdgcn.smfmac.i32.16x16x128.i8" => "__builtin_amdgcn_smfmac_i32_16x16x128_i8",
     "llvm.amdgcn.smfmac.i32.16x16x64.i8" => "__builtin_amdgcn_smfmac_i32_16x16x64_i8",
     "llvm.amdgcn.smfmac.i32.32x32x32.i8" => "__builtin_amdgcn_smfmac_i32_32x32x32_i8",
+    "llvm.amdgcn.smfmac.i32.32x32x64.i8" => "__builtin_amdgcn_smfmac_i32_32x32x64_i8",
     "llvm.amdgcn.sudot4" => "__builtin_amdgcn_sudot4",
     "llvm.amdgcn.sudot8" => "__builtin_amdgcn_sudot8",
     "llvm.amdgcn.udot2" => "__builtin_amdgcn_udot2",
@@ -227,6 +303,9 @@ match name {
     "llvm.amdgcn.workgroup.id.x" => "__builtin_amdgcn_workgroup_id_x",
     "llvm.amdgcn.workgroup.id.y" => "__builtin_amdgcn_workgroup_id_y",
     "llvm.amdgcn.workgroup.id.z" => "__builtin_amdgcn_workgroup_id_z",
+    "llvm.amdgcn.workitem.id.x" => "__builtin_amdgcn_workitem_id_x",
+    "llvm.amdgcn.workitem.id.y" => "__builtin_amdgcn_workitem_id_y",
+    "llvm.amdgcn.workitem.id.z" => "__builtin_amdgcn_workitem_id_z",
     // arm
     "llvm.arm.cdp" => "__builtin_arm_cdp",
     "llvm.arm.cdp2" => "__builtin_arm_cdp2",
@@ -342,8 +421,6 @@ match name {
     "llvm.bpf.pseudo" => "__builtin_bpf_pseudo",
     // cuda
     "llvm.cuda.syncthreads" => "__syncthreads",
-    // dx
-    "llvm.dx.create.handle" => "__builtin_hlsl_create_handle",
     // hexagon
     "llvm.hexagon.A2.abs" => "__builtin_HEXAGON_A2_abs",
     "llvm.hexagon.A2.absp" => "__builtin_HEXAGON_A2_absp",
@@ -1255,6 +1332,10 @@ match name {
     "llvm.hexagon.SI.to.SXTHI.asrh" => "__builtin_SI_to_SXTHI_asrh",
     "llvm.hexagon.V6.extractw" => "__builtin_HEXAGON_V6_extractw",
     "llvm.hexagon.V6.extractw.128B" => "__builtin_HEXAGON_V6_extractw_128B",
+    "llvm.hexagon.V6.get.qfext" => "__builtin_HEXAGON_V6_get_qfext",
+    "llvm.hexagon.V6.get.qfext.128B" => "__builtin_HEXAGON_V6_get_qfext_128B",
+    "llvm.hexagon.V6.get.qfext.oracc" => "__builtin_HEXAGON_V6_get_qfext_oracc",
+    "llvm.hexagon.V6.get.qfext.oracc.128B" => "__builtin_HEXAGON_V6_get_qfext_oracc_128B",
     "llvm.hexagon.V6.hi" => "__builtin_HEXAGON_V6_hi",
     "llvm.hexagon.V6.hi.128B" => "__builtin_HEXAGON_V6_hi_128B",
     "llvm.hexagon.V6.lo" => "__builtin_HEXAGON_V6_lo",
@@ -1281,6 +1362,8 @@ match name {
     "llvm.hexagon.V6.pred.scalar2v2.128B" => "__builtin_HEXAGON_V6_pred_scalar2v2_128B",
     "llvm.hexagon.V6.pred.xor" => "__builtin_HEXAGON_V6_pred_xor",
     "llvm.hexagon.V6.pred.xor.128B" => "__builtin_HEXAGON_V6_pred_xor_128B",
+    "llvm.hexagon.V6.set.qfext" => "__builtin_HEXAGON_V6_set_qfext",
+    "llvm.hexagon.V6.set.qfext.128B" => "__builtin_HEXAGON_V6_set_qfext_128B",
     "llvm.hexagon.V6.shuffeqh" => "__builtin_HEXAGON_V6_shuffeqh",
     "llvm.hexagon.V6.shuffeqh.128B" => "__builtin_HEXAGON_V6_shuffeqh_128B",
     "llvm.hexagon.V6.shuffeqw" => "__builtin_HEXAGON_V6_shuffeqw",
@@ -1301,6 +1384,8 @@ match name {
     "llvm.hexagon.V6.vS32b.nt.qpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nt_qpred_ai_128B",
     "llvm.hexagon.V6.vS32b.qpred.ai" => "__builtin_HEXAGON_V6_vS32b_qpred_ai",
     "llvm.hexagon.V6.vS32b.qpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_qpred_ai_128B",
+    "llvm.hexagon.V6.vabs.f8" => "__builtin_HEXAGON_V6_vabs_f8",
+    "llvm.hexagon.V6.vabs.f8.128B" => "__builtin_HEXAGON_V6_vabs_f8_128B",
     "llvm.hexagon.V6.vabs.hf" => "__builtin_HEXAGON_V6_vabs_hf",
     "llvm.hexagon.V6.vabs.hf.128B" => "__builtin_HEXAGON_V6_vabs_hf_128B",
     "llvm.hexagon.V6.vabs.sf" => "__builtin_HEXAGON_V6_vabs_sf",
@@ -1327,6 +1412,8 @@ match name {
     "llvm.hexagon.V6.vabsw.sat.128B" => "__builtin_HEXAGON_V6_vabsw_sat_128B",
     "llvm.hexagon.V6.vadd.hf" => "__builtin_HEXAGON_V6_vadd_hf",
     "llvm.hexagon.V6.vadd.hf.128B" => "__builtin_HEXAGON_V6_vadd_hf_128B",
+    "llvm.hexagon.V6.vadd.hf.f8" => "__builtin_HEXAGON_V6_vadd_hf_f8",
+    "llvm.hexagon.V6.vadd.hf.f8.128B" => "__builtin_HEXAGON_V6_vadd_hf_f8_128B",
     "llvm.hexagon.V6.vadd.hf.hf" => "__builtin_HEXAGON_V6_vadd_hf_hf",
     "llvm.hexagon.V6.vadd.hf.hf.128B" => "__builtin_HEXAGON_V6_vadd_hf_hf_128B",
     "llvm.hexagon.V6.vadd.qf16" => "__builtin_HEXAGON_V6_vadd_qf16",
@@ -1549,10 +1636,14 @@ match name {
     "llvm.hexagon.V6.vcvt.b.hf.128B" => "__builtin_HEXAGON_V6_vcvt_b_hf_128B",
     "llvm.hexagon.V6.vcvt.bf.sf" => "__builtin_HEXAGON_V6_vcvt_bf_sf",
     "llvm.hexagon.V6.vcvt.bf.sf.128B" => "__builtin_HEXAGON_V6_vcvt_bf_sf_128B",
+    "llvm.hexagon.V6.vcvt.f8.hf" => "__builtin_HEXAGON_V6_vcvt_f8_hf",
+    "llvm.hexagon.V6.vcvt.f8.hf.128B" => "__builtin_HEXAGON_V6_vcvt_f8_hf_128B",
     "llvm.hexagon.V6.vcvt.h.hf" => "__builtin_HEXAGON_V6_vcvt_h_hf",
     "llvm.hexagon.V6.vcvt.h.hf.128B" => "__builtin_HEXAGON_V6_vcvt_h_hf_128B",
     "llvm.hexagon.V6.vcvt.hf.b" => "__builtin_HEXAGON_V6_vcvt_hf_b",
     "llvm.hexagon.V6.vcvt.hf.b.128B" => "__builtin_HEXAGON_V6_vcvt_hf_b_128B",
+    "llvm.hexagon.V6.vcvt.hf.f8" => "__builtin_HEXAGON_V6_vcvt_hf_f8",
+    "llvm.hexagon.V6.vcvt.hf.f8.128B" => "__builtin_HEXAGON_V6_vcvt_hf_f8_128B",
     "llvm.hexagon.V6.vcvt.hf.h" => "__builtin_HEXAGON_V6_vcvt_hf_h",
     "llvm.hexagon.V6.vcvt.hf.h.128B" => "__builtin_HEXAGON_V6_vcvt_hf_h_128B",
     "llvm.hexagon.V6.vcvt.hf.sf" => "__builtin_HEXAGON_V6_vcvt_hf_sf",
@@ -1567,6 +1658,14 @@ match name {
     "llvm.hexagon.V6.vcvt.ub.hf.128B" => "__builtin_HEXAGON_V6_vcvt_ub_hf_128B",
     "llvm.hexagon.V6.vcvt.uh.hf" => "__builtin_HEXAGON_V6_vcvt_uh_hf",
     "llvm.hexagon.V6.vcvt.uh.hf.128B" => "__builtin_HEXAGON_V6_vcvt_uh_hf_128B",
+    "llvm.hexagon.V6.vcvt2.b.hf" => "__builtin_HEXAGON_V6_vcvt2_b_hf",
+    "llvm.hexagon.V6.vcvt2.b.hf.128B" => "__builtin_HEXAGON_V6_vcvt2_b_hf_128B",
+    "llvm.hexagon.V6.vcvt2.hf.b" => "__builtin_HEXAGON_V6_vcvt2_hf_b",
+    "llvm.hexagon.V6.vcvt2.hf.b.128B" => "__builtin_HEXAGON_V6_vcvt2_hf_b_128B",
+    "llvm.hexagon.V6.vcvt2.hf.ub" => "__builtin_HEXAGON_V6_vcvt2_hf_ub",
+    "llvm.hexagon.V6.vcvt2.hf.ub.128B" => "__builtin_HEXAGON_V6_vcvt2_hf_ub_128B",
+    "llvm.hexagon.V6.vcvt2.ub.hf" => "__builtin_HEXAGON_V6_vcvt2_ub_hf",
+    "llvm.hexagon.V6.vcvt2.ub.hf.128B" => "__builtin_HEXAGON_V6_vcvt2_ub_hf_128B",
     "llvm.hexagon.V6.vd0" => "__builtin_HEXAGON_V6_vd0",
     "llvm.hexagon.V6.vd0.128B" => "__builtin_HEXAGON_V6_vd0_128B",
     "llvm.hexagon.V6.vdd0" => "__builtin_HEXAGON_V6_vdd0",
@@ -1649,14 +1748,20 @@ match name {
     "llvm.hexagon.V6.veqw.or.128B" => "__builtin_HEXAGON_V6_veqw_or_128B",
     "llvm.hexagon.V6.veqw.xor" => "__builtin_HEXAGON_V6_veqw_xor",
     "llvm.hexagon.V6.veqw.xor.128B" => "__builtin_HEXAGON_V6_veqw_xor_128B",
+    "llvm.hexagon.V6.vfmax.f8" => "__builtin_HEXAGON_V6_vfmax_f8",
+    "llvm.hexagon.V6.vfmax.f8.128B" => "__builtin_HEXAGON_V6_vfmax_f8_128B",
     "llvm.hexagon.V6.vfmax.hf" => "__builtin_HEXAGON_V6_vfmax_hf",
     "llvm.hexagon.V6.vfmax.hf.128B" => "__builtin_HEXAGON_V6_vfmax_hf_128B",
     "llvm.hexagon.V6.vfmax.sf" => "__builtin_HEXAGON_V6_vfmax_sf",
     "llvm.hexagon.V6.vfmax.sf.128B" => "__builtin_HEXAGON_V6_vfmax_sf_128B",
+    "llvm.hexagon.V6.vfmin.f8" => "__builtin_HEXAGON_V6_vfmin_f8",
+    "llvm.hexagon.V6.vfmin.f8.128B" => "__builtin_HEXAGON_V6_vfmin_f8_128B",
     "llvm.hexagon.V6.vfmin.hf" => "__builtin_HEXAGON_V6_vfmin_hf",
     "llvm.hexagon.V6.vfmin.hf.128B" => "__builtin_HEXAGON_V6_vfmin_hf_128B",
     "llvm.hexagon.V6.vfmin.sf" => "__builtin_HEXAGON_V6_vfmin_sf",
     "llvm.hexagon.V6.vfmin.sf.128B" => "__builtin_HEXAGON_V6_vfmin_sf_128B",
+    "llvm.hexagon.V6.vfneg.f8" => "__builtin_HEXAGON_V6_vfneg_f8",
+    "llvm.hexagon.V6.vfneg.f8.128B" => "__builtin_HEXAGON_V6_vfneg_f8_128B",
     "llvm.hexagon.V6.vfneg.hf" => "__builtin_HEXAGON_V6_vfneg_hf",
     "llvm.hexagon.V6.vfneg.hf.128B" => "__builtin_HEXAGON_V6_vfneg_hf_128B",
     "llvm.hexagon.V6.vfneg.sf" => "__builtin_HEXAGON_V6_vfneg_sf",
@@ -1807,6 +1912,8 @@ match name {
     "llvm.hexagon.V6.vmaxuh.128B" => "__builtin_HEXAGON_V6_vmaxuh_128B",
     "llvm.hexagon.V6.vmaxw" => "__builtin_HEXAGON_V6_vmaxw",
     "llvm.hexagon.V6.vmaxw.128B" => "__builtin_HEXAGON_V6_vmaxw_128B",
+    "llvm.hexagon.V6.vmerge.qf" => "__builtin_HEXAGON_V6_vmerge_qf",
+    "llvm.hexagon.V6.vmerge.qf.128B" => "__builtin_HEXAGON_V6_vmerge_qf_128B",
     "llvm.hexagon.V6.vmin.bf" => "__builtin_HEXAGON_V6_vmin_bf",
     "llvm.hexagon.V6.vmin.bf.128B" => "__builtin_HEXAGON_V6_vmin_bf_128B",
     "llvm.hexagon.V6.vmin.hf" => "__builtin_HEXAGON_V6_vmin_hf",
@@ -1849,6 +1956,10 @@ match name {
     "llvm.hexagon.V6.vmpauhuhsat.128B" => "__builtin_HEXAGON_V6_vmpauhuhsat_128B",
     "llvm.hexagon.V6.vmpsuhuhsat" => "__builtin_HEXAGON_V6_vmpsuhuhsat",
     "llvm.hexagon.V6.vmpsuhuhsat.128B" => "__builtin_HEXAGON_V6_vmpsuhuhsat_128B",
+    "llvm.hexagon.V6.vmpy.hf.f8" => "__builtin_HEXAGON_V6_vmpy_hf_f8",
+    "llvm.hexagon.V6.vmpy.hf.f8.128B" => "__builtin_HEXAGON_V6_vmpy_hf_f8_128B",
+    "llvm.hexagon.V6.vmpy.hf.f8.acc" => "__builtin_HEXAGON_V6_vmpy_hf_f8_acc",
+    "llvm.hexagon.V6.vmpy.hf.f8.acc.128B" => "__builtin_HEXAGON_V6_vmpy_hf_f8_acc_128B",
     "llvm.hexagon.V6.vmpy.hf.hf" => "__builtin_HEXAGON_V6_vmpy_hf_hf",
     "llvm.hexagon.V6.vmpy.hf.hf.128B" => "__builtin_HEXAGON_V6_vmpy_hf_hf_128B",
     "llvm.hexagon.V6.vmpy.hf.hf.acc" => "__builtin_HEXAGON_V6_vmpy_hf_hf_acc",
@@ -1869,6 +1980,12 @@ match name {
     "llvm.hexagon.V6.vmpy.qf32.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_qf16_128B",
     "llvm.hexagon.V6.vmpy.qf32.sf" => "__builtin_HEXAGON_V6_vmpy_qf32_sf",
     "llvm.hexagon.V6.vmpy.qf32.sf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_sf_128B",
+    "llvm.hexagon.V6.vmpy.rt.hf" => "__builtin_HEXAGON_V6_vmpy_rt_hf",
+    "llvm.hexagon.V6.vmpy.rt.hf.128B" => "__builtin_HEXAGON_V6_vmpy_rt_hf_128B",
+    "llvm.hexagon.V6.vmpy.rt.qf16" => "__builtin_HEXAGON_V6_vmpy_rt_qf16",
+    "llvm.hexagon.V6.vmpy.rt.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_rt_qf16_128B",
+    "llvm.hexagon.V6.vmpy.rt.sf" => "__builtin_HEXAGON_V6_vmpy_rt_sf",
+    "llvm.hexagon.V6.vmpy.rt.sf.128B" => "__builtin_HEXAGON_V6_vmpy_rt_sf_128B",
     "llvm.hexagon.V6.vmpy.sf.bf" => "__builtin_HEXAGON_V6_vmpy_sf_bf",
     "llvm.hexagon.V6.vmpy.sf.bf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_bf_128B",
     "llvm.hexagon.V6.vmpy.sf.bf.acc" => "__builtin_HEXAGON_V6_vmpy_sf_bf_acc",
@@ -2127,6 +2244,8 @@ match name {
     "llvm.hexagon.V6.vshufoh.128B" => "__builtin_HEXAGON_V6_vshufoh_128B",
     "llvm.hexagon.V6.vsub.hf" => "__builtin_HEXAGON_V6_vsub_hf",
     "llvm.hexagon.V6.vsub.hf.128B" => "__builtin_HEXAGON_V6_vsub_hf_128B",
+    "llvm.hexagon.V6.vsub.hf.f8" => "__builtin_HEXAGON_V6_vsub_hf_f8",
+    "llvm.hexagon.V6.vsub.hf.f8.128B" => "__builtin_HEXAGON_V6_vsub_hf_f8_128B",
     "llvm.hexagon.V6.vsub.hf.hf" => "__builtin_HEXAGON_V6_vsub_hf_hf",
     "llvm.hexagon.V6.vsub.hf.hf.128B" => "__builtin_HEXAGON_V6_vsub_hf_hf_128B",
     "llvm.hexagon.V6.vsub.qf16" => "__builtin_HEXAGON_V6_vsub_qf16",
@@ -4445,8 +4564,6 @@ match name {
     "llvm.mips.xor.v" => "__builtin_msa_xor_v",
     "llvm.mips.xori.b" => "__builtin_msa_xori_b",
     // nvvm
-    "llvm.nvvm.abs.bf16" => "__nvvm_abs_bf16",
-    "llvm.nvvm.abs.bf16x2" => "__nvvm_abs_bf16x2",
     "llvm.nvvm.abs.i" => "__nvvm_abs_i",
     "llvm.nvvm.abs.ll" => "__nvvm_abs_ll",
     "llvm.nvvm.activemask" => "__nvvm_activemask",
@@ -4473,6 +4590,10 @@ match name {
     "llvm.nvvm.barrier0.and" => "__nvvm_bar0_and",
     "llvm.nvvm.barrier0.or" => "__nvvm_bar0_or",
     "llvm.nvvm.barrier0.popc" => "__nvvm_bar0_popc",
+    "llvm.nvvm.bf16x2.to.ue8m0x2.rp" => "__nvvm_bf16x2_to_ue8m0x2_rp",
+    "llvm.nvvm.bf16x2.to.ue8m0x2.rp.satfinite" => "__nvvm_bf16x2_to_ue8m0x2_rp_satfinite",
+    "llvm.nvvm.bf16x2.to.ue8m0x2.rz" => "__nvvm_bf16x2_to_ue8m0x2_rz",
+    "llvm.nvvm.bf16x2.to.ue8m0x2.rz.satfinite" => "__nvvm_bf16x2_to_ue8m0x2_rz_satfinite",
     "llvm.nvvm.bf2h.rn" => "__nvvm_bf2h_rn",
     "llvm.nvvm.bf2h.rn.ftz" => "__nvvm_bf2h_rn_ftz",
     "llvm.nvvm.bitcast.d2ll" => "__nvvm_bitcast_d2ll",
@@ -4523,6 +4644,8 @@ match name {
     "llvm.nvvm.d2ull.rz" => "__nvvm_d2ull_rz",
     "llvm.nvvm.div.approx.f" => "__nvvm_div_approx_f",
     "llvm.nvvm.div.approx.ftz.f" => "__nvvm_div_approx_ftz_f",
+    "llvm.nvvm.div.full" => "__nvvm_div_full",
+    "llvm.nvvm.div.full.ftz" => "__nvvm_div_full_ftz",
     "llvm.nvvm.div.rm.d" => "__nvvm_div_rm_d",
     "llvm.nvvm.div.rm.f" => "__nvvm_div_rm_f",
     "llvm.nvvm.div.rm.ftz.f" => "__nvvm_div_rm_ftz_f",
@@ -4535,6 +4658,10 @@ match name {
     "llvm.nvvm.div.rz.d" => "__nvvm_div_rz_d",
     "llvm.nvvm.div.rz.f" => "__nvvm_div_rz_f",
     "llvm.nvvm.div.rz.ftz.f" => "__nvvm_div_rz_ftz_f",
+    "llvm.nvvm.e2m3x2.to.f16x2.rn" => "__nvvm_e2m3x2_to_f16x2_rn",
+    "llvm.nvvm.e2m3x2.to.f16x2.rn.relu" => "__nvvm_e2m3x2_to_f16x2_rn_relu",
+    "llvm.nvvm.e3m2x2.to.f16x2.rn" => "__nvvm_e3m2x2_to_f16x2_rn",
+    "llvm.nvvm.e3m2x2.to.f16x2.rn.relu" => "__nvvm_e3m2x2_to_f16x2_rn_relu",
     "llvm.nvvm.e4m3x2.to.f16x2.rn" => "__nvvm_e4m3x2_to_f16x2_rn",
     "llvm.nvvm.e4m3x2.to.f16x2.rn.relu" => "__nvvm_e4m3x2_to_f16x2_rn_relu",
     "llvm.nvvm.e5m2x2.to.f16x2.rn" => "__nvvm_e5m2x2_to_f16x2_rn",
@@ -4569,7 +4696,16 @@ match name {
     "llvm.nvvm.f2ll.rp.ftz" => "__nvvm_f2ll_rp_ftz",
     "llvm.nvvm.f2ll.rz" => "__nvvm_f2ll_rz",
     "llvm.nvvm.f2ll.rz.ftz" => "__nvvm_f2ll_rz_ftz",
+    "llvm.nvvm.f2tf32.rn" => "__nvvm_f2tf32_rn",
+    "llvm.nvvm.f2tf32.rn.relu" => "__nvvm_f2tf32_rn_relu",
+    "llvm.nvvm.f2tf32.rn.relu.satfinite" => "__nvvm_f2tf32_rn_relu_satfinite",
+    "llvm.nvvm.f2tf32.rn.satfinite" => "__nvvm_f2tf32_rn_satfinite",
     "llvm.nvvm.f2tf32.rna" => "__nvvm_f2tf32_rna",
+    "llvm.nvvm.f2tf32.rna.satfinite" => "__nvvm_f2tf32_rna_satfinite",
+    "llvm.nvvm.f2tf32.rz" => "__nvvm_f2tf32_rz",
+    "llvm.nvvm.f2tf32.rz.relu" => "__nvvm_f2tf32_rz_relu",
+    "llvm.nvvm.f2tf32.rz.relu.satfinite" => "__nvvm_f2tf32_rz_relu_satfinite",
+    "llvm.nvvm.f2tf32.rz.satfinite" => "__nvvm_f2tf32_rz_satfinite",
     "llvm.nvvm.f2ui.rm" => "__nvvm_f2ui_rm",
     "llvm.nvvm.f2ui.rm.ftz" => "__nvvm_f2ui_rm_ftz",
     "llvm.nvvm.f2ui.rn" => "__nvvm_f2ui_rn",
@@ -4589,10 +4725,18 @@ match name {
     "llvm.nvvm.fabs.d" => "__nvvm_fabs_d",
     "llvm.nvvm.fabs.f" => "__nvvm_fabs_f",
     "llvm.nvvm.fabs.ftz.f" => "__nvvm_fabs_ftz_f",
+    "llvm.nvvm.ff.to.e2m3x2.rn.relu.satfinite" => "__nvvm_ff_to_e2m3x2_rn_relu_satfinite",
+    "llvm.nvvm.ff.to.e2m3x2.rn.satfinite" => "__nvvm_ff_to_e2m3x2_rn_satfinite",
+    "llvm.nvvm.ff.to.e3m2x2.rn.relu.satfinite" => "__nvvm_ff_to_e3m2x2_rn_relu_satfinite",
+    "llvm.nvvm.ff.to.e3m2x2.rn.satfinite" => "__nvvm_ff_to_e3m2x2_rn_satfinite",
     "llvm.nvvm.ff.to.e4m3x2.rn" => "__nvvm_ff_to_e4m3x2_rn",
     "llvm.nvvm.ff.to.e4m3x2.rn.relu" => "__nvvm_ff_to_e4m3x2_rn_relu",
     "llvm.nvvm.ff.to.e5m2x2.rn" => "__nvvm_ff_to_e5m2x2_rn",
     "llvm.nvvm.ff.to.e5m2x2.rn.relu" => "__nvvm_ff_to_e5m2x2_rn_relu",
+    "llvm.nvvm.ff.to.ue8m0x2.rp" => "__nvvm_ff_to_ue8m0x2_rp",
+    "llvm.nvvm.ff.to.ue8m0x2.rp.satfinite" => "__nvvm_ff_to_ue8m0x2_rp_satfinite",
+    "llvm.nvvm.ff.to.ue8m0x2.rz" => "__nvvm_ff_to_ue8m0x2_rz",
+    "llvm.nvvm.ff.to.ue8m0x2.rz.satfinite" => "__nvvm_ff_to_ue8m0x2_rz_satfinite",
     "llvm.nvvm.ff2bf16x2.rn" => "__nvvm_ff2bf16x2_rn",
     "llvm.nvvm.ff2bf16x2.rn.relu" => "__nvvm_ff2bf16x2_rn_relu",
     "llvm.nvvm.ff2bf16x2.rz" => "__nvvm_ff2bf16x2_rz",
@@ -4862,6 +5006,14 @@ match name {
     // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_",
     "llvm.nvvm.redux.sync.add" => "__nvvm_redux_sync_add",
     "llvm.nvvm.redux.sync.and" => "__nvvm_redux_sync_and",
+    "llvm.nvvm.redux.sync.fmax" => "__nvvm_redux_sync_fmax",
+    "llvm.nvvm.redux.sync.fmax.NaN" => "__nvvm_redux_sync_fmax_NaN",
+    "llvm.nvvm.redux.sync.fmax.abs" => "__nvvm_redux_sync_fmax_abs",
+    "llvm.nvvm.redux.sync.fmax.abs.NaN" => "__nvvm_redux_sync_fmax_abs_NaN",
+    "llvm.nvvm.redux.sync.fmin" => "__nvvm_redux_sync_fmin",
+    "llvm.nvvm.redux.sync.fmin.NaN" => "__nvvm_redux_sync_fmin_NaN",
+    "llvm.nvvm.redux.sync.fmin.abs" => "__nvvm_redux_sync_fmin_abs",
+    "llvm.nvvm.redux.sync.fmin.abs.NaN" => "__nvvm_redux_sync_fmin_abs_NaN",
     "llvm.nvvm.redux.sync.max" => "__nvvm_redux_sync_max",
     "llvm.nvvm.redux.sync.min" => "__nvvm_redux_sync_min",
     "llvm.nvvm.redux.sync.or" => "__nvvm_redux_sync_or",
@@ -5149,6 +5301,7 @@ match name {
     "llvm.nvvm.txq.num.mipmap.levels" => "__nvvm_txq_num_mipmap_levels",
     "llvm.nvvm.txq.num.samples" => "__nvvm_txq_num_samples",
     "llvm.nvvm.txq.width" => "__nvvm_txq_width",
+    "llvm.nvvm.ue8m0x2.to.bf16x2" => "__nvvm_ue8m0x2_to_bf16x2",
     "llvm.nvvm.ui2d.rm" => "__nvvm_ui2d_rm",
     "llvm.nvvm.ui2d.rn" => "__nvvm_ui2d_rn",
     "llvm.nvvm.ui2d.rp" => "__nvvm_ui2d_rp",
@@ -5783,6 +5936,9 @@ match name {
     "llvm.r600.read.tgid.x" => "__builtin_r600_read_tgid_x",
     "llvm.r600.read.tgid.y" => "__builtin_r600_read_tgid_y",
     "llvm.r600.read.tgid.z" => "__builtin_r600_read_tgid_z",
+    "llvm.r600.read.tidig.x" => "__builtin_r600_read_tidig_x",
+    "llvm.r600.read.tidig.y" => "__builtin_r600_read_tidig_y",
+    "llvm.r600.read.tidig.z" => "__builtin_r600_read_tidig_z",
     // riscv
     "llvm.riscv.aes32dsi" => "__builtin_riscv_aes32dsi",
     "llvm.riscv.aes32dsmi" => "__builtin_riscv_aes32dsmi",
@@ -5806,6 +5962,8 @@ match name {
     "llvm.riscv.sha512sum1" => "__builtin_riscv_sha512sum1",
     "llvm.riscv.sha512sum1r" => "__builtin_riscv_sha512sum1r",
     // s390
+    "llvm.s390.bdepg" => "__builtin_s390_bdepg",
+    "llvm.s390.bextg" => "__builtin_s390_bextg",
     "llvm.s390.efpc" => "__builtin_s390_efpc",
     "llvm.s390.etnd" => "__builtin_tx_nesting_depth",
     "llvm.s390.lcbb" => "__builtin_s390_lcbb",
@@ -5828,6 +5986,8 @@ match name {
     "llvm.s390.vavglf" => "__builtin_s390_vavglf",
     "llvm.s390.vavglg" => "__builtin_s390_vavglg",
     "llvm.s390.vavglh" => "__builtin_s390_vavglh",
+    "llvm.s390.vavglq" => "__builtin_s390_vavglq",
+    "llvm.s390.vavgq" => "__builtin_s390_vavgq",
     "llvm.s390.vbperm" => "__builtin_s390_vbperm",
     "llvm.s390.vcfn" => "__builtin_s390_vcfn",
     "llvm.s390.vcksm" => "__builtin_s390_vcksm",
@@ -5839,6 +5999,7 @@ match name {
     "llvm.s390.verimf" => "__builtin_s390_verimf",
     "llvm.s390.verimg" => "__builtin_s390_verimg",
     "llvm.s390.verimh" => "__builtin_s390_verimh",
+    "llvm.s390.veval" => "__builtin_s390_veval",
     "llvm.s390.vfaeb" => "__builtin_s390_vfaeb",
     "llvm.s390.vfaef" => "__builtin_s390_vfaef",
     "llvm.s390.vfaeh" => "__builtin_s390_vfaeh",
@@ -5857,6 +6018,11 @@ match name {
     "llvm.s390.vfenezb" => "__builtin_s390_vfenezb",
     "llvm.s390.vfenezf" => "__builtin_s390_vfenezf",
     "llvm.s390.vfenezh" => "__builtin_s390_vfenezh",
+    "llvm.s390.vgemb" => "__builtin_s390_vgemb",
+    "llvm.s390.vgemf" => "__builtin_s390_vgemf",
+    "llvm.s390.vgemg" => "__builtin_s390_vgemg",
+    "llvm.s390.vgemh" => "__builtin_s390_vgemh",
+    "llvm.s390.vgemq" => "__builtin_s390_vgemq",
     "llvm.s390.vgfmab" => "__builtin_s390_vgfmab",
     "llvm.s390.vgfmaf" => "__builtin_s390_vgfmaf",
     "llvm.s390.vgfmag" => "__builtin_s390_vgfmag",
@@ -5873,39 +6039,55 @@ match name {
     "llvm.s390.vlrl" => "__builtin_s390_vlrlr",
     "llvm.s390.vmaeb" => "__builtin_s390_vmaeb",
     "llvm.s390.vmaef" => "__builtin_s390_vmaef",
+    "llvm.s390.vmaeg" => "__builtin_s390_vmaeg",
     "llvm.s390.vmaeh" => "__builtin_s390_vmaeh",
     "llvm.s390.vmahb" => "__builtin_s390_vmahb",
     "llvm.s390.vmahf" => "__builtin_s390_vmahf",
+    "llvm.s390.vmahg" => "__builtin_s390_vmahg",
     "llvm.s390.vmahh" => "__builtin_s390_vmahh",
+    "llvm.s390.vmahq" => "__builtin_s390_vmahq",
     "llvm.s390.vmaleb" => "__builtin_s390_vmaleb",
     "llvm.s390.vmalef" => "__builtin_s390_vmalef",
+    "llvm.s390.vmaleg" => "__builtin_s390_vmaleg",
     "llvm.s390.vmaleh" => "__builtin_s390_vmaleh",
     "llvm.s390.vmalhb" => "__builtin_s390_vmalhb",
     "llvm.s390.vmalhf" => "__builtin_s390_vmalhf",
+    "llvm.s390.vmalhg" => "__builtin_s390_vmalhg",
     "llvm.s390.vmalhh" => "__builtin_s390_vmalhh",
+    "llvm.s390.vmalhq" => "__builtin_s390_vmalhq",
     "llvm.s390.vmalob" => "__builtin_s390_vmalob",
     "llvm.s390.vmalof" => "__builtin_s390_vmalof",
+    "llvm.s390.vmalog" => "__builtin_s390_vmalog",
     "llvm.s390.vmaloh" => "__builtin_s390_vmaloh",
     "llvm.s390.vmaob" => "__builtin_s390_vmaob",
     "llvm.s390.vmaof" => "__builtin_s390_vmaof",
+    "llvm.s390.vmaog" => "__builtin_s390_vmaog",
     "llvm.s390.vmaoh" => "__builtin_s390_vmaoh",
     "llvm.s390.vmeb" => "__builtin_s390_vmeb",
     "llvm.s390.vmef" => "__builtin_s390_vmef",
+    "llvm.s390.vmeg" => "__builtin_s390_vmeg",
     "llvm.s390.vmeh" => "__builtin_s390_vmeh",
     "llvm.s390.vmhb" => "__builtin_s390_vmhb",
     "llvm.s390.vmhf" => "__builtin_s390_vmhf",
+    "llvm.s390.vmhg" => "__builtin_s390_vmhg",
     "llvm.s390.vmhh" => "__builtin_s390_vmhh",
+    "llvm.s390.vmhq" => "__builtin_s390_vmhq",
     "llvm.s390.vmleb" => "__builtin_s390_vmleb",
     "llvm.s390.vmlef" => "__builtin_s390_vmlef",
+    "llvm.s390.vmleg" => "__builtin_s390_vmleg",
     "llvm.s390.vmleh" => "__builtin_s390_vmleh",
     "llvm.s390.vmlhb" => "__builtin_s390_vmlhb",
     "llvm.s390.vmlhf" => "__builtin_s390_vmlhf",
+    "llvm.s390.vmlhg" => "__builtin_s390_vmlhg",
     "llvm.s390.vmlhh" => "__builtin_s390_vmlhh",
+    "llvm.s390.vmlhq" => "__builtin_s390_vmlhq",
     "llvm.s390.vmlob" => "__builtin_s390_vmlob",
     "llvm.s390.vmlof" => "__builtin_s390_vmlof",
+    "llvm.s390.vmlog" => "__builtin_s390_vmlog",
     "llvm.s390.vmloh" => "__builtin_s390_vmloh",
     "llvm.s390.vmob" => "__builtin_s390_vmob",
     "llvm.s390.vmof" => "__builtin_s390_vmof",
+    "llvm.s390.vmog" => "__builtin_s390_vmog",
     "llvm.s390.vmoh" => "__builtin_s390_vmoh",
     "llvm.s390.vmslg" => "__builtin_s390_vmslg",
     "llvm.s390.vpdi" => "__builtin_s390_vpdi",
@@ -5950,18 +6132,20 @@ match name {
     "llvm.s390.vtm" => "__builtin_s390_vtm",
     "llvm.s390.vuphb" => "__builtin_s390_vuphb",
     "llvm.s390.vuphf" => "__builtin_s390_vuphf",
+    "llvm.s390.vuphg" => "__builtin_s390_vuphg",
     "llvm.s390.vuphh" => "__builtin_s390_vuphh",
     "llvm.s390.vuplb" => "__builtin_s390_vuplb",
     "llvm.s390.vuplf" => "__builtin_s390_vuplf",
+    "llvm.s390.vuplg" => "__builtin_s390_vuplg",
     "llvm.s390.vuplhb" => "__builtin_s390_vuplhb",
     "llvm.s390.vuplhf" => "__builtin_s390_vuplhf",
+    "llvm.s390.vuplhg" => "__builtin_s390_vuplhg",
     "llvm.s390.vuplhh" => "__builtin_s390_vuplhh",
     "llvm.s390.vuplhw" => "__builtin_s390_vuplhw",
     "llvm.s390.vupllb" => "__builtin_s390_vupllb",
     "llvm.s390.vupllf" => "__builtin_s390_vupllf",
+    "llvm.s390.vupllg" => "__builtin_s390_vupllg",
     "llvm.s390.vupllh" => "__builtin_s390_vupllh",
-    // spv
-    "llvm.spv.create.handle" => "__builtin_hlsl_create_handle",
     // ve
     "llvm.ve.vl.andm.MMM" => "__builtin_ve_vl_andm_MMM",
     "llvm.ve.vl.andm.mmm" => "__builtin_ve_vl_andm_mmm",
@@ -7328,6 +7512,27 @@ match name {
     "llvm.x86.avx.vtestz.ps.256" => "__builtin_ia32_vtestzps256",
     "llvm.x86.avx.vzeroall" => "__builtin_ia32_vzeroall",
     "llvm.x86.avx.vzeroupper" => "__builtin_ia32_vzeroupper",
+    "llvm.x86.avx10.mask.getexp.bf16.128" => "__builtin_ia32_vgetexpbf16128_mask",
+    "llvm.x86.avx10.mask.getexp.bf16.256" => "__builtin_ia32_vgetexpbf16256_mask",
+    "llvm.x86.avx10.mask.getexp.bf16.512" => "__builtin_ia32_vgetexpbf16512_mask",
+    "llvm.x86.avx10.mask.getmant.bf16.128" => "__builtin_ia32_vgetmantbf16128_mask",
+    "llvm.x86.avx10.mask.getmant.bf16.256" => "__builtin_ia32_vgetmantbf16256_mask",
+    "llvm.x86.avx10.mask.getmant.bf16.512" => "__builtin_ia32_vgetmantbf16512_mask",
+    "llvm.x86.avx10.mask.rcp.bf16.128" => "__builtin_ia32_vrcpbf16128_mask",
+    "llvm.x86.avx10.mask.rcp.bf16.256" => "__builtin_ia32_vrcpbf16256_mask",
+    "llvm.x86.avx10.mask.rcp.bf16.512" => "__builtin_ia32_vrcpbf16512_mask",
+    "llvm.x86.avx10.mask.reduce.bf16.128" => "__builtin_ia32_vreducebf16128_mask",
+    "llvm.x86.avx10.mask.reduce.bf16.256" => "__builtin_ia32_vreducebf16256_mask",
+    "llvm.x86.avx10.mask.reduce.bf16.512" => "__builtin_ia32_vreducebf16512_mask",
+    "llvm.x86.avx10.mask.rndscale.bf16.128" => "__builtin_ia32_vrndscalebf16_128_mask",
+    "llvm.x86.avx10.mask.rndscale.bf16.256" => "__builtin_ia32_vrndscalebf16_256_mask",
+    "llvm.x86.avx10.mask.rndscale.bf16.512" => "__builtin_ia32_vrndscalebf16_mask",
+    "llvm.x86.avx10.mask.rsqrt.bf16.128" => "__builtin_ia32_vrsqrtbf16128_mask",
+    "llvm.x86.avx10.mask.rsqrt.bf16.256" => "__builtin_ia32_vrsqrtbf16256_mask",
+    "llvm.x86.avx10.mask.rsqrt.bf16.512" => "__builtin_ia32_vrsqrtbf16512_mask",
+    "llvm.x86.avx10.mask.scalef.bf16.128" => "__builtin_ia32_vscalefbf16128_mask",
+    "llvm.x86.avx10.mask.scalef.bf16.256" => "__builtin_ia32_vscalefbf16256_mask",
+    "llvm.x86.avx10.mask.scalef.bf16.512" => "__builtin_ia32_vscalefbf16512_mask",
     "llvm.x86.avx10.mask.vcvt2ps2phx.128" => "__builtin_ia32_vcvt2ps2phx128_mask",
     "llvm.x86.avx10.mask.vcvt2ps2phx.256" => "__builtin_ia32_vcvt2ps2phx256_mask",
     "llvm.x86.avx10.mask.vcvt2ps2phx.512" => "__builtin_ia32_vcvt2ps2phx512_mask",
@@ -7346,171 +7551,194 @@ match name {
     "llvm.x86.avx10.mask.vcvthf82ph128" => "__builtin_ia32_vcvthf8_2ph128_mask",
     "llvm.x86.avx10.mask.vcvthf82ph256" => "__builtin_ia32_vcvthf8_2ph256_mask",
     "llvm.x86.avx10.mask.vcvthf82ph512" => "__builtin_ia32_vcvthf8_2ph512_mask",
-    "llvm.x86.avx10.mask.vcvtneph2bf8128" => "__builtin_ia32_vcvtneph2bf8_128_mask",
-    "llvm.x86.avx10.mask.vcvtneph2bf8256" => "__builtin_ia32_vcvtneph2bf8_256_mask",
-    "llvm.x86.avx10.mask.vcvtneph2bf8512" => "__builtin_ia32_vcvtneph2bf8_512_mask",
-    "llvm.x86.avx10.mask.vcvtneph2bf8s128" => "__builtin_ia32_vcvtneph2bf8s_128_mask",
-    "llvm.x86.avx10.mask.vcvtneph2bf8s256" => "__builtin_ia32_vcvtneph2bf8s_256_mask",
-    "llvm.x86.avx10.mask.vcvtneph2bf8s512" => "__builtin_ia32_vcvtneph2bf8s_512_mask",
-    "llvm.x86.avx10.mask.vcvtneph2hf8128" => "__builtin_ia32_vcvtneph2hf8_128_mask",
-    "llvm.x86.avx10.mask.vcvtneph2hf8256" => "__builtin_ia32_vcvtneph2hf8_256_mask",
-    "llvm.x86.avx10.mask.vcvtneph2hf8512" => "__builtin_ia32_vcvtneph2hf8_512_mask",
-    "llvm.x86.avx10.mask.vcvtneph2hf8s128" => "__builtin_ia32_vcvtneph2hf8s_128_mask",
-    "llvm.x86.avx10.mask.vcvtneph2hf8s256" => "__builtin_ia32_vcvtneph2hf8s_256_mask",
-    "llvm.x86.avx10.mask.vcvtneph2hf8s512" => "__builtin_ia32_vcvtneph2hf8s_512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtpd2dq256" => "__builtin_ia32_vcvtpd2dq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtpd2ph256" => "__builtin_ia32_vcvtpd2ph256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtpd2ps256" => "__builtin_ia32_vcvtpd2ps256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtpd2qq256" => "__builtin_ia32_vcvtpd2qq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtpd2udq256" => "__builtin_ia32_vcvtpd2udq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtpd2uqq256" => "__builtin_ia32_vcvtpd2uqq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2dq256" => "__builtin_ia32_vcvtph2dq256_round_mask",
+    "llvm.x86.avx10.mask.vcvtph2bf8128" => "__builtin_ia32_vcvtph2bf8_128_mask",
+    "llvm.x86.avx10.mask.vcvtph2bf8256" => "__builtin_ia32_vcvtph2bf8_256_mask",
+    "llvm.x86.avx10.mask.vcvtph2bf8512" => "__builtin_ia32_vcvtph2bf8_512_mask",
+    "llvm.x86.avx10.mask.vcvtph2bf8s128" => "__builtin_ia32_vcvtph2bf8s_128_mask",
+    "llvm.x86.avx10.mask.vcvtph2bf8s256" => "__builtin_ia32_vcvtph2bf8s_256_mask",
+    "llvm.x86.avx10.mask.vcvtph2bf8s512" => "__builtin_ia32_vcvtph2bf8s_512_mask",
+    "llvm.x86.avx10.mask.vcvtph2hf8128" => "__builtin_ia32_vcvtph2hf8_128_mask",
+    "llvm.x86.avx10.mask.vcvtph2hf8256" => "__builtin_ia32_vcvtph2hf8_256_mask",
+    "llvm.x86.avx10.mask.vcvtph2hf8512" => "__builtin_ia32_vcvtph2hf8_512_mask",
+    "llvm.x86.avx10.mask.vcvtph2hf8s128" => "__builtin_ia32_vcvtph2hf8s_128_mask",
+    "llvm.x86.avx10.mask.vcvtph2hf8s256" => "__builtin_ia32_vcvtph2hf8s_256_mask",
+    "llvm.x86.avx10.mask.vcvtph2hf8s512" => "__builtin_ia32_vcvtph2hf8s_512_mask",
     "llvm.x86.avx10.mask.vcvtph2ibs128" => "__builtin_ia32_vcvtph2ibs128_mask",
     "llvm.x86.avx10.mask.vcvtph2ibs256" => "__builtin_ia32_vcvtph2ibs256_mask",
     "llvm.x86.avx10.mask.vcvtph2ibs512" => "__builtin_ia32_vcvtph2ibs512_mask",
     "llvm.x86.avx10.mask.vcvtph2iubs128" => "__builtin_ia32_vcvtph2iubs128_mask",
     "llvm.x86.avx10.mask.vcvtph2iubs256" => "__builtin_ia32_vcvtph2iubs256_mask",
     "llvm.x86.avx10.mask.vcvtph2iubs512" => "__builtin_ia32_vcvtph2iubs512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2pd256" => "__builtin_ia32_vcvtph2pd256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2psx256" => "__builtin_ia32_vcvtph2psx256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2qq256" => "__builtin_ia32_vcvtph2qq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2udq256" => "__builtin_ia32_vcvtph2udq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2uqq256" => "__builtin_ia32_vcvtph2uqq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2uw256" => "__builtin_ia32_vcvtph2uw256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtph2w256" => "__builtin_ia32_vcvtph2w256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2dq256" => "__builtin_ia32_vcvtps2dq256_round_mask",
     "llvm.x86.avx10.mask.vcvtps2ibs128" => "__builtin_ia32_vcvtps2ibs128_mask",
     "llvm.x86.avx10.mask.vcvtps2ibs256" => "__builtin_ia32_vcvtps2ibs256_mask",
     "llvm.x86.avx10.mask.vcvtps2ibs512" => "__builtin_ia32_vcvtps2ibs512_mask",
     "llvm.x86.avx10.mask.vcvtps2iubs128" => "__builtin_ia32_vcvtps2iubs128_mask",
     "llvm.x86.avx10.mask.vcvtps2iubs256" => "__builtin_ia32_vcvtps2iubs256_mask",
     "llvm.x86.avx10.mask.vcvtps2iubs512" => "__builtin_ia32_vcvtps2iubs512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2pd256" => "__builtin_ia32_vcvtps2pd256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2ph256" => "__builtin_ia32_vcvtps2ph256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2phx256" => "__builtin_ia32_vcvtps2phx256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2qq256" => "__builtin_ia32_vcvtps2qq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2udq256" => "__builtin_ia32_vcvtps2udq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvtps2uqq256" => "__builtin_ia32_vcvtps2uqq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2dq256" => "__builtin_ia32_vcvttpd2dq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2qq256" => "__builtin_ia32_vcvttpd2qq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2udq256" => "__builtin_ia32_vcvttpd2udq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2uqq256" => "__builtin_ia32_vcvttpd2uqq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttph2dq256" => "__builtin_ia32_vcvttph2dq256_round_mask",
+    "llvm.x86.avx10.mask.vcvttpd2dqs.128" => "__builtin_ia32_vcvttpd2dqs128_mask",
+    "llvm.x86.avx10.mask.vcvttpd2dqs.256" => "__builtin_ia32_vcvttpd2dqs256_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2dqs.round.512" => "__builtin_ia32_vcvttpd2dqs512_round_mask",
+    "llvm.x86.avx10.mask.vcvttpd2qqs.128" => "__builtin_ia32_vcvttpd2qqs128_mask",
+    "llvm.x86.avx10.mask.vcvttpd2qqs.256" => "__builtin_ia32_vcvttpd2qqs256_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2qqs.round.512" => "__builtin_ia32_vcvttpd2qqs512_round_mask",
+    "llvm.x86.avx10.mask.vcvttpd2udqs.128" => "__builtin_ia32_vcvttpd2udqs128_mask",
+    "llvm.x86.avx10.mask.vcvttpd2udqs.256" => "__builtin_ia32_vcvttpd2udqs256_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2udqs.round.512" => "__builtin_ia32_vcvttpd2udqs512_round_mask",
+    "llvm.x86.avx10.mask.vcvttpd2uqqs.128" => "__builtin_ia32_vcvttpd2uqqs128_mask",
+    "llvm.x86.avx10.mask.vcvttpd2uqqs.256" => "__builtin_ia32_vcvttpd2uqqs256_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2uqqs.round.512" => "__builtin_ia32_vcvttpd2uqqs512_round_mask",
     "llvm.x86.avx10.mask.vcvttph2ibs128" => "__builtin_ia32_vcvttph2ibs128_mask",
     "llvm.x86.avx10.mask.vcvttph2ibs256" => "__builtin_ia32_vcvttph2ibs256_mask",
     "llvm.x86.avx10.mask.vcvttph2ibs512" => "__builtin_ia32_vcvttph2ibs512_mask",
     "llvm.x86.avx10.mask.vcvttph2iubs128" => "__builtin_ia32_vcvttph2iubs128_mask",
     "llvm.x86.avx10.mask.vcvttph2iubs256" => "__builtin_ia32_vcvttph2iubs256_mask",
     "llvm.x86.avx10.mask.vcvttph2iubs512" => "__builtin_ia32_vcvttph2iubs512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttph2qq256" => "__builtin_ia32_vcvttph2qq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttph2udq256" => "__builtin_ia32_vcvttph2udq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttph2uqq256" => "__builtin_ia32_vcvttph2uqq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttph2uw256" => "__builtin_ia32_vcvttph2uw256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttph2w256" => "__builtin_ia32_vcvttph2w256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2dq256" => "__builtin_ia32_vcvttps2dq256_round_mask",
+    "llvm.x86.avx10.mask.vcvttps2dqs.128" => "__builtin_ia32_vcvttps2dqs128_mask",
+    "llvm.x86.avx10.mask.vcvttps2dqs.256" => "__builtin_ia32_vcvttps2dqs256_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2dqs.round.512" => "__builtin_ia32_vcvttps2dqs512_round_mask",
     "llvm.x86.avx10.mask.vcvttps2ibs128" => "__builtin_ia32_vcvttps2ibs128_mask",
     "llvm.x86.avx10.mask.vcvttps2ibs256" => "__builtin_ia32_vcvttps2ibs256_mask",
     "llvm.x86.avx10.mask.vcvttps2ibs512" => "__builtin_ia32_vcvttps2ibs512_mask",
     "llvm.x86.avx10.mask.vcvttps2iubs128" => "__builtin_ia32_vcvttps2iubs128_mask",
     "llvm.x86.avx10.mask.vcvttps2iubs256" => "__builtin_ia32_vcvttps2iubs256_mask",
     "llvm.x86.avx10.mask.vcvttps2iubs512" => "__builtin_ia32_vcvttps2iubs512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2qq256" => "__builtin_ia32_vcvttps2qq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2udq256" => "__builtin_ia32_vcvttps2udq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2uqq256" => "__builtin_ia32_vcvttps2uqq256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vfcmaddcph256" => "__builtin_ia32_vfcmaddcph256_round_mask3",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vfcmulcph256" => "__builtin_ia32_vfcmulcph256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vfixupimmpd256" => "__builtin_ia32_vfixupimmpd256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vfixupimmps256" => "__builtin_ia32_vfixupimmps256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vfmaddcph256" => "__builtin_ia32_vfmaddcph256_round_mask3",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vfmulcph256" => "__builtin_ia32_vfmulcph256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vgetexppd256" => "__builtin_ia32_vgetexppd256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vgetexpph256" => "__builtin_ia32_vgetexpph256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vgetexpps256" => "__builtin_ia32_vgetexpps256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vgetmantpd256" => "__builtin_ia32_vgetmantpd256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vgetmantph256" => "__builtin_ia32_vgetmantph256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vgetmantps256" => "__builtin_ia32_vgetmantps256_round_mask",
+    "llvm.x86.avx10.mask.vcvttps2qqs.128" => "__builtin_ia32_vcvttps2qqs128_mask",
+    "llvm.x86.avx10.mask.vcvttps2qqs.256" => "__builtin_ia32_vcvttps2qqs256_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2qqs.round.512" => "__builtin_ia32_vcvttps2qqs512_round_mask",
+    "llvm.x86.avx10.mask.vcvttps2udqs.128" => "__builtin_ia32_vcvttps2udqs128_mask",
+    "llvm.x86.avx10.mask.vcvttps2udqs.256" => "__builtin_ia32_vcvttps2udqs256_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2udqs.round.512" => "__builtin_ia32_vcvttps2udqs512_round_mask",
+    "llvm.x86.avx10.mask.vcvttps2uqqs.128" => "__builtin_ia32_vcvttps2uqqs128_mask",
+    "llvm.x86.avx10.mask.vcvttps2uqqs.256" => "__builtin_ia32_vcvttps2uqqs256_mask",
+    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2uqqs.round.512" => "__builtin_ia32_vcvttps2uqqs512_round_mask",
     // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxpd.round" => "__builtin_ia32_vminmaxpd512_round_mask",
     "llvm.x86.avx10.mask.vminmaxpd128" => "__builtin_ia32_vminmaxpd128_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxpd256.round" => "__builtin_ia32_vminmaxpd256_round_mask",
+    "llvm.x86.avx10.mask.vminmaxpd256" => "__builtin_ia32_vminmaxpd256_mask",
     // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxph.round" => "__builtin_ia32_vminmaxph512_round_mask",
     "llvm.x86.avx10.mask.vminmaxph128" => "__builtin_ia32_vminmaxph128_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxph256.round" => "__builtin_ia32_vminmaxph256_round_mask",
+    "llvm.x86.avx10.mask.vminmaxph256" => "__builtin_ia32_vminmaxph256_mask",
     // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxps.round" => "__builtin_ia32_vminmaxps512_round_mask",
     "llvm.x86.avx10.mask.vminmaxps128" => "__builtin_ia32_vminmaxps128_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxps256.round" => "__builtin_ia32_vminmaxps256_round_mask",
+    "llvm.x86.avx10.mask.vminmaxps256" => "__builtin_ia32_vminmaxps256_mask",
     // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxsd.round" => "__builtin_ia32_vminmaxsd_round_mask",
     // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxsh.round" => "__builtin_ia32_vminmaxsh_round_mask",
     // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxss.round" => "__builtin_ia32_vminmaxss_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vrangepd256" => "__builtin_ia32_vrangepd256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vrangeps256" => "__builtin_ia32_vrangeps256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vreducepd256" => "__builtin_ia32_vreducepd256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vreduceph256" => "__builtin_ia32_vreduceph256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vreduceps256" => "__builtin_ia32_vreduceps256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vrndscalepd256" => "__builtin_ia32_vrndscalepd256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vrndscaleph256" => "__builtin_ia32_vrndscaleph256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vrndscaleps256" => "__builtin_ia32_vrndscaleps256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vscalefpd256" => "__builtin_ia32_vscalefpd256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vscalefph256" => "__builtin_ia32_vscalefph256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vscalefps256" => "__builtin_ia32_vscalefps256_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.maskz.vfcmaddcph256" => "__builtin_ia32_vfcmaddcph256_round_maskz",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.maskz.vfixupimmpd256" => "__builtin_ia32_vfixupimmpd256_round_maskz",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.maskz.vfixupimmps256" => "__builtin_ia32_vfixupimmps256_round_maskz",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.maskz.vfmaddcph256" => "__builtin_ia32_vfmaddcph256_round_maskz",
+    "llvm.x86.avx10.vaddbf16128" => "__builtin_ia32_vaddbf16128",
+    "llvm.x86.avx10.vaddbf16256" => "__builtin_ia32_vaddbf16256",
+    "llvm.x86.avx10.vaddbf16512" => "__builtin_ia32_vaddbf16512",
     "llvm.x86.avx10.vaddpd256" => "__builtin_ia32_vaddpd256_round",
     "llvm.x86.avx10.vaddph256" => "__builtin_ia32_vaddph256_round",
     "llvm.x86.avx10.vaddps256" => "__builtin_ia32_vaddps256_round",
-    "llvm.x86.avx10.vcvtne2ph2bf8128" => "__builtin_ia32_vcvtne2ph2bf8_128",
-    "llvm.x86.avx10.vcvtne2ph2bf8256" => "__builtin_ia32_vcvtne2ph2bf8_256",
-    "llvm.x86.avx10.vcvtne2ph2bf8512" => "__builtin_ia32_vcvtne2ph2bf8_512",
-    "llvm.x86.avx10.vcvtne2ph2bf8s128" => "__builtin_ia32_vcvtne2ph2bf8s_128",
-    "llvm.x86.avx10.vcvtne2ph2bf8s256" => "__builtin_ia32_vcvtne2ph2bf8s_256",
-    "llvm.x86.avx10.vcvtne2ph2bf8s512" => "__builtin_ia32_vcvtne2ph2bf8s_512",
-    "llvm.x86.avx10.vcvtne2ph2hf8128" => "__builtin_ia32_vcvtne2ph2hf8_128",
-    "llvm.x86.avx10.vcvtne2ph2hf8256" => "__builtin_ia32_vcvtne2ph2hf8_256",
-    "llvm.x86.avx10.vcvtne2ph2hf8512" => "__builtin_ia32_vcvtne2ph2hf8_512",
-    "llvm.x86.avx10.vcvtne2ph2hf8s128" => "__builtin_ia32_vcvtne2ph2hf8s_128",
-    "llvm.x86.avx10.vcvtne2ph2hf8s256" => "__builtin_ia32_vcvtne2ph2hf8s_256",
-    "llvm.x86.avx10.vcvtne2ph2hf8s512" => "__builtin_ia32_vcvtne2ph2hf8s_512",
-    "llvm.x86.avx10.vcvtnebf162ibs128" => "__builtin_ia32_vcvtnebf162ibs128",
-    "llvm.x86.avx10.vcvtnebf162ibs256" => "__builtin_ia32_vcvtnebf162ibs256",
-    "llvm.x86.avx10.vcvtnebf162ibs512" => "__builtin_ia32_vcvtnebf162ibs512",
-    "llvm.x86.avx10.vcvtnebf162iubs128" => "__builtin_ia32_vcvtnebf162iubs128",
-    "llvm.x86.avx10.vcvtnebf162iubs256" => "__builtin_ia32_vcvtnebf162iubs256",
-    "llvm.x86.avx10.vcvtnebf162iubs512" => "__builtin_ia32_vcvtnebf162iubs512",
-    "llvm.x86.avx10.vcvttnebf162ibs128" => "__builtin_ia32_vcvttnebf162ibs128",
-    "llvm.x86.avx10.vcvttnebf162ibs256" => "__builtin_ia32_vcvttnebf162ibs256",
-    "llvm.x86.avx10.vcvttnebf162ibs512" => "__builtin_ia32_vcvttnebf162ibs512",
-    "llvm.x86.avx10.vcvttnebf162iubs128" => "__builtin_ia32_vcvttnebf162iubs128",
-    "llvm.x86.avx10.vcvttnebf162iubs256" => "__builtin_ia32_vcvttnebf162iubs256",
-    "llvm.x86.avx10.vcvttnebf162iubs512" => "__builtin_ia32_vcvttnebf162iubs512",
-    "llvm.x86.avx10.vdivpd256" => "__builtin_ia32_vdivpd256_round",
-    "llvm.x86.avx10.vdivph256" => "__builtin_ia32_vdivph256_round",
-    "llvm.x86.avx10.vdivps256" => "__builtin_ia32_vdivps256_round",
+    "llvm.x86.avx10.vcomisbf16eq" => "__builtin_ia32_vcomisbf16eq",
+    "llvm.x86.avx10.vcomisbf16ge" => "__builtin_ia32_vcomisbf16ge",
+    "llvm.x86.avx10.vcomisbf16gt" => "__builtin_ia32_vcomisbf16gt",
+    "llvm.x86.avx10.vcomisbf16le" => "__builtin_ia32_vcomisbf16le",
+    "llvm.x86.avx10.vcomisbf16lt" => "__builtin_ia32_vcomisbf16lt",
+    "llvm.x86.avx10.vcomisbf16neq" => "__builtin_ia32_vcomisbf16neq",
+    "llvm.x86.avx10.vcvt2ph2bf8128" => "__builtin_ia32_vcvt2ph2bf8_128",
+    "llvm.x86.avx10.vcvt2ph2bf8256" => "__builtin_ia32_vcvt2ph2bf8_256",
+    "llvm.x86.avx10.vcvt2ph2bf8512" => "__builtin_ia32_vcvt2ph2bf8_512",
+    "llvm.x86.avx10.vcvt2ph2bf8s128" => "__builtin_ia32_vcvt2ph2bf8s_128",
+    "llvm.x86.avx10.vcvt2ph2bf8s256" => "__builtin_ia32_vcvt2ph2bf8s_256",
+    "llvm.x86.avx10.vcvt2ph2bf8s512" => "__builtin_ia32_vcvt2ph2bf8s_512",
+    "llvm.x86.avx10.vcvt2ph2hf8128" => "__builtin_ia32_vcvt2ph2hf8_128",
+    "llvm.x86.avx10.vcvt2ph2hf8256" => "__builtin_ia32_vcvt2ph2hf8_256",
+    "llvm.x86.avx10.vcvt2ph2hf8512" => "__builtin_ia32_vcvt2ph2hf8_512",
+    "llvm.x86.avx10.vcvt2ph2hf8s128" => "__builtin_ia32_vcvt2ph2hf8s_128",
+    "llvm.x86.avx10.vcvt2ph2hf8s256" => "__builtin_ia32_vcvt2ph2hf8s_256",
+    "llvm.x86.avx10.vcvt2ph2hf8s512" => "__builtin_ia32_vcvt2ph2hf8s_512",
+    "llvm.x86.avx10.vcvtbf162ibs128" => "__builtin_ia32_vcvtbf162ibs128",
+    "llvm.x86.avx10.vcvtbf162ibs256" => "__builtin_ia32_vcvtbf162ibs256",
+    "llvm.x86.avx10.vcvtbf162ibs512" => "__builtin_ia32_vcvtbf162ibs512",
+    "llvm.x86.avx10.vcvtbf162iubs128" => "__builtin_ia32_vcvtbf162iubs128",
+    "llvm.x86.avx10.vcvtbf162iubs256" => "__builtin_ia32_vcvtbf162iubs256",
+    "llvm.x86.avx10.vcvtbf162iubs512" => "__builtin_ia32_vcvtbf162iubs512",
+    "llvm.x86.avx10.vcvttbf162ibs128" => "__builtin_ia32_vcvttbf162ibs128",
+    "llvm.x86.avx10.vcvttbf162ibs256" => "__builtin_ia32_vcvttbf162ibs256",
+    "llvm.x86.avx10.vcvttbf162ibs512" => "__builtin_ia32_vcvttbf162ibs512",
+    "llvm.x86.avx10.vcvttbf162iubs128" => "__builtin_ia32_vcvttbf162iubs128",
+    "llvm.x86.avx10.vcvttbf162iubs256" => "__builtin_ia32_vcvttbf162iubs256",
+    "llvm.x86.avx10.vcvttbf162iubs512" => "__builtin_ia32_vcvttbf162iubs512",
+    "llvm.x86.avx10.vcvttsd2sis" => "__builtin_ia32_vcvttsd2sis32",
+    "llvm.x86.avx10.vcvttsd2sis64" => "__builtin_ia32_vcvttsd2sis64",
+    "llvm.x86.avx10.vcvttsd2usis" => "__builtin_ia32_vcvttsd2usis32",
+    "llvm.x86.avx10.vcvttsd2usis64" => "__builtin_ia32_vcvttsd2usis64",
+    "llvm.x86.avx10.vcvttss2sis" => "__builtin_ia32_vcvttss2sis32",
+    "llvm.x86.avx10.vcvttss2sis64" => "__builtin_ia32_vcvttss2sis64",
+    "llvm.x86.avx10.vcvttss2usis" => "__builtin_ia32_vcvttss2usis32",
+    "llvm.x86.avx10.vcvttss2usis64" => "__builtin_ia32_vcvttss2usis64",
+    "llvm.x86.avx10.vdivbf16128" => "__builtin_ia32_vdivbf16128",
+    "llvm.x86.avx10.vdivbf16256" => "__builtin_ia32_vdivbf16256",
+    "llvm.x86.avx10.vdivbf16512" => "__builtin_ia32_vdivbf16512",
     "llvm.x86.avx10.vdpphps.128" => "__builtin_ia32_vdpphps128",
     "llvm.x86.avx10.vdpphps.256" => "__builtin_ia32_vdpphps256",
     "llvm.x86.avx10.vdpphps.512" => "__builtin_ia32_vdpphps512",
-    "llvm.x86.avx10.vfmaddsubpd256" => "__builtin_ia32_vfmaddsubpd256_round",
-    "llvm.x86.avx10.vfmaddsubph256" => "__builtin_ia32_vfmaddsubph256_round",
-    "llvm.x86.avx10.vfmaddsubps256" => "__builtin_ia32_vfmaddsubps256_round",
-    "llvm.x86.avx10.vmaxpd256" => "__builtin_ia32_vmaxpd256_round",
-    "llvm.x86.avx10.vmaxph256" => "__builtin_ia32_vmaxph256_round",
-    "llvm.x86.avx10.vmaxps256" => "__builtin_ia32_vmaxps256_round",
-    "llvm.x86.avx10.vminmaxnepbf16128" => "__builtin_ia32_vminmaxnepbf16128",
-    "llvm.x86.avx10.vminmaxnepbf16256" => "__builtin_ia32_vminmaxnepbf16256",
-    "llvm.x86.avx10.vminmaxnepbf16512" => "__builtin_ia32_vminmaxnepbf16512",
+    "llvm.x86.avx10.vfmadd132bf16128" => "__builtin_ia32_vfmadd132bf16128",
+    "llvm.x86.avx10.vfmadd132bf16256" => "__builtin_ia32_vfmadd132bf16256",
+    "llvm.x86.avx10.vfmadd132bf16512" => "__builtin_ia32_vfmadd132bf16512",
+    "llvm.x86.avx10.vfmadd213bf16128" => "__builtin_ia32_vfmadd213bf16128",
+    "llvm.x86.avx10.vfmadd213bf16256" => "__builtin_ia32_vfmadd213bf16256",
+    "llvm.x86.avx10.vfmadd231bf16128" => "__builtin_ia32_vfmadd231bf16128",
+    "llvm.x86.avx10.vfmadd231bf16256" => "__builtin_ia32_vfmadd231bf16256",
+    "llvm.x86.avx10.vfmadd231bf16512" => "__builtin_ia32_vfmadd231bf16512",
+    "llvm.x86.avx10.vfmsub132bf16128" => "__builtin_ia32_vfmsub132bf16128",
+    "llvm.x86.avx10.vfmsub132bf16256" => "__builtin_ia32_vfmsub132bf16256",
+    "llvm.x86.avx10.vfmsub132bf16512" => "__builtin_ia32_vfmsub132bf16512",
+    "llvm.x86.avx10.vfmsub213bf16128" => "__builtin_ia32_vfmsub213bf16128",
+    "llvm.x86.avx10.vfmsub213bf16256" => "__builtin_ia32_vfmsub213bf16256",
+    "llvm.x86.avx10.vfmsub213bf16512" => "__builtin_ia32_vfmsub213bf16512",
+    "llvm.x86.avx10.vfmsub231bf16128" => "__builtin_ia32_vfmsub231bf16128",
+    "llvm.x86.avx10.vfmsub231bf16256" => "__builtin_ia32_vfmsub231bf16256",
+    "llvm.x86.avx10.vfmsub231bf16512" => "__builtin_ia32_vfmsub231bf16512",
+    "llvm.x86.avx10.vfnmadd132bf16128" => "__builtin_ia32_vfnmadd132bf16128",
+    "llvm.x86.avx10.vfnmadd132bf16256" => "__builtin_ia32_vfnmadd132bf16256",
+    "llvm.x86.avx10.vfnmadd132bf16512" => "__builtin_ia32_vfnmadd132bf16512",
+    "llvm.x86.avx10.vfnmadd213bf16128" => "__builtin_ia32_vfnmadd213bf16128",
+    "llvm.x86.avx10.vfnmadd213bf16256" => "__builtin_ia32_vfnmadd213bf16256",
+    "llvm.x86.avx10.vfnmadd213bf16512" => "__builtin_ia32_vfnmadd213bf16512",
+    "llvm.x86.avx10.vfnmadd231bf16128" => "__builtin_ia32_vfnmadd231bf16128",
+    "llvm.x86.avx10.vfnmadd231bf16256" => "__builtin_ia32_vfnmadd231bf16256",
+    "llvm.x86.avx10.vfnmadd231bf16512" => "__builtin_ia32_vfnmadd231bf16512",
+    "llvm.x86.avx10.vfnmsub132bf16128" => "__builtin_ia32_vfnmsub132bf16128",
+    "llvm.x86.avx10.vfnmsub132bf16256" => "__builtin_ia32_vfnmsub132bf16256",
+    "llvm.x86.avx10.vfnmsub132bf16512" => "__builtin_ia32_vfnmsub132bf16512",
+    "llvm.x86.avx10.vfnmsub213bf16128" => "__builtin_ia32_vfnmsub213bf16128",
+    "llvm.x86.avx10.vfnmsub213bf16256" => "__builtin_ia32_vfnmsub213bf16256",
+    "llvm.x86.avx10.vfnmsub213bf16512" => "__builtin_ia32_vfnmsub213bf16512",
+    "llvm.x86.avx10.vfnmsub231bf16128" => "__builtin_ia32_vfnmsub231bf16128",
+    "llvm.x86.avx10.vfnmsub231bf16256" => "__builtin_ia32_vfnmsub231bf16256",
+    "llvm.x86.avx10.vfnmsub231bf16512" => "__builtin_ia32_vfnmsub231bf16512",
+    "llvm.x86.avx10.vmaxbf16128" => "__builtin_ia32_vmaxbf16128",
+    "llvm.x86.avx10.vmaxbf16256" => "__builtin_ia32_vmaxbf16256",
+    "llvm.x86.avx10.vmaxbf16512" => "__builtin_ia32_vmaxbf16512",
+    "llvm.x86.avx10.vminbf16128" => "__builtin_ia32_vminbf16128",
+    "llvm.x86.avx10.vminbf16256" => "__builtin_ia32_vminbf16256",
+    "llvm.x86.avx10.vminbf16512" => "__builtin_ia32_vminbf16512",
+    "llvm.x86.avx10.vminmaxbf16128" => "__builtin_ia32_vminmaxbf16128",
+    "llvm.x86.avx10.vminmaxbf16256" => "__builtin_ia32_vminmaxbf16256",
+    "llvm.x86.avx10.vminmaxbf16512" => "__builtin_ia32_vminmaxbf16512",
     "llvm.x86.avx10.vminmaxpd128" => "__builtin_ia32_vminmaxpd128",
     "llvm.x86.avx10.vminmaxpd256" => "__builtin_ia32_vminmaxpd256",
     "llvm.x86.avx10.vminmaxph128" => "__builtin_ia32_vminmaxph128",
     "llvm.x86.avx10.vminmaxph256" => "__builtin_ia32_vminmaxph256",
     "llvm.x86.avx10.vminmaxps128" => "__builtin_ia32_vminmaxps128",
     "llvm.x86.avx10.vminmaxps256" => "__builtin_ia32_vminmaxps256",
-    "llvm.x86.avx10.vminpd256" => "__builtin_ia32_vminpd256_round",
-    "llvm.x86.avx10.vminph256" => "__builtin_ia32_vminph256_round",
-    "llvm.x86.avx10.vminps256" => "__builtin_ia32_vminps256_round",
+    "llvm.x86.avx10.vmovrsb128" => "__builtin_ia32_vmovrsb128",
+    "llvm.x86.avx10.vmovrsb256" => "__builtin_ia32_vmovrsb256",
+    "llvm.x86.avx10.vmovrsb512" => "__builtin_ia32_vmovrsb512",
+    "llvm.x86.avx10.vmovrsd128" => "__builtin_ia32_vmovrsd128",
+    "llvm.x86.avx10.vmovrsd256" => "__builtin_ia32_vmovrsd256",
+    "llvm.x86.avx10.vmovrsd512" => "__builtin_ia32_vmovrsd512",
+    "llvm.x86.avx10.vmovrsq128" => "__builtin_ia32_vmovrsq128",
+    "llvm.x86.avx10.vmovrsq256" => "__builtin_ia32_vmovrsq256",
+    "llvm.x86.avx10.vmovrsq512" => "__builtin_ia32_vmovrsq512",
+    "llvm.x86.avx10.vmovrsw128" => "__builtin_ia32_vmovrsw128",
+    "llvm.x86.avx10.vmovrsw256" => "__builtin_ia32_vmovrsw256",
+    "llvm.x86.avx10.vmovrsw512" => "__builtin_ia32_vmovrsw512",
     "llvm.x86.avx10.vmpsadbw.512" => "__builtin_ia32_mpsadbw512",
-    "llvm.x86.avx10.vmulpd256" => "__builtin_ia32_vmulpd256_round",
-    "llvm.x86.avx10.vmulph256" => "__builtin_ia32_vmulph256_round",
-    "llvm.x86.avx10.vmulps256" => "__builtin_ia32_vmulps256_round",
+    "llvm.x86.avx10.vmulbf16128" => "__builtin_ia32_vmulbf16128",
+    "llvm.x86.avx10.vmulbf16256" => "__builtin_ia32_vmulbf16256",
+    "llvm.x86.avx10.vmulbf16512" => "__builtin_ia32_vmulbf16512",
     "llvm.x86.avx10.vpdpbssd.512" => "__builtin_ia32_vpdpbssd512",
     "llvm.x86.avx10.vpdpbssds.512" => "__builtin_ia32_vpdpbssds512",
     "llvm.x86.avx10.vpdpbsud.512" => "__builtin_ia32_vpdpbsud512",
@@ -7523,12 +7751,9 @@ match name {
     "llvm.x86.avx10.vpdpwusds.512" => "__builtin_ia32_vpdpwusds512",
     "llvm.x86.avx10.vpdpwuud.512" => "__builtin_ia32_vpdpwuud512",
     "llvm.x86.avx10.vpdpwuuds.512" => "__builtin_ia32_vpdpwuuds512",
-    "llvm.x86.avx10.vsqrtpd256" => "__builtin_ia32_vsqrtpd256_round",
-    "llvm.x86.avx10.vsqrtph256" => "__builtin_ia32_vsqrtph256_round",
-    "llvm.x86.avx10.vsqrtps256" => "__builtin_ia32_vsqrtps256_round",
-    "llvm.x86.avx10.vsubpd256" => "__builtin_ia32_vsubpd256_round",
-    "llvm.x86.avx10.vsubph256" => "__builtin_ia32_vsubph256_round",
-    "llvm.x86.avx10.vsubps256" => "__builtin_ia32_vsubps256_round",
+    "llvm.x86.avx10.vsubbf16128" => "__builtin_ia32_vsubbf16128",
+    "llvm.x86.avx10.vsubbf16256" => "__builtin_ia32_vsubbf16256",
+    "llvm.x86.avx10.vsubbf16512" => "__builtin_ia32_vsubbf16512",
     "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gatherd_d",
     "llvm.x86.avx2.gather.d.d.256" => "__builtin_ia32_gatherd_d256",
     "llvm.x86.avx2.gather.d.pd" => "__builtin_ia32_gatherd_pd",
@@ -9279,10 +9504,15 @@ match name {
     "llvm.x86.mmx.femms" => "__builtin_ia32_femms",
     "llvm.x86.monitorx" => "__builtin_ia32_monitorx",
     "llvm.x86.movdir64b" => "__builtin_ia32_movdir64b",
+    "llvm.x86.movrsdi" => "__builtin_ia32_movrsdi",
+    "llvm.x86.movrshi" => "__builtin_ia32_movrshi",
+    "llvm.x86.movrsqi" => "__builtin_ia32_movrsqi",
+    "llvm.x86.movrssi" => "__builtin_ia32_movrssi",
     "llvm.x86.mwaitx" => "__builtin_ia32_mwaitx",
     "llvm.x86.pclmulqdq" => "__builtin_ia32_pclmulqdq128",
     "llvm.x86.pclmulqdq.256" => "__builtin_ia32_pclmulqdq256",
     "llvm.x86.pclmulqdq.512" => "__builtin_ia32_pclmulqdq512",
+    "llvm.x86.prefetchrs" => "__builtin_ia32_prefetchrs",
     "llvm.x86.ptwrite32" => "__builtin_ia32_ptwrite32",
     "llvm.x86.ptwrite64" => "__builtin_ia32_ptwrite64",
     "llvm.x86.rdfsbase.32" => "__builtin_ia32_rdfsbase32",
@@ -9536,14 +9766,40 @@ match name {
     "llvm.x86.stui" => "__builtin_ia32_stui",
     "llvm.x86.subborrow.u32" => "__builtin_ia32_subborrow_u32",
     "llvm.x86.subborrow.u64" => "__builtin_ia32_subborrow_u64",
+    "llvm.x86.t2rpntlvwz0" => "__builtin_ia32_t2rpntlvwz0",
+    "llvm.x86.t2rpntlvwz0rs" => "__builtin_ia32_t2rpntlvwz0rs",
+    "llvm.x86.t2rpntlvwz0rst1" => "__builtin_ia32_t2rpntlvwz0rst1",
+    "llvm.x86.t2rpntlvwz0t1" => "__builtin_ia32_t2rpntlvwz0t1",
+    "llvm.x86.t2rpntlvwz1" => "__builtin_ia32_t2rpntlvwz1",
+    "llvm.x86.t2rpntlvwz1rs" => "__builtin_ia32_t2rpntlvwz1rs",
+    "llvm.x86.t2rpntlvwz1rst1" => "__builtin_ia32_t2rpntlvwz1rst1",
+    "llvm.x86.t2rpntlvwz1t1" => "__builtin_ia32_t2rpntlvwz1t1",
     "llvm.x86.tbm.bextri.u32" => "__builtin_ia32_bextri_u32",
     "llvm.x86.tbm.bextri.u64" => "__builtin_ia32_bextri_u64",
     "llvm.x86.tcmmimfp16ps" => "__builtin_ia32_tcmmimfp16ps",
     "llvm.x86.tcmmimfp16ps.internal" => "__builtin_ia32_tcmmimfp16ps_internal",
     "llvm.x86.tcmmrlfp16ps" => "__builtin_ia32_tcmmrlfp16ps",
     "llvm.x86.tcmmrlfp16ps.internal" => "__builtin_ia32_tcmmrlfp16ps_internal",
+    "llvm.x86.tconjtcmmimfp16ps" => "__builtin_ia32_tconjtcmmimfp16ps",
+    "llvm.x86.tconjtcmmimfp16ps.internal" => "__builtin_ia32_tconjtcmmimfp16ps_internal",
+    "llvm.x86.tconjtfp16" => "__builtin_ia32_tconjtfp16",
+    "llvm.x86.tconjtfp16.internal" => "__builtin_ia32_tconjtfp16_internal",
+    "llvm.x86.tcvtrowd2ps" => "__builtin_ia32_tcvtrowd2ps",
+    "llvm.x86.tcvtrowd2ps.internal" => "__builtin_ia32_tcvtrowd2ps_internal",
+    "llvm.x86.tcvtrowps2bf16h" => "__builtin_ia32_tcvtrowps2bf16h",
+    "llvm.x86.tcvtrowps2bf16h.internal" => "__builtin_ia32_tcvtrowps2bf16h_internal",
+    "llvm.x86.tcvtrowps2bf16l" => "__builtin_ia32_tcvtrowps2bf16l",
+    "llvm.x86.tcvtrowps2bf16l.internal" => "__builtin_ia32_tcvtrowps2bf16l_internal",
+    "llvm.x86.tcvtrowps2phh" => "__builtin_ia32_tcvtrowps2phh",
+    "llvm.x86.tcvtrowps2phh.internal" => "__builtin_ia32_tcvtrowps2phh_internal",
+    "llvm.x86.tcvtrowps2phl" => "__builtin_ia32_tcvtrowps2phl",
+    "llvm.x86.tcvtrowps2phl.internal" => "__builtin_ia32_tcvtrowps2phl_internal",
     "llvm.x86.tdpbf16ps" => "__builtin_ia32_tdpbf16ps",
     "llvm.x86.tdpbf16ps.internal" => "__builtin_ia32_tdpbf16ps_internal",
+    "llvm.x86.tdpbf8ps" => "__builtin_ia32_tdpbf8ps",
+    "llvm.x86.tdpbf8ps.internal" => "__builtin_ia32_tdpbf8ps_internal",
+    "llvm.x86.tdpbhf8ps" => "__builtin_ia32_tdpbhf8ps",
+    "llvm.x86.tdpbhf8ps.internal" => "__builtin_ia32_tdpbhf8ps_internal",
     "llvm.x86.tdpbssd" => "__builtin_ia32_tdpbssd",
     "llvm.x86.tdpbssd.internal" => "__builtin_ia32_tdpbssd_internal",
     "llvm.x86.tdpbsud" => "__builtin_ia32_tdpbsud",
@@ -9554,17 +9810,41 @@ match name {
     "llvm.x86.tdpbuud.internal" => "__builtin_ia32_tdpbuud_internal",
     "llvm.x86.tdpfp16ps" => "__builtin_ia32_tdpfp16ps",
     "llvm.x86.tdpfp16ps.internal" => "__builtin_ia32_tdpfp16ps_internal",
+    "llvm.x86.tdphbf8ps" => "__builtin_ia32_tdphbf8ps",
+    "llvm.x86.tdphbf8ps.internal" => "__builtin_ia32_tdphbf8ps_internal",
+    "llvm.x86.tdphf8ps" => "__builtin_ia32_tdphf8ps",
+    "llvm.x86.tdphf8ps.internal" => "__builtin_ia32_tdphf8ps_internal",
     "llvm.x86.testui" => "__builtin_ia32_testui",
     "llvm.x86.tileloadd64" => "__builtin_ia32_tileloadd64",
     "llvm.x86.tileloadd64.internal" => "__builtin_ia32_tileloadd64_internal",
+    "llvm.x86.tileloaddrs64" => "__builtin_ia32_tileloaddrs64",
+    "llvm.x86.tileloaddrs64.internal" => "__builtin_ia32_tileloaddrs64_internal",
+    "llvm.x86.tileloaddrst164" => "__builtin_ia32_tileloaddrst164",
+    "llvm.x86.tileloaddrst164.internal" => "__builtin_ia32_tileloaddrst164_internal",
     "llvm.x86.tileloaddt164" => "__builtin_ia32_tileloaddt164",
     "llvm.x86.tileloaddt164.internal" => "__builtin_ia32_tileloaddt164_internal",
+    "llvm.x86.tilemovrow" => "__builtin_ia32_tilemovrow",
+    "llvm.x86.tilemovrow.internal" => "__builtin_ia32_tilemovrow_internal",
     "llvm.x86.tilerelease" => "__builtin_ia32_tilerelease",
     "llvm.x86.tilestored64" => "__builtin_ia32_tilestored64",
     "llvm.x86.tilestored64.internal" => "__builtin_ia32_tilestored64_internal",
     "llvm.x86.tilezero" => "__builtin_ia32_tilezero",
     "llvm.x86.tilezero.internal" => "__builtin_ia32_tilezero_internal",
+    "llvm.x86.tmmultf32ps" => "__builtin_ia32_tmmultf32ps",
+    "llvm.x86.tmmultf32ps.internal" => "__builtin_ia32_tmmultf32ps_internal",
     "llvm.x86.tpause" => "__builtin_ia32_tpause",
+    "llvm.x86.ttcmmimfp16ps" => "__builtin_ia32_ttcmmimfp16ps",
+    "llvm.x86.ttcmmimfp16ps.internal" => "__builtin_ia32_ttcmmimfp16ps_internal",
+    "llvm.x86.ttcmmrlfp16ps" => "__builtin_ia32_ttcmmrlfp16ps",
+    "llvm.x86.ttcmmrlfp16ps.internal" => "__builtin_ia32_ttcmmrlfp16ps_internal",
+    "llvm.x86.ttdpbf16ps" => "__builtin_ia32_ttdpbf16ps",
+    "llvm.x86.ttdpbf16ps.internal" => "__builtin_ia32_ttdpbf16ps_internal",
+    "llvm.x86.ttdpfp16ps" => "__builtin_ia32_ttdpfp16ps",
+    "llvm.x86.ttdpfp16ps.internal" => "__builtin_ia32_ttdpfp16ps_internal",
+    "llvm.x86.ttmmultf32ps" => "__builtin_ia32_ttmmultf32ps",
+    "llvm.x86.ttmmultf32ps.internal" => "__builtin_ia32_ttmmultf32ps_internal",
+    "llvm.x86.ttransposed" => "__builtin_ia32_ttransposed",
+    "llvm.x86.ttransposed.internal" => "__builtin_ia32_ttransposed_internal",
     "llvm.x86.umonitor" => "__builtin_ia32_umonitor",
     "llvm.x86.umwait" => "__builtin_ia32_umwait",
     "llvm.x86.urdmsr" => "__builtin_ia32_urdmsr",
@@ -9604,8 +9884,10 @@ match name {
     "llvm.x86.vsm3rnds2" => "__builtin_ia32_vsm3rnds2",
     "llvm.x86.vsm4key4128" => "__builtin_ia32_vsm4key4128",
     "llvm.x86.vsm4key4256" => "__builtin_ia32_vsm4key4256",
+    "llvm.x86.vsm4key4512" => "__builtin_ia32_vsm4key4512",
     "llvm.x86.vsm4rnds4128" => "__builtin_ia32_vsm4rnds4128",
     "llvm.x86.vsm4rnds4256" => "__builtin_ia32_vsm4rnds4256",
+    "llvm.x86.vsm4rnds4512" => "__builtin_ia32_vsm4rnds4512",
     "llvm.x86.wbinvd" => "__builtin_ia32_wbinvd",
     "llvm.x86.wbnoinvd" => "__builtin_ia32_wbnoinvd",
     "llvm.x86.wrfsbase.32" => "__builtin_ia32_wrfsbase32",

From f111416e43a36a1ee062a2194eae37c39d0f0be1 Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Fri, 9 May 2025 16:41:46 +0200
Subject: [PATCH 876/997] Fixed a recursive inling bug, added a test for it

---
 src/attributes.rs          | 53 +++++++++++++++++++++++++++++++++++---
 tests/run/always_inline.rs | 53 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 103 insertions(+), 3 deletions(-)
 create mode 100644 tests/run/always_inline.rs

diff --git a/src/attributes.rs b/src/attributes.rs
index 8bc1b7702430..f933119d0ba0 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -6,21 +6,68 @@ use rustc_attr_parsing::InlineAttr;
 use rustc_attr_parsing::InstructionSetAttr;
 #[cfg(feature = "master")]
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
+use rustc_middle::mir::TerminatorKind;
 use rustc_middle::ty;
 
 use crate::context::CodegenCx;
 use crate::gcc_util::to_gcc_features;
 
-/// Get GCC attribute for the provided inline heuristic.
+/// Checks if the function `instance` is recursively inline.
+/// Returns `false` if a functions is guaranteed to be non-recursive, and `true` if it *might* be recursive.
+#[cfg(feature = "master")]
+fn resursively_inline<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    instance: ty::Instance<'tcx>,
+) -> bool {
+    // No body, so we can't check if this is recursively inline, so we assume it is.
+    if !cx.tcx.is_mir_available(instance.def_id()) {
+        return true;
+    }
+    // `expect_local` ought to never fail: we should be checking a function within this codegen unit.
+    let body = cx.tcx.optimized_mir(instance.def_id());
+    for block in body.basic_blocks.iter() {
+        let Some(ref terminator) = block.terminator else { continue };
+        // I assume that the recursive-inline issue applies only to functions, and not to drops.
+        // In principle, a recursive, `#[inline(always)]` drop could(?) exist, but I don't think it does.
+        let TerminatorKind::Call { ref func, .. } = terminator.kind else { continue };
+        let Some((def, _args)) = func.const_fn_def() else { continue };
+        // Check if the called function is recursively inline.
+        if matches!(
+            cx.tcx.codegen_fn_attrs(def).inline,
+            InlineAttr::Always | InlineAttr::Force { .. }
+        ) {
+            return true;
+        }
+    }
+    false
+}
+
+/// Get GCC attribute for the provided inline heuristic, attached to `instance`.
 #[cfg(feature = "master")]
 #[inline]
 fn inline_attr<'gcc, 'tcx>(
     cx: &CodegenCx<'gcc, 'tcx>,
     inline: InlineAttr,
+    instance: ty::Instance<'tcx>,
 ) -> Option<FnAttribute<'gcc>> {
     match inline {
+        InlineAttr::Always => {
+            // We can't simply always return `always_inline` unconditionally.
+            // It is *NOT A HINT* and does not work for recursive functions.
+            //
+            // So, it can only be applied *if*:
+            // The current function does not call any functions marked `#[inline(always)]`.
+            //
+            // That prevents issues steming from recursive `#[inline(always)]` at a *relatively* small cost.
+            // We *only* need to check all the terminators of a function marked with this attribute.
+            if resursively_inline(cx, instance) {
+                Some(FnAttribute::Inline)
+            } else {
+                Some(FnAttribute::AlwaysInline)
+            }
+        }
         InlineAttr::Hint => Some(FnAttribute::Inline),
-        InlineAttr::Always | InlineAttr::Force { .. } => Some(FnAttribute::AlwaysInline),
+        InlineAttr::Force { .. } => Some(FnAttribute::AlwaysInline),
         InlineAttr::Never => {
             if cx.sess().target.arch != "amdgpu" {
                 Some(FnAttribute::NoInline)
@@ -52,7 +99,7 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
         } else {
             codegen_fn_attrs.inline
         };
-        if let Some(attr) = inline_attr(cx, inline) {
+        if let Some(attr) = inline_attr(cx, inline, instance) {
             if let FnAttribute::AlwaysInline = attr {
                 func.add_attribute(FnAttribute::Inline);
             }
diff --git a/tests/run/always_inline.rs b/tests/run/always_inline.rs
new file mode 100644
index 000000000000..ebd741ee090c
--- /dev/null
+++ b/tests/run/always_inline.rs
@@ -0,0 +1,53 @@
+// Compiler:
+//
+// Run-time:
+//   status: 0
+
+#![feature(no_core)]
+#![no_std]
+#![no_core]
+#![no_main]
+
+extern crate mini_core;
+use mini_core::*;
+
+#[inline(always)]
+fn fib(n: u8) -> u8 {
+    if n == 0 {
+        return 1;
+    }
+    if n == 1 {
+        return 1;
+    }
+    fib(n - 1) + fib(n - 2)
+}
+
+#[inline(always)]
+fn fib_b(n: u8) -> u8 {
+    if n == 0 {
+        return 1;
+    }
+    if n == 1 {
+        return 1;
+    }
+    fib_a(n - 1) + fib_a(n - 2)
+}
+
+#[inline(always)]
+fn fib_a(n: u8) -> u8 {
+    if n == 0 {
+        return 1;
+    }
+    if n == 1 {
+        return 1;
+    }
+    fib_b(n - 1) + fib_b(n - 2)
+}
+
+#[no_mangle]
+extern "C" fn main(argc: i32, _argv: *const *const u8) -> i32 {
+    if fib(2) != fib_a(2) {
+        intrinsics::abort();
+    }
+    0
+}

From c12d12b1bb64abd3b694c7af703989ef3d8c1426 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 9 May 2025 09:28:42 -0400
Subject: [PATCH 877/997] Fix for renamed/removed UI tests

---
 tests/failing-ui-tests.txt | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 499c1a962311..0a01a661c357 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -10,7 +10,7 @@ tests/ui/sepcomp/sepcomp-fns-backwards.rs
 tests/ui/sepcomp/sepcomp-fns.rs
 tests/ui/sepcomp/sepcomp-statics.rs
 tests/ui/asm/x86_64/may_unwind.rs
-tests/ui/catch-unwind-bang.rs
+tests/ui/panics/catch-unwind-bang.rs
 tests/ui/drop/dynamic-drop-async.rs
 tests/ui/cfg/cfg-panic-abort.rs
 tests/ui/drop/repeat-drop.rs
@@ -94,23 +94,14 @@ tests/ui/simd/intrinsic/generic-as.rs
 tests/ui/backtrace/backtrace.rs
 tests/ui/lifetimes/tail-expr-lock-poisoning.rs
 tests/ui/runtime/rt-explody-panic-payloads.rs
-tests/ui/codegen/equal-pointers-unequal/as-cast/function.rs
-tests/ui/codegen/equal-pointers-unequal/as-cast/basic.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/inline1.rs
-tests/ui/codegen/equal-pointers-unequal/as-cast/print.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/inline2.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/segfault.rs
-tests/ui/codegen/equal-pointers-unequal/exposed-provenance/function.rs
-tests/ui/codegen/equal-pointers-unequal/exposed-provenance/basic.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/zero.rs
 tests/ui/codegen/equal-pointers-unequal/exposed-provenance/inline1.rs
-tests/ui/codegen/equal-pointers-unequal/exposed-provenance/print.rs
 tests/ui/codegen/equal-pointers-unequal/exposed-provenance/inline2.rs
 tests/ui/codegen/equal-pointers-unequal/exposed-provenance/segfault.rs
 tests/ui/codegen/equal-pointers-unequal/exposed-provenance/zero.rs
-tests/ui/codegen/equal-pointers-unequal/strict-provenance/basic.rs
-tests/ui/codegen/equal-pointers-unequal/strict-provenance/function.rs
-tests/ui/codegen/equal-pointers-unequal/strict-provenance/print.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/inline1.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/inline2.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/segfault.rs

From bef68d04d9be557d954dd89667da97c5565b21a1 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 12 May 2025 11:05:47 -0400
Subject: [PATCH 878/997] Update to nightly-2025-05-12

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index fbaa22190052..a8cda28688c8 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2025-04-26"
+channel = "nightly-2025-05-12"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From 57011501d5c907b89d2854ebfb889d652024b4fc Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 12 May 2025 11:13:34 -0400
Subject: [PATCH 879/997] Fix for libgccjit 12

---
 src/attributes.rs    | 1 +
 src/intrinsic/mod.rs | 4 +---
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/src/attributes.rs b/src/attributes.rs
index f933119d0ba0..e63091c6082a 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -6,6 +6,7 @@ use rustc_attr_parsing::InlineAttr;
 use rustc_attr_parsing::InstructionSetAttr;
 #[cfg(feature = "master")]
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
+#[cfg(feature = "master")]
 use rustc_middle::mir::TerminatorKind;
 use rustc_middle::ty;
 
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 9caceca92957..f292c467418f 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -4,9 +4,7 @@ mod simd;
 #[cfg(feature = "master")]
 use std::iter;
 
-#[cfg(feature = "master")]
-use gccjit::FunctionType;
-use gccjit::{ComparisonOp, Function, RValue, ToRValue, Type, UnaryOp};
+use gccjit::{ComparisonOp, Function, FunctionType, RValue, ToRValue, Type, UnaryOp};
 #[cfg(feature = "master")]
 use rustc_abi::ExternAbi;
 use rustc_abi::{BackendRepr, HasDataLayout};

From 878a1732bc14e33f14ae2350d4a4ba75f7992035 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 12 May 2025 11:52:18 -0400
Subject: [PATCH 880/997] Fix for the fminimum intrinsics

---
 src/intrinsic/mod.rs | 113 +++++++++++++++++++++++++++++--------------
 1 file changed, 76 insertions(+), 37 deletions(-)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index f292c467418f..4e5018ae0118 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -72,44 +72,8 @@ fn get_simple_intrinsic<'gcc, 'tcx>(
         sym::fabsf64 => "fabs",
         sym::minnumf32 => "fminf",
         sym::minnumf64 => "fmin",
-        sym::minimumf32 => "fminimumf",
-        sym::minimumf64 => "fminimum",
-        sym::minimumf128 => {
-            // GCC doesn't have the intrinsic we want so we use the compiler-builtins one
-            // https://docs.rs/compiler_builtins/latest/compiler_builtins/math/full_availability/fn.fminimumf128.html
-            let f128_type = cx.type_f128();
-            return Some(cx.context.new_function(
-                None,
-                FunctionType::Extern,
-                f128_type,
-                &[
-                    cx.context.new_parameter(None, f128_type, "a"),
-                    cx.context.new_parameter(None, f128_type, "b"),
-                ],
-                "fminimumf128",
-                false,
-            ));
-        }
         sym::maxnumf32 => "fmaxf",
         sym::maxnumf64 => "fmax",
-        sym::maximumf32 => "fmaximumf",
-        sym::maximumf64 => "fmaximum",
-        sym::maximumf128 => {
-            // GCC doesn't have the intrinsic we want so we use the compiler-builtins one
-            // https://docs.rs/compiler_builtins/latest/compiler_builtins/math/full_availability/fn.fmaximumf128.html
-            let f128_type = cx.type_f128();
-            return Some(cx.context.new_function(
-                None,
-                FunctionType::Extern,
-                f128_type,
-                &[
-                    cx.context.new_parameter(None, f128_type, "a"),
-                    cx.context.new_parameter(None, f128_type, "b"),
-                ],
-                "fmaximumf128",
-                false,
-            ));
-        }
         sym::copysignf32 => "copysignf",
         sym::copysignf64 => "copysign",
         sym::copysignf128 => "copysignl",
@@ -130,6 +94,72 @@ fn get_simple_intrinsic<'gcc, 'tcx>(
     Some(cx.context.get_builtin_function(gcc_name))
 }
 
+// TODO(antoyo): We can probably remove these and use the fallback intrinsic implementation.
+fn get_simple_function<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    name: Symbol,
+) -> Option<Function<'gcc>> {
+    let (return_type, parameters, func_name) = match name {
+        sym::minimumf32 => {
+            let parameters = [
+                cx.context.new_parameter(None, cx.float_type, "a"),
+                cx.context.new_parameter(None, cx.float_type, "b"),
+            ];
+            (cx.float_type, parameters, "fminimumf")
+        }
+        sym::minimumf64 => {
+            let parameters = [
+                cx.context.new_parameter(None, cx.double_type, "a"),
+                cx.context.new_parameter(None, cx.double_type, "b"),
+            ];
+            (cx.double_type, parameters, "fminimum")
+        }
+        sym::minimumf128 => {
+            let f128_type = cx.type_f128();
+            // GCC doesn't have the intrinsic we want so we use the compiler-builtins one
+            // https://docs.rs/compiler_builtins/latest/compiler_builtins/math/full_availability/fn.fminimumf128.html
+            let parameters = [
+                cx.context.new_parameter(None, f128_type, "a"),
+                cx.context.new_parameter(None, f128_type, "b"),
+            ];
+            (f128_type, parameters, "fminimumf128")
+        }
+        sym::maximumf32 => {
+            let parameters = [
+                cx.context.new_parameter(None, cx.float_type, "a"),
+                cx.context.new_parameter(None, cx.float_type, "b"),
+            ];
+            (cx.float_type, parameters, "fmaximumf")
+        }
+        sym::maximumf64 => {
+            let parameters = [
+                cx.context.new_parameter(None, cx.double_type, "a"),
+                cx.context.new_parameter(None, cx.double_type, "b"),
+            ];
+            (cx.double_type, parameters, "fmaximum")
+        }
+        sym::maximumf128 => {
+            let f128_type = cx.type_f128();
+            // GCC doesn't have the intrinsic we want so we use the compiler-builtins one
+            // https://docs.rs/compiler_builtins/latest/compiler_builtins/math/full_availability/fn.fmaximumf128.html
+            let parameters = [
+                cx.context.new_parameter(None, f128_type, "a"),
+                cx.context.new_parameter(None, f128_type, "b"),
+            ];
+            (f128_type, parameters, "fmaximumf128")
+        }
+        _ => return None,
+    };
+    Some(cx.context.new_function(
+        None,
+        FunctionType::Extern,
+        return_type,
+        &parameters,
+        func_name,
+        false,
+    ))
+}
+
 impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn codegen_intrinsic_call(
         &mut self,
@@ -158,6 +188,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
         let result = PlaceRef::new_sized(llresult, fn_abi.ret.layout);
 
         let simple = get_simple_intrinsic(self, name);
+        let simple_func = get_simple_function(self, name);
 
         // FIXME(tempdragon): Re-enable `clippy::suspicious_else_formatting` if the following issue is solved:
         // https://github.com/rust-lang/rust-clippy/issues/12497
@@ -165,7 +196,15 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
         #[allow(clippy::suspicious_else_formatting)]
         let value = match name {
             _ if simple.is_some() => {
-                let func = simple.expect("simple function");
+                let func = simple.expect("simple intrinsic function");
+                self.cx.context.new_call(
+                    self.location,
+                    func,
+                    &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
+                )
+            }
+            _ if simple_func.is_some() => {
+                let func = simple_func.expect("simple function");
                 self.cx.context.new_call(
                     self.location,
                     func,

From 44af0a8b6c7be8bc9411ec8539729cf94f2b1a20 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 14 May 2025 04:59:23 -0400
Subject: [PATCH 881/997] Stop ignoring test_mm512_stream_ps stdarch test

---
 .github/workflows/stdarch.yml | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 4b9f48e7b183..0d92a6a37ff8 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -101,9 +101,8 @@ jobs:
       if: ${{ matrix.cargo_runner }}
       run: |
         # FIXME: these tests fail when the sysroot is compiled with LTO because of a missing symbol in proc-macro.
-        # TODO: remove --skip test_mm512_stream_ps when stdarch is updated in rustc.
         # TODO: remove --skip test_tile_ when it's implemented.
-        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features --cfg stdarch_intel_sde" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a --skip test_mm512_stream_ps --skip test_tile_
+        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features --cfg stdarch_intel_sde" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a --skip test_tile_
 
   # Summary job for the merge queue.
   # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!

From f38d6d0a8fdeee797a6e32a04bd0895bc4f7b322 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 14 May 2025 04:59:02 -0400
Subject: [PATCH 882/997] Fix for xsave test on Intel SDE

---
 .github/workflows/stdarch.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 0d92a6a37ff8..f26ac3b755fb 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -102,7 +102,7 @@ jobs:
       run: |
         # FIXME: these tests fail when the sysroot is compiled with LTO because of a missing symbol in proc-macro.
         # TODO: remove --skip test_tile_ when it's implemented.
-        STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features --cfg stdarch_intel_sde" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a --skip test_tile_
+        STDARCH_TEST_SKIP_FUNCTION="xsave,xsaveopt,xsave64,xsaveopt64" STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a --skip test_tile_
 
   # Summary job for the merge queue.
   # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!

From f0648966e4aa48d83bbd395c513ad1febbb5a8e6 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 16 May 2025 13:02:20 +0200
Subject: [PATCH 883/997] Add missing `add_eval` to generate `__rdl_oom` in the
 alloc error handler

---
 src/allocator.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/allocator.rs b/src/allocator.rs
index f4ebd42ee2dc..279b7dd2fb92 100644
--- a/src/allocator.rs
+++ b/src/allocator.rs
@@ -152,6 +152,7 @@ fn create_wrapper_function(
     if output.is_some() {
         block.end_with_return(None, ret);
     } else {
+        block.add_eval(None, ret);
         block.end_with_void_return(None);
     }
 

From 82160c49a3f102e7f485c491408f8813196f780d Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Tue, 20 May 2025 21:30:22 +0200
Subject: [PATCH 884/997] Changes to constant handling - faster deduplication,
 more compact representation

---
 src/common.rs  | 84 ++++++++++++++++++++++++++++++++++++++++++++------
 src/consts.rs  | 24 +++++++--------
 src/context.rs |  5 +++
 3 files changed, 90 insertions(+), 23 deletions(-)

diff --git a/src/common.rs b/src/common.rs
index 918195364ffe..cfa951ddf4b7 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -9,7 +9,6 @@ use rustc_middle::mir::Mutability;
 use rustc_middle::mir::interpret::{ConstAllocation, GlobalAlloc, Scalar};
 use rustc_middle::ty::layout::LayoutOf;
 
-use crate::consts::const_alloc_to_gcc;
 use crate::context::CodegenCx;
 use crate::type_of::LayoutGccExt;
 
@@ -46,12 +45,65 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 }
 
 pub fn bytes_in_context<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, bytes: &[u8]) -> RValue<'gcc> {
-    let context = &cx.context;
-    let byte_type = context.new_type::<u8>();
-    let typ = context.new_array_type(None, byte_type, bytes.len() as u64);
-    let elements: Vec<_> =
-        bytes.iter().map(|&byte| context.new_rvalue_from_int(byte_type, byte as i32)).collect();
-    context.new_array_constructor(None, typ, &elements)
+    // Instead of always using an array of bytes, use an array of larger integers of target endianness
+    // if possible. This reduces the amount of `rvalues` we use, which reduces memory usage significantly.
+    //
+    // FIXME(FractalFir): Consider using `global_set_initializer` instead. Before this is done, we need to confirm that
+    // `global_set_initializer` is more memory efficient than the current solution.
+    // `global_set_initializer` calls `global_set_initializer_rvalue` under the hood - does it generate an array of rvalues,
+    // or is it using a more efficient representation?
+    match bytes.len() % 8 {
+        0 => {
+            let context = &cx.context;
+            let byte_type = context.new_type::<u64>();
+            let typ = context.new_array_type(None, byte_type, bytes.len() as u64 / 8);
+            let elements: Vec<_> = bytes
+                .chunks_exact(8)
+                .map(|arr| {
+                    let arr: [u8; 8] = arr.try_into().unwrap();
+                    context.new_rvalue_from_long(
+                        byte_type,
+                        // Since we are representing arbitrary byte runs as integers, we need to follow the target
+                        // endianness.
+                        match cx.sess().target.options.endian {
+                            rustc_abi::Endian::Little => u64::from_le_bytes(arr) as i64,
+                            rustc_abi::Endian::Big => u64::from_be_bytes(arr) as i64,
+                        },
+                    )
+                })
+                .collect();
+            context.new_array_constructor(None, typ, &elements)
+        }
+        4 => {
+            let context = &cx.context;
+            let byte_type = context.new_type::<u32>();
+            let typ = context.new_array_type(None, byte_type, bytes.len() as u64 / 4);
+            let elements: Vec<_> = bytes
+                .chunks_exact(4)
+                .map(|arr| {
+                    let arr: [u8; 4] = arr.try_into().unwrap();
+                    context.new_rvalue_from_int(
+                        byte_type,
+                        match cx.sess().target.options.endian {
+                            rustc_abi::Endian::Little => u32::from_le_bytes(arr) as i32,
+                            rustc_abi::Endian::Big => u32::from_be_bytes(arr) as i32,
+                        },
+                    )
+                })
+                .collect();
+            context.new_array_constructor(None, typ, &elements)
+        }
+        _ => {
+            let context = cx.context;
+            let byte_type = context.new_type::<u8>();
+            let typ = context.new_array_type(None, byte_type, bytes.len() as u64);
+            let elements: Vec<_> = bytes
+                .iter()
+                .map(|&byte| context.new_rvalue_from_int(byte_type, byte as i32))
+                .collect();
+            context.new_array_constructor(None, typ, &elements)
+        }
+    }
 }
 
 pub fn type_is_pointer(typ: Type<'_>) -> bool {
@@ -212,7 +264,7 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
                 let alloc_id = prov.alloc_id();
                 let base_addr = match self.tcx.global_alloc(alloc_id) {
                     GlobalAlloc::Memory(alloc) => {
-                        let init = const_alloc_to_gcc(self, alloc);
+                        let init = self.const_data_from_alloc(alloc);
                         let alloc = alloc.inner();
                         let value = match alloc.mutability {
                             Mutability::Mut => self.static_addr_of_mut(init, alloc.align, None),
@@ -234,7 +286,7 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
                                 }),
                             )))
                             .unwrap_memory();
-                        let init = const_alloc_to_gcc(self, alloc);
+                        let init = self.const_data_from_alloc(alloc);
                         self.static_addr_of(init, alloc.inner().align, None)
                     }
                     GlobalAlloc::Static(def_id) => {
@@ -257,7 +309,19 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
     }
 
     fn const_data_from_alloc(&self, alloc: ConstAllocation<'_>) -> Self::Value {
-        const_alloc_to_gcc(self, alloc)
+        // We ignore the alignment for the purpose of deduping RValues
+        // The alignment is not handled / used in any way by `const_alloc_to_gcc`,
+        // so it is OK to overwrite it here.
+        let mut mock_alloc = alloc.inner().clone();
+        mock_alloc.align = rustc_abi::Align::MAX;
+        // Check if the rvalue is already in the cache - if so, just return it directly.
+        if let Some(res) = self.const_cache.borrow().get(&mock_alloc) {
+            return *res;
+        }
+        // Rvalue not in the cache - convert and add it.
+        let res = crate::consts::const_alloc_to_gcc_uncached(self, alloc);
+        self.const_cache.borrow_mut().insert(mock_alloc, res);
+        res
     }
 
     fn const_ptr_byte_offset(&self, base_addr: Self::Value, offset: abi::Size) -> Self::Value {
diff --git a/src/consts.rs b/src/consts.rs
index 033afc0f8fbf..73d3beede7f6 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -42,18 +42,14 @@ fn set_global_alignment<'gcc, 'tcx>(
 
 impl<'gcc, 'tcx> StaticCodegenMethods for CodegenCx<'gcc, 'tcx> {
     fn static_addr_of(&self, cv: RValue<'gcc>, align: Align, kind: Option<&str>) -> RValue<'gcc> {
-        // TODO(antoyo): implement a proper rvalue comparison in libgccjit instead of doing the
-        // following:
-        for (value, variable) in &*self.const_globals.borrow() {
-            if format!("{:?}", value) == format!("{:?}", cv) {
-                if let Some(global_variable) = self.global_lvalues.borrow().get(variable) {
-                    let alignment = align.bits() as i32;
-                    if alignment > global_variable.get_alignment() {
-                        global_variable.set_alignment(alignment);
-                    }
+        if let Some(variable) = self.const_globals.borrow().get(&cv) {
+            if let Some(global_variable) = self.global_lvalues.borrow().get(variable) {
+                let alignment = align.bits() as i32;
+                if alignment > global_variable.get_alignment() {
+                    global_variable.set_alignment(alignment);
                 }
-                return *variable;
             }
+            return *variable;
         }
         let global_value = self.static_addr_of_mut(cv, align, kind);
         #[cfg(feature = "master")]
@@ -299,8 +295,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         global
     }
 }
-
-pub fn const_alloc_to_gcc<'gcc>(
+/// Converts a given const alloc to a gcc Rvalue, without any caching or deduplication.
+/// YOU SHOULD NOT call this function directly - that may break the semantics of Rust.
+/// Use `const_data_from_alloc` instead.
+pub(crate) fn const_alloc_to_gcc_uncached<'gcc>(
     cx: &CodegenCx<'gcc, '_>,
     alloc: ConstAllocation<'_>,
 ) -> RValue<'gcc> {
@@ -371,7 +369,7 @@ fn codegen_static_initializer<'gcc, 'tcx>(
     def_id: DefId,
 ) -> Result<(RValue<'gcc>, ConstAllocation<'tcx>), ErrorHandled> {
     let alloc = cx.tcx.eval_static_initializer(def_id)?;
-    Ok((const_alloc_to_gcc(cx, alloc), alloc))
+    Ok((cx.const_data_from_alloc(alloc), alloc))
 }
 
 fn check_and_apply_linkage<'gcc, 'tcx>(
diff --git a/src/context.rs b/src/context.rs
index 73718994e641..10494a4be55b 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -1,4 +1,5 @@
 use std::cell::{Cell, RefCell};
+use std::collections::HashMap;
 
 use gccjit::{
     Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, Location, RValue, Type,
@@ -9,6 +10,7 @@ use rustc_codegen_ssa::errors as ssa_errors;
 use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeCodegenMethods, MiscCodegenMethods};
 use rustc_data_structures::base_n::{ALPHANUMERIC_ONLY, ToBaseN};
 use rustc_data_structures::fx::{FxHashMap, FxHashSet};
+use rustc_middle::mir::interpret::Allocation;
 use rustc_middle::mir::mono::CodegenUnit;
 use rustc_middle::span_bug;
 use rustc_middle::ty::layout::{
@@ -30,6 +32,8 @@ use crate::common::SignType;
 
 #[cfg_attr(not(feature = "master"), allow(dead_code))]
 pub struct CodegenCx<'gcc, 'tcx> {
+    /// A cache of converted ConstAllocs
+    pub const_cache: RefCell<HashMap<Allocation, RValue<'gcc>>>,
     pub codegen_unit: &'tcx CodegenUnit<'tcx>,
     pub context: &'gcc Context<'gcc>,
 
@@ -222,6 +226,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         }
 
         let mut cx = Self {
+            const_cache: Default::default(),
             codegen_unit,
             context,
             current_func: RefCell::new(None),

From 90a007c73412c6444e7379688e609e29efd618d8 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 21 May 2025 14:33:56 -0400
Subject: [PATCH 885/997] Add spell checking job in the CI

---
 .github/workflows/ci.yml | 6 ++++++
 _typos.toml              | 9 +++++++++
 2 files changed, 15 insertions(+)
 create mode 100644 _typos.toml

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index ef024258ffc8..14a594cbb5ce 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -115,6 +115,12 @@ jobs:
       - uses: actions/checkout@v4
       - run: python tools/check_intrinsics_duplicates.py
 
+  spell_check:
+    runs-on: ubuntu-24.04
+    steps:
+      - uses: actions/checkout@v4
+      - uses: crate-ci/typos@v1.32.0
+
   build_system:
     runs-on: ubuntu-24.04
     steps:
diff --git a/_typos.toml b/_typos.toml
new file mode 100644
index 000000000000..4a6a506a981a
--- /dev/null
+++ b/_typos.toml
@@ -0,0 +1,9 @@
+[default.extend-words]
+ba = "ba"
+hsa = "hsa"
+olt = "olt"
+seh = "seh"
+typ = "typ"
+
+[files]
+extend-exclude = ["src/intrinsic/archs.rs"]

From c430b87539d49720346f2652ebf87fa7396776c5 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 21 May 2025 14:38:19 -0400
Subject: [PATCH 886/997] Fix typos

---
 example/std_example.rs | 24 ++++++++++++------------
 src/attributes.rs      |  4 ++--
 src/type_of.rs         |  2 +-
 3 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/example/std_example.rs b/example/std_example.rs
index 5fa1e0afb060..7587b4827ca7 100644
--- a/example/std_example.rs
+++ b/example/std_example.rs
@@ -77,18 +77,18 @@ fn main() {
     assert_eq!(tmp as i128, -0x1234_5678_9ABC_DEF0i128);
 
     // Check that all u/i128 <-> float casts work correctly.
-    let houndred_u128 = 100u128;
-    let houndred_i128 = 100i128;
-    let houndred_f32 = 100.0f32;
-    let houndred_f64 = 100.0f64;
-    assert_eq!(houndred_u128 as f32, 100.0);
-    assert_eq!(houndred_u128 as f64, 100.0);
-    assert_eq!(houndred_f32 as u128, 100);
-    assert_eq!(houndred_f64 as u128, 100);
-    assert_eq!(houndred_i128 as f32, 100.0);
-    assert_eq!(houndred_i128 as f64, 100.0);
-    assert_eq!(houndred_f32 as i128, 100);
-    assert_eq!(houndred_f64 as i128, 100);
+    let hundred_u128 = 100u128;
+    let hundred_i128 = 100i128;
+    let hundred_f32 = 100.0f32;
+    let hundred_f64 = 100.0f64;
+    assert_eq!(hundred_u128 as f32, 100.0);
+    assert_eq!(hundred_u128 as f64, 100.0);
+    assert_eq!(hundred_f32 as u128, 100);
+    assert_eq!(hundred_f64 as u128, 100);
+    assert_eq!(hundred_i128 as f32, 100.0);
+    assert_eq!(hundred_i128 as f64, 100.0);
+    assert_eq!(hundred_f32 as i128, 100);
+    assert_eq!(hundred_f64 as i128, 100);
 
     let _a = 1u32 << 2u8;
 
diff --git a/src/attributes.rs b/src/attributes.rs
index e63091c6082a..8779bb47ef01 100644
--- a/src/attributes.rs
+++ b/src/attributes.rs
@@ -16,7 +16,7 @@ use crate::gcc_util::to_gcc_features;
 /// Checks if the function `instance` is recursively inline.
 /// Returns `false` if a functions is guaranteed to be non-recursive, and `true` if it *might* be recursive.
 #[cfg(feature = "master")]
-fn resursively_inline<'gcc, 'tcx>(
+fn recursively_inline<'gcc, 'tcx>(
     cx: &CodegenCx<'gcc, 'tcx>,
     instance: ty::Instance<'tcx>,
 ) -> bool {
@@ -61,7 +61,7 @@ fn inline_attr<'gcc, 'tcx>(
             //
             // That prevents issues steming from recursive `#[inline(always)]` at a *relatively* small cost.
             // We *only* need to check all the terminators of a function marked with this attribute.
-            if resursively_inline(cx, instance) {
+            if recursively_inline(cx, instance) {
                 Some(FnAttribute::Inline)
             } else {
                 Some(FnAttribute::AlwaysInline)
diff --git a/src/type_of.rs b/src/type_of.rs
index 5745acce6fee..093f902bc3d8 100644
--- a/src/type_of.rs
+++ b/src/type_of.rs
@@ -217,7 +217,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
             let ty = match *self.ty.kind() {
                 // NOTE: we cannot remove this match like in the LLVM codegen because the call
                 // to fn_ptr_backend_type handle the on-stack attribute.
-                // TODO(antoyo): find a less hackish way to hande the on-stack attribute.
+                // TODO(antoyo): find a less hackish way to handle the on-stack attribute.
                 ty::FnPtr(sig_tys, hdr) => cx
                     .fn_ptr_backend_type(cx.fn_abi_of_fn_ptr(sig_tys.with(hdr), ty::List::empty())),
                 _ => self.scalar_gcc_type_at(cx, scalar, Size::ZERO),

From ce3dae9c52a145ae1cb9eea5089ec2d1cca8e9bf Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 21 May 2025 19:46:24 -0400
Subject: [PATCH 887/997] Update to nightly-2025-05-21

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index a8cda28688c8..bafe497a2a2a 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2025-05-12"
+channel = "nightly-2025-05-21"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From 593d7ca571bb00d87713110f4566208727238c0e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 21 May 2025 21:03:48 -0400
Subject: [PATCH 888/997] Implement missing f16/f128 builtins

---
 src/builder.rs       | 10 ++++++-
 src/intrinsic/mod.rs | 67 ++++++++++++++++++++++++++++++++++++--------
 2 files changed, 64 insertions(+), 13 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 4e2163201fd0..f54a1a941ea8 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -765,7 +765,15 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         #[cfg(feature = "master")]
         match self.cx.type_kind(a_type) {
-            TypeKind::Half | TypeKind::Float => {
+            TypeKind::Half => {
+                let fmodf = self.context.get_builtin_function("fmodf");
+                let f32_type = self.type_f32();
+                let a = self.context.new_cast(self.location, a, f32_type);
+                let b = self.context.new_cast(self.location, b, f32_type);
+                let result = self.context.new_call(self.location, fmodf, &[a, b]);
+                return self.context.new_cast(self.location, result, a_type);
+            }
+            TypeKind::Float => {
                 let fmodf = self.context.get_builtin_function("fmodf");
                 return self.context.new_call(self.location, fmodf, &[a, b]);
             }
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 4e5018ae0118..8402d0c6fcf8 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -45,8 +45,10 @@ fn get_simple_intrinsic<'gcc, 'tcx>(
     let gcc_name = match name {
         sym::sqrtf32 => "sqrtf",
         sym::sqrtf64 => "sqrt",
+        sym::sqrtf128 => "sqrtl",
         sym::powif32 => "__builtin_powif",
         sym::powif64 => "__builtin_powi",
+        sym::powif128 => "__builtin_powil",
         sym::sinf32 => "sinf",
         sym::sinf64 => "sin",
         sym::cosf32 => "cosf",
@@ -65,6 +67,7 @@ fn get_simple_intrinsic<'gcc, 'tcx>(
         sym::log2f64 => "log2",
         sym::fmaf32 => "fmaf",
         sym::fmaf64 => "fma",
+        sym::fmaf128 => "fmal",
         // FIXME: calling `fma` from libc without FMA target feature uses expensive software emulation
         sym::fmuladdf32 => "fmaf", // TODO: use gcc intrinsic analogous to llvm.fmuladd.f32
         sym::fmuladdf64 => "fma",  // TODO: use gcc intrinsic analogous to llvm.fmuladd.f64
@@ -72,22 +75,29 @@ fn get_simple_intrinsic<'gcc, 'tcx>(
         sym::fabsf64 => "fabs",
         sym::minnumf32 => "fminf",
         sym::minnumf64 => "fmin",
+        sym::minnumf128 => "fminl",
         sym::maxnumf32 => "fmaxf",
         sym::maxnumf64 => "fmax",
+        sym::maxnumf128 => "fmaxl",
         sym::copysignf32 => "copysignf",
         sym::copysignf64 => "copysign",
         sym::copysignf128 => "copysignl",
         sym::floorf32 => "floorf",
         sym::floorf64 => "floor",
+        sym::floorf128 => "floorl",
         sym::ceilf32 => "ceilf",
         sym::ceilf64 => "ceil",
+        sym::ceilf128 => "ceill",
         sym::truncf32 => "truncf",
         sym::truncf64 => "trunc",
+        sym::truncf128 => "truncl",
         // We match the LLVM backend and lower this to `rint`.
         sym::round_ties_even_f32 => "rintf",
         sym::round_ties_even_f64 => "rint",
+        sym::round_ties_even_f128 => "rintl",
         sym::roundf32 => "roundf",
         sym::roundf64 => "round",
+        sym::roundf128 => "roundl",
         sym::abort => "abort",
         _ => return None,
     };
@@ -160,6 +170,40 @@ fn get_simple_function<'gcc, 'tcx>(
     ))
 }
 
+fn f16_builtin<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    name: Symbol,
+    args: &[OperandRef<'tcx, RValue<'gcc>>],
+) -> RValue<'gcc> {
+    let f32_type = cx.type_f32();
+    let builtin_name = match name {
+        sym::ceilf16 => "__builtin_ceilf",
+        sym::floorf16 => "__builtin_floorf",
+        sym::fmaf16 => "fmaf",
+        sym::maxnumf16 => "__builtin_fmaxf",
+        sym::minnumf16 => "__builtin_fminf",
+        sym::powf16 => "__builtin_powf",
+        sym::powif16 => {
+            let func = cx.context.get_builtin_function("__builtin_powif");
+            let arg0 = cx.context.new_cast(None, args[0].immediate(), f32_type);
+            let args = [arg0, args[1].immediate()];
+            let result = cx.context.new_call(None, func, &args);
+            return cx.context.new_cast(None, result, cx.type_f16());
+        }
+        sym::roundf16 => "__builtin_roundf",
+        sym::round_ties_even_f16 => "__builtin_rintf",
+        sym::sqrtf16 => "__builtin_sqrtf",
+        sym::truncf16 => "__builtin_truncf",
+        _ => unreachable!(),
+    };
+
+    let func = cx.context.get_builtin_function(builtin_name);
+    let args: Vec<_> =
+        args.iter().map(|arg| cx.context.new_cast(None, arg.immediate(), f32_type)).collect();
+    let result = cx.context.new_call(None, func, &args);
+    cx.context.new_cast(None, result, cx.type_f16())
+}
+
 impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn codegen_intrinsic_call(
         &mut self,
@@ -211,18 +255,17 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
                     &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
                 )
             }
-            sym::fmaf16 => {
-                // TODO(antoyo): use the correct builtin for f16.
-                let func = self.cx.context.get_builtin_function("fmaf");
-                let args: Vec<_> = args
-                    .iter()
-                    .map(|arg| {
-                        self.cx.context.new_cast(self.location, arg.immediate(), self.cx.type_f32())
-                    })
-                    .collect();
-                let result = self.cx.context.new_call(self.location, func, &args);
-                self.cx.context.new_cast(self.location, result, self.cx.type_f16())
-            }
+            sym::ceilf16
+            | sym::floorf16
+            | sym::fmaf16
+            | sym::maxnumf16
+            | sym::minnumf16
+            | sym::powf16
+            | sym::powif16
+            | sym::roundf16
+            | sym::round_ties_even_f16
+            | sym::sqrtf16
+            | sym::truncf16 => f16_builtin(self, name, args),
             sym::is_val_statically_known => {
                 let a = args[0].immediate();
                 let builtin = self.context.get_builtin_function("__builtin_constant_p");

From dca28e588cb9c49bf275c073e28663bfc8393b5f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 21 May 2025 21:04:07 -0400
Subject: [PATCH 889/997] Only specify that we have reliable f16 and f128 on
 targets where those types are supported

---
 src/lib.rs | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/src/lib.rs b/src/lib.rs
index 6994c385fc83..66e9ce4627c8 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -521,13 +521,16 @@ fn target_config(sess: &Session, target_info: &LockedTargetInfo) -> TargetConfig
     let target_features = f(false);
     let unstable_target_features = f(true);
 
+    let has_reliable_f16 = target_info.supports_target_dependent_type(CType::Float16);
+    let has_reliable_f128 = target_info.supports_target_dependent_type(CType::Float128);
+
     TargetConfig {
         target_features,
         unstable_target_features,
         // There are no known bugs with GCC support for f16 or f128
-        has_reliable_f16: true,
-        has_reliable_f16_math: true,
-        has_reliable_f128: true,
-        has_reliable_f128_math: true,
+        has_reliable_f16,
+        has_reliable_f16_math: has_reliable_f16,
+        has_reliable_f128,
+        has_reliable_f128_math: has_reliable_f128,
     }
 }

From dd6d5e2b103c6c1424026e41984dc4d106c499f3 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 22 May 2025 19:02:12 -0400
Subject: [PATCH 890/997] Fix f128 intrinsics

---
 build_system/src/test.rs |   2 +-
 src/builder.rs           |  19 +++++--
 src/common.rs            |   5 +-
 src/intrinsic/mod.rs     | 108 +++++++++++++++++++++++++++++++++++----
 4 files changed, 116 insertions(+), 18 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index df4ac85233b0..df46bd1259f8 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -680,7 +680,7 @@ fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
     println!("[TEST] libcore");
     let path = get_sysroot_dir().join("sysroot_src/library/coretests");
     let _ = remove_dir_all(path.join("target"));
-    run_cargo_command(&[&"test"], Some(&path), env, args)?;
+    run_cargo_command(&[&"test", &"--release"], Some(&path), env, args)?;
     Ok(())
 }
 
diff --git a/src/builder.rs b/src/builder.rs
index f54a1a941ea8..c7900ebcd6f4 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -4,8 +4,8 @@ use std::convert::TryFrom;
 use std::ops::Deref;
 
 use gccjit::{
-    BinaryOp, Block, ComparisonOp, Context, Function, LValue, Location, RValue, ToRValue, Type,
-    UnaryOp,
+    BinaryOp, Block, ComparisonOp, Context, Function, FunctionType, LValue, Location, RValue,
+    ToRValue, Type, UnaryOp,
 };
 use rustc_abi as abi;
 use rustc_abi::{Align, HasDataLayout, Size, TargetDataLayout, WrappingRange};
@@ -782,8 +782,19 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
                 return self.context.new_call(self.location, fmod, &[a, b]);
             }
             TypeKind::FP128 => {
-                let fmodl = self.context.get_builtin_function("fmodl");
-                return self.context.new_call(self.location, fmodl, &[a, b]);
+                let f128_type = self.type_f128();
+                let fmodf128 = self.context.new_function(
+                    None,
+                    FunctionType::Extern,
+                    f128_type,
+                    &[
+                        self.context.new_parameter(None, f128_type, "a"),
+                        self.context.new_parameter(None, f128_type, "b"),
+                    ],
+                    "fmodf128",
+                    false,
+                );
+                return self.context.new_call(self.location, fmodf128, &[a, b]);
             }
             _ => (),
         }
diff --git a/src/common.rs b/src/common.rs
index cfa951ddf4b7..65f4788d9021 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -237,14 +237,15 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
 
                 // FIXME(antoyo): there's some issues with using the u128 code that follows, so hard-code
                 // the paths for floating-point values.
-                if ty == self.float_type {
+                // TODO: Remove this code?
+                /*if ty == self.float_type {
                     return self
                         .context
                         .new_rvalue_from_double(ty, f32::from_bits(data as u32) as f64);
                 }
                 if ty == self.double_type {
                     return self.context.new_rvalue_from_double(ty, f64::from_bits(data as u64));
-                }
+                }*/
 
                 let value = self.const_uint_big(self.type_ix(bitsize), data);
                 let bytesize = layout.size(self).bytes();
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 8402d0c6fcf8..acecab35d724 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -45,10 +45,8 @@ fn get_simple_intrinsic<'gcc, 'tcx>(
     let gcc_name = match name {
         sym::sqrtf32 => "sqrtf",
         sym::sqrtf64 => "sqrt",
-        sym::sqrtf128 => "sqrtl",
         sym::powif32 => "__builtin_powif",
         sym::powif64 => "__builtin_powi",
-        sym::powif128 => "__builtin_powil",
         sym::sinf32 => "sinf",
         sym::sinf64 => "sin",
         sym::cosf32 => "cosf",
@@ -67,7 +65,6 @@ fn get_simple_intrinsic<'gcc, 'tcx>(
         sym::log2f64 => "log2",
         sym::fmaf32 => "fmaf",
         sym::fmaf64 => "fma",
-        sym::fmaf128 => "fmal",
         // FIXME: calling `fma` from libc without FMA target feature uses expensive software emulation
         sym::fmuladdf32 => "fmaf", // TODO: use gcc intrinsic analogous to llvm.fmuladd.f32
         sym::fmuladdf64 => "fma",  // TODO: use gcc intrinsic analogous to llvm.fmuladd.f64
@@ -75,29 +72,22 @@ fn get_simple_intrinsic<'gcc, 'tcx>(
         sym::fabsf64 => "fabs",
         sym::minnumf32 => "fminf",
         sym::minnumf64 => "fmin",
-        sym::minnumf128 => "fminl",
         sym::maxnumf32 => "fmaxf",
         sym::maxnumf64 => "fmax",
-        sym::maxnumf128 => "fmaxl",
         sym::copysignf32 => "copysignf",
         sym::copysignf64 => "copysign",
         sym::copysignf128 => "copysignl",
         sym::floorf32 => "floorf",
         sym::floorf64 => "floor",
-        sym::floorf128 => "floorl",
         sym::ceilf32 => "ceilf",
         sym::ceilf64 => "ceil",
-        sym::ceilf128 => "ceill",
         sym::truncf32 => "truncf",
         sym::truncf64 => "trunc",
-        sym::truncf128 => "truncl",
         // We match the LLVM backend and lower this to `rint`.
         sym::round_ties_even_f32 => "rintf",
         sym::round_ties_even_f64 => "rint",
-        sym::round_ties_even_f128 => "rintl",
         sym::roundf32 => "roundf",
         sym::roundf64 => "round",
-        sym::roundf128 => "roundl",
         sym::abort => "abort",
         _ => return None,
     };
@@ -170,6 +160,61 @@ fn get_simple_function<'gcc, 'tcx>(
     ))
 }
 
+fn get_simple_function_f128<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    name: Symbol,
+) -> Option<Function<'gcc>> {
+    if !cx.supports_f128_type {
+        return None;
+    }
+
+    let f128_type = cx.type_f128();
+    let func_name = match name {
+        sym::ceilf128 => "ceilf128",
+        sym::floorf128 => "floorf128",
+        sym::truncf128 => "truncf128",
+        sym::roundf128 => "roundf128",
+        sym::round_ties_even_f128 => "roundevenf128",
+        sym::sqrtf128 => "sqrtf128",
+        _ => return None,
+    };
+    Some(cx.context.new_function(
+        None,
+        FunctionType::Extern,
+        f128_type,
+        &[cx.context.new_parameter(None, f128_type, "a")],
+        func_name,
+        false,
+    ))
+}
+
+fn get_simple_function_f128_2args<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    name: Symbol,
+) -> Option<Function<'gcc>> {
+    if !cx.supports_f128_type {
+        return None;
+    }
+
+    let f128_type = cx.type_f128();
+    let func_name = match name {
+        sym::maxnumf128 => "fmaxf128",
+        sym::minnumf128 => "fminf128",
+        _ => return None,
+    };
+    Some(cx.context.new_function(
+        None,
+        FunctionType::Extern,
+        f128_type,
+        &[
+            cx.context.new_parameter(None, f128_type, "a"),
+            cx.context.new_parameter(None, f128_type, "b"),
+        ],
+        func_name,
+        false,
+    ))
+}
+
 fn f16_builtin<'gcc, 'tcx>(
     cx: &CodegenCx<'gcc, 'tcx>,
     name: Symbol,
@@ -232,7 +277,9 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
         let result = PlaceRef::new_sized(llresult, fn_abi.ret.layout);
 
         let simple = get_simple_intrinsic(self, name);
-        let simple_func = get_simple_function(self, name);
+        let simple_func = get_simple_function(self, name)
+            .or_else(|| get_simple_function_f128(self, name))
+            .or_else(|| get_simple_function_f128_2args(self, name));
 
         // FIXME(tempdragon): Re-enable `clippy::suspicious_else_formatting` if the following issue is solved:
         // https://github.com/rust-lang/rust-clippy/issues/12497
@@ -266,6 +313,45 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
             | sym::round_ties_even_f16
             | sym::sqrtf16
             | sym::truncf16 => f16_builtin(self, name, args),
+            sym::fmaf128 => {
+                let f128_type = self.cx.type_f128();
+                let func = self.cx.context.new_function(
+                    None,
+                    FunctionType::Extern,
+                    f128_type,
+                    &[
+                        self.cx.context.new_parameter(None, f128_type, "a"),
+                        self.cx.context.new_parameter(None, f128_type, "b"),
+                        self.cx.context.new_parameter(None, f128_type, "c"),
+                    ],
+                    "fmaf128",
+                    false,
+                );
+                self.cx.context.new_call(
+                    self.location,
+                    func,
+                    &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
+                )
+            }
+            sym::powif128 => {
+                let f128_type = self.cx.type_f128();
+                let func = self.cx.context.new_function(
+                    None,
+                    FunctionType::Extern,
+                    f128_type,
+                    &[
+                        self.cx.context.new_parameter(None, f128_type, "a"),
+                        self.cx.context.new_parameter(None, self.int_type, "b"),
+                    ],
+                    "__powitf2",
+                    false,
+                );
+                self.cx.context.new_call(
+                    self.location,
+                    func,
+                    &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
+                )
+            }
             sym::is_val_statically_known => {
                 let a = args[0].immediate();
                 let builtin = self.context.get_builtin_function("__builtin_constant_p");

From f1d5cfea44007f2312c24442dff95951a7d51aff Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 24 May 2025 11:05:51 -0400
Subject: [PATCH 891/997] Skip the core test f16::test_total_cmp because it
 fails in debug mode even with cg_llvm

---
 build_system/src/test.rs | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index df46bd1259f8..5ad75384e5ea 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -680,7 +680,15 @@ fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
     println!("[TEST] libcore");
     let path = get_sysroot_dir().join("sysroot_src/library/coretests");
     let _ = remove_dir_all(path.join("target"));
-    run_cargo_command(&[&"test", &"--release"], Some(&path), env, args)?;
+    // TODO(antoyo): run in release mode when we fix the failures.
+    // TODO(antoyo): remove the --skip f16::test_total_cmp when this issue is fixed:
+    // https://github.com/rust-lang/rust/issues/141503
+    run_cargo_command(
+        &[&"test", &"--", &"--skip", &"f16::test_total_cmp"],
+        Some(&path),
+        env,
+        args,
+    )?;
     Ok(())
 }
 

From 1afdb550193caea993648e2dc34427335eaca4b2 Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Fri, 23 May 2025 12:24:53 +0200
Subject: [PATCH 892/997] Fix to 128 bit int unaligned loads

---
 src/builder.rs           |  7 ++++++-
 src/context.rs           | 10 +++++++++-
 tests/run/packed_u128.rs | 31 +++++++++++++++++++++++++++++++
 3 files changed, 46 insertions(+), 2 deletions(-)
 create mode 100644 tests/run/packed_u128.rs

diff --git a/src/builder.rs b/src/builder.rs
index 4e2163201fd0..893a2bc9a23e 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -924,7 +924,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // dereference after a drop, for instance.
         // FIXME(antoyo): this check that we don't call get_aligned() a second time on a type.
         // Ideally, we shouldn't need to do this check.
-        let aligned_type = if pointee_ty == self.cx.u128_type || pointee_ty == self.cx.i128_type {
+        // FractalFir: the `align == self.int128_align` check ensures we *do* call `get_aligned` if
+        // the alignment of a `u128`/`i128` is not the one mandated by the ABI. This ensures we handle
+        // under-aligned loads correctly.
+        let aligned_type = if (pointee_ty == self.cx.u128_type || pointee_ty == self.cx.i128_type)
+            && align == self.int128_align
+        {
             pointee_ty
         } else {
             pointee_ty.get_aligned(align.bytes())
diff --git a/src/context.rs b/src/context.rs
index 10494a4be55b..51c2be85d518 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -4,7 +4,7 @@ use std::collections::HashMap;
 use gccjit::{
     Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, Location, RValue, Type,
 };
-use rustc_abi::{HasDataLayout, PointeeInfo, Size, TargetDataLayout, VariantIdx};
+use rustc_abi::{Align, HasDataLayout, PointeeInfo, Size, TargetDataLayout, VariantIdx};
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::errors as ssa_errors;
 use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeCodegenMethods, MiscCodegenMethods};
@@ -135,6 +135,9 @@ pub struct CodegenCx<'gcc, 'tcx> {
 
     #[cfg(feature = "master")]
     pub cleanup_blocks: RefCell<FxHashSet<Block<'gcc>>>,
+    /// The alignment of a u128/i128 type.
+    // We cache this, since it is needed for alignment checks during loads.
+    pub int128_align: Align,
 }
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
@@ -226,6 +229,11 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         }
 
         let mut cx = Self {
+            int128_align: tcx
+                .layout_of(ty::TypingEnv::fully_monomorphized().as_query_input(tcx.types.i128))
+                .expect("Can't get the layout of `i128`")
+                .align
+                .abi,
             const_cache: Default::default(),
             codegen_unit,
             context,
diff --git a/tests/run/packed_u128.rs b/tests/run/packed_u128.rs
new file mode 100644
index 000000000000..b7cc6e210236
--- /dev/null
+++ b/tests/run/packed_u128.rs
@@ -0,0 +1,31 @@
+// Compiler:
+//
+// Run-time:
+//   status: 0
+
+#![feature(no_core)]
+#![no_std]
+#![no_core]
+#![no_main]
+
+extern crate mini_core;
+use intrinsics::black_box;
+use mini_core::*;
+#[repr(packed(1))]
+pub struct ScalarInt {
+    data: u128,
+    size: u8,
+}
+#[inline(never)]
+#[no_mangle]
+fn read_data(a: &ScalarInt) {
+    black_box(a.data);
+}
+
+#[no_mangle]
+extern "C" fn main(argc: i32, _argv: *const *const u8) -> i32 {
+    let data =
+        [black_box(ScalarInt { data: 0, size: 1 }), black_box(ScalarInt { data: 0, size: 1 })];
+    read_data(&data[1]);
+    0
+}

From d098c8a2beda9911a0274b8658e4362e8e185a32 Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Fri, 9 May 2025 22:47:20 +0200
Subject: [PATCH 893/997] modifed y.sh to allow for running cargo tests.

---
 .github/workflows/ci.yml      |  3 +--
 .github/workflows/m68k.yml    |  2 +-
 .github/workflows/release.yml |  3 +--
 .github/workflows/stdarch.yml |  2 +-
 CONTRIBUTING.md               |  2 +-
 build_system/src/test.rs      | 34 +++++++++++++++++++++++++++++++++-
 6 files changed, 38 insertions(+), 8 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index ef024258ffc8..91c5abaa6b56 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -80,8 +80,7 @@ jobs:
       run: |
         ./y.sh prepare --only-libcore
         ./y.sh build --sysroot
-        ./y.sh test --mini-tests
-        cargo test
+        ./y.sh test --cargo-tests
 
     - name: Run y.sh cargo build
       run: |
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 21731f7087e2..b905707dedab 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -95,7 +95,7 @@ jobs:
         ./y.sh prepare --only-libcore --cross
         ./y.sh build --sysroot --features compiler_builtins/no-f16-f128 --target-triple m68k-unknown-linux-gnu
         ./y.sh test --mini-tests
-        CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu cargo test
+        CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu ./y.sh test --cargo-tests
         ./y.sh clean all
 
     - name: Prepare dependencies
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 47a40286554e..51d84c92b440 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -56,8 +56,7 @@ jobs:
       run: |
         ./y.sh prepare --only-libcore
         EMBED_LTO_BITCODE=1 ./y.sh build --sysroot --release --release-sysroot
-        ./y.sh test --mini-tests
-        cargo test
+        ./y.sh test --cargo-tests
         ./y.sh clean all
 
     - name: Prepare dependencies
diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml
index 4b9f48e7b183..93e5019ec889 100644
--- a/.github/workflows/stdarch.yml
+++ b/.github/workflows/stdarch.yml
@@ -90,7 +90,7 @@ jobs:
       if: ${{ !matrix.cargo_runner }}
       run: |
         ./y.sh test --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore
-        cargo test
+        ./y.sh test --cargo-tests
 
     - name: Run stdarch tests
       if: ${{ !matrix.cargo_runner }}
diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 8e313ab08b59..54cba0e6de37 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -33,7 +33,7 @@ To run specific tests, use appropriate flags such as:
 
 - `./y.sh test --test-libcore`
 - `./y.sh test --std-tests`
-- `cargo test -- <name of test>`
+- `./y.sh test --cargo-tests -- <name of test>`
 
 Additionally, you can run the tests of `libgccjit`:
 
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index df4ac85233b0..959f49ff937c 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -42,7 +42,7 @@ fn get_runners() -> Runners {
     );
     runners.insert("--extended-regex-tests", ("Run extended regex tests", extended_regex_tests));
     runners.insert("--mini-tests", ("Run mini tests", mini_tests));
-
+    runners.insert("--cargo-tests", ("Run cargo tests", cargo_tests));
     runners
 }
 
@@ -88,6 +88,8 @@ struct TestArg {
     use_system_gcc: bool,
     runners: Vec<String>,
     flags: Vec<String>,
+    /// Additional arguments, to be passed to commands like `cargo test`.
+    test_args: Vec<String>,
     nb_parts: Option<usize>,
     current_part: Option<usize>,
     sysroot_panic_abort: bool,
@@ -144,6 +146,7 @@ impl TestArg {
                     show_usage();
                     return Ok(None);
                 }
+                "--" => test_arg.test_args.extend(&mut args),
                 x if runners.contains_key(x)
                     && !test_arg.runners.iter().any(|runner| runner == x) =>
                 {
@@ -203,6 +206,33 @@ fn clean(_env: &Env, args: &TestArg) -> Result<(), String> {
     create_dir(&path)
 }
 
+fn cargo_tests(test_env: &Env, test_args: &TestArg) -> Result<(), String> {
+    // First, we call `mini_tests` to build minicore for us. This ensures we are testing with a working `minicore`,
+    // and that any changes we have made affect `minicore`(since it would get rebuilt).
+    mini_tests(test_env, test_args)?;
+    // Then, we copy some of the env vars from `test_env`
+    // We don't want to pass things like `RUSTFLAGS`, since they contain the -Zcodegen-backend flag.
+    // That would force `cg_gcc` to *rebuild itself* and only then run tests, which is undesirable.
+    let mut env = HashMap::new();
+    env.insert(
+        "LD_LIBRARY_PATH".into(),
+        test_env.get("LD_LIBRARY_PATH").expect("LD_LIBRARY_PATH missing!").to_string(),
+    );
+    env.insert(
+        "LIBRARY_PATH".into(),
+        test_env.get("LIBRARY_PATH").expect("LIBRARY_PATH missing!").to_string(),
+    );
+    env.insert(
+        "CG_RUSTFLAGS".into(),
+        test_env.get("CG_RUSTFLAGS").map(|s| s.as_str()).unwrap_or("").to_string(),
+    );
+    // Pass all the default args + the user-specified ones.
+    let mut args: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"test"];
+    args.extend(test_args.test_args.iter().map(|s| s as &dyn AsRef<OsStr>));
+    run_command_with_output_and_env(&args, None, Some(&env))?;
+    Ok(())
+}
+
 fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[BUILD] mini_core");
@@ -1217,7 +1247,9 @@ fn run_all(env: &Env, args: &TestArg) -> Result<(), String> {
     // asm_tests(env, args)?;
     test_libcore(env, args)?;
     extended_sysroot_tests(env, args)?;
+    cargo_tests(env, args)?;
     test_rustc(env, args)?;
+
     Ok(())
 }
 

From 22ca1245758cbfae8e45b8b8ad16848a7de5a954 Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Wed, 28 May 2025 13:16:55 +0200
Subject: [PATCH 894/997] Added support for easy fuzzing with rustlantis

---
 .gitignore               |   3 +-
 build_system/src/fuzz.rs | 238 +++++++++++++++++++++++++++++++++++++++
 build_system/src/main.rs |   7 +-
 3 files changed, 246 insertions(+), 2 deletions(-)
 create mode 100644 build_system/src/fuzz.rs

diff --git a/.gitignore b/.gitignore
index c1e6631a281b..8f73d3eb972a 100644
--- a/.gitignore
+++ b/.gitignore
@@ -19,4 +19,5 @@ tools/llvmint-2
 llvm
 build_system/target
 config.toml
-build
\ No newline at end of file
+build
+rustlantis
\ No newline at end of file
diff --git a/build_system/src/fuzz.rs b/build_system/src/fuzz.rs
new file mode 100644
index 000000000000..05a87412b361
--- /dev/null
+++ b/build_system/src/fuzz.rs
@@ -0,0 +1,238 @@
+use std::ffi::OsStr;
+use std::path::Path;
+
+use crate::utils::run_command_with_output;
+
+fn show_usage() {
+    println!(
+        r#"
+`fuzz` command help:
+    --help                 : Show this help"#
+    );
+}
+
+pub fn run() -> Result<(), String> {
+    // We skip binary name and the `fuzz` command.
+    let mut args = std::env::args().skip(2);
+    let mut start = 0;
+    let mut count = 100;
+    let mut threads =
+        std::thread::available_parallelism().map(|threads| threads.get()).unwrap_or(1);
+    while let Some(arg) = args.next() {
+        match arg.as_str() {
+            "--help" => {
+                show_usage();
+                return Ok(());
+            }
+            "--start" => {
+                start =
+                    str::parse(&args.next().ok_or_else(|| "Fuzz start not provided!".to_string())?)
+                        .map_err(|err| (format!("Fuzz start not a number {err:?}!")))?;
+            }
+            "--count" => {
+                count =
+                    str::parse(&args.next().ok_or_else(|| "Fuzz count not provided!".to_string())?)
+                        .map_err(|err| (format!("Fuzz count not a number {err:?}!")))?;
+            }
+            "-j" | "--jobs" => {
+                threads = str::parse(
+                    &args.next().ok_or_else(|| "Fuzz thread count not provided!".to_string())?,
+                )
+                .map_err(|err| (format!("Fuzz thread count not a number {err:?}!")))?;
+            }
+            _ => return Err(format!("Unknown option {}", arg)),
+        }
+    }
+
+    // Ensure that we have a cloned version of rustlantis on hand.
+    crate::utils::git_clone(
+        "https://github.com/cbeuw/rustlantis.git",
+        Some("clones/rustlantis".as_ref()),
+        true,
+    )
+    .map_err(|err| (format!("Git clone failed with message: {err:?}!")))?;
+
+    // Ensure that we are on the newest rustlantis commit.
+    let cmd: &[&dyn AsRef<OsStr>] = &[&"git", &"pull", &"origin"];
+    run_command_with_output(cmd, Some(&Path::new("clones/rustlantis")))?;
+
+    // Build the release version of rustlantis
+    let cmd: &[&dyn AsRef<OsStr>] = &[&"cargo", &"build", &"--release"];
+    run_command_with_output(cmd, Some(&Path::new("clones/rustlantis")))?;
+    // Fuzz a given range
+    fuzz_range(start, start + count, threads);
+    Ok(())
+}
+
+/// Fuzzes a range `start..end` with `threads`.
+fn fuzz_range(start: u64, end: u64, threads: usize) {
+    use std::sync::Arc;
+    use std::sync::atomic::{AtomicU64, Ordering};
+    use std::time::{Duration, Instant};
+    // Total amount of files to fuzz
+    let total = end - start;
+    // Currently fuzzed element
+    let start = Arc::new(AtomicU64::new(start));
+    // Count time during fuzzing
+    let start_time = Instant::now();
+    // Spawn `threads`..
+    for _ in 0..threads {
+        let start = start.clone();
+        // .. which each will ..
+        std::thread::spawn(move || {
+            // ... grab the next fuzz seed ...
+            while start.load(Ordering::Relaxed) < end {
+                let next = start.fetch_add(1, Ordering::Relaxed);
+                // .. test that seed .
+                match test(next) {
+                    Err(err) => {
+                        // If the test failed at compile-time...
+                        println!("test({}) failed because {err:?}", next);
+                        // ... copy that file to the directory `target/fuzz/compiletime_error`...
+                        let mut out_path: std::path::PathBuf =
+                            "target/fuzz/compiletime_error".into();
+                        std::fs::create_dir_all(&out_path).unwrap();
+                        // .. into a file named `fuzz{seed}.rs`.
+                        out_path.push(&format!("fuzz{next}.rs"));
+                        std::fs::copy(err, out_path).unwrap();
+                    }
+                    Ok(Err(err)) => {
+                        // If the test failed at run-time...
+                        println!("The LLVM and GCC results don't match for {err:?}");
+                        // ... copy that file to the directory `target/fuzz/runtime_error`...
+                        let mut out_path: std::path::PathBuf = "target/fuzz/runtime_error".into();
+                        std::fs::create_dir_all(&out_path).unwrap();
+                        // .. into a file named `fuzz{seed}.rs`.
+                        out_path.push(&format!("fuzz{next}.rs"));
+                        std::fs::copy(err, out_path).unwrap();
+                    }
+                    // If the test passed, do nothing
+                    Ok(Ok(())) => (),
+                }
+            }
+        });
+    }
+    // The "manager" thread loop.
+    while start.load(Ordering::Relaxed) < end {
+        // Every 500 ms...
+        let five_hundred_millis = Duration::from_millis(500);
+        std::thread::sleep(five_hundred_millis);
+        // ... calculate the remaining fuzz iters ...
+        let remaining = end - start.load(Ordering::Relaxed);
+        // ... fix the count(the start counter counts the cases that
+        // begun fuzzing, and not only the ones that are done)...
+        let fuzzed = (total - remaining) - threads as u64;
+        // ... and the fuzz speed ...
+        let iter_per_sec = fuzzed as f64 / start_time.elapsed().as_secs_f64();
+        // .. and use them to display fuzzing stats.
+        println!(
+            "fuzzed {fuzzed} cases({}%), at rate {iter_per_sec} iter/s, remaining ~{}s",
+            (100 * fuzzed) as f64 / total as f64,
+            (remaining as f64) / iter_per_sec
+        )
+    }
+}
+
+/// Builds & runs a file with LLVM.
+fn debug_llvm(path: &std::path::Path) -> Result<Vec<u8>, String> {
+    // Build a file named `llvm_elf`...
+    let exe_path = path.with_extension("llvm_elf");
+    // ... using the LLVM backend ...
+    let output = std::process::Command::new("rustc")
+        .arg(path)
+        .arg("-o")
+        .arg(&exe_path)
+        .output()
+        .map_err(|err| format!("{err:?}"))?;
+    // ... check that the compilation succeeded ...
+    if !output.status.success() {
+        return Err(format!("LLVM compilation failed:{output:?}"));
+    }
+    // ... run the resulting executable ...
+    let output =
+        std::process::Command::new(&exe_path).output().map_err(|err| format!("{err:?}"))?;
+    // ... check it run normally ...
+    if !output.status.success() {
+        return Err(format!(
+            "The program at {path:?}, compiled with LLVM, exited unsuccessfully:{output:?}"
+        ));
+    }
+    // ... cleanup that executable ...
+    std::fs::remove_file(exe_path).map_err(|err| format!("{err:?}"))?;
+    // ... and return the output(stdout + stderr - this allows UB checks to fire).
+    let mut res = output.stdout;
+    res.extend(output.stderr);
+    Ok(res)
+}
+
+/// Builds & runs a file with GCC.
+fn release_gcc(path: &std::path::Path) -> Result<Vec<u8>, String> {
+    // Build a file named `gcc_elf`...
+    let exe_path = path.with_extension("gcc_elf");
+    // ... using the GCC backend ...
+    let output = std::process::Command::new("./y.sh")
+        .arg("rustc")
+        .arg(path)
+        .arg("-O")
+        .arg("-o")
+        .arg(&exe_path)
+        .output()
+        .map_err(|err| format!("{err:?}"))?;
+    // ... check that the compilation succeeded ...
+    if !output.status.success() {
+        return Err(format!("GCC compilation failed:{output:?}"));
+    }
+    // ... run the resulting executable ..
+    let output =
+        std::process::Command::new(&exe_path).output().map_err(|err| format!("{err:?}"))?;
+    // ... check it run normally ...
+    if !output.status.success() {
+        return Err(format!(
+            "The program at {path:?}, compiled with GCC, exited unsuccessfully:{output:?}"
+        ));
+    }
+    // ... cleanup that executable ...
+    std::fs::remove_file(exe_path).map_err(|err| format!("{err:?}"))?;
+    // ... and return the output(stdout + stderr - this allows UB checks to fire).
+    let mut res = output.stdout;
+    res.extend(output.stderr);
+    Ok(res)
+}
+
+/// Generates a new rustlantis file, & compares the result of running it with GCC and LLVM.
+fn test(seed: u64) -> Result<Result<(), std::path::PathBuf>, String> {
+    // Generate a Rust source...
+    let source_file = generate(seed)?;
+    // ... test it with debug LLVM ...
+    let llvm_res = debug_llvm(&source_file)?;
+    // ... test it with release GCC ...
+    let gcc_res = release_gcc(&source_file)?;
+    // ... compare the results ...
+    if llvm_res != gcc_res {
+        // .. if they don't match, report an error.
+        Ok(Err(source_file))
+    } else {
+        std::fs::remove_file(source_file).map_err(|err| format!("{err:?}"))?;
+        Ok(Ok(()))
+    }
+}
+
+/// Generates a new rustlantis file for us to run tests on.
+fn generate(seed: u64) -> Result<std::path::PathBuf, String> {
+    use std::io::Write;
+    let mut out_path = std::env::temp_dir();
+    out_path.push(&format!("fuzz{seed}.rs"));
+    // We need to get the command output here.
+    let out = std::process::Command::new("cargo")
+        .args(["run", "--release", "--bin", "generate"])
+        .arg(&format!("{seed}"))
+        .current_dir("clones/rustlantis")
+        .output()
+        .map_err(|err| format!("{err:?}"))?;
+    // Stuff the rustlantis output in a source file.
+    std::fs::File::create(&out_path)
+        .map_err(|err| format!("{err:?}"))?
+        .write_all(&out.stdout)
+        .map_err(|err| format!("{err:?}"))?;
+    Ok(out_path)
+}
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index c70b00e09ae7..078a4726ba80 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -5,6 +5,7 @@ mod clean;
 mod clone_gcc;
 mod config;
 mod fmt;
+mod fuzz;
 mod info;
 mod prepare;
 mod rust_tools;
@@ -42,7 +43,8 @@ Commands:
         test      : Runs tests for the project.
         info      : Displays information about the build environment and project configuration.
         clone-gcc : Clones the GCC compiler from a specified source.
-        fmt       : Runs rustfmt"
+        fmt       : Runs rustfmt
+        fuzz      : Fuzzes `cg_gcc` using rustlantis"
     );
 }
 
@@ -56,6 +58,7 @@ pub enum Command {
     Test,
     Info,
     Fmt,
+    Fuzz,
 }
 
 fn main() {
@@ -75,6 +78,7 @@ fn main() {
         Some("info") => Command::Info,
         Some("clone-gcc") => Command::CloneGcc,
         Some("fmt") => Command::Fmt,
+        Some("fuzz") => Command::Fuzz,
         Some("--help") => {
             usage();
             process::exit(0);
@@ -97,6 +101,7 @@ fn main() {
         Command::Info => info::run(),
         Command::CloneGcc => clone_gcc::run(),
         Command::Fmt => fmt::run(),
+        Command::Fuzz => fuzz::run(),
     } {
         eprintln!("Command failed to run: {e}");
         process::exit(1);

From ea03697899429047a4c4f5856922969c440a9480 Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Thu, 29 May 2025 00:20:23 +0200
Subject: [PATCH 895/997] Removed some env vars from the CI

---
 .github/workflows/ci.yml       | 2 --
 .github/workflows/failures.yml | 4 ++--
 .github/workflows/m68k.yml     | 4 ++--
 .github/workflows/release.yml  | 4 ++--
 4 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 91c5abaa6b56..96d69a229315 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -64,8 +64,6 @@ jobs:
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
 
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
diff --git a/.github/workflows/failures.yml b/.github/workflows/failures.yml
index bc42eb1468ea..67b7fbe4478b 100644
--- a/.github/workflows/failures.yml
+++ b/.github/workflows/failures.yml
@@ -66,8 +66,8 @@ jobs:
       run: |
           sudo dpkg --force-overwrite -i gcc-15.deb
           echo 'gcc-path = "/usr/lib"' > config.toml
-          echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
-          echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+          
+          
 
     - name: Set env
       run: |
diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index b905707dedab..245bee7f2a3b 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -65,8 +65,8 @@ jobs:
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+        
+        
 
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 51d84c92b440..b9c385b4231f 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -49,8 +49,8 @@ jobs:
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+        
+        
 
     - name: Build
       run: |

From ac69f1eecb698f14ed2df060cca99af8ba8f658d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 30 May 2025 13:49:26 -0400
Subject: [PATCH 896/997] Pin compiler_builtins to 0.1.160 to fix some f128
 tests

---
 ...001-Pin-compiler_builtins-to-0.1.160.patch | 39 +++++++++++++++++++
 1 file changed, 39 insertions(+)
 create mode 100644 patches/0001-Pin-compiler_builtins-to-0.1.160.patch

diff --git a/patches/0001-Pin-compiler_builtins-to-0.1.160.patch b/patches/0001-Pin-compiler_builtins-to-0.1.160.patch
new file mode 100644
index 000000000000..39266e081ede
--- /dev/null
+++ b/patches/0001-Pin-compiler_builtins-to-0.1.160.patch
@@ -0,0 +1,39 @@
+From cdb3d407740e4f15c3746051f8ba89b8e74e99d3 Mon Sep 17 00:00:00 2001
+From: None <none@example.com>
+Date: Fri, 30 May 2025 13:46:22 -0400
+Subject: [PATCH] Pin compiler_builtins to 0.1.160
+
+---
+ library/alloc/Cargo.toml | 2 +-
+ library/std/Cargo.toml   | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/library/alloc/Cargo.toml b/library/alloc/Cargo.toml
+index 9d0d957..365c9dc 100644
+--- a/library/alloc/Cargo.toml
++++ b/library/alloc/Cargo.toml
+@@ -16,7 +16,7 @@ bench = false
+ 
+ [dependencies]
+ core = { path = "../core", public = true }
+-compiler_builtins = { version = "=0.1.159", features = ['rustc-dep-of-std'] }
++compiler_builtins = { version = "=0.1.160", features = ['rustc-dep-of-std'] }
+ 
+ [features]
+ compiler-builtins-mem = ['compiler_builtins/mem']
+diff --git a/library/std/Cargo.toml b/library/std/Cargo.toml
+index 4ff4895..31371f0 100644
+--- a/library/std/Cargo.toml
++++ b/library/std/Cargo.toml
+@@ -18,7 +18,7 @@ cfg-if = { version = "1.0", features = ['rustc-dep-of-std'] }
+ panic_unwind = { path = "../panic_unwind", optional = true }
+ panic_abort = { path = "../panic_abort" }
+ core = { path = "../core", public = true }
+-compiler_builtins = { version = "=0.1.159" }
++compiler_builtins = { version = "=0.1.160" }
+ unwind = { path = "../unwind" }
+ hashbrown = { version = "0.15", default-features = false, features = [
+     'rustc-dep-of-std',
+-- 
+2.49.0
+

From 267f94e0187f82e69decc469a3f9a0f1bd65564d Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Mon, 2 Jun 2025 11:17:05 +0200
Subject: [PATCH 897/997] Added some bare-bones support for explict registers
 in ARM inline assembly

---
 src/asm.rs | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/asm.rs b/src/asm.rs
index c35337ae7ce0..e04512ebd540 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -641,7 +641,8 @@ fn explicit_reg_to_gcc(reg: InlineAsmReg) -> &'static str {
                 },
             }
         }
-
+        InlineAsmReg::Arm(reg) => reg.name(),
+        InlineAsmReg::AArch64(reg) => reg.name(),
         _ => unimplemented!(),
     }
 }

From ba53d9749798a32a9ce3a2db4123942ed81252a7 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 2 Jun 2025 12:44:42 -0400
Subject: [PATCH 898/997] Fix cast from u128 to f128

---
 src/int.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/int.rs b/src/int.rs
index 9b5b0fde6e2f..fed96e5eb8c0 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -915,7 +915,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         let name_suffix = match self.type_kind(dest_typ) {
             TypeKind::Float => "tisf",
             TypeKind::Double => "tidf",
-            TypeKind::FP128 => "tixf",
+            TypeKind::FP128 => "titf",
             kind => panic!("cannot cast a non-native integer to type {:?}", kind),
         };
         let sign = if signed { "" } else { "un" };

From 2d7d0ee91c4406a42ae74b9dc80c940140fe2095 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 2 Jun 2025 14:35:19 -0400
Subject: [PATCH 899/997] Update to nightly-2025-06-02

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index bafe497a2a2a..8be204c15810 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2025-05-21"
+channel = "nightly-2025-06-02"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From 38f134c7db8d88c28b1b300f37d05e9d6674b6b6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 2 Jun 2025 14:35:25 -0400
Subject: [PATCH 900/997] Remove unneeded patch

---
 ...001-Pin-compiler_builtins-to-0.1.160.patch | 39 -------------------
 1 file changed, 39 deletions(-)
 delete mode 100644 patches/0001-Pin-compiler_builtins-to-0.1.160.patch

diff --git a/patches/0001-Pin-compiler_builtins-to-0.1.160.patch b/patches/0001-Pin-compiler_builtins-to-0.1.160.patch
deleted file mode 100644
index 39266e081ede..000000000000
--- a/patches/0001-Pin-compiler_builtins-to-0.1.160.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From cdb3d407740e4f15c3746051f8ba89b8e74e99d3 Mon Sep 17 00:00:00 2001
-From: None <none@example.com>
-Date: Fri, 30 May 2025 13:46:22 -0400
-Subject: [PATCH] Pin compiler_builtins to 0.1.160
-
----
- library/alloc/Cargo.toml | 2 +-
- library/std/Cargo.toml   | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/library/alloc/Cargo.toml b/library/alloc/Cargo.toml
-index 9d0d957..365c9dc 100644
---- a/library/alloc/Cargo.toml
-+++ b/library/alloc/Cargo.toml
-@@ -16,7 +16,7 @@ bench = false
- 
- [dependencies]
- core = { path = "../core", public = true }
--compiler_builtins = { version = "=0.1.159", features = ['rustc-dep-of-std'] }
-+compiler_builtins = { version = "=0.1.160", features = ['rustc-dep-of-std'] }
- 
- [features]
- compiler-builtins-mem = ['compiler_builtins/mem']
-diff --git a/library/std/Cargo.toml b/library/std/Cargo.toml
-index 4ff4895..31371f0 100644
---- a/library/std/Cargo.toml
-+++ b/library/std/Cargo.toml
-@@ -18,7 +18,7 @@ cfg-if = { version = "1.0", features = ['rustc-dep-of-std'] }
- panic_unwind = { path = "../panic_unwind", optional = true }
- panic_abort = { path = "../panic_abort" }
- core = { path = "../core", public = true }
--compiler_builtins = { version = "=0.1.159" }
-+compiler_builtins = { version = "=0.1.160" }
- unwind = { path = "../unwind" }
- hashbrown = { version = "0.15", default-features = false, features = [
-     'rustc-dep-of-std',
--- 
-2.49.0
-

From 659d996a1903ca800c135f4f4b57bd70904481c8 Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Tue, 3 Jun 2025 10:10:13 +0200
Subject: [PATCH 901/997] Changed intrinsic generation

---
 src/intrinsic/llvm.rs        |  3 ++-
 tools/generate_intrinsics.py | 24 +++++++++++++++++++-----
 2 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 0eebd21001a9..2c44fb237887 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1548,10 +1548,11 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.tcmmrlfp16ps" => "__builtin_trap",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
-        _ => include!("archs.rs"),
+        _ => map_arch_intrinsic(name),
     };
 
     let func = cx.context.get_target_builtin_function(gcc_name);
     cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
     func
 }
+include!("archs.rs");
diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index 181f1e501a40..e24139f9a406 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -168,25 +168,39 @@ def update_intrinsics(llvm_path, llvmint, llvmint2):
         os.path.dirname(os.path.abspath(__file__)),
         "../src/intrinsic/archs.rs",
     )
+    # A hashmap of all architectures. This allows us to first match on the architecture, and then on the intrisnics. 
+    # This speeds up the comparison, and makes our code considerably smaller.
+    # Since all intrinsic names start with ".llvm", we skip that prefix. 
     print("Updating content of `{}`...".format(output_file))
     with open(output_file, "w", encoding="utf8") as out:
         out.write("// File generated by `rustc_codegen_gcc/tools/generate_intrinsics.py`\n")
         out.write("// DO NOT EDIT IT!\n")
-        out.write("match name {\n")
+        out.write("/// Translate a given LLVM intrinsic name to an equivalent GCC one.\n")
+        out.write("fn map_arch_intrinsic(name:&str)->&str{\n")
+        out.write('let Some(name) =  name.strip_prefix("llvm.") else {unimplemented!("***** unsupported LLVM intrinsic {}", name)};\n')
+        out.write('let Some((arch, name)) =  name.split_once(\'.\') else {unimplemented!("***** unsupported LLVM intrinsic {}", name)};\n')
+        out.write("match arch {\n")
         for arch in archs:
             if len(intrinsics[arch]) == 0:
                 continue
+            out.write("\"{}\" => {{ #[allow(non_snake_case)] fn {}(name:&str)->&str{{ match name{{".format(arch,arch))
             intrinsics[arch].sort(key=lambda x: (x[0], x[2]))
             out.write('    // {}\n'.format(arch))
             for entry in intrinsics[arch]:
+                llvm_name = entry[0].removeprefix("llvm.");
+                llvm_name = llvm_name.removeprefix(arch);
+                llvm_name = llvm_name.removeprefix(".");
                 if entry[2] is True: # if it is a duplicate
-                    out.write('    // [DUPLICATE]: "{}" => "{}",\n'.format(entry[0], entry[1]))
+                    out.write('    // [DUPLICATE]: "{}" => "{}",\n'.format(llvm_name, entry[1]))
                 elif "_round_mask" in entry[1]:
-                    out.write('    // [INVALID CONVERSION]: "{}" => "{}",\n'.format(entry[0], entry[1]))
+                    out.write('    // [INVALID CONVERSION]: "{}" => "{}",\n'.format(llvm_name, entry[1]))
                 else:
-                    out.write('    "{}" => "{}",\n'.format(entry[0], entry[1]))
+                    out.write('    "{}" => "{}",\n'.format(llvm_name, entry[1]))
+            out.write('    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),\n')
+            out.write("}} }} {}(name) }}\n,".format(arch))
         out.write('    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),\n')
-        out.write("}\n")
+        out.write("}\n}")
+    subprocess.call(["rustfmt", output_file])
     print("Done!")
 
 

From 6fbac9342b86e095abcfd365f1d1eea17bca0b59 Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Tue, 3 Jun 2025 10:10:33 +0200
Subject: [PATCH 902/997] Regenerated intrinsics

---
 src/intrinsic/archs.rs | 20150 ++++++++++++++++++++-------------------
 1 file changed, 10175 insertions(+), 9975 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 5ada535aa41d..f0352c5e6e5d 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -1,9978 +1,10178 @@
 // File generated by `rustc_codegen_gcc/tools/generate_intrinsics.py`
 // DO NOT EDIT IT!
-match name {
-    // AMDGPU
-    "llvm.AMDGPU.div.fixup.f32" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.f64" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.v2f64" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.v4f32" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fmas.f32" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.f64" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.v2f64" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.v4f32" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.ldexp.f32" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.f64" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.v2f64" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.v4f32" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.rcp.f32" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.f64" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.v2f64" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.v4f32" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rsq.clamped.f32" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.f64" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.v2f64" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.v4f32" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.f32" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.f64" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.v2f64" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.v4f32" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.trig.preop.f32" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.f64" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
-    // aarch64
-    "llvm.aarch64.chkfeat" => "__builtin_arm_chkfeat",
-    "llvm.aarch64.dmb" => "__builtin_arm_dmb",
-    "llvm.aarch64.dsb" => "__builtin_arm_dsb",
-    "llvm.aarch64.gcspopm" => "__builtin_arm_gcspopm",
-    "llvm.aarch64.gcsss" => "__builtin_arm_gcsss",
-    "llvm.aarch64.isb" => "__builtin_arm_isb",
-    "llvm.aarch64.prefetch" => "__builtin_arm_prefetch",
-    "llvm.aarch64.sme.in.streaming.mode" => "__builtin_arm_in_streaming_mode",
-    "llvm.aarch64.sve.aesd" => "__builtin_sve_svaesd_u8",
-    "llvm.aarch64.sve.aese" => "__builtin_sve_svaese_u8",
-    "llvm.aarch64.sve.aesimc" => "__builtin_sve_svaesimc_u8",
-    "llvm.aarch64.sve.aesmc" => "__builtin_sve_svaesmc_u8",
-    "llvm.aarch64.sve.rax1" => "__builtin_sve_svrax1_u64",
-    "llvm.aarch64.sve.rdffr" => "__builtin_sve_svrdffr",
-    "llvm.aarch64.sve.rdffr.z" => "__builtin_sve_svrdffr_z",
-    "llvm.aarch64.sve.setffr" => "__builtin_sve_svsetffr",
-    "llvm.aarch64.sve.sm4e" => "__builtin_sve_svsm4e_u32",
-    "llvm.aarch64.sve.sm4ekey" => "__builtin_sve_svsm4ekey_u32",
-    "llvm.aarch64.sve.wrffr" => "__builtin_sve_svwrffr",
-    "llvm.aarch64.tcancel" => "__builtin_arm_tcancel",
-    "llvm.aarch64.tcommit" => "__builtin_arm_tcommit",
-    "llvm.aarch64.tstart" => "__builtin_arm_tstart",
-    "llvm.aarch64.ttest" => "__builtin_arm_ttest",
-    // amdgcn
-    "llvm.amdgcn.alignbyte" => "__builtin_amdgcn_alignbyte",
-    "llvm.amdgcn.ashr.pk.i8.i32" => "__builtin_amdgcn_ashr_pk_i8_i32",
-    "llvm.amdgcn.ashr.pk.u8.i32" => "__builtin_amdgcn_ashr_pk_u8_i32",
-    "llvm.amdgcn.buffer.wbinvl1" => "__builtin_amdgcn_buffer_wbinvl1",
-    "llvm.amdgcn.buffer.wbinvl1.sc" => "__builtin_amdgcn_buffer_wbinvl1_sc",
-    "llvm.amdgcn.buffer.wbinvl1.vol" => "__builtin_amdgcn_buffer_wbinvl1_vol",
-    "llvm.amdgcn.cubeid" => "__builtin_amdgcn_cubeid",
-    "llvm.amdgcn.cubema" => "__builtin_amdgcn_cubema",
-    "llvm.amdgcn.cubesc" => "__builtin_amdgcn_cubesc",
-    "llvm.amdgcn.cubetc" => "__builtin_amdgcn_cubetc",
-    "llvm.amdgcn.cvt.f32.bf8" => "__builtin_amdgcn_cvt_f32_bf8",
-    "llvm.amdgcn.cvt.f32.fp8" => "__builtin_amdgcn_cvt_f32_fp8",
-    "llvm.amdgcn.cvt.off.f32.i4" => "__builtin_amdgcn_cvt_off_f32_i4",
-    "llvm.amdgcn.cvt.pk.bf8.f32" => "__builtin_amdgcn_cvt_pk_bf8_f32",
-    "llvm.amdgcn.cvt.pk.f32.bf8" => "__builtin_amdgcn_cvt_pk_f32_bf8",
-    "llvm.amdgcn.cvt.pk.f32.fp8" => "__builtin_amdgcn_cvt_pk_f32_fp8",
-    "llvm.amdgcn.cvt.pk.fp8.f32" => "__builtin_amdgcn_cvt_pk_fp8_f32",
-    "llvm.amdgcn.cvt.pk.i16" => "__builtin_amdgcn_cvt_pk_i16",
-    "llvm.amdgcn.cvt.pk.u16" => "__builtin_amdgcn_cvt_pk_u16",
-    "llvm.amdgcn.cvt.pk.u8.f32" => "__builtin_amdgcn_cvt_pk_u8_f32",
-    "llvm.amdgcn.cvt.pknorm.i16" => "__builtin_amdgcn_cvt_pknorm_i16",
-    "llvm.amdgcn.cvt.pknorm.u16" => "__builtin_amdgcn_cvt_pknorm_u16",
-    "llvm.amdgcn.cvt.pkrtz" => "__builtin_amdgcn_cvt_pkrtz",
-    "llvm.amdgcn.cvt.scalef32.2xpk16.bf6.f32" => "__builtin_amdgcn_cvt_scalef32_2xpk16_bf6_f32",
-    "llvm.amdgcn.cvt.scalef32.2xpk16.fp6.f32" => "__builtin_amdgcn_cvt_scalef32_2xpk16_fp6_f32",
-    "llvm.amdgcn.cvt.scalef32.f16.bf8" => "__builtin_amdgcn_cvt_scalef32_f16_bf8",
-    "llvm.amdgcn.cvt.scalef32.f16.fp8" => "__builtin_amdgcn_cvt_scalef32_f16_fp8",
-    "llvm.amdgcn.cvt.scalef32.f32.bf8" => "__builtin_amdgcn_cvt_scalef32_f32_bf8",
-    "llvm.amdgcn.cvt.scalef32.f32.fp8" => "__builtin_amdgcn_cvt_scalef32_f32_fp8",
-    "llvm.amdgcn.cvt.scalef32.pk.bf16.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_bf8",
-    "llvm.amdgcn.cvt.scalef32.pk.bf16.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_fp4",
-    "llvm.amdgcn.cvt.scalef32.pk.bf16.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_fp8",
-    "llvm.amdgcn.cvt.scalef32.pk.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_bf16",
-    "llvm.amdgcn.cvt.scalef32.pk.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_f16",
-    "llvm.amdgcn.cvt.scalef32.pk.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_f32",
-    "llvm.amdgcn.cvt.scalef32.pk.f16.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_f16_bf8",
-    "llvm.amdgcn.cvt.scalef32.pk.f16.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_f16_fp4",
-    "llvm.amdgcn.cvt.scalef32.pk.f16.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_f16_fp8",
-    "llvm.amdgcn.cvt.scalef32.pk.f32.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_f32_bf8",
-    "llvm.amdgcn.cvt.scalef32.pk.f32.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_f32_fp4",
-    "llvm.amdgcn.cvt.scalef32.pk.f32.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_f32_fp8",
-    "llvm.amdgcn.cvt.scalef32.pk.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_bf16",
-    "llvm.amdgcn.cvt.scalef32.pk.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_f16",
-    "llvm.amdgcn.cvt.scalef32.pk.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_f32",
-    "llvm.amdgcn.cvt.scalef32.pk.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_bf16",
-    "llvm.amdgcn.cvt.scalef32.pk.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_f16",
-    "llvm.amdgcn.cvt.scalef32.pk.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_f32",
-    "llvm.amdgcn.cvt.scalef32.pk32.bf16.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_bf16_bf6",
-    "llvm.amdgcn.cvt.scalef32.pk32.bf16.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_bf16_fp6",
-    "llvm.amdgcn.cvt.scalef32.pk32.bf6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk32_bf6_bf16",
-    "llvm.amdgcn.cvt.scalef32.pk32.bf6.f16" => "__builtin_amdgcn_cvt_scalef32_pk32_bf6_f16",
-    "llvm.amdgcn.cvt.scalef32.pk32.f16.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_f16_bf6",
-    "llvm.amdgcn.cvt.scalef32.pk32.f16.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_f16_fp6",
-    "llvm.amdgcn.cvt.scalef32.pk32.f32.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_f32_bf6",
-    "llvm.amdgcn.cvt.scalef32.pk32.f32.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_f32_fp6",
-    "llvm.amdgcn.cvt.scalef32.pk32.fp6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk32_fp6_bf16",
-    "llvm.amdgcn.cvt.scalef32.pk32.fp6.f16" => "__builtin_amdgcn_cvt_scalef32_pk32_fp6_f16",
-    "llvm.amdgcn.cvt.scalef32.sr.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_bf16",
-    "llvm.amdgcn.cvt.scalef32.sr.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_f16",
-    "llvm.amdgcn.cvt.scalef32.sr.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_f32",
-    "llvm.amdgcn.cvt.scalef32.sr.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_bf16",
-    "llvm.amdgcn.cvt.scalef32.sr.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_f16",
-    "llvm.amdgcn.cvt.scalef32.sr.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_f32",
-    "llvm.amdgcn.cvt.scalef32.sr.pk.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_bf16",
-    "llvm.amdgcn.cvt.scalef32.sr.pk.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_f16",
-    "llvm.amdgcn.cvt.scalef32.sr.pk.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_f32",
-    "llvm.amdgcn.cvt.scalef32.sr.pk32.bf6.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_bf16",
-    "llvm.amdgcn.cvt.scalef32.sr.pk32.bf6.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_f16",
-    "llvm.amdgcn.cvt.scalef32.sr.pk32.bf6.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_f32",
-    "llvm.amdgcn.cvt.scalef32.sr.pk32.fp6.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_bf16",
-    "llvm.amdgcn.cvt.scalef32.sr.pk32.fp6.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_f16",
-    "llvm.amdgcn.cvt.scalef32.sr.pk32.fp6.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_f32",
-    "llvm.amdgcn.cvt.sr.bf16.f32" => "__builtin_amdgcn_cvt_sr_bf16_f32",
-    "llvm.amdgcn.cvt.sr.bf8.f32" => "__builtin_amdgcn_cvt_sr_bf8_f32",
-    "llvm.amdgcn.cvt.sr.f16.f32" => "__builtin_amdgcn_cvt_sr_f16_f32",
-    "llvm.amdgcn.cvt.sr.fp8.f32" => "__builtin_amdgcn_cvt_sr_fp8_f32",
-    "llvm.amdgcn.dispatch.id" => "__builtin_amdgcn_dispatch_id",
-    "llvm.amdgcn.dot4.f32.bf8.bf8" => "__builtin_amdgcn_dot4_f32_bf8_bf8",
-    "llvm.amdgcn.dot4.f32.bf8.fp8" => "__builtin_amdgcn_dot4_f32_bf8_fp8",
-    "llvm.amdgcn.dot4.f32.fp8.bf8" => "__builtin_amdgcn_dot4_f32_fp8_bf8",
-    "llvm.amdgcn.dot4.f32.fp8.fp8" => "__builtin_amdgcn_dot4_f32_fp8_fp8",
-    "llvm.amdgcn.ds.add.gs.reg.rtn" => "__builtin_amdgcn_ds_add_gs_reg_rtn",
-    "llvm.amdgcn.ds.bpermute" => "__builtin_amdgcn_ds_bpermute",
-    "llvm.amdgcn.ds.bpermute.fi.b32" => "__builtin_amdgcn_ds_bpermute_fi_b32",
-    "llvm.amdgcn.ds.gws.barrier" => "__builtin_amdgcn_ds_gws_barrier",
-    "llvm.amdgcn.ds.gws.init" => "__builtin_amdgcn_ds_gws_init",
-    "llvm.amdgcn.ds.gws.sema.br" => "__builtin_amdgcn_ds_gws_sema_br",
-    "llvm.amdgcn.ds.gws.sema.p" => "__builtin_amdgcn_ds_gws_sema_p",
-    "llvm.amdgcn.ds.gws.sema.release.all" => "__builtin_amdgcn_ds_gws_sema_release_all",
-    "llvm.amdgcn.ds.gws.sema.v" => "__builtin_amdgcn_ds_gws_sema_v",
-    "llvm.amdgcn.ds.permute" => "__builtin_amdgcn_ds_permute",
-    "llvm.amdgcn.ds.sub.gs.reg.rtn" => "__builtin_amdgcn_ds_sub_gs_reg_rtn",
-    "llvm.amdgcn.ds.swizzle" => "__builtin_amdgcn_ds_swizzle",
-    "llvm.amdgcn.endpgm" => "__builtin_amdgcn_endpgm",
-    "llvm.amdgcn.fdot2" => "__builtin_amdgcn_fdot2",
-    "llvm.amdgcn.fdot2.bf16.bf16" => "__builtin_amdgcn_fdot2_bf16_bf16",
-    "llvm.amdgcn.fdot2.f16.f16" => "__builtin_amdgcn_fdot2_f16_f16",
-    "llvm.amdgcn.fdot2.f32.bf16" => "__builtin_amdgcn_fdot2_f32_bf16",
-    "llvm.amdgcn.fdot2c.f32.bf16" => "__builtin_amdgcn_fdot2c_f32_bf16",
-    "llvm.amdgcn.fmul.legacy" => "__builtin_amdgcn_fmul_legacy",
-    "llvm.amdgcn.global.load.lds" => "__builtin_amdgcn_global_load_lds",
-    "llvm.amdgcn.groupstaticsize" => "__builtin_amdgcn_groupstaticsize",
-    "llvm.amdgcn.iglp.opt" => "__builtin_amdgcn_iglp_opt",
-    "llvm.amdgcn.implicit.buffer.ptr" => "__builtin_amdgcn_implicit_buffer_ptr",
-    "llvm.amdgcn.implicitarg.ptr" => "__builtin_amdgcn_implicitarg_ptr",
-    "llvm.amdgcn.interp.mov" => "__builtin_amdgcn_interp_mov",
-    "llvm.amdgcn.interp.p1" => "__builtin_amdgcn_interp_p1",
-    "llvm.amdgcn.interp.p1.f16" => "__builtin_amdgcn_interp_p1_f16",
-    "llvm.amdgcn.interp.p2" => "__builtin_amdgcn_interp_p2",
-    "llvm.amdgcn.interp.p2.f16" => "__builtin_amdgcn_interp_p2_f16",
-    "llvm.amdgcn.is.private" => "__builtin_amdgcn_is_private",
-    "llvm.amdgcn.is.shared" => "__builtin_amdgcn_is_shared",
-    "llvm.amdgcn.kernarg.segment.ptr" => "__builtin_amdgcn_kernarg_segment_ptr",
-    "llvm.amdgcn.lerp" => "__builtin_amdgcn_lerp",
-    "llvm.amdgcn.mbcnt.hi" => "__builtin_amdgcn_mbcnt_hi",
-    "llvm.amdgcn.mbcnt.lo" => "__builtin_amdgcn_mbcnt_lo",
-    "llvm.amdgcn.mfma.f32.16x16x16bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x16bf16_1k",
-    "llvm.amdgcn.mfma.f32.16x16x16f16" => "__builtin_amdgcn_mfma_f32_16x16x16f16",
-    "llvm.amdgcn.mfma.f32.16x16x1f32" => "__builtin_amdgcn_mfma_f32_16x16x1f32",
-    "llvm.amdgcn.mfma.f32.16x16x2bf16" => "__builtin_amdgcn_mfma_f32_16x16x2bf16",
-    "llvm.amdgcn.mfma.f32.16x16x32.bf16" => "__builtin_amdgcn_mfma_f32_16x16x32_bf16",
-    "llvm.amdgcn.mfma.f32.16x16x32.bf8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_bf8",
-    "llvm.amdgcn.mfma.f32.16x16x32.bf8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_fp8",
-    "llvm.amdgcn.mfma.f32.16x16x32.f16" => "__builtin_amdgcn_mfma_f32_16x16x32_f16",
-    "llvm.amdgcn.mfma.f32.16x16x32.fp8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_bf8",
-    "llvm.amdgcn.mfma.f32.16x16x32.fp8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_fp8",
-    "llvm.amdgcn.mfma.f32.16x16x4bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x4bf16_1k",
-    "llvm.amdgcn.mfma.f32.16x16x4f16" => "__builtin_amdgcn_mfma_f32_16x16x4f16",
-    "llvm.amdgcn.mfma.f32.16x16x4f32" => "__builtin_amdgcn_mfma_f32_16x16x4f32",
-    "llvm.amdgcn.mfma.f32.16x16x8.xf32" => "__builtin_amdgcn_mfma_f32_16x16x8_xf32",
-    "llvm.amdgcn.mfma.f32.16x16x8bf16" => "__builtin_amdgcn_mfma_f32_16x16x8bf16",
-    "llvm.amdgcn.mfma.f32.32x32x16.bf16" => "__builtin_amdgcn_mfma_f32_32x32x16_bf16",
-    "llvm.amdgcn.mfma.f32.32x32x16.bf8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_bf8",
-    "llvm.amdgcn.mfma.f32.32x32x16.bf8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_fp8",
-    "llvm.amdgcn.mfma.f32.32x32x16.f16" => "__builtin_amdgcn_mfma_f32_32x32x16_f16",
-    "llvm.amdgcn.mfma.f32.32x32x16.fp8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_bf8",
-    "llvm.amdgcn.mfma.f32.32x32x16.fp8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_fp8",
-    "llvm.amdgcn.mfma.f32.32x32x1f32" => "__builtin_amdgcn_mfma_f32_32x32x1f32",
-    "llvm.amdgcn.mfma.f32.32x32x2bf16" => "__builtin_amdgcn_mfma_f32_32x32x2bf16",
-    "llvm.amdgcn.mfma.f32.32x32x2f32" => "__builtin_amdgcn_mfma_f32_32x32x2f32",
-    "llvm.amdgcn.mfma.f32.32x32x4.xf32" => "__builtin_amdgcn_mfma_f32_32x32x4_xf32",
-    "llvm.amdgcn.mfma.f32.32x32x4bf16" => "__builtin_amdgcn_mfma_f32_32x32x4bf16",
-    "llvm.amdgcn.mfma.f32.32x32x4bf16.1k" => "__builtin_amdgcn_mfma_f32_32x32x4bf16_1k",
-    "llvm.amdgcn.mfma.f32.32x32x4f16" => "__builtin_amdgcn_mfma_f32_32x32x4f16",
-    "llvm.amdgcn.mfma.f32.32x32x8bf16.1k" => "__builtin_amdgcn_mfma_f32_32x32x8bf16_1k",
-    "llvm.amdgcn.mfma.f32.32x32x8f16" => "__builtin_amdgcn_mfma_f32_32x32x8f16",
-    "llvm.amdgcn.mfma.f32.4x4x1f32" => "__builtin_amdgcn_mfma_f32_4x4x1f32",
-    "llvm.amdgcn.mfma.f32.4x4x2bf16" => "__builtin_amdgcn_mfma_f32_4x4x2bf16",
-    "llvm.amdgcn.mfma.f32.4x4x4bf16.1k" => "__builtin_amdgcn_mfma_f32_4x4x4bf16_1k",
-    "llvm.amdgcn.mfma.f32.4x4x4f16" => "__builtin_amdgcn_mfma_f32_4x4x4f16",
-    "llvm.amdgcn.mfma.f64.16x16x4f64" => "__builtin_amdgcn_mfma_f64_16x16x4f64",
-    "llvm.amdgcn.mfma.f64.4x4x4f64" => "__builtin_amdgcn_mfma_f64_4x4x4f64",
-    "llvm.amdgcn.mfma.i32.16x16x16i8" => "__builtin_amdgcn_mfma_i32_16x16x16i8",
-    "llvm.amdgcn.mfma.i32.16x16x32.i8" => "__builtin_amdgcn_mfma_i32_16x16x32_i8",
-    "llvm.amdgcn.mfma.i32.16x16x4i8" => "__builtin_amdgcn_mfma_i32_16x16x4i8",
-    "llvm.amdgcn.mfma.i32.16x16x64.i8" => "__builtin_amdgcn_mfma_i32_16x16x64_i8",
-    "llvm.amdgcn.mfma.i32.32x32x16.i8" => "__builtin_amdgcn_mfma_i32_32x32x16_i8",
-    "llvm.amdgcn.mfma.i32.32x32x32.i8" => "__builtin_amdgcn_mfma_i32_32x32x32_i8",
-    "llvm.amdgcn.mfma.i32.32x32x4i8" => "__builtin_amdgcn_mfma_i32_32x32x4i8",
-    "llvm.amdgcn.mfma.i32.32x32x8i8" => "__builtin_amdgcn_mfma_i32_32x32x8i8",
-    "llvm.amdgcn.mfma.i32.4x4x4i8" => "__builtin_amdgcn_mfma_i32_4x4x4i8",
-    "llvm.amdgcn.mqsad.pk.u16.u8" => "__builtin_amdgcn_mqsad_pk_u16_u8",
-    "llvm.amdgcn.mqsad.u32.u8" => "__builtin_amdgcn_mqsad_u32_u8",
-    "llvm.amdgcn.msad.u8" => "__builtin_amdgcn_msad_u8",
-    "llvm.amdgcn.perm" => "__builtin_amdgcn_perm",
-    "llvm.amdgcn.permlane16.var" => "__builtin_amdgcn_permlane16_var",
-    "llvm.amdgcn.permlanex16.var" => "__builtin_amdgcn_permlanex16_var",
-    "llvm.amdgcn.prng.b32" => "__builtin_amdgcn_prng_b32",
-    "llvm.amdgcn.qsad.pk.u16.u8" => "__builtin_amdgcn_qsad_pk_u16_u8",
-    "llvm.amdgcn.queue.ptr" => "__builtin_amdgcn_queue_ptr",
-    "llvm.amdgcn.raw.ptr.buffer.load.lds" => "__builtin_amdgcn_raw_ptr_buffer_load_lds",
-    "llvm.amdgcn.rcp.legacy" => "__builtin_amdgcn_rcp_legacy",
-    "llvm.amdgcn.rsq.legacy" => "__builtin_amdgcn_rsq_legacy",
-    "llvm.amdgcn.s.barrier" => "__builtin_amdgcn_s_barrier",
-    "llvm.amdgcn.s.barrier.signal" => "__builtin_amdgcn_s_barrier_signal",
-    "llvm.amdgcn.s.barrier.signal.isfirst" => "__builtin_amdgcn_s_barrier_signal_isfirst",
-    "llvm.amdgcn.s.barrier.signal.var" => "__builtin_amdgcn_s_barrier_signal_var",
-    "llvm.amdgcn.s.barrier.wait" => "__builtin_amdgcn_s_barrier_wait",
-    "llvm.amdgcn.s.buffer.prefetch.data" => "__builtin_amdgcn_s_buffer_prefetch_data",
-    "llvm.amdgcn.s.dcache.inv" => "__builtin_amdgcn_s_dcache_inv",
-    "llvm.amdgcn.s.dcache.inv.vol" => "__builtin_amdgcn_s_dcache_inv_vol",
-    "llvm.amdgcn.s.dcache.wb" => "__builtin_amdgcn_s_dcache_wb",
-    "llvm.amdgcn.s.dcache.wb.vol" => "__builtin_amdgcn_s_dcache_wb_vol",
-    "llvm.amdgcn.s.decperflevel" => "__builtin_amdgcn_s_decperflevel",
-    "llvm.amdgcn.s.get.barrier.state" => "__builtin_amdgcn_s_get_barrier_state",
-    "llvm.amdgcn.s.get.named.barrier.state" => "__builtin_amdgcn_s_get_named_barrier_state",
-    "llvm.amdgcn.s.get.waveid.in.workgroup" => "__builtin_amdgcn_s_get_waveid_in_workgroup",
-    "llvm.amdgcn.s.getpc" => "__builtin_amdgcn_s_getpc",
-    "llvm.amdgcn.s.getreg" => "__builtin_amdgcn_s_getreg",
-    "llvm.amdgcn.s.incperflevel" => "__builtin_amdgcn_s_incperflevel",
-    "llvm.amdgcn.s.memrealtime" => "__builtin_amdgcn_s_memrealtime",
-    "llvm.amdgcn.s.memtime" => "__builtin_amdgcn_s_memtime",
-    "llvm.amdgcn.s.sendmsg" => "__builtin_amdgcn_s_sendmsg",
-    "llvm.amdgcn.s.sendmsghalt" => "__builtin_amdgcn_s_sendmsghalt",
-    "llvm.amdgcn.s.setprio" => "__builtin_amdgcn_s_setprio",
-    "llvm.amdgcn.s.setreg" => "__builtin_amdgcn_s_setreg",
-    "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_sleep",
-    "llvm.amdgcn.s.sleep.var" => "__builtin_amdgcn_s_sleep_var",
-    "llvm.amdgcn.s.ttracedata" => "__builtin_amdgcn_s_ttracedata",
-    "llvm.amdgcn.s.ttracedata.imm" => "__builtin_amdgcn_s_ttracedata_imm",
-    "llvm.amdgcn.s.wait.event.export.ready" => "__builtin_amdgcn_s_wait_event_export_ready",
-    "llvm.amdgcn.s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
-    "llvm.amdgcn.sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
-    "llvm.amdgcn.sad.u16" => "__builtin_amdgcn_sad_u16",
-    "llvm.amdgcn.sad.u8" => "__builtin_amdgcn_sad_u8",
-    "llvm.amdgcn.sched.barrier" => "__builtin_amdgcn_sched_barrier",
-    "llvm.amdgcn.sched.group.barrier" => "__builtin_amdgcn_sched_group_barrier",
-    "llvm.amdgcn.sdot2" => "__builtin_amdgcn_sdot2",
-    "llvm.amdgcn.sdot4" => "__builtin_amdgcn_sdot4",
-    "llvm.amdgcn.sdot8" => "__builtin_amdgcn_sdot8",
-    "llvm.amdgcn.smfmac.f32.16x16x128.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x128_bf8_bf8",
-    "llvm.amdgcn.smfmac.f32.16x16x128.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x128_bf8_fp8",
-    "llvm.amdgcn.smfmac.f32.16x16x128.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x128_fp8_bf8",
-    "llvm.amdgcn.smfmac.f32.16x16x128.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x128_fp8_fp8",
-    "llvm.amdgcn.smfmac.f32.16x16x32.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x32_bf16",
-    "llvm.amdgcn.smfmac.f32.16x16x32.f16" => "__builtin_amdgcn_smfmac_f32_16x16x32_f16",
-    "llvm.amdgcn.smfmac.f32.16x16x64.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf16",
-    "llvm.amdgcn.smfmac.f32.16x16x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_bf8",
-    "llvm.amdgcn.smfmac.f32.16x16x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_fp8",
-    "llvm.amdgcn.smfmac.f32.16x16x64.f16" => "__builtin_amdgcn_smfmac_f32_16x16x64_f16",
-    "llvm.amdgcn.smfmac.f32.16x16x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_bf8",
-    "llvm.amdgcn.smfmac.f32.16x16x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_fp8",
-    "llvm.amdgcn.smfmac.f32.32x32x16.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x16_bf16",
-    "llvm.amdgcn.smfmac.f32.32x32x16.f16" => "__builtin_amdgcn_smfmac_f32_32x32x16_f16",
-    "llvm.amdgcn.smfmac.f32.32x32x32.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf16",
-    "llvm.amdgcn.smfmac.f32.32x32x32.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_bf8",
-    "llvm.amdgcn.smfmac.f32.32x32x32.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_fp8",
-    "llvm.amdgcn.smfmac.f32.32x32x32.f16" => "__builtin_amdgcn_smfmac_f32_32x32x32_f16",
-    "llvm.amdgcn.smfmac.f32.32x32x32.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_bf8",
-    "llvm.amdgcn.smfmac.f32.32x32x32.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_fp8",
-    "llvm.amdgcn.smfmac.f32.32x32x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x64_bf8_bf8",
-    "llvm.amdgcn.smfmac.f32.32x32x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x64_bf8_fp8",
-    "llvm.amdgcn.smfmac.f32.32x32x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x64_fp8_bf8",
-    "llvm.amdgcn.smfmac.f32.32x32x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x64_fp8_fp8",
-    "llvm.amdgcn.smfmac.i32.16x16x128.i8" => "__builtin_amdgcn_smfmac_i32_16x16x128_i8",
-    "llvm.amdgcn.smfmac.i32.16x16x64.i8" => "__builtin_amdgcn_smfmac_i32_16x16x64_i8",
-    "llvm.amdgcn.smfmac.i32.32x32x32.i8" => "__builtin_amdgcn_smfmac_i32_32x32x32_i8",
-    "llvm.amdgcn.smfmac.i32.32x32x64.i8" => "__builtin_amdgcn_smfmac_i32_32x32x64_i8",
-    "llvm.amdgcn.sudot4" => "__builtin_amdgcn_sudot4",
-    "llvm.amdgcn.sudot8" => "__builtin_amdgcn_sudot8",
-    "llvm.amdgcn.udot2" => "__builtin_amdgcn_udot2",
-    "llvm.amdgcn.udot4" => "__builtin_amdgcn_udot4",
-    "llvm.amdgcn.udot8" => "__builtin_amdgcn_udot8",
-    "llvm.amdgcn.wave.barrier" => "__builtin_amdgcn_wave_barrier",
-    "llvm.amdgcn.wavefrontsize" => "__builtin_amdgcn_wavefrontsize",
-    "llvm.amdgcn.workgroup.id.x" => "__builtin_amdgcn_workgroup_id_x",
-    "llvm.amdgcn.workgroup.id.y" => "__builtin_amdgcn_workgroup_id_y",
-    "llvm.amdgcn.workgroup.id.z" => "__builtin_amdgcn_workgroup_id_z",
-    "llvm.amdgcn.workitem.id.x" => "__builtin_amdgcn_workitem_id_x",
-    "llvm.amdgcn.workitem.id.y" => "__builtin_amdgcn_workitem_id_y",
-    "llvm.amdgcn.workitem.id.z" => "__builtin_amdgcn_workitem_id_z",
-    // arm
-    "llvm.arm.cdp" => "__builtin_arm_cdp",
-    "llvm.arm.cdp2" => "__builtin_arm_cdp2",
-    "llvm.arm.cmse.tt" => "__builtin_arm_cmse_TT",
-    "llvm.arm.cmse.tta" => "__builtin_arm_cmse_TTA",
-    "llvm.arm.cmse.ttat" => "__builtin_arm_cmse_TTAT",
-    "llvm.arm.cmse.ttt" => "__builtin_arm_cmse_TTT",
-    "llvm.arm.dmb" => "__builtin_arm_dmb",
-    "llvm.arm.dsb" => "__builtin_arm_dsb",
-    "llvm.arm.get.fpscr" => "__builtin_arm_get_fpscr",
-    "llvm.arm.isb" => "__builtin_arm_isb",
-    "llvm.arm.ldc" => "__builtin_arm_ldc",
-    "llvm.arm.ldc2" => "__builtin_arm_ldc2",
-    "llvm.arm.ldc2l" => "__builtin_arm_ldc2l",
-    "llvm.arm.ldcl" => "__builtin_arm_ldcl",
-    "llvm.arm.mcr" => "__builtin_arm_mcr",
-    "llvm.arm.mcr2" => "__builtin_arm_mcr2",
-    "llvm.arm.mcrr" => "__builtin_arm_mcrr",
-    "llvm.arm.mcrr2" => "__builtin_arm_mcrr2",
-    "llvm.arm.mrc" => "__builtin_arm_mrc",
-    "llvm.arm.mrc2" => "__builtin_arm_mrc2",
-    "llvm.arm.qadd" => "__builtin_arm_qadd",
-    "llvm.arm.qadd16" => "__builtin_arm_qadd16",
-    "llvm.arm.qadd8" => "__builtin_arm_qadd8",
-    "llvm.arm.qasx" => "__builtin_arm_qasx",
-    "llvm.arm.qsax" => "__builtin_arm_qsax",
-    "llvm.arm.qsub" => "__builtin_arm_qsub",
-    "llvm.arm.qsub16" => "__builtin_arm_qsub16",
-    "llvm.arm.qsub8" => "__builtin_arm_qsub8",
-    "llvm.arm.sadd16" => "__builtin_arm_sadd16",
-    "llvm.arm.sadd8" => "__builtin_arm_sadd8",
-    "llvm.arm.sasx" => "__builtin_arm_sasx",
-    "llvm.arm.sel" => "__builtin_arm_sel",
-    "llvm.arm.set.fpscr" => "__builtin_arm_set_fpscr",
-    "llvm.arm.shadd16" => "__builtin_arm_shadd16",
-    "llvm.arm.shadd8" => "__builtin_arm_shadd8",
-    "llvm.arm.shasx" => "__builtin_arm_shasx",
-    "llvm.arm.shsax" => "__builtin_arm_shsax",
-    "llvm.arm.shsub16" => "__builtin_arm_shsub16",
-    "llvm.arm.shsub8" => "__builtin_arm_shsub8",
-    "llvm.arm.smlabb" => "__builtin_arm_smlabb",
-    "llvm.arm.smlabt" => "__builtin_arm_smlabt",
-    "llvm.arm.smlad" => "__builtin_arm_smlad",
-    "llvm.arm.smladx" => "__builtin_arm_smladx",
-    "llvm.arm.smlald" => "__builtin_arm_smlald",
-    "llvm.arm.smlaldx" => "__builtin_arm_smlaldx",
-    "llvm.arm.smlatb" => "__builtin_arm_smlatb",
-    "llvm.arm.smlatt" => "__builtin_arm_smlatt",
-    "llvm.arm.smlawb" => "__builtin_arm_smlawb",
-    "llvm.arm.smlawt" => "__builtin_arm_smlawt",
-    "llvm.arm.smlsd" => "__builtin_arm_smlsd",
-    "llvm.arm.smlsdx" => "__builtin_arm_smlsdx",
-    "llvm.arm.smlsld" => "__builtin_arm_smlsld",
-    "llvm.arm.smlsldx" => "__builtin_arm_smlsldx",
-    "llvm.arm.smuad" => "__builtin_arm_smuad",
-    "llvm.arm.smuadx" => "__builtin_arm_smuadx",
-    "llvm.arm.smulbb" => "__builtin_arm_smulbb",
-    "llvm.arm.smulbt" => "__builtin_arm_smulbt",
-    "llvm.arm.smultb" => "__builtin_arm_smultb",
-    "llvm.arm.smultt" => "__builtin_arm_smultt",
-    "llvm.arm.smulwb" => "__builtin_arm_smulwb",
-    "llvm.arm.smulwt" => "__builtin_arm_smulwt",
-    "llvm.arm.smusd" => "__builtin_arm_smusd",
-    "llvm.arm.smusdx" => "__builtin_arm_smusdx",
-    "llvm.arm.ssat" => "__builtin_arm_ssat",
-    "llvm.arm.ssat16" => "__builtin_arm_ssat16",
-    "llvm.arm.ssax" => "__builtin_arm_ssax",
-    "llvm.arm.ssub16" => "__builtin_arm_ssub16",
-    "llvm.arm.ssub8" => "__builtin_arm_ssub8",
-    "llvm.arm.stc" => "__builtin_arm_stc",
-    "llvm.arm.stc2" => "__builtin_arm_stc2",
-    "llvm.arm.stc2l" => "__builtin_arm_stc2l",
-    "llvm.arm.stcl" => "__builtin_arm_stcl",
-    "llvm.arm.sxtab16" => "__builtin_arm_sxtab16",
-    "llvm.arm.sxtb16" => "__builtin_arm_sxtb16",
-    "llvm.arm.thread.pointer" => "__builtin_thread_pointer",
-    "llvm.arm.uadd16" => "__builtin_arm_uadd16",
-    "llvm.arm.uadd8" => "__builtin_arm_uadd8",
-    "llvm.arm.uasx" => "__builtin_arm_uasx",
-    "llvm.arm.uhadd16" => "__builtin_arm_uhadd16",
-    "llvm.arm.uhadd8" => "__builtin_arm_uhadd8",
-    "llvm.arm.uhasx" => "__builtin_arm_uhasx",
-    "llvm.arm.uhsax" => "__builtin_arm_uhsax",
-    "llvm.arm.uhsub16" => "__builtin_arm_uhsub16",
-    "llvm.arm.uhsub8" => "__builtin_arm_uhsub8",
-    "llvm.arm.uqadd16" => "__builtin_arm_uqadd16",
-    "llvm.arm.uqadd8" => "__builtin_arm_uqadd8",
-    "llvm.arm.uqasx" => "__builtin_arm_uqasx",
-    "llvm.arm.uqsax" => "__builtin_arm_uqsax",
-    "llvm.arm.uqsub16" => "__builtin_arm_uqsub16",
-    "llvm.arm.uqsub8" => "__builtin_arm_uqsub8",
-    "llvm.arm.usad8" => "__builtin_arm_usad8",
-    "llvm.arm.usada8" => "__builtin_arm_usada8",
-    "llvm.arm.usat" => "__builtin_arm_usat",
-    "llvm.arm.usat16" => "__builtin_arm_usat16",
-    "llvm.arm.usax" => "__builtin_arm_usax",
-    "llvm.arm.usub16" => "__builtin_arm_usub16",
-    "llvm.arm.usub8" => "__builtin_arm_usub8",
-    "llvm.arm.uxtab16" => "__builtin_arm_uxtab16",
-    "llvm.arm.uxtb16" => "__builtin_arm_uxtb16",
-    // bpf
-    "llvm.bpf.btf.type.id" => "__builtin_bpf_btf_type_id",
-    "llvm.bpf.compare" => "__builtin_bpf_compare",
-    "llvm.bpf.getelementptr.and.load" => "__builtin_bpf_getelementptr_and_load",
-    "llvm.bpf.getelementptr.and.store" => "__builtin_bpf_getelementptr_and_store",
-    "llvm.bpf.load.byte" => "__builtin_bpf_load_byte",
-    "llvm.bpf.load.half" => "__builtin_bpf_load_half",
-    "llvm.bpf.load.word" => "__builtin_bpf_load_word",
-    "llvm.bpf.passthrough" => "__builtin_bpf_passthrough",
-    "llvm.bpf.preserve.enum.value" => "__builtin_bpf_preserve_enum_value",
-    "llvm.bpf.preserve.field.info" => "__builtin_bpf_preserve_field_info",
-    "llvm.bpf.preserve.type.info" => "__builtin_bpf_preserve_type_info",
-    "llvm.bpf.pseudo" => "__builtin_bpf_pseudo",
-    // cuda
-    "llvm.cuda.syncthreads" => "__syncthreads",
-    // hexagon
-    "llvm.hexagon.A2.abs" => "__builtin_HEXAGON_A2_abs",
-    "llvm.hexagon.A2.absp" => "__builtin_HEXAGON_A2_absp",
-    "llvm.hexagon.A2.abssat" => "__builtin_HEXAGON_A2_abssat",
-    "llvm.hexagon.A2.add" => "__builtin_HEXAGON_A2_add",
-    "llvm.hexagon.A2.addh.h16.hh" => "__builtin_HEXAGON_A2_addh_h16_hh",
-    "llvm.hexagon.A2.addh.h16.hl" => "__builtin_HEXAGON_A2_addh_h16_hl",
-    "llvm.hexagon.A2.addh.h16.lh" => "__builtin_HEXAGON_A2_addh_h16_lh",
-    "llvm.hexagon.A2.addh.h16.ll" => "__builtin_HEXAGON_A2_addh_h16_ll",
-    "llvm.hexagon.A2.addh.h16.sat.hh" => "__builtin_HEXAGON_A2_addh_h16_sat_hh",
-    "llvm.hexagon.A2.addh.h16.sat.hl" => "__builtin_HEXAGON_A2_addh_h16_sat_hl",
-    "llvm.hexagon.A2.addh.h16.sat.lh" => "__builtin_HEXAGON_A2_addh_h16_sat_lh",
-    "llvm.hexagon.A2.addh.h16.sat.ll" => "__builtin_HEXAGON_A2_addh_h16_sat_ll",
-    "llvm.hexagon.A2.addh.l16.hl" => "__builtin_HEXAGON_A2_addh_l16_hl",
-    "llvm.hexagon.A2.addh.l16.ll" => "__builtin_HEXAGON_A2_addh_l16_ll",
-    "llvm.hexagon.A2.addh.l16.sat.hl" => "__builtin_HEXAGON_A2_addh_l16_sat_hl",
-    "llvm.hexagon.A2.addh.l16.sat.ll" => "__builtin_HEXAGON_A2_addh_l16_sat_ll",
-    "llvm.hexagon.A2.addi" => "__builtin_HEXAGON_A2_addi",
-    "llvm.hexagon.A2.addp" => "__builtin_HEXAGON_A2_addp",
-    "llvm.hexagon.A2.addpsat" => "__builtin_HEXAGON_A2_addpsat",
-    "llvm.hexagon.A2.addsat" => "__builtin_HEXAGON_A2_addsat",
-    "llvm.hexagon.A2.addsp" => "__builtin_HEXAGON_A2_addsp",
-    "llvm.hexagon.A2.and" => "__builtin_HEXAGON_A2_and",
-    "llvm.hexagon.A2.andir" => "__builtin_HEXAGON_A2_andir",
-    "llvm.hexagon.A2.andp" => "__builtin_HEXAGON_A2_andp",
-    "llvm.hexagon.A2.aslh" => "__builtin_HEXAGON_A2_aslh",
-    "llvm.hexagon.A2.asrh" => "__builtin_HEXAGON_A2_asrh",
-    "llvm.hexagon.A2.combine.hh" => "__builtin_HEXAGON_A2_combine_hh",
-    "llvm.hexagon.A2.combine.hl" => "__builtin_HEXAGON_A2_combine_hl",
-    "llvm.hexagon.A2.combine.lh" => "__builtin_HEXAGON_A2_combine_lh",
-    "llvm.hexagon.A2.combine.ll" => "__builtin_HEXAGON_A2_combine_ll",
-    "llvm.hexagon.A2.combineii" => "__builtin_HEXAGON_A2_combineii",
-    "llvm.hexagon.A2.combinew" => "__builtin_HEXAGON_A2_combinew",
-    "llvm.hexagon.A2.max" => "__builtin_HEXAGON_A2_max",
-    "llvm.hexagon.A2.maxp" => "__builtin_HEXAGON_A2_maxp",
-    "llvm.hexagon.A2.maxu" => "__builtin_HEXAGON_A2_maxu",
-    "llvm.hexagon.A2.maxup" => "__builtin_HEXAGON_A2_maxup",
-    "llvm.hexagon.A2.min" => "__builtin_HEXAGON_A2_min",
-    "llvm.hexagon.A2.minp" => "__builtin_HEXAGON_A2_minp",
-    "llvm.hexagon.A2.minu" => "__builtin_HEXAGON_A2_minu",
-    "llvm.hexagon.A2.minup" => "__builtin_HEXAGON_A2_minup",
-    "llvm.hexagon.A2.neg" => "__builtin_HEXAGON_A2_neg",
-    "llvm.hexagon.A2.negp" => "__builtin_HEXAGON_A2_negp",
-    "llvm.hexagon.A2.negsat" => "__builtin_HEXAGON_A2_negsat",
-    "llvm.hexagon.A2.not" => "__builtin_HEXAGON_A2_not",
-    "llvm.hexagon.A2.notp" => "__builtin_HEXAGON_A2_notp",
-    "llvm.hexagon.A2.or" => "__builtin_HEXAGON_A2_or",
-    "llvm.hexagon.A2.orir" => "__builtin_HEXAGON_A2_orir",
-    "llvm.hexagon.A2.orp" => "__builtin_HEXAGON_A2_orp",
-    "llvm.hexagon.A2.roundsat" => "__builtin_HEXAGON_A2_roundsat",
-    "llvm.hexagon.A2.sat" => "__builtin_HEXAGON_A2_sat",
-    "llvm.hexagon.A2.satb" => "__builtin_HEXAGON_A2_satb",
-    "llvm.hexagon.A2.sath" => "__builtin_HEXAGON_A2_sath",
-    "llvm.hexagon.A2.satub" => "__builtin_HEXAGON_A2_satub",
-    "llvm.hexagon.A2.satuh" => "__builtin_HEXAGON_A2_satuh",
-    "llvm.hexagon.A2.sub" => "__builtin_HEXAGON_A2_sub",
-    "llvm.hexagon.A2.subh.h16.hh" => "__builtin_HEXAGON_A2_subh_h16_hh",
-    "llvm.hexagon.A2.subh.h16.hl" => "__builtin_HEXAGON_A2_subh_h16_hl",
-    "llvm.hexagon.A2.subh.h16.lh" => "__builtin_HEXAGON_A2_subh_h16_lh",
-    "llvm.hexagon.A2.subh.h16.ll" => "__builtin_HEXAGON_A2_subh_h16_ll",
-    "llvm.hexagon.A2.subh.h16.sat.hh" => "__builtin_HEXAGON_A2_subh_h16_sat_hh",
-    "llvm.hexagon.A2.subh.h16.sat.hl" => "__builtin_HEXAGON_A2_subh_h16_sat_hl",
-    "llvm.hexagon.A2.subh.h16.sat.lh" => "__builtin_HEXAGON_A2_subh_h16_sat_lh",
-    "llvm.hexagon.A2.subh.h16.sat.ll" => "__builtin_HEXAGON_A2_subh_h16_sat_ll",
-    "llvm.hexagon.A2.subh.l16.hl" => "__builtin_HEXAGON_A2_subh_l16_hl",
-    "llvm.hexagon.A2.subh.l16.ll" => "__builtin_HEXAGON_A2_subh_l16_ll",
-    "llvm.hexagon.A2.subh.l16.sat.hl" => "__builtin_HEXAGON_A2_subh_l16_sat_hl",
-    "llvm.hexagon.A2.subh.l16.sat.ll" => "__builtin_HEXAGON_A2_subh_l16_sat_ll",
-    "llvm.hexagon.A2.subp" => "__builtin_HEXAGON_A2_subp",
-    "llvm.hexagon.A2.subri" => "__builtin_HEXAGON_A2_subri",
-    "llvm.hexagon.A2.subsat" => "__builtin_HEXAGON_A2_subsat",
-    "llvm.hexagon.A2.svaddh" => "__builtin_HEXAGON_A2_svaddh",
-    "llvm.hexagon.A2.svaddhs" => "__builtin_HEXAGON_A2_svaddhs",
-    "llvm.hexagon.A2.svadduhs" => "__builtin_HEXAGON_A2_svadduhs",
-    "llvm.hexagon.A2.svavgh" => "__builtin_HEXAGON_A2_svavgh",
-    "llvm.hexagon.A2.svavghs" => "__builtin_HEXAGON_A2_svavghs",
-    "llvm.hexagon.A2.svnavgh" => "__builtin_HEXAGON_A2_svnavgh",
-    "llvm.hexagon.A2.svsubh" => "__builtin_HEXAGON_A2_svsubh",
-    "llvm.hexagon.A2.svsubhs" => "__builtin_HEXAGON_A2_svsubhs",
-    "llvm.hexagon.A2.svsubuhs" => "__builtin_HEXAGON_A2_svsubuhs",
-    "llvm.hexagon.A2.swiz" => "__builtin_HEXAGON_A2_swiz",
-    "llvm.hexagon.A2.sxtb" => "__builtin_HEXAGON_A2_sxtb",
-    "llvm.hexagon.A2.sxth" => "__builtin_HEXAGON_A2_sxth",
-    "llvm.hexagon.A2.sxtw" => "__builtin_HEXAGON_A2_sxtw",
-    "llvm.hexagon.A2.tfr" => "__builtin_HEXAGON_A2_tfr",
-    "llvm.hexagon.A2.tfrih" => "__builtin_HEXAGON_A2_tfrih",
-    "llvm.hexagon.A2.tfril" => "__builtin_HEXAGON_A2_tfril",
-    "llvm.hexagon.A2.tfrp" => "__builtin_HEXAGON_A2_tfrp",
-    "llvm.hexagon.A2.tfrpi" => "__builtin_HEXAGON_A2_tfrpi",
-    "llvm.hexagon.A2.tfrsi" => "__builtin_HEXAGON_A2_tfrsi",
-    "llvm.hexagon.A2.vabsh" => "__builtin_HEXAGON_A2_vabsh",
-    "llvm.hexagon.A2.vabshsat" => "__builtin_HEXAGON_A2_vabshsat",
-    "llvm.hexagon.A2.vabsw" => "__builtin_HEXAGON_A2_vabsw",
-    "llvm.hexagon.A2.vabswsat" => "__builtin_HEXAGON_A2_vabswsat",
-    "llvm.hexagon.A2.vaddb.map" => "__builtin_HEXAGON_A2_vaddb_map",
-    "llvm.hexagon.A2.vaddh" => "__builtin_HEXAGON_A2_vaddh",
-    "llvm.hexagon.A2.vaddhs" => "__builtin_HEXAGON_A2_vaddhs",
-    "llvm.hexagon.A2.vaddub" => "__builtin_HEXAGON_A2_vaddub",
-    "llvm.hexagon.A2.vaddubs" => "__builtin_HEXAGON_A2_vaddubs",
-    "llvm.hexagon.A2.vadduhs" => "__builtin_HEXAGON_A2_vadduhs",
-    "llvm.hexagon.A2.vaddw" => "__builtin_HEXAGON_A2_vaddw",
-    "llvm.hexagon.A2.vaddws" => "__builtin_HEXAGON_A2_vaddws",
-    "llvm.hexagon.A2.vavgh" => "__builtin_HEXAGON_A2_vavgh",
-    "llvm.hexagon.A2.vavghcr" => "__builtin_HEXAGON_A2_vavghcr",
-    "llvm.hexagon.A2.vavghr" => "__builtin_HEXAGON_A2_vavghr",
-    "llvm.hexagon.A2.vavgub" => "__builtin_HEXAGON_A2_vavgub",
-    "llvm.hexagon.A2.vavgubr" => "__builtin_HEXAGON_A2_vavgubr",
-    "llvm.hexagon.A2.vavguh" => "__builtin_HEXAGON_A2_vavguh",
-    "llvm.hexagon.A2.vavguhr" => "__builtin_HEXAGON_A2_vavguhr",
-    "llvm.hexagon.A2.vavguw" => "__builtin_HEXAGON_A2_vavguw",
-    "llvm.hexagon.A2.vavguwr" => "__builtin_HEXAGON_A2_vavguwr",
-    "llvm.hexagon.A2.vavgw" => "__builtin_HEXAGON_A2_vavgw",
-    "llvm.hexagon.A2.vavgwcr" => "__builtin_HEXAGON_A2_vavgwcr",
-    "llvm.hexagon.A2.vavgwr" => "__builtin_HEXAGON_A2_vavgwr",
-    "llvm.hexagon.A2.vcmpbeq" => "__builtin_HEXAGON_A2_vcmpbeq",
-    "llvm.hexagon.A2.vcmpbgtu" => "__builtin_HEXAGON_A2_vcmpbgtu",
-    "llvm.hexagon.A2.vcmpheq" => "__builtin_HEXAGON_A2_vcmpheq",
-    "llvm.hexagon.A2.vcmphgt" => "__builtin_HEXAGON_A2_vcmphgt",
-    "llvm.hexagon.A2.vcmphgtu" => "__builtin_HEXAGON_A2_vcmphgtu",
-    "llvm.hexagon.A2.vcmpweq" => "__builtin_HEXAGON_A2_vcmpweq",
-    "llvm.hexagon.A2.vcmpwgt" => "__builtin_HEXAGON_A2_vcmpwgt",
-    "llvm.hexagon.A2.vcmpwgtu" => "__builtin_HEXAGON_A2_vcmpwgtu",
-    "llvm.hexagon.A2.vconj" => "__builtin_HEXAGON_A2_vconj",
-    "llvm.hexagon.A2.vmaxb" => "__builtin_HEXAGON_A2_vmaxb",
-    "llvm.hexagon.A2.vmaxh" => "__builtin_HEXAGON_A2_vmaxh",
-    "llvm.hexagon.A2.vmaxub" => "__builtin_HEXAGON_A2_vmaxub",
-    "llvm.hexagon.A2.vmaxuh" => "__builtin_HEXAGON_A2_vmaxuh",
-    "llvm.hexagon.A2.vmaxuw" => "__builtin_HEXAGON_A2_vmaxuw",
-    "llvm.hexagon.A2.vmaxw" => "__builtin_HEXAGON_A2_vmaxw",
-    "llvm.hexagon.A2.vminb" => "__builtin_HEXAGON_A2_vminb",
-    "llvm.hexagon.A2.vminh" => "__builtin_HEXAGON_A2_vminh",
-    "llvm.hexagon.A2.vminub" => "__builtin_HEXAGON_A2_vminub",
-    "llvm.hexagon.A2.vminuh" => "__builtin_HEXAGON_A2_vminuh",
-    "llvm.hexagon.A2.vminuw" => "__builtin_HEXAGON_A2_vminuw",
-    "llvm.hexagon.A2.vminw" => "__builtin_HEXAGON_A2_vminw",
-    "llvm.hexagon.A2.vnavgh" => "__builtin_HEXAGON_A2_vnavgh",
-    "llvm.hexagon.A2.vnavghcr" => "__builtin_HEXAGON_A2_vnavghcr",
-    "llvm.hexagon.A2.vnavghr" => "__builtin_HEXAGON_A2_vnavghr",
-    "llvm.hexagon.A2.vnavgw" => "__builtin_HEXAGON_A2_vnavgw",
-    "llvm.hexagon.A2.vnavgwcr" => "__builtin_HEXAGON_A2_vnavgwcr",
-    "llvm.hexagon.A2.vnavgwr" => "__builtin_HEXAGON_A2_vnavgwr",
-    "llvm.hexagon.A2.vraddub" => "__builtin_HEXAGON_A2_vraddub",
-    "llvm.hexagon.A2.vraddub.acc" => "__builtin_HEXAGON_A2_vraddub_acc",
-    "llvm.hexagon.A2.vrsadub" => "__builtin_HEXAGON_A2_vrsadub",
-    "llvm.hexagon.A2.vrsadub.acc" => "__builtin_HEXAGON_A2_vrsadub_acc",
-    "llvm.hexagon.A2.vsubb.map" => "__builtin_HEXAGON_A2_vsubb_map",
-    "llvm.hexagon.A2.vsubh" => "__builtin_HEXAGON_A2_vsubh",
-    "llvm.hexagon.A2.vsubhs" => "__builtin_HEXAGON_A2_vsubhs",
-    "llvm.hexagon.A2.vsubub" => "__builtin_HEXAGON_A2_vsubub",
-    "llvm.hexagon.A2.vsububs" => "__builtin_HEXAGON_A2_vsububs",
-    "llvm.hexagon.A2.vsubuhs" => "__builtin_HEXAGON_A2_vsubuhs",
-    "llvm.hexagon.A2.vsubw" => "__builtin_HEXAGON_A2_vsubw",
-    "llvm.hexagon.A2.vsubws" => "__builtin_HEXAGON_A2_vsubws",
-    "llvm.hexagon.A2.xor" => "__builtin_HEXAGON_A2_xor",
-    "llvm.hexagon.A2.xorp" => "__builtin_HEXAGON_A2_xorp",
-    "llvm.hexagon.A2.zxtb" => "__builtin_HEXAGON_A2_zxtb",
-    "llvm.hexagon.A2.zxth" => "__builtin_HEXAGON_A2_zxth",
-    "llvm.hexagon.A4.andn" => "__builtin_HEXAGON_A4_andn",
-    "llvm.hexagon.A4.andnp" => "__builtin_HEXAGON_A4_andnp",
-    "llvm.hexagon.A4.bitsplit" => "__builtin_HEXAGON_A4_bitsplit",
-    "llvm.hexagon.A4.bitspliti" => "__builtin_HEXAGON_A4_bitspliti",
-    "llvm.hexagon.A4.boundscheck" => "__builtin_HEXAGON_A4_boundscheck",
-    "llvm.hexagon.A4.cmpbeq" => "__builtin_HEXAGON_A4_cmpbeq",
-    "llvm.hexagon.A4.cmpbeqi" => "__builtin_HEXAGON_A4_cmpbeqi",
-    "llvm.hexagon.A4.cmpbgt" => "__builtin_HEXAGON_A4_cmpbgt",
-    "llvm.hexagon.A4.cmpbgti" => "__builtin_HEXAGON_A4_cmpbgti",
-    "llvm.hexagon.A4.cmpbgtu" => "__builtin_HEXAGON_A4_cmpbgtu",
-    "llvm.hexagon.A4.cmpbgtui" => "__builtin_HEXAGON_A4_cmpbgtui",
-    "llvm.hexagon.A4.cmpheq" => "__builtin_HEXAGON_A4_cmpheq",
-    "llvm.hexagon.A4.cmpheqi" => "__builtin_HEXAGON_A4_cmpheqi",
-    "llvm.hexagon.A4.cmphgt" => "__builtin_HEXAGON_A4_cmphgt",
-    "llvm.hexagon.A4.cmphgti" => "__builtin_HEXAGON_A4_cmphgti",
-    "llvm.hexagon.A4.cmphgtu" => "__builtin_HEXAGON_A4_cmphgtu",
-    "llvm.hexagon.A4.cmphgtui" => "__builtin_HEXAGON_A4_cmphgtui",
-    "llvm.hexagon.A4.combineir" => "__builtin_HEXAGON_A4_combineir",
-    "llvm.hexagon.A4.combineri" => "__builtin_HEXAGON_A4_combineri",
-    "llvm.hexagon.A4.cround.ri" => "__builtin_HEXAGON_A4_cround_ri",
-    "llvm.hexagon.A4.cround.rr" => "__builtin_HEXAGON_A4_cround_rr",
-    "llvm.hexagon.A4.modwrapu" => "__builtin_HEXAGON_A4_modwrapu",
-    "llvm.hexagon.A4.orn" => "__builtin_HEXAGON_A4_orn",
-    "llvm.hexagon.A4.ornp" => "__builtin_HEXAGON_A4_ornp",
-    "llvm.hexagon.A4.rcmpeq" => "__builtin_HEXAGON_A4_rcmpeq",
-    "llvm.hexagon.A4.rcmpeqi" => "__builtin_HEXAGON_A4_rcmpeqi",
-    "llvm.hexagon.A4.rcmpneq" => "__builtin_HEXAGON_A4_rcmpneq",
-    "llvm.hexagon.A4.rcmpneqi" => "__builtin_HEXAGON_A4_rcmpneqi",
-    "llvm.hexagon.A4.round.ri" => "__builtin_HEXAGON_A4_round_ri",
-    "llvm.hexagon.A4.round.ri.sat" => "__builtin_HEXAGON_A4_round_ri_sat",
-    "llvm.hexagon.A4.round.rr" => "__builtin_HEXAGON_A4_round_rr",
-    "llvm.hexagon.A4.round.rr.sat" => "__builtin_HEXAGON_A4_round_rr_sat",
-    "llvm.hexagon.A4.tlbmatch" => "__builtin_HEXAGON_A4_tlbmatch",
-    "llvm.hexagon.A4.vcmpbeq.any" => "__builtin_HEXAGON_A4_vcmpbeq_any",
-    "llvm.hexagon.A4.vcmpbeqi" => "__builtin_HEXAGON_A4_vcmpbeqi",
-    "llvm.hexagon.A4.vcmpbgt" => "__builtin_HEXAGON_A4_vcmpbgt",
-    "llvm.hexagon.A4.vcmpbgti" => "__builtin_HEXAGON_A4_vcmpbgti",
-    "llvm.hexagon.A4.vcmpbgtui" => "__builtin_HEXAGON_A4_vcmpbgtui",
-    "llvm.hexagon.A4.vcmpheqi" => "__builtin_HEXAGON_A4_vcmpheqi",
-    "llvm.hexagon.A4.vcmphgti" => "__builtin_HEXAGON_A4_vcmphgti",
-    "llvm.hexagon.A4.vcmphgtui" => "__builtin_HEXAGON_A4_vcmphgtui",
-    "llvm.hexagon.A4.vcmpweqi" => "__builtin_HEXAGON_A4_vcmpweqi",
-    "llvm.hexagon.A4.vcmpwgti" => "__builtin_HEXAGON_A4_vcmpwgti",
-    "llvm.hexagon.A4.vcmpwgtui" => "__builtin_HEXAGON_A4_vcmpwgtui",
-    "llvm.hexagon.A4.vrmaxh" => "__builtin_HEXAGON_A4_vrmaxh",
-    "llvm.hexagon.A4.vrmaxuh" => "__builtin_HEXAGON_A4_vrmaxuh",
-    "llvm.hexagon.A4.vrmaxuw" => "__builtin_HEXAGON_A4_vrmaxuw",
-    "llvm.hexagon.A4.vrmaxw" => "__builtin_HEXAGON_A4_vrmaxw",
-    "llvm.hexagon.A4.vrminh" => "__builtin_HEXAGON_A4_vrminh",
-    "llvm.hexagon.A4.vrminuh" => "__builtin_HEXAGON_A4_vrminuh",
-    "llvm.hexagon.A4.vrminuw" => "__builtin_HEXAGON_A4_vrminuw",
-    "llvm.hexagon.A4.vrminw" => "__builtin_HEXAGON_A4_vrminw",
-    "llvm.hexagon.A5.vaddhubs" => "__builtin_HEXAGON_A5_vaddhubs",
-    "llvm.hexagon.A6.vcmpbeq.notany" => "__builtin_HEXAGON_A6_vcmpbeq_notany",
-    "llvm.hexagon.A7.clip" => "__builtin_HEXAGON_A7_clip",
-    "llvm.hexagon.A7.croundd.ri" => "__builtin_HEXAGON_A7_croundd_ri",
-    "llvm.hexagon.A7.croundd.rr" => "__builtin_HEXAGON_A7_croundd_rr",
-    "llvm.hexagon.A7.vclip" => "__builtin_HEXAGON_A7_vclip",
-    "llvm.hexagon.C2.all8" => "__builtin_HEXAGON_C2_all8",
-    "llvm.hexagon.C2.and" => "__builtin_HEXAGON_C2_and",
-    "llvm.hexagon.C2.andn" => "__builtin_HEXAGON_C2_andn",
-    "llvm.hexagon.C2.any8" => "__builtin_HEXAGON_C2_any8",
-    "llvm.hexagon.C2.bitsclr" => "__builtin_HEXAGON_C2_bitsclr",
-    "llvm.hexagon.C2.bitsclri" => "__builtin_HEXAGON_C2_bitsclri",
-    "llvm.hexagon.C2.bitsset" => "__builtin_HEXAGON_C2_bitsset",
-    "llvm.hexagon.C2.cmpeq" => "__builtin_HEXAGON_C2_cmpeq",
-    "llvm.hexagon.C2.cmpeqi" => "__builtin_HEXAGON_C2_cmpeqi",
-    "llvm.hexagon.C2.cmpeqp" => "__builtin_HEXAGON_C2_cmpeqp",
-    "llvm.hexagon.C2.cmpgei" => "__builtin_HEXAGON_C2_cmpgei",
-    "llvm.hexagon.C2.cmpgeui" => "__builtin_HEXAGON_C2_cmpgeui",
-    "llvm.hexagon.C2.cmpgt" => "__builtin_HEXAGON_C2_cmpgt",
-    "llvm.hexagon.C2.cmpgti" => "__builtin_HEXAGON_C2_cmpgti",
-    "llvm.hexagon.C2.cmpgtp" => "__builtin_HEXAGON_C2_cmpgtp",
-    "llvm.hexagon.C2.cmpgtu" => "__builtin_HEXAGON_C2_cmpgtu",
-    "llvm.hexagon.C2.cmpgtui" => "__builtin_HEXAGON_C2_cmpgtui",
-    "llvm.hexagon.C2.cmpgtup" => "__builtin_HEXAGON_C2_cmpgtup",
-    "llvm.hexagon.C2.cmplt" => "__builtin_HEXAGON_C2_cmplt",
-    "llvm.hexagon.C2.cmpltu" => "__builtin_HEXAGON_C2_cmpltu",
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-    "llvm.hexagon.C2.mux" => "__builtin_HEXAGON_C2_mux",
-    "llvm.hexagon.C2.muxii" => "__builtin_HEXAGON_C2_muxii",
-    "llvm.hexagon.C2.muxir" => "__builtin_HEXAGON_C2_muxir",
-    "llvm.hexagon.C2.muxri" => "__builtin_HEXAGON_C2_muxri",
-    "llvm.hexagon.C2.not" => "__builtin_HEXAGON_C2_not",
-    "llvm.hexagon.C2.or" => "__builtin_HEXAGON_C2_or",
-    "llvm.hexagon.C2.orn" => "__builtin_HEXAGON_C2_orn",
-    "llvm.hexagon.C2.pxfer.map" => "__builtin_HEXAGON_C2_pxfer_map",
-    "llvm.hexagon.C2.tfrpr" => "__builtin_HEXAGON_C2_tfrpr",
-    "llvm.hexagon.C2.tfrrp" => "__builtin_HEXAGON_C2_tfrrp",
-    "llvm.hexagon.C2.vitpack" => "__builtin_HEXAGON_C2_vitpack",
-    "llvm.hexagon.C2.vmux" => "__builtin_HEXAGON_C2_vmux",
-    "llvm.hexagon.C2.xor" => "__builtin_HEXAGON_C2_xor",
-    "llvm.hexagon.C4.and.and" => "__builtin_HEXAGON_C4_and_and",
-    "llvm.hexagon.C4.and.andn" => "__builtin_HEXAGON_C4_and_andn",
-    "llvm.hexagon.C4.and.or" => "__builtin_HEXAGON_C4_and_or",
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-    "llvm.hexagon.C4.cmplteui" => "__builtin_HEXAGON_C4_cmplteui",
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-    "llvm.hexagon.C4.fastcorner9" => "__builtin_HEXAGON_C4_fastcorner9",
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-    "llvm.hexagon.C4.or.or" => "__builtin_HEXAGON_C4_or_or",
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-    "llvm.hexagon.F2.conv.d2sf" => "__builtin_HEXAGON_F2_conv_d2sf",
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-    "llvm.hexagon.F2.dfcmpgt" => "__builtin_HEXAGON_F2_dfcmpgt",
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-    "llvm.hexagon.F2.dffixupd" => "__builtin_HEXAGON_F2_dffixupd",
-    "llvm.hexagon.F2.dffixupn" => "__builtin_HEXAGON_F2_dffixupn",
-    "llvm.hexagon.F2.dffixupr" => "__builtin_HEXAGON_F2_dffixupr",
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-    "llvm.hexagon.F2.dfmpyfix" => "__builtin_HEXAGON_F2_dfmpyfix",
-    "llvm.hexagon.F2.dfmpyhh" => "__builtin_HEXAGON_F2_dfmpyhh",
-    "llvm.hexagon.F2.dfmpylh" => "__builtin_HEXAGON_F2_dfmpylh",
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-    "llvm.hexagon.F2.sffixupn" => "__builtin_HEXAGON_F2_sffixupn",
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-    "llvm.hexagon.M2.cmpyrs.s0" => "__builtin_HEXAGON_M2_cmpyrs_s0",
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-    "llvm.hexagon.M2.mpy.acc.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s0",
-    "llvm.hexagon.M2.mpy.acc.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s1",
-    "llvm.hexagon.M2.mpy.acc.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s0",
-    "llvm.hexagon.M2.mpy.acc.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s1",
-    "llvm.hexagon.M2.mpy.acc.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s0",
-    "llvm.hexagon.M2.mpy.acc.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s1",
-    "llvm.hexagon.M2.mpy.acc.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s0",
-    "llvm.hexagon.M2.mpy.acc.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s1",
-    "llvm.hexagon.M2.mpy.hh.s0" => "__builtin_HEXAGON_M2_mpy_hh_s0",
-    "llvm.hexagon.M2.mpy.hh.s1" => "__builtin_HEXAGON_M2_mpy_hh_s1",
-    "llvm.hexagon.M2.mpy.hl.s0" => "__builtin_HEXAGON_M2_mpy_hl_s0",
-    "llvm.hexagon.M2.mpy.hl.s1" => "__builtin_HEXAGON_M2_mpy_hl_s1",
-    "llvm.hexagon.M2.mpy.lh.s0" => "__builtin_HEXAGON_M2_mpy_lh_s0",
-    "llvm.hexagon.M2.mpy.lh.s1" => "__builtin_HEXAGON_M2_mpy_lh_s1",
-    "llvm.hexagon.M2.mpy.ll.s0" => "__builtin_HEXAGON_M2_mpy_ll_s0",
-    "llvm.hexagon.M2.mpy.ll.s1" => "__builtin_HEXAGON_M2_mpy_ll_s1",
-    "llvm.hexagon.M2.mpy.nac.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_hh_s0",
-    "llvm.hexagon.M2.mpy.nac.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_hh_s1",
-    "llvm.hexagon.M2.mpy.nac.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_hl_s0",
-    "llvm.hexagon.M2.mpy.nac.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_hl_s1",
-    "llvm.hexagon.M2.mpy.nac.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_lh_s0",
-    "llvm.hexagon.M2.mpy.nac.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_lh_s1",
-    "llvm.hexagon.M2.mpy.nac.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_ll_s0",
-    "llvm.hexagon.M2.mpy.nac.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_ll_s1",
-    "llvm.hexagon.M2.mpy.nac.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s0",
-    "llvm.hexagon.M2.mpy.nac.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s1",
-    "llvm.hexagon.M2.mpy.nac.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s0",
-    "llvm.hexagon.M2.mpy.nac.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s1",
-    "llvm.hexagon.M2.mpy.nac.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s0",
-    "llvm.hexagon.M2.mpy.nac.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s1",
-    "llvm.hexagon.M2.mpy.nac.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s0",
-    "llvm.hexagon.M2.mpy.nac.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s1",
-    "llvm.hexagon.M2.mpy.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s0",
-    "llvm.hexagon.M2.mpy.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s1",
-    "llvm.hexagon.M2.mpy.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s0",
-    "llvm.hexagon.M2.mpy.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s1",
-    "llvm.hexagon.M2.mpy.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s0",
-    "llvm.hexagon.M2.mpy.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s1",
-    "llvm.hexagon.M2.mpy.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s0",
-    "llvm.hexagon.M2.mpy.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s1",
-    "llvm.hexagon.M2.mpy.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_hh_s0",
-    "llvm.hexagon.M2.mpy.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_hh_s1",
-    "llvm.hexagon.M2.mpy.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_hl_s0",
-    "llvm.hexagon.M2.mpy.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_hl_s1",
-    "llvm.hexagon.M2.mpy.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_lh_s0",
-    "llvm.hexagon.M2.mpy.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_lh_s1",
-    "llvm.hexagon.M2.mpy.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_ll_s0",
-    "llvm.hexagon.M2.mpy.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_ll_s1",
-    "llvm.hexagon.M2.mpy.sat.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0",
-    "llvm.hexagon.M2.mpy.sat.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1",
-    "llvm.hexagon.M2.mpy.sat.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0",
-    "llvm.hexagon.M2.mpy.sat.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1",
-    "llvm.hexagon.M2.mpy.sat.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0",
-    "llvm.hexagon.M2.mpy.sat.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1",
-    "llvm.hexagon.M2.mpy.sat.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0",
-    "llvm.hexagon.M2.mpy.sat.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1",
-    "llvm.hexagon.M2.mpy.up" => "__builtin_HEXAGON_M2_mpy_up",
-    "llvm.hexagon.M2.mpy.up.s1" => "__builtin_HEXAGON_M2_mpy_up_s1",
-    "llvm.hexagon.M2.mpy.up.s1.sat" => "__builtin_HEXAGON_M2_mpy_up_s1_sat",
-    "llvm.hexagon.M2.mpyd.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s0",
-    "llvm.hexagon.M2.mpyd.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s1",
-    "llvm.hexagon.M2.mpyd.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s0",
-    "llvm.hexagon.M2.mpyd.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s1",
-    "llvm.hexagon.M2.mpyd.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s0",
-    "llvm.hexagon.M2.mpyd.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s1",
-    "llvm.hexagon.M2.mpyd.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s0",
-    "llvm.hexagon.M2.mpyd.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s1",
-    "llvm.hexagon.M2.mpyd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_hh_s0",
-    "llvm.hexagon.M2.mpyd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_hh_s1",
-    "llvm.hexagon.M2.mpyd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_hl_s0",
-    "llvm.hexagon.M2.mpyd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_hl_s1",
-    "llvm.hexagon.M2.mpyd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_lh_s0",
-    "llvm.hexagon.M2.mpyd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_lh_s1",
-    "llvm.hexagon.M2.mpyd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_ll_s0",
-    "llvm.hexagon.M2.mpyd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_ll_s1",
-    "llvm.hexagon.M2.mpyd.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s0",
-    "llvm.hexagon.M2.mpyd.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s1",
-    "llvm.hexagon.M2.mpyd.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s0",
-    "llvm.hexagon.M2.mpyd.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s1",
-    "llvm.hexagon.M2.mpyd.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s0",
-    "llvm.hexagon.M2.mpyd.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s1",
-    "llvm.hexagon.M2.mpyd.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s0",
-    "llvm.hexagon.M2.mpyd.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s1",
-    "llvm.hexagon.M2.mpyd.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s0",
-    "llvm.hexagon.M2.mpyd.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s1",
-    "llvm.hexagon.M2.mpyd.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s0",
-    "llvm.hexagon.M2.mpyd.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s1",
-    "llvm.hexagon.M2.mpyd.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s0",
-    "llvm.hexagon.M2.mpyd.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s1",
-    "llvm.hexagon.M2.mpyd.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s0",
-    "llvm.hexagon.M2.mpyd.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s1",
-    "llvm.hexagon.M2.mpyi" => "__builtin_HEXAGON_M2_mpyi",
-    "llvm.hexagon.M2.mpysmi" => "__builtin_HEXAGON_M2_mpysmi",
-    "llvm.hexagon.M2.mpysu.up" => "__builtin_HEXAGON_M2_mpysu_up",
-    "llvm.hexagon.M2.mpyu.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s0",
-    "llvm.hexagon.M2.mpyu.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s1",
-    "llvm.hexagon.M2.mpyu.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s0",
-    "llvm.hexagon.M2.mpyu.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s1",
-    "llvm.hexagon.M2.mpyu.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s0",
-    "llvm.hexagon.M2.mpyu.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s1",
-    "llvm.hexagon.M2.mpyu.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s0",
-    "llvm.hexagon.M2.mpyu.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s1",
-    "llvm.hexagon.M2.mpyu.hh.s0" => "__builtin_HEXAGON_M2_mpyu_hh_s0",
-    "llvm.hexagon.M2.mpyu.hh.s1" => "__builtin_HEXAGON_M2_mpyu_hh_s1",
-    "llvm.hexagon.M2.mpyu.hl.s0" => "__builtin_HEXAGON_M2_mpyu_hl_s0",
-    "llvm.hexagon.M2.mpyu.hl.s1" => "__builtin_HEXAGON_M2_mpyu_hl_s1",
-    "llvm.hexagon.M2.mpyu.lh.s0" => "__builtin_HEXAGON_M2_mpyu_lh_s0",
-    "llvm.hexagon.M2.mpyu.lh.s1" => "__builtin_HEXAGON_M2_mpyu_lh_s1",
-    "llvm.hexagon.M2.mpyu.ll.s0" => "__builtin_HEXAGON_M2_mpyu_ll_s0",
-    "llvm.hexagon.M2.mpyu.ll.s1" => "__builtin_HEXAGON_M2_mpyu_ll_s1",
-    "llvm.hexagon.M2.mpyu.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s0",
-    "llvm.hexagon.M2.mpyu.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s1",
-    "llvm.hexagon.M2.mpyu.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s0",
-    "llvm.hexagon.M2.mpyu.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s1",
-    "llvm.hexagon.M2.mpyu.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s0",
-    "llvm.hexagon.M2.mpyu.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s1",
-    "llvm.hexagon.M2.mpyu.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s0",
-    "llvm.hexagon.M2.mpyu.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s1",
-    "llvm.hexagon.M2.mpyu.up" => "__builtin_HEXAGON_M2_mpyu_up",
-    "llvm.hexagon.M2.mpyud.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s0",
-    "llvm.hexagon.M2.mpyud.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s1",
-    "llvm.hexagon.M2.mpyud.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s0",
-    "llvm.hexagon.M2.mpyud.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s1",
-    "llvm.hexagon.M2.mpyud.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s0",
-    "llvm.hexagon.M2.mpyud.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s1",
-    "llvm.hexagon.M2.mpyud.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s0",
-    "llvm.hexagon.M2.mpyud.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s1",
-    "llvm.hexagon.M2.mpyud.hh.s0" => "__builtin_HEXAGON_M2_mpyud_hh_s0",
-    "llvm.hexagon.M2.mpyud.hh.s1" => "__builtin_HEXAGON_M2_mpyud_hh_s1",
-    "llvm.hexagon.M2.mpyud.hl.s0" => "__builtin_HEXAGON_M2_mpyud_hl_s0",
-    "llvm.hexagon.M2.mpyud.hl.s1" => "__builtin_HEXAGON_M2_mpyud_hl_s1",
-    "llvm.hexagon.M2.mpyud.lh.s0" => "__builtin_HEXAGON_M2_mpyud_lh_s0",
-    "llvm.hexagon.M2.mpyud.lh.s1" => "__builtin_HEXAGON_M2_mpyud_lh_s1",
-    "llvm.hexagon.M2.mpyud.ll.s0" => "__builtin_HEXAGON_M2_mpyud_ll_s0",
-    "llvm.hexagon.M2.mpyud.ll.s1" => "__builtin_HEXAGON_M2_mpyud_ll_s1",
-    "llvm.hexagon.M2.mpyud.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s0",
-    "llvm.hexagon.M2.mpyud.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s1",
-    "llvm.hexagon.M2.mpyud.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s0",
-    "llvm.hexagon.M2.mpyud.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s1",
-    "llvm.hexagon.M2.mpyud.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s0",
-    "llvm.hexagon.M2.mpyud.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s1",
-    "llvm.hexagon.M2.mpyud.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s0",
-    "llvm.hexagon.M2.mpyud.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s1",
-    "llvm.hexagon.M2.mpyui" => "__builtin_HEXAGON_M2_mpyui",
-    "llvm.hexagon.M2.nacci" => "__builtin_HEXAGON_M2_nacci",
-    "llvm.hexagon.M2.naccii" => "__builtin_HEXAGON_M2_naccii",
-    "llvm.hexagon.M2.subacc" => "__builtin_HEXAGON_M2_subacc",
-    "llvm.hexagon.M2.vabsdiffh" => "__builtin_HEXAGON_M2_vabsdiffh",
-    "llvm.hexagon.M2.vabsdiffw" => "__builtin_HEXAGON_M2_vabsdiffw",
-    "llvm.hexagon.M2.vcmac.s0.sat.i" => "__builtin_HEXAGON_M2_vcmac_s0_sat_i",
-    "llvm.hexagon.M2.vcmac.s0.sat.r" => "__builtin_HEXAGON_M2_vcmac_s0_sat_r",
-    "llvm.hexagon.M2.vcmpy.s0.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_i",
-    "llvm.hexagon.M2.vcmpy.s0.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_r",
-    "llvm.hexagon.M2.vcmpy.s1.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_i",
-    "llvm.hexagon.M2.vcmpy.s1.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_r",
-    "llvm.hexagon.M2.vdmacs.s0" => "__builtin_HEXAGON_M2_vdmacs_s0",
-    "llvm.hexagon.M2.vdmacs.s1" => "__builtin_HEXAGON_M2_vdmacs_s1",
-    "llvm.hexagon.M2.vdmpyrs.s0" => "__builtin_HEXAGON_M2_vdmpyrs_s0",
-    "llvm.hexagon.M2.vdmpyrs.s1" => "__builtin_HEXAGON_M2_vdmpyrs_s1",
-    "llvm.hexagon.M2.vdmpys.s0" => "__builtin_HEXAGON_M2_vdmpys_s0",
-    "llvm.hexagon.M2.vdmpys.s1" => "__builtin_HEXAGON_M2_vdmpys_s1",
-    "llvm.hexagon.M2.vmac2" => "__builtin_HEXAGON_M2_vmac2",
-    "llvm.hexagon.M2.vmac2es" => "__builtin_HEXAGON_M2_vmac2es",
-    "llvm.hexagon.M2.vmac2es.s0" => "__builtin_HEXAGON_M2_vmac2es_s0",
-    "llvm.hexagon.M2.vmac2es.s1" => "__builtin_HEXAGON_M2_vmac2es_s1",
-    "llvm.hexagon.M2.vmac2s.s0" => "__builtin_HEXAGON_M2_vmac2s_s0",
-    "llvm.hexagon.M2.vmac2s.s1" => "__builtin_HEXAGON_M2_vmac2s_s1",
-    "llvm.hexagon.M2.vmac2su.s0" => "__builtin_HEXAGON_M2_vmac2su_s0",
-    "llvm.hexagon.M2.vmac2su.s1" => "__builtin_HEXAGON_M2_vmac2su_s1",
-    "llvm.hexagon.M2.vmpy2es.s0" => "__builtin_HEXAGON_M2_vmpy2es_s0",
-    "llvm.hexagon.M2.vmpy2es.s1" => "__builtin_HEXAGON_M2_vmpy2es_s1",
-    "llvm.hexagon.M2.vmpy2s.s0" => "__builtin_HEXAGON_M2_vmpy2s_s0",
-    "llvm.hexagon.M2.vmpy2s.s0pack" => "__builtin_HEXAGON_M2_vmpy2s_s0pack",
-    "llvm.hexagon.M2.vmpy2s.s1" => "__builtin_HEXAGON_M2_vmpy2s_s1",
-    "llvm.hexagon.M2.vmpy2s.s1pack" => "__builtin_HEXAGON_M2_vmpy2s_s1pack",
-    "llvm.hexagon.M2.vmpy2su.s0" => "__builtin_HEXAGON_M2_vmpy2su_s0",
-    "llvm.hexagon.M2.vmpy2su.s1" => "__builtin_HEXAGON_M2_vmpy2su_s1",
-    "llvm.hexagon.M2.vraddh" => "__builtin_HEXAGON_M2_vraddh",
-    "llvm.hexagon.M2.vradduh" => "__builtin_HEXAGON_M2_vradduh",
-    "llvm.hexagon.M2.vrcmaci.s0" => "__builtin_HEXAGON_M2_vrcmaci_s0",
-    "llvm.hexagon.M2.vrcmaci.s0c" => "__builtin_HEXAGON_M2_vrcmaci_s0c",
-    "llvm.hexagon.M2.vrcmacr.s0" => "__builtin_HEXAGON_M2_vrcmacr_s0",
-    "llvm.hexagon.M2.vrcmacr.s0c" => "__builtin_HEXAGON_M2_vrcmacr_s0c",
-    "llvm.hexagon.M2.vrcmpyi.s0" => "__builtin_HEXAGON_M2_vrcmpyi_s0",
-    "llvm.hexagon.M2.vrcmpyi.s0c" => "__builtin_HEXAGON_M2_vrcmpyi_s0c",
-    "llvm.hexagon.M2.vrcmpyr.s0" => "__builtin_HEXAGON_M2_vrcmpyr_s0",
-    "llvm.hexagon.M2.vrcmpyr.s0c" => "__builtin_HEXAGON_M2_vrcmpyr_s0c",
-    "llvm.hexagon.M2.vrcmpys.acc.s1" => "__builtin_HEXAGON_M2_vrcmpys_acc_s1",
-    "llvm.hexagon.M2.vrcmpys.s1" => "__builtin_HEXAGON_M2_vrcmpys_s1",
-    "llvm.hexagon.M2.vrcmpys.s1rp" => "__builtin_HEXAGON_M2_vrcmpys_s1rp",
-    "llvm.hexagon.M2.vrmac.s0" => "__builtin_HEXAGON_M2_vrmac_s0",
-    "llvm.hexagon.M2.vrmpy.s0" => "__builtin_HEXAGON_M2_vrmpy_s0",
-    "llvm.hexagon.M2.xor.xacc" => "__builtin_HEXAGON_M2_xor_xacc",
-    "llvm.hexagon.M4.and.and" => "__builtin_HEXAGON_M4_and_and",
-    "llvm.hexagon.M4.and.andn" => "__builtin_HEXAGON_M4_and_andn",
-    "llvm.hexagon.M4.and.or" => "__builtin_HEXAGON_M4_and_or",
-    "llvm.hexagon.M4.and.xor" => "__builtin_HEXAGON_M4_and_xor",
-    "llvm.hexagon.M4.cmpyi.wh" => "__builtin_HEXAGON_M4_cmpyi_wh",
-    "llvm.hexagon.M4.cmpyi.whc" => "__builtin_HEXAGON_M4_cmpyi_whc",
-    "llvm.hexagon.M4.cmpyr.wh" => "__builtin_HEXAGON_M4_cmpyr_wh",
-    "llvm.hexagon.M4.cmpyr.whc" => "__builtin_HEXAGON_M4_cmpyr_whc",
-    "llvm.hexagon.M4.mac.up.s1.sat" => "__builtin_HEXAGON_M4_mac_up_s1_sat",
-    "llvm.hexagon.M4.mpyri.addi" => "__builtin_HEXAGON_M4_mpyri_addi",
-    "llvm.hexagon.M4.mpyri.addr" => "__builtin_HEXAGON_M4_mpyri_addr",
-    "llvm.hexagon.M4.mpyri.addr.u2" => "__builtin_HEXAGON_M4_mpyri_addr_u2",
-    "llvm.hexagon.M4.mpyrr.addi" => "__builtin_HEXAGON_M4_mpyrr_addi",
-    "llvm.hexagon.M4.mpyrr.addr" => "__builtin_HEXAGON_M4_mpyrr_addr",
-    "llvm.hexagon.M4.nac.up.s1.sat" => "__builtin_HEXAGON_M4_nac_up_s1_sat",
-    "llvm.hexagon.M4.or.and" => "__builtin_HEXAGON_M4_or_and",
-    "llvm.hexagon.M4.or.andn" => "__builtin_HEXAGON_M4_or_andn",
-    "llvm.hexagon.M4.or.or" => "__builtin_HEXAGON_M4_or_or",
-    "llvm.hexagon.M4.or.xor" => "__builtin_HEXAGON_M4_or_xor",
-    "llvm.hexagon.M4.pmpyw" => "__builtin_HEXAGON_M4_pmpyw",
-    "llvm.hexagon.M4.pmpyw.acc" => "__builtin_HEXAGON_M4_pmpyw_acc",
-    "llvm.hexagon.M4.vpmpyh" => "__builtin_HEXAGON_M4_vpmpyh",
-    "llvm.hexagon.M4.vpmpyh.acc" => "__builtin_HEXAGON_M4_vpmpyh_acc",
-    "llvm.hexagon.M4.vrmpyeh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s0",
-    "llvm.hexagon.M4.vrmpyeh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s1",
-    "llvm.hexagon.M4.vrmpyeh.s0" => "__builtin_HEXAGON_M4_vrmpyeh_s0",
-    "llvm.hexagon.M4.vrmpyeh.s1" => "__builtin_HEXAGON_M4_vrmpyeh_s1",
-    "llvm.hexagon.M4.vrmpyoh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s0",
-    "llvm.hexagon.M4.vrmpyoh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s1",
-    "llvm.hexagon.M4.vrmpyoh.s0" => "__builtin_HEXAGON_M4_vrmpyoh_s0",
-    "llvm.hexagon.M4.vrmpyoh.s1" => "__builtin_HEXAGON_M4_vrmpyoh_s1",
-    "llvm.hexagon.M4.xor.and" => "__builtin_HEXAGON_M4_xor_and",
-    "llvm.hexagon.M4.xor.andn" => "__builtin_HEXAGON_M4_xor_andn",
-    "llvm.hexagon.M4.xor.or" => "__builtin_HEXAGON_M4_xor_or",
-    "llvm.hexagon.M4.xor.xacc" => "__builtin_HEXAGON_M4_xor_xacc",
-    "llvm.hexagon.M5.vdmacbsu" => "__builtin_HEXAGON_M5_vdmacbsu",
-    "llvm.hexagon.M5.vdmpybsu" => "__builtin_HEXAGON_M5_vdmpybsu",
-    "llvm.hexagon.M5.vmacbsu" => "__builtin_HEXAGON_M5_vmacbsu",
-    "llvm.hexagon.M5.vmacbuu" => "__builtin_HEXAGON_M5_vmacbuu",
-    "llvm.hexagon.M5.vmpybsu" => "__builtin_HEXAGON_M5_vmpybsu",
-    "llvm.hexagon.M5.vmpybuu" => "__builtin_HEXAGON_M5_vmpybuu",
-    "llvm.hexagon.M5.vrmacbsu" => "__builtin_HEXAGON_M5_vrmacbsu",
-    "llvm.hexagon.M5.vrmacbuu" => "__builtin_HEXAGON_M5_vrmacbuu",
-    "llvm.hexagon.M5.vrmpybsu" => "__builtin_HEXAGON_M5_vrmpybsu",
-    "llvm.hexagon.M5.vrmpybuu" => "__builtin_HEXAGON_M5_vrmpybuu",
-    "llvm.hexagon.M6.vabsdiffb" => "__builtin_HEXAGON_M6_vabsdiffb",
-    "llvm.hexagon.M6.vabsdiffub" => "__builtin_HEXAGON_M6_vabsdiffub",
-    "llvm.hexagon.M7.dcmpyiw" => "__builtin_HEXAGON_M7_dcmpyiw",
-    "llvm.hexagon.M7.dcmpyiw.acc" => "__builtin_HEXAGON_M7_dcmpyiw_acc",
-    "llvm.hexagon.M7.dcmpyiwc" => "__builtin_HEXAGON_M7_dcmpyiwc",
-    "llvm.hexagon.M7.dcmpyiwc.acc" => "__builtin_HEXAGON_M7_dcmpyiwc_acc",
-    "llvm.hexagon.M7.dcmpyrw" => "__builtin_HEXAGON_M7_dcmpyrw",
-    "llvm.hexagon.M7.dcmpyrw.acc" => "__builtin_HEXAGON_M7_dcmpyrw_acc",
-    "llvm.hexagon.M7.dcmpyrwc" => "__builtin_HEXAGON_M7_dcmpyrwc",
-    "llvm.hexagon.M7.dcmpyrwc.acc" => "__builtin_HEXAGON_M7_dcmpyrwc_acc",
-    "llvm.hexagon.M7.vdmpy" => "__builtin_HEXAGON_M7_vdmpy",
-    "llvm.hexagon.M7.vdmpy.acc" => "__builtin_HEXAGON_M7_vdmpy_acc",
-    "llvm.hexagon.M7.wcmpyiw" => "__builtin_HEXAGON_M7_wcmpyiw",
-    "llvm.hexagon.M7.wcmpyiw.rnd" => "__builtin_HEXAGON_M7_wcmpyiw_rnd",
-    "llvm.hexagon.M7.wcmpyiwc" => "__builtin_HEXAGON_M7_wcmpyiwc",
-    "llvm.hexagon.M7.wcmpyiwc.rnd" => "__builtin_HEXAGON_M7_wcmpyiwc_rnd",
-    "llvm.hexagon.M7.wcmpyrw" => "__builtin_HEXAGON_M7_wcmpyrw",
-    "llvm.hexagon.M7.wcmpyrw.rnd" => "__builtin_HEXAGON_M7_wcmpyrw_rnd",
-    "llvm.hexagon.M7.wcmpyrwc" => "__builtin_HEXAGON_M7_wcmpyrwc",
-    "llvm.hexagon.M7.wcmpyrwc.rnd" => "__builtin_HEXAGON_M7_wcmpyrwc_rnd",
-    "llvm.hexagon.S2.addasl.rrri" => "__builtin_HEXAGON_S2_addasl_rrri",
-    "llvm.hexagon.S2.asl.i.p" => "__builtin_HEXAGON_S2_asl_i_p",
-    "llvm.hexagon.S2.asl.i.p.acc" => "__builtin_HEXAGON_S2_asl_i_p_acc",
-    "llvm.hexagon.S2.asl.i.p.and" => "__builtin_HEXAGON_S2_asl_i_p_and",
-    "llvm.hexagon.S2.asl.i.p.nac" => "__builtin_HEXAGON_S2_asl_i_p_nac",
-    "llvm.hexagon.S2.asl.i.p.or" => "__builtin_HEXAGON_S2_asl_i_p_or",
-    "llvm.hexagon.S2.asl.i.p.xacc" => "__builtin_HEXAGON_S2_asl_i_p_xacc",
-    "llvm.hexagon.S2.asl.i.r" => "__builtin_HEXAGON_S2_asl_i_r",
-    "llvm.hexagon.S2.asl.i.r.acc" => "__builtin_HEXAGON_S2_asl_i_r_acc",
-    "llvm.hexagon.S2.asl.i.r.and" => "__builtin_HEXAGON_S2_asl_i_r_and",
-    "llvm.hexagon.S2.asl.i.r.nac" => "__builtin_HEXAGON_S2_asl_i_r_nac",
-    "llvm.hexagon.S2.asl.i.r.or" => "__builtin_HEXAGON_S2_asl_i_r_or",
-    "llvm.hexagon.S2.asl.i.r.sat" => "__builtin_HEXAGON_S2_asl_i_r_sat",
-    "llvm.hexagon.S2.asl.i.r.xacc" => "__builtin_HEXAGON_S2_asl_i_r_xacc",
-    "llvm.hexagon.S2.asl.i.vh" => "__builtin_HEXAGON_S2_asl_i_vh",
-    "llvm.hexagon.S2.asl.i.vw" => "__builtin_HEXAGON_S2_asl_i_vw",
-    "llvm.hexagon.S2.asl.r.p" => "__builtin_HEXAGON_S2_asl_r_p",
-    "llvm.hexagon.S2.asl.r.p.acc" => "__builtin_HEXAGON_S2_asl_r_p_acc",
-    "llvm.hexagon.S2.asl.r.p.and" => "__builtin_HEXAGON_S2_asl_r_p_and",
-    "llvm.hexagon.S2.asl.r.p.nac" => "__builtin_HEXAGON_S2_asl_r_p_nac",
-    "llvm.hexagon.S2.asl.r.p.or" => "__builtin_HEXAGON_S2_asl_r_p_or",
-    "llvm.hexagon.S2.asl.r.p.xor" => "__builtin_HEXAGON_S2_asl_r_p_xor",
-    "llvm.hexagon.S2.asl.r.r" => "__builtin_HEXAGON_S2_asl_r_r",
-    "llvm.hexagon.S2.asl.r.r.acc" => "__builtin_HEXAGON_S2_asl_r_r_acc",
-    "llvm.hexagon.S2.asl.r.r.and" => "__builtin_HEXAGON_S2_asl_r_r_and",
-    "llvm.hexagon.S2.asl.r.r.nac" => "__builtin_HEXAGON_S2_asl_r_r_nac",
-    "llvm.hexagon.S2.asl.r.r.or" => "__builtin_HEXAGON_S2_asl_r_r_or",
-    "llvm.hexagon.S2.asl.r.r.sat" => "__builtin_HEXAGON_S2_asl_r_r_sat",
-    "llvm.hexagon.S2.asl.r.vh" => "__builtin_HEXAGON_S2_asl_r_vh",
-    "llvm.hexagon.S2.asl.r.vw" => "__builtin_HEXAGON_S2_asl_r_vw",
-    "llvm.hexagon.S2.asr.i.p" => "__builtin_HEXAGON_S2_asr_i_p",
-    "llvm.hexagon.S2.asr.i.p.acc" => "__builtin_HEXAGON_S2_asr_i_p_acc",
-    "llvm.hexagon.S2.asr.i.p.and" => "__builtin_HEXAGON_S2_asr_i_p_and",
-    "llvm.hexagon.S2.asr.i.p.nac" => "__builtin_HEXAGON_S2_asr_i_p_nac",
-    "llvm.hexagon.S2.asr.i.p.or" => "__builtin_HEXAGON_S2_asr_i_p_or",
-    "llvm.hexagon.S2.asr.i.p.rnd" => "__builtin_HEXAGON_S2_asr_i_p_rnd",
-    "llvm.hexagon.S2.asr.i.p.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax",
-    "llvm.hexagon.S2.asr.i.r" => "__builtin_HEXAGON_S2_asr_i_r",
-    "llvm.hexagon.S2.asr.i.r.acc" => "__builtin_HEXAGON_S2_asr_i_r_acc",
-    "llvm.hexagon.S2.asr.i.r.and" => "__builtin_HEXAGON_S2_asr_i_r_and",
-    "llvm.hexagon.S2.asr.i.r.nac" => "__builtin_HEXAGON_S2_asr_i_r_nac",
-    "llvm.hexagon.S2.asr.i.r.or" => "__builtin_HEXAGON_S2_asr_i_r_or",
-    "llvm.hexagon.S2.asr.i.r.rnd" => "__builtin_HEXAGON_S2_asr_i_r_rnd",
-    "llvm.hexagon.S2.asr.i.r.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax",
-    "llvm.hexagon.S2.asr.i.svw.trun" => "__builtin_HEXAGON_S2_asr_i_svw_trun",
-    "llvm.hexagon.S2.asr.i.vh" => "__builtin_HEXAGON_S2_asr_i_vh",
-    "llvm.hexagon.S2.asr.i.vw" => "__builtin_HEXAGON_S2_asr_i_vw",
-    "llvm.hexagon.S2.asr.r.p" => "__builtin_HEXAGON_S2_asr_r_p",
-    "llvm.hexagon.S2.asr.r.p.acc" => "__builtin_HEXAGON_S2_asr_r_p_acc",
-    "llvm.hexagon.S2.asr.r.p.and" => "__builtin_HEXAGON_S2_asr_r_p_and",
-    "llvm.hexagon.S2.asr.r.p.nac" => "__builtin_HEXAGON_S2_asr_r_p_nac",
-    "llvm.hexagon.S2.asr.r.p.or" => "__builtin_HEXAGON_S2_asr_r_p_or",
-    "llvm.hexagon.S2.asr.r.p.xor" => "__builtin_HEXAGON_S2_asr_r_p_xor",
-    "llvm.hexagon.S2.asr.r.r" => "__builtin_HEXAGON_S2_asr_r_r",
-    "llvm.hexagon.S2.asr.r.r.acc" => "__builtin_HEXAGON_S2_asr_r_r_acc",
-    "llvm.hexagon.S2.asr.r.r.and" => "__builtin_HEXAGON_S2_asr_r_r_and",
-    "llvm.hexagon.S2.asr.r.r.nac" => "__builtin_HEXAGON_S2_asr_r_r_nac",
-    "llvm.hexagon.S2.asr.r.r.or" => "__builtin_HEXAGON_S2_asr_r_r_or",
-    "llvm.hexagon.S2.asr.r.r.sat" => "__builtin_HEXAGON_S2_asr_r_r_sat",
-    "llvm.hexagon.S2.asr.r.svw.trun" => "__builtin_HEXAGON_S2_asr_r_svw_trun",
-    "llvm.hexagon.S2.asr.r.vh" => "__builtin_HEXAGON_S2_asr_r_vh",
-    "llvm.hexagon.S2.asr.r.vw" => "__builtin_HEXAGON_S2_asr_r_vw",
-    "llvm.hexagon.S2.brev" => "__builtin_HEXAGON_S2_brev",
-    "llvm.hexagon.S2.brevp" => "__builtin_HEXAGON_S2_brevp",
-    "llvm.hexagon.S2.cabacencbin" => "__builtin_HEXAGON_S2_cabacencbin",
-    "llvm.hexagon.S2.cl0" => "__builtin_HEXAGON_S2_cl0",
-    "llvm.hexagon.S2.cl0p" => "__builtin_HEXAGON_S2_cl0p",
-    "llvm.hexagon.S2.cl1" => "__builtin_HEXAGON_S2_cl1",
-    "llvm.hexagon.S2.cl1p" => "__builtin_HEXAGON_S2_cl1p",
-    "llvm.hexagon.S2.clb" => "__builtin_HEXAGON_S2_clb",
-    "llvm.hexagon.S2.clbnorm" => "__builtin_HEXAGON_S2_clbnorm",
-    "llvm.hexagon.S2.clbp" => "__builtin_HEXAGON_S2_clbp",
-    "llvm.hexagon.S2.clrbit.i" => "__builtin_HEXAGON_S2_clrbit_i",
-    "llvm.hexagon.S2.clrbit.r" => "__builtin_HEXAGON_S2_clrbit_r",
-    "llvm.hexagon.S2.ct0" => "__builtin_HEXAGON_S2_ct0",
-    "llvm.hexagon.S2.ct0p" => "__builtin_HEXAGON_S2_ct0p",
-    "llvm.hexagon.S2.ct1" => "__builtin_HEXAGON_S2_ct1",
-    "llvm.hexagon.S2.ct1p" => "__builtin_HEXAGON_S2_ct1p",
-    "llvm.hexagon.S2.deinterleave" => "__builtin_HEXAGON_S2_deinterleave",
-    "llvm.hexagon.S2.extractu" => "__builtin_HEXAGON_S2_extractu",
-    "llvm.hexagon.S2.extractu.rp" => "__builtin_HEXAGON_S2_extractu_rp",
-    "llvm.hexagon.S2.extractup" => "__builtin_HEXAGON_S2_extractup",
-    "llvm.hexagon.S2.extractup.rp" => "__builtin_HEXAGON_S2_extractup_rp",
-    "llvm.hexagon.S2.insert" => "__builtin_HEXAGON_S2_insert",
-    "llvm.hexagon.S2.insert.rp" => "__builtin_HEXAGON_S2_insert_rp",
-    "llvm.hexagon.S2.insertp" => "__builtin_HEXAGON_S2_insertp",
-    "llvm.hexagon.S2.insertp.rp" => "__builtin_HEXAGON_S2_insertp_rp",
-    "llvm.hexagon.S2.interleave" => "__builtin_HEXAGON_S2_interleave",
-    "llvm.hexagon.S2.lfsp" => "__builtin_HEXAGON_S2_lfsp",
-    "llvm.hexagon.S2.lsl.r.p" => "__builtin_HEXAGON_S2_lsl_r_p",
-    "llvm.hexagon.S2.lsl.r.p.acc" => "__builtin_HEXAGON_S2_lsl_r_p_acc",
-    "llvm.hexagon.S2.lsl.r.p.and" => "__builtin_HEXAGON_S2_lsl_r_p_and",
-    "llvm.hexagon.S2.lsl.r.p.nac" => "__builtin_HEXAGON_S2_lsl_r_p_nac",
-    "llvm.hexagon.S2.lsl.r.p.or" => "__builtin_HEXAGON_S2_lsl_r_p_or",
-    "llvm.hexagon.S2.lsl.r.p.xor" => "__builtin_HEXAGON_S2_lsl_r_p_xor",
-    "llvm.hexagon.S2.lsl.r.r" => "__builtin_HEXAGON_S2_lsl_r_r",
-    "llvm.hexagon.S2.lsl.r.r.acc" => "__builtin_HEXAGON_S2_lsl_r_r_acc",
-    "llvm.hexagon.S2.lsl.r.r.and" => "__builtin_HEXAGON_S2_lsl_r_r_and",
-    "llvm.hexagon.S2.lsl.r.r.nac" => "__builtin_HEXAGON_S2_lsl_r_r_nac",
-    "llvm.hexagon.S2.lsl.r.r.or" => "__builtin_HEXAGON_S2_lsl_r_r_or",
-    "llvm.hexagon.S2.lsl.r.vh" => "__builtin_HEXAGON_S2_lsl_r_vh",
-    "llvm.hexagon.S2.lsl.r.vw" => "__builtin_HEXAGON_S2_lsl_r_vw",
-    "llvm.hexagon.S2.lsr.i.p" => "__builtin_HEXAGON_S2_lsr_i_p",
-    "llvm.hexagon.S2.lsr.i.p.acc" => "__builtin_HEXAGON_S2_lsr_i_p_acc",
-    "llvm.hexagon.S2.lsr.i.p.and" => "__builtin_HEXAGON_S2_lsr_i_p_and",
-    "llvm.hexagon.S2.lsr.i.p.nac" => "__builtin_HEXAGON_S2_lsr_i_p_nac",
-    "llvm.hexagon.S2.lsr.i.p.or" => "__builtin_HEXAGON_S2_lsr_i_p_or",
-    "llvm.hexagon.S2.lsr.i.p.xacc" => "__builtin_HEXAGON_S2_lsr_i_p_xacc",
-    "llvm.hexagon.S2.lsr.i.r" => "__builtin_HEXAGON_S2_lsr_i_r",
-    "llvm.hexagon.S2.lsr.i.r.acc" => "__builtin_HEXAGON_S2_lsr_i_r_acc",
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-    "llvm.hexagon.V6.vabsw.sat.128B" => "__builtin_HEXAGON_V6_vabsw_sat_128B",
-    "llvm.hexagon.V6.vadd.hf" => "__builtin_HEXAGON_V6_vadd_hf",
-    "llvm.hexagon.V6.vadd.hf.128B" => "__builtin_HEXAGON_V6_vadd_hf_128B",
-    "llvm.hexagon.V6.vadd.hf.f8" => "__builtin_HEXAGON_V6_vadd_hf_f8",
-    "llvm.hexagon.V6.vadd.hf.f8.128B" => "__builtin_HEXAGON_V6_vadd_hf_f8_128B",
-    "llvm.hexagon.V6.vadd.hf.hf" => "__builtin_HEXAGON_V6_vadd_hf_hf",
-    "llvm.hexagon.V6.vadd.hf.hf.128B" => "__builtin_HEXAGON_V6_vadd_hf_hf_128B",
-    "llvm.hexagon.V6.vadd.qf16" => "__builtin_HEXAGON_V6_vadd_qf16",
-    "llvm.hexagon.V6.vadd.qf16.128B" => "__builtin_HEXAGON_V6_vadd_qf16_128B",
-    "llvm.hexagon.V6.vadd.qf16.mix" => "__builtin_HEXAGON_V6_vadd_qf16_mix",
-    "llvm.hexagon.V6.vadd.qf16.mix.128B" => "__builtin_HEXAGON_V6_vadd_qf16_mix_128B",
-    "llvm.hexagon.V6.vadd.qf32" => "__builtin_HEXAGON_V6_vadd_qf32",
-    "llvm.hexagon.V6.vadd.qf32.128B" => "__builtin_HEXAGON_V6_vadd_qf32_128B",
-    "llvm.hexagon.V6.vadd.qf32.mix" => "__builtin_HEXAGON_V6_vadd_qf32_mix",
-    "llvm.hexagon.V6.vadd.qf32.mix.128B" => "__builtin_HEXAGON_V6_vadd_qf32_mix_128B",
-    "llvm.hexagon.V6.vadd.sf" => "__builtin_HEXAGON_V6_vadd_sf",
-    "llvm.hexagon.V6.vadd.sf.128B" => "__builtin_HEXAGON_V6_vadd_sf_128B",
-    "llvm.hexagon.V6.vadd.sf.bf" => "__builtin_HEXAGON_V6_vadd_sf_bf",
-    "llvm.hexagon.V6.vadd.sf.bf.128B" => "__builtin_HEXAGON_V6_vadd_sf_bf_128B",
-    "llvm.hexagon.V6.vadd.sf.hf" => "__builtin_HEXAGON_V6_vadd_sf_hf",
-    "llvm.hexagon.V6.vadd.sf.hf.128B" => "__builtin_HEXAGON_V6_vadd_sf_hf_128B",
-    "llvm.hexagon.V6.vadd.sf.sf" => "__builtin_HEXAGON_V6_vadd_sf_sf",
-    "llvm.hexagon.V6.vadd.sf.sf.128B" => "__builtin_HEXAGON_V6_vadd_sf_sf_128B",
-    "llvm.hexagon.V6.vaddb" => "__builtin_HEXAGON_V6_vaddb",
-    "llvm.hexagon.V6.vaddb.128B" => "__builtin_HEXAGON_V6_vaddb_128B",
-    "llvm.hexagon.V6.vaddb.dv" => "__builtin_HEXAGON_V6_vaddb_dv",
-    "llvm.hexagon.V6.vaddb.dv.128B" => "__builtin_HEXAGON_V6_vaddb_dv_128B",
-    "llvm.hexagon.V6.vaddbnq" => "__builtin_HEXAGON_V6_vaddbnq",
-    "llvm.hexagon.V6.vaddbnq.128B" => "__builtin_HEXAGON_V6_vaddbnq_128B",
-    "llvm.hexagon.V6.vaddbq" => "__builtin_HEXAGON_V6_vaddbq",
-    "llvm.hexagon.V6.vaddbq.128B" => "__builtin_HEXAGON_V6_vaddbq_128B",
-    "llvm.hexagon.V6.vaddbsat" => "__builtin_HEXAGON_V6_vaddbsat",
-    "llvm.hexagon.V6.vaddbsat.128B" => "__builtin_HEXAGON_V6_vaddbsat_128B",
-    "llvm.hexagon.V6.vaddbsat.dv" => "__builtin_HEXAGON_V6_vaddbsat_dv",
-    "llvm.hexagon.V6.vaddbsat.dv.128B" => "__builtin_HEXAGON_V6_vaddbsat_dv_128B",
-    "llvm.hexagon.V6.vaddcarrysat" => "__builtin_HEXAGON_V6_vaddcarrysat",
-    "llvm.hexagon.V6.vaddcarrysat.128B" => "__builtin_HEXAGON_V6_vaddcarrysat_128B",
-    "llvm.hexagon.V6.vaddclbh" => "__builtin_HEXAGON_V6_vaddclbh",
-    "llvm.hexagon.V6.vaddclbh.128B" => "__builtin_HEXAGON_V6_vaddclbh_128B",
-    "llvm.hexagon.V6.vaddclbw" => "__builtin_HEXAGON_V6_vaddclbw",
-    "llvm.hexagon.V6.vaddclbw.128B" => "__builtin_HEXAGON_V6_vaddclbw_128B",
-    "llvm.hexagon.V6.vaddh" => "__builtin_HEXAGON_V6_vaddh",
-    "llvm.hexagon.V6.vaddh.128B" => "__builtin_HEXAGON_V6_vaddh_128B",
-    "llvm.hexagon.V6.vaddh.dv" => "__builtin_HEXAGON_V6_vaddh_dv",
-    "llvm.hexagon.V6.vaddh.dv.128B" => "__builtin_HEXAGON_V6_vaddh_dv_128B",
-    "llvm.hexagon.V6.vaddhnq" => "__builtin_HEXAGON_V6_vaddhnq",
-    "llvm.hexagon.V6.vaddhnq.128B" => "__builtin_HEXAGON_V6_vaddhnq_128B",
-    "llvm.hexagon.V6.vaddhq" => "__builtin_HEXAGON_V6_vaddhq",
-    "llvm.hexagon.V6.vaddhq.128B" => "__builtin_HEXAGON_V6_vaddhq_128B",
-    "llvm.hexagon.V6.vaddhsat" => "__builtin_HEXAGON_V6_vaddhsat",
-    "llvm.hexagon.V6.vaddhsat.128B" => "__builtin_HEXAGON_V6_vaddhsat_128B",
-    "llvm.hexagon.V6.vaddhsat.dv" => "__builtin_HEXAGON_V6_vaddhsat_dv",
-    "llvm.hexagon.V6.vaddhsat.dv.128B" => "__builtin_HEXAGON_V6_vaddhsat_dv_128B",
-    "llvm.hexagon.V6.vaddhw" => "__builtin_HEXAGON_V6_vaddhw",
-    "llvm.hexagon.V6.vaddhw.128B" => "__builtin_HEXAGON_V6_vaddhw_128B",
-    "llvm.hexagon.V6.vaddhw.acc" => "__builtin_HEXAGON_V6_vaddhw_acc",
-    "llvm.hexagon.V6.vaddhw.acc.128B" => "__builtin_HEXAGON_V6_vaddhw_acc_128B",
-    "llvm.hexagon.V6.vaddubh" => "__builtin_HEXAGON_V6_vaddubh",
-    "llvm.hexagon.V6.vaddubh.128B" => "__builtin_HEXAGON_V6_vaddubh_128B",
-    "llvm.hexagon.V6.vaddubh.acc" => "__builtin_HEXAGON_V6_vaddubh_acc",
-    "llvm.hexagon.V6.vaddubh.acc.128B" => "__builtin_HEXAGON_V6_vaddubh_acc_128B",
-    "llvm.hexagon.V6.vaddubsat" => "__builtin_HEXAGON_V6_vaddubsat",
-    "llvm.hexagon.V6.vaddubsat.128B" => "__builtin_HEXAGON_V6_vaddubsat_128B",
-    "llvm.hexagon.V6.vaddubsat.dv" => "__builtin_HEXAGON_V6_vaddubsat_dv",
-    "llvm.hexagon.V6.vaddubsat.dv.128B" => "__builtin_HEXAGON_V6_vaddubsat_dv_128B",
-    "llvm.hexagon.V6.vaddububb.sat" => "__builtin_HEXAGON_V6_vaddububb_sat",
-    "llvm.hexagon.V6.vaddububb.sat.128B" => "__builtin_HEXAGON_V6_vaddububb_sat_128B",
-    "llvm.hexagon.V6.vadduhsat" => "__builtin_HEXAGON_V6_vadduhsat",
-    "llvm.hexagon.V6.vadduhsat.128B" => "__builtin_HEXAGON_V6_vadduhsat_128B",
-    "llvm.hexagon.V6.vadduhsat.dv" => "__builtin_HEXAGON_V6_vadduhsat_dv",
-    "llvm.hexagon.V6.vadduhsat.dv.128B" => "__builtin_HEXAGON_V6_vadduhsat_dv_128B",
-    "llvm.hexagon.V6.vadduhw" => "__builtin_HEXAGON_V6_vadduhw",
-    "llvm.hexagon.V6.vadduhw.128B" => "__builtin_HEXAGON_V6_vadduhw_128B",
-    "llvm.hexagon.V6.vadduhw.acc" => "__builtin_HEXAGON_V6_vadduhw_acc",
-    "llvm.hexagon.V6.vadduhw.acc.128B" => "__builtin_HEXAGON_V6_vadduhw_acc_128B",
-    "llvm.hexagon.V6.vadduwsat" => "__builtin_HEXAGON_V6_vadduwsat",
-    "llvm.hexagon.V6.vadduwsat.128B" => "__builtin_HEXAGON_V6_vadduwsat_128B",
-    "llvm.hexagon.V6.vadduwsat.dv" => "__builtin_HEXAGON_V6_vadduwsat_dv",
-    "llvm.hexagon.V6.vadduwsat.dv.128B" => "__builtin_HEXAGON_V6_vadduwsat_dv_128B",
-    "llvm.hexagon.V6.vaddw" => "__builtin_HEXAGON_V6_vaddw",
-    "llvm.hexagon.V6.vaddw.128B" => "__builtin_HEXAGON_V6_vaddw_128B",
-    "llvm.hexagon.V6.vaddw.dv" => "__builtin_HEXAGON_V6_vaddw_dv",
-    "llvm.hexagon.V6.vaddw.dv.128B" => "__builtin_HEXAGON_V6_vaddw_dv_128B",
-    "llvm.hexagon.V6.vaddwnq" => "__builtin_HEXAGON_V6_vaddwnq",
-    "llvm.hexagon.V6.vaddwnq.128B" => "__builtin_HEXAGON_V6_vaddwnq_128B",
-    "llvm.hexagon.V6.vaddwq" => "__builtin_HEXAGON_V6_vaddwq",
-    "llvm.hexagon.V6.vaddwq.128B" => "__builtin_HEXAGON_V6_vaddwq_128B",
-    "llvm.hexagon.V6.vaddwsat" => "__builtin_HEXAGON_V6_vaddwsat",
-    "llvm.hexagon.V6.vaddwsat.128B" => "__builtin_HEXAGON_V6_vaddwsat_128B",
-    "llvm.hexagon.V6.vaddwsat.dv" => "__builtin_HEXAGON_V6_vaddwsat_dv",
-    "llvm.hexagon.V6.vaddwsat.dv.128B" => "__builtin_HEXAGON_V6_vaddwsat_dv_128B",
-    "llvm.hexagon.V6.valignb" => "__builtin_HEXAGON_V6_valignb",
-    "llvm.hexagon.V6.valignb.128B" => "__builtin_HEXAGON_V6_valignb_128B",
-    "llvm.hexagon.V6.valignbi" => "__builtin_HEXAGON_V6_valignbi",
-    "llvm.hexagon.V6.valignbi.128B" => "__builtin_HEXAGON_V6_valignbi_128B",
-    "llvm.hexagon.V6.vand" => "__builtin_HEXAGON_V6_vand",
-    "llvm.hexagon.V6.vand.128B" => "__builtin_HEXAGON_V6_vand_128B",
-    "llvm.hexagon.V6.vandnqrt" => "__builtin_HEXAGON_V6_vandnqrt",
-    "llvm.hexagon.V6.vandnqrt.128B" => "__builtin_HEXAGON_V6_vandnqrt_128B",
-    "llvm.hexagon.V6.vandnqrt.acc" => "__builtin_HEXAGON_V6_vandnqrt_acc",
-    "llvm.hexagon.V6.vandnqrt.acc.128B" => "__builtin_HEXAGON_V6_vandnqrt_acc_128B",
-    "llvm.hexagon.V6.vandqrt" => "__builtin_HEXAGON_V6_vandqrt",
-    "llvm.hexagon.V6.vandqrt.128B" => "__builtin_HEXAGON_V6_vandqrt_128B",
-    "llvm.hexagon.V6.vandqrt.acc" => "__builtin_HEXAGON_V6_vandqrt_acc",
-    "llvm.hexagon.V6.vandqrt.acc.128B" => "__builtin_HEXAGON_V6_vandqrt_acc_128B",
-    "llvm.hexagon.V6.vandvnqv" => "__builtin_HEXAGON_V6_vandvnqv",
-    "llvm.hexagon.V6.vandvnqv.128B" => "__builtin_HEXAGON_V6_vandvnqv_128B",
-    "llvm.hexagon.V6.vandvqv" => "__builtin_HEXAGON_V6_vandvqv",
-    "llvm.hexagon.V6.vandvqv.128B" => "__builtin_HEXAGON_V6_vandvqv_128B",
-    "llvm.hexagon.V6.vandvrt" => "__builtin_HEXAGON_V6_vandvrt",
-    "llvm.hexagon.V6.vandvrt.128B" => "__builtin_HEXAGON_V6_vandvrt_128B",
-    "llvm.hexagon.V6.vandvrt.acc" => "__builtin_HEXAGON_V6_vandvrt_acc",
-    "llvm.hexagon.V6.vandvrt.acc.128B" => "__builtin_HEXAGON_V6_vandvrt_acc_128B",
-    "llvm.hexagon.V6.vaslh" => "__builtin_HEXAGON_V6_vaslh",
-    "llvm.hexagon.V6.vaslh.128B" => "__builtin_HEXAGON_V6_vaslh_128B",
-    "llvm.hexagon.V6.vaslh.acc" => "__builtin_HEXAGON_V6_vaslh_acc",
-    "llvm.hexagon.V6.vaslh.acc.128B" => "__builtin_HEXAGON_V6_vaslh_acc_128B",
-    "llvm.hexagon.V6.vaslhv" => "__builtin_HEXAGON_V6_vaslhv",
-    "llvm.hexagon.V6.vaslhv.128B" => "__builtin_HEXAGON_V6_vaslhv_128B",
-    "llvm.hexagon.V6.vaslw" => "__builtin_HEXAGON_V6_vaslw",
-    "llvm.hexagon.V6.vaslw.128B" => "__builtin_HEXAGON_V6_vaslw_128B",
-    "llvm.hexagon.V6.vaslw.acc" => "__builtin_HEXAGON_V6_vaslw_acc",
-    "llvm.hexagon.V6.vaslw.acc.128B" => "__builtin_HEXAGON_V6_vaslw_acc_128B",
-    "llvm.hexagon.V6.vaslwv" => "__builtin_HEXAGON_V6_vaslwv",
-    "llvm.hexagon.V6.vaslwv.128B" => "__builtin_HEXAGON_V6_vaslwv_128B",
-    "llvm.hexagon.V6.vasr.into" => "__builtin_HEXAGON_V6_vasr_into",
-    "llvm.hexagon.V6.vasr.into.128B" => "__builtin_HEXAGON_V6_vasr_into_128B",
-    "llvm.hexagon.V6.vasrh" => "__builtin_HEXAGON_V6_vasrh",
-    "llvm.hexagon.V6.vasrh.128B" => "__builtin_HEXAGON_V6_vasrh_128B",
-    "llvm.hexagon.V6.vasrh.acc" => "__builtin_HEXAGON_V6_vasrh_acc",
-    "llvm.hexagon.V6.vasrh.acc.128B" => "__builtin_HEXAGON_V6_vasrh_acc_128B",
-    "llvm.hexagon.V6.vasrhbrndsat" => "__builtin_HEXAGON_V6_vasrhbrndsat",
-    "llvm.hexagon.V6.vasrhbrndsat.128B" => "__builtin_HEXAGON_V6_vasrhbrndsat_128B",
-    "llvm.hexagon.V6.vasrhbsat" => "__builtin_HEXAGON_V6_vasrhbsat",
-    "llvm.hexagon.V6.vasrhbsat.128B" => "__builtin_HEXAGON_V6_vasrhbsat_128B",
-    "llvm.hexagon.V6.vasrhubrndsat" => "__builtin_HEXAGON_V6_vasrhubrndsat",
-    "llvm.hexagon.V6.vasrhubrndsat.128B" => "__builtin_HEXAGON_V6_vasrhubrndsat_128B",
-    "llvm.hexagon.V6.vasrhubsat" => "__builtin_HEXAGON_V6_vasrhubsat",
-    "llvm.hexagon.V6.vasrhubsat.128B" => "__builtin_HEXAGON_V6_vasrhubsat_128B",
-    "llvm.hexagon.V6.vasrhv" => "__builtin_HEXAGON_V6_vasrhv",
-    "llvm.hexagon.V6.vasrhv.128B" => "__builtin_HEXAGON_V6_vasrhv_128B",
-    "llvm.hexagon.V6.vasruhubrndsat" => "__builtin_HEXAGON_V6_vasruhubrndsat",
-    "llvm.hexagon.V6.vasruhubrndsat.128B" => "__builtin_HEXAGON_V6_vasruhubrndsat_128B",
-    "llvm.hexagon.V6.vasruhubsat" => "__builtin_HEXAGON_V6_vasruhubsat",
-    "llvm.hexagon.V6.vasruhubsat.128B" => "__builtin_HEXAGON_V6_vasruhubsat_128B",
-    "llvm.hexagon.V6.vasruwuhrndsat" => "__builtin_HEXAGON_V6_vasruwuhrndsat",
-    "llvm.hexagon.V6.vasruwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasruwuhrndsat_128B",
-    "llvm.hexagon.V6.vasruwuhsat" => "__builtin_HEXAGON_V6_vasruwuhsat",
-    "llvm.hexagon.V6.vasruwuhsat.128B" => "__builtin_HEXAGON_V6_vasruwuhsat_128B",
-    "llvm.hexagon.V6.vasrvuhubrndsat" => "__builtin_HEXAGON_V6_vasrvuhubrndsat",
-    "llvm.hexagon.V6.vasrvuhubrndsat.128B" => "__builtin_HEXAGON_V6_vasrvuhubrndsat_128B",
-    "llvm.hexagon.V6.vasrvuhubsat" => "__builtin_HEXAGON_V6_vasrvuhubsat",
-    "llvm.hexagon.V6.vasrvuhubsat.128B" => "__builtin_HEXAGON_V6_vasrvuhubsat_128B",
-    "llvm.hexagon.V6.vasrvwuhrndsat" => "__builtin_HEXAGON_V6_vasrvwuhrndsat",
-    "llvm.hexagon.V6.vasrvwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasrvwuhrndsat_128B",
-    "llvm.hexagon.V6.vasrvwuhsat" => "__builtin_HEXAGON_V6_vasrvwuhsat",
-    "llvm.hexagon.V6.vasrvwuhsat.128B" => "__builtin_HEXAGON_V6_vasrvwuhsat_128B",
-    "llvm.hexagon.V6.vasrw" => "__builtin_HEXAGON_V6_vasrw",
-    "llvm.hexagon.V6.vasrw.128B" => "__builtin_HEXAGON_V6_vasrw_128B",
-    "llvm.hexagon.V6.vasrw.acc" => "__builtin_HEXAGON_V6_vasrw_acc",
-    "llvm.hexagon.V6.vasrw.acc.128B" => "__builtin_HEXAGON_V6_vasrw_acc_128B",
-    "llvm.hexagon.V6.vasrwh" => "__builtin_HEXAGON_V6_vasrwh",
-    "llvm.hexagon.V6.vasrwh.128B" => "__builtin_HEXAGON_V6_vasrwh_128B",
-    "llvm.hexagon.V6.vasrwhrndsat" => "__builtin_HEXAGON_V6_vasrwhrndsat",
-    "llvm.hexagon.V6.vasrwhrndsat.128B" => "__builtin_HEXAGON_V6_vasrwhrndsat_128B",
-    "llvm.hexagon.V6.vasrwhsat" => "__builtin_HEXAGON_V6_vasrwhsat",
-    "llvm.hexagon.V6.vasrwhsat.128B" => "__builtin_HEXAGON_V6_vasrwhsat_128B",
-    "llvm.hexagon.V6.vasrwuhrndsat" => "__builtin_HEXAGON_V6_vasrwuhrndsat",
-    "llvm.hexagon.V6.vasrwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasrwuhrndsat_128B",
-    "llvm.hexagon.V6.vasrwuhsat" => "__builtin_HEXAGON_V6_vasrwuhsat",
-    "llvm.hexagon.V6.vasrwuhsat.128B" => "__builtin_HEXAGON_V6_vasrwuhsat_128B",
-    "llvm.hexagon.V6.vasrwv" => "__builtin_HEXAGON_V6_vasrwv",
-    "llvm.hexagon.V6.vasrwv.128B" => "__builtin_HEXAGON_V6_vasrwv_128B",
-    "llvm.hexagon.V6.vassign" => "__builtin_HEXAGON_V6_vassign",
-    "llvm.hexagon.V6.vassign.128B" => "__builtin_HEXAGON_V6_vassign_128B",
-    "llvm.hexagon.V6.vassign.fp" => "__builtin_HEXAGON_V6_vassign_fp",
-    "llvm.hexagon.V6.vassign.fp.128B" => "__builtin_HEXAGON_V6_vassign_fp_128B",
-    "llvm.hexagon.V6.vassignp" => "__builtin_HEXAGON_V6_vassignp",
-    "llvm.hexagon.V6.vassignp.128B" => "__builtin_HEXAGON_V6_vassignp_128B",
-    "llvm.hexagon.V6.vavgb" => "__builtin_HEXAGON_V6_vavgb",
-    "llvm.hexagon.V6.vavgb.128B" => "__builtin_HEXAGON_V6_vavgb_128B",
-    "llvm.hexagon.V6.vavgbrnd" => "__builtin_HEXAGON_V6_vavgbrnd",
-    "llvm.hexagon.V6.vavgbrnd.128B" => "__builtin_HEXAGON_V6_vavgbrnd_128B",
-    "llvm.hexagon.V6.vavgh" => "__builtin_HEXAGON_V6_vavgh",
-    "llvm.hexagon.V6.vavgh.128B" => "__builtin_HEXAGON_V6_vavgh_128B",
-    "llvm.hexagon.V6.vavghrnd" => "__builtin_HEXAGON_V6_vavghrnd",
-    "llvm.hexagon.V6.vavghrnd.128B" => "__builtin_HEXAGON_V6_vavghrnd_128B",
-    "llvm.hexagon.V6.vavgub" => "__builtin_HEXAGON_V6_vavgub",
-    "llvm.hexagon.V6.vavgub.128B" => "__builtin_HEXAGON_V6_vavgub_128B",
-    "llvm.hexagon.V6.vavgubrnd" => "__builtin_HEXAGON_V6_vavgubrnd",
-    "llvm.hexagon.V6.vavgubrnd.128B" => "__builtin_HEXAGON_V6_vavgubrnd_128B",
-    "llvm.hexagon.V6.vavguh" => "__builtin_HEXAGON_V6_vavguh",
-    "llvm.hexagon.V6.vavguh.128B" => "__builtin_HEXAGON_V6_vavguh_128B",
-    "llvm.hexagon.V6.vavguhrnd" => "__builtin_HEXAGON_V6_vavguhrnd",
-    "llvm.hexagon.V6.vavguhrnd.128B" => "__builtin_HEXAGON_V6_vavguhrnd_128B",
-    "llvm.hexagon.V6.vavguw" => "__builtin_HEXAGON_V6_vavguw",
-    "llvm.hexagon.V6.vavguw.128B" => "__builtin_HEXAGON_V6_vavguw_128B",
-    "llvm.hexagon.V6.vavguwrnd" => "__builtin_HEXAGON_V6_vavguwrnd",
-    "llvm.hexagon.V6.vavguwrnd.128B" => "__builtin_HEXAGON_V6_vavguwrnd_128B",
-    "llvm.hexagon.V6.vavgw" => "__builtin_HEXAGON_V6_vavgw",
-    "llvm.hexagon.V6.vavgw.128B" => "__builtin_HEXAGON_V6_vavgw_128B",
-    "llvm.hexagon.V6.vavgwrnd" => "__builtin_HEXAGON_V6_vavgwrnd",
-    "llvm.hexagon.V6.vavgwrnd.128B" => "__builtin_HEXAGON_V6_vavgwrnd_128B",
-    "llvm.hexagon.V6.vcl0h" => "__builtin_HEXAGON_V6_vcl0h",
-    "llvm.hexagon.V6.vcl0h.128B" => "__builtin_HEXAGON_V6_vcl0h_128B",
-    "llvm.hexagon.V6.vcl0w" => "__builtin_HEXAGON_V6_vcl0w",
-    "llvm.hexagon.V6.vcl0w.128B" => "__builtin_HEXAGON_V6_vcl0w_128B",
-    "llvm.hexagon.V6.vcombine" => "__builtin_HEXAGON_V6_vcombine",
-    "llvm.hexagon.V6.vcombine.128B" => "__builtin_HEXAGON_V6_vcombine_128B",
-    "llvm.hexagon.V6.vconv.h.hf" => "__builtin_HEXAGON_V6_vconv_h_hf",
-    "llvm.hexagon.V6.vconv.h.hf.128B" => "__builtin_HEXAGON_V6_vconv_h_hf_128B",
-    "llvm.hexagon.V6.vconv.hf.h" => "__builtin_HEXAGON_V6_vconv_hf_h",
-    "llvm.hexagon.V6.vconv.hf.h.128B" => "__builtin_HEXAGON_V6_vconv_hf_h_128B",
-    "llvm.hexagon.V6.vconv.hf.qf16" => "__builtin_HEXAGON_V6_vconv_hf_qf16",
-    "llvm.hexagon.V6.vconv.hf.qf16.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf16_128B",
-    "llvm.hexagon.V6.vconv.hf.qf32" => "__builtin_HEXAGON_V6_vconv_hf_qf32",
-    "llvm.hexagon.V6.vconv.hf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf32_128B",
-    "llvm.hexagon.V6.vconv.sf.qf32" => "__builtin_HEXAGON_V6_vconv_sf_qf32",
-    "llvm.hexagon.V6.vconv.sf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_sf_qf32_128B",
-    "llvm.hexagon.V6.vconv.sf.w" => "__builtin_HEXAGON_V6_vconv_sf_w",
-    "llvm.hexagon.V6.vconv.sf.w.128B" => "__builtin_HEXAGON_V6_vconv_sf_w_128B",
-    "llvm.hexagon.V6.vconv.w.sf" => "__builtin_HEXAGON_V6_vconv_w_sf",
-    "llvm.hexagon.V6.vconv.w.sf.128B" => "__builtin_HEXAGON_V6_vconv_w_sf_128B",
-    "llvm.hexagon.V6.vcvt.b.hf" => "__builtin_HEXAGON_V6_vcvt_b_hf",
-    "llvm.hexagon.V6.vcvt.b.hf.128B" => "__builtin_HEXAGON_V6_vcvt_b_hf_128B",
-    "llvm.hexagon.V6.vcvt.bf.sf" => "__builtin_HEXAGON_V6_vcvt_bf_sf",
-    "llvm.hexagon.V6.vcvt.bf.sf.128B" => "__builtin_HEXAGON_V6_vcvt_bf_sf_128B",
-    "llvm.hexagon.V6.vcvt.f8.hf" => "__builtin_HEXAGON_V6_vcvt_f8_hf",
-    "llvm.hexagon.V6.vcvt.f8.hf.128B" => "__builtin_HEXAGON_V6_vcvt_f8_hf_128B",
-    "llvm.hexagon.V6.vcvt.h.hf" => "__builtin_HEXAGON_V6_vcvt_h_hf",
-    "llvm.hexagon.V6.vcvt.h.hf.128B" => "__builtin_HEXAGON_V6_vcvt_h_hf_128B",
-    "llvm.hexagon.V6.vcvt.hf.b" => "__builtin_HEXAGON_V6_vcvt_hf_b",
-    "llvm.hexagon.V6.vcvt.hf.b.128B" => "__builtin_HEXAGON_V6_vcvt_hf_b_128B",
-    "llvm.hexagon.V6.vcvt.hf.f8" => "__builtin_HEXAGON_V6_vcvt_hf_f8",
-    "llvm.hexagon.V6.vcvt.hf.f8.128B" => "__builtin_HEXAGON_V6_vcvt_hf_f8_128B",
-    "llvm.hexagon.V6.vcvt.hf.h" => "__builtin_HEXAGON_V6_vcvt_hf_h",
-    "llvm.hexagon.V6.vcvt.hf.h.128B" => "__builtin_HEXAGON_V6_vcvt_hf_h_128B",
-    "llvm.hexagon.V6.vcvt.hf.sf" => "__builtin_HEXAGON_V6_vcvt_hf_sf",
-    "llvm.hexagon.V6.vcvt.hf.sf.128B" => "__builtin_HEXAGON_V6_vcvt_hf_sf_128B",
-    "llvm.hexagon.V6.vcvt.hf.ub" => "__builtin_HEXAGON_V6_vcvt_hf_ub",
-    "llvm.hexagon.V6.vcvt.hf.ub.128B" => "__builtin_HEXAGON_V6_vcvt_hf_ub_128B",
-    "llvm.hexagon.V6.vcvt.hf.uh" => "__builtin_HEXAGON_V6_vcvt_hf_uh",
-    "llvm.hexagon.V6.vcvt.hf.uh.128B" => "__builtin_HEXAGON_V6_vcvt_hf_uh_128B",
-    "llvm.hexagon.V6.vcvt.sf.hf" => "__builtin_HEXAGON_V6_vcvt_sf_hf",
-    "llvm.hexagon.V6.vcvt.sf.hf.128B" => "__builtin_HEXAGON_V6_vcvt_sf_hf_128B",
-    "llvm.hexagon.V6.vcvt.ub.hf" => "__builtin_HEXAGON_V6_vcvt_ub_hf",
-    "llvm.hexagon.V6.vcvt.ub.hf.128B" => "__builtin_HEXAGON_V6_vcvt_ub_hf_128B",
-    "llvm.hexagon.V6.vcvt.uh.hf" => "__builtin_HEXAGON_V6_vcvt_uh_hf",
-    "llvm.hexagon.V6.vcvt.uh.hf.128B" => "__builtin_HEXAGON_V6_vcvt_uh_hf_128B",
-    "llvm.hexagon.V6.vcvt2.b.hf" => "__builtin_HEXAGON_V6_vcvt2_b_hf",
-    "llvm.hexagon.V6.vcvt2.b.hf.128B" => "__builtin_HEXAGON_V6_vcvt2_b_hf_128B",
-    "llvm.hexagon.V6.vcvt2.hf.b" => "__builtin_HEXAGON_V6_vcvt2_hf_b",
-    "llvm.hexagon.V6.vcvt2.hf.b.128B" => "__builtin_HEXAGON_V6_vcvt2_hf_b_128B",
-    "llvm.hexagon.V6.vcvt2.hf.ub" => "__builtin_HEXAGON_V6_vcvt2_hf_ub",
-    "llvm.hexagon.V6.vcvt2.hf.ub.128B" => "__builtin_HEXAGON_V6_vcvt2_hf_ub_128B",
-    "llvm.hexagon.V6.vcvt2.ub.hf" => "__builtin_HEXAGON_V6_vcvt2_ub_hf",
-    "llvm.hexagon.V6.vcvt2.ub.hf.128B" => "__builtin_HEXAGON_V6_vcvt2_ub_hf_128B",
-    "llvm.hexagon.V6.vd0" => "__builtin_HEXAGON_V6_vd0",
-    "llvm.hexagon.V6.vd0.128B" => "__builtin_HEXAGON_V6_vd0_128B",
-    "llvm.hexagon.V6.vdd0" => "__builtin_HEXAGON_V6_vdd0",
-    "llvm.hexagon.V6.vdd0.128B" => "__builtin_HEXAGON_V6_vdd0_128B",
-    "llvm.hexagon.V6.vdealb" => "__builtin_HEXAGON_V6_vdealb",
-    "llvm.hexagon.V6.vdealb.128B" => "__builtin_HEXAGON_V6_vdealb_128B",
-    "llvm.hexagon.V6.vdealb4w" => "__builtin_HEXAGON_V6_vdealb4w",
-    "llvm.hexagon.V6.vdealb4w.128B" => "__builtin_HEXAGON_V6_vdealb4w_128B",
-    "llvm.hexagon.V6.vdealh" => "__builtin_HEXAGON_V6_vdealh",
-    "llvm.hexagon.V6.vdealh.128B" => "__builtin_HEXAGON_V6_vdealh_128B",
-    "llvm.hexagon.V6.vdealvdd" => "__builtin_HEXAGON_V6_vdealvdd",
-    "llvm.hexagon.V6.vdealvdd.128B" => "__builtin_HEXAGON_V6_vdealvdd_128B",
-    "llvm.hexagon.V6.vdelta" => "__builtin_HEXAGON_V6_vdelta",
-    "llvm.hexagon.V6.vdelta.128B" => "__builtin_HEXAGON_V6_vdelta_128B",
-    "llvm.hexagon.V6.vdmpy.sf.hf" => "__builtin_HEXAGON_V6_vdmpy_sf_hf",
-    "llvm.hexagon.V6.vdmpy.sf.hf.128B" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_128B",
-    "llvm.hexagon.V6.vdmpy.sf.hf.acc" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_acc",
-    "llvm.hexagon.V6.vdmpy.sf.hf.acc.128B" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_acc_128B",
-    "llvm.hexagon.V6.vdmpybus" => "__builtin_HEXAGON_V6_vdmpybus",
-    "llvm.hexagon.V6.vdmpybus.128B" => "__builtin_HEXAGON_V6_vdmpybus_128B",
-    "llvm.hexagon.V6.vdmpybus.acc" => "__builtin_HEXAGON_V6_vdmpybus_acc",
-    "llvm.hexagon.V6.vdmpybus.acc.128B" => "__builtin_HEXAGON_V6_vdmpybus_acc_128B",
-    "llvm.hexagon.V6.vdmpybus.dv" => "__builtin_HEXAGON_V6_vdmpybus_dv",
-    "llvm.hexagon.V6.vdmpybus.dv.128B" => "__builtin_HEXAGON_V6_vdmpybus_dv_128B",
-    "llvm.hexagon.V6.vdmpybus.dv.acc" => "__builtin_HEXAGON_V6_vdmpybus_dv_acc",
-    "llvm.hexagon.V6.vdmpybus.dv.acc.128B" => "__builtin_HEXAGON_V6_vdmpybus_dv_acc_128B",
-    "llvm.hexagon.V6.vdmpyhb" => "__builtin_HEXAGON_V6_vdmpyhb",
-    "llvm.hexagon.V6.vdmpyhb.128B" => "__builtin_HEXAGON_V6_vdmpyhb_128B",
-    "llvm.hexagon.V6.vdmpyhb.acc" => "__builtin_HEXAGON_V6_vdmpyhb_acc",
-    "llvm.hexagon.V6.vdmpyhb.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhb_acc_128B",
-    "llvm.hexagon.V6.vdmpyhb.dv" => "__builtin_HEXAGON_V6_vdmpyhb_dv",
-    "llvm.hexagon.V6.vdmpyhb.dv.128B" => "__builtin_HEXAGON_V6_vdmpyhb_dv_128B",
-    "llvm.hexagon.V6.vdmpyhb.dv.acc" => "__builtin_HEXAGON_V6_vdmpyhb_dv_acc",
-    "llvm.hexagon.V6.vdmpyhb.dv.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhb_dv_acc_128B",
-    "llvm.hexagon.V6.vdmpyhisat" => "__builtin_HEXAGON_V6_vdmpyhisat",
-    "llvm.hexagon.V6.vdmpyhisat.128B" => "__builtin_HEXAGON_V6_vdmpyhisat_128B",
-    "llvm.hexagon.V6.vdmpyhisat.acc" => "__builtin_HEXAGON_V6_vdmpyhisat_acc",
-    "llvm.hexagon.V6.vdmpyhisat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhisat_acc_128B",
-    "llvm.hexagon.V6.vdmpyhsat" => "__builtin_HEXAGON_V6_vdmpyhsat",
-    "llvm.hexagon.V6.vdmpyhsat.128B" => "__builtin_HEXAGON_V6_vdmpyhsat_128B",
-    "llvm.hexagon.V6.vdmpyhsat.acc" => "__builtin_HEXAGON_V6_vdmpyhsat_acc",
-    "llvm.hexagon.V6.vdmpyhsat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsat_acc_128B",
-    "llvm.hexagon.V6.vdmpyhsuisat" => "__builtin_HEXAGON_V6_vdmpyhsuisat",
-    "llvm.hexagon.V6.vdmpyhsuisat.128B" => "__builtin_HEXAGON_V6_vdmpyhsuisat_128B",
-    "llvm.hexagon.V6.vdmpyhsuisat.acc" => "__builtin_HEXAGON_V6_vdmpyhsuisat_acc",
-    "llvm.hexagon.V6.vdmpyhsuisat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsuisat_acc_128B",
-    "llvm.hexagon.V6.vdmpyhsusat" => "__builtin_HEXAGON_V6_vdmpyhsusat",
-    "llvm.hexagon.V6.vdmpyhsusat.128B" => "__builtin_HEXAGON_V6_vdmpyhsusat_128B",
-    "llvm.hexagon.V6.vdmpyhsusat.acc" => "__builtin_HEXAGON_V6_vdmpyhsusat_acc",
-    "llvm.hexagon.V6.vdmpyhsusat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsusat_acc_128B",
-    "llvm.hexagon.V6.vdmpyhvsat" => "__builtin_HEXAGON_V6_vdmpyhvsat",
-    "llvm.hexagon.V6.vdmpyhvsat.128B" => "__builtin_HEXAGON_V6_vdmpyhvsat_128B",
-    "llvm.hexagon.V6.vdmpyhvsat.acc" => "__builtin_HEXAGON_V6_vdmpyhvsat_acc",
-    "llvm.hexagon.V6.vdmpyhvsat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhvsat_acc_128B",
-    "llvm.hexagon.V6.vdsaduh" => "__builtin_HEXAGON_V6_vdsaduh",
-    "llvm.hexagon.V6.vdsaduh.128B" => "__builtin_HEXAGON_V6_vdsaduh_128B",
-    "llvm.hexagon.V6.vdsaduh.acc" => "__builtin_HEXAGON_V6_vdsaduh_acc",
-    "llvm.hexagon.V6.vdsaduh.acc.128B" => "__builtin_HEXAGON_V6_vdsaduh_acc_128B",
-    "llvm.hexagon.V6.veqb" => "__builtin_HEXAGON_V6_veqb",
-    "llvm.hexagon.V6.veqb.128B" => "__builtin_HEXAGON_V6_veqb_128B",
-    "llvm.hexagon.V6.veqb.and" => "__builtin_HEXAGON_V6_veqb_and",
-    "llvm.hexagon.V6.veqb.and.128B" => "__builtin_HEXAGON_V6_veqb_and_128B",
-    "llvm.hexagon.V6.veqb.or" => "__builtin_HEXAGON_V6_veqb_or",
-    "llvm.hexagon.V6.veqb.or.128B" => "__builtin_HEXAGON_V6_veqb_or_128B",
-    "llvm.hexagon.V6.veqb.xor" => "__builtin_HEXAGON_V6_veqb_xor",
-    "llvm.hexagon.V6.veqb.xor.128B" => "__builtin_HEXAGON_V6_veqb_xor_128B",
-    "llvm.hexagon.V6.veqh" => "__builtin_HEXAGON_V6_veqh",
-    "llvm.hexagon.V6.veqh.128B" => "__builtin_HEXAGON_V6_veqh_128B",
-    "llvm.hexagon.V6.veqh.and" => "__builtin_HEXAGON_V6_veqh_and",
-    "llvm.hexagon.V6.veqh.and.128B" => "__builtin_HEXAGON_V6_veqh_and_128B",
-    "llvm.hexagon.V6.veqh.or" => "__builtin_HEXAGON_V6_veqh_or",
-    "llvm.hexagon.V6.veqh.or.128B" => "__builtin_HEXAGON_V6_veqh_or_128B",
-    "llvm.hexagon.V6.veqh.xor" => "__builtin_HEXAGON_V6_veqh_xor",
-    "llvm.hexagon.V6.veqh.xor.128B" => "__builtin_HEXAGON_V6_veqh_xor_128B",
-    "llvm.hexagon.V6.veqw" => "__builtin_HEXAGON_V6_veqw",
-    "llvm.hexagon.V6.veqw.128B" => "__builtin_HEXAGON_V6_veqw_128B",
-    "llvm.hexagon.V6.veqw.and" => "__builtin_HEXAGON_V6_veqw_and",
-    "llvm.hexagon.V6.veqw.and.128B" => "__builtin_HEXAGON_V6_veqw_and_128B",
-    "llvm.hexagon.V6.veqw.or" => "__builtin_HEXAGON_V6_veqw_or",
-    "llvm.hexagon.V6.veqw.or.128B" => "__builtin_HEXAGON_V6_veqw_or_128B",
-    "llvm.hexagon.V6.veqw.xor" => "__builtin_HEXAGON_V6_veqw_xor",
-    "llvm.hexagon.V6.veqw.xor.128B" => "__builtin_HEXAGON_V6_veqw_xor_128B",
-    "llvm.hexagon.V6.vfmax.f8" => "__builtin_HEXAGON_V6_vfmax_f8",
-    "llvm.hexagon.V6.vfmax.f8.128B" => "__builtin_HEXAGON_V6_vfmax_f8_128B",
-    "llvm.hexagon.V6.vfmax.hf" => "__builtin_HEXAGON_V6_vfmax_hf",
-    "llvm.hexagon.V6.vfmax.hf.128B" => "__builtin_HEXAGON_V6_vfmax_hf_128B",
-    "llvm.hexagon.V6.vfmax.sf" => "__builtin_HEXAGON_V6_vfmax_sf",
-    "llvm.hexagon.V6.vfmax.sf.128B" => "__builtin_HEXAGON_V6_vfmax_sf_128B",
-    "llvm.hexagon.V6.vfmin.f8" => "__builtin_HEXAGON_V6_vfmin_f8",
-    "llvm.hexagon.V6.vfmin.f8.128B" => "__builtin_HEXAGON_V6_vfmin_f8_128B",
-    "llvm.hexagon.V6.vfmin.hf" => "__builtin_HEXAGON_V6_vfmin_hf",
-    "llvm.hexagon.V6.vfmin.hf.128B" => "__builtin_HEXAGON_V6_vfmin_hf_128B",
-    "llvm.hexagon.V6.vfmin.sf" => "__builtin_HEXAGON_V6_vfmin_sf",
-    "llvm.hexagon.V6.vfmin.sf.128B" => "__builtin_HEXAGON_V6_vfmin_sf_128B",
-    "llvm.hexagon.V6.vfneg.f8" => "__builtin_HEXAGON_V6_vfneg_f8",
-    "llvm.hexagon.V6.vfneg.f8.128B" => "__builtin_HEXAGON_V6_vfneg_f8_128B",
-    "llvm.hexagon.V6.vfneg.hf" => "__builtin_HEXAGON_V6_vfneg_hf",
-    "llvm.hexagon.V6.vfneg.hf.128B" => "__builtin_HEXAGON_V6_vfneg_hf_128B",
-    "llvm.hexagon.V6.vfneg.sf" => "__builtin_HEXAGON_V6_vfneg_sf",
-    "llvm.hexagon.V6.vfneg.sf.128B" => "__builtin_HEXAGON_V6_vfneg_sf_128B",
-    "llvm.hexagon.V6.vgathermh" => "__builtin_HEXAGON_V6_vgathermh",
-    "llvm.hexagon.V6.vgathermh.128B" => "__builtin_HEXAGON_V6_vgathermh_128B",
-    "llvm.hexagon.V6.vgathermhq" => "__builtin_HEXAGON_V6_vgathermhq",
-    "llvm.hexagon.V6.vgathermhq.128B" => "__builtin_HEXAGON_V6_vgathermhq_128B",
-    "llvm.hexagon.V6.vgathermhw" => "__builtin_HEXAGON_V6_vgathermhw",
-    "llvm.hexagon.V6.vgathermhw.128B" => "__builtin_HEXAGON_V6_vgathermhw_128B",
-    "llvm.hexagon.V6.vgathermhwq" => "__builtin_HEXAGON_V6_vgathermhwq",
-    "llvm.hexagon.V6.vgathermhwq.128B" => "__builtin_HEXAGON_V6_vgathermhwq_128B",
-    "llvm.hexagon.V6.vgathermw" => "__builtin_HEXAGON_V6_vgathermw",
-    "llvm.hexagon.V6.vgathermw.128B" => "__builtin_HEXAGON_V6_vgathermw_128B",
-    "llvm.hexagon.V6.vgathermwq" => "__builtin_HEXAGON_V6_vgathermwq",
-    "llvm.hexagon.V6.vgathermwq.128B" => "__builtin_HEXAGON_V6_vgathermwq_128B",
-    "llvm.hexagon.V6.vgtb" => "__builtin_HEXAGON_V6_vgtb",
-    "llvm.hexagon.V6.vgtb.128B" => "__builtin_HEXAGON_V6_vgtb_128B",
-    "llvm.hexagon.V6.vgtb.and" => "__builtin_HEXAGON_V6_vgtb_and",
-    "llvm.hexagon.V6.vgtb.and.128B" => "__builtin_HEXAGON_V6_vgtb_and_128B",
-    "llvm.hexagon.V6.vgtb.or" => "__builtin_HEXAGON_V6_vgtb_or",
-    "llvm.hexagon.V6.vgtb.or.128B" => "__builtin_HEXAGON_V6_vgtb_or_128B",
-    "llvm.hexagon.V6.vgtb.xor" => "__builtin_HEXAGON_V6_vgtb_xor",
-    "llvm.hexagon.V6.vgtb.xor.128B" => "__builtin_HEXAGON_V6_vgtb_xor_128B",
-    "llvm.hexagon.V6.vgtbf" => "__builtin_HEXAGON_V6_vgtbf",
-    "llvm.hexagon.V6.vgtbf.128B" => "__builtin_HEXAGON_V6_vgtbf_128B",
-    "llvm.hexagon.V6.vgtbf.and" => "__builtin_HEXAGON_V6_vgtbf_and",
-    "llvm.hexagon.V6.vgtbf.and.128B" => "__builtin_HEXAGON_V6_vgtbf_and_128B",
-    "llvm.hexagon.V6.vgtbf.or" => "__builtin_HEXAGON_V6_vgtbf_or",
-    "llvm.hexagon.V6.vgtbf.or.128B" => "__builtin_HEXAGON_V6_vgtbf_or_128B",
-    "llvm.hexagon.V6.vgtbf.xor" => "__builtin_HEXAGON_V6_vgtbf_xor",
-    "llvm.hexagon.V6.vgtbf.xor.128B" => "__builtin_HEXAGON_V6_vgtbf_xor_128B",
-    "llvm.hexagon.V6.vgth" => "__builtin_HEXAGON_V6_vgth",
-    "llvm.hexagon.V6.vgth.128B" => "__builtin_HEXAGON_V6_vgth_128B",
-    "llvm.hexagon.V6.vgth.and" => "__builtin_HEXAGON_V6_vgth_and",
-    "llvm.hexagon.V6.vgth.and.128B" => "__builtin_HEXAGON_V6_vgth_and_128B",
-    "llvm.hexagon.V6.vgth.or" => "__builtin_HEXAGON_V6_vgth_or",
-    "llvm.hexagon.V6.vgth.or.128B" => "__builtin_HEXAGON_V6_vgth_or_128B",
-    "llvm.hexagon.V6.vgth.xor" => "__builtin_HEXAGON_V6_vgth_xor",
-    "llvm.hexagon.V6.vgth.xor.128B" => "__builtin_HEXAGON_V6_vgth_xor_128B",
-    "llvm.hexagon.V6.vgthf" => "__builtin_HEXAGON_V6_vgthf",
-    "llvm.hexagon.V6.vgthf.128B" => "__builtin_HEXAGON_V6_vgthf_128B",
-    "llvm.hexagon.V6.vgthf.and" => "__builtin_HEXAGON_V6_vgthf_and",
-    "llvm.hexagon.V6.vgthf.and.128B" => "__builtin_HEXAGON_V6_vgthf_and_128B",
-    "llvm.hexagon.V6.vgthf.or" => "__builtin_HEXAGON_V6_vgthf_or",
-    "llvm.hexagon.V6.vgthf.or.128B" => "__builtin_HEXAGON_V6_vgthf_or_128B",
-    "llvm.hexagon.V6.vgthf.xor" => "__builtin_HEXAGON_V6_vgthf_xor",
-    "llvm.hexagon.V6.vgthf.xor.128B" => "__builtin_HEXAGON_V6_vgthf_xor_128B",
-    "llvm.hexagon.V6.vgtsf" => "__builtin_HEXAGON_V6_vgtsf",
-    "llvm.hexagon.V6.vgtsf.128B" => "__builtin_HEXAGON_V6_vgtsf_128B",
-    "llvm.hexagon.V6.vgtsf.and" => "__builtin_HEXAGON_V6_vgtsf_and",
-    "llvm.hexagon.V6.vgtsf.and.128B" => "__builtin_HEXAGON_V6_vgtsf_and_128B",
-    "llvm.hexagon.V6.vgtsf.or" => "__builtin_HEXAGON_V6_vgtsf_or",
-    "llvm.hexagon.V6.vgtsf.or.128B" => "__builtin_HEXAGON_V6_vgtsf_or_128B",
-    "llvm.hexagon.V6.vgtsf.xor" => "__builtin_HEXAGON_V6_vgtsf_xor",
-    "llvm.hexagon.V6.vgtsf.xor.128B" => "__builtin_HEXAGON_V6_vgtsf_xor_128B",
-    "llvm.hexagon.V6.vgtub" => "__builtin_HEXAGON_V6_vgtub",
-    "llvm.hexagon.V6.vgtub.128B" => "__builtin_HEXAGON_V6_vgtub_128B",
-    "llvm.hexagon.V6.vgtub.and" => "__builtin_HEXAGON_V6_vgtub_and",
-    "llvm.hexagon.V6.vgtub.and.128B" => "__builtin_HEXAGON_V6_vgtub_and_128B",
-    "llvm.hexagon.V6.vgtub.or" => "__builtin_HEXAGON_V6_vgtub_or",
-    "llvm.hexagon.V6.vgtub.or.128B" => "__builtin_HEXAGON_V6_vgtub_or_128B",
-    "llvm.hexagon.V6.vgtub.xor" => "__builtin_HEXAGON_V6_vgtub_xor",
-    "llvm.hexagon.V6.vgtub.xor.128B" => "__builtin_HEXAGON_V6_vgtub_xor_128B",
-    "llvm.hexagon.V6.vgtuh" => "__builtin_HEXAGON_V6_vgtuh",
-    "llvm.hexagon.V6.vgtuh.128B" => "__builtin_HEXAGON_V6_vgtuh_128B",
-    "llvm.hexagon.V6.vgtuh.and" => "__builtin_HEXAGON_V6_vgtuh_and",
-    "llvm.hexagon.V6.vgtuh.and.128B" => "__builtin_HEXAGON_V6_vgtuh_and_128B",
-    "llvm.hexagon.V6.vgtuh.or" => "__builtin_HEXAGON_V6_vgtuh_or",
-    "llvm.hexagon.V6.vgtuh.or.128B" => "__builtin_HEXAGON_V6_vgtuh_or_128B",
-    "llvm.hexagon.V6.vgtuh.xor" => "__builtin_HEXAGON_V6_vgtuh_xor",
-    "llvm.hexagon.V6.vgtuh.xor.128B" => "__builtin_HEXAGON_V6_vgtuh_xor_128B",
-    "llvm.hexagon.V6.vgtuw" => "__builtin_HEXAGON_V6_vgtuw",
-    "llvm.hexagon.V6.vgtuw.128B" => "__builtin_HEXAGON_V6_vgtuw_128B",
-    "llvm.hexagon.V6.vgtuw.and" => "__builtin_HEXAGON_V6_vgtuw_and",
-    "llvm.hexagon.V6.vgtuw.and.128B" => "__builtin_HEXAGON_V6_vgtuw_and_128B",
-    "llvm.hexagon.V6.vgtuw.or" => "__builtin_HEXAGON_V6_vgtuw_or",
-    "llvm.hexagon.V6.vgtuw.or.128B" => "__builtin_HEXAGON_V6_vgtuw_or_128B",
-    "llvm.hexagon.V6.vgtuw.xor" => "__builtin_HEXAGON_V6_vgtuw_xor",
-    "llvm.hexagon.V6.vgtuw.xor.128B" => "__builtin_HEXAGON_V6_vgtuw_xor_128B",
-    "llvm.hexagon.V6.vgtw" => "__builtin_HEXAGON_V6_vgtw",
-    "llvm.hexagon.V6.vgtw.128B" => "__builtin_HEXAGON_V6_vgtw_128B",
-    "llvm.hexagon.V6.vgtw.and" => "__builtin_HEXAGON_V6_vgtw_and",
-    "llvm.hexagon.V6.vgtw.and.128B" => "__builtin_HEXAGON_V6_vgtw_and_128B",
-    "llvm.hexagon.V6.vgtw.or" => "__builtin_HEXAGON_V6_vgtw_or",
-    "llvm.hexagon.V6.vgtw.or.128B" => "__builtin_HEXAGON_V6_vgtw_or_128B",
-    "llvm.hexagon.V6.vgtw.xor" => "__builtin_HEXAGON_V6_vgtw_xor",
-    "llvm.hexagon.V6.vgtw.xor.128B" => "__builtin_HEXAGON_V6_vgtw_xor_128B",
-    "llvm.hexagon.V6.vinsertwr" => "__builtin_HEXAGON_V6_vinsertwr",
-    "llvm.hexagon.V6.vinsertwr.128B" => "__builtin_HEXAGON_V6_vinsertwr_128B",
-    "llvm.hexagon.V6.vlalignb" => "__builtin_HEXAGON_V6_vlalignb",
-    "llvm.hexagon.V6.vlalignb.128B" => "__builtin_HEXAGON_V6_vlalignb_128B",
-    "llvm.hexagon.V6.vlalignbi" => "__builtin_HEXAGON_V6_vlalignbi",
-    "llvm.hexagon.V6.vlalignbi.128B" => "__builtin_HEXAGON_V6_vlalignbi_128B",
-    "llvm.hexagon.V6.vlsrb" => "__builtin_HEXAGON_V6_vlsrb",
-    "llvm.hexagon.V6.vlsrb.128B" => "__builtin_HEXAGON_V6_vlsrb_128B",
-    "llvm.hexagon.V6.vlsrh" => "__builtin_HEXAGON_V6_vlsrh",
-    "llvm.hexagon.V6.vlsrh.128B" => "__builtin_HEXAGON_V6_vlsrh_128B",
-    "llvm.hexagon.V6.vlsrhv" => "__builtin_HEXAGON_V6_vlsrhv",
-    "llvm.hexagon.V6.vlsrhv.128B" => "__builtin_HEXAGON_V6_vlsrhv_128B",
-    "llvm.hexagon.V6.vlsrw" => "__builtin_HEXAGON_V6_vlsrw",
-    "llvm.hexagon.V6.vlsrw.128B" => "__builtin_HEXAGON_V6_vlsrw_128B",
-    "llvm.hexagon.V6.vlsrwv" => "__builtin_HEXAGON_V6_vlsrwv",
-    "llvm.hexagon.V6.vlsrwv.128B" => "__builtin_HEXAGON_V6_vlsrwv_128B",
-    "llvm.hexagon.V6.vlut4" => "__builtin_HEXAGON_V6_vlut4",
-    "llvm.hexagon.V6.vlut4.128B" => "__builtin_HEXAGON_V6_vlut4_128B",
-    "llvm.hexagon.V6.vlutb" => "__builtin_HEXAGON_V6_vlutb",
-    "llvm.hexagon.V6.vlutb.128B" => "__builtin_HEXAGON_V6_vlutb_128B",
-    "llvm.hexagon.V6.vlutb.acc" => "__builtin_HEXAGON_V6_vlutb_acc",
-    "llvm.hexagon.V6.vlutb.acc.128B" => "__builtin_HEXAGON_V6_vlutb_acc_128B",
-    "llvm.hexagon.V6.vlutb.dv" => "__builtin_HEXAGON_V6_vlutb_dv",
-    "llvm.hexagon.V6.vlutb.dv.128B" => "__builtin_HEXAGON_V6_vlutb_dv_128B",
-    "llvm.hexagon.V6.vlutb.dv.acc" => "__builtin_HEXAGON_V6_vlutb_dv_acc",
-    "llvm.hexagon.V6.vlutb.dv.acc.128B" => "__builtin_HEXAGON_V6_vlutb_dv_acc_128B",
-    "llvm.hexagon.V6.vlutvvb" => "__builtin_HEXAGON_V6_vlutvvb",
-    "llvm.hexagon.V6.vlutvvb.128B" => "__builtin_HEXAGON_V6_vlutvvb_128B",
-    "llvm.hexagon.V6.vlutvvb.nm" => "__builtin_HEXAGON_V6_vlutvvb_nm",
-    "llvm.hexagon.V6.vlutvvb.nm.128B" => "__builtin_HEXAGON_V6_vlutvvb_nm_128B",
-    "llvm.hexagon.V6.vlutvvb.oracc" => "__builtin_HEXAGON_V6_vlutvvb_oracc",
-    "llvm.hexagon.V6.vlutvvb.oracc.128B" => "__builtin_HEXAGON_V6_vlutvvb_oracc_128B",
-    "llvm.hexagon.V6.vlutvvb.oracci" => "__builtin_HEXAGON_V6_vlutvvb_oracci",
-    "llvm.hexagon.V6.vlutvvb.oracci.128B" => "__builtin_HEXAGON_V6_vlutvvb_oracci_128B",
-    "llvm.hexagon.V6.vlutvvbi" => "__builtin_HEXAGON_V6_vlutvvbi",
-    "llvm.hexagon.V6.vlutvvbi.128B" => "__builtin_HEXAGON_V6_vlutvvbi_128B",
-    "llvm.hexagon.V6.vlutvwh" => "__builtin_HEXAGON_V6_vlutvwh",
-    "llvm.hexagon.V6.vlutvwh.128B" => "__builtin_HEXAGON_V6_vlutvwh_128B",
-    "llvm.hexagon.V6.vlutvwh.nm" => "__builtin_HEXAGON_V6_vlutvwh_nm",
-    "llvm.hexagon.V6.vlutvwh.nm.128B" => "__builtin_HEXAGON_V6_vlutvwh_nm_128B",
-    "llvm.hexagon.V6.vlutvwh.oracc" => "__builtin_HEXAGON_V6_vlutvwh_oracc",
-    "llvm.hexagon.V6.vlutvwh.oracc.128B" => "__builtin_HEXAGON_V6_vlutvwh_oracc_128B",
-    "llvm.hexagon.V6.vlutvwh.oracci" => "__builtin_HEXAGON_V6_vlutvwh_oracci",
-    "llvm.hexagon.V6.vlutvwh.oracci.128B" => "__builtin_HEXAGON_V6_vlutvwh_oracci_128B",
-    "llvm.hexagon.V6.vlutvwhi" => "__builtin_HEXAGON_V6_vlutvwhi",
-    "llvm.hexagon.V6.vlutvwhi.128B" => "__builtin_HEXAGON_V6_vlutvwhi_128B",
-    "llvm.hexagon.V6.vmax.bf" => "__builtin_HEXAGON_V6_vmax_bf",
-    "llvm.hexagon.V6.vmax.bf.128B" => "__builtin_HEXAGON_V6_vmax_bf_128B",
-    "llvm.hexagon.V6.vmax.hf" => "__builtin_HEXAGON_V6_vmax_hf",
-    "llvm.hexagon.V6.vmax.hf.128B" => "__builtin_HEXAGON_V6_vmax_hf_128B",
-    "llvm.hexagon.V6.vmax.sf" => "__builtin_HEXAGON_V6_vmax_sf",
-    "llvm.hexagon.V6.vmax.sf.128B" => "__builtin_HEXAGON_V6_vmax_sf_128B",
-    "llvm.hexagon.V6.vmaxb" => "__builtin_HEXAGON_V6_vmaxb",
-    "llvm.hexagon.V6.vmaxb.128B" => "__builtin_HEXAGON_V6_vmaxb_128B",
-    "llvm.hexagon.V6.vmaxh" => "__builtin_HEXAGON_V6_vmaxh",
-    "llvm.hexagon.V6.vmaxh.128B" => "__builtin_HEXAGON_V6_vmaxh_128B",
-    "llvm.hexagon.V6.vmaxub" => "__builtin_HEXAGON_V6_vmaxub",
-    "llvm.hexagon.V6.vmaxub.128B" => "__builtin_HEXAGON_V6_vmaxub_128B",
-    "llvm.hexagon.V6.vmaxuh" => "__builtin_HEXAGON_V6_vmaxuh",
-    "llvm.hexagon.V6.vmaxuh.128B" => "__builtin_HEXAGON_V6_vmaxuh_128B",
-    "llvm.hexagon.V6.vmaxw" => "__builtin_HEXAGON_V6_vmaxw",
-    "llvm.hexagon.V6.vmaxw.128B" => "__builtin_HEXAGON_V6_vmaxw_128B",
-    "llvm.hexagon.V6.vmerge.qf" => "__builtin_HEXAGON_V6_vmerge_qf",
-    "llvm.hexagon.V6.vmerge.qf.128B" => "__builtin_HEXAGON_V6_vmerge_qf_128B",
-    "llvm.hexagon.V6.vmin.bf" => "__builtin_HEXAGON_V6_vmin_bf",
-    "llvm.hexagon.V6.vmin.bf.128B" => "__builtin_HEXAGON_V6_vmin_bf_128B",
-    "llvm.hexagon.V6.vmin.hf" => "__builtin_HEXAGON_V6_vmin_hf",
-    "llvm.hexagon.V6.vmin.hf.128B" => "__builtin_HEXAGON_V6_vmin_hf_128B",
-    "llvm.hexagon.V6.vmin.sf" => "__builtin_HEXAGON_V6_vmin_sf",
-    "llvm.hexagon.V6.vmin.sf.128B" => "__builtin_HEXAGON_V6_vmin_sf_128B",
-    "llvm.hexagon.V6.vminb" => "__builtin_HEXAGON_V6_vminb",
-    "llvm.hexagon.V6.vminb.128B" => "__builtin_HEXAGON_V6_vminb_128B",
-    "llvm.hexagon.V6.vminh" => "__builtin_HEXAGON_V6_vminh",
-    "llvm.hexagon.V6.vminh.128B" => "__builtin_HEXAGON_V6_vminh_128B",
-    "llvm.hexagon.V6.vminub" => "__builtin_HEXAGON_V6_vminub",
-    "llvm.hexagon.V6.vminub.128B" => "__builtin_HEXAGON_V6_vminub_128B",
-    "llvm.hexagon.V6.vminuh" => "__builtin_HEXAGON_V6_vminuh",
-    "llvm.hexagon.V6.vminuh.128B" => "__builtin_HEXAGON_V6_vminuh_128B",
-    "llvm.hexagon.V6.vminw" => "__builtin_HEXAGON_V6_vminw",
-    "llvm.hexagon.V6.vminw.128B" => "__builtin_HEXAGON_V6_vminw_128B",
-    "llvm.hexagon.V6.vmpabus" => "__builtin_HEXAGON_V6_vmpabus",
-    "llvm.hexagon.V6.vmpabus.128B" => "__builtin_HEXAGON_V6_vmpabus_128B",
-    "llvm.hexagon.V6.vmpabus.acc" => "__builtin_HEXAGON_V6_vmpabus_acc",
-    "llvm.hexagon.V6.vmpabus.acc.128B" => "__builtin_HEXAGON_V6_vmpabus_acc_128B",
-    "llvm.hexagon.V6.vmpabusv" => "__builtin_HEXAGON_V6_vmpabusv",
-    "llvm.hexagon.V6.vmpabusv.128B" => "__builtin_HEXAGON_V6_vmpabusv_128B",
-    "llvm.hexagon.V6.vmpabuu" => "__builtin_HEXAGON_V6_vmpabuu",
-    "llvm.hexagon.V6.vmpabuu.128B" => "__builtin_HEXAGON_V6_vmpabuu_128B",
-    "llvm.hexagon.V6.vmpabuu.acc" => "__builtin_HEXAGON_V6_vmpabuu_acc",
-    "llvm.hexagon.V6.vmpabuu.acc.128B" => "__builtin_HEXAGON_V6_vmpabuu_acc_128B",
-    "llvm.hexagon.V6.vmpabuuv" => "__builtin_HEXAGON_V6_vmpabuuv",
-    "llvm.hexagon.V6.vmpabuuv.128B" => "__builtin_HEXAGON_V6_vmpabuuv_128B",
-    "llvm.hexagon.V6.vmpahb" => "__builtin_HEXAGON_V6_vmpahb",
-    "llvm.hexagon.V6.vmpahb.128B" => "__builtin_HEXAGON_V6_vmpahb_128B",
-    "llvm.hexagon.V6.vmpahb.acc" => "__builtin_HEXAGON_V6_vmpahb_acc",
-    "llvm.hexagon.V6.vmpahb.acc.128B" => "__builtin_HEXAGON_V6_vmpahb_acc_128B",
-    "llvm.hexagon.V6.vmpahhsat" => "__builtin_HEXAGON_V6_vmpahhsat",
-    "llvm.hexagon.V6.vmpahhsat.128B" => "__builtin_HEXAGON_V6_vmpahhsat_128B",
-    "llvm.hexagon.V6.vmpauhb" => "__builtin_HEXAGON_V6_vmpauhb",
-    "llvm.hexagon.V6.vmpauhb.128B" => "__builtin_HEXAGON_V6_vmpauhb_128B",
-    "llvm.hexagon.V6.vmpauhb.acc" => "__builtin_HEXAGON_V6_vmpauhb_acc",
-    "llvm.hexagon.V6.vmpauhb.acc.128B" => "__builtin_HEXAGON_V6_vmpauhb_acc_128B",
-    "llvm.hexagon.V6.vmpauhuhsat" => "__builtin_HEXAGON_V6_vmpauhuhsat",
-    "llvm.hexagon.V6.vmpauhuhsat.128B" => "__builtin_HEXAGON_V6_vmpauhuhsat_128B",
-    "llvm.hexagon.V6.vmpsuhuhsat" => "__builtin_HEXAGON_V6_vmpsuhuhsat",
-    "llvm.hexagon.V6.vmpsuhuhsat.128B" => "__builtin_HEXAGON_V6_vmpsuhuhsat_128B",
-    "llvm.hexagon.V6.vmpy.hf.f8" => "__builtin_HEXAGON_V6_vmpy_hf_f8",
-    "llvm.hexagon.V6.vmpy.hf.f8.128B" => "__builtin_HEXAGON_V6_vmpy_hf_f8_128B",
-    "llvm.hexagon.V6.vmpy.hf.f8.acc" => "__builtin_HEXAGON_V6_vmpy_hf_f8_acc",
-    "llvm.hexagon.V6.vmpy.hf.f8.acc.128B" => "__builtin_HEXAGON_V6_vmpy_hf_f8_acc_128B",
-    "llvm.hexagon.V6.vmpy.hf.hf" => "__builtin_HEXAGON_V6_vmpy_hf_hf",
-    "llvm.hexagon.V6.vmpy.hf.hf.128B" => "__builtin_HEXAGON_V6_vmpy_hf_hf_128B",
-    "llvm.hexagon.V6.vmpy.hf.hf.acc" => "__builtin_HEXAGON_V6_vmpy_hf_hf_acc",
-    "llvm.hexagon.V6.vmpy.hf.hf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_hf_hf_acc_128B",
-    "llvm.hexagon.V6.vmpy.qf16" => "__builtin_HEXAGON_V6_vmpy_qf16",
-    "llvm.hexagon.V6.vmpy.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_128B",
-    "llvm.hexagon.V6.vmpy.qf16.hf" => "__builtin_HEXAGON_V6_vmpy_qf16_hf",
-    "llvm.hexagon.V6.vmpy.qf16.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_hf_128B",
-    "llvm.hexagon.V6.vmpy.qf16.mix.hf" => "__builtin_HEXAGON_V6_vmpy_qf16_mix_hf",
-    "llvm.hexagon.V6.vmpy.qf16.mix.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_mix_hf_128B",
-    "llvm.hexagon.V6.vmpy.qf32" => "__builtin_HEXAGON_V6_vmpy_qf32",
-    "llvm.hexagon.V6.vmpy.qf32.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_128B",
-    "llvm.hexagon.V6.vmpy.qf32.hf" => "__builtin_HEXAGON_V6_vmpy_qf32_hf",
-    "llvm.hexagon.V6.vmpy.qf32.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_hf_128B",
-    "llvm.hexagon.V6.vmpy.qf32.mix.hf" => "__builtin_HEXAGON_V6_vmpy_qf32_mix_hf",
-    "llvm.hexagon.V6.vmpy.qf32.mix.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_mix_hf_128B",
-    "llvm.hexagon.V6.vmpy.qf32.qf16" => "__builtin_HEXAGON_V6_vmpy_qf32_qf16",
-    "llvm.hexagon.V6.vmpy.qf32.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_qf16_128B",
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-    "llvm.hexagon.V6.vmpy.qf32.sf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_sf_128B",
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-    "llvm.hexagon.V6.vmpy.rt.hf.128B" => "__builtin_HEXAGON_V6_vmpy_rt_hf_128B",
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-    "llvm.hexagon.V6.vmpy.rt.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_rt_qf16_128B",
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-    "llvm.hexagon.V6.vmpy.rt.sf.128B" => "__builtin_HEXAGON_V6_vmpy_rt_sf_128B",
-    "llvm.hexagon.V6.vmpy.sf.bf" => "__builtin_HEXAGON_V6_vmpy_sf_bf",
-    "llvm.hexagon.V6.vmpy.sf.bf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_bf_128B",
-    "llvm.hexagon.V6.vmpy.sf.bf.acc" => "__builtin_HEXAGON_V6_vmpy_sf_bf_acc",
-    "llvm.hexagon.V6.vmpy.sf.bf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_sf_bf_acc_128B",
-    "llvm.hexagon.V6.vmpy.sf.hf" => "__builtin_HEXAGON_V6_vmpy_sf_hf",
-    "llvm.hexagon.V6.vmpy.sf.hf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_hf_128B",
-    "llvm.hexagon.V6.vmpy.sf.hf.acc" => "__builtin_HEXAGON_V6_vmpy_sf_hf_acc",
-    "llvm.hexagon.V6.vmpy.sf.hf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_sf_hf_acc_128B",
-    "llvm.hexagon.V6.vmpy.sf.sf" => "__builtin_HEXAGON_V6_vmpy_sf_sf",
-    "llvm.hexagon.V6.vmpy.sf.sf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_sf_128B",
-    "llvm.hexagon.V6.vmpybus" => "__builtin_HEXAGON_V6_vmpybus",
-    "llvm.hexagon.V6.vmpybus.128B" => "__builtin_HEXAGON_V6_vmpybus_128B",
-    "llvm.hexagon.V6.vmpybus.acc" => "__builtin_HEXAGON_V6_vmpybus_acc",
-    "llvm.hexagon.V6.vmpybus.acc.128B" => "__builtin_HEXAGON_V6_vmpybus_acc_128B",
-    "llvm.hexagon.V6.vmpybusv" => "__builtin_HEXAGON_V6_vmpybusv",
-    "llvm.hexagon.V6.vmpybusv.128B" => "__builtin_HEXAGON_V6_vmpybusv_128B",
-    "llvm.hexagon.V6.vmpybusv.acc" => "__builtin_HEXAGON_V6_vmpybusv_acc",
-    "llvm.hexagon.V6.vmpybusv.acc.128B" => "__builtin_HEXAGON_V6_vmpybusv_acc_128B",
-    "llvm.hexagon.V6.vmpybv" => "__builtin_HEXAGON_V6_vmpybv",
-    "llvm.hexagon.V6.vmpybv.128B" => "__builtin_HEXAGON_V6_vmpybv_128B",
-    "llvm.hexagon.V6.vmpybv.acc" => "__builtin_HEXAGON_V6_vmpybv_acc",
-    "llvm.hexagon.V6.vmpybv.acc.128B" => "__builtin_HEXAGON_V6_vmpybv_acc_128B",
-    "llvm.hexagon.V6.vmpyewuh" => "__builtin_HEXAGON_V6_vmpyewuh",
-    "llvm.hexagon.V6.vmpyewuh.128B" => "__builtin_HEXAGON_V6_vmpyewuh_128B",
-    "llvm.hexagon.V6.vmpyewuh.64" => "__builtin_HEXAGON_V6_vmpyewuh_64",
-    "llvm.hexagon.V6.vmpyewuh.64.128B" => "__builtin_HEXAGON_V6_vmpyewuh_64_128B",
-    "llvm.hexagon.V6.vmpyh" => "__builtin_HEXAGON_V6_vmpyh",
-    "llvm.hexagon.V6.vmpyh.128B" => "__builtin_HEXAGON_V6_vmpyh_128B",
-    "llvm.hexagon.V6.vmpyh.acc" => "__builtin_HEXAGON_V6_vmpyh_acc",
-    "llvm.hexagon.V6.vmpyh.acc.128B" => "__builtin_HEXAGON_V6_vmpyh_acc_128B",
-    "llvm.hexagon.V6.vmpyhsat.acc" => "__builtin_HEXAGON_V6_vmpyhsat_acc",
-    "llvm.hexagon.V6.vmpyhsat.acc.128B" => "__builtin_HEXAGON_V6_vmpyhsat_acc_128B",
-    "llvm.hexagon.V6.vmpyhsrs" => "__builtin_HEXAGON_V6_vmpyhsrs",
-    "llvm.hexagon.V6.vmpyhsrs.128B" => "__builtin_HEXAGON_V6_vmpyhsrs_128B",
-    "llvm.hexagon.V6.vmpyhss" => "__builtin_HEXAGON_V6_vmpyhss",
-    "llvm.hexagon.V6.vmpyhss.128B" => "__builtin_HEXAGON_V6_vmpyhss_128B",
-    "llvm.hexagon.V6.vmpyhus" => "__builtin_HEXAGON_V6_vmpyhus",
-    "llvm.hexagon.V6.vmpyhus.128B" => "__builtin_HEXAGON_V6_vmpyhus_128B",
-    "llvm.hexagon.V6.vmpyhus.acc" => "__builtin_HEXAGON_V6_vmpyhus_acc",
-    "llvm.hexagon.V6.vmpyhus.acc.128B" => "__builtin_HEXAGON_V6_vmpyhus_acc_128B",
-    "llvm.hexagon.V6.vmpyhv" => "__builtin_HEXAGON_V6_vmpyhv",
-    "llvm.hexagon.V6.vmpyhv.128B" => "__builtin_HEXAGON_V6_vmpyhv_128B",
-    "llvm.hexagon.V6.vmpyhv.acc" => "__builtin_HEXAGON_V6_vmpyhv_acc",
-    "llvm.hexagon.V6.vmpyhv.acc.128B" => "__builtin_HEXAGON_V6_vmpyhv_acc_128B",
-    "llvm.hexagon.V6.vmpyhvsrs" => "__builtin_HEXAGON_V6_vmpyhvsrs",
-    "llvm.hexagon.V6.vmpyhvsrs.128B" => "__builtin_HEXAGON_V6_vmpyhvsrs_128B",
-    "llvm.hexagon.V6.vmpyieoh" => "__builtin_HEXAGON_V6_vmpyieoh",
-    "llvm.hexagon.V6.vmpyieoh.128B" => "__builtin_HEXAGON_V6_vmpyieoh_128B",
-    "llvm.hexagon.V6.vmpyiewh.acc" => "__builtin_HEXAGON_V6_vmpyiewh_acc",
-    "llvm.hexagon.V6.vmpyiewh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiewh_acc_128B",
-    "llvm.hexagon.V6.vmpyiewuh" => "__builtin_HEXAGON_V6_vmpyiewuh",
-    "llvm.hexagon.V6.vmpyiewuh.128B" => "__builtin_HEXAGON_V6_vmpyiewuh_128B",
-    "llvm.hexagon.V6.vmpyiewuh.acc" => "__builtin_HEXAGON_V6_vmpyiewuh_acc",
-    "llvm.hexagon.V6.vmpyiewuh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiewuh_acc_128B",
-    "llvm.hexagon.V6.vmpyih" => "__builtin_HEXAGON_V6_vmpyih",
-    "llvm.hexagon.V6.vmpyih.128B" => "__builtin_HEXAGON_V6_vmpyih_128B",
-    "llvm.hexagon.V6.vmpyih.acc" => "__builtin_HEXAGON_V6_vmpyih_acc",
-    "llvm.hexagon.V6.vmpyih.acc.128B" => "__builtin_HEXAGON_V6_vmpyih_acc_128B",
-    "llvm.hexagon.V6.vmpyihb" => "__builtin_HEXAGON_V6_vmpyihb",
-    "llvm.hexagon.V6.vmpyihb.128B" => "__builtin_HEXAGON_V6_vmpyihb_128B",
-    "llvm.hexagon.V6.vmpyihb.acc" => "__builtin_HEXAGON_V6_vmpyihb_acc",
-    "llvm.hexagon.V6.vmpyihb.acc.128B" => "__builtin_HEXAGON_V6_vmpyihb_acc_128B",
-    "llvm.hexagon.V6.vmpyiowh" => "__builtin_HEXAGON_V6_vmpyiowh",
-    "llvm.hexagon.V6.vmpyiowh.128B" => "__builtin_HEXAGON_V6_vmpyiowh_128B",
-    "llvm.hexagon.V6.vmpyiwb" => "__builtin_HEXAGON_V6_vmpyiwb",
-    "llvm.hexagon.V6.vmpyiwb.128B" => "__builtin_HEXAGON_V6_vmpyiwb_128B",
-    "llvm.hexagon.V6.vmpyiwb.acc" => "__builtin_HEXAGON_V6_vmpyiwb_acc",
-    "llvm.hexagon.V6.vmpyiwb.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwb_acc_128B",
-    "llvm.hexagon.V6.vmpyiwh" => "__builtin_HEXAGON_V6_vmpyiwh",
-    "llvm.hexagon.V6.vmpyiwh.128B" => "__builtin_HEXAGON_V6_vmpyiwh_128B",
-    "llvm.hexagon.V6.vmpyiwh.acc" => "__builtin_HEXAGON_V6_vmpyiwh_acc",
-    "llvm.hexagon.V6.vmpyiwh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwh_acc_128B",
-    "llvm.hexagon.V6.vmpyiwub" => "__builtin_HEXAGON_V6_vmpyiwub",
-    "llvm.hexagon.V6.vmpyiwub.128B" => "__builtin_HEXAGON_V6_vmpyiwub_128B",
-    "llvm.hexagon.V6.vmpyiwub.acc" => "__builtin_HEXAGON_V6_vmpyiwub_acc",
-    "llvm.hexagon.V6.vmpyiwub.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwub_acc_128B",
-    "llvm.hexagon.V6.vmpyowh" => "__builtin_HEXAGON_V6_vmpyowh",
-    "llvm.hexagon.V6.vmpyowh.128B" => "__builtin_HEXAGON_V6_vmpyowh_128B",
-    "llvm.hexagon.V6.vmpyowh.64.acc" => "__builtin_HEXAGON_V6_vmpyowh_64_acc",
-    "llvm.hexagon.V6.vmpyowh.64.acc.128B" => "__builtin_HEXAGON_V6_vmpyowh_64_acc_128B",
-    "llvm.hexagon.V6.vmpyowh.rnd" => "__builtin_HEXAGON_V6_vmpyowh_rnd",
-    "llvm.hexagon.V6.vmpyowh.rnd.128B" => "__builtin_HEXAGON_V6_vmpyowh_rnd_128B",
-    "llvm.hexagon.V6.vmpyowh.rnd.sacc" => "__builtin_HEXAGON_V6_vmpyowh_rnd_sacc",
-    "llvm.hexagon.V6.vmpyowh.rnd.sacc.128B" => "__builtin_HEXAGON_V6_vmpyowh_rnd_sacc_128B",
-    "llvm.hexagon.V6.vmpyowh.sacc" => "__builtin_HEXAGON_V6_vmpyowh_sacc",
-    "llvm.hexagon.V6.vmpyowh.sacc.128B" => "__builtin_HEXAGON_V6_vmpyowh_sacc_128B",
-    "llvm.hexagon.V6.vmpyub" => "__builtin_HEXAGON_V6_vmpyub",
-    "llvm.hexagon.V6.vmpyub.128B" => "__builtin_HEXAGON_V6_vmpyub_128B",
-    "llvm.hexagon.V6.vmpyub.acc" => "__builtin_HEXAGON_V6_vmpyub_acc",
-    "llvm.hexagon.V6.vmpyub.acc.128B" => "__builtin_HEXAGON_V6_vmpyub_acc_128B",
-    "llvm.hexagon.V6.vmpyubv" => "__builtin_HEXAGON_V6_vmpyubv",
-    "llvm.hexagon.V6.vmpyubv.128B" => "__builtin_HEXAGON_V6_vmpyubv_128B",
-    "llvm.hexagon.V6.vmpyubv.acc" => "__builtin_HEXAGON_V6_vmpyubv_acc",
-    "llvm.hexagon.V6.vmpyubv.acc.128B" => "__builtin_HEXAGON_V6_vmpyubv_acc_128B",
-    "llvm.hexagon.V6.vmpyuh" => "__builtin_HEXAGON_V6_vmpyuh",
-    "llvm.hexagon.V6.vmpyuh.128B" => "__builtin_HEXAGON_V6_vmpyuh_128B",
-    "llvm.hexagon.V6.vmpyuh.acc" => "__builtin_HEXAGON_V6_vmpyuh_acc",
-    "llvm.hexagon.V6.vmpyuh.acc.128B" => "__builtin_HEXAGON_V6_vmpyuh_acc_128B",
-    "llvm.hexagon.V6.vmpyuhe" => "__builtin_HEXAGON_V6_vmpyuhe",
-    "llvm.hexagon.V6.vmpyuhe.128B" => "__builtin_HEXAGON_V6_vmpyuhe_128B",
-    "llvm.hexagon.V6.vmpyuhe.acc" => "__builtin_HEXAGON_V6_vmpyuhe_acc",
-    "llvm.hexagon.V6.vmpyuhe.acc.128B" => "__builtin_HEXAGON_V6_vmpyuhe_acc_128B",
-    "llvm.hexagon.V6.vmpyuhv" => "__builtin_HEXAGON_V6_vmpyuhv",
-    "llvm.hexagon.V6.vmpyuhv.128B" => "__builtin_HEXAGON_V6_vmpyuhv_128B",
-    "llvm.hexagon.V6.vmpyuhv.acc" => "__builtin_HEXAGON_V6_vmpyuhv_acc",
-    "llvm.hexagon.V6.vmpyuhv.acc.128B" => "__builtin_HEXAGON_V6_vmpyuhv_acc_128B",
-    "llvm.hexagon.V6.vmpyuhvs" => "__builtin_HEXAGON_V6_vmpyuhvs",
-    "llvm.hexagon.V6.vmpyuhvs.128B" => "__builtin_HEXAGON_V6_vmpyuhvs_128B",
-    "llvm.hexagon.V6.vmux" => "__builtin_HEXAGON_V6_vmux",
-    "llvm.hexagon.V6.vmux.128B" => "__builtin_HEXAGON_V6_vmux_128B",
-    "llvm.hexagon.V6.vnavgb" => "__builtin_HEXAGON_V6_vnavgb",
-    "llvm.hexagon.V6.vnavgb.128B" => "__builtin_HEXAGON_V6_vnavgb_128B",
-    "llvm.hexagon.V6.vnavgh" => "__builtin_HEXAGON_V6_vnavgh",
-    "llvm.hexagon.V6.vnavgh.128B" => "__builtin_HEXAGON_V6_vnavgh_128B",
-    "llvm.hexagon.V6.vnavgub" => "__builtin_HEXAGON_V6_vnavgub",
-    "llvm.hexagon.V6.vnavgub.128B" => "__builtin_HEXAGON_V6_vnavgub_128B",
-    "llvm.hexagon.V6.vnavgw" => "__builtin_HEXAGON_V6_vnavgw",
-    "llvm.hexagon.V6.vnavgw.128B" => "__builtin_HEXAGON_V6_vnavgw_128B",
-    "llvm.hexagon.V6.vnormamth" => "__builtin_HEXAGON_V6_vnormamth",
-    "llvm.hexagon.V6.vnormamth.128B" => "__builtin_HEXAGON_V6_vnormamth_128B",
-    "llvm.hexagon.V6.vnormamtw" => "__builtin_HEXAGON_V6_vnormamtw",
-    "llvm.hexagon.V6.vnormamtw.128B" => "__builtin_HEXAGON_V6_vnormamtw_128B",
-    "llvm.hexagon.V6.vnot" => "__builtin_HEXAGON_V6_vnot",
-    "llvm.hexagon.V6.vnot.128B" => "__builtin_HEXAGON_V6_vnot_128B",
-    "llvm.hexagon.V6.vor" => "__builtin_HEXAGON_V6_vor",
-    "llvm.hexagon.V6.vor.128B" => "__builtin_HEXAGON_V6_vor_128B",
-    "llvm.hexagon.V6.vpackeb" => "__builtin_HEXAGON_V6_vpackeb",
-    "llvm.hexagon.V6.vpackeb.128B" => "__builtin_HEXAGON_V6_vpackeb_128B",
-    "llvm.hexagon.V6.vpackeh" => "__builtin_HEXAGON_V6_vpackeh",
-    "llvm.hexagon.V6.vpackeh.128B" => "__builtin_HEXAGON_V6_vpackeh_128B",
-    "llvm.hexagon.V6.vpackhb.sat" => "__builtin_HEXAGON_V6_vpackhb_sat",
-    "llvm.hexagon.V6.vpackhb.sat.128B" => "__builtin_HEXAGON_V6_vpackhb_sat_128B",
-    "llvm.hexagon.V6.vpackhub.sat" => "__builtin_HEXAGON_V6_vpackhub_sat",
-    "llvm.hexagon.V6.vpackhub.sat.128B" => "__builtin_HEXAGON_V6_vpackhub_sat_128B",
-    "llvm.hexagon.V6.vpackob" => "__builtin_HEXAGON_V6_vpackob",
-    "llvm.hexagon.V6.vpackob.128B" => "__builtin_HEXAGON_V6_vpackob_128B",
-    "llvm.hexagon.V6.vpackoh" => "__builtin_HEXAGON_V6_vpackoh",
-    "llvm.hexagon.V6.vpackoh.128B" => "__builtin_HEXAGON_V6_vpackoh_128B",
-    "llvm.hexagon.V6.vpackwh.sat" => "__builtin_HEXAGON_V6_vpackwh_sat",
-    "llvm.hexagon.V6.vpackwh.sat.128B" => "__builtin_HEXAGON_V6_vpackwh_sat_128B",
-    "llvm.hexagon.V6.vpackwuh.sat" => "__builtin_HEXAGON_V6_vpackwuh_sat",
-    "llvm.hexagon.V6.vpackwuh.sat.128B" => "__builtin_HEXAGON_V6_vpackwuh_sat_128B",
-    "llvm.hexagon.V6.vpopcounth" => "__builtin_HEXAGON_V6_vpopcounth",
-    "llvm.hexagon.V6.vpopcounth.128B" => "__builtin_HEXAGON_V6_vpopcounth_128B",
-    "llvm.hexagon.V6.vprefixqb" => "__builtin_HEXAGON_V6_vprefixqb",
-    "llvm.hexagon.V6.vprefixqb.128B" => "__builtin_HEXAGON_V6_vprefixqb_128B",
-    "llvm.hexagon.V6.vprefixqh" => "__builtin_HEXAGON_V6_vprefixqh",
-    "llvm.hexagon.V6.vprefixqh.128B" => "__builtin_HEXAGON_V6_vprefixqh_128B",
-    "llvm.hexagon.V6.vprefixqw" => "__builtin_HEXAGON_V6_vprefixqw",
-    "llvm.hexagon.V6.vprefixqw.128B" => "__builtin_HEXAGON_V6_vprefixqw_128B",
-    "llvm.hexagon.V6.vrdelta" => "__builtin_HEXAGON_V6_vrdelta",
-    "llvm.hexagon.V6.vrdelta.128B" => "__builtin_HEXAGON_V6_vrdelta_128B",
-    "llvm.hexagon.V6.vrmpybub.rtt" => "__builtin_HEXAGON_V6_vrmpybub_rtt",
-    "llvm.hexagon.V6.vrmpybub.rtt.128B" => "__builtin_HEXAGON_V6_vrmpybub_rtt_128B",
-    "llvm.hexagon.V6.vrmpybub.rtt.acc" => "__builtin_HEXAGON_V6_vrmpybub_rtt_acc",
-    "llvm.hexagon.V6.vrmpybub.rtt.acc.128B" => "__builtin_HEXAGON_V6_vrmpybub_rtt_acc_128B",
-    "llvm.hexagon.V6.vrmpybus" => "__builtin_HEXAGON_V6_vrmpybus",
-    "llvm.hexagon.V6.vrmpybus.128B" => "__builtin_HEXAGON_V6_vrmpybus_128B",
-    "llvm.hexagon.V6.vrmpybus.acc" => "__builtin_HEXAGON_V6_vrmpybus_acc",
-    "llvm.hexagon.V6.vrmpybus.acc.128B" => "__builtin_HEXAGON_V6_vrmpybus_acc_128B",
-    "llvm.hexagon.V6.vrmpybusi" => "__builtin_HEXAGON_V6_vrmpybusi",
-    "llvm.hexagon.V6.vrmpybusi.128B" => "__builtin_HEXAGON_V6_vrmpybusi_128B",
-    "llvm.hexagon.V6.vrmpybusi.acc" => "__builtin_HEXAGON_V6_vrmpybusi_acc",
-    "llvm.hexagon.V6.vrmpybusi.acc.128B" => "__builtin_HEXAGON_V6_vrmpybusi_acc_128B",
-    "llvm.hexagon.V6.vrmpybusv" => "__builtin_HEXAGON_V6_vrmpybusv",
-    "llvm.hexagon.V6.vrmpybusv.128B" => "__builtin_HEXAGON_V6_vrmpybusv_128B",
-    "llvm.hexagon.V6.vrmpybusv.acc" => "__builtin_HEXAGON_V6_vrmpybusv_acc",
-    "llvm.hexagon.V6.vrmpybusv.acc.128B" => "__builtin_HEXAGON_V6_vrmpybusv_acc_128B",
-    "llvm.hexagon.V6.vrmpybv" => "__builtin_HEXAGON_V6_vrmpybv",
-    "llvm.hexagon.V6.vrmpybv.128B" => "__builtin_HEXAGON_V6_vrmpybv_128B",
-    "llvm.hexagon.V6.vrmpybv.acc" => "__builtin_HEXAGON_V6_vrmpybv_acc",
-    "llvm.hexagon.V6.vrmpybv.acc.128B" => "__builtin_HEXAGON_V6_vrmpybv_acc_128B",
-    "llvm.hexagon.V6.vrmpyub" => "__builtin_HEXAGON_V6_vrmpyub",
-    "llvm.hexagon.V6.vrmpyub.128B" => "__builtin_HEXAGON_V6_vrmpyub_128B",
-    "llvm.hexagon.V6.vrmpyub.acc" => "__builtin_HEXAGON_V6_vrmpyub_acc",
-    "llvm.hexagon.V6.vrmpyub.acc.128B" => "__builtin_HEXAGON_V6_vrmpyub_acc_128B",
-    "llvm.hexagon.V6.vrmpyub.rtt" => "__builtin_HEXAGON_V6_vrmpyub_rtt",
-    "llvm.hexagon.V6.vrmpyub.rtt.128B" => "__builtin_HEXAGON_V6_vrmpyub_rtt_128B",
-    "llvm.hexagon.V6.vrmpyub.rtt.acc" => "__builtin_HEXAGON_V6_vrmpyub_rtt_acc",
-    "llvm.hexagon.V6.vrmpyub.rtt.acc.128B" => "__builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B",
-    "llvm.hexagon.V6.vrmpyubi" => "__builtin_HEXAGON_V6_vrmpyubi",
-    "llvm.hexagon.V6.vrmpyubi.128B" => "__builtin_HEXAGON_V6_vrmpyubi_128B",
-    "llvm.hexagon.V6.vrmpyubi.acc" => "__builtin_HEXAGON_V6_vrmpyubi_acc",
-    "llvm.hexagon.V6.vrmpyubi.acc.128B" => "__builtin_HEXAGON_V6_vrmpyubi_acc_128B",
-    "llvm.hexagon.V6.vrmpyubv" => "__builtin_HEXAGON_V6_vrmpyubv",
-    "llvm.hexagon.V6.vrmpyubv.128B" => "__builtin_HEXAGON_V6_vrmpyubv_128B",
-    "llvm.hexagon.V6.vrmpyubv.acc" => "__builtin_HEXAGON_V6_vrmpyubv_acc",
-    "llvm.hexagon.V6.vrmpyubv.acc.128B" => "__builtin_HEXAGON_V6_vrmpyubv_acc_128B",
-    "llvm.hexagon.V6.vror" => "__builtin_HEXAGON_V6_vror",
-    "llvm.hexagon.V6.vror.128B" => "__builtin_HEXAGON_V6_vror_128B",
-    "llvm.hexagon.V6.vrotr" => "__builtin_HEXAGON_V6_vrotr",
-    "llvm.hexagon.V6.vrotr.128B" => "__builtin_HEXAGON_V6_vrotr_128B",
-    "llvm.hexagon.V6.vroundhb" => "__builtin_HEXAGON_V6_vroundhb",
-    "llvm.hexagon.V6.vroundhb.128B" => "__builtin_HEXAGON_V6_vroundhb_128B",
-    "llvm.hexagon.V6.vroundhub" => "__builtin_HEXAGON_V6_vroundhub",
-    "llvm.hexagon.V6.vroundhub.128B" => "__builtin_HEXAGON_V6_vroundhub_128B",
-    "llvm.hexagon.V6.vrounduhub" => "__builtin_HEXAGON_V6_vrounduhub",
-    "llvm.hexagon.V6.vrounduhub.128B" => "__builtin_HEXAGON_V6_vrounduhub_128B",
-    "llvm.hexagon.V6.vrounduwuh" => "__builtin_HEXAGON_V6_vrounduwuh",
-    "llvm.hexagon.V6.vrounduwuh.128B" => "__builtin_HEXAGON_V6_vrounduwuh_128B",
-    "llvm.hexagon.V6.vroundwh" => "__builtin_HEXAGON_V6_vroundwh",
-    "llvm.hexagon.V6.vroundwh.128B" => "__builtin_HEXAGON_V6_vroundwh_128B",
-    "llvm.hexagon.V6.vroundwuh" => "__builtin_HEXAGON_V6_vroundwuh",
-    "llvm.hexagon.V6.vroundwuh.128B" => "__builtin_HEXAGON_V6_vroundwuh_128B",
-    "llvm.hexagon.V6.vrsadubi" => "__builtin_HEXAGON_V6_vrsadubi",
-    "llvm.hexagon.V6.vrsadubi.128B" => "__builtin_HEXAGON_V6_vrsadubi_128B",
-    "llvm.hexagon.V6.vrsadubi.acc" => "__builtin_HEXAGON_V6_vrsadubi_acc",
-    "llvm.hexagon.V6.vrsadubi.acc.128B" => "__builtin_HEXAGON_V6_vrsadubi_acc_128B",
-    "llvm.hexagon.V6.vsatdw" => "__builtin_HEXAGON_V6_vsatdw",
-    "llvm.hexagon.V6.vsatdw.128B" => "__builtin_HEXAGON_V6_vsatdw_128B",
-    "llvm.hexagon.V6.vsathub" => "__builtin_HEXAGON_V6_vsathub",
-    "llvm.hexagon.V6.vsathub.128B" => "__builtin_HEXAGON_V6_vsathub_128B",
-    "llvm.hexagon.V6.vsatuwuh" => "__builtin_HEXAGON_V6_vsatuwuh",
-    "llvm.hexagon.V6.vsatuwuh.128B" => "__builtin_HEXAGON_V6_vsatuwuh_128B",
-    "llvm.hexagon.V6.vsatwh" => "__builtin_HEXAGON_V6_vsatwh",
-    "llvm.hexagon.V6.vsatwh.128B" => "__builtin_HEXAGON_V6_vsatwh_128B",
-    "llvm.hexagon.V6.vsb" => "__builtin_HEXAGON_V6_vsb",
-    "llvm.hexagon.V6.vsb.128B" => "__builtin_HEXAGON_V6_vsb_128B",
-    "llvm.hexagon.V6.vscattermh" => "__builtin_HEXAGON_V6_vscattermh",
-    "llvm.hexagon.V6.vscattermh.128B" => "__builtin_HEXAGON_V6_vscattermh_128B",
-    "llvm.hexagon.V6.vscattermh.add" => "__builtin_HEXAGON_V6_vscattermh_add",
-    "llvm.hexagon.V6.vscattermh.add.128B" => "__builtin_HEXAGON_V6_vscattermh_add_128B",
-    "llvm.hexagon.V6.vscattermhq" => "__builtin_HEXAGON_V6_vscattermhq",
-    "llvm.hexagon.V6.vscattermhq.128B" => "__builtin_HEXAGON_V6_vscattermhq_128B",
-    "llvm.hexagon.V6.vscattermhw" => "__builtin_HEXAGON_V6_vscattermhw",
-    "llvm.hexagon.V6.vscattermhw.128B" => "__builtin_HEXAGON_V6_vscattermhw_128B",
-    "llvm.hexagon.V6.vscattermhw.add" => "__builtin_HEXAGON_V6_vscattermhw_add",
-    "llvm.hexagon.V6.vscattermhw.add.128B" => "__builtin_HEXAGON_V6_vscattermhw_add_128B",
-    "llvm.hexagon.V6.vscattermhwq" => "__builtin_HEXAGON_V6_vscattermhwq",
-    "llvm.hexagon.V6.vscattermhwq.128B" => "__builtin_HEXAGON_V6_vscattermhwq_128B",
-    "llvm.hexagon.V6.vscattermw" => "__builtin_HEXAGON_V6_vscattermw",
-    "llvm.hexagon.V6.vscattermw.128B" => "__builtin_HEXAGON_V6_vscattermw_128B",
-    "llvm.hexagon.V6.vscattermw.add" => "__builtin_HEXAGON_V6_vscattermw_add",
-    "llvm.hexagon.V6.vscattermw.add.128B" => "__builtin_HEXAGON_V6_vscattermw_add_128B",
-    "llvm.hexagon.V6.vscattermwq" => "__builtin_HEXAGON_V6_vscattermwq",
-    "llvm.hexagon.V6.vscattermwq.128B" => "__builtin_HEXAGON_V6_vscattermwq_128B",
-    "llvm.hexagon.V6.vsh" => "__builtin_HEXAGON_V6_vsh",
-    "llvm.hexagon.V6.vsh.128B" => "__builtin_HEXAGON_V6_vsh_128B",
-    "llvm.hexagon.V6.vshufeh" => "__builtin_HEXAGON_V6_vshufeh",
-    "llvm.hexagon.V6.vshufeh.128B" => "__builtin_HEXAGON_V6_vshufeh_128B",
-    "llvm.hexagon.V6.vshuffb" => "__builtin_HEXAGON_V6_vshuffb",
-    "llvm.hexagon.V6.vshuffb.128B" => "__builtin_HEXAGON_V6_vshuffb_128B",
-    "llvm.hexagon.V6.vshuffeb" => "__builtin_HEXAGON_V6_vshuffeb",
-    "llvm.hexagon.V6.vshuffeb.128B" => "__builtin_HEXAGON_V6_vshuffeb_128B",
-    "llvm.hexagon.V6.vshuffh" => "__builtin_HEXAGON_V6_vshuffh",
-    "llvm.hexagon.V6.vshuffh.128B" => "__builtin_HEXAGON_V6_vshuffh_128B",
-    "llvm.hexagon.V6.vshuffob" => "__builtin_HEXAGON_V6_vshuffob",
-    "llvm.hexagon.V6.vshuffob.128B" => "__builtin_HEXAGON_V6_vshuffob_128B",
-    "llvm.hexagon.V6.vshuffvdd" => "__builtin_HEXAGON_V6_vshuffvdd",
-    "llvm.hexagon.V6.vshuffvdd.128B" => "__builtin_HEXAGON_V6_vshuffvdd_128B",
-    "llvm.hexagon.V6.vshufoeb" => "__builtin_HEXAGON_V6_vshufoeb",
-    "llvm.hexagon.V6.vshufoeb.128B" => "__builtin_HEXAGON_V6_vshufoeb_128B",
-    "llvm.hexagon.V6.vshufoeh" => "__builtin_HEXAGON_V6_vshufoeh",
-    "llvm.hexagon.V6.vshufoeh.128B" => "__builtin_HEXAGON_V6_vshufoeh_128B",
-    "llvm.hexagon.V6.vshufoh" => "__builtin_HEXAGON_V6_vshufoh",
-    "llvm.hexagon.V6.vshufoh.128B" => "__builtin_HEXAGON_V6_vshufoh_128B",
-    "llvm.hexagon.V6.vsub.hf" => "__builtin_HEXAGON_V6_vsub_hf",
-    "llvm.hexagon.V6.vsub.hf.128B" => "__builtin_HEXAGON_V6_vsub_hf_128B",
-    "llvm.hexagon.V6.vsub.hf.f8" => "__builtin_HEXAGON_V6_vsub_hf_f8",
-    "llvm.hexagon.V6.vsub.hf.f8.128B" => "__builtin_HEXAGON_V6_vsub_hf_f8_128B",
-    "llvm.hexagon.V6.vsub.hf.hf" => "__builtin_HEXAGON_V6_vsub_hf_hf",
-    "llvm.hexagon.V6.vsub.hf.hf.128B" => "__builtin_HEXAGON_V6_vsub_hf_hf_128B",
-    "llvm.hexagon.V6.vsub.qf16" => "__builtin_HEXAGON_V6_vsub_qf16",
-    "llvm.hexagon.V6.vsub.qf16.128B" => "__builtin_HEXAGON_V6_vsub_qf16_128B",
-    "llvm.hexagon.V6.vsub.qf16.mix" => "__builtin_HEXAGON_V6_vsub_qf16_mix",
-    "llvm.hexagon.V6.vsub.qf16.mix.128B" => "__builtin_HEXAGON_V6_vsub_qf16_mix_128B",
-    "llvm.hexagon.V6.vsub.qf32" => "__builtin_HEXAGON_V6_vsub_qf32",
-    "llvm.hexagon.V6.vsub.qf32.128B" => "__builtin_HEXAGON_V6_vsub_qf32_128B",
-    "llvm.hexagon.V6.vsub.qf32.mix" => "__builtin_HEXAGON_V6_vsub_qf32_mix",
-    "llvm.hexagon.V6.vsub.qf32.mix.128B" => "__builtin_HEXAGON_V6_vsub_qf32_mix_128B",
-    "llvm.hexagon.V6.vsub.sf" => "__builtin_HEXAGON_V6_vsub_sf",
-    "llvm.hexagon.V6.vsub.sf.128B" => "__builtin_HEXAGON_V6_vsub_sf_128B",
-    "llvm.hexagon.V6.vsub.sf.bf" => "__builtin_HEXAGON_V6_vsub_sf_bf",
-    "llvm.hexagon.V6.vsub.sf.bf.128B" => "__builtin_HEXAGON_V6_vsub_sf_bf_128B",
-    "llvm.hexagon.V6.vsub.sf.hf" => "__builtin_HEXAGON_V6_vsub_sf_hf",
-    "llvm.hexagon.V6.vsub.sf.hf.128B" => "__builtin_HEXAGON_V6_vsub_sf_hf_128B",
-    "llvm.hexagon.V6.vsub.sf.sf" => "__builtin_HEXAGON_V6_vsub_sf_sf",
-    "llvm.hexagon.V6.vsub.sf.sf.128B" => "__builtin_HEXAGON_V6_vsub_sf_sf_128B",
-    "llvm.hexagon.V6.vsubb" => "__builtin_HEXAGON_V6_vsubb",
-    "llvm.hexagon.V6.vsubb.128B" => "__builtin_HEXAGON_V6_vsubb_128B",
-    "llvm.hexagon.V6.vsubb.dv" => "__builtin_HEXAGON_V6_vsubb_dv",
-    "llvm.hexagon.V6.vsubb.dv.128B" => "__builtin_HEXAGON_V6_vsubb_dv_128B",
-    "llvm.hexagon.V6.vsubbnq" => "__builtin_HEXAGON_V6_vsubbnq",
-    "llvm.hexagon.V6.vsubbnq.128B" => "__builtin_HEXAGON_V6_vsubbnq_128B",
-    "llvm.hexagon.V6.vsubbq" => "__builtin_HEXAGON_V6_vsubbq",
-    "llvm.hexagon.V6.vsubbq.128B" => "__builtin_HEXAGON_V6_vsubbq_128B",
-    "llvm.hexagon.V6.vsubbsat" => "__builtin_HEXAGON_V6_vsubbsat",
-    "llvm.hexagon.V6.vsubbsat.128B" => "__builtin_HEXAGON_V6_vsubbsat_128B",
-    "llvm.hexagon.V6.vsubbsat.dv" => "__builtin_HEXAGON_V6_vsubbsat_dv",
-    "llvm.hexagon.V6.vsubbsat.dv.128B" => "__builtin_HEXAGON_V6_vsubbsat_dv_128B",
-    "llvm.hexagon.V6.vsubh" => "__builtin_HEXAGON_V6_vsubh",
-    "llvm.hexagon.V6.vsubh.128B" => "__builtin_HEXAGON_V6_vsubh_128B",
-    "llvm.hexagon.V6.vsubh.dv" => "__builtin_HEXAGON_V6_vsubh_dv",
-    "llvm.hexagon.V6.vsubh.dv.128B" => "__builtin_HEXAGON_V6_vsubh_dv_128B",
-    "llvm.hexagon.V6.vsubhnq" => "__builtin_HEXAGON_V6_vsubhnq",
-    "llvm.hexagon.V6.vsubhnq.128B" => "__builtin_HEXAGON_V6_vsubhnq_128B",
-    "llvm.hexagon.V6.vsubhq" => "__builtin_HEXAGON_V6_vsubhq",
-    "llvm.hexagon.V6.vsubhq.128B" => "__builtin_HEXAGON_V6_vsubhq_128B",
-    "llvm.hexagon.V6.vsubhsat" => "__builtin_HEXAGON_V6_vsubhsat",
-    "llvm.hexagon.V6.vsubhsat.128B" => "__builtin_HEXAGON_V6_vsubhsat_128B",
-    "llvm.hexagon.V6.vsubhsat.dv" => "__builtin_HEXAGON_V6_vsubhsat_dv",
-    "llvm.hexagon.V6.vsubhsat.dv.128B" => "__builtin_HEXAGON_V6_vsubhsat_dv_128B",
-    "llvm.hexagon.V6.vsubhw" => "__builtin_HEXAGON_V6_vsubhw",
-    "llvm.hexagon.V6.vsubhw.128B" => "__builtin_HEXAGON_V6_vsubhw_128B",
-    "llvm.hexagon.V6.vsububh" => "__builtin_HEXAGON_V6_vsububh",
-    "llvm.hexagon.V6.vsububh.128B" => "__builtin_HEXAGON_V6_vsububh_128B",
-    "llvm.hexagon.V6.vsububsat" => "__builtin_HEXAGON_V6_vsububsat",
-    "llvm.hexagon.V6.vsububsat.128B" => "__builtin_HEXAGON_V6_vsububsat_128B",
-    "llvm.hexagon.V6.vsububsat.dv" => "__builtin_HEXAGON_V6_vsububsat_dv",
-    "llvm.hexagon.V6.vsububsat.dv.128B" => "__builtin_HEXAGON_V6_vsububsat_dv_128B",
-    "llvm.hexagon.V6.vsubububb.sat" => "__builtin_HEXAGON_V6_vsubububb_sat",
-    "llvm.hexagon.V6.vsubububb.sat.128B" => "__builtin_HEXAGON_V6_vsubububb_sat_128B",
-    "llvm.hexagon.V6.vsubuhsat" => "__builtin_HEXAGON_V6_vsubuhsat",
-    "llvm.hexagon.V6.vsubuhsat.128B" => "__builtin_HEXAGON_V6_vsubuhsat_128B",
-    "llvm.hexagon.V6.vsubuhsat.dv" => "__builtin_HEXAGON_V6_vsubuhsat_dv",
-    "llvm.hexagon.V6.vsubuhsat.dv.128B" => "__builtin_HEXAGON_V6_vsubuhsat_dv_128B",
-    "llvm.hexagon.V6.vsubuhw" => "__builtin_HEXAGON_V6_vsubuhw",
-    "llvm.hexagon.V6.vsubuhw.128B" => "__builtin_HEXAGON_V6_vsubuhw_128B",
-    "llvm.hexagon.V6.vsubuwsat" => "__builtin_HEXAGON_V6_vsubuwsat",
-    "llvm.hexagon.V6.vsubuwsat.128B" => "__builtin_HEXAGON_V6_vsubuwsat_128B",
-    "llvm.hexagon.V6.vsubuwsat.dv" => "__builtin_HEXAGON_V6_vsubuwsat_dv",
-    "llvm.hexagon.V6.vsubuwsat.dv.128B" => "__builtin_HEXAGON_V6_vsubuwsat_dv_128B",
-    "llvm.hexagon.V6.vsubw" => "__builtin_HEXAGON_V6_vsubw",
-    "llvm.hexagon.V6.vsubw.128B" => "__builtin_HEXAGON_V6_vsubw_128B",
-    "llvm.hexagon.V6.vsubw.dv" => "__builtin_HEXAGON_V6_vsubw_dv",
-    "llvm.hexagon.V6.vsubw.dv.128B" => "__builtin_HEXAGON_V6_vsubw_dv_128B",
-    "llvm.hexagon.V6.vsubwnq" => "__builtin_HEXAGON_V6_vsubwnq",
-    "llvm.hexagon.V6.vsubwnq.128B" => "__builtin_HEXAGON_V6_vsubwnq_128B",
-    "llvm.hexagon.V6.vsubwq" => "__builtin_HEXAGON_V6_vsubwq",
-    "llvm.hexagon.V6.vsubwq.128B" => "__builtin_HEXAGON_V6_vsubwq_128B",
-    "llvm.hexagon.V6.vsubwsat" => "__builtin_HEXAGON_V6_vsubwsat",
-    "llvm.hexagon.V6.vsubwsat.128B" => "__builtin_HEXAGON_V6_vsubwsat_128B",
-    "llvm.hexagon.V6.vsubwsat.dv" => "__builtin_HEXAGON_V6_vsubwsat_dv",
-    "llvm.hexagon.V6.vsubwsat.dv.128B" => "__builtin_HEXAGON_V6_vsubwsat_dv_128B",
-    "llvm.hexagon.V6.vswap" => "__builtin_HEXAGON_V6_vswap",
-    "llvm.hexagon.V6.vswap.128B" => "__builtin_HEXAGON_V6_vswap_128B",
-    "llvm.hexagon.V6.vtmpyb" => "__builtin_HEXAGON_V6_vtmpyb",
-    "llvm.hexagon.V6.vtmpyb.128B" => "__builtin_HEXAGON_V6_vtmpyb_128B",
-    "llvm.hexagon.V6.vtmpyb.acc" => "__builtin_HEXAGON_V6_vtmpyb_acc",
-    "llvm.hexagon.V6.vtmpyb.acc.128B" => "__builtin_HEXAGON_V6_vtmpyb_acc_128B",
-    "llvm.hexagon.V6.vtmpybus" => "__builtin_HEXAGON_V6_vtmpybus",
-    "llvm.hexagon.V6.vtmpybus.128B" => "__builtin_HEXAGON_V6_vtmpybus_128B",
-    "llvm.hexagon.V6.vtmpybus.acc" => "__builtin_HEXAGON_V6_vtmpybus_acc",
-    "llvm.hexagon.V6.vtmpybus.acc.128B" => "__builtin_HEXAGON_V6_vtmpybus_acc_128B",
-    "llvm.hexagon.V6.vtmpyhb" => "__builtin_HEXAGON_V6_vtmpyhb",
-    "llvm.hexagon.V6.vtmpyhb.128B" => "__builtin_HEXAGON_V6_vtmpyhb_128B",
-    "llvm.hexagon.V6.vtmpyhb.acc" => "__builtin_HEXAGON_V6_vtmpyhb_acc",
-    "llvm.hexagon.V6.vtmpyhb.acc.128B" => "__builtin_HEXAGON_V6_vtmpyhb_acc_128B",
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-    "llvm.hexagon.V6.vunpackb.128B" => "__builtin_HEXAGON_V6_vunpackb_128B",
-    "llvm.hexagon.V6.vunpackh" => "__builtin_HEXAGON_V6_vunpackh",
-    "llvm.hexagon.V6.vunpackh.128B" => "__builtin_HEXAGON_V6_vunpackh_128B",
-    "llvm.hexagon.V6.vunpackob" => "__builtin_HEXAGON_V6_vunpackob",
-    "llvm.hexagon.V6.vunpackob.128B" => "__builtin_HEXAGON_V6_vunpackob_128B",
-    "llvm.hexagon.V6.vunpackoh" => "__builtin_HEXAGON_V6_vunpackoh",
-    "llvm.hexagon.V6.vunpackoh.128B" => "__builtin_HEXAGON_V6_vunpackoh_128B",
-    "llvm.hexagon.V6.vunpackub" => "__builtin_HEXAGON_V6_vunpackub",
-    "llvm.hexagon.V6.vunpackub.128B" => "__builtin_HEXAGON_V6_vunpackub_128B",
-    "llvm.hexagon.V6.vunpackuh" => "__builtin_HEXAGON_V6_vunpackuh",
-    "llvm.hexagon.V6.vunpackuh.128B" => "__builtin_HEXAGON_V6_vunpackuh_128B",
-    "llvm.hexagon.V6.vxor" => "__builtin_HEXAGON_V6_vxor",
-    "llvm.hexagon.V6.vxor.128B" => "__builtin_HEXAGON_V6_vxor_128B",
-    "llvm.hexagon.V6.vzb" => "__builtin_HEXAGON_V6_vzb",
-    "llvm.hexagon.V6.vzb.128B" => "__builtin_HEXAGON_V6_vzb_128B",
-    "llvm.hexagon.V6.vzh" => "__builtin_HEXAGON_V6_vzh",
-    "llvm.hexagon.V6.vzh.128B" => "__builtin_HEXAGON_V6_vzh_128B",
-    "llvm.hexagon.Y2.dccleana" => "__builtin_HEXAGON_Y2_dccleana",
-    "llvm.hexagon.Y2.dccleaninva" => "__builtin_HEXAGON_Y2_dccleaninva",
-    "llvm.hexagon.Y2.dcfetch" => "__builtin_HEXAGON_Y2_dcfetch",
-    "llvm.hexagon.Y2.dcinva" => "__builtin_HEXAGON_Y2_dcinva",
-    "llvm.hexagon.Y2.dczeroa" => "__builtin_HEXAGON_Y2_dczeroa",
-    "llvm.hexagon.Y4.l2fetch" => "__builtin_HEXAGON_Y4_l2fetch",
-    "llvm.hexagon.Y5.l2fetch" => "__builtin_HEXAGON_Y5_l2fetch",
-    "llvm.hexagon.Y6.dmlink" => "__builtin_HEXAGON_Y6_dmlink",
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-    "llvm.hexagon.Y6.dmpoll" => "__builtin_HEXAGON_Y6_dmpoll",
-    "llvm.hexagon.Y6.dmresume" => "__builtin_HEXAGON_Y6_dmresume",
-    "llvm.hexagon.Y6.dmstart" => "__builtin_HEXAGON_Y6_dmstart",
-    "llvm.hexagon.Y6.dmwait" => "__builtin_HEXAGON_Y6_dmwait",
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-    "llvm.hexagon.brev.ldh" => "__builtin_brev_ldh",
-    "llvm.hexagon.brev.ldub" => "__builtin_brev_ldub",
-    "llvm.hexagon.brev.lduh" => "__builtin_brev_lduh",
-    "llvm.hexagon.brev.ldw" => "__builtin_brev_ldw",
-    "llvm.hexagon.brev.stb" => "__builtin_brev_stb",
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-    "llvm.hexagon.brev.sth" => "__builtin_brev_sth",
-    "llvm.hexagon.brev.sthhi" => "__builtin_brev_sthhi",
-    "llvm.hexagon.brev.stw" => "__builtin_brev_stw",
-    "llvm.hexagon.circ.ldb" => "__builtin_circ_ldb",
-    "llvm.hexagon.circ.ldd" => "__builtin_circ_ldd",
-    "llvm.hexagon.circ.ldh" => "__builtin_circ_ldh",
-    "llvm.hexagon.circ.ldub" => "__builtin_circ_ldub",
-    "llvm.hexagon.circ.lduh" => "__builtin_circ_lduh",
-    "llvm.hexagon.circ.ldw" => "__builtin_circ_ldw",
-    "llvm.hexagon.circ.stb" => "__builtin_circ_stb",
-    "llvm.hexagon.circ.std" => "__builtin_circ_std",
-    "llvm.hexagon.circ.sth" => "__builtin_circ_sth",
-    "llvm.hexagon.circ.sthhi" => "__builtin_circ_sthhi",
-    "llvm.hexagon.circ.stw" => "__builtin_circ_stw",
-    "llvm.hexagon.mm256i.vaddw" => "__builtin__mm256i_vaddw",
-    "llvm.hexagon.prefetch" => "__builtin_HEXAGON_prefetch",
-    "llvm.hexagon.vmemcpy" => "__builtin_hexagon_vmemcpy",
-    "llvm.hexagon.vmemset" => "__builtin_hexagon_vmemset",
-    // loongarch
-    "llvm.loongarch.asrtgt.d" => "__builtin_loongarch_asrtgt_d",
-    "llvm.loongarch.asrtle.d" => "__builtin_loongarch_asrtle_d",
-    "llvm.loongarch.break" => "__builtin_loongarch_break",
-    "llvm.loongarch.cacop.d" => "__builtin_loongarch_cacop_d",
-    "llvm.loongarch.cacop.w" => "__builtin_loongarch_cacop_w",
-    "llvm.loongarch.cpucfg" => "__builtin_loongarch_cpucfg",
-    "llvm.loongarch.crc.w.b.w" => "__builtin_loongarch_crc_w_b_w",
-    "llvm.loongarch.crc.w.d.w" => "__builtin_loongarch_crc_w_d_w",
-    "llvm.loongarch.crc.w.h.w" => "__builtin_loongarch_crc_w_h_w",
-    "llvm.loongarch.crc.w.w.w" => "__builtin_loongarch_crc_w_w_w",
-    "llvm.loongarch.crcc.w.b.w" => "__builtin_loongarch_crcc_w_b_w",
-    "llvm.loongarch.crcc.w.d.w" => "__builtin_loongarch_crcc_w_d_w",
-    "llvm.loongarch.crcc.w.h.w" => "__builtin_loongarch_crcc_w_h_w",
-    "llvm.loongarch.crcc.w.w.w" => "__builtin_loongarch_crcc_w_w_w",
-    "llvm.loongarch.csrrd.d" => "__builtin_loongarch_csrrd_d",
-    "llvm.loongarch.csrrd.w" => "__builtin_loongarch_csrrd_w",
-    "llvm.loongarch.csrwr.d" => "__builtin_loongarch_csrwr_d",
-    "llvm.loongarch.csrwr.w" => "__builtin_loongarch_csrwr_w",
-    "llvm.loongarch.csrxchg.d" => "__builtin_loongarch_csrxchg_d",
-    "llvm.loongarch.csrxchg.w" => "__builtin_loongarch_csrxchg_w",
-    "llvm.loongarch.dbar" => "__builtin_loongarch_dbar",
-    "llvm.loongarch.frecipe.d" => "__builtin_loongarch_frecipe_d",
-    "llvm.loongarch.frecipe.s" => "__builtin_loongarch_frecipe_s",
-    "llvm.loongarch.frsqrte.d" => "__builtin_loongarch_frsqrte_d",
-    "llvm.loongarch.frsqrte.s" => "__builtin_loongarch_frsqrte_s",
-    "llvm.loongarch.ibar" => "__builtin_loongarch_ibar",
-    "llvm.loongarch.iocsrrd.b" => "__builtin_loongarch_iocsrrd_b",
-    "llvm.loongarch.iocsrrd.d" => "__builtin_loongarch_iocsrrd_d",
-    "llvm.loongarch.iocsrrd.h" => "__builtin_loongarch_iocsrrd_h",
-    "llvm.loongarch.iocsrrd.w" => "__builtin_loongarch_iocsrrd_w",
-    "llvm.loongarch.iocsrwr.b" => "__builtin_loongarch_iocsrwr_b",
-    "llvm.loongarch.iocsrwr.d" => "__builtin_loongarch_iocsrwr_d",
-    "llvm.loongarch.iocsrwr.h" => "__builtin_loongarch_iocsrwr_h",
-    "llvm.loongarch.iocsrwr.w" => "__builtin_loongarch_iocsrwr_w",
-    "llvm.loongarch.lasx.vext2xv.d.b" => "__builtin_lasx_vext2xv_d_b",
-    "llvm.loongarch.lasx.vext2xv.d.h" => "__builtin_lasx_vext2xv_d_h",
-    "llvm.loongarch.lasx.vext2xv.d.w" => "__builtin_lasx_vext2xv_d_w",
-    "llvm.loongarch.lasx.vext2xv.du.bu" => "__builtin_lasx_vext2xv_du_bu",
-    "llvm.loongarch.lasx.vext2xv.du.hu" => "__builtin_lasx_vext2xv_du_hu",
-    "llvm.loongarch.lasx.vext2xv.du.wu" => "__builtin_lasx_vext2xv_du_wu",
-    "llvm.loongarch.lasx.vext2xv.h.b" => "__builtin_lasx_vext2xv_h_b",
-    "llvm.loongarch.lasx.vext2xv.hu.bu" => "__builtin_lasx_vext2xv_hu_bu",
-    "llvm.loongarch.lasx.vext2xv.w.b" => "__builtin_lasx_vext2xv_w_b",
-    "llvm.loongarch.lasx.vext2xv.w.h" => "__builtin_lasx_vext2xv_w_h",
-    "llvm.loongarch.lasx.vext2xv.wu.bu" => "__builtin_lasx_vext2xv_wu_bu",
-    "llvm.loongarch.lasx.vext2xv.wu.hu" => "__builtin_lasx_vext2xv_wu_hu",
-    "llvm.loongarch.lasx.xbnz.b" => "__builtin_lasx_xbnz_b",
-    "llvm.loongarch.lasx.xbnz.d" => "__builtin_lasx_xbnz_d",
-    "llvm.loongarch.lasx.xbnz.h" => "__builtin_lasx_xbnz_h",
-    "llvm.loongarch.lasx.xbnz.v" => "__builtin_lasx_xbnz_v",
-    "llvm.loongarch.lasx.xbnz.w" => "__builtin_lasx_xbnz_w",
-    "llvm.loongarch.lasx.xbz.b" => "__builtin_lasx_xbz_b",
-    "llvm.loongarch.lasx.xbz.d" => "__builtin_lasx_xbz_d",
-    "llvm.loongarch.lasx.xbz.h" => "__builtin_lasx_xbz_h",
-    "llvm.loongarch.lasx.xbz.v" => "__builtin_lasx_xbz_v",
-    "llvm.loongarch.lasx.xbz.w" => "__builtin_lasx_xbz_w",
-    "llvm.loongarch.lasx.xvabsd.b" => "__builtin_lasx_xvabsd_b",
-    "llvm.loongarch.lasx.xvabsd.bu" => "__builtin_lasx_xvabsd_bu",
-    "llvm.loongarch.lasx.xvabsd.d" => "__builtin_lasx_xvabsd_d",
-    "llvm.loongarch.lasx.xvabsd.du" => "__builtin_lasx_xvabsd_du",
-    "llvm.loongarch.lasx.xvabsd.h" => "__builtin_lasx_xvabsd_h",
-    "llvm.loongarch.lasx.xvabsd.hu" => "__builtin_lasx_xvabsd_hu",
-    "llvm.loongarch.lasx.xvabsd.w" => "__builtin_lasx_xvabsd_w",
-    "llvm.loongarch.lasx.xvabsd.wu" => "__builtin_lasx_xvabsd_wu",
-    "llvm.loongarch.lasx.xvadd.b" => "__builtin_lasx_xvadd_b",
-    "llvm.loongarch.lasx.xvadd.d" => "__builtin_lasx_xvadd_d",
-    "llvm.loongarch.lasx.xvadd.h" => "__builtin_lasx_xvadd_h",
-    "llvm.loongarch.lasx.xvadd.q" => "__builtin_lasx_xvadd_q",
-    "llvm.loongarch.lasx.xvadd.w" => "__builtin_lasx_xvadd_w",
-    "llvm.loongarch.lasx.xvadda.b" => "__builtin_lasx_xvadda_b",
-    "llvm.loongarch.lasx.xvadda.d" => "__builtin_lasx_xvadda_d",
-    "llvm.loongarch.lasx.xvadda.h" => "__builtin_lasx_xvadda_h",
-    "llvm.loongarch.lasx.xvadda.w" => "__builtin_lasx_xvadda_w",
-    "llvm.loongarch.lasx.xvaddi.bu" => "__builtin_lasx_xvaddi_bu",
-    "llvm.loongarch.lasx.xvaddi.du" => "__builtin_lasx_xvaddi_du",
-    "llvm.loongarch.lasx.xvaddi.hu" => "__builtin_lasx_xvaddi_hu",
-    "llvm.loongarch.lasx.xvaddi.wu" => "__builtin_lasx_xvaddi_wu",
-    "llvm.loongarch.lasx.xvaddwev.d.w" => "__builtin_lasx_xvaddwev_d_w",
-    "llvm.loongarch.lasx.xvaddwev.d.wu" => "__builtin_lasx_xvaddwev_d_wu",
-    "llvm.loongarch.lasx.xvaddwev.d.wu.w" => "__builtin_lasx_xvaddwev_d_wu_w",
-    "llvm.loongarch.lasx.xvaddwev.h.b" => "__builtin_lasx_xvaddwev_h_b",
-    "llvm.loongarch.lasx.xvaddwev.h.bu" => "__builtin_lasx_xvaddwev_h_bu",
-    "llvm.loongarch.lasx.xvaddwev.h.bu.b" => "__builtin_lasx_xvaddwev_h_bu_b",
-    "llvm.loongarch.lasx.xvaddwev.q.d" => "__builtin_lasx_xvaddwev_q_d",
-    "llvm.loongarch.lasx.xvaddwev.q.du" => "__builtin_lasx_xvaddwev_q_du",
-    "llvm.loongarch.lasx.xvaddwev.q.du.d" => "__builtin_lasx_xvaddwev_q_du_d",
-    "llvm.loongarch.lasx.xvaddwev.w.h" => "__builtin_lasx_xvaddwev_w_h",
-    "llvm.loongarch.lasx.xvaddwev.w.hu" => "__builtin_lasx_xvaddwev_w_hu",
-    "llvm.loongarch.lasx.xvaddwev.w.hu.h" => "__builtin_lasx_xvaddwev_w_hu_h",
-    "llvm.loongarch.lasx.xvaddwod.d.w" => "__builtin_lasx_xvaddwod_d_w",
-    "llvm.loongarch.lasx.xvaddwod.d.wu" => "__builtin_lasx_xvaddwod_d_wu",
-    "llvm.loongarch.lasx.xvaddwod.d.wu.w" => "__builtin_lasx_xvaddwod_d_wu_w",
-    "llvm.loongarch.lasx.xvaddwod.h.b" => "__builtin_lasx_xvaddwod_h_b",
-    "llvm.loongarch.lasx.xvaddwod.h.bu" => "__builtin_lasx_xvaddwod_h_bu",
-    "llvm.loongarch.lasx.xvaddwod.h.bu.b" => "__builtin_lasx_xvaddwod_h_bu_b",
-    "llvm.loongarch.lasx.xvaddwod.q.d" => "__builtin_lasx_xvaddwod_q_d",
-    "llvm.loongarch.lasx.xvaddwod.q.du" => "__builtin_lasx_xvaddwod_q_du",
-    "llvm.loongarch.lasx.xvaddwod.q.du.d" => "__builtin_lasx_xvaddwod_q_du_d",
-    "llvm.loongarch.lasx.xvaddwod.w.h" => "__builtin_lasx_xvaddwod_w_h",
-    "llvm.loongarch.lasx.xvaddwod.w.hu" => "__builtin_lasx_xvaddwod_w_hu",
-    "llvm.loongarch.lasx.xvaddwod.w.hu.h" => "__builtin_lasx_xvaddwod_w_hu_h",
-    "llvm.loongarch.lasx.xvand.v" => "__builtin_lasx_xvand_v",
-    "llvm.loongarch.lasx.xvandi.b" => "__builtin_lasx_xvandi_b",
-    "llvm.loongarch.lasx.xvandn.v" => "__builtin_lasx_xvandn_v",
-    "llvm.loongarch.lasx.xvavg.b" => "__builtin_lasx_xvavg_b",
-    "llvm.loongarch.lasx.xvavg.bu" => "__builtin_lasx_xvavg_bu",
-    "llvm.loongarch.lasx.xvavg.d" => "__builtin_lasx_xvavg_d",
-    "llvm.loongarch.lasx.xvavg.du" => "__builtin_lasx_xvavg_du",
-    "llvm.loongarch.lasx.xvavg.h" => "__builtin_lasx_xvavg_h",
-    "llvm.loongarch.lasx.xvavg.hu" => "__builtin_lasx_xvavg_hu",
-    "llvm.loongarch.lasx.xvavg.w" => "__builtin_lasx_xvavg_w",
-    "llvm.loongarch.lasx.xvavg.wu" => "__builtin_lasx_xvavg_wu",
-    "llvm.loongarch.lasx.xvavgr.b" => "__builtin_lasx_xvavgr_b",
-    "llvm.loongarch.lasx.xvavgr.bu" => "__builtin_lasx_xvavgr_bu",
-    "llvm.loongarch.lasx.xvavgr.d" => "__builtin_lasx_xvavgr_d",
-    "llvm.loongarch.lasx.xvavgr.du" => "__builtin_lasx_xvavgr_du",
-    "llvm.loongarch.lasx.xvavgr.h" => "__builtin_lasx_xvavgr_h",
-    "llvm.loongarch.lasx.xvavgr.hu" => "__builtin_lasx_xvavgr_hu",
-    "llvm.loongarch.lasx.xvavgr.w" => "__builtin_lasx_xvavgr_w",
-    "llvm.loongarch.lasx.xvavgr.wu" => "__builtin_lasx_xvavgr_wu",
-    "llvm.loongarch.lasx.xvbitclr.b" => "__builtin_lasx_xvbitclr_b",
-    "llvm.loongarch.lasx.xvbitclr.d" => "__builtin_lasx_xvbitclr_d",
-    "llvm.loongarch.lasx.xvbitclr.h" => "__builtin_lasx_xvbitclr_h",
-    "llvm.loongarch.lasx.xvbitclr.w" => "__builtin_lasx_xvbitclr_w",
-    "llvm.loongarch.lasx.xvbitclri.b" => "__builtin_lasx_xvbitclri_b",
-    "llvm.loongarch.lasx.xvbitclri.d" => "__builtin_lasx_xvbitclri_d",
-    "llvm.loongarch.lasx.xvbitclri.h" => "__builtin_lasx_xvbitclri_h",
-    "llvm.loongarch.lasx.xvbitclri.w" => "__builtin_lasx_xvbitclri_w",
-    "llvm.loongarch.lasx.xvbitrev.b" => "__builtin_lasx_xvbitrev_b",
-    "llvm.loongarch.lasx.xvbitrev.d" => "__builtin_lasx_xvbitrev_d",
-    "llvm.loongarch.lasx.xvbitrev.h" => "__builtin_lasx_xvbitrev_h",
-    "llvm.loongarch.lasx.xvbitrev.w" => "__builtin_lasx_xvbitrev_w",
-    "llvm.loongarch.lasx.xvbitrevi.b" => "__builtin_lasx_xvbitrevi_b",
-    "llvm.loongarch.lasx.xvbitrevi.d" => "__builtin_lasx_xvbitrevi_d",
-    "llvm.loongarch.lasx.xvbitrevi.h" => "__builtin_lasx_xvbitrevi_h",
-    "llvm.loongarch.lasx.xvbitrevi.w" => "__builtin_lasx_xvbitrevi_w",
-    "llvm.loongarch.lasx.xvbitsel.v" => "__builtin_lasx_xvbitsel_v",
-    "llvm.loongarch.lasx.xvbitseli.b" => "__builtin_lasx_xvbitseli_b",
-    "llvm.loongarch.lasx.xvbitset.b" => "__builtin_lasx_xvbitset_b",
-    "llvm.loongarch.lasx.xvbitset.d" => "__builtin_lasx_xvbitset_d",
-    "llvm.loongarch.lasx.xvbitset.h" => "__builtin_lasx_xvbitset_h",
-    "llvm.loongarch.lasx.xvbitset.w" => "__builtin_lasx_xvbitset_w",
-    "llvm.loongarch.lasx.xvbitseti.b" => "__builtin_lasx_xvbitseti_b",
-    "llvm.loongarch.lasx.xvbitseti.d" => "__builtin_lasx_xvbitseti_d",
-    "llvm.loongarch.lasx.xvbitseti.h" => "__builtin_lasx_xvbitseti_h",
-    "llvm.loongarch.lasx.xvbitseti.w" => "__builtin_lasx_xvbitseti_w",
-    "llvm.loongarch.lasx.xvbsll.v" => "__builtin_lasx_xvbsll_v",
-    "llvm.loongarch.lasx.xvbsrl.v" => "__builtin_lasx_xvbsrl_v",
-    "llvm.loongarch.lasx.xvclo.b" => "__builtin_lasx_xvclo_b",
-    "llvm.loongarch.lasx.xvclo.d" => "__builtin_lasx_xvclo_d",
-    "llvm.loongarch.lasx.xvclo.h" => "__builtin_lasx_xvclo_h",
-    "llvm.loongarch.lasx.xvclo.w" => "__builtin_lasx_xvclo_w",
-    "llvm.loongarch.lasx.xvclz.b" => "__builtin_lasx_xvclz_b",
-    "llvm.loongarch.lasx.xvclz.d" => "__builtin_lasx_xvclz_d",
-    "llvm.loongarch.lasx.xvclz.h" => "__builtin_lasx_xvclz_h",
-    "llvm.loongarch.lasx.xvclz.w" => "__builtin_lasx_xvclz_w",
-    "llvm.loongarch.lasx.xvdiv.b" => "__builtin_lasx_xvdiv_b",
-    "llvm.loongarch.lasx.xvdiv.bu" => "__builtin_lasx_xvdiv_bu",
-    "llvm.loongarch.lasx.xvdiv.d" => "__builtin_lasx_xvdiv_d",
-    "llvm.loongarch.lasx.xvdiv.du" => "__builtin_lasx_xvdiv_du",
-    "llvm.loongarch.lasx.xvdiv.h" => "__builtin_lasx_xvdiv_h",
-    "llvm.loongarch.lasx.xvdiv.hu" => "__builtin_lasx_xvdiv_hu",
-    "llvm.loongarch.lasx.xvdiv.w" => "__builtin_lasx_xvdiv_w",
-    "llvm.loongarch.lasx.xvdiv.wu" => "__builtin_lasx_xvdiv_wu",
-    "llvm.loongarch.lasx.xvexth.d.w" => "__builtin_lasx_xvexth_d_w",
-    "llvm.loongarch.lasx.xvexth.du.wu" => "__builtin_lasx_xvexth_du_wu",
-    "llvm.loongarch.lasx.xvexth.h.b" => "__builtin_lasx_xvexth_h_b",
-    "llvm.loongarch.lasx.xvexth.hu.bu" => "__builtin_lasx_xvexth_hu_bu",
-    "llvm.loongarch.lasx.xvexth.q.d" => "__builtin_lasx_xvexth_q_d",
-    "llvm.loongarch.lasx.xvexth.qu.du" => "__builtin_lasx_xvexth_qu_du",
-    "llvm.loongarch.lasx.xvexth.w.h" => "__builtin_lasx_xvexth_w_h",
-    "llvm.loongarch.lasx.xvexth.wu.hu" => "__builtin_lasx_xvexth_wu_hu",
-    "llvm.loongarch.lasx.xvextl.q.d" => "__builtin_lasx_xvextl_q_d",
-    "llvm.loongarch.lasx.xvextl.qu.du" => "__builtin_lasx_xvextl_qu_du",
-    "llvm.loongarch.lasx.xvextrins.b" => "__builtin_lasx_xvextrins_b",
-    "llvm.loongarch.lasx.xvextrins.d" => "__builtin_lasx_xvextrins_d",
-    "llvm.loongarch.lasx.xvextrins.h" => "__builtin_lasx_xvextrins_h",
-    "llvm.loongarch.lasx.xvextrins.w" => "__builtin_lasx_xvextrins_w",
-    "llvm.loongarch.lasx.xvfadd.d" => "__builtin_lasx_xvfadd_d",
-    "llvm.loongarch.lasx.xvfadd.s" => "__builtin_lasx_xvfadd_s",
-    "llvm.loongarch.lasx.xvfclass.d" => "__builtin_lasx_xvfclass_d",
-    "llvm.loongarch.lasx.xvfclass.s" => "__builtin_lasx_xvfclass_s",
-    "llvm.loongarch.lasx.xvfcmp.caf.d" => "__builtin_lasx_xvfcmp_caf_d",
-    "llvm.loongarch.lasx.xvfcmp.caf.s" => "__builtin_lasx_xvfcmp_caf_s",
-    "llvm.loongarch.lasx.xvfcmp.ceq.d" => "__builtin_lasx_xvfcmp_ceq_d",
-    "llvm.loongarch.lasx.xvfcmp.ceq.s" => "__builtin_lasx_xvfcmp_ceq_s",
-    "llvm.loongarch.lasx.xvfcmp.cle.d" => "__builtin_lasx_xvfcmp_cle_d",
-    "llvm.loongarch.lasx.xvfcmp.cle.s" => "__builtin_lasx_xvfcmp_cle_s",
-    "llvm.loongarch.lasx.xvfcmp.clt.d" => "__builtin_lasx_xvfcmp_clt_d",
-    "llvm.loongarch.lasx.xvfcmp.clt.s" => "__builtin_lasx_xvfcmp_clt_s",
-    "llvm.loongarch.lasx.xvfcmp.cne.d" => "__builtin_lasx_xvfcmp_cne_d",
-    "llvm.loongarch.lasx.xvfcmp.cne.s" => "__builtin_lasx_xvfcmp_cne_s",
-    "llvm.loongarch.lasx.xvfcmp.cor.d" => "__builtin_lasx_xvfcmp_cor_d",
-    "llvm.loongarch.lasx.xvfcmp.cor.s" => "__builtin_lasx_xvfcmp_cor_s",
-    "llvm.loongarch.lasx.xvfcmp.cueq.d" => "__builtin_lasx_xvfcmp_cueq_d",
-    "llvm.loongarch.lasx.xvfcmp.cueq.s" => "__builtin_lasx_xvfcmp_cueq_s",
-    "llvm.loongarch.lasx.xvfcmp.cule.d" => "__builtin_lasx_xvfcmp_cule_d",
-    "llvm.loongarch.lasx.xvfcmp.cule.s" => "__builtin_lasx_xvfcmp_cule_s",
-    "llvm.loongarch.lasx.xvfcmp.cult.d" => "__builtin_lasx_xvfcmp_cult_d",
-    "llvm.loongarch.lasx.xvfcmp.cult.s" => "__builtin_lasx_xvfcmp_cult_s",
-    "llvm.loongarch.lasx.xvfcmp.cun.d" => "__builtin_lasx_xvfcmp_cun_d",
-    "llvm.loongarch.lasx.xvfcmp.cun.s" => "__builtin_lasx_xvfcmp_cun_s",
-    "llvm.loongarch.lasx.xvfcmp.cune.d" => "__builtin_lasx_xvfcmp_cune_d",
-    "llvm.loongarch.lasx.xvfcmp.cune.s" => "__builtin_lasx_xvfcmp_cune_s",
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-    "llvm.loongarch.lsx.vsat.bu" => "__builtin_lsx_vsat_bu",
-    "llvm.loongarch.lsx.vsat.d" => "__builtin_lsx_vsat_d",
-    "llvm.loongarch.lsx.vsat.du" => "__builtin_lsx_vsat_du",
-    "llvm.loongarch.lsx.vsat.h" => "__builtin_lsx_vsat_h",
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-    "llvm.loongarch.lsx.vseq.h" => "__builtin_lsx_vseq_h",
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-    "llvm.loongarch.lsx.vseqi.w" => "__builtin_lsx_vseqi_w",
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-    "llvm.loongarch.lsx.vsubwev.d.wu" => "__builtin_lsx_vsubwev_d_wu",
-    "llvm.loongarch.lsx.vsubwev.h.b" => "__builtin_lsx_vsubwev_h_b",
-    "llvm.loongarch.lsx.vsubwev.h.bu" => "__builtin_lsx_vsubwev_h_bu",
-    "llvm.loongarch.lsx.vsubwev.q.d" => "__builtin_lsx_vsubwev_q_d",
-    "llvm.loongarch.lsx.vsubwev.q.du" => "__builtin_lsx_vsubwev_q_du",
-    "llvm.loongarch.lsx.vsubwev.w.h" => "__builtin_lsx_vsubwev_w_h",
-    "llvm.loongarch.lsx.vsubwev.w.hu" => "__builtin_lsx_vsubwev_w_hu",
-    "llvm.loongarch.lsx.vsubwod.d.w" => "__builtin_lsx_vsubwod_d_w",
-    "llvm.loongarch.lsx.vsubwod.d.wu" => "__builtin_lsx_vsubwod_d_wu",
-    "llvm.loongarch.lsx.vsubwod.h.b" => "__builtin_lsx_vsubwod_h_b",
-    "llvm.loongarch.lsx.vsubwod.h.bu" => "__builtin_lsx_vsubwod_h_bu",
-    "llvm.loongarch.lsx.vsubwod.q.d" => "__builtin_lsx_vsubwod_q_d",
-    "llvm.loongarch.lsx.vsubwod.q.du" => "__builtin_lsx_vsubwod_q_du",
-    "llvm.loongarch.lsx.vsubwod.w.h" => "__builtin_lsx_vsubwod_w_h",
-    "llvm.loongarch.lsx.vsubwod.w.hu" => "__builtin_lsx_vsubwod_w_hu",
-    "llvm.loongarch.lsx.vxor.v" => "__builtin_lsx_vxor_v",
-    "llvm.loongarch.lsx.vxori.b" => "__builtin_lsx_vxori_b",
-    "llvm.loongarch.movfcsr2gr" => "__builtin_loongarch_movfcsr2gr",
-    "llvm.loongarch.movgr2fcsr" => "__builtin_loongarch_movgr2fcsr",
-    "llvm.loongarch.syscall" => "__builtin_loongarch_syscall",
-    // mips
-    "llvm.mips.absq.s.ph" => "__builtin_mips_absq_s_ph",
-    "llvm.mips.absq.s.qb" => "__builtin_mips_absq_s_qb",
-    "llvm.mips.absq.s.w" => "__builtin_mips_absq_s_w",
-    "llvm.mips.add.a.b" => "__builtin_msa_add_a_b",
-    "llvm.mips.add.a.d" => "__builtin_msa_add_a_d",
-    "llvm.mips.add.a.h" => "__builtin_msa_add_a_h",
-    "llvm.mips.add.a.w" => "__builtin_msa_add_a_w",
-    "llvm.mips.addq.ph" => "__builtin_mips_addq_ph",
-    "llvm.mips.addq.s.ph" => "__builtin_mips_addq_s_ph",
-    "llvm.mips.addq.s.w" => "__builtin_mips_addq_s_w",
-    "llvm.mips.addqh.ph" => "__builtin_mips_addqh_ph",
-    "llvm.mips.addqh.r.ph" => "__builtin_mips_addqh_r_ph",
-    "llvm.mips.addqh.r.w" => "__builtin_mips_addqh_r_w",
-    "llvm.mips.addqh.w" => "__builtin_mips_addqh_w",
-    "llvm.mips.adds.a.b" => "__builtin_msa_adds_a_b",
-    "llvm.mips.adds.a.d" => "__builtin_msa_adds_a_d",
-    "llvm.mips.adds.a.h" => "__builtin_msa_adds_a_h",
-    "llvm.mips.adds.a.w" => "__builtin_msa_adds_a_w",
-    "llvm.mips.adds.s.b" => "__builtin_msa_adds_s_b",
-    "llvm.mips.adds.s.d" => "__builtin_msa_adds_s_d",
-    "llvm.mips.adds.s.h" => "__builtin_msa_adds_s_h",
-    "llvm.mips.adds.s.w" => "__builtin_msa_adds_s_w",
-    "llvm.mips.adds.u.b" => "__builtin_msa_adds_u_b",
-    "llvm.mips.adds.u.d" => "__builtin_msa_adds_u_d",
-    "llvm.mips.adds.u.h" => "__builtin_msa_adds_u_h",
-    "llvm.mips.adds.u.w" => "__builtin_msa_adds_u_w",
-    "llvm.mips.addsc" => "__builtin_mips_addsc",
-    "llvm.mips.addu.ph" => "__builtin_mips_addu_ph",
-    "llvm.mips.addu.qb" => "__builtin_mips_addu_qb",
-    "llvm.mips.addu.s.ph" => "__builtin_mips_addu_s_ph",
-    "llvm.mips.addu.s.qb" => "__builtin_mips_addu_s_qb",
-    "llvm.mips.adduh.qb" => "__builtin_mips_adduh_qb",
-    "llvm.mips.adduh.r.qb" => "__builtin_mips_adduh_r_qb",
-    "llvm.mips.addv.b" => "__builtin_msa_addv_b",
-    "llvm.mips.addv.d" => "__builtin_msa_addv_d",
-    "llvm.mips.addv.h" => "__builtin_msa_addv_h",
-    "llvm.mips.addv.w" => "__builtin_msa_addv_w",
-    "llvm.mips.addvi.b" => "__builtin_msa_addvi_b",
-    "llvm.mips.addvi.d" => "__builtin_msa_addvi_d",
-    "llvm.mips.addvi.h" => "__builtin_msa_addvi_h",
-    "llvm.mips.addvi.w" => "__builtin_msa_addvi_w",
-    "llvm.mips.addwc" => "__builtin_mips_addwc",
-    "llvm.mips.and.v" => "__builtin_msa_and_v",
-    "llvm.mips.andi.b" => "__builtin_msa_andi_b",
-    "llvm.mips.append" => "__builtin_mips_append",
-    "llvm.mips.asub.s.b" => "__builtin_msa_asub_s_b",
-    "llvm.mips.asub.s.d" => "__builtin_msa_asub_s_d",
-    "llvm.mips.asub.s.h" => "__builtin_msa_asub_s_h",
-    "llvm.mips.asub.s.w" => "__builtin_msa_asub_s_w",
-    "llvm.mips.asub.u.b" => "__builtin_msa_asub_u_b",
-    "llvm.mips.asub.u.d" => "__builtin_msa_asub_u_d",
-    "llvm.mips.asub.u.h" => "__builtin_msa_asub_u_h",
-    "llvm.mips.asub.u.w" => "__builtin_msa_asub_u_w",
-    "llvm.mips.ave.s.b" => "__builtin_msa_ave_s_b",
-    "llvm.mips.ave.s.d" => "__builtin_msa_ave_s_d",
-    "llvm.mips.ave.s.h" => "__builtin_msa_ave_s_h",
-    "llvm.mips.ave.s.w" => "__builtin_msa_ave_s_w",
-    "llvm.mips.ave.u.b" => "__builtin_msa_ave_u_b",
-    "llvm.mips.ave.u.d" => "__builtin_msa_ave_u_d",
-    "llvm.mips.ave.u.h" => "__builtin_msa_ave_u_h",
-    "llvm.mips.ave.u.w" => "__builtin_msa_ave_u_w",
-    "llvm.mips.aver.s.b" => "__builtin_msa_aver_s_b",
-    "llvm.mips.aver.s.d" => "__builtin_msa_aver_s_d",
-    "llvm.mips.aver.s.h" => "__builtin_msa_aver_s_h",
-    "llvm.mips.aver.s.w" => "__builtin_msa_aver_s_w",
-    "llvm.mips.aver.u.b" => "__builtin_msa_aver_u_b",
-    "llvm.mips.aver.u.d" => "__builtin_msa_aver_u_d",
-    "llvm.mips.aver.u.h" => "__builtin_msa_aver_u_h",
-    "llvm.mips.aver.u.w" => "__builtin_msa_aver_u_w",
-    "llvm.mips.balign" => "__builtin_mips_balign",
-    "llvm.mips.bclr.b" => "__builtin_msa_bclr_b",
-    "llvm.mips.bclr.d" => "__builtin_msa_bclr_d",
-    "llvm.mips.bclr.h" => "__builtin_msa_bclr_h",
-    "llvm.mips.bclr.w" => "__builtin_msa_bclr_w",
-    "llvm.mips.bclri.b" => "__builtin_msa_bclri_b",
-    "llvm.mips.bclri.d" => "__builtin_msa_bclri_d",
-    "llvm.mips.bclri.h" => "__builtin_msa_bclri_h",
-    "llvm.mips.bclri.w" => "__builtin_msa_bclri_w",
-    "llvm.mips.binsl.b" => "__builtin_msa_binsl_b",
-    "llvm.mips.binsl.d" => "__builtin_msa_binsl_d",
-    "llvm.mips.binsl.h" => "__builtin_msa_binsl_h",
-    "llvm.mips.binsl.w" => "__builtin_msa_binsl_w",
-    "llvm.mips.binsli.b" => "__builtin_msa_binsli_b",
-    "llvm.mips.binsli.d" => "__builtin_msa_binsli_d",
-    "llvm.mips.binsli.h" => "__builtin_msa_binsli_h",
-    "llvm.mips.binsli.w" => "__builtin_msa_binsli_w",
-    "llvm.mips.binsr.b" => "__builtin_msa_binsr_b",
-    "llvm.mips.binsr.d" => "__builtin_msa_binsr_d",
-    "llvm.mips.binsr.h" => "__builtin_msa_binsr_h",
-    "llvm.mips.binsr.w" => "__builtin_msa_binsr_w",
-    "llvm.mips.binsri.b" => "__builtin_msa_binsri_b",
-    "llvm.mips.binsri.d" => "__builtin_msa_binsri_d",
-    "llvm.mips.binsri.h" => "__builtin_msa_binsri_h",
-    "llvm.mips.binsri.w" => "__builtin_msa_binsri_w",
-    "llvm.mips.bitrev" => "__builtin_mips_bitrev",
-    "llvm.mips.bmnz.v" => "__builtin_msa_bmnz_v",
-    "llvm.mips.bmnzi.b" => "__builtin_msa_bmnzi_b",
-    "llvm.mips.bmz.v" => "__builtin_msa_bmz_v",
-    "llvm.mips.bmzi.b" => "__builtin_msa_bmzi_b",
-    "llvm.mips.bneg.b" => "__builtin_msa_bneg_b",
-    "llvm.mips.bneg.d" => "__builtin_msa_bneg_d",
-    "llvm.mips.bneg.h" => "__builtin_msa_bneg_h",
-    "llvm.mips.bneg.w" => "__builtin_msa_bneg_w",
-    "llvm.mips.bnegi.b" => "__builtin_msa_bnegi_b",
-    "llvm.mips.bnegi.d" => "__builtin_msa_bnegi_d",
-    "llvm.mips.bnegi.h" => "__builtin_msa_bnegi_h",
-    "llvm.mips.bnegi.w" => "__builtin_msa_bnegi_w",
-    "llvm.mips.bnz.b" => "__builtin_msa_bnz_b",
-    "llvm.mips.bnz.d" => "__builtin_msa_bnz_d",
-    "llvm.mips.bnz.h" => "__builtin_msa_bnz_h",
-    "llvm.mips.bnz.v" => "__builtin_msa_bnz_v",
-    "llvm.mips.bnz.w" => "__builtin_msa_bnz_w",
-    "llvm.mips.bposge32" => "__builtin_mips_bposge32",
-    "llvm.mips.bsel.v" => "__builtin_msa_bsel_v",
-    "llvm.mips.bseli.b" => "__builtin_msa_bseli_b",
-    "llvm.mips.bset.b" => "__builtin_msa_bset_b",
-    "llvm.mips.bset.d" => "__builtin_msa_bset_d",
-    "llvm.mips.bset.h" => "__builtin_msa_bset_h",
-    "llvm.mips.bset.w" => "__builtin_msa_bset_w",
-    "llvm.mips.bseti.b" => "__builtin_msa_bseti_b",
-    "llvm.mips.bseti.d" => "__builtin_msa_bseti_d",
-    "llvm.mips.bseti.h" => "__builtin_msa_bseti_h",
-    "llvm.mips.bseti.w" => "__builtin_msa_bseti_w",
-    "llvm.mips.bz.b" => "__builtin_msa_bz_b",
-    "llvm.mips.bz.d" => "__builtin_msa_bz_d",
-    "llvm.mips.bz.h" => "__builtin_msa_bz_h",
-    "llvm.mips.bz.v" => "__builtin_msa_bz_v",
-    "llvm.mips.bz.w" => "__builtin_msa_bz_w",
-    "llvm.mips.ceq.b" => "__builtin_msa_ceq_b",
-    "llvm.mips.ceq.d" => "__builtin_msa_ceq_d",
-    "llvm.mips.ceq.h" => "__builtin_msa_ceq_h",
-    "llvm.mips.ceq.w" => "__builtin_msa_ceq_w",
-    "llvm.mips.ceqi.b" => "__builtin_msa_ceqi_b",
-    "llvm.mips.ceqi.d" => "__builtin_msa_ceqi_d",
-    "llvm.mips.ceqi.h" => "__builtin_msa_ceqi_h",
-    "llvm.mips.ceqi.w" => "__builtin_msa_ceqi_w",
-    "llvm.mips.cfcmsa" => "__builtin_msa_cfcmsa",
-    "llvm.mips.cle.s.b" => "__builtin_msa_cle_s_b",
-    "llvm.mips.cle.s.d" => "__builtin_msa_cle_s_d",
-    "llvm.mips.cle.s.h" => "__builtin_msa_cle_s_h",
-    "llvm.mips.cle.s.w" => "__builtin_msa_cle_s_w",
-    "llvm.mips.cle.u.b" => "__builtin_msa_cle_u_b",
-    "llvm.mips.cle.u.d" => "__builtin_msa_cle_u_d",
-    "llvm.mips.cle.u.h" => "__builtin_msa_cle_u_h",
-    "llvm.mips.cle.u.w" => "__builtin_msa_cle_u_w",
-    "llvm.mips.clei.s.b" => "__builtin_msa_clei_s_b",
-    "llvm.mips.clei.s.d" => "__builtin_msa_clei_s_d",
-    "llvm.mips.clei.s.h" => "__builtin_msa_clei_s_h",
-    "llvm.mips.clei.s.w" => "__builtin_msa_clei_s_w",
-    "llvm.mips.clei.u.b" => "__builtin_msa_clei_u_b",
-    "llvm.mips.clei.u.d" => "__builtin_msa_clei_u_d",
-    "llvm.mips.clei.u.h" => "__builtin_msa_clei_u_h",
-    "llvm.mips.clei.u.w" => "__builtin_msa_clei_u_w",
-    "llvm.mips.clt.s.b" => "__builtin_msa_clt_s_b",
-    "llvm.mips.clt.s.d" => "__builtin_msa_clt_s_d",
-    "llvm.mips.clt.s.h" => "__builtin_msa_clt_s_h",
-    "llvm.mips.clt.s.w" => "__builtin_msa_clt_s_w",
-    "llvm.mips.clt.u.b" => "__builtin_msa_clt_u_b",
-    "llvm.mips.clt.u.d" => "__builtin_msa_clt_u_d",
-    "llvm.mips.clt.u.h" => "__builtin_msa_clt_u_h",
-    "llvm.mips.clt.u.w" => "__builtin_msa_clt_u_w",
-    "llvm.mips.clti.s.b" => "__builtin_msa_clti_s_b",
-    "llvm.mips.clti.s.d" => "__builtin_msa_clti_s_d",
-    "llvm.mips.clti.s.h" => "__builtin_msa_clti_s_h",
-    "llvm.mips.clti.s.w" => "__builtin_msa_clti_s_w",
-    "llvm.mips.clti.u.b" => "__builtin_msa_clti_u_b",
-    "llvm.mips.clti.u.d" => "__builtin_msa_clti_u_d",
-    "llvm.mips.clti.u.h" => "__builtin_msa_clti_u_h",
-    "llvm.mips.clti.u.w" => "__builtin_msa_clti_u_w",
-    "llvm.mips.cmp.eq.ph" => "__builtin_mips_cmp_eq_ph",
-    "llvm.mips.cmp.le.ph" => "__builtin_mips_cmp_le_ph",
-    "llvm.mips.cmp.lt.ph" => "__builtin_mips_cmp_lt_ph",
-    "llvm.mips.cmpgdu.eq.qb" => "__builtin_mips_cmpgdu_eq_qb",
-    "llvm.mips.cmpgdu.le.qb" => "__builtin_mips_cmpgdu_le_qb",
-    "llvm.mips.cmpgdu.lt.qb" => "__builtin_mips_cmpgdu_lt_qb",
-    "llvm.mips.cmpgu.eq.qb" => "__builtin_mips_cmpgu_eq_qb",
-    "llvm.mips.cmpgu.le.qb" => "__builtin_mips_cmpgu_le_qb",
-    "llvm.mips.cmpgu.lt.qb" => "__builtin_mips_cmpgu_lt_qb",
-    "llvm.mips.cmpu.eq.qb" => "__builtin_mips_cmpu_eq_qb",
-    "llvm.mips.cmpu.le.qb" => "__builtin_mips_cmpu_le_qb",
-    "llvm.mips.cmpu.lt.qb" => "__builtin_mips_cmpu_lt_qb",
-    "llvm.mips.copy.s.b" => "__builtin_msa_copy_s_b",
-    "llvm.mips.copy.s.d" => "__builtin_msa_copy_s_d",
-    "llvm.mips.copy.s.h" => "__builtin_msa_copy_s_h",
-    "llvm.mips.copy.s.w" => "__builtin_msa_copy_s_w",
-    "llvm.mips.copy.u.b" => "__builtin_msa_copy_u_b",
-    "llvm.mips.copy.u.d" => "__builtin_msa_copy_u_d",
-    "llvm.mips.copy.u.h" => "__builtin_msa_copy_u_h",
-    "llvm.mips.copy.u.w" => "__builtin_msa_copy_u_w",
-    "llvm.mips.ctcmsa" => "__builtin_msa_ctcmsa",
-    "llvm.mips.div.s.b" => "__builtin_msa_div_s_b",
-    "llvm.mips.div.s.d" => "__builtin_msa_div_s_d",
-    "llvm.mips.div.s.h" => "__builtin_msa_div_s_h",
-    "llvm.mips.div.s.w" => "__builtin_msa_div_s_w",
-    "llvm.mips.div.u.b" => "__builtin_msa_div_u_b",
-    "llvm.mips.div.u.d" => "__builtin_msa_div_u_d",
-    "llvm.mips.div.u.h" => "__builtin_msa_div_u_h",
-    "llvm.mips.div.u.w" => "__builtin_msa_div_u_w",
-    "llvm.mips.dlsa" => "__builtin_mips_dlsa",
-    "llvm.mips.dotp.s.d" => "__builtin_msa_dotp_s_d",
-    "llvm.mips.dotp.s.h" => "__builtin_msa_dotp_s_h",
-    "llvm.mips.dotp.s.w" => "__builtin_msa_dotp_s_w",
-    "llvm.mips.dotp.u.d" => "__builtin_msa_dotp_u_d",
-    "llvm.mips.dotp.u.h" => "__builtin_msa_dotp_u_h",
-    "llvm.mips.dotp.u.w" => "__builtin_msa_dotp_u_w",
-    "llvm.mips.dpa.w.ph" => "__builtin_mips_dpa_w_ph",
-    "llvm.mips.dpadd.s.d" => "__builtin_msa_dpadd_s_d",
-    "llvm.mips.dpadd.s.h" => "__builtin_msa_dpadd_s_h",
-    "llvm.mips.dpadd.s.w" => "__builtin_msa_dpadd_s_w",
-    "llvm.mips.dpadd.u.d" => "__builtin_msa_dpadd_u_d",
-    "llvm.mips.dpadd.u.h" => "__builtin_msa_dpadd_u_h",
-    "llvm.mips.dpadd.u.w" => "__builtin_msa_dpadd_u_w",
-    "llvm.mips.dpaq.s.w.ph" => "__builtin_mips_dpaq_s_w_ph",
-    "llvm.mips.dpaq.sa.l.w" => "__builtin_mips_dpaq_sa_l_w",
-    "llvm.mips.dpaqx.s.w.ph" => "__builtin_mips_dpaqx_s_w_ph",
-    "llvm.mips.dpaqx.sa.w.ph" => "__builtin_mips_dpaqx_sa_w_ph",
-    "llvm.mips.dpau.h.qbl" => "__builtin_mips_dpau_h_qbl",
-    "llvm.mips.dpau.h.qbr" => "__builtin_mips_dpau_h_qbr",
-    "llvm.mips.dpax.w.ph" => "__builtin_mips_dpax_w_ph",
-    "llvm.mips.dps.w.ph" => "__builtin_mips_dps_w_ph",
-    "llvm.mips.dpsq.s.w.ph" => "__builtin_mips_dpsq_s_w_ph",
-    "llvm.mips.dpsq.sa.l.w" => "__builtin_mips_dpsq_sa_l_w",
-    "llvm.mips.dpsqx.s.w.ph" => "__builtin_mips_dpsqx_s_w_ph",
-    "llvm.mips.dpsqx.sa.w.ph" => "__builtin_mips_dpsqx_sa_w_ph",
-    "llvm.mips.dpsu.h.qbl" => "__builtin_mips_dpsu_h_qbl",
-    "llvm.mips.dpsu.h.qbr" => "__builtin_mips_dpsu_h_qbr",
-    "llvm.mips.dpsub.s.d" => "__builtin_msa_dpsub_s_d",
-    "llvm.mips.dpsub.s.h" => "__builtin_msa_dpsub_s_h",
-    "llvm.mips.dpsub.s.w" => "__builtin_msa_dpsub_s_w",
-    "llvm.mips.dpsub.u.d" => "__builtin_msa_dpsub_u_d",
-    "llvm.mips.dpsub.u.h" => "__builtin_msa_dpsub_u_h",
-    "llvm.mips.dpsub.u.w" => "__builtin_msa_dpsub_u_w",
-    "llvm.mips.dpsx.w.ph" => "__builtin_mips_dpsx_w_ph",
-    "llvm.mips.extp" => "__builtin_mips_extp",
-    "llvm.mips.extpdp" => "__builtin_mips_extpdp",
-    "llvm.mips.extr.r.w" => "__builtin_mips_extr_r_w",
-    "llvm.mips.extr.rs.w" => "__builtin_mips_extr_rs_w",
-    "llvm.mips.extr.s.h" => "__builtin_mips_extr_s_h",
-    "llvm.mips.extr.w" => "__builtin_mips_extr_w",
-    "llvm.mips.fadd.d" => "__builtin_msa_fadd_d",
-    "llvm.mips.fadd.w" => "__builtin_msa_fadd_w",
-    "llvm.mips.fcaf.d" => "__builtin_msa_fcaf_d",
-    "llvm.mips.fcaf.w" => "__builtin_msa_fcaf_w",
-    "llvm.mips.fceq.d" => "__builtin_msa_fceq_d",
-    "llvm.mips.fceq.w" => "__builtin_msa_fceq_w",
-    "llvm.mips.fclass.d" => "__builtin_msa_fclass_d",
-    "llvm.mips.fclass.w" => "__builtin_msa_fclass_w",
-    "llvm.mips.fcle.d" => "__builtin_msa_fcle_d",
-    "llvm.mips.fcle.w" => "__builtin_msa_fcle_w",
-    "llvm.mips.fclt.d" => "__builtin_msa_fclt_d",
-    "llvm.mips.fclt.w" => "__builtin_msa_fclt_w",
-    "llvm.mips.fcne.d" => "__builtin_msa_fcne_d",
-    "llvm.mips.fcne.w" => "__builtin_msa_fcne_w",
-    "llvm.mips.fcor.d" => "__builtin_msa_fcor_d",
-    "llvm.mips.fcor.w" => "__builtin_msa_fcor_w",
-    "llvm.mips.fcueq.d" => "__builtin_msa_fcueq_d",
-    "llvm.mips.fcueq.w" => "__builtin_msa_fcueq_w",
-    "llvm.mips.fcule.d" => "__builtin_msa_fcule_d",
-    "llvm.mips.fcule.w" => "__builtin_msa_fcule_w",
-    "llvm.mips.fcult.d" => "__builtin_msa_fcult_d",
-    "llvm.mips.fcult.w" => "__builtin_msa_fcult_w",
-    "llvm.mips.fcun.d" => "__builtin_msa_fcun_d",
-    "llvm.mips.fcun.w" => "__builtin_msa_fcun_w",
-    "llvm.mips.fcune.d" => "__builtin_msa_fcune_d",
-    "llvm.mips.fcune.w" => "__builtin_msa_fcune_w",
-    "llvm.mips.fdiv.d" => "__builtin_msa_fdiv_d",
-    "llvm.mips.fdiv.w" => "__builtin_msa_fdiv_w",
-    "llvm.mips.fexdo.h" => "__builtin_msa_fexdo_h",
-    "llvm.mips.fexdo.w" => "__builtin_msa_fexdo_w",
-    "llvm.mips.fexp2.d" => "__builtin_msa_fexp2_d",
-    "llvm.mips.fexp2.w" => "__builtin_msa_fexp2_w",
-    "llvm.mips.fexupl.d" => "__builtin_msa_fexupl_d",
-    "llvm.mips.fexupl.w" => "__builtin_msa_fexupl_w",
-    "llvm.mips.fexupr.d" => "__builtin_msa_fexupr_d",
-    "llvm.mips.fexupr.w" => "__builtin_msa_fexupr_w",
-    "llvm.mips.ffint.s.d" => "__builtin_msa_ffint_s_d",
-    "llvm.mips.ffint.s.w" => "__builtin_msa_ffint_s_w",
-    "llvm.mips.ffint.u.d" => "__builtin_msa_ffint_u_d",
-    "llvm.mips.ffint.u.w" => "__builtin_msa_ffint_u_w",
-    "llvm.mips.ffql.d" => "__builtin_msa_ffql_d",
-    "llvm.mips.ffql.w" => "__builtin_msa_ffql_w",
-    "llvm.mips.ffqr.d" => "__builtin_msa_ffqr_d",
-    "llvm.mips.ffqr.w" => "__builtin_msa_ffqr_w",
-    "llvm.mips.fill.b" => "__builtin_msa_fill_b",
-    "llvm.mips.fill.d" => "__builtin_msa_fill_d",
-    "llvm.mips.fill.h" => "__builtin_msa_fill_h",
-    "llvm.mips.fill.w" => "__builtin_msa_fill_w",
-    "llvm.mips.flog2.d" => "__builtin_msa_flog2_d",
-    "llvm.mips.flog2.w" => "__builtin_msa_flog2_w",
-    "llvm.mips.fmadd.d" => "__builtin_msa_fmadd_d",
-    "llvm.mips.fmadd.w" => "__builtin_msa_fmadd_w",
-    "llvm.mips.fmax.a.d" => "__builtin_msa_fmax_a_d",
-    "llvm.mips.fmax.a.w" => "__builtin_msa_fmax_a_w",
-    "llvm.mips.fmax.d" => "__builtin_msa_fmax_d",
-    "llvm.mips.fmax.w" => "__builtin_msa_fmax_w",
-    "llvm.mips.fmin.a.d" => "__builtin_msa_fmin_a_d",
-    "llvm.mips.fmin.a.w" => "__builtin_msa_fmin_a_w",
-    "llvm.mips.fmin.d" => "__builtin_msa_fmin_d",
-    "llvm.mips.fmin.w" => "__builtin_msa_fmin_w",
-    "llvm.mips.fmsub.d" => "__builtin_msa_fmsub_d",
-    "llvm.mips.fmsub.w" => "__builtin_msa_fmsub_w",
-    "llvm.mips.fmul.d" => "__builtin_msa_fmul_d",
-    "llvm.mips.fmul.w" => "__builtin_msa_fmul_w",
-    "llvm.mips.frcp.d" => "__builtin_msa_frcp_d",
-    "llvm.mips.frcp.w" => "__builtin_msa_frcp_w",
-    "llvm.mips.frint.d" => "__builtin_msa_frint_d",
-    "llvm.mips.frint.w" => "__builtin_msa_frint_w",
-    "llvm.mips.frsqrt.d" => "__builtin_msa_frsqrt_d",
-    "llvm.mips.frsqrt.w" => "__builtin_msa_frsqrt_w",
-    "llvm.mips.fsaf.d" => "__builtin_msa_fsaf_d",
-    "llvm.mips.fsaf.w" => "__builtin_msa_fsaf_w",
-    "llvm.mips.fseq.d" => "__builtin_msa_fseq_d",
-    "llvm.mips.fseq.w" => "__builtin_msa_fseq_w",
-    "llvm.mips.fsle.d" => "__builtin_msa_fsle_d",
-    "llvm.mips.fsle.w" => "__builtin_msa_fsle_w",
-    "llvm.mips.fslt.d" => "__builtin_msa_fslt_d",
-    "llvm.mips.fslt.w" => "__builtin_msa_fslt_w",
-    "llvm.mips.fsne.d" => "__builtin_msa_fsne_d",
-    "llvm.mips.fsne.w" => "__builtin_msa_fsne_w",
-    "llvm.mips.fsor.d" => "__builtin_msa_fsor_d",
-    "llvm.mips.fsor.w" => "__builtin_msa_fsor_w",
-    "llvm.mips.fsqrt.d" => "__builtin_msa_fsqrt_d",
-    "llvm.mips.fsqrt.w" => "__builtin_msa_fsqrt_w",
-    "llvm.mips.fsub.d" => "__builtin_msa_fsub_d",
-    "llvm.mips.fsub.w" => "__builtin_msa_fsub_w",
-    "llvm.mips.fsueq.d" => "__builtin_msa_fsueq_d",
-    "llvm.mips.fsueq.w" => "__builtin_msa_fsueq_w",
-    "llvm.mips.fsule.d" => "__builtin_msa_fsule_d",
-    "llvm.mips.fsule.w" => "__builtin_msa_fsule_w",
-    "llvm.mips.fsult.d" => "__builtin_msa_fsult_d",
-    "llvm.mips.fsult.w" => "__builtin_msa_fsult_w",
-    "llvm.mips.fsun.d" => "__builtin_msa_fsun_d",
-    "llvm.mips.fsun.w" => "__builtin_msa_fsun_w",
-    "llvm.mips.fsune.d" => "__builtin_msa_fsune_d",
-    "llvm.mips.fsune.w" => "__builtin_msa_fsune_w",
-    "llvm.mips.ftint.s.d" => "__builtin_msa_ftint_s_d",
-    "llvm.mips.ftint.s.w" => "__builtin_msa_ftint_s_w",
-    "llvm.mips.ftint.u.d" => "__builtin_msa_ftint_u_d",
-    "llvm.mips.ftint.u.w" => "__builtin_msa_ftint_u_w",
-    "llvm.mips.ftq.h" => "__builtin_msa_ftq_h",
-    "llvm.mips.ftq.w" => "__builtin_msa_ftq_w",
-    "llvm.mips.ftrunc.s.d" => "__builtin_msa_ftrunc_s_d",
-    "llvm.mips.ftrunc.s.w" => "__builtin_msa_ftrunc_s_w",
-    "llvm.mips.ftrunc.u.d" => "__builtin_msa_ftrunc_u_d",
-    "llvm.mips.ftrunc.u.w" => "__builtin_msa_ftrunc_u_w",
-    "llvm.mips.hadd.s.d" => "__builtin_msa_hadd_s_d",
-    "llvm.mips.hadd.s.h" => "__builtin_msa_hadd_s_h",
-    "llvm.mips.hadd.s.w" => "__builtin_msa_hadd_s_w",
-    "llvm.mips.hadd.u.d" => "__builtin_msa_hadd_u_d",
-    "llvm.mips.hadd.u.h" => "__builtin_msa_hadd_u_h",
-    "llvm.mips.hadd.u.w" => "__builtin_msa_hadd_u_w",
-    "llvm.mips.hsub.s.d" => "__builtin_msa_hsub_s_d",
-    "llvm.mips.hsub.s.h" => "__builtin_msa_hsub_s_h",
-    "llvm.mips.hsub.s.w" => "__builtin_msa_hsub_s_w",
-    "llvm.mips.hsub.u.d" => "__builtin_msa_hsub_u_d",
-    "llvm.mips.hsub.u.h" => "__builtin_msa_hsub_u_h",
-    "llvm.mips.hsub.u.w" => "__builtin_msa_hsub_u_w",
-    "llvm.mips.ilvev.b" => "__builtin_msa_ilvev_b",
-    "llvm.mips.ilvev.d" => "__builtin_msa_ilvev_d",
-    "llvm.mips.ilvev.h" => "__builtin_msa_ilvev_h",
-    "llvm.mips.ilvev.w" => "__builtin_msa_ilvev_w",
-    "llvm.mips.ilvl.b" => "__builtin_msa_ilvl_b",
-    "llvm.mips.ilvl.d" => "__builtin_msa_ilvl_d",
-    "llvm.mips.ilvl.h" => "__builtin_msa_ilvl_h",
-    "llvm.mips.ilvl.w" => "__builtin_msa_ilvl_w",
-    "llvm.mips.ilvod.b" => "__builtin_msa_ilvod_b",
-    "llvm.mips.ilvod.d" => "__builtin_msa_ilvod_d",
-    "llvm.mips.ilvod.h" => "__builtin_msa_ilvod_h",
-    "llvm.mips.ilvod.w" => "__builtin_msa_ilvod_w",
-    "llvm.mips.ilvr.b" => "__builtin_msa_ilvr_b",
-    "llvm.mips.ilvr.d" => "__builtin_msa_ilvr_d",
-    "llvm.mips.ilvr.h" => "__builtin_msa_ilvr_h",
-    "llvm.mips.ilvr.w" => "__builtin_msa_ilvr_w",
-    "llvm.mips.insert.b" => "__builtin_msa_insert_b",
-    "llvm.mips.insert.d" => "__builtin_msa_insert_d",
-    "llvm.mips.insert.h" => "__builtin_msa_insert_h",
-    "llvm.mips.insert.w" => "__builtin_msa_insert_w",
-    "llvm.mips.insv" => "__builtin_mips_insv",
-    "llvm.mips.insve.b" => "__builtin_msa_insve_b",
-    "llvm.mips.insve.d" => "__builtin_msa_insve_d",
-    "llvm.mips.insve.h" => "__builtin_msa_insve_h",
-    "llvm.mips.insve.w" => "__builtin_msa_insve_w",
-    "llvm.mips.lbux" => "__builtin_mips_lbux",
-    "llvm.mips.ld.b" => "__builtin_msa_ld_b",
-    "llvm.mips.ld.d" => "__builtin_msa_ld_d",
-    "llvm.mips.ld.h" => "__builtin_msa_ld_h",
-    "llvm.mips.ld.w" => "__builtin_msa_ld_w",
-    "llvm.mips.ldi.b" => "__builtin_msa_ldi_b",
-    "llvm.mips.ldi.d" => "__builtin_msa_ldi_d",
-    "llvm.mips.ldi.h" => "__builtin_msa_ldi_h",
-    "llvm.mips.ldi.w" => "__builtin_msa_ldi_w",
-    "llvm.mips.ldr.d" => "__builtin_msa_ldr_d",
-    "llvm.mips.ldr.w" => "__builtin_msa_ldr_w",
-    "llvm.mips.lhx" => "__builtin_mips_lhx",
-    "llvm.mips.lsa" => "__builtin_mips_lsa",
-    "llvm.mips.lwx" => "__builtin_mips_lwx",
-    "llvm.mips.madd" => "__builtin_mips_madd",
-    "llvm.mips.madd.q.h" => "__builtin_msa_madd_q_h",
-    "llvm.mips.madd.q.w" => "__builtin_msa_madd_q_w",
-    "llvm.mips.maddr.q.h" => "__builtin_msa_maddr_q_h",
-    "llvm.mips.maddr.q.w" => "__builtin_msa_maddr_q_w",
-    "llvm.mips.maddu" => "__builtin_mips_maddu",
-    "llvm.mips.maddv.b" => "__builtin_msa_maddv_b",
-    "llvm.mips.maddv.d" => "__builtin_msa_maddv_d",
-    "llvm.mips.maddv.h" => "__builtin_msa_maddv_h",
-    "llvm.mips.maddv.w" => "__builtin_msa_maddv_w",
-    "llvm.mips.maq.s.w.phl" => "__builtin_mips_maq_s_w_phl",
-    "llvm.mips.maq.s.w.phr" => "__builtin_mips_maq_s_w_phr",
-    "llvm.mips.maq.sa.w.phl" => "__builtin_mips_maq_sa_w_phl",
-    "llvm.mips.maq.sa.w.phr" => "__builtin_mips_maq_sa_w_phr",
-    "llvm.mips.max.a.b" => "__builtin_msa_max_a_b",
-    "llvm.mips.max.a.d" => "__builtin_msa_max_a_d",
-    "llvm.mips.max.a.h" => "__builtin_msa_max_a_h",
-    "llvm.mips.max.a.w" => "__builtin_msa_max_a_w",
-    "llvm.mips.max.s.b" => "__builtin_msa_max_s_b",
-    "llvm.mips.max.s.d" => "__builtin_msa_max_s_d",
-    "llvm.mips.max.s.h" => "__builtin_msa_max_s_h",
-    "llvm.mips.max.s.w" => "__builtin_msa_max_s_w",
-    "llvm.mips.max.u.b" => "__builtin_msa_max_u_b",
-    "llvm.mips.max.u.d" => "__builtin_msa_max_u_d",
-    "llvm.mips.max.u.h" => "__builtin_msa_max_u_h",
-    "llvm.mips.max.u.w" => "__builtin_msa_max_u_w",
-    "llvm.mips.maxi.s.b" => "__builtin_msa_maxi_s_b",
-    "llvm.mips.maxi.s.d" => "__builtin_msa_maxi_s_d",
-    "llvm.mips.maxi.s.h" => "__builtin_msa_maxi_s_h",
-    "llvm.mips.maxi.s.w" => "__builtin_msa_maxi_s_w",
-    "llvm.mips.maxi.u.b" => "__builtin_msa_maxi_u_b",
-    "llvm.mips.maxi.u.d" => "__builtin_msa_maxi_u_d",
-    "llvm.mips.maxi.u.h" => "__builtin_msa_maxi_u_h",
-    "llvm.mips.maxi.u.w" => "__builtin_msa_maxi_u_w",
-    "llvm.mips.min.a.b" => "__builtin_msa_min_a_b",
-    "llvm.mips.min.a.d" => "__builtin_msa_min_a_d",
-    "llvm.mips.min.a.h" => "__builtin_msa_min_a_h",
-    "llvm.mips.min.a.w" => "__builtin_msa_min_a_w",
-    "llvm.mips.min.s.b" => "__builtin_msa_min_s_b",
-    "llvm.mips.min.s.d" => "__builtin_msa_min_s_d",
-    "llvm.mips.min.s.h" => "__builtin_msa_min_s_h",
-    "llvm.mips.min.s.w" => "__builtin_msa_min_s_w",
-    "llvm.mips.min.u.b" => "__builtin_msa_min_u_b",
-    "llvm.mips.min.u.d" => "__builtin_msa_min_u_d",
-    "llvm.mips.min.u.h" => "__builtin_msa_min_u_h",
-    "llvm.mips.min.u.w" => "__builtin_msa_min_u_w",
-    "llvm.mips.mini.s.b" => "__builtin_msa_mini_s_b",
-    "llvm.mips.mini.s.d" => "__builtin_msa_mini_s_d",
-    "llvm.mips.mini.s.h" => "__builtin_msa_mini_s_h",
-    "llvm.mips.mini.s.w" => "__builtin_msa_mini_s_w",
-    "llvm.mips.mini.u.b" => "__builtin_msa_mini_u_b",
-    "llvm.mips.mini.u.d" => "__builtin_msa_mini_u_d",
-    "llvm.mips.mini.u.h" => "__builtin_msa_mini_u_h",
-    "llvm.mips.mini.u.w" => "__builtin_msa_mini_u_w",
-    "llvm.mips.mod.s.b" => "__builtin_msa_mod_s_b",
-    "llvm.mips.mod.s.d" => "__builtin_msa_mod_s_d",
-    "llvm.mips.mod.s.h" => "__builtin_msa_mod_s_h",
-    "llvm.mips.mod.s.w" => "__builtin_msa_mod_s_w",
-    "llvm.mips.mod.u.b" => "__builtin_msa_mod_u_b",
-    "llvm.mips.mod.u.d" => "__builtin_msa_mod_u_d",
-    "llvm.mips.mod.u.h" => "__builtin_msa_mod_u_h",
-    "llvm.mips.mod.u.w" => "__builtin_msa_mod_u_w",
-    "llvm.mips.modsub" => "__builtin_mips_modsub",
-    "llvm.mips.move.v" => "__builtin_msa_move_v",
-    "llvm.mips.msub" => "__builtin_mips_msub",
-    "llvm.mips.msub.q.h" => "__builtin_msa_msub_q_h",
-    "llvm.mips.msub.q.w" => "__builtin_msa_msub_q_w",
-    "llvm.mips.msubr.q.h" => "__builtin_msa_msubr_q_h",
-    "llvm.mips.msubr.q.w" => "__builtin_msa_msubr_q_w",
-    "llvm.mips.msubu" => "__builtin_mips_msubu",
-    "llvm.mips.msubv.b" => "__builtin_msa_msubv_b",
-    "llvm.mips.msubv.d" => "__builtin_msa_msubv_d",
-    "llvm.mips.msubv.h" => "__builtin_msa_msubv_h",
-    "llvm.mips.msubv.w" => "__builtin_msa_msubv_w",
-    "llvm.mips.mthlip" => "__builtin_mips_mthlip",
-    "llvm.mips.mul.ph" => "__builtin_mips_mul_ph",
-    "llvm.mips.mul.q.h" => "__builtin_msa_mul_q_h",
-    "llvm.mips.mul.q.w" => "__builtin_msa_mul_q_w",
-    "llvm.mips.mul.s.ph" => "__builtin_mips_mul_s_ph",
-    "llvm.mips.muleq.s.w.phl" => "__builtin_mips_muleq_s_w_phl",
-    "llvm.mips.muleq.s.w.phr" => "__builtin_mips_muleq_s_w_phr",
-    "llvm.mips.muleu.s.ph.qbl" => "__builtin_mips_muleu_s_ph_qbl",
-    "llvm.mips.muleu.s.ph.qbr" => "__builtin_mips_muleu_s_ph_qbr",
-    "llvm.mips.mulq.rs.ph" => "__builtin_mips_mulq_rs_ph",
-    "llvm.mips.mulq.rs.w" => "__builtin_mips_mulq_rs_w",
-    "llvm.mips.mulq.s.ph" => "__builtin_mips_mulq_s_ph",
-    "llvm.mips.mulq.s.w" => "__builtin_mips_mulq_s_w",
-    "llvm.mips.mulr.q.h" => "__builtin_msa_mulr_q_h",
-    "llvm.mips.mulr.q.w" => "__builtin_msa_mulr_q_w",
-    "llvm.mips.mulsa.w.ph" => "__builtin_mips_mulsa_w_ph",
-    "llvm.mips.mulsaq.s.w.ph" => "__builtin_mips_mulsaq_s_w_ph",
-    "llvm.mips.mult" => "__builtin_mips_mult",
-    "llvm.mips.multu" => "__builtin_mips_multu",
-    "llvm.mips.mulv.b" => "__builtin_msa_mulv_b",
-    "llvm.mips.mulv.d" => "__builtin_msa_mulv_d",
-    "llvm.mips.mulv.h" => "__builtin_msa_mulv_h",
-    "llvm.mips.mulv.w" => "__builtin_msa_mulv_w",
-    "llvm.mips.nloc.b" => "__builtin_msa_nloc_b",
-    "llvm.mips.nloc.d" => "__builtin_msa_nloc_d",
-    "llvm.mips.nloc.h" => "__builtin_msa_nloc_h",
-    "llvm.mips.nloc.w" => "__builtin_msa_nloc_w",
-    "llvm.mips.nlzc.b" => "__builtin_msa_nlzc_b",
-    "llvm.mips.nlzc.d" => "__builtin_msa_nlzc_d",
-    "llvm.mips.nlzc.h" => "__builtin_msa_nlzc_h",
-    "llvm.mips.nlzc.w" => "__builtin_msa_nlzc_w",
-    "llvm.mips.nor.v" => "__builtin_msa_nor_v",
-    "llvm.mips.nori.b" => "__builtin_msa_nori_b",
-    "llvm.mips.or.v" => "__builtin_msa_or_v",
-    "llvm.mips.ori.b" => "__builtin_msa_ori_b",
-    "llvm.mips.packrl.ph" => "__builtin_mips_packrl_ph",
-    "llvm.mips.pckev.b" => "__builtin_msa_pckev_b",
-    "llvm.mips.pckev.d" => "__builtin_msa_pckev_d",
-    "llvm.mips.pckev.h" => "__builtin_msa_pckev_h",
-    "llvm.mips.pckev.w" => "__builtin_msa_pckev_w",
-    "llvm.mips.pckod.b" => "__builtin_msa_pckod_b",
-    "llvm.mips.pckod.d" => "__builtin_msa_pckod_d",
-    "llvm.mips.pckod.h" => "__builtin_msa_pckod_h",
-    "llvm.mips.pckod.w" => "__builtin_msa_pckod_w",
-    "llvm.mips.pcnt.b" => "__builtin_msa_pcnt_b",
-    "llvm.mips.pcnt.d" => "__builtin_msa_pcnt_d",
-    "llvm.mips.pcnt.h" => "__builtin_msa_pcnt_h",
-    "llvm.mips.pcnt.w" => "__builtin_msa_pcnt_w",
-    "llvm.mips.pick.ph" => "__builtin_mips_pick_ph",
-    "llvm.mips.pick.qb" => "__builtin_mips_pick_qb",
-    "llvm.mips.preceq.w.phl" => "__builtin_mips_preceq_w_phl",
-    "llvm.mips.preceq.w.phr" => "__builtin_mips_preceq_w_phr",
-    "llvm.mips.precequ.ph.qbl" => "__builtin_mips_precequ_ph_qbl",
-    "llvm.mips.precequ.ph.qbla" => "__builtin_mips_precequ_ph_qbla",
-    "llvm.mips.precequ.ph.qbr" => "__builtin_mips_precequ_ph_qbr",
-    "llvm.mips.precequ.ph.qbra" => "__builtin_mips_precequ_ph_qbra",
-    "llvm.mips.preceu.ph.qbl" => "__builtin_mips_preceu_ph_qbl",
-    "llvm.mips.preceu.ph.qbla" => "__builtin_mips_preceu_ph_qbla",
-    "llvm.mips.preceu.ph.qbr" => "__builtin_mips_preceu_ph_qbr",
-    "llvm.mips.preceu.ph.qbra" => "__builtin_mips_preceu_ph_qbra",
-    "llvm.mips.precr.qb.ph" => "__builtin_mips_precr_qb_ph",
-    "llvm.mips.precr.sra.ph.w" => "__builtin_mips_precr_sra_ph_w",
-    "llvm.mips.precr.sra.r.ph.w" => "__builtin_mips_precr_sra_r_ph_w",
-    "llvm.mips.precrq.ph.w" => "__builtin_mips_precrq_ph_w",
-    "llvm.mips.precrq.qb.ph" => "__builtin_mips_precrq_qb_ph",
-    "llvm.mips.precrq.rs.ph.w" => "__builtin_mips_precrq_rs_ph_w",
-    "llvm.mips.precrqu.s.qb.ph" => "__builtin_mips_precrqu_s_qb_ph",
-    "llvm.mips.prepend" => "__builtin_mips_prepend",
-    "llvm.mips.raddu.w.qb" => "__builtin_mips_raddu_w_qb",
-    "llvm.mips.rddsp" => "__builtin_mips_rddsp",
-    "llvm.mips.repl.ph" => "__builtin_mips_repl_ph",
-    "llvm.mips.repl.qb" => "__builtin_mips_repl_qb",
-    "llvm.mips.sat.s.b" => "__builtin_msa_sat_s_b",
-    "llvm.mips.sat.s.d" => "__builtin_msa_sat_s_d",
-    "llvm.mips.sat.s.h" => "__builtin_msa_sat_s_h",
-    "llvm.mips.sat.s.w" => "__builtin_msa_sat_s_w",
-    "llvm.mips.sat.u.b" => "__builtin_msa_sat_u_b",
-    "llvm.mips.sat.u.d" => "__builtin_msa_sat_u_d",
-    "llvm.mips.sat.u.h" => "__builtin_msa_sat_u_h",
-    "llvm.mips.sat.u.w" => "__builtin_msa_sat_u_w",
-    "llvm.mips.shf.b" => "__builtin_msa_shf_b",
-    "llvm.mips.shf.h" => "__builtin_msa_shf_h",
-    "llvm.mips.shf.w" => "__builtin_msa_shf_w",
-    "llvm.mips.shilo" => "__builtin_mips_shilo",
-    "llvm.mips.shll.ph" => "__builtin_mips_shll_ph",
-    "llvm.mips.shll.qb" => "__builtin_mips_shll_qb",
-    "llvm.mips.shll.s.ph" => "__builtin_mips_shll_s_ph",
-    "llvm.mips.shll.s.w" => "__builtin_mips_shll_s_w",
-    "llvm.mips.shra.ph" => "__builtin_mips_shra_ph",
-    "llvm.mips.shra.qb" => "__builtin_mips_shra_qb",
-    "llvm.mips.shra.r.ph" => "__builtin_mips_shra_r_ph",
-    "llvm.mips.shra.r.qb" => "__builtin_mips_shra_r_qb",
-    "llvm.mips.shra.r.w" => "__builtin_mips_shra_r_w",
-    "llvm.mips.shrl.ph" => "__builtin_mips_shrl_ph",
-    "llvm.mips.shrl.qb" => "__builtin_mips_shrl_qb",
-    "llvm.mips.sld.b" => "__builtin_msa_sld_b",
-    "llvm.mips.sld.d" => "__builtin_msa_sld_d",
-    "llvm.mips.sld.h" => "__builtin_msa_sld_h",
-    "llvm.mips.sld.w" => "__builtin_msa_sld_w",
-    "llvm.mips.sldi.b" => "__builtin_msa_sldi_b",
-    "llvm.mips.sldi.d" => "__builtin_msa_sldi_d",
-    "llvm.mips.sldi.h" => "__builtin_msa_sldi_h",
-    "llvm.mips.sldi.w" => "__builtin_msa_sldi_w",
-    "llvm.mips.sll.b" => "__builtin_msa_sll_b",
-    "llvm.mips.sll.d" => "__builtin_msa_sll_d",
-    "llvm.mips.sll.h" => "__builtin_msa_sll_h",
-    "llvm.mips.sll.w" => "__builtin_msa_sll_w",
-    "llvm.mips.slli.b" => "__builtin_msa_slli_b",
-    "llvm.mips.slli.d" => "__builtin_msa_slli_d",
-    "llvm.mips.slli.h" => "__builtin_msa_slli_h",
-    "llvm.mips.slli.w" => "__builtin_msa_slli_w",
-    "llvm.mips.splat.b" => "__builtin_msa_splat_b",
-    "llvm.mips.splat.d" => "__builtin_msa_splat_d",
-    "llvm.mips.splat.h" => "__builtin_msa_splat_h",
-    "llvm.mips.splat.w" => "__builtin_msa_splat_w",
-    "llvm.mips.splati.b" => "__builtin_msa_splati_b",
-    "llvm.mips.splati.d" => "__builtin_msa_splati_d",
-    "llvm.mips.splati.h" => "__builtin_msa_splati_h",
-    "llvm.mips.splati.w" => "__builtin_msa_splati_w",
-    "llvm.mips.sra.b" => "__builtin_msa_sra_b",
-    "llvm.mips.sra.d" => "__builtin_msa_sra_d",
-    "llvm.mips.sra.h" => "__builtin_msa_sra_h",
-    "llvm.mips.sra.w" => "__builtin_msa_sra_w",
-    "llvm.mips.srai.b" => "__builtin_msa_srai_b",
-    "llvm.mips.srai.d" => "__builtin_msa_srai_d",
-    "llvm.mips.srai.h" => "__builtin_msa_srai_h",
-    "llvm.mips.srai.w" => "__builtin_msa_srai_w",
-    "llvm.mips.srar.b" => "__builtin_msa_srar_b",
-    "llvm.mips.srar.d" => "__builtin_msa_srar_d",
-    "llvm.mips.srar.h" => "__builtin_msa_srar_h",
-    "llvm.mips.srar.w" => "__builtin_msa_srar_w",
-    "llvm.mips.srari.b" => "__builtin_msa_srari_b",
-    "llvm.mips.srari.d" => "__builtin_msa_srari_d",
-    "llvm.mips.srari.h" => "__builtin_msa_srari_h",
-    "llvm.mips.srari.w" => "__builtin_msa_srari_w",
-    "llvm.mips.srl.b" => "__builtin_msa_srl_b",
-    "llvm.mips.srl.d" => "__builtin_msa_srl_d",
-    "llvm.mips.srl.h" => "__builtin_msa_srl_h",
-    "llvm.mips.srl.w" => "__builtin_msa_srl_w",
-    "llvm.mips.srli.b" => "__builtin_msa_srli_b",
-    "llvm.mips.srli.d" => "__builtin_msa_srli_d",
-    "llvm.mips.srli.h" => "__builtin_msa_srli_h",
-    "llvm.mips.srli.w" => "__builtin_msa_srli_w",
-    "llvm.mips.srlr.b" => "__builtin_msa_srlr_b",
-    "llvm.mips.srlr.d" => "__builtin_msa_srlr_d",
-    "llvm.mips.srlr.h" => "__builtin_msa_srlr_h",
-    "llvm.mips.srlr.w" => "__builtin_msa_srlr_w",
-    "llvm.mips.srlri.b" => "__builtin_msa_srlri_b",
-    "llvm.mips.srlri.d" => "__builtin_msa_srlri_d",
-    "llvm.mips.srlri.h" => "__builtin_msa_srlri_h",
-    "llvm.mips.srlri.w" => "__builtin_msa_srlri_w",
-    "llvm.mips.st.b" => "__builtin_msa_st_b",
-    "llvm.mips.st.d" => "__builtin_msa_st_d",
-    "llvm.mips.st.h" => "__builtin_msa_st_h",
-    "llvm.mips.st.w" => "__builtin_msa_st_w",
-    "llvm.mips.str.d" => "__builtin_msa_str_d",
-    "llvm.mips.str.w" => "__builtin_msa_str_w",
-    "llvm.mips.subq.ph" => "__builtin_mips_subq_ph",
-    "llvm.mips.subq.s.ph" => "__builtin_mips_subq_s_ph",
-    "llvm.mips.subq.s.w" => "__builtin_mips_subq_s_w",
-    "llvm.mips.subqh.ph" => "__builtin_mips_subqh_ph",
-    "llvm.mips.subqh.r.ph" => "__builtin_mips_subqh_r_ph",
-    "llvm.mips.subqh.r.w" => "__builtin_mips_subqh_r_w",
-    "llvm.mips.subqh.w" => "__builtin_mips_subqh_w",
-    "llvm.mips.subs.s.b" => "__builtin_msa_subs_s_b",
-    "llvm.mips.subs.s.d" => "__builtin_msa_subs_s_d",
-    "llvm.mips.subs.s.h" => "__builtin_msa_subs_s_h",
-    "llvm.mips.subs.s.w" => "__builtin_msa_subs_s_w",
-    "llvm.mips.subs.u.b" => "__builtin_msa_subs_u_b",
-    "llvm.mips.subs.u.d" => "__builtin_msa_subs_u_d",
-    "llvm.mips.subs.u.h" => "__builtin_msa_subs_u_h",
-    "llvm.mips.subs.u.w" => "__builtin_msa_subs_u_w",
-    "llvm.mips.subsus.u.b" => "__builtin_msa_subsus_u_b",
-    "llvm.mips.subsus.u.d" => "__builtin_msa_subsus_u_d",
-    "llvm.mips.subsus.u.h" => "__builtin_msa_subsus_u_h",
-    "llvm.mips.subsus.u.w" => "__builtin_msa_subsus_u_w",
-    "llvm.mips.subsuu.s.b" => "__builtin_msa_subsuu_s_b",
-    "llvm.mips.subsuu.s.d" => "__builtin_msa_subsuu_s_d",
-    "llvm.mips.subsuu.s.h" => "__builtin_msa_subsuu_s_h",
-    "llvm.mips.subsuu.s.w" => "__builtin_msa_subsuu_s_w",
-    "llvm.mips.subu.ph" => "__builtin_mips_subu_ph",
-    "llvm.mips.subu.qb" => "__builtin_mips_subu_qb",
-    "llvm.mips.subu.s.ph" => "__builtin_mips_subu_s_ph",
-    "llvm.mips.subu.s.qb" => "__builtin_mips_subu_s_qb",
-    "llvm.mips.subuh.qb" => "__builtin_mips_subuh_qb",
-    "llvm.mips.subuh.r.qb" => "__builtin_mips_subuh_r_qb",
-    "llvm.mips.subv.b" => "__builtin_msa_subv_b",
-    "llvm.mips.subv.d" => "__builtin_msa_subv_d",
-    "llvm.mips.subv.h" => "__builtin_msa_subv_h",
-    "llvm.mips.subv.w" => "__builtin_msa_subv_w",
-    "llvm.mips.subvi.b" => "__builtin_msa_subvi_b",
-    "llvm.mips.subvi.d" => "__builtin_msa_subvi_d",
-    "llvm.mips.subvi.h" => "__builtin_msa_subvi_h",
-    "llvm.mips.subvi.w" => "__builtin_msa_subvi_w",
-    "llvm.mips.vshf.b" => "__builtin_msa_vshf_b",
-    "llvm.mips.vshf.d" => "__builtin_msa_vshf_d",
-    "llvm.mips.vshf.h" => "__builtin_msa_vshf_h",
-    "llvm.mips.vshf.w" => "__builtin_msa_vshf_w",
-    "llvm.mips.wrdsp" => "__builtin_mips_wrdsp",
-    "llvm.mips.xor.v" => "__builtin_msa_xor_v",
-    "llvm.mips.xori.b" => "__builtin_msa_xori_b",
-    // nvvm
-    "llvm.nvvm.abs.i" => "__nvvm_abs_i",
-    "llvm.nvvm.abs.ll" => "__nvvm_abs_ll",
-    "llvm.nvvm.activemask" => "__nvvm_activemask",
-    "llvm.nvvm.add.rm.d" => "__nvvm_add_rm_d",
-    "llvm.nvvm.add.rm.f" => "__nvvm_add_rm_f",
-    "llvm.nvvm.add.rm.ftz.f" => "__nvvm_add_rm_ftz_f",
-    "llvm.nvvm.add.rn.d" => "__nvvm_add_rn_d",
-    "llvm.nvvm.add.rn.f" => "__nvvm_add_rn_f",
-    "llvm.nvvm.add.rn.ftz.f" => "__nvvm_add_rn_ftz_f",
-    "llvm.nvvm.add.rp.d" => "__nvvm_add_rp_d",
-    "llvm.nvvm.add.rp.f" => "__nvvm_add_rp_f",
-    "llvm.nvvm.add.rp.ftz.f" => "__nvvm_add_rp_ftz_f",
-    "llvm.nvvm.add.rz.d" => "__nvvm_add_rz_d",
-    "llvm.nvvm.add.rz.f" => "__nvvm_add_rz_f",
-    "llvm.nvvm.add.rz.ftz.f" => "__nvvm_add_rz_ftz_f",
-    "llvm.nvvm.bar.sync" => "__nvvm_bar_sync",
-    "llvm.nvvm.bar.warp.sync" => "__nvvm_bar_warp_sync",
-    "llvm.nvvm.barrier" => "__nvvm_bar",
-    "llvm.nvvm.barrier.n" => "__nvvm_bar_n",
-    "llvm.nvvm.barrier.sync" => "__nvvm_barrier_sync",
-    "llvm.nvvm.barrier.sync.cnt" => "__nvvm_barrier_sync_cnt",
-    "llvm.nvvm.barrier0" => "__syncthreads",
-    // [DUPLICATE]: "llvm.nvvm.barrier0" => "__nvvm_bar0",
-    "llvm.nvvm.barrier0.and" => "__nvvm_bar0_and",
-    "llvm.nvvm.barrier0.or" => "__nvvm_bar0_or",
-    "llvm.nvvm.barrier0.popc" => "__nvvm_bar0_popc",
-    "llvm.nvvm.bf16x2.to.ue8m0x2.rp" => "__nvvm_bf16x2_to_ue8m0x2_rp",
-    "llvm.nvvm.bf16x2.to.ue8m0x2.rp.satfinite" => "__nvvm_bf16x2_to_ue8m0x2_rp_satfinite",
-    "llvm.nvvm.bf16x2.to.ue8m0x2.rz" => "__nvvm_bf16x2_to_ue8m0x2_rz",
-    "llvm.nvvm.bf16x2.to.ue8m0x2.rz.satfinite" => "__nvvm_bf16x2_to_ue8m0x2_rz_satfinite",
-    "llvm.nvvm.bf2h.rn" => "__nvvm_bf2h_rn",
-    "llvm.nvvm.bf2h.rn.ftz" => "__nvvm_bf2h_rn_ftz",
-    "llvm.nvvm.bitcast.d2ll" => "__nvvm_bitcast_d2ll",
-    "llvm.nvvm.bitcast.f2i" => "__nvvm_bitcast_f2i",
-    "llvm.nvvm.bitcast.i2f" => "__nvvm_bitcast_i2f",
-    "llvm.nvvm.bitcast.ll2d" => "__nvvm_bitcast_ll2d",
-    "llvm.nvvm.brev32" => "__nvvm_brev32",
-    "llvm.nvvm.brev64" => "__nvvm_brev64",
-    "llvm.nvvm.ceil.d" => "__nvvm_ceil_d",
-    "llvm.nvvm.ceil.f" => "__nvvm_ceil_f",
-    "llvm.nvvm.ceil.ftz.f" => "__nvvm_ceil_ftz_f",
-    "llvm.nvvm.clz.i" => "__nvvm_clz_i",
-    "llvm.nvvm.clz.ll" => "__nvvm_clz_ll",
-    "llvm.nvvm.cos.approx.f" => "__nvvm_cos_approx_f",
-    "llvm.nvvm.cos.approx.ftz.f" => "__nvvm_cos_approx_ftz_f",
-    "llvm.nvvm.cp.async.commit.group" => "__nvvm_cp_async_commit_group",
-    "llvm.nvvm.cp.async.mbarrier.arrive" => "__nvvm_cp_async_mbarrier_arrive",
-    "llvm.nvvm.cp.async.mbarrier.arrive.noinc" => "__nvvm_cp_async_mbarrier_arrive_noinc",
-    "llvm.nvvm.cp.async.mbarrier.arrive.noinc.shared" => "__nvvm_cp_async_mbarrier_arrive_noinc_shared",
-    "llvm.nvvm.cp.async.mbarrier.arrive.shared" => "__nvvm_cp_async_mbarrier_arrive_shared",
-    "llvm.nvvm.cp.async.wait.all" => "__nvvm_cp_async_wait_all",
-    "llvm.nvvm.cp.async.wait.group" => "__nvvm_cp_async_wait_group",
-    "llvm.nvvm.d2f.rm" => "__nvvm_d2f_rm",
-    "llvm.nvvm.d2f.rm.ftz" => "__nvvm_d2f_rm_ftz",
-    "llvm.nvvm.d2f.rn" => "__nvvm_d2f_rn",
-    "llvm.nvvm.d2f.rn.ftz" => "__nvvm_d2f_rn_ftz",
-    "llvm.nvvm.d2f.rp" => "__nvvm_d2f_rp",
-    "llvm.nvvm.d2f.rp.ftz" => "__nvvm_d2f_rp_ftz",
-    "llvm.nvvm.d2f.rz" => "__nvvm_d2f_rz",
-    "llvm.nvvm.d2f.rz.ftz" => "__nvvm_d2f_rz_ftz",
-    "llvm.nvvm.d2i.hi" => "__nvvm_d2i_hi",
-    "llvm.nvvm.d2i.lo" => "__nvvm_d2i_lo",
-    "llvm.nvvm.d2i.rm" => "__nvvm_d2i_rm",
-    "llvm.nvvm.d2i.rn" => "__nvvm_d2i_rn",
-    "llvm.nvvm.d2i.rp" => "__nvvm_d2i_rp",
-    "llvm.nvvm.d2i.rz" => "__nvvm_d2i_rz",
-    "llvm.nvvm.d2ll.rm" => "__nvvm_d2ll_rm",
-    "llvm.nvvm.d2ll.rn" => "__nvvm_d2ll_rn",
-    "llvm.nvvm.d2ll.rp" => "__nvvm_d2ll_rp",
-    "llvm.nvvm.d2ll.rz" => "__nvvm_d2ll_rz",
-    "llvm.nvvm.d2ui.rm" => "__nvvm_d2ui_rm",
-    "llvm.nvvm.d2ui.rn" => "__nvvm_d2ui_rn",
-    "llvm.nvvm.d2ui.rp" => "__nvvm_d2ui_rp",
-    "llvm.nvvm.d2ui.rz" => "__nvvm_d2ui_rz",
-    "llvm.nvvm.d2ull.rm" => "__nvvm_d2ull_rm",
-    "llvm.nvvm.d2ull.rn" => "__nvvm_d2ull_rn",
-    "llvm.nvvm.d2ull.rp" => "__nvvm_d2ull_rp",
-    "llvm.nvvm.d2ull.rz" => "__nvvm_d2ull_rz",
-    "llvm.nvvm.div.approx.f" => "__nvvm_div_approx_f",
-    "llvm.nvvm.div.approx.ftz.f" => "__nvvm_div_approx_ftz_f",
-    "llvm.nvvm.div.full" => "__nvvm_div_full",
-    "llvm.nvvm.div.full.ftz" => "__nvvm_div_full_ftz",
-    "llvm.nvvm.div.rm.d" => "__nvvm_div_rm_d",
-    "llvm.nvvm.div.rm.f" => "__nvvm_div_rm_f",
-    "llvm.nvvm.div.rm.ftz.f" => "__nvvm_div_rm_ftz_f",
-    "llvm.nvvm.div.rn.d" => "__nvvm_div_rn_d",
-    "llvm.nvvm.div.rn.f" => "__nvvm_div_rn_f",
-    "llvm.nvvm.div.rn.ftz.f" => "__nvvm_div_rn_ftz_f",
-    "llvm.nvvm.div.rp.d" => "__nvvm_div_rp_d",
-    "llvm.nvvm.div.rp.f" => "__nvvm_div_rp_f",
-    "llvm.nvvm.div.rp.ftz.f" => "__nvvm_div_rp_ftz_f",
-    "llvm.nvvm.div.rz.d" => "__nvvm_div_rz_d",
-    "llvm.nvvm.div.rz.f" => "__nvvm_div_rz_f",
-    "llvm.nvvm.div.rz.ftz.f" => "__nvvm_div_rz_ftz_f",
-    "llvm.nvvm.e2m3x2.to.f16x2.rn" => "__nvvm_e2m3x2_to_f16x2_rn",
-    "llvm.nvvm.e2m3x2.to.f16x2.rn.relu" => "__nvvm_e2m3x2_to_f16x2_rn_relu",
-    "llvm.nvvm.e3m2x2.to.f16x2.rn" => "__nvvm_e3m2x2_to_f16x2_rn",
-    "llvm.nvvm.e3m2x2.to.f16x2.rn.relu" => "__nvvm_e3m2x2_to_f16x2_rn_relu",
-    "llvm.nvvm.e4m3x2.to.f16x2.rn" => "__nvvm_e4m3x2_to_f16x2_rn",
-    "llvm.nvvm.e4m3x2.to.f16x2.rn.relu" => "__nvvm_e4m3x2_to_f16x2_rn_relu",
-    "llvm.nvvm.e5m2x2.to.f16x2.rn" => "__nvvm_e5m2x2_to_f16x2_rn",
-    "llvm.nvvm.e5m2x2.to.f16x2.rn.relu" => "__nvvm_e5m2x2_to_f16x2_rn_relu",
-    "llvm.nvvm.ex2.approx.d" => "__nvvm_ex2_approx_d",
-    "llvm.nvvm.ex2.approx.f" => "__nvvm_ex2_approx_f",
-    "llvm.nvvm.ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f",
-    "llvm.nvvm.exit" => "__nvvm_exit",
-    "llvm.nvvm.f16x2.to.e4m3x2.rn" => "__nvvm_f16x2_to_e4m3x2_rn",
-    "llvm.nvvm.f16x2.to.e4m3x2.rn.relu" => "__nvvm_f16x2_to_e4m3x2_rn_relu",
-    "llvm.nvvm.f16x2.to.e5m2x2.rn" => "__nvvm_f16x2_to_e5m2x2_rn",
-    "llvm.nvvm.f16x2.to.e5m2x2.rn.relu" => "__nvvm_f16x2_to_e5m2x2_rn_relu",
-    "llvm.nvvm.f2bf16.rn" => "__nvvm_f2bf16_rn",
-    "llvm.nvvm.f2bf16.rn.relu" => "__nvvm_f2bf16_rn_relu",
-    "llvm.nvvm.f2bf16.rz" => "__nvvm_f2bf16_rz",
-    "llvm.nvvm.f2bf16.rz.relu" => "__nvvm_f2bf16_rz_relu",
-    "llvm.nvvm.f2h.rn" => "__nvvm_f2h_rn",
-    "llvm.nvvm.f2h.rn.ftz" => "__nvvm_f2h_rn_ftz",
-    "llvm.nvvm.f2i.rm" => "__nvvm_f2i_rm",
-    "llvm.nvvm.f2i.rm.ftz" => "__nvvm_f2i_rm_ftz",
-    "llvm.nvvm.f2i.rn" => "__nvvm_f2i_rn",
-    "llvm.nvvm.f2i.rn.ftz" => "__nvvm_f2i_rn_ftz",
-    "llvm.nvvm.f2i.rp" => "__nvvm_f2i_rp",
-    "llvm.nvvm.f2i.rp.ftz" => "__nvvm_f2i_rp_ftz",
-    "llvm.nvvm.f2i.rz" => "__nvvm_f2i_rz",
-    "llvm.nvvm.f2i.rz.ftz" => "__nvvm_f2i_rz_ftz",
-    "llvm.nvvm.f2ll.rm" => "__nvvm_f2ll_rm",
-    "llvm.nvvm.f2ll.rm.ftz" => "__nvvm_f2ll_rm_ftz",
-    "llvm.nvvm.f2ll.rn" => "__nvvm_f2ll_rn",
-    "llvm.nvvm.f2ll.rn.ftz" => "__nvvm_f2ll_rn_ftz",
-    "llvm.nvvm.f2ll.rp" => "__nvvm_f2ll_rp",
-    "llvm.nvvm.f2ll.rp.ftz" => "__nvvm_f2ll_rp_ftz",
-    "llvm.nvvm.f2ll.rz" => "__nvvm_f2ll_rz",
-    "llvm.nvvm.f2ll.rz.ftz" => "__nvvm_f2ll_rz_ftz",
-    "llvm.nvvm.f2tf32.rn" => "__nvvm_f2tf32_rn",
-    "llvm.nvvm.f2tf32.rn.relu" => "__nvvm_f2tf32_rn_relu",
-    "llvm.nvvm.f2tf32.rn.relu.satfinite" => "__nvvm_f2tf32_rn_relu_satfinite",
-    "llvm.nvvm.f2tf32.rn.satfinite" => "__nvvm_f2tf32_rn_satfinite",
-    "llvm.nvvm.f2tf32.rna" => "__nvvm_f2tf32_rna",
-    "llvm.nvvm.f2tf32.rna.satfinite" => "__nvvm_f2tf32_rna_satfinite",
-    "llvm.nvvm.f2tf32.rz" => "__nvvm_f2tf32_rz",
-    "llvm.nvvm.f2tf32.rz.relu" => "__nvvm_f2tf32_rz_relu",
-    "llvm.nvvm.f2tf32.rz.relu.satfinite" => "__nvvm_f2tf32_rz_relu_satfinite",
-    "llvm.nvvm.f2tf32.rz.satfinite" => "__nvvm_f2tf32_rz_satfinite",
-    "llvm.nvvm.f2ui.rm" => "__nvvm_f2ui_rm",
-    "llvm.nvvm.f2ui.rm.ftz" => "__nvvm_f2ui_rm_ftz",
-    "llvm.nvvm.f2ui.rn" => "__nvvm_f2ui_rn",
-    "llvm.nvvm.f2ui.rn.ftz" => "__nvvm_f2ui_rn_ftz",
-    "llvm.nvvm.f2ui.rp" => "__nvvm_f2ui_rp",
-    "llvm.nvvm.f2ui.rp.ftz" => "__nvvm_f2ui_rp_ftz",
-    "llvm.nvvm.f2ui.rz" => "__nvvm_f2ui_rz",
-    "llvm.nvvm.f2ui.rz.ftz" => "__nvvm_f2ui_rz_ftz",
-    "llvm.nvvm.f2ull.rm" => "__nvvm_f2ull_rm",
-    "llvm.nvvm.f2ull.rm.ftz" => "__nvvm_f2ull_rm_ftz",
-    "llvm.nvvm.f2ull.rn" => "__nvvm_f2ull_rn",
-    "llvm.nvvm.f2ull.rn.ftz" => "__nvvm_f2ull_rn_ftz",
-    "llvm.nvvm.f2ull.rp" => "__nvvm_f2ull_rp",
-    "llvm.nvvm.f2ull.rp.ftz" => "__nvvm_f2ull_rp_ftz",
-    "llvm.nvvm.f2ull.rz" => "__nvvm_f2ull_rz",
-    "llvm.nvvm.f2ull.rz.ftz" => "__nvvm_f2ull_rz_ftz",
-    "llvm.nvvm.fabs.d" => "__nvvm_fabs_d",
-    "llvm.nvvm.fabs.f" => "__nvvm_fabs_f",
-    "llvm.nvvm.fabs.ftz.f" => "__nvvm_fabs_ftz_f",
-    "llvm.nvvm.ff.to.e2m3x2.rn.relu.satfinite" => "__nvvm_ff_to_e2m3x2_rn_relu_satfinite",
-    "llvm.nvvm.ff.to.e2m3x2.rn.satfinite" => "__nvvm_ff_to_e2m3x2_rn_satfinite",
-    "llvm.nvvm.ff.to.e3m2x2.rn.relu.satfinite" => "__nvvm_ff_to_e3m2x2_rn_relu_satfinite",
-    "llvm.nvvm.ff.to.e3m2x2.rn.satfinite" => "__nvvm_ff_to_e3m2x2_rn_satfinite",
-    "llvm.nvvm.ff.to.e4m3x2.rn" => "__nvvm_ff_to_e4m3x2_rn",
-    "llvm.nvvm.ff.to.e4m3x2.rn.relu" => "__nvvm_ff_to_e4m3x2_rn_relu",
-    "llvm.nvvm.ff.to.e5m2x2.rn" => "__nvvm_ff_to_e5m2x2_rn",
-    "llvm.nvvm.ff.to.e5m2x2.rn.relu" => "__nvvm_ff_to_e5m2x2_rn_relu",
-    "llvm.nvvm.ff.to.ue8m0x2.rp" => "__nvvm_ff_to_ue8m0x2_rp",
-    "llvm.nvvm.ff.to.ue8m0x2.rp.satfinite" => "__nvvm_ff_to_ue8m0x2_rp_satfinite",
-    "llvm.nvvm.ff.to.ue8m0x2.rz" => "__nvvm_ff_to_ue8m0x2_rz",
-    "llvm.nvvm.ff.to.ue8m0x2.rz.satfinite" => "__nvvm_ff_to_ue8m0x2_rz_satfinite",
-    "llvm.nvvm.ff2bf16x2.rn" => "__nvvm_ff2bf16x2_rn",
-    "llvm.nvvm.ff2bf16x2.rn.relu" => "__nvvm_ff2bf16x2_rn_relu",
-    "llvm.nvvm.ff2bf16x2.rz" => "__nvvm_ff2bf16x2_rz",
-    "llvm.nvvm.ff2bf16x2.rz.relu" => "__nvvm_ff2bf16x2_rz_relu",
-    "llvm.nvvm.ff2f16x2.rn" => "__nvvm_ff2f16x2_rn",
-    "llvm.nvvm.ff2f16x2.rn.relu" => "__nvvm_ff2f16x2_rn_relu",
-    "llvm.nvvm.ff2f16x2.rz" => "__nvvm_ff2f16x2_rz",
-    "llvm.nvvm.ff2f16x2.rz.relu" => "__nvvm_ff2f16x2_rz_relu",
-    "llvm.nvvm.floor.d" => "__nvvm_floor_d",
-    "llvm.nvvm.floor.f" => "__nvvm_floor_f",
-    "llvm.nvvm.floor.ftz.f" => "__nvvm_floor_ftz_f",
-    "llvm.nvvm.fma.rm.d" => "__nvvm_fma_rm_d",
-    "llvm.nvvm.fma.rm.f" => "__nvvm_fma_rm_f",
-    "llvm.nvvm.fma.rm.ftz.f" => "__nvvm_fma_rm_ftz_f",
-    "llvm.nvvm.fma.rn.bf16" => "__nvvm_fma_rn_bf16",
-    "llvm.nvvm.fma.rn.bf16x2" => "__nvvm_fma_rn_bf16x2",
-    "llvm.nvvm.fma.rn.d" => "__nvvm_fma_rn_d",
-    "llvm.nvvm.fma.rn.f" => "__nvvm_fma_rn_f",
-    "llvm.nvvm.fma.rn.ftz.bf16" => "__nvvm_fma_rn_ftz_bf16",
-    "llvm.nvvm.fma.rn.ftz.bf16x2" => "__nvvm_fma_rn_ftz_bf16x2",
-    "llvm.nvvm.fma.rn.ftz.f" => "__nvvm_fma_rn_ftz_f",
-    "llvm.nvvm.fma.rn.ftz.relu.bf16" => "__nvvm_fma_rn_ftz_relu_bf16",
-    "llvm.nvvm.fma.rn.ftz.relu.bf16x2" => "__nvvm_fma_rn_ftz_relu_bf16x2",
-    "llvm.nvvm.fma.rn.ftz.sat.bf16" => "__nvvm_fma_rn_ftz_sat_bf16",
-    "llvm.nvvm.fma.rn.ftz.sat.bf16x2" => "__nvvm_fma_rn_ftz_sat_bf16x2",
-    "llvm.nvvm.fma.rn.relu.bf16" => "__nvvm_fma_rn_relu_bf16",
-    "llvm.nvvm.fma.rn.relu.bf16x2" => "__nvvm_fma_rn_relu_bf16x2",
-    "llvm.nvvm.fma.rn.sat.bf16" => "__nvvm_fma_rn_sat_bf16",
-    "llvm.nvvm.fma.rn.sat.bf16x2" => "__nvvm_fma_rn_sat_bf16x2",
-    "llvm.nvvm.fma.rp.d" => "__nvvm_fma_rp_d",
-    "llvm.nvvm.fma.rp.f" => "__nvvm_fma_rp_f",
-    "llvm.nvvm.fma.rp.ftz.f" => "__nvvm_fma_rp_ftz_f",
-    "llvm.nvvm.fma.rz.d" => "__nvvm_fma_rz_d",
-    "llvm.nvvm.fma.rz.f" => "__nvvm_fma_rz_f",
-    "llvm.nvvm.fma.rz.ftz.f" => "__nvvm_fma_rz_ftz_f",
-    "llvm.nvvm.fmax.bf16" => "__nvvm_fmax_bf16",
-    "llvm.nvvm.fmax.bf16x2" => "__nvvm_fmax_bf16x2",
-    "llvm.nvvm.fmax.d" => "__nvvm_fmax_d",
-    "llvm.nvvm.fmax.f" => "__nvvm_fmax_f",
-    "llvm.nvvm.fmax.ftz.bf16" => "__nvvm_fmax_ftz_bf16",
-    "llvm.nvvm.fmax.ftz.bf16x2" => "__nvvm_fmax_ftz_bf16x2",
-    "llvm.nvvm.fmax.ftz.f" => "__nvvm_fmax_ftz_f",
-    "llvm.nvvm.fmax.ftz.nan.bf16" => "__nvvm_fmax_ftz_nan_bf16",
-    "llvm.nvvm.fmax.ftz.nan.bf16x2" => "__nvvm_fmax_ftz_nan_bf16x2",
-    "llvm.nvvm.fmax.ftz.nan.f" => "__nvvm_fmax_ftz_nan_f",
-    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.bf16" => "__nvvm_fmax_ftz_nan_xorsign_abs_bf16",
-    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.bf16x2" => "__nvvm_fmax_ftz_nan_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.f" => "__nvvm_fmax_ftz_nan_xorsign_abs_f",
-    "llvm.nvvm.fmax.ftz.xorsign.abs.bf16" => "__nvvm_fmax_ftz_xorsign_abs_bf16",
-    "llvm.nvvm.fmax.ftz.xorsign.abs.bf16x2" => "__nvvm_fmax_ftz_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmax.ftz.xorsign.abs.f" => "__nvvm_fmax_ftz_xorsign_abs_f",
-    "llvm.nvvm.fmax.nan.bf16" => "__nvvm_fmax_nan_bf16",
-    "llvm.nvvm.fmax.nan.bf16x2" => "__nvvm_fmax_nan_bf16x2",
-    "llvm.nvvm.fmax.nan.f" => "__nvvm_fmax_nan_f",
-    "llvm.nvvm.fmax.nan.xorsign.abs.bf16" => "__nvvm_fmax_nan_xorsign_abs_bf16",
-    "llvm.nvvm.fmax.nan.xorsign.abs.bf16x2" => "__nvvm_fmax_nan_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmax.nan.xorsign.abs.f" => "__nvvm_fmax_nan_xorsign_abs_f",
-    "llvm.nvvm.fmax.xorsign.abs.bf16" => "__nvvm_fmax_xorsign_abs_bf16",
-    "llvm.nvvm.fmax.xorsign.abs.bf16x2" => "__nvvm_fmax_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmax.xorsign.abs.f" => "__nvvm_fmax_xorsign_abs_f",
-    "llvm.nvvm.fmin.bf16" => "__nvvm_fmin_bf16",
-    "llvm.nvvm.fmin.bf16x2" => "__nvvm_fmin_bf16x2",
-    "llvm.nvvm.fmin.d" => "__nvvm_fmin_d",
-    "llvm.nvvm.fmin.f" => "__nvvm_fmin_f",
-    "llvm.nvvm.fmin.ftz.bf16" => "__nvvm_fmin_ftz_bf16",
-    "llvm.nvvm.fmin.ftz.bf16x2" => "__nvvm_fmin_ftz_bf16x2",
-    "llvm.nvvm.fmin.ftz.f" => "__nvvm_fmin_ftz_f",
-    "llvm.nvvm.fmin.ftz.nan.bf16" => "__nvvm_fmin_ftz_nan_bf16",
-    "llvm.nvvm.fmin.ftz.nan.bf16x2" => "__nvvm_fmin_ftz_nan_bf16x2",
-    "llvm.nvvm.fmin.ftz.nan.f" => "__nvvm_fmin_ftz_nan_f",
-    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.bf16" => "__nvvm_fmin_ftz_nan_xorsign_abs_bf16",
-    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.bf16x2" => "__nvvm_fmin_ftz_nan_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.f" => "__nvvm_fmin_ftz_nan_xorsign_abs_f",
-    "llvm.nvvm.fmin.ftz.xorsign.abs.bf16" => "__nvvm_fmin_ftz_xorsign_abs_bf16",
-    "llvm.nvvm.fmin.ftz.xorsign.abs.bf16x2" => "__nvvm_fmin_ftz_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmin.ftz.xorsign.abs.f" => "__nvvm_fmin_ftz_xorsign_abs_f",
-    "llvm.nvvm.fmin.nan.bf16" => "__nvvm_fmin_nan_bf16",
-    "llvm.nvvm.fmin.nan.bf16x2" => "__nvvm_fmin_nan_bf16x2",
-    "llvm.nvvm.fmin.nan.f" => "__nvvm_fmin_nan_f",
-    "llvm.nvvm.fmin.nan.xorsign.abs.bf16" => "__nvvm_fmin_nan_xorsign_abs_bf16",
-    "llvm.nvvm.fmin.nan.xorsign.abs.bf16x2" => "__nvvm_fmin_nan_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmin.nan.xorsign.abs.f" => "__nvvm_fmin_nan_xorsign_abs_f",
-    "llvm.nvvm.fmin.xorsign.abs.bf16" => "__nvvm_fmin_xorsign_abs_bf16",
-    "llvm.nvvm.fmin.xorsign.abs.bf16x2" => "__nvvm_fmin_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmin.xorsign.abs.f" => "__nvvm_fmin_xorsign_abs_f",
-    "llvm.nvvm.fns" => "__nvvm_fns",
-    "llvm.nvvm.h2f" => "__nvvm_h2f",
-    "llvm.nvvm.i2d.rm" => "__nvvm_i2d_rm",
-    "llvm.nvvm.i2d.rn" => "__nvvm_i2d_rn",
-    "llvm.nvvm.i2d.rp" => "__nvvm_i2d_rp",
-    "llvm.nvvm.i2d.rz" => "__nvvm_i2d_rz",
-    "llvm.nvvm.i2f.rm" => "__nvvm_i2f_rm",
-    "llvm.nvvm.i2f.rn" => "__nvvm_i2f_rn",
-    "llvm.nvvm.i2f.rp" => "__nvvm_i2f_rp",
-    "llvm.nvvm.i2f.rz" => "__nvvm_i2f_rz",
-    "llvm.nvvm.isspacep.const" => "__nvvm_isspacep_const",
-    "llvm.nvvm.isspacep.global" => "__nvvm_isspacep_global",
-    "llvm.nvvm.isspacep.local" => "__nvvm_isspacep_local",
-    "llvm.nvvm.isspacep.shared" => "__nvvm_isspacep_shared",
-    "llvm.nvvm.istypep.sampler" => "__nvvm_istypep_sampler",
-    "llvm.nvvm.istypep.surface" => "__nvvm_istypep_surface",
-    "llvm.nvvm.istypep.texture" => "__nvvm_istypep_texture",
-    "llvm.nvvm.lg2.approx.d" => "__nvvm_lg2_approx_d",
-    "llvm.nvvm.lg2.approx.f" => "__nvvm_lg2_approx_f",
-    "llvm.nvvm.lg2.approx.ftz.f" => "__nvvm_lg2_approx_ftz_f",
-    "llvm.nvvm.ll2d.rm" => "__nvvm_ll2d_rm",
-    "llvm.nvvm.ll2d.rn" => "__nvvm_ll2d_rn",
-    "llvm.nvvm.ll2d.rp" => "__nvvm_ll2d_rp",
-    "llvm.nvvm.ll2d.rz" => "__nvvm_ll2d_rz",
-    "llvm.nvvm.ll2f.rm" => "__nvvm_ll2f_rm",
-    "llvm.nvvm.ll2f.rn" => "__nvvm_ll2f_rn",
-    "llvm.nvvm.ll2f.rp" => "__nvvm_ll2f_rp",
-    "llvm.nvvm.ll2f.rz" => "__nvvm_ll2f_rz",
-    "llvm.nvvm.lohi.i2d" => "__nvvm_lohi_i2d",
-    "llvm.nvvm.match.any.sync.i32" => "__nvvm_match_any_sync_i32",
-    "llvm.nvvm.match.any.sync.i64" => "__nvvm_match_any_sync_i64",
-    "llvm.nvvm.max.i" => "__nvvm_max_i",
-    "llvm.nvvm.max.ll" => "__nvvm_max_ll",
-    "llvm.nvvm.max.ui" => "__nvvm_max_ui",
-    "llvm.nvvm.max.ull" => "__nvvm_max_ull",
-    "llvm.nvvm.mbarrier.arrive" => "__nvvm_mbarrier_arrive",
-    "llvm.nvvm.mbarrier.arrive.drop" => "__nvvm_mbarrier_arrive_drop",
-    "llvm.nvvm.mbarrier.arrive.drop.noComplete" => "__nvvm_mbarrier_arrive_drop_noComplete",
-    "llvm.nvvm.mbarrier.arrive.drop.noComplete.shared" => "__nvvm_mbarrier_arrive_drop_noComplete_shared",
-    "llvm.nvvm.mbarrier.arrive.drop.shared" => "__nvvm_mbarrier_arrive_drop_shared",
-    "llvm.nvvm.mbarrier.arrive.noComplete" => "__nvvm_mbarrier_arrive_noComplete",
-    "llvm.nvvm.mbarrier.arrive.noComplete.shared" => "__nvvm_mbarrier_arrive_noComplete_shared",
-    "llvm.nvvm.mbarrier.arrive.shared" => "__nvvm_mbarrier_arrive_shared",
-    "llvm.nvvm.mbarrier.init" => "__nvvm_mbarrier_init",
-    "llvm.nvvm.mbarrier.init.shared" => "__nvvm_mbarrier_init_shared",
-    "llvm.nvvm.mbarrier.inval" => "__nvvm_mbarrier_inval",
-    "llvm.nvvm.mbarrier.inval.shared" => "__nvvm_mbarrier_inval_shared",
-    "llvm.nvvm.mbarrier.pending.count" => "__nvvm_mbarrier_pending_count",
-    "llvm.nvvm.mbarrier.test.wait" => "__nvvm_mbarrier_test_wait",
-    "llvm.nvvm.mbarrier.test.wait.shared" => "__nvvm_mbarrier_test_wait_shared",
-    "llvm.nvvm.membar.cta" => "__nvvm_membar_cta",
-    "llvm.nvvm.membar.gl" => "__nvvm_membar_gl",
-    "llvm.nvvm.membar.sys" => "__nvvm_membar_sys",
-    "llvm.nvvm.min.i" => "__nvvm_min_i",
-    "llvm.nvvm.min.ll" => "__nvvm_min_ll",
-    "llvm.nvvm.min.ui" => "__nvvm_min_ui",
-    "llvm.nvvm.min.ull" => "__nvvm_min_ull",
-    "llvm.nvvm.mul.rm.d" => "__nvvm_mul_rm_d",
-    "llvm.nvvm.mul.rm.f" => "__nvvm_mul_rm_f",
-    "llvm.nvvm.mul.rm.ftz.f" => "__nvvm_mul_rm_ftz_f",
-    "llvm.nvvm.mul.rn.d" => "__nvvm_mul_rn_d",
-    "llvm.nvvm.mul.rn.f" => "__nvvm_mul_rn_f",
-    "llvm.nvvm.mul.rn.ftz.f" => "__nvvm_mul_rn_ftz_f",
-    "llvm.nvvm.mul.rp.d" => "__nvvm_mul_rp_d",
-    "llvm.nvvm.mul.rp.f" => "__nvvm_mul_rp_f",
-    "llvm.nvvm.mul.rp.ftz.f" => "__nvvm_mul_rp_ftz_f",
-    "llvm.nvvm.mul.rz.d" => "__nvvm_mul_rz_d",
-    "llvm.nvvm.mul.rz.f" => "__nvvm_mul_rz_f",
-    "llvm.nvvm.mul.rz.ftz.f" => "__nvvm_mul_rz_ftz_f",
-    "llvm.nvvm.mul24.i" => "__nvvm_mul24_i",
-    "llvm.nvvm.mul24.ui" => "__nvvm_mul24_ui",
-    "llvm.nvvm.mulhi.i" => "__nvvm_mulhi_i",
-    "llvm.nvvm.mulhi.ll" => "__nvvm_mulhi_ll",
-    "llvm.nvvm.mulhi.s" => "__nvvm_mulhi_s",
-    "llvm.nvvm.mulhi.ui" => "__nvvm_mulhi_ui",
-    "llvm.nvvm.mulhi.ull" => "__nvvm_mulhi_ull",
-    "llvm.nvvm.mulhi.us" => "__nvvm_mulhi_us",
-    "llvm.nvvm.nanosleep" => "__nvvm_nanosleep",
-    "llvm.nvvm.neg.bf16" => "__nvvm_neg_bf16",
-    "llvm.nvvm.neg.bf16x2" => "__nvvm_neg_bf16x2",
-    "llvm.nvvm.popc.i" => "__nvvm_popc_i",
-    "llvm.nvvm.popc.ll" => "__nvvm_popc_ll",
-    "llvm.nvvm.prmt" => "__nvvm_prmt",
-    "llvm.nvvm.rcp.approx.ftz.d" => "__nvvm_rcp_approx_ftz_d",
-    "llvm.nvvm.rcp.approx.ftz.f" => "__nvvm_rcp_approx_ftz_f",
-    "llvm.nvvm.rcp.rm.d" => "__nvvm_rcp_rm_d",
-    "llvm.nvvm.rcp.rm.f" => "__nvvm_rcp_rm_f",
-    "llvm.nvvm.rcp.rm.ftz.f" => "__nvvm_rcp_rm_ftz_f",
-    "llvm.nvvm.rcp.rn.d" => "__nvvm_rcp_rn_d",
-    "llvm.nvvm.rcp.rn.f" => "__nvvm_rcp_rn_f",
-    "llvm.nvvm.rcp.rn.ftz.f" => "__nvvm_rcp_rn_ftz_f",
-    "llvm.nvvm.rcp.rp.d" => "__nvvm_rcp_rp_d",
-    "llvm.nvvm.rcp.rp.f" => "__nvvm_rcp_rp_f",
-    "llvm.nvvm.rcp.rp.ftz.f" => "__nvvm_rcp_rp_ftz_f",
-    "llvm.nvvm.rcp.rz.d" => "__nvvm_rcp_rz_d",
-    "llvm.nvvm.rcp.rz.f" => "__nvvm_rcp_rz_f",
-    "llvm.nvvm.rcp.rz.ftz.f" => "__nvvm_rcp_rz_ftz_f",
-    "llvm.nvvm.read.ptx.sreg.clock" => "__nvvm_read_ptx_sreg_clock",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.clock" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.clock64" => "__nvvm_read_ptx_sreg_clock64",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.clock64" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.ctaid.w" => "__nvvm_read_ptx_sreg_ctaid_w",
-    "llvm.nvvm.read.ptx.sreg.ctaid.x" => "__nvvm_read_ptx_sreg_ctaid_x",
-    "llvm.nvvm.read.ptx.sreg.ctaid.y" => "__nvvm_read_ptx_sreg_ctaid_y",
-    "llvm.nvvm.read.ptx.sreg.ctaid.z" => "__nvvm_read_ptx_sreg_ctaid_z",
-    "llvm.nvvm.read.ptx.sreg.envreg0" => "__nvvm_read_ptx_sreg_envreg0",
-    "llvm.nvvm.read.ptx.sreg.envreg1" => "__nvvm_read_ptx_sreg_envreg1",
-    "llvm.nvvm.read.ptx.sreg.envreg10" => "__nvvm_read_ptx_sreg_envreg10",
-    "llvm.nvvm.read.ptx.sreg.envreg11" => "__nvvm_read_ptx_sreg_envreg11",
-    "llvm.nvvm.read.ptx.sreg.envreg12" => "__nvvm_read_ptx_sreg_envreg12",
-    "llvm.nvvm.read.ptx.sreg.envreg13" => "__nvvm_read_ptx_sreg_envreg13",
-    "llvm.nvvm.read.ptx.sreg.envreg14" => "__nvvm_read_ptx_sreg_envreg14",
-    "llvm.nvvm.read.ptx.sreg.envreg15" => "__nvvm_read_ptx_sreg_envreg15",
-    "llvm.nvvm.read.ptx.sreg.envreg16" => "__nvvm_read_ptx_sreg_envreg16",
-    "llvm.nvvm.read.ptx.sreg.envreg17" => "__nvvm_read_ptx_sreg_envreg17",
-    "llvm.nvvm.read.ptx.sreg.envreg18" => "__nvvm_read_ptx_sreg_envreg18",
-    "llvm.nvvm.read.ptx.sreg.envreg19" => "__nvvm_read_ptx_sreg_envreg19",
-    "llvm.nvvm.read.ptx.sreg.envreg2" => "__nvvm_read_ptx_sreg_envreg2",
-    "llvm.nvvm.read.ptx.sreg.envreg20" => "__nvvm_read_ptx_sreg_envreg20",
-    "llvm.nvvm.read.ptx.sreg.envreg21" => "__nvvm_read_ptx_sreg_envreg21",
-    "llvm.nvvm.read.ptx.sreg.envreg22" => "__nvvm_read_ptx_sreg_envreg22",
-    "llvm.nvvm.read.ptx.sreg.envreg23" => "__nvvm_read_ptx_sreg_envreg23",
-    "llvm.nvvm.read.ptx.sreg.envreg24" => "__nvvm_read_ptx_sreg_envreg24",
-    "llvm.nvvm.read.ptx.sreg.envreg25" => "__nvvm_read_ptx_sreg_envreg25",
-    "llvm.nvvm.read.ptx.sreg.envreg26" => "__nvvm_read_ptx_sreg_envreg26",
-    "llvm.nvvm.read.ptx.sreg.envreg27" => "__nvvm_read_ptx_sreg_envreg27",
-    "llvm.nvvm.read.ptx.sreg.envreg28" => "__nvvm_read_ptx_sreg_envreg28",
-    "llvm.nvvm.read.ptx.sreg.envreg29" => "__nvvm_read_ptx_sreg_envreg29",
-    "llvm.nvvm.read.ptx.sreg.envreg3" => "__nvvm_read_ptx_sreg_envreg3",
-    "llvm.nvvm.read.ptx.sreg.envreg30" => "__nvvm_read_ptx_sreg_envreg30",
-    "llvm.nvvm.read.ptx.sreg.envreg31" => "__nvvm_read_ptx_sreg_envreg31",
-    "llvm.nvvm.read.ptx.sreg.envreg4" => "__nvvm_read_ptx_sreg_envreg4",
-    "llvm.nvvm.read.ptx.sreg.envreg5" => "__nvvm_read_ptx_sreg_envreg5",
-    "llvm.nvvm.read.ptx.sreg.envreg6" => "__nvvm_read_ptx_sreg_envreg6",
-    "llvm.nvvm.read.ptx.sreg.envreg7" => "__nvvm_read_ptx_sreg_envreg7",
-    "llvm.nvvm.read.ptx.sreg.envreg8" => "__nvvm_read_ptx_sreg_envreg8",
-    "llvm.nvvm.read.ptx.sreg.envreg9" => "__nvvm_read_ptx_sreg_envreg9",
-    "llvm.nvvm.read.ptx.sreg.globaltimer" => "__nvvm_read_ptx_sreg_globaltimer",
-    "llvm.nvvm.read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_gridid",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_laneid",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.eq" => "__nvvm_read_ptx_sreg_lanemask_eq",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.eq" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.ge" => "__nvvm_read_ptx_sreg_lanemask_ge",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.ge" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.gt" => "__nvvm_read_ptx_sreg_lanemask_gt",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.gt" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.le" => "__nvvm_read_ptx_sreg_lanemask_le",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.le" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.lt" => "__nvvm_read_ptx_sreg_lanemask_lt",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.lt" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.nctaid.w" => "__nvvm_read_ptx_sreg_nctaid_w",
-    "llvm.nvvm.read.ptx.sreg.nctaid.x" => "__nvvm_read_ptx_sreg_nctaid_x",
-    "llvm.nvvm.read.ptx.sreg.nctaid.y" => "__nvvm_read_ptx_sreg_nctaid_y",
-    "llvm.nvvm.read.ptx.sreg.nctaid.z" => "__nvvm_read_ptx_sreg_nctaid_z",
-    "llvm.nvvm.read.ptx.sreg.nsmid" => "__nvvm_read_ptx_sreg_nsmid",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.nsmid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.ntid.w" => "__nvvm_read_ptx_sreg_ntid_w",
-    "llvm.nvvm.read.ptx.sreg.ntid.x" => "__nvvm_read_ptx_sreg_ntid_x",
-    "llvm.nvvm.read.ptx.sreg.ntid.y" => "__nvvm_read_ptx_sreg_ntid_y",
-    "llvm.nvvm.read.ptx.sreg.ntid.z" => "__nvvm_read_ptx_sreg_ntid_z",
-    "llvm.nvvm.read.ptx.sreg.nwarpid" => "__nvvm_read_ptx_sreg_nwarpid",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.nwarpid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.pm0" => "__nvvm_read_ptx_sreg_pm0",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.pm0" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.pm1" => "__nvvm_read_ptx_sreg_pm1",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.pm1" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.pm2" => "__nvvm_read_ptx_sreg_pm2",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.pm2" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.pm3" => "__nvvm_read_ptx_sreg_pm3",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.pm3" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.smid" => "__nvvm_read_ptx_sreg_smid",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.smid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.tid.w" => "__nvvm_read_ptx_sreg_tid_w",
-    "llvm.nvvm.read.ptx.sreg.tid.x" => "__nvvm_read_ptx_sreg_tid_x",
-    "llvm.nvvm.read.ptx.sreg.tid.y" => "__nvvm_read_ptx_sreg_tid_y",
-    "llvm.nvvm.read.ptx.sreg.tid.z" => "__nvvm_read_ptx_sreg_tid_z",
-    "llvm.nvvm.read.ptx.sreg.warpid" => "__nvvm_read_ptx_sreg_warpid",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.warpid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_warpsize",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.redux.sync.add" => "__nvvm_redux_sync_add",
-    "llvm.nvvm.redux.sync.and" => "__nvvm_redux_sync_and",
-    "llvm.nvvm.redux.sync.fmax" => "__nvvm_redux_sync_fmax",
-    "llvm.nvvm.redux.sync.fmax.NaN" => "__nvvm_redux_sync_fmax_NaN",
-    "llvm.nvvm.redux.sync.fmax.abs" => "__nvvm_redux_sync_fmax_abs",
-    "llvm.nvvm.redux.sync.fmax.abs.NaN" => "__nvvm_redux_sync_fmax_abs_NaN",
-    "llvm.nvvm.redux.sync.fmin" => "__nvvm_redux_sync_fmin",
-    "llvm.nvvm.redux.sync.fmin.NaN" => "__nvvm_redux_sync_fmin_NaN",
-    "llvm.nvvm.redux.sync.fmin.abs" => "__nvvm_redux_sync_fmin_abs",
-    "llvm.nvvm.redux.sync.fmin.abs.NaN" => "__nvvm_redux_sync_fmin_abs_NaN",
-    "llvm.nvvm.redux.sync.max" => "__nvvm_redux_sync_max",
-    "llvm.nvvm.redux.sync.min" => "__nvvm_redux_sync_min",
-    "llvm.nvvm.redux.sync.or" => "__nvvm_redux_sync_or",
-    "llvm.nvvm.redux.sync.umax" => "__nvvm_redux_sync_umax",
-    "llvm.nvvm.redux.sync.umin" => "__nvvm_redux_sync_umin",
-    "llvm.nvvm.redux.sync.xor" => "__nvvm_redux_sync_xor",
-    "llvm.nvvm.reflect" => "__nvvm_reflect",
-    "llvm.nvvm.rotate.b32" => "__nvvm_rotate_b32",
-    "llvm.nvvm.rotate.b64" => "__nvvm_rotate_b64",
-    "llvm.nvvm.rotate.right.b64" => "__nvvm_rotate_right_b64",
-    "llvm.nvvm.round.d" => "__nvvm_round_d",
-    "llvm.nvvm.round.f" => "__nvvm_round_f",
-    "llvm.nvvm.round.ftz.f" => "__nvvm_round_ftz_f",
-    "llvm.nvvm.rsqrt.approx.d" => "__nvvm_rsqrt_approx_d",
-    "llvm.nvvm.rsqrt.approx.f" => "__nvvm_rsqrt_approx_f",
-    "llvm.nvvm.rsqrt.approx.ftz.d" => "__nvvm_rsqrt_approx_ftz_d",
-    "llvm.nvvm.rsqrt.approx.ftz.f" => "__nvvm_rsqrt_approx_ftz_f",
-    "llvm.nvvm.sad.i" => "__nvvm_sad_i",
-    "llvm.nvvm.sad.ll" => "__nvvm_sad_ll",
-    "llvm.nvvm.sad.s" => "__nvvm_sad_s",
-    "llvm.nvvm.sad.ui" => "__nvvm_sad_ui",
-    "llvm.nvvm.sad.ull" => "__nvvm_sad_ull",
-    "llvm.nvvm.sad.us" => "__nvvm_sad_us",
-    "llvm.nvvm.saturate.d" => "__nvvm_saturate_d",
-    "llvm.nvvm.saturate.f" => "__nvvm_saturate_f",
-    "llvm.nvvm.saturate.ftz.f" => "__nvvm_saturate_ftz_f",
-    "llvm.nvvm.shfl.bfly.f32" => "__nvvm_shfl_bfly_f32",
-    "llvm.nvvm.shfl.bfly.i32" => "__nvvm_shfl_bfly_i32",
-    "llvm.nvvm.shfl.down.f32" => "__nvvm_shfl_down_f32",
-    "llvm.nvvm.shfl.down.i32" => "__nvvm_shfl_down_i32",
-    "llvm.nvvm.shfl.idx.f32" => "__nvvm_shfl_idx_f32",
-    "llvm.nvvm.shfl.idx.i32" => "__nvvm_shfl_idx_i32",
-    "llvm.nvvm.shfl.sync.bfly.f32" => "__nvvm_shfl_sync_bfly_f32",
-    "llvm.nvvm.shfl.sync.bfly.i32" => "__nvvm_shfl_sync_bfly_i32",
-    "llvm.nvvm.shfl.sync.down.f32" => "__nvvm_shfl_sync_down_f32",
-    "llvm.nvvm.shfl.sync.down.i32" => "__nvvm_shfl_sync_down_i32",
-    "llvm.nvvm.shfl.sync.idx.f32" => "__nvvm_shfl_sync_idx_f32",
-    "llvm.nvvm.shfl.sync.idx.i32" => "__nvvm_shfl_sync_idx_i32",
-    "llvm.nvvm.shfl.sync.up.f32" => "__nvvm_shfl_sync_up_f32",
-    "llvm.nvvm.shfl.sync.up.i32" => "__nvvm_shfl_sync_up_i32",
-    "llvm.nvvm.shfl.up.f32" => "__nvvm_shfl_up_f32",
-    "llvm.nvvm.shfl.up.i32" => "__nvvm_shfl_up_i32",
-    "llvm.nvvm.sin.approx.f" => "__nvvm_sin_approx_f",
-    "llvm.nvvm.sin.approx.ftz.f" => "__nvvm_sin_approx_ftz_f",
-    "llvm.nvvm.sqrt.approx.f" => "__nvvm_sqrt_approx_f",
-    "llvm.nvvm.sqrt.approx.ftz.f" => "__nvvm_sqrt_approx_ftz_f",
-    "llvm.nvvm.sqrt.f" => "__nvvm_sqrt_f",
-    "llvm.nvvm.sqrt.rm.d" => "__nvvm_sqrt_rm_d",
-    "llvm.nvvm.sqrt.rm.f" => "__nvvm_sqrt_rm_f",
-    "llvm.nvvm.sqrt.rm.ftz.f" => "__nvvm_sqrt_rm_ftz_f",
-    "llvm.nvvm.sqrt.rn.d" => "__nvvm_sqrt_rn_d",
-    "llvm.nvvm.sqrt.rn.f" => "__nvvm_sqrt_rn_f",
-    "llvm.nvvm.sqrt.rn.ftz.f" => "__nvvm_sqrt_rn_ftz_f",
-    "llvm.nvvm.sqrt.rp.d" => "__nvvm_sqrt_rp_d",
-    "llvm.nvvm.sqrt.rp.f" => "__nvvm_sqrt_rp_f",
-    "llvm.nvvm.sqrt.rp.ftz.f" => "__nvvm_sqrt_rp_ftz_f",
-    "llvm.nvvm.sqrt.rz.d" => "__nvvm_sqrt_rz_d",
-    "llvm.nvvm.sqrt.rz.f" => "__nvvm_sqrt_rz_f",
-    "llvm.nvvm.sqrt.rz.ftz.f" => "__nvvm_sqrt_rz_ftz_f",
-    "llvm.nvvm.suq.array.size" => "__nvvm_suq_array_size",
-    "llvm.nvvm.suq.channel.data.type" => "__nvvm_suq_channel_data_type",
-    "llvm.nvvm.suq.channel.order" => "__nvvm_suq_channel_order",
-    "llvm.nvvm.suq.depth" => "__nvvm_suq_depth",
-    "llvm.nvvm.suq.height" => "__nvvm_suq_height",
-    "llvm.nvvm.suq.width" => "__nvvm_suq_width",
-    "llvm.nvvm.sust.b.1d.array.i16.clamp" => "__nvvm_sust_b_1d_array_i16_clamp",
-    "llvm.nvvm.sust.b.1d.array.i16.trap" => "__nvvm_sust_b_1d_array_i16_trap",
-    "llvm.nvvm.sust.b.1d.array.i16.zero" => "__nvvm_sust_b_1d_array_i16_zero",
-    "llvm.nvvm.sust.b.1d.array.i32.clamp" => "__nvvm_sust_b_1d_array_i32_clamp",
-    "llvm.nvvm.sust.b.1d.array.i32.trap" => "__nvvm_sust_b_1d_array_i32_trap",
-    "llvm.nvvm.sust.b.1d.array.i32.zero" => "__nvvm_sust_b_1d_array_i32_zero",
-    "llvm.nvvm.sust.b.1d.array.i64.clamp" => "__nvvm_sust_b_1d_array_i64_clamp",
-    "llvm.nvvm.sust.b.1d.array.i64.trap" => "__nvvm_sust_b_1d_array_i64_trap",
-    "llvm.nvvm.sust.b.1d.array.i64.zero" => "__nvvm_sust_b_1d_array_i64_zero",
-    "llvm.nvvm.sust.b.1d.array.i8.clamp" => "__nvvm_sust_b_1d_array_i8_clamp",
-    "llvm.nvvm.sust.b.1d.array.i8.trap" => "__nvvm_sust_b_1d_array_i8_trap",
-    "llvm.nvvm.sust.b.1d.array.i8.zero" => "__nvvm_sust_b_1d_array_i8_zero",
-    "llvm.nvvm.sust.b.1d.array.v2i16.clamp" => "__nvvm_sust_b_1d_array_v2i16_clamp",
-    "llvm.nvvm.sust.b.1d.array.v2i16.trap" => "__nvvm_sust_b_1d_array_v2i16_trap",
-    "llvm.nvvm.sust.b.1d.array.v2i16.zero" => "__nvvm_sust_b_1d_array_v2i16_zero",
-    "llvm.nvvm.sust.b.1d.array.v2i32.clamp" => "__nvvm_sust_b_1d_array_v2i32_clamp",
-    "llvm.nvvm.sust.b.1d.array.v2i32.trap" => "__nvvm_sust_b_1d_array_v2i32_trap",
-    "llvm.nvvm.sust.b.1d.array.v2i32.zero" => "__nvvm_sust_b_1d_array_v2i32_zero",
-    "llvm.nvvm.sust.b.1d.array.v2i64.clamp" => "__nvvm_sust_b_1d_array_v2i64_clamp",
-    "llvm.nvvm.sust.b.1d.array.v2i64.trap" => "__nvvm_sust_b_1d_array_v2i64_trap",
-    "llvm.nvvm.sust.b.1d.array.v2i64.zero" => "__nvvm_sust_b_1d_array_v2i64_zero",
-    "llvm.nvvm.sust.b.1d.array.v2i8.clamp" => "__nvvm_sust_b_1d_array_v2i8_clamp",
-    "llvm.nvvm.sust.b.1d.array.v2i8.trap" => "__nvvm_sust_b_1d_array_v2i8_trap",
-    "llvm.nvvm.sust.b.1d.array.v2i8.zero" => "__nvvm_sust_b_1d_array_v2i8_zero",
-    "llvm.nvvm.sust.b.1d.array.v4i16.clamp" => "__nvvm_sust_b_1d_array_v4i16_clamp",
-    "llvm.nvvm.sust.b.1d.array.v4i16.trap" => "__nvvm_sust_b_1d_array_v4i16_trap",
-    "llvm.nvvm.sust.b.1d.array.v4i16.zero" => "__nvvm_sust_b_1d_array_v4i16_zero",
-    "llvm.nvvm.sust.b.1d.array.v4i32.clamp" => "__nvvm_sust_b_1d_array_v4i32_clamp",
-    "llvm.nvvm.sust.b.1d.array.v4i32.trap" => "__nvvm_sust_b_1d_array_v4i32_trap",
-    "llvm.nvvm.sust.b.1d.array.v4i32.zero" => "__nvvm_sust_b_1d_array_v4i32_zero",
-    "llvm.nvvm.sust.b.1d.array.v4i8.clamp" => "__nvvm_sust_b_1d_array_v4i8_clamp",
-    "llvm.nvvm.sust.b.1d.array.v4i8.trap" => "__nvvm_sust_b_1d_array_v4i8_trap",
-    "llvm.nvvm.sust.b.1d.array.v4i8.zero" => "__nvvm_sust_b_1d_array_v4i8_zero",
-    "llvm.nvvm.sust.b.1d.i16.clamp" => "__nvvm_sust_b_1d_i16_clamp",
-    "llvm.nvvm.sust.b.1d.i16.trap" => "__nvvm_sust_b_1d_i16_trap",
-    "llvm.nvvm.sust.b.1d.i16.zero" => "__nvvm_sust_b_1d_i16_zero",
-    "llvm.nvvm.sust.b.1d.i32.clamp" => "__nvvm_sust_b_1d_i32_clamp",
-    "llvm.nvvm.sust.b.1d.i32.trap" => "__nvvm_sust_b_1d_i32_trap",
-    "llvm.nvvm.sust.b.1d.i32.zero" => "__nvvm_sust_b_1d_i32_zero",
-    "llvm.nvvm.sust.b.1d.i64.clamp" => "__nvvm_sust_b_1d_i64_clamp",
-    "llvm.nvvm.sust.b.1d.i64.trap" => "__nvvm_sust_b_1d_i64_trap",
-    "llvm.nvvm.sust.b.1d.i64.zero" => "__nvvm_sust_b_1d_i64_zero",
-    "llvm.nvvm.sust.b.1d.i8.clamp" => "__nvvm_sust_b_1d_i8_clamp",
-    "llvm.nvvm.sust.b.1d.i8.trap" => "__nvvm_sust_b_1d_i8_trap",
-    "llvm.nvvm.sust.b.1d.i8.zero" => "__nvvm_sust_b_1d_i8_zero",
-    "llvm.nvvm.sust.b.1d.v2i16.clamp" => "__nvvm_sust_b_1d_v2i16_clamp",
-    "llvm.nvvm.sust.b.1d.v2i16.trap" => "__nvvm_sust_b_1d_v2i16_trap",
-    "llvm.nvvm.sust.b.1d.v2i16.zero" => "__nvvm_sust_b_1d_v2i16_zero",
-    "llvm.nvvm.sust.b.1d.v2i32.clamp" => "__nvvm_sust_b_1d_v2i32_clamp",
-    "llvm.nvvm.sust.b.1d.v2i32.trap" => "__nvvm_sust_b_1d_v2i32_trap",
-    "llvm.nvvm.sust.b.1d.v2i32.zero" => "__nvvm_sust_b_1d_v2i32_zero",
-    "llvm.nvvm.sust.b.1d.v2i64.clamp" => "__nvvm_sust_b_1d_v2i64_clamp",
-    "llvm.nvvm.sust.b.1d.v2i64.trap" => "__nvvm_sust_b_1d_v2i64_trap",
-    "llvm.nvvm.sust.b.1d.v2i64.zero" => "__nvvm_sust_b_1d_v2i64_zero",
-    "llvm.nvvm.sust.b.1d.v2i8.clamp" => "__nvvm_sust_b_1d_v2i8_clamp",
-    "llvm.nvvm.sust.b.1d.v2i8.trap" => "__nvvm_sust_b_1d_v2i8_trap",
-    "llvm.nvvm.sust.b.1d.v2i8.zero" => "__nvvm_sust_b_1d_v2i8_zero",
-    "llvm.nvvm.sust.b.1d.v4i16.clamp" => "__nvvm_sust_b_1d_v4i16_clamp",
-    "llvm.nvvm.sust.b.1d.v4i16.trap" => "__nvvm_sust_b_1d_v4i16_trap",
-    "llvm.nvvm.sust.b.1d.v4i16.zero" => "__nvvm_sust_b_1d_v4i16_zero",
-    "llvm.nvvm.sust.b.1d.v4i32.clamp" => "__nvvm_sust_b_1d_v4i32_clamp",
-    "llvm.nvvm.sust.b.1d.v4i32.trap" => "__nvvm_sust_b_1d_v4i32_trap",
-    "llvm.nvvm.sust.b.1d.v4i32.zero" => "__nvvm_sust_b_1d_v4i32_zero",
-    "llvm.nvvm.sust.b.1d.v4i8.clamp" => "__nvvm_sust_b_1d_v4i8_clamp",
-    "llvm.nvvm.sust.b.1d.v4i8.trap" => "__nvvm_sust_b_1d_v4i8_trap",
-    "llvm.nvvm.sust.b.1d.v4i8.zero" => "__nvvm_sust_b_1d_v4i8_zero",
-    "llvm.nvvm.sust.b.2d.array.i16.clamp" => "__nvvm_sust_b_2d_array_i16_clamp",
-    "llvm.nvvm.sust.b.2d.array.i16.trap" => "__nvvm_sust_b_2d_array_i16_trap",
-    "llvm.nvvm.sust.b.2d.array.i16.zero" => "__nvvm_sust_b_2d_array_i16_zero",
-    "llvm.nvvm.sust.b.2d.array.i32.clamp" => "__nvvm_sust_b_2d_array_i32_clamp",
-    "llvm.nvvm.sust.b.2d.array.i32.trap" => "__nvvm_sust_b_2d_array_i32_trap",
-    "llvm.nvvm.sust.b.2d.array.i32.zero" => "__nvvm_sust_b_2d_array_i32_zero",
-    "llvm.nvvm.sust.b.2d.array.i64.clamp" => "__nvvm_sust_b_2d_array_i64_clamp",
-    "llvm.nvvm.sust.b.2d.array.i64.trap" => "__nvvm_sust_b_2d_array_i64_trap",
-    "llvm.nvvm.sust.b.2d.array.i64.zero" => "__nvvm_sust_b_2d_array_i64_zero",
-    "llvm.nvvm.sust.b.2d.array.i8.clamp" => "__nvvm_sust_b_2d_array_i8_clamp",
-    "llvm.nvvm.sust.b.2d.array.i8.trap" => "__nvvm_sust_b_2d_array_i8_trap",
-    "llvm.nvvm.sust.b.2d.array.i8.zero" => "__nvvm_sust_b_2d_array_i8_zero",
-    "llvm.nvvm.sust.b.2d.array.v2i16.clamp" => "__nvvm_sust_b_2d_array_v2i16_clamp",
-    "llvm.nvvm.sust.b.2d.array.v2i16.trap" => "__nvvm_sust_b_2d_array_v2i16_trap",
-    "llvm.nvvm.sust.b.2d.array.v2i16.zero" => "__nvvm_sust_b_2d_array_v2i16_zero",
-    "llvm.nvvm.sust.b.2d.array.v2i32.clamp" => "__nvvm_sust_b_2d_array_v2i32_clamp",
-    "llvm.nvvm.sust.b.2d.array.v2i32.trap" => "__nvvm_sust_b_2d_array_v2i32_trap",
-    "llvm.nvvm.sust.b.2d.array.v2i32.zero" => "__nvvm_sust_b_2d_array_v2i32_zero",
-    "llvm.nvvm.sust.b.2d.array.v2i64.clamp" => "__nvvm_sust_b_2d_array_v2i64_clamp",
-    "llvm.nvvm.sust.b.2d.array.v2i64.trap" => "__nvvm_sust_b_2d_array_v2i64_trap",
-    "llvm.nvvm.sust.b.2d.array.v2i64.zero" => "__nvvm_sust_b_2d_array_v2i64_zero",
-    "llvm.nvvm.sust.b.2d.array.v2i8.clamp" => "__nvvm_sust_b_2d_array_v2i8_clamp",
-    "llvm.nvvm.sust.b.2d.array.v2i8.trap" => "__nvvm_sust_b_2d_array_v2i8_trap",
-    "llvm.nvvm.sust.b.2d.array.v2i8.zero" => "__nvvm_sust_b_2d_array_v2i8_zero",
-    "llvm.nvvm.sust.b.2d.array.v4i16.clamp" => "__nvvm_sust_b_2d_array_v4i16_clamp",
-    "llvm.nvvm.sust.b.2d.array.v4i16.trap" => "__nvvm_sust_b_2d_array_v4i16_trap",
-    "llvm.nvvm.sust.b.2d.array.v4i16.zero" => "__nvvm_sust_b_2d_array_v4i16_zero",
-    "llvm.nvvm.sust.b.2d.array.v4i32.clamp" => "__nvvm_sust_b_2d_array_v4i32_clamp",
-    "llvm.nvvm.sust.b.2d.array.v4i32.trap" => "__nvvm_sust_b_2d_array_v4i32_trap",
-    "llvm.nvvm.sust.b.2d.array.v4i32.zero" => "__nvvm_sust_b_2d_array_v4i32_zero",
-    "llvm.nvvm.sust.b.2d.array.v4i8.clamp" => "__nvvm_sust_b_2d_array_v4i8_clamp",
-    "llvm.nvvm.sust.b.2d.array.v4i8.trap" => "__nvvm_sust_b_2d_array_v4i8_trap",
-    "llvm.nvvm.sust.b.2d.array.v4i8.zero" => "__nvvm_sust_b_2d_array_v4i8_zero",
-    "llvm.nvvm.sust.b.2d.i16.clamp" => "__nvvm_sust_b_2d_i16_clamp",
-    "llvm.nvvm.sust.b.2d.i16.trap" => "__nvvm_sust_b_2d_i16_trap",
-    "llvm.nvvm.sust.b.2d.i16.zero" => "__nvvm_sust_b_2d_i16_zero",
-    "llvm.nvvm.sust.b.2d.i32.clamp" => "__nvvm_sust_b_2d_i32_clamp",
-    "llvm.nvvm.sust.b.2d.i32.trap" => "__nvvm_sust_b_2d_i32_trap",
-    "llvm.nvvm.sust.b.2d.i32.zero" => "__nvvm_sust_b_2d_i32_zero",
-    "llvm.nvvm.sust.b.2d.i64.clamp" => "__nvvm_sust_b_2d_i64_clamp",
-    "llvm.nvvm.sust.b.2d.i64.trap" => "__nvvm_sust_b_2d_i64_trap",
-    "llvm.nvvm.sust.b.2d.i64.zero" => "__nvvm_sust_b_2d_i64_zero",
-    "llvm.nvvm.sust.b.2d.i8.clamp" => "__nvvm_sust_b_2d_i8_clamp",
-    "llvm.nvvm.sust.b.2d.i8.trap" => "__nvvm_sust_b_2d_i8_trap",
-    "llvm.nvvm.sust.b.2d.i8.zero" => "__nvvm_sust_b_2d_i8_zero",
-    "llvm.nvvm.sust.b.2d.v2i16.clamp" => "__nvvm_sust_b_2d_v2i16_clamp",
-    "llvm.nvvm.sust.b.2d.v2i16.trap" => "__nvvm_sust_b_2d_v2i16_trap",
-    "llvm.nvvm.sust.b.2d.v2i16.zero" => "__nvvm_sust_b_2d_v2i16_zero",
-    "llvm.nvvm.sust.b.2d.v2i32.clamp" => "__nvvm_sust_b_2d_v2i32_clamp",
-    "llvm.nvvm.sust.b.2d.v2i32.trap" => "__nvvm_sust_b_2d_v2i32_trap",
-    "llvm.nvvm.sust.b.2d.v2i32.zero" => "__nvvm_sust_b_2d_v2i32_zero",
-    "llvm.nvvm.sust.b.2d.v2i64.clamp" => "__nvvm_sust_b_2d_v2i64_clamp",
-    "llvm.nvvm.sust.b.2d.v2i64.trap" => "__nvvm_sust_b_2d_v2i64_trap",
-    "llvm.nvvm.sust.b.2d.v2i64.zero" => "__nvvm_sust_b_2d_v2i64_zero",
-    "llvm.nvvm.sust.b.2d.v2i8.clamp" => "__nvvm_sust_b_2d_v2i8_clamp",
-    "llvm.nvvm.sust.b.2d.v2i8.trap" => "__nvvm_sust_b_2d_v2i8_trap",
-    "llvm.nvvm.sust.b.2d.v2i8.zero" => "__nvvm_sust_b_2d_v2i8_zero",
-    "llvm.nvvm.sust.b.2d.v4i16.clamp" => "__nvvm_sust_b_2d_v4i16_clamp",
-    "llvm.nvvm.sust.b.2d.v4i16.trap" => "__nvvm_sust_b_2d_v4i16_trap",
-    "llvm.nvvm.sust.b.2d.v4i16.zero" => "__nvvm_sust_b_2d_v4i16_zero",
-    "llvm.nvvm.sust.b.2d.v4i32.clamp" => "__nvvm_sust_b_2d_v4i32_clamp",
-    "llvm.nvvm.sust.b.2d.v4i32.trap" => "__nvvm_sust_b_2d_v4i32_trap",
-    "llvm.nvvm.sust.b.2d.v4i32.zero" => "__nvvm_sust_b_2d_v4i32_zero",
-    "llvm.nvvm.sust.b.2d.v4i8.clamp" => "__nvvm_sust_b_2d_v4i8_clamp",
-    "llvm.nvvm.sust.b.2d.v4i8.trap" => "__nvvm_sust_b_2d_v4i8_trap",
-    "llvm.nvvm.sust.b.2d.v4i8.zero" => "__nvvm_sust_b_2d_v4i8_zero",
-    "llvm.nvvm.sust.b.3d.i16.clamp" => "__nvvm_sust_b_3d_i16_clamp",
-    "llvm.nvvm.sust.b.3d.i16.trap" => "__nvvm_sust_b_3d_i16_trap",
-    "llvm.nvvm.sust.b.3d.i16.zero" => "__nvvm_sust_b_3d_i16_zero",
-    "llvm.nvvm.sust.b.3d.i32.clamp" => "__nvvm_sust_b_3d_i32_clamp",
-    "llvm.nvvm.sust.b.3d.i32.trap" => "__nvvm_sust_b_3d_i32_trap",
-    "llvm.nvvm.sust.b.3d.i32.zero" => "__nvvm_sust_b_3d_i32_zero",
-    "llvm.nvvm.sust.b.3d.i64.clamp" => "__nvvm_sust_b_3d_i64_clamp",
-    "llvm.nvvm.sust.b.3d.i64.trap" => "__nvvm_sust_b_3d_i64_trap",
-    "llvm.nvvm.sust.b.3d.i64.zero" => "__nvvm_sust_b_3d_i64_zero",
-    "llvm.nvvm.sust.b.3d.i8.clamp" => "__nvvm_sust_b_3d_i8_clamp",
-    "llvm.nvvm.sust.b.3d.i8.trap" => "__nvvm_sust_b_3d_i8_trap",
-    "llvm.nvvm.sust.b.3d.i8.zero" => "__nvvm_sust_b_3d_i8_zero",
-    "llvm.nvvm.sust.b.3d.v2i16.clamp" => "__nvvm_sust_b_3d_v2i16_clamp",
-    "llvm.nvvm.sust.b.3d.v2i16.trap" => "__nvvm_sust_b_3d_v2i16_trap",
-    "llvm.nvvm.sust.b.3d.v2i16.zero" => "__nvvm_sust_b_3d_v2i16_zero",
-    "llvm.nvvm.sust.b.3d.v2i32.clamp" => "__nvvm_sust_b_3d_v2i32_clamp",
-    "llvm.nvvm.sust.b.3d.v2i32.trap" => "__nvvm_sust_b_3d_v2i32_trap",
-    "llvm.nvvm.sust.b.3d.v2i32.zero" => "__nvvm_sust_b_3d_v2i32_zero",
-    "llvm.nvvm.sust.b.3d.v2i64.clamp" => "__nvvm_sust_b_3d_v2i64_clamp",
-    "llvm.nvvm.sust.b.3d.v2i64.trap" => "__nvvm_sust_b_3d_v2i64_trap",
-    "llvm.nvvm.sust.b.3d.v2i64.zero" => "__nvvm_sust_b_3d_v2i64_zero",
-    "llvm.nvvm.sust.b.3d.v2i8.clamp" => "__nvvm_sust_b_3d_v2i8_clamp",
-    "llvm.nvvm.sust.b.3d.v2i8.trap" => "__nvvm_sust_b_3d_v2i8_trap",
-    "llvm.nvvm.sust.b.3d.v2i8.zero" => "__nvvm_sust_b_3d_v2i8_zero",
-    "llvm.nvvm.sust.b.3d.v4i16.clamp" => "__nvvm_sust_b_3d_v4i16_clamp",
-    "llvm.nvvm.sust.b.3d.v4i16.trap" => "__nvvm_sust_b_3d_v4i16_trap",
-    "llvm.nvvm.sust.b.3d.v4i16.zero" => "__nvvm_sust_b_3d_v4i16_zero",
-    "llvm.nvvm.sust.b.3d.v4i32.clamp" => "__nvvm_sust_b_3d_v4i32_clamp",
-    "llvm.nvvm.sust.b.3d.v4i32.trap" => "__nvvm_sust_b_3d_v4i32_trap",
-    "llvm.nvvm.sust.b.3d.v4i32.zero" => "__nvvm_sust_b_3d_v4i32_zero",
-    "llvm.nvvm.sust.b.3d.v4i8.clamp" => "__nvvm_sust_b_3d_v4i8_clamp",
-    "llvm.nvvm.sust.b.3d.v4i8.trap" => "__nvvm_sust_b_3d_v4i8_trap",
-    "llvm.nvvm.sust.b.3d.v4i8.zero" => "__nvvm_sust_b_3d_v4i8_zero",
-    "llvm.nvvm.sust.p.1d.array.i16.trap" => "__nvvm_sust_p_1d_array_i16_trap",
-    "llvm.nvvm.sust.p.1d.array.i32.trap" => "__nvvm_sust_p_1d_array_i32_trap",
-    "llvm.nvvm.sust.p.1d.array.i8.trap" => "__nvvm_sust_p_1d_array_i8_trap",
-    "llvm.nvvm.sust.p.1d.array.v2i16.trap" => "__nvvm_sust_p_1d_array_v2i16_trap",
-    "llvm.nvvm.sust.p.1d.array.v2i32.trap" => "__nvvm_sust_p_1d_array_v2i32_trap",
-    "llvm.nvvm.sust.p.1d.array.v2i8.trap" => "__nvvm_sust_p_1d_array_v2i8_trap",
-    "llvm.nvvm.sust.p.1d.array.v4i16.trap" => "__nvvm_sust_p_1d_array_v4i16_trap",
-    "llvm.nvvm.sust.p.1d.array.v4i32.trap" => "__nvvm_sust_p_1d_array_v4i32_trap",
-    "llvm.nvvm.sust.p.1d.array.v4i8.trap" => "__nvvm_sust_p_1d_array_v4i8_trap",
-    "llvm.nvvm.sust.p.1d.i16.trap" => "__nvvm_sust_p_1d_i16_trap",
-    "llvm.nvvm.sust.p.1d.i32.trap" => "__nvvm_sust_p_1d_i32_trap",
-    "llvm.nvvm.sust.p.1d.i8.trap" => "__nvvm_sust_p_1d_i8_trap",
-    "llvm.nvvm.sust.p.1d.v2i16.trap" => "__nvvm_sust_p_1d_v2i16_trap",
-    "llvm.nvvm.sust.p.1d.v2i32.trap" => "__nvvm_sust_p_1d_v2i32_trap",
-    "llvm.nvvm.sust.p.1d.v2i8.trap" => "__nvvm_sust_p_1d_v2i8_trap",
-    "llvm.nvvm.sust.p.1d.v4i16.trap" => "__nvvm_sust_p_1d_v4i16_trap",
-    "llvm.nvvm.sust.p.1d.v4i32.trap" => "__nvvm_sust_p_1d_v4i32_trap",
-    "llvm.nvvm.sust.p.1d.v4i8.trap" => "__nvvm_sust_p_1d_v4i8_trap",
-    "llvm.nvvm.sust.p.2d.array.i16.trap" => "__nvvm_sust_p_2d_array_i16_trap",
-    "llvm.nvvm.sust.p.2d.array.i32.trap" => "__nvvm_sust_p_2d_array_i32_trap",
-    "llvm.nvvm.sust.p.2d.array.i8.trap" => "__nvvm_sust_p_2d_array_i8_trap",
-    "llvm.nvvm.sust.p.2d.array.v2i16.trap" => "__nvvm_sust_p_2d_array_v2i16_trap",
-    "llvm.nvvm.sust.p.2d.array.v2i32.trap" => "__nvvm_sust_p_2d_array_v2i32_trap",
-    "llvm.nvvm.sust.p.2d.array.v2i8.trap" => "__nvvm_sust_p_2d_array_v2i8_trap",
-    "llvm.nvvm.sust.p.2d.array.v4i16.trap" => "__nvvm_sust_p_2d_array_v4i16_trap",
-    "llvm.nvvm.sust.p.2d.array.v4i32.trap" => "__nvvm_sust_p_2d_array_v4i32_trap",
-    "llvm.nvvm.sust.p.2d.array.v4i8.trap" => "__nvvm_sust_p_2d_array_v4i8_trap",
-    "llvm.nvvm.sust.p.2d.i16.trap" => "__nvvm_sust_p_2d_i16_trap",
-    "llvm.nvvm.sust.p.2d.i32.trap" => "__nvvm_sust_p_2d_i32_trap",
-    "llvm.nvvm.sust.p.2d.i8.trap" => "__nvvm_sust_p_2d_i8_trap",
-    "llvm.nvvm.sust.p.2d.v2i16.trap" => "__nvvm_sust_p_2d_v2i16_trap",
-    "llvm.nvvm.sust.p.2d.v2i32.trap" => "__nvvm_sust_p_2d_v2i32_trap",
-    "llvm.nvvm.sust.p.2d.v2i8.trap" => "__nvvm_sust_p_2d_v2i8_trap",
-    "llvm.nvvm.sust.p.2d.v4i16.trap" => "__nvvm_sust_p_2d_v4i16_trap",
-    "llvm.nvvm.sust.p.2d.v4i32.trap" => "__nvvm_sust_p_2d_v4i32_trap",
-    "llvm.nvvm.sust.p.2d.v4i8.trap" => "__nvvm_sust_p_2d_v4i8_trap",
-    "llvm.nvvm.sust.p.3d.i16.trap" => "__nvvm_sust_p_3d_i16_trap",
-    "llvm.nvvm.sust.p.3d.i32.trap" => "__nvvm_sust_p_3d_i32_trap",
-    "llvm.nvvm.sust.p.3d.i8.trap" => "__nvvm_sust_p_3d_i8_trap",
-    "llvm.nvvm.sust.p.3d.v2i16.trap" => "__nvvm_sust_p_3d_v2i16_trap",
-    "llvm.nvvm.sust.p.3d.v2i32.trap" => "__nvvm_sust_p_3d_v2i32_trap",
-    "llvm.nvvm.sust.p.3d.v2i8.trap" => "__nvvm_sust_p_3d_v2i8_trap",
-    "llvm.nvvm.sust.p.3d.v4i16.trap" => "__nvvm_sust_p_3d_v4i16_trap",
-    "llvm.nvvm.sust.p.3d.v4i32.trap" => "__nvvm_sust_p_3d_v4i32_trap",
-    "llvm.nvvm.sust.p.3d.v4i8.trap" => "__nvvm_sust_p_3d_v4i8_trap",
-    "llvm.nvvm.swap.lo.hi.b64" => "__nvvm_swap_lo_hi_b64",
-    "llvm.nvvm.trunc.d" => "__nvvm_trunc_d",
-    "llvm.nvvm.trunc.f" => "__nvvm_trunc_f",
-    "llvm.nvvm.trunc.ftz.f" => "__nvvm_trunc_ftz_f",
-    "llvm.nvvm.txq.array.size" => "__nvvm_txq_array_size",
-    "llvm.nvvm.txq.channel.data.type" => "__nvvm_txq_channel_data_type",
-    "llvm.nvvm.txq.channel.order" => "__nvvm_txq_channel_order",
-    "llvm.nvvm.txq.depth" => "__nvvm_txq_depth",
-    "llvm.nvvm.txq.height" => "__nvvm_txq_height",
-    "llvm.nvvm.txq.num.mipmap.levels" => "__nvvm_txq_num_mipmap_levels",
-    "llvm.nvvm.txq.num.samples" => "__nvvm_txq_num_samples",
-    "llvm.nvvm.txq.width" => "__nvvm_txq_width",
-    "llvm.nvvm.ue8m0x2.to.bf16x2" => "__nvvm_ue8m0x2_to_bf16x2",
-    "llvm.nvvm.ui2d.rm" => "__nvvm_ui2d_rm",
-    "llvm.nvvm.ui2d.rn" => "__nvvm_ui2d_rn",
-    "llvm.nvvm.ui2d.rp" => "__nvvm_ui2d_rp",
-    "llvm.nvvm.ui2d.rz" => "__nvvm_ui2d_rz",
-    "llvm.nvvm.ui2f.rm" => "__nvvm_ui2f_rm",
-    "llvm.nvvm.ui2f.rn" => "__nvvm_ui2f_rn",
-    "llvm.nvvm.ui2f.rp" => "__nvvm_ui2f_rp",
-    "llvm.nvvm.ui2f.rz" => "__nvvm_ui2f_rz",
-    "llvm.nvvm.ull2d.rm" => "__nvvm_ull2d_rm",
-    "llvm.nvvm.ull2d.rn" => "__nvvm_ull2d_rn",
-    "llvm.nvvm.ull2d.rp" => "__nvvm_ull2d_rp",
-    "llvm.nvvm.ull2d.rz" => "__nvvm_ull2d_rz",
-    "llvm.nvvm.ull2f.rm" => "__nvvm_ull2f_rm",
-    "llvm.nvvm.ull2f.rn" => "__nvvm_ull2f_rn",
-    "llvm.nvvm.ull2f.rp" => "__nvvm_ull2f_rp",
-    "llvm.nvvm.ull2f.rz" => "__nvvm_ull2f_rz",
-    "llvm.nvvm.vote.all" => "__nvvm_vote_all",
-    "llvm.nvvm.vote.all.sync" => "__nvvm_vote_all_sync",
-    "llvm.nvvm.vote.any" => "__nvvm_vote_any",
-    "llvm.nvvm.vote.any.sync" => "__nvvm_vote_any_sync",
-    "llvm.nvvm.vote.ballot" => "__nvvm_vote_ballot",
-    "llvm.nvvm.vote.ballot.sync" => "__nvvm_vote_ballot_sync",
-    "llvm.nvvm.vote.uni" => "__nvvm_vote_uni",
-    "llvm.nvvm.vote.uni.sync" => "__nvvm_vote_uni_sync",
-    // ppc
-    "llvm.ppc.addex" => "__builtin_ppc_addex",
-    "llvm.ppc.addf128.round.to.odd" => "__builtin_addf128_round_to_odd",
-    "llvm.ppc.addg6s" => "__builtin_addg6s",
-    "llvm.ppc.addg6sd" => "__builtin_ppc_addg6s",
-    "llvm.ppc.altivec.crypto.vcipher" => "__builtin_altivec_crypto_vcipher",
-    "llvm.ppc.altivec.crypto.vcipherlast" => "__builtin_altivec_crypto_vcipherlast",
-    "llvm.ppc.altivec.crypto.vncipher" => "__builtin_altivec_crypto_vncipher",
-    "llvm.ppc.altivec.crypto.vncipherlast" => "__builtin_altivec_crypto_vncipherlast",
-    "llvm.ppc.altivec.crypto.vpermxor" => "__builtin_altivec_crypto_vpermxor",
-    "llvm.ppc.altivec.crypto.vpermxor.be" => "__builtin_altivec_crypto_vpermxor_be",
-    "llvm.ppc.altivec.crypto.vpmsumb" => "__builtin_altivec_crypto_vpmsumb",
-    "llvm.ppc.altivec.crypto.vpmsumd" => "__builtin_altivec_crypto_vpmsumd",
-    "llvm.ppc.altivec.crypto.vpmsumh" => "__builtin_altivec_crypto_vpmsumh",
-    "llvm.ppc.altivec.crypto.vpmsumw" => "__builtin_altivec_crypto_vpmsumw",
-    "llvm.ppc.altivec.crypto.vsbox" => "__builtin_altivec_crypto_vsbox",
-    "llvm.ppc.altivec.crypto.vshasigmad" => "__builtin_altivec_crypto_vshasigmad",
-    "llvm.ppc.altivec.crypto.vshasigmaw" => "__builtin_altivec_crypto_vshasigmaw",
-    "llvm.ppc.altivec.dss" => "__builtin_altivec_dss",
-    "llvm.ppc.altivec.dssall" => "__builtin_altivec_dssall",
-    "llvm.ppc.altivec.dst" => "__builtin_altivec_dst",
-    "llvm.ppc.altivec.dstst" => "__builtin_altivec_dstst",
-    "llvm.ppc.altivec.dststt" => "__builtin_altivec_dststt",
-    "llvm.ppc.altivec.dstt" => "__builtin_altivec_dstt",
-    "llvm.ppc.altivec.mfvscr" => "__builtin_altivec_mfvscr",
-    "llvm.ppc.altivec.mtvscr" => "__builtin_altivec_mtvscr",
-    "llvm.ppc.altivec.mtvsrbm" => "__builtin_altivec_mtvsrbm",
-    "llvm.ppc.altivec.mtvsrdm" => "__builtin_altivec_mtvsrdm",
-    "llvm.ppc.altivec.mtvsrhm" => "__builtin_altivec_mtvsrhm",
-    "llvm.ppc.altivec.mtvsrqm" => "__builtin_altivec_mtvsrqm",
-    "llvm.ppc.altivec.mtvsrwm" => "__builtin_altivec_mtvsrwm",
-    "llvm.ppc.altivec.vabsdub" => "__builtin_altivec_vabsdub",
-    "llvm.ppc.altivec.vabsduh" => "__builtin_altivec_vabsduh",
-    "llvm.ppc.altivec.vabsduw" => "__builtin_altivec_vabsduw",
-    "llvm.ppc.altivec.vaddcuq" => "__builtin_altivec_vaddcuq",
-    "llvm.ppc.altivec.vaddcuw" => "__builtin_altivec_vaddcuw",
-    "llvm.ppc.altivec.vaddecuq" => "__builtin_altivec_vaddecuq",
-    "llvm.ppc.altivec.vaddeuqm" => "__builtin_altivec_vaddeuqm",
-    "llvm.ppc.altivec.vaddsbs" => "__builtin_altivec_vaddsbs",
-    "llvm.ppc.altivec.vaddshs" => "__builtin_altivec_vaddshs",
-    "llvm.ppc.altivec.vaddsws" => "__builtin_altivec_vaddsws",
-    "llvm.ppc.altivec.vaddubs" => "__builtin_altivec_vaddubs",
-    "llvm.ppc.altivec.vadduhs" => "__builtin_altivec_vadduhs",
-    "llvm.ppc.altivec.vadduws" => "__builtin_altivec_vadduws",
-    "llvm.ppc.altivec.vavgsb" => "__builtin_altivec_vavgsb",
-    "llvm.ppc.altivec.vavgsh" => "__builtin_altivec_vavgsh",
-    "llvm.ppc.altivec.vavgsw" => "__builtin_altivec_vavgsw",
-    "llvm.ppc.altivec.vavgub" => "__builtin_altivec_vavgub",
-    "llvm.ppc.altivec.vavguh" => "__builtin_altivec_vavguh",
-    "llvm.ppc.altivec.vavguw" => "__builtin_altivec_vavguw",
-    "llvm.ppc.altivec.vbpermd" => "__builtin_altivec_vbpermd",
-    "llvm.ppc.altivec.vbpermq" => "__builtin_altivec_vbpermq",
-    "llvm.ppc.altivec.vcfsx" => "__builtin_altivec_vcfsx",
-    "llvm.ppc.altivec.vcfuged" => "__builtin_altivec_vcfuged",
-    "llvm.ppc.altivec.vcfux" => "__builtin_altivec_vcfux",
-    "llvm.ppc.altivec.vclrlb" => "__builtin_altivec_vclrlb",
-    "llvm.ppc.altivec.vclrrb" => "__builtin_altivec_vclrrb",
-    "llvm.ppc.altivec.vclzdm" => "__builtin_altivec_vclzdm",
-    "llvm.ppc.altivec.vclzlsbb" => "__builtin_altivec_vclzlsbb",
-    "llvm.ppc.altivec.vcmpbfp" => "__builtin_altivec_vcmpbfp",
-    "llvm.ppc.altivec.vcmpbfp.p" => "__builtin_altivec_vcmpbfp_p",
-    "llvm.ppc.altivec.vcmpeqfp" => "__builtin_altivec_vcmpeqfp",
-    "llvm.ppc.altivec.vcmpeqfp.p" => "__builtin_altivec_vcmpeqfp_p",
-    "llvm.ppc.altivec.vcmpequb" => "__builtin_altivec_vcmpequb",
-    "llvm.ppc.altivec.vcmpequb.p" => "__builtin_altivec_vcmpequb_p",
-    "llvm.ppc.altivec.vcmpequd" => "__builtin_altivec_vcmpequd",
-    "llvm.ppc.altivec.vcmpequd.p" => "__builtin_altivec_vcmpequd_p",
-    "llvm.ppc.altivec.vcmpequh" => "__builtin_altivec_vcmpequh",
-    "llvm.ppc.altivec.vcmpequh.p" => "__builtin_altivec_vcmpequh_p",
-    "llvm.ppc.altivec.vcmpequq" => "__builtin_altivec_vcmpequq",
-    "llvm.ppc.altivec.vcmpequq.p" => "__builtin_altivec_vcmpequq_p",
-    "llvm.ppc.altivec.vcmpequw" => "__builtin_altivec_vcmpequw",
-    "llvm.ppc.altivec.vcmpequw.p" => "__builtin_altivec_vcmpequw_p",
-    "llvm.ppc.altivec.vcmpgefp" => "__builtin_altivec_vcmpgefp",
-    "llvm.ppc.altivec.vcmpgefp.p" => "__builtin_altivec_vcmpgefp_p",
-    "llvm.ppc.altivec.vcmpgtfp" => "__builtin_altivec_vcmpgtfp",
-    "llvm.ppc.altivec.vcmpgtfp.p" => "__builtin_altivec_vcmpgtfp_p",
-    "llvm.ppc.altivec.vcmpgtsb" => "__builtin_altivec_vcmpgtsb",
-    "llvm.ppc.altivec.vcmpgtsb.p" => "__builtin_altivec_vcmpgtsb_p",
-    "llvm.ppc.altivec.vcmpgtsd" => "__builtin_altivec_vcmpgtsd",
-    "llvm.ppc.altivec.vcmpgtsd.p" => "__builtin_altivec_vcmpgtsd_p",
-    "llvm.ppc.altivec.vcmpgtsh" => "__builtin_altivec_vcmpgtsh",
-    "llvm.ppc.altivec.vcmpgtsh.p" => "__builtin_altivec_vcmpgtsh_p",
-    "llvm.ppc.altivec.vcmpgtsq" => "__builtin_altivec_vcmpgtsq",
-    "llvm.ppc.altivec.vcmpgtsq.p" => "__builtin_altivec_vcmpgtsq_p",
-    "llvm.ppc.altivec.vcmpgtsw" => "__builtin_altivec_vcmpgtsw",
-    "llvm.ppc.altivec.vcmpgtsw.p" => "__builtin_altivec_vcmpgtsw_p",
-    "llvm.ppc.altivec.vcmpgtub" => "__builtin_altivec_vcmpgtub",
-    "llvm.ppc.altivec.vcmpgtub.p" => "__builtin_altivec_vcmpgtub_p",
-    "llvm.ppc.altivec.vcmpgtud" => "__builtin_altivec_vcmpgtud",
-    "llvm.ppc.altivec.vcmpgtud.p" => "__builtin_altivec_vcmpgtud_p",
-    "llvm.ppc.altivec.vcmpgtuh" => "__builtin_altivec_vcmpgtuh",
-    "llvm.ppc.altivec.vcmpgtuh.p" => "__builtin_altivec_vcmpgtuh_p",
-    "llvm.ppc.altivec.vcmpgtuq" => "__builtin_altivec_vcmpgtuq",
-    "llvm.ppc.altivec.vcmpgtuq.p" => "__builtin_altivec_vcmpgtuq_p",
-    "llvm.ppc.altivec.vcmpgtuw" => "__builtin_altivec_vcmpgtuw",
-    "llvm.ppc.altivec.vcmpgtuw.p" => "__builtin_altivec_vcmpgtuw_p",
-    "llvm.ppc.altivec.vcmpneb" => "__builtin_altivec_vcmpneb",
-    "llvm.ppc.altivec.vcmpneb.p" => "__builtin_altivec_vcmpneb_p",
-    "llvm.ppc.altivec.vcmpneh" => "__builtin_altivec_vcmpneh",
-    "llvm.ppc.altivec.vcmpneh.p" => "__builtin_altivec_vcmpneh_p",
-    "llvm.ppc.altivec.vcmpnew" => "__builtin_altivec_vcmpnew",
-    "llvm.ppc.altivec.vcmpnew.p" => "__builtin_altivec_vcmpnew_p",
-    "llvm.ppc.altivec.vcmpnezb" => "__builtin_altivec_vcmpnezb",
-    "llvm.ppc.altivec.vcmpnezb.p" => "__builtin_altivec_vcmpnezb_p",
-    "llvm.ppc.altivec.vcmpnezh" => "__builtin_altivec_vcmpnezh",
-    "llvm.ppc.altivec.vcmpnezh.p" => "__builtin_altivec_vcmpnezh_p",
-    "llvm.ppc.altivec.vcmpnezw" => "__builtin_altivec_vcmpnezw",
-    "llvm.ppc.altivec.vcmpnezw.p" => "__builtin_altivec_vcmpnezw_p",
-    "llvm.ppc.altivec.vcntmbb" => "__builtin_altivec_vcntmbb",
-    "llvm.ppc.altivec.vcntmbd" => "__builtin_altivec_vcntmbd",
-    "llvm.ppc.altivec.vcntmbh" => "__builtin_altivec_vcntmbh",
-    "llvm.ppc.altivec.vcntmbw" => "__builtin_altivec_vcntmbw",
-    "llvm.ppc.altivec.vctsxs" => "__builtin_altivec_vctsxs",
-    "llvm.ppc.altivec.vctuxs" => "__builtin_altivec_vctuxs",
-    "llvm.ppc.altivec.vctzdm" => "__builtin_altivec_vctzdm",
-    "llvm.ppc.altivec.vctzlsbb" => "__builtin_altivec_vctzlsbb",
-    "llvm.ppc.altivec.vdivesd" => "__builtin_altivec_vdivesd",
-    "llvm.ppc.altivec.vdivesq" => "__builtin_altivec_vdivesq",
-    "llvm.ppc.altivec.vdivesw" => "__builtin_altivec_vdivesw",
-    "llvm.ppc.altivec.vdiveud" => "__builtin_altivec_vdiveud",
-    "llvm.ppc.altivec.vdiveuq" => "__builtin_altivec_vdiveuq",
-    "llvm.ppc.altivec.vdiveuw" => "__builtin_altivec_vdiveuw",
-    "llvm.ppc.altivec.vexpandbm" => "__builtin_altivec_vexpandbm",
-    "llvm.ppc.altivec.vexpanddm" => "__builtin_altivec_vexpanddm",
-    "llvm.ppc.altivec.vexpandhm" => "__builtin_altivec_vexpandhm",
-    "llvm.ppc.altivec.vexpandqm" => "__builtin_altivec_vexpandqm",
-    "llvm.ppc.altivec.vexpandwm" => "__builtin_altivec_vexpandwm",
-    "llvm.ppc.altivec.vexptefp" => "__builtin_altivec_vexptefp",
-    "llvm.ppc.altivec.vextddvlx" => "__builtin_altivec_vextddvlx",
-    "llvm.ppc.altivec.vextddvrx" => "__builtin_altivec_vextddvrx",
-    "llvm.ppc.altivec.vextdubvlx" => "__builtin_altivec_vextdubvlx",
-    "llvm.ppc.altivec.vextdubvrx" => "__builtin_altivec_vextdubvrx",
-    "llvm.ppc.altivec.vextduhvlx" => "__builtin_altivec_vextduhvlx",
-    "llvm.ppc.altivec.vextduhvrx" => "__builtin_altivec_vextduhvrx",
-    "llvm.ppc.altivec.vextduwvlx" => "__builtin_altivec_vextduwvlx",
-    "llvm.ppc.altivec.vextduwvrx" => "__builtin_altivec_vextduwvrx",
-    "llvm.ppc.altivec.vextractbm" => "__builtin_altivec_vextractbm",
-    "llvm.ppc.altivec.vextractdm" => "__builtin_altivec_vextractdm",
-    "llvm.ppc.altivec.vextracthm" => "__builtin_altivec_vextracthm",
-    "llvm.ppc.altivec.vextractqm" => "__builtin_altivec_vextractqm",
-    "llvm.ppc.altivec.vextractwm" => "__builtin_altivec_vextractwm",
-    "llvm.ppc.altivec.vextsb2d" => "__builtin_altivec_vextsb2d",
-    "llvm.ppc.altivec.vextsb2w" => "__builtin_altivec_vextsb2w",
-    "llvm.ppc.altivec.vextsd2q" => "__builtin_altivec_vextsd2q",
-    "llvm.ppc.altivec.vextsh2d" => "__builtin_altivec_vextsh2d",
-    "llvm.ppc.altivec.vextsh2w" => "__builtin_altivec_vextsh2w",
-    "llvm.ppc.altivec.vextsw2d" => "__builtin_altivec_vextsw2d",
-    "llvm.ppc.altivec.vgbbd" => "__builtin_altivec_vgbbd",
-    "llvm.ppc.altivec.vgnb" => "__builtin_altivec_vgnb",
-    "llvm.ppc.altivec.vinsblx" => "__builtin_altivec_vinsblx",
-    "llvm.ppc.altivec.vinsbrx" => "__builtin_altivec_vinsbrx",
-    "llvm.ppc.altivec.vinsbvlx" => "__builtin_altivec_vinsbvlx",
-    "llvm.ppc.altivec.vinsbvrx" => "__builtin_altivec_vinsbvrx",
-    "llvm.ppc.altivec.vinsdlx" => "__builtin_altivec_vinsdlx",
-    "llvm.ppc.altivec.vinsdrx" => "__builtin_altivec_vinsdrx",
-    "llvm.ppc.altivec.vinshlx" => "__builtin_altivec_vinshlx",
-    "llvm.ppc.altivec.vinshrx" => "__builtin_altivec_vinshrx",
-    "llvm.ppc.altivec.vinshvlx" => "__builtin_altivec_vinshvlx",
-    "llvm.ppc.altivec.vinshvrx" => "__builtin_altivec_vinshvrx",
-    "llvm.ppc.altivec.vinswlx" => "__builtin_altivec_vinswlx",
-    "llvm.ppc.altivec.vinswrx" => "__builtin_altivec_vinswrx",
-    "llvm.ppc.altivec.vinswvlx" => "__builtin_altivec_vinswvlx",
-    "llvm.ppc.altivec.vinswvrx" => "__builtin_altivec_vinswvrx",
-    "llvm.ppc.altivec.vlogefp" => "__builtin_altivec_vlogefp",
-    "llvm.ppc.altivec.vmaddfp" => "__builtin_altivec_vmaddfp",
-    "llvm.ppc.altivec.vmaxfp" => "__builtin_altivec_vmaxfp",
-    "llvm.ppc.altivec.vmaxsb" => "__builtin_altivec_vmaxsb",
-    "llvm.ppc.altivec.vmaxsd" => "__builtin_altivec_vmaxsd",
-    "llvm.ppc.altivec.vmaxsh" => "__builtin_altivec_vmaxsh",
-    "llvm.ppc.altivec.vmaxsw" => "__builtin_altivec_vmaxsw",
-    "llvm.ppc.altivec.vmaxub" => "__builtin_altivec_vmaxub",
-    "llvm.ppc.altivec.vmaxud" => "__builtin_altivec_vmaxud",
-    "llvm.ppc.altivec.vmaxuh" => "__builtin_altivec_vmaxuh",
-    "llvm.ppc.altivec.vmaxuw" => "__builtin_altivec_vmaxuw",
-    "llvm.ppc.altivec.vmhaddshs" => "__builtin_altivec_vmhaddshs",
-    "llvm.ppc.altivec.vmhraddshs" => "__builtin_altivec_vmhraddshs",
-    "llvm.ppc.altivec.vminfp" => "__builtin_altivec_vminfp",
-    "llvm.ppc.altivec.vminsb" => "__builtin_altivec_vminsb",
-    "llvm.ppc.altivec.vminsd" => "__builtin_altivec_vminsd",
-    "llvm.ppc.altivec.vminsh" => "__builtin_altivec_vminsh",
-    "llvm.ppc.altivec.vminsw" => "__builtin_altivec_vminsw",
-    "llvm.ppc.altivec.vminub" => "__builtin_altivec_vminub",
-    "llvm.ppc.altivec.vminud" => "__builtin_altivec_vminud",
-    "llvm.ppc.altivec.vminuh" => "__builtin_altivec_vminuh",
-    "llvm.ppc.altivec.vminuw" => "__builtin_altivec_vminuw",
-    "llvm.ppc.altivec.vmladduhm" => "__builtin_altivec_vmladduhm",
-    "llvm.ppc.altivec.vmsumcud" => "__builtin_altivec_vmsumcud",
-    "llvm.ppc.altivec.vmsummbm" => "__builtin_altivec_vmsummbm",
-    "llvm.ppc.altivec.vmsumshm" => "__builtin_altivec_vmsumshm",
-    "llvm.ppc.altivec.vmsumshs" => "__builtin_altivec_vmsumshs",
-    "llvm.ppc.altivec.vmsumubm" => "__builtin_altivec_vmsumubm",
-    "llvm.ppc.altivec.vmsumudm" => "__builtin_altivec_vmsumudm",
-    "llvm.ppc.altivec.vmsumuhm" => "__builtin_altivec_vmsumuhm",
-    "llvm.ppc.altivec.vmsumuhs" => "__builtin_altivec_vmsumuhs",
-    "llvm.ppc.altivec.vmulesb" => "__builtin_altivec_vmulesb",
-    "llvm.ppc.altivec.vmulesd" => "__builtin_altivec_vmulesd",
-    "llvm.ppc.altivec.vmulesh" => "__builtin_altivec_vmulesh",
-    "llvm.ppc.altivec.vmulesw" => "__builtin_altivec_vmulesw",
-    "llvm.ppc.altivec.vmuleub" => "__builtin_altivec_vmuleub",
-    "llvm.ppc.altivec.vmuleud" => "__builtin_altivec_vmuleud",
-    "llvm.ppc.altivec.vmuleuh" => "__builtin_altivec_vmuleuh",
-    "llvm.ppc.altivec.vmuleuw" => "__builtin_altivec_vmuleuw",
-    "llvm.ppc.altivec.vmulhsd" => "__builtin_altivec_vmulhsd",
-    "llvm.ppc.altivec.vmulhsw" => "__builtin_altivec_vmulhsw",
-    "llvm.ppc.altivec.vmulhud" => "__builtin_altivec_vmulhud",
-    "llvm.ppc.altivec.vmulhuw" => "__builtin_altivec_vmulhuw",
-    "llvm.ppc.altivec.vmulosb" => "__builtin_altivec_vmulosb",
-    "llvm.ppc.altivec.vmulosd" => "__builtin_altivec_vmulosd",
-    "llvm.ppc.altivec.vmulosh" => "__builtin_altivec_vmulosh",
-    "llvm.ppc.altivec.vmulosw" => "__builtin_altivec_vmulosw",
-    "llvm.ppc.altivec.vmuloub" => "__builtin_altivec_vmuloub",
-    "llvm.ppc.altivec.vmuloud" => "__builtin_altivec_vmuloud",
-    "llvm.ppc.altivec.vmulouh" => "__builtin_altivec_vmulouh",
-    "llvm.ppc.altivec.vmulouw" => "__builtin_altivec_vmulouw",
-    "llvm.ppc.altivec.vnmsubfp" => "__builtin_altivec_vnmsubfp",
-    "llvm.ppc.altivec.vpdepd" => "__builtin_altivec_vpdepd",
-    "llvm.ppc.altivec.vperm" => "__builtin_altivec_vperm_4si",
-    "llvm.ppc.altivec.vpextd" => "__builtin_altivec_vpextd",
-    "llvm.ppc.altivec.vpkpx" => "__builtin_altivec_vpkpx",
-    "llvm.ppc.altivec.vpksdss" => "__builtin_altivec_vpksdss",
-    "llvm.ppc.altivec.vpksdus" => "__builtin_altivec_vpksdus",
-    "llvm.ppc.altivec.vpkshss" => "__builtin_altivec_vpkshss",
-    "llvm.ppc.altivec.vpkshus" => "__builtin_altivec_vpkshus",
-    "llvm.ppc.altivec.vpkswss" => "__builtin_altivec_vpkswss",
-    "llvm.ppc.altivec.vpkswus" => "__builtin_altivec_vpkswus",
-    "llvm.ppc.altivec.vpkudus" => "__builtin_altivec_vpkudus",
-    "llvm.ppc.altivec.vpkuhus" => "__builtin_altivec_vpkuhus",
-    "llvm.ppc.altivec.vpkuwus" => "__builtin_altivec_vpkuwus",
-    "llvm.ppc.altivec.vprtybd" => "__builtin_altivec_vprtybd",
-    "llvm.ppc.altivec.vprtybq" => "__builtin_altivec_vprtybq",
-    "llvm.ppc.altivec.vprtybw" => "__builtin_altivec_vprtybw",
-    "llvm.ppc.altivec.vrefp" => "__builtin_altivec_vrefp",
-    "llvm.ppc.altivec.vrfim" => "__builtin_altivec_vrfim",
-    "llvm.ppc.altivec.vrfin" => "__builtin_altivec_vrfin",
-    "llvm.ppc.altivec.vrfip" => "__builtin_altivec_vrfip",
-    "llvm.ppc.altivec.vrfiz" => "__builtin_altivec_vrfiz",
-    "llvm.ppc.altivec.vrlb" => "__builtin_altivec_vrlb",
-    "llvm.ppc.altivec.vrld" => "__builtin_altivec_vrld",
-    "llvm.ppc.altivec.vrldmi" => "__builtin_altivec_vrldmi",
-    "llvm.ppc.altivec.vrldnm" => "__builtin_altivec_vrldnm",
-    "llvm.ppc.altivec.vrlh" => "__builtin_altivec_vrlh",
-    "llvm.ppc.altivec.vrlqmi" => "__builtin_altivec_vrlqmi",
-    "llvm.ppc.altivec.vrlqnm" => "__builtin_altivec_vrlqnm",
-    "llvm.ppc.altivec.vrlw" => "__builtin_altivec_vrlw",
-    "llvm.ppc.altivec.vrlwmi" => "__builtin_altivec_vrlwmi",
-    "llvm.ppc.altivec.vrlwnm" => "__builtin_altivec_vrlwnm",
-    "llvm.ppc.altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
-    "llvm.ppc.altivec.vsel" => "__builtin_altivec_vsel_4si",
-    "llvm.ppc.altivec.vsl" => "__builtin_altivec_vsl",
-    "llvm.ppc.altivec.vslb" => "__builtin_altivec_vslb",
-    "llvm.ppc.altivec.vsldbi" => "__builtin_altivec_vsldbi",
-    "llvm.ppc.altivec.vslh" => "__builtin_altivec_vslh",
-    "llvm.ppc.altivec.vslo" => "__builtin_altivec_vslo",
-    "llvm.ppc.altivec.vslv" => "__builtin_altivec_vslv",
-    "llvm.ppc.altivec.vslw" => "__builtin_altivec_vslw",
-    "llvm.ppc.altivec.vsr" => "__builtin_altivec_vsr",
-    "llvm.ppc.altivec.vsrab" => "__builtin_altivec_vsrab",
-    "llvm.ppc.altivec.vsrah" => "__builtin_altivec_vsrah",
-    "llvm.ppc.altivec.vsraw" => "__builtin_altivec_vsraw",
-    "llvm.ppc.altivec.vsrb" => "__builtin_altivec_vsrb",
-    "llvm.ppc.altivec.vsrdbi" => "__builtin_altivec_vsrdbi",
-    "llvm.ppc.altivec.vsrh" => "__builtin_altivec_vsrh",
-    "llvm.ppc.altivec.vsro" => "__builtin_altivec_vsro",
-    "llvm.ppc.altivec.vsrv" => "__builtin_altivec_vsrv",
-    "llvm.ppc.altivec.vsrw" => "__builtin_altivec_vsrw",
-    "llvm.ppc.altivec.vstribl" => "__builtin_altivec_vstribl",
-    "llvm.ppc.altivec.vstribl.p" => "__builtin_altivec_vstribl_p",
-    "llvm.ppc.altivec.vstribr" => "__builtin_altivec_vstribr",
-    "llvm.ppc.altivec.vstribr.p" => "__builtin_altivec_vstribr_p",
-    "llvm.ppc.altivec.vstrihl" => "__builtin_altivec_vstrihl",
-    "llvm.ppc.altivec.vstrihl.p" => "__builtin_altivec_vstrihl_p",
-    "llvm.ppc.altivec.vstrihr" => "__builtin_altivec_vstrihr",
-    "llvm.ppc.altivec.vstrihr.p" => "__builtin_altivec_vstrihr_p",
-    "llvm.ppc.altivec.vsubcuq" => "__builtin_altivec_vsubcuq",
-    "llvm.ppc.altivec.vsubcuw" => "__builtin_altivec_vsubcuw",
-    "llvm.ppc.altivec.vsubecuq" => "__builtin_altivec_vsubecuq",
-    "llvm.ppc.altivec.vsubeuqm" => "__builtin_altivec_vsubeuqm",
-    "llvm.ppc.altivec.vsubsbs" => "__builtin_altivec_vsubsbs",
-    "llvm.ppc.altivec.vsubshs" => "__builtin_altivec_vsubshs",
-    "llvm.ppc.altivec.vsubsws" => "__builtin_altivec_vsubsws",
-    "llvm.ppc.altivec.vsububs" => "__builtin_altivec_vsububs",
-    "llvm.ppc.altivec.vsubuhs" => "__builtin_altivec_vsubuhs",
-    "llvm.ppc.altivec.vsubuws" => "__builtin_altivec_vsubuws",
-    "llvm.ppc.altivec.vsum2sws" => "__builtin_altivec_vsum2sws",
-    "llvm.ppc.altivec.vsum4sbs" => "__builtin_altivec_vsum4sbs",
-    "llvm.ppc.altivec.vsum4shs" => "__builtin_altivec_vsum4shs",
-    "llvm.ppc.altivec.vsum4ubs" => "__builtin_altivec_vsum4ubs",
-    "llvm.ppc.altivec.vsumsws" => "__builtin_altivec_vsumsws",
-    "llvm.ppc.altivec.vupkhpx" => "__builtin_altivec_vupkhpx",
-    "llvm.ppc.altivec.vupkhsb" => "__builtin_altivec_vupkhsb",
-    "llvm.ppc.altivec.vupkhsh" => "__builtin_altivec_vupkhsh",
-    "llvm.ppc.altivec.vupkhsw" => "__builtin_altivec_vupkhsw",
-    "llvm.ppc.altivec.vupklpx" => "__builtin_altivec_vupklpx",
-    "llvm.ppc.altivec.vupklsb" => "__builtin_altivec_vupklsb",
-    "llvm.ppc.altivec.vupklsh" => "__builtin_altivec_vupklsh",
-    "llvm.ppc.altivec.vupklsw" => "__builtin_altivec_vupklsw",
-    "llvm.ppc.bcdadd" => "__builtin_ppc_bcdadd",
-    "llvm.ppc.bcdadd.p" => "__builtin_ppc_bcdadd_p",
-    "llvm.ppc.bcdsub" => "__builtin_ppc_bcdsub",
-    "llvm.ppc.bcdsub.p" => "__builtin_ppc_bcdsub_p",
-    "llvm.ppc.bpermd" => "__builtin_bpermd",
-    "llvm.ppc.cbcdtd" => "__builtin_cbcdtd",
-    "llvm.ppc.cbcdtdd" => "__builtin_ppc_cbcdtd",
-    "llvm.ppc.cdtbcd" => "__builtin_cdtbcd",
-    "llvm.ppc.cdtbcdd" => "__builtin_ppc_cdtbcd",
-    "llvm.ppc.cfuged" => "__builtin_cfuged",
-    "llvm.ppc.cmpeqb" => "__builtin_ppc_cmpeqb",
-    "llvm.ppc.cmprb" => "__builtin_ppc_cmprb",
-    "llvm.ppc.cntlzdm" => "__builtin_cntlzdm",
-    "llvm.ppc.cnttzdm" => "__builtin_cnttzdm",
-    "llvm.ppc.compare.exp.eq" => "__builtin_ppc_compare_exp_eq",
-    "llvm.ppc.compare.exp.gt" => "__builtin_ppc_compare_exp_gt",
-    "llvm.ppc.compare.exp.lt" => "__builtin_ppc_compare_exp_lt",
-    "llvm.ppc.compare.exp.uo" => "__builtin_ppc_compare_exp_uo",
-    "llvm.ppc.darn" => "__builtin_darn",
-    "llvm.ppc.darn32" => "__builtin_darn_32",
-    "llvm.ppc.darnraw" => "__builtin_darn_raw",
-    "llvm.ppc.dcbf" => "__builtin_dcbf",
-    "llvm.ppc.dcbfl" => "__builtin_ppc_dcbfl",
-    "llvm.ppc.dcbflp" => "__builtin_ppc_dcbflp",
-    "llvm.ppc.dcbst" => "__builtin_ppc_dcbst",
-    "llvm.ppc.dcbt" => "__builtin_ppc_dcbt",
-    "llvm.ppc.dcbtst" => "__builtin_ppc_dcbtst",
-    "llvm.ppc.dcbtstt" => "__builtin_ppc_dcbtstt",
-    "llvm.ppc.dcbtt" => "__builtin_ppc_dcbtt",
-    "llvm.ppc.dcbz" => "__builtin_ppc_dcbz",
-    "llvm.ppc.divde" => "__builtin_divde",
-    "llvm.ppc.divdeu" => "__builtin_divdeu",
-    "llvm.ppc.divf128.round.to.odd" => "__builtin_divf128_round_to_odd",
-    "llvm.ppc.divwe" => "__builtin_divwe",
-    "llvm.ppc.divweu" => "__builtin_divweu",
-    "llvm.ppc.eieio" => "__builtin_ppc_eieio",
-    "llvm.ppc.extract.exp" => "__builtin_ppc_extract_exp",
-    "llvm.ppc.extract.sig" => "__builtin_ppc_extract_sig",
-    "llvm.ppc.fcfid" => "__builtin_ppc_fcfid",
-    "llvm.ppc.fcfud" => "__builtin_ppc_fcfud",
-    "llvm.ppc.fctid" => "__builtin_ppc_fctid",
-    "llvm.ppc.fctidz" => "__builtin_ppc_fctidz",
-    "llvm.ppc.fctiw" => "__builtin_ppc_fctiw",
-    "llvm.ppc.fctiwz" => "__builtin_ppc_fctiwz",
-    "llvm.ppc.fctudz" => "__builtin_ppc_fctudz",
-    "llvm.ppc.fctuwz" => "__builtin_ppc_fctuwz",
-    "llvm.ppc.fence" => "__builtin_ppc_fence",
-    "llvm.ppc.fmaf128.round.to.odd" => "__builtin_fmaf128_round_to_odd",
-    "llvm.ppc.fmsub" => "__builtin_ppc_fmsub",
-    "llvm.ppc.fmsubs" => "__builtin_ppc_fmsubs",
-    "llvm.ppc.fnabs" => "__builtin_ppc_fnabs",
-    "llvm.ppc.fnabss" => "__builtin_ppc_fnabss",
-    "llvm.ppc.fnmadd" => "__builtin_ppc_fnmadd",
-    "llvm.ppc.fnmadds" => "__builtin_ppc_fnmadds",
-    "llvm.ppc.fre" => "__builtin_ppc_fre",
-    "llvm.ppc.fres" => "__builtin_ppc_fres",
-    "llvm.ppc.frsqrte" => "__builtin_ppc_frsqrte",
-    "llvm.ppc.frsqrtes" => "__builtin_ppc_frsqrtes",
-    "llvm.ppc.fsel" => "__builtin_ppc_fsel",
-    "llvm.ppc.fsels" => "__builtin_ppc_fsels",
-    "llvm.ppc.get.texasr" => "__builtin_get_texasr",
-    "llvm.ppc.get.texasru" => "__builtin_get_texasru",
-    "llvm.ppc.get.tfhar" => "__builtin_get_tfhar",
-    "llvm.ppc.get.tfiar" => "__builtin_get_tfiar",
-    "llvm.ppc.icbt" => "__builtin_ppc_icbt",
-    "llvm.ppc.insert.exp" => "__builtin_ppc_insert_exp",
-    "llvm.ppc.iospace.eieio" => "__builtin_ppc_iospace_eieio",
-    "llvm.ppc.iospace.lwsync" => "__builtin_ppc_iospace_lwsync",
-    "llvm.ppc.iospace.sync" => "__builtin_ppc_iospace_sync",
-    "llvm.ppc.isync" => "__builtin_ppc_isync",
-    "llvm.ppc.load4r" => "__builtin_ppc_load4r",
-    "llvm.ppc.load8r" => "__builtin_ppc_load8r",
-    "llvm.ppc.lwsync" => "__builtin_ppc_lwsync",
-    "llvm.ppc.maddhd" => "__builtin_ppc_maddhd",
-    "llvm.ppc.maddhdu" => "__builtin_ppc_maddhdu",
-    "llvm.ppc.maddld" => "__builtin_ppc_maddld",
-    "llvm.ppc.mffsl" => "__builtin_ppc_mffsl",
-    "llvm.ppc.mfmsr" => "__builtin_ppc_mfmsr",
-    "llvm.ppc.mftbu" => "__builtin_ppc_mftbu",
-    "llvm.ppc.mtfsb0" => "__builtin_ppc_mtfsb0",
-    "llvm.ppc.mtfsb1" => "__builtin_ppc_mtfsb1",
-    "llvm.ppc.mtfsfi" => "__builtin_ppc_mtfsfi",
-    "llvm.ppc.mtmsr" => "__builtin_ppc_mtmsr",
-    "llvm.ppc.mulf128.round.to.odd" => "__builtin_mulf128_round_to_odd",
-    "llvm.ppc.mulhd" => "__builtin_ppc_mulhd",
-    "llvm.ppc.mulhdu" => "__builtin_ppc_mulhdu",
-    "llvm.ppc.mulhw" => "__builtin_ppc_mulhw",
-    "llvm.ppc.mulhwu" => "__builtin_ppc_mulhwu",
-    "llvm.ppc.pack.longdouble" => "__builtin_pack_longdouble",
-    "llvm.ppc.pdepd" => "__builtin_pdepd",
-    "llvm.ppc.pextd" => "__builtin_pextd",
-    "llvm.ppc.qpx.qvfabs" => "__builtin_qpx_qvfabs",
-    "llvm.ppc.qpx.qvfadd" => "__builtin_qpx_qvfadd",
-    "llvm.ppc.qpx.qvfadds" => "__builtin_qpx_qvfadds",
-    "llvm.ppc.qpx.qvfcfid" => "__builtin_qpx_qvfcfid",
-    "llvm.ppc.qpx.qvfcfids" => "__builtin_qpx_qvfcfids",
-    "llvm.ppc.qpx.qvfcfidu" => "__builtin_qpx_qvfcfidu",
-    "llvm.ppc.qpx.qvfcfidus" => "__builtin_qpx_qvfcfidus",
-    "llvm.ppc.qpx.qvfcmpeq" => "__builtin_qpx_qvfcmpeq",
-    "llvm.ppc.qpx.qvfcmpgt" => "__builtin_qpx_qvfcmpgt",
-    "llvm.ppc.qpx.qvfcmplt" => "__builtin_qpx_qvfcmplt",
-    "llvm.ppc.qpx.qvfcpsgn" => "__builtin_qpx_qvfcpsgn",
-    "llvm.ppc.qpx.qvfctid" => "__builtin_qpx_qvfctid",
-    "llvm.ppc.qpx.qvfctidu" => "__builtin_qpx_qvfctidu",
-    "llvm.ppc.qpx.qvfctiduz" => "__builtin_qpx_qvfctiduz",
-    "llvm.ppc.qpx.qvfctidz" => "__builtin_qpx_qvfctidz",
-    "llvm.ppc.qpx.qvfctiw" => "__builtin_qpx_qvfctiw",
-    "llvm.ppc.qpx.qvfctiwu" => "__builtin_qpx_qvfctiwu",
-    "llvm.ppc.qpx.qvfctiwuz" => "__builtin_qpx_qvfctiwuz",
-    "llvm.ppc.qpx.qvfctiwz" => "__builtin_qpx_qvfctiwz",
-    "llvm.ppc.qpx.qvflogical" => "__builtin_qpx_qvflogical",
-    "llvm.ppc.qpx.qvfmadd" => "__builtin_qpx_qvfmadd",
-    "llvm.ppc.qpx.qvfmadds" => "__builtin_qpx_qvfmadds",
-    "llvm.ppc.qpx.qvfmsub" => "__builtin_qpx_qvfmsub",
-    "llvm.ppc.qpx.qvfmsubs" => "__builtin_qpx_qvfmsubs",
-    "llvm.ppc.qpx.qvfmul" => "__builtin_qpx_qvfmul",
-    "llvm.ppc.qpx.qvfmuls" => "__builtin_qpx_qvfmuls",
-    "llvm.ppc.qpx.qvfnabs" => "__builtin_qpx_qvfnabs",
-    "llvm.ppc.qpx.qvfneg" => "__builtin_qpx_qvfneg",
-    "llvm.ppc.qpx.qvfnmadd" => "__builtin_qpx_qvfnmadd",
-    "llvm.ppc.qpx.qvfnmadds" => "__builtin_qpx_qvfnmadds",
-    "llvm.ppc.qpx.qvfnmsub" => "__builtin_qpx_qvfnmsub",
-    "llvm.ppc.qpx.qvfnmsubs" => "__builtin_qpx_qvfnmsubs",
-    "llvm.ppc.qpx.qvfperm" => "__builtin_qpx_qvfperm",
-    "llvm.ppc.qpx.qvfre" => "__builtin_qpx_qvfre",
-    "llvm.ppc.qpx.qvfres" => "__builtin_qpx_qvfres",
-    "llvm.ppc.qpx.qvfrim" => "__builtin_qpx_qvfrim",
-    "llvm.ppc.qpx.qvfrin" => "__builtin_qpx_qvfrin",
-    "llvm.ppc.qpx.qvfrip" => "__builtin_qpx_qvfrip",
-    "llvm.ppc.qpx.qvfriz" => "__builtin_qpx_qvfriz",
-    "llvm.ppc.qpx.qvfrsp" => "__builtin_qpx_qvfrsp",
-    "llvm.ppc.qpx.qvfrsqrte" => "__builtin_qpx_qvfrsqrte",
-    "llvm.ppc.qpx.qvfrsqrtes" => "__builtin_qpx_qvfrsqrtes",
-    "llvm.ppc.qpx.qvfsel" => "__builtin_qpx_qvfsel",
-    "llvm.ppc.qpx.qvfsub" => "__builtin_qpx_qvfsub",
-    "llvm.ppc.qpx.qvfsubs" => "__builtin_qpx_qvfsubs",
-    "llvm.ppc.qpx.qvftstnan" => "__builtin_qpx_qvftstnan",
-    "llvm.ppc.qpx.qvfxmadd" => "__builtin_qpx_qvfxmadd",
-    "llvm.ppc.qpx.qvfxmadds" => "__builtin_qpx_qvfxmadds",
-    "llvm.ppc.qpx.qvfxmul" => "__builtin_qpx_qvfxmul",
-    "llvm.ppc.qpx.qvfxmuls" => "__builtin_qpx_qvfxmuls",
-    "llvm.ppc.qpx.qvfxxcpnmadd" => "__builtin_qpx_qvfxxcpnmadd",
-    "llvm.ppc.qpx.qvfxxcpnmadds" => "__builtin_qpx_qvfxxcpnmadds",
-    "llvm.ppc.qpx.qvfxxmadd" => "__builtin_qpx_qvfxxmadd",
-    "llvm.ppc.qpx.qvfxxmadds" => "__builtin_qpx_qvfxxmadds",
-    "llvm.ppc.qpx.qvfxxnpmadd" => "__builtin_qpx_qvfxxnpmadd",
-    "llvm.ppc.qpx.qvfxxnpmadds" => "__builtin_qpx_qvfxxnpmadds",
-    "llvm.ppc.qpx.qvgpci" => "__builtin_qpx_qvgpci",
-    "llvm.ppc.qpx.qvlfcd" => "__builtin_qpx_qvlfcd",
-    "llvm.ppc.qpx.qvlfcda" => "__builtin_qpx_qvlfcda",
-    "llvm.ppc.qpx.qvlfcs" => "__builtin_qpx_qvlfcs",
-    "llvm.ppc.qpx.qvlfcsa" => "__builtin_qpx_qvlfcsa",
-    "llvm.ppc.qpx.qvlfd" => "__builtin_qpx_qvlfd",
-    "llvm.ppc.qpx.qvlfda" => "__builtin_qpx_qvlfda",
-    "llvm.ppc.qpx.qvlfiwa" => "__builtin_qpx_qvlfiwa",
-    "llvm.ppc.qpx.qvlfiwaa" => "__builtin_qpx_qvlfiwaa",
-    "llvm.ppc.qpx.qvlfiwz" => "__builtin_qpx_qvlfiwz",
-    "llvm.ppc.qpx.qvlfiwza" => "__builtin_qpx_qvlfiwza",
-    "llvm.ppc.qpx.qvlfs" => "__builtin_qpx_qvlfs",
-    "llvm.ppc.qpx.qvlfsa" => "__builtin_qpx_qvlfsa",
-    "llvm.ppc.qpx.qvlpcld" => "__builtin_qpx_qvlpcld",
-    "llvm.ppc.qpx.qvlpcls" => "__builtin_qpx_qvlpcls",
-    "llvm.ppc.qpx.qvlpcrd" => "__builtin_qpx_qvlpcrd",
-    "llvm.ppc.qpx.qvlpcrs" => "__builtin_qpx_qvlpcrs",
-    "llvm.ppc.qpx.qvstfcd" => "__builtin_qpx_qvstfcd",
-    "llvm.ppc.qpx.qvstfcda" => "__builtin_qpx_qvstfcda",
-    "llvm.ppc.qpx.qvstfcs" => "__builtin_qpx_qvstfcs",
-    "llvm.ppc.qpx.qvstfcsa" => "__builtin_qpx_qvstfcsa",
-    "llvm.ppc.qpx.qvstfd" => "__builtin_qpx_qvstfd",
-    "llvm.ppc.qpx.qvstfda" => "__builtin_qpx_qvstfda",
-    "llvm.ppc.qpx.qvstfiw" => "__builtin_qpx_qvstfiw",
-    "llvm.ppc.qpx.qvstfiwa" => "__builtin_qpx_qvstfiwa",
-    "llvm.ppc.qpx.qvstfs" => "__builtin_qpx_qvstfs",
-    "llvm.ppc.qpx.qvstfsa" => "__builtin_qpx_qvstfsa",
-    "llvm.ppc.readflm" => "__builtin_readflm",
-    "llvm.ppc.rlwimi" => "__builtin_ppc_rlwimi",
-    "llvm.ppc.rlwnm" => "__builtin_ppc_rlwnm",
-    "llvm.ppc.scalar.extract.expq" => "__builtin_vsx_scalar_extract_expq",
-    "llvm.ppc.scalar.insert.exp.qp" => "__builtin_vsx_scalar_insert_exp_qp",
-    "llvm.ppc.set.texasr" => "__builtin_set_texasr",
-    "llvm.ppc.set.texasru" => "__builtin_set_texasru",
-    "llvm.ppc.set.tfhar" => "__builtin_set_tfhar",
-    "llvm.ppc.set.tfiar" => "__builtin_set_tfiar",
-    "llvm.ppc.setb" => "__builtin_ppc_setb",
-    "llvm.ppc.setflm" => "__builtin_setflm",
-    "llvm.ppc.setrnd" => "__builtin_setrnd",
-    "llvm.ppc.sqrtf128.round.to.odd" => "__builtin_sqrtf128_round_to_odd",
-    "llvm.ppc.stbcx" => "__builtin_ppc_stbcx",
-    "llvm.ppc.stdcx" => "__builtin_ppc_stdcx",
-    "llvm.ppc.stfiw" => "__builtin_ppc_stfiw",
-    "llvm.ppc.store2r" => "__builtin_ppc_store2r",
-    "llvm.ppc.store4r" => "__builtin_ppc_store4r",
-    "llvm.ppc.store8r" => "__builtin_ppc_store8r",
-    "llvm.ppc.stwcx" => "__builtin_ppc_stwcx",
-    "llvm.ppc.subf128.round.to.odd" => "__builtin_subf128_round_to_odd",
-    "llvm.ppc.sync" => "__builtin_ppc_sync",
-    "llvm.ppc.tabort" => "__builtin_tabort",
-    "llvm.ppc.tabortdc" => "__builtin_tabortdc",
-    "llvm.ppc.tabortdci" => "__builtin_tabortdci",
-    "llvm.ppc.tabortwc" => "__builtin_tabortwc",
-    "llvm.ppc.tabortwci" => "__builtin_tabortwci",
-    "llvm.ppc.tbegin" => "__builtin_tbegin",
-    "llvm.ppc.tcheck" => "__builtin_tcheck",
-    "llvm.ppc.tdw" => "__builtin_ppc_tdw",
-    "llvm.ppc.tend" => "__builtin_tend",
-    "llvm.ppc.tendall" => "__builtin_tendall",
-    "llvm.ppc.trap" => "__builtin_ppc_trap",
-    "llvm.ppc.trapd" => "__builtin_ppc_trapd",
-    "llvm.ppc.trechkpt" => "__builtin_trechkpt",
-    "llvm.ppc.treclaim" => "__builtin_treclaim",
-    "llvm.ppc.tresume" => "__builtin_tresume",
-    "llvm.ppc.truncf128.round.to.odd" => "__builtin_truncf128_round_to_odd",
-    "llvm.ppc.tsr" => "__builtin_tsr",
-    "llvm.ppc.tsuspend" => "__builtin_tsuspend",
-    "llvm.ppc.ttest" => "__builtin_ttest",
-    "llvm.ppc.tw" => "__builtin_ppc_tw",
-    "llvm.ppc.unpack.longdouble" => "__builtin_unpack_longdouble",
-    "llvm.ppc.vsx.xsmaxdp" => "__builtin_vsx_xsmaxdp",
-    "llvm.ppc.vsx.xsmindp" => "__builtin_vsx_xsmindp",
-    "llvm.ppc.vsx.xvcmpeqdp" => "__builtin_vsx_xvcmpeqdp",
-    "llvm.ppc.vsx.xvcmpeqdp.p" => "__builtin_vsx_xvcmpeqdp_p",
-    "llvm.ppc.vsx.xvcmpeqsp" => "__builtin_vsx_xvcmpeqsp",
-    "llvm.ppc.vsx.xvcmpeqsp.p" => "__builtin_vsx_xvcmpeqsp_p",
-    "llvm.ppc.vsx.xvcmpgedp" => "__builtin_vsx_xvcmpgedp",
-    "llvm.ppc.vsx.xvcmpgedp.p" => "__builtin_vsx_xvcmpgedp_p",
-    "llvm.ppc.vsx.xvcmpgesp" => "__builtin_vsx_xvcmpgesp",
-    "llvm.ppc.vsx.xvcmpgesp.p" => "__builtin_vsx_xvcmpgesp_p",
-    "llvm.ppc.vsx.xvcmpgtdp" => "__builtin_vsx_xvcmpgtdp",
-    "llvm.ppc.vsx.xvcmpgtdp.p" => "__builtin_vsx_xvcmpgtdp_p",
-    "llvm.ppc.vsx.xvcmpgtsp" => "__builtin_vsx_xvcmpgtsp",
-    "llvm.ppc.vsx.xvcmpgtsp.p" => "__builtin_vsx_xvcmpgtsp_p",
-    "llvm.ppc.vsx.xvcvbf16spn" => "__builtin_vsx_xvcvbf16spn",
-    "llvm.ppc.vsx.xvcvdpsp" => "__builtin_vsx_xvcvdpsp",
-    "llvm.ppc.vsx.xvcvdpsxws" => "__builtin_vsx_xvcvdpsxws",
-    "llvm.ppc.vsx.xvcvdpuxws" => "__builtin_vsx_xvcvdpuxws",
-    "llvm.ppc.vsx.xvcvhpsp" => "__builtin_vsx_xvcvhpsp",
-    "llvm.ppc.vsx.xvcvspbf16" => "__builtin_vsx_xvcvspbf16",
-    "llvm.ppc.vsx.xvcvspdp" => "__builtin_vsx_xvcvspdp",
-    "llvm.ppc.vsx.xvcvsphp" => "__builtin_vsx_xvcvsphp",
-    "llvm.ppc.vsx.xvcvspsxds" => "__builtin_vsx_xvcvspsxds",
-    "llvm.ppc.vsx.xvcvspuxds" => "__builtin_vsx_xvcvspuxds",
-    "llvm.ppc.vsx.xvcvsxdsp" => "__builtin_vsx_xvcvsxdsp",
-    "llvm.ppc.vsx.xvcvsxwdp" => "__builtin_vsx_xvcvsxwdp",
-    "llvm.ppc.vsx.xvcvuxdsp" => "__builtin_vsx_xvcvuxdsp",
-    "llvm.ppc.vsx.xvcvuxwdp" => "__builtin_vsx_xvcvuxwdp",
-    "llvm.ppc.vsx.xvdivdp" => "__builtin_vsx_xvdivdp",
-    "llvm.ppc.vsx.xvdivsp" => "__builtin_vsx_xvdivsp",
-    "llvm.ppc.vsx.xviexpdp" => "__builtin_vsx_xviexpdp",
-    "llvm.ppc.vsx.xviexpsp" => "__builtin_vsx_xviexpsp",
-    "llvm.ppc.vsx.xvmaxdp" => "__builtin_vsx_xvmaxdp",
-    "llvm.ppc.vsx.xvmaxsp" => "__builtin_vsx_xvmaxsp",
-    "llvm.ppc.vsx.xvmindp" => "__builtin_vsx_xvmindp",
-    "llvm.ppc.vsx.xvminsp" => "__builtin_vsx_xvminsp",
-    "llvm.ppc.vsx.xvredp" => "__builtin_vsx_xvredp",
-    "llvm.ppc.vsx.xvresp" => "__builtin_vsx_xvresp",
-    "llvm.ppc.vsx.xvrsqrtedp" => "__builtin_vsx_xvrsqrtedp",
-    "llvm.ppc.vsx.xvrsqrtesp" => "__builtin_vsx_xvrsqrtesp",
-    "llvm.ppc.vsx.xvtdivdp" => "__builtin_vsx_xvtdivdp",
-    "llvm.ppc.vsx.xvtdivsp" => "__builtin_vsx_xvtdivsp",
-    "llvm.ppc.vsx.xvtlsbb" => "__builtin_vsx_xvtlsbb",
-    "llvm.ppc.vsx.xvtsqrtdp" => "__builtin_vsx_xvtsqrtdp",
-    "llvm.ppc.vsx.xvtsqrtsp" => "__builtin_vsx_xvtsqrtsp",
-    "llvm.ppc.vsx.xvtstdcdp" => "__builtin_vsx_xvtstdcdp",
-    "llvm.ppc.vsx.xvtstdcsp" => "__builtin_vsx_xvtstdcsp",
-    "llvm.ppc.vsx.xvxexpdp" => "__builtin_vsx_xvxexpdp",
-    "llvm.ppc.vsx.xvxexpsp" => "__builtin_vsx_xvxexpsp",
-    "llvm.ppc.vsx.xvxsigdp" => "__builtin_vsx_xvxsigdp",
-    "llvm.ppc.vsx.xvxsigsp" => "__builtin_vsx_xvxsigsp",
-    "llvm.ppc.vsx.xxblendvb" => "__builtin_vsx_xxblendvb",
-    "llvm.ppc.vsx.xxblendvd" => "__builtin_vsx_xxblendvd",
-    "llvm.ppc.vsx.xxblendvh" => "__builtin_vsx_xxblendvh",
-    "llvm.ppc.vsx.xxblendvw" => "__builtin_vsx_xxblendvw",
-    "llvm.ppc.vsx.xxeval" => "__builtin_vsx_xxeval",
-    "llvm.ppc.vsx.xxextractuw" => "__builtin_vsx_xxextractuw",
-    "llvm.ppc.vsx.xxgenpcvbm" => "__builtin_vsx_xxgenpcvbm",
-    "llvm.ppc.vsx.xxgenpcvdm" => "__builtin_vsx_xxgenpcvdm",
-    "llvm.ppc.vsx.xxgenpcvhm" => "__builtin_vsx_xxgenpcvhm",
-    "llvm.ppc.vsx.xxgenpcvwm" => "__builtin_vsx_xxgenpcvwm",
-    "llvm.ppc.vsx.xxinsertw" => "__builtin_vsx_xxinsertw",
-    "llvm.ppc.vsx.xxleqv" => "__builtin_vsx_xxleqv",
-    "llvm.ppc.vsx.xxpermx" => "__builtin_vsx_xxpermx",
-    // ptx
-    "llvm.ptx.bar.sync" => "__builtin_ptx_bar_sync",
-    "llvm.ptx.read.clock" => "__builtin_ptx_read_clock",
-    "llvm.ptx.read.clock64" => "__builtin_ptx_read_clock64",
-    "llvm.ptx.read.gridid" => "__builtin_ptx_read_gridid",
-    "llvm.ptx.read.laneid" => "__builtin_ptx_read_laneid",
-    "llvm.ptx.read.lanemask.eq" => "__builtin_ptx_read_lanemask_eq",
-    "llvm.ptx.read.lanemask.ge" => "__builtin_ptx_read_lanemask_ge",
-    "llvm.ptx.read.lanemask.gt" => "__builtin_ptx_read_lanemask_gt",
-    "llvm.ptx.read.lanemask.le" => "__builtin_ptx_read_lanemask_le",
-    "llvm.ptx.read.lanemask.lt" => "__builtin_ptx_read_lanemask_lt",
-    "llvm.ptx.read.nsmid" => "__builtin_ptx_read_nsmid",
-    "llvm.ptx.read.nwarpid" => "__builtin_ptx_read_nwarpid",
-    "llvm.ptx.read.pm0" => "__builtin_ptx_read_pm0",
-    "llvm.ptx.read.pm1" => "__builtin_ptx_read_pm1",
-    "llvm.ptx.read.pm2" => "__builtin_ptx_read_pm2",
-    "llvm.ptx.read.pm3" => "__builtin_ptx_read_pm3",
-    "llvm.ptx.read.smid" => "__builtin_ptx_read_smid",
-    "llvm.ptx.read.warpid" => "__builtin_ptx_read_warpid",
-    // r600
-    "llvm.r600.group.barrier" => "__builtin_r600_group_barrier",
-    "llvm.r600.implicitarg.ptr" => "__builtin_r600_implicitarg_ptr",
-    "llvm.r600.rat.store.typed" => "__builtin_r600_rat_store_typed",
-    "llvm.r600.read.global.size.x" => "__builtin_r600_read_global_size_x",
-    "llvm.r600.read.global.size.y" => "__builtin_r600_read_global_size_y",
-    "llvm.r600.read.global.size.z" => "__builtin_r600_read_global_size_z",
-    "llvm.r600.read.ngroups.x" => "__builtin_r600_read_ngroups_x",
-    "llvm.r600.read.ngroups.y" => "__builtin_r600_read_ngroups_y",
-    "llvm.r600.read.ngroups.z" => "__builtin_r600_read_ngroups_z",
-    "llvm.r600.read.tgid.x" => "__builtin_r600_read_tgid_x",
-    "llvm.r600.read.tgid.y" => "__builtin_r600_read_tgid_y",
-    "llvm.r600.read.tgid.z" => "__builtin_r600_read_tgid_z",
-    "llvm.r600.read.tidig.x" => "__builtin_r600_read_tidig_x",
-    "llvm.r600.read.tidig.y" => "__builtin_r600_read_tidig_y",
-    "llvm.r600.read.tidig.z" => "__builtin_r600_read_tidig_z",
-    // riscv
-    "llvm.riscv.aes32dsi" => "__builtin_riscv_aes32dsi",
-    "llvm.riscv.aes32dsmi" => "__builtin_riscv_aes32dsmi",
-    "llvm.riscv.aes32esi" => "__builtin_riscv_aes32esi",
-    "llvm.riscv.aes32esmi" => "__builtin_riscv_aes32esmi",
-    "llvm.riscv.aes64ds" => "__builtin_riscv_aes64ds",
-    "llvm.riscv.aes64dsm" => "__builtin_riscv_aes64dsm",
-    "llvm.riscv.aes64es" => "__builtin_riscv_aes64es",
-    "llvm.riscv.aes64esm" => "__builtin_riscv_aes64esm",
-    "llvm.riscv.aes64im" => "__builtin_riscv_aes64im",
-    "llvm.riscv.aes64ks1i" => "__builtin_riscv_aes64ks1i",
-    "llvm.riscv.aes64ks2" => "__builtin_riscv_aes64ks2",
-    "llvm.riscv.sha512sig0" => "__builtin_riscv_sha512sig0",
-    "llvm.riscv.sha512sig0h" => "__builtin_riscv_sha512sig0h",
-    "llvm.riscv.sha512sig0l" => "__builtin_riscv_sha512sig0l",
-    "llvm.riscv.sha512sig1" => "__builtin_riscv_sha512sig1",
-    "llvm.riscv.sha512sig1h" => "__builtin_riscv_sha512sig1h",
-    "llvm.riscv.sha512sig1l" => "__builtin_riscv_sha512sig1l",
-    "llvm.riscv.sha512sum0" => "__builtin_riscv_sha512sum0",
-    "llvm.riscv.sha512sum0r" => "__builtin_riscv_sha512sum0r",
-    "llvm.riscv.sha512sum1" => "__builtin_riscv_sha512sum1",
-    "llvm.riscv.sha512sum1r" => "__builtin_riscv_sha512sum1r",
-    // s390
-    "llvm.s390.bdepg" => "__builtin_s390_bdepg",
-    "llvm.s390.bextg" => "__builtin_s390_bextg",
-    "llvm.s390.efpc" => "__builtin_s390_efpc",
-    "llvm.s390.etnd" => "__builtin_tx_nesting_depth",
-    "llvm.s390.lcbb" => "__builtin_s390_lcbb",
-    "llvm.s390.ppa.txassist" => "__builtin_tx_assist",
-    "llvm.s390.sfpc" => "__builtin_s390_sfpc",
-    "llvm.s390.tend" => "__builtin_tend",
-    "llvm.s390.vaccb" => "__builtin_s390_vaccb",
-    "llvm.s390.vacccq" => "__builtin_s390_vacccq",
-    "llvm.s390.vaccf" => "__builtin_s390_vaccf",
-    "llvm.s390.vaccg" => "__builtin_s390_vaccg",
-    "llvm.s390.vacch" => "__builtin_s390_vacch",
-    "llvm.s390.vaccq" => "__builtin_s390_vaccq",
-    "llvm.s390.vacq" => "__builtin_s390_vacq",
-    "llvm.s390.vaq" => "__builtin_s390_vaq",
-    "llvm.s390.vavgb" => "__builtin_s390_vavgb",
-    "llvm.s390.vavgf" => "__builtin_s390_vavgf",
-    "llvm.s390.vavgg" => "__builtin_s390_vavgg",
-    "llvm.s390.vavgh" => "__builtin_s390_vavgh",
-    "llvm.s390.vavglb" => "__builtin_s390_vavglb",
-    "llvm.s390.vavglf" => "__builtin_s390_vavglf",
-    "llvm.s390.vavglg" => "__builtin_s390_vavglg",
-    "llvm.s390.vavglh" => "__builtin_s390_vavglh",
-    "llvm.s390.vavglq" => "__builtin_s390_vavglq",
-    "llvm.s390.vavgq" => "__builtin_s390_vavgq",
-    "llvm.s390.vbperm" => "__builtin_s390_vbperm",
-    "llvm.s390.vcfn" => "__builtin_s390_vcfn",
-    "llvm.s390.vcksm" => "__builtin_s390_vcksm",
-    "llvm.s390.vclfnhs" => "__builtin_s390_vclfnhs",
-    "llvm.s390.vclfnls" => "__builtin_s390_vclfnls",
-    "llvm.s390.vcnf" => "__builtin_s390_vcnf",
-    "llvm.s390.vcrnfs" => "__builtin_s390_vcrnfs",
-    "llvm.s390.verimb" => "__builtin_s390_verimb",
-    "llvm.s390.verimf" => "__builtin_s390_verimf",
-    "llvm.s390.verimg" => "__builtin_s390_verimg",
-    "llvm.s390.verimh" => "__builtin_s390_verimh",
-    "llvm.s390.veval" => "__builtin_s390_veval",
-    "llvm.s390.vfaeb" => "__builtin_s390_vfaeb",
-    "llvm.s390.vfaef" => "__builtin_s390_vfaef",
-    "llvm.s390.vfaeh" => "__builtin_s390_vfaeh",
-    "llvm.s390.vfaezb" => "__builtin_s390_vfaezb",
-    "llvm.s390.vfaezf" => "__builtin_s390_vfaezf",
-    "llvm.s390.vfaezh" => "__builtin_s390_vfaezh",
-    "llvm.s390.vfeeb" => "__builtin_s390_vfeeb",
-    "llvm.s390.vfeef" => "__builtin_s390_vfeef",
-    "llvm.s390.vfeeh" => "__builtin_s390_vfeeh",
-    "llvm.s390.vfeezb" => "__builtin_s390_vfeezb",
-    "llvm.s390.vfeezf" => "__builtin_s390_vfeezf",
-    "llvm.s390.vfeezh" => "__builtin_s390_vfeezh",
-    "llvm.s390.vfeneb" => "__builtin_s390_vfeneb",
-    "llvm.s390.vfenef" => "__builtin_s390_vfenef",
-    "llvm.s390.vfeneh" => "__builtin_s390_vfeneh",
-    "llvm.s390.vfenezb" => "__builtin_s390_vfenezb",
-    "llvm.s390.vfenezf" => "__builtin_s390_vfenezf",
-    "llvm.s390.vfenezh" => "__builtin_s390_vfenezh",
-    "llvm.s390.vgemb" => "__builtin_s390_vgemb",
-    "llvm.s390.vgemf" => "__builtin_s390_vgemf",
-    "llvm.s390.vgemg" => "__builtin_s390_vgemg",
-    "llvm.s390.vgemh" => "__builtin_s390_vgemh",
-    "llvm.s390.vgemq" => "__builtin_s390_vgemq",
-    "llvm.s390.vgfmab" => "__builtin_s390_vgfmab",
-    "llvm.s390.vgfmaf" => "__builtin_s390_vgfmaf",
-    "llvm.s390.vgfmag" => "__builtin_s390_vgfmag",
-    "llvm.s390.vgfmah" => "__builtin_s390_vgfmah",
-    "llvm.s390.vgfmb" => "__builtin_s390_vgfmb",
-    "llvm.s390.vgfmf" => "__builtin_s390_vgfmf",
-    "llvm.s390.vgfmg" => "__builtin_s390_vgfmg",
-    "llvm.s390.vgfmh" => "__builtin_s390_vgfmh",
-    "llvm.s390.vistrb" => "__builtin_s390_vistrb",
-    "llvm.s390.vistrf" => "__builtin_s390_vistrf",
-    "llvm.s390.vistrh" => "__builtin_s390_vistrh",
-    "llvm.s390.vlbb" => "__builtin_s390_vlbb",
-    "llvm.s390.vll" => "__builtin_s390_vll",
-    "llvm.s390.vlrl" => "__builtin_s390_vlrlr",
-    "llvm.s390.vmaeb" => "__builtin_s390_vmaeb",
-    "llvm.s390.vmaef" => "__builtin_s390_vmaef",
-    "llvm.s390.vmaeg" => "__builtin_s390_vmaeg",
-    "llvm.s390.vmaeh" => "__builtin_s390_vmaeh",
-    "llvm.s390.vmahb" => "__builtin_s390_vmahb",
-    "llvm.s390.vmahf" => "__builtin_s390_vmahf",
-    "llvm.s390.vmahg" => "__builtin_s390_vmahg",
-    "llvm.s390.vmahh" => "__builtin_s390_vmahh",
-    "llvm.s390.vmahq" => "__builtin_s390_vmahq",
-    "llvm.s390.vmaleb" => "__builtin_s390_vmaleb",
-    "llvm.s390.vmalef" => "__builtin_s390_vmalef",
-    "llvm.s390.vmaleg" => "__builtin_s390_vmaleg",
-    "llvm.s390.vmaleh" => "__builtin_s390_vmaleh",
-    "llvm.s390.vmalhb" => "__builtin_s390_vmalhb",
-    "llvm.s390.vmalhf" => "__builtin_s390_vmalhf",
-    "llvm.s390.vmalhg" => "__builtin_s390_vmalhg",
-    "llvm.s390.vmalhh" => "__builtin_s390_vmalhh",
-    "llvm.s390.vmalhq" => "__builtin_s390_vmalhq",
-    "llvm.s390.vmalob" => "__builtin_s390_vmalob",
-    "llvm.s390.vmalof" => "__builtin_s390_vmalof",
-    "llvm.s390.vmalog" => "__builtin_s390_vmalog",
-    "llvm.s390.vmaloh" => "__builtin_s390_vmaloh",
-    "llvm.s390.vmaob" => "__builtin_s390_vmaob",
-    "llvm.s390.vmaof" => "__builtin_s390_vmaof",
-    "llvm.s390.vmaog" => "__builtin_s390_vmaog",
-    "llvm.s390.vmaoh" => "__builtin_s390_vmaoh",
-    "llvm.s390.vmeb" => "__builtin_s390_vmeb",
-    "llvm.s390.vmef" => "__builtin_s390_vmef",
-    "llvm.s390.vmeg" => "__builtin_s390_vmeg",
-    "llvm.s390.vmeh" => "__builtin_s390_vmeh",
-    "llvm.s390.vmhb" => "__builtin_s390_vmhb",
-    "llvm.s390.vmhf" => "__builtin_s390_vmhf",
-    "llvm.s390.vmhg" => "__builtin_s390_vmhg",
-    "llvm.s390.vmhh" => "__builtin_s390_vmhh",
-    "llvm.s390.vmhq" => "__builtin_s390_vmhq",
-    "llvm.s390.vmleb" => "__builtin_s390_vmleb",
-    "llvm.s390.vmlef" => "__builtin_s390_vmlef",
-    "llvm.s390.vmleg" => "__builtin_s390_vmleg",
-    "llvm.s390.vmleh" => "__builtin_s390_vmleh",
-    "llvm.s390.vmlhb" => "__builtin_s390_vmlhb",
-    "llvm.s390.vmlhf" => "__builtin_s390_vmlhf",
-    "llvm.s390.vmlhg" => "__builtin_s390_vmlhg",
-    "llvm.s390.vmlhh" => "__builtin_s390_vmlhh",
-    "llvm.s390.vmlhq" => "__builtin_s390_vmlhq",
-    "llvm.s390.vmlob" => "__builtin_s390_vmlob",
-    "llvm.s390.vmlof" => "__builtin_s390_vmlof",
-    "llvm.s390.vmlog" => "__builtin_s390_vmlog",
-    "llvm.s390.vmloh" => "__builtin_s390_vmloh",
-    "llvm.s390.vmob" => "__builtin_s390_vmob",
-    "llvm.s390.vmof" => "__builtin_s390_vmof",
-    "llvm.s390.vmog" => "__builtin_s390_vmog",
-    "llvm.s390.vmoh" => "__builtin_s390_vmoh",
-    "llvm.s390.vmslg" => "__builtin_s390_vmslg",
-    "llvm.s390.vpdi" => "__builtin_s390_vpdi",
-    "llvm.s390.vperm" => "__builtin_s390_vperm",
-    "llvm.s390.vpklsf" => "__builtin_s390_vpklsf",
-    "llvm.s390.vpklsg" => "__builtin_s390_vpklsg",
-    "llvm.s390.vpklsh" => "__builtin_s390_vpklsh",
-    "llvm.s390.vpksf" => "__builtin_s390_vpksf",
-    "llvm.s390.vpksg" => "__builtin_s390_vpksg",
-    "llvm.s390.vpksh" => "__builtin_s390_vpksh",
-    "llvm.s390.vsbcbiq" => "__builtin_s390_vsbcbiq",
-    "llvm.s390.vsbiq" => "__builtin_s390_vsbiq",
-    "llvm.s390.vscbib" => "__builtin_s390_vscbib",
-    "llvm.s390.vscbif" => "__builtin_s390_vscbif",
-    "llvm.s390.vscbig" => "__builtin_s390_vscbig",
-    "llvm.s390.vscbih" => "__builtin_s390_vscbih",
-    "llvm.s390.vscbiq" => "__builtin_s390_vscbiq",
-    "llvm.s390.vsl" => "__builtin_s390_vsl",
-    "llvm.s390.vslb" => "__builtin_s390_vslb",
-    "llvm.s390.vsld" => "__builtin_s390_vsld",
-    "llvm.s390.vsldb" => "__builtin_s390_vsldb",
-    "llvm.s390.vsq" => "__builtin_s390_vsq",
-    "llvm.s390.vsra" => "__builtin_s390_vsra",
-    "llvm.s390.vsrab" => "__builtin_s390_vsrab",
-    "llvm.s390.vsrd" => "__builtin_s390_vsrd",
-    "llvm.s390.vsrl" => "__builtin_s390_vsrl",
-    "llvm.s390.vsrlb" => "__builtin_s390_vsrlb",
-    "llvm.s390.vstl" => "__builtin_s390_vstl",
-    "llvm.s390.vstrcb" => "__builtin_s390_vstrcb",
-    "llvm.s390.vstrcf" => "__builtin_s390_vstrcf",
-    "llvm.s390.vstrch" => "__builtin_s390_vstrch",
-    "llvm.s390.vstrczb" => "__builtin_s390_vstrczb",
-    "llvm.s390.vstrczf" => "__builtin_s390_vstrczf",
-    "llvm.s390.vstrczh" => "__builtin_s390_vstrczh",
-    "llvm.s390.vstrl" => "__builtin_s390_vstrlr",
-    "llvm.s390.vsumb" => "__builtin_s390_vsumb",
-    "llvm.s390.vsumgf" => "__builtin_s390_vsumgf",
-    "llvm.s390.vsumgh" => "__builtin_s390_vsumgh",
-    "llvm.s390.vsumh" => "__builtin_s390_vsumh",
-    "llvm.s390.vsumqf" => "__builtin_s390_vsumqf",
-    "llvm.s390.vsumqg" => "__builtin_s390_vsumqg",
-    "llvm.s390.vtm" => "__builtin_s390_vtm",
-    "llvm.s390.vuphb" => "__builtin_s390_vuphb",
-    "llvm.s390.vuphf" => "__builtin_s390_vuphf",
-    "llvm.s390.vuphg" => "__builtin_s390_vuphg",
-    "llvm.s390.vuphh" => "__builtin_s390_vuphh",
-    "llvm.s390.vuplb" => "__builtin_s390_vuplb",
-    "llvm.s390.vuplf" => "__builtin_s390_vuplf",
-    "llvm.s390.vuplg" => "__builtin_s390_vuplg",
-    "llvm.s390.vuplhb" => "__builtin_s390_vuplhb",
-    "llvm.s390.vuplhf" => "__builtin_s390_vuplhf",
-    "llvm.s390.vuplhg" => "__builtin_s390_vuplhg",
-    "llvm.s390.vuplhh" => "__builtin_s390_vuplhh",
-    "llvm.s390.vuplhw" => "__builtin_s390_vuplhw",
-    "llvm.s390.vupllb" => "__builtin_s390_vupllb",
-    "llvm.s390.vupllf" => "__builtin_s390_vupllf",
-    "llvm.s390.vupllg" => "__builtin_s390_vupllg",
-    "llvm.s390.vupllh" => "__builtin_s390_vupllh",
-    // ve
-    "llvm.ve.vl.andm.MMM" => "__builtin_ve_vl_andm_MMM",
-    "llvm.ve.vl.andm.mmm" => "__builtin_ve_vl_andm_mmm",
-    "llvm.ve.vl.eqvm.MMM" => "__builtin_ve_vl_eqvm_MMM",
-    "llvm.ve.vl.eqvm.mmm" => "__builtin_ve_vl_eqvm_mmm",
-    "llvm.ve.vl.extract.vm512l" => "__builtin_ve_vl_extract_vm512l",
-    "llvm.ve.vl.extract.vm512u" => "__builtin_ve_vl_extract_vm512u",
-    "llvm.ve.vl.fencec.s" => "__builtin_ve_vl_fencec_s",
-    "llvm.ve.vl.fencei" => "__builtin_ve_vl_fencei",
-    "llvm.ve.vl.fencem.s" => "__builtin_ve_vl_fencem_s",
-    "llvm.ve.vl.fidcr.sss" => "__builtin_ve_vl_fidcr_sss",
-    "llvm.ve.vl.insert.vm512l" => "__builtin_ve_vl_insert_vm512l",
-    "llvm.ve.vl.insert.vm512u" => "__builtin_ve_vl_insert_vm512u",
-    "llvm.ve.vl.lcr.sss" => "__builtin_ve_vl_lcr_sss",
-    "llvm.ve.vl.lsv.vvss" => "__builtin_ve_vl_lsv_vvss",
-    "llvm.ve.vl.lvm.MMss" => "__builtin_ve_vl_lvm_MMss",
-    "llvm.ve.vl.lvm.mmss" => "__builtin_ve_vl_lvm_mmss",
-    "llvm.ve.vl.lvsd.svs" => "__builtin_ve_vl_lvsd_svs",
-    "llvm.ve.vl.lvsl.svs" => "__builtin_ve_vl_lvsl_svs",
-    "llvm.ve.vl.lvss.svs" => "__builtin_ve_vl_lvss_svs",
-    "llvm.ve.vl.lzvm.sml" => "__builtin_ve_vl_lzvm_sml",
-    "llvm.ve.vl.negm.MM" => "__builtin_ve_vl_negm_MM",
-    "llvm.ve.vl.negm.mm" => "__builtin_ve_vl_negm_mm",
-    "llvm.ve.vl.nndm.MMM" => "__builtin_ve_vl_nndm_MMM",
-    "llvm.ve.vl.nndm.mmm" => "__builtin_ve_vl_nndm_mmm",
-    "llvm.ve.vl.orm.MMM" => "__builtin_ve_vl_orm_MMM",
-    "llvm.ve.vl.orm.mmm" => "__builtin_ve_vl_orm_mmm",
-    "llvm.ve.vl.pack.f32a" => "__builtin_ve_vl_pack_f32a",
-    "llvm.ve.vl.pack.f32p" => "__builtin_ve_vl_pack_f32p",
-    "llvm.ve.vl.pcvm.sml" => "__builtin_ve_vl_pcvm_sml",
-    "llvm.ve.vl.pfchv.ssl" => "__builtin_ve_vl_pfchv_ssl",
-    "llvm.ve.vl.pfchvnc.ssl" => "__builtin_ve_vl_pfchvnc_ssl",
-    "llvm.ve.vl.pvadds.vsvMvl" => "__builtin_ve_vl_pvadds_vsvMvl",
-    "llvm.ve.vl.pvadds.vsvl" => "__builtin_ve_vl_pvadds_vsvl",
-    "llvm.ve.vl.pvadds.vsvvl" => "__builtin_ve_vl_pvadds_vsvvl",
-    "llvm.ve.vl.pvadds.vvvMvl" => "__builtin_ve_vl_pvadds_vvvMvl",
-    "llvm.ve.vl.pvadds.vvvl" => "__builtin_ve_vl_pvadds_vvvl",
-    "llvm.ve.vl.pvadds.vvvvl" => "__builtin_ve_vl_pvadds_vvvvl",
-    "llvm.ve.vl.pvaddu.vsvMvl" => "__builtin_ve_vl_pvaddu_vsvMvl",
-    "llvm.ve.vl.pvaddu.vsvl" => "__builtin_ve_vl_pvaddu_vsvl",
-    "llvm.ve.vl.pvaddu.vsvvl" => "__builtin_ve_vl_pvaddu_vsvvl",
-    "llvm.ve.vl.pvaddu.vvvMvl" => "__builtin_ve_vl_pvaddu_vvvMvl",
-    "llvm.ve.vl.pvaddu.vvvl" => "__builtin_ve_vl_pvaddu_vvvl",
-    "llvm.ve.vl.pvaddu.vvvvl" => "__builtin_ve_vl_pvaddu_vvvvl",
-    "llvm.ve.vl.pvand.vsvMvl" => "__builtin_ve_vl_pvand_vsvMvl",
-    "llvm.ve.vl.pvand.vsvl" => "__builtin_ve_vl_pvand_vsvl",
-    "llvm.ve.vl.pvand.vsvvl" => "__builtin_ve_vl_pvand_vsvvl",
-    "llvm.ve.vl.pvand.vvvMvl" => "__builtin_ve_vl_pvand_vvvMvl",
-    "llvm.ve.vl.pvand.vvvl" => "__builtin_ve_vl_pvand_vvvl",
-    "llvm.ve.vl.pvand.vvvvl" => "__builtin_ve_vl_pvand_vvvvl",
-    "llvm.ve.vl.pvbrd.vsMvl" => "__builtin_ve_vl_pvbrd_vsMvl",
-    "llvm.ve.vl.pvbrd.vsl" => "__builtin_ve_vl_pvbrd_vsl",
-    "llvm.ve.vl.pvbrd.vsvl" => "__builtin_ve_vl_pvbrd_vsvl",
-    "llvm.ve.vl.pvbrv.vvMvl" => "__builtin_ve_vl_pvbrv_vvMvl",
-    "llvm.ve.vl.pvbrv.vvl" => "__builtin_ve_vl_pvbrv_vvl",
-    "llvm.ve.vl.pvbrv.vvvl" => "__builtin_ve_vl_pvbrv_vvvl",
-    "llvm.ve.vl.pvbrvlo.vvl" => "__builtin_ve_vl_pvbrvlo_vvl",
-    "llvm.ve.vl.pvbrvlo.vvmvl" => "__builtin_ve_vl_pvbrvlo_vvmvl",
-    "llvm.ve.vl.pvbrvlo.vvvl" => "__builtin_ve_vl_pvbrvlo_vvvl",
-    "llvm.ve.vl.pvbrvup.vvl" => "__builtin_ve_vl_pvbrvup_vvl",
-    "llvm.ve.vl.pvbrvup.vvmvl" => "__builtin_ve_vl_pvbrvup_vvmvl",
-    "llvm.ve.vl.pvbrvup.vvvl" => "__builtin_ve_vl_pvbrvup_vvvl",
-    "llvm.ve.vl.pvcmps.vsvMvl" => "__builtin_ve_vl_pvcmps_vsvMvl",
-    "llvm.ve.vl.pvcmps.vsvl" => "__builtin_ve_vl_pvcmps_vsvl",
-    "llvm.ve.vl.pvcmps.vsvvl" => "__builtin_ve_vl_pvcmps_vsvvl",
-    "llvm.ve.vl.pvcmps.vvvMvl" => "__builtin_ve_vl_pvcmps_vvvMvl",
-    "llvm.ve.vl.pvcmps.vvvl" => "__builtin_ve_vl_pvcmps_vvvl",
-    "llvm.ve.vl.pvcmps.vvvvl" => "__builtin_ve_vl_pvcmps_vvvvl",
-    "llvm.ve.vl.pvcmpu.vsvMvl" => "__builtin_ve_vl_pvcmpu_vsvMvl",
-    "llvm.ve.vl.pvcmpu.vsvl" => "__builtin_ve_vl_pvcmpu_vsvl",
-    "llvm.ve.vl.pvcmpu.vsvvl" => "__builtin_ve_vl_pvcmpu_vsvvl",
-    "llvm.ve.vl.pvcmpu.vvvMvl" => "__builtin_ve_vl_pvcmpu_vvvMvl",
-    "llvm.ve.vl.pvcmpu.vvvl" => "__builtin_ve_vl_pvcmpu_vvvl",
-    "llvm.ve.vl.pvcmpu.vvvvl" => "__builtin_ve_vl_pvcmpu_vvvvl",
-    "llvm.ve.vl.pvcvtsw.vvl" => "__builtin_ve_vl_pvcvtsw_vvl",
-    "llvm.ve.vl.pvcvtsw.vvvl" => "__builtin_ve_vl_pvcvtsw_vvvl",
-    "llvm.ve.vl.pvcvtws.vvMvl" => "__builtin_ve_vl_pvcvtws_vvMvl",
-    "llvm.ve.vl.pvcvtws.vvl" => "__builtin_ve_vl_pvcvtws_vvl",
-    "llvm.ve.vl.pvcvtws.vvvl" => "__builtin_ve_vl_pvcvtws_vvvl",
-    "llvm.ve.vl.pvcvtwsrz.vvMvl" => "__builtin_ve_vl_pvcvtwsrz_vvMvl",
-    "llvm.ve.vl.pvcvtwsrz.vvl" => "__builtin_ve_vl_pvcvtwsrz_vvl",
-    "llvm.ve.vl.pvcvtwsrz.vvvl" => "__builtin_ve_vl_pvcvtwsrz_vvvl",
-    "llvm.ve.vl.pveqv.vsvMvl" => "__builtin_ve_vl_pveqv_vsvMvl",
-    "llvm.ve.vl.pveqv.vsvl" => "__builtin_ve_vl_pveqv_vsvl",
-    "llvm.ve.vl.pveqv.vsvvl" => "__builtin_ve_vl_pveqv_vsvvl",
-    "llvm.ve.vl.pveqv.vvvMvl" => "__builtin_ve_vl_pveqv_vvvMvl",
-    "llvm.ve.vl.pveqv.vvvl" => "__builtin_ve_vl_pveqv_vvvl",
-    "llvm.ve.vl.pveqv.vvvvl" => "__builtin_ve_vl_pveqv_vvvvl",
-    "llvm.ve.vl.pvfadd.vsvMvl" => "__builtin_ve_vl_pvfadd_vsvMvl",
-    "llvm.ve.vl.pvfadd.vsvl" => "__builtin_ve_vl_pvfadd_vsvl",
-    "llvm.ve.vl.pvfadd.vsvvl" => "__builtin_ve_vl_pvfadd_vsvvl",
-    "llvm.ve.vl.pvfadd.vvvMvl" => "__builtin_ve_vl_pvfadd_vvvMvl",
-    "llvm.ve.vl.pvfadd.vvvl" => "__builtin_ve_vl_pvfadd_vvvl",
-    "llvm.ve.vl.pvfadd.vvvvl" => "__builtin_ve_vl_pvfadd_vvvvl",
-    "llvm.ve.vl.pvfcmp.vsvMvl" => "__builtin_ve_vl_pvfcmp_vsvMvl",
-    "llvm.ve.vl.pvfcmp.vsvl" => "__builtin_ve_vl_pvfcmp_vsvl",
-    "llvm.ve.vl.pvfcmp.vsvvl" => "__builtin_ve_vl_pvfcmp_vsvvl",
-    "llvm.ve.vl.pvfcmp.vvvMvl" => "__builtin_ve_vl_pvfcmp_vvvMvl",
-    "llvm.ve.vl.pvfcmp.vvvl" => "__builtin_ve_vl_pvfcmp_vvvl",
-    "llvm.ve.vl.pvfcmp.vvvvl" => "__builtin_ve_vl_pvfcmp_vvvvl",
-    "llvm.ve.vl.pvfmad.vsvvMvl" => "__builtin_ve_vl_pvfmad_vsvvMvl",
-    "llvm.ve.vl.pvfmad.vsvvl" => "__builtin_ve_vl_pvfmad_vsvvl",
-    "llvm.ve.vl.pvfmad.vsvvvl" => "__builtin_ve_vl_pvfmad_vsvvvl",
-    "llvm.ve.vl.pvfmad.vvsvMvl" => "__builtin_ve_vl_pvfmad_vvsvMvl",
-    "llvm.ve.vl.pvfmad.vvsvl" => "__builtin_ve_vl_pvfmad_vvsvl",
-    "llvm.ve.vl.pvfmad.vvsvvl" => "__builtin_ve_vl_pvfmad_vvsvvl",
-    "llvm.ve.vl.pvfmad.vvvvMvl" => "__builtin_ve_vl_pvfmad_vvvvMvl",
-    "llvm.ve.vl.pvfmad.vvvvl" => "__builtin_ve_vl_pvfmad_vvvvl",
-    "llvm.ve.vl.pvfmad.vvvvvl" => "__builtin_ve_vl_pvfmad_vvvvvl",
-    "llvm.ve.vl.pvfmax.vsvMvl" => "__builtin_ve_vl_pvfmax_vsvMvl",
-    "llvm.ve.vl.pvfmax.vsvl" => "__builtin_ve_vl_pvfmax_vsvl",
-    "llvm.ve.vl.pvfmax.vsvvl" => "__builtin_ve_vl_pvfmax_vsvvl",
-    "llvm.ve.vl.pvfmax.vvvMvl" => "__builtin_ve_vl_pvfmax_vvvMvl",
-    "llvm.ve.vl.pvfmax.vvvl" => "__builtin_ve_vl_pvfmax_vvvl",
-    "llvm.ve.vl.pvfmax.vvvvl" => "__builtin_ve_vl_pvfmax_vvvvl",
-    "llvm.ve.vl.pvfmin.vsvMvl" => "__builtin_ve_vl_pvfmin_vsvMvl",
-    "llvm.ve.vl.pvfmin.vsvl" => "__builtin_ve_vl_pvfmin_vsvl",
-    "llvm.ve.vl.pvfmin.vsvvl" => "__builtin_ve_vl_pvfmin_vsvvl",
-    "llvm.ve.vl.pvfmin.vvvMvl" => "__builtin_ve_vl_pvfmin_vvvMvl",
-    "llvm.ve.vl.pvfmin.vvvl" => "__builtin_ve_vl_pvfmin_vvvl",
-    "llvm.ve.vl.pvfmin.vvvvl" => "__builtin_ve_vl_pvfmin_vvvvl",
-    "llvm.ve.vl.pvfmkaf.Ml" => "__builtin_ve_vl_pvfmkaf_Ml",
-    "llvm.ve.vl.pvfmkat.Ml" => "__builtin_ve_vl_pvfmkat_Ml",
-    "llvm.ve.vl.pvfmkseq.MvMl" => "__builtin_ve_vl_pvfmkseq_MvMl",
-    "llvm.ve.vl.pvfmkseq.Mvl" => "__builtin_ve_vl_pvfmkseq_Mvl",
-    "llvm.ve.vl.pvfmkseqnan.MvMl" => "__builtin_ve_vl_pvfmkseqnan_MvMl",
-    "llvm.ve.vl.pvfmkseqnan.Mvl" => "__builtin_ve_vl_pvfmkseqnan_Mvl",
-    "llvm.ve.vl.pvfmksge.MvMl" => "__builtin_ve_vl_pvfmksge_MvMl",
-    "llvm.ve.vl.pvfmksge.Mvl" => "__builtin_ve_vl_pvfmksge_Mvl",
-    "llvm.ve.vl.pvfmksgenan.MvMl" => "__builtin_ve_vl_pvfmksgenan_MvMl",
-    "llvm.ve.vl.pvfmksgenan.Mvl" => "__builtin_ve_vl_pvfmksgenan_Mvl",
-    "llvm.ve.vl.pvfmksgt.MvMl" => "__builtin_ve_vl_pvfmksgt_MvMl",
-    "llvm.ve.vl.pvfmksgt.Mvl" => "__builtin_ve_vl_pvfmksgt_Mvl",
-    "llvm.ve.vl.pvfmksgtnan.MvMl" => "__builtin_ve_vl_pvfmksgtnan_MvMl",
-    "llvm.ve.vl.pvfmksgtnan.Mvl" => "__builtin_ve_vl_pvfmksgtnan_Mvl",
-    "llvm.ve.vl.pvfmksle.MvMl" => "__builtin_ve_vl_pvfmksle_MvMl",
-    "llvm.ve.vl.pvfmksle.Mvl" => "__builtin_ve_vl_pvfmksle_Mvl",
-    "llvm.ve.vl.pvfmkslenan.MvMl" => "__builtin_ve_vl_pvfmkslenan_MvMl",
-    "llvm.ve.vl.pvfmkslenan.Mvl" => "__builtin_ve_vl_pvfmkslenan_Mvl",
-    "llvm.ve.vl.pvfmksloeq.mvl" => "__builtin_ve_vl_pvfmksloeq_mvl",
-    "llvm.ve.vl.pvfmksloeq.mvml" => "__builtin_ve_vl_pvfmksloeq_mvml",
-    "llvm.ve.vl.pvfmksloeqnan.mvl" => "__builtin_ve_vl_pvfmksloeqnan_mvl",
-    "llvm.ve.vl.pvfmksloeqnan.mvml" => "__builtin_ve_vl_pvfmksloeqnan_mvml",
-    "llvm.ve.vl.pvfmksloge.mvl" => "__builtin_ve_vl_pvfmksloge_mvl",
-    "llvm.ve.vl.pvfmksloge.mvml" => "__builtin_ve_vl_pvfmksloge_mvml",
-    "llvm.ve.vl.pvfmkslogenan.mvl" => "__builtin_ve_vl_pvfmkslogenan_mvl",
-    "llvm.ve.vl.pvfmkslogenan.mvml" => "__builtin_ve_vl_pvfmkslogenan_mvml",
-    "llvm.ve.vl.pvfmkslogt.mvl" => "__builtin_ve_vl_pvfmkslogt_mvl",
-    "llvm.ve.vl.pvfmkslogt.mvml" => "__builtin_ve_vl_pvfmkslogt_mvml",
-    "llvm.ve.vl.pvfmkslogtnan.mvl" => "__builtin_ve_vl_pvfmkslogtnan_mvl",
-    "llvm.ve.vl.pvfmkslogtnan.mvml" => "__builtin_ve_vl_pvfmkslogtnan_mvml",
-    "llvm.ve.vl.pvfmkslole.mvl" => "__builtin_ve_vl_pvfmkslole_mvl",
-    "llvm.ve.vl.pvfmkslole.mvml" => "__builtin_ve_vl_pvfmkslole_mvml",
-    "llvm.ve.vl.pvfmkslolenan.mvl" => "__builtin_ve_vl_pvfmkslolenan_mvl",
-    "llvm.ve.vl.pvfmkslolenan.mvml" => "__builtin_ve_vl_pvfmkslolenan_mvml",
-    "llvm.ve.vl.pvfmkslolt.mvl" => "__builtin_ve_vl_pvfmkslolt_mvl",
-    "llvm.ve.vl.pvfmkslolt.mvml" => "__builtin_ve_vl_pvfmkslolt_mvml",
-    "llvm.ve.vl.pvfmksloltnan.mvl" => "__builtin_ve_vl_pvfmksloltnan_mvl",
-    "llvm.ve.vl.pvfmksloltnan.mvml" => "__builtin_ve_vl_pvfmksloltnan_mvml",
-    "llvm.ve.vl.pvfmkslonan.mvl" => "__builtin_ve_vl_pvfmkslonan_mvl",
-    "llvm.ve.vl.pvfmkslonan.mvml" => "__builtin_ve_vl_pvfmkslonan_mvml",
-    "llvm.ve.vl.pvfmkslone.mvl" => "__builtin_ve_vl_pvfmkslone_mvl",
-    "llvm.ve.vl.pvfmkslone.mvml" => "__builtin_ve_vl_pvfmkslone_mvml",
-    "llvm.ve.vl.pvfmkslonenan.mvl" => "__builtin_ve_vl_pvfmkslonenan_mvl",
-    "llvm.ve.vl.pvfmkslonenan.mvml" => "__builtin_ve_vl_pvfmkslonenan_mvml",
-    "llvm.ve.vl.pvfmkslonum.mvl" => "__builtin_ve_vl_pvfmkslonum_mvl",
-    "llvm.ve.vl.pvfmkslonum.mvml" => "__builtin_ve_vl_pvfmkslonum_mvml",
-    "llvm.ve.vl.pvfmkslt.MvMl" => "__builtin_ve_vl_pvfmkslt_MvMl",
-    "llvm.ve.vl.pvfmkslt.Mvl" => "__builtin_ve_vl_pvfmkslt_Mvl",
-    "llvm.ve.vl.pvfmksltnan.MvMl" => "__builtin_ve_vl_pvfmksltnan_MvMl",
-    "llvm.ve.vl.pvfmksltnan.Mvl" => "__builtin_ve_vl_pvfmksltnan_Mvl",
-    "llvm.ve.vl.pvfmksnan.MvMl" => "__builtin_ve_vl_pvfmksnan_MvMl",
-    "llvm.ve.vl.pvfmksnan.Mvl" => "__builtin_ve_vl_pvfmksnan_Mvl",
-    "llvm.ve.vl.pvfmksne.MvMl" => "__builtin_ve_vl_pvfmksne_MvMl",
-    "llvm.ve.vl.pvfmksne.Mvl" => "__builtin_ve_vl_pvfmksne_Mvl",
-    "llvm.ve.vl.pvfmksnenan.MvMl" => "__builtin_ve_vl_pvfmksnenan_MvMl",
-    "llvm.ve.vl.pvfmksnenan.Mvl" => "__builtin_ve_vl_pvfmksnenan_Mvl",
-    "llvm.ve.vl.pvfmksnum.MvMl" => "__builtin_ve_vl_pvfmksnum_MvMl",
-    "llvm.ve.vl.pvfmksnum.Mvl" => "__builtin_ve_vl_pvfmksnum_Mvl",
-    "llvm.ve.vl.pvfmksupeq.mvl" => "__builtin_ve_vl_pvfmksupeq_mvl",
-    "llvm.ve.vl.pvfmksupeq.mvml" => "__builtin_ve_vl_pvfmksupeq_mvml",
-    "llvm.ve.vl.pvfmksupeqnan.mvl" => "__builtin_ve_vl_pvfmksupeqnan_mvl",
-    "llvm.ve.vl.pvfmksupeqnan.mvml" => "__builtin_ve_vl_pvfmksupeqnan_mvml",
-    "llvm.ve.vl.pvfmksupge.mvl" => "__builtin_ve_vl_pvfmksupge_mvl",
-    "llvm.ve.vl.pvfmksupge.mvml" => "__builtin_ve_vl_pvfmksupge_mvml",
-    "llvm.ve.vl.pvfmksupgenan.mvl" => "__builtin_ve_vl_pvfmksupgenan_mvl",
-    "llvm.ve.vl.pvfmksupgenan.mvml" => "__builtin_ve_vl_pvfmksupgenan_mvml",
-    "llvm.ve.vl.pvfmksupgt.mvl" => "__builtin_ve_vl_pvfmksupgt_mvl",
-    "llvm.ve.vl.pvfmksupgt.mvml" => "__builtin_ve_vl_pvfmksupgt_mvml",
-    "llvm.ve.vl.pvfmksupgtnan.mvl" => "__builtin_ve_vl_pvfmksupgtnan_mvl",
-    "llvm.ve.vl.pvfmksupgtnan.mvml" => "__builtin_ve_vl_pvfmksupgtnan_mvml",
-    "llvm.ve.vl.pvfmksuple.mvl" => "__builtin_ve_vl_pvfmksuple_mvl",
-    "llvm.ve.vl.pvfmksuple.mvml" => "__builtin_ve_vl_pvfmksuple_mvml",
-    "llvm.ve.vl.pvfmksuplenan.mvl" => "__builtin_ve_vl_pvfmksuplenan_mvl",
-    "llvm.ve.vl.pvfmksuplenan.mvml" => "__builtin_ve_vl_pvfmksuplenan_mvml",
-    "llvm.ve.vl.pvfmksuplt.mvl" => "__builtin_ve_vl_pvfmksuplt_mvl",
-    "llvm.ve.vl.pvfmksuplt.mvml" => "__builtin_ve_vl_pvfmksuplt_mvml",
-    "llvm.ve.vl.pvfmksupltnan.mvl" => "__builtin_ve_vl_pvfmksupltnan_mvl",
-    "llvm.ve.vl.pvfmksupltnan.mvml" => "__builtin_ve_vl_pvfmksupltnan_mvml",
-    "llvm.ve.vl.pvfmksupnan.mvl" => "__builtin_ve_vl_pvfmksupnan_mvl",
-    "llvm.ve.vl.pvfmksupnan.mvml" => "__builtin_ve_vl_pvfmksupnan_mvml",
-    "llvm.ve.vl.pvfmksupne.mvl" => "__builtin_ve_vl_pvfmksupne_mvl",
-    "llvm.ve.vl.pvfmksupne.mvml" => "__builtin_ve_vl_pvfmksupne_mvml",
-    "llvm.ve.vl.pvfmksupnenan.mvl" => "__builtin_ve_vl_pvfmksupnenan_mvl",
-    "llvm.ve.vl.pvfmksupnenan.mvml" => "__builtin_ve_vl_pvfmksupnenan_mvml",
-    "llvm.ve.vl.pvfmksupnum.mvl" => "__builtin_ve_vl_pvfmksupnum_mvl",
-    "llvm.ve.vl.pvfmksupnum.mvml" => "__builtin_ve_vl_pvfmksupnum_mvml",
-    "llvm.ve.vl.pvfmkweq.MvMl" => "__builtin_ve_vl_pvfmkweq_MvMl",
-    "llvm.ve.vl.pvfmkweq.Mvl" => "__builtin_ve_vl_pvfmkweq_Mvl",
-    "llvm.ve.vl.pvfmkweqnan.MvMl" => "__builtin_ve_vl_pvfmkweqnan_MvMl",
-    "llvm.ve.vl.pvfmkweqnan.Mvl" => "__builtin_ve_vl_pvfmkweqnan_Mvl",
-    "llvm.ve.vl.pvfmkwge.MvMl" => "__builtin_ve_vl_pvfmkwge_MvMl",
-    "llvm.ve.vl.pvfmkwge.Mvl" => "__builtin_ve_vl_pvfmkwge_Mvl",
-    "llvm.ve.vl.pvfmkwgenan.MvMl" => "__builtin_ve_vl_pvfmkwgenan_MvMl",
-    "llvm.ve.vl.pvfmkwgenan.Mvl" => "__builtin_ve_vl_pvfmkwgenan_Mvl",
-    "llvm.ve.vl.pvfmkwgt.MvMl" => "__builtin_ve_vl_pvfmkwgt_MvMl",
-    "llvm.ve.vl.pvfmkwgt.Mvl" => "__builtin_ve_vl_pvfmkwgt_Mvl",
-    "llvm.ve.vl.pvfmkwgtnan.MvMl" => "__builtin_ve_vl_pvfmkwgtnan_MvMl",
-    "llvm.ve.vl.pvfmkwgtnan.Mvl" => "__builtin_ve_vl_pvfmkwgtnan_Mvl",
-    "llvm.ve.vl.pvfmkwle.MvMl" => "__builtin_ve_vl_pvfmkwle_MvMl",
-    "llvm.ve.vl.pvfmkwle.Mvl" => "__builtin_ve_vl_pvfmkwle_Mvl",
-    "llvm.ve.vl.pvfmkwlenan.MvMl" => "__builtin_ve_vl_pvfmkwlenan_MvMl",
-    "llvm.ve.vl.pvfmkwlenan.Mvl" => "__builtin_ve_vl_pvfmkwlenan_Mvl",
-    "llvm.ve.vl.pvfmkwloeq.mvl" => "__builtin_ve_vl_pvfmkwloeq_mvl",
-    "llvm.ve.vl.pvfmkwloeq.mvml" => "__builtin_ve_vl_pvfmkwloeq_mvml",
-    "llvm.ve.vl.pvfmkwloeqnan.mvl" => "__builtin_ve_vl_pvfmkwloeqnan_mvl",
-    "llvm.ve.vl.pvfmkwloeqnan.mvml" => "__builtin_ve_vl_pvfmkwloeqnan_mvml",
-    "llvm.ve.vl.pvfmkwloge.mvl" => "__builtin_ve_vl_pvfmkwloge_mvl",
-    "llvm.ve.vl.pvfmkwloge.mvml" => "__builtin_ve_vl_pvfmkwloge_mvml",
-    "llvm.ve.vl.pvfmkwlogenan.mvl" => "__builtin_ve_vl_pvfmkwlogenan_mvl",
-    "llvm.ve.vl.pvfmkwlogenan.mvml" => "__builtin_ve_vl_pvfmkwlogenan_mvml",
-    "llvm.ve.vl.pvfmkwlogt.mvl" => "__builtin_ve_vl_pvfmkwlogt_mvl",
-    "llvm.ve.vl.pvfmkwlogt.mvml" => "__builtin_ve_vl_pvfmkwlogt_mvml",
-    "llvm.ve.vl.pvfmkwlogtnan.mvl" => "__builtin_ve_vl_pvfmkwlogtnan_mvl",
-    "llvm.ve.vl.pvfmkwlogtnan.mvml" => "__builtin_ve_vl_pvfmkwlogtnan_mvml",
-    "llvm.ve.vl.pvfmkwlole.mvl" => "__builtin_ve_vl_pvfmkwlole_mvl",
-    "llvm.ve.vl.pvfmkwlole.mvml" => "__builtin_ve_vl_pvfmkwlole_mvml",
-    "llvm.ve.vl.pvfmkwlolenan.mvl" => "__builtin_ve_vl_pvfmkwlolenan_mvl",
-    "llvm.ve.vl.pvfmkwlolenan.mvml" => "__builtin_ve_vl_pvfmkwlolenan_mvml",
-    "llvm.ve.vl.pvfmkwlolt.mvl" => "__builtin_ve_vl_pvfmkwlolt_mvl",
-    "llvm.ve.vl.pvfmkwlolt.mvml" => "__builtin_ve_vl_pvfmkwlolt_mvml",
-    "llvm.ve.vl.pvfmkwloltnan.mvl" => "__builtin_ve_vl_pvfmkwloltnan_mvl",
-    "llvm.ve.vl.pvfmkwloltnan.mvml" => "__builtin_ve_vl_pvfmkwloltnan_mvml",
-    "llvm.ve.vl.pvfmkwlonan.mvl" => "__builtin_ve_vl_pvfmkwlonan_mvl",
-    "llvm.ve.vl.pvfmkwlonan.mvml" => "__builtin_ve_vl_pvfmkwlonan_mvml",
-    "llvm.ve.vl.pvfmkwlone.mvl" => "__builtin_ve_vl_pvfmkwlone_mvl",
-    "llvm.ve.vl.pvfmkwlone.mvml" => "__builtin_ve_vl_pvfmkwlone_mvml",
-    "llvm.ve.vl.pvfmkwlonenan.mvl" => "__builtin_ve_vl_pvfmkwlonenan_mvl",
-    "llvm.ve.vl.pvfmkwlonenan.mvml" => "__builtin_ve_vl_pvfmkwlonenan_mvml",
-    "llvm.ve.vl.pvfmkwlonum.mvl" => "__builtin_ve_vl_pvfmkwlonum_mvl",
-    "llvm.ve.vl.pvfmkwlonum.mvml" => "__builtin_ve_vl_pvfmkwlonum_mvml",
-    "llvm.ve.vl.pvfmkwlt.MvMl" => "__builtin_ve_vl_pvfmkwlt_MvMl",
-    "llvm.ve.vl.pvfmkwlt.Mvl" => "__builtin_ve_vl_pvfmkwlt_Mvl",
-    "llvm.ve.vl.pvfmkwltnan.MvMl" => "__builtin_ve_vl_pvfmkwltnan_MvMl",
-    "llvm.ve.vl.pvfmkwltnan.Mvl" => "__builtin_ve_vl_pvfmkwltnan_Mvl",
-    "llvm.ve.vl.pvfmkwnan.MvMl" => "__builtin_ve_vl_pvfmkwnan_MvMl",
-    "llvm.ve.vl.pvfmkwnan.Mvl" => "__builtin_ve_vl_pvfmkwnan_Mvl",
-    "llvm.ve.vl.pvfmkwne.MvMl" => "__builtin_ve_vl_pvfmkwne_MvMl",
-    "llvm.ve.vl.pvfmkwne.Mvl" => "__builtin_ve_vl_pvfmkwne_Mvl",
-    "llvm.ve.vl.pvfmkwnenan.MvMl" => "__builtin_ve_vl_pvfmkwnenan_MvMl",
-    "llvm.ve.vl.pvfmkwnenan.Mvl" => "__builtin_ve_vl_pvfmkwnenan_Mvl",
-    "llvm.ve.vl.pvfmkwnum.MvMl" => "__builtin_ve_vl_pvfmkwnum_MvMl",
-    "llvm.ve.vl.pvfmkwnum.Mvl" => "__builtin_ve_vl_pvfmkwnum_Mvl",
-    "llvm.ve.vl.pvfmkwupeq.mvl" => "__builtin_ve_vl_pvfmkwupeq_mvl",
-    "llvm.ve.vl.pvfmkwupeq.mvml" => "__builtin_ve_vl_pvfmkwupeq_mvml",
-    "llvm.ve.vl.pvfmkwupeqnan.mvl" => "__builtin_ve_vl_pvfmkwupeqnan_mvl",
-    "llvm.ve.vl.pvfmkwupeqnan.mvml" => "__builtin_ve_vl_pvfmkwupeqnan_mvml",
-    "llvm.ve.vl.pvfmkwupge.mvl" => "__builtin_ve_vl_pvfmkwupge_mvl",
-    "llvm.ve.vl.pvfmkwupge.mvml" => "__builtin_ve_vl_pvfmkwupge_mvml",
-    "llvm.ve.vl.pvfmkwupgenan.mvl" => "__builtin_ve_vl_pvfmkwupgenan_mvl",
-    "llvm.ve.vl.pvfmkwupgenan.mvml" => "__builtin_ve_vl_pvfmkwupgenan_mvml",
-    "llvm.ve.vl.pvfmkwupgt.mvl" => "__builtin_ve_vl_pvfmkwupgt_mvl",
-    "llvm.ve.vl.pvfmkwupgt.mvml" => "__builtin_ve_vl_pvfmkwupgt_mvml",
-    "llvm.ve.vl.pvfmkwupgtnan.mvl" => "__builtin_ve_vl_pvfmkwupgtnan_mvl",
-    "llvm.ve.vl.pvfmkwupgtnan.mvml" => "__builtin_ve_vl_pvfmkwupgtnan_mvml",
-    "llvm.ve.vl.pvfmkwuple.mvl" => "__builtin_ve_vl_pvfmkwuple_mvl",
-    "llvm.ve.vl.pvfmkwuple.mvml" => "__builtin_ve_vl_pvfmkwuple_mvml",
-    "llvm.ve.vl.pvfmkwuplenan.mvl" => "__builtin_ve_vl_pvfmkwuplenan_mvl",
-    "llvm.ve.vl.pvfmkwuplenan.mvml" => "__builtin_ve_vl_pvfmkwuplenan_mvml",
-    "llvm.ve.vl.pvfmkwuplt.mvl" => "__builtin_ve_vl_pvfmkwuplt_mvl",
-    "llvm.ve.vl.pvfmkwuplt.mvml" => "__builtin_ve_vl_pvfmkwuplt_mvml",
-    "llvm.ve.vl.pvfmkwupltnan.mvl" => "__builtin_ve_vl_pvfmkwupltnan_mvl",
-    "llvm.ve.vl.pvfmkwupltnan.mvml" => "__builtin_ve_vl_pvfmkwupltnan_mvml",
-    "llvm.ve.vl.pvfmkwupnan.mvl" => "__builtin_ve_vl_pvfmkwupnan_mvl",
-    "llvm.ve.vl.pvfmkwupnan.mvml" => "__builtin_ve_vl_pvfmkwupnan_mvml",
-    "llvm.ve.vl.pvfmkwupne.mvl" => "__builtin_ve_vl_pvfmkwupne_mvl",
-    "llvm.ve.vl.pvfmkwupne.mvml" => "__builtin_ve_vl_pvfmkwupne_mvml",
-    "llvm.ve.vl.pvfmkwupnenan.mvl" => "__builtin_ve_vl_pvfmkwupnenan_mvl",
-    "llvm.ve.vl.pvfmkwupnenan.mvml" => "__builtin_ve_vl_pvfmkwupnenan_mvml",
-    "llvm.ve.vl.pvfmkwupnum.mvl" => "__builtin_ve_vl_pvfmkwupnum_mvl",
-    "llvm.ve.vl.pvfmkwupnum.mvml" => "__builtin_ve_vl_pvfmkwupnum_mvml",
-    "llvm.ve.vl.pvfmsb.vsvvMvl" => "__builtin_ve_vl_pvfmsb_vsvvMvl",
-    "llvm.ve.vl.pvfmsb.vsvvl" => "__builtin_ve_vl_pvfmsb_vsvvl",
-    "llvm.ve.vl.pvfmsb.vsvvvl" => "__builtin_ve_vl_pvfmsb_vsvvvl",
-    "llvm.ve.vl.pvfmsb.vvsvMvl" => "__builtin_ve_vl_pvfmsb_vvsvMvl",
-    "llvm.ve.vl.pvfmsb.vvsvl" => "__builtin_ve_vl_pvfmsb_vvsvl",
-    "llvm.ve.vl.pvfmsb.vvsvvl" => "__builtin_ve_vl_pvfmsb_vvsvvl",
-    "llvm.ve.vl.pvfmsb.vvvvMvl" => "__builtin_ve_vl_pvfmsb_vvvvMvl",
-    "llvm.ve.vl.pvfmsb.vvvvl" => "__builtin_ve_vl_pvfmsb_vvvvl",
-    "llvm.ve.vl.pvfmsb.vvvvvl" => "__builtin_ve_vl_pvfmsb_vvvvvl",
-    "llvm.ve.vl.pvfmul.vsvMvl" => "__builtin_ve_vl_pvfmul_vsvMvl",
-    "llvm.ve.vl.pvfmul.vsvl" => "__builtin_ve_vl_pvfmul_vsvl",
-    "llvm.ve.vl.pvfmul.vsvvl" => "__builtin_ve_vl_pvfmul_vsvvl",
-    "llvm.ve.vl.pvfmul.vvvMvl" => "__builtin_ve_vl_pvfmul_vvvMvl",
-    "llvm.ve.vl.pvfmul.vvvl" => "__builtin_ve_vl_pvfmul_vvvl",
-    "llvm.ve.vl.pvfmul.vvvvl" => "__builtin_ve_vl_pvfmul_vvvvl",
-    "llvm.ve.vl.pvfnmad.vsvvMvl" => "__builtin_ve_vl_pvfnmad_vsvvMvl",
-    "llvm.ve.vl.pvfnmad.vsvvl" => "__builtin_ve_vl_pvfnmad_vsvvl",
-    "llvm.ve.vl.pvfnmad.vsvvvl" => "__builtin_ve_vl_pvfnmad_vsvvvl",
-    "llvm.ve.vl.pvfnmad.vvsvMvl" => "__builtin_ve_vl_pvfnmad_vvsvMvl",
-    "llvm.ve.vl.pvfnmad.vvsvl" => "__builtin_ve_vl_pvfnmad_vvsvl",
-    "llvm.ve.vl.pvfnmad.vvsvvl" => "__builtin_ve_vl_pvfnmad_vvsvvl",
-    "llvm.ve.vl.pvfnmad.vvvvMvl" => "__builtin_ve_vl_pvfnmad_vvvvMvl",
-    "llvm.ve.vl.pvfnmad.vvvvl" => "__builtin_ve_vl_pvfnmad_vvvvl",
-    "llvm.ve.vl.pvfnmad.vvvvvl" => "__builtin_ve_vl_pvfnmad_vvvvvl",
-    "llvm.ve.vl.pvfnmsb.vsvvMvl" => "__builtin_ve_vl_pvfnmsb_vsvvMvl",
-    "llvm.ve.vl.pvfnmsb.vsvvl" => "__builtin_ve_vl_pvfnmsb_vsvvl",
-    "llvm.ve.vl.pvfnmsb.vsvvvl" => "__builtin_ve_vl_pvfnmsb_vsvvvl",
-    "llvm.ve.vl.pvfnmsb.vvsvMvl" => "__builtin_ve_vl_pvfnmsb_vvsvMvl",
-    "llvm.ve.vl.pvfnmsb.vvsvl" => "__builtin_ve_vl_pvfnmsb_vvsvl",
-    "llvm.ve.vl.pvfnmsb.vvsvvl" => "__builtin_ve_vl_pvfnmsb_vvsvvl",
-    "llvm.ve.vl.pvfnmsb.vvvvMvl" => "__builtin_ve_vl_pvfnmsb_vvvvMvl",
-    "llvm.ve.vl.pvfnmsb.vvvvl" => "__builtin_ve_vl_pvfnmsb_vvvvl",
-    "llvm.ve.vl.pvfnmsb.vvvvvl" => "__builtin_ve_vl_pvfnmsb_vvvvvl",
-    "llvm.ve.vl.pvfsub.vsvMvl" => "__builtin_ve_vl_pvfsub_vsvMvl",
-    "llvm.ve.vl.pvfsub.vsvl" => "__builtin_ve_vl_pvfsub_vsvl",
-    "llvm.ve.vl.pvfsub.vsvvl" => "__builtin_ve_vl_pvfsub_vsvvl",
-    "llvm.ve.vl.pvfsub.vvvMvl" => "__builtin_ve_vl_pvfsub_vvvMvl",
-    "llvm.ve.vl.pvfsub.vvvl" => "__builtin_ve_vl_pvfsub_vvvl",
-    "llvm.ve.vl.pvfsub.vvvvl" => "__builtin_ve_vl_pvfsub_vvvvl",
-    "llvm.ve.vl.pvldz.vvMvl" => "__builtin_ve_vl_pvldz_vvMvl",
-    "llvm.ve.vl.pvldz.vvl" => "__builtin_ve_vl_pvldz_vvl",
-    "llvm.ve.vl.pvldz.vvvl" => "__builtin_ve_vl_pvldz_vvvl",
-    "llvm.ve.vl.pvldzlo.vvl" => "__builtin_ve_vl_pvldzlo_vvl",
-    "llvm.ve.vl.pvldzlo.vvmvl" => "__builtin_ve_vl_pvldzlo_vvmvl",
-    "llvm.ve.vl.pvldzlo.vvvl" => "__builtin_ve_vl_pvldzlo_vvvl",
-    "llvm.ve.vl.pvldzup.vvl" => "__builtin_ve_vl_pvldzup_vvl",
-    "llvm.ve.vl.pvldzup.vvmvl" => "__builtin_ve_vl_pvldzup_vvmvl",
-    "llvm.ve.vl.pvldzup.vvvl" => "__builtin_ve_vl_pvldzup_vvvl",
-    "llvm.ve.vl.pvmaxs.vsvMvl" => "__builtin_ve_vl_pvmaxs_vsvMvl",
-    "llvm.ve.vl.pvmaxs.vsvl" => "__builtin_ve_vl_pvmaxs_vsvl",
-    "llvm.ve.vl.pvmaxs.vsvvl" => "__builtin_ve_vl_pvmaxs_vsvvl",
-    "llvm.ve.vl.pvmaxs.vvvMvl" => "__builtin_ve_vl_pvmaxs_vvvMvl",
-    "llvm.ve.vl.pvmaxs.vvvl" => "__builtin_ve_vl_pvmaxs_vvvl",
-    "llvm.ve.vl.pvmaxs.vvvvl" => "__builtin_ve_vl_pvmaxs_vvvvl",
-    "llvm.ve.vl.pvmins.vsvMvl" => "__builtin_ve_vl_pvmins_vsvMvl",
-    "llvm.ve.vl.pvmins.vsvl" => "__builtin_ve_vl_pvmins_vsvl",
-    "llvm.ve.vl.pvmins.vsvvl" => "__builtin_ve_vl_pvmins_vsvvl",
-    "llvm.ve.vl.pvmins.vvvMvl" => "__builtin_ve_vl_pvmins_vvvMvl",
-    "llvm.ve.vl.pvmins.vvvl" => "__builtin_ve_vl_pvmins_vvvl",
-    "llvm.ve.vl.pvmins.vvvvl" => "__builtin_ve_vl_pvmins_vvvvl",
-    "llvm.ve.vl.pvor.vsvMvl" => "__builtin_ve_vl_pvor_vsvMvl",
-    "llvm.ve.vl.pvor.vsvl" => "__builtin_ve_vl_pvor_vsvl",
-    "llvm.ve.vl.pvor.vsvvl" => "__builtin_ve_vl_pvor_vsvvl",
-    "llvm.ve.vl.pvor.vvvMvl" => "__builtin_ve_vl_pvor_vvvMvl",
-    "llvm.ve.vl.pvor.vvvl" => "__builtin_ve_vl_pvor_vvvl",
-    "llvm.ve.vl.pvor.vvvvl" => "__builtin_ve_vl_pvor_vvvvl",
-    "llvm.ve.vl.pvpcnt.vvMvl" => "__builtin_ve_vl_pvpcnt_vvMvl",
-    "llvm.ve.vl.pvpcnt.vvl" => "__builtin_ve_vl_pvpcnt_vvl",
-    "llvm.ve.vl.pvpcnt.vvvl" => "__builtin_ve_vl_pvpcnt_vvvl",
-    "llvm.ve.vl.pvpcntlo.vvl" => "__builtin_ve_vl_pvpcntlo_vvl",
-    "llvm.ve.vl.pvpcntlo.vvmvl" => "__builtin_ve_vl_pvpcntlo_vvmvl",
-    "llvm.ve.vl.pvpcntlo.vvvl" => "__builtin_ve_vl_pvpcntlo_vvvl",
-    "llvm.ve.vl.pvpcntup.vvl" => "__builtin_ve_vl_pvpcntup_vvl",
-    "llvm.ve.vl.pvpcntup.vvmvl" => "__builtin_ve_vl_pvpcntup_vvmvl",
-    "llvm.ve.vl.pvpcntup.vvvl" => "__builtin_ve_vl_pvpcntup_vvvl",
-    "llvm.ve.vl.pvrcp.vvl" => "__builtin_ve_vl_pvrcp_vvl",
-    "llvm.ve.vl.pvrcp.vvvl" => "__builtin_ve_vl_pvrcp_vvvl",
-    "llvm.ve.vl.pvrsqrt.vvl" => "__builtin_ve_vl_pvrsqrt_vvl",
-    "llvm.ve.vl.pvrsqrt.vvvl" => "__builtin_ve_vl_pvrsqrt_vvvl",
-    "llvm.ve.vl.pvrsqrtnex.vvl" => "__builtin_ve_vl_pvrsqrtnex_vvl",
-    "llvm.ve.vl.pvrsqrtnex.vvvl" => "__builtin_ve_vl_pvrsqrtnex_vvvl",
-    "llvm.ve.vl.pvseq.vl" => "__builtin_ve_vl_pvseq_vl",
-    "llvm.ve.vl.pvseq.vvl" => "__builtin_ve_vl_pvseq_vvl",
-    "llvm.ve.vl.pvseqlo.vl" => "__builtin_ve_vl_pvseqlo_vl",
-    "llvm.ve.vl.pvseqlo.vvl" => "__builtin_ve_vl_pvseqlo_vvl",
-    "llvm.ve.vl.pvsequp.vl" => "__builtin_ve_vl_pvsequp_vl",
-    "llvm.ve.vl.pvsequp.vvl" => "__builtin_ve_vl_pvsequp_vvl",
-    "llvm.ve.vl.pvsla.vvsMvl" => "__builtin_ve_vl_pvsla_vvsMvl",
-    "llvm.ve.vl.pvsla.vvsl" => "__builtin_ve_vl_pvsla_vvsl",
-    "llvm.ve.vl.pvsla.vvsvl" => "__builtin_ve_vl_pvsla_vvsvl",
-    "llvm.ve.vl.pvsla.vvvMvl" => "__builtin_ve_vl_pvsla_vvvMvl",
-    "llvm.ve.vl.pvsla.vvvl" => "__builtin_ve_vl_pvsla_vvvl",
-    "llvm.ve.vl.pvsla.vvvvl" => "__builtin_ve_vl_pvsla_vvvvl",
-    "llvm.ve.vl.pvsll.vvsMvl" => "__builtin_ve_vl_pvsll_vvsMvl",
-    "llvm.ve.vl.pvsll.vvsl" => "__builtin_ve_vl_pvsll_vvsl",
-    "llvm.ve.vl.pvsll.vvsvl" => "__builtin_ve_vl_pvsll_vvsvl",
-    "llvm.ve.vl.pvsll.vvvMvl" => "__builtin_ve_vl_pvsll_vvvMvl",
-    "llvm.ve.vl.pvsll.vvvl" => "__builtin_ve_vl_pvsll_vvvl",
-    "llvm.ve.vl.pvsll.vvvvl" => "__builtin_ve_vl_pvsll_vvvvl",
-    "llvm.ve.vl.pvsra.vvsMvl" => "__builtin_ve_vl_pvsra_vvsMvl",
-    "llvm.ve.vl.pvsra.vvsl" => "__builtin_ve_vl_pvsra_vvsl",
-    "llvm.ve.vl.pvsra.vvsvl" => "__builtin_ve_vl_pvsra_vvsvl",
-    "llvm.ve.vl.pvsra.vvvMvl" => "__builtin_ve_vl_pvsra_vvvMvl",
-    "llvm.ve.vl.pvsra.vvvl" => "__builtin_ve_vl_pvsra_vvvl",
-    "llvm.ve.vl.pvsra.vvvvl" => "__builtin_ve_vl_pvsra_vvvvl",
-    "llvm.ve.vl.pvsrl.vvsMvl" => "__builtin_ve_vl_pvsrl_vvsMvl",
-    "llvm.ve.vl.pvsrl.vvsl" => "__builtin_ve_vl_pvsrl_vvsl",
-    "llvm.ve.vl.pvsrl.vvsvl" => "__builtin_ve_vl_pvsrl_vvsvl",
-    "llvm.ve.vl.pvsrl.vvvMvl" => "__builtin_ve_vl_pvsrl_vvvMvl",
-    "llvm.ve.vl.pvsrl.vvvl" => "__builtin_ve_vl_pvsrl_vvvl",
-    "llvm.ve.vl.pvsrl.vvvvl" => "__builtin_ve_vl_pvsrl_vvvvl",
-    "llvm.ve.vl.pvsubs.vsvMvl" => "__builtin_ve_vl_pvsubs_vsvMvl",
-    "llvm.ve.vl.pvsubs.vsvl" => "__builtin_ve_vl_pvsubs_vsvl",
-    "llvm.ve.vl.pvsubs.vsvvl" => "__builtin_ve_vl_pvsubs_vsvvl",
-    "llvm.ve.vl.pvsubs.vvvMvl" => "__builtin_ve_vl_pvsubs_vvvMvl",
-    "llvm.ve.vl.pvsubs.vvvl" => "__builtin_ve_vl_pvsubs_vvvl",
-    "llvm.ve.vl.pvsubs.vvvvl" => "__builtin_ve_vl_pvsubs_vvvvl",
-    "llvm.ve.vl.pvsubu.vsvMvl" => "__builtin_ve_vl_pvsubu_vsvMvl",
-    "llvm.ve.vl.pvsubu.vsvl" => "__builtin_ve_vl_pvsubu_vsvl",
-    "llvm.ve.vl.pvsubu.vsvvl" => "__builtin_ve_vl_pvsubu_vsvvl",
-    "llvm.ve.vl.pvsubu.vvvMvl" => "__builtin_ve_vl_pvsubu_vvvMvl",
-    "llvm.ve.vl.pvsubu.vvvl" => "__builtin_ve_vl_pvsubu_vvvl",
-    "llvm.ve.vl.pvsubu.vvvvl" => "__builtin_ve_vl_pvsubu_vvvvl",
-    "llvm.ve.vl.pvxor.vsvMvl" => "__builtin_ve_vl_pvxor_vsvMvl",
-    "llvm.ve.vl.pvxor.vsvl" => "__builtin_ve_vl_pvxor_vsvl",
-    "llvm.ve.vl.pvxor.vsvvl" => "__builtin_ve_vl_pvxor_vsvvl",
-    "llvm.ve.vl.pvxor.vvvMvl" => "__builtin_ve_vl_pvxor_vvvMvl",
-    "llvm.ve.vl.pvxor.vvvl" => "__builtin_ve_vl_pvxor_vvvl",
-    "llvm.ve.vl.pvxor.vvvvl" => "__builtin_ve_vl_pvxor_vvvvl",
-    "llvm.ve.vl.scr.sss" => "__builtin_ve_vl_scr_sss",
-    "llvm.ve.vl.svm.sMs" => "__builtin_ve_vl_svm_sMs",
-    "llvm.ve.vl.svm.sms" => "__builtin_ve_vl_svm_sms",
-    "llvm.ve.vl.svob" => "__builtin_ve_vl_svob",
-    "llvm.ve.vl.tovm.sml" => "__builtin_ve_vl_tovm_sml",
-    "llvm.ve.vl.tscr.ssss" => "__builtin_ve_vl_tscr_ssss",
-    "llvm.ve.vl.vaddsl.vsvl" => "__builtin_ve_vl_vaddsl_vsvl",
-    "llvm.ve.vl.vaddsl.vsvmvl" => "__builtin_ve_vl_vaddsl_vsvmvl",
-    "llvm.ve.vl.vaddsl.vsvvl" => "__builtin_ve_vl_vaddsl_vsvvl",
-    "llvm.ve.vl.vaddsl.vvvl" => "__builtin_ve_vl_vaddsl_vvvl",
-    "llvm.ve.vl.vaddsl.vvvmvl" => "__builtin_ve_vl_vaddsl_vvvmvl",
-    "llvm.ve.vl.vaddsl.vvvvl" => "__builtin_ve_vl_vaddsl_vvvvl",
-    "llvm.ve.vl.vaddswsx.vsvl" => "__builtin_ve_vl_vaddswsx_vsvl",
-    "llvm.ve.vl.vaddswsx.vsvmvl" => "__builtin_ve_vl_vaddswsx_vsvmvl",
-    "llvm.ve.vl.vaddswsx.vsvvl" => "__builtin_ve_vl_vaddswsx_vsvvl",
-    "llvm.ve.vl.vaddswsx.vvvl" => "__builtin_ve_vl_vaddswsx_vvvl",
-    "llvm.ve.vl.vaddswsx.vvvmvl" => "__builtin_ve_vl_vaddswsx_vvvmvl",
-    "llvm.ve.vl.vaddswsx.vvvvl" => "__builtin_ve_vl_vaddswsx_vvvvl",
-    "llvm.ve.vl.vaddswzx.vsvl" => "__builtin_ve_vl_vaddswzx_vsvl",
-    "llvm.ve.vl.vaddswzx.vsvmvl" => "__builtin_ve_vl_vaddswzx_vsvmvl",
-    "llvm.ve.vl.vaddswzx.vsvvl" => "__builtin_ve_vl_vaddswzx_vsvvl",
-    "llvm.ve.vl.vaddswzx.vvvl" => "__builtin_ve_vl_vaddswzx_vvvl",
-    "llvm.ve.vl.vaddswzx.vvvmvl" => "__builtin_ve_vl_vaddswzx_vvvmvl",
-    "llvm.ve.vl.vaddswzx.vvvvl" => "__builtin_ve_vl_vaddswzx_vvvvl",
-    "llvm.ve.vl.vaddul.vsvl" => "__builtin_ve_vl_vaddul_vsvl",
-    "llvm.ve.vl.vaddul.vsvmvl" => "__builtin_ve_vl_vaddul_vsvmvl",
-    "llvm.ve.vl.vaddul.vsvvl" => "__builtin_ve_vl_vaddul_vsvvl",
-    "llvm.ve.vl.vaddul.vvvl" => "__builtin_ve_vl_vaddul_vvvl",
-    "llvm.ve.vl.vaddul.vvvmvl" => "__builtin_ve_vl_vaddul_vvvmvl",
-    "llvm.ve.vl.vaddul.vvvvl" => "__builtin_ve_vl_vaddul_vvvvl",
-    "llvm.ve.vl.vadduw.vsvl" => "__builtin_ve_vl_vadduw_vsvl",
-    "llvm.ve.vl.vadduw.vsvmvl" => "__builtin_ve_vl_vadduw_vsvmvl",
-    "llvm.ve.vl.vadduw.vsvvl" => "__builtin_ve_vl_vadduw_vsvvl",
-    "llvm.ve.vl.vadduw.vvvl" => "__builtin_ve_vl_vadduw_vvvl",
-    "llvm.ve.vl.vadduw.vvvmvl" => "__builtin_ve_vl_vadduw_vvvmvl",
-    "llvm.ve.vl.vadduw.vvvvl" => "__builtin_ve_vl_vadduw_vvvvl",
-    "llvm.ve.vl.vand.vsvl" => "__builtin_ve_vl_vand_vsvl",
-    "llvm.ve.vl.vand.vsvmvl" => "__builtin_ve_vl_vand_vsvmvl",
-    "llvm.ve.vl.vand.vsvvl" => "__builtin_ve_vl_vand_vsvvl",
-    "llvm.ve.vl.vand.vvvl" => "__builtin_ve_vl_vand_vvvl",
-    "llvm.ve.vl.vand.vvvmvl" => "__builtin_ve_vl_vand_vvvmvl",
-    "llvm.ve.vl.vand.vvvvl" => "__builtin_ve_vl_vand_vvvvl",
-    "llvm.ve.vl.vbrdd.vsl" => "__builtin_ve_vl_vbrdd_vsl",
-    "llvm.ve.vl.vbrdd.vsmvl" => "__builtin_ve_vl_vbrdd_vsmvl",
-    "llvm.ve.vl.vbrdd.vsvl" => "__builtin_ve_vl_vbrdd_vsvl",
-    "llvm.ve.vl.vbrdl.vsl" => "__builtin_ve_vl_vbrdl_vsl",
-    "llvm.ve.vl.vbrdl.vsmvl" => "__builtin_ve_vl_vbrdl_vsmvl",
-    "llvm.ve.vl.vbrdl.vsvl" => "__builtin_ve_vl_vbrdl_vsvl",
-    "llvm.ve.vl.vbrds.vsl" => "__builtin_ve_vl_vbrds_vsl",
-    "llvm.ve.vl.vbrds.vsmvl" => "__builtin_ve_vl_vbrds_vsmvl",
-    "llvm.ve.vl.vbrds.vsvl" => "__builtin_ve_vl_vbrds_vsvl",
-    "llvm.ve.vl.vbrdw.vsl" => "__builtin_ve_vl_vbrdw_vsl",
-    "llvm.ve.vl.vbrdw.vsmvl" => "__builtin_ve_vl_vbrdw_vsmvl",
-    "llvm.ve.vl.vbrdw.vsvl" => "__builtin_ve_vl_vbrdw_vsvl",
-    "llvm.ve.vl.vbrv.vvl" => "__builtin_ve_vl_vbrv_vvl",
-    "llvm.ve.vl.vbrv.vvmvl" => "__builtin_ve_vl_vbrv_vvmvl",
-    "llvm.ve.vl.vbrv.vvvl" => "__builtin_ve_vl_vbrv_vvvl",
-    "llvm.ve.vl.vcmpsl.vsvl" => "__builtin_ve_vl_vcmpsl_vsvl",
-    "llvm.ve.vl.vcmpsl.vsvmvl" => "__builtin_ve_vl_vcmpsl_vsvmvl",
-    "llvm.ve.vl.vcmpsl.vsvvl" => "__builtin_ve_vl_vcmpsl_vsvvl",
-    "llvm.ve.vl.vcmpsl.vvvl" => "__builtin_ve_vl_vcmpsl_vvvl",
-    "llvm.ve.vl.vcmpsl.vvvmvl" => "__builtin_ve_vl_vcmpsl_vvvmvl",
-    "llvm.ve.vl.vcmpsl.vvvvl" => "__builtin_ve_vl_vcmpsl_vvvvl",
-    "llvm.ve.vl.vcmpswsx.vsvl" => "__builtin_ve_vl_vcmpswsx_vsvl",
-    "llvm.ve.vl.vcmpswsx.vsvmvl" => "__builtin_ve_vl_vcmpswsx_vsvmvl",
-    "llvm.ve.vl.vcmpswsx.vsvvl" => "__builtin_ve_vl_vcmpswsx_vsvvl",
-    "llvm.ve.vl.vcmpswsx.vvvl" => "__builtin_ve_vl_vcmpswsx_vvvl",
-    "llvm.ve.vl.vcmpswsx.vvvmvl" => "__builtin_ve_vl_vcmpswsx_vvvmvl",
-    "llvm.ve.vl.vcmpswsx.vvvvl" => "__builtin_ve_vl_vcmpswsx_vvvvl",
-    "llvm.ve.vl.vcmpswzx.vsvl" => "__builtin_ve_vl_vcmpswzx_vsvl",
-    "llvm.ve.vl.vcmpswzx.vsvmvl" => "__builtin_ve_vl_vcmpswzx_vsvmvl",
-    "llvm.ve.vl.vcmpswzx.vsvvl" => "__builtin_ve_vl_vcmpswzx_vsvvl",
-    "llvm.ve.vl.vcmpswzx.vvvl" => "__builtin_ve_vl_vcmpswzx_vvvl",
-    "llvm.ve.vl.vcmpswzx.vvvmvl" => "__builtin_ve_vl_vcmpswzx_vvvmvl",
-    "llvm.ve.vl.vcmpswzx.vvvvl" => "__builtin_ve_vl_vcmpswzx_vvvvl",
-    "llvm.ve.vl.vcmpul.vsvl" => "__builtin_ve_vl_vcmpul_vsvl",
-    "llvm.ve.vl.vcmpul.vsvmvl" => "__builtin_ve_vl_vcmpul_vsvmvl",
-    "llvm.ve.vl.vcmpul.vsvvl" => "__builtin_ve_vl_vcmpul_vsvvl",
-    "llvm.ve.vl.vcmpul.vvvl" => "__builtin_ve_vl_vcmpul_vvvl",
-    "llvm.ve.vl.vcmpul.vvvmvl" => "__builtin_ve_vl_vcmpul_vvvmvl",
-    "llvm.ve.vl.vcmpul.vvvvl" => "__builtin_ve_vl_vcmpul_vvvvl",
-    "llvm.ve.vl.vcmpuw.vsvl" => "__builtin_ve_vl_vcmpuw_vsvl",
-    "llvm.ve.vl.vcmpuw.vsvmvl" => "__builtin_ve_vl_vcmpuw_vsvmvl",
-    "llvm.ve.vl.vcmpuw.vsvvl" => "__builtin_ve_vl_vcmpuw_vsvvl",
-    "llvm.ve.vl.vcmpuw.vvvl" => "__builtin_ve_vl_vcmpuw_vvvl",
-    "llvm.ve.vl.vcmpuw.vvvmvl" => "__builtin_ve_vl_vcmpuw_vvvmvl",
-    "llvm.ve.vl.vcmpuw.vvvvl" => "__builtin_ve_vl_vcmpuw_vvvvl",
-    "llvm.ve.vl.vcp.vvmvl" => "__builtin_ve_vl_vcp_vvmvl",
-    "llvm.ve.vl.vcvtdl.vvl" => "__builtin_ve_vl_vcvtdl_vvl",
-    "llvm.ve.vl.vcvtdl.vvvl" => "__builtin_ve_vl_vcvtdl_vvvl",
-    "llvm.ve.vl.vcvtds.vvl" => "__builtin_ve_vl_vcvtds_vvl",
-    "llvm.ve.vl.vcvtds.vvvl" => "__builtin_ve_vl_vcvtds_vvvl",
-    "llvm.ve.vl.vcvtdw.vvl" => "__builtin_ve_vl_vcvtdw_vvl",
-    "llvm.ve.vl.vcvtdw.vvvl" => "__builtin_ve_vl_vcvtdw_vvvl",
-    "llvm.ve.vl.vcvtld.vvl" => "__builtin_ve_vl_vcvtld_vvl",
-    "llvm.ve.vl.vcvtld.vvmvl" => "__builtin_ve_vl_vcvtld_vvmvl",
-    "llvm.ve.vl.vcvtld.vvvl" => "__builtin_ve_vl_vcvtld_vvvl",
-    "llvm.ve.vl.vcvtldrz.vvl" => "__builtin_ve_vl_vcvtldrz_vvl",
-    "llvm.ve.vl.vcvtldrz.vvmvl" => "__builtin_ve_vl_vcvtldrz_vvmvl",
-    "llvm.ve.vl.vcvtldrz.vvvl" => "__builtin_ve_vl_vcvtldrz_vvvl",
-    "llvm.ve.vl.vcvtsd.vvl" => "__builtin_ve_vl_vcvtsd_vvl",
-    "llvm.ve.vl.vcvtsd.vvvl" => "__builtin_ve_vl_vcvtsd_vvvl",
-    "llvm.ve.vl.vcvtsw.vvl" => "__builtin_ve_vl_vcvtsw_vvl",
-    "llvm.ve.vl.vcvtsw.vvvl" => "__builtin_ve_vl_vcvtsw_vvvl",
-    "llvm.ve.vl.vcvtwdsx.vvl" => "__builtin_ve_vl_vcvtwdsx_vvl",
-    "llvm.ve.vl.vcvtwdsx.vvmvl" => "__builtin_ve_vl_vcvtwdsx_vvmvl",
-    "llvm.ve.vl.vcvtwdsx.vvvl" => "__builtin_ve_vl_vcvtwdsx_vvvl",
-    "llvm.ve.vl.vcvtwdsxrz.vvl" => "__builtin_ve_vl_vcvtwdsxrz_vvl",
-    "llvm.ve.vl.vcvtwdsxrz.vvmvl" => "__builtin_ve_vl_vcvtwdsxrz_vvmvl",
-    "llvm.ve.vl.vcvtwdsxrz.vvvl" => "__builtin_ve_vl_vcvtwdsxrz_vvvl",
-    "llvm.ve.vl.vcvtwdzx.vvl" => "__builtin_ve_vl_vcvtwdzx_vvl",
-    "llvm.ve.vl.vcvtwdzx.vvmvl" => "__builtin_ve_vl_vcvtwdzx_vvmvl",
-    "llvm.ve.vl.vcvtwdzx.vvvl" => "__builtin_ve_vl_vcvtwdzx_vvvl",
-    "llvm.ve.vl.vcvtwdzxrz.vvl" => "__builtin_ve_vl_vcvtwdzxrz_vvl",
-    "llvm.ve.vl.vcvtwdzxrz.vvmvl" => "__builtin_ve_vl_vcvtwdzxrz_vvmvl",
-    "llvm.ve.vl.vcvtwdzxrz.vvvl" => "__builtin_ve_vl_vcvtwdzxrz_vvvl",
-    "llvm.ve.vl.vcvtwssx.vvl" => "__builtin_ve_vl_vcvtwssx_vvl",
-    "llvm.ve.vl.vcvtwssx.vvmvl" => "__builtin_ve_vl_vcvtwssx_vvmvl",
-    "llvm.ve.vl.vcvtwssx.vvvl" => "__builtin_ve_vl_vcvtwssx_vvvl",
-    "llvm.ve.vl.vcvtwssxrz.vvl" => "__builtin_ve_vl_vcvtwssxrz_vvl",
-    "llvm.ve.vl.vcvtwssxrz.vvmvl" => "__builtin_ve_vl_vcvtwssxrz_vvmvl",
-    "llvm.ve.vl.vcvtwssxrz.vvvl" => "__builtin_ve_vl_vcvtwssxrz_vvvl",
-    "llvm.ve.vl.vcvtwszx.vvl" => "__builtin_ve_vl_vcvtwszx_vvl",
-    "llvm.ve.vl.vcvtwszx.vvmvl" => "__builtin_ve_vl_vcvtwszx_vvmvl",
-    "llvm.ve.vl.vcvtwszx.vvvl" => "__builtin_ve_vl_vcvtwszx_vvvl",
-    "llvm.ve.vl.vcvtwszxrz.vvl" => "__builtin_ve_vl_vcvtwszxrz_vvl",
-    "llvm.ve.vl.vcvtwszxrz.vvmvl" => "__builtin_ve_vl_vcvtwszxrz_vvmvl",
-    "llvm.ve.vl.vcvtwszxrz.vvvl" => "__builtin_ve_vl_vcvtwszxrz_vvvl",
-    "llvm.ve.vl.vdivsl.vsvl" => "__builtin_ve_vl_vdivsl_vsvl",
-    "llvm.ve.vl.vdivsl.vsvmvl" => "__builtin_ve_vl_vdivsl_vsvmvl",
-    "llvm.ve.vl.vdivsl.vsvvl" => "__builtin_ve_vl_vdivsl_vsvvl",
-    "llvm.ve.vl.vdivsl.vvsl" => "__builtin_ve_vl_vdivsl_vvsl",
-    "llvm.ve.vl.vdivsl.vvsmvl" => "__builtin_ve_vl_vdivsl_vvsmvl",
-    "llvm.ve.vl.vdivsl.vvsvl" => "__builtin_ve_vl_vdivsl_vvsvl",
-    "llvm.ve.vl.vdivsl.vvvl" => "__builtin_ve_vl_vdivsl_vvvl",
-    "llvm.ve.vl.vdivsl.vvvmvl" => "__builtin_ve_vl_vdivsl_vvvmvl",
-    "llvm.ve.vl.vdivsl.vvvvl" => "__builtin_ve_vl_vdivsl_vvvvl",
-    "llvm.ve.vl.vdivswsx.vsvl" => "__builtin_ve_vl_vdivswsx_vsvl",
-    "llvm.ve.vl.vdivswsx.vsvmvl" => "__builtin_ve_vl_vdivswsx_vsvmvl",
-    "llvm.ve.vl.vdivswsx.vsvvl" => "__builtin_ve_vl_vdivswsx_vsvvl",
-    "llvm.ve.vl.vdivswsx.vvsl" => "__builtin_ve_vl_vdivswsx_vvsl",
-    "llvm.ve.vl.vdivswsx.vvsmvl" => "__builtin_ve_vl_vdivswsx_vvsmvl",
-    "llvm.ve.vl.vdivswsx.vvsvl" => "__builtin_ve_vl_vdivswsx_vvsvl",
-    "llvm.ve.vl.vdivswsx.vvvl" => "__builtin_ve_vl_vdivswsx_vvvl",
-    "llvm.ve.vl.vdivswsx.vvvmvl" => "__builtin_ve_vl_vdivswsx_vvvmvl",
-    "llvm.ve.vl.vdivswsx.vvvvl" => "__builtin_ve_vl_vdivswsx_vvvvl",
-    "llvm.ve.vl.vdivswzx.vsvl" => "__builtin_ve_vl_vdivswzx_vsvl",
-    "llvm.ve.vl.vdivswzx.vsvmvl" => "__builtin_ve_vl_vdivswzx_vsvmvl",
-    "llvm.ve.vl.vdivswzx.vsvvl" => "__builtin_ve_vl_vdivswzx_vsvvl",
-    "llvm.ve.vl.vdivswzx.vvsl" => "__builtin_ve_vl_vdivswzx_vvsl",
-    "llvm.ve.vl.vdivswzx.vvsmvl" => "__builtin_ve_vl_vdivswzx_vvsmvl",
-    "llvm.ve.vl.vdivswzx.vvsvl" => "__builtin_ve_vl_vdivswzx_vvsvl",
-    "llvm.ve.vl.vdivswzx.vvvl" => "__builtin_ve_vl_vdivswzx_vvvl",
-    "llvm.ve.vl.vdivswzx.vvvmvl" => "__builtin_ve_vl_vdivswzx_vvvmvl",
-    "llvm.ve.vl.vdivswzx.vvvvl" => "__builtin_ve_vl_vdivswzx_vvvvl",
-    "llvm.ve.vl.vdivul.vsvl" => "__builtin_ve_vl_vdivul_vsvl",
-    "llvm.ve.vl.vdivul.vsvmvl" => "__builtin_ve_vl_vdivul_vsvmvl",
-    "llvm.ve.vl.vdivul.vsvvl" => "__builtin_ve_vl_vdivul_vsvvl",
-    "llvm.ve.vl.vdivul.vvsl" => "__builtin_ve_vl_vdivul_vvsl",
-    "llvm.ve.vl.vdivul.vvsmvl" => "__builtin_ve_vl_vdivul_vvsmvl",
-    "llvm.ve.vl.vdivul.vvsvl" => "__builtin_ve_vl_vdivul_vvsvl",
-    "llvm.ve.vl.vdivul.vvvl" => "__builtin_ve_vl_vdivul_vvvl",
-    "llvm.ve.vl.vdivul.vvvmvl" => "__builtin_ve_vl_vdivul_vvvmvl",
-    "llvm.ve.vl.vdivul.vvvvl" => "__builtin_ve_vl_vdivul_vvvvl",
-    "llvm.ve.vl.vdivuw.vsvl" => "__builtin_ve_vl_vdivuw_vsvl",
-    "llvm.ve.vl.vdivuw.vsvmvl" => "__builtin_ve_vl_vdivuw_vsvmvl",
-    "llvm.ve.vl.vdivuw.vsvvl" => "__builtin_ve_vl_vdivuw_vsvvl",
-    "llvm.ve.vl.vdivuw.vvsl" => "__builtin_ve_vl_vdivuw_vvsl",
-    "llvm.ve.vl.vdivuw.vvsmvl" => "__builtin_ve_vl_vdivuw_vvsmvl",
-    "llvm.ve.vl.vdivuw.vvsvl" => "__builtin_ve_vl_vdivuw_vvsvl",
-    "llvm.ve.vl.vdivuw.vvvl" => "__builtin_ve_vl_vdivuw_vvvl",
-    "llvm.ve.vl.vdivuw.vvvmvl" => "__builtin_ve_vl_vdivuw_vvvmvl",
-    "llvm.ve.vl.vdivuw.vvvvl" => "__builtin_ve_vl_vdivuw_vvvvl",
-    "llvm.ve.vl.veqv.vsvl" => "__builtin_ve_vl_veqv_vsvl",
-    "llvm.ve.vl.veqv.vsvmvl" => "__builtin_ve_vl_veqv_vsvmvl",
-    "llvm.ve.vl.veqv.vsvvl" => "__builtin_ve_vl_veqv_vsvvl",
-    "llvm.ve.vl.veqv.vvvl" => "__builtin_ve_vl_veqv_vvvl",
-    "llvm.ve.vl.veqv.vvvmvl" => "__builtin_ve_vl_veqv_vvvmvl",
-    "llvm.ve.vl.veqv.vvvvl" => "__builtin_ve_vl_veqv_vvvvl",
-    "llvm.ve.vl.vex.vvmvl" => "__builtin_ve_vl_vex_vvmvl",
-    "llvm.ve.vl.vfaddd.vsvl" => "__builtin_ve_vl_vfaddd_vsvl",
-    "llvm.ve.vl.vfaddd.vsvmvl" => "__builtin_ve_vl_vfaddd_vsvmvl",
-    "llvm.ve.vl.vfaddd.vsvvl" => "__builtin_ve_vl_vfaddd_vsvvl",
-    "llvm.ve.vl.vfaddd.vvvl" => "__builtin_ve_vl_vfaddd_vvvl",
-    "llvm.ve.vl.vfaddd.vvvmvl" => "__builtin_ve_vl_vfaddd_vvvmvl",
-    "llvm.ve.vl.vfaddd.vvvvl" => "__builtin_ve_vl_vfaddd_vvvvl",
-    "llvm.ve.vl.vfadds.vsvl" => "__builtin_ve_vl_vfadds_vsvl",
-    "llvm.ve.vl.vfadds.vsvmvl" => "__builtin_ve_vl_vfadds_vsvmvl",
-    "llvm.ve.vl.vfadds.vsvvl" => "__builtin_ve_vl_vfadds_vsvvl",
-    "llvm.ve.vl.vfadds.vvvl" => "__builtin_ve_vl_vfadds_vvvl",
-    "llvm.ve.vl.vfadds.vvvmvl" => "__builtin_ve_vl_vfadds_vvvmvl",
-    "llvm.ve.vl.vfadds.vvvvl" => "__builtin_ve_vl_vfadds_vvvvl",
-    "llvm.ve.vl.vfcmpd.vsvl" => "__builtin_ve_vl_vfcmpd_vsvl",
-    "llvm.ve.vl.vfcmpd.vsvmvl" => "__builtin_ve_vl_vfcmpd_vsvmvl",
-    "llvm.ve.vl.vfcmpd.vsvvl" => "__builtin_ve_vl_vfcmpd_vsvvl",
-    "llvm.ve.vl.vfcmpd.vvvl" => "__builtin_ve_vl_vfcmpd_vvvl",
-    "llvm.ve.vl.vfcmpd.vvvmvl" => "__builtin_ve_vl_vfcmpd_vvvmvl",
-    "llvm.ve.vl.vfcmpd.vvvvl" => "__builtin_ve_vl_vfcmpd_vvvvl",
-    "llvm.ve.vl.vfcmps.vsvl" => "__builtin_ve_vl_vfcmps_vsvl",
-    "llvm.ve.vl.vfcmps.vsvmvl" => "__builtin_ve_vl_vfcmps_vsvmvl",
-    "llvm.ve.vl.vfcmps.vsvvl" => "__builtin_ve_vl_vfcmps_vsvvl",
-    "llvm.ve.vl.vfcmps.vvvl" => "__builtin_ve_vl_vfcmps_vvvl",
-    "llvm.ve.vl.vfcmps.vvvmvl" => "__builtin_ve_vl_vfcmps_vvvmvl",
-    "llvm.ve.vl.vfcmps.vvvvl" => "__builtin_ve_vl_vfcmps_vvvvl",
-    "llvm.ve.vl.vfdivd.vsvl" => "__builtin_ve_vl_vfdivd_vsvl",
-    "llvm.ve.vl.vfdivd.vsvmvl" => "__builtin_ve_vl_vfdivd_vsvmvl",
-    "llvm.ve.vl.vfdivd.vsvvl" => "__builtin_ve_vl_vfdivd_vsvvl",
-    "llvm.ve.vl.vfdivd.vvvl" => "__builtin_ve_vl_vfdivd_vvvl",
-    "llvm.ve.vl.vfdivd.vvvmvl" => "__builtin_ve_vl_vfdivd_vvvmvl",
-    "llvm.ve.vl.vfdivd.vvvvl" => "__builtin_ve_vl_vfdivd_vvvvl",
-    "llvm.ve.vl.vfdivs.vsvl" => "__builtin_ve_vl_vfdivs_vsvl",
-    "llvm.ve.vl.vfdivs.vsvmvl" => "__builtin_ve_vl_vfdivs_vsvmvl",
-    "llvm.ve.vl.vfdivs.vsvvl" => "__builtin_ve_vl_vfdivs_vsvvl",
-    "llvm.ve.vl.vfdivs.vvvl" => "__builtin_ve_vl_vfdivs_vvvl",
-    "llvm.ve.vl.vfdivs.vvvmvl" => "__builtin_ve_vl_vfdivs_vvvmvl",
-    "llvm.ve.vl.vfdivs.vvvvl" => "__builtin_ve_vl_vfdivs_vvvvl",
-    "llvm.ve.vl.vfmadd.vsvvl" => "__builtin_ve_vl_vfmadd_vsvvl",
-    "llvm.ve.vl.vfmadd.vsvvmvl" => "__builtin_ve_vl_vfmadd_vsvvmvl",
-    "llvm.ve.vl.vfmadd.vsvvvl" => "__builtin_ve_vl_vfmadd_vsvvvl",
-    "llvm.ve.vl.vfmadd.vvsvl" => "__builtin_ve_vl_vfmadd_vvsvl",
-    "llvm.ve.vl.vfmadd.vvsvmvl" => "__builtin_ve_vl_vfmadd_vvsvmvl",
-    "llvm.ve.vl.vfmadd.vvsvvl" => "__builtin_ve_vl_vfmadd_vvsvvl",
-    "llvm.ve.vl.vfmadd.vvvvl" => "__builtin_ve_vl_vfmadd_vvvvl",
-    "llvm.ve.vl.vfmadd.vvvvmvl" => "__builtin_ve_vl_vfmadd_vvvvmvl",
-    "llvm.ve.vl.vfmadd.vvvvvl" => "__builtin_ve_vl_vfmadd_vvvvvl",
-    "llvm.ve.vl.vfmads.vsvvl" => "__builtin_ve_vl_vfmads_vsvvl",
-    "llvm.ve.vl.vfmads.vsvvmvl" => "__builtin_ve_vl_vfmads_vsvvmvl",
-    "llvm.ve.vl.vfmads.vsvvvl" => "__builtin_ve_vl_vfmads_vsvvvl",
-    "llvm.ve.vl.vfmads.vvsvl" => "__builtin_ve_vl_vfmads_vvsvl",
-    "llvm.ve.vl.vfmads.vvsvmvl" => "__builtin_ve_vl_vfmads_vvsvmvl",
-    "llvm.ve.vl.vfmads.vvsvvl" => "__builtin_ve_vl_vfmads_vvsvvl",
-    "llvm.ve.vl.vfmads.vvvvl" => "__builtin_ve_vl_vfmads_vvvvl",
-    "llvm.ve.vl.vfmads.vvvvmvl" => "__builtin_ve_vl_vfmads_vvvvmvl",
-    "llvm.ve.vl.vfmads.vvvvvl" => "__builtin_ve_vl_vfmads_vvvvvl",
-    "llvm.ve.vl.vfmaxd.vsvl" => "__builtin_ve_vl_vfmaxd_vsvl",
-    "llvm.ve.vl.vfmaxd.vsvmvl" => "__builtin_ve_vl_vfmaxd_vsvmvl",
-    "llvm.ve.vl.vfmaxd.vsvvl" => "__builtin_ve_vl_vfmaxd_vsvvl",
-    "llvm.ve.vl.vfmaxd.vvvl" => "__builtin_ve_vl_vfmaxd_vvvl",
-    "llvm.ve.vl.vfmaxd.vvvmvl" => "__builtin_ve_vl_vfmaxd_vvvmvl",
-    "llvm.ve.vl.vfmaxd.vvvvl" => "__builtin_ve_vl_vfmaxd_vvvvl",
-    "llvm.ve.vl.vfmaxs.vsvl" => "__builtin_ve_vl_vfmaxs_vsvl",
-    "llvm.ve.vl.vfmaxs.vsvmvl" => "__builtin_ve_vl_vfmaxs_vsvmvl",
-    "llvm.ve.vl.vfmaxs.vsvvl" => "__builtin_ve_vl_vfmaxs_vsvvl",
-    "llvm.ve.vl.vfmaxs.vvvl" => "__builtin_ve_vl_vfmaxs_vvvl",
-    "llvm.ve.vl.vfmaxs.vvvmvl" => "__builtin_ve_vl_vfmaxs_vvvmvl",
-    "llvm.ve.vl.vfmaxs.vvvvl" => "__builtin_ve_vl_vfmaxs_vvvvl",
-    "llvm.ve.vl.vfmind.vsvl" => "__builtin_ve_vl_vfmind_vsvl",
-    "llvm.ve.vl.vfmind.vsvmvl" => "__builtin_ve_vl_vfmind_vsvmvl",
-    "llvm.ve.vl.vfmind.vsvvl" => "__builtin_ve_vl_vfmind_vsvvl",
-    "llvm.ve.vl.vfmind.vvvl" => "__builtin_ve_vl_vfmind_vvvl",
-    "llvm.ve.vl.vfmind.vvvmvl" => "__builtin_ve_vl_vfmind_vvvmvl",
-    "llvm.ve.vl.vfmind.vvvvl" => "__builtin_ve_vl_vfmind_vvvvl",
-    "llvm.ve.vl.vfmins.vsvl" => "__builtin_ve_vl_vfmins_vsvl",
-    "llvm.ve.vl.vfmins.vsvmvl" => "__builtin_ve_vl_vfmins_vsvmvl",
-    "llvm.ve.vl.vfmins.vsvvl" => "__builtin_ve_vl_vfmins_vsvvl",
-    "llvm.ve.vl.vfmins.vvvl" => "__builtin_ve_vl_vfmins_vvvl",
-    "llvm.ve.vl.vfmins.vvvmvl" => "__builtin_ve_vl_vfmins_vvvmvl",
-    "llvm.ve.vl.vfmins.vvvvl" => "__builtin_ve_vl_vfmins_vvvvl",
-    "llvm.ve.vl.vfmkdeq.mvl" => "__builtin_ve_vl_vfmkdeq_mvl",
-    "llvm.ve.vl.vfmkdeq.mvml" => "__builtin_ve_vl_vfmkdeq_mvml",
-    "llvm.ve.vl.vfmkdeqnan.mvl" => "__builtin_ve_vl_vfmkdeqnan_mvl",
-    "llvm.ve.vl.vfmkdeqnan.mvml" => "__builtin_ve_vl_vfmkdeqnan_mvml",
-    "llvm.ve.vl.vfmkdge.mvl" => "__builtin_ve_vl_vfmkdge_mvl",
-    "llvm.ve.vl.vfmkdge.mvml" => "__builtin_ve_vl_vfmkdge_mvml",
-    "llvm.ve.vl.vfmkdgenan.mvl" => "__builtin_ve_vl_vfmkdgenan_mvl",
-    "llvm.ve.vl.vfmkdgenan.mvml" => "__builtin_ve_vl_vfmkdgenan_mvml",
-    "llvm.ve.vl.vfmkdgt.mvl" => "__builtin_ve_vl_vfmkdgt_mvl",
-    "llvm.ve.vl.vfmkdgt.mvml" => "__builtin_ve_vl_vfmkdgt_mvml",
-    "llvm.ve.vl.vfmkdgtnan.mvl" => "__builtin_ve_vl_vfmkdgtnan_mvl",
-    "llvm.ve.vl.vfmkdgtnan.mvml" => "__builtin_ve_vl_vfmkdgtnan_mvml",
-    "llvm.ve.vl.vfmkdle.mvl" => "__builtin_ve_vl_vfmkdle_mvl",
-    "llvm.ve.vl.vfmkdle.mvml" => "__builtin_ve_vl_vfmkdle_mvml",
-    "llvm.ve.vl.vfmkdlenan.mvl" => "__builtin_ve_vl_vfmkdlenan_mvl",
-    "llvm.ve.vl.vfmkdlenan.mvml" => "__builtin_ve_vl_vfmkdlenan_mvml",
-    "llvm.ve.vl.vfmkdlt.mvl" => "__builtin_ve_vl_vfmkdlt_mvl",
-    "llvm.ve.vl.vfmkdlt.mvml" => "__builtin_ve_vl_vfmkdlt_mvml",
-    "llvm.ve.vl.vfmkdltnan.mvl" => "__builtin_ve_vl_vfmkdltnan_mvl",
-    "llvm.ve.vl.vfmkdltnan.mvml" => "__builtin_ve_vl_vfmkdltnan_mvml",
-    "llvm.ve.vl.vfmkdnan.mvl" => "__builtin_ve_vl_vfmkdnan_mvl",
-    "llvm.ve.vl.vfmkdnan.mvml" => "__builtin_ve_vl_vfmkdnan_mvml",
-    "llvm.ve.vl.vfmkdne.mvl" => "__builtin_ve_vl_vfmkdne_mvl",
-    "llvm.ve.vl.vfmkdne.mvml" => "__builtin_ve_vl_vfmkdne_mvml",
-    "llvm.ve.vl.vfmkdnenan.mvl" => "__builtin_ve_vl_vfmkdnenan_mvl",
-    "llvm.ve.vl.vfmkdnenan.mvml" => "__builtin_ve_vl_vfmkdnenan_mvml",
-    "llvm.ve.vl.vfmkdnum.mvl" => "__builtin_ve_vl_vfmkdnum_mvl",
-    "llvm.ve.vl.vfmkdnum.mvml" => "__builtin_ve_vl_vfmkdnum_mvml",
-    "llvm.ve.vl.vfmklaf.ml" => "__builtin_ve_vl_vfmklaf_ml",
-    "llvm.ve.vl.vfmklat.ml" => "__builtin_ve_vl_vfmklat_ml",
-    "llvm.ve.vl.vfmkleq.mvl" => "__builtin_ve_vl_vfmkleq_mvl",
-    "llvm.ve.vl.vfmkleq.mvml" => "__builtin_ve_vl_vfmkleq_mvml",
-    "llvm.ve.vl.vfmkleqnan.mvl" => "__builtin_ve_vl_vfmkleqnan_mvl",
-    "llvm.ve.vl.vfmkleqnan.mvml" => "__builtin_ve_vl_vfmkleqnan_mvml",
-    "llvm.ve.vl.vfmklge.mvl" => "__builtin_ve_vl_vfmklge_mvl",
-    "llvm.ve.vl.vfmklge.mvml" => "__builtin_ve_vl_vfmklge_mvml",
-    "llvm.ve.vl.vfmklgenan.mvl" => "__builtin_ve_vl_vfmklgenan_mvl",
-    "llvm.ve.vl.vfmklgenan.mvml" => "__builtin_ve_vl_vfmklgenan_mvml",
-    "llvm.ve.vl.vfmklgt.mvl" => "__builtin_ve_vl_vfmklgt_mvl",
-    "llvm.ve.vl.vfmklgt.mvml" => "__builtin_ve_vl_vfmklgt_mvml",
-    "llvm.ve.vl.vfmklgtnan.mvl" => "__builtin_ve_vl_vfmklgtnan_mvl",
-    "llvm.ve.vl.vfmklgtnan.mvml" => "__builtin_ve_vl_vfmklgtnan_mvml",
-    "llvm.ve.vl.vfmklle.mvl" => "__builtin_ve_vl_vfmklle_mvl",
-    "llvm.ve.vl.vfmklle.mvml" => "__builtin_ve_vl_vfmklle_mvml",
-    "llvm.ve.vl.vfmkllenan.mvl" => "__builtin_ve_vl_vfmkllenan_mvl",
-    "llvm.ve.vl.vfmkllenan.mvml" => "__builtin_ve_vl_vfmkllenan_mvml",
-    "llvm.ve.vl.vfmkllt.mvl" => "__builtin_ve_vl_vfmkllt_mvl",
-    "llvm.ve.vl.vfmkllt.mvml" => "__builtin_ve_vl_vfmkllt_mvml",
-    "llvm.ve.vl.vfmklltnan.mvl" => "__builtin_ve_vl_vfmklltnan_mvl",
-    "llvm.ve.vl.vfmklltnan.mvml" => "__builtin_ve_vl_vfmklltnan_mvml",
-    "llvm.ve.vl.vfmklnan.mvl" => "__builtin_ve_vl_vfmklnan_mvl",
-    "llvm.ve.vl.vfmklnan.mvml" => "__builtin_ve_vl_vfmklnan_mvml",
-    "llvm.ve.vl.vfmklne.mvl" => "__builtin_ve_vl_vfmklne_mvl",
-    "llvm.ve.vl.vfmklne.mvml" => "__builtin_ve_vl_vfmklne_mvml",
-    "llvm.ve.vl.vfmklnenan.mvl" => "__builtin_ve_vl_vfmklnenan_mvl",
-    "llvm.ve.vl.vfmklnenan.mvml" => "__builtin_ve_vl_vfmklnenan_mvml",
-    "llvm.ve.vl.vfmklnum.mvl" => "__builtin_ve_vl_vfmklnum_mvl",
-    "llvm.ve.vl.vfmklnum.mvml" => "__builtin_ve_vl_vfmklnum_mvml",
-    "llvm.ve.vl.vfmkseq.mvl" => "__builtin_ve_vl_vfmkseq_mvl",
-    "llvm.ve.vl.vfmkseq.mvml" => "__builtin_ve_vl_vfmkseq_mvml",
-    "llvm.ve.vl.vfmkseqnan.mvl" => "__builtin_ve_vl_vfmkseqnan_mvl",
-    "llvm.ve.vl.vfmkseqnan.mvml" => "__builtin_ve_vl_vfmkseqnan_mvml",
-    "llvm.ve.vl.vfmksge.mvl" => "__builtin_ve_vl_vfmksge_mvl",
-    "llvm.ve.vl.vfmksge.mvml" => "__builtin_ve_vl_vfmksge_mvml",
-    "llvm.ve.vl.vfmksgenan.mvl" => "__builtin_ve_vl_vfmksgenan_mvl",
-    "llvm.ve.vl.vfmksgenan.mvml" => "__builtin_ve_vl_vfmksgenan_mvml",
-    "llvm.ve.vl.vfmksgt.mvl" => "__builtin_ve_vl_vfmksgt_mvl",
-    "llvm.ve.vl.vfmksgt.mvml" => "__builtin_ve_vl_vfmksgt_mvml",
-    "llvm.ve.vl.vfmksgtnan.mvl" => "__builtin_ve_vl_vfmksgtnan_mvl",
-    "llvm.ve.vl.vfmksgtnan.mvml" => "__builtin_ve_vl_vfmksgtnan_mvml",
-    "llvm.ve.vl.vfmksle.mvl" => "__builtin_ve_vl_vfmksle_mvl",
-    "llvm.ve.vl.vfmksle.mvml" => "__builtin_ve_vl_vfmksle_mvml",
-    "llvm.ve.vl.vfmkslenan.mvl" => "__builtin_ve_vl_vfmkslenan_mvl",
-    "llvm.ve.vl.vfmkslenan.mvml" => "__builtin_ve_vl_vfmkslenan_mvml",
-    "llvm.ve.vl.vfmkslt.mvl" => "__builtin_ve_vl_vfmkslt_mvl",
-    "llvm.ve.vl.vfmkslt.mvml" => "__builtin_ve_vl_vfmkslt_mvml",
-    "llvm.ve.vl.vfmksltnan.mvl" => "__builtin_ve_vl_vfmksltnan_mvl",
-    "llvm.ve.vl.vfmksltnan.mvml" => "__builtin_ve_vl_vfmksltnan_mvml",
-    "llvm.ve.vl.vfmksnan.mvl" => "__builtin_ve_vl_vfmksnan_mvl",
-    "llvm.ve.vl.vfmksnan.mvml" => "__builtin_ve_vl_vfmksnan_mvml",
-    "llvm.ve.vl.vfmksne.mvl" => "__builtin_ve_vl_vfmksne_mvl",
-    "llvm.ve.vl.vfmksne.mvml" => "__builtin_ve_vl_vfmksne_mvml",
-    "llvm.ve.vl.vfmksnenan.mvl" => "__builtin_ve_vl_vfmksnenan_mvl",
-    "llvm.ve.vl.vfmksnenan.mvml" => "__builtin_ve_vl_vfmksnenan_mvml",
-    "llvm.ve.vl.vfmksnum.mvl" => "__builtin_ve_vl_vfmksnum_mvl",
-    "llvm.ve.vl.vfmksnum.mvml" => "__builtin_ve_vl_vfmksnum_mvml",
-    "llvm.ve.vl.vfmkweq.mvl" => "__builtin_ve_vl_vfmkweq_mvl",
-    "llvm.ve.vl.vfmkweq.mvml" => "__builtin_ve_vl_vfmkweq_mvml",
-    "llvm.ve.vl.vfmkweqnan.mvl" => "__builtin_ve_vl_vfmkweqnan_mvl",
-    "llvm.ve.vl.vfmkweqnan.mvml" => "__builtin_ve_vl_vfmkweqnan_mvml",
-    "llvm.ve.vl.vfmkwge.mvl" => "__builtin_ve_vl_vfmkwge_mvl",
-    "llvm.ve.vl.vfmkwge.mvml" => "__builtin_ve_vl_vfmkwge_mvml",
-    "llvm.ve.vl.vfmkwgenan.mvl" => "__builtin_ve_vl_vfmkwgenan_mvl",
-    "llvm.ve.vl.vfmkwgenan.mvml" => "__builtin_ve_vl_vfmkwgenan_mvml",
-    "llvm.ve.vl.vfmkwgt.mvl" => "__builtin_ve_vl_vfmkwgt_mvl",
-    "llvm.ve.vl.vfmkwgt.mvml" => "__builtin_ve_vl_vfmkwgt_mvml",
-    "llvm.ve.vl.vfmkwgtnan.mvl" => "__builtin_ve_vl_vfmkwgtnan_mvl",
-    "llvm.ve.vl.vfmkwgtnan.mvml" => "__builtin_ve_vl_vfmkwgtnan_mvml",
-    "llvm.ve.vl.vfmkwle.mvl" => "__builtin_ve_vl_vfmkwle_mvl",
-    "llvm.ve.vl.vfmkwle.mvml" => "__builtin_ve_vl_vfmkwle_mvml",
-    "llvm.ve.vl.vfmkwlenan.mvl" => "__builtin_ve_vl_vfmkwlenan_mvl",
-    "llvm.ve.vl.vfmkwlenan.mvml" => "__builtin_ve_vl_vfmkwlenan_mvml",
-    "llvm.ve.vl.vfmkwlt.mvl" => "__builtin_ve_vl_vfmkwlt_mvl",
-    "llvm.ve.vl.vfmkwlt.mvml" => "__builtin_ve_vl_vfmkwlt_mvml",
-    "llvm.ve.vl.vfmkwltnan.mvl" => "__builtin_ve_vl_vfmkwltnan_mvl",
-    "llvm.ve.vl.vfmkwltnan.mvml" => "__builtin_ve_vl_vfmkwltnan_mvml",
-    "llvm.ve.vl.vfmkwnan.mvl" => "__builtin_ve_vl_vfmkwnan_mvl",
-    "llvm.ve.vl.vfmkwnan.mvml" => "__builtin_ve_vl_vfmkwnan_mvml",
-    "llvm.ve.vl.vfmkwne.mvl" => "__builtin_ve_vl_vfmkwne_mvl",
-    "llvm.ve.vl.vfmkwne.mvml" => "__builtin_ve_vl_vfmkwne_mvml",
-    "llvm.ve.vl.vfmkwnenan.mvl" => "__builtin_ve_vl_vfmkwnenan_mvl",
-    "llvm.ve.vl.vfmkwnenan.mvml" => "__builtin_ve_vl_vfmkwnenan_mvml",
-    "llvm.ve.vl.vfmkwnum.mvl" => "__builtin_ve_vl_vfmkwnum_mvl",
-    "llvm.ve.vl.vfmkwnum.mvml" => "__builtin_ve_vl_vfmkwnum_mvml",
-    "llvm.ve.vl.vfmsbd.vsvvl" => "__builtin_ve_vl_vfmsbd_vsvvl",
-    "llvm.ve.vl.vfmsbd.vsvvmvl" => "__builtin_ve_vl_vfmsbd_vsvvmvl",
-    "llvm.ve.vl.vfmsbd.vsvvvl" => "__builtin_ve_vl_vfmsbd_vsvvvl",
-    "llvm.ve.vl.vfmsbd.vvsvl" => "__builtin_ve_vl_vfmsbd_vvsvl",
-    "llvm.ve.vl.vfmsbd.vvsvmvl" => "__builtin_ve_vl_vfmsbd_vvsvmvl",
-    "llvm.ve.vl.vfmsbd.vvsvvl" => "__builtin_ve_vl_vfmsbd_vvsvvl",
-    "llvm.ve.vl.vfmsbd.vvvvl" => "__builtin_ve_vl_vfmsbd_vvvvl",
-    "llvm.ve.vl.vfmsbd.vvvvmvl" => "__builtin_ve_vl_vfmsbd_vvvvmvl",
-    "llvm.ve.vl.vfmsbd.vvvvvl" => "__builtin_ve_vl_vfmsbd_vvvvvl",
-    "llvm.ve.vl.vfmsbs.vsvvl" => "__builtin_ve_vl_vfmsbs_vsvvl",
-    "llvm.ve.vl.vfmsbs.vsvvmvl" => "__builtin_ve_vl_vfmsbs_vsvvmvl",
-    "llvm.ve.vl.vfmsbs.vsvvvl" => "__builtin_ve_vl_vfmsbs_vsvvvl",
-    "llvm.ve.vl.vfmsbs.vvsvl" => "__builtin_ve_vl_vfmsbs_vvsvl",
-    "llvm.ve.vl.vfmsbs.vvsvmvl" => "__builtin_ve_vl_vfmsbs_vvsvmvl",
-    "llvm.ve.vl.vfmsbs.vvsvvl" => "__builtin_ve_vl_vfmsbs_vvsvvl",
-    "llvm.ve.vl.vfmsbs.vvvvl" => "__builtin_ve_vl_vfmsbs_vvvvl",
-    "llvm.ve.vl.vfmsbs.vvvvmvl" => "__builtin_ve_vl_vfmsbs_vvvvmvl",
-    "llvm.ve.vl.vfmsbs.vvvvvl" => "__builtin_ve_vl_vfmsbs_vvvvvl",
-    "llvm.ve.vl.vfmuld.vsvl" => "__builtin_ve_vl_vfmuld_vsvl",
-    "llvm.ve.vl.vfmuld.vsvmvl" => "__builtin_ve_vl_vfmuld_vsvmvl",
-    "llvm.ve.vl.vfmuld.vsvvl" => "__builtin_ve_vl_vfmuld_vsvvl",
-    "llvm.ve.vl.vfmuld.vvvl" => "__builtin_ve_vl_vfmuld_vvvl",
-    "llvm.ve.vl.vfmuld.vvvmvl" => "__builtin_ve_vl_vfmuld_vvvmvl",
-    "llvm.ve.vl.vfmuld.vvvvl" => "__builtin_ve_vl_vfmuld_vvvvl",
-    "llvm.ve.vl.vfmuls.vsvl" => "__builtin_ve_vl_vfmuls_vsvl",
-    "llvm.ve.vl.vfmuls.vsvmvl" => "__builtin_ve_vl_vfmuls_vsvmvl",
-    "llvm.ve.vl.vfmuls.vsvvl" => "__builtin_ve_vl_vfmuls_vsvvl",
-    "llvm.ve.vl.vfmuls.vvvl" => "__builtin_ve_vl_vfmuls_vvvl",
-    "llvm.ve.vl.vfmuls.vvvmvl" => "__builtin_ve_vl_vfmuls_vvvmvl",
-    "llvm.ve.vl.vfmuls.vvvvl" => "__builtin_ve_vl_vfmuls_vvvvl",
-    "llvm.ve.vl.vfnmadd.vsvvl" => "__builtin_ve_vl_vfnmadd_vsvvl",
-    "llvm.ve.vl.vfnmadd.vsvvmvl" => "__builtin_ve_vl_vfnmadd_vsvvmvl",
-    "llvm.ve.vl.vfnmadd.vsvvvl" => "__builtin_ve_vl_vfnmadd_vsvvvl",
-    "llvm.ve.vl.vfnmadd.vvsvl" => "__builtin_ve_vl_vfnmadd_vvsvl",
-    "llvm.ve.vl.vfnmadd.vvsvmvl" => "__builtin_ve_vl_vfnmadd_vvsvmvl",
-    "llvm.ve.vl.vfnmadd.vvsvvl" => "__builtin_ve_vl_vfnmadd_vvsvvl",
-    "llvm.ve.vl.vfnmadd.vvvvl" => "__builtin_ve_vl_vfnmadd_vvvvl",
-    "llvm.ve.vl.vfnmadd.vvvvmvl" => "__builtin_ve_vl_vfnmadd_vvvvmvl",
-    "llvm.ve.vl.vfnmadd.vvvvvl" => "__builtin_ve_vl_vfnmadd_vvvvvl",
-    "llvm.ve.vl.vfnmads.vsvvl" => "__builtin_ve_vl_vfnmads_vsvvl",
-    "llvm.ve.vl.vfnmads.vsvvmvl" => "__builtin_ve_vl_vfnmads_vsvvmvl",
-    "llvm.ve.vl.vfnmads.vsvvvl" => "__builtin_ve_vl_vfnmads_vsvvvl",
-    "llvm.ve.vl.vfnmads.vvsvl" => "__builtin_ve_vl_vfnmads_vvsvl",
-    "llvm.ve.vl.vfnmads.vvsvmvl" => "__builtin_ve_vl_vfnmads_vvsvmvl",
-    "llvm.ve.vl.vfnmads.vvsvvl" => "__builtin_ve_vl_vfnmads_vvsvvl",
-    "llvm.ve.vl.vfnmads.vvvvl" => "__builtin_ve_vl_vfnmads_vvvvl",
-    "llvm.ve.vl.vfnmads.vvvvmvl" => "__builtin_ve_vl_vfnmads_vvvvmvl",
-    "llvm.ve.vl.vfnmads.vvvvvl" => "__builtin_ve_vl_vfnmads_vvvvvl",
-    "llvm.ve.vl.vfnmsbd.vsvvl" => "__builtin_ve_vl_vfnmsbd_vsvvl",
-    "llvm.ve.vl.vfnmsbd.vsvvmvl" => "__builtin_ve_vl_vfnmsbd_vsvvmvl",
-    "llvm.ve.vl.vfnmsbd.vsvvvl" => "__builtin_ve_vl_vfnmsbd_vsvvvl",
-    "llvm.ve.vl.vfnmsbd.vvsvl" => "__builtin_ve_vl_vfnmsbd_vvsvl",
-    "llvm.ve.vl.vfnmsbd.vvsvmvl" => "__builtin_ve_vl_vfnmsbd_vvsvmvl",
-    "llvm.ve.vl.vfnmsbd.vvsvvl" => "__builtin_ve_vl_vfnmsbd_vvsvvl",
-    "llvm.ve.vl.vfnmsbd.vvvvl" => "__builtin_ve_vl_vfnmsbd_vvvvl",
-    "llvm.ve.vl.vfnmsbd.vvvvmvl" => "__builtin_ve_vl_vfnmsbd_vvvvmvl",
-    "llvm.ve.vl.vfnmsbd.vvvvvl" => "__builtin_ve_vl_vfnmsbd_vvvvvl",
-    "llvm.ve.vl.vfnmsbs.vsvvl" => "__builtin_ve_vl_vfnmsbs_vsvvl",
-    "llvm.ve.vl.vfnmsbs.vsvvmvl" => "__builtin_ve_vl_vfnmsbs_vsvvmvl",
-    "llvm.ve.vl.vfnmsbs.vsvvvl" => "__builtin_ve_vl_vfnmsbs_vsvvvl",
-    "llvm.ve.vl.vfnmsbs.vvsvl" => "__builtin_ve_vl_vfnmsbs_vvsvl",
-    "llvm.ve.vl.vfnmsbs.vvsvmvl" => "__builtin_ve_vl_vfnmsbs_vvsvmvl",
-    "llvm.ve.vl.vfnmsbs.vvsvvl" => "__builtin_ve_vl_vfnmsbs_vvsvvl",
-    "llvm.ve.vl.vfnmsbs.vvvvl" => "__builtin_ve_vl_vfnmsbs_vvvvl",
-    "llvm.ve.vl.vfnmsbs.vvvvmvl" => "__builtin_ve_vl_vfnmsbs_vvvvmvl",
-    "llvm.ve.vl.vfnmsbs.vvvvvl" => "__builtin_ve_vl_vfnmsbs_vvvvvl",
-    "llvm.ve.vl.vfrmaxdfst.vvl" => "__builtin_ve_vl_vfrmaxdfst_vvl",
-    "llvm.ve.vl.vfrmaxdfst.vvvl" => "__builtin_ve_vl_vfrmaxdfst_vvvl",
-    "llvm.ve.vl.vfrmaxdlst.vvl" => "__builtin_ve_vl_vfrmaxdlst_vvl",
-    "llvm.ve.vl.vfrmaxdlst.vvvl" => "__builtin_ve_vl_vfrmaxdlst_vvvl",
-    "llvm.ve.vl.vfrmaxsfst.vvl" => "__builtin_ve_vl_vfrmaxsfst_vvl",
-    "llvm.ve.vl.vfrmaxsfst.vvvl" => "__builtin_ve_vl_vfrmaxsfst_vvvl",
-    "llvm.ve.vl.vfrmaxslst.vvl" => "__builtin_ve_vl_vfrmaxslst_vvl",
-    "llvm.ve.vl.vfrmaxslst.vvvl" => "__builtin_ve_vl_vfrmaxslst_vvvl",
-    "llvm.ve.vl.vfrmindfst.vvl" => "__builtin_ve_vl_vfrmindfst_vvl",
-    "llvm.ve.vl.vfrmindfst.vvvl" => "__builtin_ve_vl_vfrmindfst_vvvl",
-    "llvm.ve.vl.vfrmindlst.vvl" => "__builtin_ve_vl_vfrmindlst_vvl",
-    "llvm.ve.vl.vfrmindlst.vvvl" => "__builtin_ve_vl_vfrmindlst_vvvl",
-    "llvm.ve.vl.vfrminsfst.vvl" => "__builtin_ve_vl_vfrminsfst_vvl",
-    "llvm.ve.vl.vfrminsfst.vvvl" => "__builtin_ve_vl_vfrminsfst_vvvl",
-    "llvm.ve.vl.vfrminslst.vvl" => "__builtin_ve_vl_vfrminslst_vvl",
-    "llvm.ve.vl.vfrminslst.vvvl" => "__builtin_ve_vl_vfrminslst_vvvl",
-    "llvm.ve.vl.vfsqrtd.vvl" => "__builtin_ve_vl_vfsqrtd_vvl",
-    "llvm.ve.vl.vfsqrtd.vvvl" => "__builtin_ve_vl_vfsqrtd_vvvl",
-    "llvm.ve.vl.vfsqrts.vvl" => "__builtin_ve_vl_vfsqrts_vvl",
-    "llvm.ve.vl.vfsqrts.vvvl" => "__builtin_ve_vl_vfsqrts_vvvl",
-    "llvm.ve.vl.vfsubd.vsvl" => "__builtin_ve_vl_vfsubd_vsvl",
-    "llvm.ve.vl.vfsubd.vsvmvl" => "__builtin_ve_vl_vfsubd_vsvmvl",
-    "llvm.ve.vl.vfsubd.vsvvl" => "__builtin_ve_vl_vfsubd_vsvvl",
-    "llvm.ve.vl.vfsubd.vvvl" => "__builtin_ve_vl_vfsubd_vvvl",
-    "llvm.ve.vl.vfsubd.vvvmvl" => "__builtin_ve_vl_vfsubd_vvvmvl",
-    "llvm.ve.vl.vfsubd.vvvvl" => "__builtin_ve_vl_vfsubd_vvvvl",
-    "llvm.ve.vl.vfsubs.vsvl" => "__builtin_ve_vl_vfsubs_vsvl",
-    "llvm.ve.vl.vfsubs.vsvmvl" => "__builtin_ve_vl_vfsubs_vsvmvl",
-    "llvm.ve.vl.vfsubs.vsvvl" => "__builtin_ve_vl_vfsubs_vsvvl",
-    "llvm.ve.vl.vfsubs.vvvl" => "__builtin_ve_vl_vfsubs_vvvl",
-    "llvm.ve.vl.vfsubs.vvvmvl" => "__builtin_ve_vl_vfsubs_vvvmvl",
-    "llvm.ve.vl.vfsubs.vvvvl" => "__builtin_ve_vl_vfsubs_vvvvl",
-    "llvm.ve.vl.vfsumd.vvl" => "__builtin_ve_vl_vfsumd_vvl",
-    "llvm.ve.vl.vfsumd.vvml" => "__builtin_ve_vl_vfsumd_vvml",
-    "llvm.ve.vl.vfsums.vvl" => "__builtin_ve_vl_vfsums_vvl",
-    "llvm.ve.vl.vfsums.vvml" => "__builtin_ve_vl_vfsums_vvml",
-    "llvm.ve.vl.vgt.vvssl" => "__builtin_ve_vl_vgt_vvssl",
-    "llvm.ve.vl.vgt.vvssml" => "__builtin_ve_vl_vgt_vvssml",
-    "llvm.ve.vl.vgt.vvssmvl" => "__builtin_ve_vl_vgt_vvssmvl",
-    "llvm.ve.vl.vgt.vvssvl" => "__builtin_ve_vl_vgt_vvssvl",
-    "llvm.ve.vl.vgtlsx.vvssl" => "__builtin_ve_vl_vgtlsx_vvssl",
-    "llvm.ve.vl.vgtlsx.vvssml" => "__builtin_ve_vl_vgtlsx_vvssml",
-    "llvm.ve.vl.vgtlsx.vvssmvl" => "__builtin_ve_vl_vgtlsx_vvssmvl",
-    "llvm.ve.vl.vgtlsx.vvssvl" => "__builtin_ve_vl_vgtlsx_vvssvl",
-    "llvm.ve.vl.vgtlsxnc.vvssl" => "__builtin_ve_vl_vgtlsxnc_vvssl",
-    "llvm.ve.vl.vgtlsxnc.vvssml" => "__builtin_ve_vl_vgtlsxnc_vvssml",
-    "llvm.ve.vl.vgtlsxnc.vvssmvl" => "__builtin_ve_vl_vgtlsxnc_vvssmvl",
-    "llvm.ve.vl.vgtlsxnc.vvssvl" => "__builtin_ve_vl_vgtlsxnc_vvssvl",
-    "llvm.ve.vl.vgtlzx.vvssl" => "__builtin_ve_vl_vgtlzx_vvssl",
-    "llvm.ve.vl.vgtlzx.vvssml" => "__builtin_ve_vl_vgtlzx_vvssml",
-    "llvm.ve.vl.vgtlzx.vvssmvl" => "__builtin_ve_vl_vgtlzx_vvssmvl",
-    "llvm.ve.vl.vgtlzx.vvssvl" => "__builtin_ve_vl_vgtlzx_vvssvl",
-    "llvm.ve.vl.vgtlzxnc.vvssl" => "__builtin_ve_vl_vgtlzxnc_vvssl",
-    "llvm.ve.vl.vgtlzxnc.vvssml" => "__builtin_ve_vl_vgtlzxnc_vvssml",
-    "llvm.ve.vl.vgtlzxnc.vvssmvl" => "__builtin_ve_vl_vgtlzxnc_vvssmvl",
-    "llvm.ve.vl.vgtlzxnc.vvssvl" => "__builtin_ve_vl_vgtlzxnc_vvssvl",
-    "llvm.ve.vl.vgtnc.vvssl" => "__builtin_ve_vl_vgtnc_vvssl",
-    "llvm.ve.vl.vgtnc.vvssml" => "__builtin_ve_vl_vgtnc_vvssml",
-    "llvm.ve.vl.vgtnc.vvssmvl" => "__builtin_ve_vl_vgtnc_vvssmvl",
-    "llvm.ve.vl.vgtnc.vvssvl" => "__builtin_ve_vl_vgtnc_vvssvl",
-    "llvm.ve.vl.vgtu.vvssl" => "__builtin_ve_vl_vgtu_vvssl",
-    "llvm.ve.vl.vgtu.vvssml" => "__builtin_ve_vl_vgtu_vvssml",
-    "llvm.ve.vl.vgtu.vvssmvl" => "__builtin_ve_vl_vgtu_vvssmvl",
-    "llvm.ve.vl.vgtu.vvssvl" => "__builtin_ve_vl_vgtu_vvssvl",
-    "llvm.ve.vl.vgtunc.vvssl" => "__builtin_ve_vl_vgtunc_vvssl",
-    "llvm.ve.vl.vgtunc.vvssml" => "__builtin_ve_vl_vgtunc_vvssml",
-    "llvm.ve.vl.vgtunc.vvssmvl" => "__builtin_ve_vl_vgtunc_vvssmvl",
-    "llvm.ve.vl.vgtunc.vvssvl" => "__builtin_ve_vl_vgtunc_vvssvl",
-    "llvm.ve.vl.vld.vssl" => "__builtin_ve_vl_vld_vssl",
-    "llvm.ve.vl.vld.vssvl" => "__builtin_ve_vl_vld_vssvl",
-    "llvm.ve.vl.vld2d.vssl" => "__builtin_ve_vl_vld2d_vssl",
-    "llvm.ve.vl.vld2d.vssvl" => "__builtin_ve_vl_vld2d_vssvl",
-    "llvm.ve.vl.vld2dnc.vssl" => "__builtin_ve_vl_vld2dnc_vssl",
-    "llvm.ve.vl.vld2dnc.vssvl" => "__builtin_ve_vl_vld2dnc_vssvl",
-    "llvm.ve.vl.vldl2dsx.vssl" => "__builtin_ve_vl_vldl2dsx_vssl",
-    "llvm.ve.vl.vldl2dsx.vssvl" => "__builtin_ve_vl_vldl2dsx_vssvl",
-    "llvm.ve.vl.vldl2dsxnc.vssl" => "__builtin_ve_vl_vldl2dsxnc_vssl",
-    "llvm.ve.vl.vldl2dsxnc.vssvl" => "__builtin_ve_vl_vldl2dsxnc_vssvl",
-    "llvm.ve.vl.vldl2dzx.vssl" => "__builtin_ve_vl_vldl2dzx_vssl",
-    "llvm.ve.vl.vldl2dzx.vssvl" => "__builtin_ve_vl_vldl2dzx_vssvl",
-    "llvm.ve.vl.vldl2dzxnc.vssl" => "__builtin_ve_vl_vldl2dzxnc_vssl",
-    "llvm.ve.vl.vldl2dzxnc.vssvl" => "__builtin_ve_vl_vldl2dzxnc_vssvl",
-    "llvm.ve.vl.vldlsx.vssl" => "__builtin_ve_vl_vldlsx_vssl",
-    "llvm.ve.vl.vldlsx.vssvl" => "__builtin_ve_vl_vldlsx_vssvl",
-    "llvm.ve.vl.vldlsxnc.vssl" => "__builtin_ve_vl_vldlsxnc_vssl",
-    "llvm.ve.vl.vldlsxnc.vssvl" => "__builtin_ve_vl_vldlsxnc_vssvl",
-    "llvm.ve.vl.vldlzx.vssl" => "__builtin_ve_vl_vldlzx_vssl",
-    "llvm.ve.vl.vldlzx.vssvl" => "__builtin_ve_vl_vldlzx_vssvl",
-    "llvm.ve.vl.vldlzxnc.vssl" => "__builtin_ve_vl_vldlzxnc_vssl",
-    "llvm.ve.vl.vldlzxnc.vssvl" => "__builtin_ve_vl_vldlzxnc_vssvl",
-    "llvm.ve.vl.vldnc.vssl" => "__builtin_ve_vl_vldnc_vssl",
-    "llvm.ve.vl.vldnc.vssvl" => "__builtin_ve_vl_vldnc_vssvl",
-    "llvm.ve.vl.vldu.vssl" => "__builtin_ve_vl_vldu_vssl",
-    "llvm.ve.vl.vldu.vssvl" => "__builtin_ve_vl_vldu_vssvl",
-    "llvm.ve.vl.vldu2d.vssl" => "__builtin_ve_vl_vldu2d_vssl",
-    "llvm.ve.vl.vldu2d.vssvl" => "__builtin_ve_vl_vldu2d_vssvl",
-    "llvm.ve.vl.vldu2dnc.vssl" => "__builtin_ve_vl_vldu2dnc_vssl",
-    "llvm.ve.vl.vldu2dnc.vssvl" => "__builtin_ve_vl_vldu2dnc_vssvl",
-    "llvm.ve.vl.vldunc.vssl" => "__builtin_ve_vl_vldunc_vssl",
-    "llvm.ve.vl.vldunc.vssvl" => "__builtin_ve_vl_vldunc_vssvl",
-    "llvm.ve.vl.vldz.vvl" => "__builtin_ve_vl_vldz_vvl",
-    "llvm.ve.vl.vldz.vvmvl" => "__builtin_ve_vl_vldz_vvmvl",
-    "llvm.ve.vl.vldz.vvvl" => "__builtin_ve_vl_vldz_vvvl",
-    "llvm.ve.vl.vmaxsl.vsvl" => "__builtin_ve_vl_vmaxsl_vsvl",
-    "llvm.ve.vl.vmaxsl.vsvmvl" => "__builtin_ve_vl_vmaxsl_vsvmvl",
-    "llvm.ve.vl.vmaxsl.vsvvl" => "__builtin_ve_vl_vmaxsl_vsvvl",
-    "llvm.ve.vl.vmaxsl.vvvl" => "__builtin_ve_vl_vmaxsl_vvvl",
-    "llvm.ve.vl.vmaxsl.vvvmvl" => "__builtin_ve_vl_vmaxsl_vvvmvl",
-    "llvm.ve.vl.vmaxsl.vvvvl" => "__builtin_ve_vl_vmaxsl_vvvvl",
-    "llvm.ve.vl.vmaxswsx.vsvl" => "__builtin_ve_vl_vmaxswsx_vsvl",
-    "llvm.ve.vl.vmaxswsx.vsvmvl" => "__builtin_ve_vl_vmaxswsx_vsvmvl",
-    "llvm.ve.vl.vmaxswsx.vsvvl" => "__builtin_ve_vl_vmaxswsx_vsvvl",
-    "llvm.ve.vl.vmaxswsx.vvvl" => "__builtin_ve_vl_vmaxswsx_vvvl",
-    "llvm.ve.vl.vmaxswsx.vvvmvl" => "__builtin_ve_vl_vmaxswsx_vvvmvl",
-    "llvm.ve.vl.vmaxswsx.vvvvl" => "__builtin_ve_vl_vmaxswsx_vvvvl",
-    "llvm.ve.vl.vmaxswzx.vsvl" => "__builtin_ve_vl_vmaxswzx_vsvl",
-    "llvm.ve.vl.vmaxswzx.vsvmvl" => "__builtin_ve_vl_vmaxswzx_vsvmvl",
-    "llvm.ve.vl.vmaxswzx.vsvvl" => "__builtin_ve_vl_vmaxswzx_vsvvl",
-    "llvm.ve.vl.vmaxswzx.vvvl" => "__builtin_ve_vl_vmaxswzx_vvvl",
-    "llvm.ve.vl.vmaxswzx.vvvmvl" => "__builtin_ve_vl_vmaxswzx_vvvmvl",
-    "llvm.ve.vl.vmaxswzx.vvvvl" => "__builtin_ve_vl_vmaxswzx_vvvvl",
-    "llvm.ve.vl.vminsl.vsvl" => "__builtin_ve_vl_vminsl_vsvl",
-    "llvm.ve.vl.vminsl.vsvmvl" => "__builtin_ve_vl_vminsl_vsvmvl",
-    "llvm.ve.vl.vminsl.vsvvl" => "__builtin_ve_vl_vminsl_vsvvl",
-    "llvm.ve.vl.vminsl.vvvl" => "__builtin_ve_vl_vminsl_vvvl",
-    "llvm.ve.vl.vminsl.vvvmvl" => "__builtin_ve_vl_vminsl_vvvmvl",
-    "llvm.ve.vl.vminsl.vvvvl" => "__builtin_ve_vl_vminsl_vvvvl",
-    "llvm.ve.vl.vminswsx.vsvl" => "__builtin_ve_vl_vminswsx_vsvl",
-    "llvm.ve.vl.vminswsx.vsvmvl" => "__builtin_ve_vl_vminswsx_vsvmvl",
-    "llvm.ve.vl.vminswsx.vsvvl" => "__builtin_ve_vl_vminswsx_vsvvl",
-    "llvm.ve.vl.vminswsx.vvvl" => "__builtin_ve_vl_vminswsx_vvvl",
-    "llvm.ve.vl.vminswsx.vvvmvl" => "__builtin_ve_vl_vminswsx_vvvmvl",
-    "llvm.ve.vl.vminswsx.vvvvl" => "__builtin_ve_vl_vminswsx_vvvvl",
-    "llvm.ve.vl.vminswzx.vsvl" => "__builtin_ve_vl_vminswzx_vsvl",
-    "llvm.ve.vl.vminswzx.vsvmvl" => "__builtin_ve_vl_vminswzx_vsvmvl",
-    "llvm.ve.vl.vminswzx.vsvvl" => "__builtin_ve_vl_vminswzx_vsvvl",
-    "llvm.ve.vl.vminswzx.vvvl" => "__builtin_ve_vl_vminswzx_vvvl",
-    "llvm.ve.vl.vminswzx.vvvmvl" => "__builtin_ve_vl_vminswzx_vvvmvl",
-    "llvm.ve.vl.vminswzx.vvvvl" => "__builtin_ve_vl_vminswzx_vvvvl",
-    "llvm.ve.vl.vmrg.vsvml" => "__builtin_ve_vl_vmrg_vsvml",
-    "llvm.ve.vl.vmrg.vsvmvl" => "__builtin_ve_vl_vmrg_vsvmvl",
-    "llvm.ve.vl.vmrg.vvvml" => "__builtin_ve_vl_vmrg_vvvml",
-    "llvm.ve.vl.vmrg.vvvmvl" => "__builtin_ve_vl_vmrg_vvvmvl",
-    "llvm.ve.vl.vmrgw.vsvMl" => "__builtin_ve_vl_vmrgw_vsvMl",
-    "llvm.ve.vl.vmrgw.vsvMvl" => "__builtin_ve_vl_vmrgw_vsvMvl",
-    "llvm.ve.vl.vmrgw.vvvMl" => "__builtin_ve_vl_vmrgw_vvvMl",
-    "llvm.ve.vl.vmrgw.vvvMvl" => "__builtin_ve_vl_vmrgw_vvvMvl",
-    "llvm.ve.vl.vmulsl.vsvl" => "__builtin_ve_vl_vmulsl_vsvl",
-    "llvm.ve.vl.vmulsl.vsvmvl" => "__builtin_ve_vl_vmulsl_vsvmvl",
-    "llvm.ve.vl.vmulsl.vsvvl" => "__builtin_ve_vl_vmulsl_vsvvl",
-    "llvm.ve.vl.vmulsl.vvvl" => "__builtin_ve_vl_vmulsl_vvvl",
-    "llvm.ve.vl.vmulsl.vvvmvl" => "__builtin_ve_vl_vmulsl_vvvmvl",
-    "llvm.ve.vl.vmulsl.vvvvl" => "__builtin_ve_vl_vmulsl_vvvvl",
-    "llvm.ve.vl.vmulslw.vsvl" => "__builtin_ve_vl_vmulslw_vsvl",
-    "llvm.ve.vl.vmulslw.vsvvl" => "__builtin_ve_vl_vmulslw_vsvvl",
-    "llvm.ve.vl.vmulslw.vvvl" => "__builtin_ve_vl_vmulslw_vvvl",
-    "llvm.ve.vl.vmulslw.vvvvl" => "__builtin_ve_vl_vmulslw_vvvvl",
-    "llvm.ve.vl.vmulswsx.vsvl" => "__builtin_ve_vl_vmulswsx_vsvl",
-    "llvm.ve.vl.vmulswsx.vsvmvl" => "__builtin_ve_vl_vmulswsx_vsvmvl",
-    "llvm.ve.vl.vmulswsx.vsvvl" => "__builtin_ve_vl_vmulswsx_vsvvl",
-    "llvm.ve.vl.vmulswsx.vvvl" => "__builtin_ve_vl_vmulswsx_vvvl",
-    "llvm.ve.vl.vmulswsx.vvvmvl" => "__builtin_ve_vl_vmulswsx_vvvmvl",
-    "llvm.ve.vl.vmulswsx.vvvvl" => "__builtin_ve_vl_vmulswsx_vvvvl",
-    "llvm.ve.vl.vmulswzx.vsvl" => "__builtin_ve_vl_vmulswzx_vsvl",
-    "llvm.ve.vl.vmulswzx.vsvmvl" => "__builtin_ve_vl_vmulswzx_vsvmvl",
-    "llvm.ve.vl.vmulswzx.vsvvl" => "__builtin_ve_vl_vmulswzx_vsvvl",
-    "llvm.ve.vl.vmulswzx.vvvl" => "__builtin_ve_vl_vmulswzx_vvvl",
-    "llvm.ve.vl.vmulswzx.vvvmvl" => "__builtin_ve_vl_vmulswzx_vvvmvl",
-    "llvm.ve.vl.vmulswzx.vvvvl" => "__builtin_ve_vl_vmulswzx_vvvvl",
-    "llvm.ve.vl.vmulul.vsvl" => "__builtin_ve_vl_vmulul_vsvl",
-    "llvm.ve.vl.vmulul.vsvmvl" => "__builtin_ve_vl_vmulul_vsvmvl",
-    "llvm.ve.vl.vmulul.vsvvl" => "__builtin_ve_vl_vmulul_vsvvl",
-    "llvm.ve.vl.vmulul.vvvl" => "__builtin_ve_vl_vmulul_vvvl",
-    "llvm.ve.vl.vmulul.vvvmvl" => "__builtin_ve_vl_vmulul_vvvmvl",
-    "llvm.ve.vl.vmulul.vvvvl" => "__builtin_ve_vl_vmulul_vvvvl",
-    "llvm.ve.vl.vmuluw.vsvl" => "__builtin_ve_vl_vmuluw_vsvl",
-    "llvm.ve.vl.vmuluw.vsvmvl" => "__builtin_ve_vl_vmuluw_vsvmvl",
-    "llvm.ve.vl.vmuluw.vsvvl" => "__builtin_ve_vl_vmuluw_vsvvl",
-    "llvm.ve.vl.vmuluw.vvvl" => "__builtin_ve_vl_vmuluw_vvvl",
-    "llvm.ve.vl.vmuluw.vvvmvl" => "__builtin_ve_vl_vmuluw_vvvmvl",
-    "llvm.ve.vl.vmuluw.vvvvl" => "__builtin_ve_vl_vmuluw_vvvvl",
-    "llvm.ve.vl.vmv.vsvl" => "__builtin_ve_vl_vmv_vsvl",
-    "llvm.ve.vl.vmv.vsvmvl" => "__builtin_ve_vl_vmv_vsvmvl",
-    "llvm.ve.vl.vmv.vsvvl" => "__builtin_ve_vl_vmv_vsvvl",
-    "llvm.ve.vl.vor.vsvl" => "__builtin_ve_vl_vor_vsvl",
-    "llvm.ve.vl.vor.vsvmvl" => "__builtin_ve_vl_vor_vsvmvl",
-    "llvm.ve.vl.vor.vsvvl" => "__builtin_ve_vl_vor_vsvvl",
-    "llvm.ve.vl.vor.vvvl" => "__builtin_ve_vl_vor_vvvl",
-    "llvm.ve.vl.vor.vvvmvl" => "__builtin_ve_vl_vor_vvvmvl",
-    "llvm.ve.vl.vor.vvvvl" => "__builtin_ve_vl_vor_vvvvl",
-    "llvm.ve.vl.vpcnt.vvl" => "__builtin_ve_vl_vpcnt_vvl",
-    "llvm.ve.vl.vpcnt.vvmvl" => "__builtin_ve_vl_vpcnt_vvmvl",
-    "llvm.ve.vl.vpcnt.vvvl" => "__builtin_ve_vl_vpcnt_vvvl",
-    "llvm.ve.vl.vrand.vvl" => "__builtin_ve_vl_vrand_vvl",
-    "llvm.ve.vl.vrand.vvml" => "__builtin_ve_vl_vrand_vvml",
-    "llvm.ve.vl.vrcpd.vvl" => "__builtin_ve_vl_vrcpd_vvl",
-    "llvm.ve.vl.vrcpd.vvvl" => "__builtin_ve_vl_vrcpd_vvvl",
-    "llvm.ve.vl.vrcps.vvl" => "__builtin_ve_vl_vrcps_vvl",
-    "llvm.ve.vl.vrcps.vvvl" => "__builtin_ve_vl_vrcps_vvvl",
-    "llvm.ve.vl.vrmaxslfst.vvl" => "__builtin_ve_vl_vrmaxslfst_vvl",
-    "llvm.ve.vl.vrmaxslfst.vvvl" => "__builtin_ve_vl_vrmaxslfst_vvvl",
-    "llvm.ve.vl.vrmaxsllst.vvl" => "__builtin_ve_vl_vrmaxsllst_vvl",
-    "llvm.ve.vl.vrmaxsllst.vvvl" => "__builtin_ve_vl_vrmaxsllst_vvvl",
-    "llvm.ve.vl.vrmaxswfstsx.vvl" => "__builtin_ve_vl_vrmaxswfstsx_vvl",
-    "llvm.ve.vl.vrmaxswfstsx.vvvl" => "__builtin_ve_vl_vrmaxswfstsx_vvvl",
-    "llvm.ve.vl.vrmaxswfstzx.vvl" => "__builtin_ve_vl_vrmaxswfstzx_vvl",
-    "llvm.ve.vl.vrmaxswfstzx.vvvl" => "__builtin_ve_vl_vrmaxswfstzx_vvvl",
-    "llvm.ve.vl.vrmaxswlstsx.vvl" => "__builtin_ve_vl_vrmaxswlstsx_vvl",
-    "llvm.ve.vl.vrmaxswlstsx.vvvl" => "__builtin_ve_vl_vrmaxswlstsx_vvvl",
-    "llvm.ve.vl.vrmaxswlstzx.vvl" => "__builtin_ve_vl_vrmaxswlstzx_vvl",
-    "llvm.ve.vl.vrmaxswlstzx.vvvl" => "__builtin_ve_vl_vrmaxswlstzx_vvvl",
-    "llvm.ve.vl.vrminslfst.vvl" => "__builtin_ve_vl_vrminslfst_vvl",
-    "llvm.ve.vl.vrminslfst.vvvl" => "__builtin_ve_vl_vrminslfst_vvvl",
-    "llvm.ve.vl.vrminsllst.vvl" => "__builtin_ve_vl_vrminsllst_vvl",
-    "llvm.ve.vl.vrminsllst.vvvl" => "__builtin_ve_vl_vrminsllst_vvvl",
-    "llvm.ve.vl.vrminswfstsx.vvl" => "__builtin_ve_vl_vrminswfstsx_vvl",
-    "llvm.ve.vl.vrminswfstsx.vvvl" => "__builtin_ve_vl_vrminswfstsx_vvvl",
-    "llvm.ve.vl.vrminswfstzx.vvl" => "__builtin_ve_vl_vrminswfstzx_vvl",
-    "llvm.ve.vl.vrminswfstzx.vvvl" => "__builtin_ve_vl_vrminswfstzx_vvvl",
-    "llvm.ve.vl.vrminswlstsx.vvl" => "__builtin_ve_vl_vrminswlstsx_vvl",
-    "llvm.ve.vl.vrminswlstsx.vvvl" => "__builtin_ve_vl_vrminswlstsx_vvvl",
-    "llvm.ve.vl.vrminswlstzx.vvl" => "__builtin_ve_vl_vrminswlstzx_vvl",
-    "llvm.ve.vl.vrminswlstzx.vvvl" => "__builtin_ve_vl_vrminswlstzx_vvvl",
-    "llvm.ve.vl.vror.vvl" => "__builtin_ve_vl_vror_vvl",
-    "llvm.ve.vl.vror.vvml" => "__builtin_ve_vl_vror_vvml",
-    "llvm.ve.vl.vrsqrtd.vvl" => "__builtin_ve_vl_vrsqrtd_vvl",
-    "llvm.ve.vl.vrsqrtd.vvvl" => "__builtin_ve_vl_vrsqrtd_vvvl",
-    "llvm.ve.vl.vrsqrtdnex.vvl" => "__builtin_ve_vl_vrsqrtdnex_vvl",
-    "llvm.ve.vl.vrsqrtdnex.vvvl" => "__builtin_ve_vl_vrsqrtdnex_vvvl",
-    "llvm.ve.vl.vrsqrts.vvl" => "__builtin_ve_vl_vrsqrts_vvl",
-    "llvm.ve.vl.vrsqrts.vvvl" => "__builtin_ve_vl_vrsqrts_vvvl",
-    "llvm.ve.vl.vrsqrtsnex.vvl" => "__builtin_ve_vl_vrsqrtsnex_vvl",
-    "llvm.ve.vl.vrsqrtsnex.vvvl" => "__builtin_ve_vl_vrsqrtsnex_vvvl",
-    "llvm.ve.vl.vrxor.vvl" => "__builtin_ve_vl_vrxor_vvl",
-    "llvm.ve.vl.vrxor.vvml" => "__builtin_ve_vl_vrxor_vvml",
-    "llvm.ve.vl.vsc.vvssl" => "__builtin_ve_vl_vsc_vvssl",
-    "llvm.ve.vl.vsc.vvssml" => "__builtin_ve_vl_vsc_vvssml",
-    "llvm.ve.vl.vscl.vvssl" => "__builtin_ve_vl_vscl_vvssl",
-    "llvm.ve.vl.vscl.vvssml" => "__builtin_ve_vl_vscl_vvssml",
-    "llvm.ve.vl.vsclnc.vvssl" => "__builtin_ve_vl_vsclnc_vvssl",
-    "llvm.ve.vl.vsclnc.vvssml" => "__builtin_ve_vl_vsclnc_vvssml",
-    "llvm.ve.vl.vsclncot.vvssl" => "__builtin_ve_vl_vsclncot_vvssl",
-    "llvm.ve.vl.vsclncot.vvssml" => "__builtin_ve_vl_vsclncot_vvssml",
-    "llvm.ve.vl.vsclot.vvssl" => "__builtin_ve_vl_vsclot_vvssl",
-    "llvm.ve.vl.vsclot.vvssml" => "__builtin_ve_vl_vsclot_vvssml",
-    "llvm.ve.vl.vscnc.vvssl" => "__builtin_ve_vl_vscnc_vvssl",
-    "llvm.ve.vl.vscnc.vvssml" => "__builtin_ve_vl_vscnc_vvssml",
-    "llvm.ve.vl.vscncot.vvssl" => "__builtin_ve_vl_vscncot_vvssl",
-    "llvm.ve.vl.vscncot.vvssml" => "__builtin_ve_vl_vscncot_vvssml",
-    "llvm.ve.vl.vscot.vvssl" => "__builtin_ve_vl_vscot_vvssl",
-    "llvm.ve.vl.vscot.vvssml" => "__builtin_ve_vl_vscot_vvssml",
-    "llvm.ve.vl.vscu.vvssl" => "__builtin_ve_vl_vscu_vvssl",
-    "llvm.ve.vl.vscu.vvssml" => "__builtin_ve_vl_vscu_vvssml",
-    "llvm.ve.vl.vscunc.vvssl" => "__builtin_ve_vl_vscunc_vvssl",
-    "llvm.ve.vl.vscunc.vvssml" => "__builtin_ve_vl_vscunc_vvssml",
-    "llvm.ve.vl.vscuncot.vvssl" => "__builtin_ve_vl_vscuncot_vvssl",
-    "llvm.ve.vl.vscuncot.vvssml" => "__builtin_ve_vl_vscuncot_vvssml",
-    "llvm.ve.vl.vscuot.vvssl" => "__builtin_ve_vl_vscuot_vvssl",
-    "llvm.ve.vl.vscuot.vvssml" => "__builtin_ve_vl_vscuot_vvssml",
-    "llvm.ve.vl.vseq.vl" => "__builtin_ve_vl_vseq_vl",
-    "llvm.ve.vl.vseq.vvl" => "__builtin_ve_vl_vseq_vvl",
-    "llvm.ve.vl.vsfa.vvssl" => "__builtin_ve_vl_vsfa_vvssl",
-    "llvm.ve.vl.vsfa.vvssmvl" => "__builtin_ve_vl_vsfa_vvssmvl",
-    "llvm.ve.vl.vsfa.vvssvl" => "__builtin_ve_vl_vsfa_vvssvl",
-    "llvm.ve.vl.vshf.vvvsl" => "__builtin_ve_vl_vshf_vvvsl",
-    "llvm.ve.vl.vshf.vvvsvl" => "__builtin_ve_vl_vshf_vvvsvl",
-    "llvm.ve.vl.vslal.vvsl" => "__builtin_ve_vl_vslal_vvsl",
-    "llvm.ve.vl.vslal.vvsmvl" => "__builtin_ve_vl_vslal_vvsmvl",
-    "llvm.ve.vl.vslal.vvsvl" => "__builtin_ve_vl_vslal_vvsvl",
-    "llvm.ve.vl.vslal.vvvl" => "__builtin_ve_vl_vslal_vvvl",
-    "llvm.ve.vl.vslal.vvvmvl" => "__builtin_ve_vl_vslal_vvvmvl",
-    "llvm.ve.vl.vslal.vvvvl" => "__builtin_ve_vl_vslal_vvvvl",
-    "llvm.ve.vl.vslawsx.vvsl" => "__builtin_ve_vl_vslawsx_vvsl",
-    "llvm.ve.vl.vslawsx.vvsmvl" => "__builtin_ve_vl_vslawsx_vvsmvl",
-    "llvm.ve.vl.vslawsx.vvsvl" => "__builtin_ve_vl_vslawsx_vvsvl",
-    "llvm.ve.vl.vslawsx.vvvl" => "__builtin_ve_vl_vslawsx_vvvl",
-    "llvm.ve.vl.vslawsx.vvvmvl" => "__builtin_ve_vl_vslawsx_vvvmvl",
-    "llvm.ve.vl.vslawsx.vvvvl" => "__builtin_ve_vl_vslawsx_vvvvl",
-    "llvm.ve.vl.vslawzx.vvsl" => "__builtin_ve_vl_vslawzx_vvsl",
-    "llvm.ve.vl.vslawzx.vvsmvl" => "__builtin_ve_vl_vslawzx_vvsmvl",
-    "llvm.ve.vl.vslawzx.vvsvl" => "__builtin_ve_vl_vslawzx_vvsvl",
-    "llvm.ve.vl.vslawzx.vvvl" => "__builtin_ve_vl_vslawzx_vvvl",
-    "llvm.ve.vl.vslawzx.vvvmvl" => "__builtin_ve_vl_vslawzx_vvvmvl",
-    "llvm.ve.vl.vslawzx.vvvvl" => "__builtin_ve_vl_vslawzx_vvvvl",
-    "llvm.ve.vl.vsll.vvsl" => "__builtin_ve_vl_vsll_vvsl",
-    "llvm.ve.vl.vsll.vvsmvl" => "__builtin_ve_vl_vsll_vvsmvl",
-    "llvm.ve.vl.vsll.vvsvl" => "__builtin_ve_vl_vsll_vvsvl",
-    "llvm.ve.vl.vsll.vvvl" => "__builtin_ve_vl_vsll_vvvl",
-    "llvm.ve.vl.vsll.vvvmvl" => "__builtin_ve_vl_vsll_vvvmvl",
-    "llvm.ve.vl.vsll.vvvvl" => "__builtin_ve_vl_vsll_vvvvl",
-    "llvm.ve.vl.vsral.vvsl" => "__builtin_ve_vl_vsral_vvsl",
-    "llvm.ve.vl.vsral.vvsmvl" => "__builtin_ve_vl_vsral_vvsmvl",
-    "llvm.ve.vl.vsral.vvsvl" => "__builtin_ve_vl_vsral_vvsvl",
-    "llvm.ve.vl.vsral.vvvl" => "__builtin_ve_vl_vsral_vvvl",
-    "llvm.ve.vl.vsral.vvvmvl" => "__builtin_ve_vl_vsral_vvvmvl",
-    "llvm.ve.vl.vsral.vvvvl" => "__builtin_ve_vl_vsral_vvvvl",
-    "llvm.ve.vl.vsrawsx.vvsl" => "__builtin_ve_vl_vsrawsx_vvsl",
-    "llvm.ve.vl.vsrawsx.vvsmvl" => "__builtin_ve_vl_vsrawsx_vvsmvl",
-    "llvm.ve.vl.vsrawsx.vvsvl" => "__builtin_ve_vl_vsrawsx_vvsvl",
-    "llvm.ve.vl.vsrawsx.vvvl" => "__builtin_ve_vl_vsrawsx_vvvl",
-    "llvm.ve.vl.vsrawsx.vvvmvl" => "__builtin_ve_vl_vsrawsx_vvvmvl",
-    "llvm.ve.vl.vsrawsx.vvvvl" => "__builtin_ve_vl_vsrawsx_vvvvl",
-    "llvm.ve.vl.vsrawzx.vvsl" => "__builtin_ve_vl_vsrawzx_vvsl",
-    "llvm.ve.vl.vsrawzx.vvsmvl" => "__builtin_ve_vl_vsrawzx_vvsmvl",
-    "llvm.ve.vl.vsrawzx.vvsvl" => "__builtin_ve_vl_vsrawzx_vvsvl",
-    "llvm.ve.vl.vsrawzx.vvvl" => "__builtin_ve_vl_vsrawzx_vvvl",
-    "llvm.ve.vl.vsrawzx.vvvmvl" => "__builtin_ve_vl_vsrawzx_vvvmvl",
-    "llvm.ve.vl.vsrawzx.vvvvl" => "__builtin_ve_vl_vsrawzx_vvvvl",
-    "llvm.ve.vl.vsrl.vvsl" => "__builtin_ve_vl_vsrl_vvsl",
-    "llvm.ve.vl.vsrl.vvsmvl" => "__builtin_ve_vl_vsrl_vvsmvl",
-    "llvm.ve.vl.vsrl.vvsvl" => "__builtin_ve_vl_vsrl_vvsvl",
-    "llvm.ve.vl.vsrl.vvvl" => "__builtin_ve_vl_vsrl_vvvl",
-    "llvm.ve.vl.vsrl.vvvmvl" => "__builtin_ve_vl_vsrl_vvvmvl",
-    "llvm.ve.vl.vsrl.vvvvl" => "__builtin_ve_vl_vsrl_vvvvl",
-    "llvm.ve.vl.vst.vssl" => "__builtin_ve_vl_vst_vssl",
-    "llvm.ve.vl.vst.vssml" => "__builtin_ve_vl_vst_vssml",
-    "llvm.ve.vl.vst2d.vssl" => "__builtin_ve_vl_vst2d_vssl",
-    "llvm.ve.vl.vst2d.vssml" => "__builtin_ve_vl_vst2d_vssml",
-    "llvm.ve.vl.vst2dnc.vssl" => "__builtin_ve_vl_vst2dnc_vssl",
-    "llvm.ve.vl.vst2dnc.vssml" => "__builtin_ve_vl_vst2dnc_vssml",
-    "llvm.ve.vl.vst2dncot.vssl" => "__builtin_ve_vl_vst2dncot_vssl",
-    "llvm.ve.vl.vst2dncot.vssml" => "__builtin_ve_vl_vst2dncot_vssml",
-    "llvm.ve.vl.vst2dot.vssl" => "__builtin_ve_vl_vst2dot_vssl",
-    "llvm.ve.vl.vst2dot.vssml" => "__builtin_ve_vl_vst2dot_vssml",
-    "llvm.ve.vl.vstl.vssl" => "__builtin_ve_vl_vstl_vssl",
-    "llvm.ve.vl.vstl.vssml" => "__builtin_ve_vl_vstl_vssml",
-    "llvm.ve.vl.vstl2d.vssl" => "__builtin_ve_vl_vstl2d_vssl",
-    "llvm.ve.vl.vstl2d.vssml" => "__builtin_ve_vl_vstl2d_vssml",
-    "llvm.ve.vl.vstl2dnc.vssl" => "__builtin_ve_vl_vstl2dnc_vssl",
-    "llvm.ve.vl.vstl2dnc.vssml" => "__builtin_ve_vl_vstl2dnc_vssml",
-    "llvm.ve.vl.vstl2dncot.vssl" => "__builtin_ve_vl_vstl2dncot_vssl",
-    "llvm.ve.vl.vstl2dncot.vssml" => "__builtin_ve_vl_vstl2dncot_vssml",
-    "llvm.ve.vl.vstl2dot.vssl" => "__builtin_ve_vl_vstl2dot_vssl",
-    "llvm.ve.vl.vstl2dot.vssml" => "__builtin_ve_vl_vstl2dot_vssml",
-    "llvm.ve.vl.vstlnc.vssl" => "__builtin_ve_vl_vstlnc_vssl",
-    "llvm.ve.vl.vstlnc.vssml" => "__builtin_ve_vl_vstlnc_vssml",
-    "llvm.ve.vl.vstlncot.vssl" => "__builtin_ve_vl_vstlncot_vssl",
-    "llvm.ve.vl.vstlncot.vssml" => "__builtin_ve_vl_vstlncot_vssml",
-    "llvm.ve.vl.vstlot.vssl" => "__builtin_ve_vl_vstlot_vssl",
-    "llvm.ve.vl.vstlot.vssml" => "__builtin_ve_vl_vstlot_vssml",
-    "llvm.ve.vl.vstnc.vssl" => "__builtin_ve_vl_vstnc_vssl",
-    "llvm.ve.vl.vstnc.vssml" => "__builtin_ve_vl_vstnc_vssml",
-    "llvm.ve.vl.vstncot.vssl" => "__builtin_ve_vl_vstncot_vssl",
-    "llvm.ve.vl.vstncot.vssml" => "__builtin_ve_vl_vstncot_vssml",
-    "llvm.ve.vl.vstot.vssl" => "__builtin_ve_vl_vstot_vssl",
-    "llvm.ve.vl.vstot.vssml" => "__builtin_ve_vl_vstot_vssml",
-    "llvm.ve.vl.vstu.vssl" => "__builtin_ve_vl_vstu_vssl",
-    "llvm.ve.vl.vstu.vssml" => "__builtin_ve_vl_vstu_vssml",
-    "llvm.ve.vl.vstu2d.vssl" => "__builtin_ve_vl_vstu2d_vssl",
-    "llvm.ve.vl.vstu2d.vssml" => "__builtin_ve_vl_vstu2d_vssml",
-    "llvm.ve.vl.vstu2dnc.vssl" => "__builtin_ve_vl_vstu2dnc_vssl",
-    "llvm.ve.vl.vstu2dnc.vssml" => "__builtin_ve_vl_vstu2dnc_vssml",
-    "llvm.ve.vl.vstu2dncot.vssl" => "__builtin_ve_vl_vstu2dncot_vssl",
-    "llvm.ve.vl.vstu2dncot.vssml" => "__builtin_ve_vl_vstu2dncot_vssml",
-    "llvm.ve.vl.vstu2dot.vssl" => "__builtin_ve_vl_vstu2dot_vssl",
-    "llvm.ve.vl.vstu2dot.vssml" => "__builtin_ve_vl_vstu2dot_vssml",
-    "llvm.ve.vl.vstunc.vssl" => "__builtin_ve_vl_vstunc_vssl",
-    "llvm.ve.vl.vstunc.vssml" => "__builtin_ve_vl_vstunc_vssml",
-    "llvm.ve.vl.vstuncot.vssl" => "__builtin_ve_vl_vstuncot_vssl",
-    "llvm.ve.vl.vstuncot.vssml" => "__builtin_ve_vl_vstuncot_vssml",
-    "llvm.ve.vl.vstuot.vssl" => "__builtin_ve_vl_vstuot_vssl",
-    "llvm.ve.vl.vstuot.vssml" => "__builtin_ve_vl_vstuot_vssml",
-    "llvm.ve.vl.vsubsl.vsvl" => "__builtin_ve_vl_vsubsl_vsvl",
-    "llvm.ve.vl.vsubsl.vsvmvl" => "__builtin_ve_vl_vsubsl_vsvmvl",
-    "llvm.ve.vl.vsubsl.vsvvl" => "__builtin_ve_vl_vsubsl_vsvvl",
-    "llvm.ve.vl.vsubsl.vvvl" => "__builtin_ve_vl_vsubsl_vvvl",
-    "llvm.ve.vl.vsubsl.vvvmvl" => "__builtin_ve_vl_vsubsl_vvvmvl",
-    "llvm.ve.vl.vsubsl.vvvvl" => "__builtin_ve_vl_vsubsl_vvvvl",
-    "llvm.ve.vl.vsubswsx.vsvl" => "__builtin_ve_vl_vsubswsx_vsvl",
-    "llvm.ve.vl.vsubswsx.vsvmvl" => "__builtin_ve_vl_vsubswsx_vsvmvl",
-    "llvm.ve.vl.vsubswsx.vsvvl" => "__builtin_ve_vl_vsubswsx_vsvvl",
-    "llvm.ve.vl.vsubswsx.vvvl" => "__builtin_ve_vl_vsubswsx_vvvl",
-    "llvm.ve.vl.vsubswsx.vvvmvl" => "__builtin_ve_vl_vsubswsx_vvvmvl",
-    "llvm.ve.vl.vsubswsx.vvvvl" => "__builtin_ve_vl_vsubswsx_vvvvl",
-    "llvm.ve.vl.vsubswzx.vsvl" => "__builtin_ve_vl_vsubswzx_vsvl",
-    "llvm.ve.vl.vsubswzx.vsvmvl" => "__builtin_ve_vl_vsubswzx_vsvmvl",
-    "llvm.ve.vl.vsubswzx.vsvvl" => "__builtin_ve_vl_vsubswzx_vsvvl",
-    "llvm.ve.vl.vsubswzx.vvvl" => "__builtin_ve_vl_vsubswzx_vvvl",
-    "llvm.ve.vl.vsubswzx.vvvmvl" => "__builtin_ve_vl_vsubswzx_vvvmvl",
-    "llvm.ve.vl.vsubswzx.vvvvl" => "__builtin_ve_vl_vsubswzx_vvvvl",
-    "llvm.ve.vl.vsubul.vsvl" => "__builtin_ve_vl_vsubul_vsvl",
-    "llvm.ve.vl.vsubul.vsvmvl" => "__builtin_ve_vl_vsubul_vsvmvl",
-    "llvm.ve.vl.vsubul.vsvvl" => "__builtin_ve_vl_vsubul_vsvvl",
-    "llvm.ve.vl.vsubul.vvvl" => "__builtin_ve_vl_vsubul_vvvl",
-    "llvm.ve.vl.vsubul.vvvmvl" => "__builtin_ve_vl_vsubul_vvvmvl",
-    "llvm.ve.vl.vsubul.vvvvl" => "__builtin_ve_vl_vsubul_vvvvl",
-    "llvm.ve.vl.vsubuw.vsvl" => "__builtin_ve_vl_vsubuw_vsvl",
-    "llvm.ve.vl.vsubuw.vsvmvl" => "__builtin_ve_vl_vsubuw_vsvmvl",
-    "llvm.ve.vl.vsubuw.vsvvl" => "__builtin_ve_vl_vsubuw_vsvvl",
-    "llvm.ve.vl.vsubuw.vvvl" => "__builtin_ve_vl_vsubuw_vvvl",
-    "llvm.ve.vl.vsubuw.vvvmvl" => "__builtin_ve_vl_vsubuw_vvvmvl",
-    "llvm.ve.vl.vsubuw.vvvvl" => "__builtin_ve_vl_vsubuw_vvvvl",
-    "llvm.ve.vl.vsuml.vvl" => "__builtin_ve_vl_vsuml_vvl",
-    "llvm.ve.vl.vsuml.vvml" => "__builtin_ve_vl_vsuml_vvml",
-    "llvm.ve.vl.vsumwsx.vvl" => "__builtin_ve_vl_vsumwsx_vvl",
-    "llvm.ve.vl.vsumwsx.vvml" => "__builtin_ve_vl_vsumwsx_vvml",
-    "llvm.ve.vl.vsumwzx.vvl" => "__builtin_ve_vl_vsumwzx_vvl",
-    "llvm.ve.vl.vsumwzx.vvml" => "__builtin_ve_vl_vsumwzx_vvml",
-    "llvm.ve.vl.vxor.vsvl" => "__builtin_ve_vl_vxor_vsvl",
-    "llvm.ve.vl.vxor.vsvmvl" => "__builtin_ve_vl_vxor_vsvmvl",
-    "llvm.ve.vl.vxor.vsvvl" => "__builtin_ve_vl_vxor_vsvvl",
-    "llvm.ve.vl.vxor.vvvl" => "__builtin_ve_vl_vxor_vvvl",
-    "llvm.ve.vl.vxor.vvvmvl" => "__builtin_ve_vl_vxor_vvvmvl",
-    "llvm.ve.vl.vxor.vvvvl" => "__builtin_ve_vl_vxor_vvvvl",
-    "llvm.ve.vl.xorm.MMM" => "__builtin_ve_vl_xorm_MMM",
-    "llvm.ve.vl.xorm.mmm" => "__builtin_ve_vl_xorm_mmm",
-    // x86
-    "llvm.x86.aadd32" => "__builtin_ia32_aadd32",
-    "llvm.x86.aadd64" => "__builtin_ia32_aadd64",
-    "llvm.x86.aand32" => "__builtin_ia32_aand32",
-    "llvm.x86.aand64" => "__builtin_ia32_aand64",
-    "llvm.x86.addcarry.u32" => "__builtin_ia32_addcarry_u32",
-    "llvm.x86.addcarry.u64" => "__builtin_ia32_addcarry_u64",
-    "llvm.x86.addcarryx.u32" => "__builtin_ia32_addcarryx_u32",
-    "llvm.x86.addcarryx.u64" => "__builtin_ia32_addcarryx_u64",
-    "llvm.x86.aesni.aesdec" => "__builtin_ia32_aesdec128",
-    "llvm.x86.aesni.aesdec.256" => "__builtin_ia32_aesdec256",
-    "llvm.x86.aesni.aesdec.512" => "__builtin_ia32_aesdec512",
-    "llvm.x86.aesni.aesdeclast" => "__builtin_ia32_aesdeclast128",
-    "llvm.x86.aesni.aesdeclast.256" => "__builtin_ia32_aesdeclast256",
-    "llvm.x86.aesni.aesdeclast.512" => "__builtin_ia32_aesdeclast512",
-    "llvm.x86.aesni.aesenc" => "__builtin_ia32_aesenc128",
-    "llvm.x86.aesni.aesenc.256" => "__builtin_ia32_aesenc256",
-    "llvm.x86.aesni.aesenc.512" => "__builtin_ia32_aesenc512",
-    "llvm.x86.aesni.aesenclast" => "__builtin_ia32_aesenclast128",
-    "llvm.x86.aesni.aesenclast.256" => "__builtin_ia32_aesenclast256",
-    "llvm.x86.aesni.aesenclast.512" => "__builtin_ia32_aesenclast512",
-    "llvm.x86.aesni.aesimc" => "__builtin_ia32_aesimc128",
-    "llvm.x86.aesni.aeskeygenassist" => "__builtin_ia32_aeskeygenassist128",
-    "llvm.x86.aor32" => "__builtin_ia32_aor32",
-    "llvm.x86.aor64" => "__builtin_ia32_aor64",
-    "llvm.x86.avx.addsub.pd.256" => "__builtin_ia32_addsubpd256",
-    "llvm.x86.avx.addsub.ps.256" => "__builtin_ia32_addsubps256",
-    "llvm.x86.avx.blend.pd.256" => "__builtin_ia32_blendpd256",
-    "llvm.x86.avx.blend.ps.256" => "__builtin_ia32_blendps256",
-    "llvm.x86.avx.blendv.pd.256" => "__builtin_ia32_blendvpd256",
-    "llvm.x86.avx.blendv.ps.256" => "__builtin_ia32_blendvps256",
-    "llvm.x86.avx.cmp.pd.256" => "__builtin_ia32_cmppd256",
-    "llvm.x86.avx.cmp.ps.256" => "__builtin_ia32_cmpps256",
-    "llvm.x86.avx.cvt.pd2.ps.256" => "__builtin_ia32_cvtpd2ps256",
-    "llvm.x86.avx.cvt.pd2dq.256" => "__builtin_ia32_cvtpd2dq256",
-    "llvm.x86.avx.cvt.ps2.pd.256" => "__builtin_ia32_cvtps2pd256",
-    "llvm.x86.avx.cvt.ps2dq.256" => "__builtin_ia32_cvtps2dq256",
-    "llvm.x86.avx.cvtdq2.pd.256" => "__builtin_ia32_cvtdq2pd256",
-    "llvm.x86.avx.cvtdq2.ps.256" => "__builtin_ia32_cvtdq2ps256",
-    "llvm.x86.avx.cvtt.pd2dq.256" => "__builtin_ia32_cvttpd2dq256",
-    "llvm.x86.avx.cvtt.ps2dq.256" => "__builtin_ia32_cvttps2dq256",
-    "llvm.x86.avx.dp.ps.256" => "__builtin_ia32_dpps256",
-    "llvm.x86.avx.hadd.pd.256" => "__builtin_ia32_haddpd256",
-    "llvm.x86.avx.hadd.ps.256" => "__builtin_ia32_haddps256",
-    "llvm.x86.avx.hsub.pd.256" => "__builtin_ia32_hsubpd256",
-    "llvm.x86.avx.hsub.ps.256" => "__builtin_ia32_hsubps256",
-    "llvm.x86.avx.ldu.dq.256" => "__builtin_ia32_lddqu256",
-    "llvm.x86.avx.maskload.pd" => "__builtin_ia32_maskloadpd",
-    "llvm.x86.avx.maskload.pd.256" => "__builtin_ia32_maskloadpd256",
-    "llvm.x86.avx.maskload.ps" => "__builtin_ia32_maskloadps",
-    "llvm.x86.avx.maskload.ps.256" => "__builtin_ia32_maskloadps256",
-    "llvm.x86.avx.maskstore.pd" => "__builtin_ia32_maskstorepd",
-    "llvm.x86.avx.maskstore.pd.256" => "__builtin_ia32_maskstorepd256",
-    "llvm.x86.avx.maskstore.ps" => "__builtin_ia32_maskstoreps",
-    "llvm.x86.avx.maskstore.ps.256" => "__builtin_ia32_maskstoreps256",
-    "llvm.x86.avx.max.pd.256" => "__builtin_ia32_maxpd256",
-    "llvm.x86.avx.max.ps.256" => "__builtin_ia32_maxps256",
-    "llvm.x86.avx.min.pd.256" => "__builtin_ia32_minpd256",
-    "llvm.x86.avx.min.ps.256" => "__builtin_ia32_minps256",
-    "llvm.x86.avx.movmsk.pd.256" => "__builtin_ia32_movmskpd256",
-    "llvm.x86.avx.movmsk.ps.256" => "__builtin_ia32_movmskps256",
-    "llvm.x86.avx.ptestc.256" => "__builtin_ia32_ptestc256",
-    "llvm.x86.avx.ptestnzc.256" => "__builtin_ia32_ptestnzc256",
-    "llvm.x86.avx.ptestz.256" => "__builtin_ia32_ptestz256",
-    "llvm.x86.avx.rcp.ps.256" => "__builtin_ia32_rcpps256",
-    "llvm.x86.avx.round.pd.256" => "__builtin_ia32_roundpd256",
-    "llvm.x86.avx.round.ps.256" => "__builtin_ia32_roundps256",
-    "llvm.x86.avx.rsqrt.ps.256" => "__builtin_ia32_rsqrtps256",
-    "llvm.x86.avx.sqrt.pd.256" => "__builtin_ia32_sqrtpd256",
-    "llvm.x86.avx.sqrt.ps.256" => "__builtin_ia32_sqrtps256",
-    "llvm.x86.avx.storeu.dq.256" => "__builtin_ia32_storedqu256",
-    "llvm.x86.avx.storeu.pd.256" => "__builtin_ia32_storeupd256",
-    "llvm.x86.avx.storeu.ps.256" => "__builtin_ia32_storeups256",
-    "llvm.x86.avx.vbroadcastf128.pd.256" => "__builtin_ia32_vbroadcastf128_pd256",
-    "llvm.x86.avx.vbroadcastf128.ps.256" => "__builtin_ia32_vbroadcastf128_ps256",
-    "llvm.x86.avx.vextractf128.pd.256" => "__builtin_ia32_vextractf128_pd256",
-    "llvm.x86.avx.vextractf128.ps.256" => "__builtin_ia32_vextractf128_ps256",
-    "llvm.x86.avx.vextractf128.si.256" => "__builtin_ia32_vextractf128_si256",
-    "llvm.x86.avx.vinsertf128.pd.256" => "__builtin_ia32_vinsertf128_pd256",
-    "llvm.x86.avx.vinsertf128.ps.256" => "__builtin_ia32_vinsertf128_ps256",
-    "llvm.x86.avx.vinsertf128.si.256" => "__builtin_ia32_vinsertf128_si256",
-    "llvm.x86.avx.vperm2f128.pd.256" => "__builtin_ia32_vperm2f128_pd256",
-    "llvm.x86.avx.vperm2f128.ps.256" => "__builtin_ia32_vperm2f128_ps256",
-    "llvm.x86.avx.vperm2f128.si.256" => "__builtin_ia32_vperm2f128_si256",
-    "llvm.x86.avx.vpermilvar.pd" => "__builtin_ia32_vpermilvarpd",
-    "llvm.x86.avx.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256",
-    "llvm.x86.avx.vpermilvar.ps" => "__builtin_ia32_vpermilvarps",
-    "llvm.x86.avx.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256",
-    "llvm.x86.avx.vtestc.pd" => "__builtin_ia32_vtestcpd",
-    "llvm.x86.avx.vtestc.pd.256" => "__builtin_ia32_vtestcpd256",
-    "llvm.x86.avx.vtestc.ps" => "__builtin_ia32_vtestcps",
-    "llvm.x86.avx.vtestc.ps.256" => "__builtin_ia32_vtestcps256",
-    "llvm.x86.avx.vtestnzc.pd" => "__builtin_ia32_vtestnzcpd",
-    "llvm.x86.avx.vtestnzc.pd.256" => "__builtin_ia32_vtestnzcpd256",
-    "llvm.x86.avx.vtestnzc.ps" => "__builtin_ia32_vtestnzcps",
-    "llvm.x86.avx.vtestnzc.ps.256" => "__builtin_ia32_vtestnzcps256",
-    "llvm.x86.avx.vtestz.pd" => "__builtin_ia32_vtestzpd",
-    "llvm.x86.avx.vtestz.pd.256" => "__builtin_ia32_vtestzpd256",
-    "llvm.x86.avx.vtestz.ps" => "__builtin_ia32_vtestzps",
-    "llvm.x86.avx.vtestz.ps.256" => "__builtin_ia32_vtestzps256",
-    "llvm.x86.avx.vzeroall" => "__builtin_ia32_vzeroall",
-    "llvm.x86.avx.vzeroupper" => "__builtin_ia32_vzeroupper",
-    "llvm.x86.avx10.mask.getexp.bf16.128" => "__builtin_ia32_vgetexpbf16128_mask",
-    "llvm.x86.avx10.mask.getexp.bf16.256" => "__builtin_ia32_vgetexpbf16256_mask",
-    "llvm.x86.avx10.mask.getexp.bf16.512" => "__builtin_ia32_vgetexpbf16512_mask",
-    "llvm.x86.avx10.mask.getmant.bf16.128" => "__builtin_ia32_vgetmantbf16128_mask",
-    "llvm.x86.avx10.mask.getmant.bf16.256" => "__builtin_ia32_vgetmantbf16256_mask",
-    "llvm.x86.avx10.mask.getmant.bf16.512" => "__builtin_ia32_vgetmantbf16512_mask",
-    "llvm.x86.avx10.mask.rcp.bf16.128" => "__builtin_ia32_vrcpbf16128_mask",
-    "llvm.x86.avx10.mask.rcp.bf16.256" => "__builtin_ia32_vrcpbf16256_mask",
-    "llvm.x86.avx10.mask.rcp.bf16.512" => "__builtin_ia32_vrcpbf16512_mask",
-    "llvm.x86.avx10.mask.reduce.bf16.128" => "__builtin_ia32_vreducebf16128_mask",
-    "llvm.x86.avx10.mask.reduce.bf16.256" => "__builtin_ia32_vreducebf16256_mask",
-    "llvm.x86.avx10.mask.reduce.bf16.512" => "__builtin_ia32_vreducebf16512_mask",
-    "llvm.x86.avx10.mask.rndscale.bf16.128" => "__builtin_ia32_vrndscalebf16_128_mask",
-    "llvm.x86.avx10.mask.rndscale.bf16.256" => "__builtin_ia32_vrndscalebf16_256_mask",
-    "llvm.x86.avx10.mask.rndscale.bf16.512" => "__builtin_ia32_vrndscalebf16_mask",
-    "llvm.x86.avx10.mask.rsqrt.bf16.128" => "__builtin_ia32_vrsqrtbf16128_mask",
-    "llvm.x86.avx10.mask.rsqrt.bf16.256" => "__builtin_ia32_vrsqrtbf16256_mask",
-    "llvm.x86.avx10.mask.rsqrt.bf16.512" => "__builtin_ia32_vrsqrtbf16512_mask",
-    "llvm.x86.avx10.mask.scalef.bf16.128" => "__builtin_ia32_vscalefbf16128_mask",
-    "llvm.x86.avx10.mask.scalef.bf16.256" => "__builtin_ia32_vscalefbf16256_mask",
-    "llvm.x86.avx10.mask.scalef.bf16.512" => "__builtin_ia32_vscalefbf16512_mask",
-    "llvm.x86.avx10.mask.vcvt2ps2phx.128" => "__builtin_ia32_vcvt2ps2phx128_mask",
-    "llvm.x86.avx10.mask.vcvt2ps2phx.256" => "__builtin_ia32_vcvt2ps2phx256_mask",
-    "llvm.x86.avx10.mask.vcvt2ps2phx.512" => "__builtin_ia32_vcvt2ps2phx512_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2bf8128" => "__builtin_ia32_vcvtbiasph2bf8_128_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2bf8256" => "__builtin_ia32_vcvtbiasph2bf8_256_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2bf8512" => "__builtin_ia32_vcvtbiasph2bf8_512_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2bf8s128" => "__builtin_ia32_vcvtbiasph2bf8s_128_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2bf8s256" => "__builtin_ia32_vcvtbiasph2bf8s_256_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2bf8s512" => "__builtin_ia32_vcvtbiasph2bf8s_512_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2hf8128" => "__builtin_ia32_vcvtbiasph2hf8_128_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2hf8256" => "__builtin_ia32_vcvtbiasph2hf8_256_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2hf8512" => "__builtin_ia32_vcvtbiasph2hf8_512_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2hf8s128" => "__builtin_ia32_vcvtbiasph2hf8s_128_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2hf8s256" => "__builtin_ia32_vcvtbiasph2hf8s_256_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2hf8s512" => "__builtin_ia32_vcvtbiasph2hf8s_512_mask",
-    "llvm.x86.avx10.mask.vcvthf82ph128" => "__builtin_ia32_vcvthf8_2ph128_mask",
-    "llvm.x86.avx10.mask.vcvthf82ph256" => "__builtin_ia32_vcvthf8_2ph256_mask",
-    "llvm.x86.avx10.mask.vcvthf82ph512" => "__builtin_ia32_vcvthf8_2ph512_mask",
-    "llvm.x86.avx10.mask.vcvtph2bf8128" => "__builtin_ia32_vcvtph2bf8_128_mask",
-    "llvm.x86.avx10.mask.vcvtph2bf8256" => "__builtin_ia32_vcvtph2bf8_256_mask",
-    "llvm.x86.avx10.mask.vcvtph2bf8512" => "__builtin_ia32_vcvtph2bf8_512_mask",
-    "llvm.x86.avx10.mask.vcvtph2bf8s128" => "__builtin_ia32_vcvtph2bf8s_128_mask",
-    "llvm.x86.avx10.mask.vcvtph2bf8s256" => "__builtin_ia32_vcvtph2bf8s_256_mask",
-    "llvm.x86.avx10.mask.vcvtph2bf8s512" => "__builtin_ia32_vcvtph2bf8s_512_mask",
-    "llvm.x86.avx10.mask.vcvtph2hf8128" => "__builtin_ia32_vcvtph2hf8_128_mask",
-    "llvm.x86.avx10.mask.vcvtph2hf8256" => "__builtin_ia32_vcvtph2hf8_256_mask",
-    "llvm.x86.avx10.mask.vcvtph2hf8512" => "__builtin_ia32_vcvtph2hf8_512_mask",
-    "llvm.x86.avx10.mask.vcvtph2hf8s128" => "__builtin_ia32_vcvtph2hf8s_128_mask",
-    "llvm.x86.avx10.mask.vcvtph2hf8s256" => "__builtin_ia32_vcvtph2hf8s_256_mask",
-    "llvm.x86.avx10.mask.vcvtph2hf8s512" => "__builtin_ia32_vcvtph2hf8s_512_mask",
-    "llvm.x86.avx10.mask.vcvtph2ibs128" => "__builtin_ia32_vcvtph2ibs128_mask",
-    "llvm.x86.avx10.mask.vcvtph2ibs256" => "__builtin_ia32_vcvtph2ibs256_mask",
-    "llvm.x86.avx10.mask.vcvtph2ibs512" => "__builtin_ia32_vcvtph2ibs512_mask",
-    "llvm.x86.avx10.mask.vcvtph2iubs128" => "__builtin_ia32_vcvtph2iubs128_mask",
-    "llvm.x86.avx10.mask.vcvtph2iubs256" => "__builtin_ia32_vcvtph2iubs256_mask",
-    "llvm.x86.avx10.mask.vcvtph2iubs512" => "__builtin_ia32_vcvtph2iubs512_mask",
-    "llvm.x86.avx10.mask.vcvtps2ibs128" => "__builtin_ia32_vcvtps2ibs128_mask",
-    "llvm.x86.avx10.mask.vcvtps2ibs256" => "__builtin_ia32_vcvtps2ibs256_mask",
-    "llvm.x86.avx10.mask.vcvtps2ibs512" => "__builtin_ia32_vcvtps2ibs512_mask",
-    "llvm.x86.avx10.mask.vcvtps2iubs128" => "__builtin_ia32_vcvtps2iubs128_mask",
-    "llvm.x86.avx10.mask.vcvtps2iubs256" => "__builtin_ia32_vcvtps2iubs256_mask",
-    "llvm.x86.avx10.mask.vcvtps2iubs512" => "__builtin_ia32_vcvtps2iubs512_mask",
-    "llvm.x86.avx10.mask.vcvttpd2dqs.128" => "__builtin_ia32_vcvttpd2dqs128_mask",
-    "llvm.x86.avx10.mask.vcvttpd2dqs.256" => "__builtin_ia32_vcvttpd2dqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2dqs.round.512" => "__builtin_ia32_vcvttpd2dqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttpd2qqs.128" => "__builtin_ia32_vcvttpd2qqs128_mask",
-    "llvm.x86.avx10.mask.vcvttpd2qqs.256" => "__builtin_ia32_vcvttpd2qqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2qqs.round.512" => "__builtin_ia32_vcvttpd2qqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttpd2udqs.128" => "__builtin_ia32_vcvttpd2udqs128_mask",
-    "llvm.x86.avx10.mask.vcvttpd2udqs.256" => "__builtin_ia32_vcvttpd2udqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2udqs.round.512" => "__builtin_ia32_vcvttpd2udqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttpd2uqqs.128" => "__builtin_ia32_vcvttpd2uqqs128_mask",
-    "llvm.x86.avx10.mask.vcvttpd2uqqs.256" => "__builtin_ia32_vcvttpd2uqqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2uqqs.round.512" => "__builtin_ia32_vcvttpd2uqqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttph2ibs128" => "__builtin_ia32_vcvttph2ibs128_mask",
-    "llvm.x86.avx10.mask.vcvttph2ibs256" => "__builtin_ia32_vcvttph2ibs256_mask",
-    "llvm.x86.avx10.mask.vcvttph2ibs512" => "__builtin_ia32_vcvttph2ibs512_mask",
-    "llvm.x86.avx10.mask.vcvttph2iubs128" => "__builtin_ia32_vcvttph2iubs128_mask",
-    "llvm.x86.avx10.mask.vcvttph2iubs256" => "__builtin_ia32_vcvttph2iubs256_mask",
-    "llvm.x86.avx10.mask.vcvttph2iubs512" => "__builtin_ia32_vcvttph2iubs512_mask",
-    "llvm.x86.avx10.mask.vcvttps2dqs.128" => "__builtin_ia32_vcvttps2dqs128_mask",
-    "llvm.x86.avx10.mask.vcvttps2dqs.256" => "__builtin_ia32_vcvttps2dqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2dqs.round.512" => "__builtin_ia32_vcvttps2dqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttps2ibs128" => "__builtin_ia32_vcvttps2ibs128_mask",
-    "llvm.x86.avx10.mask.vcvttps2ibs256" => "__builtin_ia32_vcvttps2ibs256_mask",
-    "llvm.x86.avx10.mask.vcvttps2ibs512" => "__builtin_ia32_vcvttps2ibs512_mask",
-    "llvm.x86.avx10.mask.vcvttps2iubs128" => "__builtin_ia32_vcvttps2iubs128_mask",
-    "llvm.x86.avx10.mask.vcvttps2iubs256" => "__builtin_ia32_vcvttps2iubs256_mask",
-    "llvm.x86.avx10.mask.vcvttps2iubs512" => "__builtin_ia32_vcvttps2iubs512_mask",
-    "llvm.x86.avx10.mask.vcvttps2qqs.128" => "__builtin_ia32_vcvttps2qqs128_mask",
-    "llvm.x86.avx10.mask.vcvttps2qqs.256" => "__builtin_ia32_vcvttps2qqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2qqs.round.512" => "__builtin_ia32_vcvttps2qqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttps2udqs.128" => "__builtin_ia32_vcvttps2udqs128_mask",
-    "llvm.x86.avx10.mask.vcvttps2udqs.256" => "__builtin_ia32_vcvttps2udqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2udqs.round.512" => "__builtin_ia32_vcvttps2udqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttps2uqqs.128" => "__builtin_ia32_vcvttps2uqqs128_mask",
-    "llvm.x86.avx10.mask.vcvttps2uqqs.256" => "__builtin_ia32_vcvttps2uqqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2uqqs.round.512" => "__builtin_ia32_vcvttps2uqqs512_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxpd.round" => "__builtin_ia32_vminmaxpd512_round_mask",
-    "llvm.x86.avx10.mask.vminmaxpd128" => "__builtin_ia32_vminmaxpd128_mask",
-    "llvm.x86.avx10.mask.vminmaxpd256" => "__builtin_ia32_vminmaxpd256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxph.round" => "__builtin_ia32_vminmaxph512_round_mask",
-    "llvm.x86.avx10.mask.vminmaxph128" => "__builtin_ia32_vminmaxph128_mask",
-    "llvm.x86.avx10.mask.vminmaxph256" => "__builtin_ia32_vminmaxph256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxps.round" => "__builtin_ia32_vminmaxps512_round_mask",
-    "llvm.x86.avx10.mask.vminmaxps128" => "__builtin_ia32_vminmaxps128_mask",
-    "llvm.x86.avx10.mask.vminmaxps256" => "__builtin_ia32_vminmaxps256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxsd.round" => "__builtin_ia32_vminmaxsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxsh.round" => "__builtin_ia32_vminmaxsh_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxss.round" => "__builtin_ia32_vminmaxss_round_mask",
-    "llvm.x86.avx10.vaddbf16128" => "__builtin_ia32_vaddbf16128",
-    "llvm.x86.avx10.vaddbf16256" => "__builtin_ia32_vaddbf16256",
-    "llvm.x86.avx10.vaddbf16512" => "__builtin_ia32_vaddbf16512",
-    "llvm.x86.avx10.vaddpd256" => "__builtin_ia32_vaddpd256_round",
-    "llvm.x86.avx10.vaddph256" => "__builtin_ia32_vaddph256_round",
-    "llvm.x86.avx10.vaddps256" => "__builtin_ia32_vaddps256_round",
-    "llvm.x86.avx10.vcomisbf16eq" => "__builtin_ia32_vcomisbf16eq",
-    "llvm.x86.avx10.vcomisbf16ge" => "__builtin_ia32_vcomisbf16ge",
-    "llvm.x86.avx10.vcomisbf16gt" => "__builtin_ia32_vcomisbf16gt",
-    "llvm.x86.avx10.vcomisbf16le" => "__builtin_ia32_vcomisbf16le",
-    "llvm.x86.avx10.vcomisbf16lt" => "__builtin_ia32_vcomisbf16lt",
-    "llvm.x86.avx10.vcomisbf16neq" => "__builtin_ia32_vcomisbf16neq",
-    "llvm.x86.avx10.vcvt2ph2bf8128" => "__builtin_ia32_vcvt2ph2bf8_128",
-    "llvm.x86.avx10.vcvt2ph2bf8256" => "__builtin_ia32_vcvt2ph2bf8_256",
-    "llvm.x86.avx10.vcvt2ph2bf8512" => "__builtin_ia32_vcvt2ph2bf8_512",
-    "llvm.x86.avx10.vcvt2ph2bf8s128" => "__builtin_ia32_vcvt2ph2bf8s_128",
-    "llvm.x86.avx10.vcvt2ph2bf8s256" => "__builtin_ia32_vcvt2ph2bf8s_256",
-    "llvm.x86.avx10.vcvt2ph2bf8s512" => "__builtin_ia32_vcvt2ph2bf8s_512",
-    "llvm.x86.avx10.vcvt2ph2hf8128" => "__builtin_ia32_vcvt2ph2hf8_128",
-    "llvm.x86.avx10.vcvt2ph2hf8256" => "__builtin_ia32_vcvt2ph2hf8_256",
-    "llvm.x86.avx10.vcvt2ph2hf8512" => "__builtin_ia32_vcvt2ph2hf8_512",
-    "llvm.x86.avx10.vcvt2ph2hf8s128" => "__builtin_ia32_vcvt2ph2hf8s_128",
-    "llvm.x86.avx10.vcvt2ph2hf8s256" => "__builtin_ia32_vcvt2ph2hf8s_256",
-    "llvm.x86.avx10.vcvt2ph2hf8s512" => "__builtin_ia32_vcvt2ph2hf8s_512",
-    "llvm.x86.avx10.vcvtbf162ibs128" => "__builtin_ia32_vcvtbf162ibs128",
-    "llvm.x86.avx10.vcvtbf162ibs256" => "__builtin_ia32_vcvtbf162ibs256",
-    "llvm.x86.avx10.vcvtbf162ibs512" => "__builtin_ia32_vcvtbf162ibs512",
-    "llvm.x86.avx10.vcvtbf162iubs128" => "__builtin_ia32_vcvtbf162iubs128",
-    "llvm.x86.avx10.vcvtbf162iubs256" => "__builtin_ia32_vcvtbf162iubs256",
-    "llvm.x86.avx10.vcvtbf162iubs512" => "__builtin_ia32_vcvtbf162iubs512",
-    "llvm.x86.avx10.vcvttbf162ibs128" => "__builtin_ia32_vcvttbf162ibs128",
-    "llvm.x86.avx10.vcvttbf162ibs256" => "__builtin_ia32_vcvttbf162ibs256",
-    "llvm.x86.avx10.vcvttbf162ibs512" => "__builtin_ia32_vcvttbf162ibs512",
-    "llvm.x86.avx10.vcvttbf162iubs128" => "__builtin_ia32_vcvttbf162iubs128",
-    "llvm.x86.avx10.vcvttbf162iubs256" => "__builtin_ia32_vcvttbf162iubs256",
-    "llvm.x86.avx10.vcvttbf162iubs512" => "__builtin_ia32_vcvttbf162iubs512",
-    "llvm.x86.avx10.vcvttsd2sis" => "__builtin_ia32_vcvttsd2sis32",
-    "llvm.x86.avx10.vcvttsd2sis64" => "__builtin_ia32_vcvttsd2sis64",
-    "llvm.x86.avx10.vcvttsd2usis" => "__builtin_ia32_vcvttsd2usis32",
-    "llvm.x86.avx10.vcvttsd2usis64" => "__builtin_ia32_vcvttsd2usis64",
-    "llvm.x86.avx10.vcvttss2sis" => "__builtin_ia32_vcvttss2sis32",
-    "llvm.x86.avx10.vcvttss2sis64" => "__builtin_ia32_vcvttss2sis64",
-    "llvm.x86.avx10.vcvttss2usis" => "__builtin_ia32_vcvttss2usis32",
-    "llvm.x86.avx10.vcvttss2usis64" => "__builtin_ia32_vcvttss2usis64",
-    "llvm.x86.avx10.vdivbf16128" => "__builtin_ia32_vdivbf16128",
-    "llvm.x86.avx10.vdivbf16256" => "__builtin_ia32_vdivbf16256",
-    "llvm.x86.avx10.vdivbf16512" => "__builtin_ia32_vdivbf16512",
-    "llvm.x86.avx10.vdpphps.128" => "__builtin_ia32_vdpphps128",
-    "llvm.x86.avx10.vdpphps.256" => "__builtin_ia32_vdpphps256",
-    "llvm.x86.avx10.vdpphps.512" => "__builtin_ia32_vdpphps512",
-    "llvm.x86.avx10.vfmadd132bf16128" => "__builtin_ia32_vfmadd132bf16128",
-    "llvm.x86.avx10.vfmadd132bf16256" => "__builtin_ia32_vfmadd132bf16256",
-    "llvm.x86.avx10.vfmadd132bf16512" => "__builtin_ia32_vfmadd132bf16512",
-    "llvm.x86.avx10.vfmadd213bf16128" => "__builtin_ia32_vfmadd213bf16128",
-    "llvm.x86.avx10.vfmadd213bf16256" => "__builtin_ia32_vfmadd213bf16256",
-    "llvm.x86.avx10.vfmadd231bf16128" => "__builtin_ia32_vfmadd231bf16128",
-    "llvm.x86.avx10.vfmadd231bf16256" => "__builtin_ia32_vfmadd231bf16256",
-    "llvm.x86.avx10.vfmadd231bf16512" => "__builtin_ia32_vfmadd231bf16512",
-    "llvm.x86.avx10.vfmsub132bf16128" => "__builtin_ia32_vfmsub132bf16128",
-    "llvm.x86.avx10.vfmsub132bf16256" => "__builtin_ia32_vfmsub132bf16256",
-    "llvm.x86.avx10.vfmsub132bf16512" => "__builtin_ia32_vfmsub132bf16512",
-    "llvm.x86.avx10.vfmsub213bf16128" => "__builtin_ia32_vfmsub213bf16128",
-    "llvm.x86.avx10.vfmsub213bf16256" => "__builtin_ia32_vfmsub213bf16256",
-    "llvm.x86.avx10.vfmsub213bf16512" => "__builtin_ia32_vfmsub213bf16512",
-    "llvm.x86.avx10.vfmsub231bf16128" => "__builtin_ia32_vfmsub231bf16128",
-    "llvm.x86.avx10.vfmsub231bf16256" => "__builtin_ia32_vfmsub231bf16256",
-    "llvm.x86.avx10.vfmsub231bf16512" => "__builtin_ia32_vfmsub231bf16512",
-    "llvm.x86.avx10.vfnmadd132bf16128" => "__builtin_ia32_vfnmadd132bf16128",
-    "llvm.x86.avx10.vfnmadd132bf16256" => "__builtin_ia32_vfnmadd132bf16256",
-    "llvm.x86.avx10.vfnmadd132bf16512" => "__builtin_ia32_vfnmadd132bf16512",
-    "llvm.x86.avx10.vfnmadd213bf16128" => "__builtin_ia32_vfnmadd213bf16128",
-    "llvm.x86.avx10.vfnmadd213bf16256" => "__builtin_ia32_vfnmadd213bf16256",
-    "llvm.x86.avx10.vfnmadd213bf16512" => "__builtin_ia32_vfnmadd213bf16512",
-    "llvm.x86.avx10.vfnmadd231bf16128" => "__builtin_ia32_vfnmadd231bf16128",
-    "llvm.x86.avx10.vfnmadd231bf16256" => "__builtin_ia32_vfnmadd231bf16256",
-    "llvm.x86.avx10.vfnmadd231bf16512" => "__builtin_ia32_vfnmadd231bf16512",
-    "llvm.x86.avx10.vfnmsub132bf16128" => "__builtin_ia32_vfnmsub132bf16128",
-    "llvm.x86.avx10.vfnmsub132bf16256" => "__builtin_ia32_vfnmsub132bf16256",
-    "llvm.x86.avx10.vfnmsub132bf16512" => "__builtin_ia32_vfnmsub132bf16512",
-    "llvm.x86.avx10.vfnmsub213bf16128" => "__builtin_ia32_vfnmsub213bf16128",
-    "llvm.x86.avx10.vfnmsub213bf16256" => "__builtin_ia32_vfnmsub213bf16256",
-    "llvm.x86.avx10.vfnmsub213bf16512" => "__builtin_ia32_vfnmsub213bf16512",
-    "llvm.x86.avx10.vfnmsub231bf16128" => "__builtin_ia32_vfnmsub231bf16128",
-    "llvm.x86.avx10.vfnmsub231bf16256" => "__builtin_ia32_vfnmsub231bf16256",
-    "llvm.x86.avx10.vfnmsub231bf16512" => "__builtin_ia32_vfnmsub231bf16512",
-    "llvm.x86.avx10.vmaxbf16128" => "__builtin_ia32_vmaxbf16128",
-    "llvm.x86.avx10.vmaxbf16256" => "__builtin_ia32_vmaxbf16256",
-    "llvm.x86.avx10.vmaxbf16512" => "__builtin_ia32_vmaxbf16512",
-    "llvm.x86.avx10.vminbf16128" => "__builtin_ia32_vminbf16128",
-    "llvm.x86.avx10.vminbf16256" => "__builtin_ia32_vminbf16256",
-    "llvm.x86.avx10.vminbf16512" => "__builtin_ia32_vminbf16512",
-    "llvm.x86.avx10.vminmaxbf16128" => "__builtin_ia32_vminmaxbf16128",
-    "llvm.x86.avx10.vminmaxbf16256" => "__builtin_ia32_vminmaxbf16256",
-    "llvm.x86.avx10.vminmaxbf16512" => "__builtin_ia32_vminmaxbf16512",
-    "llvm.x86.avx10.vminmaxpd128" => "__builtin_ia32_vminmaxpd128",
-    "llvm.x86.avx10.vminmaxpd256" => "__builtin_ia32_vminmaxpd256",
-    "llvm.x86.avx10.vminmaxph128" => "__builtin_ia32_vminmaxph128",
-    "llvm.x86.avx10.vminmaxph256" => "__builtin_ia32_vminmaxph256",
-    "llvm.x86.avx10.vminmaxps128" => "__builtin_ia32_vminmaxps128",
-    "llvm.x86.avx10.vminmaxps256" => "__builtin_ia32_vminmaxps256",
-    "llvm.x86.avx10.vmovrsb128" => "__builtin_ia32_vmovrsb128",
-    "llvm.x86.avx10.vmovrsb256" => "__builtin_ia32_vmovrsb256",
-    "llvm.x86.avx10.vmovrsb512" => "__builtin_ia32_vmovrsb512",
-    "llvm.x86.avx10.vmovrsd128" => "__builtin_ia32_vmovrsd128",
-    "llvm.x86.avx10.vmovrsd256" => "__builtin_ia32_vmovrsd256",
-    "llvm.x86.avx10.vmovrsd512" => "__builtin_ia32_vmovrsd512",
-    "llvm.x86.avx10.vmovrsq128" => "__builtin_ia32_vmovrsq128",
-    "llvm.x86.avx10.vmovrsq256" => "__builtin_ia32_vmovrsq256",
-    "llvm.x86.avx10.vmovrsq512" => "__builtin_ia32_vmovrsq512",
-    "llvm.x86.avx10.vmovrsw128" => "__builtin_ia32_vmovrsw128",
-    "llvm.x86.avx10.vmovrsw256" => "__builtin_ia32_vmovrsw256",
-    "llvm.x86.avx10.vmovrsw512" => "__builtin_ia32_vmovrsw512",
-    "llvm.x86.avx10.vmpsadbw.512" => "__builtin_ia32_mpsadbw512",
-    "llvm.x86.avx10.vmulbf16128" => "__builtin_ia32_vmulbf16128",
-    "llvm.x86.avx10.vmulbf16256" => "__builtin_ia32_vmulbf16256",
-    "llvm.x86.avx10.vmulbf16512" => "__builtin_ia32_vmulbf16512",
-    "llvm.x86.avx10.vpdpbssd.512" => "__builtin_ia32_vpdpbssd512",
-    "llvm.x86.avx10.vpdpbssds.512" => "__builtin_ia32_vpdpbssds512",
-    "llvm.x86.avx10.vpdpbsud.512" => "__builtin_ia32_vpdpbsud512",
-    "llvm.x86.avx10.vpdpbsuds.512" => "__builtin_ia32_vpdpbsuds512",
-    "llvm.x86.avx10.vpdpbuud.512" => "__builtin_ia32_vpdpbuud512",
-    "llvm.x86.avx10.vpdpbuuds.512" => "__builtin_ia32_vpdpbuuds512",
-    "llvm.x86.avx10.vpdpwsud.512" => "__builtin_ia32_vpdpwsud512",
-    "llvm.x86.avx10.vpdpwsuds.512" => "__builtin_ia32_vpdpwsuds512",
-    "llvm.x86.avx10.vpdpwusd.512" => "__builtin_ia32_vpdpwusd512",
-    "llvm.x86.avx10.vpdpwusds.512" => "__builtin_ia32_vpdpwusds512",
-    "llvm.x86.avx10.vpdpwuud.512" => "__builtin_ia32_vpdpwuud512",
-    "llvm.x86.avx10.vpdpwuuds.512" => "__builtin_ia32_vpdpwuuds512",
-    "llvm.x86.avx10.vsubbf16128" => "__builtin_ia32_vsubbf16128",
-    "llvm.x86.avx10.vsubbf16256" => "__builtin_ia32_vsubbf16256",
-    "llvm.x86.avx10.vsubbf16512" => "__builtin_ia32_vsubbf16512",
-    "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gatherd_d",
-    "llvm.x86.avx2.gather.d.d.256" => "__builtin_ia32_gatherd_d256",
-    "llvm.x86.avx2.gather.d.pd" => "__builtin_ia32_gatherd_pd",
-    "llvm.x86.avx2.gather.d.pd.256" => "__builtin_ia32_gatherd_pd256",
-    "llvm.x86.avx2.gather.d.ps" => "__builtin_ia32_gatherd_ps",
-    "llvm.x86.avx2.gather.d.ps.256" => "__builtin_ia32_gatherd_ps256",
-    "llvm.x86.avx2.gather.d.q" => "__builtin_ia32_gatherd_q",
-    "llvm.x86.avx2.gather.d.q.256" => "__builtin_ia32_gatherd_q256",
-    "llvm.x86.avx2.gather.q.d" => "__builtin_ia32_gatherq_d",
-    "llvm.x86.avx2.gather.q.d.256" => "__builtin_ia32_gatherq_d256",
-    "llvm.x86.avx2.gather.q.pd" => "__builtin_ia32_gatherq_pd",
-    "llvm.x86.avx2.gather.q.pd.256" => "__builtin_ia32_gatherq_pd256",
-    "llvm.x86.avx2.gather.q.ps" => "__builtin_ia32_gatherq_ps",
-    "llvm.x86.avx2.gather.q.ps.256" => "__builtin_ia32_gatherq_ps256",
-    "llvm.x86.avx2.gather.q.q" => "__builtin_ia32_gatherq_q",
-    "llvm.x86.avx2.gather.q.q.256" => "__builtin_ia32_gatherq_q256",
-    "llvm.x86.avx2.maskload.d" => "__builtin_ia32_maskloadd",
-    "llvm.x86.avx2.maskload.d.256" => "__builtin_ia32_maskloadd256",
-    "llvm.x86.avx2.maskload.q" => "__builtin_ia32_maskloadq",
-    "llvm.x86.avx2.maskload.q.256" => "__builtin_ia32_maskloadq256",
-    "llvm.x86.avx2.maskstore.d" => "__builtin_ia32_maskstored",
-    "llvm.x86.avx2.maskstore.d.256" => "__builtin_ia32_maskstored256",
-    "llvm.x86.avx2.maskstore.q" => "__builtin_ia32_maskstoreq",
-    "llvm.x86.avx2.maskstore.q.256" => "__builtin_ia32_maskstoreq256",
-    "llvm.x86.avx2.movntdqa" => "__builtin_ia32_movntdqa256",
-    "llvm.x86.avx2.mpsadbw" => "__builtin_ia32_mpsadbw256",
-    "llvm.x86.avx2.pabs.b" => "__builtin_ia32_pabsb256",
-    "llvm.x86.avx2.pabs.d" => "__builtin_ia32_pabsd256",
-    "llvm.x86.avx2.pabs.w" => "__builtin_ia32_pabsw256",
-    "llvm.x86.avx2.packssdw" => "__builtin_ia32_packssdw256",
-    "llvm.x86.avx2.packsswb" => "__builtin_ia32_packsswb256",
-    "llvm.x86.avx2.packusdw" => "__builtin_ia32_packusdw256",
-    "llvm.x86.avx2.packuswb" => "__builtin_ia32_packuswb256",
-    "llvm.x86.avx2.padds.b" => "__builtin_ia32_paddsb256",
-    "llvm.x86.avx2.padds.w" => "__builtin_ia32_paddsw256",
-    "llvm.x86.avx2.paddus.b" => "__builtin_ia32_paddusb256",
-    "llvm.x86.avx2.paddus.w" => "__builtin_ia32_paddusw256",
-    "llvm.x86.avx2.pavg.b" => "__builtin_ia32_pavgb256",
-    "llvm.x86.avx2.pavg.w" => "__builtin_ia32_pavgw256",
-    "llvm.x86.avx2.pblendd.128" => "__builtin_ia32_pblendd128",
-    "llvm.x86.avx2.pblendd.256" => "__builtin_ia32_pblendd256",
-    "llvm.x86.avx2.pblendvb" => "__builtin_ia32_pblendvb256",
-    "llvm.x86.avx2.pblendw" => "__builtin_ia32_pblendw256",
-    "llvm.x86.avx2.pbroadcastb.128" => "__builtin_ia32_pbroadcastb128",
-    "llvm.x86.avx2.pbroadcastb.256" => "__builtin_ia32_pbroadcastb256",
-    "llvm.x86.avx2.pbroadcastd.128" => "__builtin_ia32_pbroadcastd128",
-    "llvm.x86.avx2.pbroadcastd.256" => "__builtin_ia32_pbroadcastd256",
-    "llvm.x86.avx2.pbroadcastq.128" => "__builtin_ia32_pbroadcastq128",
-    "llvm.x86.avx2.pbroadcastq.256" => "__builtin_ia32_pbroadcastq256",
-    "llvm.x86.avx2.pbroadcastw.128" => "__builtin_ia32_pbroadcastw128",
-    "llvm.x86.avx2.pbroadcastw.256" => "__builtin_ia32_pbroadcastw256",
-    "llvm.x86.avx2.permd" => "__builtin_ia32_permvarsi256",
-    "llvm.x86.avx2.permps" => "__builtin_ia32_permvarsf256",
-    "llvm.x86.avx2.phadd.d" => "__builtin_ia32_phaddd256",
-    "llvm.x86.avx2.phadd.sw" => "__builtin_ia32_phaddsw256",
-    "llvm.x86.avx2.phadd.w" => "__builtin_ia32_phaddw256",
-    "llvm.x86.avx2.phsub.d" => "__builtin_ia32_phsubd256",
-    "llvm.x86.avx2.phsub.sw" => "__builtin_ia32_phsubsw256",
-    "llvm.x86.avx2.phsub.w" => "__builtin_ia32_phsubw256",
-    "llvm.x86.avx2.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw256",
-    "llvm.x86.avx2.pmadd.wd" => "__builtin_ia32_pmaddwd256",
-    "llvm.x86.avx2.pmaxs.b" => "__builtin_ia32_pmaxsb256",
-    "llvm.x86.avx2.pmaxs.d" => "__builtin_ia32_pmaxsd256",
-    "llvm.x86.avx2.pmaxs.w" => "__builtin_ia32_pmaxsw256",
-    "llvm.x86.avx2.pmaxu.b" => "__builtin_ia32_pmaxub256",
-    "llvm.x86.avx2.pmaxu.d" => "__builtin_ia32_pmaxud256",
-    "llvm.x86.avx2.pmaxu.w" => "__builtin_ia32_pmaxuw256",
-    "llvm.x86.avx2.pmins.b" => "__builtin_ia32_pminsb256",
-    "llvm.x86.avx2.pmins.d" => "__builtin_ia32_pminsd256",
-    "llvm.x86.avx2.pmins.w" => "__builtin_ia32_pminsw256",
-    "llvm.x86.avx2.pminu.b" => "__builtin_ia32_pminub256",
-    "llvm.x86.avx2.pminu.d" => "__builtin_ia32_pminud256",
-    "llvm.x86.avx2.pminu.w" => "__builtin_ia32_pminuw256",
-    "llvm.x86.avx2.pmovmskb" => "__builtin_ia32_pmovmskb256",
-    "llvm.x86.avx2.pmovsxbd" => "__builtin_ia32_pmovsxbd256",
-    "llvm.x86.avx2.pmovsxbq" => "__builtin_ia32_pmovsxbq256",
-    "llvm.x86.avx2.pmovsxbw" => "__builtin_ia32_pmovsxbw256",
-    "llvm.x86.avx2.pmovsxdq" => "__builtin_ia32_pmovsxdq256",
-    "llvm.x86.avx2.pmovsxwd" => "__builtin_ia32_pmovsxwd256",
-    "llvm.x86.avx2.pmovsxwq" => "__builtin_ia32_pmovsxwq256",
-    "llvm.x86.avx2.pmovzxbd" => "__builtin_ia32_pmovzxbd256",
-    "llvm.x86.avx2.pmovzxbq" => "__builtin_ia32_pmovzxbq256",
-    "llvm.x86.avx2.pmovzxbw" => "__builtin_ia32_pmovzxbw256",
-    "llvm.x86.avx2.pmovzxdq" => "__builtin_ia32_pmovzxdq256",
-    "llvm.x86.avx2.pmovzxwd" => "__builtin_ia32_pmovzxwd256",
-    "llvm.x86.avx2.pmovzxwq" => "__builtin_ia32_pmovzxwq256",
-    "llvm.x86.avx2.pmul.dq" => "__builtin_ia32_pmuldq256",
-    "llvm.x86.avx2.pmul.hr.sw" => "__builtin_ia32_pmulhrsw256",
-    "llvm.x86.avx2.pmulh.w" => "__builtin_ia32_pmulhw256",
-    "llvm.x86.avx2.pmulhu.w" => "__builtin_ia32_pmulhuw256",
-    "llvm.x86.avx2.pmulu.dq" => "__builtin_ia32_pmuludq256",
-    "llvm.x86.avx2.psad.bw" => "__builtin_ia32_psadbw256",
-    "llvm.x86.avx2.pshuf.b" => "__builtin_ia32_pshufb256",
-    "llvm.x86.avx2.psign.b" => "__builtin_ia32_psignb256",
-    "llvm.x86.avx2.psign.d" => "__builtin_ia32_psignd256",
-    "llvm.x86.avx2.psign.w" => "__builtin_ia32_psignw256",
-    "llvm.x86.avx2.psll.d" => "__builtin_ia32_pslld256",
-    "llvm.x86.avx2.psll.dq" => "__builtin_ia32_pslldqi256",
-    "llvm.x86.avx2.psll.dq.bs" => "__builtin_ia32_pslldqi256_byteshift",
-    "llvm.x86.avx2.psll.q" => "__builtin_ia32_psllq256",
-    "llvm.x86.avx2.psll.w" => "__builtin_ia32_psllw256",
-    "llvm.x86.avx2.pslli.d" => "__builtin_ia32_pslldi256",
-    "llvm.x86.avx2.pslli.q" => "__builtin_ia32_psllqi256",
-    "llvm.x86.avx2.pslli.w" => "__builtin_ia32_psllwi256",
-    "llvm.x86.avx2.psllv.d" => "__builtin_ia32_psllv4si",
-    "llvm.x86.avx2.psllv.d.256" => "__builtin_ia32_psllv8si",
-    "llvm.x86.avx2.psllv.q" => "__builtin_ia32_psllv2di",
-    "llvm.x86.avx2.psllv.q.256" => "__builtin_ia32_psllv4di",
-    "llvm.x86.avx2.psra.d" => "__builtin_ia32_psrad256",
-    "llvm.x86.avx2.psra.w" => "__builtin_ia32_psraw256",
-    "llvm.x86.avx2.psrai.d" => "__builtin_ia32_psradi256",
-    "llvm.x86.avx2.psrai.w" => "__builtin_ia32_psrawi256",
-    "llvm.x86.avx2.psrav.d" => "__builtin_ia32_psrav4si",
-    "llvm.x86.avx2.psrav.d.256" => "__builtin_ia32_psrav8si",
-    "llvm.x86.avx2.psrl.d" => "__builtin_ia32_psrld256",
-    "llvm.x86.avx2.psrl.dq" => "__builtin_ia32_psrldqi256",
-    "llvm.x86.avx2.psrl.dq.bs" => "__builtin_ia32_psrldqi256_byteshift",
-    "llvm.x86.avx2.psrl.q" => "__builtin_ia32_psrlq256",
-    "llvm.x86.avx2.psrl.w" => "__builtin_ia32_psrlw256",
-    "llvm.x86.avx2.psrli.d" => "__builtin_ia32_psrldi256",
-    "llvm.x86.avx2.psrli.q" => "__builtin_ia32_psrlqi256",
-    "llvm.x86.avx2.psrli.w" => "__builtin_ia32_psrlwi256",
-    "llvm.x86.avx2.psrlv.d" => "__builtin_ia32_psrlv4si",
-    "llvm.x86.avx2.psrlv.d.256" => "__builtin_ia32_psrlv8si",
-    "llvm.x86.avx2.psrlv.q" => "__builtin_ia32_psrlv2di",
-    "llvm.x86.avx2.psrlv.q.256" => "__builtin_ia32_psrlv4di",
-    "llvm.x86.avx2.psubs.b" => "__builtin_ia32_psubsb256",
-    "llvm.x86.avx2.psubs.w" => "__builtin_ia32_psubsw256",
-    "llvm.x86.avx2.psubus.b" => "__builtin_ia32_psubusb256",
-    "llvm.x86.avx2.psubus.w" => "__builtin_ia32_psubusw256",
-    "llvm.x86.avx2.vbroadcast.sd.pd.256" => "__builtin_ia32_vbroadcastsd_pd256",
-    "llvm.x86.avx2.vbroadcast.ss.ps" => "__builtin_ia32_vbroadcastss_ps",
-    "llvm.x86.avx2.vbroadcast.ss.ps.256" => "__builtin_ia32_vbroadcastss_ps256",
-    "llvm.x86.avx2.vextracti128" => "__builtin_ia32_extract128i256",
-    "llvm.x86.avx2.vinserti128" => "__builtin_ia32_insert128i256",
-    "llvm.x86.avx2.vpdpbssd.128" => "__builtin_ia32_vpdpbssd128",
-    "llvm.x86.avx2.vpdpbssd.256" => "__builtin_ia32_vpdpbssd256",
-    "llvm.x86.avx2.vpdpbssds.128" => "__builtin_ia32_vpdpbssds128",
-    "llvm.x86.avx2.vpdpbssds.256" => "__builtin_ia32_vpdpbssds256",
-    "llvm.x86.avx2.vpdpbsud.128" => "__builtin_ia32_vpdpbsud128",
-    "llvm.x86.avx2.vpdpbsud.256" => "__builtin_ia32_vpdpbsud256",
-    "llvm.x86.avx2.vpdpbsuds.128" => "__builtin_ia32_vpdpbsuds128",
-    "llvm.x86.avx2.vpdpbsuds.256" => "__builtin_ia32_vpdpbsuds256",
-    "llvm.x86.avx2.vpdpbuud.128" => "__builtin_ia32_vpdpbuud128",
-    "llvm.x86.avx2.vpdpbuud.256" => "__builtin_ia32_vpdpbuud256",
-    "llvm.x86.avx2.vpdpbuuds.128" => "__builtin_ia32_vpdpbuuds128",
-    "llvm.x86.avx2.vpdpbuuds.256" => "__builtin_ia32_vpdpbuuds256",
-    "llvm.x86.avx2.vpdpwsud.128" => "__builtin_ia32_vpdpwsud128",
-    "llvm.x86.avx2.vpdpwsud.256" => "__builtin_ia32_vpdpwsud256",
-    "llvm.x86.avx2.vpdpwsuds.128" => "__builtin_ia32_vpdpwsuds128",
-    "llvm.x86.avx2.vpdpwsuds.256" => "__builtin_ia32_vpdpwsuds256",
-    "llvm.x86.avx2.vpdpwusd.128" => "__builtin_ia32_vpdpwusd128",
-    "llvm.x86.avx2.vpdpwusd.256" => "__builtin_ia32_vpdpwusd256",
-    "llvm.x86.avx2.vpdpwusds.128" => "__builtin_ia32_vpdpwusds128",
-    "llvm.x86.avx2.vpdpwusds.256" => "__builtin_ia32_vpdpwusds256",
-    "llvm.x86.avx2.vpdpwuud.128" => "__builtin_ia32_vpdpwuud128",
-    "llvm.x86.avx2.vpdpwuud.256" => "__builtin_ia32_vpdpwuud256",
-    "llvm.x86.avx2.vpdpwuuds.128" => "__builtin_ia32_vpdpwuuds128",
-    "llvm.x86.avx2.vpdpwuuds.256" => "__builtin_ia32_vpdpwuuds256",
-    "llvm.x86.avx2.vperm2i128" => "__builtin_ia32_permti256",
-    "llvm.x86.avx512.add.pd.512" => "__builtin_ia32_addpd512",
-    "llvm.x86.avx512.add.ps.512" => "__builtin_ia32_addps512",
-    "llvm.x86.avx512.broadcastmb.128" => "__builtin_ia32_broadcastmb128",
-    "llvm.x86.avx512.broadcastmb.256" => "__builtin_ia32_broadcastmb256",
-    "llvm.x86.avx512.broadcastmb.512" => "__builtin_ia32_broadcastmb512",
-    "llvm.x86.avx512.broadcastmw.128" => "__builtin_ia32_broadcastmw128",
-    "llvm.x86.avx512.broadcastmw.256" => "__builtin_ia32_broadcastmw256",
-    "llvm.x86.avx512.broadcastmw.512" => "__builtin_ia32_broadcastmw512",
-    "llvm.x86.avx512.conflict.d.128" => "__builtin_ia32_vpconflictsi_128",
-    "llvm.x86.avx512.conflict.d.256" => "__builtin_ia32_vpconflictsi_256",
-    "llvm.x86.avx512.conflict.d.512" => "__builtin_ia32_vpconflictsi_512",
-    "llvm.x86.avx512.conflict.q.128" => "__builtin_ia32_vpconflictdi_128",
-    "llvm.x86.avx512.conflict.q.256" => "__builtin_ia32_vpconflictdi_256",
-    "llvm.x86.avx512.conflict.q.512" => "__builtin_ia32_vpconflictdi_512",
-    "llvm.x86.avx512.cvtb2mask.128" => "__builtin_ia32_cvtb2mask128",
-    "llvm.x86.avx512.cvtb2mask.256" => "__builtin_ia32_cvtb2mask256",
-    "llvm.x86.avx512.cvtb2mask.512" => "__builtin_ia32_cvtb2mask512",
-    "llvm.x86.avx512.cvtd2mask.128" => "__builtin_ia32_cvtd2mask128",
-    "llvm.x86.avx512.cvtd2mask.256" => "__builtin_ia32_cvtd2mask256",
-    "llvm.x86.avx512.cvtd2mask.512" => "__builtin_ia32_cvtd2mask512",
-    "llvm.x86.avx512.cvtmask2b.128" => "__builtin_ia32_cvtmask2b128",
-    "llvm.x86.avx512.cvtmask2b.256" => "__builtin_ia32_cvtmask2b256",
-    "llvm.x86.avx512.cvtmask2b.512" => "__builtin_ia32_cvtmask2b512",
-    "llvm.x86.avx512.cvtmask2d.128" => "__builtin_ia32_cvtmask2d128",
-    "llvm.x86.avx512.cvtmask2d.256" => "__builtin_ia32_cvtmask2d256",
-    "llvm.x86.avx512.cvtmask2d.512" => "__builtin_ia32_cvtmask2d512",
-    "llvm.x86.avx512.cvtmask2q.128" => "__builtin_ia32_cvtmask2q128",
-    "llvm.x86.avx512.cvtmask2q.256" => "__builtin_ia32_cvtmask2q256",
-    "llvm.x86.avx512.cvtmask2q.512" => "__builtin_ia32_cvtmask2q512",
-    "llvm.x86.avx512.cvtmask2w.128" => "__builtin_ia32_cvtmask2w128",
-    "llvm.x86.avx512.cvtmask2w.256" => "__builtin_ia32_cvtmask2w256",
-    "llvm.x86.avx512.cvtmask2w.512" => "__builtin_ia32_cvtmask2w512",
-    "llvm.x86.avx512.cvtq2mask.128" => "__builtin_ia32_cvtq2mask128",
-    "llvm.x86.avx512.cvtq2mask.256" => "__builtin_ia32_cvtq2mask256",
-    "llvm.x86.avx512.cvtq2mask.512" => "__builtin_ia32_cvtq2mask512",
-    "llvm.x86.avx512.cvtsd2usi" => "__builtin_ia32_cvtsd2usi",
-    "llvm.x86.avx512.cvtsd2usi64" => "__builtin_ia32_cvtsd2usi64",
-    "llvm.x86.avx512.cvtsi2sd32" => "__builtin_ia32_cvtsi2sd32",
-    "llvm.x86.avx512.cvtsi2sd64" => "__builtin_ia32_cvtsi2sd64",
-    "llvm.x86.avx512.cvtsi2ss32" => "__builtin_ia32_cvtsi2ss32",
-    "llvm.x86.avx512.cvtsi2ss64" => "__builtin_ia32_cvtsi2ss64",
-    "llvm.x86.avx512.cvtss2usi" => "__builtin_ia32_cvtss2usi",
-    "llvm.x86.avx512.cvtss2usi64" => "__builtin_ia32_cvtss2usi64",
-    "llvm.x86.avx512.cvttsd2si" => "__builtin_ia32_vcvttsd2si32",
-    "llvm.x86.avx512.cvttsd2si64" => "__builtin_ia32_vcvttsd2si64",
-    "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_vcvttsd2usi32",
-    // [DUPLICATE]: "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_cvttsd2usi",
-    "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_vcvttsd2usi64",
-    // [DUPLICATE]: "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_cvttsd2usi64",
-    "llvm.x86.avx512.cvttss2si" => "__builtin_ia32_vcvttss2si32",
-    "llvm.x86.avx512.cvttss2si64" => "__builtin_ia32_vcvttss2si64",
-    "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_vcvttss2usi32",
-    // [DUPLICATE]: "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_cvttss2usi",
-    "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_vcvttss2usi64",
-    // [DUPLICATE]: "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_cvttss2usi64",
-    "llvm.x86.avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd",
-    // [DUPLICATE]: "llvm.x86.avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd32",
-    "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss32",
-    // [DUPLICATE]: "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss",
-    "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi2sd64",
-    // [DUPLICATE]: "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi642sd",
-    "llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi2ss64",
-    // [DUPLICATE]: "llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi642ss",
-    "llvm.x86.avx512.cvtw2mask.128" => "__builtin_ia32_cvtw2mask128",
-    "llvm.x86.avx512.cvtw2mask.256" => "__builtin_ia32_cvtw2mask256",
-    "llvm.x86.avx512.cvtw2mask.512" => "__builtin_ia32_cvtw2mask512",
-    "llvm.x86.avx512.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128",
-    "llvm.x86.avx512.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256",
-    "llvm.x86.avx512.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512",
-    "llvm.x86.avx512.div.pd.512" => "__builtin_ia32_divpd512",
-    "llvm.x86.avx512.div.ps.512" => "__builtin_ia32_divps512",
-    "llvm.x86.avx512.exp2.pd" => "__builtin_ia32_exp2pd_mask",
-    "llvm.x86.avx512.exp2.ps" => "__builtin_ia32_exp2ps_mask",
-    "llvm.x86.avx512.gather.dpd.512" => "__builtin_ia32_gathersiv8df",
-    "llvm.x86.avx512.gather.dpi.512" => "__builtin_ia32_gathersiv16si",
-    "llvm.x86.avx512.gather.dpq.512" => "__builtin_ia32_gathersiv8di",
-    "llvm.x86.avx512.gather.dps.512" => "__builtin_ia32_gathersiv16sf",
-    "llvm.x86.avx512.gather.qpd.512" => "__builtin_ia32_gatherdiv8df",
-    "llvm.x86.avx512.gather.qpi.512" => "__builtin_ia32_gatherdiv16si",
-    "llvm.x86.avx512.gather.qpq.512" => "__builtin_ia32_gatherdiv8di",
-    "llvm.x86.avx512.gather.qps.512" => "__builtin_ia32_gatherdiv16sf",
-    "llvm.x86.avx512.gather3div2.df" => "__builtin_ia32_gather3div2df",
-    "llvm.x86.avx512.gather3div2.di" => "__builtin_ia32_gather3div2di",
-    "llvm.x86.avx512.gather3div4.df" => "__builtin_ia32_gather3div4df",
-    "llvm.x86.avx512.gather3div4.di" => "__builtin_ia32_gather3div4di",
-    "llvm.x86.avx512.gather3div4.sf" => "__builtin_ia32_gather3div4sf",
-    "llvm.x86.avx512.gather3div4.si" => "__builtin_ia32_gather3div4si",
-    "llvm.x86.avx512.gather3div8.sf" => "__builtin_ia32_gather3div8sf",
-    "llvm.x86.avx512.gather3div8.si" => "__builtin_ia32_gather3div8si",
-    "llvm.x86.avx512.gather3siv2.df" => "__builtin_ia32_gather3siv2df",
-    "llvm.x86.avx512.gather3siv2.di" => "__builtin_ia32_gather3siv2di",
-    "llvm.x86.avx512.gather3siv4.df" => "__builtin_ia32_gather3siv4df",
-    "llvm.x86.avx512.gather3siv4.di" => "__builtin_ia32_gather3siv4di",
-    "llvm.x86.avx512.gather3siv4.sf" => "__builtin_ia32_gather3siv4sf",
-    "llvm.x86.avx512.gather3siv4.si" => "__builtin_ia32_gather3siv4si",
-    "llvm.x86.avx512.gather3siv8.sf" => "__builtin_ia32_gather3siv8sf",
-    "llvm.x86.avx512.gather3siv8.si" => "__builtin_ia32_gather3siv8si",
-    "llvm.x86.avx512.gatherpf.dpd.512" => "__builtin_ia32_gatherpfdpd",
-    "llvm.x86.avx512.gatherpf.dps.512" => "__builtin_ia32_gatherpfdps",
-    "llvm.x86.avx512.gatherpf.qpd.512" => "__builtin_ia32_gatherpfqpd",
-    "llvm.x86.avx512.gatherpf.qps.512" => "__builtin_ia32_gatherpfqps",
-    "llvm.x86.avx512.kand.w" => "__builtin_ia32_kandhi",
-    "llvm.x86.avx512.kandn.w" => "__builtin_ia32_kandnhi",
-    "llvm.x86.avx512.knot.w" => "__builtin_ia32_knothi",
-    "llvm.x86.avx512.kor.w" => "__builtin_ia32_korhi",
-    "llvm.x86.avx512.kortestc.w" => "__builtin_ia32_kortestchi",
-    "llvm.x86.avx512.kortestz.w" => "__builtin_ia32_kortestzhi",
-    "llvm.x86.avx512.kunpck.bw" => "__builtin_ia32_kunpckhi",
-    "llvm.x86.avx512.kunpck.dq" => "__builtin_ia32_kunpckdi",
-    "llvm.x86.avx512.kunpck.wd" => "__builtin_ia32_kunpcksi",
-    "llvm.x86.avx512.kxnor.w" => "__builtin_ia32_kxnorhi",
-    "llvm.x86.avx512.kxor.w" => "__builtin_ia32_kxorhi",
-    "llvm.x86.avx512.mask.add.pd.128" => "__builtin_ia32_addpd128_mask",
-    "llvm.x86.avx512.mask.add.pd.256" => "__builtin_ia32_addpd256_mask",
-    "llvm.x86.avx512.mask.add.pd.512" => "__builtin_ia32_addpd512_mask",
-    "llvm.x86.avx512.mask.add.ps.128" => "__builtin_ia32_addps128_mask",
-    "llvm.x86.avx512.mask.add.ps.256" => "__builtin_ia32_addps256_mask",
-    "llvm.x86.avx512.mask.add.ps.512" => "__builtin_ia32_addps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.add.sd.round" => "__builtin_ia32_addsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.add.ss.round" => "__builtin_ia32_addss_round_mask",
-    "llvm.x86.avx512.mask.and.pd.128" => "__builtin_ia32_andpd128_mask",
-    "llvm.x86.avx512.mask.and.pd.256" => "__builtin_ia32_andpd256_mask",
-    "llvm.x86.avx512.mask.and.pd.512" => "__builtin_ia32_andpd512_mask",
-    "llvm.x86.avx512.mask.and.ps.128" => "__builtin_ia32_andps128_mask",
-    "llvm.x86.avx512.mask.and.ps.256" => "__builtin_ia32_andps256_mask",
-    "llvm.x86.avx512.mask.and.ps.512" => "__builtin_ia32_andps512_mask",
-    "llvm.x86.avx512.mask.andn.pd.128" => "__builtin_ia32_andnpd128_mask",
-    "llvm.x86.avx512.mask.andn.pd.256" => "__builtin_ia32_andnpd256_mask",
-    "llvm.x86.avx512.mask.andn.pd.512" => "__builtin_ia32_andnpd512_mask",
-    "llvm.x86.avx512.mask.andn.ps.128" => "__builtin_ia32_andnps128_mask",
-    "llvm.x86.avx512.mask.andn.ps.256" => "__builtin_ia32_andnps256_mask",
-    "llvm.x86.avx512.mask.andn.ps.512" => "__builtin_ia32_andnps512_mask",
-    "llvm.x86.avx512.mask.blend.d.512" => "__builtin_ia32_blendmd_512_mask",
-    "llvm.x86.avx512.mask.blend.pd.512" => "__builtin_ia32_blendmpd_512_mask",
-    "llvm.x86.avx512.mask.blend.ps.512" => "__builtin_ia32_blendmps_512_mask",
-    "llvm.x86.avx512.mask.blend.q.512" => "__builtin_ia32_blendmq_512_mask",
-    "llvm.x86.avx512.mask.broadcastf32x2.256" => "__builtin_ia32_broadcastf32x2_256_mask",
-    "llvm.x86.avx512.mask.broadcastf32x2.512" => "__builtin_ia32_broadcastf32x2_512_mask",
-    "llvm.x86.avx512.mask.broadcastf32x4.256" => "__builtin_ia32_broadcastf32x4_256_mask",
-    "llvm.x86.avx512.mask.broadcastf32x4.512" => "__builtin_ia32_broadcastf32x4_512",
-    "llvm.x86.avx512.mask.broadcastf32x8.512" => "__builtin_ia32_broadcastf32x8_512_mask",
-    "llvm.x86.avx512.mask.broadcastf64x2.256" => "__builtin_ia32_broadcastf64x2_256_mask",
-    "llvm.x86.avx512.mask.broadcastf64x2.512" => "__builtin_ia32_broadcastf64x2_512_mask",
-    "llvm.x86.avx512.mask.broadcastf64x4.512" => "__builtin_ia32_broadcastf64x4_512",
-    "llvm.x86.avx512.mask.broadcasti32x2.128" => "__builtin_ia32_broadcasti32x2_128_mask",
-    "llvm.x86.avx512.mask.broadcasti32x2.256" => "__builtin_ia32_broadcasti32x2_256_mask",
-    "llvm.x86.avx512.mask.broadcasti32x2.512" => "__builtin_ia32_broadcasti32x2_512_mask",
-    "llvm.x86.avx512.mask.broadcasti32x4.256" => "__builtin_ia32_broadcasti32x4_256_mask",
-    "llvm.x86.avx512.mask.broadcasti32x4.512" => "__builtin_ia32_broadcasti32x4_512",
-    "llvm.x86.avx512.mask.broadcasti32x8.512" => "__builtin_ia32_broadcasti32x8_512_mask",
-    "llvm.x86.avx512.mask.broadcasti64x2.256" => "__builtin_ia32_broadcasti64x2_256_mask",
-    "llvm.x86.avx512.mask.broadcasti64x2.512" => "__builtin_ia32_broadcasti64x2_512_mask",
-    "llvm.x86.avx512.mask.broadcasti64x4.512" => "__builtin_ia32_broadcasti64x4_512",
-    "llvm.x86.avx512.mask.cmp.pd.128" => "__builtin_ia32_cmppd128_mask",
-    "llvm.x86.avx512.mask.cmp.pd.256" => "__builtin_ia32_cmppd256_mask",
-    "llvm.x86.avx512.mask.cmp.pd.512" => "__builtin_ia32_cmppd512_mask",
-    "llvm.x86.avx512.mask.cmp.ps.128" => "__builtin_ia32_cmpps128_mask",
-    "llvm.x86.avx512.mask.cmp.ps.256" => "__builtin_ia32_cmpps256_mask",
-    "llvm.x86.avx512.mask.cmp.ps.512" => "__builtin_ia32_cmpps512_mask",
-    "llvm.x86.avx512.mask.cmp.sd" => "__builtin_ia32_cmpsd_mask",
-    "llvm.x86.avx512.mask.cmp.ss" => "__builtin_ia32_cmpss_mask",
-    "llvm.x86.avx512.mask.compress.d.128" => "__builtin_ia32_compresssi128_mask",
-    "llvm.x86.avx512.mask.compress.d.256" => "__builtin_ia32_compresssi256_mask",
-    "llvm.x86.avx512.mask.compress.d.512" => "__builtin_ia32_compresssi512_mask",
-    "llvm.x86.avx512.mask.compress.pd.128" => "__builtin_ia32_compressdf128_mask",
-    "llvm.x86.avx512.mask.compress.pd.256" => "__builtin_ia32_compressdf256_mask",
-    "llvm.x86.avx512.mask.compress.pd.512" => "__builtin_ia32_compressdf512_mask",
-    "llvm.x86.avx512.mask.compress.ps.128" => "__builtin_ia32_compresssf128_mask",
-    "llvm.x86.avx512.mask.compress.ps.256" => "__builtin_ia32_compresssf256_mask",
-    "llvm.x86.avx512.mask.compress.ps.512" => "__builtin_ia32_compresssf512_mask",
-    "llvm.x86.avx512.mask.compress.q.128" => "__builtin_ia32_compressdi128_mask",
-    "llvm.x86.avx512.mask.compress.q.256" => "__builtin_ia32_compressdi256_mask",
-    "llvm.x86.avx512.mask.compress.q.512" => "__builtin_ia32_compressdi512_mask",
-    "llvm.x86.avx512.mask.compress.store.d.128" => "__builtin_ia32_compressstoresi128_mask",
-    "llvm.x86.avx512.mask.compress.store.d.256" => "__builtin_ia32_compressstoresi256_mask",
-    "llvm.x86.avx512.mask.compress.store.d.512" => "__builtin_ia32_compressstoresi512_mask",
-    "llvm.x86.avx512.mask.compress.store.pd.128" => "__builtin_ia32_compressstoredf128_mask",
-    "llvm.x86.avx512.mask.compress.store.pd.256" => "__builtin_ia32_compressstoredf256_mask",
-    "llvm.x86.avx512.mask.compress.store.pd.512" => "__builtin_ia32_compressstoredf512_mask",
-    "llvm.x86.avx512.mask.compress.store.ps.128" => "__builtin_ia32_compressstoresf128_mask",
-    "llvm.x86.avx512.mask.compress.store.ps.256" => "__builtin_ia32_compressstoresf256_mask",
-    "llvm.x86.avx512.mask.compress.store.ps.512" => "__builtin_ia32_compressstoresf512_mask",
-    "llvm.x86.avx512.mask.compress.store.q.128" => "__builtin_ia32_compressstoredi128_mask",
-    "llvm.x86.avx512.mask.compress.store.q.256" => "__builtin_ia32_compressstoredi256_mask",
-    "llvm.x86.avx512.mask.compress.store.q.512" => "__builtin_ia32_compressstoredi512_mask",
-    "llvm.x86.avx512.mask.conflict.d.128" => "__builtin_ia32_vpconflictsi_128_mask",
-    "llvm.x86.avx512.mask.conflict.d.256" => "__builtin_ia32_vpconflictsi_256_mask",
-    "llvm.x86.avx512.mask.conflict.d.512" => "__builtin_ia32_vpconflictsi_512_mask",
-    "llvm.x86.avx512.mask.conflict.q.128" => "__builtin_ia32_vpconflictdi_128_mask",
-    "llvm.x86.avx512.mask.conflict.q.256" => "__builtin_ia32_vpconflictdi_256_mask",
-    "llvm.x86.avx512.mask.conflict.q.512" => "__builtin_ia32_vpconflictdi_512_mask",
-    "llvm.x86.avx512.mask.cvtdq2pd.128" => "__builtin_ia32_cvtdq2pd128_mask",
-    "llvm.x86.avx512.mask.cvtdq2pd.256" => "__builtin_ia32_cvtdq2pd256_mask",
-    "llvm.x86.avx512.mask.cvtdq2pd.512" => "__builtin_ia32_cvtdq2pd512_mask",
-    "llvm.x86.avx512.mask.cvtdq2ps.128" => "__builtin_ia32_cvtdq2ps128_mask",
-    "llvm.x86.avx512.mask.cvtdq2ps.256" => "__builtin_ia32_cvtdq2ps256_mask",
-    "llvm.x86.avx512.mask.cvtdq2ps.512" => "__builtin_ia32_cvtdq2ps512_mask",
-    "llvm.x86.avx512.mask.cvtpd2dq.128" => "__builtin_ia32_cvtpd2dq128_mask",
-    "llvm.x86.avx512.mask.cvtpd2dq.256" => "__builtin_ia32_cvtpd2dq256_mask",
-    "llvm.x86.avx512.mask.cvtpd2dq.512" => "__builtin_ia32_cvtpd2dq512_mask",
-    "llvm.x86.avx512.mask.cvtpd2ps" => "__builtin_ia32_cvtpd2ps_mask",
-    "llvm.x86.avx512.mask.cvtpd2ps.256" => "__builtin_ia32_cvtpd2ps256_mask",
-    "llvm.x86.avx512.mask.cvtpd2ps.512" => "__builtin_ia32_cvtpd2ps512_mask",
-    "llvm.x86.avx512.mask.cvtpd2qq.128" => "__builtin_ia32_cvtpd2qq128_mask",
-    "llvm.x86.avx512.mask.cvtpd2qq.256" => "__builtin_ia32_cvtpd2qq256_mask",
-    "llvm.x86.avx512.mask.cvtpd2qq.512" => "__builtin_ia32_cvtpd2qq512_mask",
-    "llvm.x86.avx512.mask.cvtpd2udq.128" => "__builtin_ia32_cvtpd2udq128_mask",
-    "llvm.x86.avx512.mask.cvtpd2udq.256" => "__builtin_ia32_cvtpd2udq256_mask",
-    "llvm.x86.avx512.mask.cvtpd2udq.512" => "__builtin_ia32_cvtpd2udq512_mask",
-    "llvm.x86.avx512.mask.cvtpd2uqq.128" => "__builtin_ia32_cvtpd2uqq128_mask",
-    "llvm.x86.avx512.mask.cvtpd2uqq.256" => "__builtin_ia32_cvtpd2uqq256_mask",
-    "llvm.x86.avx512.mask.cvtpd2uqq.512" => "__builtin_ia32_cvtpd2uqq512_mask",
-    "llvm.x86.avx512.mask.cvtps2dq.128" => "__builtin_ia32_cvtps2dq128_mask",
-    "llvm.x86.avx512.mask.cvtps2dq.256" => "__builtin_ia32_cvtps2dq256_mask",
-    "llvm.x86.avx512.mask.cvtps2dq.512" => "__builtin_ia32_cvtps2dq512_mask",
-    "llvm.x86.avx512.mask.cvtps2pd.128" => "__builtin_ia32_cvtps2pd128_mask",
-    "llvm.x86.avx512.mask.cvtps2pd.256" => "__builtin_ia32_cvtps2pd256_mask",
-    "llvm.x86.avx512.mask.cvtps2pd.512" => "__builtin_ia32_cvtps2pd512_mask",
-    "llvm.x86.avx512.mask.cvtps2qq.128" => "__builtin_ia32_cvtps2qq128_mask",
-    "llvm.x86.avx512.mask.cvtps2qq.256" => "__builtin_ia32_cvtps2qq256_mask",
-    "llvm.x86.avx512.mask.cvtps2qq.512" => "__builtin_ia32_cvtps2qq512_mask",
-    "llvm.x86.avx512.mask.cvtps2udq.128" => "__builtin_ia32_cvtps2udq128_mask",
-    "llvm.x86.avx512.mask.cvtps2udq.256" => "__builtin_ia32_cvtps2udq256_mask",
-    "llvm.x86.avx512.mask.cvtps2udq.512" => "__builtin_ia32_cvtps2udq512_mask",
-    "llvm.x86.avx512.mask.cvtps2uqq.128" => "__builtin_ia32_cvtps2uqq128_mask",
-    "llvm.x86.avx512.mask.cvtps2uqq.256" => "__builtin_ia32_cvtps2uqq256_mask",
-    "llvm.x86.avx512.mask.cvtps2uqq.512" => "__builtin_ia32_cvtps2uqq512_mask",
-    "llvm.x86.avx512.mask.cvtqq2pd.128" => "__builtin_ia32_cvtqq2pd128_mask",
-    "llvm.x86.avx512.mask.cvtqq2pd.256" => "__builtin_ia32_cvtqq2pd256_mask",
-    "llvm.x86.avx512.mask.cvtqq2pd.512" => "__builtin_ia32_cvtqq2pd512_mask",
-    "llvm.x86.avx512.mask.cvtqq2ps.128" => "__builtin_ia32_cvtqq2ps128_mask",
-    "llvm.x86.avx512.mask.cvtqq2ps.256" => "__builtin_ia32_cvtqq2ps256_mask",
-    "llvm.x86.avx512.mask.cvtqq2ps.512" => "__builtin_ia32_cvtqq2ps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.cvtsd2ss.round" => "__builtin_ia32_cvtsd2ss_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.cvtss2sd.round" => "__builtin_ia32_cvtss2sd_round_mask",
-    "llvm.x86.avx512.mask.cvttpd2dq.128" => "__builtin_ia32_cvttpd2dq128_mask",
-    "llvm.x86.avx512.mask.cvttpd2dq.256" => "__builtin_ia32_cvttpd2dq256_mask",
-    "llvm.x86.avx512.mask.cvttpd2dq.512" => "__builtin_ia32_cvttpd2dq512_mask",
-    "llvm.x86.avx512.mask.cvttpd2qq.128" => "__builtin_ia32_cvttpd2qq128_mask",
-    "llvm.x86.avx512.mask.cvttpd2qq.256" => "__builtin_ia32_cvttpd2qq256_mask",
-    "llvm.x86.avx512.mask.cvttpd2qq.512" => "__builtin_ia32_cvttpd2qq512_mask",
-    "llvm.x86.avx512.mask.cvttpd2udq.128" => "__builtin_ia32_cvttpd2udq128_mask",
-    "llvm.x86.avx512.mask.cvttpd2udq.256" => "__builtin_ia32_cvttpd2udq256_mask",
-    "llvm.x86.avx512.mask.cvttpd2udq.512" => "__builtin_ia32_cvttpd2udq512_mask",
-    "llvm.x86.avx512.mask.cvttpd2uqq.128" => "__builtin_ia32_cvttpd2uqq128_mask",
-    "llvm.x86.avx512.mask.cvttpd2uqq.256" => "__builtin_ia32_cvttpd2uqq256_mask",
-    "llvm.x86.avx512.mask.cvttpd2uqq.512" => "__builtin_ia32_cvttpd2uqq512_mask",
-    "llvm.x86.avx512.mask.cvttps2dq.128" => "__builtin_ia32_cvttps2dq128_mask",
-    "llvm.x86.avx512.mask.cvttps2dq.256" => "__builtin_ia32_cvttps2dq256_mask",
-    "llvm.x86.avx512.mask.cvttps2dq.512" => "__builtin_ia32_cvttps2dq512_mask",
-    "llvm.x86.avx512.mask.cvttps2qq.128" => "__builtin_ia32_cvttps2qq128_mask",
-    "llvm.x86.avx512.mask.cvttps2qq.256" => "__builtin_ia32_cvttps2qq256_mask",
-    "llvm.x86.avx512.mask.cvttps2qq.512" => "__builtin_ia32_cvttps2qq512_mask",
-    "llvm.x86.avx512.mask.cvttps2udq.128" => "__builtin_ia32_cvttps2udq128_mask",
-    "llvm.x86.avx512.mask.cvttps2udq.256" => "__builtin_ia32_cvttps2udq256_mask",
-    "llvm.x86.avx512.mask.cvttps2udq.512" => "__builtin_ia32_cvttps2udq512_mask",
-    "llvm.x86.avx512.mask.cvttps2uqq.128" => "__builtin_ia32_cvttps2uqq128_mask",
-    "llvm.x86.avx512.mask.cvttps2uqq.256" => "__builtin_ia32_cvttps2uqq256_mask",
-    "llvm.x86.avx512.mask.cvttps2uqq.512" => "__builtin_ia32_cvttps2uqq512_mask",
-    "llvm.x86.avx512.mask.cvtudq2pd.128" => "__builtin_ia32_cvtudq2pd128_mask",
-    "llvm.x86.avx512.mask.cvtudq2pd.256" => "__builtin_ia32_cvtudq2pd256_mask",
-    "llvm.x86.avx512.mask.cvtudq2pd.512" => "__builtin_ia32_cvtudq2pd512_mask",
-    "llvm.x86.avx512.mask.cvtudq2ps.128" => "__builtin_ia32_cvtudq2ps128_mask",
-    "llvm.x86.avx512.mask.cvtudq2ps.256" => "__builtin_ia32_cvtudq2ps256_mask",
-    "llvm.x86.avx512.mask.cvtudq2ps.512" => "__builtin_ia32_cvtudq2ps512_mask",
-    "llvm.x86.avx512.mask.cvtuqq2pd.128" => "__builtin_ia32_cvtuqq2pd128_mask",
-    "llvm.x86.avx512.mask.cvtuqq2pd.256" => "__builtin_ia32_cvtuqq2pd256_mask",
-    "llvm.x86.avx512.mask.cvtuqq2pd.512" => "__builtin_ia32_cvtuqq2pd512_mask",
-    "llvm.x86.avx512.mask.cvtuqq2ps.128" => "__builtin_ia32_cvtuqq2ps128_mask",
-    "llvm.x86.avx512.mask.cvtuqq2ps.256" => "__builtin_ia32_cvtuqq2ps256_mask",
-    "llvm.x86.avx512.mask.cvtuqq2ps.512" => "__builtin_ia32_cvtuqq2ps512_mask",
-    "llvm.x86.avx512.mask.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128_mask",
-    "llvm.x86.avx512.mask.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256_mask",
-    "llvm.x86.avx512.mask.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512_mask",
-    "llvm.x86.avx512.mask.div.pd.128" => "__builtin_ia32_divpd_mask",
-    "llvm.x86.avx512.mask.div.pd.256" => "__builtin_ia32_divpd256_mask",
-    "llvm.x86.avx512.mask.div.pd.512" => "__builtin_ia32_divpd512_mask",
-    "llvm.x86.avx512.mask.div.ps.128" => "__builtin_ia32_divps_mask",
-    "llvm.x86.avx512.mask.div.ps.256" => "__builtin_ia32_divps256_mask",
-    "llvm.x86.avx512.mask.div.ps.512" => "__builtin_ia32_divps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.div.sd.round" => "__builtin_ia32_divsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.div.ss.round" => "__builtin_ia32_divss_round_mask",
-    "llvm.x86.avx512.mask.expand.d.128" => "__builtin_ia32_expandsi128_mask",
-    "llvm.x86.avx512.mask.expand.d.256" => "__builtin_ia32_expandsi256_mask",
-    "llvm.x86.avx512.mask.expand.d.512" => "__builtin_ia32_expandsi512_mask",
-    "llvm.x86.avx512.mask.expand.load.d.128" => "__builtin_ia32_expandloadsi128_mask",
-    "llvm.x86.avx512.mask.expand.load.d.256" => "__builtin_ia32_expandloadsi256_mask",
-    "llvm.x86.avx512.mask.expand.load.d.512" => "__builtin_ia32_expandloadsi512_mask",
-    "llvm.x86.avx512.mask.expand.load.pd.128" => "__builtin_ia32_expandloaddf128_mask",
-    "llvm.x86.avx512.mask.expand.load.pd.256" => "__builtin_ia32_expandloaddf256_mask",
-    "llvm.x86.avx512.mask.expand.load.pd.512" => "__builtin_ia32_expandloaddf512_mask",
-    "llvm.x86.avx512.mask.expand.load.ps.128" => "__builtin_ia32_expandloadsf128_mask",
-    "llvm.x86.avx512.mask.expand.load.ps.256" => "__builtin_ia32_expandloadsf256_mask",
-    "llvm.x86.avx512.mask.expand.load.ps.512" => "__builtin_ia32_expandloadsf512_mask",
-    "llvm.x86.avx512.mask.expand.load.q.128" => "__builtin_ia32_expandloaddi128_mask",
-    "llvm.x86.avx512.mask.expand.load.q.256" => "__builtin_ia32_expandloaddi256_mask",
-    "llvm.x86.avx512.mask.expand.load.q.512" => "__builtin_ia32_expandloaddi512_mask",
-    "llvm.x86.avx512.mask.expand.pd.128" => "__builtin_ia32_expanddf128_mask",
-    "llvm.x86.avx512.mask.expand.pd.256" => "__builtin_ia32_expanddf256_mask",
-    "llvm.x86.avx512.mask.expand.pd.512" => "__builtin_ia32_expanddf512_mask",
-    "llvm.x86.avx512.mask.expand.ps.128" => "__builtin_ia32_expandsf128_mask",
-    "llvm.x86.avx512.mask.expand.ps.256" => "__builtin_ia32_expandsf256_mask",
-    "llvm.x86.avx512.mask.expand.ps.512" => "__builtin_ia32_expandsf512_mask",
-    "llvm.x86.avx512.mask.expand.q.128" => "__builtin_ia32_expanddi128_mask",
-    "llvm.x86.avx512.mask.expand.q.256" => "__builtin_ia32_expanddi256_mask",
-    "llvm.x86.avx512.mask.expand.q.512" => "__builtin_ia32_expanddi512_mask",
-    "llvm.x86.avx512.mask.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_mask",
-    "llvm.x86.avx512.mask.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_mask",
-    "llvm.x86.avx512.mask.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_mask",
-    "llvm.x86.avx512.mask.fixupimm.ps.128" => "__builtin_ia32_fixupimmps128_mask",
-    "llvm.x86.avx512.mask.fixupimm.ps.256" => "__builtin_ia32_fixupimmps256_mask",
-    "llvm.x86.avx512.mask.fixupimm.ps.512" => "__builtin_ia32_fixupimmps512_mask",
-    "llvm.x86.avx512.mask.fixupimm.sd" => "__builtin_ia32_fixupimmsd_mask",
-    "llvm.x86.avx512.mask.fixupimm.ss" => "__builtin_ia32_fixupimmss_mask",
-    "llvm.x86.avx512.mask.fpclass.pd.128" => "__builtin_ia32_fpclasspd128_mask",
-    "llvm.x86.avx512.mask.fpclass.pd.256" => "__builtin_ia32_fpclasspd256_mask",
-    "llvm.x86.avx512.mask.fpclass.pd.512" => "__builtin_ia32_fpclasspd512_mask",
-    "llvm.x86.avx512.mask.fpclass.ps.128" => "__builtin_ia32_fpclassps128_mask",
-    "llvm.x86.avx512.mask.fpclass.ps.256" => "__builtin_ia32_fpclassps256_mask",
-    "llvm.x86.avx512.mask.fpclass.ps.512" => "__builtin_ia32_fpclassps512_mask",
-    "llvm.x86.avx512.mask.fpclass.sd" => "__builtin_ia32_fpclasssd_mask",
-    "llvm.x86.avx512.mask.fpclass.ss" => "__builtin_ia32_fpclassss_mask",
-    "llvm.x86.avx512.mask.getexp.pd.128" => "__builtin_ia32_getexppd128_mask",
-    "llvm.x86.avx512.mask.getexp.pd.256" => "__builtin_ia32_getexppd256_mask",
-    "llvm.x86.avx512.mask.getexp.pd.512" => "__builtin_ia32_getexppd512_mask",
-    "llvm.x86.avx512.mask.getexp.ps.128" => "__builtin_ia32_getexpps128_mask",
-    "llvm.x86.avx512.mask.getexp.ps.256" => "__builtin_ia32_getexpps256_mask",
-    "llvm.x86.avx512.mask.getexp.ps.512" => "__builtin_ia32_getexpps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.getexp.sd" => "__builtin_ia32_getexpsd128_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.getexp.ss" => "__builtin_ia32_getexpss128_round_mask",
-    "llvm.x86.avx512.mask.getmant.pd.128" => "__builtin_ia32_getmantpd128_mask",
-    "llvm.x86.avx512.mask.getmant.pd.256" => "__builtin_ia32_getmantpd256_mask",
-    "llvm.x86.avx512.mask.getmant.pd.512" => "__builtin_ia32_getmantpd512_mask",
-    "llvm.x86.avx512.mask.getmant.ps.128" => "__builtin_ia32_getmantps128_mask",
-    "llvm.x86.avx512.mask.getmant.ps.256" => "__builtin_ia32_getmantps256_mask",
-    "llvm.x86.avx512.mask.getmant.ps.512" => "__builtin_ia32_getmantps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.getmant.sd" => "__builtin_ia32_getmantsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.getmant.ss" => "__builtin_ia32_getmantss_round_mask",
-    "llvm.x86.avx512.mask.insertf32x4.256" => "__builtin_ia32_insertf32x4_256_mask",
-    "llvm.x86.avx512.mask.insertf32x4.512" => "__builtin_ia32_insertf32x4_mask",
-    "llvm.x86.avx512.mask.insertf32x8.512" => "__builtin_ia32_insertf32x8_mask",
-    "llvm.x86.avx512.mask.insertf64x2.256" => "__builtin_ia32_insertf64x2_256_mask",
-    "llvm.x86.avx512.mask.insertf64x2.512" => "__builtin_ia32_insertf64x2_512_mask",
-    "llvm.x86.avx512.mask.insertf64x4.512" => "__builtin_ia32_insertf64x4_mask",
-    "llvm.x86.avx512.mask.inserti32x4.256" => "__builtin_ia32_inserti32x4_256_mask",
-    "llvm.x86.avx512.mask.inserti32x4.512" => "__builtin_ia32_inserti32x4_mask",
-    "llvm.x86.avx512.mask.inserti32x8.512" => "__builtin_ia32_inserti32x8_mask",
-    "llvm.x86.avx512.mask.inserti64x2.256" => "__builtin_ia32_inserti64x2_256_mask",
-    "llvm.x86.avx512.mask.inserti64x2.512" => "__builtin_ia32_inserti64x2_512_mask",
-    "llvm.x86.avx512.mask.inserti64x4.512" => "__builtin_ia32_inserti64x4_mask",
-    "llvm.x86.avx512.mask.loadu.d.512" => "__builtin_ia32_loaddqusi512_mask",
-    "llvm.x86.avx512.mask.loadu.pd.512" => "__builtin_ia32_loadupd512_mask",
-    "llvm.x86.avx512.mask.loadu.ps.512" => "__builtin_ia32_loadups512_mask",
-    "llvm.x86.avx512.mask.loadu.q.512" => "__builtin_ia32_loaddqudi512_mask",
-    "llvm.x86.avx512.mask.lzcnt.d.512" => "__builtin_ia32_vplzcntd_512_mask",
-    "llvm.x86.avx512.mask.lzcnt.q.512" => "__builtin_ia32_vplzcntq_512_mask",
-    "llvm.x86.avx512.mask.max.pd.128" => "__builtin_ia32_maxpd_mask",
-    "llvm.x86.avx512.mask.max.pd.256" => "__builtin_ia32_maxpd256_mask",
-    "llvm.x86.avx512.mask.max.pd.512" => "__builtin_ia32_maxpd512_mask",
-    "llvm.x86.avx512.mask.max.ps.128" => "__builtin_ia32_maxps_mask",
-    "llvm.x86.avx512.mask.max.ps.256" => "__builtin_ia32_maxps256_mask",
-    "llvm.x86.avx512.mask.max.ps.512" => "__builtin_ia32_maxps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.max.sd.round" => "__builtin_ia32_maxsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.max.ss.round" => "__builtin_ia32_maxss_round_mask",
-    "llvm.x86.avx512.mask.min.pd.128" => "__builtin_ia32_minpd_mask",
-    "llvm.x86.avx512.mask.min.pd.256" => "__builtin_ia32_minpd256_mask",
-    "llvm.x86.avx512.mask.min.pd.512" => "__builtin_ia32_minpd512_mask",
-    "llvm.x86.avx512.mask.min.ps.128" => "__builtin_ia32_minps_mask",
-    "llvm.x86.avx512.mask.min.ps.256" => "__builtin_ia32_minps256_mask",
-    "llvm.x86.avx512.mask.min.ps.512" => "__builtin_ia32_minps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.min.sd.round" => "__builtin_ia32_minsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.min.ss.round" => "__builtin_ia32_minss_round_mask",
-    "llvm.x86.avx512.mask.move.sd" => "__builtin_ia32_movsd_mask",
-    "llvm.x86.avx512.mask.move.ss" => "__builtin_ia32_movss_mask",
-    "llvm.x86.avx512.mask.mul.pd.128" => "__builtin_ia32_mulpd_mask",
-    "llvm.x86.avx512.mask.mul.pd.256" => "__builtin_ia32_mulpd256_mask",
-    "llvm.x86.avx512.mask.mul.pd.512" => "__builtin_ia32_mulpd512_mask",
-    "llvm.x86.avx512.mask.mul.ps.128" => "__builtin_ia32_mulps_mask",
-    "llvm.x86.avx512.mask.mul.ps.256" => "__builtin_ia32_mulps256_mask",
-    "llvm.x86.avx512.mask.mul.ps.512" => "__builtin_ia32_mulps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.mul.sd.round" => "__builtin_ia32_mulsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.mul.ss.round" => "__builtin_ia32_mulss_round_mask",
-    "llvm.x86.avx512.mask.or.pd.128" => "__builtin_ia32_orpd128_mask",
-    "llvm.x86.avx512.mask.or.pd.256" => "__builtin_ia32_orpd256_mask",
-    "llvm.x86.avx512.mask.or.pd.512" => "__builtin_ia32_orpd512_mask",
-    "llvm.x86.avx512.mask.or.ps.128" => "__builtin_ia32_orps128_mask",
-    "llvm.x86.avx512.mask.or.ps.256" => "__builtin_ia32_orps256_mask",
-    "llvm.x86.avx512.mask.or.ps.512" => "__builtin_ia32_orps512_mask",
-    "llvm.x86.avx512.mask.pabs.b.128" => "__builtin_ia32_pabsb128_mask",
-    "llvm.x86.avx512.mask.pabs.b.256" => "__builtin_ia32_pabsb256_mask",
-    "llvm.x86.avx512.mask.pabs.b.512" => "__builtin_ia32_pabsb512_mask",
-    "llvm.x86.avx512.mask.pabs.d.128" => "__builtin_ia32_pabsd128_mask",
-    "llvm.x86.avx512.mask.pabs.d.256" => "__builtin_ia32_pabsd256_mask",
-    "llvm.x86.avx512.mask.pabs.d.512" => "__builtin_ia32_pabsd512_mask",
-    "llvm.x86.avx512.mask.pabs.q.128" => "__builtin_ia32_pabsq128_mask",
-    "llvm.x86.avx512.mask.pabs.q.256" => "__builtin_ia32_pabsq256_mask",
-    "llvm.x86.avx512.mask.pabs.q.512" => "__builtin_ia32_pabsq512_mask",
-    "llvm.x86.avx512.mask.pabs.w.128" => "__builtin_ia32_pabsw128_mask",
-    "llvm.x86.avx512.mask.pabs.w.256" => "__builtin_ia32_pabsw256_mask",
-    "llvm.x86.avx512.mask.pabs.w.512" => "__builtin_ia32_pabsw512_mask",
-    "llvm.x86.avx512.mask.packssdw.128" => "__builtin_ia32_packssdw128_mask",
-    "llvm.x86.avx512.mask.packssdw.256" => "__builtin_ia32_packssdw256_mask",
-    "llvm.x86.avx512.mask.packssdw.512" => "__builtin_ia32_packssdw512_mask",
-    "llvm.x86.avx512.mask.packsswb.128" => "__builtin_ia32_packsswb128_mask",
-    "llvm.x86.avx512.mask.packsswb.256" => "__builtin_ia32_packsswb256_mask",
-    "llvm.x86.avx512.mask.packsswb.512" => "__builtin_ia32_packsswb512_mask",
-    "llvm.x86.avx512.mask.packusdw.128" => "__builtin_ia32_packusdw128_mask",
-    "llvm.x86.avx512.mask.packusdw.256" => "__builtin_ia32_packusdw256_mask",
-    "llvm.x86.avx512.mask.packusdw.512" => "__builtin_ia32_packusdw512_mask",
-    "llvm.x86.avx512.mask.packuswb.128" => "__builtin_ia32_packuswb128_mask",
-    "llvm.x86.avx512.mask.packuswb.256" => "__builtin_ia32_packuswb256_mask",
-    "llvm.x86.avx512.mask.packuswb.512" => "__builtin_ia32_packuswb512_mask",
-    "llvm.x86.avx512.mask.padd.b.128" => "__builtin_ia32_paddb128_mask",
-    "llvm.x86.avx512.mask.padd.b.256" => "__builtin_ia32_paddb256_mask",
-    "llvm.x86.avx512.mask.padd.b.512" => "__builtin_ia32_paddb512_mask",
-    "llvm.x86.avx512.mask.padd.d.128" => "__builtin_ia32_paddd128_mask",
-    "llvm.x86.avx512.mask.padd.d.256" => "__builtin_ia32_paddd256_mask",
-    "llvm.x86.avx512.mask.padd.d.512" => "__builtin_ia32_paddd512_mask",
-    "llvm.x86.avx512.mask.padd.q.128" => "__builtin_ia32_paddq128_mask",
-    "llvm.x86.avx512.mask.padd.q.256" => "__builtin_ia32_paddq256_mask",
-    "llvm.x86.avx512.mask.padd.q.512" => "__builtin_ia32_paddq512_mask",
-    "llvm.x86.avx512.mask.padd.w.128" => "__builtin_ia32_paddw128_mask",
-    "llvm.x86.avx512.mask.padd.w.256" => "__builtin_ia32_paddw256_mask",
-    "llvm.x86.avx512.mask.padd.w.512" => "__builtin_ia32_paddw512_mask",
-    "llvm.x86.avx512.mask.padds.b.128" => "__builtin_ia32_paddsb128_mask",
-    "llvm.x86.avx512.mask.padds.b.256" => "__builtin_ia32_paddsb256_mask",
-    "llvm.x86.avx512.mask.padds.b.512" => "__builtin_ia32_paddsb512_mask",
-    "llvm.x86.avx512.mask.padds.w.128" => "__builtin_ia32_paddsw128_mask",
-    "llvm.x86.avx512.mask.padds.w.256" => "__builtin_ia32_paddsw256_mask",
-    "llvm.x86.avx512.mask.padds.w.512" => "__builtin_ia32_paddsw512_mask",
-    "llvm.x86.avx512.mask.paddus.b.128" => "__builtin_ia32_paddusb128_mask",
-    "llvm.x86.avx512.mask.paddus.b.256" => "__builtin_ia32_paddusb256_mask",
-    "llvm.x86.avx512.mask.paddus.b.512" => "__builtin_ia32_paddusb512_mask",
-    "llvm.x86.avx512.mask.paddus.w.128" => "__builtin_ia32_paddusw128_mask",
-    "llvm.x86.avx512.mask.paddus.w.256" => "__builtin_ia32_paddusw256_mask",
-    "llvm.x86.avx512.mask.paddus.w.512" => "__builtin_ia32_paddusw512_mask",
-    "llvm.x86.avx512.mask.pand.d.512" => "__builtin_ia32_pandd512_mask",
-    "llvm.x86.avx512.mask.pand.q.512" => "__builtin_ia32_pandq512_mask",
-    "llvm.x86.avx512.mask.pavg.b.128" => "__builtin_ia32_pavgb128_mask",
-    "llvm.x86.avx512.mask.pavg.b.256" => "__builtin_ia32_pavgb256_mask",
-    "llvm.x86.avx512.mask.pavg.b.512" => "__builtin_ia32_pavgb512_mask",
-    "llvm.x86.avx512.mask.pavg.w.128" => "__builtin_ia32_pavgw128_mask",
-    "llvm.x86.avx512.mask.pavg.w.256" => "__builtin_ia32_pavgw256_mask",
-    "llvm.x86.avx512.mask.pavg.w.512" => "__builtin_ia32_pavgw512_mask",
-    "llvm.x86.avx512.mask.pbroadcast.b.gpr.128" => "__builtin_ia32_pbroadcastb128_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.b.gpr.256" => "__builtin_ia32_pbroadcastb256_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.b.gpr.512" => "__builtin_ia32_pbroadcastb512_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.d.gpr.128" => "__builtin_ia32_pbroadcastd128_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.d.gpr.256" => "__builtin_ia32_pbroadcastd256_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.d.gpr.512" => "__builtin_ia32_pbroadcastd512_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.q.gpr.128" => "__builtin_ia32_pbroadcastq128_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.q.gpr.256" => "__builtin_ia32_pbroadcastq256_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.q.gpr.512" => "__builtin_ia32_pbroadcastq512_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.q.mem.512" => "__builtin_ia32_pbroadcastq512_mem_mask",
-    "llvm.x86.avx512.mask.pbroadcast.w.gpr.128" => "__builtin_ia32_pbroadcastw128_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.w.gpr.256" => "__builtin_ia32_pbroadcastw256_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.w.gpr.512" => "__builtin_ia32_pbroadcastw512_gpr_mask",
-    "llvm.x86.avx512.mask.pcmpeq.b.128" => "__builtin_ia32_pcmpeqb128_mask",
-    "llvm.x86.avx512.mask.pcmpeq.b.256" => "__builtin_ia32_pcmpeqb256_mask",
-    "llvm.x86.avx512.mask.pcmpeq.b.512" => "__builtin_ia32_pcmpeqb512_mask",
-    "llvm.x86.avx512.mask.pcmpeq.d.128" => "__builtin_ia32_pcmpeqd128_mask",
-    "llvm.x86.avx512.mask.pcmpeq.d.256" => "__builtin_ia32_pcmpeqd256_mask",
-    "llvm.x86.avx512.mask.pcmpeq.d.512" => "__builtin_ia32_pcmpeqd512_mask",
-    "llvm.x86.avx512.mask.pcmpeq.q.128" => "__builtin_ia32_pcmpeqq128_mask",
-    "llvm.x86.avx512.mask.pcmpeq.q.256" => "__builtin_ia32_pcmpeqq256_mask",
-    "llvm.x86.avx512.mask.pcmpeq.q.512" => "__builtin_ia32_pcmpeqq512_mask",
-    "llvm.x86.avx512.mask.pcmpeq.w.128" => "__builtin_ia32_pcmpeqw128_mask",
-    "llvm.x86.avx512.mask.pcmpeq.w.256" => "__builtin_ia32_pcmpeqw256_mask",
-    "llvm.x86.avx512.mask.pcmpeq.w.512" => "__builtin_ia32_pcmpeqw512_mask",
-    "llvm.x86.avx512.mask.pcmpgt.b.128" => "__builtin_ia32_pcmpgtb128_mask",
-    "llvm.x86.avx512.mask.pcmpgt.b.256" => "__builtin_ia32_pcmpgtb256_mask",
-    "llvm.x86.avx512.mask.pcmpgt.b.512" => "__builtin_ia32_pcmpgtb512_mask",
-    "llvm.x86.avx512.mask.pcmpgt.d.128" => "__builtin_ia32_pcmpgtd128_mask",
-    "llvm.x86.avx512.mask.pcmpgt.d.256" => "__builtin_ia32_pcmpgtd256_mask",
-    "llvm.x86.avx512.mask.pcmpgt.d.512" => "__builtin_ia32_pcmpgtd512_mask",
-    "llvm.x86.avx512.mask.pcmpgt.q.128" => "__builtin_ia32_pcmpgtq128_mask",
-    "llvm.x86.avx512.mask.pcmpgt.q.256" => "__builtin_ia32_pcmpgtq256_mask",
-    "llvm.x86.avx512.mask.pcmpgt.q.512" => "__builtin_ia32_pcmpgtq512_mask",
-    "llvm.x86.avx512.mask.pcmpgt.w.128" => "__builtin_ia32_pcmpgtw128_mask",
-    "llvm.x86.avx512.mask.pcmpgt.w.256" => "__builtin_ia32_pcmpgtw256_mask",
-    "llvm.x86.avx512.mask.pcmpgt.w.512" => "__builtin_ia32_pcmpgtw512_mask",
-    "llvm.x86.avx512.mask.permvar.df.256" => "__builtin_ia32_permvardf256_mask",
-    "llvm.x86.avx512.mask.permvar.df.512" => "__builtin_ia32_permvardf512_mask",
-    "llvm.x86.avx512.mask.permvar.di.256" => "__builtin_ia32_permvardi256_mask",
-    "llvm.x86.avx512.mask.permvar.di.512" => "__builtin_ia32_permvardi512_mask",
-    "llvm.x86.avx512.mask.permvar.hi.128" => "__builtin_ia32_permvarhi128_mask",
-    "llvm.x86.avx512.mask.permvar.hi.256" => "__builtin_ia32_permvarhi256_mask",
-    "llvm.x86.avx512.mask.permvar.hi.512" => "__builtin_ia32_permvarhi512_mask",
-    "llvm.x86.avx512.mask.permvar.qi.128" => "__builtin_ia32_permvarqi128_mask",
-    "llvm.x86.avx512.mask.permvar.qi.256" => "__builtin_ia32_permvarqi256_mask",
-    "llvm.x86.avx512.mask.permvar.qi.512" => "__builtin_ia32_permvarqi512_mask",
-    "llvm.x86.avx512.mask.permvar.sf.256" => "__builtin_ia32_permvarsf256_mask",
-    "llvm.x86.avx512.mask.permvar.sf.512" => "__builtin_ia32_permvarsf512_mask",
-    "llvm.x86.avx512.mask.permvar.si.256" => "__builtin_ia32_permvarsi256_mask",
-    "llvm.x86.avx512.mask.permvar.si.512" => "__builtin_ia32_permvarsi512_mask",
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-    "llvm.x86.avx512.mask.pmaddubs.w.256" => "__builtin_ia32_pmaddubsw256_mask",
-    "llvm.x86.avx512.mask.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512_mask",
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-    "llvm.x86.avx512.mask.pmaddw.d.512" => "__builtin_ia32_pmaddwd512_mask",
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-    "llvm.x86.avx512.mask.pmaxs.b.512" => "__builtin_ia32_pmaxsb512_mask",
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-    "llvm.x86.avx512.mask.pmaxs.d.512" => "__builtin_ia32_pmaxsd512_mask",
-    "llvm.x86.avx512.mask.pmaxs.q.128" => "__builtin_ia32_pmaxsq128_mask",
-    "llvm.x86.avx512.mask.pmaxs.q.256" => "__builtin_ia32_pmaxsq256_mask",
-    "llvm.x86.avx512.mask.pmaxs.q.512" => "__builtin_ia32_pmaxsq512_mask",
-    "llvm.x86.avx512.mask.pmaxs.w.128" => "__builtin_ia32_pmaxsw128_mask",
-    "llvm.x86.avx512.mask.pmaxs.w.256" => "__builtin_ia32_pmaxsw256_mask",
-    "llvm.x86.avx512.mask.pmaxs.w.512" => "__builtin_ia32_pmaxsw512_mask",
-    "llvm.x86.avx512.mask.pmaxu.b.128" => "__builtin_ia32_pmaxub128_mask",
-    "llvm.x86.avx512.mask.pmaxu.b.256" => "__builtin_ia32_pmaxub256_mask",
-    "llvm.x86.avx512.mask.pmaxu.b.512" => "__builtin_ia32_pmaxub512_mask",
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-    "llvm.x86.avx512.mask.pmins.q.512" => "__builtin_ia32_pminsq512_mask",
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-    "llvm.x86.avx512.mask.pmins.w.256" => "__builtin_ia32_pminsw256_mask",
-    "llvm.x86.avx512.mask.pmins.w.512" => "__builtin_ia32_pminsw512_mask",
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-    "llvm.x86.avx512.mask.pminu.b.256" => "__builtin_ia32_pminub256_mask",
-    "llvm.x86.avx512.mask.pminu.b.512" => "__builtin_ia32_pminub512_mask",
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-    "llvm.x86.avx512.mask.pminu.d.512" => "__builtin_ia32_pminud512_mask",
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-    "llvm.x86.avx512.mask.pminu.q.256" => "__builtin_ia32_pminuq256_mask",
-    "llvm.x86.avx512.mask.pminu.q.512" => "__builtin_ia32_pminuq512_mask",
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-    "llvm.x86.avx512.mask.pminu.w.256" => "__builtin_ia32_pminuw256_mask",
-    "llvm.x86.avx512.mask.pminu.w.512" => "__builtin_ia32_pminuw512_mask",
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-    "llvm.x86.avx512.mask.pmov.db.512" => "__builtin_ia32_pmovdb512_mask",
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-    "llvm.x86.avx512.mask.pmov.db.mem.256" => "__builtin_ia32_pmovdb256mem_mask",
-    "llvm.x86.avx512.mask.pmov.db.mem.512" => "__builtin_ia32_pmovdb512mem_mask",
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-    "llvm.x86.avx512.mask.pmov.dw.512" => "__builtin_ia32_pmovdw512_mask",
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-    "llvm.x86.avx512.mask.pmov.qb.mem.512" => "__builtin_ia32_pmovqb512mem_mask",
-    "llvm.x86.avx512.mask.pmov.qd.128" => "__builtin_ia32_pmovqd128_mask",
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-    "llvm.x86.avx512.mask.pmov.qd.mem.256" => "__builtin_ia32_pmovqd256mem_mask",
-    "llvm.x86.avx512.mask.pmov.qd.mem.512" => "__builtin_ia32_pmovqd512mem_mask",
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-    "llvm.x86.avx512.mask.pmov.qw.mem.512" => "__builtin_ia32_pmovqw512mem_mask",
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-    "llvm.x86.avx512.mask.pmov.wb.mem.512" => "__builtin_ia32_pmovwb512mem_mask",
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-    "llvm.x86.avx512.mask.pmovs.qd.mem.256" => "__builtin_ia32_pmovsqd256mem_mask",
-    "llvm.x86.avx512.mask.pmovs.qd.mem.512" => "__builtin_ia32_pmovsqd512mem_mask",
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-    "llvm.x86.avx512.mask.pmovs.qw.mem.256" => "__builtin_ia32_pmovsqw256mem_mask",
-    "llvm.x86.avx512.mask.pmovs.qw.mem.512" => "__builtin_ia32_pmovsqw512mem_mask",
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-    "llvm.x86.avx512.mask.pmovsxb.w.256" => "__builtin_ia32_pmovsxbw256_mask",
-    "llvm.x86.avx512.mask.pmovsxb.w.512" => "__builtin_ia32_pmovsxbw512_mask",
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-    "llvm.x86.avx512.mask.pmovsxd.q.512" => "__builtin_ia32_pmovsxdq512_mask",
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-    "llvm.x86.avx512.mask.pmovsxw.q.512" => "__builtin_ia32_pmovsxwq512_mask",
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-    "llvm.x86.avx512.mask.pmovus.db.mem.512" => "__builtin_ia32_pmovusdb512mem_mask",
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-    "llvm.x86.avx512.mask.pmovus.dw.mem.128" => "__builtin_ia32_pmovusdw128mem_mask",
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-    "llvm.x86.avx512.mask.pmovus.dw.mem.512" => "__builtin_ia32_pmovusdw512mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qb.128" => "__builtin_ia32_pmovusqb128_mask",
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-    "llvm.x86.avx512.mask.pmovus.qb.mem.256" => "__builtin_ia32_pmovusqb256mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qb.mem.512" => "__builtin_ia32_pmovusqb512mem_mask",
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-    "llvm.x86.avx512.mask.pmovus.qd.512" => "__builtin_ia32_pmovusqd512_mask",
-    "llvm.x86.avx512.mask.pmovus.qd.mem.128" => "__builtin_ia32_pmovusqd128mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qd.mem.256" => "__builtin_ia32_pmovusqd256mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qd.mem.512" => "__builtin_ia32_pmovusqd512mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qw.128" => "__builtin_ia32_pmovusqw128_mask",
-    "llvm.x86.avx512.mask.pmovus.qw.256" => "__builtin_ia32_pmovusqw256_mask",
-    "llvm.x86.avx512.mask.pmovus.qw.512" => "__builtin_ia32_pmovusqw512_mask",
-    "llvm.x86.avx512.mask.pmovus.qw.mem.128" => "__builtin_ia32_pmovusqw128mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qw.mem.256" => "__builtin_ia32_pmovusqw256mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qw.mem.512" => "__builtin_ia32_pmovusqw512mem_mask",
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-    "llvm.x86.avx512.mask.pmovus.wb.mem.128" => "__builtin_ia32_pmovuswb128mem_mask",
-    "llvm.x86.avx512.mask.pmovus.wb.mem.256" => "__builtin_ia32_pmovuswb256mem_mask",
-    "llvm.x86.avx512.mask.pmovus.wb.mem.512" => "__builtin_ia32_pmovuswb512mem_mask",
-    "llvm.x86.avx512.mask.pmovzxb.d.128" => "__builtin_ia32_pmovzxbd128_mask",
-    "llvm.x86.avx512.mask.pmovzxb.d.256" => "__builtin_ia32_pmovzxbd256_mask",
-    "llvm.x86.avx512.mask.pmovzxb.d.512" => "__builtin_ia32_pmovzxbd512_mask",
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-    "llvm.x86.avx512.mask.pmovzxb.q.256" => "__builtin_ia32_pmovzxbq256_mask",
-    "llvm.x86.avx512.mask.pmovzxb.q.512" => "__builtin_ia32_pmovzxbq512_mask",
-    "llvm.x86.avx512.mask.pmovzxb.w.128" => "__builtin_ia32_pmovzxbw128_mask",
-    "llvm.x86.avx512.mask.pmovzxb.w.256" => "__builtin_ia32_pmovzxbw256_mask",
-    "llvm.x86.avx512.mask.pmovzxb.w.512" => "__builtin_ia32_pmovzxbw512_mask",
-    "llvm.x86.avx512.mask.pmovzxd.q.128" => "__builtin_ia32_pmovzxdq128_mask",
-    "llvm.x86.avx512.mask.pmovzxd.q.256" => "__builtin_ia32_pmovzxdq256_mask",
-    "llvm.x86.avx512.mask.pmovzxd.q.512" => "__builtin_ia32_pmovzxdq512_mask",
-    "llvm.x86.avx512.mask.pmovzxw.d.128" => "__builtin_ia32_pmovzxwd128_mask",
-    "llvm.x86.avx512.mask.pmovzxw.d.256" => "__builtin_ia32_pmovzxwd256_mask",
-    "llvm.x86.avx512.mask.pmovzxw.d.512" => "__builtin_ia32_pmovzxwd512_mask",
-    "llvm.x86.avx512.mask.pmovzxw.q.128" => "__builtin_ia32_pmovzxwq128_mask",
-    "llvm.x86.avx512.mask.pmovzxw.q.256" => "__builtin_ia32_pmovzxwq256_mask",
-    "llvm.x86.avx512.mask.pmovzxw.q.512" => "__builtin_ia32_pmovzxwq512_mask",
-    "llvm.x86.avx512.mask.pmul.dq.128" => "__builtin_ia32_pmuldq128_mask",
-    "llvm.x86.avx512.mask.pmul.dq.256" => "__builtin_ia32_pmuldq256_mask",
-    "llvm.x86.avx512.mask.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask",
-    "llvm.x86.avx512.mask.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128_mask",
-    "llvm.x86.avx512.mask.pmul.hr.sw.256" => "__builtin_ia32_pmulhrsw256_mask",
-    "llvm.x86.avx512.mask.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512_mask",
-    "llvm.x86.avx512.mask.pmulh.w.128" => "__builtin_ia32_pmulhw128_mask",
-    "llvm.x86.avx512.mask.pmulh.w.256" => "__builtin_ia32_pmulhw256_mask",
-    "llvm.x86.avx512.mask.pmulh.w.512" => "__builtin_ia32_pmulhw512_mask",
-    "llvm.x86.avx512.mask.pmulhu.w.128" => "__builtin_ia32_pmulhuw128_mask",
-    "llvm.x86.avx512.mask.pmulhu.w.256" => "__builtin_ia32_pmulhuw256_mask",
-    "llvm.x86.avx512.mask.pmulhu.w.512" => "__builtin_ia32_pmulhuw512_mask",
-    "llvm.x86.avx512.mask.pmull.d.128" => "__builtin_ia32_pmulld128_mask",
-    "llvm.x86.avx512.mask.pmull.d.256" => "__builtin_ia32_pmulld256_mask",
-    "llvm.x86.avx512.mask.pmull.d.512" => "__builtin_ia32_pmulld512_mask",
-    "llvm.x86.avx512.mask.pmull.q.128" => "__builtin_ia32_pmullq128_mask",
-    "llvm.x86.avx512.mask.pmull.q.256" => "__builtin_ia32_pmullq256_mask",
-    "llvm.x86.avx512.mask.pmull.q.512" => "__builtin_ia32_pmullq512_mask",
-    "llvm.x86.avx512.mask.pmull.w.128" => "__builtin_ia32_pmullw128_mask",
-    "llvm.x86.avx512.mask.pmull.w.256" => "__builtin_ia32_pmullw256_mask",
-    "llvm.x86.avx512.mask.pmull.w.512" => "__builtin_ia32_pmullw512_mask",
-    "llvm.x86.avx512.mask.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128_mask",
-    "llvm.x86.avx512.mask.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256_mask",
-    "llvm.x86.avx512.mask.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512_mask",
-    "llvm.x86.avx512.mask.pmulu.dq.128" => "__builtin_ia32_pmuludq128_mask",
-    "llvm.x86.avx512.mask.pmulu.dq.256" => "__builtin_ia32_pmuludq256_mask",
-    "llvm.x86.avx512.mask.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask",
-    "llvm.x86.avx512.mask.prol.d.128" => "__builtin_ia32_prold128_mask",
-    "llvm.x86.avx512.mask.prol.d.256" => "__builtin_ia32_prold256_mask",
-    "llvm.x86.avx512.mask.prol.d.512" => "__builtin_ia32_prold512_mask",
-    "llvm.x86.avx512.mask.prol.q.128" => "__builtin_ia32_prolq128_mask",
-    "llvm.x86.avx512.mask.prol.q.256" => "__builtin_ia32_prolq256_mask",
-    "llvm.x86.avx512.mask.prol.q.512" => "__builtin_ia32_prolq512_mask",
-    "llvm.x86.avx512.mask.prolv.d.128" => "__builtin_ia32_prolvd128_mask",
-    "llvm.x86.avx512.mask.prolv.d.256" => "__builtin_ia32_prolvd256_mask",
-    "llvm.x86.avx512.mask.prolv.d.512" => "__builtin_ia32_prolvd512_mask",
-    "llvm.x86.avx512.mask.prolv.q.128" => "__builtin_ia32_prolvq128_mask",
-    "llvm.x86.avx512.mask.prolv.q.256" => "__builtin_ia32_prolvq256_mask",
-    "llvm.x86.avx512.mask.prolv.q.512" => "__builtin_ia32_prolvq512_mask",
-    "llvm.x86.avx512.mask.pror.d.128" => "__builtin_ia32_prord128_mask",
-    "llvm.x86.avx512.mask.pror.d.256" => "__builtin_ia32_prord256_mask",
-    "llvm.x86.avx512.mask.pror.d.512" => "__builtin_ia32_prord512_mask",
-    "llvm.x86.avx512.mask.pror.q.128" => "__builtin_ia32_prorq128_mask",
-    "llvm.x86.avx512.mask.pror.q.256" => "__builtin_ia32_prorq256_mask",
-    "llvm.x86.avx512.mask.pror.q.512" => "__builtin_ia32_prorq512_mask",
-    "llvm.x86.avx512.mask.prorv.d.128" => "__builtin_ia32_prorvd128_mask",
-    "llvm.x86.avx512.mask.prorv.d.256" => "__builtin_ia32_prorvd256_mask",
-    "llvm.x86.avx512.mask.prorv.d.512" => "__builtin_ia32_prorvd512_mask",
-    "llvm.x86.avx512.mask.prorv.q.128" => "__builtin_ia32_prorvq128_mask",
-    "llvm.x86.avx512.mask.prorv.q.256" => "__builtin_ia32_prorvq256_mask",
-    "llvm.x86.avx512.mask.prorv.q.512" => "__builtin_ia32_prorvq512_mask",
-    "llvm.x86.avx512.mask.pshuf.b.128" => "__builtin_ia32_pshufb128_mask",
-    "llvm.x86.avx512.mask.pshuf.b.256" => "__builtin_ia32_pshufb256_mask",
-    "llvm.x86.avx512.mask.pshuf.b.512" => "__builtin_ia32_pshufb512_mask",
-    "llvm.x86.avx512.mask.psll.d" => "__builtin_ia32_pslld512_mask",
-    "llvm.x86.avx512.mask.psll.d.128" => "__builtin_ia32_pslld128_mask",
-    "llvm.x86.avx512.mask.psll.d.256" => "__builtin_ia32_pslld256_mask",
-    "llvm.x86.avx512.mask.psll.di.128" => "__builtin_ia32_pslldi128_mask",
-    "llvm.x86.avx512.mask.psll.di.256" => "__builtin_ia32_pslldi256_mask",
-    "llvm.x86.avx512.mask.psll.di.512" => "__builtin_ia32_pslldi512_mask",
-    "llvm.x86.avx512.mask.psll.q" => "__builtin_ia32_psllq512_mask",
-    "llvm.x86.avx512.mask.psll.q.128" => "__builtin_ia32_psllq128_mask",
-    "llvm.x86.avx512.mask.psll.q.256" => "__builtin_ia32_psllq256_mask",
-    "llvm.x86.avx512.mask.psll.qi.128" => "__builtin_ia32_psllqi128_mask",
-    "llvm.x86.avx512.mask.psll.qi.256" => "__builtin_ia32_psllqi256_mask",
-    "llvm.x86.avx512.mask.psll.qi.512" => "__builtin_ia32_psllqi512_mask",
-    "llvm.x86.avx512.mask.psll.w.128" => "__builtin_ia32_psllw128_mask",
-    "llvm.x86.avx512.mask.psll.w.256" => "__builtin_ia32_psllw256_mask",
-    "llvm.x86.avx512.mask.psll.w.512" => "__builtin_ia32_psllw512_mask",
-    "llvm.x86.avx512.mask.psll.wi.128" => "__builtin_ia32_psllwi128_mask",
-    "llvm.x86.avx512.mask.psll.wi.256" => "__builtin_ia32_psllwi256_mask",
-    "llvm.x86.avx512.mask.psll.wi.512" => "__builtin_ia32_psllwi512_mask",
-    "llvm.x86.avx512.mask.psllv.d" => "__builtin_ia32_psllv16si_mask",
-    "llvm.x86.avx512.mask.psllv.q" => "__builtin_ia32_psllv8di_mask",
-    "llvm.x86.avx512.mask.psllv16.hi" => "__builtin_ia32_psllv16hi_mask",
-    "llvm.x86.avx512.mask.psllv2.di" => "__builtin_ia32_psllv2di_mask",
-    "llvm.x86.avx512.mask.psllv32hi" => "__builtin_ia32_psllv32hi_mask",
-    "llvm.x86.avx512.mask.psllv4.di" => "__builtin_ia32_psllv4di_mask",
-    "llvm.x86.avx512.mask.psllv4.si" => "__builtin_ia32_psllv4si_mask",
-    "llvm.x86.avx512.mask.psllv8.hi" => "__builtin_ia32_psllv8hi_mask",
-    "llvm.x86.avx512.mask.psllv8.si" => "__builtin_ia32_psllv8si_mask",
-    "llvm.x86.avx512.mask.psra.d" => "__builtin_ia32_psrad512_mask",
-    "llvm.x86.avx512.mask.psra.d.128" => "__builtin_ia32_psrad128_mask",
-    "llvm.x86.avx512.mask.psra.d.256" => "__builtin_ia32_psrad256_mask",
-    "llvm.x86.avx512.mask.psra.di.128" => "__builtin_ia32_psradi128_mask",
-    "llvm.x86.avx512.mask.psra.di.256" => "__builtin_ia32_psradi256_mask",
-    "llvm.x86.avx512.mask.psra.di.512" => "__builtin_ia32_psradi512_mask",
-    "llvm.x86.avx512.mask.psra.q" => "__builtin_ia32_psraq512_mask",
-    "llvm.x86.avx512.mask.psra.q.128" => "__builtin_ia32_psraq128_mask",
-    "llvm.x86.avx512.mask.psra.q.256" => "__builtin_ia32_psraq256_mask",
-    "llvm.x86.avx512.mask.psra.qi.128" => "__builtin_ia32_psraqi128_mask",
-    "llvm.x86.avx512.mask.psra.qi.256" => "__builtin_ia32_psraqi256_mask",
-    "llvm.x86.avx512.mask.psra.qi.512" => "__builtin_ia32_psraqi512_mask",
-    "llvm.x86.avx512.mask.psra.w.128" => "__builtin_ia32_psraw128_mask",
-    "llvm.x86.avx512.mask.psra.w.256" => "__builtin_ia32_psraw256_mask",
-    "llvm.x86.avx512.mask.psra.w.512" => "__builtin_ia32_psraw512_mask",
-    "llvm.x86.avx512.mask.psra.wi.128" => "__builtin_ia32_psrawi128_mask",
-    "llvm.x86.avx512.mask.psra.wi.256" => "__builtin_ia32_psrawi256_mask",
-    "llvm.x86.avx512.mask.psra.wi.512" => "__builtin_ia32_psrawi512_mask",
-    "llvm.x86.avx512.mask.psrav.d" => "__builtin_ia32_psrav16si_mask",
-    "llvm.x86.avx512.mask.psrav.q" => "__builtin_ia32_psrav8di_mask",
-    "llvm.x86.avx512.mask.psrav.q.128" => "__builtin_ia32_psravq128_mask",
-    "llvm.x86.avx512.mask.psrav.q.256" => "__builtin_ia32_psravq256_mask",
-    "llvm.x86.avx512.mask.psrav16.hi" => "__builtin_ia32_psrav16hi_mask",
-    "llvm.x86.avx512.mask.psrav32.hi" => "__builtin_ia32_psrav32hi_mask",
-    "llvm.x86.avx512.mask.psrav4.si" => "__builtin_ia32_psrav4si_mask",
-    "llvm.x86.avx512.mask.psrav8.hi" => "__builtin_ia32_psrav8hi_mask",
-    "llvm.x86.avx512.mask.psrav8.si" => "__builtin_ia32_psrav8si_mask",
-    "llvm.x86.avx512.mask.psrl.d" => "__builtin_ia32_psrld512_mask",
-    "llvm.x86.avx512.mask.psrl.d.128" => "__builtin_ia32_psrld128_mask",
-    "llvm.x86.avx512.mask.psrl.d.256" => "__builtin_ia32_psrld256_mask",
-    "llvm.x86.avx512.mask.psrl.di.128" => "__builtin_ia32_psrldi128_mask",
-    "llvm.x86.avx512.mask.psrl.di.256" => "__builtin_ia32_psrldi256_mask",
-    "llvm.x86.avx512.mask.psrl.di.512" => "__builtin_ia32_psrldi512_mask",
-    "llvm.x86.avx512.mask.psrl.q" => "__builtin_ia32_psrlq512_mask",
-    "llvm.x86.avx512.mask.psrl.q.128" => "__builtin_ia32_psrlq128_mask",
-    "llvm.x86.avx512.mask.psrl.q.256" => "__builtin_ia32_psrlq256_mask",
-    "llvm.x86.avx512.mask.psrl.qi.128" => "__builtin_ia32_psrlqi128_mask",
-    "llvm.x86.avx512.mask.psrl.qi.256" => "__builtin_ia32_psrlqi256_mask",
-    "llvm.x86.avx512.mask.psrl.qi.512" => "__builtin_ia32_psrlqi512_mask",
-    "llvm.x86.avx512.mask.psrl.w.128" => "__builtin_ia32_psrlw128_mask",
-    "llvm.x86.avx512.mask.psrl.w.256" => "__builtin_ia32_psrlw256_mask",
-    "llvm.x86.avx512.mask.psrl.w.512" => "__builtin_ia32_psrlw512_mask",
-    "llvm.x86.avx512.mask.psrl.wi.128" => "__builtin_ia32_psrlwi128_mask",
-    "llvm.x86.avx512.mask.psrl.wi.256" => "__builtin_ia32_psrlwi256_mask",
-    "llvm.x86.avx512.mask.psrl.wi.512" => "__builtin_ia32_psrlwi512_mask",
-    "llvm.x86.avx512.mask.psrlv.d" => "__builtin_ia32_psrlv16si_mask",
-    "llvm.x86.avx512.mask.psrlv.q" => "__builtin_ia32_psrlv8di_mask",
-    "llvm.x86.avx512.mask.psrlv16.hi" => "__builtin_ia32_psrlv16hi_mask",
-    "llvm.x86.avx512.mask.psrlv2.di" => "__builtin_ia32_psrlv2di_mask",
-    "llvm.x86.avx512.mask.psrlv32hi" => "__builtin_ia32_psrlv32hi_mask",
-    "llvm.x86.avx512.mask.psrlv4.di" => "__builtin_ia32_psrlv4di_mask",
-    "llvm.x86.avx512.mask.psrlv4.si" => "__builtin_ia32_psrlv4si_mask",
-    "llvm.x86.avx512.mask.psrlv8.hi" => "__builtin_ia32_psrlv8hi_mask",
-    "llvm.x86.avx512.mask.psrlv8.si" => "__builtin_ia32_psrlv8si_mask",
-    "llvm.x86.avx512.mask.psub.b.128" => "__builtin_ia32_psubb128_mask",
-    "llvm.x86.avx512.mask.psub.b.256" => "__builtin_ia32_psubb256_mask",
-    "llvm.x86.avx512.mask.psub.b.512" => "__builtin_ia32_psubb512_mask",
-    "llvm.x86.avx512.mask.psub.d.128" => "__builtin_ia32_psubd128_mask",
-    "llvm.x86.avx512.mask.psub.d.256" => "__builtin_ia32_psubd256_mask",
-    "llvm.x86.avx512.mask.psub.d.512" => "__builtin_ia32_psubd512_mask",
-    "llvm.x86.avx512.mask.psub.q.128" => "__builtin_ia32_psubq128_mask",
-    "llvm.x86.avx512.mask.psub.q.256" => "__builtin_ia32_psubq256_mask",
-    "llvm.x86.avx512.mask.psub.q.512" => "__builtin_ia32_psubq512_mask",
-    "llvm.x86.avx512.mask.psub.w.128" => "__builtin_ia32_psubw128_mask",
-    "llvm.x86.avx512.mask.psub.w.256" => "__builtin_ia32_psubw256_mask",
-    "llvm.x86.avx512.mask.psub.w.512" => "__builtin_ia32_psubw512_mask",
-    "llvm.x86.avx512.mask.psubs.b.128" => "__builtin_ia32_psubsb128_mask",
-    "llvm.x86.avx512.mask.psubs.b.256" => "__builtin_ia32_psubsb256_mask",
-    "llvm.x86.avx512.mask.psubs.b.512" => "__builtin_ia32_psubsb512_mask",
-    "llvm.x86.avx512.mask.psubs.w.128" => "__builtin_ia32_psubsw128_mask",
-    "llvm.x86.avx512.mask.psubs.w.256" => "__builtin_ia32_psubsw256_mask",
-    "llvm.x86.avx512.mask.psubs.w.512" => "__builtin_ia32_psubsw512_mask",
-    "llvm.x86.avx512.mask.psubus.b.128" => "__builtin_ia32_psubusb128_mask",
-    "llvm.x86.avx512.mask.psubus.b.256" => "__builtin_ia32_psubusb256_mask",
-    "llvm.x86.avx512.mask.psubus.b.512" => "__builtin_ia32_psubusb512_mask",
-    "llvm.x86.avx512.mask.psubus.w.128" => "__builtin_ia32_psubusw128_mask",
-    "llvm.x86.avx512.mask.psubus.w.256" => "__builtin_ia32_psubusw256_mask",
-    "llvm.x86.avx512.mask.psubus.w.512" => "__builtin_ia32_psubusw512_mask",
-    "llvm.x86.avx512.mask.pternlog.d.128" => "__builtin_ia32_pternlogd128_mask",
-    "llvm.x86.avx512.mask.pternlog.d.256" => "__builtin_ia32_pternlogd256_mask",
-    "llvm.x86.avx512.mask.pternlog.d.512" => "__builtin_ia32_pternlogd512_mask",
-    "llvm.x86.avx512.mask.pternlog.q.128" => "__builtin_ia32_pternlogq128_mask",
-    "llvm.x86.avx512.mask.pternlog.q.256" => "__builtin_ia32_pternlogq256_mask",
-    "llvm.x86.avx512.mask.pternlog.q.512" => "__builtin_ia32_pternlogq512_mask",
-    "llvm.x86.avx512.mask.ptestm.d.512" => "__builtin_ia32_ptestmd512",
-    "llvm.x86.avx512.mask.ptestm.q.512" => "__builtin_ia32_ptestmq512",
-    "llvm.x86.avx512.mask.range.pd.128" => "__builtin_ia32_rangepd128_mask",
-    "llvm.x86.avx512.mask.range.pd.256" => "__builtin_ia32_rangepd256_mask",
-    "llvm.x86.avx512.mask.range.pd.512" => "__builtin_ia32_rangepd512_mask",
-    "llvm.x86.avx512.mask.range.ps.128" => "__builtin_ia32_rangeps128_mask",
-    "llvm.x86.avx512.mask.range.ps.256" => "__builtin_ia32_rangeps256_mask",
-    "llvm.x86.avx512.mask.range.ps.512" => "__builtin_ia32_rangeps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.range.sd" => "__builtin_ia32_rangesd128_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.range.ss" => "__builtin_ia32_rangess128_round_mask",
-    "llvm.x86.avx512.mask.reduce.pd.128" => "__builtin_ia32_reducepd128_mask",
-    "llvm.x86.avx512.mask.reduce.pd.256" => "__builtin_ia32_reducepd256_mask",
-    "llvm.x86.avx512.mask.reduce.pd.512" => "__builtin_ia32_reducepd512_mask",
-    "llvm.x86.avx512.mask.reduce.ps.128" => "__builtin_ia32_reduceps128_mask",
-    "llvm.x86.avx512.mask.reduce.ps.256" => "__builtin_ia32_reduceps256_mask",
-    "llvm.x86.avx512.mask.reduce.ps.512" => "__builtin_ia32_reduceps512_mask",
-    "llvm.x86.avx512.mask.reduce.sd" => "__builtin_ia32_reducesd_mask",
-    "llvm.x86.avx512.mask.reduce.ss" => "__builtin_ia32_reducess_mask",
-    "llvm.x86.avx512.mask.rndscale.pd.128" => "__builtin_ia32_rndscalepd_128_mask",
-    "llvm.x86.avx512.mask.rndscale.pd.256" => "__builtin_ia32_rndscalepd_256_mask",
-    "llvm.x86.avx512.mask.rndscale.pd.512" => "__builtin_ia32_rndscalepd_mask",
-    "llvm.x86.avx512.mask.rndscale.ps.128" => "__builtin_ia32_rndscaleps_128_mask",
-    "llvm.x86.avx512.mask.rndscale.ps.256" => "__builtin_ia32_rndscaleps_256_mask",
-    "llvm.x86.avx512.mask.rndscale.ps.512" => "__builtin_ia32_rndscaleps_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.rndscale.sd" => "__builtin_ia32_rndscalesd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.rndscale.ss" => "__builtin_ia32_rndscaless_round_mask",
-    "llvm.x86.avx512.mask.scalef.pd.128" => "__builtin_ia32_scalefpd128_mask",
-    "llvm.x86.avx512.mask.scalef.pd.256" => "__builtin_ia32_scalefpd256_mask",
-    "llvm.x86.avx512.mask.scalef.pd.512" => "__builtin_ia32_scalefpd512_mask",
-    "llvm.x86.avx512.mask.scalef.ps.128" => "__builtin_ia32_scalefps128_mask",
-    "llvm.x86.avx512.mask.scalef.ps.256" => "__builtin_ia32_scalefps256_mask",
-    "llvm.x86.avx512.mask.scalef.ps.512" => "__builtin_ia32_scalefps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.scalef.sd" => "__builtin_ia32_scalefsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.scalef.ss" => "__builtin_ia32_scalefss_round_mask",
-    "llvm.x86.avx512.mask.shuf.f32x4" => "__builtin_ia32_shuf_f32x4_mask",
-    "llvm.x86.avx512.mask.shuf.f32x4.256" => "__builtin_ia32_shuf_f32x4_256_mask",
-    "llvm.x86.avx512.mask.shuf.f64x2" => "__builtin_ia32_shuf_f64x2_mask",
-    "llvm.x86.avx512.mask.shuf.f64x2.256" => "__builtin_ia32_shuf_f64x2_256_mask",
-    "llvm.x86.avx512.mask.shuf.i32x4" => "__builtin_ia32_shuf_i32x4_mask",
-    "llvm.x86.avx512.mask.shuf.i32x4.256" => "__builtin_ia32_shuf_i32x4_256_mask",
-    "llvm.x86.avx512.mask.shuf.i64x2" => "__builtin_ia32_shuf_i64x2_mask",
-    "llvm.x86.avx512.mask.shuf.i64x2.256" => "__builtin_ia32_shuf_i64x2_256_mask",
-    "llvm.x86.avx512.mask.shuf.pd.128" => "__builtin_ia32_shufpd128_mask",
-    "llvm.x86.avx512.mask.shuf.pd.256" => "__builtin_ia32_shufpd256_mask",
-    "llvm.x86.avx512.mask.shuf.pd.512" => "__builtin_ia32_shufpd512_mask",
-    "llvm.x86.avx512.mask.shuf.ps.128" => "__builtin_ia32_shufps128_mask",
-    "llvm.x86.avx512.mask.shuf.ps.256" => "__builtin_ia32_shufps256_mask",
-    "llvm.x86.avx512.mask.shuf.ps.512" => "__builtin_ia32_shufps512_mask",
-    "llvm.x86.avx512.mask.sqrt.pd.128" => "__builtin_ia32_sqrtpd128_mask",
-    "llvm.x86.avx512.mask.sqrt.pd.256" => "__builtin_ia32_sqrtpd256_mask",
-    "llvm.x86.avx512.mask.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
-    "llvm.x86.avx512.mask.sqrt.ps.128" => "__builtin_ia32_sqrtps128_mask",
-    "llvm.x86.avx512.mask.sqrt.ps.256" => "__builtin_ia32_sqrtps256_mask",
-    "llvm.x86.avx512.mask.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.sqrt.sd" => "__builtin_ia32_sqrtsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.sqrt.ss" => "__builtin_ia32_sqrtss_round_mask",
-    "llvm.x86.avx512.mask.store.ss" => "__builtin_ia32_storess_mask",
-    "llvm.x86.avx512.mask.storeu.d.512" => "__builtin_ia32_storedqusi512_mask",
-    "llvm.x86.avx512.mask.storeu.pd.512" => "__builtin_ia32_storeupd512_mask",
-    "llvm.x86.avx512.mask.storeu.ps.512" => "__builtin_ia32_storeups512_mask",
-    "llvm.x86.avx512.mask.storeu.q.512" => "__builtin_ia32_storedqudi512_mask",
-    "llvm.x86.avx512.mask.sub.pd.128" => "__builtin_ia32_subpd128_mask",
-    "llvm.x86.avx512.mask.sub.pd.256" => "__builtin_ia32_subpd256_mask",
-    "llvm.x86.avx512.mask.sub.pd.512" => "__builtin_ia32_subpd512_mask",
-    "llvm.x86.avx512.mask.sub.ps.128" => "__builtin_ia32_subps128_mask",
-    "llvm.x86.avx512.mask.sub.ps.256" => "__builtin_ia32_subps256_mask",
-    "llvm.x86.avx512.mask.sub.ps.512" => "__builtin_ia32_subps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.sub.sd.round" => "__builtin_ia32_subsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.sub.ss.round" => "__builtin_ia32_subss_round_mask",
-    "llvm.x86.avx512.mask.valign.d.128" => "__builtin_ia32_alignd128_mask",
-    "llvm.x86.avx512.mask.valign.d.256" => "__builtin_ia32_alignd256_mask",
-    "llvm.x86.avx512.mask.valign.d.512" => "__builtin_ia32_alignd512_mask",
-    "llvm.x86.avx512.mask.valign.q.128" => "__builtin_ia32_alignq128_mask",
-    "llvm.x86.avx512.mask.valign.q.256" => "__builtin_ia32_alignq256_mask",
-    "llvm.x86.avx512.mask.valign.q.512" => "__builtin_ia32_alignq512_mask",
-    "llvm.x86.avx512.mask.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps_mask",
-    "llvm.x86.avx512.mask.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256_mask",
-    "llvm.x86.avx512.mask.vcvtph2ps.512" => "__builtin_ia32_vcvtph2ps512_mask",
-    "llvm.x86.avx512.mask.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph_mask",
-    "llvm.x86.avx512.mask.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256_mask",
-    "llvm.x86.avx512.mask.vcvtps2ph.512" => "__builtin_ia32_vcvtps2ph512_mask",
-    "llvm.x86.avx512.mask.vextractf32x4.256" => "__builtin_ia32_extractf32x4_256_mask",
-    "llvm.x86.avx512.mask.vextractf32x4.512" => "__builtin_ia32_extractf32x4_mask",
-    "llvm.x86.avx512.mask.vextractf32x8.512" => "__builtin_ia32_extractf32x8_mask",
-    "llvm.x86.avx512.mask.vextractf64x2.256" => "__builtin_ia32_extractf64x2_256_mask",
-    "llvm.x86.avx512.mask.vextractf64x2.512" => "__builtin_ia32_extractf64x2_512_mask",
-    "llvm.x86.avx512.mask.vextractf64x4.512" => "__builtin_ia32_extractf64x4_mask",
-    "llvm.x86.avx512.mask.vextracti32x4.256" => "__builtin_ia32_extracti32x4_256_mask",
-    "llvm.x86.avx512.mask.vextracti32x4.512" => "__builtin_ia32_extracti32x4_mask",
-    "llvm.x86.avx512.mask.vextracti32x8.512" => "__builtin_ia32_extracti32x8_mask",
-    "llvm.x86.avx512.mask.vextracti64x2.256" => "__builtin_ia32_extracti64x2_256_mask",
-    "llvm.x86.avx512.mask.vextracti64x2.512" => "__builtin_ia32_extracti64x2_512_mask",
-    "llvm.x86.avx512.mask.vextracti64x4.512" => "__builtin_ia32_extracti64x4_mask",
-    "llvm.x86.avx512.mask.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_mask",
-    "llvm.x86.avx512.mask.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_mask",
-    "llvm.x86.avx512.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
-    "llvm.x86.avx512.mask.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_mask",
-    "llvm.x86.avx512.mask.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_mask",
-    "llvm.x86.avx512.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
-    "llvm.x86.avx512.mask.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_mask",
-    "llvm.x86.avx512.mask.vfmadd.ss" => "__builtin_ia32_vfmaddss3_mask",
-    "llvm.x86.avx512.mask.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_mask",
-    "llvm.x86.avx512.mask.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_mask",
-    "llvm.x86.avx512.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
-    "llvm.x86.avx512.mask.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_mask",
-    "llvm.x86.avx512.mask.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_mask",
-    "llvm.x86.avx512.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
-    "llvm.x86.avx512.mask.vfnmadd.pd.128" => "__builtin_ia32_vfnmaddpd128_mask",
-    "llvm.x86.avx512.mask.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256_mask",
-    "llvm.x86.avx512.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
-    "llvm.x86.avx512.mask.vfnmadd.ps.128" => "__builtin_ia32_vfnmaddps128_mask",
-    "llvm.x86.avx512.mask.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256_mask",
-    "llvm.x86.avx512.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
-    "llvm.x86.avx512.mask.vfnmsub.pd.128" => "__builtin_ia32_vfnmsubpd128_mask",
-    "llvm.x86.avx512.mask.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256_mask",
-    "llvm.x86.avx512.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
-    "llvm.x86.avx512.mask.vfnmsub.ps.128" => "__builtin_ia32_vfnmsubps128_mask",
-    "llvm.x86.avx512.mask.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256_mask",
-    "llvm.x86.avx512.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
-    "llvm.x86.avx512.mask.vpermi2var.d.128" => "__builtin_ia32_vpermi2vard128_mask",
-    "llvm.x86.avx512.mask.vpermi2var.d.256" => "__builtin_ia32_vpermi2vard256_mask",
-    "llvm.x86.avx512.mask.vpermi2var.d.512" => "__builtin_ia32_vpermi2vard512_mask",
-    "llvm.x86.avx512.mask.vpermi2var.hi.128" => "__builtin_ia32_vpermi2varhi128_mask",
-    "llvm.x86.avx512.mask.vpermi2var.hi.256" => "__builtin_ia32_vpermi2varhi256_mask",
-    "llvm.x86.avx512.mask.vpermi2var.hi.512" => "__builtin_ia32_vpermi2varhi512_mask",
-    "llvm.x86.avx512.mask.vpermi2var.pd.128" => "__builtin_ia32_vpermi2varpd128_mask",
-    "llvm.x86.avx512.mask.vpermi2var.pd.256" => "__builtin_ia32_vpermi2varpd256_mask",
-    "llvm.x86.avx512.mask.vpermi2var.pd.512" => "__builtin_ia32_vpermi2varpd512_mask",
-    "llvm.x86.avx512.mask.vpermi2var.ps.128" => "__builtin_ia32_vpermi2varps128_mask",
-    "llvm.x86.avx512.mask.vpermi2var.ps.256" => "__builtin_ia32_vpermi2varps256_mask",
-    "llvm.x86.avx512.mask.vpermi2var.ps.512" => "__builtin_ia32_vpermi2varps512_mask",
-    "llvm.x86.avx512.mask.vpermi2var.q.128" => "__builtin_ia32_vpermi2varq128_mask",
-    "llvm.x86.avx512.mask.vpermi2var.q.256" => "__builtin_ia32_vpermi2varq256_mask",
-    "llvm.x86.avx512.mask.vpermi2var.q.512" => "__builtin_ia32_vpermi2varq512_mask",
-    "llvm.x86.avx512.mask.vpermi2var.qi.128" => "__builtin_ia32_vpermi2varqi128_mask",
-    "llvm.x86.avx512.mask.vpermi2var.qi.256" => "__builtin_ia32_vpermi2varqi256_mask",
-    "llvm.x86.avx512.mask.vpermi2var.qi.512" => "__builtin_ia32_vpermi2varqi512_mask",
-    "llvm.x86.avx512.mask.vpermilvar.pd.128" => "__builtin_ia32_vpermilvarpd_mask",
-    "llvm.x86.avx512.mask.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256_mask",
-    "llvm.x86.avx512.mask.vpermilvar.pd.512" => "__builtin_ia32_vpermilvarpd512_mask",
-    "llvm.x86.avx512.mask.vpermilvar.ps.128" => "__builtin_ia32_vpermilvarps_mask",
-    "llvm.x86.avx512.mask.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256_mask",
-    "llvm.x86.avx512.mask.vpermilvar.ps.512" => "__builtin_ia32_vpermilvarps512_mask",
-    "llvm.x86.avx512.mask.vpermt.d.512" => "__builtin_ia32_vpermt2vard512_mask",
-    "llvm.x86.avx512.mask.vpermt.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
-    "llvm.x86.avx512.mask.vpermt.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
-    "llvm.x86.avx512.mask.vpermt.q.512" => "__builtin_ia32_vpermt2varq512_mask",
-    "llvm.x86.avx512.mask.vpermt2var.d.128" => "__builtin_ia32_vpermt2vard128_mask",
-    "llvm.x86.avx512.mask.vpermt2var.d.256" => "__builtin_ia32_vpermt2vard256_mask",
-    "llvm.x86.avx512.mask.vpermt2var.d.512" => "__builtin_ia32_vpermt2vard512_mask",
-    "llvm.x86.avx512.mask.vpermt2var.hi.128" => "__builtin_ia32_vpermt2varhi128_mask",
-    "llvm.x86.avx512.mask.vpermt2var.hi.256" => "__builtin_ia32_vpermt2varhi256_mask",
-    "llvm.x86.avx512.mask.vpermt2var.hi.512" => "__builtin_ia32_vpermt2varhi512_mask",
-    "llvm.x86.avx512.mask.vpermt2var.pd.128" => "__builtin_ia32_vpermt2varpd128_mask",
-    "llvm.x86.avx512.mask.vpermt2var.pd.256" => "__builtin_ia32_vpermt2varpd256_mask",
-    "llvm.x86.avx512.mask.vpermt2var.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
-    "llvm.x86.avx512.mask.vpermt2var.ps.128" => "__builtin_ia32_vpermt2varps128_mask",
-    "llvm.x86.avx512.mask.vpermt2var.ps.256" => "__builtin_ia32_vpermt2varps256_mask",
-    "llvm.x86.avx512.mask.vpermt2var.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
-    "llvm.x86.avx512.mask.vpermt2var.q.128" => "__builtin_ia32_vpermt2varq128_mask",
-    "llvm.x86.avx512.mask.vpermt2var.q.256" => "__builtin_ia32_vpermt2varq256_mask",
-    "llvm.x86.avx512.mask.vpermt2var.q.512" => "__builtin_ia32_vpermt2varq512_mask",
-    "llvm.x86.avx512.mask.vpermt2var.qi.128" => "__builtin_ia32_vpermt2varqi128_mask",
-    "llvm.x86.avx512.mask.vpermt2var.qi.256" => "__builtin_ia32_vpermt2varqi256_mask",
-    "llvm.x86.avx512.mask.vpermt2var.qi.512" => "__builtin_ia32_vpermt2varqi512_mask",
-    "llvm.x86.avx512.mask.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_mask",
-    "llvm.x86.avx512.mask.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_mask",
-    "llvm.x86.avx512.mask.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_mask",
-    "llvm.x86.avx512.mask.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128_mask",
-    "llvm.x86.avx512.mask.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_mask",
-    "llvm.x86.avx512.mask.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_mask",
-    "llvm.x86.avx512.mask.xor.pd.128" => "__builtin_ia32_xorpd128_mask",
-    "llvm.x86.avx512.mask.xor.pd.256" => "__builtin_ia32_xorpd256_mask",
-    "llvm.x86.avx512.mask.xor.pd.512" => "__builtin_ia32_xorpd512_mask",
-    "llvm.x86.avx512.mask.xor.ps.128" => "__builtin_ia32_xorps128_mask",
-    "llvm.x86.avx512.mask.xor.ps.256" => "__builtin_ia32_xorps256_mask",
-    "llvm.x86.avx512.mask.xor.ps.512" => "__builtin_ia32_xorps512_mask",
-    "llvm.x86.avx512.mask3.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.ss" => "__builtin_ia32_vfmaddss3_mask3",
-    "llvm.x86.avx512.mask3.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_mask3",
-    "llvm.x86.avx512.mask3.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_mask3",
-    "llvm.x86.avx512.mask3.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask3",
-    "llvm.x86.avx512.mask3.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_mask3",
-    "llvm.x86.avx512.mask3.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_mask3",
-    "llvm.x86.avx512.mask3.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask3",
-    "llvm.x86.avx512.mask3.vfmsub.pd.128" => "__builtin_ia32_vfmsubpd128_mask3",
-    "llvm.x86.avx512.mask3.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256_mask3",
-    "llvm.x86.avx512.mask3.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask3",
-    "llvm.x86.avx512.mask3.vfmsub.ps.128" => "__builtin_ia32_vfmsubps128_mask3",
-    "llvm.x86.avx512.mask3.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256_mask3",
-    "llvm.x86.avx512.mask3.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask3",
-    "llvm.x86.avx512.mask3.vfmsubadd.pd.128" => "__builtin_ia32_vfmsubaddpd128_mask3",
-    "llvm.x86.avx512.mask3.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256_mask3",
-    "llvm.x86.avx512.mask3.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask3",
-    "llvm.x86.avx512.mask3.vfmsubadd.ps.128" => "__builtin_ia32_vfmsubaddps128_mask3",
-    "llvm.x86.avx512.mask3.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256_mask3",
-    "llvm.x86.avx512.mask3.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask3",
-    "llvm.x86.avx512.mask3.vfnmsub.pd.128" => "__builtin_ia32_vfnmsubpd128_mask3",
-    "llvm.x86.avx512.mask3.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256_mask3",
-    "llvm.x86.avx512.mask3.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask3",
-    "llvm.x86.avx512.mask3.vfnmsub.ps.128" => "__builtin_ia32_vfnmsubps128_mask3",
-    "llvm.x86.avx512.mask3.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256_mask3",
-    "llvm.x86.avx512.mask3.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask3",
-    "llvm.x86.avx512.maskz.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.ps.128" => "__builtin_ia32_fixupimmps128_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.ps.256" => "__builtin_ia32_fixupimmps256_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.ps.512" => "__builtin_ia32_fixupimmps512_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.sd" => "__builtin_ia32_fixupimmsd_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.ss" => "__builtin_ia32_fixupimmss_maskz",
-    "llvm.x86.avx512.maskz.pternlog.d.128" => "__builtin_ia32_pternlogd128_maskz",
-    "llvm.x86.avx512.maskz.pternlog.d.256" => "__builtin_ia32_pternlogd256_maskz",
-    "llvm.x86.avx512.maskz.pternlog.d.512" => "__builtin_ia32_pternlogd512_maskz",
-    "llvm.x86.avx512.maskz.pternlog.q.128" => "__builtin_ia32_pternlogq128_maskz",
-    "llvm.x86.avx512.maskz.pternlog.q.256" => "__builtin_ia32_pternlogq256_maskz",
-    "llvm.x86.avx512.maskz.pternlog.q.512" => "__builtin_ia32_pternlogq512_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.ss" => "__builtin_ia32_vfmaddss3_maskz",
-    "llvm.x86.avx512.maskz.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_maskz",
-    "llvm.x86.avx512.maskz.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_maskz",
-    "llvm.x86.avx512.maskz.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_maskz",
-    "llvm.x86.avx512.maskz.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_maskz",
-    "llvm.x86.avx512.maskz.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_maskz",
-    "llvm.x86.avx512.maskz.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.d.128" => "__builtin_ia32_vpermt2vard128_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.d.256" => "__builtin_ia32_vpermt2vard256_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.d.512" => "__builtin_ia32_vpermt2vard512_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.hi.128" => "__builtin_ia32_vpermt2varhi128_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.hi.256" => "__builtin_ia32_vpermt2varhi256_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.hi.512" => "__builtin_ia32_vpermt2varhi512_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.pd.128" => "__builtin_ia32_vpermt2varpd128_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.pd.256" => "__builtin_ia32_vpermt2varpd256_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.pd.512" => "__builtin_ia32_vpermt2varpd512_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.ps.128" => "__builtin_ia32_vpermt2varps128_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.ps.256" => "__builtin_ia32_vpermt2varps256_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.ps.512" => "__builtin_ia32_vpermt2varps512_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.q.128" => "__builtin_ia32_vpermt2varq128_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.q.256" => "__builtin_ia32_vpermt2varq256_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.q.512" => "__builtin_ia32_vpermt2varq512_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.qi.128" => "__builtin_ia32_vpermt2varqi128_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.qi.256" => "__builtin_ia32_vpermt2varqi256_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.qi.512" => "__builtin_ia32_vpermt2varqi512_maskz",
-    "llvm.x86.avx512.maskz.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_maskz",
-    "llvm.x86.avx512.maskz.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_maskz",
-    "llvm.x86.avx512.maskz.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_maskz",
-    "llvm.x86.avx512.maskz.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128_maskz",
-    "llvm.x86.avx512.maskz.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_maskz",
-    "llvm.x86.avx512.maskz.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_maskz",
-    "llvm.x86.avx512.max.pd.512" => "__builtin_ia32_maxpd512",
-    "llvm.x86.avx512.max.ps.512" => "__builtin_ia32_maxps512",
-    "llvm.x86.avx512.min.pd.512" => "__builtin_ia32_minpd512",
-    "llvm.x86.avx512.min.ps.512" => "__builtin_ia32_minps512",
-    "llvm.x86.avx512.movntdqa" => "__builtin_ia32_movntdqa512",
-    "llvm.x86.avx512.mul.pd.512" => "__builtin_ia32_mulpd512",
-    "llvm.x86.avx512.mul.ps.512" => "__builtin_ia32_mulps512",
-    "llvm.x86.avx512.packssdw.512" => "__builtin_ia32_packssdw512",
-    "llvm.x86.avx512.packsswb.512" => "__builtin_ia32_packsswb512",
-    "llvm.x86.avx512.packusdw.512" => "__builtin_ia32_packusdw512",
-    "llvm.x86.avx512.packuswb.512" => "__builtin_ia32_packuswb512",
-    "llvm.x86.avx512.pavg.b.512" => "__builtin_ia32_pavgb512",
-    "llvm.x86.avx512.pavg.w.512" => "__builtin_ia32_pavgw512",
-    "llvm.x86.avx512.pbroadcastd.512" => "__builtin_ia32_pbroadcastd512",
-    "llvm.x86.avx512.pbroadcastq.512" => "__builtin_ia32_pbroadcastq512",
-    "llvm.x86.avx512.permvar.df.256" => "__builtin_ia32_permvardf256",
-    "llvm.x86.avx512.permvar.df.512" => "__builtin_ia32_permvardf512",
-    "llvm.x86.avx512.permvar.di.256" => "__builtin_ia32_permvardi256",
-    "llvm.x86.avx512.permvar.di.512" => "__builtin_ia32_permvardi512",
-    "llvm.x86.avx512.permvar.hi.128" => "__builtin_ia32_permvarhi128",
-    "llvm.x86.avx512.permvar.hi.256" => "__builtin_ia32_permvarhi256",
-    "llvm.x86.avx512.permvar.hi.512" => "__builtin_ia32_permvarhi512",
-    "llvm.x86.avx512.permvar.qi.128" => "__builtin_ia32_permvarqi128",
-    "llvm.x86.avx512.permvar.qi.256" => "__builtin_ia32_permvarqi256",
-    "llvm.x86.avx512.permvar.qi.512" => "__builtin_ia32_permvarqi512",
-    "llvm.x86.avx512.permvar.sf.512" => "__builtin_ia32_permvarsf512",
-    "llvm.x86.avx512.permvar.si.512" => "__builtin_ia32_permvarsi512",
-    "llvm.x86.avx512.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512",
-    "llvm.x86.avx512.pmaddw.d.512" => "__builtin_ia32_pmaddwd512",
-    "llvm.x86.avx512.pmovzxbd" => "__builtin_ia32_pmovzxbd512",
-    "llvm.x86.avx512.pmovzxbq" => "__builtin_ia32_pmovzxbq512",
-    "llvm.x86.avx512.pmovzxdq" => "__builtin_ia32_pmovzxdq512",
-    "llvm.x86.avx512.pmovzxwd" => "__builtin_ia32_pmovzxwd512",
-    "llvm.x86.avx512.pmovzxwq" => "__builtin_ia32_pmovzxwq512",
-    "llvm.x86.avx512.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512",
-    "llvm.x86.avx512.pmulh.w.512" => "__builtin_ia32_pmulhw512",
-    "llvm.x86.avx512.pmulhu.w.512" => "__builtin_ia32_pmulhuw512",
-    "llvm.x86.avx512.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128",
-    "llvm.x86.avx512.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256",
-    "llvm.x86.avx512.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512",
-    "llvm.x86.avx512.psad.bw.512" => "__builtin_ia32_psadbw512",
-    "llvm.x86.avx512.pshuf.b.512" => "__builtin_ia32_pshufb512",
-    "llvm.x86.avx512.psll.d.512" => "__builtin_ia32_pslld512",
-    "llvm.x86.avx512.psll.dq" => "__builtin_ia32_pslldqi512",
-    "llvm.x86.avx512.psll.dq.bs" => "__builtin_ia32_pslldqi512_byteshift",
-    "llvm.x86.avx512.psll.q.512" => "__builtin_ia32_psllq512",
-    "llvm.x86.avx512.psll.w.512" => "__builtin_ia32_psllw512",
-    "llvm.x86.avx512.pslli.d.512" => "__builtin_ia32_pslldi512",
-    "llvm.x86.avx512.pslli.q.512" => "__builtin_ia32_psllqi512",
-    "llvm.x86.avx512.pslli.w.512" => "__builtin_ia32_psllwi512",
-    "llvm.x86.avx512.psllv.d.512" => "__builtin_ia32_psllv16si",
-    "llvm.x86.avx512.psllv.q.512" => "__builtin_ia32_psllv8di",
-    "llvm.x86.avx512.psllv.w.128" => "__builtin_ia32_psllv8hi",
-    "llvm.x86.avx512.psllv.w.256" => "__builtin_ia32_psllv16hi",
-    "llvm.x86.avx512.psllv.w.512" => "__builtin_ia32_psllv32hi",
-    "llvm.x86.avx512.psra.d.512" => "__builtin_ia32_psrad512",
-    "llvm.x86.avx512.psra.q.128" => "__builtin_ia32_psraq128",
-    "llvm.x86.avx512.psra.q.256" => "__builtin_ia32_psraq256",
-    "llvm.x86.avx512.psra.q.512" => "__builtin_ia32_psraq512",
-    "llvm.x86.avx512.psra.w.512" => "__builtin_ia32_psraw512",
-    "llvm.x86.avx512.psrai.d.512" => "__builtin_ia32_psradi512",
-    "llvm.x86.avx512.psrai.q.128" => "__builtin_ia32_psraqi128",
-    "llvm.x86.avx512.psrai.q.256" => "__builtin_ia32_psraqi256",
-    "llvm.x86.avx512.psrai.q.512" => "__builtin_ia32_psraqi512",
-    "llvm.x86.avx512.psrai.w.512" => "__builtin_ia32_psrawi512",
-    "llvm.x86.avx512.psrav.d.512" => "__builtin_ia32_psrav16si",
-    "llvm.x86.avx512.psrav.q.128" => "__builtin_ia32_psravq128",
-    "llvm.x86.avx512.psrav.q.256" => "__builtin_ia32_psravq256",
-    "llvm.x86.avx512.psrav.q.512" => "__builtin_ia32_psrav8di",
-    "llvm.x86.avx512.psrav.w.128" => "__builtin_ia32_psrav8hi",
-    "llvm.x86.avx512.psrav.w.256" => "__builtin_ia32_psrav16hi",
-    "llvm.x86.avx512.psrav.w.512" => "__builtin_ia32_psrav32hi",
-    "llvm.x86.avx512.psrl.d.512" => "__builtin_ia32_psrld512",
-    "llvm.x86.avx512.psrl.dq" => "__builtin_ia32_psrldqi512",
-    "llvm.x86.avx512.psrl.dq.bs" => "__builtin_ia32_psrldqi512_byteshift",
-    "llvm.x86.avx512.psrl.q.512" => "__builtin_ia32_psrlq512",
-    "llvm.x86.avx512.psrl.w.512" => "__builtin_ia32_psrlw512",
-    "llvm.x86.avx512.psrli.d.512" => "__builtin_ia32_psrldi512",
-    "llvm.x86.avx512.psrli.q.512" => "__builtin_ia32_psrlqi512",
-    "llvm.x86.avx512.psrli.w.512" => "__builtin_ia32_psrlwi512",
-    "llvm.x86.avx512.psrlv.d.512" => "__builtin_ia32_psrlv16si",
-    "llvm.x86.avx512.psrlv.q.512" => "__builtin_ia32_psrlv8di",
-    "llvm.x86.avx512.psrlv.w.128" => "__builtin_ia32_psrlv8hi",
-    "llvm.x86.avx512.psrlv.w.256" => "__builtin_ia32_psrlv16hi",
-    "llvm.x86.avx512.psrlv.w.512" => "__builtin_ia32_psrlv32hi",
-    "llvm.x86.avx512.pternlog.d.128" => "__builtin_ia32_pternlogd128",
-    "llvm.x86.avx512.pternlog.d.256" => "__builtin_ia32_pternlogd256",
-    "llvm.x86.avx512.pternlog.d.512" => "__builtin_ia32_pternlogd512",
-    "llvm.x86.avx512.pternlog.q.128" => "__builtin_ia32_pternlogq128",
-    "llvm.x86.avx512.pternlog.q.256" => "__builtin_ia32_pternlogq256",
-    "llvm.x86.avx512.pternlog.q.512" => "__builtin_ia32_pternlogq512",
-    "llvm.x86.avx512.ptestm.b.128" => "__builtin_ia32_ptestmb128",
-    "llvm.x86.avx512.ptestm.b.256" => "__builtin_ia32_ptestmb256",
-    "llvm.x86.avx512.ptestm.b.512" => "__builtin_ia32_ptestmb512",
-    "llvm.x86.avx512.ptestm.d.128" => "__builtin_ia32_ptestmd128",
-    "llvm.x86.avx512.ptestm.d.256" => "__builtin_ia32_ptestmd256",
-    "llvm.x86.avx512.ptestm.d.512" => "__builtin_ia32_ptestmd512",
-    "llvm.x86.avx512.ptestm.q.128" => "__builtin_ia32_ptestmq128",
-    "llvm.x86.avx512.ptestm.q.256" => "__builtin_ia32_ptestmq256",
-    "llvm.x86.avx512.ptestm.q.512" => "__builtin_ia32_ptestmq512",
-    "llvm.x86.avx512.ptestm.w.128" => "__builtin_ia32_ptestmw128",
-    "llvm.x86.avx512.ptestm.w.256" => "__builtin_ia32_ptestmw256",
-    "llvm.x86.avx512.ptestm.w.512" => "__builtin_ia32_ptestmw512",
-    "llvm.x86.avx512.ptestnm.b.128" => "__builtin_ia32_ptestnmb128",
-    "llvm.x86.avx512.ptestnm.b.256" => "__builtin_ia32_ptestnmb256",
-    "llvm.x86.avx512.ptestnm.b.512" => "__builtin_ia32_ptestnmb512",
-    "llvm.x86.avx512.ptestnm.d.128" => "__builtin_ia32_ptestnmd128",
-    "llvm.x86.avx512.ptestnm.d.256" => "__builtin_ia32_ptestnmd256",
-    "llvm.x86.avx512.ptestnm.d.512" => "__builtin_ia32_ptestnmd512",
-    "llvm.x86.avx512.ptestnm.q.128" => "__builtin_ia32_ptestnmq128",
-    "llvm.x86.avx512.ptestnm.q.256" => "__builtin_ia32_ptestnmq256",
-    "llvm.x86.avx512.ptestnm.q.512" => "__builtin_ia32_ptestnmq512",
-    "llvm.x86.avx512.ptestnm.w.128" => "__builtin_ia32_ptestnmw128",
-    "llvm.x86.avx512.ptestnm.w.256" => "__builtin_ia32_ptestnmw256",
-    "llvm.x86.avx512.ptestnm.w.512" => "__builtin_ia32_ptestnmw512",
-    "llvm.x86.avx512.rcp14.pd.128" => "__builtin_ia32_rcp14pd128_mask",
-    "llvm.x86.avx512.rcp14.pd.256" => "__builtin_ia32_rcp14pd256_mask",
-    "llvm.x86.avx512.rcp14.pd.512" => "__builtin_ia32_rcp14pd512_mask",
-    "llvm.x86.avx512.rcp14.ps.128" => "__builtin_ia32_rcp14ps128_mask",
-    "llvm.x86.avx512.rcp14.ps.256" => "__builtin_ia32_rcp14ps256_mask",
-    "llvm.x86.avx512.rcp14.ps.512" => "__builtin_ia32_rcp14ps512_mask",
-    "llvm.x86.avx512.rcp14.sd" => "__builtin_ia32_rcp14sd_mask",
-    "llvm.x86.avx512.rcp14.ss" => "__builtin_ia32_rcp14ss_mask",
-    "llvm.x86.avx512.rcp28.pd" => "__builtin_ia32_rcp28pd_mask",
-    "llvm.x86.avx512.rcp28.ps" => "__builtin_ia32_rcp28ps_mask",
-    "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
-    "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
-    "llvm.x86.avx512.rndscale.sd" => "__builtin_ia32_rndscalesd",
-    "llvm.x86.avx512.rndscale.ss" => "__builtin_ia32_rndscaless",
-    "llvm.x86.avx512.rsqrt14.pd.128" => "__builtin_ia32_rsqrt14pd128_mask",
-    "llvm.x86.avx512.rsqrt14.pd.256" => "__builtin_ia32_rsqrt14pd256_mask",
-    "llvm.x86.avx512.rsqrt14.pd.512" => "__builtin_ia32_rsqrt14pd512_mask",
-    "llvm.x86.avx512.rsqrt14.ps.128" => "__builtin_ia32_rsqrt14ps128_mask",
-    "llvm.x86.avx512.rsqrt14.ps.256" => "__builtin_ia32_rsqrt14ps256_mask",
-    "llvm.x86.avx512.rsqrt14.ps.512" => "__builtin_ia32_rsqrt14ps512_mask",
-    "llvm.x86.avx512.rsqrt14.sd" => "__builtin_ia32_rsqrt14sd_mask",
-    "llvm.x86.avx512.rsqrt14.ss" => "__builtin_ia32_rsqrt14ss_mask",
-    "llvm.x86.avx512.rsqrt28.pd" => "__builtin_ia32_rsqrt28pd_mask",
-    "llvm.x86.avx512.rsqrt28.ps" => "__builtin_ia32_rsqrt28ps_mask",
-    "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
-    "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
-    "llvm.x86.avx512.scatter.dpd.512" => "__builtin_ia32_scattersiv8df",
-    "llvm.x86.avx512.scatter.dpi.512" => "__builtin_ia32_scattersiv16si",
-    "llvm.x86.avx512.scatter.dpq.512" => "__builtin_ia32_scattersiv8di",
-    "llvm.x86.avx512.scatter.dps.512" => "__builtin_ia32_scattersiv16sf",
-    "llvm.x86.avx512.scatter.qpd.512" => "__builtin_ia32_scatterdiv8df",
-    "llvm.x86.avx512.scatter.qpi.512" => "__builtin_ia32_scatterdiv16si",
-    "llvm.x86.avx512.scatter.qpq.512" => "__builtin_ia32_scatterdiv8di",
-    "llvm.x86.avx512.scatter.qps.512" => "__builtin_ia32_scatterdiv16sf",
-    "llvm.x86.avx512.scatterdiv2.df" => "__builtin_ia32_scatterdiv2df",
-    "llvm.x86.avx512.scatterdiv2.di" => "__builtin_ia32_scatterdiv2di",
-    "llvm.x86.avx512.scatterdiv4.df" => "__builtin_ia32_scatterdiv4df",
-    "llvm.x86.avx512.scatterdiv4.di" => "__builtin_ia32_scatterdiv4di",
-    "llvm.x86.avx512.scatterdiv4.sf" => "__builtin_ia32_scatterdiv4sf",
-    "llvm.x86.avx512.scatterdiv4.si" => "__builtin_ia32_scatterdiv4si",
-    "llvm.x86.avx512.scatterdiv8.sf" => "__builtin_ia32_scatterdiv8sf",
-    "llvm.x86.avx512.scatterdiv8.si" => "__builtin_ia32_scatterdiv8si",
-    "llvm.x86.avx512.scatterpf.dpd.512" => "__builtin_ia32_scatterpfdpd",
-    "llvm.x86.avx512.scatterpf.dps.512" => "__builtin_ia32_scatterpfdps",
-    "llvm.x86.avx512.scatterpf.qpd.512" => "__builtin_ia32_scatterpfqpd",
-    "llvm.x86.avx512.scatterpf.qps.512" => "__builtin_ia32_scatterpfqps",
-    "llvm.x86.avx512.scattersiv2.df" => "__builtin_ia32_scattersiv2df",
-    "llvm.x86.avx512.scattersiv2.di" => "__builtin_ia32_scattersiv2di",
-    "llvm.x86.avx512.scattersiv4.df" => "__builtin_ia32_scattersiv4df",
-    "llvm.x86.avx512.scattersiv4.di" => "__builtin_ia32_scattersiv4di",
-    "llvm.x86.avx512.scattersiv4.sf" => "__builtin_ia32_scattersiv4sf",
-    "llvm.x86.avx512.scattersiv4.si" => "__builtin_ia32_scattersiv4si",
-    "llvm.x86.avx512.scattersiv8.sf" => "__builtin_ia32_scattersiv8sf",
-    "llvm.x86.avx512.scattersiv8.si" => "__builtin_ia32_scattersiv8si",
-    "llvm.x86.avx512.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
-    "llvm.x86.avx512.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
-    "llvm.x86.avx512.sqrt.sd" => "__builtin_ia32_sqrtrndsd",
-    "llvm.x86.avx512.sqrt.ss" => "__builtin_ia32_sqrtrndss",
-    "llvm.x86.avx512.sub.pd.512" => "__builtin_ia32_subpd512",
-    "llvm.x86.avx512.sub.ps.512" => "__builtin_ia32_subps512",
-    "llvm.x86.avx512.vbroadcast.sd.512" => "__builtin_ia32_vbroadcastsd512",
-    "llvm.x86.avx512.vbroadcast.sd.pd.512" => "__builtin_ia32_vbroadcastsd_pd512",
-    "llvm.x86.avx512.vbroadcast.ss.512" => "__builtin_ia32_vbroadcastss512",
-    "llvm.x86.avx512.vbroadcast.ss.ps.512" => "__builtin_ia32_vbroadcastss_ps512",
-    "llvm.x86.avx512.vcomi.sd" => "__builtin_ia32_vcomisd",
-    "llvm.x86.avx512.vcomi.ss" => "__builtin_ia32_vcomiss",
-    "llvm.x86.avx512.vcvtsd2si32" => "__builtin_ia32_vcvtsd2si32",
-    "llvm.x86.avx512.vcvtsd2si64" => "__builtin_ia32_vcvtsd2si64",
-    "llvm.x86.avx512.vcvtsd2usi32" => "__builtin_ia32_vcvtsd2usi32",
-    "llvm.x86.avx512.vcvtsd2usi64" => "__builtin_ia32_vcvtsd2usi64",
-    "llvm.x86.avx512.vcvtss2si32" => "__builtin_ia32_vcvtss2si32",
-    "llvm.x86.avx512.vcvtss2si64" => "__builtin_ia32_vcvtss2si64",
-    "llvm.x86.avx512.vcvtss2usi32" => "__builtin_ia32_vcvtss2usi32",
-    "llvm.x86.avx512.vcvtss2usi64" => "__builtin_ia32_vcvtss2usi64",
-    "llvm.x86.avx512.vpdpbusd.128" => "__builtin_ia32_vpdpbusd128",
-    "llvm.x86.avx512.vpdpbusd.256" => "__builtin_ia32_vpdpbusd256",
-    "llvm.x86.avx512.vpdpbusd.512" => "__builtin_ia32_vpdpbusd512",
-    "llvm.x86.avx512.vpdpbusds.128" => "__builtin_ia32_vpdpbusds128",
-    "llvm.x86.avx512.vpdpbusds.256" => "__builtin_ia32_vpdpbusds256",
-    "llvm.x86.avx512.vpdpbusds.512" => "__builtin_ia32_vpdpbusds512",
-    "llvm.x86.avx512.vpdpwssd.128" => "__builtin_ia32_vpdpwssd128",
-    "llvm.x86.avx512.vpdpwssd.256" => "__builtin_ia32_vpdpwssd256",
-    "llvm.x86.avx512.vpdpwssd.512" => "__builtin_ia32_vpdpwssd512",
-    "llvm.x86.avx512.vpdpwssds.128" => "__builtin_ia32_vpdpwssds128",
-    "llvm.x86.avx512.vpdpwssds.256" => "__builtin_ia32_vpdpwssds256",
-    "llvm.x86.avx512.vpdpwssds.512" => "__builtin_ia32_vpdpwssds512",
-    "llvm.x86.avx512.vpermi2var.d.128" => "__builtin_ia32_vpermi2vard128",
-    "llvm.x86.avx512.vpermi2var.d.256" => "__builtin_ia32_vpermi2vard256",
-    "llvm.x86.avx512.vpermi2var.d.512" => "__builtin_ia32_vpermi2vard512",
-    "llvm.x86.avx512.vpermi2var.hi.128" => "__builtin_ia32_vpermi2varhi128",
-    "llvm.x86.avx512.vpermi2var.hi.256" => "__builtin_ia32_vpermi2varhi256",
-    "llvm.x86.avx512.vpermi2var.hi.512" => "__builtin_ia32_vpermi2varhi512",
-    "llvm.x86.avx512.vpermi2var.pd.128" => "__builtin_ia32_vpermi2varpd128",
-    "llvm.x86.avx512.vpermi2var.pd.256" => "__builtin_ia32_vpermi2varpd256",
-    "llvm.x86.avx512.vpermi2var.pd.512" => "__builtin_ia32_vpermi2varpd512",
-    "llvm.x86.avx512.vpermi2var.ps.128" => "__builtin_ia32_vpermi2varps128",
-    "llvm.x86.avx512.vpermi2var.ps.256" => "__builtin_ia32_vpermi2varps256",
-    "llvm.x86.avx512.vpermi2var.ps.512" => "__builtin_ia32_vpermi2varps512",
-    "llvm.x86.avx512.vpermi2var.q.128" => "__builtin_ia32_vpermi2varq128",
-    "llvm.x86.avx512.vpermi2var.q.256" => "__builtin_ia32_vpermi2varq256",
-    "llvm.x86.avx512.vpermi2var.q.512" => "__builtin_ia32_vpermi2varq512",
-    "llvm.x86.avx512.vpermi2var.qi.128" => "__builtin_ia32_vpermi2varqi128",
-    "llvm.x86.avx512.vpermi2var.qi.256" => "__builtin_ia32_vpermi2varqi256",
-    "llvm.x86.avx512.vpermi2var.qi.512" => "__builtin_ia32_vpermi2varqi512",
-    "llvm.x86.avx512.vpermilvar.pd.512" => "__builtin_ia32_vpermilvarpd512",
-    "llvm.x86.avx512.vpermilvar.ps.512" => "__builtin_ia32_vpermilvarps512",
-    "llvm.x86.avx512.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128",
-    "llvm.x86.avx512.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256",
-    "llvm.x86.avx512.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512",
-    "llvm.x86.avx512.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128",
-    "llvm.x86.avx512.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256",
-    "llvm.x86.avx512.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512",
-    "llvm.x86.avx512bf16.cvtne2ps2bf16.128" => "__builtin_ia32_cvtne2ps2bf16_128",
-    "llvm.x86.avx512bf16.cvtne2ps2bf16.256" => "__builtin_ia32_cvtne2ps2bf16_256",
-    "llvm.x86.avx512bf16.cvtne2ps2bf16.512" => "__builtin_ia32_cvtne2ps2bf16_512",
-    "llvm.x86.avx512bf16.cvtneps2bf16.256" => "__builtin_ia32_cvtneps2bf16_256",
-    "llvm.x86.avx512bf16.cvtneps2bf16.512" => "__builtin_ia32_cvtneps2bf16_512",
-    "llvm.x86.avx512bf16.dpbf16ps.128" => "__builtin_ia32_dpbf16ps_128",
-    "llvm.x86.avx512bf16.dpbf16ps.256" => "__builtin_ia32_dpbf16ps_256",
-    "llvm.x86.avx512bf16.dpbf16ps.512" => "__builtin_ia32_dpbf16ps_512",
-    "llvm.x86.avx512fp16.add.ph.512" => "__builtin_ia32_addph512",
-    "llvm.x86.avx512fp16.div.ph.512" => "__builtin_ia32_divph512",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.add.sh.round" => "__builtin_ia32_addsh_round_mask",
-    "llvm.x86.avx512fp16.mask.cmp.sh" => "__builtin_ia32_cmpsh_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.div.sh.round" => "__builtin_ia32_divsh_round_mask",
-    "llvm.x86.avx512fp16.mask.fpclass.sh" => "__builtin_ia32_fpclasssh_mask",
-    "llvm.x86.avx512fp16.mask.getexp.ph.128" => "__builtin_ia32_getexpph128_mask",
-    "llvm.x86.avx512fp16.mask.getexp.ph.256" => "__builtin_ia32_getexpph256_mask",
-    "llvm.x86.avx512fp16.mask.getexp.ph.512" => "__builtin_ia32_getexpph512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.getexp.sh" => "__builtin_ia32_getexpsh128_round_mask",
-    "llvm.x86.avx512fp16.mask.getmant.ph.128" => "__builtin_ia32_getmantph128_mask",
-    "llvm.x86.avx512fp16.mask.getmant.ph.256" => "__builtin_ia32_getmantph256_mask",
-    "llvm.x86.avx512fp16.mask.getmant.ph.512" => "__builtin_ia32_getmantph512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.getmant.sh" => "__builtin_ia32_getmantsh_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.max.sh.round" => "__builtin_ia32_maxsh_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.min.sh.round" => "__builtin_ia32_minsh_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.mul.sh.round" => "__builtin_ia32_mulsh_round_mask",
-    "llvm.x86.avx512fp16.mask.rcp.ph.128" => "__builtin_ia32_rcpph128_mask",
-    "llvm.x86.avx512fp16.mask.rcp.ph.256" => "__builtin_ia32_rcpph256_mask",
-    "llvm.x86.avx512fp16.mask.rcp.ph.512" => "__builtin_ia32_rcpph512_mask",
-    "llvm.x86.avx512fp16.mask.rcp.sh" => "__builtin_ia32_rcpsh_mask",
-    "llvm.x86.avx512fp16.mask.reduce.ph.128" => "__builtin_ia32_reduceph128_mask",
-    "llvm.x86.avx512fp16.mask.reduce.ph.256" => "__builtin_ia32_reduceph256_mask",
-    "llvm.x86.avx512fp16.mask.reduce.ph.512" => "__builtin_ia32_reduceph512_mask",
-    "llvm.x86.avx512fp16.mask.reduce.sh" => "__builtin_ia32_reducesh_mask",
-    "llvm.x86.avx512fp16.mask.rndscale.ph.128" => "__builtin_ia32_rndscaleph_128_mask",
-    "llvm.x86.avx512fp16.mask.rndscale.ph.256" => "__builtin_ia32_rndscaleph_256_mask",
-    "llvm.x86.avx512fp16.mask.rndscale.ph.512" => "__builtin_ia32_rndscaleph_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.rndscale.sh" => "__builtin_ia32_rndscalesh_round_mask",
-    "llvm.x86.avx512fp16.mask.rsqrt.ph.128" => "__builtin_ia32_rsqrtph128_mask",
-    "llvm.x86.avx512fp16.mask.rsqrt.ph.256" => "__builtin_ia32_rsqrtph256_mask",
-    "llvm.x86.avx512fp16.mask.rsqrt.ph.512" => "__builtin_ia32_rsqrtph512_mask",
-    "llvm.x86.avx512fp16.mask.rsqrt.sh" => "__builtin_ia32_rsqrtsh_mask",
-    "llvm.x86.avx512fp16.mask.scalef.ph.128" => "__builtin_ia32_scalefph128_mask",
-    "llvm.x86.avx512fp16.mask.scalef.ph.256" => "__builtin_ia32_scalefph256_mask",
-    "llvm.x86.avx512fp16.mask.scalef.ph.512" => "__builtin_ia32_scalefph512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.scalef.sh" => "__builtin_ia32_scalefsh_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.sub.sh.round" => "__builtin_ia32_subsh_round_mask",
-    "llvm.x86.avx512fp16.mask.vcvtdq2ph.128" => "__builtin_ia32_vcvtdq2ph128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtpd2ph.128" => "__builtin_ia32_vcvtpd2ph128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtpd2ph.256" => "__builtin_ia32_vcvtpd2ph256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtpd2ph.512" => "__builtin_ia32_vcvtpd2ph512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2dq.128" => "__builtin_ia32_vcvtph2dq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2dq.256" => "__builtin_ia32_vcvtph2dq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2dq.512" => "__builtin_ia32_vcvtph2dq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2pd.128" => "__builtin_ia32_vcvtph2pd128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2pd.256" => "__builtin_ia32_vcvtph2pd256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2pd.512" => "__builtin_ia32_vcvtph2pd512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2psx.128" => "__builtin_ia32_vcvtph2psx128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2psx.256" => "__builtin_ia32_vcvtph2psx256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2psx.512" => "__builtin_ia32_vcvtph2psx512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2qq.128" => "__builtin_ia32_vcvtph2qq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2qq.256" => "__builtin_ia32_vcvtph2qq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2qq.512" => "__builtin_ia32_vcvtph2qq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2udq.128" => "__builtin_ia32_vcvtph2udq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2udq.256" => "__builtin_ia32_vcvtph2udq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2udq.512" => "__builtin_ia32_vcvtph2udq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2uqq.128" => "__builtin_ia32_vcvtph2uqq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2uqq.256" => "__builtin_ia32_vcvtph2uqq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2uqq.512" => "__builtin_ia32_vcvtph2uqq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2uw.128" => "__builtin_ia32_vcvtph2uw128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2uw.256" => "__builtin_ia32_vcvtph2uw256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2uw.512" => "__builtin_ia32_vcvtph2uw512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2w.128" => "__builtin_ia32_vcvtph2w128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2w.256" => "__builtin_ia32_vcvtph2w256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2w.512" => "__builtin_ia32_vcvtph2w512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtps2phx.128" => "__builtin_ia32_vcvtps2phx128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtps2phx.256" => "__builtin_ia32_vcvtps2phx256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtps2phx.512" => "__builtin_ia32_vcvtps2phx512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtqq2ph.128" => "__builtin_ia32_vcvtqq2ph128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtqq2ph.256" => "__builtin_ia32_vcvtqq2ph256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.vcvtsd2sh.round" => "__builtin_ia32_vcvtsd2sh_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.vcvtsh2sd.round" => "__builtin_ia32_vcvtsh2sd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.vcvtsh2ss.round" => "__builtin_ia32_vcvtsh2ss_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.vcvtss2sh.round" => "__builtin_ia32_vcvtss2sh_round_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2dq.128" => "__builtin_ia32_vcvttph2dq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2dq.256" => "__builtin_ia32_vcvttph2dq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2dq.512" => "__builtin_ia32_vcvttph2dq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2qq.128" => "__builtin_ia32_vcvttph2qq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2qq.256" => "__builtin_ia32_vcvttph2qq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2qq.512" => "__builtin_ia32_vcvttph2qq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2udq.128" => "__builtin_ia32_vcvttph2udq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2udq.256" => "__builtin_ia32_vcvttph2udq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2udq.512" => "__builtin_ia32_vcvttph2udq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2uqq.128" => "__builtin_ia32_vcvttph2uqq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2uqq.256" => "__builtin_ia32_vcvttph2uqq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2uqq.512" => "__builtin_ia32_vcvttph2uqq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2uw.128" => "__builtin_ia32_vcvttph2uw128_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2uw.256" => "__builtin_ia32_vcvttph2uw256_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2uw.512" => "__builtin_ia32_vcvttph2uw512_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2w.128" => "__builtin_ia32_vcvttph2w128_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2w.256" => "__builtin_ia32_vcvttph2w256_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2w.512" => "__builtin_ia32_vcvttph2w512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtudq2ph.128" => "__builtin_ia32_vcvtudq2ph128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtuqq2ph.128" => "__builtin_ia32_vcvtuqq2ph128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtuqq2ph.256" => "__builtin_ia32_vcvtuqq2ph256_mask",
-    "llvm.x86.avx512fp16.mask.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_mask",
-    "llvm.x86.avx512fp16.mask.vfcmadd.cph.256" => "__builtin_ia32_vfcmaddcph256_mask",
-    "llvm.x86.avx512fp16.mask.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_mask3",
-    "llvm.x86.avx512fp16.mask.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_mask",
-    "llvm.x86.avx512fp16.mask.vfcmul.cph.128" => "__builtin_ia32_vfcmulcph128_mask",
-    "llvm.x86.avx512fp16.mask.vfcmul.cph.256" => "__builtin_ia32_vfcmulcph256_mask",
-    "llvm.x86.avx512fp16.mask.vfcmul.cph.512" => "__builtin_ia32_vfcmulcph512_mask",
-    "llvm.x86.avx512fp16.mask.vfcmul.csh" => "__builtin_ia32_vfcmulcsh_mask",
-    "llvm.x86.avx512fp16.mask.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_mask",
-    "llvm.x86.avx512fp16.mask.vfmadd.cph.256" => "__builtin_ia32_vfmaddcph256_mask",
-    "llvm.x86.avx512fp16.mask.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_mask3",
-    "llvm.x86.avx512fp16.mask.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_mask",
-    "llvm.x86.avx512fp16.mask.vfmul.cph.128" => "__builtin_ia32_vfmulcph128_mask",
-    "llvm.x86.avx512fp16.mask.vfmul.cph.256" => "__builtin_ia32_vfmulcph256_mask",
-    "llvm.x86.avx512fp16.mask.vfmul.cph.512" => "__builtin_ia32_vfmulcph512_mask",
-    "llvm.x86.avx512fp16.mask.vfmul.csh" => "__builtin_ia32_vfmulcsh_mask",
-    "llvm.x86.avx512fp16.maskz.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_maskz",
-    "llvm.x86.avx512fp16.maskz.vfcmadd.cph.256" => "__builtin_ia32_vfcmaddcph256_maskz",
-    "llvm.x86.avx512fp16.maskz.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_maskz",
-    "llvm.x86.avx512fp16.maskz.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_maskz",
-    "llvm.x86.avx512fp16.maskz.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_maskz",
-    "llvm.x86.avx512fp16.maskz.vfmadd.cph.256" => "__builtin_ia32_vfmaddcph256_maskz",
-    "llvm.x86.avx512fp16.maskz.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_maskz",
-    "llvm.x86.avx512fp16.maskz.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_maskz",
-    "llvm.x86.avx512fp16.max.ph.128" => "__builtin_ia32_maxph128",
-    "llvm.x86.avx512fp16.max.ph.256" => "__builtin_ia32_maxph256",
-    "llvm.x86.avx512fp16.max.ph.512" => "__builtin_ia32_maxph512",
-    "llvm.x86.avx512fp16.min.ph.128" => "__builtin_ia32_minph128",
-    "llvm.x86.avx512fp16.min.ph.256" => "__builtin_ia32_minph256",
-    "llvm.x86.avx512fp16.min.ph.512" => "__builtin_ia32_minph512",
-    "llvm.x86.avx512fp16.mul.ph.512" => "__builtin_ia32_mulph512",
-    "llvm.x86.avx512fp16.sub.ph.512" => "__builtin_ia32_subph512",
-    "llvm.x86.avx512fp16.vcomi.sh" => "__builtin_ia32_vcomish",
-    "llvm.x86.avx512fp16.vcvtsh2si32" => "__builtin_ia32_vcvtsh2si32",
-    "llvm.x86.avx512fp16.vcvtsh2si64" => "__builtin_ia32_vcvtsh2si64",
-    "llvm.x86.avx512fp16.vcvtsh2usi32" => "__builtin_ia32_vcvtsh2usi32",
-    "llvm.x86.avx512fp16.vcvtsh2usi64" => "__builtin_ia32_vcvtsh2usi64",
-    "llvm.x86.avx512fp16.vcvtsi2sh" => "__builtin_ia32_vcvtsi2sh",
-    "llvm.x86.avx512fp16.vcvtsi642sh" => "__builtin_ia32_vcvtsi642sh",
-    "llvm.x86.avx512fp16.vcvttsh2si32" => "__builtin_ia32_vcvttsh2si32",
-    "llvm.x86.avx512fp16.vcvttsh2si64" => "__builtin_ia32_vcvttsh2si64",
-    "llvm.x86.avx512fp16.vcvttsh2usi32" => "__builtin_ia32_vcvttsh2usi32",
-    "llvm.x86.avx512fp16.vcvttsh2usi64" => "__builtin_ia32_vcvttsh2usi64",
-    "llvm.x86.avx512fp16.vcvtusi2sh" => "__builtin_ia32_vcvtusi2sh",
-    "llvm.x86.avx512fp16.vcvtusi642sh" => "__builtin_ia32_vcvtusi642sh",
-    "llvm.x86.avx512fp16.vfmaddsub.ph.128" => "__builtin_ia32_vfmaddsubph",
-    "llvm.x86.avx512fp16.vfmaddsub.ph.256" => "__builtin_ia32_vfmaddsubph256",
-    "llvm.x86.axor32" => "__builtin_ia32_axor32",
-    "llvm.x86.axor64" => "__builtin_ia32_axor64",
-    "llvm.x86.bmi.bextr.32" => "__builtin_ia32_bextr_u32",
-    "llvm.x86.bmi.bextr.64" => "__builtin_ia32_bextr_u64",
-    "llvm.x86.bmi.bzhi.32" => "__builtin_ia32_bzhi_si",
-    "llvm.x86.bmi.bzhi.64" => "__builtin_ia32_bzhi_di",
-    "llvm.x86.bmi.pdep.32" => "__builtin_ia32_pdep_si",
-    "llvm.x86.bmi.pdep.64" => "__builtin_ia32_pdep_di",
-    "llvm.x86.bmi.pext.32" => "__builtin_ia32_pext_si",
-    "llvm.x86.bmi.pext.64" => "__builtin_ia32_pext_di",
-    "llvm.x86.cldemote" => "__builtin_ia32_cldemote",
-    "llvm.x86.clflushopt" => "__builtin_ia32_clflushopt",
-    "llvm.x86.clrssbsy" => "__builtin_ia32_clrssbsy",
-    "llvm.x86.clui" => "__builtin_ia32_clui",
-    "llvm.x86.clwb" => "__builtin_ia32_clwb",
-    "llvm.x86.clzero" => "__builtin_ia32_clzero",
-    "llvm.x86.cmpccxadd32" => "__builtin_ia32_cmpccxadd32",
-    "llvm.x86.cmpccxadd64" => "__builtin_ia32_cmpccxadd64",
-    "llvm.x86.directstore32" => "__builtin_ia32_directstore_u32",
-    "llvm.x86.directstore64" => "__builtin_ia32_directstore_u64",
-    "llvm.x86.enqcmd" => "__builtin_ia32_enqcmd",
-    "llvm.x86.enqcmds" => "__builtin_ia32_enqcmds",
-    "llvm.x86.flags.read.u32" => "__builtin_ia32_readeflags_u32",
-    "llvm.x86.flags.read.u64" => "__builtin_ia32_readeflags_u64",
-    "llvm.x86.flags.write.u32" => "__builtin_ia32_writeeflags_u32",
-    "llvm.x86.flags.write.u64" => "__builtin_ia32_writeeflags_u64",
-    "llvm.x86.fma.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
-    "llvm.x86.fma.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
-    "llvm.x86.fma.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
-    "llvm.x86.fma.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
-    "llvm.x86.fma.mask.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask",
-    "llvm.x86.fma.mask.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask",
-    "llvm.x86.fma.mask.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask",
-    "llvm.x86.fma.mask.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask",
-    "llvm.x86.fma.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
-    "llvm.x86.fma.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
-    "llvm.x86.fma.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
-    "llvm.x86.fma.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
-    "llvm.x86.fma.vfmadd.pd" => "__builtin_ia32_vfmaddpd",
-    "llvm.x86.fma.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256",
-    "llvm.x86.fma.vfmadd.ps" => "__builtin_ia32_vfmaddps",
-    "llvm.x86.fma.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256",
-    "llvm.x86.fma.vfmadd.sd" => "__builtin_ia32_vfmaddsd",
-    "llvm.x86.fma.vfmadd.ss" => "__builtin_ia32_vfmaddss",
-    "llvm.x86.fma.vfmaddsub.pd" => "__builtin_ia32_vfmaddsubpd",
-    "llvm.x86.fma.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256",
-    "llvm.x86.fma.vfmaddsub.ps" => "__builtin_ia32_vfmaddsubps",
-    "llvm.x86.fma.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256",
-    "llvm.x86.fma.vfmsub.pd" => "__builtin_ia32_vfmsubpd",
-    "llvm.x86.fma.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256",
-    "llvm.x86.fma.vfmsub.ps" => "__builtin_ia32_vfmsubps",
-    "llvm.x86.fma.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256",
-    "llvm.x86.fma.vfmsub.sd" => "__builtin_ia32_vfmsubsd",
-    "llvm.x86.fma.vfmsub.ss" => "__builtin_ia32_vfmsubss",
-    "llvm.x86.fma.vfmsubadd.pd" => "__builtin_ia32_vfmsubaddpd",
-    "llvm.x86.fma.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256",
-    "llvm.x86.fma.vfmsubadd.ps" => "__builtin_ia32_vfmsubaddps",
-    "llvm.x86.fma.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256",
-    "llvm.x86.fma.vfnmadd.pd" => "__builtin_ia32_vfnmaddpd",
-    "llvm.x86.fma.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256",
-    "llvm.x86.fma.vfnmadd.ps" => "__builtin_ia32_vfnmaddps",
-    "llvm.x86.fma.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256",
-    "llvm.x86.fma.vfnmadd.sd" => "__builtin_ia32_vfnmaddsd",
-    "llvm.x86.fma.vfnmadd.ss" => "__builtin_ia32_vfnmaddss",
-    "llvm.x86.fma.vfnmsub.pd" => "__builtin_ia32_vfnmsubpd",
-    "llvm.x86.fma.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256",
-    "llvm.x86.fma.vfnmsub.ps" => "__builtin_ia32_vfnmsubps",
-    "llvm.x86.fma.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256",
-    "llvm.x86.fma.vfnmsub.sd" => "__builtin_ia32_vfnmsubsd",
-    "llvm.x86.fma.vfnmsub.ss" => "__builtin_ia32_vfnmsubss",
-    "llvm.x86.fxrstor" => "__builtin_ia32_fxrstor",
-    "llvm.x86.fxrstor64" => "__builtin_ia32_fxrstor64",
-    "llvm.x86.fxsave" => "__builtin_ia32_fxsave",
-    "llvm.x86.fxsave64" => "__builtin_ia32_fxsave64",
-    "llvm.x86.incsspd" => "__builtin_ia32_incsspd",
-    "llvm.x86.incsspq" => "__builtin_ia32_incsspq",
-    "llvm.x86.invpcid" => "__builtin_ia32_invpcid",
-    "llvm.x86.ldtilecfg" => "__builtin_ia32_tile_loadconfig",
-    "llvm.x86.ldtilecfg.internal" => "__builtin_ia32_tile_loadconfig_internal",
-    "llvm.x86.llwpcb" => "__builtin_ia32_llwpcb",
-    "llvm.x86.loadiwkey" => "__builtin_ia32_loadiwkey",
-    "llvm.x86.lwpins32" => "__builtin_ia32_lwpins32",
-    "llvm.x86.lwpins64" => "__builtin_ia32_lwpins64",
-    "llvm.x86.lwpval32" => "__builtin_ia32_lwpval32",
-    "llvm.x86.lwpval64" => "__builtin_ia32_lwpval64",
-    "llvm.x86.mmx.emms" => "__builtin_ia32_emms",
-    "llvm.x86.mmx.femms" => "__builtin_ia32_femms",
-    "llvm.x86.monitorx" => "__builtin_ia32_monitorx",
-    "llvm.x86.movdir64b" => "__builtin_ia32_movdir64b",
-    "llvm.x86.movrsdi" => "__builtin_ia32_movrsdi",
-    "llvm.x86.movrshi" => "__builtin_ia32_movrshi",
-    "llvm.x86.movrsqi" => "__builtin_ia32_movrsqi",
-    "llvm.x86.movrssi" => "__builtin_ia32_movrssi",
-    "llvm.x86.mwaitx" => "__builtin_ia32_mwaitx",
-    "llvm.x86.pclmulqdq" => "__builtin_ia32_pclmulqdq128",
-    "llvm.x86.pclmulqdq.256" => "__builtin_ia32_pclmulqdq256",
-    "llvm.x86.pclmulqdq.512" => "__builtin_ia32_pclmulqdq512",
-    "llvm.x86.prefetchrs" => "__builtin_ia32_prefetchrs",
-    "llvm.x86.ptwrite32" => "__builtin_ia32_ptwrite32",
-    "llvm.x86.ptwrite64" => "__builtin_ia32_ptwrite64",
-    "llvm.x86.rdfsbase.32" => "__builtin_ia32_rdfsbase32",
-    "llvm.x86.rdfsbase.64" => "__builtin_ia32_rdfsbase64",
-    "llvm.x86.rdgsbase.32" => "__builtin_ia32_rdgsbase32",
-    "llvm.x86.rdgsbase.64" => "__builtin_ia32_rdgsbase64",
-    "llvm.x86.rdpid" => "__builtin_ia32_rdpid",
-    "llvm.x86.rdpkru" => "__builtin_ia32_rdpkru",
-    "llvm.x86.rdpmc" => "__builtin_ia32_rdpmc",
-    "llvm.x86.rdpru" => "__builtin_ia32_rdpru",
-    "llvm.x86.rdsspd" => "__builtin_ia32_rdsspd",
-    "llvm.x86.rdsspq" => "__builtin_ia32_rdsspq",
-    "llvm.x86.rdtsc" => "__builtin_ia32_rdtsc",
-    "llvm.x86.rdtscp" => "__builtin_ia32_rdtscp",
-    "llvm.x86.rstorssp" => "__builtin_ia32_rstorssp",
-    "llvm.x86.saveprevssp" => "__builtin_ia32_saveprevssp",
-    "llvm.x86.senduipi" => "__builtin_ia32_senduipi",
-    "llvm.x86.serialize" => "__builtin_ia32_serialize",
-    "llvm.x86.setssbsy" => "__builtin_ia32_setssbsy",
-    "llvm.x86.sha1msg1" => "__builtin_ia32_sha1msg1",
-    "llvm.x86.sha1msg2" => "__builtin_ia32_sha1msg2",
-    "llvm.x86.sha1nexte" => "__builtin_ia32_sha1nexte",
-    "llvm.x86.sha1rnds4" => "__builtin_ia32_sha1rnds4",
-    "llvm.x86.sha256msg1" => "__builtin_ia32_sha256msg1",
-    "llvm.x86.sha256msg2" => "__builtin_ia32_sha256msg2",
-    "llvm.x86.sha256rnds2" => "__builtin_ia32_sha256rnds2",
-    "llvm.x86.slwpcb" => "__builtin_ia32_slwpcb",
-    "llvm.x86.sse.add.ss" => "__builtin_ia32_addss",
-    "llvm.x86.sse.cmp.ps" => "__builtin_ia32_cmpps",
-    "llvm.x86.sse.cmp.ss" => "__builtin_ia32_cmpss",
-    "llvm.x86.sse.comieq.ss" => "__builtin_ia32_comieq",
-    "llvm.x86.sse.comige.ss" => "__builtin_ia32_comige",
-    "llvm.x86.sse.comigt.ss" => "__builtin_ia32_comigt",
-    "llvm.x86.sse.comile.ss" => "__builtin_ia32_comile",
-    "llvm.x86.sse.comilt.ss" => "__builtin_ia32_comilt",
-    "llvm.x86.sse.comineq.ss" => "__builtin_ia32_comineq",
-    "llvm.x86.sse.cvtsi2ss" => "__builtin_ia32_cvtsi2ss",
-    "llvm.x86.sse.cvtsi642ss" => "__builtin_ia32_cvtsi642ss",
-    "llvm.x86.sse.cvtss2si" => "__builtin_ia32_cvtss2si",
-    "llvm.x86.sse.cvtss2si64" => "__builtin_ia32_cvtss2si64",
-    "llvm.x86.sse.cvttss2si" => "__builtin_ia32_cvttss2si",
-    "llvm.x86.sse.cvttss2si64" => "__builtin_ia32_cvttss2si64",
-    "llvm.x86.sse.div.ss" => "__builtin_ia32_divss",
-    "llvm.x86.sse.max.ps" => "__builtin_ia32_maxps",
-    "llvm.x86.sse.max.ss" => "__builtin_ia32_maxss",
-    "llvm.x86.sse.min.ps" => "__builtin_ia32_minps",
-    "llvm.x86.sse.min.ss" => "__builtin_ia32_minss",
-    "llvm.x86.sse.movmsk.ps" => "__builtin_ia32_movmskps",
-    "llvm.x86.sse.mul.ss" => "__builtin_ia32_mulss",
-    "llvm.x86.sse.rcp.ps" => "__builtin_ia32_rcpps",
-    "llvm.x86.sse.rcp.ss" => "__builtin_ia32_rcpss",
-    "llvm.x86.sse.rsqrt.ps" => "__builtin_ia32_rsqrtps",
-    "llvm.x86.sse.rsqrt.ss" => "__builtin_ia32_rsqrtss",
-    "llvm.x86.sse.sfence" => "__builtin_ia32_sfence",
-    "llvm.x86.sse.sqrt.ps" => "__builtin_ia32_sqrtps",
-    "llvm.x86.sse.sqrt.ss" => "__builtin_ia32_sqrtss",
-    "llvm.x86.sse.storeu.ps" => "__builtin_ia32_storeups",
-    "llvm.x86.sse.sub.ss" => "__builtin_ia32_subss",
-    "llvm.x86.sse.ucomieq.ss" => "__builtin_ia32_ucomieq",
-    "llvm.x86.sse.ucomige.ss" => "__builtin_ia32_ucomige",
-    "llvm.x86.sse.ucomigt.ss" => "__builtin_ia32_ucomigt",
-    "llvm.x86.sse.ucomile.ss" => "__builtin_ia32_ucomile",
-    "llvm.x86.sse.ucomilt.ss" => "__builtin_ia32_ucomilt",
-    "llvm.x86.sse.ucomineq.ss" => "__builtin_ia32_ucomineq",
-    "llvm.x86.sse2.add.sd" => "__builtin_ia32_addsd",
-    "llvm.x86.sse2.clflush" => "__builtin_ia32_clflush",
-    "llvm.x86.sse2.cmp.pd" => "__builtin_ia32_cmppd",
-    "llvm.x86.sse2.cmp.sd" => "__builtin_ia32_cmpsd",
-    "llvm.x86.sse2.comieq.sd" => "__builtin_ia32_comisdeq",
-    "llvm.x86.sse2.comige.sd" => "__builtin_ia32_comisdge",
-    "llvm.x86.sse2.comigt.sd" => "__builtin_ia32_comisdgt",
-    "llvm.x86.sse2.comile.sd" => "__builtin_ia32_comisdle",
-    "llvm.x86.sse2.comilt.sd" => "__builtin_ia32_comisdlt",
-    "llvm.x86.sse2.comineq.sd" => "__builtin_ia32_comisdneq",
-    "llvm.x86.sse2.cvtdq2pd" => "__builtin_ia32_cvtdq2pd",
-    "llvm.x86.sse2.cvtdq2ps" => "__builtin_ia32_cvtdq2ps",
-    "llvm.x86.sse2.cvtpd2dq" => "__builtin_ia32_cvtpd2dq",
-    "llvm.x86.sse2.cvtpd2ps" => "__builtin_ia32_cvtpd2ps",
-    "llvm.x86.sse2.cvtps2dq" => "__builtin_ia32_cvtps2dq",
-    "llvm.x86.sse2.cvtps2pd" => "__builtin_ia32_cvtps2pd",
-    "llvm.x86.sse2.cvtsd2si" => "__builtin_ia32_cvtsd2si",
-    "llvm.x86.sse2.cvtsd2si64" => "__builtin_ia32_cvtsd2si64",
-    "llvm.x86.sse2.cvtsd2ss" => "__builtin_ia32_cvtsd2ss",
-    "llvm.x86.sse2.cvtsi2sd" => "__builtin_ia32_cvtsi2sd",
-    "llvm.x86.sse2.cvtsi642sd" => "__builtin_ia32_cvtsi642sd",
-    "llvm.x86.sse2.cvtss2sd" => "__builtin_ia32_cvtss2sd",
-    "llvm.x86.sse2.cvttpd2dq" => "__builtin_ia32_cvttpd2dq",
-    "llvm.x86.sse2.cvttps2dq" => "__builtin_ia32_cvttps2dq",
-    "llvm.x86.sse2.cvttsd2si" => "__builtin_ia32_cvttsd2si",
-    "llvm.x86.sse2.cvttsd2si64" => "__builtin_ia32_cvttsd2si64",
-    "llvm.x86.sse2.div.sd" => "__builtin_ia32_divsd",
-    "llvm.x86.sse2.lfence" => "__builtin_ia32_lfence",
-    "llvm.x86.sse2.maskmov.dqu" => "__builtin_ia32_maskmovdqu",
-    "llvm.x86.sse2.max.pd" => "__builtin_ia32_maxpd",
-    "llvm.x86.sse2.max.sd" => "__builtin_ia32_maxsd",
-    "llvm.x86.sse2.mfence" => "__builtin_ia32_mfence",
-    "llvm.x86.sse2.min.pd" => "__builtin_ia32_minpd",
-    "llvm.x86.sse2.min.sd" => "__builtin_ia32_minsd",
-    "llvm.x86.sse2.movmsk.pd" => "__builtin_ia32_movmskpd",
-    "llvm.x86.sse2.mul.sd" => "__builtin_ia32_mulsd",
-    "llvm.x86.sse2.packssdw.128" => "__builtin_ia32_packssdw128",
-    "llvm.x86.sse2.packsswb.128" => "__builtin_ia32_packsswb128",
-    "llvm.x86.sse2.packuswb.128" => "__builtin_ia32_packuswb128",
-    "llvm.x86.sse2.padds.b" => "__builtin_ia32_paddsb128",
-    "llvm.x86.sse2.padds.w" => "__builtin_ia32_paddsw128",
-    "llvm.x86.sse2.paddus.b" => "__builtin_ia32_paddusb128",
-    "llvm.x86.sse2.paddus.w" => "__builtin_ia32_paddusw128",
-    "llvm.x86.sse2.pause" => "__builtin_ia32_pause",
-    "llvm.x86.sse2.pavg.b" => "__builtin_ia32_pavgb128",
-    "llvm.x86.sse2.pavg.w" => "__builtin_ia32_pavgw128",
-    "llvm.x86.sse2.pmadd.wd" => "__builtin_ia32_pmaddwd128",
-    "llvm.x86.sse2.pmaxs.w" => "__builtin_ia32_pmaxsw128",
-    "llvm.x86.sse2.pmaxu.b" => "__builtin_ia32_pmaxub128",
-    "llvm.x86.sse2.pmins.w" => "__builtin_ia32_pminsw128",
-    "llvm.x86.sse2.pminu.b" => "__builtin_ia32_pminub128",
-    "llvm.x86.sse2.pmovmskb.128" => "__builtin_ia32_pmovmskb128",
-    "llvm.x86.sse2.pmulh.w" => "__builtin_ia32_pmulhw128",
-    "llvm.x86.sse2.pmulhu.w" => "__builtin_ia32_pmulhuw128",
-    "llvm.x86.sse2.pmulu.dq" => "__builtin_ia32_pmuludq128",
-    "llvm.x86.sse2.psad.bw" => "__builtin_ia32_psadbw128",
-    "llvm.x86.sse2.pshuf.d" => "__builtin_ia32_pshufd",
-    "llvm.x86.sse2.pshufh.w" => "__builtin_ia32_pshufhw",
-    "llvm.x86.sse2.pshufl.w" => "__builtin_ia32_pshuflw",
-    "llvm.x86.sse2.psll.d" => "__builtin_ia32_pslld128",
-    "llvm.x86.sse2.psll.dq" => "__builtin_ia32_pslldqi128",
-    "llvm.x86.sse2.psll.dq.bs" => "__builtin_ia32_pslldqi128_byteshift",
-    "llvm.x86.sse2.psll.q" => "__builtin_ia32_psllq128",
-    "llvm.x86.sse2.psll.w" => "__builtin_ia32_psllw128",
-    "llvm.x86.sse2.pslli.d" => "__builtin_ia32_pslldi128",
-    "llvm.x86.sse2.pslli.q" => "__builtin_ia32_psllqi128",
-    "llvm.x86.sse2.pslli.w" => "__builtin_ia32_psllwi128",
-    "llvm.x86.sse2.psra.d" => "__builtin_ia32_psrad128",
-    "llvm.x86.sse2.psra.w" => "__builtin_ia32_psraw128",
-    "llvm.x86.sse2.psrai.d" => "__builtin_ia32_psradi128",
-    "llvm.x86.sse2.psrai.w" => "__builtin_ia32_psrawi128",
-    "llvm.x86.sse2.psrl.d" => "__builtin_ia32_psrld128",
-    "llvm.x86.sse2.psrl.dq" => "__builtin_ia32_psrldqi128",
-    "llvm.x86.sse2.psrl.dq.bs" => "__builtin_ia32_psrldqi128_byteshift",
-    "llvm.x86.sse2.psrl.q" => "__builtin_ia32_psrlq128",
-    "llvm.x86.sse2.psrl.w" => "__builtin_ia32_psrlw128",
-    "llvm.x86.sse2.psrli.d" => "__builtin_ia32_psrldi128",
-    "llvm.x86.sse2.psrli.q" => "__builtin_ia32_psrlqi128",
-    "llvm.x86.sse2.psrli.w" => "__builtin_ia32_psrlwi128",
-    "llvm.x86.sse2.psubs.b" => "__builtin_ia32_psubsb128",
-    "llvm.x86.sse2.psubs.w" => "__builtin_ia32_psubsw128",
-    "llvm.x86.sse2.psubus.b" => "__builtin_ia32_psubusb128",
-    "llvm.x86.sse2.psubus.w" => "__builtin_ia32_psubusw128",
-    "llvm.x86.sse2.sqrt.pd" => "__builtin_ia32_sqrtpd",
-    "llvm.x86.sse2.sqrt.sd" => "__builtin_ia32_sqrtsd",
-    "llvm.x86.sse2.storel.dq" => "__builtin_ia32_storelv4si",
-    "llvm.x86.sse2.storeu.dq" => "__builtin_ia32_storedqu",
-    "llvm.x86.sse2.storeu.pd" => "__builtin_ia32_storeupd",
-    "llvm.x86.sse2.sub.sd" => "__builtin_ia32_subsd",
-    "llvm.x86.sse2.ucomieq.sd" => "__builtin_ia32_ucomisdeq",
-    "llvm.x86.sse2.ucomige.sd" => "__builtin_ia32_ucomisdge",
-    "llvm.x86.sse2.ucomigt.sd" => "__builtin_ia32_ucomisdgt",
-    "llvm.x86.sse2.ucomile.sd" => "__builtin_ia32_ucomisdle",
-    "llvm.x86.sse2.ucomilt.sd" => "__builtin_ia32_ucomisdlt",
-    "llvm.x86.sse2.ucomineq.sd" => "__builtin_ia32_ucomisdneq",
-    "llvm.x86.sse3.addsub.pd" => "__builtin_ia32_addsubpd",
-    "llvm.x86.sse3.addsub.ps" => "__builtin_ia32_addsubps",
-    "llvm.x86.sse3.hadd.pd" => "__builtin_ia32_haddpd",
-    "llvm.x86.sse3.hadd.ps" => "__builtin_ia32_haddps",
-    "llvm.x86.sse3.hsub.pd" => "__builtin_ia32_hsubpd",
-    "llvm.x86.sse3.hsub.ps" => "__builtin_ia32_hsubps",
-    "llvm.x86.sse3.ldu.dq" => "__builtin_ia32_lddqu",
-    "llvm.x86.sse3.monitor" => "__builtin_ia32_monitor",
-    "llvm.x86.sse3.mwait" => "__builtin_ia32_mwait",
-    "llvm.x86.sse41.blendpd" => "__builtin_ia32_blendpd",
-    "llvm.x86.sse41.blendps" => "__builtin_ia32_blendps",
-    "llvm.x86.sse41.blendvpd" => "__builtin_ia32_blendvpd",
-    "llvm.x86.sse41.blendvps" => "__builtin_ia32_blendvps",
-    "llvm.x86.sse41.dppd" => "__builtin_ia32_dppd",
-    "llvm.x86.sse41.dpps" => "__builtin_ia32_dpps",
-    "llvm.x86.sse41.extractps" => "__builtin_ia32_extractps128",
-    "llvm.x86.sse41.insertps" => "__builtin_ia32_insertps128",
-    "llvm.x86.sse41.movntdqa" => "__builtin_ia32_movntdqa",
-    "llvm.x86.sse41.mpsadbw" => "__builtin_ia32_mpsadbw128",
-    "llvm.x86.sse41.packusdw" => "__builtin_ia32_packusdw128",
-    "llvm.x86.sse41.pblendvb" => "__builtin_ia32_pblendvb128",
-    "llvm.x86.sse41.pblendw" => "__builtin_ia32_pblendw128",
-    "llvm.x86.sse41.phminposuw" => "__builtin_ia32_phminposuw128",
-    "llvm.x86.sse41.pmaxsb" => "__builtin_ia32_pmaxsb128",
-    "llvm.x86.sse41.pmaxsd" => "__builtin_ia32_pmaxsd128",
-    "llvm.x86.sse41.pmaxud" => "__builtin_ia32_pmaxud128",
-    "llvm.x86.sse41.pmaxuw" => "__builtin_ia32_pmaxuw128",
-    "llvm.x86.sse41.pminsb" => "__builtin_ia32_pminsb128",
-    "llvm.x86.sse41.pminsd" => "__builtin_ia32_pminsd128",
-    "llvm.x86.sse41.pminud" => "__builtin_ia32_pminud128",
-    "llvm.x86.sse41.pminuw" => "__builtin_ia32_pminuw128",
-    "llvm.x86.sse41.pmovsxbd" => "__builtin_ia32_pmovsxbd128",
-    "llvm.x86.sse41.pmovsxbq" => "__builtin_ia32_pmovsxbq128",
-    "llvm.x86.sse41.pmovsxbw" => "__builtin_ia32_pmovsxbw128",
-    "llvm.x86.sse41.pmovsxdq" => "__builtin_ia32_pmovsxdq128",
-    "llvm.x86.sse41.pmovsxwd" => "__builtin_ia32_pmovsxwd128",
-    "llvm.x86.sse41.pmovsxwq" => "__builtin_ia32_pmovsxwq128",
-    "llvm.x86.sse41.pmovzxbd" => "__builtin_ia32_pmovzxbd128",
-    "llvm.x86.sse41.pmovzxbq" => "__builtin_ia32_pmovzxbq128",
-    "llvm.x86.sse41.pmovzxbw" => "__builtin_ia32_pmovzxbw128",
-    "llvm.x86.sse41.pmovzxdq" => "__builtin_ia32_pmovzxdq128",
-    "llvm.x86.sse41.pmovzxwd" => "__builtin_ia32_pmovzxwd128",
-    "llvm.x86.sse41.pmovzxwq" => "__builtin_ia32_pmovzxwq128",
-    "llvm.x86.sse41.pmuldq" => "__builtin_ia32_pmuldq128",
-    "llvm.x86.sse41.ptestc" => "__builtin_ia32_ptestc128",
-    "llvm.x86.sse41.ptestnzc" => "__builtin_ia32_ptestnzc128",
-    "llvm.x86.sse41.ptestz" => "__builtin_ia32_ptestz128",
-    "llvm.x86.sse41.round.pd" => "__builtin_ia32_roundpd",
-    "llvm.x86.sse41.round.ps" => "__builtin_ia32_roundps",
-    "llvm.x86.sse41.round.sd" => "__builtin_ia32_roundsd",
-    "llvm.x86.sse41.round.ss" => "__builtin_ia32_roundss",
-    "llvm.x86.sse42.crc32.32.16" => "__builtin_ia32_crc32hi",
-    "llvm.x86.sse42.crc32.32.32" => "__builtin_ia32_crc32si",
-    "llvm.x86.sse42.crc32.32.8" => "__builtin_ia32_crc32qi",
-    "llvm.x86.sse42.crc32.64.64" => "__builtin_ia32_crc32di",
-    "llvm.x86.sse42.pcmpestri128" => "__builtin_ia32_pcmpestri128",
-    "llvm.x86.sse42.pcmpestria128" => "__builtin_ia32_pcmpestria128",
-    "llvm.x86.sse42.pcmpestric128" => "__builtin_ia32_pcmpestric128",
-    "llvm.x86.sse42.pcmpestrio128" => "__builtin_ia32_pcmpestrio128",
-    "llvm.x86.sse42.pcmpestris128" => "__builtin_ia32_pcmpestris128",
-    "llvm.x86.sse42.pcmpestriz128" => "__builtin_ia32_pcmpestriz128",
-    "llvm.x86.sse42.pcmpestrm128" => "__builtin_ia32_pcmpestrm128",
-    "llvm.x86.sse42.pcmpistri128" => "__builtin_ia32_pcmpistri128",
-    "llvm.x86.sse42.pcmpistria128" => "__builtin_ia32_pcmpistria128",
-    "llvm.x86.sse42.pcmpistric128" => "__builtin_ia32_pcmpistric128",
-    "llvm.x86.sse42.pcmpistrio128" => "__builtin_ia32_pcmpistrio128",
-    "llvm.x86.sse42.pcmpistris128" => "__builtin_ia32_pcmpistris128",
-    "llvm.x86.sse42.pcmpistriz128" => "__builtin_ia32_pcmpistriz128",
-    "llvm.x86.sse42.pcmpistrm128" => "__builtin_ia32_pcmpistrm128",
-    "llvm.x86.sse4a.extrq" => "__builtin_ia32_extrq",
-    "llvm.x86.sse4a.extrqi" => "__builtin_ia32_extrqi",
-    "llvm.x86.sse4a.insertq" => "__builtin_ia32_insertq",
-    "llvm.x86.sse4a.insertqi" => "__builtin_ia32_insertqi",
-    "llvm.x86.sse4a.movnt.sd" => "__builtin_ia32_movntsd",
-    "llvm.x86.sse4a.movnt.ss" => "__builtin_ia32_movntss",
-    "llvm.x86.ssse3.pabs.b.128" => "__builtin_ia32_pabsb128",
-    "llvm.x86.ssse3.pabs.d.128" => "__builtin_ia32_pabsd128",
-    "llvm.x86.ssse3.pabs.w.128" => "__builtin_ia32_pabsw128",
-    "llvm.x86.ssse3.phadd.d.128" => "__builtin_ia32_phaddd128",
-    "llvm.x86.ssse3.phadd.sw.128" => "__builtin_ia32_phaddsw128",
-    "llvm.x86.ssse3.phadd.w.128" => "__builtin_ia32_phaddw128",
-    "llvm.x86.ssse3.phsub.d.128" => "__builtin_ia32_phsubd128",
-    "llvm.x86.ssse3.phsub.sw.128" => "__builtin_ia32_phsubsw128",
-    "llvm.x86.ssse3.phsub.w.128" => "__builtin_ia32_phsubw128",
-    "llvm.x86.ssse3.pmadd.ub.sw.128" => "__builtin_ia32_pmaddubsw128",
-    "llvm.x86.ssse3.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128",
-    "llvm.x86.ssse3.pshuf.b.128" => "__builtin_ia32_pshufb128",
-    "llvm.x86.ssse3.psign.b.128" => "__builtin_ia32_psignb128",
-    "llvm.x86.ssse3.psign.d.128" => "__builtin_ia32_psignd128",
-    "llvm.x86.ssse3.psign.w.128" => "__builtin_ia32_psignw128",
-    "llvm.x86.sttilecfg" => "__builtin_ia32_tile_storeconfig",
-    "llvm.x86.stui" => "__builtin_ia32_stui",
-    "llvm.x86.subborrow.u32" => "__builtin_ia32_subborrow_u32",
-    "llvm.x86.subborrow.u64" => "__builtin_ia32_subborrow_u64",
-    "llvm.x86.t2rpntlvwz0" => "__builtin_ia32_t2rpntlvwz0",
-    "llvm.x86.t2rpntlvwz0rs" => "__builtin_ia32_t2rpntlvwz0rs",
-    "llvm.x86.t2rpntlvwz0rst1" => "__builtin_ia32_t2rpntlvwz0rst1",
-    "llvm.x86.t2rpntlvwz0t1" => "__builtin_ia32_t2rpntlvwz0t1",
-    "llvm.x86.t2rpntlvwz1" => "__builtin_ia32_t2rpntlvwz1",
-    "llvm.x86.t2rpntlvwz1rs" => "__builtin_ia32_t2rpntlvwz1rs",
-    "llvm.x86.t2rpntlvwz1rst1" => "__builtin_ia32_t2rpntlvwz1rst1",
-    "llvm.x86.t2rpntlvwz1t1" => "__builtin_ia32_t2rpntlvwz1t1",
-    "llvm.x86.tbm.bextri.u32" => "__builtin_ia32_bextri_u32",
-    "llvm.x86.tbm.bextri.u64" => "__builtin_ia32_bextri_u64",
-    "llvm.x86.tcmmimfp16ps" => "__builtin_ia32_tcmmimfp16ps",
-    "llvm.x86.tcmmimfp16ps.internal" => "__builtin_ia32_tcmmimfp16ps_internal",
-    "llvm.x86.tcmmrlfp16ps" => "__builtin_ia32_tcmmrlfp16ps",
-    "llvm.x86.tcmmrlfp16ps.internal" => "__builtin_ia32_tcmmrlfp16ps_internal",
-    "llvm.x86.tconjtcmmimfp16ps" => "__builtin_ia32_tconjtcmmimfp16ps",
-    "llvm.x86.tconjtcmmimfp16ps.internal" => "__builtin_ia32_tconjtcmmimfp16ps_internal",
-    "llvm.x86.tconjtfp16" => "__builtin_ia32_tconjtfp16",
-    "llvm.x86.tconjtfp16.internal" => "__builtin_ia32_tconjtfp16_internal",
-    "llvm.x86.tcvtrowd2ps" => "__builtin_ia32_tcvtrowd2ps",
-    "llvm.x86.tcvtrowd2ps.internal" => "__builtin_ia32_tcvtrowd2ps_internal",
-    "llvm.x86.tcvtrowps2bf16h" => "__builtin_ia32_tcvtrowps2bf16h",
-    "llvm.x86.tcvtrowps2bf16h.internal" => "__builtin_ia32_tcvtrowps2bf16h_internal",
-    "llvm.x86.tcvtrowps2bf16l" => "__builtin_ia32_tcvtrowps2bf16l",
-    "llvm.x86.tcvtrowps2bf16l.internal" => "__builtin_ia32_tcvtrowps2bf16l_internal",
-    "llvm.x86.tcvtrowps2phh" => "__builtin_ia32_tcvtrowps2phh",
-    "llvm.x86.tcvtrowps2phh.internal" => "__builtin_ia32_tcvtrowps2phh_internal",
-    "llvm.x86.tcvtrowps2phl" => "__builtin_ia32_tcvtrowps2phl",
-    "llvm.x86.tcvtrowps2phl.internal" => "__builtin_ia32_tcvtrowps2phl_internal",
-    "llvm.x86.tdpbf16ps" => "__builtin_ia32_tdpbf16ps",
-    "llvm.x86.tdpbf16ps.internal" => "__builtin_ia32_tdpbf16ps_internal",
-    "llvm.x86.tdpbf8ps" => "__builtin_ia32_tdpbf8ps",
-    "llvm.x86.tdpbf8ps.internal" => "__builtin_ia32_tdpbf8ps_internal",
-    "llvm.x86.tdpbhf8ps" => "__builtin_ia32_tdpbhf8ps",
-    "llvm.x86.tdpbhf8ps.internal" => "__builtin_ia32_tdpbhf8ps_internal",
-    "llvm.x86.tdpbssd" => "__builtin_ia32_tdpbssd",
-    "llvm.x86.tdpbssd.internal" => "__builtin_ia32_tdpbssd_internal",
-    "llvm.x86.tdpbsud" => "__builtin_ia32_tdpbsud",
-    "llvm.x86.tdpbsud.internal" => "__builtin_ia32_tdpbsud_internal",
-    "llvm.x86.tdpbusd" => "__builtin_ia32_tdpbusd",
-    "llvm.x86.tdpbusd.internal" => "__builtin_ia32_tdpbusd_internal",
-    "llvm.x86.tdpbuud" => "__builtin_ia32_tdpbuud",
-    "llvm.x86.tdpbuud.internal" => "__builtin_ia32_tdpbuud_internal",
-    "llvm.x86.tdpfp16ps" => "__builtin_ia32_tdpfp16ps",
-    "llvm.x86.tdpfp16ps.internal" => "__builtin_ia32_tdpfp16ps_internal",
-    "llvm.x86.tdphbf8ps" => "__builtin_ia32_tdphbf8ps",
-    "llvm.x86.tdphbf8ps.internal" => "__builtin_ia32_tdphbf8ps_internal",
-    "llvm.x86.tdphf8ps" => "__builtin_ia32_tdphf8ps",
-    "llvm.x86.tdphf8ps.internal" => "__builtin_ia32_tdphf8ps_internal",
-    "llvm.x86.testui" => "__builtin_ia32_testui",
-    "llvm.x86.tileloadd64" => "__builtin_ia32_tileloadd64",
-    "llvm.x86.tileloadd64.internal" => "__builtin_ia32_tileloadd64_internal",
-    "llvm.x86.tileloaddrs64" => "__builtin_ia32_tileloaddrs64",
-    "llvm.x86.tileloaddrs64.internal" => "__builtin_ia32_tileloaddrs64_internal",
-    "llvm.x86.tileloaddrst164" => "__builtin_ia32_tileloaddrst164",
-    "llvm.x86.tileloaddrst164.internal" => "__builtin_ia32_tileloaddrst164_internal",
-    "llvm.x86.tileloaddt164" => "__builtin_ia32_tileloaddt164",
-    "llvm.x86.tileloaddt164.internal" => "__builtin_ia32_tileloaddt164_internal",
-    "llvm.x86.tilemovrow" => "__builtin_ia32_tilemovrow",
-    "llvm.x86.tilemovrow.internal" => "__builtin_ia32_tilemovrow_internal",
-    "llvm.x86.tilerelease" => "__builtin_ia32_tilerelease",
-    "llvm.x86.tilestored64" => "__builtin_ia32_tilestored64",
-    "llvm.x86.tilestored64.internal" => "__builtin_ia32_tilestored64_internal",
-    "llvm.x86.tilezero" => "__builtin_ia32_tilezero",
-    "llvm.x86.tilezero.internal" => "__builtin_ia32_tilezero_internal",
-    "llvm.x86.tmmultf32ps" => "__builtin_ia32_tmmultf32ps",
-    "llvm.x86.tmmultf32ps.internal" => "__builtin_ia32_tmmultf32ps_internal",
-    "llvm.x86.tpause" => "__builtin_ia32_tpause",
-    "llvm.x86.ttcmmimfp16ps" => "__builtin_ia32_ttcmmimfp16ps",
-    "llvm.x86.ttcmmimfp16ps.internal" => "__builtin_ia32_ttcmmimfp16ps_internal",
-    "llvm.x86.ttcmmrlfp16ps" => "__builtin_ia32_ttcmmrlfp16ps",
-    "llvm.x86.ttcmmrlfp16ps.internal" => "__builtin_ia32_ttcmmrlfp16ps_internal",
-    "llvm.x86.ttdpbf16ps" => "__builtin_ia32_ttdpbf16ps",
-    "llvm.x86.ttdpbf16ps.internal" => "__builtin_ia32_ttdpbf16ps_internal",
-    "llvm.x86.ttdpfp16ps" => "__builtin_ia32_ttdpfp16ps",
-    "llvm.x86.ttdpfp16ps.internal" => "__builtin_ia32_ttdpfp16ps_internal",
-    "llvm.x86.ttmmultf32ps" => "__builtin_ia32_ttmmultf32ps",
-    "llvm.x86.ttmmultf32ps.internal" => "__builtin_ia32_ttmmultf32ps_internal",
-    "llvm.x86.ttransposed" => "__builtin_ia32_ttransposed",
-    "llvm.x86.ttransposed.internal" => "__builtin_ia32_ttransposed_internal",
-    "llvm.x86.umonitor" => "__builtin_ia32_umonitor",
-    "llvm.x86.umwait" => "__builtin_ia32_umwait",
-    "llvm.x86.urdmsr" => "__builtin_ia32_urdmsr",
-    "llvm.x86.uwrmsr" => "__builtin_ia32_uwrmsr",
-    "llvm.x86.vbcstnebf162ps128" => "__builtin_ia32_vbcstnebf162ps128",
-    "llvm.x86.vbcstnebf162ps256" => "__builtin_ia32_vbcstnebf162ps256",
-    "llvm.x86.vbcstnesh2ps128" => "__builtin_ia32_vbcstnesh2ps128",
-    "llvm.x86.vbcstnesh2ps256" => "__builtin_ia32_vbcstnesh2ps256",
-    "llvm.x86.vcvtneebf162ps128" => "__builtin_ia32_vcvtneebf162ps128",
-    "llvm.x86.vcvtneebf162ps256" => "__builtin_ia32_vcvtneebf162ps256",
-    "llvm.x86.vcvtneeph2ps128" => "__builtin_ia32_vcvtneeph2ps128",
-    "llvm.x86.vcvtneeph2ps256" => "__builtin_ia32_vcvtneeph2ps256",
-    "llvm.x86.vcvtneobf162ps128" => "__builtin_ia32_vcvtneobf162ps128",
-    "llvm.x86.vcvtneobf162ps256" => "__builtin_ia32_vcvtneobf162ps256",
-    "llvm.x86.vcvtneoph2ps128" => "__builtin_ia32_vcvtneoph2ps128",
-    "llvm.x86.vcvtneoph2ps256" => "__builtin_ia32_vcvtneoph2ps256",
-    "llvm.x86.vcvtneps2bf16128" => "__builtin_ia32_vcvtneps2bf16128",
-    "llvm.x86.vcvtneps2bf16256" => "__builtin_ia32_vcvtneps2bf16256",
-    "llvm.x86.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps",
-    "llvm.x86.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256",
-    "llvm.x86.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph",
-    "llvm.x86.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256",
-    "llvm.x86.vgf2p8affineinvqb.128" => "__builtin_ia32_vgf2p8affineinvqb_v16qi",
-    "llvm.x86.vgf2p8affineinvqb.256" => "__builtin_ia32_vgf2p8affineinvqb_v32qi",
-    "llvm.x86.vgf2p8affineinvqb.512" => "__builtin_ia32_vgf2p8affineinvqb_v64qi",
-    "llvm.x86.vgf2p8affineqb.128" => "__builtin_ia32_vgf2p8affineqb_v16qi",
-    "llvm.x86.vgf2p8affineqb.256" => "__builtin_ia32_vgf2p8affineqb_v32qi",
-    "llvm.x86.vgf2p8affineqb.512" => "__builtin_ia32_vgf2p8affineqb_v64qi",
-    "llvm.x86.vgf2p8mulb.128" => "__builtin_ia32_vgf2p8mulb_v16qi",
-    "llvm.x86.vgf2p8mulb.256" => "__builtin_ia32_vgf2p8mulb_v32qi",
-    "llvm.x86.vgf2p8mulb.512" => "__builtin_ia32_vgf2p8mulb_v64qi",
-    "llvm.x86.vsha512msg1" => "__builtin_ia32_vsha512msg1",
-    "llvm.x86.vsha512msg2" => "__builtin_ia32_vsha512msg2",
-    "llvm.x86.vsha512rnds2" => "__builtin_ia32_vsha512rnds2",
-    "llvm.x86.vsm3msg1" => "__builtin_ia32_vsm3msg1",
-    "llvm.x86.vsm3msg2" => "__builtin_ia32_vsm3msg2",
-    "llvm.x86.vsm3rnds2" => "__builtin_ia32_vsm3rnds2",
-    "llvm.x86.vsm4key4128" => "__builtin_ia32_vsm4key4128",
-    "llvm.x86.vsm4key4256" => "__builtin_ia32_vsm4key4256",
-    "llvm.x86.vsm4key4512" => "__builtin_ia32_vsm4key4512",
-    "llvm.x86.vsm4rnds4128" => "__builtin_ia32_vsm4rnds4128",
-    "llvm.x86.vsm4rnds4256" => "__builtin_ia32_vsm4rnds4256",
-    "llvm.x86.vsm4rnds4512" => "__builtin_ia32_vsm4rnds4512",
-    "llvm.x86.wbinvd" => "__builtin_ia32_wbinvd",
-    "llvm.x86.wbnoinvd" => "__builtin_ia32_wbnoinvd",
-    "llvm.x86.wrfsbase.32" => "__builtin_ia32_wrfsbase32",
-    "llvm.x86.wrfsbase.64" => "__builtin_ia32_wrfsbase64",
-    "llvm.x86.wrgsbase.32" => "__builtin_ia32_wrgsbase32",
-    "llvm.x86.wrgsbase.64" => "__builtin_ia32_wrgsbase64",
-    "llvm.x86.wrpkru" => "__builtin_ia32_wrpkru",
-    "llvm.x86.wrssd" => "__builtin_ia32_wrssd",
-    "llvm.x86.wrssq" => "__builtin_ia32_wrssq",
-    "llvm.x86.wrussd" => "__builtin_ia32_wrussd",
-    "llvm.x86.wrussq" => "__builtin_ia32_wrussq",
-    "llvm.x86.xabort" => "__builtin_ia32_xabort",
-    "llvm.x86.xbegin" => "__builtin_ia32_xbegin",
-    "llvm.x86.xend" => "__builtin_ia32_xend",
-    "llvm.x86.xop.vfrcz.pd" => "__builtin_ia32_vfrczpd",
-    "llvm.x86.xop.vfrcz.pd.256" => "__builtin_ia32_vfrczpd256",
-    "llvm.x86.xop.vfrcz.ps" => "__builtin_ia32_vfrczps",
-    "llvm.x86.xop.vfrcz.ps.256" => "__builtin_ia32_vfrczps256",
-    "llvm.x86.xop.vfrcz.sd" => "__builtin_ia32_vfrczsd",
-    "llvm.x86.xop.vfrcz.ss" => "__builtin_ia32_vfrczss",
-    "llvm.x86.xop.vpcmov" => "__builtin_ia32_vpcmov",
-    "llvm.x86.xop.vpcmov.256" => "__builtin_ia32_vpcmov_256",
-    "llvm.x86.xop.vpcomb" => "__builtin_ia32_vpcomb",
-    "llvm.x86.xop.vpcomd" => "__builtin_ia32_vpcomd",
-    "llvm.x86.xop.vpcomq" => "__builtin_ia32_vpcomq",
-    "llvm.x86.xop.vpcomub" => "__builtin_ia32_vpcomub",
-    "llvm.x86.xop.vpcomud" => "__builtin_ia32_vpcomud",
-    "llvm.x86.xop.vpcomuq" => "__builtin_ia32_vpcomuq",
-    "llvm.x86.xop.vpcomuw" => "__builtin_ia32_vpcomuw",
-    "llvm.x86.xop.vpcomw" => "__builtin_ia32_vpcomw",
-    "llvm.x86.xop.vpermil2pd" => "__builtin_ia32_vpermil2pd",
-    "llvm.x86.xop.vpermil2pd.256" => "__builtin_ia32_vpermil2pd256",
-    "llvm.x86.xop.vpermil2ps" => "__builtin_ia32_vpermil2ps",
-    "llvm.x86.xop.vpermil2ps.256" => "__builtin_ia32_vpermil2ps256",
-    "llvm.x86.xop.vphaddbd" => "__builtin_ia32_vphaddbd",
-    "llvm.x86.xop.vphaddbq" => "__builtin_ia32_vphaddbq",
-    "llvm.x86.xop.vphaddbw" => "__builtin_ia32_vphaddbw",
-    "llvm.x86.xop.vphadddq" => "__builtin_ia32_vphadddq",
-    "llvm.x86.xop.vphaddubd" => "__builtin_ia32_vphaddubd",
-    "llvm.x86.xop.vphaddubq" => "__builtin_ia32_vphaddubq",
-    "llvm.x86.xop.vphaddubw" => "__builtin_ia32_vphaddubw",
-    "llvm.x86.xop.vphaddudq" => "__builtin_ia32_vphaddudq",
-    "llvm.x86.xop.vphadduwd" => "__builtin_ia32_vphadduwd",
-    "llvm.x86.xop.vphadduwq" => "__builtin_ia32_vphadduwq",
-    "llvm.x86.xop.vphaddwd" => "__builtin_ia32_vphaddwd",
-    "llvm.x86.xop.vphaddwq" => "__builtin_ia32_vphaddwq",
-    "llvm.x86.xop.vphsubbw" => "__builtin_ia32_vphsubbw",
-    "llvm.x86.xop.vphsubdq" => "__builtin_ia32_vphsubdq",
-    "llvm.x86.xop.vphsubwd" => "__builtin_ia32_vphsubwd",
-    "llvm.x86.xop.vpmacsdd" => "__builtin_ia32_vpmacsdd",
-    "llvm.x86.xop.vpmacsdqh" => "__builtin_ia32_vpmacsdqh",
-    "llvm.x86.xop.vpmacsdql" => "__builtin_ia32_vpmacsdql",
-    "llvm.x86.xop.vpmacssdd" => "__builtin_ia32_vpmacssdd",
-    "llvm.x86.xop.vpmacssdqh" => "__builtin_ia32_vpmacssdqh",
-    "llvm.x86.xop.vpmacssdql" => "__builtin_ia32_vpmacssdql",
-    "llvm.x86.xop.vpmacsswd" => "__builtin_ia32_vpmacsswd",
-    "llvm.x86.xop.vpmacssww" => "__builtin_ia32_vpmacssww",
-    "llvm.x86.xop.vpmacswd" => "__builtin_ia32_vpmacswd",
-    "llvm.x86.xop.vpmacsww" => "__builtin_ia32_vpmacsww",
-    "llvm.x86.xop.vpmadcsswd" => "__builtin_ia32_vpmadcsswd",
-    "llvm.x86.xop.vpmadcswd" => "__builtin_ia32_vpmadcswd",
-    "llvm.x86.xop.vpperm" => "__builtin_ia32_vpperm",
-    "llvm.x86.xop.vprotb" => "__builtin_ia32_vprotb",
-    "llvm.x86.xop.vprotbi" => "__builtin_ia32_vprotbi",
-    "llvm.x86.xop.vprotd" => "__builtin_ia32_vprotd",
-    "llvm.x86.xop.vprotdi" => "__builtin_ia32_vprotdi",
-    "llvm.x86.xop.vprotq" => "__builtin_ia32_vprotq",
-    "llvm.x86.xop.vprotqi" => "__builtin_ia32_vprotqi",
-    "llvm.x86.xop.vprotw" => "__builtin_ia32_vprotw",
-    "llvm.x86.xop.vprotwi" => "__builtin_ia32_vprotwi",
-    "llvm.x86.xop.vpshab" => "__builtin_ia32_vpshab",
-    "llvm.x86.xop.vpshad" => "__builtin_ia32_vpshad",
-    "llvm.x86.xop.vpshaq" => "__builtin_ia32_vpshaq",
-    "llvm.x86.xop.vpshaw" => "__builtin_ia32_vpshaw",
-    "llvm.x86.xop.vpshlb" => "__builtin_ia32_vpshlb",
-    "llvm.x86.xop.vpshld" => "__builtin_ia32_vpshld",
-    "llvm.x86.xop.vpshlq" => "__builtin_ia32_vpshlq",
-    "llvm.x86.xop.vpshlw" => "__builtin_ia32_vpshlw",
-    "llvm.x86.xresldtrk" => "__builtin_ia32_xresldtrk",
-    "llvm.x86.xsusldtrk" => "__builtin_ia32_xsusldtrk",
-    "llvm.x86.xtest" => "__builtin_ia32_xtest",
-    // xcore
-    "llvm.xcore.bitrev" => "__builtin_bitrev",
-    "llvm.xcore.getid" => "__builtin_getid",
-    "llvm.xcore.getps" => "__builtin_getps",
-    "llvm.xcore.setps" => "__builtin_setps",
-    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+/// Translate a given LLVM intrinsic name to an equivalent GCC one.
+fn map_arch_intrinsic(name: &str) -> &str {
+    let Some(name) = name.strip_prefix("llvm.") else {
+        unimplemented!("***** unsupported LLVM intrinsic {}", name)
+    };
+    let Some((arch, name)) = name.split_once('.') else {
+        unimplemented!("***** unsupported LLVM intrinsic {}", name)
+    };
+    match arch {
+        "AMDGPU" => {
+            #[allow(non_snake_case)]
+            fn AMDGPU(name: &str) -> &str {
+                match name {
+                    // AMDGPU
+                    "div.fixup.f32" => "__builtin_amdgpu_div_fixup",
+                    "div.fixup.f64" => "__builtin_amdgpu_div_fixup",
+                    "div.fixup.v2f64" => "__builtin_amdgpu_div_fixup",
+                    "div.fixup.v4f32" => "__builtin_amdgpu_div_fixup",
+                    "div.fmas.f32" => "__builtin_amdgpu_div_fmas",
+                    "div.fmas.f64" => "__builtin_amdgpu_div_fmas",
+                    "div.fmas.v2f64" => "__builtin_amdgpu_div_fmas",
+                    "div.fmas.v4f32" => "__builtin_amdgpu_div_fmas",
+                    "ldexp.f32" => "__builtin_amdgpu_ldexp",
+                    "ldexp.f64" => "__builtin_amdgpu_ldexp",
+                    "ldexp.v2f64" => "__builtin_amdgpu_ldexp",
+                    "ldexp.v4f32" => "__builtin_amdgpu_ldexp",
+                    "rcp.f32" => "__builtin_amdgpu_rcp",
+                    "rcp.f64" => "__builtin_amdgpu_rcp",
+                    "rcp.v2f64" => "__builtin_amdgpu_rcp",
+                    "rcp.v4f32" => "__builtin_amdgpu_rcp",
+                    "rsq.clamped.f32" => "__builtin_amdgpu_rsq_clamped",
+                    "rsq.clamped.f64" => "__builtin_amdgpu_rsq_clamped",
+                    "rsq.clamped.v2f64" => "__builtin_amdgpu_rsq_clamped",
+                    "rsq.clamped.v4f32" => "__builtin_amdgpu_rsq_clamped",
+                    "rsq.f32" => "__builtin_amdgpu_rsq",
+                    "rsq.f64" => "__builtin_amdgpu_rsq",
+                    "rsq.v2f64" => "__builtin_amdgpu_rsq",
+                    "rsq.v4f32" => "__builtin_amdgpu_rsq",
+                    "trig.preop.f32" => "__builtin_amdgpu_trig_preop",
+                    "trig.preop.f64" => "__builtin_amdgpu_trig_preop",
+                    "trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
+                    "trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            AMDGPU(name)
+        }
+        "aarch64" => {
+            #[allow(non_snake_case)]
+            fn aarch64(name: &str) -> &str {
+                match name {
+                    // aarch64
+                    "chkfeat" => "__builtin_arm_chkfeat",
+                    "dmb" => "__builtin_arm_dmb",
+                    "dsb" => "__builtin_arm_dsb",
+                    "gcspopm" => "__builtin_arm_gcspopm",
+                    "gcsss" => "__builtin_arm_gcsss",
+                    "isb" => "__builtin_arm_isb",
+                    "prefetch" => "__builtin_arm_prefetch",
+                    "sme.in.streaming.mode" => "__builtin_arm_in_streaming_mode",
+                    "sve.aesd" => "__builtin_sve_svaesd_u8",
+                    "sve.aese" => "__builtin_sve_svaese_u8",
+                    "sve.aesimc" => "__builtin_sve_svaesimc_u8",
+                    "sve.aesmc" => "__builtin_sve_svaesmc_u8",
+                    "sve.rax1" => "__builtin_sve_svrax1_u64",
+                    "sve.rdffr" => "__builtin_sve_svrdffr",
+                    "sve.rdffr.z" => "__builtin_sve_svrdffr_z",
+                    "sve.setffr" => "__builtin_sve_svsetffr",
+                    "sve.sm4e" => "__builtin_sve_svsm4e_u32",
+                    "sve.sm4ekey" => "__builtin_sve_svsm4ekey_u32",
+                    "sve.wrffr" => "__builtin_sve_svwrffr",
+                    "tcancel" => "__builtin_arm_tcancel",
+                    "tcommit" => "__builtin_arm_tcommit",
+                    "tstart" => "__builtin_arm_tstart",
+                    "ttest" => "__builtin_arm_ttest",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            aarch64(name)
+        }
+        "amdgcn" => {
+            #[allow(non_snake_case)]
+            fn amdgcn(name: &str) -> &str {
+                match name {
+                    // amdgcn
+                    "alignbyte" => "__builtin_amdgcn_alignbyte",
+                    "ashr.pk.i8.i32" => "__builtin_amdgcn_ashr_pk_i8_i32",
+                    "ashr.pk.u8.i32" => "__builtin_amdgcn_ashr_pk_u8_i32",
+                    "buffer.wbinvl1" => "__builtin_amdgcn_buffer_wbinvl1",
+                    "buffer.wbinvl1.sc" => "__builtin_amdgcn_buffer_wbinvl1_sc",
+                    "buffer.wbinvl1.vol" => "__builtin_amdgcn_buffer_wbinvl1_vol",
+                    "cubeid" => "__builtin_amdgcn_cubeid",
+                    "cubema" => "__builtin_amdgcn_cubema",
+                    "cubesc" => "__builtin_amdgcn_cubesc",
+                    "cubetc" => "__builtin_amdgcn_cubetc",
+                    "cvt.f32.bf8" => "__builtin_amdgcn_cvt_f32_bf8",
+                    "cvt.f32.fp8" => "__builtin_amdgcn_cvt_f32_fp8",
+                    "cvt.off.f32.i4" => "__builtin_amdgcn_cvt_off_f32_i4",
+                    "cvt.pk.bf8.f32" => "__builtin_amdgcn_cvt_pk_bf8_f32",
+                    "cvt.pk.f32.bf8" => "__builtin_amdgcn_cvt_pk_f32_bf8",
+                    "cvt.pk.f32.fp8" => "__builtin_amdgcn_cvt_pk_f32_fp8",
+                    "cvt.pk.fp8.f32" => "__builtin_amdgcn_cvt_pk_fp8_f32",
+                    "cvt.pk.i16" => "__builtin_amdgcn_cvt_pk_i16",
+                    "cvt.pk.u16" => "__builtin_amdgcn_cvt_pk_u16",
+                    "cvt.pk.u8.f32" => "__builtin_amdgcn_cvt_pk_u8_f32",
+                    "cvt.pknorm.i16" => "__builtin_amdgcn_cvt_pknorm_i16",
+                    "cvt.pknorm.u16" => "__builtin_amdgcn_cvt_pknorm_u16",
+                    "cvt.pkrtz" => "__builtin_amdgcn_cvt_pkrtz",
+                    "cvt.scalef32.2xpk16.bf6.f32" => "__builtin_amdgcn_cvt_scalef32_2xpk16_bf6_f32",
+                    "cvt.scalef32.2xpk16.fp6.f32" => "__builtin_amdgcn_cvt_scalef32_2xpk16_fp6_f32",
+                    "cvt.scalef32.f16.bf8" => "__builtin_amdgcn_cvt_scalef32_f16_bf8",
+                    "cvt.scalef32.f16.fp8" => "__builtin_amdgcn_cvt_scalef32_f16_fp8",
+                    "cvt.scalef32.f32.bf8" => "__builtin_amdgcn_cvt_scalef32_f32_bf8",
+                    "cvt.scalef32.f32.fp8" => "__builtin_amdgcn_cvt_scalef32_f32_fp8",
+                    "cvt.scalef32.pk.bf16.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_bf8",
+                    "cvt.scalef32.pk.bf16.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_fp4",
+                    "cvt.scalef32.pk.bf16.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_fp8",
+                    "cvt.scalef32.pk.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_bf16",
+                    "cvt.scalef32.pk.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_f16",
+                    "cvt.scalef32.pk.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_f32",
+                    "cvt.scalef32.pk.f16.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_f16_bf8",
+                    "cvt.scalef32.pk.f16.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_f16_fp4",
+                    "cvt.scalef32.pk.f16.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_f16_fp8",
+                    "cvt.scalef32.pk.f32.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_f32_bf8",
+                    "cvt.scalef32.pk.f32.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_f32_fp4",
+                    "cvt.scalef32.pk.f32.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_f32_fp8",
+                    "cvt.scalef32.pk.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_bf16",
+                    "cvt.scalef32.pk.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_f16",
+                    "cvt.scalef32.pk.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_f32",
+                    "cvt.scalef32.pk.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_bf16",
+                    "cvt.scalef32.pk.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_f16",
+                    "cvt.scalef32.pk.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_f32",
+                    "cvt.scalef32.pk32.bf16.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_bf16_bf6",
+                    "cvt.scalef32.pk32.bf16.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_bf16_fp6",
+                    "cvt.scalef32.pk32.bf6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk32_bf6_bf16",
+                    "cvt.scalef32.pk32.bf6.f16" => "__builtin_amdgcn_cvt_scalef32_pk32_bf6_f16",
+                    "cvt.scalef32.pk32.f16.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_f16_bf6",
+                    "cvt.scalef32.pk32.f16.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_f16_fp6",
+                    "cvt.scalef32.pk32.f32.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_f32_bf6",
+                    "cvt.scalef32.pk32.f32.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_f32_fp6",
+                    "cvt.scalef32.pk32.fp6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk32_fp6_bf16",
+                    "cvt.scalef32.pk32.fp6.f16" => "__builtin_amdgcn_cvt_scalef32_pk32_fp6_f16",
+                    "cvt.scalef32.sr.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_bf16",
+                    "cvt.scalef32.sr.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_f16",
+                    "cvt.scalef32.sr.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_f32",
+                    "cvt.scalef32.sr.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_bf16",
+                    "cvt.scalef32.sr.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_f16",
+                    "cvt.scalef32.sr.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_f32",
+                    "cvt.scalef32.sr.pk.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_bf16",
+                    "cvt.scalef32.sr.pk.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_f16",
+                    "cvt.scalef32.sr.pk.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_f32",
+                    "cvt.scalef32.sr.pk32.bf6.bf16" => {
+                        "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_bf16"
+                    }
+                    "cvt.scalef32.sr.pk32.bf6.f16" => {
+                        "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_f16"
+                    }
+                    "cvt.scalef32.sr.pk32.bf6.f32" => {
+                        "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_f32"
+                    }
+                    "cvt.scalef32.sr.pk32.fp6.bf16" => {
+                        "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_bf16"
+                    }
+                    "cvt.scalef32.sr.pk32.fp6.f16" => {
+                        "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_f16"
+                    }
+                    "cvt.scalef32.sr.pk32.fp6.f32" => {
+                        "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_f32"
+                    }
+                    "cvt.sr.bf16.f32" => "__builtin_amdgcn_cvt_sr_bf16_f32",
+                    "cvt.sr.bf8.f32" => "__builtin_amdgcn_cvt_sr_bf8_f32",
+                    "cvt.sr.f16.f32" => "__builtin_amdgcn_cvt_sr_f16_f32",
+                    "cvt.sr.fp8.f32" => "__builtin_amdgcn_cvt_sr_fp8_f32",
+                    "dispatch.id" => "__builtin_amdgcn_dispatch_id",
+                    "dot4.f32.bf8.bf8" => "__builtin_amdgcn_dot4_f32_bf8_bf8",
+                    "dot4.f32.bf8.fp8" => "__builtin_amdgcn_dot4_f32_bf8_fp8",
+                    "dot4.f32.fp8.bf8" => "__builtin_amdgcn_dot4_f32_fp8_bf8",
+                    "dot4.f32.fp8.fp8" => "__builtin_amdgcn_dot4_f32_fp8_fp8",
+                    "ds.add.gs.reg.rtn" => "__builtin_amdgcn_ds_add_gs_reg_rtn",
+                    "ds.bpermute" => "__builtin_amdgcn_ds_bpermute",
+                    "ds.bpermute.fi.b32" => "__builtin_amdgcn_ds_bpermute_fi_b32",
+                    "ds.gws.barrier" => "__builtin_amdgcn_ds_gws_barrier",
+                    "ds.gws.init" => "__builtin_amdgcn_ds_gws_init",
+                    "ds.gws.sema.br" => "__builtin_amdgcn_ds_gws_sema_br",
+                    "ds.gws.sema.p" => "__builtin_amdgcn_ds_gws_sema_p",
+                    "ds.gws.sema.release.all" => "__builtin_amdgcn_ds_gws_sema_release_all",
+                    "ds.gws.sema.v" => "__builtin_amdgcn_ds_gws_sema_v",
+                    "ds.permute" => "__builtin_amdgcn_ds_permute",
+                    "ds.sub.gs.reg.rtn" => "__builtin_amdgcn_ds_sub_gs_reg_rtn",
+                    "ds.swizzle" => "__builtin_amdgcn_ds_swizzle",
+                    "endpgm" => "__builtin_amdgcn_endpgm",
+                    "fdot2" => "__builtin_amdgcn_fdot2",
+                    "fdot2.bf16.bf16" => "__builtin_amdgcn_fdot2_bf16_bf16",
+                    "fdot2.f16.f16" => "__builtin_amdgcn_fdot2_f16_f16",
+                    "fdot2.f32.bf16" => "__builtin_amdgcn_fdot2_f32_bf16",
+                    "fdot2c.f32.bf16" => "__builtin_amdgcn_fdot2c_f32_bf16",
+                    "fmul.legacy" => "__builtin_amdgcn_fmul_legacy",
+                    "global.load.lds" => "__builtin_amdgcn_global_load_lds",
+                    "groupstaticsize" => "__builtin_amdgcn_groupstaticsize",
+                    "iglp.opt" => "__builtin_amdgcn_iglp_opt",
+                    "implicit.buffer.ptr" => "__builtin_amdgcn_implicit_buffer_ptr",
+                    "implicitarg.ptr" => "__builtin_amdgcn_implicitarg_ptr",
+                    "interp.mov" => "__builtin_amdgcn_interp_mov",
+                    "interp.p1" => "__builtin_amdgcn_interp_p1",
+                    "interp.p1.f16" => "__builtin_amdgcn_interp_p1_f16",
+                    "interp.p2" => "__builtin_amdgcn_interp_p2",
+                    "interp.p2.f16" => "__builtin_amdgcn_interp_p2_f16",
+                    "is.private" => "__builtin_amdgcn_is_private",
+                    "is.shared" => "__builtin_amdgcn_is_shared",
+                    "kernarg.segment.ptr" => "__builtin_amdgcn_kernarg_segment_ptr",
+                    "lerp" => "__builtin_amdgcn_lerp",
+                    "mbcnt.hi" => "__builtin_amdgcn_mbcnt_hi",
+                    "mbcnt.lo" => "__builtin_amdgcn_mbcnt_lo",
+                    "mfma.f32.16x16x16bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x16bf16_1k",
+                    "mfma.f32.16x16x16f16" => "__builtin_amdgcn_mfma_f32_16x16x16f16",
+                    "mfma.f32.16x16x1f32" => "__builtin_amdgcn_mfma_f32_16x16x1f32",
+                    "mfma.f32.16x16x2bf16" => "__builtin_amdgcn_mfma_f32_16x16x2bf16",
+                    "mfma.f32.16x16x32.bf16" => "__builtin_amdgcn_mfma_f32_16x16x32_bf16",
+                    "mfma.f32.16x16x32.bf8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_bf8",
+                    "mfma.f32.16x16x32.bf8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_fp8",
+                    "mfma.f32.16x16x32.f16" => "__builtin_amdgcn_mfma_f32_16x16x32_f16",
+                    "mfma.f32.16x16x32.fp8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_bf8",
+                    "mfma.f32.16x16x32.fp8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_fp8",
+                    "mfma.f32.16x16x4bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x4bf16_1k",
+                    "mfma.f32.16x16x4f16" => "__builtin_amdgcn_mfma_f32_16x16x4f16",
+                    "mfma.f32.16x16x4f32" => "__builtin_amdgcn_mfma_f32_16x16x4f32",
+                    "mfma.f32.16x16x8.xf32" => "__builtin_amdgcn_mfma_f32_16x16x8_xf32",
+                    "mfma.f32.16x16x8bf16" => "__builtin_amdgcn_mfma_f32_16x16x8bf16",
+                    "mfma.f32.32x32x16.bf16" => "__builtin_amdgcn_mfma_f32_32x32x16_bf16",
+                    "mfma.f32.32x32x16.bf8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_bf8",
+                    "mfma.f32.32x32x16.bf8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_fp8",
+                    "mfma.f32.32x32x16.f16" => "__builtin_amdgcn_mfma_f32_32x32x16_f16",
+                    "mfma.f32.32x32x16.fp8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_bf8",
+                    "mfma.f32.32x32x16.fp8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_fp8",
+                    "mfma.f32.32x32x1f32" => "__builtin_amdgcn_mfma_f32_32x32x1f32",
+                    "mfma.f32.32x32x2bf16" => "__builtin_amdgcn_mfma_f32_32x32x2bf16",
+                    "mfma.f32.32x32x2f32" => "__builtin_amdgcn_mfma_f32_32x32x2f32",
+                    "mfma.f32.32x32x4.xf32" => "__builtin_amdgcn_mfma_f32_32x32x4_xf32",
+                    "mfma.f32.32x32x4bf16" => "__builtin_amdgcn_mfma_f32_32x32x4bf16",
+                    "mfma.f32.32x32x4bf16.1k" => "__builtin_amdgcn_mfma_f32_32x32x4bf16_1k",
+                    "mfma.f32.32x32x4f16" => "__builtin_amdgcn_mfma_f32_32x32x4f16",
+                    "mfma.f32.32x32x8bf16.1k" => "__builtin_amdgcn_mfma_f32_32x32x8bf16_1k",
+                    "mfma.f32.32x32x8f16" => "__builtin_amdgcn_mfma_f32_32x32x8f16",
+                    "mfma.f32.4x4x1f32" => "__builtin_amdgcn_mfma_f32_4x4x1f32",
+                    "mfma.f32.4x4x2bf16" => "__builtin_amdgcn_mfma_f32_4x4x2bf16",
+                    "mfma.f32.4x4x4bf16.1k" => "__builtin_amdgcn_mfma_f32_4x4x4bf16_1k",
+                    "mfma.f32.4x4x4f16" => "__builtin_amdgcn_mfma_f32_4x4x4f16",
+                    "mfma.f64.16x16x4f64" => "__builtin_amdgcn_mfma_f64_16x16x4f64",
+                    "mfma.f64.4x4x4f64" => "__builtin_amdgcn_mfma_f64_4x4x4f64",
+                    "mfma.i32.16x16x16i8" => "__builtin_amdgcn_mfma_i32_16x16x16i8",
+                    "mfma.i32.16x16x32.i8" => "__builtin_amdgcn_mfma_i32_16x16x32_i8",
+                    "mfma.i32.16x16x4i8" => "__builtin_amdgcn_mfma_i32_16x16x4i8",
+                    "mfma.i32.16x16x64.i8" => "__builtin_amdgcn_mfma_i32_16x16x64_i8",
+                    "mfma.i32.32x32x16.i8" => "__builtin_amdgcn_mfma_i32_32x32x16_i8",
+                    "mfma.i32.32x32x32.i8" => "__builtin_amdgcn_mfma_i32_32x32x32_i8",
+                    "mfma.i32.32x32x4i8" => "__builtin_amdgcn_mfma_i32_32x32x4i8",
+                    "mfma.i32.32x32x8i8" => "__builtin_amdgcn_mfma_i32_32x32x8i8",
+                    "mfma.i32.4x4x4i8" => "__builtin_amdgcn_mfma_i32_4x4x4i8",
+                    "mqsad.pk.u16.u8" => "__builtin_amdgcn_mqsad_pk_u16_u8",
+                    "mqsad.u32.u8" => "__builtin_amdgcn_mqsad_u32_u8",
+                    "msad.u8" => "__builtin_amdgcn_msad_u8",
+                    "perm" => "__builtin_amdgcn_perm",
+                    "permlane16.var" => "__builtin_amdgcn_permlane16_var",
+                    "permlanex16.var" => "__builtin_amdgcn_permlanex16_var",
+                    "prng.b32" => "__builtin_amdgcn_prng_b32",
+                    "qsad.pk.u16.u8" => "__builtin_amdgcn_qsad_pk_u16_u8",
+                    "queue.ptr" => "__builtin_amdgcn_queue_ptr",
+                    "raw.ptr.buffer.load.lds" => "__builtin_amdgcn_raw_ptr_buffer_load_lds",
+                    "rcp.legacy" => "__builtin_amdgcn_rcp_legacy",
+                    "rsq.legacy" => "__builtin_amdgcn_rsq_legacy",
+                    "s.barrier" => "__builtin_amdgcn_s_barrier",
+                    "s.barrier.signal" => "__builtin_amdgcn_s_barrier_signal",
+                    "s.barrier.signal.isfirst" => "__builtin_amdgcn_s_barrier_signal_isfirst",
+                    "s.barrier.signal.var" => "__builtin_amdgcn_s_barrier_signal_var",
+                    "s.barrier.wait" => "__builtin_amdgcn_s_barrier_wait",
+                    "s.buffer.prefetch.data" => "__builtin_amdgcn_s_buffer_prefetch_data",
+                    "s.dcache.inv" => "__builtin_amdgcn_s_dcache_inv",
+                    "s.dcache.inv.vol" => "__builtin_amdgcn_s_dcache_inv_vol",
+                    "s.dcache.wb" => "__builtin_amdgcn_s_dcache_wb",
+                    "s.dcache.wb.vol" => "__builtin_amdgcn_s_dcache_wb_vol",
+                    "s.decperflevel" => "__builtin_amdgcn_s_decperflevel",
+                    "s.get.barrier.state" => "__builtin_amdgcn_s_get_barrier_state",
+                    "s.get.named.barrier.state" => "__builtin_amdgcn_s_get_named_barrier_state",
+                    "s.get.waveid.in.workgroup" => "__builtin_amdgcn_s_get_waveid_in_workgroup",
+                    "s.getpc" => "__builtin_amdgcn_s_getpc",
+                    "s.getreg" => "__builtin_amdgcn_s_getreg",
+                    "s.incperflevel" => "__builtin_amdgcn_s_incperflevel",
+                    "s.memrealtime" => "__builtin_amdgcn_s_memrealtime",
+                    "s.memtime" => "__builtin_amdgcn_s_memtime",
+                    "s.sendmsg" => "__builtin_amdgcn_s_sendmsg",
+                    "s.sendmsghalt" => "__builtin_amdgcn_s_sendmsghalt",
+                    "s.setprio" => "__builtin_amdgcn_s_setprio",
+                    "s.setreg" => "__builtin_amdgcn_s_setreg",
+                    "s.sleep" => "__builtin_amdgcn_s_sleep",
+                    "s.sleep.var" => "__builtin_amdgcn_s_sleep_var",
+                    "s.ttracedata" => "__builtin_amdgcn_s_ttracedata",
+                    "s.ttracedata.imm" => "__builtin_amdgcn_s_ttracedata_imm",
+                    "s.wait.event.export.ready" => "__builtin_amdgcn_s_wait_event_export_ready",
+                    "s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
+                    "sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
+                    "sad.u16" => "__builtin_amdgcn_sad_u16",
+                    "sad.u8" => "__builtin_amdgcn_sad_u8",
+                    "sched.barrier" => "__builtin_amdgcn_sched_barrier",
+                    "sched.group.barrier" => "__builtin_amdgcn_sched_group_barrier",
+                    "sdot2" => "__builtin_amdgcn_sdot2",
+                    "sdot4" => "__builtin_amdgcn_sdot4",
+                    "sdot8" => "__builtin_amdgcn_sdot8",
+                    "smfmac.f32.16x16x128.bf8.bf8" => {
+                        "__builtin_amdgcn_smfmac_f32_16x16x128_bf8_bf8"
+                    }
+                    "smfmac.f32.16x16x128.bf8.fp8" => {
+                        "__builtin_amdgcn_smfmac_f32_16x16x128_bf8_fp8"
+                    }
+                    "smfmac.f32.16x16x128.fp8.bf8" => {
+                        "__builtin_amdgcn_smfmac_f32_16x16x128_fp8_bf8"
+                    }
+                    "smfmac.f32.16x16x128.fp8.fp8" => {
+                        "__builtin_amdgcn_smfmac_f32_16x16x128_fp8_fp8"
+                    }
+                    "smfmac.f32.16x16x32.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x32_bf16",
+                    "smfmac.f32.16x16x32.f16" => "__builtin_amdgcn_smfmac_f32_16x16x32_f16",
+                    "smfmac.f32.16x16x64.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf16",
+                    "smfmac.f32.16x16x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_bf8",
+                    "smfmac.f32.16x16x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_fp8",
+                    "smfmac.f32.16x16x64.f16" => "__builtin_amdgcn_smfmac_f32_16x16x64_f16",
+                    "smfmac.f32.16x16x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_bf8",
+                    "smfmac.f32.16x16x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_fp8",
+                    "smfmac.f32.32x32x16.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x16_bf16",
+                    "smfmac.f32.32x32x16.f16" => "__builtin_amdgcn_smfmac_f32_32x32x16_f16",
+                    "smfmac.f32.32x32x32.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf16",
+                    "smfmac.f32.32x32x32.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_bf8",
+                    "smfmac.f32.32x32x32.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_fp8",
+                    "smfmac.f32.32x32x32.f16" => "__builtin_amdgcn_smfmac_f32_32x32x32_f16",
+                    "smfmac.f32.32x32x32.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_bf8",
+                    "smfmac.f32.32x32x32.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_fp8",
+                    "smfmac.f32.32x32x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x64_bf8_bf8",
+                    "smfmac.f32.32x32x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x64_bf8_fp8",
+                    "smfmac.f32.32x32x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x64_fp8_bf8",
+                    "smfmac.f32.32x32x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x64_fp8_fp8",
+                    "smfmac.i32.16x16x128.i8" => "__builtin_amdgcn_smfmac_i32_16x16x128_i8",
+                    "smfmac.i32.16x16x64.i8" => "__builtin_amdgcn_smfmac_i32_16x16x64_i8",
+                    "smfmac.i32.32x32x32.i8" => "__builtin_amdgcn_smfmac_i32_32x32x32_i8",
+                    "smfmac.i32.32x32x64.i8" => "__builtin_amdgcn_smfmac_i32_32x32x64_i8",
+                    "sudot4" => "__builtin_amdgcn_sudot4",
+                    "sudot8" => "__builtin_amdgcn_sudot8",
+                    "udot2" => "__builtin_amdgcn_udot2",
+                    "udot4" => "__builtin_amdgcn_udot4",
+                    "udot8" => "__builtin_amdgcn_udot8",
+                    "wave.barrier" => "__builtin_amdgcn_wave_barrier",
+                    "wavefrontsize" => "__builtin_amdgcn_wavefrontsize",
+                    "workgroup.id.x" => "__builtin_amdgcn_workgroup_id_x",
+                    "workgroup.id.y" => "__builtin_amdgcn_workgroup_id_y",
+                    "workgroup.id.z" => "__builtin_amdgcn_workgroup_id_z",
+                    "workitem.id.x" => "__builtin_amdgcn_workitem_id_x",
+                    "workitem.id.y" => "__builtin_amdgcn_workitem_id_y",
+                    "workitem.id.z" => "__builtin_amdgcn_workitem_id_z",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            amdgcn(name)
+        }
+        "arm" => {
+            #[allow(non_snake_case)]
+            fn arm(name: &str) -> &str {
+                match name {
+                    // arm
+                    "cdp" => "__builtin_arm_cdp",
+                    "cdp2" => "__builtin_arm_cdp2",
+                    "cmse.tt" => "__builtin_arm_cmse_TT",
+                    "cmse.tta" => "__builtin_arm_cmse_TTA",
+                    "cmse.ttat" => "__builtin_arm_cmse_TTAT",
+                    "cmse.ttt" => "__builtin_arm_cmse_TTT",
+                    "dmb" => "__builtin_arm_dmb",
+                    "dsb" => "__builtin_arm_dsb",
+                    "get.fpscr" => "__builtin_arm_get_fpscr",
+                    "isb" => "__builtin_arm_isb",
+                    "ldc" => "__builtin_arm_ldc",
+                    "ldc2" => "__builtin_arm_ldc2",
+                    "ldc2l" => "__builtin_arm_ldc2l",
+                    "ldcl" => "__builtin_arm_ldcl",
+                    "mcr" => "__builtin_arm_mcr",
+                    "mcr2" => "__builtin_arm_mcr2",
+                    "mcrr" => "__builtin_arm_mcrr",
+                    "mcrr2" => "__builtin_arm_mcrr2",
+                    "mrc" => "__builtin_arm_mrc",
+                    "mrc2" => "__builtin_arm_mrc2",
+                    "qadd" => "__builtin_arm_qadd",
+                    "qadd16" => "__builtin_arm_qadd16",
+                    "qadd8" => "__builtin_arm_qadd8",
+                    "qasx" => "__builtin_arm_qasx",
+                    "qsax" => "__builtin_arm_qsax",
+                    "qsub" => "__builtin_arm_qsub",
+                    "qsub16" => "__builtin_arm_qsub16",
+                    "qsub8" => "__builtin_arm_qsub8",
+                    "sadd16" => "__builtin_arm_sadd16",
+                    "sadd8" => "__builtin_arm_sadd8",
+                    "sasx" => "__builtin_arm_sasx",
+                    "sel" => "__builtin_arm_sel",
+                    "set.fpscr" => "__builtin_arm_set_fpscr",
+                    "shadd16" => "__builtin_arm_shadd16",
+                    "shadd8" => "__builtin_arm_shadd8",
+                    "shasx" => "__builtin_arm_shasx",
+                    "shsax" => "__builtin_arm_shsax",
+                    "shsub16" => "__builtin_arm_shsub16",
+                    "shsub8" => "__builtin_arm_shsub8",
+                    "smlabb" => "__builtin_arm_smlabb",
+                    "smlabt" => "__builtin_arm_smlabt",
+                    "smlad" => "__builtin_arm_smlad",
+                    "smladx" => "__builtin_arm_smladx",
+                    "smlald" => "__builtin_arm_smlald",
+                    "smlaldx" => "__builtin_arm_smlaldx",
+                    "smlatb" => "__builtin_arm_smlatb",
+                    "smlatt" => "__builtin_arm_smlatt",
+                    "smlawb" => "__builtin_arm_smlawb",
+                    "smlawt" => "__builtin_arm_smlawt",
+                    "smlsd" => "__builtin_arm_smlsd",
+                    "smlsdx" => "__builtin_arm_smlsdx",
+                    "smlsld" => "__builtin_arm_smlsld",
+                    "smlsldx" => "__builtin_arm_smlsldx",
+                    "smuad" => "__builtin_arm_smuad",
+                    "smuadx" => "__builtin_arm_smuadx",
+                    "smulbb" => "__builtin_arm_smulbb",
+                    "smulbt" => "__builtin_arm_smulbt",
+                    "smultb" => "__builtin_arm_smultb",
+                    "smultt" => "__builtin_arm_smultt",
+                    "smulwb" => "__builtin_arm_smulwb",
+                    "smulwt" => "__builtin_arm_smulwt",
+                    "smusd" => "__builtin_arm_smusd",
+                    "smusdx" => "__builtin_arm_smusdx",
+                    "ssat" => "__builtin_arm_ssat",
+                    "ssat16" => "__builtin_arm_ssat16",
+                    "ssax" => "__builtin_arm_ssax",
+                    "ssub16" => "__builtin_arm_ssub16",
+                    "ssub8" => "__builtin_arm_ssub8",
+                    "stc" => "__builtin_arm_stc",
+                    "stc2" => "__builtin_arm_stc2",
+                    "stc2l" => "__builtin_arm_stc2l",
+                    "stcl" => "__builtin_arm_stcl",
+                    "sxtab16" => "__builtin_arm_sxtab16",
+                    "sxtb16" => "__builtin_arm_sxtb16",
+                    "thread.pointer" => "__builtin_thread_pointer",
+                    "uadd16" => "__builtin_arm_uadd16",
+                    "uadd8" => "__builtin_arm_uadd8",
+                    "uasx" => "__builtin_arm_uasx",
+                    "uhadd16" => "__builtin_arm_uhadd16",
+                    "uhadd8" => "__builtin_arm_uhadd8",
+                    "uhasx" => "__builtin_arm_uhasx",
+                    "uhsax" => "__builtin_arm_uhsax",
+                    "uhsub16" => "__builtin_arm_uhsub16",
+                    "uhsub8" => "__builtin_arm_uhsub8",
+                    "uqadd16" => "__builtin_arm_uqadd16",
+                    "uqadd8" => "__builtin_arm_uqadd8",
+                    "uqasx" => "__builtin_arm_uqasx",
+                    "uqsax" => "__builtin_arm_uqsax",
+                    "uqsub16" => "__builtin_arm_uqsub16",
+                    "uqsub8" => "__builtin_arm_uqsub8",
+                    "usad8" => "__builtin_arm_usad8",
+                    "usada8" => "__builtin_arm_usada8",
+                    "usat" => "__builtin_arm_usat",
+                    "usat16" => "__builtin_arm_usat16",
+                    "usax" => "__builtin_arm_usax",
+                    "usub16" => "__builtin_arm_usub16",
+                    "usub8" => "__builtin_arm_usub8",
+                    "uxtab16" => "__builtin_arm_uxtab16",
+                    "uxtb16" => "__builtin_arm_uxtb16",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            arm(name)
+        }
+        "bpf" => {
+            #[allow(non_snake_case)]
+            fn bpf(name: &str) -> &str {
+                match name {
+                    // bpf
+                    "btf.type.id" => "__builtin_bpf_btf_type_id",
+                    "compare" => "__builtin_bpf_compare",
+                    "getelementptr.and.load" => "__builtin_bpf_getelementptr_and_load",
+                    "getelementptr.and.store" => "__builtin_bpf_getelementptr_and_store",
+                    "load.byte" => "__builtin_bpf_load_byte",
+                    "load.half" => "__builtin_bpf_load_half",
+                    "load.word" => "__builtin_bpf_load_word",
+                    "passthrough" => "__builtin_bpf_passthrough",
+                    "preserve.enum.value" => "__builtin_bpf_preserve_enum_value",
+                    "preserve.field.info" => "__builtin_bpf_preserve_field_info",
+                    "preserve.type.info" => "__builtin_bpf_preserve_type_info",
+                    "pseudo" => "__builtin_bpf_pseudo",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            bpf(name)
+        }
+        "cuda" => {
+            #[allow(non_snake_case)]
+            fn cuda(name: &str) -> &str {
+                match name {
+                    // cuda
+                    "syncthreads" => "__syncthreads",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            cuda(name)
+        }
+        "hexagon" => {
+            #[allow(non_snake_case)]
+            fn hexagon(name: &str) -> &str {
+                match name {
+                    // hexagon
+                    "A2.abs" => "__builtin_HEXAGON_A2_abs",
+                    "A2.absp" => "__builtin_HEXAGON_A2_absp",
+                    "A2.abssat" => "__builtin_HEXAGON_A2_abssat",
+                    "A2.add" => "__builtin_HEXAGON_A2_add",
+                    "A2.addh.h16.hh" => "__builtin_HEXAGON_A2_addh_h16_hh",
+                    "A2.addh.h16.hl" => "__builtin_HEXAGON_A2_addh_h16_hl",
+                    "A2.addh.h16.lh" => "__builtin_HEXAGON_A2_addh_h16_lh",
+                    "A2.addh.h16.ll" => "__builtin_HEXAGON_A2_addh_h16_ll",
+                    "A2.addh.h16.sat.hh" => "__builtin_HEXAGON_A2_addh_h16_sat_hh",
+                    "A2.addh.h16.sat.hl" => "__builtin_HEXAGON_A2_addh_h16_sat_hl",
+                    "A2.addh.h16.sat.lh" => "__builtin_HEXAGON_A2_addh_h16_sat_lh",
+                    "A2.addh.h16.sat.ll" => "__builtin_HEXAGON_A2_addh_h16_sat_ll",
+                    "A2.addh.l16.hl" => "__builtin_HEXAGON_A2_addh_l16_hl",
+                    "A2.addh.l16.ll" => "__builtin_HEXAGON_A2_addh_l16_ll",
+                    "A2.addh.l16.sat.hl" => "__builtin_HEXAGON_A2_addh_l16_sat_hl",
+                    "A2.addh.l16.sat.ll" => "__builtin_HEXAGON_A2_addh_l16_sat_ll",
+                    "A2.addi" => "__builtin_HEXAGON_A2_addi",
+                    "A2.addp" => "__builtin_HEXAGON_A2_addp",
+                    "A2.addpsat" => "__builtin_HEXAGON_A2_addpsat",
+                    "A2.addsat" => "__builtin_HEXAGON_A2_addsat",
+                    "A2.addsp" => "__builtin_HEXAGON_A2_addsp",
+                    "A2.and" => "__builtin_HEXAGON_A2_and",
+                    "A2.andir" => "__builtin_HEXAGON_A2_andir",
+                    "A2.andp" => "__builtin_HEXAGON_A2_andp",
+                    "A2.aslh" => "__builtin_HEXAGON_A2_aslh",
+                    "A2.asrh" => "__builtin_HEXAGON_A2_asrh",
+                    "A2.combine.hh" => "__builtin_HEXAGON_A2_combine_hh",
+                    "A2.combine.hl" => "__builtin_HEXAGON_A2_combine_hl",
+                    "A2.combine.lh" => "__builtin_HEXAGON_A2_combine_lh",
+                    "A2.combine.ll" => "__builtin_HEXAGON_A2_combine_ll",
+                    "A2.combineii" => "__builtin_HEXAGON_A2_combineii",
+                    "A2.combinew" => "__builtin_HEXAGON_A2_combinew",
+                    "A2.max" => "__builtin_HEXAGON_A2_max",
+                    "A2.maxp" => "__builtin_HEXAGON_A2_maxp",
+                    "A2.maxu" => "__builtin_HEXAGON_A2_maxu",
+                    "A2.maxup" => "__builtin_HEXAGON_A2_maxup",
+                    "A2.min" => "__builtin_HEXAGON_A2_min",
+                    "A2.minp" => "__builtin_HEXAGON_A2_minp",
+                    "A2.minu" => "__builtin_HEXAGON_A2_minu",
+                    "A2.minup" => "__builtin_HEXAGON_A2_minup",
+                    "A2.neg" => "__builtin_HEXAGON_A2_neg",
+                    "A2.negp" => "__builtin_HEXAGON_A2_negp",
+                    "A2.negsat" => "__builtin_HEXAGON_A2_negsat",
+                    "A2.not" => "__builtin_HEXAGON_A2_not",
+                    "A2.notp" => "__builtin_HEXAGON_A2_notp",
+                    "A2.or" => "__builtin_HEXAGON_A2_or",
+                    "A2.orir" => "__builtin_HEXAGON_A2_orir",
+                    "A2.orp" => "__builtin_HEXAGON_A2_orp",
+                    "A2.roundsat" => "__builtin_HEXAGON_A2_roundsat",
+                    "A2.sat" => "__builtin_HEXAGON_A2_sat",
+                    "A2.satb" => "__builtin_HEXAGON_A2_satb",
+                    "A2.sath" => "__builtin_HEXAGON_A2_sath",
+                    "A2.satub" => "__builtin_HEXAGON_A2_satub",
+                    "A2.satuh" => "__builtin_HEXAGON_A2_satuh",
+                    "A2.sub" => "__builtin_HEXAGON_A2_sub",
+                    "A2.subh.h16.hh" => "__builtin_HEXAGON_A2_subh_h16_hh",
+                    "A2.subh.h16.hl" => "__builtin_HEXAGON_A2_subh_h16_hl",
+                    "A2.subh.h16.lh" => "__builtin_HEXAGON_A2_subh_h16_lh",
+                    "A2.subh.h16.ll" => "__builtin_HEXAGON_A2_subh_h16_ll",
+                    "A2.subh.h16.sat.hh" => "__builtin_HEXAGON_A2_subh_h16_sat_hh",
+                    "A2.subh.h16.sat.hl" => "__builtin_HEXAGON_A2_subh_h16_sat_hl",
+                    "A2.subh.h16.sat.lh" => "__builtin_HEXAGON_A2_subh_h16_sat_lh",
+                    "A2.subh.h16.sat.ll" => "__builtin_HEXAGON_A2_subh_h16_sat_ll",
+                    "A2.subh.l16.hl" => "__builtin_HEXAGON_A2_subh_l16_hl",
+                    "A2.subh.l16.ll" => "__builtin_HEXAGON_A2_subh_l16_ll",
+                    "A2.subh.l16.sat.hl" => "__builtin_HEXAGON_A2_subh_l16_sat_hl",
+                    "A2.subh.l16.sat.ll" => "__builtin_HEXAGON_A2_subh_l16_sat_ll",
+                    "A2.subp" => "__builtin_HEXAGON_A2_subp",
+                    "A2.subri" => "__builtin_HEXAGON_A2_subri",
+                    "A2.subsat" => "__builtin_HEXAGON_A2_subsat",
+                    "A2.svaddh" => "__builtin_HEXAGON_A2_svaddh",
+                    "A2.svaddhs" => "__builtin_HEXAGON_A2_svaddhs",
+                    "A2.svadduhs" => "__builtin_HEXAGON_A2_svadduhs",
+                    "A2.svavgh" => "__builtin_HEXAGON_A2_svavgh",
+                    "A2.svavghs" => "__builtin_HEXAGON_A2_svavghs",
+                    "A2.svnavgh" => "__builtin_HEXAGON_A2_svnavgh",
+                    "A2.svsubh" => "__builtin_HEXAGON_A2_svsubh",
+                    "A2.svsubhs" => "__builtin_HEXAGON_A2_svsubhs",
+                    "A2.svsubuhs" => "__builtin_HEXAGON_A2_svsubuhs",
+                    "A2.swiz" => "__builtin_HEXAGON_A2_swiz",
+                    "A2.sxtb" => "__builtin_HEXAGON_A2_sxtb",
+                    "A2.sxth" => "__builtin_HEXAGON_A2_sxth",
+                    "A2.sxtw" => "__builtin_HEXAGON_A2_sxtw",
+                    "A2.tfr" => "__builtin_HEXAGON_A2_tfr",
+                    "A2.tfrih" => "__builtin_HEXAGON_A2_tfrih",
+                    "A2.tfril" => "__builtin_HEXAGON_A2_tfril",
+                    "A2.tfrp" => "__builtin_HEXAGON_A2_tfrp",
+                    "A2.tfrpi" => "__builtin_HEXAGON_A2_tfrpi",
+                    "A2.tfrsi" => "__builtin_HEXAGON_A2_tfrsi",
+                    "A2.vabsh" => "__builtin_HEXAGON_A2_vabsh",
+                    "A2.vabshsat" => "__builtin_HEXAGON_A2_vabshsat",
+                    "A2.vabsw" => "__builtin_HEXAGON_A2_vabsw",
+                    "A2.vabswsat" => "__builtin_HEXAGON_A2_vabswsat",
+                    "A2.vaddb.map" => "__builtin_HEXAGON_A2_vaddb_map",
+                    "A2.vaddh" => "__builtin_HEXAGON_A2_vaddh",
+                    "A2.vaddhs" => "__builtin_HEXAGON_A2_vaddhs",
+                    "A2.vaddub" => "__builtin_HEXAGON_A2_vaddub",
+                    "A2.vaddubs" => "__builtin_HEXAGON_A2_vaddubs",
+                    "A2.vadduhs" => "__builtin_HEXAGON_A2_vadduhs",
+                    "A2.vaddw" => "__builtin_HEXAGON_A2_vaddw",
+                    "A2.vaddws" => "__builtin_HEXAGON_A2_vaddws",
+                    "A2.vavgh" => "__builtin_HEXAGON_A2_vavgh",
+                    "A2.vavghcr" => "__builtin_HEXAGON_A2_vavghcr",
+                    "A2.vavghr" => "__builtin_HEXAGON_A2_vavghr",
+                    "A2.vavgub" => "__builtin_HEXAGON_A2_vavgub",
+                    "A2.vavgubr" => "__builtin_HEXAGON_A2_vavgubr",
+                    "A2.vavguh" => "__builtin_HEXAGON_A2_vavguh",
+                    "A2.vavguhr" => "__builtin_HEXAGON_A2_vavguhr",
+                    "A2.vavguw" => "__builtin_HEXAGON_A2_vavguw",
+                    "A2.vavguwr" => "__builtin_HEXAGON_A2_vavguwr",
+                    "A2.vavgw" => "__builtin_HEXAGON_A2_vavgw",
+                    "A2.vavgwcr" => "__builtin_HEXAGON_A2_vavgwcr",
+                    "A2.vavgwr" => "__builtin_HEXAGON_A2_vavgwr",
+                    "A2.vcmpbeq" => "__builtin_HEXAGON_A2_vcmpbeq",
+                    "A2.vcmpbgtu" => "__builtin_HEXAGON_A2_vcmpbgtu",
+                    "A2.vcmpheq" => "__builtin_HEXAGON_A2_vcmpheq",
+                    "A2.vcmphgt" => "__builtin_HEXAGON_A2_vcmphgt",
+                    "A2.vcmphgtu" => "__builtin_HEXAGON_A2_vcmphgtu",
+                    "A2.vcmpweq" => "__builtin_HEXAGON_A2_vcmpweq",
+                    "A2.vcmpwgt" => "__builtin_HEXAGON_A2_vcmpwgt",
+                    "A2.vcmpwgtu" => "__builtin_HEXAGON_A2_vcmpwgtu",
+                    "A2.vconj" => "__builtin_HEXAGON_A2_vconj",
+                    "A2.vmaxb" => "__builtin_HEXAGON_A2_vmaxb",
+                    "A2.vmaxh" => "__builtin_HEXAGON_A2_vmaxh",
+                    "A2.vmaxub" => "__builtin_HEXAGON_A2_vmaxub",
+                    "A2.vmaxuh" => "__builtin_HEXAGON_A2_vmaxuh",
+                    "A2.vmaxuw" => "__builtin_HEXAGON_A2_vmaxuw",
+                    "A2.vmaxw" => "__builtin_HEXAGON_A2_vmaxw",
+                    "A2.vminb" => "__builtin_HEXAGON_A2_vminb",
+                    "A2.vminh" => "__builtin_HEXAGON_A2_vminh",
+                    "A2.vminub" => "__builtin_HEXAGON_A2_vminub",
+                    "A2.vminuh" => "__builtin_HEXAGON_A2_vminuh",
+                    "A2.vminuw" => "__builtin_HEXAGON_A2_vminuw",
+                    "A2.vminw" => "__builtin_HEXAGON_A2_vminw",
+                    "A2.vnavgh" => "__builtin_HEXAGON_A2_vnavgh",
+                    "A2.vnavghcr" => "__builtin_HEXAGON_A2_vnavghcr",
+                    "A2.vnavghr" => "__builtin_HEXAGON_A2_vnavghr",
+                    "A2.vnavgw" => "__builtin_HEXAGON_A2_vnavgw",
+                    "A2.vnavgwcr" => "__builtin_HEXAGON_A2_vnavgwcr",
+                    "A2.vnavgwr" => "__builtin_HEXAGON_A2_vnavgwr",
+                    "A2.vraddub" => "__builtin_HEXAGON_A2_vraddub",
+                    "A2.vraddub.acc" => "__builtin_HEXAGON_A2_vraddub_acc",
+                    "A2.vrsadub" => "__builtin_HEXAGON_A2_vrsadub",
+                    "A2.vrsadub.acc" => "__builtin_HEXAGON_A2_vrsadub_acc",
+                    "A2.vsubb.map" => "__builtin_HEXAGON_A2_vsubb_map",
+                    "A2.vsubh" => "__builtin_HEXAGON_A2_vsubh",
+                    "A2.vsubhs" => "__builtin_HEXAGON_A2_vsubhs",
+                    "A2.vsubub" => "__builtin_HEXAGON_A2_vsubub",
+                    "A2.vsububs" => "__builtin_HEXAGON_A2_vsububs",
+                    "A2.vsubuhs" => "__builtin_HEXAGON_A2_vsubuhs",
+                    "A2.vsubw" => "__builtin_HEXAGON_A2_vsubw",
+                    "A2.vsubws" => "__builtin_HEXAGON_A2_vsubws",
+                    "A2.xor" => "__builtin_HEXAGON_A2_xor",
+                    "A2.xorp" => "__builtin_HEXAGON_A2_xorp",
+                    "A2.zxtb" => "__builtin_HEXAGON_A2_zxtb",
+                    "A2.zxth" => "__builtin_HEXAGON_A2_zxth",
+                    "A4.andn" => "__builtin_HEXAGON_A4_andn",
+                    "A4.andnp" => "__builtin_HEXAGON_A4_andnp",
+                    "A4.bitsplit" => "__builtin_HEXAGON_A4_bitsplit",
+                    "A4.bitspliti" => "__builtin_HEXAGON_A4_bitspliti",
+                    "A4.boundscheck" => "__builtin_HEXAGON_A4_boundscheck",
+                    "A4.cmpbeq" => "__builtin_HEXAGON_A4_cmpbeq",
+                    "A4.cmpbeqi" => "__builtin_HEXAGON_A4_cmpbeqi",
+                    "A4.cmpbgt" => "__builtin_HEXAGON_A4_cmpbgt",
+                    "A4.cmpbgti" => "__builtin_HEXAGON_A4_cmpbgti",
+                    "A4.cmpbgtu" => "__builtin_HEXAGON_A4_cmpbgtu",
+                    "A4.cmpbgtui" => "__builtin_HEXAGON_A4_cmpbgtui",
+                    "A4.cmpheq" => "__builtin_HEXAGON_A4_cmpheq",
+                    "A4.cmpheqi" => "__builtin_HEXAGON_A4_cmpheqi",
+                    "A4.cmphgt" => "__builtin_HEXAGON_A4_cmphgt",
+                    "A4.cmphgti" => "__builtin_HEXAGON_A4_cmphgti",
+                    "A4.cmphgtu" => "__builtin_HEXAGON_A4_cmphgtu",
+                    "A4.cmphgtui" => "__builtin_HEXAGON_A4_cmphgtui",
+                    "A4.combineir" => "__builtin_HEXAGON_A4_combineir",
+                    "A4.combineri" => "__builtin_HEXAGON_A4_combineri",
+                    "A4.cround.ri" => "__builtin_HEXAGON_A4_cround_ri",
+                    "A4.cround.rr" => "__builtin_HEXAGON_A4_cround_rr",
+                    "A4.modwrapu" => "__builtin_HEXAGON_A4_modwrapu",
+                    "A4.orn" => "__builtin_HEXAGON_A4_orn",
+                    "A4.ornp" => "__builtin_HEXAGON_A4_ornp",
+                    "A4.rcmpeq" => "__builtin_HEXAGON_A4_rcmpeq",
+                    "A4.rcmpeqi" => "__builtin_HEXAGON_A4_rcmpeqi",
+                    "A4.rcmpneq" => "__builtin_HEXAGON_A4_rcmpneq",
+                    "A4.rcmpneqi" => "__builtin_HEXAGON_A4_rcmpneqi",
+                    "A4.round.ri" => "__builtin_HEXAGON_A4_round_ri",
+                    "A4.round.ri.sat" => "__builtin_HEXAGON_A4_round_ri_sat",
+                    "A4.round.rr" => "__builtin_HEXAGON_A4_round_rr",
+                    "A4.round.rr.sat" => "__builtin_HEXAGON_A4_round_rr_sat",
+                    "A4.tlbmatch" => "__builtin_HEXAGON_A4_tlbmatch",
+                    "A4.vcmpbeq.any" => "__builtin_HEXAGON_A4_vcmpbeq_any",
+                    "A4.vcmpbeqi" => "__builtin_HEXAGON_A4_vcmpbeqi",
+                    "A4.vcmpbgt" => "__builtin_HEXAGON_A4_vcmpbgt",
+                    "A4.vcmpbgti" => "__builtin_HEXAGON_A4_vcmpbgti",
+                    "A4.vcmpbgtui" => "__builtin_HEXAGON_A4_vcmpbgtui",
+                    "A4.vcmpheqi" => "__builtin_HEXAGON_A4_vcmpheqi",
+                    "A4.vcmphgti" => "__builtin_HEXAGON_A4_vcmphgti",
+                    "A4.vcmphgtui" => "__builtin_HEXAGON_A4_vcmphgtui",
+                    "A4.vcmpweqi" => "__builtin_HEXAGON_A4_vcmpweqi",
+                    "A4.vcmpwgti" => "__builtin_HEXAGON_A4_vcmpwgti",
+                    "A4.vcmpwgtui" => "__builtin_HEXAGON_A4_vcmpwgtui",
+                    "A4.vrmaxh" => "__builtin_HEXAGON_A4_vrmaxh",
+                    "A4.vrmaxuh" => "__builtin_HEXAGON_A4_vrmaxuh",
+                    "A4.vrmaxuw" => "__builtin_HEXAGON_A4_vrmaxuw",
+                    "A4.vrmaxw" => "__builtin_HEXAGON_A4_vrmaxw",
+                    "A4.vrminh" => "__builtin_HEXAGON_A4_vrminh",
+                    "A4.vrminuh" => "__builtin_HEXAGON_A4_vrminuh",
+                    "A4.vrminuw" => "__builtin_HEXAGON_A4_vrminuw",
+                    "A4.vrminw" => "__builtin_HEXAGON_A4_vrminw",
+                    "A5.vaddhubs" => "__builtin_HEXAGON_A5_vaddhubs",
+                    "A6.vcmpbeq.notany" => "__builtin_HEXAGON_A6_vcmpbeq_notany",
+                    "A7.clip" => "__builtin_HEXAGON_A7_clip",
+                    "A7.croundd.ri" => "__builtin_HEXAGON_A7_croundd_ri",
+                    "A7.croundd.rr" => "__builtin_HEXAGON_A7_croundd_rr",
+                    "A7.vclip" => "__builtin_HEXAGON_A7_vclip",
+                    "C2.all8" => "__builtin_HEXAGON_C2_all8",
+                    "C2.and" => "__builtin_HEXAGON_C2_and",
+                    "C2.andn" => "__builtin_HEXAGON_C2_andn",
+                    "C2.any8" => "__builtin_HEXAGON_C2_any8",
+                    "C2.bitsclr" => "__builtin_HEXAGON_C2_bitsclr",
+                    "C2.bitsclri" => "__builtin_HEXAGON_C2_bitsclri",
+                    "C2.bitsset" => "__builtin_HEXAGON_C2_bitsset",
+                    "C2.cmpeq" => "__builtin_HEXAGON_C2_cmpeq",
+                    "C2.cmpeqi" => "__builtin_HEXAGON_C2_cmpeqi",
+                    "C2.cmpeqp" => "__builtin_HEXAGON_C2_cmpeqp",
+                    "C2.cmpgei" => "__builtin_HEXAGON_C2_cmpgei",
+                    "C2.cmpgeui" => "__builtin_HEXAGON_C2_cmpgeui",
+                    "C2.cmpgt" => "__builtin_HEXAGON_C2_cmpgt",
+                    "C2.cmpgti" => "__builtin_HEXAGON_C2_cmpgti",
+                    "C2.cmpgtp" => "__builtin_HEXAGON_C2_cmpgtp",
+                    "C2.cmpgtu" => "__builtin_HEXAGON_C2_cmpgtu",
+                    "C2.cmpgtui" => "__builtin_HEXAGON_C2_cmpgtui",
+                    "C2.cmpgtup" => "__builtin_HEXAGON_C2_cmpgtup",
+                    "C2.cmplt" => "__builtin_HEXAGON_C2_cmplt",
+                    "C2.cmpltu" => "__builtin_HEXAGON_C2_cmpltu",
+                    "C2.mask" => "__builtin_HEXAGON_C2_mask",
+                    "C2.mux" => "__builtin_HEXAGON_C2_mux",
+                    "C2.muxii" => "__builtin_HEXAGON_C2_muxii",
+                    "C2.muxir" => "__builtin_HEXAGON_C2_muxir",
+                    "C2.muxri" => "__builtin_HEXAGON_C2_muxri",
+                    "C2.not" => "__builtin_HEXAGON_C2_not",
+                    "C2.or" => "__builtin_HEXAGON_C2_or",
+                    "C2.orn" => "__builtin_HEXAGON_C2_orn",
+                    "C2.pxfer.map" => "__builtin_HEXAGON_C2_pxfer_map",
+                    "C2.tfrpr" => "__builtin_HEXAGON_C2_tfrpr",
+                    "C2.tfrrp" => "__builtin_HEXAGON_C2_tfrrp",
+                    "C2.vitpack" => "__builtin_HEXAGON_C2_vitpack",
+                    "C2.vmux" => "__builtin_HEXAGON_C2_vmux",
+                    "C2.xor" => "__builtin_HEXAGON_C2_xor",
+                    "C4.and.and" => "__builtin_HEXAGON_C4_and_and",
+                    "C4.and.andn" => "__builtin_HEXAGON_C4_and_andn",
+                    "C4.and.or" => "__builtin_HEXAGON_C4_and_or",
+                    "C4.and.orn" => "__builtin_HEXAGON_C4_and_orn",
+                    "C4.cmplte" => "__builtin_HEXAGON_C4_cmplte",
+                    "C4.cmpltei" => "__builtin_HEXAGON_C4_cmpltei",
+                    "C4.cmplteu" => "__builtin_HEXAGON_C4_cmplteu",
+                    "C4.cmplteui" => "__builtin_HEXAGON_C4_cmplteui",
+                    "C4.cmpneq" => "__builtin_HEXAGON_C4_cmpneq",
+                    "C4.cmpneqi" => "__builtin_HEXAGON_C4_cmpneqi",
+                    "C4.fastcorner9" => "__builtin_HEXAGON_C4_fastcorner9",
+                    "C4.fastcorner9.not" => "__builtin_HEXAGON_C4_fastcorner9_not",
+                    "C4.nbitsclr" => "__builtin_HEXAGON_C4_nbitsclr",
+                    "C4.nbitsclri" => "__builtin_HEXAGON_C4_nbitsclri",
+                    "C4.nbitsset" => "__builtin_HEXAGON_C4_nbitsset",
+                    "C4.or.and" => "__builtin_HEXAGON_C4_or_and",
+                    "C4.or.andn" => "__builtin_HEXAGON_C4_or_andn",
+                    "C4.or.or" => "__builtin_HEXAGON_C4_or_or",
+                    "C4.or.orn" => "__builtin_HEXAGON_C4_or_orn",
+                    "F2.conv.d2df" => "__builtin_HEXAGON_F2_conv_d2df",
+                    "F2.conv.d2sf" => "__builtin_HEXAGON_F2_conv_d2sf",
+                    "F2.conv.df2d" => "__builtin_HEXAGON_F2_conv_df2d",
+                    "F2.conv.df2d.chop" => "__builtin_HEXAGON_F2_conv_df2d_chop",
+                    "F2.conv.df2sf" => "__builtin_HEXAGON_F2_conv_df2sf",
+                    "F2.conv.df2ud" => "__builtin_HEXAGON_F2_conv_df2ud",
+                    "F2.conv.df2ud.chop" => "__builtin_HEXAGON_F2_conv_df2ud_chop",
+                    "F2.conv.df2uw" => "__builtin_HEXAGON_F2_conv_df2uw",
+                    "F2.conv.df2uw.chop" => "__builtin_HEXAGON_F2_conv_df2uw_chop",
+                    "F2.conv.df2w" => "__builtin_HEXAGON_F2_conv_df2w",
+                    "F2.conv.df2w.chop" => "__builtin_HEXAGON_F2_conv_df2w_chop",
+                    "F2.conv.sf2d" => "__builtin_HEXAGON_F2_conv_sf2d",
+                    "F2.conv.sf2d.chop" => "__builtin_HEXAGON_F2_conv_sf2d_chop",
+                    "F2.conv.sf2df" => "__builtin_HEXAGON_F2_conv_sf2df",
+                    "F2.conv.sf2ud" => "__builtin_HEXAGON_F2_conv_sf2ud",
+                    "F2.conv.sf2ud.chop" => "__builtin_HEXAGON_F2_conv_sf2ud_chop",
+                    "F2.conv.sf2uw" => "__builtin_HEXAGON_F2_conv_sf2uw",
+                    "F2.conv.sf2uw.chop" => "__builtin_HEXAGON_F2_conv_sf2uw_chop",
+                    "F2.conv.sf2w" => "__builtin_HEXAGON_F2_conv_sf2w",
+                    "F2.conv.sf2w.chop" => "__builtin_HEXAGON_F2_conv_sf2w_chop",
+                    "F2.conv.ud2df" => "__builtin_HEXAGON_F2_conv_ud2df",
+                    "F2.conv.ud2sf" => "__builtin_HEXAGON_F2_conv_ud2sf",
+                    "F2.conv.uw2df" => "__builtin_HEXAGON_F2_conv_uw2df",
+                    "F2.conv.uw2sf" => "__builtin_HEXAGON_F2_conv_uw2sf",
+                    "F2.conv.w2df" => "__builtin_HEXAGON_F2_conv_w2df",
+                    "F2.conv.w2sf" => "__builtin_HEXAGON_F2_conv_w2sf",
+                    "F2.dfadd" => "__builtin_HEXAGON_F2_dfadd",
+                    "F2.dfclass" => "__builtin_HEXAGON_F2_dfclass",
+                    "F2.dfcmpeq" => "__builtin_HEXAGON_F2_dfcmpeq",
+                    "F2.dfcmpge" => "__builtin_HEXAGON_F2_dfcmpge",
+                    "F2.dfcmpgt" => "__builtin_HEXAGON_F2_dfcmpgt",
+                    "F2.dfcmpuo" => "__builtin_HEXAGON_F2_dfcmpuo",
+                    "F2.dffixupd" => "__builtin_HEXAGON_F2_dffixupd",
+                    "F2.dffixupn" => "__builtin_HEXAGON_F2_dffixupn",
+                    "F2.dffixupr" => "__builtin_HEXAGON_F2_dffixupr",
+                    "F2.dffma" => "__builtin_HEXAGON_F2_dffma",
+                    "F2.dffma.lib" => "__builtin_HEXAGON_F2_dffma_lib",
+                    "F2.dffma.sc" => "__builtin_HEXAGON_F2_dffma_sc",
+                    "F2.dffms" => "__builtin_HEXAGON_F2_dffms",
+                    "F2.dffms.lib" => "__builtin_HEXAGON_F2_dffms_lib",
+                    "F2.dfimm.n" => "__builtin_HEXAGON_F2_dfimm_n",
+                    "F2.dfimm.p" => "__builtin_HEXAGON_F2_dfimm_p",
+                    "F2.dfmax" => "__builtin_HEXAGON_F2_dfmax",
+                    "F2.dfmin" => "__builtin_HEXAGON_F2_dfmin",
+                    "F2.dfmpy" => "__builtin_HEXAGON_F2_dfmpy",
+                    "F2.dfmpyfix" => "__builtin_HEXAGON_F2_dfmpyfix",
+                    "F2.dfmpyhh" => "__builtin_HEXAGON_F2_dfmpyhh",
+                    "F2.dfmpylh" => "__builtin_HEXAGON_F2_dfmpylh",
+                    "F2.dfmpyll" => "__builtin_HEXAGON_F2_dfmpyll",
+                    "F2.dfsub" => "__builtin_HEXAGON_F2_dfsub",
+                    "F2.sfadd" => "__builtin_HEXAGON_F2_sfadd",
+                    "F2.sfclass" => "__builtin_HEXAGON_F2_sfclass",
+                    "F2.sfcmpeq" => "__builtin_HEXAGON_F2_sfcmpeq",
+                    "F2.sfcmpge" => "__builtin_HEXAGON_F2_sfcmpge",
+                    "F2.sfcmpgt" => "__builtin_HEXAGON_F2_sfcmpgt",
+                    "F2.sfcmpuo" => "__builtin_HEXAGON_F2_sfcmpuo",
+                    "F2.sffixupd" => "__builtin_HEXAGON_F2_sffixupd",
+                    "F2.sffixupn" => "__builtin_HEXAGON_F2_sffixupn",
+                    "F2.sffixupr" => "__builtin_HEXAGON_F2_sffixupr",
+                    "F2.sffma" => "__builtin_HEXAGON_F2_sffma",
+                    "F2.sffma.lib" => "__builtin_HEXAGON_F2_sffma_lib",
+                    "F2.sffma.sc" => "__builtin_HEXAGON_F2_sffma_sc",
+                    "F2.sffms" => "__builtin_HEXAGON_F2_sffms",
+                    "F2.sffms.lib" => "__builtin_HEXAGON_F2_sffms_lib",
+                    "F2.sfimm.n" => "__builtin_HEXAGON_F2_sfimm_n",
+                    "F2.sfimm.p" => "__builtin_HEXAGON_F2_sfimm_p",
+                    "F2.sfmax" => "__builtin_HEXAGON_F2_sfmax",
+                    "F2.sfmin" => "__builtin_HEXAGON_F2_sfmin",
+                    "F2.sfmpy" => "__builtin_HEXAGON_F2_sfmpy",
+                    "F2.sfsub" => "__builtin_HEXAGON_F2_sfsub",
+                    "L2.loadw.locked" => "__builtin_HEXAGON_L2_loadw_locked",
+                    "L4.loadd.locked" => "__builtin__HEXAGON_L4_loadd_locked",
+                    "M2.acci" => "__builtin_HEXAGON_M2_acci",
+                    "M2.accii" => "__builtin_HEXAGON_M2_accii",
+                    "M2.cmaci.s0" => "__builtin_HEXAGON_M2_cmaci_s0",
+                    "M2.cmacr.s0" => "__builtin_HEXAGON_M2_cmacr_s0",
+                    "M2.cmacs.s0" => "__builtin_HEXAGON_M2_cmacs_s0",
+                    "M2.cmacs.s1" => "__builtin_HEXAGON_M2_cmacs_s1",
+                    "M2.cmacsc.s0" => "__builtin_HEXAGON_M2_cmacsc_s0",
+                    "M2.cmacsc.s1" => "__builtin_HEXAGON_M2_cmacsc_s1",
+                    "M2.cmpyi.s0" => "__builtin_HEXAGON_M2_cmpyi_s0",
+                    "M2.cmpyr.s0" => "__builtin_HEXAGON_M2_cmpyr_s0",
+                    "M2.cmpyrs.s0" => "__builtin_HEXAGON_M2_cmpyrs_s0",
+                    "M2.cmpyrs.s1" => "__builtin_HEXAGON_M2_cmpyrs_s1",
+                    "M2.cmpyrsc.s0" => "__builtin_HEXAGON_M2_cmpyrsc_s0",
+                    "M2.cmpyrsc.s1" => "__builtin_HEXAGON_M2_cmpyrsc_s1",
+                    "M2.cmpys.s0" => "__builtin_HEXAGON_M2_cmpys_s0",
+                    "M2.cmpys.s1" => "__builtin_HEXAGON_M2_cmpys_s1",
+                    "M2.cmpysc.s0" => "__builtin_HEXAGON_M2_cmpysc_s0",
+                    "M2.cmpysc.s1" => "__builtin_HEXAGON_M2_cmpysc_s1",
+                    "M2.cnacs.s0" => "__builtin_HEXAGON_M2_cnacs_s0",
+                    "M2.cnacs.s1" => "__builtin_HEXAGON_M2_cnacs_s1",
+                    "M2.cnacsc.s0" => "__builtin_HEXAGON_M2_cnacsc_s0",
+                    "M2.cnacsc.s1" => "__builtin_HEXAGON_M2_cnacsc_s1",
+                    "M2.dpmpyss.acc.s0" => "__builtin_HEXAGON_M2_dpmpyss_acc_s0",
+                    "M2.dpmpyss.nac.s0" => "__builtin_HEXAGON_M2_dpmpyss_nac_s0",
+                    "M2.dpmpyss.rnd.s0" => "__builtin_HEXAGON_M2_dpmpyss_rnd_s0",
+                    "M2.dpmpyss.s0" => "__builtin_HEXAGON_M2_dpmpyss_s0",
+                    "M2.dpmpyuu.acc.s0" => "__builtin_HEXAGON_M2_dpmpyuu_acc_s0",
+                    "M2.dpmpyuu.nac.s0" => "__builtin_HEXAGON_M2_dpmpyuu_nac_s0",
+                    "M2.dpmpyuu.s0" => "__builtin_HEXAGON_M2_dpmpyuu_s0",
+                    "M2.hmmpyh.rs1" => "__builtin_HEXAGON_M2_hmmpyh_rs1",
+                    "M2.hmmpyh.s1" => "__builtin_HEXAGON_M2_hmmpyh_s1",
+                    "M2.hmmpyl.rs1" => "__builtin_HEXAGON_M2_hmmpyl_rs1",
+                    "M2.hmmpyl.s1" => "__builtin_HEXAGON_M2_hmmpyl_s1",
+                    "M2.maci" => "__builtin_HEXAGON_M2_maci",
+                    "M2.macsin" => "__builtin_HEXAGON_M2_macsin",
+                    "M2.macsip" => "__builtin_HEXAGON_M2_macsip",
+                    "M2.mmachs.rs0" => "__builtin_HEXAGON_M2_mmachs_rs0",
+                    "M2.mmachs.rs1" => "__builtin_HEXAGON_M2_mmachs_rs1",
+                    "M2.mmachs.s0" => "__builtin_HEXAGON_M2_mmachs_s0",
+                    "M2.mmachs.s1" => "__builtin_HEXAGON_M2_mmachs_s1",
+                    "M2.mmacls.rs0" => "__builtin_HEXAGON_M2_mmacls_rs0",
+                    "M2.mmacls.rs1" => "__builtin_HEXAGON_M2_mmacls_rs1",
+                    "M2.mmacls.s0" => "__builtin_HEXAGON_M2_mmacls_s0",
+                    "M2.mmacls.s1" => "__builtin_HEXAGON_M2_mmacls_s1",
+                    "M2.mmacuhs.rs0" => "__builtin_HEXAGON_M2_mmacuhs_rs0",
+                    "M2.mmacuhs.rs1" => "__builtin_HEXAGON_M2_mmacuhs_rs1",
+                    "M2.mmacuhs.s0" => "__builtin_HEXAGON_M2_mmacuhs_s0",
+                    "M2.mmacuhs.s1" => "__builtin_HEXAGON_M2_mmacuhs_s1",
+                    "M2.mmaculs.rs0" => "__builtin_HEXAGON_M2_mmaculs_rs0",
+                    "M2.mmaculs.rs1" => "__builtin_HEXAGON_M2_mmaculs_rs1",
+                    "M2.mmaculs.s0" => "__builtin_HEXAGON_M2_mmaculs_s0",
+                    "M2.mmaculs.s1" => "__builtin_HEXAGON_M2_mmaculs_s1",
+                    "M2.mmpyh.rs0" => "__builtin_HEXAGON_M2_mmpyh_rs0",
+                    "M2.mmpyh.rs1" => "__builtin_HEXAGON_M2_mmpyh_rs1",
+                    "M2.mmpyh.s0" => "__builtin_HEXAGON_M2_mmpyh_s0",
+                    "M2.mmpyh.s1" => "__builtin_HEXAGON_M2_mmpyh_s1",
+                    "M2.mmpyl.rs0" => "__builtin_HEXAGON_M2_mmpyl_rs0",
+                    "M2.mmpyl.rs1" => "__builtin_HEXAGON_M2_mmpyl_rs1",
+                    "M2.mmpyl.s0" => "__builtin_HEXAGON_M2_mmpyl_s0",
+                    "M2.mmpyl.s1" => "__builtin_HEXAGON_M2_mmpyl_s1",
+                    "M2.mmpyuh.rs0" => "__builtin_HEXAGON_M2_mmpyuh_rs0",
+                    "M2.mmpyuh.rs1" => "__builtin_HEXAGON_M2_mmpyuh_rs1",
+                    "M2.mmpyuh.s0" => "__builtin_HEXAGON_M2_mmpyuh_s0",
+                    "M2.mmpyuh.s1" => "__builtin_HEXAGON_M2_mmpyuh_s1",
+                    "M2.mmpyul.rs0" => "__builtin_HEXAGON_M2_mmpyul_rs0",
+                    "M2.mmpyul.rs1" => "__builtin_HEXAGON_M2_mmpyul_rs1",
+                    "M2.mmpyul.s0" => "__builtin_HEXAGON_M2_mmpyul_s0",
+                    "M2.mmpyul.s1" => "__builtin_HEXAGON_M2_mmpyul_s1",
+                    "M2.mnaci" => "__builtin_HEXAGON_M2_mnaci",
+                    "M2.mpy.acc.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_hh_s0",
+                    "M2.mpy.acc.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_hh_s1",
+                    "M2.mpy.acc.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_hl_s0",
+                    "M2.mpy.acc.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_hl_s1",
+                    "M2.mpy.acc.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_lh_s0",
+                    "M2.mpy.acc.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_lh_s1",
+                    "M2.mpy.acc.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_ll_s0",
+                    "M2.mpy.acc.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_ll_s1",
+                    "M2.mpy.acc.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s0",
+                    "M2.mpy.acc.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s1",
+                    "M2.mpy.acc.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s0",
+                    "M2.mpy.acc.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s1",
+                    "M2.mpy.acc.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s0",
+                    "M2.mpy.acc.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s1",
+                    "M2.mpy.acc.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s0",
+                    "M2.mpy.acc.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s1",
+                    "M2.mpy.hh.s0" => "__builtin_HEXAGON_M2_mpy_hh_s0",
+                    "M2.mpy.hh.s1" => "__builtin_HEXAGON_M2_mpy_hh_s1",
+                    "M2.mpy.hl.s0" => "__builtin_HEXAGON_M2_mpy_hl_s0",
+                    "M2.mpy.hl.s1" => "__builtin_HEXAGON_M2_mpy_hl_s1",
+                    "M2.mpy.lh.s0" => "__builtin_HEXAGON_M2_mpy_lh_s0",
+                    "M2.mpy.lh.s1" => "__builtin_HEXAGON_M2_mpy_lh_s1",
+                    "M2.mpy.ll.s0" => "__builtin_HEXAGON_M2_mpy_ll_s0",
+                    "M2.mpy.ll.s1" => "__builtin_HEXAGON_M2_mpy_ll_s1",
+                    "M2.mpy.nac.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_hh_s0",
+                    "M2.mpy.nac.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_hh_s1",
+                    "M2.mpy.nac.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_hl_s0",
+                    "M2.mpy.nac.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_hl_s1",
+                    "M2.mpy.nac.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_lh_s0",
+                    "M2.mpy.nac.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_lh_s1",
+                    "M2.mpy.nac.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_ll_s0",
+                    "M2.mpy.nac.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_ll_s1",
+                    "M2.mpy.nac.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s0",
+                    "M2.mpy.nac.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s1",
+                    "M2.mpy.nac.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s0",
+                    "M2.mpy.nac.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s1",
+                    "M2.mpy.nac.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s0",
+                    "M2.mpy.nac.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s1",
+                    "M2.mpy.nac.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s0",
+                    "M2.mpy.nac.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s1",
+                    "M2.mpy.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s0",
+                    "M2.mpy.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s1",
+                    "M2.mpy.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s0",
+                    "M2.mpy.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s1",
+                    "M2.mpy.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s0",
+                    "M2.mpy.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s1",
+                    "M2.mpy.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s0",
+                    "M2.mpy.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s1",
+                    "M2.mpy.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_hh_s0",
+                    "M2.mpy.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_hh_s1",
+                    "M2.mpy.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_hl_s0",
+                    "M2.mpy.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_hl_s1",
+                    "M2.mpy.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_lh_s0",
+                    "M2.mpy.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_lh_s1",
+                    "M2.mpy.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_ll_s0",
+                    "M2.mpy.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_ll_s1",
+                    "M2.mpy.sat.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0",
+                    "M2.mpy.sat.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1",
+                    "M2.mpy.sat.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0",
+                    "M2.mpy.sat.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1",
+                    "M2.mpy.sat.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0",
+                    "M2.mpy.sat.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1",
+                    "M2.mpy.sat.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0",
+                    "M2.mpy.sat.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1",
+                    "M2.mpy.up" => "__builtin_HEXAGON_M2_mpy_up",
+                    "M2.mpy.up.s1" => "__builtin_HEXAGON_M2_mpy_up_s1",
+                    "M2.mpy.up.s1.sat" => "__builtin_HEXAGON_M2_mpy_up_s1_sat",
+                    "M2.mpyd.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s0",
+                    "M2.mpyd.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s1",
+                    "M2.mpyd.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s0",
+                    "M2.mpyd.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s1",
+                    "M2.mpyd.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s0",
+                    "M2.mpyd.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s1",
+                    "M2.mpyd.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s0",
+                    "M2.mpyd.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s1",
+                    "M2.mpyd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_hh_s0",
+                    "M2.mpyd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_hh_s1",
+                    "M2.mpyd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_hl_s0",
+                    "M2.mpyd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_hl_s1",
+                    "M2.mpyd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_lh_s0",
+                    "M2.mpyd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_lh_s1",
+                    "M2.mpyd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_ll_s0",
+                    "M2.mpyd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_ll_s1",
+                    "M2.mpyd.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s0",
+                    "M2.mpyd.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s1",
+                    "M2.mpyd.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s0",
+                    "M2.mpyd.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s1",
+                    "M2.mpyd.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s0",
+                    "M2.mpyd.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s1",
+                    "M2.mpyd.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s0",
+                    "M2.mpyd.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s1",
+                    "M2.mpyd.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s0",
+                    "M2.mpyd.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s1",
+                    "M2.mpyd.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s0",
+                    "M2.mpyd.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s1",
+                    "M2.mpyd.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s0",
+                    "M2.mpyd.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s1",
+                    "M2.mpyd.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s0",
+                    "M2.mpyd.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s1",
+                    "M2.mpyi" => "__builtin_HEXAGON_M2_mpyi",
+                    "M2.mpysmi" => "__builtin_HEXAGON_M2_mpysmi",
+                    "M2.mpysu.up" => "__builtin_HEXAGON_M2_mpysu_up",
+                    "M2.mpyu.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s0",
+                    "M2.mpyu.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s1",
+                    "M2.mpyu.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s0",
+                    "M2.mpyu.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s1",
+                    "M2.mpyu.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s0",
+                    "M2.mpyu.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s1",
+                    "M2.mpyu.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s0",
+                    "M2.mpyu.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s1",
+                    "M2.mpyu.hh.s0" => "__builtin_HEXAGON_M2_mpyu_hh_s0",
+                    "M2.mpyu.hh.s1" => "__builtin_HEXAGON_M2_mpyu_hh_s1",
+                    "M2.mpyu.hl.s0" => "__builtin_HEXAGON_M2_mpyu_hl_s0",
+                    "M2.mpyu.hl.s1" => "__builtin_HEXAGON_M2_mpyu_hl_s1",
+                    "M2.mpyu.lh.s0" => "__builtin_HEXAGON_M2_mpyu_lh_s0",
+                    "M2.mpyu.lh.s1" => "__builtin_HEXAGON_M2_mpyu_lh_s1",
+                    "M2.mpyu.ll.s0" => "__builtin_HEXAGON_M2_mpyu_ll_s0",
+                    "M2.mpyu.ll.s1" => "__builtin_HEXAGON_M2_mpyu_ll_s1",
+                    "M2.mpyu.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s0",
+                    "M2.mpyu.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s1",
+                    "M2.mpyu.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s0",
+                    "M2.mpyu.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s1",
+                    "M2.mpyu.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s0",
+                    "M2.mpyu.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s1",
+                    "M2.mpyu.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s0",
+                    "M2.mpyu.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s1",
+                    "M2.mpyu.up" => "__builtin_HEXAGON_M2_mpyu_up",
+                    "M2.mpyud.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s0",
+                    "M2.mpyud.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s1",
+                    "M2.mpyud.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s0",
+                    "M2.mpyud.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s1",
+                    "M2.mpyud.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s0",
+                    "M2.mpyud.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s1",
+                    "M2.mpyud.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s0",
+                    "M2.mpyud.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s1",
+                    "M2.mpyud.hh.s0" => "__builtin_HEXAGON_M2_mpyud_hh_s0",
+                    "M2.mpyud.hh.s1" => "__builtin_HEXAGON_M2_mpyud_hh_s1",
+                    "M2.mpyud.hl.s0" => "__builtin_HEXAGON_M2_mpyud_hl_s0",
+                    "M2.mpyud.hl.s1" => "__builtin_HEXAGON_M2_mpyud_hl_s1",
+                    "M2.mpyud.lh.s0" => "__builtin_HEXAGON_M2_mpyud_lh_s0",
+                    "M2.mpyud.lh.s1" => "__builtin_HEXAGON_M2_mpyud_lh_s1",
+                    "M2.mpyud.ll.s0" => "__builtin_HEXAGON_M2_mpyud_ll_s0",
+                    "M2.mpyud.ll.s1" => "__builtin_HEXAGON_M2_mpyud_ll_s1",
+                    "M2.mpyud.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s0",
+                    "M2.mpyud.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s1",
+                    "M2.mpyud.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s0",
+                    "M2.mpyud.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s1",
+                    "M2.mpyud.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s0",
+                    "M2.mpyud.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s1",
+                    "M2.mpyud.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s0",
+                    "M2.mpyud.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s1",
+                    "M2.mpyui" => "__builtin_HEXAGON_M2_mpyui",
+                    "M2.nacci" => "__builtin_HEXAGON_M2_nacci",
+                    "M2.naccii" => "__builtin_HEXAGON_M2_naccii",
+                    "M2.subacc" => "__builtin_HEXAGON_M2_subacc",
+                    "M2.vabsdiffh" => "__builtin_HEXAGON_M2_vabsdiffh",
+                    "M2.vabsdiffw" => "__builtin_HEXAGON_M2_vabsdiffw",
+                    "M2.vcmac.s0.sat.i" => "__builtin_HEXAGON_M2_vcmac_s0_sat_i",
+                    "M2.vcmac.s0.sat.r" => "__builtin_HEXAGON_M2_vcmac_s0_sat_r",
+                    "M2.vcmpy.s0.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_i",
+                    "M2.vcmpy.s0.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_r",
+                    "M2.vcmpy.s1.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_i",
+                    "M2.vcmpy.s1.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_r",
+                    "M2.vdmacs.s0" => "__builtin_HEXAGON_M2_vdmacs_s0",
+                    "M2.vdmacs.s1" => "__builtin_HEXAGON_M2_vdmacs_s1",
+                    "M2.vdmpyrs.s0" => "__builtin_HEXAGON_M2_vdmpyrs_s0",
+                    "M2.vdmpyrs.s1" => "__builtin_HEXAGON_M2_vdmpyrs_s1",
+                    "M2.vdmpys.s0" => "__builtin_HEXAGON_M2_vdmpys_s0",
+                    "M2.vdmpys.s1" => "__builtin_HEXAGON_M2_vdmpys_s1",
+                    "M2.vmac2" => "__builtin_HEXAGON_M2_vmac2",
+                    "M2.vmac2es" => "__builtin_HEXAGON_M2_vmac2es",
+                    "M2.vmac2es.s0" => "__builtin_HEXAGON_M2_vmac2es_s0",
+                    "M2.vmac2es.s1" => "__builtin_HEXAGON_M2_vmac2es_s1",
+                    "M2.vmac2s.s0" => "__builtin_HEXAGON_M2_vmac2s_s0",
+                    "M2.vmac2s.s1" => "__builtin_HEXAGON_M2_vmac2s_s1",
+                    "M2.vmac2su.s0" => "__builtin_HEXAGON_M2_vmac2su_s0",
+                    "M2.vmac2su.s1" => "__builtin_HEXAGON_M2_vmac2su_s1",
+                    "M2.vmpy2es.s0" => "__builtin_HEXAGON_M2_vmpy2es_s0",
+                    "M2.vmpy2es.s1" => "__builtin_HEXAGON_M2_vmpy2es_s1",
+                    "M2.vmpy2s.s0" => "__builtin_HEXAGON_M2_vmpy2s_s0",
+                    "M2.vmpy2s.s0pack" => "__builtin_HEXAGON_M2_vmpy2s_s0pack",
+                    "M2.vmpy2s.s1" => "__builtin_HEXAGON_M2_vmpy2s_s1",
+                    "M2.vmpy2s.s1pack" => "__builtin_HEXAGON_M2_vmpy2s_s1pack",
+                    "M2.vmpy2su.s0" => "__builtin_HEXAGON_M2_vmpy2su_s0",
+                    "M2.vmpy2su.s1" => "__builtin_HEXAGON_M2_vmpy2su_s1",
+                    "M2.vraddh" => "__builtin_HEXAGON_M2_vraddh",
+                    "M2.vradduh" => "__builtin_HEXAGON_M2_vradduh",
+                    "M2.vrcmaci.s0" => "__builtin_HEXAGON_M2_vrcmaci_s0",
+                    "M2.vrcmaci.s0c" => "__builtin_HEXAGON_M2_vrcmaci_s0c",
+                    "M2.vrcmacr.s0" => "__builtin_HEXAGON_M2_vrcmacr_s0",
+                    "M2.vrcmacr.s0c" => "__builtin_HEXAGON_M2_vrcmacr_s0c",
+                    "M2.vrcmpyi.s0" => "__builtin_HEXAGON_M2_vrcmpyi_s0",
+                    "M2.vrcmpyi.s0c" => "__builtin_HEXAGON_M2_vrcmpyi_s0c",
+                    "M2.vrcmpyr.s0" => "__builtin_HEXAGON_M2_vrcmpyr_s0",
+                    "M2.vrcmpyr.s0c" => "__builtin_HEXAGON_M2_vrcmpyr_s0c",
+                    "M2.vrcmpys.acc.s1" => "__builtin_HEXAGON_M2_vrcmpys_acc_s1",
+                    "M2.vrcmpys.s1" => "__builtin_HEXAGON_M2_vrcmpys_s1",
+                    "M2.vrcmpys.s1rp" => "__builtin_HEXAGON_M2_vrcmpys_s1rp",
+                    "M2.vrmac.s0" => "__builtin_HEXAGON_M2_vrmac_s0",
+                    "M2.vrmpy.s0" => "__builtin_HEXAGON_M2_vrmpy_s0",
+                    "M2.xor.xacc" => "__builtin_HEXAGON_M2_xor_xacc",
+                    "M4.and.and" => "__builtin_HEXAGON_M4_and_and",
+                    "M4.and.andn" => "__builtin_HEXAGON_M4_and_andn",
+                    "M4.and.or" => "__builtin_HEXAGON_M4_and_or",
+                    "M4.and.xor" => "__builtin_HEXAGON_M4_and_xor",
+                    "M4.cmpyi.wh" => "__builtin_HEXAGON_M4_cmpyi_wh",
+                    "M4.cmpyi.whc" => "__builtin_HEXAGON_M4_cmpyi_whc",
+                    "M4.cmpyr.wh" => "__builtin_HEXAGON_M4_cmpyr_wh",
+                    "M4.cmpyr.whc" => "__builtin_HEXAGON_M4_cmpyr_whc",
+                    "M4.mac.up.s1.sat" => "__builtin_HEXAGON_M4_mac_up_s1_sat",
+                    "M4.mpyri.addi" => "__builtin_HEXAGON_M4_mpyri_addi",
+                    "M4.mpyri.addr" => "__builtin_HEXAGON_M4_mpyri_addr",
+                    "M4.mpyri.addr.u2" => "__builtin_HEXAGON_M4_mpyri_addr_u2",
+                    "M4.mpyrr.addi" => "__builtin_HEXAGON_M4_mpyrr_addi",
+                    "M4.mpyrr.addr" => "__builtin_HEXAGON_M4_mpyrr_addr",
+                    "M4.nac.up.s1.sat" => "__builtin_HEXAGON_M4_nac_up_s1_sat",
+                    "M4.or.and" => "__builtin_HEXAGON_M4_or_and",
+                    "M4.or.andn" => "__builtin_HEXAGON_M4_or_andn",
+                    "M4.or.or" => "__builtin_HEXAGON_M4_or_or",
+                    "M4.or.xor" => "__builtin_HEXAGON_M4_or_xor",
+                    "M4.pmpyw" => "__builtin_HEXAGON_M4_pmpyw",
+                    "M4.pmpyw.acc" => "__builtin_HEXAGON_M4_pmpyw_acc",
+                    "M4.vpmpyh" => "__builtin_HEXAGON_M4_vpmpyh",
+                    "M4.vpmpyh.acc" => "__builtin_HEXAGON_M4_vpmpyh_acc",
+                    "M4.vrmpyeh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s0",
+                    "M4.vrmpyeh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s1",
+                    "M4.vrmpyeh.s0" => "__builtin_HEXAGON_M4_vrmpyeh_s0",
+                    "M4.vrmpyeh.s1" => "__builtin_HEXAGON_M4_vrmpyeh_s1",
+                    "M4.vrmpyoh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s0",
+                    "M4.vrmpyoh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s1",
+                    "M4.vrmpyoh.s0" => "__builtin_HEXAGON_M4_vrmpyoh_s0",
+                    "M4.vrmpyoh.s1" => "__builtin_HEXAGON_M4_vrmpyoh_s1",
+                    "M4.xor.and" => "__builtin_HEXAGON_M4_xor_and",
+                    "M4.xor.andn" => "__builtin_HEXAGON_M4_xor_andn",
+                    "M4.xor.or" => "__builtin_HEXAGON_M4_xor_or",
+                    "M4.xor.xacc" => "__builtin_HEXAGON_M4_xor_xacc",
+                    "M5.vdmacbsu" => "__builtin_HEXAGON_M5_vdmacbsu",
+                    "M5.vdmpybsu" => "__builtin_HEXAGON_M5_vdmpybsu",
+                    "M5.vmacbsu" => "__builtin_HEXAGON_M5_vmacbsu",
+                    "M5.vmacbuu" => "__builtin_HEXAGON_M5_vmacbuu",
+                    "M5.vmpybsu" => "__builtin_HEXAGON_M5_vmpybsu",
+                    "M5.vmpybuu" => "__builtin_HEXAGON_M5_vmpybuu",
+                    "M5.vrmacbsu" => "__builtin_HEXAGON_M5_vrmacbsu",
+                    "M5.vrmacbuu" => "__builtin_HEXAGON_M5_vrmacbuu",
+                    "M5.vrmpybsu" => "__builtin_HEXAGON_M5_vrmpybsu",
+                    "M5.vrmpybuu" => "__builtin_HEXAGON_M5_vrmpybuu",
+                    "M6.vabsdiffb" => "__builtin_HEXAGON_M6_vabsdiffb",
+                    "M6.vabsdiffub" => "__builtin_HEXAGON_M6_vabsdiffub",
+                    "M7.dcmpyiw" => "__builtin_HEXAGON_M7_dcmpyiw",
+                    "M7.dcmpyiw.acc" => "__builtin_HEXAGON_M7_dcmpyiw_acc",
+                    "M7.dcmpyiwc" => "__builtin_HEXAGON_M7_dcmpyiwc",
+                    "M7.dcmpyiwc.acc" => "__builtin_HEXAGON_M7_dcmpyiwc_acc",
+                    "M7.dcmpyrw" => "__builtin_HEXAGON_M7_dcmpyrw",
+                    "M7.dcmpyrw.acc" => "__builtin_HEXAGON_M7_dcmpyrw_acc",
+                    "M7.dcmpyrwc" => "__builtin_HEXAGON_M7_dcmpyrwc",
+                    "M7.dcmpyrwc.acc" => "__builtin_HEXAGON_M7_dcmpyrwc_acc",
+                    "M7.vdmpy" => "__builtin_HEXAGON_M7_vdmpy",
+                    "M7.vdmpy.acc" => "__builtin_HEXAGON_M7_vdmpy_acc",
+                    "M7.wcmpyiw" => "__builtin_HEXAGON_M7_wcmpyiw",
+                    "M7.wcmpyiw.rnd" => "__builtin_HEXAGON_M7_wcmpyiw_rnd",
+                    "M7.wcmpyiwc" => "__builtin_HEXAGON_M7_wcmpyiwc",
+                    "M7.wcmpyiwc.rnd" => "__builtin_HEXAGON_M7_wcmpyiwc_rnd",
+                    "M7.wcmpyrw" => "__builtin_HEXAGON_M7_wcmpyrw",
+                    "M7.wcmpyrw.rnd" => "__builtin_HEXAGON_M7_wcmpyrw_rnd",
+                    "M7.wcmpyrwc" => "__builtin_HEXAGON_M7_wcmpyrwc",
+                    "M7.wcmpyrwc.rnd" => "__builtin_HEXAGON_M7_wcmpyrwc_rnd",
+                    "S2.addasl.rrri" => "__builtin_HEXAGON_S2_addasl_rrri",
+                    "S2.asl.i.p" => "__builtin_HEXAGON_S2_asl_i_p",
+                    "S2.asl.i.p.acc" => "__builtin_HEXAGON_S2_asl_i_p_acc",
+                    "S2.asl.i.p.and" => "__builtin_HEXAGON_S2_asl_i_p_and",
+                    "S2.asl.i.p.nac" => "__builtin_HEXAGON_S2_asl_i_p_nac",
+                    "S2.asl.i.p.or" => "__builtin_HEXAGON_S2_asl_i_p_or",
+                    "S2.asl.i.p.xacc" => "__builtin_HEXAGON_S2_asl_i_p_xacc",
+                    "S2.asl.i.r" => "__builtin_HEXAGON_S2_asl_i_r",
+                    "S2.asl.i.r.acc" => "__builtin_HEXAGON_S2_asl_i_r_acc",
+                    "S2.asl.i.r.and" => "__builtin_HEXAGON_S2_asl_i_r_and",
+                    "S2.asl.i.r.nac" => "__builtin_HEXAGON_S2_asl_i_r_nac",
+                    "S2.asl.i.r.or" => "__builtin_HEXAGON_S2_asl_i_r_or",
+                    "S2.asl.i.r.sat" => "__builtin_HEXAGON_S2_asl_i_r_sat",
+                    "S2.asl.i.r.xacc" => "__builtin_HEXAGON_S2_asl_i_r_xacc",
+                    "S2.asl.i.vh" => "__builtin_HEXAGON_S2_asl_i_vh",
+                    "S2.asl.i.vw" => "__builtin_HEXAGON_S2_asl_i_vw",
+                    "S2.asl.r.p" => "__builtin_HEXAGON_S2_asl_r_p",
+                    "S2.asl.r.p.acc" => "__builtin_HEXAGON_S2_asl_r_p_acc",
+                    "S2.asl.r.p.and" => "__builtin_HEXAGON_S2_asl_r_p_and",
+                    "S2.asl.r.p.nac" => "__builtin_HEXAGON_S2_asl_r_p_nac",
+                    "S2.asl.r.p.or" => "__builtin_HEXAGON_S2_asl_r_p_or",
+                    "S2.asl.r.p.xor" => "__builtin_HEXAGON_S2_asl_r_p_xor",
+                    "S2.asl.r.r" => "__builtin_HEXAGON_S2_asl_r_r",
+                    "S2.asl.r.r.acc" => "__builtin_HEXAGON_S2_asl_r_r_acc",
+                    "S2.asl.r.r.and" => "__builtin_HEXAGON_S2_asl_r_r_and",
+                    "S2.asl.r.r.nac" => "__builtin_HEXAGON_S2_asl_r_r_nac",
+                    "S2.asl.r.r.or" => "__builtin_HEXAGON_S2_asl_r_r_or",
+                    "S2.asl.r.r.sat" => "__builtin_HEXAGON_S2_asl_r_r_sat",
+                    "S2.asl.r.vh" => "__builtin_HEXAGON_S2_asl_r_vh",
+                    "S2.asl.r.vw" => "__builtin_HEXAGON_S2_asl_r_vw",
+                    "S2.asr.i.p" => "__builtin_HEXAGON_S2_asr_i_p",
+                    "S2.asr.i.p.acc" => "__builtin_HEXAGON_S2_asr_i_p_acc",
+                    "S2.asr.i.p.and" => "__builtin_HEXAGON_S2_asr_i_p_and",
+                    "S2.asr.i.p.nac" => "__builtin_HEXAGON_S2_asr_i_p_nac",
+                    "S2.asr.i.p.or" => "__builtin_HEXAGON_S2_asr_i_p_or",
+                    "S2.asr.i.p.rnd" => "__builtin_HEXAGON_S2_asr_i_p_rnd",
+                    "S2.asr.i.p.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax",
+                    "S2.asr.i.r" => "__builtin_HEXAGON_S2_asr_i_r",
+                    "S2.asr.i.r.acc" => "__builtin_HEXAGON_S2_asr_i_r_acc",
+                    "S2.asr.i.r.and" => "__builtin_HEXAGON_S2_asr_i_r_and",
+                    "S2.asr.i.r.nac" => "__builtin_HEXAGON_S2_asr_i_r_nac",
+                    "S2.asr.i.r.or" => "__builtin_HEXAGON_S2_asr_i_r_or",
+                    "S2.asr.i.r.rnd" => "__builtin_HEXAGON_S2_asr_i_r_rnd",
+                    "S2.asr.i.r.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax",
+                    "S2.asr.i.svw.trun" => "__builtin_HEXAGON_S2_asr_i_svw_trun",
+                    "S2.asr.i.vh" => "__builtin_HEXAGON_S2_asr_i_vh",
+                    "S2.asr.i.vw" => "__builtin_HEXAGON_S2_asr_i_vw",
+                    "S2.asr.r.p" => "__builtin_HEXAGON_S2_asr_r_p",
+                    "S2.asr.r.p.acc" => "__builtin_HEXAGON_S2_asr_r_p_acc",
+                    "S2.asr.r.p.and" => "__builtin_HEXAGON_S2_asr_r_p_and",
+                    "S2.asr.r.p.nac" => "__builtin_HEXAGON_S2_asr_r_p_nac",
+                    "S2.asr.r.p.or" => "__builtin_HEXAGON_S2_asr_r_p_or",
+                    "S2.asr.r.p.xor" => "__builtin_HEXAGON_S2_asr_r_p_xor",
+                    "S2.asr.r.r" => "__builtin_HEXAGON_S2_asr_r_r",
+                    "S2.asr.r.r.acc" => "__builtin_HEXAGON_S2_asr_r_r_acc",
+                    "S2.asr.r.r.and" => "__builtin_HEXAGON_S2_asr_r_r_and",
+                    "S2.asr.r.r.nac" => "__builtin_HEXAGON_S2_asr_r_r_nac",
+                    "S2.asr.r.r.or" => "__builtin_HEXAGON_S2_asr_r_r_or",
+                    "S2.asr.r.r.sat" => "__builtin_HEXAGON_S2_asr_r_r_sat",
+                    "S2.asr.r.svw.trun" => "__builtin_HEXAGON_S2_asr_r_svw_trun",
+                    "S2.asr.r.vh" => "__builtin_HEXAGON_S2_asr_r_vh",
+                    "S2.asr.r.vw" => "__builtin_HEXAGON_S2_asr_r_vw",
+                    "S2.brev" => "__builtin_HEXAGON_S2_brev",
+                    "S2.brevp" => "__builtin_HEXAGON_S2_brevp",
+                    "S2.cabacencbin" => "__builtin_HEXAGON_S2_cabacencbin",
+                    "S2.cl0" => "__builtin_HEXAGON_S2_cl0",
+                    "S2.cl0p" => "__builtin_HEXAGON_S2_cl0p",
+                    "S2.cl1" => "__builtin_HEXAGON_S2_cl1",
+                    "S2.cl1p" => "__builtin_HEXAGON_S2_cl1p",
+                    "S2.clb" => "__builtin_HEXAGON_S2_clb",
+                    "S2.clbnorm" => "__builtin_HEXAGON_S2_clbnorm",
+                    "S2.clbp" => "__builtin_HEXAGON_S2_clbp",
+                    "S2.clrbit.i" => "__builtin_HEXAGON_S2_clrbit_i",
+                    "S2.clrbit.r" => "__builtin_HEXAGON_S2_clrbit_r",
+                    "S2.ct0" => "__builtin_HEXAGON_S2_ct0",
+                    "S2.ct0p" => "__builtin_HEXAGON_S2_ct0p",
+                    "S2.ct1" => "__builtin_HEXAGON_S2_ct1",
+                    "S2.ct1p" => "__builtin_HEXAGON_S2_ct1p",
+                    "S2.deinterleave" => "__builtin_HEXAGON_S2_deinterleave",
+                    "S2.extractu" => "__builtin_HEXAGON_S2_extractu",
+                    "S2.extractu.rp" => "__builtin_HEXAGON_S2_extractu_rp",
+                    "S2.extractup" => "__builtin_HEXAGON_S2_extractup",
+                    "S2.extractup.rp" => "__builtin_HEXAGON_S2_extractup_rp",
+                    "S2.insert" => "__builtin_HEXAGON_S2_insert",
+                    "S2.insert.rp" => "__builtin_HEXAGON_S2_insert_rp",
+                    "S2.insertp" => "__builtin_HEXAGON_S2_insertp",
+                    "S2.insertp.rp" => "__builtin_HEXAGON_S2_insertp_rp",
+                    "S2.interleave" => "__builtin_HEXAGON_S2_interleave",
+                    "S2.lfsp" => "__builtin_HEXAGON_S2_lfsp",
+                    "S2.lsl.r.p" => "__builtin_HEXAGON_S2_lsl_r_p",
+                    "S2.lsl.r.p.acc" => "__builtin_HEXAGON_S2_lsl_r_p_acc",
+                    "S2.lsl.r.p.and" => "__builtin_HEXAGON_S2_lsl_r_p_and",
+                    "S2.lsl.r.p.nac" => "__builtin_HEXAGON_S2_lsl_r_p_nac",
+                    "S2.lsl.r.p.or" => "__builtin_HEXAGON_S2_lsl_r_p_or",
+                    "S2.lsl.r.p.xor" => "__builtin_HEXAGON_S2_lsl_r_p_xor",
+                    "S2.lsl.r.r" => "__builtin_HEXAGON_S2_lsl_r_r",
+                    "S2.lsl.r.r.acc" => "__builtin_HEXAGON_S2_lsl_r_r_acc",
+                    "S2.lsl.r.r.and" => "__builtin_HEXAGON_S2_lsl_r_r_and",
+                    "S2.lsl.r.r.nac" => "__builtin_HEXAGON_S2_lsl_r_r_nac",
+                    "S2.lsl.r.r.or" => "__builtin_HEXAGON_S2_lsl_r_r_or",
+                    "S2.lsl.r.vh" => "__builtin_HEXAGON_S2_lsl_r_vh",
+                    "S2.lsl.r.vw" => "__builtin_HEXAGON_S2_lsl_r_vw",
+                    "S2.lsr.i.p" => "__builtin_HEXAGON_S2_lsr_i_p",
+                    "S2.lsr.i.p.acc" => "__builtin_HEXAGON_S2_lsr_i_p_acc",
+                    "S2.lsr.i.p.and" => "__builtin_HEXAGON_S2_lsr_i_p_and",
+                    "S2.lsr.i.p.nac" => "__builtin_HEXAGON_S2_lsr_i_p_nac",
+                    "S2.lsr.i.p.or" => "__builtin_HEXAGON_S2_lsr_i_p_or",
+                    "S2.lsr.i.p.xacc" => "__builtin_HEXAGON_S2_lsr_i_p_xacc",
+                    "S2.lsr.i.r" => "__builtin_HEXAGON_S2_lsr_i_r",
+                    "S2.lsr.i.r.acc" => "__builtin_HEXAGON_S2_lsr_i_r_acc",
+                    "S2.lsr.i.r.and" => "__builtin_HEXAGON_S2_lsr_i_r_and",
+                    "S2.lsr.i.r.nac" => "__builtin_HEXAGON_S2_lsr_i_r_nac",
+                    "S2.lsr.i.r.or" => "__builtin_HEXAGON_S2_lsr_i_r_or",
+                    "S2.lsr.i.r.xacc" => "__builtin_HEXAGON_S2_lsr_i_r_xacc",
+                    "S2.lsr.i.vh" => "__builtin_HEXAGON_S2_lsr_i_vh",
+                    "S2.lsr.i.vw" => "__builtin_HEXAGON_S2_lsr_i_vw",
+                    "S2.lsr.r.p" => "__builtin_HEXAGON_S2_lsr_r_p",
+                    "S2.lsr.r.p.acc" => "__builtin_HEXAGON_S2_lsr_r_p_acc",
+                    "S2.lsr.r.p.and" => "__builtin_HEXAGON_S2_lsr_r_p_and",
+                    "S2.lsr.r.p.nac" => "__builtin_HEXAGON_S2_lsr_r_p_nac",
+                    "S2.lsr.r.p.or" => "__builtin_HEXAGON_S2_lsr_r_p_or",
+                    "S2.lsr.r.p.xor" => "__builtin_HEXAGON_S2_lsr_r_p_xor",
+                    "S2.lsr.r.r" => "__builtin_HEXAGON_S2_lsr_r_r",
+                    "S2.lsr.r.r.acc" => "__builtin_HEXAGON_S2_lsr_r_r_acc",
+                    "S2.lsr.r.r.and" => "__builtin_HEXAGON_S2_lsr_r_r_and",
+                    "S2.lsr.r.r.nac" => "__builtin_HEXAGON_S2_lsr_r_r_nac",
+                    "S2.lsr.r.r.or" => "__builtin_HEXAGON_S2_lsr_r_r_or",
+                    "S2.lsr.r.vh" => "__builtin_HEXAGON_S2_lsr_r_vh",
+                    "S2.lsr.r.vw" => "__builtin_HEXAGON_S2_lsr_r_vw",
+                    "S2.mask" => "__builtin_HEXAGON_S2_mask",
+                    "S2.packhl" => "__builtin_HEXAGON_S2_packhl",
+                    "S2.parityp" => "__builtin_HEXAGON_S2_parityp",
+                    "S2.setbit.i" => "__builtin_HEXAGON_S2_setbit_i",
+                    "S2.setbit.r" => "__builtin_HEXAGON_S2_setbit_r",
+                    "S2.shuffeb" => "__builtin_HEXAGON_S2_shuffeb",
+                    "S2.shuffeh" => "__builtin_HEXAGON_S2_shuffeh",
+                    "S2.shuffob" => "__builtin_HEXAGON_S2_shuffob",
+                    "S2.shuffoh" => "__builtin_HEXAGON_S2_shuffoh",
+                    "S2.storerb.pbr" => "__builtin_brev_stb",
+                    "S2.storerd.pbr" => "__builtin_brev_std",
+                    "S2.storerf.pbr" => "__builtin_brev_sthhi",
+                    "S2.storerh.pbr" => "__builtin_brev_sth",
+                    "S2.storeri.pbr" => "__builtin_brev_stw",
+                    "S2.storew.locked" => "__builtin_HEXAGON_S2_storew_locked",
+                    "S2.svsathb" => "__builtin_HEXAGON_S2_svsathb",
+                    "S2.svsathub" => "__builtin_HEXAGON_S2_svsathub",
+                    "S2.tableidxb.goodsyntax" => "__builtin_HEXAGON_S2_tableidxb_goodsyntax",
+                    "S2.tableidxd.goodsyntax" => "__builtin_HEXAGON_S2_tableidxd_goodsyntax",
+                    "S2.tableidxh.goodsyntax" => "__builtin_HEXAGON_S2_tableidxh_goodsyntax",
+                    "S2.tableidxw.goodsyntax" => "__builtin_HEXAGON_S2_tableidxw_goodsyntax",
+                    "S2.togglebit.i" => "__builtin_HEXAGON_S2_togglebit_i",
+                    "S2.togglebit.r" => "__builtin_HEXAGON_S2_togglebit_r",
+                    "S2.tstbit.i" => "__builtin_HEXAGON_S2_tstbit_i",
+                    "S2.tstbit.r" => "__builtin_HEXAGON_S2_tstbit_r",
+                    "S2.valignib" => "__builtin_HEXAGON_S2_valignib",
+                    "S2.valignrb" => "__builtin_HEXAGON_S2_valignrb",
+                    "S2.vcnegh" => "__builtin_HEXAGON_S2_vcnegh",
+                    "S2.vcrotate" => "__builtin_HEXAGON_S2_vcrotate",
+                    "S2.vrcnegh" => "__builtin_HEXAGON_S2_vrcnegh",
+                    "S2.vrndpackwh" => "__builtin_HEXAGON_S2_vrndpackwh",
+                    "S2.vrndpackwhs" => "__builtin_HEXAGON_S2_vrndpackwhs",
+                    "S2.vsathb" => "__builtin_HEXAGON_S2_vsathb",
+                    "S2.vsathb.nopack" => "__builtin_HEXAGON_S2_vsathb_nopack",
+                    "S2.vsathub" => "__builtin_HEXAGON_S2_vsathub",
+                    "S2.vsathub.nopack" => "__builtin_HEXAGON_S2_vsathub_nopack",
+                    "S2.vsatwh" => "__builtin_HEXAGON_S2_vsatwh",
+                    "S2.vsatwh.nopack" => "__builtin_HEXAGON_S2_vsatwh_nopack",
+                    "S2.vsatwuh" => "__builtin_HEXAGON_S2_vsatwuh",
+                    "S2.vsatwuh.nopack" => "__builtin_HEXAGON_S2_vsatwuh_nopack",
+                    "S2.vsplatrb" => "__builtin_HEXAGON_S2_vsplatrb",
+                    "S2.vsplatrh" => "__builtin_HEXAGON_S2_vsplatrh",
+                    "S2.vspliceib" => "__builtin_HEXAGON_S2_vspliceib",
+                    "S2.vsplicerb" => "__builtin_HEXAGON_S2_vsplicerb",
+                    "S2.vsxtbh" => "__builtin_HEXAGON_S2_vsxtbh",
+                    "S2.vsxthw" => "__builtin_HEXAGON_S2_vsxthw",
+                    "S2.vtrunehb" => "__builtin_HEXAGON_S2_vtrunehb",
+                    "S2.vtrunewh" => "__builtin_HEXAGON_S2_vtrunewh",
+                    "S2.vtrunohb" => "__builtin_HEXAGON_S2_vtrunohb",
+                    "S2.vtrunowh" => "__builtin_HEXAGON_S2_vtrunowh",
+                    "S2.vzxtbh" => "__builtin_HEXAGON_S2_vzxtbh",
+                    "S2.vzxthw" => "__builtin_HEXAGON_S2_vzxthw",
+                    "S4.addaddi" => "__builtin_HEXAGON_S4_addaddi",
+                    "S4.addi.asl.ri" => "__builtin_HEXAGON_S4_addi_asl_ri",
+                    "S4.addi.lsr.ri" => "__builtin_HEXAGON_S4_addi_lsr_ri",
+                    "S4.andi.asl.ri" => "__builtin_HEXAGON_S4_andi_asl_ri",
+                    "S4.andi.lsr.ri" => "__builtin_HEXAGON_S4_andi_lsr_ri",
+                    "S4.clbaddi" => "__builtin_HEXAGON_S4_clbaddi",
+                    "S4.clbpaddi" => "__builtin_HEXAGON_S4_clbpaddi",
+                    "S4.clbpnorm" => "__builtin_HEXAGON_S4_clbpnorm",
+                    "S4.extract" => "__builtin_HEXAGON_S4_extract",
+                    "S4.extract.rp" => "__builtin_HEXAGON_S4_extract_rp",
+                    "S4.extractp" => "__builtin_HEXAGON_S4_extractp",
+                    "S4.extractp.rp" => "__builtin_HEXAGON_S4_extractp_rp",
+                    "S4.lsli" => "__builtin_HEXAGON_S4_lsli",
+                    "S4.ntstbit.i" => "__builtin_HEXAGON_S4_ntstbit_i",
+                    "S4.ntstbit.r" => "__builtin_HEXAGON_S4_ntstbit_r",
+                    "S4.or.andi" => "__builtin_HEXAGON_S4_or_andi",
+                    "S4.or.andix" => "__builtin_HEXAGON_S4_or_andix",
+                    "S4.or.ori" => "__builtin_HEXAGON_S4_or_ori",
+                    "S4.ori.asl.ri" => "__builtin_HEXAGON_S4_ori_asl_ri",
+                    "S4.ori.lsr.ri" => "__builtin_HEXAGON_S4_ori_lsr_ri",
+                    "S4.parity" => "__builtin_HEXAGON_S4_parity",
+                    "S4.stored.locked" => "__builtin_HEXAGON_S4_stored_locked",
+                    "S4.subaddi" => "__builtin_HEXAGON_S4_subaddi",
+                    "S4.subi.asl.ri" => "__builtin_HEXAGON_S4_subi_asl_ri",
+                    "S4.subi.lsr.ri" => "__builtin_HEXAGON_S4_subi_lsr_ri",
+                    "S4.vrcrotate" => "__builtin_HEXAGON_S4_vrcrotate",
+                    "S4.vrcrotate.acc" => "__builtin_HEXAGON_S4_vrcrotate_acc",
+                    "S4.vxaddsubh" => "__builtin_HEXAGON_S4_vxaddsubh",
+                    "S4.vxaddsubhr" => "__builtin_HEXAGON_S4_vxaddsubhr",
+                    "S4.vxaddsubw" => "__builtin_HEXAGON_S4_vxaddsubw",
+                    "S4.vxsubaddh" => "__builtin_HEXAGON_S4_vxsubaddh",
+                    "S4.vxsubaddhr" => "__builtin_HEXAGON_S4_vxsubaddhr",
+                    "S4.vxsubaddw" => "__builtin_HEXAGON_S4_vxsubaddw",
+                    "S5.asrhub.rnd.sat.goodsyntax" => {
+                        "__builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax"
+                    }
+                    "S5.asrhub.sat" => "__builtin_HEXAGON_S5_asrhub_sat",
+                    "S5.popcountp" => "__builtin_HEXAGON_S5_popcountp",
+                    "S5.vasrhrnd.goodsyntax" => "__builtin_HEXAGON_S5_vasrhrnd_goodsyntax",
+                    "S6.rol.i.p" => "__builtin_HEXAGON_S6_rol_i_p",
+                    "S6.rol.i.p.acc" => "__builtin_HEXAGON_S6_rol_i_p_acc",
+                    "S6.rol.i.p.and" => "__builtin_HEXAGON_S6_rol_i_p_and",
+                    "S6.rol.i.p.nac" => "__builtin_HEXAGON_S6_rol_i_p_nac",
+                    "S6.rol.i.p.or" => "__builtin_HEXAGON_S6_rol_i_p_or",
+                    "S6.rol.i.p.xacc" => "__builtin_HEXAGON_S6_rol_i_p_xacc",
+                    "S6.rol.i.r" => "__builtin_HEXAGON_S6_rol_i_r",
+                    "S6.rol.i.r.acc" => "__builtin_HEXAGON_S6_rol_i_r_acc",
+                    "S6.rol.i.r.and" => "__builtin_HEXAGON_S6_rol_i_r_and",
+                    "S6.rol.i.r.nac" => "__builtin_HEXAGON_S6_rol_i_r_nac",
+                    "S6.rol.i.r.or" => "__builtin_HEXAGON_S6_rol_i_r_or",
+                    "S6.rol.i.r.xacc" => "__builtin_HEXAGON_S6_rol_i_r_xacc",
+                    "S6.vsplatrbp" => "__builtin_HEXAGON_S6_vsplatrbp",
+                    "S6.vtrunehb.ppp" => "__builtin_HEXAGON_S6_vtrunehb_ppp",
+                    "S6.vtrunohb.ppp" => "__builtin_HEXAGON_S6_vtrunohb_ppp",
+                    "SI.to.SXTHI.asrh" => "__builtin_SI_to_SXTHI_asrh",
+                    "V6.extractw" => "__builtin_HEXAGON_V6_extractw",
+                    "V6.extractw.128B" => "__builtin_HEXAGON_V6_extractw_128B",
+                    "V6.get.qfext" => "__builtin_HEXAGON_V6_get_qfext",
+                    "V6.get.qfext.128B" => "__builtin_HEXAGON_V6_get_qfext_128B",
+                    "V6.get.qfext.oracc" => "__builtin_HEXAGON_V6_get_qfext_oracc",
+                    "V6.get.qfext.oracc.128B" => "__builtin_HEXAGON_V6_get_qfext_oracc_128B",
+                    "V6.hi" => "__builtin_HEXAGON_V6_hi",
+                    "V6.hi.128B" => "__builtin_HEXAGON_V6_hi_128B",
+                    "V6.lo" => "__builtin_HEXAGON_V6_lo",
+                    "V6.lo.128B" => "__builtin_HEXAGON_V6_lo_128B",
+                    "V6.lvsplatb" => "__builtin_HEXAGON_V6_lvsplatb",
+                    "V6.lvsplatb.128B" => "__builtin_HEXAGON_V6_lvsplatb_128B",
+                    "V6.lvsplath" => "__builtin_HEXAGON_V6_lvsplath",
+                    "V6.lvsplath.128B" => "__builtin_HEXAGON_V6_lvsplath_128B",
+                    "V6.lvsplatw" => "__builtin_HEXAGON_V6_lvsplatw",
+                    "V6.lvsplatw.128B" => "__builtin_HEXAGON_V6_lvsplatw_128B",
+                    "V6.pred.and" => "__builtin_HEXAGON_V6_pred_and",
+                    "V6.pred.and.128B" => "__builtin_HEXAGON_V6_pred_and_128B",
+                    "V6.pred.and.n" => "__builtin_HEXAGON_V6_pred_and_n",
+                    "V6.pred.and.n.128B" => "__builtin_HEXAGON_V6_pred_and_n_128B",
+                    "V6.pred.not" => "__builtin_HEXAGON_V6_pred_not",
+                    "V6.pred.not.128B" => "__builtin_HEXAGON_V6_pred_not_128B",
+                    "V6.pred.or" => "__builtin_HEXAGON_V6_pred_or",
+                    "V6.pred.or.128B" => "__builtin_HEXAGON_V6_pred_or_128B",
+                    "V6.pred.or.n" => "__builtin_HEXAGON_V6_pred_or_n",
+                    "V6.pred.or.n.128B" => "__builtin_HEXAGON_V6_pred_or_n_128B",
+                    "V6.pred.scalar2" => "__builtin_HEXAGON_V6_pred_scalar2",
+                    "V6.pred.scalar2.128B" => "__builtin_HEXAGON_V6_pred_scalar2_128B",
+                    "V6.pred.scalar2v2" => "__builtin_HEXAGON_V6_pred_scalar2v2",
+                    "V6.pred.scalar2v2.128B" => "__builtin_HEXAGON_V6_pred_scalar2v2_128B",
+                    "V6.pred.xor" => "__builtin_HEXAGON_V6_pred_xor",
+                    "V6.pred.xor.128B" => "__builtin_HEXAGON_V6_pred_xor_128B",
+                    "V6.set.qfext" => "__builtin_HEXAGON_V6_set_qfext",
+                    "V6.set.qfext.128B" => "__builtin_HEXAGON_V6_set_qfext_128B",
+                    "V6.shuffeqh" => "__builtin_HEXAGON_V6_shuffeqh",
+                    "V6.shuffeqh.128B" => "__builtin_HEXAGON_V6_shuffeqh_128B",
+                    "V6.shuffeqw" => "__builtin_HEXAGON_V6_shuffeqw",
+                    "V6.shuffeqw.128B" => "__builtin_HEXAGON_V6_shuffeqw_128B",
+                    "V6.v6mpyhubs10" => "__builtin_HEXAGON_V6_v6mpyhubs10",
+                    "V6.v6mpyhubs10.128B" => "__builtin_HEXAGON_V6_v6mpyhubs10_128B",
+                    "V6.v6mpyhubs10.vxx" => "__builtin_HEXAGON_V6_v6mpyhubs10_vxx",
+                    "V6.v6mpyhubs10.vxx.128B" => "__builtin_HEXAGON_V6_v6mpyhubs10_vxx_128B",
+                    "V6.v6mpyvubs10" => "__builtin_HEXAGON_V6_v6mpyvubs10",
+                    "V6.v6mpyvubs10.128B" => "__builtin_HEXAGON_V6_v6mpyvubs10_128B",
+                    "V6.v6mpyvubs10.vxx" => "__builtin_HEXAGON_V6_v6mpyvubs10_vxx",
+                    "V6.v6mpyvubs10.vxx.128B" => "__builtin_HEXAGON_V6_v6mpyvubs10_vxx_128B",
+                    "V6.vS32b.nqpred.ai" => "__builtin_HEXAGON_V6_vS32b_nqpred_ai",
+                    "V6.vS32b.nqpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nqpred_ai_128B",
+                    "V6.vS32b.nt.nqpred.ai" => "__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai",
+                    "V6.vS32b.nt.nqpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai_128B",
+                    "V6.vS32b.nt.qpred.ai" => "__builtin_HEXAGON_V6_vS32b_nt_qpred_ai",
+                    "V6.vS32b.nt.qpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nt_qpred_ai_128B",
+                    "V6.vS32b.qpred.ai" => "__builtin_HEXAGON_V6_vS32b_qpred_ai",
+                    "V6.vS32b.qpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_qpred_ai_128B",
+                    "V6.vabs.f8" => "__builtin_HEXAGON_V6_vabs_f8",
+                    "V6.vabs.f8.128B" => "__builtin_HEXAGON_V6_vabs_f8_128B",
+                    "V6.vabs.hf" => "__builtin_HEXAGON_V6_vabs_hf",
+                    "V6.vabs.hf.128B" => "__builtin_HEXAGON_V6_vabs_hf_128B",
+                    "V6.vabs.sf" => "__builtin_HEXAGON_V6_vabs_sf",
+                    "V6.vabs.sf.128B" => "__builtin_HEXAGON_V6_vabs_sf_128B",
+                    "V6.vabsb" => "__builtin_HEXAGON_V6_vabsb",
+                    "V6.vabsb.128B" => "__builtin_HEXAGON_V6_vabsb_128B",
+                    "V6.vabsb.sat" => "__builtin_HEXAGON_V6_vabsb_sat",
+                    "V6.vabsb.sat.128B" => "__builtin_HEXAGON_V6_vabsb_sat_128B",
+                    "V6.vabsdiffh" => "__builtin_HEXAGON_V6_vabsdiffh",
+                    "V6.vabsdiffh.128B" => "__builtin_HEXAGON_V6_vabsdiffh_128B",
+                    "V6.vabsdiffub" => "__builtin_HEXAGON_V6_vabsdiffub",
+                    "V6.vabsdiffub.128B" => "__builtin_HEXAGON_V6_vabsdiffub_128B",
+                    "V6.vabsdiffuh" => "__builtin_HEXAGON_V6_vabsdiffuh",
+                    "V6.vabsdiffuh.128B" => "__builtin_HEXAGON_V6_vabsdiffuh_128B",
+                    "V6.vabsdiffw" => "__builtin_HEXAGON_V6_vabsdiffw",
+                    "V6.vabsdiffw.128B" => "__builtin_HEXAGON_V6_vabsdiffw_128B",
+                    "V6.vabsh" => "__builtin_HEXAGON_V6_vabsh",
+                    "V6.vabsh.128B" => "__builtin_HEXAGON_V6_vabsh_128B",
+                    "V6.vabsh.sat" => "__builtin_HEXAGON_V6_vabsh_sat",
+                    "V6.vabsh.sat.128B" => "__builtin_HEXAGON_V6_vabsh_sat_128B",
+                    "V6.vabsw" => "__builtin_HEXAGON_V6_vabsw",
+                    "V6.vabsw.128B" => "__builtin_HEXAGON_V6_vabsw_128B",
+                    "V6.vabsw.sat" => "__builtin_HEXAGON_V6_vabsw_sat",
+                    "V6.vabsw.sat.128B" => "__builtin_HEXAGON_V6_vabsw_sat_128B",
+                    "V6.vadd.hf" => "__builtin_HEXAGON_V6_vadd_hf",
+                    "V6.vadd.hf.128B" => "__builtin_HEXAGON_V6_vadd_hf_128B",
+                    "V6.vadd.hf.f8" => "__builtin_HEXAGON_V6_vadd_hf_f8",
+                    "V6.vadd.hf.f8.128B" => "__builtin_HEXAGON_V6_vadd_hf_f8_128B",
+                    "V6.vadd.hf.hf" => "__builtin_HEXAGON_V6_vadd_hf_hf",
+                    "V6.vadd.hf.hf.128B" => "__builtin_HEXAGON_V6_vadd_hf_hf_128B",
+                    "V6.vadd.qf16" => "__builtin_HEXAGON_V6_vadd_qf16",
+                    "V6.vadd.qf16.128B" => "__builtin_HEXAGON_V6_vadd_qf16_128B",
+                    "V6.vadd.qf16.mix" => "__builtin_HEXAGON_V6_vadd_qf16_mix",
+                    "V6.vadd.qf16.mix.128B" => "__builtin_HEXAGON_V6_vadd_qf16_mix_128B",
+                    "V6.vadd.qf32" => "__builtin_HEXAGON_V6_vadd_qf32",
+                    "V6.vadd.qf32.128B" => "__builtin_HEXAGON_V6_vadd_qf32_128B",
+                    "V6.vadd.qf32.mix" => "__builtin_HEXAGON_V6_vadd_qf32_mix",
+                    "V6.vadd.qf32.mix.128B" => "__builtin_HEXAGON_V6_vadd_qf32_mix_128B",
+                    "V6.vadd.sf" => "__builtin_HEXAGON_V6_vadd_sf",
+                    "V6.vadd.sf.128B" => "__builtin_HEXAGON_V6_vadd_sf_128B",
+                    "V6.vadd.sf.bf" => "__builtin_HEXAGON_V6_vadd_sf_bf",
+                    "V6.vadd.sf.bf.128B" => "__builtin_HEXAGON_V6_vadd_sf_bf_128B",
+                    "V6.vadd.sf.hf" => "__builtin_HEXAGON_V6_vadd_sf_hf",
+                    "V6.vadd.sf.hf.128B" => "__builtin_HEXAGON_V6_vadd_sf_hf_128B",
+                    "V6.vadd.sf.sf" => "__builtin_HEXAGON_V6_vadd_sf_sf",
+                    "V6.vadd.sf.sf.128B" => "__builtin_HEXAGON_V6_vadd_sf_sf_128B",
+                    "V6.vaddb" => "__builtin_HEXAGON_V6_vaddb",
+                    "V6.vaddb.128B" => "__builtin_HEXAGON_V6_vaddb_128B",
+                    "V6.vaddb.dv" => "__builtin_HEXAGON_V6_vaddb_dv",
+                    "V6.vaddb.dv.128B" => "__builtin_HEXAGON_V6_vaddb_dv_128B",
+                    "V6.vaddbnq" => "__builtin_HEXAGON_V6_vaddbnq",
+                    "V6.vaddbnq.128B" => "__builtin_HEXAGON_V6_vaddbnq_128B",
+                    "V6.vaddbq" => "__builtin_HEXAGON_V6_vaddbq",
+                    "V6.vaddbq.128B" => "__builtin_HEXAGON_V6_vaddbq_128B",
+                    "V6.vaddbsat" => "__builtin_HEXAGON_V6_vaddbsat",
+                    "V6.vaddbsat.128B" => "__builtin_HEXAGON_V6_vaddbsat_128B",
+                    "V6.vaddbsat.dv" => "__builtin_HEXAGON_V6_vaddbsat_dv",
+                    "V6.vaddbsat.dv.128B" => "__builtin_HEXAGON_V6_vaddbsat_dv_128B",
+                    "V6.vaddcarrysat" => "__builtin_HEXAGON_V6_vaddcarrysat",
+                    "V6.vaddcarrysat.128B" => "__builtin_HEXAGON_V6_vaddcarrysat_128B",
+                    "V6.vaddclbh" => "__builtin_HEXAGON_V6_vaddclbh",
+                    "V6.vaddclbh.128B" => "__builtin_HEXAGON_V6_vaddclbh_128B",
+                    "V6.vaddclbw" => "__builtin_HEXAGON_V6_vaddclbw",
+                    "V6.vaddclbw.128B" => "__builtin_HEXAGON_V6_vaddclbw_128B",
+                    "V6.vaddh" => "__builtin_HEXAGON_V6_vaddh",
+                    "V6.vaddh.128B" => "__builtin_HEXAGON_V6_vaddh_128B",
+                    "V6.vaddh.dv" => "__builtin_HEXAGON_V6_vaddh_dv",
+                    "V6.vaddh.dv.128B" => "__builtin_HEXAGON_V6_vaddh_dv_128B",
+                    "V6.vaddhnq" => "__builtin_HEXAGON_V6_vaddhnq",
+                    "V6.vaddhnq.128B" => "__builtin_HEXAGON_V6_vaddhnq_128B",
+                    "V6.vaddhq" => "__builtin_HEXAGON_V6_vaddhq",
+                    "V6.vaddhq.128B" => "__builtin_HEXAGON_V6_vaddhq_128B",
+                    "V6.vaddhsat" => "__builtin_HEXAGON_V6_vaddhsat",
+                    "V6.vaddhsat.128B" => "__builtin_HEXAGON_V6_vaddhsat_128B",
+                    "V6.vaddhsat.dv" => "__builtin_HEXAGON_V6_vaddhsat_dv",
+                    "V6.vaddhsat.dv.128B" => "__builtin_HEXAGON_V6_vaddhsat_dv_128B",
+                    "V6.vaddhw" => "__builtin_HEXAGON_V6_vaddhw",
+                    "V6.vaddhw.128B" => "__builtin_HEXAGON_V6_vaddhw_128B",
+                    "V6.vaddhw.acc" => "__builtin_HEXAGON_V6_vaddhw_acc",
+                    "V6.vaddhw.acc.128B" => "__builtin_HEXAGON_V6_vaddhw_acc_128B",
+                    "V6.vaddubh" => "__builtin_HEXAGON_V6_vaddubh",
+                    "V6.vaddubh.128B" => "__builtin_HEXAGON_V6_vaddubh_128B",
+                    "V6.vaddubh.acc" => "__builtin_HEXAGON_V6_vaddubh_acc",
+                    "V6.vaddubh.acc.128B" => "__builtin_HEXAGON_V6_vaddubh_acc_128B",
+                    "V6.vaddubsat" => "__builtin_HEXAGON_V6_vaddubsat",
+                    "V6.vaddubsat.128B" => "__builtin_HEXAGON_V6_vaddubsat_128B",
+                    "V6.vaddubsat.dv" => "__builtin_HEXAGON_V6_vaddubsat_dv",
+                    "V6.vaddubsat.dv.128B" => "__builtin_HEXAGON_V6_vaddubsat_dv_128B",
+                    "V6.vaddububb.sat" => "__builtin_HEXAGON_V6_vaddububb_sat",
+                    "V6.vaddububb.sat.128B" => "__builtin_HEXAGON_V6_vaddububb_sat_128B",
+                    "V6.vadduhsat" => "__builtin_HEXAGON_V6_vadduhsat",
+                    "V6.vadduhsat.128B" => "__builtin_HEXAGON_V6_vadduhsat_128B",
+                    "V6.vadduhsat.dv" => "__builtin_HEXAGON_V6_vadduhsat_dv",
+                    "V6.vadduhsat.dv.128B" => "__builtin_HEXAGON_V6_vadduhsat_dv_128B",
+                    "V6.vadduhw" => "__builtin_HEXAGON_V6_vadduhw",
+                    "V6.vadduhw.128B" => "__builtin_HEXAGON_V6_vadduhw_128B",
+                    "V6.vadduhw.acc" => "__builtin_HEXAGON_V6_vadduhw_acc",
+                    "V6.vadduhw.acc.128B" => "__builtin_HEXAGON_V6_vadduhw_acc_128B",
+                    "V6.vadduwsat" => "__builtin_HEXAGON_V6_vadduwsat",
+                    "V6.vadduwsat.128B" => "__builtin_HEXAGON_V6_vadduwsat_128B",
+                    "V6.vadduwsat.dv" => "__builtin_HEXAGON_V6_vadduwsat_dv",
+                    "V6.vadduwsat.dv.128B" => "__builtin_HEXAGON_V6_vadduwsat_dv_128B",
+                    "V6.vaddw" => "__builtin_HEXAGON_V6_vaddw",
+                    "V6.vaddw.128B" => "__builtin_HEXAGON_V6_vaddw_128B",
+                    "V6.vaddw.dv" => "__builtin_HEXAGON_V6_vaddw_dv",
+                    "V6.vaddw.dv.128B" => "__builtin_HEXAGON_V6_vaddw_dv_128B",
+                    "V6.vaddwnq" => "__builtin_HEXAGON_V6_vaddwnq",
+                    "V6.vaddwnq.128B" => "__builtin_HEXAGON_V6_vaddwnq_128B",
+                    "V6.vaddwq" => "__builtin_HEXAGON_V6_vaddwq",
+                    "V6.vaddwq.128B" => "__builtin_HEXAGON_V6_vaddwq_128B",
+                    "V6.vaddwsat" => "__builtin_HEXAGON_V6_vaddwsat",
+                    "V6.vaddwsat.128B" => "__builtin_HEXAGON_V6_vaddwsat_128B",
+                    "V6.vaddwsat.dv" => "__builtin_HEXAGON_V6_vaddwsat_dv",
+                    "V6.vaddwsat.dv.128B" => "__builtin_HEXAGON_V6_vaddwsat_dv_128B",
+                    "V6.valignb" => "__builtin_HEXAGON_V6_valignb",
+                    "V6.valignb.128B" => "__builtin_HEXAGON_V6_valignb_128B",
+                    "V6.valignbi" => "__builtin_HEXAGON_V6_valignbi",
+                    "V6.valignbi.128B" => "__builtin_HEXAGON_V6_valignbi_128B",
+                    "V6.vand" => "__builtin_HEXAGON_V6_vand",
+                    "V6.vand.128B" => "__builtin_HEXAGON_V6_vand_128B",
+                    "V6.vandnqrt" => "__builtin_HEXAGON_V6_vandnqrt",
+                    "V6.vandnqrt.128B" => "__builtin_HEXAGON_V6_vandnqrt_128B",
+                    "V6.vandnqrt.acc" => "__builtin_HEXAGON_V6_vandnqrt_acc",
+                    "V6.vandnqrt.acc.128B" => "__builtin_HEXAGON_V6_vandnqrt_acc_128B",
+                    "V6.vandqrt" => "__builtin_HEXAGON_V6_vandqrt",
+                    "V6.vandqrt.128B" => "__builtin_HEXAGON_V6_vandqrt_128B",
+                    "V6.vandqrt.acc" => "__builtin_HEXAGON_V6_vandqrt_acc",
+                    "V6.vandqrt.acc.128B" => "__builtin_HEXAGON_V6_vandqrt_acc_128B",
+                    "V6.vandvnqv" => "__builtin_HEXAGON_V6_vandvnqv",
+                    "V6.vandvnqv.128B" => "__builtin_HEXAGON_V6_vandvnqv_128B",
+                    "V6.vandvqv" => "__builtin_HEXAGON_V6_vandvqv",
+                    "V6.vandvqv.128B" => "__builtin_HEXAGON_V6_vandvqv_128B",
+                    "V6.vandvrt" => "__builtin_HEXAGON_V6_vandvrt",
+                    "V6.vandvrt.128B" => "__builtin_HEXAGON_V6_vandvrt_128B",
+                    "V6.vandvrt.acc" => "__builtin_HEXAGON_V6_vandvrt_acc",
+                    "V6.vandvrt.acc.128B" => "__builtin_HEXAGON_V6_vandvrt_acc_128B",
+                    "V6.vaslh" => "__builtin_HEXAGON_V6_vaslh",
+                    "V6.vaslh.128B" => "__builtin_HEXAGON_V6_vaslh_128B",
+                    "V6.vaslh.acc" => "__builtin_HEXAGON_V6_vaslh_acc",
+                    "V6.vaslh.acc.128B" => "__builtin_HEXAGON_V6_vaslh_acc_128B",
+                    "V6.vaslhv" => "__builtin_HEXAGON_V6_vaslhv",
+                    "V6.vaslhv.128B" => "__builtin_HEXAGON_V6_vaslhv_128B",
+                    "V6.vaslw" => "__builtin_HEXAGON_V6_vaslw",
+                    "V6.vaslw.128B" => "__builtin_HEXAGON_V6_vaslw_128B",
+                    "V6.vaslw.acc" => "__builtin_HEXAGON_V6_vaslw_acc",
+                    "V6.vaslw.acc.128B" => "__builtin_HEXAGON_V6_vaslw_acc_128B",
+                    "V6.vaslwv" => "__builtin_HEXAGON_V6_vaslwv",
+                    "V6.vaslwv.128B" => "__builtin_HEXAGON_V6_vaslwv_128B",
+                    "V6.vasr.into" => "__builtin_HEXAGON_V6_vasr_into",
+                    "V6.vasr.into.128B" => "__builtin_HEXAGON_V6_vasr_into_128B",
+                    "V6.vasrh" => "__builtin_HEXAGON_V6_vasrh",
+                    "V6.vasrh.128B" => "__builtin_HEXAGON_V6_vasrh_128B",
+                    "V6.vasrh.acc" => "__builtin_HEXAGON_V6_vasrh_acc",
+                    "V6.vasrh.acc.128B" => "__builtin_HEXAGON_V6_vasrh_acc_128B",
+                    "V6.vasrhbrndsat" => "__builtin_HEXAGON_V6_vasrhbrndsat",
+                    "V6.vasrhbrndsat.128B" => "__builtin_HEXAGON_V6_vasrhbrndsat_128B",
+                    "V6.vasrhbsat" => "__builtin_HEXAGON_V6_vasrhbsat",
+                    "V6.vasrhbsat.128B" => "__builtin_HEXAGON_V6_vasrhbsat_128B",
+                    "V6.vasrhubrndsat" => "__builtin_HEXAGON_V6_vasrhubrndsat",
+                    "V6.vasrhubrndsat.128B" => "__builtin_HEXAGON_V6_vasrhubrndsat_128B",
+                    "V6.vasrhubsat" => "__builtin_HEXAGON_V6_vasrhubsat",
+                    "V6.vasrhubsat.128B" => "__builtin_HEXAGON_V6_vasrhubsat_128B",
+                    "V6.vasrhv" => "__builtin_HEXAGON_V6_vasrhv",
+                    "V6.vasrhv.128B" => "__builtin_HEXAGON_V6_vasrhv_128B",
+                    "V6.vasruhubrndsat" => "__builtin_HEXAGON_V6_vasruhubrndsat",
+                    "V6.vasruhubrndsat.128B" => "__builtin_HEXAGON_V6_vasruhubrndsat_128B",
+                    "V6.vasruhubsat" => "__builtin_HEXAGON_V6_vasruhubsat",
+                    "V6.vasruhubsat.128B" => "__builtin_HEXAGON_V6_vasruhubsat_128B",
+                    "V6.vasruwuhrndsat" => "__builtin_HEXAGON_V6_vasruwuhrndsat",
+                    "V6.vasruwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasruwuhrndsat_128B",
+                    "V6.vasruwuhsat" => "__builtin_HEXAGON_V6_vasruwuhsat",
+                    "V6.vasruwuhsat.128B" => "__builtin_HEXAGON_V6_vasruwuhsat_128B",
+                    "V6.vasrvuhubrndsat" => "__builtin_HEXAGON_V6_vasrvuhubrndsat",
+                    "V6.vasrvuhubrndsat.128B" => "__builtin_HEXAGON_V6_vasrvuhubrndsat_128B",
+                    "V6.vasrvuhubsat" => "__builtin_HEXAGON_V6_vasrvuhubsat",
+                    "V6.vasrvuhubsat.128B" => "__builtin_HEXAGON_V6_vasrvuhubsat_128B",
+                    "V6.vasrvwuhrndsat" => "__builtin_HEXAGON_V6_vasrvwuhrndsat",
+                    "V6.vasrvwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasrvwuhrndsat_128B",
+                    "V6.vasrvwuhsat" => "__builtin_HEXAGON_V6_vasrvwuhsat",
+                    "V6.vasrvwuhsat.128B" => "__builtin_HEXAGON_V6_vasrvwuhsat_128B",
+                    "V6.vasrw" => "__builtin_HEXAGON_V6_vasrw",
+                    "V6.vasrw.128B" => "__builtin_HEXAGON_V6_vasrw_128B",
+                    "V6.vasrw.acc" => "__builtin_HEXAGON_V6_vasrw_acc",
+                    "V6.vasrw.acc.128B" => "__builtin_HEXAGON_V6_vasrw_acc_128B",
+                    "V6.vasrwh" => "__builtin_HEXAGON_V6_vasrwh",
+                    "V6.vasrwh.128B" => "__builtin_HEXAGON_V6_vasrwh_128B",
+                    "V6.vasrwhrndsat" => "__builtin_HEXAGON_V6_vasrwhrndsat",
+                    "V6.vasrwhrndsat.128B" => "__builtin_HEXAGON_V6_vasrwhrndsat_128B",
+                    "V6.vasrwhsat" => "__builtin_HEXAGON_V6_vasrwhsat",
+                    "V6.vasrwhsat.128B" => "__builtin_HEXAGON_V6_vasrwhsat_128B",
+                    "V6.vasrwuhrndsat" => "__builtin_HEXAGON_V6_vasrwuhrndsat",
+                    "V6.vasrwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasrwuhrndsat_128B",
+                    "V6.vasrwuhsat" => "__builtin_HEXAGON_V6_vasrwuhsat",
+                    "V6.vasrwuhsat.128B" => "__builtin_HEXAGON_V6_vasrwuhsat_128B",
+                    "V6.vasrwv" => "__builtin_HEXAGON_V6_vasrwv",
+                    "V6.vasrwv.128B" => "__builtin_HEXAGON_V6_vasrwv_128B",
+                    "V6.vassign" => "__builtin_HEXAGON_V6_vassign",
+                    "V6.vassign.128B" => "__builtin_HEXAGON_V6_vassign_128B",
+                    "V6.vassign.fp" => "__builtin_HEXAGON_V6_vassign_fp",
+                    "V6.vassign.fp.128B" => "__builtin_HEXAGON_V6_vassign_fp_128B",
+                    "V6.vassignp" => "__builtin_HEXAGON_V6_vassignp",
+                    "V6.vassignp.128B" => "__builtin_HEXAGON_V6_vassignp_128B",
+                    "V6.vavgb" => "__builtin_HEXAGON_V6_vavgb",
+                    "V6.vavgb.128B" => "__builtin_HEXAGON_V6_vavgb_128B",
+                    "V6.vavgbrnd" => "__builtin_HEXAGON_V6_vavgbrnd",
+                    "V6.vavgbrnd.128B" => "__builtin_HEXAGON_V6_vavgbrnd_128B",
+                    "V6.vavgh" => "__builtin_HEXAGON_V6_vavgh",
+                    "V6.vavgh.128B" => "__builtin_HEXAGON_V6_vavgh_128B",
+                    "V6.vavghrnd" => "__builtin_HEXAGON_V6_vavghrnd",
+                    "V6.vavghrnd.128B" => "__builtin_HEXAGON_V6_vavghrnd_128B",
+                    "V6.vavgub" => "__builtin_HEXAGON_V6_vavgub",
+                    "V6.vavgub.128B" => "__builtin_HEXAGON_V6_vavgub_128B",
+                    "V6.vavgubrnd" => "__builtin_HEXAGON_V6_vavgubrnd",
+                    "V6.vavgubrnd.128B" => "__builtin_HEXAGON_V6_vavgubrnd_128B",
+                    "V6.vavguh" => "__builtin_HEXAGON_V6_vavguh",
+                    "V6.vavguh.128B" => "__builtin_HEXAGON_V6_vavguh_128B",
+                    "V6.vavguhrnd" => "__builtin_HEXAGON_V6_vavguhrnd",
+                    "V6.vavguhrnd.128B" => "__builtin_HEXAGON_V6_vavguhrnd_128B",
+                    "V6.vavguw" => "__builtin_HEXAGON_V6_vavguw",
+                    "V6.vavguw.128B" => "__builtin_HEXAGON_V6_vavguw_128B",
+                    "V6.vavguwrnd" => "__builtin_HEXAGON_V6_vavguwrnd",
+                    "V6.vavguwrnd.128B" => "__builtin_HEXAGON_V6_vavguwrnd_128B",
+                    "V6.vavgw" => "__builtin_HEXAGON_V6_vavgw",
+                    "V6.vavgw.128B" => "__builtin_HEXAGON_V6_vavgw_128B",
+                    "V6.vavgwrnd" => "__builtin_HEXAGON_V6_vavgwrnd",
+                    "V6.vavgwrnd.128B" => "__builtin_HEXAGON_V6_vavgwrnd_128B",
+                    "V6.vcl0h" => "__builtin_HEXAGON_V6_vcl0h",
+                    "V6.vcl0h.128B" => "__builtin_HEXAGON_V6_vcl0h_128B",
+                    "V6.vcl0w" => "__builtin_HEXAGON_V6_vcl0w",
+                    "V6.vcl0w.128B" => "__builtin_HEXAGON_V6_vcl0w_128B",
+                    "V6.vcombine" => "__builtin_HEXAGON_V6_vcombine",
+                    "V6.vcombine.128B" => "__builtin_HEXAGON_V6_vcombine_128B",
+                    "V6.vconv.h.hf" => "__builtin_HEXAGON_V6_vconv_h_hf",
+                    "V6.vconv.h.hf.128B" => "__builtin_HEXAGON_V6_vconv_h_hf_128B",
+                    "V6.vconv.hf.h" => "__builtin_HEXAGON_V6_vconv_hf_h",
+                    "V6.vconv.hf.h.128B" => "__builtin_HEXAGON_V6_vconv_hf_h_128B",
+                    "V6.vconv.hf.qf16" => "__builtin_HEXAGON_V6_vconv_hf_qf16",
+                    "V6.vconv.hf.qf16.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf16_128B",
+                    "V6.vconv.hf.qf32" => "__builtin_HEXAGON_V6_vconv_hf_qf32",
+                    "V6.vconv.hf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf32_128B",
+                    "V6.vconv.sf.qf32" => "__builtin_HEXAGON_V6_vconv_sf_qf32",
+                    "V6.vconv.sf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_sf_qf32_128B",
+                    "V6.vconv.sf.w" => "__builtin_HEXAGON_V6_vconv_sf_w",
+                    "V6.vconv.sf.w.128B" => "__builtin_HEXAGON_V6_vconv_sf_w_128B",
+                    "V6.vconv.w.sf" => "__builtin_HEXAGON_V6_vconv_w_sf",
+                    "V6.vconv.w.sf.128B" => "__builtin_HEXAGON_V6_vconv_w_sf_128B",
+                    "V6.vcvt.b.hf" => "__builtin_HEXAGON_V6_vcvt_b_hf",
+                    "V6.vcvt.b.hf.128B" => "__builtin_HEXAGON_V6_vcvt_b_hf_128B",
+                    "V6.vcvt.bf.sf" => "__builtin_HEXAGON_V6_vcvt_bf_sf",
+                    "V6.vcvt.bf.sf.128B" => "__builtin_HEXAGON_V6_vcvt_bf_sf_128B",
+                    "V6.vcvt.f8.hf" => "__builtin_HEXAGON_V6_vcvt_f8_hf",
+                    "V6.vcvt.f8.hf.128B" => "__builtin_HEXAGON_V6_vcvt_f8_hf_128B",
+                    "V6.vcvt.h.hf" => "__builtin_HEXAGON_V6_vcvt_h_hf",
+                    "V6.vcvt.h.hf.128B" => "__builtin_HEXAGON_V6_vcvt_h_hf_128B",
+                    "V6.vcvt.hf.b" => "__builtin_HEXAGON_V6_vcvt_hf_b",
+                    "V6.vcvt.hf.b.128B" => "__builtin_HEXAGON_V6_vcvt_hf_b_128B",
+                    "V6.vcvt.hf.f8" => "__builtin_HEXAGON_V6_vcvt_hf_f8",
+                    "V6.vcvt.hf.f8.128B" => "__builtin_HEXAGON_V6_vcvt_hf_f8_128B",
+                    "V6.vcvt.hf.h" => "__builtin_HEXAGON_V6_vcvt_hf_h",
+                    "V6.vcvt.hf.h.128B" => "__builtin_HEXAGON_V6_vcvt_hf_h_128B",
+                    "V6.vcvt.hf.sf" => "__builtin_HEXAGON_V6_vcvt_hf_sf",
+                    "V6.vcvt.hf.sf.128B" => "__builtin_HEXAGON_V6_vcvt_hf_sf_128B",
+                    "V6.vcvt.hf.ub" => "__builtin_HEXAGON_V6_vcvt_hf_ub",
+                    "V6.vcvt.hf.ub.128B" => "__builtin_HEXAGON_V6_vcvt_hf_ub_128B",
+                    "V6.vcvt.hf.uh" => "__builtin_HEXAGON_V6_vcvt_hf_uh",
+                    "V6.vcvt.hf.uh.128B" => "__builtin_HEXAGON_V6_vcvt_hf_uh_128B",
+                    "V6.vcvt.sf.hf" => "__builtin_HEXAGON_V6_vcvt_sf_hf",
+                    "V6.vcvt.sf.hf.128B" => "__builtin_HEXAGON_V6_vcvt_sf_hf_128B",
+                    "V6.vcvt.ub.hf" => "__builtin_HEXAGON_V6_vcvt_ub_hf",
+                    "V6.vcvt.ub.hf.128B" => "__builtin_HEXAGON_V6_vcvt_ub_hf_128B",
+                    "V6.vcvt.uh.hf" => "__builtin_HEXAGON_V6_vcvt_uh_hf",
+                    "V6.vcvt.uh.hf.128B" => "__builtin_HEXAGON_V6_vcvt_uh_hf_128B",
+                    "V6.vcvt2.b.hf" => "__builtin_HEXAGON_V6_vcvt2_b_hf",
+                    "V6.vcvt2.b.hf.128B" => "__builtin_HEXAGON_V6_vcvt2_b_hf_128B",
+                    "V6.vcvt2.hf.b" => "__builtin_HEXAGON_V6_vcvt2_hf_b",
+                    "V6.vcvt2.hf.b.128B" => "__builtin_HEXAGON_V6_vcvt2_hf_b_128B",
+                    "V6.vcvt2.hf.ub" => "__builtin_HEXAGON_V6_vcvt2_hf_ub",
+                    "V6.vcvt2.hf.ub.128B" => "__builtin_HEXAGON_V6_vcvt2_hf_ub_128B",
+                    "V6.vcvt2.ub.hf" => "__builtin_HEXAGON_V6_vcvt2_ub_hf",
+                    "V6.vcvt2.ub.hf.128B" => "__builtin_HEXAGON_V6_vcvt2_ub_hf_128B",
+                    "V6.vd0" => "__builtin_HEXAGON_V6_vd0",
+                    "V6.vd0.128B" => "__builtin_HEXAGON_V6_vd0_128B",
+                    "V6.vdd0" => "__builtin_HEXAGON_V6_vdd0",
+                    "V6.vdd0.128B" => "__builtin_HEXAGON_V6_vdd0_128B",
+                    "V6.vdealb" => "__builtin_HEXAGON_V6_vdealb",
+                    "V6.vdealb.128B" => "__builtin_HEXAGON_V6_vdealb_128B",
+                    "V6.vdealb4w" => "__builtin_HEXAGON_V6_vdealb4w",
+                    "V6.vdealb4w.128B" => "__builtin_HEXAGON_V6_vdealb4w_128B",
+                    "V6.vdealh" => "__builtin_HEXAGON_V6_vdealh",
+                    "V6.vdealh.128B" => "__builtin_HEXAGON_V6_vdealh_128B",
+                    "V6.vdealvdd" => "__builtin_HEXAGON_V6_vdealvdd",
+                    "V6.vdealvdd.128B" => "__builtin_HEXAGON_V6_vdealvdd_128B",
+                    "V6.vdelta" => "__builtin_HEXAGON_V6_vdelta",
+                    "V6.vdelta.128B" => "__builtin_HEXAGON_V6_vdelta_128B",
+                    "V6.vdmpy.sf.hf" => "__builtin_HEXAGON_V6_vdmpy_sf_hf",
+                    "V6.vdmpy.sf.hf.128B" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_128B",
+                    "V6.vdmpy.sf.hf.acc" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_acc",
+                    "V6.vdmpy.sf.hf.acc.128B" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_acc_128B",
+                    "V6.vdmpybus" => "__builtin_HEXAGON_V6_vdmpybus",
+                    "V6.vdmpybus.128B" => "__builtin_HEXAGON_V6_vdmpybus_128B",
+                    "V6.vdmpybus.acc" => "__builtin_HEXAGON_V6_vdmpybus_acc",
+                    "V6.vdmpybus.acc.128B" => "__builtin_HEXAGON_V6_vdmpybus_acc_128B",
+                    "V6.vdmpybus.dv" => "__builtin_HEXAGON_V6_vdmpybus_dv",
+                    "V6.vdmpybus.dv.128B" => "__builtin_HEXAGON_V6_vdmpybus_dv_128B",
+                    "V6.vdmpybus.dv.acc" => "__builtin_HEXAGON_V6_vdmpybus_dv_acc",
+                    "V6.vdmpybus.dv.acc.128B" => "__builtin_HEXAGON_V6_vdmpybus_dv_acc_128B",
+                    "V6.vdmpyhb" => "__builtin_HEXAGON_V6_vdmpyhb",
+                    "V6.vdmpyhb.128B" => "__builtin_HEXAGON_V6_vdmpyhb_128B",
+                    "V6.vdmpyhb.acc" => "__builtin_HEXAGON_V6_vdmpyhb_acc",
+                    "V6.vdmpyhb.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhb_acc_128B",
+                    "V6.vdmpyhb.dv" => "__builtin_HEXAGON_V6_vdmpyhb_dv",
+                    "V6.vdmpyhb.dv.128B" => "__builtin_HEXAGON_V6_vdmpyhb_dv_128B",
+                    "V6.vdmpyhb.dv.acc" => "__builtin_HEXAGON_V6_vdmpyhb_dv_acc",
+                    "V6.vdmpyhb.dv.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhb_dv_acc_128B",
+                    "V6.vdmpyhisat" => "__builtin_HEXAGON_V6_vdmpyhisat",
+                    "V6.vdmpyhisat.128B" => "__builtin_HEXAGON_V6_vdmpyhisat_128B",
+                    "V6.vdmpyhisat.acc" => "__builtin_HEXAGON_V6_vdmpyhisat_acc",
+                    "V6.vdmpyhisat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhisat_acc_128B",
+                    "V6.vdmpyhsat" => "__builtin_HEXAGON_V6_vdmpyhsat",
+                    "V6.vdmpyhsat.128B" => "__builtin_HEXAGON_V6_vdmpyhsat_128B",
+                    "V6.vdmpyhsat.acc" => "__builtin_HEXAGON_V6_vdmpyhsat_acc",
+                    "V6.vdmpyhsat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsat_acc_128B",
+                    "V6.vdmpyhsuisat" => "__builtin_HEXAGON_V6_vdmpyhsuisat",
+                    "V6.vdmpyhsuisat.128B" => "__builtin_HEXAGON_V6_vdmpyhsuisat_128B",
+                    "V6.vdmpyhsuisat.acc" => "__builtin_HEXAGON_V6_vdmpyhsuisat_acc",
+                    "V6.vdmpyhsuisat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsuisat_acc_128B",
+                    "V6.vdmpyhsusat" => "__builtin_HEXAGON_V6_vdmpyhsusat",
+                    "V6.vdmpyhsusat.128B" => "__builtin_HEXAGON_V6_vdmpyhsusat_128B",
+                    "V6.vdmpyhsusat.acc" => "__builtin_HEXAGON_V6_vdmpyhsusat_acc",
+                    "V6.vdmpyhsusat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsusat_acc_128B",
+                    "V6.vdmpyhvsat" => "__builtin_HEXAGON_V6_vdmpyhvsat",
+                    "V6.vdmpyhvsat.128B" => "__builtin_HEXAGON_V6_vdmpyhvsat_128B",
+                    "V6.vdmpyhvsat.acc" => "__builtin_HEXAGON_V6_vdmpyhvsat_acc",
+                    "V6.vdmpyhvsat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhvsat_acc_128B",
+                    "V6.vdsaduh" => "__builtin_HEXAGON_V6_vdsaduh",
+                    "V6.vdsaduh.128B" => "__builtin_HEXAGON_V6_vdsaduh_128B",
+                    "V6.vdsaduh.acc" => "__builtin_HEXAGON_V6_vdsaduh_acc",
+                    "V6.vdsaduh.acc.128B" => "__builtin_HEXAGON_V6_vdsaduh_acc_128B",
+                    "V6.veqb" => "__builtin_HEXAGON_V6_veqb",
+                    "V6.veqb.128B" => "__builtin_HEXAGON_V6_veqb_128B",
+                    "V6.veqb.and" => "__builtin_HEXAGON_V6_veqb_and",
+                    "V6.veqb.and.128B" => "__builtin_HEXAGON_V6_veqb_and_128B",
+                    "V6.veqb.or" => "__builtin_HEXAGON_V6_veqb_or",
+                    "V6.veqb.or.128B" => "__builtin_HEXAGON_V6_veqb_or_128B",
+                    "V6.veqb.xor" => "__builtin_HEXAGON_V6_veqb_xor",
+                    "V6.veqb.xor.128B" => "__builtin_HEXAGON_V6_veqb_xor_128B",
+                    "V6.veqh" => "__builtin_HEXAGON_V6_veqh",
+                    "V6.veqh.128B" => "__builtin_HEXAGON_V6_veqh_128B",
+                    "V6.veqh.and" => "__builtin_HEXAGON_V6_veqh_and",
+                    "V6.veqh.and.128B" => "__builtin_HEXAGON_V6_veqh_and_128B",
+                    "V6.veqh.or" => "__builtin_HEXAGON_V6_veqh_or",
+                    "V6.veqh.or.128B" => "__builtin_HEXAGON_V6_veqh_or_128B",
+                    "V6.veqh.xor" => "__builtin_HEXAGON_V6_veqh_xor",
+                    "V6.veqh.xor.128B" => "__builtin_HEXAGON_V6_veqh_xor_128B",
+                    "V6.veqw" => "__builtin_HEXAGON_V6_veqw",
+                    "V6.veqw.128B" => "__builtin_HEXAGON_V6_veqw_128B",
+                    "V6.veqw.and" => "__builtin_HEXAGON_V6_veqw_and",
+                    "V6.veqw.and.128B" => "__builtin_HEXAGON_V6_veqw_and_128B",
+                    "V6.veqw.or" => "__builtin_HEXAGON_V6_veqw_or",
+                    "V6.veqw.or.128B" => "__builtin_HEXAGON_V6_veqw_or_128B",
+                    "V6.veqw.xor" => "__builtin_HEXAGON_V6_veqw_xor",
+                    "V6.veqw.xor.128B" => "__builtin_HEXAGON_V6_veqw_xor_128B",
+                    "V6.vfmax.f8" => "__builtin_HEXAGON_V6_vfmax_f8",
+                    "V6.vfmax.f8.128B" => "__builtin_HEXAGON_V6_vfmax_f8_128B",
+                    "V6.vfmax.hf" => "__builtin_HEXAGON_V6_vfmax_hf",
+                    "V6.vfmax.hf.128B" => "__builtin_HEXAGON_V6_vfmax_hf_128B",
+                    "V6.vfmax.sf" => "__builtin_HEXAGON_V6_vfmax_sf",
+                    "V6.vfmax.sf.128B" => "__builtin_HEXAGON_V6_vfmax_sf_128B",
+                    "V6.vfmin.f8" => "__builtin_HEXAGON_V6_vfmin_f8",
+                    "V6.vfmin.f8.128B" => "__builtin_HEXAGON_V6_vfmin_f8_128B",
+                    "V6.vfmin.hf" => "__builtin_HEXAGON_V6_vfmin_hf",
+                    "V6.vfmin.hf.128B" => "__builtin_HEXAGON_V6_vfmin_hf_128B",
+                    "V6.vfmin.sf" => "__builtin_HEXAGON_V6_vfmin_sf",
+                    "V6.vfmin.sf.128B" => "__builtin_HEXAGON_V6_vfmin_sf_128B",
+                    "V6.vfneg.f8" => "__builtin_HEXAGON_V6_vfneg_f8",
+                    "V6.vfneg.f8.128B" => "__builtin_HEXAGON_V6_vfneg_f8_128B",
+                    "V6.vfneg.hf" => "__builtin_HEXAGON_V6_vfneg_hf",
+                    "V6.vfneg.hf.128B" => "__builtin_HEXAGON_V6_vfneg_hf_128B",
+                    "V6.vfneg.sf" => "__builtin_HEXAGON_V6_vfneg_sf",
+                    "V6.vfneg.sf.128B" => "__builtin_HEXAGON_V6_vfneg_sf_128B",
+                    "V6.vgathermh" => "__builtin_HEXAGON_V6_vgathermh",
+                    "V6.vgathermh.128B" => "__builtin_HEXAGON_V6_vgathermh_128B",
+                    "V6.vgathermhq" => "__builtin_HEXAGON_V6_vgathermhq",
+                    "V6.vgathermhq.128B" => "__builtin_HEXAGON_V6_vgathermhq_128B",
+                    "V6.vgathermhw" => "__builtin_HEXAGON_V6_vgathermhw",
+                    "V6.vgathermhw.128B" => "__builtin_HEXAGON_V6_vgathermhw_128B",
+                    "V6.vgathermhwq" => "__builtin_HEXAGON_V6_vgathermhwq",
+                    "V6.vgathermhwq.128B" => "__builtin_HEXAGON_V6_vgathermhwq_128B",
+                    "V6.vgathermw" => "__builtin_HEXAGON_V6_vgathermw",
+                    "V6.vgathermw.128B" => "__builtin_HEXAGON_V6_vgathermw_128B",
+                    "V6.vgathermwq" => "__builtin_HEXAGON_V6_vgathermwq",
+                    "V6.vgathermwq.128B" => "__builtin_HEXAGON_V6_vgathermwq_128B",
+                    "V6.vgtb" => "__builtin_HEXAGON_V6_vgtb",
+                    "V6.vgtb.128B" => "__builtin_HEXAGON_V6_vgtb_128B",
+                    "V6.vgtb.and" => "__builtin_HEXAGON_V6_vgtb_and",
+                    "V6.vgtb.and.128B" => "__builtin_HEXAGON_V6_vgtb_and_128B",
+                    "V6.vgtb.or" => "__builtin_HEXAGON_V6_vgtb_or",
+                    "V6.vgtb.or.128B" => "__builtin_HEXAGON_V6_vgtb_or_128B",
+                    "V6.vgtb.xor" => "__builtin_HEXAGON_V6_vgtb_xor",
+                    "V6.vgtb.xor.128B" => "__builtin_HEXAGON_V6_vgtb_xor_128B",
+                    "V6.vgtbf" => "__builtin_HEXAGON_V6_vgtbf",
+                    "V6.vgtbf.128B" => "__builtin_HEXAGON_V6_vgtbf_128B",
+                    "V6.vgtbf.and" => "__builtin_HEXAGON_V6_vgtbf_and",
+                    "V6.vgtbf.and.128B" => "__builtin_HEXAGON_V6_vgtbf_and_128B",
+                    "V6.vgtbf.or" => "__builtin_HEXAGON_V6_vgtbf_or",
+                    "V6.vgtbf.or.128B" => "__builtin_HEXAGON_V6_vgtbf_or_128B",
+                    "V6.vgtbf.xor" => "__builtin_HEXAGON_V6_vgtbf_xor",
+                    "V6.vgtbf.xor.128B" => "__builtin_HEXAGON_V6_vgtbf_xor_128B",
+                    "V6.vgth" => "__builtin_HEXAGON_V6_vgth",
+                    "V6.vgth.128B" => "__builtin_HEXAGON_V6_vgth_128B",
+                    "V6.vgth.and" => "__builtin_HEXAGON_V6_vgth_and",
+                    "V6.vgth.and.128B" => "__builtin_HEXAGON_V6_vgth_and_128B",
+                    "V6.vgth.or" => "__builtin_HEXAGON_V6_vgth_or",
+                    "V6.vgth.or.128B" => "__builtin_HEXAGON_V6_vgth_or_128B",
+                    "V6.vgth.xor" => "__builtin_HEXAGON_V6_vgth_xor",
+                    "V6.vgth.xor.128B" => "__builtin_HEXAGON_V6_vgth_xor_128B",
+                    "V6.vgthf" => "__builtin_HEXAGON_V6_vgthf",
+                    "V6.vgthf.128B" => "__builtin_HEXAGON_V6_vgthf_128B",
+                    "V6.vgthf.and" => "__builtin_HEXAGON_V6_vgthf_and",
+                    "V6.vgthf.and.128B" => "__builtin_HEXAGON_V6_vgthf_and_128B",
+                    "V6.vgthf.or" => "__builtin_HEXAGON_V6_vgthf_or",
+                    "V6.vgthf.or.128B" => "__builtin_HEXAGON_V6_vgthf_or_128B",
+                    "V6.vgthf.xor" => "__builtin_HEXAGON_V6_vgthf_xor",
+                    "V6.vgthf.xor.128B" => "__builtin_HEXAGON_V6_vgthf_xor_128B",
+                    "V6.vgtsf" => "__builtin_HEXAGON_V6_vgtsf",
+                    "V6.vgtsf.128B" => "__builtin_HEXAGON_V6_vgtsf_128B",
+                    "V6.vgtsf.and" => "__builtin_HEXAGON_V6_vgtsf_and",
+                    "V6.vgtsf.and.128B" => "__builtin_HEXAGON_V6_vgtsf_and_128B",
+                    "V6.vgtsf.or" => "__builtin_HEXAGON_V6_vgtsf_or",
+                    "V6.vgtsf.or.128B" => "__builtin_HEXAGON_V6_vgtsf_or_128B",
+                    "V6.vgtsf.xor" => "__builtin_HEXAGON_V6_vgtsf_xor",
+                    "V6.vgtsf.xor.128B" => "__builtin_HEXAGON_V6_vgtsf_xor_128B",
+                    "V6.vgtub" => "__builtin_HEXAGON_V6_vgtub",
+                    "V6.vgtub.128B" => "__builtin_HEXAGON_V6_vgtub_128B",
+                    "V6.vgtub.and" => "__builtin_HEXAGON_V6_vgtub_and",
+                    "V6.vgtub.and.128B" => "__builtin_HEXAGON_V6_vgtub_and_128B",
+                    "V6.vgtub.or" => "__builtin_HEXAGON_V6_vgtub_or",
+                    "V6.vgtub.or.128B" => "__builtin_HEXAGON_V6_vgtub_or_128B",
+                    "V6.vgtub.xor" => "__builtin_HEXAGON_V6_vgtub_xor",
+                    "V6.vgtub.xor.128B" => "__builtin_HEXAGON_V6_vgtub_xor_128B",
+                    "V6.vgtuh" => "__builtin_HEXAGON_V6_vgtuh",
+                    "V6.vgtuh.128B" => "__builtin_HEXAGON_V6_vgtuh_128B",
+                    "V6.vgtuh.and" => "__builtin_HEXAGON_V6_vgtuh_and",
+                    "V6.vgtuh.and.128B" => "__builtin_HEXAGON_V6_vgtuh_and_128B",
+                    "V6.vgtuh.or" => "__builtin_HEXAGON_V6_vgtuh_or",
+                    "V6.vgtuh.or.128B" => "__builtin_HEXAGON_V6_vgtuh_or_128B",
+                    "V6.vgtuh.xor" => "__builtin_HEXAGON_V6_vgtuh_xor",
+                    "V6.vgtuh.xor.128B" => "__builtin_HEXAGON_V6_vgtuh_xor_128B",
+                    "V6.vgtuw" => "__builtin_HEXAGON_V6_vgtuw",
+                    "V6.vgtuw.128B" => "__builtin_HEXAGON_V6_vgtuw_128B",
+                    "V6.vgtuw.and" => "__builtin_HEXAGON_V6_vgtuw_and",
+                    "V6.vgtuw.and.128B" => "__builtin_HEXAGON_V6_vgtuw_and_128B",
+                    "V6.vgtuw.or" => "__builtin_HEXAGON_V6_vgtuw_or",
+                    "V6.vgtuw.or.128B" => "__builtin_HEXAGON_V6_vgtuw_or_128B",
+                    "V6.vgtuw.xor" => "__builtin_HEXAGON_V6_vgtuw_xor",
+                    "V6.vgtuw.xor.128B" => "__builtin_HEXAGON_V6_vgtuw_xor_128B",
+                    "V6.vgtw" => "__builtin_HEXAGON_V6_vgtw",
+                    "V6.vgtw.128B" => "__builtin_HEXAGON_V6_vgtw_128B",
+                    "V6.vgtw.and" => "__builtin_HEXAGON_V6_vgtw_and",
+                    "V6.vgtw.and.128B" => "__builtin_HEXAGON_V6_vgtw_and_128B",
+                    "V6.vgtw.or" => "__builtin_HEXAGON_V6_vgtw_or",
+                    "V6.vgtw.or.128B" => "__builtin_HEXAGON_V6_vgtw_or_128B",
+                    "V6.vgtw.xor" => "__builtin_HEXAGON_V6_vgtw_xor",
+                    "V6.vgtw.xor.128B" => "__builtin_HEXAGON_V6_vgtw_xor_128B",
+                    "V6.vinsertwr" => "__builtin_HEXAGON_V6_vinsertwr",
+                    "V6.vinsertwr.128B" => "__builtin_HEXAGON_V6_vinsertwr_128B",
+                    "V6.vlalignb" => "__builtin_HEXAGON_V6_vlalignb",
+                    "V6.vlalignb.128B" => "__builtin_HEXAGON_V6_vlalignb_128B",
+                    "V6.vlalignbi" => "__builtin_HEXAGON_V6_vlalignbi",
+                    "V6.vlalignbi.128B" => "__builtin_HEXAGON_V6_vlalignbi_128B",
+                    "V6.vlsrb" => "__builtin_HEXAGON_V6_vlsrb",
+                    "V6.vlsrb.128B" => "__builtin_HEXAGON_V6_vlsrb_128B",
+                    "V6.vlsrh" => "__builtin_HEXAGON_V6_vlsrh",
+                    "V6.vlsrh.128B" => "__builtin_HEXAGON_V6_vlsrh_128B",
+                    "V6.vlsrhv" => "__builtin_HEXAGON_V6_vlsrhv",
+                    "V6.vlsrhv.128B" => "__builtin_HEXAGON_V6_vlsrhv_128B",
+                    "V6.vlsrw" => "__builtin_HEXAGON_V6_vlsrw",
+                    "V6.vlsrw.128B" => "__builtin_HEXAGON_V6_vlsrw_128B",
+                    "V6.vlsrwv" => "__builtin_HEXAGON_V6_vlsrwv",
+                    "V6.vlsrwv.128B" => "__builtin_HEXAGON_V6_vlsrwv_128B",
+                    "V6.vlut4" => "__builtin_HEXAGON_V6_vlut4",
+                    "V6.vlut4.128B" => "__builtin_HEXAGON_V6_vlut4_128B",
+                    "V6.vlutb" => "__builtin_HEXAGON_V6_vlutb",
+                    "V6.vlutb.128B" => "__builtin_HEXAGON_V6_vlutb_128B",
+                    "V6.vlutb.acc" => "__builtin_HEXAGON_V6_vlutb_acc",
+                    "V6.vlutb.acc.128B" => "__builtin_HEXAGON_V6_vlutb_acc_128B",
+                    "V6.vlutb.dv" => "__builtin_HEXAGON_V6_vlutb_dv",
+                    "V6.vlutb.dv.128B" => "__builtin_HEXAGON_V6_vlutb_dv_128B",
+                    "V6.vlutb.dv.acc" => "__builtin_HEXAGON_V6_vlutb_dv_acc",
+                    "V6.vlutb.dv.acc.128B" => "__builtin_HEXAGON_V6_vlutb_dv_acc_128B",
+                    "V6.vlutvvb" => "__builtin_HEXAGON_V6_vlutvvb",
+                    "V6.vlutvvb.128B" => "__builtin_HEXAGON_V6_vlutvvb_128B",
+                    "V6.vlutvvb.nm" => "__builtin_HEXAGON_V6_vlutvvb_nm",
+                    "V6.vlutvvb.nm.128B" => "__builtin_HEXAGON_V6_vlutvvb_nm_128B",
+                    "V6.vlutvvb.oracc" => "__builtin_HEXAGON_V6_vlutvvb_oracc",
+                    "V6.vlutvvb.oracc.128B" => "__builtin_HEXAGON_V6_vlutvvb_oracc_128B",
+                    "V6.vlutvvb.oracci" => "__builtin_HEXAGON_V6_vlutvvb_oracci",
+                    "V6.vlutvvb.oracci.128B" => "__builtin_HEXAGON_V6_vlutvvb_oracci_128B",
+                    "V6.vlutvvbi" => "__builtin_HEXAGON_V6_vlutvvbi",
+                    "V6.vlutvvbi.128B" => "__builtin_HEXAGON_V6_vlutvvbi_128B",
+                    "V6.vlutvwh" => "__builtin_HEXAGON_V6_vlutvwh",
+                    "V6.vlutvwh.128B" => "__builtin_HEXAGON_V6_vlutvwh_128B",
+                    "V6.vlutvwh.nm" => "__builtin_HEXAGON_V6_vlutvwh_nm",
+                    "V6.vlutvwh.nm.128B" => "__builtin_HEXAGON_V6_vlutvwh_nm_128B",
+                    "V6.vlutvwh.oracc" => "__builtin_HEXAGON_V6_vlutvwh_oracc",
+                    "V6.vlutvwh.oracc.128B" => "__builtin_HEXAGON_V6_vlutvwh_oracc_128B",
+                    "V6.vlutvwh.oracci" => "__builtin_HEXAGON_V6_vlutvwh_oracci",
+                    "V6.vlutvwh.oracci.128B" => "__builtin_HEXAGON_V6_vlutvwh_oracci_128B",
+                    "V6.vlutvwhi" => "__builtin_HEXAGON_V6_vlutvwhi",
+                    "V6.vlutvwhi.128B" => "__builtin_HEXAGON_V6_vlutvwhi_128B",
+                    "V6.vmax.bf" => "__builtin_HEXAGON_V6_vmax_bf",
+                    "V6.vmax.bf.128B" => "__builtin_HEXAGON_V6_vmax_bf_128B",
+                    "V6.vmax.hf" => "__builtin_HEXAGON_V6_vmax_hf",
+                    "V6.vmax.hf.128B" => "__builtin_HEXAGON_V6_vmax_hf_128B",
+                    "V6.vmax.sf" => "__builtin_HEXAGON_V6_vmax_sf",
+                    "V6.vmax.sf.128B" => "__builtin_HEXAGON_V6_vmax_sf_128B",
+                    "V6.vmaxb" => "__builtin_HEXAGON_V6_vmaxb",
+                    "V6.vmaxb.128B" => "__builtin_HEXAGON_V6_vmaxb_128B",
+                    "V6.vmaxh" => "__builtin_HEXAGON_V6_vmaxh",
+                    "V6.vmaxh.128B" => "__builtin_HEXAGON_V6_vmaxh_128B",
+                    "V6.vmaxub" => "__builtin_HEXAGON_V6_vmaxub",
+                    "V6.vmaxub.128B" => "__builtin_HEXAGON_V6_vmaxub_128B",
+                    "V6.vmaxuh" => "__builtin_HEXAGON_V6_vmaxuh",
+                    "V6.vmaxuh.128B" => "__builtin_HEXAGON_V6_vmaxuh_128B",
+                    "V6.vmaxw" => "__builtin_HEXAGON_V6_vmaxw",
+                    "V6.vmaxw.128B" => "__builtin_HEXAGON_V6_vmaxw_128B",
+                    "V6.vmerge.qf" => "__builtin_HEXAGON_V6_vmerge_qf",
+                    "V6.vmerge.qf.128B" => "__builtin_HEXAGON_V6_vmerge_qf_128B",
+                    "V6.vmin.bf" => "__builtin_HEXAGON_V6_vmin_bf",
+                    "V6.vmin.bf.128B" => "__builtin_HEXAGON_V6_vmin_bf_128B",
+                    "V6.vmin.hf" => "__builtin_HEXAGON_V6_vmin_hf",
+                    "V6.vmin.hf.128B" => "__builtin_HEXAGON_V6_vmin_hf_128B",
+                    "V6.vmin.sf" => "__builtin_HEXAGON_V6_vmin_sf",
+                    "V6.vmin.sf.128B" => "__builtin_HEXAGON_V6_vmin_sf_128B",
+                    "V6.vminb" => "__builtin_HEXAGON_V6_vminb",
+                    "V6.vminb.128B" => "__builtin_HEXAGON_V6_vminb_128B",
+                    "V6.vminh" => "__builtin_HEXAGON_V6_vminh",
+                    "V6.vminh.128B" => "__builtin_HEXAGON_V6_vminh_128B",
+                    "V6.vminub" => "__builtin_HEXAGON_V6_vminub",
+                    "V6.vminub.128B" => "__builtin_HEXAGON_V6_vminub_128B",
+                    "V6.vminuh" => "__builtin_HEXAGON_V6_vminuh",
+                    "V6.vminuh.128B" => "__builtin_HEXAGON_V6_vminuh_128B",
+                    "V6.vminw" => "__builtin_HEXAGON_V6_vminw",
+                    "V6.vminw.128B" => "__builtin_HEXAGON_V6_vminw_128B",
+                    "V6.vmpabus" => "__builtin_HEXAGON_V6_vmpabus",
+                    "V6.vmpabus.128B" => "__builtin_HEXAGON_V6_vmpabus_128B",
+                    "V6.vmpabus.acc" => "__builtin_HEXAGON_V6_vmpabus_acc",
+                    "V6.vmpabus.acc.128B" => "__builtin_HEXAGON_V6_vmpabus_acc_128B",
+                    "V6.vmpabusv" => "__builtin_HEXAGON_V6_vmpabusv",
+                    "V6.vmpabusv.128B" => "__builtin_HEXAGON_V6_vmpabusv_128B",
+                    "V6.vmpabuu" => "__builtin_HEXAGON_V6_vmpabuu",
+                    "V6.vmpabuu.128B" => "__builtin_HEXAGON_V6_vmpabuu_128B",
+                    "V6.vmpabuu.acc" => "__builtin_HEXAGON_V6_vmpabuu_acc",
+                    "V6.vmpabuu.acc.128B" => "__builtin_HEXAGON_V6_vmpabuu_acc_128B",
+                    "V6.vmpabuuv" => "__builtin_HEXAGON_V6_vmpabuuv",
+                    "V6.vmpabuuv.128B" => "__builtin_HEXAGON_V6_vmpabuuv_128B",
+                    "V6.vmpahb" => "__builtin_HEXAGON_V6_vmpahb",
+                    "V6.vmpahb.128B" => "__builtin_HEXAGON_V6_vmpahb_128B",
+                    "V6.vmpahb.acc" => "__builtin_HEXAGON_V6_vmpahb_acc",
+                    "V6.vmpahb.acc.128B" => "__builtin_HEXAGON_V6_vmpahb_acc_128B",
+                    "V6.vmpahhsat" => "__builtin_HEXAGON_V6_vmpahhsat",
+                    "V6.vmpahhsat.128B" => "__builtin_HEXAGON_V6_vmpahhsat_128B",
+                    "V6.vmpauhb" => "__builtin_HEXAGON_V6_vmpauhb",
+                    "V6.vmpauhb.128B" => "__builtin_HEXAGON_V6_vmpauhb_128B",
+                    "V6.vmpauhb.acc" => "__builtin_HEXAGON_V6_vmpauhb_acc",
+                    "V6.vmpauhb.acc.128B" => "__builtin_HEXAGON_V6_vmpauhb_acc_128B",
+                    "V6.vmpauhuhsat" => "__builtin_HEXAGON_V6_vmpauhuhsat",
+                    "V6.vmpauhuhsat.128B" => "__builtin_HEXAGON_V6_vmpauhuhsat_128B",
+                    "V6.vmpsuhuhsat" => "__builtin_HEXAGON_V6_vmpsuhuhsat",
+                    "V6.vmpsuhuhsat.128B" => "__builtin_HEXAGON_V6_vmpsuhuhsat_128B",
+                    "V6.vmpy.hf.f8" => "__builtin_HEXAGON_V6_vmpy_hf_f8",
+                    "V6.vmpy.hf.f8.128B" => "__builtin_HEXAGON_V6_vmpy_hf_f8_128B",
+                    "V6.vmpy.hf.f8.acc" => "__builtin_HEXAGON_V6_vmpy_hf_f8_acc",
+                    "V6.vmpy.hf.f8.acc.128B" => "__builtin_HEXAGON_V6_vmpy_hf_f8_acc_128B",
+                    "V6.vmpy.hf.hf" => "__builtin_HEXAGON_V6_vmpy_hf_hf",
+                    "V6.vmpy.hf.hf.128B" => "__builtin_HEXAGON_V6_vmpy_hf_hf_128B",
+                    "V6.vmpy.hf.hf.acc" => "__builtin_HEXAGON_V6_vmpy_hf_hf_acc",
+                    "V6.vmpy.hf.hf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_hf_hf_acc_128B",
+                    "V6.vmpy.qf16" => "__builtin_HEXAGON_V6_vmpy_qf16",
+                    "V6.vmpy.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_128B",
+                    "V6.vmpy.qf16.hf" => "__builtin_HEXAGON_V6_vmpy_qf16_hf",
+                    "V6.vmpy.qf16.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_hf_128B",
+                    "V6.vmpy.qf16.mix.hf" => "__builtin_HEXAGON_V6_vmpy_qf16_mix_hf",
+                    "V6.vmpy.qf16.mix.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_mix_hf_128B",
+                    "V6.vmpy.qf32" => "__builtin_HEXAGON_V6_vmpy_qf32",
+                    "V6.vmpy.qf32.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_128B",
+                    "V6.vmpy.qf32.hf" => "__builtin_HEXAGON_V6_vmpy_qf32_hf",
+                    "V6.vmpy.qf32.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_hf_128B",
+                    "V6.vmpy.qf32.mix.hf" => "__builtin_HEXAGON_V6_vmpy_qf32_mix_hf",
+                    "V6.vmpy.qf32.mix.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_mix_hf_128B",
+                    "V6.vmpy.qf32.qf16" => "__builtin_HEXAGON_V6_vmpy_qf32_qf16",
+                    "V6.vmpy.qf32.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_qf16_128B",
+                    "V6.vmpy.qf32.sf" => "__builtin_HEXAGON_V6_vmpy_qf32_sf",
+                    "V6.vmpy.qf32.sf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_sf_128B",
+                    "V6.vmpy.rt.hf" => "__builtin_HEXAGON_V6_vmpy_rt_hf",
+                    "V6.vmpy.rt.hf.128B" => "__builtin_HEXAGON_V6_vmpy_rt_hf_128B",
+                    "V6.vmpy.rt.qf16" => "__builtin_HEXAGON_V6_vmpy_rt_qf16",
+                    "V6.vmpy.rt.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_rt_qf16_128B",
+                    "V6.vmpy.rt.sf" => "__builtin_HEXAGON_V6_vmpy_rt_sf",
+                    "V6.vmpy.rt.sf.128B" => "__builtin_HEXAGON_V6_vmpy_rt_sf_128B",
+                    "V6.vmpy.sf.bf" => "__builtin_HEXAGON_V6_vmpy_sf_bf",
+                    "V6.vmpy.sf.bf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_bf_128B",
+                    "V6.vmpy.sf.bf.acc" => "__builtin_HEXAGON_V6_vmpy_sf_bf_acc",
+                    "V6.vmpy.sf.bf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_sf_bf_acc_128B",
+                    "V6.vmpy.sf.hf" => "__builtin_HEXAGON_V6_vmpy_sf_hf",
+                    "V6.vmpy.sf.hf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_hf_128B",
+                    "V6.vmpy.sf.hf.acc" => "__builtin_HEXAGON_V6_vmpy_sf_hf_acc",
+                    "V6.vmpy.sf.hf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_sf_hf_acc_128B",
+                    "V6.vmpy.sf.sf" => "__builtin_HEXAGON_V6_vmpy_sf_sf",
+                    "V6.vmpy.sf.sf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_sf_128B",
+                    "V6.vmpybus" => "__builtin_HEXAGON_V6_vmpybus",
+                    "V6.vmpybus.128B" => "__builtin_HEXAGON_V6_vmpybus_128B",
+                    "V6.vmpybus.acc" => "__builtin_HEXAGON_V6_vmpybus_acc",
+                    "V6.vmpybus.acc.128B" => "__builtin_HEXAGON_V6_vmpybus_acc_128B",
+                    "V6.vmpybusv" => "__builtin_HEXAGON_V6_vmpybusv",
+                    "V6.vmpybusv.128B" => "__builtin_HEXAGON_V6_vmpybusv_128B",
+                    "V6.vmpybusv.acc" => "__builtin_HEXAGON_V6_vmpybusv_acc",
+                    "V6.vmpybusv.acc.128B" => "__builtin_HEXAGON_V6_vmpybusv_acc_128B",
+                    "V6.vmpybv" => "__builtin_HEXAGON_V6_vmpybv",
+                    "V6.vmpybv.128B" => "__builtin_HEXAGON_V6_vmpybv_128B",
+                    "V6.vmpybv.acc" => "__builtin_HEXAGON_V6_vmpybv_acc",
+                    "V6.vmpybv.acc.128B" => "__builtin_HEXAGON_V6_vmpybv_acc_128B",
+                    "V6.vmpyewuh" => "__builtin_HEXAGON_V6_vmpyewuh",
+                    "V6.vmpyewuh.128B" => "__builtin_HEXAGON_V6_vmpyewuh_128B",
+                    "V6.vmpyewuh.64" => "__builtin_HEXAGON_V6_vmpyewuh_64",
+                    "V6.vmpyewuh.64.128B" => "__builtin_HEXAGON_V6_vmpyewuh_64_128B",
+                    "V6.vmpyh" => "__builtin_HEXAGON_V6_vmpyh",
+                    "V6.vmpyh.128B" => "__builtin_HEXAGON_V6_vmpyh_128B",
+                    "V6.vmpyh.acc" => "__builtin_HEXAGON_V6_vmpyh_acc",
+                    "V6.vmpyh.acc.128B" => "__builtin_HEXAGON_V6_vmpyh_acc_128B",
+                    "V6.vmpyhsat.acc" => "__builtin_HEXAGON_V6_vmpyhsat_acc",
+                    "V6.vmpyhsat.acc.128B" => "__builtin_HEXAGON_V6_vmpyhsat_acc_128B",
+                    "V6.vmpyhsrs" => "__builtin_HEXAGON_V6_vmpyhsrs",
+                    "V6.vmpyhsrs.128B" => "__builtin_HEXAGON_V6_vmpyhsrs_128B",
+                    "V6.vmpyhss" => "__builtin_HEXAGON_V6_vmpyhss",
+                    "V6.vmpyhss.128B" => "__builtin_HEXAGON_V6_vmpyhss_128B",
+                    "V6.vmpyhus" => "__builtin_HEXAGON_V6_vmpyhus",
+                    "V6.vmpyhus.128B" => "__builtin_HEXAGON_V6_vmpyhus_128B",
+                    "V6.vmpyhus.acc" => "__builtin_HEXAGON_V6_vmpyhus_acc",
+                    "V6.vmpyhus.acc.128B" => "__builtin_HEXAGON_V6_vmpyhus_acc_128B",
+                    "V6.vmpyhv" => "__builtin_HEXAGON_V6_vmpyhv",
+                    "V6.vmpyhv.128B" => "__builtin_HEXAGON_V6_vmpyhv_128B",
+                    "V6.vmpyhv.acc" => "__builtin_HEXAGON_V6_vmpyhv_acc",
+                    "V6.vmpyhv.acc.128B" => "__builtin_HEXAGON_V6_vmpyhv_acc_128B",
+                    "V6.vmpyhvsrs" => "__builtin_HEXAGON_V6_vmpyhvsrs",
+                    "V6.vmpyhvsrs.128B" => "__builtin_HEXAGON_V6_vmpyhvsrs_128B",
+                    "V6.vmpyieoh" => "__builtin_HEXAGON_V6_vmpyieoh",
+                    "V6.vmpyieoh.128B" => "__builtin_HEXAGON_V6_vmpyieoh_128B",
+                    "V6.vmpyiewh.acc" => "__builtin_HEXAGON_V6_vmpyiewh_acc",
+                    "V6.vmpyiewh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiewh_acc_128B",
+                    "V6.vmpyiewuh" => "__builtin_HEXAGON_V6_vmpyiewuh",
+                    "V6.vmpyiewuh.128B" => "__builtin_HEXAGON_V6_vmpyiewuh_128B",
+                    "V6.vmpyiewuh.acc" => "__builtin_HEXAGON_V6_vmpyiewuh_acc",
+                    "V6.vmpyiewuh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiewuh_acc_128B",
+                    "V6.vmpyih" => "__builtin_HEXAGON_V6_vmpyih",
+                    "V6.vmpyih.128B" => "__builtin_HEXAGON_V6_vmpyih_128B",
+                    "V6.vmpyih.acc" => "__builtin_HEXAGON_V6_vmpyih_acc",
+                    "V6.vmpyih.acc.128B" => "__builtin_HEXAGON_V6_vmpyih_acc_128B",
+                    "V6.vmpyihb" => "__builtin_HEXAGON_V6_vmpyihb",
+                    "V6.vmpyihb.128B" => "__builtin_HEXAGON_V6_vmpyihb_128B",
+                    "V6.vmpyihb.acc" => "__builtin_HEXAGON_V6_vmpyihb_acc",
+                    "V6.vmpyihb.acc.128B" => "__builtin_HEXAGON_V6_vmpyihb_acc_128B",
+                    "V6.vmpyiowh" => "__builtin_HEXAGON_V6_vmpyiowh",
+                    "V6.vmpyiowh.128B" => "__builtin_HEXAGON_V6_vmpyiowh_128B",
+                    "V6.vmpyiwb" => "__builtin_HEXAGON_V6_vmpyiwb",
+                    "V6.vmpyiwb.128B" => "__builtin_HEXAGON_V6_vmpyiwb_128B",
+                    "V6.vmpyiwb.acc" => "__builtin_HEXAGON_V6_vmpyiwb_acc",
+                    "V6.vmpyiwb.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwb_acc_128B",
+                    "V6.vmpyiwh" => "__builtin_HEXAGON_V6_vmpyiwh",
+                    "V6.vmpyiwh.128B" => "__builtin_HEXAGON_V6_vmpyiwh_128B",
+                    "V6.vmpyiwh.acc" => "__builtin_HEXAGON_V6_vmpyiwh_acc",
+                    "V6.vmpyiwh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwh_acc_128B",
+                    "V6.vmpyiwub" => "__builtin_HEXAGON_V6_vmpyiwub",
+                    "V6.vmpyiwub.128B" => "__builtin_HEXAGON_V6_vmpyiwub_128B",
+                    "V6.vmpyiwub.acc" => "__builtin_HEXAGON_V6_vmpyiwub_acc",
+                    "V6.vmpyiwub.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwub_acc_128B",
+                    "V6.vmpyowh" => "__builtin_HEXAGON_V6_vmpyowh",
+                    "V6.vmpyowh.128B" => "__builtin_HEXAGON_V6_vmpyowh_128B",
+                    "V6.vmpyowh.64.acc" => "__builtin_HEXAGON_V6_vmpyowh_64_acc",
+                    "V6.vmpyowh.64.acc.128B" => "__builtin_HEXAGON_V6_vmpyowh_64_acc_128B",
+                    "V6.vmpyowh.rnd" => "__builtin_HEXAGON_V6_vmpyowh_rnd",
+                    "V6.vmpyowh.rnd.128B" => "__builtin_HEXAGON_V6_vmpyowh_rnd_128B",
+                    "V6.vmpyowh.rnd.sacc" => "__builtin_HEXAGON_V6_vmpyowh_rnd_sacc",
+                    "V6.vmpyowh.rnd.sacc.128B" => "__builtin_HEXAGON_V6_vmpyowh_rnd_sacc_128B",
+                    "V6.vmpyowh.sacc" => "__builtin_HEXAGON_V6_vmpyowh_sacc",
+                    "V6.vmpyowh.sacc.128B" => "__builtin_HEXAGON_V6_vmpyowh_sacc_128B",
+                    "V6.vmpyub" => "__builtin_HEXAGON_V6_vmpyub",
+                    "V6.vmpyub.128B" => "__builtin_HEXAGON_V6_vmpyub_128B",
+                    "V6.vmpyub.acc" => "__builtin_HEXAGON_V6_vmpyub_acc",
+                    "V6.vmpyub.acc.128B" => "__builtin_HEXAGON_V6_vmpyub_acc_128B",
+                    "V6.vmpyubv" => "__builtin_HEXAGON_V6_vmpyubv",
+                    "V6.vmpyubv.128B" => "__builtin_HEXAGON_V6_vmpyubv_128B",
+                    "V6.vmpyubv.acc" => "__builtin_HEXAGON_V6_vmpyubv_acc",
+                    "V6.vmpyubv.acc.128B" => "__builtin_HEXAGON_V6_vmpyubv_acc_128B",
+                    "V6.vmpyuh" => "__builtin_HEXAGON_V6_vmpyuh",
+                    "V6.vmpyuh.128B" => "__builtin_HEXAGON_V6_vmpyuh_128B",
+                    "V6.vmpyuh.acc" => "__builtin_HEXAGON_V6_vmpyuh_acc",
+                    "V6.vmpyuh.acc.128B" => "__builtin_HEXAGON_V6_vmpyuh_acc_128B",
+                    "V6.vmpyuhe" => "__builtin_HEXAGON_V6_vmpyuhe",
+                    "V6.vmpyuhe.128B" => "__builtin_HEXAGON_V6_vmpyuhe_128B",
+                    "V6.vmpyuhe.acc" => "__builtin_HEXAGON_V6_vmpyuhe_acc",
+                    "V6.vmpyuhe.acc.128B" => "__builtin_HEXAGON_V6_vmpyuhe_acc_128B",
+                    "V6.vmpyuhv" => "__builtin_HEXAGON_V6_vmpyuhv",
+                    "V6.vmpyuhv.128B" => "__builtin_HEXAGON_V6_vmpyuhv_128B",
+                    "V6.vmpyuhv.acc" => "__builtin_HEXAGON_V6_vmpyuhv_acc",
+                    "V6.vmpyuhv.acc.128B" => "__builtin_HEXAGON_V6_vmpyuhv_acc_128B",
+                    "V6.vmpyuhvs" => "__builtin_HEXAGON_V6_vmpyuhvs",
+                    "V6.vmpyuhvs.128B" => "__builtin_HEXAGON_V6_vmpyuhvs_128B",
+                    "V6.vmux" => "__builtin_HEXAGON_V6_vmux",
+                    "V6.vmux.128B" => "__builtin_HEXAGON_V6_vmux_128B",
+                    "V6.vnavgb" => "__builtin_HEXAGON_V6_vnavgb",
+                    "V6.vnavgb.128B" => "__builtin_HEXAGON_V6_vnavgb_128B",
+                    "V6.vnavgh" => "__builtin_HEXAGON_V6_vnavgh",
+                    "V6.vnavgh.128B" => "__builtin_HEXAGON_V6_vnavgh_128B",
+                    "V6.vnavgub" => "__builtin_HEXAGON_V6_vnavgub",
+                    "V6.vnavgub.128B" => "__builtin_HEXAGON_V6_vnavgub_128B",
+                    "V6.vnavgw" => "__builtin_HEXAGON_V6_vnavgw",
+                    "V6.vnavgw.128B" => "__builtin_HEXAGON_V6_vnavgw_128B",
+                    "V6.vnormamth" => "__builtin_HEXAGON_V6_vnormamth",
+                    "V6.vnormamth.128B" => "__builtin_HEXAGON_V6_vnormamth_128B",
+                    "V6.vnormamtw" => "__builtin_HEXAGON_V6_vnormamtw",
+                    "V6.vnormamtw.128B" => "__builtin_HEXAGON_V6_vnormamtw_128B",
+                    "V6.vnot" => "__builtin_HEXAGON_V6_vnot",
+                    "V6.vnot.128B" => "__builtin_HEXAGON_V6_vnot_128B",
+                    "V6.vor" => "__builtin_HEXAGON_V6_vor",
+                    "V6.vor.128B" => "__builtin_HEXAGON_V6_vor_128B",
+                    "V6.vpackeb" => "__builtin_HEXAGON_V6_vpackeb",
+                    "V6.vpackeb.128B" => "__builtin_HEXAGON_V6_vpackeb_128B",
+                    "V6.vpackeh" => "__builtin_HEXAGON_V6_vpackeh",
+                    "V6.vpackeh.128B" => "__builtin_HEXAGON_V6_vpackeh_128B",
+                    "V6.vpackhb.sat" => "__builtin_HEXAGON_V6_vpackhb_sat",
+                    "V6.vpackhb.sat.128B" => "__builtin_HEXAGON_V6_vpackhb_sat_128B",
+                    "V6.vpackhub.sat" => "__builtin_HEXAGON_V6_vpackhub_sat",
+                    "V6.vpackhub.sat.128B" => "__builtin_HEXAGON_V6_vpackhub_sat_128B",
+                    "V6.vpackob" => "__builtin_HEXAGON_V6_vpackob",
+                    "V6.vpackob.128B" => "__builtin_HEXAGON_V6_vpackob_128B",
+                    "V6.vpackoh" => "__builtin_HEXAGON_V6_vpackoh",
+                    "V6.vpackoh.128B" => "__builtin_HEXAGON_V6_vpackoh_128B",
+                    "V6.vpackwh.sat" => "__builtin_HEXAGON_V6_vpackwh_sat",
+                    "V6.vpackwh.sat.128B" => "__builtin_HEXAGON_V6_vpackwh_sat_128B",
+                    "V6.vpackwuh.sat" => "__builtin_HEXAGON_V6_vpackwuh_sat",
+                    "V6.vpackwuh.sat.128B" => "__builtin_HEXAGON_V6_vpackwuh_sat_128B",
+                    "V6.vpopcounth" => "__builtin_HEXAGON_V6_vpopcounth",
+                    "V6.vpopcounth.128B" => "__builtin_HEXAGON_V6_vpopcounth_128B",
+                    "V6.vprefixqb" => "__builtin_HEXAGON_V6_vprefixqb",
+                    "V6.vprefixqb.128B" => "__builtin_HEXAGON_V6_vprefixqb_128B",
+                    "V6.vprefixqh" => "__builtin_HEXAGON_V6_vprefixqh",
+                    "V6.vprefixqh.128B" => "__builtin_HEXAGON_V6_vprefixqh_128B",
+                    "V6.vprefixqw" => "__builtin_HEXAGON_V6_vprefixqw",
+                    "V6.vprefixqw.128B" => "__builtin_HEXAGON_V6_vprefixqw_128B",
+                    "V6.vrdelta" => "__builtin_HEXAGON_V6_vrdelta",
+                    "V6.vrdelta.128B" => "__builtin_HEXAGON_V6_vrdelta_128B",
+                    "V6.vrmpybub.rtt" => "__builtin_HEXAGON_V6_vrmpybub_rtt",
+                    "V6.vrmpybub.rtt.128B" => "__builtin_HEXAGON_V6_vrmpybub_rtt_128B",
+                    "V6.vrmpybub.rtt.acc" => "__builtin_HEXAGON_V6_vrmpybub_rtt_acc",
+                    "V6.vrmpybub.rtt.acc.128B" => "__builtin_HEXAGON_V6_vrmpybub_rtt_acc_128B",
+                    "V6.vrmpybus" => "__builtin_HEXAGON_V6_vrmpybus",
+                    "V6.vrmpybus.128B" => "__builtin_HEXAGON_V6_vrmpybus_128B",
+                    "V6.vrmpybus.acc" => "__builtin_HEXAGON_V6_vrmpybus_acc",
+                    "V6.vrmpybus.acc.128B" => "__builtin_HEXAGON_V6_vrmpybus_acc_128B",
+                    "V6.vrmpybusi" => "__builtin_HEXAGON_V6_vrmpybusi",
+                    "V6.vrmpybusi.128B" => "__builtin_HEXAGON_V6_vrmpybusi_128B",
+                    "V6.vrmpybusi.acc" => "__builtin_HEXAGON_V6_vrmpybusi_acc",
+                    "V6.vrmpybusi.acc.128B" => "__builtin_HEXAGON_V6_vrmpybusi_acc_128B",
+                    "V6.vrmpybusv" => "__builtin_HEXAGON_V6_vrmpybusv",
+                    "V6.vrmpybusv.128B" => "__builtin_HEXAGON_V6_vrmpybusv_128B",
+                    "V6.vrmpybusv.acc" => "__builtin_HEXAGON_V6_vrmpybusv_acc",
+                    "V6.vrmpybusv.acc.128B" => "__builtin_HEXAGON_V6_vrmpybusv_acc_128B",
+                    "V6.vrmpybv" => "__builtin_HEXAGON_V6_vrmpybv",
+                    "V6.vrmpybv.128B" => "__builtin_HEXAGON_V6_vrmpybv_128B",
+                    "V6.vrmpybv.acc" => "__builtin_HEXAGON_V6_vrmpybv_acc",
+                    "V6.vrmpybv.acc.128B" => "__builtin_HEXAGON_V6_vrmpybv_acc_128B",
+                    "V6.vrmpyub" => "__builtin_HEXAGON_V6_vrmpyub",
+                    "V6.vrmpyub.128B" => "__builtin_HEXAGON_V6_vrmpyub_128B",
+                    "V6.vrmpyub.acc" => "__builtin_HEXAGON_V6_vrmpyub_acc",
+                    "V6.vrmpyub.acc.128B" => "__builtin_HEXAGON_V6_vrmpyub_acc_128B",
+                    "V6.vrmpyub.rtt" => "__builtin_HEXAGON_V6_vrmpyub_rtt",
+                    "V6.vrmpyub.rtt.128B" => "__builtin_HEXAGON_V6_vrmpyub_rtt_128B",
+                    "V6.vrmpyub.rtt.acc" => "__builtin_HEXAGON_V6_vrmpyub_rtt_acc",
+                    "V6.vrmpyub.rtt.acc.128B" => "__builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B",
+                    "V6.vrmpyubi" => "__builtin_HEXAGON_V6_vrmpyubi",
+                    "V6.vrmpyubi.128B" => "__builtin_HEXAGON_V6_vrmpyubi_128B",
+                    "V6.vrmpyubi.acc" => "__builtin_HEXAGON_V6_vrmpyubi_acc",
+                    "V6.vrmpyubi.acc.128B" => "__builtin_HEXAGON_V6_vrmpyubi_acc_128B",
+                    "V6.vrmpyubv" => "__builtin_HEXAGON_V6_vrmpyubv",
+                    "V6.vrmpyubv.128B" => "__builtin_HEXAGON_V6_vrmpyubv_128B",
+                    "V6.vrmpyubv.acc" => "__builtin_HEXAGON_V6_vrmpyubv_acc",
+                    "V6.vrmpyubv.acc.128B" => "__builtin_HEXAGON_V6_vrmpyubv_acc_128B",
+                    "V6.vror" => "__builtin_HEXAGON_V6_vror",
+                    "V6.vror.128B" => "__builtin_HEXAGON_V6_vror_128B",
+                    "V6.vrotr" => "__builtin_HEXAGON_V6_vrotr",
+                    "V6.vrotr.128B" => "__builtin_HEXAGON_V6_vrotr_128B",
+                    "V6.vroundhb" => "__builtin_HEXAGON_V6_vroundhb",
+                    "V6.vroundhb.128B" => "__builtin_HEXAGON_V6_vroundhb_128B",
+                    "V6.vroundhub" => "__builtin_HEXAGON_V6_vroundhub",
+                    "V6.vroundhub.128B" => "__builtin_HEXAGON_V6_vroundhub_128B",
+                    "V6.vrounduhub" => "__builtin_HEXAGON_V6_vrounduhub",
+                    "V6.vrounduhub.128B" => "__builtin_HEXAGON_V6_vrounduhub_128B",
+                    "V6.vrounduwuh" => "__builtin_HEXAGON_V6_vrounduwuh",
+                    "V6.vrounduwuh.128B" => "__builtin_HEXAGON_V6_vrounduwuh_128B",
+                    "V6.vroundwh" => "__builtin_HEXAGON_V6_vroundwh",
+                    "V6.vroundwh.128B" => "__builtin_HEXAGON_V6_vroundwh_128B",
+                    "V6.vroundwuh" => "__builtin_HEXAGON_V6_vroundwuh",
+                    "V6.vroundwuh.128B" => "__builtin_HEXAGON_V6_vroundwuh_128B",
+                    "V6.vrsadubi" => "__builtin_HEXAGON_V6_vrsadubi",
+                    "V6.vrsadubi.128B" => "__builtin_HEXAGON_V6_vrsadubi_128B",
+                    "V6.vrsadubi.acc" => "__builtin_HEXAGON_V6_vrsadubi_acc",
+                    "V6.vrsadubi.acc.128B" => "__builtin_HEXAGON_V6_vrsadubi_acc_128B",
+                    "V6.vsatdw" => "__builtin_HEXAGON_V6_vsatdw",
+                    "V6.vsatdw.128B" => "__builtin_HEXAGON_V6_vsatdw_128B",
+                    "V6.vsathub" => "__builtin_HEXAGON_V6_vsathub",
+                    "V6.vsathub.128B" => "__builtin_HEXAGON_V6_vsathub_128B",
+                    "V6.vsatuwuh" => "__builtin_HEXAGON_V6_vsatuwuh",
+                    "V6.vsatuwuh.128B" => "__builtin_HEXAGON_V6_vsatuwuh_128B",
+                    "V6.vsatwh" => "__builtin_HEXAGON_V6_vsatwh",
+                    "V6.vsatwh.128B" => "__builtin_HEXAGON_V6_vsatwh_128B",
+                    "V6.vsb" => "__builtin_HEXAGON_V6_vsb",
+                    "V6.vsb.128B" => "__builtin_HEXAGON_V6_vsb_128B",
+                    "V6.vscattermh" => "__builtin_HEXAGON_V6_vscattermh",
+                    "V6.vscattermh.128B" => "__builtin_HEXAGON_V6_vscattermh_128B",
+                    "V6.vscattermh.add" => "__builtin_HEXAGON_V6_vscattermh_add",
+                    "V6.vscattermh.add.128B" => "__builtin_HEXAGON_V6_vscattermh_add_128B",
+                    "V6.vscattermhq" => "__builtin_HEXAGON_V6_vscattermhq",
+                    "V6.vscattermhq.128B" => "__builtin_HEXAGON_V6_vscattermhq_128B",
+                    "V6.vscattermhw" => "__builtin_HEXAGON_V6_vscattermhw",
+                    "V6.vscattermhw.128B" => "__builtin_HEXAGON_V6_vscattermhw_128B",
+                    "V6.vscattermhw.add" => "__builtin_HEXAGON_V6_vscattermhw_add",
+                    "V6.vscattermhw.add.128B" => "__builtin_HEXAGON_V6_vscattermhw_add_128B",
+                    "V6.vscattermhwq" => "__builtin_HEXAGON_V6_vscattermhwq",
+                    "V6.vscattermhwq.128B" => "__builtin_HEXAGON_V6_vscattermhwq_128B",
+                    "V6.vscattermw" => "__builtin_HEXAGON_V6_vscattermw",
+                    "V6.vscattermw.128B" => "__builtin_HEXAGON_V6_vscattermw_128B",
+                    "V6.vscattermw.add" => "__builtin_HEXAGON_V6_vscattermw_add",
+                    "V6.vscattermw.add.128B" => "__builtin_HEXAGON_V6_vscattermw_add_128B",
+                    "V6.vscattermwq" => "__builtin_HEXAGON_V6_vscattermwq",
+                    "V6.vscattermwq.128B" => "__builtin_HEXAGON_V6_vscattermwq_128B",
+                    "V6.vsh" => "__builtin_HEXAGON_V6_vsh",
+                    "V6.vsh.128B" => "__builtin_HEXAGON_V6_vsh_128B",
+                    "V6.vshufeh" => "__builtin_HEXAGON_V6_vshufeh",
+                    "V6.vshufeh.128B" => "__builtin_HEXAGON_V6_vshufeh_128B",
+                    "V6.vshuffb" => "__builtin_HEXAGON_V6_vshuffb",
+                    "V6.vshuffb.128B" => "__builtin_HEXAGON_V6_vshuffb_128B",
+                    "V6.vshuffeb" => "__builtin_HEXAGON_V6_vshuffeb",
+                    "V6.vshuffeb.128B" => "__builtin_HEXAGON_V6_vshuffeb_128B",
+                    "V6.vshuffh" => "__builtin_HEXAGON_V6_vshuffh",
+                    "V6.vshuffh.128B" => "__builtin_HEXAGON_V6_vshuffh_128B",
+                    "V6.vshuffob" => "__builtin_HEXAGON_V6_vshuffob",
+                    "V6.vshuffob.128B" => "__builtin_HEXAGON_V6_vshuffob_128B",
+                    "V6.vshuffvdd" => "__builtin_HEXAGON_V6_vshuffvdd",
+                    "V6.vshuffvdd.128B" => "__builtin_HEXAGON_V6_vshuffvdd_128B",
+                    "V6.vshufoeb" => "__builtin_HEXAGON_V6_vshufoeb",
+                    "V6.vshufoeb.128B" => "__builtin_HEXAGON_V6_vshufoeb_128B",
+                    "V6.vshufoeh" => "__builtin_HEXAGON_V6_vshufoeh",
+                    "V6.vshufoeh.128B" => "__builtin_HEXAGON_V6_vshufoeh_128B",
+                    "V6.vshufoh" => "__builtin_HEXAGON_V6_vshufoh",
+                    "V6.vshufoh.128B" => "__builtin_HEXAGON_V6_vshufoh_128B",
+                    "V6.vsub.hf" => "__builtin_HEXAGON_V6_vsub_hf",
+                    "V6.vsub.hf.128B" => "__builtin_HEXAGON_V6_vsub_hf_128B",
+                    "V6.vsub.hf.f8" => "__builtin_HEXAGON_V6_vsub_hf_f8",
+                    "V6.vsub.hf.f8.128B" => "__builtin_HEXAGON_V6_vsub_hf_f8_128B",
+                    "V6.vsub.hf.hf" => "__builtin_HEXAGON_V6_vsub_hf_hf",
+                    "V6.vsub.hf.hf.128B" => "__builtin_HEXAGON_V6_vsub_hf_hf_128B",
+                    "V6.vsub.qf16" => "__builtin_HEXAGON_V6_vsub_qf16",
+                    "V6.vsub.qf16.128B" => "__builtin_HEXAGON_V6_vsub_qf16_128B",
+                    "V6.vsub.qf16.mix" => "__builtin_HEXAGON_V6_vsub_qf16_mix",
+                    "V6.vsub.qf16.mix.128B" => "__builtin_HEXAGON_V6_vsub_qf16_mix_128B",
+                    "V6.vsub.qf32" => "__builtin_HEXAGON_V6_vsub_qf32",
+                    "V6.vsub.qf32.128B" => "__builtin_HEXAGON_V6_vsub_qf32_128B",
+                    "V6.vsub.qf32.mix" => "__builtin_HEXAGON_V6_vsub_qf32_mix",
+                    "V6.vsub.qf32.mix.128B" => "__builtin_HEXAGON_V6_vsub_qf32_mix_128B",
+                    "V6.vsub.sf" => "__builtin_HEXAGON_V6_vsub_sf",
+                    "V6.vsub.sf.128B" => "__builtin_HEXAGON_V6_vsub_sf_128B",
+                    "V6.vsub.sf.bf" => "__builtin_HEXAGON_V6_vsub_sf_bf",
+                    "V6.vsub.sf.bf.128B" => "__builtin_HEXAGON_V6_vsub_sf_bf_128B",
+                    "V6.vsub.sf.hf" => "__builtin_HEXAGON_V6_vsub_sf_hf",
+                    "V6.vsub.sf.hf.128B" => "__builtin_HEXAGON_V6_vsub_sf_hf_128B",
+                    "V6.vsub.sf.sf" => "__builtin_HEXAGON_V6_vsub_sf_sf",
+                    "V6.vsub.sf.sf.128B" => "__builtin_HEXAGON_V6_vsub_sf_sf_128B",
+                    "V6.vsubb" => "__builtin_HEXAGON_V6_vsubb",
+                    "V6.vsubb.128B" => "__builtin_HEXAGON_V6_vsubb_128B",
+                    "V6.vsubb.dv" => "__builtin_HEXAGON_V6_vsubb_dv",
+                    "V6.vsubb.dv.128B" => "__builtin_HEXAGON_V6_vsubb_dv_128B",
+                    "V6.vsubbnq" => "__builtin_HEXAGON_V6_vsubbnq",
+                    "V6.vsubbnq.128B" => "__builtin_HEXAGON_V6_vsubbnq_128B",
+                    "V6.vsubbq" => "__builtin_HEXAGON_V6_vsubbq",
+                    "V6.vsubbq.128B" => "__builtin_HEXAGON_V6_vsubbq_128B",
+                    "V6.vsubbsat" => "__builtin_HEXAGON_V6_vsubbsat",
+                    "V6.vsubbsat.128B" => "__builtin_HEXAGON_V6_vsubbsat_128B",
+                    "V6.vsubbsat.dv" => "__builtin_HEXAGON_V6_vsubbsat_dv",
+                    "V6.vsubbsat.dv.128B" => "__builtin_HEXAGON_V6_vsubbsat_dv_128B",
+                    "V6.vsubh" => "__builtin_HEXAGON_V6_vsubh",
+                    "V6.vsubh.128B" => "__builtin_HEXAGON_V6_vsubh_128B",
+                    "V6.vsubh.dv" => "__builtin_HEXAGON_V6_vsubh_dv",
+                    "V6.vsubh.dv.128B" => "__builtin_HEXAGON_V6_vsubh_dv_128B",
+                    "V6.vsubhnq" => "__builtin_HEXAGON_V6_vsubhnq",
+                    "V6.vsubhnq.128B" => "__builtin_HEXAGON_V6_vsubhnq_128B",
+                    "V6.vsubhq" => "__builtin_HEXAGON_V6_vsubhq",
+                    "V6.vsubhq.128B" => "__builtin_HEXAGON_V6_vsubhq_128B",
+                    "V6.vsubhsat" => "__builtin_HEXAGON_V6_vsubhsat",
+                    "V6.vsubhsat.128B" => "__builtin_HEXAGON_V6_vsubhsat_128B",
+                    "V6.vsubhsat.dv" => "__builtin_HEXAGON_V6_vsubhsat_dv",
+                    "V6.vsubhsat.dv.128B" => "__builtin_HEXAGON_V6_vsubhsat_dv_128B",
+                    "V6.vsubhw" => "__builtin_HEXAGON_V6_vsubhw",
+                    "V6.vsubhw.128B" => "__builtin_HEXAGON_V6_vsubhw_128B",
+                    "V6.vsububh" => "__builtin_HEXAGON_V6_vsububh",
+                    "V6.vsububh.128B" => "__builtin_HEXAGON_V6_vsububh_128B",
+                    "V6.vsububsat" => "__builtin_HEXAGON_V6_vsububsat",
+                    "V6.vsububsat.128B" => "__builtin_HEXAGON_V6_vsububsat_128B",
+                    "V6.vsububsat.dv" => "__builtin_HEXAGON_V6_vsububsat_dv",
+                    "V6.vsububsat.dv.128B" => "__builtin_HEXAGON_V6_vsububsat_dv_128B",
+                    "V6.vsubububb.sat" => "__builtin_HEXAGON_V6_vsubububb_sat",
+                    "V6.vsubububb.sat.128B" => "__builtin_HEXAGON_V6_vsubububb_sat_128B",
+                    "V6.vsubuhsat" => "__builtin_HEXAGON_V6_vsubuhsat",
+                    "V6.vsubuhsat.128B" => "__builtin_HEXAGON_V6_vsubuhsat_128B",
+                    "V6.vsubuhsat.dv" => "__builtin_HEXAGON_V6_vsubuhsat_dv",
+                    "V6.vsubuhsat.dv.128B" => "__builtin_HEXAGON_V6_vsubuhsat_dv_128B",
+                    "V6.vsubuhw" => "__builtin_HEXAGON_V6_vsubuhw",
+                    "V6.vsubuhw.128B" => "__builtin_HEXAGON_V6_vsubuhw_128B",
+                    "V6.vsubuwsat" => "__builtin_HEXAGON_V6_vsubuwsat",
+                    "V6.vsubuwsat.128B" => "__builtin_HEXAGON_V6_vsubuwsat_128B",
+                    "V6.vsubuwsat.dv" => "__builtin_HEXAGON_V6_vsubuwsat_dv",
+                    "V6.vsubuwsat.dv.128B" => "__builtin_HEXAGON_V6_vsubuwsat_dv_128B",
+                    "V6.vsubw" => "__builtin_HEXAGON_V6_vsubw",
+                    "V6.vsubw.128B" => "__builtin_HEXAGON_V6_vsubw_128B",
+                    "V6.vsubw.dv" => "__builtin_HEXAGON_V6_vsubw_dv",
+                    "V6.vsubw.dv.128B" => "__builtin_HEXAGON_V6_vsubw_dv_128B",
+                    "V6.vsubwnq" => "__builtin_HEXAGON_V6_vsubwnq",
+                    "V6.vsubwnq.128B" => "__builtin_HEXAGON_V6_vsubwnq_128B",
+                    "V6.vsubwq" => "__builtin_HEXAGON_V6_vsubwq",
+                    "V6.vsubwq.128B" => "__builtin_HEXAGON_V6_vsubwq_128B",
+                    "V6.vsubwsat" => "__builtin_HEXAGON_V6_vsubwsat",
+                    "V6.vsubwsat.128B" => "__builtin_HEXAGON_V6_vsubwsat_128B",
+                    "V6.vsubwsat.dv" => "__builtin_HEXAGON_V6_vsubwsat_dv",
+                    "V6.vsubwsat.dv.128B" => "__builtin_HEXAGON_V6_vsubwsat_dv_128B",
+                    "V6.vswap" => "__builtin_HEXAGON_V6_vswap",
+                    "V6.vswap.128B" => "__builtin_HEXAGON_V6_vswap_128B",
+                    "V6.vtmpyb" => "__builtin_HEXAGON_V6_vtmpyb",
+                    "V6.vtmpyb.128B" => "__builtin_HEXAGON_V6_vtmpyb_128B",
+                    "V6.vtmpyb.acc" => "__builtin_HEXAGON_V6_vtmpyb_acc",
+                    "V6.vtmpyb.acc.128B" => "__builtin_HEXAGON_V6_vtmpyb_acc_128B",
+                    "V6.vtmpybus" => "__builtin_HEXAGON_V6_vtmpybus",
+                    "V6.vtmpybus.128B" => "__builtin_HEXAGON_V6_vtmpybus_128B",
+                    "V6.vtmpybus.acc" => "__builtin_HEXAGON_V6_vtmpybus_acc",
+                    "V6.vtmpybus.acc.128B" => "__builtin_HEXAGON_V6_vtmpybus_acc_128B",
+                    "V6.vtmpyhb" => "__builtin_HEXAGON_V6_vtmpyhb",
+                    "V6.vtmpyhb.128B" => "__builtin_HEXAGON_V6_vtmpyhb_128B",
+                    "V6.vtmpyhb.acc" => "__builtin_HEXAGON_V6_vtmpyhb_acc",
+                    "V6.vtmpyhb.acc.128B" => "__builtin_HEXAGON_V6_vtmpyhb_acc_128B",
+                    "V6.vunpackb" => "__builtin_HEXAGON_V6_vunpackb",
+                    "V6.vunpackb.128B" => "__builtin_HEXAGON_V6_vunpackb_128B",
+                    "V6.vunpackh" => "__builtin_HEXAGON_V6_vunpackh",
+                    "V6.vunpackh.128B" => "__builtin_HEXAGON_V6_vunpackh_128B",
+                    "V6.vunpackob" => "__builtin_HEXAGON_V6_vunpackob",
+                    "V6.vunpackob.128B" => "__builtin_HEXAGON_V6_vunpackob_128B",
+                    "V6.vunpackoh" => "__builtin_HEXAGON_V6_vunpackoh",
+                    "V6.vunpackoh.128B" => "__builtin_HEXAGON_V6_vunpackoh_128B",
+                    "V6.vunpackub" => "__builtin_HEXAGON_V6_vunpackub",
+                    "V6.vunpackub.128B" => "__builtin_HEXAGON_V6_vunpackub_128B",
+                    "V6.vunpackuh" => "__builtin_HEXAGON_V6_vunpackuh",
+                    "V6.vunpackuh.128B" => "__builtin_HEXAGON_V6_vunpackuh_128B",
+                    "V6.vxor" => "__builtin_HEXAGON_V6_vxor",
+                    "V6.vxor.128B" => "__builtin_HEXAGON_V6_vxor_128B",
+                    "V6.vzb" => "__builtin_HEXAGON_V6_vzb",
+                    "V6.vzb.128B" => "__builtin_HEXAGON_V6_vzb_128B",
+                    "V6.vzh" => "__builtin_HEXAGON_V6_vzh",
+                    "V6.vzh.128B" => "__builtin_HEXAGON_V6_vzh_128B",
+                    "Y2.dccleana" => "__builtin_HEXAGON_Y2_dccleana",
+                    "Y2.dccleaninva" => "__builtin_HEXAGON_Y2_dccleaninva",
+                    "Y2.dcfetch" => "__builtin_HEXAGON_Y2_dcfetch",
+                    "Y2.dcinva" => "__builtin_HEXAGON_Y2_dcinva",
+                    "Y2.dczeroa" => "__builtin_HEXAGON_Y2_dczeroa",
+                    "Y4.l2fetch" => "__builtin_HEXAGON_Y4_l2fetch",
+                    "Y5.l2fetch" => "__builtin_HEXAGON_Y5_l2fetch",
+                    "Y6.dmlink" => "__builtin_HEXAGON_Y6_dmlink",
+                    "Y6.dmpause" => "__builtin_HEXAGON_Y6_dmpause",
+                    "Y6.dmpoll" => "__builtin_HEXAGON_Y6_dmpoll",
+                    "Y6.dmresume" => "__builtin_HEXAGON_Y6_dmresume",
+                    "Y6.dmstart" => "__builtin_HEXAGON_Y6_dmstart",
+                    "Y6.dmwait" => "__builtin_HEXAGON_Y6_dmwait",
+                    "brev.ldb" => "__builtin_brev_ldb",
+                    "brev.ldd" => "__builtin_brev_ldd",
+                    "brev.ldh" => "__builtin_brev_ldh",
+                    "brev.ldub" => "__builtin_brev_ldub",
+                    "brev.lduh" => "__builtin_brev_lduh",
+                    "brev.ldw" => "__builtin_brev_ldw",
+                    "brev.stb" => "__builtin_brev_stb",
+                    "brev.std" => "__builtin_brev_std",
+                    "brev.sth" => "__builtin_brev_sth",
+                    "brev.sthhi" => "__builtin_brev_sthhi",
+                    "brev.stw" => "__builtin_brev_stw",
+                    "circ.ldb" => "__builtin_circ_ldb",
+                    "circ.ldd" => "__builtin_circ_ldd",
+                    "circ.ldh" => "__builtin_circ_ldh",
+                    "circ.ldub" => "__builtin_circ_ldub",
+                    "circ.lduh" => "__builtin_circ_lduh",
+                    "circ.ldw" => "__builtin_circ_ldw",
+                    "circ.stb" => "__builtin_circ_stb",
+                    "circ.std" => "__builtin_circ_std",
+                    "circ.sth" => "__builtin_circ_sth",
+                    "circ.sthhi" => "__builtin_circ_sthhi",
+                    "circ.stw" => "__builtin_circ_stw",
+                    "mm256i.vaddw" => "__builtin__mm256i_vaddw",
+                    "prefetch" => "__builtin_HEXAGON_prefetch",
+                    "vmemcpy" => "__builtin_hexagon_vmemcpy",
+                    "vmemset" => "__builtin_hexagon_vmemset",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            hexagon(name)
+        }
+        "loongarch" => {
+            #[allow(non_snake_case)]
+            fn loongarch(name: &str) -> &str {
+                match name {
+                    // loongarch
+                    "asrtgt.d" => "__builtin_loongarch_asrtgt_d",
+                    "asrtle.d" => "__builtin_loongarch_asrtle_d",
+                    "break" => "__builtin_loongarch_break",
+                    "cacop.d" => "__builtin_loongarch_cacop_d",
+                    "cacop.w" => "__builtin_loongarch_cacop_w",
+                    "cpucfg" => "__builtin_loongarch_cpucfg",
+                    "crc.w.b.w" => "__builtin_loongarch_crc_w_b_w",
+                    "crc.w.d.w" => "__builtin_loongarch_crc_w_d_w",
+                    "crc.w.h.w" => "__builtin_loongarch_crc_w_h_w",
+                    "crc.w.w.w" => "__builtin_loongarch_crc_w_w_w",
+                    "crcc.w.b.w" => "__builtin_loongarch_crcc_w_b_w",
+                    "crcc.w.d.w" => "__builtin_loongarch_crcc_w_d_w",
+                    "crcc.w.h.w" => "__builtin_loongarch_crcc_w_h_w",
+                    "crcc.w.w.w" => "__builtin_loongarch_crcc_w_w_w",
+                    "csrrd.d" => "__builtin_loongarch_csrrd_d",
+                    "csrrd.w" => "__builtin_loongarch_csrrd_w",
+                    "csrwr.d" => "__builtin_loongarch_csrwr_d",
+                    "csrwr.w" => "__builtin_loongarch_csrwr_w",
+                    "csrxchg.d" => "__builtin_loongarch_csrxchg_d",
+                    "csrxchg.w" => "__builtin_loongarch_csrxchg_w",
+                    "dbar" => "__builtin_loongarch_dbar",
+                    "frecipe.d" => "__builtin_loongarch_frecipe_d",
+                    "frecipe.s" => "__builtin_loongarch_frecipe_s",
+                    "frsqrte.d" => "__builtin_loongarch_frsqrte_d",
+                    "frsqrte.s" => "__builtin_loongarch_frsqrte_s",
+                    "ibar" => "__builtin_loongarch_ibar",
+                    "iocsrrd.b" => "__builtin_loongarch_iocsrrd_b",
+                    "iocsrrd.d" => "__builtin_loongarch_iocsrrd_d",
+                    "iocsrrd.h" => "__builtin_loongarch_iocsrrd_h",
+                    "iocsrrd.w" => "__builtin_loongarch_iocsrrd_w",
+                    "iocsrwr.b" => "__builtin_loongarch_iocsrwr_b",
+                    "iocsrwr.d" => "__builtin_loongarch_iocsrwr_d",
+                    "iocsrwr.h" => "__builtin_loongarch_iocsrwr_h",
+                    "iocsrwr.w" => "__builtin_loongarch_iocsrwr_w",
+                    "lasx.vext2xv.d.b" => "__builtin_lasx_vext2xv_d_b",
+                    "lasx.vext2xv.d.h" => "__builtin_lasx_vext2xv_d_h",
+                    "lasx.vext2xv.d.w" => "__builtin_lasx_vext2xv_d_w",
+                    "lasx.vext2xv.du.bu" => "__builtin_lasx_vext2xv_du_bu",
+                    "lasx.vext2xv.du.hu" => "__builtin_lasx_vext2xv_du_hu",
+                    "lasx.vext2xv.du.wu" => "__builtin_lasx_vext2xv_du_wu",
+                    "lasx.vext2xv.h.b" => "__builtin_lasx_vext2xv_h_b",
+                    "lasx.vext2xv.hu.bu" => "__builtin_lasx_vext2xv_hu_bu",
+                    "lasx.vext2xv.w.b" => "__builtin_lasx_vext2xv_w_b",
+                    "lasx.vext2xv.w.h" => "__builtin_lasx_vext2xv_w_h",
+                    "lasx.vext2xv.wu.bu" => "__builtin_lasx_vext2xv_wu_bu",
+                    "lasx.vext2xv.wu.hu" => "__builtin_lasx_vext2xv_wu_hu",
+                    "lasx.xbnz.b" => "__builtin_lasx_xbnz_b",
+                    "lasx.xbnz.d" => "__builtin_lasx_xbnz_d",
+                    "lasx.xbnz.h" => "__builtin_lasx_xbnz_h",
+                    "lasx.xbnz.v" => "__builtin_lasx_xbnz_v",
+                    "lasx.xbnz.w" => "__builtin_lasx_xbnz_w",
+                    "lasx.xbz.b" => "__builtin_lasx_xbz_b",
+                    "lasx.xbz.d" => "__builtin_lasx_xbz_d",
+                    "lasx.xbz.h" => "__builtin_lasx_xbz_h",
+                    "lasx.xbz.v" => "__builtin_lasx_xbz_v",
+                    "lasx.xbz.w" => "__builtin_lasx_xbz_w",
+                    "lasx.xvabsd.b" => "__builtin_lasx_xvabsd_b",
+                    "lasx.xvabsd.bu" => "__builtin_lasx_xvabsd_bu",
+                    "lasx.xvabsd.d" => "__builtin_lasx_xvabsd_d",
+                    "lasx.xvabsd.du" => "__builtin_lasx_xvabsd_du",
+                    "lasx.xvabsd.h" => "__builtin_lasx_xvabsd_h",
+                    "lasx.xvabsd.hu" => "__builtin_lasx_xvabsd_hu",
+                    "lasx.xvabsd.w" => "__builtin_lasx_xvabsd_w",
+                    "lasx.xvabsd.wu" => "__builtin_lasx_xvabsd_wu",
+                    "lasx.xvadd.b" => "__builtin_lasx_xvadd_b",
+                    "lasx.xvadd.d" => "__builtin_lasx_xvadd_d",
+                    "lasx.xvadd.h" => "__builtin_lasx_xvadd_h",
+                    "lasx.xvadd.q" => "__builtin_lasx_xvadd_q",
+                    "lasx.xvadd.w" => "__builtin_lasx_xvadd_w",
+                    "lasx.xvadda.b" => "__builtin_lasx_xvadda_b",
+                    "lasx.xvadda.d" => "__builtin_lasx_xvadda_d",
+                    "lasx.xvadda.h" => "__builtin_lasx_xvadda_h",
+                    "lasx.xvadda.w" => "__builtin_lasx_xvadda_w",
+                    "lasx.xvaddi.bu" => "__builtin_lasx_xvaddi_bu",
+                    "lasx.xvaddi.du" => "__builtin_lasx_xvaddi_du",
+                    "lasx.xvaddi.hu" => "__builtin_lasx_xvaddi_hu",
+                    "lasx.xvaddi.wu" => "__builtin_lasx_xvaddi_wu",
+                    "lasx.xvaddwev.d.w" => "__builtin_lasx_xvaddwev_d_w",
+                    "lasx.xvaddwev.d.wu" => "__builtin_lasx_xvaddwev_d_wu",
+                    "lasx.xvaddwev.d.wu.w" => "__builtin_lasx_xvaddwev_d_wu_w",
+                    "lasx.xvaddwev.h.b" => "__builtin_lasx_xvaddwev_h_b",
+                    "lasx.xvaddwev.h.bu" => "__builtin_lasx_xvaddwev_h_bu",
+                    "lasx.xvaddwev.h.bu.b" => "__builtin_lasx_xvaddwev_h_bu_b",
+                    "lasx.xvaddwev.q.d" => "__builtin_lasx_xvaddwev_q_d",
+                    "lasx.xvaddwev.q.du" => "__builtin_lasx_xvaddwev_q_du",
+                    "lasx.xvaddwev.q.du.d" => "__builtin_lasx_xvaddwev_q_du_d",
+                    "lasx.xvaddwev.w.h" => "__builtin_lasx_xvaddwev_w_h",
+                    "lasx.xvaddwev.w.hu" => "__builtin_lasx_xvaddwev_w_hu",
+                    "lasx.xvaddwev.w.hu.h" => "__builtin_lasx_xvaddwev_w_hu_h",
+                    "lasx.xvaddwod.d.w" => "__builtin_lasx_xvaddwod_d_w",
+                    "lasx.xvaddwod.d.wu" => "__builtin_lasx_xvaddwod_d_wu",
+                    "lasx.xvaddwod.d.wu.w" => "__builtin_lasx_xvaddwod_d_wu_w",
+                    "lasx.xvaddwod.h.b" => "__builtin_lasx_xvaddwod_h_b",
+                    "lasx.xvaddwod.h.bu" => "__builtin_lasx_xvaddwod_h_bu",
+                    "lasx.xvaddwod.h.bu.b" => "__builtin_lasx_xvaddwod_h_bu_b",
+                    "lasx.xvaddwod.q.d" => "__builtin_lasx_xvaddwod_q_d",
+                    "lasx.xvaddwod.q.du" => "__builtin_lasx_xvaddwod_q_du",
+                    "lasx.xvaddwod.q.du.d" => "__builtin_lasx_xvaddwod_q_du_d",
+                    "lasx.xvaddwod.w.h" => "__builtin_lasx_xvaddwod_w_h",
+                    "lasx.xvaddwod.w.hu" => "__builtin_lasx_xvaddwod_w_hu",
+                    "lasx.xvaddwod.w.hu.h" => "__builtin_lasx_xvaddwod_w_hu_h",
+                    "lasx.xvand.v" => "__builtin_lasx_xvand_v",
+                    "lasx.xvandi.b" => "__builtin_lasx_xvandi_b",
+                    "lasx.xvandn.v" => "__builtin_lasx_xvandn_v",
+                    "lasx.xvavg.b" => "__builtin_lasx_xvavg_b",
+                    "lasx.xvavg.bu" => "__builtin_lasx_xvavg_bu",
+                    "lasx.xvavg.d" => "__builtin_lasx_xvavg_d",
+                    "lasx.xvavg.du" => "__builtin_lasx_xvavg_du",
+                    "lasx.xvavg.h" => "__builtin_lasx_xvavg_h",
+                    "lasx.xvavg.hu" => "__builtin_lasx_xvavg_hu",
+                    "lasx.xvavg.w" => "__builtin_lasx_xvavg_w",
+                    "lasx.xvavg.wu" => "__builtin_lasx_xvavg_wu",
+                    "lasx.xvavgr.b" => "__builtin_lasx_xvavgr_b",
+                    "lasx.xvavgr.bu" => "__builtin_lasx_xvavgr_bu",
+                    "lasx.xvavgr.d" => "__builtin_lasx_xvavgr_d",
+                    "lasx.xvavgr.du" => "__builtin_lasx_xvavgr_du",
+                    "lasx.xvavgr.h" => "__builtin_lasx_xvavgr_h",
+                    "lasx.xvavgr.hu" => "__builtin_lasx_xvavgr_hu",
+                    "lasx.xvavgr.w" => "__builtin_lasx_xvavgr_w",
+                    "lasx.xvavgr.wu" => "__builtin_lasx_xvavgr_wu",
+                    "lasx.xvbitclr.b" => "__builtin_lasx_xvbitclr_b",
+                    "lasx.xvbitclr.d" => "__builtin_lasx_xvbitclr_d",
+                    "lasx.xvbitclr.h" => "__builtin_lasx_xvbitclr_h",
+                    "lasx.xvbitclr.w" => "__builtin_lasx_xvbitclr_w",
+                    "lasx.xvbitclri.b" => "__builtin_lasx_xvbitclri_b",
+                    "lasx.xvbitclri.d" => "__builtin_lasx_xvbitclri_d",
+                    "lasx.xvbitclri.h" => "__builtin_lasx_xvbitclri_h",
+                    "lasx.xvbitclri.w" => "__builtin_lasx_xvbitclri_w",
+                    "lasx.xvbitrev.b" => "__builtin_lasx_xvbitrev_b",
+                    "lasx.xvbitrev.d" => "__builtin_lasx_xvbitrev_d",
+                    "lasx.xvbitrev.h" => "__builtin_lasx_xvbitrev_h",
+                    "lasx.xvbitrev.w" => "__builtin_lasx_xvbitrev_w",
+                    "lasx.xvbitrevi.b" => "__builtin_lasx_xvbitrevi_b",
+                    "lasx.xvbitrevi.d" => "__builtin_lasx_xvbitrevi_d",
+                    "lasx.xvbitrevi.h" => "__builtin_lasx_xvbitrevi_h",
+                    "lasx.xvbitrevi.w" => "__builtin_lasx_xvbitrevi_w",
+                    "lasx.xvbitsel.v" => "__builtin_lasx_xvbitsel_v",
+                    "lasx.xvbitseli.b" => "__builtin_lasx_xvbitseli_b",
+                    "lasx.xvbitset.b" => "__builtin_lasx_xvbitset_b",
+                    "lasx.xvbitset.d" => "__builtin_lasx_xvbitset_d",
+                    "lasx.xvbitset.h" => "__builtin_lasx_xvbitset_h",
+                    "lasx.xvbitset.w" => "__builtin_lasx_xvbitset_w",
+                    "lasx.xvbitseti.b" => "__builtin_lasx_xvbitseti_b",
+                    "lasx.xvbitseti.d" => "__builtin_lasx_xvbitseti_d",
+                    "lasx.xvbitseti.h" => "__builtin_lasx_xvbitseti_h",
+                    "lasx.xvbitseti.w" => "__builtin_lasx_xvbitseti_w",
+                    "lasx.xvbsll.v" => "__builtin_lasx_xvbsll_v",
+                    "lasx.xvbsrl.v" => "__builtin_lasx_xvbsrl_v",
+                    "lasx.xvclo.b" => "__builtin_lasx_xvclo_b",
+                    "lasx.xvclo.d" => "__builtin_lasx_xvclo_d",
+                    "lasx.xvclo.h" => "__builtin_lasx_xvclo_h",
+                    "lasx.xvclo.w" => "__builtin_lasx_xvclo_w",
+                    "lasx.xvclz.b" => "__builtin_lasx_xvclz_b",
+                    "lasx.xvclz.d" => "__builtin_lasx_xvclz_d",
+                    "lasx.xvclz.h" => "__builtin_lasx_xvclz_h",
+                    "lasx.xvclz.w" => "__builtin_lasx_xvclz_w",
+                    "lasx.xvdiv.b" => "__builtin_lasx_xvdiv_b",
+                    "lasx.xvdiv.bu" => "__builtin_lasx_xvdiv_bu",
+                    "lasx.xvdiv.d" => "__builtin_lasx_xvdiv_d",
+                    "lasx.xvdiv.du" => "__builtin_lasx_xvdiv_du",
+                    "lasx.xvdiv.h" => "__builtin_lasx_xvdiv_h",
+                    "lasx.xvdiv.hu" => "__builtin_lasx_xvdiv_hu",
+                    "lasx.xvdiv.w" => "__builtin_lasx_xvdiv_w",
+                    "lasx.xvdiv.wu" => "__builtin_lasx_xvdiv_wu",
+                    "lasx.xvexth.d.w" => "__builtin_lasx_xvexth_d_w",
+                    "lasx.xvexth.du.wu" => "__builtin_lasx_xvexth_du_wu",
+                    "lasx.xvexth.h.b" => "__builtin_lasx_xvexth_h_b",
+                    "lasx.xvexth.hu.bu" => "__builtin_lasx_xvexth_hu_bu",
+                    "lasx.xvexth.q.d" => "__builtin_lasx_xvexth_q_d",
+                    "lasx.xvexth.qu.du" => "__builtin_lasx_xvexth_qu_du",
+                    "lasx.xvexth.w.h" => "__builtin_lasx_xvexth_w_h",
+                    "lasx.xvexth.wu.hu" => "__builtin_lasx_xvexth_wu_hu",
+                    "lasx.xvextl.q.d" => "__builtin_lasx_xvextl_q_d",
+                    "lasx.xvextl.qu.du" => "__builtin_lasx_xvextl_qu_du",
+                    "lasx.xvextrins.b" => "__builtin_lasx_xvextrins_b",
+                    "lasx.xvextrins.d" => "__builtin_lasx_xvextrins_d",
+                    "lasx.xvextrins.h" => "__builtin_lasx_xvextrins_h",
+                    "lasx.xvextrins.w" => "__builtin_lasx_xvextrins_w",
+                    "lasx.xvfadd.d" => "__builtin_lasx_xvfadd_d",
+                    "lasx.xvfadd.s" => "__builtin_lasx_xvfadd_s",
+                    "lasx.xvfclass.d" => "__builtin_lasx_xvfclass_d",
+                    "lasx.xvfclass.s" => "__builtin_lasx_xvfclass_s",
+                    "lasx.xvfcmp.caf.d" => "__builtin_lasx_xvfcmp_caf_d",
+                    "lasx.xvfcmp.caf.s" => "__builtin_lasx_xvfcmp_caf_s",
+                    "lasx.xvfcmp.ceq.d" => "__builtin_lasx_xvfcmp_ceq_d",
+                    "lasx.xvfcmp.ceq.s" => "__builtin_lasx_xvfcmp_ceq_s",
+                    "lasx.xvfcmp.cle.d" => "__builtin_lasx_xvfcmp_cle_d",
+                    "lasx.xvfcmp.cle.s" => "__builtin_lasx_xvfcmp_cle_s",
+                    "lasx.xvfcmp.clt.d" => "__builtin_lasx_xvfcmp_clt_d",
+                    "lasx.xvfcmp.clt.s" => "__builtin_lasx_xvfcmp_clt_s",
+                    "lasx.xvfcmp.cne.d" => "__builtin_lasx_xvfcmp_cne_d",
+                    "lasx.xvfcmp.cne.s" => "__builtin_lasx_xvfcmp_cne_s",
+                    "lasx.xvfcmp.cor.d" => "__builtin_lasx_xvfcmp_cor_d",
+                    "lasx.xvfcmp.cor.s" => "__builtin_lasx_xvfcmp_cor_s",
+                    "lasx.xvfcmp.cueq.d" => "__builtin_lasx_xvfcmp_cueq_d",
+                    "lasx.xvfcmp.cueq.s" => "__builtin_lasx_xvfcmp_cueq_s",
+                    "lasx.xvfcmp.cule.d" => "__builtin_lasx_xvfcmp_cule_d",
+                    "lasx.xvfcmp.cule.s" => "__builtin_lasx_xvfcmp_cule_s",
+                    "lasx.xvfcmp.cult.d" => "__builtin_lasx_xvfcmp_cult_d",
+                    "lasx.xvfcmp.cult.s" => "__builtin_lasx_xvfcmp_cult_s",
+                    "lasx.xvfcmp.cun.d" => "__builtin_lasx_xvfcmp_cun_d",
+                    "lasx.xvfcmp.cun.s" => "__builtin_lasx_xvfcmp_cun_s",
+                    "lasx.xvfcmp.cune.d" => "__builtin_lasx_xvfcmp_cune_d",
+                    "lasx.xvfcmp.cune.s" => "__builtin_lasx_xvfcmp_cune_s",
+                    "lasx.xvfcmp.saf.d" => "__builtin_lasx_xvfcmp_saf_d",
+                    "lasx.xvfcmp.saf.s" => "__builtin_lasx_xvfcmp_saf_s",
+                    "lasx.xvfcmp.seq.d" => "__builtin_lasx_xvfcmp_seq_d",
+                    "lasx.xvfcmp.seq.s" => "__builtin_lasx_xvfcmp_seq_s",
+                    "lasx.xvfcmp.sle.d" => "__builtin_lasx_xvfcmp_sle_d",
+                    "lasx.xvfcmp.sle.s" => "__builtin_lasx_xvfcmp_sle_s",
+                    "lasx.xvfcmp.slt.d" => "__builtin_lasx_xvfcmp_slt_d",
+                    "lasx.xvfcmp.slt.s" => "__builtin_lasx_xvfcmp_slt_s",
+                    "lasx.xvfcmp.sne.d" => "__builtin_lasx_xvfcmp_sne_d",
+                    "lasx.xvfcmp.sne.s" => "__builtin_lasx_xvfcmp_sne_s",
+                    "lasx.xvfcmp.sor.d" => "__builtin_lasx_xvfcmp_sor_d",
+                    "lasx.xvfcmp.sor.s" => "__builtin_lasx_xvfcmp_sor_s",
+                    "lasx.xvfcmp.sueq.d" => "__builtin_lasx_xvfcmp_sueq_d",
+                    "lasx.xvfcmp.sueq.s" => "__builtin_lasx_xvfcmp_sueq_s",
+                    "lasx.xvfcmp.sule.d" => "__builtin_lasx_xvfcmp_sule_d",
+                    "lasx.xvfcmp.sule.s" => "__builtin_lasx_xvfcmp_sule_s",
+                    "lasx.xvfcmp.sult.d" => "__builtin_lasx_xvfcmp_sult_d",
+                    "lasx.xvfcmp.sult.s" => "__builtin_lasx_xvfcmp_sult_s",
+                    "lasx.xvfcmp.sun.d" => "__builtin_lasx_xvfcmp_sun_d",
+                    "lasx.xvfcmp.sun.s" => "__builtin_lasx_xvfcmp_sun_s",
+                    "lasx.xvfcmp.sune.d" => "__builtin_lasx_xvfcmp_sune_d",
+                    "lasx.xvfcmp.sune.s" => "__builtin_lasx_xvfcmp_sune_s",
+                    "lasx.xvfcvt.h.s" => "__builtin_lasx_xvfcvt_h_s",
+                    "lasx.xvfcvt.s.d" => "__builtin_lasx_xvfcvt_s_d",
+                    "lasx.xvfcvth.d.s" => "__builtin_lasx_xvfcvth_d_s",
+                    "lasx.xvfcvth.s.h" => "__builtin_lasx_xvfcvth_s_h",
+                    "lasx.xvfcvtl.d.s" => "__builtin_lasx_xvfcvtl_d_s",
+                    "lasx.xvfcvtl.s.h" => "__builtin_lasx_xvfcvtl_s_h",
+                    "lasx.xvfdiv.d" => "__builtin_lasx_xvfdiv_d",
+                    "lasx.xvfdiv.s" => "__builtin_lasx_xvfdiv_s",
+                    "lasx.xvffint.d.l" => "__builtin_lasx_xvffint_d_l",
+                    "lasx.xvffint.d.lu" => "__builtin_lasx_xvffint_d_lu",
+                    "lasx.xvffint.s.l" => "__builtin_lasx_xvffint_s_l",
+                    "lasx.xvffint.s.w" => "__builtin_lasx_xvffint_s_w",
+                    "lasx.xvffint.s.wu" => "__builtin_lasx_xvffint_s_wu",
+                    "lasx.xvffinth.d.w" => "__builtin_lasx_xvffinth_d_w",
+                    "lasx.xvffintl.d.w" => "__builtin_lasx_xvffintl_d_w",
+                    "lasx.xvflogb.d" => "__builtin_lasx_xvflogb_d",
+                    "lasx.xvflogb.s" => "__builtin_lasx_xvflogb_s",
+                    "lasx.xvfmadd.d" => "__builtin_lasx_xvfmadd_d",
+                    "lasx.xvfmadd.s" => "__builtin_lasx_xvfmadd_s",
+                    "lasx.xvfmax.d" => "__builtin_lasx_xvfmax_d",
+                    "lasx.xvfmax.s" => "__builtin_lasx_xvfmax_s",
+                    "lasx.xvfmaxa.d" => "__builtin_lasx_xvfmaxa_d",
+                    "lasx.xvfmaxa.s" => "__builtin_lasx_xvfmaxa_s",
+                    "lasx.xvfmin.d" => "__builtin_lasx_xvfmin_d",
+                    "lasx.xvfmin.s" => "__builtin_lasx_xvfmin_s",
+                    "lasx.xvfmina.d" => "__builtin_lasx_xvfmina_d",
+                    "lasx.xvfmina.s" => "__builtin_lasx_xvfmina_s",
+                    "lasx.xvfmsub.d" => "__builtin_lasx_xvfmsub_d",
+                    "lasx.xvfmsub.s" => "__builtin_lasx_xvfmsub_s",
+                    "lasx.xvfmul.d" => "__builtin_lasx_xvfmul_d",
+                    "lasx.xvfmul.s" => "__builtin_lasx_xvfmul_s",
+                    "lasx.xvfnmadd.d" => "__builtin_lasx_xvfnmadd_d",
+                    "lasx.xvfnmadd.s" => "__builtin_lasx_xvfnmadd_s",
+                    "lasx.xvfnmsub.d" => "__builtin_lasx_xvfnmsub_d",
+                    "lasx.xvfnmsub.s" => "__builtin_lasx_xvfnmsub_s",
+                    "lasx.xvfrecip.d" => "__builtin_lasx_xvfrecip_d",
+                    "lasx.xvfrecip.s" => "__builtin_lasx_xvfrecip_s",
+                    "lasx.xvfrecipe.d" => "__builtin_lasx_xvfrecipe_d",
+                    "lasx.xvfrecipe.s" => "__builtin_lasx_xvfrecipe_s",
+                    "lasx.xvfrint.d" => "__builtin_lasx_xvfrint_d",
+                    "lasx.xvfrint.s" => "__builtin_lasx_xvfrint_s",
+                    "lasx.xvfrintrm.d" => "__builtin_lasx_xvfrintrm_d",
+                    "lasx.xvfrintrm.s" => "__builtin_lasx_xvfrintrm_s",
+                    "lasx.xvfrintrne.d" => "__builtin_lasx_xvfrintrne_d",
+                    "lasx.xvfrintrne.s" => "__builtin_lasx_xvfrintrne_s",
+                    "lasx.xvfrintrp.d" => "__builtin_lasx_xvfrintrp_d",
+                    "lasx.xvfrintrp.s" => "__builtin_lasx_xvfrintrp_s",
+                    "lasx.xvfrintrz.d" => "__builtin_lasx_xvfrintrz_d",
+                    "lasx.xvfrintrz.s" => "__builtin_lasx_xvfrintrz_s",
+                    "lasx.xvfrsqrt.d" => "__builtin_lasx_xvfrsqrt_d",
+                    "lasx.xvfrsqrt.s" => "__builtin_lasx_xvfrsqrt_s",
+                    "lasx.xvfrsqrte.d" => "__builtin_lasx_xvfrsqrte_d",
+                    "lasx.xvfrsqrte.s" => "__builtin_lasx_xvfrsqrte_s",
+                    "lasx.xvfrstp.b" => "__builtin_lasx_xvfrstp_b",
+                    "lasx.xvfrstp.h" => "__builtin_lasx_xvfrstp_h",
+                    "lasx.xvfrstpi.b" => "__builtin_lasx_xvfrstpi_b",
+                    "lasx.xvfrstpi.h" => "__builtin_lasx_xvfrstpi_h",
+                    "lasx.xvfsqrt.d" => "__builtin_lasx_xvfsqrt_d",
+                    "lasx.xvfsqrt.s" => "__builtin_lasx_xvfsqrt_s",
+                    "lasx.xvfsub.d" => "__builtin_lasx_xvfsub_d",
+                    "lasx.xvfsub.s" => "__builtin_lasx_xvfsub_s",
+                    "lasx.xvftint.l.d" => "__builtin_lasx_xvftint_l_d",
+                    "lasx.xvftint.lu.d" => "__builtin_lasx_xvftint_lu_d",
+                    "lasx.xvftint.w.d" => "__builtin_lasx_xvftint_w_d",
+                    "lasx.xvftint.w.s" => "__builtin_lasx_xvftint_w_s",
+                    "lasx.xvftint.wu.s" => "__builtin_lasx_xvftint_wu_s",
+                    "lasx.xvftinth.l.s" => "__builtin_lasx_xvftinth_l_s",
+                    "lasx.xvftintl.l.s" => "__builtin_lasx_xvftintl_l_s",
+                    "lasx.xvftintrm.l.d" => "__builtin_lasx_xvftintrm_l_d",
+                    "lasx.xvftintrm.w.d" => "__builtin_lasx_xvftintrm_w_d",
+                    "lasx.xvftintrm.w.s" => "__builtin_lasx_xvftintrm_w_s",
+                    "lasx.xvftintrmh.l.s" => "__builtin_lasx_xvftintrmh_l_s",
+                    "lasx.xvftintrml.l.s" => "__builtin_lasx_xvftintrml_l_s",
+                    "lasx.xvftintrne.l.d" => "__builtin_lasx_xvftintrne_l_d",
+                    "lasx.xvftintrne.w.d" => "__builtin_lasx_xvftintrne_w_d",
+                    "lasx.xvftintrne.w.s" => "__builtin_lasx_xvftintrne_w_s",
+                    "lasx.xvftintrneh.l.s" => "__builtin_lasx_xvftintrneh_l_s",
+                    "lasx.xvftintrnel.l.s" => "__builtin_lasx_xvftintrnel_l_s",
+                    "lasx.xvftintrp.l.d" => "__builtin_lasx_xvftintrp_l_d",
+                    "lasx.xvftintrp.w.d" => "__builtin_lasx_xvftintrp_w_d",
+                    "lasx.xvftintrp.w.s" => "__builtin_lasx_xvftintrp_w_s",
+                    "lasx.xvftintrph.l.s" => "__builtin_lasx_xvftintrph_l_s",
+                    "lasx.xvftintrpl.l.s" => "__builtin_lasx_xvftintrpl_l_s",
+                    "lasx.xvftintrz.l.d" => "__builtin_lasx_xvftintrz_l_d",
+                    "lasx.xvftintrz.lu.d" => "__builtin_lasx_xvftintrz_lu_d",
+                    "lasx.xvftintrz.w.d" => "__builtin_lasx_xvftintrz_w_d",
+                    "lasx.xvftintrz.w.s" => "__builtin_lasx_xvftintrz_w_s",
+                    "lasx.xvftintrz.wu.s" => "__builtin_lasx_xvftintrz_wu_s",
+                    "lasx.xvftintrzh.l.s" => "__builtin_lasx_xvftintrzh_l_s",
+                    "lasx.xvftintrzl.l.s" => "__builtin_lasx_xvftintrzl_l_s",
+                    "lasx.xvhaddw.d.w" => "__builtin_lasx_xvhaddw_d_w",
+                    "lasx.xvhaddw.du.wu" => "__builtin_lasx_xvhaddw_du_wu",
+                    "lasx.xvhaddw.h.b" => "__builtin_lasx_xvhaddw_h_b",
+                    "lasx.xvhaddw.hu.bu" => "__builtin_lasx_xvhaddw_hu_bu",
+                    "lasx.xvhaddw.q.d" => "__builtin_lasx_xvhaddw_q_d",
+                    "lasx.xvhaddw.qu.du" => "__builtin_lasx_xvhaddw_qu_du",
+                    "lasx.xvhaddw.w.h" => "__builtin_lasx_xvhaddw_w_h",
+                    "lasx.xvhaddw.wu.hu" => "__builtin_lasx_xvhaddw_wu_hu",
+                    "lasx.xvhsubw.d.w" => "__builtin_lasx_xvhsubw_d_w",
+                    "lasx.xvhsubw.du.wu" => "__builtin_lasx_xvhsubw_du_wu",
+                    "lasx.xvhsubw.h.b" => "__builtin_lasx_xvhsubw_h_b",
+                    "lasx.xvhsubw.hu.bu" => "__builtin_lasx_xvhsubw_hu_bu",
+                    "lasx.xvhsubw.q.d" => "__builtin_lasx_xvhsubw_q_d",
+                    "lasx.xvhsubw.qu.du" => "__builtin_lasx_xvhsubw_qu_du",
+                    "lasx.xvhsubw.w.h" => "__builtin_lasx_xvhsubw_w_h",
+                    "lasx.xvhsubw.wu.hu" => "__builtin_lasx_xvhsubw_wu_hu",
+                    "lasx.xvilvh.b" => "__builtin_lasx_xvilvh_b",
+                    "lasx.xvilvh.d" => "__builtin_lasx_xvilvh_d",
+                    "lasx.xvilvh.h" => "__builtin_lasx_xvilvh_h",
+                    "lasx.xvilvh.w" => "__builtin_lasx_xvilvh_w",
+                    "lasx.xvilvl.b" => "__builtin_lasx_xvilvl_b",
+                    "lasx.xvilvl.d" => "__builtin_lasx_xvilvl_d",
+                    "lasx.xvilvl.h" => "__builtin_lasx_xvilvl_h",
+                    "lasx.xvilvl.w" => "__builtin_lasx_xvilvl_w",
+                    "lasx.xvinsgr2vr.d" => "__builtin_lasx_xvinsgr2vr_d",
+                    "lasx.xvinsgr2vr.w" => "__builtin_lasx_xvinsgr2vr_w",
+                    "lasx.xvinsve0.d" => "__builtin_lasx_xvinsve0_d",
+                    "lasx.xvinsve0.w" => "__builtin_lasx_xvinsve0_w",
+                    "lasx.xvld" => "__builtin_lasx_xvld",
+                    "lasx.xvldi" => "__builtin_lasx_xvldi",
+                    "lasx.xvldrepl.b" => "__builtin_lasx_xvldrepl_b",
+                    "lasx.xvldrepl.d" => "__builtin_lasx_xvldrepl_d",
+                    "lasx.xvldrepl.h" => "__builtin_lasx_xvldrepl_h",
+                    "lasx.xvldrepl.w" => "__builtin_lasx_xvldrepl_w",
+                    "lasx.xvldx" => "__builtin_lasx_xvldx",
+                    "lasx.xvmadd.b" => "__builtin_lasx_xvmadd_b",
+                    "lasx.xvmadd.d" => "__builtin_lasx_xvmadd_d",
+                    "lasx.xvmadd.h" => "__builtin_lasx_xvmadd_h",
+                    "lasx.xvmadd.w" => "__builtin_lasx_xvmadd_w",
+                    "lasx.xvmaddwev.d.w" => "__builtin_lasx_xvmaddwev_d_w",
+                    "lasx.xvmaddwev.d.wu" => "__builtin_lasx_xvmaddwev_d_wu",
+                    "lasx.xvmaddwev.d.wu.w" => "__builtin_lasx_xvmaddwev_d_wu_w",
+                    "lasx.xvmaddwev.h.b" => "__builtin_lasx_xvmaddwev_h_b",
+                    "lasx.xvmaddwev.h.bu" => "__builtin_lasx_xvmaddwev_h_bu",
+                    "lasx.xvmaddwev.h.bu.b" => "__builtin_lasx_xvmaddwev_h_bu_b",
+                    "lasx.xvmaddwev.q.d" => "__builtin_lasx_xvmaddwev_q_d",
+                    "lasx.xvmaddwev.q.du" => "__builtin_lasx_xvmaddwev_q_du",
+                    "lasx.xvmaddwev.q.du.d" => "__builtin_lasx_xvmaddwev_q_du_d",
+                    "lasx.xvmaddwev.w.h" => "__builtin_lasx_xvmaddwev_w_h",
+                    "lasx.xvmaddwev.w.hu" => "__builtin_lasx_xvmaddwev_w_hu",
+                    "lasx.xvmaddwev.w.hu.h" => "__builtin_lasx_xvmaddwev_w_hu_h",
+                    "lasx.xvmaddwod.d.w" => "__builtin_lasx_xvmaddwod_d_w",
+                    "lasx.xvmaddwod.d.wu" => "__builtin_lasx_xvmaddwod_d_wu",
+                    "lasx.xvmaddwod.d.wu.w" => "__builtin_lasx_xvmaddwod_d_wu_w",
+                    "lasx.xvmaddwod.h.b" => "__builtin_lasx_xvmaddwod_h_b",
+                    "lasx.xvmaddwod.h.bu" => "__builtin_lasx_xvmaddwod_h_bu",
+                    "lasx.xvmaddwod.h.bu.b" => "__builtin_lasx_xvmaddwod_h_bu_b",
+                    "lasx.xvmaddwod.q.d" => "__builtin_lasx_xvmaddwod_q_d",
+                    "lasx.xvmaddwod.q.du" => "__builtin_lasx_xvmaddwod_q_du",
+                    "lasx.xvmaddwod.q.du.d" => "__builtin_lasx_xvmaddwod_q_du_d",
+                    "lasx.xvmaddwod.w.h" => "__builtin_lasx_xvmaddwod_w_h",
+                    "lasx.xvmaddwod.w.hu" => "__builtin_lasx_xvmaddwod_w_hu",
+                    "lasx.xvmaddwod.w.hu.h" => "__builtin_lasx_xvmaddwod_w_hu_h",
+                    "lasx.xvmax.b" => "__builtin_lasx_xvmax_b",
+                    "lasx.xvmax.bu" => "__builtin_lasx_xvmax_bu",
+                    "lasx.xvmax.d" => "__builtin_lasx_xvmax_d",
+                    "lasx.xvmax.du" => "__builtin_lasx_xvmax_du",
+                    "lasx.xvmax.h" => "__builtin_lasx_xvmax_h",
+                    "lasx.xvmax.hu" => "__builtin_lasx_xvmax_hu",
+                    "lasx.xvmax.w" => "__builtin_lasx_xvmax_w",
+                    "lasx.xvmax.wu" => "__builtin_lasx_xvmax_wu",
+                    "lasx.xvmaxi.b" => "__builtin_lasx_xvmaxi_b",
+                    "lasx.xvmaxi.bu" => "__builtin_lasx_xvmaxi_bu",
+                    "lasx.xvmaxi.d" => "__builtin_lasx_xvmaxi_d",
+                    "lasx.xvmaxi.du" => "__builtin_lasx_xvmaxi_du",
+                    "lasx.xvmaxi.h" => "__builtin_lasx_xvmaxi_h",
+                    "lasx.xvmaxi.hu" => "__builtin_lasx_xvmaxi_hu",
+                    "lasx.xvmaxi.w" => "__builtin_lasx_xvmaxi_w",
+                    "lasx.xvmaxi.wu" => "__builtin_lasx_xvmaxi_wu",
+                    "lasx.xvmin.b" => "__builtin_lasx_xvmin_b",
+                    "lasx.xvmin.bu" => "__builtin_lasx_xvmin_bu",
+                    "lasx.xvmin.d" => "__builtin_lasx_xvmin_d",
+                    "lasx.xvmin.du" => "__builtin_lasx_xvmin_du",
+                    "lasx.xvmin.h" => "__builtin_lasx_xvmin_h",
+                    "lasx.xvmin.hu" => "__builtin_lasx_xvmin_hu",
+                    "lasx.xvmin.w" => "__builtin_lasx_xvmin_w",
+                    "lasx.xvmin.wu" => "__builtin_lasx_xvmin_wu",
+                    "lasx.xvmini.b" => "__builtin_lasx_xvmini_b",
+                    "lasx.xvmini.bu" => "__builtin_lasx_xvmini_bu",
+                    "lasx.xvmini.d" => "__builtin_lasx_xvmini_d",
+                    "lasx.xvmini.du" => "__builtin_lasx_xvmini_du",
+                    "lasx.xvmini.h" => "__builtin_lasx_xvmini_h",
+                    "lasx.xvmini.hu" => "__builtin_lasx_xvmini_hu",
+                    "lasx.xvmini.w" => "__builtin_lasx_xvmini_w",
+                    "lasx.xvmini.wu" => "__builtin_lasx_xvmini_wu",
+                    "lasx.xvmod.b" => "__builtin_lasx_xvmod_b",
+                    "lasx.xvmod.bu" => "__builtin_lasx_xvmod_bu",
+                    "lasx.xvmod.d" => "__builtin_lasx_xvmod_d",
+                    "lasx.xvmod.du" => "__builtin_lasx_xvmod_du",
+                    "lasx.xvmod.h" => "__builtin_lasx_xvmod_h",
+                    "lasx.xvmod.hu" => "__builtin_lasx_xvmod_hu",
+                    "lasx.xvmod.w" => "__builtin_lasx_xvmod_w",
+                    "lasx.xvmod.wu" => "__builtin_lasx_xvmod_wu",
+                    "lasx.xvmskgez.b" => "__builtin_lasx_xvmskgez_b",
+                    "lasx.xvmskltz.b" => "__builtin_lasx_xvmskltz_b",
+                    "lasx.xvmskltz.d" => "__builtin_lasx_xvmskltz_d",
+                    "lasx.xvmskltz.h" => "__builtin_lasx_xvmskltz_h",
+                    "lasx.xvmskltz.w" => "__builtin_lasx_xvmskltz_w",
+                    "lasx.xvmsknz.b" => "__builtin_lasx_xvmsknz_b",
+                    "lasx.xvmsub.b" => "__builtin_lasx_xvmsub_b",
+                    "lasx.xvmsub.d" => "__builtin_lasx_xvmsub_d",
+                    "lasx.xvmsub.h" => "__builtin_lasx_xvmsub_h",
+                    "lasx.xvmsub.w" => "__builtin_lasx_xvmsub_w",
+                    "lasx.xvmuh.b" => "__builtin_lasx_xvmuh_b",
+                    "lasx.xvmuh.bu" => "__builtin_lasx_xvmuh_bu",
+                    "lasx.xvmuh.d" => "__builtin_lasx_xvmuh_d",
+                    "lasx.xvmuh.du" => "__builtin_lasx_xvmuh_du",
+                    "lasx.xvmuh.h" => "__builtin_lasx_xvmuh_h",
+                    "lasx.xvmuh.hu" => "__builtin_lasx_xvmuh_hu",
+                    "lasx.xvmuh.w" => "__builtin_lasx_xvmuh_w",
+                    "lasx.xvmuh.wu" => "__builtin_lasx_xvmuh_wu",
+                    "lasx.xvmul.b" => "__builtin_lasx_xvmul_b",
+                    "lasx.xvmul.d" => "__builtin_lasx_xvmul_d",
+                    "lasx.xvmul.h" => "__builtin_lasx_xvmul_h",
+                    "lasx.xvmul.w" => "__builtin_lasx_xvmul_w",
+                    "lasx.xvmulwev.d.w" => "__builtin_lasx_xvmulwev_d_w",
+                    "lasx.xvmulwev.d.wu" => "__builtin_lasx_xvmulwev_d_wu",
+                    "lasx.xvmulwev.d.wu.w" => "__builtin_lasx_xvmulwev_d_wu_w",
+                    "lasx.xvmulwev.h.b" => "__builtin_lasx_xvmulwev_h_b",
+                    "lasx.xvmulwev.h.bu" => "__builtin_lasx_xvmulwev_h_bu",
+                    "lasx.xvmulwev.h.bu.b" => "__builtin_lasx_xvmulwev_h_bu_b",
+                    "lasx.xvmulwev.q.d" => "__builtin_lasx_xvmulwev_q_d",
+                    "lasx.xvmulwev.q.du" => "__builtin_lasx_xvmulwev_q_du",
+                    "lasx.xvmulwev.q.du.d" => "__builtin_lasx_xvmulwev_q_du_d",
+                    "lasx.xvmulwev.w.h" => "__builtin_lasx_xvmulwev_w_h",
+                    "lasx.xvmulwev.w.hu" => "__builtin_lasx_xvmulwev_w_hu",
+                    "lasx.xvmulwev.w.hu.h" => "__builtin_lasx_xvmulwev_w_hu_h",
+                    "lasx.xvmulwod.d.w" => "__builtin_lasx_xvmulwod_d_w",
+                    "lasx.xvmulwod.d.wu" => "__builtin_lasx_xvmulwod_d_wu",
+                    "lasx.xvmulwod.d.wu.w" => "__builtin_lasx_xvmulwod_d_wu_w",
+                    "lasx.xvmulwod.h.b" => "__builtin_lasx_xvmulwod_h_b",
+                    "lasx.xvmulwod.h.bu" => "__builtin_lasx_xvmulwod_h_bu",
+                    "lasx.xvmulwod.h.bu.b" => "__builtin_lasx_xvmulwod_h_bu_b",
+                    "lasx.xvmulwod.q.d" => "__builtin_lasx_xvmulwod_q_d",
+                    "lasx.xvmulwod.q.du" => "__builtin_lasx_xvmulwod_q_du",
+                    "lasx.xvmulwod.q.du.d" => "__builtin_lasx_xvmulwod_q_du_d",
+                    "lasx.xvmulwod.w.h" => "__builtin_lasx_xvmulwod_w_h",
+                    "lasx.xvmulwod.w.hu" => "__builtin_lasx_xvmulwod_w_hu",
+                    "lasx.xvmulwod.w.hu.h" => "__builtin_lasx_xvmulwod_w_hu_h",
+                    "lasx.xvneg.b" => "__builtin_lasx_xvneg_b",
+                    "lasx.xvneg.d" => "__builtin_lasx_xvneg_d",
+                    "lasx.xvneg.h" => "__builtin_lasx_xvneg_h",
+                    "lasx.xvneg.w" => "__builtin_lasx_xvneg_w",
+                    "lasx.xvnor.v" => "__builtin_lasx_xvnor_v",
+                    "lasx.xvnori.b" => "__builtin_lasx_xvnori_b",
+                    "lasx.xvor.v" => "__builtin_lasx_xvor_v",
+                    "lasx.xvori.b" => "__builtin_lasx_xvori_b",
+                    "lasx.xvorn.v" => "__builtin_lasx_xvorn_v",
+                    "lasx.xvpackev.b" => "__builtin_lasx_xvpackev_b",
+                    "lasx.xvpackev.d" => "__builtin_lasx_xvpackev_d",
+                    "lasx.xvpackev.h" => "__builtin_lasx_xvpackev_h",
+                    "lasx.xvpackev.w" => "__builtin_lasx_xvpackev_w",
+                    "lasx.xvpackod.b" => "__builtin_lasx_xvpackod_b",
+                    "lasx.xvpackod.d" => "__builtin_lasx_xvpackod_d",
+                    "lasx.xvpackod.h" => "__builtin_lasx_xvpackod_h",
+                    "lasx.xvpackod.w" => "__builtin_lasx_xvpackod_w",
+                    "lasx.xvpcnt.b" => "__builtin_lasx_xvpcnt_b",
+                    "lasx.xvpcnt.d" => "__builtin_lasx_xvpcnt_d",
+                    "lasx.xvpcnt.h" => "__builtin_lasx_xvpcnt_h",
+                    "lasx.xvpcnt.w" => "__builtin_lasx_xvpcnt_w",
+                    "lasx.xvperm.w" => "__builtin_lasx_xvperm_w",
+                    "lasx.xvpermi.d" => "__builtin_lasx_xvpermi_d",
+                    "lasx.xvpermi.q" => "__builtin_lasx_xvpermi_q",
+                    "lasx.xvpermi.w" => "__builtin_lasx_xvpermi_w",
+                    "lasx.xvpickev.b" => "__builtin_lasx_xvpickev_b",
+                    "lasx.xvpickev.d" => "__builtin_lasx_xvpickev_d",
+                    "lasx.xvpickev.h" => "__builtin_lasx_xvpickev_h",
+                    "lasx.xvpickev.w" => "__builtin_lasx_xvpickev_w",
+                    "lasx.xvpickod.b" => "__builtin_lasx_xvpickod_b",
+                    "lasx.xvpickod.d" => "__builtin_lasx_xvpickod_d",
+                    "lasx.xvpickod.h" => "__builtin_lasx_xvpickod_h",
+                    "lasx.xvpickod.w" => "__builtin_lasx_xvpickod_w",
+                    "lasx.xvpickve.d" => "__builtin_lasx_xvpickve_d",
+                    "lasx.xvpickve.d.f" => "__builtin_lasx_xvpickve_d_f",
+                    "lasx.xvpickve.w" => "__builtin_lasx_xvpickve_w",
+                    "lasx.xvpickve.w.f" => "__builtin_lasx_xvpickve_w_f",
+                    "lasx.xvpickve2gr.d" => "__builtin_lasx_xvpickve2gr_d",
+                    "lasx.xvpickve2gr.du" => "__builtin_lasx_xvpickve2gr_du",
+                    "lasx.xvpickve2gr.w" => "__builtin_lasx_xvpickve2gr_w",
+                    "lasx.xvpickve2gr.wu" => "__builtin_lasx_xvpickve2gr_wu",
+                    "lasx.xvrepl128vei.b" => "__builtin_lasx_xvrepl128vei_b",
+                    "lasx.xvrepl128vei.d" => "__builtin_lasx_xvrepl128vei_d",
+                    "lasx.xvrepl128vei.h" => "__builtin_lasx_xvrepl128vei_h",
+                    "lasx.xvrepl128vei.w" => "__builtin_lasx_xvrepl128vei_w",
+                    "lasx.xvreplgr2vr.b" => "__builtin_lasx_xvreplgr2vr_b",
+                    "lasx.xvreplgr2vr.d" => "__builtin_lasx_xvreplgr2vr_d",
+                    "lasx.xvreplgr2vr.h" => "__builtin_lasx_xvreplgr2vr_h",
+                    "lasx.xvreplgr2vr.w" => "__builtin_lasx_xvreplgr2vr_w",
+                    "lasx.xvrepli.b" => "__builtin_lasx_xvrepli_b",
+                    "lasx.xvrepli.d" => "__builtin_lasx_xvrepli_d",
+                    "lasx.xvrepli.h" => "__builtin_lasx_xvrepli_h",
+                    "lasx.xvrepli.w" => "__builtin_lasx_xvrepli_w",
+                    "lasx.xvreplve.b" => "__builtin_lasx_xvreplve_b",
+                    "lasx.xvreplve.d" => "__builtin_lasx_xvreplve_d",
+                    "lasx.xvreplve.h" => "__builtin_lasx_xvreplve_h",
+                    "lasx.xvreplve.w" => "__builtin_lasx_xvreplve_w",
+                    "lasx.xvreplve0.b" => "__builtin_lasx_xvreplve0_b",
+                    "lasx.xvreplve0.d" => "__builtin_lasx_xvreplve0_d",
+                    "lasx.xvreplve0.h" => "__builtin_lasx_xvreplve0_h",
+                    "lasx.xvreplve0.q" => "__builtin_lasx_xvreplve0_q",
+                    "lasx.xvreplve0.w" => "__builtin_lasx_xvreplve0_w",
+                    "lasx.xvrotr.b" => "__builtin_lasx_xvrotr_b",
+                    "lasx.xvrotr.d" => "__builtin_lasx_xvrotr_d",
+                    "lasx.xvrotr.h" => "__builtin_lasx_xvrotr_h",
+                    "lasx.xvrotr.w" => "__builtin_lasx_xvrotr_w",
+                    "lasx.xvrotri.b" => "__builtin_lasx_xvrotri_b",
+                    "lasx.xvrotri.d" => "__builtin_lasx_xvrotri_d",
+                    "lasx.xvrotri.h" => "__builtin_lasx_xvrotri_h",
+                    "lasx.xvrotri.w" => "__builtin_lasx_xvrotri_w",
+                    "lasx.xvsadd.b" => "__builtin_lasx_xvsadd_b",
+                    "lasx.xvsadd.bu" => "__builtin_lasx_xvsadd_bu",
+                    "lasx.xvsadd.d" => "__builtin_lasx_xvsadd_d",
+                    "lasx.xvsadd.du" => "__builtin_lasx_xvsadd_du",
+                    "lasx.xvsadd.h" => "__builtin_lasx_xvsadd_h",
+                    "lasx.xvsadd.hu" => "__builtin_lasx_xvsadd_hu",
+                    "lasx.xvsadd.w" => "__builtin_lasx_xvsadd_w",
+                    "lasx.xvsadd.wu" => "__builtin_lasx_xvsadd_wu",
+                    "lasx.xvsat.b" => "__builtin_lasx_xvsat_b",
+                    "lasx.xvsat.bu" => "__builtin_lasx_xvsat_bu",
+                    "lasx.xvsat.d" => "__builtin_lasx_xvsat_d",
+                    "lasx.xvsat.du" => "__builtin_lasx_xvsat_du",
+                    "lasx.xvsat.h" => "__builtin_lasx_xvsat_h",
+                    "lasx.xvsat.hu" => "__builtin_lasx_xvsat_hu",
+                    "lasx.xvsat.w" => "__builtin_lasx_xvsat_w",
+                    "lasx.xvsat.wu" => "__builtin_lasx_xvsat_wu",
+                    "lasx.xvseq.b" => "__builtin_lasx_xvseq_b",
+                    "lasx.xvseq.d" => "__builtin_lasx_xvseq_d",
+                    "lasx.xvseq.h" => "__builtin_lasx_xvseq_h",
+                    "lasx.xvseq.w" => "__builtin_lasx_xvseq_w",
+                    "lasx.xvseqi.b" => "__builtin_lasx_xvseqi_b",
+                    "lasx.xvseqi.d" => "__builtin_lasx_xvseqi_d",
+                    "lasx.xvseqi.h" => "__builtin_lasx_xvseqi_h",
+                    "lasx.xvseqi.w" => "__builtin_lasx_xvseqi_w",
+                    "lasx.xvshuf.b" => "__builtin_lasx_xvshuf_b",
+                    "lasx.xvshuf.d" => "__builtin_lasx_xvshuf_d",
+                    "lasx.xvshuf.h" => "__builtin_lasx_xvshuf_h",
+                    "lasx.xvshuf.w" => "__builtin_lasx_xvshuf_w",
+                    "lasx.xvshuf4i.b" => "__builtin_lasx_xvshuf4i_b",
+                    "lasx.xvshuf4i.d" => "__builtin_lasx_xvshuf4i_d",
+                    "lasx.xvshuf4i.h" => "__builtin_lasx_xvshuf4i_h",
+                    "lasx.xvshuf4i.w" => "__builtin_lasx_xvshuf4i_w",
+                    "lasx.xvsigncov.b" => "__builtin_lasx_xvsigncov_b",
+                    "lasx.xvsigncov.d" => "__builtin_lasx_xvsigncov_d",
+                    "lasx.xvsigncov.h" => "__builtin_lasx_xvsigncov_h",
+                    "lasx.xvsigncov.w" => "__builtin_lasx_xvsigncov_w",
+                    "lasx.xvsle.b" => "__builtin_lasx_xvsle_b",
+                    "lasx.xvsle.bu" => "__builtin_lasx_xvsle_bu",
+                    "lasx.xvsle.d" => "__builtin_lasx_xvsle_d",
+                    "lasx.xvsle.du" => "__builtin_lasx_xvsle_du",
+                    "lasx.xvsle.h" => "__builtin_lasx_xvsle_h",
+                    "lasx.xvsle.hu" => "__builtin_lasx_xvsle_hu",
+                    "lasx.xvsle.w" => "__builtin_lasx_xvsle_w",
+                    "lasx.xvsle.wu" => "__builtin_lasx_xvsle_wu",
+                    "lasx.xvslei.b" => "__builtin_lasx_xvslei_b",
+                    "lasx.xvslei.bu" => "__builtin_lasx_xvslei_bu",
+                    "lasx.xvslei.d" => "__builtin_lasx_xvslei_d",
+                    "lasx.xvslei.du" => "__builtin_lasx_xvslei_du",
+                    "lasx.xvslei.h" => "__builtin_lasx_xvslei_h",
+                    "lasx.xvslei.hu" => "__builtin_lasx_xvslei_hu",
+                    "lasx.xvslei.w" => "__builtin_lasx_xvslei_w",
+                    "lasx.xvslei.wu" => "__builtin_lasx_xvslei_wu",
+                    "lasx.xvsll.b" => "__builtin_lasx_xvsll_b",
+                    "lasx.xvsll.d" => "__builtin_lasx_xvsll_d",
+                    "lasx.xvsll.h" => "__builtin_lasx_xvsll_h",
+                    "lasx.xvsll.w" => "__builtin_lasx_xvsll_w",
+                    "lasx.xvslli.b" => "__builtin_lasx_xvslli_b",
+                    "lasx.xvslli.d" => "__builtin_lasx_xvslli_d",
+                    "lasx.xvslli.h" => "__builtin_lasx_xvslli_h",
+                    "lasx.xvslli.w" => "__builtin_lasx_xvslli_w",
+                    "lasx.xvsllwil.d.w" => "__builtin_lasx_xvsllwil_d_w",
+                    "lasx.xvsllwil.du.wu" => "__builtin_lasx_xvsllwil_du_wu",
+                    "lasx.xvsllwil.h.b" => "__builtin_lasx_xvsllwil_h_b",
+                    "lasx.xvsllwil.hu.bu" => "__builtin_lasx_xvsllwil_hu_bu",
+                    "lasx.xvsllwil.w.h" => "__builtin_lasx_xvsllwil_w_h",
+                    "lasx.xvsllwil.wu.hu" => "__builtin_lasx_xvsllwil_wu_hu",
+                    "lasx.xvslt.b" => "__builtin_lasx_xvslt_b",
+                    "lasx.xvslt.bu" => "__builtin_lasx_xvslt_bu",
+                    "lasx.xvslt.d" => "__builtin_lasx_xvslt_d",
+                    "lasx.xvslt.du" => "__builtin_lasx_xvslt_du",
+                    "lasx.xvslt.h" => "__builtin_lasx_xvslt_h",
+                    "lasx.xvslt.hu" => "__builtin_lasx_xvslt_hu",
+                    "lasx.xvslt.w" => "__builtin_lasx_xvslt_w",
+                    "lasx.xvslt.wu" => "__builtin_lasx_xvslt_wu",
+                    "lasx.xvslti.b" => "__builtin_lasx_xvslti_b",
+                    "lasx.xvslti.bu" => "__builtin_lasx_xvslti_bu",
+                    "lasx.xvslti.d" => "__builtin_lasx_xvslti_d",
+                    "lasx.xvslti.du" => "__builtin_lasx_xvslti_du",
+                    "lasx.xvslti.h" => "__builtin_lasx_xvslti_h",
+                    "lasx.xvslti.hu" => "__builtin_lasx_xvslti_hu",
+                    "lasx.xvslti.w" => "__builtin_lasx_xvslti_w",
+                    "lasx.xvslti.wu" => "__builtin_lasx_xvslti_wu",
+                    "lasx.xvsra.b" => "__builtin_lasx_xvsra_b",
+                    "lasx.xvsra.d" => "__builtin_lasx_xvsra_d",
+                    "lasx.xvsra.h" => "__builtin_lasx_xvsra_h",
+                    "lasx.xvsra.w" => "__builtin_lasx_xvsra_w",
+                    "lasx.xvsrai.b" => "__builtin_lasx_xvsrai_b",
+                    "lasx.xvsrai.d" => "__builtin_lasx_xvsrai_d",
+                    "lasx.xvsrai.h" => "__builtin_lasx_xvsrai_h",
+                    "lasx.xvsrai.w" => "__builtin_lasx_xvsrai_w",
+                    "lasx.xvsran.b.h" => "__builtin_lasx_xvsran_b_h",
+                    "lasx.xvsran.h.w" => "__builtin_lasx_xvsran_h_w",
+                    "lasx.xvsran.w.d" => "__builtin_lasx_xvsran_w_d",
+                    "lasx.xvsrani.b.h" => "__builtin_lasx_xvsrani_b_h",
+                    "lasx.xvsrani.d.q" => "__builtin_lasx_xvsrani_d_q",
+                    "lasx.xvsrani.h.w" => "__builtin_lasx_xvsrani_h_w",
+                    "lasx.xvsrani.w.d" => "__builtin_lasx_xvsrani_w_d",
+                    "lasx.xvsrar.b" => "__builtin_lasx_xvsrar_b",
+                    "lasx.xvsrar.d" => "__builtin_lasx_xvsrar_d",
+                    "lasx.xvsrar.h" => "__builtin_lasx_xvsrar_h",
+                    "lasx.xvsrar.w" => "__builtin_lasx_xvsrar_w",
+                    "lasx.xvsrari.b" => "__builtin_lasx_xvsrari_b",
+                    "lasx.xvsrari.d" => "__builtin_lasx_xvsrari_d",
+                    "lasx.xvsrari.h" => "__builtin_lasx_xvsrari_h",
+                    "lasx.xvsrari.w" => "__builtin_lasx_xvsrari_w",
+                    "lasx.xvsrarn.b.h" => "__builtin_lasx_xvsrarn_b_h",
+                    "lasx.xvsrarn.h.w" => "__builtin_lasx_xvsrarn_h_w",
+                    "lasx.xvsrarn.w.d" => "__builtin_lasx_xvsrarn_w_d",
+                    "lasx.xvsrarni.b.h" => "__builtin_lasx_xvsrarni_b_h",
+                    "lasx.xvsrarni.d.q" => "__builtin_lasx_xvsrarni_d_q",
+                    "lasx.xvsrarni.h.w" => "__builtin_lasx_xvsrarni_h_w",
+                    "lasx.xvsrarni.w.d" => "__builtin_lasx_xvsrarni_w_d",
+                    "lasx.xvsrl.b" => "__builtin_lasx_xvsrl_b",
+                    "lasx.xvsrl.d" => "__builtin_lasx_xvsrl_d",
+                    "lasx.xvsrl.h" => "__builtin_lasx_xvsrl_h",
+                    "lasx.xvsrl.w" => "__builtin_lasx_xvsrl_w",
+                    "lasx.xvsrli.b" => "__builtin_lasx_xvsrli_b",
+                    "lasx.xvsrli.d" => "__builtin_lasx_xvsrli_d",
+                    "lasx.xvsrli.h" => "__builtin_lasx_xvsrli_h",
+                    "lasx.xvsrli.w" => "__builtin_lasx_xvsrli_w",
+                    "lasx.xvsrln.b.h" => "__builtin_lasx_xvsrln_b_h",
+                    "lasx.xvsrln.h.w" => "__builtin_lasx_xvsrln_h_w",
+                    "lasx.xvsrln.w.d" => "__builtin_lasx_xvsrln_w_d",
+                    "lasx.xvsrlni.b.h" => "__builtin_lasx_xvsrlni_b_h",
+                    "lasx.xvsrlni.d.q" => "__builtin_lasx_xvsrlni_d_q",
+                    "lasx.xvsrlni.h.w" => "__builtin_lasx_xvsrlni_h_w",
+                    "lasx.xvsrlni.w.d" => "__builtin_lasx_xvsrlni_w_d",
+                    "lasx.xvsrlr.b" => "__builtin_lasx_xvsrlr_b",
+                    "lasx.xvsrlr.d" => "__builtin_lasx_xvsrlr_d",
+                    "lasx.xvsrlr.h" => "__builtin_lasx_xvsrlr_h",
+                    "lasx.xvsrlr.w" => "__builtin_lasx_xvsrlr_w",
+                    "lasx.xvsrlri.b" => "__builtin_lasx_xvsrlri_b",
+                    "lasx.xvsrlri.d" => "__builtin_lasx_xvsrlri_d",
+                    "lasx.xvsrlri.h" => "__builtin_lasx_xvsrlri_h",
+                    "lasx.xvsrlri.w" => "__builtin_lasx_xvsrlri_w",
+                    "lasx.xvsrlrn.b.h" => "__builtin_lasx_xvsrlrn_b_h",
+                    "lasx.xvsrlrn.h.w" => "__builtin_lasx_xvsrlrn_h_w",
+                    "lasx.xvsrlrn.w.d" => "__builtin_lasx_xvsrlrn_w_d",
+                    "lasx.xvsrlrni.b.h" => "__builtin_lasx_xvsrlrni_b_h",
+                    "lasx.xvsrlrni.d.q" => "__builtin_lasx_xvsrlrni_d_q",
+                    "lasx.xvsrlrni.h.w" => "__builtin_lasx_xvsrlrni_h_w",
+                    "lasx.xvsrlrni.w.d" => "__builtin_lasx_xvsrlrni_w_d",
+                    "lasx.xvssran.b.h" => "__builtin_lasx_xvssran_b_h",
+                    "lasx.xvssran.bu.h" => "__builtin_lasx_xvssran_bu_h",
+                    "lasx.xvssran.h.w" => "__builtin_lasx_xvssran_h_w",
+                    "lasx.xvssran.hu.w" => "__builtin_lasx_xvssran_hu_w",
+                    "lasx.xvssran.w.d" => "__builtin_lasx_xvssran_w_d",
+                    "lasx.xvssran.wu.d" => "__builtin_lasx_xvssran_wu_d",
+                    "lasx.xvssrani.b.h" => "__builtin_lasx_xvssrani_b_h",
+                    "lasx.xvssrani.bu.h" => "__builtin_lasx_xvssrani_bu_h",
+                    "lasx.xvssrani.d.q" => "__builtin_lasx_xvssrani_d_q",
+                    "lasx.xvssrani.du.q" => "__builtin_lasx_xvssrani_du_q",
+                    "lasx.xvssrani.h.w" => "__builtin_lasx_xvssrani_h_w",
+                    "lasx.xvssrani.hu.w" => "__builtin_lasx_xvssrani_hu_w",
+                    "lasx.xvssrani.w.d" => "__builtin_lasx_xvssrani_w_d",
+                    "lasx.xvssrani.wu.d" => "__builtin_lasx_xvssrani_wu_d",
+                    "lasx.xvssrarn.b.h" => "__builtin_lasx_xvssrarn_b_h",
+                    "lasx.xvssrarn.bu.h" => "__builtin_lasx_xvssrarn_bu_h",
+                    "lasx.xvssrarn.h.w" => "__builtin_lasx_xvssrarn_h_w",
+                    "lasx.xvssrarn.hu.w" => "__builtin_lasx_xvssrarn_hu_w",
+                    "lasx.xvssrarn.w.d" => "__builtin_lasx_xvssrarn_w_d",
+                    "lasx.xvssrarn.wu.d" => "__builtin_lasx_xvssrarn_wu_d",
+                    "lasx.xvssrarni.b.h" => "__builtin_lasx_xvssrarni_b_h",
+                    "lasx.xvssrarni.bu.h" => "__builtin_lasx_xvssrarni_bu_h",
+                    "lasx.xvssrarni.d.q" => "__builtin_lasx_xvssrarni_d_q",
+                    "lasx.xvssrarni.du.q" => "__builtin_lasx_xvssrarni_du_q",
+                    "lasx.xvssrarni.h.w" => "__builtin_lasx_xvssrarni_h_w",
+                    "lasx.xvssrarni.hu.w" => "__builtin_lasx_xvssrarni_hu_w",
+                    "lasx.xvssrarni.w.d" => "__builtin_lasx_xvssrarni_w_d",
+                    "lasx.xvssrarni.wu.d" => "__builtin_lasx_xvssrarni_wu_d",
+                    "lasx.xvssrln.b.h" => "__builtin_lasx_xvssrln_b_h",
+                    "lasx.xvssrln.bu.h" => "__builtin_lasx_xvssrln_bu_h",
+                    "lasx.xvssrln.h.w" => "__builtin_lasx_xvssrln_h_w",
+                    "lasx.xvssrln.hu.w" => "__builtin_lasx_xvssrln_hu_w",
+                    "lasx.xvssrln.w.d" => "__builtin_lasx_xvssrln_w_d",
+                    "lasx.xvssrln.wu.d" => "__builtin_lasx_xvssrln_wu_d",
+                    "lasx.xvssrlni.b.h" => "__builtin_lasx_xvssrlni_b_h",
+                    "lasx.xvssrlni.bu.h" => "__builtin_lasx_xvssrlni_bu_h",
+                    "lasx.xvssrlni.d.q" => "__builtin_lasx_xvssrlni_d_q",
+                    "lasx.xvssrlni.du.q" => "__builtin_lasx_xvssrlni_du_q",
+                    "lasx.xvssrlni.h.w" => "__builtin_lasx_xvssrlni_h_w",
+                    "lasx.xvssrlni.hu.w" => "__builtin_lasx_xvssrlni_hu_w",
+                    "lasx.xvssrlni.w.d" => "__builtin_lasx_xvssrlni_w_d",
+                    "lasx.xvssrlni.wu.d" => "__builtin_lasx_xvssrlni_wu_d",
+                    "lasx.xvssrlrn.b.h" => "__builtin_lasx_xvssrlrn_b_h",
+                    "lasx.xvssrlrn.bu.h" => "__builtin_lasx_xvssrlrn_bu_h",
+                    "lasx.xvssrlrn.h.w" => "__builtin_lasx_xvssrlrn_h_w",
+                    "lasx.xvssrlrn.hu.w" => "__builtin_lasx_xvssrlrn_hu_w",
+                    "lasx.xvssrlrn.w.d" => "__builtin_lasx_xvssrlrn_w_d",
+                    "lasx.xvssrlrn.wu.d" => "__builtin_lasx_xvssrlrn_wu_d",
+                    "lasx.xvssrlrni.b.h" => "__builtin_lasx_xvssrlrni_b_h",
+                    "lasx.xvssrlrni.bu.h" => "__builtin_lasx_xvssrlrni_bu_h",
+                    "lasx.xvssrlrni.d.q" => "__builtin_lasx_xvssrlrni_d_q",
+                    "lasx.xvssrlrni.du.q" => "__builtin_lasx_xvssrlrni_du_q",
+                    "lasx.xvssrlrni.h.w" => "__builtin_lasx_xvssrlrni_h_w",
+                    "lasx.xvssrlrni.hu.w" => "__builtin_lasx_xvssrlrni_hu_w",
+                    "lasx.xvssrlrni.w.d" => "__builtin_lasx_xvssrlrni_w_d",
+                    "lasx.xvssrlrni.wu.d" => "__builtin_lasx_xvssrlrni_wu_d",
+                    "lasx.xvssub.b" => "__builtin_lasx_xvssub_b",
+                    "lasx.xvssub.bu" => "__builtin_lasx_xvssub_bu",
+                    "lasx.xvssub.d" => "__builtin_lasx_xvssub_d",
+                    "lasx.xvssub.du" => "__builtin_lasx_xvssub_du",
+                    "lasx.xvssub.h" => "__builtin_lasx_xvssub_h",
+                    "lasx.xvssub.hu" => "__builtin_lasx_xvssub_hu",
+                    "lasx.xvssub.w" => "__builtin_lasx_xvssub_w",
+                    "lasx.xvssub.wu" => "__builtin_lasx_xvssub_wu",
+                    "lasx.xvst" => "__builtin_lasx_xvst",
+                    "lasx.xvstelm.b" => "__builtin_lasx_xvstelm_b",
+                    "lasx.xvstelm.d" => "__builtin_lasx_xvstelm_d",
+                    "lasx.xvstelm.h" => "__builtin_lasx_xvstelm_h",
+                    "lasx.xvstelm.w" => "__builtin_lasx_xvstelm_w",
+                    "lasx.xvstx" => "__builtin_lasx_xvstx",
+                    "lasx.xvsub.b" => "__builtin_lasx_xvsub_b",
+                    "lasx.xvsub.d" => "__builtin_lasx_xvsub_d",
+                    "lasx.xvsub.h" => "__builtin_lasx_xvsub_h",
+                    "lasx.xvsub.q" => "__builtin_lasx_xvsub_q",
+                    "lasx.xvsub.w" => "__builtin_lasx_xvsub_w",
+                    "lasx.xvsubi.bu" => "__builtin_lasx_xvsubi_bu",
+                    "lasx.xvsubi.du" => "__builtin_lasx_xvsubi_du",
+                    "lasx.xvsubi.hu" => "__builtin_lasx_xvsubi_hu",
+                    "lasx.xvsubi.wu" => "__builtin_lasx_xvsubi_wu",
+                    "lasx.xvsubwev.d.w" => "__builtin_lasx_xvsubwev_d_w",
+                    "lasx.xvsubwev.d.wu" => "__builtin_lasx_xvsubwev_d_wu",
+                    "lasx.xvsubwev.h.b" => "__builtin_lasx_xvsubwev_h_b",
+                    "lasx.xvsubwev.h.bu" => "__builtin_lasx_xvsubwev_h_bu",
+                    "lasx.xvsubwev.q.d" => "__builtin_lasx_xvsubwev_q_d",
+                    "lasx.xvsubwev.q.du" => "__builtin_lasx_xvsubwev_q_du",
+                    "lasx.xvsubwev.w.h" => "__builtin_lasx_xvsubwev_w_h",
+                    "lasx.xvsubwev.w.hu" => "__builtin_lasx_xvsubwev_w_hu",
+                    "lasx.xvsubwod.d.w" => "__builtin_lasx_xvsubwod_d_w",
+                    "lasx.xvsubwod.d.wu" => "__builtin_lasx_xvsubwod_d_wu",
+                    "lasx.xvsubwod.h.b" => "__builtin_lasx_xvsubwod_h_b",
+                    "lasx.xvsubwod.h.bu" => "__builtin_lasx_xvsubwod_h_bu",
+                    "lasx.xvsubwod.q.d" => "__builtin_lasx_xvsubwod_q_d",
+                    "lasx.xvsubwod.q.du" => "__builtin_lasx_xvsubwod_q_du",
+                    "lasx.xvsubwod.w.h" => "__builtin_lasx_xvsubwod_w_h",
+                    "lasx.xvsubwod.w.hu" => "__builtin_lasx_xvsubwod_w_hu",
+                    "lasx.xvxor.v" => "__builtin_lasx_xvxor_v",
+                    "lasx.xvxori.b" => "__builtin_lasx_xvxori_b",
+                    "lddir.d" => "__builtin_loongarch_lddir_d",
+                    "ldpte.d" => "__builtin_loongarch_ldpte_d",
+                    "lsx.bnz.b" => "__builtin_lsx_bnz_b",
+                    "lsx.bnz.d" => "__builtin_lsx_bnz_d",
+                    "lsx.bnz.h" => "__builtin_lsx_bnz_h",
+                    "lsx.bnz.v" => "__builtin_lsx_bnz_v",
+                    "lsx.bnz.w" => "__builtin_lsx_bnz_w",
+                    "lsx.bz.b" => "__builtin_lsx_bz_b",
+                    "lsx.bz.d" => "__builtin_lsx_bz_d",
+                    "lsx.bz.h" => "__builtin_lsx_bz_h",
+                    "lsx.bz.v" => "__builtin_lsx_bz_v",
+                    "lsx.bz.w" => "__builtin_lsx_bz_w",
+                    "lsx.vabsd.b" => "__builtin_lsx_vabsd_b",
+                    "lsx.vabsd.bu" => "__builtin_lsx_vabsd_bu",
+                    "lsx.vabsd.d" => "__builtin_lsx_vabsd_d",
+                    "lsx.vabsd.du" => "__builtin_lsx_vabsd_du",
+                    "lsx.vabsd.h" => "__builtin_lsx_vabsd_h",
+                    "lsx.vabsd.hu" => "__builtin_lsx_vabsd_hu",
+                    "lsx.vabsd.w" => "__builtin_lsx_vabsd_w",
+                    "lsx.vabsd.wu" => "__builtin_lsx_vabsd_wu",
+                    "lsx.vadd.b" => "__builtin_lsx_vadd_b",
+                    "lsx.vadd.d" => "__builtin_lsx_vadd_d",
+                    "lsx.vadd.h" => "__builtin_lsx_vadd_h",
+                    "lsx.vadd.q" => "__builtin_lsx_vadd_q",
+                    "lsx.vadd.w" => "__builtin_lsx_vadd_w",
+                    "lsx.vadda.b" => "__builtin_lsx_vadda_b",
+                    "lsx.vadda.d" => "__builtin_lsx_vadda_d",
+                    "lsx.vadda.h" => "__builtin_lsx_vadda_h",
+                    "lsx.vadda.w" => "__builtin_lsx_vadda_w",
+                    "lsx.vaddi.bu" => "__builtin_lsx_vaddi_bu",
+                    "lsx.vaddi.du" => "__builtin_lsx_vaddi_du",
+                    "lsx.vaddi.hu" => "__builtin_lsx_vaddi_hu",
+                    "lsx.vaddi.wu" => "__builtin_lsx_vaddi_wu",
+                    "lsx.vaddwev.d.w" => "__builtin_lsx_vaddwev_d_w",
+                    "lsx.vaddwev.d.wu" => "__builtin_lsx_vaddwev_d_wu",
+                    "lsx.vaddwev.d.wu.w" => "__builtin_lsx_vaddwev_d_wu_w",
+                    "lsx.vaddwev.h.b" => "__builtin_lsx_vaddwev_h_b",
+                    "lsx.vaddwev.h.bu" => "__builtin_lsx_vaddwev_h_bu",
+                    "lsx.vaddwev.h.bu.b" => "__builtin_lsx_vaddwev_h_bu_b",
+                    "lsx.vaddwev.q.d" => "__builtin_lsx_vaddwev_q_d",
+                    "lsx.vaddwev.q.du" => "__builtin_lsx_vaddwev_q_du",
+                    "lsx.vaddwev.q.du.d" => "__builtin_lsx_vaddwev_q_du_d",
+                    "lsx.vaddwev.w.h" => "__builtin_lsx_vaddwev_w_h",
+                    "lsx.vaddwev.w.hu" => "__builtin_lsx_vaddwev_w_hu",
+                    "lsx.vaddwev.w.hu.h" => "__builtin_lsx_vaddwev_w_hu_h",
+                    "lsx.vaddwod.d.w" => "__builtin_lsx_vaddwod_d_w",
+                    "lsx.vaddwod.d.wu" => "__builtin_lsx_vaddwod_d_wu",
+                    "lsx.vaddwod.d.wu.w" => "__builtin_lsx_vaddwod_d_wu_w",
+                    "lsx.vaddwod.h.b" => "__builtin_lsx_vaddwod_h_b",
+                    "lsx.vaddwod.h.bu" => "__builtin_lsx_vaddwod_h_bu",
+                    "lsx.vaddwod.h.bu.b" => "__builtin_lsx_vaddwod_h_bu_b",
+                    "lsx.vaddwod.q.d" => "__builtin_lsx_vaddwod_q_d",
+                    "lsx.vaddwod.q.du" => "__builtin_lsx_vaddwod_q_du",
+                    "lsx.vaddwod.q.du.d" => "__builtin_lsx_vaddwod_q_du_d",
+                    "lsx.vaddwod.w.h" => "__builtin_lsx_vaddwod_w_h",
+                    "lsx.vaddwod.w.hu" => "__builtin_lsx_vaddwod_w_hu",
+                    "lsx.vaddwod.w.hu.h" => "__builtin_lsx_vaddwod_w_hu_h",
+                    "lsx.vand.v" => "__builtin_lsx_vand_v",
+                    "lsx.vandi.b" => "__builtin_lsx_vandi_b",
+                    "lsx.vandn.v" => "__builtin_lsx_vandn_v",
+                    "lsx.vavg.b" => "__builtin_lsx_vavg_b",
+                    "lsx.vavg.bu" => "__builtin_lsx_vavg_bu",
+                    "lsx.vavg.d" => "__builtin_lsx_vavg_d",
+                    "lsx.vavg.du" => "__builtin_lsx_vavg_du",
+                    "lsx.vavg.h" => "__builtin_lsx_vavg_h",
+                    "lsx.vavg.hu" => "__builtin_lsx_vavg_hu",
+                    "lsx.vavg.w" => "__builtin_lsx_vavg_w",
+                    "lsx.vavg.wu" => "__builtin_lsx_vavg_wu",
+                    "lsx.vavgr.b" => "__builtin_lsx_vavgr_b",
+                    "lsx.vavgr.bu" => "__builtin_lsx_vavgr_bu",
+                    "lsx.vavgr.d" => "__builtin_lsx_vavgr_d",
+                    "lsx.vavgr.du" => "__builtin_lsx_vavgr_du",
+                    "lsx.vavgr.h" => "__builtin_lsx_vavgr_h",
+                    "lsx.vavgr.hu" => "__builtin_lsx_vavgr_hu",
+                    "lsx.vavgr.w" => "__builtin_lsx_vavgr_w",
+                    "lsx.vavgr.wu" => "__builtin_lsx_vavgr_wu",
+                    "lsx.vbitclr.b" => "__builtin_lsx_vbitclr_b",
+                    "lsx.vbitclr.d" => "__builtin_lsx_vbitclr_d",
+                    "lsx.vbitclr.h" => "__builtin_lsx_vbitclr_h",
+                    "lsx.vbitclr.w" => "__builtin_lsx_vbitclr_w",
+                    "lsx.vbitclri.b" => "__builtin_lsx_vbitclri_b",
+                    "lsx.vbitclri.d" => "__builtin_lsx_vbitclri_d",
+                    "lsx.vbitclri.h" => "__builtin_lsx_vbitclri_h",
+                    "lsx.vbitclri.w" => "__builtin_lsx_vbitclri_w",
+                    "lsx.vbitrev.b" => "__builtin_lsx_vbitrev_b",
+                    "lsx.vbitrev.d" => "__builtin_lsx_vbitrev_d",
+                    "lsx.vbitrev.h" => "__builtin_lsx_vbitrev_h",
+                    "lsx.vbitrev.w" => "__builtin_lsx_vbitrev_w",
+                    "lsx.vbitrevi.b" => "__builtin_lsx_vbitrevi_b",
+                    "lsx.vbitrevi.d" => "__builtin_lsx_vbitrevi_d",
+                    "lsx.vbitrevi.h" => "__builtin_lsx_vbitrevi_h",
+                    "lsx.vbitrevi.w" => "__builtin_lsx_vbitrevi_w",
+                    "lsx.vbitsel.v" => "__builtin_lsx_vbitsel_v",
+                    "lsx.vbitseli.b" => "__builtin_lsx_vbitseli_b",
+                    "lsx.vbitset.b" => "__builtin_lsx_vbitset_b",
+                    "lsx.vbitset.d" => "__builtin_lsx_vbitset_d",
+                    "lsx.vbitset.h" => "__builtin_lsx_vbitset_h",
+                    "lsx.vbitset.w" => "__builtin_lsx_vbitset_w",
+                    "lsx.vbitseti.b" => "__builtin_lsx_vbitseti_b",
+                    "lsx.vbitseti.d" => "__builtin_lsx_vbitseti_d",
+                    "lsx.vbitseti.h" => "__builtin_lsx_vbitseti_h",
+                    "lsx.vbitseti.w" => "__builtin_lsx_vbitseti_w",
+                    "lsx.vbsll.v" => "__builtin_lsx_vbsll_v",
+                    "lsx.vbsrl.v" => "__builtin_lsx_vbsrl_v",
+                    "lsx.vclo.b" => "__builtin_lsx_vclo_b",
+                    "lsx.vclo.d" => "__builtin_lsx_vclo_d",
+                    "lsx.vclo.h" => "__builtin_lsx_vclo_h",
+                    "lsx.vclo.w" => "__builtin_lsx_vclo_w",
+                    "lsx.vclz.b" => "__builtin_lsx_vclz_b",
+                    "lsx.vclz.d" => "__builtin_lsx_vclz_d",
+                    "lsx.vclz.h" => "__builtin_lsx_vclz_h",
+                    "lsx.vclz.w" => "__builtin_lsx_vclz_w",
+                    "lsx.vdiv.b" => "__builtin_lsx_vdiv_b",
+                    "lsx.vdiv.bu" => "__builtin_lsx_vdiv_bu",
+                    "lsx.vdiv.d" => "__builtin_lsx_vdiv_d",
+                    "lsx.vdiv.du" => "__builtin_lsx_vdiv_du",
+                    "lsx.vdiv.h" => "__builtin_lsx_vdiv_h",
+                    "lsx.vdiv.hu" => "__builtin_lsx_vdiv_hu",
+                    "lsx.vdiv.w" => "__builtin_lsx_vdiv_w",
+                    "lsx.vdiv.wu" => "__builtin_lsx_vdiv_wu",
+                    "lsx.vexth.d.w" => "__builtin_lsx_vexth_d_w",
+                    "lsx.vexth.du.wu" => "__builtin_lsx_vexth_du_wu",
+                    "lsx.vexth.h.b" => "__builtin_lsx_vexth_h_b",
+                    "lsx.vexth.hu.bu" => "__builtin_lsx_vexth_hu_bu",
+                    "lsx.vexth.q.d" => "__builtin_lsx_vexth_q_d",
+                    "lsx.vexth.qu.du" => "__builtin_lsx_vexth_qu_du",
+                    "lsx.vexth.w.h" => "__builtin_lsx_vexth_w_h",
+                    "lsx.vexth.wu.hu" => "__builtin_lsx_vexth_wu_hu",
+                    "lsx.vextl.q.d" => "__builtin_lsx_vextl_q_d",
+                    "lsx.vextl.qu.du" => "__builtin_lsx_vextl_qu_du",
+                    "lsx.vextrins.b" => "__builtin_lsx_vextrins_b",
+                    "lsx.vextrins.d" => "__builtin_lsx_vextrins_d",
+                    "lsx.vextrins.h" => "__builtin_lsx_vextrins_h",
+                    "lsx.vextrins.w" => "__builtin_lsx_vextrins_w",
+                    "lsx.vfadd.d" => "__builtin_lsx_vfadd_d",
+                    "lsx.vfadd.s" => "__builtin_lsx_vfadd_s",
+                    "lsx.vfclass.d" => "__builtin_lsx_vfclass_d",
+                    "lsx.vfclass.s" => "__builtin_lsx_vfclass_s",
+                    "lsx.vfcmp.caf.d" => "__builtin_lsx_vfcmp_caf_d",
+                    "lsx.vfcmp.caf.s" => "__builtin_lsx_vfcmp_caf_s",
+                    "lsx.vfcmp.ceq.d" => "__builtin_lsx_vfcmp_ceq_d",
+                    "lsx.vfcmp.ceq.s" => "__builtin_lsx_vfcmp_ceq_s",
+                    "lsx.vfcmp.cle.d" => "__builtin_lsx_vfcmp_cle_d",
+                    "lsx.vfcmp.cle.s" => "__builtin_lsx_vfcmp_cle_s",
+                    "lsx.vfcmp.clt.d" => "__builtin_lsx_vfcmp_clt_d",
+                    "lsx.vfcmp.clt.s" => "__builtin_lsx_vfcmp_clt_s",
+                    "lsx.vfcmp.cne.d" => "__builtin_lsx_vfcmp_cne_d",
+                    "lsx.vfcmp.cne.s" => "__builtin_lsx_vfcmp_cne_s",
+                    "lsx.vfcmp.cor.d" => "__builtin_lsx_vfcmp_cor_d",
+                    "lsx.vfcmp.cor.s" => "__builtin_lsx_vfcmp_cor_s",
+                    "lsx.vfcmp.cueq.d" => "__builtin_lsx_vfcmp_cueq_d",
+                    "lsx.vfcmp.cueq.s" => "__builtin_lsx_vfcmp_cueq_s",
+                    "lsx.vfcmp.cule.d" => "__builtin_lsx_vfcmp_cule_d",
+                    "lsx.vfcmp.cule.s" => "__builtin_lsx_vfcmp_cule_s",
+                    "lsx.vfcmp.cult.d" => "__builtin_lsx_vfcmp_cult_d",
+                    "lsx.vfcmp.cult.s" => "__builtin_lsx_vfcmp_cult_s",
+                    "lsx.vfcmp.cun.d" => "__builtin_lsx_vfcmp_cun_d",
+                    "lsx.vfcmp.cun.s" => "__builtin_lsx_vfcmp_cun_s",
+                    "lsx.vfcmp.cune.d" => "__builtin_lsx_vfcmp_cune_d",
+                    "lsx.vfcmp.cune.s" => "__builtin_lsx_vfcmp_cune_s",
+                    "lsx.vfcmp.saf.d" => "__builtin_lsx_vfcmp_saf_d",
+                    "lsx.vfcmp.saf.s" => "__builtin_lsx_vfcmp_saf_s",
+                    "lsx.vfcmp.seq.d" => "__builtin_lsx_vfcmp_seq_d",
+                    "lsx.vfcmp.seq.s" => "__builtin_lsx_vfcmp_seq_s",
+                    "lsx.vfcmp.sle.d" => "__builtin_lsx_vfcmp_sle_d",
+                    "lsx.vfcmp.sle.s" => "__builtin_lsx_vfcmp_sle_s",
+                    "lsx.vfcmp.slt.d" => "__builtin_lsx_vfcmp_slt_d",
+                    "lsx.vfcmp.slt.s" => "__builtin_lsx_vfcmp_slt_s",
+                    "lsx.vfcmp.sne.d" => "__builtin_lsx_vfcmp_sne_d",
+                    "lsx.vfcmp.sne.s" => "__builtin_lsx_vfcmp_sne_s",
+                    "lsx.vfcmp.sor.d" => "__builtin_lsx_vfcmp_sor_d",
+                    "lsx.vfcmp.sor.s" => "__builtin_lsx_vfcmp_sor_s",
+                    "lsx.vfcmp.sueq.d" => "__builtin_lsx_vfcmp_sueq_d",
+                    "lsx.vfcmp.sueq.s" => "__builtin_lsx_vfcmp_sueq_s",
+                    "lsx.vfcmp.sule.d" => "__builtin_lsx_vfcmp_sule_d",
+                    "lsx.vfcmp.sule.s" => "__builtin_lsx_vfcmp_sule_s",
+                    "lsx.vfcmp.sult.d" => "__builtin_lsx_vfcmp_sult_d",
+                    "lsx.vfcmp.sult.s" => "__builtin_lsx_vfcmp_sult_s",
+                    "lsx.vfcmp.sun.d" => "__builtin_lsx_vfcmp_sun_d",
+                    "lsx.vfcmp.sun.s" => "__builtin_lsx_vfcmp_sun_s",
+                    "lsx.vfcmp.sune.d" => "__builtin_lsx_vfcmp_sune_d",
+                    "lsx.vfcmp.sune.s" => "__builtin_lsx_vfcmp_sune_s",
+                    "lsx.vfcvt.h.s" => "__builtin_lsx_vfcvt_h_s",
+                    "lsx.vfcvt.s.d" => "__builtin_lsx_vfcvt_s_d",
+                    "lsx.vfcvth.d.s" => "__builtin_lsx_vfcvth_d_s",
+                    "lsx.vfcvth.s.h" => "__builtin_lsx_vfcvth_s_h",
+                    "lsx.vfcvtl.d.s" => "__builtin_lsx_vfcvtl_d_s",
+                    "lsx.vfcvtl.s.h" => "__builtin_lsx_vfcvtl_s_h",
+                    "lsx.vfdiv.d" => "__builtin_lsx_vfdiv_d",
+                    "lsx.vfdiv.s" => "__builtin_lsx_vfdiv_s",
+                    "lsx.vffint.d.l" => "__builtin_lsx_vffint_d_l",
+                    "lsx.vffint.d.lu" => "__builtin_lsx_vffint_d_lu",
+                    "lsx.vffint.s.l" => "__builtin_lsx_vffint_s_l",
+                    "lsx.vffint.s.w" => "__builtin_lsx_vffint_s_w",
+                    "lsx.vffint.s.wu" => "__builtin_lsx_vffint_s_wu",
+                    "lsx.vffinth.d.w" => "__builtin_lsx_vffinth_d_w",
+                    "lsx.vffintl.d.w" => "__builtin_lsx_vffintl_d_w",
+                    "lsx.vflogb.d" => "__builtin_lsx_vflogb_d",
+                    "lsx.vflogb.s" => "__builtin_lsx_vflogb_s",
+                    "lsx.vfmadd.d" => "__builtin_lsx_vfmadd_d",
+                    "lsx.vfmadd.s" => "__builtin_lsx_vfmadd_s",
+                    "lsx.vfmax.d" => "__builtin_lsx_vfmax_d",
+                    "lsx.vfmax.s" => "__builtin_lsx_vfmax_s",
+                    "lsx.vfmaxa.d" => "__builtin_lsx_vfmaxa_d",
+                    "lsx.vfmaxa.s" => "__builtin_lsx_vfmaxa_s",
+                    "lsx.vfmin.d" => "__builtin_lsx_vfmin_d",
+                    "lsx.vfmin.s" => "__builtin_lsx_vfmin_s",
+                    "lsx.vfmina.d" => "__builtin_lsx_vfmina_d",
+                    "lsx.vfmina.s" => "__builtin_lsx_vfmina_s",
+                    "lsx.vfmsub.d" => "__builtin_lsx_vfmsub_d",
+                    "lsx.vfmsub.s" => "__builtin_lsx_vfmsub_s",
+                    "lsx.vfmul.d" => "__builtin_lsx_vfmul_d",
+                    "lsx.vfmul.s" => "__builtin_lsx_vfmul_s",
+                    "lsx.vfnmadd.d" => "__builtin_lsx_vfnmadd_d",
+                    "lsx.vfnmadd.s" => "__builtin_lsx_vfnmadd_s",
+                    "lsx.vfnmsub.d" => "__builtin_lsx_vfnmsub_d",
+                    "lsx.vfnmsub.s" => "__builtin_lsx_vfnmsub_s",
+                    "lsx.vfrecip.d" => "__builtin_lsx_vfrecip_d",
+                    "lsx.vfrecip.s" => "__builtin_lsx_vfrecip_s",
+                    "lsx.vfrecipe.d" => "__builtin_lsx_vfrecipe_d",
+                    "lsx.vfrecipe.s" => "__builtin_lsx_vfrecipe_s",
+                    "lsx.vfrint.d" => "__builtin_lsx_vfrint_d",
+                    "lsx.vfrint.s" => "__builtin_lsx_vfrint_s",
+                    "lsx.vfrintrm.d" => "__builtin_lsx_vfrintrm_d",
+                    "lsx.vfrintrm.s" => "__builtin_lsx_vfrintrm_s",
+                    "lsx.vfrintrne.d" => "__builtin_lsx_vfrintrne_d",
+                    "lsx.vfrintrne.s" => "__builtin_lsx_vfrintrne_s",
+                    "lsx.vfrintrp.d" => "__builtin_lsx_vfrintrp_d",
+                    "lsx.vfrintrp.s" => "__builtin_lsx_vfrintrp_s",
+                    "lsx.vfrintrz.d" => "__builtin_lsx_vfrintrz_d",
+                    "lsx.vfrintrz.s" => "__builtin_lsx_vfrintrz_s",
+                    "lsx.vfrsqrt.d" => "__builtin_lsx_vfrsqrt_d",
+                    "lsx.vfrsqrt.s" => "__builtin_lsx_vfrsqrt_s",
+                    "lsx.vfrsqrte.d" => "__builtin_lsx_vfrsqrte_d",
+                    "lsx.vfrsqrte.s" => "__builtin_lsx_vfrsqrte_s",
+                    "lsx.vfrstp.b" => "__builtin_lsx_vfrstp_b",
+                    "lsx.vfrstp.h" => "__builtin_lsx_vfrstp_h",
+                    "lsx.vfrstpi.b" => "__builtin_lsx_vfrstpi_b",
+                    "lsx.vfrstpi.h" => "__builtin_lsx_vfrstpi_h",
+                    "lsx.vfsqrt.d" => "__builtin_lsx_vfsqrt_d",
+                    "lsx.vfsqrt.s" => "__builtin_lsx_vfsqrt_s",
+                    "lsx.vfsub.d" => "__builtin_lsx_vfsub_d",
+                    "lsx.vfsub.s" => "__builtin_lsx_vfsub_s",
+                    "lsx.vftint.l.d" => "__builtin_lsx_vftint_l_d",
+                    "lsx.vftint.lu.d" => "__builtin_lsx_vftint_lu_d",
+                    "lsx.vftint.w.d" => "__builtin_lsx_vftint_w_d",
+                    "lsx.vftint.w.s" => "__builtin_lsx_vftint_w_s",
+                    "lsx.vftint.wu.s" => "__builtin_lsx_vftint_wu_s",
+                    "lsx.vftinth.l.s" => "__builtin_lsx_vftinth_l_s",
+                    "lsx.vftintl.l.s" => "__builtin_lsx_vftintl_l_s",
+                    "lsx.vftintrm.l.d" => "__builtin_lsx_vftintrm_l_d",
+                    "lsx.vftintrm.w.d" => "__builtin_lsx_vftintrm_w_d",
+                    "lsx.vftintrm.w.s" => "__builtin_lsx_vftintrm_w_s",
+                    "lsx.vftintrmh.l.s" => "__builtin_lsx_vftintrmh_l_s",
+                    "lsx.vftintrml.l.s" => "__builtin_lsx_vftintrml_l_s",
+                    "lsx.vftintrne.l.d" => "__builtin_lsx_vftintrne_l_d",
+                    "lsx.vftintrne.w.d" => "__builtin_lsx_vftintrne_w_d",
+                    "lsx.vftintrne.w.s" => "__builtin_lsx_vftintrne_w_s",
+                    "lsx.vftintrneh.l.s" => "__builtin_lsx_vftintrneh_l_s",
+                    "lsx.vftintrnel.l.s" => "__builtin_lsx_vftintrnel_l_s",
+                    "lsx.vftintrp.l.d" => "__builtin_lsx_vftintrp_l_d",
+                    "lsx.vftintrp.w.d" => "__builtin_lsx_vftintrp_w_d",
+                    "lsx.vftintrp.w.s" => "__builtin_lsx_vftintrp_w_s",
+                    "lsx.vftintrph.l.s" => "__builtin_lsx_vftintrph_l_s",
+                    "lsx.vftintrpl.l.s" => "__builtin_lsx_vftintrpl_l_s",
+                    "lsx.vftintrz.l.d" => "__builtin_lsx_vftintrz_l_d",
+                    "lsx.vftintrz.lu.d" => "__builtin_lsx_vftintrz_lu_d",
+                    "lsx.vftintrz.w.d" => "__builtin_lsx_vftintrz_w_d",
+                    "lsx.vftintrz.w.s" => "__builtin_lsx_vftintrz_w_s",
+                    "lsx.vftintrz.wu.s" => "__builtin_lsx_vftintrz_wu_s",
+                    "lsx.vftintrzh.l.s" => "__builtin_lsx_vftintrzh_l_s",
+                    "lsx.vftintrzl.l.s" => "__builtin_lsx_vftintrzl_l_s",
+                    "lsx.vhaddw.d.w" => "__builtin_lsx_vhaddw_d_w",
+                    "lsx.vhaddw.du.wu" => "__builtin_lsx_vhaddw_du_wu",
+                    "lsx.vhaddw.h.b" => "__builtin_lsx_vhaddw_h_b",
+                    "lsx.vhaddw.hu.bu" => "__builtin_lsx_vhaddw_hu_bu",
+                    "lsx.vhaddw.q.d" => "__builtin_lsx_vhaddw_q_d",
+                    "lsx.vhaddw.qu.du" => "__builtin_lsx_vhaddw_qu_du",
+                    "lsx.vhaddw.w.h" => "__builtin_lsx_vhaddw_w_h",
+                    "lsx.vhaddw.wu.hu" => "__builtin_lsx_vhaddw_wu_hu",
+                    "lsx.vhsubw.d.w" => "__builtin_lsx_vhsubw_d_w",
+                    "lsx.vhsubw.du.wu" => "__builtin_lsx_vhsubw_du_wu",
+                    "lsx.vhsubw.h.b" => "__builtin_lsx_vhsubw_h_b",
+                    "lsx.vhsubw.hu.bu" => "__builtin_lsx_vhsubw_hu_bu",
+                    "lsx.vhsubw.q.d" => "__builtin_lsx_vhsubw_q_d",
+                    "lsx.vhsubw.qu.du" => "__builtin_lsx_vhsubw_qu_du",
+                    "lsx.vhsubw.w.h" => "__builtin_lsx_vhsubw_w_h",
+                    "lsx.vhsubw.wu.hu" => "__builtin_lsx_vhsubw_wu_hu",
+                    "lsx.vilvh.b" => "__builtin_lsx_vilvh_b",
+                    "lsx.vilvh.d" => "__builtin_lsx_vilvh_d",
+                    "lsx.vilvh.h" => "__builtin_lsx_vilvh_h",
+                    "lsx.vilvh.w" => "__builtin_lsx_vilvh_w",
+                    "lsx.vilvl.b" => "__builtin_lsx_vilvl_b",
+                    "lsx.vilvl.d" => "__builtin_lsx_vilvl_d",
+                    "lsx.vilvl.h" => "__builtin_lsx_vilvl_h",
+                    "lsx.vilvl.w" => "__builtin_lsx_vilvl_w",
+                    "lsx.vinsgr2vr.b" => "__builtin_lsx_vinsgr2vr_b",
+                    "lsx.vinsgr2vr.d" => "__builtin_lsx_vinsgr2vr_d",
+                    "lsx.vinsgr2vr.h" => "__builtin_lsx_vinsgr2vr_h",
+                    "lsx.vinsgr2vr.w" => "__builtin_lsx_vinsgr2vr_w",
+                    "lsx.vld" => "__builtin_lsx_vld",
+                    "lsx.vldi" => "__builtin_lsx_vldi",
+                    "lsx.vldrepl.b" => "__builtin_lsx_vldrepl_b",
+                    "lsx.vldrepl.d" => "__builtin_lsx_vldrepl_d",
+                    "lsx.vldrepl.h" => "__builtin_lsx_vldrepl_h",
+                    "lsx.vldrepl.w" => "__builtin_lsx_vldrepl_w",
+                    "lsx.vldx" => "__builtin_lsx_vldx",
+                    "lsx.vmadd.b" => "__builtin_lsx_vmadd_b",
+                    "lsx.vmadd.d" => "__builtin_lsx_vmadd_d",
+                    "lsx.vmadd.h" => "__builtin_lsx_vmadd_h",
+                    "lsx.vmadd.w" => "__builtin_lsx_vmadd_w",
+                    "lsx.vmaddwev.d.w" => "__builtin_lsx_vmaddwev_d_w",
+                    "lsx.vmaddwev.d.wu" => "__builtin_lsx_vmaddwev_d_wu",
+                    "lsx.vmaddwev.d.wu.w" => "__builtin_lsx_vmaddwev_d_wu_w",
+                    "lsx.vmaddwev.h.b" => "__builtin_lsx_vmaddwev_h_b",
+                    "lsx.vmaddwev.h.bu" => "__builtin_lsx_vmaddwev_h_bu",
+                    "lsx.vmaddwev.h.bu.b" => "__builtin_lsx_vmaddwev_h_bu_b",
+                    "lsx.vmaddwev.q.d" => "__builtin_lsx_vmaddwev_q_d",
+                    "lsx.vmaddwev.q.du" => "__builtin_lsx_vmaddwev_q_du",
+                    "lsx.vmaddwev.q.du.d" => "__builtin_lsx_vmaddwev_q_du_d",
+                    "lsx.vmaddwev.w.h" => "__builtin_lsx_vmaddwev_w_h",
+                    "lsx.vmaddwev.w.hu" => "__builtin_lsx_vmaddwev_w_hu",
+                    "lsx.vmaddwev.w.hu.h" => "__builtin_lsx_vmaddwev_w_hu_h",
+                    "lsx.vmaddwod.d.w" => "__builtin_lsx_vmaddwod_d_w",
+                    "lsx.vmaddwod.d.wu" => "__builtin_lsx_vmaddwod_d_wu",
+                    "lsx.vmaddwod.d.wu.w" => "__builtin_lsx_vmaddwod_d_wu_w",
+                    "lsx.vmaddwod.h.b" => "__builtin_lsx_vmaddwod_h_b",
+                    "lsx.vmaddwod.h.bu" => "__builtin_lsx_vmaddwod_h_bu",
+                    "lsx.vmaddwod.h.bu.b" => "__builtin_lsx_vmaddwod_h_bu_b",
+                    "lsx.vmaddwod.q.d" => "__builtin_lsx_vmaddwod_q_d",
+                    "lsx.vmaddwod.q.du" => "__builtin_lsx_vmaddwod_q_du",
+                    "lsx.vmaddwod.q.du.d" => "__builtin_lsx_vmaddwod_q_du_d",
+                    "lsx.vmaddwod.w.h" => "__builtin_lsx_vmaddwod_w_h",
+                    "lsx.vmaddwod.w.hu" => "__builtin_lsx_vmaddwod_w_hu",
+                    "lsx.vmaddwod.w.hu.h" => "__builtin_lsx_vmaddwod_w_hu_h",
+                    "lsx.vmax.b" => "__builtin_lsx_vmax_b",
+                    "lsx.vmax.bu" => "__builtin_lsx_vmax_bu",
+                    "lsx.vmax.d" => "__builtin_lsx_vmax_d",
+                    "lsx.vmax.du" => "__builtin_lsx_vmax_du",
+                    "lsx.vmax.h" => "__builtin_lsx_vmax_h",
+                    "lsx.vmax.hu" => "__builtin_lsx_vmax_hu",
+                    "lsx.vmax.w" => "__builtin_lsx_vmax_w",
+                    "lsx.vmax.wu" => "__builtin_lsx_vmax_wu",
+                    "lsx.vmaxi.b" => "__builtin_lsx_vmaxi_b",
+                    "lsx.vmaxi.bu" => "__builtin_lsx_vmaxi_bu",
+                    "lsx.vmaxi.d" => "__builtin_lsx_vmaxi_d",
+                    "lsx.vmaxi.du" => "__builtin_lsx_vmaxi_du",
+                    "lsx.vmaxi.h" => "__builtin_lsx_vmaxi_h",
+                    "lsx.vmaxi.hu" => "__builtin_lsx_vmaxi_hu",
+                    "lsx.vmaxi.w" => "__builtin_lsx_vmaxi_w",
+                    "lsx.vmaxi.wu" => "__builtin_lsx_vmaxi_wu",
+                    "lsx.vmin.b" => "__builtin_lsx_vmin_b",
+                    "lsx.vmin.bu" => "__builtin_lsx_vmin_bu",
+                    "lsx.vmin.d" => "__builtin_lsx_vmin_d",
+                    "lsx.vmin.du" => "__builtin_lsx_vmin_du",
+                    "lsx.vmin.h" => "__builtin_lsx_vmin_h",
+                    "lsx.vmin.hu" => "__builtin_lsx_vmin_hu",
+                    "lsx.vmin.w" => "__builtin_lsx_vmin_w",
+                    "lsx.vmin.wu" => "__builtin_lsx_vmin_wu",
+                    "lsx.vmini.b" => "__builtin_lsx_vmini_b",
+                    "lsx.vmini.bu" => "__builtin_lsx_vmini_bu",
+                    "lsx.vmini.d" => "__builtin_lsx_vmini_d",
+                    "lsx.vmini.du" => "__builtin_lsx_vmini_du",
+                    "lsx.vmini.h" => "__builtin_lsx_vmini_h",
+                    "lsx.vmini.hu" => "__builtin_lsx_vmini_hu",
+                    "lsx.vmini.w" => "__builtin_lsx_vmini_w",
+                    "lsx.vmini.wu" => "__builtin_lsx_vmini_wu",
+                    "lsx.vmod.b" => "__builtin_lsx_vmod_b",
+                    "lsx.vmod.bu" => "__builtin_lsx_vmod_bu",
+                    "lsx.vmod.d" => "__builtin_lsx_vmod_d",
+                    "lsx.vmod.du" => "__builtin_lsx_vmod_du",
+                    "lsx.vmod.h" => "__builtin_lsx_vmod_h",
+                    "lsx.vmod.hu" => "__builtin_lsx_vmod_hu",
+                    "lsx.vmod.w" => "__builtin_lsx_vmod_w",
+                    "lsx.vmod.wu" => "__builtin_lsx_vmod_wu",
+                    "lsx.vmskgez.b" => "__builtin_lsx_vmskgez_b",
+                    "lsx.vmskltz.b" => "__builtin_lsx_vmskltz_b",
+                    "lsx.vmskltz.d" => "__builtin_lsx_vmskltz_d",
+                    "lsx.vmskltz.h" => "__builtin_lsx_vmskltz_h",
+                    "lsx.vmskltz.w" => "__builtin_lsx_vmskltz_w",
+                    "lsx.vmsknz.b" => "__builtin_lsx_vmsknz_b",
+                    "lsx.vmsub.b" => "__builtin_lsx_vmsub_b",
+                    "lsx.vmsub.d" => "__builtin_lsx_vmsub_d",
+                    "lsx.vmsub.h" => "__builtin_lsx_vmsub_h",
+                    "lsx.vmsub.w" => "__builtin_lsx_vmsub_w",
+                    "lsx.vmuh.b" => "__builtin_lsx_vmuh_b",
+                    "lsx.vmuh.bu" => "__builtin_lsx_vmuh_bu",
+                    "lsx.vmuh.d" => "__builtin_lsx_vmuh_d",
+                    "lsx.vmuh.du" => "__builtin_lsx_vmuh_du",
+                    "lsx.vmuh.h" => "__builtin_lsx_vmuh_h",
+                    "lsx.vmuh.hu" => "__builtin_lsx_vmuh_hu",
+                    "lsx.vmuh.w" => "__builtin_lsx_vmuh_w",
+                    "lsx.vmuh.wu" => "__builtin_lsx_vmuh_wu",
+                    "lsx.vmul.b" => "__builtin_lsx_vmul_b",
+                    "lsx.vmul.d" => "__builtin_lsx_vmul_d",
+                    "lsx.vmul.h" => "__builtin_lsx_vmul_h",
+                    "lsx.vmul.w" => "__builtin_lsx_vmul_w",
+                    "lsx.vmulwev.d.w" => "__builtin_lsx_vmulwev_d_w",
+                    "lsx.vmulwev.d.wu" => "__builtin_lsx_vmulwev_d_wu",
+                    "lsx.vmulwev.d.wu.w" => "__builtin_lsx_vmulwev_d_wu_w",
+                    "lsx.vmulwev.h.b" => "__builtin_lsx_vmulwev_h_b",
+                    "lsx.vmulwev.h.bu" => "__builtin_lsx_vmulwev_h_bu",
+                    "lsx.vmulwev.h.bu.b" => "__builtin_lsx_vmulwev_h_bu_b",
+                    "lsx.vmulwev.q.d" => "__builtin_lsx_vmulwev_q_d",
+                    "lsx.vmulwev.q.du" => "__builtin_lsx_vmulwev_q_du",
+                    "lsx.vmulwev.q.du.d" => "__builtin_lsx_vmulwev_q_du_d",
+                    "lsx.vmulwev.w.h" => "__builtin_lsx_vmulwev_w_h",
+                    "lsx.vmulwev.w.hu" => "__builtin_lsx_vmulwev_w_hu",
+                    "lsx.vmulwev.w.hu.h" => "__builtin_lsx_vmulwev_w_hu_h",
+                    "lsx.vmulwod.d.w" => "__builtin_lsx_vmulwod_d_w",
+                    "lsx.vmulwod.d.wu" => "__builtin_lsx_vmulwod_d_wu",
+                    "lsx.vmulwod.d.wu.w" => "__builtin_lsx_vmulwod_d_wu_w",
+                    "lsx.vmulwod.h.b" => "__builtin_lsx_vmulwod_h_b",
+                    "lsx.vmulwod.h.bu" => "__builtin_lsx_vmulwod_h_bu",
+                    "lsx.vmulwod.h.bu.b" => "__builtin_lsx_vmulwod_h_bu_b",
+                    "lsx.vmulwod.q.d" => "__builtin_lsx_vmulwod_q_d",
+                    "lsx.vmulwod.q.du" => "__builtin_lsx_vmulwod_q_du",
+                    "lsx.vmulwod.q.du.d" => "__builtin_lsx_vmulwod_q_du_d",
+                    "lsx.vmulwod.w.h" => "__builtin_lsx_vmulwod_w_h",
+                    "lsx.vmulwod.w.hu" => "__builtin_lsx_vmulwod_w_hu",
+                    "lsx.vmulwod.w.hu.h" => "__builtin_lsx_vmulwod_w_hu_h",
+                    "lsx.vneg.b" => "__builtin_lsx_vneg_b",
+                    "lsx.vneg.d" => "__builtin_lsx_vneg_d",
+                    "lsx.vneg.h" => "__builtin_lsx_vneg_h",
+                    "lsx.vneg.w" => "__builtin_lsx_vneg_w",
+                    "lsx.vnor.v" => "__builtin_lsx_vnor_v",
+                    "lsx.vnori.b" => "__builtin_lsx_vnori_b",
+                    "lsx.vor.v" => "__builtin_lsx_vor_v",
+                    "lsx.vori.b" => "__builtin_lsx_vori_b",
+                    "lsx.vorn.v" => "__builtin_lsx_vorn_v",
+                    "lsx.vpackev.b" => "__builtin_lsx_vpackev_b",
+                    "lsx.vpackev.d" => "__builtin_lsx_vpackev_d",
+                    "lsx.vpackev.h" => "__builtin_lsx_vpackev_h",
+                    "lsx.vpackev.w" => "__builtin_lsx_vpackev_w",
+                    "lsx.vpackod.b" => "__builtin_lsx_vpackod_b",
+                    "lsx.vpackod.d" => "__builtin_lsx_vpackod_d",
+                    "lsx.vpackod.h" => "__builtin_lsx_vpackod_h",
+                    "lsx.vpackod.w" => "__builtin_lsx_vpackod_w",
+                    "lsx.vpcnt.b" => "__builtin_lsx_vpcnt_b",
+                    "lsx.vpcnt.d" => "__builtin_lsx_vpcnt_d",
+                    "lsx.vpcnt.h" => "__builtin_lsx_vpcnt_h",
+                    "lsx.vpcnt.w" => "__builtin_lsx_vpcnt_w",
+                    "lsx.vpermi.w" => "__builtin_lsx_vpermi_w",
+                    "lsx.vpickev.b" => "__builtin_lsx_vpickev_b",
+                    "lsx.vpickev.d" => "__builtin_lsx_vpickev_d",
+                    "lsx.vpickev.h" => "__builtin_lsx_vpickev_h",
+                    "lsx.vpickev.w" => "__builtin_lsx_vpickev_w",
+                    "lsx.vpickod.b" => "__builtin_lsx_vpickod_b",
+                    "lsx.vpickod.d" => "__builtin_lsx_vpickod_d",
+                    "lsx.vpickod.h" => "__builtin_lsx_vpickod_h",
+                    "lsx.vpickod.w" => "__builtin_lsx_vpickod_w",
+                    "lsx.vpickve2gr.b" => "__builtin_lsx_vpickve2gr_b",
+                    "lsx.vpickve2gr.bu" => "__builtin_lsx_vpickve2gr_bu",
+                    "lsx.vpickve2gr.d" => "__builtin_lsx_vpickve2gr_d",
+                    "lsx.vpickve2gr.du" => "__builtin_lsx_vpickve2gr_du",
+                    "lsx.vpickve2gr.h" => "__builtin_lsx_vpickve2gr_h",
+                    "lsx.vpickve2gr.hu" => "__builtin_lsx_vpickve2gr_hu",
+                    "lsx.vpickve2gr.w" => "__builtin_lsx_vpickve2gr_w",
+                    "lsx.vpickve2gr.wu" => "__builtin_lsx_vpickve2gr_wu",
+                    "lsx.vreplgr2vr.b" => "__builtin_lsx_vreplgr2vr_b",
+                    "lsx.vreplgr2vr.d" => "__builtin_lsx_vreplgr2vr_d",
+                    "lsx.vreplgr2vr.h" => "__builtin_lsx_vreplgr2vr_h",
+                    "lsx.vreplgr2vr.w" => "__builtin_lsx_vreplgr2vr_w",
+                    "lsx.vrepli.b" => "__builtin_lsx_vrepli_b",
+                    "lsx.vrepli.d" => "__builtin_lsx_vrepli_d",
+                    "lsx.vrepli.h" => "__builtin_lsx_vrepli_h",
+                    "lsx.vrepli.w" => "__builtin_lsx_vrepli_w",
+                    "lsx.vreplve.b" => "__builtin_lsx_vreplve_b",
+                    "lsx.vreplve.d" => "__builtin_lsx_vreplve_d",
+                    "lsx.vreplve.h" => "__builtin_lsx_vreplve_h",
+                    "lsx.vreplve.w" => "__builtin_lsx_vreplve_w",
+                    "lsx.vreplvei.b" => "__builtin_lsx_vreplvei_b",
+                    "lsx.vreplvei.d" => "__builtin_lsx_vreplvei_d",
+                    "lsx.vreplvei.h" => "__builtin_lsx_vreplvei_h",
+                    "lsx.vreplvei.w" => "__builtin_lsx_vreplvei_w",
+                    "lsx.vrotr.b" => "__builtin_lsx_vrotr_b",
+                    "lsx.vrotr.d" => "__builtin_lsx_vrotr_d",
+                    "lsx.vrotr.h" => "__builtin_lsx_vrotr_h",
+                    "lsx.vrotr.w" => "__builtin_lsx_vrotr_w",
+                    "lsx.vrotri.b" => "__builtin_lsx_vrotri_b",
+                    "lsx.vrotri.d" => "__builtin_lsx_vrotri_d",
+                    "lsx.vrotri.h" => "__builtin_lsx_vrotri_h",
+                    "lsx.vrotri.w" => "__builtin_lsx_vrotri_w",
+                    "lsx.vsadd.b" => "__builtin_lsx_vsadd_b",
+                    "lsx.vsadd.bu" => "__builtin_lsx_vsadd_bu",
+                    "lsx.vsadd.d" => "__builtin_lsx_vsadd_d",
+                    "lsx.vsadd.du" => "__builtin_lsx_vsadd_du",
+                    "lsx.vsadd.h" => "__builtin_lsx_vsadd_h",
+                    "lsx.vsadd.hu" => "__builtin_lsx_vsadd_hu",
+                    "lsx.vsadd.w" => "__builtin_lsx_vsadd_w",
+                    "lsx.vsadd.wu" => "__builtin_lsx_vsadd_wu",
+                    "lsx.vsat.b" => "__builtin_lsx_vsat_b",
+                    "lsx.vsat.bu" => "__builtin_lsx_vsat_bu",
+                    "lsx.vsat.d" => "__builtin_lsx_vsat_d",
+                    "lsx.vsat.du" => "__builtin_lsx_vsat_du",
+                    "lsx.vsat.h" => "__builtin_lsx_vsat_h",
+                    "lsx.vsat.hu" => "__builtin_lsx_vsat_hu",
+                    "lsx.vsat.w" => "__builtin_lsx_vsat_w",
+                    "lsx.vsat.wu" => "__builtin_lsx_vsat_wu",
+                    "lsx.vseq.b" => "__builtin_lsx_vseq_b",
+                    "lsx.vseq.d" => "__builtin_lsx_vseq_d",
+                    "lsx.vseq.h" => "__builtin_lsx_vseq_h",
+                    "lsx.vseq.w" => "__builtin_lsx_vseq_w",
+                    "lsx.vseqi.b" => "__builtin_lsx_vseqi_b",
+                    "lsx.vseqi.d" => "__builtin_lsx_vseqi_d",
+                    "lsx.vseqi.h" => "__builtin_lsx_vseqi_h",
+                    "lsx.vseqi.w" => "__builtin_lsx_vseqi_w",
+                    "lsx.vshuf.b" => "__builtin_lsx_vshuf_b",
+                    "lsx.vshuf.d" => "__builtin_lsx_vshuf_d",
+                    "lsx.vshuf.h" => "__builtin_lsx_vshuf_h",
+                    "lsx.vshuf.w" => "__builtin_lsx_vshuf_w",
+                    "lsx.vshuf4i.b" => "__builtin_lsx_vshuf4i_b",
+                    "lsx.vshuf4i.d" => "__builtin_lsx_vshuf4i_d",
+                    "lsx.vshuf4i.h" => "__builtin_lsx_vshuf4i_h",
+                    "lsx.vshuf4i.w" => "__builtin_lsx_vshuf4i_w",
+                    "lsx.vsigncov.b" => "__builtin_lsx_vsigncov_b",
+                    "lsx.vsigncov.d" => "__builtin_lsx_vsigncov_d",
+                    "lsx.vsigncov.h" => "__builtin_lsx_vsigncov_h",
+                    "lsx.vsigncov.w" => "__builtin_lsx_vsigncov_w",
+                    "lsx.vsle.b" => "__builtin_lsx_vsle_b",
+                    "lsx.vsle.bu" => "__builtin_lsx_vsle_bu",
+                    "lsx.vsle.d" => "__builtin_lsx_vsle_d",
+                    "lsx.vsle.du" => "__builtin_lsx_vsle_du",
+                    "lsx.vsle.h" => "__builtin_lsx_vsle_h",
+                    "lsx.vsle.hu" => "__builtin_lsx_vsle_hu",
+                    "lsx.vsle.w" => "__builtin_lsx_vsle_w",
+                    "lsx.vsle.wu" => "__builtin_lsx_vsle_wu",
+                    "lsx.vslei.b" => "__builtin_lsx_vslei_b",
+                    "lsx.vslei.bu" => "__builtin_lsx_vslei_bu",
+                    "lsx.vslei.d" => "__builtin_lsx_vslei_d",
+                    "lsx.vslei.du" => "__builtin_lsx_vslei_du",
+                    "lsx.vslei.h" => "__builtin_lsx_vslei_h",
+                    "lsx.vslei.hu" => "__builtin_lsx_vslei_hu",
+                    "lsx.vslei.w" => "__builtin_lsx_vslei_w",
+                    "lsx.vslei.wu" => "__builtin_lsx_vslei_wu",
+                    "lsx.vsll.b" => "__builtin_lsx_vsll_b",
+                    "lsx.vsll.d" => "__builtin_lsx_vsll_d",
+                    "lsx.vsll.h" => "__builtin_lsx_vsll_h",
+                    "lsx.vsll.w" => "__builtin_lsx_vsll_w",
+                    "lsx.vslli.b" => "__builtin_lsx_vslli_b",
+                    "lsx.vslli.d" => "__builtin_lsx_vslli_d",
+                    "lsx.vslli.h" => "__builtin_lsx_vslli_h",
+                    "lsx.vslli.w" => "__builtin_lsx_vslli_w",
+                    "lsx.vsllwil.d.w" => "__builtin_lsx_vsllwil_d_w",
+                    "lsx.vsllwil.du.wu" => "__builtin_lsx_vsllwil_du_wu",
+                    "lsx.vsllwil.h.b" => "__builtin_lsx_vsllwil_h_b",
+                    "lsx.vsllwil.hu.bu" => "__builtin_lsx_vsllwil_hu_bu",
+                    "lsx.vsllwil.w.h" => "__builtin_lsx_vsllwil_w_h",
+                    "lsx.vsllwil.wu.hu" => "__builtin_lsx_vsllwil_wu_hu",
+                    "lsx.vslt.b" => "__builtin_lsx_vslt_b",
+                    "lsx.vslt.bu" => "__builtin_lsx_vslt_bu",
+                    "lsx.vslt.d" => "__builtin_lsx_vslt_d",
+                    "lsx.vslt.du" => "__builtin_lsx_vslt_du",
+                    "lsx.vslt.h" => "__builtin_lsx_vslt_h",
+                    "lsx.vslt.hu" => "__builtin_lsx_vslt_hu",
+                    "lsx.vslt.w" => "__builtin_lsx_vslt_w",
+                    "lsx.vslt.wu" => "__builtin_lsx_vslt_wu",
+                    "lsx.vslti.b" => "__builtin_lsx_vslti_b",
+                    "lsx.vslti.bu" => "__builtin_lsx_vslti_bu",
+                    "lsx.vslti.d" => "__builtin_lsx_vslti_d",
+                    "lsx.vslti.du" => "__builtin_lsx_vslti_du",
+                    "lsx.vslti.h" => "__builtin_lsx_vslti_h",
+                    "lsx.vslti.hu" => "__builtin_lsx_vslti_hu",
+                    "lsx.vslti.w" => "__builtin_lsx_vslti_w",
+                    "lsx.vslti.wu" => "__builtin_lsx_vslti_wu",
+                    "lsx.vsra.b" => "__builtin_lsx_vsra_b",
+                    "lsx.vsra.d" => "__builtin_lsx_vsra_d",
+                    "lsx.vsra.h" => "__builtin_lsx_vsra_h",
+                    "lsx.vsra.w" => "__builtin_lsx_vsra_w",
+                    "lsx.vsrai.b" => "__builtin_lsx_vsrai_b",
+                    "lsx.vsrai.d" => "__builtin_lsx_vsrai_d",
+                    "lsx.vsrai.h" => "__builtin_lsx_vsrai_h",
+                    "lsx.vsrai.w" => "__builtin_lsx_vsrai_w",
+                    "lsx.vsran.b.h" => "__builtin_lsx_vsran_b_h",
+                    "lsx.vsran.h.w" => "__builtin_lsx_vsran_h_w",
+                    "lsx.vsran.w.d" => "__builtin_lsx_vsran_w_d",
+                    "lsx.vsrani.b.h" => "__builtin_lsx_vsrani_b_h",
+                    "lsx.vsrani.d.q" => "__builtin_lsx_vsrani_d_q",
+                    "lsx.vsrani.h.w" => "__builtin_lsx_vsrani_h_w",
+                    "lsx.vsrani.w.d" => "__builtin_lsx_vsrani_w_d",
+                    "lsx.vsrar.b" => "__builtin_lsx_vsrar_b",
+                    "lsx.vsrar.d" => "__builtin_lsx_vsrar_d",
+                    "lsx.vsrar.h" => "__builtin_lsx_vsrar_h",
+                    "lsx.vsrar.w" => "__builtin_lsx_vsrar_w",
+                    "lsx.vsrari.b" => "__builtin_lsx_vsrari_b",
+                    "lsx.vsrari.d" => "__builtin_lsx_vsrari_d",
+                    "lsx.vsrari.h" => "__builtin_lsx_vsrari_h",
+                    "lsx.vsrari.w" => "__builtin_lsx_vsrari_w",
+                    "lsx.vsrarn.b.h" => "__builtin_lsx_vsrarn_b_h",
+                    "lsx.vsrarn.h.w" => "__builtin_lsx_vsrarn_h_w",
+                    "lsx.vsrarn.w.d" => "__builtin_lsx_vsrarn_w_d",
+                    "lsx.vsrarni.b.h" => "__builtin_lsx_vsrarni_b_h",
+                    "lsx.vsrarni.d.q" => "__builtin_lsx_vsrarni_d_q",
+                    "lsx.vsrarni.h.w" => "__builtin_lsx_vsrarni_h_w",
+                    "lsx.vsrarni.w.d" => "__builtin_lsx_vsrarni_w_d",
+                    "lsx.vsrl.b" => "__builtin_lsx_vsrl_b",
+                    "lsx.vsrl.d" => "__builtin_lsx_vsrl_d",
+                    "lsx.vsrl.h" => "__builtin_lsx_vsrl_h",
+                    "lsx.vsrl.w" => "__builtin_lsx_vsrl_w",
+                    "lsx.vsrli.b" => "__builtin_lsx_vsrli_b",
+                    "lsx.vsrli.d" => "__builtin_lsx_vsrli_d",
+                    "lsx.vsrli.h" => "__builtin_lsx_vsrli_h",
+                    "lsx.vsrli.w" => "__builtin_lsx_vsrli_w",
+                    "lsx.vsrln.b.h" => "__builtin_lsx_vsrln_b_h",
+                    "lsx.vsrln.h.w" => "__builtin_lsx_vsrln_h_w",
+                    "lsx.vsrln.w.d" => "__builtin_lsx_vsrln_w_d",
+                    "lsx.vsrlni.b.h" => "__builtin_lsx_vsrlni_b_h",
+                    "lsx.vsrlni.d.q" => "__builtin_lsx_vsrlni_d_q",
+                    "lsx.vsrlni.h.w" => "__builtin_lsx_vsrlni_h_w",
+                    "lsx.vsrlni.w.d" => "__builtin_lsx_vsrlni_w_d",
+                    "lsx.vsrlr.b" => "__builtin_lsx_vsrlr_b",
+                    "lsx.vsrlr.d" => "__builtin_lsx_vsrlr_d",
+                    "lsx.vsrlr.h" => "__builtin_lsx_vsrlr_h",
+                    "lsx.vsrlr.w" => "__builtin_lsx_vsrlr_w",
+                    "lsx.vsrlri.b" => "__builtin_lsx_vsrlri_b",
+                    "lsx.vsrlri.d" => "__builtin_lsx_vsrlri_d",
+                    "lsx.vsrlri.h" => "__builtin_lsx_vsrlri_h",
+                    "lsx.vsrlri.w" => "__builtin_lsx_vsrlri_w",
+                    "lsx.vsrlrn.b.h" => "__builtin_lsx_vsrlrn_b_h",
+                    "lsx.vsrlrn.h.w" => "__builtin_lsx_vsrlrn_h_w",
+                    "lsx.vsrlrn.w.d" => "__builtin_lsx_vsrlrn_w_d",
+                    "lsx.vsrlrni.b.h" => "__builtin_lsx_vsrlrni_b_h",
+                    "lsx.vsrlrni.d.q" => "__builtin_lsx_vsrlrni_d_q",
+                    "lsx.vsrlrni.h.w" => "__builtin_lsx_vsrlrni_h_w",
+                    "lsx.vsrlrni.w.d" => "__builtin_lsx_vsrlrni_w_d",
+                    "lsx.vssran.b.h" => "__builtin_lsx_vssran_b_h",
+                    "lsx.vssran.bu.h" => "__builtin_lsx_vssran_bu_h",
+                    "lsx.vssran.h.w" => "__builtin_lsx_vssran_h_w",
+                    "lsx.vssran.hu.w" => "__builtin_lsx_vssran_hu_w",
+                    "lsx.vssran.w.d" => "__builtin_lsx_vssran_w_d",
+                    "lsx.vssran.wu.d" => "__builtin_lsx_vssran_wu_d",
+                    "lsx.vssrani.b.h" => "__builtin_lsx_vssrani_b_h",
+                    "lsx.vssrani.bu.h" => "__builtin_lsx_vssrani_bu_h",
+                    "lsx.vssrani.d.q" => "__builtin_lsx_vssrani_d_q",
+                    "lsx.vssrani.du.q" => "__builtin_lsx_vssrani_du_q",
+                    "lsx.vssrani.h.w" => "__builtin_lsx_vssrani_h_w",
+                    "lsx.vssrani.hu.w" => "__builtin_lsx_vssrani_hu_w",
+                    "lsx.vssrani.w.d" => "__builtin_lsx_vssrani_w_d",
+                    "lsx.vssrani.wu.d" => "__builtin_lsx_vssrani_wu_d",
+                    "lsx.vssrarn.b.h" => "__builtin_lsx_vssrarn_b_h",
+                    "lsx.vssrarn.bu.h" => "__builtin_lsx_vssrarn_bu_h",
+                    "lsx.vssrarn.h.w" => "__builtin_lsx_vssrarn_h_w",
+                    "lsx.vssrarn.hu.w" => "__builtin_lsx_vssrarn_hu_w",
+                    "lsx.vssrarn.w.d" => "__builtin_lsx_vssrarn_w_d",
+                    "lsx.vssrarn.wu.d" => "__builtin_lsx_vssrarn_wu_d",
+                    "lsx.vssrarni.b.h" => "__builtin_lsx_vssrarni_b_h",
+                    "lsx.vssrarni.bu.h" => "__builtin_lsx_vssrarni_bu_h",
+                    "lsx.vssrarni.d.q" => "__builtin_lsx_vssrarni_d_q",
+                    "lsx.vssrarni.du.q" => "__builtin_lsx_vssrarni_du_q",
+                    "lsx.vssrarni.h.w" => "__builtin_lsx_vssrarni_h_w",
+                    "lsx.vssrarni.hu.w" => "__builtin_lsx_vssrarni_hu_w",
+                    "lsx.vssrarni.w.d" => "__builtin_lsx_vssrarni_w_d",
+                    "lsx.vssrarni.wu.d" => "__builtin_lsx_vssrarni_wu_d",
+                    "lsx.vssrln.b.h" => "__builtin_lsx_vssrln_b_h",
+                    "lsx.vssrln.bu.h" => "__builtin_lsx_vssrln_bu_h",
+                    "lsx.vssrln.h.w" => "__builtin_lsx_vssrln_h_w",
+                    "lsx.vssrln.hu.w" => "__builtin_lsx_vssrln_hu_w",
+                    "lsx.vssrln.w.d" => "__builtin_lsx_vssrln_w_d",
+                    "lsx.vssrln.wu.d" => "__builtin_lsx_vssrln_wu_d",
+                    "lsx.vssrlni.b.h" => "__builtin_lsx_vssrlni_b_h",
+                    "lsx.vssrlni.bu.h" => "__builtin_lsx_vssrlni_bu_h",
+                    "lsx.vssrlni.d.q" => "__builtin_lsx_vssrlni_d_q",
+                    "lsx.vssrlni.du.q" => "__builtin_lsx_vssrlni_du_q",
+                    "lsx.vssrlni.h.w" => "__builtin_lsx_vssrlni_h_w",
+                    "lsx.vssrlni.hu.w" => "__builtin_lsx_vssrlni_hu_w",
+                    "lsx.vssrlni.w.d" => "__builtin_lsx_vssrlni_w_d",
+                    "lsx.vssrlni.wu.d" => "__builtin_lsx_vssrlni_wu_d",
+                    "lsx.vssrlrn.b.h" => "__builtin_lsx_vssrlrn_b_h",
+                    "lsx.vssrlrn.bu.h" => "__builtin_lsx_vssrlrn_bu_h",
+                    "lsx.vssrlrn.h.w" => "__builtin_lsx_vssrlrn_h_w",
+                    "lsx.vssrlrn.hu.w" => "__builtin_lsx_vssrlrn_hu_w",
+                    "lsx.vssrlrn.w.d" => "__builtin_lsx_vssrlrn_w_d",
+                    "lsx.vssrlrn.wu.d" => "__builtin_lsx_vssrlrn_wu_d",
+                    "lsx.vssrlrni.b.h" => "__builtin_lsx_vssrlrni_b_h",
+                    "lsx.vssrlrni.bu.h" => "__builtin_lsx_vssrlrni_bu_h",
+                    "lsx.vssrlrni.d.q" => "__builtin_lsx_vssrlrni_d_q",
+                    "lsx.vssrlrni.du.q" => "__builtin_lsx_vssrlrni_du_q",
+                    "lsx.vssrlrni.h.w" => "__builtin_lsx_vssrlrni_h_w",
+                    "lsx.vssrlrni.hu.w" => "__builtin_lsx_vssrlrni_hu_w",
+                    "lsx.vssrlrni.w.d" => "__builtin_lsx_vssrlrni_w_d",
+                    "lsx.vssrlrni.wu.d" => "__builtin_lsx_vssrlrni_wu_d",
+                    "lsx.vssub.b" => "__builtin_lsx_vssub_b",
+                    "lsx.vssub.bu" => "__builtin_lsx_vssub_bu",
+                    "lsx.vssub.d" => "__builtin_lsx_vssub_d",
+                    "lsx.vssub.du" => "__builtin_lsx_vssub_du",
+                    "lsx.vssub.h" => "__builtin_lsx_vssub_h",
+                    "lsx.vssub.hu" => "__builtin_lsx_vssub_hu",
+                    "lsx.vssub.w" => "__builtin_lsx_vssub_w",
+                    "lsx.vssub.wu" => "__builtin_lsx_vssub_wu",
+                    "lsx.vst" => "__builtin_lsx_vst",
+                    "lsx.vstelm.b" => "__builtin_lsx_vstelm_b",
+                    "lsx.vstelm.d" => "__builtin_lsx_vstelm_d",
+                    "lsx.vstelm.h" => "__builtin_lsx_vstelm_h",
+                    "lsx.vstelm.w" => "__builtin_lsx_vstelm_w",
+                    "lsx.vstx" => "__builtin_lsx_vstx",
+                    "lsx.vsub.b" => "__builtin_lsx_vsub_b",
+                    "lsx.vsub.d" => "__builtin_lsx_vsub_d",
+                    "lsx.vsub.h" => "__builtin_lsx_vsub_h",
+                    "lsx.vsub.q" => "__builtin_lsx_vsub_q",
+                    "lsx.vsub.w" => "__builtin_lsx_vsub_w",
+                    "lsx.vsubi.bu" => "__builtin_lsx_vsubi_bu",
+                    "lsx.vsubi.du" => "__builtin_lsx_vsubi_du",
+                    "lsx.vsubi.hu" => "__builtin_lsx_vsubi_hu",
+                    "lsx.vsubi.wu" => "__builtin_lsx_vsubi_wu",
+                    "lsx.vsubwev.d.w" => "__builtin_lsx_vsubwev_d_w",
+                    "lsx.vsubwev.d.wu" => "__builtin_lsx_vsubwev_d_wu",
+                    "lsx.vsubwev.h.b" => "__builtin_lsx_vsubwev_h_b",
+                    "lsx.vsubwev.h.bu" => "__builtin_lsx_vsubwev_h_bu",
+                    "lsx.vsubwev.q.d" => "__builtin_lsx_vsubwev_q_d",
+                    "lsx.vsubwev.q.du" => "__builtin_lsx_vsubwev_q_du",
+                    "lsx.vsubwev.w.h" => "__builtin_lsx_vsubwev_w_h",
+                    "lsx.vsubwev.w.hu" => "__builtin_lsx_vsubwev_w_hu",
+                    "lsx.vsubwod.d.w" => "__builtin_lsx_vsubwod_d_w",
+                    "lsx.vsubwod.d.wu" => "__builtin_lsx_vsubwod_d_wu",
+                    "lsx.vsubwod.h.b" => "__builtin_lsx_vsubwod_h_b",
+                    "lsx.vsubwod.h.bu" => "__builtin_lsx_vsubwod_h_bu",
+                    "lsx.vsubwod.q.d" => "__builtin_lsx_vsubwod_q_d",
+                    "lsx.vsubwod.q.du" => "__builtin_lsx_vsubwod_q_du",
+                    "lsx.vsubwod.w.h" => "__builtin_lsx_vsubwod_w_h",
+                    "lsx.vsubwod.w.hu" => "__builtin_lsx_vsubwod_w_hu",
+                    "lsx.vxor.v" => "__builtin_lsx_vxor_v",
+                    "lsx.vxori.b" => "__builtin_lsx_vxori_b",
+                    "movfcsr2gr" => "__builtin_loongarch_movfcsr2gr",
+                    "movgr2fcsr" => "__builtin_loongarch_movgr2fcsr",
+                    "syscall" => "__builtin_loongarch_syscall",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            loongarch(name)
+        }
+        "mips" => {
+            #[allow(non_snake_case)]
+            fn mips(name: &str) -> &str {
+                match name {
+                    // mips
+                    "absq.s.ph" => "__builtin_mips_absq_s_ph",
+                    "absq.s.qb" => "__builtin_mips_absq_s_qb",
+                    "absq.s.w" => "__builtin_mips_absq_s_w",
+                    "add.a.b" => "__builtin_msa_add_a_b",
+                    "add.a.d" => "__builtin_msa_add_a_d",
+                    "add.a.h" => "__builtin_msa_add_a_h",
+                    "add.a.w" => "__builtin_msa_add_a_w",
+                    "addq.ph" => "__builtin_mips_addq_ph",
+                    "addq.s.ph" => "__builtin_mips_addq_s_ph",
+                    "addq.s.w" => "__builtin_mips_addq_s_w",
+                    "addqh.ph" => "__builtin_mips_addqh_ph",
+                    "addqh.r.ph" => "__builtin_mips_addqh_r_ph",
+                    "addqh.r.w" => "__builtin_mips_addqh_r_w",
+                    "addqh.w" => "__builtin_mips_addqh_w",
+                    "adds.a.b" => "__builtin_msa_adds_a_b",
+                    "adds.a.d" => "__builtin_msa_adds_a_d",
+                    "adds.a.h" => "__builtin_msa_adds_a_h",
+                    "adds.a.w" => "__builtin_msa_adds_a_w",
+                    "adds.s.b" => "__builtin_msa_adds_s_b",
+                    "adds.s.d" => "__builtin_msa_adds_s_d",
+                    "adds.s.h" => "__builtin_msa_adds_s_h",
+                    "adds.s.w" => "__builtin_msa_adds_s_w",
+                    "adds.u.b" => "__builtin_msa_adds_u_b",
+                    "adds.u.d" => "__builtin_msa_adds_u_d",
+                    "adds.u.h" => "__builtin_msa_adds_u_h",
+                    "adds.u.w" => "__builtin_msa_adds_u_w",
+                    "addsc" => "__builtin_mips_addsc",
+                    "addu.ph" => "__builtin_mips_addu_ph",
+                    "addu.qb" => "__builtin_mips_addu_qb",
+                    "addu.s.ph" => "__builtin_mips_addu_s_ph",
+                    "addu.s.qb" => "__builtin_mips_addu_s_qb",
+                    "adduh.qb" => "__builtin_mips_adduh_qb",
+                    "adduh.r.qb" => "__builtin_mips_adduh_r_qb",
+                    "addv.b" => "__builtin_msa_addv_b",
+                    "addv.d" => "__builtin_msa_addv_d",
+                    "addv.h" => "__builtin_msa_addv_h",
+                    "addv.w" => "__builtin_msa_addv_w",
+                    "addvi.b" => "__builtin_msa_addvi_b",
+                    "addvi.d" => "__builtin_msa_addvi_d",
+                    "addvi.h" => "__builtin_msa_addvi_h",
+                    "addvi.w" => "__builtin_msa_addvi_w",
+                    "addwc" => "__builtin_mips_addwc",
+                    "and.v" => "__builtin_msa_and_v",
+                    "andi.b" => "__builtin_msa_andi_b",
+                    "append" => "__builtin_mips_append",
+                    "asub.s.b" => "__builtin_msa_asub_s_b",
+                    "asub.s.d" => "__builtin_msa_asub_s_d",
+                    "asub.s.h" => "__builtin_msa_asub_s_h",
+                    "asub.s.w" => "__builtin_msa_asub_s_w",
+                    "asub.u.b" => "__builtin_msa_asub_u_b",
+                    "asub.u.d" => "__builtin_msa_asub_u_d",
+                    "asub.u.h" => "__builtin_msa_asub_u_h",
+                    "asub.u.w" => "__builtin_msa_asub_u_w",
+                    "ave.s.b" => "__builtin_msa_ave_s_b",
+                    "ave.s.d" => "__builtin_msa_ave_s_d",
+                    "ave.s.h" => "__builtin_msa_ave_s_h",
+                    "ave.s.w" => "__builtin_msa_ave_s_w",
+                    "ave.u.b" => "__builtin_msa_ave_u_b",
+                    "ave.u.d" => "__builtin_msa_ave_u_d",
+                    "ave.u.h" => "__builtin_msa_ave_u_h",
+                    "ave.u.w" => "__builtin_msa_ave_u_w",
+                    "aver.s.b" => "__builtin_msa_aver_s_b",
+                    "aver.s.d" => "__builtin_msa_aver_s_d",
+                    "aver.s.h" => "__builtin_msa_aver_s_h",
+                    "aver.s.w" => "__builtin_msa_aver_s_w",
+                    "aver.u.b" => "__builtin_msa_aver_u_b",
+                    "aver.u.d" => "__builtin_msa_aver_u_d",
+                    "aver.u.h" => "__builtin_msa_aver_u_h",
+                    "aver.u.w" => "__builtin_msa_aver_u_w",
+                    "balign" => "__builtin_mips_balign",
+                    "bclr.b" => "__builtin_msa_bclr_b",
+                    "bclr.d" => "__builtin_msa_bclr_d",
+                    "bclr.h" => "__builtin_msa_bclr_h",
+                    "bclr.w" => "__builtin_msa_bclr_w",
+                    "bclri.b" => "__builtin_msa_bclri_b",
+                    "bclri.d" => "__builtin_msa_bclri_d",
+                    "bclri.h" => "__builtin_msa_bclri_h",
+                    "bclri.w" => "__builtin_msa_bclri_w",
+                    "binsl.b" => "__builtin_msa_binsl_b",
+                    "binsl.d" => "__builtin_msa_binsl_d",
+                    "binsl.h" => "__builtin_msa_binsl_h",
+                    "binsl.w" => "__builtin_msa_binsl_w",
+                    "binsli.b" => "__builtin_msa_binsli_b",
+                    "binsli.d" => "__builtin_msa_binsli_d",
+                    "binsli.h" => "__builtin_msa_binsli_h",
+                    "binsli.w" => "__builtin_msa_binsli_w",
+                    "binsr.b" => "__builtin_msa_binsr_b",
+                    "binsr.d" => "__builtin_msa_binsr_d",
+                    "binsr.h" => "__builtin_msa_binsr_h",
+                    "binsr.w" => "__builtin_msa_binsr_w",
+                    "binsri.b" => "__builtin_msa_binsri_b",
+                    "binsri.d" => "__builtin_msa_binsri_d",
+                    "binsri.h" => "__builtin_msa_binsri_h",
+                    "binsri.w" => "__builtin_msa_binsri_w",
+                    "bitrev" => "__builtin_mips_bitrev",
+                    "bmnz.v" => "__builtin_msa_bmnz_v",
+                    "bmnzi.b" => "__builtin_msa_bmnzi_b",
+                    "bmz.v" => "__builtin_msa_bmz_v",
+                    "bmzi.b" => "__builtin_msa_bmzi_b",
+                    "bneg.b" => "__builtin_msa_bneg_b",
+                    "bneg.d" => "__builtin_msa_bneg_d",
+                    "bneg.h" => "__builtin_msa_bneg_h",
+                    "bneg.w" => "__builtin_msa_bneg_w",
+                    "bnegi.b" => "__builtin_msa_bnegi_b",
+                    "bnegi.d" => "__builtin_msa_bnegi_d",
+                    "bnegi.h" => "__builtin_msa_bnegi_h",
+                    "bnegi.w" => "__builtin_msa_bnegi_w",
+                    "bnz.b" => "__builtin_msa_bnz_b",
+                    "bnz.d" => "__builtin_msa_bnz_d",
+                    "bnz.h" => "__builtin_msa_bnz_h",
+                    "bnz.v" => "__builtin_msa_bnz_v",
+                    "bnz.w" => "__builtin_msa_bnz_w",
+                    "bposge32" => "__builtin_mips_bposge32",
+                    "bsel.v" => "__builtin_msa_bsel_v",
+                    "bseli.b" => "__builtin_msa_bseli_b",
+                    "bset.b" => "__builtin_msa_bset_b",
+                    "bset.d" => "__builtin_msa_bset_d",
+                    "bset.h" => "__builtin_msa_bset_h",
+                    "bset.w" => "__builtin_msa_bset_w",
+                    "bseti.b" => "__builtin_msa_bseti_b",
+                    "bseti.d" => "__builtin_msa_bseti_d",
+                    "bseti.h" => "__builtin_msa_bseti_h",
+                    "bseti.w" => "__builtin_msa_bseti_w",
+                    "bz.b" => "__builtin_msa_bz_b",
+                    "bz.d" => "__builtin_msa_bz_d",
+                    "bz.h" => "__builtin_msa_bz_h",
+                    "bz.v" => "__builtin_msa_bz_v",
+                    "bz.w" => "__builtin_msa_bz_w",
+                    "ceq.b" => "__builtin_msa_ceq_b",
+                    "ceq.d" => "__builtin_msa_ceq_d",
+                    "ceq.h" => "__builtin_msa_ceq_h",
+                    "ceq.w" => "__builtin_msa_ceq_w",
+                    "ceqi.b" => "__builtin_msa_ceqi_b",
+                    "ceqi.d" => "__builtin_msa_ceqi_d",
+                    "ceqi.h" => "__builtin_msa_ceqi_h",
+                    "ceqi.w" => "__builtin_msa_ceqi_w",
+                    "cfcmsa" => "__builtin_msa_cfcmsa",
+                    "cle.s.b" => "__builtin_msa_cle_s_b",
+                    "cle.s.d" => "__builtin_msa_cle_s_d",
+                    "cle.s.h" => "__builtin_msa_cle_s_h",
+                    "cle.s.w" => "__builtin_msa_cle_s_w",
+                    "cle.u.b" => "__builtin_msa_cle_u_b",
+                    "cle.u.d" => "__builtin_msa_cle_u_d",
+                    "cle.u.h" => "__builtin_msa_cle_u_h",
+                    "cle.u.w" => "__builtin_msa_cle_u_w",
+                    "clei.s.b" => "__builtin_msa_clei_s_b",
+                    "clei.s.d" => "__builtin_msa_clei_s_d",
+                    "clei.s.h" => "__builtin_msa_clei_s_h",
+                    "clei.s.w" => "__builtin_msa_clei_s_w",
+                    "clei.u.b" => "__builtin_msa_clei_u_b",
+                    "clei.u.d" => "__builtin_msa_clei_u_d",
+                    "clei.u.h" => "__builtin_msa_clei_u_h",
+                    "clei.u.w" => "__builtin_msa_clei_u_w",
+                    "clt.s.b" => "__builtin_msa_clt_s_b",
+                    "clt.s.d" => "__builtin_msa_clt_s_d",
+                    "clt.s.h" => "__builtin_msa_clt_s_h",
+                    "clt.s.w" => "__builtin_msa_clt_s_w",
+                    "clt.u.b" => "__builtin_msa_clt_u_b",
+                    "clt.u.d" => "__builtin_msa_clt_u_d",
+                    "clt.u.h" => "__builtin_msa_clt_u_h",
+                    "clt.u.w" => "__builtin_msa_clt_u_w",
+                    "clti.s.b" => "__builtin_msa_clti_s_b",
+                    "clti.s.d" => "__builtin_msa_clti_s_d",
+                    "clti.s.h" => "__builtin_msa_clti_s_h",
+                    "clti.s.w" => "__builtin_msa_clti_s_w",
+                    "clti.u.b" => "__builtin_msa_clti_u_b",
+                    "clti.u.d" => "__builtin_msa_clti_u_d",
+                    "clti.u.h" => "__builtin_msa_clti_u_h",
+                    "clti.u.w" => "__builtin_msa_clti_u_w",
+                    "cmp.eq.ph" => "__builtin_mips_cmp_eq_ph",
+                    "cmp.le.ph" => "__builtin_mips_cmp_le_ph",
+                    "cmp.lt.ph" => "__builtin_mips_cmp_lt_ph",
+                    "cmpgdu.eq.qb" => "__builtin_mips_cmpgdu_eq_qb",
+                    "cmpgdu.le.qb" => "__builtin_mips_cmpgdu_le_qb",
+                    "cmpgdu.lt.qb" => "__builtin_mips_cmpgdu_lt_qb",
+                    "cmpgu.eq.qb" => "__builtin_mips_cmpgu_eq_qb",
+                    "cmpgu.le.qb" => "__builtin_mips_cmpgu_le_qb",
+                    "cmpgu.lt.qb" => "__builtin_mips_cmpgu_lt_qb",
+                    "cmpu.eq.qb" => "__builtin_mips_cmpu_eq_qb",
+                    "cmpu.le.qb" => "__builtin_mips_cmpu_le_qb",
+                    "cmpu.lt.qb" => "__builtin_mips_cmpu_lt_qb",
+                    "copy.s.b" => "__builtin_msa_copy_s_b",
+                    "copy.s.d" => "__builtin_msa_copy_s_d",
+                    "copy.s.h" => "__builtin_msa_copy_s_h",
+                    "copy.s.w" => "__builtin_msa_copy_s_w",
+                    "copy.u.b" => "__builtin_msa_copy_u_b",
+                    "copy.u.d" => "__builtin_msa_copy_u_d",
+                    "copy.u.h" => "__builtin_msa_copy_u_h",
+                    "copy.u.w" => "__builtin_msa_copy_u_w",
+                    "ctcmsa" => "__builtin_msa_ctcmsa",
+                    "div.s.b" => "__builtin_msa_div_s_b",
+                    "div.s.d" => "__builtin_msa_div_s_d",
+                    "div.s.h" => "__builtin_msa_div_s_h",
+                    "div.s.w" => "__builtin_msa_div_s_w",
+                    "div.u.b" => "__builtin_msa_div_u_b",
+                    "div.u.d" => "__builtin_msa_div_u_d",
+                    "div.u.h" => "__builtin_msa_div_u_h",
+                    "div.u.w" => "__builtin_msa_div_u_w",
+                    "dlsa" => "__builtin_mips_dlsa",
+                    "dotp.s.d" => "__builtin_msa_dotp_s_d",
+                    "dotp.s.h" => "__builtin_msa_dotp_s_h",
+                    "dotp.s.w" => "__builtin_msa_dotp_s_w",
+                    "dotp.u.d" => "__builtin_msa_dotp_u_d",
+                    "dotp.u.h" => "__builtin_msa_dotp_u_h",
+                    "dotp.u.w" => "__builtin_msa_dotp_u_w",
+                    "dpa.w.ph" => "__builtin_mips_dpa_w_ph",
+                    "dpadd.s.d" => "__builtin_msa_dpadd_s_d",
+                    "dpadd.s.h" => "__builtin_msa_dpadd_s_h",
+                    "dpadd.s.w" => "__builtin_msa_dpadd_s_w",
+                    "dpadd.u.d" => "__builtin_msa_dpadd_u_d",
+                    "dpadd.u.h" => "__builtin_msa_dpadd_u_h",
+                    "dpadd.u.w" => "__builtin_msa_dpadd_u_w",
+                    "dpaq.s.w.ph" => "__builtin_mips_dpaq_s_w_ph",
+                    "dpaq.sa.l.w" => "__builtin_mips_dpaq_sa_l_w",
+                    "dpaqx.s.w.ph" => "__builtin_mips_dpaqx_s_w_ph",
+                    "dpaqx.sa.w.ph" => "__builtin_mips_dpaqx_sa_w_ph",
+                    "dpau.h.qbl" => "__builtin_mips_dpau_h_qbl",
+                    "dpau.h.qbr" => "__builtin_mips_dpau_h_qbr",
+                    "dpax.w.ph" => "__builtin_mips_dpax_w_ph",
+                    "dps.w.ph" => "__builtin_mips_dps_w_ph",
+                    "dpsq.s.w.ph" => "__builtin_mips_dpsq_s_w_ph",
+                    "dpsq.sa.l.w" => "__builtin_mips_dpsq_sa_l_w",
+                    "dpsqx.s.w.ph" => "__builtin_mips_dpsqx_s_w_ph",
+                    "dpsqx.sa.w.ph" => "__builtin_mips_dpsqx_sa_w_ph",
+                    "dpsu.h.qbl" => "__builtin_mips_dpsu_h_qbl",
+                    "dpsu.h.qbr" => "__builtin_mips_dpsu_h_qbr",
+                    "dpsub.s.d" => "__builtin_msa_dpsub_s_d",
+                    "dpsub.s.h" => "__builtin_msa_dpsub_s_h",
+                    "dpsub.s.w" => "__builtin_msa_dpsub_s_w",
+                    "dpsub.u.d" => "__builtin_msa_dpsub_u_d",
+                    "dpsub.u.h" => "__builtin_msa_dpsub_u_h",
+                    "dpsub.u.w" => "__builtin_msa_dpsub_u_w",
+                    "dpsx.w.ph" => "__builtin_mips_dpsx_w_ph",
+                    "extp" => "__builtin_mips_extp",
+                    "extpdp" => "__builtin_mips_extpdp",
+                    "extr.r.w" => "__builtin_mips_extr_r_w",
+                    "extr.rs.w" => "__builtin_mips_extr_rs_w",
+                    "extr.s.h" => "__builtin_mips_extr_s_h",
+                    "extr.w" => "__builtin_mips_extr_w",
+                    "fadd.d" => "__builtin_msa_fadd_d",
+                    "fadd.w" => "__builtin_msa_fadd_w",
+                    "fcaf.d" => "__builtin_msa_fcaf_d",
+                    "fcaf.w" => "__builtin_msa_fcaf_w",
+                    "fceq.d" => "__builtin_msa_fceq_d",
+                    "fceq.w" => "__builtin_msa_fceq_w",
+                    "fclass.d" => "__builtin_msa_fclass_d",
+                    "fclass.w" => "__builtin_msa_fclass_w",
+                    "fcle.d" => "__builtin_msa_fcle_d",
+                    "fcle.w" => "__builtin_msa_fcle_w",
+                    "fclt.d" => "__builtin_msa_fclt_d",
+                    "fclt.w" => "__builtin_msa_fclt_w",
+                    "fcne.d" => "__builtin_msa_fcne_d",
+                    "fcne.w" => "__builtin_msa_fcne_w",
+                    "fcor.d" => "__builtin_msa_fcor_d",
+                    "fcor.w" => "__builtin_msa_fcor_w",
+                    "fcueq.d" => "__builtin_msa_fcueq_d",
+                    "fcueq.w" => "__builtin_msa_fcueq_w",
+                    "fcule.d" => "__builtin_msa_fcule_d",
+                    "fcule.w" => "__builtin_msa_fcule_w",
+                    "fcult.d" => "__builtin_msa_fcult_d",
+                    "fcult.w" => "__builtin_msa_fcult_w",
+                    "fcun.d" => "__builtin_msa_fcun_d",
+                    "fcun.w" => "__builtin_msa_fcun_w",
+                    "fcune.d" => "__builtin_msa_fcune_d",
+                    "fcune.w" => "__builtin_msa_fcune_w",
+                    "fdiv.d" => "__builtin_msa_fdiv_d",
+                    "fdiv.w" => "__builtin_msa_fdiv_w",
+                    "fexdo.h" => "__builtin_msa_fexdo_h",
+                    "fexdo.w" => "__builtin_msa_fexdo_w",
+                    "fexp2.d" => "__builtin_msa_fexp2_d",
+                    "fexp2.w" => "__builtin_msa_fexp2_w",
+                    "fexupl.d" => "__builtin_msa_fexupl_d",
+                    "fexupl.w" => "__builtin_msa_fexupl_w",
+                    "fexupr.d" => "__builtin_msa_fexupr_d",
+                    "fexupr.w" => "__builtin_msa_fexupr_w",
+                    "ffint.s.d" => "__builtin_msa_ffint_s_d",
+                    "ffint.s.w" => "__builtin_msa_ffint_s_w",
+                    "ffint.u.d" => "__builtin_msa_ffint_u_d",
+                    "ffint.u.w" => "__builtin_msa_ffint_u_w",
+                    "ffql.d" => "__builtin_msa_ffql_d",
+                    "ffql.w" => "__builtin_msa_ffql_w",
+                    "ffqr.d" => "__builtin_msa_ffqr_d",
+                    "ffqr.w" => "__builtin_msa_ffqr_w",
+                    "fill.b" => "__builtin_msa_fill_b",
+                    "fill.d" => "__builtin_msa_fill_d",
+                    "fill.h" => "__builtin_msa_fill_h",
+                    "fill.w" => "__builtin_msa_fill_w",
+                    "flog2.d" => "__builtin_msa_flog2_d",
+                    "flog2.w" => "__builtin_msa_flog2_w",
+                    "fmadd.d" => "__builtin_msa_fmadd_d",
+                    "fmadd.w" => "__builtin_msa_fmadd_w",
+                    "fmax.a.d" => "__builtin_msa_fmax_a_d",
+                    "fmax.a.w" => "__builtin_msa_fmax_a_w",
+                    "fmax.d" => "__builtin_msa_fmax_d",
+                    "fmax.w" => "__builtin_msa_fmax_w",
+                    "fmin.a.d" => "__builtin_msa_fmin_a_d",
+                    "fmin.a.w" => "__builtin_msa_fmin_a_w",
+                    "fmin.d" => "__builtin_msa_fmin_d",
+                    "fmin.w" => "__builtin_msa_fmin_w",
+                    "fmsub.d" => "__builtin_msa_fmsub_d",
+                    "fmsub.w" => "__builtin_msa_fmsub_w",
+                    "fmul.d" => "__builtin_msa_fmul_d",
+                    "fmul.w" => "__builtin_msa_fmul_w",
+                    "frcp.d" => "__builtin_msa_frcp_d",
+                    "frcp.w" => "__builtin_msa_frcp_w",
+                    "frint.d" => "__builtin_msa_frint_d",
+                    "frint.w" => "__builtin_msa_frint_w",
+                    "frsqrt.d" => "__builtin_msa_frsqrt_d",
+                    "frsqrt.w" => "__builtin_msa_frsqrt_w",
+                    "fsaf.d" => "__builtin_msa_fsaf_d",
+                    "fsaf.w" => "__builtin_msa_fsaf_w",
+                    "fseq.d" => "__builtin_msa_fseq_d",
+                    "fseq.w" => "__builtin_msa_fseq_w",
+                    "fsle.d" => "__builtin_msa_fsle_d",
+                    "fsle.w" => "__builtin_msa_fsle_w",
+                    "fslt.d" => "__builtin_msa_fslt_d",
+                    "fslt.w" => "__builtin_msa_fslt_w",
+                    "fsne.d" => "__builtin_msa_fsne_d",
+                    "fsne.w" => "__builtin_msa_fsne_w",
+                    "fsor.d" => "__builtin_msa_fsor_d",
+                    "fsor.w" => "__builtin_msa_fsor_w",
+                    "fsqrt.d" => "__builtin_msa_fsqrt_d",
+                    "fsqrt.w" => "__builtin_msa_fsqrt_w",
+                    "fsub.d" => "__builtin_msa_fsub_d",
+                    "fsub.w" => "__builtin_msa_fsub_w",
+                    "fsueq.d" => "__builtin_msa_fsueq_d",
+                    "fsueq.w" => "__builtin_msa_fsueq_w",
+                    "fsule.d" => "__builtin_msa_fsule_d",
+                    "fsule.w" => "__builtin_msa_fsule_w",
+                    "fsult.d" => "__builtin_msa_fsult_d",
+                    "fsult.w" => "__builtin_msa_fsult_w",
+                    "fsun.d" => "__builtin_msa_fsun_d",
+                    "fsun.w" => "__builtin_msa_fsun_w",
+                    "fsune.d" => "__builtin_msa_fsune_d",
+                    "fsune.w" => "__builtin_msa_fsune_w",
+                    "ftint.s.d" => "__builtin_msa_ftint_s_d",
+                    "ftint.s.w" => "__builtin_msa_ftint_s_w",
+                    "ftint.u.d" => "__builtin_msa_ftint_u_d",
+                    "ftint.u.w" => "__builtin_msa_ftint_u_w",
+                    "ftq.h" => "__builtin_msa_ftq_h",
+                    "ftq.w" => "__builtin_msa_ftq_w",
+                    "ftrunc.s.d" => "__builtin_msa_ftrunc_s_d",
+                    "ftrunc.s.w" => "__builtin_msa_ftrunc_s_w",
+                    "ftrunc.u.d" => "__builtin_msa_ftrunc_u_d",
+                    "ftrunc.u.w" => "__builtin_msa_ftrunc_u_w",
+                    "hadd.s.d" => "__builtin_msa_hadd_s_d",
+                    "hadd.s.h" => "__builtin_msa_hadd_s_h",
+                    "hadd.s.w" => "__builtin_msa_hadd_s_w",
+                    "hadd.u.d" => "__builtin_msa_hadd_u_d",
+                    "hadd.u.h" => "__builtin_msa_hadd_u_h",
+                    "hadd.u.w" => "__builtin_msa_hadd_u_w",
+                    "hsub.s.d" => "__builtin_msa_hsub_s_d",
+                    "hsub.s.h" => "__builtin_msa_hsub_s_h",
+                    "hsub.s.w" => "__builtin_msa_hsub_s_w",
+                    "hsub.u.d" => "__builtin_msa_hsub_u_d",
+                    "hsub.u.h" => "__builtin_msa_hsub_u_h",
+                    "hsub.u.w" => "__builtin_msa_hsub_u_w",
+                    "ilvev.b" => "__builtin_msa_ilvev_b",
+                    "ilvev.d" => "__builtin_msa_ilvev_d",
+                    "ilvev.h" => "__builtin_msa_ilvev_h",
+                    "ilvev.w" => "__builtin_msa_ilvev_w",
+                    "ilvl.b" => "__builtin_msa_ilvl_b",
+                    "ilvl.d" => "__builtin_msa_ilvl_d",
+                    "ilvl.h" => "__builtin_msa_ilvl_h",
+                    "ilvl.w" => "__builtin_msa_ilvl_w",
+                    "ilvod.b" => "__builtin_msa_ilvod_b",
+                    "ilvod.d" => "__builtin_msa_ilvod_d",
+                    "ilvod.h" => "__builtin_msa_ilvod_h",
+                    "ilvod.w" => "__builtin_msa_ilvod_w",
+                    "ilvr.b" => "__builtin_msa_ilvr_b",
+                    "ilvr.d" => "__builtin_msa_ilvr_d",
+                    "ilvr.h" => "__builtin_msa_ilvr_h",
+                    "ilvr.w" => "__builtin_msa_ilvr_w",
+                    "insert.b" => "__builtin_msa_insert_b",
+                    "insert.d" => "__builtin_msa_insert_d",
+                    "insert.h" => "__builtin_msa_insert_h",
+                    "insert.w" => "__builtin_msa_insert_w",
+                    "insv" => "__builtin_mips_insv",
+                    "insve.b" => "__builtin_msa_insve_b",
+                    "insve.d" => "__builtin_msa_insve_d",
+                    "insve.h" => "__builtin_msa_insve_h",
+                    "insve.w" => "__builtin_msa_insve_w",
+                    "lbux" => "__builtin_mips_lbux",
+                    "ld.b" => "__builtin_msa_ld_b",
+                    "ld.d" => "__builtin_msa_ld_d",
+                    "ld.h" => "__builtin_msa_ld_h",
+                    "ld.w" => "__builtin_msa_ld_w",
+                    "ldi.b" => "__builtin_msa_ldi_b",
+                    "ldi.d" => "__builtin_msa_ldi_d",
+                    "ldi.h" => "__builtin_msa_ldi_h",
+                    "ldi.w" => "__builtin_msa_ldi_w",
+                    "ldr.d" => "__builtin_msa_ldr_d",
+                    "ldr.w" => "__builtin_msa_ldr_w",
+                    "lhx" => "__builtin_mips_lhx",
+                    "lsa" => "__builtin_mips_lsa",
+                    "lwx" => "__builtin_mips_lwx",
+                    "madd" => "__builtin_mips_madd",
+                    "madd.q.h" => "__builtin_msa_madd_q_h",
+                    "madd.q.w" => "__builtin_msa_madd_q_w",
+                    "maddr.q.h" => "__builtin_msa_maddr_q_h",
+                    "maddr.q.w" => "__builtin_msa_maddr_q_w",
+                    "maddu" => "__builtin_mips_maddu",
+                    "maddv.b" => "__builtin_msa_maddv_b",
+                    "maddv.d" => "__builtin_msa_maddv_d",
+                    "maddv.h" => "__builtin_msa_maddv_h",
+                    "maddv.w" => "__builtin_msa_maddv_w",
+                    "maq.s.w.phl" => "__builtin_mips_maq_s_w_phl",
+                    "maq.s.w.phr" => "__builtin_mips_maq_s_w_phr",
+                    "maq.sa.w.phl" => "__builtin_mips_maq_sa_w_phl",
+                    "maq.sa.w.phr" => "__builtin_mips_maq_sa_w_phr",
+                    "max.a.b" => "__builtin_msa_max_a_b",
+                    "max.a.d" => "__builtin_msa_max_a_d",
+                    "max.a.h" => "__builtin_msa_max_a_h",
+                    "max.a.w" => "__builtin_msa_max_a_w",
+                    "max.s.b" => "__builtin_msa_max_s_b",
+                    "max.s.d" => "__builtin_msa_max_s_d",
+                    "max.s.h" => "__builtin_msa_max_s_h",
+                    "max.s.w" => "__builtin_msa_max_s_w",
+                    "max.u.b" => "__builtin_msa_max_u_b",
+                    "max.u.d" => "__builtin_msa_max_u_d",
+                    "max.u.h" => "__builtin_msa_max_u_h",
+                    "max.u.w" => "__builtin_msa_max_u_w",
+                    "maxi.s.b" => "__builtin_msa_maxi_s_b",
+                    "maxi.s.d" => "__builtin_msa_maxi_s_d",
+                    "maxi.s.h" => "__builtin_msa_maxi_s_h",
+                    "maxi.s.w" => "__builtin_msa_maxi_s_w",
+                    "maxi.u.b" => "__builtin_msa_maxi_u_b",
+                    "maxi.u.d" => "__builtin_msa_maxi_u_d",
+                    "maxi.u.h" => "__builtin_msa_maxi_u_h",
+                    "maxi.u.w" => "__builtin_msa_maxi_u_w",
+                    "min.a.b" => "__builtin_msa_min_a_b",
+                    "min.a.d" => "__builtin_msa_min_a_d",
+                    "min.a.h" => "__builtin_msa_min_a_h",
+                    "min.a.w" => "__builtin_msa_min_a_w",
+                    "min.s.b" => "__builtin_msa_min_s_b",
+                    "min.s.d" => "__builtin_msa_min_s_d",
+                    "min.s.h" => "__builtin_msa_min_s_h",
+                    "min.s.w" => "__builtin_msa_min_s_w",
+                    "min.u.b" => "__builtin_msa_min_u_b",
+                    "min.u.d" => "__builtin_msa_min_u_d",
+                    "min.u.h" => "__builtin_msa_min_u_h",
+                    "min.u.w" => "__builtin_msa_min_u_w",
+                    "mini.s.b" => "__builtin_msa_mini_s_b",
+                    "mini.s.d" => "__builtin_msa_mini_s_d",
+                    "mini.s.h" => "__builtin_msa_mini_s_h",
+                    "mini.s.w" => "__builtin_msa_mini_s_w",
+                    "mini.u.b" => "__builtin_msa_mini_u_b",
+                    "mini.u.d" => "__builtin_msa_mini_u_d",
+                    "mini.u.h" => "__builtin_msa_mini_u_h",
+                    "mini.u.w" => "__builtin_msa_mini_u_w",
+                    "mod.s.b" => "__builtin_msa_mod_s_b",
+                    "mod.s.d" => "__builtin_msa_mod_s_d",
+                    "mod.s.h" => "__builtin_msa_mod_s_h",
+                    "mod.s.w" => "__builtin_msa_mod_s_w",
+                    "mod.u.b" => "__builtin_msa_mod_u_b",
+                    "mod.u.d" => "__builtin_msa_mod_u_d",
+                    "mod.u.h" => "__builtin_msa_mod_u_h",
+                    "mod.u.w" => "__builtin_msa_mod_u_w",
+                    "modsub" => "__builtin_mips_modsub",
+                    "move.v" => "__builtin_msa_move_v",
+                    "msub" => "__builtin_mips_msub",
+                    "msub.q.h" => "__builtin_msa_msub_q_h",
+                    "msub.q.w" => "__builtin_msa_msub_q_w",
+                    "msubr.q.h" => "__builtin_msa_msubr_q_h",
+                    "msubr.q.w" => "__builtin_msa_msubr_q_w",
+                    "msubu" => "__builtin_mips_msubu",
+                    "msubv.b" => "__builtin_msa_msubv_b",
+                    "msubv.d" => "__builtin_msa_msubv_d",
+                    "msubv.h" => "__builtin_msa_msubv_h",
+                    "msubv.w" => "__builtin_msa_msubv_w",
+                    "mthlip" => "__builtin_mips_mthlip",
+                    "mul.ph" => "__builtin_mips_mul_ph",
+                    "mul.q.h" => "__builtin_msa_mul_q_h",
+                    "mul.q.w" => "__builtin_msa_mul_q_w",
+                    "mul.s.ph" => "__builtin_mips_mul_s_ph",
+                    "muleq.s.w.phl" => "__builtin_mips_muleq_s_w_phl",
+                    "muleq.s.w.phr" => "__builtin_mips_muleq_s_w_phr",
+                    "muleu.s.ph.qbl" => "__builtin_mips_muleu_s_ph_qbl",
+                    "muleu.s.ph.qbr" => "__builtin_mips_muleu_s_ph_qbr",
+                    "mulq.rs.ph" => "__builtin_mips_mulq_rs_ph",
+                    "mulq.rs.w" => "__builtin_mips_mulq_rs_w",
+                    "mulq.s.ph" => "__builtin_mips_mulq_s_ph",
+                    "mulq.s.w" => "__builtin_mips_mulq_s_w",
+                    "mulr.q.h" => "__builtin_msa_mulr_q_h",
+                    "mulr.q.w" => "__builtin_msa_mulr_q_w",
+                    "mulsa.w.ph" => "__builtin_mips_mulsa_w_ph",
+                    "mulsaq.s.w.ph" => "__builtin_mips_mulsaq_s_w_ph",
+                    "mult" => "__builtin_mips_mult",
+                    "multu" => "__builtin_mips_multu",
+                    "mulv.b" => "__builtin_msa_mulv_b",
+                    "mulv.d" => "__builtin_msa_mulv_d",
+                    "mulv.h" => "__builtin_msa_mulv_h",
+                    "mulv.w" => "__builtin_msa_mulv_w",
+                    "nloc.b" => "__builtin_msa_nloc_b",
+                    "nloc.d" => "__builtin_msa_nloc_d",
+                    "nloc.h" => "__builtin_msa_nloc_h",
+                    "nloc.w" => "__builtin_msa_nloc_w",
+                    "nlzc.b" => "__builtin_msa_nlzc_b",
+                    "nlzc.d" => "__builtin_msa_nlzc_d",
+                    "nlzc.h" => "__builtin_msa_nlzc_h",
+                    "nlzc.w" => "__builtin_msa_nlzc_w",
+                    "nor.v" => "__builtin_msa_nor_v",
+                    "nori.b" => "__builtin_msa_nori_b",
+                    "or.v" => "__builtin_msa_or_v",
+                    "ori.b" => "__builtin_msa_ori_b",
+                    "packrl.ph" => "__builtin_mips_packrl_ph",
+                    "pckev.b" => "__builtin_msa_pckev_b",
+                    "pckev.d" => "__builtin_msa_pckev_d",
+                    "pckev.h" => "__builtin_msa_pckev_h",
+                    "pckev.w" => "__builtin_msa_pckev_w",
+                    "pckod.b" => "__builtin_msa_pckod_b",
+                    "pckod.d" => "__builtin_msa_pckod_d",
+                    "pckod.h" => "__builtin_msa_pckod_h",
+                    "pckod.w" => "__builtin_msa_pckod_w",
+                    "pcnt.b" => "__builtin_msa_pcnt_b",
+                    "pcnt.d" => "__builtin_msa_pcnt_d",
+                    "pcnt.h" => "__builtin_msa_pcnt_h",
+                    "pcnt.w" => "__builtin_msa_pcnt_w",
+                    "pick.ph" => "__builtin_mips_pick_ph",
+                    "pick.qb" => "__builtin_mips_pick_qb",
+                    "preceq.w.phl" => "__builtin_mips_preceq_w_phl",
+                    "preceq.w.phr" => "__builtin_mips_preceq_w_phr",
+                    "precequ.ph.qbl" => "__builtin_mips_precequ_ph_qbl",
+                    "precequ.ph.qbla" => "__builtin_mips_precequ_ph_qbla",
+                    "precequ.ph.qbr" => "__builtin_mips_precequ_ph_qbr",
+                    "precequ.ph.qbra" => "__builtin_mips_precequ_ph_qbra",
+                    "preceu.ph.qbl" => "__builtin_mips_preceu_ph_qbl",
+                    "preceu.ph.qbla" => "__builtin_mips_preceu_ph_qbla",
+                    "preceu.ph.qbr" => "__builtin_mips_preceu_ph_qbr",
+                    "preceu.ph.qbra" => "__builtin_mips_preceu_ph_qbra",
+                    "precr.qb.ph" => "__builtin_mips_precr_qb_ph",
+                    "precr.sra.ph.w" => "__builtin_mips_precr_sra_ph_w",
+                    "precr.sra.r.ph.w" => "__builtin_mips_precr_sra_r_ph_w",
+                    "precrq.ph.w" => "__builtin_mips_precrq_ph_w",
+                    "precrq.qb.ph" => "__builtin_mips_precrq_qb_ph",
+                    "precrq.rs.ph.w" => "__builtin_mips_precrq_rs_ph_w",
+                    "precrqu.s.qb.ph" => "__builtin_mips_precrqu_s_qb_ph",
+                    "prepend" => "__builtin_mips_prepend",
+                    "raddu.w.qb" => "__builtin_mips_raddu_w_qb",
+                    "rddsp" => "__builtin_mips_rddsp",
+                    "repl.ph" => "__builtin_mips_repl_ph",
+                    "repl.qb" => "__builtin_mips_repl_qb",
+                    "sat.s.b" => "__builtin_msa_sat_s_b",
+                    "sat.s.d" => "__builtin_msa_sat_s_d",
+                    "sat.s.h" => "__builtin_msa_sat_s_h",
+                    "sat.s.w" => "__builtin_msa_sat_s_w",
+                    "sat.u.b" => "__builtin_msa_sat_u_b",
+                    "sat.u.d" => "__builtin_msa_sat_u_d",
+                    "sat.u.h" => "__builtin_msa_sat_u_h",
+                    "sat.u.w" => "__builtin_msa_sat_u_w",
+                    "shf.b" => "__builtin_msa_shf_b",
+                    "shf.h" => "__builtin_msa_shf_h",
+                    "shf.w" => "__builtin_msa_shf_w",
+                    "shilo" => "__builtin_mips_shilo",
+                    "shll.ph" => "__builtin_mips_shll_ph",
+                    "shll.qb" => "__builtin_mips_shll_qb",
+                    "shll.s.ph" => "__builtin_mips_shll_s_ph",
+                    "shll.s.w" => "__builtin_mips_shll_s_w",
+                    "shra.ph" => "__builtin_mips_shra_ph",
+                    "shra.qb" => "__builtin_mips_shra_qb",
+                    "shra.r.ph" => "__builtin_mips_shra_r_ph",
+                    "shra.r.qb" => "__builtin_mips_shra_r_qb",
+                    "shra.r.w" => "__builtin_mips_shra_r_w",
+                    "shrl.ph" => "__builtin_mips_shrl_ph",
+                    "shrl.qb" => "__builtin_mips_shrl_qb",
+                    "sld.b" => "__builtin_msa_sld_b",
+                    "sld.d" => "__builtin_msa_sld_d",
+                    "sld.h" => "__builtin_msa_sld_h",
+                    "sld.w" => "__builtin_msa_sld_w",
+                    "sldi.b" => "__builtin_msa_sldi_b",
+                    "sldi.d" => "__builtin_msa_sldi_d",
+                    "sldi.h" => "__builtin_msa_sldi_h",
+                    "sldi.w" => "__builtin_msa_sldi_w",
+                    "sll.b" => "__builtin_msa_sll_b",
+                    "sll.d" => "__builtin_msa_sll_d",
+                    "sll.h" => "__builtin_msa_sll_h",
+                    "sll.w" => "__builtin_msa_sll_w",
+                    "slli.b" => "__builtin_msa_slli_b",
+                    "slli.d" => "__builtin_msa_slli_d",
+                    "slli.h" => "__builtin_msa_slli_h",
+                    "slli.w" => "__builtin_msa_slli_w",
+                    "splat.b" => "__builtin_msa_splat_b",
+                    "splat.d" => "__builtin_msa_splat_d",
+                    "splat.h" => "__builtin_msa_splat_h",
+                    "splat.w" => "__builtin_msa_splat_w",
+                    "splati.b" => "__builtin_msa_splati_b",
+                    "splati.d" => "__builtin_msa_splati_d",
+                    "splati.h" => "__builtin_msa_splati_h",
+                    "splati.w" => "__builtin_msa_splati_w",
+                    "sra.b" => "__builtin_msa_sra_b",
+                    "sra.d" => "__builtin_msa_sra_d",
+                    "sra.h" => "__builtin_msa_sra_h",
+                    "sra.w" => "__builtin_msa_sra_w",
+                    "srai.b" => "__builtin_msa_srai_b",
+                    "srai.d" => "__builtin_msa_srai_d",
+                    "srai.h" => "__builtin_msa_srai_h",
+                    "srai.w" => "__builtin_msa_srai_w",
+                    "srar.b" => "__builtin_msa_srar_b",
+                    "srar.d" => "__builtin_msa_srar_d",
+                    "srar.h" => "__builtin_msa_srar_h",
+                    "srar.w" => "__builtin_msa_srar_w",
+                    "srari.b" => "__builtin_msa_srari_b",
+                    "srari.d" => "__builtin_msa_srari_d",
+                    "srari.h" => "__builtin_msa_srari_h",
+                    "srari.w" => "__builtin_msa_srari_w",
+                    "srl.b" => "__builtin_msa_srl_b",
+                    "srl.d" => "__builtin_msa_srl_d",
+                    "srl.h" => "__builtin_msa_srl_h",
+                    "srl.w" => "__builtin_msa_srl_w",
+                    "srli.b" => "__builtin_msa_srli_b",
+                    "srli.d" => "__builtin_msa_srli_d",
+                    "srli.h" => "__builtin_msa_srli_h",
+                    "srli.w" => "__builtin_msa_srli_w",
+                    "srlr.b" => "__builtin_msa_srlr_b",
+                    "srlr.d" => "__builtin_msa_srlr_d",
+                    "srlr.h" => "__builtin_msa_srlr_h",
+                    "srlr.w" => "__builtin_msa_srlr_w",
+                    "srlri.b" => "__builtin_msa_srlri_b",
+                    "srlri.d" => "__builtin_msa_srlri_d",
+                    "srlri.h" => "__builtin_msa_srlri_h",
+                    "srlri.w" => "__builtin_msa_srlri_w",
+                    "st.b" => "__builtin_msa_st_b",
+                    "st.d" => "__builtin_msa_st_d",
+                    "st.h" => "__builtin_msa_st_h",
+                    "st.w" => "__builtin_msa_st_w",
+                    "str.d" => "__builtin_msa_str_d",
+                    "str.w" => "__builtin_msa_str_w",
+                    "subq.ph" => "__builtin_mips_subq_ph",
+                    "subq.s.ph" => "__builtin_mips_subq_s_ph",
+                    "subq.s.w" => "__builtin_mips_subq_s_w",
+                    "subqh.ph" => "__builtin_mips_subqh_ph",
+                    "subqh.r.ph" => "__builtin_mips_subqh_r_ph",
+                    "subqh.r.w" => "__builtin_mips_subqh_r_w",
+                    "subqh.w" => "__builtin_mips_subqh_w",
+                    "subs.s.b" => "__builtin_msa_subs_s_b",
+                    "subs.s.d" => "__builtin_msa_subs_s_d",
+                    "subs.s.h" => "__builtin_msa_subs_s_h",
+                    "subs.s.w" => "__builtin_msa_subs_s_w",
+                    "subs.u.b" => "__builtin_msa_subs_u_b",
+                    "subs.u.d" => "__builtin_msa_subs_u_d",
+                    "subs.u.h" => "__builtin_msa_subs_u_h",
+                    "subs.u.w" => "__builtin_msa_subs_u_w",
+                    "subsus.u.b" => "__builtin_msa_subsus_u_b",
+                    "subsus.u.d" => "__builtin_msa_subsus_u_d",
+                    "subsus.u.h" => "__builtin_msa_subsus_u_h",
+                    "subsus.u.w" => "__builtin_msa_subsus_u_w",
+                    "subsuu.s.b" => "__builtin_msa_subsuu_s_b",
+                    "subsuu.s.d" => "__builtin_msa_subsuu_s_d",
+                    "subsuu.s.h" => "__builtin_msa_subsuu_s_h",
+                    "subsuu.s.w" => "__builtin_msa_subsuu_s_w",
+                    "subu.ph" => "__builtin_mips_subu_ph",
+                    "subu.qb" => "__builtin_mips_subu_qb",
+                    "subu.s.ph" => "__builtin_mips_subu_s_ph",
+                    "subu.s.qb" => "__builtin_mips_subu_s_qb",
+                    "subuh.qb" => "__builtin_mips_subuh_qb",
+                    "subuh.r.qb" => "__builtin_mips_subuh_r_qb",
+                    "subv.b" => "__builtin_msa_subv_b",
+                    "subv.d" => "__builtin_msa_subv_d",
+                    "subv.h" => "__builtin_msa_subv_h",
+                    "subv.w" => "__builtin_msa_subv_w",
+                    "subvi.b" => "__builtin_msa_subvi_b",
+                    "subvi.d" => "__builtin_msa_subvi_d",
+                    "subvi.h" => "__builtin_msa_subvi_h",
+                    "subvi.w" => "__builtin_msa_subvi_w",
+                    "vshf.b" => "__builtin_msa_vshf_b",
+                    "vshf.d" => "__builtin_msa_vshf_d",
+                    "vshf.h" => "__builtin_msa_vshf_h",
+                    "vshf.w" => "__builtin_msa_vshf_w",
+                    "wrdsp" => "__builtin_mips_wrdsp",
+                    "xor.v" => "__builtin_msa_xor_v",
+                    "xori.b" => "__builtin_msa_xori_b",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            mips(name)
+        }
+        "nvvm" => {
+            #[allow(non_snake_case)]
+            fn nvvm(name: &str) -> &str {
+                match name {
+                    // nvvm
+                    "abs.i" => "__nvvm_abs_i",
+                    "abs.ll" => "__nvvm_abs_ll",
+                    "activemask" => "__nvvm_activemask",
+                    "add.rm.d" => "__nvvm_add_rm_d",
+                    "add.rm.f" => "__nvvm_add_rm_f",
+                    "add.rm.ftz.f" => "__nvvm_add_rm_ftz_f",
+                    "add.rn.d" => "__nvvm_add_rn_d",
+                    "add.rn.f" => "__nvvm_add_rn_f",
+                    "add.rn.ftz.f" => "__nvvm_add_rn_ftz_f",
+                    "add.rp.d" => "__nvvm_add_rp_d",
+                    "add.rp.f" => "__nvvm_add_rp_f",
+                    "add.rp.ftz.f" => "__nvvm_add_rp_ftz_f",
+                    "add.rz.d" => "__nvvm_add_rz_d",
+                    "add.rz.f" => "__nvvm_add_rz_f",
+                    "add.rz.ftz.f" => "__nvvm_add_rz_ftz_f",
+                    "bar.sync" => "__nvvm_bar_sync",
+                    "bar.warp.sync" => "__nvvm_bar_warp_sync",
+                    "barrier0" => "__nvvm_bar0",
+                    // [DUPLICATE]: "barrier0" => "__syncthreads",
+                    "barrier0.and" => "__nvvm_bar0_and",
+                    "barrier0.or" => "__nvvm_bar0_or",
+                    "barrier0.popc" => "__nvvm_bar0_popc",
+                    "bf16x2.to.ue8m0x2.rp" => "__nvvm_bf16x2_to_ue8m0x2_rp",
+                    "bf16x2.to.ue8m0x2.rp.satfinite" => "__nvvm_bf16x2_to_ue8m0x2_rp_satfinite",
+                    "bf16x2.to.ue8m0x2.rz" => "__nvvm_bf16x2_to_ue8m0x2_rz",
+                    "bf16x2.to.ue8m0x2.rz.satfinite" => "__nvvm_bf16x2_to_ue8m0x2_rz_satfinite",
+                    "bf2h.rn" => "__nvvm_bf2h_rn",
+                    "bf2h.rn.ftz" => "__nvvm_bf2h_rn_ftz",
+                    "bitcast.d2ll" => "__nvvm_bitcast_d2ll",
+                    "bitcast.f2i" => "__nvvm_bitcast_f2i",
+                    "bitcast.i2f" => "__nvvm_bitcast_i2f",
+                    "bitcast.ll2d" => "__nvvm_bitcast_ll2d",
+                    "brev32" => "__nvvm_brev32",
+                    "brev64" => "__nvvm_brev64",
+                    "ceil.d" => "__nvvm_ceil_d",
+                    "ceil.f" => "__nvvm_ceil_f",
+                    "ceil.ftz.f" => "__nvvm_ceil_ftz_f",
+                    "clz.i" => "__nvvm_clz_i",
+                    "clz.ll" => "__nvvm_clz_ll",
+                    "cos.approx.f" => "__nvvm_cos_approx_f",
+                    "cos.approx.ftz.f" => "__nvvm_cos_approx_ftz_f",
+                    "cp.async.commit.group" => "__nvvm_cp_async_commit_group",
+                    "cp.async.mbarrier.arrive" => "__nvvm_cp_async_mbarrier_arrive",
+                    "cp.async.mbarrier.arrive.noinc" => "__nvvm_cp_async_mbarrier_arrive_noinc",
+                    "cp.async.mbarrier.arrive.noinc.shared" => {
+                        "__nvvm_cp_async_mbarrier_arrive_noinc_shared"
+                    }
+                    "cp.async.mbarrier.arrive.shared" => "__nvvm_cp_async_mbarrier_arrive_shared",
+                    "cp.async.wait.all" => "__nvvm_cp_async_wait_all",
+                    "cp.async.wait.group" => "__nvvm_cp_async_wait_group",
+                    "d2f.rm" => "__nvvm_d2f_rm",
+                    "d2f.rm.ftz" => "__nvvm_d2f_rm_ftz",
+                    "d2f.rn" => "__nvvm_d2f_rn",
+                    "d2f.rn.ftz" => "__nvvm_d2f_rn_ftz",
+                    "d2f.rp" => "__nvvm_d2f_rp",
+                    "d2f.rp.ftz" => "__nvvm_d2f_rp_ftz",
+                    "d2f.rz" => "__nvvm_d2f_rz",
+                    "d2f.rz.ftz" => "__nvvm_d2f_rz_ftz",
+                    "d2i.hi" => "__nvvm_d2i_hi",
+                    "d2i.lo" => "__nvvm_d2i_lo",
+                    "d2i.rm" => "__nvvm_d2i_rm",
+                    "d2i.rn" => "__nvvm_d2i_rn",
+                    "d2i.rp" => "__nvvm_d2i_rp",
+                    "d2i.rz" => "__nvvm_d2i_rz",
+                    "d2ll.rm" => "__nvvm_d2ll_rm",
+                    "d2ll.rn" => "__nvvm_d2ll_rn",
+                    "d2ll.rp" => "__nvvm_d2ll_rp",
+                    "d2ll.rz" => "__nvvm_d2ll_rz",
+                    "d2ui.rm" => "__nvvm_d2ui_rm",
+                    "d2ui.rn" => "__nvvm_d2ui_rn",
+                    "d2ui.rp" => "__nvvm_d2ui_rp",
+                    "d2ui.rz" => "__nvvm_d2ui_rz",
+                    "d2ull.rm" => "__nvvm_d2ull_rm",
+                    "d2ull.rn" => "__nvvm_d2ull_rn",
+                    "d2ull.rp" => "__nvvm_d2ull_rp",
+                    "d2ull.rz" => "__nvvm_d2ull_rz",
+                    "div.approx.f" => "__nvvm_div_approx_f",
+                    "div.approx.ftz.f" => "__nvvm_div_approx_ftz_f",
+                    "div.full" => "__nvvm_div_full",
+                    "div.full.ftz" => "__nvvm_div_full_ftz",
+                    "div.rm.d" => "__nvvm_div_rm_d",
+                    "div.rm.f" => "__nvvm_div_rm_f",
+                    "div.rm.ftz.f" => "__nvvm_div_rm_ftz_f",
+                    "div.rn.d" => "__nvvm_div_rn_d",
+                    "div.rn.f" => "__nvvm_div_rn_f",
+                    "div.rn.ftz.f" => "__nvvm_div_rn_ftz_f",
+                    "div.rp.d" => "__nvvm_div_rp_d",
+                    "div.rp.f" => "__nvvm_div_rp_f",
+                    "div.rp.ftz.f" => "__nvvm_div_rp_ftz_f",
+                    "div.rz.d" => "__nvvm_div_rz_d",
+                    "div.rz.f" => "__nvvm_div_rz_f",
+                    "div.rz.ftz.f" => "__nvvm_div_rz_ftz_f",
+                    "e2m1x2.to.f16x2.rn" => "__nvvm_e2m1x2_to_f16x2_rn",
+                    "e2m1x2.to.f16x2.rn.relu" => "__nvvm_e2m1x2_to_f16x2_rn_relu",
+                    "e2m3x2.to.f16x2.rn" => "__nvvm_e2m3x2_to_f16x2_rn",
+                    "e2m3x2.to.f16x2.rn.relu" => "__nvvm_e2m3x2_to_f16x2_rn_relu",
+                    "e3m2x2.to.f16x2.rn" => "__nvvm_e3m2x2_to_f16x2_rn",
+                    "e3m2x2.to.f16x2.rn.relu" => "__nvvm_e3m2x2_to_f16x2_rn_relu",
+                    "e4m3x2.to.f16x2.rn" => "__nvvm_e4m3x2_to_f16x2_rn",
+                    "e4m3x2.to.f16x2.rn.relu" => "__nvvm_e4m3x2_to_f16x2_rn_relu",
+                    "e5m2x2.to.f16x2.rn" => "__nvvm_e5m2x2_to_f16x2_rn",
+                    "e5m2x2.to.f16x2.rn.relu" => "__nvvm_e5m2x2_to_f16x2_rn_relu",
+                    "ex2.approx.d" => "__nvvm_ex2_approx_d",
+                    "ex2.approx.f" => "__nvvm_ex2_approx_f",
+                    "ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f",
+                    "exit" => "__nvvm_exit",
+                    "f16x2.to.e4m3x2.rn" => "__nvvm_f16x2_to_e4m3x2_rn",
+                    "f16x2.to.e4m3x2.rn.relu" => "__nvvm_f16x2_to_e4m3x2_rn_relu",
+                    "f16x2.to.e5m2x2.rn" => "__nvvm_f16x2_to_e5m2x2_rn",
+                    "f16x2.to.e5m2x2.rn.relu" => "__nvvm_f16x2_to_e5m2x2_rn_relu",
+                    "f2bf16.rn" => "__nvvm_f2bf16_rn",
+                    "f2bf16.rn.relu" => "__nvvm_f2bf16_rn_relu",
+                    "f2bf16.rz" => "__nvvm_f2bf16_rz",
+                    "f2bf16.rz.relu" => "__nvvm_f2bf16_rz_relu",
+                    "f2h.rn" => "__nvvm_f2h_rn",
+                    "f2h.rn.ftz" => "__nvvm_f2h_rn_ftz",
+                    "f2i.rm" => "__nvvm_f2i_rm",
+                    "f2i.rm.ftz" => "__nvvm_f2i_rm_ftz",
+                    "f2i.rn" => "__nvvm_f2i_rn",
+                    "f2i.rn.ftz" => "__nvvm_f2i_rn_ftz",
+                    "f2i.rp" => "__nvvm_f2i_rp",
+                    "f2i.rp.ftz" => "__nvvm_f2i_rp_ftz",
+                    "f2i.rz" => "__nvvm_f2i_rz",
+                    "f2i.rz.ftz" => "__nvvm_f2i_rz_ftz",
+                    "f2ll.rm" => "__nvvm_f2ll_rm",
+                    "f2ll.rm.ftz" => "__nvvm_f2ll_rm_ftz",
+                    "f2ll.rn" => "__nvvm_f2ll_rn",
+                    "f2ll.rn.ftz" => "__nvvm_f2ll_rn_ftz",
+                    "f2ll.rp" => "__nvvm_f2ll_rp",
+                    "f2ll.rp.ftz" => "__nvvm_f2ll_rp_ftz",
+                    "f2ll.rz" => "__nvvm_f2ll_rz",
+                    "f2ll.rz.ftz" => "__nvvm_f2ll_rz_ftz",
+                    "f2tf32.rn" => "__nvvm_f2tf32_rn",
+                    "f2tf32.rn.relu" => "__nvvm_f2tf32_rn_relu",
+                    "f2tf32.rn.relu.satfinite" => "__nvvm_f2tf32_rn_relu_satfinite",
+                    "f2tf32.rn.satfinite" => "__nvvm_f2tf32_rn_satfinite",
+                    "f2tf32.rna" => "__nvvm_f2tf32_rna",
+                    "f2tf32.rna.satfinite" => "__nvvm_f2tf32_rna_satfinite",
+                    "f2tf32.rz" => "__nvvm_f2tf32_rz",
+                    "f2tf32.rz.relu" => "__nvvm_f2tf32_rz_relu",
+                    "f2tf32.rz.relu.satfinite" => "__nvvm_f2tf32_rz_relu_satfinite",
+                    "f2tf32.rz.satfinite" => "__nvvm_f2tf32_rz_satfinite",
+                    "f2ui.rm" => "__nvvm_f2ui_rm",
+                    "f2ui.rm.ftz" => "__nvvm_f2ui_rm_ftz",
+                    "f2ui.rn" => "__nvvm_f2ui_rn",
+                    "f2ui.rn.ftz" => "__nvvm_f2ui_rn_ftz",
+                    "f2ui.rp" => "__nvvm_f2ui_rp",
+                    "f2ui.rp.ftz" => "__nvvm_f2ui_rp_ftz",
+                    "f2ui.rz" => "__nvvm_f2ui_rz",
+                    "f2ui.rz.ftz" => "__nvvm_f2ui_rz_ftz",
+                    "f2ull.rm" => "__nvvm_f2ull_rm",
+                    "f2ull.rm.ftz" => "__nvvm_f2ull_rm_ftz",
+                    "f2ull.rn" => "__nvvm_f2ull_rn",
+                    "f2ull.rn.ftz" => "__nvvm_f2ull_rn_ftz",
+                    "f2ull.rp" => "__nvvm_f2ull_rp",
+                    "f2ull.rp.ftz" => "__nvvm_f2ull_rp_ftz",
+                    "f2ull.rz" => "__nvvm_f2ull_rz",
+                    "f2ull.rz.ftz" => "__nvvm_f2ull_rz_ftz",
+                    "fabs.d" => "__nvvm_fabs_d",
+                    "fabs.f" => "__nvvm_fabs_f",
+                    "fabs.ftz.f" => "__nvvm_fabs_ftz_f",
+                    "ff.to.e2m1x2.rn.relu.satfinite" => "__nvvm_ff_to_e2m1x2_rn_relu_satfinite",
+                    "ff.to.e2m1x2.rn.satfinite" => "__nvvm_ff_to_e2m1x2_rn_satfinite",
+                    "ff.to.e2m3x2.rn.relu.satfinite" => "__nvvm_ff_to_e2m3x2_rn_relu_satfinite",
+                    "ff.to.e2m3x2.rn.satfinite" => "__nvvm_ff_to_e2m3x2_rn_satfinite",
+                    "ff.to.e3m2x2.rn.relu.satfinite" => "__nvvm_ff_to_e3m2x2_rn_relu_satfinite",
+                    "ff.to.e3m2x2.rn.satfinite" => "__nvvm_ff_to_e3m2x2_rn_satfinite",
+                    "ff.to.e4m3x2.rn" => "__nvvm_ff_to_e4m3x2_rn",
+                    "ff.to.e4m3x2.rn.relu" => "__nvvm_ff_to_e4m3x2_rn_relu",
+                    "ff.to.e5m2x2.rn" => "__nvvm_ff_to_e5m2x2_rn",
+                    "ff.to.e5m2x2.rn.relu" => "__nvvm_ff_to_e5m2x2_rn_relu",
+                    "ff.to.ue8m0x2.rp" => "__nvvm_ff_to_ue8m0x2_rp",
+                    "ff.to.ue8m0x2.rp.satfinite" => "__nvvm_ff_to_ue8m0x2_rp_satfinite",
+                    "ff.to.ue8m0x2.rz" => "__nvvm_ff_to_ue8m0x2_rz",
+                    "ff.to.ue8m0x2.rz.satfinite" => "__nvvm_ff_to_ue8m0x2_rz_satfinite",
+                    "ff2bf16x2.rn" => "__nvvm_ff2bf16x2_rn",
+                    "ff2bf16x2.rn.relu" => "__nvvm_ff2bf16x2_rn_relu",
+                    "ff2bf16x2.rz" => "__nvvm_ff2bf16x2_rz",
+                    "ff2bf16x2.rz.relu" => "__nvvm_ff2bf16x2_rz_relu",
+                    "ff2f16x2.rn" => "__nvvm_ff2f16x2_rn",
+                    "ff2f16x2.rn.relu" => "__nvvm_ff2f16x2_rn_relu",
+                    "ff2f16x2.rz" => "__nvvm_ff2f16x2_rz",
+                    "ff2f16x2.rz.relu" => "__nvvm_ff2f16x2_rz_relu",
+                    "floor.d" => "__nvvm_floor_d",
+                    "floor.f" => "__nvvm_floor_f",
+                    "floor.ftz.f" => "__nvvm_floor_ftz_f",
+                    "fma.rm.d" => "__nvvm_fma_rm_d",
+                    "fma.rm.f" => "__nvvm_fma_rm_f",
+                    "fma.rm.ftz.f" => "__nvvm_fma_rm_ftz_f",
+                    "fma.rn.bf16" => "__nvvm_fma_rn_bf16",
+                    "fma.rn.bf16x2" => "__nvvm_fma_rn_bf16x2",
+                    "fma.rn.d" => "__nvvm_fma_rn_d",
+                    "fma.rn.f" => "__nvvm_fma_rn_f",
+                    "fma.rn.ftz.bf16" => "__nvvm_fma_rn_ftz_bf16",
+                    "fma.rn.ftz.bf16x2" => "__nvvm_fma_rn_ftz_bf16x2",
+                    "fma.rn.ftz.f" => "__nvvm_fma_rn_ftz_f",
+                    "fma.rn.ftz.relu.bf16" => "__nvvm_fma_rn_ftz_relu_bf16",
+                    "fma.rn.ftz.relu.bf16x2" => "__nvvm_fma_rn_ftz_relu_bf16x2",
+                    "fma.rn.ftz.sat.bf16" => "__nvvm_fma_rn_ftz_sat_bf16",
+                    "fma.rn.ftz.sat.bf16x2" => "__nvvm_fma_rn_ftz_sat_bf16x2",
+                    "fma.rn.relu.bf16" => "__nvvm_fma_rn_relu_bf16",
+                    "fma.rn.relu.bf16x2" => "__nvvm_fma_rn_relu_bf16x2",
+                    "fma.rn.sat.bf16" => "__nvvm_fma_rn_sat_bf16",
+                    "fma.rn.sat.bf16x2" => "__nvvm_fma_rn_sat_bf16x2",
+                    "fma.rp.d" => "__nvvm_fma_rp_d",
+                    "fma.rp.f" => "__nvvm_fma_rp_f",
+                    "fma.rp.ftz.f" => "__nvvm_fma_rp_ftz_f",
+                    "fma.rz.d" => "__nvvm_fma_rz_d",
+                    "fma.rz.f" => "__nvvm_fma_rz_f",
+                    "fma.rz.ftz.f" => "__nvvm_fma_rz_ftz_f",
+                    "fmax.bf16" => "__nvvm_fmax_bf16",
+                    "fmax.bf16x2" => "__nvvm_fmax_bf16x2",
+                    "fmax.d" => "__nvvm_fmax_d",
+                    "fmax.f" => "__nvvm_fmax_f",
+                    "fmax.ftz.bf16" => "__nvvm_fmax_ftz_bf16",
+                    "fmax.ftz.bf16x2" => "__nvvm_fmax_ftz_bf16x2",
+                    "fmax.ftz.f" => "__nvvm_fmax_ftz_f",
+                    "fmax.ftz.nan.bf16" => "__nvvm_fmax_ftz_nan_bf16",
+                    "fmax.ftz.nan.bf16x2" => "__nvvm_fmax_ftz_nan_bf16x2",
+                    "fmax.ftz.nan.f" => "__nvvm_fmax_ftz_nan_f",
+                    "fmax.ftz.nan.xorsign.abs.bf16" => "__nvvm_fmax_ftz_nan_xorsign_abs_bf16",
+                    "fmax.ftz.nan.xorsign.abs.bf16x2" => "__nvvm_fmax_ftz_nan_xorsign_abs_bf16x2",
+                    "fmax.ftz.nan.xorsign.abs.f" => "__nvvm_fmax_ftz_nan_xorsign_abs_f",
+                    "fmax.ftz.xorsign.abs.bf16" => "__nvvm_fmax_ftz_xorsign_abs_bf16",
+                    "fmax.ftz.xorsign.abs.bf16x2" => "__nvvm_fmax_ftz_xorsign_abs_bf16x2",
+                    "fmax.ftz.xorsign.abs.f" => "__nvvm_fmax_ftz_xorsign_abs_f",
+                    "fmax.nan.bf16" => "__nvvm_fmax_nan_bf16",
+                    "fmax.nan.bf16x2" => "__nvvm_fmax_nan_bf16x2",
+                    "fmax.nan.f" => "__nvvm_fmax_nan_f",
+                    "fmax.nan.xorsign.abs.bf16" => "__nvvm_fmax_nan_xorsign_abs_bf16",
+                    "fmax.nan.xorsign.abs.bf16x2" => "__nvvm_fmax_nan_xorsign_abs_bf16x2",
+                    "fmax.nan.xorsign.abs.f" => "__nvvm_fmax_nan_xorsign_abs_f",
+                    "fmax.xorsign.abs.bf16" => "__nvvm_fmax_xorsign_abs_bf16",
+                    "fmax.xorsign.abs.bf16x2" => "__nvvm_fmax_xorsign_abs_bf16x2",
+                    "fmax.xorsign.abs.f" => "__nvvm_fmax_xorsign_abs_f",
+                    "fmin.bf16" => "__nvvm_fmin_bf16",
+                    "fmin.bf16x2" => "__nvvm_fmin_bf16x2",
+                    "fmin.d" => "__nvvm_fmin_d",
+                    "fmin.f" => "__nvvm_fmin_f",
+                    "fmin.ftz.bf16" => "__nvvm_fmin_ftz_bf16",
+                    "fmin.ftz.bf16x2" => "__nvvm_fmin_ftz_bf16x2",
+                    "fmin.ftz.f" => "__nvvm_fmin_ftz_f",
+                    "fmin.ftz.nan.bf16" => "__nvvm_fmin_ftz_nan_bf16",
+                    "fmin.ftz.nan.bf16x2" => "__nvvm_fmin_ftz_nan_bf16x2",
+                    "fmin.ftz.nan.f" => "__nvvm_fmin_ftz_nan_f",
+                    "fmin.ftz.nan.xorsign.abs.bf16" => "__nvvm_fmin_ftz_nan_xorsign_abs_bf16",
+                    "fmin.ftz.nan.xorsign.abs.bf16x2" => "__nvvm_fmin_ftz_nan_xorsign_abs_bf16x2",
+                    "fmin.ftz.nan.xorsign.abs.f" => "__nvvm_fmin_ftz_nan_xorsign_abs_f",
+                    "fmin.ftz.xorsign.abs.bf16" => "__nvvm_fmin_ftz_xorsign_abs_bf16",
+                    "fmin.ftz.xorsign.abs.bf16x2" => "__nvvm_fmin_ftz_xorsign_abs_bf16x2",
+                    "fmin.ftz.xorsign.abs.f" => "__nvvm_fmin_ftz_xorsign_abs_f",
+                    "fmin.nan.bf16" => "__nvvm_fmin_nan_bf16",
+                    "fmin.nan.bf16x2" => "__nvvm_fmin_nan_bf16x2",
+                    "fmin.nan.f" => "__nvvm_fmin_nan_f",
+                    "fmin.nan.xorsign.abs.bf16" => "__nvvm_fmin_nan_xorsign_abs_bf16",
+                    "fmin.nan.xorsign.abs.bf16x2" => "__nvvm_fmin_nan_xorsign_abs_bf16x2",
+                    "fmin.nan.xorsign.abs.f" => "__nvvm_fmin_nan_xorsign_abs_f",
+                    "fmin.xorsign.abs.bf16" => "__nvvm_fmin_xorsign_abs_bf16",
+                    "fmin.xorsign.abs.bf16x2" => "__nvvm_fmin_xorsign_abs_bf16x2",
+                    "fmin.xorsign.abs.f" => "__nvvm_fmin_xorsign_abs_f",
+                    "fns" => "__nvvm_fns",
+                    "h2f" => "__nvvm_h2f",
+                    "i2d.rm" => "__nvvm_i2d_rm",
+                    "i2d.rn" => "__nvvm_i2d_rn",
+                    "i2d.rp" => "__nvvm_i2d_rp",
+                    "i2d.rz" => "__nvvm_i2d_rz",
+                    "i2f.rm" => "__nvvm_i2f_rm",
+                    "i2f.rn" => "__nvvm_i2f_rn",
+                    "i2f.rp" => "__nvvm_i2f_rp",
+                    "i2f.rz" => "__nvvm_i2f_rz",
+                    "isspacep.const" => "__nvvm_isspacep_const",
+                    "isspacep.global" => "__nvvm_isspacep_global",
+                    "isspacep.local" => "__nvvm_isspacep_local",
+                    "isspacep.shared" => "__nvvm_isspacep_shared",
+                    "isspacep.shared.cluster" => "__nvvm_isspacep_shared_cluster",
+                    "istypep.sampler" => "__nvvm_istypep_sampler",
+                    "istypep.surface" => "__nvvm_istypep_surface",
+                    "istypep.texture" => "__nvvm_istypep_texture",
+                    "lg2.approx.d" => "__nvvm_lg2_approx_d",
+                    "lg2.approx.f" => "__nvvm_lg2_approx_f",
+                    "lg2.approx.ftz.f" => "__nvvm_lg2_approx_ftz_f",
+                    "ll2d.rm" => "__nvvm_ll2d_rm",
+                    "ll2d.rn" => "__nvvm_ll2d_rn",
+                    "ll2d.rp" => "__nvvm_ll2d_rp",
+                    "ll2d.rz" => "__nvvm_ll2d_rz",
+                    "ll2f.rm" => "__nvvm_ll2f_rm",
+                    "ll2f.rn" => "__nvvm_ll2f_rn",
+                    "ll2f.rp" => "__nvvm_ll2f_rp",
+                    "ll2f.rz" => "__nvvm_ll2f_rz",
+                    "lohi.i2d" => "__nvvm_lohi_i2d",
+                    "match.any.sync.i32" => "__nvvm_match_any_sync_i32",
+                    "match.any.sync.i64" => "__nvvm_match_any_sync_i64",
+                    "max.i" => "__nvvm_max_i",
+                    "max.ll" => "__nvvm_max_ll",
+                    "max.ui" => "__nvvm_max_ui",
+                    "max.ull" => "__nvvm_max_ull",
+                    "mbarrier.arrive" => "__nvvm_mbarrier_arrive",
+                    "mbarrier.arrive.drop" => "__nvvm_mbarrier_arrive_drop",
+                    "mbarrier.arrive.drop.noComplete" => "__nvvm_mbarrier_arrive_drop_noComplete",
+                    "mbarrier.arrive.drop.noComplete.shared" => {
+                        "__nvvm_mbarrier_arrive_drop_noComplete_shared"
+                    }
+                    "mbarrier.arrive.drop.shared" => "__nvvm_mbarrier_arrive_drop_shared",
+                    "mbarrier.arrive.noComplete" => "__nvvm_mbarrier_arrive_noComplete",
+                    "mbarrier.arrive.noComplete.shared" => {
+                        "__nvvm_mbarrier_arrive_noComplete_shared"
+                    }
+                    "mbarrier.arrive.shared" => "__nvvm_mbarrier_arrive_shared",
+                    "mbarrier.init" => "__nvvm_mbarrier_init",
+                    "mbarrier.init.shared" => "__nvvm_mbarrier_init_shared",
+                    "mbarrier.inval" => "__nvvm_mbarrier_inval",
+                    "mbarrier.inval.shared" => "__nvvm_mbarrier_inval_shared",
+                    "mbarrier.pending.count" => "__nvvm_mbarrier_pending_count",
+                    "mbarrier.test.wait" => "__nvvm_mbarrier_test_wait",
+                    "mbarrier.test.wait.shared" => "__nvvm_mbarrier_test_wait_shared",
+                    "membar.cta" => "__nvvm_membar_cta",
+                    "membar.gl" => "__nvvm_membar_gl",
+                    "membar.sys" => "__nvvm_membar_sys",
+                    "min.i" => "__nvvm_min_i",
+                    "min.ll" => "__nvvm_min_ll",
+                    "min.ui" => "__nvvm_min_ui",
+                    "min.ull" => "__nvvm_min_ull",
+                    "mul.rm.d" => "__nvvm_mul_rm_d",
+                    "mul.rm.f" => "__nvvm_mul_rm_f",
+                    "mul.rm.ftz.f" => "__nvvm_mul_rm_ftz_f",
+                    "mul.rn.d" => "__nvvm_mul_rn_d",
+                    "mul.rn.f" => "__nvvm_mul_rn_f",
+                    "mul.rn.ftz.f" => "__nvvm_mul_rn_ftz_f",
+                    "mul.rp.d" => "__nvvm_mul_rp_d",
+                    "mul.rp.f" => "__nvvm_mul_rp_f",
+                    "mul.rp.ftz.f" => "__nvvm_mul_rp_ftz_f",
+                    "mul.rz.d" => "__nvvm_mul_rz_d",
+                    "mul.rz.f" => "__nvvm_mul_rz_f",
+                    "mul.rz.ftz.f" => "__nvvm_mul_rz_ftz_f",
+                    "mul24.i" => "__nvvm_mul24_i",
+                    "mul24.ui" => "__nvvm_mul24_ui",
+                    "mulhi.i" => "__nvvm_mulhi_i",
+                    "mulhi.ll" => "__nvvm_mulhi_ll",
+                    "mulhi.s" => "__nvvm_mulhi_s",
+                    "mulhi.ui" => "__nvvm_mulhi_ui",
+                    "mulhi.ull" => "__nvvm_mulhi_ull",
+                    "mulhi.us" => "__nvvm_mulhi_us",
+                    "nanosleep" => "__nvvm_nanosleep",
+                    "neg.bf16" => "__nvvm_neg_bf16",
+                    "neg.bf16x2" => "__nvvm_neg_bf16x2",
+                    "popc.i" => "__nvvm_popc_i",
+                    "popc.ll" => "__nvvm_popc_ll",
+                    "prmt" => "__nvvm_prmt",
+                    "rcp.approx.ftz.d" => "__nvvm_rcp_approx_ftz_d",
+                    "rcp.approx.ftz.f" => "__nvvm_rcp_approx_ftz_f",
+                    "rcp.rm.d" => "__nvvm_rcp_rm_d",
+                    "rcp.rm.f" => "__nvvm_rcp_rm_f",
+                    "rcp.rm.ftz.f" => "__nvvm_rcp_rm_ftz_f",
+                    "rcp.rn.d" => "__nvvm_rcp_rn_d",
+                    "rcp.rn.f" => "__nvvm_rcp_rn_f",
+                    "rcp.rn.ftz.f" => "__nvvm_rcp_rn_ftz_f",
+                    "rcp.rp.d" => "__nvvm_rcp_rp_d",
+                    "rcp.rp.f" => "__nvvm_rcp_rp_f",
+                    "rcp.rp.ftz.f" => "__nvvm_rcp_rp_ftz_f",
+                    "rcp.rz.d" => "__nvvm_rcp_rz_d",
+                    "rcp.rz.f" => "__nvvm_rcp_rz_f",
+                    "rcp.rz.ftz.f" => "__nvvm_rcp_rz_ftz_f",
+                    "read.ptx.sreg.clock" => "__nvvm_read_ptx_sreg_clock",
+                    // [DUPLICATE]: "read.ptx.sreg.clock" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.clock64" => "__nvvm_read_ptx_sreg_clock64",
+                    // [DUPLICATE]: "read.ptx.sreg.clock64" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.ctaid.w" => "__nvvm_read_ptx_sreg_ctaid_w",
+                    "read.ptx.sreg.ctaid.x" => "__nvvm_read_ptx_sreg_ctaid_x",
+                    "read.ptx.sreg.ctaid.y" => "__nvvm_read_ptx_sreg_ctaid_y",
+                    "read.ptx.sreg.ctaid.z" => "__nvvm_read_ptx_sreg_ctaid_z",
+                    "read.ptx.sreg.envreg0" => "__nvvm_read_ptx_sreg_envreg0",
+                    "read.ptx.sreg.envreg1" => "__nvvm_read_ptx_sreg_envreg1",
+                    "read.ptx.sreg.envreg10" => "__nvvm_read_ptx_sreg_envreg10",
+                    "read.ptx.sreg.envreg11" => "__nvvm_read_ptx_sreg_envreg11",
+                    "read.ptx.sreg.envreg12" => "__nvvm_read_ptx_sreg_envreg12",
+                    "read.ptx.sreg.envreg13" => "__nvvm_read_ptx_sreg_envreg13",
+                    "read.ptx.sreg.envreg14" => "__nvvm_read_ptx_sreg_envreg14",
+                    "read.ptx.sreg.envreg15" => "__nvvm_read_ptx_sreg_envreg15",
+                    "read.ptx.sreg.envreg16" => "__nvvm_read_ptx_sreg_envreg16",
+                    "read.ptx.sreg.envreg17" => "__nvvm_read_ptx_sreg_envreg17",
+                    "read.ptx.sreg.envreg18" => "__nvvm_read_ptx_sreg_envreg18",
+                    "read.ptx.sreg.envreg19" => "__nvvm_read_ptx_sreg_envreg19",
+                    "read.ptx.sreg.envreg2" => "__nvvm_read_ptx_sreg_envreg2",
+                    "read.ptx.sreg.envreg20" => "__nvvm_read_ptx_sreg_envreg20",
+                    "read.ptx.sreg.envreg21" => "__nvvm_read_ptx_sreg_envreg21",
+                    "read.ptx.sreg.envreg22" => "__nvvm_read_ptx_sreg_envreg22",
+                    "read.ptx.sreg.envreg23" => "__nvvm_read_ptx_sreg_envreg23",
+                    "read.ptx.sreg.envreg24" => "__nvvm_read_ptx_sreg_envreg24",
+                    "read.ptx.sreg.envreg25" => "__nvvm_read_ptx_sreg_envreg25",
+                    "read.ptx.sreg.envreg26" => "__nvvm_read_ptx_sreg_envreg26",
+                    "read.ptx.sreg.envreg27" => "__nvvm_read_ptx_sreg_envreg27",
+                    "read.ptx.sreg.envreg28" => "__nvvm_read_ptx_sreg_envreg28",
+                    "read.ptx.sreg.envreg29" => "__nvvm_read_ptx_sreg_envreg29",
+                    "read.ptx.sreg.envreg3" => "__nvvm_read_ptx_sreg_envreg3",
+                    "read.ptx.sreg.envreg30" => "__nvvm_read_ptx_sreg_envreg30",
+                    "read.ptx.sreg.envreg31" => "__nvvm_read_ptx_sreg_envreg31",
+                    "read.ptx.sreg.envreg4" => "__nvvm_read_ptx_sreg_envreg4",
+                    "read.ptx.sreg.envreg5" => "__nvvm_read_ptx_sreg_envreg5",
+                    "read.ptx.sreg.envreg6" => "__nvvm_read_ptx_sreg_envreg6",
+                    "read.ptx.sreg.envreg7" => "__nvvm_read_ptx_sreg_envreg7",
+                    "read.ptx.sreg.envreg8" => "__nvvm_read_ptx_sreg_envreg8",
+                    "read.ptx.sreg.envreg9" => "__nvvm_read_ptx_sreg_envreg9",
+                    "read.ptx.sreg.globaltimer" => "__nvvm_read_ptx_sreg_globaltimer",
+                    "read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_gridid",
+                    // [DUPLICATE]: "read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_laneid",
+                    // [DUPLICATE]: "read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.lanemask.eq" => "__nvvm_read_ptx_sreg_lanemask_eq",
+                    // [DUPLICATE]: "read.ptx.sreg.lanemask.eq" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.lanemask.ge" => "__nvvm_read_ptx_sreg_lanemask_ge",
+                    // [DUPLICATE]: "read.ptx.sreg.lanemask.ge" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.lanemask.gt" => "__nvvm_read_ptx_sreg_lanemask_gt",
+                    // [DUPLICATE]: "read.ptx.sreg.lanemask.gt" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.lanemask.le" => "__nvvm_read_ptx_sreg_lanemask_le",
+                    // [DUPLICATE]: "read.ptx.sreg.lanemask.le" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.lanemask.lt" => "__nvvm_read_ptx_sreg_lanemask_lt",
+                    // [DUPLICATE]: "read.ptx.sreg.lanemask.lt" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.nctaid.w" => "__nvvm_read_ptx_sreg_nctaid_w",
+                    "read.ptx.sreg.nctaid.x" => "__nvvm_read_ptx_sreg_nctaid_x",
+                    "read.ptx.sreg.nctaid.y" => "__nvvm_read_ptx_sreg_nctaid_y",
+                    "read.ptx.sreg.nctaid.z" => "__nvvm_read_ptx_sreg_nctaid_z",
+                    "read.ptx.sreg.nsmid" => "__nvvm_read_ptx_sreg_nsmid",
+                    // [DUPLICATE]: "read.ptx.sreg.nsmid" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.ntid.w" => "__nvvm_read_ptx_sreg_ntid_w",
+                    "read.ptx.sreg.ntid.x" => "__nvvm_read_ptx_sreg_ntid_x",
+                    "read.ptx.sreg.ntid.y" => "__nvvm_read_ptx_sreg_ntid_y",
+                    "read.ptx.sreg.ntid.z" => "__nvvm_read_ptx_sreg_ntid_z",
+                    "read.ptx.sreg.nwarpid" => "__nvvm_read_ptx_sreg_nwarpid",
+                    // [DUPLICATE]: "read.ptx.sreg.nwarpid" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.pm0" => "__nvvm_read_ptx_sreg_pm0",
+                    // [DUPLICATE]: "read.ptx.sreg.pm0" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.pm1" => "__nvvm_read_ptx_sreg_pm1",
+                    // [DUPLICATE]: "read.ptx.sreg.pm1" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.pm2" => "__nvvm_read_ptx_sreg_pm2",
+                    // [DUPLICATE]: "read.ptx.sreg.pm2" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.pm3" => "__nvvm_read_ptx_sreg_pm3",
+                    // [DUPLICATE]: "read.ptx.sreg.pm3" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.smid" => "__nvvm_read_ptx_sreg_smid",
+                    // [DUPLICATE]: "read.ptx.sreg.smid" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.tid.w" => "__nvvm_read_ptx_sreg_tid_w",
+                    "read.ptx.sreg.tid.x" => "__nvvm_read_ptx_sreg_tid_x",
+                    "read.ptx.sreg.tid.y" => "__nvvm_read_ptx_sreg_tid_y",
+                    "read.ptx.sreg.tid.z" => "__nvvm_read_ptx_sreg_tid_z",
+                    "read.ptx.sreg.warpid" => "__nvvm_read_ptx_sreg_warpid",
+                    // [DUPLICATE]: "read.ptx.sreg.warpid" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_warpsize",
+                    // [DUPLICATE]: "read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_",
+                    "redux.sync.add" => "__nvvm_redux_sync_add",
+                    "redux.sync.and" => "__nvvm_redux_sync_and",
+                    "redux.sync.fmax" => "__nvvm_redux_sync_fmax",
+                    "redux.sync.fmax.NaN" => "__nvvm_redux_sync_fmax_NaN",
+                    "redux.sync.fmax.abs" => "__nvvm_redux_sync_fmax_abs",
+                    "redux.sync.fmax.abs.NaN" => "__nvvm_redux_sync_fmax_abs_NaN",
+                    "redux.sync.fmin" => "__nvvm_redux_sync_fmin",
+                    "redux.sync.fmin.NaN" => "__nvvm_redux_sync_fmin_NaN",
+                    "redux.sync.fmin.abs" => "__nvvm_redux_sync_fmin_abs",
+                    "redux.sync.fmin.abs.NaN" => "__nvvm_redux_sync_fmin_abs_NaN",
+                    "redux.sync.max" => "__nvvm_redux_sync_max",
+                    "redux.sync.min" => "__nvvm_redux_sync_min",
+                    "redux.sync.or" => "__nvvm_redux_sync_or",
+                    "redux.sync.umax" => "__nvvm_redux_sync_umax",
+                    "redux.sync.umin" => "__nvvm_redux_sync_umin",
+                    "redux.sync.xor" => "__nvvm_redux_sync_xor",
+                    "reflect" => "__nvvm_reflect",
+                    "rotate.b32" => "__nvvm_rotate_b32",
+                    "rotate.b64" => "__nvvm_rotate_b64",
+                    "rotate.right.b64" => "__nvvm_rotate_right_b64",
+                    "round.d" => "__nvvm_round_d",
+                    "round.f" => "__nvvm_round_f",
+                    "round.ftz.f" => "__nvvm_round_ftz_f",
+                    "rsqrt.approx.d" => "__nvvm_rsqrt_approx_d",
+                    "rsqrt.approx.f" => "__nvvm_rsqrt_approx_f",
+                    "rsqrt.approx.ftz.d" => "__nvvm_rsqrt_approx_ftz_d",
+                    "rsqrt.approx.ftz.f" => "__nvvm_rsqrt_approx_ftz_f",
+                    "sad.i" => "__nvvm_sad_i",
+                    "sad.ll" => "__nvvm_sad_ll",
+                    "sad.s" => "__nvvm_sad_s",
+                    "sad.ui" => "__nvvm_sad_ui",
+                    "sad.ull" => "__nvvm_sad_ull",
+                    "sad.us" => "__nvvm_sad_us",
+                    "saturate.d" => "__nvvm_saturate_d",
+                    "saturate.f" => "__nvvm_saturate_f",
+                    "saturate.ftz.f" => "__nvvm_saturate_ftz_f",
+                    "shfl.bfly.f32" => "__nvvm_shfl_bfly_f32",
+                    "shfl.bfly.i32" => "__nvvm_shfl_bfly_i32",
+                    "shfl.down.f32" => "__nvvm_shfl_down_f32",
+                    "shfl.down.i32" => "__nvvm_shfl_down_i32",
+                    "shfl.idx.f32" => "__nvvm_shfl_idx_f32",
+                    "shfl.idx.i32" => "__nvvm_shfl_idx_i32",
+                    "shfl.sync.bfly.f32" => "__nvvm_shfl_sync_bfly_f32",
+                    "shfl.sync.bfly.i32" => "__nvvm_shfl_sync_bfly_i32",
+                    "shfl.sync.down.f32" => "__nvvm_shfl_sync_down_f32",
+                    "shfl.sync.down.i32" => "__nvvm_shfl_sync_down_i32",
+                    "shfl.sync.idx.f32" => "__nvvm_shfl_sync_idx_f32",
+                    "shfl.sync.idx.i32" => "__nvvm_shfl_sync_idx_i32",
+                    "shfl.sync.up.f32" => "__nvvm_shfl_sync_up_f32",
+                    "shfl.sync.up.i32" => "__nvvm_shfl_sync_up_i32",
+                    "shfl.up.f32" => "__nvvm_shfl_up_f32",
+                    "shfl.up.i32" => "__nvvm_shfl_up_i32",
+                    "sin.approx.f" => "__nvvm_sin_approx_f",
+                    "sin.approx.ftz.f" => "__nvvm_sin_approx_ftz_f",
+                    "sqrt.approx.f" => "__nvvm_sqrt_approx_f",
+                    "sqrt.approx.ftz.f" => "__nvvm_sqrt_approx_ftz_f",
+                    "sqrt.f" => "__nvvm_sqrt_f",
+                    "sqrt.rm.d" => "__nvvm_sqrt_rm_d",
+                    "sqrt.rm.f" => "__nvvm_sqrt_rm_f",
+                    "sqrt.rm.ftz.f" => "__nvvm_sqrt_rm_ftz_f",
+                    "sqrt.rn.d" => "__nvvm_sqrt_rn_d",
+                    "sqrt.rn.f" => "__nvvm_sqrt_rn_f",
+                    "sqrt.rn.ftz.f" => "__nvvm_sqrt_rn_ftz_f",
+                    "sqrt.rp.d" => "__nvvm_sqrt_rp_d",
+                    "sqrt.rp.f" => "__nvvm_sqrt_rp_f",
+                    "sqrt.rp.ftz.f" => "__nvvm_sqrt_rp_ftz_f",
+                    "sqrt.rz.d" => "__nvvm_sqrt_rz_d",
+                    "sqrt.rz.f" => "__nvvm_sqrt_rz_f",
+                    "sqrt.rz.ftz.f" => "__nvvm_sqrt_rz_ftz_f",
+                    "suq.array.size" => "__nvvm_suq_array_size",
+                    "suq.channel.data.type" => "__nvvm_suq_channel_data_type",
+                    "suq.channel.order" => "__nvvm_suq_channel_order",
+                    "suq.depth" => "__nvvm_suq_depth",
+                    "suq.height" => "__nvvm_suq_height",
+                    "suq.width" => "__nvvm_suq_width",
+                    "sust.b.1d.array.i16.clamp" => "__nvvm_sust_b_1d_array_i16_clamp",
+                    "sust.b.1d.array.i16.trap" => "__nvvm_sust_b_1d_array_i16_trap",
+                    "sust.b.1d.array.i16.zero" => "__nvvm_sust_b_1d_array_i16_zero",
+                    "sust.b.1d.array.i32.clamp" => "__nvvm_sust_b_1d_array_i32_clamp",
+                    "sust.b.1d.array.i32.trap" => "__nvvm_sust_b_1d_array_i32_trap",
+                    "sust.b.1d.array.i32.zero" => "__nvvm_sust_b_1d_array_i32_zero",
+                    "sust.b.1d.array.i64.clamp" => "__nvvm_sust_b_1d_array_i64_clamp",
+                    "sust.b.1d.array.i64.trap" => "__nvvm_sust_b_1d_array_i64_trap",
+                    "sust.b.1d.array.i64.zero" => "__nvvm_sust_b_1d_array_i64_zero",
+                    "sust.b.1d.array.i8.clamp" => "__nvvm_sust_b_1d_array_i8_clamp",
+                    "sust.b.1d.array.i8.trap" => "__nvvm_sust_b_1d_array_i8_trap",
+                    "sust.b.1d.array.i8.zero" => "__nvvm_sust_b_1d_array_i8_zero",
+                    "sust.b.1d.array.v2i16.clamp" => "__nvvm_sust_b_1d_array_v2i16_clamp",
+                    "sust.b.1d.array.v2i16.trap" => "__nvvm_sust_b_1d_array_v2i16_trap",
+                    "sust.b.1d.array.v2i16.zero" => "__nvvm_sust_b_1d_array_v2i16_zero",
+                    "sust.b.1d.array.v2i32.clamp" => "__nvvm_sust_b_1d_array_v2i32_clamp",
+                    "sust.b.1d.array.v2i32.trap" => "__nvvm_sust_b_1d_array_v2i32_trap",
+                    "sust.b.1d.array.v2i32.zero" => "__nvvm_sust_b_1d_array_v2i32_zero",
+                    "sust.b.1d.array.v2i64.clamp" => "__nvvm_sust_b_1d_array_v2i64_clamp",
+                    "sust.b.1d.array.v2i64.trap" => "__nvvm_sust_b_1d_array_v2i64_trap",
+                    "sust.b.1d.array.v2i64.zero" => "__nvvm_sust_b_1d_array_v2i64_zero",
+                    "sust.b.1d.array.v2i8.clamp" => "__nvvm_sust_b_1d_array_v2i8_clamp",
+                    "sust.b.1d.array.v2i8.trap" => "__nvvm_sust_b_1d_array_v2i8_trap",
+                    "sust.b.1d.array.v2i8.zero" => "__nvvm_sust_b_1d_array_v2i8_zero",
+                    "sust.b.1d.array.v4i16.clamp" => "__nvvm_sust_b_1d_array_v4i16_clamp",
+                    "sust.b.1d.array.v4i16.trap" => "__nvvm_sust_b_1d_array_v4i16_trap",
+                    "sust.b.1d.array.v4i16.zero" => "__nvvm_sust_b_1d_array_v4i16_zero",
+                    "sust.b.1d.array.v4i32.clamp" => "__nvvm_sust_b_1d_array_v4i32_clamp",
+                    "sust.b.1d.array.v4i32.trap" => "__nvvm_sust_b_1d_array_v4i32_trap",
+                    "sust.b.1d.array.v4i32.zero" => "__nvvm_sust_b_1d_array_v4i32_zero",
+                    "sust.b.1d.array.v4i8.clamp" => "__nvvm_sust_b_1d_array_v4i8_clamp",
+                    "sust.b.1d.array.v4i8.trap" => "__nvvm_sust_b_1d_array_v4i8_trap",
+                    "sust.b.1d.array.v4i8.zero" => "__nvvm_sust_b_1d_array_v4i8_zero",
+                    "sust.b.1d.i16.clamp" => "__nvvm_sust_b_1d_i16_clamp",
+                    "sust.b.1d.i16.trap" => "__nvvm_sust_b_1d_i16_trap",
+                    "sust.b.1d.i16.zero" => "__nvvm_sust_b_1d_i16_zero",
+                    "sust.b.1d.i32.clamp" => "__nvvm_sust_b_1d_i32_clamp",
+                    "sust.b.1d.i32.trap" => "__nvvm_sust_b_1d_i32_trap",
+                    "sust.b.1d.i32.zero" => "__nvvm_sust_b_1d_i32_zero",
+                    "sust.b.1d.i64.clamp" => "__nvvm_sust_b_1d_i64_clamp",
+                    "sust.b.1d.i64.trap" => "__nvvm_sust_b_1d_i64_trap",
+                    "sust.b.1d.i64.zero" => "__nvvm_sust_b_1d_i64_zero",
+                    "sust.b.1d.i8.clamp" => "__nvvm_sust_b_1d_i8_clamp",
+                    "sust.b.1d.i8.trap" => "__nvvm_sust_b_1d_i8_trap",
+                    "sust.b.1d.i8.zero" => "__nvvm_sust_b_1d_i8_zero",
+                    "sust.b.1d.v2i16.clamp" => "__nvvm_sust_b_1d_v2i16_clamp",
+                    "sust.b.1d.v2i16.trap" => "__nvvm_sust_b_1d_v2i16_trap",
+                    "sust.b.1d.v2i16.zero" => "__nvvm_sust_b_1d_v2i16_zero",
+                    "sust.b.1d.v2i32.clamp" => "__nvvm_sust_b_1d_v2i32_clamp",
+                    "sust.b.1d.v2i32.trap" => "__nvvm_sust_b_1d_v2i32_trap",
+                    "sust.b.1d.v2i32.zero" => "__nvvm_sust_b_1d_v2i32_zero",
+                    "sust.b.1d.v2i64.clamp" => "__nvvm_sust_b_1d_v2i64_clamp",
+                    "sust.b.1d.v2i64.trap" => "__nvvm_sust_b_1d_v2i64_trap",
+                    "sust.b.1d.v2i64.zero" => "__nvvm_sust_b_1d_v2i64_zero",
+                    "sust.b.1d.v2i8.clamp" => "__nvvm_sust_b_1d_v2i8_clamp",
+                    "sust.b.1d.v2i8.trap" => "__nvvm_sust_b_1d_v2i8_trap",
+                    "sust.b.1d.v2i8.zero" => "__nvvm_sust_b_1d_v2i8_zero",
+                    "sust.b.1d.v4i16.clamp" => "__nvvm_sust_b_1d_v4i16_clamp",
+                    "sust.b.1d.v4i16.trap" => "__nvvm_sust_b_1d_v4i16_trap",
+                    "sust.b.1d.v4i16.zero" => "__nvvm_sust_b_1d_v4i16_zero",
+                    "sust.b.1d.v4i32.clamp" => "__nvvm_sust_b_1d_v4i32_clamp",
+                    "sust.b.1d.v4i32.trap" => "__nvvm_sust_b_1d_v4i32_trap",
+                    "sust.b.1d.v4i32.zero" => "__nvvm_sust_b_1d_v4i32_zero",
+                    "sust.b.1d.v4i8.clamp" => "__nvvm_sust_b_1d_v4i8_clamp",
+                    "sust.b.1d.v4i8.trap" => "__nvvm_sust_b_1d_v4i8_trap",
+                    "sust.b.1d.v4i8.zero" => "__nvvm_sust_b_1d_v4i8_zero",
+                    "sust.b.2d.array.i16.clamp" => "__nvvm_sust_b_2d_array_i16_clamp",
+                    "sust.b.2d.array.i16.trap" => "__nvvm_sust_b_2d_array_i16_trap",
+                    "sust.b.2d.array.i16.zero" => "__nvvm_sust_b_2d_array_i16_zero",
+                    "sust.b.2d.array.i32.clamp" => "__nvvm_sust_b_2d_array_i32_clamp",
+                    "sust.b.2d.array.i32.trap" => "__nvvm_sust_b_2d_array_i32_trap",
+                    "sust.b.2d.array.i32.zero" => "__nvvm_sust_b_2d_array_i32_zero",
+                    "sust.b.2d.array.i64.clamp" => "__nvvm_sust_b_2d_array_i64_clamp",
+                    "sust.b.2d.array.i64.trap" => "__nvvm_sust_b_2d_array_i64_trap",
+                    "sust.b.2d.array.i64.zero" => "__nvvm_sust_b_2d_array_i64_zero",
+                    "sust.b.2d.array.i8.clamp" => "__nvvm_sust_b_2d_array_i8_clamp",
+                    "sust.b.2d.array.i8.trap" => "__nvvm_sust_b_2d_array_i8_trap",
+                    "sust.b.2d.array.i8.zero" => "__nvvm_sust_b_2d_array_i8_zero",
+                    "sust.b.2d.array.v2i16.clamp" => "__nvvm_sust_b_2d_array_v2i16_clamp",
+                    "sust.b.2d.array.v2i16.trap" => "__nvvm_sust_b_2d_array_v2i16_trap",
+                    "sust.b.2d.array.v2i16.zero" => "__nvvm_sust_b_2d_array_v2i16_zero",
+                    "sust.b.2d.array.v2i32.clamp" => "__nvvm_sust_b_2d_array_v2i32_clamp",
+                    "sust.b.2d.array.v2i32.trap" => "__nvvm_sust_b_2d_array_v2i32_trap",
+                    "sust.b.2d.array.v2i32.zero" => "__nvvm_sust_b_2d_array_v2i32_zero",
+                    "sust.b.2d.array.v2i64.clamp" => "__nvvm_sust_b_2d_array_v2i64_clamp",
+                    "sust.b.2d.array.v2i64.trap" => "__nvvm_sust_b_2d_array_v2i64_trap",
+                    "sust.b.2d.array.v2i64.zero" => "__nvvm_sust_b_2d_array_v2i64_zero",
+                    "sust.b.2d.array.v2i8.clamp" => "__nvvm_sust_b_2d_array_v2i8_clamp",
+                    "sust.b.2d.array.v2i8.trap" => "__nvvm_sust_b_2d_array_v2i8_trap",
+                    "sust.b.2d.array.v2i8.zero" => "__nvvm_sust_b_2d_array_v2i8_zero",
+                    "sust.b.2d.array.v4i16.clamp" => "__nvvm_sust_b_2d_array_v4i16_clamp",
+                    "sust.b.2d.array.v4i16.trap" => "__nvvm_sust_b_2d_array_v4i16_trap",
+                    "sust.b.2d.array.v4i16.zero" => "__nvvm_sust_b_2d_array_v4i16_zero",
+                    "sust.b.2d.array.v4i32.clamp" => "__nvvm_sust_b_2d_array_v4i32_clamp",
+                    "sust.b.2d.array.v4i32.trap" => "__nvvm_sust_b_2d_array_v4i32_trap",
+                    "sust.b.2d.array.v4i32.zero" => "__nvvm_sust_b_2d_array_v4i32_zero",
+                    "sust.b.2d.array.v4i8.clamp" => "__nvvm_sust_b_2d_array_v4i8_clamp",
+                    "sust.b.2d.array.v4i8.trap" => "__nvvm_sust_b_2d_array_v4i8_trap",
+                    "sust.b.2d.array.v4i8.zero" => "__nvvm_sust_b_2d_array_v4i8_zero",
+                    "sust.b.2d.i16.clamp" => "__nvvm_sust_b_2d_i16_clamp",
+                    "sust.b.2d.i16.trap" => "__nvvm_sust_b_2d_i16_trap",
+                    "sust.b.2d.i16.zero" => "__nvvm_sust_b_2d_i16_zero",
+                    "sust.b.2d.i32.clamp" => "__nvvm_sust_b_2d_i32_clamp",
+                    "sust.b.2d.i32.trap" => "__nvvm_sust_b_2d_i32_trap",
+                    "sust.b.2d.i32.zero" => "__nvvm_sust_b_2d_i32_zero",
+                    "sust.b.2d.i64.clamp" => "__nvvm_sust_b_2d_i64_clamp",
+                    "sust.b.2d.i64.trap" => "__nvvm_sust_b_2d_i64_trap",
+                    "sust.b.2d.i64.zero" => "__nvvm_sust_b_2d_i64_zero",
+                    "sust.b.2d.i8.clamp" => "__nvvm_sust_b_2d_i8_clamp",
+                    "sust.b.2d.i8.trap" => "__nvvm_sust_b_2d_i8_trap",
+                    "sust.b.2d.i8.zero" => "__nvvm_sust_b_2d_i8_zero",
+                    "sust.b.2d.v2i16.clamp" => "__nvvm_sust_b_2d_v2i16_clamp",
+                    "sust.b.2d.v2i16.trap" => "__nvvm_sust_b_2d_v2i16_trap",
+                    "sust.b.2d.v2i16.zero" => "__nvvm_sust_b_2d_v2i16_zero",
+                    "sust.b.2d.v2i32.clamp" => "__nvvm_sust_b_2d_v2i32_clamp",
+                    "sust.b.2d.v2i32.trap" => "__nvvm_sust_b_2d_v2i32_trap",
+                    "sust.b.2d.v2i32.zero" => "__nvvm_sust_b_2d_v2i32_zero",
+                    "sust.b.2d.v2i64.clamp" => "__nvvm_sust_b_2d_v2i64_clamp",
+                    "sust.b.2d.v2i64.trap" => "__nvvm_sust_b_2d_v2i64_trap",
+                    "sust.b.2d.v2i64.zero" => "__nvvm_sust_b_2d_v2i64_zero",
+                    "sust.b.2d.v2i8.clamp" => "__nvvm_sust_b_2d_v2i8_clamp",
+                    "sust.b.2d.v2i8.trap" => "__nvvm_sust_b_2d_v2i8_trap",
+                    "sust.b.2d.v2i8.zero" => "__nvvm_sust_b_2d_v2i8_zero",
+                    "sust.b.2d.v4i16.clamp" => "__nvvm_sust_b_2d_v4i16_clamp",
+                    "sust.b.2d.v4i16.trap" => "__nvvm_sust_b_2d_v4i16_trap",
+                    "sust.b.2d.v4i16.zero" => "__nvvm_sust_b_2d_v4i16_zero",
+                    "sust.b.2d.v4i32.clamp" => "__nvvm_sust_b_2d_v4i32_clamp",
+                    "sust.b.2d.v4i32.trap" => "__nvvm_sust_b_2d_v4i32_trap",
+                    "sust.b.2d.v4i32.zero" => "__nvvm_sust_b_2d_v4i32_zero",
+                    "sust.b.2d.v4i8.clamp" => "__nvvm_sust_b_2d_v4i8_clamp",
+                    "sust.b.2d.v4i8.trap" => "__nvvm_sust_b_2d_v4i8_trap",
+                    "sust.b.2d.v4i8.zero" => "__nvvm_sust_b_2d_v4i8_zero",
+                    "sust.b.3d.i16.clamp" => "__nvvm_sust_b_3d_i16_clamp",
+                    "sust.b.3d.i16.trap" => "__nvvm_sust_b_3d_i16_trap",
+                    "sust.b.3d.i16.zero" => "__nvvm_sust_b_3d_i16_zero",
+                    "sust.b.3d.i32.clamp" => "__nvvm_sust_b_3d_i32_clamp",
+                    "sust.b.3d.i32.trap" => "__nvvm_sust_b_3d_i32_trap",
+                    "sust.b.3d.i32.zero" => "__nvvm_sust_b_3d_i32_zero",
+                    "sust.b.3d.i64.clamp" => "__nvvm_sust_b_3d_i64_clamp",
+                    "sust.b.3d.i64.trap" => "__nvvm_sust_b_3d_i64_trap",
+                    "sust.b.3d.i64.zero" => "__nvvm_sust_b_3d_i64_zero",
+                    "sust.b.3d.i8.clamp" => "__nvvm_sust_b_3d_i8_clamp",
+                    "sust.b.3d.i8.trap" => "__nvvm_sust_b_3d_i8_trap",
+                    "sust.b.3d.i8.zero" => "__nvvm_sust_b_3d_i8_zero",
+                    "sust.b.3d.v2i16.clamp" => "__nvvm_sust_b_3d_v2i16_clamp",
+                    "sust.b.3d.v2i16.trap" => "__nvvm_sust_b_3d_v2i16_trap",
+                    "sust.b.3d.v2i16.zero" => "__nvvm_sust_b_3d_v2i16_zero",
+                    "sust.b.3d.v2i32.clamp" => "__nvvm_sust_b_3d_v2i32_clamp",
+                    "sust.b.3d.v2i32.trap" => "__nvvm_sust_b_3d_v2i32_trap",
+                    "sust.b.3d.v2i32.zero" => "__nvvm_sust_b_3d_v2i32_zero",
+                    "sust.b.3d.v2i64.clamp" => "__nvvm_sust_b_3d_v2i64_clamp",
+                    "sust.b.3d.v2i64.trap" => "__nvvm_sust_b_3d_v2i64_trap",
+                    "sust.b.3d.v2i64.zero" => "__nvvm_sust_b_3d_v2i64_zero",
+                    "sust.b.3d.v2i8.clamp" => "__nvvm_sust_b_3d_v2i8_clamp",
+                    "sust.b.3d.v2i8.trap" => "__nvvm_sust_b_3d_v2i8_trap",
+                    "sust.b.3d.v2i8.zero" => "__nvvm_sust_b_3d_v2i8_zero",
+                    "sust.b.3d.v4i16.clamp" => "__nvvm_sust_b_3d_v4i16_clamp",
+                    "sust.b.3d.v4i16.trap" => "__nvvm_sust_b_3d_v4i16_trap",
+                    "sust.b.3d.v4i16.zero" => "__nvvm_sust_b_3d_v4i16_zero",
+                    "sust.b.3d.v4i32.clamp" => "__nvvm_sust_b_3d_v4i32_clamp",
+                    "sust.b.3d.v4i32.trap" => "__nvvm_sust_b_3d_v4i32_trap",
+                    "sust.b.3d.v4i32.zero" => "__nvvm_sust_b_3d_v4i32_zero",
+                    "sust.b.3d.v4i8.clamp" => "__nvvm_sust_b_3d_v4i8_clamp",
+                    "sust.b.3d.v4i8.trap" => "__nvvm_sust_b_3d_v4i8_trap",
+                    "sust.b.3d.v4i8.zero" => "__nvvm_sust_b_3d_v4i8_zero",
+                    "sust.p.1d.array.i16.trap" => "__nvvm_sust_p_1d_array_i16_trap",
+                    "sust.p.1d.array.i32.trap" => "__nvvm_sust_p_1d_array_i32_trap",
+                    "sust.p.1d.array.i8.trap" => "__nvvm_sust_p_1d_array_i8_trap",
+                    "sust.p.1d.array.v2i16.trap" => "__nvvm_sust_p_1d_array_v2i16_trap",
+                    "sust.p.1d.array.v2i32.trap" => "__nvvm_sust_p_1d_array_v2i32_trap",
+                    "sust.p.1d.array.v2i8.trap" => "__nvvm_sust_p_1d_array_v2i8_trap",
+                    "sust.p.1d.array.v4i16.trap" => "__nvvm_sust_p_1d_array_v4i16_trap",
+                    "sust.p.1d.array.v4i32.trap" => "__nvvm_sust_p_1d_array_v4i32_trap",
+                    "sust.p.1d.array.v4i8.trap" => "__nvvm_sust_p_1d_array_v4i8_trap",
+                    "sust.p.1d.i16.trap" => "__nvvm_sust_p_1d_i16_trap",
+                    "sust.p.1d.i32.trap" => "__nvvm_sust_p_1d_i32_trap",
+                    "sust.p.1d.i8.trap" => "__nvvm_sust_p_1d_i8_trap",
+                    "sust.p.1d.v2i16.trap" => "__nvvm_sust_p_1d_v2i16_trap",
+                    "sust.p.1d.v2i32.trap" => "__nvvm_sust_p_1d_v2i32_trap",
+                    "sust.p.1d.v2i8.trap" => "__nvvm_sust_p_1d_v2i8_trap",
+                    "sust.p.1d.v4i16.trap" => "__nvvm_sust_p_1d_v4i16_trap",
+                    "sust.p.1d.v4i32.trap" => "__nvvm_sust_p_1d_v4i32_trap",
+                    "sust.p.1d.v4i8.trap" => "__nvvm_sust_p_1d_v4i8_trap",
+                    "sust.p.2d.array.i16.trap" => "__nvvm_sust_p_2d_array_i16_trap",
+                    "sust.p.2d.array.i32.trap" => "__nvvm_sust_p_2d_array_i32_trap",
+                    "sust.p.2d.array.i8.trap" => "__nvvm_sust_p_2d_array_i8_trap",
+                    "sust.p.2d.array.v2i16.trap" => "__nvvm_sust_p_2d_array_v2i16_trap",
+                    "sust.p.2d.array.v2i32.trap" => "__nvvm_sust_p_2d_array_v2i32_trap",
+                    "sust.p.2d.array.v2i8.trap" => "__nvvm_sust_p_2d_array_v2i8_trap",
+                    "sust.p.2d.array.v4i16.trap" => "__nvvm_sust_p_2d_array_v4i16_trap",
+                    "sust.p.2d.array.v4i32.trap" => "__nvvm_sust_p_2d_array_v4i32_trap",
+                    "sust.p.2d.array.v4i8.trap" => "__nvvm_sust_p_2d_array_v4i8_trap",
+                    "sust.p.2d.i16.trap" => "__nvvm_sust_p_2d_i16_trap",
+                    "sust.p.2d.i32.trap" => "__nvvm_sust_p_2d_i32_trap",
+                    "sust.p.2d.i8.trap" => "__nvvm_sust_p_2d_i8_trap",
+                    "sust.p.2d.v2i16.trap" => "__nvvm_sust_p_2d_v2i16_trap",
+                    "sust.p.2d.v2i32.trap" => "__nvvm_sust_p_2d_v2i32_trap",
+                    "sust.p.2d.v2i8.trap" => "__nvvm_sust_p_2d_v2i8_trap",
+                    "sust.p.2d.v4i16.trap" => "__nvvm_sust_p_2d_v4i16_trap",
+                    "sust.p.2d.v4i32.trap" => "__nvvm_sust_p_2d_v4i32_trap",
+                    "sust.p.2d.v4i8.trap" => "__nvvm_sust_p_2d_v4i8_trap",
+                    "sust.p.3d.i16.trap" => "__nvvm_sust_p_3d_i16_trap",
+                    "sust.p.3d.i32.trap" => "__nvvm_sust_p_3d_i32_trap",
+                    "sust.p.3d.i8.trap" => "__nvvm_sust_p_3d_i8_trap",
+                    "sust.p.3d.v2i16.trap" => "__nvvm_sust_p_3d_v2i16_trap",
+                    "sust.p.3d.v2i32.trap" => "__nvvm_sust_p_3d_v2i32_trap",
+                    "sust.p.3d.v2i8.trap" => "__nvvm_sust_p_3d_v2i8_trap",
+                    "sust.p.3d.v4i16.trap" => "__nvvm_sust_p_3d_v4i16_trap",
+                    "sust.p.3d.v4i32.trap" => "__nvvm_sust_p_3d_v4i32_trap",
+                    "sust.p.3d.v4i8.trap" => "__nvvm_sust_p_3d_v4i8_trap",
+                    "swap.lo.hi.b64" => "__nvvm_swap_lo_hi_b64",
+                    "trunc.d" => "__nvvm_trunc_d",
+                    "trunc.f" => "__nvvm_trunc_f",
+                    "trunc.ftz.f" => "__nvvm_trunc_ftz_f",
+                    "txq.array.size" => "__nvvm_txq_array_size",
+                    "txq.channel.data.type" => "__nvvm_txq_channel_data_type",
+                    "txq.channel.order" => "__nvvm_txq_channel_order",
+                    "txq.depth" => "__nvvm_txq_depth",
+                    "txq.height" => "__nvvm_txq_height",
+                    "txq.num.mipmap.levels" => "__nvvm_txq_num_mipmap_levels",
+                    "txq.num.samples" => "__nvvm_txq_num_samples",
+                    "txq.width" => "__nvvm_txq_width",
+                    "ue8m0x2.to.bf16x2" => "__nvvm_ue8m0x2_to_bf16x2",
+                    "ui2d.rm" => "__nvvm_ui2d_rm",
+                    "ui2d.rn" => "__nvvm_ui2d_rn",
+                    "ui2d.rp" => "__nvvm_ui2d_rp",
+                    "ui2d.rz" => "__nvvm_ui2d_rz",
+                    "ui2f.rm" => "__nvvm_ui2f_rm",
+                    "ui2f.rn" => "__nvvm_ui2f_rn",
+                    "ui2f.rp" => "__nvvm_ui2f_rp",
+                    "ui2f.rz" => "__nvvm_ui2f_rz",
+                    "ull2d.rm" => "__nvvm_ull2d_rm",
+                    "ull2d.rn" => "__nvvm_ull2d_rn",
+                    "ull2d.rp" => "__nvvm_ull2d_rp",
+                    "ull2d.rz" => "__nvvm_ull2d_rz",
+                    "ull2f.rm" => "__nvvm_ull2f_rm",
+                    "ull2f.rn" => "__nvvm_ull2f_rn",
+                    "ull2f.rp" => "__nvvm_ull2f_rp",
+                    "ull2f.rz" => "__nvvm_ull2f_rz",
+                    "vote.all" => "__nvvm_vote_all",
+                    "vote.all.sync" => "__nvvm_vote_all_sync",
+                    "vote.any" => "__nvvm_vote_any",
+                    "vote.any.sync" => "__nvvm_vote_any_sync",
+                    "vote.ballot" => "__nvvm_vote_ballot",
+                    "vote.ballot.sync" => "__nvvm_vote_ballot_sync",
+                    "vote.uni" => "__nvvm_vote_uni",
+                    "vote.uni.sync" => "__nvvm_vote_uni_sync",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            nvvm(name)
+        }
+        "ppc" => {
+            #[allow(non_snake_case)]
+            fn ppc(name: &str) -> &str {
+                match name {
+                    // ppc
+                    "addex" => "__builtin_ppc_addex",
+                    "addf128.round.to.odd" => "__builtin_addf128_round_to_odd",
+                    "addg6s" => "__builtin_addg6s",
+                    "addg6sd" => "__builtin_ppc_addg6s",
+                    "altivec.crypto.vcipher" => "__builtin_altivec_crypto_vcipher",
+                    "altivec.crypto.vcipherlast" => "__builtin_altivec_crypto_vcipherlast",
+                    "altivec.crypto.vncipher" => "__builtin_altivec_crypto_vncipher",
+                    "altivec.crypto.vncipherlast" => "__builtin_altivec_crypto_vncipherlast",
+                    "altivec.crypto.vpermxor" => "__builtin_altivec_crypto_vpermxor",
+                    "altivec.crypto.vpermxor.be" => "__builtin_altivec_crypto_vpermxor_be",
+                    "altivec.crypto.vpmsumb" => "__builtin_altivec_crypto_vpmsumb",
+                    "altivec.crypto.vpmsumd" => "__builtin_altivec_crypto_vpmsumd",
+                    "altivec.crypto.vpmsumh" => "__builtin_altivec_crypto_vpmsumh",
+                    "altivec.crypto.vpmsumw" => "__builtin_altivec_crypto_vpmsumw",
+                    "altivec.crypto.vsbox" => "__builtin_altivec_crypto_vsbox",
+                    "altivec.crypto.vshasigmad" => "__builtin_altivec_crypto_vshasigmad",
+                    "altivec.crypto.vshasigmaw" => "__builtin_altivec_crypto_vshasigmaw",
+                    "altivec.dss" => "__builtin_altivec_dss",
+                    "altivec.dssall" => "__builtin_altivec_dssall",
+                    "altivec.dst" => "__builtin_altivec_dst",
+                    "altivec.dstst" => "__builtin_altivec_dstst",
+                    "altivec.dststt" => "__builtin_altivec_dststt",
+                    "altivec.dstt" => "__builtin_altivec_dstt",
+                    "altivec.mfvscr" => "__builtin_altivec_mfvscr",
+                    "altivec.mtvscr" => "__builtin_altivec_mtvscr",
+                    "altivec.mtvsrbm" => "__builtin_altivec_mtvsrbm",
+                    "altivec.mtvsrdm" => "__builtin_altivec_mtvsrdm",
+                    "altivec.mtvsrhm" => "__builtin_altivec_mtvsrhm",
+                    "altivec.mtvsrqm" => "__builtin_altivec_mtvsrqm",
+                    "altivec.mtvsrwm" => "__builtin_altivec_mtvsrwm",
+                    "altivec.vabsdub" => "__builtin_altivec_vabsdub",
+                    "altivec.vabsduh" => "__builtin_altivec_vabsduh",
+                    "altivec.vabsduw" => "__builtin_altivec_vabsduw",
+                    "altivec.vaddcuq" => "__builtin_altivec_vaddcuq",
+                    "altivec.vaddcuw" => "__builtin_altivec_vaddcuw",
+                    "altivec.vaddecuq" => "__builtin_altivec_vaddecuq",
+                    "altivec.vaddeuqm" => "__builtin_altivec_vaddeuqm",
+                    "altivec.vaddsbs" => "__builtin_altivec_vaddsbs",
+                    "altivec.vaddshs" => "__builtin_altivec_vaddshs",
+                    "altivec.vaddsws" => "__builtin_altivec_vaddsws",
+                    "altivec.vaddubs" => "__builtin_altivec_vaddubs",
+                    "altivec.vadduhs" => "__builtin_altivec_vadduhs",
+                    "altivec.vadduws" => "__builtin_altivec_vadduws",
+                    "altivec.vavgsb" => "__builtin_altivec_vavgsb",
+                    "altivec.vavgsh" => "__builtin_altivec_vavgsh",
+                    "altivec.vavgsw" => "__builtin_altivec_vavgsw",
+                    "altivec.vavgub" => "__builtin_altivec_vavgub",
+                    "altivec.vavguh" => "__builtin_altivec_vavguh",
+                    "altivec.vavguw" => "__builtin_altivec_vavguw",
+                    "altivec.vbpermd" => "__builtin_altivec_vbpermd",
+                    "altivec.vbpermq" => "__builtin_altivec_vbpermq",
+                    "altivec.vcfsx" => "__builtin_altivec_vcfsx",
+                    "altivec.vcfuged" => "__builtin_altivec_vcfuged",
+                    "altivec.vcfux" => "__builtin_altivec_vcfux",
+                    "altivec.vclrlb" => "__builtin_altivec_vclrlb",
+                    "altivec.vclrrb" => "__builtin_altivec_vclrrb",
+                    "altivec.vclzdm" => "__builtin_altivec_vclzdm",
+                    "altivec.vclzlsbb" => "__builtin_altivec_vclzlsbb",
+                    "altivec.vcmpbfp" => "__builtin_altivec_vcmpbfp",
+                    "altivec.vcmpbfp.p" => "__builtin_altivec_vcmpbfp_p",
+                    "altivec.vcmpeqfp" => "__builtin_altivec_vcmpeqfp",
+                    "altivec.vcmpeqfp.p" => "__builtin_altivec_vcmpeqfp_p",
+                    "altivec.vcmpequb" => "__builtin_altivec_vcmpequb",
+                    "altivec.vcmpequb.p" => "__builtin_altivec_vcmpequb_p",
+                    "altivec.vcmpequd" => "__builtin_altivec_vcmpequd",
+                    "altivec.vcmpequd.p" => "__builtin_altivec_vcmpequd_p",
+                    "altivec.vcmpequh" => "__builtin_altivec_vcmpequh",
+                    "altivec.vcmpequh.p" => "__builtin_altivec_vcmpequh_p",
+                    "altivec.vcmpequq" => "__builtin_altivec_vcmpequq",
+                    "altivec.vcmpequq.p" => "__builtin_altivec_vcmpequq_p",
+                    "altivec.vcmpequw" => "__builtin_altivec_vcmpequw",
+                    "altivec.vcmpequw.p" => "__builtin_altivec_vcmpequw_p",
+                    "altivec.vcmpgefp" => "__builtin_altivec_vcmpgefp",
+                    "altivec.vcmpgefp.p" => "__builtin_altivec_vcmpgefp_p",
+                    "altivec.vcmpgtfp" => "__builtin_altivec_vcmpgtfp",
+                    "altivec.vcmpgtfp.p" => "__builtin_altivec_vcmpgtfp_p",
+                    "altivec.vcmpgtsb" => "__builtin_altivec_vcmpgtsb",
+                    "altivec.vcmpgtsb.p" => "__builtin_altivec_vcmpgtsb_p",
+                    "altivec.vcmpgtsd" => "__builtin_altivec_vcmpgtsd",
+                    "altivec.vcmpgtsd.p" => "__builtin_altivec_vcmpgtsd_p",
+                    "altivec.vcmpgtsh" => "__builtin_altivec_vcmpgtsh",
+                    "altivec.vcmpgtsh.p" => "__builtin_altivec_vcmpgtsh_p",
+                    "altivec.vcmpgtsq" => "__builtin_altivec_vcmpgtsq",
+                    "altivec.vcmpgtsq.p" => "__builtin_altivec_vcmpgtsq_p",
+                    "altivec.vcmpgtsw" => "__builtin_altivec_vcmpgtsw",
+                    "altivec.vcmpgtsw.p" => "__builtin_altivec_vcmpgtsw_p",
+                    "altivec.vcmpgtub" => "__builtin_altivec_vcmpgtub",
+                    "altivec.vcmpgtub.p" => "__builtin_altivec_vcmpgtub_p",
+                    "altivec.vcmpgtud" => "__builtin_altivec_vcmpgtud",
+                    "altivec.vcmpgtud.p" => "__builtin_altivec_vcmpgtud_p",
+                    "altivec.vcmpgtuh" => "__builtin_altivec_vcmpgtuh",
+                    "altivec.vcmpgtuh.p" => "__builtin_altivec_vcmpgtuh_p",
+                    "altivec.vcmpgtuq" => "__builtin_altivec_vcmpgtuq",
+                    "altivec.vcmpgtuq.p" => "__builtin_altivec_vcmpgtuq_p",
+                    "altivec.vcmpgtuw" => "__builtin_altivec_vcmpgtuw",
+                    "altivec.vcmpgtuw.p" => "__builtin_altivec_vcmpgtuw_p",
+                    "altivec.vcmpneb" => "__builtin_altivec_vcmpneb",
+                    "altivec.vcmpneb.p" => "__builtin_altivec_vcmpneb_p",
+                    "altivec.vcmpneh" => "__builtin_altivec_vcmpneh",
+                    "altivec.vcmpneh.p" => "__builtin_altivec_vcmpneh_p",
+                    "altivec.vcmpnew" => "__builtin_altivec_vcmpnew",
+                    "altivec.vcmpnew.p" => "__builtin_altivec_vcmpnew_p",
+                    "altivec.vcmpnezb" => "__builtin_altivec_vcmpnezb",
+                    "altivec.vcmpnezb.p" => "__builtin_altivec_vcmpnezb_p",
+                    "altivec.vcmpnezh" => "__builtin_altivec_vcmpnezh",
+                    "altivec.vcmpnezh.p" => "__builtin_altivec_vcmpnezh_p",
+                    "altivec.vcmpnezw" => "__builtin_altivec_vcmpnezw",
+                    "altivec.vcmpnezw.p" => "__builtin_altivec_vcmpnezw_p",
+                    "altivec.vcntmbb" => "__builtin_altivec_vcntmbb",
+                    "altivec.vcntmbd" => "__builtin_altivec_vcntmbd",
+                    "altivec.vcntmbh" => "__builtin_altivec_vcntmbh",
+                    "altivec.vcntmbw" => "__builtin_altivec_vcntmbw",
+                    "altivec.vctsxs" => "__builtin_altivec_vctsxs",
+                    "altivec.vctuxs" => "__builtin_altivec_vctuxs",
+                    "altivec.vctzdm" => "__builtin_altivec_vctzdm",
+                    "altivec.vctzlsbb" => "__builtin_altivec_vctzlsbb",
+                    "altivec.vdivesd" => "__builtin_altivec_vdivesd",
+                    "altivec.vdivesq" => "__builtin_altivec_vdivesq",
+                    "altivec.vdivesw" => "__builtin_altivec_vdivesw",
+                    "altivec.vdiveud" => "__builtin_altivec_vdiveud",
+                    "altivec.vdiveuq" => "__builtin_altivec_vdiveuq",
+                    "altivec.vdiveuw" => "__builtin_altivec_vdiveuw",
+                    "altivec.vexpandbm" => "__builtin_altivec_vexpandbm",
+                    "altivec.vexpanddm" => "__builtin_altivec_vexpanddm",
+                    "altivec.vexpandhm" => "__builtin_altivec_vexpandhm",
+                    "altivec.vexpandqm" => "__builtin_altivec_vexpandqm",
+                    "altivec.vexpandwm" => "__builtin_altivec_vexpandwm",
+                    "altivec.vexptefp" => "__builtin_altivec_vexptefp",
+                    "altivec.vextddvlx" => "__builtin_altivec_vextddvlx",
+                    "altivec.vextddvrx" => "__builtin_altivec_vextddvrx",
+                    "altivec.vextdubvlx" => "__builtin_altivec_vextdubvlx",
+                    "altivec.vextdubvrx" => "__builtin_altivec_vextdubvrx",
+                    "altivec.vextduhvlx" => "__builtin_altivec_vextduhvlx",
+                    "altivec.vextduhvrx" => "__builtin_altivec_vextduhvrx",
+                    "altivec.vextduwvlx" => "__builtin_altivec_vextduwvlx",
+                    "altivec.vextduwvrx" => "__builtin_altivec_vextduwvrx",
+                    "altivec.vextractbm" => "__builtin_altivec_vextractbm",
+                    "altivec.vextractdm" => "__builtin_altivec_vextractdm",
+                    "altivec.vextracthm" => "__builtin_altivec_vextracthm",
+                    "altivec.vextractqm" => "__builtin_altivec_vextractqm",
+                    "altivec.vextractwm" => "__builtin_altivec_vextractwm",
+                    "altivec.vextsb2d" => "__builtin_altivec_vextsb2d",
+                    "altivec.vextsb2w" => "__builtin_altivec_vextsb2w",
+                    "altivec.vextsd2q" => "__builtin_altivec_vextsd2q",
+                    "altivec.vextsh2d" => "__builtin_altivec_vextsh2d",
+                    "altivec.vextsh2w" => "__builtin_altivec_vextsh2w",
+                    "altivec.vextsw2d" => "__builtin_altivec_vextsw2d",
+                    "altivec.vgbbd" => "__builtin_altivec_vgbbd",
+                    "altivec.vgnb" => "__builtin_altivec_vgnb",
+                    "altivec.vinsblx" => "__builtin_altivec_vinsblx",
+                    "altivec.vinsbrx" => "__builtin_altivec_vinsbrx",
+                    "altivec.vinsbvlx" => "__builtin_altivec_vinsbvlx",
+                    "altivec.vinsbvrx" => "__builtin_altivec_vinsbvrx",
+                    "altivec.vinsdlx" => "__builtin_altivec_vinsdlx",
+                    "altivec.vinsdrx" => "__builtin_altivec_vinsdrx",
+                    "altivec.vinshlx" => "__builtin_altivec_vinshlx",
+                    "altivec.vinshrx" => "__builtin_altivec_vinshrx",
+                    "altivec.vinshvlx" => "__builtin_altivec_vinshvlx",
+                    "altivec.vinshvrx" => "__builtin_altivec_vinshvrx",
+                    "altivec.vinswlx" => "__builtin_altivec_vinswlx",
+                    "altivec.vinswrx" => "__builtin_altivec_vinswrx",
+                    "altivec.vinswvlx" => "__builtin_altivec_vinswvlx",
+                    "altivec.vinswvrx" => "__builtin_altivec_vinswvrx",
+                    "altivec.vlogefp" => "__builtin_altivec_vlogefp",
+                    "altivec.vmaddfp" => "__builtin_altivec_vmaddfp",
+                    "altivec.vmaxfp" => "__builtin_altivec_vmaxfp",
+                    "altivec.vmaxsb" => "__builtin_altivec_vmaxsb",
+                    "altivec.vmaxsd" => "__builtin_altivec_vmaxsd",
+                    "altivec.vmaxsh" => "__builtin_altivec_vmaxsh",
+                    "altivec.vmaxsw" => "__builtin_altivec_vmaxsw",
+                    "altivec.vmaxub" => "__builtin_altivec_vmaxub",
+                    "altivec.vmaxud" => "__builtin_altivec_vmaxud",
+                    "altivec.vmaxuh" => "__builtin_altivec_vmaxuh",
+                    "altivec.vmaxuw" => "__builtin_altivec_vmaxuw",
+                    "altivec.vmhaddshs" => "__builtin_altivec_vmhaddshs",
+                    "altivec.vmhraddshs" => "__builtin_altivec_vmhraddshs",
+                    "altivec.vminfp" => "__builtin_altivec_vminfp",
+                    "altivec.vminsb" => "__builtin_altivec_vminsb",
+                    "altivec.vminsd" => "__builtin_altivec_vminsd",
+                    "altivec.vminsh" => "__builtin_altivec_vminsh",
+                    "altivec.vminsw" => "__builtin_altivec_vminsw",
+                    "altivec.vminub" => "__builtin_altivec_vminub",
+                    "altivec.vminud" => "__builtin_altivec_vminud",
+                    "altivec.vminuh" => "__builtin_altivec_vminuh",
+                    "altivec.vminuw" => "__builtin_altivec_vminuw",
+                    "altivec.vmladduhm" => "__builtin_altivec_vmladduhm",
+                    "altivec.vmsumcud" => "__builtin_altivec_vmsumcud",
+                    "altivec.vmsummbm" => "__builtin_altivec_vmsummbm",
+                    "altivec.vmsumshm" => "__builtin_altivec_vmsumshm",
+                    "altivec.vmsumshs" => "__builtin_altivec_vmsumshs",
+                    "altivec.vmsumubm" => "__builtin_altivec_vmsumubm",
+                    "altivec.vmsumudm" => "__builtin_altivec_vmsumudm",
+                    "altivec.vmsumuhm" => "__builtin_altivec_vmsumuhm",
+                    "altivec.vmsumuhs" => "__builtin_altivec_vmsumuhs",
+                    "altivec.vmulesb" => "__builtin_altivec_vmulesb",
+                    "altivec.vmulesd" => "__builtin_altivec_vmulesd",
+                    "altivec.vmulesh" => "__builtin_altivec_vmulesh",
+                    "altivec.vmulesw" => "__builtin_altivec_vmulesw",
+                    "altivec.vmuleub" => "__builtin_altivec_vmuleub",
+                    "altivec.vmuleud" => "__builtin_altivec_vmuleud",
+                    "altivec.vmuleuh" => "__builtin_altivec_vmuleuh",
+                    "altivec.vmuleuw" => "__builtin_altivec_vmuleuw",
+                    "altivec.vmulhsd" => "__builtin_altivec_vmulhsd",
+                    "altivec.vmulhsw" => "__builtin_altivec_vmulhsw",
+                    "altivec.vmulhud" => "__builtin_altivec_vmulhud",
+                    "altivec.vmulhuw" => "__builtin_altivec_vmulhuw",
+                    "altivec.vmulosb" => "__builtin_altivec_vmulosb",
+                    "altivec.vmulosd" => "__builtin_altivec_vmulosd",
+                    "altivec.vmulosh" => "__builtin_altivec_vmulosh",
+                    "altivec.vmulosw" => "__builtin_altivec_vmulosw",
+                    "altivec.vmuloub" => "__builtin_altivec_vmuloub",
+                    "altivec.vmuloud" => "__builtin_altivec_vmuloud",
+                    "altivec.vmulouh" => "__builtin_altivec_vmulouh",
+                    "altivec.vmulouw" => "__builtin_altivec_vmulouw",
+                    "altivec.vnmsubfp" => "__builtin_altivec_vnmsubfp",
+                    "altivec.vpdepd" => "__builtin_altivec_vpdepd",
+                    "altivec.vperm" => "__builtin_altivec_vperm_4si",
+                    "altivec.vpextd" => "__builtin_altivec_vpextd",
+                    "altivec.vpkpx" => "__builtin_altivec_vpkpx",
+                    "altivec.vpksdss" => "__builtin_altivec_vpksdss",
+                    "altivec.vpksdus" => "__builtin_altivec_vpksdus",
+                    "altivec.vpkshss" => "__builtin_altivec_vpkshss",
+                    "altivec.vpkshus" => "__builtin_altivec_vpkshus",
+                    "altivec.vpkswss" => "__builtin_altivec_vpkswss",
+                    "altivec.vpkswus" => "__builtin_altivec_vpkswus",
+                    "altivec.vpkudus" => "__builtin_altivec_vpkudus",
+                    "altivec.vpkuhus" => "__builtin_altivec_vpkuhus",
+                    "altivec.vpkuwus" => "__builtin_altivec_vpkuwus",
+                    "altivec.vprtybd" => "__builtin_altivec_vprtybd",
+                    "altivec.vprtybq" => "__builtin_altivec_vprtybq",
+                    "altivec.vprtybw" => "__builtin_altivec_vprtybw",
+                    "altivec.vrefp" => "__builtin_altivec_vrefp",
+                    "altivec.vrfim" => "__builtin_altivec_vrfim",
+                    "altivec.vrfin" => "__builtin_altivec_vrfin",
+                    "altivec.vrfip" => "__builtin_altivec_vrfip",
+                    "altivec.vrfiz" => "__builtin_altivec_vrfiz",
+                    "altivec.vrlb" => "__builtin_altivec_vrlb",
+                    "altivec.vrld" => "__builtin_altivec_vrld",
+                    "altivec.vrldmi" => "__builtin_altivec_vrldmi",
+                    "altivec.vrldnm" => "__builtin_altivec_vrldnm",
+                    "altivec.vrlh" => "__builtin_altivec_vrlh",
+                    "altivec.vrlqmi" => "__builtin_altivec_vrlqmi",
+                    "altivec.vrlqnm" => "__builtin_altivec_vrlqnm",
+                    "altivec.vrlw" => "__builtin_altivec_vrlw",
+                    "altivec.vrlwmi" => "__builtin_altivec_vrlwmi",
+                    "altivec.vrlwnm" => "__builtin_altivec_vrlwnm",
+                    "altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
+                    "altivec.vsel" => "__builtin_altivec_vsel_4si",
+                    "altivec.vsl" => "__builtin_altivec_vsl",
+                    "altivec.vslb" => "__builtin_altivec_vslb",
+                    "altivec.vsldbi" => "__builtin_altivec_vsldbi",
+                    "altivec.vslh" => "__builtin_altivec_vslh",
+                    "altivec.vslo" => "__builtin_altivec_vslo",
+                    "altivec.vslv" => "__builtin_altivec_vslv",
+                    "altivec.vslw" => "__builtin_altivec_vslw",
+                    "altivec.vsr" => "__builtin_altivec_vsr",
+                    "altivec.vsrab" => "__builtin_altivec_vsrab",
+                    "altivec.vsrah" => "__builtin_altivec_vsrah",
+                    "altivec.vsraw" => "__builtin_altivec_vsraw",
+                    "altivec.vsrb" => "__builtin_altivec_vsrb",
+                    "altivec.vsrdbi" => "__builtin_altivec_vsrdbi",
+                    "altivec.vsrh" => "__builtin_altivec_vsrh",
+                    "altivec.vsro" => "__builtin_altivec_vsro",
+                    "altivec.vsrv" => "__builtin_altivec_vsrv",
+                    "altivec.vsrw" => "__builtin_altivec_vsrw",
+                    "altivec.vstribl" => "__builtin_altivec_vstribl",
+                    "altivec.vstribl.p" => "__builtin_altivec_vstribl_p",
+                    "altivec.vstribr" => "__builtin_altivec_vstribr",
+                    "altivec.vstribr.p" => "__builtin_altivec_vstribr_p",
+                    "altivec.vstrihl" => "__builtin_altivec_vstrihl",
+                    "altivec.vstrihl.p" => "__builtin_altivec_vstrihl_p",
+                    "altivec.vstrihr" => "__builtin_altivec_vstrihr",
+                    "altivec.vstrihr.p" => "__builtin_altivec_vstrihr_p",
+                    "altivec.vsubcuq" => "__builtin_altivec_vsubcuq",
+                    "altivec.vsubcuw" => "__builtin_altivec_vsubcuw",
+                    "altivec.vsubecuq" => "__builtin_altivec_vsubecuq",
+                    "altivec.vsubeuqm" => "__builtin_altivec_vsubeuqm",
+                    "altivec.vsubsbs" => "__builtin_altivec_vsubsbs",
+                    "altivec.vsubshs" => "__builtin_altivec_vsubshs",
+                    "altivec.vsubsws" => "__builtin_altivec_vsubsws",
+                    "altivec.vsububs" => "__builtin_altivec_vsububs",
+                    "altivec.vsubuhs" => "__builtin_altivec_vsubuhs",
+                    "altivec.vsubuws" => "__builtin_altivec_vsubuws",
+                    "altivec.vsum2sws" => "__builtin_altivec_vsum2sws",
+                    "altivec.vsum4sbs" => "__builtin_altivec_vsum4sbs",
+                    "altivec.vsum4shs" => "__builtin_altivec_vsum4shs",
+                    "altivec.vsum4ubs" => "__builtin_altivec_vsum4ubs",
+                    "altivec.vsumsws" => "__builtin_altivec_vsumsws",
+                    "altivec.vupkhpx" => "__builtin_altivec_vupkhpx",
+                    "altivec.vupkhsb" => "__builtin_altivec_vupkhsb",
+                    "altivec.vupkhsh" => "__builtin_altivec_vupkhsh",
+                    "altivec.vupkhsw" => "__builtin_altivec_vupkhsw",
+                    "altivec.vupklpx" => "__builtin_altivec_vupklpx",
+                    "altivec.vupklsb" => "__builtin_altivec_vupklsb",
+                    "altivec.vupklsh" => "__builtin_altivec_vupklsh",
+                    "altivec.vupklsw" => "__builtin_altivec_vupklsw",
+                    "bcdadd" => "__builtin_ppc_bcdadd",
+                    "bcdadd.p" => "__builtin_ppc_bcdadd_p",
+                    "bcdsub" => "__builtin_ppc_bcdsub",
+                    "bcdsub.p" => "__builtin_ppc_bcdsub_p",
+                    "bpermd" => "__builtin_bpermd",
+                    "cbcdtd" => "__builtin_cbcdtd",
+                    "cbcdtdd" => "__builtin_ppc_cbcdtd",
+                    "cdtbcd" => "__builtin_cdtbcd",
+                    "cdtbcdd" => "__builtin_ppc_cdtbcd",
+                    "cfuged" => "__builtin_cfuged",
+                    "cmpeqb" => "__builtin_ppc_cmpeqb",
+                    "cmprb" => "__builtin_ppc_cmprb",
+                    "cntlzdm" => "__builtin_cntlzdm",
+                    "cnttzdm" => "__builtin_cnttzdm",
+                    "compare.exp.eq" => "__builtin_ppc_compare_exp_eq",
+                    "compare.exp.gt" => "__builtin_ppc_compare_exp_gt",
+                    "compare.exp.lt" => "__builtin_ppc_compare_exp_lt",
+                    "compare.exp.uo" => "__builtin_ppc_compare_exp_uo",
+                    "darn" => "__builtin_darn",
+                    "darn32" => "__builtin_darn_32",
+                    "darnraw" => "__builtin_darn_raw",
+                    "dcbf" => "__builtin_dcbf",
+                    "dcbfl" => "__builtin_ppc_dcbfl",
+                    "dcbflp" => "__builtin_ppc_dcbflp",
+                    "dcbst" => "__builtin_ppc_dcbst",
+                    "dcbt" => "__builtin_ppc_dcbt",
+                    "dcbtst" => "__builtin_ppc_dcbtst",
+                    "dcbtstt" => "__builtin_ppc_dcbtstt",
+                    "dcbtt" => "__builtin_ppc_dcbtt",
+                    "dcbz" => "__builtin_ppc_dcbz",
+                    "divde" => "__builtin_divde",
+                    "divdeu" => "__builtin_divdeu",
+                    "divf128.round.to.odd" => "__builtin_divf128_round_to_odd",
+                    "divwe" => "__builtin_divwe",
+                    "divweu" => "__builtin_divweu",
+                    "eieio" => "__builtin_ppc_eieio",
+                    "extract.exp" => "__builtin_ppc_extract_exp",
+                    "extract.sig" => "__builtin_ppc_extract_sig",
+                    "fcfid" => "__builtin_ppc_fcfid",
+                    "fcfud" => "__builtin_ppc_fcfud",
+                    "fctid" => "__builtin_ppc_fctid",
+                    "fctidz" => "__builtin_ppc_fctidz",
+                    "fctiw" => "__builtin_ppc_fctiw",
+                    "fctiwz" => "__builtin_ppc_fctiwz",
+                    "fctudz" => "__builtin_ppc_fctudz",
+                    "fctuwz" => "__builtin_ppc_fctuwz",
+                    "fence" => "__builtin_ppc_fence",
+                    "fmaf128.round.to.odd" => "__builtin_fmaf128_round_to_odd",
+                    "fmsub" => "__builtin_ppc_fmsub",
+                    "fmsubs" => "__builtin_ppc_fmsubs",
+                    "fnabs" => "__builtin_ppc_fnabs",
+                    "fnabss" => "__builtin_ppc_fnabss",
+                    "fnmadd" => "__builtin_ppc_fnmadd",
+                    "fnmadds" => "__builtin_ppc_fnmadds",
+                    "fre" => "__builtin_ppc_fre",
+                    "fres" => "__builtin_ppc_fres",
+                    "frsqrte" => "__builtin_ppc_frsqrte",
+                    "frsqrtes" => "__builtin_ppc_frsqrtes",
+                    "fsel" => "__builtin_ppc_fsel",
+                    "fsels" => "__builtin_ppc_fsels",
+                    "get.texasr" => "__builtin_get_texasr",
+                    "get.texasru" => "__builtin_get_texasru",
+                    "get.tfhar" => "__builtin_get_tfhar",
+                    "get.tfiar" => "__builtin_get_tfiar",
+                    "icbt" => "__builtin_ppc_icbt",
+                    "insert.exp" => "__builtin_ppc_insert_exp",
+                    "iospace.eieio" => "__builtin_ppc_iospace_eieio",
+                    "iospace.lwsync" => "__builtin_ppc_iospace_lwsync",
+                    "iospace.sync" => "__builtin_ppc_iospace_sync",
+                    "isync" => "__builtin_ppc_isync",
+                    "load4r" => "__builtin_ppc_load4r",
+                    "load8r" => "__builtin_ppc_load8r",
+                    "lwsync" => "__builtin_ppc_lwsync",
+                    "maddhd" => "__builtin_ppc_maddhd",
+                    "maddhdu" => "__builtin_ppc_maddhdu",
+                    "maddld" => "__builtin_ppc_maddld",
+                    "mffsl" => "__builtin_ppc_mffsl",
+                    "mfmsr" => "__builtin_ppc_mfmsr",
+                    "mftbu" => "__builtin_ppc_mftbu",
+                    "mtfsb0" => "__builtin_ppc_mtfsb0",
+                    "mtfsb1" => "__builtin_ppc_mtfsb1",
+                    "mtfsfi" => "__builtin_ppc_mtfsfi",
+                    "mtmsr" => "__builtin_ppc_mtmsr",
+                    "mulf128.round.to.odd" => "__builtin_mulf128_round_to_odd",
+                    "mulhd" => "__builtin_ppc_mulhd",
+                    "mulhdu" => "__builtin_ppc_mulhdu",
+                    "mulhw" => "__builtin_ppc_mulhw",
+                    "mulhwu" => "__builtin_ppc_mulhwu",
+                    "pack.longdouble" => "__builtin_pack_longdouble",
+                    "pdepd" => "__builtin_pdepd",
+                    "pextd" => "__builtin_pextd",
+                    "qpx.qvfabs" => "__builtin_qpx_qvfabs",
+                    "qpx.qvfadd" => "__builtin_qpx_qvfadd",
+                    "qpx.qvfadds" => "__builtin_qpx_qvfadds",
+                    "qpx.qvfcfid" => "__builtin_qpx_qvfcfid",
+                    "qpx.qvfcfids" => "__builtin_qpx_qvfcfids",
+                    "qpx.qvfcfidu" => "__builtin_qpx_qvfcfidu",
+                    "qpx.qvfcfidus" => "__builtin_qpx_qvfcfidus",
+                    "qpx.qvfcmpeq" => "__builtin_qpx_qvfcmpeq",
+                    "qpx.qvfcmpgt" => "__builtin_qpx_qvfcmpgt",
+                    "qpx.qvfcmplt" => "__builtin_qpx_qvfcmplt",
+                    "qpx.qvfcpsgn" => "__builtin_qpx_qvfcpsgn",
+                    "qpx.qvfctid" => "__builtin_qpx_qvfctid",
+                    "qpx.qvfctidu" => "__builtin_qpx_qvfctidu",
+                    "qpx.qvfctiduz" => "__builtin_qpx_qvfctiduz",
+                    "qpx.qvfctidz" => "__builtin_qpx_qvfctidz",
+                    "qpx.qvfctiw" => "__builtin_qpx_qvfctiw",
+                    "qpx.qvfctiwu" => "__builtin_qpx_qvfctiwu",
+                    "qpx.qvfctiwuz" => "__builtin_qpx_qvfctiwuz",
+                    "qpx.qvfctiwz" => "__builtin_qpx_qvfctiwz",
+                    "qpx.qvflogical" => "__builtin_qpx_qvflogical",
+                    "qpx.qvfmadd" => "__builtin_qpx_qvfmadd",
+                    "qpx.qvfmadds" => "__builtin_qpx_qvfmadds",
+                    "qpx.qvfmsub" => "__builtin_qpx_qvfmsub",
+                    "qpx.qvfmsubs" => "__builtin_qpx_qvfmsubs",
+                    "qpx.qvfmul" => "__builtin_qpx_qvfmul",
+                    "qpx.qvfmuls" => "__builtin_qpx_qvfmuls",
+                    "qpx.qvfnabs" => "__builtin_qpx_qvfnabs",
+                    "qpx.qvfneg" => "__builtin_qpx_qvfneg",
+                    "qpx.qvfnmadd" => "__builtin_qpx_qvfnmadd",
+                    "qpx.qvfnmadds" => "__builtin_qpx_qvfnmadds",
+                    "qpx.qvfnmsub" => "__builtin_qpx_qvfnmsub",
+                    "qpx.qvfnmsubs" => "__builtin_qpx_qvfnmsubs",
+                    "qpx.qvfperm" => "__builtin_qpx_qvfperm",
+                    "qpx.qvfre" => "__builtin_qpx_qvfre",
+                    "qpx.qvfres" => "__builtin_qpx_qvfres",
+                    "qpx.qvfrim" => "__builtin_qpx_qvfrim",
+                    "qpx.qvfrin" => "__builtin_qpx_qvfrin",
+                    "qpx.qvfrip" => "__builtin_qpx_qvfrip",
+                    "qpx.qvfriz" => "__builtin_qpx_qvfriz",
+                    "qpx.qvfrsp" => "__builtin_qpx_qvfrsp",
+                    "qpx.qvfrsqrte" => "__builtin_qpx_qvfrsqrte",
+                    "qpx.qvfrsqrtes" => "__builtin_qpx_qvfrsqrtes",
+                    "qpx.qvfsel" => "__builtin_qpx_qvfsel",
+                    "qpx.qvfsub" => "__builtin_qpx_qvfsub",
+                    "qpx.qvfsubs" => "__builtin_qpx_qvfsubs",
+                    "qpx.qvftstnan" => "__builtin_qpx_qvftstnan",
+                    "qpx.qvfxmadd" => "__builtin_qpx_qvfxmadd",
+                    "qpx.qvfxmadds" => "__builtin_qpx_qvfxmadds",
+                    "qpx.qvfxmul" => "__builtin_qpx_qvfxmul",
+                    "qpx.qvfxmuls" => "__builtin_qpx_qvfxmuls",
+                    "qpx.qvfxxcpnmadd" => "__builtin_qpx_qvfxxcpnmadd",
+                    "qpx.qvfxxcpnmadds" => "__builtin_qpx_qvfxxcpnmadds",
+                    "qpx.qvfxxmadd" => "__builtin_qpx_qvfxxmadd",
+                    "qpx.qvfxxmadds" => "__builtin_qpx_qvfxxmadds",
+                    "qpx.qvfxxnpmadd" => "__builtin_qpx_qvfxxnpmadd",
+                    "qpx.qvfxxnpmadds" => "__builtin_qpx_qvfxxnpmadds",
+                    "qpx.qvgpci" => "__builtin_qpx_qvgpci",
+                    "qpx.qvlfcd" => "__builtin_qpx_qvlfcd",
+                    "qpx.qvlfcda" => "__builtin_qpx_qvlfcda",
+                    "qpx.qvlfcs" => "__builtin_qpx_qvlfcs",
+                    "qpx.qvlfcsa" => "__builtin_qpx_qvlfcsa",
+                    "qpx.qvlfd" => "__builtin_qpx_qvlfd",
+                    "qpx.qvlfda" => "__builtin_qpx_qvlfda",
+                    "qpx.qvlfiwa" => "__builtin_qpx_qvlfiwa",
+                    "qpx.qvlfiwaa" => "__builtin_qpx_qvlfiwaa",
+                    "qpx.qvlfiwz" => "__builtin_qpx_qvlfiwz",
+                    "qpx.qvlfiwza" => "__builtin_qpx_qvlfiwza",
+                    "qpx.qvlfs" => "__builtin_qpx_qvlfs",
+                    "qpx.qvlfsa" => "__builtin_qpx_qvlfsa",
+                    "qpx.qvlpcld" => "__builtin_qpx_qvlpcld",
+                    "qpx.qvlpcls" => "__builtin_qpx_qvlpcls",
+                    "qpx.qvlpcrd" => "__builtin_qpx_qvlpcrd",
+                    "qpx.qvlpcrs" => "__builtin_qpx_qvlpcrs",
+                    "qpx.qvstfcd" => "__builtin_qpx_qvstfcd",
+                    "qpx.qvstfcda" => "__builtin_qpx_qvstfcda",
+                    "qpx.qvstfcs" => "__builtin_qpx_qvstfcs",
+                    "qpx.qvstfcsa" => "__builtin_qpx_qvstfcsa",
+                    "qpx.qvstfd" => "__builtin_qpx_qvstfd",
+                    "qpx.qvstfda" => "__builtin_qpx_qvstfda",
+                    "qpx.qvstfiw" => "__builtin_qpx_qvstfiw",
+                    "qpx.qvstfiwa" => "__builtin_qpx_qvstfiwa",
+                    "qpx.qvstfs" => "__builtin_qpx_qvstfs",
+                    "qpx.qvstfsa" => "__builtin_qpx_qvstfsa",
+                    "readflm" => "__builtin_readflm",
+                    "rlwimi" => "__builtin_ppc_rlwimi",
+                    "rlwnm" => "__builtin_ppc_rlwnm",
+                    "scalar.extract.expq" => "__builtin_vsx_scalar_extract_expq",
+                    "scalar.insert.exp.qp" => "__builtin_vsx_scalar_insert_exp_qp",
+                    "set.texasr" => "__builtin_set_texasr",
+                    "set.texasru" => "__builtin_set_texasru",
+                    "set.tfhar" => "__builtin_set_tfhar",
+                    "set.tfiar" => "__builtin_set_tfiar",
+                    "setb" => "__builtin_ppc_setb",
+                    "setflm" => "__builtin_setflm",
+                    "setrnd" => "__builtin_setrnd",
+                    "sqrtf128.round.to.odd" => "__builtin_sqrtf128_round_to_odd",
+                    "stbcx" => "__builtin_ppc_stbcx",
+                    "stdcx" => "__builtin_ppc_stdcx",
+                    "stfiw" => "__builtin_ppc_stfiw",
+                    "store2r" => "__builtin_ppc_store2r",
+                    "store4r" => "__builtin_ppc_store4r",
+                    "store8r" => "__builtin_ppc_store8r",
+                    "stwcx" => "__builtin_ppc_stwcx",
+                    "subf128.round.to.odd" => "__builtin_subf128_round_to_odd",
+                    "sync" => "__builtin_ppc_sync",
+                    "tabort" => "__builtin_tabort",
+                    "tabortdc" => "__builtin_tabortdc",
+                    "tabortdci" => "__builtin_tabortdci",
+                    "tabortwc" => "__builtin_tabortwc",
+                    "tabortwci" => "__builtin_tabortwci",
+                    "tbegin" => "__builtin_tbegin",
+                    "tcheck" => "__builtin_tcheck",
+                    "tdw" => "__builtin_ppc_tdw",
+                    "tend" => "__builtin_tend",
+                    "tendall" => "__builtin_tendall",
+                    "trap" => "__builtin_ppc_trap",
+                    "trapd" => "__builtin_ppc_trapd",
+                    "trechkpt" => "__builtin_trechkpt",
+                    "treclaim" => "__builtin_treclaim",
+                    "tresume" => "__builtin_tresume",
+                    "truncf128.round.to.odd" => "__builtin_truncf128_round_to_odd",
+                    "tsr" => "__builtin_tsr",
+                    "tsuspend" => "__builtin_tsuspend",
+                    "ttest" => "__builtin_ttest",
+                    "tw" => "__builtin_ppc_tw",
+                    "unpack.longdouble" => "__builtin_unpack_longdouble",
+                    "vsx.xsmaxdp" => "__builtin_vsx_xsmaxdp",
+                    "vsx.xsmindp" => "__builtin_vsx_xsmindp",
+                    "vsx.xvcmpeqdp" => "__builtin_vsx_xvcmpeqdp",
+                    "vsx.xvcmpeqdp.p" => "__builtin_vsx_xvcmpeqdp_p",
+                    "vsx.xvcmpeqsp" => "__builtin_vsx_xvcmpeqsp",
+                    "vsx.xvcmpeqsp.p" => "__builtin_vsx_xvcmpeqsp_p",
+                    "vsx.xvcmpgedp" => "__builtin_vsx_xvcmpgedp",
+                    "vsx.xvcmpgedp.p" => "__builtin_vsx_xvcmpgedp_p",
+                    "vsx.xvcmpgesp" => "__builtin_vsx_xvcmpgesp",
+                    "vsx.xvcmpgesp.p" => "__builtin_vsx_xvcmpgesp_p",
+                    "vsx.xvcmpgtdp" => "__builtin_vsx_xvcmpgtdp",
+                    "vsx.xvcmpgtdp.p" => "__builtin_vsx_xvcmpgtdp_p",
+                    "vsx.xvcmpgtsp" => "__builtin_vsx_xvcmpgtsp",
+                    "vsx.xvcmpgtsp.p" => "__builtin_vsx_xvcmpgtsp_p",
+                    "vsx.xvcvbf16spn" => "__builtin_vsx_xvcvbf16spn",
+                    "vsx.xvcvdpsp" => "__builtin_vsx_xvcvdpsp",
+                    "vsx.xvcvdpsxws" => "__builtin_vsx_xvcvdpsxws",
+                    "vsx.xvcvdpuxws" => "__builtin_vsx_xvcvdpuxws",
+                    "vsx.xvcvhpsp" => "__builtin_vsx_xvcvhpsp",
+                    "vsx.xvcvspbf16" => "__builtin_vsx_xvcvspbf16",
+                    "vsx.xvcvspdp" => "__builtin_vsx_xvcvspdp",
+                    "vsx.xvcvsphp" => "__builtin_vsx_xvcvsphp",
+                    "vsx.xvcvspsxds" => "__builtin_vsx_xvcvspsxds",
+                    "vsx.xvcvspuxds" => "__builtin_vsx_xvcvspuxds",
+                    "vsx.xvcvsxdsp" => "__builtin_vsx_xvcvsxdsp",
+                    "vsx.xvcvsxwdp" => "__builtin_vsx_xvcvsxwdp",
+                    "vsx.xvcvuxdsp" => "__builtin_vsx_xvcvuxdsp",
+                    "vsx.xvcvuxwdp" => "__builtin_vsx_xvcvuxwdp",
+                    "vsx.xvdivdp" => "__builtin_vsx_xvdivdp",
+                    "vsx.xvdivsp" => "__builtin_vsx_xvdivsp",
+                    "vsx.xviexpdp" => "__builtin_vsx_xviexpdp",
+                    "vsx.xviexpsp" => "__builtin_vsx_xviexpsp",
+                    "vsx.xvmaxdp" => "__builtin_vsx_xvmaxdp",
+                    "vsx.xvmaxsp" => "__builtin_vsx_xvmaxsp",
+                    "vsx.xvmindp" => "__builtin_vsx_xvmindp",
+                    "vsx.xvminsp" => "__builtin_vsx_xvminsp",
+                    "vsx.xvredp" => "__builtin_vsx_xvredp",
+                    "vsx.xvresp" => "__builtin_vsx_xvresp",
+                    "vsx.xvrsqrtedp" => "__builtin_vsx_xvrsqrtedp",
+                    "vsx.xvrsqrtesp" => "__builtin_vsx_xvrsqrtesp",
+                    "vsx.xvtdivdp" => "__builtin_vsx_xvtdivdp",
+                    "vsx.xvtdivsp" => "__builtin_vsx_xvtdivsp",
+                    "vsx.xvtlsbb" => "__builtin_vsx_xvtlsbb",
+                    "vsx.xvtsqrtdp" => "__builtin_vsx_xvtsqrtdp",
+                    "vsx.xvtsqrtsp" => "__builtin_vsx_xvtsqrtsp",
+                    "vsx.xvtstdcdp" => "__builtin_vsx_xvtstdcdp",
+                    "vsx.xvtstdcsp" => "__builtin_vsx_xvtstdcsp",
+                    "vsx.xvxexpdp" => "__builtin_vsx_xvxexpdp",
+                    "vsx.xvxexpsp" => "__builtin_vsx_xvxexpsp",
+                    "vsx.xvxsigdp" => "__builtin_vsx_xvxsigdp",
+                    "vsx.xvxsigsp" => "__builtin_vsx_xvxsigsp",
+                    "vsx.xxblendvb" => "__builtin_vsx_xxblendvb",
+                    "vsx.xxblendvd" => "__builtin_vsx_xxblendvd",
+                    "vsx.xxblendvh" => "__builtin_vsx_xxblendvh",
+                    "vsx.xxblendvw" => "__builtin_vsx_xxblendvw",
+                    "vsx.xxeval" => "__builtin_vsx_xxeval",
+                    "vsx.xxextractuw" => "__builtin_vsx_xxextractuw",
+                    "vsx.xxgenpcvbm" => "__builtin_vsx_xxgenpcvbm",
+                    "vsx.xxgenpcvdm" => "__builtin_vsx_xxgenpcvdm",
+                    "vsx.xxgenpcvhm" => "__builtin_vsx_xxgenpcvhm",
+                    "vsx.xxgenpcvwm" => "__builtin_vsx_xxgenpcvwm",
+                    "vsx.xxinsertw" => "__builtin_vsx_xxinsertw",
+                    "vsx.xxleqv" => "__builtin_vsx_xxleqv",
+                    "vsx.xxpermx" => "__builtin_vsx_xxpermx",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            ppc(name)
+        }
+        "ptx" => {
+            #[allow(non_snake_case)]
+            fn ptx(name: &str) -> &str {
+                match name {
+                    // ptx
+                    "bar.sync" => "__builtin_ptx_bar_sync",
+                    "read.clock" => "__builtin_ptx_read_clock",
+                    "read.clock64" => "__builtin_ptx_read_clock64",
+                    "read.gridid" => "__builtin_ptx_read_gridid",
+                    "read.laneid" => "__builtin_ptx_read_laneid",
+                    "read.lanemask.eq" => "__builtin_ptx_read_lanemask_eq",
+                    "read.lanemask.ge" => "__builtin_ptx_read_lanemask_ge",
+                    "read.lanemask.gt" => "__builtin_ptx_read_lanemask_gt",
+                    "read.lanemask.le" => "__builtin_ptx_read_lanemask_le",
+                    "read.lanemask.lt" => "__builtin_ptx_read_lanemask_lt",
+                    "read.nsmid" => "__builtin_ptx_read_nsmid",
+                    "read.nwarpid" => "__builtin_ptx_read_nwarpid",
+                    "read.pm0" => "__builtin_ptx_read_pm0",
+                    "read.pm1" => "__builtin_ptx_read_pm1",
+                    "read.pm2" => "__builtin_ptx_read_pm2",
+                    "read.pm3" => "__builtin_ptx_read_pm3",
+                    "read.smid" => "__builtin_ptx_read_smid",
+                    "read.warpid" => "__builtin_ptx_read_warpid",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            ptx(name)
+        }
+        "r600" => {
+            #[allow(non_snake_case)]
+            fn r600(name: &str) -> &str {
+                match name {
+                    // r600
+                    "group.barrier" => "__builtin_r600_group_barrier",
+                    "implicitarg.ptr" => "__builtin_r600_implicitarg_ptr",
+                    "rat.store.typed" => "__builtin_r600_rat_store_typed",
+                    "read.global.size.x" => "__builtin_r600_read_global_size_x",
+                    "read.global.size.y" => "__builtin_r600_read_global_size_y",
+                    "read.global.size.z" => "__builtin_r600_read_global_size_z",
+                    "read.ngroups.x" => "__builtin_r600_read_ngroups_x",
+                    "read.ngroups.y" => "__builtin_r600_read_ngroups_y",
+                    "read.ngroups.z" => "__builtin_r600_read_ngroups_z",
+                    "read.tgid.x" => "__builtin_r600_read_tgid_x",
+                    "read.tgid.y" => "__builtin_r600_read_tgid_y",
+                    "read.tgid.z" => "__builtin_r600_read_tgid_z",
+                    "read.tidig.x" => "__builtin_r600_read_tidig_x",
+                    "read.tidig.y" => "__builtin_r600_read_tidig_y",
+                    "read.tidig.z" => "__builtin_r600_read_tidig_z",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            r600(name)
+        }
+        "riscv" => {
+            #[allow(non_snake_case)]
+            fn riscv(name: &str) -> &str {
+                match name {
+                    // riscv
+                    "aes32dsi" => "__builtin_riscv_aes32dsi",
+                    "aes32dsmi" => "__builtin_riscv_aes32dsmi",
+                    "aes32esi" => "__builtin_riscv_aes32esi",
+                    "aes32esmi" => "__builtin_riscv_aes32esmi",
+                    "aes64ds" => "__builtin_riscv_aes64ds",
+                    "aes64dsm" => "__builtin_riscv_aes64dsm",
+                    "aes64es" => "__builtin_riscv_aes64es",
+                    "aes64esm" => "__builtin_riscv_aes64esm",
+                    "aes64im" => "__builtin_riscv_aes64im",
+                    "aes64ks1i" => "__builtin_riscv_aes64ks1i",
+                    "aes64ks2" => "__builtin_riscv_aes64ks2",
+                    "sha512sig0" => "__builtin_riscv_sha512sig0",
+                    "sha512sig0h" => "__builtin_riscv_sha512sig0h",
+                    "sha512sig0l" => "__builtin_riscv_sha512sig0l",
+                    "sha512sig1" => "__builtin_riscv_sha512sig1",
+                    "sha512sig1h" => "__builtin_riscv_sha512sig1h",
+                    "sha512sig1l" => "__builtin_riscv_sha512sig1l",
+                    "sha512sum0" => "__builtin_riscv_sha512sum0",
+                    "sha512sum0r" => "__builtin_riscv_sha512sum0r",
+                    "sha512sum1" => "__builtin_riscv_sha512sum1",
+                    "sha512sum1r" => "__builtin_riscv_sha512sum1r",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            riscv(name)
+        }
+        "s390" => {
+            #[allow(non_snake_case)]
+            fn s390(name: &str) -> &str {
+                match name {
+                    // s390
+                    "bdepg" => "__builtin_s390_bdepg",
+                    "bextg" => "__builtin_s390_bextg",
+                    "efpc" => "__builtin_s390_efpc",
+                    "etnd" => "__builtin_tx_nesting_depth",
+                    "lcbb" => "__builtin_s390_lcbb",
+                    "ppa.txassist" => "__builtin_tx_assist",
+                    "sfpc" => "__builtin_s390_sfpc",
+                    "tend" => "__builtin_tend",
+                    "vaccb" => "__builtin_s390_vaccb",
+                    "vacccq" => "__builtin_s390_vacccq",
+                    "vaccf" => "__builtin_s390_vaccf",
+                    "vaccg" => "__builtin_s390_vaccg",
+                    "vacch" => "__builtin_s390_vacch",
+                    "vaccq" => "__builtin_s390_vaccq",
+                    "vacq" => "__builtin_s390_vacq",
+                    "vaq" => "__builtin_s390_vaq",
+                    "vavgb" => "__builtin_s390_vavgb",
+                    "vavgf" => "__builtin_s390_vavgf",
+                    "vavgg" => "__builtin_s390_vavgg",
+                    "vavgh" => "__builtin_s390_vavgh",
+                    "vavglb" => "__builtin_s390_vavglb",
+                    "vavglf" => "__builtin_s390_vavglf",
+                    "vavglg" => "__builtin_s390_vavglg",
+                    "vavglh" => "__builtin_s390_vavglh",
+                    "vavglq" => "__builtin_s390_vavglq",
+                    "vavgq" => "__builtin_s390_vavgq",
+                    "vbperm" => "__builtin_s390_vbperm",
+                    "vcfn" => "__builtin_s390_vcfn",
+                    "vcksm" => "__builtin_s390_vcksm",
+                    "vclfnhs" => "__builtin_s390_vclfnhs",
+                    "vclfnls" => "__builtin_s390_vclfnls",
+                    "vcnf" => "__builtin_s390_vcnf",
+                    "vcrnfs" => "__builtin_s390_vcrnfs",
+                    "verimb" => "__builtin_s390_verimb",
+                    "verimf" => "__builtin_s390_verimf",
+                    "verimg" => "__builtin_s390_verimg",
+                    "verimh" => "__builtin_s390_verimh",
+                    "veval" => "__builtin_s390_veval",
+                    "vfaeb" => "__builtin_s390_vfaeb",
+                    "vfaef" => "__builtin_s390_vfaef",
+                    "vfaeh" => "__builtin_s390_vfaeh",
+                    "vfaezb" => "__builtin_s390_vfaezb",
+                    "vfaezf" => "__builtin_s390_vfaezf",
+                    "vfaezh" => "__builtin_s390_vfaezh",
+                    "vfeeb" => "__builtin_s390_vfeeb",
+                    "vfeef" => "__builtin_s390_vfeef",
+                    "vfeeh" => "__builtin_s390_vfeeh",
+                    "vfeezb" => "__builtin_s390_vfeezb",
+                    "vfeezf" => "__builtin_s390_vfeezf",
+                    "vfeezh" => "__builtin_s390_vfeezh",
+                    "vfeneb" => "__builtin_s390_vfeneb",
+                    "vfenef" => "__builtin_s390_vfenef",
+                    "vfeneh" => "__builtin_s390_vfeneh",
+                    "vfenezb" => "__builtin_s390_vfenezb",
+                    "vfenezf" => "__builtin_s390_vfenezf",
+                    "vfenezh" => "__builtin_s390_vfenezh",
+                    "vgemb" => "__builtin_s390_vgemb",
+                    "vgemf" => "__builtin_s390_vgemf",
+                    "vgemg" => "__builtin_s390_vgemg",
+                    "vgemh" => "__builtin_s390_vgemh",
+                    "vgemq" => "__builtin_s390_vgemq",
+                    "vgfmab" => "__builtin_s390_vgfmab",
+                    "vgfmaf" => "__builtin_s390_vgfmaf",
+                    "vgfmag" => "__builtin_s390_vgfmag",
+                    "vgfmah" => "__builtin_s390_vgfmah",
+                    "vgfmb" => "__builtin_s390_vgfmb",
+                    "vgfmf" => "__builtin_s390_vgfmf",
+                    "vgfmg" => "__builtin_s390_vgfmg",
+                    "vgfmh" => "__builtin_s390_vgfmh",
+                    "vistrb" => "__builtin_s390_vistrb",
+                    "vistrf" => "__builtin_s390_vistrf",
+                    "vistrh" => "__builtin_s390_vistrh",
+                    "vlbb" => "__builtin_s390_vlbb",
+                    "vll" => "__builtin_s390_vll",
+                    "vlrl" => "__builtin_s390_vlrlr",
+                    "vmaeb" => "__builtin_s390_vmaeb",
+                    "vmaef" => "__builtin_s390_vmaef",
+                    "vmaeg" => "__builtin_s390_vmaeg",
+                    "vmaeh" => "__builtin_s390_vmaeh",
+                    "vmahb" => "__builtin_s390_vmahb",
+                    "vmahf" => "__builtin_s390_vmahf",
+                    "vmahg" => "__builtin_s390_vmahg",
+                    "vmahh" => "__builtin_s390_vmahh",
+                    "vmahq" => "__builtin_s390_vmahq",
+                    "vmaleb" => "__builtin_s390_vmaleb",
+                    "vmalef" => "__builtin_s390_vmalef",
+                    "vmaleg" => "__builtin_s390_vmaleg",
+                    "vmaleh" => "__builtin_s390_vmaleh",
+                    "vmalhb" => "__builtin_s390_vmalhb",
+                    "vmalhf" => "__builtin_s390_vmalhf",
+                    "vmalhg" => "__builtin_s390_vmalhg",
+                    "vmalhh" => "__builtin_s390_vmalhh",
+                    "vmalhq" => "__builtin_s390_vmalhq",
+                    "vmalob" => "__builtin_s390_vmalob",
+                    "vmalof" => "__builtin_s390_vmalof",
+                    "vmalog" => "__builtin_s390_vmalog",
+                    "vmaloh" => "__builtin_s390_vmaloh",
+                    "vmaob" => "__builtin_s390_vmaob",
+                    "vmaof" => "__builtin_s390_vmaof",
+                    "vmaog" => "__builtin_s390_vmaog",
+                    "vmaoh" => "__builtin_s390_vmaoh",
+                    "vmeb" => "__builtin_s390_vmeb",
+                    "vmef" => "__builtin_s390_vmef",
+                    "vmeg" => "__builtin_s390_vmeg",
+                    "vmeh" => "__builtin_s390_vmeh",
+                    "vmhb" => "__builtin_s390_vmhb",
+                    "vmhf" => "__builtin_s390_vmhf",
+                    "vmhg" => "__builtin_s390_vmhg",
+                    "vmhh" => "__builtin_s390_vmhh",
+                    "vmhq" => "__builtin_s390_vmhq",
+                    "vmleb" => "__builtin_s390_vmleb",
+                    "vmlef" => "__builtin_s390_vmlef",
+                    "vmleg" => "__builtin_s390_vmleg",
+                    "vmleh" => "__builtin_s390_vmleh",
+                    "vmlhb" => "__builtin_s390_vmlhb",
+                    "vmlhf" => "__builtin_s390_vmlhf",
+                    "vmlhg" => "__builtin_s390_vmlhg",
+                    "vmlhh" => "__builtin_s390_vmlhh",
+                    "vmlhq" => "__builtin_s390_vmlhq",
+                    "vmlob" => "__builtin_s390_vmlob",
+                    "vmlof" => "__builtin_s390_vmlof",
+                    "vmlog" => "__builtin_s390_vmlog",
+                    "vmloh" => "__builtin_s390_vmloh",
+                    "vmob" => "__builtin_s390_vmob",
+                    "vmof" => "__builtin_s390_vmof",
+                    "vmog" => "__builtin_s390_vmog",
+                    "vmoh" => "__builtin_s390_vmoh",
+                    "vmslg" => "__builtin_s390_vmslg",
+                    "vpdi" => "__builtin_s390_vpdi",
+                    "vperm" => "__builtin_s390_vperm",
+                    "vpklsf" => "__builtin_s390_vpklsf",
+                    "vpklsg" => "__builtin_s390_vpklsg",
+                    "vpklsh" => "__builtin_s390_vpklsh",
+                    "vpksf" => "__builtin_s390_vpksf",
+                    "vpksg" => "__builtin_s390_vpksg",
+                    "vpksh" => "__builtin_s390_vpksh",
+                    "vsbcbiq" => "__builtin_s390_vsbcbiq",
+                    "vsbiq" => "__builtin_s390_vsbiq",
+                    "vscbib" => "__builtin_s390_vscbib",
+                    "vscbif" => "__builtin_s390_vscbif",
+                    "vscbig" => "__builtin_s390_vscbig",
+                    "vscbih" => "__builtin_s390_vscbih",
+                    "vscbiq" => "__builtin_s390_vscbiq",
+                    "vsl" => "__builtin_s390_vsl",
+                    "vslb" => "__builtin_s390_vslb",
+                    "vsld" => "__builtin_s390_vsld",
+                    "vsldb" => "__builtin_s390_vsldb",
+                    "vsq" => "__builtin_s390_vsq",
+                    "vsra" => "__builtin_s390_vsra",
+                    "vsrab" => "__builtin_s390_vsrab",
+                    "vsrd" => "__builtin_s390_vsrd",
+                    "vsrl" => "__builtin_s390_vsrl",
+                    "vsrlb" => "__builtin_s390_vsrlb",
+                    "vstl" => "__builtin_s390_vstl",
+                    "vstrcb" => "__builtin_s390_vstrcb",
+                    "vstrcf" => "__builtin_s390_vstrcf",
+                    "vstrch" => "__builtin_s390_vstrch",
+                    "vstrczb" => "__builtin_s390_vstrczb",
+                    "vstrczf" => "__builtin_s390_vstrczf",
+                    "vstrczh" => "__builtin_s390_vstrczh",
+                    "vstrl" => "__builtin_s390_vstrlr",
+                    "vsumb" => "__builtin_s390_vsumb",
+                    "vsumgf" => "__builtin_s390_vsumgf",
+                    "vsumgh" => "__builtin_s390_vsumgh",
+                    "vsumh" => "__builtin_s390_vsumh",
+                    "vsumqf" => "__builtin_s390_vsumqf",
+                    "vsumqg" => "__builtin_s390_vsumqg",
+                    "vtm" => "__builtin_s390_vtm",
+                    "vuphb" => "__builtin_s390_vuphb",
+                    "vuphf" => "__builtin_s390_vuphf",
+                    "vuphg" => "__builtin_s390_vuphg",
+                    "vuphh" => "__builtin_s390_vuphh",
+                    "vuplb" => "__builtin_s390_vuplb",
+                    "vuplf" => "__builtin_s390_vuplf",
+                    "vuplg" => "__builtin_s390_vuplg",
+                    "vuplhb" => "__builtin_s390_vuplhb",
+                    "vuplhf" => "__builtin_s390_vuplhf",
+                    "vuplhg" => "__builtin_s390_vuplhg",
+                    "vuplhh" => "__builtin_s390_vuplhh",
+                    "vuplhw" => "__builtin_s390_vuplhw",
+                    "vupllb" => "__builtin_s390_vupllb",
+                    "vupllf" => "__builtin_s390_vupllf",
+                    "vupllg" => "__builtin_s390_vupllg",
+                    "vupllh" => "__builtin_s390_vupllh",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            s390(name)
+        }
+        "ve" => {
+            #[allow(non_snake_case)]
+            fn ve(name: &str) -> &str {
+                match name {
+                    // ve
+                    "vl.andm.MMM" => "__builtin_ve_vl_andm_MMM",
+                    "vl.andm.mmm" => "__builtin_ve_vl_andm_mmm",
+                    "vl.eqvm.MMM" => "__builtin_ve_vl_eqvm_MMM",
+                    "vl.eqvm.mmm" => "__builtin_ve_vl_eqvm_mmm",
+                    "vl.extract.vm512l" => "__builtin_ve_vl_extract_vm512l",
+                    "vl.extract.vm512u" => "__builtin_ve_vl_extract_vm512u",
+                    "vl.fencec.s" => "__builtin_ve_vl_fencec_s",
+                    "vl.fencei" => "__builtin_ve_vl_fencei",
+                    "vl.fencem.s" => "__builtin_ve_vl_fencem_s",
+                    "vl.fidcr.sss" => "__builtin_ve_vl_fidcr_sss",
+                    "vl.insert.vm512l" => "__builtin_ve_vl_insert_vm512l",
+                    "vl.insert.vm512u" => "__builtin_ve_vl_insert_vm512u",
+                    "vl.lcr.sss" => "__builtin_ve_vl_lcr_sss",
+                    "vl.lsv.vvss" => "__builtin_ve_vl_lsv_vvss",
+                    "vl.lvm.MMss" => "__builtin_ve_vl_lvm_MMss",
+                    "vl.lvm.mmss" => "__builtin_ve_vl_lvm_mmss",
+                    "vl.lvsd.svs" => "__builtin_ve_vl_lvsd_svs",
+                    "vl.lvsl.svs" => "__builtin_ve_vl_lvsl_svs",
+                    "vl.lvss.svs" => "__builtin_ve_vl_lvss_svs",
+                    "vl.lzvm.sml" => "__builtin_ve_vl_lzvm_sml",
+                    "vl.negm.MM" => "__builtin_ve_vl_negm_MM",
+                    "vl.negm.mm" => "__builtin_ve_vl_negm_mm",
+                    "vl.nndm.MMM" => "__builtin_ve_vl_nndm_MMM",
+                    "vl.nndm.mmm" => "__builtin_ve_vl_nndm_mmm",
+                    "vl.orm.MMM" => "__builtin_ve_vl_orm_MMM",
+                    "vl.orm.mmm" => "__builtin_ve_vl_orm_mmm",
+                    "vl.pack.f32a" => "__builtin_ve_vl_pack_f32a",
+                    "vl.pack.f32p" => "__builtin_ve_vl_pack_f32p",
+                    "vl.pcvm.sml" => "__builtin_ve_vl_pcvm_sml",
+                    "vl.pfchv.ssl" => "__builtin_ve_vl_pfchv_ssl",
+                    "vl.pfchvnc.ssl" => "__builtin_ve_vl_pfchvnc_ssl",
+                    "vl.pvadds.vsvMvl" => "__builtin_ve_vl_pvadds_vsvMvl",
+                    "vl.pvadds.vsvl" => "__builtin_ve_vl_pvadds_vsvl",
+                    "vl.pvadds.vsvvl" => "__builtin_ve_vl_pvadds_vsvvl",
+                    "vl.pvadds.vvvMvl" => "__builtin_ve_vl_pvadds_vvvMvl",
+                    "vl.pvadds.vvvl" => "__builtin_ve_vl_pvadds_vvvl",
+                    "vl.pvadds.vvvvl" => "__builtin_ve_vl_pvadds_vvvvl",
+                    "vl.pvaddu.vsvMvl" => "__builtin_ve_vl_pvaddu_vsvMvl",
+                    "vl.pvaddu.vsvl" => "__builtin_ve_vl_pvaddu_vsvl",
+                    "vl.pvaddu.vsvvl" => "__builtin_ve_vl_pvaddu_vsvvl",
+                    "vl.pvaddu.vvvMvl" => "__builtin_ve_vl_pvaddu_vvvMvl",
+                    "vl.pvaddu.vvvl" => "__builtin_ve_vl_pvaddu_vvvl",
+                    "vl.pvaddu.vvvvl" => "__builtin_ve_vl_pvaddu_vvvvl",
+                    "vl.pvand.vsvMvl" => "__builtin_ve_vl_pvand_vsvMvl",
+                    "vl.pvand.vsvl" => "__builtin_ve_vl_pvand_vsvl",
+                    "vl.pvand.vsvvl" => "__builtin_ve_vl_pvand_vsvvl",
+                    "vl.pvand.vvvMvl" => "__builtin_ve_vl_pvand_vvvMvl",
+                    "vl.pvand.vvvl" => "__builtin_ve_vl_pvand_vvvl",
+                    "vl.pvand.vvvvl" => "__builtin_ve_vl_pvand_vvvvl",
+                    "vl.pvbrd.vsMvl" => "__builtin_ve_vl_pvbrd_vsMvl",
+                    "vl.pvbrd.vsl" => "__builtin_ve_vl_pvbrd_vsl",
+                    "vl.pvbrd.vsvl" => "__builtin_ve_vl_pvbrd_vsvl",
+                    "vl.pvbrv.vvMvl" => "__builtin_ve_vl_pvbrv_vvMvl",
+                    "vl.pvbrv.vvl" => "__builtin_ve_vl_pvbrv_vvl",
+                    "vl.pvbrv.vvvl" => "__builtin_ve_vl_pvbrv_vvvl",
+                    "vl.pvbrvlo.vvl" => "__builtin_ve_vl_pvbrvlo_vvl",
+                    "vl.pvbrvlo.vvmvl" => "__builtin_ve_vl_pvbrvlo_vvmvl",
+                    "vl.pvbrvlo.vvvl" => "__builtin_ve_vl_pvbrvlo_vvvl",
+                    "vl.pvbrvup.vvl" => "__builtin_ve_vl_pvbrvup_vvl",
+                    "vl.pvbrvup.vvmvl" => "__builtin_ve_vl_pvbrvup_vvmvl",
+                    "vl.pvbrvup.vvvl" => "__builtin_ve_vl_pvbrvup_vvvl",
+                    "vl.pvcmps.vsvMvl" => "__builtin_ve_vl_pvcmps_vsvMvl",
+                    "vl.pvcmps.vsvl" => "__builtin_ve_vl_pvcmps_vsvl",
+                    "vl.pvcmps.vsvvl" => "__builtin_ve_vl_pvcmps_vsvvl",
+                    "vl.pvcmps.vvvMvl" => "__builtin_ve_vl_pvcmps_vvvMvl",
+                    "vl.pvcmps.vvvl" => "__builtin_ve_vl_pvcmps_vvvl",
+                    "vl.pvcmps.vvvvl" => "__builtin_ve_vl_pvcmps_vvvvl",
+                    "vl.pvcmpu.vsvMvl" => "__builtin_ve_vl_pvcmpu_vsvMvl",
+                    "vl.pvcmpu.vsvl" => "__builtin_ve_vl_pvcmpu_vsvl",
+                    "vl.pvcmpu.vsvvl" => "__builtin_ve_vl_pvcmpu_vsvvl",
+                    "vl.pvcmpu.vvvMvl" => "__builtin_ve_vl_pvcmpu_vvvMvl",
+                    "vl.pvcmpu.vvvl" => "__builtin_ve_vl_pvcmpu_vvvl",
+                    "vl.pvcmpu.vvvvl" => "__builtin_ve_vl_pvcmpu_vvvvl",
+                    "vl.pvcvtsw.vvl" => "__builtin_ve_vl_pvcvtsw_vvl",
+                    "vl.pvcvtsw.vvvl" => "__builtin_ve_vl_pvcvtsw_vvvl",
+                    "vl.pvcvtws.vvMvl" => "__builtin_ve_vl_pvcvtws_vvMvl",
+                    "vl.pvcvtws.vvl" => "__builtin_ve_vl_pvcvtws_vvl",
+                    "vl.pvcvtws.vvvl" => "__builtin_ve_vl_pvcvtws_vvvl",
+                    "vl.pvcvtwsrz.vvMvl" => "__builtin_ve_vl_pvcvtwsrz_vvMvl",
+                    "vl.pvcvtwsrz.vvl" => "__builtin_ve_vl_pvcvtwsrz_vvl",
+                    "vl.pvcvtwsrz.vvvl" => "__builtin_ve_vl_pvcvtwsrz_vvvl",
+                    "vl.pveqv.vsvMvl" => "__builtin_ve_vl_pveqv_vsvMvl",
+                    "vl.pveqv.vsvl" => "__builtin_ve_vl_pveqv_vsvl",
+                    "vl.pveqv.vsvvl" => "__builtin_ve_vl_pveqv_vsvvl",
+                    "vl.pveqv.vvvMvl" => "__builtin_ve_vl_pveqv_vvvMvl",
+                    "vl.pveqv.vvvl" => "__builtin_ve_vl_pveqv_vvvl",
+                    "vl.pveqv.vvvvl" => "__builtin_ve_vl_pveqv_vvvvl",
+                    "vl.pvfadd.vsvMvl" => "__builtin_ve_vl_pvfadd_vsvMvl",
+                    "vl.pvfadd.vsvl" => "__builtin_ve_vl_pvfadd_vsvl",
+                    "vl.pvfadd.vsvvl" => "__builtin_ve_vl_pvfadd_vsvvl",
+                    "vl.pvfadd.vvvMvl" => "__builtin_ve_vl_pvfadd_vvvMvl",
+                    "vl.pvfadd.vvvl" => "__builtin_ve_vl_pvfadd_vvvl",
+                    "vl.pvfadd.vvvvl" => "__builtin_ve_vl_pvfadd_vvvvl",
+                    "vl.pvfcmp.vsvMvl" => "__builtin_ve_vl_pvfcmp_vsvMvl",
+                    "vl.pvfcmp.vsvl" => "__builtin_ve_vl_pvfcmp_vsvl",
+                    "vl.pvfcmp.vsvvl" => "__builtin_ve_vl_pvfcmp_vsvvl",
+                    "vl.pvfcmp.vvvMvl" => "__builtin_ve_vl_pvfcmp_vvvMvl",
+                    "vl.pvfcmp.vvvl" => "__builtin_ve_vl_pvfcmp_vvvl",
+                    "vl.pvfcmp.vvvvl" => "__builtin_ve_vl_pvfcmp_vvvvl",
+                    "vl.pvfmad.vsvvMvl" => "__builtin_ve_vl_pvfmad_vsvvMvl",
+                    "vl.pvfmad.vsvvl" => "__builtin_ve_vl_pvfmad_vsvvl",
+                    "vl.pvfmad.vsvvvl" => "__builtin_ve_vl_pvfmad_vsvvvl",
+                    "vl.pvfmad.vvsvMvl" => "__builtin_ve_vl_pvfmad_vvsvMvl",
+                    "vl.pvfmad.vvsvl" => "__builtin_ve_vl_pvfmad_vvsvl",
+                    "vl.pvfmad.vvsvvl" => "__builtin_ve_vl_pvfmad_vvsvvl",
+                    "vl.pvfmad.vvvvMvl" => "__builtin_ve_vl_pvfmad_vvvvMvl",
+                    "vl.pvfmad.vvvvl" => "__builtin_ve_vl_pvfmad_vvvvl",
+                    "vl.pvfmad.vvvvvl" => "__builtin_ve_vl_pvfmad_vvvvvl",
+                    "vl.pvfmax.vsvMvl" => "__builtin_ve_vl_pvfmax_vsvMvl",
+                    "vl.pvfmax.vsvl" => "__builtin_ve_vl_pvfmax_vsvl",
+                    "vl.pvfmax.vsvvl" => "__builtin_ve_vl_pvfmax_vsvvl",
+                    "vl.pvfmax.vvvMvl" => "__builtin_ve_vl_pvfmax_vvvMvl",
+                    "vl.pvfmax.vvvl" => "__builtin_ve_vl_pvfmax_vvvl",
+                    "vl.pvfmax.vvvvl" => "__builtin_ve_vl_pvfmax_vvvvl",
+                    "vl.pvfmin.vsvMvl" => "__builtin_ve_vl_pvfmin_vsvMvl",
+                    "vl.pvfmin.vsvl" => "__builtin_ve_vl_pvfmin_vsvl",
+                    "vl.pvfmin.vsvvl" => "__builtin_ve_vl_pvfmin_vsvvl",
+                    "vl.pvfmin.vvvMvl" => "__builtin_ve_vl_pvfmin_vvvMvl",
+                    "vl.pvfmin.vvvl" => "__builtin_ve_vl_pvfmin_vvvl",
+                    "vl.pvfmin.vvvvl" => "__builtin_ve_vl_pvfmin_vvvvl",
+                    "vl.pvfmkaf.Ml" => "__builtin_ve_vl_pvfmkaf_Ml",
+                    "vl.pvfmkat.Ml" => "__builtin_ve_vl_pvfmkat_Ml",
+                    "vl.pvfmkseq.MvMl" => "__builtin_ve_vl_pvfmkseq_MvMl",
+                    "vl.pvfmkseq.Mvl" => "__builtin_ve_vl_pvfmkseq_Mvl",
+                    "vl.pvfmkseqnan.MvMl" => "__builtin_ve_vl_pvfmkseqnan_MvMl",
+                    "vl.pvfmkseqnan.Mvl" => "__builtin_ve_vl_pvfmkseqnan_Mvl",
+                    "vl.pvfmksge.MvMl" => "__builtin_ve_vl_pvfmksge_MvMl",
+                    "vl.pvfmksge.Mvl" => "__builtin_ve_vl_pvfmksge_Mvl",
+                    "vl.pvfmksgenan.MvMl" => "__builtin_ve_vl_pvfmksgenan_MvMl",
+                    "vl.pvfmksgenan.Mvl" => "__builtin_ve_vl_pvfmksgenan_Mvl",
+                    "vl.pvfmksgt.MvMl" => "__builtin_ve_vl_pvfmksgt_MvMl",
+                    "vl.pvfmksgt.Mvl" => "__builtin_ve_vl_pvfmksgt_Mvl",
+                    "vl.pvfmksgtnan.MvMl" => "__builtin_ve_vl_pvfmksgtnan_MvMl",
+                    "vl.pvfmksgtnan.Mvl" => "__builtin_ve_vl_pvfmksgtnan_Mvl",
+                    "vl.pvfmksle.MvMl" => "__builtin_ve_vl_pvfmksle_MvMl",
+                    "vl.pvfmksle.Mvl" => "__builtin_ve_vl_pvfmksle_Mvl",
+                    "vl.pvfmkslenan.MvMl" => "__builtin_ve_vl_pvfmkslenan_MvMl",
+                    "vl.pvfmkslenan.Mvl" => "__builtin_ve_vl_pvfmkslenan_Mvl",
+                    "vl.pvfmksloeq.mvl" => "__builtin_ve_vl_pvfmksloeq_mvl",
+                    "vl.pvfmksloeq.mvml" => "__builtin_ve_vl_pvfmksloeq_mvml",
+                    "vl.pvfmksloeqnan.mvl" => "__builtin_ve_vl_pvfmksloeqnan_mvl",
+                    "vl.pvfmksloeqnan.mvml" => "__builtin_ve_vl_pvfmksloeqnan_mvml",
+                    "vl.pvfmksloge.mvl" => "__builtin_ve_vl_pvfmksloge_mvl",
+                    "vl.pvfmksloge.mvml" => "__builtin_ve_vl_pvfmksloge_mvml",
+                    "vl.pvfmkslogenan.mvl" => "__builtin_ve_vl_pvfmkslogenan_mvl",
+                    "vl.pvfmkslogenan.mvml" => "__builtin_ve_vl_pvfmkslogenan_mvml",
+                    "vl.pvfmkslogt.mvl" => "__builtin_ve_vl_pvfmkslogt_mvl",
+                    "vl.pvfmkslogt.mvml" => "__builtin_ve_vl_pvfmkslogt_mvml",
+                    "vl.pvfmkslogtnan.mvl" => "__builtin_ve_vl_pvfmkslogtnan_mvl",
+                    "vl.pvfmkslogtnan.mvml" => "__builtin_ve_vl_pvfmkslogtnan_mvml",
+                    "vl.pvfmkslole.mvl" => "__builtin_ve_vl_pvfmkslole_mvl",
+                    "vl.pvfmkslole.mvml" => "__builtin_ve_vl_pvfmkslole_mvml",
+                    "vl.pvfmkslolenan.mvl" => "__builtin_ve_vl_pvfmkslolenan_mvl",
+                    "vl.pvfmkslolenan.mvml" => "__builtin_ve_vl_pvfmkslolenan_mvml",
+                    "vl.pvfmkslolt.mvl" => "__builtin_ve_vl_pvfmkslolt_mvl",
+                    "vl.pvfmkslolt.mvml" => "__builtin_ve_vl_pvfmkslolt_mvml",
+                    "vl.pvfmksloltnan.mvl" => "__builtin_ve_vl_pvfmksloltnan_mvl",
+                    "vl.pvfmksloltnan.mvml" => "__builtin_ve_vl_pvfmksloltnan_mvml",
+                    "vl.pvfmkslonan.mvl" => "__builtin_ve_vl_pvfmkslonan_mvl",
+                    "vl.pvfmkslonan.mvml" => "__builtin_ve_vl_pvfmkslonan_mvml",
+                    "vl.pvfmkslone.mvl" => "__builtin_ve_vl_pvfmkslone_mvl",
+                    "vl.pvfmkslone.mvml" => "__builtin_ve_vl_pvfmkslone_mvml",
+                    "vl.pvfmkslonenan.mvl" => "__builtin_ve_vl_pvfmkslonenan_mvl",
+                    "vl.pvfmkslonenan.mvml" => "__builtin_ve_vl_pvfmkslonenan_mvml",
+                    "vl.pvfmkslonum.mvl" => "__builtin_ve_vl_pvfmkslonum_mvl",
+                    "vl.pvfmkslonum.mvml" => "__builtin_ve_vl_pvfmkslonum_mvml",
+                    "vl.pvfmkslt.MvMl" => "__builtin_ve_vl_pvfmkslt_MvMl",
+                    "vl.pvfmkslt.Mvl" => "__builtin_ve_vl_pvfmkslt_Mvl",
+                    "vl.pvfmksltnan.MvMl" => "__builtin_ve_vl_pvfmksltnan_MvMl",
+                    "vl.pvfmksltnan.Mvl" => "__builtin_ve_vl_pvfmksltnan_Mvl",
+                    "vl.pvfmksnan.MvMl" => "__builtin_ve_vl_pvfmksnan_MvMl",
+                    "vl.pvfmksnan.Mvl" => "__builtin_ve_vl_pvfmksnan_Mvl",
+                    "vl.pvfmksne.MvMl" => "__builtin_ve_vl_pvfmksne_MvMl",
+                    "vl.pvfmksne.Mvl" => "__builtin_ve_vl_pvfmksne_Mvl",
+                    "vl.pvfmksnenan.MvMl" => "__builtin_ve_vl_pvfmksnenan_MvMl",
+                    "vl.pvfmksnenan.Mvl" => "__builtin_ve_vl_pvfmksnenan_Mvl",
+                    "vl.pvfmksnum.MvMl" => "__builtin_ve_vl_pvfmksnum_MvMl",
+                    "vl.pvfmksnum.Mvl" => "__builtin_ve_vl_pvfmksnum_Mvl",
+                    "vl.pvfmksupeq.mvl" => "__builtin_ve_vl_pvfmksupeq_mvl",
+                    "vl.pvfmksupeq.mvml" => "__builtin_ve_vl_pvfmksupeq_mvml",
+                    "vl.pvfmksupeqnan.mvl" => "__builtin_ve_vl_pvfmksupeqnan_mvl",
+                    "vl.pvfmksupeqnan.mvml" => "__builtin_ve_vl_pvfmksupeqnan_mvml",
+                    "vl.pvfmksupge.mvl" => "__builtin_ve_vl_pvfmksupge_mvl",
+                    "vl.pvfmksupge.mvml" => "__builtin_ve_vl_pvfmksupge_mvml",
+                    "vl.pvfmksupgenan.mvl" => "__builtin_ve_vl_pvfmksupgenan_mvl",
+                    "vl.pvfmksupgenan.mvml" => "__builtin_ve_vl_pvfmksupgenan_mvml",
+                    "vl.pvfmksupgt.mvl" => "__builtin_ve_vl_pvfmksupgt_mvl",
+                    "vl.pvfmksupgt.mvml" => "__builtin_ve_vl_pvfmksupgt_mvml",
+                    "vl.pvfmksupgtnan.mvl" => "__builtin_ve_vl_pvfmksupgtnan_mvl",
+                    "vl.pvfmksupgtnan.mvml" => "__builtin_ve_vl_pvfmksupgtnan_mvml",
+                    "vl.pvfmksuple.mvl" => "__builtin_ve_vl_pvfmksuple_mvl",
+                    "vl.pvfmksuple.mvml" => "__builtin_ve_vl_pvfmksuple_mvml",
+                    "vl.pvfmksuplenan.mvl" => "__builtin_ve_vl_pvfmksuplenan_mvl",
+                    "vl.pvfmksuplenan.mvml" => "__builtin_ve_vl_pvfmksuplenan_mvml",
+                    "vl.pvfmksuplt.mvl" => "__builtin_ve_vl_pvfmksuplt_mvl",
+                    "vl.pvfmksuplt.mvml" => "__builtin_ve_vl_pvfmksuplt_mvml",
+                    "vl.pvfmksupltnan.mvl" => "__builtin_ve_vl_pvfmksupltnan_mvl",
+                    "vl.pvfmksupltnan.mvml" => "__builtin_ve_vl_pvfmksupltnan_mvml",
+                    "vl.pvfmksupnan.mvl" => "__builtin_ve_vl_pvfmksupnan_mvl",
+                    "vl.pvfmksupnan.mvml" => "__builtin_ve_vl_pvfmksupnan_mvml",
+                    "vl.pvfmksupne.mvl" => "__builtin_ve_vl_pvfmksupne_mvl",
+                    "vl.pvfmksupne.mvml" => "__builtin_ve_vl_pvfmksupne_mvml",
+                    "vl.pvfmksupnenan.mvl" => "__builtin_ve_vl_pvfmksupnenan_mvl",
+                    "vl.pvfmksupnenan.mvml" => "__builtin_ve_vl_pvfmksupnenan_mvml",
+                    "vl.pvfmksupnum.mvl" => "__builtin_ve_vl_pvfmksupnum_mvl",
+                    "vl.pvfmksupnum.mvml" => "__builtin_ve_vl_pvfmksupnum_mvml",
+                    "vl.pvfmkweq.MvMl" => "__builtin_ve_vl_pvfmkweq_MvMl",
+                    "vl.pvfmkweq.Mvl" => "__builtin_ve_vl_pvfmkweq_Mvl",
+                    "vl.pvfmkweqnan.MvMl" => "__builtin_ve_vl_pvfmkweqnan_MvMl",
+                    "vl.pvfmkweqnan.Mvl" => "__builtin_ve_vl_pvfmkweqnan_Mvl",
+                    "vl.pvfmkwge.MvMl" => "__builtin_ve_vl_pvfmkwge_MvMl",
+                    "vl.pvfmkwge.Mvl" => "__builtin_ve_vl_pvfmkwge_Mvl",
+                    "vl.pvfmkwgenan.MvMl" => "__builtin_ve_vl_pvfmkwgenan_MvMl",
+                    "vl.pvfmkwgenan.Mvl" => "__builtin_ve_vl_pvfmkwgenan_Mvl",
+                    "vl.pvfmkwgt.MvMl" => "__builtin_ve_vl_pvfmkwgt_MvMl",
+                    "vl.pvfmkwgt.Mvl" => "__builtin_ve_vl_pvfmkwgt_Mvl",
+                    "vl.pvfmkwgtnan.MvMl" => "__builtin_ve_vl_pvfmkwgtnan_MvMl",
+                    "vl.pvfmkwgtnan.Mvl" => "__builtin_ve_vl_pvfmkwgtnan_Mvl",
+                    "vl.pvfmkwle.MvMl" => "__builtin_ve_vl_pvfmkwle_MvMl",
+                    "vl.pvfmkwle.Mvl" => "__builtin_ve_vl_pvfmkwle_Mvl",
+                    "vl.pvfmkwlenan.MvMl" => "__builtin_ve_vl_pvfmkwlenan_MvMl",
+                    "vl.pvfmkwlenan.Mvl" => "__builtin_ve_vl_pvfmkwlenan_Mvl",
+                    "vl.pvfmkwloeq.mvl" => "__builtin_ve_vl_pvfmkwloeq_mvl",
+                    "vl.pvfmkwloeq.mvml" => "__builtin_ve_vl_pvfmkwloeq_mvml",
+                    "vl.pvfmkwloeqnan.mvl" => "__builtin_ve_vl_pvfmkwloeqnan_mvl",
+                    "vl.pvfmkwloeqnan.mvml" => "__builtin_ve_vl_pvfmkwloeqnan_mvml",
+                    "vl.pvfmkwloge.mvl" => "__builtin_ve_vl_pvfmkwloge_mvl",
+                    "vl.pvfmkwloge.mvml" => "__builtin_ve_vl_pvfmkwloge_mvml",
+                    "vl.pvfmkwlogenan.mvl" => "__builtin_ve_vl_pvfmkwlogenan_mvl",
+                    "vl.pvfmkwlogenan.mvml" => "__builtin_ve_vl_pvfmkwlogenan_mvml",
+                    "vl.pvfmkwlogt.mvl" => "__builtin_ve_vl_pvfmkwlogt_mvl",
+                    "vl.pvfmkwlogt.mvml" => "__builtin_ve_vl_pvfmkwlogt_mvml",
+                    "vl.pvfmkwlogtnan.mvl" => "__builtin_ve_vl_pvfmkwlogtnan_mvl",
+                    "vl.pvfmkwlogtnan.mvml" => "__builtin_ve_vl_pvfmkwlogtnan_mvml",
+                    "vl.pvfmkwlole.mvl" => "__builtin_ve_vl_pvfmkwlole_mvl",
+                    "vl.pvfmkwlole.mvml" => "__builtin_ve_vl_pvfmkwlole_mvml",
+                    "vl.pvfmkwlolenan.mvl" => "__builtin_ve_vl_pvfmkwlolenan_mvl",
+                    "vl.pvfmkwlolenan.mvml" => "__builtin_ve_vl_pvfmkwlolenan_mvml",
+                    "vl.pvfmkwlolt.mvl" => "__builtin_ve_vl_pvfmkwlolt_mvl",
+                    "vl.pvfmkwlolt.mvml" => "__builtin_ve_vl_pvfmkwlolt_mvml",
+                    "vl.pvfmkwloltnan.mvl" => "__builtin_ve_vl_pvfmkwloltnan_mvl",
+                    "vl.pvfmkwloltnan.mvml" => "__builtin_ve_vl_pvfmkwloltnan_mvml",
+                    "vl.pvfmkwlonan.mvl" => "__builtin_ve_vl_pvfmkwlonan_mvl",
+                    "vl.pvfmkwlonan.mvml" => "__builtin_ve_vl_pvfmkwlonan_mvml",
+                    "vl.pvfmkwlone.mvl" => "__builtin_ve_vl_pvfmkwlone_mvl",
+                    "vl.pvfmkwlone.mvml" => "__builtin_ve_vl_pvfmkwlone_mvml",
+                    "vl.pvfmkwlonenan.mvl" => "__builtin_ve_vl_pvfmkwlonenan_mvl",
+                    "vl.pvfmkwlonenan.mvml" => "__builtin_ve_vl_pvfmkwlonenan_mvml",
+                    "vl.pvfmkwlonum.mvl" => "__builtin_ve_vl_pvfmkwlonum_mvl",
+                    "vl.pvfmkwlonum.mvml" => "__builtin_ve_vl_pvfmkwlonum_mvml",
+                    "vl.pvfmkwlt.MvMl" => "__builtin_ve_vl_pvfmkwlt_MvMl",
+                    "vl.pvfmkwlt.Mvl" => "__builtin_ve_vl_pvfmkwlt_Mvl",
+                    "vl.pvfmkwltnan.MvMl" => "__builtin_ve_vl_pvfmkwltnan_MvMl",
+                    "vl.pvfmkwltnan.Mvl" => "__builtin_ve_vl_pvfmkwltnan_Mvl",
+                    "vl.pvfmkwnan.MvMl" => "__builtin_ve_vl_pvfmkwnan_MvMl",
+                    "vl.pvfmkwnan.Mvl" => "__builtin_ve_vl_pvfmkwnan_Mvl",
+                    "vl.pvfmkwne.MvMl" => "__builtin_ve_vl_pvfmkwne_MvMl",
+                    "vl.pvfmkwne.Mvl" => "__builtin_ve_vl_pvfmkwne_Mvl",
+                    "vl.pvfmkwnenan.MvMl" => "__builtin_ve_vl_pvfmkwnenan_MvMl",
+                    "vl.pvfmkwnenan.Mvl" => "__builtin_ve_vl_pvfmkwnenan_Mvl",
+                    "vl.pvfmkwnum.MvMl" => "__builtin_ve_vl_pvfmkwnum_MvMl",
+                    "vl.pvfmkwnum.Mvl" => "__builtin_ve_vl_pvfmkwnum_Mvl",
+                    "vl.pvfmkwupeq.mvl" => "__builtin_ve_vl_pvfmkwupeq_mvl",
+                    "vl.pvfmkwupeq.mvml" => "__builtin_ve_vl_pvfmkwupeq_mvml",
+                    "vl.pvfmkwupeqnan.mvl" => "__builtin_ve_vl_pvfmkwupeqnan_mvl",
+                    "vl.pvfmkwupeqnan.mvml" => "__builtin_ve_vl_pvfmkwupeqnan_mvml",
+                    "vl.pvfmkwupge.mvl" => "__builtin_ve_vl_pvfmkwupge_mvl",
+                    "vl.pvfmkwupge.mvml" => "__builtin_ve_vl_pvfmkwupge_mvml",
+                    "vl.pvfmkwupgenan.mvl" => "__builtin_ve_vl_pvfmkwupgenan_mvl",
+                    "vl.pvfmkwupgenan.mvml" => "__builtin_ve_vl_pvfmkwupgenan_mvml",
+                    "vl.pvfmkwupgt.mvl" => "__builtin_ve_vl_pvfmkwupgt_mvl",
+                    "vl.pvfmkwupgt.mvml" => "__builtin_ve_vl_pvfmkwupgt_mvml",
+                    "vl.pvfmkwupgtnan.mvl" => "__builtin_ve_vl_pvfmkwupgtnan_mvl",
+                    "vl.pvfmkwupgtnan.mvml" => "__builtin_ve_vl_pvfmkwupgtnan_mvml",
+                    "vl.pvfmkwuple.mvl" => "__builtin_ve_vl_pvfmkwuple_mvl",
+                    "vl.pvfmkwuple.mvml" => "__builtin_ve_vl_pvfmkwuple_mvml",
+                    "vl.pvfmkwuplenan.mvl" => "__builtin_ve_vl_pvfmkwuplenan_mvl",
+                    "vl.pvfmkwuplenan.mvml" => "__builtin_ve_vl_pvfmkwuplenan_mvml",
+                    "vl.pvfmkwuplt.mvl" => "__builtin_ve_vl_pvfmkwuplt_mvl",
+                    "vl.pvfmkwuplt.mvml" => "__builtin_ve_vl_pvfmkwuplt_mvml",
+                    "vl.pvfmkwupltnan.mvl" => "__builtin_ve_vl_pvfmkwupltnan_mvl",
+                    "vl.pvfmkwupltnan.mvml" => "__builtin_ve_vl_pvfmkwupltnan_mvml",
+                    "vl.pvfmkwupnan.mvl" => "__builtin_ve_vl_pvfmkwupnan_mvl",
+                    "vl.pvfmkwupnan.mvml" => "__builtin_ve_vl_pvfmkwupnan_mvml",
+                    "vl.pvfmkwupne.mvl" => "__builtin_ve_vl_pvfmkwupne_mvl",
+                    "vl.pvfmkwupne.mvml" => "__builtin_ve_vl_pvfmkwupne_mvml",
+                    "vl.pvfmkwupnenan.mvl" => "__builtin_ve_vl_pvfmkwupnenan_mvl",
+                    "vl.pvfmkwupnenan.mvml" => "__builtin_ve_vl_pvfmkwupnenan_mvml",
+                    "vl.pvfmkwupnum.mvl" => "__builtin_ve_vl_pvfmkwupnum_mvl",
+                    "vl.pvfmkwupnum.mvml" => "__builtin_ve_vl_pvfmkwupnum_mvml",
+                    "vl.pvfmsb.vsvvMvl" => "__builtin_ve_vl_pvfmsb_vsvvMvl",
+                    "vl.pvfmsb.vsvvl" => "__builtin_ve_vl_pvfmsb_vsvvl",
+                    "vl.pvfmsb.vsvvvl" => "__builtin_ve_vl_pvfmsb_vsvvvl",
+                    "vl.pvfmsb.vvsvMvl" => "__builtin_ve_vl_pvfmsb_vvsvMvl",
+                    "vl.pvfmsb.vvsvl" => "__builtin_ve_vl_pvfmsb_vvsvl",
+                    "vl.pvfmsb.vvsvvl" => "__builtin_ve_vl_pvfmsb_vvsvvl",
+                    "vl.pvfmsb.vvvvMvl" => "__builtin_ve_vl_pvfmsb_vvvvMvl",
+                    "vl.pvfmsb.vvvvl" => "__builtin_ve_vl_pvfmsb_vvvvl",
+                    "vl.pvfmsb.vvvvvl" => "__builtin_ve_vl_pvfmsb_vvvvvl",
+                    "vl.pvfmul.vsvMvl" => "__builtin_ve_vl_pvfmul_vsvMvl",
+                    "vl.pvfmul.vsvl" => "__builtin_ve_vl_pvfmul_vsvl",
+                    "vl.pvfmul.vsvvl" => "__builtin_ve_vl_pvfmul_vsvvl",
+                    "vl.pvfmul.vvvMvl" => "__builtin_ve_vl_pvfmul_vvvMvl",
+                    "vl.pvfmul.vvvl" => "__builtin_ve_vl_pvfmul_vvvl",
+                    "vl.pvfmul.vvvvl" => "__builtin_ve_vl_pvfmul_vvvvl",
+                    "vl.pvfnmad.vsvvMvl" => "__builtin_ve_vl_pvfnmad_vsvvMvl",
+                    "vl.pvfnmad.vsvvl" => "__builtin_ve_vl_pvfnmad_vsvvl",
+                    "vl.pvfnmad.vsvvvl" => "__builtin_ve_vl_pvfnmad_vsvvvl",
+                    "vl.pvfnmad.vvsvMvl" => "__builtin_ve_vl_pvfnmad_vvsvMvl",
+                    "vl.pvfnmad.vvsvl" => "__builtin_ve_vl_pvfnmad_vvsvl",
+                    "vl.pvfnmad.vvsvvl" => "__builtin_ve_vl_pvfnmad_vvsvvl",
+                    "vl.pvfnmad.vvvvMvl" => "__builtin_ve_vl_pvfnmad_vvvvMvl",
+                    "vl.pvfnmad.vvvvl" => "__builtin_ve_vl_pvfnmad_vvvvl",
+                    "vl.pvfnmad.vvvvvl" => "__builtin_ve_vl_pvfnmad_vvvvvl",
+                    "vl.pvfnmsb.vsvvMvl" => "__builtin_ve_vl_pvfnmsb_vsvvMvl",
+                    "vl.pvfnmsb.vsvvl" => "__builtin_ve_vl_pvfnmsb_vsvvl",
+                    "vl.pvfnmsb.vsvvvl" => "__builtin_ve_vl_pvfnmsb_vsvvvl",
+                    "vl.pvfnmsb.vvsvMvl" => "__builtin_ve_vl_pvfnmsb_vvsvMvl",
+                    "vl.pvfnmsb.vvsvl" => "__builtin_ve_vl_pvfnmsb_vvsvl",
+                    "vl.pvfnmsb.vvsvvl" => "__builtin_ve_vl_pvfnmsb_vvsvvl",
+                    "vl.pvfnmsb.vvvvMvl" => "__builtin_ve_vl_pvfnmsb_vvvvMvl",
+                    "vl.pvfnmsb.vvvvl" => "__builtin_ve_vl_pvfnmsb_vvvvl",
+                    "vl.pvfnmsb.vvvvvl" => "__builtin_ve_vl_pvfnmsb_vvvvvl",
+                    "vl.pvfsub.vsvMvl" => "__builtin_ve_vl_pvfsub_vsvMvl",
+                    "vl.pvfsub.vsvl" => "__builtin_ve_vl_pvfsub_vsvl",
+                    "vl.pvfsub.vsvvl" => "__builtin_ve_vl_pvfsub_vsvvl",
+                    "vl.pvfsub.vvvMvl" => "__builtin_ve_vl_pvfsub_vvvMvl",
+                    "vl.pvfsub.vvvl" => "__builtin_ve_vl_pvfsub_vvvl",
+                    "vl.pvfsub.vvvvl" => "__builtin_ve_vl_pvfsub_vvvvl",
+                    "vl.pvldz.vvMvl" => "__builtin_ve_vl_pvldz_vvMvl",
+                    "vl.pvldz.vvl" => "__builtin_ve_vl_pvldz_vvl",
+                    "vl.pvldz.vvvl" => "__builtin_ve_vl_pvldz_vvvl",
+                    "vl.pvldzlo.vvl" => "__builtin_ve_vl_pvldzlo_vvl",
+                    "vl.pvldzlo.vvmvl" => "__builtin_ve_vl_pvldzlo_vvmvl",
+                    "vl.pvldzlo.vvvl" => "__builtin_ve_vl_pvldzlo_vvvl",
+                    "vl.pvldzup.vvl" => "__builtin_ve_vl_pvldzup_vvl",
+                    "vl.pvldzup.vvmvl" => "__builtin_ve_vl_pvldzup_vvmvl",
+                    "vl.pvldzup.vvvl" => "__builtin_ve_vl_pvldzup_vvvl",
+                    "vl.pvmaxs.vsvMvl" => "__builtin_ve_vl_pvmaxs_vsvMvl",
+                    "vl.pvmaxs.vsvl" => "__builtin_ve_vl_pvmaxs_vsvl",
+                    "vl.pvmaxs.vsvvl" => "__builtin_ve_vl_pvmaxs_vsvvl",
+                    "vl.pvmaxs.vvvMvl" => "__builtin_ve_vl_pvmaxs_vvvMvl",
+                    "vl.pvmaxs.vvvl" => "__builtin_ve_vl_pvmaxs_vvvl",
+                    "vl.pvmaxs.vvvvl" => "__builtin_ve_vl_pvmaxs_vvvvl",
+                    "vl.pvmins.vsvMvl" => "__builtin_ve_vl_pvmins_vsvMvl",
+                    "vl.pvmins.vsvl" => "__builtin_ve_vl_pvmins_vsvl",
+                    "vl.pvmins.vsvvl" => "__builtin_ve_vl_pvmins_vsvvl",
+                    "vl.pvmins.vvvMvl" => "__builtin_ve_vl_pvmins_vvvMvl",
+                    "vl.pvmins.vvvl" => "__builtin_ve_vl_pvmins_vvvl",
+                    "vl.pvmins.vvvvl" => "__builtin_ve_vl_pvmins_vvvvl",
+                    "vl.pvor.vsvMvl" => "__builtin_ve_vl_pvor_vsvMvl",
+                    "vl.pvor.vsvl" => "__builtin_ve_vl_pvor_vsvl",
+                    "vl.pvor.vsvvl" => "__builtin_ve_vl_pvor_vsvvl",
+                    "vl.pvor.vvvMvl" => "__builtin_ve_vl_pvor_vvvMvl",
+                    "vl.pvor.vvvl" => "__builtin_ve_vl_pvor_vvvl",
+                    "vl.pvor.vvvvl" => "__builtin_ve_vl_pvor_vvvvl",
+                    "vl.pvpcnt.vvMvl" => "__builtin_ve_vl_pvpcnt_vvMvl",
+                    "vl.pvpcnt.vvl" => "__builtin_ve_vl_pvpcnt_vvl",
+                    "vl.pvpcnt.vvvl" => "__builtin_ve_vl_pvpcnt_vvvl",
+                    "vl.pvpcntlo.vvl" => "__builtin_ve_vl_pvpcntlo_vvl",
+                    "vl.pvpcntlo.vvmvl" => "__builtin_ve_vl_pvpcntlo_vvmvl",
+                    "vl.pvpcntlo.vvvl" => "__builtin_ve_vl_pvpcntlo_vvvl",
+                    "vl.pvpcntup.vvl" => "__builtin_ve_vl_pvpcntup_vvl",
+                    "vl.pvpcntup.vvmvl" => "__builtin_ve_vl_pvpcntup_vvmvl",
+                    "vl.pvpcntup.vvvl" => "__builtin_ve_vl_pvpcntup_vvvl",
+                    "vl.pvrcp.vvl" => "__builtin_ve_vl_pvrcp_vvl",
+                    "vl.pvrcp.vvvl" => "__builtin_ve_vl_pvrcp_vvvl",
+                    "vl.pvrsqrt.vvl" => "__builtin_ve_vl_pvrsqrt_vvl",
+                    "vl.pvrsqrt.vvvl" => "__builtin_ve_vl_pvrsqrt_vvvl",
+                    "vl.pvrsqrtnex.vvl" => "__builtin_ve_vl_pvrsqrtnex_vvl",
+                    "vl.pvrsqrtnex.vvvl" => "__builtin_ve_vl_pvrsqrtnex_vvvl",
+                    "vl.pvseq.vl" => "__builtin_ve_vl_pvseq_vl",
+                    "vl.pvseq.vvl" => "__builtin_ve_vl_pvseq_vvl",
+                    "vl.pvseqlo.vl" => "__builtin_ve_vl_pvseqlo_vl",
+                    "vl.pvseqlo.vvl" => "__builtin_ve_vl_pvseqlo_vvl",
+                    "vl.pvsequp.vl" => "__builtin_ve_vl_pvsequp_vl",
+                    "vl.pvsequp.vvl" => "__builtin_ve_vl_pvsequp_vvl",
+                    "vl.pvsla.vvsMvl" => "__builtin_ve_vl_pvsla_vvsMvl",
+                    "vl.pvsla.vvsl" => "__builtin_ve_vl_pvsla_vvsl",
+                    "vl.pvsla.vvsvl" => "__builtin_ve_vl_pvsla_vvsvl",
+                    "vl.pvsla.vvvMvl" => "__builtin_ve_vl_pvsla_vvvMvl",
+                    "vl.pvsla.vvvl" => "__builtin_ve_vl_pvsla_vvvl",
+                    "vl.pvsla.vvvvl" => "__builtin_ve_vl_pvsla_vvvvl",
+                    "vl.pvsll.vvsMvl" => "__builtin_ve_vl_pvsll_vvsMvl",
+                    "vl.pvsll.vvsl" => "__builtin_ve_vl_pvsll_vvsl",
+                    "vl.pvsll.vvsvl" => "__builtin_ve_vl_pvsll_vvsvl",
+                    "vl.pvsll.vvvMvl" => "__builtin_ve_vl_pvsll_vvvMvl",
+                    "vl.pvsll.vvvl" => "__builtin_ve_vl_pvsll_vvvl",
+                    "vl.pvsll.vvvvl" => "__builtin_ve_vl_pvsll_vvvvl",
+                    "vl.pvsra.vvsMvl" => "__builtin_ve_vl_pvsra_vvsMvl",
+                    "vl.pvsra.vvsl" => "__builtin_ve_vl_pvsra_vvsl",
+                    "vl.pvsra.vvsvl" => "__builtin_ve_vl_pvsra_vvsvl",
+                    "vl.pvsra.vvvMvl" => "__builtin_ve_vl_pvsra_vvvMvl",
+                    "vl.pvsra.vvvl" => "__builtin_ve_vl_pvsra_vvvl",
+                    "vl.pvsra.vvvvl" => "__builtin_ve_vl_pvsra_vvvvl",
+                    "vl.pvsrl.vvsMvl" => "__builtin_ve_vl_pvsrl_vvsMvl",
+                    "vl.pvsrl.vvsl" => "__builtin_ve_vl_pvsrl_vvsl",
+                    "vl.pvsrl.vvsvl" => "__builtin_ve_vl_pvsrl_vvsvl",
+                    "vl.pvsrl.vvvMvl" => "__builtin_ve_vl_pvsrl_vvvMvl",
+                    "vl.pvsrl.vvvl" => "__builtin_ve_vl_pvsrl_vvvl",
+                    "vl.pvsrl.vvvvl" => "__builtin_ve_vl_pvsrl_vvvvl",
+                    "vl.pvsubs.vsvMvl" => "__builtin_ve_vl_pvsubs_vsvMvl",
+                    "vl.pvsubs.vsvl" => "__builtin_ve_vl_pvsubs_vsvl",
+                    "vl.pvsubs.vsvvl" => "__builtin_ve_vl_pvsubs_vsvvl",
+                    "vl.pvsubs.vvvMvl" => "__builtin_ve_vl_pvsubs_vvvMvl",
+                    "vl.pvsubs.vvvl" => "__builtin_ve_vl_pvsubs_vvvl",
+                    "vl.pvsubs.vvvvl" => "__builtin_ve_vl_pvsubs_vvvvl",
+                    "vl.pvsubu.vsvMvl" => "__builtin_ve_vl_pvsubu_vsvMvl",
+                    "vl.pvsubu.vsvl" => "__builtin_ve_vl_pvsubu_vsvl",
+                    "vl.pvsubu.vsvvl" => "__builtin_ve_vl_pvsubu_vsvvl",
+                    "vl.pvsubu.vvvMvl" => "__builtin_ve_vl_pvsubu_vvvMvl",
+                    "vl.pvsubu.vvvl" => "__builtin_ve_vl_pvsubu_vvvl",
+                    "vl.pvsubu.vvvvl" => "__builtin_ve_vl_pvsubu_vvvvl",
+                    "vl.pvxor.vsvMvl" => "__builtin_ve_vl_pvxor_vsvMvl",
+                    "vl.pvxor.vsvl" => "__builtin_ve_vl_pvxor_vsvl",
+                    "vl.pvxor.vsvvl" => "__builtin_ve_vl_pvxor_vsvvl",
+                    "vl.pvxor.vvvMvl" => "__builtin_ve_vl_pvxor_vvvMvl",
+                    "vl.pvxor.vvvl" => "__builtin_ve_vl_pvxor_vvvl",
+                    "vl.pvxor.vvvvl" => "__builtin_ve_vl_pvxor_vvvvl",
+                    "vl.scr.sss" => "__builtin_ve_vl_scr_sss",
+                    "vl.svm.sMs" => "__builtin_ve_vl_svm_sMs",
+                    "vl.svm.sms" => "__builtin_ve_vl_svm_sms",
+                    "vl.svob" => "__builtin_ve_vl_svob",
+                    "vl.tovm.sml" => "__builtin_ve_vl_tovm_sml",
+                    "vl.tscr.ssss" => "__builtin_ve_vl_tscr_ssss",
+                    "vl.vaddsl.vsvl" => "__builtin_ve_vl_vaddsl_vsvl",
+                    "vl.vaddsl.vsvmvl" => "__builtin_ve_vl_vaddsl_vsvmvl",
+                    "vl.vaddsl.vsvvl" => "__builtin_ve_vl_vaddsl_vsvvl",
+                    "vl.vaddsl.vvvl" => "__builtin_ve_vl_vaddsl_vvvl",
+                    "vl.vaddsl.vvvmvl" => "__builtin_ve_vl_vaddsl_vvvmvl",
+                    "vl.vaddsl.vvvvl" => "__builtin_ve_vl_vaddsl_vvvvl",
+                    "vl.vaddswsx.vsvl" => "__builtin_ve_vl_vaddswsx_vsvl",
+                    "vl.vaddswsx.vsvmvl" => "__builtin_ve_vl_vaddswsx_vsvmvl",
+                    "vl.vaddswsx.vsvvl" => "__builtin_ve_vl_vaddswsx_vsvvl",
+                    "vl.vaddswsx.vvvl" => "__builtin_ve_vl_vaddswsx_vvvl",
+                    "vl.vaddswsx.vvvmvl" => "__builtin_ve_vl_vaddswsx_vvvmvl",
+                    "vl.vaddswsx.vvvvl" => "__builtin_ve_vl_vaddswsx_vvvvl",
+                    "vl.vaddswzx.vsvl" => "__builtin_ve_vl_vaddswzx_vsvl",
+                    "vl.vaddswzx.vsvmvl" => "__builtin_ve_vl_vaddswzx_vsvmvl",
+                    "vl.vaddswzx.vsvvl" => "__builtin_ve_vl_vaddswzx_vsvvl",
+                    "vl.vaddswzx.vvvl" => "__builtin_ve_vl_vaddswzx_vvvl",
+                    "vl.vaddswzx.vvvmvl" => "__builtin_ve_vl_vaddswzx_vvvmvl",
+                    "vl.vaddswzx.vvvvl" => "__builtin_ve_vl_vaddswzx_vvvvl",
+                    "vl.vaddul.vsvl" => "__builtin_ve_vl_vaddul_vsvl",
+                    "vl.vaddul.vsvmvl" => "__builtin_ve_vl_vaddul_vsvmvl",
+                    "vl.vaddul.vsvvl" => "__builtin_ve_vl_vaddul_vsvvl",
+                    "vl.vaddul.vvvl" => "__builtin_ve_vl_vaddul_vvvl",
+                    "vl.vaddul.vvvmvl" => "__builtin_ve_vl_vaddul_vvvmvl",
+                    "vl.vaddul.vvvvl" => "__builtin_ve_vl_vaddul_vvvvl",
+                    "vl.vadduw.vsvl" => "__builtin_ve_vl_vadduw_vsvl",
+                    "vl.vadduw.vsvmvl" => "__builtin_ve_vl_vadduw_vsvmvl",
+                    "vl.vadduw.vsvvl" => "__builtin_ve_vl_vadduw_vsvvl",
+                    "vl.vadduw.vvvl" => "__builtin_ve_vl_vadduw_vvvl",
+                    "vl.vadduw.vvvmvl" => "__builtin_ve_vl_vadduw_vvvmvl",
+                    "vl.vadduw.vvvvl" => "__builtin_ve_vl_vadduw_vvvvl",
+                    "vl.vand.vsvl" => "__builtin_ve_vl_vand_vsvl",
+                    "vl.vand.vsvmvl" => "__builtin_ve_vl_vand_vsvmvl",
+                    "vl.vand.vsvvl" => "__builtin_ve_vl_vand_vsvvl",
+                    "vl.vand.vvvl" => "__builtin_ve_vl_vand_vvvl",
+                    "vl.vand.vvvmvl" => "__builtin_ve_vl_vand_vvvmvl",
+                    "vl.vand.vvvvl" => "__builtin_ve_vl_vand_vvvvl",
+                    "vl.vbrdd.vsl" => "__builtin_ve_vl_vbrdd_vsl",
+                    "vl.vbrdd.vsmvl" => "__builtin_ve_vl_vbrdd_vsmvl",
+                    "vl.vbrdd.vsvl" => "__builtin_ve_vl_vbrdd_vsvl",
+                    "vl.vbrdl.vsl" => "__builtin_ve_vl_vbrdl_vsl",
+                    "vl.vbrdl.vsmvl" => "__builtin_ve_vl_vbrdl_vsmvl",
+                    "vl.vbrdl.vsvl" => "__builtin_ve_vl_vbrdl_vsvl",
+                    "vl.vbrds.vsl" => "__builtin_ve_vl_vbrds_vsl",
+                    "vl.vbrds.vsmvl" => "__builtin_ve_vl_vbrds_vsmvl",
+                    "vl.vbrds.vsvl" => "__builtin_ve_vl_vbrds_vsvl",
+                    "vl.vbrdw.vsl" => "__builtin_ve_vl_vbrdw_vsl",
+                    "vl.vbrdw.vsmvl" => "__builtin_ve_vl_vbrdw_vsmvl",
+                    "vl.vbrdw.vsvl" => "__builtin_ve_vl_vbrdw_vsvl",
+                    "vl.vbrv.vvl" => "__builtin_ve_vl_vbrv_vvl",
+                    "vl.vbrv.vvmvl" => "__builtin_ve_vl_vbrv_vvmvl",
+                    "vl.vbrv.vvvl" => "__builtin_ve_vl_vbrv_vvvl",
+                    "vl.vcmpsl.vsvl" => "__builtin_ve_vl_vcmpsl_vsvl",
+                    "vl.vcmpsl.vsvmvl" => "__builtin_ve_vl_vcmpsl_vsvmvl",
+                    "vl.vcmpsl.vsvvl" => "__builtin_ve_vl_vcmpsl_vsvvl",
+                    "vl.vcmpsl.vvvl" => "__builtin_ve_vl_vcmpsl_vvvl",
+                    "vl.vcmpsl.vvvmvl" => "__builtin_ve_vl_vcmpsl_vvvmvl",
+                    "vl.vcmpsl.vvvvl" => "__builtin_ve_vl_vcmpsl_vvvvl",
+                    "vl.vcmpswsx.vsvl" => "__builtin_ve_vl_vcmpswsx_vsvl",
+                    "vl.vcmpswsx.vsvmvl" => "__builtin_ve_vl_vcmpswsx_vsvmvl",
+                    "vl.vcmpswsx.vsvvl" => "__builtin_ve_vl_vcmpswsx_vsvvl",
+                    "vl.vcmpswsx.vvvl" => "__builtin_ve_vl_vcmpswsx_vvvl",
+                    "vl.vcmpswsx.vvvmvl" => "__builtin_ve_vl_vcmpswsx_vvvmvl",
+                    "vl.vcmpswsx.vvvvl" => "__builtin_ve_vl_vcmpswsx_vvvvl",
+                    "vl.vcmpswzx.vsvl" => "__builtin_ve_vl_vcmpswzx_vsvl",
+                    "vl.vcmpswzx.vsvmvl" => "__builtin_ve_vl_vcmpswzx_vsvmvl",
+                    "vl.vcmpswzx.vsvvl" => "__builtin_ve_vl_vcmpswzx_vsvvl",
+                    "vl.vcmpswzx.vvvl" => "__builtin_ve_vl_vcmpswzx_vvvl",
+                    "vl.vcmpswzx.vvvmvl" => "__builtin_ve_vl_vcmpswzx_vvvmvl",
+                    "vl.vcmpswzx.vvvvl" => "__builtin_ve_vl_vcmpswzx_vvvvl",
+                    "vl.vcmpul.vsvl" => "__builtin_ve_vl_vcmpul_vsvl",
+                    "vl.vcmpul.vsvmvl" => "__builtin_ve_vl_vcmpul_vsvmvl",
+                    "vl.vcmpul.vsvvl" => "__builtin_ve_vl_vcmpul_vsvvl",
+                    "vl.vcmpul.vvvl" => "__builtin_ve_vl_vcmpul_vvvl",
+                    "vl.vcmpul.vvvmvl" => "__builtin_ve_vl_vcmpul_vvvmvl",
+                    "vl.vcmpul.vvvvl" => "__builtin_ve_vl_vcmpul_vvvvl",
+                    "vl.vcmpuw.vsvl" => "__builtin_ve_vl_vcmpuw_vsvl",
+                    "vl.vcmpuw.vsvmvl" => "__builtin_ve_vl_vcmpuw_vsvmvl",
+                    "vl.vcmpuw.vsvvl" => "__builtin_ve_vl_vcmpuw_vsvvl",
+                    "vl.vcmpuw.vvvl" => "__builtin_ve_vl_vcmpuw_vvvl",
+                    "vl.vcmpuw.vvvmvl" => "__builtin_ve_vl_vcmpuw_vvvmvl",
+                    "vl.vcmpuw.vvvvl" => "__builtin_ve_vl_vcmpuw_vvvvl",
+                    "vl.vcp.vvmvl" => "__builtin_ve_vl_vcp_vvmvl",
+                    "vl.vcvtdl.vvl" => "__builtin_ve_vl_vcvtdl_vvl",
+                    "vl.vcvtdl.vvvl" => "__builtin_ve_vl_vcvtdl_vvvl",
+                    "vl.vcvtds.vvl" => "__builtin_ve_vl_vcvtds_vvl",
+                    "vl.vcvtds.vvvl" => "__builtin_ve_vl_vcvtds_vvvl",
+                    "vl.vcvtdw.vvl" => "__builtin_ve_vl_vcvtdw_vvl",
+                    "vl.vcvtdw.vvvl" => "__builtin_ve_vl_vcvtdw_vvvl",
+                    "vl.vcvtld.vvl" => "__builtin_ve_vl_vcvtld_vvl",
+                    "vl.vcvtld.vvmvl" => "__builtin_ve_vl_vcvtld_vvmvl",
+                    "vl.vcvtld.vvvl" => "__builtin_ve_vl_vcvtld_vvvl",
+                    "vl.vcvtldrz.vvl" => "__builtin_ve_vl_vcvtldrz_vvl",
+                    "vl.vcvtldrz.vvmvl" => "__builtin_ve_vl_vcvtldrz_vvmvl",
+                    "vl.vcvtldrz.vvvl" => "__builtin_ve_vl_vcvtldrz_vvvl",
+                    "vl.vcvtsd.vvl" => "__builtin_ve_vl_vcvtsd_vvl",
+                    "vl.vcvtsd.vvvl" => "__builtin_ve_vl_vcvtsd_vvvl",
+                    "vl.vcvtsw.vvl" => "__builtin_ve_vl_vcvtsw_vvl",
+                    "vl.vcvtsw.vvvl" => "__builtin_ve_vl_vcvtsw_vvvl",
+                    "vl.vcvtwdsx.vvl" => "__builtin_ve_vl_vcvtwdsx_vvl",
+                    "vl.vcvtwdsx.vvmvl" => "__builtin_ve_vl_vcvtwdsx_vvmvl",
+                    "vl.vcvtwdsx.vvvl" => "__builtin_ve_vl_vcvtwdsx_vvvl",
+                    "vl.vcvtwdsxrz.vvl" => "__builtin_ve_vl_vcvtwdsxrz_vvl",
+                    "vl.vcvtwdsxrz.vvmvl" => "__builtin_ve_vl_vcvtwdsxrz_vvmvl",
+                    "vl.vcvtwdsxrz.vvvl" => "__builtin_ve_vl_vcvtwdsxrz_vvvl",
+                    "vl.vcvtwdzx.vvl" => "__builtin_ve_vl_vcvtwdzx_vvl",
+                    "vl.vcvtwdzx.vvmvl" => "__builtin_ve_vl_vcvtwdzx_vvmvl",
+                    "vl.vcvtwdzx.vvvl" => "__builtin_ve_vl_vcvtwdzx_vvvl",
+                    "vl.vcvtwdzxrz.vvl" => "__builtin_ve_vl_vcvtwdzxrz_vvl",
+                    "vl.vcvtwdzxrz.vvmvl" => "__builtin_ve_vl_vcvtwdzxrz_vvmvl",
+                    "vl.vcvtwdzxrz.vvvl" => "__builtin_ve_vl_vcvtwdzxrz_vvvl",
+                    "vl.vcvtwssx.vvl" => "__builtin_ve_vl_vcvtwssx_vvl",
+                    "vl.vcvtwssx.vvmvl" => "__builtin_ve_vl_vcvtwssx_vvmvl",
+                    "vl.vcvtwssx.vvvl" => "__builtin_ve_vl_vcvtwssx_vvvl",
+                    "vl.vcvtwssxrz.vvl" => "__builtin_ve_vl_vcvtwssxrz_vvl",
+                    "vl.vcvtwssxrz.vvmvl" => "__builtin_ve_vl_vcvtwssxrz_vvmvl",
+                    "vl.vcvtwssxrz.vvvl" => "__builtin_ve_vl_vcvtwssxrz_vvvl",
+                    "vl.vcvtwszx.vvl" => "__builtin_ve_vl_vcvtwszx_vvl",
+                    "vl.vcvtwszx.vvmvl" => "__builtin_ve_vl_vcvtwszx_vvmvl",
+                    "vl.vcvtwszx.vvvl" => "__builtin_ve_vl_vcvtwszx_vvvl",
+                    "vl.vcvtwszxrz.vvl" => "__builtin_ve_vl_vcvtwszxrz_vvl",
+                    "vl.vcvtwszxrz.vvmvl" => "__builtin_ve_vl_vcvtwszxrz_vvmvl",
+                    "vl.vcvtwszxrz.vvvl" => "__builtin_ve_vl_vcvtwszxrz_vvvl",
+                    "vl.vdivsl.vsvl" => "__builtin_ve_vl_vdivsl_vsvl",
+                    "vl.vdivsl.vsvmvl" => "__builtin_ve_vl_vdivsl_vsvmvl",
+                    "vl.vdivsl.vsvvl" => "__builtin_ve_vl_vdivsl_vsvvl",
+                    "vl.vdivsl.vvsl" => "__builtin_ve_vl_vdivsl_vvsl",
+                    "vl.vdivsl.vvsmvl" => "__builtin_ve_vl_vdivsl_vvsmvl",
+                    "vl.vdivsl.vvsvl" => "__builtin_ve_vl_vdivsl_vvsvl",
+                    "vl.vdivsl.vvvl" => "__builtin_ve_vl_vdivsl_vvvl",
+                    "vl.vdivsl.vvvmvl" => "__builtin_ve_vl_vdivsl_vvvmvl",
+                    "vl.vdivsl.vvvvl" => "__builtin_ve_vl_vdivsl_vvvvl",
+                    "vl.vdivswsx.vsvl" => "__builtin_ve_vl_vdivswsx_vsvl",
+                    "vl.vdivswsx.vsvmvl" => "__builtin_ve_vl_vdivswsx_vsvmvl",
+                    "vl.vdivswsx.vsvvl" => "__builtin_ve_vl_vdivswsx_vsvvl",
+                    "vl.vdivswsx.vvsl" => "__builtin_ve_vl_vdivswsx_vvsl",
+                    "vl.vdivswsx.vvsmvl" => "__builtin_ve_vl_vdivswsx_vvsmvl",
+                    "vl.vdivswsx.vvsvl" => "__builtin_ve_vl_vdivswsx_vvsvl",
+                    "vl.vdivswsx.vvvl" => "__builtin_ve_vl_vdivswsx_vvvl",
+                    "vl.vdivswsx.vvvmvl" => "__builtin_ve_vl_vdivswsx_vvvmvl",
+                    "vl.vdivswsx.vvvvl" => "__builtin_ve_vl_vdivswsx_vvvvl",
+                    "vl.vdivswzx.vsvl" => "__builtin_ve_vl_vdivswzx_vsvl",
+                    "vl.vdivswzx.vsvmvl" => "__builtin_ve_vl_vdivswzx_vsvmvl",
+                    "vl.vdivswzx.vsvvl" => "__builtin_ve_vl_vdivswzx_vsvvl",
+                    "vl.vdivswzx.vvsl" => "__builtin_ve_vl_vdivswzx_vvsl",
+                    "vl.vdivswzx.vvsmvl" => "__builtin_ve_vl_vdivswzx_vvsmvl",
+                    "vl.vdivswzx.vvsvl" => "__builtin_ve_vl_vdivswzx_vvsvl",
+                    "vl.vdivswzx.vvvl" => "__builtin_ve_vl_vdivswzx_vvvl",
+                    "vl.vdivswzx.vvvmvl" => "__builtin_ve_vl_vdivswzx_vvvmvl",
+                    "vl.vdivswzx.vvvvl" => "__builtin_ve_vl_vdivswzx_vvvvl",
+                    "vl.vdivul.vsvl" => "__builtin_ve_vl_vdivul_vsvl",
+                    "vl.vdivul.vsvmvl" => "__builtin_ve_vl_vdivul_vsvmvl",
+                    "vl.vdivul.vsvvl" => "__builtin_ve_vl_vdivul_vsvvl",
+                    "vl.vdivul.vvsl" => "__builtin_ve_vl_vdivul_vvsl",
+                    "vl.vdivul.vvsmvl" => "__builtin_ve_vl_vdivul_vvsmvl",
+                    "vl.vdivul.vvsvl" => "__builtin_ve_vl_vdivul_vvsvl",
+                    "vl.vdivul.vvvl" => "__builtin_ve_vl_vdivul_vvvl",
+                    "vl.vdivul.vvvmvl" => "__builtin_ve_vl_vdivul_vvvmvl",
+                    "vl.vdivul.vvvvl" => "__builtin_ve_vl_vdivul_vvvvl",
+                    "vl.vdivuw.vsvl" => "__builtin_ve_vl_vdivuw_vsvl",
+                    "vl.vdivuw.vsvmvl" => "__builtin_ve_vl_vdivuw_vsvmvl",
+                    "vl.vdivuw.vsvvl" => "__builtin_ve_vl_vdivuw_vsvvl",
+                    "vl.vdivuw.vvsl" => "__builtin_ve_vl_vdivuw_vvsl",
+                    "vl.vdivuw.vvsmvl" => "__builtin_ve_vl_vdivuw_vvsmvl",
+                    "vl.vdivuw.vvsvl" => "__builtin_ve_vl_vdivuw_vvsvl",
+                    "vl.vdivuw.vvvl" => "__builtin_ve_vl_vdivuw_vvvl",
+                    "vl.vdivuw.vvvmvl" => "__builtin_ve_vl_vdivuw_vvvmvl",
+                    "vl.vdivuw.vvvvl" => "__builtin_ve_vl_vdivuw_vvvvl",
+                    "vl.veqv.vsvl" => "__builtin_ve_vl_veqv_vsvl",
+                    "vl.veqv.vsvmvl" => "__builtin_ve_vl_veqv_vsvmvl",
+                    "vl.veqv.vsvvl" => "__builtin_ve_vl_veqv_vsvvl",
+                    "vl.veqv.vvvl" => "__builtin_ve_vl_veqv_vvvl",
+                    "vl.veqv.vvvmvl" => "__builtin_ve_vl_veqv_vvvmvl",
+                    "vl.veqv.vvvvl" => "__builtin_ve_vl_veqv_vvvvl",
+                    "vl.vex.vvmvl" => "__builtin_ve_vl_vex_vvmvl",
+                    "vl.vfaddd.vsvl" => "__builtin_ve_vl_vfaddd_vsvl",
+                    "vl.vfaddd.vsvmvl" => "__builtin_ve_vl_vfaddd_vsvmvl",
+                    "vl.vfaddd.vsvvl" => "__builtin_ve_vl_vfaddd_vsvvl",
+                    "vl.vfaddd.vvvl" => "__builtin_ve_vl_vfaddd_vvvl",
+                    "vl.vfaddd.vvvmvl" => "__builtin_ve_vl_vfaddd_vvvmvl",
+                    "vl.vfaddd.vvvvl" => "__builtin_ve_vl_vfaddd_vvvvl",
+                    "vl.vfadds.vsvl" => "__builtin_ve_vl_vfadds_vsvl",
+                    "vl.vfadds.vsvmvl" => "__builtin_ve_vl_vfadds_vsvmvl",
+                    "vl.vfadds.vsvvl" => "__builtin_ve_vl_vfadds_vsvvl",
+                    "vl.vfadds.vvvl" => "__builtin_ve_vl_vfadds_vvvl",
+                    "vl.vfadds.vvvmvl" => "__builtin_ve_vl_vfadds_vvvmvl",
+                    "vl.vfadds.vvvvl" => "__builtin_ve_vl_vfadds_vvvvl",
+                    "vl.vfcmpd.vsvl" => "__builtin_ve_vl_vfcmpd_vsvl",
+                    "vl.vfcmpd.vsvmvl" => "__builtin_ve_vl_vfcmpd_vsvmvl",
+                    "vl.vfcmpd.vsvvl" => "__builtin_ve_vl_vfcmpd_vsvvl",
+                    "vl.vfcmpd.vvvl" => "__builtin_ve_vl_vfcmpd_vvvl",
+                    "vl.vfcmpd.vvvmvl" => "__builtin_ve_vl_vfcmpd_vvvmvl",
+                    "vl.vfcmpd.vvvvl" => "__builtin_ve_vl_vfcmpd_vvvvl",
+                    "vl.vfcmps.vsvl" => "__builtin_ve_vl_vfcmps_vsvl",
+                    "vl.vfcmps.vsvmvl" => "__builtin_ve_vl_vfcmps_vsvmvl",
+                    "vl.vfcmps.vsvvl" => "__builtin_ve_vl_vfcmps_vsvvl",
+                    "vl.vfcmps.vvvl" => "__builtin_ve_vl_vfcmps_vvvl",
+                    "vl.vfcmps.vvvmvl" => "__builtin_ve_vl_vfcmps_vvvmvl",
+                    "vl.vfcmps.vvvvl" => "__builtin_ve_vl_vfcmps_vvvvl",
+                    "vl.vfdivd.vsvl" => "__builtin_ve_vl_vfdivd_vsvl",
+                    "vl.vfdivd.vsvmvl" => "__builtin_ve_vl_vfdivd_vsvmvl",
+                    "vl.vfdivd.vsvvl" => "__builtin_ve_vl_vfdivd_vsvvl",
+                    "vl.vfdivd.vvvl" => "__builtin_ve_vl_vfdivd_vvvl",
+                    "vl.vfdivd.vvvmvl" => "__builtin_ve_vl_vfdivd_vvvmvl",
+                    "vl.vfdivd.vvvvl" => "__builtin_ve_vl_vfdivd_vvvvl",
+                    "vl.vfdivs.vsvl" => "__builtin_ve_vl_vfdivs_vsvl",
+                    "vl.vfdivs.vsvmvl" => "__builtin_ve_vl_vfdivs_vsvmvl",
+                    "vl.vfdivs.vsvvl" => "__builtin_ve_vl_vfdivs_vsvvl",
+                    "vl.vfdivs.vvvl" => "__builtin_ve_vl_vfdivs_vvvl",
+                    "vl.vfdivs.vvvmvl" => "__builtin_ve_vl_vfdivs_vvvmvl",
+                    "vl.vfdivs.vvvvl" => "__builtin_ve_vl_vfdivs_vvvvl",
+                    "vl.vfmadd.vsvvl" => "__builtin_ve_vl_vfmadd_vsvvl",
+                    "vl.vfmadd.vsvvmvl" => "__builtin_ve_vl_vfmadd_vsvvmvl",
+                    "vl.vfmadd.vsvvvl" => "__builtin_ve_vl_vfmadd_vsvvvl",
+                    "vl.vfmadd.vvsvl" => "__builtin_ve_vl_vfmadd_vvsvl",
+                    "vl.vfmadd.vvsvmvl" => "__builtin_ve_vl_vfmadd_vvsvmvl",
+                    "vl.vfmadd.vvsvvl" => "__builtin_ve_vl_vfmadd_vvsvvl",
+                    "vl.vfmadd.vvvvl" => "__builtin_ve_vl_vfmadd_vvvvl",
+                    "vl.vfmadd.vvvvmvl" => "__builtin_ve_vl_vfmadd_vvvvmvl",
+                    "vl.vfmadd.vvvvvl" => "__builtin_ve_vl_vfmadd_vvvvvl",
+                    "vl.vfmads.vsvvl" => "__builtin_ve_vl_vfmads_vsvvl",
+                    "vl.vfmads.vsvvmvl" => "__builtin_ve_vl_vfmads_vsvvmvl",
+                    "vl.vfmads.vsvvvl" => "__builtin_ve_vl_vfmads_vsvvvl",
+                    "vl.vfmads.vvsvl" => "__builtin_ve_vl_vfmads_vvsvl",
+                    "vl.vfmads.vvsvmvl" => "__builtin_ve_vl_vfmads_vvsvmvl",
+                    "vl.vfmads.vvsvvl" => "__builtin_ve_vl_vfmads_vvsvvl",
+                    "vl.vfmads.vvvvl" => "__builtin_ve_vl_vfmads_vvvvl",
+                    "vl.vfmads.vvvvmvl" => "__builtin_ve_vl_vfmads_vvvvmvl",
+                    "vl.vfmads.vvvvvl" => "__builtin_ve_vl_vfmads_vvvvvl",
+                    "vl.vfmaxd.vsvl" => "__builtin_ve_vl_vfmaxd_vsvl",
+                    "vl.vfmaxd.vsvmvl" => "__builtin_ve_vl_vfmaxd_vsvmvl",
+                    "vl.vfmaxd.vsvvl" => "__builtin_ve_vl_vfmaxd_vsvvl",
+                    "vl.vfmaxd.vvvl" => "__builtin_ve_vl_vfmaxd_vvvl",
+                    "vl.vfmaxd.vvvmvl" => "__builtin_ve_vl_vfmaxd_vvvmvl",
+                    "vl.vfmaxd.vvvvl" => "__builtin_ve_vl_vfmaxd_vvvvl",
+                    "vl.vfmaxs.vsvl" => "__builtin_ve_vl_vfmaxs_vsvl",
+                    "vl.vfmaxs.vsvmvl" => "__builtin_ve_vl_vfmaxs_vsvmvl",
+                    "vl.vfmaxs.vsvvl" => "__builtin_ve_vl_vfmaxs_vsvvl",
+                    "vl.vfmaxs.vvvl" => "__builtin_ve_vl_vfmaxs_vvvl",
+                    "vl.vfmaxs.vvvmvl" => "__builtin_ve_vl_vfmaxs_vvvmvl",
+                    "vl.vfmaxs.vvvvl" => "__builtin_ve_vl_vfmaxs_vvvvl",
+                    "vl.vfmind.vsvl" => "__builtin_ve_vl_vfmind_vsvl",
+                    "vl.vfmind.vsvmvl" => "__builtin_ve_vl_vfmind_vsvmvl",
+                    "vl.vfmind.vsvvl" => "__builtin_ve_vl_vfmind_vsvvl",
+                    "vl.vfmind.vvvl" => "__builtin_ve_vl_vfmind_vvvl",
+                    "vl.vfmind.vvvmvl" => "__builtin_ve_vl_vfmind_vvvmvl",
+                    "vl.vfmind.vvvvl" => "__builtin_ve_vl_vfmind_vvvvl",
+                    "vl.vfmins.vsvl" => "__builtin_ve_vl_vfmins_vsvl",
+                    "vl.vfmins.vsvmvl" => "__builtin_ve_vl_vfmins_vsvmvl",
+                    "vl.vfmins.vsvvl" => "__builtin_ve_vl_vfmins_vsvvl",
+                    "vl.vfmins.vvvl" => "__builtin_ve_vl_vfmins_vvvl",
+                    "vl.vfmins.vvvmvl" => "__builtin_ve_vl_vfmins_vvvmvl",
+                    "vl.vfmins.vvvvl" => "__builtin_ve_vl_vfmins_vvvvl",
+                    "vl.vfmkdeq.mvl" => "__builtin_ve_vl_vfmkdeq_mvl",
+                    "vl.vfmkdeq.mvml" => "__builtin_ve_vl_vfmkdeq_mvml",
+                    "vl.vfmkdeqnan.mvl" => "__builtin_ve_vl_vfmkdeqnan_mvl",
+                    "vl.vfmkdeqnan.mvml" => "__builtin_ve_vl_vfmkdeqnan_mvml",
+                    "vl.vfmkdge.mvl" => "__builtin_ve_vl_vfmkdge_mvl",
+                    "vl.vfmkdge.mvml" => "__builtin_ve_vl_vfmkdge_mvml",
+                    "vl.vfmkdgenan.mvl" => "__builtin_ve_vl_vfmkdgenan_mvl",
+                    "vl.vfmkdgenan.mvml" => "__builtin_ve_vl_vfmkdgenan_mvml",
+                    "vl.vfmkdgt.mvl" => "__builtin_ve_vl_vfmkdgt_mvl",
+                    "vl.vfmkdgt.mvml" => "__builtin_ve_vl_vfmkdgt_mvml",
+                    "vl.vfmkdgtnan.mvl" => "__builtin_ve_vl_vfmkdgtnan_mvl",
+                    "vl.vfmkdgtnan.mvml" => "__builtin_ve_vl_vfmkdgtnan_mvml",
+                    "vl.vfmkdle.mvl" => "__builtin_ve_vl_vfmkdle_mvl",
+                    "vl.vfmkdle.mvml" => "__builtin_ve_vl_vfmkdle_mvml",
+                    "vl.vfmkdlenan.mvl" => "__builtin_ve_vl_vfmkdlenan_mvl",
+                    "vl.vfmkdlenan.mvml" => "__builtin_ve_vl_vfmkdlenan_mvml",
+                    "vl.vfmkdlt.mvl" => "__builtin_ve_vl_vfmkdlt_mvl",
+                    "vl.vfmkdlt.mvml" => "__builtin_ve_vl_vfmkdlt_mvml",
+                    "vl.vfmkdltnan.mvl" => "__builtin_ve_vl_vfmkdltnan_mvl",
+                    "vl.vfmkdltnan.mvml" => "__builtin_ve_vl_vfmkdltnan_mvml",
+                    "vl.vfmkdnan.mvl" => "__builtin_ve_vl_vfmkdnan_mvl",
+                    "vl.vfmkdnan.mvml" => "__builtin_ve_vl_vfmkdnan_mvml",
+                    "vl.vfmkdne.mvl" => "__builtin_ve_vl_vfmkdne_mvl",
+                    "vl.vfmkdne.mvml" => "__builtin_ve_vl_vfmkdne_mvml",
+                    "vl.vfmkdnenan.mvl" => "__builtin_ve_vl_vfmkdnenan_mvl",
+                    "vl.vfmkdnenan.mvml" => "__builtin_ve_vl_vfmkdnenan_mvml",
+                    "vl.vfmkdnum.mvl" => "__builtin_ve_vl_vfmkdnum_mvl",
+                    "vl.vfmkdnum.mvml" => "__builtin_ve_vl_vfmkdnum_mvml",
+                    "vl.vfmklaf.ml" => "__builtin_ve_vl_vfmklaf_ml",
+                    "vl.vfmklat.ml" => "__builtin_ve_vl_vfmklat_ml",
+                    "vl.vfmkleq.mvl" => "__builtin_ve_vl_vfmkleq_mvl",
+                    "vl.vfmkleq.mvml" => "__builtin_ve_vl_vfmkleq_mvml",
+                    "vl.vfmkleqnan.mvl" => "__builtin_ve_vl_vfmkleqnan_mvl",
+                    "vl.vfmkleqnan.mvml" => "__builtin_ve_vl_vfmkleqnan_mvml",
+                    "vl.vfmklge.mvl" => "__builtin_ve_vl_vfmklge_mvl",
+                    "vl.vfmklge.mvml" => "__builtin_ve_vl_vfmklge_mvml",
+                    "vl.vfmklgenan.mvl" => "__builtin_ve_vl_vfmklgenan_mvl",
+                    "vl.vfmklgenan.mvml" => "__builtin_ve_vl_vfmklgenan_mvml",
+                    "vl.vfmklgt.mvl" => "__builtin_ve_vl_vfmklgt_mvl",
+                    "vl.vfmklgt.mvml" => "__builtin_ve_vl_vfmklgt_mvml",
+                    "vl.vfmklgtnan.mvl" => "__builtin_ve_vl_vfmklgtnan_mvl",
+                    "vl.vfmklgtnan.mvml" => "__builtin_ve_vl_vfmklgtnan_mvml",
+                    "vl.vfmklle.mvl" => "__builtin_ve_vl_vfmklle_mvl",
+                    "vl.vfmklle.mvml" => "__builtin_ve_vl_vfmklle_mvml",
+                    "vl.vfmkllenan.mvl" => "__builtin_ve_vl_vfmkllenan_mvl",
+                    "vl.vfmkllenan.mvml" => "__builtin_ve_vl_vfmkllenan_mvml",
+                    "vl.vfmkllt.mvl" => "__builtin_ve_vl_vfmkllt_mvl",
+                    "vl.vfmkllt.mvml" => "__builtin_ve_vl_vfmkllt_mvml",
+                    "vl.vfmklltnan.mvl" => "__builtin_ve_vl_vfmklltnan_mvl",
+                    "vl.vfmklltnan.mvml" => "__builtin_ve_vl_vfmklltnan_mvml",
+                    "vl.vfmklnan.mvl" => "__builtin_ve_vl_vfmklnan_mvl",
+                    "vl.vfmklnan.mvml" => "__builtin_ve_vl_vfmklnan_mvml",
+                    "vl.vfmklne.mvl" => "__builtin_ve_vl_vfmklne_mvl",
+                    "vl.vfmklne.mvml" => "__builtin_ve_vl_vfmklne_mvml",
+                    "vl.vfmklnenan.mvl" => "__builtin_ve_vl_vfmklnenan_mvl",
+                    "vl.vfmklnenan.mvml" => "__builtin_ve_vl_vfmklnenan_mvml",
+                    "vl.vfmklnum.mvl" => "__builtin_ve_vl_vfmklnum_mvl",
+                    "vl.vfmklnum.mvml" => "__builtin_ve_vl_vfmklnum_mvml",
+                    "vl.vfmkseq.mvl" => "__builtin_ve_vl_vfmkseq_mvl",
+                    "vl.vfmkseq.mvml" => "__builtin_ve_vl_vfmkseq_mvml",
+                    "vl.vfmkseqnan.mvl" => "__builtin_ve_vl_vfmkseqnan_mvl",
+                    "vl.vfmkseqnan.mvml" => "__builtin_ve_vl_vfmkseqnan_mvml",
+                    "vl.vfmksge.mvl" => "__builtin_ve_vl_vfmksge_mvl",
+                    "vl.vfmksge.mvml" => "__builtin_ve_vl_vfmksge_mvml",
+                    "vl.vfmksgenan.mvl" => "__builtin_ve_vl_vfmksgenan_mvl",
+                    "vl.vfmksgenan.mvml" => "__builtin_ve_vl_vfmksgenan_mvml",
+                    "vl.vfmksgt.mvl" => "__builtin_ve_vl_vfmksgt_mvl",
+                    "vl.vfmksgt.mvml" => "__builtin_ve_vl_vfmksgt_mvml",
+                    "vl.vfmksgtnan.mvl" => "__builtin_ve_vl_vfmksgtnan_mvl",
+                    "vl.vfmksgtnan.mvml" => "__builtin_ve_vl_vfmksgtnan_mvml",
+                    "vl.vfmksle.mvl" => "__builtin_ve_vl_vfmksle_mvl",
+                    "vl.vfmksle.mvml" => "__builtin_ve_vl_vfmksle_mvml",
+                    "vl.vfmkslenan.mvl" => "__builtin_ve_vl_vfmkslenan_mvl",
+                    "vl.vfmkslenan.mvml" => "__builtin_ve_vl_vfmkslenan_mvml",
+                    "vl.vfmkslt.mvl" => "__builtin_ve_vl_vfmkslt_mvl",
+                    "vl.vfmkslt.mvml" => "__builtin_ve_vl_vfmkslt_mvml",
+                    "vl.vfmksltnan.mvl" => "__builtin_ve_vl_vfmksltnan_mvl",
+                    "vl.vfmksltnan.mvml" => "__builtin_ve_vl_vfmksltnan_mvml",
+                    "vl.vfmksnan.mvl" => "__builtin_ve_vl_vfmksnan_mvl",
+                    "vl.vfmksnan.mvml" => "__builtin_ve_vl_vfmksnan_mvml",
+                    "vl.vfmksne.mvl" => "__builtin_ve_vl_vfmksne_mvl",
+                    "vl.vfmksne.mvml" => "__builtin_ve_vl_vfmksne_mvml",
+                    "vl.vfmksnenan.mvl" => "__builtin_ve_vl_vfmksnenan_mvl",
+                    "vl.vfmksnenan.mvml" => "__builtin_ve_vl_vfmksnenan_mvml",
+                    "vl.vfmksnum.mvl" => "__builtin_ve_vl_vfmksnum_mvl",
+                    "vl.vfmksnum.mvml" => "__builtin_ve_vl_vfmksnum_mvml",
+                    "vl.vfmkweq.mvl" => "__builtin_ve_vl_vfmkweq_mvl",
+                    "vl.vfmkweq.mvml" => "__builtin_ve_vl_vfmkweq_mvml",
+                    "vl.vfmkweqnan.mvl" => "__builtin_ve_vl_vfmkweqnan_mvl",
+                    "vl.vfmkweqnan.mvml" => "__builtin_ve_vl_vfmkweqnan_mvml",
+                    "vl.vfmkwge.mvl" => "__builtin_ve_vl_vfmkwge_mvl",
+                    "vl.vfmkwge.mvml" => "__builtin_ve_vl_vfmkwge_mvml",
+                    "vl.vfmkwgenan.mvl" => "__builtin_ve_vl_vfmkwgenan_mvl",
+                    "vl.vfmkwgenan.mvml" => "__builtin_ve_vl_vfmkwgenan_mvml",
+                    "vl.vfmkwgt.mvl" => "__builtin_ve_vl_vfmkwgt_mvl",
+                    "vl.vfmkwgt.mvml" => "__builtin_ve_vl_vfmkwgt_mvml",
+                    "vl.vfmkwgtnan.mvl" => "__builtin_ve_vl_vfmkwgtnan_mvl",
+                    "vl.vfmkwgtnan.mvml" => "__builtin_ve_vl_vfmkwgtnan_mvml",
+                    "vl.vfmkwle.mvl" => "__builtin_ve_vl_vfmkwle_mvl",
+                    "vl.vfmkwle.mvml" => "__builtin_ve_vl_vfmkwle_mvml",
+                    "vl.vfmkwlenan.mvl" => "__builtin_ve_vl_vfmkwlenan_mvl",
+                    "vl.vfmkwlenan.mvml" => "__builtin_ve_vl_vfmkwlenan_mvml",
+                    "vl.vfmkwlt.mvl" => "__builtin_ve_vl_vfmkwlt_mvl",
+                    "vl.vfmkwlt.mvml" => "__builtin_ve_vl_vfmkwlt_mvml",
+                    "vl.vfmkwltnan.mvl" => "__builtin_ve_vl_vfmkwltnan_mvl",
+                    "vl.vfmkwltnan.mvml" => "__builtin_ve_vl_vfmkwltnan_mvml",
+                    "vl.vfmkwnan.mvl" => "__builtin_ve_vl_vfmkwnan_mvl",
+                    "vl.vfmkwnan.mvml" => "__builtin_ve_vl_vfmkwnan_mvml",
+                    "vl.vfmkwne.mvl" => "__builtin_ve_vl_vfmkwne_mvl",
+                    "vl.vfmkwne.mvml" => "__builtin_ve_vl_vfmkwne_mvml",
+                    "vl.vfmkwnenan.mvl" => "__builtin_ve_vl_vfmkwnenan_mvl",
+                    "vl.vfmkwnenan.mvml" => "__builtin_ve_vl_vfmkwnenan_mvml",
+                    "vl.vfmkwnum.mvl" => "__builtin_ve_vl_vfmkwnum_mvl",
+                    "vl.vfmkwnum.mvml" => "__builtin_ve_vl_vfmkwnum_mvml",
+                    "vl.vfmsbd.vsvvl" => "__builtin_ve_vl_vfmsbd_vsvvl",
+                    "vl.vfmsbd.vsvvmvl" => "__builtin_ve_vl_vfmsbd_vsvvmvl",
+                    "vl.vfmsbd.vsvvvl" => "__builtin_ve_vl_vfmsbd_vsvvvl",
+                    "vl.vfmsbd.vvsvl" => "__builtin_ve_vl_vfmsbd_vvsvl",
+                    "vl.vfmsbd.vvsvmvl" => "__builtin_ve_vl_vfmsbd_vvsvmvl",
+                    "vl.vfmsbd.vvsvvl" => "__builtin_ve_vl_vfmsbd_vvsvvl",
+                    "vl.vfmsbd.vvvvl" => "__builtin_ve_vl_vfmsbd_vvvvl",
+                    "vl.vfmsbd.vvvvmvl" => "__builtin_ve_vl_vfmsbd_vvvvmvl",
+                    "vl.vfmsbd.vvvvvl" => "__builtin_ve_vl_vfmsbd_vvvvvl",
+                    "vl.vfmsbs.vsvvl" => "__builtin_ve_vl_vfmsbs_vsvvl",
+                    "vl.vfmsbs.vsvvmvl" => "__builtin_ve_vl_vfmsbs_vsvvmvl",
+                    "vl.vfmsbs.vsvvvl" => "__builtin_ve_vl_vfmsbs_vsvvvl",
+                    "vl.vfmsbs.vvsvl" => "__builtin_ve_vl_vfmsbs_vvsvl",
+                    "vl.vfmsbs.vvsvmvl" => "__builtin_ve_vl_vfmsbs_vvsvmvl",
+                    "vl.vfmsbs.vvsvvl" => "__builtin_ve_vl_vfmsbs_vvsvvl",
+                    "vl.vfmsbs.vvvvl" => "__builtin_ve_vl_vfmsbs_vvvvl",
+                    "vl.vfmsbs.vvvvmvl" => "__builtin_ve_vl_vfmsbs_vvvvmvl",
+                    "vl.vfmsbs.vvvvvl" => "__builtin_ve_vl_vfmsbs_vvvvvl",
+                    "vl.vfmuld.vsvl" => "__builtin_ve_vl_vfmuld_vsvl",
+                    "vl.vfmuld.vsvmvl" => "__builtin_ve_vl_vfmuld_vsvmvl",
+                    "vl.vfmuld.vsvvl" => "__builtin_ve_vl_vfmuld_vsvvl",
+                    "vl.vfmuld.vvvl" => "__builtin_ve_vl_vfmuld_vvvl",
+                    "vl.vfmuld.vvvmvl" => "__builtin_ve_vl_vfmuld_vvvmvl",
+                    "vl.vfmuld.vvvvl" => "__builtin_ve_vl_vfmuld_vvvvl",
+                    "vl.vfmuls.vsvl" => "__builtin_ve_vl_vfmuls_vsvl",
+                    "vl.vfmuls.vsvmvl" => "__builtin_ve_vl_vfmuls_vsvmvl",
+                    "vl.vfmuls.vsvvl" => "__builtin_ve_vl_vfmuls_vsvvl",
+                    "vl.vfmuls.vvvl" => "__builtin_ve_vl_vfmuls_vvvl",
+                    "vl.vfmuls.vvvmvl" => "__builtin_ve_vl_vfmuls_vvvmvl",
+                    "vl.vfmuls.vvvvl" => "__builtin_ve_vl_vfmuls_vvvvl",
+                    "vl.vfnmadd.vsvvl" => "__builtin_ve_vl_vfnmadd_vsvvl",
+                    "vl.vfnmadd.vsvvmvl" => "__builtin_ve_vl_vfnmadd_vsvvmvl",
+                    "vl.vfnmadd.vsvvvl" => "__builtin_ve_vl_vfnmadd_vsvvvl",
+                    "vl.vfnmadd.vvsvl" => "__builtin_ve_vl_vfnmadd_vvsvl",
+                    "vl.vfnmadd.vvsvmvl" => "__builtin_ve_vl_vfnmadd_vvsvmvl",
+                    "vl.vfnmadd.vvsvvl" => "__builtin_ve_vl_vfnmadd_vvsvvl",
+                    "vl.vfnmadd.vvvvl" => "__builtin_ve_vl_vfnmadd_vvvvl",
+                    "vl.vfnmadd.vvvvmvl" => "__builtin_ve_vl_vfnmadd_vvvvmvl",
+                    "vl.vfnmadd.vvvvvl" => "__builtin_ve_vl_vfnmadd_vvvvvl",
+                    "vl.vfnmads.vsvvl" => "__builtin_ve_vl_vfnmads_vsvvl",
+                    "vl.vfnmads.vsvvmvl" => "__builtin_ve_vl_vfnmads_vsvvmvl",
+                    "vl.vfnmads.vsvvvl" => "__builtin_ve_vl_vfnmads_vsvvvl",
+                    "vl.vfnmads.vvsvl" => "__builtin_ve_vl_vfnmads_vvsvl",
+                    "vl.vfnmads.vvsvmvl" => "__builtin_ve_vl_vfnmads_vvsvmvl",
+                    "vl.vfnmads.vvsvvl" => "__builtin_ve_vl_vfnmads_vvsvvl",
+                    "vl.vfnmads.vvvvl" => "__builtin_ve_vl_vfnmads_vvvvl",
+                    "vl.vfnmads.vvvvmvl" => "__builtin_ve_vl_vfnmads_vvvvmvl",
+                    "vl.vfnmads.vvvvvl" => "__builtin_ve_vl_vfnmads_vvvvvl",
+                    "vl.vfnmsbd.vsvvl" => "__builtin_ve_vl_vfnmsbd_vsvvl",
+                    "vl.vfnmsbd.vsvvmvl" => "__builtin_ve_vl_vfnmsbd_vsvvmvl",
+                    "vl.vfnmsbd.vsvvvl" => "__builtin_ve_vl_vfnmsbd_vsvvvl",
+                    "vl.vfnmsbd.vvsvl" => "__builtin_ve_vl_vfnmsbd_vvsvl",
+                    "vl.vfnmsbd.vvsvmvl" => "__builtin_ve_vl_vfnmsbd_vvsvmvl",
+                    "vl.vfnmsbd.vvsvvl" => "__builtin_ve_vl_vfnmsbd_vvsvvl",
+                    "vl.vfnmsbd.vvvvl" => "__builtin_ve_vl_vfnmsbd_vvvvl",
+                    "vl.vfnmsbd.vvvvmvl" => "__builtin_ve_vl_vfnmsbd_vvvvmvl",
+                    "vl.vfnmsbd.vvvvvl" => "__builtin_ve_vl_vfnmsbd_vvvvvl",
+                    "vl.vfnmsbs.vsvvl" => "__builtin_ve_vl_vfnmsbs_vsvvl",
+                    "vl.vfnmsbs.vsvvmvl" => "__builtin_ve_vl_vfnmsbs_vsvvmvl",
+                    "vl.vfnmsbs.vsvvvl" => "__builtin_ve_vl_vfnmsbs_vsvvvl",
+                    "vl.vfnmsbs.vvsvl" => "__builtin_ve_vl_vfnmsbs_vvsvl",
+                    "vl.vfnmsbs.vvsvmvl" => "__builtin_ve_vl_vfnmsbs_vvsvmvl",
+                    "vl.vfnmsbs.vvsvvl" => "__builtin_ve_vl_vfnmsbs_vvsvvl",
+                    "vl.vfnmsbs.vvvvl" => "__builtin_ve_vl_vfnmsbs_vvvvl",
+                    "vl.vfnmsbs.vvvvmvl" => "__builtin_ve_vl_vfnmsbs_vvvvmvl",
+                    "vl.vfnmsbs.vvvvvl" => "__builtin_ve_vl_vfnmsbs_vvvvvl",
+                    "vl.vfrmaxdfst.vvl" => "__builtin_ve_vl_vfrmaxdfst_vvl",
+                    "vl.vfrmaxdfst.vvvl" => "__builtin_ve_vl_vfrmaxdfst_vvvl",
+                    "vl.vfrmaxdlst.vvl" => "__builtin_ve_vl_vfrmaxdlst_vvl",
+                    "vl.vfrmaxdlst.vvvl" => "__builtin_ve_vl_vfrmaxdlst_vvvl",
+                    "vl.vfrmaxsfst.vvl" => "__builtin_ve_vl_vfrmaxsfst_vvl",
+                    "vl.vfrmaxsfst.vvvl" => "__builtin_ve_vl_vfrmaxsfst_vvvl",
+                    "vl.vfrmaxslst.vvl" => "__builtin_ve_vl_vfrmaxslst_vvl",
+                    "vl.vfrmaxslst.vvvl" => "__builtin_ve_vl_vfrmaxslst_vvvl",
+                    "vl.vfrmindfst.vvl" => "__builtin_ve_vl_vfrmindfst_vvl",
+                    "vl.vfrmindfst.vvvl" => "__builtin_ve_vl_vfrmindfst_vvvl",
+                    "vl.vfrmindlst.vvl" => "__builtin_ve_vl_vfrmindlst_vvl",
+                    "vl.vfrmindlst.vvvl" => "__builtin_ve_vl_vfrmindlst_vvvl",
+                    "vl.vfrminsfst.vvl" => "__builtin_ve_vl_vfrminsfst_vvl",
+                    "vl.vfrminsfst.vvvl" => "__builtin_ve_vl_vfrminsfst_vvvl",
+                    "vl.vfrminslst.vvl" => "__builtin_ve_vl_vfrminslst_vvl",
+                    "vl.vfrminslst.vvvl" => "__builtin_ve_vl_vfrminslst_vvvl",
+                    "vl.vfsqrtd.vvl" => "__builtin_ve_vl_vfsqrtd_vvl",
+                    "vl.vfsqrtd.vvvl" => "__builtin_ve_vl_vfsqrtd_vvvl",
+                    "vl.vfsqrts.vvl" => "__builtin_ve_vl_vfsqrts_vvl",
+                    "vl.vfsqrts.vvvl" => "__builtin_ve_vl_vfsqrts_vvvl",
+                    "vl.vfsubd.vsvl" => "__builtin_ve_vl_vfsubd_vsvl",
+                    "vl.vfsubd.vsvmvl" => "__builtin_ve_vl_vfsubd_vsvmvl",
+                    "vl.vfsubd.vsvvl" => "__builtin_ve_vl_vfsubd_vsvvl",
+                    "vl.vfsubd.vvvl" => "__builtin_ve_vl_vfsubd_vvvl",
+                    "vl.vfsubd.vvvmvl" => "__builtin_ve_vl_vfsubd_vvvmvl",
+                    "vl.vfsubd.vvvvl" => "__builtin_ve_vl_vfsubd_vvvvl",
+                    "vl.vfsubs.vsvl" => "__builtin_ve_vl_vfsubs_vsvl",
+                    "vl.vfsubs.vsvmvl" => "__builtin_ve_vl_vfsubs_vsvmvl",
+                    "vl.vfsubs.vsvvl" => "__builtin_ve_vl_vfsubs_vsvvl",
+                    "vl.vfsubs.vvvl" => "__builtin_ve_vl_vfsubs_vvvl",
+                    "vl.vfsubs.vvvmvl" => "__builtin_ve_vl_vfsubs_vvvmvl",
+                    "vl.vfsubs.vvvvl" => "__builtin_ve_vl_vfsubs_vvvvl",
+                    "vl.vfsumd.vvl" => "__builtin_ve_vl_vfsumd_vvl",
+                    "vl.vfsumd.vvml" => "__builtin_ve_vl_vfsumd_vvml",
+                    "vl.vfsums.vvl" => "__builtin_ve_vl_vfsums_vvl",
+                    "vl.vfsums.vvml" => "__builtin_ve_vl_vfsums_vvml",
+                    "vl.vgt.vvssl" => "__builtin_ve_vl_vgt_vvssl",
+                    "vl.vgt.vvssml" => "__builtin_ve_vl_vgt_vvssml",
+                    "vl.vgt.vvssmvl" => "__builtin_ve_vl_vgt_vvssmvl",
+                    "vl.vgt.vvssvl" => "__builtin_ve_vl_vgt_vvssvl",
+                    "vl.vgtlsx.vvssl" => "__builtin_ve_vl_vgtlsx_vvssl",
+                    "vl.vgtlsx.vvssml" => "__builtin_ve_vl_vgtlsx_vvssml",
+                    "vl.vgtlsx.vvssmvl" => "__builtin_ve_vl_vgtlsx_vvssmvl",
+                    "vl.vgtlsx.vvssvl" => "__builtin_ve_vl_vgtlsx_vvssvl",
+                    "vl.vgtlsxnc.vvssl" => "__builtin_ve_vl_vgtlsxnc_vvssl",
+                    "vl.vgtlsxnc.vvssml" => "__builtin_ve_vl_vgtlsxnc_vvssml",
+                    "vl.vgtlsxnc.vvssmvl" => "__builtin_ve_vl_vgtlsxnc_vvssmvl",
+                    "vl.vgtlsxnc.vvssvl" => "__builtin_ve_vl_vgtlsxnc_vvssvl",
+                    "vl.vgtlzx.vvssl" => "__builtin_ve_vl_vgtlzx_vvssl",
+                    "vl.vgtlzx.vvssml" => "__builtin_ve_vl_vgtlzx_vvssml",
+                    "vl.vgtlzx.vvssmvl" => "__builtin_ve_vl_vgtlzx_vvssmvl",
+                    "vl.vgtlzx.vvssvl" => "__builtin_ve_vl_vgtlzx_vvssvl",
+                    "vl.vgtlzxnc.vvssl" => "__builtin_ve_vl_vgtlzxnc_vvssl",
+                    "vl.vgtlzxnc.vvssml" => "__builtin_ve_vl_vgtlzxnc_vvssml",
+                    "vl.vgtlzxnc.vvssmvl" => "__builtin_ve_vl_vgtlzxnc_vvssmvl",
+                    "vl.vgtlzxnc.vvssvl" => "__builtin_ve_vl_vgtlzxnc_vvssvl",
+                    "vl.vgtnc.vvssl" => "__builtin_ve_vl_vgtnc_vvssl",
+                    "vl.vgtnc.vvssml" => "__builtin_ve_vl_vgtnc_vvssml",
+                    "vl.vgtnc.vvssmvl" => "__builtin_ve_vl_vgtnc_vvssmvl",
+                    "vl.vgtnc.vvssvl" => "__builtin_ve_vl_vgtnc_vvssvl",
+                    "vl.vgtu.vvssl" => "__builtin_ve_vl_vgtu_vvssl",
+                    "vl.vgtu.vvssml" => "__builtin_ve_vl_vgtu_vvssml",
+                    "vl.vgtu.vvssmvl" => "__builtin_ve_vl_vgtu_vvssmvl",
+                    "vl.vgtu.vvssvl" => "__builtin_ve_vl_vgtu_vvssvl",
+                    "vl.vgtunc.vvssl" => "__builtin_ve_vl_vgtunc_vvssl",
+                    "vl.vgtunc.vvssml" => "__builtin_ve_vl_vgtunc_vvssml",
+                    "vl.vgtunc.vvssmvl" => "__builtin_ve_vl_vgtunc_vvssmvl",
+                    "vl.vgtunc.vvssvl" => "__builtin_ve_vl_vgtunc_vvssvl",
+                    "vl.vld.vssl" => "__builtin_ve_vl_vld_vssl",
+                    "vl.vld.vssvl" => "__builtin_ve_vl_vld_vssvl",
+                    "vl.vld2d.vssl" => "__builtin_ve_vl_vld2d_vssl",
+                    "vl.vld2d.vssvl" => "__builtin_ve_vl_vld2d_vssvl",
+                    "vl.vld2dnc.vssl" => "__builtin_ve_vl_vld2dnc_vssl",
+                    "vl.vld2dnc.vssvl" => "__builtin_ve_vl_vld2dnc_vssvl",
+                    "vl.vldl2dsx.vssl" => "__builtin_ve_vl_vldl2dsx_vssl",
+                    "vl.vldl2dsx.vssvl" => "__builtin_ve_vl_vldl2dsx_vssvl",
+                    "vl.vldl2dsxnc.vssl" => "__builtin_ve_vl_vldl2dsxnc_vssl",
+                    "vl.vldl2dsxnc.vssvl" => "__builtin_ve_vl_vldl2dsxnc_vssvl",
+                    "vl.vldl2dzx.vssl" => "__builtin_ve_vl_vldl2dzx_vssl",
+                    "vl.vldl2dzx.vssvl" => "__builtin_ve_vl_vldl2dzx_vssvl",
+                    "vl.vldl2dzxnc.vssl" => "__builtin_ve_vl_vldl2dzxnc_vssl",
+                    "vl.vldl2dzxnc.vssvl" => "__builtin_ve_vl_vldl2dzxnc_vssvl",
+                    "vl.vldlsx.vssl" => "__builtin_ve_vl_vldlsx_vssl",
+                    "vl.vldlsx.vssvl" => "__builtin_ve_vl_vldlsx_vssvl",
+                    "vl.vldlsxnc.vssl" => "__builtin_ve_vl_vldlsxnc_vssl",
+                    "vl.vldlsxnc.vssvl" => "__builtin_ve_vl_vldlsxnc_vssvl",
+                    "vl.vldlzx.vssl" => "__builtin_ve_vl_vldlzx_vssl",
+                    "vl.vldlzx.vssvl" => "__builtin_ve_vl_vldlzx_vssvl",
+                    "vl.vldlzxnc.vssl" => "__builtin_ve_vl_vldlzxnc_vssl",
+                    "vl.vldlzxnc.vssvl" => "__builtin_ve_vl_vldlzxnc_vssvl",
+                    "vl.vldnc.vssl" => "__builtin_ve_vl_vldnc_vssl",
+                    "vl.vldnc.vssvl" => "__builtin_ve_vl_vldnc_vssvl",
+                    "vl.vldu.vssl" => "__builtin_ve_vl_vldu_vssl",
+                    "vl.vldu.vssvl" => "__builtin_ve_vl_vldu_vssvl",
+                    "vl.vldu2d.vssl" => "__builtin_ve_vl_vldu2d_vssl",
+                    "vl.vldu2d.vssvl" => "__builtin_ve_vl_vldu2d_vssvl",
+                    "vl.vldu2dnc.vssl" => "__builtin_ve_vl_vldu2dnc_vssl",
+                    "vl.vldu2dnc.vssvl" => "__builtin_ve_vl_vldu2dnc_vssvl",
+                    "vl.vldunc.vssl" => "__builtin_ve_vl_vldunc_vssl",
+                    "vl.vldunc.vssvl" => "__builtin_ve_vl_vldunc_vssvl",
+                    "vl.vldz.vvl" => "__builtin_ve_vl_vldz_vvl",
+                    "vl.vldz.vvmvl" => "__builtin_ve_vl_vldz_vvmvl",
+                    "vl.vldz.vvvl" => "__builtin_ve_vl_vldz_vvvl",
+                    "vl.vmaxsl.vsvl" => "__builtin_ve_vl_vmaxsl_vsvl",
+                    "vl.vmaxsl.vsvmvl" => "__builtin_ve_vl_vmaxsl_vsvmvl",
+                    "vl.vmaxsl.vsvvl" => "__builtin_ve_vl_vmaxsl_vsvvl",
+                    "vl.vmaxsl.vvvl" => "__builtin_ve_vl_vmaxsl_vvvl",
+                    "vl.vmaxsl.vvvmvl" => "__builtin_ve_vl_vmaxsl_vvvmvl",
+                    "vl.vmaxsl.vvvvl" => "__builtin_ve_vl_vmaxsl_vvvvl",
+                    "vl.vmaxswsx.vsvl" => "__builtin_ve_vl_vmaxswsx_vsvl",
+                    "vl.vmaxswsx.vsvmvl" => "__builtin_ve_vl_vmaxswsx_vsvmvl",
+                    "vl.vmaxswsx.vsvvl" => "__builtin_ve_vl_vmaxswsx_vsvvl",
+                    "vl.vmaxswsx.vvvl" => "__builtin_ve_vl_vmaxswsx_vvvl",
+                    "vl.vmaxswsx.vvvmvl" => "__builtin_ve_vl_vmaxswsx_vvvmvl",
+                    "vl.vmaxswsx.vvvvl" => "__builtin_ve_vl_vmaxswsx_vvvvl",
+                    "vl.vmaxswzx.vsvl" => "__builtin_ve_vl_vmaxswzx_vsvl",
+                    "vl.vmaxswzx.vsvmvl" => "__builtin_ve_vl_vmaxswzx_vsvmvl",
+                    "vl.vmaxswzx.vsvvl" => "__builtin_ve_vl_vmaxswzx_vsvvl",
+                    "vl.vmaxswzx.vvvl" => "__builtin_ve_vl_vmaxswzx_vvvl",
+                    "vl.vmaxswzx.vvvmvl" => "__builtin_ve_vl_vmaxswzx_vvvmvl",
+                    "vl.vmaxswzx.vvvvl" => "__builtin_ve_vl_vmaxswzx_vvvvl",
+                    "vl.vminsl.vsvl" => "__builtin_ve_vl_vminsl_vsvl",
+                    "vl.vminsl.vsvmvl" => "__builtin_ve_vl_vminsl_vsvmvl",
+                    "vl.vminsl.vsvvl" => "__builtin_ve_vl_vminsl_vsvvl",
+                    "vl.vminsl.vvvl" => "__builtin_ve_vl_vminsl_vvvl",
+                    "vl.vminsl.vvvmvl" => "__builtin_ve_vl_vminsl_vvvmvl",
+                    "vl.vminsl.vvvvl" => "__builtin_ve_vl_vminsl_vvvvl",
+                    "vl.vminswsx.vsvl" => "__builtin_ve_vl_vminswsx_vsvl",
+                    "vl.vminswsx.vsvmvl" => "__builtin_ve_vl_vminswsx_vsvmvl",
+                    "vl.vminswsx.vsvvl" => "__builtin_ve_vl_vminswsx_vsvvl",
+                    "vl.vminswsx.vvvl" => "__builtin_ve_vl_vminswsx_vvvl",
+                    "vl.vminswsx.vvvmvl" => "__builtin_ve_vl_vminswsx_vvvmvl",
+                    "vl.vminswsx.vvvvl" => "__builtin_ve_vl_vminswsx_vvvvl",
+                    "vl.vminswzx.vsvl" => "__builtin_ve_vl_vminswzx_vsvl",
+                    "vl.vminswzx.vsvmvl" => "__builtin_ve_vl_vminswzx_vsvmvl",
+                    "vl.vminswzx.vsvvl" => "__builtin_ve_vl_vminswzx_vsvvl",
+                    "vl.vminswzx.vvvl" => "__builtin_ve_vl_vminswzx_vvvl",
+                    "vl.vminswzx.vvvmvl" => "__builtin_ve_vl_vminswzx_vvvmvl",
+                    "vl.vminswzx.vvvvl" => "__builtin_ve_vl_vminswzx_vvvvl",
+                    "vl.vmrg.vsvml" => "__builtin_ve_vl_vmrg_vsvml",
+                    "vl.vmrg.vsvmvl" => "__builtin_ve_vl_vmrg_vsvmvl",
+                    "vl.vmrg.vvvml" => "__builtin_ve_vl_vmrg_vvvml",
+                    "vl.vmrg.vvvmvl" => "__builtin_ve_vl_vmrg_vvvmvl",
+                    "vl.vmrgw.vsvMl" => "__builtin_ve_vl_vmrgw_vsvMl",
+                    "vl.vmrgw.vsvMvl" => "__builtin_ve_vl_vmrgw_vsvMvl",
+                    "vl.vmrgw.vvvMl" => "__builtin_ve_vl_vmrgw_vvvMl",
+                    "vl.vmrgw.vvvMvl" => "__builtin_ve_vl_vmrgw_vvvMvl",
+                    "vl.vmulsl.vsvl" => "__builtin_ve_vl_vmulsl_vsvl",
+                    "vl.vmulsl.vsvmvl" => "__builtin_ve_vl_vmulsl_vsvmvl",
+                    "vl.vmulsl.vsvvl" => "__builtin_ve_vl_vmulsl_vsvvl",
+                    "vl.vmulsl.vvvl" => "__builtin_ve_vl_vmulsl_vvvl",
+                    "vl.vmulsl.vvvmvl" => "__builtin_ve_vl_vmulsl_vvvmvl",
+                    "vl.vmulsl.vvvvl" => "__builtin_ve_vl_vmulsl_vvvvl",
+                    "vl.vmulslw.vsvl" => "__builtin_ve_vl_vmulslw_vsvl",
+                    "vl.vmulslw.vsvvl" => "__builtin_ve_vl_vmulslw_vsvvl",
+                    "vl.vmulslw.vvvl" => "__builtin_ve_vl_vmulslw_vvvl",
+                    "vl.vmulslw.vvvvl" => "__builtin_ve_vl_vmulslw_vvvvl",
+                    "vl.vmulswsx.vsvl" => "__builtin_ve_vl_vmulswsx_vsvl",
+                    "vl.vmulswsx.vsvmvl" => "__builtin_ve_vl_vmulswsx_vsvmvl",
+                    "vl.vmulswsx.vsvvl" => "__builtin_ve_vl_vmulswsx_vsvvl",
+                    "vl.vmulswsx.vvvl" => "__builtin_ve_vl_vmulswsx_vvvl",
+                    "vl.vmulswsx.vvvmvl" => "__builtin_ve_vl_vmulswsx_vvvmvl",
+                    "vl.vmulswsx.vvvvl" => "__builtin_ve_vl_vmulswsx_vvvvl",
+                    "vl.vmulswzx.vsvl" => "__builtin_ve_vl_vmulswzx_vsvl",
+                    "vl.vmulswzx.vsvmvl" => "__builtin_ve_vl_vmulswzx_vsvmvl",
+                    "vl.vmulswzx.vsvvl" => "__builtin_ve_vl_vmulswzx_vsvvl",
+                    "vl.vmulswzx.vvvl" => "__builtin_ve_vl_vmulswzx_vvvl",
+                    "vl.vmulswzx.vvvmvl" => "__builtin_ve_vl_vmulswzx_vvvmvl",
+                    "vl.vmulswzx.vvvvl" => "__builtin_ve_vl_vmulswzx_vvvvl",
+                    "vl.vmulul.vsvl" => "__builtin_ve_vl_vmulul_vsvl",
+                    "vl.vmulul.vsvmvl" => "__builtin_ve_vl_vmulul_vsvmvl",
+                    "vl.vmulul.vsvvl" => "__builtin_ve_vl_vmulul_vsvvl",
+                    "vl.vmulul.vvvl" => "__builtin_ve_vl_vmulul_vvvl",
+                    "vl.vmulul.vvvmvl" => "__builtin_ve_vl_vmulul_vvvmvl",
+                    "vl.vmulul.vvvvl" => "__builtin_ve_vl_vmulul_vvvvl",
+                    "vl.vmuluw.vsvl" => "__builtin_ve_vl_vmuluw_vsvl",
+                    "vl.vmuluw.vsvmvl" => "__builtin_ve_vl_vmuluw_vsvmvl",
+                    "vl.vmuluw.vsvvl" => "__builtin_ve_vl_vmuluw_vsvvl",
+                    "vl.vmuluw.vvvl" => "__builtin_ve_vl_vmuluw_vvvl",
+                    "vl.vmuluw.vvvmvl" => "__builtin_ve_vl_vmuluw_vvvmvl",
+                    "vl.vmuluw.vvvvl" => "__builtin_ve_vl_vmuluw_vvvvl",
+                    "vl.vmv.vsvl" => "__builtin_ve_vl_vmv_vsvl",
+                    "vl.vmv.vsvmvl" => "__builtin_ve_vl_vmv_vsvmvl",
+                    "vl.vmv.vsvvl" => "__builtin_ve_vl_vmv_vsvvl",
+                    "vl.vor.vsvl" => "__builtin_ve_vl_vor_vsvl",
+                    "vl.vor.vsvmvl" => "__builtin_ve_vl_vor_vsvmvl",
+                    "vl.vor.vsvvl" => "__builtin_ve_vl_vor_vsvvl",
+                    "vl.vor.vvvl" => "__builtin_ve_vl_vor_vvvl",
+                    "vl.vor.vvvmvl" => "__builtin_ve_vl_vor_vvvmvl",
+                    "vl.vor.vvvvl" => "__builtin_ve_vl_vor_vvvvl",
+                    "vl.vpcnt.vvl" => "__builtin_ve_vl_vpcnt_vvl",
+                    "vl.vpcnt.vvmvl" => "__builtin_ve_vl_vpcnt_vvmvl",
+                    "vl.vpcnt.vvvl" => "__builtin_ve_vl_vpcnt_vvvl",
+                    "vl.vrand.vvl" => "__builtin_ve_vl_vrand_vvl",
+                    "vl.vrand.vvml" => "__builtin_ve_vl_vrand_vvml",
+                    "vl.vrcpd.vvl" => "__builtin_ve_vl_vrcpd_vvl",
+                    "vl.vrcpd.vvvl" => "__builtin_ve_vl_vrcpd_vvvl",
+                    "vl.vrcps.vvl" => "__builtin_ve_vl_vrcps_vvl",
+                    "vl.vrcps.vvvl" => "__builtin_ve_vl_vrcps_vvvl",
+                    "vl.vrmaxslfst.vvl" => "__builtin_ve_vl_vrmaxslfst_vvl",
+                    "vl.vrmaxslfst.vvvl" => "__builtin_ve_vl_vrmaxslfst_vvvl",
+                    "vl.vrmaxsllst.vvl" => "__builtin_ve_vl_vrmaxsllst_vvl",
+                    "vl.vrmaxsllst.vvvl" => "__builtin_ve_vl_vrmaxsllst_vvvl",
+                    "vl.vrmaxswfstsx.vvl" => "__builtin_ve_vl_vrmaxswfstsx_vvl",
+                    "vl.vrmaxswfstsx.vvvl" => "__builtin_ve_vl_vrmaxswfstsx_vvvl",
+                    "vl.vrmaxswfstzx.vvl" => "__builtin_ve_vl_vrmaxswfstzx_vvl",
+                    "vl.vrmaxswfstzx.vvvl" => "__builtin_ve_vl_vrmaxswfstzx_vvvl",
+                    "vl.vrmaxswlstsx.vvl" => "__builtin_ve_vl_vrmaxswlstsx_vvl",
+                    "vl.vrmaxswlstsx.vvvl" => "__builtin_ve_vl_vrmaxswlstsx_vvvl",
+                    "vl.vrmaxswlstzx.vvl" => "__builtin_ve_vl_vrmaxswlstzx_vvl",
+                    "vl.vrmaxswlstzx.vvvl" => "__builtin_ve_vl_vrmaxswlstzx_vvvl",
+                    "vl.vrminslfst.vvl" => "__builtin_ve_vl_vrminslfst_vvl",
+                    "vl.vrminslfst.vvvl" => "__builtin_ve_vl_vrminslfst_vvvl",
+                    "vl.vrminsllst.vvl" => "__builtin_ve_vl_vrminsllst_vvl",
+                    "vl.vrminsllst.vvvl" => "__builtin_ve_vl_vrminsllst_vvvl",
+                    "vl.vrminswfstsx.vvl" => "__builtin_ve_vl_vrminswfstsx_vvl",
+                    "vl.vrminswfstsx.vvvl" => "__builtin_ve_vl_vrminswfstsx_vvvl",
+                    "vl.vrminswfstzx.vvl" => "__builtin_ve_vl_vrminswfstzx_vvl",
+                    "vl.vrminswfstzx.vvvl" => "__builtin_ve_vl_vrminswfstzx_vvvl",
+                    "vl.vrminswlstsx.vvl" => "__builtin_ve_vl_vrminswlstsx_vvl",
+                    "vl.vrminswlstsx.vvvl" => "__builtin_ve_vl_vrminswlstsx_vvvl",
+                    "vl.vrminswlstzx.vvl" => "__builtin_ve_vl_vrminswlstzx_vvl",
+                    "vl.vrminswlstzx.vvvl" => "__builtin_ve_vl_vrminswlstzx_vvvl",
+                    "vl.vror.vvl" => "__builtin_ve_vl_vror_vvl",
+                    "vl.vror.vvml" => "__builtin_ve_vl_vror_vvml",
+                    "vl.vrsqrtd.vvl" => "__builtin_ve_vl_vrsqrtd_vvl",
+                    "vl.vrsqrtd.vvvl" => "__builtin_ve_vl_vrsqrtd_vvvl",
+                    "vl.vrsqrtdnex.vvl" => "__builtin_ve_vl_vrsqrtdnex_vvl",
+                    "vl.vrsqrtdnex.vvvl" => "__builtin_ve_vl_vrsqrtdnex_vvvl",
+                    "vl.vrsqrts.vvl" => "__builtin_ve_vl_vrsqrts_vvl",
+                    "vl.vrsqrts.vvvl" => "__builtin_ve_vl_vrsqrts_vvvl",
+                    "vl.vrsqrtsnex.vvl" => "__builtin_ve_vl_vrsqrtsnex_vvl",
+                    "vl.vrsqrtsnex.vvvl" => "__builtin_ve_vl_vrsqrtsnex_vvvl",
+                    "vl.vrxor.vvl" => "__builtin_ve_vl_vrxor_vvl",
+                    "vl.vrxor.vvml" => "__builtin_ve_vl_vrxor_vvml",
+                    "vl.vsc.vvssl" => "__builtin_ve_vl_vsc_vvssl",
+                    "vl.vsc.vvssml" => "__builtin_ve_vl_vsc_vvssml",
+                    "vl.vscl.vvssl" => "__builtin_ve_vl_vscl_vvssl",
+                    "vl.vscl.vvssml" => "__builtin_ve_vl_vscl_vvssml",
+                    "vl.vsclnc.vvssl" => "__builtin_ve_vl_vsclnc_vvssl",
+                    "vl.vsclnc.vvssml" => "__builtin_ve_vl_vsclnc_vvssml",
+                    "vl.vsclncot.vvssl" => "__builtin_ve_vl_vsclncot_vvssl",
+                    "vl.vsclncot.vvssml" => "__builtin_ve_vl_vsclncot_vvssml",
+                    "vl.vsclot.vvssl" => "__builtin_ve_vl_vsclot_vvssl",
+                    "vl.vsclot.vvssml" => "__builtin_ve_vl_vsclot_vvssml",
+                    "vl.vscnc.vvssl" => "__builtin_ve_vl_vscnc_vvssl",
+                    "vl.vscnc.vvssml" => "__builtin_ve_vl_vscnc_vvssml",
+                    "vl.vscncot.vvssl" => "__builtin_ve_vl_vscncot_vvssl",
+                    "vl.vscncot.vvssml" => "__builtin_ve_vl_vscncot_vvssml",
+                    "vl.vscot.vvssl" => "__builtin_ve_vl_vscot_vvssl",
+                    "vl.vscot.vvssml" => "__builtin_ve_vl_vscot_vvssml",
+                    "vl.vscu.vvssl" => "__builtin_ve_vl_vscu_vvssl",
+                    "vl.vscu.vvssml" => "__builtin_ve_vl_vscu_vvssml",
+                    "vl.vscunc.vvssl" => "__builtin_ve_vl_vscunc_vvssl",
+                    "vl.vscunc.vvssml" => "__builtin_ve_vl_vscunc_vvssml",
+                    "vl.vscuncot.vvssl" => "__builtin_ve_vl_vscuncot_vvssl",
+                    "vl.vscuncot.vvssml" => "__builtin_ve_vl_vscuncot_vvssml",
+                    "vl.vscuot.vvssl" => "__builtin_ve_vl_vscuot_vvssl",
+                    "vl.vscuot.vvssml" => "__builtin_ve_vl_vscuot_vvssml",
+                    "vl.vseq.vl" => "__builtin_ve_vl_vseq_vl",
+                    "vl.vseq.vvl" => "__builtin_ve_vl_vseq_vvl",
+                    "vl.vsfa.vvssl" => "__builtin_ve_vl_vsfa_vvssl",
+                    "vl.vsfa.vvssmvl" => "__builtin_ve_vl_vsfa_vvssmvl",
+                    "vl.vsfa.vvssvl" => "__builtin_ve_vl_vsfa_vvssvl",
+                    "vl.vshf.vvvsl" => "__builtin_ve_vl_vshf_vvvsl",
+                    "vl.vshf.vvvsvl" => "__builtin_ve_vl_vshf_vvvsvl",
+                    "vl.vslal.vvsl" => "__builtin_ve_vl_vslal_vvsl",
+                    "vl.vslal.vvsmvl" => "__builtin_ve_vl_vslal_vvsmvl",
+                    "vl.vslal.vvsvl" => "__builtin_ve_vl_vslal_vvsvl",
+                    "vl.vslal.vvvl" => "__builtin_ve_vl_vslal_vvvl",
+                    "vl.vslal.vvvmvl" => "__builtin_ve_vl_vslal_vvvmvl",
+                    "vl.vslal.vvvvl" => "__builtin_ve_vl_vslal_vvvvl",
+                    "vl.vslawsx.vvsl" => "__builtin_ve_vl_vslawsx_vvsl",
+                    "vl.vslawsx.vvsmvl" => "__builtin_ve_vl_vslawsx_vvsmvl",
+                    "vl.vslawsx.vvsvl" => "__builtin_ve_vl_vslawsx_vvsvl",
+                    "vl.vslawsx.vvvl" => "__builtin_ve_vl_vslawsx_vvvl",
+                    "vl.vslawsx.vvvmvl" => "__builtin_ve_vl_vslawsx_vvvmvl",
+                    "vl.vslawsx.vvvvl" => "__builtin_ve_vl_vslawsx_vvvvl",
+                    "vl.vslawzx.vvsl" => "__builtin_ve_vl_vslawzx_vvsl",
+                    "vl.vslawzx.vvsmvl" => "__builtin_ve_vl_vslawzx_vvsmvl",
+                    "vl.vslawzx.vvsvl" => "__builtin_ve_vl_vslawzx_vvsvl",
+                    "vl.vslawzx.vvvl" => "__builtin_ve_vl_vslawzx_vvvl",
+                    "vl.vslawzx.vvvmvl" => "__builtin_ve_vl_vslawzx_vvvmvl",
+                    "vl.vslawzx.vvvvl" => "__builtin_ve_vl_vslawzx_vvvvl",
+                    "vl.vsll.vvsl" => "__builtin_ve_vl_vsll_vvsl",
+                    "vl.vsll.vvsmvl" => "__builtin_ve_vl_vsll_vvsmvl",
+                    "vl.vsll.vvsvl" => "__builtin_ve_vl_vsll_vvsvl",
+                    "vl.vsll.vvvl" => "__builtin_ve_vl_vsll_vvvl",
+                    "vl.vsll.vvvmvl" => "__builtin_ve_vl_vsll_vvvmvl",
+                    "vl.vsll.vvvvl" => "__builtin_ve_vl_vsll_vvvvl",
+                    "vl.vsral.vvsl" => "__builtin_ve_vl_vsral_vvsl",
+                    "vl.vsral.vvsmvl" => "__builtin_ve_vl_vsral_vvsmvl",
+                    "vl.vsral.vvsvl" => "__builtin_ve_vl_vsral_vvsvl",
+                    "vl.vsral.vvvl" => "__builtin_ve_vl_vsral_vvvl",
+                    "vl.vsral.vvvmvl" => "__builtin_ve_vl_vsral_vvvmvl",
+                    "vl.vsral.vvvvl" => "__builtin_ve_vl_vsral_vvvvl",
+                    "vl.vsrawsx.vvsl" => "__builtin_ve_vl_vsrawsx_vvsl",
+                    "vl.vsrawsx.vvsmvl" => "__builtin_ve_vl_vsrawsx_vvsmvl",
+                    "vl.vsrawsx.vvsvl" => "__builtin_ve_vl_vsrawsx_vvsvl",
+                    "vl.vsrawsx.vvvl" => "__builtin_ve_vl_vsrawsx_vvvl",
+                    "vl.vsrawsx.vvvmvl" => "__builtin_ve_vl_vsrawsx_vvvmvl",
+                    "vl.vsrawsx.vvvvl" => "__builtin_ve_vl_vsrawsx_vvvvl",
+                    "vl.vsrawzx.vvsl" => "__builtin_ve_vl_vsrawzx_vvsl",
+                    "vl.vsrawzx.vvsmvl" => "__builtin_ve_vl_vsrawzx_vvsmvl",
+                    "vl.vsrawzx.vvsvl" => "__builtin_ve_vl_vsrawzx_vvsvl",
+                    "vl.vsrawzx.vvvl" => "__builtin_ve_vl_vsrawzx_vvvl",
+                    "vl.vsrawzx.vvvmvl" => "__builtin_ve_vl_vsrawzx_vvvmvl",
+                    "vl.vsrawzx.vvvvl" => "__builtin_ve_vl_vsrawzx_vvvvl",
+                    "vl.vsrl.vvsl" => "__builtin_ve_vl_vsrl_vvsl",
+                    "vl.vsrl.vvsmvl" => "__builtin_ve_vl_vsrl_vvsmvl",
+                    "vl.vsrl.vvsvl" => "__builtin_ve_vl_vsrl_vvsvl",
+                    "vl.vsrl.vvvl" => "__builtin_ve_vl_vsrl_vvvl",
+                    "vl.vsrl.vvvmvl" => "__builtin_ve_vl_vsrl_vvvmvl",
+                    "vl.vsrl.vvvvl" => "__builtin_ve_vl_vsrl_vvvvl",
+                    "vl.vst.vssl" => "__builtin_ve_vl_vst_vssl",
+                    "vl.vst.vssml" => "__builtin_ve_vl_vst_vssml",
+                    "vl.vst2d.vssl" => "__builtin_ve_vl_vst2d_vssl",
+                    "vl.vst2d.vssml" => "__builtin_ve_vl_vst2d_vssml",
+                    "vl.vst2dnc.vssl" => "__builtin_ve_vl_vst2dnc_vssl",
+                    "vl.vst2dnc.vssml" => "__builtin_ve_vl_vst2dnc_vssml",
+                    "vl.vst2dncot.vssl" => "__builtin_ve_vl_vst2dncot_vssl",
+                    "vl.vst2dncot.vssml" => "__builtin_ve_vl_vst2dncot_vssml",
+                    "vl.vst2dot.vssl" => "__builtin_ve_vl_vst2dot_vssl",
+                    "vl.vst2dot.vssml" => "__builtin_ve_vl_vst2dot_vssml",
+                    "vl.vstl.vssl" => "__builtin_ve_vl_vstl_vssl",
+                    "vl.vstl.vssml" => "__builtin_ve_vl_vstl_vssml",
+                    "vl.vstl2d.vssl" => "__builtin_ve_vl_vstl2d_vssl",
+                    "vl.vstl2d.vssml" => "__builtin_ve_vl_vstl2d_vssml",
+                    "vl.vstl2dnc.vssl" => "__builtin_ve_vl_vstl2dnc_vssl",
+                    "vl.vstl2dnc.vssml" => "__builtin_ve_vl_vstl2dnc_vssml",
+                    "vl.vstl2dncot.vssl" => "__builtin_ve_vl_vstl2dncot_vssl",
+                    "vl.vstl2dncot.vssml" => "__builtin_ve_vl_vstl2dncot_vssml",
+                    "vl.vstl2dot.vssl" => "__builtin_ve_vl_vstl2dot_vssl",
+                    "vl.vstl2dot.vssml" => "__builtin_ve_vl_vstl2dot_vssml",
+                    "vl.vstlnc.vssl" => "__builtin_ve_vl_vstlnc_vssl",
+                    "vl.vstlnc.vssml" => "__builtin_ve_vl_vstlnc_vssml",
+                    "vl.vstlncot.vssl" => "__builtin_ve_vl_vstlncot_vssl",
+                    "vl.vstlncot.vssml" => "__builtin_ve_vl_vstlncot_vssml",
+                    "vl.vstlot.vssl" => "__builtin_ve_vl_vstlot_vssl",
+                    "vl.vstlot.vssml" => "__builtin_ve_vl_vstlot_vssml",
+                    "vl.vstnc.vssl" => "__builtin_ve_vl_vstnc_vssl",
+                    "vl.vstnc.vssml" => "__builtin_ve_vl_vstnc_vssml",
+                    "vl.vstncot.vssl" => "__builtin_ve_vl_vstncot_vssl",
+                    "vl.vstncot.vssml" => "__builtin_ve_vl_vstncot_vssml",
+                    "vl.vstot.vssl" => "__builtin_ve_vl_vstot_vssl",
+                    "vl.vstot.vssml" => "__builtin_ve_vl_vstot_vssml",
+                    "vl.vstu.vssl" => "__builtin_ve_vl_vstu_vssl",
+                    "vl.vstu.vssml" => "__builtin_ve_vl_vstu_vssml",
+                    "vl.vstu2d.vssl" => "__builtin_ve_vl_vstu2d_vssl",
+                    "vl.vstu2d.vssml" => "__builtin_ve_vl_vstu2d_vssml",
+                    "vl.vstu2dnc.vssl" => "__builtin_ve_vl_vstu2dnc_vssl",
+                    "vl.vstu2dnc.vssml" => "__builtin_ve_vl_vstu2dnc_vssml",
+                    "vl.vstu2dncot.vssl" => "__builtin_ve_vl_vstu2dncot_vssl",
+                    "vl.vstu2dncot.vssml" => "__builtin_ve_vl_vstu2dncot_vssml",
+                    "vl.vstu2dot.vssl" => "__builtin_ve_vl_vstu2dot_vssl",
+                    "vl.vstu2dot.vssml" => "__builtin_ve_vl_vstu2dot_vssml",
+                    "vl.vstunc.vssl" => "__builtin_ve_vl_vstunc_vssl",
+                    "vl.vstunc.vssml" => "__builtin_ve_vl_vstunc_vssml",
+                    "vl.vstuncot.vssl" => "__builtin_ve_vl_vstuncot_vssl",
+                    "vl.vstuncot.vssml" => "__builtin_ve_vl_vstuncot_vssml",
+                    "vl.vstuot.vssl" => "__builtin_ve_vl_vstuot_vssl",
+                    "vl.vstuot.vssml" => "__builtin_ve_vl_vstuot_vssml",
+                    "vl.vsubsl.vsvl" => "__builtin_ve_vl_vsubsl_vsvl",
+                    "vl.vsubsl.vsvmvl" => "__builtin_ve_vl_vsubsl_vsvmvl",
+                    "vl.vsubsl.vsvvl" => "__builtin_ve_vl_vsubsl_vsvvl",
+                    "vl.vsubsl.vvvl" => "__builtin_ve_vl_vsubsl_vvvl",
+                    "vl.vsubsl.vvvmvl" => "__builtin_ve_vl_vsubsl_vvvmvl",
+                    "vl.vsubsl.vvvvl" => "__builtin_ve_vl_vsubsl_vvvvl",
+                    "vl.vsubswsx.vsvl" => "__builtin_ve_vl_vsubswsx_vsvl",
+                    "vl.vsubswsx.vsvmvl" => "__builtin_ve_vl_vsubswsx_vsvmvl",
+                    "vl.vsubswsx.vsvvl" => "__builtin_ve_vl_vsubswsx_vsvvl",
+                    "vl.vsubswsx.vvvl" => "__builtin_ve_vl_vsubswsx_vvvl",
+                    "vl.vsubswsx.vvvmvl" => "__builtin_ve_vl_vsubswsx_vvvmvl",
+                    "vl.vsubswsx.vvvvl" => "__builtin_ve_vl_vsubswsx_vvvvl",
+                    "vl.vsubswzx.vsvl" => "__builtin_ve_vl_vsubswzx_vsvl",
+                    "vl.vsubswzx.vsvmvl" => "__builtin_ve_vl_vsubswzx_vsvmvl",
+                    "vl.vsubswzx.vsvvl" => "__builtin_ve_vl_vsubswzx_vsvvl",
+                    "vl.vsubswzx.vvvl" => "__builtin_ve_vl_vsubswzx_vvvl",
+                    "vl.vsubswzx.vvvmvl" => "__builtin_ve_vl_vsubswzx_vvvmvl",
+                    "vl.vsubswzx.vvvvl" => "__builtin_ve_vl_vsubswzx_vvvvl",
+                    "vl.vsubul.vsvl" => "__builtin_ve_vl_vsubul_vsvl",
+                    "vl.vsubul.vsvmvl" => "__builtin_ve_vl_vsubul_vsvmvl",
+                    "vl.vsubul.vsvvl" => "__builtin_ve_vl_vsubul_vsvvl",
+                    "vl.vsubul.vvvl" => "__builtin_ve_vl_vsubul_vvvl",
+                    "vl.vsubul.vvvmvl" => "__builtin_ve_vl_vsubul_vvvmvl",
+                    "vl.vsubul.vvvvl" => "__builtin_ve_vl_vsubul_vvvvl",
+                    "vl.vsubuw.vsvl" => "__builtin_ve_vl_vsubuw_vsvl",
+                    "vl.vsubuw.vsvmvl" => "__builtin_ve_vl_vsubuw_vsvmvl",
+                    "vl.vsubuw.vsvvl" => "__builtin_ve_vl_vsubuw_vsvvl",
+                    "vl.vsubuw.vvvl" => "__builtin_ve_vl_vsubuw_vvvl",
+                    "vl.vsubuw.vvvmvl" => "__builtin_ve_vl_vsubuw_vvvmvl",
+                    "vl.vsubuw.vvvvl" => "__builtin_ve_vl_vsubuw_vvvvl",
+                    "vl.vsuml.vvl" => "__builtin_ve_vl_vsuml_vvl",
+                    "vl.vsuml.vvml" => "__builtin_ve_vl_vsuml_vvml",
+                    "vl.vsumwsx.vvl" => "__builtin_ve_vl_vsumwsx_vvl",
+                    "vl.vsumwsx.vvml" => "__builtin_ve_vl_vsumwsx_vvml",
+                    "vl.vsumwzx.vvl" => "__builtin_ve_vl_vsumwzx_vvl",
+                    "vl.vsumwzx.vvml" => "__builtin_ve_vl_vsumwzx_vvml",
+                    "vl.vxor.vsvl" => "__builtin_ve_vl_vxor_vsvl",
+                    "vl.vxor.vsvmvl" => "__builtin_ve_vl_vxor_vsvmvl",
+                    "vl.vxor.vsvvl" => "__builtin_ve_vl_vxor_vsvvl",
+                    "vl.vxor.vvvl" => "__builtin_ve_vl_vxor_vvvl",
+                    "vl.vxor.vvvmvl" => "__builtin_ve_vl_vxor_vvvmvl",
+                    "vl.vxor.vvvvl" => "__builtin_ve_vl_vxor_vvvvl",
+                    "vl.xorm.MMM" => "__builtin_ve_vl_xorm_MMM",
+                    "vl.xorm.mmm" => "__builtin_ve_vl_xorm_mmm",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            ve(name)
+        }
+        "x86" => {
+            #[allow(non_snake_case)]
+            fn x86(name: &str) -> &str {
+                match name {
+                    // x86
+                    "aadd32" => "__builtin_ia32_aadd32",
+                    "aadd64" => "__builtin_ia32_aadd64",
+                    "aand32" => "__builtin_ia32_aand32",
+                    "aand64" => "__builtin_ia32_aand64",
+                    "addcarry.u32" => "__builtin_ia32_addcarry_u32",
+                    "addcarry.u64" => "__builtin_ia32_addcarry_u64",
+                    "addcarryx.u32" => "__builtin_ia32_addcarryx_u32",
+                    "addcarryx.u64" => "__builtin_ia32_addcarryx_u64",
+                    "aesni.aesdec" => "__builtin_ia32_aesdec128",
+                    "aesni.aesdec.256" => "__builtin_ia32_aesdec256",
+                    "aesni.aesdec.512" => "__builtin_ia32_aesdec512",
+                    "aesni.aesdeclast" => "__builtin_ia32_aesdeclast128",
+                    "aesni.aesdeclast.256" => "__builtin_ia32_aesdeclast256",
+                    "aesni.aesdeclast.512" => "__builtin_ia32_aesdeclast512",
+                    "aesni.aesenc" => "__builtin_ia32_aesenc128",
+                    "aesni.aesenc.256" => "__builtin_ia32_aesenc256",
+                    "aesni.aesenc.512" => "__builtin_ia32_aesenc512",
+                    "aesni.aesenclast" => "__builtin_ia32_aesenclast128",
+                    "aesni.aesenclast.256" => "__builtin_ia32_aesenclast256",
+                    "aesni.aesenclast.512" => "__builtin_ia32_aesenclast512",
+                    "aesni.aesimc" => "__builtin_ia32_aesimc128",
+                    "aesni.aeskeygenassist" => "__builtin_ia32_aeskeygenassist128",
+                    "aor32" => "__builtin_ia32_aor32",
+                    "aor64" => "__builtin_ia32_aor64",
+                    "avx.addsub.pd.256" => "__builtin_ia32_addsubpd256",
+                    "avx.addsub.ps.256" => "__builtin_ia32_addsubps256",
+                    "avx.blend.pd.256" => "__builtin_ia32_blendpd256",
+                    "avx.blend.ps.256" => "__builtin_ia32_blendps256",
+                    "avx.blendv.pd.256" => "__builtin_ia32_blendvpd256",
+                    "avx.blendv.ps.256" => "__builtin_ia32_blendvps256",
+                    "avx.cmp.pd.256" => "__builtin_ia32_cmppd256",
+                    "avx.cmp.ps.256" => "__builtin_ia32_cmpps256",
+                    "avx.cvt.pd2.ps.256" => "__builtin_ia32_cvtpd2ps256",
+                    "avx.cvt.pd2dq.256" => "__builtin_ia32_cvtpd2dq256",
+                    "avx.cvt.ps2.pd.256" => "__builtin_ia32_cvtps2pd256",
+                    "avx.cvt.ps2dq.256" => "__builtin_ia32_cvtps2dq256",
+                    "avx.cvtdq2.pd.256" => "__builtin_ia32_cvtdq2pd256",
+                    "avx.cvtdq2.ps.256" => "__builtin_ia32_cvtdq2ps256",
+                    "avx.cvtt.pd2dq.256" => "__builtin_ia32_cvttpd2dq256",
+                    "avx.cvtt.ps2dq.256" => "__builtin_ia32_cvttps2dq256",
+                    "avx.dp.ps.256" => "__builtin_ia32_dpps256",
+                    "avx.hadd.pd.256" => "__builtin_ia32_haddpd256",
+                    "avx.hadd.ps.256" => "__builtin_ia32_haddps256",
+                    "avx.hsub.pd.256" => "__builtin_ia32_hsubpd256",
+                    "avx.hsub.ps.256" => "__builtin_ia32_hsubps256",
+                    "avx.ldu.dq.256" => "__builtin_ia32_lddqu256",
+                    "avx.maskload.pd" => "__builtin_ia32_maskloadpd",
+                    "avx.maskload.pd.256" => "__builtin_ia32_maskloadpd256",
+                    "avx.maskload.ps" => "__builtin_ia32_maskloadps",
+                    "avx.maskload.ps.256" => "__builtin_ia32_maskloadps256",
+                    "avx.maskstore.pd" => "__builtin_ia32_maskstorepd",
+                    "avx.maskstore.pd.256" => "__builtin_ia32_maskstorepd256",
+                    "avx.maskstore.ps" => "__builtin_ia32_maskstoreps",
+                    "avx.maskstore.ps.256" => "__builtin_ia32_maskstoreps256",
+                    "avx.max.pd.256" => "__builtin_ia32_maxpd256",
+                    "avx.max.ps.256" => "__builtin_ia32_maxps256",
+                    "avx.min.pd.256" => "__builtin_ia32_minpd256",
+                    "avx.min.ps.256" => "__builtin_ia32_minps256",
+                    "avx.movmsk.pd.256" => "__builtin_ia32_movmskpd256",
+                    "avx.movmsk.ps.256" => "__builtin_ia32_movmskps256",
+                    "avx.ptestc.256" => "__builtin_ia32_ptestc256",
+                    "avx.ptestnzc.256" => "__builtin_ia32_ptestnzc256",
+                    "avx.ptestz.256" => "__builtin_ia32_ptestz256",
+                    "avx.rcp.ps.256" => "__builtin_ia32_rcpps256",
+                    "avx.round.pd.256" => "__builtin_ia32_roundpd256",
+                    "avx.round.ps.256" => "__builtin_ia32_roundps256",
+                    "avx.rsqrt.ps.256" => "__builtin_ia32_rsqrtps256",
+                    "avx.sqrt.pd.256" => "__builtin_ia32_sqrtpd256",
+                    "avx.sqrt.ps.256" => "__builtin_ia32_sqrtps256",
+                    "avx.storeu.dq.256" => "__builtin_ia32_storedqu256",
+                    "avx.storeu.pd.256" => "__builtin_ia32_storeupd256",
+                    "avx.storeu.ps.256" => "__builtin_ia32_storeups256",
+                    "avx.vbroadcastf128.pd.256" => "__builtin_ia32_vbroadcastf128_pd256",
+                    "avx.vbroadcastf128.ps.256" => "__builtin_ia32_vbroadcastf128_ps256",
+                    "avx.vextractf128.pd.256" => "__builtin_ia32_vextractf128_pd256",
+                    "avx.vextractf128.ps.256" => "__builtin_ia32_vextractf128_ps256",
+                    "avx.vextractf128.si.256" => "__builtin_ia32_vextractf128_si256",
+                    "avx.vinsertf128.pd.256" => "__builtin_ia32_vinsertf128_pd256",
+                    "avx.vinsertf128.ps.256" => "__builtin_ia32_vinsertf128_ps256",
+                    "avx.vinsertf128.si.256" => "__builtin_ia32_vinsertf128_si256",
+                    "avx.vperm2f128.pd.256" => "__builtin_ia32_vperm2f128_pd256",
+                    "avx.vperm2f128.ps.256" => "__builtin_ia32_vperm2f128_ps256",
+                    "avx.vperm2f128.si.256" => "__builtin_ia32_vperm2f128_si256",
+                    "avx.vpermilvar.pd" => "__builtin_ia32_vpermilvarpd",
+                    "avx.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256",
+                    "avx.vpermilvar.ps" => "__builtin_ia32_vpermilvarps",
+                    "avx.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256",
+                    "avx.vtestc.pd" => "__builtin_ia32_vtestcpd",
+                    "avx.vtestc.pd.256" => "__builtin_ia32_vtestcpd256",
+                    "avx.vtestc.ps" => "__builtin_ia32_vtestcps",
+                    "avx.vtestc.ps.256" => "__builtin_ia32_vtestcps256",
+                    "avx.vtestnzc.pd" => "__builtin_ia32_vtestnzcpd",
+                    "avx.vtestnzc.pd.256" => "__builtin_ia32_vtestnzcpd256",
+                    "avx.vtestnzc.ps" => "__builtin_ia32_vtestnzcps",
+                    "avx.vtestnzc.ps.256" => "__builtin_ia32_vtestnzcps256",
+                    "avx.vtestz.pd" => "__builtin_ia32_vtestzpd",
+                    "avx.vtestz.pd.256" => "__builtin_ia32_vtestzpd256",
+                    "avx.vtestz.ps" => "__builtin_ia32_vtestzps",
+                    "avx.vtestz.ps.256" => "__builtin_ia32_vtestzps256",
+                    "avx.vzeroall" => "__builtin_ia32_vzeroall",
+                    "avx.vzeroupper" => "__builtin_ia32_vzeroupper",
+                    "avx10.mask.getexp.bf16.128" => "__builtin_ia32_vgetexpbf16128_mask",
+                    "avx10.mask.getexp.bf16.256" => "__builtin_ia32_vgetexpbf16256_mask",
+                    "avx10.mask.getexp.bf16.512" => "__builtin_ia32_vgetexpbf16512_mask",
+                    "avx10.mask.getmant.bf16.128" => "__builtin_ia32_vgetmantbf16128_mask",
+                    "avx10.mask.getmant.bf16.256" => "__builtin_ia32_vgetmantbf16256_mask",
+                    "avx10.mask.getmant.bf16.512" => "__builtin_ia32_vgetmantbf16512_mask",
+                    "avx10.mask.rcp.bf16.128" => "__builtin_ia32_vrcpbf16128_mask",
+                    "avx10.mask.rcp.bf16.256" => "__builtin_ia32_vrcpbf16256_mask",
+                    "avx10.mask.rcp.bf16.512" => "__builtin_ia32_vrcpbf16512_mask",
+                    "avx10.mask.reduce.bf16.128" => "__builtin_ia32_vreducebf16128_mask",
+                    "avx10.mask.reduce.bf16.256" => "__builtin_ia32_vreducebf16256_mask",
+                    "avx10.mask.reduce.bf16.512" => "__builtin_ia32_vreducebf16512_mask",
+                    "avx10.mask.rndscale.bf16.128" => "__builtin_ia32_vrndscalebf16_128_mask",
+                    "avx10.mask.rndscale.bf16.256" => "__builtin_ia32_vrndscalebf16_256_mask",
+                    "avx10.mask.rndscale.bf16.512" => "__builtin_ia32_vrndscalebf16_mask",
+                    "avx10.mask.rsqrt.bf16.128" => "__builtin_ia32_vrsqrtbf16128_mask",
+                    "avx10.mask.rsqrt.bf16.256" => "__builtin_ia32_vrsqrtbf16256_mask",
+                    "avx10.mask.rsqrt.bf16.512" => "__builtin_ia32_vrsqrtbf16512_mask",
+                    "avx10.mask.scalef.bf16.128" => "__builtin_ia32_vscalefbf16128_mask",
+                    "avx10.mask.scalef.bf16.256" => "__builtin_ia32_vscalefbf16256_mask",
+                    "avx10.mask.scalef.bf16.512" => "__builtin_ia32_vscalefbf16512_mask",
+                    "avx10.mask.vcvt2ps2phx.128" => "__builtin_ia32_vcvt2ps2phx128_mask",
+                    "avx10.mask.vcvt2ps2phx.256" => "__builtin_ia32_vcvt2ps2phx256_mask",
+                    "avx10.mask.vcvt2ps2phx.512" => "__builtin_ia32_vcvt2ps2phx512_mask",
+                    "avx10.mask.vcvtbiasph2bf8128" => "__builtin_ia32_vcvtbiasph2bf8_128_mask",
+                    "avx10.mask.vcvtbiasph2bf8256" => "__builtin_ia32_vcvtbiasph2bf8_256_mask",
+                    "avx10.mask.vcvtbiasph2bf8512" => "__builtin_ia32_vcvtbiasph2bf8_512_mask",
+                    "avx10.mask.vcvtbiasph2bf8s128" => "__builtin_ia32_vcvtbiasph2bf8s_128_mask",
+                    "avx10.mask.vcvtbiasph2bf8s256" => "__builtin_ia32_vcvtbiasph2bf8s_256_mask",
+                    "avx10.mask.vcvtbiasph2bf8s512" => "__builtin_ia32_vcvtbiasph2bf8s_512_mask",
+                    "avx10.mask.vcvtbiasph2hf8128" => "__builtin_ia32_vcvtbiasph2hf8_128_mask",
+                    "avx10.mask.vcvtbiasph2hf8256" => "__builtin_ia32_vcvtbiasph2hf8_256_mask",
+                    "avx10.mask.vcvtbiasph2hf8512" => "__builtin_ia32_vcvtbiasph2hf8_512_mask",
+                    "avx10.mask.vcvtbiasph2hf8s128" => "__builtin_ia32_vcvtbiasph2hf8s_128_mask",
+                    "avx10.mask.vcvtbiasph2hf8s256" => "__builtin_ia32_vcvtbiasph2hf8s_256_mask",
+                    "avx10.mask.vcvtbiasph2hf8s512" => "__builtin_ia32_vcvtbiasph2hf8s_512_mask",
+                    "avx10.mask.vcvthf82ph128" => "__builtin_ia32_vcvthf8_2ph128_mask",
+                    "avx10.mask.vcvthf82ph256" => "__builtin_ia32_vcvthf8_2ph256_mask",
+                    "avx10.mask.vcvthf82ph512" => "__builtin_ia32_vcvthf8_2ph512_mask",
+                    "avx10.mask.vcvtph2bf8128" => "__builtin_ia32_vcvtph2bf8_128_mask",
+                    "avx10.mask.vcvtph2bf8256" => "__builtin_ia32_vcvtph2bf8_256_mask",
+                    "avx10.mask.vcvtph2bf8512" => "__builtin_ia32_vcvtph2bf8_512_mask",
+                    "avx10.mask.vcvtph2bf8s128" => "__builtin_ia32_vcvtph2bf8s_128_mask",
+                    "avx10.mask.vcvtph2bf8s256" => "__builtin_ia32_vcvtph2bf8s_256_mask",
+                    "avx10.mask.vcvtph2bf8s512" => "__builtin_ia32_vcvtph2bf8s_512_mask",
+                    "avx10.mask.vcvtph2hf8128" => "__builtin_ia32_vcvtph2hf8_128_mask",
+                    "avx10.mask.vcvtph2hf8256" => "__builtin_ia32_vcvtph2hf8_256_mask",
+                    "avx10.mask.vcvtph2hf8512" => "__builtin_ia32_vcvtph2hf8_512_mask",
+                    "avx10.mask.vcvtph2hf8s128" => "__builtin_ia32_vcvtph2hf8s_128_mask",
+                    "avx10.mask.vcvtph2hf8s256" => "__builtin_ia32_vcvtph2hf8s_256_mask",
+                    "avx10.mask.vcvtph2hf8s512" => "__builtin_ia32_vcvtph2hf8s_512_mask",
+                    "avx10.mask.vcvtph2ibs128" => "__builtin_ia32_vcvtph2ibs128_mask",
+                    "avx10.mask.vcvtph2ibs256" => "__builtin_ia32_vcvtph2ibs256_mask",
+                    "avx10.mask.vcvtph2ibs512" => "__builtin_ia32_vcvtph2ibs512_mask",
+                    "avx10.mask.vcvtph2iubs128" => "__builtin_ia32_vcvtph2iubs128_mask",
+                    "avx10.mask.vcvtph2iubs256" => "__builtin_ia32_vcvtph2iubs256_mask",
+                    "avx10.mask.vcvtph2iubs512" => "__builtin_ia32_vcvtph2iubs512_mask",
+                    "avx10.mask.vcvtps2ibs128" => "__builtin_ia32_vcvtps2ibs128_mask",
+                    "avx10.mask.vcvtps2ibs256" => "__builtin_ia32_vcvtps2ibs256_mask",
+                    "avx10.mask.vcvtps2ibs512" => "__builtin_ia32_vcvtps2ibs512_mask",
+                    "avx10.mask.vcvtps2iubs128" => "__builtin_ia32_vcvtps2iubs128_mask",
+                    "avx10.mask.vcvtps2iubs256" => "__builtin_ia32_vcvtps2iubs256_mask",
+                    "avx10.mask.vcvtps2iubs512" => "__builtin_ia32_vcvtps2iubs512_mask",
+                    "avx10.mask.vcvttpd2dqs.128" => "__builtin_ia32_vcvttpd2dqs128_mask",
+                    "avx10.mask.vcvttpd2dqs.256" => "__builtin_ia32_vcvttpd2dqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttpd2dqs.round.512" => "__builtin_ia32_vcvttpd2dqs512_round_mask",
+                    "avx10.mask.vcvttpd2qqs.128" => "__builtin_ia32_vcvttpd2qqs128_mask",
+                    "avx10.mask.vcvttpd2qqs.256" => "__builtin_ia32_vcvttpd2qqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttpd2qqs.round.512" => "__builtin_ia32_vcvttpd2qqs512_round_mask",
+                    "avx10.mask.vcvttpd2udqs.128" => "__builtin_ia32_vcvttpd2udqs128_mask",
+                    "avx10.mask.vcvttpd2udqs.256" => "__builtin_ia32_vcvttpd2udqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttpd2udqs.round.512" => "__builtin_ia32_vcvttpd2udqs512_round_mask",
+                    "avx10.mask.vcvttpd2uqqs.128" => "__builtin_ia32_vcvttpd2uqqs128_mask",
+                    "avx10.mask.vcvttpd2uqqs.256" => "__builtin_ia32_vcvttpd2uqqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttpd2uqqs.round.512" => "__builtin_ia32_vcvttpd2uqqs512_round_mask",
+                    "avx10.mask.vcvttph2ibs128" => "__builtin_ia32_vcvttph2ibs128_mask",
+                    "avx10.mask.vcvttph2ibs256" => "__builtin_ia32_vcvttph2ibs256_mask",
+                    "avx10.mask.vcvttph2ibs512" => "__builtin_ia32_vcvttph2ibs512_mask",
+                    "avx10.mask.vcvttph2iubs128" => "__builtin_ia32_vcvttph2iubs128_mask",
+                    "avx10.mask.vcvttph2iubs256" => "__builtin_ia32_vcvttph2iubs256_mask",
+                    "avx10.mask.vcvttph2iubs512" => "__builtin_ia32_vcvttph2iubs512_mask",
+                    "avx10.mask.vcvttps2dqs.128" => "__builtin_ia32_vcvttps2dqs128_mask",
+                    "avx10.mask.vcvttps2dqs.256" => "__builtin_ia32_vcvttps2dqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttps2dqs.round.512" => "__builtin_ia32_vcvttps2dqs512_round_mask",
+                    "avx10.mask.vcvttps2ibs128" => "__builtin_ia32_vcvttps2ibs128_mask",
+                    "avx10.mask.vcvttps2ibs256" => "__builtin_ia32_vcvttps2ibs256_mask",
+                    "avx10.mask.vcvttps2ibs512" => "__builtin_ia32_vcvttps2ibs512_mask",
+                    "avx10.mask.vcvttps2iubs128" => "__builtin_ia32_vcvttps2iubs128_mask",
+                    "avx10.mask.vcvttps2iubs256" => "__builtin_ia32_vcvttps2iubs256_mask",
+                    "avx10.mask.vcvttps2iubs512" => "__builtin_ia32_vcvttps2iubs512_mask",
+                    "avx10.mask.vcvttps2qqs.128" => "__builtin_ia32_vcvttps2qqs128_mask",
+                    "avx10.mask.vcvttps2qqs.256" => "__builtin_ia32_vcvttps2qqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttps2qqs.round.512" => "__builtin_ia32_vcvttps2qqs512_round_mask",
+                    "avx10.mask.vcvttps2udqs.128" => "__builtin_ia32_vcvttps2udqs128_mask",
+                    "avx10.mask.vcvttps2udqs.256" => "__builtin_ia32_vcvttps2udqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttps2udqs.round.512" => "__builtin_ia32_vcvttps2udqs512_round_mask",
+                    "avx10.mask.vcvttps2uqqs.128" => "__builtin_ia32_vcvttps2uqqs128_mask",
+                    "avx10.mask.vcvttps2uqqs.256" => "__builtin_ia32_vcvttps2uqqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttps2uqqs.round.512" => "__builtin_ia32_vcvttps2uqqs512_round_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vminmaxpd.round" => "__builtin_ia32_vminmaxpd512_round_mask",
+                    "avx10.mask.vminmaxpd128" => "__builtin_ia32_vminmaxpd128_mask",
+                    "avx10.mask.vminmaxpd256" => "__builtin_ia32_vminmaxpd256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vminmaxph.round" => "__builtin_ia32_vminmaxph512_round_mask",
+                    "avx10.mask.vminmaxph128" => "__builtin_ia32_vminmaxph128_mask",
+                    "avx10.mask.vminmaxph256" => "__builtin_ia32_vminmaxph256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vminmaxps.round" => "__builtin_ia32_vminmaxps512_round_mask",
+                    "avx10.mask.vminmaxps128" => "__builtin_ia32_vminmaxps128_mask",
+                    "avx10.mask.vminmaxps256" => "__builtin_ia32_vminmaxps256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vminmaxsd.round" => "__builtin_ia32_vminmaxsd_round_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vminmaxsh.round" => "__builtin_ia32_vminmaxsh_round_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vminmaxss.round" => "__builtin_ia32_vminmaxss_round_mask",
+                    "avx10.vaddbf16128" => "__builtin_ia32_vaddbf16128",
+                    "avx10.vaddbf16256" => "__builtin_ia32_vaddbf16256",
+                    "avx10.vaddbf16512" => "__builtin_ia32_vaddbf16512",
+                    "avx10.vaddpd256" => "__builtin_ia32_vaddpd256_round",
+                    "avx10.vaddph256" => "__builtin_ia32_vaddph256_round",
+                    "avx10.vaddps256" => "__builtin_ia32_vaddps256_round",
+                    "avx10.vcomisbf16eq" => "__builtin_ia32_vcomisbf16eq",
+                    "avx10.vcomisbf16ge" => "__builtin_ia32_vcomisbf16ge",
+                    "avx10.vcomisbf16gt" => "__builtin_ia32_vcomisbf16gt",
+                    "avx10.vcomisbf16le" => "__builtin_ia32_vcomisbf16le",
+                    "avx10.vcomisbf16lt" => "__builtin_ia32_vcomisbf16lt",
+                    "avx10.vcomisbf16neq" => "__builtin_ia32_vcomisbf16neq",
+                    "avx10.vcvt2ph2bf8128" => "__builtin_ia32_vcvt2ph2bf8_128",
+                    "avx10.vcvt2ph2bf8256" => "__builtin_ia32_vcvt2ph2bf8_256",
+                    "avx10.vcvt2ph2bf8512" => "__builtin_ia32_vcvt2ph2bf8_512",
+                    "avx10.vcvt2ph2bf8s128" => "__builtin_ia32_vcvt2ph2bf8s_128",
+                    "avx10.vcvt2ph2bf8s256" => "__builtin_ia32_vcvt2ph2bf8s_256",
+                    "avx10.vcvt2ph2bf8s512" => "__builtin_ia32_vcvt2ph2bf8s_512",
+                    "avx10.vcvt2ph2hf8128" => "__builtin_ia32_vcvt2ph2hf8_128",
+                    "avx10.vcvt2ph2hf8256" => "__builtin_ia32_vcvt2ph2hf8_256",
+                    "avx10.vcvt2ph2hf8512" => "__builtin_ia32_vcvt2ph2hf8_512",
+                    "avx10.vcvt2ph2hf8s128" => "__builtin_ia32_vcvt2ph2hf8s_128",
+                    "avx10.vcvt2ph2hf8s256" => "__builtin_ia32_vcvt2ph2hf8s_256",
+                    "avx10.vcvt2ph2hf8s512" => "__builtin_ia32_vcvt2ph2hf8s_512",
+                    "avx10.vcvtbf162ibs128" => "__builtin_ia32_vcvtbf162ibs128",
+                    "avx10.vcvtbf162ibs256" => "__builtin_ia32_vcvtbf162ibs256",
+                    "avx10.vcvtbf162ibs512" => "__builtin_ia32_vcvtbf162ibs512",
+                    "avx10.vcvtbf162iubs128" => "__builtin_ia32_vcvtbf162iubs128",
+                    "avx10.vcvtbf162iubs256" => "__builtin_ia32_vcvtbf162iubs256",
+                    "avx10.vcvtbf162iubs512" => "__builtin_ia32_vcvtbf162iubs512",
+                    "avx10.vcvttbf162ibs128" => "__builtin_ia32_vcvttbf162ibs128",
+                    "avx10.vcvttbf162ibs256" => "__builtin_ia32_vcvttbf162ibs256",
+                    "avx10.vcvttbf162ibs512" => "__builtin_ia32_vcvttbf162ibs512",
+                    "avx10.vcvttbf162iubs128" => "__builtin_ia32_vcvttbf162iubs128",
+                    "avx10.vcvttbf162iubs256" => "__builtin_ia32_vcvttbf162iubs256",
+                    "avx10.vcvttbf162iubs512" => "__builtin_ia32_vcvttbf162iubs512",
+                    "avx10.vcvttsd2sis" => "__builtin_ia32_vcvttsd2sis32",
+                    "avx10.vcvttsd2sis64" => "__builtin_ia32_vcvttsd2sis64",
+                    "avx10.vcvttsd2usis" => "__builtin_ia32_vcvttsd2usis32",
+                    "avx10.vcvttsd2usis64" => "__builtin_ia32_vcvttsd2usis64",
+                    "avx10.vcvttss2sis" => "__builtin_ia32_vcvttss2sis32",
+                    "avx10.vcvttss2sis64" => "__builtin_ia32_vcvttss2sis64",
+                    "avx10.vcvttss2usis" => "__builtin_ia32_vcvttss2usis32",
+                    "avx10.vcvttss2usis64" => "__builtin_ia32_vcvttss2usis64",
+                    "avx10.vdivbf16128" => "__builtin_ia32_vdivbf16128",
+                    "avx10.vdivbf16256" => "__builtin_ia32_vdivbf16256",
+                    "avx10.vdivbf16512" => "__builtin_ia32_vdivbf16512",
+                    "avx10.vdpphps.128" => "__builtin_ia32_vdpphps128",
+                    "avx10.vdpphps.256" => "__builtin_ia32_vdpphps256",
+                    "avx10.vdpphps.512" => "__builtin_ia32_vdpphps512",
+                    "avx10.vfmadd132bf16128" => "__builtin_ia32_vfmadd132bf16128",
+                    "avx10.vfmadd132bf16256" => "__builtin_ia32_vfmadd132bf16256",
+                    "avx10.vfmadd132bf16512" => "__builtin_ia32_vfmadd132bf16512",
+                    "avx10.vfmadd213bf16128" => "__builtin_ia32_vfmadd213bf16128",
+                    "avx10.vfmadd213bf16256" => "__builtin_ia32_vfmadd213bf16256",
+                    "avx10.vfmadd231bf16128" => "__builtin_ia32_vfmadd231bf16128",
+                    "avx10.vfmadd231bf16256" => "__builtin_ia32_vfmadd231bf16256",
+                    "avx10.vfmadd231bf16512" => "__builtin_ia32_vfmadd231bf16512",
+                    "avx10.vfmsub132bf16128" => "__builtin_ia32_vfmsub132bf16128",
+                    "avx10.vfmsub132bf16256" => "__builtin_ia32_vfmsub132bf16256",
+                    "avx10.vfmsub132bf16512" => "__builtin_ia32_vfmsub132bf16512",
+                    "avx10.vfmsub213bf16128" => "__builtin_ia32_vfmsub213bf16128",
+                    "avx10.vfmsub213bf16256" => "__builtin_ia32_vfmsub213bf16256",
+                    "avx10.vfmsub213bf16512" => "__builtin_ia32_vfmsub213bf16512",
+                    "avx10.vfmsub231bf16128" => "__builtin_ia32_vfmsub231bf16128",
+                    "avx10.vfmsub231bf16256" => "__builtin_ia32_vfmsub231bf16256",
+                    "avx10.vfmsub231bf16512" => "__builtin_ia32_vfmsub231bf16512",
+                    "avx10.vfnmadd132bf16128" => "__builtin_ia32_vfnmadd132bf16128",
+                    "avx10.vfnmadd132bf16256" => "__builtin_ia32_vfnmadd132bf16256",
+                    "avx10.vfnmadd132bf16512" => "__builtin_ia32_vfnmadd132bf16512",
+                    "avx10.vfnmadd213bf16128" => "__builtin_ia32_vfnmadd213bf16128",
+                    "avx10.vfnmadd213bf16256" => "__builtin_ia32_vfnmadd213bf16256",
+                    "avx10.vfnmadd213bf16512" => "__builtin_ia32_vfnmadd213bf16512",
+                    "avx10.vfnmadd231bf16128" => "__builtin_ia32_vfnmadd231bf16128",
+                    "avx10.vfnmadd231bf16256" => "__builtin_ia32_vfnmadd231bf16256",
+                    "avx10.vfnmadd231bf16512" => "__builtin_ia32_vfnmadd231bf16512",
+                    "avx10.vfnmsub132bf16128" => "__builtin_ia32_vfnmsub132bf16128",
+                    "avx10.vfnmsub132bf16256" => "__builtin_ia32_vfnmsub132bf16256",
+                    "avx10.vfnmsub132bf16512" => "__builtin_ia32_vfnmsub132bf16512",
+                    "avx10.vfnmsub213bf16128" => "__builtin_ia32_vfnmsub213bf16128",
+                    "avx10.vfnmsub213bf16256" => "__builtin_ia32_vfnmsub213bf16256",
+                    "avx10.vfnmsub213bf16512" => "__builtin_ia32_vfnmsub213bf16512",
+                    "avx10.vfnmsub231bf16128" => "__builtin_ia32_vfnmsub231bf16128",
+                    "avx10.vfnmsub231bf16256" => "__builtin_ia32_vfnmsub231bf16256",
+                    "avx10.vfnmsub231bf16512" => "__builtin_ia32_vfnmsub231bf16512",
+                    "avx10.vmaxbf16128" => "__builtin_ia32_vmaxbf16128",
+                    "avx10.vmaxbf16256" => "__builtin_ia32_vmaxbf16256",
+                    "avx10.vmaxbf16512" => "__builtin_ia32_vmaxbf16512",
+                    "avx10.vminbf16128" => "__builtin_ia32_vminbf16128",
+                    "avx10.vminbf16256" => "__builtin_ia32_vminbf16256",
+                    "avx10.vminbf16512" => "__builtin_ia32_vminbf16512",
+                    "avx10.vminmaxbf16128" => "__builtin_ia32_vminmaxbf16128",
+                    "avx10.vminmaxbf16256" => "__builtin_ia32_vminmaxbf16256",
+                    "avx10.vminmaxbf16512" => "__builtin_ia32_vminmaxbf16512",
+                    "avx10.vminmaxpd128" => "__builtin_ia32_vminmaxpd128",
+                    "avx10.vminmaxpd256" => "__builtin_ia32_vminmaxpd256",
+                    "avx10.vminmaxph128" => "__builtin_ia32_vminmaxph128",
+                    "avx10.vminmaxph256" => "__builtin_ia32_vminmaxph256",
+                    "avx10.vminmaxps128" => "__builtin_ia32_vminmaxps128",
+                    "avx10.vminmaxps256" => "__builtin_ia32_vminmaxps256",
+                    "avx10.vmovrsb128" => "__builtin_ia32_vmovrsb128",
+                    "avx10.vmovrsb256" => "__builtin_ia32_vmovrsb256",
+                    "avx10.vmovrsb512" => "__builtin_ia32_vmovrsb512",
+                    "avx10.vmovrsd128" => "__builtin_ia32_vmovrsd128",
+                    "avx10.vmovrsd256" => "__builtin_ia32_vmovrsd256",
+                    "avx10.vmovrsd512" => "__builtin_ia32_vmovrsd512",
+                    "avx10.vmovrsq128" => "__builtin_ia32_vmovrsq128",
+                    "avx10.vmovrsq256" => "__builtin_ia32_vmovrsq256",
+                    "avx10.vmovrsq512" => "__builtin_ia32_vmovrsq512",
+                    "avx10.vmovrsw128" => "__builtin_ia32_vmovrsw128",
+                    "avx10.vmovrsw256" => "__builtin_ia32_vmovrsw256",
+                    "avx10.vmovrsw512" => "__builtin_ia32_vmovrsw512",
+                    "avx10.vmpsadbw.512" => "__builtin_ia32_mpsadbw512",
+                    "avx10.vmulbf16128" => "__builtin_ia32_vmulbf16128",
+                    "avx10.vmulbf16256" => "__builtin_ia32_vmulbf16256",
+                    "avx10.vmulbf16512" => "__builtin_ia32_vmulbf16512",
+                    "avx10.vpdpbssd.512" => "__builtin_ia32_vpdpbssd512",
+                    "avx10.vpdpbssds.512" => "__builtin_ia32_vpdpbssds512",
+                    "avx10.vpdpbsud.512" => "__builtin_ia32_vpdpbsud512",
+                    "avx10.vpdpbsuds.512" => "__builtin_ia32_vpdpbsuds512",
+                    "avx10.vpdpbuud.512" => "__builtin_ia32_vpdpbuud512",
+                    "avx10.vpdpbuuds.512" => "__builtin_ia32_vpdpbuuds512",
+                    "avx10.vpdpwsud.512" => "__builtin_ia32_vpdpwsud512",
+                    "avx10.vpdpwsuds.512" => "__builtin_ia32_vpdpwsuds512",
+                    "avx10.vpdpwusd.512" => "__builtin_ia32_vpdpwusd512",
+                    "avx10.vpdpwusds.512" => "__builtin_ia32_vpdpwusds512",
+                    "avx10.vpdpwuud.512" => "__builtin_ia32_vpdpwuud512",
+                    "avx10.vpdpwuuds.512" => "__builtin_ia32_vpdpwuuds512",
+                    "avx10.vsubbf16128" => "__builtin_ia32_vsubbf16128",
+                    "avx10.vsubbf16256" => "__builtin_ia32_vsubbf16256",
+                    "avx10.vsubbf16512" => "__builtin_ia32_vsubbf16512",
+                    "avx2.gather.d.d" => "__builtin_ia32_gatherd_d",
+                    "avx2.gather.d.d.256" => "__builtin_ia32_gatherd_d256",
+                    "avx2.gather.d.pd" => "__builtin_ia32_gatherd_pd",
+                    "avx2.gather.d.pd.256" => "__builtin_ia32_gatherd_pd256",
+                    "avx2.gather.d.ps" => "__builtin_ia32_gatherd_ps",
+                    "avx2.gather.d.ps.256" => "__builtin_ia32_gatherd_ps256",
+                    "avx2.gather.d.q" => "__builtin_ia32_gatherd_q",
+                    "avx2.gather.d.q.256" => "__builtin_ia32_gatherd_q256",
+                    "avx2.gather.q.d" => "__builtin_ia32_gatherq_d",
+                    "avx2.gather.q.d.256" => "__builtin_ia32_gatherq_d256",
+                    "avx2.gather.q.pd" => "__builtin_ia32_gatherq_pd",
+                    "avx2.gather.q.pd.256" => "__builtin_ia32_gatherq_pd256",
+                    "avx2.gather.q.ps" => "__builtin_ia32_gatherq_ps",
+                    "avx2.gather.q.ps.256" => "__builtin_ia32_gatherq_ps256",
+                    "avx2.gather.q.q" => "__builtin_ia32_gatherq_q",
+                    "avx2.gather.q.q.256" => "__builtin_ia32_gatherq_q256",
+                    "avx2.maskload.d" => "__builtin_ia32_maskloadd",
+                    "avx2.maskload.d.256" => "__builtin_ia32_maskloadd256",
+                    "avx2.maskload.q" => "__builtin_ia32_maskloadq",
+                    "avx2.maskload.q.256" => "__builtin_ia32_maskloadq256",
+                    "avx2.maskstore.d" => "__builtin_ia32_maskstored",
+                    "avx2.maskstore.d.256" => "__builtin_ia32_maskstored256",
+                    "avx2.maskstore.q" => "__builtin_ia32_maskstoreq",
+                    "avx2.maskstore.q.256" => "__builtin_ia32_maskstoreq256",
+                    "avx2.movntdqa" => "__builtin_ia32_movntdqa256",
+                    "avx2.mpsadbw" => "__builtin_ia32_mpsadbw256",
+                    "avx2.pabs.b" => "__builtin_ia32_pabsb256",
+                    "avx2.pabs.d" => "__builtin_ia32_pabsd256",
+                    "avx2.pabs.w" => "__builtin_ia32_pabsw256",
+                    "avx2.packssdw" => "__builtin_ia32_packssdw256",
+                    "avx2.packsswb" => "__builtin_ia32_packsswb256",
+                    "avx2.packusdw" => "__builtin_ia32_packusdw256",
+                    "avx2.packuswb" => "__builtin_ia32_packuswb256",
+                    "avx2.padds.b" => "__builtin_ia32_paddsb256",
+                    "avx2.padds.w" => "__builtin_ia32_paddsw256",
+                    "avx2.paddus.b" => "__builtin_ia32_paddusb256",
+                    "avx2.paddus.w" => "__builtin_ia32_paddusw256",
+                    "avx2.pavg.b" => "__builtin_ia32_pavgb256",
+                    "avx2.pavg.w" => "__builtin_ia32_pavgw256",
+                    "avx2.pblendd.128" => "__builtin_ia32_pblendd128",
+                    "avx2.pblendd.256" => "__builtin_ia32_pblendd256",
+                    "avx2.pblendvb" => "__builtin_ia32_pblendvb256",
+                    "avx2.pblendw" => "__builtin_ia32_pblendw256",
+                    "avx2.pbroadcastb.128" => "__builtin_ia32_pbroadcastb128",
+                    "avx2.pbroadcastb.256" => "__builtin_ia32_pbroadcastb256",
+                    "avx2.pbroadcastd.128" => "__builtin_ia32_pbroadcastd128",
+                    "avx2.pbroadcastd.256" => "__builtin_ia32_pbroadcastd256",
+                    "avx2.pbroadcastq.128" => "__builtin_ia32_pbroadcastq128",
+                    "avx2.pbroadcastq.256" => "__builtin_ia32_pbroadcastq256",
+                    "avx2.pbroadcastw.128" => "__builtin_ia32_pbroadcastw128",
+                    "avx2.pbroadcastw.256" => "__builtin_ia32_pbroadcastw256",
+                    "avx2.permd" => "__builtin_ia32_permvarsi256",
+                    "avx2.permps" => "__builtin_ia32_permvarsf256",
+                    "avx2.phadd.d" => "__builtin_ia32_phaddd256",
+                    "avx2.phadd.sw" => "__builtin_ia32_phaddsw256",
+                    "avx2.phadd.w" => "__builtin_ia32_phaddw256",
+                    "avx2.phsub.d" => "__builtin_ia32_phsubd256",
+                    "avx2.phsub.sw" => "__builtin_ia32_phsubsw256",
+                    "avx2.phsub.w" => "__builtin_ia32_phsubw256",
+                    "avx2.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw256",
+                    "avx2.pmadd.wd" => "__builtin_ia32_pmaddwd256",
+                    "avx2.pmaxs.b" => "__builtin_ia32_pmaxsb256",
+                    "avx2.pmaxs.d" => "__builtin_ia32_pmaxsd256",
+                    "avx2.pmaxs.w" => "__builtin_ia32_pmaxsw256",
+                    "avx2.pmaxu.b" => "__builtin_ia32_pmaxub256",
+                    "avx2.pmaxu.d" => "__builtin_ia32_pmaxud256",
+                    "avx2.pmaxu.w" => "__builtin_ia32_pmaxuw256",
+                    "avx2.pmins.b" => "__builtin_ia32_pminsb256",
+                    "avx2.pmins.d" => "__builtin_ia32_pminsd256",
+                    "avx2.pmins.w" => "__builtin_ia32_pminsw256",
+                    "avx2.pminu.b" => "__builtin_ia32_pminub256",
+                    "avx2.pminu.d" => "__builtin_ia32_pminud256",
+                    "avx2.pminu.w" => "__builtin_ia32_pminuw256",
+                    "avx2.pmovmskb" => "__builtin_ia32_pmovmskb256",
+                    "avx2.pmovsxbd" => "__builtin_ia32_pmovsxbd256",
+                    "avx2.pmovsxbq" => "__builtin_ia32_pmovsxbq256",
+                    "avx2.pmovsxbw" => "__builtin_ia32_pmovsxbw256",
+                    "avx2.pmovsxdq" => "__builtin_ia32_pmovsxdq256",
+                    "avx2.pmovsxwd" => "__builtin_ia32_pmovsxwd256",
+                    "avx2.pmovsxwq" => "__builtin_ia32_pmovsxwq256",
+                    "avx2.pmovzxbd" => "__builtin_ia32_pmovzxbd256",
+                    "avx2.pmovzxbq" => "__builtin_ia32_pmovzxbq256",
+                    "avx2.pmovzxbw" => "__builtin_ia32_pmovzxbw256",
+                    "avx2.pmovzxdq" => "__builtin_ia32_pmovzxdq256",
+                    "avx2.pmovzxwd" => "__builtin_ia32_pmovzxwd256",
+                    "avx2.pmovzxwq" => "__builtin_ia32_pmovzxwq256",
+                    "avx2.pmul.dq" => "__builtin_ia32_pmuldq256",
+                    "avx2.pmul.hr.sw" => "__builtin_ia32_pmulhrsw256",
+                    "avx2.pmulh.w" => "__builtin_ia32_pmulhw256",
+                    "avx2.pmulhu.w" => "__builtin_ia32_pmulhuw256",
+                    "avx2.pmulu.dq" => "__builtin_ia32_pmuludq256",
+                    "avx2.psad.bw" => "__builtin_ia32_psadbw256",
+                    "avx2.pshuf.b" => "__builtin_ia32_pshufb256",
+                    "avx2.psign.b" => "__builtin_ia32_psignb256",
+                    "avx2.psign.d" => "__builtin_ia32_psignd256",
+                    "avx2.psign.w" => "__builtin_ia32_psignw256",
+                    "avx2.psll.d" => "__builtin_ia32_pslld256",
+                    "avx2.psll.dq" => "__builtin_ia32_pslldqi256",
+                    "avx2.psll.dq.bs" => "__builtin_ia32_pslldqi256_byteshift",
+                    "avx2.psll.q" => "__builtin_ia32_psllq256",
+                    "avx2.psll.w" => "__builtin_ia32_psllw256",
+                    "avx2.pslli.d" => "__builtin_ia32_pslldi256",
+                    "avx2.pslli.q" => "__builtin_ia32_psllqi256",
+                    "avx2.pslli.w" => "__builtin_ia32_psllwi256",
+                    "avx2.psllv.d" => "__builtin_ia32_psllv4si",
+                    "avx2.psllv.d.256" => "__builtin_ia32_psllv8si",
+                    "avx2.psllv.q" => "__builtin_ia32_psllv2di",
+                    "avx2.psllv.q.256" => "__builtin_ia32_psllv4di",
+                    "avx2.psra.d" => "__builtin_ia32_psrad256",
+                    "avx2.psra.w" => "__builtin_ia32_psraw256",
+                    "avx2.psrai.d" => "__builtin_ia32_psradi256",
+                    "avx2.psrai.w" => "__builtin_ia32_psrawi256",
+                    "avx2.psrav.d" => "__builtin_ia32_psrav4si",
+                    "avx2.psrav.d.256" => "__builtin_ia32_psrav8si",
+                    "avx2.psrl.d" => "__builtin_ia32_psrld256",
+                    "avx2.psrl.dq" => "__builtin_ia32_psrldqi256",
+                    "avx2.psrl.dq.bs" => "__builtin_ia32_psrldqi256_byteshift",
+                    "avx2.psrl.q" => "__builtin_ia32_psrlq256",
+                    "avx2.psrl.w" => "__builtin_ia32_psrlw256",
+                    "avx2.psrli.d" => "__builtin_ia32_psrldi256",
+                    "avx2.psrli.q" => "__builtin_ia32_psrlqi256",
+                    "avx2.psrli.w" => "__builtin_ia32_psrlwi256",
+                    "avx2.psrlv.d" => "__builtin_ia32_psrlv4si",
+                    "avx2.psrlv.d.256" => "__builtin_ia32_psrlv8si",
+                    "avx2.psrlv.q" => "__builtin_ia32_psrlv2di",
+                    "avx2.psrlv.q.256" => "__builtin_ia32_psrlv4di",
+                    "avx2.psubs.b" => "__builtin_ia32_psubsb256",
+                    "avx2.psubs.w" => "__builtin_ia32_psubsw256",
+                    "avx2.psubus.b" => "__builtin_ia32_psubusb256",
+                    "avx2.psubus.w" => "__builtin_ia32_psubusw256",
+                    "avx2.vbroadcast.sd.pd.256" => "__builtin_ia32_vbroadcastsd_pd256",
+                    "avx2.vbroadcast.ss.ps" => "__builtin_ia32_vbroadcastss_ps",
+                    "avx2.vbroadcast.ss.ps.256" => "__builtin_ia32_vbroadcastss_ps256",
+                    "avx2.vextracti128" => "__builtin_ia32_extract128i256",
+                    "avx2.vinserti128" => "__builtin_ia32_insert128i256",
+                    "avx2.vpdpbssd.128" => "__builtin_ia32_vpdpbssd128",
+                    "avx2.vpdpbssd.256" => "__builtin_ia32_vpdpbssd256",
+                    "avx2.vpdpbssds.128" => "__builtin_ia32_vpdpbssds128",
+                    "avx2.vpdpbssds.256" => "__builtin_ia32_vpdpbssds256",
+                    "avx2.vpdpbsud.128" => "__builtin_ia32_vpdpbsud128",
+                    "avx2.vpdpbsud.256" => "__builtin_ia32_vpdpbsud256",
+                    "avx2.vpdpbsuds.128" => "__builtin_ia32_vpdpbsuds128",
+                    "avx2.vpdpbsuds.256" => "__builtin_ia32_vpdpbsuds256",
+                    "avx2.vpdpbuud.128" => "__builtin_ia32_vpdpbuud128",
+                    "avx2.vpdpbuud.256" => "__builtin_ia32_vpdpbuud256",
+                    "avx2.vpdpbuuds.128" => "__builtin_ia32_vpdpbuuds128",
+                    "avx2.vpdpbuuds.256" => "__builtin_ia32_vpdpbuuds256",
+                    "avx2.vpdpwsud.128" => "__builtin_ia32_vpdpwsud128",
+                    "avx2.vpdpwsud.256" => "__builtin_ia32_vpdpwsud256",
+                    "avx2.vpdpwsuds.128" => "__builtin_ia32_vpdpwsuds128",
+                    "avx2.vpdpwsuds.256" => "__builtin_ia32_vpdpwsuds256",
+                    "avx2.vpdpwusd.128" => "__builtin_ia32_vpdpwusd128",
+                    "avx2.vpdpwusd.256" => "__builtin_ia32_vpdpwusd256",
+                    "avx2.vpdpwusds.128" => "__builtin_ia32_vpdpwusds128",
+                    "avx2.vpdpwusds.256" => "__builtin_ia32_vpdpwusds256",
+                    "avx2.vpdpwuud.128" => "__builtin_ia32_vpdpwuud128",
+                    "avx2.vpdpwuud.256" => "__builtin_ia32_vpdpwuud256",
+                    "avx2.vpdpwuuds.128" => "__builtin_ia32_vpdpwuuds128",
+                    "avx2.vpdpwuuds.256" => "__builtin_ia32_vpdpwuuds256",
+                    "avx2.vperm2i128" => "__builtin_ia32_permti256",
+                    "avx512.add.pd.512" => "__builtin_ia32_addpd512",
+                    "avx512.add.ps.512" => "__builtin_ia32_addps512",
+                    "avx512.broadcastmb.128" => "__builtin_ia32_broadcastmb128",
+                    "avx512.broadcastmb.256" => "__builtin_ia32_broadcastmb256",
+                    "avx512.broadcastmb.512" => "__builtin_ia32_broadcastmb512",
+                    "avx512.broadcastmw.128" => "__builtin_ia32_broadcastmw128",
+                    "avx512.broadcastmw.256" => "__builtin_ia32_broadcastmw256",
+                    "avx512.broadcastmw.512" => "__builtin_ia32_broadcastmw512",
+                    "avx512.conflict.d.128" => "__builtin_ia32_vpconflictsi_128",
+                    "avx512.conflict.d.256" => "__builtin_ia32_vpconflictsi_256",
+                    "avx512.conflict.d.512" => "__builtin_ia32_vpconflictsi_512",
+                    "avx512.conflict.q.128" => "__builtin_ia32_vpconflictdi_128",
+                    "avx512.conflict.q.256" => "__builtin_ia32_vpconflictdi_256",
+                    "avx512.conflict.q.512" => "__builtin_ia32_vpconflictdi_512",
+                    "avx512.cvtb2mask.128" => "__builtin_ia32_cvtb2mask128",
+                    "avx512.cvtb2mask.256" => "__builtin_ia32_cvtb2mask256",
+                    "avx512.cvtb2mask.512" => "__builtin_ia32_cvtb2mask512",
+                    "avx512.cvtd2mask.128" => "__builtin_ia32_cvtd2mask128",
+                    "avx512.cvtd2mask.256" => "__builtin_ia32_cvtd2mask256",
+                    "avx512.cvtd2mask.512" => "__builtin_ia32_cvtd2mask512",
+                    "avx512.cvtmask2b.128" => "__builtin_ia32_cvtmask2b128",
+                    "avx512.cvtmask2b.256" => "__builtin_ia32_cvtmask2b256",
+                    "avx512.cvtmask2b.512" => "__builtin_ia32_cvtmask2b512",
+                    "avx512.cvtmask2d.128" => "__builtin_ia32_cvtmask2d128",
+                    "avx512.cvtmask2d.256" => "__builtin_ia32_cvtmask2d256",
+                    "avx512.cvtmask2d.512" => "__builtin_ia32_cvtmask2d512",
+                    "avx512.cvtmask2q.128" => "__builtin_ia32_cvtmask2q128",
+                    "avx512.cvtmask2q.256" => "__builtin_ia32_cvtmask2q256",
+                    "avx512.cvtmask2q.512" => "__builtin_ia32_cvtmask2q512",
+                    "avx512.cvtmask2w.128" => "__builtin_ia32_cvtmask2w128",
+                    "avx512.cvtmask2w.256" => "__builtin_ia32_cvtmask2w256",
+                    "avx512.cvtmask2w.512" => "__builtin_ia32_cvtmask2w512",
+                    "avx512.cvtq2mask.128" => "__builtin_ia32_cvtq2mask128",
+                    "avx512.cvtq2mask.256" => "__builtin_ia32_cvtq2mask256",
+                    "avx512.cvtq2mask.512" => "__builtin_ia32_cvtq2mask512",
+                    "avx512.cvtsd2usi" => "__builtin_ia32_cvtsd2usi",
+                    "avx512.cvtsd2usi64" => "__builtin_ia32_cvtsd2usi64",
+                    "avx512.cvtsi2sd32" => "__builtin_ia32_cvtsi2sd32",
+                    "avx512.cvtsi2sd64" => "__builtin_ia32_cvtsi2sd64",
+                    "avx512.cvtsi2ss32" => "__builtin_ia32_cvtsi2ss32",
+                    "avx512.cvtsi2ss64" => "__builtin_ia32_cvtsi2ss64",
+                    "avx512.cvtss2usi" => "__builtin_ia32_cvtss2usi",
+                    "avx512.cvtss2usi64" => "__builtin_ia32_cvtss2usi64",
+                    "avx512.cvttsd2si" => "__builtin_ia32_vcvttsd2si32",
+                    "avx512.cvttsd2si64" => "__builtin_ia32_vcvttsd2si64",
+                    "avx512.cvttsd2usi" => "__builtin_ia32_vcvttsd2usi32",
+                    // [DUPLICATE]: "avx512.cvttsd2usi" => "__builtin_ia32_cvttsd2usi",
+                    "avx512.cvttsd2usi64" => "__builtin_ia32_vcvttsd2usi64",
+                    // [DUPLICATE]: "avx512.cvttsd2usi64" => "__builtin_ia32_cvttsd2usi64",
+                    "avx512.cvttss2si" => "__builtin_ia32_vcvttss2si32",
+                    "avx512.cvttss2si64" => "__builtin_ia32_vcvttss2si64",
+                    "avx512.cvttss2usi" => "__builtin_ia32_vcvttss2usi32",
+                    // [DUPLICATE]: "avx512.cvttss2usi" => "__builtin_ia32_cvttss2usi",
+                    "avx512.cvttss2usi64" => "__builtin_ia32_vcvttss2usi64",
+                    // [DUPLICATE]: "avx512.cvttss2usi64" => "__builtin_ia32_cvttss2usi64",
+                    "avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd",
+                    // [DUPLICATE]: "avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd32",
+                    "avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss32",
+                    // [DUPLICATE]: "avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss",
+                    "avx512.cvtusi642sd" => "__builtin_ia32_cvtusi2sd64",
+                    // [DUPLICATE]: "avx512.cvtusi642sd" => "__builtin_ia32_cvtusi642sd",
+                    "avx512.cvtusi642ss" => "__builtin_ia32_cvtusi2ss64",
+                    // [DUPLICATE]: "avx512.cvtusi642ss" => "__builtin_ia32_cvtusi642ss",
+                    "avx512.cvtw2mask.128" => "__builtin_ia32_cvtw2mask128",
+                    "avx512.cvtw2mask.256" => "__builtin_ia32_cvtw2mask256",
+                    "avx512.cvtw2mask.512" => "__builtin_ia32_cvtw2mask512",
+                    "avx512.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128",
+                    "avx512.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256",
+                    "avx512.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512",
+                    "avx512.div.pd.512" => "__builtin_ia32_divpd512",
+                    "avx512.div.ps.512" => "__builtin_ia32_divps512",
+                    "avx512.exp2.pd" => "__builtin_ia32_exp2pd_mask",
+                    "avx512.exp2.ps" => "__builtin_ia32_exp2ps_mask",
+                    "avx512.gather.dpd.512" => "__builtin_ia32_gathersiv8df",
+                    "avx512.gather.dpi.512" => "__builtin_ia32_gathersiv16si",
+                    "avx512.gather.dpq.512" => "__builtin_ia32_gathersiv8di",
+                    "avx512.gather.dps.512" => "__builtin_ia32_gathersiv16sf",
+                    "avx512.gather.qpd.512" => "__builtin_ia32_gatherdiv8df",
+                    "avx512.gather.qpi.512" => "__builtin_ia32_gatherdiv16si",
+                    "avx512.gather.qpq.512" => "__builtin_ia32_gatherdiv8di",
+                    "avx512.gather.qps.512" => "__builtin_ia32_gatherdiv16sf",
+                    "avx512.gather3div2.df" => "__builtin_ia32_gather3div2df",
+                    "avx512.gather3div2.di" => "__builtin_ia32_gather3div2di",
+                    "avx512.gather3div4.df" => "__builtin_ia32_gather3div4df",
+                    "avx512.gather3div4.di" => "__builtin_ia32_gather3div4di",
+                    "avx512.gather3div4.sf" => "__builtin_ia32_gather3div4sf",
+                    "avx512.gather3div4.si" => "__builtin_ia32_gather3div4si",
+                    "avx512.gather3div8.sf" => "__builtin_ia32_gather3div8sf",
+                    "avx512.gather3div8.si" => "__builtin_ia32_gather3div8si",
+                    "avx512.gather3siv2.df" => "__builtin_ia32_gather3siv2df",
+                    "avx512.gather3siv2.di" => "__builtin_ia32_gather3siv2di",
+                    "avx512.gather3siv4.df" => "__builtin_ia32_gather3siv4df",
+                    "avx512.gather3siv4.di" => "__builtin_ia32_gather3siv4di",
+                    "avx512.gather3siv4.sf" => "__builtin_ia32_gather3siv4sf",
+                    "avx512.gather3siv4.si" => "__builtin_ia32_gather3siv4si",
+                    "avx512.gather3siv8.sf" => "__builtin_ia32_gather3siv8sf",
+                    "avx512.gather3siv8.si" => "__builtin_ia32_gather3siv8si",
+                    "avx512.gatherpf.dpd.512" => "__builtin_ia32_gatherpfdpd",
+                    "avx512.gatherpf.dps.512" => "__builtin_ia32_gatherpfdps",
+                    "avx512.gatherpf.qpd.512" => "__builtin_ia32_gatherpfqpd",
+                    "avx512.gatherpf.qps.512" => "__builtin_ia32_gatherpfqps",
+                    "avx512.kand.w" => "__builtin_ia32_kandhi",
+                    "avx512.kandn.w" => "__builtin_ia32_kandnhi",
+                    "avx512.knot.w" => "__builtin_ia32_knothi",
+                    "avx512.kor.w" => "__builtin_ia32_korhi",
+                    "avx512.kortestc.w" => "__builtin_ia32_kortestchi",
+                    "avx512.kortestz.w" => "__builtin_ia32_kortestzhi",
+                    "avx512.kunpck.bw" => "__builtin_ia32_kunpckhi",
+                    "avx512.kunpck.dq" => "__builtin_ia32_kunpckdi",
+                    "avx512.kunpck.wd" => "__builtin_ia32_kunpcksi",
+                    "avx512.kxnor.w" => "__builtin_ia32_kxnorhi",
+                    "avx512.kxor.w" => "__builtin_ia32_kxorhi",
+                    "avx512.mask.add.pd.128" => "__builtin_ia32_addpd128_mask",
+                    "avx512.mask.add.pd.256" => "__builtin_ia32_addpd256_mask",
+                    "avx512.mask.add.pd.512" => "__builtin_ia32_addpd512_mask",
+                    "avx512.mask.add.ps.128" => "__builtin_ia32_addps128_mask",
+                    "avx512.mask.add.ps.256" => "__builtin_ia32_addps256_mask",
+                    "avx512.mask.add.ps.512" => "__builtin_ia32_addps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.add.sd.round" => "__builtin_ia32_addsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.add.ss.round" => "__builtin_ia32_addss_round_mask",
+                    "avx512.mask.and.pd.128" => "__builtin_ia32_andpd128_mask",
+                    "avx512.mask.and.pd.256" => "__builtin_ia32_andpd256_mask",
+                    "avx512.mask.and.pd.512" => "__builtin_ia32_andpd512_mask",
+                    "avx512.mask.and.ps.128" => "__builtin_ia32_andps128_mask",
+                    "avx512.mask.and.ps.256" => "__builtin_ia32_andps256_mask",
+                    "avx512.mask.and.ps.512" => "__builtin_ia32_andps512_mask",
+                    "avx512.mask.andn.pd.128" => "__builtin_ia32_andnpd128_mask",
+                    "avx512.mask.andn.pd.256" => "__builtin_ia32_andnpd256_mask",
+                    "avx512.mask.andn.pd.512" => "__builtin_ia32_andnpd512_mask",
+                    "avx512.mask.andn.ps.128" => "__builtin_ia32_andnps128_mask",
+                    "avx512.mask.andn.ps.256" => "__builtin_ia32_andnps256_mask",
+                    "avx512.mask.andn.ps.512" => "__builtin_ia32_andnps512_mask",
+                    "avx512.mask.blend.d.512" => "__builtin_ia32_blendmd_512_mask",
+                    "avx512.mask.blend.pd.512" => "__builtin_ia32_blendmpd_512_mask",
+                    "avx512.mask.blend.ps.512" => "__builtin_ia32_blendmps_512_mask",
+                    "avx512.mask.blend.q.512" => "__builtin_ia32_blendmq_512_mask",
+                    "avx512.mask.broadcastf32x2.256" => "__builtin_ia32_broadcastf32x2_256_mask",
+                    "avx512.mask.broadcastf32x2.512" => "__builtin_ia32_broadcastf32x2_512_mask",
+                    "avx512.mask.broadcastf32x4.256" => "__builtin_ia32_broadcastf32x4_256_mask",
+                    "avx512.mask.broadcastf32x4.512" => "__builtin_ia32_broadcastf32x4_512",
+                    "avx512.mask.broadcastf32x8.512" => "__builtin_ia32_broadcastf32x8_512_mask",
+                    "avx512.mask.broadcastf64x2.256" => "__builtin_ia32_broadcastf64x2_256_mask",
+                    "avx512.mask.broadcastf64x2.512" => "__builtin_ia32_broadcastf64x2_512_mask",
+                    "avx512.mask.broadcastf64x4.512" => "__builtin_ia32_broadcastf64x4_512",
+                    "avx512.mask.broadcasti32x2.128" => "__builtin_ia32_broadcasti32x2_128_mask",
+                    "avx512.mask.broadcasti32x2.256" => "__builtin_ia32_broadcasti32x2_256_mask",
+                    "avx512.mask.broadcasti32x2.512" => "__builtin_ia32_broadcasti32x2_512_mask",
+                    "avx512.mask.broadcasti32x4.256" => "__builtin_ia32_broadcasti32x4_256_mask",
+                    "avx512.mask.broadcasti32x4.512" => "__builtin_ia32_broadcasti32x4_512",
+                    "avx512.mask.broadcasti32x8.512" => "__builtin_ia32_broadcasti32x8_512_mask",
+                    "avx512.mask.broadcasti64x2.256" => "__builtin_ia32_broadcasti64x2_256_mask",
+                    "avx512.mask.broadcasti64x2.512" => "__builtin_ia32_broadcasti64x2_512_mask",
+                    "avx512.mask.broadcasti64x4.512" => "__builtin_ia32_broadcasti64x4_512",
+                    "avx512.mask.cmp.pd.128" => "__builtin_ia32_cmppd128_mask",
+                    "avx512.mask.cmp.pd.256" => "__builtin_ia32_cmppd256_mask",
+                    "avx512.mask.cmp.pd.512" => "__builtin_ia32_cmppd512_mask",
+                    "avx512.mask.cmp.ps.128" => "__builtin_ia32_cmpps128_mask",
+                    "avx512.mask.cmp.ps.256" => "__builtin_ia32_cmpps256_mask",
+                    "avx512.mask.cmp.ps.512" => "__builtin_ia32_cmpps512_mask",
+                    "avx512.mask.cmp.sd" => "__builtin_ia32_cmpsd_mask",
+                    "avx512.mask.cmp.ss" => "__builtin_ia32_cmpss_mask",
+                    "avx512.mask.compress.d.128" => "__builtin_ia32_compresssi128_mask",
+                    "avx512.mask.compress.d.256" => "__builtin_ia32_compresssi256_mask",
+                    "avx512.mask.compress.d.512" => "__builtin_ia32_compresssi512_mask",
+                    "avx512.mask.compress.pd.128" => "__builtin_ia32_compressdf128_mask",
+                    "avx512.mask.compress.pd.256" => "__builtin_ia32_compressdf256_mask",
+                    "avx512.mask.compress.pd.512" => "__builtin_ia32_compressdf512_mask",
+                    "avx512.mask.compress.ps.128" => "__builtin_ia32_compresssf128_mask",
+                    "avx512.mask.compress.ps.256" => "__builtin_ia32_compresssf256_mask",
+                    "avx512.mask.compress.ps.512" => "__builtin_ia32_compresssf512_mask",
+                    "avx512.mask.compress.q.128" => "__builtin_ia32_compressdi128_mask",
+                    "avx512.mask.compress.q.256" => "__builtin_ia32_compressdi256_mask",
+                    "avx512.mask.compress.q.512" => "__builtin_ia32_compressdi512_mask",
+                    "avx512.mask.compress.store.d.128" => "__builtin_ia32_compressstoresi128_mask",
+                    "avx512.mask.compress.store.d.256" => "__builtin_ia32_compressstoresi256_mask",
+                    "avx512.mask.compress.store.d.512" => "__builtin_ia32_compressstoresi512_mask",
+                    "avx512.mask.compress.store.pd.128" => "__builtin_ia32_compressstoredf128_mask",
+                    "avx512.mask.compress.store.pd.256" => "__builtin_ia32_compressstoredf256_mask",
+                    "avx512.mask.compress.store.pd.512" => "__builtin_ia32_compressstoredf512_mask",
+                    "avx512.mask.compress.store.ps.128" => "__builtin_ia32_compressstoresf128_mask",
+                    "avx512.mask.compress.store.ps.256" => "__builtin_ia32_compressstoresf256_mask",
+                    "avx512.mask.compress.store.ps.512" => "__builtin_ia32_compressstoresf512_mask",
+                    "avx512.mask.compress.store.q.128" => "__builtin_ia32_compressstoredi128_mask",
+                    "avx512.mask.compress.store.q.256" => "__builtin_ia32_compressstoredi256_mask",
+                    "avx512.mask.compress.store.q.512" => "__builtin_ia32_compressstoredi512_mask",
+                    "avx512.mask.conflict.d.128" => "__builtin_ia32_vpconflictsi_128_mask",
+                    "avx512.mask.conflict.d.256" => "__builtin_ia32_vpconflictsi_256_mask",
+                    "avx512.mask.conflict.d.512" => "__builtin_ia32_vpconflictsi_512_mask",
+                    "avx512.mask.conflict.q.128" => "__builtin_ia32_vpconflictdi_128_mask",
+                    "avx512.mask.conflict.q.256" => "__builtin_ia32_vpconflictdi_256_mask",
+                    "avx512.mask.conflict.q.512" => "__builtin_ia32_vpconflictdi_512_mask",
+                    "avx512.mask.cvtdq2pd.128" => "__builtin_ia32_cvtdq2pd128_mask",
+                    "avx512.mask.cvtdq2pd.256" => "__builtin_ia32_cvtdq2pd256_mask",
+                    "avx512.mask.cvtdq2pd.512" => "__builtin_ia32_cvtdq2pd512_mask",
+                    "avx512.mask.cvtdq2ps.128" => "__builtin_ia32_cvtdq2ps128_mask",
+                    "avx512.mask.cvtdq2ps.256" => "__builtin_ia32_cvtdq2ps256_mask",
+                    "avx512.mask.cvtdq2ps.512" => "__builtin_ia32_cvtdq2ps512_mask",
+                    "avx512.mask.cvtpd2dq.128" => "__builtin_ia32_cvtpd2dq128_mask",
+                    "avx512.mask.cvtpd2dq.256" => "__builtin_ia32_cvtpd2dq256_mask",
+                    "avx512.mask.cvtpd2dq.512" => "__builtin_ia32_cvtpd2dq512_mask",
+                    "avx512.mask.cvtpd2ps" => "__builtin_ia32_cvtpd2ps_mask",
+                    "avx512.mask.cvtpd2ps.256" => "__builtin_ia32_cvtpd2ps256_mask",
+                    "avx512.mask.cvtpd2ps.512" => "__builtin_ia32_cvtpd2ps512_mask",
+                    "avx512.mask.cvtpd2qq.128" => "__builtin_ia32_cvtpd2qq128_mask",
+                    "avx512.mask.cvtpd2qq.256" => "__builtin_ia32_cvtpd2qq256_mask",
+                    "avx512.mask.cvtpd2qq.512" => "__builtin_ia32_cvtpd2qq512_mask",
+                    "avx512.mask.cvtpd2udq.128" => "__builtin_ia32_cvtpd2udq128_mask",
+                    "avx512.mask.cvtpd2udq.256" => "__builtin_ia32_cvtpd2udq256_mask",
+                    "avx512.mask.cvtpd2udq.512" => "__builtin_ia32_cvtpd2udq512_mask",
+                    "avx512.mask.cvtpd2uqq.128" => "__builtin_ia32_cvtpd2uqq128_mask",
+                    "avx512.mask.cvtpd2uqq.256" => "__builtin_ia32_cvtpd2uqq256_mask",
+                    "avx512.mask.cvtpd2uqq.512" => "__builtin_ia32_cvtpd2uqq512_mask",
+                    "avx512.mask.cvtps2dq.128" => "__builtin_ia32_cvtps2dq128_mask",
+                    "avx512.mask.cvtps2dq.256" => "__builtin_ia32_cvtps2dq256_mask",
+                    "avx512.mask.cvtps2dq.512" => "__builtin_ia32_cvtps2dq512_mask",
+                    "avx512.mask.cvtps2pd.128" => "__builtin_ia32_cvtps2pd128_mask",
+                    "avx512.mask.cvtps2pd.256" => "__builtin_ia32_cvtps2pd256_mask",
+                    "avx512.mask.cvtps2pd.512" => "__builtin_ia32_cvtps2pd512_mask",
+                    "avx512.mask.cvtps2qq.128" => "__builtin_ia32_cvtps2qq128_mask",
+                    "avx512.mask.cvtps2qq.256" => "__builtin_ia32_cvtps2qq256_mask",
+                    "avx512.mask.cvtps2qq.512" => "__builtin_ia32_cvtps2qq512_mask",
+                    "avx512.mask.cvtps2udq.128" => "__builtin_ia32_cvtps2udq128_mask",
+                    "avx512.mask.cvtps2udq.256" => "__builtin_ia32_cvtps2udq256_mask",
+                    "avx512.mask.cvtps2udq.512" => "__builtin_ia32_cvtps2udq512_mask",
+                    "avx512.mask.cvtps2uqq.128" => "__builtin_ia32_cvtps2uqq128_mask",
+                    "avx512.mask.cvtps2uqq.256" => "__builtin_ia32_cvtps2uqq256_mask",
+                    "avx512.mask.cvtps2uqq.512" => "__builtin_ia32_cvtps2uqq512_mask",
+                    "avx512.mask.cvtqq2pd.128" => "__builtin_ia32_cvtqq2pd128_mask",
+                    "avx512.mask.cvtqq2pd.256" => "__builtin_ia32_cvtqq2pd256_mask",
+                    "avx512.mask.cvtqq2pd.512" => "__builtin_ia32_cvtqq2pd512_mask",
+                    "avx512.mask.cvtqq2ps.128" => "__builtin_ia32_cvtqq2ps128_mask",
+                    "avx512.mask.cvtqq2ps.256" => "__builtin_ia32_cvtqq2ps256_mask",
+                    "avx512.mask.cvtqq2ps.512" => "__builtin_ia32_cvtqq2ps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.cvtsd2ss.round" => "__builtin_ia32_cvtsd2ss_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.cvtss2sd.round" => "__builtin_ia32_cvtss2sd_round_mask",
+                    "avx512.mask.cvttpd2dq.128" => "__builtin_ia32_cvttpd2dq128_mask",
+                    "avx512.mask.cvttpd2dq.256" => "__builtin_ia32_cvttpd2dq256_mask",
+                    "avx512.mask.cvttpd2dq.512" => "__builtin_ia32_cvttpd2dq512_mask",
+                    "avx512.mask.cvttpd2qq.128" => "__builtin_ia32_cvttpd2qq128_mask",
+                    "avx512.mask.cvttpd2qq.256" => "__builtin_ia32_cvttpd2qq256_mask",
+                    "avx512.mask.cvttpd2qq.512" => "__builtin_ia32_cvttpd2qq512_mask",
+                    "avx512.mask.cvttpd2udq.128" => "__builtin_ia32_cvttpd2udq128_mask",
+                    "avx512.mask.cvttpd2udq.256" => "__builtin_ia32_cvttpd2udq256_mask",
+                    "avx512.mask.cvttpd2udq.512" => "__builtin_ia32_cvttpd2udq512_mask",
+                    "avx512.mask.cvttpd2uqq.128" => "__builtin_ia32_cvttpd2uqq128_mask",
+                    "avx512.mask.cvttpd2uqq.256" => "__builtin_ia32_cvttpd2uqq256_mask",
+                    "avx512.mask.cvttpd2uqq.512" => "__builtin_ia32_cvttpd2uqq512_mask",
+                    "avx512.mask.cvttps2dq.128" => "__builtin_ia32_cvttps2dq128_mask",
+                    "avx512.mask.cvttps2dq.256" => "__builtin_ia32_cvttps2dq256_mask",
+                    "avx512.mask.cvttps2dq.512" => "__builtin_ia32_cvttps2dq512_mask",
+                    "avx512.mask.cvttps2qq.128" => "__builtin_ia32_cvttps2qq128_mask",
+                    "avx512.mask.cvttps2qq.256" => "__builtin_ia32_cvttps2qq256_mask",
+                    "avx512.mask.cvttps2qq.512" => "__builtin_ia32_cvttps2qq512_mask",
+                    "avx512.mask.cvttps2udq.128" => "__builtin_ia32_cvttps2udq128_mask",
+                    "avx512.mask.cvttps2udq.256" => "__builtin_ia32_cvttps2udq256_mask",
+                    "avx512.mask.cvttps2udq.512" => "__builtin_ia32_cvttps2udq512_mask",
+                    "avx512.mask.cvttps2uqq.128" => "__builtin_ia32_cvttps2uqq128_mask",
+                    "avx512.mask.cvttps2uqq.256" => "__builtin_ia32_cvttps2uqq256_mask",
+                    "avx512.mask.cvttps2uqq.512" => "__builtin_ia32_cvttps2uqq512_mask",
+                    "avx512.mask.cvtudq2pd.128" => "__builtin_ia32_cvtudq2pd128_mask",
+                    "avx512.mask.cvtudq2pd.256" => "__builtin_ia32_cvtudq2pd256_mask",
+                    "avx512.mask.cvtudq2pd.512" => "__builtin_ia32_cvtudq2pd512_mask",
+                    "avx512.mask.cvtudq2ps.128" => "__builtin_ia32_cvtudq2ps128_mask",
+                    "avx512.mask.cvtudq2ps.256" => "__builtin_ia32_cvtudq2ps256_mask",
+                    "avx512.mask.cvtudq2ps.512" => "__builtin_ia32_cvtudq2ps512_mask",
+                    "avx512.mask.cvtuqq2pd.128" => "__builtin_ia32_cvtuqq2pd128_mask",
+                    "avx512.mask.cvtuqq2pd.256" => "__builtin_ia32_cvtuqq2pd256_mask",
+                    "avx512.mask.cvtuqq2pd.512" => "__builtin_ia32_cvtuqq2pd512_mask",
+                    "avx512.mask.cvtuqq2ps.128" => "__builtin_ia32_cvtuqq2ps128_mask",
+                    "avx512.mask.cvtuqq2ps.256" => "__builtin_ia32_cvtuqq2ps256_mask",
+                    "avx512.mask.cvtuqq2ps.512" => "__builtin_ia32_cvtuqq2ps512_mask",
+                    "avx512.mask.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128_mask",
+                    "avx512.mask.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256_mask",
+                    "avx512.mask.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512_mask",
+                    "avx512.mask.div.pd.128" => "__builtin_ia32_divpd_mask",
+                    "avx512.mask.div.pd.256" => "__builtin_ia32_divpd256_mask",
+                    "avx512.mask.div.pd.512" => "__builtin_ia32_divpd512_mask",
+                    "avx512.mask.div.ps.128" => "__builtin_ia32_divps_mask",
+                    "avx512.mask.div.ps.256" => "__builtin_ia32_divps256_mask",
+                    "avx512.mask.div.ps.512" => "__builtin_ia32_divps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.div.sd.round" => "__builtin_ia32_divsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.div.ss.round" => "__builtin_ia32_divss_round_mask",
+                    "avx512.mask.expand.d.128" => "__builtin_ia32_expandsi128_mask",
+                    "avx512.mask.expand.d.256" => "__builtin_ia32_expandsi256_mask",
+                    "avx512.mask.expand.d.512" => "__builtin_ia32_expandsi512_mask",
+                    "avx512.mask.expand.load.d.128" => "__builtin_ia32_expandloadsi128_mask",
+                    "avx512.mask.expand.load.d.256" => "__builtin_ia32_expandloadsi256_mask",
+                    "avx512.mask.expand.load.d.512" => "__builtin_ia32_expandloadsi512_mask",
+                    "avx512.mask.expand.load.pd.128" => "__builtin_ia32_expandloaddf128_mask",
+                    "avx512.mask.expand.load.pd.256" => "__builtin_ia32_expandloaddf256_mask",
+                    "avx512.mask.expand.load.pd.512" => "__builtin_ia32_expandloaddf512_mask",
+                    "avx512.mask.expand.load.ps.128" => "__builtin_ia32_expandloadsf128_mask",
+                    "avx512.mask.expand.load.ps.256" => "__builtin_ia32_expandloadsf256_mask",
+                    "avx512.mask.expand.load.ps.512" => "__builtin_ia32_expandloadsf512_mask",
+                    "avx512.mask.expand.load.q.128" => "__builtin_ia32_expandloaddi128_mask",
+                    "avx512.mask.expand.load.q.256" => "__builtin_ia32_expandloaddi256_mask",
+                    "avx512.mask.expand.load.q.512" => "__builtin_ia32_expandloaddi512_mask",
+                    "avx512.mask.expand.pd.128" => "__builtin_ia32_expanddf128_mask",
+                    "avx512.mask.expand.pd.256" => "__builtin_ia32_expanddf256_mask",
+                    "avx512.mask.expand.pd.512" => "__builtin_ia32_expanddf512_mask",
+                    "avx512.mask.expand.ps.128" => "__builtin_ia32_expandsf128_mask",
+                    "avx512.mask.expand.ps.256" => "__builtin_ia32_expandsf256_mask",
+                    "avx512.mask.expand.ps.512" => "__builtin_ia32_expandsf512_mask",
+                    "avx512.mask.expand.q.128" => "__builtin_ia32_expanddi128_mask",
+                    "avx512.mask.expand.q.256" => "__builtin_ia32_expanddi256_mask",
+                    "avx512.mask.expand.q.512" => "__builtin_ia32_expanddi512_mask",
+                    "avx512.mask.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_mask",
+                    "avx512.mask.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_mask",
+                    "avx512.mask.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_mask",
+                    "avx512.mask.fixupimm.ps.128" => "__builtin_ia32_fixupimmps128_mask",
+                    "avx512.mask.fixupimm.ps.256" => "__builtin_ia32_fixupimmps256_mask",
+                    "avx512.mask.fixupimm.ps.512" => "__builtin_ia32_fixupimmps512_mask",
+                    "avx512.mask.fixupimm.sd" => "__builtin_ia32_fixupimmsd_mask",
+                    "avx512.mask.fixupimm.ss" => "__builtin_ia32_fixupimmss_mask",
+                    "avx512.mask.fpclass.pd.128" => "__builtin_ia32_fpclasspd128_mask",
+                    "avx512.mask.fpclass.pd.256" => "__builtin_ia32_fpclasspd256_mask",
+                    "avx512.mask.fpclass.pd.512" => "__builtin_ia32_fpclasspd512_mask",
+                    "avx512.mask.fpclass.ps.128" => "__builtin_ia32_fpclassps128_mask",
+                    "avx512.mask.fpclass.ps.256" => "__builtin_ia32_fpclassps256_mask",
+                    "avx512.mask.fpclass.ps.512" => "__builtin_ia32_fpclassps512_mask",
+                    "avx512.mask.fpclass.sd" => "__builtin_ia32_fpclasssd_mask",
+                    "avx512.mask.fpclass.ss" => "__builtin_ia32_fpclassss_mask",
+                    "avx512.mask.getexp.pd.128" => "__builtin_ia32_getexppd128_mask",
+                    "avx512.mask.getexp.pd.256" => "__builtin_ia32_getexppd256_mask",
+                    "avx512.mask.getexp.pd.512" => "__builtin_ia32_getexppd512_mask",
+                    "avx512.mask.getexp.ps.128" => "__builtin_ia32_getexpps128_mask",
+                    "avx512.mask.getexp.ps.256" => "__builtin_ia32_getexpps256_mask",
+                    "avx512.mask.getexp.ps.512" => "__builtin_ia32_getexpps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.getexp.sd" => "__builtin_ia32_getexpsd128_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.getexp.ss" => "__builtin_ia32_getexpss128_round_mask",
+                    "avx512.mask.getmant.pd.128" => "__builtin_ia32_getmantpd128_mask",
+                    "avx512.mask.getmant.pd.256" => "__builtin_ia32_getmantpd256_mask",
+                    "avx512.mask.getmant.pd.512" => "__builtin_ia32_getmantpd512_mask",
+                    "avx512.mask.getmant.ps.128" => "__builtin_ia32_getmantps128_mask",
+                    "avx512.mask.getmant.ps.256" => "__builtin_ia32_getmantps256_mask",
+                    "avx512.mask.getmant.ps.512" => "__builtin_ia32_getmantps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.getmant.sd" => "__builtin_ia32_getmantsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.getmant.ss" => "__builtin_ia32_getmantss_round_mask",
+                    "avx512.mask.insertf32x4.256" => "__builtin_ia32_insertf32x4_256_mask",
+                    "avx512.mask.insertf32x4.512" => "__builtin_ia32_insertf32x4_mask",
+                    "avx512.mask.insertf32x8.512" => "__builtin_ia32_insertf32x8_mask",
+                    "avx512.mask.insertf64x2.256" => "__builtin_ia32_insertf64x2_256_mask",
+                    "avx512.mask.insertf64x2.512" => "__builtin_ia32_insertf64x2_512_mask",
+                    "avx512.mask.insertf64x4.512" => "__builtin_ia32_insertf64x4_mask",
+                    "avx512.mask.inserti32x4.256" => "__builtin_ia32_inserti32x4_256_mask",
+                    "avx512.mask.inserti32x4.512" => "__builtin_ia32_inserti32x4_mask",
+                    "avx512.mask.inserti32x8.512" => "__builtin_ia32_inserti32x8_mask",
+                    "avx512.mask.inserti64x2.256" => "__builtin_ia32_inserti64x2_256_mask",
+                    "avx512.mask.inserti64x2.512" => "__builtin_ia32_inserti64x2_512_mask",
+                    "avx512.mask.inserti64x4.512" => "__builtin_ia32_inserti64x4_mask",
+                    "avx512.mask.loadu.d.512" => "__builtin_ia32_loaddqusi512_mask",
+                    "avx512.mask.loadu.pd.512" => "__builtin_ia32_loadupd512_mask",
+                    "avx512.mask.loadu.ps.512" => "__builtin_ia32_loadups512_mask",
+                    "avx512.mask.loadu.q.512" => "__builtin_ia32_loaddqudi512_mask",
+                    "avx512.mask.lzcnt.d.512" => "__builtin_ia32_vplzcntd_512_mask",
+                    "avx512.mask.lzcnt.q.512" => "__builtin_ia32_vplzcntq_512_mask",
+                    "avx512.mask.max.pd.128" => "__builtin_ia32_maxpd_mask",
+                    "avx512.mask.max.pd.256" => "__builtin_ia32_maxpd256_mask",
+                    "avx512.mask.max.pd.512" => "__builtin_ia32_maxpd512_mask",
+                    "avx512.mask.max.ps.128" => "__builtin_ia32_maxps_mask",
+                    "avx512.mask.max.ps.256" => "__builtin_ia32_maxps256_mask",
+                    "avx512.mask.max.ps.512" => "__builtin_ia32_maxps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.max.sd.round" => "__builtin_ia32_maxsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.max.ss.round" => "__builtin_ia32_maxss_round_mask",
+                    "avx512.mask.min.pd.128" => "__builtin_ia32_minpd_mask",
+                    "avx512.mask.min.pd.256" => "__builtin_ia32_minpd256_mask",
+                    "avx512.mask.min.pd.512" => "__builtin_ia32_minpd512_mask",
+                    "avx512.mask.min.ps.128" => "__builtin_ia32_minps_mask",
+                    "avx512.mask.min.ps.256" => "__builtin_ia32_minps256_mask",
+                    "avx512.mask.min.ps.512" => "__builtin_ia32_minps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.min.sd.round" => "__builtin_ia32_minsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.min.ss.round" => "__builtin_ia32_minss_round_mask",
+                    "avx512.mask.move.sd" => "__builtin_ia32_movsd_mask",
+                    "avx512.mask.move.ss" => "__builtin_ia32_movss_mask",
+                    "avx512.mask.mul.pd.128" => "__builtin_ia32_mulpd_mask",
+                    "avx512.mask.mul.pd.256" => "__builtin_ia32_mulpd256_mask",
+                    "avx512.mask.mul.pd.512" => "__builtin_ia32_mulpd512_mask",
+                    "avx512.mask.mul.ps.128" => "__builtin_ia32_mulps_mask",
+                    "avx512.mask.mul.ps.256" => "__builtin_ia32_mulps256_mask",
+                    "avx512.mask.mul.ps.512" => "__builtin_ia32_mulps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.mul.sd.round" => "__builtin_ia32_mulsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.mul.ss.round" => "__builtin_ia32_mulss_round_mask",
+                    "avx512.mask.or.pd.128" => "__builtin_ia32_orpd128_mask",
+                    "avx512.mask.or.pd.256" => "__builtin_ia32_orpd256_mask",
+                    "avx512.mask.or.pd.512" => "__builtin_ia32_orpd512_mask",
+                    "avx512.mask.or.ps.128" => "__builtin_ia32_orps128_mask",
+                    "avx512.mask.or.ps.256" => "__builtin_ia32_orps256_mask",
+                    "avx512.mask.or.ps.512" => "__builtin_ia32_orps512_mask",
+                    "avx512.mask.pabs.b.128" => "__builtin_ia32_pabsb128_mask",
+                    "avx512.mask.pabs.b.256" => "__builtin_ia32_pabsb256_mask",
+                    "avx512.mask.pabs.b.512" => "__builtin_ia32_pabsb512_mask",
+                    "avx512.mask.pabs.d.128" => "__builtin_ia32_pabsd128_mask",
+                    "avx512.mask.pabs.d.256" => "__builtin_ia32_pabsd256_mask",
+                    "avx512.mask.pabs.d.512" => "__builtin_ia32_pabsd512_mask",
+                    "avx512.mask.pabs.q.128" => "__builtin_ia32_pabsq128_mask",
+                    "avx512.mask.pabs.q.256" => "__builtin_ia32_pabsq256_mask",
+                    "avx512.mask.pabs.q.512" => "__builtin_ia32_pabsq512_mask",
+                    "avx512.mask.pabs.w.128" => "__builtin_ia32_pabsw128_mask",
+                    "avx512.mask.pabs.w.256" => "__builtin_ia32_pabsw256_mask",
+                    "avx512.mask.pabs.w.512" => "__builtin_ia32_pabsw512_mask",
+                    "avx512.mask.packssdw.128" => "__builtin_ia32_packssdw128_mask",
+                    "avx512.mask.packssdw.256" => "__builtin_ia32_packssdw256_mask",
+                    "avx512.mask.packssdw.512" => "__builtin_ia32_packssdw512_mask",
+                    "avx512.mask.packsswb.128" => "__builtin_ia32_packsswb128_mask",
+                    "avx512.mask.packsswb.256" => "__builtin_ia32_packsswb256_mask",
+                    "avx512.mask.packsswb.512" => "__builtin_ia32_packsswb512_mask",
+                    "avx512.mask.packusdw.128" => "__builtin_ia32_packusdw128_mask",
+                    "avx512.mask.packusdw.256" => "__builtin_ia32_packusdw256_mask",
+                    "avx512.mask.packusdw.512" => "__builtin_ia32_packusdw512_mask",
+                    "avx512.mask.packuswb.128" => "__builtin_ia32_packuswb128_mask",
+                    "avx512.mask.packuswb.256" => "__builtin_ia32_packuswb256_mask",
+                    "avx512.mask.packuswb.512" => "__builtin_ia32_packuswb512_mask",
+                    "avx512.mask.padd.b.128" => "__builtin_ia32_paddb128_mask",
+                    "avx512.mask.padd.b.256" => "__builtin_ia32_paddb256_mask",
+                    "avx512.mask.padd.b.512" => "__builtin_ia32_paddb512_mask",
+                    "avx512.mask.padd.d.128" => "__builtin_ia32_paddd128_mask",
+                    "avx512.mask.padd.d.256" => "__builtin_ia32_paddd256_mask",
+                    "avx512.mask.padd.d.512" => "__builtin_ia32_paddd512_mask",
+                    "avx512.mask.padd.q.128" => "__builtin_ia32_paddq128_mask",
+                    "avx512.mask.padd.q.256" => "__builtin_ia32_paddq256_mask",
+                    "avx512.mask.padd.q.512" => "__builtin_ia32_paddq512_mask",
+                    "avx512.mask.padd.w.128" => "__builtin_ia32_paddw128_mask",
+                    "avx512.mask.padd.w.256" => "__builtin_ia32_paddw256_mask",
+                    "avx512.mask.padd.w.512" => "__builtin_ia32_paddw512_mask",
+                    "avx512.mask.padds.b.128" => "__builtin_ia32_paddsb128_mask",
+                    "avx512.mask.padds.b.256" => "__builtin_ia32_paddsb256_mask",
+                    "avx512.mask.padds.b.512" => "__builtin_ia32_paddsb512_mask",
+                    "avx512.mask.padds.w.128" => "__builtin_ia32_paddsw128_mask",
+                    "avx512.mask.padds.w.256" => "__builtin_ia32_paddsw256_mask",
+                    "avx512.mask.padds.w.512" => "__builtin_ia32_paddsw512_mask",
+                    "avx512.mask.paddus.b.128" => "__builtin_ia32_paddusb128_mask",
+                    "avx512.mask.paddus.b.256" => "__builtin_ia32_paddusb256_mask",
+                    "avx512.mask.paddus.b.512" => "__builtin_ia32_paddusb512_mask",
+                    "avx512.mask.paddus.w.128" => "__builtin_ia32_paddusw128_mask",
+                    "avx512.mask.paddus.w.256" => "__builtin_ia32_paddusw256_mask",
+                    "avx512.mask.paddus.w.512" => "__builtin_ia32_paddusw512_mask",
+                    "avx512.mask.pand.d.512" => "__builtin_ia32_pandd512_mask",
+                    "avx512.mask.pand.q.512" => "__builtin_ia32_pandq512_mask",
+                    "avx512.mask.pavg.b.128" => "__builtin_ia32_pavgb128_mask",
+                    "avx512.mask.pavg.b.256" => "__builtin_ia32_pavgb256_mask",
+                    "avx512.mask.pavg.b.512" => "__builtin_ia32_pavgb512_mask",
+                    "avx512.mask.pavg.w.128" => "__builtin_ia32_pavgw128_mask",
+                    "avx512.mask.pavg.w.256" => "__builtin_ia32_pavgw256_mask",
+                    "avx512.mask.pavg.w.512" => "__builtin_ia32_pavgw512_mask",
+                    "avx512.mask.pbroadcast.b.gpr.128" => "__builtin_ia32_pbroadcastb128_gpr_mask",
+                    "avx512.mask.pbroadcast.b.gpr.256" => "__builtin_ia32_pbroadcastb256_gpr_mask",
+                    "avx512.mask.pbroadcast.b.gpr.512" => "__builtin_ia32_pbroadcastb512_gpr_mask",
+                    "avx512.mask.pbroadcast.d.gpr.128" => "__builtin_ia32_pbroadcastd128_gpr_mask",
+                    "avx512.mask.pbroadcast.d.gpr.256" => "__builtin_ia32_pbroadcastd256_gpr_mask",
+                    "avx512.mask.pbroadcast.d.gpr.512" => "__builtin_ia32_pbroadcastd512_gpr_mask",
+                    "avx512.mask.pbroadcast.q.gpr.128" => "__builtin_ia32_pbroadcastq128_gpr_mask",
+                    "avx512.mask.pbroadcast.q.gpr.256" => "__builtin_ia32_pbroadcastq256_gpr_mask",
+                    "avx512.mask.pbroadcast.q.gpr.512" => "__builtin_ia32_pbroadcastq512_gpr_mask",
+                    "avx512.mask.pbroadcast.q.mem.512" => "__builtin_ia32_pbroadcastq512_mem_mask",
+                    "avx512.mask.pbroadcast.w.gpr.128" => "__builtin_ia32_pbroadcastw128_gpr_mask",
+                    "avx512.mask.pbroadcast.w.gpr.256" => "__builtin_ia32_pbroadcastw256_gpr_mask",
+                    "avx512.mask.pbroadcast.w.gpr.512" => "__builtin_ia32_pbroadcastw512_gpr_mask",
+                    "avx512.mask.pcmpeq.b.128" => "__builtin_ia32_pcmpeqb128_mask",
+                    "avx512.mask.pcmpeq.b.256" => "__builtin_ia32_pcmpeqb256_mask",
+                    "avx512.mask.pcmpeq.b.512" => "__builtin_ia32_pcmpeqb512_mask",
+                    "avx512.mask.pcmpeq.d.128" => "__builtin_ia32_pcmpeqd128_mask",
+                    "avx512.mask.pcmpeq.d.256" => "__builtin_ia32_pcmpeqd256_mask",
+                    "avx512.mask.pcmpeq.d.512" => "__builtin_ia32_pcmpeqd512_mask",
+                    "avx512.mask.pcmpeq.q.128" => "__builtin_ia32_pcmpeqq128_mask",
+                    "avx512.mask.pcmpeq.q.256" => "__builtin_ia32_pcmpeqq256_mask",
+                    "avx512.mask.pcmpeq.q.512" => "__builtin_ia32_pcmpeqq512_mask",
+                    "avx512.mask.pcmpeq.w.128" => "__builtin_ia32_pcmpeqw128_mask",
+                    "avx512.mask.pcmpeq.w.256" => "__builtin_ia32_pcmpeqw256_mask",
+                    "avx512.mask.pcmpeq.w.512" => "__builtin_ia32_pcmpeqw512_mask",
+                    "avx512.mask.pcmpgt.b.128" => "__builtin_ia32_pcmpgtb128_mask",
+                    "avx512.mask.pcmpgt.b.256" => "__builtin_ia32_pcmpgtb256_mask",
+                    "avx512.mask.pcmpgt.b.512" => "__builtin_ia32_pcmpgtb512_mask",
+                    "avx512.mask.pcmpgt.d.128" => "__builtin_ia32_pcmpgtd128_mask",
+                    "avx512.mask.pcmpgt.d.256" => "__builtin_ia32_pcmpgtd256_mask",
+                    "avx512.mask.pcmpgt.d.512" => "__builtin_ia32_pcmpgtd512_mask",
+                    "avx512.mask.pcmpgt.q.128" => "__builtin_ia32_pcmpgtq128_mask",
+                    "avx512.mask.pcmpgt.q.256" => "__builtin_ia32_pcmpgtq256_mask",
+                    "avx512.mask.pcmpgt.q.512" => "__builtin_ia32_pcmpgtq512_mask",
+                    "avx512.mask.pcmpgt.w.128" => "__builtin_ia32_pcmpgtw128_mask",
+                    "avx512.mask.pcmpgt.w.256" => "__builtin_ia32_pcmpgtw256_mask",
+                    "avx512.mask.pcmpgt.w.512" => "__builtin_ia32_pcmpgtw512_mask",
+                    "avx512.mask.permvar.df.256" => "__builtin_ia32_permvardf256_mask",
+                    "avx512.mask.permvar.df.512" => "__builtin_ia32_permvardf512_mask",
+                    "avx512.mask.permvar.di.256" => "__builtin_ia32_permvardi256_mask",
+                    "avx512.mask.permvar.di.512" => "__builtin_ia32_permvardi512_mask",
+                    "avx512.mask.permvar.hi.128" => "__builtin_ia32_permvarhi128_mask",
+                    "avx512.mask.permvar.hi.256" => "__builtin_ia32_permvarhi256_mask",
+                    "avx512.mask.permvar.hi.512" => "__builtin_ia32_permvarhi512_mask",
+                    "avx512.mask.permvar.qi.128" => "__builtin_ia32_permvarqi128_mask",
+                    "avx512.mask.permvar.qi.256" => "__builtin_ia32_permvarqi256_mask",
+                    "avx512.mask.permvar.qi.512" => "__builtin_ia32_permvarqi512_mask",
+                    "avx512.mask.permvar.sf.256" => "__builtin_ia32_permvarsf256_mask",
+                    "avx512.mask.permvar.sf.512" => "__builtin_ia32_permvarsf512_mask",
+                    "avx512.mask.permvar.si.256" => "__builtin_ia32_permvarsi256_mask",
+                    "avx512.mask.permvar.si.512" => "__builtin_ia32_permvarsi512_mask",
+                    "avx512.mask.pmaddubs.w.128" => "__builtin_ia32_pmaddubsw128_mask",
+                    "avx512.mask.pmaddubs.w.256" => "__builtin_ia32_pmaddubsw256_mask",
+                    "avx512.mask.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512_mask",
+                    "avx512.mask.pmaddw.d.128" => "__builtin_ia32_pmaddwd128_mask",
+                    "avx512.mask.pmaddw.d.256" => "__builtin_ia32_pmaddwd256_mask",
+                    "avx512.mask.pmaddw.d.512" => "__builtin_ia32_pmaddwd512_mask",
+                    "avx512.mask.pmaxs.b.128" => "__builtin_ia32_pmaxsb128_mask",
+                    "avx512.mask.pmaxs.b.256" => "__builtin_ia32_pmaxsb256_mask",
+                    "avx512.mask.pmaxs.b.512" => "__builtin_ia32_pmaxsb512_mask",
+                    "avx512.mask.pmaxs.d.128" => "__builtin_ia32_pmaxsd128_mask",
+                    "avx512.mask.pmaxs.d.256" => "__builtin_ia32_pmaxsd256_mask",
+                    "avx512.mask.pmaxs.d.512" => "__builtin_ia32_pmaxsd512_mask",
+                    "avx512.mask.pmaxs.q.128" => "__builtin_ia32_pmaxsq128_mask",
+                    "avx512.mask.pmaxs.q.256" => "__builtin_ia32_pmaxsq256_mask",
+                    "avx512.mask.pmaxs.q.512" => "__builtin_ia32_pmaxsq512_mask",
+                    "avx512.mask.pmaxs.w.128" => "__builtin_ia32_pmaxsw128_mask",
+                    "avx512.mask.pmaxs.w.256" => "__builtin_ia32_pmaxsw256_mask",
+                    "avx512.mask.pmaxs.w.512" => "__builtin_ia32_pmaxsw512_mask",
+                    "avx512.mask.pmaxu.b.128" => "__builtin_ia32_pmaxub128_mask",
+                    "avx512.mask.pmaxu.b.256" => "__builtin_ia32_pmaxub256_mask",
+                    "avx512.mask.pmaxu.b.512" => "__builtin_ia32_pmaxub512_mask",
+                    "avx512.mask.pmaxu.d.128" => "__builtin_ia32_pmaxud128_mask",
+                    "avx512.mask.pmaxu.d.256" => "__builtin_ia32_pmaxud256_mask",
+                    "avx512.mask.pmaxu.d.512" => "__builtin_ia32_pmaxud512_mask",
+                    "avx512.mask.pmaxu.q.128" => "__builtin_ia32_pmaxuq128_mask",
+                    "avx512.mask.pmaxu.q.256" => "__builtin_ia32_pmaxuq256_mask",
+                    "avx512.mask.pmaxu.q.512" => "__builtin_ia32_pmaxuq512_mask",
+                    "avx512.mask.pmaxu.w.128" => "__builtin_ia32_pmaxuw128_mask",
+                    "avx512.mask.pmaxu.w.256" => "__builtin_ia32_pmaxuw256_mask",
+                    "avx512.mask.pmaxu.w.512" => "__builtin_ia32_pmaxuw512_mask",
+                    "avx512.mask.pmins.b.128" => "__builtin_ia32_pminsb128_mask",
+                    "avx512.mask.pmins.b.256" => "__builtin_ia32_pminsb256_mask",
+                    "avx512.mask.pmins.b.512" => "__builtin_ia32_pminsb512_mask",
+                    "avx512.mask.pmins.d.128" => "__builtin_ia32_pminsd128_mask",
+                    "avx512.mask.pmins.d.256" => "__builtin_ia32_pminsd256_mask",
+                    "avx512.mask.pmins.d.512" => "__builtin_ia32_pminsd512_mask",
+                    "avx512.mask.pmins.q.128" => "__builtin_ia32_pminsq128_mask",
+                    "avx512.mask.pmins.q.256" => "__builtin_ia32_pminsq256_mask",
+                    "avx512.mask.pmins.q.512" => "__builtin_ia32_pminsq512_mask",
+                    "avx512.mask.pmins.w.128" => "__builtin_ia32_pminsw128_mask",
+                    "avx512.mask.pmins.w.256" => "__builtin_ia32_pminsw256_mask",
+                    "avx512.mask.pmins.w.512" => "__builtin_ia32_pminsw512_mask",
+                    "avx512.mask.pminu.b.128" => "__builtin_ia32_pminub128_mask",
+                    "avx512.mask.pminu.b.256" => "__builtin_ia32_pminub256_mask",
+                    "avx512.mask.pminu.b.512" => "__builtin_ia32_pminub512_mask",
+                    "avx512.mask.pminu.d.128" => "__builtin_ia32_pminud128_mask",
+                    "avx512.mask.pminu.d.256" => "__builtin_ia32_pminud256_mask",
+                    "avx512.mask.pminu.d.512" => "__builtin_ia32_pminud512_mask",
+                    "avx512.mask.pminu.q.128" => "__builtin_ia32_pminuq128_mask",
+                    "avx512.mask.pminu.q.256" => "__builtin_ia32_pminuq256_mask",
+                    "avx512.mask.pminu.q.512" => "__builtin_ia32_pminuq512_mask",
+                    "avx512.mask.pminu.w.128" => "__builtin_ia32_pminuw128_mask",
+                    "avx512.mask.pminu.w.256" => "__builtin_ia32_pminuw256_mask",
+                    "avx512.mask.pminu.w.512" => "__builtin_ia32_pminuw512_mask",
+                    "avx512.mask.pmov.db.128" => "__builtin_ia32_pmovdb128_mask",
+                    "avx512.mask.pmov.db.256" => "__builtin_ia32_pmovdb256_mask",
+                    "avx512.mask.pmov.db.512" => "__builtin_ia32_pmovdb512_mask",
+                    "avx512.mask.pmov.db.mem.128" => "__builtin_ia32_pmovdb128mem_mask",
+                    "avx512.mask.pmov.db.mem.256" => "__builtin_ia32_pmovdb256mem_mask",
+                    "avx512.mask.pmov.db.mem.512" => "__builtin_ia32_pmovdb512mem_mask",
+                    "avx512.mask.pmov.dw.128" => "__builtin_ia32_pmovdw128_mask",
+                    "avx512.mask.pmov.dw.256" => "__builtin_ia32_pmovdw256_mask",
+                    "avx512.mask.pmov.dw.512" => "__builtin_ia32_pmovdw512_mask",
+                    "avx512.mask.pmov.dw.mem.128" => "__builtin_ia32_pmovdw128mem_mask",
+                    "avx512.mask.pmov.dw.mem.256" => "__builtin_ia32_pmovdw256mem_mask",
+                    "avx512.mask.pmov.dw.mem.512" => "__builtin_ia32_pmovdw512mem_mask",
+                    "avx512.mask.pmov.qb.128" => "__builtin_ia32_pmovqb128_mask",
+                    "avx512.mask.pmov.qb.256" => "__builtin_ia32_pmovqb256_mask",
+                    "avx512.mask.pmov.qb.512" => "__builtin_ia32_pmovqb512_mask",
+                    "avx512.mask.pmov.qb.mem.128" => "__builtin_ia32_pmovqb128mem_mask",
+                    "avx512.mask.pmov.qb.mem.256" => "__builtin_ia32_pmovqb256mem_mask",
+                    "avx512.mask.pmov.qb.mem.512" => "__builtin_ia32_pmovqb512mem_mask",
+                    "avx512.mask.pmov.qd.128" => "__builtin_ia32_pmovqd128_mask",
+                    "avx512.mask.pmov.qd.256" => "__builtin_ia32_pmovqd256_mask",
+                    "avx512.mask.pmov.qd.512" => "__builtin_ia32_pmovqd512_mask",
+                    "avx512.mask.pmov.qd.mem.128" => "__builtin_ia32_pmovqd128mem_mask",
+                    "avx512.mask.pmov.qd.mem.256" => "__builtin_ia32_pmovqd256mem_mask",
+                    "avx512.mask.pmov.qd.mem.512" => "__builtin_ia32_pmovqd512mem_mask",
+                    "avx512.mask.pmov.qw.128" => "__builtin_ia32_pmovqw128_mask",
+                    "avx512.mask.pmov.qw.256" => "__builtin_ia32_pmovqw256_mask",
+                    "avx512.mask.pmov.qw.512" => "__builtin_ia32_pmovqw512_mask",
+                    "avx512.mask.pmov.qw.mem.128" => "__builtin_ia32_pmovqw128mem_mask",
+                    "avx512.mask.pmov.qw.mem.256" => "__builtin_ia32_pmovqw256mem_mask",
+                    "avx512.mask.pmov.qw.mem.512" => "__builtin_ia32_pmovqw512mem_mask",
+                    "avx512.mask.pmov.wb.128" => "__builtin_ia32_pmovwb128_mask",
+                    "avx512.mask.pmov.wb.256" => "__builtin_ia32_pmovwb256_mask",
+                    "avx512.mask.pmov.wb.512" => "__builtin_ia32_pmovwb512_mask",
+                    "avx512.mask.pmov.wb.mem.128" => "__builtin_ia32_pmovwb128mem_mask",
+                    "avx512.mask.pmov.wb.mem.256" => "__builtin_ia32_pmovwb256mem_mask",
+                    "avx512.mask.pmov.wb.mem.512" => "__builtin_ia32_pmovwb512mem_mask",
+                    "avx512.mask.pmovs.db.128" => "__builtin_ia32_pmovsdb128_mask",
+                    "avx512.mask.pmovs.db.256" => "__builtin_ia32_pmovsdb256_mask",
+                    "avx512.mask.pmovs.db.512" => "__builtin_ia32_pmovsdb512_mask",
+                    "avx512.mask.pmovs.db.mem.128" => "__builtin_ia32_pmovsdb128mem_mask",
+                    "avx512.mask.pmovs.db.mem.256" => "__builtin_ia32_pmovsdb256mem_mask",
+                    "avx512.mask.pmovs.db.mem.512" => "__builtin_ia32_pmovsdb512mem_mask",
+                    "avx512.mask.pmovs.dw.128" => "__builtin_ia32_pmovsdw128_mask",
+                    "avx512.mask.pmovs.dw.256" => "__builtin_ia32_pmovsdw256_mask",
+                    "avx512.mask.pmovs.dw.512" => "__builtin_ia32_pmovsdw512_mask",
+                    "avx512.mask.pmovs.dw.mem.128" => "__builtin_ia32_pmovsdw128mem_mask",
+                    "avx512.mask.pmovs.dw.mem.256" => "__builtin_ia32_pmovsdw256mem_mask",
+                    "avx512.mask.pmovs.dw.mem.512" => "__builtin_ia32_pmovsdw512mem_mask",
+                    "avx512.mask.pmovs.qb.128" => "__builtin_ia32_pmovsqb128_mask",
+                    "avx512.mask.pmovs.qb.256" => "__builtin_ia32_pmovsqb256_mask",
+                    "avx512.mask.pmovs.qb.512" => "__builtin_ia32_pmovsqb512_mask",
+                    "avx512.mask.pmovs.qb.mem.128" => "__builtin_ia32_pmovsqb128mem_mask",
+                    "avx512.mask.pmovs.qb.mem.256" => "__builtin_ia32_pmovsqb256mem_mask",
+                    "avx512.mask.pmovs.qb.mem.512" => "__builtin_ia32_pmovsqb512mem_mask",
+                    "avx512.mask.pmovs.qd.128" => "__builtin_ia32_pmovsqd128_mask",
+                    "avx512.mask.pmovs.qd.256" => "__builtin_ia32_pmovsqd256_mask",
+                    "avx512.mask.pmovs.qd.512" => "__builtin_ia32_pmovsqd512_mask",
+                    "avx512.mask.pmovs.qd.mem.128" => "__builtin_ia32_pmovsqd128mem_mask",
+                    "avx512.mask.pmovs.qd.mem.256" => "__builtin_ia32_pmovsqd256mem_mask",
+                    "avx512.mask.pmovs.qd.mem.512" => "__builtin_ia32_pmovsqd512mem_mask",
+                    "avx512.mask.pmovs.qw.128" => "__builtin_ia32_pmovsqw128_mask",
+                    "avx512.mask.pmovs.qw.256" => "__builtin_ia32_pmovsqw256_mask",
+                    "avx512.mask.pmovs.qw.512" => "__builtin_ia32_pmovsqw512_mask",
+                    "avx512.mask.pmovs.qw.mem.128" => "__builtin_ia32_pmovsqw128mem_mask",
+                    "avx512.mask.pmovs.qw.mem.256" => "__builtin_ia32_pmovsqw256mem_mask",
+                    "avx512.mask.pmovs.qw.mem.512" => "__builtin_ia32_pmovsqw512mem_mask",
+                    "avx512.mask.pmovs.wb.128" => "__builtin_ia32_pmovswb128_mask",
+                    "avx512.mask.pmovs.wb.256" => "__builtin_ia32_pmovswb256_mask",
+                    "avx512.mask.pmovs.wb.512" => "__builtin_ia32_pmovswb512_mask",
+                    "avx512.mask.pmovs.wb.mem.128" => "__builtin_ia32_pmovswb128mem_mask",
+                    "avx512.mask.pmovs.wb.mem.256" => "__builtin_ia32_pmovswb256mem_mask",
+                    "avx512.mask.pmovs.wb.mem.512" => "__builtin_ia32_pmovswb512mem_mask",
+                    "avx512.mask.pmovsxb.d.128" => "__builtin_ia32_pmovsxbd128_mask",
+                    "avx512.mask.pmovsxb.d.256" => "__builtin_ia32_pmovsxbd256_mask",
+                    "avx512.mask.pmovsxb.d.512" => "__builtin_ia32_pmovsxbd512_mask",
+                    "avx512.mask.pmovsxb.q.128" => "__builtin_ia32_pmovsxbq128_mask",
+                    "avx512.mask.pmovsxb.q.256" => "__builtin_ia32_pmovsxbq256_mask",
+                    "avx512.mask.pmovsxb.q.512" => "__builtin_ia32_pmovsxbq512_mask",
+                    "avx512.mask.pmovsxb.w.128" => "__builtin_ia32_pmovsxbw128_mask",
+                    "avx512.mask.pmovsxb.w.256" => "__builtin_ia32_pmovsxbw256_mask",
+                    "avx512.mask.pmovsxb.w.512" => "__builtin_ia32_pmovsxbw512_mask",
+                    "avx512.mask.pmovsxd.q.128" => "__builtin_ia32_pmovsxdq128_mask",
+                    "avx512.mask.pmovsxd.q.256" => "__builtin_ia32_pmovsxdq256_mask",
+                    "avx512.mask.pmovsxd.q.512" => "__builtin_ia32_pmovsxdq512_mask",
+                    "avx512.mask.pmovsxw.d.128" => "__builtin_ia32_pmovsxwd128_mask",
+                    "avx512.mask.pmovsxw.d.256" => "__builtin_ia32_pmovsxwd256_mask",
+                    "avx512.mask.pmovsxw.d.512" => "__builtin_ia32_pmovsxwd512_mask",
+                    "avx512.mask.pmovsxw.q.128" => "__builtin_ia32_pmovsxwq128_mask",
+                    "avx512.mask.pmovsxw.q.256" => "__builtin_ia32_pmovsxwq256_mask",
+                    "avx512.mask.pmovsxw.q.512" => "__builtin_ia32_pmovsxwq512_mask",
+                    "avx512.mask.pmovus.db.128" => "__builtin_ia32_pmovusdb128_mask",
+                    "avx512.mask.pmovus.db.256" => "__builtin_ia32_pmovusdb256_mask",
+                    "avx512.mask.pmovus.db.512" => "__builtin_ia32_pmovusdb512_mask",
+                    "avx512.mask.pmovus.db.mem.128" => "__builtin_ia32_pmovusdb128mem_mask",
+                    "avx512.mask.pmovus.db.mem.256" => "__builtin_ia32_pmovusdb256mem_mask",
+                    "avx512.mask.pmovus.db.mem.512" => "__builtin_ia32_pmovusdb512mem_mask",
+                    "avx512.mask.pmovus.dw.128" => "__builtin_ia32_pmovusdw128_mask",
+                    "avx512.mask.pmovus.dw.256" => "__builtin_ia32_pmovusdw256_mask",
+                    "avx512.mask.pmovus.dw.512" => "__builtin_ia32_pmovusdw512_mask",
+                    "avx512.mask.pmovus.dw.mem.128" => "__builtin_ia32_pmovusdw128mem_mask",
+                    "avx512.mask.pmovus.dw.mem.256" => "__builtin_ia32_pmovusdw256mem_mask",
+                    "avx512.mask.pmovus.dw.mem.512" => "__builtin_ia32_pmovusdw512mem_mask",
+                    "avx512.mask.pmovus.qb.128" => "__builtin_ia32_pmovusqb128_mask",
+                    "avx512.mask.pmovus.qb.256" => "__builtin_ia32_pmovusqb256_mask",
+                    "avx512.mask.pmovus.qb.512" => "__builtin_ia32_pmovusqb512_mask",
+                    "avx512.mask.pmovus.qb.mem.128" => "__builtin_ia32_pmovusqb128mem_mask",
+                    "avx512.mask.pmovus.qb.mem.256" => "__builtin_ia32_pmovusqb256mem_mask",
+                    "avx512.mask.pmovus.qb.mem.512" => "__builtin_ia32_pmovusqb512mem_mask",
+                    "avx512.mask.pmovus.qd.128" => "__builtin_ia32_pmovusqd128_mask",
+                    "avx512.mask.pmovus.qd.256" => "__builtin_ia32_pmovusqd256_mask",
+                    "avx512.mask.pmovus.qd.512" => "__builtin_ia32_pmovusqd512_mask",
+                    "avx512.mask.pmovus.qd.mem.128" => "__builtin_ia32_pmovusqd128mem_mask",
+                    "avx512.mask.pmovus.qd.mem.256" => "__builtin_ia32_pmovusqd256mem_mask",
+                    "avx512.mask.pmovus.qd.mem.512" => "__builtin_ia32_pmovusqd512mem_mask",
+                    "avx512.mask.pmovus.qw.128" => "__builtin_ia32_pmovusqw128_mask",
+                    "avx512.mask.pmovus.qw.256" => "__builtin_ia32_pmovusqw256_mask",
+                    "avx512.mask.pmovus.qw.512" => "__builtin_ia32_pmovusqw512_mask",
+                    "avx512.mask.pmovus.qw.mem.128" => "__builtin_ia32_pmovusqw128mem_mask",
+                    "avx512.mask.pmovus.qw.mem.256" => "__builtin_ia32_pmovusqw256mem_mask",
+                    "avx512.mask.pmovus.qw.mem.512" => "__builtin_ia32_pmovusqw512mem_mask",
+                    "avx512.mask.pmovus.wb.128" => "__builtin_ia32_pmovuswb128_mask",
+                    "avx512.mask.pmovus.wb.256" => "__builtin_ia32_pmovuswb256_mask",
+                    "avx512.mask.pmovus.wb.512" => "__builtin_ia32_pmovuswb512_mask",
+                    "avx512.mask.pmovus.wb.mem.128" => "__builtin_ia32_pmovuswb128mem_mask",
+                    "avx512.mask.pmovus.wb.mem.256" => "__builtin_ia32_pmovuswb256mem_mask",
+                    "avx512.mask.pmovus.wb.mem.512" => "__builtin_ia32_pmovuswb512mem_mask",
+                    "avx512.mask.pmovzxb.d.128" => "__builtin_ia32_pmovzxbd128_mask",
+                    "avx512.mask.pmovzxb.d.256" => "__builtin_ia32_pmovzxbd256_mask",
+                    "avx512.mask.pmovzxb.d.512" => "__builtin_ia32_pmovzxbd512_mask",
+                    "avx512.mask.pmovzxb.q.128" => "__builtin_ia32_pmovzxbq128_mask",
+                    "avx512.mask.pmovzxb.q.256" => "__builtin_ia32_pmovzxbq256_mask",
+                    "avx512.mask.pmovzxb.q.512" => "__builtin_ia32_pmovzxbq512_mask",
+                    "avx512.mask.pmovzxb.w.128" => "__builtin_ia32_pmovzxbw128_mask",
+                    "avx512.mask.pmovzxb.w.256" => "__builtin_ia32_pmovzxbw256_mask",
+                    "avx512.mask.pmovzxb.w.512" => "__builtin_ia32_pmovzxbw512_mask",
+                    "avx512.mask.pmovzxd.q.128" => "__builtin_ia32_pmovzxdq128_mask",
+                    "avx512.mask.pmovzxd.q.256" => "__builtin_ia32_pmovzxdq256_mask",
+                    "avx512.mask.pmovzxd.q.512" => "__builtin_ia32_pmovzxdq512_mask",
+                    "avx512.mask.pmovzxw.d.128" => "__builtin_ia32_pmovzxwd128_mask",
+                    "avx512.mask.pmovzxw.d.256" => "__builtin_ia32_pmovzxwd256_mask",
+                    "avx512.mask.pmovzxw.d.512" => "__builtin_ia32_pmovzxwd512_mask",
+                    "avx512.mask.pmovzxw.q.128" => "__builtin_ia32_pmovzxwq128_mask",
+                    "avx512.mask.pmovzxw.q.256" => "__builtin_ia32_pmovzxwq256_mask",
+                    "avx512.mask.pmovzxw.q.512" => "__builtin_ia32_pmovzxwq512_mask",
+                    "avx512.mask.pmul.dq.128" => "__builtin_ia32_pmuldq128_mask",
+                    "avx512.mask.pmul.dq.256" => "__builtin_ia32_pmuldq256_mask",
+                    "avx512.mask.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask",
+                    "avx512.mask.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128_mask",
+                    "avx512.mask.pmul.hr.sw.256" => "__builtin_ia32_pmulhrsw256_mask",
+                    "avx512.mask.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512_mask",
+                    "avx512.mask.pmulh.w.128" => "__builtin_ia32_pmulhw128_mask",
+                    "avx512.mask.pmulh.w.256" => "__builtin_ia32_pmulhw256_mask",
+                    "avx512.mask.pmulh.w.512" => "__builtin_ia32_pmulhw512_mask",
+                    "avx512.mask.pmulhu.w.128" => "__builtin_ia32_pmulhuw128_mask",
+                    "avx512.mask.pmulhu.w.256" => "__builtin_ia32_pmulhuw256_mask",
+                    "avx512.mask.pmulhu.w.512" => "__builtin_ia32_pmulhuw512_mask",
+                    "avx512.mask.pmull.d.128" => "__builtin_ia32_pmulld128_mask",
+                    "avx512.mask.pmull.d.256" => "__builtin_ia32_pmulld256_mask",
+                    "avx512.mask.pmull.d.512" => "__builtin_ia32_pmulld512_mask",
+                    "avx512.mask.pmull.q.128" => "__builtin_ia32_pmullq128_mask",
+                    "avx512.mask.pmull.q.256" => "__builtin_ia32_pmullq256_mask",
+                    "avx512.mask.pmull.q.512" => "__builtin_ia32_pmullq512_mask",
+                    "avx512.mask.pmull.w.128" => "__builtin_ia32_pmullw128_mask",
+                    "avx512.mask.pmull.w.256" => "__builtin_ia32_pmullw256_mask",
+                    "avx512.mask.pmull.w.512" => "__builtin_ia32_pmullw512_mask",
+                    "avx512.mask.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128_mask",
+                    "avx512.mask.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256_mask",
+                    "avx512.mask.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512_mask",
+                    "avx512.mask.pmulu.dq.128" => "__builtin_ia32_pmuludq128_mask",
+                    "avx512.mask.pmulu.dq.256" => "__builtin_ia32_pmuludq256_mask",
+                    "avx512.mask.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask",
+                    "avx512.mask.prol.d.128" => "__builtin_ia32_prold128_mask",
+                    "avx512.mask.prol.d.256" => "__builtin_ia32_prold256_mask",
+                    "avx512.mask.prol.d.512" => "__builtin_ia32_prold512_mask",
+                    "avx512.mask.prol.q.128" => "__builtin_ia32_prolq128_mask",
+                    "avx512.mask.prol.q.256" => "__builtin_ia32_prolq256_mask",
+                    "avx512.mask.prol.q.512" => "__builtin_ia32_prolq512_mask",
+                    "avx512.mask.prolv.d.128" => "__builtin_ia32_prolvd128_mask",
+                    "avx512.mask.prolv.d.256" => "__builtin_ia32_prolvd256_mask",
+                    "avx512.mask.prolv.d.512" => "__builtin_ia32_prolvd512_mask",
+                    "avx512.mask.prolv.q.128" => "__builtin_ia32_prolvq128_mask",
+                    "avx512.mask.prolv.q.256" => "__builtin_ia32_prolvq256_mask",
+                    "avx512.mask.prolv.q.512" => "__builtin_ia32_prolvq512_mask",
+                    "avx512.mask.pror.d.128" => "__builtin_ia32_prord128_mask",
+                    "avx512.mask.pror.d.256" => "__builtin_ia32_prord256_mask",
+                    "avx512.mask.pror.d.512" => "__builtin_ia32_prord512_mask",
+                    "avx512.mask.pror.q.128" => "__builtin_ia32_prorq128_mask",
+                    "avx512.mask.pror.q.256" => "__builtin_ia32_prorq256_mask",
+                    "avx512.mask.pror.q.512" => "__builtin_ia32_prorq512_mask",
+                    "avx512.mask.prorv.d.128" => "__builtin_ia32_prorvd128_mask",
+                    "avx512.mask.prorv.d.256" => "__builtin_ia32_prorvd256_mask",
+                    "avx512.mask.prorv.d.512" => "__builtin_ia32_prorvd512_mask",
+                    "avx512.mask.prorv.q.128" => "__builtin_ia32_prorvq128_mask",
+                    "avx512.mask.prorv.q.256" => "__builtin_ia32_prorvq256_mask",
+                    "avx512.mask.prorv.q.512" => "__builtin_ia32_prorvq512_mask",
+                    "avx512.mask.pshuf.b.128" => "__builtin_ia32_pshufb128_mask",
+                    "avx512.mask.pshuf.b.256" => "__builtin_ia32_pshufb256_mask",
+                    "avx512.mask.pshuf.b.512" => "__builtin_ia32_pshufb512_mask",
+                    "avx512.mask.psll.d" => "__builtin_ia32_pslld512_mask",
+                    "avx512.mask.psll.d.128" => "__builtin_ia32_pslld128_mask",
+                    "avx512.mask.psll.d.256" => "__builtin_ia32_pslld256_mask",
+                    "avx512.mask.psll.di.128" => "__builtin_ia32_pslldi128_mask",
+                    "avx512.mask.psll.di.256" => "__builtin_ia32_pslldi256_mask",
+                    "avx512.mask.psll.di.512" => "__builtin_ia32_pslldi512_mask",
+                    "avx512.mask.psll.q" => "__builtin_ia32_psllq512_mask",
+                    "avx512.mask.psll.q.128" => "__builtin_ia32_psllq128_mask",
+                    "avx512.mask.psll.q.256" => "__builtin_ia32_psllq256_mask",
+                    "avx512.mask.psll.qi.128" => "__builtin_ia32_psllqi128_mask",
+                    "avx512.mask.psll.qi.256" => "__builtin_ia32_psllqi256_mask",
+                    "avx512.mask.psll.qi.512" => "__builtin_ia32_psllqi512_mask",
+                    "avx512.mask.psll.w.128" => "__builtin_ia32_psllw128_mask",
+                    "avx512.mask.psll.w.256" => "__builtin_ia32_psllw256_mask",
+                    "avx512.mask.psll.w.512" => "__builtin_ia32_psllw512_mask",
+                    "avx512.mask.psll.wi.128" => "__builtin_ia32_psllwi128_mask",
+                    "avx512.mask.psll.wi.256" => "__builtin_ia32_psllwi256_mask",
+                    "avx512.mask.psll.wi.512" => "__builtin_ia32_psllwi512_mask",
+                    "avx512.mask.psllv.d" => "__builtin_ia32_psllv16si_mask",
+                    "avx512.mask.psllv.q" => "__builtin_ia32_psllv8di_mask",
+                    "avx512.mask.psllv16.hi" => "__builtin_ia32_psllv16hi_mask",
+                    "avx512.mask.psllv2.di" => "__builtin_ia32_psllv2di_mask",
+                    "avx512.mask.psllv32hi" => "__builtin_ia32_psllv32hi_mask",
+                    "avx512.mask.psllv4.di" => "__builtin_ia32_psllv4di_mask",
+                    "avx512.mask.psllv4.si" => "__builtin_ia32_psllv4si_mask",
+                    "avx512.mask.psllv8.hi" => "__builtin_ia32_psllv8hi_mask",
+                    "avx512.mask.psllv8.si" => "__builtin_ia32_psllv8si_mask",
+                    "avx512.mask.psra.d" => "__builtin_ia32_psrad512_mask",
+                    "avx512.mask.psra.d.128" => "__builtin_ia32_psrad128_mask",
+                    "avx512.mask.psra.d.256" => "__builtin_ia32_psrad256_mask",
+                    "avx512.mask.psra.di.128" => "__builtin_ia32_psradi128_mask",
+                    "avx512.mask.psra.di.256" => "__builtin_ia32_psradi256_mask",
+                    "avx512.mask.psra.di.512" => "__builtin_ia32_psradi512_mask",
+                    "avx512.mask.psra.q" => "__builtin_ia32_psraq512_mask",
+                    "avx512.mask.psra.q.128" => "__builtin_ia32_psraq128_mask",
+                    "avx512.mask.psra.q.256" => "__builtin_ia32_psraq256_mask",
+                    "avx512.mask.psra.qi.128" => "__builtin_ia32_psraqi128_mask",
+                    "avx512.mask.psra.qi.256" => "__builtin_ia32_psraqi256_mask",
+                    "avx512.mask.psra.qi.512" => "__builtin_ia32_psraqi512_mask",
+                    "avx512.mask.psra.w.128" => "__builtin_ia32_psraw128_mask",
+                    "avx512.mask.psra.w.256" => "__builtin_ia32_psraw256_mask",
+                    "avx512.mask.psra.w.512" => "__builtin_ia32_psraw512_mask",
+                    "avx512.mask.psra.wi.128" => "__builtin_ia32_psrawi128_mask",
+                    "avx512.mask.psra.wi.256" => "__builtin_ia32_psrawi256_mask",
+                    "avx512.mask.psra.wi.512" => "__builtin_ia32_psrawi512_mask",
+                    "avx512.mask.psrav.d" => "__builtin_ia32_psrav16si_mask",
+                    "avx512.mask.psrav.q" => "__builtin_ia32_psrav8di_mask",
+                    "avx512.mask.psrav.q.128" => "__builtin_ia32_psravq128_mask",
+                    "avx512.mask.psrav.q.256" => "__builtin_ia32_psravq256_mask",
+                    "avx512.mask.psrav16.hi" => "__builtin_ia32_psrav16hi_mask",
+                    "avx512.mask.psrav32.hi" => "__builtin_ia32_psrav32hi_mask",
+                    "avx512.mask.psrav4.si" => "__builtin_ia32_psrav4si_mask",
+                    "avx512.mask.psrav8.hi" => "__builtin_ia32_psrav8hi_mask",
+                    "avx512.mask.psrav8.si" => "__builtin_ia32_psrav8si_mask",
+                    "avx512.mask.psrl.d" => "__builtin_ia32_psrld512_mask",
+                    "avx512.mask.psrl.d.128" => "__builtin_ia32_psrld128_mask",
+                    "avx512.mask.psrl.d.256" => "__builtin_ia32_psrld256_mask",
+                    "avx512.mask.psrl.di.128" => "__builtin_ia32_psrldi128_mask",
+                    "avx512.mask.psrl.di.256" => "__builtin_ia32_psrldi256_mask",
+                    "avx512.mask.psrl.di.512" => "__builtin_ia32_psrldi512_mask",
+                    "avx512.mask.psrl.q" => "__builtin_ia32_psrlq512_mask",
+                    "avx512.mask.psrl.q.128" => "__builtin_ia32_psrlq128_mask",
+                    "avx512.mask.psrl.q.256" => "__builtin_ia32_psrlq256_mask",
+                    "avx512.mask.psrl.qi.128" => "__builtin_ia32_psrlqi128_mask",
+                    "avx512.mask.psrl.qi.256" => "__builtin_ia32_psrlqi256_mask",
+                    "avx512.mask.psrl.qi.512" => "__builtin_ia32_psrlqi512_mask",
+                    "avx512.mask.psrl.w.128" => "__builtin_ia32_psrlw128_mask",
+                    "avx512.mask.psrl.w.256" => "__builtin_ia32_psrlw256_mask",
+                    "avx512.mask.psrl.w.512" => "__builtin_ia32_psrlw512_mask",
+                    "avx512.mask.psrl.wi.128" => "__builtin_ia32_psrlwi128_mask",
+                    "avx512.mask.psrl.wi.256" => "__builtin_ia32_psrlwi256_mask",
+                    "avx512.mask.psrl.wi.512" => "__builtin_ia32_psrlwi512_mask",
+                    "avx512.mask.psrlv.d" => "__builtin_ia32_psrlv16si_mask",
+                    "avx512.mask.psrlv.q" => "__builtin_ia32_psrlv8di_mask",
+                    "avx512.mask.psrlv16.hi" => "__builtin_ia32_psrlv16hi_mask",
+                    "avx512.mask.psrlv2.di" => "__builtin_ia32_psrlv2di_mask",
+                    "avx512.mask.psrlv32hi" => "__builtin_ia32_psrlv32hi_mask",
+                    "avx512.mask.psrlv4.di" => "__builtin_ia32_psrlv4di_mask",
+                    "avx512.mask.psrlv4.si" => "__builtin_ia32_psrlv4si_mask",
+                    "avx512.mask.psrlv8.hi" => "__builtin_ia32_psrlv8hi_mask",
+                    "avx512.mask.psrlv8.si" => "__builtin_ia32_psrlv8si_mask",
+                    "avx512.mask.psub.b.128" => "__builtin_ia32_psubb128_mask",
+                    "avx512.mask.psub.b.256" => "__builtin_ia32_psubb256_mask",
+                    "avx512.mask.psub.b.512" => "__builtin_ia32_psubb512_mask",
+                    "avx512.mask.psub.d.128" => "__builtin_ia32_psubd128_mask",
+                    "avx512.mask.psub.d.256" => "__builtin_ia32_psubd256_mask",
+                    "avx512.mask.psub.d.512" => "__builtin_ia32_psubd512_mask",
+                    "avx512.mask.psub.q.128" => "__builtin_ia32_psubq128_mask",
+                    "avx512.mask.psub.q.256" => "__builtin_ia32_psubq256_mask",
+                    "avx512.mask.psub.q.512" => "__builtin_ia32_psubq512_mask",
+                    "avx512.mask.psub.w.128" => "__builtin_ia32_psubw128_mask",
+                    "avx512.mask.psub.w.256" => "__builtin_ia32_psubw256_mask",
+                    "avx512.mask.psub.w.512" => "__builtin_ia32_psubw512_mask",
+                    "avx512.mask.psubs.b.128" => "__builtin_ia32_psubsb128_mask",
+                    "avx512.mask.psubs.b.256" => "__builtin_ia32_psubsb256_mask",
+                    "avx512.mask.psubs.b.512" => "__builtin_ia32_psubsb512_mask",
+                    "avx512.mask.psubs.w.128" => "__builtin_ia32_psubsw128_mask",
+                    "avx512.mask.psubs.w.256" => "__builtin_ia32_psubsw256_mask",
+                    "avx512.mask.psubs.w.512" => "__builtin_ia32_psubsw512_mask",
+                    "avx512.mask.psubus.b.128" => "__builtin_ia32_psubusb128_mask",
+                    "avx512.mask.psubus.b.256" => "__builtin_ia32_psubusb256_mask",
+                    "avx512.mask.psubus.b.512" => "__builtin_ia32_psubusb512_mask",
+                    "avx512.mask.psubus.w.128" => "__builtin_ia32_psubusw128_mask",
+                    "avx512.mask.psubus.w.256" => "__builtin_ia32_psubusw256_mask",
+                    "avx512.mask.psubus.w.512" => "__builtin_ia32_psubusw512_mask",
+                    "avx512.mask.pternlog.d.128" => "__builtin_ia32_pternlogd128_mask",
+                    "avx512.mask.pternlog.d.256" => "__builtin_ia32_pternlogd256_mask",
+                    "avx512.mask.pternlog.d.512" => "__builtin_ia32_pternlogd512_mask",
+                    "avx512.mask.pternlog.q.128" => "__builtin_ia32_pternlogq128_mask",
+                    "avx512.mask.pternlog.q.256" => "__builtin_ia32_pternlogq256_mask",
+                    "avx512.mask.pternlog.q.512" => "__builtin_ia32_pternlogq512_mask",
+                    "avx512.mask.ptestm.d.512" => "__builtin_ia32_ptestmd512",
+                    "avx512.mask.ptestm.q.512" => "__builtin_ia32_ptestmq512",
+                    "avx512.mask.range.pd.128" => "__builtin_ia32_rangepd128_mask",
+                    "avx512.mask.range.pd.256" => "__builtin_ia32_rangepd256_mask",
+                    "avx512.mask.range.pd.512" => "__builtin_ia32_rangepd512_mask",
+                    "avx512.mask.range.ps.128" => "__builtin_ia32_rangeps128_mask",
+                    "avx512.mask.range.ps.256" => "__builtin_ia32_rangeps256_mask",
+                    "avx512.mask.range.ps.512" => "__builtin_ia32_rangeps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.range.sd" => "__builtin_ia32_rangesd128_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.range.ss" => "__builtin_ia32_rangess128_round_mask",
+                    "avx512.mask.reduce.pd.128" => "__builtin_ia32_reducepd128_mask",
+                    "avx512.mask.reduce.pd.256" => "__builtin_ia32_reducepd256_mask",
+                    "avx512.mask.reduce.pd.512" => "__builtin_ia32_reducepd512_mask",
+                    "avx512.mask.reduce.ps.128" => "__builtin_ia32_reduceps128_mask",
+                    "avx512.mask.reduce.ps.256" => "__builtin_ia32_reduceps256_mask",
+                    "avx512.mask.reduce.ps.512" => "__builtin_ia32_reduceps512_mask",
+                    "avx512.mask.reduce.sd" => "__builtin_ia32_reducesd_mask",
+                    "avx512.mask.reduce.ss" => "__builtin_ia32_reducess_mask",
+                    "avx512.mask.rndscale.pd.128" => "__builtin_ia32_rndscalepd_128_mask",
+                    "avx512.mask.rndscale.pd.256" => "__builtin_ia32_rndscalepd_256_mask",
+                    "avx512.mask.rndscale.pd.512" => "__builtin_ia32_rndscalepd_mask",
+                    "avx512.mask.rndscale.ps.128" => "__builtin_ia32_rndscaleps_128_mask",
+                    "avx512.mask.rndscale.ps.256" => "__builtin_ia32_rndscaleps_256_mask",
+                    "avx512.mask.rndscale.ps.512" => "__builtin_ia32_rndscaleps_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.rndscale.sd" => "__builtin_ia32_rndscalesd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.rndscale.ss" => "__builtin_ia32_rndscaless_round_mask",
+                    "avx512.mask.scalef.pd.128" => "__builtin_ia32_scalefpd128_mask",
+                    "avx512.mask.scalef.pd.256" => "__builtin_ia32_scalefpd256_mask",
+                    "avx512.mask.scalef.pd.512" => "__builtin_ia32_scalefpd512_mask",
+                    "avx512.mask.scalef.ps.128" => "__builtin_ia32_scalefps128_mask",
+                    "avx512.mask.scalef.ps.256" => "__builtin_ia32_scalefps256_mask",
+                    "avx512.mask.scalef.ps.512" => "__builtin_ia32_scalefps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.scalef.sd" => "__builtin_ia32_scalefsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.scalef.ss" => "__builtin_ia32_scalefss_round_mask",
+                    "avx512.mask.shuf.f32x4" => "__builtin_ia32_shuf_f32x4_mask",
+                    "avx512.mask.shuf.f32x4.256" => "__builtin_ia32_shuf_f32x4_256_mask",
+                    "avx512.mask.shuf.f64x2" => "__builtin_ia32_shuf_f64x2_mask",
+                    "avx512.mask.shuf.f64x2.256" => "__builtin_ia32_shuf_f64x2_256_mask",
+                    "avx512.mask.shuf.i32x4" => "__builtin_ia32_shuf_i32x4_mask",
+                    "avx512.mask.shuf.i32x4.256" => "__builtin_ia32_shuf_i32x4_256_mask",
+                    "avx512.mask.shuf.i64x2" => "__builtin_ia32_shuf_i64x2_mask",
+                    "avx512.mask.shuf.i64x2.256" => "__builtin_ia32_shuf_i64x2_256_mask",
+                    "avx512.mask.shuf.pd.128" => "__builtin_ia32_shufpd128_mask",
+                    "avx512.mask.shuf.pd.256" => "__builtin_ia32_shufpd256_mask",
+                    "avx512.mask.shuf.pd.512" => "__builtin_ia32_shufpd512_mask",
+                    "avx512.mask.shuf.ps.128" => "__builtin_ia32_shufps128_mask",
+                    "avx512.mask.shuf.ps.256" => "__builtin_ia32_shufps256_mask",
+                    "avx512.mask.shuf.ps.512" => "__builtin_ia32_shufps512_mask",
+                    "avx512.mask.sqrt.pd.128" => "__builtin_ia32_sqrtpd128_mask",
+                    "avx512.mask.sqrt.pd.256" => "__builtin_ia32_sqrtpd256_mask",
+                    "avx512.mask.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
+                    "avx512.mask.sqrt.ps.128" => "__builtin_ia32_sqrtps128_mask",
+                    "avx512.mask.sqrt.ps.256" => "__builtin_ia32_sqrtps256_mask",
+                    "avx512.mask.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.sqrt.sd" => "__builtin_ia32_sqrtsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.sqrt.ss" => "__builtin_ia32_sqrtss_round_mask",
+                    "avx512.mask.store.ss" => "__builtin_ia32_storess_mask",
+                    "avx512.mask.storeu.d.512" => "__builtin_ia32_storedqusi512_mask",
+                    "avx512.mask.storeu.pd.512" => "__builtin_ia32_storeupd512_mask",
+                    "avx512.mask.storeu.ps.512" => "__builtin_ia32_storeups512_mask",
+                    "avx512.mask.storeu.q.512" => "__builtin_ia32_storedqudi512_mask",
+                    "avx512.mask.sub.pd.128" => "__builtin_ia32_subpd128_mask",
+                    "avx512.mask.sub.pd.256" => "__builtin_ia32_subpd256_mask",
+                    "avx512.mask.sub.pd.512" => "__builtin_ia32_subpd512_mask",
+                    "avx512.mask.sub.ps.128" => "__builtin_ia32_subps128_mask",
+                    "avx512.mask.sub.ps.256" => "__builtin_ia32_subps256_mask",
+                    "avx512.mask.sub.ps.512" => "__builtin_ia32_subps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.sub.sd.round" => "__builtin_ia32_subsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.sub.ss.round" => "__builtin_ia32_subss_round_mask",
+                    "avx512.mask.valign.d.128" => "__builtin_ia32_alignd128_mask",
+                    "avx512.mask.valign.d.256" => "__builtin_ia32_alignd256_mask",
+                    "avx512.mask.valign.d.512" => "__builtin_ia32_alignd512_mask",
+                    "avx512.mask.valign.q.128" => "__builtin_ia32_alignq128_mask",
+                    "avx512.mask.valign.q.256" => "__builtin_ia32_alignq256_mask",
+                    "avx512.mask.valign.q.512" => "__builtin_ia32_alignq512_mask",
+                    "avx512.mask.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps_mask",
+                    "avx512.mask.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256_mask",
+                    "avx512.mask.vcvtph2ps.512" => "__builtin_ia32_vcvtph2ps512_mask",
+                    "avx512.mask.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph_mask",
+                    "avx512.mask.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256_mask",
+                    "avx512.mask.vcvtps2ph.512" => "__builtin_ia32_vcvtps2ph512_mask",
+                    "avx512.mask.vextractf32x4.256" => "__builtin_ia32_extractf32x4_256_mask",
+                    "avx512.mask.vextractf32x4.512" => "__builtin_ia32_extractf32x4_mask",
+                    "avx512.mask.vextractf32x8.512" => "__builtin_ia32_extractf32x8_mask",
+                    "avx512.mask.vextractf64x2.256" => "__builtin_ia32_extractf64x2_256_mask",
+                    "avx512.mask.vextractf64x2.512" => "__builtin_ia32_extractf64x2_512_mask",
+                    "avx512.mask.vextractf64x4.512" => "__builtin_ia32_extractf64x4_mask",
+                    "avx512.mask.vextracti32x4.256" => "__builtin_ia32_extracti32x4_256_mask",
+                    "avx512.mask.vextracti32x4.512" => "__builtin_ia32_extracti32x4_mask",
+                    "avx512.mask.vextracti32x8.512" => "__builtin_ia32_extracti32x8_mask",
+                    "avx512.mask.vextracti64x2.256" => "__builtin_ia32_extracti64x2_256_mask",
+                    "avx512.mask.vextracti64x2.512" => "__builtin_ia32_extracti64x2_512_mask",
+                    "avx512.mask.vextracti64x4.512" => "__builtin_ia32_extracti64x4_mask",
+                    "avx512.mask.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_mask",
+                    "avx512.mask.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_mask",
+                    "avx512.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
+                    "avx512.mask.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_mask",
+                    "avx512.mask.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_mask",
+                    "avx512.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
+                    "avx512.mask.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_mask",
+                    "avx512.mask.vfmadd.ss" => "__builtin_ia32_vfmaddss3_mask",
+                    "avx512.mask.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_mask",
+                    "avx512.mask.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_mask",
+                    "avx512.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
+                    "avx512.mask.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_mask",
+                    "avx512.mask.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_mask",
+                    "avx512.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
+                    "avx512.mask.vfnmadd.pd.128" => "__builtin_ia32_vfnmaddpd128_mask",
+                    "avx512.mask.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256_mask",
+                    "avx512.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
+                    "avx512.mask.vfnmadd.ps.128" => "__builtin_ia32_vfnmaddps128_mask",
+                    "avx512.mask.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256_mask",
+                    "avx512.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
+                    "avx512.mask.vfnmsub.pd.128" => "__builtin_ia32_vfnmsubpd128_mask",
+                    "avx512.mask.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256_mask",
+                    "avx512.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
+                    "avx512.mask.vfnmsub.ps.128" => "__builtin_ia32_vfnmsubps128_mask",
+                    "avx512.mask.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256_mask",
+                    "avx512.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
+                    "avx512.mask.vpermi2var.d.128" => "__builtin_ia32_vpermi2vard128_mask",
+                    "avx512.mask.vpermi2var.d.256" => "__builtin_ia32_vpermi2vard256_mask",
+                    "avx512.mask.vpermi2var.d.512" => "__builtin_ia32_vpermi2vard512_mask",
+                    "avx512.mask.vpermi2var.hi.128" => "__builtin_ia32_vpermi2varhi128_mask",
+                    "avx512.mask.vpermi2var.hi.256" => "__builtin_ia32_vpermi2varhi256_mask",
+                    "avx512.mask.vpermi2var.hi.512" => "__builtin_ia32_vpermi2varhi512_mask",
+                    "avx512.mask.vpermi2var.pd.128" => "__builtin_ia32_vpermi2varpd128_mask",
+                    "avx512.mask.vpermi2var.pd.256" => "__builtin_ia32_vpermi2varpd256_mask",
+                    "avx512.mask.vpermi2var.pd.512" => "__builtin_ia32_vpermi2varpd512_mask",
+                    "avx512.mask.vpermi2var.ps.128" => "__builtin_ia32_vpermi2varps128_mask",
+                    "avx512.mask.vpermi2var.ps.256" => "__builtin_ia32_vpermi2varps256_mask",
+                    "avx512.mask.vpermi2var.ps.512" => "__builtin_ia32_vpermi2varps512_mask",
+                    "avx512.mask.vpermi2var.q.128" => "__builtin_ia32_vpermi2varq128_mask",
+                    "avx512.mask.vpermi2var.q.256" => "__builtin_ia32_vpermi2varq256_mask",
+                    "avx512.mask.vpermi2var.q.512" => "__builtin_ia32_vpermi2varq512_mask",
+                    "avx512.mask.vpermi2var.qi.128" => "__builtin_ia32_vpermi2varqi128_mask",
+                    "avx512.mask.vpermi2var.qi.256" => "__builtin_ia32_vpermi2varqi256_mask",
+                    "avx512.mask.vpermi2var.qi.512" => "__builtin_ia32_vpermi2varqi512_mask",
+                    "avx512.mask.vpermilvar.pd.128" => "__builtin_ia32_vpermilvarpd_mask",
+                    "avx512.mask.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256_mask",
+                    "avx512.mask.vpermilvar.pd.512" => "__builtin_ia32_vpermilvarpd512_mask",
+                    "avx512.mask.vpermilvar.ps.128" => "__builtin_ia32_vpermilvarps_mask",
+                    "avx512.mask.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256_mask",
+                    "avx512.mask.vpermilvar.ps.512" => "__builtin_ia32_vpermilvarps512_mask",
+                    "avx512.mask.vpermt.d.512" => "__builtin_ia32_vpermt2vard512_mask",
+                    "avx512.mask.vpermt.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
+                    "avx512.mask.vpermt.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
+                    "avx512.mask.vpermt.q.512" => "__builtin_ia32_vpermt2varq512_mask",
+                    "avx512.mask.vpermt2var.d.128" => "__builtin_ia32_vpermt2vard128_mask",
+                    "avx512.mask.vpermt2var.d.256" => "__builtin_ia32_vpermt2vard256_mask",
+                    "avx512.mask.vpermt2var.d.512" => "__builtin_ia32_vpermt2vard512_mask",
+                    "avx512.mask.vpermt2var.hi.128" => "__builtin_ia32_vpermt2varhi128_mask",
+                    "avx512.mask.vpermt2var.hi.256" => "__builtin_ia32_vpermt2varhi256_mask",
+                    "avx512.mask.vpermt2var.hi.512" => "__builtin_ia32_vpermt2varhi512_mask",
+                    "avx512.mask.vpermt2var.pd.128" => "__builtin_ia32_vpermt2varpd128_mask",
+                    "avx512.mask.vpermt2var.pd.256" => "__builtin_ia32_vpermt2varpd256_mask",
+                    "avx512.mask.vpermt2var.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
+                    "avx512.mask.vpermt2var.ps.128" => "__builtin_ia32_vpermt2varps128_mask",
+                    "avx512.mask.vpermt2var.ps.256" => "__builtin_ia32_vpermt2varps256_mask",
+                    "avx512.mask.vpermt2var.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
+                    "avx512.mask.vpermt2var.q.128" => "__builtin_ia32_vpermt2varq128_mask",
+                    "avx512.mask.vpermt2var.q.256" => "__builtin_ia32_vpermt2varq256_mask",
+                    "avx512.mask.vpermt2var.q.512" => "__builtin_ia32_vpermt2varq512_mask",
+                    "avx512.mask.vpermt2var.qi.128" => "__builtin_ia32_vpermt2varqi128_mask",
+                    "avx512.mask.vpermt2var.qi.256" => "__builtin_ia32_vpermt2varqi256_mask",
+                    "avx512.mask.vpermt2var.qi.512" => "__builtin_ia32_vpermt2varqi512_mask",
+                    "avx512.mask.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_mask",
+                    "avx512.mask.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_mask",
+                    "avx512.mask.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_mask",
+                    "avx512.mask.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128_mask",
+                    "avx512.mask.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_mask",
+                    "avx512.mask.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_mask",
+                    "avx512.mask.xor.pd.128" => "__builtin_ia32_xorpd128_mask",
+                    "avx512.mask.xor.pd.256" => "__builtin_ia32_xorpd256_mask",
+                    "avx512.mask.xor.pd.512" => "__builtin_ia32_xorpd512_mask",
+                    "avx512.mask.xor.ps.128" => "__builtin_ia32_xorps128_mask",
+                    "avx512.mask.xor.ps.256" => "__builtin_ia32_xorps256_mask",
+                    "avx512.mask.xor.ps.512" => "__builtin_ia32_xorps512_mask",
+                    "avx512.mask3.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_mask3",
+                    "avx512.mask3.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_mask3",
+                    "avx512.mask3.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask3",
+                    "avx512.mask3.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_mask3",
+                    "avx512.mask3.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_mask3",
+                    "avx512.mask3.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask3",
+                    "avx512.mask3.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_mask3",
+                    "avx512.mask3.vfmadd.ss" => "__builtin_ia32_vfmaddss3_mask3",
+                    "avx512.mask3.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_mask3",
+                    "avx512.mask3.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_mask3",
+                    "avx512.mask3.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask3",
+                    "avx512.mask3.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_mask3",
+                    "avx512.mask3.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_mask3",
+                    "avx512.mask3.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask3",
+                    "avx512.mask3.vfmsub.pd.128" => "__builtin_ia32_vfmsubpd128_mask3",
+                    "avx512.mask3.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256_mask3",
+                    "avx512.mask3.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask3",
+                    "avx512.mask3.vfmsub.ps.128" => "__builtin_ia32_vfmsubps128_mask3",
+                    "avx512.mask3.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256_mask3",
+                    "avx512.mask3.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask3",
+                    "avx512.mask3.vfmsubadd.pd.128" => "__builtin_ia32_vfmsubaddpd128_mask3",
+                    "avx512.mask3.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256_mask3",
+                    "avx512.mask3.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask3",
+                    "avx512.mask3.vfmsubadd.ps.128" => "__builtin_ia32_vfmsubaddps128_mask3",
+                    "avx512.mask3.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256_mask3",
+                    "avx512.mask3.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask3",
+                    "avx512.mask3.vfnmsub.pd.128" => "__builtin_ia32_vfnmsubpd128_mask3",
+                    "avx512.mask3.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256_mask3",
+                    "avx512.mask3.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask3",
+                    "avx512.mask3.vfnmsub.ps.128" => "__builtin_ia32_vfnmsubps128_mask3",
+                    "avx512.mask3.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256_mask3",
+                    "avx512.mask3.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask3",
+                    "avx512.maskz.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_maskz",
+                    "avx512.maskz.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_maskz",
+                    "avx512.maskz.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_maskz",
+                    "avx512.maskz.fixupimm.ps.128" => "__builtin_ia32_fixupimmps128_maskz",
+                    "avx512.maskz.fixupimm.ps.256" => "__builtin_ia32_fixupimmps256_maskz",
+                    "avx512.maskz.fixupimm.ps.512" => "__builtin_ia32_fixupimmps512_maskz",
+                    "avx512.maskz.fixupimm.sd" => "__builtin_ia32_fixupimmsd_maskz",
+                    "avx512.maskz.fixupimm.ss" => "__builtin_ia32_fixupimmss_maskz",
+                    "avx512.maskz.pternlog.d.128" => "__builtin_ia32_pternlogd128_maskz",
+                    "avx512.maskz.pternlog.d.256" => "__builtin_ia32_pternlogd256_maskz",
+                    "avx512.maskz.pternlog.d.512" => "__builtin_ia32_pternlogd512_maskz",
+                    "avx512.maskz.pternlog.q.128" => "__builtin_ia32_pternlogq128_maskz",
+                    "avx512.maskz.pternlog.q.256" => "__builtin_ia32_pternlogq256_maskz",
+                    "avx512.maskz.pternlog.q.512" => "__builtin_ia32_pternlogq512_maskz",
+                    "avx512.maskz.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_maskz",
+                    "avx512.maskz.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_maskz",
+                    "avx512.maskz.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_maskz",
+                    "avx512.maskz.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_maskz",
+                    "avx512.maskz.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_maskz",
+                    "avx512.maskz.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_maskz",
+                    "avx512.maskz.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_maskz",
+                    "avx512.maskz.vfmadd.ss" => "__builtin_ia32_vfmaddss3_maskz",
+                    "avx512.maskz.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_maskz",
+                    "avx512.maskz.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_maskz",
+                    "avx512.maskz.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_maskz",
+                    "avx512.maskz.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_maskz",
+                    "avx512.maskz.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_maskz",
+                    "avx512.maskz.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_maskz",
+                    "avx512.maskz.vpermt2var.d.128" => "__builtin_ia32_vpermt2vard128_maskz",
+                    "avx512.maskz.vpermt2var.d.256" => "__builtin_ia32_vpermt2vard256_maskz",
+                    "avx512.maskz.vpermt2var.d.512" => "__builtin_ia32_vpermt2vard512_maskz",
+                    "avx512.maskz.vpermt2var.hi.128" => "__builtin_ia32_vpermt2varhi128_maskz",
+                    "avx512.maskz.vpermt2var.hi.256" => "__builtin_ia32_vpermt2varhi256_maskz",
+                    "avx512.maskz.vpermt2var.hi.512" => "__builtin_ia32_vpermt2varhi512_maskz",
+                    "avx512.maskz.vpermt2var.pd.128" => "__builtin_ia32_vpermt2varpd128_maskz",
+                    "avx512.maskz.vpermt2var.pd.256" => "__builtin_ia32_vpermt2varpd256_maskz",
+                    "avx512.maskz.vpermt2var.pd.512" => "__builtin_ia32_vpermt2varpd512_maskz",
+                    "avx512.maskz.vpermt2var.ps.128" => "__builtin_ia32_vpermt2varps128_maskz",
+                    "avx512.maskz.vpermt2var.ps.256" => "__builtin_ia32_vpermt2varps256_maskz",
+                    "avx512.maskz.vpermt2var.ps.512" => "__builtin_ia32_vpermt2varps512_maskz",
+                    "avx512.maskz.vpermt2var.q.128" => "__builtin_ia32_vpermt2varq128_maskz",
+                    "avx512.maskz.vpermt2var.q.256" => "__builtin_ia32_vpermt2varq256_maskz",
+                    "avx512.maskz.vpermt2var.q.512" => "__builtin_ia32_vpermt2varq512_maskz",
+                    "avx512.maskz.vpermt2var.qi.128" => "__builtin_ia32_vpermt2varqi128_maskz",
+                    "avx512.maskz.vpermt2var.qi.256" => "__builtin_ia32_vpermt2varqi256_maskz",
+                    "avx512.maskz.vpermt2var.qi.512" => "__builtin_ia32_vpermt2varqi512_maskz",
+                    "avx512.maskz.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_maskz",
+                    "avx512.maskz.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_maskz",
+                    "avx512.maskz.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_maskz",
+                    "avx512.maskz.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128_maskz",
+                    "avx512.maskz.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_maskz",
+                    "avx512.maskz.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_maskz",
+                    "avx512.max.pd.512" => "__builtin_ia32_maxpd512",
+                    "avx512.max.ps.512" => "__builtin_ia32_maxps512",
+                    "avx512.min.pd.512" => "__builtin_ia32_minpd512",
+                    "avx512.min.ps.512" => "__builtin_ia32_minps512",
+                    "avx512.movntdqa" => "__builtin_ia32_movntdqa512",
+                    "avx512.mul.pd.512" => "__builtin_ia32_mulpd512",
+                    "avx512.mul.ps.512" => "__builtin_ia32_mulps512",
+                    "avx512.packssdw.512" => "__builtin_ia32_packssdw512",
+                    "avx512.packsswb.512" => "__builtin_ia32_packsswb512",
+                    "avx512.packusdw.512" => "__builtin_ia32_packusdw512",
+                    "avx512.packuswb.512" => "__builtin_ia32_packuswb512",
+                    "avx512.pavg.b.512" => "__builtin_ia32_pavgb512",
+                    "avx512.pavg.w.512" => "__builtin_ia32_pavgw512",
+                    "avx512.pbroadcastd.512" => "__builtin_ia32_pbroadcastd512",
+                    "avx512.pbroadcastq.512" => "__builtin_ia32_pbroadcastq512",
+                    "avx512.permvar.df.256" => "__builtin_ia32_permvardf256",
+                    "avx512.permvar.df.512" => "__builtin_ia32_permvardf512",
+                    "avx512.permvar.di.256" => "__builtin_ia32_permvardi256",
+                    "avx512.permvar.di.512" => "__builtin_ia32_permvardi512",
+                    "avx512.permvar.hi.128" => "__builtin_ia32_permvarhi128",
+                    "avx512.permvar.hi.256" => "__builtin_ia32_permvarhi256",
+                    "avx512.permvar.hi.512" => "__builtin_ia32_permvarhi512",
+                    "avx512.permvar.qi.128" => "__builtin_ia32_permvarqi128",
+                    "avx512.permvar.qi.256" => "__builtin_ia32_permvarqi256",
+                    "avx512.permvar.qi.512" => "__builtin_ia32_permvarqi512",
+                    "avx512.permvar.sf.512" => "__builtin_ia32_permvarsf512",
+                    "avx512.permvar.si.512" => "__builtin_ia32_permvarsi512",
+                    "avx512.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512",
+                    "avx512.pmaddw.d.512" => "__builtin_ia32_pmaddwd512",
+                    "avx512.pmovzxbd" => "__builtin_ia32_pmovzxbd512",
+                    "avx512.pmovzxbq" => "__builtin_ia32_pmovzxbq512",
+                    "avx512.pmovzxdq" => "__builtin_ia32_pmovzxdq512",
+                    "avx512.pmovzxwd" => "__builtin_ia32_pmovzxwd512",
+                    "avx512.pmovzxwq" => "__builtin_ia32_pmovzxwq512",
+                    "avx512.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512",
+                    "avx512.pmulh.w.512" => "__builtin_ia32_pmulhw512",
+                    "avx512.pmulhu.w.512" => "__builtin_ia32_pmulhuw512",
+                    "avx512.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128",
+                    "avx512.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256",
+                    "avx512.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512",
+                    "avx512.psad.bw.512" => "__builtin_ia32_psadbw512",
+                    "avx512.pshuf.b.512" => "__builtin_ia32_pshufb512",
+                    "avx512.psll.d.512" => "__builtin_ia32_pslld512",
+                    "avx512.psll.dq" => "__builtin_ia32_pslldqi512",
+                    "avx512.psll.dq.bs" => "__builtin_ia32_pslldqi512_byteshift",
+                    "avx512.psll.q.512" => "__builtin_ia32_psllq512",
+                    "avx512.psll.w.512" => "__builtin_ia32_psllw512",
+                    "avx512.pslli.d.512" => "__builtin_ia32_pslldi512",
+                    "avx512.pslli.q.512" => "__builtin_ia32_psllqi512",
+                    "avx512.pslli.w.512" => "__builtin_ia32_psllwi512",
+                    "avx512.psllv.d.512" => "__builtin_ia32_psllv16si",
+                    "avx512.psllv.q.512" => "__builtin_ia32_psllv8di",
+                    "avx512.psllv.w.128" => "__builtin_ia32_psllv8hi",
+                    "avx512.psllv.w.256" => "__builtin_ia32_psllv16hi",
+                    "avx512.psllv.w.512" => "__builtin_ia32_psllv32hi",
+                    "avx512.psra.d.512" => "__builtin_ia32_psrad512",
+                    "avx512.psra.q.128" => "__builtin_ia32_psraq128",
+                    "avx512.psra.q.256" => "__builtin_ia32_psraq256",
+                    "avx512.psra.q.512" => "__builtin_ia32_psraq512",
+                    "avx512.psra.w.512" => "__builtin_ia32_psraw512",
+                    "avx512.psrai.d.512" => "__builtin_ia32_psradi512",
+                    "avx512.psrai.q.128" => "__builtin_ia32_psraqi128",
+                    "avx512.psrai.q.256" => "__builtin_ia32_psraqi256",
+                    "avx512.psrai.q.512" => "__builtin_ia32_psraqi512",
+                    "avx512.psrai.w.512" => "__builtin_ia32_psrawi512",
+                    "avx512.psrav.d.512" => "__builtin_ia32_psrav16si",
+                    "avx512.psrav.q.128" => "__builtin_ia32_psravq128",
+                    "avx512.psrav.q.256" => "__builtin_ia32_psravq256",
+                    "avx512.psrav.q.512" => "__builtin_ia32_psrav8di",
+                    "avx512.psrav.w.128" => "__builtin_ia32_psrav8hi",
+                    "avx512.psrav.w.256" => "__builtin_ia32_psrav16hi",
+                    "avx512.psrav.w.512" => "__builtin_ia32_psrav32hi",
+                    "avx512.psrl.d.512" => "__builtin_ia32_psrld512",
+                    "avx512.psrl.dq" => "__builtin_ia32_psrldqi512",
+                    "avx512.psrl.dq.bs" => "__builtin_ia32_psrldqi512_byteshift",
+                    "avx512.psrl.q.512" => "__builtin_ia32_psrlq512",
+                    "avx512.psrl.w.512" => "__builtin_ia32_psrlw512",
+                    "avx512.psrli.d.512" => "__builtin_ia32_psrldi512",
+                    "avx512.psrli.q.512" => "__builtin_ia32_psrlqi512",
+                    "avx512.psrli.w.512" => "__builtin_ia32_psrlwi512",
+                    "avx512.psrlv.d.512" => "__builtin_ia32_psrlv16si",
+                    "avx512.psrlv.q.512" => "__builtin_ia32_psrlv8di",
+                    "avx512.psrlv.w.128" => "__builtin_ia32_psrlv8hi",
+                    "avx512.psrlv.w.256" => "__builtin_ia32_psrlv16hi",
+                    "avx512.psrlv.w.512" => "__builtin_ia32_psrlv32hi",
+                    "avx512.pternlog.d.128" => "__builtin_ia32_pternlogd128",
+                    "avx512.pternlog.d.256" => "__builtin_ia32_pternlogd256",
+                    "avx512.pternlog.d.512" => "__builtin_ia32_pternlogd512",
+                    "avx512.pternlog.q.128" => "__builtin_ia32_pternlogq128",
+                    "avx512.pternlog.q.256" => "__builtin_ia32_pternlogq256",
+                    "avx512.pternlog.q.512" => "__builtin_ia32_pternlogq512",
+                    "avx512.ptestm.b.128" => "__builtin_ia32_ptestmb128",
+                    "avx512.ptestm.b.256" => "__builtin_ia32_ptestmb256",
+                    "avx512.ptestm.b.512" => "__builtin_ia32_ptestmb512",
+                    "avx512.ptestm.d.128" => "__builtin_ia32_ptestmd128",
+                    "avx512.ptestm.d.256" => "__builtin_ia32_ptestmd256",
+                    "avx512.ptestm.d.512" => "__builtin_ia32_ptestmd512",
+                    "avx512.ptestm.q.128" => "__builtin_ia32_ptestmq128",
+                    "avx512.ptestm.q.256" => "__builtin_ia32_ptestmq256",
+                    "avx512.ptestm.q.512" => "__builtin_ia32_ptestmq512",
+                    "avx512.ptestm.w.128" => "__builtin_ia32_ptestmw128",
+                    "avx512.ptestm.w.256" => "__builtin_ia32_ptestmw256",
+                    "avx512.ptestm.w.512" => "__builtin_ia32_ptestmw512",
+                    "avx512.ptestnm.b.128" => "__builtin_ia32_ptestnmb128",
+                    "avx512.ptestnm.b.256" => "__builtin_ia32_ptestnmb256",
+                    "avx512.ptestnm.b.512" => "__builtin_ia32_ptestnmb512",
+                    "avx512.ptestnm.d.128" => "__builtin_ia32_ptestnmd128",
+                    "avx512.ptestnm.d.256" => "__builtin_ia32_ptestnmd256",
+                    "avx512.ptestnm.d.512" => "__builtin_ia32_ptestnmd512",
+                    "avx512.ptestnm.q.128" => "__builtin_ia32_ptestnmq128",
+                    "avx512.ptestnm.q.256" => "__builtin_ia32_ptestnmq256",
+                    "avx512.ptestnm.q.512" => "__builtin_ia32_ptestnmq512",
+                    "avx512.ptestnm.w.128" => "__builtin_ia32_ptestnmw128",
+                    "avx512.ptestnm.w.256" => "__builtin_ia32_ptestnmw256",
+                    "avx512.ptestnm.w.512" => "__builtin_ia32_ptestnmw512",
+                    "avx512.rcp14.pd.128" => "__builtin_ia32_rcp14pd128_mask",
+                    "avx512.rcp14.pd.256" => "__builtin_ia32_rcp14pd256_mask",
+                    "avx512.rcp14.pd.512" => "__builtin_ia32_rcp14pd512_mask",
+                    "avx512.rcp14.ps.128" => "__builtin_ia32_rcp14ps128_mask",
+                    "avx512.rcp14.ps.256" => "__builtin_ia32_rcp14ps256_mask",
+                    "avx512.rcp14.ps.512" => "__builtin_ia32_rcp14ps512_mask",
+                    "avx512.rcp14.sd" => "__builtin_ia32_rcp14sd_mask",
+                    "avx512.rcp14.ss" => "__builtin_ia32_rcp14ss_mask",
+                    "avx512.rcp28.pd" => "__builtin_ia32_rcp28pd_mask",
+                    "avx512.rcp28.ps" => "__builtin_ia32_rcp28ps_mask",
+                    "avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
+                    // [DUPLICATE]: "avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
+                    "avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
+                    // [DUPLICATE]: "avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
+                    "avx512.rndscale.sd" => "__builtin_ia32_rndscalesd",
+                    "avx512.rndscale.ss" => "__builtin_ia32_rndscaless",
+                    "avx512.rsqrt14.pd.128" => "__builtin_ia32_rsqrt14pd128_mask",
+                    "avx512.rsqrt14.pd.256" => "__builtin_ia32_rsqrt14pd256_mask",
+                    "avx512.rsqrt14.pd.512" => "__builtin_ia32_rsqrt14pd512_mask",
+                    "avx512.rsqrt14.ps.128" => "__builtin_ia32_rsqrt14ps128_mask",
+                    "avx512.rsqrt14.ps.256" => "__builtin_ia32_rsqrt14ps256_mask",
+                    "avx512.rsqrt14.ps.512" => "__builtin_ia32_rsqrt14ps512_mask",
+                    "avx512.rsqrt14.sd" => "__builtin_ia32_rsqrt14sd_mask",
+                    "avx512.rsqrt14.ss" => "__builtin_ia32_rsqrt14ss_mask",
+                    "avx512.rsqrt28.pd" => "__builtin_ia32_rsqrt28pd_mask",
+                    "avx512.rsqrt28.ps" => "__builtin_ia32_rsqrt28ps_mask",
+                    "avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
+                    // [DUPLICATE]: "avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
+                    "avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
+                    // [DUPLICATE]: "avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
+                    "avx512.scatter.dpd.512" => "__builtin_ia32_scattersiv8df",
+                    "avx512.scatter.dpi.512" => "__builtin_ia32_scattersiv16si",
+                    "avx512.scatter.dpq.512" => "__builtin_ia32_scattersiv8di",
+                    "avx512.scatter.dps.512" => "__builtin_ia32_scattersiv16sf",
+                    "avx512.scatter.qpd.512" => "__builtin_ia32_scatterdiv8df",
+                    "avx512.scatter.qpi.512" => "__builtin_ia32_scatterdiv16si",
+                    "avx512.scatter.qpq.512" => "__builtin_ia32_scatterdiv8di",
+                    "avx512.scatter.qps.512" => "__builtin_ia32_scatterdiv16sf",
+                    "avx512.scatterdiv2.df" => "__builtin_ia32_scatterdiv2df",
+                    "avx512.scatterdiv2.di" => "__builtin_ia32_scatterdiv2di",
+                    "avx512.scatterdiv4.df" => "__builtin_ia32_scatterdiv4df",
+                    "avx512.scatterdiv4.di" => "__builtin_ia32_scatterdiv4di",
+                    "avx512.scatterdiv4.sf" => "__builtin_ia32_scatterdiv4sf",
+                    "avx512.scatterdiv4.si" => "__builtin_ia32_scatterdiv4si",
+                    "avx512.scatterdiv8.sf" => "__builtin_ia32_scatterdiv8sf",
+                    "avx512.scatterdiv8.si" => "__builtin_ia32_scatterdiv8si",
+                    "avx512.scatterpf.dpd.512" => "__builtin_ia32_scatterpfdpd",
+                    "avx512.scatterpf.dps.512" => "__builtin_ia32_scatterpfdps",
+                    "avx512.scatterpf.qpd.512" => "__builtin_ia32_scatterpfqpd",
+                    "avx512.scatterpf.qps.512" => "__builtin_ia32_scatterpfqps",
+                    "avx512.scattersiv2.df" => "__builtin_ia32_scattersiv2df",
+                    "avx512.scattersiv2.di" => "__builtin_ia32_scattersiv2di",
+                    "avx512.scattersiv4.df" => "__builtin_ia32_scattersiv4df",
+                    "avx512.scattersiv4.di" => "__builtin_ia32_scattersiv4di",
+                    "avx512.scattersiv4.sf" => "__builtin_ia32_scattersiv4sf",
+                    "avx512.scattersiv4.si" => "__builtin_ia32_scattersiv4si",
+                    "avx512.scattersiv8.sf" => "__builtin_ia32_scattersiv8sf",
+                    "avx512.scattersiv8.si" => "__builtin_ia32_scattersiv8si",
+                    "avx512.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
+                    "avx512.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
+                    "avx512.sqrt.sd" => "__builtin_ia32_sqrtrndsd",
+                    "avx512.sqrt.ss" => "__builtin_ia32_sqrtrndss",
+                    "avx512.sub.pd.512" => "__builtin_ia32_subpd512",
+                    "avx512.sub.ps.512" => "__builtin_ia32_subps512",
+                    "avx512.vbroadcast.sd.512" => "__builtin_ia32_vbroadcastsd512",
+                    "avx512.vbroadcast.sd.pd.512" => "__builtin_ia32_vbroadcastsd_pd512",
+                    "avx512.vbroadcast.ss.512" => "__builtin_ia32_vbroadcastss512",
+                    "avx512.vbroadcast.ss.ps.512" => "__builtin_ia32_vbroadcastss_ps512",
+                    "avx512.vcomi.sd" => "__builtin_ia32_vcomisd",
+                    "avx512.vcomi.ss" => "__builtin_ia32_vcomiss",
+                    "avx512.vcvtsd2si32" => "__builtin_ia32_vcvtsd2si32",
+                    "avx512.vcvtsd2si64" => "__builtin_ia32_vcvtsd2si64",
+                    "avx512.vcvtsd2usi32" => "__builtin_ia32_vcvtsd2usi32",
+                    "avx512.vcvtsd2usi64" => "__builtin_ia32_vcvtsd2usi64",
+                    "avx512.vcvtss2si32" => "__builtin_ia32_vcvtss2si32",
+                    "avx512.vcvtss2si64" => "__builtin_ia32_vcvtss2si64",
+                    "avx512.vcvtss2usi32" => "__builtin_ia32_vcvtss2usi32",
+                    "avx512.vcvtss2usi64" => "__builtin_ia32_vcvtss2usi64",
+                    "avx512.vpdpbusd.128" => "__builtin_ia32_vpdpbusd128",
+                    "avx512.vpdpbusd.256" => "__builtin_ia32_vpdpbusd256",
+                    "avx512.vpdpbusd.512" => "__builtin_ia32_vpdpbusd512",
+                    "avx512.vpdpbusds.128" => "__builtin_ia32_vpdpbusds128",
+                    "avx512.vpdpbusds.256" => "__builtin_ia32_vpdpbusds256",
+                    "avx512.vpdpbusds.512" => "__builtin_ia32_vpdpbusds512",
+                    "avx512.vpdpwssd.128" => "__builtin_ia32_vpdpwssd128",
+                    "avx512.vpdpwssd.256" => "__builtin_ia32_vpdpwssd256",
+                    "avx512.vpdpwssd.512" => "__builtin_ia32_vpdpwssd512",
+                    "avx512.vpdpwssds.128" => "__builtin_ia32_vpdpwssds128",
+                    "avx512.vpdpwssds.256" => "__builtin_ia32_vpdpwssds256",
+                    "avx512.vpdpwssds.512" => "__builtin_ia32_vpdpwssds512",
+                    "avx512.vpermi2var.d.128" => "__builtin_ia32_vpermi2vard128",
+                    "avx512.vpermi2var.d.256" => "__builtin_ia32_vpermi2vard256",
+                    "avx512.vpermi2var.d.512" => "__builtin_ia32_vpermi2vard512",
+                    "avx512.vpermi2var.hi.128" => "__builtin_ia32_vpermi2varhi128",
+                    "avx512.vpermi2var.hi.256" => "__builtin_ia32_vpermi2varhi256",
+                    "avx512.vpermi2var.hi.512" => "__builtin_ia32_vpermi2varhi512",
+                    "avx512.vpermi2var.pd.128" => "__builtin_ia32_vpermi2varpd128",
+                    "avx512.vpermi2var.pd.256" => "__builtin_ia32_vpermi2varpd256",
+                    "avx512.vpermi2var.pd.512" => "__builtin_ia32_vpermi2varpd512",
+                    "avx512.vpermi2var.ps.128" => "__builtin_ia32_vpermi2varps128",
+                    "avx512.vpermi2var.ps.256" => "__builtin_ia32_vpermi2varps256",
+                    "avx512.vpermi2var.ps.512" => "__builtin_ia32_vpermi2varps512",
+                    "avx512.vpermi2var.q.128" => "__builtin_ia32_vpermi2varq128",
+                    "avx512.vpermi2var.q.256" => "__builtin_ia32_vpermi2varq256",
+                    "avx512.vpermi2var.q.512" => "__builtin_ia32_vpermi2varq512",
+                    "avx512.vpermi2var.qi.128" => "__builtin_ia32_vpermi2varqi128",
+                    "avx512.vpermi2var.qi.256" => "__builtin_ia32_vpermi2varqi256",
+                    "avx512.vpermi2var.qi.512" => "__builtin_ia32_vpermi2varqi512",
+                    "avx512.vpermilvar.pd.512" => "__builtin_ia32_vpermilvarpd512",
+                    "avx512.vpermilvar.ps.512" => "__builtin_ia32_vpermilvarps512",
+                    "avx512.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128",
+                    "avx512.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256",
+                    "avx512.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512",
+                    "avx512.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128",
+                    "avx512.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256",
+                    "avx512.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512",
+                    "avx512bf16.cvtne2ps2bf16.128" => "__builtin_ia32_cvtne2ps2bf16_128",
+                    "avx512bf16.cvtne2ps2bf16.256" => "__builtin_ia32_cvtne2ps2bf16_256",
+                    "avx512bf16.cvtne2ps2bf16.512" => "__builtin_ia32_cvtne2ps2bf16_512",
+                    "avx512bf16.cvtneps2bf16.256" => "__builtin_ia32_cvtneps2bf16_256",
+                    "avx512bf16.cvtneps2bf16.512" => "__builtin_ia32_cvtneps2bf16_512",
+                    "avx512bf16.dpbf16ps.128" => "__builtin_ia32_dpbf16ps_128",
+                    "avx512bf16.dpbf16ps.256" => "__builtin_ia32_dpbf16ps_256",
+                    "avx512bf16.dpbf16ps.512" => "__builtin_ia32_dpbf16ps_512",
+                    "avx512fp16.add.ph.512" => "__builtin_ia32_addph512",
+                    "avx512fp16.div.ph.512" => "__builtin_ia32_divph512",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.add.sh.round" => "__builtin_ia32_addsh_round_mask",
+                    "avx512fp16.mask.cmp.sh" => "__builtin_ia32_cmpsh_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.div.sh.round" => "__builtin_ia32_divsh_round_mask",
+                    "avx512fp16.mask.fpclass.sh" => "__builtin_ia32_fpclasssh_mask",
+                    "avx512fp16.mask.getexp.ph.128" => "__builtin_ia32_getexpph128_mask",
+                    "avx512fp16.mask.getexp.ph.256" => "__builtin_ia32_getexpph256_mask",
+                    "avx512fp16.mask.getexp.ph.512" => "__builtin_ia32_getexpph512_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.getexp.sh" => "__builtin_ia32_getexpsh128_round_mask",
+                    "avx512fp16.mask.getmant.ph.128" => "__builtin_ia32_getmantph128_mask",
+                    "avx512fp16.mask.getmant.ph.256" => "__builtin_ia32_getmantph256_mask",
+                    "avx512fp16.mask.getmant.ph.512" => "__builtin_ia32_getmantph512_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.getmant.sh" => "__builtin_ia32_getmantsh_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.max.sh.round" => "__builtin_ia32_maxsh_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.min.sh.round" => "__builtin_ia32_minsh_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.mul.sh.round" => "__builtin_ia32_mulsh_round_mask",
+                    "avx512fp16.mask.rcp.ph.128" => "__builtin_ia32_rcpph128_mask",
+                    "avx512fp16.mask.rcp.ph.256" => "__builtin_ia32_rcpph256_mask",
+                    "avx512fp16.mask.rcp.ph.512" => "__builtin_ia32_rcpph512_mask",
+                    "avx512fp16.mask.rcp.sh" => "__builtin_ia32_rcpsh_mask",
+                    "avx512fp16.mask.reduce.ph.128" => "__builtin_ia32_reduceph128_mask",
+                    "avx512fp16.mask.reduce.ph.256" => "__builtin_ia32_reduceph256_mask",
+                    "avx512fp16.mask.reduce.ph.512" => "__builtin_ia32_reduceph512_mask",
+                    "avx512fp16.mask.reduce.sh" => "__builtin_ia32_reducesh_mask",
+                    "avx512fp16.mask.rndscale.ph.128" => "__builtin_ia32_rndscaleph_128_mask",
+                    "avx512fp16.mask.rndscale.ph.256" => "__builtin_ia32_rndscaleph_256_mask",
+                    "avx512fp16.mask.rndscale.ph.512" => "__builtin_ia32_rndscaleph_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.rndscale.sh" => "__builtin_ia32_rndscalesh_round_mask",
+                    "avx512fp16.mask.rsqrt.ph.128" => "__builtin_ia32_rsqrtph128_mask",
+                    "avx512fp16.mask.rsqrt.ph.256" => "__builtin_ia32_rsqrtph256_mask",
+                    "avx512fp16.mask.rsqrt.ph.512" => "__builtin_ia32_rsqrtph512_mask",
+                    "avx512fp16.mask.rsqrt.sh" => "__builtin_ia32_rsqrtsh_mask",
+                    "avx512fp16.mask.scalef.ph.128" => "__builtin_ia32_scalefph128_mask",
+                    "avx512fp16.mask.scalef.ph.256" => "__builtin_ia32_scalefph256_mask",
+                    "avx512fp16.mask.scalef.ph.512" => "__builtin_ia32_scalefph512_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.scalef.sh" => "__builtin_ia32_scalefsh_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.sub.sh.round" => "__builtin_ia32_subsh_round_mask",
+                    "avx512fp16.mask.vcvtdq2ph.128" => "__builtin_ia32_vcvtdq2ph128_mask",
+                    "avx512fp16.mask.vcvtpd2ph.128" => "__builtin_ia32_vcvtpd2ph128_mask",
+                    "avx512fp16.mask.vcvtpd2ph.256" => "__builtin_ia32_vcvtpd2ph256_mask",
+                    "avx512fp16.mask.vcvtpd2ph.512" => "__builtin_ia32_vcvtpd2ph512_mask",
+                    "avx512fp16.mask.vcvtph2dq.128" => "__builtin_ia32_vcvtph2dq128_mask",
+                    "avx512fp16.mask.vcvtph2dq.256" => "__builtin_ia32_vcvtph2dq256_mask",
+                    "avx512fp16.mask.vcvtph2dq.512" => "__builtin_ia32_vcvtph2dq512_mask",
+                    "avx512fp16.mask.vcvtph2pd.128" => "__builtin_ia32_vcvtph2pd128_mask",
+                    "avx512fp16.mask.vcvtph2pd.256" => "__builtin_ia32_vcvtph2pd256_mask",
+                    "avx512fp16.mask.vcvtph2pd.512" => "__builtin_ia32_vcvtph2pd512_mask",
+                    "avx512fp16.mask.vcvtph2psx.128" => "__builtin_ia32_vcvtph2psx128_mask",
+                    "avx512fp16.mask.vcvtph2psx.256" => "__builtin_ia32_vcvtph2psx256_mask",
+                    "avx512fp16.mask.vcvtph2psx.512" => "__builtin_ia32_vcvtph2psx512_mask",
+                    "avx512fp16.mask.vcvtph2qq.128" => "__builtin_ia32_vcvtph2qq128_mask",
+                    "avx512fp16.mask.vcvtph2qq.256" => "__builtin_ia32_vcvtph2qq256_mask",
+                    "avx512fp16.mask.vcvtph2qq.512" => "__builtin_ia32_vcvtph2qq512_mask",
+                    "avx512fp16.mask.vcvtph2udq.128" => "__builtin_ia32_vcvtph2udq128_mask",
+                    "avx512fp16.mask.vcvtph2udq.256" => "__builtin_ia32_vcvtph2udq256_mask",
+                    "avx512fp16.mask.vcvtph2udq.512" => "__builtin_ia32_vcvtph2udq512_mask",
+                    "avx512fp16.mask.vcvtph2uqq.128" => "__builtin_ia32_vcvtph2uqq128_mask",
+                    "avx512fp16.mask.vcvtph2uqq.256" => "__builtin_ia32_vcvtph2uqq256_mask",
+                    "avx512fp16.mask.vcvtph2uqq.512" => "__builtin_ia32_vcvtph2uqq512_mask",
+                    "avx512fp16.mask.vcvtph2uw.128" => "__builtin_ia32_vcvtph2uw128_mask",
+                    "avx512fp16.mask.vcvtph2uw.256" => "__builtin_ia32_vcvtph2uw256_mask",
+                    "avx512fp16.mask.vcvtph2uw.512" => "__builtin_ia32_vcvtph2uw512_mask",
+                    "avx512fp16.mask.vcvtph2w.128" => "__builtin_ia32_vcvtph2w128_mask",
+                    "avx512fp16.mask.vcvtph2w.256" => "__builtin_ia32_vcvtph2w256_mask",
+                    "avx512fp16.mask.vcvtph2w.512" => "__builtin_ia32_vcvtph2w512_mask",
+                    "avx512fp16.mask.vcvtps2phx.128" => "__builtin_ia32_vcvtps2phx128_mask",
+                    "avx512fp16.mask.vcvtps2phx.256" => "__builtin_ia32_vcvtps2phx256_mask",
+                    "avx512fp16.mask.vcvtps2phx.512" => "__builtin_ia32_vcvtps2phx512_mask",
+                    "avx512fp16.mask.vcvtqq2ph.128" => "__builtin_ia32_vcvtqq2ph128_mask",
+                    "avx512fp16.mask.vcvtqq2ph.256" => "__builtin_ia32_vcvtqq2ph256_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.vcvtsd2sh.round" => "__builtin_ia32_vcvtsd2sh_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.vcvtsh2sd.round" => "__builtin_ia32_vcvtsh2sd_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.vcvtsh2ss.round" => "__builtin_ia32_vcvtsh2ss_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.vcvtss2sh.round" => "__builtin_ia32_vcvtss2sh_round_mask",
+                    "avx512fp16.mask.vcvttph2dq.128" => "__builtin_ia32_vcvttph2dq128_mask",
+                    "avx512fp16.mask.vcvttph2dq.256" => "__builtin_ia32_vcvttph2dq256_mask",
+                    "avx512fp16.mask.vcvttph2dq.512" => "__builtin_ia32_vcvttph2dq512_mask",
+                    "avx512fp16.mask.vcvttph2qq.128" => "__builtin_ia32_vcvttph2qq128_mask",
+                    "avx512fp16.mask.vcvttph2qq.256" => "__builtin_ia32_vcvttph2qq256_mask",
+                    "avx512fp16.mask.vcvttph2qq.512" => "__builtin_ia32_vcvttph2qq512_mask",
+                    "avx512fp16.mask.vcvttph2udq.128" => "__builtin_ia32_vcvttph2udq128_mask",
+                    "avx512fp16.mask.vcvttph2udq.256" => "__builtin_ia32_vcvttph2udq256_mask",
+                    "avx512fp16.mask.vcvttph2udq.512" => "__builtin_ia32_vcvttph2udq512_mask",
+                    "avx512fp16.mask.vcvttph2uqq.128" => "__builtin_ia32_vcvttph2uqq128_mask",
+                    "avx512fp16.mask.vcvttph2uqq.256" => "__builtin_ia32_vcvttph2uqq256_mask",
+                    "avx512fp16.mask.vcvttph2uqq.512" => "__builtin_ia32_vcvttph2uqq512_mask",
+                    "avx512fp16.mask.vcvttph2uw.128" => "__builtin_ia32_vcvttph2uw128_mask",
+                    "avx512fp16.mask.vcvttph2uw.256" => "__builtin_ia32_vcvttph2uw256_mask",
+                    "avx512fp16.mask.vcvttph2uw.512" => "__builtin_ia32_vcvttph2uw512_mask",
+                    "avx512fp16.mask.vcvttph2w.128" => "__builtin_ia32_vcvttph2w128_mask",
+                    "avx512fp16.mask.vcvttph2w.256" => "__builtin_ia32_vcvttph2w256_mask",
+                    "avx512fp16.mask.vcvttph2w.512" => "__builtin_ia32_vcvttph2w512_mask",
+                    "avx512fp16.mask.vcvtudq2ph.128" => "__builtin_ia32_vcvtudq2ph128_mask",
+                    "avx512fp16.mask.vcvtuqq2ph.128" => "__builtin_ia32_vcvtuqq2ph128_mask",
+                    "avx512fp16.mask.vcvtuqq2ph.256" => "__builtin_ia32_vcvtuqq2ph256_mask",
+                    "avx512fp16.mask.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_mask",
+                    "avx512fp16.mask.vfcmadd.cph.256" => "__builtin_ia32_vfcmaddcph256_mask",
+                    "avx512fp16.mask.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_mask3",
+                    "avx512fp16.mask.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_mask",
+                    "avx512fp16.mask.vfcmul.cph.128" => "__builtin_ia32_vfcmulcph128_mask",
+                    "avx512fp16.mask.vfcmul.cph.256" => "__builtin_ia32_vfcmulcph256_mask",
+                    "avx512fp16.mask.vfcmul.cph.512" => "__builtin_ia32_vfcmulcph512_mask",
+                    "avx512fp16.mask.vfcmul.csh" => "__builtin_ia32_vfcmulcsh_mask",
+                    "avx512fp16.mask.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_mask",
+                    "avx512fp16.mask.vfmadd.cph.256" => "__builtin_ia32_vfmaddcph256_mask",
+                    "avx512fp16.mask.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_mask3",
+                    "avx512fp16.mask.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_mask",
+                    "avx512fp16.mask.vfmul.cph.128" => "__builtin_ia32_vfmulcph128_mask",
+                    "avx512fp16.mask.vfmul.cph.256" => "__builtin_ia32_vfmulcph256_mask",
+                    "avx512fp16.mask.vfmul.cph.512" => "__builtin_ia32_vfmulcph512_mask",
+                    "avx512fp16.mask.vfmul.csh" => "__builtin_ia32_vfmulcsh_mask",
+                    "avx512fp16.maskz.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_maskz",
+                    "avx512fp16.maskz.vfcmadd.cph.256" => "__builtin_ia32_vfcmaddcph256_maskz",
+                    "avx512fp16.maskz.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_maskz",
+                    "avx512fp16.maskz.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_maskz",
+                    "avx512fp16.maskz.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_maskz",
+                    "avx512fp16.maskz.vfmadd.cph.256" => "__builtin_ia32_vfmaddcph256_maskz",
+                    "avx512fp16.maskz.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_maskz",
+                    "avx512fp16.maskz.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_maskz",
+                    "avx512fp16.max.ph.128" => "__builtin_ia32_maxph128",
+                    "avx512fp16.max.ph.256" => "__builtin_ia32_maxph256",
+                    "avx512fp16.max.ph.512" => "__builtin_ia32_maxph512",
+                    "avx512fp16.min.ph.128" => "__builtin_ia32_minph128",
+                    "avx512fp16.min.ph.256" => "__builtin_ia32_minph256",
+                    "avx512fp16.min.ph.512" => "__builtin_ia32_minph512",
+                    "avx512fp16.mul.ph.512" => "__builtin_ia32_mulph512",
+                    "avx512fp16.sub.ph.512" => "__builtin_ia32_subph512",
+                    "avx512fp16.vcomi.sh" => "__builtin_ia32_vcomish",
+                    "avx512fp16.vcvtsh2si32" => "__builtin_ia32_vcvtsh2si32",
+                    "avx512fp16.vcvtsh2si64" => "__builtin_ia32_vcvtsh2si64",
+                    "avx512fp16.vcvtsh2usi32" => "__builtin_ia32_vcvtsh2usi32",
+                    "avx512fp16.vcvtsh2usi64" => "__builtin_ia32_vcvtsh2usi64",
+                    "avx512fp16.vcvtsi2sh" => "__builtin_ia32_vcvtsi2sh",
+                    "avx512fp16.vcvtsi642sh" => "__builtin_ia32_vcvtsi642sh",
+                    "avx512fp16.vcvttsh2si32" => "__builtin_ia32_vcvttsh2si32",
+                    "avx512fp16.vcvttsh2si64" => "__builtin_ia32_vcvttsh2si64",
+                    "avx512fp16.vcvttsh2usi32" => "__builtin_ia32_vcvttsh2usi32",
+                    "avx512fp16.vcvttsh2usi64" => "__builtin_ia32_vcvttsh2usi64",
+                    "avx512fp16.vcvtusi2sh" => "__builtin_ia32_vcvtusi2sh",
+                    "avx512fp16.vcvtusi642sh" => "__builtin_ia32_vcvtusi642sh",
+                    "avx512fp16.vfmaddsub.ph.128" => "__builtin_ia32_vfmaddsubph",
+                    "avx512fp16.vfmaddsub.ph.256" => "__builtin_ia32_vfmaddsubph256",
+                    "axor32" => "__builtin_ia32_axor32",
+                    "axor64" => "__builtin_ia32_axor64",
+                    "bmi.bextr.32" => "__builtin_ia32_bextr_u32",
+                    "bmi.bextr.64" => "__builtin_ia32_bextr_u64",
+                    "bmi.bzhi.32" => "__builtin_ia32_bzhi_si",
+                    "bmi.bzhi.64" => "__builtin_ia32_bzhi_di",
+                    "bmi.pdep.32" => "__builtin_ia32_pdep_si",
+                    "bmi.pdep.64" => "__builtin_ia32_pdep_di",
+                    "bmi.pext.32" => "__builtin_ia32_pext_si",
+                    "bmi.pext.64" => "__builtin_ia32_pext_di",
+                    "cldemote" => "__builtin_ia32_cldemote",
+                    "clflushopt" => "__builtin_ia32_clflushopt",
+                    "clrssbsy" => "__builtin_ia32_clrssbsy",
+                    "clui" => "__builtin_ia32_clui",
+                    "clwb" => "__builtin_ia32_clwb",
+                    "clzero" => "__builtin_ia32_clzero",
+                    "cmpccxadd32" => "__builtin_ia32_cmpccxadd32",
+                    "cmpccxadd64" => "__builtin_ia32_cmpccxadd64",
+                    "directstore32" => "__builtin_ia32_directstore_u32",
+                    "directstore64" => "__builtin_ia32_directstore_u64",
+                    "enqcmd" => "__builtin_ia32_enqcmd",
+                    "enqcmds" => "__builtin_ia32_enqcmds",
+                    "flags.read.u32" => "__builtin_ia32_readeflags_u32",
+                    "flags.read.u64" => "__builtin_ia32_readeflags_u64",
+                    "flags.write.u32" => "__builtin_ia32_writeeflags_u32",
+                    "flags.write.u64" => "__builtin_ia32_writeeflags_u64",
+                    "fma.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
+                    "fma.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
+                    "fma.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
+                    "fma.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
+                    "fma.mask.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask",
+                    "fma.mask.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask",
+                    "fma.mask.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask",
+                    "fma.mask.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask",
+                    "fma.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
+                    "fma.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
+                    "fma.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
+                    "fma.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
+                    "fma.vfmadd.pd" => "__builtin_ia32_vfmaddpd",
+                    "fma.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256",
+                    "fma.vfmadd.ps" => "__builtin_ia32_vfmaddps",
+                    "fma.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256",
+                    "fma.vfmadd.sd" => "__builtin_ia32_vfmaddsd",
+                    "fma.vfmadd.ss" => "__builtin_ia32_vfmaddss",
+                    "fma.vfmaddsub.pd" => "__builtin_ia32_vfmaddsubpd",
+                    "fma.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256",
+                    "fma.vfmaddsub.ps" => "__builtin_ia32_vfmaddsubps",
+                    "fma.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256",
+                    "fma.vfmsub.pd" => "__builtin_ia32_vfmsubpd",
+                    "fma.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256",
+                    "fma.vfmsub.ps" => "__builtin_ia32_vfmsubps",
+                    "fma.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256",
+                    "fma.vfmsub.sd" => "__builtin_ia32_vfmsubsd",
+                    "fma.vfmsub.ss" => "__builtin_ia32_vfmsubss",
+                    "fma.vfmsubadd.pd" => "__builtin_ia32_vfmsubaddpd",
+                    "fma.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256",
+                    "fma.vfmsubadd.ps" => "__builtin_ia32_vfmsubaddps",
+                    "fma.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256",
+                    "fma.vfnmadd.pd" => "__builtin_ia32_vfnmaddpd",
+                    "fma.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256",
+                    "fma.vfnmadd.ps" => "__builtin_ia32_vfnmaddps",
+                    "fma.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256",
+                    "fma.vfnmadd.sd" => "__builtin_ia32_vfnmaddsd",
+                    "fma.vfnmadd.ss" => "__builtin_ia32_vfnmaddss",
+                    "fma.vfnmsub.pd" => "__builtin_ia32_vfnmsubpd",
+                    "fma.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256",
+                    "fma.vfnmsub.ps" => "__builtin_ia32_vfnmsubps",
+                    "fma.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256",
+                    "fma.vfnmsub.sd" => "__builtin_ia32_vfnmsubsd",
+                    "fma.vfnmsub.ss" => "__builtin_ia32_vfnmsubss",
+                    "fxrstor" => "__builtin_ia32_fxrstor",
+                    "fxrstor64" => "__builtin_ia32_fxrstor64",
+                    "fxsave" => "__builtin_ia32_fxsave",
+                    "fxsave64" => "__builtin_ia32_fxsave64",
+                    "incsspd" => "__builtin_ia32_incsspd",
+                    "incsspq" => "__builtin_ia32_incsspq",
+                    "invpcid" => "__builtin_ia32_invpcid",
+                    "ldtilecfg" => "__builtin_ia32_tile_loadconfig",
+                    "ldtilecfg.internal" => "__builtin_ia32_tile_loadconfig_internal",
+                    "llwpcb" => "__builtin_ia32_llwpcb",
+                    "loadiwkey" => "__builtin_ia32_loadiwkey",
+                    "lwpins32" => "__builtin_ia32_lwpins32",
+                    "lwpins64" => "__builtin_ia32_lwpins64",
+                    "lwpval32" => "__builtin_ia32_lwpval32",
+                    "lwpval64" => "__builtin_ia32_lwpval64",
+                    "mmx.emms" => "__builtin_ia32_emms",
+                    "mmx.femms" => "__builtin_ia32_femms",
+                    "monitorx" => "__builtin_ia32_monitorx",
+                    "movdir64b" => "__builtin_ia32_movdir64b",
+                    "movrsdi" => "__builtin_ia32_movrsdi",
+                    "movrshi" => "__builtin_ia32_movrshi",
+                    "movrsqi" => "__builtin_ia32_movrsqi",
+                    "movrssi" => "__builtin_ia32_movrssi",
+                    "mwaitx" => "__builtin_ia32_mwaitx",
+                    "pclmulqdq" => "__builtin_ia32_pclmulqdq128",
+                    "pclmulqdq.256" => "__builtin_ia32_pclmulqdq256",
+                    "pclmulqdq.512" => "__builtin_ia32_pclmulqdq512",
+                    "prefetchrs" => "__builtin_ia32_prefetchrs",
+                    "ptwrite32" => "__builtin_ia32_ptwrite32",
+                    "ptwrite64" => "__builtin_ia32_ptwrite64",
+                    "rdfsbase.32" => "__builtin_ia32_rdfsbase32",
+                    "rdfsbase.64" => "__builtin_ia32_rdfsbase64",
+                    "rdgsbase.32" => "__builtin_ia32_rdgsbase32",
+                    "rdgsbase.64" => "__builtin_ia32_rdgsbase64",
+                    "rdpid" => "__builtin_ia32_rdpid",
+                    "rdpkru" => "__builtin_ia32_rdpkru",
+                    "rdpmc" => "__builtin_ia32_rdpmc",
+                    "rdpru" => "__builtin_ia32_rdpru",
+                    "rdsspd" => "__builtin_ia32_rdsspd",
+                    "rdsspq" => "__builtin_ia32_rdsspq",
+                    "rdtsc" => "__builtin_ia32_rdtsc",
+                    "rdtscp" => "__builtin_ia32_rdtscp",
+                    "rstorssp" => "__builtin_ia32_rstorssp",
+                    "saveprevssp" => "__builtin_ia32_saveprevssp",
+                    "senduipi" => "__builtin_ia32_senduipi",
+                    "serialize" => "__builtin_ia32_serialize",
+                    "setssbsy" => "__builtin_ia32_setssbsy",
+                    "sha1msg1" => "__builtin_ia32_sha1msg1",
+                    "sha1msg2" => "__builtin_ia32_sha1msg2",
+                    "sha1nexte" => "__builtin_ia32_sha1nexte",
+                    "sha1rnds4" => "__builtin_ia32_sha1rnds4",
+                    "sha256msg1" => "__builtin_ia32_sha256msg1",
+                    "sha256msg2" => "__builtin_ia32_sha256msg2",
+                    "sha256rnds2" => "__builtin_ia32_sha256rnds2",
+                    "slwpcb" => "__builtin_ia32_slwpcb",
+                    "sse.add.ss" => "__builtin_ia32_addss",
+                    "sse.cmp.ps" => "__builtin_ia32_cmpps",
+                    "sse.cmp.ss" => "__builtin_ia32_cmpss",
+                    "sse.comieq.ss" => "__builtin_ia32_comieq",
+                    "sse.comige.ss" => "__builtin_ia32_comige",
+                    "sse.comigt.ss" => "__builtin_ia32_comigt",
+                    "sse.comile.ss" => "__builtin_ia32_comile",
+                    "sse.comilt.ss" => "__builtin_ia32_comilt",
+                    "sse.comineq.ss" => "__builtin_ia32_comineq",
+                    "sse.cvtsi2ss" => "__builtin_ia32_cvtsi2ss",
+                    "sse.cvtsi642ss" => "__builtin_ia32_cvtsi642ss",
+                    "sse.cvtss2si" => "__builtin_ia32_cvtss2si",
+                    "sse.cvtss2si64" => "__builtin_ia32_cvtss2si64",
+                    "sse.cvttss2si" => "__builtin_ia32_cvttss2si",
+                    "sse.cvttss2si64" => "__builtin_ia32_cvttss2si64",
+                    "sse.div.ss" => "__builtin_ia32_divss",
+                    "sse.max.ps" => "__builtin_ia32_maxps",
+                    "sse.max.ss" => "__builtin_ia32_maxss",
+                    "sse.min.ps" => "__builtin_ia32_minps",
+                    "sse.min.ss" => "__builtin_ia32_minss",
+                    "sse.movmsk.ps" => "__builtin_ia32_movmskps",
+                    "sse.mul.ss" => "__builtin_ia32_mulss",
+                    "sse.rcp.ps" => "__builtin_ia32_rcpps",
+                    "sse.rcp.ss" => "__builtin_ia32_rcpss",
+                    "sse.rsqrt.ps" => "__builtin_ia32_rsqrtps",
+                    "sse.rsqrt.ss" => "__builtin_ia32_rsqrtss",
+                    "sse.sfence" => "__builtin_ia32_sfence",
+                    "sse.sqrt.ps" => "__builtin_ia32_sqrtps",
+                    "sse.sqrt.ss" => "__builtin_ia32_sqrtss",
+                    "sse.storeu.ps" => "__builtin_ia32_storeups",
+                    "sse.sub.ss" => "__builtin_ia32_subss",
+                    "sse.ucomieq.ss" => "__builtin_ia32_ucomieq",
+                    "sse.ucomige.ss" => "__builtin_ia32_ucomige",
+                    "sse.ucomigt.ss" => "__builtin_ia32_ucomigt",
+                    "sse.ucomile.ss" => "__builtin_ia32_ucomile",
+                    "sse.ucomilt.ss" => "__builtin_ia32_ucomilt",
+                    "sse.ucomineq.ss" => "__builtin_ia32_ucomineq",
+                    "sse2.add.sd" => "__builtin_ia32_addsd",
+                    "sse2.clflush" => "__builtin_ia32_clflush",
+                    "sse2.cmp.pd" => "__builtin_ia32_cmppd",
+                    "sse2.cmp.sd" => "__builtin_ia32_cmpsd",
+                    "sse2.comieq.sd" => "__builtin_ia32_comisdeq",
+                    "sse2.comige.sd" => "__builtin_ia32_comisdge",
+                    "sse2.comigt.sd" => "__builtin_ia32_comisdgt",
+                    "sse2.comile.sd" => "__builtin_ia32_comisdle",
+                    "sse2.comilt.sd" => "__builtin_ia32_comisdlt",
+                    "sse2.comineq.sd" => "__builtin_ia32_comisdneq",
+                    "sse2.cvtdq2pd" => "__builtin_ia32_cvtdq2pd",
+                    "sse2.cvtdq2ps" => "__builtin_ia32_cvtdq2ps",
+                    "sse2.cvtpd2dq" => "__builtin_ia32_cvtpd2dq",
+                    "sse2.cvtpd2ps" => "__builtin_ia32_cvtpd2ps",
+                    "sse2.cvtps2dq" => "__builtin_ia32_cvtps2dq",
+                    "sse2.cvtps2pd" => "__builtin_ia32_cvtps2pd",
+                    "sse2.cvtsd2si" => "__builtin_ia32_cvtsd2si",
+                    "sse2.cvtsd2si64" => "__builtin_ia32_cvtsd2si64",
+                    "sse2.cvtsd2ss" => "__builtin_ia32_cvtsd2ss",
+                    "sse2.cvtsi2sd" => "__builtin_ia32_cvtsi2sd",
+                    "sse2.cvtsi642sd" => "__builtin_ia32_cvtsi642sd",
+                    "sse2.cvtss2sd" => "__builtin_ia32_cvtss2sd",
+                    "sse2.cvttpd2dq" => "__builtin_ia32_cvttpd2dq",
+                    "sse2.cvttps2dq" => "__builtin_ia32_cvttps2dq",
+                    "sse2.cvttsd2si" => "__builtin_ia32_cvttsd2si",
+                    "sse2.cvttsd2si64" => "__builtin_ia32_cvttsd2si64",
+                    "sse2.div.sd" => "__builtin_ia32_divsd",
+                    "sse2.lfence" => "__builtin_ia32_lfence",
+                    "sse2.maskmov.dqu" => "__builtin_ia32_maskmovdqu",
+                    "sse2.max.pd" => "__builtin_ia32_maxpd",
+                    "sse2.max.sd" => "__builtin_ia32_maxsd",
+                    "sse2.mfence" => "__builtin_ia32_mfence",
+                    "sse2.min.pd" => "__builtin_ia32_minpd",
+                    "sse2.min.sd" => "__builtin_ia32_minsd",
+                    "sse2.movmsk.pd" => "__builtin_ia32_movmskpd",
+                    "sse2.mul.sd" => "__builtin_ia32_mulsd",
+                    "sse2.packssdw.128" => "__builtin_ia32_packssdw128",
+                    "sse2.packsswb.128" => "__builtin_ia32_packsswb128",
+                    "sse2.packuswb.128" => "__builtin_ia32_packuswb128",
+                    "sse2.padds.b" => "__builtin_ia32_paddsb128",
+                    "sse2.padds.w" => "__builtin_ia32_paddsw128",
+                    "sse2.paddus.b" => "__builtin_ia32_paddusb128",
+                    "sse2.paddus.w" => "__builtin_ia32_paddusw128",
+                    "sse2.pause" => "__builtin_ia32_pause",
+                    "sse2.pavg.b" => "__builtin_ia32_pavgb128",
+                    "sse2.pavg.w" => "__builtin_ia32_pavgw128",
+                    "sse2.pmadd.wd" => "__builtin_ia32_pmaddwd128",
+                    "sse2.pmaxs.w" => "__builtin_ia32_pmaxsw128",
+                    "sse2.pmaxu.b" => "__builtin_ia32_pmaxub128",
+                    "sse2.pmins.w" => "__builtin_ia32_pminsw128",
+                    "sse2.pminu.b" => "__builtin_ia32_pminub128",
+                    "sse2.pmovmskb.128" => "__builtin_ia32_pmovmskb128",
+                    "sse2.pmulh.w" => "__builtin_ia32_pmulhw128",
+                    "sse2.pmulhu.w" => "__builtin_ia32_pmulhuw128",
+                    "sse2.pmulu.dq" => "__builtin_ia32_pmuludq128",
+                    "sse2.psad.bw" => "__builtin_ia32_psadbw128",
+                    "sse2.pshuf.d" => "__builtin_ia32_pshufd",
+                    "sse2.pshufh.w" => "__builtin_ia32_pshufhw",
+                    "sse2.pshufl.w" => "__builtin_ia32_pshuflw",
+                    "sse2.psll.d" => "__builtin_ia32_pslld128",
+                    "sse2.psll.dq" => "__builtin_ia32_pslldqi128",
+                    "sse2.psll.dq.bs" => "__builtin_ia32_pslldqi128_byteshift",
+                    "sse2.psll.q" => "__builtin_ia32_psllq128",
+                    "sse2.psll.w" => "__builtin_ia32_psllw128",
+                    "sse2.pslli.d" => "__builtin_ia32_pslldi128",
+                    "sse2.pslli.q" => "__builtin_ia32_psllqi128",
+                    "sse2.pslli.w" => "__builtin_ia32_psllwi128",
+                    "sse2.psra.d" => "__builtin_ia32_psrad128",
+                    "sse2.psra.w" => "__builtin_ia32_psraw128",
+                    "sse2.psrai.d" => "__builtin_ia32_psradi128",
+                    "sse2.psrai.w" => "__builtin_ia32_psrawi128",
+                    "sse2.psrl.d" => "__builtin_ia32_psrld128",
+                    "sse2.psrl.dq" => "__builtin_ia32_psrldqi128",
+                    "sse2.psrl.dq.bs" => "__builtin_ia32_psrldqi128_byteshift",
+                    "sse2.psrl.q" => "__builtin_ia32_psrlq128",
+                    "sse2.psrl.w" => "__builtin_ia32_psrlw128",
+                    "sse2.psrli.d" => "__builtin_ia32_psrldi128",
+                    "sse2.psrli.q" => "__builtin_ia32_psrlqi128",
+                    "sse2.psrli.w" => "__builtin_ia32_psrlwi128",
+                    "sse2.psubs.b" => "__builtin_ia32_psubsb128",
+                    "sse2.psubs.w" => "__builtin_ia32_psubsw128",
+                    "sse2.psubus.b" => "__builtin_ia32_psubusb128",
+                    "sse2.psubus.w" => "__builtin_ia32_psubusw128",
+                    "sse2.sqrt.pd" => "__builtin_ia32_sqrtpd",
+                    "sse2.sqrt.sd" => "__builtin_ia32_sqrtsd",
+                    "sse2.storel.dq" => "__builtin_ia32_storelv4si",
+                    "sse2.storeu.dq" => "__builtin_ia32_storedqu",
+                    "sse2.storeu.pd" => "__builtin_ia32_storeupd",
+                    "sse2.sub.sd" => "__builtin_ia32_subsd",
+                    "sse2.ucomieq.sd" => "__builtin_ia32_ucomisdeq",
+                    "sse2.ucomige.sd" => "__builtin_ia32_ucomisdge",
+                    "sse2.ucomigt.sd" => "__builtin_ia32_ucomisdgt",
+                    "sse2.ucomile.sd" => "__builtin_ia32_ucomisdle",
+                    "sse2.ucomilt.sd" => "__builtin_ia32_ucomisdlt",
+                    "sse2.ucomineq.sd" => "__builtin_ia32_ucomisdneq",
+                    "sse3.addsub.pd" => "__builtin_ia32_addsubpd",
+                    "sse3.addsub.ps" => "__builtin_ia32_addsubps",
+                    "sse3.hadd.pd" => "__builtin_ia32_haddpd",
+                    "sse3.hadd.ps" => "__builtin_ia32_haddps",
+                    "sse3.hsub.pd" => "__builtin_ia32_hsubpd",
+                    "sse3.hsub.ps" => "__builtin_ia32_hsubps",
+                    "sse3.ldu.dq" => "__builtin_ia32_lddqu",
+                    "sse3.monitor" => "__builtin_ia32_monitor",
+                    "sse3.mwait" => "__builtin_ia32_mwait",
+                    "sse41.blendpd" => "__builtin_ia32_blendpd",
+                    "sse41.blendps" => "__builtin_ia32_blendps",
+                    "sse41.blendvpd" => "__builtin_ia32_blendvpd",
+                    "sse41.blendvps" => "__builtin_ia32_blendvps",
+                    "sse41.dppd" => "__builtin_ia32_dppd",
+                    "sse41.dpps" => "__builtin_ia32_dpps",
+                    "sse41.extractps" => "__builtin_ia32_extractps128",
+                    "sse41.insertps" => "__builtin_ia32_insertps128",
+                    "sse41.movntdqa" => "__builtin_ia32_movntdqa",
+                    "sse41.mpsadbw" => "__builtin_ia32_mpsadbw128",
+                    "sse41.packusdw" => "__builtin_ia32_packusdw128",
+                    "sse41.pblendvb" => "__builtin_ia32_pblendvb128",
+                    "sse41.pblendw" => "__builtin_ia32_pblendw128",
+                    "sse41.phminposuw" => "__builtin_ia32_phminposuw128",
+                    "sse41.pmaxsb" => "__builtin_ia32_pmaxsb128",
+                    "sse41.pmaxsd" => "__builtin_ia32_pmaxsd128",
+                    "sse41.pmaxud" => "__builtin_ia32_pmaxud128",
+                    "sse41.pmaxuw" => "__builtin_ia32_pmaxuw128",
+                    "sse41.pminsb" => "__builtin_ia32_pminsb128",
+                    "sse41.pminsd" => "__builtin_ia32_pminsd128",
+                    "sse41.pminud" => "__builtin_ia32_pminud128",
+                    "sse41.pminuw" => "__builtin_ia32_pminuw128",
+                    "sse41.pmovsxbd" => "__builtin_ia32_pmovsxbd128",
+                    "sse41.pmovsxbq" => "__builtin_ia32_pmovsxbq128",
+                    "sse41.pmovsxbw" => "__builtin_ia32_pmovsxbw128",
+                    "sse41.pmovsxdq" => "__builtin_ia32_pmovsxdq128",
+                    "sse41.pmovsxwd" => "__builtin_ia32_pmovsxwd128",
+                    "sse41.pmovsxwq" => "__builtin_ia32_pmovsxwq128",
+                    "sse41.pmovzxbd" => "__builtin_ia32_pmovzxbd128",
+                    "sse41.pmovzxbq" => "__builtin_ia32_pmovzxbq128",
+                    "sse41.pmovzxbw" => "__builtin_ia32_pmovzxbw128",
+                    "sse41.pmovzxdq" => "__builtin_ia32_pmovzxdq128",
+                    "sse41.pmovzxwd" => "__builtin_ia32_pmovzxwd128",
+                    "sse41.pmovzxwq" => "__builtin_ia32_pmovzxwq128",
+                    "sse41.pmuldq" => "__builtin_ia32_pmuldq128",
+                    "sse41.ptestc" => "__builtin_ia32_ptestc128",
+                    "sse41.ptestnzc" => "__builtin_ia32_ptestnzc128",
+                    "sse41.ptestz" => "__builtin_ia32_ptestz128",
+                    "sse41.round.pd" => "__builtin_ia32_roundpd",
+                    "sse41.round.ps" => "__builtin_ia32_roundps",
+                    "sse41.round.sd" => "__builtin_ia32_roundsd",
+                    "sse41.round.ss" => "__builtin_ia32_roundss",
+                    "sse42.crc32.32.16" => "__builtin_ia32_crc32hi",
+                    "sse42.crc32.32.32" => "__builtin_ia32_crc32si",
+                    "sse42.crc32.32.8" => "__builtin_ia32_crc32qi",
+                    "sse42.crc32.64.64" => "__builtin_ia32_crc32di",
+                    "sse42.pcmpestri128" => "__builtin_ia32_pcmpestri128",
+                    "sse42.pcmpestria128" => "__builtin_ia32_pcmpestria128",
+                    "sse42.pcmpestric128" => "__builtin_ia32_pcmpestric128",
+                    "sse42.pcmpestrio128" => "__builtin_ia32_pcmpestrio128",
+                    "sse42.pcmpestris128" => "__builtin_ia32_pcmpestris128",
+                    "sse42.pcmpestriz128" => "__builtin_ia32_pcmpestriz128",
+                    "sse42.pcmpestrm128" => "__builtin_ia32_pcmpestrm128",
+                    "sse42.pcmpistri128" => "__builtin_ia32_pcmpistri128",
+                    "sse42.pcmpistria128" => "__builtin_ia32_pcmpistria128",
+                    "sse42.pcmpistric128" => "__builtin_ia32_pcmpistric128",
+                    "sse42.pcmpistrio128" => "__builtin_ia32_pcmpistrio128",
+                    "sse42.pcmpistris128" => "__builtin_ia32_pcmpistris128",
+                    "sse42.pcmpistriz128" => "__builtin_ia32_pcmpistriz128",
+                    "sse42.pcmpistrm128" => "__builtin_ia32_pcmpistrm128",
+                    "sse4a.extrq" => "__builtin_ia32_extrq",
+                    "sse4a.extrqi" => "__builtin_ia32_extrqi",
+                    "sse4a.insertq" => "__builtin_ia32_insertq",
+                    "sse4a.insertqi" => "__builtin_ia32_insertqi",
+                    "sse4a.movnt.sd" => "__builtin_ia32_movntsd",
+                    "sse4a.movnt.ss" => "__builtin_ia32_movntss",
+                    "ssse3.pabs.b.128" => "__builtin_ia32_pabsb128",
+                    "ssse3.pabs.d.128" => "__builtin_ia32_pabsd128",
+                    "ssse3.pabs.w.128" => "__builtin_ia32_pabsw128",
+                    "ssse3.phadd.d.128" => "__builtin_ia32_phaddd128",
+                    "ssse3.phadd.sw.128" => "__builtin_ia32_phaddsw128",
+                    "ssse3.phadd.w.128" => "__builtin_ia32_phaddw128",
+                    "ssse3.phsub.d.128" => "__builtin_ia32_phsubd128",
+                    "ssse3.phsub.sw.128" => "__builtin_ia32_phsubsw128",
+                    "ssse3.phsub.w.128" => "__builtin_ia32_phsubw128",
+                    "ssse3.pmadd.ub.sw.128" => "__builtin_ia32_pmaddubsw128",
+                    "ssse3.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128",
+                    "ssse3.pshuf.b.128" => "__builtin_ia32_pshufb128",
+                    "ssse3.psign.b.128" => "__builtin_ia32_psignb128",
+                    "ssse3.psign.d.128" => "__builtin_ia32_psignd128",
+                    "ssse3.psign.w.128" => "__builtin_ia32_psignw128",
+                    "sttilecfg" => "__builtin_ia32_tile_storeconfig",
+                    "stui" => "__builtin_ia32_stui",
+                    "subborrow.u32" => "__builtin_ia32_subborrow_u32",
+                    "subborrow.u64" => "__builtin_ia32_subborrow_u64",
+                    "t2rpntlvwz0" => "__builtin_ia32_t2rpntlvwz0",
+                    "t2rpntlvwz0rs" => "__builtin_ia32_t2rpntlvwz0rs",
+                    "t2rpntlvwz0rst1" => "__builtin_ia32_t2rpntlvwz0rst1",
+                    "t2rpntlvwz0t1" => "__builtin_ia32_t2rpntlvwz0t1",
+                    "t2rpntlvwz1" => "__builtin_ia32_t2rpntlvwz1",
+                    "t2rpntlvwz1rs" => "__builtin_ia32_t2rpntlvwz1rs",
+                    "t2rpntlvwz1rst1" => "__builtin_ia32_t2rpntlvwz1rst1",
+                    "t2rpntlvwz1t1" => "__builtin_ia32_t2rpntlvwz1t1",
+                    "tbm.bextri.u32" => "__builtin_ia32_bextri_u32",
+                    "tbm.bextri.u64" => "__builtin_ia32_bextri_u64",
+                    "tcmmimfp16ps" => "__builtin_ia32_tcmmimfp16ps",
+                    "tcmmimfp16ps.internal" => "__builtin_ia32_tcmmimfp16ps_internal",
+                    "tcmmrlfp16ps" => "__builtin_ia32_tcmmrlfp16ps",
+                    "tcmmrlfp16ps.internal" => "__builtin_ia32_tcmmrlfp16ps_internal",
+                    "tconjtcmmimfp16ps" => "__builtin_ia32_tconjtcmmimfp16ps",
+                    "tconjtcmmimfp16ps.internal" => "__builtin_ia32_tconjtcmmimfp16ps_internal",
+                    "tconjtfp16" => "__builtin_ia32_tconjtfp16",
+                    "tconjtfp16.internal" => "__builtin_ia32_tconjtfp16_internal",
+                    "tcvtrowd2ps" => "__builtin_ia32_tcvtrowd2ps",
+                    "tcvtrowd2ps.internal" => "__builtin_ia32_tcvtrowd2ps_internal",
+                    "tcvtrowps2bf16h" => "__builtin_ia32_tcvtrowps2bf16h",
+                    "tcvtrowps2bf16h.internal" => "__builtin_ia32_tcvtrowps2bf16h_internal",
+                    "tcvtrowps2bf16l" => "__builtin_ia32_tcvtrowps2bf16l",
+                    "tcvtrowps2bf16l.internal" => "__builtin_ia32_tcvtrowps2bf16l_internal",
+                    "tcvtrowps2phh" => "__builtin_ia32_tcvtrowps2phh",
+                    "tcvtrowps2phh.internal" => "__builtin_ia32_tcvtrowps2phh_internal",
+                    "tcvtrowps2phl" => "__builtin_ia32_tcvtrowps2phl",
+                    "tcvtrowps2phl.internal" => "__builtin_ia32_tcvtrowps2phl_internal",
+                    "tdpbf16ps" => "__builtin_ia32_tdpbf16ps",
+                    "tdpbf16ps.internal" => "__builtin_ia32_tdpbf16ps_internal",
+                    "tdpbf8ps" => "__builtin_ia32_tdpbf8ps",
+                    "tdpbf8ps.internal" => "__builtin_ia32_tdpbf8ps_internal",
+                    "tdpbhf8ps" => "__builtin_ia32_tdpbhf8ps",
+                    "tdpbhf8ps.internal" => "__builtin_ia32_tdpbhf8ps_internal",
+                    "tdpbssd" => "__builtin_ia32_tdpbssd",
+                    "tdpbssd.internal" => "__builtin_ia32_tdpbssd_internal",
+                    "tdpbsud" => "__builtin_ia32_tdpbsud",
+                    "tdpbsud.internal" => "__builtin_ia32_tdpbsud_internal",
+                    "tdpbusd" => "__builtin_ia32_tdpbusd",
+                    "tdpbusd.internal" => "__builtin_ia32_tdpbusd_internal",
+                    "tdpbuud" => "__builtin_ia32_tdpbuud",
+                    "tdpbuud.internal" => "__builtin_ia32_tdpbuud_internal",
+                    "tdpfp16ps" => "__builtin_ia32_tdpfp16ps",
+                    "tdpfp16ps.internal" => "__builtin_ia32_tdpfp16ps_internal",
+                    "tdphbf8ps" => "__builtin_ia32_tdphbf8ps",
+                    "tdphbf8ps.internal" => "__builtin_ia32_tdphbf8ps_internal",
+                    "tdphf8ps" => "__builtin_ia32_tdphf8ps",
+                    "tdphf8ps.internal" => "__builtin_ia32_tdphf8ps_internal",
+                    "testui" => "__builtin_ia32_testui",
+                    "tileloadd64" => "__builtin_ia32_tileloadd64",
+                    "tileloadd64.internal" => "__builtin_ia32_tileloadd64_internal",
+                    "tileloaddrs64" => "__builtin_ia32_tileloaddrs64",
+                    "tileloaddrs64.internal" => "__builtin_ia32_tileloaddrs64_internal",
+                    "tileloaddrst164" => "__builtin_ia32_tileloaddrst164",
+                    "tileloaddrst164.internal" => "__builtin_ia32_tileloaddrst164_internal",
+                    "tileloaddt164" => "__builtin_ia32_tileloaddt164",
+                    "tileloaddt164.internal" => "__builtin_ia32_tileloaddt164_internal",
+                    "tilemovrow" => "__builtin_ia32_tilemovrow",
+                    "tilemovrow.internal" => "__builtin_ia32_tilemovrow_internal",
+                    "tilerelease" => "__builtin_ia32_tilerelease",
+                    "tilestored64" => "__builtin_ia32_tilestored64",
+                    "tilestored64.internal" => "__builtin_ia32_tilestored64_internal",
+                    "tilezero" => "__builtin_ia32_tilezero",
+                    "tilezero.internal" => "__builtin_ia32_tilezero_internal",
+                    "tmmultf32ps" => "__builtin_ia32_tmmultf32ps",
+                    "tmmultf32ps.internal" => "__builtin_ia32_tmmultf32ps_internal",
+                    "tpause" => "__builtin_ia32_tpause",
+                    "ttcmmimfp16ps" => "__builtin_ia32_ttcmmimfp16ps",
+                    "ttcmmimfp16ps.internal" => "__builtin_ia32_ttcmmimfp16ps_internal",
+                    "ttcmmrlfp16ps" => "__builtin_ia32_ttcmmrlfp16ps",
+                    "ttcmmrlfp16ps.internal" => "__builtin_ia32_ttcmmrlfp16ps_internal",
+                    "ttdpbf16ps" => "__builtin_ia32_ttdpbf16ps",
+                    "ttdpbf16ps.internal" => "__builtin_ia32_ttdpbf16ps_internal",
+                    "ttdpfp16ps" => "__builtin_ia32_ttdpfp16ps",
+                    "ttdpfp16ps.internal" => "__builtin_ia32_ttdpfp16ps_internal",
+                    "ttmmultf32ps" => "__builtin_ia32_ttmmultf32ps",
+                    "ttmmultf32ps.internal" => "__builtin_ia32_ttmmultf32ps_internal",
+                    "ttransposed" => "__builtin_ia32_ttransposed",
+                    "ttransposed.internal" => "__builtin_ia32_ttransposed_internal",
+                    "umonitor" => "__builtin_ia32_umonitor",
+                    "umwait" => "__builtin_ia32_umwait",
+                    "urdmsr" => "__builtin_ia32_urdmsr",
+                    "uwrmsr" => "__builtin_ia32_uwrmsr",
+                    "vbcstnebf162ps128" => "__builtin_ia32_vbcstnebf162ps128",
+                    "vbcstnebf162ps256" => "__builtin_ia32_vbcstnebf162ps256",
+                    "vbcstnesh2ps128" => "__builtin_ia32_vbcstnesh2ps128",
+                    "vbcstnesh2ps256" => "__builtin_ia32_vbcstnesh2ps256",
+                    "vcvtneebf162ps128" => "__builtin_ia32_vcvtneebf162ps128",
+                    "vcvtneebf162ps256" => "__builtin_ia32_vcvtneebf162ps256",
+                    "vcvtneeph2ps128" => "__builtin_ia32_vcvtneeph2ps128",
+                    "vcvtneeph2ps256" => "__builtin_ia32_vcvtneeph2ps256",
+                    "vcvtneobf162ps128" => "__builtin_ia32_vcvtneobf162ps128",
+                    "vcvtneobf162ps256" => "__builtin_ia32_vcvtneobf162ps256",
+                    "vcvtneoph2ps128" => "__builtin_ia32_vcvtneoph2ps128",
+                    "vcvtneoph2ps256" => "__builtin_ia32_vcvtneoph2ps256",
+                    "vcvtneps2bf16128" => "__builtin_ia32_vcvtneps2bf16128",
+                    "vcvtneps2bf16256" => "__builtin_ia32_vcvtneps2bf16256",
+                    "vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps",
+                    "vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256",
+                    "vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph",
+                    "vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256",
+                    "vgf2p8affineinvqb.128" => "__builtin_ia32_vgf2p8affineinvqb_v16qi",
+                    "vgf2p8affineinvqb.256" => "__builtin_ia32_vgf2p8affineinvqb_v32qi",
+                    "vgf2p8affineinvqb.512" => "__builtin_ia32_vgf2p8affineinvqb_v64qi",
+                    "vgf2p8affineqb.128" => "__builtin_ia32_vgf2p8affineqb_v16qi",
+                    "vgf2p8affineqb.256" => "__builtin_ia32_vgf2p8affineqb_v32qi",
+                    "vgf2p8affineqb.512" => "__builtin_ia32_vgf2p8affineqb_v64qi",
+                    "vgf2p8mulb.128" => "__builtin_ia32_vgf2p8mulb_v16qi",
+                    "vgf2p8mulb.256" => "__builtin_ia32_vgf2p8mulb_v32qi",
+                    "vgf2p8mulb.512" => "__builtin_ia32_vgf2p8mulb_v64qi",
+                    "vsha512msg1" => "__builtin_ia32_vsha512msg1",
+                    "vsha512msg2" => "__builtin_ia32_vsha512msg2",
+                    "vsha512rnds2" => "__builtin_ia32_vsha512rnds2",
+                    "vsm3msg1" => "__builtin_ia32_vsm3msg1",
+                    "vsm3msg2" => "__builtin_ia32_vsm3msg2",
+                    "vsm3rnds2" => "__builtin_ia32_vsm3rnds2",
+                    "vsm4key4128" => "__builtin_ia32_vsm4key4128",
+                    "vsm4key4256" => "__builtin_ia32_vsm4key4256",
+                    "vsm4key4512" => "__builtin_ia32_vsm4key4512",
+                    "vsm4rnds4128" => "__builtin_ia32_vsm4rnds4128",
+                    "vsm4rnds4256" => "__builtin_ia32_vsm4rnds4256",
+                    "vsm4rnds4512" => "__builtin_ia32_vsm4rnds4512",
+                    "wbinvd" => "__builtin_ia32_wbinvd",
+                    "wbnoinvd" => "__builtin_ia32_wbnoinvd",
+                    "wrfsbase.32" => "__builtin_ia32_wrfsbase32",
+                    "wrfsbase.64" => "__builtin_ia32_wrfsbase64",
+                    "wrgsbase.32" => "__builtin_ia32_wrgsbase32",
+                    "wrgsbase.64" => "__builtin_ia32_wrgsbase64",
+                    "wrpkru" => "__builtin_ia32_wrpkru",
+                    "wrssd" => "__builtin_ia32_wrssd",
+                    "wrssq" => "__builtin_ia32_wrssq",
+                    "wrussd" => "__builtin_ia32_wrussd",
+                    "wrussq" => "__builtin_ia32_wrussq",
+                    "xabort" => "__builtin_ia32_xabort",
+                    "xbegin" => "__builtin_ia32_xbegin",
+                    "xend" => "__builtin_ia32_xend",
+                    "xop.vfrcz.pd" => "__builtin_ia32_vfrczpd",
+                    "xop.vfrcz.pd.256" => "__builtin_ia32_vfrczpd256",
+                    "xop.vfrcz.ps" => "__builtin_ia32_vfrczps",
+                    "xop.vfrcz.ps.256" => "__builtin_ia32_vfrczps256",
+                    "xop.vfrcz.sd" => "__builtin_ia32_vfrczsd",
+                    "xop.vfrcz.ss" => "__builtin_ia32_vfrczss",
+                    "xop.vpcmov" => "__builtin_ia32_vpcmov",
+                    "xop.vpcmov.256" => "__builtin_ia32_vpcmov_256",
+                    "xop.vpcomb" => "__builtin_ia32_vpcomb",
+                    "xop.vpcomd" => "__builtin_ia32_vpcomd",
+                    "xop.vpcomq" => "__builtin_ia32_vpcomq",
+                    "xop.vpcomub" => "__builtin_ia32_vpcomub",
+                    "xop.vpcomud" => "__builtin_ia32_vpcomud",
+                    "xop.vpcomuq" => "__builtin_ia32_vpcomuq",
+                    "xop.vpcomuw" => "__builtin_ia32_vpcomuw",
+                    "xop.vpcomw" => "__builtin_ia32_vpcomw",
+                    "xop.vpermil2pd" => "__builtin_ia32_vpermil2pd",
+                    "xop.vpermil2pd.256" => "__builtin_ia32_vpermil2pd256",
+                    "xop.vpermil2ps" => "__builtin_ia32_vpermil2ps",
+                    "xop.vpermil2ps.256" => "__builtin_ia32_vpermil2ps256",
+                    "xop.vphaddbd" => "__builtin_ia32_vphaddbd",
+                    "xop.vphaddbq" => "__builtin_ia32_vphaddbq",
+                    "xop.vphaddbw" => "__builtin_ia32_vphaddbw",
+                    "xop.vphadddq" => "__builtin_ia32_vphadddq",
+                    "xop.vphaddubd" => "__builtin_ia32_vphaddubd",
+                    "xop.vphaddubq" => "__builtin_ia32_vphaddubq",
+                    "xop.vphaddubw" => "__builtin_ia32_vphaddubw",
+                    "xop.vphaddudq" => "__builtin_ia32_vphaddudq",
+                    "xop.vphadduwd" => "__builtin_ia32_vphadduwd",
+                    "xop.vphadduwq" => "__builtin_ia32_vphadduwq",
+                    "xop.vphaddwd" => "__builtin_ia32_vphaddwd",
+                    "xop.vphaddwq" => "__builtin_ia32_vphaddwq",
+                    "xop.vphsubbw" => "__builtin_ia32_vphsubbw",
+                    "xop.vphsubdq" => "__builtin_ia32_vphsubdq",
+                    "xop.vphsubwd" => "__builtin_ia32_vphsubwd",
+                    "xop.vpmacsdd" => "__builtin_ia32_vpmacsdd",
+                    "xop.vpmacsdqh" => "__builtin_ia32_vpmacsdqh",
+                    "xop.vpmacsdql" => "__builtin_ia32_vpmacsdql",
+                    "xop.vpmacssdd" => "__builtin_ia32_vpmacssdd",
+                    "xop.vpmacssdqh" => "__builtin_ia32_vpmacssdqh",
+                    "xop.vpmacssdql" => "__builtin_ia32_vpmacssdql",
+                    "xop.vpmacsswd" => "__builtin_ia32_vpmacsswd",
+                    "xop.vpmacssww" => "__builtin_ia32_vpmacssww",
+                    "xop.vpmacswd" => "__builtin_ia32_vpmacswd",
+                    "xop.vpmacsww" => "__builtin_ia32_vpmacsww",
+                    "xop.vpmadcsswd" => "__builtin_ia32_vpmadcsswd",
+                    "xop.vpmadcswd" => "__builtin_ia32_vpmadcswd",
+                    "xop.vpperm" => "__builtin_ia32_vpperm",
+                    "xop.vprotb" => "__builtin_ia32_vprotb",
+                    "xop.vprotbi" => "__builtin_ia32_vprotbi",
+                    "xop.vprotd" => "__builtin_ia32_vprotd",
+                    "xop.vprotdi" => "__builtin_ia32_vprotdi",
+                    "xop.vprotq" => "__builtin_ia32_vprotq",
+                    "xop.vprotqi" => "__builtin_ia32_vprotqi",
+                    "xop.vprotw" => "__builtin_ia32_vprotw",
+                    "xop.vprotwi" => "__builtin_ia32_vprotwi",
+                    "xop.vpshab" => "__builtin_ia32_vpshab",
+                    "xop.vpshad" => "__builtin_ia32_vpshad",
+                    "xop.vpshaq" => "__builtin_ia32_vpshaq",
+                    "xop.vpshaw" => "__builtin_ia32_vpshaw",
+                    "xop.vpshlb" => "__builtin_ia32_vpshlb",
+                    "xop.vpshld" => "__builtin_ia32_vpshld",
+                    "xop.vpshlq" => "__builtin_ia32_vpshlq",
+                    "xop.vpshlw" => "__builtin_ia32_vpshlw",
+                    "xresldtrk" => "__builtin_ia32_xresldtrk",
+                    "xsusldtrk" => "__builtin_ia32_xsusldtrk",
+                    "xtest" => "__builtin_ia32_xtest",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            x86(name)
+        }
+        "xcore" => {
+            #[allow(non_snake_case)]
+            fn xcore(name: &str) -> &str {
+                match name {
+                    // xcore
+                    "bitrev" => "__builtin_bitrev",
+                    "getid" => "__builtin_getid",
+                    "getps" => "__builtin_getps",
+                    "setps" => "__builtin_setps",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            xcore(name)
+        }
+        _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+    }
 }

From e4c9584a55195af88bc2e99b259e33d20e3efbe4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Fractal=20Fir=28Micha=C5=82=20Kostrubiec=29?=
 <michkos2005@gmail.com>
Date: Tue, 3 Jun 2025 20:29:37 +0200
Subject: [PATCH 903/997] Apply suggestions from code review

Co-authored-by: antoyo <antoyo@users.noreply.github.com>
---
 src/intrinsic/llvm.rs        |  1 +
 tools/generate_intrinsics.py | 12 ++++++------
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 2c44fb237887..25a765f571fa 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1555,4 +1555,5 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
     cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
     func
 }
+
 include!("archs.rs");
diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index e24139f9a406..ed0ebf007195 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -168,22 +168,22 @@ def update_intrinsics(llvm_path, llvmint, llvmint2):
         os.path.dirname(os.path.abspath(__file__)),
         "../src/intrinsic/archs.rs",
     )
-    # A hashmap of all architectures. This allows us to first match on the architecture, and then on the intrisnics. 
+    # A hashmap of all architectures. This allows us to first match on the architecture, and then on the intrinsics.
     # This speeds up the comparison, and makes our code considerably smaller.
-    # Since all intrinsic names start with ".llvm", we skip that prefix. 
+    # Since all intrinsic names start with "llvm.", we skip that prefix.
     print("Updating content of `{}`...".format(output_file))
     with open(output_file, "w", encoding="utf8") as out:
         out.write("// File generated by `rustc_codegen_gcc/tools/generate_intrinsics.py`\n")
         out.write("// DO NOT EDIT IT!\n")
         out.write("/// Translate a given LLVM intrinsic name to an equivalent GCC one.\n")
         out.write("fn map_arch_intrinsic(name:&str)->&str{\n")
-        out.write('let Some(name) =  name.strip_prefix("llvm.") else {unimplemented!("***** unsupported LLVM intrinsic {}", name)};\n')
-        out.write('let Some((arch, name)) =  name.split_once(\'.\') else {unimplemented!("***** unsupported LLVM intrinsic {}", name)};\n')
+        out.write('let Some(name) = name.strip_prefix("llvm.") else { unimplemented!("***** unsupported LLVM intrinsic {}", name) };\n')
+        out.write('let Some((arch, name)) = name.split_once(\'.\') else { unimplemented!("***** unsupported LLVM intrinsic {}", name) };\n')
         out.write("match arch {\n")
         for arch in archs:
             if len(intrinsics[arch]) == 0:
                 continue
-            out.write("\"{}\" => {{ #[allow(non_snake_case)] fn {}(name:&str)->&str{{ match name{{".format(arch,arch))
+            out.write("\"{}\" => {{ #[allow(non_snake_case)] fn {}(name: &str) -> &str {{ match name {{".format(arch,arch))
             intrinsics[arch].sort(key=lambda x: (x[0], x[2]))
             out.write('    // {}\n'.format(arch))
             for entry in intrinsics[arch]:
@@ -198,7 +198,7 @@ def update_intrinsics(llvm_path, llvmint, llvmint2):
                     out.write('    "{}" => "{}",\n'.format(llvm_name, entry[1]))
             out.write('    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),\n')
             out.write("}} }} {}(name) }}\n,".format(arch))
-        out.write('    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),\n')
+        out.write('    _ => unimplemented!("***** unsupported LLVM architecture {}", name),\n')
         out.write("}\n}")
     subprocess.call(["rustfmt", output_file])
     print("Done!")

From 2e89179368b3c8fc46699b008a37e0ffafeac44b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Thu, 5 Jun 2025 17:08:01 -0400
Subject: [PATCH 904/997] Make comment more specific

---
 src/context.rs | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/context.rs b/src/context.rs
index 1d46d73cd265..c9ce97c81ebd 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -127,7 +127,8 @@ pub struct CodegenCx<'gcc, 'tcx> {
     pub pointee_infos: RefCell<FxHashMap<(Ty<'tcx>, Size), Option<PointeeInfo>>>,
 
     /// NOTE: a hack is used because the rustc API is not suitable to libgccjit and as such,
-    /// `const_undef()` returns struct as pointer so that they can later be assigned a value.
+    /// `const_undef()` returns struct as pointer so that they can later be assigned a value (in
+    /// e.g. Builder::insert_value).
     /// As such, this set remembers which of these pointers were returned by this function so that
     /// they can be dereferenced later.
     /// FIXME(antoyo): fix the rustc API to avoid having this hack.

From ddf0ba22e163112ab032e04d2a93e2f0a73bab36 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Fri, 6 Jun 2025 16:11:25 +0200
Subject: [PATCH 905/997] Use `Command::exec` to run `rustc`/`cargo` commands
 to ensure that if they exit because of a signal, it will be displayed at the
 top level

---
 build_system/src/rust_tools.rs | 34 +++++++++++++++++++++-------------
 build_system/src/utils.rs      | 13 ++-----------
 2 files changed, 23 insertions(+), 24 deletions(-)

diff --git a/build_system/src/rust_tools.rs b/build_system/src/rust_tools.rs
index 105f5eebe240..7a0c5962919c 100644
--- a/build_system/src/rust_tools.rs
+++ b/build_system/src/rust_tools.rs
@@ -1,12 +1,11 @@
 use std::collections::HashMap;
 use std::ffi::OsStr;
+#[cfg(unix)]
+use std::os::unix::process::CommandExt;
 use std::path::PathBuf;
 
 use crate::config::ConfigInfo;
-use crate::utils::{
-    get_toolchain, run_command_with_output_and_env_no_err, rustc_toolchain_version_info,
-    rustc_version_info,
-};
+use crate::utils::{get_toolchain, rustc_toolchain_version_info, rustc_version_info};
 
 fn args(command: &str) -> Result<Option<Vec<String>>, String> {
     // We skip the binary and the "cargo"/"rustc" option.
@@ -97,6 +96,22 @@ impl RustcTools {
     }
 }
 
+fn exec(input: &[&dyn AsRef<OsStr>], env: &HashMap<String, String>) -> Result<(), String> {
+    #[cfg(unix)]
+    {
+        let error = crate::utils::get_command_inner(input, None, Some(env)).exec();
+        eprintln!("execvp syscall failed: {error:?}");
+        std::process::exit(1);
+    }
+    #[cfg(not(unix))]
+    {
+        if crate::utils::run_command_with_output_and_env_no_err(input, None, Some(env)).is_err() {
+            std::process::exit(1);
+        }
+        Ok(())
+    }
+}
+
 pub fn run_cargo() -> Result<(), String> {
     let Some(mut tools) = RustcTools::new("cargo")? else { return Ok(()) };
     let rustflags = tools.env.get("RUSTFLAGS").cloned().unwrap_or_default();
@@ -105,11 +120,7 @@ pub fn run_cargo() -> Result<(), String> {
     for arg in &tools.args {
         command.push(arg);
     }
-    if run_command_with_output_and_env_no_err(&command, None, Some(&tools.env)).is_err() {
-        std::process::exit(1);
-    }
-
-    Ok(())
+    exec(&command, &tools.env)
 }
 
 pub fn run_rustc() -> Result<(), String> {
@@ -118,8 +129,5 @@ pub fn run_rustc() -> Result<(), String> {
     for arg in &tools.args {
         command.push(arg);
     }
-    if run_command_with_output_and_env_no_err(&command, None, Some(&tools.env)).is_err() {
-        std::process::exit(1);
-    }
-    Ok(())
+    exec(&command, &tools.env)
 }
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index ca177a5feb86..da91b3a8c297 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -1,7 +1,5 @@
 use std::collections::HashMap;
 use std::ffi::OsStr;
-#[cfg(unix)]
-use std::ffi::c_int;
 use std::fmt::Debug;
 use std::fs;
 #[cfg(unix)]
@@ -9,11 +7,6 @@ use std::os::unix::process::ExitStatusExt;
 use std::path::{Path, PathBuf};
 use std::process::{Command, ExitStatus, Output};
 
-#[cfg(unix)]
-unsafe extern "C" {
-    fn raise(signal: c_int) -> c_int;
-}
-
 fn exec_command(
     input: &[&dyn AsRef<OsStr>],
     cwd: Option<&Path>,
@@ -27,9 +20,6 @@ fn exec_command(
     #[cfg(unix)]
     {
         if let Some(signal) = status.signal() {
-            unsafe {
-                raise(signal as _);
-            }
             // In case the signal didn't kill the current process.
             return Err(command_error(input, &cwd, format!("Process received signal {}", signal)));
         }
@@ -37,7 +27,7 @@ fn exec_command(
     Ok(status)
 }
 
-fn get_command_inner(
+pub(crate) fn get_command_inner(
     input: &[&dyn AsRef<OsStr>],
     cwd: Option<&Path>,
     env: Option<&HashMap<String, String>>,
@@ -136,6 +126,7 @@ pub fn run_command_with_output_and_env(
     Ok(())
 }
 
+#[cfg(not(unix))]
 pub fn run_command_with_output_and_env_no_err(
     input: &[&dyn AsRef<OsStr>],
     cwd: Option<&Path>,

From aa95fcd4610aaad851fe7d860f8e9f5c96b58eaf Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Sat, 7 Jun 2025 23:51:55 +0200
Subject: [PATCH 906/997] Add support for automatically reducing found fuzz
 cases.

---
 build_system/src/fuzz.rs        |  93 +++++++---
 build_system/src/fuzz/reduce.rs | 307 ++++++++++++++++++++++++++++++++
 2 files changed, 379 insertions(+), 21 deletions(-)
 create mode 100644 build_system/src/fuzz/reduce.rs

diff --git a/build_system/src/fuzz.rs b/build_system/src/fuzz.rs
index 05a87412b361..1bc43f525ef6 100644
--- a/build_system/src/fuzz.rs
+++ b/build_system/src/fuzz.rs
@@ -1,13 +1,19 @@
 use std::ffi::OsStr;
 use std::path::Path;
 
+mod reduce;
+
 use crate::utils::run_command_with_output;
 
 fn show_usage() {
     println!(
         r#"
 `fuzz` command help:
-    --help                 : Show this help"#
+    --reduce               : Reduces a file generated by rustlantis
+    --help                 : Show this help
+    --start                : Start of the fuzzed range
+    --count                : The number of cases to fuzz
+    -j --jobs              : The number of threads to use during fuzzing"#
     );
 }
 
@@ -20,6 +26,16 @@ pub fn run() -> Result<(), String> {
         std::thread::available_parallelism().map(|threads| threads.get()).unwrap_or(1);
     while let Some(arg) = args.next() {
         match arg.as_str() {
+            "--reduce" => {
+                let Some(path) = args.next() else {
+                    return Err("--reduce must be provided with a path".into());
+                };
+                if !std::fs::exists(&path).unwrap_or(false) {
+                    return Err("--reduce must be provided with a valid path".into());
+                }
+                reduce::reduce(&path);
+                return Ok(());
+            }
             "--help" => {
                 show_usage();
                 return Ok(());
@@ -75,16 +91,17 @@ fn fuzz_range(start: u64, end: u64, threads: usize) {
     let start = Arc::new(AtomicU64::new(start));
     // Count time during fuzzing
     let start_time = Instant::now();
+    let mut workers = Vec::with_capacity(threads);
     // Spawn `threads`..
     for _ in 0..threads {
         let start = start.clone();
         // .. which each will ..
-        std::thread::spawn(move || {
+        workers.push(std::thread::spawn(move || {
             // ... grab the next fuzz seed ...
             while start.load(Ordering::Relaxed) < end {
                 let next = start.fetch_add(1, Ordering::Relaxed);
                 // .. test that seed .
-                match test(next) {
+                match test(next, false) {
                     Err(err) => {
                         // If the test failed at compile-time...
                         println!("test({}) failed because {err:?}", next);
@@ -99,21 +116,30 @@ fn fuzz_range(start: u64, end: u64, threads: usize) {
                     Ok(Err(err)) => {
                         // If the test failed at run-time...
                         println!("The LLVM and GCC results don't match for {err:?}");
-                        // ... copy that file to the directory `target/fuzz/runtime_error`...
+                        // ... generate a new file, which prints temporaries(instead of hashing them)...
                         let mut out_path: std::path::PathBuf = "target/fuzz/runtime_error".into();
                         std::fs::create_dir_all(&out_path).unwrap();
-                        // .. into a file named `fuzz{seed}.rs`.
+                        let Ok(Err(tmp_print_err)) = test(next, true) else {
+                            // ... if that file does not reproduce the issue...
+                            // ... save the original sample in a file named `fuzz{seed}.rs`...
+                            out_path.push(&format!("fuzz{next}.rs"));
+                            std::fs::copy(err, &out_path).unwrap();
+                            continue;
+                        };
+                        // ... if that new file still produces the issue, copy it to `fuzz{seed}.rs`..
                         out_path.push(&format!("fuzz{next}.rs"));
-                        std::fs::copy(err, out_path).unwrap();
+                        std::fs::copy(tmp_print_err, &out_path).unwrap();
+                        // ... and start reducing it, using some propierites of `rustlantis` to speed up the process.
+                        reduce::reduce(&out_path);
                     }
                     // If the test passed, do nothing
                     Ok(Ok(())) => (),
                 }
             }
-        });
+        }));
     }
     // The "manager" thread loop.
-    while start.load(Ordering::Relaxed) < end {
+    while start.load(Ordering::Relaxed) < end || !workers.iter().all(|t| t.is_finished()) {
         // Every 500 ms...
         let five_hundred_millis = Duration::from_millis(500);
         std::thread::sleep(five_hundred_millis);
@@ -121,7 +147,7 @@ fn fuzz_range(start: u64, end: u64, threads: usize) {
         let remaining = end - start.load(Ordering::Relaxed);
         // ... fix the count(the start counter counts the cases that
         // begun fuzzing, and not only the ones that are done)...
-        let fuzzed = (total - remaining) - threads as u64;
+        let fuzzed = (total - remaining).saturating_sub(threads as u64);
         // ... and the fuzz speed ...
         let iter_per_sec = fuzzed as f64 / start_time.elapsed().as_secs_f64();
         // .. and use them to display fuzzing stats.
@@ -131,6 +157,7 @@ fn fuzz_range(start: u64, end: u64, threads: usize) {
             (remaining as f64) / iter_per_sec
         )
     }
+    drop(workers);
 }
 
 /// Builds & runs a file with LLVM.
@@ -200,35 +227,59 @@ fn release_gcc(path: &std::path::Path) -> Result<Vec<u8>, String> {
 }
 
 /// Generates a new rustlantis file, & compares the result of running it with GCC and LLVM.
-fn test(seed: u64) -> Result<Result<(), std::path::PathBuf>, String> {
+fn test(seed: u64, print_tmp_vars: bool) -> Result<Result<(), std::path::PathBuf>, String> {
     // Generate a Rust source...
-    let source_file = generate(seed)?;
-    // ... test it with debug LLVM ...
-    let llvm_res = debug_llvm(&source_file)?;
+    let source_file = generate(seed, print_tmp_vars)?;
+    test_file(&source_file, true)
+}
+/// Tests a file with a cached LLVM result. Used for reduction, when it is known
+/// that a given transformation should not change the execution result.
+fn test_cached(
+    source_file: &Path,
+    remove_tmps: bool,
+    cache: &mut Option<Vec<u8>>,
+) -> Result<Result<(), std::path::PathBuf>, String> {
+    if let None = cache {
+        // Test `source_file` with debug LLVM ...
+        *cache = Some(debug_llvm(&source_file)?);
+    }
+    let llvm_res = cache.as_ref().unwrap();
     // ... test it with release GCC ...
     let gcc_res = release_gcc(&source_file)?;
     // ... compare the results ...
-    if llvm_res != gcc_res {
+    if *llvm_res != gcc_res {
         // .. if they don't match, report an error.
-        Ok(Err(source_file))
+        Ok(Err(source_file.to_path_buf()))
     } else {
-        std::fs::remove_file(source_file).map_err(|err| format!("{err:?}"))?;
+        if remove_tmps {
+            std::fs::remove_file(source_file).map_err(|err| format!("{err:?}"))?;
+        }
         Ok(Ok(()))
     }
 }
+fn test_file(
+    source_file: &Path,
+    remove_tmps: bool,
+) -> Result<Result<(), std::path::PathBuf>, String> {
+    let mut uncached = None;
+    test_cached(source_file, remove_tmps, &mut uncached)
+}
 
 /// Generates a new rustlantis file for us to run tests on.
-fn generate(seed: u64) -> Result<std::path::PathBuf, String> {
+fn generate(seed: u64, print_tmp_vars: bool) -> Result<std::path::PathBuf, String> {
     use std::io::Write;
     let mut out_path = std::env::temp_dir();
     out_path.push(&format!("fuzz{seed}.rs"));
     // We need to get the command output here.
-    let out = std::process::Command::new("cargo")
+    let mut generate = std::process::Command::new("cargo");
+    generate
         .args(["run", "--release", "--bin", "generate"])
         .arg(&format!("{seed}"))
-        .current_dir("clones/rustlantis")
-        .output()
-        .map_err(|err| format!("{err:?}"))?;
+        .current_dir("clones/rustlantis");
+    if print_tmp_vars {
+        generate.arg("--debug");
+    }
+    let out = generate.output().map_err(|err| format!("{err:?}"))?;
     // Stuff the rustlantis output in a source file.
     std::fs::File::create(&out_path)
         .map_err(|err| format!("{err:?}"))?
diff --git a/build_system/src/fuzz/reduce.rs b/build_system/src/fuzz/reduce.rs
new file mode 100644
index 000000000000..1e6dac8b7916
--- /dev/null
+++ b/build_system/src/fuzz/reduce.rs
@@ -0,0 +1,307 @@
+use std::io::Write;
+use std::path::{Path, PathBuf};
+fn save_reduction(lines: &[String], path: &PathBuf, ext: &str) {
+    let mut path = path.clone();
+    path.set_extension(&format!("rs.{ext}"));
+    let mut file = std::fs::File::create(&path).expect("Could not create the reduced example file");
+    for line in lines {
+        file.write_all(line.as_bytes()).expect("Could not save the reduced example");
+    }
+}
+/// Checks if a given reduction is valid.
+fn test_reduction(lines: &[String], path: &PathBuf, cache: &mut Option<Vec<u8>>) -> bool {
+    let mut path = path.clone();
+    path.set_extension("rs_reduced");
+    let mut file = std::fs::File::create(&path).expect("Could not create the reduced example file");
+    for line in lines {
+        file.write_all(line.as_bytes()).expect("Could not save the reduced example");
+    }
+    let Ok(Err(_)) = super::test_cached(&path, false, cache) else {
+        return false;
+    };
+    return true;
+}
+/// Removes duplicate assigements in bulk.
+/// If a line A = B is followed directly by A = C,
+/// then removing the second line ought to be fully sound,
+/// and not change the behaviour of the program at all. Detect & remove such lines.
+fn remove_dup_assign(
+    file: &mut Vec<String>,
+    path: &PathBuf,
+    starts: usize,
+    ends: usize,
+    cache: &mut Option<Vec<u8>>,
+) {
+    let mut curr = 0;
+    let mut file_copy = file.clone();
+    let mut reduction_count = 0;
+    // Not worth it.
+    if ends - starts < 8 {
+        return;
+    }
+    for index in starts..ends {
+        let Some((prefix, _)) = file_copy[index].split_once('=') else {
+            continue;
+        };
+        let Some((prefix2, _)) = file_copy[index + 1].split_once('=') else {
+            continue;
+        };
+        let prefix = prefix.trim();
+        let prefix2 = prefix2.trim();
+
+        if prefix == prefix2 {
+            file_copy[index] = "".into();
+            reduction_count += 1;
+        }
+    }
+    if reduction_count == 0 {
+        return;
+    }
+    if test_reduction(&file_copy, &path, cache) {
+        eprintln!("Reduced {path:?} by {} lines `remove_dup_assign`", reduction_count);
+        *file = file_copy;
+    } else {
+        remove_dup_assign(file, path, starts, (starts + ends) / 2, cache);
+        remove_dup_assign(file, path, (starts + ends) / 2, ends, cache);
+    }
+    save_reduction(file, path, "remove_dup_assign");
+}
+/// Removes all the unneeded calls to `dump_var`. This is not something tools like `cvise` can do,
+/// but it greately speeds up MIR interpretation + native execution.
+fn remove_dump_var(file: &mut Vec<String>, path: &PathBuf) {
+    let mut curr = 0;
+    // ... try disabling `dump_vars` one by one, until only the neccesarry ones are left.
+    while curr < file.len() {
+        let Some(line) = file[curr..].iter().position(|line| line.contains("dump_var")) else {
+            // No more `dump_var`s to remove - exit early.
+            break;
+        };
+        // Make the line absolute again.
+        let line = line + curr;
+        let mut file_copy = file.clone();
+        // Try removing 3 consecutive lines(the call, block end and block beginning). This effectively removes a `dump_var`.
+        file_copy.remove(line);
+        file_copy.remove(line);
+        file_copy.remove(line);
+        // Not cached - the execution result can change.
+        let mut uncached = None;
+        // Check if this reduction is valid.
+        if test_reduction(&file_copy, &path, &mut uncached) {
+            eprintln!("Reduced {path:?} by 3 lines `remove_dump_var`");
+            *file = file_copy;
+            curr = line;
+        } else {
+            curr = line + 1;
+        }
+    }
+    save_reduction(file, path, "remove_dump_var");
+}
+/// Replaces matches with gotos where possible.
+/// This exploits some properties of rustlantis(match arm order),
+/// and is only soundly applicable to MIR generated by it.
+/// Still, it is not something `cvise` can do, but it simplifies the code a ton.
+fn match_to_goto(file: &mut Vec<String>, path: &PathBuf) {
+    let mut cache = None;
+    let mut curr = 0;
+    while curr < file.len() {
+        let Some(match_starts) = file[curr..].iter().position(|line| line.contains("match")) else {
+            // No more `match`es to remove - exit early.
+            break;
+        };
+        let match_starts = match_starts + curr;
+        // Find the end of the match
+        let Some(match_ends) = file[match_starts..].iter().position(|line| line.contains('}'))
+        else {
+            // Can't find match end - exit early.
+            break;
+        };
+        let match_ends = match_ends + match_starts;
+        let match_body = &file[match_starts..match_ends];
+
+        // Find where this match should normally jump to.
+        // This *should* be the second-last arm of the match, as per the paper(the remaining blocks are decoys).
+        // If this ever changes, this reduction may not always be sound.
+        // This is not a problem, however: we NEED to use MIRI for reduction anwyway,
+        // and it will catch this issue.
+        let jumps_to = &match_body[match_body.len() - 2].trim();
+        let Some((_, bb_ident)) = jumps_to.split_once("bb") else {
+            break;
+        };
+        // We now have the number of the block we jump to at runtime.
+        let bb_ident = bb_ident.trim_matches(',');
+        // Try replacing this match with an unconditional jump.
+        let mut file_copy = file.clone();
+        for _ in match_starts..(match_ends + 1) {
+            file_copy.remove(match_starts);
+        }
+        file_copy.insert(match_starts, format!("Goto(bb{bb_ident})\n"));
+        if test_reduction(&file_copy, &path, &mut cache) {
+            eprintln!("Reduced {path:?} by {} lines `match_to_goto`", match_ends - match_starts);
+            *file = file_copy;
+            curr = match_starts;
+        } else {
+            curr = match_ends;
+        }
+    }
+    save_reduction(file, path, "match_to_goto");
+}
+/// At this point, we can try "killing" blocks, by replacing their bodies with calls to `abort`.
+/// This is always sound(the program aborts, so no UB can occur after the block),
+/// and allows us to safely remove *a lot* of unneeded blocks.
+fn block_abort(file: &mut Vec<String>, path: &PathBuf) {
+    let mut curr = 0;
+    let mut cache = None;
+    while curr < file.len() {
+        let Some(block_starts) = file[curr..]
+            .iter()
+            .position(|line| line.starts_with("bb") && line.trim_end().ends_with(" = {"))
+        else {
+            // No more `block`s to kill - exit early.
+            break;
+        };
+        let block_starts = block_starts + curr;
+        // Find the beginning of the next block to find the end of this block.
+        let Some(block_ends) = file[(block_starts + 1)..]
+            .iter()
+            .position(|line| line.starts_with("bb") && line.trim_end().ends_with(" = {"))
+        else {
+            // No more `block`s to kill - exit early.
+            break;
+        };
+        let block_ends = block_starts + block_ends;
+        let block_starts = block_starts + 1;
+        let mut file_copy = file.clone();
+        // Remove the block body...
+        for _ in block_starts..(block_ends) {
+            file_copy.remove(block_starts);
+        }
+        // ..and insert an unconditional call to abort.
+        file_copy.insert(
+            block_starts,
+            format!("Call(tmp = core::intrinsics::abort(), ReturnTo(bb1), UnwindUnreachable())\n"),
+        );
+        file_copy.insert(block_starts, format!("let tmp = ();\n"));
+
+        if test_reduction(&file_copy, &path, &mut cache) {
+            eprintln!("Reduced {path:?} by {} lines `block_abort`", block_ends - block_starts - 2);
+            *file = file_copy;
+            curr = block_starts;
+        } else {
+            curr = block_ends;
+        }
+    }
+    save_reduction(file, path, "block_abort");
+}
+/// Removes unreachable basic blocks
+fn remove_block(file: &mut Vec<String>, path: &PathBuf) {
+    let mut curr = 0;
+    let mut cache = None;
+    // Next, we try to outright remove blocks.
+    while curr < file.len() {
+        let Some(block_starts) = file[curr..]
+            .iter()
+            .position(|line| line.starts_with("bb") && line.trim_end().ends_with(" = {"))
+        else {
+            // No more `block`s to remove - exit early.
+            break;
+        };
+        let block_starts = block_starts + curr;
+        // Find the beginning of the next block to find the end of this block.
+        let Some(block_ends) = file[(block_starts + 1)..]
+            .iter()
+            .position(|line| line.starts_with("bb") && line.trim_end().ends_with(" = {"))
+        else {
+            // No more `block`s to remove - exit early.
+            break;
+        };
+        let block_ends = block_starts + block_ends + 1;
+        // Large blocks are likely to be neccsarry.
+        if block_ends - block_starts > 6 {
+            curr = block_starts + 1;
+            continue;
+        }
+        let mut file_copy = file.clone();
+        file_copy.drain(block_starts..block_ends);
+        if test_reduction(&file_copy, &path, &mut cache) {
+            eprintln!("Reduced {path:?} by {} lines `remove_blocks`", block_ends - block_starts);
+            *file = file_copy;
+            curr = block_starts;
+        } else {
+            curr = block_starts + 1;
+        }
+    }
+    save_reduction(file, path, "remove_block");
+}
+/// Merges blocks ending with unconditional jumps.
+fn linearize_cf(file: &mut Vec<String>, path: &PathBuf) {
+    let mut curr = 0;
+    let mut cache = None;
+    // Next, we try to linearize the control flow. What the does that mean?
+    // Given a sequence like this:
+    // Goto(bb22)
+    // }
+    // bb22 = {
+    // We remove those 3 lines, merging the blocks together. This is not something `cvise` can do,
+    // and it makes other transformations easier.
+    while curr < file.len() {
+        let Some(block_starts) = file[curr..]
+            .iter()
+            .position(|line| line.starts_with("bb") && line.trim_end().ends_with(" = {"))
+        else {
+            // No more `block`s to remove - exit early.
+            break;
+        };
+        let block_starts = block_starts + curr;
+        // Extract the block id.
+        let Some((block, _)) = file[block_starts].split_once('=') else {
+            curr = block_starts + 1;
+            continue;
+        };
+        let block = block.trim();
+        if file[block_starts - 2].trim() != format!("Goto({block})") {
+            curr = block_starts + 1;
+            continue;
+        }
+        let mut file_copy = file.clone();
+        // Try removing 3 consecutive lines(the goto, block end and block beginning). This effectively removes a `Goto(next)`.
+        file_copy.remove(block_starts - 2);
+        file_copy.remove(block_starts - 2);
+        file_copy.remove(block_starts - 2);
+        // Check if this reduction is valid.
+        if test_reduction(&file_copy, &path, &mut cache) {
+            eprintln!("Reduced {path:?} by 3 lines `linearize_cf`");
+            *file = file_copy;
+            curr = block_starts;
+        } else {
+            curr = block_starts + 1;
+        }
+    }
+    save_reduction(file, path, "linearize_cf");
+}
+pub(super) fn reduce(path: impl AsRef<Path>) {
+    let path = path.as_ref().to_owned();
+    // ... read the file to a buffer ..
+    let file = std::fs::read_to_string(&path).expect("Could not open the file to reduce");
+    let mut file: Vec<_> = file.split_inclusive('\n').map(|s| s.to_string()).collect();
+
+    // ... and run reduction passes.
+    eprintln!("running `remove_dump_var` on {path:?}.");
+    remove_dump_var(&mut file, &path);
+    let len = file.len();
+    let mut cache = None;
+    eprintln!("running `remove_dup_assign` on {path:?}.");
+    remove_dup_assign(&mut file, &path, 0, len, &mut cache);
+    file.retain(|line| !line.is_empty());
+    eprintln!("running `match_to_goto` on {path:?}.");
+    match_to_goto(&mut file, &path);
+    eprintln!("running `block_abort` on {path:?}.");
+    block_abort(&mut file, &path);
+    eprintln!("running `remove_block` on {path:?}.");
+    remove_block(&mut file, &path);
+    eprintln!("running `linearize_cf` on {path:?}.");
+    linearize_cf(&mut file, &path);
+    let mut out = std::fs::File::create(&path).expect("Could not save the reduction result.");
+    for line in file {
+        out.write_all(line.as_bytes());
+    }
+}

From d14a49d89c21a2f1dfccbefae22f45efc832c79e Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 8 Jun 2025 11:48:01 +0200
Subject: [PATCH 907/997] Add documentation about why we use `exec`

---
 build_system/src/rust_tools.rs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/build_system/src/rust_tools.rs b/build_system/src/rust_tools.rs
index 7a0c5962919c..7e3e37a30a83 100644
--- a/build_system/src/rust_tools.rs
+++ b/build_system/src/rust_tools.rs
@@ -99,6 +99,10 @@ impl RustcTools {
 fn exec(input: &[&dyn AsRef<OsStr>], env: &HashMap<String, String>) -> Result<(), String> {
     #[cfg(unix)]
     {
+        // We use `exec` to call the `execvp` syscall instead of creating a new process where the
+        // command will be executed because very few signals can actually kill a current process,
+        // so if segmentation fault (SIGSEGV signal) happens and we raise to the current process,
+        // it will simply do nothing and we won't have the nice error message for the shell.
         let error = crate::utils::get_command_inner(input, None, Some(env)).exec();
         eprintln!("execvp syscall failed: {error:?}");
         std::process::exit(1);

From 96e9fbfdb62618ca01dfd21e3fd70a25793f7f00 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 10 Jun 2025 11:19:00 -0400
Subject: [PATCH 908/997] Fix sysroot Cargo.lock

---
 build_system/build_sysroot/Cargo.lock | 170 +++++++++++++++++---------
 1 file changed, 115 insertions(+), 55 deletions(-)

diff --git a/build_system/build_sysroot/Cargo.lock b/build_system/build_sysroot/Cargo.lock
index 51bec5aa9e37..0c75977ee798 100644
--- a/build_system/build_sysroot/Cargo.lock
+++ b/build_system/build_sysroot/Cargo.lock
@@ -1,24 +1,24 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
-version = 3
+version = 4
 
 [[package]]
 name = "addr2line"
-version = "0.22.0"
+version = "0.24.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6e4503c46a5c0c7844e948c9a4d6acd9f50cccb4de1c48eb9e291ea17470c678"
+checksum = "dfbe277e56a376000877090da837660b4427aad530e3028d44e0bffe4f89a1c1"
 dependencies = [
  "compiler_builtins",
- "gimli 0.29.0",
+ "gimli",
  "rustc-std-workspace-alloc",
  "rustc-std-workspace-core",
 ]
 
 [[package]]
-name = "adler"
-version = "1.0.2"
+name = "adler2"
+version = "2.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f26201604c87b1e01bd3d98f8d5d9a8fcbb815e8cedb41ffccbeb4bf593a35fe"
+checksum = "512761e0bb2578dd7380c6baaa0f4ce03e84f95e960231d1dec8bf4d7d6e2627"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-core",
@@ -33,10 +33,21 @@ dependencies = [
 ]
 
 [[package]]
-name = "allocator-api2"
-version = "0.2.18"
+name = "alloctests"
+version = "0.0.0"
+dependencies = [
+ "rand",
+ "rand_xorshift",
+]
+
+[[package]]
+name = "cc"
+version = "1.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5c6cb57a04249c6480766f7f7cef5467412af1490f8d1e243141daddada3264f"
+checksum = "1aeb932158bd710538c73702db6945cb68a8fb08c519e6e12706b94263b36db8"
+dependencies = [
+ "shlex",
+]
 
 [[package]]
 name = "cfg-if"
@@ -50,10 +61,11 @@ dependencies = [
 
 [[package]]
 name = "compiler_builtins"
-version = "0.1.118"
+version = "0.1.160"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "92afe7344b64cccf3662ca26d5d1c0828ab826f04206b97d856e3625e390e4b5"
+checksum = "6376049cfa92c0aa8b9ac95fae22184b981c658208d4ed8a1dc553cd83612895"
 dependencies = [
+ "cc",
  "rustc-std-workspace-core",
 ]
 
@@ -61,11 +73,19 @@ dependencies = [
 name = "core"
 version = "0.0.0"
 
+[[package]]
+name = "coretests"
+version = "0.0.0"
+dependencies = [
+ "rand",
+ "rand_xorshift",
+]
+
 [[package]]
 name = "dlmalloc"
-version = "0.2.6"
+version = "0.2.8"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3264b043b8e977326c1ee9e723da2c1f8d09a99df52cacf00b4dbce5ac54414d"
+checksum = "8cff88b751e7a276c4ab0e222c3f355190adc6dde9ce39c851db39da34990df7"
 dependencies = [
  "cfg-if",
  "compiler_builtins",
@@ -97,20 +117,9 @@ dependencies = [
 
 [[package]]
 name = "gimli"
-version = "0.29.0"
+version = "0.31.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "40ecd4077b5ae9fd2e9e169b102c6c330d0605168eb0e8bf79952b256dbefffd"
-dependencies = [
- "compiler_builtins",
- "rustc-std-workspace-alloc",
- "rustc-std-workspace-core",
-]
-
-[[package]]
-name = "gimli"
-version = "0.30.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e2e1d97fbe9722ba9bbd0c97051c2956e726562b61f86a25a4360398a40edfc9"
+checksum = "07e28edb80900c19c28f1072f2e8aeca7fa06b23cd4169cefe1af5aa3260783f"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-alloc",
@@ -119,11 +128,10 @@ dependencies = [
 
 [[package]]
 name = "hashbrown"
-version = "0.14.5"
+version = "0.15.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e5274423e17b7c9fc20b6e7e208532f9b19825d82dfd615708b70edd83df41f1"
+checksum = "84b26c544d002229e640969970a2e74021aadf6e2f96372b9c58eff97de08eb3"
 dependencies = [
- "allocator-api2",
  "compiler_builtins",
  "rustc-std-workspace-alloc",
  "rustc-std-workspace-core",
@@ -131,9 +139,9 @@ dependencies = [
 
 [[package]]
 name = "hermit-abi"
-version = "0.4.0"
+version = "0.5.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "fbf6a919d6cf397374f7dfeeea91d974c7c0a7221d0d0f4f20d859d329e53fcc"
+checksum = "f154ce46856750ed433c8649605bf7ed2de3bc35fd9d2a9f30cddd873c80cb08"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-alloc",
@@ -142,9 +150,9 @@ dependencies = [
 
 [[package]]
 name = "libc"
-version = "0.2.155"
+version = "0.2.172"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "97b3888a4aecf77e811145cadf6eef5901f4782c53886191b2f693f24761847c"
+checksum = "d750af042f7ef4f724306de029d18836c26c1765a54a6a3f094cbd23a7267ffa"
 dependencies = [
  "rustc-std-workspace-core",
 ]
@@ -161,11 +169,11 @@ dependencies = [
 
 [[package]]
 name = "miniz_oxide"
-version = "0.7.4"
+version = "0.8.8"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b8a240ddb74feaf34a79a7add65a741f3167852fba007066dcac1ca548d89c08"
+checksum = "3be647b768db090acb35d5ec5db2b0e1f1de11133ca123b9eacf5137868f892a"
 dependencies = [
- "adler",
+ "adler2",
  "compiler_builtins",
  "rustc-std-workspace-alloc",
  "rustc-std-workspace-core",
@@ -173,9 +181,9 @@ dependencies = [
 
 [[package]]
 name = "object"
-version = "0.36.3"
+version = "0.36.7"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27b64972346851a39438c60b341ebc01bba47464ae329e55cf343eb93964efd9"
+checksum = "62948e14d923ea95ea2c7c86c71013138b66525b86bdc08d2dcc262bdb497b87"
 dependencies = [
  "compiler_builtins",
  "memchr",
@@ -188,7 +196,6 @@ name = "panic_abort"
 version = "0.0.0"
 dependencies = [
  "alloc",
- "cfg-if",
  "compiler_builtins",
  "core",
  "libc",
@@ -211,14 +218,22 @@ name = "proc_macro"
 version = "0.0.0"
 dependencies = [
  "core",
+ "rustc-literal-escaper",
  "std",
 ]
 
+[[package]]
+name = "profiler_builtins"
+version = "0.0.0"
+dependencies = [
+ "cc",
+]
+
 [[package]]
 name = "r-efi"
-version = "4.5.0"
+version = "5.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e9e935efc5854715dfc0a4c9ef18dc69dee0ec3bf9cc3ab740db831c0fdd86a3"
+checksum = "74765f6d916ee2faa39bc8e68e4f3ed8949b48cccdac59983d287a7cb71ce9c5"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-core",
@@ -226,15 +241,39 @@ dependencies = [
 
 [[package]]
 name = "r-efi-alloc"
-version = "1.0.0"
+version = "2.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "31d6f09fe2b6ad044bc3d2c34ce4979796581afd2f1ebc185837e02421e02fd7"
+checksum = "e43c53ff1a01d423d1cb762fd991de07d32965ff0ca2e4f80444ac7804198203"
 dependencies = [
  "compiler_builtins",
  "r-efi",
  "rustc-std-workspace-core",
 ]
 
+[[package]]
+name = "rand"
+version = "0.9.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9fbfd9d094a40bf3ae768db9361049ace4c0e04a4fd6b359518bd7b73a73dd97"
+dependencies = [
+ "rand_core",
+]
+
+[[package]]
+name = "rand_core"
+version = "0.9.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "99d9a13982dcf210057a8a78572b2217b667c3beacbf3a0d8b454f6f82837d38"
+
+[[package]]
+name = "rand_xorshift"
+version = "0.4.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "513962919efc330f829edb2535844d1b912b0fbe2ca165d613e4e8788bb05a5a"
+dependencies = [
+ "rand_core",
+]
+
 [[package]]
 name = "rustc-demangle"
 version = "0.1.24"
@@ -245,6 +284,15 @@ dependencies = [
  "rustc-std-workspace-core",
 ]
 
+[[package]]
+name = "rustc-literal-escaper"
+version = "0.0.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "0041b6238913c41fe704213a4a9329e2f685a156d1781998128b4149c230ad04"
+dependencies = [
+ "rustc-std-workspace-std",
+]
+
 [[package]]
 name = "rustc-std-workspace-alloc"
 version = "1.99.0"
@@ -266,6 +314,12 @@ dependencies = [
  "std",
 ]
 
+[[package]]
+name = "shlex"
+version = "1.3.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "0fda2ff0d084019ba4d7c6f371c95d8fd75ce3524c3cb8fb653a3023f6323e64"
+
 [[package]]
 name = "std"
 version = "0.0.0"
@@ -286,10 +340,13 @@ dependencies = [
  "panic_unwind",
  "r-efi",
  "r-efi-alloc",
+ "rand",
+ "rand_xorshift",
  "rustc-demangle",
  "std_detect",
  "unwind",
  "wasi",
+ "windows-targets 0.0.0",
 ]
 
 [[package]]
@@ -298,6 +355,7 @@ version = "0.1.5"
 dependencies = [
  "cfg-if",
  "compiler_builtins",
+ "libc",
  "rustc-std-workspace-alloc",
  "rustc-std-workspace-core",
 ]
@@ -306,10 +364,8 @@ dependencies = [
 name = "sysroot"
 version = "0.0.0"
 dependencies = [
- "alloc",
- "compiler_builtins",
- "core",
  "proc_macro",
+ "profiler_builtins",
  "std",
  "test",
 ]
@@ -326,9 +382,9 @@ dependencies = [
 
 [[package]]
 name = "unicode-width"
-version = "0.1.13"
+version = "0.1.14"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0336d538f7abc86d282a4189614dfaa90810dfc2c6f6427eaf88e16311dd225d"
+checksum = "7dd6e30e90baa6f72411720665d41d89b9a3d039dc45b8faea1ddd07f617f6af"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-core",
@@ -348,12 +404,12 @@ dependencies = [
 
 [[package]]
 name = "unwinding"
-version = "0.2.2"
+version = "0.2.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc55842d0db6329a669d55a623c674b02d677b16bfb2d24857d4089d41eba882"
+checksum = "8393f2782b6060a807337ff353780c1ca15206f9ba2424df18cb6e733bd7b345"
 dependencies = [
  "compiler_builtins",
- "gimli 0.30.0",
+ "gimli",
  "rustc-std-workspace-core",
 ]
 
@@ -370,13 +426,17 @@ dependencies = [
 
 [[package]]
 name = "windows-sys"
-version = "0.52.0"
+version = "0.59.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "282be5f36a8ce781fad8c8ae18fa3f9beff57ec1b52cb3de0789201425d9a33d"
+checksum = "1e38bc4d79ed67fd075bcc251a1c39b32a1776bbe92e5bef1f0bf1f8c531853b"
 dependencies = [
- "windows-targets",
+ "windows-targets 0.52.6",
 ]
 
+[[package]]
+name = "windows-targets"
+version = "0.0.0"
+
 [[package]]
 name = "windows-targets"
 version = "0.52.6"

From bb3ee766cabf3997a056cdef1ff3087f5f2fe3eb Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 10 Jun 2025 17:41:35 -0400
Subject: [PATCH 909/997] Temporarily ignore the test u128-as-f32 to merge the
 fix of the sysroot Cargo.toml

---
 tests/failing-ui-tests.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 0a01a661c357..8b736fb5d4e6 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -109,3 +109,4 @@ tests/ui/codegen/equal-pointers-unequal/strict-provenance/zero.rs
 tests/ui/simd/simd-bitmask-notpow2.rs
 tests/ui/codegen/StackColoring-not-blowup-stack-issue-40883.rs
 tests/ui/uninhabited/uninhabited-transparent-return-abi.rs
+tests/ui/numbers-arithmetic/u128-as-f32.rs

From 45e23b21ad23ca946ba39298b12cfccfd46146a3 Mon Sep 17 00:00:00 2001
From: Emmanuel Ferdman <emmanuelferdman@gmail.com>
Date: Wed, 11 Jun 2025 14:11:19 -0700
Subject: [PATCH 910/997] Use `tempfile::TempDir::keep()` instead of deprecated
 `into_path()`

Signed-off-by: Emmanuel Ferdman <emmanuelferdman@gmail.com>
---
 src/lib.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/lib.rs b/src/lib.rs
index 66e9ce4627c8..93c03fbaace8 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -208,7 +208,7 @@ impl CodegenBackend for GccCodegenBackend {
         #[cfg(not(feature = "master"))]
         {
             let temp_dir = TempDir::new().expect("cannot create temporary directory");
-            let temp_file = temp_dir.into_path().join("result.asm");
+            let temp_file = temp_dir.keep().join("result.asm");
             let check_context = Context::default();
             check_context.set_print_errors_to_stderr(false);
             let _int128_ty = check_context.new_c_type(CType::UInt128t);

From e3d4805a7b6072477e9e7f50031af9a250da74fc Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Sun, 8 Jun 2025 18:52:32 +0200
Subject: [PATCH 911/997] Improved reduction by adding support for removign
 dead functions. Fixed typos, formating.

---
 build_system/src/fuzz.rs        |  20 +--
 build_system/src/fuzz/reduce.rs | 208 +++++++++++++++++++++++++-------
 2 files changed, 177 insertions(+), 51 deletions(-)

diff --git a/build_system/src/fuzz.rs b/build_system/src/fuzz.rs
index 1bc43f525ef6..f170453bfe4c 100644
--- a/build_system/src/fuzz.rs
+++ b/build_system/src/fuzz.rs
@@ -129,7 +129,7 @@ fn fuzz_range(start: u64, end: u64, threads: usize) {
                         // ... if that new file still produces the issue, copy it to `fuzz{seed}.rs`..
                         out_path.push(&format!("fuzz{next}.rs"));
                         std::fs::copy(tmp_print_err, &out_path).unwrap();
-                        // ... and start reducing it, using some propierites of `rustlantis` to speed up the process.
+                        // ... and start reducing it, using some properties of `rustlantis` to speed up the process.
                         reduce::reduce(&out_path);
                     }
                     // If the test passed, do nothing
@@ -225,7 +225,7 @@ fn release_gcc(path: &std::path::Path) -> Result<Vec<u8>, String> {
     res.extend(output.stderr);
     Ok(res)
 }
-
+type ResultCache = Option<(Vec<u8>, Vec<u8>)>;
 /// Generates a new rustlantis file, & compares the result of running it with GCC and LLVM.
 fn test(seed: u64, print_tmp_vars: bool) -> Result<Result<(), std::path::PathBuf>, String> {
     // Generate a Rust source...
@@ -237,17 +237,17 @@ fn test(seed: u64, print_tmp_vars: bool) -> Result<Result<(), std::path::PathBuf
 fn test_cached(
     source_file: &Path,
     remove_tmps: bool,
-    cache: &mut Option<Vec<u8>>,
+    cache: &mut ResultCache,
 ) -> Result<Result<(), std::path::PathBuf>, String> {
-    if let None = cache {
-        // Test `source_file` with debug LLVM ...
-        *cache = Some(debug_llvm(&source_file)?);
-    }
-    let llvm_res = cache.as_ref().unwrap();
-    // ... test it with release GCC ...
+    //  Test `source_file` with release GCC ...
     let gcc_res = release_gcc(&source_file)?;
+    if cache.is_none() {
+        // ...test `source_file` with debug LLVM ...
+        *cache = Some((debug_llvm(&source_file)?, gcc_res.clone()));
+    }
+    let (llvm_res, old_gcc) = cache.as_ref().unwrap();
     // ... compare the results ...
-    if *llvm_res != gcc_res {
+    if *llvm_res != gcc_res && gcc_res == *old_gcc {
         // .. if they don't match, report an error.
         Ok(Err(source_file.to_path_buf()))
     } else {
diff --git a/build_system/src/fuzz/reduce.rs b/build_system/src/fuzz/reduce.rs
index 1e6dac8b7916..3c18c9555bd9 100644
--- a/build_system/src/fuzz/reduce.rs
+++ b/build_system/src/fuzz/reduce.rs
@@ -1,36 +1,43 @@
 use std::io::Write;
 use std::path::{Path, PathBuf};
-fn save_reduction(lines: &[String], path: &PathBuf, ext: &str) {
+
+use super::ResultCache;
+
+/// Saves a reduced file for a given `stage`
+fn save_reduction(lines: &[String], path: &PathBuf, stage: &str) {
     let mut path = path.clone();
-    path.set_extension(&format!("rs.{ext}"));
+    path.set_extension(&format!("rs.{stage}"));
     let mut file = std::fs::File::create(&path).expect("Could not create the reduced example file");
     for line in lines {
         file.write_all(line.as_bytes()).expect("Could not save the reduced example");
     }
 }
+
 /// Checks if a given reduction is valid.
-fn test_reduction(lines: &[String], path: &PathBuf, cache: &mut Option<Vec<u8>>) -> bool {
+fn test_reduction(lines: &[String], path: &PathBuf, cache: &mut ResultCache) -> bool {
     let mut path = path.clone();
     path.set_extension("rs_reduced");
     let mut file = std::fs::File::create(&path).expect("Could not create the reduced example file");
     for line in lines {
         file.write_all(line.as_bytes()).expect("Could not save the reduced example");
     }
-    let Ok(Err(_)) = super::test_cached(&path, false, cache) else {
+    let res = super::test_cached(&path, false, cache);
+    let Ok(Err(_)) = res else {
         return false;
     };
     return true;
 }
-/// Removes duplicate assigements in bulk.
+
+/// Removes duplicate assignments in bulk.
 /// If a line A = B is followed directly by A = C,
-/// then removing the second line ought to be fully sound,
+/// then removing the first line ought to be fully sound,
 /// and not change the behaviour of the program at all. Detect & remove such lines.
 fn remove_dup_assign(
     file: &mut Vec<String>,
     path: &PathBuf,
     starts: usize,
     ends: usize,
-    cache: &mut Option<Vec<u8>>,
+    cache: &mut ResultCache,
 ) {
     let mut curr = 0;
     let mut file_copy = file.clone();
@@ -43,34 +50,52 @@ fn remove_dup_assign(
         let Some((prefix, _)) = file_copy[index].split_once('=') else {
             continue;
         };
-        let Some((prefix2, _)) = file_copy[index + 1].split_once('=') else {
+        let Some((prefix2, postifx2)) = file_copy[index + 1].split_once('=') else {
             continue;
         };
         let prefix = prefix.trim();
         let prefix2 = prefix2.trim();
-
-        if prefix == prefix2 {
+        // FIXME: Right now, remove_dup_assign cares about assignments to the exact same place.
+        // However, given an assigemnt like this:
+        // ```
+        // A.0 = 1_u32;
+        // A = (2_u32, 3.0);
+        // ```
+        // The first assignment could be safely omitted.
+        // Additionally, we try to check if the second assignment could depend on the first one.
+        // In such cases, the result is likely to change, so we bail.
+        if prefix == prefix2 && !postifx2.contains(prefix) {
             file_copy[index] = "".into();
             reduction_count += 1;
         }
     }
+    // We have removed no lines - no point in testing.
     if reduction_count == 0 {
         return;
     }
+    // Check if the removed lines affected the execution result in any way, shape or form.
     if test_reduction(&file_copy, &path, cache) {
-        eprintln!("Reduced {path:?} by {} lines `remove_dup_assign`", reduction_count);
+        println!("Reduced {path:?} by {} lines `remove_dup_assign`", reduction_count);
         *file = file_copy;
     } else {
+        // The execution result changed.
+        // This can occur if the second assignment depended on the first one.
+        // Eg.
+        // ```
+        // a = b + c;
+        // a = a + d;
+        // ```
         remove_dup_assign(file, path, starts, (starts + ends) / 2, cache);
         remove_dup_assign(file, path, (starts + ends) / 2, ends, cache);
     }
     save_reduction(file, path, "remove_dup_assign");
 }
+
 /// Removes all the unneeded calls to `dump_var`. This is not something tools like `cvise` can do,
 /// but it greately speeds up MIR interpretation + native execution.
 fn remove_dump_var(file: &mut Vec<String>, path: &PathBuf) {
     let mut curr = 0;
-    // ... try disabling `dump_vars` one by one, until only the neccesarry ones are left.
+    // ... try disabling `dump_vars` one by one, until only the necessary ones are left.
     while curr < file.len() {
         let Some(line) = file[curr..].iter().position(|line| line.contains("dump_var")) else {
             // No more `dump_var`s to remove - exit early.
@@ -87,7 +112,7 @@ fn remove_dump_var(file: &mut Vec<String>, path: &PathBuf) {
         let mut uncached = None;
         // Check if this reduction is valid.
         if test_reduction(&file_copy, &path, &mut uncached) {
-            eprintln!("Reduced {path:?} by 3 lines `remove_dump_var`");
+            println!("Reduced {path:?} by 3 lines `remove_dump_var`");
             *file = file_copy;
             curr = line;
         } else {
@@ -96,13 +121,14 @@ fn remove_dump_var(file: &mut Vec<String>, path: &PathBuf) {
     }
     save_reduction(file, path, "remove_dump_var");
 }
+
 /// Replaces matches with gotos where possible.
 /// This exploits some properties of rustlantis(match arm order),
 /// and is only soundly applicable to MIR generated by it.
 /// Still, it is not something `cvise` can do, but it simplifies the code a ton.
-fn match_to_goto(file: &mut Vec<String>, path: &PathBuf) {
-    let mut cache = None;
+fn match_to_goto(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
     let mut curr = 0;
+
     while curr < file.len() {
         let Some(match_starts) = file[curr..].iter().position(|line| line.contains("match")) else {
             // No more `match`es to remove - exit early.
@@ -135,8 +161,8 @@ fn match_to_goto(file: &mut Vec<String>, path: &PathBuf) {
             file_copy.remove(match_starts);
         }
         file_copy.insert(match_starts, format!("Goto(bb{bb_ident})\n"));
-        if test_reduction(&file_copy, &path, &mut cache) {
-            eprintln!("Reduced {path:?} by {} lines `match_to_goto`", match_ends - match_starts);
+        if test_reduction(&file_copy, &path, cache) {
+            println!("Reduced {path:?} by {} lines `match_to_goto`", match_ends - match_starts);
             *file = file_copy;
             curr = match_starts;
         } else {
@@ -145,12 +171,12 @@ fn match_to_goto(file: &mut Vec<String>, path: &PathBuf) {
     }
     save_reduction(file, path, "match_to_goto");
 }
+
 /// At this point, we can try "killing" blocks, by replacing their bodies with calls to `abort`.
 /// This is always sound(the program aborts, so no UB can occur after the block),
 /// and allows us to safely remove *a lot* of unneeded blocks.
-fn block_abort(file: &mut Vec<String>, path: &PathBuf) {
+fn block_abort(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
     let mut curr = 0;
-    let mut cache = None;
     while curr < file.len() {
         let Some(block_starts) = file[curr..]
             .iter()
@@ -182,8 +208,8 @@ fn block_abort(file: &mut Vec<String>, path: &PathBuf) {
         );
         file_copy.insert(block_starts, format!("let tmp = ();\n"));
 
-        if test_reduction(&file_copy, &path, &mut cache) {
-            eprintln!("Reduced {path:?} by {} lines `block_abort`", block_ends - block_starts - 2);
+        if test_reduction(&file_copy, &path, cache) {
+            println!("Reduced {path:?} by {} lines `block_abort`", block_ends - block_starts - 2);
             *file = file_copy;
             curr = block_starts;
         } else {
@@ -192,10 +218,11 @@ fn block_abort(file: &mut Vec<String>, path: &PathBuf) {
     }
     save_reduction(file, path, "block_abort");
 }
+
 /// Removes unreachable basic blocks
-fn remove_block(file: &mut Vec<String>, path: &PathBuf) {
+fn remove_block(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
     let mut curr = 0;
-    let mut cache = None;
+
     // Next, we try to outright remove blocks.
     while curr < file.len() {
         let Some(block_starts) = file[curr..]
@@ -215,15 +242,15 @@ fn remove_block(file: &mut Vec<String>, path: &PathBuf) {
             break;
         };
         let block_ends = block_starts + block_ends + 1;
-        // Large blocks are likely to be neccsarry.
+        // Large blocks are likely to be necessary.
         if block_ends - block_starts > 6 {
             curr = block_starts + 1;
             continue;
         }
         let mut file_copy = file.clone();
         file_copy.drain(block_starts..block_ends);
-        if test_reduction(&file_copy, &path, &mut cache) {
-            eprintln!("Reduced {path:?} by {} lines `remove_blocks`", block_ends - block_starts);
+        if test_reduction(&file_copy, &path, cache) {
+            println!("Reduced {path:?} by {} lines `remove_blocks`", block_ends - block_starts);
             *file = file_copy;
             curr = block_starts;
         } else {
@@ -232,10 +259,11 @@ fn remove_block(file: &mut Vec<String>, path: &PathBuf) {
     }
     save_reduction(file, path, "remove_block");
 }
+
 /// Merges blocks ending with unconditional jumps.
-fn linearize_cf(file: &mut Vec<String>, path: &PathBuf) {
+fn linearize_cf(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
     let mut curr = 0;
-    let mut cache = None;
+
     // Next, we try to linearize the control flow. What the does that mean?
     // Given a sequence like this:
     // Goto(bb22)
@@ -268,8 +296,8 @@ fn linearize_cf(file: &mut Vec<String>, path: &PathBuf) {
         file_copy.remove(block_starts - 2);
         file_copy.remove(block_starts - 2);
         // Check if this reduction is valid.
-        if test_reduction(&file_copy, &path, &mut cache) {
-            eprintln!("Reduced {path:?} by 3 lines `linearize_cf`");
+        if test_reduction(&file_copy, &path, cache) {
+            println!("Reduced {path:?} by 3 lines `linearize_cf`");
             *file = file_copy;
             curr = block_starts;
         } else {
@@ -278,6 +306,93 @@ fn linearize_cf(file: &mut Vec<String>, path: &PathBuf) {
     }
     save_reduction(file, path, "linearize_cf");
 }
+
+/// Replaces a call to a given function with a 0 assignment to the destination place, and a Goto.
+/// This is always sound, because:
+/// 1. All the functions arguments are always initialized
+/// 2. and point to initialized  memory(the operand of &raw must be an initialized place in rustlantis).
+fn remove_fn_calls(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
+    let mut curr = 0;
+
+    while curr < file.len() {
+        let Some(fn_call) =
+            file[curr..].iter().position(|line| line.contains("Call(") && line.contains(" = fn"))
+        else {
+            // No more calls to remove - exit early.
+            break;
+        };
+        let fn_call = fn_call + curr;
+        let line = file[fn_call].trim();
+        // Skip the Call(
+        let line = &line["Call(".len()..];
+        // Extract the destination place
+        let Some((place, line)) = line.split_once('=') else {
+            curr = fn_call + 1;
+            continue;
+        };
+        // Skip till the return block id.
+        let Some((_, line)) = line.split_once("ReturnTo(") else {
+            curr = fn_call + 1;
+            continue;
+        };
+        // Extract the full return block
+        let Some((block, _)) = line.split_once(')') else {
+            curr = fn_call + 1;
+            continue;
+        };
+        let mut file_copy = file.clone();
+        // Remove the call.
+        file_copy.remove(fn_call);
+        file_copy.insert(fn_call, format!("Goto({block})\n"));
+        file_copy.insert(fn_call, format!("{place} = 0;\n"));
+        // Check if this reduction is valid.
+        if test_reduction(&file_copy, &path, cache) {
+            println!("Reduced {path:?} using `remove_fn_calls` {cache:?}");
+            *file = file_copy;
+            curr = fn_call;
+        } else {
+            curr = fn_call + 1;
+        }
+    }
+    save_reduction(file, path, "remove_fn_calls");
+}
+
+/// Fully removes unreachable functions.
+fn remove_fns(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
+    let mut curr = 0;
+
+    while curr < file.len() {
+        // Find a function start
+        let Some(fn_start) = file[curr..].iter().position(|line| {
+            line.contains("#[custom_mir(dialect = \"runtime\", phase = \"initial\")]")
+        }) else {
+            // No more functions to remove - exit early.
+            break;
+        };
+        // Find the next function(and use that to find the end of this one).
+        // FIXME: this check is flawed: it will never remove the very last function(the one before main).
+        // The other checks will turn that function into a single call to abort, but it is still annoying that it is kept.
+        let fn_start = fn_start + curr;
+        let Some(fn_end) = file[(fn_start + 3)..].iter().position(|line| line.contains("fn fn"))
+        else {
+            // No more functions to remove - exit early.
+            break;
+        };
+        let fn_end = fn_start + 2 + fn_end;
+        let mut file_copy = file.clone();
+        // Remove the function.\\
+        file_copy.drain(fn_start..fn_end);
+        // Check if this reduction is valid.
+        if test_reduction(&file_copy, &path, cache) {
+            println!("Reduced {path:?} by {} lines `remove_fns`", fn_end - fn_start);
+            *file = file_copy;
+        } else {
+            curr = fn_start + 1;
+        }
+    }
+    save_reduction(file, path, "remove_fns");
+}
+
 pub(super) fn reduce(path: impl AsRef<Path>) {
     let path = path.as_ref().to_owned();
     // ... read the file to a buffer ..
@@ -285,21 +400,32 @@ pub(super) fn reduce(path: impl AsRef<Path>) {
     let mut file: Vec<_> = file.split_inclusive('\n').map(|s| s.to_string()).collect();
 
     // ... and run reduction passes.
-    eprintln!("running `remove_dump_var` on {path:?}.");
+    println!("running `remove_dump_var` on {path:?}.");
     remove_dump_var(&mut file, &path);
-    let len = file.len();
+    // After `dump_var`, the execution results ought not to change. Cache them.
     let mut cache = None;
-    eprintln!("running `remove_dup_assign` on {path:?}.");
+    // Fill the cache
+    assert!(
+        test_reduction(&file, &path, &mut cache),
+        "Reduction error: check that the input file is a valid reproducer."
+    );
+    println!("cache:{cache:?}");
+    println!("running `remove_fn_calls` on {path:?}.");
+    remove_fn_calls(&mut file, &path, &mut cache);
+    println!("running `remove_fns` on {path:?}.");
+    remove_fns(&mut file, &path, &mut cache);
+    let len = file.len();
+    println!("running `remove_dup_assign` on {path:?}.");
     remove_dup_assign(&mut file, &path, 0, len, &mut cache);
     file.retain(|line| !line.is_empty());
-    eprintln!("running `match_to_goto` on {path:?}.");
-    match_to_goto(&mut file, &path);
-    eprintln!("running `block_abort` on {path:?}.");
-    block_abort(&mut file, &path);
-    eprintln!("running `remove_block` on {path:?}.");
-    remove_block(&mut file, &path);
-    eprintln!("running `linearize_cf` on {path:?}.");
-    linearize_cf(&mut file, &path);
+    println!("running `match_to_goto` on {path:?}.");
+    match_to_goto(&mut file, &path, &mut cache);
+    println!("running `block_abort` on {path:?}.");
+    block_abort(&mut file, &path, &mut cache);
+    println!("running `remove_block` on {path:?}.");
+    remove_block(&mut file, &path, &mut cache);
+    println!("running `linearize_cf` on {path:?}.");
+    linearize_cf(&mut file, &path, &mut cache);
     let mut out = std::fs::File::create(&path).expect("Could not save the reduction result.");
     for line in file {
         out.write_all(line.as_bytes());

From 72d99d070a587e220d056244fcdb0954d40195fc Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 13 Jun 2025 10:26:56 -0400
Subject: [PATCH 912/997] Add cspell config

---
 .cspell.json                             | 27 +++++++++
 tools/cspell_dicts/rust.txt              |  2 +
 tools/cspell_dicts/rustc_codegen_gcc.txt | 75 ++++++++++++++++++++++++
 3 files changed, 104 insertions(+)
 create mode 100644 .cspell.json
 create mode 100644 tools/cspell_dicts/rust.txt
 create mode 100644 tools/cspell_dicts/rustc_codegen_gcc.txt

diff --git a/.cspell.json b/.cspell.json
new file mode 100644
index 000000000000..388ccce2b091
--- /dev/null
+++ b/.cspell.json
@@ -0,0 +1,27 @@
+{
+    "allowCompoundWords": true,
+    "dictionaries": ["cpp", "rust-extra", "rustc_codegen_gcc"],
+    "dictionaryDefinitions": [
+        {
+            "name": "rust-extra",
+            "path": "tools/cspell_dicts/rust.txt",
+            "addWords": true
+        },
+        {
+            "name": "rustc_codegen_gcc",
+            "path": "tools/cspell_dicts/rustc_codegen_gcc.txt",
+            "addWords": true
+        }
+    ],
+    "files": [
+        "src/**/*.rs"
+    ],
+    "ignorePaths": [
+        "src/intrinsic/archs.rs",
+        "src/intrinsic/llvm.rs"
+    ],
+    "ignoreRegExpList": [
+        "/(FIXME|NOTE|TODO)\\([^)]+\\)/",
+        "__builtin_\\w*"
+    ]
+}
diff --git a/tools/cspell_dicts/rust.txt b/tools/cspell_dicts/rust.txt
new file mode 100644
index 000000000000..379cbd77eef0
--- /dev/null
+++ b/tools/cspell_dicts/rust.txt
@@ -0,0 +1,2 @@
+lateout
+repr
diff --git a/tools/cspell_dicts/rustc_codegen_gcc.txt b/tools/cspell_dicts/rustc_codegen_gcc.txt
new file mode 100644
index 000000000000..31023e50ffa1
--- /dev/null
+++ b/tools/cspell_dicts/rustc_codegen_gcc.txt
@@ -0,0 +1,75 @@
+aapcs
+addo
+archs
+ashl
+ashr
+cgcx
+clzll
+cmse
+codegened
+csky
+ctlz
+ctpop
+cttz
+ctzll
+flto
+fmaximumf
+fmuladd
+fmuladdf
+fminimumf
+fmul
+fptosi
+fptosui
+fptoui
+fwrapv
+gimple
+hrtb
+immediates
+liblto
+llbb
+llcx
+llextra
+llfn
+lgcc
+llmod
+llresult
+llret
+ltrans
+llty
+llval
+llvals
+loong
+lshr
+masm
+maximumf
+maxnumf
+mavx
+mcmodel
+minimumf
+minnumf
+monomorphization
+monomorphizations
+monomorphized
+monomorphizing
+movnt
+mulo
+nvptx
+pointee
+powitf
+reassoc
+riscv
+rlib
+roundevenf
+rustc
+sitofp
+sizet
+spir
+subo
+sysv
+tbaa
+uitofp
+unord
+uninlined
+utrunc
+xabort
+zext

From 2abdea9293bedf65acc94f977a9b61d0d989183b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 13 Jun 2025 10:27:21 -0400
Subject: [PATCH 913/997] Fix spelling mistakes or ignore spell checking some
 parts of code

---
 src/asm.rs            |  6 ++++--
 src/back/lto.rs       |  3 ++-
 src/back/write.rs     |  2 ++
 src/builder.rs        |  4 ++--
 src/callee.rs         |  4 ++--
 src/context.rs        |  4 ++--
 src/gcc_util.rs       |  2 ++
 src/int.rs            |  6 ++++++
 src/intrinsic/mod.rs  | 12 ++++++------
 src/intrinsic/simd.rs |  4 +++-
 src/lib.rs            |  9 +++++++--
 11 files changed, 38 insertions(+), 18 deletions(-)

diff --git a/src/asm.rs b/src/asm.rs
index e04512ebd540..17e2e028b16f 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -1,3 +1,5 @@
+// cSpell:ignoreRegExp [afkspqvwy]reg
+
 use std::borrow::Cow;
 
 use gccjit::{LValue, RValue, ToRValue, Type};
@@ -138,7 +140,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         // `outputs.len() + inputs.len()`.
         let mut labels = vec![];
 
-        // Clobbers collected from `out("explicit register") _` and `inout("expl_reg") var => _`
+        // Clobbers collected from `out("explicit register") _` and `inout("explicit_reg") var => _`
         let mut clobbers = vec![];
 
         // We're trying to preallocate space for the template
@@ -203,7 +205,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                                 // is also used as an in register, do not add it to the clobbers list.
                                 // it will be treated as a lateout register with `out_place: None`
                                 if !late {
-                                    bug!("input registers can only be used as lateout regisers");
+                                    bug!("input registers can only be used as lateout registers");
                                 }
                                 ("r", dummy_output_type(self.cx, reg.reg_class()))
                             } else {
diff --git a/src/back/lto.rs b/src/back/lto.rs
index e9c87f357793..10fce860b777 100644
--- a/src/back/lto.rs
+++ b/src/back/lto.rs
@@ -11,11 +11,12 @@
 // does not remove it?
 //
 // TODO(antoyo): for performance, check which optimizations the C++ frontend enables.
-//
+// cSpell:disable
 // Fix these warnings:
 // /usr/bin/ld: warning: type of symbol `_RNvNvNvNtCs5JWOrf9uCus_5rayon11thread_pool19WORKER_THREAD_STATE7___getit5___KEY' changed from 1 to 6 in /tmp/ccKeUSiR.ltrans0.ltrans.o
 // /usr/bin/ld: warning: type of symbol `_RNvNvNvNvNtNtNtCsAj5i4SGTR7_3std4sync4mpmc5waker17current_thread_id5DUMMY7___getit5___KEY' changed from 1 to 6 in /tmp/ccKeUSiR.ltrans0.ltrans.o
 // /usr/bin/ld: warning: incremental linking of LTO and non-LTO objects; using -flinker-output=nolto-rel which will bypass whole program optimization
+// cSpell:enable
 use std::ffi::{CStr, CString};
 use std::fs::{self, File};
 use std::path::{Path, PathBuf};
diff --git a/src/back/write.rs b/src/back/write.rs
index 09e955acf390..d03d063bdace 100644
--- a/src/back/write.rs
+++ b/src/back/write.rs
@@ -186,6 +186,7 @@ pub(crate) fn codegen(
 
                     if fat_lto {
                         let lto_path = format!("{}.lto", path);
+                        // cSpell:disable
                         // FIXME(antoyo): The LTO frontend generates the following warning:
                         // ../build_sysroot/sysroot_src/library/core/src/num/dec2flt/lemire.rs:150:15: warning: type of ‘_ZN4core3num7dec2flt5table17POWER_OF_FIVE_12817ha449a68fb31379e4E’ does not match original declaration [-Wlto-type-mismatch]
                         // 150 |     let (lo5, hi5) = POWER_OF_FIVE_128[index];
@@ -193,6 +194,7 @@ pub(crate) fn codegen(
                         // lto1: note: ‘_ZN4core3num7dec2flt5table17POWER_OF_FIVE_12817ha449a68fb31379e4E’ was previously declared here
                         //
                         // This option is to mute it to make the UI tests pass with LTO enabled.
+                        // cSpell:enable
                         context.add_driver_option("-Wno-lto-type-mismatch");
                         // NOTE: this doesn't actually generate an executable. With the above
                         // flags, it combines the .o files together in another .o.
diff --git a/src/builder.rs b/src/builder.rs
index 2ce1a31bebc2..b426219a8097 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1034,13 +1034,13 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             let b_offset = a.size(self).align_to(b.align(self).abi);
 
             let mut load = |i, scalar: &abi::Scalar, align| {
-                let llptr = if i == 0 {
+                let ptr = if i == 0 {
                     place.val.llval
                 } else {
                     self.inbounds_ptradd(place.val.llval, self.const_usize(b_offset.bytes()))
                 };
                 let llty = place.layout.scalar_pair_element_gcc_type(self, i);
-                let load = self.load(llty, llptr, align);
+                let load = self.load(llty, ptr, align);
                 scalar_load_metadata(self, load, scalar);
                 if scalar.is_bool() { self.trunc(load, self.type_i1()) } else { load }
             };
diff --git a/src/callee.rs b/src/callee.rs
index c8130b7c0106..189ac7cd7792 100644
--- a/src/callee.rs
+++ b/src/callee.rs
@@ -34,7 +34,7 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
         unreachable!();
         /*
         // Create a fn pointer with the new signature.
-        let ptrty = fn_abi.ptr_to_gcc_type(cx);
+        let ptrtype = fn_abi.ptr_to_gcc_type(cx);
 
         // This is subtle and surprising, but sometimes we have to bitcast
         // the resulting fn pointer.  The reason has to do with external
@@ -59,7 +59,7 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
         // This can occur on either a crate-local or crate-external
         // reference. It also occurs when testing libcore and in some
         // other weird situations. Annoying.
-        if cx.val_ty(func) != ptrty {
+        if cx.val_ty(func) != ptrtype {
             // TODO(antoyo): cast the pointer.
             func
         }
diff --git a/src/context.rs b/src/context.rs
index 51c2be85d518..8a2bf654ed2b 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -443,8 +443,8 @@ impl<'gcc, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         // `rust_eh_personality` function, but rather we wired it up to the
         // CRT's custom personality function, which forces LLVM to consider
         // landing pads as "landing pads for SEH".
-        if let Some(llpersonality) = self.eh_personality.get() {
-            return llpersonality;
+        if let Some(personality_func) = self.eh_personality.get() {
+            return personality_func;
         }
         let tcx = self.tcx;
         let func = match tcx.lang_items().eh_personality() {
diff --git a/src/gcc_util.rs b/src/gcc_util.rs
index 2b053abdd190..7d2289450436 100644
--- a/src/gcc_util.rs
+++ b/src/gcc_util.rs
@@ -150,6 +150,7 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
 // To find a list of GCC's names, check https://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html
 pub fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]> {
     let arch = if sess.target.arch == "x86_64" { "x86" } else { &*sess.target.arch };
+    // cSpell:disable
     match (arch, s) {
         // FIXME: seems like x87 does not exist?
         ("x86", "x87") => smallvec![],
@@ -188,6 +189,7 @@ pub fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]>
         ("aarch64", "sve2-bitperm") => smallvec!["sve2-bitperm", "neon"],
         (_, s) => smallvec![s],
     }
+    // cSpell:enable
 }
 
 fn arch_to_gcc(name: &str) -> &str {
diff --git a/src/int.rs b/src/int.rs
index fed96e5eb8c0..a888d20e10aa 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -2,6 +2,8 @@
 //! This module exists because some integer types are not supported on some gcc platforms, e.g.
 //! 128-bit integers on 32-bit platforms and thus require to be handled manually.
 
+// cSpell:words cmpti divti modti mulodi muloti udivti umodti
+
 use gccjit::{BinaryOp, ComparisonOp, FunctionType, Location, RValue, ToRValue, Type, UnaryOp};
 use rustc_abi::{Endian, ExternAbi};
 use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
@@ -913,9 +915,11 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
         debug_assert!(value_type.dyncast_array().is_some());
         let name_suffix = match self.type_kind(dest_typ) {
+            // cSpell:disable
             TypeKind::Float => "tisf",
             TypeKind::Double => "tidf",
             TypeKind::FP128 => "titf",
+            // cSpell:enable
             kind => panic!("cannot cast a non-native integer to type {:?}", kind),
         };
         let sign = if signed { "" } else { "un" };
@@ -957,8 +961,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
         debug_assert!(dest_typ.dyncast_array().is_some());
         let name_suffix = match self.type_kind(value_type) {
+            // cSpell:disable
             TypeKind::Float => "sfti",
             TypeKind::Double => "dfti",
+            // cSpell:enable
             kind => panic!("cannot cast a {:?} to non-native integer", kind),
         };
         let sign = if signed { "" } else { "uns" };
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index acecab35d724..ba85bc2beff7 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -643,7 +643,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
 
     fn type_checked_load(
         &mut self,
-        _llvtable: Self::Value,
+        _vtable: Self::Value,
         _vtable_byte_offset: u64,
         _typeid: Self::Value,
     ) -> Self::Value {
@@ -750,23 +750,23 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
                 // We instead thus allocate some scratch space...
                 let scratch_size = cast.size(bx);
                 let scratch_align = cast.align(bx);
-                let llscratch = bx.alloca(scratch_size, scratch_align);
-                bx.lifetime_start(llscratch, scratch_size);
+                let scratch = bx.alloca(scratch_size, scratch_align);
+                bx.lifetime_start(scratch, scratch_size);
 
                 // ... where we first store the value...
-                bx.store(val, llscratch, scratch_align);
+                bx.store(val, scratch, scratch_align);
 
                 // ... and then memcpy it to the intended destination.
                 bx.memcpy(
                     dst.val.llval,
                     self.layout.align.abi,
-                    llscratch,
+                    scratch,
                     scratch_align,
                     bx.const_usize(self.layout.size.bytes()),
                     MemFlags::empty(),
                 );
 
-                bx.lifetime_end(llscratch, scratch_size);
+                bx.lifetime_end(scratch, scratch_size);
             }
         } else {
             OperandValue::Immediate(val).store(bx, dst);
diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index b897d0792491..d087bcba5234 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -1086,7 +1086,9 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         let (_, element_ty1) = arg_tys[1].simd_size_and_type(bx.tcx());
         let (_, element_ty2) = arg_tys[2].simd_size_and_type(bx.tcx());
         let (pointer_count, underlying_ty) = match *element_ty1.kind() {
-            ty::RawPtr(p_ty, mutbl) if p_ty == in_elem && mutbl == hir::Mutability::Mut => {
+            ty::RawPtr(p_ty, mutability)
+                if p_ty == in_elem && mutability == hir::Mutability::Mut =>
+            {
                 (ptr_count(element_ty1), non_ptr(element_ty1))
             }
             _ => {
diff --git a/src/lib.rs b/src/lib.rs
index 93c03fbaace8..746f5abae269 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -3,10 +3,12 @@
  * TODO(antoyo): support #[inline] attributes.
  * TODO(antoyo): support LTO (gcc's equivalent to Full LTO is -flto -flto-partition=one — https://documentation.suse.com/sbp/all/html/SBP-GCC-10/index.html).
  * For Thin LTO, this might be helpful:
+// cspell:disable-next-line
  * In gcc 4.6 -fwhopr was removed and became default with -flto. The non-whopr path can still be executed via -flto-partition=none.
  * Or the new incremental LTO (https://www.phoronix.com/news/GCC-Incremental-LTO-Patches)?
  *
- * Maybe some missing optizations enabled by rustc's LTO is in there: https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html
+ * Maybe some missing optimizations enabled by rustc's LTO is in there: https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html
+// cspell:disable-next-line
  * Like -fipa-icf (should be already enabled) and maybe -fdevirtualize-at-ltrans.
  * TODO: disable debug info always being emitted. Perhaps this slows down things?
  *
@@ -443,10 +445,11 @@ impl WriteBackendMethods for GccCodegenBackend {
     ) -> Result<ModuleCodegen<Self::Module>, FatalError> {
         back::write::link(cgcx, dcx, modules)
     }
+
     fn autodiff(
         _cgcx: &CodegenContext<Self>,
         _module: &ModuleCodegen<Self::Module>,
-        _diff_fncs: Vec<AutoDiffItem>,
+        _diff_functions: Vec<AutoDiffItem>,
         _config: &ModuleConfig,
     ) -> Result<(), FatalError> {
         unimplemented!()
@@ -507,12 +510,14 @@ fn target_config(sess: &Session, target_info: &LockedTargetInfo) -> TargetConfig
                     return false;
                 }
                 target_info.cpu_supports(feature)
+                // cSpell:disable
                 /*
                   adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512fp16, avx512ifma,
                   avx512pf, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpopcntdq,
                   bmi1, bmi2, cmpxchg16b, ermsb, f16c, fma, fxsr, gfni, lzcnt, movbe, pclmulqdq, popcnt, rdrand, rdseed, rtm,
                   sha, sse, sse2, sse3, sse4.1, sse4.2, sse4a, ssse3, tbm, vaes, vpclmulqdq, xsave, xsavec, xsaveopt, xsaves
                 */
+                // cSpell:enable
             })
             .map(Symbol::intern)
             .collect()

From 323432a9e0bf4cfd958d0ca8a8c9af8be9a03748 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 13 Jun 2025 10:28:31 -0400
Subject: [PATCH 914/997] Add the cspell action in the CI

---
 .github/workflows/ci.yml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index d8675755187c..8e6840e916e4 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -117,6 +117,7 @@ jobs:
     steps:
       - uses: actions/checkout@v4
       - uses: crate-ci/typos@v1.32.0
+      - uses: streetsidesoftware/cspell-action@v7
 
   build_system:
     runs-on: ubuntu-24.04

From 3f1e4739acc5fa0ab78ef0a491b6eabea0341165 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 13 Jun 2025 15:24:29 -0400
Subject: [PATCH 915/997] Remove tests that pass

---
 tests/failing-ui-tests.txt | 42 ++++++--------------------------------
 1 file changed, 6 insertions(+), 36 deletions(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 8b736fb5d4e6..2baec427ce5e 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -1,26 +1,12 @@
 tests/ui/allocator/no_std-alloc-error-handler-custom.rs
 tests/ui/allocator/no_std-alloc-error-handler-default.rs
 tests/ui/asm/may_unwind.rs
-tests/ui/functions-closures/parallel-codegen-closures.rs
-tests/ui/linkage-attr/linkage1.rs
-tests/ui/lto/dylib-works.rs
-tests/ui/sepcomp/sepcomp-cci.rs
-tests/ui/sepcomp/sepcomp-extern.rs
-tests/ui/sepcomp/sepcomp-fns-backwards.rs
-tests/ui/sepcomp/sepcomp-fns.rs
-tests/ui/sepcomp/sepcomp-statics.rs
 tests/ui/asm/x86_64/may_unwind.rs
-tests/ui/panics/catch-unwind-bang.rs
 tests/ui/drop/dynamic-drop-async.rs
 tests/ui/cfg/cfg-panic-abort.rs
-tests/ui/drop/repeat-drop.rs
-tests/ui/coroutine/panic-drops-resume.rs
-tests/ui/fmt/format-args-capture.rs
-tests/ui/coroutine/panic-drops.rs
 tests/ui/intrinsics/panic-uninitialized-zeroed.rs
 tests/ui/iterators/iter-sum-overflow-debug.rs
 tests/ui/iterators/iter-sum-overflow-overflow-checks.rs
-tests/ui/mir/mir_calls_to_shims.rs
 tests/ui/mir/mir_drop_order.rs
 tests/ui/mir/mir_let_chains_drop_order.rs
 tests/ui/oom_unwind.rs
@@ -31,27 +17,15 @@ tests/ui/unwind-no-uwtable.rs
 tests/ui/parser/unclosed-delimiter-in-dep.rs
 tests/ui/consts/missing_span_in_backtrace.rs
 tests/ui/drop/dynamic-drop.rs
-tests/ui/issues/issue-43853.rs
-tests/ui/issues/issue-47364.rs
-tests/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
-tests/ui/rfcs/rfc-1857-stabilize-drop-order/drop-order.rs
 tests/ui/rfcs/rfc-2091-track-caller/std-panic-locations.rs
 tests/ui/simd/issue-17170.rs
 tests/ui/simd/issue-39720.rs
-tests/ui/alloc-error/default-alloc-error-hook.rs
-tests/ui/coroutine/panic-safe.rs
 tests/ui/issues/issue-14875.rs
 tests/ui/issues/issue-29948.rs
-tests/ui/panics/nested_panic_caught.rs
 tests/ui/process/println-with-broken-pipe.rs
 tests/ui/lto/thin-lto-inlines2.rs
-tests/ui/lto/weak-works.rs
-tests/ui/panic-runtime/lto-abort.rs 
-tests/ui/lto/thin-lto-inlines.rs
-tests/ui/lto/thin-lto-global-allocator.rs
-tests/ui/lto/msvc-imp-present.rs
+tests/ui/panic-runtime/lto-abort.rs
 tests/ui/lto/lto-thin-rustc-loads-linker-plugin.rs
-tests/ui/lto/all-crates.rs
 tests/ui/async-await/deep-futures-are-freeze.rs
 tests/ui/coroutine/resume-after-return.rs
 tests/ui/simd/masked-load-store.rs
@@ -59,15 +33,11 @@ tests/ui/simd/repr_packed.rs
 tests/ui/async-await/in-trait/dont-project-to-specializable-projection.rs
 tests/ui/consts/try-operator.rs
 tests/ui/coroutine/unwind-abort-mix.rs
-tests/ui/type-alias-impl-trait/rpit_tait_equality_in_canonical_query.rs
-tests/ui/impl-trait/equality-in-canonical-query.rs
 tests/ui/consts/issue-miri-1910.rs
-tests/ui/mir/mir_heavy_promoted.rs
 tests/ui/consts/const_cmp_type_id.rs
 tests/ui/consts/issue-73976-monomorphic.rs
 tests/ui/consts/issue-94675.rs
 tests/ui/traits/const-traits/const-drop-fail.rs
-tests/ui/traits/const-traits/const-drop.rs
 tests/ui/runtime/on-broken-pipe/child-processes.rs
 tests/ui/sanitizer/cfi/assoc-ty-lifetime-issue-123053.rs
 tests/ui/sanitizer/cfi/async-closures.rs
@@ -85,14 +55,10 @@ tests/ui/sanitizer/cfi/can-reveal-opaques.rs
 tests/ui/sanitizer/kcfi-mangling.rs
 tests/ui/statics/const_generics.rs
 tests/ui/backtrace/dylib-dep.rs
-tests/ui/errors/pic-linker.rs
 tests/ui/delegation/fn-header.rs
 tests/ui/consts/zst_no_llvm_alloc.rs
 tests/ui/consts/const-eval/parse_ints.rs
-tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
 tests/ui/simd/intrinsic/generic-as.rs
-tests/ui/backtrace/backtrace.rs
-tests/ui/lifetimes/tail-expr-lock-poisoning.rs
 tests/ui/runtime/rt-explody-panic-payloads.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/inline1.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/inline2.rs
@@ -108,5 +74,9 @@ tests/ui/codegen/equal-pointers-unequal/strict-provenance/segfault.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/zero.rs
 tests/ui/simd/simd-bitmask-notpow2.rs
 tests/ui/codegen/StackColoring-not-blowup-stack-issue-40883.rs
-tests/ui/uninhabited/uninhabited-transparent-return-abi.rs
 tests/ui/numbers-arithmetic/u128-as-f32.rs
+tests/ui/lto/all-crates.rs
+tests/ui/uninhabited/uninhabited-transparent-return-abi.rs
+tests/ui/coroutine/panic-drops-resume.rs
+tests/ui/coroutine/panic-drops.rs
+tests/ui/coroutine/panic-safe.rs

From efc88151ba212eba76d731d92ebfb46fa5168176 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 13 Jun 2025 15:49:37 -0400
Subject: [PATCH 916/997] Fix to make the test zst_no_llvm_alloc pass

---
 src/common.rs              | 13 +++++++++++++
 src/consts.rs              |  2 +-
 tests/failing-ui-tests.txt |  1 -
 3 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/src/common.rs b/src/common.rs
index 65f4788d9021..58ff2f1f8f06 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -265,6 +265,19 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
                 let alloc_id = prov.alloc_id();
                 let base_addr = match self.tcx.global_alloc(alloc_id) {
                     GlobalAlloc::Memory(alloc) => {
+                        // For ZSTs directly codegen an aligned pointer.
+                        // This avoids generating a zero-sized constant value and actually needing a
+                        // real address at runtime.
+                        if alloc.inner().len() == 0 {
+                            assert_eq!(offset.bytes(), 0);
+                            let val = self.const_usize(alloc.inner().align.bytes());
+                            return if matches!(layout.primitive(), Pointer(_)) {
+                                self.context.new_cast(None, val, ty)
+                            } else {
+                                self.const_bitcast(val, ty)
+                            };
+                        }
+
                         let init = self.const_data_from_alloc(alloc);
                         let alloc = alloc.inner();
                         let value = match alloc.mutability {
diff --git a/src/consts.rs b/src/consts.rs
index 73d3beede7f6..b52a1f782cbc 100644
--- a/src/consts.rs
+++ b/src/consts.rs
@@ -330,7 +330,7 @@ pub(crate) fn const_alloc_to_gcc_uncached<'gcc>(
             // and we properly interpret the provenance as a relocation pointer offset.
             alloc.inspect_with_uninit_and_ptr_outside_interpreter(offset..(offset + pointer_size)),
         )
-        .expect("const_alloc_to_llvm: could not read relocation pointer")
+        .expect("const_alloc_to_gcc_uncached: could not read relocation pointer")
             as u64;
 
         let address_space = cx.tcx.global_alloc(alloc_id).address_space(cx);
diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 2baec427ce5e..d931f0d3b5eb 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -56,7 +56,6 @@ tests/ui/sanitizer/kcfi-mangling.rs
 tests/ui/statics/const_generics.rs
 tests/ui/backtrace/dylib-dep.rs
 tests/ui/delegation/fn-header.rs
-tests/ui/consts/zst_no_llvm_alloc.rs
 tests/ui/consts/const-eval/parse_ints.rs
 tests/ui/simd/intrinsic/generic-as.rs
 tests/ui/runtime/rt-explody-panic-payloads.rs

From 3812cf454d81831de8de73b1f7010b5067b00e5a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 13 Jun 2025 16:17:35 -0400
Subject: [PATCH 917/997] Reenable run-make tests

---
 build_system/src/test.rs | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index a209cb4b580b..4ce72f668885 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -1089,19 +1089,18 @@ where
 }
 
 fn test_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    //test_rustc_inner(env, args, |_| Ok(false), false, "run-make")?;
+    test_rustc_inner(env, args, |_| Ok(false), false, "run-make")?;
     test_rustc_inner(env, args, |_| Ok(false), false, "ui")
 }
 
 fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    let result1 = Ok(());
-    /*test_rustc_inner(
+    let result1 = test_rustc_inner(
         env,
         args,
         retain_files_callback("tests/failing-run-make-tests.txt", "run-make"),
         false,
         "run-make",
-    )*/
+    );
 
     let result2 = test_rustc_inner(
         env,
@@ -1122,14 +1121,13 @@ fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
         false,
         "ui",
     )?;
-    Ok(())
-    /*test_rustc_inner(
+    test_rustc_inner(
         env,
         args,
         remove_files_callback("tests/failing-run-make-tests.txt", "run-make"),
         false,
         "run-make",
-    )*/
+    )
 }
 
 fn test_failing_ui_pattern_tests(env: &Env, args: &TestArg) -> Result<(), String> {

From 033fa352272864e2cd625a07b48e9d536b204036 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 13 Jun 2025 16:38:25 -0400
Subject: [PATCH 918/997] Fix for run-make tests

---
 .github/workflows/ci.yml      | 6 +++++-
 .github/workflows/release.yml | 6 +++---
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 8e6840e916e4..53ecdfac3d10 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -12,6 +12,8 @@ permissions:
 env:
   # Enable backtraces for easier debugging
   RUST_BACKTRACE: 1
+  # For the run-make tests.
+  LLVM_BIN_DIR: /usr/bin
 
 jobs:
   build:
@@ -48,7 +50,9 @@ jobs:
 
     - name: Install packages
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
-      run: sudo apt-get install ninja-build ripgrep llvm-14-tools
+      run: sudo apt-get install ninja-build ripgrep llvm-14-tools llvm libstdc++6
+
+    - run: find / -name libstdc++.so | true
 
     - name: Install rustfmt & clippy
       run: rustup component add rustfmt clippy
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index b9c385b4231f..dc8543d0a524 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -12,6 +12,8 @@ permissions:
 env:
   # Enable backtraces for easier debugging
   RUST_BACKTRACE: 1
+  # For the run-make tests.
+  LLVM_BIN_DIR: /usr/bin
 
 jobs:
   build:
@@ -36,7 +38,7 @@ jobs:
       uses: Swatinem/rust-cache@v2
 
     - name: Install packages
-      run: sudo apt-get install ninja-build ripgrep
+      run: sudo apt-get install ninja-build ripgrep llvm libstdc++6
 
     - name: Download artifact
       run: curl -LO https://github.com/rust-lang/gcc/releases/latest/download/gcc-15.deb
@@ -49,8 +51,6 @@ jobs:
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-        
-        
 
     - name: Build
       run: |

From 3f0940628301acd58b0b1a267b28c1ca3e6240c8 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 13 Jun 2025 21:13:35 -0400
Subject: [PATCH 919/997] Add patch to fix a run-make test

---
 build_system/src/test.rs                      | 29 +++++++++++++++++--
 ...karound-to-make-a-run-make-test-pass.patch | 25 ++++++++++++++++
 2 files changed, 52 insertions(+), 2 deletions(-)
 create mode 100644 patches/tests/0001-Workaround-to-make-a-run-make-test-pass.patch

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 4ce72f668885..184cf997e8f4 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -9,8 +9,8 @@ use crate::build;
 use crate::config::{Channel, ConfigInfo};
 use crate::utils::{
     create_dir, get_sysroot_dir, get_toolchain, git_clone, git_clone_root_dir, remove_file,
-    run_command, run_command_with_env, run_command_with_output_and_env, rustc_version_info,
-    split_args, walk_dir,
+    run_command, run_command_with_env, run_command_with_output, run_command_with_output_and_env,
+    rustc_version_info, split_args, walk_dir,
 };
 
 type Env = HashMap<String, String>;
@@ -484,6 +484,31 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
     } else {
         run_command_with_output_and_env(&[&"git", &"checkout"], rust_dir, Some(env))?;
     }
+
+    let mut patches = Vec::new();
+    walk_dir(
+        "patches/tests",
+        &mut |_| Ok(()),
+        &mut |file_path: &Path| {
+            patches.push(file_path.to_path_buf());
+            Ok(())
+        },
+        false,
+    )?;
+    patches.sort();
+    // TODO: remove duplication with prepare.rs by creating a apply_patch function in the utils
+    // module.
+    for file_path in patches {
+        println!("[GIT] apply `{}`", file_path.display());
+        let path = Path::new("../..").join(file_path);
+        run_command_with_output(&[&"git", &"apply", &path], rust_dir)?;
+        run_command_with_output(&[&"git", &"add", &"-A"], rust_dir)?;
+        run_command_with_output(
+            &[&"git", &"commit", &"--no-gpg-sign", &"-m", &format!("Patch {}", path.display())],
+            rust_dir,
+        )?;
+    }
+
     let cargo = String::from_utf8(
         run_command_with_env(&[&"rustup", &"which", &"cargo"], rust_dir, Some(env))?.stdout,
     )
diff --git a/patches/tests/0001-Workaround-to-make-a-run-make-test-pass.patch b/patches/tests/0001-Workaround-to-make-a-run-make-test-pass.patch
new file mode 100644
index 000000000000..a329d09a95e5
--- /dev/null
+++ b/patches/tests/0001-Workaround-to-make-a-run-make-test-pass.patch
@@ -0,0 +1,25 @@
+From a131c69e54b5c02fe3b517e8f3ad23d4f784ffc8 Mon Sep 17 00:00:00 2001
+From: Antoni Boucher <bouanto@zoho.com>
+Date: Fri, 13 Jun 2025 20:25:33 -0400
+Subject: [PATCH] Workaround to make a run-make test pass
+
+---
+ tests/run-make/linker-warning/rmake.rs | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/tests/run-make/linker-warning/rmake.rs b/tests/run-make/linker-warning/rmake.rs
+index bc21739fefc..0946a7e2a48 100644
+--- a/tests/run-make/linker-warning/rmake.rs
++++ b/tests/run-make/linker-warning/rmake.rs
+@@ -55,7 +55,7 @@ fn main() {
+         diff()
+             .expected_file("short-error.txt")
+             .actual_text("(linker error)", out.stderr())
+-            .normalize(r#"/rustc[^/]*/"#, "/rustc/")
++            .normalize(r#"/tmp/rustc[^/]*/"#, "/tmp/rustc/")
+             .normalize(
+                 regex::escape(run_make_support::build_root().to_str().unwrap()),
+                 "/build-root",
+-- 
+2.49.0
+

From 5bd2c804b0972158fda69cb3500024f1bfd4d0e7 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 14 Jun 2025 08:32:59 -0400
Subject: [PATCH 920/997] Fix for tests/run-make/no-builtins-attribute

---
 .github/workflows/ci.yml      | 2 ++
 .github/workflows/release.yml | 3 ++-
 build_system/src/test.rs      | 5 ++++-
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 53ecdfac3d10..ab46c73c0adb 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -52,6 +52,8 @@ jobs:
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
       run: sudo apt-get install ninja-build ripgrep llvm-14-tools llvm libstdc++6
 
+    - run: g++ -v
+
     - run: find / -name libstdc++.so | true
 
     - name: Install rustfmt & clippy
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index dc8543d0a524..a75c2910b804 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -38,7 +38,8 @@ jobs:
       uses: Swatinem/rust-cache@v2
 
     - name: Install packages
-      run: sudo apt-get install ninja-build ripgrep llvm libstdc++6
+      # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for run-make tests.
+      run: sudo apt-get install ninja-build ripgrep llvm-14-tools llvm libstdc++6
 
     - name: Download artifact
       run: curl -LO https://github.com/rust-lang/gcc/releases/latest/download/gcc-15.deb
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 184cf997e8f4..515303a67be1 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -534,7 +534,8 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
           which FileCheck-11 || \
           which FileCheck-12 || \
           which FileCheck-13 || \
-          which FileCheck-14",
+          which FileCheck-14 || \
+          which FileCheck",
         ],
         rust_dir,
         Some(env),
@@ -542,6 +543,8 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
         Ok(cmd) => String::from_utf8_lossy(&cmd.stdout).to_string(),
         Err(_) => {
             eprintln!("Failed to retrieve LLVM FileCheck, ignoring...");
+            // FIXME: the test tests/run-make/no-builtins-attribute will fail if we cannot find
+            // FileCheck.
             String::new()
         }
     };

From ed441b64ede18d483c65a6376e7bde8dea94294f Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Sat, 14 Jun 2025 20:53:01 +0200
Subject: [PATCH 921/997] Added support for testing the backend with abi-cafe

---
 build_system/src/abi_test.rs | 62 ++++++++++++++++++++++++++++++++++++
 build_system/src/main.rs     |  8 +++--
 2 files changed, 68 insertions(+), 2 deletions(-)
 create mode 100644 build_system/src/abi_test.rs

diff --git a/build_system/src/abi_test.rs b/build_system/src/abi_test.rs
new file mode 100644
index 000000000000..421bc387ce84
--- /dev/null
+++ b/build_system/src/abi_test.rs
@@ -0,0 +1,62 @@
+use std::ffi::OsStr;
+use std::path::Path;
+
+use crate::utils::run_command_with_output;
+
+fn show_usage() {
+    println!(
+        r#"
+`abi-test` command help:
+    --help                 : Show this help"#
+    );
+}
+
+pub fn run() -> Result<(), String> {
+    let mut args = std::env::args().skip(2);
+    while let Some(arg) = args.next() {
+        match arg.as_str() {
+            "--help" => {
+                show_usage();
+                return Ok(());
+            }
+            _ => return Err(format!("Unknown option {}", arg)),
+        }
+    }
+    // Ensure that we have a cloned version of abi-cafe on hand.
+    crate::utils::git_clone(
+        "https://github.com/Gankra/abi-cafe.git",
+        Some("clones/abi-cafe".as_ref()),
+        true,
+    )
+    .map_err(|err| (format!("Git clone failed with message: {err:?}!")))?;
+    // Configure abi-cafe to use the exact same rustc version we use - this is crucial.
+    // Otherwise, the concept of ABI compatibility becomes meanignless.
+    std::fs::copy("rust-toolchain", "clones/abi-cafe/rust-toolchain")
+        .expect("Could not copy toolchain configs!");
+    // Get the backend path.
+    // We will use the *debug* build of the backend - it has more checks enabled.
+    let backend_path = std::path::absolute("target/debug/librustc_codegen_gcc.so").unwrap();
+    let backend_arg = format!("--add-rustc-codegen-backend=cg_gcc:{}", backend_path.display());
+    // Run ABI cafe using cargo.
+    let cmd: &[&dyn AsRef<OsStr>] = &[
+        &"cargo",
+        &"run",
+        &"--release",
+        &"--",
+        &backend_arg,
+        // Test rust-LLVM to Rust-GCC calls
+        &"--pairs",
+        &"rustc_calls_cg_gcc",
+        &"--pairs",
+        &"cg_gcc_calls_rustc",
+        // Test Rust-GCC to C calls
+        &"--pairs",
+        &"cg_gcc_calls_c",
+        &"--pairs",
+        &"c_calls_cg_gcc",
+    ];
+    // Run ABI cafe.
+    run_command_with_output(cmd, Some(&Path::new("clones/abi-cafe")))?;
+
+    Ok(())
+}
diff --git a/build_system/src/main.rs b/build_system/src/main.rs
index 078a4726ba80..ae975c94fff2 100644
--- a/build_system/src/main.rs
+++ b/build_system/src/main.rs
@@ -1,5 +1,6 @@
 use std::{env, process};
 
+mod abi_test;
 mod build;
 mod clean;
 mod clone_gcc;
@@ -12,7 +13,6 @@ mod rust_tools;
 mod rustc_info;
 mod test;
 mod utils;
-
 const BUILD_DIR: &str = "build";
 
 macro_rules! arg_error {
@@ -44,7 +44,8 @@ Commands:
         info      : Displays information about the build environment and project configuration.
         clone-gcc : Clones the GCC compiler from a specified source.
         fmt       : Runs rustfmt
-        fuzz      : Fuzzes `cg_gcc` using rustlantis"
+        fuzz      : Fuzzes `cg_gcc` using rustlantis
+        abi-test   : Runs the abi-cafe test suite on the codegen, checking for ABI compatibility with LLVM"
     );
 }
 
@@ -59,6 +60,7 @@ pub enum Command {
     Info,
     Fmt,
     Fuzz,
+    AbiTest,
 }
 
 fn main() {
@@ -77,6 +79,7 @@ fn main() {
         Some("test") => Command::Test,
         Some("info") => Command::Info,
         Some("clone-gcc") => Command::CloneGcc,
+        Some("abi-test") => Command::AbiTest,
         Some("fmt") => Command::Fmt,
         Some("fuzz") => Command::Fuzz,
         Some("--help") => {
@@ -102,6 +105,7 @@ fn main() {
         Command::CloneGcc => clone_gcc::run(),
         Command::Fmt => fmt::run(),
         Command::Fuzz => fuzz::run(),
+        Command::AbiTest => abi_test::run(),
     } {
         eprintln!("Command failed to run: {e}");
         process::exit(1);

From 735a6d3a50d422cb2cd4b1a6275481c6ae393834 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 14 Jun 2025 11:52:19 -0400
Subject: [PATCH 922/997] Switch to gcc-14 by default to fix some run-make
 tests

---
 .github/workflows/ci.yml      | 12 +++++++-----
 .github/workflows/release.yml |  8 +++++++-
 2 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index ab46c73c0adb..453e8b540134 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -50,11 +50,7 @@ jobs:
 
     - name: Install packages
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
-      run: sudo apt-get install ninja-build ripgrep llvm-14-tools llvm libstdc++6
-
-    - run: g++ -v
-
-    - run: find / -name libstdc++.so | true
+      run: sudo apt-get install ninja-build ripgrep llvm-14-tools llvm
 
     - name: Install rustfmt & clippy
       run: rustup component add rustfmt clippy
@@ -67,6 +63,12 @@ jobs:
           sudo dpkg --force-overwrite -i ${{ matrix.libgccjit_version.gcc }}
           echo 'gcc-path = "/usr/lib/"' > config.toml
 
+    # Some run-make tests fail if we use our forked GCC because it doesn't
+    # bundle libstdc++, so we switch to gcc-14 to have a GCC that has
+    # libstdc++.
+    - name: Set default GCC to gcc-14
+      run: sudo update-alternatives --install /usr/bin/cc cc /usr/bin/gcc-14 30
+
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index a75c2910b804..1d8eaf9a141f 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -39,7 +39,7 @@ jobs:
 
     - name: Install packages
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for run-make tests.
-      run: sudo apt-get install ninja-build ripgrep llvm-14-tools llvm libstdc++6
+      run: sudo apt-get install ninja-build ripgrep llvm-14-tools llvm
 
     - name: Download artifact
       run: curl -LO https://github.com/rust-lang/gcc/releases/latest/download/gcc-15.deb
@@ -49,6 +49,12 @@ jobs:
           sudo dpkg --force-overwrite -i gcc-15.deb
           echo 'gcc-path = "/usr/lib/"' > config.toml
 
+    # Some run-make tests fail if we use our forked GCC because it doesn't
+    # bundle libstdc++, so we switch to gcc-14 to have a GCC that has
+    # libstdc++.
+    - name: Set default GCC to gcc-14
+      run: sudo update-alternatives --install /usr/bin/cc cc /usr/bin/gcc-14 30
+
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV

From 9848c66a363043600670cba78a1221b6b80ed987 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 16 Jun 2025 14:23:45 +0200
Subject: [PATCH 923/997] Fix warnings

---
 build_system/src/fuzz/reduce.rs | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/build_system/src/fuzz/reduce.rs b/build_system/src/fuzz/reduce.rs
index 3c18c9555bd9..24d58b879edc 100644
--- a/build_system/src/fuzz/reduce.rs
+++ b/build_system/src/fuzz/reduce.rs
@@ -39,7 +39,6 @@ fn remove_dup_assign(
     ends: usize,
     cache: &mut ResultCache,
 ) {
-    let mut curr = 0;
     let mut file_copy = file.clone();
     let mut reduction_count = 0;
     // Not worth it.
@@ -427,7 +426,6 @@ pub(super) fn reduce(path: impl AsRef<Path>) {
     println!("running `linearize_cf` on {path:?}.");
     linearize_cf(&mut file, &path, &mut cache);
     let mut out = std::fs::File::create(&path).expect("Could not save the reduction result.");
-    for line in file {
-        out.write_all(line.as_bytes());
-    }
+    let file = file.into_iter().collect::<String>();
+    out.write_all(file.as_bytes()).expect("failed to write into file");
 }

From 05af962fa4457ca7a2b9e9a67bcec86ecb7344c2 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 16 Jun 2025 14:35:50 +0200
Subject: [PATCH 924/997] Fix warnings when not using the `master` feature

---
 src/builder.rs        | 6 +++---
 src/intrinsic/llvm.rs | 1 +
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index b426219a8097..2c5ae3fff7be 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -4,8 +4,8 @@ use std::convert::TryFrom;
 use std::ops::Deref;
 
 use gccjit::{
-    BinaryOp, Block, ComparisonOp, Context, Function, FunctionType, LValue, Location, RValue,
-    ToRValue, Type, UnaryOp,
+    BinaryOp, Block, ComparisonOp, Context, Function, LValue, Location, RValue, ToRValue, Type,
+    UnaryOp,
 };
 use rustc_abi as abi;
 use rustc_abi::{Align, HasDataLayout, Size, TargetDataLayout, WrappingRange};
@@ -785,7 +785,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
                 let f128_type = self.type_f128();
                 let fmodf128 = self.context.new_function(
                     None,
-                    FunctionType::Extern,
+                    gccjit::FunctionType::Extern,
                     f128_type,
                     &[
                         self.context.new_parameter(None, f128_type, "a"),
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 25a765f571fa..97b944281870 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1556,4 +1556,5 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
     func
 }
 
+#[cfg(feature = "master")]
 include!("archs.rs");

From 46c14b7b3ffe35c8c708cf141b379ea76364784c Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 16 Jun 2025 15:30:26 +0200
Subject: [PATCH 925/997] Run clippy correctly, run it on `build_system` as
 well and run it earlier

---
 .github/workflows/ci.yml | 21 ++++++++++++---------
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 453e8b540134..5c8e7d628169 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -82,9 +82,20 @@ jobs:
         #path: rust
         #key: ${{ runner.os }}-packages-${{ hashFiles('rust/.git/HEAD') }}
 
+    - name: Prepare
+      run: ./y.sh prepare --only-libcore
+
+    - name: Check formatting
+      run: ./y.sh fmt --check
+
+    - name: clippy
+      run: |
+        cargo clippy --all-targets -- -D warnings
+        cargo clippy --all-targets --no-default-features -- -D warnings
+        cargo clippy --manifest-path build_system/Cargo.toml --all-targets -- -D warnings
+
     - name: Build
       run: |
-        ./y.sh prepare --only-libcore
         ./y.sh build --sysroot
         ./y.sh test --cargo-tests
 
@@ -106,14 +117,6 @@ jobs:
       run: |
         ./y.sh test --release --clean --build-sysroot ${{ matrix.commands }}
 
-    - name: Check formatting
-      run: ./y.sh fmt --check
-
-    - name: clippy
-      run: |
-        cargo clippy --all-targets -- -D warnings
-        cargo clippy --all-targets --features master -- -D warnings
-
   duplicates:
     runs-on: ubuntu-24.04
     steps:

From fec46a44ba01a6e1df5c2e54621fcfc2b2f7d236 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 16 Jun 2025 15:34:09 +0200
Subject: [PATCH 926/997] Fix clippy lints

---
 build_system/src/build.rs       | 10 ++--
 build_system/src/clean.rs       |  4 +-
 build_system/src/clone_gcc.rs   |  6 +--
 build_system/src/config.rs      | 56 +++++++++++-----------
 build_system/src/fmt.rs         | 10 ++--
 build_system/src/fuzz.rs        | 22 ++++-----
 build_system/src/fuzz/reduce.rs | 35 +++++++-------
 build_system/src/info.rs        |  2 +-
 build_system/src/prepare.rs     | 18 +++----
 build_system/src/rust_tools.rs  | 16 +++----
 build_system/src/test.rs        | 83 +++++++++++++++------------------
 build_system/src/utils.rs       | 12 ++---
 src/intrinsic/llvm.rs           |  2 +-
 src/type_.rs                    | 14 +++---
 tests/lang_tests_common.rs      |  8 ++--
 15 files changed, 142 insertions(+), 156 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index e98377f15a94..ecc4c1b2fe22 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -33,7 +33,7 @@ impl BuildArg {
                 }
                 arg => {
                     if !build_arg.config_info.parse_argument(arg, &mut args)? {
-                        return Err(format!("Unknown argument `{}`", arg));
+                        return Err(format!("Unknown argument `{arg}`"));
                     }
                 }
             }
@@ -105,14 +105,14 @@ pub fn create_build_sysroot_content(start_dir: &Path) -> Result<(), String> {
     if !start_dir.is_dir() {
         create_dir(start_dir)?;
     }
-    copy_file("build_system/build_sysroot/Cargo.toml", &start_dir.join("Cargo.toml"))?;
-    copy_file("build_system/build_sysroot/Cargo.lock", &start_dir.join("Cargo.lock"))?;
+    copy_file("build_system/build_sysroot/Cargo.toml", start_dir.join("Cargo.toml"))?;
+    copy_file("build_system/build_sysroot/Cargo.lock", start_dir.join("Cargo.lock"))?;
 
     let src_dir = start_dir.join("src");
     if !src_dir.is_dir() {
         create_dir(&src_dir)?;
     }
-    copy_file("build_system/build_sysroot/lib.rs", &start_dir.join("src/lib.rs"))
+    copy_file("build_system/build_sysroot/lib.rs", start_dir.join("src/lib.rs"))
 }
 
 pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Result<(), String> {
@@ -169,7 +169,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         run_command(&[&"cp", &"-r", &dir_to_copy, &sysroot_path], None).map(|_| ())
     };
     walk_dir(
-        start_dir.join(&format!("target/{}/{}/deps", config.target_triple, channel)),
+        start_dir.join(format!("target/{}/{}/deps", config.target_triple, channel)),
         &mut copier.clone(),
         &mut copier,
         false,
diff --git a/build_system/src/clean.rs b/build_system/src/clean.rs
index 768a78e789e1..a441ed613f94 100644
--- a/build_system/src/clean.rs
+++ b/build_system/src/clean.rs
@@ -17,12 +17,12 @@ enum CleanArg {
 impl CleanArg {
     fn new() -> Result<Self, String> {
         // We skip the binary and the "clean" option.
-        for arg in std::env::args().skip(2) {
+        if let Some(arg) = std::env::args().nth(2) {
             return match arg.as_str() {
                 "all" => Ok(Self::All),
                 "ui-tests" => Ok(Self::UiTests),
                 "--help" => Ok(Self::Help),
-                a => Err(format!("Unknown argument `{}`", a)),
+                a => Err(format!("Unknown argument `{a}`")),
             };
         }
         Ok(Self::default())
diff --git a/build_system/src/clone_gcc.rs b/build_system/src/clone_gcc.rs
index b49dd47f3521..ee683df419c2 100644
--- a/build_system/src/clone_gcc.rs
+++ b/build_system/src/clone_gcc.rs
@@ -43,7 +43,7 @@ impl Args {
                 }
                 arg => {
                     if !command_args.config_info.parse_argument(arg, &mut args)? {
-                        return Err(format!("Unknown option {}", arg));
+                        return Err(format!("Unknown option {arg}"));
                     }
                 }
             }
@@ -52,7 +52,7 @@ impl Args {
             Some(p) => p.into(),
             None => PathBuf::from("./gcc"),
         };
-        return Ok(Some(command_args));
+        Ok(Some(command_args))
     }
 }
 
@@ -64,7 +64,7 @@ pub fn run() -> Result<(), String> {
     let result = git_clone("https://github.com/rust-lang/gcc", Some(&args.out_path), false)?;
     if result.ran_clone {
         let gcc_commit = args.config_info.get_gcc_commit()?;
-        println!("Checking out GCC commit `{}`...", gcc_commit);
+        println!("Checking out GCC commit `{gcc_commit}`...");
         run_command_with_output(
             &[&"git", &"checkout", &gcc_commit],
             Some(Path::new(&result.repo_dir)),
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 4f9fcc971514..650c030ca539 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -66,7 +66,7 @@ impl ConfigFile {
                         "Expected a boolean for `download-gccjit`",
                     );
                 }
-                _ => return failed_config_parsing(config_file, &format!("Unknown key `{}`", key)),
+                _ => return failed_config_parsing(config_file, &format!("Unknown key `{key}`")),
             }
         }
         match (config.gcc_path.as_mut(), config.download_gccjit) {
@@ -86,9 +86,7 @@ impl ConfigFile {
                 let path = Path::new(gcc_path);
                 *gcc_path = path
                     .canonicalize()
-                    .map_err(|err| {
-                        format!("Failed to get absolute path of `{}`: {:?}", gcc_path, err)
-                    })?
+                    .map_err(|err| format!("Failed to get absolute path of `{gcc_path}`: {err:?}"))?
                     .display()
                     .to_string();
             }
@@ -175,7 +173,7 @@ impl ConfigInfo {
             "--sysroot-panic-abort" => self.sysroot_panic_abort = true,
             "--gcc-path" => match args.next() {
                 Some(arg) if !arg.is_empty() => {
-                    self.gcc_path = Some(arg.into());
+                    self.gcc_path = Some(arg);
                 }
                 _ => {
                     return Err("Expected a value after `--gcc-path`, found nothing".to_string());
@@ -244,7 +242,7 @@ impl ConfigInfo {
         let libgccjit_so = output_dir.join(libgccjit_so_name);
         if !libgccjit_so.is_file() && !self.no_download {
             // Download time!
-            let tempfile_name = format!("{}.download", libgccjit_so_name);
+            let tempfile_name = format!("{libgccjit_so_name}.download");
             let tempfile = output_dir.join(&tempfile_name);
             let is_in_ci = std::env::var("GITHUB_ACTIONS").is_ok();
 
@@ -262,14 +260,14 @@ impl ConfigInfo {
                 )
             })?;
 
-            println!("Downloaded libgccjit.so version {} successfully!", commit);
+            println!("Downloaded libgccjit.so version {commit} successfully!");
             // We need to create a link named `libgccjit.so.0` because that's what the linker is
             // looking for.
-            create_symlink(&libgccjit_so, output_dir.join(&format!("{}.0", libgccjit_so_name)))?;
+            create_symlink(&libgccjit_so, output_dir.join(format!("{libgccjit_so_name}.0")))?;
         }
 
         let gcc_path = output_dir.display().to_string();
-        println!("Using `{}` as path for libgccjit", gcc_path);
+        println!("Using `{gcc_path}` as path for libgccjit");
         self.gcc_path = Some(gcc_path);
         Ok(())
     }
@@ -286,8 +284,7 @@ impl ConfigInfo {
         // since we already have everything we need.
         if let Some(gcc_path) = &self.gcc_path {
             println!(
-                "`--gcc-path` was provided, ignoring config file. Using `{}` as path for libgccjit",
-                gcc_path
+                "`--gcc-path` was provided, ignoring config file. Using `{gcc_path}` as path for libgccjit"
             );
             return Ok(());
         }
@@ -343,7 +340,7 @@ impl ConfigInfo {
         self.dylib_ext = match os_name.as_str() {
             "Linux" => "so",
             "Darwin" => "dylib",
-            os => return Err(format!("unsupported OS `{}`", os)),
+            os => return Err(format!("unsupported OS `{os}`")),
         }
         .to_string();
         let rustc = match env.get("RUSTC") {
@@ -355,10 +352,10 @@ impl ConfigInfo {
             None => return Err("no host found".to_string()),
         };
 
-        if self.target_triple.is_empty() {
-            if let Some(overwrite) = env.get("OVERWRITE_TARGET_TRIPLE") {
-                self.target_triple = overwrite.clone();
-            }
+        if self.target_triple.is_empty()
+            && let Some(overwrite) = env.get("OVERWRITE_TARGET_TRIPLE")
+        {
+            self.target_triple = overwrite.clone();
         }
         if self.target_triple.is_empty() {
             self.target_triple = self.host_triple.clone();
@@ -378,7 +375,7 @@ impl ConfigInfo {
         }
 
         let current_dir =
-            std_env::current_dir().map_err(|error| format!("`current_dir` failed: {:?}", error))?;
+            std_env::current_dir().map_err(|error| format!("`current_dir` failed: {error:?}"))?;
         let channel = if self.channel == Channel::Release {
             "release"
         } else if let Some(channel) = env.get("CHANNEL") {
@@ -391,15 +388,15 @@ impl ConfigInfo {
         self.cg_backend_path = current_dir
             .join("target")
             .join(channel)
-            .join(&format!("librustc_codegen_gcc.{}", self.dylib_ext))
+            .join(format!("librustc_codegen_gcc.{}", self.dylib_ext))
             .display()
             .to_string();
         self.sysroot_path =
-            current_dir.join(&get_sysroot_dir()).join("sysroot").display().to_string();
+            current_dir.join(get_sysroot_dir()).join("sysroot").display().to_string();
         if let Some(backend) = &self.backend {
             // This option is only used in the rust compiler testsuite. The sysroot is handled
             // by its build system directly so no need to set it ourselves.
-            rustflags.push(format!("-Zcodegen-backend={}", backend));
+            rustflags.push(format!("-Zcodegen-backend={backend}"));
         } else {
             rustflags.extend_from_slice(&[
                 "--sysroot".to_string(),
@@ -412,10 +409,10 @@ impl ConfigInfo {
         // We have a different environment variable than RUSTFLAGS to make sure those flags are
         // only sent to rustc_codegen_gcc and not the LLVM backend.
         if let Some(cg_rustflags) = env.get("CG_RUSTFLAGS") {
-            rustflags.extend_from_slice(&split_args(&cg_rustflags)?);
+            rustflags.extend_from_slice(&split_args(cg_rustflags)?);
         }
         if let Some(test_flags) = env.get("TEST_FLAGS") {
-            rustflags.extend_from_slice(&split_args(&test_flags)?);
+            rustflags.extend_from_slice(&split_args(test_flags)?);
         }
 
         if let Some(linker) = linker {
@@ -438,8 +435,8 @@ impl ConfigInfo {
         env.insert("RUSTC_LOG".to_string(), "warn".to_string());
 
         let sysroot = current_dir
-            .join(&get_sysroot_dir())
-            .join(&format!("sysroot/lib/rustlib/{}/lib", self.target_triple));
+            .join(get_sysroot_dir())
+            .join(format!("sysroot/lib/rustlib/{}/lib", self.target_triple));
         let ld_library_path = format!(
             "{target}:{sysroot}:{gcc_path}",
             target = self.cargo_target_dir,
@@ -505,7 +502,7 @@ fn download_gccjit(
     with_progress_bar: bool,
 ) -> Result<(), String> {
     let url = if std::env::consts::OS == "linux" && std::env::consts::ARCH == "x86_64" {
-        format!("https://github.com/rust-lang/gcc/releases/download/master-{}/libgccjit.so", commit)
+        format!("https://github.com/rust-lang/gcc/releases/download/master-{commit}/libgccjit.so")
     } else {
         eprintln!(
             "\
@@ -518,7 +515,7 @@ to `download-gccjit = false` and set `gcc-path` to the appropriate directory."
         ));
     };
 
-    println!("Downloading `{}`...", url);
+    println!("Downloading `{url}`...");
 
     // Try curl. If that fails and we are on windows, fallback to PowerShell.
     let mut ret = run_command_with_output(
@@ -538,7 +535,7 @@ to `download-gccjit = false` and set `gcc-path` to the appropriate directory."
             if with_progress_bar { &"--progress-bar" } else { &"-s" },
             &url.as_str(),
         ],
-        Some(&output_dir),
+        Some(output_dir),
     );
     if ret.is_err() && cfg!(windows) {
         eprintln!("Fallback to PowerShell");
@@ -549,12 +546,11 @@ to `download-gccjit = false` and set `gcc-path` to the appropriate directory."
                 &"-Command",
                 &"[Net.ServicePointManager]::SecurityProtocol = [Net.SecurityProtocolType]::Tls12;",
                 &format!(
-                    "(New-Object System.Net.WebClient).DownloadFile('{}', '{}')",
-                    url, tempfile_name,
+                    "(New-Object System.Net.WebClient).DownloadFile('{url}', '{tempfile_name}')",
                 )
                 .as_str(),
             ],
-            Some(&output_dir),
+            Some(output_dir),
         );
     }
     ret
diff --git a/build_system/src/fmt.rs b/build_system/src/fmt.rs
index de310a6a30fe..7e6594f50f93 100644
--- a/build_system/src/fmt.rs
+++ b/build_system/src/fmt.rs
@@ -16,21 +16,21 @@ fn show_usage() {
 pub fn run() -> Result<(), String> {
     let mut check = false;
     // We skip binary name and the `info` command.
-    let mut args = std::env::args().skip(2);
-    while let Some(arg) = args.next() {
+    let args = std::env::args().skip(2);
+    for arg in args {
         match arg.as_str() {
             "--help" => {
                 show_usage();
                 return Ok(());
             }
             "--check" => check = true,
-            _ => return Err(format!("Unknown option {}", arg)),
+            _ => return Err(format!("Unknown option {arg}")),
         }
     }
 
     let cmd: &[&dyn AsRef<OsStr>] =
         if check { &[&"cargo", &"fmt", &"--check"] } else { &[&"cargo", &"fmt"] };
 
-    run_command_with_output(cmd, Some(&Path::new(".")))?;
-    run_command_with_output(cmd, Some(&Path::new("build_system")))
+    run_command_with_output(cmd, Some(Path::new(".")))?;
+    run_command_with_output(cmd, Some(Path::new("build_system")))
 }
diff --git a/build_system/src/fuzz.rs b/build_system/src/fuzz.rs
index f170453bfe4c..453211366b31 100644
--- a/build_system/src/fuzz.rs
+++ b/build_system/src/fuzz.rs
@@ -56,7 +56,7 @@ pub fn run() -> Result<(), String> {
                 )
                 .map_err(|err| (format!("Fuzz thread count not a number {err:?}!")))?;
             }
-            _ => return Err(format!("Unknown option {}", arg)),
+            _ => return Err(format!("Unknown option {arg}")),
         }
     }
 
@@ -70,11 +70,11 @@ pub fn run() -> Result<(), String> {
 
     // Ensure that we are on the newest rustlantis commit.
     let cmd: &[&dyn AsRef<OsStr>] = &[&"git", &"pull", &"origin"];
-    run_command_with_output(cmd, Some(&Path::new("clones/rustlantis")))?;
+    run_command_with_output(cmd, Some(Path::new("clones/rustlantis")))?;
 
     // Build the release version of rustlantis
     let cmd: &[&dyn AsRef<OsStr>] = &[&"cargo", &"build", &"--release"];
-    run_command_with_output(cmd, Some(&Path::new("clones/rustlantis")))?;
+    run_command_with_output(cmd, Some(Path::new("clones/rustlantis")))?;
     // Fuzz a given range
     fuzz_range(start, start + count, threads);
     Ok(())
@@ -104,13 +104,13 @@ fn fuzz_range(start: u64, end: u64, threads: usize) {
                 match test(next, false) {
                     Err(err) => {
                         // If the test failed at compile-time...
-                        println!("test({}) failed because {err:?}", next);
+                        println!("test({next}) failed because {err:?}");
                         // ... copy that file to the directory `target/fuzz/compiletime_error`...
                         let mut out_path: std::path::PathBuf =
                             "target/fuzz/compiletime_error".into();
                         std::fs::create_dir_all(&out_path).unwrap();
                         // .. into a file named `fuzz{seed}.rs`.
-                        out_path.push(&format!("fuzz{next}.rs"));
+                        out_path.push(format!("fuzz{next}.rs"));
                         std::fs::copy(err, out_path).unwrap();
                     }
                     Ok(Err(err)) => {
@@ -122,12 +122,12 @@ fn fuzz_range(start: u64, end: u64, threads: usize) {
                         let Ok(Err(tmp_print_err)) = test(next, true) else {
                             // ... if that file does not reproduce the issue...
                             // ... save the original sample in a file named `fuzz{seed}.rs`...
-                            out_path.push(&format!("fuzz{next}.rs"));
+                            out_path.push(format!("fuzz{next}.rs"));
                             std::fs::copy(err, &out_path).unwrap();
                             continue;
                         };
                         // ... if that new file still produces the issue, copy it to `fuzz{seed}.rs`..
-                        out_path.push(&format!("fuzz{next}.rs"));
+                        out_path.push(format!("fuzz{next}.rs"));
                         std::fs::copy(tmp_print_err, &out_path).unwrap();
                         // ... and start reducing it, using some properties of `rustlantis` to speed up the process.
                         reduce::reduce(&out_path);
@@ -240,10 +240,10 @@ fn test_cached(
     cache: &mut ResultCache,
 ) -> Result<Result<(), std::path::PathBuf>, String> {
     //  Test `source_file` with release GCC ...
-    let gcc_res = release_gcc(&source_file)?;
+    let gcc_res = release_gcc(source_file)?;
     if cache.is_none() {
         // ...test `source_file` with debug LLVM ...
-        *cache = Some((debug_llvm(&source_file)?, gcc_res.clone()));
+        *cache = Some((debug_llvm(source_file)?, gcc_res.clone()));
     }
     let (llvm_res, old_gcc) = cache.as_ref().unwrap();
     // ... compare the results ...
@@ -269,12 +269,12 @@ fn test_file(
 fn generate(seed: u64, print_tmp_vars: bool) -> Result<std::path::PathBuf, String> {
     use std::io::Write;
     let mut out_path = std::env::temp_dir();
-    out_path.push(&format!("fuzz{seed}.rs"));
+    out_path.push(format!("fuzz{seed}.rs"));
     // We need to get the command output here.
     let mut generate = std::process::Command::new("cargo");
     generate
         .args(["run", "--release", "--bin", "generate"])
-        .arg(&format!("{seed}"))
+        .arg(format!("{seed}"))
         .current_dir("clones/rustlantis");
     if print_tmp_vars {
         generate.arg("--debug");
diff --git a/build_system/src/fuzz/reduce.rs b/build_system/src/fuzz/reduce.rs
index 24d58b879edc..20715ab0e7c4 100644
--- a/build_system/src/fuzz/reduce.rs
+++ b/build_system/src/fuzz/reduce.rs
@@ -4,9 +4,9 @@ use std::path::{Path, PathBuf};
 use super::ResultCache;
 
 /// Saves a reduced file for a given `stage`
-fn save_reduction(lines: &[String], path: &PathBuf, stage: &str) {
-    let mut path = path.clone();
-    path.set_extension(&format!("rs.{stage}"));
+fn save_reduction(lines: &[String], path: &Path, stage: &str) {
+    let mut path = path.to_path_buf();
+    path.set_extension(format!("rs.{stage}"));
     let mut file = std::fs::File::create(&path).expect("Could not create the reduced example file");
     for line in lines {
         file.write_all(line.as_bytes()).expect("Could not save the reduced example");
@@ -14,8 +14,8 @@ fn save_reduction(lines: &[String], path: &PathBuf, stage: &str) {
 }
 
 /// Checks if a given reduction is valid.
-fn test_reduction(lines: &[String], path: &PathBuf, cache: &mut ResultCache) -> bool {
-    let mut path = path.clone();
+fn test_reduction(lines: &[String], path: &Path, cache: &mut ResultCache) -> bool {
+    let mut path = path.to_path_buf();
     path.set_extension("rs_reduced");
     let mut file = std::fs::File::create(&path).expect("Could not create the reduced example file");
     for line in lines {
@@ -25,7 +25,7 @@ fn test_reduction(lines: &[String], path: &PathBuf, cache: &mut ResultCache) ->
     let Ok(Err(_)) = res else {
         return false;
     };
-    return true;
+    true
 }
 
 /// Removes duplicate assignments in bulk.
@@ -73,8 +73,8 @@ fn remove_dup_assign(
         return;
     }
     // Check if the removed lines affected the execution result in any way, shape or form.
-    if test_reduction(&file_copy, &path, cache) {
-        println!("Reduced {path:?} by {} lines `remove_dup_assign`", reduction_count);
+    if test_reduction(&file_copy, path, cache) {
+        println!("Reduced {path:?} by {reduction_count} lines `remove_dup_assign`");
         *file = file_copy;
     } else {
         // The execution result changed.
@@ -110,7 +110,7 @@ fn remove_dump_var(file: &mut Vec<String>, path: &PathBuf) {
         // Not cached - the execution result can change.
         let mut uncached = None;
         // Check if this reduction is valid.
-        if test_reduction(&file_copy, &path, &mut uncached) {
+        if test_reduction(&file_copy, path, &mut uncached) {
             println!("Reduced {path:?} by 3 lines `remove_dump_var`");
             *file = file_copy;
             curr = line;
@@ -160,7 +160,7 @@ fn match_to_goto(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache
             file_copy.remove(match_starts);
         }
         file_copy.insert(match_starts, format!("Goto(bb{bb_ident})\n"));
-        if test_reduction(&file_copy, &path, cache) {
+        if test_reduction(&file_copy, path, cache) {
             println!("Reduced {path:?} by {} lines `match_to_goto`", match_ends - match_starts);
             *file = file_copy;
             curr = match_starts;
@@ -203,11 +203,12 @@ fn block_abort(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache)
         // ..and insert an unconditional call to abort.
         file_copy.insert(
             block_starts,
-            format!("Call(tmp = core::intrinsics::abort(), ReturnTo(bb1), UnwindUnreachable())\n"),
+            "Call(tmp = core::intrinsics::abort(), ReturnTo(bb1), UnwindUnreachable())\n"
+                .to_string(),
         );
-        file_copy.insert(block_starts, format!("let tmp = ();\n"));
+        file_copy.insert(block_starts, "let tmp = ();\n".to_string());
 
-        if test_reduction(&file_copy, &path, cache) {
+        if test_reduction(&file_copy, path, cache) {
             println!("Reduced {path:?} by {} lines `block_abort`", block_ends - block_starts - 2);
             *file = file_copy;
             curr = block_starts;
@@ -248,7 +249,7 @@ fn remove_block(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache)
         }
         let mut file_copy = file.clone();
         file_copy.drain(block_starts..block_ends);
-        if test_reduction(&file_copy, &path, cache) {
+        if test_reduction(&file_copy, path, cache) {
             println!("Reduced {path:?} by {} lines `remove_blocks`", block_ends - block_starts);
             *file = file_copy;
             curr = block_starts;
@@ -295,7 +296,7 @@ fn linearize_cf(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache)
         file_copy.remove(block_starts - 2);
         file_copy.remove(block_starts - 2);
         // Check if this reduction is valid.
-        if test_reduction(&file_copy, &path, cache) {
+        if test_reduction(&file_copy, path, cache) {
             println!("Reduced {path:?} by 3 lines `linearize_cf`");
             *file = file_copy;
             curr = block_starts;
@@ -345,7 +346,7 @@ fn remove_fn_calls(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCac
         file_copy.insert(fn_call, format!("Goto({block})\n"));
         file_copy.insert(fn_call, format!("{place} = 0;\n"));
         // Check if this reduction is valid.
-        if test_reduction(&file_copy, &path, cache) {
+        if test_reduction(&file_copy, path, cache) {
             println!("Reduced {path:?} using `remove_fn_calls` {cache:?}");
             *file = file_copy;
             curr = fn_call;
@@ -382,7 +383,7 @@ fn remove_fns(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
         // Remove the function.\\
         file_copy.drain(fn_start..fn_end);
         // Check if this reduction is valid.
-        if test_reduction(&file_copy, &path, cache) {
+        if test_reduction(&file_copy, path, cache) {
             println!("Reduced {path:?} by {} lines `remove_fns`", fn_end - fn_start);
             *file = file_copy;
         } else {
diff --git a/build_system/src/info.rs b/build_system/src/info.rs
index bd891de2eb4c..66fdcf88cbb8 100644
--- a/build_system/src/info.rs
+++ b/build_system/src/info.rs
@@ -15,7 +15,7 @@ pub fn run() -> Result<(), String> {
     config.no_download = true;
     config.setup_gcc_path()?;
     if let Some(gcc_path) = config.gcc_path {
-        println!("{}", gcc_path);
+        println!("{gcc_path}");
     }
     Ok(())
 }
diff --git a/build_system/src/prepare.rs b/build_system/src/prepare.rs
index d14639afee5a..35a6e20fb86b 100644
--- a/build_system/src/prepare.rs
+++ b/build_system/src/prepare.rs
@@ -18,9 +18,9 @@ fn prepare_libcore(
     if let Some(path) = sysroot_source {
         rustlib_dir = Path::new(&path)
             .canonicalize()
-            .map_err(|error| format!("Failed to canonicalize path: {:?}", error))?;
+            .map_err(|error| format!("Failed to canonicalize path: {error:?}"))?;
         if !rustlib_dir.is_dir() {
-            return Err(format!("Custom sysroot path {:?} not found", rustlib_dir));
+            return Err(format!("Custom sysroot path {rustlib_dir:?} not found"));
         }
     } else {
         let rustc_path = match get_rustc_path() {
@@ -36,17 +36,17 @@ fn prepare_libcore(
         rustlib_dir = parent
             .join("../lib/rustlib/src/rust")
             .canonicalize()
-            .map_err(|error| format!("Failed to canonicalize path: {:?}", error))?;
+            .map_err(|error| format!("Failed to canonicalize path: {error:?}"))?;
         if !rustlib_dir.is_dir() {
             return Err("Please install `rust-src` component".to_string());
         }
     }
 
     let sysroot_dir = sysroot_path.join("sysroot_src");
-    if sysroot_dir.is_dir() {
-        if let Err(error) = fs::remove_dir_all(&sysroot_dir) {
-            return Err(format!("Failed to remove `{}`: {:?}", sysroot_dir.display(), error,));
-        }
+    if sysroot_dir.is_dir()
+        && let Err(error) = fs::remove_dir_all(&sysroot_dir)
+    {
+        return Err(format!("Failed to remove `{}`: {:?}", sysroot_dir.display(), error,));
     }
 
     let sysroot_library_dir = sysroot_dir.join("library");
@@ -122,7 +122,7 @@ fn prepare_rand() -> Result<(), String> {
     // Apply patch for the rand crate.
     let file_path = "patches/crates/0001-Remove-deny-warnings.patch";
     let rand_dir = Path::new("build/rand");
-    println!("[GIT] apply `{}`", file_path);
+    println!("[GIT] apply `{file_path}`");
     let path = Path::new("../..").join(file_path);
     run_command_with_output(&[&"git", &"apply", &path], Some(rand_dir))?;
     run_command_with_output(&[&"git", &"add", &"-A"], Some(rand_dir))?;
@@ -149,7 +149,7 @@ fn clone_and_setup<F>(repo_url: &str, checkout_commit: &str, extra: Option<F>) -
 where
     F: Fn(&Path) -> Result<(), String>,
 {
-    let clone_result = git_clone_root_dir(repo_url, &Path::new(crate::BUILD_DIR), false)?;
+    let clone_result = git_clone_root_dir(repo_url, Path::new(crate::BUILD_DIR), false)?;
     if !clone_result.ran_clone {
         println!("`{}` has already been cloned", clone_result.repo_name);
     }
diff --git a/build_system/src/rust_tools.rs b/build_system/src/rust_tools.rs
index 7e3e37a30a83..b1faa27acc4a 100644
--- a/build_system/src/rust_tools.rs
+++ b/build_system/src/rust_tools.rs
@@ -9,15 +9,14 @@ use crate::utils::{get_toolchain, rustc_toolchain_version_info, rustc_version_in
 
 fn args(command: &str) -> Result<Option<Vec<String>>, String> {
     // We skip the binary and the "cargo"/"rustc" option.
-    if let Some("--help") = std::env::args().skip(2).next().as_deref() {
+    if let Some("--help") = std::env::args().nth(2).as_deref() {
         usage(command);
         return Ok(None);
     }
     let args = std::env::args().skip(2).collect::<Vec<_>>();
     if args.is_empty() {
         return Err(format!(
-            "Expected at least one argument for `{}` subcommand, found none",
-            command
+            "Expected at least one argument for `{command}` subcommand, found none"
         ));
     }
     Ok(Some(args))
@@ -26,12 +25,11 @@ fn args(command: &str) -> Result<Option<Vec<String>>, String> {
 fn usage(command: &str) {
     println!(
         r#"
-`{}` command help:
+`{command}` command help:
 
     [args]     : Arguments to be passed to the cargo command
     --help     : Show this help
 "#,
-        command,
     )
 }
 
@@ -50,10 +48,10 @@ impl RustcTools {
         // expected.
         let current_dir = std::env::current_dir()
             .and_then(|path| path.canonicalize())
-            .map_err(|error| format!("Failed to get current directory path: {:?}", error))?;
+            .map_err(|error| format!("Failed to get current directory path: {error:?}"))?;
         let current_exe = std::env::current_exe()
             .and_then(|path| path.canonicalize())
-            .map_err(|error| format!("Failed to get current exe path: {:?}", error))?;
+            .map_err(|error| format!("Failed to get current exe path: {error:?}"))?;
         let mut parent_dir =
             current_exe.components().map(|comp| comp.as_os_str()).collect::<Vec<_>>();
         // We run this script from "build_system/target/release/y", so we need to remove these elements.
@@ -67,7 +65,7 @@ impl RustcTools {
                 ));
             }
         }
-        let parent_dir = PathBuf::from(parent_dir.join(&OsStr::new("/")));
+        let parent_dir = PathBuf::from(parent_dir.join(OsStr::new("/")));
         std::env::set_current_dir(&parent_dir).map_err(|error| {
             format!("Failed to go to `{}` folder: {:?}", parent_dir.display(), error)
         })?;
@@ -91,7 +89,7 @@ impl RustcTools {
         std::env::set_current_dir(&current_dir).map_err(|error| {
             format!("Failed to go back to `{}` folder: {:?}", current_dir.display(), error)
         })?;
-        let toolchain = format!("+{}", toolchain);
+        let toolchain = format!("+{toolchain}");
         Ok(Some(Self { toolchain, args, env, config }))
     }
 }
diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 515303a67be1..bcaab0fb526b 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -53,9 +53,9 @@ fn get_number_after_arg(
     match args.next() {
         Some(nb) if !nb.is_empty() => match usize::from_str(&nb) {
             Ok(nb) => Ok(nb),
-            Err(_) => Err(format!("Expected a number after `{}`, found `{}`", option, nb)),
+            Err(_) => Err(format!("Expected a number after `{option}`, found `{nb}`")),
         },
-        _ => Err(format!("Expected a number after `{}`, found nothing", option)),
+        _ => Err(format!("Expected a number after `{option}`, found nothing")),
     }
 }
 
@@ -76,8 +76,8 @@ fn show_usage() {
     for (option, (doc, _)) in get_runners() {
         // FIXME: Instead of using the hard-coded `23` value, better to compute it instead.
         let needed_spaces = 23_usize.saturating_sub(option.len());
-        let spaces: String = std::iter::repeat(' ').take(needed_spaces).collect();
-        println!("    {}{}: {}", option, spaces, doc);
+        let spaces: String = std::iter::repeat_n(' ', needed_spaces).collect();
+        println!("    {option}{spaces}: {doc}");
     }
     println!("    --help                 : Show this help");
 }
@@ -139,7 +139,7 @@ impl TestArg {
                         test_arg.sysroot_features.push(feature);
                     }
                     _ => {
-                        return Err(format!("Expected an argument after `{}`, found nothing", arg));
+                        return Err(format!("Expected an argument after `{arg}`, found nothing"));
                     }
                 },
                 "--help" => {
@@ -154,7 +154,7 @@ impl TestArg {
                 }
                 arg => {
                     if !test_arg.config_info.parse_argument(arg, &mut args)? {
-                        return Err(format!("Unknown option {}", arg));
+                        return Err(format!("Unknown option {arg}"));
                     }
                 }
             }
@@ -192,7 +192,7 @@ fn build_if_no_backend(env: &Env, args: &TestArg) -> Result<(), String> {
         command.push(&"--release");
         &tmp_env
     } else {
-        &env
+        env
     };
     for flag in args.flags.iter() {
         command.push(flag);
@@ -252,7 +252,7 @@ fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &"--target",
         &args.config_info.target_triple,
     ]);
-    run_command_with_output_and_env(&command, None, Some(&env))?;
+    run_command_with_output_and_env(&command, None, Some(env))?;
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[BUILD] example");
@@ -264,7 +264,7 @@ fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &"--target",
         &args.config_info.target_triple,
     ]);
-    run_command_with_output_and_env(&command, None, Some(&env))?;
+    run_command_with_output_and_env(&command, None, Some(env))?;
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] mini_core_hello_world");
@@ -279,14 +279,14 @@ fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &"--target",
         &args.config_info.target_triple,
     ]);
-    run_command_with_output_and_env(&command, None, Some(&env))?;
+    run_command_with_output_and_env(&command, None, Some(env))?;
 
     let command: &[&dyn AsRef<OsStr>] = &[
         &Path::new(&args.config_info.cargo_target_dir).join("mini_core_hello_world"),
         &"abc",
         &"bcd",
     ];
-    maybe_run_command_in_vm(&command, env, args)?;
+    maybe_run_command_in_vm(command, env, args)?;
     Ok(())
 }
 
@@ -512,19 +512,19 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
     let cargo = String::from_utf8(
         run_command_with_env(&[&"rustup", &"which", &"cargo"], rust_dir, Some(env))?.stdout,
     )
-    .map_err(|error| format!("Failed to retrieve cargo path: {:?}", error))
+    .map_err(|error| format!("Failed to retrieve cargo path: {error:?}"))
     .and_then(|cargo| {
         let cargo = cargo.trim().to_owned();
-        if cargo.is_empty() { Err(format!("`cargo` path is empty")) } else { Ok(cargo) }
+        if cargo.is_empty() { Err("`cargo` path is empty".to_string()) } else { Ok(cargo) }
     })?;
     let rustc = String::from_utf8(
         run_command_with_env(&[&"rustup", &toolchain, &"which", &"rustc"], rust_dir, Some(env))?
             .stdout,
     )
-    .map_err(|error| format!("Failed to retrieve rustc path: {:?}", error))
+    .map_err(|error| format!("Failed to retrieve rustc path: {error:?}"))
     .and_then(|rustc| {
         let rustc = rustc.trim().to_owned();
-        if rustc.is_empty() { Err(format!("`rustc` path is empty")) } else { Ok(rustc) }
+        if rustc.is_empty() { Err("`rustc` path is empty".to_string()) } else { Ok(rustc) }
     })?;
     let llvm_filecheck = match run_command_with_env(
         &[
@@ -551,7 +551,7 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
     let file_path = rust_dir_path.join("config.toml");
     std::fs::write(
         &file_path,
-        &format!(
+        format!(
             r#"change-id = 115898
 
 [rust]
@@ -590,7 +590,7 @@ fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     let codegen_backend_path = format!(
         "{pwd}/target/{channel}/librustc_codegen_gcc.{dylib_ext}",
         pwd = std::env::current_dir()
-            .map_err(|error| format!("`current_dir` failed: {:?}", error))?
+            .map_err(|error| format!("`current_dir` failed: {error:?}"))?
             .display(),
         channel = args.config_info.channel.as_str(),
         dylib_ext = args.config_info.dylib_ext,
@@ -645,11 +645,11 @@ where
     F: Fn(&[&dyn AsRef<OsStr>], Option<&Path>, &Env) -> Result<(), String>,
 {
     let toolchain = get_toolchain()?;
-    let toolchain_arg = format!("+{}", toolchain);
+    let toolchain_arg = format!("+{toolchain}");
     let rustc_version = String::from_utf8(
         run_command_with_env(&[&args.config_info.rustc_command[0], &"-V"], cwd, Some(env))?.stdout,
     )
-    .map_err(|error| format!("Failed to retrieve rustc version: {:?}", error))?;
+    .map_err(|error| format!("Failed to retrieve rustc version: {error:?}"))?;
     let rustc_toolchain_version = String::from_utf8(
         run_command_with_env(
             &[&args.config_info.rustc_command[0], &toolchain_arg, &"-V"],
@@ -658,20 +658,19 @@ where
         )?
         .stdout,
     )
-    .map_err(|error| format!("Failed to retrieve rustc +toolchain version: {:?}", error))?;
+    .map_err(|error| format!("Failed to retrieve rustc +toolchain version: {error:?}"))?;
 
     if rustc_version != rustc_toolchain_version {
         eprintln!(
-            "rustc_codegen_gcc is built for `{}` but the default rustc version is `{}`.",
-            rustc_toolchain_version, rustc_version,
+            "rustc_codegen_gcc is built for `{rustc_toolchain_version}` but the default rustc version is `{rustc_version}`.",
         );
-        eprintln!("Using `{}`.", rustc_toolchain_version);
+        eprintln!("Using `{rustc_toolchain_version}`.");
     }
     let mut env = env.clone();
     let rustflags = env.get("RUSTFLAGS").cloned().unwrap_or_default();
     env.insert("RUSTDOCFLAGS".to_string(), rustflags);
     let mut cargo_command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &toolchain_arg];
-    cargo_command.extend_from_slice(&command);
+    cargo_command.extend_from_slice(command);
     callback(&cargo_command, cwd, &env)
 }
 
@@ -884,7 +883,7 @@ fn contains_ui_error_patterns(file_path: &Path, keep_lto_tests: bool) -> Result<
     // Tests generating errors.
     let file = File::open(file_path)
         .map_err(|error| format!("Failed to read `{}`: {:?}", file_path.display(), error))?;
-    for line in BufReader::new(file).lines().filter_map(|line| line.ok()) {
+    for line in BufReader::new(file).lines().map_while(Result::ok) {
         let line = line.trim();
         if line.is_empty() {
             continue;
@@ -953,7 +952,7 @@ where
 
     if !prepare_files_callback(&rust_path)? {
         // FIXME: create a function "display_if_not_quiet" or something along the line.
-        println!("Keeping all {} tests", test_type);
+        println!("Keeping all {test_type} tests");
     }
 
     if test_type == "ui" {
@@ -985,8 +984,7 @@ where
                         "borrowck",
                         "test-attrs",
                     ]
-                    .iter()
-                    .any(|name| *name == dir_name)
+                    .contains(&dir_name)
                     {
                         remove_dir_all(dir).map_err(|error| {
                             format!("Failed to remove folder `{}`: {:?}", dir.display(), error)
@@ -1041,10 +1039,7 @@ where
         if nb_parts > 0 {
             let current_part = args.current_part.unwrap();
             // FIXME: create a function "display_if_not_quiet" or something along the line.
-            println!(
-                "Splitting ui_test into {} parts (and running part {})",
-                nb_parts, current_part
-            );
+            println!("Splitting ui_test into {nb_parts} parts (and running part {current_part})");
             let out = String::from_utf8(
                 run_command(
                     &[
@@ -1062,7 +1057,7 @@ where
                 )?
                 .stdout,
             )
-            .map_err(|error| format!("Failed to retrieve output of find command: {:?}", error))?;
+            .map_err(|error| format!("Failed to retrieve output of find command: {error:?}"))?;
             let mut files = out
                 .split('\n')
                 .map(|line| line.trim())
@@ -1082,7 +1077,7 @@ where
     }
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
-    println!("[TEST] rustc {} test suite", test_type);
+    println!("[TEST] rustc {test_type} test suite");
     env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
 
     let extra =
@@ -1106,7 +1101,7 @@ where
             &"always",
             &"--stage",
             &"0",
-            &format!("tests/{}", test_type),
+            &format!("tests/{test_type}"),
             &"--compiletest-rustc-args",
             &rustc_args,
         ],
@@ -1182,7 +1177,7 @@ fn retain_files_callback<'a>(
             run_command(
                 &[
                     &"find",
-                    &format!("tests/{}", test_type),
+                    &format!("tests/{test_type}"),
                     &"-mindepth",
                     &"1",
                     &"-type",
@@ -1201,7 +1196,7 @@ fn retain_files_callback<'a>(
             run_command(
                 &[
                     &"find",
-                    &format!("tests/{}", test_type),
+                    &format!("tests/{test_type}"),
                     &"-type",
                     &"f",
                     &"-name",
@@ -1216,15 +1211,12 @@ fn retain_files_callback<'a>(
         }
 
         // Putting back only the failing ones.
-        if let Ok(files) = std::fs::read_to_string(&file_path) {
+        if let Ok(files) = std::fs::read_to_string(file_path) {
             for file in files.split('\n').map(|line| line.trim()).filter(|line| !line.is_empty()) {
-                run_command(&[&"git", &"checkout", &"--", &file], Some(&rust_path))?;
+                run_command(&[&"git", &"checkout", &"--", &file], Some(rust_path))?;
             }
         } else {
-            println!(
-                "Failed to read `{}`, not putting back failing {} tests",
-                file_path, test_type
-            );
+            println!("Failed to read `{file_path}`, not putting back failing {test_type} tests");
         }
 
         Ok(true)
@@ -1252,8 +1244,7 @@ fn remove_files_callback<'a>(
                 }
             } else {
                 println!(
-                    "Failed to read `{}`, not putting back failing {} tests",
-                    file_path, test_type
+                    "Failed to read `{file_path}`, not putting back failing {test_type} tests"
                 );
             }
         } else {
@@ -1266,7 +1257,7 @@ fn remove_files_callback<'a>(
                     remove_file(&path)?;
                 }
             } else {
-                println!("Failed to read `{}`, not putting back failing ui tests", file_path);
+                println!("Failed to read `{file_path}`, not putting back failing ui tests");
             }
         }
         Ok(true)
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index da91b3a8c297..d77707d5f17a 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -21,7 +21,7 @@ fn exec_command(
     {
         if let Some(signal) = status.signal() {
             // In case the signal didn't kill the current process.
-            return Err(command_error(input, &cwd, format!("Process received signal {}", signal)));
+            return Err(command_error(input, &cwd, format!("Process received signal {signal}")));
         }
     }
     Ok(status)
@@ -65,18 +65,18 @@ fn check_exit_status(
     );
     let input = input.iter().map(|i| i.as_ref()).collect::<Vec<&OsStr>>();
     if show_err {
-        eprintln!("Command `{:?}` failed", input);
+        eprintln!("Command `{input:?}` failed");
     }
     if let Some(output) = output {
         let stdout = String::from_utf8_lossy(&output.stdout);
         if !stdout.is_empty() {
             error.push_str("\n==== STDOUT ====\n");
-            error.push_str(&*stdout);
+            error.push_str(&stdout);
         }
         let stderr = String::from_utf8_lossy(&output.stderr);
         if !stderr.is_empty() {
             error.push_str("\n==== STDERR ====\n");
-            error.push_str(&*stderr);
+            error.push_str(&stderr);
         }
     }
     Err(error)
@@ -233,7 +233,7 @@ pub fn get_toolchain() -> Result<String, String> {
             if !line.starts_with("channel") {
                 return None;
             }
-            line.split('"').skip(1).next()
+            line.split('"').nth(1)
         })
         .next()
     {
@@ -272,7 +272,7 @@ fn git_clone_inner(
 }
 
 fn get_repo_name(url: &str) -> String {
-    let repo_name = url.split('/').last().unwrap();
+    let repo_name = url.split('/').next_back().unwrap();
     match repo_name.strip_suffix(".git") {
         Some(n) => n.to_string(),
         None => repo_name.to_string(),
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 97b944281870..0b77694f1156 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -1012,7 +1012,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
     };
     let func = cx.context.get_builtin_function(gcc_name);
     cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
-    return func;
+    func
 }
 
 #[cfg(feature = "master")]
diff --git a/src/type_.rs b/src/type_.rs
index 4e0a250b5509..15a0206607e1 100644
--- a/src/type_.rs
+++ b/src/type_.rs
@@ -302,13 +302,13 @@ impl<'gcc, 'tcx> BaseTypeCodegenMethods for CodegenCx<'gcc, 'tcx> {
     #[cfg_attr(feature = "master", allow(unused_mut))]
     fn type_array(&self, ty: Type<'gcc>, mut len: u64) -> Type<'gcc> {
         #[cfg(not(feature = "master"))]
-        if let Some(struct_type) = ty.is_struct() {
-            if struct_type.get_field_count() == 0 {
-                // NOTE: since gccjit only supports i32 for the array size and libcore's tests uses a
-                // size of usize::MAX in test_binary_search, we workaround this by setting the size to
-                // zero for ZSTs.
-                len = 0;
-            }
+        if let Some(struct_type) = ty.is_struct()
+            && struct_type.get_field_count() == 0
+        {
+            // NOTE: since gccjit only supports i32 for the array size and libcore's tests uses a
+            // size of usize::MAX in test_binary_search, we workaround this by setting the size to
+            // zero for ZSTs.
+            len = 0;
         }
 
         self.context.new_array_type(None, ty, len)
diff --git a/tests/lang_tests_common.rs b/tests/lang_tests_common.rs
index bdcf14b4b26d..9abe97b10876 100644
--- a/tests/lang_tests_common.rs
+++ b/tests/lang_tests_common.rs
@@ -57,10 +57,10 @@ pub fn main_inner(profile: Profile) {
 
     #[cfg(not(feature = "master"))]
     fn filter(filename: &Path) -> bool {
-        if let Some(filename) = filename.to_str() {
-            if filename.ends_with("gep.rs") {
-                return false;
-            }
+        if let Some(filename) = filename.to_str()
+            && filename.ends_with("gep.rs")
+        {
+            return false;
         }
         rust_filter(filename)
     }

From bbcc84a05d1544882bd8828bc12675264dba8fc9 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 16 Jun 2025 16:56:01 +0200
Subject: [PATCH 927/997] Update tempfile dependency

---
 Cargo.lock | 50 +++++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 43 insertions(+), 7 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 967a51a1cc64..b20c181a8cbf 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -81,6 +81,18 @@ dependencies = [
  "unicode-width",
 ]
 
+[[package]]
+name = "getrandom"
+version = "0.3.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "26145e563e54f2cadc477553f1ec5ee650b00862f0a58bcd12cbdc5f0ea2d2f4"
+dependencies = [
+ "cfg-if",
+ "libc",
+ "r-efi",
+ "wasi",
+]
+
 [[package]]
 name = "hermit-abi"
 version = "0.3.1"
@@ -111,9 +123,9 @@ checksum = "5aaeb2981e0606ca11d79718f8bb01164f1d6ed75080182d3abf017e6d244b6d"
 
 [[package]]
 name = "linux-raw-sys"
-version = "0.4.14"
+version = "0.9.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "78b3ae25bc7c8c38cec158d1f2757ee79e9b3740fbc7ccf0e59e4b08d793fa89"
+checksum = "cd945864f07fe9f5371a27ad7b52a172b4b499999f1d97574c9fa68373937e12"
 
 [[package]]
 name = "memchr"
@@ -137,6 +149,12 @@ version = "1.20.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "1261fe7e33c73b354eab43b1273a57c8f967d0391e80353e51f764ac02cf6775"
 
+[[package]]
+name = "r-efi"
+version = "5.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "74765f6d916ee2faa39bc8e68e4f3ed8949b48cccdac59983d287a7cb71ce9c5"
+
 [[package]]
 name = "regex"
 version = "1.8.4"
@@ -166,9 +184,9 @@ dependencies = [
 
 [[package]]
 name = "rustix"
-version = "0.38.42"
+version = "1.0.7"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f93dc38ecbab2eb790ff964bb77fa94faf256fd3e73285fd7ba0903b76bedb85"
+checksum = "c71e83d6afe7ff64890ec6b71d6a69bb8a610ab78ce364b3352876bb4c801266"
 dependencies = [
  "bitflags",
  "errno",
@@ -188,12 +206,12 @@ dependencies = [
 
 [[package]]
 name = "tempfile"
-version = "3.14.0"
+version = "3.20.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "28cce251fcbc87fac86a866eeb0d6c2d536fc16d06f184bb61aeae11aa4cee0c"
+checksum = "e8a64e3985349f2441a1a9ef0b853f869006c3855f2cda6862a94d26ebb9d6a1"
 dependencies = [
- "cfg-if",
  "fastrand",
+ "getrandom",
  "once_cell",
  "rustix",
  "windows-sys",
@@ -242,6 +260,15 @@ dependencies = [
  "winapi-util",
 ]
 
+[[package]]
+name = "wasi"
+version = "0.14.2+wasi-0.2.4"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9683f9a5a998d873c0d21fcbe3c083009670149a8fab228644b8bd36b2c48cb3"
+dependencies = [
+ "wit-bindgen-rt",
+]
+
 [[package]]
 name = "winapi"
 version = "0.3.9"
@@ -345,3 +372,12 @@ name = "windows_x86_64_msvc"
 version = "0.52.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec"
+
+[[package]]
+name = "wit-bindgen-rt"
+version = "0.39.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "6f42320e61fe2cfd34354ecb597f86f413484a798ba44a8ca1165c58d42da6c1"
+dependencies = [
+ "bitflags",
+]

From 8392a0041fd2d0e2826689a7723d921c801b0d6b Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Mon, 16 Jun 2025 17:33:03 +0200
Subject: [PATCH 928/997] Make the `tempfile` version in `Cargo.toml` matches
 the one in `Cargo.lock`

---
 Cargo.toml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Cargo.toml b/Cargo.toml
index c692a90f0a4a..c284e3f060b8 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -31,7 +31,7 @@ gccjit = "2.7"
 [dev-dependencies]
 boml = "0.3.1"
 lang_tester = "0.8.0"
-tempfile = "3.7.1"
+tempfile = "3.20"
 
 [profile.dev]
 # By compiling dependencies with optimizations, performing tests gets much faster.

From b2b117ee281c817e1edbe34429a5a77faa2f3ece Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Thu, 19 Jun 2025 13:45:14 +0200
Subject: [PATCH 929/997] Fixed some clippy warnings.

---
 build_system/src/abi_test.rs | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/build_system/src/abi_test.rs b/build_system/src/abi_test.rs
index 421bc387ce84..3c1531be27a5 100644
--- a/build_system/src/abi_test.rs
+++ b/build_system/src/abi_test.rs
@@ -13,13 +13,16 @@ fn show_usage() {
 
 pub fn run() -> Result<(), String> {
     let mut args = std::env::args().skip(2);
+    // FractalFir: In the future, I'd like to add some more subcommands / options.
+    // So, this loop ought to stay for that purpose. It should also stay as a while loop(to parse args)
+    #[allow(clippy::never_loop, clippy::while_let_on_iterator)]
     while let Some(arg) = args.next() {
         match arg.as_str() {
             "--help" => {
                 show_usage();
                 return Ok(());
             }
-            _ => return Err(format!("Unknown option {}", arg)),
+            _ => return Err(format!("Unknown option {arg:?}")),
         }
     }
     // Ensure that we have a cloned version of abi-cafe on hand.
@@ -56,7 +59,7 @@ pub fn run() -> Result<(), String> {
         &"c_calls_cg_gcc",
     ];
     // Run ABI cafe.
-    run_command_with_output(cmd, Some(&Path::new("clones/abi-cafe")))?;
+    run_command_with_output(cmd, Some(Path::new("clones/abi-cafe")))?;
 
     Ok(())
 }

From 8571aee6872ecfc489149eb9865d44add463e284 Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Thu, 19 Jun 2025 23:31:18 +0200
Subject: [PATCH 930/997] Skip needless calls to get_align in some cases.

---
 src/builder.rs | 40 +++++++++++++++++++++++++++-------------
 src/context.rs |  7 +++++++
 2 files changed, 34 insertions(+), 13 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 2c5ae3fff7be..38ebf9974bf3 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -938,22 +938,36 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn load(&mut self, pointee_ty: Type<'gcc>, ptr: RValue<'gcc>, align: Align) -> RValue<'gcc> {
         let block = self.llbb();
         let function = block.get_function();
+        // NOTE(FractalFir): In some cases, we *should* skip the call to get_aligned.
+        // For example, calling `get_aligned` on a i8 is pointless(since it can only be 1 aligned)
+        // Calling get_aligned on a `u128`/`i128` causes the attribute to become "stacked"
+        //
+        // From GCCs perspective:
+        // __int128_t  __attribute__((aligned(16)))  __attribute__((aligned(16)))
+        // and:
+        // __int128_t  __attribute__((aligned(16)))
+        // are 2 distinct, incompatible types.
+        //
+        // So, we skip the call to `get_aligned` in such a case. *Ideally*, we could do this for all the types,
+        // but the GCC APIs to facilitate this just aren't quite there yet.
+
+        // This checks that we only skip `get_aligned` on 128 bit ints if they have the correct alignment.
+        // Otherwise, this may be an under-aligned load, so we will still call get_aligned.
+        let mut can_skip_align = (pointee_ty == self.cx.u128_type
+            || pointee_ty == self.cx.i128_type)
+            && align == self.int128_align;
+        // We can skip the call to `get_aligned` for byte-sized types with alignment of 1.
+        can_skip_align = can_skip_align
+            || (pointee_ty == self.cx.u8_type || pointee_ty == self.cx.i8_type)
+                && align.bytes() == 1;
+        // Skip the call to `get_aligned` when possible.
+        let aligned_type =
+            if can_skip_align { pointee_ty } else { pointee_ty.get_aligned(align.bytes()) };
+
+        let ptr = self.context.new_cast(self.location, ptr, aligned_type.make_pointer());
         // NOTE: instead of returning the dereference here, we have to assign it to a variable in
         // the current basic block. Otherwise, it could be used in another basic block, causing a
         // dereference after a drop, for instance.
-        // FIXME(antoyo): this check that we don't call get_aligned() a second time on a type.
-        // Ideally, we shouldn't need to do this check.
-        // FractalFir: the `align == self.int128_align` check ensures we *do* call `get_aligned` if
-        // the alignment of a `u128`/`i128` is not the one mandated by the ABI. This ensures we handle
-        // under-aligned loads correctly.
-        let aligned_type = if (pointee_ty == self.cx.u128_type || pointee_ty == self.cx.i128_type)
-            && align == self.int128_align
-        {
-            pointee_ty
-        } else {
-            pointee_ty.get_aligned(align.bytes())
-        };
-        let ptr = self.context.new_cast(self.location, ptr, aligned_type.make_pointer());
         let deref = ptr.dereference(self.location).to_rvalue();
         let loaded_value = function.new_local(
             self.location,
diff --git a/src/context.rs b/src/context.rs
index 8a2bf654ed2b..8454e49c66e3 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -157,6 +157,13 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
                 .layout_of(ty::TypingEnv::fully_monomorphized().as_query_input(rust_type))
                 .unwrap();
             let align = layout.align.abi.bytes();
+            // For types with size 1, the alignment can be 1 and only 1
+            // So, we can skip the call to ``get_aligned`.
+            // In the future, we can add a GCC API to query the type align,
+            // and call `get_aligned` if and only if that differs from Rust's expectations.
+            if layout.size.bytes() == 1 {
+                return context.new_c_type(ctype);
+            }
             #[cfg(feature = "master")]
             {
                 context.new_c_type(ctype).get_aligned(align)

From b03f7f87ff67d9589c51e56beac3734b0fb5349e Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Wed, 25 Jun 2025 12:22:21 +0200
Subject: [PATCH 931/997] Refactored the codebase to use Function instead of
 RValue where possible.

---
 src/builder.rs       |  3 +--
 src/context.rs       | 12 +++++-------
 src/debuginfo.rs     |  6 +++---
 src/declare.rs       |  5 ++---
 src/intrinsic/mod.rs |  7 +++----
 5 files changed, 14 insertions(+), 19 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 2c5ae3fff7be..0939c84144e7 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -520,8 +520,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         self.block
     }
 
-    fn append_block(cx: &'a CodegenCx<'gcc, 'tcx>, func: RValue<'gcc>, name: &str) -> Block<'gcc> {
-        let func = cx.rvalue_as_function(func);
+    fn append_block(_: &'a CodegenCx<'gcc, 'tcx>, func: Function<'gcc>, name: &str) -> Block<'gcc> {
         func.new_block(name)
     }
 
diff --git a/src/context.rs b/src/context.rs
index 8a2bf654ed2b..45b3bd06e13f 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -375,8 +375,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 impl<'gcc, 'tcx> BackendTypes for CodegenCx<'gcc, 'tcx> {
     type Value = RValue<'gcc>;
     type Metadata = RValue<'gcc>;
-    // TODO(antoyo): change to Function<'gcc>.
-    type Function = RValue<'gcc>;
+    type Function = Function<'gcc>;
 
     type BasicBlock = Block<'gcc>;
     type Type = Type<'gcc>;
@@ -394,11 +393,10 @@ impl<'gcc, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         &self.vtables
     }
 
-    fn get_fn(&self, instance: Instance<'tcx>) -> RValue<'gcc> {
+    fn get_fn(&self, instance: Instance<'tcx>) -> Function<'gcc> {
         let func = get_fn(self, instance);
         *self.current_func.borrow_mut() = Some(func);
-        // FIXME(antoyo): this is a wrong cast. That requires changing the compiler API.
-        unsafe { std::mem::transmute(func) }
+        func
     }
 
     fn get_fn_addr(&self, instance: Instance<'tcx>) -> RValue<'gcc> {
@@ -487,11 +485,11 @@ impl<'gcc, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         self.codegen_unit
     }
 
-    fn set_frame_pointer_type(&self, _llfn: RValue<'gcc>) {
+    fn set_frame_pointer_type(&self, _llfn: Function<'gcc>) {
         // TODO(antoyo)
     }
 
-    fn apply_target_cpu_attr(&self, _llfn: RValue<'gcc>) {
+    fn apply_target_cpu_attr(&self, _llfn: Function<'gcc>) {
         // TODO(antoyo)
     }
 
diff --git a/src/debuginfo.rs b/src/debuginfo.rs
index e0597d0030d5..66ef12d2a855 100644
--- a/src/debuginfo.rs
+++ b/src/debuginfo.rs
@@ -1,7 +1,7 @@
 use std::ops::Range;
 use std::sync::Arc;
 
-use gccjit::{Location, RValue};
+use gccjit::{Function, Location, RValue};
 use rustc_abi::Size;
 use rustc_codegen_ssa::mir::debuginfo::{DebugScope, FunctionDebugContext, VariableKind};
 use rustc_codegen_ssa::traits::{DebugInfoBuilderMethods, DebugInfoCodegenMethods};
@@ -225,7 +225,7 @@ impl<'gcc, 'tcx> DebugInfoCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         &self,
         instance: Instance<'tcx>,
         fn_abi: &FnAbi<'tcx, Ty<'tcx>>,
-        llfn: RValue<'gcc>,
+        llfn: Function<'gcc>,
         mir: &mir::Body<'tcx>,
     ) -> Option<FunctionDebugContext<'tcx, Self::DIScope, Self::DILocation>> {
         if self.sess().opts.debuginfo == DebugInfo::None {
@@ -276,7 +276,7 @@ impl<'gcc, 'tcx> DebugInfoCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         &self,
         _instance: Instance<'tcx>,
         _fn_abi: &FnAbi<'tcx, Ty<'tcx>>,
-        _maybe_definition_llfn: Option<RValue<'gcc>>,
+        _maybe_definition_llfn: Option<Function<'gcc>>,
     ) -> Self::DIScope {
         // TODO(antoyo): implement.
     }
diff --git a/src/declare.rs b/src/declare.rs
index bed82073e2c4..691fd8729e39 100644
--- a/src/declare.rs
+++ b/src/declare.rs
@@ -94,7 +94,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         _fn_type: Type<'gcc>,
         #[cfg(feature = "master")] callconv: Option<FnAttribute<'gcc>>,
         #[cfg(not(feature = "master"))] callconv: Option<()>,
-    ) -> RValue<'gcc> {
+    ) -> Function<'gcc> {
         // TODO(antoyo): use the fn_type parameter.
         let const_string = self.context.new_type::<u8>().make_pointer().make_pointer();
         let return_type = self.type_i32();
@@ -111,8 +111,7 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         // NOTE: it is needed to set the current_func here as well, because get_fn() is not called
         // for the main function.
         *self.current_func.borrow_mut() = Some(func);
-        // FIXME(antoyo): this is a wrong cast. That requires changing the compiler API.
-        unsafe { std::mem::transmute(func) }
+        func
     }
 
     pub fn declare_fn(&self, name: &str, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> Function<'gcc> {
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index ba85bc2beff7..8401e78bd2ff 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -1484,10 +1484,9 @@ fn gen_fn<'a, 'gcc, 'tcx>(
     // FIXME(eddyb) find a nicer way to do this.
     cx.linkage.set(FunctionType::Internal);
     let func = cx.declare_fn(name, fn_abi);
-    let func_val = unsafe { std::mem::transmute::<Function<'gcc>, RValue<'gcc>>(func) };
-    cx.set_frame_pointer_type(func_val);
-    cx.apply_target_cpu_attr(func_val);
-    let block = Builder::append_block(cx, func_val, "entry-block");
+    cx.set_frame_pointer_type(func);
+    cx.apply_target_cpu_attr(func);
+    let block = Builder::append_block(cx, func, "entry-block");
     let bx = Builder::build(cx, block);
     codegen(bx);
     (return_type, func)

From 413821fcbd3ac0f7448b37334f6fe60cb2bc10a3 Mon Sep 17 00:00:00 2001
From: michal kostrubiec <fractalfirdev@gmail.com>
Date: Thu, 26 Jun 2025 11:00:31 +0200
Subject: [PATCH 932/997] Remove unnecesary uses of the 'current_func' field,
 replacing it with a call to function.

---
 src/intrinsic/mod.rs | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 8401e78bd2ff..4bebfee170b0 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -426,7 +426,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
                 match int_type_width_signed(ty, self) {
                     Some((width, signed)) => match name {
                         sym::ctlz | sym::cttz => {
-                            let func = self.current_func.borrow().expect("func");
+                            let func = self.current_func();
                             let then_block = func.new_block("then");
                             let else_block = func.new_block("else");
                             let after_block = func.new_block("after");
@@ -1108,7 +1108,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         // for (int counter = 0; value != 0; counter++) {
         //     value &= value - 1;
         // }
-        let func = self.current_func.borrow().expect("func");
+        let func = self.current_func();
         let loop_head = func.new_block("head");
         let loop_body = func.new_block("body");
         let loop_tail = func.new_block("tail");
@@ -1187,7 +1187,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let result_type = lhs.get_type();
         if signed {
             // Based on algorithm from: https://stackoverflow.com/a/56531252/389119
-            let func = self.current_func.borrow().expect("func");
+            let func = self.current_func();
             let res = func.new_local(self.location, result_type, "saturating_sum");
             let supports_native_type = self.is_native_int_type(result_type);
             let overflow = if supports_native_type {
@@ -1258,7 +1258,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let result_type = lhs.get_type();
         if signed {
             // Based on algorithm from: https://stackoverflow.com/a/56531252/389119
-            let func = self.current_func.borrow().expect("func");
+            let func = self.current_func();
             let res = func.new_local(self.location, result_type, "saturating_diff");
             let supports_native_type = self.is_native_int_type(result_type);
             let overflow = if supports_native_type {

From 7c71c8388fbe1a06a160e43ff6a37e335cc8e00f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 28 Jun 2025 14:44:54 -0400
Subject: [PATCH 933/997] Fix type_name intrinsic

---
 src/builder.rs | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/builder.rs b/src/builder.rs
index 96e3773c7c48..f995220f75d8 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1105,7 +1105,13 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // TODO(antoyo)
     }
 
-    fn store(&mut self, val: RValue<'gcc>, ptr: RValue<'gcc>, align: Align) -> RValue<'gcc> {
+    fn store(&mut self, mut val: RValue<'gcc>, ptr: RValue<'gcc>, align: Align) -> RValue<'gcc> {
+        if self.structs_as_pointer.borrow().contains(&val) {
+            // NOTE: hack to workaround a limitation of the rustc API: see comment on
+            // CodegenCx.structs_as_pointer
+            val = val.dereference(self.location).to_rvalue();
+        }
+
         self.store_with_flags(val, ptr, align, MemFlags::empty())
     }
 

From 144989400e64298805690dc923f50a97fbf41c9d Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 28 Jun 2025 14:51:16 -0400
Subject: [PATCH 934/997] Fix to use Function instead of RValue

---
 src/builder.rs | 11 ++++-------
 src/context.rs | 11 ++++-------
 2 files changed, 8 insertions(+), 14 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 148180cf9f1e..102821f6d737 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1570,16 +1570,13 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         aggregate_value
     }
 
-    fn set_personality_fn(&mut self, _personality: RValue<'gcc>) {
+    fn set_personality_fn(&mut self, _personality: Function<'gcc>) {
         #[cfg(feature = "master")]
-        {
-            let personality = self.rvalue_as_function(_personality);
-            self.current_func().set_personality_function(personality);
-        }
+        self.current_func().set_personality_function(_personality);
     }
 
     #[cfg(feature = "master")]
-    fn cleanup_landing_pad(&mut self, pers_fn: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
+    fn cleanup_landing_pad(&mut self, pers_fn: Function<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
         self.set_personality_fn(pers_fn);
 
         // NOTE: insert the current block in a variable so that a later call to invoke knows to
@@ -1610,7 +1607,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         (value1, value2)
     }
 
-    fn filter_landing_pad(&mut self, pers_fn: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
+    fn filter_landing_pad(&mut self, pers_fn: Function<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
         // TODO(antoyo): generate the correct landing pad
         self.cleanup_landing_pad(pers_fn)
     }
diff --git a/src/context.rs b/src/context.rs
index 42f7b4eecb0b..08b47d6cbbb9 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -120,7 +120,7 @@ pub struct CodegenCx<'gcc, 'tcx> {
     /// A counter that is used for generating local symbol names
     local_gen_sym_counter: Cell<usize>,
 
-    eh_personality: Cell<Option<RValue<'gcc>>>,
+    eh_personality: Cell<Option<Function<'gcc>>>,
     #[cfg(feature = "master")]
     pub rust_try_fn: Cell<Option<(Type<'gcc>, Function<'gcc>)>>,
 
@@ -428,7 +428,7 @@ impl<'gcc, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         ptr
     }
 
-    fn eh_personality(&self) -> RValue<'gcc> {
+    fn eh_personality(&self) -> Function<'gcc> {
         // The exception handling personality function.
         //
         // If our compilation unit has the `eh_personality` lang item somewhere
@@ -466,9 +466,7 @@ impl<'gcc, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 let symbol_name = tcx.symbol_name(instance).name;
                 let fn_abi = self.fn_abi_of_instance(instance, ty::List::empty());
                 self.linkage.set(FunctionType::Extern);
-                let func = self.declare_fn(symbol_name, fn_abi);
-                let func: RValue<'gcc> = unsafe { std::mem::transmute(func) };
-                func
+                self.declare_fn(symbol_name, fn_abi)
             }
             _ => {
                 let name = if wants_msvc_seh(self.sess()) {
@@ -476,8 +474,7 @@ impl<'gcc, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
                 } else {
                     "rust_eh_personality"
                 };
-                let func = self.declare_func(name, self.type_i32(), &[], true);
-                unsafe { std::mem::transmute::<Function<'gcc>, RValue<'gcc>>(func) }
+                self.declare_func(name, self.type_i32(), &[], true)
             }
         };
         // TODO(antoyo): apply target cpu attributes.

From eb4d42951556853481ea3d5834403f23b6e9f133 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 28 Jun 2025 14:55:31 -0400
Subject: [PATCH 935/997] Fix for libgccjit 12

---
 src/builder.rs       | 2 +-
 src/intrinsic/mod.rs | 4 +++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 102821f6d737..05620c621a90 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1597,7 +1597,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     #[cfg(not(feature = "master"))]
-    fn cleanup_landing_pad(&mut self, _pers_fn: RValue<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
+    fn cleanup_landing_pad(&mut self, _pers_fn: Function<'gcc>) -> (RValue<'gcc>, RValue<'gcc>) {
         let value1 = self
             .current_func()
             .new_local(self.location, self.u8_type.make_pointer(), "landing_pad0")
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index c7bda8a59787..d2396b276cf9 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -4,7 +4,9 @@ mod simd;
 #[cfg(feature = "master")]
 use std::iter;
 
-use gccjit::{ComparisonOp, Function, FunctionType, RValue, ToRValue, Type, UnaryOp};
+#[cfg(feature = "master")]
+use gccjit::Type;
+use gccjit::{ComparisonOp, Function, FunctionType, RValue, ToRValue, UnaryOp};
 #[cfg(feature = "master")]
 use rustc_abi::ExternAbi;
 use rustc_abi::{BackendRepr, HasDataLayout};

From c7c16223ce2fd4deab0269dd1ff2504042f88772 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 28 Jun 2025 15:17:42 -0400
Subject: [PATCH 936/997] Ignore failing test

---
 tests/failing-ui-tests.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index d931f0d3b5eb..544d0bfc7105 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -9,6 +9,7 @@ tests/ui/iterators/iter-sum-overflow-debug.rs
 tests/ui/iterators/iter-sum-overflow-overflow-checks.rs
 tests/ui/mir/mir_drop_order.rs
 tests/ui/mir/mir_let_chains_drop_order.rs
+tests/ui/mir/mir_match_guard_let_chains_drop_order.rs
 tests/ui/oom_unwind.rs
 tests/ui/panic-runtime/abort-link-to-unwinding-crates.rs
 tests/ui/panic-runtime/abort.rs

From 49e65a04590250edd90561fa9e717988a23aaf7b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 28 Jun 2025 15:38:35 -0400
Subject: [PATCH 937/997] Remove commented code

---
 src/common.rs | 13 -------------
 1 file changed, 13 deletions(-)

diff --git a/src/common.rs b/src/common.rs
index 58ff2f1f8f06..fdd47821b515 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -234,19 +234,6 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
         match cv {
             Scalar::Int(int) => {
                 let data = int.to_bits(layout.size(self));
-
-                // FIXME(antoyo): there's some issues with using the u128 code that follows, so hard-code
-                // the paths for floating-point values.
-                // TODO: Remove this code?
-                /*if ty == self.float_type {
-                    return self
-                        .context
-                        .new_rvalue_from_double(ty, f32::from_bits(data as u32) as f64);
-                }
-                if ty == self.double_type {
-                    return self.context.new_rvalue_from_double(ty, f64::from_bits(data as u64));
-                }*/
-
                 let value = self.const_uint_big(self.type_ix(bitsize), data);
                 let bytesize = layout.size(self).bytes();
                 if bitsize > 1 && ty.is_integral() && bytesize as u32 == ty.get_size() {

From f876b18783906cdd5a4910ead475351c33c947ab Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 28 Jun 2025 15:40:48 -0400
Subject: [PATCH 938/997] Add TODOs

---
 src/builder.rs       | 1 +
 src/intrinsic/mod.rs | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/src/builder.rs b/src/builder.rs
index 05620c621a90..100091692bab 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -781,6 +781,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
                 return self.context.new_call(self.location, fmod, &[a, b]);
             }
             TypeKind::FP128 => {
+                // TODO(antoyo): use get_simple_function_f128_2args.
                 let f128_type = self.type_f128();
                 let fmodf128 = self.context.new_function(
                     None,
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index d2396b276cf9..6d6f363225d4 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -266,6 +266,8 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
         let fn_args = instance.args;
 
         let simple = get_simple_intrinsic(self, name);
+        // TODO(antoyo): Only call get_simple_function_f128 and get_simple_function_f128_2args when
+        // it is the symbols for the supported f128 builtins.
         let simple_func = get_simple_function(self, name)
             .or_else(|| get_simple_function_f128(self, name))
             .or_else(|| get_simple_function_f128_2args(self, name));

From 8385f3c4b0b888f4d4fb41ce10b892ca19e4ddce Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 28 Jun 2025 15:41:58 -0400
Subject: [PATCH 939/997] Stop skipping libcore's f16::test_total_cmp

---
 build_system/src/test.rs | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index bcaab0fb526b..f1f31f83ca24 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -738,14 +738,7 @@ fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
     let path = get_sysroot_dir().join("sysroot_src/library/coretests");
     let _ = remove_dir_all(path.join("target"));
     // TODO(antoyo): run in release mode when we fix the failures.
-    // TODO(antoyo): remove the --skip f16::test_total_cmp when this issue is fixed:
-    // https://github.com/rust-lang/rust/issues/141503
-    run_cargo_command(
-        &[&"test", &"--", &"--skip", &"f16::test_total_cmp"],
-        Some(&path),
-        env,
-        args,
-    )?;
+    run_cargo_command(&[&"test"], Some(&path), env, args)?;
     Ok(())
 }
 

From a80f3c4a84b8bbb5b72f95acc63e09d8124ab6bd Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 28 Jun 2025 16:31:38 -0400
Subject: [PATCH 940/997] Fix clippy warnings

---
 src/abi.rs | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/abi.rs b/src/abi.rs
index 08f3d2819040..0b359f1c5c81 100644
--- a/src/abi.rs
+++ b/src/abi.rs
@@ -1,7 +1,9 @@
 #[cfg(feature = "master")]
 use gccjit::FnAttribute;
 use gccjit::{ToLValue, ToRValue, Type};
-use rustc_abi::{ArmCall, CanonAbi, InterruptKind, Reg, RegKind, X86Call};
+#[cfg(feature = "master")]
+use rustc_abi::{ArmCall, CanonAbi, InterruptKind, X86Call};
+use rustc_abi::{Reg, RegKind};
 use rustc_codegen_ssa::traits::{AbiBuilderMethods, BaseTypeCodegenMethods};
 use rustc_data_structures::fx::FxHashSet;
 use rustc_middle::bug;

From 38fa4a4861d5d0241c8a9b980d5fb2bf84530de2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 28 Jun 2025 18:08:26 -0400
Subject: [PATCH 941/997] Fix sysroot Cargo.toml for compiler-builtins

---
 build_system/build_sysroot/Cargo.toml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/build_system/build_sysroot/Cargo.toml b/build_system/build_sysroot/Cargo.toml
index 931f6097abc2..29a3bcec304c 100644
--- a/build_system/build_sysroot/Cargo.toml
+++ b/build_system/build_sysroot/Cargo.toml
@@ -6,6 +6,7 @@ resolver = "2"
 
 [dependencies]
 core = { path = "./sysroot_src/library/core" }
+compiler_builtins = { path = "./sysroot_src/library/compiler-builtins/compiler-builtins" }
 alloc = { path = "./sysroot_src/library/alloc" }
 std = { path = "./sysroot_src/library/std", features = ["panic_unwind", "backtrace"] }
 test = { path = "./sysroot_src/library/test" }

From e3bb127a32f4e01b52ddf026e1fa21e0d828e5e3 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 28 Jun 2025 19:55:17 -0400
Subject: [PATCH 942/997] Add support for copysignf16 intrinsic

---
 src/intrinsic/mod.rs | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index a221f2a7cf24..b61a43dde8f1 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -225,6 +225,7 @@ fn f16_builtin<'gcc, 'tcx>(
     let f32_type = cx.type_f32();
     let builtin_name = match name {
         sym::ceilf16 => "__builtin_ceilf",
+        sym::copysignf16 => "__builtin_copysignf",
         sym::floorf16 => "__builtin_floorf",
         sym::fmaf16 => "fmaf",
         sym::maxnumf16 => "__builtin_fmaxf",
@@ -294,6 +295,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
                 )
             }
             sym::ceilf16
+            | sym::copysignf16
             | sym::floorf16
             | sym::fmaf16
             | sym::maxnumf16

From fe8b5e6cd2b13750bfb5a1feda233f640bd84671 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 28 Jun 2025 19:57:07 -0400
Subject: [PATCH 943/997] Remove now useless patch for run-make test

---
 build_system/src/test.rs                      | 24 ------------------
 ...karound-to-make-a-run-make-test-pass.patch | 25 -------------------
 2 files changed, 49 deletions(-)
 delete mode 100644 patches/tests/0001-Workaround-to-make-a-run-make-test-pass.patch

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index f1f31f83ca24..1aaa38770614 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -485,30 +485,6 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
         run_command_with_output_and_env(&[&"git", &"checkout"], rust_dir, Some(env))?;
     }
 
-    let mut patches = Vec::new();
-    walk_dir(
-        "patches/tests",
-        &mut |_| Ok(()),
-        &mut |file_path: &Path| {
-            patches.push(file_path.to_path_buf());
-            Ok(())
-        },
-        false,
-    )?;
-    patches.sort();
-    // TODO: remove duplication with prepare.rs by creating a apply_patch function in the utils
-    // module.
-    for file_path in patches {
-        println!("[GIT] apply `{}`", file_path.display());
-        let path = Path::new("../..").join(file_path);
-        run_command_with_output(&[&"git", &"apply", &path], rust_dir)?;
-        run_command_with_output(&[&"git", &"add", &"-A"], rust_dir)?;
-        run_command_with_output(
-            &[&"git", &"commit", &"--no-gpg-sign", &"-m", &format!("Patch {}", path.display())],
-            rust_dir,
-        )?;
-    }
-
     let cargo = String::from_utf8(
         run_command_with_env(&[&"rustup", &"which", &"cargo"], rust_dir, Some(env))?.stdout,
     )
diff --git a/patches/tests/0001-Workaround-to-make-a-run-make-test-pass.patch b/patches/tests/0001-Workaround-to-make-a-run-make-test-pass.patch
deleted file mode 100644
index a329d09a95e5..000000000000
--- a/patches/tests/0001-Workaround-to-make-a-run-make-test-pass.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From a131c69e54b5c02fe3b517e8f3ad23d4f784ffc8 Mon Sep 17 00:00:00 2001
-From: Antoni Boucher <bouanto@zoho.com>
-Date: Fri, 13 Jun 2025 20:25:33 -0400
-Subject: [PATCH] Workaround to make a run-make test pass
-
----
- tests/run-make/linker-warning/rmake.rs | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/tests/run-make/linker-warning/rmake.rs b/tests/run-make/linker-warning/rmake.rs
-index bc21739fefc..0946a7e2a48 100644
---- a/tests/run-make/linker-warning/rmake.rs
-+++ b/tests/run-make/linker-warning/rmake.rs
-@@ -55,7 +55,7 @@ fn main() {
-         diff()
-             .expected_file("short-error.txt")
-             .actual_text("(linker error)", out.stderr())
--            .normalize(r#"/rustc[^/]*/"#, "/rustc/")
-+            .normalize(r#"/tmp/rustc[^/]*/"#, "/tmp/rustc/")
-             .normalize(
-                 regex::escape(run_make_support::build_root().to_str().unwrap()),
-                 "/build-root",
--- 
-2.49.0
-

From 99780df8add4790dd838d5172257d6e66124597a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 28 Jun 2025 20:02:52 -0400
Subject: [PATCH 944/997] Fix intrinsic copysignf128

---
 build_system/src/test.rs | 4 ++--
 src/intrinsic/mod.rs     | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/build_system/src/test.rs b/build_system/src/test.rs
index 1aaa38770614..cbb0f9493838 100644
--- a/build_system/src/test.rs
+++ b/build_system/src/test.rs
@@ -9,8 +9,8 @@ use crate::build;
 use crate::config::{Channel, ConfigInfo};
 use crate::utils::{
     create_dir, get_sysroot_dir, get_toolchain, git_clone, git_clone_root_dir, remove_file,
-    run_command, run_command_with_env, run_command_with_output, run_command_with_output_and_env,
-    rustc_version_info, split_args, walk_dir,
+    run_command, run_command_with_env, run_command_with_output_and_env, rustc_version_info,
+    split_args, walk_dir,
 };
 
 type Env = HashMap<String, String>;
diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index b61a43dde8f1..9d3c15294a99 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -78,7 +78,6 @@ fn get_simple_intrinsic<'gcc, 'tcx>(
         sym::maxnumf64 => "fmax",
         sym::copysignf32 => "copysignf",
         sym::copysignf64 => "copysign",
-        sym::copysignf128 => "copysignl",
         sym::floorf32 => "floorf",
         sym::floorf64 => "floor",
         sym::ceilf32 => "ceilf",
@@ -202,6 +201,7 @@ fn get_simple_function_f128_2args<'gcc, 'tcx>(
     let func_name = match name {
         sym::maxnumf128 => "fmaxf128",
         sym::minnumf128 => "fminf128",
+        sym::copysignf128 => "copysignf128",
         _ => return None,
     };
     Some(cx.context.new_function(

From 769fb751197699b7d9e7a9f69421b27617568732 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 29 Jun 2025 10:48:58 -0400
Subject: [PATCH 945/997] Fix exactudiv and exactsdiv for gcc without 128-bit
 integers

---
 src/builder.rs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 1fce547ad1b4..6795d84da8bd 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -700,7 +700,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         let a = self.gcc_int_cast(a, a_type);
         let b_type = b.get_type().to_unsigned(self);
         let b = self.gcc_int_cast(b, b_type);
-        a / b
+        self.gcc_udiv(a, b)
     }
 
     fn sdiv(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
@@ -712,8 +712,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // FIXME(antoyo): rustc_codegen_ssa::mir::intrinsic uses different types for a and b but they
         // should be the same.
         let typ = a.get_type().to_signed(self);
-        let b = self.context.new_cast(self.location, b, typ);
-        a / b
+        let b = self.gcc_int_cast(b, typ);
+        self.gcc_sdiv(a, b)
     }
 
     fn fdiv(&mut self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {

From 67d8469c2683a5351a13a19ea1b5cc3b07beb356 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 29 Jun 2025 14:21:51 -0400
Subject: [PATCH 946/997] Add support for a few missing LLVM intrinsics

---
 src/intrinsic/llvm.rs | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 0b77694f1156..47b30ceae85a 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -648,6 +648,12 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 new_args.push(handle);
                 args = new_args.into();
             }
+            "__builtin_ia32_rdtscp" => {
+                let ptr_type = builder.u32_type.make_pointer();
+                let result = builder.current_func().new_local(None, ptr_type, "result");
+                let new_args = vec![result.to_rvalue()];
+                args = new_args.into();
+            }
             _ => (),
         }
     } else {
@@ -764,6 +770,14 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 new_args.swap(0, 1);
                 args = new_args.into();
             }
+            "__builtin_ia32_dpps256" => {
+                let mut new_args = args.to_vec();
+                // NOTE: without this cast to u8 (and it needs to be a u8 to fix the issue), we
+                // would get the following error:
+                // the last argument must be an 8-bit immediate
+                new_args[2] = builder.context.new_cast(None, new_args[2], builder.cx.type_u8());
+                args = new_args.into();
+            }
             _ => (),
         }
     }
@@ -935,6 +949,19 @@ pub fn adjust_intrinsic_return_value<'a, 'gcc, 'tcx>(
             );
             return_value = result.to_rvalue();
         }
+        "__builtin_ia32_rdtscp" => {
+            let field1 = builder.context.new_field(None, return_value.get_type(), "rdtscpField1");
+            let return2 = args[0].dereference(None).to_rvalue();
+            let field2 = builder.context.new_field(None, return2.get_type(), "rdtscpField2");
+            let struct_type =
+                builder.context.new_struct_type(None, "rdtscpResult", &[field1, field2]);
+            return_value = builder.context.new_struct_constructor(
+                None,
+                struct_type.as_type(),
+                None,
+                &[return_value, return2],
+            );
+        }
         _ => (),
     }
 
@@ -1529,6 +1556,17 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.aesdecwide128kl" => "__builtin_ia32_aesdecwide128kl_u8",
         "llvm.x86.aesencwide256kl" => "__builtin_ia32_aesencwide256kl_u8",
         "llvm.x86.aesdecwide256kl" => "__builtin_ia32_aesdecwide256kl_u8",
+        "llvm.x86.avx512.uitofp.round.v8f16.v8i16" => "__builtin_ia32_vcvtuw2ph128_mask",
+        "llvm.x86.avx512.uitofp.round.v16f16.v16i16" => "__builtin_ia32_vcvtuw2ph256_mask",
+        "llvm.x86.avx512.uitofp.round.v32f16.v32i16" => "__builtin_ia32_vcvtuw2ph512_mask_round",
+        "llvm.x86.avx512.uitofp.round.v8f16.v8i32" => "__builtin_ia32_vcvtudq2ph256_mask",
+        "llvm.x86.avx512.uitofp.round.v16f16.v16i32" => "__builtin_ia32_vcvtudq2ph512_mask_round",
+        "llvm.x86.avx512.uitofp.round.v8f16.v8i64" => "__builtin_ia32_vcvtuqq2ph512_mask_round",
+        "llvm.x86.avx512.uitofp.round.v8f64.v8i64" => "__builtin_ia32_cvtuqq2pd512_mask",
+        "llvm.x86.avx512.uitofp.round.v2f64.v2i64" => "__builtin_ia32_cvtuqq2pd128_mask",
+        "llvm.x86.avx512.uitofp.round.v4f64.v4i64" => "__builtin_ia32_cvtuqq2pd256_mask",
+        "llvm.x86.avx512.uitofp.round.v8f32.v8i64" => "__builtin_ia32_cvtuqq2ps512_mask",
+        "llvm.x86.avx512.uitofp.round.v4f32.v4i64" => "__builtin_ia32_cvtuqq2ps256_mask",
 
         // TODO: support the tile builtins:
         "llvm.x86.ldtilecfg" => "__builtin_trap",

From 88db5895edf9ae1bb9deabce6ac106375c550582 Mon Sep 17 00:00:00 2001
From: FractalFir <fractalfirdev@gmail.com>
Date: Mon, 30 Jun 2025 00:24:28 +0200
Subject: [PATCH 947/997] Changed intrinsic generation to include full
 intrinsic names in panic messages

---
 tools/generate_intrinsics.py | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/tools/generate_intrinsics.py b/tools/generate_intrinsics.py
index ed0ebf007195..88927f39b93e 100644
--- a/tools/generate_intrinsics.py
+++ b/tools/generate_intrinsics.py
@@ -176,14 +176,14 @@ def update_intrinsics(llvm_path, llvmint, llvmint2):
         out.write("// File generated by `rustc_codegen_gcc/tools/generate_intrinsics.py`\n")
         out.write("// DO NOT EDIT IT!\n")
         out.write("/// Translate a given LLVM intrinsic name to an equivalent GCC one.\n")
-        out.write("fn map_arch_intrinsic(name:&str)->&str{\n")
-        out.write('let Some(name) = name.strip_prefix("llvm.") else { unimplemented!("***** unsupported LLVM intrinsic {}", name) };\n')
+        out.write("fn map_arch_intrinsic(full_name:&str)->&'static str{\n")
+        out.write('let Some(name) = full_name.strip_prefix("llvm.") else { unimplemented!("***** unsupported LLVM intrinsic {}", full_name) };\n')
         out.write('let Some((arch, name)) = name.split_once(\'.\') else { unimplemented!("***** unsupported LLVM intrinsic {}", name) };\n')
         out.write("match arch {\n")
         for arch in archs:
             if len(intrinsics[arch]) == 0:
                 continue
-            out.write("\"{}\" => {{ #[allow(non_snake_case)] fn {}(name: &str) -> &str {{ match name {{".format(arch,arch))
+            out.write("\"{}\" => {{ #[allow(non_snake_case)] fn {}(name: &str,full_name:&str) -> &'static str {{ match name {{".format(arch,arch))
             intrinsics[arch].sort(key=lambda x: (x[0], x[2]))
             out.write('    // {}\n'.format(arch))
             for entry in intrinsics[arch]:
@@ -196,9 +196,9 @@ def update_intrinsics(llvm_path, llvmint, llvmint2):
                     out.write('    // [INVALID CONVERSION]: "{}" => "{}",\n'.format(llvm_name, entry[1]))
                 else:
                     out.write('    "{}" => "{}",\n'.format(llvm_name, entry[1]))
-            out.write('    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),\n')
-            out.write("}} }} {}(name) }}\n,".format(arch))
-        out.write('    _ => unimplemented!("***** unsupported LLVM architecture {}", name),\n')
+            out.write('    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),\n')
+            out.write("}} }} {}(name,full_name) }}\n,".format(arch))
+        out.write('    _ => unimplemented!("***** unsupported LLVM architecture {arch}, intrinsic:{full_name}"),\n')
         out.write("}\n}")
     subprocess.call(["rustfmt", output_file])
     print("Done!")

From c57393e2eada6cbf52acc36232d930e660218d9d Mon Sep 17 00:00:00 2001
From: FractalFir <fractalfirdev@gmail.com>
Date: Mon, 30 Jun 2025 00:24:43 +0200
Subject: [PATCH 948/997] Regenerated intrinsics

---
 src/intrinsic/archs.rs | 124 ++++++++++++++++++++++-------------------
 1 file changed, 66 insertions(+), 58 deletions(-)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index f0352c5e6e5d..915ed875e32f 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -1,9 +1,9 @@
 // File generated by `rustc_codegen_gcc/tools/generate_intrinsics.py`
 // DO NOT EDIT IT!
 /// Translate a given LLVM intrinsic name to an equivalent GCC one.
-fn map_arch_intrinsic(name: &str) -> &str {
-    let Some(name) = name.strip_prefix("llvm.") else {
-        unimplemented!("***** unsupported LLVM intrinsic {}", name)
+fn map_arch_intrinsic(full_name: &str) -> &'static str {
+    let Some(name) = full_name.strip_prefix("llvm.") else {
+        unimplemented!("***** unsupported LLVM intrinsic {}", full_name)
     };
     let Some((arch, name)) = name.split_once('.') else {
         unimplemented!("***** unsupported LLVM intrinsic {}", name)
@@ -11,7 +11,7 @@ fn map_arch_intrinsic(name: &str) -> &str {
     match arch {
         "AMDGPU" => {
             #[allow(non_snake_case)]
-            fn AMDGPU(name: &str) -> &str {
+            fn AMDGPU(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // AMDGPU
                     "div.fixup.f32" => "__builtin_amdgpu_div_fixup",
@@ -42,14 +42,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "trig.preop.f64" => "__builtin_amdgpu_trig_preop",
                     "trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
                     "trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            AMDGPU(name)
+            AMDGPU(name, full_name)
         }
         "aarch64" => {
             #[allow(non_snake_case)]
-            fn aarch64(name: &str) -> &str {
+            fn aarch64(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // aarch64
                     "chkfeat" => "__builtin_arm_chkfeat",
@@ -75,14 +75,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "tcommit" => "__builtin_arm_tcommit",
                     "tstart" => "__builtin_arm_tstart",
                     "ttest" => "__builtin_arm_ttest",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            aarch64(name)
+            aarch64(name, full_name)
         }
         "amdgcn" => {
             #[allow(non_snake_case)]
-            fn amdgcn(name: &str) -> &str {
+            fn amdgcn(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // amdgcn
                     "alignbyte" => "__builtin_amdgcn_alignbyte",
@@ -99,6 +99,8 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "cvt.f32.fp8" => "__builtin_amdgcn_cvt_f32_fp8",
                     "cvt.off.f32.i4" => "__builtin_amdgcn_cvt_off_f32_i4",
                     "cvt.pk.bf8.f32" => "__builtin_amdgcn_cvt_pk_bf8_f32",
+                    "cvt.pk.f16.bf8" => "__builtin_amdgcn_cvt_pk_f16_bf8",
+                    "cvt.pk.f16.fp8" => "__builtin_amdgcn_cvt_pk_f16_fp8",
                     "cvt.pk.f32.bf8" => "__builtin_amdgcn_cvt_pk_f32_bf8",
                     "cvt.pk.f32.fp8" => "__builtin_amdgcn_cvt_pk_f32_fp8",
                     "cvt.pk.fp8.f32" => "__builtin_amdgcn_cvt_pk_fp8_f32",
@@ -292,6 +294,7 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "s.sendmsg" => "__builtin_amdgcn_s_sendmsg",
                     "s.sendmsghalt" => "__builtin_amdgcn_s_sendmsghalt",
                     "s.setprio" => "__builtin_amdgcn_s_setprio",
+                    "s.setprio.inc.wg" => "__builtin_amdgcn_s_setprio_inc_wg",
                     "s.setreg" => "__builtin_amdgcn_s_setreg",
                     "s.sleep" => "__builtin_amdgcn_s_sleep",
                     "s.sleep.var" => "__builtin_amdgcn_s_sleep_var",
@@ -356,14 +359,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "workitem.id.x" => "__builtin_amdgcn_workitem_id_x",
                     "workitem.id.y" => "__builtin_amdgcn_workitem_id_y",
                     "workitem.id.z" => "__builtin_amdgcn_workitem_id_z",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            amdgcn(name)
+            amdgcn(name, full_name)
         }
         "arm" => {
             #[allow(non_snake_case)]
-            fn arm(name: &str) -> &str {
+            fn arm(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // arm
                     "cdp" => "__builtin_arm_cdp",
@@ -465,14 +468,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "usub8" => "__builtin_arm_usub8",
                     "uxtab16" => "__builtin_arm_uxtab16",
                     "uxtb16" => "__builtin_arm_uxtb16",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            arm(name)
+            arm(name, full_name)
         }
         "bpf" => {
             #[allow(non_snake_case)]
-            fn bpf(name: &str) -> &str {
+            fn bpf(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // bpf
                     "btf.type.id" => "__builtin_bpf_btf_type_id",
@@ -487,25 +490,25 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "preserve.field.info" => "__builtin_bpf_preserve_field_info",
                     "preserve.type.info" => "__builtin_bpf_preserve_type_info",
                     "pseudo" => "__builtin_bpf_pseudo",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            bpf(name)
+            bpf(name, full_name)
         }
         "cuda" => {
             #[allow(non_snake_case)]
-            fn cuda(name: &str) -> &str {
+            fn cuda(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // cuda
                     "syncthreads" => "__syncthreads",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            cuda(name)
+            cuda(name, full_name)
         }
         "hexagon" => {
             #[allow(non_snake_case)]
-            fn hexagon(name: &str) -> &str {
+            fn hexagon(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // hexagon
                     "A2.abs" => "__builtin_HEXAGON_A2_abs",
@@ -2479,14 +2482,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "prefetch" => "__builtin_HEXAGON_prefetch",
                     "vmemcpy" => "__builtin_hexagon_vmemcpy",
                     "vmemset" => "__builtin_hexagon_vmemset",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            hexagon(name)
+            hexagon(name, full_name)
         }
         "loongarch" => {
             #[allow(non_snake_case)]
-            fn loongarch(name: &str) -> &str {
+            fn loongarch(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // loongarch
                     "asrtgt.d" => "__builtin_loongarch_asrtgt_d",
@@ -3988,14 +3991,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "movfcsr2gr" => "__builtin_loongarch_movfcsr2gr",
                     "movgr2fcsr" => "__builtin_loongarch_movgr2fcsr",
                     "syscall" => "__builtin_loongarch_syscall",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            loongarch(name)
+            loongarch(name, full_name)
         }
         "mips" => {
             #[allow(non_snake_case)]
-            fn mips(name: &str) -> &str {
+            fn mips(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // mips
                     "absq.s.ph" => "__builtin_mips_absq_s_ph",
@@ -4669,14 +4672,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "wrdsp" => "__builtin_mips_wrdsp",
                     "xor.v" => "__builtin_msa_xor_v",
                     "xori.b" => "__builtin_msa_xori_b",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            mips(name)
+            mips(name, full_name)
         }
         "nvvm" => {
             #[allow(non_snake_case)]
-            fn nvvm(name: &str) -> &str {
+            fn nvvm(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // nvvm
                     "abs.i" => "__nvvm_abs_i",
@@ -5024,6 +5027,7 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "nanosleep" => "__nvvm_nanosleep",
                     "neg.bf16" => "__nvvm_neg_bf16",
                     "neg.bf16x2" => "__nvvm_neg_bf16x2",
+                    "pm.event.mask" => "__nvvm_pm_event_mask",
                     "popc.i" => "__nvvm_popc_i",
                     "popc.ll" => "__nvvm_popc_ll",
                     "prmt" => "__nvvm_prmt",
@@ -5448,14 +5452,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "vote.ballot.sync" => "__nvvm_vote_ballot_sync",
                     "vote.uni" => "__nvvm_vote_uni",
                     "vote.uni.sync" => "__nvvm_vote_uni_sync",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            nvvm(name)
+            nvvm(name, full_name)
         }
         "ppc" => {
             #[allow(non_snake_case)]
-            fn ppc(name: &str) -> &str {
+            fn ppc(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // ppc
                     "addex" => "__builtin_ppc_addex",
@@ -5842,7 +5846,10 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "mulhdu" => "__builtin_ppc_mulhdu",
                     "mulhw" => "__builtin_ppc_mulhw",
                     "mulhwu" => "__builtin_ppc_mulhwu",
+                    "national2packed" => "__builtin_ppc_national2packed",
                     "pack.longdouble" => "__builtin_pack_longdouble",
+                    "packed2national" => "__builtin_ppc_packed2national",
+                    "packed2zoned" => "__builtin_ppc_packed2zoned",
                     "pdepd" => "__builtin_pdepd",
                     "pextd" => "__builtin_pextd",
                     "qpx.qvfabs" => "__builtin_qpx_qvfabs",
@@ -6035,14 +6042,15 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "vsx.xxinsertw" => "__builtin_vsx_xxinsertw",
                     "vsx.xxleqv" => "__builtin_vsx_xxleqv",
                     "vsx.xxpermx" => "__builtin_vsx_xxpermx",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    "zoned2packed" => "__builtin_ppc_zoned2packed",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            ppc(name)
+            ppc(name, full_name)
         }
         "ptx" => {
             #[allow(non_snake_case)]
-            fn ptx(name: &str) -> &str {
+            fn ptx(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // ptx
                     "bar.sync" => "__builtin_ptx_bar_sync",
@@ -6063,14 +6071,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "read.pm3" => "__builtin_ptx_read_pm3",
                     "read.smid" => "__builtin_ptx_read_smid",
                     "read.warpid" => "__builtin_ptx_read_warpid",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            ptx(name)
+            ptx(name, full_name)
         }
         "r600" => {
             #[allow(non_snake_case)]
-            fn r600(name: &str) -> &str {
+            fn r600(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // r600
                     "group.barrier" => "__builtin_r600_group_barrier",
@@ -6088,14 +6096,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "read.tidig.x" => "__builtin_r600_read_tidig_x",
                     "read.tidig.y" => "__builtin_r600_read_tidig_y",
                     "read.tidig.z" => "__builtin_r600_read_tidig_z",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            r600(name)
+            r600(name, full_name)
         }
         "riscv" => {
             #[allow(non_snake_case)]
-            fn riscv(name: &str) -> &str {
+            fn riscv(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // riscv
                     "aes32dsi" => "__builtin_riscv_aes32dsi",
@@ -6119,14 +6127,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "sha512sum0r" => "__builtin_riscv_sha512sum0r",
                     "sha512sum1" => "__builtin_riscv_sha512sum1",
                     "sha512sum1r" => "__builtin_riscv_sha512sum1r",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            riscv(name)
+            riscv(name, full_name)
         }
         "s390" => {
             #[allow(non_snake_case)]
-            fn s390(name: &str) -> &str {
+            fn s390(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // s390
                     "bdepg" => "__builtin_s390_bdepg",
@@ -6313,14 +6321,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "vupllf" => "__builtin_s390_vupllf",
                     "vupllg" => "__builtin_s390_vupllg",
                     "vupllh" => "__builtin_s390_vupllh",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            s390(name)
+            s390(name, full_name)
         }
         "ve" => {
             #[allow(non_snake_case)]
-            fn ve(name: &str) -> &str {
+            fn ve(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // ve
                     "vl.andm.MMM" => "__builtin_ve_vl_andm_MMM",
@@ -7586,14 +7594,14 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "vl.vxor.vvvvl" => "__builtin_ve_vl_vxor_vvvvl",
                     "vl.xorm.MMM" => "__builtin_ve_vl_xorm_MMM",
                     "vl.xorm.mmm" => "__builtin_ve_vl_xorm_mmm",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            ve(name)
+            ve(name, full_name)
         }
         "x86" => {
             #[allow(non_snake_case)]
-            fn x86(name: &str) -> &str {
+            fn x86(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // x86
                     "aadd32" => "__builtin_ia32_aadd32",
@@ -10154,25 +10162,25 @@ fn map_arch_intrinsic(name: &str) -> &str {
                     "xresldtrk" => "__builtin_ia32_xresldtrk",
                     "xsusldtrk" => "__builtin_ia32_xsusldtrk",
                     "xtest" => "__builtin_ia32_xtest",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            x86(name)
+            x86(name, full_name)
         }
         "xcore" => {
             #[allow(non_snake_case)]
-            fn xcore(name: &str) -> &str {
+            fn xcore(name: &str, full_name: &str) -> &'static str {
                 match name {
                     // xcore
                     "bitrev" => "__builtin_bitrev",
                     "getid" => "__builtin_getid",
                     "getps" => "__builtin_getps",
                     "setps" => "__builtin_setps",
-                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
                 }
             }
-            xcore(name)
+            xcore(name, full_name)
         }
-        _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+        _ => unimplemented!("***** unsupported LLVM architecture {arch}, intrinsic:{full_name}"),
     }
 }

From 4347a9273fce785ef1e0e82e0a658417790aaf1a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 29 Jun 2025 18:49:48 -0400
Subject: [PATCH 949/997] Fix handling of __builtin_ia32_rdtscp

---
 src/intrinsic/llvm.rs | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 47b30ceae85a..39dba28b24c9 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -649,9 +649,8 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(
                 args = new_args.into();
             }
             "__builtin_ia32_rdtscp" => {
-                let ptr_type = builder.u32_type.make_pointer();
-                let result = builder.current_func().new_local(None, ptr_type, "result");
-                let new_args = vec![result.to_rvalue()];
+                let result = builder.current_func().new_local(None, builder.u32_type, "result");
+                let new_args = vec![result.get_address(None).to_rvalue()];
                 args = new_args.into();
             }
             _ => (),

From 1926f605f99cf4ff3c7467774a90dcd92d0c3630 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 29 Jun 2025 20:59:25 -0400
Subject: [PATCH 950/997] Fix const_undef

---
 src/builder.rs | 40 ++++++++--------------------------------
 src/common.rs  | 10 +---------
 src/context.rs |  9 ---------
 3 files changed, 9 insertions(+), 50 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 6795d84da8bd..b1785af444a1 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -538,11 +538,6 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     }
 
     fn ret(&mut self, mut value: RValue<'gcc>) {
-        if self.structs_as_pointer.borrow().contains(&value) {
-            // NOTE: hack to workaround a limitation of the rustc API: see comment on
-            // CodegenCx.structs_as_pointer
-            value = value.dereference(self.location).to_rvalue();
-        }
         let expected_return_type = self.current_func().get_return_type();
         if !expected_return_type.is_compatible_with(value.get_type()) {
             // NOTE: due to opaque pointers now being used, we need to cast here.
@@ -1119,13 +1114,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // TODO(antoyo)
     }
 
-    fn store(&mut self, mut val: RValue<'gcc>, ptr: RValue<'gcc>, align: Align) -> RValue<'gcc> {
-        if self.structs_as_pointer.borrow().contains(&val) {
-            // NOTE: hack to workaround a limitation of the rustc API: see comment on
-            // CodegenCx.structs_as_pointer
-            val = val.dereference(self.location).to_rvalue();
-        }
-
+    fn store(&mut self, val: RValue<'gcc>, ptr: RValue<'gcc>, align: Align) -> RValue<'gcc> {
         self.store_with_flags(val, ptr, align, MemFlags::empty())
     }
 
@@ -1508,16 +1497,6 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             element.get_address(self.location)
         } else if value_type.dyncast_vector().is_some() {
             panic!();
-        } else if let Some(pointer_type) = value_type.get_pointee() {
-            if let Some(struct_type) = pointer_type.is_struct() {
-                // NOTE: hack to workaround a limitation of the rustc API: see comment on
-                // CodegenCx.structs_as_pointer
-                aggregate_value
-                    .dereference_field(self.location, struct_type.get_field(idx as i32))
-                    .to_rvalue()
-            } else {
-                panic!("Unexpected type {:?}", value_type);
-            }
         } else if let Some(struct_type) = value_type.is_struct() {
             aggregate_value
                 .access_field(self.location, struct_type.get_field(idx as i32))
@@ -1537,21 +1516,18 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         assert_eq!(idx as usize as u64, idx);
         let value_type = aggregate_value.get_type();
 
+        let new_val = self.current_func().new_local(None, value_type, "aggregate_value");
+        self.block.add_assignment(None, new_val, aggregate_value);
+
         let lvalue = if value_type.dyncast_array().is_some() {
             let index = self
                 .context
                 .new_rvalue_from_long(self.u64_type, i64::try_from(idx).expect("i64::try_from"));
-            self.context.new_array_access(self.location, aggregate_value, index)
+            self.context.new_array_access(self.location, new_val, index)
         } else if value_type.dyncast_vector().is_some() {
             panic!();
-        } else if let Some(pointer_type) = value_type.get_pointee() {
-            if let Some(struct_type) = pointer_type.is_struct() {
-                // NOTE: hack to workaround a limitation of the rustc API: see comment on
-                // CodegenCx.structs_as_pointer
-                aggregate_value.dereference_field(self.location, struct_type.get_field(idx as i32))
-            } else {
-                panic!("Unexpected type {:?}", value_type);
-            }
+        } else if let Some(struct_type) = value_type.is_struct() {
+            new_val.access_field(None, struct_type.get_field(idx as i32))
         } else {
             panic!("Unexpected type {:?}", value_type);
         };
@@ -1568,7 +1544,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         self.llbb().add_assignment(self.location, lvalue, value);
 
-        aggregate_value
+        new_val.to_rvalue()
     }
 
     fn set_personality_fn(&mut self, _personality: Function<'gcc>) {
diff --git a/src/common.rs b/src/common.rs
index fdd47821b515..38348a48e475 100644
--- a/src/common.rs
+++ b/src/common.rs
@@ -117,15 +117,7 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
 
     fn const_undef(&self, typ: Type<'gcc>) -> RValue<'gcc> {
         let local = self.current_func.borrow().expect("func").new_local(None, typ, "undefined");
-        if typ.is_struct().is_some() {
-            // NOTE: hack to workaround a limitation of the rustc API: see comment on
-            // CodegenCx.structs_as_pointer
-            let pointer = local.get_address(None);
-            self.structs_as_pointer.borrow_mut().insert(pointer);
-            pointer
-        } else {
-            local.to_rvalue()
-        }
+        local.to_rvalue()
     }
 
     fn const_poison(&self, typ: Type<'gcc>) -> RValue<'gcc> {
diff --git a/src/context.rs b/src/context.rs
index 1d029811dfe9..665cf22ddbae 100644
--- a/src/context.rs
+++ b/src/context.rs
@@ -124,14 +124,6 @@ pub struct CodegenCx<'gcc, 'tcx> {
 
     pub pointee_infos: RefCell<FxHashMap<(Ty<'tcx>, Size), Option<PointeeInfo>>>,
 
-    /// NOTE: a hack is used because the rustc API is not suitable to libgccjit and as such,
-    /// `const_undef()` returns struct as pointer so that they can later be assigned a value (in
-    /// e.g. Builder::insert_value).
-    /// As such, this set remembers which of these pointers were returned by this function so that
-    /// they can be dereferenced later.
-    /// FIXME(antoyo): fix the rustc API to avoid having this hack.
-    pub structs_as_pointer: RefCell<FxHashSet<RValue<'gcc>>>,
-
     #[cfg(feature = "master")]
     pub cleanup_blocks: RefCell<FxHashSet<Block<'gcc>>>,
     /// The alignment of a u128/i128 type.
@@ -304,7 +296,6 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
             #[cfg(feature = "master")]
             rust_try_fn: Cell::new(None),
             pointee_infos: Default::default(),
-            structs_as_pointer: Default::default(),
             #[cfg(feature = "master")]
             cleanup_blocks: Default::default(),
         };

From 1d2b874b847e2d59a7deb639ef79999b87ee2837 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 1 Jul 2025 18:29:17 -0400
Subject: [PATCH 951/997] Remove OVERWRITE_TARGET_TRIPLE env var now that
 config.sh is gone

---
 .github/workflows/m68k.yml | 13 ++++++++++---
 build_system/src/config.rs | 12 ++++++++----
 doc/tips.md                |  4 ++--
 3 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 245bee7f2a3b..4a8ccebaf797 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -14,8 +14,6 @@ permissions:
 env:
   # Enable backtraces for easier debugging
   RUST_BACKTRACE: 1
-  # TODO: remove when confish.sh is removed.
-  OVERWRITE_TARGET_TRIPLE: m68k-unknown-linux-gnu
 
 jobs:
   build:
@@ -106,7 +104,16 @@ jobs:
 
     - name: Run tests
       run: |
-        ./y.sh test --release --clean --build-sysroot --sysroot-features compiler_builtins/no-f16-f128 ${{ matrix.commands }}
+        ./y.sh test--target-triple m68k-unknown-linux-gnu --release --clean --build-sysroot --sysroot-features compiler_builtins/no-f16-f128 ${{ matrix.commands }}
+
+    - name: Run Hello World!
+      run: |
+        ./y.sh build --target-triple m68k-unknown-linux-gnu
+
+        cd tests/hello-world
+        ../../y.sh cargo build --target m68k-unknown-linux-gnu
+        ../../y.sh cargo run --target m68k-unknown-linux-gnu > hello_world_stdout
+        test $(cat hello_world_stdout) == "Hello, world!" || exit 1
 
   # Summary job for the merge queue.
   # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 650c030ca539..121c43822fdb 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -352,10 +352,14 @@ impl ConfigInfo {
             None => return Err("no host found".to_string()),
         };
 
-        if self.target_triple.is_empty()
-            && let Some(overwrite) = env.get("OVERWRITE_TARGET_TRIPLE")
-        {
-            self.target_triple = overwrite.clone();
+        if self.target_triple.is_empty() {
+            // TODO: set target triple.
+            // TODO: why do we even need to set target_triple?
+            // It seems to only be needed for the linker (we could add an environment variable to
+            // remove this need) and the sysroot (perhaps we could find another way to find it).
+            // TODO TODO: seems like we would still need OVERWRITE_TARGET_TRIPLE when using a
+            // json spec file.
+            // ====> maybe not since we specify both --target and --target-triple.
         }
         if self.target_triple.is_empty() {
             self.target_triple = self.host_triple.clone();
diff --git a/doc/tips.md b/doc/tips.md
index 86c22db186e0..4ab135f3df66 100644
--- a/doc/tips.md
+++ b/doc/tips.md
@@ -63,13 +63,13 @@ generate it in [gimple.md](./doc/gimple.md).
  * Run `./y.sh prepare --cross` so that the sysroot is patched for the cross-compiling case.
  * Set the path to the cross-compiling libgccjit in `gcc-path` (in `config.toml`).
  * Make sure you have the linker for your target (for instance `m68k-unknown-linux-gnu-gcc`) in your `$PATH`. Currently, the linker name is hardcoded as being `$TARGET-gcc`. Specify the target when building the sysroot: `./y.sh build --sysroot --target-triple m68k-unknown-linux-gnu`.
- * Build your project by specifying the target: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../y.sh cargo build --target m68k-unknown-linux-gnu`.
+ * Build your project by specifying the target: `../y.sh cargo build --target m68k-unknown-linux-gnu`.
 
 If the target is not yet supported by the Rust compiler, create a [target specification file](https://docs.rust-embedded.org/embedonomicon/custom-target.html) (note that the `arch` specified in this file must be supported by the rust compiler).
 Then, you can use it the following way:
 
  * Add the target specification file using `--target` as an **absolute** path to build the sysroot: `./y.sh build --sysroot --target-triple m68k-unknown-linux-gnu --target $(pwd)/m68k-unknown-linux-gnu.json`
- * Build your project by specifying the target specification file: `OVERWRITE_TARGET_TRIPLE=m68k-unknown-linux-gnu ../y.sh cargo build --target path/to/m68k-unknown-linux-gnu.json`.
+ * Build your project by specifying the target specification file: `../y.sh cargo build --target path/to/m68k-unknown-linux-gnu.json`.
 
 If you get the following error:
 

From 1bbe5946f231b4c05818fb18f9252b68af251498 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 1 Jul 2025 18:50:39 -0400
Subject: [PATCH 952/997] Fix installation of libgccjit for m68k

---
 .github/workflows/m68k.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 4a8ccebaf797..04e09dc7b8cc 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -57,7 +57,7 @@ jobs:
 
     - name: Setup path to libgccjit
       run: |
-          sudo dpkg -i gcc-m68k-15.deb
+          sudo dpkg --force-overwrite -i gcc-m68k-15.deb
           echo 'gcc-path = "/usr/lib/"' > config.toml
 
     - name: Set env

From 89f0cb3bfc97473a33cb5ae073be6073fa0931b9 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 1 Jul 2025 19:03:08 -0400
Subject: [PATCH 953/997] Specify linker in m68k CI

---
 .github/workflows/m68k.yml | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 04e09dc7b8cc..249fb965be17 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -63,8 +63,6 @@ jobs:
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-        
-        
 
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
@@ -85,7 +83,7 @@ jobs:
       run: |
         ./y.sh prepare --only-libcore --cross
         ./y.sh build --sysroot --features compiler_builtins/no-f16-f128 --target-triple m68k-unknown-linux-gnu --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
-        ./y.sh cargo build --manifest-path=./tests/hello-world/Cargo.toml --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
+        CG_RUSTFLAGS="-Clinker=m68k-unknown-linux-gnu-gcc" ./y.sh cargo build --manifest-path=./tests/hello-world/Cargo.toml --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
         ./y.sh clean all
 
     - name: Build

From cf509d87d909c551c942b315ac16f2722a71db2e Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 1 Jul 2025 19:17:18 -0400
Subject: [PATCH 954/997] Add missing --target-triple flags in m68k CI

---
 .github/workflows/m68k.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 249fb965be17..b78f17c0e26b 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -90,8 +90,8 @@ jobs:
       run: |
         ./y.sh prepare --only-libcore --cross
         ./y.sh build --sysroot --features compiler_builtins/no-f16-f128 --target-triple m68k-unknown-linux-gnu
-        ./y.sh test --mini-tests
-        CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu ./y.sh test --cargo-tests
+        ./y.sh test --mini-tests --target-triple m68k-unknown-linux-gnu
+        CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu ./y.sh test --cargo-tests --target-triple m68k-unknown-linux-gnu
         ./y.sh clean all
 
     - name: Prepare dependencies

From fec79b86a2fb9f7086229d1b94bafd204eec6c27 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 1 Jul 2025 19:35:39 -0400
Subject: [PATCH 955/997] Add missing space before --target-triple

---
 .github/workflows/m68k.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index b78f17c0e26b..511e2ff3dec8 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -102,7 +102,7 @@ jobs:
 
     - name: Run tests
       run: |
-        ./y.sh test--target-triple m68k-unknown-linux-gnu --release --clean --build-sysroot --sysroot-features compiler_builtins/no-f16-f128 ${{ matrix.commands }}
+        ./y.sh test --target-triple m68k-unknown-linux-gnu --release --clean --build-sysroot --sysroot-features compiler_builtins/no-f16-f128 ${{ matrix.commands }}
 
     - name: Run Hello World!
       run: |

From 3021598bdfc5adec0e71401a191e780bdc0060fb Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 1 Jul 2025 19:44:00 -0400
Subject: [PATCH 956/997] Specify the linker when building the test project in
 m68k CI

---
 .github/workflows/m68k.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 511e2ff3dec8..5f347498f325 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -109,8 +109,8 @@ jobs:
         ./y.sh build --target-triple m68k-unknown-linux-gnu
 
         cd tests/hello-world
-        ../../y.sh cargo build --target m68k-unknown-linux-gnu
-        ../../y.sh cargo run --target m68k-unknown-linux-gnu > hello_world_stdout
+        CG_RUSTFLAGS="-Clinker=m68k-unknown-linux-gnu-gcc" ../../y.sh cargo build --target m68k-unknown-linux-gnu
+        CG_RUSTFLAGS="-Clinker=m68k-unknown-linux-gnu-gcc" ../../y.sh cargo run --target m68k-unknown-linux-gnu > hello_world_stdout
         test $(cat hello_world_stdout) == "Hello, world!" || exit 1
 
   # Summary job for the merge queue.

From 0b61286dd3a95522a5c9acea6d941fc27500cd38 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 2 Jul 2025 09:38:38 -0400
Subject: [PATCH 957/997] Fix m68k CI

---
 .github/workflows/m68k.yml | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 245bee7f2a3b..179b36c1c7e9 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -59,14 +59,12 @@ jobs:
 
     - name: Setup path to libgccjit
       run: |
-          sudo dpkg -i gcc-m68k-15.deb
+          sudo dpkg --force-overwrite -i gcc-m68k-15.deb
           echo 'gcc-path = "/usr/lib/"' > config.toml
 
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-        
-        
 
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests

From ed1e9b7015a3b1599d1322a433771b5845beae68 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 2 Jul 2025 09:24:55 -0400
Subject: [PATCH 958/997] Manually run in a VM in the m68k CI

---
 .github/workflows/m68k.yml | 6 ++++--
 build_system/src/config.rs | 1 +
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 5f347498f325..8b8f58fef5fa 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -108,10 +108,12 @@ jobs:
       run: |
         ./y.sh build --target-triple m68k-unknown-linux-gnu
 
+        vm_dir=$(pwd)/vm
         cd tests/hello-world
         CG_RUSTFLAGS="-Clinker=m68k-unknown-linux-gnu-gcc" ../../y.sh cargo build --target m68k-unknown-linux-gnu
-        CG_RUSTFLAGS="-Clinker=m68k-unknown-linux-gnu-gcc" ../../y.sh cargo run --target m68k-unknown-linux-gnu > hello_world_stdout
-        test $(cat hello_world_stdout) == "Hello, world!" || exit 1
+        sudo cp target/m68k-unknown-linux-gnu/debug/hello_world $vm_dir/home/
+        sudo chroot $vm_dir qemu-m68k-static /home/hello_world > hello_world_stdout
+        test $(cat hello_world_stdout) == "Hello, world!" || (echo "Output differs. Actual output: $(cat hello_world_stdout)"; exit 1)
 
   # Summary job for the merge queue.
   # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!
diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 121c43822fdb..428f3766e5de 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -374,6 +374,7 @@ impl ConfigInfo {
             if self.target_triple.is_empty() {
                 return Err("Unknown non-native platform".to_string());
             }
+            // TODO: check if this is still needed.
             linker = Some(format!("-Clinker={}-gcc", self.target_triple));
             self.run_in_vm = true;
         }

From 21c8639d797850bfbb55546d69c09ba424361aa2 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 2 Jul 2025 11:39:27 -0400
Subject: [PATCH 959/997] Fix to use the correct expected output for m68k CI
 test

---
 .github/workflows/m68k.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 8b8f58fef5fa..4b67360df9df 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -113,7 +113,8 @@ jobs:
         CG_RUSTFLAGS="-Clinker=m68k-unknown-linux-gnu-gcc" ../../y.sh cargo build --target m68k-unknown-linux-gnu
         sudo cp target/m68k-unknown-linux-gnu/debug/hello_world $vm_dir/home/
         sudo chroot $vm_dir qemu-m68k-static /home/hello_world > hello_world_stdout
-        test $(cat hello_world_stdout) == "Hello, world!" || (echo "Output differs. Actual output: $(cat hello_world_stdout)"; exit 1)
+        expected_output="40"
+        test $(cat hello_world_stdout) == $expected_output || (echo "Output differs. Actual output: $(cat hello_world_stdout)"; exit 1)
 
   # Summary job for the merge queue.
   # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!

From 188108733af702a7f60982c18da2d87d54ed8f5b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 2 Jul 2025 11:48:49 -0400
Subject: [PATCH 960/997] Update the doc to reflect the new way to specify the
 linker for cross-compilation

---
 doc/tips.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/doc/tips.md b/doc/tips.md
index 4ab135f3df66..e62c3402a292 100644
--- a/doc/tips.md
+++ b/doc/tips.md
@@ -62,8 +62,8 @@ generate it in [gimple.md](./doc/gimple.md).
 
  * Run `./y.sh prepare --cross` so that the sysroot is patched for the cross-compiling case.
  * Set the path to the cross-compiling libgccjit in `gcc-path` (in `config.toml`).
- * Make sure you have the linker for your target (for instance `m68k-unknown-linux-gnu-gcc`) in your `$PATH`. Currently, the linker name is hardcoded as being `$TARGET-gcc`. Specify the target when building the sysroot: `./y.sh build --sysroot --target-triple m68k-unknown-linux-gnu`.
- * Build your project by specifying the target: `../y.sh cargo build --target m68k-unknown-linux-gnu`.
+ * Make sure you have the linker for your target (for instance `m68k-unknown-linux-gnu-gcc`) in your `$PATH`. You can specify which linker to use via `CG_RUSTFLAGS="-Clinker=<linker>"`, for instance: `CG_RUSTFLAGS="-Clinker=m68k-unknown-linux-gnu-gcc"`. Specify the target when building the sysroot: `./y.sh build --sysroot --target-triple m68k-unknown-linux-gnu`.
+ * Build your project by specifying the target and the linker to use: `CG_RUSTFLAGS="-Clinker=m68k-unknown-linux-gnu-gcc" ../y.sh cargo build --target m68k-unknown-linux-gnu`.
 
 If the target is not yet supported by the Rust compiler, create a [target specification file](https://docs.rust-embedded.org/embedonomicon/custom-target.html) (note that the `arch` specified in this file must be supported by the rust compiler).
 Then, you can use it the following way:

From f1c71ffb4764b17d6d23b432d871c3f0c7bb9d91 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 2 Jul 2025 11:49:05 -0400
Subject: [PATCH 961/997] Clean some config stuff up

---
 build_system/src/config.rs | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/build_system/src/config.rs b/build_system/src/config.rs
index 428f3766e5de..a5f802e293a9 100644
--- a/build_system/src/config.rs
+++ b/build_system/src/config.rs
@@ -352,15 +352,6 @@ impl ConfigInfo {
             None => return Err("no host found".to_string()),
         };
 
-        if self.target_triple.is_empty() {
-            // TODO: set target triple.
-            // TODO: why do we even need to set target_triple?
-            // It seems to only be needed for the linker (we could add an environment variable to
-            // remove this need) and the sysroot (perhaps we could find another way to find it).
-            // TODO TODO: seems like we would still need OVERWRITE_TARGET_TRIPLE when using a
-            // json spec file.
-            // ====> maybe not since we specify both --target and --target-triple.
-        }
         if self.target_triple.is_empty() {
             self.target_triple = self.host_triple.clone();
         }
@@ -374,7 +365,6 @@ impl ConfigInfo {
             if self.target_triple.is_empty() {
                 return Err("Unknown non-native platform".to_string());
             }
-            // TODO: check if this is still needed.
             linker = Some(format!("-Clinker={}-gcc", self.target_triple));
             self.run_in_vm = true;
         }

From 312dcd77796d59743aab30720d8df897504284e6 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 4 Jul 2025 09:47:14 -0400
Subject: [PATCH 962/997] Update to nightly-2025-07-04

---
 rust-toolchain | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rust-toolchain b/rust-toolchain
index bccbc6cd2c5c..2fe8ec4647fa 100644
--- a/rust-toolchain
+++ b/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2025-06-28"
+channel = "nightly-2025-07-04"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

From 29614643e41b6d21e9fdb5d57bfab0d6319bea5b Mon Sep 17 00:00:00 2001
From: FractalFir <fractalfirdev@gmail.com>
Date: Tue, 8 Jul 2025 21:36:05 +0200
Subject: [PATCH 963/997] Change the implementation of supports_parallel to
 signal tha cg_gcc is not thread safe.

---
 src/lib.rs | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/lib.rs b/src/lib.rs
index 45e81aea5513..790e32a4bc68 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -289,6 +289,10 @@ fn new_context<'gcc, 'tcx>(tcx: TyCtxt<'tcx>) -> Context<'gcc> {
 }
 
 impl ExtraBackendMethods for GccCodegenBackend {
+    fn supports_parallel(&self) -> bool {
+        false
+    }
+
     fn codegen_allocator(
         &self,
         tcx: TyCtxt<'_>,
@@ -357,8 +361,7 @@ impl Deref for SyncContext {
 }
 
 unsafe impl Send for SyncContext {}
-// FIXME(antoyo): that shouldn't be Sync. Parallel compilation is currently disabled with "-Zno-parallel-llvm".
-// TODO: disable it here by returning false in CodegenBackend::supports_parallel().
+// FIXME(antoyo): that shouldn't be Sync. Parallel compilation is currently disabled with "CodegenBackend::supports_parallel()".
 unsafe impl Sync for SyncContext {}
 
 impl WriteBackendMethods for GccCodegenBackend {

From 63885243987a5df0e77ad0029961ebe8bd20cb18 Mon Sep 17 00:00:00 2001
From: FractalFir <fractalfirdev@gmail.com>
Date: Wed, 9 Jul 2025 20:22:44 +0200
Subject: [PATCH 964/997] Skip needlessly setting the default visibility on
 functions

---
 src/mono_item.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mono_item.rs b/src/mono_item.rs
index 539e3ac85076..82faeec948c6 100644
--- a/src/mono_item.rs
+++ b/src/mono_item.rs
@@ -64,7 +64,7 @@ impl<'gcc, 'tcx> PreDefineCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         if linkage != Linkage::Internal && self.tcx.is_compiler_builtins(LOCAL_CRATE) {
             #[cfg(feature = "master")]
             decl.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
-        } else {
+        } else if visibility != Visibility::Default {
             #[cfg(feature = "master")]
             decl.add_attribute(FnAttribute::Visibility(base::visibility_to_gcc(visibility)));
         }

From 7e844720bdedc7b8bb4ed1d5414e557d7358e7df Mon Sep 17 00:00:00 2001
From: FractalFir <fractalfirdev@gmail.com>
Date: Tue, 8 Jul 2025 23:00:40 +0200
Subject: [PATCH 965/997] Inserted a local variable in volatile_load, to ensure
 reads don't move across blocks.

---
 src/builder.rs | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/builder.rs b/src/builder.rs
index 100091692bab..e65eea6d5994 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -980,7 +980,11 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn volatile_load(&mut self, ty: Type<'gcc>, ptr: RValue<'gcc>) -> RValue<'gcc> {
         let ptr = self.context.new_cast(self.location, ptr, ty.make_volatile().make_pointer());
-        ptr.dereference(self.location).to_rvalue()
+        // (FractalFir): We insert a local here, to ensure this volatile load can't move across
+        // blocks.
+        let local = self.current_func().new_local(self.location, ty, "volatile_tmp");
+        self.block.add_assignment(self.location, local, ptr.dereference(self.location).to_rvalue());
+        local.to_rvalue()
     }
 
     fn atomic_load(

From 0bb092a93fa32ac5d68fdeb4fc0482705a25247b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 12 Jul 2025 10:28:44 -0400
Subject: [PATCH 966/997] Fix building the sysroot

---
 build_system/build_sysroot/Cargo.lock | 502 --------------------------
 build_system/build_sysroot/Cargo.toml |  39 --
 build_system/build_sysroot/lib.rs     |   1 -
 build_system/src/build.rs             |  35 +-
 build_system/src/utils.rs             |  13 -
 5 files changed, 10 insertions(+), 580 deletions(-)
 delete mode 100644 build_system/build_sysroot/Cargo.lock
 delete mode 100644 build_system/build_sysroot/Cargo.toml
 delete mode 100644 build_system/build_sysroot/lib.rs

diff --git a/build_system/build_sysroot/Cargo.lock b/build_system/build_sysroot/Cargo.lock
deleted file mode 100644
index 0c75977ee798..000000000000
--- a/build_system/build_sysroot/Cargo.lock
+++ /dev/null
@@ -1,502 +0,0 @@
-# This file is automatically @generated by Cargo.
-# It is not intended for manual editing.
-version = 4
-
-[[package]]
-name = "addr2line"
-version = "0.24.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
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- "wasi",
- "windows-targets 0.0.0",
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diff --git a/build_system/build_sysroot/Cargo.toml b/build_system/build_sysroot/Cargo.toml
deleted file mode 100644
index 29a3bcec304c..000000000000
--- a/build_system/build_sysroot/Cargo.toml
+++ /dev/null
@@ -1,39 +0,0 @@
-[package]
-authors = ["rustc_codegen_gcc devs"]
-name = "sysroot"
-version = "0.0.0"
-resolver = "2"
-
-[dependencies]
-core = { path = "./sysroot_src/library/core" }
-compiler_builtins = { path = "./sysroot_src/library/compiler-builtins/compiler-builtins" }
-alloc = { path = "./sysroot_src/library/alloc" }
-std = { path = "./sysroot_src/library/std", features = ["panic_unwind", "backtrace"] }
-test = { path = "./sysroot_src/library/test" }
-proc_macro = { path = "./sysroot_src/library/proc_macro" }
-
-[patch.crates-io]
-rustc-std-workspace-core = { path = "./sysroot_src/library/rustc-std-workspace-core" }
-rustc-std-workspace-alloc = { path = "./sysroot_src/library/rustc-std-workspace-alloc" }
-rustc-std-workspace-std = { path = "./sysroot_src/library/rustc-std-workspace-std" }
-compiler_builtins = { path = "./sysroot_src/library/compiler-builtins/compiler-builtins" }
-
-# For compiler-builtins we always use a high number of codegen units.
-# The goal here is to place every single intrinsic into its own object
-# file to avoid symbol clashes with the system libgcc if possible. Note
-# that this number doesn't actually produce this many object files, we
-# just don't create more than this number of object files.
-#
-# It's a bit of a bummer that we have to pass this here, unfortunately.
-# Ideally this would be specified through an env var to Cargo so Cargo
-# knows how many CGUs are for this specific crate, but for now
-# per-crate configuration isn't specifiable in the environment.
-[profile.dev.package.compiler_builtins]
-codegen-units = 10000
-
-[profile.release.package.compiler_builtins]
-codegen-units = 10000
-
-[profile.release]
-debug = "limited"
-#lto = "fat" # TODO(antoyo): re-enable when the failing LTO tests regarding proc-macros are fixed.
diff --git a/build_system/build_sysroot/lib.rs b/build_system/build_sysroot/lib.rs
deleted file mode 100644
index 0c9ac1ac8e4b..000000000000
--- a/build_system/build_sysroot/lib.rs
+++ /dev/null
@@ -1 +0,0 @@
-#![no_std]
diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index ecc4c1b2fe22..8c09ea3ba42b 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -5,7 +5,7 @@ use std::path::Path;
 
 use crate::config::{Channel, ConfigInfo};
 use crate::utils::{
-    copy_file, create_dir, get_sysroot_dir, run_command, run_command_with_output_and_env, walk_dir,
+    create_dir, get_sysroot_dir, run_command, run_command_with_output_and_env, walk_dir,
 };
 
 #[derive(Default)]
@@ -53,11 +53,11 @@ impl BuildArg {
     }
 }
 
-fn cleanup_sysroot_previous_build(start_dir: &Path) {
+fn cleanup_sysroot_previous_build(library_dir: &Path) {
     // Cleanup for previous run
     // Clean target dir except for build scripts and incremental cache
     let _ = walk_dir(
-        start_dir.join("target"),
+        library_dir.join("target"),
         &mut |dir: &Path| {
             for top in &["debug", "release"] {
                 let _ = fs::remove_dir_all(dir.join(top).join("build"));
@@ -96,30 +96,14 @@ fn cleanup_sysroot_previous_build(start_dir: &Path) {
         false,
     );
 
-    let _ = fs::remove_file(start_dir.join("Cargo.lock"));
-    let _ = fs::remove_file(start_dir.join("test_target/Cargo.lock"));
-    let _ = fs::remove_dir_all(start_dir.join("sysroot"));
-}
-
-pub fn create_build_sysroot_content(start_dir: &Path) -> Result<(), String> {
-    if !start_dir.is_dir() {
-        create_dir(start_dir)?;
-    }
-    copy_file("build_system/build_sysroot/Cargo.toml", start_dir.join("Cargo.toml"))?;
-    copy_file("build_system/build_sysroot/Cargo.lock", start_dir.join("Cargo.lock"))?;
-
-    let src_dir = start_dir.join("src");
-    if !src_dir.is_dir() {
-        create_dir(&src_dir)?;
-    }
-    copy_file("build_system/build_sysroot/lib.rs", start_dir.join("src/lib.rs"))
+    let _ = fs::remove_file(library_dir.join("Cargo.lock"));
 }
 
 pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Result<(), String> {
     let start_dir = get_sysroot_dir();
 
-    cleanup_sysroot_previous_build(&start_dir);
-    create_build_sysroot_content(&start_dir)?;
+    let library_dir = start_dir.join("sysroot_src").join("library");
+    cleanup_sysroot_previous_build(&library_dir);
 
     // Builds libs
     let mut rustflags = env.get("RUSTFLAGS").cloned().unwrap_or_default();
@@ -159,7 +143,8 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
 
     let mut env = env.clone();
     env.insert("RUSTFLAGS".to_string(), rustflags);
-    run_command_with_output_and_env(&args, Some(&start_dir), Some(&env))?;
+    let sysroot_dir = library_dir.join("sysroot");
+    run_command_with_output_and_env(&args, Some(&sysroot_dir), Some(&env))?;
 
     // Copy files to sysroot
     let sysroot_path = start_dir.join(format!("sysroot/lib/rustlib/{}/lib/", config.target_triple));
@@ -169,7 +154,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         run_command(&[&"cp", &"-r", &dir_to_copy, &sysroot_path], None).map(|_| ())
     };
     walk_dir(
-        start_dir.join(format!("target/{}/{}/deps", config.target_triple, channel)),
+        library_dir.join(format!("target/{}/{}/deps", config.target_triple, channel)),
         &mut copier.clone(),
         &mut copier,
         false,
@@ -178,7 +163,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
     // Copy the source files to the sysroot (Rust for Linux needs this).
     let sysroot_src_path = start_dir.join("sysroot/lib/rustlib/src/rust");
     create_dir(&sysroot_src_path)?;
-    run_command(&[&"cp", &"-r", &start_dir.join("sysroot_src/library/"), &sysroot_src_path], None)?;
+    run_command(&[&"cp", &"-r", &library_dir, &sysroot_src_path], None)?;
 
     Ok(())
 }
diff --git a/build_system/src/utils.rs b/build_system/src/utils.rs
index d77707d5f17a..fc948c54b24a 100644
--- a/build_system/src/utils.rs
+++ b/build_system/src/utils.rs
@@ -303,19 +303,6 @@ pub fn create_dir<P: AsRef<Path>>(path: P) -> Result<(), String> {
     })
 }
 
-pub fn copy_file<F: AsRef<Path>, T: AsRef<Path>>(from: F, to: T) -> Result<(), String> {
-    fs::copy(&from, &to)
-        .map_err(|error| {
-            format!(
-                "Failed to copy file `{}` into `{}`: {:?}",
-                from.as_ref().display(),
-                to.as_ref().display(),
-                error
-            )
-        })
-        .map(|_| ())
-}
-
 /// This function differs from `git_clone` in how it handles *where* the repository will be cloned.
 /// In `git_clone`, it is cloned in the provided path. In this function, the path you provide is
 /// the parent folder. So if you pass "a" as folder and try to clone "b.git", it will be cloned into

From 1954034e3472d2c8c8229e029e92b81db5809f9c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sat, 12 Jul 2025 10:44:48 -0400
Subject: [PATCH 967/997] Comment test that cannot be fixed currently

---
 build_system/src/build.rs        |  2 --
 example/mini_core_hello_world.rs | 17 ++++++++++++-----
 2 files changed, 12 insertions(+), 7 deletions(-)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 8c09ea3ba42b..4033ffe0694a 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -95,8 +95,6 @@ fn cleanup_sysroot_previous_build(library_dir: &Path) {
         &mut |_| Ok(()),
         false,
     );
-
-    let _ = fs::remove_file(library_dir.join("Cargo.lock"));
 }
 
 pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Result<(), String> {
diff --git a/example/mini_core_hello_world.rs b/example/mini_core_hello_world.rs
index 6b6f71edaf8c..092fd6a76409 100644
--- a/example/mini_core_hello_world.rs
+++ b/example/mini_core_hello_world.rs
@@ -6,7 +6,7 @@
 )]
 #![no_core]
 #![allow(dead_code, internal_features, non_camel_case_types)]
-#![rustfmt::skip]
+#![cfg_attr(rustfmt, rustfmt_skip)]
 
 extern crate mini_core;
 
@@ -198,10 +198,17 @@ fn main() {
         assert_eq!(intrinsics::align_of::<u16>() as u8, 2);
         assert_eq!(intrinsics::align_of_val(&a) as u8, intrinsics::align_of::<&str>() as u8);
 
-        assert!(!const { intrinsics::needs_drop::<u8>() });
-        assert!(!const { intrinsics::needs_drop::<[u8]>() });
-        assert!(const { intrinsics::needs_drop::<NoisyDrop>() });
-        assert!(const { intrinsics::needs_drop::<NoisyDropUnsized>() });
+        /*
+         * TODO: re-enable in the next sync.
+        let u8_needs_drop = const { intrinsics::needs_drop::<u8>() };
+        assert!(!u8_needs_drop);
+        let slice_needs_drop = const { intrinsics::needs_drop::<[u8]>() };
+        assert!(!slice_needs_drop);
+        let noisy_drop = const { intrinsics::needs_drop::<NoisyDrop>() };
+        assert!(noisy_drop);
+        let noisy_unsized_drop = const { intrinsics::needs_drop::<NoisyDropUnsized>() };
+        assert!(noisy_unsized_drop);
+        */
 
         Unique {
             pointer: 0 as *const &str,

From 56a82a2402e369ba999e88de125e27014f975f17 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 13 Jul 2025 16:14:30 -0400
Subject: [PATCH 968/997] Fix empty backtrace

---
 build_system/src/build.rs | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/build_system/src/build.rs b/build_system/src/build.rs
index 4033ffe0694a..94b40319f4a7 100644
--- a/build_system/src/build.rs
+++ b/build_system/src/build.rs
@@ -139,6 +139,9 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         rustflags.push_str(&cg_rustflags);
     }
 
+    args.push(&"--features");
+    args.push(&"backtrace");
+
     let mut env = env.clone();
     env.insert("RUSTFLAGS".to_string(), rustflags);
     let sysroot_dir = library_dir.join("sysroot");

From 623609e7132b80425e8661c9753bce78cab49bce Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 13 Jul 2025 16:34:14 -0400
Subject: [PATCH 969/997] Ignore failing test

---
 tests/failing-ui-tests.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 544d0bfc7105..6979c04d5343 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -80,3 +80,5 @@ tests/ui/uninhabited/uninhabited-transparent-return-abi.rs
 tests/ui/coroutine/panic-drops-resume.rs
 tests/ui/coroutine/panic-drops.rs
 tests/ui/coroutine/panic-safe.rs
+tests/ui/process/nofile-limit.rs
+tests/ui/simd/intrinsic/generic-arithmetic-pass.rs

From b01bbe06cc2fea18957895f2722d687b00efcbd7 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 13 Jul 2025 16:36:41 -0400
Subject: [PATCH 970/997] Fix no-f16-f128 feature name

---
 .github/workflows/m68k.yml | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 4b67360df9df..176ee8628b09 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -82,14 +82,14 @@ jobs:
     - name: Build sample project with target defined as JSON spec
       run: |
         ./y.sh prepare --only-libcore --cross
-        ./y.sh build --sysroot --features compiler_builtins/no-f16-f128 --target-triple m68k-unknown-linux-gnu --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
+        ./y.sh build --sysroot --features compiler-builtins-no-f16-f128 --target-triple m68k-unknown-linux-gnu --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
         CG_RUSTFLAGS="-Clinker=m68k-unknown-linux-gnu-gcc" ./y.sh cargo build --manifest-path=./tests/hello-world/Cargo.toml --target ${{ github.workspace }}/target_specs/m68k-unknown-linux-gnu.json
         ./y.sh clean all
 
     - name: Build
       run: |
         ./y.sh prepare --only-libcore --cross
-        ./y.sh build --sysroot --features compiler_builtins/no-f16-f128 --target-triple m68k-unknown-linux-gnu
+        ./y.sh build --sysroot --features compiler-builtins-no-f16-f128 --target-triple m68k-unknown-linux-gnu
         ./y.sh test --mini-tests --target-triple m68k-unknown-linux-gnu
         CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu ./y.sh test --cargo-tests --target-triple m68k-unknown-linux-gnu
         ./y.sh clean all
@@ -102,7 +102,7 @@ jobs:
 
     - name: Run tests
       run: |
-        ./y.sh test --target-triple m68k-unknown-linux-gnu --release --clean --build-sysroot --sysroot-features compiler_builtins/no-f16-f128 ${{ matrix.commands }}
+        ./y.sh test --target-triple m68k-unknown-linux-gnu --release --clean --build-sysroot --sysroot-features compiler-builtins-no-f16-f128 ${{ matrix.commands }}
 
     - name: Run Hello World!
       run: |

From b0ab2bf68efae0b1ccaa2a1ed643083d94756bae Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 13 Jul 2025 16:14:50 -0400
Subject: [PATCH 971/997] Fix LTO test

---
 .github/workflows/release.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index 1d8eaf9a141f..b0c552751e3e 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -78,7 +78,7 @@ jobs:
     - name: Run tests
       run: |
         # FIXME(antoyo): we cannot enable LTO for stdarch tests currently because of some failing LTO tests using proc-macros.
-        echo -n 'lto = "fat"' >> build_system/build_sysroot/Cargo.toml
+        printf '[profile.release]\nlto = "fat"\n' >> build/build_sysroot/sysroot_src/library/sysroot/Cargo.toml
         EMBED_LTO_BITCODE=1 ./y.sh test --release --clean --release-sysroot --build-sysroot --keep-lto-tests ${{ matrix.commands }}
 
     - name: Run y.sh cargo build

From 83fbcabd92dd62198a1275d0d5cf7925150d1d6a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 16 Jul 2025 08:44:15 -0400
Subject: [PATCH 972/997] Fix warnings in tests

---
 tests/run/asm.rs       |  1 +
 tests/run/float.rs     | 16 +++++++---------
 tests/run/int.rs       |  2 --
 tests/run/volatile.rs  |  3 ++-
 tests/run/volatile2.rs |  6 ++----
 5 files changed, 12 insertions(+), 16 deletions(-)

diff --git a/tests/run/asm.rs b/tests/run/asm.rs
index 2dbf43be664d..9b15a28d8298 100644
--- a/tests/run/asm.rs
+++ b/tests/run/asm.rs
@@ -16,6 +16,7 @@ add_asm:
      ret"
 );
 
+#[cfg(target_arch = "x86_64")]
 extern "C" {
     fn add_asm(a: i64, b: i64) -> i64;
 }
diff --git a/tests/run/float.rs b/tests/run/float.rs
index 424fa1cf4ad5..df555f383fe0 100644
--- a/tests/run/float.rs
+++ b/tests/run/float.rs
@@ -3,8 +3,6 @@
 // Run-time:
 //   status: 0
 
-#![feature(const_black_box)]
-
 fn main() {
     use std::hint::black_box;
 
@@ -15,14 +13,14 @@ fn main() {
         }};
     }
 
-    check!(i32, (black_box(0.0f32) as i32));
+    check!(i32, black_box(0.0f32) as i32);
 
-    check!(u64, (black_box(f32::NAN) as u64));
-    check!(u128, (black_box(f32::NAN) as u128));
+    check!(u64, black_box(f32::NAN) as u64);
+    check!(u128, black_box(f32::NAN) as u128);
 
-    check!(i64, (black_box(f64::NAN) as i64));
-    check!(u64, (black_box(f64::NAN) as u64));
+    check!(i64, black_box(f64::NAN) as i64);
+    check!(u64, black_box(f64::NAN) as u64);
 
-    check!(i16, (black_box(f32::MIN) as i16));
-    check!(i16, (black_box(f32::MAX) as i16));
+    check!(i16, black_box(f32::MIN) as i16);
+    check!(i16, black_box(f32::MAX) as i16);
 }
diff --git a/tests/run/int.rs b/tests/run/int.rs
index 47b5dea46f8d..e20ecc23679d 100644
--- a/tests/run/int.rs
+++ b/tests/run/int.rs
@@ -3,8 +3,6 @@
 // Run-time:
 //   status: 0
 
-#![feature(const_black_box)]
-
 fn main() {
     use std::hint::black_box;
 
diff --git a/tests/run/volatile.rs b/tests/run/volatile.rs
index 8b0433125936..94a7bdc5c066 100644
--- a/tests/run/volatile.rs
+++ b/tests/run/volatile.rs
@@ -5,13 +5,14 @@
 
 use std::mem::MaybeUninit;
 
+#[allow(dead_code)]
 #[derive(Debug)]
 struct Struct {
     pointer: *const (),
     func: unsafe fn(*const ()),
 }
 
-fn func(ptr: *const ()) {
+fn func(_ptr: *const ()) {
 }
 
 fn main() {
diff --git a/tests/run/volatile2.rs b/tests/run/volatile2.rs
index a177b817ab35..bdcb82598789 100644
--- a/tests/run/volatile2.rs
+++ b/tests/run/volatile2.rs
@@ -6,8 +6,6 @@
 mod libc {
     #[link(name = "c")]
     extern "C" {
-        pub fn puts(s: *const u8) -> i32;
-
         pub fn sigaction(signum: i32, act: *const sigaction, oldact: *mut sigaction) -> i32;
         pub fn mmap(addr: *mut (), len: usize, prot: i32, flags: i32, fd: i32, offset: i64) -> *mut ();
         pub fn mprotect(addr: *mut (), len: usize, prot: i32) -> i32;
@@ -61,7 +59,7 @@ fn main() {
             panic!("error: mmap failed");
         }
 
-        let p_count = (&mut COUNT) as *mut u32;
+        let p_count = (&raw mut COUNT) as *mut u32;
         p_count.write_volatile(0);
 
         // Trigger segfaults
@@ -94,7 +92,7 @@ fn main() {
 }
 
 unsafe extern "C" fn segv_handler(_: i32, _: *mut (), _: *mut ()) {
-    let p_count = (&mut COUNT) as *mut u32;
+    let p_count = (&raw mut COUNT) as *mut u32;
     p_count.write_volatile(p_count.read_volatile() + 1);
     let count = p_count.read_volatile();
 

From ecd958f4802bfead8a35a1fcdbb1c17467ad727c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 16 Jul 2025 09:33:08 -0400
Subject: [PATCH 973/997] Fix LTO errors

---
 .github/workflows/release.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml
index b0c552751e3e..b7e2583aad39 100644
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -78,7 +78,8 @@ jobs:
     - name: Run tests
       run: |
         # FIXME(antoyo): we cannot enable LTO for stdarch tests currently because of some failing LTO tests using proc-macros.
-        printf '[profile.release]\nlto = "fat"\n' >> build/build_sysroot/sysroot_src/library/sysroot/Cargo.toml
+        # FIXME(antoyo): this should probably not be needed since we embed the LTO bitcode.
+        printf '[profile.release]\nlto = "fat"\n' >> build/build_sysroot/sysroot_src/library/Cargo.toml
         EMBED_LTO_BITCODE=1 ./y.sh test --release --clean --release-sysroot --build-sysroot --keep-lto-tests ${{ matrix.commands }}
 
     - name: Run y.sh cargo build

From 4d1695103f15ec885ced2eef25cdc9fd08332b66 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 18 Jul 2025 11:26:44 -0400
Subject: [PATCH 974/997] Comment some tests in the m68k CI because we cannot
 run programs on architectures not supported by the object crate anymore

---
 .github/workflows/m68k.yml | 34 ++++++++++++++++++++--------------
 1 file changed, 20 insertions(+), 14 deletions(-)

diff --git a/.github/workflows/m68k.yml b/.github/workflows/m68k.yml
index 176ee8628b09..759d0d59e268 100644
--- a/.github/workflows/m68k.yml
+++ b/.github/workflows/m68k.yml
@@ -91,7 +91,11 @@ jobs:
         ./y.sh prepare --only-libcore --cross
         ./y.sh build --sysroot --features compiler-builtins-no-f16-f128 --target-triple m68k-unknown-linux-gnu
         ./y.sh test --mini-tests --target-triple m68k-unknown-linux-gnu
-        CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu ./y.sh test --cargo-tests --target-triple m68k-unknown-linux-gnu
+        # FIXME: since https://github.com/rust-lang/rust/pull/140809, we cannot run programs for architectures not
+        # supported by the object crate, since this adds a dependency on symbols.o for the panic runtime.
+        # And as such, a wrong order of the object files in the linker command now fails with an undefined reference
+        # to some symbols like __rustc::rust_panic.
+        #CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu ./y.sh test --cargo-tests --target-triple m68k-unknown-linux-gnu
         ./y.sh clean all
 
     - name: Prepare dependencies
@@ -100,21 +104,23 @@ jobs:
         git config --global user.name "User"
         ./y.sh prepare --cross
 
-    - name: Run tests
-      run: |
-        ./y.sh test --target-triple m68k-unknown-linux-gnu --release --clean --build-sysroot --sysroot-features compiler-builtins-no-f16-f128 ${{ matrix.commands }}
+    # FIXME: We cannot run programs for architectures not supported by the object crate. See comment above.
+    #- name: Run tests
+      #run: |
+        #./y.sh test --target-triple m68k-unknown-linux-gnu --release --clean --build-sysroot --sysroot-features compiler-builtins-no-f16-f128 ${{ matrix.commands }}
 
-    - name: Run Hello World!
-      run: |
-        ./y.sh build --target-triple m68k-unknown-linux-gnu
+    # FIXME: We cannot run programs for architectures not supported by the object crate. See comment above.
+    #- name: Run Hello World!
+      #run: |
+        #./y.sh build --target-triple m68k-unknown-linux-gnu
 
-        vm_dir=$(pwd)/vm
-        cd tests/hello-world
-        CG_RUSTFLAGS="-Clinker=m68k-unknown-linux-gnu-gcc" ../../y.sh cargo build --target m68k-unknown-linux-gnu
-        sudo cp target/m68k-unknown-linux-gnu/debug/hello_world $vm_dir/home/
-        sudo chroot $vm_dir qemu-m68k-static /home/hello_world > hello_world_stdout
-        expected_output="40"
-        test $(cat hello_world_stdout) == $expected_output || (echo "Output differs. Actual output: $(cat hello_world_stdout)"; exit 1)
+        #vm_dir=$(pwd)/vm
+        #cd tests/hello-world
+        #CG_RUSTFLAGS="-Clinker=m68k-unknown-linux-gnu-gcc" ../../y.sh cargo build --target m68k-unknown-linux-gnu
+        #sudo cp target/m68k-unknown-linux-gnu/debug/hello_world $vm_dir/home/
+        #sudo chroot $vm_dir qemu-m68k-static /home/hello_world > hello_world_stdout
+        #expected_output="40"
+        #test $(cat hello_world_stdout) == $expected_output || (echo "Output differs. Actual output: $(cat hello_world_stdout)"; exit 1)
 
   # Summary job for the merge queue.
   # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!

From c1be95ca0c2be04060da7a01f6892e5e6f2ef9dc Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 21 Jul 2025 14:16:43 -0400
Subject: [PATCH 975/997] Add missing inline attribute

---
 src/allocator.rs | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/src/allocator.rs b/src/allocator.rs
index 0d8dc93274f9..66258390d909 100644
--- a/src/allocator.rs
+++ b/src/allocator.rs
@@ -99,11 +99,14 @@ fn create_const_value_function(
     let func = context.new_function(None, FunctionType::Exported, output, &[], name, false);
 
     #[cfg(feature = "master")]
-    func.add_attribute(FnAttribute::Visibility(symbol_visibility_to_gcc(
-        tcx.sess.default_visibility(),
-    )));
+    {
+        func.add_attribute(FnAttribute::Visibility(symbol_visibility_to_gcc(
+            tcx.sess.default_visibility(),
+        )));
 
-    func.add_attribute(FnAttribute::AlwaysInline);
+        func.add_attribute(FnAttribute::AlwaysInline);
+        func.add_attribute(FnAttribute::Inline);
+    }
 
     if tcx.sess.must_emit_unwind_tables() {
         // TODO(antoyo): emit unwind tables.

From cf80eeec1650add1e24f114841154484fa051b70 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 21 Jul 2025 14:42:45 -0400
Subject: [PATCH 976/997] Fix clippy warnings

---
 build_system/src/abi_test.rs | 2 +-
 build_system/src/fuzz.rs     | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/build_system/src/abi_test.rs b/build_system/src/abi_test.rs
index 3c1531be27a5..a85886d87f36 100644
--- a/build_system/src/abi_test.rs
+++ b/build_system/src/abi_test.rs
@@ -31,7 +31,7 @@ pub fn run() -> Result<(), String> {
         Some("clones/abi-cafe".as_ref()),
         true,
     )
-    .map_err(|err| (format!("Git clone failed with message: {err:?}!")))?;
+    .map_err(|err| format!("Git clone failed with message: {err:?}!"))?;
     // Configure abi-cafe to use the exact same rustc version we use - this is crucial.
     // Otherwise, the concept of ABI compatibility becomes meanignless.
     std::fs::copy("rust-toolchain", "clones/abi-cafe/rust-toolchain")
diff --git a/build_system/src/fuzz.rs b/build_system/src/fuzz.rs
index 453211366b31..9714ce29af90 100644
--- a/build_system/src/fuzz.rs
+++ b/build_system/src/fuzz.rs
@@ -43,18 +43,18 @@ pub fn run() -> Result<(), String> {
             "--start" => {
                 start =
                     str::parse(&args.next().ok_or_else(|| "Fuzz start not provided!".to_string())?)
-                        .map_err(|err| (format!("Fuzz start not a number {err:?}!")))?;
+                        .map_err(|err| format!("Fuzz start not a number {err:?}!"))?;
             }
             "--count" => {
                 count =
                     str::parse(&args.next().ok_or_else(|| "Fuzz count not provided!".to_string())?)
-                        .map_err(|err| (format!("Fuzz count not a number {err:?}!")))?;
+                        .map_err(|err| format!("Fuzz count not a number {err:?}!"))?;
             }
             "-j" | "--jobs" => {
                 threads = str::parse(
                     &args.next().ok_or_else(|| "Fuzz thread count not provided!".to_string())?,
                 )
-                .map_err(|err| (format!("Fuzz thread count not a number {err:?}!")))?;
+                .map_err(|err| format!("Fuzz thread count not a number {err:?}!"))?;
             }
             _ => return Err(format!("Unknown option {arg}")),
         }
@@ -66,7 +66,7 @@ pub fn run() -> Result<(), String> {
         Some("clones/rustlantis".as_ref()),
         true,
     )
-    .map_err(|err| (format!("Git clone failed with message: {err:?}!")))?;
+    .map_err(|err| format!("Git clone failed with message: {err:?}!"))?;
 
     // Ensure that we are on the newest rustlantis commit.
     let cmd: &[&dyn AsRef<OsStr>] = &[&"git", &"pull", &"origin"];

From 18cc4f06a5252f0868be4ea620076247da68077c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Mon, 21 Jul 2025 14:45:00 -0400
Subject: [PATCH 977/997] Fix spelling mistakes

---
 src/lib.rs                               | 4 ++--
 tools/cspell_dicts/rustc_codegen_gcc.txt | 2 ++
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/lib.rs b/src/lib.rs
index af416929ea73..5e65a36f2737 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -360,9 +360,9 @@ impl WriteBackendMethods for GccCodegenBackend {
         cgcx: &CodegenContext<Self>,
         modules: Vec<FatLtoInput<Self>>,
         cached_modules: Vec<(SerializedModule<Self::ModuleBuffer>, WorkProduct)>,
-        diff_fncs: Vec<AutoDiffItem>,
+        diff_functions: Vec<AutoDiffItem>,
     ) -> Result<ModuleCodegen<Self::Module>, FatalError> {
-        if !diff_fncs.is_empty() {
+        if !diff_functions.is_empty() {
             unimplemented!();
         }
 
diff --git a/tools/cspell_dicts/rustc_codegen_gcc.txt b/tools/cspell_dicts/rustc_codegen_gcc.txt
index 31023e50ffa1..b19d7f67eab3 100644
--- a/tools/cspell_dicts/rustc_codegen_gcc.txt
+++ b/tools/cspell_dicts/rustc_codegen_gcc.txt
@@ -8,6 +8,7 @@ clzll
 cmse
 codegened
 csky
+ctfe
 ctlz
 ctpop
 cttz
@@ -47,6 +48,7 @@ mavx
 mcmodel
 minimumf
 minnumf
+miri
 monomorphization
 monomorphizations
 monomorphized

From d466953088a41ce98acfcd53961ef07b887f074a Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 22 Jul 2025 11:03:49 -0400
Subject: [PATCH 978/997] Fix failing UI tests

---
 tests/failing-ui-tests.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 6979c04d5343..f7040055874e 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -10,7 +10,7 @@ tests/ui/iterators/iter-sum-overflow-overflow-checks.rs
 tests/ui/mir/mir_drop_order.rs
 tests/ui/mir/mir_let_chains_drop_order.rs
 tests/ui/mir/mir_match_guard_let_chains_drop_order.rs
-tests/ui/oom_unwind.rs
+tests/ui/panics/oom-panic-unwind.rs
 tests/ui/panic-runtime/abort-link-to-unwinding-crates.rs
 tests/ui/panic-runtime/abort.rs
 tests/ui/panic-runtime/link-to-abort.rs

From a4fb5794e60883625fed8d25e9e55c649f9fb70c Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 22 Jul 2025 11:14:31 -0400
Subject: [PATCH 979/997] Fix compilation of overflow addition

---
 src/int.rs | 30 +++++++++++++++++++++++++++++-
 src/lib.rs |  1 +
 2 files changed, 30 insertions(+), 1 deletion(-)

diff --git a/src/int.rs b/src/int.rs
index 6f21ce9352b5..53e49e71e2bf 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -4,12 +4,15 @@
 
 // cSpell:words cmpti divti modti mulodi muloti udivti umodti
 
-use gccjit::{BinaryOp, ComparisonOp, FunctionType, Location, RValue, ToRValue, Type, UnaryOp};
+use gccjit::{
+    BinaryOp, CType, ComparisonOp, FunctionType, Location, RValue, ToRValue, Type, UnaryOp,
+};
 use rustc_abi::{CanonAbi, Endian, ExternAbi};
 use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
 use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeCodegenMethods, BuilderMethods, OverflowOp};
 use rustc_middle::ty::{self, Ty};
 use rustc_target::callconv::{ArgAbi, ArgAttributes, FnAbi, PassMode};
+use rustc_type_ir::{Interner, TyKind};
 
 use crate::builder::{Builder, ToGccComp};
 use crate::common::{SignType, TypeReflection};
@@ -351,6 +354,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             // TODO(antoyo): is it correct to use rhs type instead of the parameter typ?
             .new_local(self.location, rhs.get_type(), "binopResult")
             .get_address(self.location);
+        let new_type = type_kind_to_gcc_type(new_kind);
+        let new_type = self.context.new_c_type(new_type);
+        let lhs = self.context.new_cast(self.location, lhs, new_type);
         let overflow = self.overflow_call(intrinsic, &[lhs, rhs, res], None);
         (res.dereference(self.location).to_rvalue(), overflow)
     }
@@ -1042,3 +1048,25 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         self.context.new_array_constructor(None, typ, &values)
     }
 }
+
+fn type_kind_to_gcc_type<I: Interner>(kind: TyKind<I>) -> CType {
+    use rustc_middle::ty::IntTy::*;
+    use rustc_middle::ty::UintTy::*;
+    use rustc_middle::ty::{Int, Uint};
+
+    match kind {
+        Int(I8) => CType::Int8t,
+        Int(I16) => CType::Int16t,
+        Int(I32) => CType::Int32t,
+        Int(I64) => CType::Int64t,
+        Int(I128) => CType::Int128t,
+
+        Uint(U8) => CType::UInt8t,
+        Uint(U16) => CType::UInt16t,
+        Uint(U32) => CType::UInt32t,
+        Uint(U64) => CType::UInt64t,
+        Uint(U128) => CType::UInt128t,
+
+        _ => unimplemented!("Kind: {:?}", kind),
+    }
+}
diff --git a/src/lib.rs b/src/lib.rs
index 5e65a36f2737..92808123d6a9 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -51,6 +51,7 @@ extern crate rustc_session;
 extern crate rustc_span;
 extern crate rustc_symbol_mangling;
 extern crate rustc_target;
+extern crate rustc_type_ir;
 
 // This prevents duplicating functions and statics that are already part of the host rustc process.
 #[allow(unused_extern_crates)]

From 27f3a97747cd46676c4fe2a4afd77009f3b98a46 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 22 Jul 2025 11:16:06 -0400
Subject: [PATCH 980/997] Use a bitcast in Builder::ret to support non-native
 integers

---
 src/builder.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index a4ec4bf8deac..3cd464b61e14 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -540,8 +540,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn ret(&mut self, mut value: RValue<'gcc>) {
         let expected_return_type = self.current_func().get_return_type();
         if !expected_return_type.is_compatible_with(value.get_type()) {
-            // NOTE: due to opaque pointers now being used, we need to cast here.
-            value = self.context.new_cast(self.location, value, expected_return_type);
+            // NOTE: due to opaque pointers now being used, we need to bitcast here.
+            value = self.context.new_bitcast(self.location, value, expected_return_type);
         }
         self.llbb().end_with_return(self.location, value);
     }

From a5bd9d6635831b09457ce39b1eacdc30ec306cd4 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 22 Jul 2025 11:17:43 -0400
Subject: [PATCH 981/997] Fix spelling mistake

---
 tools/cspell_dicts/rustc_codegen_gcc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/cspell_dicts/rustc_codegen_gcc.txt b/tools/cspell_dicts/rustc_codegen_gcc.txt
index b19d7f67eab3..4fb018b3ecd8 100644
--- a/tools/cspell_dicts/rustc_codegen_gcc.txt
+++ b/tools/cspell_dicts/rustc_codegen_gcc.txt
@@ -26,6 +26,7 @@ fwrapv
 gimple
 hrtb
 immediates
+interner
 liblto
 llbb
 llcx

From 9ea18272eceae790619661b421dcec7fe1f0e41b Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 22 Jul 2025 11:26:31 -0400
Subject: [PATCH 982/997] Fix sysroot compilation in release mode

---
 src/int.rs | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/src/int.rs b/src/int.rs
index 53e49e71e2bf..5180f1e6d3ed 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -170,9 +170,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
                 if a_type.is_vector() {
                     // Vector types need to be bitcast.
                     // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
-                    b = self.context.new_bitcast(self.location, b, a.get_type());
+                    b = self.context.new_bitcast(self.location, b, a_type);
                 } else {
-                    b = self.context.new_cast(self.location, b, a.get_type());
+                    b = self.context.new_cast(self.location, b, a_type);
                 }
             }
             self.context.new_binary_op(self.location, operation, a_type, a, b)
@@ -219,13 +219,22 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         operation_name: &str,
         signed: bool,
         a: RValue<'gcc>,
-        b: RValue<'gcc>,
+        mut b: RValue<'gcc>,
     ) -> RValue<'gcc> {
         let a_type = a.get_type();
         let b_type = b.get_type();
         if (self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type))
             || (a_type.is_vector() && b_type.is_vector())
         {
+            if !a_type.is_compatible_with(b_type) {
+                if a_type.is_vector() {
+                    // Vector types need to be bitcast.
+                    // TODO(antoyo): perhaps use __builtin_convertvector for vector casting.
+                    b = self.context.new_bitcast(self.location, b, a_type);
+                } else {
+                    b = self.context.new_cast(self.location, b, a_type);
+                }
+            }
             self.context.new_binary_op(self.location, operation, a_type, a, b)
         } else {
             debug_assert!(a_type.dyncast_array().is_some());
@@ -626,7 +635,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         }
     }
 
-    pub fn gcc_xor(&self, a: RValue<'gcc>, b: RValue<'gcc>) -> RValue<'gcc> {
+    pub fn gcc_xor(&self, a: RValue<'gcc>, mut b: RValue<'gcc>) -> RValue<'gcc> {
         let a_type = a.get_type();
         let b_type = b.get_type();
         if a_type.is_vector() && b_type.is_vector() {
@@ -634,6 +643,9 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             a ^ b
         } else if self.is_native_int_type_or_bool(a_type) && self.is_native_int_type_or_bool(b_type)
         {
+            if !a_type.is_compatible_with(b_type) {
+                b = self.context.new_cast(self.location, b, a_type);
+            }
             a ^ b
         } else {
             self.concat_low_high_rvalues(

From de5cf685461967da8351a4d54ba96c5da5349eae Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 22 Jul 2025 11:27:07 -0400
Subject: [PATCH 983/997] Remove failing UI test

---
 tests/failing-ui-tests.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index f7040055874e..9a806e5ba522 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -14,7 +14,6 @@ tests/ui/panics/oom-panic-unwind.rs
 tests/ui/panic-runtime/abort-link-to-unwinding-crates.rs
 tests/ui/panic-runtime/abort.rs
 tests/ui/panic-runtime/link-to-abort.rs
-tests/ui/unwind-no-uwtable.rs
 tests/ui/parser/unclosed-delimiter-in-dep.rs
 tests/ui/consts/missing_span_in_backtrace.rs
 tests/ui/drop/dynamic-drop.rs

From ba18e20501d18c05859534b93796c4ca5100ad8f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 22 Jul 2025 11:28:44 -0400
Subject: [PATCH 984/997] Remove failing run-make test

---
 tests/failing-run-make-tests.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/failing-run-make-tests.txt b/tests/failing-run-make-tests.txt
index 842533cd3c62..29032b321fa7 100644
--- a/tests/failing-run-make-tests.txt
+++ b/tests/failing-run-make-tests.txt
@@ -6,7 +6,6 @@ tests/run-make/doctests-keep-binaries/
 tests/run-make/doctests-runtool/
 tests/run-make/emit-shared-files/
 tests/run-make/exit-code/
-tests/run-make/issue-22131/
 tests/run-make/issue-64153/
 tests/run-make/llvm-ident/
 tests/run-make/native-link-modifier-bundle/

From 041be62e5f365434741195e5870ba355103a44d0 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 22 Jul 2025 11:44:42 -0400
Subject: [PATCH 985/997] Add failing UI tests

---
 tests/failing-ui-tests.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt
index 9a806e5ba522..4dc9507f28f1 100644
--- a/tests/failing-ui-tests.txt
+++ b/tests/failing-ui-tests.txt
@@ -81,3 +81,6 @@ tests/ui/coroutine/panic-drops.rs
 tests/ui/coroutine/panic-safe.rs
 tests/ui/process/nofile-limit.rs
 tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
+tests/ui/linking/no-gc-encapsulation-symbols.rs
+tests/ui/panics/unwind-force-no-unwind-tables.rs
+tests/ui/attributes/fn-align-dyn.rs

From 3c35d9b3eb46e6fa5645f93a6d04d13374f58b67 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 22 Jul 2025 11:44:52 -0400
Subject: [PATCH 986/997] Add missing cast in gcc_checked_binop

---
 src/int.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/int.rs b/src/int.rs
index 5180f1e6d3ed..64b612553cfc 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -366,6 +366,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let new_type = type_kind_to_gcc_type(new_kind);
         let new_type = self.context.new_c_type(new_type);
         let lhs = self.context.new_cast(self.location, lhs, new_type);
+        let rhs = self.context.new_cast(self.location, rhs, new_type);
         let overflow = self.overflow_call(intrinsic, &[lhs, rhs, res], None);
         (res.dereference(self.location).to_rvalue(), overflow)
     }

From d3a61f88e87b69574b691405024eacaa0d134518 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 22 Jul 2025 13:06:52 -0400
Subject: [PATCH 987/997] Remove failing UI test

---
 tests/failing-lto-tests.txt | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/failing-lto-tests.txt b/tests/failing-lto-tests.txt
index b9126fb73a77..b1ae1e91078b 100644
--- a/tests/failing-lto-tests.txt
+++ b/tests/failing-lto-tests.txt
@@ -28,6 +28,5 @@ tests/ui/macros/macro-comma-behavior-rpass.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/assert-with-custom-errors-does-not-create-unnecessary-code.rs
 tests/ui/macros/rfc-2011-nicer-assert-messages/feature-gate-generic_assert.rs
 tests/ui/macros/stringify.rs
-tests/ui/reexport-test-harness-main.rs
 tests/ui/rfcs/rfc-1937-termination-trait/termination-trait-in-test.rs
 tests/ui/binding/fn-arg-incomplete-pattern-drop-order.rs

From d05542af7a07de7e58dc9a695125a3b50146ea82 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Tue, 22 Jul 2025 13:07:12 -0400
Subject: [PATCH 988/997] Add missing cast in gcc_checked_binop

---
 src/int.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/int.rs b/src/int.rs
index 64b612553cfc..9dc1fcf5fc8b 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -367,6 +367,7 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         let new_type = self.context.new_c_type(new_type);
         let lhs = self.context.new_cast(self.location, lhs, new_type);
         let rhs = self.context.new_cast(self.location, rhs, new_type);
+        let res = self.context.new_cast(self.location, res, new_type.make_pointer());
         let overflow = self.overflow_call(intrinsic, &[lhs, rhs, res], None);
         (res.dereference(self.location).to_rvalue(), overflow)
     }

From 2b640216aea9527c67c82cfc781d979247ac6028 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Wed, 23 Jul 2025 09:56:54 -0400
Subject: [PATCH 989/997] Fix gcc_icmp with non-native integers

---
 src/int.rs | 24 ++++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

diff --git a/src/int.rs b/src/int.rs
index 9dc1fcf5fc8b..9fb7f6bad684 100644
--- a/src/int.rs
+++ b/src/int.rs
@@ -494,11 +494,27 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let lhs_low = self.context.new_cast(self.location, self.low(lhs), unsigned_type);
             let rhs_low = self.context.new_cast(self.location, self.low(rhs), unsigned_type);
 
+            let mut lhs_high = self.high(lhs);
+            let mut rhs_high = self.high(rhs);
+
+            match op {
+                IntPredicate::IntUGT
+                | IntPredicate::IntUGE
+                | IntPredicate::IntULT
+                | IntPredicate::IntULE => {
+                    lhs_high = self.context.new_cast(self.location, lhs_high, unsigned_type);
+                    rhs_high = self.context.new_cast(self.location, rhs_high, unsigned_type);
+                }
+                // TODO(antoyo): we probably need to handle signed comparison for unsigned
+                // integers.
+                _ => (),
+            }
+
             let condition = self.context.new_comparison(
                 self.location,
                 ComparisonOp::LessThan,
-                self.high(lhs),
-                self.high(rhs),
+                lhs_high,
+                rhs_high,
             );
             self.llbb().end_with_conditional(self.location, condition, block1, block2);
 
@@ -512,8 +528,8 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
             let condition = self.context.new_comparison(
                 self.location,
                 ComparisonOp::GreaterThan,
-                self.high(lhs),
-                self.high(rhs),
+                lhs_high,
+                rhs_high,
             );
             block2.end_with_conditional(self.location, condition, block3, block4);
 

From 9fb99109b66626b51343ba6adee61274b0a67a50 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Wed, 30 Jul 2025 15:45:20 +0200
Subject: [PATCH 990/997] Regenerate intrinsics mapping

---
 src/intrinsic/archs.rs | 60 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 915ed875e32f..d1b2a93243d2 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -95,8 +95,11 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
                     "cubema" => "__builtin_amdgcn_cubema",
                     "cubesc" => "__builtin_amdgcn_cubesc",
                     "cubetc" => "__builtin_amdgcn_cubetc",
+                    "cvt.f16.bf8" => "__builtin_amdgcn_cvt_f16_bf8",
+                    "cvt.f16.fp8" => "__builtin_amdgcn_cvt_f16_fp8",
                     "cvt.f32.bf8" => "__builtin_amdgcn_cvt_f32_bf8",
                     "cvt.f32.fp8" => "__builtin_amdgcn_cvt_f32_fp8",
+                    "cvt.f32.fp8.e5m3" => "__builtin_amdgcn_cvt_f32_fp8_e5m3",
                     "cvt.off.f32.i4" => "__builtin_amdgcn_cvt_off_f32_i4",
                     "cvt.pk.bf8.f32" => "__builtin_amdgcn_cvt_pk_bf8_f32",
                     "cvt.pk.f16.bf8" => "__builtin_amdgcn_cvt_pk_f16_bf8",
@@ -181,6 +184,12 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
                     "dot4.f32.fp8.bf8" => "__builtin_amdgcn_dot4_f32_fp8_bf8",
                     "dot4.f32.fp8.fp8" => "__builtin_amdgcn_dot4_f32_fp8_fp8",
                     "ds.add.gs.reg.rtn" => "__builtin_amdgcn_ds_add_gs_reg_rtn",
+                    "ds.atomic.async.barrier.arrive.b64" => {
+                        "__builtin_amdgcn_ds_atomic_async_barrier_arrive_b64"
+                    }
+                    "ds.atomic.barrier.arrive.rtn.b64" => {
+                        "__builtin_amdgcn_ds_atomic_barrier_arrive_rtn_b64"
+                    }
                     "ds.bpermute" => "__builtin_amdgcn_ds_bpermute",
                     "ds.bpermute.fi.b32" => "__builtin_amdgcn_ds_bpermute_fi_b32",
                     "ds.gws.barrier" => "__builtin_amdgcn_ds_gws_barrier",
@@ -198,8 +207,32 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
                     "fdot2.f16.f16" => "__builtin_amdgcn_fdot2_f16_f16",
                     "fdot2.f32.bf16" => "__builtin_amdgcn_fdot2_f32_bf16",
                     "fdot2c.f32.bf16" => "__builtin_amdgcn_fdot2c_f32_bf16",
+                    "flat.prefetch" => "__builtin_amdgcn_flat_prefetch",
                     "fmul.legacy" => "__builtin_amdgcn_fmul_legacy",
+                    "global.load.async.to.lds.b128" => {
+                        "__builtin_amdgcn_global_load_async_to_lds_b128"
+                    }
+                    "global.load.async.to.lds.b32" => {
+                        "__builtin_amdgcn_global_load_async_to_lds_b32"
+                    }
+                    "global.load.async.to.lds.b64" => {
+                        "__builtin_amdgcn_global_load_async_to_lds_b64"
+                    }
+                    "global.load.async.to.lds.b8" => "__builtin_amdgcn_global_load_async_to_lds_b8",
                     "global.load.lds" => "__builtin_amdgcn_global_load_lds",
+                    "global.prefetch" => "__builtin_amdgcn_global_prefetch",
+                    "global.store.async.from.lds.b128" => {
+                        "__builtin_amdgcn_global_store_async_from_lds_b128"
+                    }
+                    "global.store.async.from.lds.b32" => {
+                        "__builtin_amdgcn_global_store_async_from_lds_b32"
+                    }
+                    "global.store.async.from.lds.b64" => {
+                        "__builtin_amdgcn_global_store_async_from_lds_b64"
+                    }
+                    "global.store.async.from.lds.b8" => {
+                        "__builtin_amdgcn_global_store_async_from_lds_b8"
+                    }
                     "groupstaticsize" => "__builtin_amdgcn_groupstaticsize",
                     "iglp.opt" => "__builtin_amdgcn_iglp_opt",
                     "implicit.buffer.ptr" => "__builtin_amdgcn_implicit_buffer_ptr",
@@ -291,6 +324,7 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
                     "s.incperflevel" => "__builtin_amdgcn_s_incperflevel",
                     "s.memrealtime" => "__builtin_amdgcn_s_memrealtime",
                     "s.memtime" => "__builtin_amdgcn_s_memtime",
+                    "s.monitor.sleep" => "__builtin_amdgcn_s_monitor_sleep",
                     "s.sendmsg" => "__builtin_amdgcn_s_sendmsg",
                     "s.sendmsghalt" => "__builtin_amdgcn_s_sendmsghalt",
                     "s.setprio" => "__builtin_amdgcn_s_setprio",
@@ -300,11 +334,15 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
                     "s.sleep.var" => "__builtin_amdgcn_s_sleep_var",
                     "s.ttracedata" => "__builtin_amdgcn_s_ttracedata",
                     "s.ttracedata.imm" => "__builtin_amdgcn_s_ttracedata_imm",
+                    "s.wait.asynccnt" => "__builtin_amdgcn_s_wait_asynccnt",
                     "s.wait.event.export.ready" => "__builtin_amdgcn_s_wait_event_export_ready",
+                    "s.wait.tensorcnt" => "__builtin_amdgcn_s_wait_tensorcnt",
                     "s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
                     "sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
                     "sad.u16" => "__builtin_amdgcn_sad_u16",
                     "sad.u8" => "__builtin_amdgcn_sad_u8",
+                    "sat.pk4.i4.i8" => "__builtin_amdgcn_sat_pk4_i4_i8",
+                    "sat.pk4.u4.u8" => "__builtin_amdgcn_sat_pk4_u4_u8",
                     "sched.barrier" => "__builtin_amdgcn_sched_barrier",
                     "sched.group.barrier" => "__builtin_amdgcn_sched_group_barrier",
                     "sdot2" => "__builtin_amdgcn_sdot2",
@@ -346,8 +384,13 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
                     "smfmac.i32.16x16x64.i8" => "__builtin_amdgcn_smfmac_i32_16x16x64_i8",
                     "smfmac.i32.32x32x32.i8" => "__builtin_amdgcn_smfmac_i32_32x32x32_i8",
                     "smfmac.i32.32x32x64.i8" => "__builtin_amdgcn_smfmac_i32_32x32x64_i8",
+                    "struct.ptr.buffer.load.lds" => "__builtin_amdgcn_struct_ptr_buffer_load_lds",
                     "sudot4" => "__builtin_amdgcn_sudot4",
                     "sudot8" => "__builtin_amdgcn_sudot8",
+                    "tensor.load.to.lds" => "__builtin_amdgcn_tensor_load_to_lds",
+                    "tensor.load.to.lds.d2" => "__builtin_amdgcn_tensor_load_to_lds_d2",
+                    "tensor.store.from.lds" => "__builtin_amdgcn_tensor_store_from_lds",
+                    "tensor.store.from.lds.d2" => "__builtin_amdgcn_tensor_store_from_lds_d2",
                     "udot2" => "__builtin_amdgcn_udot2",
                     "udot4" => "__builtin_amdgcn_udot4",
                     "udot8" => "__builtin_amdgcn_udot8",
@@ -6326,6 +6369,23 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
             }
             s390(name, full_name)
         }
+        "spv" => {
+            #[allow(non_snake_case)]
+            fn spv(name: &str, full_name: &str) -> &'static str {
+                match name {
+                    // spv
+                    "num.subgroups" => "__builtin_spirv_num_subgroups",
+                    "subgroup.id" => "__builtin_spirv_subgroup_id",
+                    "subgroup.local.invocation.id" => {
+                        "__builtin_spirv_subgroup_local_invocation_id"
+                    }
+                    "subgroup.max.size" => "__builtin_spirv_subgroup_max_size",
+                    "subgroup.size" => "__builtin_spirv_subgroup_size",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
+                }
+            }
+            spv(name, full_name)
+        }
         "ve" => {
             #[allow(non_snake_case)]
             fn ve(name: &str, full_name: &str) -> &'static str {

From 8a2a9db29eca4468eb1ccf58183b01fe61d00120 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 1 Aug 2025 10:40:19 -0400
Subject: [PATCH 991/997] Fix LTO errors by not adding AlwaysInline to
 __rust_alloc_error_handler_should_panic_v2

---
 src/allocator.rs | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/allocator.rs b/src/allocator.rs
index 66258390d909..2a95a7368aac 100644
--- a/src/allocator.rs
+++ b/src/allocator.rs
@@ -104,7 +104,8 @@ fn create_const_value_function(
             tcx.sess.default_visibility(),
         )));
 
-        func.add_attribute(FnAttribute::AlwaysInline);
+        // FIXME(antoyo): cg_llvm sets AlwaysInline, but AlwaysInline is different in GCC and using
+        // it here will causes linking errors when using LTO.
         func.add_attribute(FnAttribute::Inline);
     }
 

From 071606b2a385b734fddf27d67a60484dc7df1797 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 1 Aug 2025 11:01:59 -0400
Subject: [PATCH 992/997] Add failing LTO test

---
 tests/failing-lto-tests.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/failing-lto-tests.txt b/tests/failing-lto-tests.txt
index b1ae1e91078b..bf0633f73200 100644
--- a/tests/failing-lto-tests.txt
+++ b/tests/failing-lto-tests.txt
@@ -30,3 +30,4 @@ tests/ui/macros/rfc-2011-nicer-assert-messages/feature-gate-generic_assert.rs
 tests/ui/macros/stringify.rs
 tests/ui/rfcs/rfc-1937-termination-trait/termination-trait-in-test.rs
 tests/ui/binding/fn-arg-incomplete-pattern-drop-order.rs
+tests/ui/lto/debuginfo-lto-alloc.rs

From bc5c2229d01cd06bfd91476636409d619bd5a807 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 1 Aug 2025 11:29:05 -0400
Subject: [PATCH 993/997] Fix issues in count_leading_zeroes

---
 src/intrinsic/mod.rs | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs
index 21b650bdecd7..57bdbad5e536 100644
--- a/src/intrinsic/mod.rs
+++ b/src/intrinsic/mod.rs
@@ -889,10 +889,17 @@ impl<'a, 'gcc, 'tcx> Builder<'a, 'gcc, 'tcx> {
         // TODO(antoyo): use width?
         let arg_type = arg.get_type();
         let result_type = self.u32_type;
+        let arg = if arg_type.is_signed(self.cx) {
+            let new_type = arg_type.to_unsigned(self.cx);
+            self.gcc_int_cast(arg, new_type)
+        } else {
+            arg
+        };
+        let arg_type = arg.get_type();
         let count_leading_zeroes =
             // TODO(antoyo): write a new function Type::is_compatible_with(&Type) and use it here
             // instead of using is_uint().
-            if arg_type.is_uint(self.cx) {
+            if arg_type.is_uchar(self.cx) || arg_type.is_ushort(self.cx) || arg_type.is_uint(self.cx) {
                 "__builtin_clz"
             }
             else if arg_type.is_ulong(self.cx) {

From e3a6469ac09ad7086049fc9ce3b0439432f29cea Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Fri, 1 Aug 2025 12:28:23 -0400
Subject: [PATCH 994/997] Implement SIMD funnel shifts

---
 src/intrinsic/simd.rs | 78 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 78 insertions(+)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 350915a277e3..6748e1a41257 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -206,6 +206,28 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         );
     }
 
+    #[cfg(feature = "master")]
+    if name == sym::simd_funnel_shl {
+        return Ok(simd_funnel_shift(
+            bx,
+            args[0].immediate(),
+            args[1].immediate(),
+            args[2].immediate(),
+            true,
+        ));
+    }
+
+    #[cfg(feature = "master")]
+    if name == sym::simd_funnel_shr {
+        return Ok(simd_funnel_shift(
+            bx,
+            args[0].immediate(),
+            args[1].immediate(),
+            args[2].immediate(),
+            false,
+        ));
+    }
+
     if name == sym::simd_bswap {
         return Ok(simd_bswap(bx, args[0].immediate()));
     }
@@ -1434,3 +1456,59 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
 
     unimplemented!("simd {}", name);
 }
+
+#[cfg(feature = "master")]
+fn simd_funnel_shift<'a, 'gcc, 'tcx>(
+    bx: &mut Builder<'a, 'gcc, 'tcx>,
+    a: RValue<'gcc>,
+    b: RValue<'gcc>,
+    shift: RValue<'gcc>,
+    shift_left: bool,
+) -> RValue<'gcc> {
+    let a_type = a.get_type();
+    let vector_type = a_type.unqualified().dyncast_vector().expect("vector type");
+    let num_units = vector_type.get_num_units();
+    let elem_type = vector_type.get_element_type();
+
+    let (new_int_type, int_shift_val, int_mask) = if elem_type.is_compatible_with(bx.u8_type) {
+        (bx.u16_type, 8, u8::MAX as u64)
+    } else if elem_type.is_compatible_with(bx.u16_type) {
+        (bx.u32_type, 16, u16::MAX as u64)
+    } else if elem_type.is_compatible_with(bx.u32_type) {
+        (bx.u64_type, 32, u32::MAX as u64)
+    } else if elem_type.is_compatible_with(bx.u64_type) {
+        (bx.u128_type, 64, u64::MAX)
+    } else if elem_type.is_compatible_with(bx.i8_type) {
+        (bx.i16_type, 8, u8::MAX as u64)
+    } else if elem_type.is_compatible_with(bx.i16_type) {
+        (bx.i32_type, 16, u16::MAX as u64)
+    } else if elem_type.is_compatible_with(bx.i32_type) {
+        (bx.i64_type, 32, u32::MAX as u64)
+    } else if elem_type.is_compatible_with(bx.i64_type) {
+        (bx.i128_type, 64, u64::MAX)
+    } else {
+        unimplemented!("funnel shift on {:?}", elem_type);
+    };
+
+    let int_mask = bx.context.new_rvalue_from_long(new_int_type, int_mask as i64);
+    let int_shift_val = bx.context.new_rvalue_from_int(new_int_type, int_shift_val);
+    let mut elements = vec![];
+    for i in 0..num_units {
+        let index = bx.context.new_rvalue_from_int(bx.int_type, i as i32);
+        let a_val = bx.context.new_vector_access(None, a, index).to_rvalue();
+        let a_val = bx.context.new_cast(None, a_val, new_int_type);
+        let b_val = bx.context.new_vector_access(None, b, index).to_rvalue();
+        let b_val = bx.context.new_cast(None, b_val, new_int_type);
+        let shift_val = bx.context.new_vector_access(None, shift, index).to_rvalue();
+        let shift_val = bx.context.new_cast(None, shift_val, new_int_type);
+        let mut val = a_val << int_shift_val | b_val;
+        if shift_left {
+            val = (val << shift_val) >> int_shift_val;
+        } else {
+            val = (val >> shift_val) & int_mask;
+        }
+        let val = bx.context.new_cast(None, val, elem_type);
+        elements.push(val);
+    }
+    bx.context.new_rvalue_from_vector(None, a_type, &elements)
+}

From 035ff85042ed1b61e98346229c4aa059a3c87c69 Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 3 Aug 2025 11:58:13 -0400
Subject: [PATCH 995/997] Fix intcast to use the is_signed parameter

---
 src/builder.rs | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index 3cd464b61e14..dac3c3dcbb1b 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -1278,11 +1278,19 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn intcast(
         &mut self,
-        value: RValue<'gcc>,
+        mut value: RValue<'gcc>,
         dest_typ: Type<'gcc>,
-        _is_signed: bool,
+        is_signed: bool,
     ) -> RValue<'gcc> {
-        // NOTE: is_signed is for value, not dest_typ.
+        let value_type = value.get_type();
+        if is_signed && !value_type.is_signed(self.cx) {
+            let signed_type = value_type.to_signed(self.cx);
+            value = self.gcc_int_cast(value, signed_type);
+        } else if !is_signed && value_type.is_signed(self.cx) {
+            let unsigned_type = value_type.to_unsigned(self.cx);
+            value = self.gcc_int_cast(value, unsigned_type);
+        }
+
         self.gcc_int_cast(value, dest_typ)
     }
 

From 681651350f708260428b7b82621583f98c4d042f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 3 Aug 2025 13:31:24 -0400
Subject: [PATCH 996/997] Only use bitcast in Builder::ret for non-native
 integers

---
 src/builder.rs | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/src/builder.rs b/src/builder.rs
index dac3c3dcbb1b..751f0ba24301 100644
--- a/src/builder.rs
+++ b/src/builder.rs
@@ -539,9 +539,15 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
     fn ret(&mut self, mut value: RValue<'gcc>) {
         let expected_return_type = self.current_func().get_return_type();
-        if !expected_return_type.is_compatible_with(value.get_type()) {
-            // NOTE: due to opaque pointers now being used, we need to bitcast here.
-            value = self.context.new_bitcast(self.location, value, expected_return_type);
+        let value_type = value.get_type();
+        if !expected_return_type.is_compatible_with(value_type) {
+            // NOTE: due to opaque pointers now being used, we need to (bit)cast here.
+            if self.is_native_int_type(value_type) && self.is_native_int_type(expected_return_type)
+            {
+                value = self.context.new_cast(self.location, value, expected_return_type);
+            } else {
+                value = self.context.new_bitcast(self.location, value, expected_return_type);
+            }
         }
         self.llbb().end_with_return(self.location, value);
     }

From 566c9aeb66977f947f7b5a03d7e734c96625ca7f Mon Sep 17 00:00:00 2001
From: Antoni Boucher <bouanto@zoho.com>
Date: Sun, 3 Aug 2025 16:21:58 -0400
Subject: [PATCH 997/997] Fix simd_funnel_shift

---
 src/intrinsic/simd.rs | 35 +++++++++++++++++++----------------
 1 file changed, 19 insertions(+), 16 deletions(-)

diff --git a/src/intrinsic/simd.rs b/src/intrinsic/simd.rs
index 6748e1a41257..fdc15d580eff 100644
--- a/src/intrinsic/simd.rs
+++ b/src/intrinsic/simd.rs
@@ -1465,27 +1465,26 @@ fn simd_funnel_shift<'a, 'gcc, 'tcx>(
     shift: RValue<'gcc>,
     shift_left: bool,
 ) -> RValue<'gcc> {
+    use crate::common::SignType;
+
     let a_type = a.get_type();
     let vector_type = a_type.unqualified().dyncast_vector().expect("vector type");
     let num_units = vector_type.get_num_units();
     let elem_type = vector_type.get_element_type();
 
-    let (new_int_type, int_shift_val, int_mask) = if elem_type.is_compatible_with(bx.u8_type) {
+    let (new_int_type, int_shift_val, int_mask) = if elem_type.is_compatible_with(bx.u8_type)
+        || elem_type.is_compatible_with(bx.i8_type)
+    {
         (bx.u16_type, 8, u8::MAX as u64)
-    } else if elem_type.is_compatible_with(bx.u16_type) {
+    } else if elem_type.is_compatible_with(bx.u16_type) || elem_type.is_compatible_with(bx.i16_type)
+    {
         (bx.u32_type, 16, u16::MAX as u64)
-    } else if elem_type.is_compatible_with(bx.u32_type) {
+    } else if elem_type.is_compatible_with(bx.u32_type) || elem_type.is_compatible_with(bx.i32_type)
+    {
         (bx.u64_type, 32, u32::MAX as u64)
-    } else if elem_type.is_compatible_with(bx.u64_type) {
+    } else if elem_type.is_compatible_with(bx.u64_type) || elem_type.is_compatible_with(bx.i64_type)
+    {
         (bx.u128_type, 64, u64::MAX)
-    } else if elem_type.is_compatible_with(bx.i8_type) {
-        (bx.i16_type, 8, u8::MAX as u64)
-    } else if elem_type.is_compatible_with(bx.i16_type) {
-        (bx.i32_type, 16, u16::MAX as u64)
-    } else if elem_type.is_compatible_with(bx.i32_type) {
-        (bx.i64_type, 32, u32::MAX as u64)
-    } else if elem_type.is_compatible_with(bx.i64_type) {
-        (bx.i128_type, 64, u64::MAX)
     } else {
         unimplemented!("funnel shift on {:?}", elem_type);
     };
@@ -1493,21 +1492,25 @@ fn simd_funnel_shift<'a, 'gcc, 'tcx>(
     let int_mask = bx.context.new_rvalue_from_long(new_int_type, int_mask as i64);
     let int_shift_val = bx.context.new_rvalue_from_int(new_int_type, int_shift_val);
     let mut elements = vec![];
+    let unsigned_type = elem_type.to_unsigned(bx);
     for i in 0..num_units {
         let index = bx.context.new_rvalue_from_int(bx.int_type, i as i32);
         let a_val = bx.context.new_vector_access(None, a, index).to_rvalue();
-        let a_val = bx.context.new_cast(None, a_val, new_int_type);
+        let a_val = bx.context.new_bitcast(None, a_val, unsigned_type);
+        // TODO: we probably need to use gcc_int_cast instead.
+        let a_val = bx.gcc_int_cast(a_val, new_int_type);
         let b_val = bx.context.new_vector_access(None, b, index).to_rvalue();
-        let b_val = bx.context.new_cast(None, b_val, new_int_type);
+        let b_val = bx.context.new_bitcast(None, b_val, unsigned_type);
+        let b_val = bx.gcc_int_cast(b_val, new_int_type);
         let shift_val = bx.context.new_vector_access(None, shift, index).to_rvalue();
-        let shift_val = bx.context.new_cast(None, shift_val, new_int_type);
+        let shift_val = bx.gcc_int_cast(shift_val, new_int_type);
         let mut val = a_val << int_shift_val | b_val;
         if shift_left {
             val = (val << shift_val) >> int_shift_val;
         } else {
             val = (val >> shift_val) & int_mask;
         }
-        let val = bx.context.new_cast(None, val, elem_type);
+        let val = bx.gcc_int_cast(val, elem_type);
         elements.push(val);
     }
     bx.context.new_rvalue_from_vector(None, a_type, &elements)