Merge pull request #603 from tgross35/ci-deny-warnings
Deny warnings in CI and add check-cfg directives
This commit is contained in:
commit
4647d5d3c1
8 changed files with 82 additions and 10 deletions
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@ -1,6 +1,10 @@
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name: CI
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on: [push, pull_request]
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env:
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RUSTDOCFLAGS: -Dwarnings
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RUSTFLAGS: -Dwarnings
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jobs:
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test:
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name: Test
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@ -2,6 +2,7 @@ use std::{collections::BTreeMap, env, sync::atomic::Ordering};
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fn main() {
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println!("cargo:rerun-if-changed=build.rs");
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configure_check_cfg();
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let target = env::var("TARGET").unwrap();
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let cwd = env::current_dir().unwrap();
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@ -9,6 +10,7 @@ fn main() {
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println!("cargo:compiler-rt={}", cwd.join("compiler-rt").display());
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// Activate libm's unstable features to make full use of Nightly.
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println!("cargo::rustc-check-cfg=cfg(feature, values(\"unstable\"))");
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println!("cargo:rustc-cfg=feature=\"unstable\"");
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// Emscripten's runtime includes all the builtins
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@ -36,6 +38,7 @@ fn main() {
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}
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// These targets have hardware unaligned access support.
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println!("cargo::rustc-check-cfg=cfg(feature, values(\"mem-unaligned\"))");
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if target.contains("x86_64")
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|| target.contains("i686")
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|| target.contains("aarch64")
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@ -64,6 +67,7 @@ fn main() {
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}
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// To compile intrinsics.rs for thumb targets, where there is no libc
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println!("cargo::rustc-check-cfg=cfg(thumb)");
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if llvm_target[0].starts_with("thumb") {
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println!("cargo:rustc-cfg=thumb")
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}
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@ -71,6 +75,7 @@ fn main() {
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// compiler-rt `cfg`s away some intrinsics for thumbv6m and thumbv8m.base because
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// these targets do not have full Thumb-2 support but only original Thumb-1.
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// We have to cfg our code accordingly.
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println!("cargo::rustc-check-cfg=cfg(thumb_1)");
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if llvm_target[0] == "thumbv6m" || llvm_target[0] == "thumbv8m.base" {
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println!("cargo:rustc-cfg=thumb_1")
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}
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@ -78,6 +83,7 @@ fn main() {
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// Only emit the ARM Linux atomic emulation on pre-ARMv6 architectures. This
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// includes the old androideabi. It is deprecated but it is available as a
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// rustc target (arm-linux-androideabi).
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println!("cargo::rustc-check-cfg=cfg(kernel_user_helpers)");
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if llvm_target[0] == "armv4t"
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|| llvm_target[0] == "armv5te"
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|| target == "arm-linux-androideabi"
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@ -145,6 +151,72 @@ fn generate_aarch64_outlined_atomics() {
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std::fs::write(dst, buf).unwrap();
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}
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/// Emit directives for features we expect to support that aren't in `Cargo.toml`.
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///
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/// These are mostly cfg elements emitted by this `build.rs`.
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fn configure_check_cfg() {
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// Functions where we can set the "optimized-c" flag
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const HAS_OPTIMIZED_C: &[&str] = &[
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"__ashldi3",
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"__ashlsi3",
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"__ashrdi3",
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"__ashrsi3",
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"__clzsi2",
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"__divdi3",
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"__divsi3",
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"__divmoddi4",
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"__divmodsi4",
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"__divmodsi4",
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"__divmodti4",
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"__lshrdi3",
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"__lshrsi3",
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"__moddi3",
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"__modsi3",
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"__muldi3",
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"__udivdi3",
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"__udivmoddi4",
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"__udivmodsi4",
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"__udivsi3",
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"__umoddi3",
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"__umodsi3",
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];
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// Build a list of all aarch64 atomic operation functions
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let mut aarch_atomic = Vec::new();
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for aarch_op in ["cas", "ldadd", "ldclr", "ldeor", "ldset", "swp"] {
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let op_sizes = if aarch_op == "cas" {
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[1, 2, 4, 8, 16].as_slice()
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} else {
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[1, 2, 4, 8].as_slice()
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};
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for op_size in op_sizes {
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for ordering in ["relax", "acq", "rel", "acq_rel"] {
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aarch_atomic.push(format!("__aarch64_{}{}_{}", aarch_op, op_size, ordering));
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}
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}
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}
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for fn_name in HAS_OPTIMIZED_C
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.iter()
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.copied()
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.chain(aarch_atomic.iter().map(|s| s.as_str()))
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{
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println!(
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"cargo::rustc-check-cfg=cfg({}, values(\"optimized-c\"))",
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fn_name
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);
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}
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// Rustc is unaware of sparc target features, but this does show up from
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// `rustc --print target-features --target sparc64-unknown-linux-gnu`.
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println!("cargo::rustc-check-cfg=cfg(target_feature, values(\"vis3\"))");
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// FIXME: these come from libm and should be changed there
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println!("cargo::rustc-check-cfg=cfg(feature, values(\"checked\"))");
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println!("cargo::rustc-check-cfg=cfg(assert_no_panic)");
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}
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#[cfg(feature = "c")]
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mod c {
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extern crate cc;
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@ -303,14 +375,6 @@ mod c {
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]);
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}
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// When compiling in rustbuild (the rust-lang/rust repo) this library
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// also needs to satisfy intrinsics that jemalloc or C in general may
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// need, so include a few more that aren't typically needed by
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// LLVM/Rust.
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if cfg!(feature = "rustbuild") {
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sources.extend(&[("__ffsdi2", "ffsdi2.c")]);
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}
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// On iOS and 32-bit OSX these are all just empty intrinsics, no need to
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// include them.
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if target_os != "ios"
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@ -48,6 +48,7 @@ run() {
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docker run \
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--rm \
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-e RUST_COMPILER_RT_ROOT \
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-e RUSTFLAGS \
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-e "CARGO_TARGET_DIR=/builtins-target" \
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-v "$(pwd):/checkout:ro" \
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-w /checkout \
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@ -14,6 +14,7 @@ pub mod trunc;
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public_test_dep! {
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/// Trait for some basic operations on floats
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#[allow(dead_code)]
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pub(crate) trait Float:
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Copy
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+ core::fmt::Debug
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@ -13,6 +13,7 @@ pub use self::leading_zeros::__clzsi2;
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public_test_dep! {
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/// Trait for some basic operations on integers
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#[allow(dead_code)]
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pub(crate) trait Int:
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Copy
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+ core::fmt::Debug
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@ -1,5 +1,6 @@
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#![allow(unused_macros)]
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#[cfg(not(target_arch = "powerpc64"))]
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use testcrate::*;
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macro_rules! cmp {
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@ -155,7 +155,7 @@ macro_rules! conv {
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stringify!($fn)
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);
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}
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});
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})
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};
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}
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@ -1,7 +1,6 @@
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// makes configuration easier
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#![allow(unused_macros)]
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use compiler_builtins::float::Float;
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use testcrate::*;
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/// Make sure that the the edge case tester and randomized tester don't break, and list examples of
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@ -138,6 +137,7 @@ macro_rules! pow {
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#[test]
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fn float_pow() {
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use compiler_builtins::float::pow::{__powidf2, __powisf2};
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use compiler_builtins::float::Float;
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pow!(
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f32, 1e-4, __powisf2;
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