Move the vsx code to powerpc (#538)
Even if it is unlikely to happen the VSX instructions can be executed in 32bit mode just as well.
This commit is contained in:
Luca Barbato
Alex Crichton
parent
eaa2ea8016
commit
4db62cdf71
3 changed files with 113 additions and 128 deletions
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@ -1,4 +1,4 @@
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//! PowerPC Vectir Scalar eXtensions (VSX) intrinsics.
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//! PowerPC Vector Scalar eXtensions (VSX) intrinsics.
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//!
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//! The references are: [POWER ISA v2.07B (for POWER8 & POWER8 with NVIDIA
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//! NVlink)] and [POWER ISA v3.0B (for POWER9)].
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@ -6,7 +6,115 @@
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//! [POWER ISA v2.07B (for POWER8 & POWER8 with NVIDIA NVlink)]: https://ibm.box.com/s/jd5w15gz301s5b5dt375mshpq9c3lh4u
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//! [POWER ISA v3.0B (for POWER9)]: https://ibm.box.com/s/1hzcwkwf8rbju5h9iyf44wm94amnlcrv
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//#[cfg(test)]
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//use stdsimd_test::assert_instr;
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//use coresimd::simd_llvm::simd_add;
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//use coresimd::simd::*;
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#![allow(non_camel_case_types)]
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use coresimd::simd_llvm::*;
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#[cfg(test)]
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use stdsimd_test::assert_instr;
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use mem;
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types! {
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// pub struct vector_Float16 = f16x8;
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/// PowerPC-specific 128-bit wide vector of two packed `i64`
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pub struct vector_signed_long(i64, i64);
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/// PowerPC-specific 128-bit wide vector of two packed `u64`
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pub struct vector_unsigned_long(u64, u64);
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/// PowerPC-specific 128-bit wide vector mask of two elements
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pub struct vector_bool_long(i64, i64);
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/// PowerPC-specific 128-bit wide vector of two packed `f64`
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pub struct vector_double(f64, f64);
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// pub struct vector_signed_long_long = vector_signed_long;
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// pub struct vector_unsigned_long_long = vector_unsigned_long;
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// pub struct vector_bool_long_long = vector_bool_long;
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// pub struct vector_signed___int128 = i128x1;
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// pub struct vector_unsigned___int128 = i128x1;
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}
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mod sealed {
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use coresimd::simd::*;
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use super::*;
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pub trait VectorPermDI {
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unsafe fn vec_xxpermdi(self, b: Self, dm: u8) -> Self;
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}
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// xxpermdi has an big-endian bias and extended mnemonics
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#[inline]
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#[target_feature(enable = "vsx")]
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#[cfg_attr(
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all(test, target_endian = "little"), assert_instr(xxmrgld, dm = 0x0)
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)]
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#[cfg_attr(
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all(test, target_endian = "big"), assert_instr(xxspltd, dm = 0x0)
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)]
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unsafe fn xxpermdi(a: i64x2, b: i64x2, dm: u8) -> i64x2 {
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match dm & 0b11 {
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0 => simd_shuffle2(a, b, [0b00, 0b10]),
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1 => simd_shuffle2(a, b, [0b01, 0b10]),
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2 => simd_shuffle2(a, b, [0b00, 0b11]),
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_ => simd_shuffle2(a, b, [0b01, 0b11]),
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}
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}
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macro_rules! vec_xxpermdi {
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{$impl: ident} => {
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impl VectorPermDI for $impl {
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#[inline]
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#[target_feature(enable = "vsx")]
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unsafe fn vec_xxpermdi(self, b: Self, dm: u8) -> Self {
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mem::transmute(xxpermdi(mem::transmute(self), mem::transmute(b), dm))
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}
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}
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}
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}
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vec_xxpermdi! { vector_unsigned_long }
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vec_xxpermdi! { vector_signed_long }
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vec_xxpermdi! { vector_bool_long }
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vec_xxpermdi! { vector_double }
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}
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/// Vector permute.
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#[inline]
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#[target_feature(enable = "vsx")]
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#[rustc_args_required_const(2)]
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pub unsafe fn vec_xxpermdi<T>(a: T, b: T, dm: u8) -> T
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where
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T: sealed::VectorPermDI,
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{
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a.vec_xxpermdi(b, dm)
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}
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#[cfg(test)]
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mod tests {
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#[cfg(target_arch = "powerpc")]
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use coresimd::arch::powerpc::*;
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#[cfg(target_arch = "powerpc64")]
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use coresimd::arch::powerpc64::*;
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use coresimd::simd::*;
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use stdsimd_test::simd_test;
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macro_rules! test_vec_xxpermdi {
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{$name:ident, $shorttype:ident, $longtype:ident, [$($a:expr),+], [$($b:expr),+], [$($c:expr),+], [$($d:expr),+]} => {
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#[simd_test(enable = "vsx")]
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unsafe fn $name() {
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let a: $longtype = ::mem::transmute($shorttype::new($($a),+, $($b),+));
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let b = ::mem::transmute($shorttype::new($($c),+, $($d),+));
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assert_eq!($shorttype::new($($a),+, $($c),+), ::mem::transmute(vec_xxpermdi(a, b, 0)));
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assert_eq!($shorttype::new($($b),+, $($c),+), ::mem::transmute(vec_xxpermdi(a, b, 1)));
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assert_eq!($shorttype::new($($a),+, $($d),+), ::mem::transmute(vec_xxpermdi(a, b, 2)));
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assert_eq!($shorttype::new($($b),+, $($d),+), ::mem::transmute(vec_xxpermdi(a, b, 3)));
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}
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}
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}
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test_vec_xxpermdi!{test_vec_xxpermdi_u64x2, u64x2, vector_unsigned_long, [0], [1], [2], [3]}
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test_vec_xxpermdi!{test_vec_xxpermdi_i64x2, i64x2, vector_signed_long, [0], [-1], [2], [-3]}
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test_vec_xxpermdi!{test_vec_xxpermdi_m64x2, m64x2, vector_bool_long, [false], [true], [false], [true]}
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test_vec_xxpermdi!{test_vec_xxpermdi_f64x2, f64x2, vector_double, [0.0], [1.0], [2.0], [3.0]}
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}
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@ -6,6 +6,3 @@
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//! [64-Bit ELF V2 ABI Specification - Power Architecture]: http://openpowerfoundation.org/wp-content/uploads/resources/leabi/leabi-20170510.pdf
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pub use coresimd::powerpc::*;
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mod vsx;
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pub use self::vsx::*;
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@ -1,120 +0,0 @@
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//! PowerPC Vectir Scalar eXtensions (VSX) intrinsics.
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//!
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//! The references are: [POWER ISA v2.07B (for POWER8 & POWER8 with NVIDIA
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//! NVlink)] and [POWER ISA v3.0B (for POWER9)].
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//!
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//! [POWER ISA v2.07B (for POWER8 & POWER8 with NVIDIA NVlink)]: https://ibm.box.com/s/jd5w15gz301s5b5dt375mshpq9c3lh4u
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//! [POWER ISA v3.0B (for POWER9)]: https://ibm.box.com/s/1hzcwkwf8rbju5h9iyf44wm94amnlcrv
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#![allow(non_camel_case_types)]
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use coresimd::simd_llvm::*;
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#[cfg(test)]
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use stdsimd_test::assert_instr;
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use mem;
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types! {
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// pub struct vector_Float16 = f16x8;
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/// PowerPC-specific 128-bit wide vector of two packed `i64`
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pub struct vector_signed_long(i64, i64);
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/// PowerPC-specific 128-bit wide vector of two packed `u64`
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pub struct vector_unsigned_long(u64, u64);
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/// PowerPC-specific 128-bit wide vector mask of two elements
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pub struct vector_bool_long(i64, i64);
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/// PowerPC-specific 128-bit wide vector of two packed `f64`
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pub struct vector_double(f64, f64);
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// pub struct vector_signed_long_long = vector_signed_long;
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// pub struct vector_unsigned_long_long = vector_unsigned_long;
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// pub struct vector_bool_long_long = vector_bool_long;
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// pub struct vector_signed___int128 = i128x1;
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// pub struct vector_unsigned___int128 = i128x1;
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}
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mod sealed {
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use coresimd::simd::*;
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use super::*;
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pub trait VectorPermDI {
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unsafe fn vec_xxpermdi(self, b: Self, dm: u8) -> Self;
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}
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// xxpermdi has an big-endian bias and extended mnemonics
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#[inline]
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#[target_feature(enable = "vsx")]
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#[cfg_attr(
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all(test, target_endian = "little"), assert_instr(xxmrgld, dm = 0x0)
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)]
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#[cfg_attr(
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all(test, target_endian = "big"), assert_instr(xxspltd, dm = 0x0)
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)]
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unsafe fn xxpermdi(a: i64x2, b: i64x2, dm: u8) -> i64x2 {
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match dm & 0b11 {
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0 => simd_shuffle2(a, b, [0b00, 0b10]),
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1 => simd_shuffle2(a, b, [0b01, 0b10]),
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2 => simd_shuffle2(a, b, [0b00, 0b11]),
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_ => simd_shuffle2(a, b, [0b01, 0b11]),
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}
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}
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macro_rules! vec_xxpermdi {
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{$impl: ident} => {
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impl VectorPermDI for $impl {
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#[inline]
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#[target_feature(enable = "vsx")]
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unsafe fn vec_xxpermdi(self, b: Self, dm: u8) -> Self {
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mem::transmute(xxpermdi(mem::transmute(self), mem::transmute(b), dm))
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}
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}
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}
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}
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vec_xxpermdi! { vector_unsigned_long }
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vec_xxpermdi! { vector_signed_long }
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vec_xxpermdi! { vector_bool_long }
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vec_xxpermdi! { vector_double }
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}
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/// Vector permute.
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#[inline]
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#[target_feature(enable = "vsx")]
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#[rustc_args_required_const(2)]
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pub unsafe fn vec_xxpermdi<T>(a: T, b: T, dm: u8) -> T
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where
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T: sealed::VectorPermDI,
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{
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a.vec_xxpermdi(b, dm)
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}
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#[cfg(test)]
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mod tests {
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#[cfg(target_arch = "powerpc")]
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use coresimd::arch::powerpc::*;
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#[cfg(target_arch = "powerpc64")]
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use coresimd::arch::powerpc64::*;
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use coresimd::simd::*;
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use stdsimd_test::simd_test;
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macro_rules! test_vec_xxpermdi {
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{$name:ident, $shorttype:ident, $longtype:ident, [$($a:expr),+], [$($b:expr),+], [$($c:expr),+], [$($d:expr),+]} => {
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#[simd_test(enable = "vsx")]
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unsafe fn $name() {
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let a: $longtype = ::mem::transmute($shorttype::new($($a),+, $($b),+));
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let b = ::mem::transmute($shorttype::new($($c),+, $($d),+));
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assert_eq!($shorttype::new($($a),+, $($c),+), ::mem::transmute(vec_xxpermdi(a, b, 0)));
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assert_eq!($shorttype::new($($b),+, $($c),+), ::mem::transmute(vec_xxpermdi(a, b, 1)));
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assert_eq!($shorttype::new($($a),+, $($d),+), ::mem::transmute(vec_xxpermdi(a, b, 2)));
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assert_eq!($shorttype::new($($b),+, $($d),+), ::mem::transmute(vec_xxpermdi(a, b, 3)));
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}
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}
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}
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test_vec_xxpermdi!{test_vec_xxpermdi_u64x2, u64x2, vector_unsigned_long, [0], [1], [2], [3]}
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test_vec_xxpermdi!{test_vec_xxpermdi_i64x2, i64x2, vector_signed_long, [0], [-1], [2], [-3]}
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test_vec_xxpermdi!{test_vec_xxpermdi_m64x2, m64x2, vector_bool_long, [false], [true], [false], [true]}
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test_vec_xxpermdi!{test_vec_xxpermdi_f64x2, f64x2, vector_double, [0.0], [1.0], [2.0], [3.0]}
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}
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