[bmi] check assembly of bmi instructions

library/stdarch/asm/x86_bmi_andn.asm

@@ -0,0 +1,12 @@
+_andn_u32:
+	pushq	%rbp
+	movq	%rsp, %rbp
+	andnl	%esi, %edi, %eax
+	popq	%rbp
+	retq
+_andn_u64:
+	pushq	%rbp
+	movq	%rsp, %rbp
+	andnq	%rsi, %rdi, %rax
+	popq	%rbp
+	retq

library/stdarch/asm/x86_bmi_andn.rs

@@ -0,0 +1,12 @@
+extern crate stdsimd;
+
+#[no_mangle]
+pub fn andn_u32(x: u32, y: u32) -> u32 {
+    stdsimd::vendor::_andn_u32(x, y)
+}
+
+#[no_mangle]
+pub fn andn_u64(x: u64, y: u64) -> u64 {
+    stdsimd::vendor::_andn_u64(x, y)
+}
+

library/stdarch/asm/x86_bmi_bextr.asm

@@ -0,0 +1,32 @@
+_bextr_u32:
+	pushq	%rbp
+	movq	%rsp, %rbp
+	movzbl	%sil, %eax
+	shll	$8, %edx
+	movzwl	%dx, %ecx
+	orl	%eax, %ecx
+	bextrl	%ecx, %edi, %eax
+	popq	%rbp
+	retq
+_bextr_u64:
+	pushq	%rbp
+	movq	%rsp, %rbp
+	movzbl	%sil, %eax
+	shlq	$8, %rdx
+	movzwl	%dx, %ecx
+	orq	%rax, %rcx
+	bextrq	%rcx, %rdi, %rax
+	popq	%rbp
+	retq
+_bextr2_u32:
+	pushq	%rbp
+	movq	%rsp, %rbp
+	bextrl	%esi, %edi, %eax
+	popq	%rbp
+	retq
+_bextr2_u64:
+	pushq	%rbp
+	movq	%rsp, %rbp
+	bextrq	%rsi, %rdi, %rax
+	popq	%rbp
+	retq

library/stdarch/asm/x86_bmi_bextr.rs

@@ -0,0 +1,21 @@
+extern crate stdsimd;
+
+#[no_mangle]
+pub fn bextr_u32(x: u32, y: u32, z: u32) -> u32 {
+    stdsimd::vendor::_bextr_u32(x, y, z)
+}
+
+#[no_mangle]
+pub fn bextr_u64(x: u64, y: u64, z: u64) -> u64 {
+    stdsimd::vendor::_bextr_u64(x, y, z)
+}
+
+#[no_mangle]
+pub fn bextr2_u32(x: u32, y: u32) -> u32 {
+    stdsimd::vendor::_bextr2_u32(x, y)
+}
+
+#[no_mangle]
+pub fn bextr2_u64(x: u64, y: u64) -> u64 {
+    stdsimd::vendor::_bextr2_u64(x, y)
+}

library/stdarch/asm/x86_bmi_blsi.asm

@@ -0,0 +1,12 @@
+_blsi_u32:
+	pushq	%rbp
+	movq	%rsp, %rbp
+	blsil	%edi, %eax
+	popq	%rbp
+	retq
+_blsi_u64:
+	pushq	%rbp
+	movq	%rsp, %rbp
+	blsiq	%rdi, %rax
+	popq	%rbp
+	retq

library/stdarch/asm/x86_bmi_blsi.rs

@@ -0,0 +1,11 @@
+extern crate stdsimd;
+
+#[no_mangle]
+pub fn blsi_u32(x: u32) -> u32 {
+    stdsimd::vendor::_blsi_u32(x)
+}
+
+#[no_mangle]
+pub fn blsi_u64(x: u64) -> u64 {
+    stdsimd::vendor::_blsi_u64(x)
+}

library/stdarch/asm/x86_bmi_blsr.asm

@@ -0,0 +1,12 @@
+_blsr_u32:
+	pushq	%rbp
+	movq	%rsp, %rbp
+	blsrl	%edi, %eax
+	popq	%rbp
+	retq
+_blsr_u64:
+	pushq	%rbp
+	movq	%rsp, %rbp
+	blsrq	%rdi, %rax
+	popq	%rbp
+	retq

library/stdarch/asm/x86_bmi_blsr.rs

@@ -0,0 +1,11 @@
+extern crate stdsimd;
+
+#[no_mangle]
+pub fn blsr_u32(x: u32) -> u32 {
+    stdsimd::vendor::_blsr_u32(x)
+}
+
+#[no_mangle]
+pub fn blsr_u64(x: u64) -> u64 {
+    stdsimd::vendor::_blsr_u64(x)
+}

library/stdarch/asm/x86_bmi_tzcnt.asm

@@ -0,0 +1,12 @@
+_tzcnt_u32:
+	pushq	%rbp
+	movq	%rsp, %rbp
+	tzcntl	%edi, %eax
+	popq	%rbp
+	retq
+_tzcnt_u64:
+	pushq	%rbp
+	movq	%rsp, %rbp
+	tzcntq	%rdi, %rax
+	popq	%rbp
+	retq

library/stdarch/asm/x86_bmi_tzcnt.rs

@@ -0,0 +1,11 @@
+extern crate stdsimd;
+
+#[no_mangle]
+pub fn tzcnt_u32(x: u32) -> u32 {
+    stdsimd::vendor::_tzcnt_u32(x)
+}
+
+#[no_mangle]
+pub fn tzcnt_u64(x: u64) -> u64 {
+    stdsimd::vendor::_tzcnt_u64(x)
+}