Ensure shift instrinsic arguments match width of compiler-rt's (int vs si_int).

This commit is contained in:
William D. Jones 2023-03-26 00:00:58 -04:00
parent 541f19423d
commit 5246405d61

View file

@ -78,8 +78,8 @@ intrinsics! {
#[avr_skip]
#[maybe_use_optimized_c_shim]
#[arm_aeabi_alias = __aeabi_llsl]
pub extern "C" fn __ashldi3(a: u64, b: u32) -> u64 {
a.ashl(b)
pub extern "C" fn __ashldi3(a: u64, b: core::ffi::c_uint) -> u64 {
a.ashl(b as u32)
}
#[avr_skip]
@ -96,8 +96,8 @@ intrinsics! {
#[avr_skip]
#[maybe_use_optimized_c_shim]
#[arm_aeabi_alias = __aeabi_lasr]
pub extern "C" fn __ashrdi3(a: i64, b: u32) -> i64 {
a.ashr(b)
pub extern "C" fn __ashrdi3(a: i64, b: core::ffi::c_uint) -> i64 {
a.ashr(b as u32)
}
#[avr_skip]
@ -114,8 +114,8 @@ intrinsics! {
#[avr_skip]
#[maybe_use_optimized_c_shim]
#[arm_aeabi_alias = __aeabi_llsr]
pub extern "C" fn __lshrdi3(a: u64, b: u32) -> u64 {
a.lshr(b)
pub extern "C" fn __lshrdi3(a: u64, b: core::ffi::c_uint) -> u64 {
a.lshr(b as u32)
}
#[avr_skip]