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Don't require AVX512 for 256-bit VAES intrinsics (#1348)

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Amanieu d'Antras 2022-10-27 19:51:16 +01:00 • committed by GitHub
parent eea72e2ed7
commit 55f9fcda26
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2 changed files with 10 additions and 4 deletions
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8
library/stdarch/crates/core_arch/src/x86/avx512vaes.rs
View file

@ -38,7 +38,7 @@ extern "C" {
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_aesenc_epi128)
#[inline]
#[target_feature(enable = "avx512vaes,avx512vl")]
#[target_feature(enable = "avx512vaes")]
#[cfg_attr(test, assert_instr(vaesenc))]
pub unsafe fn _mm256_aesenc_epi128(a: __m256i, round_key: __m256i) -> __m256i {
aesenc_256(a, round_key)
@ -49,7 +49,7 @@ pub unsafe fn _mm256_aesenc_epi128(a: __m256i, round_key: __m256i) -> __m256i {
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_aesenclast_epi128)
#[inline]
#[target_feature(enable = "avx512vaes,avx512vl")]
#[target_feature(enable = "avx512vaes")]
#[cfg_attr(test, assert_instr(vaesenclast))]
pub unsafe fn _mm256_aesenclast_epi128(a: __m256i, round_key: __m256i) -> __m256i {
aesenclast_256(a, round_key)
@ -60,7 +60,7 @@ pub unsafe fn _mm256_aesenclast_epi128(a: __m256i, round_key: __m256i) -> __m256
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_aesdec_epi128)
#[inline]
#[target_feature(enable = "avx512vaes,avx512vl")]
#[target_feature(enable = "avx512vaes")]
#[cfg_attr(test, assert_instr(vaesdec))]
pub unsafe fn _mm256_aesdec_epi128(a: __m256i, round_key: __m256i) -> __m256i {
aesdec_256(a, round_key)
@ -71,7 +71,7 @@ pub unsafe fn _mm256_aesdec_epi128(a: __m256i, round_key: __m256i) -> __m256i {
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_aesdeclast_epi128)
#[inline]
#[target_feature(enable = "avx512vaes,avx512vl")]
#[target_feature(enable = "avx512vaes")]
#[cfg_attr(test, assert_instr(vaesdeclast))]
pub unsafe fn _mm256_aesdeclast_epi128(a: __m256i, round_key: __m256i) -> __m256i {
aesdeclast_256(a, round_key)

6
library/stdarch/crates/stdarch-verify/tests/x86-intel.rs
View file

@ -471,6 +471,12 @@ fn matches(rust: &Function, intel: &Intrinsic) -> Result<(), String> {
continue;
}
// Some AMD CPUs support VAES without AVX512, even though the Intel
// documentation states that those instructions require AVX512VL.
if *cpuid == "AVX512VL" && intel.cpuid.contains(&"VAES".to_string()) {
continue;
}
let cpuid = cpuid
.chars()
.flat_map(|c| c.to_lowercase())