Merge pull request #1960 from maurer/remove-tme
aarch64: Remove withdrawn FEAT_TME
This commit is contained in:
commit
57436fe950
6 changed files with 2 additions and 210 deletions
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@ -15,5 +15,4 @@ RUN apt-get update && apt-get install -y --no-install-recommends \
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ENV CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_LINKER=aarch64-linux-gnu-gcc \
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CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_RUNNER="qemu-aarch64 -cpu max -L /usr/aarch64-linux-gnu" \
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OBJDUMP=aarch64-linux-gnu-objdump \
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STDARCH_TEST_SKIP_FEATURE=tme
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OBJDUMP=aarch64-linux-gnu-objdump
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@ -27,4 +27,3 @@ ENV AARCH64_BE_LIBC="${AARCH64_BE_TOOLCHAIN}/aarch64_be-none-linux-gnu/libc"
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ENV CARGO_TARGET_AARCH64_BE_UNKNOWN_LINUX_GNU_LINKER="${AARCH64_BE_TOOLCHAIN}/bin/aarch64_be-none-linux-gnu-gcc"
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ENV CARGO_TARGET_AARCH64_BE_UNKNOWN_LINUX_GNU_RUNNER="qemu-aarch64_be -cpu max -L ${AARCH64_BE_LIBC}"
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ENV OBJDUMP="${AARCH64_BE_TOOLCHAIN}/bin/aarch64_be-none-linux-gnu-objdump"
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ENV STDARCH_TEST_SKIP_FEATURE=tme
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@ -21,10 +21,6 @@ mod neon;
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub use self::neon::*;
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mod tme;
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub use self::tme::*;
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mod prefetch;
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#[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")]
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pub use self::prefetch::*;
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@ -1,201 +0,0 @@
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//! ARM's Transactional Memory Extensions (TME).
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//!
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//! This CPU feature is available on Aarch64 - A architecture profile.
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//! This feature is in the non-neon feature set. TME specific vendor documentation can
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//! be found [TME Intrinsics Introduction][tme_intrinsics_intro].
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//!
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//! The reference is [ACLE Q4 2019][acle_q4_2019_ref].
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//!
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//! ACLE has a section for TME extensions and state masks for aborts and failure codes.
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//! [ARM A64 Architecture Register Datasheet][a_profile_future] also describes possible failure code scenarios.
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//!
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//! [acle_q4_2019_ref]: https://static.docs.arm.com/101028/0010/ACLE_2019Q4_release-0010.pdf
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//! [tme_intrinsics_intro]: https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics
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//! [llvm_aarch64_int]: https://github.com/llvm/llvm-project/commit/a36d31478c182903523e04eb271bbf102bfab2cc#diff-ff24e1c35f4d54f1110ce5d90c709319R626-R646
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//! [a_profile_future]: https://static.docs.arm.com/ddi0601/a/SysReg_xml_futureA-2019-04.pdf?_ga=2.116560387.441514988.1590524918-1110153136.1588469296
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#[cfg(test)]
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use stdarch_test::assert_instr;
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unsafe extern "unadjusted" {
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#[link_name = "llvm.aarch64.tstart"]
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fn aarch64_tstart() -> u64;
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#[link_name = "llvm.aarch64.tcommit"]
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fn aarch64_tcommit();
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#[link_name = "llvm.aarch64.tcancel"]
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fn aarch64_tcancel(imm0: u64);
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#[link_name = "llvm.aarch64.ttest"]
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fn aarch64_ttest() -> u64;
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}
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/// Transaction successfully started.
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub const _TMSTART_SUCCESS: u64 = 0x00_u64;
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/// Extraction mask for failure reason
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub const _TMFAILURE_REASON: u64 = 0x00007FFF_u64;
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/// Transaction retry is possible.
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub const _TMFAILURE_RTRY: u64 = 1 << 15;
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/// Transaction executed a TCANCEL instruction
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub const _TMFAILURE_CNCL: u64 = 1 << 16;
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/// Transaction aborted because a conflict occurred
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub const _TMFAILURE_MEM: u64 = 1 << 17;
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/// Fallback error type for any other reason
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub const _TMFAILURE_IMP: u64 = 1 << 18;
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/// Transaction aborted because a non-permissible operation was attempted
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub const _TMFAILURE_ERR: u64 = 1 << 19;
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/// Transaction aborted due to read or write set limit was exceeded
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub const _TMFAILURE_SIZE: u64 = 1 << 20;
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/// Transaction aborted due to transactional nesting level was exceeded
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub const _TMFAILURE_NEST: u64 = 1 << 21;
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/// Transaction aborted due to a debug trap.
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub const _TMFAILURE_DBG: u64 = 1 << 22;
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/// Transaction failed from interrupt
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub const _TMFAILURE_INT: u64 = 1 << 23;
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/// Indicates a TRIVIAL version of TM is available
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub const _TMFAILURE_TRIVIAL: u64 = 1 << 24;
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// NOTE: Tests for these instructions are disabled on MSVC as dumpbin doesn't
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// understand these instructions.
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/// Starts a new transaction. When the transaction starts successfully the return value is 0.
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/// If the transaction fails, all state modifications are discarded and a cause of the failure
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/// is encoded in the return value.
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///
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/// [ARM TME Intrinsics](https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics).
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#[inline]
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#[target_feature(enable = "tme")]
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#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(tstart))]
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub unsafe fn __tstart() -> u64 {
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aarch64_tstart()
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}
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/// Commits the current transaction. For a nested transaction, the only effect is that the
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/// transactional nesting depth is decreased. For an outer transaction, the state modifications
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/// performed transactionally are committed to the architectural state.
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///
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/// [ARM TME Intrinsics](https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics).
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#[inline]
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#[target_feature(enable = "tme")]
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#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(tcommit))]
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub unsafe fn __tcommit() {
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aarch64_tcommit()
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}
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/// Cancels the current transaction and discards all state modifications that were performed transactionally.
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///
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/// [ARM TME Intrinsics](https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics).
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#[inline]
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#[target_feature(enable = "tme")]
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#[cfg_attr(
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all(test, not(target_env = "msvc")),
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assert_instr(tcancel, IMM16 = 0x0)
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)]
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#[rustc_legacy_const_generics(0)]
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub unsafe fn __tcancel<const IMM16: u64>() {
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static_assert!(IMM16 <= 65535);
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aarch64_tcancel(IMM16);
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}
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/// Tests if executing inside a transaction. If no transaction is currently executing,
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/// the return value is 0. Otherwise, this intrinsic returns the depth of the transaction.
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///
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/// [ARM TME Intrinsics](https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics).
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#[inline]
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#[target_feature(enable = "tme")]
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#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(ttest))]
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#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")]
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pub unsafe fn __ttest() -> u64 {
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aarch64_ttest()
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}
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#[cfg(test)]
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mod tests {
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use stdarch_test::simd_test;
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use crate::core_arch::aarch64::*;
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const CANCEL_CODE: u64 = (0 | (0x123 & _TMFAILURE_REASON) as u64) as u64;
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#[simd_test(enable = "tme")]
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unsafe fn test_tstart() {
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let mut x = 0;
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for i in 0..10 {
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let code = tme::__tstart();
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if code == _TMSTART_SUCCESS {
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x += 1;
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assert_eq!(x, i + 1);
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break;
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}
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assert_eq!(x, 0);
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}
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}
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#[simd_test(enable = "tme")]
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unsafe fn test_tcommit() {
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let mut x = 0;
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for i in 0..10 {
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let code = tme::__tstart();
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if code == _TMSTART_SUCCESS {
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x += 1;
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assert_eq!(x, i + 1);
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tme::__tcommit();
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}
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assert_eq!(x, i + 1);
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}
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}
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#[simd_test(enable = "tme")]
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unsafe fn test_tcancel() {
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let mut x = 0;
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for i in 0..10 {
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let code = tme::__tstart();
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if code == _TMSTART_SUCCESS {
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x += 1;
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assert_eq!(x, i + 1);
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tme::__tcancel::<CANCEL_CODE>();
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break;
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}
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}
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assert_eq!(x, 0);
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}
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#[simd_test(enable = "tme")]
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unsafe fn test_ttest() {
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for _ in 0..10 {
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let code = tme::__tstart();
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if code == _TMSTART_SUCCESS {
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if tme::__ttest() == 2 {
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tme::__tcancel::<CANCEL_CODE>();
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break;
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}
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}
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}
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}
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}
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@ -78,7 +78,7 @@ pub(crate) fn disassemble_myself() -> HashSet<Function> {
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let objdump = env::var("OBJDUMP").unwrap_or_else(|_| "objdump".to_string());
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let add_args = if cfg!(target_vendor = "apple") && cfg!(target_arch = "aarch64") {
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// Target features need to be enabled for LLVM objdump on Darwin ARM64
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vec!["--mattr=+v8.6a,+crypto,+tme"]
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vec!["--mattr=+v8.6a,+crypto"]
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} else if cfg!(any(target_arch = "riscv32", target_arch = "riscv64")) {
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vec!["--mattr=+zk,+zks,+zbc,+zbb"]
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} else {
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@ -444,7 +444,6 @@ fn verify_all_signatures() {
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&& !rust.file.ends_with("v6.rs\"")
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&& !rust.file.ends_with("v7.rs\"")
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&& !rust.file.ends_with("v8.rs\"")
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&& !rust.file.ends_with("tme.rs\"")
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&& !rust.file.ends_with("mte.rs\"")
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&& !rust.file.ends_with("ex.rs\"")
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&& !skip_intrinsic_verify.contains(&rust.name)
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