From 69341c44cced1fe7a8dac8ac7ffb2b9c3e63e48a Mon Sep 17 00:00:00 2001 From: Antoni Boucher Date: Thu, 24 Nov 2022 18:32:17 -0500 Subject: [PATCH] Fix the argument order for some AVX-512 intrinsics --- src/intrinsic/llvm.rs | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs index 621ef328a8cf..4552ab95e537 100644 --- a/src/intrinsic/llvm.rs +++ b/src/intrinsic/llvm.rs @@ -304,6 +304,15 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc new_args[0] = arg1.dereference(None).to_rvalue(); args = new_args.into(); }, + "__builtin_ia32_rcp14sd_mask" | "__builtin_ia32_rcp14ss_mask" | "__builtin_ia32_rsqrt14sd_mask" + | "__builtin_ia32_rsqrt14ss_mask" => { + let new_args = args.to_vec(); + args = vec![new_args[1], new_args[0], new_args[2], new_args[3]].into(); + }, + "__builtin_ia32_sqrtsd_mask_round" | "__builtin_ia32_sqrtss_mask_round" => { + let new_args = args.to_vec(); + args = vec![new_args[1], new_args[0], new_args[2], new_args[3], new_args[4]].into(); + }, _ => (), } }