Enforce staged_api on a per-feature basis
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gnzlbg
gnzlbg
parent
1f44c1407d
commit
599bcf28ad
9 changed files with 87 additions and 67 deletions
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@ -11,26 +11,26 @@ features! {
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@NO_RUNTIME_DETECTION: "v8.1a";
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@NO_RUNTIME_DETECTION: "v8.2a";
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@NO_RUNTIME_DETECTION: "v8.3a";
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@FEATURE: asimd: "neon";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] asimd: "neon";
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/// ARM Advanced SIMD (ASIMD)
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@FEATURE: pmull: "pmull";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] pmull: "pmull";
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/// Polynomial Multiply
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@FEATURE: fp: "fp";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] fp: "fp";
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/// Floating point support
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@FEATURE: fp16: "fp16";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] fp16: "fp16";
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/// Half-float support.
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@FEATURE: sve: "sve";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] sve: "sve";
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/// Scalable Vector Extension (SVE)
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@FEATURE: crc: "crc";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] crc: "crc";
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/// CRC32 (Cyclic Redundancy Check)
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@FEATURE: crypto: "crypto";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] crypto: "crypto";
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/// Crypto: AES + PMULL + SHA1 + SHA2
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@FEATURE: lse: "lse";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] lse: "lse";
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/// Atomics (Large System Extension)
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@FEATURE: rdm: "rdm";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] rdm: "rdm";
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/// Rounding Double Multiply (ASIMDRDM)
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@FEATURE: rcpc: "rcpc";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] rcpc: "rcpc";
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/// Release consistent Processor consistent (RcPc)
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@FEATURE: dotprod: "dotprod";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] dotprod: "dotprod";
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/// Vector Dot-Product (ASIMDDP)
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}
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@ -10,8 +10,8 @@ features! {
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@NO_RUNTIME_DETECTION: "vfp2";
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@NO_RUNTIME_DETECTION: "vfp3";
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@NO_RUNTIME_DETECTION: "vfp4";
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@FEATURE: neon: "neon";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] neon: "neon";
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/// ARM Advanced SIMD (NEON) - Aarch32
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@FEATURE: pmull: "pmull";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] pmull: "pmull";
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/// Polynomial Multiply
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}
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@ -6,6 +6,6 @@ features! {
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@MACRO_ATTRS:
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/// Checks if `mips` feature is enabled.
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#[unstable(feature = "stdsimd", issue = "27731")]
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@FEATURE: msa: "msa";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] msa: "msa";
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/// MIPS SIMD Architecture (MSA)
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}
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@ -6,6 +6,6 @@ features! {
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@MACRO_ATTRS:
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/// Checks if `mips64` feature is enabled.
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#[unstable(feature = "stdsimd", issue = "27731")]
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@FEATURE: msa: "msa";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] msa: "msa";
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/// MIPS SIMD Architecture (MSA)
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}
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@ -6,10 +6,10 @@ features! {
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@MACRO_ATTRS:
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/// Checks if `powerpc` feature is enabled.
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#[unstable(feature = "stdsimd", issue = "27731")]
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@FEATURE: altivec: "altivec";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] altivec: "altivec";
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/// Altivec
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@FEATURE: vsx: "vsx";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] vsx: "vsx";
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/// VSX
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@FEATURE: power8: "power8";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] power8: "power8";
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/// Power8
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}
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@ -6,10 +6,10 @@ features! {
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@MACRO_ATTRS:
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/// Checks if `powerpc` feature is enabled.
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#[unstable(feature = "stdsimd", issue = "27731")]
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@FEATURE: altivec: "altivec";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] altivec: "altivec";
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/// Altivec
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@FEATURE: vsx: "vsx";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] vsx: "vsx";
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/// VSX
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@FEATURE: power8: "power8";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] power8: "power8";
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/// Power8
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}
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@ -82,87 +82,87 @@ features! {
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/// [docs]: https://software.intel.com/sites/landingpage/IntrinsicsGuide
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#[stable(feature = "simd_x86", since = "1.27.0")]
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@BIND_FEATURE_NAME: "abm"; "lzcnt"; // abm is a synonym for lzcnt
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@FEATURE: aes: "aes";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] aes: "aes";
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/// AES (Advanced Encryption Standard New Instructions AES-NI)
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@FEATURE: pclmulqdq: "pclmulqdq";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] pclmulqdq: "pclmulqdq";
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/// CLMUL (Carry-less Multiplication)
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@FEATURE: rdrand: "rdrand";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] rdrand: "rdrand";
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/// RDRAND
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@FEATURE: rdseed: "rdseed";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] rdseed: "rdseed";
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/// RDSEED
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@FEATURE: tsc: "tsc";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] tsc: "tsc";
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/// TSC (Time Stamp Counter)
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@FEATURE: mmx: "mmx";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] mmx: "mmx";
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/// MMX (MultiMedia eXtensions)
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@FEATURE: sse: "sse";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse: "sse";
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/// SSE (Streaming SIMD Extensions)
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@FEATURE: sse2: "sse2";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse2: "sse2";
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/// SSE2 (Streaming SIMD Extensions 2)
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@FEATURE: sse3: "sse3";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse3: "sse3";
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/// SSE3 (Streaming SIMD Extensions 3)
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@FEATURE: ssse3: "ssse3";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] ssse3: "ssse3";
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/// SSSE3 (Supplemental Streaming SIMD Extensions 3)
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@FEATURE: sse4_1: "sse4.1";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse4_1: "sse4.1";
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/// SSE4.1 (Streaming SIMD Extensions 4.1)
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@FEATURE: sse4_2: "sse4.2";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse4_2: "sse4.2";
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/// SSE4.2 (Streaming SIMD Extensions 4.2)
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@FEATURE: sse4a: "sse4a";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] sse4a: "sse4a";
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/// SSE4a (Streaming SIMD Extensions 4a)
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@FEATURE: sha: "sha";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sha: "sha";
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/// SHA
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@FEATURE: avx: "avx";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx: "avx";
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/// AVX (Advanced Vector Extensions)
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@FEATURE: avx2: "avx2";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx2: "avx2";
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/// AVX2 (Advanced Vector Extensions 2)
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@FEATURE: avx512f: "avx512f" ;
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] avx512f: "avx512f" ;
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/// AVX-512 F (Foundation)
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@FEATURE: avx512cd: "avx512cd" ;
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] avx512cd: "avx512cd" ;
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/// AVX-512 CD (Conflict Detection Instructions)
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@FEATURE: avx512er: "avx512er";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] avx512er: "avx512er";
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/// AVX-512 ER (Expo nential and Reciprocal Instructions)
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@FEATURE: avx512pf: "avx512pf";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] avx512pf: "avx512pf";
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/// AVX-512 PF (Prefetch Instructions)
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@FEATURE: avx512bw: "avx512bw";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] avx512bw: "avx512bw";
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/// AVX-512 BW (Byte and Word Instructions)
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@FEATURE: avx512dq: "avx512dq";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] avx512dq: "avx512dq";
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/// AVX-512 DQ (Doubleword and Quadword)
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@FEATURE: avx512vl: "avx512vl";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] avx512vl: "avx512vl";
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/// AVX-512 VL (Vector Length Extensions)
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@FEATURE: avx512ifma: "avx512ifma";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] avx512ifma: "avx512ifma";
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/// AVX-512 IFMA (Integer Fused Multiply Add)
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@FEATURE: avx512vbmi: "avx512vbmi";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] avx512vbmi: "avx512vbmi";
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/// AVX-512 VBMI (Vector Byte Manipulation Instructions)
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@FEATURE: avx512vpopcntdq: "avx512vpopcntdq";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] avx512vpopcntdq: "avx512vpopcntdq";
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/// AVX-512 VPOPCNTDQ (Vector Population Count Doubleword and
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/// Quadword)
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@FEATURE: f16c: "f16c";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] f16c: "f16c";
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/// F16C (Conversions between IEEE-754 `binary16` and `binary32` formats)
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@FEATURE: fma: "fma";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] fma: "fma";
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/// FMA (Fused Multiply Add)
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@FEATURE: bmi1: "bmi1" ;
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] bmi1: "bmi1" ;
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/// BMI1 (Bit Manipulation Instructions 1)
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@FEATURE: bmi2: "bmi2" ;
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] bmi2: "bmi2" ;
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/// BMI2 (Bit Manipulation Instructions 2)
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@FEATURE: lzcnt: "lzcnt";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] lzcnt: "lzcnt";
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/// ABM (Advanced Bit Manipulation) / LZCNT (Leading Zero Count)
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@FEATURE: tbm: "tbm";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] tbm: "tbm";
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/// TBM (Trailing Bit Manipulation)
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@FEATURE: popcnt: "popcnt";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] popcnt: "popcnt";
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/// POPCNT (Population Count)
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@FEATURE: fxsr: "fxsr";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] fxsr: "fxsr";
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/// FXSR (Floating-point context fast save and restor)
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@FEATURE: xsave: "xsave";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsave: "xsave";
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/// XSAVE (Save Processor Extended States)
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@FEATURE: xsaveopt: "xsaveopt";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsaveopt: "xsaveopt";
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/// XSAVEOPT (Save Processor Extended States Optimized)
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@FEATURE: xsaves: "xsaves";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsaves: "xsaves";
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/// XSAVES (Save Processor Extended States Supervisor)
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@FEATURE: xsavec: "xsavec";
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@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsavec: "xsavec";
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/// XSAVEC (Save Processor Extended States Compacted)
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@FEATURE: cmpxchg16b: "cmpxchg16b";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] cmpxchg16b: "cmpxchg16b";
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/// CMPXCH16B (16-byte compare-and-swap instruction)
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@FEATURE: adx: "adx";
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@FEATURE: #[stable(feature = "simd_x86_adx", since = "1.33.0")] adx: "adx";
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/// ADX, Intel ADX (Multi-Precision Add-Carry Instruction Extensions)
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@FEATURE: rtm: "rtm";
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@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] rtm: "rtm";
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/// RTM, Intel (Restricted Transactional Memory)
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}
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@ -5,16 +5,15 @@ macro_rules! features {
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@MACRO_ATTRS: $(#[$macro_attrs:meta])*
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$(@BIND_FEATURE_NAME: $bind_feature:tt; $feature_impl:tt; )*
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$(@NO_RUNTIME_DETECTION: $nort_feature:tt; )*
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$(@FEATURE: $feature:ident: $feature_lit:tt; $(#[$feature_comment:meta])*)*
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$(@FEATURE: #[$stability_attr:meta] $feature:ident: $feature_lit:tt; $(#[$feature_comment:meta])*)*
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) => {
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#[macro_export]
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$(#[$macro_attrs])*
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#[allow_internal_unstable(stdsimd_internal,stdsimd)]
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#[allow_internal_unstable(stdsimd_internal,stdsimd,staged_api)]
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macro_rules! $macro_name {
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$(
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($feature_lit) => {
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cfg!(target_feature = $feature_lit) ||
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$crate::detect::check_for($crate::detect::Feature::$feature)
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$crate::detect::__is_feature_detected::$feature()
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};
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)*
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$(
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@ -70,5 +69,26 @@ macro_rules! features {
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}
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}
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}
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/// Each function performs run-time feature detection for a single
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/// feature. This allow us to use stability attributes on a per feature
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/// basis.
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///
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/// PLEASE: do not use this, it is an implementation detail subject
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/// to change.
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#[doc(hidden)]
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pub mod __is_feature_detected {
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$(
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/// PLEASE: do not use this, it is an implementation detail
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/// subject to change.
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#[doc(hidden)]
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#[$stability_attr]
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pub fn $feature() -> bool {
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cfg!(target_feature = $feature_lit) ||
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$crate::detect::check_for($crate::detect::Feature::$feature)
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}
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)*
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}
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};
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}
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@ -61,7 +61,7 @@ cfg_if! {
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}
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}
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}
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pub use self::arch::Feature;
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pub use self::arch::{Feature, __is_feature_detected};
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mod bit;
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mod cache;
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