From 62ff543c36fbfccf152fc3869c26767f908995c7 Mon Sep 17 00:00:00 2001 From: Amanieu d'Antras Date: Thu, 14 May 2020 22:09:32 +0100 Subject: [PATCH] Simplify register name output for x86 --- src/librustc_target/asm/x86.rs | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/src/librustc_target/asm/x86.rs b/src/librustc_target/asm/x86.rs index c3dd7bc8e7bd..ed51b526414d 100644 --- a/src/librustc_target/asm/x86.rs +++ b/src/librustc_target/asm/x86.rs @@ -297,7 +297,7 @@ impl X86InlineAsmReg { _ => unreachable!(), } } else if self as u32 <= Self::di as u32 { - let root = ["si", "di"][self as usize - Self::si as usize]; + let root = self.name(); match modifier.unwrap_or(reg_default_modifier) { 'l' => write!(out, "{}l", root), 'x' => write!(out, "{}", root), @@ -306,12 +306,12 @@ impl X86InlineAsmReg { _ => unreachable!(), } } else if self as u32 <= Self::r15 as u32 { - let index = self as u32 - Self::r8 as u32 + 8; + let root = self.name(); match modifier.unwrap_or(reg_default_modifier) { - 'l' => write!(out, "r{}b", index), - 'x' => write!(out, "r{}w", index), - 'e' => write!(out, "r{}d", index), - 'r' => write!(out, "r{}", index), + 'l' => write!(out, "{}b", root), + 'x' => write!(out, "{}w", root), + 'e' => write!(out, "{}d", root), + 'r' => out.write_str(root), _ => unreachable!(), } } else if self as u32 <= Self::r15b as u32 { @@ -329,8 +329,7 @@ impl X86InlineAsmReg { let index = self as u32 - Self::zmm0 as u32; write!(out, "{}{}", prefix, index) } else { - let index = self as u32 - Self::k1 as u32 + 1; - write!(out, "k{}", index) + out.write_str(self.name()) } }