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RISC-V: Add two "A" extension subsets

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The "A" extension comprises instructions provided by the "Zaamo" and
"Zalrsc" extensions.  To prepare for the "Zacas" extension (which provides
compare-and-swap instructions and discoverable from Linux) which depends on
the "Zaamo" extension, it would be better to support those subsets.
This commit is contained in:
Tsukasa OI 2025-04-11 01:13:44 +00:00 • committed by Amanieu d'Antras
parent 53e89494b3
commit 68c54c19be
2 changed files with 10 additions and 1 deletions
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6
library/stdarch/crates/std_detect/src/detect/arch/riscv.rs
View file

@ -30,6 +30,8 @@ features! {
/// * RV32I: `"rv32i"`
/// * RV64I: `"rv64i"`
/// * A: `"a"`
/// * Zaamo: `"zaamo"`
/// * Zalrsc: `"zalrsc"`
/// * Bit-Manipulation Extensions:
/// * Zba: `"zba"`
/// * Zbb: `"zbb"`
@ -122,6 +124,10 @@ features! {
@FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] a: "a";
/// "A" Extension for Atomic Instructions
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zalrsc: "zalrsc";
/// "Zalrsc" Extension for Load-Reserved/Store-Conditional Instructions
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zaamo: "zaamo";
/// "Zaamo" Extension for Atomic Memory Operations
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zam: "zam";
without cfg check: true;
/// "Zam" Extension for Misaligned Atomics

5
library/stdarch/crates/std_detect/src/detect/os/linux/riscv.rs
View file

@ -18,7 +18,10 @@ pub(crate) fn detect_features() -> cache::Initializer {
// [hwcap]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/riscv/include/uapi/asm/hwcap.h?h=v6.14
let auxv = auxvec::auxv().expect("read auxvec"); // should not fail on RISC-V platform
#[allow(clippy::eq_op)]
enable_feature(Feature::a, bit::test(auxv.hwcap, (b'a' - b'a').into()));
let has_a = bit::test(auxv.hwcap, (b'a' - b'a').into());
enable_feature(Feature::a, has_a);
enable_feature(Feature::zalrsc, has_a);
enable_feature(Feature::zaamo, has_a);
enable_feature(Feature::c, bit::test(auxv.hwcap, (b'c' - b'a').into()));
let has_d = bit::test(auxv.hwcap, (b'd' - b'a').into());
let has_f = bit::test(auxv.hwcap, (b'f' - b'a').into());