Support repr(simd) on ADTs containing a single array field
This PR allows using `#[repr(simd)]` on ADTs containing a single array field: ```rust #[repr(simd)] struct S0([f32; 4]); #[repr(simd)] struct S1<const N: usize>([f32; N]); #[repr(simd)] struct S2<T, const N: usize>([T; N]); ``` This should allow experimenting with portable packed SIMD abstractions on nightly that make use of const generics.
This commit is contained in:
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9d78d1d027
commit
6e88e96ccf
15 changed files with 427 additions and 160 deletions
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@ -0,0 +1,47 @@
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// compile-flags: -C no-prepopulate-passes
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#![crate_type = "lib"]
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#![feature(repr_simd, platform_intrinsics, const_generics)]
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#![allow(non_camel_case_types, incomplete_features)]
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#[repr(simd)]
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#[derive(Copy, Clone)]
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pub struct M(pub f32, pub f32, pub f32, pub f32);
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#[repr(simd)]
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#[derive(Copy, Clone)]
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pub struct S<const N: usize>([f32; N]);
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extern "platform-intrinsic" {
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fn simd_extract<T, U>(x: T, idx: u32) -> U;
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fn simd_insert<T, U>(x: T, idx: u32, b: U) -> T;
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}
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// CHECK-LABEL: @extract_m
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#[no_mangle]
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pub unsafe fn extract_m(v: M, i: u32) -> f32 {
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// CHECK: extractelement <4 x float> %0, i32 %i
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simd_extract(v, i)
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}
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// CHECK-LABEL: @extract_s
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#[no_mangle]
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pub unsafe fn extract_s(v: S<4>, i: u32) -> f32 {
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// CHECK: extractelement <4 x float> %0, i32 %i
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simd_extract(v, i)
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}
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// CHECK-LABEL: @insert_m
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#[no_mangle]
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pub unsafe fn insert_m(v: M, i: u32, j: f32) -> M {
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// CHECK: insertelement <4 x float> %1, float %j, i32 %i
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simd_insert(v, i, j)
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}
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// CHECK-LABEL: @insert_s
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#[no_mangle]
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pub unsafe fn insert_s(v: S<4>, i: u32, j: f32) -> S<4> {
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// CHECK: insertelement <4 x float> %1, float %j, i32 %i
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simd_insert(v, i, j)
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}
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@ -0,0 +1,44 @@
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// ignore-tidy-linelength
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// compile-flags: -C no-prepopulate-passes
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// min-llvm-version 8.0
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#![crate_type = "lib"]
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#![allow(non_camel_case_types, incomplete_features)]
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#![feature(repr_simd, platform_intrinsics, const_generics)]
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#[repr(simd)]
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#[derive(Copy, Clone)]
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pub struct S<const N: usize>([f32; N]);
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#[repr(simd)]
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#[derive(Copy, Clone)]
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pub struct T([f32; 4]);
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#[repr(simd)]
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#[derive(Copy, Clone)]
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pub struct U(f32, f32, f32, f32);
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// CHECK-LABEL: @build_array_s
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#[no_mangle]
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pub fn build_array_s(x: [f32; 4]) -> S<4> {
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}} %{{[0-9]+}}, i8* {{.*}} %3, i64 16, i1 false)
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}} %{{[0-9]+}}, i8* {{.*}} %6, i64 16, i1 false)
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S::<4>(x)
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}
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// CHECK-LABEL: @build_array_t
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#[no_mangle]
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pub fn build_array_t(x: [f32; 4]) -> T {
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}} %{{[0-9]+}}, i8* {{.*}} %3, i64 16, i1 false)
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}} %{{[0-9]+}}, i8* {{.*}} %6, i64 16, i1 false)
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T(x)
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}
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// CHECK-LABEL: @build_array_u
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#[no_mangle]
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pub fn build_array_u(x: [f32; 4]) -> U {
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}} %{{[0-9]+}}, i8* {{.*}} %3, i64 16, i1 false)
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}} %{{[0-9]+}}, i8* {{.*}} %6, i64 16, i1 false)
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unsafe { std::mem::transmute(x) }
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}
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@ -1,4 +1,4 @@
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error[E0077]: SIMD vector element type should be machine type
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error[E0077]: SIMD vector element type should be a primitive scalar (integer/float/pointer) type
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--> $DIR/E0077.rs:4:1
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LL | struct Bad(String);
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@ -2,7 +2,9 @@
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#![feature(repr_simd, platform_intrinsics)]
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// error-pattern:monomorphising SIMD type `Simd2<X>` with a non-machine element type `X`
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// ignore-tidy-linelength
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// error-pattern:monomorphising SIMD type `Simd2<X>` with a non-primitive-scalar (integer/float/pointer) element type `X`
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struct X(Vec<i32>);
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#[repr(simd)]
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@ -1,4 +1,4 @@
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error: monomorphising SIMD type `Simd2<X>` with a non-machine element type `X`
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error: monomorphising SIMD type `Simd2<X>` with a non-primitive-scalar (integer/float/pointer) element type `X`
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error: aborting due to previous error
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@ -1,10 +1,20 @@
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#![feature(repr_simd)]
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#![allow(non_camel_case_types)]
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// ignore-tidy-linelength
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#[repr(simd)]
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struct empty; //~ ERROR SIMD vector cannot be empty
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#[repr(simd)]
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struct i64f64(i64, f64); //~ ERROR SIMD vector should be homogeneous
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struct Foo;
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#[repr(simd)]
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struct FooV(Foo, Foo); //~ ERROR SIMD vector element type should be a primitive scalar (integer/float/pointer) type
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#[repr(simd)]
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struct FooV2([Foo; 2]); //~ ERROR SIMD vector element type should be a primitive scalar (integer/float/pointer) type
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fn main() {}
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@ -1,16 +1,28 @@
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error[E0075]: SIMD vector cannot be empty
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--> $DIR/simd-type.rs:5:1
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--> $DIR/simd-type.rs:7:1
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LL | struct empty;
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| ^^^^^^^^^^^^^
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error[E0076]: SIMD vector should be homogeneous
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--> $DIR/simd-type.rs:8:1
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--> $DIR/simd-type.rs:10:1
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LL | struct i64f64(i64, f64);
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| ^^^^^^^^^^^^^^^^^^^^^^^^ SIMD elements must have the same type
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error: aborting due to 2 previous errors
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error[E0077]: SIMD vector element type should be a primitive scalar (integer/float/pointer) type
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--> $DIR/simd-type.rs:15:1
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LL | struct FooV(Foo, Foo);
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| ^^^^^^^^^^^^^^^^^^^^^^
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Some errors have detailed explanations: E0075, E0076.
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error[E0077]: SIMD vector element type should be a primitive scalar (integer/float/pointer) type
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--> $DIR/simd-type.rs:18:1
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LL | struct FooV2([Foo; 2]);
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| ^^^^^^^^^^^^^^^^^^^^^^^
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error: aborting due to 4 previous errors
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Some errors have detailed explanations: E0075, E0076, E0077.
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For more information about an error, try `rustc --explain E0075`.
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44
src/test/ui/simd/simd-array-type.rs
Normal file
44
src/test/ui/simd/simd-array-type.rs
Normal file
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@ -0,0 +1,44 @@
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// run-pass
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#![allow(dead_code, incomplete_features)]
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// pretty-expanded FIXME #23616
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#![feature(repr_simd)]
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#![feature(platform_intrinsics)]
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#![feature(const_generics)]
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#[repr(simd)]
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#[derive(Copy, Clone)]
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struct S([i32; 4]);
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#[repr(simd)]
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#[derive(Copy, Clone)]
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struct T<const N: usize>([i32; N]);
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extern "platform-intrinsic" {
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fn simd_insert<T, E>(x: T, idx: u32, y: E) -> T;
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fn simd_extract<T, E>(x: T, idx: u32) -> E;
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}
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pub fn main() {
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let mut s = S([0; 4]);
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unsafe {
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for i in 0_i32..4 {
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s = simd_insert(s, i as u32, i);
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}
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for i in 0_i32..4 {
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assert_eq!(i, simd_extract(s, i as u32));
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}
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}
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let mut t = T::<4>([0; 4]);
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unsafe {
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for i in 0_i32..4 {
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t = simd_insert(t, i as u32, i);
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}
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for i in 0_i32..4 {
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assert_eq!(i, simd_extract(t, i as u32));
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}
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}
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}
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// run-pass
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#![allow(non_camel_case_types)]
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#![feature(repr_simd, platform_intrinsics)]
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#![allow(non_camel_case_types, incomplete_features)]
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#![feature(repr_simd, platform_intrinsics, const_generics)]
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use std::ops;
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@ -11,6 +8,11 @@ use std::ops;
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#[derive(Copy, Clone)]
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struct f32x4(f32, f32, f32, f32);
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#[repr(simd)]
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#[derive(Copy, Clone)]
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struct S<const N: usize>([f32; N]);
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extern "platform-intrinsic" {
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fn simd_add<T>(x: T, y: T) -> T;
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}
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@ -27,7 +29,16 @@ impl ops::Add for f32x4 {
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}
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}
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pub fn main() {
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impl ops::Add for S<4> {
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type Output = Self;
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fn add(self, rhs: Self) -> Self {
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unsafe {simd_add(self, rhs)}
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}
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}
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pub fn main() { unsafe {
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let lr = f32x4(1.0f32, 2.0f32, 3.0f32, 4.0f32);
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// lame-o
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@ -36,4 +47,11 @@ pub fn main() {
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assert_eq!(y, 4.0f32);
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assert_eq!(z, 6.0f32);
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assert_eq!(w, 8.0f32);
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}
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let lr2 = S::<4>([1.0f32, 2.0f32, 3.0f32, 4.0f32]);
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let [x, y, z, w] = add(lr2, lr2).0;
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assert_eq!(x, 2.0f32);
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assert_eq!(y, 4.0f32);
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assert_eq!(z, 6.0f32);
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assert_eq!(w, 8.0f32);
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}}
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// run-pass
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// ignore-emscripten
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#![allow(non_camel_case_types)]
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#![feature(repr_simd, platform_intrinsics)]
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#![allow(non_camel_case_types, incomplete_features)]
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#![feature(repr_simd, platform_intrinsics, const_generics)]
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#[repr(simd)]
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#[derive(Copy, Clone, PartialEq, Debug)]
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struct u32x4(pub u32, pub u32, pub u32, pub u32);
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#[repr(simd)]
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#[derive(Copy, Clone, PartialEq, Debug)]
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struct i32x4(pub i32, pub i32, pub i32, pub i32);
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#[derive(Copy, Clone)]
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struct I32<const N: usize>([i32; N]);
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extern "platform-intrinsic" {
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fn simd_saturating_add<T>(x: T, y: T) -> T;
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@ -51,41 +51,41 @@ fn main() {
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const MIN: i32 = i32::MIN;
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const MAX: i32 = i32::MAX;
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let a = i32x4(1, 2, 3, 4);
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let b = i32x4(2, 4, 6, 8);
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let c = i32x4(-1, -2, -3, -4);
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let d = i32x4(-2, -4, -6, -8);
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let a = I32::<4>([1, 2, 3, 4]);
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let b = I32::<4>([2, 4, 6, 8]);
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let c = I32::<4>([-1, -2, -3, -4]);
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let d = I32::<4>([-2, -4, -6, -8]);
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let max = i32x4(MAX, MAX, MAX, MAX);
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let max1 = i32x4(MAX - 1, MAX - 1, MAX - 1, MAX - 1);
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let min = i32x4(MIN, MIN, MIN, MIN);
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let min1 = i32x4(MIN + 1, MIN + 1, MIN + 1, MIN + 1);
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let max = I32::<4>([MAX, MAX, MAX, MAX]);
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let max1 = I32::<4>([MAX - 1, MAX - 1, MAX - 1, MAX - 1]);
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let min = I32::<4>([MIN, MIN, MIN, MIN]);
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let min1 = I32::<4>([MIN + 1, MIN + 1, MIN + 1, MIN + 1]);
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let z = i32x4(0, 0, 0, 0);
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let z = I32::<4>([0, 0, 0, 0]);
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unsafe {
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assert_eq!(simd_saturating_add(z, z), z);
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assert_eq!(simd_saturating_add(z, a), a);
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assert_eq!(simd_saturating_add(b, z), b);
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assert_eq!(simd_saturating_add(a, a), b);
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assert_eq!(simd_saturating_add(a, max), max);
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assert_eq!(simd_saturating_add(max, b), max);
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assert_eq!(simd_saturating_add(max1, a), max);
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assert_eq!(simd_saturating_add(min1, z), min1);
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assert_eq!(simd_saturating_add(min, z), min);
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assert_eq!(simd_saturating_add(min1, c), min);
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assert_eq!(simd_saturating_add(min, c), min);
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assert_eq!(simd_saturating_add(min1, d), min);
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assert_eq!(simd_saturating_add(min, d), min);
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assert_eq!(simd_saturating_add(z, z).0, z.0);
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assert_eq!(simd_saturating_add(z, a).0, a.0);
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assert_eq!(simd_saturating_add(b, z).0, b.0);
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assert_eq!(simd_saturating_add(a, a).0, b.0);
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assert_eq!(simd_saturating_add(a, max).0, max.0);
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assert_eq!(simd_saturating_add(max, b).0, max.0);
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assert_eq!(simd_saturating_add(max1, a).0, max.0);
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assert_eq!(simd_saturating_add(min1, z).0, min1.0);
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assert_eq!(simd_saturating_add(min, z).0, min.0);
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assert_eq!(simd_saturating_add(min1, c).0, min.0);
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assert_eq!(simd_saturating_add(min, c).0, min.0);
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assert_eq!(simd_saturating_add(min1, d).0, min.0);
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assert_eq!(simd_saturating_add(min, d).0, min.0);
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assert_eq!(simd_saturating_sub(b, z), b);
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assert_eq!(simd_saturating_sub(b, a), a);
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assert_eq!(simd_saturating_sub(a, a), z);
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assert_eq!(simd_saturating_sub(a, b), c);
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assert_eq!(simd_saturating_sub(z, max), min1);
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assert_eq!(simd_saturating_sub(min1, z), min1);
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assert_eq!(simd_saturating_sub(min1, a), min);
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assert_eq!(simd_saturating_sub(min1, b), min);
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assert_eq!(simd_saturating_sub(b, z).0, b.0);
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assert_eq!(simd_saturating_sub(b, a).0, a.0);
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assert_eq!(simd_saturating_sub(a, a).0, z.0);
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assert_eq!(simd_saturating_sub(a, b).0, c.0);
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assert_eq!(simd_saturating_sub(z, max).0, min1.0);
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assert_eq!(simd_saturating_sub(min1, z).0, min1.0);
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assert_eq!(simd_saturating_sub(min1, a).0, min.0);
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assert_eq!(simd_saturating_sub(min1, b).0, min.0);
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}
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}
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}
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// run-pass
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#![allow(non_camel_case_types)]
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#![allow(non_camel_case_types, incomplete_features)]
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// ignore-emscripten FIXME(#45351) hits an LLVM assert
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#![feature(repr_simd, platform_intrinsics)]
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#![feature(repr_simd, platform_intrinsics, const_generics)]
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#[repr(simd)]
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#[derive(Copy, Clone)]
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@ -11,7 +11,7 @@ struct i32x4(pub i32, pub i32, pub i32, pub i32);
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#[repr(simd)]
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#[derive(Copy, Clone)]
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struct u32x4(pub u32, pub u32, pub u32, pub u32);
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struct U32<const N: usize>([u32; N]);
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#[repr(simd)]
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#[derive(Copy, Clone)]
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@ -25,6 +25,15 @@ macro_rules! all_eq {
|
|||
}}
|
||||
}
|
||||
|
||||
macro_rules! all_eq_ {
|
||||
($a: expr, $b: expr) => {{
|
||||
let a = $a;
|
||||
let b = $b;
|
||||
assert!(a.0 == b.0);
|
||||
}}
|
||||
}
|
||||
|
||||
|
||||
extern "platform-intrinsic" {
|
||||
fn simd_add<T>(x: T, y: T) -> T;
|
||||
fn simd_sub<T>(x: T, y: T) -> T;
|
||||
|
|
@ -40,81 +49,81 @@ extern "platform-intrinsic" {
|
|||
|
||||
fn main() {
|
||||
let x1 = i32x4(1, 2, 3, 4);
|
||||
let y1 = u32x4(1, 2, 3, 4);
|
||||
let y1 = U32::<4>([1, 2, 3, 4]);
|
||||
let z1 = f32x4(1.0, 2.0, 3.0, 4.0);
|
||||
let x2 = i32x4(2, 3, 4, 5);
|
||||
let y2 = u32x4(2, 3, 4, 5);
|
||||
let y2 = U32::<4>([2, 3, 4, 5]);
|
||||
let z2 = f32x4(2.0, 3.0, 4.0, 5.0);
|
||||
|
||||
unsafe {
|
||||
all_eq!(simd_add(x1, x2), i32x4(3, 5, 7, 9));
|
||||
all_eq!(simd_add(x2, x1), i32x4(3, 5, 7, 9));
|
||||
all_eq!(simd_add(y1, y2), u32x4(3, 5, 7, 9));
|
||||
all_eq!(simd_add(y2, y1), u32x4(3, 5, 7, 9));
|
||||
all_eq_!(simd_add(y1, y2), U32::<4>([3, 5, 7, 9]));
|
||||
all_eq_!(simd_add(y2, y1), U32::<4>([3, 5, 7, 9]));
|
||||
all_eq!(simd_add(z1, z2), f32x4(3.0, 5.0, 7.0, 9.0));
|
||||
all_eq!(simd_add(z2, z1), f32x4(3.0, 5.0, 7.0, 9.0));
|
||||
|
||||
all_eq!(simd_mul(x1, x2), i32x4(2, 6, 12, 20));
|
||||
all_eq!(simd_mul(x2, x1), i32x4(2, 6, 12, 20));
|
||||
all_eq!(simd_mul(y1, y2), u32x4(2, 6, 12, 20));
|
||||
all_eq!(simd_mul(y2, y1), u32x4(2, 6, 12, 20));
|
||||
all_eq_!(simd_mul(y1, y2), U32::<4>([2, 6, 12, 20]));
|
||||
all_eq_!(simd_mul(y2, y1), U32::<4>([2, 6, 12, 20]));
|
||||
all_eq!(simd_mul(z1, z2), f32x4(2.0, 6.0, 12.0, 20.0));
|
||||
all_eq!(simd_mul(z2, z1), f32x4(2.0, 6.0, 12.0, 20.0));
|
||||
|
||||
all_eq!(simd_sub(x2, x1), i32x4(1, 1, 1, 1));
|
||||
all_eq!(simd_sub(x1, x2), i32x4(-1, -1, -1, -1));
|
||||
all_eq!(simd_sub(y2, y1), u32x4(1, 1, 1, 1));
|
||||
all_eq!(simd_sub(y1, y2), u32x4(!0, !0, !0, !0));
|
||||
all_eq_!(simd_sub(y2, y1), U32::<4>([1, 1, 1, 1]));
|
||||
all_eq_!(simd_sub(y1, y2), U32::<4>([!0, !0, !0, !0]));
|
||||
all_eq!(simd_sub(z2, z1), f32x4(1.0, 1.0, 1.0, 1.0));
|
||||
all_eq!(simd_sub(z1, z2), f32x4(-1.0, -1.0, -1.0, -1.0));
|
||||
|
||||
all_eq!(simd_div(x1, x1), i32x4(1, 1, 1, 1));
|
||||
all_eq!(simd_div(i32x4(2, 4, 6, 8), i32x4(2, 2, 2, 2)), x1);
|
||||
all_eq!(simd_div(y1, y1), u32x4(1, 1, 1, 1));
|
||||
all_eq!(simd_div(u32x4(2, 4, 6, 8), u32x4(2, 2, 2, 2)), y1);
|
||||
all_eq_!(simd_div(y1, y1), U32::<4>([1, 1, 1, 1]));
|
||||
all_eq_!(simd_div(U32::<4>([2, 4, 6, 8]), U32::<4>([2, 2, 2, 2])), y1);
|
||||
all_eq!(simd_div(z1, z1), f32x4(1.0, 1.0, 1.0, 1.0));
|
||||
all_eq!(simd_div(z1, z2), f32x4(1.0/2.0, 2.0/3.0, 3.0/4.0, 4.0/5.0));
|
||||
all_eq!(simd_div(z2, z1), f32x4(2.0/1.0, 3.0/2.0, 4.0/3.0, 5.0/4.0));
|
||||
|
||||
all_eq!(simd_rem(x1, x1), i32x4(0, 0, 0, 0));
|
||||
all_eq!(simd_rem(x2, x1), i32x4(0, 1, 1, 1));
|
||||
all_eq!(simd_rem(y1, y1), u32x4(0, 0, 0, 0));
|
||||
all_eq!(simd_rem(y2, y1), u32x4(0, 1, 1, 1));
|
||||
all_eq_!(simd_rem(y1, y1), U32::<4>([0, 0, 0, 0]));
|
||||
all_eq_!(simd_rem(y2, y1), U32::<4>([0, 1, 1, 1]));
|
||||
all_eq!(simd_rem(z1, z1), f32x4(0.0, 0.0, 0.0, 0.0));
|
||||
all_eq!(simd_rem(z1, z2), z1);
|
||||
all_eq!(simd_rem(z2, z1), f32x4(0.0, 1.0, 1.0, 1.0));
|
||||
|
||||
all_eq!(simd_shl(x1, x2), i32x4(1 << 2, 2 << 3, 3 << 4, 4 << 5));
|
||||
all_eq!(simd_shl(x2, x1), i32x4(2 << 1, 3 << 2, 4 << 3, 5 << 4));
|
||||
all_eq!(simd_shl(y1, y2), u32x4(1 << 2, 2 << 3, 3 << 4, 4 << 5));
|
||||
all_eq!(simd_shl(y2, y1), u32x4(2 << 1, 3 << 2, 4 << 3, 5 << 4));
|
||||
all_eq_!(simd_shl(y1, y2), U32::<4>([1 << 2, 2 << 3, 3 << 4, 4 << 5]));
|
||||
all_eq_!(simd_shl(y2, y1), U32::<4>([2 << 1, 3 << 2, 4 << 3, 5 << 4]));
|
||||
|
||||
// test right-shift by assuming left-shift is correct
|
||||
all_eq!(simd_shr(simd_shl(x1, x2), x2), x1);
|
||||
all_eq!(simd_shr(simd_shl(x2, x1), x1), x2);
|
||||
all_eq!(simd_shr(simd_shl(y1, y2), y2), y1);
|
||||
all_eq!(simd_shr(simd_shl(y2, y1), y1), y2);
|
||||
all_eq_!(simd_shr(simd_shl(y1, y2), y2), y1);
|
||||
all_eq_!(simd_shr(simd_shl(y2, y1), y1), y2);
|
||||
|
||||
// ensure we get logical vs. arithmetic shifts correct
|
||||
let (a, b, c, d) = (-12, -123, -1234, -12345);
|
||||
all_eq!(simd_shr(i32x4(a, b, c, d), x1), i32x4(a >> 1, b >> 2, c >> 3, d >> 4));
|
||||
all_eq!(simd_shr(u32x4(a as u32, b as u32, c as u32, d as u32), y1),
|
||||
u32x4((a as u32) >> 1, (b as u32) >> 2, (c as u32) >> 3, (d as u32) >> 4));
|
||||
all_eq_!(simd_shr(U32::<4>([a as u32, b as u32, c as u32, d as u32]), y1),
|
||||
U32::<4>([(a as u32) >> 1, (b as u32) >> 2, (c as u32) >> 3, (d as u32) >> 4]));
|
||||
|
||||
all_eq!(simd_and(x1, x2), i32x4(0, 2, 0, 4));
|
||||
all_eq!(simd_and(x2, x1), i32x4(0, 2, 0, 4));
|
||||
all_eq!(simd_and(y1, y2), u32x4(0, 2, 0, 4));
|
||||
all_eq!(simd_and(y2, y1), u32x4(0, 2, 0, 4));
|
||||
all_eq_!(simd_and(y1, y2), U32::<4>([0, 2, 0, 4]));
|
||||
all_eq_!(simd_and(y2, y1), U32::<4>([0, 2, 0, 4]));
|
||||
|
||||
all_eq!(simd_or(x1, x2), i32x4(3, 3, 7, 5));
|
||||
all_eq!(simd_or(x2, x1), i32x4(3, 3, 7, 5));
|
||||
all_eq!(simd_or(y1, y2), u32x4(3, 3, 7, 5));
|
||||
all_eq!(simd_or(y2, y1), u32x4(3, 3, 7, 5));
|
||||
all_eq_!(simd_or(y1, y2), U32::<4>([3, 3, 7, 5]));
|
||||
all_eq_!(simd_or(y2, y1), U32::<4>([3, 3, 7, 5]));
|
||||
|
||||
all_eq!(simd_xor(x1, x2), i32x4(3, 1, 7, 1));
|
||||
all_eq!(simd_xor(x2, x1), i32x4(3, 1, 7, 1));
|
||||
all_eq!(simd_xor(y1, y2), u32x4(3, 1, 7, 1));
|
||||
all_eq!(simd_xor(y2, y1), u32x4(3, 1, 7, 1));
|
||||
all_eq_!(simd_xor(y1, y2), U32::<4>([3, 1, 7, 1]));
|
||||
all_eq_!(simd_xor(y2, y1), U32::<4>([3, 1, 7, 1]));
|
||||
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue