Rollup merge of #144559 - CaiWeiran:extract-insert-dyn_test, r=Mark-Simulacrum
Enable extract-insert-dyn.rs test on RISC-V (riscv64) This PR adds support for running the `tests/codegen-llvm/simd/extract-insert-dyn.rs` test on the RISC-V (riscv64) architecture. Previously, this test would fail on RISC-V targets due to architecture-specific code generation issues. This patch modifies the test to ensure compatibility while preserving its intent. The change has been tested locally using `./x test` on a riscv64 target, and the test now passes as expected. ### Notes: - This change is scoped specifically to improve RISC-V compatibility. - It does not affect behavior or test results on other architectures.
This commit is contained in:
Stuart Cook
GitHub
commit
70587ebf0d
1 changed files with 18 additions and 9 deletions
|
|
@ -5,7 +5,8 @@
|
|||
repr_simd,
|
||||
arm_target_feature,
|
||||
mips_target_feature,
|
||||
s390x_target_feature
|
||||
s390x_target_feature,
|
||||
riscv_target_feature
|
||||
)]
|
||||
#![no_std]
|
||||
#![crate_type = "lib"]
|
||||
|
|
@ -25,97 +26,105 @@ pub struct u32x16([u32; 16]);
|
|||
pub struct i8x16([i8; 16]);
|
||||
|
||||
// CHECK-LABEL: dyn_simd_extract
|
||||
// CHECK: extractelement <16 x i8> %x, i32 %idx
|
||||
// CHECK: extractelement <16 x i8> %[[TEMP:.+]], i32 %idx
|
||||
#[no_mangle]
|
||||
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
|
||||
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
|
||||
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
|
||||
#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
|
||||
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
|
||||
unsafe extern "C" fn dyn_simd_extract(x: i8x16, idx: u32) -> i8 {
|
||||
simd_extract_dyn(x, idx)
|
||||
}
|
||||
|
||||
// CHECK-LABEL: literal_dyn_simd_extract
|
||||
// CHECK: extractelement <16 x i8> %x, i32 7
|
||||
// CHECK: extractelement <16 x i8> %[[TEMP:.+]], i32 7
|
||||
#[no_mangle]
|
||||
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
|
||||
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
|
||||
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
|
||||
#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
|
||||
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
|
||||
unsafe extern "C" fn literal_dyn_simd_extract(x: i8x16) -> i8 {
|
||||
simd_extract_dyn(x, 7)
|
||||
}
|
||||
|
||||
// CHECK-LABEL: const_dyn_simd_extract
|
||||
// CHECK: extractelement <16 x i8> %x, i32 7
|
||||
// CHECK: extractelement <16 x i8> %[[TEMP:.+]], i32 7
|
||||
#[no_mangle]
|
||||
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
|
||||
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
|
||||
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
|
||||
#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
|
||||
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
|
||||
unsafe extern "C" fn const_dyn_simd_extract(x: i8x16) -> i8 {
|
||||
simd_extract_dyn(x, const { 3 + 4 })
|
||||
}
|
||||
|
||||
// CHECK-LABEL: const_simd_extract
|
||||
// CHECK: extractelement <16 x i8> %x, i32 7
|
||||
// CHECK: extractelement <16 x i8> %[[TEMP:.+]], i32 7
|
||||
#[no_mangle]
|
||||
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
|
||||
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
|
||||
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
|
||||
#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
|
||||
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
|
||||
unsafe extern "C" fn const_simd_extract(x: i8x16) -> i8 {
|
||||
simd_extract(x, const { 3 + 4 })
|
||||
}
|
||||
|
||||
// CHECK-LABEL: dyn_simd_insert
|
||||
// CHECK: insertelement <16 x i8> %x, i8 %e, i32 %idx
|
||||
// CHECK: insertelement <16 x i8> %[[TEMP:.+]], i8 %e, i32 %idx
|
||||
#[no_mangle]
|
||||
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
|
||||
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
|
||||
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
|
||||
#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
|
||||
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
|
||||
unsafe extern "C" fn dyn_simd_insert(x: i8x16, e: i8, idx: u32) -> i8x16 {
|
||||
simd_insert_dyn(x, idx, e)
|
||||
}
|
||||
|
||||
// CHECK-LABEL: literal_dyn_simd_insert
|
||||
// CHECK: insertelement <16 x i8> %x, i8 %e, i32 7
|
||||
// CHECK: insertelement <16 x i8> %[[TEMP:.+]], i8 %e, i32 7
|
||||
#[no_mangle]
|
||||
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
|
||||
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
|
||||
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
|
||||
#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
|
||||
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
|
||||
unsafe extern "C" fn literal_dyn_simd_insert(x: i8x16, e: i8) -> i8x16 {
|
||||
simd_insert_dyn(x, 7, e)
|
||||
}
|
||||
|
||||
// CHECK-LABEL: const_dyn_simd_insert
|
||||
// CHECK: insertelement <16 x i8> %x, i8 %e, i32 7
|
||||
// CHECK: insertelement <16 x i8> %[[TEMP:.+]], i8 %e, i32 7
|
||||
#[no_mangle]
|
||||
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
|
||||
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
|
||||
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
|
||||
#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
|
||||
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
|
||||
unsafe extern "C" fn const_dyn_simd_insert(x: i8x16, e: i8) -> i8x16 {
|
||||
simd_insert_dyn(x, const { 3 + 4 }, e)
|
||||
}
|
||||
|
||||
// CHECK-LABEL: const_simd_insert
|
||||
// CHECK: insertelement <16 x i8> %x, i8 %e, i32 7
|
||||
// CHECK: insertelement <16 x i8> %[[TEMP:.+]], i8 %e, i32 7
|
||||
#[no_mangle]
|
||||
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
|
||||
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
|
||||
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
|
||||
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
|
||||
#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
|
||||
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
|
||||
unsafe extern "C" fn const_simd_insert(x: i8x16, e: i8) -> i8x16 {
|
||||
simd_insert(x, const { 3 + 4 }, e)
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue