Add spin_loop hint for RISC-V architecture

This commit also updates `stdarch` git submodule.

library/core/src/hint.rs

@@ -137,6 +137,11 @@ pub fn spin_loop() {
             unsafe { crate::arch::arm::__yield() };
         }
     }
+
+    #[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))]
+    {
+        crate::arch::riscv::pause();
+    }
 }
 
 /// An identity function that *__hints__* to the compiler to be maximally pessimistic about what

library/stdarch

@@ -1 +1 @@
-Subproject commit cfba59fccd90b3b52a614120834320f764ab08d1
+Subproject commit 43b4556c44197af4ef82e42a12dfc513a1397f87