From 78eead63fa91dbe156236b547bb4290f02784712 Mon Sep 17 00:00:00 2001
From: Huon Wilson <dbau.pp+github@gmail.com>
Date: Mon, 20 Jul 2015 11:55:47 -0700
Subject: [PATCH] Implement the simd_insert/simd_extract intrinsics.

---
 src/librustc_trans/trans/intrinsic.rs | 21 ++++++++++++++++++++-
 src/librustc_typeck/check/mod.rs      |  2 ++
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/src/librustc_trans/trans/intrinsic.rs b/src/librustc_trans/trans/intrinsic.rs
index f79b62878c1e..7c8deb9a791e 100644
--- a/src/librustc_trans/trans/intrinsic.rs
+++ b/src/librustc_trans/trans/intrinsic.rs
@@ -1426,5 +1426,24 @@ fn generic_simd_intrinsic<'blk, 'tcx>(bcx: Block<'blk, 'tcx>,
 
         return ShuffleVector(bcx, llargs[0], llargs[1], C_vector(&indices))
     }
-    C_null(llret_ty)
+
+    if name == "simd_insert" {
+        require!(arg_tys[0].is_simd(tcx),
+                 "SIMD insert intrinsic monomorphised for non-SIMD input type");
+
+        let elem_ty = arg_tys[0].simd_type(tcx);
+        require!(arg_tys[2] == elem_ty,
+                 "SIMD insert intrinsic monomorphised with inserted type not SIMD element type");
+        return InsertElement(bcx, llargs[0], llargs[2], llargs[1])
+    }
+    if name == "simd_extract" {
+        require!(arg_tys[0].is_simd(tcx),
+                 "SIMD insert intrinsic monomorphised for non-SIMD input type");
+
+        let elem_ty = arg_tys[0].simd_type(tcx);
+        require!(ret_ty == elem_ty,
+                 "SIMD insert intrinsic monomorphised with returned type not SIMD element type");
+        return ExtractElement(bcx, llargs[0], llargs[1])
+    }
+    bcx.sess().span_bug(call_info.span, "unknown SIMD intrinsic");
 }
diff --git a/src/librustc_typeck/check/mod.rs b/src/librustc_typeck/check/mod.rs
index 56230ae06f9e..2821538a2953 100644
--- a/src/librustc_typeck/check/mod.rs
+++ b/src/librustc_typeck/check/mod.rs
@@ -5344,6 +5344,8 @@ pub fn check_intrinsic_type(ccx: &CrateCtxt, it: &ast::ForeignItem) {
             "simd_eq" | "simd_ne" | "simd_lt" | "simd_le" | "simd_gt" | "simd_ge" => {
                 (2, vec![param(ccx, 0), param(ccx, 0)], param(ccx, 1))
             }
+            "simd_insert" => (2, vec![param(ccx, 0), tcx.types.u32, param(ccx, 1)], param(ccx, 0)),
+            "simd_extract" => (2, vec![param(ccx, 0), tcx.types.u32], param(ccx, 1)),
             name if name.starts_with("simd_shuffle") => {
                 match name["simd_shuffle".len()..].parse() {
                     Ok(n) => {