From 7ab646ef42f561bfb54f3e335f502f8fc249eeae Mon Sep 17 00:00:00 2001 From: Daniel Smith Date: Wed, 27 May 2020 22:36:42 +0000 Subject: [PATCH] Move 64 bit function based on stdarch-verify --- .../crates/core_arch/src/x86/avx512f.rs | 19 ------- .../crates/core_arch/src/x86_64/avx512f.rs | 50 +++++++++++++++++++ 2 files changed, 50 insertions(+), 19 deletions(-) create mode 100644 library/stdarch/crates/core_arch/src/x86_64/avx512f.rs diff --git a/library/stdarch/crates/core_arch/src/x86/avx512f.rs b/library/stdarch/crates/core_arch/src/x86/avx512f.rs index 64f13f9bfae2..5b64367d1f29 100644 --- a/library/stdarch/crates/core_arch/src/x86/avx512f.rs +++ b/library/stdarch/crates/core_arch/src/x86/avx512f.rs @@ -94,25 +94,6 @@ pub unsafe fn _mm512_set1_epi64(a: i64) -> __m512i { transmute(i64x8::splat(a)) } -/// Sets packed 64-bit integers in `dst` with the supplied values. -/// -/// [Intel's documentation]( https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,4909&text=_mm512_set_epi64) -#[inline] -#[target_feature(enable = "avx512f")] -pub unsafe fn _mm512_set_epi64( - e7: i64, - e6: i64, - e5: i64, - e4: i64, - e3: i64, - e2: i64, - e1: i64, - e0: i64, -) -> __m512i { - let r = i64x8(e0, e1, e2, e3, e4, e5, e6, e7); - transmute(r) -} - /// Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector. /// /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmplt_epu64) diff --git a/library/stdarch/crates/core_arch/src/x86_64/avx512f.rs b/library/stdarch/crates/core_arch/src/x86_64/avx512f.rs new file mode 100644 index 000000000000..8c40235958e5 --- /dev/null +++ b/library/stdarch/crates/core_arch/src/x86_64/avx512f.rs @@ -0,0 +1,50 @@ +use crate::{ + core_arch::{simd::*, simd_llvm::*, x86_64::*}, + mem::{self, transmute}, +}; + +/// Sets packed 64-bit integers in `dst` with the supplied values. +/// +/// [Intel's documentation]( https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,4909&text=_mm512_set_epi64) +#[inline] +#[target_feature(enable = "avx512f")] +pub unsafe fn _mm512_set_epi64( + e7: i64, + e6: i64, + e5: i64, + e4: i64, + e3: i64, + e2: i64, + e1: i64, + e0: i64, +) -> __m512i { + let r = i64x8(e0, e1, e2, e3, e4, e5, e6, e7); + transmute(r) +} + +/// Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector. +/// +/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmplt_epu64) +#[inline] +#[target_feature(enable = "avx512f")] +#[cfg_attr(test, assert_instr(vpcmpuq))] +pub unsafe fn _mm512_cmplt_epu64_mask(a: __m512i, b: __m512i) -> __mmask8 { + simd_bitmask::<__m512i, _>(simd_lt(a.as_u64x8(), b.as_u64x8())) +} + +#[cfg(test)] +mod tests { + use std; + use stdarch_test::simd_test; + + use crate::core_arch::x86::*; + use crate::core_arch::x86_64::*; + + #[simd_test(enable = "avx512f")] + unsafe fn test_mm512_cmplt_epu64_mask() { + let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100); + let b = _mm512_set1_epi64(-1); + let m = _mm512_cmplt_epu64_mask(a, b); + assert_eq!(m, 0b11001111); + } +}