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Auto merge of #150639 - usamoi:stdarch, r=sayantn

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stdarch subtree update

Subtree update of `stdarch` to 67cdf8433d.

Created using https://github.com/rust-lang/josh-sync.

r? `@ghost`
This commit is contained in:
bors 2026-01-03 19:31:11 +00:00
commit 7ecabfaaf1
57 changed files with 8776 additions and 7223 deletions
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266
library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs
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1826
library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs
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57
library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs
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@ -104,7 +104,8 @@ types! {
}
types! {
#![unstable(feature = "stdarch_neon_f16", issue = "136306")]
#![cfg_attr(not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION"))]
#![cfg_attr(target_arch = "arm", unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800"))]
/// Arm-specific 64-bit wide vector of four packed `f16`.
pub struct float16x4_t(4 x pub(crate) f16);
@ -747,19 +748,40 @@ pub struct uint32x4x4_t(
/// Arm-specific type containing two `float16x4_t` vectors.
#[repr(C)]
#[derive(Copy, Clone, Debug)]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg_attr(
not(target_arch = "arm"),
stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION")
)]
#[cfg_attr(
target_arch = "arm",
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
)]
pub struct float16x4x2_t(pub float16x4_t, pub float16x4_t);
/// Arm-specific type containing three `float16x4_t` vectors.
#[repr(C)]
#[derive(Copy, Clone, Debug)]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg_attr(
not(target_arch = "arm"),
stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION")
)]
#[cfg_attr(
target_arch = "arm",
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
)]
pub struct float16x4x3_t(pub float16x4_t, pub float16x4_t, pub float16x4_t);
/// Arm-specific type containing four `float16x4_t` vectors.
#[repr(C)]
#[derive(Copy, Clone, Debug)]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg_attr(
not(target_arch = "arm"),
stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION")
)]
#[cfg_attr(
target_arch = "arm",
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
)]
pub struct float16x4x4_t(
pub float16x4_t,
pub float16x4_t,
@ -770,19 +792,40 @@ pub struct float16x4x4_t(
/// Arm-specific type containing two `float16x8_t` vectors.
#[repr(C)]
#[derive(Copy, Clone, Debug)]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg_attr(
not(target_arch = "arm"),
stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION")
)]
#[cfg_attr(
target_arch = "arm",
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
)]
pub struct float16x8x2_t(pub float16x8_t, pub float16x8_t);
/// Arm-specific type containing three `float16x8_t` vectors.
#[repr(C)]
#[derive(Copy, Clone, Debug)]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg_attr(
not(target_arch = "arm"),
stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION")
)]
#[cfg_attr(
target_arch = "arm",
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
)]
pub struct float16x8x3_t(pub float16x8_t, pub float16x8_t, pub float16x8_t);
/// Arm-specific type containing four `float16x8_t` vectors.
#[repr(C)]
#[derive(Copy, Clone, Debug)]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg_attr(
not(target_arch = "arm"),
stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION")
)]
#[cfg_attr(
target_arch = "arm",
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
)]
pub struct float16x8x4_t(
pub float16x8_t,
pub float16x8_t,

4
library/stdarch/crates/core_arch/src/x86/abm.rs
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@ -54,12 +54,12 @@ mod tests {
use crate::core_arch::x86::*;
#[simd_test(enable = "lzcnt")]
const unsafe fn test_lzcnt_u32() {
const fn test_lzcnt_u32() {
assert_eq!(_lzcnt_u32(0b0101_1010), 25);
}
#[simd_test(enable = "popcnt")]
const unsafe fn test_popcnt32() {
const fn test_popcnt32() {
assert_eq!(_popcnt32(0b0101_1010), 4);
}
}

12
library/stdarch/crates/core_arch/src/x86/aes.rs
View file

@ -112,7 +112,7 @@ mod tests {
use crate::core_arch::x86::*;
#[simd_test(enable = "aes")]
unsafe fn test_mm_aesdec_si128() {
fn test_mm_aesdec_si128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664949.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);
let k = _mm_set_epi64x(0x1133557799bbddff, 0x0022446688aaccee);
@ -122,7 +122,7 @@ mod tests {
}
#[simd_test(enable = "aes")]
unsafe fn test_mm_aesdeclast_si128() {
fn test_mm_aesdeclast_si128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714178.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);
let k = _mm_set_epi64x(0x1133557799bbddff, 0x0022446688aaccee);
@ -132,7 +132,7 @@ mod tests {
}
#[simd_test(enable = "aes")]
unsafe fn test_mm_aesenc_si128() {
fn test_mm_aesenc_si128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664810.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);
let k = _mm_set_epi64x(0x1133557799bbddff, 0x0022446688aaccee);
@ -142,7 +142,7 @@ mod tests {
}
#[simd_test(enable = "aes")]
unsafe fn test_mm_aesenclast_si128() {
fn test_mm_aesenclast_si128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714136.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);
let k = _mm_set_epi64x(0x1133557799bbddff, 0x0022446688aaccee);
@ -152,7 +152,7 @@ mod tests {
}
#[simd_test(enable = "aes")]
unsafe fn test_mm_aesimc_si128() {
fn test_mm_aesimc_si128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714195.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);
let e = _mm_set_epi64x(0xc66c82284ee40aa0, 0x6633441122770055);
@ -161,7 +161,7 @@ mod tests {
}
#[simd_test(enable = "aes")]
unsafe fn test_mm_aeskeygenassist_si128() {
fn test_mm_aeskeygenassist_si128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714138.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);
let e = _mm_set_epi64x(0x857c266b7c266e85, 0xeac4eea9c4eeacea);

322
library/stdarch/crates/core_arch/src/x86/avx.rs
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318
library/stdarch/crates/core_arch/src/x86/avx2.rs
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File diff suppressed because it is too large Load diff

22
library/stdarch/crates/core_arch/src/x86/avx512bf16.rs
View file

@ -1833,7 +1833,7 @@ mod tests {
const BF16_EIGHT: u16 = 0b0_10000010_0000000;
#[simd_test(enable = "avx512bf16")]
unsafe fn test_mm512_cvtpbh_ps() {
fn test_mm512_cvtpbh_ps() {
let a = __m256bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
@ -1846,7 +1846,7 @@ mod tests {
}
#[simd_test(enable = "avx512bf16")]
unsafe fn test_mm512_mask_cvtpbh_ps() {
fn test_mm512_mask_cvtpbh_ps() {
let a = __m256bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
@ -1863,7 +1863,7 @@ mod tests {
}
#[simd_test(enable = "avx512bf16")]
unsafe fn test_mm512_maskz_cvtpbh_ps() {
fn test_mm512_maskz_cvtpbh_ps() {
let a = __m256bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
@ -1877,7 +1877,7 @@ mod tests {
}
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm256_cvtpbh_ps() {
fn test_mm256_cvtpbh_ps() {
let a = __m128bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
]);
@ -1887,7 +1887,7 @@ mod tests {
}
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm256_mask_cvtpbh_ps() {
fn test_mm256_mask_cvtpbh_ps() {
let a = __m128bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
]);
@ -1899,7 +1899,7 @@ mod tests {
}
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm256_maskz_cvtpbh_ps() {
fn test_mm256_maskz_cvtpbh_ps() {
let a = __m128bh([
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
]);
@ -1910,7 +1910,7 @@ mod tests {
}
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm_cvtpbh_ps() {
fn test_mm_cvtpbh_ps() {
let a = __m128bh([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
let r = _mm_cvtpbh_ps(a);
let e = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
@ -1918,7 +1918,7 @@ mod tests {
}
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm_mask_cvtpbh_ps() {
fn test_mm_mask_cvtpbh_ps() {
let a = __m128bh([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
let src = _mm_setr_ps(9., 10., 11., 12.);
let k = 0b1010;
@ -1928,7 +1928,7 @@ mod tests {
}
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm_maskz_cvtpbh_ps() {
fn test_mm_maskz_cvtpbh_ps() {
let a = __m128bh([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
let k = 0b1010;
let r = _mm_maskz_cvtpbh_ps(k, a);
@ -1937,7 +1937,7 @@ mod tests {
}
#[simd_test(enable = "avx512bf16")]
unsafe fn test_mm_cvtsbh_ss() {
fn test_mm_cvtsbh_ss() {
let r = _mm_cvtsbh_ss(bf16::from_bits(BF16_ONE));
assert_eq!(r, 1.);
}
@ -1970,7 +1970,7 @@ mod tests {
}
#[simd_test(enable = "avx512bf16,avx512vl")]
unsafe fn test_mm_cvtness_sbh() {
fn test_mm_cvtness_sbh() {
let r = _mm_cvtness_sbh(1.);
assert_eq!(r.to_bits(), BF16_ONE);
}

48
library/stdarch/crates/core_arch/src/x86/avx512bitalg.rs
View file

@ -460,7 +460,7 @@ mod tests {
use crate::core_arch::x86::*;
#[simd_test(enable = "avx512bitalg,avx512f")]
const unsafe fn test_mm512_popcnt_epi16() {
const fn test_mm512_popcnt_epi16() {
let test_data = _mm512_set_epi16(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, 0x1_FF, 0x3_FF, 0x7_FF, 0xF_FF, 0x1F_FF,
0x3F_FF, 0x7F_FF, 0xFF_FF, -1, -100, 255, 256, 2, 4, 8, 16, 32, 64, 128, 256, 512,
@ -475,7 +475,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f")]
const unsafe fn test_mm512_maskz_popcnt_epi16() {
const fn test_mm512_maskz_popcnt_epi16() {
let test_data = _mm512_set_epi16(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, 0x1_FF, 0x3_FF, 0x7_FF, 0xF_FF, 0x1F_FF,
0x3F_FF, 0x7F_FF, 0xFF_FF, -1, -100, 255, 256, 2, 4, 8, 16, 32, 64, 128, 256, 512,
@ -491,7 +491,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f")]
const unsafe fn test_mm512_mask_popcnt_epi16() {
const fn test_mm512_mask_popcnt_epi16() {
let test_data = _mm512_set_epi16(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, 0x1_FF, 0x3_FF, 0x7_FF, 0xF_FF, 0x1F_FF,
0x3F_FF, 0x7F_FF, 0xFF_FF, -1, -100, 255, 256, 2, 4, 8, 16, 32, 64, 128, 256, 512,
@ -507,7 +507,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
const unsafe fn test_mm256_popcnt_epi16() {
const fn test_mm256_popcnt_epi16() {
let test_data = _mm256_set_epi16(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, 0x1_FF, 0x3_FF, 0x7_FF, 0xF_FF, 0x1F_FF,
0x3F_FF, 0x7F_FF,
@ -519,7 +519,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
const unsafe fn test_mm256_maskz_popcnt_epi16() {
const fn test_mm256_maskz_popcnt_epi16() {
let test_data = _mm256_set_epi16(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, 0x1_FF, 0x3_FF, 0x7_FF, 0xF_FF, 0x1F_FF,
0x3F_FF, 0x7F_FF,
@ -531,7 +531,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
const unsafe fn test_mm256_mask_popcnt_epi16() {
const fn test_mm256_mask_popcnt_epi16() {
let test_data = _mm256_set_epi16(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, 0x1_FF, 0x3_FF, 0x7_FF, 0xF_FF, 0x1F_FF,
0x3F_FF, 0x7F_FF,
@ -545,7 +545,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
const unsafe fn test_mm_popcnt_epi16() {
const fn test_mm_popcnt_epi16() {
let test_data = _mm_set_epi16(0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F);
let actual_result = _mm_popcnt_epi16(test_data);
let reference_result = _mm_set_epi16(0, 1, 2, 3, 4, 5, 6, 7);
@ -553,7 +553,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
const unsafe fn test_mm_maskz_popcnt_epi16() {
const fn test_mm_maskz_popcnt_epi16() {
let test_data = _mm_set_epi16(0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F);
let mask = 0xF0;
let actual_result = _mm_maskz_popcnt_epi16(mask, test_data);
@ -562,7 +562,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
const unsafe fn test_mm_mask_popcnt_epi16() {
const fn test_mm_mask_popcnt_epi16() {
let test_data = _mm_set_epi16(0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F);
let mask = 0xF0;
let actual_result = _mm_mask_popcnt_epi16(test_data, mask, test_data);
@ -571,7 +571,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f")]
const unsafe fn test_mm512_popcnt_epi8() {
const fn test_mm512_popcnt_epi8() {
let test_data = _mm512_set_epi8(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, -1, 2, 4, 8, 16, 32, 64, 128, 171, 206, 100,
217, 109, 253, 190, 177, 254, 179, 215, 230, 68, 201, 172, 183, 154, 84, 56, 227, 189,
@ -588,7 +588,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f")]
const unsafe fn test_mm512_maskz_popcnt_epi8() {
const fn test_mm512_maskz_popcnt_epi8() {
let test_data = _mm512_set_epi8(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, -1, 2, 4, 8, 16, 32, 64, 128, 171, 206, 100,
217, 109, 253, 190, 177, 254, 179, 215, 230, 68, 201, 172, 183, 154, 84, 56, 227, 189,
@ -606,7 +606,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f")]
const unsafe fn test_mm512_mask_popcnt_epi8() {
const fn test_mm512_mask_popcnt_epi8() {
let test_data = _mm512_set_epi8(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, -1, 2, 4, 8, 16, 32, 64, 128, 171, 206, 100,
217, 109, 253, 190, 177, 254, 179, 215, 230, 68, 201, 172, 183, 154, 84, 56, 227, 189,
@ -624,7 +624,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
const unsafe fn test_mm256_popcnt_epi8() {
const fn test_mm256_popcnt_epi8() {
let test_data = _mm256_set_epi8(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, -1, 2, 4, 8, 16, 32, 64, 128, 171, 206, 100,
217, 109, 253, 190, 177, 254, 179, 215, 230, 68, 201, 172,
@ -638,7 +638,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
const unsafe fn test_mm256_maskz_popcnt_epi8() {
const fn test_mm256_maskz_popcnt_epi8() {
let test_data = _mm256_set_epi8(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, -1, 2, 4, 8, 16, 32, 64, 251, 73, 121, 143,
145, 85, 91, 137, 90, 225, 21, 249, 211, 155, 228, 70,
@ -653,7 +653,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
const unsafe fn test_mm256_mask_popcnt_epi8() {
const fn test_mm256_mask_popcnt_epi8() {
let test_data = _mm256_set_epi8(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, -1, 2, 4, 8, 16, 32, 64, 251, 73, 121, 143,
145, 85, 91, 137, 90, 225, 21, 249, 211, 155, 228, 70,
@ -668,7 +668,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
const unsafe fn test_mm_popcnt_epi8() {
const fn test_mm_popcnt_epi8() {
let test_data = _mm_set_epi8(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF, -1, 2, 4, 8, 16, 32, 64,
);
@ -678,7 +678,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
const unsafe fn test_mm_maskz_popcnt_epi8() {
const fn test_mm_maskz_popcnt_epi8() {
let test_data = _mm_set_epi8(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 90, 225, 21, 249, 211, 155, 228, 70,
);
@ -689,7 +689,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
const unsafe fn test_mm_mask_popcnt_epi8() {
const fn test_mm_mask_popcnt_epi8() {
let test_data = _mm_set_epi8(
0, 1, 3, 7, 0xF, 0x1F, 0x3F, 0x7F, 90, 225, 21, 249, 211, 155, 228, 70,
);
@ -701,7 +701,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f")]
unsafe fn test_mm512_bitshuffle_epi64_mask() {
fn test_mm512_bitshuffle_epi64_mask() {
let test_indices = _mm512_set_epi8(
63, 62, 61, 60, 59, 58, 57, 56, 63, 62, 61, 60, 59, 58, 57, 56, 32, 32, 16, 16, 0, 0,
8, 8, 56, 48, 40, 32, 24, 16, 8, 0, 63, 62, 61, 60, 59, 58, 57, 56, 63, 62, 61, 60, 59,
@ -731,7 +731,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f")]
unsafe fn test_mm512_mask_bitshuffle_epi64_mask() {
fn test_mm512_mask_bitshuffle_epi64_mask() {
let test_indices = _mm512_set_epi8(
63, 62, 61, 60, 59, 58, 57, 56, 63, 62, 61, 60, 59, 58, 57, 56, 32, 32, 16, 16, 0, 0,
8, 8, 56, 48, 40, 32, 24, 16, 8, 0, 63, 62, 61, 60, 59, 58, 57, 56, 63, 62, 61, 60, 59,
@ -762,7 +762,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
unsafe fn test_mm256_bitshuffle_epi64_mask() {
fn test_mm256_bitshuffle_epi64_mask() {
let test_indices = _mm256_set_epi8(
63, 62, 61, 60, 59, 58, 57, 56, 63, 62, 61, 60, 59, 58, 57, 56, 32, 32, 16, 16, 0, 0,
8, 8, 56, 48, 40, 32, 24, 16, 8, 0,
@ -780,7 +780,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
unsafe fn test_mm256_mask_bitshuffle_epi64_mask() {
fn test_mm256_mask_bitshuffle_epi64_mask() {
let test_indices = _mm256_set_epi8(
63, 62, 61, 60, 59, 58, 57, 56, 63, 62, 61, 60, 59, 58, 57, 56, 32, 32, 16, 16, 0, 0,
8, 8, 56, 48, 40, 32, 24, 16, 8, 0,
@ -799,7 +799,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
unsafe fn test_mm_bitshuffle_epi64_mask() {
fn test_mm_bitshuffle_epi64_mask() {
let test_indices = _mm_set_epi8(
63, 62, 61, 60, 59, 58, 57, 56, 63, 62, 61, 60, 59, 58, 57, 56,
);
@ -811,7 +811,7 @@ mod tests {
}
#[simd_test(enable = "avx512bitalg,avx512f,avx512vl")]
unsafe fn test_mm_mask_bitshuffle_epi64_mask() {
fn test_mm_mask_bitshuffle_epi64_mask() {
let test_indices = _mm_set_epi8(
63, 62, 61, 60, 59, 58, 57, 56, 63, 62, 61, 60, 59, 58, 57, 56,
);

1608
library/stdarch/crates/core_arch/src/x86/avx512bw.rs
View file

File diff suppressed because it is too large Load diff

84
library/stdarch/crates/core_arch/src/x86/avx512cd.rs
View file

@ -587,7 +587,7 @@ mod tests {
use stdarch_test::simd_test;
#[simd_test(enable = "avx512cd")]
const unsafe fn test_mm512_broadcastmw_epi32() {
const fn test_mm512_broadcastmw_epi32() {
let a: __mmask16 = 2;
let r = _mm512_broadcastmw_epi32(a);
let e = _mm512_set1_epi32(2);
@ -595,7 +595,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm256_broadcastmw_epi32() {
const fn test_mm256_broadcastmw_epi32() {
let a: __mmask16 = 2;
let r = _mm256_broadcastmw_epi32(a);
let e = _mm256_set1_epi32(2);
@ -603,7 +603,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm_broadcastmw_epi32() {
const fn test_mm_broadcastmw_epi32() {
let a: __mmask16 = 2;
let r = _mm_broadcastmw_epi32(a);
let e = _mm_set1_epi32(2);
@ -611,7 +611,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
const unsafe fn test_mm512_broadcastmb_epi64() {
const fn test_mm512_broadcastmb_epi64() {
let a: __mmask8 = 2;
let r = _mm512_broadcastmb_epi64(a);
let e = _mm512_set1_epi64(2);
@ -619,7 +619,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm256_broadcastmb_epi64() {
const fn test_mm256_broadcastmb_epi64() {
let a: __mmask8 = 2;
let r = _mm256_broadcastmb_epi64(a);
let e = _mm256_set1_epi64x(2);
@ -627,7 +627,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm_broadcastmb_epi64() {
const fn test_mm_broadcastmb_epi64() {
let a: __mmask8 = 2;
let r = _mm_broadcastmb_epi64(a);
let e = _mm_set1_epi64x(2);
@ -635,7 +635,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
unsafe fn test_mm512_conflict_epi32() {
fn test_mm512_conflict_epi32() {
let a = _mm512_set1_epi32(1);
let r = _mm512_conflict_epi32(a);
let e = _mm512_set_epi32(
@ -720,7 +720,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
unsafe fn test_mm512_mask_conflict_epi32() {
fn test_mm512_mask_conflict_epi32() {
let a = _mm512_set1_epi32(1);
let r = _mm512_mask_conflict_epi32(a, 0, a);
assert_eq_m512i(r, a);
@ -807,7 +807,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
unsafe fn test_mm512_maskz_conflict_epi32() {
fn test_mm512_maskz_conflict_epi32() {
let a = _mm512_set1_epi32(1);
let r = _mm512_maskz_conflict_epi32(0, a);
assert_eq_m512i(r, _mm512_setzero_si512());
@ -894,7 +894,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
unsafe fn test_mm256_conflict_epi32() {
fn test_mm256_conflict_epi32() {
let a = _mm256_set1_epi32(1);
let r = _mm256_conflict_epi32(a);
let e = _mm256_set_epi32(
@ -911,7 +911,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
unsafe fn test_mm256_mask_conflict_epi32() {
fn test_mm256_mask_conflict_epi32() {
let a = _mm256_set1_epi32(1);
let r = _mm256_mask_conflict_epi32(a, 0, a);
assert_eq_m256i(r, a);
@ -930,7 +930,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
unsafe fn test_mm256_maskz_conflict_epi32() {
fn test_mm256_maskz_conflict_epi32() {
let a = _mm256_set1_epi32(1);
let r = _mm256_maskz_conflict_epi32(0, a);
assert_eq_m256i(r, _mm256_setzero_si256());
@ -949,7 +949,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
unsafe fn test_mm_conflict_epi32() {
fn test_mm_conflict_epi32() {
let a = _mm_set1_epi32(1);
let r = _mm_conflict_epi32(a);
let e = _mm_set_epi32(1 << 2 | 1 << 1 | 1 << 0, 1 << 1 | 1 << 0, 1 << 0, 0);
@ -957,7 +957,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
unsafe fn test_mm_mask_conflict_epi32() {
fn test_mm_mask_conflict_epi32() {
let a = _mm_set1_epi32(1);
let r = _mm_mask_conflict_epi32(a, 0, a);
assert_eq_m128i(r, a);
@ -967,7 +967,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
unsafe fn test_mm_maskz_conflict_epi32() {
fn test_mm_maskz_conflict_epi32() {
let a = _mm_set1_epi32(1);
let r = _mm_maskz_conflict_epi32(0, a);
assert_eq_m128i(r, _mm_setzero_si128());
@ -977,7 +977,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
unsafe fn test_mm512_conflict_epi64() {
fn test_mm512_conflict_epi64() {
let a = _mm512_set1_epi64(1);
let r = _mm512_conflict_epi64(a);
let e = _mm512_set_epi64(
@ -994,7 +994,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
unsafe fn test_mm512_mask_conflict_epi64() {
fn test_mm512_mask_conflict_epi64() {
let a = _mm512_set1_epi64(1);
let r = _mm512_mask_conflict_epi64(a, 0, a);
assert_eq_m512i(r, a);
@ -1013,7 +1013,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
unsafe fn test_mm512_maskz_conflict_epi64() {
fn test_mm512_maskz_conflict_epi64() {
let a = _mm512_set1_epi64(1);
let r = _mm512_maskz_conflict_epi64(0, a);
assert_eq_m512i(r, _mm512_setzero_si512());
@ -1032,7 +1032,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
unsafe fn test_mm256_conflict_epi64() {
fn test_mm256_conflict_epi64() {
let a = _mm256_set1_epi64x(1);
let r = _mm256_conflict_epi64(a);
let e = _mm256_set_epi64x(1 << 2 | 1 << 1 | 1 << 0, 1 << 1 | 1 << 0, 1 << 0, 0);
@ -1040,7 +1040,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
unsafe fn test_mm256_mask_conflict_epi64() {
fn test_mm256_mask_conflict_epi64() {
let a = _mm256_set1_epi64x(1);
let r = _mm256_mask_conflict_epi64(a, 0, a);
assert_eq_m256i(r, a);
@ -1050,7 +1050,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
unsafe fn test_mm256_maskz_conflict_epi64() {
fn test_mm256_maskz_conflict_epi64() {
let a = _mm256_set1_epi64x(1);
let r = _mm256_maskz_conflict_epi64(0, a);
assert_eq_m256i(r, _mm256_setzero_si256());
@ -1060,7 +1060,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
unsafe fn test_mm_conflict_epi64() {
fn test_mm_conflict_epi64() {
let a = _mm_set1_epi64x(1);
let r = _mm_conflict_epi64(a);
let e = _mm_set_epi64x(1 << 0, 0);
@ -1068,7 +1068,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
unsafe fn test_mm_mask_conflict_epi64() {
fn test_mm_mask_conflict_epi64() {
let a = _mm_set1_epi64x(1);
let r = _mm_mask_conflict_epi64(a, 0, a);
assert_eq_m128i(r, a);
@ -1078,7 +1078,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
unsafe fn test_mm_maskz_conflict_epi64() {
fn test_mm_maskz_conflict_epi64() {
let a = _mm_set1_epi64x(1);
let r = _mm_maskz_conflict_epi64(0, a);
assert_eq_m128i(r, _mm_setzero_si128());
@ -1088,7 +1088,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
const unsafe fn test_mm512_lzcnt_epi32() {
const fn test_mm512_lzcnt_epi32() {
let a = _mm512_set1_epi32(1);
let r = _mm512_lzcnt_epi32(a);
let e = _mm512_set1_epi32(31);
@ -1096,7 +1096,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
const unsafe fn test_mm512_mask_lzcnt_epi32() {
const fn test_mm512_mask_lzcnt_epi32() {
let a = _mm512_set1_epi32(1);
let r = _mm512_mask_lzcnt_epi32(a, 0, a);
assert_eq_m512i(r, a);
@ -1106,7 +1106,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
const unsafe fn test_mm512_maskz_lzcnt_epi32() {
const fn test_mm512_maskz_lzcnt_epi32() {
let a = _mm512_set1_epi32(2);
let r = _mm512_maskz_lzcnt_epi32(0, a);
assert_eq_m512i(r, _mm512_setzero_si512());
@ -1116,7 +1116,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm256_lzcnt_epi32() {
const fn test_mm256_lzcnt_epi32() {
let a = _mm256_set1_epi32(1);
let r = _mm256_lzcnt_epi32(a);
let e = _mm256_set1_epi32(31);
@ -1124,7 +1124,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm256_mask_lzcnt_epi32() {
const fn test_mm256_mask_lzcnt_epi32() {
let a = _mm256_set1_epi32(1);
let r = _mm256_mask_lzcnt_epi32(a, 0, a);
assert_eq_m256i(r, a);
@ -1134,7 +1134,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm256_maskz_lzcnt_epi32() {
const fn test_mm256_maskz_lzcnt_epi32() {
let a = _mm256_set1_epi32(1);
let r = _mm256_maskz_lzcnt_epi32(0, a);
assert_eq_m256i(r, _mm256_setzero_si256());
@ -1144,7 +1144,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm_lzcnt_epi32() {
const fn test_mm_lzcnt_epi32() {
let a = _mm_set1_epi32(1);
let r = _mm_lzcnt_epi32(a);
let e = _mm_set1_epi32(31);
@ -1152,7 +1152,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm_mask_lzcnt_epi32() {
const fn test_mm_mask_lzcnt_epi32() {
let a = _mm_set1_epi32(1);
let r = _mm_mask_lzcnt_epi32(a, 0, a);
assert_eq_m128i(r, a);
@ -1162,7 +1162,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm_maskz_lzcnt_epi32() {
const fn test_mm_maskz_lzcnt_epi32() {
let a = _mm_set1_epi32(1);
let r = _mm_maskz_lzcnt_epi32(0, a);
assert_eq_m128i(r, _mm_setzero_si128());
@ -1172,7 +1172,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
const unsafe fn test_mm512_lzcnt_epi64() {
const fn test_mm512_lzcnt_epi64() {
let a = _mm512_set1_epi64(1);
let r = _mm512_lzcnt_epi64(a);
let e = _mm512_set1_epi64(63);
@ -1180,7 +1180,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
const unsafe fn test_mm512_mask_lzcnt_epi64() {
const fn test_mm512_mask_lzcnt_epi64() {
let a = _mm512_set1_epi64(1);
let r = _mm512_mask_lzcnt_epi64(a, 0, a);
assert_eq_m512i(r, a);
@ -1190,7 +1190,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd")]
const unsafe fn test_mm512_maskz_lzcnt_epi64() {
const fn test_mm512_maskz_lzcnt_epi64() {
let a = _mm512_set1_epi64(2);
let r = _mm512_maskz_lzcnt_epi64(0, a);
assert_eq_m512i(r, _mm512_setzero_si512());
@ -1200,7 +1200,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm256_lzcnt_epi64() {
const fn test_mm256_lzcnt_epi64() {
let a = _mm256_set1_epi64x(1);
let r = _mm256_lzcnt_epi64(a);
let e = _mm256_set1_epi64x(63);
@ -1208,7 +1208,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm256_mask_lzcnt_epi64() {
const fn test_mm256_mask_lzcnt_epi64() {
let a = _mm256_set1_epi64x(1);
let r = _mm256_mask_lzcnt_epi64(a, 0, a);
assert_eq_m256i(r, a);
@ -1218,7 +1218,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm256_maskz_lzcnt_epi64() {
const fn test_mm256_maskz_lzcnt_epi64() {
let a = _mm256_set1_epi64x(1);
let r = _mm256_maskz_lzcnt_epi64(0, a);
assert_eq_m256i(r, _mm256_setzero_si256());
@ -1228,7 +1228,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm_lzcnt_epi64() {
const fn test_mm_lzcnt_epi64() {
let a = _mm_set1_epi64x(1);
let r = _mm_lzcnt_epi64(a);
let e = _mm_set1_epi64x(63);
@ -1236,7 +1236,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm_mask_lzcnt_epi64() {
const fn test_mm_mask_lzcnt_epi64() {
let a = _mm_set1_epi64x(1);
let r = _mm_mask_lzcnt_epi64(a, 0, a);
assert_eq_m128i(r, a);
@ -1246,7 +1246,7 @@ mod tests {
}
#[simd_test(enable = "avx512cd,avx512vl")]
const unsafe fn test_mm_maskz_lzcnt_epi64() {
const fn test_mm_maskz_lzcnt_epi64() {
let a = _mm_set1_epi64x(1);
let r = _mm_maskz_lzcnt_epi64(0, a);
assert_eq_m128i(r, _mm_setzero_si128());

786
library/stdarch/crates/core_arch/src/x86/avx512dq.rs
View file

File diff suppressed because it is too large Load diff

2600
library/stdarch/crates/core_arch/src/x86/avx512f.rs
View file

File diff suppressed because it is too large Load diff

3568
library/stdarch/crates/core_arch/src/x86/avx512fp16.rs
View file

File diff suppressed because it is too large Load diff

44
library/stdarch/crates/core_arch/src/x86/avx512ifma.rs
View file

@ -372,7 +372,7 @@ mod tests {
const K: __mmask8 = 0b01101101;
#[simd_test(enable = "avx512ifma")]
unsafe fn test_mm512_madd52hi_epu64() {
fn test_mm512_madd52hi_epu64() {
let a = _mm512_set1_epi64(10 << 40);
let b = _mm512_set1_epi64((11 << 40) + 4);
let c = _mm512_set1_epi64((12 << 40) + 3);
@ -386,7 +386,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma")]
unsafe fn test_mm512_mask_madd52hi_epu64() {
fn test_mm512_mask_madd52hi_epu64() {
let a = _mm512_set1_epi64(10 << 40);
let b = _mm512_set1_epi64((11 << 40) + 4);
let c = _mm512_set1_epi64((12 << 40) + 3);
@ -401,7 +401,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma")]
unsafe fn test_mm512_maskz_madd52hi_epu64() {
fn test_mm512_maskz_madd52hi_epu64() {
let a = _mm512_set1_epi64(10 << 40);
let b = _mm512_set1_epi64((11 << 40) + 4);
let c = _mm512_set1_epi64((12 << 40) + 3);
@ -416,7 +416,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma")]
unsafe fn test_mm512_madd52lo_epu64() {
fn test_mm512_madd52lo_epu64() {
let a = _mm512_set1_epi64(10 << 40);
let b = _mm512_set1_epi64((11 << 40) + 4);
let c = _mm512_set1_epi64((12 << 40) + 3);
@ -430,7 +430,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma")]
unsafe fn test_mm512_mask_madd52lo_epu64() {
fn test_mm512_mask_madd52lo_epu64() {
let a = _mm512_set1_epi64(10 << 40);
let b = _mm512_set1_epi64((11 << 40) + 4);
let c = _mm512_set1_epi64((12 << 40) + 3);
@ -445,7 +445,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma")]
unsafe fn test_mm512_maskz_madd52lo_epu64() {
fn test_mm512_maskz_madd52lo_epu64() {
let a = _mm512_set1_epi64(10 << 40);
let b = _mm512_set1_epi64((11 << 40) + 4);
let c = _mm512_set1_epi64((12 << 40) + 3);
@ -460,7 +460,7 @@ mod tests {
}
#[simd_test(enable = "avxifma")]
unsafe fn test_mm256_madd52hi_avx_epu64() {
fn test_mm256_madd52hi_avx_epu64() {
let a = _mm256_set1_epi64x(10 << 40);
let b = _mm256_set1_epi64x((11 << 40) + 4);
let c = _mm256_set1_epi64x((12 << 40) + 3);
@ -474,7 +474,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma,avx512vl")]
unsafe fn test_mm256_madd52hi_epu64() {
fn test_mm256_madd52hi_epu64() {
let a = _mm256_set1_epi64x(10 << 40);
let b = _mm256_set1_epi64x((11 << 40) + 4);
let c = _mm256_set1_epi64x((12 << 40) + 3);
@ -488,7 +488,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma,avx512vl")]
unsafe fn test_mm256_mask_madd52hi_epu64() {
fn test_mm256_mask_madd52hi_epu64() {
let a = _mm256_set1_epi64x(10 << 40);
let b = _mm256_set1_epi64x((11 << 40) + 4);
let c = _mm256_set1_epi64x((12 << 40) + 3);
@ -503,7 +503,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma,avx512vl")]
unsafe fn test_mm256_maskz_madd52hi_epu64() {
fn test_mm256_maskz_madd52hi_epu64() {
let a = _mm256_set1_epi64x(10 << 40);
let b = _mm256_set1_epi64x((11 << 40) + 4);
let c = _mm256_set1_epi64x((12 << 40) + 3);
@ -518,7 +518,7 @@ mod tests {
}
#[simd_test(enable = "avxifma")]
unsafe fn test_mm256_madd52lo_avx_epu64() {
fn test_mm256_madd52lo_avx_epu64() {
let a = _mm256_set1_epi64x(10 << 40);
let b = _mm256_set1_epi64x((11 << 40) + 4);
let c = _mm256_set1_epi64x((12 << 40) + 3);
@ -532,7 +532,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma,avx512vl")]
unsafe fn test_mm256_madd52lo_epu64() {
fn test_mm256_madd52lo_epu64() {
let a = _mm256_set1_epi64x(10 << 40);
let b = _mm256_set1_epi64x((11 << 40) + 4);
let c = _mm256_set1_epi64x((12 << 40) + 3);
@ -546,7 +546,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma,avx512vl")]
unsafe fn test_mm256_mask_madd52lo_epu64() {
fn test_mm256_mask_madd52lo_epu64() {
let a = _mm256_set1_epi64x(10 << 40);
let b = _mm256_set1_epi64x((11 << 40) + 4);
let c = _mm256_set1_epi64x((12 << 40) + 3);
@ -561,7 +561,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma,avx512vl")]
unsafe fn test_mm256_maskz_madd52lo_epu64() {
fn test_mm256_maskz_madd52lo_epu64() {
let a = _mm256_set1_epi64x(10 << 40);
let b = _mm256_set1_epi64x((11 << 40) + 4);
let c = _mm256_set1_epi64x((12 << 40) + 3);
@ -576,7 +576,7 @@ mod tests {
}
#[simd_test(enable = "avxifma")]
unsafe fn test_mm_madd52hi_avx_epu64() {
fn test_mm_madd52hi_avx_epu64() {
let a = _mm_set1_epi64x(10 << 40);
let b = _mm_set1_epi64x((11 << 40) + 4);
let c = _mm_set1_epi64x((12 << 40) + 3);
@ -590,7 +590,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma,avx512vl")]
unsafe fn test_mm_madd52hi_epu64() {
fn test_mm_madd52hi_epu64() {
let a = _mm_set1_epi64x(10 << 40);
let b = _mm_set1_epi64x((11 << 40) + 4);
let c = _mm_set1_epi64x((12 << 40) + 3);
@ -604,7 +604,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma,avx512vl")]
unsafe fn test_mm_mask_madd52hi_epu64() {
fn test_mm_mask_madd52hi_epu64() {
let a = _mm_set1_epi64x(10 << 40);
let b = _mm_set1_epi64x((11 << 40) + 4);
let c = _mm_set1_epi64x((12 << 40) + 3);
@ -619,7 +619,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma,avx512vl")]
unsafe fn test_mm_maskz_madd52hi_epu64() {
fn test_mm_maskz_madd52hi_epu64() {
let a = _mm_set1_epi64x(10 << 40);
let b = _mm_set1_epi64x((11 << 40) + 4);
let c = _mm_set1_epi64x((12 << 40) + 3);
@ -634,7 +634,7 @@ mod tests {
}
#[simd_test(enable = "avxifma")]
unsafe fn test_mm_madd52lo_avx_epu64() {
fn test_mm_madd52lo_avx_epu64() {
let a = _mm_set1_epi64x(10 << 40);
let b = _mm_set1_epi64x((11 << 40) + 4);
let c = _mm_set1_epi64x((12 << 40) + 3);
@ -648,7 +648,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma,avx512vl")]
unsafe fn test_mm_madd52lo_epu64() {
fn test_mm_madd52lo_epu64() {
let a = _mm_set1_epi64x(10 << 40);
let b = _mm_set1_epi64x((11 << 40) + 4);
let c = _mm_set1_epi64x((12 << 40) + 3);
@ -662,7 +662,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma,avx512vl")]
unsafe fn test_mm_mask_madd52lo_epu64() {
fn test_mm_mask_madd52lo_epu64() {
let a = _mm_set1_epi64x(10 << 40);
let b = _mm_set1_epi64x((11 << 40) + 4);
let c = _mm_set1_epi64x((12 << 40) + 3);
@ -677,7 +677,7 @@ mod tests {
}
#[simd_test(enable = "avx512ifma,avx512vl")]
unsafe fn test_mm_maskz_madd52lo_epu64() {
fn test_mm_maskz_madd52lo_epu64() {
let a = _mm_set1_epi64x(10 << 40);
let b = _mm_set1_epi64x((11 << 40) + 4);
let c = _mm_set1_epi64x((12 << 40) + 3);

60
library/stdarch/crates/core_arch/src/x86/avx512vbmi.rs
View file

@ -484,7 +484,7 @@ mod tests {
use crate::core_arch::x86::*;
#[simd_test(enable = "avx512vbmi")]
unsafe fn test_mm512_permutex2var_epi8() {
fn test_mm512_permutex2var_epi8() {
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
@ -508,7 +508,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi")]
unsafe fn test_mm512_mask_permutex2var_epi8() {
fn test_mm512_mask_permutex2var_epi8() {
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
@ -539,7 +539,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi")]
unsafe fn test_mm512_maskz_permutex2var_epi8() {
fn test_mm512_maskz_permutex2var_epi8() {
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
@ -570,7 +570,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi")]
unsafe fn test_mm512_mask2_permutex2var_epi8() {
fn test_mm512_mask2_permutex2var_epi8() {
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
@ -601,7 +601,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm256_permutex2var_epi8() {
fn test_mm256_permutex2var_epi8() {
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31);
@ -619,7 +619,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm256_mask_permutex2var_epi8() {
fn test_mm256_mask_permutex2var_epi8() {
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31);
@ -639,7 +639,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm256_maskz_permutex2var_epi8() {
fn test_mm256_maskz_permutex2var_epi8() {
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31);
@ -659,7 +659,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm256_mask2_permutex2var_epi8() {
fn test_mm256_mask2_permutex2var_epi8() {
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31);
@ -679,7 +679,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm_permutex2var_epi8() {
fn test_mm_permutex2var_epi8() {
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
#[rustfmt::skip]
let idx = _mm_set_epi8(1, 1 << 4, 2, 1 << 4, 3, 1 << 4, 4, 1 << 4, 5, 1 << 4, 6, 1 << 4, 7, 1 << 4, 8, 1 << 4);
@ -692,7 +692,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm_mask_permutex2var_epi8() {
fn test_mm_mask_permutex2var_epi8() {
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
#[rustfmt::skip]
let idx = _mm_set_epi8(1, 1 << 4, 2, 1 << 4, 3, 1 << 4, 4, 1 << 4, 5, 1 << 4, 6, 1 << 4, 7, 1 << 4, 8, 1 << 4);
@ -707,7 +707,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm_maskz_permutex2var_epi8() {
fn test_mm_maskz_permutex2var_epi8() {
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
#[rustfmt::skip]
let idx = _mm_set_epi8(1, 1 << 4, 2, 1 << 4, 3, 1 << 4, 4, 1 << 4, 5, 1 << 4, 6, 1 << 4, 7, 1 << 4, 8, 1 << 4);
@ -722,7 +722,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm_mask2_permutex2var_epi8() {
fn test_mm_mask2_permutex2var_epi8() {
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
#[rustfmt::skip]
let idx = _mm_set_epi8(1, 1 << 4, 2, 1 << 4, 3, 1 << 4, 4, 1 << 4, 5, 1 << 4, 6, 1 << 4, 7, 1 << 4, 8, 1 << 4);
@ -737,7 +737,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi")]
unsafe fn test_mm512_permutexvar_epi8() {
fn test_mm512_permutexvar_epi8() {
let idx = _mm512_set1_epi8(1);
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@ -750,7 +750,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi")]
unsafe fn test_mm512_mask_permutexvar_epi8() {
fn test_mm512_mask_permutexvar_epi8() {
let idx = _mm512_set1_epi8(1);
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@ -770,7 +770,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi")]
unsafe fn test_mm512_maskz_permutexvar_epi8() {
fn test_mm512_maskz_permutexvar_epi8() {
let idx = _mm512_set1_epi8(1);
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@ -789,7 +789,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm256_permutexvar_epi8() {
fn test_mm256_permutexvar_epi8() {
let idx = _mm256_set1_epi8(1);
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@ -800,7 +800,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm256_mask_permutexvar_epi8() {
fn test_mm256_mask_permutexvar_epi8() {
let idx = _mm256_set1_epi8(1);
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@ -813,7 +813,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm256_maskz_permutexvar_epi8() {
fn test_mm256_maskz_permutexvar_epi8() {
let idx = _mm256_set1_epi8(1);
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@ -826,7 +826,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm_permutexvar_epi8() {
fn test_mm_permutexvar_epi8() {
let idx = _mm_set1_epi8(1);
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let r = _mm_permutexvar_epi8(idx, a);
@ -835,7 +835,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm_mask_permutexvar_epi8() {
fn test_mm_mask_permutexvar_epi8() {
let idx = _mm_set1_epi8(1);
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let r = _mm_mask_permutexvar_epi8(a, 0, idx, a);
@ -846,7 +846,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm_maskz_permutexvar_epi8() {
fn test_mm_maskz_permutexvar_epi8() {
let idx = _mm_set1_epi8(1);
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let r = _mm_maskz_permutexvar_epi8(0, idx, a);
@ -857,7 +857,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi")]
unsafe fn test_mm512_multishift_epi64_epi8() {
fn test_mm512_multishift_epi64_epi8() {
let a = _mm512_set1_epi8(1);
let b = _mm512_set1_epi8(1);
let r = _mm512_multishift_epi64_epi8(a, b);
@ -866,7 +866,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi")]
unsafe fn test_mm512_mask_multishift_epi64_epi8() {
fn test_mm512_mask_multishift_epi64_epi8() {
let a = _mm512_set1_epi8(1);
let b = _mm512_set1_epi8(1);
let r = _mm512_mask_multishift_epi64_epi8(a, 0, a, b);
@ -882,7 +882,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi")]
unsafe fn test_mm512_maskz_multishift_epi64_epi8() {
fn test_mm512_maskz_multishift_epi64_epi8() {
let a = _mm512_set1_epi8(1);
let b = _mm512_set1_epi8(1);
let r = _mm512_maskz_multishift_epi64_epi8(0, a, b);
@ -897,7 +897,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm256_multishift_epi64_epi8() {
fn test_mm256_multishift_epi64_epi8() {
let a = _mm256_set1_epi8(1);
let b = _mm256_set1_epi8(1);
let r = _mm256_multishift_epi64_epi8(a, b);
@ -906,7 +906,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm256_mask_multishift_epi64_epi8() {
fn test_mm256_mask_multishift_epi64_epi8() {
let a = _mm256_set1_epi8(1);
let b = _mm256_set1_epi8(1);
let r = _mm256_mask_multishift_epi64_epi8(a, 0, a, b);
@ -917,7 +917,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm256_maskz_multishift_epi64_epi8() {
fn test_mm256_maskz_multishift_epi64_epi8() {
let a = _mm256_set1_epi8(1);
let b = _mm256_set1_epi8(1);
let r = _mm256_maskz_multishift_epi64_epi8(0, a, b);
@ -928,7 +928,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm_multishift_epi64_epi8() {
fn test_mm_multishift_epi64_epi8() {
let a = _mm_set1_epi8(1);
let b = _mm_set1_epi8(1);
let r = _mm_multishift_epi64_epi8(a, b);
@ -937,7 +937,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm_mask_multishift_epi64_epi8() {
fn test_mm_mask_multishift_epi64_epi8() {
let a = _mm_set1_epi8(1);
let b = _mm_set1_epi8(1);
let r = _mm_mask_multishift_epi64_epi8(a, 0, a, b);
@ -948,7 +948,7 @@ mod tests {
}
#[simd_test(enable = "avx512vbmi,avx512vl")]
unsafe fn test_mm_maskz_multishift_epi64_epi8() {
fn test_mm_maskz_multishift_epi64_epi8() {
let a = _mm_set1_epi8(1);
let b = _mm_set1_epi8(1);
let r = _mm_maskz_multishift_epi64_epi8(0, a, b);

264
library/stdarch/crates/core_arch/src/x86/avx512vbmi2.rs
View file

File diff suppressed because it is too large Load diff

136
library/stdarch/crates/core_arch/src/x86/avx512vnni.rs
View file

@ -970,7 +970,7 @@ mod tests {
use stdarch_test::simd_test;
#[simd_test(enable = "avx512vnni")]
unsafe fn test_mm512_dpwssd_epi32() {
fn test_mm512_dpwssd_epi32() {
let src = _mm512_set1_epi32(1);
let a = _mm512_set1_epi32(1 << 16 | 1 << 0);
let b = _mm512_set1_epi32(1 << 16 | 1 << 0);
@ -980,7 +980,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni")]
unsafe fn test_mm512_mask_dpwssd_epi32() {
fn test_mm512_mask_dpwssd_epi32() {
let src = _mm512_set1_epi32(1);
let a = _mm512_set1_epi32(1 << 16 | 1 << 0);
let b = _mm512_set1_epi32(1 << 16 | 1 << 0);
@ -992,7 +992,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni")]
unsafe fn test_mm512_maskz_dpwssd_epi32() {
fn test_mm512_maskz_dpwssd_epi32() {
let src = _mm512_set1_epi32(1);
let a = _mm512_set1_epi32(1 << 16 | 1 << 0);
let b = _mm512_set1_epi32(1 << 16 | 1 << 0);
@ -1004,7 +1004,7 @@ mod tests {
}
#[simd_test(enable = "avxvnni")]
unsafe fn test_mm256_dpwssd_avx_epi32() {
fn test_mm256_dpwssd_avx_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1014,7 +1014,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm256_dpwssd_epi32() {
fn test_mm256_dpwssd_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1024,7 +1024,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm256_mask_dpwssd_epi32() {
fn test_mm256_mask_dpwssd_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1036,7 +1036,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm256_maskz_dpwssd_epi32() {
fn test_mm256_maskz_dpwssd_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1048,7 +1048,7 @@ mod tests {
}
#[simd_test(enable = "avxvnni")]
unsafe fn test_mm_dpwssd_avx_epi32() {
fn test_mm_dpwssd_avx_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1058,7 +1058,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm_dpwssd_epi32() {
fn test_mm_dpwssd_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1068,7 +1068,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm_mask_dpwssd_epi32() {
fn test_mm_mask_dpwssd_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1080,7 +1080,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm_maskz_dpwssd_epi32() {
fn test_mm_maskz_dpwssd_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1092,7 +1092,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni")]
unsafe fn test_mm512_dpwssds_epi32() {
fn test_mm512_dpwssds_epi32() {
let src = _mm512_set1_epi32(1);
let a = _mm512_set1_epi32(1 << 16 | 1 << 0);
let b = _mm512_set1_epi32(1 << 16 | 1 << 0);
@ -1102,7 +1102,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni")]
unsafe fn test_mm512_mask_dpwssds_epi32() {
fn test_mm512_mask_dpwssds_epi32() {
let src = _mm512_set1_epi32(1);
let a = _mm512_set1_epi32(1 << 16 | 1 << 0);
let b = _mm512_set1_epi32(1 << 16 | 1 << 0);
@ -1114,7 +1114,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni")]
unsafe fn test_mm512_maskz_dpwssds_epi32() {
fn test_mm512_maskz_dpwssds_epi32() {
let src = _mm512_set1_epi32(1);
let a = _mm512_set1_epi32(1 << 16 | 1 << 0);
let b = _mm512_set1_epi32(1 << 16 | 1 << 0);
@ -1126,7 +1126,7 @@ mod tests {
}
#[simd_test(enable = "avxvnni")]
unsafe fn test_mm256_dpwssds_avx_epi32() {
fn test_mm256_dpwssds_avx_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1136,7 +1136,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm256_dpwssds_epi32() {
fn test_mm256_dpwssds_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1146,7 +1146,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm256_mask_dpwssds_epi32() {
fn test_mm256_mask_dpwssds_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1158,7 +1158,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm256_maskz_dpwssds_epi32() {
fn test_mm256_maskz_dpwssds_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1170,7 +1170,7 @@ mod tests {
}
#[simd_test(enable = "avxvnni")]
unsafe fn test_mm_dpwssds_avx_epi32() {
fn test_mm_dpwssds_avx_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1180,7 +1180,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm_dpwssds_epi32() {
fn test_mm_dpwssds_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1190,7 +1190,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm_mask_dpwssds_epi32() {
fn test_mm_mask_dpwssds_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1202,7 +1202,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm_maskz_dpwssds_epi32() {
fn test_mm_maskz_dpwssds_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1214,7 +1214,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni")]
unsafe fn test_mm512_dpbusd_epi32() {
fn test_mm512_dpbusd_epi32() {
let src = _mm512_set1_epi32(1);
let a = _mm512_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm512_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1224,7 +1224,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni")]
unsafe fn test_mm512_mask_dpbusd_epi32() {
fn test_mm512_mask_dpbusd_epi32() {
let src = _mm512_set1_epi32(1);
let a = _mm512_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm512_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1236,7 +1236,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni")]
unsafe fn test_mm512_maskz_dpbusd_epi32() {
fn test_mm512_maskz_dpbusd_epi32() {
let src = _mm512_set1_epi32(1);
let a = _mm512_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm512_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1248,7 +1248,7 @@ mod tests {
}
#[simd_test(enable = "avxvnni")]
unsafe fn test_mm256_dpbusd_avx_epi32() {
fn test_mm256_dpbusd_avx_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1258,7 +1258,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm256_dpbusd_epi32() {
fn test_mm256_dpbusd_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1268,7 +1268,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm256_mask_dpbusd_epi32() {
fn test_mm256_mask_dpbusd_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1280,7 +1280,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm256_maskz_dpbusd_epi32() {
fn test_mm256_maskz_dpbusd_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1292,7 +1292,7 @@ mod tests {
}
#[simd_test(enable = "avxvnni")]
unsafe fn test_mm_dpbusd_avx_epi32() {
fn test_mm_dpbusd_avx_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1302,7 +1302,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm_dpbusd_epi32() {
fn test_mm_dpbusd_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1312,7 +1312,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm_mask_dpbusd_epi32() {
fn test_mm_mask_dpbusd_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1324,7 +1324,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm_maskz_dpbusd_epi32() {
fn test_mm_maskz_dpbusd_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1336,7 +1336,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni")]
unsafe fn test_mm512_dpbusds_epi32() {
fn test_mm512_dpbusds_epi32() {
let src = _mm512_set1_epi32(1);
let a = _mm512_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm512_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1346,7 +1346,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni")]
unsafe fn test_mm512_mask_dpbusds_epi32() {
fn test_mm512_mask_dpbusds_epi32() {
let src = _mm512_set1_epi32(1);
let a = _mm512_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm512_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1358,7 +1358,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni")]
unsafe fn test_mm512_maskz_dpbusds_epi32() {
fn test_mm512_maskz_dpbusds_epi32() {
let src = _mm512_set1_epi32(1);
let a = _mm512_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm512_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1370,7 +1370,7 @@ mod tests {
}
#[simd_test(enable = "avxvnni")]
unsafe fn test_mm256_dpbusds_avx_epi32() {
fn test_mm256_dpbusds_avx_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1380,7 +1380,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm256_dpbusds_epi32() {
fn test_mm256_dpbusds_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1390,7 +1390,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm256_mask_dpbusds_epi32() {
fn test_mm256_mask_dpbusds_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1402,7 +1402,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm256_maskz_dpbusds_epi32() {
fn test_mm256_maskz_dpbusds_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1414,7 +1414,7 @@ mod tests {
}
#[simd_test(enable = "avxvnni")]
unsafe fn test_mm_dpbusds_avx_epi32() {
fn test_mm_dpbusds_avx_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1424,7 +1424,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm_dpbusds_epi32() {
fn test_mm_dpbusds_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1434,7 +1434,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm_mask_dpbusds_epi32() {
fn test_mm_mask_dpbusds_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1446,7 +1446,7 @@ mod tests {
}
#[simd_test(enable = "avx512vnni,avx512vl")]
unsafe fn test_mm_maskz_dpbusds_epi32() {
fn test_mm_maskz_dpbusds_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1458,7 +1458,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint8")]
unsafe fn test_mm_dpbssd_epi32() {
fn test_mm_dpbssd_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1468,7 +1468,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint8")]
unsafe fn test_mm256_dpbssd_epi32() {
fn test_mm256_dpbssd_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1478,7 +1478,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint8")]
unsafe fn test_mm_dpbssds_epi32() {
fn test_mm_dpbssds_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1488,7 +1488,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint8")]
unsafe fn test_mm256_dpbssds_epi32() {
fn test_mm256_dpbssds_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1498,7 +1498,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint8")]
unsafe fn test_mm_dpbsud_epi32() {
fn test_mm_dpbsud_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1508,7 +1508,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint8")]
unsafe fn test_mm256_dpbsud_epi32() {
fn test_mm256_dpbsud_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1518,7 +1518,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint8")]
unsafe fn test_mm_dpbsuds_epi32() {
fn test_mm_dpbsuds_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1528,7 +1528,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint8")]
unsafe fn test_mm256_dpbsuds_epi32() {
fn test_mm256_dpbsuds_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1538,7 +1538,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint8")]
unsafe fn test_mm_dpbuud_epi32() {
fn test_mm_dpbuud_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1548,7 +1548,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint8")]
unsafe fn test_mm256_dpbuud_epi32() {
fn test_mm256_dpbuud_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1558,7 +1558,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint8")]
unsafe fn test_mm_dpbuuds_epi32() {
fn test_mm_dpbuuds_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1568,7 +1568,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint8")]
unsafe fn test_mm256_dpbuuds_epi32() {
fn test_mm256_dpbuuds_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
let b = _mm256_set1_epi32(1 << 24 | 1 << 16 | 1 << 8 | 1 << 0);
@ -1578,7 +1578,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint16")]
unsafe fn test_mm_dpwsud_epi32() {
fn test_mm_dpwsud_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1588,7 +1588,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint16")]
unsafe fn test_mm256_dpwsud_epi32() {
fn test_mm256_dpwsud_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1598,7 +1598,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint16")]
unsafe fn test_mm_dpwsuds_epi32() {
fn test_mm_dpwsuds_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1608,7 +1608,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint16")]
unsafe fn test_mm256_dpwsuds_epi32() {
fn test_mm256_dpwsuds_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1618,7 +1618,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint16")]
unsafe fn test_mm_dpwusd_epi32() {
fn test_mm_dpwusd_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1628,7 +1628,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint16")]
unsafe fn test_mm256_dpwusd_epi32() {
fn test_mm256_dpwusd_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1638,7 +1638,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint16")]
unsafe fn test_mm_dpwusds_epi32() {
fn test_mm_dpwusds_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1648,7 +1648,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint16")]
unsafe fn test_mm256_dpwusds_epi32() {
fn test_mm256_dpwusds_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1658,7 +1658,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint16")]
unsafe fn test_mm_dpwuud_epi32() {
fn test_mm_dpwuud_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1668,7 +1668,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint16")]
unsafe fn test_mm256_dpwuud_epi32() {
fn test_mm256_dpwuud_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);
@ -1678,7 +1678,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint16")]
unsafe fn test_mm_dpwuuds_epi32() {
fn test_mm_dpwuuds_epi32() {
let src = _mm_set1_epi32(1);
let a = _mm_set1_epi32(1 << 16 | 1 << 0);
let b = _mm_set1_epi32(1 << 16 | 1 << 0);
@ -1688,7 +1688,7 @@ mod tests {
}
#[simd_test(enable = "avxvnniint16")]
unsafe fn test_mm256_dpwuuds_epi32() {
fn test_mm256_dpwuuds_epi32() {
let src = _mm256_set1_epi32(1);
let a = _mm256_set1_epi32(1 << 16 | 1 << 0);
let b = _mm256_set1_epi32(1 << 16 | 1 << 0);

36
library/stdarch/crates/core_arch/src/x86/avx512vpopcntdq.rs
View file

@ -351,7 +351,7 @@ mod tests {
use crate::core_arch::x86::*;
#[simd_test(enable = "avx512vpopcntdq,avx512f")]
const unsafe fn test_mm512_popcnt_epi32() {
const fn test_mm512_popcnt_epi32() {
let test_data = _mm512_set_epi32(
0,
1,
@ -377,7 +377,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512f")]
const unsafe fn test_mm512_mask_popcnt_epi32() {
const fn test_mm512_mask_popcnt_epi32() {
let test_data = _mm512_set_epi32(
0,
1,
@ -420,7 +420,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512f")]
const unsafe fn test_mm512_maskz_popcnt_epi32() {
const fn test_mm512_maskz_popcnt_epi32() {
let test_data = _mm512_set_epi32(
0,
1,
@ -446,7 +446,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512f,avx512vl")]
const unsafe fn test_mm256_popcnt_epi32() {
const fn test_mm256_popcnt_epi32() {
let test_data = _mm256_set_epi32(0, 1, -1, 2, 7, 0xFF_FE, 0x7F_FF_FF_FF, -100);
let actual_result = _mm256_popcnt_epi32(test_data);
let reference_result = _mm256_set_epi32(0, 1, 32, 1, 3, 15, 31, 28);
@ -454,7 +454,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512f,avx512vl")]
const unsafe fn test_mm256_mask_popcnt_epi32() {
const fn test_mm256_mask_popcnt_epi32() {
let test_data = _mm256_set_epi32(0, 1, -1, 2, 7, 0xFF_FE, 0x7F_FF_FF_FF, -100);
let mask = 0xF0;
let actual_result = _mm256_mask_popcnt_epi32(test_data, mask, test_data);
@ -463,7 +463,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512f,avx512vl")]
const unsafe fn test_mm256_maskz_popcnt_epi32() {
const fn test_mm256_maskz_popcnt_epi32() {
let test_data = _mm256_set_epi32(0, 1, -1, 2, 7, 0xFF_FE, 0x7F_FF_FF_FF, -100);
let mask = 0xF0;
let actual_result = _mm256_maskz_popcnt_epi32(mask, test_data);
@ -472,7 +472,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512f,avx512vl")]
const unsafe fn test_mm_popcnt_epi32() {
const fn test_mm_popcnt_epi32() {
let test_data = _mm_set_epi32(0, 1, -1, -100);
let actual_result = _mm_popcnt_epi32(test_data);
let reference_result = _mm_set_epi32(0, 1, 32, 28);
@ -480,7 +480,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512f,avx512vl")]
const unsafe fn test_mm_mask_popcnt_epi32() {
const fn test_mm_mask_popcnt_epi32() {
let test_data = _mm_set_epi32(0, 1, -1, -100);
let mask = 0xE;
let actual_result = _mm_mask_popcnt_epi32(test_data, mask, test_data);
@ -489,7 +489,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512f,avx512vl")]
const unsafe fn test_mm_maskz_popcnt_epi32() {
const fn test_mm_maskz_popcnt_epi32() {
let test_data = _mm_set_epi32(0, 1, -1, -100);
let mask = 0xE;
let actual_result = _mm_maskz_popcnt_epi32(mask, test_data);
@ -498,7 +498,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512f")]
const unsafe fn test_mm512_popcnt_epi64() {
const fn test_mm512_popcnt_epi64() {
let test_data = _mm512_set_epi64(0, 1, -1, 2, 7, 0xFF_FE, 0x7F_FF_FF_FF_FF_FF_FF_FF, -100);
let actual_result = _mm512_popcnt_epi64(test_data);
let reference_result = _mm512_set_epi64(0, 1, 64, 1, 3, 15, 63, 60);
@ -506,7 +506,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512f")]
const unsafe fn test_mm512_mask_popcnt_epi64() {
const fn test_mm512_mask_popcnt_epi64() {
let test_data = _mm512_set_epi64(0, 1, -1, 2, 7, 0xFF_FE, 0x7F_FF_FF_FF_FF_FF_FF_FF, -100);
let mask = 0xF0;
let actual_result = _mm512_mask_popcnt_epi64(test_data, mask, test_data);
@ -516,7 +516,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512f")]
const unsafe fn test_mm512_maskz_popcnt_epi64() {
const fn test_mm512_maskz_popcnt_epi64() {
let test_data = _mm512_set_epi64(0, 1, -1, 2, 7, 0xFF_FE, 0x7F_FF_FF_FF_FF_FF_FF_FF, -100);
let mask = 0xF0;
let actual_result = _mm512_maskz_popcnt_epi64(mask, test_data);
@ -525,7 +525,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512vl")]
const unsafe fn test_mm256_popcnt_epi64() {
const fn test_mm256_popcnt_epi64() {
let test_data = _mm256_set_epi64x(0, 1, -1, -100);
let actual_result = _mm256_popcnt_epi64(test_data);
let reference_result = _mm256_set_epi64x(0, 1, 64, 60);
@ -533,7 +533,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512vl")]
const unsafe fn test_mm256_mask_popcnt_epi64() {
const fn test_mm256_mask_popcnt_epi64() {
let test_data = _mm256_set_epi64x(0, 1, -1, -100);
let mask = 0xE;
let actual_result = _mm256_mask_popcnt_epi64(test_data, mask, test_data);
@ -542,7 +542,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512vl")]
const unsafe fn test_mm256_maskz_popcnt_epi64() {
const fn test_mm256_maskz_popcnt_epi64() {
let test_data = _mm256_set_epi64x(0, 1, -1, -100);
let mask = 0xE;
let actual_result = _mm256_maskz_popcnt_epi64(mask, test_data);
@ -551,7 +551,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512vl")]
const unsafe fn test_mm_popcnt_epi64() {
const fn test_mm_popcnt_epi64() {
let test_data = _mm_set_epi64x(0, 1);
let actual_result = _mm_popcnt_epi64(test_data);
let reference_result = _mm_set_epi64x(0, 1);
@ -563,7 +563,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512vl")]
const unsafe fn test_mm_mask_popcnt_epi64() {
const fn test_mm_mask_popcnt_epi64() {
let test_data = _mm_set_epi64x(0, -100);
let mask = 0x2;
let actual_result = _mm_mask_popcnt_epi64(test_data, mask, test_data);
@ -577,7 +577,7 @@ mod tests {
}
#[simd_test(enable = "avx512vpopcntdq,avx512vl")]
const unsafe fn test_mm_maskz_popcnt_epi64() {
const fn test_mm_maskz_popcnt_epi64() {
let test_data = _mm_set_epi64x(0, 1);
let mask = 0x2;
let actual_result = _mm_maskz_popcnt_epi64(mask, test_data);

8
library/stdarch/crates/core_arch/src/x86/avxneconvert.rs
View file

@ -87,7 +87,7 @@ pub unsafe fn _mm256_cvtneebf16_ps(a: *const __m256bh) -> __m256 {
#[inline]
#[target_feature(enable = "avxneconvert")]
#[cfg_attr(test, assert_instr(vcvtneeph2ps))]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub unsafe fn _mm_cvtneeph_ps(a: *const __m128h) -> __m128 {
transmute(cvtneeph2ps_128(a))
}
@ -99,7 +99,7 @@ pub unsafe fn _mm_cvtneeph_ps(a: *const __m128h) -> __m128 {
#[inline]
#[target_feature(enable = "avxneconvert")]
#[cfg_attr(test, assert_instr(vcvtneeph2ps))]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub unsafe fn _mm256_cvtneeph_ps(a: *const __m256h) -> __m256 {
transmute(cvtneeph2ps_256(a))
}
@ -135,7 +135,7 @@ pub unsafe fn _mm256_cvtneobf16_ps(a: *const __m256bh) -> __m256 {
#[inline]
#[target_feature(enable = "avxneconvert")]
#[cfg_attr(test, assert_instr(vcvtneoph2ps))]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub unsafe fn _mm_cvtneoph_ps(a: *const __m128h) -> __m128 {
transmute(cvtneoph2ps_128(a))
}
@ -147,7 +147,7 @@ pub unsafe fn _mm_cvtneoph_ps(a: *const __m128h) -> __m128 {
#[inline]
#[target_feature(enable = "avxneconvert")]
#[cfg_attr(test, assert_instr(vcvtneoph2ps))]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub unsafe fn _mm256_cvtneoph_ps(a: *const __m256h) -> __m256 {
transmute(cvtneoph2ps_256(a))
}

14
library/stdarch/crates/core_arch/src/x86/bmi1.rs
View file

@ -144,13 +144,13 @@ mod tests {
use crate::core_arch::x86::*;
#[simd_test(enable = "bmi1")]
unsafe fn test_bextr_u32() {
fn test_bextr_u32() {
let r = _bextr_u32(0b0101_0000u32, 4, 4);
assert_eq!(r, 0b0000_0101u32);
}
#[simd_test(enable = "bmi1")]
const unsafe fn test_andn_u32() {
const fn test_andn_u32() {
assert_eq!(_andn_u32(0, 0), 0);
assert_eq!(_andn_u32(0, 1), 1);
assert_eq!(_andn_u32(1, 0), 0);
@ -173,32 +173,32 @@ mod tests {
}
#[simd_test(enable = "bmi1")]
const unsafe fn test_blsi_u32() {
const fn test_blsi_u32() {
assert_eq!(_blsi_u32(0b1101_0000u32), 0b0001_0000u32);
}
#[simd_test(enable = "bmi1")]
const unsafe fn test_blsmsk_u32() {
const fn test_blsmsk_u32() {
let r = _blsmsk_u32(0b0011_0000u32);
assert_eq!(r, 0b0001_1111u32);
}
#[simd_test(enable = "bmi1")]
const unsafe fn test_blsr_u32() {
const fn test_blsr_u32() {
// TODO: test the behavior when the input is `0`.
let r = _blsr_u32(0b0011_0000u32);
assert_eq!(r, 0b0010_0000u32);
}
#[simd_test(enable = "bmi1")]
const unsafe fn test_tzcnt_u16() {
const fn test_tzcnt_u16() {
assert_eq!(_tzcnt_u16(0b0000_0001u16), 0u16);
assert_eq!(_tzcnt_u16(0b0000_0000u16), 16u16);
assert_eq!(_tzcnt_u16(0b1001_0000u16), 4u16);
}
#[simd_test(enable = "bmi1")]
const unsafe fn test_tzcnt_u32() {
const fn test_tzcnt_u32() {
assert_eq!(_tzcnt_u32(0b0000_0001u32), 0u32);
assert_eq!(_tzcnt_u32(0b0000_0000u32), 32u32);
assert_eq!(_tzcnt_u32(0b1001_0000u32), 4u32);

8
library/stdarch/crates/core_arch/src/x86/bmi2.rs
View file

@ -84,7 +84,7 @@ mod tests {
use crate::core_arch::x86::*;
#[simd_test(enable = "bmi2")]
unsafe fn test_pext_u32() {
fn test_pext_u32() {
let n = 0b1011_1110_1001_0011u32;
let m0 = 0b0110_0011_1000_0101u32;
@ -98,7 +98,7 @@ mod tests {
}
#[simd_test(enable = "bmi2")]
unsafe fn test_pdep_u32() {
fn test_pdep_u32() {
let n = 0b1011_1110_1001_0011u32;
let m0 = 0b0110_0011_1000_0101u32;
@ -112,14 +112,14 @@ mod tests {
}
#[simd_test(enable = "bmi2")]
unsafe fn test_bzhi_u32() {
fn test_bzhi_u32() {
let n = 0b1111_0010u32;
let s = 0b0001_0010u32;
assert_eq!(_bzhi_u32(n, 5), s);
}
#[simd_test(enable = "bmi2")]
const unsafe fn test_mulx_u32() {
const fn test_mulx_u32() {
let a: u32 = 4_294_967_200;
let b: u32 = 2;
let mut hi = 0;

8
library/stdarch/crates/core_arch/src/x86/f16c.rs
View file

@ -119,7 +119,7 @@ mod tests {
const F16_EIGHT: i16 = 0x4800;
#[simd_test(enable = "f16c")]
const unsafe fn test_mm_cvtph_ps() {
const fn test_mm_cvtph_ps() {
let a = _mm_set_epi16(0, 0, 0, 0, F16_ONE, F16_TWO, F16_THREE, F16_FOUR);
let r = _mm_cvtph_ps(a);
let e = _mm_set_ps(1.0, 2.0, 3.0, 4.0);
@ -127,7 +127,7 @@ mod tests {
}
#[simd_test(enable = "f16c")]
const unsafe fn test_mm256_cvtph_ps() {
const fn test_mm256_cvtph_ps() {
let a = _mm_set_epi16(
F16_ONE, F16_TWO, F16_THREE, F16_FOUR, F16_FIVE, F16_SIX, F16_SEVEN, F16_EIGHT,
);
@ -137,7 +137,7 @@ mod tests {
}
#[simd_test(enable = "f16c")]
unsafe fn test_mm_cvtps_ph() {
fn test_mm_cvtps_ph() {
let a = _mm_set_ps(1.0, 2.0, 3.0, 4.0);
let r = _mm_cvtps_ph::<_MM_FROUND_CUR_DIRECTION>(a);
let e = _mm_set_epi16(0, 0, 0, 0, F16_ONE, F16_TWO, F16_THREE, F16_FOUR);
@ -145,7 +145,7 @@ mod tests {
}
#[simd_test(enable = "f16c")]
unsafe fn test_mm256_cvtps_ph() {
fn test_mm256_cvtps_ph() {
let a = _mm256_set_ps(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm256_cvtps_ph::<_MM_FROUND_CUR_DIRECTION>(a);
let e = _mm_set_epi16(

64
library/stdarch/crates/core_arch/src/x86/fma.rs
View file

@ -560,7 +560,7 @@ mod tests {
use crate::core_arch::x86::*;
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fmadd_pd() {
const fn test_mm_fmadd_pd() {
let a = _mm_setr_pd(1., 2.);
let b = _mm_setr_pd(5., 3.);
let c = _mm_setr_pd(4., 9.);
@ -569,7 +569,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm256_fmadd_pd() {
const fn test_mm256_fmadd_pd() {
let a = _mm256_setr_pd(1., 2., 3., 4.);
let b = _mm256_setr_pd(5., 3., 7., 2.);
let c = _mm256_setr_pd(4., 9., 1., 7.);
@ -578,7 +578,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fmadd_ps() {
const fn test_mm_fmadd_ps() {
let a = _mm_setr_ps(1., 2., 3., 4.);
let b = _mm_setr_ps(5., 3., 7., 2.);
let c = _mm_setr_ps(4., 9., 1., 7.);
@ -587,7 +587,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm256_fmadd_ps() {
const fn test_mm256_fmadd_ps() {
let a = _mm256_setr_ps(1., 2., 3., 4., 0., 10., -1., -2.);
let b = _mm256_setr_ps(5., 3., 7., 2., 4., -6., 0., 14.);
let c = _mm256_setr_ps(4., 9., 1., 7., -5., 11., -2., -3.);
@ -596,7 +596,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fmadd_sd() {
const fn test_mm_fmadd_sd() {
let a = _mm_setr_pd(1., 2.);
let b = _mm_setr_pd(5., 3.);
let c = _mm_setr_pd(4., 9.);
@ -605,7 +605,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fmadd_ss() {
const fn test_mm_fmadd_ss() {
let a = _mm_setr_ps(1., 2., 3., 4.);
let b = _mm_setr_ps(5., 3., 7., 2.);
let c = _mm_setr_ps(4., 9., 1., 7.);
@ -614,7 +614,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fmaddsub_pd() {
const fn test_mm_fmaddsub_pd() {
let a = _mm_setr_pd(1., 2.);
let b = _mm_setr_pd(5., 3.);
let c = _mm_setr_pd(4., 9.);
@ -623,7 +623,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm256_fmaddsub_pd() {
const fn test_mm256_fmaddsub_pd() {
let a = _mm256_setr_pd(1., 2., 3., 4.);
let b = _mm256_setr_pd(5., 3., 7., 2.);
let c = _mm256_setr_pd(4., 9., 1., 7.);
@ -632,7 +632,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fmaddsub_ps() {
const fn test_mm_fmaddsub_ps() {
let a = _mm_setr_ps(1., 2., 3., 4.);
let b = _mm_setr_ps(5., 3., 7., 2.);
let c = _mm_setr_ps(4., 9., 1., 7.);
@ -641,7 +641,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm256_fmaddsub_ps() {
const fn test_mm256_fmaddsub_ps() {
let a = _mm256_setr_ps(1., 2., 3., 4., 0., 10., -1., -2.);
let b = _mm256_setr_ps(5., 3., 7., 2., 4., -6., 0., 14.);
let c = _mm256_setr_ps(4., 9., 1., 7., -5., 11., -2., -3.);
@ -650,7 +650,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fmsub_pd() {
const fn test_mm_fmsub_pd() {
let a = _mm_setr_pd(1., 2.);
let b = _mm_setr_pd(5., 3.);
let c = _mm_setr_pd(4., 9.);
@ -659,7 +659,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm256_fmsub_pd() {
const fn test_mm256_fmsub_pd() {
let a = _mm256_setr_pd(1., 2., 3., 4.);
let b = _mm256_setr_pd(5., 3., 7., 2.);
let c = _mm256_setr_pd(4., 9., 1., 7.);
@ -668,7 +668,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fmsub_ps() {
const fn test_mm_fmsub_ps() {
let a = _mm_setr_ps(1., 2., 3., 4.);
let b = _mm_setr_ps(5., 3., 7., 2.);
let c = _mm_setr_ps(4., 9., 1., 7.);
@ -677,7 +677,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm256_fmsub_ps() {
const fn test_mm256_fmsub_ps() {
let a = _mm256_setr_ps(1., 2., 3., 4., 0., 10., -1., -2.);
let b = _mm256_setr_ps(5., 3., 7., 2., 4., -6., 0., 14.);
let c = _mm256_setr_ps(4., 9., 1., 7., -5., 11., -2., -3.);
@ -686,7 +686,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fmsub_sd() {
const fn test_mm_fmsub_sd() {
let a = _mm_setr_pd(1., 2.);
let b = _mm_setr_pd(5., 3.);
let c = _mm_setr_pd(4., 9.);
@ -695,7 +695,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fmsub_ss() {
const fn test_mm_fmsub_ss() {
let a = _mm_setr_ps(1., 2., 3., 4.);
let b = _mm_setr_ps(5., 3., 7., 2.);
let c = _mm_setr_ps(4., 9., 1., 7.);
@ -704,7 +704,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fmsubadd_pd() {
const fn test_mm_fmsubadd_pd() {
let a = _mm_setr_pd(1., 2.);
let b = _mm_setr_pd(5., 3.);
let c = _mm_setr_pd(4., 9.);
@ -713,7 +713,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm256_fmsubadd_pd() {
const fn test_mm256_fmsubadd_pd() {
let a = _mm256_setr_pd(1., 2., 3., 4.);
let b = _mm256_setr_pd(5., 3., 7., 2.);
let c = _mm256_setr_pd(4., 9., 1., 7.);
@ -722,7 +722,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fmsubadd_ps() {
const fn test_mm_fmsubadd_ps() {
let a = _mm_setr_ps(1., 2., 3., 4.);
let b = _mm_setr_ps(5., 3., 7., 2.);
let c = _mm_setr_ps(4., 9., 1., 7.);
@ -731,7 +731,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm256_fmsubadd_ps() {
const fn test_mm256_fmsubadd_ps() {
let a = _mm256_setr_ps(1., 2., 3., 4., 0., 10., -1., -2.);
let b = _mm256_setr_ps(5., 3., 7., 2., 4., -6., 0., 14.);
let c = _mm256_setr_ps(4., 9., 1., 7., -5., 11., -2., -3.);
@ -740,7 +740,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fnmadd_pd() {
const fn test_mm_fnmadd_pd() {
let a = _mm_setr_pd(1., 2.);
let b = _mm_setr_pd(5., 3.);
let c = _mm_setr_pd(4., 9.);
@ -749,7 +749,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm256_fnmadd_pd() {
const fn test_mm256_fnmadd_pd() {
let a = _mm256_setr_pd(1., 2., 3., 4.);
let b = _mm256_setr_pd(5., 3., 7., 2.);
let c = _mm256_setr_pd(4., 9., 1., 7.);
@ -758,7 +758,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fnmadd_ps() {
const fn test_mm_fnmadd_ps() {
let a = _mm_setr_ps(1., 2., 3., 4.);
let b = _mm_setr_ps(5., 3., 7., 2.);
let c = _mm_setr_ps(4., 9., 1., 7.);
@ -767,7 +767,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm256_fnmadd_ps() {
const fn test_mm256_fnmadd_ps() {
let a = _mm256_setr_ps(1., 2., 3., 4., 0., 10., -1., -2.);
let b = _mm256_setr_ps(5., 3., 7., 2., 4., -6., 0., 14.);
let c = _mm256_setr_ps(4., 9., 1., 7., -5., 11., -2., -3.);
@ -776,7 +776,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fnmadd_sd() {
const fn test_mm_fnmadd_sd() {
let a = _mm_setr_pd(1., 2.);
let b = _mm_setr_pd(5., 3.);
let c = _mm_setr_pd(4., 9.);
@ -785,7 +785,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fnmadd_ss() {
const fn test_mm_fnmadd_ss() {
let a = _mm_setr_ps(1., 2., 3., 4.);
let b = _mm_setr_ps(5., 3., 7., 2.);
let c = _mm_setr_ps(4., 9., 1., 7.);
@ -794,7 +794,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fnmsub_pd() {
const fn test_mm_fnmsub_pd() {
let a = _mm_setr_pd(1., 2.);
let b = _mm_setr_pd(5., 3.);
let c = _mm_setr_pd(4., 9.);
@ -803,7 +803,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm256_fnmsub_pd() {
const fn test_mm256_fnmsub_pd() {
let a = _mm256_setr_pd(1., 2., 3., 4.);
let b = _mm256_setr_pd(5., 3., 7., 2.);
let c = _mm256_setr_pd(4., 9., 1., 7.);
@ -812,7 +812,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fnmsub_ps() {
const fn test_mm_fnmsub_ps() {
let a = _mm_setr_ps(1., 2., 3., 4.);
let b = _mm_setr_ps(5., 3., 7., 2.);
let c = _mm_setr_ps(4., 9., 1., 7.);
@ -821,7 +821,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm256_fnmsub_ps() {
const fn test_mm256_fnmsub_ps() {
let a = _mm256_setr_ps(1., 2., 3., 4., 0., 10., -1., -2.);
let b = _mm256_setr_ps(5., 3., 7., 2., 4., -6., 0., 14.);
let c = _mm256_setr_ps(4., 9., 1., 7., -5., 11., -2., -3.);
@ -830,7 +830,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fnmsub_sd() {
const fn test_mm_fnmsub_sd() {
let a = _mm_setr_pd(1., 2.);
let b = _mm_setr_pd(5., 3.);
let c = _mm_setr_pd(4., 9.);
@ -839,7 +839,7 @@ mod tests {
}
#[simd_test(enable = "fma")]
const unsafe fn test_mm_fnmsub_ss() {
const fn test_mm_fnmsub_ss() {
let a = _mm_setr_ps(1., 2., 3., 4.);
let b = _mm_setr_ps(5., 3., 7., 2.);
let c = _mm_setr_ps(4., 9., 1., 7.);

4
library/stdarch/crates/core_arch/src/x86/mod.rs
View file

@ -401,7 +401,7 @@ types! {
}
types! {
#![unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#![stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
/// 128-bit wide set of 8 `f16` types, x86-specific
///
@ -768,7 +768,7 @@ mod avxneconvert;
pub use self::avxneconvert::*;
mod avx512fp16;
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub use self::avx512fp16::*;
mod kl;

2
library/stdarch/crates/core_arch/src/x86/pclmulqdq.rs
View file

@ -45,7 +45,7 @@ mod tests {
use crate::core_arch::x86::*;
#[simd_test(enable = "pclmulqdq")]
unsafe fn test_mm_clmulepi64_si128() {
fn test_mm_clmulepi64_si128() {
// Constants taken from https://software.intel.com/sites/default/files/managed/72/cc/clmul-wp-rev-2.02-2014-04-20.pdf
let a = _mm_set_epi64x(0x7b5b546573745665, 0x63746f725d53475d);
let b = _mm_set_epi64x(0x4869285368617929, 0x5b477565726f6e5d);

90
library/stdarch/crates/core_arch/src/x86/sha.rs
View file

@ -286,7 +286,7 @@ mod tests {
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha1msg1_epu32() {
fn test_mm_sha1msg1_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
let b = _mm_set_epi64x(0xab1c5ed5923f82a4, 0x59f111f13956c25b);
let expected = _mm_set_epi64x(0x98829f34f74ad457, 0xda2b1a44d0b5ad3c);
@ -296,7 +296,7 @@ mod tests {
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha1msg2_epu32() {
fn test_mm_sha1msg2_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
let b = _mm_set_epi64x(0xab1c5ed5923f82a4, 0x59f111f13956c25b);
let expected = _mm_set_epi64x(0xf714b202d863d47d, 0x90c30d946b3d3b35);
@ -306,7 +306,7 @@ mod tests {
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha1nexte_epu32() {
fn test_mm_sha1nexte_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
let b = _mm_set_epi64x(0xab1c5ed5923f82a4, 0x59f111f13956c25b);
let expected = _mm_set_epi64x(0x2589d5be923f82a4, 0x59f111f13956c25b);
@ -316,7 +316,7 @@ mod tests {
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha1rnds4_epu32() {
fn test_mm_sha1rnds4_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
let b = _mm_set_epi64x(0xab1c5ed5923f82a4, 0x59f111f13956c25b);
let expected = _mm_set_epi64x(0x32b13cd8322f5268, 0xc54420862bd9246f);
@ -338,7 +338,7 @@ mod tests {
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha256msg1_epu32() {
fn test_mm_sha256msg1_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
let b = _mm_set_epi64x(0xab1c5ed5923f82a4, 0x59f111f13956c25b);
let expected = _mm_set_epi64x(0xeb84973fd5cda67d, 0x2857b88f406b09ee);
@ -348,7 +348,7 @@ mod tests {
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha256msg2_epu32() {
fn test_mm_sha256msg2_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
let b = _mm_set_epi64x(0xab1c5ed5923f82a4, 0x59f111f13956c25b);
let expected = _mm_set_epi64x(0xb58777ce887fd851, 0x15d1ec8b73ac8450);
@ -358,7 +358,7 @@ mod tests {
#[simd_test(enable = "sha")]
#[allow(overflowing_literals)]
unsafe fn test_mm_sha256rnds2_epu32() {
fn test_mm_sha256rnds2_epu32() {
let a = _mm_set_epi64x(0xe9b5dba5b5c0fbcf, 0x71374491428a2f98);
let b = _mm_set_epi64x(0xab1c5ed5923f82a4, 0x59f111f13956c25b);
let k = _mm_set_epi64x(0, 0x12835b01d807aa98);
@ -381,7 +381,7 @@ mod tests {
];
#[simd_test(enable = "sha512,avx")]
unsafe fn test_mm256_sha512msg1_epi64() {
fn test_mm256_sha512msg1_epi64() {
fn s0(word: u64) -> u64 {
word.rotate_right(1) ^ word.rotate_right(8) ^ (word >> 7)
}
@ -389,8 +389,8 @@ mod tests {
let A = &DATA_64[0..4];
let B = &DATA_64[4..6];
let a = _mm256_loadu_si256(A.as_ptr().cast());
let b = _mm_loadu_si128(B.as_ptr().cast());
let a = unsafe { _mm256_loadu_si256(A.as_ptr().cast()) };
let b = unsafe { _mm_loadu_si128(B.as_ptr().cast()) };
let r = _mm256_sha512msg1_epi64(a, b);
@ -405,7 +405,7 @@ mod tests {
}
#[simd_test(enable = "sha512,avx")]
unsafe fn test_mm256_sha512msg2_epi64() {
fn test_mm256_sha512msg2_epi64() {
fn s1(word: u64) -> u64 {
word.rotate_right(19) ^ word.rotate_right(61) ^ (word >> 6)
}
@ -413,8 +413,8 @@ mod tests {
let A = &DATA_64[0..4];
let B = &DATA_64[4..8];
let a = _mm256_loadu_si256(A.as_ptr().cast());
let b = _mm256_loadu_si256(B.as_ptr().cast());
let a = unsafe { _mm256_loadu_si256(A.as_ptr().cast()) };
let b = unsafe { _mm256_loadu_si256(B.as_ptr().cast()) };
let r = _mm256_sha512msg2_epi64(a, b);
@ -431,7 +431,7 @@ mod tests {
}
#[simd_test(enable = "sha512,avx")]
unsafe fn test_mm256_sha512rnds2_epi64() {
fn test_mm256_sha512rnds2_epi64() {
fn cap_sigma0(word: u64) -> u64 {
word.rotate_right(28) ^ word.rotate_right(34) ^ word.rotate_right(39)
}
@ -452,9 +452,9 @@ mod tests {
let B = &DATA_64[4..8];
let K = &DATA_64[8..10];
let a = _mm256_loadu_si256(A.as_ptr().cast());
let b = _mm256_loadu_si256(B.as_ptr().cast());
let k = _mm_loadu_si128(K.as_ptr().cast());
let a = unsafe { _mm256_loadu_si256(A.as_ptr().cast()) };
let b = unsafe { _mm256_loadu_si256(B.as_ptr().cast()) };
let k = unsafe { _mm_loadu_si128(K.as_ptr().cast()) };
let r = _mm256_sha512rnds2_epi64(a, b, k);
@ -482,7 +482,7 @@ mod tests {
];
#[simd_test(enable = "sm3,avx")]
unsafe fn test_mm_sm3msg1_epi32() {
fn test_mm_sm3msg1_epi32() {
fn p1(x: u32) -> u32 {
x ^ x.rotate_left(15) ^ x.rotate_left(23)
}
@ -490,9 +490,9 @@ mod tests {
let B = &DATA_32[4..8];
let C = &DATA_32[8..12];
let a = _mm_loadu_si128(A.as_ptr().cast());
let b = _mm_loadu_si128(B.as_ptr().cast());
let c = _mm_loadu_si128(C.as_ptr().cast());
let a = unsafe { _mm_loadu_si128(A.as_ptr().cast()) };
let b = unsafe { _mm_loadu_si128(B.as_ptr().cast()) };
let c = unsafe { _mm_loadu_si128(C.as_ptr().cast()) };
let r = _mm_sm3msg1_epi32(a, b, c);
@ -507,14 +507,14 @@ mod tests {
}
#[simd_test(enable = "sm3,avx")]
unsafe fn test_mm_sm3msg2_epi32() {
fn test_mm_sm3msg2_epi32() {
let A = &DATA_32[0..4];
let B = &DATA_32[4..8];
let C = &DATA_32[8..12];
let a = _mm_loadu_si128(A.as_ptr().cast());
let b = _mm_loadu_si128(B.as_ptr().cast());
let c = _mm_loadu_si128(C.as_ptr().cast());
let a = unsafe { _mm_loadu_si128(A.as_ptr().cast()) };
let b = unsafe { _mm_loadu_si128(B.as_ptr().cast()) };
let c = unsafe { _mm_loadu_si128(C.as_ptr().cast()) };
let r = _mm_sm3msg2_epi32(a, b, c);
@ -535,7 +535,7 @@ mod tests {
}
#[simd_test(enable = "sm3,avx")]
unsafe fn test_mm_sm3rnds2_epi32() {
fn test_mm_sm3rnds2_epi32() {
fn p0(x: u32) -> u32 {
x ^ x.rotate_left(9) ^ x.rotate_left(17)
}
@ -560,9 +560,9 @@ mod tests {
let B = &DATA_32[4..8];
let C = &DATA_32[8..12];
let a = _mm_loadu_si128(A.as_ptr().cast());
let b = _mm_loadu_si128(B.as_ptr().cast());
let c = _mm_loadu_si128(C.as_ptr().cast());
let a = unsafe { _mm_loadu_si128(A.as_ptr().cast()) };
let b = unsafe { _mm_loadu_si128(B.as_ptr().cast()) };
let c = unsafe { _mm_loadu_si128(C.as_ptr().cast()) };
let r = _mm_sm3rnds2_epi32::<{ ROUND as i32 }>(a, b, c);
@ -641,7 +641,7 @@ mod tests {
}
#[simd_test(enable = "sm4,avx")]
unsafe fn test_mm_sm4key4_epi32() {
fn test_mm_sm4key4_epi32() {
fn l_key(x: u32) -> u32 {
x ^ x.rotate_left(13) ^ x.rotate_left(23)
}
@ -652,8 +652,8 @@ mod tests {
let A = &DATA_32[0..4];
let B = &DATA_32[4..8];
let a = _mm_loadu_si128(A.as_ptr().cast());
let b = _mm_loadu_si128(B.as_ptr().cast());
let a = unsafe { _mm_loadu_si128(A.as_ptr().cast()) };
let b = unsafe { _mm_loadu_si128(B.as_ptr().cast()) };
let r = _mm_sm4key4_epi32(a, b);
@ -667,11 +667,11 @@ mod tests {
}
#[simd_test(enable = "sm4,avx")]
unsafe fn test_mm256_sm4key4_epi32() {
let a_low = _mm_loadu_si128(DATA_32.as_ptr().cast());
let a_high = _mm_loadu_si128(DATA_32[4..].as_ptr().cast());
let b_low = _mm_loadu_si128(DATA_32[8..].as_ptr().cast());
let b_high = _mm_loadu_si128(DATA_32[12..].as_ptr().cast());
fn test_mm256_sm4key4_epi32() {
let a_low = unsafe { _mm_loadu_si128(DATA_32.as_ptr().cast()) };
let a_high = unsafe { _mm_loadu_si128(DATA_32[4..].as_ptr().cast()) };
let b_low = unsafe { _mm_loadu_si128(DATA_32[8..].as_ptr().cast()) };
let b_high = unsafe { _mm_loadu_si128(DATA_32[12..].as_ptr().cast()) };
let a = _mm256_set_m128i(a_high, a_low);
let b = _mm256_set_m128i(b_high, b_low);
@ -686,7 +686,7 @@ mod tests {
}
#[simd_test(enable = "sm4,avx")]
unsafe fn test_mm_sm4rnds4_epi32() {
fn test_mm_sm4rnds4_epi32() {
fn l_rnd(x: u32) -> u32 {
x ^ x.rotate_left(2) ^ x.rotate_left(10) ^ x.rotate_left(18) ^ x.rotate_left(24)
}
@ -697,8 +697,8 @@ mod tests {
let A = &DATA_32[0..4];
let B = &DATA_32[4..8];
let a = _mm_loadu_si128(A.as_ptr().cast());
let b = _mm_loadu_si128(B.as_ptr().cast());
let a = unsafe { _mm_loadu_si128(A.as_ptr().cast()) };
let b = unsafe { _mm_loadu_si128(B.as_ptr().cast()) };
let r = _mm_sm4rnds4_epi32(a, b);
@ -712,11 +712,11 @@ mod tests {
}
#[simd_test(enable = "sm4,avx")]
unsafe fn test_mm256_sm4rnds4_epi32() {
let a_low = _mm_loadu_si128(DATA_32.as_ptr().cast());
let a_high = _mm_loadu_si128(DATA_32[4..].as_ptr().cast());
let b_low = _mm_loadu_si128(DATA_32[8..].as_ptr().cast());
let b_high = _mm_loadu_si128(DATA_32[12..].as_ptr().cast());
fn test_mm256_sm4rnds4_epi32() {
let a_low = unsafe { _mm_loadu_si128(DATA_32.as_ptr().cast()) };
let a_high = unsafe { _mm_loadu_si128(DATA_32[4..].as_ptr().cast()) };
let b_low = unsafe { _mm_loadu_si128(DATA_32[8..].as_ptr().cast()) };
let b_high = unsafe { _mm_loadu_si128(DATA_32[12..].as_ptr().cast()) };
let a = _mm256_set_m128i(a_high, a_low);
let b = _mm256_set_m128i(b_high, b_low);

92
library/stdarch/crates/core_arch/src/x86/sse.rs
View file

@ -1947,7 +1947,7 @@ pub fn _mm_prefetch<const STRATEGY: i32>(p: *const i8) {
}
}
/// Returns vector of type __m128 with indeterminate elements.with indetermination elements.
/// Returns vector of type __m128 with indeterminate elements.
/// Despite using the word "undefined" (following Intel's naming scheme), this non-deterministically
/// picks some valid value and is not equivalent to [`mem::MaybeUninit`].
/// In practice, this is typically equivalent to [`mem::zeroed`].
@ -2088,7 +2088,7 @@ mod tests {
const NAN: f32 = f32::NAN;
#[simd_test(enable = "sse")]
const unsafe fn test_mm_add_ps() {
const fn test_mm_add_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
let r = _mm_add_ps(a, b);
@ -2096,7 +2096,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_add_ss() {
const fn test_mm_add_ss() {
let a = _mm_set_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_set_ps(-100.0, 20.0, 0.0, -5.0);
let r = _mm_add_ss(a, b);
@ -2104,7 +2104,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_sub_ps() {
const fn test_mm_sub_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
let r = _mm_sub_ps(a, b);
@ -2112,7 +2112,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_sub_ss() {
const fn test_mm_sub_ss() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
let r = _mm_sub_ss(a, b);
@ -2120,7 +2120,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_mul_ps() {
const fn test_mm_mul_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
let r = _mm_mul_ps(a, b);
@ -2128,7 +2128,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_mul_ss() {
const fn test_mm_mul_ss() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
let r = _mm_mul_ss(a, b);
@ -2136,7 +2136,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_div_ps() {
const fn test_mm_div_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 2.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.2, -5.0);
let r = _mm_div_ps(a, b);
@ -2144,7 +2144,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_div_ss() {
const fn test_mm_div_ss() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
let r = _mm_div_ss(a, b);
@ -2152,7 +2152,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_sqrt_ss() {
fn test_mm_sqrt_ss() {
let a = _mm_setr_ps(4.0, 13.0, 16.0, 100.0);
let r = _mm_sqrt_ss(a);
let e = _mm_setr_ps(2.0, 13.0, 16.0, 100.0);
@ -2160,7 +2160,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_sqrt_ps() {
fn test_mm_sqrt_ps() {
let a = _mm_setr_ps(4.0, 13.0, 16.0, 100.0);
let r = _mm_sqrt_ps(a);
let e = _mm_setr_ps(2.0, 3.6055512, 4.0, 10.0);
@ -2168,7 +2168,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_rcp_ss() {
fn test_mm_rcp_ss() {
let a = _mm_setr_ps(4.0, 13.0, 16.0, 100.0);
let r = _mm_rcp_ss(a);
let e = _mm_setr_ps(0.24993896, 13.0, 16.0, 100.0);
@ -2180,7 +2180,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_rcp_ps() {
fn test_mm_rcp_ps() {
let a = _mm_setr_ps(4.0, 13.0, 16.0, 100.0);
let r = _mm_rcp_ps(a);
let e = _mm_setr_ps(0.24993896, 0.0769043, 0.06248474, 0.0099983215);
@ -2191,7 +2191,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_rsqrt_ss() {
fn test_mm_rsqrt_ss() {
let a = _mm_setr_ps(4.0, 13.0, 16.0, 100.0);
let r = _mm_rsqrt_ss(a);
let e = _mm_setr_ps(0.49987793, 13.0, 16.0, 100.0);
@ -2202,7 +2202,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_rsqrt_ps() {
fn test_mm_rsqrt_ps() {
let a = _mm_setr_ps(4.0, 13.0, 16.0, 100.0);
let r = _mm_rsqrt_ps(a);
let e = _mm_setr_ps(0.49987793, 0.2772827, 0.24993896, 0.099990845);
@ -2213,7 +2213,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_min_ss() {
fn test_mm_min_ss() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
let r = _mm_min_ss(a, b);
@ -2244,7 +2244,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_max_ss() {
fn test_mm_max_ss() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
let r = _mm_max_ss(a, b);
@ -2749,7 +2749,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_comieq_ss() {
fn test_mm_comieq_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@ -2770,7 +2770,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_comilt_ss() {
fn test_mm_comilt_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@ -2791,7 +2791,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_comile_ss() {
fn test_mm_comile_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@ -2812,7 +2812,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_comigt_ss() {
fn test_mm_comigt_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@ -2833,7 +2833,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_comineq_ss() {
fn test_mm_comineq_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@ -2854,7 +2854,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_ucomieq_ss() {
fn test_mm_ucomieq_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@ -2875,7 +2875,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_ucomilt_ss() {
fn test_mm_ucomilt_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@ -2896,7 +2896,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_ucomile_ss() {
fn test_mm_ucomile_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@ -2917,7 +2917,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_ucomigt_ss() {
fn test_mm_ucomigt_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@ -2938,7 +2938,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_ucomige_ss() {
fn test_mm_ucomige_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@ -2959,7 +2959,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_ucomineq_ss() {
fn test_mm_ucomineq_ss() {
let aa = &[3.0f32, 12.0, 23.0, NAN];
let bb = &[3.0f32, 47.5, 1.5, NAN];
@ -2980,7 +2980,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_cvtss_si32() {
fn test_mm_cvtss_si32() {
let inputs = &[42.0f32, -3.1, 4.0e10, 4.0e-20, NAN, 2147483500.1];
let result = &[42i32, -3, i32::MIN, 0, i32::MIN, 2147483520];
for i in 0..inputs.len() {
@ -2996,7 +2996,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_cvttss_si32() {
fn test_mm_cvttss_si32() {
let inputs = &[
(42.0f32, 42i32),
(-31.4, -31),
@ -3021,7 +3021,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_cvtsi32_ss() {
const fn test_mm_cvtsi32_ss() {
let a = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
let r = _mm_cvtsi32_ss(a, 4555);
@ -3042,19 +3042,19 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_cvtss_f32() {
const fn test_mm_cvtss_f32() {
let a = _mm_setr_ps(312.0134, 5.0, 6.0, 7.0);
assert_eq!(_mm_cvtss_f32(a), 312.0134);
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_set_ss() {
const fn test_mm_set_ss() {
let r = _mm_set_ss(black_box(4.25));
assert_eq_m128(r, _mm_setr_ps(4.25, 0.0, 0.0, 0.0));
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_set1_ps() {
const fn test_mm_set1_ps() {
let r1 = _mm_set1_ps(black_box(4.25));
let r2 = _mm_set_ps1(black_box(4.25));
assert_eq!(get_m128(r1, 0), 4.25);
@ -3068,7 +3068,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_set_ps() {
const fn test_mm_set_ps() {
let r = _mm_set_ps(
black_box(1.0),
black_box(2.0),
@ -3082,7 +3082,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_setr_ps() {
const fn test_mm_setr_ps() {
let r = _mm_setr_ps(
black_box(1.0),
black_box(2.0),
@ -3093,7 +3093,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_setzero_ps() {
const fn test_mm_setzero_ps() {
let r = *black_box(&_mm_setzero_ps());
assert_eq_m128(r, _mm_set1_ps(0.0));
}
@ -3107,7 +3107,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_shuffle_ps() {
const fn test_mm_shuffle_ps() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
let r = _mm_shuffle_ps::<0b00_01_01_11>(a, b);
@ -3115,7 +3115,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_unpackhi_ps() {
const fn test_mm_unpackhi_ps() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
let r = _mm_unpackhi_ps(a, b);
@ -3123,7 +3123,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_unpacklo_ps() {
const fn test_mm_unpacklo_ps() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
let r = _mm_unpacklo_ps(a, b);
@ -3131,7 +3131,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_movehl_ps() {
const fn test_mm_movehl_ps() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
let r = _mm_movehl_ps(a, b);
@ -3139,7 +3139,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_movelh_ps() {
const fn test_mm_movelh_ps() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
let r = _mm_movelh_ps(a, b);
@ -3266,7 +3266,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_move_ss() {
const fn test_mm_move_ss() {
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
@ -3276,7 +3276,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_movemask_ps() {
const fn test_mm_movemask_ps() {
let r = _mm_movemask_ps(_mm_setr_ps(-1.0, 5.0, -5.0, 0.0));
assert_eq!(r, 0b0101);
@ -3287,12 +3287,12 @@ mod tests {
#[simd_test(enable = "sse")]
// Miri cannot support this until it is clear how it fits in the Rust memory model
#[cfg_attr(miri, ignore)]
unsafe fn test_mm_sfence() {
fn test_mm_sfence() {
_mm_sfence();
}
#[simd_test(enable = "sse")]
const unsafe fn test_MM_TRANSPOSE4_PS() {
const fn test_MM_TRANSPOSE4_PS() {
let mut a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let mut b = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
let mut c = _mm_setr_ps(9.0, 10.0, 11.0, 12.0);

472
library/stdarch/crates/core_arch/src/x86/sse2.rs
View file

File diff suppressed because it is too large Load diff

18
library/stdarch/crates/core_arch/src/x86/sse3.rs
View file

@ -191,7 +191,7 @@ mod tests {
use crate::core_arch::x86::*;
#[simd_test(enable = "sse3")]
const unsafe fn test_mm_addsub_ps() {
const fn test_mm_addsub_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
let r = _mm_addsub_ps(a, b);
@ -199,7 +199,7 @@ mod tests {
}
#[simd_test(enable = "sse3")]
const unsafe fn test_mm_addsub_pd() {
const fn test_mm_addsub_pd() {
let a = _mm_setr_pd(-1.0, 5.0);
let b = _mm_setr_pd(-100.0, 20.0);
let r = _mm_addsub_pd(a, b);
@ -207,7 +207,7 @@ mod tests {
}
#[simd_test(enable = "sse3")]
const unsafe fn test_mm_hadd_pd() {
const fn test_mm_hadd_pd() {
let a = _mm_setr_pd(-1.0, 5.0);
let b = _mm_setr_pd(-100.0, 20.0);
let r = _mm_hadd_pd(a, b);
@ -215,7 +215,7 @@ mod tests {
}
#[simd_test(enable = "sse3")]
const unsafe fn test_mm_hadd_ps() {
const fn test_mm_hadd_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
let r = _mm_hadd_ps(a, b);
@ -223,7 +223,7 @@ mod tests {
}
#[simd_test(enable = "sse3")]
const unsafe fn test_mm_hsub_pd() {
const fn test_mm_hsub_pd() {
let a = _mm_setr_pd(-1.0, 5.0);
let b = _mm_setr_pd(-100.0, 20.0);
let r = _mm_hsub_pd(a, b);
@ -231,7 +231,7 @@ mod tests {
}
#[simd_test(enable = "sse3")]
const unsafe fn test_mm_hsub_ps() {
const fn test_mm_hsub_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let b = _mm_setr_ps(-100.0, 20.0, 0.0, -5.0);
let r = _mm_hsub_ps(a, b);
@ -252,21 +252,21 @@ mod tests {
}
#[simd_test(enable = "sse3")]
const unsafe fn test_mm_movedup_pd() {
const fn test_mm_movedup_pd() {
let a = _mm_setr_pd(-1.0, 5.0);
let r = _mm_movedup_pd(a);
assert_eq_m128d(r, _mm_setr_pd(-1.0, -1.0));
}
#[simd_test(enable = "sse3")]
const unsafe fn test_mm_movehdup_ps() {
const fn test_mm_movehdup_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let r = _mm_movehdup_ps(a);
assert_eq_m128(r, _mm_setr_ps(5.0, 5.0, -10.0, -10.0));
}
#[simd_test(enable = "sse3")]
const unsafe fn test_mm_moveldup_ps() {
const fn test_mm_moveldup_ps() {
let a = _mm_setr_ps(-1.0, 5.0, 0.0, -10.0);
let r = _mm_moveldup_ps(a);
assert_eq_m128(r, _mm_setr_ps(-1.0, -1.0, 0.0, 0.0));

118
library/stdarch/crates/core_arch/src/x86/sse41.rs
View file

@ -1196,7 +1196,7 @@ mod tests {
use stdarch_test::simd_test;
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_blendv_epi8() {
const fn test_mm_blendv_epi8() {
#[rustfmt::skip]
let a = _mm_setr_epi8(
0, 1, 2, 3, 4, 5, 6, 7,
@ -1239,7 +1239,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_blend_pd() {
const fn test_mm_blend_pd() {
let a = _mm_set1_pd(0.0);
let b = _mm_set1_pd(1.0);
let r = _mm_blend_pd::<0b10>(a, b);
@ -1248,7 +1248,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_blend_ps() {
const fn test_mm_blend_ps() {
let a = _mm_set1_ps(0.0);
let b = _mm_set1_ps(1.0);
let r = _mm_blend_ps::<0b1010>(a, b);
@ -1257,7 +1257,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_blend_epi16() {
const fn test_mm_blend_epi16() {
let a = _mm_set1_epi16(0);
let b = _mm_set1_epi16(1);
let r = _mm_blend_epi16::<0b1010_1100>(a, b);
@ -1266,7 +1266,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_extract_ps() {
const fn test_mm_extract_ps() {
let a = _mm_setr_ps(0.0, 1.0, 2.0, 3.0);
let r: f32 = f32::from_bits(_mm_extract_ps::<1>(a) as u32);
assert_eq!(r, 1.0);
@ -1275,7 +1275,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_extract_epi8() {
const fn test_mm_extract_epi8() {
#[rustfmt::skip]
let a = _mm_setr_epi8(
-1, 1, 2, 3, 4, 5, 6, 7,
@ -1288,7 +1288,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_extract_epi32() {
const fn test_mm_extract_epi32() {
let a = _mm_setr_epi32(0, 1, 2, 3);
let r = _mm_extract_epi32::<1>(a);
assert_eq!(r, 1);
@ -1297,7 +1297,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_insert_ps() {
fn test_mm_insert_ps() {
let a = _mm_set1_ps(1.0);
let b = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let r = _mm_insert_ps::<0b11_00_1100>(a, b);
@ -1313,7 +1313,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_insert_epi8() {
const fn test_mm_insert_epi8() {
let a = _mm_set1_epi8(0);
let e = _mm_setr_epi8(0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
let r = _mm_insert_epi8::<1>(a, 32);
@ -1324,7 +1324,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_insert_epi32() {
const fn test_mm_insert_epi32() {
let a = _mm_set1_epi32(0);
let e = _mm_setr_epi32(0, 32, 0, 0);
let r = _mm_insert_epi32::<1>(a, 32);
@ -1335,7 +1335,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_max_epi8() {
const fn test_mm_max_epi8() {
#[rustfmt::skip]
let a = _mm_setr_epi8(
1, 4, 5, 8, 9, 12, 13, 16,
@ -1356,7 +1356,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_max_epu16() {
const fn test_mm_max_epu16() {
let a = _mm_setr_epi16(1, 4, 5, 8, 9, 12, 13, 16);
let b = _mm_setr_epi16(2, 3, 6, 7, 10, 11, 14, 15);
let r = _mm_max_epu16(a, b);
@ -1365,7 +1365,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_max_epi32() {
const fn test_mm_max_epi32() {
let a = _mm_setr_epi32(1, 4, 5, 8);
let b = _mm_setr_epi32(2, 3, 6, 7);
let r = _mm_max_epi32(a, b);
@ -1374,7 +1374,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_max_epu32() {
const fn test_mm_max_epu32() {
let a = _mm_setr_epi32(1, 4, 5, 8);
let b = _mm_setr_epi32(2, 3, 6, 7);
let r = _mm_max_epu32(a, b);
@ -1383,7 +1383,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_min_epi8() {
const fn test_mm_min_epi8() {
#[rustfmt::skip]
let a = _mm_setr_epi8(
1, 4, 5, 8, 9, 12, 13, 16,
@ -1422,7 +1422,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_min_epu16() {
const fn test_mm_min_epu16() {
let a = _mm_setr_epi16(1, 4, 5, 8, 9, 12, 13, 16);
let b = _mm_setr_epi16(2, 3, 6, 7, 10, 11, 14, 15);
let r = _mm_min_epu16(a, b);
@ -1431,7 +1431,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_min_epi32() {
const fn test_mm_min_epi32() {
let a = _mm_setr_epi32(1, 4, 5, 8);
let b = _mm_setr_epi32(2, 3, 6, 7);
let r = _mm_min_epi32(a, b);
@ -1446,7 +1446,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_min_epu32() {
const fn test_mm_min_epu32() {
let a = _mm_setr_epi32(1, 4, 5, 8);
let b = _mm_setr_epi32(2, 3, 6, 7);
let r = _mm_min_epu32(a, b);
@ -1455,7 +1455,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_packus_epi32() {
fn test_mm_packus_epi32() {
let a = _mm_setr_epi32(1, 2, 3, 4);
let b = _mm_setr_epi32(-1, -2, -3, -4);
let r = _mm_packus_epi32(a, b);
@ -1464,7 +1464,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cmpeq_epi64() {
const fn test_mm_cmpeq_epi64() {
let a = _mm_setr_epi64x(0, 1);
let b = _mm_setr_epi64x(0, 0);
let r = _mm_cmpeq_epi64(a, b);
@ -1473,7 +1473,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cvtepi8_epi16() {
const fn test_mm_cvtepi8_epi16() {
let a = _mm_set1_epi8(10);
let r = _mm_cvtepi8_epi16(a);
let e = _mm_set1_epi16(10);
@ -1485,7 +1485,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cvtepi8_epi32() {
const fn test_mm_cvtepi8_epi32() {
let a = _mm_set1_epi8(10);
let r = _mm_cvtepi8_epi32(a);
let e = _mm_set1_epi32(10);
@ -1497,7 +1497,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cvtepi8_epi64() {
const fn test_mm_cvtepi8_epi64() {
let a = _mm_set1_epi8(10);
let r = _mm_cvtepi8_epi64(a);
let e = _mm_set1_epi64x(10);
@ -1509,7 +1509,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cvtepi16_epi32() {
const fn test_mm_cvtepi16_epi32() {
let a = _mm_set1_epi16(10);
let r = _mm_cvtepi16_epi32(a);
let e = _mm_set1_epi32(10);
@ -1521,7 +1521,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cvtepi16_epi64() {
const fn test_mm_cvtepi16_epi64() {
let a = _mm_set1_epi16(10);
let r = _mm_cvtepi16_epi64(a);
let e = _mm_set1_epi64x(10);
@ -1533,7 +1533,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cvtepi32_epi64() {
const fn test_mm_cvtepi32_epi64() {
let a = _mm_set1_epi32(10);
let r = _mm_cvtepi32_epi64(a);
let e = _mm_set1_epi64x(10);
@ -1545,7 +1545,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cvtepu8_epi16() {
const fn test_mm_cvtepu8_epi16() {
let a = _mm_set1_epi8(10);
let r = _mm_cvtepu8_epi16(a);
let e = _mm_set1_epi16(10);
@ -1553,7 +1553,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cvtepu8_epi32() {
const fn test_mm_cvtepu8_epi32() {
let a = _mm_set1_epi8(10);
let r = _mm_cvtepu8_epi32(a);
let e = _mm_set1_epi32(10);
@ -1561,7 +1561,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cvtepu8_epi64() {
const fn test_mm_cvtepu8_epi64() {
let a = _mm_set1_epi8(10);
let r = _mm_cvtepu8_epi64(a);
let e = _mm_set1_epi64x(10);
@ -1569,7 +1569,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cvtepu16_epi32() {
const fn test_mm_cvtepu16_epi32() {
let a = _mm_set1_epi16(10);
let r = _mm_cvtepu16_epi32(a);
let e = _mm_set1_epi32(10);
@ -1577,7 +1577,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cvtepu16_epi64() {
const fn test_mm_cvtepu16_epi64() {
let a = _mm_set1_epi16(10);
let r = _mm_cvtepu16_epi64(a);
let e = _mm_set1_epi64x(10);
@ -1585,7 +1585,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_cvtepu32_epi64() {
const fn test_mm_cvtepu32_epi64() {
let a = _mm_set1_epi32(10);
let r = _mm_cvtepu32_epi64(a);
let e = _mm_set1_epi64x(10);
@ -1593,7 +1593,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_dp_pd() {
fn test_mm_dp_pd() {
let a = _mm_setr_pd(2.0, 3.0);
let b = _mm_setr_pd(1.0, 4.0);
let e = _mm_setr_pd(14.0, 0.0);
@ -1601,7 +1601,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_dp_ps() {
fn test_mm_dp_ps() {
let a = _mm_setr_ps(2.0, 3.0, 1.0, 10.0);
let b = _mm_setr_ps(1.0, 4.0, 0.5, 10.0);
let e = _mm_setr_ps(14.5, 0.0, 14.5, 0.0);
@ -1609,7 +1609,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_floor_pd() {
const fn test_mm_floor_pd() {
let a = _mm_setr_pd(2.5, 4.5);
let r = _mm_floor_pd(a);
let e = _mm_setr_pd(2.0, 4.0);
@ -1617,7 +1617,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_floor_ps() {
const fn test_mm_floor_ps() {
let a = _mm_setr_ps(2.5, 4.5, 8.5, 16.5);
let r = _mm_floor_ps(a);
let e = _mm_setr_ps(2.0, 4.0, 8.0, 16.0);
@ -1625,7 +1625,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_floor_sd() {
fn test_mm_floor_sd() {
let a = _mm_setr_pd(2.5, 4.5);
let b = _mm_setr_pd(-1.5, -3.5);
let r = _mm_floor_sd(a, b);
@ -1634,7 +1634,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_floor_ss() {
fn test_mm_floor_ss() {
let a = _mm_setr_ps(2.5, 4.5, 8.5, 16.5);
let b = _mm_setr_ps(-1.5, -3.5, -7.5, -15.5);
let r = _mm_floor_ss(a, b);
@ -1643,7 +1643,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_ceil_pd() {
const fn test_mm_ceil_pd() {
let a = _mm_setr_pd(1.5, 3.5);
let r = _mm_ceil_pd(a);
let e = _mm_setr_pd(2.0, 4.0);
@ -1651,7 +1651,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_ceil_ps() {
const fn test_mm_ceil_ps() {
let a = _mm_setr_ps(1.5, 3.5, 7.5, 15.5);
let r = _mm_ceil_ps(a);
let e = _mm_setr_ps(2.0, 4.0, 8.0, 16.0);
@ -1659,7 +1659,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_ceil_sd() {
fn test_mm_ceil_sd() {
let a = _mm_setr_pd(1.5, 3.5);
let b = _mm_setr_pd(-2.5, -4.5);
let r = _mm_ceil_sd(a, b);
@ -1668,7 +1668,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_ceil_ss() {
fn test_mm_ceil_ss() {
let a = _mm_setr_ps(1.5, 3.5, 7.5, 15.5);
let b = _mm_setr_ps(-2.5, -4.5, -8.5, -16.5);
let r = _mm_ceil_ss(a, b);
@ -1677,7 +1677,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_round_pd() {
fn test_mm_round_pd() {
let a = _mm_setr_pd(1.25, 3.75);
let r = _mm_round_pd::<_MM_FROUND_TO_NEAREST_INT>(a);
let e = _mm_setr_pd(1.0, 4.0);
@ -1685,7 +1685,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_round_ps() {
fn test_mm_round_ps() {
let a = _mm_setr_ps(2.25, 4.75, -1.75, -4.25);
let r = _mm_round_ps::<_MM_FROUND_TO_ZERO>(a);
let e = _mm_setr_ps(2.0, 4.0, -1.0, -4.0);
@ -1693,7 +1693,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_round_sd() {
fn test_mm_round_sd() {
let a = _mm_setr_pd(1.5, 3.5);
let b = _mm_setr_pd(-2.5, -4.5);
let r = _mm_round_sd::<_MM_FROUND_TO_NEAREST_INT>(a, b);
@ -1720,7 +1720,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_round_ss() {
fn test_mm_round_ss() {
let a = _mm_setr_ps(1.5, 3.5, 7.5, 15.5);
let b = _mm_setr_ps(-1.75, -4.5, -8.5, -16.5);
let r = _mm_round_ss::<_MM_FROUND_TO_NEAREST_INT>(a, b);
@ -1747,7 +1747,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_minpos_epu16_1() {
fn test_mm_minpos_epu16_1() {
let a = _mm_setr_epi16(23, 18, 44, 97, 50, 13, 67, 66);
let r = _mm_minpos_epu16(a);
let e = _mm_setr_epi16(13, 5, 0, 0, 0, 0, 0, 0);
@ -1755,7 +1755,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_minpos_epu16_2() {
fn test_mm_minpos_epu16_2() {
let a = _mm_setr_epi16(0, 18, 44, 97, 50, 13, 67, 66);
let r = _mm_minpos_epu16(a);
let e = _mm_setr_epi16(0, 0, 0, 0, 0, 0, 0, 0);
@ -1763,7 +1763,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_minpos_epu16_3() {
fn test_mm_minpos_epu16_3() {
// Case where the minimum value is repeated
let a = _mm_setr_epi16(23, 18, 44, 97, 50, 13, 67, 13);
let r = _mm_minpos_epu16(a);
@ -1772,7 +1772,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_mul_epi32() {
const fn test_mm_mul_epi32() {
{
let a = _mm_setr_epi32(1, 1, 1, 1);
let b = _mm_setr_epi32(1, 2, 3, 4);
@ -1793,7 +1793,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_mullo_epi32() {
const fn test_mm_mullo_epi32() {
{
let a = _mm_setr_epi32(1, 1, 1, 1);
let b = _mm_setr_epi32(1, 2, 3, 4);
@ -1814,7 +1814,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_minpos_epu16() {
fn test_mm_minpos_epu16() {
let a = _mm_setr_epi16(8, 7, 6, 5, 4, 1, 2, 3);
let r = _mm_minpos_epu16(a);
let e = _mm_setr_epi16(1, 5, 0, 0, 0, 0, 0, 0);
@ -1822,7 +1822,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_mpsadbw_epu8() {
fn test_mm_mpsadbw_epu8() {
#[rustfmt::skip]
let a = _mm_setr_epi8(
0, 1, 2, 3, 4, 5, 6, 7,
@ -1851,7 +1851,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_testz_si128() {
const fn test_mm_testz_si128() {
let a = _mm_set1_epi8(1);
let mask = _mm_set1_epi8(0);
let r = _mm_testz_si128(a, mask);
@ -1867,7 +1867,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_testc_si128() {
const fn test_mm_testc_si128() {
let a = _mm_set1_epi8(-1);
let mask = _mm_set1_epi8(0);
let r = _mm_testc_si128(a, mask);
@ -1883,7 +1883,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_testnzc_si128() {
fn test_mm_testnzc_si128() {
let a = _mm_set1_epi8(0);
let mask = _mm_set1_epi8(1);
let r = _mm_testnzc_si128(a, mask);
@ -1903,7 +1903,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_test_all_zeros() {
const fn test_mm_test_all_zeros() {
let a = _mm_set1_epi8(1);
let mask = _mm_set1_epi8(0);
let r = _mm_test_all_zeros(a, mask);
@ -1919,7 +1919,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_test_all_ones() {
const fn test_mm_test_all_ones() {
let a = _mm_set1_epi8(-1);
let r = _mm_test_all_ones(a);
assert_eq!(r, 1);
@ -1929,7 +1929,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
unsafe fn test_mm_test_mix_ones_zeros() {
fn test_mm_test_mix_ones_zeros() {
let a = _mm_set1_epi8(0);
let mask = _mm_set1_epi8(1);
let r = _mm_test_mix_ones_zeros(a, mask);

49
library/stdarch/crates/core_arch/src/x86/sse42.rs
View file

@ -619,18 +619,17 @@ mod tests {
// Currently one cannot `load` a &[u8] that is less than 16
// in length. This makes loading strings less than 16 in length
// a bit difficult. Rather than `load` and mutate the __m128i,
// it is easier to memcpy the given string to a local slice with
// length 16 and `load` the local slice.
#[target_feature(enable = "sse4.2")]
unsafe fn str_to_m128i(s: &[u8]) -> __m128i {
// it is easier to memcpy the given string to a zero-padded
// 16-byte array and transmute it to `__m128i`.
fn str_to_m128i(s: &[u8]) -> __m128i {
assert!(s.len() <= 16);
let slice = &mut [0u8; 16];
ptr::copy_nonoverlapping(s.as_ptr(), slice.as_mut_ptr(), s.len());
_mm_loadu_si128(slice.as_ptr() as *const _)
let mut array = [0u8; 16];
array[..s.len()].copy_from_slice(s);
unsafe { transmute(array) }
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistrm() {
fn test_mm_cmpistrm() {
let a = str_to_m128i(b"Hello! Good-Bye!");
let b = str_to_m128i(b"hello! good-bye!");
let i = _mm_cmpistrm::<_SIDD_UNIT_MASK>(a, b);
@ -643,7 +642,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistri() {
fn test_mm_cmpistri() {
let a = str_to_m128i(b"Hello");
let b = str_to_m128i(b" Hello ");
let i = _mm_cmpistri::<_SIDD_CMP_EQUAL_ORDERED>(a, b);
@ -651,7 +650,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistrz() {
fn test_mm_cmpistrz() {
let a = str_to_m128i(b"");
let b = str_to_m128i(b"Hello");
let i = _mm_cmpistrz::<_SIDD_CMP_EQUAL_ORDERED>(a, b);
@ -659,7 +658,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistrc() {
fn test_mm_cmpistrc() {
let a = str_to_m128i(b" ");
let b = str_to_m128i(b" ! ");
let i = _mm_cmpistrc::<_SIDD_UNIT_MASK>(a, b);
@ -667,7 +666,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistrs() {
fn test_mm_cmpistrs() {
let a = str_to_m128i(b"Hello");
let b = str_to_m128i(b"");
let i = _mm_cmpistrs::<_SIDD_CMP_EQUAL_ORDERED>(a, b);
@ -675,7 +674,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistro() {
fn test_mm_cmpistro() {
#[rustfmt::skip]
let a_bytes = _mm_setr_epi8(
0x00, 0x47, 0x00, 0x65, 0x00, 0x6c, 0x00, 0x6c,
@ -693,7 +692,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpistra() {
fn test_mm_cmpistra() {
let a = str_to_m128i(b"");
let b = str_to_m128i(b"Hello!!!!!!!!!!!");
let i = _mm_cmpistra::<_SIDD_UNIT_MASK>(a, b);
@ -701,7 +700,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestrm() {
fn test_mm_cmpestrm() {
let a = str_to_m128i(b"Hello!");
let b = str_to_m128i(b"Hello.");
let i = _mm_cmpestrm::<_SIDD_UNIT_MASK>(a, 5, b, 5);
@ -714,7 +713,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestri() {
fn test_mm_cmpestri() {
let a = str_to_m128i(b"bar - garbage");
let b = str_to_m128i(b"foobar");
let i = _mm_cmpestri::<_SIDD_CMP_EQUAL_ORDERED>(a, 3, b, 6);
@ -722,7 +721,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestrz() {
fn test_mm_cmpestrz() {
let a = str_to_m128i(b"");
let b = str_to_m128i(b"Hello");
let i = _mm_cmpestrz::<_SIDD_CMP_EQUAL_ORDERED>(a, 16, b, 6);
@ -730,7 +729,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestrc() {
fn test_mm_cmpestrc() {
let va = str_to_m128i(b"!!!!!!!!");
let vb = str_to_m128i(b" ");
let i = _mm_cmpestrc::<_SIDD_UNIT_MASK>(va, 7, vb, 7);
@ -738,7 +737,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestrs() {
fn test_mm_cmpestrs() {
#[rustfmt::skip]
let a_bytes = _mm_setr_epi8(
0x00, 0x48, 0x00, 0x65, 0x00, 0x6c, 0x00, 0x6c,
@ -751,7 +750,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestro() {
fn test_mm_cmpestro() {
let a = str_to_m128i(b"Hello");
let b = str_to_m128i(b"World");
let i = _mm_cmpestro::<_SIDD_UBYTE_OPS>(a, 5, b, 5);
@ -759,7 +758,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_cmpestra() {
fn test_mm_cmpestra() {
let a = str_to_m128i(b"Cannot match a");
let b = str_to_m128i(b"Null after 14");
let i = _mm_cmpestra::<{ _SIDD_CMP_EQUAL_EACH | _SIDD_UNIT_MASK }>(a, 14, b, 16);
@ -767,7 +766,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_crc32_u8() {
fn test_mm_crc32_u8() {
let crc = 0x2aa1e72b;
let v = 0x2a;
let i = _mm_crc32_u8(crc, v);
@ -775,7 +774,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_crc32_u16() {
fn test_mm_crc32_u16() {
let crc = 0x8ecec3b5;
let v = 0x22b;
let i = _mm_crc32_u16(crc, v);
@ -783,7 +782,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_crc32_u32() {
fn test_mm_crc32_u32() {
let crc = 0xae2912c8;
let v = 0x845fed;
let i = _mm_crc32_u32(crc, v);
@ -791,7 +790,7 @@ mod tests {
}
#[simd_test(enable = "sse4.2")]
const unsafe fn test_mm_cmpgt_epi64() {
const fn test_mm_cmpgt_epi64() {
let a = _mm_setr_epi64x(0, 0x2a);
let b = _mm_set1_epi64x(0x00);
let i = _mm_cmpgt_epi64(a, b);

8
library/stdarch/crates/core_arch/src/x86/sse4a.rs
View file

@ -151,7 +151,7 @@ mod tests {
use stdarch_test::simd_test;
#[simd_test(enable = "sse4a")]
unsafe fn test_mm_extract_si64() {
fn test_mm_extract_si64() {
let b = 0b0110_0000_0000_i64;
// ^^^^ bit range extracted
let x = _mm_setr_epi64x(b, 0);
@ -164,7 +164,7 @@ mod tests {
}
#[simd_test(enable = "sse4a")]
unsafe fn test_mm_extracti_si64() {
fn test_mm_extracti_si64() {
let a = _mm_setr_epi64x(0x0123456789abcdef, 0);
let r = _mm_extracti_si64::<8, 8>(a);
let e = _mm_setr_epi64x(0xcd, 0);
@ -172,7 +172,7 @@ mod tests {
}
#[simd_test(enable = "sse4a")]
unsafe fn test_mm_insert_si64() {
fn test_mm_insert_si64() {
let i = 0b0110_i64;
// ^^^^ bit range inserted
let z = 0b1010_1010_1010i64;
@ -189,7 +189,7 @@ mod tests {
}
#[simd_test(enable = "sse4a")]
unsafe fn test_mm_inserti_si64() {
fn test_mm_inserti_si64() {
let a = _mm_setr_epi64x(0x0123456789abcdef, 0);
let b = _mm_setr_epi64x(0x0011223344556677, 0);
let r = _mm_inserti_si64::<8, 8>(a, b);

32
library/stdarch/crates/core_arch/src/x86/ssse3.rs
View file

@ -367,25 +367,25 @@ mod tests {
use crate::core_arch::x86::*;
#[simd_test(enable = "ssse3")]
const unsafe fn test_mm_abs_epi8() {
const fn test_mm_abs_epi8() {
let r = _mm_abs_epi8(_mm_set1_epi8(-5));
assert_eq_m128i(r, _mm_set1_epi8(5));
}
#[simd_test(enable = "ssse3")]
const unsafe fn test_mm_abs_epi16() {
const fn test_mm_abs_epi16() {
let r = _mm_abs_epi16(_mm_set1_epi16(-5));
assert_eq_m128i(r, _mm_set1_epi16(5));
}
#[simd_test(enable = "ssse3")]
const unsafe fn test_mm_abs_epi32() {
const fn test_mm_abs_epi32() {
let r = _mm_abs_epi32(_mm_set1_epi32(-5));
assert_eq_m128i(r, _mm_set1_epi32(5));
}
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_shuffle_epi8() {
fn test_mm_shuffle_epi8() {
#[rustfmt::skip]
let a = _mm_setr_epi8(
1, 2, 3, 4, 5, 6, 7, 8,
@ -409,7 +409,7 @@ mod tests {
}
#[simd_test(enable = "ssse3")]
const unsafe fn test_mm_alignr_epi8() {
const fn test_mm_alignr_epi8() {
#[rustfmt::skip]
let a = _mm_setr_epi8(
1, 2, 3, 4, 5, 6, 7, 8,
@ -449,7 +449,7 @@ mod tests {
}
#[simd_test(enable = "ssse3")]
const unsafe fn test_mm_hadd_epi16() {
const fn test_mm_hadd_epi16() {
let a = _mm_setr_epi16(1, 2, 3, 4, 5, 6, 7, 8);
let b = _mm_setr_epi16(4, 128, 4, 3, 24, 12, 6, 19);
let expected = _mm_setr_epi16(3, 7, 11, 15, 132, 7, 36, 25);
@ -474,7 +474,7 @@ mod tests {
}
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_hadds_epi16() {
fn test_mm_hadds_epi16() {
let a = _mm_setr_epi16(1, 2, 3, 4, 5, 6, 7, 8);
let b = _mm_setr_epi16(4, 128, 4, 3, 32767, 1, -32768, -1);
let expected = _mm_setr_epi16(3, 7, 11, 15, 132, 7, 32767, -32768);
@ -499,7 +499,7 @@ mod tests {
}
#[simd_test(enable = "ssse3")]
const unsafe fn test_mm_hadd_epi32() {
const fn test_mm_hadd_epi32() {
let a = _mm_setr_epi32(1, 2, 3, 4);
let b = _mm_setr_epi32(4, 128, 4, 3);
let expected = _mm_setr_epi32(3, 7, 132, 7);
@ -515,7 +515,7 @@ mod tests {
}
#[simd_test(enable = "ssse3")]
const unsafe fn test_mm_hsub_epi16() {
const fn test_mm_hsub_epi16() {
let a = _mm_setr_epi16(1, 2, 3, 4, 5, 6, 7, 8);
let b = _mm_setr_epi16(4, 128, 4, 3, 24, 12, 6, 19);
let expected = _mm_setr_epi16(-1, -1, -1, -1, -124, 1, 12, -13);
@ -540,7 +540,7 @@ mod tests {
}
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_hsubs_epi16() {
fn test_mm_hsubs_epi16() {
let a = _mm_setr_epi16(1, 2, 3, 4, 5, 6, 7, 8);
let b = _mm_setr_epi16(4, 128, 4, 3, 32767, -1, -32768, 1);
let expected = _mm_setr_epi16(-1, -1, -1, -1, -124, 1, 32767, -32768);
@ -565,7 +565,7 @@ mod tests {
}
#[simd_test(enable = "ssse3")]
const unsafe fn test_mm_hsub_epi32() {
const fn test_mm_hsub_epi32() {
let a = _mm_setr_epi32(1, 2, 3, 4);
let b = _mm_setr_epi32(4, 128, 4, 3);
let expected = _mm_setr_epi32(-1, -1, -124, 1);
@ -581,7 +581,7 @@ mod tests {
}
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_maddubs_epi16() {
fn test_mm_maddubs_epi16() {
#[rustfmt::skip]
let a = _mm_setr_epi8(
1, 2, 3, 4, 5, 6, 7, 8,
@ -621,7 +621,7 @@ mod tests {
}
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_mulhrs_epi16() {
fn test_mm_mulhrs_epi16() {
let a = _mm_setr_epi16(1, 2, 3, 4, 5, 6, 7, 8);
let b = _mm_setr_epi16(4, 128, 4, 3, 32767, -1, -32768, 1);
let expected = _mm_setr_epi16(0, 0, 0, 0, 5, 0, -7, 0);
@ -637,7 +637,7 @@ mod tests {
}
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_sign_epi8() {
fn test_mm_sign_epi8() {
#[rustfmt::skip]
let a = _mm_setr_epi8(
1, 2, 3, 4, 5, 6, 7, 8,
@ -658,7 +658,7 @@ mod tests {
}
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_sign_epi16() {
fn test_mm_sign_epi16() {
let a = _mm_setr_epi16(1, 2, 3, 4, -5, -6, 7, 8);
let b = _mm_setr_epi16(4, 128, 0, 3, 1, -1, -2, 1);
let expected = _mm_setr_epi16(1, 2, 0, 4, -5, 6, -7, 8);
@ -667,7 +667,7 @@ mod tests {
}
#[simd_test(enable = "ssse3")]
unsafe fn test_mm_sign_epi32() {
fn test_mm_sign_epi32() {
let a = _mm_setr_epi32(-1, 2, 3, 4);
let b = _mm_setr_epi32(1, -1, 1, 0);
let expected = _mm_setr_epi32(-1, -2, 3, 0);

20
library/stdarch/crates/core_arch/src/x86/tbm.rs
View file

@ -154,18 +154,18 @@ mod tests {
use crate::core_arch::x86::*;
#[simd_test(enable = "tbm")]
unsafe fn test_bextri_u32() {
fn test_bextri_u32() {
assert_eq!(_bextri_u32::<0x0404>(0b0101_0000u32), 0b0000_0101u32);
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blcfill_u32() {
const fn test_blcfill_u32() {
assert_eq!(_blcfill_u32(0b0101_0111u32), 0b0101_0000u32);
assert_eq!(_blcfill_u32(0b1111_1111u32), 0u32);
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blci_u32() {
const fn test_blci_u32() {
assert_eq!(
_blci_u32(0b0101_0000u32),
0b1111_1111_1111_1111_1111_1111_1111_1110u32
@ -177,25 +177,25 @@ mod tests {
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blcic_u32() {
const fn test_blcic_u32() {
assert_eq!(_blcic_u32(0b0101_0001u32), 0b0000_0010u32);
assert_eq!(_blcic_u32(0b1111_1111u32), 0b1_0000_0000u32);
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blcmsk_u32() {
const fn test_blcmsk_u32() {
assert_eq!(_blcmsk_u32(0b0101_0001u32), 0b0000_0011u32);
assert_eq!(_blcmsk_u32(0b1111_1111u32), 0b1_1111_1111u32);
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blcs_u32() {
const fn test_blcs_u32() {
assert_eq!(_blcs_u32(0b0101_0001u32), 0b0101_0011u32);
assert_eq!(_blcs_u32(0b1111_1111u32), 0b1_1111_1111u32);
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blsfill_u32() {
const fn test_blsfill_u32() {
assert_eq!(_blsfill_u32(0b0101_0100u32), 0b0101_0111u32);
assert_eq!(
_blsfill_u32(0u32),
@ -204,7 +204,7 @@ mod tests {
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blsic_u32() {
const fn test_blsic_u32() {
assert_eq!(
_blsic_u32(0b0101_0100u32),
0b1111_1111_1111_1111_1111_1111_1111_1011u32
@ -216,7 +216,7 @@ mod tests {
}
#[simd_test(enable = "tbm")]
const unsafe fn test_t1mskc_u32() {
const fn test_t1mskc_u32() {
assert_eq!(
_t1mskc_u32(0b0101_0111u32),
0b1111_1111_1111_1111_1111_1111_1111_1000u32
@ -228,7 +228,7 @@ mod tests {
}
#[simd_test(enable = "tbm")]
const unsafe fn test_tzmsk_u32() {
const fn test_tzmsk_u32() {
assert_eq!(_tzmsk_u32(0b0101_1000u32), 0b0000_0111u32);
assert_eq!(_tzmsk_u32(0b0101_1001u32), 0b0000_0000u32);
}

247
library/stdarch/crates/core_arch/src/x86/test.rs
View file

@ -1,225 +1,122 @@
//! Utilities used in testing the x86 intrinsics
use crate::core_arch::assert_eq_const as assert_eq;
use crate::core_arch::simd::*;
use crate::core_arch::x86::*;
use std::mem::transmute;
#[track_caller]
#[target_feature(enable = "sse2")]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const unsafe fn assert_eq_m128i(a: __m128i, b: __m128i) {
assert_eq!(transmute::<_, [u64; 2]>(a), transmute::<_, [u64; 2]>(b))
}
#[track_caller]
#[target_feature(enable = "avx")]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const unsafe fn assert_eq_m256i(a: __m256i, b: __m256i) {
assert_eq!(transmute::<_, [u64; 4]>(a), transmute::<_, [u64; 4]>(b))
pub(crate) const fn assert_eq_m128i(a: __m128i, b: __m128i) {
assert_eq!(a.as_u32x4(), b.as_u32x4());
}
#[track_caller]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const unsafe fn assert_eq_m512i(a: __m512i, b: __m512i) {
assert_eq!(transmute::<_, [i32; 16]>(a), transmute::<_, [i32; 16]>(b))
pub(crate) const fn assert_eq_m128(a: __m128, b: __m128) {
assert_eq!(a.as_f32x4(), b.as_f32x4());
}
macro_rules! make_ct_rt {
($(
$( #[$meta:meta] )*
$vis:vis unsafe fn $name:ident ($($param:ident : $type:ty),* $(,)?) {
ct: $ct:expr;
rt: $rt:expr;
}
)*) => {$(
$( #[$meta] )*
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
$vis const unsafe fn $name ($($param : $type),*) {
#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
const fn ct($($param : $type),*) {
$ct
}
#[inline(always)]
fn rt($($param : $type),*) {
$rt
}
$crate::intrinsics::const_eval_select(($($param),*), ct, rt)
}
)*}
#[track_caller]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const fn assert_eq_m128d(a: __m128d, b: __m128d) {
assert_eq!(a.as_f64x2(), b.as_f64x2());
}
make_ct_rt! {
// SAFETY: we can use simple float equality because when this should only be used in const
// context where Intel peculiarities don't appear
#[track_caller]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const fn assert_eq_m128h(a: __m128h, b: __m128h) {
assert_eq!(a.as_f16x8(), b.as_f16x8());
}
#[track_caller]
#[target_feature(enable = "sse2")]
pub unsafe fn assert_eq_m128d(a: __m128d, b: __m128d) {
ct: unsafe {
assert_eq!(transmute::<_, [f64; 2]>(a), transmute::<_, [f64; 2]>(b))
};
rt: unsafe {
if _mm_movemask_pd(_mm_cmpeq_pd(a, b)) != 0b11 {
panic!("{:?} != {:?}", a, b);
}
};
}
#[track_caller]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const fn assert_eq_m256i(a: __m256i, b: __m256i) {
assert_eq!(a.as_u32x8(), b.as_u32x8());
}
#[track_caller]
#[target_feature(enable = "sse")]
pub unsafe fn assert_eq_m128(a: __m128, b: __m128) {
ct: unsafe {
assert_eq!(transmute::<_, [f32; 4]>(a), transmute::<_, [f32; 4]>(b))
};
rt: unsafe {
let r = _mm_cmpeq_ps(a, b);
if _mm_movemask_ps(r) != 0b1111 {
panic!("{:?} != {:?}", a, b);
}
};
}
#[track_caller]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const fn assert_eq_m256(a: __m256, b: __m256) {
assert_eq!(a.as_f32x8(), b.as_f32x8());
}
#[track_caller]
#[target_feature(enable = "avx512fp16,avx512vl")]
pub unsafe fn assert_eq_m128h(a: __m128h, b: __m128h) {
ct: unsafe {
assert_eq!(transmute::<_, [f16; 8]>(a), transmute::<_, [f16; 8]>(b))
};
rt: unsafe {
let r = _mm_cmp_ph_mask::<_CMP_EQ_OQ>(a, b);
if r != 0b1111_1111 {
panic!("{:?} != {:?}", a, b);
}
};
}
#[track_caller]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const fn assert_eq_m256d(a: __m256d, b: __m256d) {
assert_eq!(a.as_f64x4(), b.as_f64x4());
}
#[track_caller]
#[target_feature(enable = "avx")]
pub unsafe fn assert_eq_m256d(a: __m256d, b: __m256d) {
ct: unsafe {
assert_eq!(transmute::<_, [f64; 4]>(a), transmute::<_, [f64; 4]>(b))
};
rt: unsafe {
let cmp = _mm256_cmp_pd::<_CMP_EQ_OQ>(a, b);
if _mm256_movemask_pd(cmp) != 0b1111 {
panic!("{:?} != {:?}", a, b);
}
};
}
#[track_caller]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const fn assert_eq_m256h(a: __m256h, b: __m256h) {
assert_eq!(a.as_f16x16(), b.as_f16x16());
}
#[track_caller]
#[target_feature(enable = "avx")]
pub unsafe fn assert_eq_m256(a: __m256, b: __m256) {
ct: unsafe {
assert_eq!(transmute::<_, [f32; 8]>(a), transmute::<_, [f32; 8]>(b))
};
rt: unsafe {
let cmp = _mm256_cmp_ps::<_CMP_EQ_OQ>(a, b);
if _mm256_movemask_ps(cmp) != 0b11111111 {
panic!("{:?} != {:?}", a, b);
}
};
}
#[track_caller]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const fn assert_eq_m512i(a: __m512i, b: __m512i) {
assert_eq!(a.as_i64x8(), b.as_i64x8());
}
#[track_caller]
#[target_feature(enable = "avx512fp16,avx512vl")]
pub unsafe fn assert_eq_m256h(a: __m256h, b: __m256h) {
ct: unsafe {
assert_eq!(transmute::<_, [f16; 16]>(a), transmute::<_, [f16; 16]>(b))
};
rt: unsafe {
let r = _mm256_cmp_ph_mask::<_CMP_EQ_OQ>(a, b);
if r != 0b11111111_11111111 {
panic!("{:?} != {:?}", a, b);
}
};
}
#[track_caller]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const fn assert_eq_m512(a: __m512, b: __m512) {
assert_eq!(a.as_f32x16(), b.as_f32x16());
}
#[track_caller]
#[target_feature(enable = "avx512f")]
pub unsafe fn assert_eq_m512d(a: __m512d, b: __m512d) {
ct: unsafe {
assert_eq!(transmute::<_, [f64; 8]>(a), transmute::<_, [f64; 8]>(b))
};
rt: unsafe {
let cmp = _mm512_cmp_pd_mask::<_CMP_EQ_OQ>(a, b);
if cmp != 0b11111111 {
panic!("{:?} != {:?}", a, b);
}
};
}
#[track_caller]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const fn assert_eq_m512d(a: __m512d, b: __m512d) {
assert_eq!(a.as_f64x8(), b.as_f64x8());
}
#[track_caller]
#[target_feature(enable = "avx512f")]
pub unsafe fn assert_eq_m512(a: __m512, b: __m512) {
ct: unsafe {
assert_eq!(transmute::<_, [f32; 16]>(a), transmute::<_, [f32; 16]>(b))
};
rt: unsafe {
let cmp = _mm512_cmp_ps_mask::<_CMP_EQ_OQ>(a, b);
if cmp != 0b11111111_11111111 {
panic!("{:?} != {:?}", a, b);
}
};
}
#[track_caller]
#[target_feature(enable = "avx512fp16")]
pub unsafe fn assert_eq_m512h(a: __m512h, b: __m512h) {
ct: unsafe {
assert_eq!(transmute::<_, [f16; 32]>(a), transmute::<_, [f16; 32]>(b))
};
rt: unsafe {
let r = _mm512_cmp_ph_mask::<_CMP_EQ_OQ>(a, b);
if r != 0b11111111_11111111_11111111_11111111 {
panic!("{:?} != {:?}", a, b);
}
};
}
#[track_caller]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(crate) const fn assert_eq_m512h(a: __m512h, b: __m512h) {
assert_eq!(a.as_f16x32(), b.as_f16x32());
}
#[target_feature(enable = "sse2")]
pub(crate) const unsafe fn get_m128d(a: __m128d, idx: usize) -> f64 {
transmute::<_, [f64; 2]>(a)[idx]
pub(crate) const fn get_m128d(a: __m128d, idx: usize) -> f64 {
a.as_f64x2().extract(idx)
}
#[target_feature(enable = "sse")]
pub(crate) const unsafe fn get_m128(a: __m128, idx: usize) -> f32 {
transmute::<_, [f32; 4]>(a)[idx]
pub(crate) const fn get_m128(a: __m128, idx: usize) -> f32 {
a.as_f32x4().extract(idx)
}
#[target_feature(enable = "avx")]
pub(crate) const unsafe fn get_m256d(a: __m256d, idx: usize) -> f64 {
transmute::<_, [f64; 4]>(a)[idx]
pub(crate) const fn get_m256d(a: __m256d, idx: usize) -> f64 {
a.as_f64x4().extract(idx)
}
#[target_feature(enable = "avx")]
pub(crate) const unsafe fn get_m256(a: __m256, idx: usize) -> f32 {
transmute::<_, [f32; 8]>(a)[idx]
pub(crate) const fn get_m256(a: __m256, idx: usize) -> f32 {
a.as_f32x8().extract(idx)
}
#[target_feature(enable = "avx512f")]
pub(crate) const unsafe fn get_m512(a: __m512, idx: usize) -> f32 {
transmute::<_, [f32; 16]>(a)[idx]
pub(crate) const fn get_m512(a: __m512, idx: usize) -> f32 {
a.as_f32x16().extract(idx)
}
#[target_feature(enable = "avx512f")]
pub(crate) const unsafe fn get_m512d(a: __m512d, idx: usize) -> f64 {
transmute::<_, [f64; 8]>(a)[idx]
pub(crate) const fn get_m512d(a: __m512d, idx: usize) -> f64 {
a.as_f64x8().extract(idx)
}
#[target_feature(enable = "avx512f")]
pub(crate) const unsafe fn get_m512i(a: __m512i, idx: usize) -> i64 {
transmute::<_, [i64; 8]>(a)[idx]
pub(crate) const fn get_m512i(a: __m512i, idx: usize) -> i64 {
a.as_i64x8().extract(idx)
}
// not actually an intrinsic but useful in various tests as we ported from
// `i64x2::new` which is backwards from `_mm_set_epi64x`
#[target_feature(enable = "sse2")]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub const unsafe fn _mm_setr_epi64x(a: i64, b: i64) -> __m128i {
pub const fn _mm_setr_epi64x(a: i64, b: i64) -> __m128i {
_mm_set_epi64x(b, a)
}
@ -232,17 +129,17 @@ mod x86_polyfill {
#[rustc_legacy_const_generics(2)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub const unsafe fn _mm_insert_epi64<const INDEX: i32>(a: __m128i, val: i64) -> __m128i {
pub const fn _mm_insert_epi64<const INDEX: i32>(a: __m128i, val: i64) -> __m128i {
static_assert_uimm_bits!(INDEX, 1);
transmute(simd_insert!(a.as_i64x2(), INDEX as u32, val))
unsafe { transmute(simd_insert!(a.as_i64x2(), INDEX as u32, val)) }
}
#[target_feature(enable = "avx2")]
#[rustc_legacy_const_generics(2)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub const unsafe fn _mm256_insert_epi64<const INDEX: i32>(a: __m256i, val: i64) -> __m256i {
pub const fn _mm256_insert_epi64<const INDEX: i32>(a: __m256i, val: i64) -> __m256i {
static_assert_uimm_bits!(INDEX, 2);
transmute(simd_insert!(a.as_i64x4(), INDEX as u32, val))
unsafe { transmute(simd_insert!(a.as_i64x4(), INDEX as u32, val)) }
}
}

34
library/stdarch/crates/core_arch/src/x86/vaes.rs
View file

@ -146,9 +146,9 @@ mod tests {
// ideally we'd be using quickcheck here instead
#[target_feature(enable = "avx2")]
unsafe fn helper_for_256_vaes(
linear: unsafe fn(__m128i, __m128i) -> __m128i,
vectorized: unsafe fn(__m256i, __m256i) -> __m256i,
fn helper_for_256_vaes(
linear: fn(__m128i, __m128i) -> __m128i,
vectorized: fn(__m256i, __m256i) -> __m256i,
) {
let a = _mm256_set_epi64x(
0xDCB4DB3657BF0B7D,
@ -178,7 +178,7 @@ mod tests {
}
#[target_feature(enable = "sse2")]
unsafe fn setup_state_key<T>(broadcast: unsafe fn(__m128i) -> T) -> (T, T) {
fn setup_state_key<T>(broadcast: fn(__m128i) -> T) -> (T, T) {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664949.aspx.
let a = _mm_set_epi64x(0x0123456789abcdef, 0x8899aabbccddeeff);
let k = _mm_set_epi64x(0x1133557799bbddff, 0x0022446688aaccee);
@ -186,17 +186,17 @@ mod tests {
}
#[target_feature(enable = "avx2")]
unsafe fn setup_state_key_256() -> (__m256i, __m256i) {
fn setup_state_key_256() -> (__m256i, __m256i) {
setup_state_key(_mm256_broadcastsi128_si256)
}
#[target_feature(enable = "avx512f")]
unsafe fn setup_state_key_512() -> (__m512i, __m512i) {
fn setup_state_key_512() -> (__m512i, __m512i) {
setup_state_key(_mm512_broadcast_i32x4)
}
#[simd_test(enable = "vaes,avx512vl")]
unsafe fn test_mm256_aesdec_epi128() {
fn test_mm256_aesdec_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664949.aspx.
let (a, k) = setup_state_key_256();
let e = _mm_set_epi64x(0x044e4f5176fec48f, 0xb57ecfa381da39ee);
@ -208,7 +208,7 @@ mod tests {
}
#[simd_test(enable = "vaes,avx512vl")]
unsafe fn test_mm256_aesdeclast_epi128() {
fn test_mm256_aesdeclast_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714178.aspx.
let (a, k) = setup_state_key_256();
let e = _mm_set_epi64x(0x36cad57d9072bf9e, 0xf210dd981fa4a493);
@ -220,7 +220,7 @@ mod tests {
}
#[simd_test(enable = "vaes,avx512vl")]
unsafe fn test_mm256_aesenc_epi128() {
fn test_mm256_aesenc_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664810.aspx.
// they are repeated appropriately
let (a, k) = setup_state_key_256();
@ -233,7 +233,7 @@ mod tests {
}
#[simd_test(enable = "vaes,avx512vl")]
unsafe fn test_mm256_aesenclast_epi128() {
fn test_mm256_aesenclast_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714136.aspx.
let (a, k) = setup_state_key_256();
let e = _mm_set_epi64x(0xb6dd7df25d7ab320, 0x4b04f98cf4c860f8);
@ -245,9 +245,9 @@ mod tests {
}
#[target_feature(enable = "avx512f")]
unsafe fn helper_for_512_vaes(
linear: unsafe fn(__m128i, __m128i) -> __m128i,
vectorized: unsafe fn(__m512i, __m512i) -> __m512i,
fn helper_for_512_vaes(
linear: fn(__m128i, __m128i) -> __m128i,
vectorized: fn(__m512i, __m512i) -> __m512i,
) {
let a = _mm512_set_epi64(
0xDCB4DB3657BF0B7D,
@ -291,7 +291,7 @@ mod tests {
}
#[simd_test(enable = "vaes,avx512f")]
unsafe fn test_mm512_aesdec_epi128() {
fn test_mm512_aesdec_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664949.aspx.
let (a, k) = setup_state_key_512();
let e = _mm_set_epi64x(0x044e4f5176fec48f, 0xb57ecfa381da39ee);
@ -303,7 +303,7 @@ mod tests {
}
#[simd_test(enable = "vaes,avx512f")]
unsafe fn test_mm512_aesdeclast_epi128() {
fn test_mm512_aesdeclast_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714178.aspx.
let (a, k) = setup_state_key_512();
let e = _mm_set_epi64x(0x36cad57d9072bf9e, 0xf210dd981fa4a493);
@ -315,7 +315,7 @@ mod tests {
}
#[simd_test(enable = "vaes,avx512f")]
unsafe fn test_mm512_aesenc_epi128() {
fn test_mm512_aesenc_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664810.aspx.
let (a, k) = setup_state_key_512();
let e = _mm_set_epi64x(0x16ab0e57dfc442ed, 0x28e4ee1884504333);
@ -327,7 +327,7 @@ mod tests {
}
#[simd_test(enable = "vaes,avx512f")]
unsafe fn test_mm512_aesenclast_epi128() {
fn test_mm512_aesenclast_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714136.aspx.
let (a, k) = setup_state_key_512();
let e = _mm_set_epi64x(0xb6dd7df25d7ab320, 0x4b04f98cf4c860f8);

16
library/stdarch/crates/core_arch/src/x86/vpclmulqdq.rs
View file

@ -124,9 +124,9 @@ mod tests {
// this function tests one of the possible 4 instances
// with different inputs across lanes
#[target_feature(enable = "vpclmulqdq,avx512f")]
unsafe fn verify_512_helper(
linear: unsafe fn(__m128i, __m128i) -> __m128i,
vectorized: unsafe fn(__m512i, __m512i) -> __m512i,
fn verify_512_helper(
linear: fn(__m128i, __m128i) -> __m128i,
vectorized: fn(__m512i, __m512i) -> __m512i,
) {
let a = _mm512_set_epi64(
0xDCB4DB3657BF0B7D,
@ -165,9 +165,9 @@ mod tests {
// this function tests one of the possible 4 instances
// with different inputs across lanes for the VL version
#[target_feature(enable = "vpclmulqdq,avx512vl")]
unsafe fn verify_256_helper(
linear: unsafe fn(__m128i, __m128i) -> __m128i,
vectorized: unsafe fn(__m256i, __m256i) -> __m256i,
fn verify_256_helper(
linear: fn(__m128i, __m128i) -> __m128i,
vectorized: fn(__m256i, __m256i) -> __m256i,
) {
let a = _mm512_set_epi64(
0xDCB4DB3657BF0B7D,
@ -207,7 +207,7 @@ mod tests {
}
#[simd_test(enable = "vpclmulqdq,avx512f")]
unsafe fn test_mm512_clmulepi64_epi128() {
fn test_mm512_clmulepi64_epi128() {
verify_kat_pclmul!(
_mm512_broadcast_i32x4,
_mm512_clmulepi64_epi128,
@ -233,7 +233,7 @@ mod tests {
}
#[simd_test(enable = "vpclmulqdq,avx512vl")]
unsafe fn test_mm256_clmulepi64_epi128() {
fn test_mm256_clmulepi64_epi128() {
verify_kat_pclmul!(
_mm256_broadcastsi128_si256,
_mm256_clmulepi64_epi128,

4
library/stdarch/crates/core_arch/src/x86_64/abm.rs
View file

@ -54,12 +54,12 @@ mod tests {
use crate::core_arch::arch::x86_64::*;
#[simd_test(enable = "lzcnt")]
const unsafe fn test_lzcnt_u64() {
const fn test_lzcnt_u64() {
assert_eq!(_lzcnt_u64(0b0101_1010), 57);
}
#[simd_test(enable = "popcnt")]
const unsafe fn test_popcnt64() {
const fn test_popcnt64() {
assert_eq!(_popcnt64(0b0101_1010), 4);
}
}

2
library/stdarch/crates/core_arch/src/x86_64/amx.rs
View file

@ -510,7 +510,7 @@ mod tests {
use syscalls::{Sysno, syscall};
#[allow(non_camel_case_types)]
#[repr(packed)]
#[repr(C, packed)]
#[derive(Copy, Clone, Default, Debug, PartialEq)]
struct __tilecfg {
/// 0 `or` 1

4
library/stdarch/crates/core_arch/src/x86_64/avx.rs
View file

@ -52,7 +52,7 @@ mod tests {
use crate::core_arch::arch::x86_64::*;
#[simd_test(enable = "avx")]
const unsafe fn test_mm256_insert_epi64() {
const fn test_mm256_insert_epi64() {
let a = _mm256_setr_epi64x(1, 2, 3, 4);
let r = _mm256_insert_epi64::<3>(a, 0);
let e = _mm256_setr_epi64x(1, 2, 3, 0);
@ -60,7 +60,7 @@ mod tests {
}
#[simd_test(enable = "avx")]
const unsafe fn test_mm256_extract_epi64() {
const fn test_mm256_extract_epi64() {
let a = _mm256_setr_epi64x(0, 1, 2, 3);
let r = _mm256_extract_epi64::<3>(a);
assert_eq!(r, 3);

4
library/stdarch/crates/core_arch/src/x86_64/avx512bw.rs
View file

@ -31,7 +31,7 @@ mod tests {
use crate::core_arch::{x86::*, x86_64::*};
#[simd_test(enable = "avx512bw")]
const unsafe fn test_cvtmask64_u64() {
const fn test_cvtmask64_u64() {
let a: __mmask64 = 0b11001100_00110011_01100110_10011001;
let r = _cvtmask64_u64(a);
let e: u64 = 0b11001100_00110011_01100110_10011001;
@ -39,7 +39,7 @@ mod tests {
}
#[simd_test(enable = "avx512bw")]
const unsafe fn test_cvtu64_mask64() {
const fn test_cvtu64_mask64() {
let a: u64 = 0b11001100_00110011_01100110_10011001;
let r = _cvtu64_mask64(a);
let e: __mmask64 = 0b11001100_00110011_01100110_10011001;

2130
library/stdarch/crates/core_arch/src/x86_64/avx512f.rs
View file

File diff suppressed because it is too large Load diff

48
library/stdarch/crates/core_arch/src/x86_64/avx512fp16.rs
View file

@ -10,7 +10,7 @@ use stdarch_test::assert_instr;
#[inline]
#[target_feature(enable = "avx512fp16")]
#[cfg_attr(test, assert_instr(vcvtsi2sh))]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub fn _mm_cvti64_sh(a: __m128h, b: i64) -> __m128h {
unsafe { vcvtsi642sh(a, b, _MM_FROUND_CUR_DIRECTION) }
}
@ -32,7 +32,7 @@ pub fn _mm_cvti64_sh(a: __m128h, b: i64) -> __m128h {
#[target_feature(enable = "avx512fp16")]
#[cfg_attr(test, assert_instr(vcvtsi2sh, ROUNDING = 8))]
#[rustc_legacy_const_generics(2)]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub fn _mm_cvt_roundi64_sh<const ROUNDING: i32>(a: __m128h, b: i64) -> __m128h {
unsafe {
static_assert_rounding!(ROUNDING);
@ -48,7 +48,7 @@ pub fn _mm_cvt_roundi64_sh<const ROUNDING: i32>(a: __m128h, b: i64) -> __m128h {
#[inline]
#[target_feature(enable = "avx512fp16")]
#[cfg_attr(test, assert_instr(vcvtusi2sh))]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub fn _mm_cvtu64_sh(a: __m128h, b: u64) -> __m128h {
unsafe { vcvtusi642sh(a, b, _MM_FROUND_CUR_DIRECTION) }
}
@ -70,7 +70,7 @@ pub fn _mm_cvtu64_sh(a: __m128h, b: u64) -> __m128h {
#[target_feature(enable = "avx512fp16")]
#[cfg_attr(test, assert_instr(vcvtusi2sh, ROUNDING = 8))]
#[rustc_legacy_const_generics(2)]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub fn _mm_cvt_roundu64_sh<const ROUNDING: i32>(a: __m128h, b: u64) -> __m128h {
unsafe {
static_assert_rounding!(ROUNDING);
@ -85,7 +85,7 @@ pub fn _mm_cvt_roundu64_sh<const ROUNDING: i32>(a: __m128h, b: u64) -> __m128h {
#[inline]
#[target_feature(enable = "avx512fp16")]
#[cfg_attr(test, assert_instr(vcvtsh2si))]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub fn _mm_cvtsh_i64(a: __m128h) -> i64 {
unsafe { vcvtsh2si64(a, _MM_FROUND_CUR_DIRECTION) }
}
@ -106,7 +106,7 @@ pub fn _mm_cvtsh_i64(a: __m128h) -> i64 {
#[target_feature(enable = "avx512fp16")]
#[cfg_attr(test, assert_instr(vcvtsh2si, ROUNDING = 8))]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub fn _mm_cvt_roundsh_i64<const ROUNDING: i32>(a: __m128h) -> i64 {
unsafe {
static_assert_rounding!(ROUNDING);
@ -121,7 +121,7 @@ pub fn _mm_cvt_roundsh_i64<const ROUNDING: i32>(a: __m128h) -> i64 {
#[inline]
#[target_feature(enable = "avx512fp16")]
#[cfg_attr(test, assert_instr(vcvtsh2usi))]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub fn _mm_cvtsh_u64(a: __m128h) -> u64 {
unsafe { vcvtsh2usi64(a, _MM_FROUND_CUR_DIRECTION) }
}
@ -142,7 +142,7 @@ pub fn _mm_cvtsh_u64(a: __m128h) -> u64 {
#[target_feature(enable = "avx512fp16")]
#[cfg_attr(test, assert_instr(vcvtsh2usi, ROUNDING = 8))]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub fn _mm_cvt_roundsh_u64<const ROUNDING: i32>(a: __m128h) -> u64 {
unsafe {
static_assert_rounding!(ROUNDING);
@ -157,7 +157,7 @@ pub fn _mm_cvt_roundsh_u64<const ROUNDING: i32>(a: __m128h) -> u64 {
#[inline]
#[target_feature(enable = "avx512fp16")]
#[cfg_attr(test, assert_instr(vcvttsh2si))]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub fn _mm_cvttsh_i64(a: __m128h) -> i64 {
unsafe { vcvttsh2si64(a, _MM_FROUND_CUR_DIRECTION) }
}
@ -172,7 +172,7 @@ pub fn _mm_cvttsh_i64(a: __m128h) -> i64 {
#[target_feature(enable = "avx512fp16")]
#[cfg_attr(test, assert_instr(vcvttsh2si, SAE = 8))]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub fn _mm_cvtt_roundsh_i64<const SAE: i32>(a: __m128h) -> i64 {
unsafe {
static_assert_sae!(SAE);
@ -187,7 +187,7 @@ pub fn _mm_cvtt_roundsh_i64<const SAE: i32>(a: __m128h) -> i64 {
#[inline]
#[target_feature(enable = "avx512fp16")]
#[cfg_attr(test, assert_instr(vcvttsh2usi))]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub fn _mm_cvttsh_u64(a: __m128h) -> u64 {
unsafe { vcvttsh2usi64(a, _MM_FROUND_CUR_DIRECTION) }
}
@ -202,7 +202,7 @@ pub fn _mm_cvttsh_u64(a: __m128h) -> u64 {
#[target_feature(enable = "avx512fp16")]
#[cfg_attr(test, assert_instr(vcvttsh2usi, SAE = 8))]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub fn _mm_cvtt_roundsh_u64<const SAE: i32>(a: __m128h) -> u64 {
unsafe {
static_assert_sae!(SAE);
@ -232,7 +232,7 @@ mod tests {
use stdarch_test::simd_test;
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm_cvti64_sh() {
fn test_mm_cvti64_sh() {
let a = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm_cvti64_sh(a, 10);
let e = _mm_setr_ph(10.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
@ -240,7 +240,7 @@ mod tests {
}
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm_cvt_roundi64_sh() {
fn test_mm_cvt_roundi64_sh() {
let a = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm_cvt_roundi64_sh::<{ _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC }>(a, 10);
let e = _mm_setr_ph(10.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
@ -248,7 +248,7 @@ mod tests {
}
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm_cvtu64_sh() {
fn test_mm_cvtu64_sh() {
let a = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm_cvtu64_sh(a, 10);
let e = _mm_setr_ph(10.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
@ -256,7 +256,7 @@ mod tests {
}
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm_cvt_roundu64_sh() {
fn test_mm_cvt_roundu64_sh() {
let a = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm_cvt_roundu64_sh::<{ _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC }>(a, 10);
let e = _mm_setr_ph(10.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
@ -264,56 +264,56 @@ mod tests {
}
#[simd_test(enable = "avx512fp16")]
unsafe fn test_mm_cvtsh_i64() {
fn test_mm_cvtsh_i64() {
let a = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm_cvtsh_i64(a);
assert_eq!(r, 1);
}
#[simd_test(enable = "avx512fp16")]
unsafe fn test_mm_cvt_roundsh_i64() {
fn test_mm_cvt_roundsh_i64() {
let a = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm_cvt_roundsh_i64::<{ _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC }>(a);
assert_eq!(r, 1);
}
#[simd_test(enable = "avx512fp16")]
unsafe fn test_mm_cvtsh_u64() {
fn test_mm_cvtsh_u64() {
let a = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm_cvtsh_u64(a);
assert_eq!(r, 1);
}
#[simd_test(enable = "avx512fp16")]
unsafe fn test_mm_cvt_roundsh_u64() {
fn test_mm_cvt_roundsh_u64() {
let a = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm_cvt_roundsh_u64::<{ _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC }>(a);
assert_eq!(r, 1);
}
#[simd_test(enable = "avx512fp16")]
unsafe fn test_mm_cvttsh_i64() {
fn test_mm_cvttsh_i64() {
let a = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm_cvttsh_i64(a);
assert_eq!(r, 1);
}
#[simd_test(enable = "avx512fp16")]
unsafe fn test_mm_cvtt_roundsh_i64() {
fn test_mm_cvtt_roundsh_i64() {
let a = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm_cvtt_roundsh_i64::<{ _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC }>(a);
assert_eq!(r, 1);
}
#[simd_test(enable = "avx512fp16")]
unsafe fn test_mm_cvttsh_u64() {
fn test_mm_cvttsh_u64() {
let a = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm_cvttsh_u64(a);
assert_eq!(r, 1);
}
#[simd_test(enable = "avx512fp16")]
unsafe fn test_mm_cvtt_roundsh_u64() {
fn test_mm_cvtt_roundsh_u64() {
let a = _mm_setr_ph(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
let r = _mm_cvtt_roundsh_u64::<_MM_FROUND_NO_EXC>(a);
assert_eq!(r, 1);

12
library/stdarch/crates/core_arch/src/x86_64/bmi.rs
View file

@ -135,13 +135,13 @@ mod tests {
use crate::core_arch::{x86::*, x86_64::*};
#[simd_test(enable = "bmi1")]
unsafe fn test_bextr_u64() {
fn test_bextr_u64() {
let r = _bextr_u64(0b0101_0000u64, 4, 4);
assert_eq!(r, 0b0000_0101u64);
}
#[simd_test(enable = "bmi1")]
const unsafe fn test_andn_u64() {
const fn test_andn_u64() {
assert_eq!(_andn_u64(0, 0), 0);
assert_eq!(_andn_u64(0, 1), 1);
assert_eq!(_andn_u64(1, 0), 0);
@ -164,25 +164,25 @@ mod tests {
}
#[simd_test(enable = "bmi1")]
const unsafe fn test_blsi_u64() {
const fn test_blsi_u64() {
assert_eq!(_blsi_u64(0b1101_0000u64), 0b0001_0000u64);
}
#[simd_test(enable = "bmi1")]
const unsafe fn test_blsmsk_u64() {
const fn test_blsmsk_u64() {
let r = _blsmsk_u64(0b0011_0000u64);
assert_eq!(r, 0b0001_1111u64);
}
#[simd_test(enable = "bmi1")]
const unsafe fn test_blsr_u64() {
const fn test_blsr_u64() {
// TODO: test the behavior when the input is `0`.
let r = _blsr_u64(0b0011_0000u64);
assert_eq!(r, 0b0010_0000u64);
}
#[simd_test(enable = "bmi1")]
const unsafe fn test_tzcnt_u64() {
const fn test_tzcnt_u64() {
assert_eq!(_tzcnt_u64(0b0000_0001u64), 0u64);
assert_eq!(_tzcnt_u64(0b0000_0000u64), 64u64);
assert_eq!(_tzcnt_u64(0b1001_0000u64), 4u64);

8
library/stdarch/crates/core_arch/src/x86_64/bmi2.rs
View file

@ -86,7 +86,7 @@ mod tests {
use crate::core_arch::x86_64::*;
#[simd_test(enable = "bmi2")]
unsafe fn test_pext_u64() {
fn test_pext_u64() {
let n = 0b1011_1110_1001_0011u64;
let m0 = 0b0110_0011_1000_0101u64;
@ -100,7 +100,7 @@ mod tests {
}
#[simd_test(enable = "bmi2")]
unsafe fn test_pdep_u64() {
fn test_pdep_u64() {
let n = 0b1011_1110_1001_0011u64;
let m0 = 0b0110_0011_1000_0101u64;
@ -114,7 +114,7 @@ mod tests {
}
#[simd_test(enable = "bmi2")]
unsafe fn test_bzhi_u64() {
fn test_bzhi_u64() {
let n = 0b1111_0010u64;
let s = 0b0001_0010u64;
assert_eq!(_bzhi_u64(n, 5), s);
@ -122,7 +122,7 @@ mod tests {
#[simd_test(enable = "bmi2")]
#[rustfmt::skip]
const unsafe fn test_mulx_u64() {
const fn test_mulx_u64() {
let a: u64 = 9_223_372_036_854_775_800;
let b: u64 = 100;
let mut hi = 0;

2
library/stdarch/crates/core_arch/src/x86_64/mod.rs
View file

@ -75,7 +75,7 @@ mod bt;
pub use self::bt::*;
mod avx512fp16;
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
#[stable(feature = "stdarch_x86_avx512fp16", since = "CURRENT_RUSTC_VERSION")]
pub use self::avx512fp16::*;
mod amx;

6
library/stdarch/crates/core_arch/src/x86_64/sse.rs
View file

@ -74,7 +74,7 @@ mod tests {
use stdarch_test::simd_test;
#[simd_test(enable = "sse")]
unsafe fn test_mm_cvtss_si64() {
fn test_mm_cvtss_si64() {
let inputs = &[
(42.0f32, 42i64),
(-31.4, -31),
@ -98,7 +98,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_cvttss_si64() {
fn test_mm_cvttss_si64() {
let inputs = &[
(42.0f32, 42i64),
(-31.4, -31),
@ -125,7 +125,7 @@ mod tests {
}
#[simd_test(enable = "sse")]
const unsafe fn test_mm_cvtsi64_ss() {
const fn test_mm_cvtsi64_ss() {
let a = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
let r = _mm_cvtsi64_ss(a, 4555);

14
library/stdarch/crates/core_arch/src/x86_64/sse2.rs
View file

@ -172,7 +172,7 @@ mod tests {
use stdarch_test::simd_test;
#[simd_test(enable = "sse2")]
unsafe fn test_mm_cvtsd_si64() {
fn test_mm_cvtsd_si64() {
let r = _mm_cvtsd_si64(_mm_setr_pd(-2.0, 5.0));
assert_eq!(r, -2_i64);
@ -181,20 +181,20 @@ mod tests {
}
#[simd_test(enable = "sse2")]
unsafe fn test_mm_cvtsd_si64x() {
fn test_mm_cvtsd_si64x() {
let r = _mm_cvtsd_si64x(_mm_setr_pd(f64::NAN, f64::NAN));
assert_eq!(r, i64::MIN);
}
#[simd_test(enable = "sse2")]
unsafe fn test_mm_cvttsd_si64() {
fn test_mm_cvttsd_si64() {
let a = _mm_setr_pd(-1.1, 2.2);
let r = _mm_cvttsd_si64(a);
assert_eq!(r, -1_i64);
}
#[simd_test(enable = "sse2")]
unsafe fn test_mm_cvttsd_si64x() {
fn test_mm_cvttsd_si64x() {
let a = _mm_setr_pd(f64::NEG_INFINITY, f64::NAN);
let r = _mm_cvttsd_si64x(a);
assert_eq!(r, i64::MIN);
@ -213,19 +213,19 @@ mod tests {
}
#[simd_test(enable = "sse2")]
const unsafe fn test_mm_cvtsi64_si128() {
const fn test_mm_cvtsi64_si128() {
let r = _mm_cvtsi64_si128(5);
assert_eq_m128i(r, _mm_setr_epi64x(5, 0));
}
#[simd_test(enable = "sse2")]
const unsafe fn test_mm_cvtsi128_si64() {
const fn test_mm_cvtsi128_si64() {
let r = _mm_cvtsi128_si64(_mm_setr_epi64x(5, 0));
assert_eq!(r, 5);
}
#[simd_test(enable = "sse2")]
const unsafe fn test_mm_cvtsi64_sd() {
const fn test_mm_cvtsi64_sd() {
let a = _mm_set1_pd(3.5);
let r = _mm_cvtsi64_sd(a, 5);
assert_eq_m128d(r, _mm_setr_pd(5.0, 3.5));

4
library/stdarch/crates/core_arch/src/x86_64/sse41.rs
View file

@ -41,7 +41,7 @@ mod tests {
use stdarch_test::simd_test;
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_extract_epi64() {
const fn test_mm_extract_epi64() {
let a = _mm_setr_epi64x(0, 1);
let r = _mm_extract_epi64::<1>(a);
assert_eq!(r, 1);
@ -50,7 +50,7 @@ mod tests {
}
#[simd_test(enable = "sse4.1")]
const unsafe fn test_mm_insert_epi64() {
const fn test_mm_insert_epi64() {
let a = _mm_set1_epi64x(0);
let e = _mm_setr_epi64x(0, 32);
let r = _mm_insert_epi64::<1>(a, 32);

2
library/stdarch/crates/core_arch/src/x86_64/sse42.rs
View file

@ -28,7 +28,7 @@ mod tests {
use stdarch_test::simd_test;
#[simd_test(enable = "sse4.2")]
unsafe fn test_mm_crc32_u64() {
fn test_mm_crc32_u64() {
let crc = 0x7819dccd3e824;
let v = 0x2a22b845fed;
let i = _mm_crc32_u64(crc, v);

20
library/stdarch/crates/core_arch/src/x86_64/tbm.rs
View file

@ -154,18 +154,18 @@ mod tests {
use crate::core_arch::x86_64::*;
#[simd_test(enable = "tbm")]
unsafe fn test_bextri_u64() {
fn test_bextri_u64() {
assert_eq!(_bextri_u64::<0x0404>(0b0101_0000u64), 0b0000_0101u64);
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blcfill_u64() {
const fn test_blcfill_u64() {
assert_eq!(_blcfill_u64(0b0101_0111u64), 0b0101_0000u64);
assert_eq!(_blcfill_u64(0b1111_1111u64), 0u64);
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blci_u64() {
const fn test_blci_u64() {
assert_eq!(
_blci_u64(0b0101_0000u64),
0b1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1110u64
@ -177,25 +177,25 @@ mod tests {
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blcic_u64() {
const fn test_blcic_u64() {
assert_eq!(_blcic_u64(0b0101_0001u64), 0b0000_0010u64);
assert_eq!(_blcic_u64(0b1111_1111u64), 0b1_0000_0000u64);
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blcmsk_u64() {
const fn test_blcmsk_u64() {
assert_eq!(_blcmsk_u64(0b0101_0001u64), 0b0000_0011u64);
assert_eq!(_blcmsk_u64(0b1111_1111u64), 0b1_1111_1111u64);
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blcs_u64() {
const fn test_blcs_u64() {
assert_eq!(_blcs_u64(0b0101_0001u64), 0b0101_0011u64);
assert_eq!(_blcs_u64(0b1111_1111u64), 0b1_1111_1111u64);
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blsfill_u64() {
const fn test_blsfill_u64() {
assert_eq!(_blsfill_u64(0b0101_0100u64), 0b0101_0111u64);
assert_eq!(
_blsfill_u64(0u64),
@ -204,7 +204,7 @@ mod tests {
}
#[simd_test(enable = "tbm")]
const unsafe fn test_blsic_u64() {
const fn test_blsic_u64() {
assert_eq!(
_blsic_u64(0b0101_0100u64),
0b1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1011u64
@ -216,7 +216,7 @@ mod tests {
}
#[simd_test(enable = "tbm")]
const unsafe fn test_t1mskc_u64() {
const fn test_t1mskc_u64() {
assert_eq!(
_t1mskc_u64(0b0101_0111u64),
0b1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1000u64
@ -228,7 +228,7 @@ mod tests {
}
#[simd_test(enable = "tbm")]
const unsafe fn test_tzmsk_u64() {
const fn test_tzmsk_u64() {
assert_eq!(_tzmsk_u64(0b0101_1000u64), 0b0000_0111u64);
assert_eq!(_tzmsk_u64(0b0101_1001u64), 0b0000_0000u64);
}

120
library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml
View file

@ -13,6 +13,10 @@ auto_llvm_sign_conversion: false
neon-stable: &neon-stable
FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]
# #[stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION")]
neon-stable-fp16: &neon-stable-fp16
FnCall: [stable, ['feature = "stdarch_neon_fp16"', 'since = "CURRENT_RUSTC_VERSION"']]
# #[cfg(not(target_arch = "arm64ec"))]
target-not-arm64ec: &target-not-arm64ec
FnCall: [cfg, [{ FnCall: [not, ['target_arch = "arm64ec"']]}]]
@ -1506,7 +1510,7 @@ intrinsics:
return_type: "{neon_type[0]}"
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtn2]]}]]
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
safety: safe
types:
@ -1523,7 +1527,7 @@ intrinsics:
return_type: "{neon_type[0]}"
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtl2]]}]]
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
safety: safe
types:
@ -1807,7 +1811,7 @@ intrinsics:
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtas]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
safety: safe
types:
@ -1977,7 +1981,7 @@ intrinsics:
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtns]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
safety: safe
types:
@ -1998,7 +2002,7 @@ intrinsics:
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtnu]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
safety: safe
types:
@ -2112,7 +2116,7 @@ intrinsics:
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtms]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
safety: safe
types:
@ -2133,7 +2137,7 @@ intrinsics:
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtmu]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
safety: safe
types:
@ -2328,7 +2332,7 @@ intrinsics:
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtps]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
safety: safe
types:
@ -2349,7 +2353,7 @@ intrinsics:
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtpu]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
safety: safe
types:
@ -3032,7 +3036,7 @@ intrinsics:
return_type: "{neon_type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [frintx]
safety: safe
@ -3081,7 +3085,7 @@ intrinsics:
return_type: "{neon_type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [frinta]
safety: safe
@ -3181,7 +3185,7 @@ intrinsics:
return_type: "{neon_type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [frintm]
safety: safe
@ -3231,7 +3235,7 @@ intrinsics:
return_type: "{neon_type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [frintp]
safety: safe
@ -3277,7 +3281,7 @@ intrinsics:
return_type: "{neon_type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [frintz]
safety: safe
@ -3330,7 +3334,7 @@ intrinsics:
return_type: "{neon_type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [frinti]
safety: safe
@ -5268,7 +5272,7 @@ intrinsics:
return_type: "{neon_type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [fmulx]
safety: safe
@ -5450,7 +5454,7 @@ intrinsics:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fmulx, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['2']]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
static_defs: ["const LANE: i32"]
safety: safe
@ -5651,7 +5655,7 @@ intrinsics:
return_type: "{neon_type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [fdiv]
safety: safe
@ -6000,7 +6004,7 @@ intrinsics:
attr:
- *neon-fp16
- *enable-fcma
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
assert_instr: [fcadd]
safety: safe
@ -6021,7 +6025,7 @@ intrinsics:
attr:
- *neon-fp16
- *enable-fcma
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
assert_instr: [fcadd]
safety: safe
@ -6062,7 +6066,7 @@ intrinsics:
attr:
- FnCall: [target_feature, ['enable = "neon,fcma"']]
- *neon-fp16
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
assert_instr: [fcmla]
safety: safe
@ -6103,7 +6107,7 @@ intrinsics:
attr:
- FnCall: [target_feature, ['enable = "neon,fcma"']]
- *neon-fp16
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
assert_instr: [fcmla]
safety: safe
@ -6145,7 +6149,7 @@ intrinsics:
attr:
- FnCall: [target_feature, ['enable = "neon,fcma"']]
- *neon-fp16
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
assert_instr: [fcmla]
safety: safe
@ -6190,7 +6194,7 @@ intrinsics:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcmla, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-fp16
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
static_defs: ["const LANE: i32"]
safety: safe
@ -6236,7 +6240,7 @@ intrinsics:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcmla, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-fp16
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
static_defs: ["const LANE: i32"]
safety: safe
@ -6282,7 +6286,7 @@ intrinsics:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcmla, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-fp16
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
static_defs: ["const LANE: i32"]
safety: safe
@ -6325,7 +6329,7 @@ intrinsics:
attr:
- FnCall: [target_feature, ['enable = "neon,fcma"']]
- *neon-fp16
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
assert_instr: [fcmla]
safety: safe
@ -6371,7 +6375,7 @@ intrinsics:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcmla, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-fp16
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
static_defs: ["const LANE: i32"]
safety: safe
@ -6419,7 +6423,7 @@ intrinsics:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcmla, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-fp16
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
static_defs: ["const LANE: i32"]
safety: safe
@ -6467,7 +6471,7 @@ intrinsics:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcmla, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-fp16
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
static_defs: ["const LANE: i32"]
safety: safe
@ -6514,7 +6518,7 @@ intrinsics:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcmla, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-fp16
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
static_defs: ["const LANE: i32"]
safety: safe
@ -6558,7 +6562,7 @@ intrinsics:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcmla, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-fp16
- *neon-unstable-f16
- *neon-unstable-fcma
- *target-not-arm64ec
static_defs: ["const LANE: i32"]
safety: safe
@ -6969,7 +6973,7 @@ intrinsics:
return_type: "{type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [faddp]
safety: safe
@ -6989,7 +6993,7 @@ intrinsics:
return_type: "{type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [fmaxp]
safety: safe
@ -7010,7 +7014,7 @@ intrinsics:
return_type: "{type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [fmaxnmp]
safety: safe
@ -7031,7 +7035,7 @@ intrinsics:
return_type: "{type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [fminp]
safety: safe
@ -7052,7 +7056,7 @@ intrinsics:
return_type: "{type}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [fminnmp]
safety: safe
@ -8478,7 +8482,7 @@ intrinsics:
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fsqrt]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
safety: safe
types:
@ -8791,7 +8795,7 @@ intrinsics:
arguments: ["a: {type[0]}"]
return_type: "{type[1]}"
attr:
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [nop]
safety: safe
@ -9691,7 +9695,7 @@ intrinsics:
return_type: "{neon_type[0]}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
- FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]}, {FnCall: [assert_instr, [trn1]]}]]
safety: safe
@ -9753,7 +9757,7 @@ intrinsics:
return_type: "{neon_type[0]}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
- FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]}, {FnCall: [assert_instr, [trn2]]}]]
safety: safe
@ -9822,7 +9826,7 @@ intrinsics:
return_type: "{neon_type[0]}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
- FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]}, {FnCall: [assert_instr, [zip2]]}]]
safety: safe
@ -9873,7 +9877,7 @@ intrinsics:
return_type: "{neon_type[0]}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
- FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]}, {FnCall: [assert_instr, [zip1]]}]]
safety: safe
@ -9935,7 +9939,7 @@ intrinsics:
return_type: "{neon_type[0]}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
- FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]}, {FnCall: [assert_instr, [uzp1]]}]]
safety: safe
@ -10001,7 +10005,7 @@ intrinsics:
return_type: "{neon_type[0]}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
- FnCall: [cfg_attr, [{FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]}, {FnCall: [assert_instr, [uzp2]]}]]
safety: safe
@ -10291,7 +10295,7 @@ intrinsics:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fmla, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
safety: safe
@ -10318,7 +10322,7 @@ intrinsics:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fmls, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
safety: safe
@ -10658,7 +10662,7 @@ intrinsics:
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcmeq]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
safety: safe
types:
@ -11248,7 +11252,7 @@ intrinsics:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fmul, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['2']]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
safety: safe
@ -11862,7 +11866,7 @@ intrinsics:
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtau]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
safety: safe
types:
@ -13770,7 +13774,7 @@ intrinsics:
attr:
- *neon-fp16
- *enable-fhm
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [fmlal2]
safety: safe
@ -13794,7 +13798,7 @@ intrinsics:
- *neon-fp16
- *enable-fhm
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
safety: safe
@ -13819,7 +13823,7 @@ intrinsics:
attr:
- *neon-fp16
- *enable-fhm
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [fmlal]
safety: safe
@ -13843,7 +13847,7 @@ intrinsics:
- *neon-fp16
- *enable-fhm
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
safety: safe
@ -13868,7 +13872,7 @@ intrinsics:
attr:
- *neon-fp16
- *enable-fhm
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [fmlsl2]
safety: safe
@ -13891,7 +13895,7 @@ intrinsics:
- *neon-fp16
- *enable-fhm
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
safety: safe
@ -13916,7 +13920,7 @@ intrinsics:
attr:
- *neon-fp16
- *enable-fhm
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
assert_instr: [fmlsl]
safety: safe
@ -13939,7 +13943,7 @@ intrinsics:
- *neon-fp16
- *enable-fhm
- FnCall: [rustc_legacy_const_generics, ['3']]
- *neon-unstable-f16
- *neon-stable-fp16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
safety: safe

180
library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml
View file

@ -10,6 +10,10 @@ auto_big_endian: true
neon-stable: &neon-stable
FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]
# #[stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION")]
neon-stable-fp16: &neon-stable-fp16
FnCall: [stable, ['feature = "stdarch_neon_fp16"', 'since = "CURRENT_RUSTC_VERSION"']]
# #[cfg_attr(target_arch = "arm", unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800"))]
neon-cfg-arm-unstable: &neon-cfg-arm-unstable
FnCall: ['cfg_attr', ['target_arch = "arm"', {FnCall: ['unstable', ['feature = "stdarch_arm_neon_intrinsics"', 'issue = "111800"']]}]]
@ -51,6 +55,10 @@ neon-target-aarch64-arm64ec: &neon-target-aarch64-arm64ec
neon-not-arm-stable: &neon-not-arm-stable
FnCall: [cfg_attr, [{ FnCall: [not, ['target_arch = "arm"']]}, {FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]}]]
# #[cfg_attr(not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "CURRENT_RUSTC_VERSION"))]
neon-not-arm-stable-fp16: &neon-not-arm-stable-fp16
FnCall: [cfg_attr, [{ FnCall: [not, ['target_arch = "arm"']]}, {FnCall: [stable, ['feature = "stdarch_neon_fp16"', 'since = "CURRENT_RUSTC_VERSION"']]}]]
# #[cfg_attr(all(test, not(target_env = "msvc"))]
msvc-disabled: &msvc-disabled
FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]
@ -285,7 +293,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vabd.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fabd]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -404,7 +413,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vceq.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmeq]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -466,7 +476,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vabs]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fabs]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -566,7 +577,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcgt.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmgt]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -585,7 +597,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcgt.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmgt]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -664,7 +677,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcge.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmge]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -682,7 +696,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcle.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmle]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -864,7 +879,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vacgt.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [facgt]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -911,7 +927,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vacge.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [facge]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -952,7 +969,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vacgt.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [facgt]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -988,7 +1006,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vacge.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [facge]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -1023,7 +1042,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [scvtf]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -1058,7 +1078,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ucvtf]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -1130,7 +1151,8 @@ intrinsics:
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ucvtf, 'N = 1']]}]]
- FnCall: [rustc_legacy_const_generics, ['1']]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
static_defs: ['const N: i32']
safety: safe
@ -1162,7 +1184,8 @@ intrinsics:
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtzs, 'N = 1']]}]]
- FnCall: [rustc_legacy_const_generics, ['1']]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
static_defs: ['const N: i32']
safety: safe
@ -1194,7 +1217,8 @@ intrinsics:
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtzu, 'N = 1']]}]]
- FnCall: [rustc_legacy_const_generics, ['1']]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
static_defs: ['const N: i32']
safety: safe
@ -1253,7 +1277,8 @@ intrinsics:
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [scvtf, 'N = 1']]}]]
- FnCall: [rustc_legacy_const_generics, ['1']]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
static_defs: ['const N: i32']
safety: safe
@ -1507,7 +1532,8 @@ intrinsics:
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 4']]}]]
- FnCall: [rustc_legacy_const_generics, ['1']]
- *arm-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
static_defs: ['const N: i32']
safety: safe
@ -1546,7 +1572,8 @@ intrinsics:
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 2']]}]]
- FnCall: [rustc_legacy_const_generics, ['1']]
- *arm-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
static_defs: ['const N: i32']
safety: safe
@ -1768,7 +1795,8 @@ intrinsics:
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ext, 'N = 3']]}]]
- FnCall: [rustc_legacy_const_generics, ['2']]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
static_defs: ['const N: i32']
safety: safe
@ -1787,7 +1815,8 @@ intrinsics:
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ext, 'N = 7']]}]]
- FnCall: [rustc_legacy_const_generics, ['2']]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
static_defs: ['const N: i32']
safety: safe
@ -2237,7 +2266,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vneg.{type[1]}"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fneg]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -2501,7 +2531,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vrintn]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [frintn]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -6368,7 +6399,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vmul.{type[0]}"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fmul]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -6418,7 +6450,8 @@ intrinsics:
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fmul, 'LANE = 1']]}]]
- FnCall: [rustc_legacy_const_generics, ['2']]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
static_defs: ["const LANE: i32"]
safety: safe
@ -6622,7 +6655,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vfma]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fmla]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -6732,7 +6766,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vsub.{type[0]}"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fsub]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -6751,7 +6786,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vadd.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fadd]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -7253,7 +7289,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vmax]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fmax]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -7296,7 +7333,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vmaxnm]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fmaxnm]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -7315,7 +7353,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vminnm]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fminnm]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -7402,7 +7441,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vmin]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fmin]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -7467,7 +7507,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vpadd]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [faddp]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -8311,7 +8352,8 @@ intrinsics:
- *neon-fp16
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vrsqrts]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [frsqrts]]}]]
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -8360,7 +8402,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vrecpe]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [frecpe]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -8409,7 +8452,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vrecps]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [frecps]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -8742,7 +8786,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -8805,7 +8850,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -8828,7 +8874,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vrev64]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [rev64]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -9144,7 +9191,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]]
- *arm-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -9650,7 +9698,8 @@ intrinsics:
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn1]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn2]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -9806,7 +9855,8 @@ intrinsics:
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip1]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [zip2]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -9877,7 +9927,8 @@ intrinsics:
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp1]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uzp2]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -10456,7 +10507,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcge.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmge]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -10475,7 +10527,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcge.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmge]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -10715,7 +10768,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtzu]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -10735,7 +10789,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtn]]}]]
- *arm-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -10752,7 +10807,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtl]]}]]
- *arm-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -11227,7 +11283,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcgt.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmgt]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -11246,7 +11303,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vclt.f16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmlt]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -11359,7 +11417,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fmls]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -11475,7 +11534,8 @@ intrinsics:
- *neon-fp16
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vrsqrte]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [frsqrte]]}]]
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -11589,7 +11649,8 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtzs]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:
@ -11839,7 +11900,7 @@ intrinsics:
- *enable-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]]
- *neon-fp16
- *neon-unstable-f16
- *neon-arm-unstable
- *target-not-arm64ec
safety:
unsafe: [neon]
@ -13784,7 +13845,7 @@ intrinsics:
- *target-is-arm
- *neon-v7
- *neon-fp16
- *neon-unstable-f16
- *neon-arm-unstable
- *target-not-arm64ec
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vst1.{type[4]}"']]}]]
types:
@ -14060,7 +14121,8 @@ intrinsics:
attr:
- *neon-v7
- *arm-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
assert_instr: [nop]
safety: safe
@ -14076,7 +14138,8 @@ intrinsics:
attr:
- *neon-v7
- *arm-fp16
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
assert_instr: [nop]
safety: safe
@ -14731,7 +14794,8 @@ intrinsics:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, { FnCall: [assert_instr, ['vbsl']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, ['bsl']]}]]
- *neon-unstable-f16
- *neon-not-arm-stable-fp16
- *neon-cfg-arm-unstable
- *target-not-arm64ec
safety: safe
types:

2
library/stdarch/rust-version
View file

@ -1 +1 @@
8401398e1f14a24670ee1a3203713dc2f0f8b3a8
48622726c4a91c87bf6cd4dbe1000c95df59906e

36
src/tools/miri/src/shims/x86/avx2.rs
View file

@ -224,6 +224,42 @@ pub(super) trait EvalContextExt<'tcx>: crate::MiriInterpCxExt<'tcx> {
shift_simd_by_scalar(this, left, right, which, dest)?;
}
// Used to implement the _mm256_madd_epi16 function.
// Multiplies packed signed 16-bit integers in `left` and `right`, producing
// intermediate signed 32-bit integers. Horizontally add adjacent pairs of
// intermediate 32-bit integers, and pack the results in `dest`.
"pmadd.wd" => {
let [left, right] =
this.check_shim_sig_lenient(abi, CanonAbi::C, link_name, args)?;
let (left, left_len) = this.project_to_simd(left)?;
let (right, right_len) = this.project_to_simd(right)?;
let (dest, dest_len) = this.project_to_simd(dest)?;
assert_eq!(left_len, right_len);
assert_eq!(dest_len.strict_mul(2), left_len);
for i in 0..dest_len {
let j1 = i.strict_mul(2);
let left1 = this.read_scalar(&this.project_index(&left, j1)?)?.to_i16()?;
let right1 = this.read_scalar(&this.project_index(&right, j1)?)?.to_i16()?;
let j2 = j1.strict_add(1);
let left2 = this.read_scalar(&this.project_index(&left, j2)?)?.to_i16()?;
let right2 = this.read_scalar(&this.project_index(&right, j2)?)?.to_i16()?;
let dest = this.project_index(&dest, i)?;
// Multiplications are i16*i16->i32, which will not overflow.
let mul1 = i32::from(left1).strict_mul(right1.into());
let mul2 = i32::from(left2).strict_mul(right2.into());
// However, this addition can overflow in the most extreme case
// (-0x8000)*(-0x8000)+(-0x8000)*(-0x8000) = 0x80000000
let res = mul1.wrapping_add(mul2);
this.write_scalar(Scalar::from_i32(res), &dest)?;
}
}
_ => return interp_ok(EmulateItemResult::NotSupported),
}
interp_ok(EmulateItemResult::NeedsReturn)

36
src/tools/miri/src/shims/x86/sse2.rs
View file

@ -278,6 +278,42 @@ pub(super) trait EvalContextExt<'tcx>: crate::MiriInterpCxExt<'tcx> {
this.copy_op(&this.project_index(&left, i)?, &this.project_index(&dest, i)?)?;
}
}
// Used to implement the _mm_madd_epi16 function.
// Multiplies packed signed 16-bit integers in `left` and `right`, producing
// intermediate signed 32-bit integers. Horizontally add adjacent pairs of
// intermediate 32-bit integers, and pack the results in `dest`.
"pmadd.wd" => {
let [left, right] =
this.check_shim_sig_lenient(abi, CanonAbi::C, link_name, args)?;
let (left, left_len) = this.project_to_simd(left)?;
let (right, right_len) = this.project_to_simd(right)?;
let (dest, dest_len) = this.project_to_simd(dest)?;
assert_eq!(left_len, right_len);
assert_eq!(dest_len.strict_mul(2), left_len);
for i in 0..dest_len {
let j1 = i.strict_mul(2);
let left1 = this.read_scalar(&this.project_index(&left, j1)?)?.to_i16()?;
let right1 = this.read_scalar(&this.project_index(&right, j1)?)?.to_i16()?;
let j2 = j1.strict_add(1);
let left2 = this.read_scalar(&this.project_index(&left, j2)?)?.to_i16()?;
let right2 = this.read_scalar(&this.project_index(&right, j2)?)?.to_i16()?;
let dest = this.project_index(&dest, i)?;
// Multiplications are i16*i16->i32, which will not overflow.
let mul1 = i32::from(left1).strict_mul(right1.into());
let mul2 = i32::from(left2).strict_mul(right2.into());
// However, this addition can overflow in the most extreme case
// (-0x8000)*(-0x8000)+(-0x8000)*(-0x8000) = 0x80000000
let res = mul1.wrapping_add(mul2);
this.write_scalar(Scalar::from_i32(res), &dest)?;
}
}
_ => return interp_ok(EmulateItemResult::NotSupported),
}
interp_ok(EmulateItemResult::NeedsReturn)