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convert _mm256_i64gather_ps to const generics

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Rémy Rakic 2021-03-06 01:37:49 +01:00 • committed by Amanieu d'Antras
parent 26fb95c7c7
commit 80bb4ab06b
1 changed files with 6 additions and 10 deletions
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16
library/stdarch/crates/core_arch/src/x86/avx2.rs
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@ -1592,20 +1592,16 @@ pub unsafe fn _mm_mask_i64gather_ps<const SCALE: i32>(
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_i64gather_ps)
#[inline]
#[target_feature(enable = "avx2")]
#[cfg_attr(test, assert_instr(vgatherqps, scale = 1))]
#[rustc_args_required_const(2)]
#[cfg_attr(test, assert_instr(vgatherqps, SCALE = 1))]
#[rustc_legacy_const_generics(2)]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_i64gather_ps(slice: *const f32, offsets: __m256i, scale: i32) -> __m128 {
pub unsafe fn _mm256_i64gather_ps<const SCALE: i32>(slice: *const f32, offsets: __m256i) -> __m128 {
static_assert_imm8_scale!(SCALE);
let zero = _mm_setzero_ps();
let neg_one = _mm_set1_ps(-1.0);
let offsets = offsets.as_i64x4();
let slice = slice as *const i8;
macro_rules! call {
($imm8:expr) => {
vpgatherqps(zero, slice, offsets, neg_one, $imm8)
};
}
constify_imm8_gather!(scale, call)
vpgatherqps(zero, slice, offsets, neg_one, SCALE as i8)
}
/// Returns values from `slice` at offsets determined by `offsets * scale`,
@ -5819,7 +5815,7 @@ mod tests {
j += 1.0;
}
// A multiplier of 4 is word-addressing for f32s
let r = _mm256_i64gather_ps(arr.as_ptr(), _mm256_setr_epi64x(0, 16, 32, 48), 4);
let r = _mm256_i64gather_ps::<4>(arr.as_ptr(), _mm256_setr_epi64x(0, 16, 32, 48));
assert_eq_m128(r, _mm_setr_ps(0.0, 16.0, 32.0, 48.0));
}