Merge pull request #77 from rust-lang/reorg-vectors

Reorg vector types (nfc)
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Jubilee 2021-02-21 17:35:29 -08:00 committed by GitHub
commit 8ad4f14372
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21 changed files with 460 additions and 460 deletions

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@ -1,31 +1,3 @@
/// Provides implementations of `From<$a> for $b` and `From<$b> for $a` that transmutes the value.
macro_rules! from_transmute {
{ unsafe $a:ty => $b:ty } => {
from_transmute!{ @impl $a => $b }
from_transmute!{ @impl $b => $a }
};
{ @impl $from:ty => $to:ty } => {
impl core::convert::From<$from> for $to {
#[inline]
fn from(value: $from) -> $to {
unsafe { core::mem::transmute(value) }
}
}
};
}
/// Provides implementations of `From<$generic> for core::arch::{x86, x86_64}::$intel` and
/// vice-versa that transmutes the value.
macro_rules! from_transmute_x86 {
{ unsafe $generic:ty => $intel:ident } => {
#[cfg(target_arch = "x86")]
from_transmute! { unsafe $generic => core::arch::x86::$intel }
#[cfg(target_arch = "x86_64")]
from_transmute! { unsafe $generic => core::arch::x86_64::$intel }
}
}
/// Implements common traits on the specified vector `$name`, holding multiple `$lanes` of `$type`.
macro_rules! impl_vector {
{ $name:ident, $type:ty } => {
@ -150,69 +122,3 @@ macro_rules! impl_vector {
impl_shuffle_2pow_lanes!{ $name }
}
}
/// Implements additional integer traits (Eq, Ord, Hash) on the specified vector `$name`, holding multiple `$lanes` of `$type`.
macro_rules! impl_integer_vector {
{ $name:ident, $type:ty } => {
impl_vector! { $name, $type }
impl<const LANES: usize> Eq for $name<LANES> where Self: crate::LanesAtMost64 {}
impl<const LANES: usize> Ord for $name<LANES> where Self: crate::LanesAtMost64 {
#[inline]
fn cmp(&self, other: &Self) -> core::cmp::Ordering {
// TODO use SIMD cmp
self.to_array().cmp(other.as_ref())
}
}
impl<const LANES: usize> core::hash::Hash for $name<LANES> where Self: crate::LanesAtMost64 {
#[inline]
fn hash<H>(&self, state: &mut H)
where
H: core::hash::Hasher
{
self.as_slice().hash(state)
}
}
}
}
/// Implements inherent methods for a float vector `$name` containing multiple
/// `$lanes` of float `$type`, which uses `$bits_ty` as its binary
/// representation. Called from `define_float_vector!`.
macro_rules! impl_float_vector {
{ $name:ident, $type:ty, $bits_ty:ident } => {
impl_vector! { $name, $type }
impl<const LANES: usize> $name<LANES>
where
Self: crate::LanesAtMost64,
crate::$bits_ty<LANES>: crate::LanesAtMost64,
{
/// Raw transmutation to an unsigned integer vector type with the
/// same size and number of lanes.
#[inline]
pub fn to_bits(self) -> crate::$bits_ty<LANES> {
assert_eq!(core::mem::size_of::<Self>(), core::mem::size_of::<crate::$bits_ty<LANES>>());
unsafe { core::mem::transmute_copy(&self) }
}
/// Raw transmutation from an unsigned integer vector type with the
/// same size and number of lanes.
#[inline]
pub fn from_bits(bits: crate::$bits_ty<LANES>) -> Self {
assert_eq!(core::mem::size_of::<Self>(), core::mem::size_of::<crate::$bits_ty<LANES>>());
unsafe { core::mem::transmute_copy(&bits) }
}
/// Produces a vector where every lane has the absolute value of the
/// equivalently-indexed lane in `self`.
#[inline]
pub fn abs(self) -> Self {
let no_sign = crate::$bits_ty::splat(!0 >> 1);
Self::from_bits(self.to_bits() & no_sign)
}
}
};
}

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@ -5,9 +5,11 @@
//! Portable SIMD module.
#[macro_use]
mod macros;
mod first;
#[macro_use]
mod permute;
#[macro_use]
mod transmute;
mod fmt;
mod intrinsics;
@ -20,33 +22,5 @@ pub use lanes_at_most_64::LanesAtMost64;
mod masks;
pub use masks::*;
mod vectors_u8;
pub use vectors_u8::*;
mod vectors_u16;
pub use vectors_u16::*;
mod vectors_u32;
pub use vectors_u32::*;
mod vectors_u64;
pub use vectors_u64::*;
mod vectors_u128;
pub use vectors_u128::*;
mod vectors_usize;
pub use vectors_usize::*;
mod vectors_i8;
pub use vectors_i8::*;
mod vectors_i16;
pub use vectors_i16::*;
mod vectors_i32;
pub use vectors_i32::*;
mod vectors_i64;
pub use vectors_i64::*;
mod vectors_i128;
pub use vectors_i128::*;
mod vectors_isize;
pub use vectors_isize::*;
mod vectors_f32;
pub use vectors_f32::*;
mod vectors_f64;
pub use vectors_f64::*;
mod vector;
pub use vector::*;

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@ -0,0 +1,27 @@
/// Provides implementations of `From<$a> for $b` and `From<$b> for $a` that transmutes the value.
macro_rules! from_transmute {
{ unsafe $a:ty => $b:ty } => {
from_transmute!{ @impl $a => $b }
from_transmute!{ @impl $b => $a }
};
{ @impl $from:ty => $to:ty } => {
impl core::convert::From<$from> for $to {
#[inline]
fn from(value: $from) -> $to {
unsafe { core::mem::transmute(value) }
}
}
};
}
/// Provides implementations of `From<$generic> for core::arch::{x86, x86_64}::$intel` and
/// vice-versa that transmutes the value.
macro_rules! from_transmute_x86 {
{ unsafe $generic:ty => $intel:ident } => {
#[cfg(target_arch = "x86")]
from_transmute! { unsafe $generic => core::arch::x86::$intel }
#[cfg(target_arch = "x86_64")]
from_transmute! { unsafe $generic => core::arch::x86_64::$intel }
}
}

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@ -0,0 +1,7 @@
mod float;
mod int;
mod uint;
pub use float::*;
pub use int::*;
pub use uint::*;

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@ -0,0 +1,86 @@
#![allow(non_camel_case_types)]
/// Implements inherent methods for a float vector `$name` containing multiple
/// `$lanes` of float `$type`, which uses `$bits_ty` as its binary
/// representation. Called from `define_float_vector!`.
macro_rules! impl_float_vector {
{ $name:ident, $type:ty, $bits_ty:ident } => {
impl_vector! { $name, $type }
impl<const LANES: usize> $name<LANES>
where
Self: crate::LanesAtMost64,
crate::$bits_ty<LANES>: crate::LanesAtMost64,
{
/// Raw transmutation to an unsigned integer vector type with the
/// same size and number of lanes.
#[inline]
pub fn to_bits(self) -> crate::$bits_ty<LANES> {
assert_eq!(core::mem::size_of::<Self>(), core::mem::size_of::<crate::$bits_ty<LANES>>());
unsafe { core::mem::transmute_copy(&self) }
}
/// Raw transmutation from an unsigned integer vector type with the
/// same size and number of lanes.
#[inline]
pub fn from_bits(bits: crate::$bits_ty<LANES>) -> Self {
assert_eq!(core::mem::size_of::<Self>(), core::mem::size_of::<crate::$bits_ty<LANES>>());
unsafe { core::mem::transmute_copy(&bits) }
}
/// Produces a vector where every lane has the absolute value of the
/// equivalently-indexed lane in `self`.
#[inline]
pub fn abs(self) -> Self {
let no_sign = crate::$bits_ty::splat(!0 >> 1);
Self::from_bits(self.to_bits() & no_sign)
}
}
};
}
/// A SIMD vector of containing `LANES` `f32` values.
#[repr(simd)]
pub struct SimdF32<const LANES: usize>([f32; LANES])
where
Self: crate::LanesAtMost64;
impl_float_vector! { SimdF32, f32, SimdU32 }
from_transmute_x86! { unsafe f32x4 => __m128 }
from_transmute_x86! { unsafe f32x8 => __m256 }
//from_transmute_x86! { unsafe f32x16 => __m512 }
/// A SIMD vector of containing `LANES` `f64` values.
#[repr(simd)]
pub struct SimdF64<const LANES: usize>([f64; LANES])
where
Self: crate::LanesAtMost64;
impl_float_vector! { SimdF64, f64, SimdU64 }
from_transmute_x86! { unsafe f64x2 => __m128d }
from_transmute_x86! { unsafe f64x4 => __m256d }
//from_transmute_x86! { unsafe f64x8 => __m512d }
/// Vector of two `f32` values
pub type f32x2 = SimdF32<2>;
/// Vector of four `f32` values
pub type f32x4 = SimdF32<4>;
/// Vector of eight `f32` values
pub type f32x8 = SimdF32<8>;
/// Vector of 16 `f32` values
pub type f32x16 = SimdF32<16>;
/// Vector of two `f64` values
pub type f64x2 = SimdF64<2>;
/// Vector of four `f64` values
pub type f64x4 = SimdF64<4>;
/// Vector of eight `f64` values
pub type f64x8 = SimdF64<8>;

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@ -0,0 +1,167 @@
#![allow(non_camel_case_types)]
/// Implements additional integer traits (Eq, Ord, Hash) on the specified vector `$name`, holding multiple `$lanes` of `$type`.
macro_rules! impl_integer_vector {
{ $name:ident, $type:ty } => {
impl_vector! { $name, $type }
impl<const LANES: usize> Eq for $name<LANES> where Self: crate::LanesAtMost64 {}
impl<const LANES: usize> Ord for $name<LANES> where Self: crate::LanesAtMost64 {
#[inline]
fn cmp(&self, other: &Self) -> core::cmp::Ordering {
// TODO use SIMD cmp
self.to_array().cmp(other.as_ref())
}
}
impl<const LANES: usize> core::hash::Hash for $name<LANES> where Self: crate::LanesAtMost64 {
#[inline]
fn hash<H>(&self, state: &mut H)
where
H: core::hash::Hasher
{
self.as_slice().hash(state)
}
}
}
}
/// A SIMD vector of containing `LANES` `isize` values.
#[repr(simd)]
pub struct SimdIsize<const LANES: usize>([isize; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdIsize, isize }
#[cfg(target_pointer_width = "32")]
from_transmute_x86! { unsafe isizex4 => __m128i }
#[cfg(target_pointer_width = "32")]
from_transmute_x86! { unsafe isizex8 => __m256i }
#[cfg(target_pointer_width = "64")]
from_transmute_x86! { unsafe isizex2 => __m128i }
#[cfg(target_pointer_width = "64")]
from_transmute_x86! { unsafe isizex4 => __m256i }
//#[cfg(target_pointer_width = "64")]
//from_transmute_x86! { unsafe isizex8 => __m512i }
/// A SIMD vector of containing `LANES` `i128` values.
#[repr(simd)]
pub struct SimdI128<const LANES: usize>([i128; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdI128, i128 }
from_transmute_x86! { unsafe i128x2 => __m256i }
//from_transmute_x86! { unsafe i128x4 => __m512i }
/// A SIMD vector of containing `LANES` `i16` values.
#[repr(simd)]
pub struct SimdI16<const LANES: usize>([i16; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdI16, i16 }
from_transmute_x86! { unsafe i16x8 => __m128i }
from_transmute_x86! { unsafe i16x16 => __m256i }
//from_transmute_x86! { unsafe i16x32 => __m512i }
/// A SIMD vector of containing `LANES` `i32` values.
#[repr(simd)]
pub struct SimdI32<const LANES: usize>([i32; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdI32, i32 }
from_transmute_x86! { unsafe i32x4 => __m128i }
from_transmute_x86! { unsafe i32x8 => __m256i }
//from_transmute_x86! { unsafe i32x16 => __m512i }
/// A SIMD vector of containing `LANES` `i64` values.
#[repr(simd)]
pub struct SimdI64<const LANES: usize>([i64; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdI64, i64 }
from_transmute_x86! { unsafe i64x2 => __m128i }
from_transmute_x86! { unsafe i64x4 => __m256i }
//from_transmute_x86! { unsafe i64x8 => __m512i }
/// A SIMD vector of containing `LANES` `i8` values.
#[repr(simd)]
pub struct SimdI8<const LANES: usize>([i8; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdI8, i8 }
from_transmute_x86! { unsafe i8x16 => __m128i }
from_transmute_x86! { unsafe i8x32 => __m256i }
//from_transmute_x86! { unsafe i8x64 => __m512i }
/// Vector of two `isize` values
pub type isizex2 = SimdIsize<2>;
/// Vector of four `isize` values
pub type isizex4 = SimdIsize<4>;
/// Vector of eight `isize` values
pub type isizex8 = SimdIsize<8>;
/// Vector of two `i128` values
pub type i128x2 = SimdI128<2>;
/// Vector of four `i128` values
pub type i128x4 = SimdI128<4>;
/// Vector of four `i16` values
pub type i16x4 = SimdI16<4>;
/// Vector of eight `i16` values
pub type i16x8 = SimdI16<8>;
/// Vector of 16 `i16` values
pub type i16x16 = SimdI16<16>;
/// Vector of 32 `i16` values
pub type i16x32 = SimdI16<32>;
/// Vector of two `i32` values
pub type i32x2 = SimdI32<2>;
/// Vector of four `i32` values
pub type i32x4 = SimdI32<4>;
/// Vector of eight `i32` values
pub type i32x8 = SimdI32<8>;
/// Vector of 16 `i32` values
pub type i32x16 = SimdI32<16>;
/// Vector of two `i64` values
pub type i64x2 = SimdI64<2>;
/// Vector of four `i64` values
pub type i64x4 = SimdI64<4>;
/// Vector of eight `i64` values
pub type i64x8 = SimdI64<8>;
/// Vector of eight `i8` values
pub type i8x8 = SimdI8<8>;
/// Vector of 16 `i8` values
pub type i8x16 = SimdI8<16>;
/// Vector of 32 `i8` values
pub type i8x32 = SimdI8<32>;
/// Vector of 64 `i8` values
pub type i8x64 = SimdI8<64>;

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@ -0,0 +1,168 @@
#![allow(non_camel_case_types)]
/// Implements additional integer traits (Eq, Ord, Hash) on the specified vector `$name`, holding multiple `$lanes` of `$type`.
macro_rules! impl_unsigned_vector {
{ $name:ident, $type:ty } => {
impl_vector! { $name, $type }
impl<const LANES: usize> Eq for $name<LANES> where Self: crate::LanesAtMost64 {}
impl<const LANES: usize> Ord for $name<LANES> where Self: crate::LanesAtMost64 {
#[inline]
fn cmp(&self, other: &Self) -> core::cmp::Ordering {
// TODO use SIMD cmp
self.to_array().cmp(other.as_ref())
}
}
impl<const LANES: usize> core::hash::Hash for $name<LANES> where Self: crate::LanesAtMost64 {
#[inline]
fn hash<H>(&self, state: &mut H)
where
H: core::hash::Hasher
{
self.as_slice().hash(state)
}
}
}
}
/// A SIMD vector of containing `LANES` `usize` values.
#[repr(simd)]
pub struct SimdUsize<const LANES: usize>([usize; LANES])
where
Self: crate::LanesAtMost64;
impl_unsigned_vector! { SimdUsize, usize }
#[cfg(target_pointer_width = "32")]
from_transmute_x86! { unsafe usizex4 => __m128i }
#[cfg(target_pointer_width = "32")]
from_transmute_x86! { unsafe usizex8 => __m256i }
#[cfg(target_pointer_width = "64")]
from_transmute_x86! { unsafe usizex2 => __m128i }
#[cfg(target_pointer_width = "64")]
from_transmute_x86! { unsafe usizex4 => __m256i }
//#[cfg(target_pointer_width = "64")]
//from_transmute_x86! { unsafe usizex8 => __m512i }
/// A SIMD vector of containing `LANES` `u128` values.
#[repr(simd)]
pub struct SimdU128<const LANES: usize>([u128; LANES])
where
Self: crate::LanesAtMost64;
impl_unsigned_vector! { SimdU128, u128 }
from_transmute_x86! { unsafe u128x2 => __m256i }
//from_transmute_x86! { unsafe u128x4 => __m512i }
/// A SIMD vector of containing `LANES` `u16` values.
#[repr(simd)]
pub struct SimdU16<const LANES: usize>([u16; LANES])
where
Self: crate::LanesAtMost64;
impl_unsigned_vector! { SimdU16, u16 }
from_transmute_x86! { unsafe u16x8 => __m128i }
from_transmute_x86! { unsafe u16x16 => __m256i }
//from_transmute_x86! { unsafe u16x32 => __m512i }
/// A SIMD vector of containing `LANES` `u32` values.
#[repr(simd)]
pub struct SimdU32<const LANES: usize>([u32; LANES])
where
Self: crate::LanesAtMost64;
impl_unsigned_vector! { SimdU32, u32 }
from_transmute_x86! { unsafe u32x4 => __m128i }
from_transmute_x86! { unsafe u32x8 => __m256i }
//from_transmute_x86! { unsafe u32x16 => __m512i }
/// A SIMD vector of containing `LANES` `u64` values.
#[repr(simd)]
pub struct SimdU64<const LANES: usize>([u64; LANES])
where
Self: crate::LanesAtMost64;
impl_unsigned_vector! { SimdU64, u64 }
from_transmute_x86! { unsafe u64x2 => __m128i }
from_transmute_x86! { unsafe u64x4 => __m256i }
//from_transmute_x86! { unsafe u64x8 => __m512i }
/// A SIMD vector of containing `LANES` `u8` values.
#[repr(simd)]
pub struct SimdU8<const LANES: usize>([u8; LANES])
where
Self: crate::LanesAtMost64;
impl_unsigned_vector! { SimdU8, u8 }
from_transmute_x86! { unsafe u8x16 => __m128i }
from_transmute_x86! { unsafe u8x32 => __m256i }
//from_transmute_x86! { unsafe u8x64 => __m512i }
/// Vector of two `usize` values
pub type usizex2 = SimdUsize<2>;
/// Vector of four `usize` values
pub type usizex4 = SimdUsize<4>;
/// Vector of eight `usize` values
pub type usizex8 = SimdUsize<8>;
/// Vector of two `u128` values
pub type u128x2 = SimdU128<2>;
/// Vector of four `u128` values
pub type u128x4 = SimdU128<4>;
/// Vector of four `u16` values
pub type u16x4 = SimdU16<4>;
/// Vector of eight `u16` values
pub type u16x8 = SimdU16<8>;
/// Vector of 16 `u16` values
pub type u16x16 = SimdU16<16>;
/// Vector of 32 `u16` values
pub type u16x32 = SimdU16<32>;
/// Vector of two `u32` values
pub type u32x2 = SimdU32<2>;
/// Vector of four `u32` values
pub type u32x4 = SimdU32<4>;
/// Vector of eight `u32` values
pub type u32x8 = SimdU32<8>;
/// Vector of 16 `u32` values
pub type u32x16 = SimdU32<16>;
/// Vector of two `u64` values
pub type u64x2 = SimdU64<2>;
/// Vector of four `u64` values
pub type u64x4 = SimdU64<4>;
/// Vector of eight `u64` values
pub type u64x8 = SimdU64<8>;
/// Vector of eight `u8` values
pub type u8x8 = SimdU8<8>;
/// Vector of 16 `u8` values
pub type u8x16 = SimdU8<16>;
/// Vector of 32 `u8` values
pub type u8x32 = SimdU8<32>;
/// Vector of 64 `u8` values
pub type u8x64 = SimdU8<64>;

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@ -1,25 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `f32` values.
#[repr(simd)]
pub struct SimdF32<const LANES: usize>([f32; LANES])
where
Self: crate::LanesAtMost64;
impl_float_vector! { SimdF32, f32, SimdU32 }
/// Vector of two `f32` values
pub type f32x2 = SimdF32<2>;
/// Vector of four `f32` values
pub type f32x4 = SimdF32<4>;
/// Vector of eight `f32` values
pub type f32x8 = SimdF32<8>;
/// Vector of 16 `f32` values
pub type f32x16 = SimdF32<16>;
from_transmute_x86! { unsafe f32x4 => __m128 }
from_transmute_x86! { unsafe f32x8 => __m256 }
//from_transmute_x86! { unsafe f32x16 => __m512 }

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@ -1,22 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `f64` values.
#[repr(simd)]
pub struct SimdF64<const LANES: usize>([f64; LANES])
where
Self: crate::LanesAtMost64;
impl_float_vector! { SimdF64, f64, SimdU64 }
/// Vector of two `f64` values
pub type f64x2 = SimdF64<2>;
/// Vector of four `f64` values
pub type f64x4 = SimdF64<4>;
/// Vector of eight `f64` values
pub type f64x8 = SimdF64<8>;
from_transmute_x86! { unsafe f64x2 => __m128d }
from_transmute_x86! { unsafe f64x4 => __m256d }
//from_transmute_x86! { unsafe f64x8 => __m512d }

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@ -1,18 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `i128` values.
#[repr(simd)]
pub struct SimdI128<const LANES: usize>([i128; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdI128, i128 }
/// Vector of two `i128` values
pub type i128x2 = SimdI128<2>;
/// Vector of four `i128` values
pub type i128x4 = SimdI128<4>;
from_transmute_x86! { unsafe i128x2 => __m256i }
//from_transmute_x86! { unsafe i128x4 => __m512i }

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@ -1,25 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `i16` values.
#[repr(simd)]
pub struct SimdI16<const LANES: usize>([i16; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdI16, i16 }
/// Vector of four `i16` values
pub type i16x4 = SimdI16<4>;
/// Vector of eight `i16` values
pub type i16x8 = SimdI16<8>;
/// Vector of 16 `i16` values
pub type i16x16 = SimdI16<16>;
/// Vector of 32 `i16` values
pub type i16x32 = SimdI16<32>;
from_transmute_x86! { unsafe i16x8 => __m128i }
from_transmute_x86! { unsafe i16x16 => __m256i }
//from_transmute_x86! { unsafe i16x32 => __m512i }

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@ -1,25 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `i32` values.
#[repr(simd)]
pub struct SimdI32<const LANES: usize>([i32; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdI32, i32 }
/// Vector of two `i32` values
pub type i32x2 = SimdI32<2>;
/// Vector of four `i32` values
pub type i32x4 = SimdI32<4>;
/// Vector of eight `i32` values
pub type i32x8 = SimdI32<8>;
/// Vector of 16 `i32` values
pub type i32x16 = SimdI32<16>;
from_transmute_x86! { unsafe i32x4 => __m128i }
from_transmute_x86! { unsafe i32x8 => __m256i }
//from_transmute_x86! { unsafe i32x16 => __m512i }

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@ -1,22 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `i64` values.
#[repr(simd)]
pub struct SimdI64<const LANES: usize>([i64; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdI64, i64 }
/// Vector of two `i64` values
pub type i64x2 = SimdI64<2>;
/// Vector of four `i64` values
pub type i64x4 = SimdI64<4>;
/// Vector of eight `i64` values
pub type i64x8 = SimdI64<8>;
from_transmute_x86! { unsafe i64x2 => __m128i }
from_transmute_x86! { unsafe i64x4 => __m256i }
//from_transmute_x86! { unsafe i64x8 => __m512i }

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@ -1,25 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `i8` values.
#[repr(simd)]
pub struct SimdI8<const LANES: usize>([i8; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdI8, i8 }
/// Vector of eight `i8` values
pub type i8x8 = SimdI8<8>;
/// Vector of 16 `i8` values
pub type i8x16 = SimdI8<16>;
/// Vector of 32 `i8` values
pub type i8x32 = SimdI8<32>;
/// Vector of 64 `i8` values
pub type i8x64 = SimdI8<64>;
from_transmute_x86! { unsafe i8x16 => __m128i }
from_transmute_x86! { unsafe i8x32 => __m256i }
//from_transmute_x86! { unsafe i8x64 => __m512i }

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@ -1,30 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `isize` values.
#[repr(simd)]
pub struct SimdIsize<const LANES: usize>([isize; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdIsize, isize }
/// Vector of two `isize` values
pub type isizex2 = SimdIsize<2>;
/// Vector of four `isize` values
pub type isizex4 = SimdIsize<4>;
/// Vector of eight `isize` values
pub type isizex8 = SimdIsize<8>;
#[cfg(target_pointer_width = "32")]
from_transmute_x86! { unsafe isizex4 => __m128i }
#[cfg(target_pointer_width = "32")]
from_transmute_x86! { unsafe isizex8 => __m256i }
#[cfg(target_pointer_width = "64")]
from_transmute_x86! { unsafe isizex2 => __m128i }
#[cfg(target_pointer_width = "64")]
from_transmute_x86! { unsafe isizex4 => __m256i }
//#[cfg(target_pointer_width = "64")]
//from_transmute_x86! { unsafe isizex8 => __m512i }

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@ -1,18 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `u128` values.
#[repr(simd)]
pub struct SimdU128<const LANES: usize>([u128; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdU128, u128 }
/// Vector of two `u128` values
pub type u128x2 = SimdU128<2>;
/// Vector of four `u128` values
pub type u128x4 = SimdU128<4>;
from_transmute_x86! { unsafe u128x2 => __m256i }
//from_transmute_x86! { unsafe u128x4 => __m512i }

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@ -1,25 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `u16` values.
#[repr(simd)]
pub struct SimdU16<const LANES: usize>([u16; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdU16, u16 }
/// Vector of four `u16` values
pub type u16x4 = SimdU16<4>;
/// Vector of eight `u16` values
pub type u16x8 = SimdU16<8>;
/// Vector of 16 `u16` values
pub type u16x16 = SimdU16<16>;
/// Vector of 32 `u16` values
pub type u16x32 = SimdU16<32>;
from_transmute_x86! { unsafe u16x8 => __m128i }
from_transmute_x86! { unsafe u16x16 => __m256i }
//from_transmute_x86! { unsafe u16x32 => __m512i }

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@ -1,25 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `u32` values.
#[repr(simd)]
pub struct SimdU32<const LANES: usize>([u32; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdU32, u32 }
/// Vector of two `u32` values
pub type u32x2 = SimdU32<2>;
/// Vector of four `u32` values
pub type u32x4 = SimdU32<4>;
/// Vector of eight `u32` values
pub type u32x8 = SimdU32<8>;
/// Vector of 16 `u32` values
pub type u32x16 = SimdU32<16>;
from_transmute_x86! { unsafe u32x4 => __m128i }
from_transmute_x86! { unsafe u32x8 => __m256i }
//from_transmute_x86! { unsafe u32x16 => __m512i }

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@ -1,22 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `u64` values.
#[repr(simd)]
pub struct SimdU64<const LANES: usize>([u64; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdU64, u64 }
/// Vector of two `u64` values
pub type u64x2 = SimdU64<2>;
/// Vector of four `u64` values
pub type u64x4 = SimdU64<4>;
/// Vector of eight `u64` values
pub type u64x8 = SimdU64<8>;
from_transmute_x86! { unsafe u64x2 => __m128i }
from_transmute_x86! { unsafe u64x4 => __m256i }
//from_transmute_x86! { unsafe u64x8 => __m512i }

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@ -1,23 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `u8` values.
#[repr(simd)]
pub struct SimdU8<const LANES: usize>([u8; LANES]) where Self: crate::LanesAtMost64;
impl_integer_vector! { SimdU8, u8 }
/// Vector of eight `u8` values
pub type u8x8 = SimdU8<8>;
/// Vector of 16 `u8` values
pub type u8x16 = SimdU8<16>;
/// Vector of 32 `u8` values
pub type u8x32 = SimdU8<32>;
/// Vector of 64 `u8` values
pub type u8x64 = SimdU8<64>;
from_transmute_x86! { unsafe u8x16 => __m128i }
from_transmute_x86! { unsafe u8x32 => __m256i }
//from_transmute_x86! { unsafe u8x64 => __m512i }

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@ -1,30 +0,0 @@
#![allow(non_camel_case_types)]
/// A SIMD vector of containing `LANES` `usize` values.
#[repr(simd)]
pub struct SimdUsize<const LANES: usize>([usize; LANES])
where
Self: crate::LanesAtMost64;
impl_integer_vector! { SimdUsize, usize }
/// Vector of two `usize` values
pub type usizex2 = SimdUsize<2>;
/// Vector of four `usize` values
pub type usizex4 = SimdUsize<4>;
/// Vector of eight `usize` values
pub type usizex8 = SimdUsize<8>;
#[cfg(target_pointer_width = "32")]
from_transmute_x86! { unsafe usizex4 => __m128i }
#[cfg(target_pointer_width = "32")]
from_transmute_x86! { unsafe usizex8 => __m256i }
#[cfg(target_pointer_width = "64")]
from_transmute_x86! { unsafe usizex2 => __m128i }
#[cfg(target_pointer_width = "64")]
from_transmute_x86! { unsafe usizex4 => __m256i }
//#[cfg(target_pointer_width = "64")]
//from_transmute_x86! { unsafe usizex8 => __m512i }