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Remove has_cpuid

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Jubilee Young 2024-06-24 17:01:19 -07:00 • committed by Amanieu d'Antras
parent d7ea407a28
commit 8b77e779cb
3 changed files with 2 additions and 93 deletions
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86
library/stdarch/crates/core_arch/src/x86/cpuid.rs
View file

@ -96,73 +96,6 @@ pub unsafe fn __cpuid(leaf: u32) -> CpuidResult {
__cpuid_count(leaf, 0)
}
/// Does the host support the `cpuid` instruction?
#[inline]
#[unstable(feature = "stdarch_x86_has_cpuid", issue = "60123")]
pub fn has_cpuid() -> bool {
#[cfg(target_env = "sgx")]
{
false
}
#[cfg(all(not(target_env = "sgx"), target_arch = "x86_64"))]
{
true
}
#[cfg(all(not(target_env = "sgx"), target_arch = "x86"))]
{
// Optimization for i586 and i686 Rust targets which SSE enabled
// and support cpuid:
#[cfg(target_feature = "sse")]
{
true
}
// If SSE is not enabled, detect whether cpuid is available:
#[cfg(not(target_feature = "sse"))]
unsafe {
// On `x86` the `cpuid` instruction is not always available.
// This follows the approach indicated in:
// http://wiki.osdev.org/CPUID#Checking_CPUID_availability
// https://software.intel.com/en-us/articles/using-cpuid-to-detect-the-presence-of-sse-41-and-sse-42-instruction-sets/
// which detects whether `cpuid` is available by checking whether
// the 21st bit of the EFLAGS register is modifiable or not.
// If it is, then `cpuid` is available.
let result: u32;
asm!(
// Read eflags and save a copy of it
"pushfd",
"pop {result}",
"mov {result}, {saved_flags}",
// Flip 21st bit of the flags
"xor $0x200000, {result}",
// Load the modified flags and read them back.
// Bit 21 can only be modified if cpuid is available.
"push {result}",
"popfd",
"pushfd",
"pop {result}",
// Use xor to find out whether bit 21 has changed
"xor {saved_flags}, {result}",
result = out(reg) result,
saved_flags = out(reg) _,
options(nomem, att_syntax),
);
// There is a race between popfd (A) and pushfd (B)
// where other bits beyond 21st may have been modified due to
// interrupts, a debugger stepping through the asm, etc.
//
// Therefore, explicitly check whether the 21st bit
// was modified or not.
//
// If the result is zero, the cpuid bit was not modified.
// If the result is `0x200000` (non-zero), then the cpuid
// was correctly modified and the CPU supports the cpuid
// instruction:
(result & 0x200000) != 0
}
}
}
/// Returns the highest-supported `leaf` (`EAX`) and sub-leaf (`ECX`) `cpuid`
/// values.
///
@ -179,22 +112,3 @@ pub unsafe fn __get_cpuid_max(leaf: u32) -> (u32, u32) {
let CpuidResult { eax, ebx, .. } = __cpuid(leaf);
(eax, ebx)
}
#[cfg(test)]
mod tests {
use crate::core_arch::x86::*;
#[test]
#[cfg_attr(miri, ignore)] // Uses inline assembly
fn test_always_has_cpuid() {
// all currently-tested targets have the instruction
// FIXME: add targets without `cpuid` to CI
assert!(cpuid::has_cpuid());
}
#[test]
#[cfg_attr(miri, ignore)] // Uses inline assembly
fn test_has_cpuid_idempotent() {
assert_eq!(cpuid::has_cpuid(), cpuid::has_cpuid());
}
}

5
library/stdarch/crates/std_detect/src/detect/os/x86.rs
View file

@ -28,9 +28,8 @@ use crate::detect::{bit, cache, Feature};
pub(crate) fn detect_features() -> cache::Initializer {
let mut value = cache::Initializer::default();
// If the x86 CPU does not support the CPUID instruction then it is too
// old to support any of the currently-detectable features.
if !has_cpuid() {
if cfg!(target_env = "sgx") {
// doesn't support this because it is untrusted data
return value;
}

4
library/stdarch/crates/std_detect/src/lib.rs
View file

@ -20,10 +20,6 @@
#![cfg_attr(test, allow(unused_imports))]
#![no_std]
#![allow(internal_features)]
#![cfg_attr(
any(target_arch = "x86", target_arch = "x86_64"),
feature(stdarch_x86_has_cpuid)
)]
#[cfg(test)]
#[macro_use]