diff --git a/library/stdarch/crates/core_arch/src/x86/avx512bw.rs b/library/stdarch/crates/core_arch/src/x86/avx512bw.rs index 3905a3522798..4f1c271401a6 100644 --- a/library/stdarch/crates/core_arch/src/x86/avx512bw.rs +++ b/library/stdarch/crates/core_arch/src/x86/avx512bw.rs @@ -3869,17 +3869,13 @@ pub unsafe fn _mm256_mask_cmp_epu8_mask( /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmp_epu8_mask&expand=729) #[inline] #[target_feature(enable = "avx512bw,avx512vl")] -#[rustc_args_required_const(2)] -#[cfg_attr(test, assert_instr(vpcmp, imm8 = 0))] -pub unsafe fn _mm_cmp_epu8_mask(a: __m128i, b: __m128i, imm8: i32) -> __mmask16 { +#[rustc_legacy_const_generics(2)] +#[cfg_attr(test, assert_instr(vpcmp, IMM8 = 0))] +pub unsafe fn _mm_cmp_epu8_mask(a: __m128i, b: __m128i) -> __mmask16 { + static_assert_imm3!(IMM8); let a = a.as_u8x16(); let b = b.as_u8x16(); - macro_rules! call { - ($imm3:expr) => { - vpcmpub128(a, b, $imm3, 0b11111111_11111111) - }; - } - let r = constify_imm3!(imm8, call); + let r = vpcmpub128(a, b, IMM8, 0b11111111_11111111); transmute(r) } @@ -13507,7 +13503,7 @@ mod tests { unsafe fn test_mm_cmp_epu8_mask() { let a = _mm_set1_epi8(0); let b = _mm_set1_epi8(1); - let m = _mm_cmp_epu8_mask(a, b, _MM_CMPINT_LT); + let m = _mm_cmp_epu8_mask::<_MM_CMPINT_LT>(a, b); assert_eq!(m, 0b11111111_11111111); }