From a083e2a6c8a5753e36b44417d11bcc7c3b71f0e9 Mon Sep 17 00:00:00 2001 From: David Pathakjee Date: Mon, 24 Mar 2025 14:01:24 -0700 Subject: [PATCH] Minor correction to __m512d documentation. A 512-bit register is f64x8, not f64x4. Likely a copy-paste error from the _m256d documentation, which seems correct. --- library/stdarch/crates/core_arch/src/x86/mod.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/library/stdarch/crates/core_arch/src/x86/mod.rs b/library/stdarch/crates/core_arch/src/x86/mod.rs index 0404b1943bcf..68cf9b59602f 100644 --- a/library/stdarch/crates/core_arch/src/x86/mod.rs +++ b/library/stdarch/crates/core_arch/src/x86/mod.rs @@ -340,7 +340,7 @@ types! { /// /// Note that unlike `__m512i`, the integer version of the 512-bit /// registers, this `__m512d` type has *one* interpretation. Each instance - /// of `__m512d` always corresponds to `f64x4`, or eight `f64` types packed + /// of `__m512d` always corresponds to `f64x8`, or eight `f64` types packed /// together. /// /// The in-memory representation of this type is the same as the one of an