diff --git a/library/stdarch/crates/core_arch/src/x86/avx.rs b/library/stdarch/crates/core_arch/src/x86/avx.rs
index 643cfe141fbb..52988acb45b9 100644
--- a/library/stdarch/crates/core_arch/src/x86/avx.rs
+++ b/library/stdarch/crates/core_arch/src/x86/avx.rs
@@ -1513,16 +1513,11 @@ pub unsafe fn _mm256_insert_epi8(a: __m256i, i: i8, index: i32) -> __m256i {
 #[inline]
 #[target_feature(enable = "avx")]
 // This intrinsic has no corresponding instruction.
-#[rustc_args_required_const(2)]
+#[rustc_legacy_const_generics(2)]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _mm256_insert_epi16(a: __m256i, i: i16, index: i32) -> __m256i {
-    let a = a.as_i16x16();
-    macro_rules! call {
-        ($index:expr) => {
-            simd_insert(a, $index, i)
-        };
-    }
-    transmute(constify_imm4!((index & 15), call))
+pub unsafe fn _mm256_insert_epi16<const INDEX: i32>(a: __m256i, i: i16) -> __m256i {
+    static_assert_imm4!(INDEX);
+    transmute(simd_insert(a.as_i16x16(), INDEX as u32, i))
 }
 
 /// Copies `a` to result, and inserts the 32-bit integer `i` into result
@@ -3983,7 +3978,7 @@ mod tests {
             0, 1, 2, 3, 4, 5, 6, 7,
             8, 9, 10, 11, 12, 13, 14, 15,
         );
-        let r = _mm256_insert_epi16(a, 0, 15);
+        let r = _mm256_insert_epi16::<15>(a, 0);
         #[rustfmt::skip]
         let e = _mm256_setr_epi16(
             0, 1, 2, 3, 4, 5, 6, 7,
diff --git a/library/stdarch/crates/core_arch/src/x86/avx2.rs b/library/stdarch/crates/core_arch/src/x86/avx2.rs
index a18f1aa06715..a4a281906cfe 100644
--- a/library/stdarch/crates/core_arch/src/x86/avx2.rs
+++ b/library/stdarch/crates/core_arch/src/x86/avx2.rs
@@ -4543,7 +4543,7 @@ mod tests {
             7, 6, 5, 4, 3, 2, 1, 0,
         );
         let r = _mm256_cmpeq_epi16(a, b);
-        assert_eq_m256i(r, _mm256_insert_epi16(_mm256_set1_epi16(0), !0, 2));
+        assert_eq_m256i(r, _mm256_insert_epi16::<2>(_mm256_set1_epi16(0), !0));
     }
 
     #[simd_test(enable = "avx2")]
@@ -4574,10 +4574,10 @@ mod tests {
 
     #[simd_test(enable = "avx2")]
     unsafe fn test_mm256_cmpgt_epi16() {
-        let a = _mm256_insert_epi16(_mm256_set1_epi16(0), 5, 0);
+        let a = _mm256_insert_epi16::<0>(_mm256_set1_epi16(0), 5);
         let b = _mm256_set1_epi16(0);
         let r = _mm256_cmpgt_epi16(a, b);
-        assert_eq_m256i(r, _mm256_insert_epi16(_mm256_set1_epi16(0), !0, 0));
+        assert_eq_m256i(r, _mm256_insert_epi16::<0>(_mm256_set1_epi16(0), !0));
     }
 
     #[simd_test(enable = "avx2")]
@@ -4741,8 +4741,8 @@ mod tests {
     #[simd_test(enable = "avx2")]
     unsafe fn test_mm256_hadds_epi16() {
         let a = _mm256_set1_epi16(2);
-        let a = _mm256_insert_epi16(a, 0x7fff, 0);
-        let a = _mm256_insert_epi16(a, 1, 1);
+        let a = _mm256_insert_epi16::<0>(a, 0x7fff);
+        let a = _mm256_insert_epi16::<1>(a, 1);
         let b = _mm256_set1_epi16(4);
         let r = _mm256_hadds_epi16(a, b);
         #[rustfmt::skip]
@@ -4774,11 +4774,11 @@ mod tests {
     #[simd_test(enable = "avx2")]
     unsafe fn test_mm256_hsubs_epi16() {
         let a = _mm256_set1_epi16(2);
-        let a = _mm256_insert_epi16(a, 0x7fff, 0);
-        let a = _mm256_insert_epi16(a, -1, 1);
+        let a = _mm256_insert_epi16::<0>(a, 0x7fff);
+        let a = _mm256_insert_epi16::<1>(a, -1);
         let b = _mm256_set1_epi16(4);
         let r = _mm256_hsubs_epi16(a, b);
-        let e = _mm256_insert_epi16(_mm256_set1_epi16(0), 0x7FFF, 0);
+        let e = _mm256_insert_epi16::<0>(_mm256_set1_epi16(0), 0x7FFF);
         assert_eq_m256i(r, e);
     }