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convert _mm256_i32gather_epi32 to const generics

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Rémy Rakic 2021-03-06 00:38:41 +01:00 • committed by Amanieu d'Antras
parent a93607a9f2
commit a5ca4611ef
1 changed files with 10 additions and 14 deletions
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24
library/stdarch/crates/core_arch/src/x86/avx2.rs
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@ -1134,20 +1134,19 @@ pub unsafe fn _mm_mask_i32gather_epi32<const SCALE: i32>(
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_i32gather_epi32)
#[inline]
#[target_feature(enable = "avx2")]
#[cfg_attr(test, assert_instr(vpgatherdd, scale = 1))]
#[rustc_args_required_const(2)]
#[cfg_attr(test, assert_instr(vpgatherdd, SCALE = 1))]
#[rustc_legacy_const_generics(2)]
#[stable(feature = "simd_x86", since = "1.27.0")]
pub unsafe fn _mm256_i32gather_epi32(slice: *const i32, offsets: __m256i, scale: i32) -> __m256i {
pub unsafe fn _mm256_i32gather_epi32<const SCALE: i32>(
slice: *const i32,
offsets: __m256i,
) -> __m256i {
static_assert_imm8_scale!(SCALE);
let zero = _mm256_setzero_si256().as_i32x8();
let neg_one = _mm256_set1_epi32(-1).as_i32x8();
let offsets = offsets.as_i32x8();
let slice = slice as *const i8;
macro_rules! call {
($imm8:expr) => {
vpgatherdd(zero, slice, offsets, neg_one, $imm8)
};
}
let r = constify_imm8_gather!(scale, call);
let r = vpgatherdd(zero, slice, offsets, neg_one, SCALE as i8);
transmute(r)
}
@ -5594,11 +5593,8 @@ mod tests {
arr[i as usize] = i;
}
// A multiplier of 4 is word-addressing
let r = _mm256_i32gather_epi32(
arr.as_ptr(),
_mm256_setr_epi32(0, 16, 32, 48, 1, 2, 3, 4),
4,
);
let r =
_mm256_i32gather_epi32::<4>(arr.as_ptr(), _mm256_setr_epi32(0, 16, 32, 48, 1, 2, 3, 4));
assert_eq_m256i(r, _mm256_setr_epi32(0, 16, 32, 48, 1, 2, 3, 4));
}