convert _mm256_inserti128_si256 to const generics
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1 changed files with 7 additions and 9 deletions
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@ -1813,24 +1813,22 @@ pub unsafe fn _mm256_mask_i64gather_pd<const SCALE: i32>(
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}
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/// Copies `a` to `dst`, then insert 128 bits (of integer data) from `b` at the
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/// location specified by `imm8`.
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/// location specified by `IMM1`.
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_inserti128_si256)
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#[inline]
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#[target_feature(enable = "avx2")]
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#[cfg_attr(
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all(test, not(target_os = "windows")),
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assert_instr(vinsertf128, imm8 = 1)
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assert_instr(vinsertf128, IMM1 = 1)
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)]
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#[rustc_args_required_const(2)]
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#[rustc_legacy_const_generics(2)]
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#[stable(feature = "simd_x86", since = "1.27.0")]
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pub unsafe fn _mm256_inserti128_si256(a: __m256i, b: __m128i, imm8: i32) -> __m256i {
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pub unsafe fn _mm256_inserti128_si256<const IMM1: i32>(a: __m256i, b: __m128i) -> __m256i {
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static_assert_imm1!(IMM1);
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let a = a.as_i64x4();
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let b = _mm256_castsi128_si256(b).as_i64x4();
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let dst: i64x4 = match imm8 & 0b01 {
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0 => simd_shuffle4(a, b, [4, 5, 2, 3]),
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_ => simd_shuffle4(a, b, [0, 1, 4, 5]),
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};
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let dst: i64x4 = simd_shuffle4(a, b, [[4, 5, 2, 3], [0, 1, 4, 5]][IMM1 as usize]);
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transmute(dst)
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}
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@ -4494,7 +4492,7 @@ mod tests {
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unsafe fn test_mm256_inserti128_si256() {
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let a = _mm256_setr_epi64x(1, 2, 3, 4);
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let b = _mm_setr_epi64x(7, 8);
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let r = _mm256_inserti128_si256(a, b, 0b01);
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let r = _mm256_inserti128_si256::<1>(a, b);
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let e = _mm256_setr_epi64x(1, 2, 7, 8);
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assert_eq_m256i(r, e);
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}
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