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Remove fp16 target feature from some aarch64 intrinsics

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This seems to affect codegen on a lot of Arm intrinsics so I've avoided
making the change there.
This commit is contained in:
Adam Gemmell 2025-12-15 17:06:56 +00:00
parent 94846749f1
commit af3604e84e
4 changed files with 207 additions and 131 deletions
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20
library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs
View file

@ -7217,8 +7217,8 @@ pub fn vcvtq_f64_u64(a: uint64x2_t) -> float64x2_t {
#[doc = "Floating-point convert to lower precision"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt_high_f16_f32)"]
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(fcvtn2))]
#[target_feature(enable = "neon,fp16")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
pub fn vcvt_high_f16_f32(a: float16x4_t, b: float32x4_t) -> float16x8_t {
@ -7227,8 +7227,8 @@ pub fn vcvt_high_f16_f32(a: float16x4_t, b: float32x4_t) -> float16x8_t {
#[doc = "Floating-point convert to higher precision"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt_high_f32_f16)"]
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(fcvtl2))]
#[target_feature(enable = "neon,fp16")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
pub fn vcvt_high_f32_f16(a: float16x8_t) -> float32x4_t {
@ -21492,7 +21492,7 @@ pub fn vrecpxh_f16(a: f16) -> f16 {
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f64_f16)"]
#[inline]
#[cfg(target_endian = "little")]
#[target_feature(enable = "neon,fp16")]
#[target_feature(enable = "neon")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
#[cfg_attr(test, assert_instr(nop))]
@ -21503,7 +21503,7 @@ pub fn vreinterpret_f64_f16(a: float16x4_t) -> float64x1_t {
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f64_f16)"]
#[inline]
#[cfg(target_endian = "big")]
#[target_feature(enable = "neon,fp16")]
#[target_feature(enable = "neon")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
#[cfg_attr(test, assert_instr(nop))]
@ -21515,7 +21515,7 @@ pub fn vreinterpret_f64_f16(a: float16x4_t) -> float64x1_t {
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f64_f16)"]
#[inline]
#[cfg(target_endian = "little")]
#[target_feature(enable = "neon,fp16")]
#[target_feature(enable = "neon")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
#[cfg_attr(test, assert_instr(nop))]
@ -21526,7 +21526,7 @@ pub fn vreinterpretq_f64_f16(a: float16x8_t) -> float64x2_t {
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f64_f16)"]
#[inline]
#[cfg(target_endian = "big")]
#[target_feature(enable = "neon,fp16")]
#[target_feature(enable = "neon")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
#[cfg_attr(test, assert_instr(nop))]
@ -21541,7 +21541,7 @@ pub fn vreinterpretq_f64_f16(a: float16x8_t) -> float64x2_t {
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_f64)"]
#[inline]
#[cfg(target_endian = "little")]
#[target_feature(enable = "neon,fp16")]
#[target_feature(enable = "neon")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
#[cfg_attr(test, assert_instr(nop))]
@ -21552,7 +21552,7 @@ pub fn vreinterpret_f16_f64(a: float64x1_t) -> float16x4_t {
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpret_f16_f64)"]
#[inline]
#[cfg(target_endian = "big")]
#[target_feature(enable = "neon,fp16")]
#[target_feature(enable = "neon")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
#[cfg_attr(test, assert_instr(nop))]
@ -21566,7 +21566,7 @@ pub fn vreinterpret_f16_f64(a: float64x1_t) -> float16x4_t {
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_f64)"]
#[inline]
#[cfg(target_endian = "little")]
#[target_feature(enable = "neon,fp16")]
#[target_feature(enable = "neon")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
#[cfg_attr(test, assert_instr(nop))]
@ -21577,7 +21577,7 @@ pub fn vreinterpretq_f16_f64(a: float64x2_t) -> float16x8_t {
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vreinterpretq_f16_f64)"]
#[inline]
#[cfg(target_endian = "big")]
#[target_feature(enable = "neon,fp16")]
#[target_feature(enable = "neon")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
#[cfg_attr(test, assert_instr(nop))]

233
library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs
View file

File diff suppressed because it is too large Load diff

3
library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml
View file

@ -1506,7 +1506,6 @@ intrinsics:
return_type: "{neon_type[0]}"
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtn2]]}]]
- *neon-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety: safe
@ -1524,7 +1523,6 @@ intrinsics:
return_type: "{neon_type[0]}"
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtl2]]}]]
- *neon-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety: safe
@ -8793,7 +8791,6 @@ intrinsics:
arguments: ["a: {type[0]}"]
return_type: "{type[1]}"
attr:
- *neon-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [nop]

82
library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml
View file

@ -71,6 +71,10 @@ neon-i8mm: &neon-i8mm
neon-fp16: &neon-fp16
FnCall: [target_feature, ['enable = "neon,fp16"']]
# #[cfg_attr[target_arch = "arm", target_feature(enable = "neon,fp16")]
arm-fp16: &arm-fp16
FnCall: [cfg_attr, ['target_arch = "arm"', {FnCall: [target_feature, ['enable = "fp16"']]}]]
enable-fcma: &enable-fcma
FnCall: [cfg_attr, [{ FnCall: [not, ['target_arch = "arm"']]}, { FnCall: [target_feature, ['enable = "fcma"']] }]]
@ -1502,7 +1506,7 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"', 'N = 4']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 4']]}]]
- FnCall: [rustc_legacy_const_generics, ['1']]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs: ['const N: i32']
@ -1522,7 +1526,7 @@ intrinsics:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety: safe
@ -1541,7 +1545,7 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"', 'N = 2']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 2']]}]]
- FnCall: [rustc_legacy_const_generics, ['1']]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs: ['const N: i32']
@ -2754,7 +2758,7 @@ intrinsics:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld1]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety:
@ -2785,7 +2789,7 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld1, 'LANE = 0']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ["2"]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
@ -2806,7 +2810,7 @@ intrinsics:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ["vld1"]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1r]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety:
@ -3399,7 +3403,7 @@ intrinsics:
- *neon-v7
- *target-is-arm
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld2]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety:
@ -3428,7 +3432,7 @@ intrinsics:
attr:
- *target-not-arm
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld2]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety:
@ -3455,7 +3459,7 @@ intrinsics:
attr:
- *neon-v7
- *target-is-arm
- *neon-fp16
- *arm-fp16
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld2]]}]]
- *neon-unstable-f16
- *target-not-arm64ec
@ -3486,7 +3490,7 @@ intrinsics:
attr:
- *target-not-arm
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld2r]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety:
@ -3516,7 +3520,7 @@ intrinsics:
- *target-is-arm
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['vld2', 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ["2"]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs:
@ -3559,7 +3563,7 @@ intrinsics:
- *target-not-arm
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld2, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ["2"]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs:
@ -3600,7 +3604,7 @@ intrinsics:
- *neon-v7
- *target-is-arm
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld3]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety:
@ -3629,7 +3633,7 @@ intrinsics:
attr:
- *target-not-arm
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld3]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety:
@ -3657,7 +3661,7 @@ intrinsics:
- *neon-v7
- *target-is-arm
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vld3]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety:
@ -3687,7 +3691,7 @@ intrinsics:
attr:
- *target-not-arm
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld3r]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety:
@ -3717,7 +3721,7 @@ intrinsics:
- *target-is-arm
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['vld3', 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ["2"]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs:
@ -3762,7 +3766,7 @@ intrinsics:
- *target-not-arm
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld3, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ["2"]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs:
@ -4744,7 +4748,7 @@ intrinsics:
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ["2"]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
types:
@ -4982,7 +4986,7 @@ intrinsics:
attr:
- *target-is-arm
- *neon-v7
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [vst1]
@ -5126,7 +5130,7 @@ intrinsics:
arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"]
attr:
- *target-not-arm
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [st2]
@ -5217,7 +5221,7 @@ intrinsics:
- *target-not-arm
- FnCall: [rustc_legacy_const_generics, ['2']]
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st2, 'LANE = 0']]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
@ -5309,7 +5313,7 @@ intrinsics:
attr:
- *target-is-arm
- *neon-v7
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [vst2]
@ -5376,7 +5380,7 @@ intrinsics:
- *neon-v7
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [vst2, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['2']]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
@ -5587,7 +5591,7 @@ intrinsics:
attr:
- *target-is-arm
- *neon-v7
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [vst3]
@ -5656,7 +5660,7 @@ intrinsics:
- *neon-v7
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [vst3, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['2']]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
@ -5717,7 +5721,7 @@ intrinsics:
arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"]
attr:
- *target-not-arm
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [st3]
@ -5782,7 +5786,7 @@ intrinsics:
- *target-not-arm
- FnCall: [rustc_legacy_const_generics, ['2']]
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st3, 'LANE = 0']]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
@ -5996,7 +6000,7 @@ intrinsics:
attr:
- *target-is-arm
- *neon-v7
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [vst4]
@ -6066,7 +6070,7 @@ intrinsics:
- *neon-v7
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [vst4, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ['2']]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
@ -6129,7 +6133,7 @@ intrinsics:
arguments: ["a: *mut {type[0]}", "b: {neon_type[1]}"]
attr:
- *target-not-arm
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [st4]
@ -6196,7 +6200,7 @@ intrinsics:
- *target-not-arm
- FnCall: [rustc_legacy_const_generics, ['2']]
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [st4, 'LANE = 0']]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
@ -9139,7 +9143,7 @@ intrinsics:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety: safe
@ -10730,7 +10734,7 @@ intrinsics:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt.f16.f32]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtn]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety: safe
@ -10747,7 +10751,7 @@ intrinsics:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtl]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety: safe
@ -14055,7 +14059,7 @@ intrinsics:
return_type: "{neon_type[1]}"
attr:
- *neon-v7
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [nop]
@ -14071,7 +14075,7 @@ intrinsics:
return_type: "{neon_type[0]}"
attr:
- *neon-v7
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
assert_instr: [nop]
@ -14088,10 +14092,10 @@ intrinsics:
return_type: "{type[1]}"
attr:
- *neon-v7
- *neon-fp16
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop, 'LANE = 0']]}]]
- FnCall: [rustc_legacy_const_generics, ["1"]]
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
static_defs: ['const LANE: i32']
@ -14111,7 +14115,7 @@ intrinsics:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"']]}]]
- FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup]]}]]
- *neon-fp16
- *arm-fp16
- *neon-unstable-f16
- *target-not-arm64ec
safety: safe