Rollup merge of #142680 - beetrees:sparc64-float-struct-abi, r=tgross35
Fix passing/returning structs with the 64-bit SPARC ABI Fixes the 64-bit SPARC part of rust-lang/rust#115609 by replacing the current implementation with a new implementation modelled on the RISC-V calling convention code ([SPARC ABI reference](https://sparc.org/wp-content/uploads/2014/01/SCD.2.4.1.pdf.gz)). Pinging `sparcv9-sun-solaris` target maintainers: @psumbera @kulikjak Fixes rust-lang/rust#115336 Fixes rust-lang/rust#115399 Fixes rust-lang/rust#122620 Fixes https://github.com/rust-lang/rust/issues/147883 r? @workingjubilee
This commit is contained in:
Jacob Pratt
GitHub
commit
b1b6533077
4 changed files with 366 additions and 186 deletions
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@ -35,6 +35,7 @@ impl Reg {
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reg_ctor!(f32, Float, 32);
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reg_ctor!(f64, Float, 64);
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reg_ctor!(f128, Float, 128);
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}
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impl Reg {
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@ -1,214 +1,203 @@
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// FIXME: This needs an audit for correctness and completeness.
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use rustc_abi::{
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BackendRepr, FieldsShape, Float, HasDataLayout, Primitive, Reg, Scalar, Size, TyAbiInterface,
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TyAndLayout,
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Align, BackendRepr, FieldsShape, Float, HasDataLayout, Primitive, Reg, Size, TyAbiInterface,
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TyAndLayout, Variants,
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};
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use crate::callconv::{ArgAbi, ArgAttribute, CastTarget, FnAbi, Uniform};
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use crate::spec::{Env, HasTargetSpec, Os};
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use crate::spec::{HasTargetSpec, Os};
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#[derive(Clone, Debug)]
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struct Sdata {
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pub prefix: [Option<Reg>; 8],
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pub prefix_index: usize,
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pub last_offset: Size,
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pub has_float: bool,
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pub arg_attribute: ArgAttribute,
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// NOTE: GCC and Clang/LLVM have disagreements that the ABI doesn't resolve, we match the
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// Clang/LLVM behavior in these cases.
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#[derive(Copy, Clone)]
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enum DoubleWord {
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F64,
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F128Start,
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F128End,
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Words([Word; 2]),
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}
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fn arg_scalar<C>(cx: &C, scalar: &Scalar, offset: Size, mut data: Sdata) -> Sdata
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where
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C: HasDataLayout,
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{
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let dl = cx.data_layout();
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if !matches!(scalar.primitive(), Primitive::Float(Float::F32 | Float::F64)) {
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return data;
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}
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data.has_float = true;
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if !data.last_offset.is_aligned(dl.f64_align) && data.last_offset < offset {
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if data.prefix_index == data.prefix.len() {
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return data;
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}
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data.prefix[data.prefix_index] = Some(Reg::i32());
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data.prefix_index += 1;
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data.last_offset = data.last_offset + Reg::i32().size;
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}
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for _ in 0..((offset - data.last_offset).bits() / 64)
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.min((data.prefix.len() - data.prefix_index) as u64)
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{
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data.prefix[data.prefix_index] = Some(Reg::i64());
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data.prefix_index += 1;
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data.last_offset = data.last_offset + Reg::i64().size;
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}
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if data.last_offset < offset {
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if data.prefix_index == data.prefix.len() {
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return data;
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}
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data.prefix[data.prefix_index] = Some(Reg::i32());
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data.prefix_index += 1;
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data.last_offset = data.last_offset + Reg::i32().size;
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}
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if data.prefix_index == data.prefix.len() {
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return data;
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}
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if scalar.primitive() == Primitive::Float(Float::F32) {
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data.arg_attribute = ArgAttribute::InReg;
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data.prefix[data.prefix_index] = Some(Reg::f32());
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data.last_offset = offset + Reg::f32().size;
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} else {
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data.prefix[data.prefix_index] = Some(Reg::f64());
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data.last_offset = offset + Reg::f64().size;
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}
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data.prefix_index += 1;
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data
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#[derive(Copy, Clone)]
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enum Word {
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F32,
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Integer,
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}
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fn arg_scalar_pair<C>(
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fn classify<'a, Ty, C>(
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cx: &C,
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scalar1: &Scalar,
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scalar2: &Scalar,
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mut offset: Size,
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mut data: Sdata,
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) -> Sdata
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where
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C: HasDataLayout,
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{
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data = arg_scalar(cx, scalar1, offset, data);
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match (scalar1.primitive(), scalar2.primitive()) {
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(Primitive::Float(Float::F32), _) => offset += Reg::f32().size,
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(_, Primitive::Float(Float::F64)) => offset += Reg::f64().size,
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(Primitive::Int(i, _signed), _) => offset += i.size(),
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(Primitive::Pointer(_), _) => offset += Reg::i64().size,
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_ => {}
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}
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if !offset.bytes().is_multiple_of(4)
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&& matches!(scalar2.primitive(), Primitive::Float(Float::F32 | Float::F64))
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{
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offset += Size::from_bytes(4 - (offset.bytes() % 4));
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}
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data = arg_scalar(cx, scalar2, offset, data);
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data
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}
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fn parse_structure<'a, Ty, C>(
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cx: &C,
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layout: TyAndLayout<'a, Ty>,
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mut data: Sdata,
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mut offset: Size,
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) -> Sdata
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where
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arg_layout: &TyAndLayout<'a, Ty>,
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offset: Size,
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double_words: &mut [DoubleWord; 4],
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) where
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Ty: TyAbiInterface<'a, C> + Copy,
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C: HasDataLayout,
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{
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if let FieldsShape::Union(_) = layout.fields {
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return data;
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}
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// If this function does not update the `double_words` array, the value will be passed via
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// integer registers. The array is initialized with `DoubleWord::Words([Word::Integer; 2])`.
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match layout.backend_repr {
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BackendRepr::Scalar(scalar) => {
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data = arg_scalar(cx, &scalar, offset, data);
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}
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BackendRepr::Memory { .. } => {
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for i in 0..layout.fields.count() {
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if offset < layout.fields.offset(i) {
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offset = layout.fields.offset(i);
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match arg_layout.backend_repr {
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BackendRepr::Scalar(scalar) => match scalar.primitive() {
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Primitive::Float(float) => {
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if offset.is_aligned(Ord::min(*float.align(cx), Align::EIGHT)) {
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let index = offset.bytes_usize() / 8;
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match float {
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Float::F128 => {
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double_words[index] = DoubleWord::F128Start;
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double_words[index + 1] = DoubleWord::F128End;
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}
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Float::F64 => {
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double_words[index] = DoubleWord::F64;
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}
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Float::F32 => match &mut double_words[index] {
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DoubleWord::Words(words) => {
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words[(offset.bytes_usize() % 8) / 4] = Word::F32;
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}
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_ => unreachable!(),
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},
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Float::F16 => {
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// Match LLVM by passing `f16` in integer registers.
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}
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}
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} else {
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/* pass unaligned floats in integer registers */
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}
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data = parse_structure(cx, layout.field(cx, i), data.clone(), offset);
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}
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}
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_ => {
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if let BackendRepr::ScalarPair(scalar1, scalar2) = &layout.backend_repr {
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data = arg_scalar_pair(cx, scalar1, scalar2, offset, data);
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Primitive::Int(_, _) | Primitive::Pointer(_) => { /* pass in integer registers */ }
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},
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BackendRepr::SimdVector { .. } => {}
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BackendRepr::ScalableVector { .. } => {}
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BackendRepr::ScalarPair(..) | BackendRepr::Memory { .. } => match arg_layout.fields {
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FieldsShape::Primitive => {
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unreachable!("aggregates can't have `FieldsShape::Primitive`")
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}
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}
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FieldsShape::Union(_) => {
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if !arg_layout.is_zst() {
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if arg_layout.is_transparent() {
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let non_1zst_elem = arg_layout.non_1zst_field(cx).expect("not exactly one non-1-ZST field in non-ZST repr(transparent) union").1;
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classify(cx, &non_1zst_elem, offset, double_words);
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}
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}
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}
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FieldsShape::Array { .. } => {}
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FieldsShape::Arbitrary { .. } => match arg_layout.variants {
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Variants::Multiple { .. } => {}
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Variants::Single { .. } | Variants::Empty => {
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// Match Clang by ignoring whether a struct is packed and just considering
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// whether individual fields are aligned. GCC currently uses only integer
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// registers when passing packed structs.
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for i in arg_layout.fields.index_by_increasing_offset() {
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classify(
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cx,
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&arg_layout.field(cx, i),
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offset + arg_layout.fields.offset(i),
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double_words,
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);
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}
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}
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},
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},
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}
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data
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}
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fn classify_arg<'a, Ty, C>(cx: &C, arg: &mut ArgAbi<'a, Ty>, in_registers_max: Size)
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where
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fn classify_arg<'a, Ty, C>(
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cx: &C,
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arg: &mut ArgAbi<'a, Ty>,
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in_registers_max: Size,
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total_double_word_count: &mut usize,
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) where
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Ty: TyAbiInterface<'a, C> + Copy,
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C: HasDataLayout,
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{
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// 64-bit SPARC allocates argument stack space in 64-bit chunks (double words), some of which
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// are promoted to registers based on their position on the stack.
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// Keep track of the total number of double words used by arguments so far. This allows padding
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// arguments to be inserted where necessary to ensure that 16-aligned arguments are passed in an
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// aligned set of registers.
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let pad = !total_double_word_count.is_multiple_of(2) && arg.layout.align.abi.bytes() == 16;
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// The number of double words used by this argument.
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let double_word_count = arg.layout.size.bytes_usize().div_ceil(8);
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// The number of double words before this argument, including any padding.
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let start_double_word_count = *total_double_word_count + usize::from(pad);
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if arg.layout.pass_indirectly_in_non_rustic_abis(cx) {
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arg.make_indirect();
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*total_double_word_count += 1;
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return;
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}
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if !arg.layout.is_aggregate() {
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arg.extend_integer_width_to(64);
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*total_double_word_count = start_double_word_count + double_word_count;
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return;
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}
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let total = arg.layout.size;
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if total > in_registers_max {
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arg.make_indirect();
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*total_double_word_count += 1;
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return;
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}
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match arg.layout.fields {
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FieldsShape::Primitive => unreachable!(),
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FieldsShape::Array { .. } => {
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// Arrays are passed indirectly
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arg.make_indirect();
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return;
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*total_double_word_count = start_double_word_count + double_word_count;
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const ARGUMENT_REGISTERS: usize = 8;
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let mut double_words = [DoubleWord::Words([Word::Integer; 2]); ARGUMENT_REGISTERS / 2];
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classify(cx, &arg.layout, Size::ZERO, &mut double_words);
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let mut regs = [None; ARGUMENT_REGISTERS];
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let mut i = 0;
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let mut push = |reg| {
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regs[i] = Some(reg);
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i += 1;
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};
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let mut attrs = ArgAttribute::empty();
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for (index, double_word) in double_words.into_iter().enumerate() {
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if arg.layout.size.bytes_usize() <= index * 8 {
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break;
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}
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FieldsShape::Union(_) => {
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// Unions and are always treated as a series of 64-bit integer chunks
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}
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FieldsShape::Arbitrary { .. } => {
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// Structures with floating point numbers need special care.
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let mut data = parse_structure(
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cx,
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arg.layout,
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Sdata {
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prefix: [None; 8],
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prefix_index: 0,
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last_offset: Size::ZERO,
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has_float: false,
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arg_attribute: ArgAttribute::default(),
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},
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Size::ZERO,
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);
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if data.has_float {
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// Structure { float, int, int } doesn't like to be handled like
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// { float, long int }. Other way around it doesn't mind.
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if data.last_offset < arg.layout.size
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&& !data.last_offset.bytes().is_multiple_of(8)
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&& data.prefix_index < data.prefix.len()
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{
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data.prefix[data.prefix_index] = Some(Reg::i32());
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data.prefix_index += 1;
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data.last_offset += Reg::i32().size;
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match double_word {
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// `f128` must be aligned to be assigned a float register.
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DoubleWord::F128Start if (start_double_word_count + index).is_multiple_of(2) => {
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push(Reg::f128());
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}
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DoubleWord::F128Start => {
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// Clang currently handles this case nonsensically, always returning a packed
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// `struct { long double x; }` in an aligned quad floating-point register even when
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// the `long double` isn't aligned on the stack, which also makes all future
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// arguments get passed in the wrong registers. This passes the `f128` in integer
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// registers when it is unaligned, same as with `f32` and `f64`.
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push(Reg::i64());
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push(Reg::i64());
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}
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DoubleWord::F128End => {} // Already handled by `F128Start`
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DoubleWord::F64 => push(Reg::f64()),
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DoubleWord::Words([Word::Integer, Word::Integer]) => push(Reg::i64()),
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DoubleWord::Words(words) => {
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attrs |= ArgAttribute::InReg;
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for word in words {
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match word {
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Word::F32 => push(Reg::f32()),
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Word::Integer => push(Reg::i32()),
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}
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}
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let mut rest_size = arg.layout.size - data.last_offset;
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if !rest_size.bytes().is_multiple_of(8) && data.prefix_index < data.prefix.len() {
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data.prefix[data.prefix_index] = Some(Reg::i32());
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rest_size = rest_size - Reg::i32().size;
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}
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arg.cast_to(
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CastTarget::prefixed(data.prefix, Uniform::new(Reg::i64(), rest_size))
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.with_attrs(data.arg_attribute.into()),
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);
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return;
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}
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}
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}
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arg.cast_to(Uniform::new(Reg::i64(), total));
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let cast_target = match regs {
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[Some(reg), None, rest @ ..] => {
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// Just a single register is needed for this value.
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debug_assert!(rest.iter().all(|x| x.is_none()));
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CastTarget::from(reg)
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}
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_ => CastTarget::prefixed(regs, Uniform::new(Reg::i8(), Size::ZERO)),
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};
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arg.cast_to_and_pad_i32(cast_target.with_attrs(attrs.into()), pad);
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}
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pub(crate) fn compute_abi_info<'a, Ty, C>(cx: &C, fn_abi: &mut FnAbi<'a, Ty>)
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@ -217,23 +206,26 @@ where
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C: HasDataLayout + HasTargetSpec,
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{
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if !fn_abi.ret.is_ignore() && fn_abi.ret.layout.is_sized() {
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classify_arg(cx, &mut fn_abi.ret, Size::from_bytes(32));
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// A return value of 32 bytes or smaller is passed via registers.
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classify_arg(cx, &mut fn_abi.ret, Size::from_bytes(32), &mut 0);
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}
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// sparc64-unknown-linux-{gnu,musl,uclibc} doesn't ignore ZSTs.
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let passes_zsts = matches!(cx.target_spec().os, Os::Linux);
|
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|
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let mut double_word_count = 0;
|
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for arg in fn_abi.args.iter_mut() {
|
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if !arg.layout.is_sized() {
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continue;
|
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}
|
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if arg.is_ignore() {
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// sparc64-unknown-linux-{gnu,musl,uclibc} doesn't ignore ZSTs.
|
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if cx.target_spec().os == Os::Linux
|
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&& matches!(cx.target_spec().env, Env::Gnu | Env::Musl | Env::Uclibc)
|
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&& arg.layout.is_zst()
|
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{
|
||||
if passes_zsts && arg.layout.is_zst() {
|
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arg.make_indirect_from_ignore();
|
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double_word_count += 1;
|
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}
|
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return;
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continue;
|
||||
}
|
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classify_arg(cx, arg, Size::from_bytes(16));
|
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// An argument of 16 bytes or smaller is passed via registers.
|
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classify_arg(cx, arg, Size::from_bytes(16), &mut double_word_count);
|
||||
}
|
||||
}
|
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|
|
|
|||
|
|
@ -9,6 +9,7 @@
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#![crate_type = "lib"]
|
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#![feature(no_core, lang_items)]
|
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#![no_core]
|
||||
#![feature(f128)]
|
||||
|
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extern crate minicore;
|
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use minicore::*;
|
||||
|
|
@ -21,8 +22,33 @@ pub struct Franta {
|
|||
d: f32,
|
||||
}
|
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|
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#[repr(C, packed)]
|
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struct Misaligned(i32, f64);
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|
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#[repr(C)]
|
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struct AlignToMakeAssemblyShorter<T>(T, f64);
|
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|
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#[repr(C)]
|
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pub struct Floats(i32, f32, f64, f128);
|
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|
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#[repr(C)]
|
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pub struct LessFloats(f32, i32, f64);
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|
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#[repr(C)]
|
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pub struct NotMisaligned(i32, Misaligned);
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|
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#[repr(C, align(16))]
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pub struct Align16(f64, i32, i32);
|
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|
||||
impl Copy for Misaligned {}
|
||||
impl<T: Copy> Copy for AlignToMakeAssemblyShorter<T> {}
|
||||
impl Copy for Floats {}
|
||||
impl Copy for LessFloats {}
|
||||
impl Copy for NotMisaligned {}
|
||||
impl Copy for Align16 {}
|
||||
|
||||
// NB: due to delay slots the `ld` following the call is actually executed before the call.
|
||||
#[no_mangle]
|
||||
#[unsafe(no_mangle)]
|
||||
pub unsafe extern "C" fn callee(arg: Franta) {
|
||||
// CHECK-LABEL: callee:
|
||||
// CHECK: st %f3, [[PLACE_D:.*]]
|
||||
|
|
@ -54,7 +80,7 @@ extern "C" {
|
|||
fn tail_call_avoidance_fn();
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
#[unsafe(no_mangle)]
|
||||
pub unsafe extern "C" fn caller() {
|
||||
// CHECK-LABEL: caller:
|
||||
// CHECK: ld [{{.*}}], %f0
|
||||
|
|
@ -62,7 +88,168 @@ pub unsafe extern "C" fn caller() {
|
|||
// CHECK: ld [{{.*}}], %f2
|
||||
// CHECK: ld [{{.*}}], %f3
|
||||
// CHECK: call opaque_callee
|
||||
// CHECK: mov 3, %o2
|
||||
// CHECK: mov 3, %o2
|
||||
opaque_callee(Franta { a: 1.0, b: 2.0, c: 3.0, d: 4.0 }, 3);
|
||||
tail_call_avoidance_fn();
|
||||
}
|
||||
|
||||
// Check that misaligned floats aren't promoted to floating point registers.
|
||||
// CHECK-LABEL: misaligned_arg:
|
||||
#[unsafe(no_mangle)]
|
||||
extern "C" fn misaligned_arg(x: &mut AlignToMakeAssemblyShorter<Misaligned>, value: Misaligned) {
|
||||
// CHECK: srlx %o2, 32, %o2
|
||||
// CHECK-NEXT: stx %o1, [%o0]
|
||||
// CHECK-NEXT: retl
|
||||
// CHECK-NEXT: st %o2, [%o0+8]
|
||||
x.0 = value;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: misaligned_ret:
|
||||
#[unsafe(no_mangle)]
|
||||
extern "C" fn misaligned_ret(x: &AlignToMakeAssemblyShorter<Misaligned>) -> Misaligned {
|
||||
// CHECK: ld [%o0+8], %o1
|
||||
// CHECK-NEXT: ldx [%o0], %o0
|
||||
// CHECK-NEXT: retl
|
||||
// CHECK-NEXT: sllx %o1, 32, %o1
|
||||
x.0
|
||||
}
|
||||
|
||||
// Check structs where 32 >= size > 16 are promoted to register only as an argument.
|
||||
// Also check that the various floating-point types are promoted to the correct registers.
|
||||
// CHECK-LABEL: floats_arg:
|
||||
#[unsafe(no_mangle)]
|
||||
extern "C" fn floats_arg(x: &mut Floats, value: Floats) {
|
||||
// CHECK: ldx [%o1+24], %o2
|
||||
// CHECK-NEXT: ldx [%o1+16], %o3
|
||||
// CHECK-NEXT: ldx [%o1+8], %o4
|
||||
// CHECK-NEXT: ldx [%o1], %o1
|
||||
// CHECK-NEXT: stx %o2, [%o0+24]
|
||||
// CHECK-NEXT: stx %o3, [%o0+16]
|
||||
// CHECK-NEXT: stx %o4, [%o0+8]
|
||||
// CHECK-NEXT: retl
|
||||
// CHECK-NEXT: stx %o1, [%o0]
|
||||
*x = value;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: floats_ret:
|
||||
#[unsafe(no_mangle)]
|
||||
extern "C" fn floats_ret(x: &Floats) -> Floats {
|
||||
// CHECK: ld [%o0+4], %f1
|
||||
// CHECK-NEXT: ldd [%o0+8], %f2
|
||||
// CHECK-NEXT: ldd [%o0+16], %f4
|
||||
// CHECK-NEXT: ld [%o0], %o1
|
||||
// CHECK-NEXT: ldd [%o0+24], %f6
|
||||
// CHECK-NEXT: retl
|
||||
// CHECK-NEXT: sllx %o1, 32, %o0
|
||||
*x
|
||||
}
|
||||
|
||||
// Check float promotion when passing as an argument with a struct where size <= 16.
|
||||
// CHECK-LABEL: less_floats_arg:
|
||||
#[unsafe(no_mangle)]
|
||||
extern "C" fn less_floats_arg(x: &mut LessFloats, value: LessFloats) {
|
||||
// CHECK: st %f2, [%o0]
|
||||
// CHECK-NEXT: st %o1, [%o0+4]
|
||||
// CHECK-NEXT: retl
|
||||
// CHECK-NEXT: std %f4, [%o0+8]
|
||||
*x = value;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: less_floats_ret:
|
||||
#[unsafe(no_mangle)]
|
||||
extern "C" fn less_floats_ret(x: &LessFloats) -> LessFloats {
|
||||
// CHECK: ld [%o0], %f0
|
||||
// CHECK-NEXT: ldd [%o0+8], %f2
|
||||
// CHECK-NEXT: retl
|
||||
// CHECK-NEXT: ld [%o0+4], %o0
|
||||
*x
|
||||
}
|
||||
|
||||
// Check fields are promoted if they are aligned in the overall structure.
|
||||
// This matches Clang's behaviour but not GCC's.
|
||||
// CHECK-LABEL: not_misaligned_arg:
|
||||
#[unsafe(no_mangle)]
|
||||
extern "C" fn not_misaligned_arg(
|
||||
x: &mut AlignToMakeAssemblyShorter<NotMisaligned>,
|
||||
value: NotMisaligned,
|
||||
) {
|
||||
// CHECK: stx %o1, [%o0]
|
||||
// CHECK-NEXT: retl
|
||||
// CHECK-NEXT: std %f4, [%o0+8]
|
||||
x.0 = value;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: not_misaligned_ret:
|
||||
#[unsafe(no_mangle)]
|
||||
extern "C" fn not_misaligned_ret(x: &AlignToMakeAssemblyShorter<NotMisaligned>) -> NotMisaligned {
|
||||
// CHECK: ldx [%o0], %o1
|
||||
// CHECK-NEXT: ldd [%o0+8], %f2
|
||||
// CHECK-NEXT: retl
|
||||
// CHECK-NEXT: mov %o1, %o0
|
||||
x.0
|
||||
}
|
||||
|
||||
// Check that 16-aligned structs are allocated the correct registers.
|
||||
// CHECK-LABEL: align_16_arg:
|
||||
#[unsafe(no_mangle)]
|
||||
extern "C" fn align_16_arg(x: &mut Align16, value: Align16) {
|
||||
// CHECK: std %f4, [%o0]
|
||||
// CHECK-NEXT: retl
|
||||
// CHECK-NEXT: stx %o3, [%o0+8]
|
||||
*x = value;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: align_16_ret:
|
||||
#[unsafe(no_mangle)]
|
||||
extern "C" fn align_16_ret(x: &Align16) -> Align16 {
|
||||
// CHECK: ldd [%o0], %f0
|
||||
// CHECK-NEXT: retl
|
||||
// CHECK-NEXT: ldx [%o0+8], %o1
|
||||
*x
|
||||
}
|
||||
|
||||
// Check ZST args don't prevent further arguments from being processed.
|
||||
// CHECK-LABEL: zst_arg:
|
||||
#[unsafe(no_mangle)]
|
||||
extern "C" fn zst_arg(_: (), value: LessFloats, x: &mut LessFloats) {
|
||||
// CHECK: st %f0, [%o2]
|
||||
// CHECK-NEXT: st %o0, [%o2+4]
|
||||
// CHECK-NEXT: retl
|
||||
// CHECK-NEXT: std %f2, [%o2+8]
|
||||
*x = value;
|
||||
}
|
||||
|
||||
#[repr(C)]
|
||||
struct I32F32Input {
|
||||
a: i32,
|
||||
b: f32,
|
||||
}
|
||||
|
||||
#[repr(C)]
|
||||
struct I32F32Output {
|
||||
b: f32,
|
||||
a: i32,
|
||||
}
|
||||
|
||||
// The clang/LLVM implementation mentions that this case requires special handling.
|
||||
// CHECK-LABEL: i32_f32:
|
||||
#[unsafe(no_mangle)]
|
||||
extern "C" fn i32_f32(input: I32F32Input) -> I32F32Output {
|
||||
// CHECK: srlx %o0, 32, %o0
|
||||
// CHECK-NEXT: fmovs %f1, %f0
|
||||
// CHECK-NEXT: retl
|
||||
// CHECK-NEXT: nop
|
||||
I32F32Output { a: input.a, b: input.b }
|
||||
}
|
||||
|
||||
#[repr(C)]
|
||||
pub struct C {
|
||||
a: f64,
|
||||
b: f32,
|
||||
}
|
||||
|
||||
// regression test for https://github.com/rust-lang/rust/issues/147883.
|
||||
#[unsafe(no_mangle)]
|
||||
pub extern "C" fn foo(c: C) -> C {
|
||||
c
|
||||
}
|
||||
|
|
|
|||
|
|
@ -119,7 +119,7 @@ pub extern "C" fn returns_twou16s() -> TwoU16s {
|
|||
// aarch64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]])
|
||||
// loongarch64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]])
|
||||
// powerpc64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]])
|
||||
// sparc64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]])
|
||||
// sparc64-SAME: ([[ABI_TYPE:{ i64, i64 }]] {{.*}}[[ABI_VALUE:%.+]])
|
||||
// x86_64-SAME: ([[ABI_TYPE:{ i64, i16 }]] {{.*}}[[ABI_VALUE:%.+]])
|
||||
#[no_mangle]
|
||||
#[inline(never)]
|
||||
|
|
@ -148,7 +148,7 @@ pub extern "C" fn returns_fiveu16s() -> FiveU16s {
|
|||
|
||||
// aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i64 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i16 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
|
||||
// aarch64: ret [[ABI_TYPE]] [[ABI_VALUE]]
|
||||
|
|
@ -217,7 +217,7 @@ pub extern "C" fn returns_doubledouble() -> DoubleDouble {
|
|||
// aarch64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]])
|
||||
// loongarch64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]])
|
||||
// powerpc64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]])
|
||||
// sparc64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]])
|
||||
// sparc64-SAME: ([[ABI_TYPE:{ i64, i64 }]] {{.*}}[[ABI_VALUE:%.+]])
|
||||
// x86_64-SAME: ([[ABI_TYPE:{ i64, i32 }]] {{.*}}[[ABI_VALUE:%.+]])
|
||||
#[no_mangle]
|
||||
#[inline(never)]
|
||||
|
|
@ -246,7 +246,7 @@ pub extern "C" fn returns_three32s() -> Three32s {
|
|||
|
||||
// aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i64 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i32 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
|
||||
// aarch64: ret [[ABI_TYPE]] [[ABI_VALUE]]
|
||||
|
|
@ -399,7 +399,7 @@ pub fn call_fiveu16s() {
|
|||
// aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// powerpc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i64 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i16 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
|
||||
// CHECK: call void @receives_fiveu16s([[ABI_TYPE]] [[ABI_VALUE]])
|
||||
|
|
@ -424,7 +424,7 @@ pub fn return_fiveu16s() -> FiveU16s {
|
|||
|
||||
// aarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_fiveu16s()
|
||||
// loongarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_fiveu16s()
|
||||
// sparc64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_fiveu16s()
|
||||
// sparc64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ i64, i64 }]] @returns_fiveu16s()
|
||||
// x86_64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ i64, i16 }]] @returns_fiveu16s()
|
||||
|
||||
// aarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
|
|
@ -595,7 +595,7 @@ pub fn call_three32s() {
|
|||
// aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// powerpc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i64 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
// x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i32 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
|
||||
// CHECK: call void @receives_three32s([[ABI_TYPE]] [[ABI_VALUE]])
|
||||
|
|
@ -619,7 +619,7 @@ pub fn return_three32s() -> Three32s {
|
|||
|
||||
// aarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_three32s()
|
||||
// loongarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_three32s()
|
||||
// sparc64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_three32s()
|
||||
// sparc64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ i64, i64 }]] @returns_three32s()
|
||||
// x86_64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ i64, i32 }]] @returns_three32s()
|
||||
|
||||
// aarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]]
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue