update docs (#217)
* update docs * cargo clean deletes previous docs * remove stdsimd from coresimd examples * use stdsimd instead of coresimd in core docs * add stdsimd as a dev-dependency of coresimd
This commit is contained in:
gnzlbg
Alex Crichton
parent
40a0b1cc92
commit
b8a4b397ad
7 changed files with 96 additions and 195 deletions
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@ -22,7 +22,6 @@ dox() {
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rm -rf target/doc/$arch
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mkdir target/doc/$arch
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cargo clean
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cargo build --target $target
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rustdoc --target $target -o target/doc/$arch src/lib.rs --crate-name stdsimd --library-path target/$target/debug/deps
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@ -21,6 +21,7 @@ maintenance = { status = "experimental" }
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[dev-dependencies]
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cupid = "0.5.0"
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stdsimd-test = { version = "0.*", path = "../stdsimd-test" }
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stdsimd = { version = "0.0.3", path = ".." }
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[features]
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# Internal-usage only: denies all warnings.
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@ -1,26 +1,4 @@
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//! SIMD support
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//!
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//! This crate provides the fundamentals of supporting SIMD in Rust. This crate
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//! should compile on all platforms and provide `simd` and `vendor` modules at
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//! the top-level. The `simd` module contains *portable vector types* which
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//! should work across all platforms and be implemented in the most efficient
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//! manner possible for the platform at hand. The `vendor` module contains
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//! vendor intrinsics that operate over these SIMD types, typically
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//! corresponding to a particular CPU instruction
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//!
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//! ```rust
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//! extern crate coresimd as stdsimd;
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//! use stdsimd::simd::u32x4;
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//!
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//! fn main() {
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//! let a = u32x4::new(1, 2, 3, 4);
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//! let b = u32x4::splat(10);
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//! assert_eq!(a + b, u32x4::new(11, 12, 13, 14));
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//! }
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//! ```
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//!
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//! > **Note**: This crate is *nightly only* at the moment, and requires a
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//! > nightly rust toolchain to compile.
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//! SIMD and vendor intrinsics support library.
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//!
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//! This documentation is only for one particular architecture, you can find
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//! others at:
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@ -29,91 +7,6 @@
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//! * [`x86_64`](https://rust-lang-nursery.github.io/stdsimd/x86_64/stdsimd/)
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//! * [arm](https://rust-lang-nursery.github.io/stdsimd/arm/stdsimd/)
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//! * [aarch64](https://rust-lang-nursery.github.io/stdsimd/aarch64/stdsimd/)
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//!
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//! ## Portability
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//!
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//! The `simd` module and its types should be portable to all platforms. The
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//! runtime characteristics of these types may vary per platform and per CPU
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//! feature enabled, but they should always have the most optimized
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//! implementation for the target at hand.
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//!
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//! The `vendor` module provides no portability guarantees. The `vendor` module
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//! is per CPU architecture currently and provides intrinsics corresponding to
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//! functions for that particular CPU architecture. Note that the functions
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//! provided in this module are intended to correspond to CPU instructions and
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//! have no runtime support for whether you CPU actually supports the
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//! instruction.
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//!
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//! CPU target feature detection is done via the `cfg_feature_enabled!` macro
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//! at runtime. This macro will detect at runtime whether the specified feature
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//! is available or not, returning true or false depending on the current CPU.
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//!
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//! ```
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//! #![feature(cfg_target_feature)]
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//!
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//! #[macro_use]
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//! extern crate coresimd as stdsimd;
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//!
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//! fn main() {
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//! if cfg_feature_enabled!("avx2") {
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//! println!("avx2 intrinsics will work");
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//! } else {
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//! println!("avx2 intrinsics will not work");
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//! // undefined behavior: may generate a `SIGILL`.
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//! }
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//! }
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//! ```
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//!
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//! After verifying that a specified feature is available, use `target_feature`
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//! to enable a given feature and use the desired intrinsic.
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//!
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//! ```ignore
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//! # #![feature(cfg_target_feature)]
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//! # #![feature(target_feature)]
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//! # #[macro_use]
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//! # extern crate coresimd as stdsimd;
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//! # fn main() {
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//! # if cfg_feature_enabled!("avx2") {
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//! // avx2 specific code may be used in this function
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//! #[target_feature = "+avx2"]
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//! fn and_256() {
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//! // avx2 feature specific intrinsics will work here!
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//! use stdsimd::vendor::{__m256i, _mm256_and_si256};
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//!
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//! let a = __m256i::splat(5);
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//! let b = __m256i::splat(3);
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//!
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//! let got = unsafe { _mm256_and_si256(a, b) };
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//!
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//! assert_eq!(got, __m256i::splat(1));
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//! }
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//! # and_256();
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//! # }
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//! # }
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//! ```
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//!
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//! # Status
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//!
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//! This crate is intended for eventual inclusion into the standard library,
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//! but some work and experimentation is needed to get there! First and
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//! foremost you can help out by kicking the tires on this crate and seeing if
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//! it works for your use case! Next up you can help us fill out the [vendor
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//! intrinsics][vendor] to ensure that we've got all the SIMD support
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//! necessary.
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//!
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//! The language support and status of SIMD is also still a little up in the
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//! air right now, you may be interested in a few issues along these lines:
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//!
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//! * [Overal tracking issue for SIMD support][simd_tracking_issue]
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//! * [`cfg_target_feature` tracking issue][cfg_target_feature_issue]
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//! * [SIMD types currently not sound][simd_soundness_bug]
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//! * [`#[target_feature]` improvements][target_feature_impr]
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//!
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//! [vendor]: https://github.com/rust-lang-nursery/stdsimd/issues/40
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//! [simd_tracking_issue]: https://github.com/rust-lang/rust/issues/27731
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//! [cfg_target_feature_issue]: https://github.com/rust-lang/rust/issues/29717
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//! [simd_soundness_bug]: https://github.com/rust-lang/rust/issues/44367
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//! [target_feature_impr]: https://github.com/rust-lang/rust/issues/44839
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#![cfg_attr(feature = "strict", deny(warnings))]
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#![allow(dead_code)]
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@ -1774,7 +1774,7 @@ pub unsafe fn _mm256_shuffle_epi8(a: u8x32, b: u8x32) -> u8x32 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("avx2") {
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@ -2318,7 +2318,7 @@ pub unsafe fn _mm256_subs_epu8(a: u8x32, b: u8x32) -> u8x32 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("avx2") {
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@ -2367,7 +2367,7 @@ pub unsafe fn _mm256_unpackhi_epi8(a: i8x32, b: i8x32) -> i8x32 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("avx2") {
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@ -2415,7 +2415,7 @@ pub unsafe fn _mm256_unpacklo_epi8(a: i8x32, b: i8x32) -> i8x32 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("avx2") {
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@ -2459,7 +2459,7 @@ pub unsafe fn _mm256_unpackhi_epi16(a: i16x16, b: i16x16) -> i16x16 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("avx2") {
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@ -2503,7 +2503,7 @@ pub unsafe fn _mm256_unpacklo_epi16(a: i16x16, b: i16x16) -> i16x16 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("avx2") {
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@ -2542,7 +2542,7 @@ pub unsafe fn _mm256_unpackhi_epi32(a: i32x8, b: i32x8) -> i32x8 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("avx2") {
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@ -2581,7 +2581,7 @@ pub unsafe fn _mm256_unpacklo_epi32(a: i32x8, b: i32x8) -> i32x8 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("avx2") {
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@ -2620,7 +2620,7 @@ pub unsafe fn _mm256_unpackhi_epi64(a: i64x4, b: i64x4) -> i64x4 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("avx2") {
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@ -884,7 +884,7 @@ pub unsafe fn _mm_movemask_ps(a: f32x4) -> i32 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # // The real main function
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/// # fn main() {
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@ -936,7 +936,7 @@ pub unsafe fn _mm_loadh_pi(a: f32x4, p: *const f32) -> f32x4 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # // The real main function
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/// # fn main() {
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@ -96,7 +96,7 @@ pub unsafe fn _mm_cmpistrm(a: __m128i, b: __m128i, imm8: i8) -> u8x16 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("sse4.2") {
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@ -139,7 +139,7 @@ pub unsafe fn _mm_cmpistrm(a: __m128i, b: __m128i, imm8: i8) -> u8x16 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("sse4.2") {
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@ -180,7 +180,7 @@ pub unsafe fn _mm_cmpistrm(a: __m128i, b: __m128i, imm8: i8) -> u8x16 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("sse4.2") {
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@ -219,7 +219,7 @@ pub unsafe fn _mm_cmpistrm(a: __m128i, b: __m128i, imm8: i8) -> u8x16 {
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("sse4.2") {
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@ -392,7 +392,7 @@ pub unsafe fn _mm_cmpestrm(
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/// # #![feature(cfg_target_feature)]
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/// # #![feature(target_feature)]
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/// #
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/// # #[macro_use] extern crate coresimd as stdsimd;
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/// # #[macro_use] extern crate stdsimd;
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/// #
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/// # fn main() {
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/// # if cfg_feature_enabled!("sse4.2") {
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@ -1,26 +1,4 @@
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//! SIMD support
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//!
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//! This crate provides the fundamentals of supporting SIMD in Rust. This crate
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//! should compile on all platforms and provide `simd` and `vendor` modules at
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//! the top-level. The `simd` module contains *portable vector types* which
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//! should work across all platforms and be implemented in the most efficient
|
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//! manner possible for the platform at hand. The `vendor` module contains
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//! vendor intrinsics that operate over these SIMD types, typically
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//! corresponding to a particular CPU instruction
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//!
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//! ```rust
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//! extern crate stdsimd;
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//! use stdsimd::simd::u32x4;
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//!
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//! fn main() {
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//! let a = u32x4::new(1, 2, 3, 4);
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//! let b = u32x4::splat(10);
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//! assert_eq!(a + b, u32x4::new(11, 12, 13, 14));
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//! }
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//! ```
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//!
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//! > **Note**: This crate is *nightly only* at the moment, and requires a
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//! > nightly rust toolchain to compile.
|
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//! SIMD and vendor intrinsics support library.
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//!
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//! This documentation is only for one particular architecture, you can find
|
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//! others at:
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|
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@ -30,66 +8,96 @@
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//! * [arm](https://rust-lang-nursery.github.io/stdsimd/arm/stdsimd/)
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//! * [aarch64](https://rust-lang-nursery.github.io/stdsimd/aarch64/stdsimd/)
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//!
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//! ## Portability
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//! # Overview
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//!
|
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//! The `simd` module and its types should be portable to all platforms. The
|
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//! runtime characteristics of these types may vary per platform and per CPU
|
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//! feature enabled, but they should always have the most optimized
|
||||
//! implementation for the target at hand.
|
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//! The `simd` module exposes *portable vector types*. These types work on all
|
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//! platforms, but their run-time performance may vary depending on hardware
|
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//! support.
|
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//!
|
||||
//! The `vendor` module provides no portability guarantees. The `vendor` module
|
||||
//! is per CPU architecture currently and provides intrinsics corresponding to
|
||||
//! functions for that particular CPU architecture. Note that the functions
|
||||
//! provided in this module are intended to correspond to CPU instructions and
|
||||
//! have no runtime support for whether you CPU actually supports the
|
||||
//! instruction.
|
||||
//! The `vendor` module exposes vendor-specific intrinsics that typically
|
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//! correspond to a single machine instruction. In general, these intrinsics are
|
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//! not portable: their availability is architecture-dependent, and not all
|
||||
//! machines of that architecture might provide the intrinsic.
|
||||
//!
|
||||
//! CPU target feature detection is done via the `cfg_feature_enabled!` macro
|
||||
//! at runtime. This macro will detect at runtime whether the specified feature
|
||||
//! is available or not, returning true or false depending on the current CPU.
|
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//! Two macros make it possible to write portable code:
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//!
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//! ```
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//! #![feature(cfg_target_feature)]
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//! * `cfg!(target_feature = "feature")`: returns `true` if the `feature` is
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//! enabled in all CPUs that the binary will run on (at compile-time)
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//! * `cfg_feature_enabled!("feature")`: returns `true` if the `feature` is
|
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//! enabled in the CPU in which the binary is currently running on (at run-time,
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//! unless the result is known at compile time)
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//!
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//! # Example
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//!
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//! ```rust
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//! #![feature(cfg_target_feature, target_feature)]
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//!
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//! #[macro_use]
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//! extern crate stdsimd;
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//! use stdsimd::vendor;
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//! use stdsimd::simd::i32x4;
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//!
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//! fn main() {
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//! if cfg_feature_enabled!("avx2") {
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//! println!("avx2 intrinsics will work");
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//! } else {
|
||||
//! println!("avx2 intrinsics will not work");
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//! // undefined behavior: may generate a `SIGILL`.
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//! let a = i32x4::new(1, 2, 3, 4);
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//! let b = i32x4::splat(10);
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//! assert_eq!(b, i32x4::new(10, 10, 10, 10));
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//! let c = a + b;
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//! assert_eq!(c, i32x4::new(11, 12, 13, 14));
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//! assert_eq!(sum_portable(b), 40);
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//! assert_eq!(sum_ct(b), 40);
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//! assert_eq!(sum_rt(b), 40);
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//! }
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//!
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//! // Sums the elements of the vector.
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//! fn sum_portable(x: i32x4) -> i32 {
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//! let mut r = 0;
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//! for i in 0..4 {
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//! r += x.extract(i);
|
||||
//! }
|
||||
//! r
|
||||
//! }
|
||||
//!
|
||||
//! // Sums the elements of the vector using SSE2 instructions.
|
||||
//! // This function is only safe to call if the CPU where the
|
||||
//! // binary runs supports SSE2.
|
||||
//! #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
|
||||
//! #[target_feature = "+sse2"]
|
||||
//! unsafe fn sum_sse2(x: i32x4) -> i32 {
|
||||
//! let x = vendor::_mm_add_epi32(x, vendor::_mm_srli_si128(x.into(), 8).into());
|
||||
//! let x = vendor::_mm_add_epi32(x, vendor::_mm_srli_si128(x.into(), 4).into());
|
||||
//! vendor::_mm_cvtsi128_si32(x)
|
||||
//! }
|
||||
//!
|
||||
//! // Uses the SSE2 version if SSE2 is enabled for all target
|
||||
//! // CPUs at compile-time (does not perform any run-time
|
||||
//! // feature detection).
|
||||
//! fn sum_ct(x: i32x4) -> i32 {
|
||||
//! #[cfg(all(any(target_arch = "x86_64", target_arch = "x86"),
|
||||
//! target_feature = "sse2"))]
|
||||
//! {
|
||||
//! // This function is only available for x86/x86_64 targets,
|
||||
//! // and is only safe to call it if the target supports SSE2
|
||||
//! unsafe { sum_sse2(x) }
|
||||
//! }
|
||||
//! #[cfg(not(all(any(target_arch = "x86_64", target_arch = "x86"),
|
||||
//! target_feature = "sse2")))]
|
||||
//! {
|
||||
//! sum_portable(x)
|
||||
//! }
|
||||
//! }
|
||||
//! ```
|
||||
//!
|
||||
//! After verifying that a specified feature is available, use `target_feature`
|
||||
//! to enable a given feature and use the desired intrinsic.
|
||||
//!
|
||||
//! ```ignore
|
||||
//! # #![feature(cfg_target_feature)]
|
||||
//! # #![feature(target_feature)]
|
||||
//! # #[macro_use]
|
||||
//! # extern crate stdsimd;
|
||||
//! # fn main() {
|
||||
//! # if cfg_feature_enabled!("avx2") {
|
||||
//! // avx2 specific code may be used in this function
|
||||
//! #[target_feature = "+avx2"]
|
||||
//! fn and_256() {
|
||||
//! // avx2 feature specific intrinsics will work here!
|
||||
//! use stdsimd::vendor::{__m256i, _mm256_and_si256};
|
||||
//!
|
||||
//! let a = __m256i::splat(5);
|
||||
//! let b = __m256i::splat(3);
|
||||
//!
|
||||
//! let got = unsafe { _mm256_and_si256(a, b) };
|
||||
//!
|
||||
//! assert_eq!(got, __m256i::splat(1));
|
||||
//! // Detects SSE2 at run-time, and uses a SIMD intrinsic if enabled.
|
||||
//! fn sum_rt(x: i32x4) -> i32 {
|
||||
//! #[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
|
||||
//! {
|
||||
//! // If SSE2 is not enabled at compile-time, this
|
||||
//! // detects whether SSE2 is available at run-time:
|
||||
//! if cfg_feature_enabled!("sse2") {
|
||||
//! return unsafe { sum_sse2(x) };
|
||||
//! }
|
||||
//! }
|
||||
//! sum_portable(x)
|
||||
//! }
|
||||
//! # and_256();
|
||||
//! # }
|
||||
//! # }
|
||||
//! ```
|
||||
//!
|
||||
//! # Status
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue