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convert _mm512_maskz_shufflehi_epi16 to const generics

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Rémy Rakic 2021-03-05 00:50:18 +01:00 • committed by Amanieu d'Antras
parent 4662634c17
commit c575dfa6f9
1 changed files with 7 additions and 11 deletions
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18
library/stdarch/crates/core_arch/src/x86/avx512bw.rs
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@ -7362,15 +7362,11 @@ pub unsafe fn _mm512_mask_shufflehi_epi16<const IMM8: i32>(
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_shufflehi_epi16&expand=5211)
#[inline]
#[target_feature(enable = "avx512bw")]
#[cfg_attr(test, assert_instr(vpshufhw, imm8 = 0))]
#[rustc_args_required_const(2)]
pub unsafe fn _mm512_maskz_shufflehi_epi16(k: __mmask32, a: __m512i, imm8: i32) -> __m512i {
macro_rules! call {
($imm8:expr) => {
_mm512_shufflehi_epi16(a, $imm8)
};
}
let r = constify_imm8_sae!(imm8, call);
#[cfg_attr(test, assert_instr(vpshufhw, IMM8 = 0))]
#[rustc_legacy_const_generics(2)]
pub unsafe fn _mm512_maskz_shufflehi_epi16<const IMM8: i32>(k: __mmask32, a: __m512i) -> __m512i {
static_assert_imm8!(IMM8);
let r = _mm512_shufflehi_epi16(a, IMM8);
let zero = _mm512_setzero_si512().as_i16x32();
transmute(simd_select_bitmask(k, r.as_i16x32(), zero))
}
@ -16419,10 +16415,10 @@ mod tests {
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
);
let r = _mm512_maskz_shufflehi_epi16(0, a, 0b00_01_01_11);
let r = _mm512_maskz_shufflehi_epi16::<0b00_01_01_11>(0, a);
assert_eq_m512i(r, _mm512_setzero_si512());
let r =
_mm512_maskz_shufflehi_epi16(0b11111111_11111111_11111111_11111111, a, 0b00_01_01_11);
_mm512_maskz_shufflehi_epi16::<0b00_01_01_11>(0b11111111_11111111_11111111_11111111, a);
#[rustfmt::skip]
let e = _mm512_set_epi16(
3, 2, 2, 0, 4, 5, 6, 7, 11, 10, 10, 8, 12, 13, 14, 15,