From c72fcfbc40a57f88de1a64a2bc69f85e2844b77e Mon Sep 17 00:00:00 2001
From: Scott Mabin <scott@mabez.dev>
Date: Tue, 28 May 2024 13:38:43 +0100
Subject: [PATCH] Add Xtensa as an experimental target

---
 compiler/rustc_llvm/src/lib.rs             | 7 +++++++
 src/bootstrap/src/core/build_steps/llvm.rs | 2 +-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/compiler/rustc_llvm/src/lib.rs b/compiler/rustc_llvm/src/lib.rs
index 6a570c97c888..ae1848a73630 100644
--- a/compiler/rustc_llvm/src/lib.rs
+++ b/compiler/rustc_llvm/src/lib.rs
@@ -188,6 +188,13 @@ pub fn initialize_available_targets() {
         LLVMInitializeHexagonAsmPrinter,
         LLVMInitializeHexagonAsmParser
     );
+    init_target!(
+        llvm_component = "xtensa",
+        LLVMInitializeXtensaTargetInfo,
+        LLVMInitializeXtensaTarget,
+        LLVMInitializeXtensaTargetMC,
+        LLVMInitializeXtensaAsmParser
+    );
     init_target!(
         llvm_component = "webassembly",
         LLVMInitializeWebAssemblyTargetInfo,
diff --git a/src/bootstrap/src/core/build_steps/llvm.rs b/src/bootstrap/src/core/build_steps/llvm.rs
index 8ca7af2febee..ebac27cd92c2 100644
--- a/src/bootstrap/src/core/build_steps/llvm.rs
+++ b/src/bootstrap/src/core/build_steps/llvm.rs
@@ -330,7 +330,7 @@ impl Step for Llvm {
 
         let llvm_exp_targets = match builder.config.llvm_experimental_targets {
             Some(ref s) => s,
-            None => "AVR;M68k;CSKY",
+            None => "AVR;M68k;CSKY;Xtensa",
         };
 
         let assertions = if builder.config.llvm_assertions { "ON" } else { "OFF" };