Convert _mm_cmp_ps to const generics and fix imm width
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c0ab6f2173
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c7a5963449
1 changed files with 6 additions and 10 deletions
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@ -822,16 +822,12 @@ pub unsafe fn _mm256_cmp_pd<const IMM8: i32>(a: __m256d, b: __m256d) -> __m256d
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmp_ps)
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#[inline]
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#[target_feature(enable = "avx,sse")]
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#[cfg_attr(test, assert_instr(vcmpeqps, imm8 = 0))] // TODO Validate vcmpps
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#[rustc_args_required_const(2)]
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#[cfg_attr(test, assert_instr(vcmpeqps, IMM8 = 0))] // TODO Validate vcmpps
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#[rustc_legacy_const_generics(2)]
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#[stable(feature = "simd_x86", since = "1.27.0")]
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pub unsafe fn _mm_cmp_ps(a: __m128, b: __m128, imm8: i32) -> __m128 {
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macro_rules! call {
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($imm8:expr) => {
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vcmpps(a, b, $imm8)
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};
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}
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constify_imm6!(imm8, call)
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pub unsafe fn _mm_cmp_ps<const IMM8: i32>(a: __m128, b: __m128) -> __m128 {
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static_assert_imm5!(IMM8);
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vcmpps(a, b, IMM8 as i8)
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}
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/// Compares packed single-precision (32-bit) floating-point
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@ -3645,7 +3641,7 @@ mod tests {
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unsafe fn test_mm_cmp_ps() {
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let a = _mm_setr_ps(4., 3., 2., 5.);
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let b = _mm_setr_ps(4., 9., 16., 25.);
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let r = _mm_cmp_ps(a, b, _CMP_GE_OS);
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let r = _mm_cmp_ps::<_CMP_GE_OS>(a, b);
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assert!(get_m128(r, 0).is_nan());
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assert_eq!(get_m128(r, 1), 0.);
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assert_eq!(get_m128(r, 2), 0.);
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