support s64|u64 for neon instruction vqadd and vqsub (#1090)
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2 changed files with 204 additions and 4 deletions
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@ -2357,6 +2357,38 @@ pub unsafe fn vqsubq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
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vqsubq_u32_(a, b)
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}
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/// Saturating subtract
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u64"))]
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#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))]
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pub unsafe fn vqsub_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v1i64")]
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v1i64")]
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fn vqsub_u64_(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t;
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}
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vqsub_u64_(a, b)
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}
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/// Saturating subtract
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u64"))]
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#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))]
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pub unsafe fn vqsubq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v2i64")]
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v2i64")]
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fn vqsubq_u64_(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t;
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}
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vqsubq_u64_(a, b)
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}
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/// Saturating subtract
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#[inline]
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#[target_feature(enable = "neon")]
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@ -2453,6 +2485,38 @@ pub unsafe fn vqsubq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
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vqsubq_s32_(a, b)
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}
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/// Saturating subtract
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s64"))]
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#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))]
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pub unsafe fn vqsub_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v1i64")]
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v1i64")]
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fn vqsub_s64_(a: int64x1_t, b: int64x1_t) -> int64x1_t;
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}
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vqsub_s64_(a, b)
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}
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/// Saturating subtract
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s64"))]
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#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))]
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pub unsafe fn vqsubq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v2i64")]
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v2i64")]
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fn vqsubq_s64_(a: int64x2_t, b: int64x2_t) -> int64x2_t;
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}
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vqsubq_s64_(a, b)
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}
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/// Halving add
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#[inline]
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#[target_feature(enable = "neon")]
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@ -2933,6 +2997,38 @@ pub unsafe fn vqaddq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
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vqaddq_u32_(a, b)
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}
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/// Saturating add
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u64"))]
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#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))]
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pub unsafe fn vqadd_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v1i64")]
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v1i64")]
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fn vqadd_u64_(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t;
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}
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vqadd_u64_(a, b)
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}
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/// Saturating add
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u64"))]
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#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))]
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pub unsafe fn vqaddq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v2i64")]
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v2i64")]
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fn vqaddq_u64_(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t;
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}
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vqaddq_u64_(a, b)
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}
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/// Saturating add
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#[inline]
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#[target_feature(enable = "neon")]
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@ -3029,6 +3125,38 @@ pub unsafe fn vqaddq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
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vqaddq_s32_(a, b)
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}
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/// Saturating add
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s64"))]
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#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))]
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pub unsafe fn vqadd_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v1i64")]
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v1i64")]
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fn vqadd_s64_(a: int64x1_t, b: int64x1_t) -> int64x1_t;
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}
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vqadd_s64_(a, b)
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}
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/// Saturating add
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s64"))]
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#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))]
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pub unsafe fn vqaddq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v2i64")]
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v2i64")]
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fn vqaddq_s64_(a: int64x2_t, b: int64x2_t) -> int64x2_t;
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}
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vqaddq_s64_(a, b)
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}
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/// Multiply
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#[inline]
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#[target_feature(enable = "neon")]
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@ -6171,6 +6299,24 @@ mod test {
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vqsub_u64() {
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let a: u64x1 = u64x1::new(42);
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let b: u64x1 = u64x1::new(1);
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let e: u64x1 = u64x1::new(41);
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let r: u64x1 = transmute(vqsub_u64(transmute(a), transmute(b)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vqsubq_u64() {
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let a: u64x2 = u64x2::new(42, 42);
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let b: u64x2 = u64x2::new(1, 2);
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let e: u64x2 = u64x2::new(41, 40);
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let r: u64x2 = transmute(vqsubq_u64(transmute(a), transmute(b)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vqsub_s8() {
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let a: i8x8 = i8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
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@ -6225,6 +6371,24 @@ mod test {
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vqsub_s64() {
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let a: i64x1 = i64x1::new(42);
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let b: i64x1 = i64x1::new(1);
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let e: i64x1 = i64x1::new(41);
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let r: i64x1 = transmute(vqsub_s64(transmute(a), transmute(b)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vqsubq_s64() {
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let a: i64x2 = i64x2::new(42, 42);
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let b: i64x2 = i64x2::new(1, 2);
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let e: i64x2 = i64x2::new(41, 40);
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let r: i64x2 = transmute(vqsubq_s64(transmute(a), transmute(b)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vhadd_u8() {
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let a: u8x8 = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
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@ -6495,6 +6659,24 @@ mod test {
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vqadd_u64() {
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let a: u64x1 = u64x1::new(42);
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let b: u64x1 = u64x1::new(1);
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let e: u64x1 = u64x1::new(43);
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let r: u64x1 = transmute(vqadd_u64(transmute(a), transmute(b)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vqaddq_u64() {
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let a: u64x2 = u64x2::new(42, 42);
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let b: u64x2 = u64x2::new(1, 2);
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let e: u64x2 = u64x2::new(43, 44);
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let r: u64x2 = transmute(vqaddq_u64(transmute(a), transmute(b)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vqadd_s8() {
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let a: i8x8 = i8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
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@ -6549,6 +6731,24 @@ mod test {
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vqadd_s64() {
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let a: i64x1 = i64x1::new(42);
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let b: i64x1 = i64x1::new(1);
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let e: i64x1 = i64x1::new(43);
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let r: i64x1 = transmute(vqadd_s64(transmute(a), transmute(b)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vqaddq_s64() {
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let a: i64x2 = i64x2::new(42, 42);
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let b: i64x2 = i64x2::new(1, 2);
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let e: i64x2 = i64x2::new(43, 44);
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let r: i64x2 = transmute(vqaddq_s64(transmute(a), transmute(b)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vmul_s8() {
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let a: i8x8 = i8x8::new(1, 2, 1, 2, 1, 2, 1, 2);
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@ -820,13 +820,13 @@ arm = vqsub.s
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aarch64 = uqsub
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link-arm = vqsubu._EXT_
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link-aarch64 = uqsub._EXT_
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generate uint*_t
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generate uint*_t, uint64x*_t
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arm = vqsub.s
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aarch64 = sqsub
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link-arm = vqsubs._EXT_
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link-aarch64 = sqsub._EXT_
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generate int*_t
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generate int*_t, int64x*_t
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/// Halving add
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name = vhadd
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@ -876,13 +876,13 @@ arm = vqadd.s
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aarch64 = uqadd
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link-arm = vqaddu._EXT_
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link-aarch64 = uqadd._EXT_
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generate uint*_t
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generate uint*_t, uint64x*_t
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arm = vqadd.s
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aarch64 = sqadd
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link-arm = vqadds._EXT_
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link-aarch64 = sqadd._EXT_
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generate int*_t
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generate int*_t, int64x*_t
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/// Multiply
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name = vmul
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