convert _mm256_mask_srli_epi16 to const generics

This commit is contained in:
Rémy Rakic 2021-03-05 00:16:50 +01:00 committed by Amanieu d'Antras
parent 2fb0581aa4
commit ce16a2fcfb

View file

@ -5376,15 +5376,15 @@ pub unsafe fn _mm512_maskz_srli_epi16<const IMM8: i32>(k: __mmask32, a: __m512i)
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_srli_epi16&expand=5508)
#[inline]
#[target_feature(enable = "avx512bw,avx512vl")]
#[cfg_attr(test, assert_instr(vpsrlw, imm8 = 5))]
#[rustc_args_required_const(3)]
pub unsafe fn _mm256_mask_srli_epi16(src: __m256i, k: __mmask16, a: __m256i, imm8: i32) -> __m256i {
macro_rules! call {
($imm8:expr) => {
_mm256_srli_epi16::<$imm8>(a)
};
}
let shf = constify_imm8_sae!(imm8, call);
#[cfg_attr(test, assert_instr(vpsrlw, IMM8 = 5))]
#[rustc_legacy_const_generics(3)]
pub unsafe fn _mm256_mask_srli_epi16<const IMM8: i32>(
src: __m256i,
k: __mmask16,
a: __m256i,
) -> __m256i {
static_assert_imm8!(IMM8);
let shf = _mm256_srli_epi16::<IMM8>(a);
transmute(simd_select_bitmask(k, shf.as_i16x16(), src.as_i16x16()))
}
@ -14724,9 +14724,9 @@ mod tests {
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_srli_epi16() {
let a = _mm256_set1_epi16(1 << 1);
let r = _mm256_mask_srli_epi16(a, 0, a, 2);
let r = _mm256_mask_srli_epi16::<2>(a, 0, a);
assert_eq_m256i(r, a);
let r = _mm256_mask_srli_epi16(a, 0b11111111_11111111, a, 2);
let r = _mm256_mask_srli_epi16::<2>(a, 0b11111111_11111111, a);
let e = _mm256_set1_epi16(0);
assert_eq_m256i(r, e);
}