Auto merge of #3604 - RalfJung:intrinsics, r=RalfJung
intrinsics: just panic when they get used incorrectly This is already what we do most of the time, so do it consistently.
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d0b2c6611b
3 changed files with 36 additions and 36 deletions
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@ -25,93 +25,93 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
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let intrinsic_structure: Vec<_> = intrinsic_name.split('_').collect();
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fn read_ord<'tcx>(ord: &str) -> InterpResult<'tcx, AtomicReadOrd> {
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Ok(match ord {
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fn read_ord(ord: &str) -> AtomicReadOrd {
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match ord {
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"seqcst" => AtomicReadOrd::SeqCst,
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"acquire" => AtomicReadOrd::Acquire,
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"relaxed" => AtomicReadOrd::Relaxed,
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_ => throw_unsup_format!("unsupported read ordering `{ord}`"),
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})
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_ => panic!("invalid read ordering `{ord}`"),
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}
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}
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fn write_ord<'tcx>(ord: &str) -> InterpResult<'tcx, AtomicWriteOrd> {
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Ok(match ord {
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fn write_ord(ord: &str) -> AtomicWriteOrd {
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match ord {
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"seqcst" => AtomicWriteOrd::SeqCst,
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"release" => AtomicWriteOrd::Release,
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"relaxed" => AtomicWriteOrd::Relaxed,
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_ => throw_unsup_format!("unsupported write ordering `{ord}`"),
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})
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_ => panic!("invalid write ordering `{ord}`"),
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}
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}
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fn rw_ord<'tcx>(ord: &str) -> InterpResult<'tcx, AtomicRwOrd> {
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Ok(match ord {
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fn rw_ord(ord: &str) -> AtomicRwOrd {
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match ord {
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"seqcst" => AtomicRwOrd::SeqCst,
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"acqrel" => AtomicRwOrd::AcqRel,
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"acquire" => AtomicRwOrd::Acquire,
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"release" => AtomicRwOrd::Release,
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"relaxed" => AtomicRwOrd::Relaxed,
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_ => throw_unsup_format!("unsupported read-write ordering `{ord}`"),
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})
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_ => panic!("invalid read-write ordering `{ord}`"),
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}
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}
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fn fence_ord<'tcx>(ord: &str) -> InterpResult<'tcx, AtomicFenceOrd> {
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Ok(match ord {
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fn fence_ord(ord: &str) -> AtomicFenceOrd {
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match ord {
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"seqcst" => AtomicFenceOrd::SeqCst,
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"acqrel" => AtomicFenceOrd::AcqRel,
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"acquire" => AtomicFenceOrd::Acquire,
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"release" => AtomicFenceOrd::Release,
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_ => throw_unsup_format!("unsupported fence ordering `{ord}`"),
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})
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_ => panic!("invalid fence ordering `{ord}`"),
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}
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}
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match &*intrinsic_structure {
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["load", ord] => this.atomic_load(args, dest, read_ord(ord)?)?,
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["store", ord] => this.atomic_store(args, write_ord(ord)?)?,
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["load", ord] => this.atomic_load(args, dest, read_ord(ord))?,
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["store", ord] => this.atomic_store(args, write_ord(ord))?,
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["fence", ord] => this.atomic_fence_intrinsic(args, fence_ord(ord)?)?,
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["singlethreadfence", ord] => this.compiler_fence_intrinsic(args, fence_ord(ord)?)?,
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["fence", ord] => this.atomic_fence_intrinsic(args, fence_ord(ord))?,
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["singlethreadfence", ord] => this.compiler_fence_intrinsic(args, fence_ord(ord))?,
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["xchg", ord] => this.atomic_exchange(args, dest, rw_ord(ord)?)?,
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["xchg", ord] => this.atomic_exchange(args, dest, rw_ord(ord))?,
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["cxchg", ord1, ord2] =>
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this.atomic_compare_exchange(args, dest, rw_ord(ord1)?, read_ord(ord2)?)?,
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this.atomic_compare_exchange(args, dest, rw_ord(ord1), read_ord(ord2))?,
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["cxchgweak", ord1, ord2] =>
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this.atomic_compare_exchange_weak(args, dest, rw_ord(ord1)?, read_ord(ord2)?)?,
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this.atomic_compare_exchange_weak(args, dest, rw_ord(ord1), read_ord(ord2))?,
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["or", ord] =>
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this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitOr, false), rw_ord(ord)?)?,
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this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitOr, false), rw_ord(ord))?,
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["xor", ord] =>
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this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitXor, false), rw_ord(ord)?)?,
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this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitXor, false), rw_ord(ord))?,
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["and", ord] =>
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this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitAnd, false), rw_ord(ord)?)?,
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this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitAnd, false), rw_ord(ord))?,
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["nand", ord] =>
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this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitAnd, true), rw_ord(ord)?)?,
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this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitAnd, true), rw_ord(ord))?,
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["xadd", ord] =>
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this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::Add, false), rw_ord(ord)?)?,
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this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::Add, false), rw_ord(ord))?,
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["xsub", ord] =>
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this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::Sub, false), rw_ord(ord)?)?,
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this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::Sub, false), rw_ord(ord))?,
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["min", ord] => {
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// Later we will use the type to indicate signed vs unsigned,
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// so make sure it matches the intrinsic name.
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assert!(matches!(args[1].layout.ty.kind(), ty::Int(_)));
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this.atomic_rmw_op(args, dest, AtomicOp::Min, rw_ord(ord)?)?;
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this.atomic_rmw_op(args, dest, AtomicOp::Min, rw_ord(ord))?;
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}
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["umin", ord] => {
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// Later we will use the type to indicate signed vs unsigned,
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// so make sure it matches the intrinsic name.
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assert!(matches!(args[1].layout.ty.kind(), ty::Uint(_)));
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this.atomic_rmw_op(args, dest, AtomicOp::Min, rw_ord(ord)?)?;
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this.atomic_rmw_op(args, dest, AtomicOp::Min, rw_ord(ord))?;
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}
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["max", ord] => {
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// Later we will use the type to indicate signed vs unsigned,
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// so make sure it matches the intrinsic name.
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assert!(matches!(args[1].layout.ty.kind(), ty::Int(_)));
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this.atomic_rmw_op(args, dest, AtomicOp::Max, rw_ord(ord)?)?;
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this.atomic_rmw_op(args, dest, AtomicOp::Max, rw_ord(ord))?;
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}
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["umax", ord] => {
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// Later we will use the type to indicate signed vs unsigned,
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// so make sure it matches the intrinsic name.
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assert!(matches!(args[1].layout.ty.kind(), ty::Uint(_)));
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this.atomic_rmw_op(args, dest, AtomicOp::Max, rw_ord(ord)?)?;
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this.atomic_rmw_op(args, dest, AtomicOp::Max, rw_ord(ord))?;
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}
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_ => return Ok(EmulateItemResult::NotSupported),
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@ -81,7 +81,7 @@ pub(super) trait EvalContextExt<'mir, 'tcx: 'mir>:
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let scale = this.read_scalar(scale)?.to_i8()?;
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if !matches!(scale, 1 | 2 | 4 | 8) {
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throw_unsup_format!("invalid gather scale {scale}");
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panic!("invalid gather scale {scale}");
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}
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let scale = i64::from(scale);
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@ -200,7 +200,7 @@ impl FloatBinOp {
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) -> InterpResult<'tcx, Self> {
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// Only bits 0..=4 are used, remaining should be zero.
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if imm & !0b1_1111 != 0 {
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throw_unsup_format!("invalid `imm` parameter of {intrinsic}: 0x{imm:x}");
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panic!("invalid `imm` parameter of {intrinsic}: 0x{imm:x}");
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}
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// Bit 4 specifies whether the operation is quiet or signaling, which
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// we do not care in Miri.
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@ -683,7 +683,7 @@ fn rounding_from_imm<'tcx>(rounding: i32) -> InterpResult<'tcx, rustc_apfloat::R
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// SSE status register. Since we do not support modifying it from
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// Miri (or Rust), we assume it to be at its default mode (round-to-nearest).
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0b100..=0b111 => Ok(rustc_apfloat::Round::NearestTiesToEven),
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rounding => throw_unsup_format!("unsupported rounding mode 0x{rounding:02x}"),
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rounding => panic!("invalid rounding mode 0x{rounding:02x}"),
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}
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}
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