From d12027810cb26e61f52554ea57d36e17debc38b5 Mon Sep 17 00:00:00 2001 From: James Barford-Evans Date: Fri, 31 Jan 2025 11:16:13 +0000 Subject: [PATCH] Remove hand crafted intrinsics that are now generated --- .../crates/core_arch/src/aarch64/mod.rs | 3 - .../crates/core_arch/src/aarch64/neon/mod.rs | 4024 +---------------- .../stdarch/crates/core_arch/src/arm/mod.rs | 9 - .../stdarch/crates/core_arch/src/arm/neon.rs | 1441 ------ .../crates/core_arch/src/arm_shared/crc.rs | 279 -- .../crates/core_arch/src/arm_shared/crypto.rs | 544 --- .../crates/core_arch/src/arm_shared/mod.rs | 42 +- .../core_arch/src/arm_shared/neon/mod.rs | 3532 ++------------- 8 files changed, 492 insertions(+), 9382 deletions(-) delete mode 100644 library/stdarch/crates/core_arch/src/arm_shared/crc.rs delete mode 100644 library/stdarch/crates/core_arch/src/arm_shared/crypto.rs diff --git a/library/stdarch/crates/core_arch/src/aarch64/mod.rs b/library/stdarch/crates/core_arch/src/aarch64/mod.rs index 594c6d18c681..0defde52fd8d 100644 --- a/library/stdarch/crates/core_arch/src/aarch64/mod.rs +++ b/library/stdarch/crates/core_arch/src/aarch64/mod.rs @@ -10,10 +10,7 @@ mod mte; #[unstable(feature = "stdarch_aarch64_mte", issue = "129010")] pub use self::mte::*; -// NEON intrinsics are currently broken on big-endian, so don't expose them. (#1484) -#[cfg(target_endian = "little")] mod neon; -#[cfg(target_endian = "little")] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub use self::neon::*; diff --git a/library/stdarch/crates/core_arch/src/aarch64/neon/mod.rs b/library/stdarch/crates/core_arch/src/aarch64/neon/mod.rs index 1b82a90719cf..961f9502155c 100644 --- a/library/stdarch/crates/core_arch/src/aarch64/neon/mod.rs +++ b/library/stdarch/crates/core_arch/src/aarch64/neon/mod.rs @@ -14,8 +14,7 @@ use crate::{ core_arch::{arm_shared::*, simd::*}, hint::unreachable_unchecked, intrinsics::simd::*, - mem::{transmute, zeroed}, - ptr::{read_unaligned, write_unaligned}, + mem::transmute, }; #[cfg(test)] use stdarch_test::assert_instr; @@ -71,300 +70,6 @@ pub struct float64x2x4_t( pub float64x2_t, ); -#[allow(improper_ctypes)] -unsafe extern "unadjusted" { - // absolute value - #[link_name = "llvm.aarch64.neon.abs.i64"] - fn vabsd_s64_(a: i64) -> i64; - #[link_name = "llvm.aarch64.neon.abs.v1i64"] - fn vabs_s64_(a: int64x1_t) -> int64x1_t; - #[link_name = "llvm.aarch64.neon.abs.v2i64"] - fn vabsq_s64_(a: int64x2_t) -> int64x2_t; - - #[link_name = "llvm.aarch64.neon.suqadd.v8i8"] - fn vuqadd_s8_(a: int8x8_t, b: uint8x8_t) -> int8x8_t; - #[link_name = "llvm.aarch64.neon.suqadd.v16i8"] - fn vuqaddq_s8_(a: int8x16_t, b: uint8x16_t) -> int8x16_t; - #[link_name = "llvm.aarch64.neon.suqadd.v4i16"] - fn vuqadd_s16_(a: int16x4_t, b: uint16x4_t) -> int16x4_t; - #[link_name = "llvm.aarch64.neon.suqadd.v8i16"] - fn vuqaddq_s16_(a: int16x8_t, b: uint16x8_t) -> int16x8_t; - #[link_name = "llvm.aarch64.neon.suqadd.v2i32"] - fn vuqadd_s32_(a: int32x2_t, b: uint32x2_t) -> int32x2_t; - #[link_name = "llvm.aarch64.neon.suqadd.v4i32"] - fn vuqaddq_s32_(a: int32x4_t, b: uint32x4_t) -> int32x4_t; - #[link_name = "llvm.aarch64.neon.suqadd.v1i64"] - fn vuqadd_s64_(a: int64x1_t, b: uint64x1_t) -> int64x1_t; - #[link_name = "llvm.aarch64.neon.suqadd.v2i64"] - fn vuqaddq_s64_(a: int64x2_t, b: uint64x2_t) -> int64x2_t; - - #[link_name = "llvm.aarch64.neon.usqadd.v8i8"] - fn vsqadd_u8_(a: uint8x8_t, b: int8x8_t) -> uint8x8_t; - #[link_name = "llvm.aarch64.neon.usqadd.v16i8"] - fn vsqaddq_u8_(a: uint8x16_t, b: int8x16_t) -> uint8x16_t; - #[link_name = "llvm.aarch64.neon.usqadd.v4i16"] - fn vsqadd_u16_(a: uint16x4_t, b: int16x4_t) -> uint16x4_t; - #[link_name = "llvm.aarch64.neon.usqadd.v8i16"] - fn vsqaddq_u16_(a: uint16x8_t, b: int16x8_t) -> uint16x8_t; - #[link_name = "llvm.aarch64.neon.usqadd.v2i32"] - fn vsqadd_u32_(a: uint32x2_t, b: int32x2_t) -> uint32x2_t; - #[link_name = "llvm.aarch64.neon.usqadd.v4i32"] - fn vsqaddq_u32_(a: uint32x4_t, b: int32x4_t) -> uint32x4_t; - #[link_name = "llvm.aarch64.neon.usqadd.v1i64"] - fn vsqadd_u64_(a: uint64x1_t, b: int64x1_t) -> uint64x1_t; - #[link_name = "llvm.aarch64.neon.usqadd.v2i64"] - fn vsqaddq_u64_(a: uint64x2_t, b: int64x2_t) -> uint64x2_t; - - #[link_name = "llvm.aarch64.neon.addp.v8i16"] - fn vpaddq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t; - #[link_name = "llvm.aarch64.neon.addp.v4i32"] - fn vpaddq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t; - #[link_name = "llvm.aarch64.neon.addp.v2i64"] - fn vpaddq_s64_(a: int64x2_t, b: int64x2_t) -> int64x2_t; - #[link_name = "llvm.aarch64.neon.addp.v16i8"] - fn vpaddq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t; - - #[link_name = "llvm.aarch64.neon.saddv.i32.v4i16"] - fn vaddv_s16_(a: int16x4_t) -> i16; - #[link_name = "llvm.aarch64.neon.saddv.i32.v2i32"] - fn vaddv_s32_(a: int32x2_t) -> i32; - #[link_name = "llvm.aarch64.neon.saddv.i32.v8i8"] - fn vaddv_s8_(a: int8x8_t) -> i8; - #[link_name = "llvm.aarch64.neon.uaddv.i32.v4i16"] - fn vaddv_u16_(a: uint16x4_t) -> u16; - #[link_name = "llvm.aarch64.neon.uaddv.i32.v2i32"] - fn vaddv_u32_(a: uint32x2_t) -> u32; - #[link_name = "llvm.aarch64.neon.uaddv.i32.v8i8"] - fn vaddv_u8_(a: uint8x8_t) -> u8; - #[link_name = "llvm.aarch64.neon.saddv.i32.v8i16"] - fn vaddvq_s16_(a: int16x8_t) -> i16; - #[link_name = "llvm.aarch64.neon.saddv.i32.v4i32"] - fn vaddvq_s32_(a: int32x4_t) -> i32; - #[link_name = "llvm.aarch64.neon.saddv.i32.v16i8"] - fn vaddvq_s8_(a: int8x16_t) -> i8; - #[link_name = "llvm.aarch64.neon.uaddv.i32.v8i16"] - fn vaddvq_u16_(a: uint16x8_t) -> u16; - #[link_name = "llvm.aarch64.neon.uaddv.i32.v4i32"] - fn vaddvq_u32_(a: uint32x4_t) -> u32; - #[link_name = "llvm.aarch64.neon.uaddv.i32.v16i8"] - fn vaddvq_u8_(a: uint8x16_t) -> u8; - #[link_name = "llvm.aarch64.neon.saddv.i64.v2i64"] - fn vaddvq_s64_(a: int64x2_t) -> i64; - #[link_name = "llvm.aarch64.neon.uaddv.i64.v2i64"] - fn vaddvq_u64_(a: uint64x2_t) -> u64; - - #[link_name = "llvm.aarch64.neon.saddlv.i32.v8i8"] - fn vaddlv_s8_(a: int8x8_t) -> i32; - #[link_name = "llvm.aarch64.neon.uaddlv.i32.v8i8"] - fn vaddlv_u8_(a: uint8x8_t) -> u32; - #[link_name = "llvm.aarch64.neon.saddlv.i32.v16i8"] - fn vaddlvq_s8_(a: int8x16_t) -> i32; - #[link_name = "llvm.aarch64.neon.uaddlv.i32.v16i8"] - fn vaddlvq_u8_(a: uint8x16_t) -> u32; - - #[link_name = "llvm.aarch64.neon.smaxv.i8.v8i8"] - fn vmaxv_s8_(a: int8x8_t) -> i8; - #[link_name = "llvm.aarch64.neon.smaxv.i8.v16i8"] - fn vmaxvq_s8_(a: int8x16_t) -> i8; - #[link_name = "llvm.aarch64.neon.smaxv.i16.v4i16"] - fn vmaxv_s16_(a: int16x4_t) -> i16; - #[link_name = "llvm.aarch64.neon.smaxv.i16.v8i16"] - fn vmaxvq_s16_(a: int16x8_t) -> i16; - #[link_name = "llvm.aarch64.neon.smaxv.i32.v2i32"] - fn vmaxv_s32_(a: int32x2_t) -> i32; - #[link_name = "llvm.aarch64.neon.smaxv.i32.v4i32"] - fn vmaxvq_s32_(a: int32x4_t) -> i32; - - #[link_name = "llvm.aarch64.neon.umaxv.i8.v8i8"] - fn vmaxv_u8_(a: uint8x8_t) -> u8; - #[link_name = "llvm.aarch64.neon.umaxv.i8.v16i8"] - fn vmaxvq_u8_(a: uint8x16_t) -> u8; - #[link_name = "llvm.aarch64.neon.umaxv.i16.v4i16"] - fn vmaxv_u16_(a: uint16x4_t) -> u16; - #[link_name = "llvm.aarch64.neon.umaxv.i16.v8i16"] - fn vmaxvq_u16_(a: uint16x8_t) -> u16; - #[link_name = "llvm.aarch64.neon.umaxv.i32.v2i32"] - fn vmaxv_u32_(a: uint32x2_t) -> u32; - #[link_name = "llvm.aarch64.neon.umaxv.i32.v4i32"] - fn vmaxvq_u32_(a: uint32x4_t) -> u32; - - #[link_name = "llvm.aarch64.neon.fmaxv.f32.v2f32"] - fn vmaxv_f32_(a: float32x2_t) -> f32; - #[link_name = "llvm.aarch64.neon.fmaxv.f32.v4f32"] - fn vmaxvq_f32_(a: float32x4_t) -> f32; - #[link_name = "llvm.aarch64.neon.fmaxv.f64.v2f64"] - fn vmaxvq_f64_(a: float64x2_t) -> f64; - - #[link_name = "llvm.aarch64.neon.sminv.i8.v8i8"] - fn vminv_s8_(a: int8x8_t) -> i8; - #[link_name = "llvm.aarch64.neon.sminv.i8.v16i8"] - fn vminvq_s8_(a: int8x16_t) -> i8; - #[link_name = "llvm.aarch64.neon.sminv.i16.v4i16"] - fn vminv_s16_(a: int16x4_t) -> i16; - #[link_name = "llvm.aarch64.neon.sminv.i16.v8i16"] - fn vminvq_s16_(a: int16x8_t) -> i16; - #[link_name = "llvm.aarch64.neon.sminv.i32.v2i32"] - fn vminv_s32_(a: int32x2_t) -> i32; - #[link_name = "llvm.aarch64.neon.sminv.i32.v4i32"] - fn vminvq_s32_(a: int32x4_t) -> i32; - - #[link_name = "llvm.aarch64.neon.uminv.i8.v8i8"] - fn vminv_u8_(a: uint8x8_t) -> u8; - #[link_name = "llvm.aarch64.neon.uminv.i8.v16i8"] - fn vminvq_u8_(a: uint8x16_t) -> u8; - #[link_name = "llvm.aarch64.neon.uminv.i16.v4i16"] - fn vminv_u16_(a: uint16x4_t) -> u16; - #[link_name = "llvm.aarch64.neon.uminv.i16.v8i16"] - fn vminvq_u16_(a: uint16x8_t) -> u16; - #[link_name = "llvm.aarch64.neon.uminv.i32.v2i32"] - fn vminv_u32_(a: uint32x2_t) -> u32; - #[link_name = "llvm.aarch64.neon.uminv.i32.v4i32"] - fn vminvq_u32_(a: uint32x4_t) -> u32; - - #[link_name = "llvm.aarch64.neon.fminv.f32.v2f32"] - fn vminv_f32_(a: float32x2_t) -> f32; - #[link_name = "llvm.aarch64.neon.fminv.f32.v4f32"] - fn vminvq_f32_(a: float32x4_t) -> f32; - #[link_name = "llvm.aarch64.neon.fminv.f64.v2f64"] - fn vminvq_f64_(a: float64x2_t) -> f64; - - #[link_name = "llvm.aarch64.neon.sminp.v16i8"] - fn vpminq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t; - #[link_name = "llvm.aarch64.neon.sminp.v8i16"] - fn vpminq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t; - #[link_name = "llvm.aarch64.neon.sminp.v4i32"] - fn vpminq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t; - #[link_name = "llvm.aarch64.neon.uminp.v16i8"] - fn vpminq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t; - #[link_name = "llvm.aarch64.neon.uminp.v8i16"] - fn vpminq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t; - #[link_name = "llvm.aarch64.neon.uminp.v4i32"] - fn vpminq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t; - #[link_name = "llvm.aarch64.neon.fminp.4f32"] - fn vpminq_f32_(a: float32x4_t, b: float32x4_t) -> float32x4_t; - #[link_name = "llvm.aarch64.neon.fminp.v2f64"] - fn vpminq_f64_(a: float64x2_t, b: float64x2_t) -> float64x2_t; - - #[link_name = "llvm.aarch64.neon.smaxp.v16i8"] - fn vpmaxq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t; - #[link_name = "llvm.aarch64.neon.smaxp.v8i16"] - fn vpmaxq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t; - #[link_name = "llvm.aarch64.neon.smaxp.v4i32"] - fn vpmaxq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t; - #[link_name = "llvm.aarch64.neon.umaxp.v16i8"] - fn vpmaxq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t; - #[link_name = "llvm.aarch64.neon.umaxp.v8i16"] - fn vpmaxq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t; - #[link_name = "llvm.aarch64.neon.umaxp.v4i32"] - fn vpmaxq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t; - #[link_name = "llvm.aarch64.neon.fmaxp.4f32"] - fn vpmaxq_f32_(a: float32x4_t, b: float32x4_t) -> float32x4_t; - #[link_name = "llvm.aarch64.neon.fmaxp.v2f64"] - fn vpmaxq_f64_(a: float64x2_t, b: float64x2_t) -> float64x2_t; - - #[link_name = "llvm.aarch64.neon.tbl1.v8i8"] - fn vqtbl1(a: int8x16_t, b: uint8x8_t) -> int8x8_t; - #[link_name = "llvm.aarch64.neon.tbl1.v16i8"] - fn vqtbl1q(a: int8x16_t, b: uint8x16_t) -> int8x16_t; - - #[link_name = "llvm.aarch64.neon.tbx1.v8i8"] - fn vqtbx1(a: int8x8_t, b: int8x16_t, c: uint8x8_t) -> int8x8_t; - #[link_name = "llvm.aarch64.neon.tbx1.v16i8"] - fn vqtbx1q(a: int8x16_t, b: int8x16_t, c: uint8x16_t) -> int8x16_t; - - #[link_name = "llvm.aarch64.neon.tbl2.v8i8"] - fn vqtbl2(a0: int8x16_t, a1: int8x16_t, b: uint8x8_t) -> int8x8_t; - #[link_name = "llvm.aarch64.neon.tbl2.v16i8"] - fn vqtbl2q(a0: int8x16_t, a1: int8x16_t, b: uint8x16_t) -> int8x16_t; - - #[link_name = "llvm.aarch64.neon.tbx2.v8i8"] - fn vqtbx2(a: int8x8_t, b0: int8x16_t, b1: int8x16_t, c: uint8x8_t) -> int8x8_t; - #[link_name = "llvm.aarch64.neon.tbx2.v16i8"] - fn vqtbx2q(a: int8x16_t, b0: int8x16_t, b1: int8x16_t, c: uint8x16_t) -> int8x16_t; - - #[link_name = "llvm.aarch64.neon.tbl3.v8i8"] - fn vqtbl3(a0: int8x16_t, a1: int8x16_t, a2: int8x16_t, b: uint8x8_t) -> int8x8_t; - #[link_name = "llvm.aarch64.neon.tbl3.v16i8"] - fn vqtbl3q(a0: int8x16_t, a1: int8x16_t, a2: int8x16_t, b: uint8x16_t) -> int8x16_t; - - #[link_name = "llvm.aarch64.neon.tbx3.v8i8"] - fn vqtbx3(a: int8x8_t, b0: int8x16_t, b1: int8x16_t, b2: int8x16_t, c: uint8x8_t) -> int8x8_t; - #[link_name = "llvm.aarch64.neon.tbx3.v16i8"] - fn vqtbx3q( - a: int8x16_t, - b0: int8x16_t, - b1: int8x16_t, - b2: int8x16_t, - c: uint8x16_t, - ) -> int8x16_t; - - #[link_name = "llvm.aarch64.neon.tbl4.v8i8"] - fn vqtbl4(a0: int8x16_t, a1: int8x16_t, a2: int8x16_t, a3: int8x16_t, b: uint8x8_t) - -> int8x8_t; - #[link_name = "llvm.aarch64.neon.tbl4.v16i8"] - fn vqtbl4q( - a0: int8x16_t, - a1: int8x16_t, - a2: int8x16_t, - a3: int8x16_t, - b: uint8x16_t, - ) -> int8x16_t; - - #[link_name = "llvm.aarch64.neon.tbx4.v8i8"] - fn vqtbx4( - a: int8x8_t, - b0: int8x16_t, - b1: int8x16_t, - b2: int8x16_t, - b3: int8x16_t, - c: uint8x8_t, - ) -> int8x8_t; - - #[link_name = "llvm.aarch64.neon.tbx4.v16i8"] - fn vqtbx4q( - a: int8x16_t, - b0: int8x16_t, - b1: int8x16_t, - b2: int8x16_t, - b3: int8x16_t, - c: uint8x16_t, - ) -> int8x16_t; - - #[link_name = "llvm.aarch64.neon.vsli.v8i8"] - fn vsli_n_s8_(a: int8x8_t, b: int8x8_t, n: i32) -> int8x8_t; - #[link_name = "llvm.aarch64.neon.vsli.v16i8"] - fn vsliq_n_s8_(a: int8x16_t, b: int8x16_t, n: i32) -> int8x16_t; - #[link_name = "llvm.aarch64.neon.vsli.v4i16"] - fn vsli_n_s16_(a: int16x4_t, b: int16x4_t, n: i32) -> int16x4_t; - #[link_name = "llvm.aarch64.neon.vsli.v8i16"] - fn vsliq_n_s16_(a: int16x8_t, b: int16x8_t, n: i32) -> int16x8_t; - #[link_name = "llvm.aarch64.neon.vsli.v2i32"] - fn vsli_n_s32_(a: int32x2_t, b: int32x2_t, n: i32) -> int32x2_t; - #[link_name = "llvm.aarch64.neon.vsli.v4i32"] - fn vsliq_n_s32_(a: int32x4_t, b: int32x4_t, n: i32) -> int32x4_t; - #[link_name = "llvm.aarch64.neon.vsli.v1i64"] - fn vsli_n_s64_(a: int64x1_t, b: int64x1_t, n: i32) -> int64x1_t; - #[link_name = "llvm.aarch64.neon.vsli.v2i64"] - fn vsliq_n_s64_(a: int64x2_t, b: int64x2_t, n: i32) -> int64x2_t; - - #[link_name = "llvm.aarch64.neon.vsri.v8i8"] - fn vsri_n_s8_(a: int8x8_t, b: int8x8_t, n: i32) -> int8x8_t; - #[link_name = "llvm.aarch64.neon.vsri.v16i8"] - fn vsriq_n_s8_(a: int8x16_t, b: int8x16_t, n: i32) -> int8x16_t; - #[link_name = "llvm.aarch64.neon.vsri.v4i16"] - fn vsri_n_s16_(a: int16x4_t, b: int16x4_t, n: i32) -> int16x4_t; - #[link_name = "llvm.aarch64.neon.vsri.v8i16"] - fn vsriq_n_s16_(a: int16x8_t, b: int16x8_t, n: i32) -> int16x8_t; - #[link_name = "llvm.aarch64.neon.vsri.v2i32"] - fn vsri_n_s32_(a: int32x2_t, b: int32x2_t, n: i32) -> int32x2_t; - #[link_name = "llvm.aarch64.neon.vsri.v4i32"] - fn vsriq_n_s32_(a: int32x4_t, b: int32x4_t, n: i32) -> int32x4_t; - #[link_name = "llvm.aarch64.neon.vsri.v1i64"] - fn vsri_n_s64_(a: int64x1_t, b: int64x1_t, n: i32) -> int64x1_t; - #[link_name = "llvm.aarch64.neon.vsri.v2i64"] - fn vsriq_n_s64_(a: int64x2_t, b: int64x2_t, n: i32) -> int64x2_t; -} - /// Duplicate vector element to vector or scalar #[inline] #[target_feature(enable = "neon")] @@ -485,244 +190,6 @@ pub unsafe fn vcopy_laneq_f64( transmute::(simd_extract!(b, LANE2 as u32)) } -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_s8(ptr: *const i8) -> int8x8_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_s8(ptr: *const i8) -> int8x16_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_s16(ptr: *const i16) -> int16x4_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_s16(ptr: *const i16) -> int16x8_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_s32(ptr: *const i32) -> int32x2_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_s32(ptr: *const i32) -> int32x4_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_s64(ptr: *const i64) -> int64x1_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_s64(ptr: *const i64) -> int64x2_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_u8(ptr: *const u8) -> uint8x8_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_u8(ptr: *const u8) -> uint8x16_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_u16(ptr: *const u16) -> uint16x4_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_u16(ptr: *const u16) -> uint16x8_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_u32(ptr: *const u32) -> uint32x2_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_u32(ptr: *const u32) -> uint32x4_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_u64(ptr: *const u64) -> uint64x1_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_u64(ptr: *const u64) -> uint64x2_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_p8(ptr: *const p8) -> poly8x8_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_p8(ptr: *const p8) -> poly8x16_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_p16(ptr: *const p16) -> poly16x4_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_p16(ptr: *const p16) -> poly16x8_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p64) -#[inline] -#[target_feature(enable = "neon,aes")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_p64(ptr: *const p64) -> poly64x1_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64) -#[inline] -#[target_feature(enable = "neon,aes")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_p64(ptr: *const p64) -> poly64x2_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_f32(ptr: *const f32) -> float32x2_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_f32(ptr: *const f32) -> float32x4_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1_f64(ptr: *const f64) -> float64x1_t { - read_unaligned(ptr.cast()) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(ldr))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vld1q_f64(ptr: *const f64) -> float64x2_t { - read_unaligned(ptr.cast()) -} - /// Load multiple single-element structures to one, two, three, or four registers #[inline] #[target_feature(enable = "neon")] @@ -764,295 +231,6 @@ pub unsafe fn vld1q_lane_f64(ptr: *const f64, src: float64x2_t) simd_insert!(src, LANE as u32, *ptr) } -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_s8(ptr: *mut i8, a: int8x8_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_s8(ptr: *mut i8, a: int8x16_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_s16(ptr: *mut i16, a: int16x4_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_s16(ptr: *mut i16, a: int16x8_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_s32(ptr: *mut i32, a: int32x2_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_s32(ptr: *mut i32, a: int32x4_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_s64(ptr: *mut i64, a: int64x1_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_s64(ptr: *mut i64, a: int64x2_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_u8(ptr: *mut u8, a: uint8x8_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_u8(ptr: *mut u8, a: uint8x16_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_u16(ptr: *mut u16, a: uint16x4_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_u16(ptr: *mut u16, a: uint16x8_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_u32(ptr: *mut u32, a: uint32x2_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_u32(ptr: *mut u32, a: uint32x4_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_u64(ptr: *mut u64, a: uint64x1_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_u64(ptr: *mut u64, a: uint64x2_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_p8(ptr: *mut p8, a: poly8x8_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_p8(ptr: *mut p8, a: poly8x16_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_p16(ptr: *mut p16, a: poly16x4_t) { - write_unaligned(ptr.cast(), a); -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_p16(ptr: *mut p16, a: poly16x8_t) { - write_unaligned(ptr.cast(), a); -} - -// Store multiple single-element structures from one, two, three, or four registers. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p64) -#[inline] -#[target_feature(enable = "neon,aes")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_p64(ptr: *mut p64, a: poly64x1_t) { - write_unaligned(ptr.cast(), a); -} - -// Store multiple single-element structures from one, two, three, or four registers. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p64) -#[inline] -#[target_feature(enable = "neon,aes")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_p64(ptr: *mut p64, a: poly64x2_t) { - write_unaligned(ptr.cast(), a); -} - -// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_f32(ptr: *mut f32, a: float32x2_t) { - write_unaligned(ptr.cast(), a); -} - -// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_f32(ptr: *mut f32, a: float32x4_t) { - write_unaligned(ptr.cast(), a); -} - -// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1_f64(ptr: *mut f64, a: float64x1_t) { - write_unaligned(ptr.cast(), a); -} - -// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(str))] -#[allow(clippy::cast_ptr_alignment)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vst1q_f64(ptr: *mut f64, a: float64x2_t) { - write_unaligned(ptr.cast(), a); -} - -/// Absolute Value (wrapping). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(abs))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vabsd_s64(a: i64) -> i64 { - vabsd_s64_(a) -} -/// Absolute Value (wrapping). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(abs))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vabs_s64(a: int64x1_t) -> int64x1_t { - vabs_s64_(a) -} -/// Absolute Value (wrapping). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(abs))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vabsq_s64(a: int64x2_t) -> int64x2_t { - vabsq_s64_(a) -} - /// Bitwise Select instructions. This instruction sets each bit in the destination SIMD&FP register /// to the corresponding bit from the first source SIMD&FP register when the original /// destination bit was 1, otherwise from the second source SIMD&FP register. @@ -1098,379 +276,6 @@ pub unsafe fn vbslq_p64(a: poly64x2_t, b: poly64x2_t, c: poly64x2_t) -> poly64x2 simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c)) } -/// Signed saturating Accumulate of Unsigned value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(suqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vuqadd_s8(a: int8x8_t, b: uint8x8_t) -> int8x8_t { - vuqadd_s8_(a, b) -} -/// Signed saturating Accumulate of Unsigned value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(suqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vuqaddq_s8(a: int8x16_t, b: uint8x16_t) -> int8x16_t { - vuqaddq_s8_(a, b) -} -/// Signed saturating Accumulate of Unsigned value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(suqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vuqadd_s16(a: int16x4_t, b: uint16x4_t) -> int16x4_t { - vuqadd_s16_(a, b) -} -/// Signed saturating Accumulate of Unsigned value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(suqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vuqaddq_s16(a: int16x8_t, b: uint16x8_t) -> int16x8_t { - vuqaddq_s16_(a, b) -} -/// Signed saturating Accumulate of Unsigned value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(suqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vuqadd_s32(a: int32x2_t, b: uint32x2_t) -> int32x2_t { - vuqadd_s32_(a, b) -} -/// Signed saturating Accumulate of Unsigned value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(suqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vuqaddq_s32(a: int32x4_t, b: uint32x4_t) -> int32x4_t { - vuqaddq_s32_(a, b) -} -/// Signed saturating Accumulate of Unsigned value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(suqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vuqadd_s64(a: int64x1_t, b: uint64x1_t) -> int64x1_t { - vuqadd_s64_(a, b) -} -/// Signed saturating Accumulate of Unsigned value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(suqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vuqaddq_s64(a: int64x2_t, b: uint64x2_t) -> int64x2_t { - vuqaddq_s64_(a, b) -} - -/// Unsigned saturating Accumulate of Signed value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(usqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsqadd_u8(a: uint8x8_t, b: int8x8_t) -> uint8x8_t { - vsqadd_u8_(a, b) -} -/// Unsigned saturating Accumulate of Signed value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(usqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsqaddq_u8(a: uint8x16_t, b: int8x16_t) -> uint8x16_t { - vsqaddq_u8_(a, b) -} -/// Unsigned saturating Accumulate of Signed value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(usqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsqadd_u16(a: uint16x4_t, b: int16x4_t) -> uint16x4_t { - vsqadd_u16_(a, b) -} -/// Unsigned saturating Accumulate of Signed value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(usqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsqaddq_u16(a: uint16x8_t, b: int16x8_t) -> uint16x8_t { - vsqaddq_u16_(a, b) -} -/// Unsigned saturating Accumulate of Signed value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(usqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsqadd_u32(a: uint32x2_t, b: int32x2_t) -> uint32x2_t { - vsqadd_u32_(a, b) -} -/// Unsigned saturating Accumulate of Signed value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(usqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsqaddq_u32(a: uint32x4_t, b: int32x4_t) -> uint32x4_t { - vsqaddq_u32_(a, b) -} -/// Unsigned saturating Accumulate of Signed value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(usqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsqadd_u64(a: uint64x1_t, b: int64x1_t) -> uint64x1_t { - vsqadd_u64_(a, b) -} -/// Unsigned saturating Accumulate of Signed value. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(usqadd))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsqaddq_u64(a: uint64x2_t, b: int64x2_t) -> uint64x2_t { - vsqaddq_u64_(a, b) -} - -/// Add pairwise -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpaddq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { - vpaddq_s16_(a, b) -} -/// Add pairwise -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpaddq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { - transmute(vpaddq_s16_(transmute(a), transmute(b))) -} -/// Add pairwise -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpaddq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { - vpaddq_s32_(a, b) -} -/// Add pairwise -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpaddq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { - transmute(vpaddq_s32_(transmute(a), transmute(b))) -} -/// Add pairwise -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpaddq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t { - vpaddq_s64_(a, b) -} -/// Add pairwise -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpaddq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t { - transmute(vpaddq_s64_(transmute(a), transmute(b))) -} -/// Add pairwise -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpaddq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { - vpaddq_s8_(a, b) -} -/// Add pairwise -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpaddq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { - transmute(vpaddq_s8_(transmute(a), transmute(b))) -} -/// Add pairwise -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpaddd_s64(a: int64x2_t) -> i64 { - transmute(vaddvq_u64_(transmute(a))) -} -/// Add pairwise -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpaddd_u64(a: uint64x2_t) -> u64 { - vaddvq_u64_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddv_s16(a: int16x4_t) -> i16 { - vaddv_s16_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddv_s32(a: int32x2_t) -> i32 { - vaddv_s32_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddv_s8(a: int8x8_t) -> i8 { - vaddv_s8_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddv_u16(a: uint16x4_t) -> u16 { - vaddv_u16_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddv_u32(a: uint32x2_t) -> u32 { - vaddv_u32_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddv_u8(a: uint8x8_t) -> u8 { - vaddv_u8_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddvq_s16(a: int16x8_t) -> i16 { - vaddvq_s16_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddvq_s32(a: int32x4_t) -> i32 { - vaddvq_s32_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddvq_s8(a: int8x16_t) -> i8 { - vaddvq_s8_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddvq_u16(a: uint16x8_t) -> u16 { - vaddvq_u16_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddvq_u32(a: uint32x4_t) -> u32 { - vaddvq_u32_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddvq_u8(a: uint8x16_t) -> u8 { - vaddvq_u8_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddvq_s64(a: int64x2_t) -> i64 { - vaddvq_s64_(a) -} - -/// Add across vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(addp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddvq_u64(a: uint64x2_t) -> u64 { - vaddvq_u64_(a) -} - -/// Signed Add Long across Vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(saddlv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddlv_s8(a: int8x8_t) -> i16 { - vaddlv_s8_(a) as i16 -} - -/// Signed Add Long across Vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(saddlv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddlvq_s8(a: int8x16_t) -> i16 { - vaddlvq_s8_(a) as i16 -} - -/// Unsigned Add Long across Vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uaddlv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddlv_u8(a: uint8x8_t) -> u16 { - vaddlv_u8_(a) as u16 -} - -/// Unsigned Add Long across Vector -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uaddlv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vaddlvq_u8(a: uint8x16_t) -> u16 { - vaddlvq_u8_(a) as u16 -} - /// Vector add. #[inline] #[target_feature(enable = "neon")] @@ -1525,420 +330,6 @@ pub unsafe fn vaddd_u64(a: u64, b: u64) -> u64 { a.wrapping_add(b) } -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(smaxv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxv_s8(a: int8x8_t) -> i8 { - vmaxv_s8_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(smaxv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxvq_s8(a: int8x16_t) -> i8 { - vmaxvq_s8_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(smaxv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxv_s16(a: int16x4_t) -> i16 { - vmaxv_s16_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(smaxv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxvq_s16(a: int16x8_t) -> i16 { - vmaxvq_s16_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(smaxp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxv_s32(a: int32x2_t) -> i32 { - vmaxv_s32_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(smaxv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxvq_s32(a: int32x4_t) -> i32 { - vmaxvq_s32_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(umaxv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxv_u8(a: uint8x8_t) -> u8 { - vmaxv_u8_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(umaxv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxvq_u8(a: uint8x16_t) -> u8 { - vmaxvq_u8_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(umaxv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxv_u16(a: uint16x4_t) -> u16 { - vmaxv_u16_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(umaxv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxvq_u16(a: uint16x8_t) -> u16 { - vmaxvq_u16_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(umaxp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxv_u32(a: uint32x2_t) -> u32 { - vmaxv_u32_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(umaxv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxvq_u32(a: uint32x4_t) -> u32 { - vmaxvq_u32_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fmaxp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxv_f32(a: float32x2_t) -> f32 { - vmaxv_f32_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fmaxv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxvq_f32(a: float32x4_t) -> f32 { - vmaxvq_f32_(a) -} - -/// Horizontal vector max. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fmaxp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vmaxvq_f64(a: float64x2_t) -> f64 { - vmaxvq_f64_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sminv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminv_s8(a: int8x8_t) -> i8 { - vminv_s8_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sminv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminvq_s8(a: int8x16_t) -> i8 { - vminvq_s8_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sminv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminv_s16(a: int16x4_t) -> i16 { - vminv_s16_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sminv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminvq_s16(a: int16x8_t) -> i16 { - vminvq_s16_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sminp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminv_s32(a: int32x2_t) -> i32 { - vminv_s32_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sminv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminvq_s32(a: int32x4_t) -> i32 { - vminvq_s32_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uminv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminv_u8(a: uint8x8_t) -> u8 { - vminv_u8_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uminv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminvq_u8(a: uint8x16_t) -> u8 { - vminvq_u8_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uminv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminv_u16(a: uint16x4_t) -> u16 { - vminv_u16_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uminv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminvq_u16(a: uint16x8_t) -> u16 { - vminvq_u16_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uminp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminv_u32(a: uint32x2_t) -> u32 { - vminv_u32_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uminv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminvq_u32(a: uint32x4_t) -> u32 { - vminvq_u32_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fminp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminv_f32(a: float32x2_t) -> f32 { - vminv_f32_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fminv))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminvq_f32(a: float32x4_t) -> f32 { - vminvq_f32_(a) -} - -/// Horizontal vector min. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fminp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vminvq_f64(a: float64x2_t) -> f64 { - vminvq_f64_(a) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sminp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpminq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { - vpminq_s8_(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sminp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpminq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { - vpminq_s16_(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sminp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpminq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { - vpminq_s32_(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uminp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpminq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { - vpminq_u8_(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uminp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpminq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { - vpminq_u16_(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(uminp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpminq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { - vpminq_u32_(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fminp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpminq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { - vpminq_f32_(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fminp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpminq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t { - vpminq_f64_(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(smaxp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpmaxq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { - vpmaxq_s8_(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(smaxp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpmaxq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { - vpmaxq_s16_(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(smaxp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpmaxq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { - vpmaxq_s32_(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(umaxp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpmaxq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { - vpmaxq_u8_(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(umaxp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpmaxq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { - vpmaxq_u16_(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(umaxp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpmaxq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { - vpmaxq_u32_(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fmaxp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpmaxq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { - vpmaxq_f32_(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(fmaxp))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vpmaxq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t { - vpmaxq_f64_(a, b) -} - /// Extract vector from pair of vectors #[inline] #[target_feature(enable = "neon")] @@ -2107,784 +498,6 @@ pub unsafe fn vcombine_f64(low: float64x1_t, high: float64x1_t) -> float64x2_t { simd_shuffle!(low, high, [0, 1]) } -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbl1_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { - vqtbl1_s8(vcombine_s8(a, zeroed()), transmute(b)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbl1_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { - vqtbl1_u8(vcombine_u8(a, zeroed()), b) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbl1_p8(a: poly8x8_t, b: uint8x8_t) -> poly8x8_t { - vqtbl1_p8(vcombine_p8(a, zeroed()), b) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbl2_s8(a: int8x8x2_t, b: int8x8_t) -> int8x8_t { - vqtbl1_s8(vcombine_s8(a.0, a.1), transmute(b)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbl2_u8(a: uint8x8x2_t, b: uint8x8_t) -> uint8x8_t { - vqtbl1_u8(vcombine_u8(a.0, a.1), b) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbl2_p8(a: poly8x8x2_t, b: uint8x8_t) -> poly8x8_t { - vqtbl1_p8(vcombine_p8(a.0, a.1), b) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbl3_s8(a: int8x8x3_t, b: int8x8_t) -> int8x8_t { - vqtbl2_s8( - int8x16x2_t(vcombine_s8(a.0, a.1), vcombine_s8(a.2, zeroed())), - transmute(b), - ) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbl3_u8(a: uint8x8x3_t, b: uint8x8_t) -> uint8x8_t { - vqtbl2_u8( - uint8x16x2_t(vcombine_u8(a.0, a.1), vcombine_u8(a.2, zeroed())), - b, - ) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbl3_p8(a: poly8x8x3_t, b: uint8x8_t) -> poly8x8_t { - vqtbl2_p8( - poly8x16x2_t(vcombine_p8(a.0, a.1), vcombine_p8(a.2, zeroed())), - b, - ) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbl4_s8(a: int8x8x4_t, b: int8x8_t) -> int8x8_t { - vqtbl2_s8( - int8x16x2_t(vcombine_s8(a.0, a.1), vcombine_s8(a.2, a.3)), - transmute(b), - ) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbl4_u8(a: uint8x8x4_t, b: uint8x8_t) -> uint8x8_t { - vqtbl2_u8( - uint8x16x2_t(vcombine_u8(a.0, a.1), vcombine_u8(a.2, a.3)), - b, - ) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbl4_p8(a: poly8x8x4_t, b: uint8x8_t) -> poly8x8_t { - vqtbl2_p8( - poly8x16x2_t(vcombine_p8(a.0, a.1), vcombine_p8(a.2, a.3)), - b, - ) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbx1_s8(a: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t { - let r = vqtbx1_s8(a, vcombine_s8(b, zeroed()), transmute(c)); - let m: int8x8_t = simd_lt(c, transmute(i8x8::splat(8))); - simd_select(m, r, a) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbx1_u8(a: uint8x8_t, b: uint8x8_t, c: uint8x8_t) -> uint8x8_t { - let r = vqtbx1_u8(a, vcombine_u8(b, zeroed()), c); - let m: int8x8_t = simd_lt(c, transmute(u8x8::splat(8))); - simd_select(m, r, a) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbx1_p8(a: poly8x8_t, b: poly8x8_t, c: uint8x8_t) -> poly8x8_t { - let r = vqtbx1_p8(a, vcombine_p8(b, zeroed()), c); - let m: int8x8_t = simd_lt(c, transmute(u8x8::splat(8))); - simd_select(m, r, a) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbx2_s8(a: int8x8_t, b: int8x8x2_t, c: int8x8_t) -> int8x8_t { - vqtbx1_s8(a, vcombine_s8(b.0, b.1), transmute(c)) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbx2_u8(a: uint8x8_t, b: uint8x8x2_t, c: uint8x8_t) -> uint8x8_t { - vqtbx1_u8(a, vcombine_u8(b.0, b.1), c) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbx2_p8(a: poly8x8_t, b: poly8x8x2_t, c: uint8x8_t) -> poly8x8_t { - vqtbx1_p8(a, vcombine_p8(b.0, b.1), c) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbx3_s8(a: int8x8_t, b: int8x8x3_t, c: int8x8_t) -> int8x8_t { - let r = vqtbx2_s8( - a, - int8x16x2_t(vcombine_s8(b.0, b.1), vcombine_s8(b.2, zeroed())), - transmute(c), - ); - let m: int8x8_t = simd_lt(c, transmute(i8x8::splat(24))); - simd_select(m, r, a) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbx3_u8(a: uint8x8_t, b: uint8x8x3_t, c: uint8x8_t) -> uint8x8_t { - let r = vqtbx2_u8( - a, - uint8x16x2_t(vcombine_u8(b.0, b.1), vcombine_u8(b.2, zeroed())), - c, - ); - let m: int8x8_t = simd_lt(c, transmute(u8x8::splat(24))); - simd_select(m, r, a) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbx3_p8(a: poly8x8_t, b: poly8x8x3_t, c: uint8x8_t) -> poly8x8_t { - let r = vqtbx2_p8( - a, - poly8x16x2_t(vcombine_p8(b.0, b.1), vcombine_p8(b.2, zeroed())), - c, - ); - let m: int8x8_t = simd_lt(c, transmute(u8x8::splat(24))); - simd_select(m, r, a) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbx4_s8(a: int8x8_t, b: int8x8x4_t, c: int8x8_t) -> int8x8_t { - vqtbx2_s8( - a, - int8x16x2_t(vcombine_s8(b.0, b.1), vcombine_s8(b.2, b.3)), - transmute(c), - ) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbx4_u8(a: uint8x8_t, b: uint8x8x4_t, c: uint8x8_t) -> uint8x8_t { - vqtbx2_u8( - a, - uint8x16x2_t(vcombine_u8(b.0, b.1), vcombine_u8(b.2, b.3)), - c, - ) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vtbx4_p8(a: poly8x8_t, b: poly8x8x4_t, c: uint8x8_t) -> poly8x8_t { - vqtbx2_p8( - a, - poly8x16x2_t(vcombine_p8(b.0, b.1), vcombine_p8(b.2, b.3)), - c, - ) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl1_s8(t: int8x16_t, idx: uint8x8_t) -> int8x8_t { - vqtbl1(t, idx) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl1q_s8(t: int8x16_t, idx: uint8x16_t) -> int8x16_t { - vqtbl1q(t, idx) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl1_u8(t: uint8x16_t, idx: uint8x8_t) -> uint8x8_t { - transmute(vqtbl1(transmute(t), idx)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl1q_u8(t: uint8x16_t, idx: uint8x16_t) -> uint8x16_t { - transmute(vqtbl1q(transmute(t), idx)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl1_p8(t: poly8x16_t, idx: uint8x8_t) -> poly8x8_t { - transmute(vqtbl1(transmute(t), idx)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl1q_p8(t: poly8x16_t, idx: uint8x16_t) -> poly8x16_t { - transmute(vqtbl1q(transmute(t), idx)) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx1_s8(a: int8x8_t, t: int8x16_t, idx: uint8x8_t) -> int8x8_t { - vqtbx1(a, t, idx) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx1q_s8(a: int8x16_t, t: int8x16_t, idx: uint8x16_t) -> int8x16_t { - vqtbx1q(a, t, idx) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx1_u8(a: uint8x8_t, t: uint8x16_t, idx: uint8x8_t) -> uint8x8_t { - transmute(vqtbx1(transmute(a), transmute(t), idx)) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx1q_u8(a: uint8x16_t, t: uint8x16_t, idx: uint8x16_t) -> uint8x16_t { - transmute(vqtbx1q(transmute(a), transmute(t), idx)) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx1_p8(a: poly8x8_t, t: poly8x16_t, idx: uint8x8_t) -> poly8x8_t { - transmute(vqtbx1(transmute(a), transmute(t), idx)) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx1q_p8(a: poly8x16_t, t: poly8x16_t, idx: uint8x16_t) -> poly8x16_t { - transmute(vqtbx1q(transmute(a), transmute(t), idx)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl2_s8(t: int8x16x2_t, idx: uint8x8_t) -> int8x8_t { - vqtbl2(t.0, t.1, idx) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl2q_s8(t: int8x16x2_t, idx: uint8x16_t) -> int8x16_t { - vqtbl2q(t.0, t.1, idx) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl2_u8(t: uint8x16x2_t, idx: uint8x8_t) -> uint8x8_t { - transmute(vqtbl2(transmute(t.0), transmute(t.1), idx)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl2q_u8(t: uint8x16x2_t, idx: uint8x16_t) -> uint8x16_t { - transmute(vqtbl2q(transmute(t.0), transmute(t.1), idx)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl2_p8(t: poly8x16x2_t, idx: uint8x8_t) -> poly8x8_t { - transmute(vqtbl2(transmute(t.0), transmute(t.1), idx)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl2q_p8(t: poly8x16x2_t, idx: uint8x16_t) -> poly8x16_t { - transmute(vqtbl2q(transmute(t.0), transmute(t.1), idx)) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx2_s8(a: int8x8_t, t: int8x16x2_t, idx: uint8x8_t) -> int8x8_t { - vqtbx2(a, t.0, t.1, idx) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx2q_s8(a: int8x16_t, t: int8x16x2_t, idx: uint8x16_t) -> int8x16_t { - vqtbx2q(a, t.0, t.1, idx) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx2_u8(a: uint8x8_t, t: uint8x16x2_t, idx: uint8x8_t) -> uint8x8_t { - transmute(vqtbx2(transmute(a), transmute(t.0), transmute(t.1), idx)) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx2q_u8(a: uint8x16_t, t: uint8x16x2_t, idx: uint8x16_t) -> uint8x16_t { - transmute(vqtbx2q(transmute(a), transmute(t.0), transmute(t.1), idx)) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx2_p8(a: poly8x8_t, t: poly8x16x2_t, idx: uint8x8_t) -> poly8x8_t { - transmute(vqtbx2(transmute(a), transmute(t.0), transmute(t.1), idx)) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx2q_p8(a: poly8x16_t, t: poly8x16x2_t, idx: uint8x16_t) -> poly8x16_t { - transmute(vqtbx2q(transmute(a), transmute(t.0), transmute(t.1), idx)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl3_s8(t: int8x16x3_t, idx: uint8x8_t) -> int8x8_t { - vqtbl3(t.0, t.1, t.2, idx) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl3q_s8(t: int8x16x3_t, idx: uint8x16_t) -> int8x16_t { - vqtbl3q(t.0, t.1, t.2, idx) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl3_u8(t: uint8x16x3_t, idx: uint8x8_t) -> uint8x8_t { - transmute(vqtbl3(transmute(t.0), transmute(t.1), transmute(t.2), idx)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl3q_u8(t: uint8x16x3_t, idx: uint8x16_t) -> uint8x16_t { - transmute(vqtbl3q(transmute(t.0), transmute(t.1), transmute(t.2), idx)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl3_p8(t: poly8x16x3_t, idx: uint8x8_t) -> poly8x8_t { - transmute(vqtbl3(transmute(t.0), transmute(t.1), transmute(t.2), idx)) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl3q_p8(t: poly8x16x3_t, idx: uint8x16_t) -> poly8x16_t { - transmute(vqtbl3q(transmute(t.0), transmute(t.1), transmute(t.2), idx)) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx3_s8(a: int8x8_t, t: int8x16x3_t, idx: uint8x8_t) -> int8x8_t { - vqtbx3(a, t.0, t.1, t.2, idx) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx3q_s8(a: int8x16_t, t: int8x16x3_t, idx: uint8x16_t) -> int8x16_t { - vqtbx3q(a, t.0, t.1, t.2, idx) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx3_u8(a: uint8x8_t, t: uint8x16x3_t, idx: uint8x8_t) -> uint8x8_t { - transmute(vqtbx3( - transmute(a), - transmute(t.0), - transmute(t.1), - transmute(t.2), - idx, - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx3q_u8(a: uint8x16_t, t: uint8x16x3_t, idx: uint8x16_t) -> uint8x16_t { - transmute(vqtbx3q( - transmute(a), - transmute(t.0), - transmute(t.1), - transmute(t.2), - idx, - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx3_p8(a: poly8x8_t, t: poly8x16x3_t, idx: uint8x8_t) -> poly8x8_t { - transmute(vqtbx3( - transmute(a), - transmute(t.0), - transmute(t.1), - transmute(t.2), - idx, - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx3q_p8(a: poly8x16_t, t: poly8x16x3_t, idx: uint8x16_t) -> poly8x16_t { - transmute(vqtbx3q( - transmute(a), - transmute(t.0), - transmute(t.1), - transmute(t.2), - idx, - )) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl4_s8(t: int8x16x4_t, idx: uint8x8_t) -> int8x8_t { - vqtbl4(t.0, t.1, t.2, t.3, idx) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl4q_s8(t: int8x16x4_t, idx: uint8x16_t) -> int8x16_t { - vqtbl4q(t.0, t.1, t.2, t.3, idx) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl4_u8(t: uint8x16x4_t, idx: uint8x8_t) -> uint8x8_t { - transmute(vqtbl4( - transmute(t.0), - transmute(t.1), - transmute(t.2), - transmute(t.3), - idx, - )) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl4q_u8(t: uint8x16x4_t, idx: uint8x16_t) -> uint8x16_t { - transmute(vqtbl4q( - transmute(t.0), - transmute(t.1), - transmute(t.2), - transmute(t.3), - idx, - )) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl4_p8(t: poly8x16x4_t, idx: uint8x8_t) -> poly8x8_t { - transmute(vqtbl4( - transmute(t.0), - transmute(t.1), - transmute(t.2), - transmute(t.3), - idx, - )) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbl))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbl4q_p8(t: poly8x16x4_t, idx: uint8x16_t) -> poly8x16_t { - transmute(vqtbl4q( - transmute(t.0), - transmute(t.1), - transmute(t.2), - transmute(t.3), - idx, - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx4_s8(a: int8x8_t, t: int8x16x4_t, idx: uint8x8_t) -> int8x8_t { - vqtbx4(a, t.0, t.1, t.2, t.3, idx) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx4q_s8(a: int8x16_t, t: int8x16x4_t, idx: uint8x16_t) -> int8x16_t { - vqtbx4q(a, t.0, t.1, t.2, t.3, idx) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx4_u8(a: uint8x8_t, t: uint8x16x4_t, idx: uint8x8_t) -> uint8x8_t { - transmute(vqtbx4( - transmute(a), - transmute(t.0), - transmute(t.1), - transmute(t.2), - transmute(t.3), - idx, - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx4q_u8(a: uint8x16_t, t: uint8x16x4_t, idx: uint8x16_t) -> uint8x16_t { - transmute(vqtbx4q( - transmute(a), - transmute(t.0), - transmute(t.1), - transmute(t.2), - transmute(t.3), - idx, - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx4_p8(a: poly8x8_t, t: poly8x16x4_t, idx: uint8x8_t) -> poly8x8_t { - transmute(vqtbx4( - transmute(a), - transmute(t.0), - transmute(t.1), - transmute(t.2), - transmute(t.3), - idx, - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(tbx))] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vqtbx4q_p8(a: poly8x16_t, t: poly8x16x4_t, idx: uint8x16_t) -> poly8x16_t { - transmute(vqtbx4q( - transmute(a), - transmute(t.0), - transmute(t.1), - transmute(t.2), - transmute(t.3), - idx, - )) -} - /// Shift left #[inline] #[target_feature(enable = "neon")] @@ -2957,570 +570,6 @@ pub unsafe fn vsrad_n_u64(a: u64, b: u64) -> u64 { a.wrapping_add(vshrd_n_u64::(b)) } -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsli_n_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { - static_assert_uimm_bits!(N, 3); - vsli_n_s8_(a, b, N) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsliq_n_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { - static_assert_uimm_bits!(N, 3); - vsliq_n_s8_(a, b, N) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsli_n_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { - static_assert_uimm_bits!(N, 4); - vsli_n_s16_(a, b, N) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsliq_n_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { - static_assert_uimm_bits!(N, 4); - vsliq_n_s16_(a, b, N) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsli_n_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { - static_assert!(N >= 0 && N <= 31); - vsli_n_s32_(a, b, N) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsliq_n_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { - static_assert!(N >= 0 && N <= 31); - vsliq_n_s32_(a, b, N) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsli_n_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t { - static_assert!(N >= 0 && N <= 63); - vsli_n_s64_(a, b, N) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsliq_n_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t { - static_assert!(N >= 0 && N <= 63); - vsliq_n_s64_(a, b, N) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsli_n_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { - static_assert_uimm_bits!(N, 3); - transmute(vsli_n_s8_(transmute(a), transmute(b), N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsliq_n_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { - static_assert_uimm_bits!(N, 3); - transmute(vsliq_n_s8_(transmute(a), transmute(b), N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsli_n_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { - static_assert_uimm_bits!(N, 4); - transmute(vsli_n_s16_(transmute(a), transmute(b), N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsliq_n_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { - static_assert_uimm_bits!(N, 4); - transmute(vsliq_n_s16_(transmute(a), transmute(b), N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsli_n_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { - static_assert!(N >= 0 && N <= 31); - transmute(vsli_n_s32_(transmute(a), transmute(b), N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsliq_n_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { - static_assert!(N >= 0 && N <= 31); - transmute(vsliq_n_s32_(transmute(a), transmute(b), N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsli_n_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t { - static_assert!(N >= 0 && N <= 63); - transmute(vsli_n_s64_(transmute(a), transmute(b), N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsliq_n_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t { - static_assert!(N >= 0 && N <= 63); - transmute(vsliq_n_s64_(transmute(a), transmute(b), N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsli_n_p8(a: poly8x8_t, b: poly8x8_t) -> poly8x8_t { - static_assert_uimm_bits!(N, 3); - transmute(vsli_n_s8_(transmute(a), transmute(b), N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsliq_n_p8(a: poly8x16_t, b: poly8x16_t) -> poly8x16_t { - static_assert_uimm_bits!(N, 3); - transmute(vsliq_n_s8_(transmute(a), transmute(b), N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsli_n_p16(a: poly16x4_t, b: poly16x4_t) -> poly16x4_t { - static_assert_uimm_bits!(N, 4); - transmute(vsli_n_s16_(transmute(a), transmute(b), N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsliq_n_p16(a: poly16x8_t, b: poly16x8_t) -> poly16x8_t { - static_assert_uimm_bits!(N, 4); - transmute(vsliq_n_s16_(transmute(a), transmute(b), N)) -} - -/// Shift Left and Insert (immediate) -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsli_n_p64) -#[inline] -#[target_feature(enable = "neon,aes")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsli_n_p64(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t { - static_assert!(N >= 0 && N <= 63); - transmute(vsli_n_s64_(transmute(a), transmute(b), N)) -} - -/// Shift Left and Insert (immediate) -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsliq_n_p64) -#[inline] -#[target_feature(enable = "neon,aes")] -#[cfg_attr(test, assert_instr(sli, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsliq_n_p64(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t { - static_assert!(N >= 0 && N <= 63); - transmute(vsliq_n_s64_(transmute(a), transmute(b), N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsri_n_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { - static_assert!(N >= 1 && N <= 8); - vsri_n_s8_(a, b, N) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsriq_n_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { - static_assert!(N >= 1 && N <= 8); - vsriq_n_s8_(a, b, N) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsri_n_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { - static_assert!(N >= 1 && N <= 16); - vsri_n_s16_(a, b, N) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsriq_n_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { - static_assert!(N >= 1 && N <= 16); - vsriq_n_s16_(a, b, N) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsri_n_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { - static_assert!(N >= 1 && N <= 32); - vsri_n_s32_(a, b, N) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsriq_n_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { - static_assert!(N >= 1 && N <= 32); - vsriq_n_s32_(a, b, N) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsri_n_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t { - static_assert!(N >= 1 && N <= 64); - vsri_n_s64_(a, b, N) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsriq_n_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t { - static_assert!(N >= 1 && N <= 64); - vsriq_n_s64_(a, b, N) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsri_n_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { - static_assert!(N >= 1 && N <= 8); - transmute(vsri_n_s8_(transmute(a), transmute(b), N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsriq_n_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { - static_assert!(N >= 1 && N <= 8); - transmute(vsriq_n_s8_(transmute(a), transmute(b), N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsri_n_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { - static_assert!(N >= 1 && N <= 16); - transmute(vsri_n_s16_(transmute(a), transmute(b), N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsriq_n_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { - static_assert!(N >= 1 && N <= 16); - transmute(vsriq_n_s16_(transmute(a), transmute(b), N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsri_n_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { - static_assert!(N >= 1 && N <= 32); - transmute(vsri_n_s32_(transmute(a), transmute(b), N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsriq_n_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { - static_assert!(N >= 1 && N <= 32); - transmute(vsriq_n_s32_(transmute(a), transmute(b), N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsri_n_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t { - static_assert!(N >= 1 && N <= 64); - transmute(vsri_n_s64_(transmute(a), transmute(b), N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsriq_n_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t { - static_assert!(N >= 1 && N <= 64); - transmute(vsriq_n_s64_(transmute(a), transmute(b), N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsri_n_p8(a: poly8x8_t, b: poly8x8_t) -> poly8x8_t { - static_assert!(N >= 1 && N <= 8); - transmute(vsri_n_s8_(transmute(a), transmute(b), N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsriq_n_p8(a: poly8x16_t, b: poly8x16_t) -> poly8x16_t { - static_assert!(N >= 1 && N <= 8); - transmute(vsriq_n_s8_(transmute(a), transmute(b), N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsri_n_p16(a: poly16x4_t, b: poly16x4_t) -> poly16x4_t { - static_assert!(N >= 1 && N <= 16); - transmute(vsri_n_s16_(transmute(a), transmute(b), N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsriq_n_p16(a: poly16x8_t, b: poly16x8_t) -> poly16x8_t { - static_assert!(N >= 1 && N <= 16); - transmute(vsriq_n_s16_(transmute(a), transmute(b), N)) -} - -/// Shift Right and Insert (immediate) -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsri_n_p64) -#[inline] -#[target_feature(enable = "neon,aes")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsri_n_p64(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t { - static_assert!(N >= 1 && N <= 64); - transmute(vsri_n_s64_(transmute(a), transmute(b), N)) -} - -/// Shift Right and Insert (immediate) -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsriq_n_p64) -#[inline] -#[target_feature(enable = "neon,aes")] -#[cfg_attr(test, assert_instr(sri, N = 1))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "neon_intrinsics", since = "1.59.0")] -pub unsafe fn vsriq_n_p64(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t { - static_assert!(N >= 1 && N <= 64); - transmute(vsriq_n_s64_(transmute(a), transmute(b), N)) -} - -/// SM3TT1A -#[inline] -#[target_feature(enable = "neon,sm4")] -#[cfg_attr(test, assert_instr(sm3tt1a, IMM2 = 0))] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_sm4", issue = "117226")] -pub unsafe fn vsm3tt1aq_u32( - a: uint32x4_t, - b: uint32x4_t, - c: uint32x4_t, -) -> uint32x4_t { - static_assert_uimm_bits!(IMM2, 2); - #[allow(improper_ctypes)] - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sm3tt1a" - )] - fn vsm3tt1aq_u32_(a: uint32x4_t, b: uint32x4_t, c: uint32x4_t, imm2: i64) -> uint32x4_t; - } - vsm3tt1aq_u32_(a, b, c, IMM2 as i64) -} - -/// SM3TT1B -#[inline] -#[target_feature(enable = "neon,sm4")] -#[cfg_attr(test, assert_instr(sm3tt1b, IMM2 = 0))] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_sm4", issue = "117226")] -pub unsafe fn vsm3tt1bq_u32( - a: uint32x4_t, - b: uint32x4_t, - c: uint32x4_t, -) -> uint32x4_t { - static_assert_uimm_bits!(IMM2, 2); - #[allow(improper_ctypes)] - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sm3tt1b" - )] - fn vsm3tt1bq_u32_(a: uint32x4_t, b: uint32x4_t, c: uint32x4_t, imm2: i64) -> uint32x4_t; - } - vsm3tt1bq_u32_(a, b, c, IMM2 as i64) -} - -/// SM3TT2A -#[inline] -#[target_feature(enable = "neon,sm4")] -#[cfg_attr(test, assert_instr(sm3tt2a, IMM2 = 0))] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_sm4", issue = "117226")] -pub unsafe fn vsm3tt2aq_u32( - a: uint32x4_t, - b: uint32x4_t, - c: uint32x4_t, -) -> uint32x4_t { - static_assert_uimm_bits!(IMM2, 2); - #[allow(improper_ctypes)] - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sm3tt2a" - )] - fn vsm3tt2aq_u32_(a: uint32x4_t, b: uint32x4_t, c: uint32x4_t, imm2: i64) -> uint32x4_t; - } - vsm3tt2aq_u32_(a, b, c, IMM2 as i64) -} - -/// SM3TT2B -#[inline] -#[target_feature(enable = "neon,sm4")] -#[cfg_attr(test, assert_instr(sm3tt2b, IMM2 = 0))] -#[rustc_legacy_const_generics(3)] -#[unstable(feature = "stdarch_neon_sm4", issue = "117226")] -pub unsafe fn vsm3tt2bq_u32( - a: uint32x4_t, - b: uint32x4_t, - c: uint32x4_t, -) -> uint32x4_t { - static_assert_uimm_bits!(IMM2, 2); - #[allow(improper_ctypes)] - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sm3tt2b" - )] - fn vsm3tt2bq_u32_(a: uint32x4_t, b: uint32x4_t, c: uint32x4_t, imm2: i64) -> uint32x4_t; - } - vsm3tt2bq_u32_(a, b, c, IMM2 as i64) -} - -/// Exclusive OR and rotate -#[inline] -#[target_feature(enable = "neon,sha3")] -#[cfg_attr(test, assert_instr(xar, IMM6 = 0))] -#[rustc_legacy_const_generics(2)] -#[stable(feature = "stdarch_neon_sha3", since = "1.79.0")] -pub unsafe fn vxarq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t { - static_assert_uimm_bits!(IMM6, 6); - #[allow(improper_ctypes)] - unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.xar" - )] - fn vxarq_u64_(a: uint64x2_t, b: uint64x2_t, n: i64) -> uint64x2_t; - } - vxarq_u64_(a, b, IMM6 as i64) -} - #[cfg(test)] mod tests { use crate::core_arch::aarch64::test_support::*; @@ -3529,255 +578,6 @@ mod tests { use std::mem::transmute; use stdarch_test::simd_test; - #[simd_test(enable = "neon")] - unsafe fn test_vuqadd_s8() { - let a = i8x8::new(i8::MIN, -3, -2, -1, 0, 1, 2, i8::MAX); - let b = u8x8::new(u8::MAX, 1, 2, 3, 4, 5, 6, 7); - let e = i8x8::new(i8::MAX, -2, 0, 2, 4, 6, 8, i8::MAX); - let r: i8x8 = transmute(vuqadd_s8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vuqaddq_s8() { - let a = i8x16::new( - i8::MIN, - -7, - -6, - -5, - -4, - -3, - -2, - -1, - 0, - 1, - 2, - 3, - 4, - 5, - 6, - i8::MAX, - ); - let b = u8x16::new(u8::MAX, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); - let e = i8x16::new( - i8::MAX, - -6, - -4, - -2, - 0, - 2, - 4, - 6, - 8, - 10, - 12, - 14, - 16, - 18, - 20, - i8::MAX, - ); - let r: i8x16 = transmute(vuqaddq_s8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vuqadd_s16() { - let a = i16x4::new(i16::MIN, -1, 0, i16::MAX); - let b = u16x4::new(u16::MAX, 1, 2, 3); - let e = i16x4::new(i16::MAX, 0, 2, i16::MAX); - let r: i16x4 = transmute(vuqadd_s16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vuqaddq_s16() { - let a = i16x8::new(i16::MIN, -3, -2, -1, 0, 1, 2, i16::MAX); - let b = u16x8::new(u16::MAX, 1, 2, 3, 4, 5, 6, 7); - let e = i16x8::new(i16::MAX, -2, 0, 2, 4, 6, 8, i16::MAX); - let r: i16x8 = transmute(vuqaddq_s16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vuqadd_s32() { - let a = i32x2::new(i32::MIN, i32::MAX); - let b = u32x2::new(u32::MAX, 1); - let e = i32x2::new(i32::MAX, i32::MAX); - let r: i32x2 = transmute(vuqadd_s32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vuqaddq_s32() { - let a = i32x4::new(i32::MIN, -1, 0, i32::MAX); - let b = u32x4::new(u32::MAX, 1, 2, 3); - let e = i32x4::new(i32::MAX, 0, 2, i32::MAX); - let r: i32x4 = transmute(vuqaddq_s32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vuqadd_s64() { - let a = i64x1::new(i64::MIN); - let b = u64x1::new(u64::MAX); - let e = i64x1::new(i64::MAX); - let r: i64x1 = transmute(vuqadd_s64(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vuqaddq_s64() { - let a = i64x2::new(i64::MIN, i64::MAX); - let b = u64x2::new(u64::MAX, 1); - let e = i64x2::new(i64::MAX, i64::MAX); - let r: i64x2 = transmute(vuqaddq_s64(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vsqadd_u8() { - let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, u8::MAX); - let b = i8x8::new(i8::MIN, -3, -2, -1, 0, 1, 2, 3); - let e = u8x8::new(0, 0, 0, 2, 4, 6, 8, u8::MAX); - let r: u8x8 = transmute(vsqadd_u8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vsqaddq_u8() { - let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, u8::MAX); - let b = i8x16::new(i8::MIN, -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7); - let e = u8x16::new(0, 0, 0, 0, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, u8::MAX); - let r: u8x16 = transmute(vsqaddq_u8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vsqadd_u16() { - let a = u16x4::new(0, 1, 2, u16::MAX); - let b = i16x4::new(i16::MIN, -1, 0, 1); - let e = u16x4::new(0, 0, 2, u16::MAX); - let r: u16x4 = transmute(vsqadd_u16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vsqaddq_u16() { - let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, u16::MAX); - let b = i16x8::new(i16::MIN, -3, -2, -1, 0, 1, 2, 3); - let e = u16x8::new(0, 0, 0, 2, 4, 6, 8, u16::MAX); - let r: u16x8 = transmute(vsqaddq_u16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vsqadd_u32() { - let a = u32x2::new(0, u32::MAX); - let b = i32x2::new(i32::MIN, 1); - let e = u32x2::new(0, u32::MAX); - let r: u32x2 = transmute(vsqadd_u32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vsqaddq_u32() { - let a = u32x4::new(0, 1, 2, u32::MAX); - let b = i32x4::new(i32::MIN, -1, 0, 1); - let e = u32x4::new(0, 0, 2, u32::MAX); - let r: u32x4 = transmute(vsqaddq_u32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vsqadd_u64() { - let a = u64x1::new(0); - let b = i64x1::new(i64::MIN); - let e = u64x1::new(0); - let r: u64x1 = transmute(vsqadd_u64(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vsqaddq_u64() { - let a = u64x2::new(0, u64::MAX); - let b = i64x2::new(i64::MIN, 1); - let e = u64x2::new(0, u64::MAX); - let r: u64x2 = transmute(vsqaddq_u64(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddq_s16() { - let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); - let b = i16x8::new(0, -1, -2, -3, -4, -5, -6, -7); - let r: i16x8 = transmute(vpaddq_s16(transmute(a), transmute(b))); - let e = i16x8::new(3, 7, 11, 15, -1, -5, -9, -13); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpaddq_s32() { - let a = i32x4::new(1, 2, 3, 4); - let b = i32x4::new(0, -1, -2, -3); - let r: i32x4 = transmute(vpaddq_s32(transmute(a), transmute(b))); - let e = i32x4::new(3, 7, -1, -5); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpaddq_s64() { - let a = i64x2::new(1, 2); - let b = i64x2::new(0, -1); - let r: i64x2 = transmute(vpaddq_s64(transmute(a), transmute(b))); - let e = i64x2::new(3, -1); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpaddq_s8() { - let a = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); - let b = i8x16::new( - 0, -1, -2, -3, -4, -5, -6, -7, -8, -8, -10, -11, -12, -13, -14, -15, - ); - let r: i8x16 = transmute(vpaddq_s8(transmute(a), transmute(b))); - let e = i8x16::new( - 3, 7, 11, 15, 19, 23, 27, 31, -1, -5, -9, -13, -16, -21, -25, -29, - ); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpaddq_u16() { - let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7); - let b = u16x8::new(17, 18, 19, 20, 20, 21, 22, 23); - let r: u16x8 = transmute(vpaddq_u16(transmute(a), transmute(b))); - let e = u16x8::new(1, 5, 9, 13, 35, 39, 41, 45); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpaddq_u32() { - let a = u32x4::new(0, 1, 2, 3); - let b = u32x4::new(17, 18, 19, 20); - let r: u32x4 = transmute(vpaddq_u32(transmute(a), transmute(b))); - let e = u32x4::new(1, 5, 35, 39); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpaddq_u64() { - let a = u64x2::new(0, 1); - let b = u64x2::new(17, 18); - let r: u64x2 = transmute(vpaddq_u64(transmute(a), transmute(b))); - let e = u64x2::new(1, 35); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpaddq_u8() { - let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); - let b = i8x16::new( - 17, 18, 19, 20, 20, 21, 22, 23, 24, 25, 26, 27, 29, 29, 30, 31, - ); - let r = i8x16::new(1, 5, 9, 13, 17, 21, 25, 29, 35, 39, 41, 45, 49, 53, 58, 61); - let e: i8x16 = transmute(vpaddq_u8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpaddd_s64() { - let a = i64x2::new(2, -3); - let r: i64 = vpaddd_s64(transmute(a)); - let e = -1_i64; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpaddd_u64() { - let a = i64x2::new(2, 3); - let r: u64 = vpaddd_u64(transmute(a)); - let e = 5_u64; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] unsafe fn test_vadd_f64() { let a = 1.; @@ -3832,366 +632,6 @@ mod tests { assert_eq!(r, e); } - #[simd_test(enable = "neon")] - unsafe fn test_vmaxv_s8() { - let r = vmaxv_s8(transmute(i8x8::new(1, 2, 3, 4, -8, 6, 7, 5))); - assert_eq!(r, 7_i8); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxvq_s8() { - #[rustfmt::skip] - let r = vmaxvq_s8(transmute(i8x16::new( - 1, 2, 3, 4, - -16, 6, 7, 5, - 8, 1, 1, 1, - 1, 1, 1, 1, - ))); - assert_eq!(r, 8_i8); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxv_s16() { - let r = vmaxv_s16(transmute(i16x4::new(1, 2, -4, 3))); - assert_eq!(r, 3_i16); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxvq_s16() { - let r = vmaxvq_s16(transmute(i16x8::new(1, 2, 7, 4, -16, 6, 7, 5))); - assert_eq!(r, 7_i16); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxv_s32() { - let r = vmaxv_s32(transmute(i32x2::new(1, -4))); - assert_eq!(r, 1_i32); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxvq_s32() { - let r = vmaxvq_s32(transmute(i32x4::new(1, 2, -32, 4))); - assert_eq!(r, 4_i32); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxv_u8() { - let r = vmaxv_u8(transmute(u8x8::new(1, 2, 3, 4, 8, 6, 7, 5))); - assert_eq!(r, 8_u8); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxvq_u8() { - #[rustfmt::skip] - let r = vmaxvq_u8(transmute(u8x16::new( - 1, 2, 3, 4, - 16, 6, 7, 5, - 8, 1, 1, 1, - 1, 1, 1, 1, - ))); - assert_eq!(r, 16_u8); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxv_u16() { - let r = vmaxv_u16(transmute(u16x4::new(1, 2, 4, 3))); - assert_eq!(r, 4_u16); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxvq_u16() { - let r = vmaxvq_u16(transmute(u16x8::new(1, 2, 7, 4, 16, 6, 7, 5))); - assert_eq!(r, 16_u16); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxv_u32() { - let r = vmaxv_u32(transmute(u32x2::new(1, 4))); - assert_eq!(r, 4_u32); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxvq_u32() { - let r = vmaxvq_u32(transmute(u32x4::new(1, 2, 32, 4))); - assert_eq!(r, 32_u32); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxv_f32() { - let r = vmaxv_f32(transmute(f32x2::new(1., 4.))); - assert_eq!(r, 4_f32); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxvq_f32() { - let r = vmaxvq_f32(transmute(f32x4::new(1., 2., 32., 4.))); - assert_eq!(r, 32_f32); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmaxvq_f64() { - let r = vmaxvq_f64(transmute(f64x2::new(1., 4.))); - assert_eq!(r, 4_f64); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminv_s8() { - let r = vminv_s8(transmute(i8x8::new(1, 2, 3, 4, -8, 6, 7, 5))); - assert_eq!(r, -8_i8); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminvq_s8() { - #[rustfmt::skip] - let r = vminvq_s8(transmute(i8x16::new( - 1, 2, 3, 4, - -16, 6, 7, 5, - 8, 1, 1, 1, - 1, 1, 1, 1, - ))); - assert_eq!(r, -16_i8); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminv_s16() { - let r = vminv_s16(transmute(i16x4::new(1, 2, -4, 3))); - assert_eq!(r, -4_i16); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminvq_s16() { - let r = vminvq_s16(transmute(i16x8::new(1, 2, 7, 4, -16, 6, 7, 5))); - assert_eq!(r, -16_i16); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminv_s32() { - let r = vminv_s32(transmute(i32x2::new(1, -4))); - assert_eq!(r, -4_i32); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminvq_s32() { - let r = vminvq_s32(transmute(i32x4::new(1, 2, -32, 4))); - assert_eq!(r, -32_i32); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminv_u8() { - let r = vminv_u8(transmute(u8x8::new(1, 2, 3, 4, 8, 6, 7, 5))); - assert_eq!(r, 1_u8); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminvq_u8() { - #[rustfmt::skip] - let r = vminvq_u8(transmute(u8x16::new( - 1, 2, 3, 4, - 16, 6, 7, 5, - 8, 1, 1, 1, - 1, 1, 1, 1, - ))); - assert_eq!(r, 1_u8); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminv_u16() { - let r = vminv_u16(transmute(u16x4::new(1, 2, 4, 3))); - assert_eq!(r, 1_u16); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminvq_u16() { - let r = vminvq_u16(transmute(u16x8::new(1, 2, 7, 4, 16, 6, 7, 5))); - assert_eq!(r, 1_u16); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminv_u32() { - let r = vminv_u32(transmute(u32x2::new(1, 4))); - assert_eq!(r, 1_u32); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminvq_u32() { - let r = vminvq_u32(transmute(u32x4::new(1, 2, 32, 4))); - assert_eq!(r, 1_u32); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminv_f32() { - let r = vminv_f32(transmute(f32x2::new(1., 4.))); - assert_eq!(r, 1_f32); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminvq_f32() { - let r = vminvq_f32(transmute(f32x4::new(1., 2., 32., 4.))); - assert_eq!(r, 1_f32); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vminvq_f64() { - let r = vminvq_f64(transmute(f64x2::new(1., 4.))); - assert_eq!(r, 1_f64); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpminq_s8() { - #[rustfmt::skip] - let a = i8x16::new(1, -2, 3, -4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8); - #[rustfmt::skip] - let b = i8x16::new(0, 3, 2, 5, 4, 7, 6, 9, 0, 3, 2, 5, 4, 7, 6, 9); - #[rustfmt::skip] - let e = i8x16::new(-2, -4, 5, 7, 1, 3, 5, 7, 0, 2, 4, 6, 0, 2, 4, 6); - let r: i8x16 = transmute(vpminq_s8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpminq_s16() { - let a = i16x8::new(1, -2, 3, 4, 5, 6, 7, 8); - let b = i16x8::new(0, 3, 2, 5, 4, 7, 6, 9); - let e = i16x8::new(-2, 3, 5, 7, 0, 2, 4, 6); - let r: i16x8 = transmute(vpminq_s16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpminq_s32() { - let a = i32x4::new(1, -2, 3, 4); - let b = i32x4::new(0, 3, 2, 5); - let e = i32x4::new(-2, 3, 0, 2); - let r: i32x4 = transmute(vpminq_s32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpminq_u8() { - #[rustfmt::skip] - let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8); - #[rustfmt::skip] - let b = u8x16::new(0, 3, 2, 5, 4, 7, 6, 9, 0, 3, 2, 5, 4, 7, 6, 9); - #[rustfmt::skip] - let e = u8x16::new(1, 3, 5, 7, 1, 3, 5, 7, 0, 2, 4, 6, 0, 2, 4, 6); - let r: u8x16 = transmute(vpminq_u8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpminq_u16() { - let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); - let b = u16x8::new(0, 3, 2, 5, 4, 7, 6, 9); - let e = u16x8::new(1, 3, 5, 7, 0, 2, 4, 6); - let r: u16x8 = transmute(vpminq_u16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpminq_u32() { - let a = u32x4::new(1, 2, 3, 4); - let b = u32x4::new(0, 3, 2, 5); - let e = u32x4::new(1, 3, 0, 2); - let r: u32x4 = transmute(vpminq_u32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmin_f32() { - let a = f32x4::new(1., -2., 3., 4.); - let b = f32x4::new(0., 3., 2., 5.); - let e = f32x4::new(-2., 3., 0., 2.); - let r: f32x4 = transmute(vpminq_f32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmin_f64() { - let a = f64x2::new(1., -2.); - let b = f64x2::new(0., 3.); - let e = f64x2::new(-2., 0.); - let r: f64x2 = transmute(vpminq_f64(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmaxq_s8() { - #[rustfmt::skip] - let a = i8x16::new(1, -2, 3, -4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8); - #[rustfmt::skip] - let b = i8x16::new(0, 3, 2, 5, 4, 7, 6, 9, 0, 3, 2, 5, 4, 7, 6, 9); - #[rustfmt::skip] - let e = i8x16::new(1, 3, 6, 8, 2, 4, 6, 8, 3, 5, 7, 9, 3, 5, 7, 9); - let r: i8x16 = transmute(vpmaxq_s8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmaxq_s16() { - let a = i16x8::new(1, -2, 3, 4, 5, 6, 7, 8); - let b = i16x8::new(0, 3, 2, 5, 4, 7, 6, 9); - let e = i16x8::new(1, 4, 6, 8, 3, 5, 7, 9); - let r: i16x8 = transmute(vpmaxq_s16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmaxq_s32() { - let a = i32x4::new(1, -2, 3, 4); - let b = i32x4::new(0, 3, 2, 5); - let e = i32x4::new(1, 4, 3, 5); - let r: i32x4 = transmute(vpmaxq_s32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmaxq_u8() { - #[rustfmt::skip] - let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8); - #[rustfmt::skip] - let b = u8x16::new(0, 3, 2, 5, 4, 7, 6, 9, 0, 3, 2, 5, 4, 7, 6, 9); - #[rustfmt::skip] - let e = u8x16::new(2, 4, 6, 8, 2, 4, 6, 8, 3, 5, 7, 9, 3, 5, 7, 9); - let r: u8x16 = transmute(vpmaxq_u8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmaxq_u16() { - let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); - let b = u16x8::new(0, 3, 2, 5, 4, 7, 6, 9); - let e = u16x8::new(2, 4, 6, 8, 3, 5, 7, 9); - let r: u16x8 = transmute(vpmaxq_u16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmaxq_u32() { - let a = u32x4::new(1, 2, 3, 4); - let b = u32x4::new(0, 3, 2, 5); - let e = u32x4::new(2, 4, 3, 5); - let r: u32x4 = transmute(vpmaxq_u32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmax_f32() { - let a = f32x4::new(1., -2., 3., 4.); - let b = f32x4::new(0., 3., 2., 5.); - let e = f32x4::new(1., 4., 3., 5.); - let r: f32x4 = transmute(vpmaxq_f32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmax_f64() { - let a = f64x2::new(1., -2.); - let b = f64x2::new(0., 3.); - let e = f64x2::new(1., 3.); - let r: f64x2 = transmute(vpmaxq_f64(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] unsafe fn test_vext_p64() { let a: i64x1 = i64x1::new(0); @@ -4444,291 +884,6 @@ mod tests { assert_eq!(r, e); } - #[simd_test(enable = "neon")] - unsafe fn test_vceq_u64() { - test_cmp_u64( - |i, j| vceq_u64(i, j), - |a: u64, b: u64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vceqq_u64() { - testq_cmp_u64( - |i, j| vceqq_u64(i, j), - |a: u64, b: u64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vceq_s64() { - test_cmp_s64( - |i, j| vceq_s64(i, j), - |a: i64, b: i64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vceqq_s64() { - testq_cmp_s64( - |i, j| vceqq_s64(i, j), - |a: i64, b: i64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vceq_p64() { - test_cmp_p64( - |i, j| vceq_p64(i, j), - |a: u64, b: u64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vceqq_p64() { - testq_cmp_p64( - |i, j| vceqq_p64(i, j), - |a: u64, b: u64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vceq_f64() { - test_cmp_f64( - |i, j| vceq_f64(i, j), - |a: f64, b: f64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vceqq_f64() { - testq_cmp_f64( - |i, j| vceqq_f64(i, j), - |a: f64, b: f64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vcgt_s64() { - test_cmp_s64( - |i, j| vcgt_s64(i, j), - |a: i64, b: i64| -> u64 { if a > b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcgtq_s64() { - testq_cmp_s64( - |i, j| vcgtq_s64(i, j), - |a: i64, b: i64| -> u64 { if a > b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vcgt_u64() { - test_cmp_u64( - |i, j| vcgt_u64(i, j), - |a: u64, b: u64| -> u64 { if a > b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcgtq_u64() { - testq_cmp_u64( - |i, j| vcgtq_u64(i, j), - |a: u64, b: u64| -> u64 { if a > b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vcgt_f64() { - test_cmp_f64( - |i, j| vcgt_f64(i, j), - |a: f64, b: f64| -> u64 { if a > b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcgtq_f64() { - testq_cmp_f64( - |i, j| vcgtq_f64(i, j), - |a: f64, b: f64| -> u64 { if a > b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vclt_s64() { - test_cmp_s64( - |i, j| vclt_s64(i, j), - |a: i64, b: i64| -> u64 { if a < b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcltq_s64() { - testq_cmp_s64( - |i, j| vcltq_s64(i, j), - |a: i64, b: i64| -> u64 { if a < b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vclt_u64() { - test_cmp_u64( - |i, j| vclt_u64(i, j), - |a: u64, b: u64| -> u64 { if a < b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcltq_u64() { - testq_cmp_u64( - |i, j| vcltq_u64(i, j), - |a: u64, b: u64| -> u64 { if a < b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vltq_f64() { - test_cmp_f64( - |i, j| vclt_f64(i, j), - |a: f64, b: f64| -> u64 { if a < b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcltq_f64() { - testq_cmp_f64( - |i, j| vcltq_f64(i, j), - |a: f64, b: f64| -> u64 { if a < b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vcle_s64() { - test_cmp_s64( - |i, j| vcle_s64(i, j), - |a: i64, b: i64| -> u64 { if a <= b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcleq_s64() { - testq_cmp_s64( - |i, j| vcleq_s64(i, j), - |a: i64, b: i64| -> u64 { if a <= b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vcle_u64() { - test_cmp_u64( - |i, j| vcle_u64(i, j), - |a: u64, b: u64| -> u64 { if a <= b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcleq_u64() { - testq_cmp_u64( - |i, j| vcleq_u64(i, j), - |a: u64, b: u64| -> u64 { if a <= b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vleq_f64() { - test_cmp_f64( - |i, j| vcle_f64(i, j), - |a: f64, b: f64| -> u64 { if a <= b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcleq_f64() { - testq_cmp_f64( - |i, j| vcleq_f64(i, j), - |a: f64, b: f64| -> u64 { if a <= b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vcge_s64() { - test_cmp_s64( - |i, j| vcge_s64(i, j), - |a: i64, b: i64| -> u64 { if a >= b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcgeq_s64() { - testq_cmp_s64( - |i, j| vcgeq_s64(i, j), - |a: i64, b: i64| -> u64 { if a >= b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vcge_u64() { - test_cmp_u64( - |i, j| vcge_u64(i, j), - |a: u64, b: u64| -> u64 { if a >= b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcgeq_u64() { - testq_cmp_u64( - |i, j| vcgeq_u64(i, j), - |a: u64, b: u64| -> u64 { if a >= b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vgeq_f64() { - test_cmp_f64( - |i, j| vcge_f64(i, j), - |a: f64, b: f64| -> u64 { if a >= b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcgeq_f64() { - testq_cmp_f64( - |i, j| vcgeq_f64(i, j), - |a: f64, b: f64| -> u64 { if a >= b { 0xFFFFFFFFFFFFFFFF } else { 0 } }, - ); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vmul_f64() { - test_ari_f64(|i, j| vmul_f64(i, j), |a: f64, b: f64| -> f64 { a * b }); - } - #[simd_test(enable = "neon")] - unsafe fn test_vmulq_f64() { - testq_ari_f64(|i, j| vmulq_f64(i, j), |a: f64, b: f64| -> f64 { a * b }); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vsub_f64() { - test_ari_f64(|i, j| vsub_f64(i, j), |a: f64, b: f64| -> f64 { a - b }); - } - #[simd_test(enable = "neon")] - unsafe fn test_vsubq_f64() { - testq_ari_f64(|i, j| vsubq_f64(i, j), |a: f64, b: f64| -> f64 { a - b }); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vabsd_s64() { - assert_eq!(vabsd_s64(-1), 1); - assert_eq!(vabsd_s64(0), 0); - assert_eq!(vabsd_s64(1), 1); - assert_eq!(vabsd_s64(i64::MIN), i64::MIN); - assert_eq!(vabsd_s64(i64::MIN + 1), i64::MAX); - } - #[simd_test(enable = "neon")] - unsafe fn test_vabs_s64() { - let a = i64x1::new(i64::MIN); - let r: i64x1 = transmute(vabs_s64(transmute(a))); - let e = i64x1::new(i64::MIN); - assert_eq!(r, e); - let a = i64x1::new(i64::MIN + 1); - let r: i64x1 = transmute(vabs_s64(transmute(a))); - let e = i64x1::new(i64::MAX); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vabsq_s64() { - let a = i64x2::new(i64::MIN, i64::MIN + 1); - let r: i64x2 = transmute(vabsq_s64(transmute(a))); - let e = i64x2::new(i64::MIN, i64::MAX); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] unsafe fn test_vbsl_f64() { let a = u64x1::new(0x8000000000000000); @@ -4766,134 +921,6 @@ mod tests { assert_eq!(r, e); } - #[simd_test(enable = "neon")] - unsafe fn test_vaddv_s16() { - let a = i16x4::new(1, 2, 3, -4); - let r: i16 = vaddv_s16(transmute(a)); - let e = 2_i16; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddv_u16() { - let a = u16x4::new(1, 2, 3, 4); - let r: u16 = vaddv_u16(transmute(a)); - let e = 10_u16; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddv_s32() { - let a = i32x2::new(1, -2); - let r: i32 = vaddv_s32(transmute(a)); - let e = -1_i32; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddv_u32() { - let a = u32x2::new(1, 2); - let r: u32 = vaddv_u32(transmute(a)); - let e = 3_u32; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddv_s8() { - let a = i8x8::new(1, 2, 3, 4, 5, 6, 7, -8); - let r: i8 = vaddv_s8(transmute(a)); - let e = 20_i8; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddv_u8() { - let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); - let r: u8 = vaddv_u8(transmute(a)); - let e = 36_u8; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddvq_s16() { - let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, -8); - let r: i16 = vaddvq_s16(transmute(a)); - let e = 20_i16; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddvq_u16() { - let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); - let r: u16 = vaddvq_u16(transmute(a)); - let e = 36_u16; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddvq_s32() { - let a = i32x4::new(1, 2, 3, -4); - let r: i32 = vaddvq_s32(transmute(a)); - let e = 2_i32; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddvq_u32() { - let a = u32x4::new(1, 2, 3, 4); - let r: u32 = vaddvq_u32(transmute(a)); - let e = 10_u32; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddvq_s8() { - let a = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, -16); - let r: i8 = vaddvq_s8(transmute(a)); - let e = 104_i8; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddvq_u8() { - let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); - let r: u8 = vaddvq_u8(transmute(a)); - let e = 136_u8; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddvq_s64() { - let a = i64x2::new(1, -2); - let r: i64 = vaddvq_s64(transmute(a)); - let e = -1_i64; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddvq_u64() { - let a = u64x2::new(1, 2); - let r: u64 = vaddvq_u64(transmute(a)); - let e = 3_u64; - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vaddlv_s8() { - let a = i8x8::new(1, 2, 3, 4, 5, 6, 7, -8); - let r: i16 = vaddlv_s8(transmute(a)); - let e = 20_i16; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddlv_u8() { - let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); - let r: u16 = vaddlv_u8(transmute(a)); - let e = 36_u16; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddlvq_s8() { - let a = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, -16); - let r: i16 = vaddlvq_s8(transmute(a)); - let e = 104_i16; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vaddlvq_u8() { - let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); - let r: u16 = vaddlvq_u8(transmute(a)); - let e = 136_u16; - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] unsafe fn test_vld1_f64() { let a: [f64; 2] = [0., 1.]; @@ -4966,55 +993,6 @@ mod tests { assert_eq!(vals[1], 1.); assert_eq!(vals[2], 2.); } - - #[simd_test(enable = "neon,sm4")] - unsafe fn test_vsm3tt1aq_u32() { - let a: u32x4 = u32x4::new(1, 2, 3, 4); - let b: u32x4 = u32x4::new(1, 2, 3, 4); - let c: u32x4 = u32x4::new(1, 2, 3, 4); - let e: u32x4 = u32x4::new(2, 1536, 4, 16395); - let r: u32x4 = transmute(vsm3tt1aq_u32::<0>(transmute(a), transmute(b), transmute(c))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon,sm4")] - unsafe fn test_vsm3tt1bq_u32() { - let a: u32x4 = u32x4::new(1, 2, 3, 4); - let b: u32x4 = u32x4::new(1, 2, 3, 4); - let c: u32x4 = u32x4::new(1, 2, 3, 4); - let e: u32x4 = u32x4::new(2, 1536, 4, 16392); - let r: u32x4 = transmute(vsm3tt1bq_u32::<0>(transmute(a), transmute(b), transmute(c))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon,sm4")] - unsafe fn test_vsm3tt2aq_u32() { - let a: u32x4 = u32x4::new(1, 2, 3, 4); - let b: u32x4 = u32x4::new(1, 2, 3, 4); - let c: u32x4 = u32x4::new(1, 2, 3, 4); - let e: u32x4 = u32x4::new(2, 1572864, 4, 1447435); - let r: u32x4 = transmute(vsm3tt2aq_u32::<0>(transmute(a), transmute(b), transmute(c))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon,sm4")] - unsafe fn test_vsm3tt2bq_u32() { - let a: u32x4 = u32x4::new(1, 2, 3, 4); - let b: u32x4 = u32x4::new(1, 2, 3, 4); - let c: u32x4 = u32x4::new(1, 2, 3, 4); - let e: u32x4 = u32x4::new(2, 1572864, 4, 1052680); - let r: u32x4 = transmute(vsm3tt2bq_u32::<0>(transmute(a), transmute(b), transmute(c))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon,sha3")] - unsafe fn test_vxarq_u64() { - let a: u64x2 = u64x2::new(1, 2); - let b: u64x2 = u64x2::new(3, 4); - let e: u64x2 = u64x2::new(2, 6); - let r: u64x2 = transmute(vxarq_u64::<0>(transmute(a), transmute(b))); - assert_eq!(r, e); - } } #[cfg(test)] diff --git a/library/stdarch/crates/core_arch/src/arm/mod.rs b/library/stdarch/crates/core_arch/src/arm/mod.rs index c69661b38917..11d6e2df3ac0 100644 --- a/library/stdarch/crates/core_arch/src/arm/mod.rs +++ b/library/stdarch/crates/core_arch/src/arm/mod.rs @@ -64,12 +64,3 @@ pub use crate::core_arch::arm_shared::*; #[cfg(test)] use stdarch_test::assert_instr; - -// NEON intrinsics are currently broken on big-endian, so don't expose them. (#1484) -#[cfg(target_endian = "little")] -#[cfg(any(target_feature = "v7", doc))] -pub(crate) mod neon; -#[cfg(target_endian = "little")] -#[cfg(any(target_feature = "v7", doc))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub use neon::*; diff --git a/library/stdarch/crates/core_arch/src/arm/neon.rs b/library/stdarch/crates/core_arch/src/arm/neon.rs index ffeb2c6fe100..3badab5a4ca2 100644 --- a/library/stdarch/crates/core_arch/src/arm/neon.rs +++ b/library/stdarch/crates/core_arch/src/arm/neon.rs @@ -1,8 +1,4 @@ use crate::core_arch::arm_shared::neon::*; -use crate::mem::{align_of, transmute}; - -#[cfg(test)] -use stdarch_test::assert_instr; #[allow(improper_ctypes)] unsafe extern "unadjusted" { @@ -10,1441 +6,4 @@ unsafe extern "unadjusted" { fn vbsl_s8_(a: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t; #[link_name = "llvm.arm.neon.vbsl.v16i8"] fn vbslq_s8_(a: int8x16_t, b: int8x16_t, c: int8x16_t) -> int8x16_t; - #[link_name = "llvm.arm.neon.vpadals.v4i16.v8i8"] - pub(crate) fn vpadal_s8_(a: int16x4_t, b: int8x8_t) -> int16x4_t; - #[link_name = "llvm.arm.neon.vpadals.v2i32.v4i16"] - pub(crate) fn vpadal_s16_(a: int32x2_t, b: int16x4_t) -> int32x2_t; - #[link_name = "llvm.arm.neon.vpadals.v1i64.v2i32"] - pub(crate) fn vpadal_s32_(a: int64x1_t, b: int32x2_t) -> int64x1_t; - #[link_name = "llvm.arm.neon.vpadals.v8i16.v16i8"] - pub(crate) fn vpadalq_s8_(a: int16x8_t, b: int8x16_t) -> int16x8_t; - #[link_name = "llvm.arm.neon.vpadals.v4i32.v8i16"] - pub(crate) fn vpadalq_s16_(a: int32x4_t, b: int16x8_t) -> int32x4_t; - #[link_name = "llvm.arm.neon.vpadals.v2i64.v4i32"] - pub(crate) fn vpadalq_s32_(a: int64x2_t, b: int32x4_t) -> int64x2_t; - - #[link_name = "llvm.arm.neon.vpadalu.v4i16.v8i8"] - pub(crate) fn vpadal_u8_(a: uint16x4_t, b: uint8x8_t) -> uint16x4_t; - #[link_name = "llvm.arm.neon.vpadalu.v2i32.v4i16"] - pub(crate) fn vpadal_u16_(a: uint32x2_t, b: uint16x4_t) -> uint32x2_t; - #[link_name = "llvm.arm.neon.vpadalu.v1i64.v2i32"] - pub(crate) fn vpadal_u32_(a: uint64x1_t, b: uint32x2_t) -> uint64x1_t; - #[link_name = "llvm.arm.neon.vpadalu.v8i16.v16i8"] - pub(crate) fn vpadalq_u8_(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t; - #[link_name = "llvm.arm.neon.vpadalu.v4i32.v8i16"] - pub(crate) fn vpadalq_u16_(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t; - #[link_name = "llvm.arm.neon.vpadalu.v2i64.v4i32"] - pub(crate) fn vpadalq_u32_(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t; - - #[link_name = "llvm.arm.neon.vtbl1"] - fn vtbl1(a: int8x8_t, b: int8x8_t) -> int8x8_t; - #[link_name = "llvm.arm.neon.vtbl2"] - fn vtbl2(a: int8x8_t, b: int8x8_t, b: int8x8_t) -> int8x8_t; - #[link_name = "llvm.arm.neon.vtbl3"] - fn vtbl3(a: int8x8_t, b: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t; - #[link_name = "llvm.arm.neon.vtbl4"] - fn vtbl4(a: int8x8_t, b: int8x8_t, b: int8x8_t, c: int8x8_t, d: int8x8_t) -> int8x8_t; - - #[link_name = "llvm.arm.neon.vtbx1"] - fn vtbx1(a: int8x8_t, b: int8x8_t, b: int8x8_t) -> int8x8_t; - #[link_name = "llvm.arm.neon.vtbx2"] - fn vtbx2(a: int8x8_t, b: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t; - #[link_name = "llvm.arm.neon.vtbx3"] - fn vtbx3(a: int8x8_t, b: int8x8_t, b: int8x8_t, c: int8x8_t, d: int8x8_t) -> int8x8_t; - #[link_name = "llvm.arm.neon.vtbx4"] - fn vtbx4( - a: int8x8_t, - b: int8x8_t, - b: int8x8_t, - c: int8x8_t, - d: int8x8_t, - e: int8x8_t, - ) -> int8x8_t; - - #[link_name = "llvm.arm.neon.vshiftins.v8i8"] - fn vshiftins_v8i8(a: int8x8_t, b: int8x8_t, shift: int8x8_t) -> int8x8_t; - #[link_name = "llvm.arm.neon.vshiftins.v16i8"] - fn vshiftins_v16i8(a: int8x16_t, b: int8x16_t, shift: int8x16_t) -> int8x16_t; - #[link_name = "llvm.arm.neon.vshiftins.v4i16"] - fn vshiftins_v4i16(a: int16x4_t, b: int16x4_t, shift: int16x4_t) -> int16x4_t; - #[link_name = "llvm.arm.neon.vshiftins.v8i16"] - fn vshiftins_v8i16(a: int16x8_t, b: int16x8_t, shift: int16x8_t) -> int16x8_t; - #[link_name = "llvm.arm.neon.vshiftins.v2i32"] - fn vshiftins_v2i32(a: int32x2_t, b: int32x2_t, shift: int32x2_t) -> int32x2_t; - #[link_name = "llvm.arm.neon.vshiftins.v4i32"] - fn vshiftins_v4i32(a: int32x4_t, b: int32x4_t, shift: int32x4_t) -> int32x4_t; - #[link_name = "llvm.arm.neon.vshiftins.v1i64"] - fn vshiftins_v1i64(a: int64x1_t, b: int64x1_t, shift: int64x1_t) -> int64x1_t; - #[link_name = "llvm.arm.neon.vshiftins.v2i64"] - fn vshiftins_v2i64(a: int64x2_t, b: int64x2_t, shift: int64x2_t) -> int64x2_t; - - #[link_name = "llvm.arm.neon.vld1.v8i8.p0i8"] - fn vld1_v8i8(addr: *const i8, align: i32) -> int8x8_t; - #[link_name = "llvm.arm.neon.vld1.v16i8.p0i8"] - fn vld1q_v16i8(addr: *const i8, align: i32) -> int8x16_t; - #[link_name = "llvm.arm.neon.vld1.v4i16.p0i8"] - fn vld1_v4i16(addr: *const i8, align: i32) -> int16x4_t; - #[link_name = "llvm.arm.neon.vld1.v8i16.p0i8"] - fn vld1q_v8i16(addr: *const i8, align: i32) -> int16x8_t; - #[link_name = "llvm.arm.neon.vld1.v2i32.p0i8"] - fn vld1_v2i32(addr: *const i8, align: i32) -> int32x2_t; - #[link_name = "llvm.arm.neon.vld1.v4i32.p0i8"] - fn vld1q_v4i32(addr: *const i8, align: i32) -> int32x4_t; - #[link_name = "llvm.arm.neon.vld1.v1i64.p0i8"] - fn vld1_v1i64(addr: *const i8, align: i32) -> int64x1_t; - #[link_name = "llvm.arm.neon.vld1.v2i64.p0i8"] - fn vld1q_v2i64(addr: *const i8, align: i32) -> int64x2_t; - #[link_name = "llvm.arm.neon.vld1.v2f32.p0i8"] - fn vld1_v2f32(addr: *const i8, align: i32) -> float32x2_t; - #[link_name = "llvm.arm.neon.vld1.v4f32.p0i8"] - fn vld1q_v4f32(addr: *const i8, align: i32) -> float32x4_t; - - #[link_name = "llvm.arm.neon.vst1.p0i8.v8i8"] - fn vst1_v8i8(addr: *const i8, val: int8x8_t, align: i32); - #[link_name = "llvm.arm.neon.vst1.p0i8.v16i8"] - fn vst1q_v16i8(addr: *const i8, val: int8x16_t, align: i32); - #[link_name = "llvm.arm.neon.vst1.p0i8.v4i16"] - fn vst1_v4i16(addr: *const i8, val: int16x4_t, align: i32); - #[link_name = "llvm.arm.neon.vst1.p0i8.v8i16"] - fn vst1q_v8i16(addr: *const i8, val: int16x8_t, align: i32); - #[link_name = "llvm.arm.neon.vst1.p0i8.v2i32"] - fn vst1_v2i32(addr: *const i8, val: int32x2_t, align: i32); - #[link_name = "llvm.arm.neon.vst1.p0i8.v4i32"] - fn vst1q_v4i32(addr: *const i8, val: int32x4_t, align: i32); - #[link_name = "llvm.arm.neon.vst1.p0i8.v1i64"] - fn vst1_v1i64(addr: *const i8, val: int64x1_t, align: i32); - #[link_name = "llvm.arm.neon.vst1.p0i8.v2i64"] - fn vst1q_v2i64(addr: *const i8, val: int64x2_t, align: i32); - #[link_name = "llvm.arm.neon.vst1.p0i8.v2f32"] - fn vst1_v2f32(addr: *const i8, val: float32x2_t, align: i32); - #[link_name = "llvm.arm.neon.vst1.p0i8.v4f32"] - fn vst1q_v4f32(addr: *const i8, val: float32x4_t, align: i32); -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.8"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1_s8(ptr: *const i8) -> int8x8_t { - vld1_v8i8(ptr as *const i8, align_of::() as i32) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.8"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1q_s8(ptr: *const i8) -> int8x16_t { - vld1q_v16i8(ptr as *const i8, align_of::() as i32) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.16"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1_s16(ptr: *const i16) -> int16x4_t { - vld1_v4i16(ptr as *const i8, align_of::() as i32) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.16"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1q_s16(ptr: *const i16) -> int16x8_t { - vld1q_v8i16(ptr as *const i8, align_of::() as i32) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vldr))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1_s32(ptr: *const i32) -> int32x2_t { - vld1_v2i32(ptr as *const i8, align_of::() as i32) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.32"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1q_s32(ptr: *const i32) -> int32x4_t { - vld1q_v4i32(ptr as *const i8, align_of::() as i32) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vldr))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1_s64(ptr: *const i64) -> int64x1_t { - vld1_v1i64(ptr as *const i8, align_of::() as i32) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.64"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1q_s64(ptr: *const i64) -> int64x2_t { - vld1q_v2i64(ptr as *const i8, align_of::() as i32) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.8"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1_u8(ptr: *const u8) -> uint8x8_t { - transmute(vld1_v8i8(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.8"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1q_u8(ptr: *const u8) -> uint8x16_t { - transmute(vld1q_v16i8(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.16"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1_u16(ptr: *const u16) -> uint16x4_t { - transmute(vld1_v4i16(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.16"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1q_u16(ptr: *const u16) -> uint16x8_t { - transmute(vld1q_v8i16(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vldr))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1_u32(ptr: *const u32) -> uint32x2_t { - transmute(vld1_v2i32(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.32"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1q_u32(ptr: *const u32) -> uint32x4_t { - transmute(vld1q_v4i32(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vldr))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1_u64(ptr: *const u64) -> uint64x1_t { - transmute(vld1_v1i64(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.64"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1q_u64(ptr: *const u64) -> uint64x2_t { - transmute(vld1q_v2i64(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.8"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1_p8(ptr: *const p8) -> poly8x8_t { - transmute(vld1_v8i8(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.8"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1q_p8(ptr: *const p8) -> poly8x16_t { - transmute(vld1q_v16i8(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.16"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1_p16(ptr: *const p16) -> poly16x4_t { - transmute(vld1_v4i16(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.16"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1q_p16(ptr: *const p16) -> poly16x8_t { - transmute(vld1q_v8i16(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p64) -#[inline] -#[target_feature(enable = "neon,aes")] -#[cfg_attr(test, assert_instr(vldr))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1_p64(ptr: *const p64) -> poly64x1_t { - transmute(vld1_v1i64(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64) -#[inline] -#[target_feature(enable = "neon,aes")] -#[cfg_attr(test, assert_instr("vld1.64"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1q_p64(ptr: *const p64) -> poly64x2_t { - transmute(vld1q_v2i64(ptr as *const i8, align_of::() as i32)) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vldr))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1_f32(ptr: *const f32) -> float32x2_t { - vld1_v2f32(ptr as *const i8, align_of::() as i32) -} - -/// Load multiple single-element structures to one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vld1.32"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vld1q_f32(ptr: *const f32) -> float32x4_t { - vld1q_v4f32(ptr as *const i8, align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.8"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1_s8(ptr: *mut i8, a: int8x8_t) { - vst1_v8i8(ptr as *const i8, a, align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.8"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1q_s8(ptr: *mut i8, a: int8x16_t) { - vst1q_v16i8(ptr as *const i8, a, align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.16"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1_s16(ptr: *mut i16, a: int16x4_t) { - vst1_v4i16(ptr as *const i8, a, align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.16"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1q_s16(ptr: *mut i16, a: int16x8_t) { - vst1q_v8i16(ptr as *const i8, a, align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.32"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1_s32(ptr: *mut i32, a: int32x2_t) { - vst1_v2i32(ptr as *const i8, a, align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.32"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1q_s32(ptr: *mut i32, a: int32x4_t) { - vst1q_v4i32(ptr as *const i8, a, align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.64"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1_s64(ptr: *mut i64, a: int64x1_t) { - vst1_v1i64(ptr as *const i8, a, align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.64"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1q_s64(ptr: *mut i64, a: int64x2_t) { - vst1q_v2i64(ptr as *const i8, a, align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.8"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1_u8(ptr: *mut u8, a: uint8x8_t) { - vst1_v8i8(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.8"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1q_u8(ptr: *mut u8, a: uint8x16_t) { - vst1q_v16i8(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.16"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1_u16(ptr: *mut u16, a: uint16x4_t) { - vst1_v4i16(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.16"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1q_u16(ptr: *mut u16, a: uint16x8_t) { - vst1q_v8i16(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.32"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1_u32(ptr: *mut u32, a: uint32x2_t) { - vst1_v2i32(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.32"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1q_u32(ptr: *mut u32, a: uint32x4_t) { - vst1q_v4i32(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.64"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1_u64(ptr: *mut u64, a: uint64x1_t) { - vst1_v1i64(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.64"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1q_u64(ptr: *mut u64, a: uint64x2_t) { - vst1q_v2i64(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.8"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1_p8(ptr: *mut p8, a: poly8x8_t) { - vst1_v8i8(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.8"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1q_p8(ptr: *mut p8, a: poly8x16_t) { - vst1q_v16i8(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.16"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1_p16(ptr: *mut p16, a: poly16x4_t) { - vst1_v4i16(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.16"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1q_p16(ptr: *mut p16, a: poly16x8_t) { - vst1q_v8i16(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p64) -#[inline] -#[target_feature(enable = "neon,aes,v8")] -#[cfg_attr(test, assert_instr("vst1.64"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1_p64(ptr: *mut p64, a: poly64x1_t) { - vst1_v1i64(ptr as *const i8, transmute(a), align_of::() as i32) -} - -/// Store multiple single-element structures from one, two, three, or four registers. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p64) -#[inline] -#[target_feature(enable = "neon,aes,v8")] -#[cfg_attr(test, assert_instr("vst1.64"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1q_p64(ptr: *mut p64, a: poly64x2_t) { - vst1q_v2i64(ptr as *const i8, transmute(a), align_of::() as i32) -} - -// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.32"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1_f32(ptr: *mut f32, a: float32x2_t) { - vst1_v2f32(ptr as *const i8, a, align_of::() as i32) -} - -// Store multiple single-element structures from one, two, three, or four registers. -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vst1.32"))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vst1q_f32(ptr: *mut f32, a: float32x4_t) { - vst1q_v4f32(ptr as *const i8, a, align_of::() as i32) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbl))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbl1_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { - vtbl1(a, b) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbl))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbl1_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { - transmute(vtbl1(transmute(a), transmute(b))) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbl))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbl1_p8(a: poly8x8_t, b: uint8x8_t) -> poly8x8_t { - transmute(vtbl1(transmute(a), transmute(b))) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbl))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbl2_s8(a: int8x8x2_t, b: int8x8_t) -> int8x8_t { - vtbl2(a.0, a.1, b) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbl))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbl2_u8(a: uint8x8x2_t, b: uint8x8_t) -> uint8x8_t { - transmute(vtbl2(transmute(a.0), transmute(a.1), transmute(b))) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbl))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbl2_p8(a: poly8x8x2_t, b: uint8x8_t) -> poly8x8_t { - transmute(vtbl2(transmute(a.0), transmute(a.1), transmute(b))) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbl))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbl3_s8(a: int8x8x3_t, b: int8x8_t) -> int8x8_t { - vtbl3(a.0, a.1, a.2, b) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbl))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbl3_u8(a: uint8x8x3_t, b: uint8x8_t) -> uint8x8_t { - transmute(vtbl3( - transmute(a.0), - transmute(a.1), - transmute(a.2), - transmute(b), - )) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbl))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbl3_p8(a: poly8x8x3_t, b: uint8x8_t) -> poly8x8_t { - transmute(vtbl3( - transmute(a.0), - transmute(a.1), - transmute(a.2), - transmute(b), - )) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbl))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbl4_s8(a: int8x8x4_t, b: int8x8_t) -> int8x8_t { - vtbl4(a.0, a.1, a.2, a.3, b) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbl))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbl4_u8(a: uint8x8x4_t, b: uint8x8_t) -> uint8x8_t { - transmute(vtbl4( - transmute(a.0), - transmute(a.1), - transmute(a.2), - transmute(a.3), - transmute(b), - )) -} - -/// Table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbl))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbl4_p8(a: poly8x8x4_t, b: uint8x8_t) -> poly8x8_t { - transmute(vtbl4( - transmute(a.0), - transmute(a.1), - transmute(a.2), - transmute(a.3), - transmute(b), - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbx))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbx1_s8(a: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t { - vtbx1(a, b, c) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbx))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbx1_u8(a: uint8x8_t, b: uint8x8_t, c: uint8x8_t) -> uint8x8_t { - transmute(vtbx1(transmute(a), transmute(b), transmute(c))) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbx))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbx1_p8(a: poly8x8_t, b: poly8x8_t, c: uint8x8_t) -> poly8x8_t { - transmute(vtbx1(transmute(a), transmute(b), transmute(c))) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbx))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbx2_s8(a: int8x8_t, b: int8x8x2_t, c: int8x8_t) -> int8x8_t { - vtbx2(a, b.0, b.1, c) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbx))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbx2_u8(a: uint8x8_t, b: uint8x8x2_t, c: uint8x8_t) -> uint8x8_t { - transmute(vtbx2( - transmute(a), - transmute(b.0), - transmute(b.1), - transmute(c), - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbx))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbx2_p8(a: poly8x8_t, b: poly8x8x2_t, c: uint8x8_t) -> poly8x8_t { - transmute(vtbx2( - transmute(a), - transmute(b.0), - transmute(b.1), - transmute(c), - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbx))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbx3_s8(a: int8x8_t, b: int8x8x3_t, c: int8x8_t) -> int8x8_t { - vtbx3(a, b.0, b.1, b.2, c) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbx))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbx3_u8(a: uint8x8_t, b: uint8x8x3_t, c: uint8x8_t) -> uint8x8_t { - transmute(vtbx3( - transmute(a), - transmute(b.0), - transmute(b.1), - transmute(b.2), - transmute(c), - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbx))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbx3_p8(a: poly8x8_t, b: poly8x8x3_t, c: uint8x8_t) -> poly8x8_t { - transmute(vtbx3( - transmute(a), - transmute(b.0), - transmute(b.1), - transmute(b.2), - transmute(c), - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbx))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbx4_s8(a: int8x8_t, b: int8x8x4_t, c: int8x8_t) -> int8x8_t { - vtbx4(a, b.0, b.1, b.2, b.3, c) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbx))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbx4_u8(a: uint8x8_t, b: uint8x8x4_t, c: uint8x8_t) -> uint8x8_t { - transmute(vtbx4( - transmute(a), - transmute(b.0), - transmute(b.1), - transmute(b.2), - transmute(b.3), - transmute(c), - )) -} - -/// Extended table look-up -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr(vtbx))] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vtbx4_p8(a: poly8x8_t, b: poly8x8x4_t, c: uint8x8_t) -> poly8x8_t { - transmute(vtbx4( - transmute(a), - transmute(b.0), - transmute(b.1), - transmute(b.2), - transmute(b.3), - transmute(c), - )) -} - -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.8", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsli_n_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { - static_assert_uimm_bits!(N, 3); - let n = N as i8; - vshiftins_v8i8(a, b, int8x8_t::splat(n)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.8", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsliq_n_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { - static_assert_uimm_bits!(N, 3); - let n = N as i8; - vshiftins_v16i8(a, b, int8x16_t::splat(n)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.16", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsli_n_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { - static_assert_uimm_bits!(N, 4); - let n = N as i16; - vshiftins_v4i16(a, b, int16x4_t::splat(n)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.16", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsliq_n_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { - static_assert_uimm_bits!(N, 4); - let n = N as i16; - vshiftins_v8i16(a, b, int16x8_t::splat(n)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.32", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsli_n_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { - static_assert!(N >= 0 && N <= 31); - vshiftins_v2i32(a, b, int32x2_t::splat(N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.32", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsliq_n_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { - static_assert!(N >= 0 && N <= 31); - vshiftins_v4i32(a, b, int32x4_t::splat(N)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.64", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsli_n_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t { - static_assert!(0 <= N && N <= 63); - vshiftins_v1i64(a, b, int64x1_t::splat(N as i64)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.64", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsliq_n_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t { - static_assert!(0 <= N && N <= 63); - vshiftins_v2i64(a, b, int64x2_t::splat(N as i64)) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.8", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsli_n_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { - static_assert_uimm_bits!(N, 3); - let n = N as i8; - transmute(vshiftins_v8i8( - transmute(a), - transmute(b), - int8x8_t::splat(n), - )) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.8", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsliq_n_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { - static_assert_uimm_bits!(N, 3); - let n = N as i8; - transmute(vshiftins_v16i8( - transmute(a), - transmute(b), - int8x16_t::splat(n), - )) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.16", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsli_n_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { - static_assert_uimm_bits!(N, 4); - let n = N as i16; - transmute(vshiftins_v4i16( - transmute(a), - transmute(b), - int16x4_t::splat(n), - )) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.16", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsliq_n_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { - static_assert_uimm_bits!(N, 4); - let n = N as i16; - transmute(vshiftins_v8i16( - transmute(a), - transmute(b), - int16x8_t::splat(n), - )) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.32", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsli_n_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { - static_assert!(N >= 0 && N <= 31); - transmute(vshiftins_v2i32( - transmute(a), - transmute(b), - int32x2_t::splat(N), - )) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.32", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsliq_n_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { - static_assert!(N >= 0 && N <= 31); - transmute(vshiftins_v4i32( - transmute(a), - transmute(b), - int32x4_t::splat(N), - )) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.64", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsli_n_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t { - static_assert!(0 <= N && N <= 63); - transmute(vshiftins_v1i64( - transmute(a), - transmute(b), - int64x1_t::splat(N as i64), - )) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.64", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsliq_n_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t { - static_assert!(0 <= N && N <= 63); - transmute(vshiftins_v2i64( - transmute(a), - transmute(b), - int64x2_t::splat(N as i64), - )) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.8", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsli_n_p8(a: poly8x8_t, b: poly8x8_t) -> poly8x8_t { - static_assert_uimm_bits!(N, 3); - let n = N as i8; - transmute(vshiftins_v8i8( - transmute(a), - transmute(b), - int8x8_t::splat(n), - )) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.8", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsliq_n_p8(a: poly8x16_t, b: poly8x16_t) -> poly8x16_t { - static_assert_uimm_bits!(N, 3); - let n = N as i8; - transmute(vshiftins_v16i8( - transmute(a), - transmute(b), - int8x16_t::splat(n), - )) -} -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.16", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsli_n_p16(a: poly16x4_t, b: poly16x4_t) -> poly16x4_t { - static_assert_uimm_bits!(N, 4); - let n = N as i16; - transmute(vshiftins_v4i16( - transmute(a), - transmute(b), - int16x4_t::splat(n), - )) -} - -/// Shift Left and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsli.16", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsliq_n_p16(a: poly16x8_t, b: poly16x8_t) -> poly16x8_t { - static_assert_uimm_bits!(N, 4); - let n = N as i16; - transmute(vshiftins_v8i16( - transmute(a), - transmute(b), - int16x8_t::splat(n), - )) -} - -/// Shift Left and Insert (immediate) -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsli_n_p64) -#[inline] -#[target_feature(enable = "neon,v7,aes")] -#[cfg_attr(test, assert_instr("vsli.64", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsli_n_p64(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t { - static_assert!(0 <= N && N <= 63); - transmute(vshiftins_v1i64( - transmute(a), - transmute(b), - int64x1_t::splat(N as i64), - )) -} - -/// Shift Left and Insert (immediate) -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsliq_n_p64) -#[inline] -#[target_feature(enable = "neon,v7,aes")] -#[cfg_attr(test, assert_instr("vsli.64", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsliq_n_p64(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t { - static_assert!(0 <= N && N <= 63); - transmute(vshiftins_v2i64( - transmute(a), - transmute(b), - int64x2_t::splat(N as i64), - )) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.8", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsri_n_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { - static_assert!(1 <= N && N <= 8); - let n = -N as i8; - vshiftins_v8i8(a, b, int8x8_t::splat(n)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.8", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsriq_n_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { - static_assert!(1 <= N && N <= 8); - let n = -N as i8; - vshiftins_v16i8(a, b, int8x16_t::splat(n)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.16", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsri_n_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { - static_assert!(1 <= N && N <= 16); - let n = -N as i16; - vshiftins_v4i16(a, b, int16x4_t::splat(n)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.16", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsriq_n_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { - static_assert!(1 <= N && N <= 16); - let n = -N as i16; - vshiftins_v8i16(a, b, int16x8_t::splat(n)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.32", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsri_n_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { - static_assert!(1 <= N && N <= 32); - vshiftins_v2i32(a, b, int32x2_t::splat(-N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.32", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsriq_n_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { - static_assert!(1 <= N && N <= 32); - vshiftins_v4i32(a, b, int32x4_t::splat(-N)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.64", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsri_n_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t { - static_assert!(1 <= N && N <= 64); - vshiftins_v1i64(a, b, int64x1_t::splat(-N as i64)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.64", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsriq_n_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t { - static_assert!(1 <= N && N <= 64); - vshiftins_v2i64(a, b, int64x2_t::splat(-N as i64)) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.8", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsri_n_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { - static_assert!(1 <= N && N <= 8); - let n = -N as i8; - transmute(vshiftins_v8i8( - transmute(a), - transmute(b), - int8x8_t::splat(n), - )) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.8", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsriq_n_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { - static_assert!(1 <= N && N <= 8); - let n = -N as i8; - transmute(vshiftins_v16i8( - transmute(a), - transmute(b), - int8x16_t::splat(n), - )) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.16", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsri_n_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { - static_assert!(1 <= N && N <= 16); - let n = -N as i16; - transmute(vshiftins_v4i16( - transmute(a), - transmute(b), - int16x4_t::splat(n), - )) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.16", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsriq_n_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { - static_assert!(1 <= N && N <= 16); - let n = -N as i16; - transmute(vshiftins_v8i16( - transmute(a), - transmute(b), - int16x8_t::splat(n), - )) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.32", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsri_n_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { - static_assert!(1 <= N && N <= 32); - transmute(vshiftins_v2i32( - transmute(a), - transmute(b), - int32x2_t::splat(-N), - )) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.32", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsriq_n_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { - static_assert!(1 <= N && N <= 32); - transmute(vshiftins_v4i32( - transmute(a), - transmute(b), - int32x4_t::splat(-N), - )) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.64", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsri_n_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t { - static_assert!(1 <= N && N <= 64); - transmute(vshiftins_v1i64( - transmute(a), - transmute(b), - int64x1_t::splat(-N as i64), - )) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.64", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsriq_n_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t { - static_assert!(1 <= N && N <= 64); - transmute(vshiftins_v2i64( - transmute(a), - transmute(b), - int64x2_t::splat(-N as i64), - )) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.8", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsri_n_p8(a: poly8x8_t, b: poly8x8_t) -> poly8x8_t { - static_assert!(1 <= N && N <= 8); - let n = -N as i8; - transmute(vshiftins_v8i8( - transmute(a), - transmute(b), - int8x8_t::splat(n), - )) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.8", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsriq_n_p8(a: poly8x16_t, b: poly8x16_t) -> poly8x16_t { - static_assert!(1 <= N && N <= 8); - let n = -N as i8; - transmute(vshiftins_v16i8( - transmute(a), - transmute(b), - int8x16_t::splat(n), - )) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.16", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsri_n_p16(a: poly16x4_t, b: poly16x4_t) -> poly16x4_t { - static_assert!(1 <= N && N <= 16); - let n = -N as i16; - transmute(vshiftins_v4i16( - transmute(a), - transmute(b), - int16x4_t::splat(n), - )) -} -/// Shift Right and Insert (immediate) -#[inline] -#[target_feature(enable = "neon,v7")] -#[cfg_attr(test, assert_instr("vsri.16", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsriq_n_p16(a: poly16x8_t, b: poly16x8_t) -> poly16x8_t { - static_assert!(1 <= N && N <= 16); - let n = -N as i16; - transmute(vshiftins_v8i16( - transmute(a), - transmute(b), - int16x8_t::splat(n), - )) -} - -/// Shift Right and Insert (immediate) -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsri_n_p64) -#[inline] -#[target_feature(enable = "neon,v7,aes")] -#[cfg_attr(test, assert_instr("vsri.64", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsri_n_p64(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t { - static_assert!(1 <= N && N <= 64); - transmute(vshiftins_v1i64( - transmute(a), - transmute(b), - int64x1_t::splat(-N as i64), - )) -} - -/// Shift Right and Insert (immediate) -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsriq_n_p64) -#[inline] -#[target_feature(enable = "neon,v7,aes")] -#[cfg_attr(test, assert_instr("vsri.64", N = 1))] -#[rustc_legacy_const_generics(2)] -#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")] -pub unsafe fn vsriq_n_p64(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t { - static_assert!(1 <= N && N <= 64); - transmute(vshiftins_v2i64( - transmute(a), - transmute(b), - int64x2_t::splat(-N as i64), - )) -} - -#[cfg(test)] -mod tests { - use super::*; - use crate::core_arch::{arm::*, simd::*}; - use crate::mem::transmute; - use stdarch_test::simd_test; - - #[simd_test(enable = "neon")] - unsafe fn test_vcvtq_s32_f32() { - let f = f32x4::new(-1., 2., 3., 4.); - let e = i32x4::new(-1, 2, 3, 4); - let r: i32x4 = transmute(vcvtq_s32_f32(transmute(f))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vcvtq_u32_f32() { - let f = f32x4::new(1., 2., 3., 4.); - let e = u32x4::new(1, 2, 3, 4); - let r: u32x4 = transmute(vcvtq_u32_f32(transmute(f))); - assert_eq!(r, e); - } } diff --git a/library/stdarch/crates/core_arch/src/arm_shared/crc.rs b/library/stdarch/crates/core_arch/src/arm_shared/crc.rs deleted file mode 100644 index 1c10af05f60c..000000000000 --- a/library/stdarch/crates/core_arch/src/arm_shared/crc.rs +++ /dev/null @@ -1,279 +0,0 @@ -unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crc32b" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32b")] - fn crc32b_(crc: u32, data: u32) -> u32; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crc32h" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32h")] - fn crc32h_(crc: u32, data: u32) -> u32; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crc32w" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32w")] - fn crc32w_(crc: u32, data: u32) -> u32; - - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crc32cb" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32cb")] - fn crc32cb_(crc: u32, data: u32) -> u32; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crc32ch" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32ch")] - fn crc32ch_(crc: u32, data: u32) -> u32; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crc32cw" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32cw")] - fn crc32cw_(crc: u32, data: u32) -> u32; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crc32x" - )] - fn crc32x_(crc: u32, data: u64) -> u32; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crc32cx" - )] - fn crc32cx_(crc: u32, data: u64) -> u32; -} - -#[cfg(test)] -use stdarch_test::assert_instr; - -/// CRC32 single round checksum for bytes (8 bits). -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32b) -#[inline] -#[target_feature(enable = "crc")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(crc32b))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_aarch32_crc32", issue = "125085") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "stdarch_aarch64_crc32", since = "1.80.0") -)] -pub unsafe fn __crc32b(crc: u32, data: u8) -> u32 { - crc32b_(crc, data as u32) -} - -/// CRC32 single round checksum for half words (16 bits). -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32h) -#[inline] -#[target_feature(enable = "crc")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(crc32h))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_aarch32_crc32", issue = "125085") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "stdarch_aarch64_crc32", since = "1.80.0") -)] -pub unsafe fn __crc32h(crc: u32, data: u16) -> u32 { - crc32h_(crc, data as u32) -} - -/// CRC32 single round checksum for words (32 bits). -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32w) -#[inline] -#[target_feature(enable = "crc")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(crc32w))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_aarch32_crc32", issue = "125085") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "stdarch_aarch64_crc32", since = "1.80.0") -)] -pub unsafe fn __crc32w(crc: u32, data: u32) -> u32 { - crc32w_(crc, data) -} - -/// CRC32-C single round checksum for bytes (8 bits). -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32cb) -#[inline] -#[target_feature(enable = "crc")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(crc32cb))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_aarch32_crc32", issue = "125085") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "stdarch_aarch64_crc32", since = "1.80.0") -)] -pub unsafe fn __crc32cb(crc: u32, data: u8) -> u32 { - crc32cb_(crc, data as u32) -} - -/// CRC32-C single round checksum for half words (16 bits). -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32ch) -#[inline] -#[target_feature(enable = "crc")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(crc32ch))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_aarch32_crc32", issue = "125085") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "stdarch_aarch64_crc32", since = "1.80.0") -)] -pub unsafe fn __crc32ch(crc: u32, data: u16) -> u32 { - crc32ch_(crc, data as u32) -} - -/// CRC32-C single round checksum for words (32 bits). -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32cw) -#[inline] -#[target_feature(enable = "crc")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(crc32cw))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_aarch32_crc32", issue = "125085") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "stdarch_aarch64_crc32", since = "1.80.0") -)] -pub unsafe fn __crc32cw(crc: u32, data: u32) -> u32 { - crc32cw_(crc, data) -} - -/// CRC32 single round checksum for quad words (64 bits). -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32d) -#[inline] -#[target_feature(enable = "crc")] -#[cfg(not(target_arch = "arm"))] -#[cfg_attr(test, assert_instr(crc32x))] -#[stable(feature = "stdarch_aarch64_crc32", since = "1.80.0")] -pub unsafe fn __crc32d(crc: u32, data: u64) -> u32 { - crc32x_(crc, data) -} - -/// CRC32 single round checksum for quad words (64 bits). -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32d) -#[inline] -#[target_feature(enable = "crc")] -#[cfg(target_arch = "arm")] -#[cfg_attr(test, assert_instr(crc32w))] -#[unstable(feature = "stdarch_aarch32_crc32", issue = "125085")] -pub unsafe fn __crc32d(crc: u32, data: u64) -> u32 { - // On 32-bit ARM this intrinsic emits a chain of two `crc32_w` instructions - // and truncates the data to 32 bits in both clang and gcc - crc32w_( - crc32w_(crc, (data & 0xffffffff) as u32), - (data >> 32) as u32, - ) -} - -/// CRC32 single round checksum for quad words (64 bits). -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32cd) -#[inline] -#[target_feature(enable = "crc")] -#[cfg(not(target_arch = "arm"))] -#[cfg_attr(test, assert_instr(crc32cx))] -#[stable(feature = "stdarch_aarch64_crc32", since = "1.80.0")] -pub unsafe fn __crc32cd(crc: u32, data: u64) -> u32 { - crc32cx_(crc, data) -} - -/// CRC32 single round checksum for quad words (64 bits). -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32cd) -#[inline] -#[target_feature(enable = "crc")] -#[cfg(target_arch = "arm")] -#[cfg_attr(test, assert_instr(crc32cw))] -#[unstable(feature = "stdarch_aarch32_crc32", issue = "125085")] -pub unsafe fn __crc32cd(crc: u32, data: u64) -> u32 { - // On 32-bit ARM this intrinsic emits a chain of two `crc32_cw` instructions - // and truncates the data to 32 bits in both clang and gcc - crc32cw_( - crc32cw_(crc, (data & 0xffffffff) as u32), - (data >> 32) as u32, - ) -} - -#[cfg(test)] -mod tests { - use crate::core_arch::{arm_shared::*, simd::*}; - use std::mem; - use stdarch_test::simd_test; - - #[simd_test(enable = "crc")] - unsafe fn test_crc32d() { - assert_eq!(__crc32d(0, 0), 0); - assert_eq!(__crc32d(0, 18446744073709551615), 1147535477); - } - - #[simd_test(enable = "crc")] - unsafe fn test_crc32cd() { - assert_eq!(__crc32cd(0, 0), 0); - assert_eq!(__crc32cd(0, 18446744073709551615), 3293575501); - } - - #[simd_test(enable = "crc")] - unsafe fn test_crc32b() { - assert_eq!(__crc32b(0, 0), 0); - assert_eq!(__crc32b(0, 255), 755167117); - } - - #[simd_test(enable = "crc")] - unsafe fn test_crc32h() { - assert_eq!(__crc32h(0, 0), 0); - assert_eq!(__crc32h(0, 16384), 1994146192); - } - - #[simd_test(enable = "crc")] - unsafe fn test_crc32w() { - assert_eq!(__crc32w(0, 0), 0); - assert_eq!(__crc32w(0, 4294967295), 3736805603); - } - - #[simd_test(enable = "crc")] - unsafe fn test_crc32cb() { - assert_eq!(__crc32cb(0, 0), 0); - assert_eq!(__crc32cb(0, 255), 2910671697); - } - - #[simd_test(enable = "crc")] - unsafe fn test_crc32ch() { - assert_eq!(__crc32ch(0, 0), 0); - assert_eq!(__crc32ch(0, 16384), 1098587580); - } - - #[simd_test(enable = "crc")] - unsafe fn test_crc32cw() { - assert_eq!(__crc32cw(0, 0), 0); - assert_eq!(__crc32cw(0, 4294967295), 3080238136); - } -} diff --git a/library/stdarch/crates/core_arch/src/arm_shared/crypto.rs b/library/stdarch/crates/core_arch/src/arm_shared/crypto.rs deleted file mode 100644 index 07c96008d92a..000000000000 --- a/library/stdarch/crates/core_arch/src/arm_shared/crypto.rs +++ /dev/null @@ -1,544 +0,0 @@ -use crate::core_arch::arm_shared::{uint8x16_t, uint32x4_t}; - -#[allow(improper_ctypes)] -unsafe extern "unadjusted" { - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.aese" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aese")] - fn vaeseq_u8_(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.aesd" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aesd")] - fn vaesdq_u8_(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.aesmc" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aesmc")] - fn vaesmcq_u8_(data: uint8x16_t) -> uint8x16_t; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.aesimc" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aesimc")] - fn vaesimcq_u8_(data: uint8x16_t) -> uint8x16_t; - - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sha1h" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.sha1h")] - fn vsha1h_u32_(hash_e: u32) -> u32; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sha1su0" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.sha1su0")] - fn vsha1su0q_u32_(w0_3: uint32x4_t, w4_7: uint32x4_t, w8_11: uint32x4_t) -> uint32x4_t; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sha1su1" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.sha1su1")] - fn vsha1su1q_u32_(tw0_3: uint32x4_t, w12_15: uint32x4_t) -> uint32x4_t; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sha1c" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.sha1c")] - fn vsha1cq_u32_(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) -> uint32x4_t; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sha1p" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.sha1p")] - fn vsha1pq_u32_(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) -> uint32x4_t; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sha1m" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.sha1m")] - fn vsha1mq_u32_(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) -> uint32x4_t; - - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sha256h" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.sha256h")] - fn vsha256hq_u32_(hash_abcd: uint32x4_t, hash_efgh: uint32x4_t, wk: uint32x4_t) -> uint32x4_t; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sha256h2" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.sha256h2")] - fn vsha256h2q_u32_(hash_efgh: uint32x4_t, hash_abcd: uint32x4_t, wk: uint32x4_t) -> uint32x4_t; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sha256su0" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.sha256su0")] - fn vsha256su0q_u32_(w0_3: uint32x4_t, w4_7: uint32x4_t) -> uint32x4_t; - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.crypto.sha256su1" - )] - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.sha256su1")] - fn vsha256su1q_u32_(tw0_3: uint32x4_t, w8_11: uint32x4_t, w12_15: uint32x4_t) -> uint32x4_t; -} - -#[cfg(test)] -use stdarch_test::assert_instr; - -/// AES single round encryption. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaeseq_u8) -#[inline] -#[target_feature(enable = "aes")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(aese))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vaeseq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t { - vaeseq_u8_(data, key) -} - -/// AES single round decryption. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesdq_u8) -#[inline] -#[target_feature(enable = "aes")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(aesd))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vaesdq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t { - vaesdq_u8_(data, key) -} - -/// AES mix columns. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesmcq_u8) -#[inline] -#[target_feature(enable = "aes")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(aesmc))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vaesmcq_u8(data: uint8x16_t) -> uint8x16_t { - vaesmcq_u8_(data) -} - -/// AES inverse mix columns. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesimcq_u8) -#[inline] -#[target_feature(enable = "aes")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(aesimc))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vaesimcq_u8(data: uint8x16_t) -> uint8x16_t { - vaesimcq_u8_(data) -} - -/// SHA1 fixed rotate. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha1h_u32) -#[inline] -#[target_feature(enable = "sha2")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(sha1h))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vsha1h_u32(hash_e: u32) -> u32 { - vsha1h_u32_(hash_e) -} - -/// SHA1 hash update accelerator, choose. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha1cq_u32) -#[inline] -#[target_feature(enable = "sha2")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(sha1c))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vsha1cq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) -> uint32x4_t { - vsha1cq_u32_(hash_abcd, hash_e, wk) -} - -/// SHA1 hash update accelerator, majority. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha1mq_u32) -#[inline] -#[target_feature(enable = "sha2")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(sha1m))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vsha1mq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) -> uint32x4_t { - vsha1mq_u32_(hash_abcd, hash_e, wk) -} - -/// SHA1 hash update accelerator, parity. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha1pq_u32) -#[inline] -#[target_feature(enable = "sha2")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(sha1p))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vsha1pq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) -> uint32x4_t { - vsha1pq_u32_(hash_abcd, hash_e, wk) -} - -/// SHA1 schedule update accelerator, first part. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha1su0q_u32) -#[inline] -#[target_feature(enable = "sha2")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(sha1su0))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vsha1su0q_u32(w0_3: uint32x4_t, w4_7: uint32x4_t, w8_11: uint32x4_t) -> uint32x4_t { - vsha1su0q_u32_(w0_3, w4_7, w8_11) -} - -/// SHA1 schedule update accelerator, second part. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha1su1q_u32) -#[inline] -#[target_feature(enable = "sha2")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(sha1su1))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vsha1su1q_u32(tw0_3: uint32x4_t, w12_15: uint32x4_t) -> uint32x4_t { - vsha1su1q_u32_(tw0_3, w12_15) -} - -/// SHA256 hash update accelerator. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha256hq_u32) -#[inline] -#[target_feature(enable = "sha2")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(sha256h))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vsha256hq_u32( - hash_abcd: uint32x4_t, - hash_efgh: uint32x4_t, - wk: uint32x4_t, -) -> uint32x4_t { - vsha256hq_u32_(hash_abcd, hash_efgh, wk) -} - -/// SHA256 hash update accelerator, upper part. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha256h2q_u32) -#[inline] -#[target_feature(enable = "sha2")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(sha256h2))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vsha256h2q_u32( - hash_efgh: uint32x4_t, - hash_abcd: uint32x4_t, - wk: uint32x4_t, -) -> uint32x4_t { - vsha256h2q_u32_(hash_efgh, hash_abcd, wk) -} - -/// SHA256 schedule update accelerator, first part. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha256su0q_u32) -#[inline] -#[target_feature(enable = "sha2")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(sha256su0))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vsha256su0q_u32(w0_3: uint32x4_t, w4_7: uint32x4_t) -> uint32x4_t { - vsha256su0q_u32_(w0_3, w4_7) -} - -/// SHA256 schedule update accelerator, second part. -/// -/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha256su1q_u32) -#[inline] -#[target_feature(enable = "sha2")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(test, assert_instr(sha256su1))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub unsafe fn vsha256su1q_u32( - tw0_3: uint32x4_t, - w8_11: uint32x4_t, - w12_15: uint32x4_t, -) -> uint32x4_t { - vsha256su1q_u32_(tw0_3, w8_11, w12_15) -} - -#[cfg(test)] -mod tests { - use super::*; - use crate::core_arch::{arm_shared::*, simd::*}; - use std::mem; - use stdarch_test::simd_test; - - #[simd_test(enable = "aes")] - unsafe fn test_vaeseq_u8() { - let data = mem::transmute(u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8)); - let key = mem::transmute(u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7)); - let r: u8x16 = mem::transmute(vaeseq_u8(data, key)); - assert_eq!( - r, - u8x16::new( - 124, 123, 124, 118, 124, 123, 124, 197, 124, 123, 124, 118, 124, 123, 124, 197 - ) - ); - } - - #[simd_test(enable = "aes")] - unsafe fn test_vaesdq_u8() { - let data = mem::transmute(u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8)); - let key = mem::transmute(u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7)); - let r: u8x16 = mem::transmute(vaesdq_u8(data, key)); - assert_eq!( - r, - u8x16::new(9, 213, 9, 251, 9, 213, 9, 56, 9, 213, 9, 251, 9, 213, 9, 56) - ); - } - - #[simd_test(enable = "aes")] - unsafe fn test_vaesmcq_u8() { - let data = mem::transmute(u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8)); - let r: u8x16 = mem::transmute(vaesmcq_u8(data)); - assert_eq!( - r, - u8x16::new(3, 4, 9, 10, 15, 8, 21, 30, 3, 4, 9, 10, 15, 8, 21, 30) - ); - } - - #[simd_test(enable = "aes")] - unsafe fn test_vaesimcq_u8() { - let data = mem::transmute(u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8)); - let r: u8x16 = mem::transmute(vaesimcq_u8(data)); - assert_eq!( - r, - u8x16::new( - 43, 60, 33, 50, 103, 80, 125, 70, 43, 60, 33, 50, 103, 80, 125, 70 - ) - ); - } - - #[simd_test(enable = "sha2")] - unsafe fn test_vsha1h_u32() { - assert_eq!(vsha1h_u32(0x1234), 0x048d); - assert_eq!(vsha1h_u32(0x5678), 0x159e); - } - - #[simd_test(enable = "sha2")] - unsafe fn test_vsha1su0q_u32() { - let r: u32x4 = mem::transmute(vsha1su0q_u32( - mem::transmute(u32x4::new(0x1234_u32, 0x5678_u32, 0x9abc_u32, 0xdef0_u32)), - mem::transmute(u32x4::new(0x1234_u32, 0x5678_u32, 0x9abc_u32, 0xdef0_u32)), - mem::transmute(u32x4::new(0x1234_u32, 0x5678_u32, 0x9abc_u32, 0xdef0_u32)), - )); - assert_eq!(r, u32x4::new(0x9abc, 0xdef0, 0x1234, 0x5678)); - } - - #[simd_test(enable = "sha2")] - unsafe fn test_vsha1su1q_u32() { - let r: u32x4 = mem::transmute(vsha1su1q_u32( - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - )); - assert_eq!( - r, - u32x4::new(0x00008898, 0x00019988, 0x00008898, 0x0000acd0) - ); - } - - #[simd_test(enable = "sha2")] - unsafe fn test_vsha1cq_u32() { - let r: u32x4 = mem::transmute(vsha1cq_u32( - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - 0x1234, - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - )); - assert_eq!( - r, - u32x4::new(0x8a32cbd8, 0x0c518a96, 0x0018a081, 0x0000c168) - ); - } - - #[simd_test(enable = "sha2")] - unsafe fn test_vsha1pq_u32() { - let r: u32x4 = mem::transmute(vsha1pq_u32( - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - 0x1234, - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - )); - assert_eq!( - r, - u32x4::new(0x469f0ba3, 0x0a326147, 0x80145d7f, 0x00009f47) - ); - } - - #[simd_test(enable = "sha2")] - unsafe fn test_vsha1mq_u32() { - let r: u32x4 = mem::transmute(vsha1mq_u32( - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - 0x1234, - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - )); - assert_eq!( - r, - u32x4::new(0xaa39693b, 0x0d51bf84, 0x001aa109, 0x0000d278) - ); - } - - #[simd_test(enable = "sha2")] - unsafe fn test_vsha256hq_u32() { - let r: u32x4 = mem::transmute(vsha256hq_u32( - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - )); - assert_eq!( - r, - u32x4::new(0x05e9aaa8, 0xec5f4c02, 0x20a1ea61, 0x28738cef) - ); - } - - #[simd_test(enable = "sha2")] - unsafe fn test_vsha256h2q_u32() { - let r: u32x4 = mem::transmute(vsha256h2q_u32( - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - )); - assert_eq!( - r, - u32x4::new(0x3745362e, 0x2fb51d00, 0xbd4c529b, 0x968b8516) - ); - } - - #[simd_test(enable = "sha2")] - unsafe fn test_vsha256su0q_u32() { - let r: u32x4 = mem::transmute(vsha256su0q_u32( - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - )); - assert_eq!( - r, - u32x4::new(0xe59e1c97, 0x5eaf68da, 0xd7bcb51f, 0x6c8de152) - ); - } - - #[simd_test(enable = "sha2")] - unsafe fn test_vsha256su1q_u32() { - let r: u32x4 = mem::transmute(vsha256su1q_u32( - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - mem::transmute(u32x4::new(0x1234, 0x5678, 0x9abc, 0xdef0)), - )); - assert_eq!( - r, - u32x4::new(0x5e09e8d2, 0x74a6f16b, 0xc966606b, 0xa686ee9f) - ); - } -} diff --git a/library/stdarch/crates/core_arch/src/arm_shared/mod.rs b/library/stdarch/crates/core_arch/src/arm_shared/mod.rs index 9dee6aed3b74..dcfa500085e8 100644 --- a/library/stdarch/crates/core_arch/src/arm_shared/mod.rs +++ b/library/stdarch/crates/core_arch/src/arm_shared/mod.rs @@ -60,46 +60,6 @@ mod hints; #[unstable(feature = "stdarch_arm_hints", issue = "117218")] pub use self::hints::*; -mod crc; -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_aarch32_crc32", issue = "125085") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "stdarch_aarch64_crc32", since = "1.80.0") -)] -pub use crc::*; - -// NEON intrinsics are currently broken on big-endian, so don't expose them. (#1484) -#[cfg(target_endian = "little")] -#[cfg(any( - target_arch = "aarch64", - target_arch = "arm64ec", - target_feature = "v7", - doc -))] -mod crypto; -// NEON intrinsics are currently broken on big-endian, so don't expose them. (#1484) -#[cfg(target_endian = "little")] -#[cfg(any( - target_arch = "aarch64", - target_arch = "arm64ec", - target_feature = "v7", - doc -))] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0") -)] -pub use self::crypto::*; - -// NEON intrinsics are currently broken on big-endian, so don't expose them. (#1484) -#[cfg(target_endian = "little")] #[cfg(any( target_arch = "aarch64", target_arch = "arm64ec", @@ -107,7 +67,7 @@ pub use self::crypto::*; doc ))] pub(crate) mod neon; -#[cfg(target_endian = "little")] + #[cfg(any( target_arch = "aarch64", target_arch = "arm64ec", diff --git a/library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs b/library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs index b7854051aed5..4b49d7788993 100644 --- a/library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs +++ b/library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs @@ -1144,296 +1144,6 @@ impl_sign_conversions_neon! { (uint8x8x4_t, int8x8x4_t) } -#[allow(improper_ctypes)] -unsafe extern "unadjusted" { - // absolute value (64-bit) - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v8i8" - )] - fn vabs_s8_(a: int8x8_t) -> int8x8_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v4i16" - )] - fn vabs_s16_(a: int16x4_t) -> int16x4_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v2i32" - )] - fn vabs_s32_(a: int32x2_t) -> int32x2_t; - // absolute value (128-bit) - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v16i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v16i8" - )] - fn vabsq_s8_(a: int8x16_t) -> int8x16_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v8i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v8i16" - )] - fn vabsq_s16_(a: int16x8_t) -> int16x8_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v4i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.abs.v4i32" - )] - fn vabsq_s32_(a: int32x4_t) -> int32x4_t; - - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmins.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.sminp.v8i8" - )] - fn vpmins_v8i8(a: int8x8_t, b: int8x8_t) -> int8x8_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmins.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.sminp.v4i16" - )] - fn vpmins_v4i16(a: int16x4_t, b: int16x4_t) -> int16x4_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmins.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.sminp.v2i32" - )] - fn vpmins_v2i32(a: int32x2_t, b: int32x2_t) -> int32x2_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpminu.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uminp.v8i8" - )] - fn vpminu_v8i8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpminu.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uminp.v4i16" - )] - fn vpminu_v4i16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpminu.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uminp.v2i32" - )] - fn vpminu_v2i32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmins.v2f32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fminp.v2f32" - )] - fn vpminf_v2f32(a: float32x2_t, b: float32x2_t) -> float32x2_t; - - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxs.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smaxp.v8i8" - )] - fn vpmaxs_v8i8(a: int8x8_t, b: int8x8_t) -> int8x8_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxs.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smaxp.v4i16" - )] - fn vpmaxs_v4i16(a: int16x4_t, b: int16x4_t) -> int16x4_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxs.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smaxp.v2i32" - )] - fn vpmaxs_v2i32(a: int32x2_t, b: int32x2_t) -> int32x2_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxu.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umaxp.v8i8" - )] - fn vpmaxu_v8i8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxu.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umaxp.v4i16" - )] - fn vpmaxu_v4i16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxu.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.umaxp.v2i32" - )] - fn vpmaxu_v2i32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxs.v2f32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.fmaxp.v2f32" - )] - fn vpmaxf_v2f32(a: float32x2_t, b: float32x2_t) -> float32x2_t; - - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vraddhn.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.raddhn.v8i8" - )] - fn vraddhn_s16_(a: int16x8_t, b: int16x8_t) -> int8x8_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vraddhn.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.raddhn.v4i16" - )] - fn vraddhn_s32_(a: int32x4_t, b: int32x4_t) -> int16x4_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vraddhn.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.raddhn.v2i32" - )] - fn vraddhn_s64_(a: int64x2_t, b: int64x2_t) -> int32x2_t; - - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadd.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.addp.v4i16" - )] - fn vpadd_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadd.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.addp.v2i32" - )] - fn vpadd_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadd.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.addp.v8i8" - )] - fn vpadd_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t; - - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddls.v4i16.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddlp.v4i16.v8i8" - )] - pub(crate) fn vpaddl_s8_(a: int8x8_t) -> int16x4_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddls.v2i32.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddlp.v2i32.v4i16" - )] - pub(crate) fn vpaddl_s16_(a: int16x4_t) -> int32x2_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddls.v1i64.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddlp.v1i64.v2i32" - )] - pub(crate) fn vpaddl_s32_(a: int32x2_t) -> int64x1_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddls.v8i16.v16i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddlp.v8i16.v16i8" - )] - pub(crate) fn vpaddlq_s8_(a: int8x16_t) -> int16x8_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddls.v4i32.v8i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddlp.v4i32.v8i16" - )] - pub(crate) fn vpaddlq_s16_(a: int16x8_t) -> int32x4_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddls.v2i64.v4i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.saddlp.v2i64.v4i32" - )] - pub(crate) fn vpaddlq_s32_(a: int32x4_t) -> int64x2_t; - - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddlu.v4i16.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddlp.v4i16.v8i8" - )] - pub(crate) fn vpaddl_u8_(a: uint8x8_t) -> uint16x4_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddlu.v2i32.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddlp.v2i32.v4i16" - )] - pub(crate) fn vpaddl_u16_(a: uint16x4_t) -> uint32x2_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddlu.v1i64.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddlp.v1i64.v2i32" - )] - pub(crate) fn vpaddl_u32_(a: uint32x2_t) -> uint64x1_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddlu.v8i16.v16i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddlp.v8i16.v16i8" - )] - pub(crate) fn vpaddlq_u8_(a: uint8x16_t) -> uint16x8_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddlu.v4i32.v8i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddlp.v4i32.v8i16" - )] - pub(crate) fn vpaddlq_u16_(a: uint16x8_t) -> uint32x4_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddlu.v2i64.v4i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.uaddlp.v2i64.v4i32" - )] - pub(crate) fn vpaddlq_u32_(a: uint32x4_t) -> uint64x2_t; - - #[cfg_attr(target_arch = "arm", link_name = "llvm.ctpop.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.ctpop.v8i8" - )] - fn vcnt_s8_(a: int8x8_t) -> int8x8_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.ctpop.v16i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.ctpop.v16i8" - )] - fn vcntq_s8_(a: int8x16_t) -> int8x16_t; - - #[cfg_attr(target_arch = "arm", link_name = "llvm.ctlz.v8i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.ctlz.v8i8" - )] - fn vclz_s8_(a: int8x8_t) -> int8x8_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.ctlz.v16i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.ctlz.v16i8" - )] - fn vclzq_s8_(a: int8x16_t) -> int8x16_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.ctlz.v4i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.ctlz.v4i16" - )] - fn vclz_s16_(a: int16x4_t) -> int16x4_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.ctlz.v8i16")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.ctlz.v8i16" - )] - fn vclzq_s16_(a: int16x8_t) -> int16x8_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.ctlz.v2i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.ctlz.v2i32" - )] - fn vclz_s32_(a: int32x2_t) -> int32x2_t; - #[cfg_attr(target_arch = "arm", link_name = "llvm.ctlz.v4i32")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.ctlz.v4i32" - )] - fn vclzq_s32_(a: int32x4_t) -> int32x4_t; -} - /// Load one single-element structure to one lane of one register. #[inline] #[target_feature(enable = "neon")] @@ -2771,248 +2481,6 @@ pub unsafe fn vabaq_u32(a: uint32x4_t, b: uint32x4_t, c: uint32x4_t) -> uint32x4 simd_add(a, vabdq_u32(b, c)) } -/// Absolute value (wrapping). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(abs) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vabs_s8(a: int8x8_t) -> int8x8_t { - vabs_s8_(a) -} -/// Absolute value (wrapping). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(abs) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vabs_s16(a: int16x4_t) -> int16x4_t { - vabs_s16_(a) -} -/// Absolute value (wrapping). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(abs) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vabs_s32(a: int32x2_t) -> int32x2_t { - vabs_s32_(a) -} -/// Absolute value (wrapping). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(abs) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vabsq_s8(a: int8x16_t) -> int8x16_t { - vabsq_s8_(a) -} -/// Absolute value (wrapping). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(abs) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vabsq_s16(a: int16x8_t) -> int16x8_t { - vabsq_s16_(a) -} -/// Absolute value (wrapping). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(abs) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vabsq_s32(a: int32x4_t) -> int32x4_t { - vabsq_s32_(a) -} - -/// Add pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadd))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(addp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { - vpadd_s16_(a, b) -} -/// Add pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadd))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(addp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { - vpadd_s32_(a, b) -} -/// Add pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadd))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(addp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { - vpadd_s8_(a, b) -} -/// Add pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadd))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(addp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { - transmute(vpadd_s16_(transmute(a), transmute(b))) -} -/// Add pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadd))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(addp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { - transmute(vpadd_s32_(transmute(a), transmute(b))) -} -/// Add pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadd))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(addp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { - transmute(vpadd_s8_(transmute(a), transmute(b))) -} - /// Vector add. #[inline] #[target_feature(enable = "neon")] @@ -4165,516 +3633,6 @@ pub unsafe fn vaddhn_high_u64(r: uint32x2_t, a: uint64x2_t, b: uint64x2_t) -> ui simd_shuffle!(r, x, [0, 1, 2, 3]) } -/// Rounding Add returning High Narrow. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i16))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(raddhn) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vraddhn_s16(a: int16x8_t, b: int16x8_t) -> int8x8_t { - vraddhn_s16_(a, b) -} - -/// Rounding Add returning High Narrow. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i32))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(raddhn) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vraddhn_s32(a: int32x4_t, b: int32x4_t) -> int16x4_t { - vraddhn_s32_(a, b) -} - -/// Rounding Add returning High Narrow. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i64))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(raddhn) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vraddhn_s64(a: int64x2_t, b: int64x2_t) -> int32x2_t { - vraddhn_s64_(a, b) -} - -/// Rounding Add returning High Narrow. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i16))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(raddhn) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vraddhn_u16(a: uint16x8_t, b: uint16x8_t) -> uint8x8_t { - transmute(vraddhn_s16_(transmute(a), transmute(b))) -} - -/// Rounding Add returning High Narrow. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i32))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(raddhn) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vraddhn_u32(a: uint32x4_t, b: uint32x4_t) -> uint16x4_t { - transmute(vraddhn_s32_(transmute(a), transmute(b))) -} - -/// Rounding Add returning High Narrow. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i64))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(raddhn) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vraddhn_u64(a: uint64x2_t, b: uint64x2_t) -> uint32x2_t { - transmute(vraddhn_s64_(transmute(a), transmute(b))) -} - -/// Rounding Add returning High Narrow (high half). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i16))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(raddhn2) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vraddhn_high_s16(r: int8x8_t, a: int16x8_t, b: int16x8_t) -> int8x16_t { - let x = vraddhn_s16_(a, b); - simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) -} - -/// Rounding Add returning High Narrow (high half). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i32))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(raddhn2) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vraddhn_high_s32(r: int16x4_t, a: int32x4_t, b: int32x4_t) -> int16x8_t { - let x = vraddhn_s32_(a, b); - simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7]) -} - -/// Rounding Add returning High Narrow (high half). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i64))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(raddhn2) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vraddhn_high_s64(r: int32x2_t, a: int64x2_t, b: int64x2_t) -> int32x4_t { - let x = vraddhn_s64_(a, b); - simd_shuffle!(r, x, [0, 1, 2, 3]) -} - -/// Rounding Add returning High Narrow (high half). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i16))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(raddhn2) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vraddhn_high_u16(r: uint8x8_t, a: uint16x8_t, b: uint16x8_t) -> uint8x16_t { - let x: uint8x8_t = transmute(vraddhn_s16_(transmute(a), transmute(b))); - simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) -} - -/// Rounding Add returning High Narrow (high half). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i32))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(raddhn2) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vraddhn_high_u32(r: uint16x4_t, a: uint32x4_t, b: uint32x4_t) -> uint16x8_t { - let x: uint16x4_t = transmute(vraddhn_s32_(transmute(a), transmute(b))); - simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7]) -} - -/// Rounding Add returning High Narrow (high half). -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i64))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(raddhn2) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vraddhn_high_u64(r: uint32x2_t, a: uint64x2_t, b: uint64x2_t) -> uint32x4_t { - let x: uint32x2_t = transmute(vraddhn_s64_(transmute(a), transmute(b))); - simd_shuffle!(r, x, [0, 1, 2, 3]) -} - -/// Signed Add Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.s8))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(saddlp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpaddl_s8(a: int8x8_t) -> int16x4_t { - vpaddl_s8_(a) -} - -/// Signed Add Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.s16))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(saddlp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpaddl_s16(a: int16x4_t) -> int32x2_t { - vpaddl_s16_(a) -} - -/// Signed Add Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.s32))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(saddlp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpaddl_s32(a: int32x2_t) -> int64x1_t { - vpaddl_s32_(a) -} - -/// Signed Add Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.s8))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(saddlp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpaddlq_s8(a: int8x16_t) -> int16x8_t { - vpaddlq_s8_(a) -} - -/// Signed Add Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.s16))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(saddlp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpaddlq_s16(a: int16x8_t) -> int32x4_t { - vpaddlq_s16_(a) -} - -/// Signed Add Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.s32))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(saddlp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpaddlq_s32(a: int32x4_t) -> int64x2_t { - vpaddlq_s32_(a) -} - -/// Unsigned Add Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.u8))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uaddlp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpaddl_u8(a: uint8x8_t) -> uint16x4_t { - vpaddl_u8_(a) -} - -/// Unsigned Add Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.u16))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uaddlp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpaddl_u16(a: uint16x4_t) -> uint32x2_t { - vpaddl_u16_(a) -} - -/// Unsigned Add Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.u32))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uaddlp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpaddl_u32(a: uint32x2_t) -> uint64x1_t { - vpaddl_u32_(a) -} - -/// Unsigned Add Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.u8))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uaddlp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpaddlq_u8(a: uint8x16_t) -> uint16x8_t { - vpaddlq_u8_(a) -} - -/// Unsigned Add Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.u16))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uaddlp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpaddlq_u16(a: uint16x8_t) -> uint32x4_t { - vpaddlq_u16_(a) -} - -/// Unsigned Add Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.u32))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uaddlp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpaddlq_u32(a: uint32x4_t) -> uint64x2_t { - vpaddlq_u32_(a) -} - /// Vector narrow integer. #[inline] #[target_feature(enable = "neon")] @@ -6469,300 +5427,6 @@ pub unsafe fn vornq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t { simd_or(simd_xor(b, transmute(c)), a) } -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sminp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmin_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { - vpmins_v8i8(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sminp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmin_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { - vpmins_v4i16(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sminp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmin_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { - vpmins_v2i32(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uminp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmin_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { - vpminu_v8i8(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uminp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmin_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { - vpminu_v4i16(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uminp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmin_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { - vpminu_v2i32(a, b) -} - -/// Folding minimum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(fminp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmin_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { - vpminf_v2f32(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(smaxp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmax_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { - vpmaxs_v8i8(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(smaxp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmax_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { - vpmaxs_v4i16(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(smaxp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmax_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { - vpmaxs_v2i32(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(umaxp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmax_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { - vpmaxu_v8i8(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(umaxp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmax_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { - vpmaxu_v4i16(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(umaxp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmax_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { - vpmaxu_v2i32(a, b) -} - -/// Folding maximum of adjacent pairs -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(fmaxp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpmax_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { - vpmaxf_v2f32(a, b) -} - /// Move vector element to general-purpose register #[inline] #[target_feature(enable = "neon")] @@ -8689,127 +7353,6 @@ pub unsafe fn vext_u64(a: uint64x1_t, _b: uint64x1_t) -> uint64x1_ a } -/// Population count per byte. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcnt))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(cnt) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcnt_s8(a: int8x8_t) -> int8x8_t { - vcnt_s8_(a) -} -/// Population count per byte. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcnt))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(cnt) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcntq_s8(a: int8x16_t) -> int8x16_t { - vcntq_s8_(a) -} -/// Population count per byte. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcnt))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(cnt) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcnt_u8(a: uint8x8_t) -> uint8x8_t { - transmute(vcnt_s8_(transmute(a))) -} -/// Population count per byte. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcnt))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(cnt) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcntq_u8(a: uint8x16_t) -> uint8x16_t { - transmute(vcntq_s8_(transmute(a))) -} -/// Population count per byte. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcnt))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(cnt) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcnt_p8(a: poly8x8_t) -> poly8x8_t { - transmute(vcnt_s8_(transmute(a))) -} -/// Population count per byte. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcnt))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(cnt) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcntq_p8(a: poly8x16_t) -> poly8x16_t { - transmute(vcntq_s8_(transmute(a))) -} - /// Reversing vector elements (swap endianness) #[inline] #[target_feature(enable = "neon")] @@ -9566,432 +8109,6 @@ pub unsafe fn vrev64q_p16(a: poly16x8_t) -> poly16x8_t { simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) } -/// Signed Add and Accumulate Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.s8))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sadalp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadal_s8(a: int16x4_t, b: int8x8_t) -> int16x4_t { - #[cfg(target_arch = "arm")] - { - crate::core_arch::arm::neon::vpadal_s8_(a, b) - } - #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] - { - simd_add(vpaddl_s8_(b), a) - } -} - -/// Signed Add and Accumulate Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.s16))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sadalp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadal_s16(a: int32x2_t, b: int16x4_t) -> int32x2_t { - #[cfg(target_arch = "arm")] - { - crate::core_arch::arm::neon::vpadal_s16_(a, b) - } - #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] - { - simd_add(vpaddl_s16_(b), a) - } -} - -/// Signed Add and Accumulate Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.s32))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sadalp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadal_s32(a: int64x1_t, b: int32x2_t) -> int64x1_t { - #[cfg(target_arch = "arm")] - { - crate::core_arch::arm::neon::vpadal_s32_(a, b) - } - #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] - { - simd_add(vpaddl_s32_(b), a) - } -} - -/// Signed Add and Accumulate Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.s8))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sadalp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadalq_s8(a: int16x8_t, b: int8x16_t) -> int16x8_t { - #[cfg(target_arch = "arm")] - { - crate::core_arch::arm::neon::vpadalq_s8_(a, b) - } - #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] - { - simd_add(vpaddlq_s8_(b), a) - } -} - -/// Signed Add and Accumulate Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.s16))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sadalp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadalq_s16(a: int32x4_t, b: int16x8_t) -> int32x4_t { - #[cfg(target_arch = "arm")] - { - crate::core_arch::arm::neon::vpadalq_s16_(a, b) - } - #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] - { - simd_add(vpaddlq_s16_(b), a) - } -} - -/// Signed Add and Accumulate Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.s32))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(sadalp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadalq_s32(a: int64x2_t, b: int32x4_t) -> int64x2_t { - #[cfg(target_arch = "arm")] - { - crate::core_arch::arm::neon::vpadalq_s32_(a, b) - } - #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] - { - simd_add(vpaddlq_s32_(b), a) - } -} - -/// Unsigned Add and Accumulate Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.u8))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uadalp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadal_u8(a: uint16x4_t, b: uint8x8_t) -> uint16x4_t { - #[cfg(target_arch = "arm")] - { - crate::core_arch::arm::neon::vpadal_u8_(a, b) - } - #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] - { - simd_add(vpaddl_u8_(b), a) - } -} - -/// Unsigned Add and Accumulate Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.u16))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uadalp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadal_u16(a: uint32x2_t, b: uint16x4_t) -> uint32x2_t { - #[cfg(target_arch = "arm")] - { - crate::core_arch::arm::neon::vpadal_u16_(a, b) - } - #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] - { - simd_add(vpaddl_u16_(b), a) - } -} - -/// Unsigned Add and Accumulate Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.u32))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uadalp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadal_u32(a: uint64x1_t, b: uint32x2_t) -> uint64x1_t { - #[cfg(target_arch = "arm")] - { - crate::core_arch::arm::neon::vpadal_u32_(a, b) - } - #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] - { - simd_add(vpaddl_u32_(b), a) - } -} - -/// Unsigned Add and Accumulate Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.u8))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uadalp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadalq_u8(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t { - #[cfg(target_arch = "arm")] - { - crate::core_arch::arm::neon::vpadalq_u8_(a, b) - } - #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] - { - simd_add(vpaddlq_u8_(b), a) - } -} - -/// Unsigned Add and Accumulate Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.u16))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uadalp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadalq_u16(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t { - #[cfg(target_arch = "arm")] - { - crate::core_arch::arm::neon::vpadalq_u16_(a, b) - } - #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] - { - simd_add(vpaddlq_u16_(b), a) - } -} - -/// Unsigned Add and Accumulate Long Pairwise. -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.u32))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(uadalp) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vpadalq_u32(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t { - #[cfg(target_arch = "arm")] - { - crate::core_arch::arm::neon::vpadalq_u32_(a, b) - } - #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))] - { - simd_add(vpaddlq_u32_(b), a) - } -} - -/// 8-bit integer matrix multiply-accumulate -#[inline] -#[target_feature(enable = "neon,i8mm")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(smmla) -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - unstable(feature = "stdarch_neon_i8mm", issue = "117223") -)] -pub unsafe fn vmmlaq_s32(a: int32x4_t, b: int8x16_t, c: int8x16_t) -> int32x4_t { - #[allow(improper_ctypes)] - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.smmla.v4i32.v16i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.smmla.v4i32.v16i8" - )] - fn vmmlaq_s32_(a: int32x4_t, b: int8x16_t, c: int8x16_t) -> int32x4_t; - } - vmmlaq_s32_(a, b, c) -} - -/// 8-bit integer matrix multiply-accumulate -#[inline] -#[target_feature(enable = "neon,i8mm")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(ummla) -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - unstable(feature = "stdarch_neon_i8mm", issue = "117223") -)] -pub unsafe fn vmmlaq_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t { - #[allow(improper_ctypes)] - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.ummla.v4i32.v16i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.ummla.v4i32.v16i8" - )] - fn vmmlaq_u32_(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t; - } - vmmlaq_u32_(a, b, c) -} - -/// Unsigned and signed 8-bit integer matrix multiply-accumulate -#[inline] -#[target_feature(enable = "neon,i8mm")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(usmmla) -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -#[cfg_attr( - not(target_arch = "arm"), - unstable(feature = "stdarch_neon_i8mm", issue = "117223") -)] -pub unsafe fn vusmmlaq_s32(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4_t { - #[allow(improper_ctypes)] - unsafe extern "unadjusted" { - #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.usmmla.v4i32.v16i8")] - #[cfg_attr( - any(target_arch = "aarch64", target_arch = "arm64ec"), - link_name = "llvm.aarch64.neon.usmmla.v4i32.v16i8" - )] - fn vusmmlaq_s32_(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4_t; - } - vusmmlaq_s32_(a, b, c) -} - /* FIXME: 16-bit float /// Vector combine #[inline] @@ -10006,226 +8123,6 @@ pub unsafe fn vusmmlaq_s32(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4 } */ -/// Vector combine -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(test, assert_instr(nop))] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcombine_f32(low: float32x2_t, high: float32x2_t) -> float32x4_t { - simd_shuffle!(low, high, [0, 1, 2, 3]) -} - -/// Vector combine -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(test, assert_instr(nop))] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcombine_p8(low: poly8x8_t, high: poly8x8_t) -> poly8x16_t { - simd_shuffle!( - low, - high, - [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15], - ) -} - -/// Vector combine -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(test, assert_instr(nop))] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcombine_p16(low: poly16x4_t, high: poly16x4_t) -> poly16x8_t { - simd_shuffle!(low, high, [0, 1, 2, 3, 4, 5, 6, 7]) -} - -/// Vector combine -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(test, assert_instr(nop))] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcombine_s8(low: int8x8_t, high: int8x8_t) -> int8x16_t { - simd_shuffle!( - low, - high, - [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15], - ) -} - -/// Vector combine -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(test, assert_instr(nop))] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcombine_s16(low: int16x4_t, high: int16x4_t) -> int16x8_t { - simd_shuffle!(low, high, [0, 1, 2, 3, 4, 5, 6, 7]) -} - -/// Vector combine -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(test, assert_instr(nop))] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcombine_s32(low: int32x2_t, high: int32x2_t) -> int32x4_t { - simd_shuffle!(low, high, [0, 1, 2, 3]) -} - -/// Vector combine -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(test, assert_instr(nop))] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcombine_s64(low: int64x1_t, high: int64x1_t) -> int64x2_t { - simd_shuffle!(low, high, [0, 1]) -} - -/// Vector combine -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(test, assert_instr(nop))] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcombine_u8(low: uint8x8_t, high: uint8x8_t) -> uint8x16_t { - simd_shuffle!( - low, - high, - [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15], - ) -} - -/// Vector combine -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(test, assert_instr(nop))] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcombine_u16(low: uint16x4_t, high: uint16x4_t) -> uint16x8_t { - simd_shuffle!(low, high, [0, 1, 2, 3, 4, 5, 6, 7]) -} - -/// Vector combine -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))] -#[cfg_attr( - all(test, any(target_arch = "aarch64", target_arch = "arm64ec")), - assert_instr(mov) -)] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcombine_u32(low: uint32x2_t, high: uint32x2_t) -> uint32x4_t { - simd_shuffle!(low, high, [0, 1, 2, 3]) -} - -/// Vector combine -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(test, assert_instr(nop))] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcombine_u64(low: uint64x1_t, high: uint64x1_t) -> uint64x2_t { - simd_shuffle!(low, high, [0, 1]) -} - -/// Vector combine -#[inline] -#[target_feature(enable = "neon")] -#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] -#[cfg_attr(test, assert_instr(nop))] -#[cfg_attr( - not(target_arch = "arm"), - stable(feature = "neon_intrinsics", since = "1.59.0") -)] -#[cfg_attr( - target_arch = "arm", - unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800") -)] -pub unsafe fn vcombine_p64(low: poly64x1_t, high: poly64x1_t) -> poly64x2_t { - simd_shuffle!(low, high, [0, 1]) -} - #[cfg(test)] mod tests { use super::*; @@ -11861,566 +9758,6 @@ mod tests { assert_eq!(r, e); } - #[simd_test(enable = "neon")] - unsafe fn test_vaddhn_s16() { - let a = i16x8::new( - (0 << 8) + 1, - (1 << 8) + 1, - (2 << 8) + 1, - (3 << 8) + 1, - (4 << 8) + 1, - (5 << 8) + 1, - (6 << 8) + 1, - (7 << 8) + 1, - ); - let e = i8x8::new(0, 2, 4, 6, 8, 10, 12, 14); - let r: i8x8 = transmute(vaddhn_s16(transmute(a), transmute(a))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vaddhn_s32() { - let a = i32x4::new((0 << 16) + 1, (1 << 16) + 1, (2 << 16) + 1, (3 << 16) + 1); - let e = i16x4::new(0, 2, 4, 6); - let r: i16x4 = transmute(vaddhn_s32(transmute(a), transmute(a))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vaddhn_s64() { - let a = i64x2::new((0 << 32) + 1, (1 << 32) + 1); - let e = i32x2::new(0, 2); - let r: i32x2 = transmute(vaddhn_s64(transmute(a), transmute(a))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vaddhn_u16() { - let a = u16x8::new( - (0 << 8) + 1, - (1 << 8) + 1, - (2 << 8) + 1, - (3 << 8) + 1, - (4 << 8) + 1, - (5 << 8) + 1, - (6 << 8) + 1, - (7 << 8) + 1, - ); - let e = u8x8::new(0, 2, 4, 6, 8, 10, 12, 14); - let r: u8x8 = transmute(vaddhn_u16(transmute(a), transmute(a))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vaddhn_u32() { - let a = u32x4::new((0 << 16) + 1, (1 << 16) + 1, (2 << 16) + 1, (3 << 16) + 1); - let e = u16x4::new(0, 2, 4, 6); - let r: u16x4 = transmute(vaddhn_u32(transmute(a), transmute(a))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vaddhn_u64() { - let a = u64x2::new((0 << 32) + 1, (1 << 32) + 1); - let e = u32x2::new(0, 2); - let r: u32x2 = transmute(vaddhn_u64(transmute(a), transmute(a))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vaddhn_high_s16() { - let r = i8x8::splat(42); - let a = i16x8::new( - (0 << 8) + 1, - (1 << 8) + 1, - (2 << 8) + 1, - (3 << 8) + 1, - (4 << 8) + 1, - (5 << 8) + 1, - (6 << 8) + 1, - (7 << 8) + 1, - ); - let e = i8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 0, 2, 4, 6, 8, 10, 12, 14); - let r: i8x16 = transmute(vaddhn_high_s16(transmute(r), transmute(a), transmute(a))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vaddhn_high_s32() { - let r = i16x4::splat(42); - let a = i32x4::new((0 << 16) + 1, (1 << 16) + 1, (2 << 16) + 1, (3 << 16) + 1); - let e = i16x8::new(42, 42, 42, 42, 0, 2, 4, 6); - let r: i16x8 = transmute(vaddhn_high_s32(transmute(r), transmute(a), transmute(a))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vaddhn_high_s64() { - let r = i32x2::splat(42); - let a = i64x2::new((0 << 32) + 1, (1 << 32) + 1); - let e = i32x4::new(42, 42, 0, 2); - let r: i32x4 = transmute(vaddhn_high_s64(transmute(r), transmute(a), transmute(a))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vaddhn_high_u16() { - let r = u8x8::splat(42); - let a = u16x8::new( - (0 << 8) + 1, - (1 << 8) + 1, - (2 << 8) + 1, - (3 << 8) + 1, - (4 << 8) + 1, - (5 << 8) + 1, - (6 << 8) + 1, - (7 << 8) + 1, - ); - let e = u8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 0, 2, 4, 6, 8, 10, 12, 14); - let r: u8x16 = transmute(vaddhn_high_u16(transmute(r), transmute(a), transmute(a))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vaddhn_high_u32() { - let r = u16x4::splat(42); - let a = u32x4::new((0 << 16) + 1, (1 << 16) + 1, (2 << 16) + 1, (3 << 16) + 1); - let e = u16x8::new(42, 42, 42, 42, 0, 2, 4, 6); - let r: u16x8 = transmute(vaddhn_high_u32(transmute(r), transmute(a), transmute(a))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vaddhn_high_u64() { - let r = u32x2::splat(42); - let a = u64x2::new((0 << 32) + 1, (1 << 32) + 1); - let e = u32x4::new(42, 42, 0, 2); - let r: u32x4 = transmute(vaddhn_high_u64(transmute(r), transmute(a), transmute(a))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vraddhn_s16() { - let round_constant: i16 = (1 << 8) - 1; - let a = i16x8::new( - 0 << 8, - 1 << 8, - 2 << 8, - 3 << 8, - 4 << 8, - 5 << 8, - 6 << 8, - 7 << 8, - ); - let b = i16x8::new( - 0 << 8, - (1 << 8) + round_constant, - 2 << 8, - (3 << 8) + round_constant, - 4 << 8, - (5 << 8) + round_constant, - 6 << 8, - (7 << 8) + round_constant, - ); - let e = i8x8::new(0, 3, 4, 7, 8, 11, 12, 15); - let r: i8x8 = transmute(vraddhn_s16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vraddhn_s32() { - let round_constant: i32 = (1 << 16) - 1; - let a = i32x4::new(0 << 16, 1 << 16, 2 << 16, 3 << 16); - let b = i32x4::new( - 0 << 16, - (1 << 16) + round_constant, - 2 << 16, - (3 << 16) + round_constant, - ); - let e = i16x4::new(0, 3, 4, 7); - let r: i16x4 = transmute(vraddhn_s32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vraddhn_s64() { - let round_constant: i64 = (1 << 32) - 1; - let a = i64x2::new(0 << 32, 1 << 32); - let b = i64x2::new(0 << 32, (1 << 32) + round_constant); - let e = i32x2::new(0, 3); - let r: i32x2 = transmute(vraddhn_s64(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vraddhn_u16() { - let round_constant: u16 = (1 << 8) - 1; - let a = u16x8::new( - 0 << 8, - 1 << 8, - 2 << 8, - 3 << 8, - 4 << 8, - 5 << 8, - 6 << 8, - 7 << 8, - ); - let b = u16x8::new( - 0 << 8, - (1 << 8) + round_constant, - 2 << 8, - (3 << 8) + round_constant, - 4 << 8, - (5 << 8) + round_constant, - 6 << 8, - (7 << 8) + round_constant, - ); - let e = u8x8::new(0, 3, 4, 7, 8, 11, 12, 15); - let r: u8x8 = transmute(vraddhn_u16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vraddhn_u32() { - let round_constant: u32 = (1 << 16) - 1; - let a = u32x4::new(0 << 16, 1 << 16, 2 << 16, 3 << 16); - let b = u32x4::new( - 0 << 16, - (1 << 16) + round_constant, - 2 << 16, - (3 << 16) + round_constant, - ); - let e = u16x4::new(0, 3, 4, 7); - let r: u16x4 = transmute(vraddhn_u32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vraddhn_u64() { - let round_constant: u64 = (1 << 32) - 1; - let a = u64x2::new(0 << 32, 1 << 32); - let b = u64x2::new(0 << 32, (1 << 32) + round_constant); - let e = u32x2::new(0, 3); - let r: u32x2 = transmute(vraddhn_u64(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vraddhn_high_s16() { - let r = i8x8::splat(42); - let round_constant: i16 = (1 << 8) - 1; - let a = i16x8::new( - 0 << 8, - 1 << 8, - 2 << 8, - 3 << 8, - 4 << 8, - 5 << 8, - 6 << 8, - 7 << 8, - ); - let b = i16x8::new( - 0 << 8, - (1 << 8) + round_constant, - 2 << 8, - (3 << 8) + round_constant, - 4 << 8, - (5 << 8) + round_constant, - 6 << 8, - (7 << 8) + round_constant, - ); - let e = i8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 0, 3, 4, 7, 8, 11, 12, 15); - let r: i8x16 = transmute(vraddhn_high_s16(transmute(r), transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vraddhn_high_s32() { - let r = i16x4::splat(42); - let round_constant: i32 = (1 << 16) - 1; - let a = i32x4::new(0 << 16, 1 << 16, 2 << 16, 3 << 16); - let b = i32x4::new( - 0 << 16, - (1 << 16) + round_constant, - 2 << 16, - (3 << 16) + round_constant, - ); - let e = i16x8::new(42, 42, 42, 42, 0, 3, 4, 7); - let r: i16x8 = transmute(vraddhn_high_s32(transmute(r), transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vraddhn_high_s64() { - let r = i32x2::splat(42); - let round_constant: i64 = (1 << 32) - 1; - let a = i64x2::new(0 << 32, 1 << 32); - let b = i64x2::new(0 << 32, (1 << 32) + round_constant); - let e = i32x4::new(42, 42, 0, 3); - let r: i32x4 = transmute(vraddhn_high_s64(transmute(r), transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vraddhn_high_u16() { - let r = u8x8::splat(42); - let round_constant: u16 = (1 << 8) - 1; - let a = u16x8::new( - 0 << 8, - 1 << 8, - 2 << 8, - 3 << 8, - 4 << 8, - 5 << 8, - 6 << 8, - 7 << 8, - ); - let b = u16x8::new( - 0 << 8, - (1 << 8) + round_constant, - 2 << 8, - (3 << 8) + round_constant, - 4 << 8, - (5 << 8) + round_constant, - 6 << 8, - (7 << 8) + round_constant, - ); - let e = u8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 0, 3, 4, 7, 8, 11, 12, 15); - let r: u8x16 = transmute(vraddhn_high_u16(transmute(r), transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vraddhn_high_u32() { - let r = u16x4::splat(42); - let round_constant: u32 = (1 << 16) - 1; - let a = u32x4::new(0 << 16, 1 << 16, 2 << 16, 3 << 16); - let b = u32x4::new( - 0 << 16, - (1 << 16) + round_constant, - 2 << 16, - (3 << 16) + round_constant, - ); - let e = u16x8::new(42, 42, 42, 42, 0, 3, 4, 7); - let r: u16x8 = transmute(vraddhn_high_s32(transmute(r), transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vraddhn_high_u64() { - let r = u32x2::splat(42); - let round_constant: u64 = (1 << 32) - 1; - let a = u64x2::new(0 << 32, 1 << 32); - let b = u64x2::new(0 << 32, (1 << 32) + round_constant); - let e = u32x4::new(42, 42, 0, 3); - let r: u32x4 = transmute(vraddhn_high_s64(transmute(r), transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddl_s8() { - let a = i8x8::new(-4, -3, -2, -1, 0, 1, 2, 3); - let r: i16x4 = transmute(vpaddl_s8(transmute(a))); - let e = i16x4::new(-7, -3, 1, 5); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddl_s16() { - let a = i16x4::new(-2, -1, 0, 1); - let r: i32x2 = transmute(vpaddl_s16(transmute(a))); - let e = i32x2::new(-3, 1); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddl_s32() { - let a = i32x2::new(-1, 0); - let r: i64x1 = transmute(vpaddl_s32(transmute(a))); - let e = i64x1::new(-1); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddlq_s8() { - let a = i8x16::new(-8, -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7); - let r: i16x8 = transmute(vpaddlq_s8(transmute(a))); - let e = i16x8::new(-15, -11, -7, -3, 1, 5, 9, 13); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddlq_s16() { - let a = i16x8::new(-4, -3, -2, -1, 0, 1, 2, 3); - let r: i32x4 = transmute(vpaddlq_s16(transmute(a))); - let e = i32x4::new(-7, -3, 1, 5); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddlq_s32() { - let a = i32x4::new(-2, -1, 0, 1); - let r: i64x2 = transmute(vpaddlq_s32(transmute(a))); - let e = i64x2::new(-3, 1); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddl_u8() { - let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, u8::MAX); - let r: u16x4 = transmute(vpaddl_u8(transmute(a))); - let e = u16x4::new(1, 5, 9, u8::MAX as u16 + 6); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddl_u16() { - let a = u16x4::new(0, 1, 2, u16::MAX); - let r: u32x2 = transmute(vpaddl_u16(transmute(a))); - let e = u32x2::new(1, u16::MAX as u32 + 2); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddl_u32() { - let a = u32x2::new(1, u32::MAX); - let r: u64x1 = transmute(vpaddl_u32(transmute(a))); - let e = u64x1::new(u32::MAX as u64 + 1); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddlq_u8() { - let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, u8::MAX); - let r: u16x8 = transmute(vpaddlq_u8(transmute(a))); - let e = u16x8::new(1, 5, 9, 13, 17, 21, 25, u8::MAX as u16 + 14); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddlq_u16() { - let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, u16::MAX); - let r: u32x4 = transmute(vpaddlq_u16(transmute(a))); - let e = u32x4::new(1, 5, 9, u16::MAX as u32 + 6); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpaddlq_u32() { - let a = u32x4::new(0, 1, 2, u32::MAX); - let r: u64x2 = transmute(vpaddlq_u32(transmute(a))); - let e = u64x2::new(1, u32::MAX as u64 + 2); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpadal_s8() { - let a = i16x4::new(42, 42, 42, 42); - let b = i8x8::new(-4, -3, -2, -1, 0, 1, 2, 3); - let r: i16x4 = transmute(vpadal_s8(transmute(a), transmute(b))); - let e = i16x4::new(35, 39, 43, 47); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpadal_s16() { - let a = i32x2::new(42, 42); - let b = i16x4::new(-2, -1, 0, 1); - let r: i32x2 = transmute(vpadal_s16(transmute(a), transmute(b))); - let e = i32x2::new(39, 43); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpadal_s32() { - let a = i64x1::new(42); - let b = i32x2::new(-1, 0); - let r: i64x1 = transmute(vpadal_s32(transmute(a), transmute(b))); - let e = i64x1::new(41); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpadalq_s8() { - let a = i16x8::new(42, 42, 42, 42, 42, 42, 42, 42); - let b = i8x16::new(-8, -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7); - let r: i16x8 = transmute(vpadalq_s8(transmute(a), transmute(b))); - let e = i16x8::new(27, 31, 35, 39, 43, 47, 51, 55); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpadalq_s16() { - let a = i32x4::new(42, 42, 42, 42); - let b = i16x8::new(-4, -3, -2, -1, 0, 1, 2, 3); - let r: i32x4 = transmute(vpadalq_s16(transmute(a), transmute(b))); - let e = i32x4::new(35, 39, 43, 47); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpadalq_s32() { - let a = i64x2::new(42, 42); - let b = i32x4::new(-2, -1, 0, 1); - let r: i64x2 = transmute(vpadalq_s32(transmute(a), transmute(b))); - let e = i64x2::new(39, 43); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpadal_u8() { - let a = u16x4::new(42, 42, 42, 42); - let b = u8x8::new(0, 1, 2, 3, 4, 5, 6, u8::MAX); - let r: u16x4 = transmute(vpadal_u8(transmute(a), transmute(b))); - let e = u16x4::new(43, 47, 51, u8::MAX as u16 + 48); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpadal_u16() { - let a = u32x2::new(42, 42); - let b = u16x4::new(0, 1, 2, u16::MAX); - let r: u32x2 = transmute(vpadal_u16(transmute(a), transmute(b))); - let e = u32x2::new(43, u16::MAX as u32 + 44); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpadal_u32() { - let a = u64x1::new(42); - let b = u32x2::new(1, u32::MAX); - let r: u64x1 = transmute(vpadal_u32(transmute(a), transmute(b))); - let e = u64x1::new(u32::MAX as u64 + 43); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpadalq_u8() { - let a = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42); - let b = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, u8::MAX); - let r: u16x8 = transmute(vpadalq_u8(transmute(a), transmute(b))); - let e = u16x8::new(43, 47, 51, 55, 59, 63, 67, u8::MAX as u16 + 56); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpadalq_u16() { - let a = u32x4::new(42, 42, 42, 42); - let b = u16x8::new(0, 1, 2, 3, 4, 5, 6, u16::MAX); - let r: u32x4 = transmute(vpadalq_u16(transmute(a), transmute(b))); - let e = u32x4::new(43, 47, 51, u16::MAX as u32 + 48); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpadalq_u32() { - let a = u64x2::new(42, 42); - let b = u32x4::new(0, 1, 2, u32::MAX); - let r: u64x2 = transmute(vpadalq_u32(transmute(a), transmute(b))); - let e = u64x2::new(43, u32::MAX as u64 + 44); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] unsafe fn test_vmvn_s8() { let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7); @@ -13490,132 +10827,6 @@ mod tests { assert_eq!(r, e); } - #[simd_test(enable = "neon")] - unsafe fn test_vpmin_s8() { - let a = i8x8::new(1, -2, 3, -4, 5, 6, 7, 8); - let b = i8x8::new(0, 3, 2, 5, 4, 7, 6, 9); - let e = i8x8::new(-2, -4, 5, 7, 0, 2, 4, 6); - let r: i8x8 = transmute(vpmin_s8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmin_s16() { - let a = i16x4::new(1, 2, 3, -4); - let b = i16x4::new(0, 3, 2, 5); - let e = i16x4::new(1, -4, 0, 2); - let r: i16x4 = transmute(vpmin_s16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmin_s32() { - let a = i32x2::new(1, -2); - let b = i32x2::new(0, 3); - let e = i32x2::new(-2, 0); - let r: i32x2 = transmute(vpmin_s32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmin_u8() { - let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); - let b = u8x8::new(0, 3, 2, 5, 4, 7, 6, 9); - let e = u8x8::new(1, 3, 5, 7, 0, 2, 4, 6); - let r: u8x8 = transmute(vpmin_u8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmin_u16() { - let a = u16x4::new(1, 2, 3, 4); - let b = u16x4::new(0, 3, 2, 5); - let e = u16x4::new(1, 3, 0, 2); - let r: u16x4 = transmute(vpmin_u16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmin_u32() { - let a = u32x2::new(1, 2); - let b = u32x2::new(0, 3); - let e = u32x2::new(1, 0); - let r: u32x2 = transmute(vpmin_u32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmin_f32() { - let a = f32x2::new(1., -2.); - let b = f32x2::new(0., 3.); - let e = f32x2::new(-2., 0.); - let r: f32x2 = transmute(vpmin_f32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmax_s8() { - let a = i8x8::new(1, -2, 3, -4, 5, 6, 7, 8); - let b = i8x8::new(0, 3, 2, 5, 4, 7, 6, 9); - let e = i8x8::new(1, 3, 6, 8, 3, 5, 7, 9); - let r: i8x8 = transmute(vpmax_s8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmax_s16() { - let a = i16x4::new(1, 2, 3, -4); - let b = i16x4::new(0, 3, 2, 5); - let e = i16x4::new(2, 3, 3, 5); - let r: i16x4 = transmute(vpmax_s16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmax_s32() { - let a = i32x2::new(1, -2); - let b = i32x2::new(0, 3); - let e = i32x2::new(1, 3); - let r: i32x2 = transmute(vpmax_s32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmax_u8() { - let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); - let b = u8x8::new(0, 3, 2, 5, 4, 7, 6, 9); - let e = u8x8::new(2, 4, 6, 8, 3, 5, 7, 9); - let r: u8x8 = transmute(vpmax_u8(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmax_u16() { - let a = u16x4::new(1, 2, 3, 4); - let b = u16x4::new(0, 3, 2, 5); - let e = u16x4::new(2, 4, 3, 5); - let r: u16x4 = transmute(vpmax_u16(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmax_u32() { - let a = u32x2::new(1, 2); - let b = u32x2::new(0, 3); - let e = u32x2::new(2, 3); - let r: u32x2 = transmute(vpmax_u32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon")] - unsafe fn test_vpmax_f32() { - let a = f32x2::new(1., -2.); - let b = f32x2::new(0., 3.); - let e = f32x2::new(1., 3.); - let r: f32x2 = transmute(vpmax_f32(transmute(a), transmute(b))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] unsafe fn test_vand_s8() { test_bit_s8(|i, j| vand_s8(i, j), |a: i8, b: i8| -> i8 { a & b }); @@ -13818,42 +11029,78 @@ mod tests { unsafe fn test_vceq_s8() { test_cmp_s8( |i, j| vceq_s8(i, j), - |a: i8, b: i8| -> u8 { if a == b { 0xFF } else { 0 } }, + |a: i8, b: i8| -> u8 { + if a == b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vceqq_s8() { testq_cmp_s8( |i, j| vceqq_s8(i, j), - |a: i8, b: i8| -> u8 { if a == b { 0xFF } else { 0 } }, + |a: i8, b: i8| -> u8 { + if a == b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vceq_s16() { test_cmp_s16( |i, j| vceq_s16(i, j), - |a: i16, b: i16| -> u16 { if a == b { 0xFFFF } else { 0 } }, + |a: i16, b: i16| -> u16 { + if a == b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vceqq_s16() { testq_cmp_s16( |i, j| vceqq_s16(i, j), - |a: i16, b: i16| -> u16 { if a == b { 0xFFFF } else { 0 } }, + |a: i16, b: i16| -> u16 { + if a == b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vceq_s32() { test_cmp_s32( |i, j| vceq_s32(i, j), - |a: i32, b: i32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } }, + |a: i32, b: i32| -> u32 { + if a == b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vceqq_s32() { testq_cmp_s32( |i, j| vceqq_s32(i, j), - |a: i32, b: i32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } }, + |a: i32, b: i32| -> u32 { + if a == b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -13861,42 +11108,78 @@ mod tests { unsafe fn test_vceq_u8() { test_cmp_u8( |i, j| vceq_u8(i, j), - |a: u8, b: u8| -> u8 { if a == b { 0xFF } else { 0 } }, + |a: u8, b: u8| -> u8 { + if a == b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vceqq_u8() { testq_cmp_u8( |i, j| vceqq_u8(i, j), - |a: u8, b: u8| -> u8 { if a == b { 0xFF } else { 0 } }, + |a: u8, b: u8| -> u8 { + if a == b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vceq_u16() { test_cmp_u16( |i, j| vceq_u16(i, j), - |a: u16, b: u16| -> u16 { if a == b { 0xFFFF } else { 0 } }, + |a: u16, b: u16| -> u16 { + if a == b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vceqq_u16() { testq_cmp_u16( |i, j| vceqq_u16(i, j), - |a: u16, b: u16| -> u16 { if a == b { 0xFFFF } else { 0 } }, + |a: u16, b: u16| -> u16 { + if a == b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vceq_u32() { test_cmp_u32( |i, j| vceq_u32(i, j), - |a: u32, b: u32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } }, + |a: u32, b: u32| -> u32 { + if a == b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vceqq_u32() { testq_cmp_u32( |i, j| vceqq_u32(i, j), - |a: u32, b: u32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } }, + |a: u32, b: u32| -> u32 { + if a == b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -13904,14 +11187,26 @@ mod tests { unsafe fn test_vceq_f32() { test_cmp_f32( |i, j| vcge_f32(i, j), - |a: f32, b: f32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } }, + |a: f32, b: f32| -> u32 { + if a == b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vceqq_f32() { testq_cmp_f32( |i, j| vcgeq_f32(i, j), - |a: f32, b: f32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } }, + |a: f32, b: f32| -> u32 { + if a == b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -13919,42 +11214,78 @@ mod tests { unsafe fn test_vcgt_s8() { test_cmp_s8( |i, j| vcgt_s8(i, j), - |a: i8, b: i8| -> u8 { if a > b { 0xFF } else { 0 } }, + |a: i8, b: i8| -> u8 { + if a > b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgtq_s8() { testq_cmp_s8( |i, j| vcgtq_s8(i, j), - |a: i8, b: i8| -> u8 { if a > b { 0xFF } else { 0 } }, + |a: i8, b: i8| -> u8 { + if a > b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgt_s16() { test_cmp_s16( |i, j| vcgt_s16(i, j), - |a: i16, b: i16| -> u16 { if a > b { 0xFFFF } else { 0 } }, + |a: i16, b: i16| -> u16 { + if a > b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgtq_s16() { testq_cmp_s16( |i, j| vcgtq_s16(i, j), - |a: i16, b: i16| -> u16 { if a > b { 0xFFFF } else { 0 } }, + |a: i16, b: i16| -> u16 { + if a > b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgt_s32() { test_cmp_s32( |i, j| vcgt_s32(i, j), - |a: i32, b: i32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } }, + |a: i32, b: i32| -> u32 { + if a > b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgtq_s32() { testq_cmp_s32( |i, j| vcgtq_s32(i, j), - |a: i32, b: i32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } }, + |a: i32, b: i32| -> u32 { + if a > b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -13962,42 +11293,78 @@ mod tests { unsafe fn test_vcgt_u8() { test_cmp_u8( |i, j| vcgt_u8(i, j), - |a: u8, b: u8| -> u8 { if a > b { 0xFF } else { 0 } }, + |a: u8, b: u8| -> u8 { + if a > b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgtq_u8() { testq_cmp_u8( |i, j| vcgtq_u8(i, j), - |a: u8, b: u8| -> u8 { if a > b { 0xFF } else { 0 } }, + |a: u8, b: u8| -> u8 { + if a > b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgt_u16() { test_cmp_u16( |i, j| vcgt_u16(i, j), - |a: u16, b: u16| -> u16 { if a > b { 0xFFFF } else { 0 } }, + |a: u16, b: u16| -> u16 { + if a > b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgtq_u16() { testq_cmp_u16( |i, j| vcgtq_u16(i, j), - |a: u16, b: u16| -> u16 { if a > b { 0xFFFF } else { 0 } }, + |a: u16, b: u16| -> u16 { + if a > b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgt_u32() { test_cmp_u32( |i, j| vcgt_u32(i, j), - |a: u32, b: u32| -> u32 { if a > b { 0xFFFFFF } else { 0 } }, + |a: u32, b: u32| -> u32 { + if a > b { + 0xFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgtq_u32() { testq_cmp_u32( |i, j| vcgtq_u32(i, j), - |a: u32, b: u32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } }, + |a: u32, b: u32| -> u32 { + if a > b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -14005,14 +11372,26 @@ mod tests { unsafe fn test_vcgt_f32() { test_cmp_f32( |i, j| vcgt_f32(i, j), - |a: f32, b: f32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } }, + |a: f32, b: f32| -> u32 { + if a > b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgtq_f32() { testq_cmp_f32( |i, j| vcgtq_f32(i, j), - |a: f32, b: f32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } }, + |a: f32, b: f32| -> u32 { + if a > b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -14020,42 +11399,78 @@ mod tests { unsafe fn test_vclt_s8() { test_cmp_s8( |i, j| vclt_s8(i, j), - |a: i8, b: i8| -> u8 { if a < b { 0xFF } else { 0 } }, + |a: i8, b: i8| -> u8 { + if a < b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcltq_s8() { testq_cmp_s8( |i, j| vcltq_s8(i, j), - |a: i8, b: i8| -> u8 { if a < b { 0xFF } else { 0 } }, + |a: i8, b: i8| -> u8 { + if a < b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vclt_s16() { test_cmp_s16( |i, j| vclt_s16(i, j), - |a: i16, b: i16| -> u16 { if a < b { 0xFFFF } else { 0 } }, + |a: i16, b: i16| -> u16 { + if a < b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcltq_s16() { testq_cmp_s16( |i, j| vcltq_s16(i, j), - |a: i16, b: i16| -> u16 { if a < b { 0xFFFF } else { 0 } }, + |a: i16, b: i16| -> u16 { + if a < b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vclt_s32() { test_cmp_s32( |i, j| vclt_s32(i, j), - |a: i32, b: i32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } }, + |a: i32, b: i32| -> u32 { + if a < b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcltq_s32() { testq_cmp_s32( |i, j| vcltq_s32(i, j), - |a: i32, b: i32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } }, + |a: i32, b: i32| -> u32 { + if a < b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -14063,42 +11478,78 @@ mod tests { unsafe fn test_vclt_u8() { test_cmp_u8( |i, j| vclt_u8(i, j), - |a: u8, b: u8| -> u8 { if a < b { 0xFF } else { 0 } }, + |a: u8, b: u8| -> u8 { + if a < b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcltq_u8() { testq_cmp_u8( |i, j| vcltq_u8(i, j), - |a: u8, b: u8| -> u8 { if a < b { 0xFF } else { 0 } }, + |a: u8, b: u8| -> u8 { + if a < b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vclt_u16() { test_cmp_u16( |i, j| vclt_u16(i, j), - |a: u16, b: u16| -> u16 { if a < b { 0xFFFF } else { 0 } }, + |a: u16, b: u16| -> u16 { + if a < b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcltq_u16() { testq_cmp_u16( |i, j| vcltq_u16(i, j), - |a: u16, b: u16| -> u16 { if a < b { 0xFFFF } else { 0 } }, + |a: u16, b: u16| -> u16 { + if a < b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vclt_u32() { test_cmp_u32( |i, j| vclt_u32(i, j), - |a: u32, b: u32| -> u32 { if a < b { 0xFFFFFF } else { 0 } }, + |a: u32, b: u32| -> u32 { + if a < b { + 0xFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcltq_u32() { testq_cmp_u32( |i, j| vcltq_u32(i, j), - |a: u32, b: u32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } }, + |a: u32, b: u32| -> u32 { + if a < b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -14106,14 +11557,26 @@ mod tests { unsafe fn test_vclt_f32() { test_cmp_f32( |i, j| vclt_f32(i, j), - |a: f32, b: f32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } }, + |a: f32, b: f32| -> u32 { + if a < b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcltq_f32() { testq_cmp_f32( |i, j| vcltq_f32(i, j), - |a: f32, b: f32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } }, + |a: f32, b: f32| -> u32 { + if a < b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -14121,42 +11584,78 @@ mod tests { unsafe fn test_vcle_s8() { test_cmp_s8( |i, j| vcle_s8(i, j), - |a: i8, b: i8| -> u8 { if a <= b { 0xFF } else { 0 } }, + |a: i8, b: i8| -> u8 { + if a <= b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcleq_s8() { testq_cmp_s8( |i, j| vcleq_s8(i, j), - |a: i8, b: i8| -> u8 { if a <= b { 0xFF } else { 0 } }, + |a: i8, b: i8| -> u8 { + if a <= b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcle_s16() { test_cmp_s16( |i, j| vcle_s16(i, j), - |a: i16, b: i16| -> u16 { if a <= b { 0xFFFF } else { 0 } }, + |a: i16, b: i16| -> u16 { + if a <= b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcleq_s16() { testq_cmp_s16( |i, j| vcleq_s16(i, j), - |a: i16, b: i16| -> u16 { if a <= b { 0xFFFF } else { 0 } }, + |a: i16, b: i16| -> u16 { + if a <= b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcle_s32() { test_cmp_s32( |i, j| vcle_s32(i, j), - |a: i32, b: i32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } }, + |a: i32, b: i32| -> u32 { + if a <= b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcleq_s32() { testq_cmp_s32( |i, j| vcleq_s32(i, j), - |a: i32, b: i32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } }, + |a: i32, b: i32| -> u32 { + if a <= b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -14164,42 +11663,78 @@ mod tests { unsafe fn test_vcle_u8() { test_cmp_u8( |i, j| vcle_u8(i, j), - |a: u8, b: u8| -> u8 { if a <= b { 0xFF } else { 0 } }, + |a: u8, b: u8| -> u8 { + if a <= b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcleq_u8() { testq_cmp_u8( |i, j| vcleq_u8(i, j), - |a: u8, b: u8| -> u8 { if a <= b { 0xFF } else { 0 } }, + |a: u8, b: u8| -> u8 { + if a <= b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcle_u16() { test_cmp_u16( |i, j| vcle_u16(i, j), - |a: u16, b: u16| -> u16 { if a <= b { 0xFFFF } else { 0 } }, + |a: u16, b: u16| -> u16 { + if a <= b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcleq_u16() { testq_cmp_u16( |i, j| vcleq_u16(i, j), - |a: u16, b: u16| -> u16 { if a <= b { 0xFFFF } else { 0 } }, + |a: u16, b: u16| -> u16 { + if a <= b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcle_u32() { test_cmp_u32( |i, j| vcle_u32(i, j), - |a: u32, b: u32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } }, + |a: u32, b: u32| -> u32 { + if a <= b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcleq_u32() { testq_cmp_u32( |i, j| vcleq_u32(i, j), - |a: u32, b: u32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } }, + |a: u32, b: u32| -> u32 { + if a <= b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -14207,14 +11742,26 @@ mod tests { unsafe fn test_vcle_f32() { test_cmp_f32( |i, j| vcle_f32(i, j), - |a: f32, b: f32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } }, + |a: f32, b: f32| -> u32 { + if a <= b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcleq_f32() { testq_cmp_f32( |i, j| vcleq_f32(i, j), - |a: f32, b: f32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } }, + |a: f32, b: f32| -> u32 { + if a <= b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -14222,42 +11769,78 @@ mod tests { unsafe fn test_vcge_s8() { test_cmp_s8( |i, j| vcge_s8(i, j), - |a: i8, b: i8| -> u8 { if a >= b { 0xFF } else { 0 } }, + |a: i8, b: i8| -> u8 { + if a >= b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgeq_s8() { testq_cmp_s8( |i, j| vcgeq_s8(i, j), - |a: i8, b: i8| -> u8 { if a >= b { 0xFF } else { 0 } }, + |a: i8, b: i8| -> u8 { + if a >= b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcge_s16() { test_cmp_s16( |i, j| vcge_s16(i, j), - |a: i16, b: i16| -> u16 { if a >= b { 0xFFFF } else { 0 } }, + |a: i16, b: i16| -> u16 { + if a >= b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgeq_s16() { testq_cmp_s16( |i, j| vcgeq_s16(i, j), - |a: i16, b: i16| -> u16 { if a >= b { 0xFFFF } else { 0 } }, + |a: i16, b: i16| -> u16 { + if a >= b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcge_s32() { test_cmp_s32( |i, j| vcge_s32(i, j), - |a: i32, b: i32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } }, + |a: i32, b: i32| -> u32 { + if a >= b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgeq_s32() { testq_cmp_s32( |i, j| vcgeq_s32(i, j), - |a: i32, b: i32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } }, + |a: i32, b: i32| -> u32 { + if a >= b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -14265,42 +11848,78 @@ mod tests { unsafe fn test_vcge_u8() { test_cmp_u8( |i, j| vcge_u8(i, j), - |a: u8, b: u8| -> u8 { if a >= b { 0xFF } else { 0 } }, + |a: u8, b: u8| -> u8 { + if a >= b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgeq_u8() { testq_cmp_u8( |i, j| vcgeq_u8(i, j), - |a: u8, b: u8| -> u8 { if a >= b { 0xFF } else { 0 } }, + |a: u8, b: u8| -> u8 { + if a >= b { + 0xFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcge_u16() { test_cmp_u16( |i, j| vcge_u16(i, j), - |a: u16, b: u16| -> u16 { if a >= b { 0xFFFF } else { 0 } }, + |a: u16, b: u16| -> u16 { + if a >= b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgeq_u16() { testq_cmp_u16( |i, j| vcgeq_u16(i, j), - |a: u16, b: u16| -> u16 { if a >= b { 0xFFFF } else { 0 } }, + |a: u16, b: u16| -> u16 { + if a >= b { + 0xFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcge_u32() { test_cmp_u32( |i, j| vcge_u32(i, j), - |a: u32, b: u32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } }, + |a: u32, b: u32| -> u32 { + if a >= b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgeq_u32() { testq_cmp_u32( |i, j| vcgeq_u32(i, j), - |a: u32, b: u32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } }, + |a: u32, b: u32| -> u32 { + if a >= b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -14308,14 +11927,26 @@ mod tests { unsafe fn test_vcge_f32() { test_cmp_f32( |i, j| vcge_f32(i, j), - |a: f32, b: f32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } }, + |a: f32, b: f32| -> u32 { + if a >= b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } #[simd_test(enable = "neon")] unsafe fn test_vcgeq_f32() { testq_cmp_f32( |i, j| vcgeq_f32(i, j), - |a: f32, b: f32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } }, + |a: f32, b: f32| -> u32 { + if a >= b { + 0xFFFFFFFF + } else { + 0 + } + }, ); } @@ -14831,49 +12462,6 @@ mod tests { ); } - #[simd_test(enable = "neon")] - unsafe fn test_vabs_s8() { - let a = i8x8::new(-1, 0, 1, -2, 0, 2, -128, 127); - let r: i8x8 = transmute(vabs_s8(transmute(a))); - let e = i8x8::new(1, 0, 1, 2, 0, 2, -128, 127); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vabsq_s8() { - let a = i8x16::new(-1, 0, 1, -2, 0, 2, -128, 127, -1, 0, 1, -2, 0, 2, -128, 127); - let r: i8x16 = transmute(vabsq_s8(transmute(a))); - let e = i8x16::new(1, 0, 1, 2, 0, 2, -128, 127, 1, 0, 1, 2, 0, 2, -128, 127); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vabs_s16() { - let a = i16x4::new(-1, 0, i16::MIN, i16::MAX); - let r: i16x4 = transmute(vabs_s16(transmute(a))); - let e = i16x4::new(1, 0, i16::MIN, i16::MAX); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vabsq_s16() { - let a = i16x8::new(-1, 0, i16::MIN, i16::MAX, -1, 0, i16::MIN, i16::MAX); - let r: i16x8 = transmute(vabsq_s16(transmute(a))); - let e = i16x8::new(1, 0, i16::MIN, i16::MAX, 1, 0, i16::MIN, i16::MAX); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vabs_s32() { - let a = i32x2::new(i32::MIN, i32::MIN + 1); - let r: i32x2 = transmute(vabs_s32(transmute(a))); - let e = i32x2::new(i32::MIN, i32::MAX); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vabsq_s32() { - let a = i32x4::new(i32::MIN, i32::MIN + 1, 0, -1); - let r: i32x4 = transmute(vabsq_s32(transmute(a))); - let e = i32x4::new(i32::MIN, i32::MAX, 0, 1); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] unsafe fn test_vaba_s8() { let a = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); @@ -14987,117 +12575,6 @@ mod tests { assert_eq!(r, e); } - #[simd_test(enable = "neon")] - unsafe fn test_vpadd_s16() { - let a = i16x4::new(1, 2, 3, 4); - let b = i16x4::new(0, -1, -2, -3); - let r: i16x4 = transmute(vpadd_s16(transmute(a), transmute(b))); - let e = i16x4::new(3, 7, -1, -5); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpadd_s32() { - let a = i32x2::new(1, 2); - let b = i32x2::new(0, -1); - let r: i32x2 = transmute(vpadd_s32(transmute(a), transmute(b))); - let e = i32x2::new(3, -1); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpadd_s8() { - let a = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); - let b = i8x8::new(0, -1, -2, -3, -4, -5, -6, -7); - let r: i8x8 = transmute(vpadd_s8(transmute(a), transmute(b))); - let e = i8x8::new(3, 7, 11, 15, -1, -5, -9, -13); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpadd_u16() { - let a = u16x4::new(1, 2, 3, 4); - let b = u16x4::new(30, 31, 32, 33); - let r: u16x4 = transmute(vpadd_u16(transmute(a), transmute(b))); - let e = u16x4::new(3, 7, 61, 65); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpadd_u32() { - let a = u32x2::new(1, 2); - let b = u32x2::new(30, 31); - let r: u32x2 = transmute(vpadd_u32(transmute(a), transmute(b))); - let e = u32x2::new(3, 61); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vpadd_u8() { - let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); - let b = u8x8::new(30, 31, 32, 33, 34, 35, 36, 37); - let r: u8x8 = transmute(vpadd_u8(transmute(a), transmute(b))); - let e = u8x8::new(3, 7, 11, 15, 61, 65, 69, 73); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcnt_s8() { - let a: i8x8 = transmute(u8x8::new( - 0b11001000, 0b11111111, 0b00000000, 0b11011111, 0b10000001, 0b10101001, 0b00001000, - 0b00111111, - )); - let e = i8x8::new(3, 8, 0, 7, 2, 4, 1, 6); - let r: i8x8 = transmute(vcnt_s8(transmute(a))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcntq_s8() { - let a: i8x16 = transmute(u8x16::new( - 0b11001000, 0b11111111, 0b00000000, 0b11011111, 0b10000001, 0b10101001, 0b00001000, - 0b00111111, 0b11101110, 0b00000000, 0b11111111, 0b00100001, 0b11111111, 0b10010111, - 0b11100000, 0b00010000, - )); - let e = i8x16::new(3, 8, 0, 7, 2, 4, 1, 6, 6, 0, 8, 2, 8, 5, 3, 1); - let r: i8x16 = transmute(vcntq_s8(transmute(a))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcnt_u8() { - let a = u8x8::new( - 0b11001000, 0b11111111, 0b00000000, 0b11011111, 0b10000001, 0b10101001, 0b00001000, - 0b00111111, - ); - let e = u8x8::new(3, 8, 0, 7, 2, 4, 1, 6); - let r: u8x8 = transmute(vcnt_u8(transmute(a))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcntq_u8() { - let a = u8x16::new( - 0b11001000, 0b11111111, 0b00000000, 0b11011111, 0b10000001, 0b10101001, 0b00001000, - 0b00111111, 0b11101110, 0b00000000, 0b11111111, 0b00100001, 0b11111111, 0b10010111, - 0b11100000, 0b00010000, - ); - let e = u8x16::new(3, 8, 0, 7, 2, 4, 1, 6, 6, 0, 8, 2, 8, 5, 3, 1); - let r: u8x16 = transmute(vcntq_u8(transmute(a))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcnt_p8() { - let a = u8x8::new( - 0b11001000, 0b11111111, 0b00000000, 0b11011111, 0b10000001, 0b10101001, 0b00001000, - 0b00111111, - ); - let e = u8x8::new(3, 8, 0, 7, 2, 4, 1, 6); - let r: u8x8 = transmute(vcnt_p8(transmute(a))); - assert_eq!(r, e); - } - #[simd_test(enable = "neon")] - unsafe fn test_vcntq_p8() { - let a = u8x16::new( - 0b11001000, 0b11111111, 0b00000000, 0b11011111, 0b10000001, 0b10101001, 0b00001000, - 0b00111111, 0b11101110, 0b00000000, 0b11111111, 0b00100001, 0b11111111, 0b10010111, - 0b11100000, 0b00010000, - ); - let e = u8x16::new(3, 8, 0, 7, 2, 4, 1, 6, 6, 0, 8, 2, 8, 5, 3, 1); - let r: u8x16 = transmute(vcntq_p8(transmute(a))); - assert_eq!(r, e); - } #[simd_test(enable = "neon")] unsafe fn test_vrev16_s8() { let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7); @@ -15350,35 +12827,6 @@ mod tests { let e: u16x8 = transmute(vrev64q_p16(transmute(a))); assert_eq!(r, e); } - #[simd_test(enable = "neon,i8mm")] - unsafe fn test_vmmlaq_s32() { - let a = i32x4::new(1, 3, 4, -0x10000); - let b = i8x16::new(1, 21, 31, 14, 5, 6, -128, 8, 9, 13, 15, 12, 13, -1, 20, 16); - let c = i8x16::new(12, 22, 3, 4, -1, 56, 7, 8, 91, 10, -128, 15, 13, 14, 17, 16); - let e = i32x4::new(123, -5353, 690, -65576); - let r: i32x4 = transmute(vmmlaq_s32(transmute(a), transmute(b), transmute(c))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon,i8mm")] - unsafe fn test_vmmlaq_u32() { - let a = u32x4::new(1, 3, 4, 0xffff0000); - let b = u8x16::new(1, 21, 31, 14, 5, 6, 128, 8, 9, 13, 15, 12, 13, 255, 20, 16); - let c = u8x16::new(12, 22, 3, 4, 255, 56, 7, 8, 91, 10, 128, 15, 13, 14, 17, 16); - let e = u32x4::new(3195, 6935, 18354, 4294909144); - let r: u32x4 = transmute(vmmlaq_u32(transmute(a), transmute(b), transmute(c))); - assert_eq!(r, e); - } - - #[simd_test(enable = "neon,i8mm")] - unsafe fn test_vusmmlaq_s32() { - let a = i32x4::new(1, 3, 4, -0x10000); - let b = u8x16::new(1, 21, 31, 14, 5, 6, 128, 8, 9, 13, 15, 12, 13, 255, 20, 16); - let c = i8x16::new(12, 22, 3, 4, -1, 56, 7, 8, 91, 10, -128, 15, 13, 14, 17, 16); - let e = i32x4::new(1915, -1001, 15026, -61992); - let r: i32x4 = transmute(vusmmlaq_s32(transmute(a), transmute(b), transmute(c))); - assert_eq!(r, e); - } macro_rules! test_vcombine { ($test_id:ident => $fn_id:ident ([$($a:expr),*], [$($b:expr),*])) => {